开源软件构建与测试

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-<title>NASM - The Netwide Assembler</title>
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-<h1>NASM - The Netwide Assembler</h1>
-<span class="subtitle">version 2.16.01</span>
-</div>
-<div class="contents"
->
-<h2 id="chapter-10">Chapter 10: Writing 32-bit Code (Unix, Win32, DJGPP)</h2>
-<p>This chapter attempts to cover some of the common issues involved when
-writing 32-bit code, to run under Win32 or Unix, or to be linked with C
-code generated by a Unix-style C compiler such as DJGPP. It covers how to
-write assembly code to interface with 32-bit C routines, and how to write
-position-independent code for shared libraries.</p>
-<p>Almost all 32-bit code, and in particular all code running under
-<code>Win32</code>, <code>DJGPP</code> or any of the PC Unix variants, runs
-in <em>flat</em> memory model. This means that the segment registers and
-paging have already been set up to give you the same 32-bit 4Gb address
-space no matter what segment you work relative to, and that you should
-ignore all segment registers completely. When writing flat-model
-application code, you never need to use a segment override or modify any
-segment register, and the code-section addresses you pass to
-<code>CALL</code> and <code>JMP</code> live in the same address space as
-the data-section addresses you access your variables by and the
-stack-section addresses you access local variables and procedure parameters
-by. Every address is 32 bits long and contains only an offset part.</p>
-<h3 id="section-10.1">10.1 Interfacing to 32-bit C Programs</h3>
-<p>A lot of the discussion in <a href="nasmdoc9.html#section-9.4">section
-9.4</a>, about interfacing to 16-bit C programs, still applies when working
-in 32 bits. The absence of memory models or segmentation worries simplifies
-things a lot.</p>
-<h4 id="section-10.1.1">10.1.1 External Symbol Names</h4>
-<p>Most 32-bit C compilers share the convention used by 16-bit compilers,
-that the names of all global symbols (functions or data) they define are
-formed by prefixing an underscore to the name as it appears in the C
-program. However, not all of them do: the <code>ELF</code> specification
-states that C symbols do <em>not</em> have a leading underscore on their
-assembly-language names.</p>
-<p>The older Linux <code>a.out</code> C compiler, all <code>Win32</code>
-compilers, <code>DJGPP</code>, and <code>NetBSD</code> and
-<code>FreeBSD</code>, all use the leading underscore; for these compilers,
-the macros <code>cextern</code> and <code>cglobal</code>, as given in
-<a href="nasmdoc9.html#section-9.4.1">section 9.4.1</a>, will still work.
-For <code>ELF</code>, though, the leading underscore should not be used.</p>
-<p>See also <a href="nasmdoc2.html#section-2.1.28">section 2.1.28</a>.</p>
-<h4 id="section-10.1.2">10.1.2 Function Definitions and Function Calls</h4>
-<p>The C calling convention in 32-bit programs is as follows. In the
-following description, the words <em>caller</em> and <em>callee</em> are
-used to denote the function doing the calling and the function which gets
-called.</p>
-<ul>
-<li>
-<p>The caller pushes the function's parameters on the stack, one after
-another, in reverse order (right to left, so that the first argument
-specified to the function is pushed last).</p>
-</li>
-<li>
-<p>The caller then executes a near <code>CALL</code> instruction to pass
-control to the callee.</p>
-</li>
-<li>
-<p>The callee receives control, and typically (although this is not
-actually necessary, in functions which do not need to access their
-parameters) starts by saving the value of <code>ESP</code> in
-<code>EBP</code> so as to be able to use <code>EBP</code> as a base pointer
-to find its parameters on the stack. However, the caller was probably doing
-this too, so part of the calling convention states that <code>EBP</code>
-must be preserved by any C function. Hence the callee, if it is going to
-set up <code>EBP</code> as a frame pointer, must push the previous value
-first.</p>
-</li>
-<li>
-<p>The callee may then access its parameters relative to <code>EBP</code>.
-The doubleword at <code>EBP</code> holds the previous value of
-<code>EBP</code> as it was pushed; the next doubleword, at
-<code>EBP+4</code>, holds the return address, pushed implicitly by
-<code>CALL</code>. The parameters start after that, at
-<code>EBP+8</code>. The leftmost parameter of the function, since it was
-pushed last, is accessible at this offset from <code>EBP</code>; the others
-follow, at successively greater offsets. Thus, in a function such as
-<code>printf</code> which takes a variable number of parameters, the
-pushing of the parameters in reverse order means that the function knows
-where to find its first parameter, which tells it the number and type of
-the remaining ones.</p>
-</li>
-<li>
-<p>The callee may also wish to decrease <code>ESP</code> further, so as to
-allocate space on the stack for local variables, which will then be
-accessible at negative offsets from <code>EBP</code>.</p>
-</li>
-<li>
-<p>The callee, if it wishes to return a value to the caller, should leave
-the value in <code>AL</code>, <code>AX</code> or <code>EAX</code> depending
-on the size of the value. Floating-point results are typically returned in
-<code>ST0</code>.</p>
-</li>
-<li>
-<p>Once the callee has finished processing, it restores <code>ESP</code>
-from <code>EBP</code> if it had allocated local stack space, then pops the
-previous value of <code>EBP</code>, and returns via <code>RET</code>
-(equivalently, <code>RETN</code>).</p>
-</li>
-<li>
-<p>When the caller regains control from the callee, the function parameters
-are still on the stack, so it typically adds an immediate constant to
-<code>ESP</code> to remove them (instead of executing a number of slow
-<code>POP</code> instructions). Thus, if a function is accidentally called
-with the wrong number of parameters due to a prototype mismatch, the stack
-will still be returned to a sensible state since the caller, which
-<em>knows</em> how many parameters it pushed, does the removing.</p>
-</li>
-</ul>
-<p>There is an alternative calling convention used by Win32 programs for
-Windows API calls, and also for functions called <em>by</em> the Windows
-API such as window procedures: they follow what Microsoft calls the
-<code>__stdcall</code> convention. This is slightly closer to the Pascal
-convention, in that the callee clears the stack by passing a parameter to
-the <code>RET</code> instruction. However, the parameters are still pushed
-in right-to-left order.</p>
-<p>Thus, you would define a function in C style in the following way:</p>
-<pre>
-global  _myfunc 
-
-_myfunc: 
-        push    ebp 
-        mov     ebp,esp 
-        sub     esp,0x40        ; 64 bytes of local stack space 
-        mov     ebx,ebp+8     ; first parameter to function 
-
-        ; some more code 
-
-        leave                   ; mov esp,ebp / pop ebp 
-        ret
-</pre>
-<p>At the other end of the process, to call a C function from your assembly
-code, you would do something like this:</p>
-<pre>
-extern  _printf 
-
-        ; and then, further down... 
-
-        push    dword myint   ; one of my integer variables 
-        push    dword mystring  ; pointer into my data segment 
-        call    _printf 
-        add     esp,byte 8      ; `byte' saves space 
-
-        ; then those data items... 
-
-segment _DATA 
-
-myint       dd   1234 
-mystring    db   'This number -&gt; %d &lt;- should be 1234',10,0
-</pre>
-<p>This piece of code is the assembly equivalent of the C code</p>
-<pre>
-    int myint = 1234; 
-    printf("This number -&gt; %d &lt;- should be 1234\n", myint);
-</pre>
-<h4 id="section-10.1.3">10.1.3 Accessing Data Items</h4>
-<p>To get at the contents of C variables, or to declare variables which C
-can access, you need only declare the names as <code>GLOBAL</code> or
-<code>EXTERN</code>. (Again, the names require leading underscores, as
-stated in <a href="#section-10.1.1">section 10.1.1</a>.) Thus, a C variable
-declared as <code>int i</code> can be accessed from assembler as</p>
-<pre>
-          extern _i 
-          mov eax,_i
-</pre>
-<p>And to declare your own integer variable which C programs can access as
-<code>extern int j</code>, you do this (making sure you are assembling in
-the <code>_DATA</code> segment, if necessary):</p>
-<pre>
-          global _j 
-_j        dd 0
-</pre>
-<p>To access a C array, you need to know the size of the components of the
-array. For example, <code>int</code> variables are four bytes long, so if a
-C program declares an array as <code>int a10</code>, you can access
-<code>a3</code> by coding <code>mov ax,_a+12</code>. (The byte offset
-12 is obtained by multiplying the desired array index, 3, by the size of
-the array element, 4.) The sizes of the C base types in 32-bit compilers
-are: 1 for <code>char</code>, 2 for <code>short</code>, 4 for
-<code>int</code>, <code>long</code> and <code>float</code>, and 8 for
-<code>double</code>. Pointers, being 32-bit addresses, are also 4 bytes
-long.</p>
-<p>To access a C data structure, you need to know the offset from the base
-of the structure to the field you are interested in. You can either do this
-by converting the C structure definition into a NASM structure definition
-(using <code>STRUC</code>), or by calculating the one offset and using just
-that.</p>
-<p>To do either of these, you should read your C compiler's manual to find
-out how it organizes data structures. NASM gives no special alignment to
-structure members in its own <code>STRUC</code> macro, so you have to
-specify alignment yourself if the C compiler generates it. Typically, you
-might find that a structure like</p>
-<pre>
-struct { 
-    char c; 
-    int i; 
-} foo;
-</pre>
-<p>might be eight bytes long rather than five, since the <code>int</code>
-field would be aligned to a four-byte boundary. However, this sort of
-feature is sometimes a configurable option in the C compiler, either using
-command-line options or <code>#pragma</code> lines, so you have to find out
-how your own compiler does it.</p>
-<h4 id="section-10.1.4">10.1.4 <code>c32.mac</code>: Helper Macros for the 32-bit C Interface</h4>
-<p>Included in the NASM archives, in the <code>misc</code> directory, is a
-file <code>c32.mac</code> of macros. It defines three macros:
-<code>proc</code>, <code>arg</code> and <code>endproc</code>. These are
-intended to be used for C-style procedure definitions, and they automate a
-lot of the work involved in keeping track of the calling convention.</p>
-<p>An example of an assembly function using the macro set is given here:</p>
-<pre>
-proc    _proc32 
-
-%$i     arg 
-%$j     arg 
-        mov     eax,ebp + %$i 
-        mov     ebx,ebp + %$j 
-        add     eax,ebx 
-
-endproc
-</pre>
-<p>This defines <code>_proc32</code> to be a procedure taking two
-arguments, the first (<code>i</code>) an integer and the second
-(<code>j</code>) a pointer to an integer. It returns <code>i + *j</code>.</p>
-<p>Note that the <code>arg</code> macro has an <code>EQU</code> as the
-first line of its expansion, and since the label before the macro call gets
-prepended to the first line of the expanded macro, the <code>EQU</code>
-works, defining <code>%$i</code> to be an offset from <code>BP</code>. A
-context-local variable is used, local to the context pushed by the
-<code>proc</code> macro and popped by the <code>endproc</code> macro, so
-that the same argument name can be used in later procedures. Of course, you
-don't <em>have</em> to do that.</p>
-<p><code>arg</code> can take an optional parameter, giving the size of the
-argument. If no size is given, 4 is assumed, since it is likely that many
-function parameters will be of type <code>int</code> or pointers.</p>
-<h3 id="section-10.2">10.2 Writing NetBSD/FreeBSD/OpenBSD and Linux/ELF Shared Libraries</h3>
-<p><code>ELF</code> replaced the older <code>a.out</code> object file
-format under Linux because it contains support for position-independent
-code (PIC), which makes writing shared libraries much easier. NASM supports
-the <code>ELF</code> position-independent code features, so you can write
-Linux <code>ELF</code> shared libraries in NASM.</p>
-<p>NetBSD, and its close cousins FreeBSD and OpenBSD, take a different
-approach by hacking PIC support into the <code>a.out</code> format. NASM
-supports this as the <code>aoutb</code> output format, so you can write BSD
-shared libraries in NASM too.</p>
-<p>The operating system loads a PIC shared library by memory-mapping the
-library file at an arbitrarily chosen point in the address space of the
-running process. The contents of the library's code section must therefore
-not depend on where it is loaded in memory.</p>
-<p>Therefore, you cannot get at your variables by writing code like this:</p>
-<pre>
-        mov     eax,myvar             ; WRONG
-</pre>
-<p>Instead, the linker provides an area of memory called the <em>global
-offset table</em>, or GOT; the GOT is situated at a constant distance from
-your library's code, so if you can find out where your library is loaded
-(which is typically done using a <code>CALL</code> and <code>POP</code>
-combination), you can obtain the address of the GOT, and you can then load
-the addresses of your variables out of linker-generated entries in the GOT.</p>
-<p>The <em>data</em> section of a PIC shared library does not have these
-restrictions: since the data section is writable, it has to be copied into
-memory anyway rather than just paged in from the library file, so as long
-as it's being copied it can be relocated too. So you can put ordinary types
-of relocation in the data section without too much worry (but see
-<a href="#section-10.2.4">section 10.2.4</a> for a caveat).</p>
-<h4 id="section-10.2.1">10.2.1 Obtaining the Address of the GOT</h4>
-<p>Each code module in your shared library should define the GOT as an
-external symbol:</p>
-<pre>
-extern  _GLOBAL_OFFSET_TABLE_   ; in ELF 
-extern  __GLOBAL_OFFSET_TABLE_  ; in BSD a.out
-</pre>
-<p>At the beginning of any function in your shared library which plans to
-access your data or BSS sections, you must first calculate the address of
-the GOT. This is typically done by writing the function in this form:</p>
-<pre>
-func:   push    ebp 
-        mov     ebp,esp 
-        push    ebx 
-        call    .get_GOT 
-.get_GOT: 
-        pop     ebx 
-        add     ebx,_GLOBAL_OFFSET_TABLE_+$$-.get_GOT wrt ..gotpc 
-
-        ; the function body comes here 
-
-        mov     ebx,ebp-4 
-        mov     esp,ebp 
-        pop     ebp 
-        ret
-</pre>
-<p>(For BSD, again, the symbol <code>_GLOBAL_OFFSET_TABLE</code> requires a
-second leading underscore.)</p>
-<p>The first two lines of this function are simply the standard C prologue
-to set up a stack frame, and the last three lines are standard C function
-epilogue. The third line, and the fourth to last line, save and restore the
-<code>EBX</code> register, because PIC shared libraries use this register
-to store the address of the GOT.</p>
-<p>The interesting bit is the <code>CALL</code> instruction and the
-following two lines. The <code>CALL</code> and <code>POP</code> combination
-obtains the address of the label <code>.get_GOT</code>, without having to
-know in advance where the program was loaded (since the <code>CALL</code>
-instruction is encoded relative to the current position). The
-<code>ADD</code> instruction makes use of one of the special PIC relocation
-types: GOTPC relocation. With the <code>WRT ..gotpc</code> qualifier
-specified, the symbol referenced (here <code>_GLOBAL_OFFSET_TABLE_</code>,
-the special symbol assigned to the GOT) is given as an offset from the
-beginning of the section. (Actually, <code>ELF</code> encodes it as the
-offset from the operand field of the <code>ADD</code> instruction, but NASM
-simplifies this deliberately, so you do things the same way for both
-<code>ELF</code> and <code>BSD</code>.) So the instruction then
-<em>adds</em> the beginning of the section, to get the real address of the
-GOT, and subtracts the value of <code>.get_GOT</code> which it knows is in
-<code>EBX</code>. Therefore, by the time that instruction has finished,
-<code>EBX</code> contains the address of the GOT.</p>
-<p>If you didn't follow that, don't worry: it's never necessary to obtain
-the address of the GOT by any other means, so you can put those three
-instructions into a macro and safely ignore them:</p>
-<pre>
-%macro  get_GOT 0 
-
-        call    %%getgot 
-  %%getgot: 
-        pop     ebx 
-        add     ebx,_GLOBAL_OFFSET_TABLE_+$$-%%getgot wrt ..gotpc 
-
-%endmacro
-</pre>
-<h4 id="section-10.2.2">10.2.2 Finding Your Local Data Items</h4>
-<p>Having got the GOT, you can then use it to obtain the addresses of your
-data items. Most variables will reside in the sections you have declared;
-they can be accessed using the <code>..gotoff</code> special
-<code>WRT</code> type. The way this works is like this:</p>
-<pre>
-        lea     eax,ebx+myvar wrt ..gotoff
-</pre>
-<p>The expression <code>myvar wrt ..gotoff</code> is calculated, when the
-shared library is linked, to be the offset to the local variable
-<code>myvar</code> from the beginning of the GOT. Therefore, adding it to
-<code>EBX</code> as above will place the real address of <code>myvar</code>
-in <code>EAX</code>.</p>
-<p>If you declare variables as <code>GLOBAL</code> without specifying a
-size for them, they are shared between code modules in the library, but do
-not get exported from the library to the program that loaded it. They will
-still be in your ordinary data and BSS sections, so you can access them in
-the same way as local variables, using the above <code>..gotoff</code>
-mechanism.</p>
-<p>Note that due to a peculiarity of the way BSD <code>a.out</code> format
-handles this relocation type, there must be at least one non-local symbol
-in the same section as the address you're trying to access.</p>
-<h4 id="section-10.2.3">10.2.3 Finding External and Common Data Items</h4>
-<p>If your library needs to get at an external variable (external to the
-<em>library</em>, not just to one of the modules within it), you must use
-the <code>..got</code> type to get at it. The <code>..got</code> type,
-instead of giving you the offset from the GOT base to the variable, gives
-you the offset from the GOT base to a GOT <em>entry</em> containing the
-address of the variable. The linker will set up this GOT entry when it
-builds the library, and the dynamic linker will place the correct address
-in it at load time. So to obtain the address of an external variable
-<code>extvar</code> in <code>EAX</code>, you would code</p>
-<pre>
-        mov     eax,ebx+extvar wrt ..got
-</pre>
-<p>This loads the address of <code>extvar</code> out of an entry in the
-GOT. The linker, when it builds the shared library, collects together every
-relocation of type <code>..got</code>, and builds the GOT so as to ensure
-it has every necessary entry present.</p>
-<p>Common variables must also be accessed in this way.</p>
-<h4 id="section-10.2.4">10.2.4 Exporting Symbols to the Library User</h4>
-<p>If you want to export symbols to the user of the library, you have to
-declare whether they are functions or data, and if they are data, you have
-to give the size of the data item. This is because the dynamic linker has
-to build procedure linkage table entries for any exported functions, and
-also moves exported data items away from the library's data section in
-which they were declared.</p>
-<p>So to export a function to users of the library, you must use</p>
-<pre>
-global  func:function           ; declare it as a function 
-
-func:   push    ebp 
-
-        ; etc.
-</pre>
-<p>And to export a data item such as an array, you would have to code</p>
-<pre>
-global  array:data array.end-array      ; give the size too 
-
-array:  resd    128 
-.end:
-</pre>
-<p>Be careful: If you export a variable to the library user, by declaring
-it as <code>GLOBAL</code> and supplying a size, the variable will end up
-living in the data section of the main program, rather than in your
-library's data section, where you declared it. So you will have to access
-your own global variable with the <code>..got</code> mechanism rather than
-<code>..gotoff</code>, as if it were external (which, effectively, it has
-become).</p>
-<p>Equally, if you need to store the address of an exported global in one
-of your data sections, you can't do it by means of the standard sort of
-code:</p>
-<pre>
-dataptr:        dd      global_data_item        ; WRONG
-</pre>
-<p>NASM will interpret this code as an ordinary relocation, in which
-<code>global_data_item</code> is merely an offset from the beginning of the
-<code>.data</code> section (or whatever); so this reference will end up
-pointing at your data section instead of at the exported global which
-resides elsewhere.</p>
-<p>Instead of the above code, then, you must write</p>
-<pre>
-dataptr:        dd      global_data_item wrt ..sym
-</pre>
-<p>which makes use of the special <code>WRT</code> type <code>..sym</code>
-to instruct NASM to search the symbol table for a particular symbol at that
-address, rather than just relocating by section base.</p>
-<p>Either method will work for functions: referring to one of your
-functions by means of</p>
-<pre>
-funcptr:        dd      my_function
-</pre>
-<p>will give the user the address of the code you wrote, whereas</p>
-<pre>
-funcptr:        dd      my_function wrt ..sym
-</pre>
-<p>will give the address of the procedure linkage table for the function,
-which is where the calling program will <em>believe</em> the function
-lives. Either address is a valid way to call the function.</p>
-<h4 id="section-10.2.5">10.2.5 Calling Procedures Outside the Library</h4>
-<p>Calling procedures outside your shared library has to be done by means
-of a <em>procedure linkage table</em>, or PLT. The PLT is placed at a known
-offset from where the library is loaded, so the library code can make calls
-to the PLT in a position-independent way. Within the PLT there is code to
-jump to offsets contained in the GOT, so function calls to other shared
-libraries or to routines in the main program can be transparently passed
-off to their real destinations.</p>
-<p>To call an external routine, you must use another special PIC relocation
-type, <code>WRT ..plt</code>. This is much easier than the GOT-based ones:
-you simply replace calls such as <code>CALL printf</code> with the
-PLT-relative version <code>CALL printf WRT ..plt</code>.</p>
-<h4 id="section-10.2.6">10.2.6 Generating the Library File</h4>
-<p>Having written some code modules and assembled them to <code>.o</code>
-files, you then generate your shared library with a command such as</p>
-<pre>
-ld -shared -o library.so module1.o module2.o       # for ELF 
-ld -Bshareable -o library.so module1.o module2.o   # for BSD
-</pre>
-<p>For ELF, if your shared library is going to reside in system directories
-such as <code>/usr/lib</code> or <code>/lib</code>, it is usually worth
-using the <code>-soname</code> flag to the linker, to store the final
-library file name, with a version number, into the library:</p>
-<pre>
-ld -shared -soname library.so.1 -o library.so.1.2 *.o
-</pre>
-<p>You would then copy <code>library.so.1.2</code> into the library
-directory, and create <code>library.so.1</code> as a symbolic link to it.</p>
-</div>
-</body>
-</html>

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-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<meta charset="UTF-8" />
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-<h1>NASM - The Netwide Assembler</h1>
-<span class="subtitle">version 2.16.01</span>
-</div>
-<div class="contents"
->
-<h2 id="chapter-11">Chapter 11: Mixing 16- and 32-bit Code</h2>
-<p>This chapter tries to cover some of the issues, largely related to
-unusual forms of addressing and jump instructions, encountered when writing
-operating system code such as protected-mode initialization routines, which
-require code that operates in mixed segment sizes, such as code in a 16-bit
-segment trying to modify data in a 32-bit one, or jumps between
-different-size segments.</p>
-<h3 id="section-11.1">11.1 Mixed-Size Jumps</h3>
-<p>The most common form of mixed-size instruction is the one used when
-writing a 32-bit OS: having done your setup in 16-bit mode, such as loading
-the kernel, you then have to boot it by switching into protected mode and
-jumping to the 32-bit kernel start address. In a fully 32-bit OS, this
-tends to be the <em>only</em> mixed-size instruction you need, since
-everything before it can be done in pure 16-bit code, and everything after
-it can be pure 32-bit.</p>
-<p>This jump must specify a 48-bit far address, since the target segment is
-a 32-bit one. However, it must be assembled in a 16-bit segment, so just
-coding, for example,</p>
-<pre>
-        jmp     0x1234:0x56789ABC       ; wrong!
-</pre>
-<p>will not work, since the offset part of the address will be truncated to
-<code>0x9ABC</code> and the jump will be an ordinary 16-bit far one.</p>
-<p>The Linux kernel setup code gets round the inability of
-<code>as86</code> to generate the required instruction by coding it
-manually, using <code>DB</code> instructions. NASM can go one better than
-that, by actually generating the right instruction itself. Here's how to do
-it right:</p>
-<pre>
-        jmp     dword 0x1234:0x56789ABC         ; right
-</pre>
-<p>The <code>DWORD</code> prefix (strictly speaking, it should come
-<em>after</em> the colon, since it is declaring the <em>offset</em> field
-to be a doubleword; but NASM will accept either form, since both are
-unambiguous) forces the offset part to be treated as far, in the assumption
-that you are deliberately writing a jump from a 16-bit segment to a 32-bit
-one.</p>
-<p>You can do the reverse operation, jumping from a 32-bit segment to a
-16-bit one, by means of the <code>WORD</code> prefix:</p>
-<pre>
-        jmp     word 0x8765:0x4321      ; 32 to 16 bit
-</pre>
-<p>If the <code>WORD</code> prefix is specified in 16-bit mode, or the
-<code>DWORD</code> prefix in 32-bit mode, they will be ignored, since each
-is explicitly forcing NASM into a mode it was in anyway.</p>
-<h3 id="section-11.2">11.2 Addressing Between Different-Size Segments</h3>
-<p>If your OS is mixed 16 and 32-bit, or if you are writing a DOS extender,
-you are likely to have to deal with some 16-bit segments and some 32-bit
-ones. At some point, you will probably end up writing code in a 16-bit
-segment which has to access data in a 32-bit segment, or vice versa.</p>
-<p>If the data you are trying to access in a 32-bit segment lies within the
-first 64K of the segment, you may be able to get away with using an
-ordinary 16-bit addressing operation for the purpose; but sooner or later,
-you will want to do 32-bit addressing from 16-bit mode.</p>
-<p>The easiest way to do this is to make sure you use a register for the
-address, since any effective address containing a 32-bit register is forced
-to be a 32-bit address. So you can do</p>
-<pre>
-        mov     eax,offset_into_32_bit_segment_specified_by_fs 
-        mov     dword fs:eax,0x11223344
-</pre>
-<p>This is fine, but slightly cumbersome (since it wastes an instruction
-and a register) if you already know the precise offset you are aiming at.
-The x86 architecture does allow 32-bit effective addresses to specify
-nothing but a 4-byte offset, so why shouldn't NASM be able to generate the
-best instruction for the purpose?</p>
-<p>It can. As in <a href="#section-11.1">section 11.1</a>, you need only
-prefix the address with the <code>DWORD</code> keyword, and it will be
-forced to be a 32-bit address:</p>
-<pre>
-        mov     dword fs:dword my_offset,0x11223344
-</pre>
-<p>Also as in <a href="#section-11.1">section 11.1</a>, NASM is not fussy
-about whether the <code>DWORD</code> prefix comes before or after the
-segment override, so arguably a nicer-looking way to code the above
-instruction is</p>
-<pre>
-        mov     dword dword fs:my_offset,0x11223344
-</pre>
-<p>Don't confuse the <code>DWORD</code> prefix <em>outside</em> the square
-brackets, which controls the size of the data stored at the address, with
-the one <code>inside</code> the square brackets which controls the length
-of the address itself. The two can quite easily be different:</p>
-<pre>
-        mov     word dword 0x12345678,0x9ABC
-</pre>
-<p>This moves 16 bits of data to an address specified by a 32-bit offset.</p>
-<p>You can also specify <code>WORD</code> or <code>DWORD</code> prefixes
-along with the <code>FAR</code> prefix to indirect far jumps or calls. For
-example:</p>
-<pre>
-        call    dword far fs:word 0x4321
-</pre>
-<p>This instruction contains an address specified by a 16-bit offset; it
-loads a 48-bit far pointer from that (16-bit segment and 32-bit offset),
-and calls that address.</p>
-<h3 id="section-11.3">11.3 Other Mixed-Size Instructions</h3>
-<p>The other way you might want to access data might be using the string
-instructions (<code>LODSx</code>, <code>STOSx</code> and so on) or the
-<code>XLATB</code> instruction. These instructions, since they take no
-parameters, might seem to have no easy way to make them perform 32-bit
-addressing when assembled in a 16-bit segment.</p>
-<p>This is the purpose of NASM's <code>a16</code>, <code>a32</code> and
-<code>a64</code> prefixes. If you are coding <code>LODSB</code> in a 16-bit
-segment but it is supposed to be accessing a string in a 32-bit segment,
-you should load the desired address into <code>ESI</code> and then code</p>
-<pre>
-        a32     lodsb
-</pre>
-<p>The prefix forces the addressing size to 32 bits, meaning that
-<code>LODSB</code> loads from <code>DS:ESI</code> instead of
-<code>DS:SI</code>. To access a string in a 16-bit segment when coding in
-a 32-bit one, the corresponding <code>a16</code> prefix can be used.</p>
-<p>The <code>a16</code>, <code>a32</code> and <code>a64</code> prefixes can
-be applied to any instruction in NASM's instruction table, but most of them
-can generate all the useful forms without them. The prefixes are necessary
-only for instructions with implicit addressing: <code>CMPSx</code>,
-<code>SCASx</code>, <code>LODSx</code>, <code>STOSx</code>,
-<code>MOVSx</code>, <code>INSx</code>, <code>OUTSx</code>, and
-<code>XLATB</code>. Also, the various push and pop instructions
-(<code>PUSHA</code> and <code>POPF</code> as well as the more usual
-<code>PUSH</code> and <code>POP</code>) can accept <code>a16</code>,
-<code>a32</code> or <code>a64</code> prefixes to force a particular one of
-<code>SP</code>, <code>ESP</code> or <code>RSP</code> to be used as a stack
-pointer, in case the stack segment in use is a different size from the code
-segment.</p>
-<p><code>PUSH</code> and <code>POP</code>, when applied to segment
-registers in 32-bit mode, also have the slightly odd behaviour that they
-push and pop 4 bytes at a time, of which the top two are ignored and the
-bottom two give the value of the segment register being manipulated. To
-force the 16-bit behaviour of segment-register push and pop instructions,
-you can use the operand-size prefix <code>o16</code>:</p>
-<pre>
-        o16 push    ss 
-        o16 push    ds
-</pre>
-<p>This code saves a doubleword of stack space by fitting two segment
-registers into the space which would normally be consumed by pushing one.</p>
-<p>(You can also use the <code>o32</code> prefix to force the 32-bit
-behaviour when in 16-bit mode, but this seems less useful.)</p>
-</div>
-</body>
-</html>

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-</ul>
-<div class="title">
-<h1>NASM - The Netwide Assembler</h1>
-<span class="subtitle">version 2.16.01</span>
-</div>
-<div class="contents"
->
-<h2 id="chapter-12">Chapter 12: Writing 64-bit Code (Unix, Win64)</h2>
-<p>This chapter attempts to cover some of the common issues involved when
-writing 64-bit code, to run under Win64 or Unix. It covers how to write
-assembly code to interface with 64-bit C routines, and how to write
-position-independent code for shared libraries.</p>
-<p>All 64-bit code uses a flat memory model, since segmentation is not
-available in 64-bit mode. The one exception is the <code>FS</code> and
-<code>GS</code> registers, which still add their bases.</p>
-<p>Position independence in 64-bit mode is significantly simpler, since the
-processor supports <code>RIP</code>&ndash;relative addressing directly; see
-the <code>REL</code> keyword (<a href="nasmdoc3.html#section-3.3">section
-3.3</a>). On most 64-bit platforms, it is probably desirable to make that
-the default, using the directive <code>DEFAULT REL</code>
-(<a href="nasmdoc7.html#section-7.2">section 7.2</a>).</p>
-<p>64-bit programming is relatively similar to 32-bit programming, but of
-course pointers are 64 bits long; additionally, all existing platforms pass
-arguments in registers rather than on the stack. Furthermore, 64-bit
-platforms use SSE2 by default for floating point. Please see the ABI
-documentation for your platform.</p>
-<p>64-bit platforms differ in the sizes of the C/C++ fundamental datatypes,
-not just from 32-bit platforms but from each other. If a specific size data
-type is desired, it is probably best to use the types defined in the
-standard C header <code>&lt;inttypes.h&gt;</code>.</p>
-<p>All known 64-bit platforms except some embedded platforms require that
-the stack is 16-byte aligned at the entry to a function. In order to
-enforce that, the stack pointer (<code>RSP</code>) needs to be aligned on
-an <code>odd</code> multiple of 8 bytes before the <code>CALL</code>
-instruction.</p>
-<p>In 64-bit mode, the default instruction size is still 32 bits. When
-loading a value into a 32-bit register (but not an 8- or 16-bit register),
-the upper 32 bits of the corresponding 64-bit register are set to zero.</p>
-<h3 id="section-12.1">12.1 Register Names in 64-bit Mode</h3>
-<p>NASM uses the following names for general-purpose registers in 64-bit
-mode, for 8-, 16-, 32- and 64-bit references, respectively:</p>
-<pre>
-     AL/AH, CL/CH, DL/DH, BL/BH, SPL, BPL, SIL, DIL, R8B-R15B 
-     AX, CX, DX, BX, SP, BP, SI, DI, R8W-R15W 
-     EAX, ECX, EDX, EBX, ESP, EBP, ESI, EDI, R8D-R15D 
-     RAX, RCX, RDX, RBX, RSP, RBP, RSI, RDI, R8-R15
-</pre>
-<p>This is consistent with the AMD documentation and most other assemblers.
-The Intel documentation, however, uses the names <code>R8L-R15L</code> for
-8-bit references to the higher registers. It is possible to use those names
-by definiting them as macros; similarly, if one wants to use numeric names
-for the low 8 registers, define them as macros. The standard macro package
-<code>altreg</code> (see <a href="nasmdoc6.html#section-6.1">section
-6.1</a>) can be used for this purpose.</p>
-<h3 id="section-12.2">12.2 Immediates and Displacements in 64-bit Mode</h3>
-<p>In 64-bit mode, immediates and displacements are generally only 32 bits
-wide. NASM will therefore truncate most displacements and immediates to 32
-bits.</p>
-<p>The only instruction which takes a full 64-bit immediate is:</p>
-<pre>
-     MOV reg64,imm64
-</pre>
-<p>NASM will produce this instruction whenever the programmer uses
-<code>MOV</code> with an immediate into a 64-bit register. If this is not
-desirable, simply specify the equivalent 32-bit register, which will be
-automatically zero-extended by the processor, or specify the immediate as
-<code>DWORD</code>:</p>
-<pre>
-     mov rax,foo             ; 64-bit immediate 
-     mov rax,qword foo       ; (identical) 
-     mov eax,foo             ; 32-bit immediate, zero-extended 
-     mov rax,dword foo       ; 32-bit immediate, sign-extended
-</pre>
-<p>The length of these instructions are 10, 5 and 7 bytes, respectively.</p>
-<p>If optimization is enabled and NASM can determine at assembly time that
-a shorter instruction will suffice, the shorter instruction will be emitted
-unless of course <code>STRICT QWORD</code> or <code>STRICT DWORD</code> is
-specified (see <a href="nasmdoc3.html#section-3.7">section 3.7</a>):</p>
-<pre>
-     mov rax,1               ; Assembles as "mov eax,1" (5 bytes) 
-     mov rax,strict qword 1  ; Full 10-byte instruction 
-     mov rax,strict dword 1  ; 7-byte instruction 
-     mov rax,symbol          ; 10 bytes, not known at assembly time 
-     lea rax,rel symbol    ; 7 bytes, usually preferred by the ABI
-</pre>
-<p>Note that <code>lea rax,rel symbol</code> is position-independent,
-whereas <code>mov rax,symbol</code> is not. Most ABIs prefer or even
-require position-independent code in 64-bit mode. However, the
-<code>MOV</code> instruction is able to reference a symbol anywhere in the
-64-bit address space, whereas <code>LEA</code> is only able to access a
-symbol within within 2 GB of the instruction itself (see below.)</p>
-<p>The only instructions which take a full 64-bit <em>displacement</em> is
-loading or storing, using <code>MOV</code>, <code>AL</code>,
-<code>AX</code>, <code>EAX</code> or <code>RAX</code> (but no other
-registers) to an absolute 64-bit address. Since this is a relatively rarely
-used instruction (64-bit code generally uses relative addressing), the
-programmer has to explicitly declare the displacement size as
-<code>ABS QWORD</code>:</p>
-<pre>
-     default abs 
-
-     mov eax,foo           ; 32-bit absolute disp, sign-extended 
-     mov eax,a32 foo       ; 32-bit absolute disp, zero-extended 
-     mov eax,qword foo     ; 64-bit absolute disp 
-
-     default rel 
-
-     mov eax,foo           ; 32-bit relative disp 
-     mov eax,a32 foo       ; d:o, address truncated to 32 bits(!) 
-     mov eax,qword foo     ; error 
-     mov eax,abs qword foo ; 64-bit absolute disp
-</pre>
-<p>A sign-extended absolute displacement can access from &ndash;2 GB to +2
-GB; a zero-extended absolute displacement can access from 0 to 4 GB.</p>
-<h3 id="section-12.3">12.3 Interfacing to 64-bit C Programs (Unix)</h3>
-<p>On Unix, the 64-bit ABI as well as the x32 ABI (32-bit ABI with the CPU
-in 64-bit mode) is defined by the documents at:</p>
-<p>
-<a href="http://www.nasm.us/abi/unix64"><code>http://www.nasm.us/abi/unix64</code></a></p>
-<p>Although written for AT&amp;T-syntax assembly, the concepts apply
-equally well for NASM-style assembly. What follows is a simplified summary.</p>
-<p>The first six integer arguments (from the left) are passed in
-<code>RDI</code>, <code>RSI</code>, <code>RDX</code>, <code>RCX</code>,
-<code>R8</code>, and <code>R9</code>, in that order. Additional integer
-arguments are passed on the stack. These registers, plus <code>RAX</code>,
-<code>R10</code> and <code>R11</code> are destroyed by function calls, and
-thus are available for use by the function without saving.</p>
-<p>Integer return values are passed in <code>RAX</code> and
-<code>RDX</code>, in that order.</p>
-<p>Floating point is done using SSE registers, except for
-<code>long double</code>, which is 80 bits (<code>TWORD</code>) on most
-platforms (Android is one exception; there <code>long double</code> is 64
-bits and treated the same as <code>double</code>.) Floating-point arguments
-are passed in <code>XMM0</code> to <code>XMM7</code>; return is
-<code>XMM0</code> and <code>XMM1</code>. <code>long double</code> are
-passed on the stack, and returned in <code>ST0</code> and <code>ST1</code>.</p>
-<p>All SSE and x87 registers are destroyed by function calls.</p>
-<p>On 64-bit Unix, <code>long</code> is 64 bits.</p>
-<p>Integer and SSE register arguments are counted separately, so for the
-case of</p>
-<pre>
-     void foo(long a, double b, int c)
-</pre>
-<p><code>a</code> is passed in <code>RDI</code>, <code>b</code> in
-<code>XMM0</code>, and <code>c</code> in <code>ESI</code>.</p>
-<h3 id="section-12.4">12.4 Interfacing to 64-bit C Programs (Win64)</h3>
-<p>The Win64 ABI is described by the document at:</p>
-<p>
-<a href="http://www.nasm.us/abi/win64"><code>http://www.nasm.us/abi/win64</code></a></p>
-<p>What follows is a simplified summary.</p>
-<p>The first four integer arguments are passed in <code>RCX</code>,
-<code>RDX</code>, <code>R8</code> and <code>R9</code>, in that order.
-Additional integer arguments are passed on the stack. These registers, plus
-<code>RAX</code>, <code>R10</code> and <code>R11</code> are destroyed by
-function calls, and thus are available for use by the function without
-saving.</p>
-<p>Integer return values are passed in <code>RAX</code> only.</p>
-<p>Floating point is done using SSE registers, except for
-<code>long double</code>. Floating-point arguments are passed in
-<code>XMM0</code> to <code>XMM3</code>; return is <code>XMM0</code> only.</p>
-<p>On Win64, <code>long</code> is 32 bits; <code>long long</code> or
-<code>_int64</code> is 64 bits.</p>
-<p>Integer and SSE register arguments are counted together, so for the case
-of</p>
-<pre>
-     void foo(long long a, double b, int c)
-</pre>
-<p><code>a</code> is passed in <code>RCX</code>, <code>b</code> in
-<code>XMM1</code>, and <code>c</code> in <code>R8D</code>.</p>
-</div>
-</body>
-</html>

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-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.1//EN" "http://www.w3.org/TR/xhtml11/DTD/xhtml11.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<meta charset="UTF-8" />
-<title>NASM - The Netwide Assembler</title>
-<link href="nasmdoc.css" rel="stylesheet" type="text/css" />
-<link href="local.css" rel="stylesheet" type="text/css" />
-</head>
-<body>
-<ul class="navbar">
-<li class="first"><a class="prev" href="nasmdo12.html">Chapter 12</a></li>
-<li><a class="next" href="nasmdoca.html">Appendix A</a></li>
-<li><a class="toc" href="nasmdoc0.html">Contents</a></li>
-<li class="last"><a class="index" href="nasmdoci.html">Index</a></li>
-</ul>
-<div class="title">
-<h1>NASM - The Netwide Assembler</h1>
-<span class="subtitle">version 2.16.01</span>
-</div>
-<div class="contents"
->
-<h2 id="chapter-13">Chapter 13: Troubleshooting</h2>
-<p>This chapter describes some of the common problems that users have been
-known to encounter with NASM, and answers them. If you think you have found
-a bug in NASM, please see <a href="nasmdoce.html#section-E.2">section
-E.2</a>.</p>
-<h3 id="section-13.1">13.1 Common Problems</h3>
-<h4 id="section-13.1.1">13.1.1 NASM Generates Inefficient Code</h4>
-<p>We sometimes get `bug' reports about NASM generating inefficient, or
-even `wrong', code on instructions such as <code>ADD ESP,8</code>. This is
-a deliberate design feature, connected to predictability of output: NASM,
-on seeing <code>ADD ESP,8</code>, will generate the form of the instruction
-which leaves room for a 32-bit offset. You need to code
-<code>ADD ESP,BYTE 8</code> if you want the space-efficient form of the
-instruction. This isn't a bug, it's user error: if you prefer to have NASM
-produce the more efficient code automatically enable optimization with the
-<code>-O</code> option (see <a href="nasmdoc2.html#section-2.1.24">section
-2.1.24</a>).</p>
-<h4 id="section-13.1.2">13.1.2 My Jumps are Out of Range</h4>
-<p>Similarly, people complain that when they issue conditional jumps (which
-are <code>SHORT</code> by default) that try to jump too far, NASM reports
-`short jump out of range' instead of making the jumps longer.</p>
-<p>This, again, is partly a predictability issue, but in fact has a more
-practical reason as well. NASM has no means of being told what type of
-processor the code it is generating will be run on; so it cannot decide for
-itself that it should generate <code>Jcc NEAR</code> type instructions,
-because it doesn't know that it's working for a 386 or above.
-Alternatively, it could replace the out-of-range short <code>JNE</code>
-instruction with a very short <code>JE</code> instruction that jumps over a
-<code>JMP NEAR</code>; this is a sensible solution for processors below a
-386, but hardly efficient on processors which have good branch prediction
-<em>and</em> could have used <code>JNE NEAR</code> instead. So, once again,
-it's up to the user, not the assembler, to decide what instructions should
-be generated. See <a href="nasmdoc2.html#section-2.1.24">section
-2.1.24</a>.</p>
-<h4 id="section-13.1.3">13.1.3 <code>ORG</code> Doesn't Work</h4>
-<p>People writing boot sector programs in the <code>bin</code> format often
-complain that <code>ORG</code> doesn't work the way they'd like: in order
-to place the <code>0xAA55</code> signature word at the end of a 512-byte
-boot sector, people who are used to MASM tend to code</p>
-<pre>
-        ORG 0 
-
-        ; some boot sector code 
-
-        ORG 510 
-        DW 0xAA55
-</pre>
-<p>This is not the intended use of the <code>ORG</code> directive in NASM,
-and will not work. The correct way to solve this problem in NASM is to use
-the <code>TIMES</code> directive, like this:</p>
-<pre>
-        ORG 0 
-
-        ; some boot sector code 
-
-        TIMES 510-($-$$) DB 0 
-        DW 0xAA55
-</pre>
-<p>The <code>TIMES</code> directive will insert exactly enough zero bytes
-into the output to move the assembly point up to 510. This method also has
-the advantage that if you accidentally fill your boot sector too full, NASM
-will catch the problem at assembly time and report it, so you won't end up
-with a boot sector that you have to disassemble to find out what's wrong
-with it.</p>
-<h4 id="section-13.1.4">13.1.4 <code>TIMES</code> Doesn't Work</h4>
-<p>The other common problem with the above code is people who write the
-<code>TIMES</code> line as</p>
-<pre>
-        TIMES 510-$ DB 0
-</pre>
-<p>by reasoning that <code>$</code> should be a pure number, just like 510,
-so the difference between them is also a pure number and can happily be fed
-to <code>TIMES</code>.</p>
-<p>NASM is a <em>modular</em> assembler: the various component parts are
-designed to be easily separable for re-use, so they don't exchange
-information unnecessarily. In consequence, the <code>bin</code> output
-format, even though it has been told by the <code>ORG</code> directive that
-the <code>.text</code> section should start at 0, does not pass that
-information back to the expression evaluator. So from the evaluator's point
-of view, <code>$</code> isn't a pure number: it's an offset from a section
-base. Therefore the difference between <code>$</code> and 510 is also not a
-pure number, but involves a section base. Values involving section bases
-cannot be passed as arguments to <code>TIMES</code>.</p>
-<p>The solution, as in the previous section, is to code the
-<code>TIMES</code> line in the form</p>
-<pre>
-        TIMES 510-($-$$) DB 0
-</pre>
-<p>in which <code>$</code> and <code>$$</code> are offsets from the same
-section base, and so their difference is a pure number. This will solve the
-problem and generate sensible code.</p>
-</div>
-</body>
-</html>

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-	color: #f33;
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-
-    /* Trick to avoid the navbar hiding the the target of an # link */
-    :target {
-	margin-top: -10vh;
-	padding-top: 10vh;
-	background: #ffa;	/* Highlight the jump target */
-	background-clip: content-box;
-    }
-
-    ul.navbar {
-	display: block;
-	position: sticky;
-	top: 8px;
-	width: 100%;
-	margin: 0;
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-	white-space: nowrap;
-	list-style-type: none;
-	background: #336 url("nasmlogw.png") no-repeat right center;
-	background-size: contain;
-    }
-
-    ul.navbar li {
-	float: left;
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-}

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@@ -1,1720 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.1//EN" "http://www.w3.org/TR/xhtml11/DTD/xhtml11.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<meta charset="UTF-8" />
-<title>NASM - The Netwide Assembler</title>
-<link href="nasmdoc.css" rel="stylesheet" type="text/css" />
-<link href="local.css" rel="stylesheet" type="text/css" />
-</head>
-<body>
-<ul class="navbar">
-<li><a class="next" href="nasmdoc1.html">Chapter 1</a></li>
-<li><a class="toc" href="nasmdoc0.html">Contents</a></li>
-<li class="last"><a class="index" href="nasmdoci.html">Index</a></li>
-</ul>
-<div class="title">
-<h1>NASM - The Netwide Assembler</h1>
-<span class="subtitle">version 2.16.01</span>
-</div>
-<div class="contents"
->
-<p>This manual documents NASM, the Netwide Assembler: an assembler
-targeting the Intel x86 series of processors, with portable source.
-</p><div class="toc">
-<ol class="toc1">
-<li class="toc1">
-<span class="node">Chapter 1: </span><a href="nasmdoc1.html">Introduction</a>
-<ol class="toc2">
-<li class="toc2">
-<span class="node">Section 1.1: </span><a href="nasmdoc1.html#section-1.1">What Is NASM?</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 1.1.1: </span><a href="nasmdoc1.html#section-1.1.1">License</a>
-</li>
-</ol>
-</li>
-</ol>
-</li>
-<li class="toc1">
-<span class="node">Chapter 2: </span><a href="nasmdoc2.html">Running NASM</a>
-<ol class="toc2">
-<li class="toc2">
-<span class="node">Section 2.1: </span><a href="nasmdoc2.html#section-2.1">NASM Command-Line Syntax</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 2.1.1: </span><a href="nasmdoc2.html#section-2.1.1">The <code>-o</code> Option: Specifying the Output File Name</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.2: </span><a href="nasmdoc2.html#section-2.1.2">The <code>-f</code> Option: Specifying the Output File Format</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.3: </span><a href="nasmdoc2.html#section-2.1.3">The <code>-l</code> Option: Generating a Listing File</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.4: </span><a href="nasmdoc2.html#section-2.1.4">The <code>-L</code> Option: Additional or Modified Listing Info</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.5: </span><a href="nasmdoc2.html#section-2.1.5">The <code>-M</code> Option: Generate Makefile Dependencies</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.6: </span><a href="nasmdoc2.html#section-2.1.6">The <code>-MG</code> Option: Generate Makefile Dependencies</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.7: </span><a href="nasmdoc2.html#section-2.1.7">The <code>-MF</code> Option: Set Makefile Dependency File</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.8: </span><a href="nasmdoc2.html#section-2.1.8">The <code>-MD</code> Option: Assemble and Generate Dependencies</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.9: </span><a href="nasmdoc2.html#section-2.1.9">The <code>-MT</code> Option: Dependency Target Name</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.10: </span><a href="nasmdoc2.html#section-2.1.10">The <code>-MQ</code> Option: Dependency Target Name (Quoted)</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.11: </span><a href="nasmdoc2.html#section-2.1.11">The <code>-MP</code> Option: Emit phony targets</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.12: </span><a href="nasmdoc2.html#section-2.1.12">The <code>-MW</code> Option: Watcom Make quoting style</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.13: </span><a href="nasmdoc2.html#section-2.1.13">The <code>-F</code> Option: Selecting a Debug Information Format</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.14: </span><a href="nasmdoc2.html#section-2.1.14">The <code>-g</code> Option: Enabling Debug Information.</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.15: </span><a href="nasmdoc2.html#section-2.1.15">The <code>-X</code> Option: Selecting an Error Reporting Format</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.16: </span><a href="nasmdoc2.html#section-2.1.16">The <code>-Z</code> Option: Send Errors to a File</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.17: </span><a href="nasmdoc2.html#section-2.1.17">The <code>-s</code> Option: Send Errors to <code>stdout</code></a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.18: </span><a href="nasmdoc2.html#section-2.1.18">The <code>-i</code> Option: Include File Search Directories</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.19: </span><a href="nasmdoc2.html#section-2.1.19">The <code>-p</code> Option: Pre-Include a File</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.20: </span><a href="nasmdoc2.html#section-2.1.20">The <code>-d</code> Option: Pre-Define a Macro</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.21: </span><a href="nasmdoc2.html#section-2.1.21">The <code>-u</code> Option: Undefine a Macro</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.22: </span><a href="nasmdoc2.html#section-2.1.22">The <code>-E</code> Option: Preprocess Only</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.23: </span><a href="nasmdoc2.html#section-2.1.23">The <code>-a</code> Option: Don't Preprocess At All</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.24: </span><a href="nasmdoc2.html#section-2.1.24">The <code>-O</code> Option: Specifying Multipass Optimization</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.25: </span><a href="nasmdoc2.html#section-2.1.25">The <code>-t</code> Option: Enable TASM Compatibility Mode</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.26: </span><a href="nasmdoc2.html#section-2.1.26">The <code>-w</code> and <code>-W</code> Options: Enable or Disable Assembly Warnings</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.27: </span><a href="nasmdoc2.html#section-2.1.27">The <code>-v</code> Option: Display Version Info</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.28: </span><a href="nasmdoc2.html#section-2.1.28">The <code>--(g|l)prefix</code>, <code>--(g|l)postfix</code> Options.</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.29: </span><a href="nasmdoc2.html#section-2.1.29">The <code>--pragma</code> Option</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.30: </span><a href="nasmdoc2.html#section-2.1.30">The <code>--before</code> Option</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.31: </span><a href="nasmdoc2.html#section-2.1.31">The <code>--limit-X</code> Option</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.32: </span><a href="nasmdoc2.html#section-2.1.32">The <code>--keep-all</code> Option</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.33: </span><a href="nasmdoc2.html#section-2.1.33">The <code>--no-line</code> Option</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.34: </span><a href="nasmdoc2.html#section-2.1.34">The <code>--reproducible</code> Option</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.1.35: </span><a href="nasmdoc2.html#section-2.1.35">The <code>NASMENV</code> Environment Variable</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 2.2: </span><a href="nasmdoc2.html#section-2.2">Quick Start for MASM Users</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 2.2.1: </span><a href="nasmdoc2.html#section-2.2.1">NASM Is Case-Sensitive</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.2.2: </span><a href="nasmdoc2.html#section-2.2.2">NASM Requires Square Brackets For Memory References</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.2.3: </span><a href="nasmdoc2.html#section-2.2.3">NASM Doesn't Store Variable Types</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.2.4: </span><a href="nasmdoc2.html#section-2.2.4">NASM Doesn't <code>ASSUME</code></a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.2.5: </span><a href="nasmdoc2.html#section-2.2.5">NASM Doesn't Support Memory Models</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.2.6: </span><a href="nasmdoc2.html#section-2.2.6">Floating-Point Differences</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.2.7: </span><a href="nasmdoc2.html#section-2.2.7">Other Differences</a>
-</li>
-<li class="toc3">
-<span class="node">Section 2.2.8: </span><a href="nasmdoc2.html#section-2.2.8">MASM compatibility package</a>
-</li>
-</ol>
-</li>
-</ol>
-</li>
-<li class="toc1">
-<span class="node">Chapter 3: </span><a href="nasmdoc3.html">The NASM Language</a>
-<ol class="toc2">
-<li class="toc2">
-<span class="node">Section 3.1: </span><a href="nasmdoc3.html#section-3.1">Layout of a NASM Source Line</a>
-</li>
-<li class="toc2">
-<span class="node">Section 3.2: </span><a href="nasmdoc3.html#section-3.2">Pseudo-Instructions</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 3.2.1: </span><a href="nasmdoc3.html#section-3.2.1"><code>Dx</code>: Declaring Initialized Data</a>
-</li>
-<li class="toc3">
-<span class="node">Section 3.2.2: </span><a href="nasmdoc3.html#section-3.2.2"><code>RESB</code> and Friends: Declaring Uninitialized Data</a>
-</li>
-<li class="toc3">
-<span class="node">Section 3.2.3: </span><a href="nasmdoc3.html#section-3.2.3"><code>INCBIN</code>: Including External Binary Files</a>
-</li>
-<li class="toc3">
-<span class="node">Section 3.2.4: </span><a href="nasmdoc3.html#section-3.2.4"><code>EQU</code>: Defining Constants</a>
-</li>
-<li class="toc3">
-<span class="node">Section 3.2.5: </span><a href="nasmdoc3.html#section-3.2.5"><code>TIMES</code>: Repeating Instructions or Data</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 3.3: </span><a href="nasmdoc3.html#section-3.3">Effective Addresses</a>
-</li>
-<li class="toc2">
-<span class="node">Section 3.4: </span><a href="nasmdoc3.html#section-3.4">Constants</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 3.4.1: </span><a href="nasmdoc3.html#section-3.4.1">Numeric Constants</a>
-</li>
-<li class="toc3">
-<span class="node">Section 3.4.2: </span><a href="nasmdoc3.html#section-3.4.2">Character Strings</a>
-</li>
-<li class="toc3">
-<span class="node">Section 3.4.3: </span><a href="nasmdoc3.html#section-3.4.3">Character Constants</a>
-</li>
-<li class="toc3">
-<span class="node">Section 3.4.4: </span><a href="nasmdoc3.html#section-3.4.4">String Constants</a>
-</li>
-<li class="toc3">
-<span class="node">Section 3.4.5: </span><a href="nasmdoc3.html#section-3.4.5">Unicode Strings</a>
-</li>
-<li class="toc3">
-<span class="node">Section 3.4.6: </span><a href="nasmdoc3.html#section-3.4.6">Floating-Point Constants</a>
-</li>
-<li class="toc3">
-<span class="node">Section 3.4.7: </span><a href="nasmdoc3.html#section-3.4.7">Packed BCD Constants</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 3.5: </span><a href="nasmdoc3.html#section-3.5">Expressions</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 3.5.1: </span><a href="nasmdoc3.html#section-3.5.1"><code>?</code> ... <code>:</code>: Conditional Operator</a>
-</li>
-<li class="toc3">
-<span class="node">Section 3.5.2: </span><a href="nasmdoc3.html#section-3.5.2">: <code>||</code>: Boolean OR Operator</a>
-</li>
-<li class="toc3">
-<span class="node">Section 3.5.3: </span><a href="nasmdoc3.html#section-3.5.3">: <code>^^</code>: Boolean XOR Operator</a>
-</li>
-<li class="toc3">
-<span class="node">Section 3.5.4: </span><a href="nasmdoc3.html#section-3.5.4">: <code>&amp;&amp;</code>: Boolean AND Operator</a>
-</li>
-<li class="toc3">
-<span class="node">Section 3.5.5: </span><a href="nasmdoc3.html#section-3.5.5">: Comparison Operators</a>
-</li>
-<li class="toc3">
-<span class="node">Section 3.5.6: </span><a href="nasmdoc3.html#section-3.5.6"><code>|</code>: Bitwise OR Operator</a>
-</li>
-<li class="toc3">
-<span class="node">Section 3.5.7: </span><a href="nasmdoc3.html#section-3.5.7"><code>^</code>: Bitwise XOR Operator</a>
-</li>
-<li class="toc3">
-<span class="node">Section 3.5.8: </span><a href="nasmdoc3.html#section-3.5.8"><code>&amp;</code>: Bitwise AND Operator</a>
-</li>
-<li class="toc3">
-<span class="node">Section 3.5.9: </span><a href="nasmdoc3.html#section-3.5.9">Bit Shift Operators</a>
-</li>
-<li class="toc3">
-<span class="node">Section 3.5.10: </span><a href="nasmdoc3.html#section-3.5.10"><code>+</code> and <code>-</code>: Addition and Subtraction Operators</a>
-</li>
-<li class="toc3">
-<span class="node">Section 3.5.11: </span><a href="nasmdoc3.html#section-3.5.11">Multiplication, Division and Modulo</a>
-</li>
-<li class="toc3">
-<span class="node">Section 3.5.12: </span><a href="nasmdoc3.html#section-3.5.12">Unary Operators</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 3.6: </span><a href="nasmdoc3.html#section-3.6"><code>SEG</code> and <code>WRT</code></a>
-</li>
-<li class="toc2">
-<span class="node">Section 3.7: </span><a href="nasmdoc3.html#section-3.7"><code>STRICT</code>: Inhibiting Optimization</a>
-</li>
-<li class="toc2">
-<span class="node">Section 3.8: </span><a href="nasmdoc3.html#section-3.8">Critical Expressions</a>
-</li>
-<li class="toc2">
-<span class="node">Section 3.9: </span><a href="nasmdoc3.html#section-3.9">Local Labels</a>
-</li>
-</ol>
-</li>
-<li class="toc1">
-<span class="node">Chapter 4: </span><a href="nasmdoc4.html">The NASM Preprocessor</a>
-<ol class="toc2">
-<li class="toc2">
-<span class="node">Section 4.1: </span><a href="nasmdoc4.html#section-4.1">Preprocessor Expansions</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 4.1.1: </span><a href="nasmdoc4.html#section-4.1.1">Continuation Line Collapsing</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.1.2: </span><a href="nasmdoc4.html#section-4.1.2">Comment Removal</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.1.3: </span><a href="nasmdoc4.html#section-4.1.3"><code>%line</code> directives</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.1.4: </span><a href="nasmdoc4.html#section-4.1.4"> Conditionals, Loops and Multi-Line Macro Definitions</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.1.5: </span><a href="nasmdoc4.html#section-4.1.5">Directives processing</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.1.6: </span><a href="nasmdoc4.html#section-4.1.6">Inline expansions and other directives</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.1.7: </span><a href="nasmdoc4.html#section-4.1.7">Multi-Line Macro Expansion</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.1.8: </span><a href="nasmdoc4.html#section-4.1.8">Detokenization</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 4.2: </span><a href="nasmdoc4.html#section-4.2">Single-Line Macros</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 4.2.1: </span><a href="nasmdoc4.html#section-4.2.1">The Normal Way: <code>%define</code></a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.2.2: </span><a href="nasmdoc4.html#section-4.2.2">Resolving <code>%define</code>: <code>%xdefine</code></a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.2.3: </span><a href="nasmdoc4.html#section-4.2.3">Macro Indirection: <code>%...</code></a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.2.4: </span><a href="nasmdoc4.html#section-4.2.4">Concatenating Single Line Macro Tokens: <code>%+</code></a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.2.5: </span><a href="nasmdoc4.html#section-4.2.5">The Macro Name Itself: <code>%?</code> and <code>%??</code></a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.2.6: </span><a href="nasmdoc4.html#section-4.2.6">The Single-Line Macro Name: <code>%*?</code> and <code>%*??</code></a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.2.7: </span><a href="nasmdoc4.html#section-4.2.7">Undefining Single-Line Macros: <code>%undef</code></a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.2.8: </span><a href="nasmdoc4.html#section-4.2.8">Preprocessor Variables: <code>%assign</code></a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.2.9: </span><a href="nasmdoc4.html#section-4.2.9">Defining Strings: <code>%defstr</code></a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.2.10: </span><a href="nasmdoc4.html#section-4.2.10">Defining Tokens: <code>%deftok</code></a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.2.11: </span><a href="nasmdoc4.html#section-4.2.11">Defining Aliases: <code>%defalias</code></a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.2.12: </span><a href="nasmdoc4.html#section-4.2.12">Conditional Comma Operator: <code>%,</code></a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 4.3: </span><a href="nasmdoc4.html#section-4.3">String Manipulation in Macros</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 4.3.1: </span><a href="nasmdoc4.html#section-4.3.1">Concatenating Strings: <code>%strcat</code></a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.3.2: </span><a href="nasmdoc4.html#section-4.3.2">String Length: <code>%strlen</code></a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.3.3: </span><a href="nasmdoc4.html#section-4.3.3">Extracting Substrings: <code>%substr</code></a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 4.4: </span><a href="nasmdoc4.html#section-4.4">Preprocessor Functions</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 4.4.1: </span><a href="nasmdoc4.html#section-4.4.1"><code>%abs()</code> Function</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.4.2: </span><a href="nasmdoc4.html#section-4.4.2"><code>%cond()</code> Function</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.4.3: </span><a href="nasmdoc4.html#section-4.4.3"><code>%count()</code> Function</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.4.4: </span><a href="nasmdoc4.html#section-4.4.4"><code>%eval()</code> Function</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.4.5: </span><a href="nasmdoc4.html#section-4.4.5"><code>%is()</code> Family Functions</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.4.6: </span><a href="nasmdoc4.html#section-4.4.6"><code>%num()</code> Function</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.4.7: </span><a href="nasmdoc4.html#section-4.4.7"><code>%sel()</code> Function</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.4.8: </span><a href="nasmdoc4.html#section-4.4.8"><code>%str()</code> Function</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.4.9: </span><a href="nasmdoc4.html#section-4.4.9"><code>%strcat()</code> Function</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.4.10: </span><a href="nasmdoc4.html#section-4.4.10"><code>%strlen()</code> Function</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.4.11: </span><a href="nasmdoc4.html#section-4.4.11"><code>%substr()</code> Function</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.4.12: </span><a href="nasmdoc4.html#section-4.4.12"><code>%tok()</code> function</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 4.5: </span><a href="nasmdoc4.html#section-4.5">Multi-Line Macros: <code>%macro</code></a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 4.5.1: </span><a href="nasmdoc4.html#section-4.5.1">Overloading Multi-Line Macros</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.5.2: </span><a href="nasmdoc4.html#section-4.5.2">Macro-Local Labels</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.5.3: </span><a href="nasmdoc4.html#section-4.5.3">Greedy Macro Parameters</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.5.4: </span><a href="nasmdoc4.html#section-4.5.4">Macro Parameters Range</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.5.5: </span><a href="nasmdoc4.html#section-4.5.5">Default Macro Parameters</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.5.6: </span><a href="nasmdoc4.html#section-4.5.6"><code>%0</code>: Macro Parameter Counter</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.5.7: </span><a href="nasmdoc4.html#section-4.5.7"><code>%00</code>: Label Preceding Macro</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.5.8: </span><a href="nasmdoc4.html#section-4.5.8"><code>%rotate</code>: Rotating Macro Parameters</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.5.9: </span><a href="nasmdoc4.html#section-4.5.9">Concatenating Macro Parameters</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.5.10: </span><a href="nasmdoc4.html#section-4.5.10">Condition Codes as Macro Parameters</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.5.11: </span><a href="nasmdoc4.html#section-4.5.11">Disabling Listing Expansion</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.5.12: </span><a href="nasmdoc4.html#section-4.5.12">Undefining Multi-Line Macros: <code>%unmacro</code></a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 4.6: </span><a href="nasmdoc4.html#section-4.6">Conditional Assembly</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 4.6.1: </span><a href="nasmdoc4.html#section-4.6.1"><code>%ifdef</code>: Testing Single-Line Macro Existence</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.6.2: </span><a href="nasmdoc4.html#section-4.6.2"><code>%ifmacro</code>: Testing Multi-Line Macro Existence</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.6.3: </span><a href="nasmdoc4.html#section-4.6.3"><code>%ifctx</code>: Testing the Context Stack</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.6.4: </span><a href="nasmdoc4.html#section-4.6.4"><code>%if</code>: Testing Arbitrary Numeric Expressions</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.6.5: </span><a href="nasmdoc4.html#section-4.6.5"><code>%ifidn</code> and <code>%ifidni</code>: Testing Exact Text Identity</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.6.6: </span><a href="nasmdoc4.html#section-4.6.6"><code>%ifid</code>, <code>%ifnum</code>, <code>%ifstr</code>: Testing Token Types</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.6.7: </span><a href="nasmdoc4.html#section-4.6.7"><code>%iftoken</code>: Test for a Single Token</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.6.8: </span><a href="nasmdoc4.html#section-4.6.8"><code>%ifempty</code>: Test for Empty Expansion</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.6.9: </span><a href="nasmdoc4.html#section-4.6.9"><code>%ifenv</code>: Test If Environment Variable Exists</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 4.7: </span><a href="nasmdoc4.html#section-4.7">Preprocessor Loops: <code>%rep</code></a>
-</li>
-<li class="toc2">
-<span class="node">Section 4.8: </span><a href="nasmdoc4.html#section-4.8">Source Files and Dependencies</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 4.8.1: </span><a href="nasmdoc4.html#section-4.8.1"><code>%include</code>: Including Other Files</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.8.2: </span><a href="nasmdoc4.html#section-4.8.2"><code>%pathsearch</code>: Search the Include Path</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.8.3: </span><a href="nasmdoc4.html#section-4.8.3"><code>%depend</code>: Add Dependent Files</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.8.4: </span><a href="nasmdoc4.html#section-4.8.4"><code>%use</code>: Include Standard Macro Package</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 4.9: </span><a href="nasmdoc4.html#section-4.9">The Context Stack</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 4.9.1: </span><a href="nasmdoc4.html#section-4.9.1"><code>%push</code> and <code>%pop</code>: Creating and Removing Contexts</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.9.2: </span><a href="nasmdoc4.html#section-4.9.2">Context-Local Labels</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.9.3: </span><a href="nasmdoc4.html#section-4.9.3">Context-Local Single-Line Macros</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.9.4: </span><a href="nasmdoc4.html#section-4.9.4">Context Fall-Through Lookup <em>(deprecated)</em></a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.9.5: </span><a href="nasmdoc4.html#section-4.9.5"><code>%repl</code>: Renaming a Context</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.9.6: </span><a href="nasmdoc4.html#section-4.9.6">Example Use of the Context Stack: Block IFs</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 4.10: </span><a href="nasmdoc4.html#section-4.10">Stack Relative Preprocessor Directives</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 4.10.1: </span><a href="nasmdoc4.html#section-4.10.1"><code>%arg</code> Directive</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.10.2: </span><a href="nasmdoc4.html#section-4.10.2"><code>%stacksize</code> Directive</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.10.3: </span><a href="nasmdoc4.html#section-4.10.3"><code>%local</code> Directive</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 4.11: </span><a href="nasmdoc4.html#section-4.11">Reporting User-Defined Errors: <code>%error</code>, <code>%warning</code>, <code>%fatal</code></a>
-</li>
-<li class="toc2">
-<span class="node">Section 4.12: </span><a href="nasmdoc4.html#section-4.12"><code>%pragma</code>: Setting Options</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 4.12.1: </span><a href="nasmdoc4.html#section-4.12.1">Preprocessor Pragmas</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 4.13: </span><a href="nasmdoc4.html#section-4.13">Other Preprocessor Directives</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 4.13.1: </span><a href="nasmdoc4.html#section-4.13.1"><code>%line</code> Directive</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.13.2: </span><a href="nasmdoc4.html#section-4.13.2"><code>%!</code><em>variable</em>: Read an Environment Variable.</a>
-</li>
-<li class="toc3">
-<span class="node">Section 4.13.3: </span><a href="nasmdoc4.html#section-4.13.3"><code>%clear</code>: Clear All Macro Definitions</a>
-</li>
-</ol>
-</li>
-</ol>
-</li>
-<li class="toc1">
-<span class="node">Chapter 5: </span><a href="nasmdoc5.html">Standard Macros</a>
-<ol class="toc2">
-<li class="toc2">
-<span class="node">Section 5.1: </span><a href="nasmdoc5.html#section-5.1">NASM Version Macros</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 5.1.1: </span><a href="nasmdoc5.html#section-5.1.1"><code>__?NASM_VERSION_ID?__</code>: NASM Version ID</a>
-</li>
-<li class="toc3">
-<span class="node">Section 5.1.2: </span><a href="nasmdoc5.html#section-5.1.2"><code>__?NASM_VER?__</code>: NASM Version String</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 5.2: </span><a href="nasmdoc5.html#section-5.2"><code>__?FILE?__</code> and <code>__?LINE?__</code>: File Name and Line Number</a>
-</li>
-<li class="toc2">
-<span class="node">Section 5.3: </span><a href="nasmdoc5.html#section-5.3"><code>__?BITS?__</code>: Current Code Generation Mode</a>
-</li>
-<li class="toc2">
-<span class="node">Section 5.4: </span><a href="nasmdoc5.html#section-5.4"><code>__?OUTPUT_FORMAT?__</code>: Current Output Format</a>
-</li>
-<li class="toc2">
-<span class="node">Section 5.5: </span><a href="nasmdoc5.html#section-5.5"><code>__?DEBUG_FORMAT?__</code>: Current Debug Format</a>
-</li>
-<li class="toc2">
-<span class="node">Section 5.6: </span><a href="nasmdoc5.html#section-5.6">Assembly Date and Time Macros</a>
-</li>
-<li class="toc2">
-<span class="node">Section 5.7: </span><a href="nasmdoc5.html#section-5.7"><code>__?USE_</code><em>package</em><code>?__</code>: Package Include Test</a>
-</li>
-<li class="toc2">
-<span class="node">Section 5.8: </span><a href="nasmdoc5.html#section-5.8"><code>__?PASS?__</code>: Assembly Pass</a>
-</li>
-<li class="toc2">
-<span class="node">Section 5.9: </span><a href="nasmdoc5.html#section-5.9">Structure Data Types</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 5.9.1: </span><a href="nasmdoc5.html#section-5.9.1"><code>STRUC</code> and <code>ENDSTRUC</code>: Declaring Structure Data Types</a>
-</li>
-<li class="toc3">
-<span class="node">Section 5.9.2: </span><a href="nasmdoc5.html#section-5.9.2"><code>ISTRUC</code>, <code>AT</code> and <code>IEND</code>: Declaring Instances of Structures</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 5.10: </span><a href="nasmdoc5.html#section-5.10">Alignment Control</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 5.10.1: </span><a href="nasmdoc5.html#section-5.10.1"><code>ALIGN</code> and <code>ALIGNB</code>: Code and Data Alignment</a>
-</li>
-<li class="toc3">
-<span class="node">Section 5.10.2: </span><a href="nasmdoc5.html#section-5.10.2"><code>SECTALIGN</code>: Section Alignment</a>
-</li>
-</ol>
-</li>
-</ol>
-</li>
-<li class="toc1">
-<span class="node">Chapter 6: </span><a href="nasmdoc6.html">Standard Macro Packages</a>
-<ol class="toc2">
-<li class="toc2">
-<span class="node">Section 6.1: </span><a href="nasmdoc6.html#section-6.1"><code>altreg</code>: Alternate Register Names</a>
-</li>
-<li class="toc2">
-<span class="node">Section 6.2: </span><a href="nasmdoc6.html#section-6.2"><code>smartalign</code>: Smart <code>ALIGN</code> Macro</a>
-</li>
-<li class="toc2">
-<span class="node">Section 6.3: </span><a href="nasmdoc6.html#section-6.3"><code>fp</code>: Floating-point macros</a>
-</li>
-<li class="toc2">
-<span class="node">Section 6.4: </span><a href="nasmdoc6.html#section-6.4"><code>ifunc</code>: Integer functions</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 6.4.1: </span><a href="nasmdoc6.html#section-6.4.1">Integer logarithms</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 6.5: </span><a href="nasmdoc6.html#section-6.5"><code>masm</code>: MASM compatibility</a>
-</li>
-</ol>
-</li>
-<li class="toc1">
-<span class="node">Chapter 7: </span><a href="nasmdoc7.html">Assembler Directives</a>
-<ol class="toc2">
-<li class="toc2">
-<span class="node">Section 7.1: </span><a href="nasmdoc7.html#section-7.1"><code>BITS</code>: Specifying Target Processor Mode</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 7.1.1: </span><a href="nasmdoc7.html#section-7.1.1"><code>USE16</code> &amp; <code>USE32</code>: Aliases for BITS</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 7.2: </span><a href="nasmdoc7.html#section-7.2"><code>DEFAULT</code>: Change the assembler defaults</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 7.2.1: </span><a href="nasmdoc7.html#section-7.2.1"><code>REL</code> &amp; <code>ABS</code>: RIP-relative addressing</a>
-</li>
-<li class="toc3">
-<span class="node">Section 7.2.2: </span><a href="nasmdoc7.html#section-7.2.2"><code>BND</code> &amp; <code>NOBND</code>: <code>BND</code> prefix</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 7.3: </span><a href="nasmdoc7.html#section-7.3"><code>SECTION</code> or <code>SEGMENT</code>: Changing and Defining Sections</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 7.3.1: </span><a href="nasmdoc7.html#section-7.3.1">The <code>__?SECT?__</code> Macro</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 7.4: </span><a href="nasmdoc7.html#section-7.4"><code>ABSOLUTE</code>: Defining Absolute Labels</a>
-</li>
-<li class="toc2">
-<span class="node">Section 7.5: </span><a href="nasmdoc7.html#section-7.5"><code>EXTERN</code>: Importing Symbols from Other Modules</a>
-</li>
-<li class="toc2">
-<span class="node">Section 7.6: </span><a href="nasmdoc7.html#section-7.6"><code>REQUIRED</code>: Unconditionally Importing Symbols from Other Modules</a>
-</li>
-<li class="toc2">
-<span class="node">Section 7.7: </span><a href="nasmdoc7.html#section-7.7"><code>GLOBAL</code>: Exporting Symbols to Other Modules</a>
-</li>
-<li class="toc2">
-<span class="node">Section 7.8: </span><a href="nasmdoc7.html#section-7.8"><code>COMMON</code>: Defining Common Data Areas</a>
-</li>
-<li class="toc2">
-<span class="node">Section 7.9: </span><a href="nasmdoc7.html#section-7.9"><code>STATIC</code>: Local Symbols within Modules</a>
-</li>
-<li class="toc2">
-<span class="node">Section 7.10: </span><a href="nasmdoc7.html#section-7.10"><code>(G|L)PREFIX</code>, <code>(G|L)POSTFIX</code>: Mangling Symbols</a>
-</li>
-<li class="toc2">
-<span class="node">Section 7.11: </span><a href="nasmdoc7.html#section-7.11"><code>CPU</code>: Defining CPU Dependencies</a>
-</li>
-<li class="toc2">
-<span class="node">Section 7.12: </span><a href="nasmdoc7.html#section-7.12"><code>FLOAT</code>: Handling of floating-point constants</a>
-</li>
-<li class="toc2">
-<span class="node">Section 7.13: </span><a href="nasmdoc7.html#section-7.13"><code>WARNING</code>: Enable or disable warnings</a>
-</li>
-</ol>
-</li>
-<li class="toc1">
-<span class="node">Chapter 8: </span><a href="nasmdoc8.html">Output Formats</a>
-<ol class="toc2">
-<li class="toc2">
-<span class="node">Section 8.1: </span><a href="nasmdoc8.html#section-8.1"><code>bin</code>: Flat-Form Binary Output</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 8.1.1: </span><a href="nasmdoc8.html#section-8.1.1"><code>ORG</code>: Binary File Program Origin</a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.1.2: </span><a href="nasmdoc8.html#section-8.1.2"><code>bin</code> Extensions to the <code>SECTION</code> Directive, <code>bin</code> extensions to}</a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.1.3: </span><a href="nasmdoc8.html#section-8.1.3">Multisection Support for the <code>bin</code> Format</a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.1.4: </span><a href="nasmdoc8.html#section-8.1.4">Map Files</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 8.2: </span><a href="nasmdoc8.html#section-8.2"><code>ith</code>: Intel Hex Output</a>
-</li>
-<li class="toc2">
-<span class="node">Section 8.3: </span><a href="nasmdoc8.html#section-8.3"><code>srec</code>: Motorola S-Records Output</a>
-</li>
-<li class="toc2">
-<span class="node">Section 8.4: </span><a href="nasmdoc8.html#section-8.4"><code>obj</code>: Microsoft OMF Object Files</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 8.4.1: </span><a href="nasmdoc8.html#section-8.4.1"><code>obj</code> Extensions to the <code>SEGMENT</code> Directive</a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.4.2: </span><a href="nasmdoc8.html#section-8.4.2"><code>GROUP</code>: Defining Groups of Segments</a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.4.3: </span><a href="nasmdoc8.html#section-8.4.3"><code>UPPERCASE</code>: Disabling Case Sensitivity in Output</a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.4.4: </span><a href="nasmdoc8.html#section-8.4.4"><code>IMPORT</code>: Importing DLL Symbols</a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.4.5: </span><a href="nasmdoc8.html#section-8.4.5"><code>EXPORT</code>: Exporting DLL Symbols</a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.4.6: </span><a href="nasmdoc8.html#section-8.4.6"><code>..start</code>: Defining the Program Entry Point</a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.4.7: </span><a href="nasmdoc8.html#section-8.4.7"><code>obj</code> Extensions to the <code>EXTERN</code> Directive</a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.4.8: </span><a href="nasmdoc8.html#section-8.4.8"><code>obj</code> Extensions to the <code>COMMON</code> Directive</a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.4.9: </span><a href="nasmdoc8.html#section-8.4.9">Embedded File Dependency Information</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 8.5: </span><a href="nasmdoc8.html#section-8.5"><code>win32</code>: Microsoft Win32 Object Files</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 8.5.1: </span><a href="nasmdoc8.html#section-8.5.1"><code>win32</code> Extensions to the <code>SECTION</code> Directive</a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.5.2: </span><a href="nasmdoc8.html#section-8.5.2"><code>win32</code>: Safe Structured Exception Handling</a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.5.3: </span><a href="nasmdoc8.html#section-8.5.3">Debugging formats for Windows </a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 8.6: </span><a href="nasmdoc8.html#section-8.6"><code>win64</code>: Microsoft Win64 Object Files</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 8.6.1: </span><a href="nasmdoc8.html#section-8.6.1"><code>win64</code>: Writing Position-Independent Code</a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.6.2: </span><a href="nasmdoc8.html#section-8.6.2"><code>win64</code>: Structured Exception Handling</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 8.7: </span><a href="nasmdoc8.html#section-8.7"><code>coff</code>: Common Object File Format</a>
-</li>
-<li class="toc2">
-<span class="node">Section 8.8: </span><a href="nasmdoc8.html#section-8.8"><code>macho32</code> and <code>macho64</code>: Mach Object File Format</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 8.8.1: </span><a href="nasmdoc8.html#section-8.8.1"><code>macho</code> extensions to the <code>SECTION</code> Directive </a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.8.2: </span><a href="nasmdoc8.html#section-8.8.2">Thread Local Storage in Mach-O: <code>macho</code> special symbols and <code>WRT</code></a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.8.3: </span><a href="nasmdoc8.html#section-8.8.3"><code>macho</code> specific directive <code>subsections_via_symbols</code></a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.8.4: </span><a href="nasmdoc8.html#section-8.8.4"><code>macho</code> specific directive <code>no_dead_strip</code></a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.8.5: </span><a href="nasmdoc8.html#section-8.8.5"><code>macho</code> specific extensions to the <code>GLOBAL</code> Directive: <code>private_extern</code></a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 8.9: </span><a href="nasmdoc8.html#section-8.9"><code>elf32</code>, <code>elf64</code>, <code>elfx32</code>: Executable and Linkable Format Object Files</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 8.9.1: </span><a href="nasmdoc8.html#section-8.9.1">ELF specific directive <code>osabi</code></a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.9.2: </span><a href="nasmdoc8.html#section-8.9.2">ELF extensions to the <code>SECTION</code> Directive </a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.9.3: </span><a href="nasmdoc8.html#section-8.9.3">Position-Independent Code: ELF Special Symbols and <code>WRT</code></a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.9.4: </span><a href="nasmdoc8.html#section-8.9.4">Thread Local Storage in ELF: <code>elf</code> Special Symbols and <code>WRT</code></a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.9.5: </span><a href="nasmdoc8.html#section-8.9.5"><code>elf</code> Extensions to the <code>GLOBAL</code> Directive</a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.9.6: </span><a href="nasmdoc8.html#section-8.9.6"><code>elf</code> Extensions to the <code>EXTERN</code> Directive</a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.9.7: </span><a href="nasmdoc8.html#section-8.9.7"><code>elf</code> Extensions to the <code>COMMON</code> Directive </a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.9.8: </span><a href="nasmdoc8.html#section-8.9.8">16-bit code and ELF </a>
-</li>
-<li class="toc3">
-<span class="node">Section 8.9.9: </span><a href="nasmdoc8.html#section-8.9.9">Debug formats and ELF </a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 8.10: </span><a href="nasmdoc8.html#section-8.10"><code>aout</code>: Linux <code>a.out</code> Object Files</a>
-</li>
-<li class="toc2">
-<span class="node">Section 8.11: </span><a href="nasmdoc8.html#section-8.11"><code>aoutb</code>: NetBSD/FreeBSD/OpenBSD <code>a.out</code> Object Files</a>
-</li>
-<li class="toc2">
-<span class="node">Section 8.12: </span><a href="nasmdoc8.html#section-8.12"><code>as86</code>: Minix/Linux <code>as86</code> Object Files</a>
-</li>
-<li class="toc2">
-<span class="node">Section 8.13: </span><a href="nasmdoc8.html#section-8.13"><code>dbg</code>: Debugging Format</a>
-</li>
-</ol>
-</li>
-<li class="toc1">
-<span class="node">Chapter 9: </span><a href="nasmdoc9.html">Writing 16-bit Code (DOS, Windows 3/3.1)</a>
-<ol class="toc2">
-<li class="toc2">
-<span class="node">Section 9.1: </span><a href="nasmdoc9.html#section-9.1">Producing <code>.EXE</code> Files</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 9.1.1: </span><a href="nasmdoc9.html#section-9.1.1">Using the <code>obj</code> Format To Generate <code>.EXE</code> Files</a>
-</li>
-<li class="toc3">
-<span class="node">Section 9.1.2: </span><a href="nasmdoc9.html#section-9.1.2">Using the <code>bin</code> Format To Generate <code>.EXE</code> Files</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 9.2: </span><a href="nasmdoc9.html#section-9.2">Producing <code>.COM</code> Files</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 9.2.1: </span><a href="nasmdoc9.html#section-9.2.1">Using the <code>bin</code> Format To Generate <code>.COM</code> Files</a>
-</li>
-<li class="toc3">
-<span class="node">Section 9.2.2: </span><a href="nasmdoc9.html#section-9.2.2">Using the <code>obj</code> Format To Generate <code>.COM</code> Files</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 9.3: </span><a href="nasmdoc9.html#section-9.3">Producing <code>.SYS</code> Files</a>
-</li>
-<li class="toc2">
-<span class="node">Section 9.4: </span><a href="nasmdoc9.html#section-9.4">Interfacing to 16-bit C Programs</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 9.4.1: </span><a href="nasmdoc9.html#section-9.4.1">External Symbol Names</a>
-</li>
-<li class="toc3">
-<span class="node">Section 9.4.2: </span><a href="nasmdoc9.html#section-9.4.2">Memory Models</a>
-</li>
-<li class="toc3">
-<span class="node">Section 9.4.3: </span><a href="nasmdoc9.html#section-9.4.3">Function Definitions and Function Calls</a>
-</li>
-<li class="toc3">
-<span class="node">Section 9.4.4: </span><a href="nasmdoc9.html#section-9.4.4">Accessing Data Items</a>
-</li>
-<li class="toc3">
-<span class="node">Section 9.4.5: </span><a href="nasmdoc9.html#section-9.4.5"><code>c16.mac</code>: Helper Macros for the 16-bit C Interface</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 9.5: </span><a href="nasmdoc9.html#section-9.5">Interfacing to Borland Pascal Programs</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 9.5.1: </span><a href="nasmdoc9.html#section-9.5.1">The Pascal Calling Convention</a>
-</li>
-<li class="toc3">
-<span class="node">Section 9.5.2: </span><a href="nasmdoc9.html#section-9.5.2">Borland Pascal Segment Name Restrictions</a>
-</li>
-<li class="toc3">
-<span class="node">Section 9.5.3: </span><a href="nasmdoc9.html#section-9.5.3">Using <code>c16.mac</code> With Pascal Programs</a>
-</li>
-</ol>
-</li>
-</ol>
-</li>
-<li class="toc1">
-<span class="node">Chapter 10: </span><a href="nasmdo10.html">Writing 32-bit Code (Unix, Win32, DJGPP)</a>
-<ol class="toc2">
-<li class="toc2">
-<span class="node">Section 10.1: </span><a href="nasmdo10.html#section-10.1">Interfacing to 32-bit C Programs</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 10.1.1: </span><a href="nasmdo10.html#section-10.1.1">External Symbol Names</a>
-</li>
-<li class="toc3">
-<span class="node">Section 10.1.2: </span><a href="nasmdo10.html#section-10.1.2">Function Definitions and Function Calls</a>
-</li>
-<li class="toc3">
-<span class="node">Section 10.1.3: </span><a href="nasmdo10.html#section-10.1.3">Accessing Data Items</a>
-</li>
-<li class="toc3">
-<span class="node">Section 10.1.4: </span><a href="nasmdo10.html#section-10.1.4"><code>c32.mac</code>: Helper Macros for the 32-bit C Interface</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section 10.2: </span><a href="nasmdo10.html#section-10.2">Writing NetBSD/FreeBSD/OpenBSD and Linux/ELF Shared Libraries</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 10.2.1: </span><a href="nasmdo10.html#section-10.2.1">Obtaining the Address of the GOT</a>
-</li>
-<li class="toc3">
-<span class="node">Section 10.2.2: </span><a href="nasmdo10.html#section-10.2.2">Finding Your Local Data Items</a>
-</li>
-<li class="toc3">
-<span class="node">Section 10.2.3: </span><a href="nasmdo10.html#section-10.2.3">Finding External and Common Data Items</a>
-</li>
-<li class="toc3">
-<span class="node">Section 10.2.4: </span><a href="nasmdo10.html#section-10.2.4">Exporting Symbols to the Library User</a>
-</li>
-<li class="toc3">
-<span class="node">Section 10.2.5: </span><a href="nasmdo10.html#section-10.2.5">Calling Procedures Outside the Library</a>
-</li>
-<li class="toc3">
-<span class="node">Section 10.2.6: </span><a href="nasmdo10.html#section-10.2.6">Generating the Library File</a>
-</li>
-</ol>
-</li>
-</ol>
-</li>
-<li class="toc1">
-<span class="node">Chapter 11: </span><a href="nasmdo11.html">Mixing 16- and 32-bit Code</a>
-<ol class="toc2">
-<li class="toc2">
-<span class="node">Section 11.1: </span><a href="nasmdo11.html#section-11.1">Mixed-Size Jumps</a>
-</li>
-<li class="toc2">
-<span class="node">Section 11.2: </span><a href="nasmdo11.html#section-11.2">Addressing Between Different-Size Segments</a>
-</li>
-<li class="toc2">
-<span class="node">Section 11.3: </span><a href="nasmdo11.html#section-11.3">Other Mixed-Size Instructions</a>
-</li>
-</ol>
-</li>
-<li class="toc1">
-<span class="node">Chapter 12: </span><a href="nasmdo12.html">Writing 64-bit Code (Unix, Win64)</a>
-<ol class="toc2">
-<li class="toc2">
-<span class="node">Section 12.1: </span><a href="nasmdo12.html#section-12.1">Register Names in 64-bit Mode</a>
-</li>
-<li class="toc2">
-<span class="node">Section 12.2: </span><a href="nasmdo12.html#section-12.2">Immediates and Displacements in 64-bit Mode</a>
-</li>
-<li class="toc2">
-<span class="node">Section 12.3: </span><a href="nasmdo12.html#section-12.3">Interfacing to 64-bit C Programs (Unix)</a>
-</li>
-<li class="toc2">
-<span class="node">Section 12.4: </span><a href="nasmdo12.html#section-12.4">Interfacing to 64-bit C Programs (Win64)</a>
-</li>
-</ol>
-</li>
-<li class="toc1">
-<span class="node">Chapter 13: </span><a href="nasmdo13.html">Troubleshooting</a>
-<ol class="toc2">
-<li class="toc2">
-<span class="node">Section 13.1: </span><a href="nasmdo13.html#section-13.1">Common Problems</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section 13.1.1: </span><a href="nasmdo13.html#section-13.1.1">NASM Generates Inefficient Code</a>
-</li>
-<li class="toc3">
-<span class="node">Section 13.1.2: </span><a href="nasmdo13.html#section-13.1.2">My Jumps are Out of Range</a>
-</li>
-<li class="toc3">
-<span class="node">Section 13.1.3: </span><a href="nasmdo13.html#section-13.1.3"><code>ORG</code> Doesn't Work</a>
-</li>
-<li class="toc3">
-<span class="node">Section 13.1.4: </span><a href="nasmdo13.html#section-13.1.4"><code>TIMES</code> Doesn't Work</a>
-</li>
-</ol>
-</li>
-</ol>
-</li>
-<li class="toc1">
-<span class="node">Appendix A: </span><a href="nasmdoca.html">List of Warning Classes</a>
-</li>
-<li class="toc1">
-<span class="node">Appendix B: </span><a href="nasmdocb.html">Ndisasm</a>
-<ol class="toc2">
-<li class="toc2">
-<span class="node">Section B.1: </span><a href="nasmdocb.html#section-B.1">Introduction</a>
-</li>
-<li class="toc2">
-<span class="node">Section B.2: </span><a href="nasmdocb.html#section-B.2">Running NDISASM</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section B.2.1: </span><a href="nasmdocb.html#section-B.2.1">COM Files: Specifying an Origin</a>
-</li>
-<li class="toc3">
-<span class="node">Section B.2.2: </span><a href="nasmdocb.html#section-B.2.2">Code Following Data: Synchronization</a>
-</li>
-<li class="toc3">
-<span class="node">Section B.2.3: </span><a href="nasmdocb.html#section-B.2.3">Mixed Code and Data: Automatic (Intelligent) Synchronization </a>
-</li>
-<li class="toc3">
-<span class="node">Section B.2.4: </span><a href="nasmdocb.html#section-B.2.4">Other Options</a>
-</li>
-</ol>
-</li>
-</ol>
-</li>
-<li class="toc1">
-<span class="node">Appendix C: </span><a href="nasmdocc.html">NASM Version History</a>
-<ol class="toc2">
-<li class="toc2">
-<span class="node">Section C.1: </span><a href="nasmdocc.html#section-C.1">NASM 2 Series</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section C.1.1: </span><a href="nasmdocc.html#section-C.1.1">Version 2.16.01</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.2: </span><a href="nasmdocc.html#section-C.1.2">Version 2.16</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.3: </span><a href="nasmdocc.html#section-C.1.3">Version 2.15.05</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.4: </span><a href="nasmdocc.html#section-C.1.4">Version 2.15.04</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.5: </span><a href="nasmdocc.html#section-C.1.5">Version 2.15.03</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.6: </span><a href="nasmdocc.html#section-C.1.6">Version 2.15.02</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.7: </span><a href="nasmdocc.html#section-C.1.7">Version 2.15.01</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.8: </span><a href="nasmdocc.html#section-C.1.8">Version 2.15</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.9: </span><a href="nasmdocc.html#section-C.1.9">Version 2.14.03</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.10: </span><a href="nasmdocc.html#section-C.1.10">Version 2.14.02</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.11: </span><a href="nasmdocc.html#section-C.1.11">Version 2.14.01</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.12: </span><a href="nasmdocc.html#section-C.1.12">Version 2.14</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.13: </span><a href="nasmdocc.html#section-C.1.13">Version 2.13.03</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.14: </span><a href="nasmdocc.html#section-C.1.14">Version 2.13.02</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.15: </span><a href="nasmdocc.html#section-C.1.15">Version 2.13.01</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.16: </span><a href="nasmdocc.html#section-C.1.16">Version 2.13</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.17: </span><a href="nasmdocc.html#section-C.1.17">Version 2.12.02</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.18: </span><a href="nasmdocc.html#section-C.1.18">Version 2.12.01</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.19: </span><a href="nasmdocc.html#section-C.1.19">Version 2.12</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.20: </span><a href="nasmdocc.html#section-C.1.20">Version 2.11.09</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.21: </span><a href="nasmdocc.html#section-C.1.21">Version 2.11.08</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.22: </span><a href="nasmdocc.html#section-C.1.22">Version 2.11.07</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.23: </span><a href="nasmdocc.html#section-C.1.23">Version 2.11.06</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.24: </span><a href="nasmdocc.html#section-C.1.24">Version 2.11.05</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.25: </span><a href="nasmdocc.html#section-C.1.25">Version 2.11.04</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.26: </span><a href="nasmdocc.html#section-C.1.26">Version 2.11.03</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.27: </span><a href="nasmdocc.html#section-C.1.27">Version 2.11.02</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.28: </span><a href="nasmdocc.html#section-C.1.28">Version 2.11.01</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.29: </span><a href="nasmdocc.html#section-C.1.29">Version 2.11</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.30: </span><a href="nasmdocc.html#section-C.1.30">Version 2.10.09</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.31: </span><a href="nasmdocc.html#section-C.1.31">Version 2.10.08</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.32: </span><a href="nasmdocc.html#section-C.1.32">Version 2.10.07</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.33: </span><a href="nasmdocc.html#section-C.1.33">Version 2.10.06</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.34: </span><a href="nasmdocc.html#section-C.1.34">Version 2.10.05</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.35: </span><a href="nasmdocc.html#section-C.1.35">Version 2.10.04</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.36: </span><a href="nasmdocc.html#section-C.1.36">Version 2.10.03</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.37: </span><a href="nasmdocc.html#section-C.1.37">Version 2.10.02</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.38: </span><a href="nasmdocc.html#section-C.1.38">Version 2.10.01</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.39: </span><a href="nasmdocc.html#section-C.1.39">Version 2.10</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.40: </span><a href="nasmdocc.html#section-C.1.40">Version 2.09.10</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.41: </span><a href="nasmdocc.html#section-C.1.41">Version 2.09.09</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.42: </span><a href="nasmdocc.html#section-C.1.42">Version 2.09.08</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.43: </span><a href="nasmdocc.html#section-C.1.43">Version 2.09.07</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.44: </span><a href="nasmdocc.html#section-C.1.44">Version 2.09.06</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.45: </span><a href="nasmdocc.html#section-C.1.45">Version 2.09.05</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.46: </span><a href="nasmdocc.html#section-C.1.46">Version 2.09.04</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.47: </span><a href="nasmdocc.html#section-C.1.47">Version 2.09.03</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.48: </span><a href="nasmdocc.html#section-C.1.48">Version 2.09.02</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.49: </span><a href="nasmdocc.html#section-C.1.49">Version 2.09.01</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.50: </span><a href="nasmdocc.html#section-C.1.50">Version 2.09</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.51: </span><a href="nasmdocc.html#section-C.1.51">Version 2.08.02</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.52: </span><a href="nasmdocc.html#section-C.1.52">Version 2.08.01</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.53: </span><a href="nasmdocc.html#section-C.1.53">Version 2.08</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.54: </span><a href="nasmdocc.html#section-C.1.54">Version 2.07</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.55: </span><a href="nasmdocc.html#section-C.1.55">Version 2.06</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.56: </span><a href="nasmdocc.html#section-C.1.56">Version 2.05.01</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.57: </span><a href="nasmdocc.html#section-C.1.57">Version 2.05</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.58: </span><a href="nasmdocc.html#section-C.1.58">Version 2.04</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.59: </span><a href="nasmdocc.html#section-C.1.59">Version 2.03.01</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.60: </span><a href="nasmdocc.html#section-C.1.60">Version 2.03</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.61: </span><a href="nasmdocc.html#section-C.1.61">Version 2.02</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.62: </span><a href="nasmdocc.html#section-C.1.62">Version 2.01</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.1.63: </span><a href="nasmdocc.html#section-C.1.63">Version 2.00</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section C.2: </span><a href="nasmdocc.html#section-C.2">NASM 0.98 Series</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section C.2.1: </span><a href="nasmdocc.html#section-C.2.1">Version 0.98.39</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.2: </span><a href="nasmdocc.html#section-C.2.2">Version 0.98.38</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.3: </span><a href="nasmdocc.html#section-C.2.3">Version 0.98.37</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.4: </span><a href="nasmdocc.html#section-C.2.4">Version 0.98.36</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.5: </span><a href="nasmdocc.html#section-C.2.5">Version 0.98.35</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.6: </span><a href="nasmdocc.html#section-C.2.6">Version 0.98.34</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.7: </span><a href="nasmdocc.html#section-C.2.7">Version 0.98.33</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.8: </span><a href="nasmdocc.html#section-C.2.8">Version 0.98.32</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.9: </span><a href="nasmdocc.html#section-C.2.9">Version 0.98.31</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.10: </span><a href="nasmdocc.html#section-C.2.10">Version 0.98.30</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.11: </span><a href="nasmdocc.html#section-C.2.11">Version 0.98.28</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.12: </span><a href="nasmdocc.html#section-C.2.12">Version 0.98.26</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.13: </span><a href="nasmdocc.html#section-C.2.13">Version 0.98.25alt</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.14: </span><a href="nasmdocc.html#section-C.2.14">Version 0.98.25</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.15: </span><a href="nasmdocc.html#section-C.2.15">Version 0.98.24p1</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.16: </span><a href="nasmdocc.html#section-C.2.16">Version 0.98.24</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.17: </span><a href="nasmdocc.html#section-C.2.17">Version 0.98.23</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.18: </span><a href="nasmdocc.html#section-C.2.18">Version 0.98.22</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.19: </span><a href="nasmdocc.html#section-C.2.19">Version 0.98.21</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.20: </span><a href="nasmdocc.html#section-C.2.20">Version 0.98.20</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.21: </span><a href="nasmdocc.html#section-C.2.21">Version 0.98.19</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.22: </span><a href="nasmdocc.html#section-C.2.22">Version 0.98.18</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.23: </span><a href="nasmdocc.html#section-C.2.23">Version 0.98.17</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.24: </span><a href="nasmdocc.html#section-C.2.24">Version 0.98.16</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.25: </span><a href="nasmdocc.html#section-C.2.25">Version 0.98.15</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.26: </span><a href="nasmdocc.html#section-C.2.26">Version 0.98.14</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.27: </span><a href="nasmdocc.html#section-C.2.27">Version 0.98.13</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.28: </span><a href="nasmdocc.html#section-C.2.28">Version 0.98.12</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.29: </span><a href="nasmdocc.html#section-C.2.29">Version 0.98.11</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.30: </span><a href="nasmdocc.html#section-C.2.30">Version 0.98.10</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.31: </span><a href="nasmdocc.html#section-C.2.31">Version 0.98.09</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.32: </span><a href="nasmdocc.html#section-C.2.32">Version 0.98.08</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.33: </span><a href="nasmdocc.html#section-C.2.33">Version 0.98.09b with John Coffman patches released 28-Oct-2001</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.34: </span><a href="nasmdocc.html#section-C.2.34">Version 0.98.07 released 01/28/01</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.35: </span><a href="nasmdocc.html#section-C.2.35">Version 0.98.06f released 01/18/01</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.36: </span><a href="nasmdocc.html#section-C.2.36">Version 0.98.06e released 01/09/01</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.37: </span><a href="nasmdocc.html#section-C.2.37">Version 0.98p1</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.38: </span><a href="nasmdocc.html#section-C.2.38">Version 0.98bf (bug-fixed)</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.39: </span><a href="nasmdocc.html#section-C.2.39">Version 0.98.03 with John Coffman's changes released 27-Jul-2000</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.40: </span><a href="nasmdocc.html#section-C.2.40">Version 0.98.03</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.41: </span><a href="nasmdocc.html#section-C.2.41">Version 0.98</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.42: </span><a href="nasmdocc.html#section-C.2.42">Version 0.98p9</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.43: </span><a href="nasmdocc.html#section-C.2.43">Version 0.98p8</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.44: </span><a href="nasmdocc.html#section-C.2.44">Version 0.98p7</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.45: </span><a href="nasmdocc.html#section-C.2.45">Version 0.98p6</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.46: </span><a href="nasmdocc.html#section-C.2.46">Version 0.98p3.7</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.47: </span><a href="nasmdocc.html#section-C.2.47">Version 0.98p3.6</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.48: </span><a href="nasmdocc.html#section-C.2.48">Version 0.98p3.5</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.49: </span><a href="nasmdocc.html#section-C.2.49">Version 0.98p3.4</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.50: </span><a href="nasmdocc.html#section-C.2.50">Version 0.98p3.3</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.51: </span><a href="nasmdocc.html#section-C.2.51">Version 0.98p3.2</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.52: </span><a href="nasmdocc.html#section-C.2.52">Version 0.98p3-hpa</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.53: </span><a href="nasmdocc.html#section-C.2.53">Version 0.98 pre-release 3</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.54: </span><a href="nasmdocc.html#section-C.2.54">Version 0.98 pre-release 2</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.2.55: </span><a href="nasmdocc.html#section-C.2.55">Version 0.98 pre-release 1</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section C.3: </span><a href="nasmdocc.html#section-C.3">NASM 0.9 Series</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section C.3.1: </span><a href="nasmdocc.html#section-C.3.1">Version 0.97 released December 1997</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.3.2: </span><a href="nasmdocc.html#section-C.3.2">Version 0.96 released November 1997</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.3.3: </span><a href="nasmdocc.html#section-C.3.3">Version 0.95 released July 1997</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.3.4: </span><a href="nasmdocc.html#section-C.3.4">Version 0.94 released April 1997</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.3.5: </span><a href="nasmdocc.html#section-C.3.5">Version 0.93 released January 1997</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.3.6: </span><a href="nasmdocc.html#section-C.3.6">Version 0.92 released January 1997</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.3.7: </span><a href="nasmdocc.html#section-C.3.7">Version 0.91 released November 1996</a>
-</li>
-<li class="toc3">
-<span class="node">Section C.3.8: </span><a href="nasmdocc.html#section-C.3.8">Version 0.90 released October 1996</a>
-</li>
-</ol>
-</li>
-</ol>
-</li>
-<li class="toc1">
-<span class="node">Appendix D: </span><a href="nasmdocd.html">Building NASM from Source</a>
-<ol class="toc2">
-<li class="toc2">
-<span class="node">Section D.1: </span><a href="nasmdocd.html#section-D.1">Building from a Source Archive</a>
-</li>
-<li class="toc2">
-<span class="node">Section D.2: </span><a href="nasmdocd.html#section-D.2">Building from the <code>git</code> Repository</a>
-</li>
-<li class="toc2">
-<span class="node">Section D.3: </span><a href="nasmdocd.html#section-D.3">Building the documentation</a>
-</li>
-</ol>
-</li>
-<li class="toc1">
-<span class="node">Appendix E: </span><a href="nasmdoce.html">Contact Information</a>
-<ol class="toc2">
-<li class="toc2">
-<span class="node">Section E.1: </span><a href="nasmdoce.html#section-E.1">Website</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section E.1.1: </span><a href="nasmdoce.html#section-E.1.1">User Forums</a>
-</li>
-<li class="toc3">
-<span class="node">Section E.1.2: </span><a href="nasmdoce.html#section-E.1.2">Development Community</a>
-</li>
-</ol>
-</li>
-<li class="toc2">
-<span class="node">Section E.2: </span><a href="nasmdoce.html#section-E.2">Reporting Bugs</a>
-</li>
-</ol>
-</li>
-<li class="toc1">
-<span class="node">Appendix F: </span><a href="nasmdocf.html">Instruction List</a>
-<ol class="toc2">
-<li class="toc2">
-<span class="node">Section F.1: </span><a href="nasmdocf.html#section-F.1">Introduction</a>
-<ol class="toc3">
-<li class="toc3">
-<span class="node">Section F.1.1: </span><a href="nasmdocf.html#section-F.1.1">Special instructions (pseudo-ops)</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.2: </span><a href="nasmdocf.html#section-F.1.2">Conventional instructions</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.3: </span><a href="nasmdocf.html#section-F.1.3">Katmai Streaming SIMD instructions (SSE &ndash;&ndash; a.k.a. KNI, XMM, MMX2)</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.4: </span><a href="nasmdocf.html#section-F.1.4">Introduced in Deschutes but necessary for SSE support</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.5: </span><a href="nasmdocf.html#section-F.1.5">XSAVE group (AVX and extended state)</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.6: </span><a href="nasmdocf.html#section-F.1.6">Generic memory operations</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.7: </span><a href="nasmdocf.html#section-F.1.7">New MMX instructions introduced in Katmai</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.8: </span><a href="nasmdocf.html#section-F.1.8">AMD Enhanced 3DNow! (Athlon) instructions</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.9: </span><a href="nasmdocf.html#section-F.1.9">Willamette SSE2 Cacheability Instructions</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.10: </span><a href="nasmdocf.html#section-F.1.10">Willamette MMX instructions (SSE2 SIMD Integer Instructions)</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.11: </span><a href="nasmdocf.html#section-F.1.11">Willamette Streaming SIMD instructions (SSE2)</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.12: </span><a href="nasmdocf.html#section-F.1.12">Prescott New Instructions (SSE3)</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.13: </span><a href="nasmdocf.html#section-F.1.13">VMX/SVM Instructions</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.14: </span><a href="nasmdocf.html#section-F.1.14">Extended Page Tables VMX instructions</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.15: </span><a href="nasmdocf.html#section-F.1.15">SEV-SNP AMD instructions</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.16: </span><a href="nasmdocf.html#section-F.1.16">Tejas New Instructions (SSSE3)</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.17: </span><a href="nasmdocf.html#section-F.1.17">AMD SSE4A</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.18: </span><a href="nasmdocf.html#section-F.1.18">New instructions in Barcelona</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.19: </span><a href="nasmdocf.html#section-F.1.19">Penryn New Instructions (SSE4.1)</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.20: </span><a href="nasmdocf.html#section-F.1.20">Nehalem New Instructions (SSE4.2)</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.21: </span><a href="nasmdocf.html#section-F.1.21">Intel SMX</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.22: </span><a href="nasmdocf.html#section-F.1.22">Geode (Cyrix) 3DNow! additions</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.23: </span><a href="nasmdocf.html#section-F.1.23">Intel new instructions in ???</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.24: </span><a href="nasmdocf.html#section-F.1.24">Intel AES instructions</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.25: </span><a href="nasmdocf.html#section-F.1.25">Intel AVX AES instructions</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.26: </span><a href="nasmdocf.html#section-F.1.26">Intel instruction extension based on pub number 319433-030 dated October 2017</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.27: </span><a href="nasmdocf.html#section-F.1.27">Intel AVX instructions</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.28: </span><a href="nasmdocf.html#section-F.1.28">Intel Carry-Less Multiplication instructions (CLMUL)</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.29: </span><a href="nasmdocf.html#section-F.1.29">Intel AVX Carry-Less Multiplication instructions (CLMUL)</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.30: </span><a href="nasmdocf.html#section-F.1.30">Intel Fused Multiply-Add instructions (FMA)</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.31: </span><a href="nasmdocf.html#section-F.1.31">Intel post-32 nm processor instructions</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.32: </span><a href="nasmdocf.html#section-F.1.32">VIA (Centaur) security instructions</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.33: </span><a href="nasmdocf.html#section-F.1.33">AMD Lightweight Profiling (LWP) instructions</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.34: </span><a href="nasmdocf.html#section-F.1.34">AMD XOP and FMA4 instructions (SSE5)</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.35: </span><a href="nasmdocf.html#section-F.1.35">Intel AVX2 instructions</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.36: </span><a href="nasmdocf.html#section-F.1.36">Intel Transactional Synchronization Extensions (TSX)</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.37: </span><a href="nasmdocf.html#section-F.1.37">Intel BMI1 and BMI2 instructions, AMD TBM instructions</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.38: </span><a href="nasmdocf.html#section-F.1.38">Intel Memory Protection Extensions (MPX)</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.39: </span><a href="nasmdocf.html#section-F.1.39">Intel SHA acceleration instructions</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.40: </span><a href="nasmdocf.html#section-F.1.40">AVX no exception conversions</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.41: </span><a href="nasmdocf.html#section-F.1.41">AVX Vector Neural Network Instructions</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.42: </span><a href="nasmdocf.html#section-F.1.42">AVX Integer Fused Multiply-Add</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.43: </span><a href="nasmdocf.html#section-F.1.43">AVX-512 mask register instructions</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.44: </span><a href="nasmdocf.html#section-F.1.44">AVX-512 mask register instructions (aliases requiring explicit size support)</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.45: </span><a href="nasmdocf.html#section-F.1.45">AVX-512 instructions</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.46: </span><a href="nasmdocf.html#section-F.1.46">Intel memory protection keys for userspace (PKU aka PKEYs)</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.47: </span><a href="nasmdocf.html#section-F.1.47">Read Processor ID</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.48: </span><a href="nasmdocf.html#section-F.1.48">New memory instructions</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.49: </span><a href="nasmdocf.html#section-F.1.49">Processor trace write</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.50: </span><a href="nasmdocf.html#section-F.1.50">Instructions from the Intel Instruction Set Extensions,</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.51: </span><a href="nasmdocf.html#section-F.1.51">doc 319433-034 May 2018</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.52: </span><a href="nasmdocf.html#section-F.1.52">Galois field operations (GFNI)</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.53: </span><a href="nasmdocf.html#section-F.1.53">AVX512 Vector Bit Manipulation Instructions 2</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.54: </span><a href="nasmdocf.html#section-F.1.54">AVX512 VNNI</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.55: </span><a href="nasmdocf.html#section-F.1.55">AVX512 Bit Algorithms</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.56: </span><a href="nasmdocf.html#section-F.1.56">AVX512 4-iteration Multiply-Add</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.57: </span><a href="nasmdocf.html#section-F.1.57">AVX512 4-iteration Dot Product</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.58: </span><a href="nasmdocf.html#section-F.1.58">Intel Software Guard Extensions (SGX)</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.59: </span><a href="nasmdocf.html#section-F.1.59">Intel Control-Flow Enforcement Technology (CET)</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.60: </span><a href="nasmdocf.html#section-F.1.60">Instructions from ISE doc 319433-040, June 2020</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.61: </span><a href="nasmdocf.html#section-F.1.61">AVX512 Bfloat16 instructions</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.62: </span><a href="nasmdocf.html#section-F.1.62">AVX512 mask intersect instructions</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.63: </span><a href="nasmdocf.html#section-F.1.63">Intel Advanced Matrix Extensions (AMX)</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.64: </span><a href="nasmdocf.html#section-F.1.64">Intel AVX512-FP16 instructions</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.65: </span><a href="nasmdocf.html#section-F.1.65">RAO-INT weakly ordered atomic operations</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.66: </span><a href="nasmdocf.html#section-F.1.66">User interrupts</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.67: </span><a href="nasmdocf.html#section-F.1.67">Compare, exchange and add conditional</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.68: </span><a href="nasmdocf.html#section-F.1.68">WRMSRNS and MSRLIST instructions</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.69: </span><a href="nasmdocf.html#section-F.1.69">History reset</a>
-</li>
-<li class="toc3">
-<span class="node">Section F.1.70: </span><a href="nasmdocf.html#section-F.1.70">Systematic names for the hinting nop instructions</a>
-</li>
-</ol>
-</li>
-</ol>
-</li>
-</ol>
-</div>
-</body>
-</html>

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-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.1//EN" "http://www.w3.org/TR/xhtml11/DTD/xhtml11.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<meta charset="UTF-8" />
-<title>NASM - The Netwide Assembler</title>
-<link href="nasmdoc.css" rel="stylesheet" type="text/css" />
-<link href="local.css" rel="stylesheet" type="text/css" />
-</head>
-<body>
-<ul class="navbar">
-<li><a class="next" href="nasmdoc2.html">Chapter 2</a></li>
-<li><a class="toc" href="nasmdoc0.html">Contents</a></li>
-<li class="last"><a class="index" href="nasmdoci.html">Index</a></li>
-</ul>
-<div class="title">
-<h1>NASM - The Netwide Assembler</h1>
-<span class="subtitle">version 2.16.01</span>
-</div>
-<div class="contents"
->
-<h2 id="chapter-1">Chapter 1: Introduction</h2>
-<h3 id="section-1.1">1.1 What Is NASM?</h3>
-<p>The Netwide Assembler, NASM, is an 80x86 and x86-64 assembler designed
-for portability and modularity. It supports a range of object file formats,
-including Linux and *BSD <code>a.out</code>, ELF, Mach-O, 16-bit and 32-bit
-<code>.obj</code> (OMF) format, COFF (including its Win32 and Win64
-variants.) It can also output plain binary files, Intel hex and Motorola
-S-Record formats. Its syntax is designed to be simple and easy to
-understand, similar to the syntax in the Intel Software Developer Manual
-with minimal complexity. It supports all currently known x86 architectural
-extensions, and has strong support for macros.</p>
-<h4 id="section-1.1.1">1.1.1 License</h4>
-<p>NASM is under the so-called 2-clause BSD license, also known as the
-simplified BSD license:</p>
-<p>Copyright 1996-2022 the NASM Authors &ndash; All rights reserved.</p>
-<p>Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:</p>
-<ul>
-<li>
-<p>Redistributions of source code must retain the above copyright notice,
-this list of conditions and the following disclaimer.</p>
-</li>
-<li>
-<p>Redistributions in binary form must reproduce the above copyright
-notice, this list of conditions and the following disclaimer in the
-documentation and/or other materials provided with the distribution.</p>
-</li>
-</ul>
-<p>THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
-CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
-EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
-PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
-OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
-WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
-OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</p>
-</div>
-</body>
-</html>

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-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.1//EN" "http://www.w3.org/TR/xhtml11/DTD/xhtml11.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<meta charset="UTF-8" />
-<title>NASM - The Netwide Assembler</title>
-<link href="nasmdoc.css" rel="stylesheet" type="text/css" />
-<link href="local.css" rel="stylesheet" type="text/css" />
-</head>
-<body>
-<ul class="navbar">
-<li class="first"><a class="prev" href="nasmdoc1.html">Chapter 1</a></li>
-<li><a class="next" href="nasmdoc3.html">Chapter 3</a></li>
-<li><a class="toc" href="nasmdoc0.html">Contents</a></li>
-<li class="last"><a class="index" href="nasmdoci.html">Index</a></li>
-</ul>
-<div class="title">
-<h1>NASM - The Netwide Assembler</h1>
-<span class="subtitle">version 2.16.01</span>
-</div>
-<div class="contents"
->
-<h2 id="chapter-2">Chapter 2: Running NASM</h2>
-<h3 id="section-2.1">2.1 NASM Command-Line Syntax</h3>
-<p>To assemble a file, you issue a command of the form</p>
-<pre>
-nasm -f &lt;format&gt; &lt;filename&gt; -o &lt;output&gt;
-</pre>
-<p>For example,</p>
-<pre>
-nasm -f elf myfile.asm
-</pre>
-<p>will assemble <code>myfile.asm</code> into an ELF object file
-<code>myfile.o</code>. And</p>
-<pre>
-nasm -f bin myfile.asm -o myfile.com
-</pre>
-<p>will assemble <code>myfile.asm</code> into a raw binary file
-<code>myfile.com</code>.</p>
-<p>To produce a listing file, with the hex codes output from NASM displayed
-on the left of the original sources, use the <code>-l</code> option to give
-a listing file name, for example:</p>
-<pre>
-nasm -f coff myfile.asm -l myfile.lst
-</pre>
-<p>To get further usage instructions from NASM, try typing</p>
-<pre>
-nasm -h
-</pre>
-<p>The option <code>--help</code> is an alias for the <code>-h</code>
-option.</p>
-<p>If you use Linux but aren't sure whether your system is
-<code>a.out</code> or ELF, type</p>
-<pre>
-file nasm
-</pre>
-<p>(in the directory in which you put the NASM binary when you installed
-it). If it says something like</p>
-<pre>
-nasm: ELF 32-bit LSB executable i386 (386 and up) Version 1
-</pre>
-<p>then your system is <code>ELF</code>, and you should use the option
-<code>-f elf</code> when you want NASM to produce Linux object files. If it
-says</p>
-<pre>
-nasm: Linux/i386 demand-paged executable (QMAGIC)
-</pre>
-<p>or something similar, your system is <code>a.out</code>, and you should
-use <code>-f aout</code> instead (Linux <code>a.out</code> systems have
-long been obsolete, and are rare these days.)</p>
-<p>Like Unix compilers and assemblers, NASM is silent unless it goes wrong:
-you won't see any output at all, unless it gives error messages.</p>
-<h4 id="section-2.1.1">2.1.1 The <code>-o</code> Option: Specifying the Output File Name</h4>
-<p>NASM will normally choose the name of your output file for you;
-precisely how it does this is dependent on the object file format. For
-Microsoft object file formats (<code>obj</code>, <code>win32</code> and
-<code>win64</code>), it will remove the <code>.asm</code> extension (or
-whatever extension you like to use &ndash; NASM doesn't care) from your
-source file name and substitute <code>.obj</code>. For Unix object file
-formats (<code>aout</code>, <code>as86</code>, <code>coff</code>,
-<code>elf32</code>, <code>elf64</code>, <code>elfx32</code>,
-<code>ieee</code>, <code>macho32</code> and <code>macho64</code>) it will
-substitute <code>.o</code>. For <code>dbg</code>, <code>ith</code> and
-<code>srec</code>, it will use <code>.dbg</code>, <code>.ith</code> and
-<code>.srec</code>, respectively, and for the <code>bin</code> format it
-will simply remove the extension, so that <code>myfile.asm</code> produces
-the output file <code>myfile</code>.</p>
-<p>If the output file already exists, NASM will overwrite it, unless it has
-the same name as the input file, in which case it will give a warning and
-use <code>nasm.out</code> as the output file name instead.</p>
-<p>For situations in which this behaviour is unacceptable, NASM provides
-the <code>-o</code> command-line option, which allows you to specify your
-desired output file name. You invoke <code>-o</code> by following it with
-the name you wish for the output file, either with or without an
-intervening space. For example:</p>
-<pre>
-nasm -f bin program.asm -o program.com 
-nasm -f bin driver.asm -odriver.sys
-</pre>
-<p>Note that this is a small o, and is different from a capital O , which
-is used to specify the number of optimization passes required. See
-<a href="#section-2.1.24">section 2.1.24</a>.</p>
-<h4 id="section-2.1.2">2.1.2 The <code>-f</code> Option: Specifying the Output File Format</h4>
-<p>If you do not supply the <code>-f</code> option to NASM, it will choose
-an output file format for you itself. In the distribution versions of NASM,
-the default is always <code>bin</code>; if you've compiled your own copy of
-NASM, you can redefine <code>OF_DEFAULT</code> at compile time and choose
-what you want the default to be.</p>
-<p>Like <code>-o</code>, the intervening space between <code>-f</code> and
-the output file format is optional; so <code>-f elf</code> and
-<code>-felf</code> are both valid.</p>
-<p>A complete list of the available output file formats can be given by
-issuing the command <code>nasm -h</code>.</p>
-<h4 id="section-2.1.3">2.1.3 The <code>-l</code> Option: Generating a Listing File</h4>
-<p>If you supply the <code>-l</code> option to NASM, followed (with the
-usual optional space) by a file name, NASM will generate a source-listing
-file for you, in which addresses and generated code are listed on the left,
-and the actual source code, with expansions of multi-line macros (except
-those which specifically request no expansion in source listings: see
-<a href="nasmdoc4.html#section-4.5.11">section 4.5.11</a>) on the right.
-For example:</p>
-<pre>
-nasm -f elf myfile.asm -l myfile.lst
-</pre>
-<p>If a list file is selected, you may turn off listing for a section of
-your source with <code>list -</code>, and turn it back on with
-<code>list +</code>, (the default, obviously). There is no "user form"
-(without the brackets). This can be used to list only sections of interest,
-avoiding excessively long listings.</p>
-<h4 id="section-2.1.4">2.1.4 The <code>-L</code> Option: Additional or Modified Listing Info</h4>
-<p>Use this option to specify listing output details.</p>
-<p>Supported options are:</p>
-<ul>
-<li>
-<p><code>-Lb</code> show builtin macro packages (standard and
-<code>%use</code>)</p>
-</li>
-<li>
-<p><code>-Ld</code> show byte and repeat counts in decimal, not hex</p>
-</li>
-<li>
-<p><code>-Le</code> show the preprocessed input</p>
-</li>
-<li>
-<p><code>-Lf</code> ignore <code>.nolist</code> and force listing output</p>
-</li>
-<li>
-<p><code>-Lm</code> show multi-line macro calls with expanded parameters</p>
-</li>
-<li>
-<p><code>-Lp</code> output a list file in every pass, in case of errors</p>
-</li>
-<li>
-<p><code>-Ls</code> show all single-line macro definitions</p>
-</li>
-<li>
-<p><code>-Lw</code> flush the output after every line (very slow, mainly
-useful to debug NASM crashes)</p>
-</li>
-<li>
-<p><code>-L+</code> enable <em>all</em> listing options except
-<code>-Lw</code> (very verbose)</p>
-</li>
-</ul>
-<p>These options can be enabled or disabled at runtime using the
-<code>%pragma list options</code> directive:</p>
-<pre>
-%pragma list options +|-flags...
-</pre>
-<p>For example, to turn on the <code>d</code> and <code>m</code> flags but
-disable the <code>s</code> flag:</p>
-<pre>
-%pragma list options +dm -s
-</pre>
-<p>For forward compatility reasons, an undefined flag will be ignored.
-Thus, a new flag introduced in a newer version of NASM can be specified
-without breaking older versions. Listing flags will always be a single
-alphanumeric character and are case sensitive.</p>
-<h4 id="section-2.1.5">2.1.5 The <code>-M</code> Option: Generate Makefile Dependencies</h4>
-<p>This option can be used to generate makefile dependencies on stdout.
-This can be redirected to a file for further processing. For example:</p>
-<pre>
-nasm -M myfile.asm &gt; myfile.dep
-</pre>
-<h4 id="section-2.1.6">2.1.6 The <code>-MG</code> Option: Generate Makefile Dependencies</h4>
-<p>This option can be used to generate makefile dependencies on stdout.
-This differs from the <code>-M</code> option in that if a nonexisting file
-is encountered, it is assumed to be a generated file and is added to the
-dependency list without a prefix.</p>
-<h4 id="section-2.1.7">2.1.7 The <code>-MF</code> Option: Set Makefile Dependency File</h4>
-<p>This option can be used with the <code>-M</code> or <code>-MG</code>
-options to send the output to a file, rather than to stdout. For example:</p>
-<pre>
-nasm -M -MF myfile.dep myfile.asm
-</pre>
-<h4 id="section-2.1.8">2.1.8 The <code>-MD</code> Option: Assemble and Generate Dependencies</h4>
-<p>The <code>-MD</code> option acts as the combination of the
-<code>-M</code> and <code>-MF</code> options (i.e. a filename has to be
-specified.) However, unlike the <code>-M</code> or <code>-MG</code>
-options, <code>-MD</code> does <em>not</em> inhibit the normal operation of
-the assembler. Use this to automatically generate updated dependencies with
-every assembly session. For example:</p>
-<pre>
-nasm -f elf -o myfile.o -MD myfile.dep myfile.asm
-</pre>
-<p>If the argument after <code>-MD</code> is an option rather than a
-filename, then the output filename is the first applicable one of:</p>
-<ul>
-<li>
-<p>the filename set in the <code>-MF</code> option;</p>
-</li>
-<li>
-<p>the output filename from the <code>-o</code> option with <code>.d</code>
-appended;</p>
-</li>
-<li>
-<p>the input filename with the extension set to <code>.d</code>.</p>
-</li>
-</ul>
-<h4 id="section-2.1.9">2.1.9 The <code>-MT</code> Option: Dependency Target Name</h4>
-<p>The <code>-MT</code> option can be used to override the default name of
-the dependency target. This is normally the same as the output filename,
-specified by the <code>-o</code> option.</p>
-<h4 id="section-2.1.10">2.1.10 The <code>-MQ</code> Option: Dependency Target Name (Quoted)</h4>
-<p>The <code>-MQ</code> option acts as the <code>-MT</code> option, except
-it tries to quote characters that have special meaning in Makefile syntax.
-This is not foolproof, as not all characters with special meaning are
-quotable in Make. The default output (if no <code>-MT</code> or
-<code>-MQ</code> option is specified) is automatically quoted.</p>
-<h4 id="section-2.1.11">2.1.11 The <code>-MP</code> Option: Emit phony targets</h4>
-<p>When used with any of the dependency generation options, the
-<code>-MP</code> option causes NASM to emit a phony target without
-dependencies for each header file. This prevents Make from complaining if a
-header file has been removed.</p>
-<h4 id="section-2.1.12">2.1.12 The <code>-MW</code> Option: Watcom Make quoting style</h4>
-<p>This option causes NASM to attempt to quote dependencies according to
-Watcom Make conventions rather than POSIX Make conventions (also used by
-most other Make variants.) This quotes <code>#</code> as <code>$#</code>
-rather than <code>\#</code>, uses <code>&amp;</code> rather than
-<code>\</code> for continuation lines, and encloses filenames containing
-whitespace in double quotes.</p>
-<h4 id="section-2.1.13">2.1.13 The <code>-F</code> Option: Selecting a Debug Information Format</h4>
-<p>This option is used to select the format of the debug information
-emitted into the output file, to be used by a debugger (or <em>will</em>
-be). Prior to version 2.03.01, the use of this switch did <em>not</em>
-enable output of the selected debug info format. Use <code>-g</code>, see
-<a href="#section-2.1.14">section 2.1.14</a>, to enable output. Versions
-2.03.01 and later automatically enable <code>-g</code> if <code>-F</code>
-is specified.</p>
-<p>A complete list of the available debug file formats for an output format
-can be seen by issuing the command <code>nasm -h</code>. Not all output
-formats currently support debugging output.</p>
-<p>This should not be confused with the <code>-f dbg</code> output format
-option, see <a href="nasmdoc8.html#section-8.13">section 8.13</a>.</p>
-<h4 id="section-2.1.14">2.1.14 The <code>-g</code> Option: Enabling Debug Information.</h4>
-<p>This option can be used to generate debugging information in the
-specified format. See <a href="#section-2.1.13">section 2.1.13</a>. Using
-<code>-g</code> without <code>-F</code> results in emitting debug info in
-the default format, if any, for the selected output format. If no debug
-information is currently implemented in the selected output format,
-<code>-g</code> is <em>silently ignored</em>.</p>
-<h4 id="section-2.1.15">2.1.15 The <code>-X</code> Option: Selecting an Error Reporting Format</h4>
-<p>This option can be used to select an error reporting format for any
-error messages that might be produced by NASM.</p>
-<p>Currently, two error reporting formats may be selected. They are the
-<code>-Xvc</code> option and the <code>-Xgnu</code> option. The GNU format
-is the default and looks like this:</p>
-<pre>
-filename.asm:65: error: specific error message
-</pre>
-<p>where <code>filename.asm</code> is the name of the source file in which
-the error was detected, <code>65</code> is the source file line number on
-which the error was detected, <code>error</code> is the severity of the
-error (this could be <code>warning</code>), and
-<code>specific error message</code> is a more detailed text message which
-should help pinpoint the exact problem.</p>
-<p>The other format, specified by <code>-Xvc</code> is the style used by
-Microsoft Visual C++ and some other programs. It looks like this:</p>
-<pre>
-filename.asm(65) : error: specific error message
-</pre>
-<p>where the only difference is that the line number is in parentheses
-instead of being delimited by colons.</p>
-<p>See also the <code>Visual C++</code> output format,
-<a href="nasmdoc8.html#section-8.5">section 8.5</a>.</p>
-<h4 id="section-2.1.16">2.1.16 The <code>-Z</code> Option: Send Errors to a File</h4>
-<p>Under <code>MS-DOS</code> it can be difficult (though there are ways) to
-redirect the standard-error output of a program to a file. Since NASM
-usually produces its warning and error messages on <code>stderr</code>,
-this can make it hard to capture the errors if (for example) you want to
-load them into an editor.</p>
-<p>NASM therefore provides the <code>-Z</code> option, taking a filename
-argument which causes errors to be sent to the specified files rather than
-standard error. Therefore you can redirect the errors into a file by typing</p>
-<pre>
-nasm -Z myfile.err -f obj myfile.asm
-</pre>
-<p>In earlier versions of NASM, this option was called <code>-E</code>, but
-it was changed since <code>-E</code> is an option conventionally used for
-preprocessing only, with disastrous results. See
-<a href="#section-2.1.22">section 2.1.22</a>.</p>
-<h4 id="section-2.1.17">2.1.17 The <code>-s</code> Option: Send Errors to <code>stdout</code></h4>
-<p>The <code>-s</code> option redirects error messages to
-<code>stdout</code> rather than <code>stderr</code>, so it can be
-redirected under <code>MS-DOS</code>. To assemble the file
-<code>myfile.asm</code> and pipe its output to the <code>more</code>
-program, you can type:</p>
-<pre>
-nasm -s -f obj myfile.asm | more
-</pre>
-<p>See also the <code>-Z</code> option, <a href="#section-2.1.16">section
-2.1.16</a>.</p>
-<h4 id="section-2.1.18">2.1.18 The <code>-i</code> Option: Include File Search Directories</h4>
-<p>When NASM sees the <code>%include</code> or <code>%pathsearch</code>
-directive in a source file (see
-<a href="nasmdoc4.html#section-4.8.1">section 4.8.1</a>,
-<a href="nasmdoc4.html#section-4.8.2">section 4.8.2</a> or
-<a href="nasmdoc3.html#section-3.2.3">section 3.2.3</a>), it will search
-for the given file not only in the current directory, but also in any
-directories specified on the command line by the use of the <code>-i</code>
-option. Therefore you can include files from a macro library, for example,
-by typing</p>
-<pre>
-nasm -ic:\macrolib\ -f obj myfile.asm
-</pre>
-<p>(As usual, a space between <code>-i</code> and the path name is allowed,
-and optional).</p>
-<p>Prior NASM 2.14 a path provided in the option has been considered as a
-verbatim copy and providing a path separator been up to a caller. One could
-implicitly concatenate a search path together with a filename. Still this
-was rather a trick than something useful. Now the trailing path separator
-is made to always present, thus <code>-ifoo</code> will be considered as
-the <code>-ifoo/</code> directory.</p>
-<p>If you want to define a <em>standard</em> include search path, similar
-to <code>/usr/include</code> on Unix systems, you should place one or more
-<code>-i</code> directives in the <code>NASMENV</code> environment variable
-(see <a href="#section-2.1.35">section 2.1.35</a>).</p>
-<p>For Makefile compatibility with many C compilers, this option can also
-be specified as <code>-I</code>.</p>
-<h4 id="section-2.1.19">2.1.19 The <code>-p</code> Option: Pre-Include a File</h4>
-<p>NASM allows you to specify files to be <em>pre-included</em> into your
-source file, by the use of the <code>-p</code> option. So running</p>
-<pre>
-nasm myfile.asm -p myinc.inc
-</pre>
-<p>is equivalent to running <code>nasm myfile.asm</code> and placing the
-directive <code>%include "myinc.inc"</code> at the start of the file.</p>
-<p><code>--include</code> option is also accepted.</p>
-<p>For consistency with the <code>-I</code>, <code>-D</code> and
-<code>-U</code> options, this option can also be specified as
-<code>-P</code>.</p>
-<h4 id="section-2.1.20">2.1.20 The <code>-d</code> Option: Pre-Define a Macro</h4>
-<p>Just as the <code>-p</code> option gives an alternative to placing
-<code>%include</code> directives at the start of a source file, the
-<code>-d</code> option gives an alternative to placing a
-<code>%define</code> directive. You could code</p>
-<pre>
-nasm myfile.asm -dFOO=100
-</pre>
-<p>as an alternative to placing the directive</p>
-<pre>
-%define FOO 100
-</pre>
-<p>at the start of the file. You can miss off the macro value, as well: the
-option <code>-dFOO</code> is equivalent to coding <code>%define FOO</code>.
-This form of the directive may be useful for selecting assembly-time
-options which are then tested using <code>%ifdef</code>, for example
-<code>-dDEBUG</code>.</p>
-<p>For Makefile compatibility with many C compilers, this option can also
-be specified as <code>-D</code>.</p>
-<h4 id="section-2.1.21">2.1.21 The <code>-u</code> Option: Undefine a Macro</h4>
-<p>The <code>-u</code> option undefines a macro that would otherwise have
-been pre-defined, either automatically or by a <code>-p</code> or
-<code>-d</code> option specified earlier on the command lines.</p>
-<p>For example, the following command line:</p>
-<pre>
-nasm myfile.asm -dFOO=100 -uFOO
-</pre>
-<p>would result in <code>FOO</code> <em>not</em> being a predefined macro
-in the program. This is useful to override options specified at a different
-point in a Makefile.</p>
-<p>For Makefile compatibility with many C compilers, this option can also
-be specified as <code>-U</code>.</p>
-<h4 id="section-2.1.22">2.1.22 The <code>-E</code> Option: Preprocess Only</h4>
-<p>NASM allows the preprocessor to be run on its own, up to a point. Using
-the <code>-E</code> option (which requires no arguments) will cause NASM to
-preprocess its input file, expand all the macro references, remove all the
-comments and preprocessor directives, and print the resulting file on
-standard output (or save it to a file, if the <code>-o</code> option is
-also used).</p>
-<p>This option cannot be applied to programs which require the preprocessor
-to evaluate expressions which depend on the values of symbols: so code such
-as</p>
-<pre>
-%assign tablesize ($-tablestart)
-</pre>
-<p>will cause an error in preprocess-only mode.</p>
-<p>For compatibility with older version of NASM, this option can also be
-written <code>-e</code>. <code>-E</code> in older versions of NASM was the
-equivalent of the current <code>-Z</code> option,
-<a href="#section-2.1.16">section 2.1.16</a>.</p>
-<h4 id="section-2.1.23">2.1.23 The <code>-a</code> Option: Don't Preprocess At All</h4>
-<p>If NASM is being used as the back end to a compiler, it might be
-desirable to suppress preprocessing completely and assume the compiler has
-already done it, to save time and increase compilation speeds. The
-<code>-a</code> option, requiring no argument, instructs NASM to replace
-its powerful preprocessor with a stub preprocessor which does nothing.</p>
-<h4 id="section-2.1.24">2.1.24 The <code>-O</code> Option: Specifying Multipass Optimization</h4>
-<p>Using the <code>-O</code> option, you can tell NASM to carry out
-different levels of optimization. Multiple flags can be specified after the
-<code>-O</code> options, some of which can be combined in a single option,
-e.g. <code>-Oxv</code>.</p>
-<ul>
-<li>
-<p><code>-O0</code>: No optimization. All operands take their long forms,
-if a short form is not specified, except conditional jumps. This is
-intended to match NASM 0.98 behavior.</p>
-</li>
-<li>
-<p><code>-O1</code>: Minimal optimization. As above, but immediate operands
-which will fit in a signed byte are optimized, unless the long form is
-specified. Conditional jumps default to the long form unless otherwise
-specified.</p>
-</li>
-<li>
-<p><code>-Ox</code> (where <code>x</code> is the actual letter
-<code>x</code>): Multipass optimization. Minimize branch offsets and signed
-immediate bytes, overriding size specification unless the
-<code>strict</code> keyword has been used (see
-<a href="nasmdoc3.html#section-3.7">section 3.7</a>). For compatibility
-with earlier releases, the letter <code>x</code> may also be any number
-greater than one. This number has no effect on the actual number of passes.</p>
-</li>
-<li>
-<p><code>-Ov</code>: At the end of assembly, print the number of passes
-actually executed.</p>
-</li>
-</ul>
-<p>The <code>-Ox</code> mode is recommended for most uses, and is the
-default since NASM 2.09.</p>
-<p>Note that this is a capital <code>O</code>, and is different from a
-small <code>o</code>, which is used to specify the output file name. See
-<a href="#section-2.1.1">section 2.1.1</a>.</p>
-<h4 id="section-2.1.25">2.1.25 The <code>-t</code> Option: Enable TASM Compatibility Mode</h4>
-<p>NASM includes a limited form of compatibility with Borland's
-<code>TASM</code>. When NASM's <code>-t</code> option is used, the
-following changes are made:</p>
-<ul>
-<li>
-<p>local labels may be prefixed with <code>@@</code> instead of
-<code>.</code></p>
-</li>
-<li>
-<p>size override is supported within brackets. In TASM compatible mode, a
-size override inside square brackets changes the size of the operand, and
-not the address type of the operand as it does in NASM syntax. E.g.
-<code>mov eax,DWORD val</code> is valid syntax in TASM compatibility
-mode. Note that you lose the ability to override the default address type
-for the instruction.</p>
-</li>
-<li>
-<p>unprefixed forms of some directives supported (<code>arg</code>,
-<code>elif</code>, <code>else</code>, <code>endif</code>, <code>if</code>,
-<code>ifdef</code>, <code>ifdifi</code>, <code>ifndef</code>,
-<code>include</code>, <code>local</code>)</p>
-</li>
-</ul>
-<h4 id="section-2.1.26">2.1.26 The <code>-w</code> and <code>-W</code> Options: Enable or Disable Assembly Warnings</h4>
-<p>NASM can observe many conditions during the course of assembly which are
-worth mentioning to the user, but not a sufficiently severe error to
-justify NASM refusing to generate an output file. These conditions are
-reported like errors, but come up with the word `warning' before the
-message. Warnings do not prevent NASM from generating an output file and
-returning a success status to the operating system.</p>
-<p>Some conditions are even less severe than that: they are only sometimes
-worth mentioning to the user. Therefore NASM supports the <code>-w</code>
-command-line option, which enables or disables certain classes of assembly
-warning. Such warning classes are described by a name, for example
-<code>label-orphan</code>; you can enable warnings of this class by the
-command-line option <code>-w+label-orphan</code> and disable it by
-<code>-w-label-orphan</code>.</p>
-<p>Since version 2.15, NASM has group aliases for all prefixed warnings, so
-they can be used to enable or disable all warnings in the group. For
-example, &ndash;w+float enables all warnings with names starting with
-float-*.</p>
-<p>Since version 2.00, NASM has also supported the
-<code>gcc</code>&ndash;like syntax <code>-Wwarning-class</code> and
-<code>-Wno-warning-class</code> instead of <code>-w+warning-class</code>
-and <code>-w-warning-class</code>, respectively; both syntaxes work
-identically.</p>
-<p>The option <code>-w+error</code> or <code>-Werror</code> can be used to
-treat warnings as errors. This can be controlled on a per warning class
-basis (<code>-w+error=</code><em>warning-class</em> or
-<code>-Werror=</code><em>warning-class</em>); if no <em>warning-class</em>
-is specified NASM treats it as <code>-w+error=all</code>; the same applies
-to <code>-w-error</code> or <code>-Wno-error</code>, of course.</p>
-<p>In addition, you can control warnings in the source code itself, using
-the <code>WARNING</code> directive. See
-<a href="nasmdoc7.html#section-7.13">section 7.13</a>.</p>
-<p>See <a href="nasmdoca.html">appendix A</a> for the complete list of
-warning classes.</p>
-<h4 id="section-2.1.27">2.1.27 The <code>-v</code> Option: Display Version Info</h4>
-<p>Typing <code>NASM -v</code> will display the version of NASM which you
-are using, and the date on which it was compiled.</p>
-<p>You will need the version number if you report a bug.</p>
-<p>For command-line compatibility with Yasm, the form <code>--v</code> is
-also accepted for this option starting in NASM version 2.11.05.</p>
-<h4 id="section-2.1.28">2.1.28 The <code>--(g|l)prefix</code>, <code>--(g|l)postfix</code> Options.</h4>
-<p>The <code>--(g)prefix</code> options prepend the given argument to all
-<code>extern</code>, <code>common</code>, <code>static</code>, and
-<code>global</code> symbols, and the <code>--lprefix</code> option prepends
-to all other symbols. Similarly, <code>--(g)postfix</code> and
-<code>--lpostfix</code> options append the argument in the exactly same way
-as the <code>--xxprefix</code> options does.</p>
-<p>Running this:</p>
-<pre>
-nasm -f macho --gprefix _
-</pre>
-<p>is equivalent to place the directive with
-<code>%pragma macho gprefix _</code> at the start of the file
-(<a href="nasmdoc7.html#section-7.10">section 7.10</a>). It will prepend
-the underscore to all global and external variables, as C requires it in
-some, but not all, system calling conventions.</p>
-<h4 id="section-2.1.29">2.1.29 The <code>--pragma</code> Option</h4>
-<p>NASM accepts an argument as <code>%pragma</code> option, which is like
-placing a <code>%pragma</code> preprocess statement at the beginning of the
-source. Running this:</p>
-<pre>
-nasm -f macho --pragma "macho gprefix _"
-</pre>
-<p>is equivalent to the example in <a href="#section-2.1.28">section
-2.1.28</a>. See <a href="nasmdoc4.html#section-4.12">section 4.12</a>.</p>
-<h4 id="section-2.1.30">2.1.30 The <code>--before</code> Option</h4>
-<p>A preprocess statement can be accepted with this option. The example
-shown in <a href="#section-2.1.29">section 2.1.29</a> is the same as
-running this:</p>
-<pre>
-nasm -f macho --before "%pragma macho gprefix _"
-</pre>
-<h4 id="section-2.1.31">2.1.31 The <code>--limit-X</code> Option</h4>
-<p>This option allows user to setup various maximum values after which NASM
-will terminate with a fatal error rather than consume arbitrary amount of
-compute time. Each limit can be set to a positive number or
-<code>unlimited</code>.</p>
-<ul>
-<li>
-<p><code>--limit-passes</code>: Number of maximum allowed passes. Default
-is <code>unlimited</code>.</p>
-</li>
-<li>
-<p><code>--limit-stalled-passes</code>: Maximum number of allowed
-unfinished passes. Default is 1000.</p>
-</li>
-<li>
-<p><code>--limit-macro-levels</code>: Define maximum depth of macro
-expansion (in preprocess). Default is 10000</p>
-</li>
-<li>
-<p><code>--limit-macro-tokens</code>: Maximum number of tokens processed
-during single-line macro expansion. Default is 10000000.</p>
-</li>
-<li>
-<p><code>--limit-mmacros</code>: Maximum number of multi-line macros
-processed before returning to the top-level input. Default is 100000.</p>
-</li>
-<li>
-<p><code>--limit-rep</code>: Maximum number of allowed preprocessor loop,
-defined under <code>%rep</code>. Default is 1000000.</p>
-</li>
-<li>
-<p><code>--limit-eval</code>: This number sets the boundary condition of
-allowed expression length. Default is 8192 on most systems.</p>
-</li>
-<li>
-<p><code>--limit-lines</code>: Total number of source lines allowed to be
-processed. Default is 2000000000.</p>
-</li>
-</ul>
-<p>For example, set the maximum line count to 1000:</p>
-<pre>
-nasm --limit-lines 1000
-</pre>
-<p>Limits can also be set via the directive <code>%pragma limit</code>, for
-example:</p>
-<pre>
-%pragma limit lines 1000
-</pre>
-<h4 id="section-2.1.32">2.1.32 The <code>--keep-all</code> Option</h4>
-<p>This option prevents NASM from deleting any output files even if an
-error happens.</p>
-<h4 id="section-2.1.33">2.1.33 The <code>--no-line</code> Option</h4>
-<p>If this option is given, all <code>%line</code> directives in the source
-code are ignored. This can be useful for debugging already preprocessed
-code. See <a href="nasmdoc4.html#section-4.13.1">section 4.13.1</a>.</p>
-<h4 id="section-2.1.34">2.1.34 The <code>--reproducible</code> Option</h4>
-<p>If this option is given, NASM will not emit information that is
-inherently dependent on the NASM version or different from run to run (such
-as timestamps) into the output file.</p>
-<h4 id="section-2.1.35">2.1.35 The <code>NASMENV</code> Environment Variable</h4>
-<p>If you define an environment variable called <code>NASMENV</code>, the
-program will interpret it as a list of extra command-line options, which
-are processed before the real command line. You can use this to define
-standard search directories for include files, by putting <code>-i</code>
-options in the <code>NASMENV</code> variable.</p>
-<p>The value of the variable is split up at white space, so that the value
-<code>-s -ic:\nasmlib\</code> will be treated as two separate options.
-However, that means that the value <code>-dNAME="my name"</code> won't do
-what you might want, because it will be split at the space and the NASM
-command-line processing will get confused by the two nonsensical words
-<code>-dNAME="my</code> and <code>name"</code>.</p>
-<p>To get round this, NASM provides a feature whereby, if you begin the
-<code>NASMENV</code> environment variable with some character that isn't a
-minus sign, then NASM will treat this character as the separator character
-for options. So setting the <code>NASMENV</code> variable to the value
-<code>!-s!-ic:\nasmlib\</code> is equivalent to setting it to
-<code>-s -ic:\nasmlib\</code>, but <code>!-dNAME="my name"</code> will
-work.</p>
-<p>This environment variable was previously called <code>NASM</code>. This
-was changed with version 0.98.31.</p>
-<h3 id="section-2.2">2.2 Quick Start for MASM Users</h3>
-<p>If you're used to writing programs with MASM, or with TASM in
-MASM-compatible (non-Ideal) mode, or with <code>a86</code>, this section
-attempts to outline the major differences between MASM's syntax and NASM's.
-If you're not already used to MASM, it's probably worth skipping this
-section.</p>
-<h4 id="section-2.2.1">2.2.1 NASM Is Case-Sensitive</h4>
-<p>One simple difference is that NASM is case-sensitive. It makes a
-difference whether you call your label <code>foo</code>, <code>Foo</code>
-or <code>FOO</code>. If you're assembling to <code>DOS</code> or
-<code>OS/2</code> <code>.OBJ</code> files, you can invoke the
-<code>UPPERCASE</code> directive (documented in
-<a href="nasmdoc8.html#section-8.4">section 8.4</a>) to ensure that all
-symbols exported to other code modules are forced to be upper case; but
-even then, <em>within</em> a single module, NASM will distinguish between
-labels differing only in case.</p>
-<h4 id="section-2.2.2">2.2.2 NASM Requires Square Brackets For Memory References</h4>
-<p>NASM was designed with simplicity of syntax in mind. One of the design
-goals of NASM is that it should be possible, as far as is practical, for
-the user to look at a single line of NASM code and tell what opcode is
-generated by it. You can't do this in MASM: if you declare, for example,</p>
-<pre>
-foo     equ     1 
-bar     dw      2
-</pre>
-<p>then the two lines of code</p>
-<pre>
-        mov     ax,foo 
-        mov     ax,bar
-</pre>
-<p>generate completely different opcodes, despite having identical-looking
-syntaxes.</p>
-<p>NASM avoids this undesirable situation by having a much simpler syntax
-for memory references. The rule is simply that any access to the
-<em>contents</em> of a memory location requires square brackets around the
-address, and any access to the <em>address</em> of a variable doesn't. So
-an instruction of the form <code>mov ax,foo</code> will <em>always</em>
-refer to a compile-time constant, whether it's an <code>EQU</code> or the
-address of a variable; and to access the <em>contents</em> of the variable
-<code>bar</code>, you must code <code>mov ax,bar</code>.</p>
-<p>This also means that NASM has no need for MASM's <code>OFFSET</code>
-keyword, since the MASM code <code>mov ax,offset bar</code> means exactly
-the same thing as NASM's <code>mov ax,bar</code>. If you're trying to get
-large amounts of MASM code to assemble sensibly under NASM, you can always
-code <code>%idefine offset</code> to make the preprocessor treat the
-<code>OFFSET</code> keyword as a no-op.</p>
-<p>This issue is even more confusing in <code>a86</code>, where declaring a
-label with a trailing colon defines it to be a `label' as opposed to a
-`variable' and causes <code>a86</code> to adopt NASM-style semantics; so in
-<code>a86</code>, <code>mov ax,var</code> has different behaviour depending
-on whether <code>var</code> was declared as <code>var: dw 0</code> (a
-label) or <code>var dw 0</code> (a word-size variable). NASM is very simple
-by comparison: <em>everything</em> is a label.</p>
-<p>NASM, in the interests of simplicity, also does not support the hybrid
-syntaxes supported by MASM and its clones, such as
-<code>mov ax,tablebx</code>, where a memory reference is denoted by one
-portion outside square brackets and another portion inside. The correct
-syntax for the above is <code>mov ax,table+bx</code>. Likewise,
-<code>mov ax,es:di</code> is wrong and <code>mov ax,es:di</code> is
-right.</p>
-<h4 id="section-2.2.3">2.2.3 NASM Doesn't Store Variable Types</h4>
-<p>NASM, by design, chooses not to remember the types of variables you
-declare. Whereas MASM will remember, on seeing <code>var dw 0</code>, that
-you declared <code>var</code> as a word-size variable, and will then be
-able to fill in the ambiguity in the size of the instruction
-<code>mov var,2</code>, NASM will deliberately remember nothing about the
-symbol <code>var</code> except where it begins, and so you must explicitly
-code <code>mov word var,2</code>.</p>
-<p>For this reason, NASM doesn't support the <code>LODS</code>,
-<code>MOVS</code>, <code>STOS</code>, <code>SCAS</code>, <code>CMPS</code>,
-<code>INS</code>, or <code>OUTS</code> instructions, but only supports the
-forms such as <code>LODSB</code>, <code>MOVSW</code>, and
-<code>SCASD</code>, which explicitly specify the size of the components of
-the strings being manipulated.</p>
-<h4 id="section-2.2.4">2.2.4 NASM Doesn't <code>ASSUME</code></h4>
-<p>As part of NASM's drive for simplicity, it also does not support the
-<code>ASSUME</code> directive. NASM will not keep track of what values you
-choose to put in your segment registers, and will never
-<em>automatically</em> generate a segment override prefix.</p>
-<h4 id="section-2.2.5">2.2.5 NASM Doesn't Support Memory Models</h4>
-<p>NASM also does not have any directives to support different 16-bit
-memory models. The programmer has to keep track of which functions are
-supposed to be called with a far call and which with a near call, and is
-responsible for putting the correct form of <code>RET</code> instruction
-(<code>RETN</code> or <code>RETF</code>; NASM accepts <code>RET</code>
-itself as an alternate form for <code>RETN</code>); in addition, the
-programmer is responsible for coding CALL FAR instructions where necessary
-when calling <em>external</em> functions, and must also keep track of which
-external variable definitions are far and which are near.</p>
-<h4 id="section-2.2.6">2.2.6 Floating-Point Differences</h4>
-<p>NASM uses different names to refer to floating-point registers from
-MASM: where MASM would call them <code>ST(0)</code>, <code>ST(1)</code> and
-so on, and <code>a86</code> would call them simply <code>0</code>,
-<code>1</code> and so on, NASM chooses to call them <code>st0</code>,
-<code>st1</code> etc.</p>
-<p>As of version 0.96, NASM now treats the instructions with `nowait' forms
-in the same way as MASM-compatible assemblers. The idiosyncratic treatment
-employed by 0.95 and earlier was based on a misunderstanding by the
-authors.</p>
-<h4 id="section-2.2.7">2.2.7 Other Differences</h4>
-<p>For historical reasons, NASM uses the keyword <code>TWORD</code> where
-MASM and compatible assemblers use <code>TBYTE</code>.</p>
-<p>Historically, NASM does not declare uninitialized storage in the same
-way as MASM: where a MASM programmer might use
-<code>stack db 64 dup (?)</code>, NASM requires <code>stack resb 64</code>,
-intended to be read as `reserve 64 bytes'. For a limited amount of
-compatibility, since NASM treats <code>?</code> as a valid character in
-symbol names, you can code <code>? equ 0</code> and then writing
-<code>dw ?</code> will at least do something vaguely useful.</p>
-<p>As of NASM 2.15, the MASM syntax is also supported.</p>
-<p>In addition to all of this, macros and directives work completely
-differently to MASM. See <a href="nasmdoc4.html">chapter 4</a> and
-<a href="nasmdoc7.html">chapter 7</a> for further details.</p>
-<h4 id="section-2.2.8">2.2.8 MASM compatibility package</h4>
-<p>See <a href="nasmdoc6.html#section-6.5">section 6.5</a>.</p>
-</div>
-</body>
-</html>

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-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.1//EN" "http://www.w3.org/TR/xhtml11/DTD/xhtml11.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<meta charset="UTF-8" />
-<title>NASM - The Netwide Assembler</title>
-<link href="nasmdoc.css" rel="stylesheet" type="text/css" />
-<link href="local.css" rel="stylesheet" type="text/css" />
-</head>
-<body>
-<ul class="navbar">
-<li class="first"><a class="prev" href="nasmdoc2.html">Chapter 2</a></li>
-<li><a class="next" href="nasmdoc4.html">Chapter 4</a></li>
-<li><a class="toc" href="nasmdoc0.html">Contents</a></li>
-<li class="last"><a class="index" href="nasmdoci.html">Index</a></li>
-</ul>
-<div class="title">
-<h1>NASM - The Netwide Assembler</h1>
-<span class="subtitle">version 2.16.01</span>
-</div>
-<div class="contents"
->
-<h2 id="chapter-3">Chapter 3: The NASM Language</h2>
-<h3 id="section-3.1">3.1 Layout of a NASM Source Line</h3>
-<p>Like most assemblers, each NASM source line contains (unless it is a
-macro, a preprocessor directive or an assembler directive: see
-<a href="nasmdoc4.html">chapter 4</a> and <a href="nasmdoc7.html">chapter
-7</a>) some combination of the four fields</p>
-<pre>
-label:    instruction operands        ; comment
-</pre>
-<p>As usual, most of these fields are optional; the presence or absence of
-any combination of a label, an instruction and a comment is allowed. Of
-course, the operand field is either required or forbidden by the presence
-and nature of the instruction field.</p>
-<p>NASM uses backslash (\) as the line continuation character; if a line
-ends with backslash, the next line is considered to be a part of the
-backslash-ended line.</p>
-<p>NASM places no restrictions on white space within a line: labels may
-have white space before them, or instructions may have no space before
-them, or anything. The colon after a label is also optional. (Note that
-this means that if you intend to code <code>lodsb</code> alone on a line,
-and type <code>lodab</code> by accident, then that's still a valid source
-line which does nothing but define a label. Running NASM with the
-command-line option <code>-w+orphan-labels</code> will cause it to warn you
-if you define a label alone on a line without a trailing colon.)</p>
-<p>Valid characters in labels are letters, numbers, <code>_</code>,
-<code>$</code>, <code>#</code>, <code>@</code>, <code>~</code>,
-<code>.</code>, and <code>?</code>. The only characters which may be used
-as the <em>first</em> character of an identifier are letters,
-<code>.</code> (with special meaning: see <a href="#section-3.9">section
-3.9</a>), <code>_</code> and <code>?</code>. An identifier may also be
-prefixed with a <code>$</code> to indicate that it is intended to be read
-as an identifier and not a reserved word; thus, if some other module you
-are linking with defines a symbol called <code>eax</code>, you can refer to
-<code>$eax</code> in NASM code to distinguish the symbol from the register.
-Maximum length of an identifier is 4095 characters.</p>
-<p>The instruction field may contain any machine instruction: Pentium and
-P6 instructions, FPU instructions, MMX instructions and even undocumented
-instructions are all supported. The instruction may be prefixed by
-<code>LOCK</code>, <code>REP</code>, <code>REPE</code>/<code>REPZ</code>,
-<code>REPNE</code>/<code>REPNZ</code>,
-<code>XACQUIRE</code>/<code>XRELEASE</code> or
-<code>BND</code>/<code>NOBND</code>, in the usual way. Explicit
-address-size and operand-size prefixes <code>A16</code>, <code>A32</code>,
-<code>A64</code>, <code>O16</code> and <code>O32</code>, <code>O64</code>
-are provided &ndash; one example of their use is given in
-<a href="nasmdo11.html">chapter 11</a>. You can also use the name of a
-segment register as an instruction prefix: coding
-<code>es mov bx,ax</code> is equivalent to coding
-<code>mov es:bx,ax</code>. We recommend the latter syntax, since it is
-consistent with other syntactic features of the language, but for
-instructions such as <code>LODSB</code>, which has no operands and yet can
-require a segment override, there is no clean syntactic way to proceed
-apart from <code>es lodsb</code>.</p>
-<p>An instruction is not required to use a prefix: prefixes such as
-<code>CS</code>, <code>A32</code>, <code>LOCK</code> or <code>REPE</code>
-can appear on a line by themselves, and NASM will just generate the prefix
-bytes.</p>
-<p>In addition to actual machine instructions, NASM also supports a number
-of pseudo-instructions, described in <a href="#section-3.2">section
-3.2</a>.</p>
-<p>Instruction operands may take a number of forms: they can be registers,
-described simply by the register name (e.g. <code>ax</code>,
-<code>bp</code>, <code>ebx</code>, <code>cr0</code>: NASM does not use the
-<code>gas</code>&ndash;style syntax in which register names must be
-prefixed by a <code>%</code> sign), or they can be effective addresses (see
-<a href="#section-3.3">section 3.3</a>), constants
-(<a href="#section-3.4">section 3.4</a>) or expressions
-(<a href="#section-3.5">section 3.5</a>).</p>
-<p>For x87 floating-point instructions, NASM accepts a wide range of
-syntaxes: you can use two-operand forms like MASM supports, or you can use
-NASM's native single-operand forms in most cases. For example, you can
-code:</p>
-<pre>
-        fadd    st1             ; this sets st0 := st0 + st1 
-        fadd    st0,st1         ; so does this 
-
-        fadd    st1,st0         ; this sets st1 := st1 + st0 
-        fadd    to st1          ; so does this
-</pre>
-<p>Almost any x87 floating-point instruction that references memory must
-use one of the prefixes <code>DWORD</code>, <code>QWORD</code> or
-<code>TWORD</code> to indicate what size of memory operand it refers to.</p>
-<h3 id="section-3.2">3.2 Pseudo-Instructions</h3>
-<p>Pseudo-instructions are things which, though not real x86 machine
-instructions, are used in the instruction field anyway because that's the
-most convenient place to put them. The current pseudo-instructions are
-<code>DB</code>, <code>DW</code>, <code>DD</code>, <code>DQ</code>,
-<code>DT</code>, <code>DO</code>, <code>DY</code> and <code>DZ</code>;
-their uninitialized counterparts <code>RESB</code>, <code>RESW</code>,
-<code>RESD</code>, <code>RESQ</code>, <code>REST</code>, <code>RESO</code>,
-<code>RESY</code> and <code>RESZ</code>; the <code>INCBIN</code> command,
-the <code>EQU</code> command, and the <code>TIMES</code> prefix.</p>
-<p>In this documentation, the notation "<code>Dx</code>" and
-"<code>RESx</code>" is used to indicate all the <code>DB</code> and
-<code>RESB</code> type directives, respectively.</p>
-<h4 id="section-3.2.1">3.2.1 <code>Dx</code>: Declaring Initialized Data</h4>
-<p><code>DB</code>, <code>DW</code>, <code>DD</code>, <code>DQ</code>,
-<code>DT</code>, <code>DO</code>, <code>DY</code> and <code>DZ</code>
-(collectively "<code>Dx</code>" in this documentation) are used, much as in
-MASM, to declare initialized data in the output file. They can be invoked
-in a wide range of ways:</p>
-<pre>
-      db    0x55                ; just the byte 0x55 
-      db    0x55,0x56,0x57      ; three bytes in succession 
-      db    'a',0x55            ; character constants are OK 
-      db    'hello',13,10,'$'   ; so are string constants 
-      dw    0x1234              ; 0x34 0x12 
-      dw    'a'                 ; 0x61 0x00 (it's just a number) 
-      dw    'ab'                ; 0x61 0x62 (character constant) 
-      dw    'abc'               ; 0x61 0x62 0x63 0x00 (string) 
-      dd    0x12345678          ; 0x78 0x56 0x34 0x12 
-      dd    1.234567e20         ; floating-point constant 
-      dq    0x123456789abcdef0  ; eight byte constant 
-      dq    1.234567e20         ; double-precision float 
-      dt    1.234567e20         ; extended-precision float
-</pre>
-<p><code>DT</code>, <code>DO</code>, <code>DY</code> and <code>DZ</code> do
-not accept integer numeric constants as operands.</p>
-<p> Starting in NASM 2.15, a the following MASM&ndash;like features have
-been implemented:</p>
-<ul>
-<li>
-<p>A <code>?</code> argument to declare uninitialized storage:</p>
-<pre>
-      db    ?                   ; uninitialized
-</pre>
-</li>
-<li>
-<p>A superset of the <code>DUP</code> syntax. The NASM version of this has
-the following syntax specification; capital letters indicate literal
-keywords:</p>
-<pre>
-     dx      := DB | DW | DD | DQ | DT | DO | DY | DZ 
-     type    := BYTE | WORD | DWORD | QWORD | TWORD | OWORD | YWORD | ZWORD 
-     atom    := expression | string | float | '?' 
-     parlist := '(' value , value ... ')' 
-     duplist := expression DUP type '%' parlist 
-     list    := duplist | '%' parlist | type '%' parlist 
-     value   := atom | type value | list 
-
-     stmt    := dx value , value...
-</pre>
-<p>Note that a <em>list</em> needs to be prefixed with a <code>%</code>
-sign unless prefixed by either <code>DUP</code> or a <em>type</em> in order
-to avoid confusing it with a parenthesis starting an expression. The
-following expressions are all valid:</p>
-<pre>
-       db 33 
-       db (44)               ; Integer expression 
-     ; db (44,55)            ; Invalid - error 
-       db %(44,55) 
-       db %('XX','YY') 
-       db ('AA')             ; Integer expression - outputs single byte 
-       db %('BB')            ; List, containing a string 
-       db ? 
-       db 6 dup (33) 
-       db 6 dup (33, 34) 
-       db 6 dup (33, 34), 35 
-       db 7 dup (99) 
-       db 7 dup dword (?, word ?, ?) 
-       dw byte (?,44) 
-       dw 3 dup (0xcc, 4 dup byte ('PQR'), ?), 0xabcd 
-       dd 16 dup (0xaaaa, ?, 0xbbbbbb) 
-       dd 64 dup (?)
-</pre>
-</li>
-</ul>
-<p> The use of <code>$</code> (current address) in a <code>Dx</code>
-statement is undefined in the current version of NASM, <em>except in the
-following cases</em>:</p>
-<ul>
-<li>
-<p>For the first expression in the statement, either a <code>DUP</code> or
-a data item.</p>
-</li>
-<li>
-<p>An expression of the form "<em>value</em><code> - $</code>", which is
-converted to a self-relative relocation.</p>
-</li>
-</ul>
-<p>Future versions of NASM is likely to produce a different result or issue
-an error this case.</p>
-<p>There is no such restriction on using <code>$$</code> or
-section-relative symbols.</p>
-<h4 id="section-3.2.2">3.2.2 <code>RESB</code> and Friends: Declaring Uninitialized Data</h4>
-<p><code>RESB</code>, <code>RESW</code>, <code>RESD</code>,
-<code>RESQ</code>, <code>REST</code>, <code>RESO</code>, <code>RESY</code>
-and <code>RESZ</code> are designed to be used in the BSS section of a
-module: they declare <em>uninitialized</em> storage space. Each takes a
-single operand, which is the number of bytes, words, doublewords or
-whatever to reserve. The operand to a <code>RESB</code>&ndash;type
-pseudo-instruction <em>would</em> be a <em>critical expression</em> (see
-<a href="#section-3.8">section 3.8</a>), except that for legacy
-compatibility reasons forward references are permitted, however <em>the
-code will be extremely fragile and this should be considered a severe
-programming error.</em> A warning will be issued; code generating this
-warning should be remedied as quickly as possible (see the
-<code>forward</code> class in <a href="nasmdoca.html">appendix A</a>.)</p>
-<p>For example:</p>
-<pre>
-buffer:         resb    64              ; reserve 64 bytes 
-wordvar:        resw    1               ; reserve a word 
-realarray       resq    10              ; array of ten reals 
-ymmval:         resy    1               ; one YMM register 
-zmmvals:        resz    32              ; 32 ZMM registers
-</pre>
-<p> Since NASM 2.15, the MASM syntax of using <code>?</code> and
-<code>DUP</code> in the <code>D</code><em>x</em> directives is also
-supported. Thus, the above example could also be written:</p>
-<pre>
-buffer:         db      64 dup (?)      ; reserve 64 bytes 
-wordvar:        dw      ?               ; reserve a word 
-realarray       dq      10 dup (?)      ; array of ten reals 
-ymmval:         dy      ?               ; one YMM register 
-zmmvals:        dz      32 dup (?)      ; 32 ZMM registers
-</pre>
-<h4 id="section-3.2.3">3.2.3 <code>INCBIN</code>: Including External Binary Files</h4>
-<p><code>INCBIN</code> includes binary file data verbatim into the output
-file. This can be handy for (for example) including graphics and sound data
-directly into a game executable file. It can be called in one of these
-three ways:</p>
-<pre>
-    incbin  "file.dat"             ; include the whole file 
-    incbin  "file.dat",1024        ; skip the first 1024 bytes 
-    incbin  "file.dat",1024,512    ; skip the first 1024, and 
-                                   ; actually include at most 512
-</pre>
-<p><code>INCBIN</code> is both a directive and a standard macro; the
-standard macro version searches for the file in the include file search
-path and adds the file to the dependency lists. This macro can be
-overridden if desired.</p>
-<h4 id="section-3.2.4">3.2.4 <code>EQU</code>: Defining Constants</h4>
-<p><code>EQU</code> defines a symbol to a given constant value: when
-<code>EQU</code> is used, the source line must contain a label. The action
-of <code>EQU</code> is to define the given label name to the value of its
-(only) operand. This definition is absolute, and cannot change later. So,
-for example,</p>
-<pre>
-message         db      'hello, world' 
-msglen          equ     $-message
-</pre>
-<p>defines <code>msglen</code> to be the constant 12. <code>msglen</code>
-may not then be redefined later. This is not a preprocessor definition
-either: the value of <code>msglen</code> is evaluated <em>once</em>, using
-the value of <code>$</code> (see <a href="#section-3.5">section 3.5</a> for
-an explanation of <code>$</code>) at the point of definition, rather than
-being evaluated wherever it is referenced and using the value of
-<code>$</code> at the point of reference.</p>
-<h4 id="section-3.2.5">3.2.5 <code>TIMES</code>: Repeating Instructions or Data</h4>
-<p>The <code>TIMES</code> prefix causes the instruction to be assembled
-multiple times. This is partly present as NASM's equivalent of the
-<code>DUP</code> syntax supported by MASM&ndash;compatible assemblers, in
-that you can code</p>
-<pre>
-zerobuf:        times 64 db 0
-</pre>
-<p>or similar things; but <code>TIMES</code> is more versatile than that.
-The argument to <code>TIMES</code> is not just a numeric constant, but a
-numeric <em>expression</em>, so you can do things like</p>
-<pre>
-buffer: db      'hello, world' 
-        times 64-$+buffer db ' '
-</pre>
-<p>which will store exactly enough spaces to make the total length of
-<code>buffer</code> up to 64. Finally, <code>TIMES</code> can be applied to
-ordinary instructions, so you can code trivial unrolled loops in it:</p>
-<pre>
-        times 100 movsb
-</pre>
-<p>Note that there is no effective difference between
-<code>times 100 resb 1</code> and <code>resb 100</code>, except that the
-latter will be assembled about 100 times faster due to the internal
-structure of the assembler.</p>
-<p>The operand to <code>TIMES</code> is a critical expression
-(<a href="#section-3.8">section 3.8</a>).</p>
-<p>Note also that <code>TIMES</code> can't be applied to macros: the reason
-for this is that <code>TIMES</code> is processed after the macro phase,
-which allows the argument to <code>TIMES</code> to contain expressions such
-as <code>64-$+buffer</code> as above. To repeat more than one line of code,
-or a complex macro, use the preprocessor <code>%rep</code> directive.</p>
-<h3 id="section-3.3">3.3 Effective Addresses</h3>
-<p>An effective address is any operand to an instruction which references
-memory. Effective addresses, in NASM, have a very simple syntax: they
-consist of an expression evaluating to the desired address, enclosed in
-square brackets. For example:</p>
-<pre>
-wordvar dw      123 
-        mov     ax,wordvar 
-        mov     ax,wordvar+1 
-        mov     ax,es:wordvar+bx
-</pre>
-<p>Anything not conforming to this simple system is not a valid memory
-reference in NASM, for example <code>es:wordvarbx</code>.</p>
-<p>More complicated effective addresses, such as those involving more than
-one register, work in exactly the same way:</p>
-<pre>
-        mov     eax,ebx*2+ecx+offset 
-        mov     ax,bp+di+8
-</pre>
-<p>NASM is capable of doing algebra on these effective addresses, so that
-things which don't necessarily <em>look</em> legal are perfectly all right:</p>
-<pre>
-    mov     eax,ebx*5             ; assembles as ebx*4+ebx 
-    mov     eax,label1*2-label2   ; ie label1+(label1-label2)
-</pre>
-<p>Some forms of effective address have more than one assembled form; in
-most such cases NASM will generate the smallest form it can. For example,
-there are distinct assembled forms for the 32-bit effective addresses
-<code>eax*2+0</code> and <code>eax+eax</code>, and NASM will generally
-generate the latter on the grounds that the former requires four bytes to
-store a zero offset.</p>
-<p>NASM has a hinting mechanism which will cause <code>eax+ebx</code> and
-<code>ebx+eax</code> to generate different opcodes; this is occasionally
-useful because <code>esi+ebp</code> and <code>ebp+esi</code> have
-different default segment registers.</p>
-<p>However, you can force NASM to generate an effective address in a
-particular form by the use of the keywords <code>BYTE</code>,
-<code>WORD</code>, <code>DWORD</code> and <code>NOSPLIT</code>. If you need
-<code>eax+3</code> to be assembled using a double-word offset field
-instead of the one byte NASM will normally generate, you can code
-<code>dword eax+3</code>. Similarly, you can force NASM to use a byte
-offset for a small value which it hasn't seen on the first pass (see
-<a href="#section-3.8">section 3.8</a> for an example of such a code
-fragment) by using <code>byte eax+offset</code>. As special cases,
-<code>byte eax</code> will code <code>eax+0</code> with a byte offset
-of zero, and <code>dword eax</code> will code it with a double-word
-offset of zero. The normal form, <code>eax</code>, will be coded with no
-offset field.</p>
-<p>The form described in the previous paragraph is also useful if you are
-trying to access data in a 32-bit segment from within 16 bit code. For more
-information on this see the section on mixed-size addressing
-(<a href="nasmdo11.html#section-11.2">section 11.2</a>). In particular, if
-you need to access data with a known offset that is larger than will fit in
-a 16-bit value, if you don't specify that it is a dword offset, nasm will
-cause the high word of the offset to be lost.</p>
-<p>Similarly, NASM will split <code>eax*2</code> into
-<code>eax+eax</code> because that allows the offset field to be absent
-and space to be saved; in fact, it will also split
-<code>eax*2+offset</code> into <code>eax+eax+offset</code>. You can
-combat this behaviour by the use of the <code>NOSPLIT</code> keyword:
-<code>nosplit eax*2</code> will force <code>eax*2+0</code> to be
-generated literally. <code>nosplit eax*1</code> also has the same effect.
-In another way, a split EA form <code>0, eax*2</code> can be used, too.
-However, <code>NOSPLIT</code> in <code>nosplit eax+eax</code> will be
-ignored because user's intention here is considered as
-<code>eax+eax</code>.</p>
-<p>In 64-bit mode, NASM will by default generate absolute addresses. The
-<code>REL</code> keyword makes it produce <code>RIP</code>&ndash;relative
-addresses. Since this is frequently the normally desired behaviour, see the
-<code>DEFAULT</code> directive (<a href="nasmdoc7.html#section-7.2">section
-7.2</a>). The keyword <code>ABS</code> overrides <code>REL</code>.</p>
-<p>A new form of split effective address syntax is also supported. This is
-mainly intended for mib operands as used by MPX instructions, but can be
-used for any memory reference. The basic concept of this form is splitting
-base and index.</p>
-<pre>
-     mov eax,ebx+8,ecx*4   ; ebx=base, ecx=index, 4=scale, 8=disp
-</pre>
-<p>For mib operands, there are several ways of writing effective address
-depending on the tools. NASM supports all currently possible ways of mib
-syntax:</p>
-<pre>
-     ; bndstx 
-     ; next 5 lines are parsed same 
-     ; base=rax, index=rbx, scale=1, displacement=3 
-     bndstx rax+0x3,rbx, bnd0      ; NASM - split EA 
-     bndstx rbx*1+rax+0x3, bnd0    ; GAS - '*1' indecates an index reg 
-     bndstx rax+rbx+3, bnd0        ; GAS - without hints 
-     bndstx rax+0x3, bnd0, rbx     ; ICC-1 
-     bndstx rax+0x3, rbx, bnd0     ; ICC-2
-</pre>
-<p>When broadcasting decorator is used, the opsize keyword should match the
-size of each element.</p>
-<pre>
-     VDIVPS zmm4, zmm5, dword rbx{1to16}   ; single-precision float 
-     VDIVPS zmm4, zmm5, zword rbx          ; packed 512 bit memory
-</pre>
-<h3 id="section-3.4">3.4 Constants</h3>
-<p>NASM understands four different types of constant: numeric, character,
-string and floating-point.</p>
-<h4 id="section-3.4.1">3.4.1 Numeric Constants</h4>
-<p>A numeric constant is simply a number. NASM allows you to specify
-numbers in a variety of number bases, in a variety of ways: you can suffix
-<code>H</code> or <code>X</code>, <code>D</code> or <code>T</code>,
-<code>Q</code> or <code>O</code>, and <code>B</code> or <code>Y</code> for
-hexadecimal, decimal, octal and binary respectively, or you can prefix
-<code>0x</code>, for hexadecimal in the style of C, or you can prefix
-<code>$</code> for hexadecimal in the style of Borland Pascal or Motorola
-Assemblers. Note, though, that the <code>$</code> prefix does double duty
-as a prefix on identifiers (see <a href="#section-3.1">section 3.1</a>), so
-a hex number prefixed with a <code>$</code> sign must have a digit after
-the <code>$</code> rather than a letter. In addition, current versions of
-NASM accept the prefix <code>0h</code> for hexadecimal, <code>0d</code> or
-<code>0t</code> for decimal, <code>0o</code> or <code>0q</code> for octal,
-and <code>0b</code> or <code>0y</code> for binary. Please note that unlike
-C, a <code>0</code> prefix by itself does <em>not</em> imply an octal
-constant!</p>
-<p>Numeric constants can have underscores (<code>_</code>) interspersed to
-break up long strings.</p>
-<p>Some examples (all producing exactly the same code):</p>
-<pre>
-        mov     ax,200          ; decimal 
-        mov     ax,0200         ; still decimal 
-        mov     ax,0200d        ; explicitly decimal 
-        mov     ax,0d200        ; also decimal 
-        mov     ax,0c8h         ; hex 
-        mov     ax,$0c8         ; hex again: the 0 is required 
-        mov     ax,0xc8         ; hex yet again 
-        mov     ax,0hc8         ; still hex 
-        mov     ax,310q         ; octal 
-        mov     ax,310o         ; octal again 
-        mov     ax,0o310        ; octal yet again 
-        mov     ax,0q310        ; octal yet again 
-        mov     ax,11001000b    ; binary 
-        mov     ax,1100_1000b   ; same binary constant 
-        mov     ax,1100_1000y   ; same binary constant once more 
-        mov     ax,0b1100_1000  ; same binary constant yet again 
-        mov     ax,0y1100_1000  ; same binary constant yet again
-</pre>
-<h4 id="section-3.4.2">3.4.2 Character Strings</h4>
-<p>A character string consists of up to eight characters enclosed in either
-single quotes (<code>'...'</code>), double quotes (<code>"..."</code>) or
-backquotes (<code>`...`</code>). Single or double quotes are equivalent to
-NASM (except of course that surrounding the constant with single quotes
-allows double quotes to appear within it and vice versa); the contents of
-those are represented verbatim. Strings enclosed in backquotes support
-C-style <code>\</code>&ndash;escapes for special characters.</p>
-<p>The following escape sequences are recognized by backquoted strings:</p>
-<pre>
-      \'          single quote (') 
-      \"          double quote (") 
-      \`          backquote (`) 
-      \\          backslash (\) 
-      \?          question mark (?) 
-      \a          BEL (ASCII 7) 
-      \b          BS  (ASCII 8) 
-      \t          TAB (ASCII 9) 
-      \n          LF  (ASCII 10) 
-      \v          VT  (ASCII 11) 
-      \f          FF  (ASCII 12) 
-      \r          CR  (ASCII 13) 
-      \e          ESC (ASCII 27) 
-      \377        Up to 3 octal digits - literal byte 
-      \xFF        Up to 2 hexadecimal digits - literal byte 
-      \u1234      4 hexadecimal digits - Unicode character 
-      \U12345678  8 hexadecimal digits - Unicode character
-</pre>
-<p>All other escape sequences are reserved. Note that <code>\0</code>,
-meaning a <code>NUL</code> character (ASCII 0), is a special case of the
-octal escape sequence.</p>
-<p>Unicode characters specified with <code>\u</code> or <code>\U</code> are
-converted to UTF-8. For example, the following lines are all equivalent:</p>
-<pre>
-      db `\u263a`            ; UTF-8 smiley face 
-      db `\xe2\x98\xba`      ; UTF-8 smiley face 
-      db 0E2h, 098h, 0BAh    ; UTF-8 smiley face
-</pre>
-<h4 id="section-3.4.3">3.4.3 Character Constants</h4>
-<p>A character constant consists of a string up to eight bytes long, used
-in an expression context. It is treated as if it was an integer.</p>
-<p>A character constant with more than one byte will be arranged with
-little-endian order in mind: if you code</p>
-<pre>
-          mov eax,'abcd'
-</pre>
-<p>then the constant generated is not <code>0x61626364</code>, but
-<code>0x64636261</code>, so that if you were then to store the value into
-memory, it would read <code>abcd</code> rather than <code>dcba</code>. This
-is also the sense of character constants understood by the Pentium's
-<code>CPUID</code> instruction.</p>
-<h4 id="section-3.4.4">3.4.4 String Constants</h4>
-<p>String constants are character strings used in the context of some
-pseudo-instructions, namely the <code>DB</code> family and
-<code>INCBIN</code> (where it represents a filename.) They are also used in
-certain preprocessor directives.</p>
-<p>A string constant looks like a character constant, only longer. It is
-treated as a concatenation of maximum-size character constants for the
-conditions. So the following are equivalent:</p>
-<pre>
-      db    'hello'               ; string constant 
-      db    'h','e','l','l','o'   ; equivalent character constants
-</pre>
-<p>And the following are also equivalent:</p>
-<pre>
-      dd    'ninechars'           ; doubleword string constant 
-      dd    'nine','char','s'     ; becomes three doublewords 
-      db    'ninechars',0,0,0     ; and really looks like this
-</pre>
-<p>Note that when used in a string-supporting context, quoted strings are
-treated as a string constants even if they are short enough to be a
-character constant, because otherwise <code>db 'ab'</code> would have the
-same effect as <code>db 'a'</code>, which would be silly. Similarly,
-three-character or four-character constants are treated as strings when
-they are operands to <code>DW</code>, and so forth.</p>
-<h4 id="section-3.4.5">3.4.5 Unicode Strings</h4>
-<p>The special operators <code>__?utf16?__</code>,
-<code>__?utf16le?__</code>, <code>__?utf16be?__</code>,
-<code>__?utf32?__</code>, <code>__?utf32le?__</code> and
-<code>__?utf32be?__</code> allows definition of Unicode strings. They take
-a string in UTF-8 format and converts it to UTF-16 or UTF-32, respectively.
-Unless the <code>be</code> forms are specified, the output is littleendian.</p>
-<p>For example:</p>
-<pre>
-%define u(x) __?utf16?__(x) 
-%define w(x) __?utf32?__(x) 
-
-      dw u('C:\WINDOWS'), 0       ; Pathname in UTF-16 
-      dd w(`A + B = \u206a`), 0   ; String in UTF-32
-</pre>
-<p>The UTF operators can be applied either to strings passed to the
-<code>DB</code> family instructions, or to character constants in an
-expression context.</p>
-<h4 id="section-3.4.6">3.4.6 Floating-Point Constants</h4>
-<p>Floating-point constants are acceptable only as arguments to
-<code>DB</code>, <code>DW</code>, <code>DD</code>, <code>DQ</code>,
-<code>DT</code>, and <code>DO</code>, or as arguments to the special
-operators <code>__?float8?__</code>, <code>__?float16?__</code>,
-<code>__?bfloat16?__</code>, <code>__?float32?__</code>,
-<code>__?float64?__</code>, <code>__?float80m?__</code>,
-<code>__?float80e?__</code>, <code>__?float128l?__</code>, and
-<code>__?float128h?__</code>. See also
-<a href="nasmdoc6.html#section-6.3">section 6.3</a>.</p>
-<p>Floating-point constants are expressed in the traditional form: digits,
-then a period, then optionally more digits, then optionally an
-<code>E</code> followed by an exponent. The period is mandatory, so that
-NASM can distinguish between <code>dd 1</code>, which declares an integer
-constant, and <code>dd 1.0</code> which declares a floating-point constant.</p>
-<p>NASM also support C99-style hexadecimal floating-point: <code>0x</code>,
-hexadecimal digits, period, optionally more hexadeximal digits, then
-optionally a <code>P</code> followed by a <em>binary</em> (not hexadecimal)
-exponent in decimal notation. As an extension, NASM additionally supports
-the <code>0h</code> and <code>$</code> prefixes for hexadecimal, as well
-binary and octal floating-point, using the <code>0b</code> or
-<code>0y</code> and <code>0o</code> or <code>0q</code> prefixes,
-respectively.</p>
-<p>Underscores to break up groups of digits are permitted in floating-point
-constants as well.</p>
-<p>Some examples:</p>
-<pre>
-      db    -0.2                    ; "Quarter precision" 
-      dw    -0.5                    ; IEEE 754r/SSE5 half precision 
-      dd    1.2                     ; an easy one 
-      dd    1.222_222_222           ; underscores are permitted 
-      dd    0x1p+2                  ; 1.0x2^2 = 4.0 
-      dq    0x1p+32                 ; 1.0x2^32 = 4 294 967 296.0 
-      dq    1.e10                   ; 10 000 000 000.0 
-      dq    1.e+10                  ; synonymous with 1.e10 
-      dq    1.e-10                  ; 0.000 000 000 1 
-      dt    3.141592653589793238462 ; pi 
-      do    1.e+4000                ; IEEE 754r quad precision
-</pre>
-<p>The 8-bit "quarter-precision" floating-point format is
-sign:exponent:mantissa = 1:4:3 with an exponent bias of 7. This appears to
-be the most frequently used 8-bit floating-point format, although it is not
-covered by any formal standard. This is sometimes called a "minifloat."</p>
-<p>The <code>bfloat16</code> format is effectively a compressed version of
-the 32-bit single precision format, with a reduced mantissa. It is
-effectively the same as truncating the 32-bit format to the upper 16 bits,
-except for rounding. There is no <code>D</code><em>x</em> directive that
-corresponds to <code>bfloat16</code> as it obviously has the same size as
-the IEEE standard 16-bit half precision format, see however
-<a href="nasmdoc6.html#section-6.3">section 6.3</a>.</p>
-<p>The special operators are used to produce floating-point numbers in
-other contexts. They produce the binary representation of a specific
-floating-point number as an integer, and can use anywhere integer constants
-are used in an expression. <code>__?float80m?__</code> and
-<code>__?float80e?__</code> produce the 64-bit mantissa and 16-bit exponent
-of an 80-bit floating-point number, and <code>__?float128l?__</code> and
-<code>__?float128h?__</code> produce the lower and upper 64-bit halves of a
-128-bit floating-point number, respectively.</p>
-<p>For example:</p>
-<pre>
-      mov    rax,__?float64?__(3.141592653589793238462)
-</pre>
-<p>... would assign the binary representation of pi as a 64-bit floating
-point number into <code>RAX</code>. This is exactly equivalent to:</p>
-<pre>
-      mov    rax,0x400921fb54442d18
-</pre>
-<p>NASM cannot do compile-time arithmetic on floating-point constants. This
-is because NASM is designed to be portable &ndash; although it always
-generates code to run on x86 processors, the assembler itself can run on
-any system with an ANSI C compiler. Therefore, the assembler cannot
-guarantee the presence of a floating-point unit capable of handling the
-Intel number formats, and so for NASM to be able to do floating arithmetic
-it would have to include its own complete set of floating-point routines,
-which would significantly increase the size of the assembler for very
-little benefit.</p>
-<p>The special tokens <code>__?Infinity?__</code>, <code>__?QNaN?__</code>
-(or <code>__?NaN?__</code>) and <code>__?SNaN?__</code> can be used to
-generate infinities, quiet NaNs, and signalling NaNs, respectively. These
-are normally used as macros:</p>
-<pre>
-%define Inf __?Infinity?__ 
-%define NaN __?QNaN?__ 
-
-      dq    +1.5, -Inf, NaN         ; Double-precision constants
-</pre>
-<p>The <code>%use fp</code> standard macro package contains a set of
-convenience macros. See <a href="nasmdoc6.html#section-6.3">section
-6.3</a>.</p>
-<h4 id="section-3.4.7">3.4.7 Packed BCD Constants</h4>
-<p>x87-style packed BCD constants can be used in the same contexts as
-80-bit floating-point numbers. They are suffixed with <code>p</code> or
-prefixed with <code>0p</code>, and can include up to 18 decimal digits.</p>
-<p>As with other numeric constants, underscores can be used to separate
-digits.</p>
-<p>For example:</p>
-<pre>
-      dt 12_345_678_901_245_678p 
-      dt -12_345_678_901_245_678p 
-      dt +0p33 
-      dt 33p
-</pre>
-<h3 id="section-3.5">3.5 Expressions</h3>
-<p>Expressions in NASM are similar in syntax to those in C. Expressions are
-evaluated as 64-bit integers which are then adjusted to the appropriate
-size.</p>
-<p>NASM supports two special tokens in expressions, allowing calculations
-to involve the current assembly position: the <code>$</code> and
-<code>$$</code> tokens. <code>$</code> evaluates to the assembly position
-at the beginning of the line containing the expression; so you can code an
-infinite loop using <code>JMP $</code>. <code>$$</code> evaluates to the
-beginning of the current section; so you can tell how far into the section
-you are by using <code>($-$$)</code>.</p>
-<p>The arithmetic operators provided by NASM are listed here, in increasing
-order of precedence.</p>
-<p>A <em>boolean</em> value is true if nonzero and false if zero. The
-operators which return a boolean value always return 1 for true and 0 for
-false.</p>
-<h4 id="section-3.5.1">3.5.1 <code>?</code> ... <code>:</code>: Conditional Operator</h4>
-<p>The syntax of this operator, similar to the C conditional operator, is:</p>
-<p><em>boolean</em> <code>?</code> <em>trueval</em> <code>:</code>
-<em>falseval</em></p>
-<p>This operator evaluates to <em>trueval</em> if <em>boolean</em> is true,
-otherwise to <em>falseval</em>.</p>
-<p>Note that NASM allows <code>?</code> characters in symbol names.
-Therefore, it is highly advisable to always put spaces around the
-<code>?</code> and <code>:</code> characters.</p>
-<h4 id="section-3.5.2">3.5.2 : <code>||</code>: Boolean OR Operator</h4>
-<p>The <code>||</code> operator gives a boolean OR: it evaluates to 1 if
-both sides of the expression are nonzero, otherwise 0.</p>
-<h4 id="section-3.5.3">3.5.3 : <code>^^</code>: Boolean XOR Operator</h4>
-<p>The <code>^^</code> operator gives a boolean XOR: it evaluates to 1 if
-any one side of the expression is nonzero, otherwise 0.</p>
-<h4 id="section-3.5.4">3.5.4 : <code>&amp;&amp;</code>: Boolean AND Operator</h4>
-<p>The <code>&amp;&amp;</code> operator gives a boolean AND: it evaluates
-to 1 if both sides of the expression is nonzero, otherwise 0.</p>
-<h4 id="section-3.5.5">3.5.5 : Comparison Operators</h4>
-<p>NASM supports the following comparison operators:</p>
-<ul>
-<li>
-<p><code>=</code> or <code>==</code> compare for equality.</p>
-</li>
-<li>
-<p><code>!=</code> or <code>&lt;&gt;</code> compare for inequality.</p>
-</li>
-<li>
-<p><code>&lt;</code> compares signed less than.</p>
-</li>
-<li>
-<p><code>&lt;=</code> compares signed less than or equal.</p>
-</li>
-<li>
-<p><code>&gt;</code> compares signed greater than.</p>
-</li>
-<li>
-<p><code>&gt;=</code> compares signed greater than or equal.</p>
-</li>
-</ul>
-<p>These operators evaluate to 0 for false or 1 for true.</p>
-<ul>
-<li>
-<p>&lt;=&gt; does a signed comparison, and evaluates to &ndash;1 for less
-than, 0 for equal, and 1 for greater than.</p>
-</li>
-</ul>
-<p>At this time, NASM does not provide unsigned comparison operators.</p>
-<h4 id="section-3.5.6">3.5.6 <code>|</code>: Bitwise OR Operator</h4>
-<p>The <code>|</code> operator gives a bitwise OR, exactly as performed by
-the <code>OR</code> machine instruction.</p>
-<h4 id="section-3.5.7">3.5.7 <code>^</code>: Bitwise XOR Operator</h4>
-<p><code>^</code> provides the bitwise XOR operation.</p>
-<h4 id="section-3.5.8">3.5.8 <code>&amp;</code>: Bitwise AND Operator</h4>
-<p><code>&amp;</code> provides the bitwise AND operation.</p>
-<h4 id="section-3.5.9">3.5.9 Bit Shift Operators</h4>
-<p><code>&lt;&lt;</code> gives a bit-shift to the left, just as it does in
-C. So <code>5&lt;&lt;3</code> evaluates to 5 times 8, or 40.
-<code>&gt;&gt;</code> gives an <em>unsigned</em> (logical) bit-shift to the
-right; the bits shifted in from the left are set to zero.</p>
-<p><code>&lt;&lt;&lt;</code> gives a bit-shift to the left, exactly
-equivalent to the <code>&lt;&lt;</code> operator; it is included for
-completeness. <code>&gt;&gt;&gt;</code> gives an <em>signed</em>
-(arithmetic) bit-shift to the right; the bits shifted in from the left are
-filled with copies of the most significant (sign) bit.</p>
-<h4 id="section-3.5.10">3.5.10 <code>+</code> and <code>-</code>: Addition and Subtraction Operators</h4>
-<p>The <code>+</code> and <code>-</code> operators do perfectly ordinary
-addition and subtraction.</p>
-<h4 id="section-3.5.11">3.5.11 Multiplication, Division and Modulo</h4>
-<p><code>*</code> is the multiplication operator.</p>
-<p><code>/</code> and <code>//</code> are both division operators:
-<code>/</code> is unsigned division and <code>//</code> is signed division.</p>
-<p>Similarly, <code>%</code> and <code>%%</code> provide unsigned and
-signed modulo operators respectively.</p>
-<p>Since the <code>%</code> character is used extensively by the macro
-preprocessor, you should ensure that both the signed and unsigned modulo
-operators are followed by white space wherever they appear.</p>
-<p>NASM, like ANSI C, provides no guarantees about the sensible operation
-of the signed modulo operator. On most systems it will match the signed
-division operator, such that:</p>
-<pre>
-     b * (a // b) + (a %% b) = a       (b != 0)
-</pre>
-<h4 id="section-3.5.12">3.5.12 Unary Operators</h4>
-<p>The highest-priority operators in NASM's expression grammar are those
-which only apply to one argument. These are:</p>
-<ul>
-<li>
-<p><code>-</code> negates (2's complement) its operand.</p>
-</li>
-<li>
-<p><code>+</code> does nothing; it's provided for symmetry with
-<code>-</code>.</p>
-</li>
-<li>
-<p><code>~</code> computes the bitwise negation (1's complement) of its
-operand.</p>
-</li>
-<li>
-<p><code>!</code> is the boolean negation operator. It evaluates to 1 if
-the argument is 0, otherwise 0.</p>
-</li>
-<li>
-<p><code>SEG</code> provides the segment address of its operand (explained
-in more detail in <a href="#section-3.6">section 3.6</a>).</p>
-</li>
-<li>
-<p>A set of additional operators with leading and trailing double
-underscores are used to implement the <code>integer functions</code> of the
-<code>ifunc</code> macro package, see
-<a href="nasmdoc6.html#section-6.4">section 6.4</a>.</p>
-</li>
-</ul>
-<h3 id="section-3.6">3.6 <code>SEG</code> and <code>WRT</code></h3>
-<p>When writing large 16-bit programs, which must be split into multiple
-segments, it is often necessary to be able to refer to the segment part of
-the address of a symbol. NASM supports the <code>SEG</code> operator to
-perform this function.</p>
-<p>The <code>SEG</code> operator evaluates to the <em>preferred</em>
-segment base of a symbol, defined as the segment base relative to which the
-offset of the symbol makes sense. So the code</p>
-<pre>
-        mov     ax,seg symbol 
-        mov     es,ax 
-        mov     bx,symbol
-</pre>
-<p>will load <code>ES:BX</code> with a valid pointer to the symbol
-<code>symbol</code>.</p>
-<p>Things can be more complex than this: since 16-bit segments and groups
-may overlap, you might occasionally want to refer to some symbol using a
-different segment base from the preferred one. NASM lets you do this, by
-the use of the <code>WRT</code> (With Reference To) keyword. So you can do
-things like</p>
-<pre>
-        mov     ax,weird_seg        ; weird_seg is a segment base 
-        mov     es,ax 
-        mov     bx,symbol wrt weird_seg
-</pre>
-<p>to load <code>ES:BX</code> with a different, but functionally
-equivalent, pointer to the symbol <code>symbol</code>.</p>
-<p>NASM supports far (inter-segment) calls and jumps by means of the syntax
-<code>call segment:offset</code>, where <code>segment</code> and
-<code>offset</code> both represent immediate values. So to call a far
-procedure, you could code either of</p>
-<pre>
-        call    (seg procedure):procedure 
-        call    weird_seg:(procedure wrt weird_seg)
-</pre>
-<p>(The parentheses are included for clarity, to show the intended parsing
-of the above instructions. They are not necessary in practice.)</p>
-<p>NASM supports the syntax <code>call far procedure</code> as a synonym
-for the first of the above usages. <code>JMP</code> works identically to
-<code>CALL</code> in these examples.</p>
-<p>To declare a far pointer to a data item in a data segment, you must code</p>
-<pre>
-        dw      symbol, seg symbol
-</pre>
-<p>NASM supports no convenient synonym for this, though you can always
-invent one using the macro processor.</p>
-<h3 id="section-3.7">3.7 <code>STRICT</code>: Inhibiting Optimization</h3>
-<p>When assembling with the optimizer set to level 2 or higher (see
-<a href="nasmdoc2.html#section-2.1.24">section 2.1.24</a>), NASM will use
-size specifiers (<code>BYTE</code>, <code>WORD</code>, <code>DWORD</code>,
-<code>QWORD</code>, <code>TWORD</code>, <code>OWORD</code>,
-<code>YWORD</code> or <code>ZWORD</code>), but will give them the smallest
-possible size. The keyword <code>STRICT</code> can be used to inhibit
-optimization and force a particular operand to be emitted in the specified
-size. For example, with the optimizer on, and in <code>BITS 16</code> mode,</p>
-<pre>
-        push dword 33
-</pre>
-<p>is encoded in three bytes <code>66 6A 21</code>, whereas</p>
-<pre>
-        push strict dword 33
-</pre>
-<p>is encoded in six bytes, with a full dword immediate operand
-<code>66 68 21 00 00 00</code>.</p>
-<p>With the optimizer off, the same code (six bytes) is generated whether
-the <code>STRICT</code> keyword was used or not.</p>
-<h3 id="section-3.8">3.8 Critical Expressions</h3>
-<p>Although NASM has an optional multi-pass optimizer, there are some
-expressions which must be resolvable on the first pass. These are called
-<em>Critical Expressions</em>.</p>
-<p>The first pass is used to determine the size of all the assembled code
-and data, so that the second pass, when generating all the code, knows all
-the symbol addresses the code refers to. So one thing NASM can't handle is
-code whose size depends on the value of a symbol declared after the code in
-question. For example,</p>
-<pre>
-        times (label-$) db 0 
-label:  db      'Where am I?'
-</pre>
-<p>The argument to <code>TIMES</code> in this case could equally legally
-evaluate to anything at all; NASM will reject this example because it
-cannot tell the size of the <code>TIMES</code> line when it first sees it.
-It will just as firmly reject the slightly paradoxical code</p>
-<pre>
-        times (label-$+1) db 0 
-label:  db      'NOW where am I?'
-</pre>
-<p>in which <em>any</em> value for the <code>TIMES</code> argument is by
-definition wrong!</p>
-<p>NASM rejects these examples by means of a concept called a <em>critical
-expression</em>, which is defined to be an expression whose value is
-required to be computable in the first pass, and which must therefore
-depend only on symbols defined before it. The argument to the
-<code>TIMES</code> prefix is a critical expression.</p>
-<h3 id="section-3.9">3.9 Local Labels</h3>
-<p>NASM gives special treatment to symbols beginning with a period. A label
-beginning with a single period is treated as a <em>local</em> label, which
-means that it is associated with the previous non-local label. So, for
-example:</p>
-<pre>
-label1  ; some code 
-
-.loop 
-        ; some more code 
-
-        jne     .loop 
-        ret 
-
-label2  ; some code 
-
-.loop 
-        ; some more code 
-
-        jne     .loop 
-        ret
-</pre>
-<p>In the above code fragment, each <code>JNE</code> instruction jumps to
-the line immediately before it, because the two definitions of
-<code>.loop</code> are kept separate by virtue of each being associated
-with the previous non-local label.</p>
-<p>This form of local label handling is borrowed from the old Amiga
-assembler DevPac; however, NASM goes one step further, in allowing access
-to local labels from other parts of the code. This is achieved by means of
-<em>defining</em> a local label in terms of the previous non-local label:
-the first definition of <code>.loop</code> above is really defining a
-symbol called <code>label1.loop</code>, and the second defines a symbol
-called <code>label2.loop</code>. So, if you really needed to, you could
-write</p>
-<pre>
-label3  ; some more code 
-        ; and some more 
-
-        jmp label1.loop
-</pre>
-<p>Sometimes it is useful &ndash; in a macro, for instance &ndash; to be
-able to define a label which can be referenced from anywhere but which
-doesn't interfere with the normal local-label mechanism. Such a label can't
-be non-local because it would interfere with subsequent definitions of, and
-references to, local labels; and it can't be local because the macro that
-defined it wouldn't know the label's full name. NASM therefore introduces a
-third type of label, which is probably only useful in macro definitions: if
-a label begins with the special prefix <code>..@</code>, then it does
-nothing to the local label mechanism. So you could code</p>
-<pre>
-label1:                         ; a non-local label 
-.local:                         ; this is really label1.local 
-..@foo:                         ; this is a special symbol 
-label2:                         ; another non-local label 
-.local:                         ; this is really label2.local 
-
-        jmp     ..@foo          ; this will jump three lines up
-</pre>
-<p>NASM has the capacity to define other special symbols beginning with a
-double period: for example, <code>..start</code> is used to specify the
-entry point in the <code>obj</code> output format (see
-<a href="nasmdoc8.html#section-8.4.6">section 8.4.6</a>),
-<code>..imagebase</code> is used to find out the offset from a base address
-of the current image in the <code>win64</code> output format (see
-<a href="nasmdoc8.html#section-8.6.1">section 8.6.1</a>). So just keep in
-mind that symbols beginning with a double period are special.</p>
-</div>
-</body>
-</html>

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-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.1//EN" "http://www.w3.org/TR/xhtml11/DTD/xhtml11.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<meta charset="UTF-8" />
-<title>NASM - The Netwide Assembler</title>
-<link href="nasmdoc.css" rel="stylesheet" type="text/css" />
-<link href="local.css" rel="stylesheet" type="text/css" />
-</head>
-<body>
-<ul class="navbar">
-<li class="first"><a class="prev" href="nasmdoc3.html">Chapter 3</a></li>
-<li><a class="next" href="nasmdoc5.html">Chapter 5</a></li>
-<li><a class="toc" href="nasmdoc0.html">Contents</a></li>
-<li class="last"><a class="index" href="nasmdoci.html">Index</a></li>
-</ul>
-<div class="title">
-<h1>NASM - The Netwide Assembler</h1>
-<span class="subtitle">version 2.16.01</span>
-</div>
-<div class="contents"
->
-<h2 id="chapter-4">Chapter 4: The NASM Preprocessor</h2>
-<p>NASM contains a powerful macro processor, which supports conditional
-assembly, multi-level file inclusion, two forms of macro (single-line and
-multi-line), and a `context stack' mechanism for extra macro power.
-Preprocessor directives all begin with a <code>%</code> sign. As a result,
-some care needs to be taken when using the <code>%</code> arithmetic
-operator to avoid it being confused with a preprocessor directive; it is
-recommended that it always be surrounded by whitespace.</p>
-<p>The NASM preprocessor borrows concepts from both the C preprocessor and
-the macro facilities of many other assemblers.</p>
-<h3 id="section-4.1">4.1 Preprocessor Expansions</h3>
-<p>The input to the preprocessor is expanded in the following ways in the
-order specified here.</p>
-<h4 id="section-4.1.1">4.1.1 Continuation Line Collapsing</h4>
-<p>The preprocessor first collapses all lines which end with a backslash
-(<code>\</code>) character into a single line. Thus:</p>
-<pre>
-%define THIS_VERY_LONG_MACRO_NAME_IS_DEFINED_TO \ 
-        THIS_VALUE
-</pre>
-<p>will work like a single-line macro without the backslash-newline
-sequence.</p>
-<h4 id="section-4.1.2">4.1.2 Comment Removal</h4>
-<p>After concatenation, comments are removed. Comments begin with the
-character <code>;</code> unless contained inside a quoted string or a
-handful of other special contexts.</p>
-<p>Note that this is applied <em>after</em> continuation lines are
-collapsed. This means that</p>
-<pre>
-      add al,'\'     ; Add the ASCII code for \ 
-      mov ecx,al   ; Save the character
-</pre>
-<p>will probably not do what you expect, as the second line will be
-considered part of the preceeding comment. Although this behavior is
-sometimes confusing, it is both the behavior of NASM since the very first
-version as well as the behavior of the C preprocessor.</p>
-<h4 id="section-4.1.3">4.1.3 <code>%line</code> directives</h4>
-<p>In this step, <code>%line</code> directives are processed. See
-<a href="#section-4.13.1">section 4.13.1</a>.</p>
-<h4 id="section-4.1.4">4.1.4  Conditionals, Loops and Multi-Line Macro Definitions</h4>
-<p>In this step, the following preprocessor directives are processed:</p>
-<ul>
-<li>
-<p>Multi-line macro definitions, specified by the <code>%macro</code> and
-<code>%imacro</code> directives. The body of a multi-line macro is stored
-and is not further expanded at this time. See
-<a href="#section-4.5">section 4.5</a>.</p>
-</li>
-<li>
-<p>Conditional assembly, specified by the <code>%if</code> family of
-preprocessor directives. Disabled part of the source code are discarded and
-are not futher expanded. See <a href="#section-4.6">section 4.6</a>.</p>
-</li>
-<li>
-<p>Preprocessor loops, specified by the <code>%rep</code> preprocessor
-directive. A preprocessor loop is very similar to a multi-line macro and as
-such the body is stored and is not futher expanded at this time. See
-<a href="#section-4.7">section 4.7</a>.</p>
-</li>
-</ul>
-<p>These constructs are required to be balanced, so that the ending of a
-block can be detected, but no further processing is done at this time;
-stored blocks will be inserted at this step when they are expanded (see
-below.)</p>
-<p>It is specific to each directive to what extent inline expansions and
-detokenization are performed for the arguments of the directives.</p>
-<h4 id="section-4.1.5">4.1.5 Directives processing</h4>
-<p>Remaining preprocessor directives are processed. It is specific to each
-directive to what extend the above expansions or the ones specified in
-<a href="#section-4.1.8">section 4.1.8</a> are performed on their
-arguments.</p>
-<p>It is specific to each directive to what extent inline expansions and
-detokenization are performed for the arguments of the directives.</p>
-<h4 id="section-4.1.6">4.1.6 Inline expansions and other directives</h4>
-<p>In this step, the following expansions are performed on each line:</p>
-<ul>
-<li>
-<p>Single-line macros are expanded. See <a href="#section-4.2">section
-4.2</a>.</p>
-</li>
-<li>
-<p>Preprocessor functions are expanded. See <a href="#section-4.4">section
-4.4</a>.</p>
-</li>
-<li>
-<p>If this line is the result of multi-line macro expansions (see below),
-the parameters to that macro are expanded at this time. See
-<a href="#section-4.5">section 4.5</a>.</p>
-</li>
-<li>
-<p>Macro indirection, using the <code>%</code> construct, is expanded.
-See <a href="#section-4.2.3">section 4.2.3</a>.</p>
-</li>
-<li>
-<p>Token concatenation using either the <code>%+</code> operator (see
-<a href="#section-4.2.4">section 4.2.4</a>) or implicitly (see
-<a href="#section-4.2.3">section 4.2.3</a> and
-<a href="#section-4.5.9">section 4.5.9</a>.)</p>
-</li>
-<li>
-<p>Macro-local labels are converted into unique strings, see
-<a href="#section-4.5.2">section 4.5.2</a>.</p>
-</li>
-</ul>
-<h4 id="section-4.1.7">4.1.7 Multi-Line Macro Expansion</h4>
-<p>In this step, multi-line macros are expanded into new lines of source,
-like the typical macro feature of many other assemblers. See
-<a href="#section-4.5">section 4.5</a>.</p>
-<p>After expansion, the newly injected lines of source are processed
-starting with the step defined in <a href="#section-4.1.4">section
-4.1.4</a>.</p>
-<h4 id="section-4.1.8">4.1.8 Detokenization</h4>
-<p>In this step, the final line of source code is produced. It performs the
-following operations:</p>
-<ul>
-<li>
-<p>Environment variables specified using the <code>%!</code> construct are
-expanded. See <a href="#section-4.9.2">section 4.9.2</a>.</p>
-</li>
-<li>
-<p>Context-local labels are expanded into unique strings. See
-<a href="#section-4.9.2">section 4.9.2</a>.</p>
-</li>
-<li>
-<p>All tokens are converted to their text representation. Unlike the C
-preprocessor, the NASM preprocessor does not insert whitespace between
-adjacent tokens unless present in the source code. See
-<a href="#section-4.5.9">section 4.5.9</a>.</p>
-</li>
-</ul>
-<p>The resulting line of text either is sent to the assembler, or, if
-running in preprocessor-only mode, to the output file (see
-<a href="nasmdoc2.html#section-2.1.22">section 2.1.22</a>); if necessary
-prefixed by a newly inserted <code>%line</code> directive.</p>
-<h3 id="section-4.2">4.2 Single-Line Macros</h3>
-<p>Single-line macros are expanded inline, much like macros in the C
-preprocessor.</p>
-<h4 id="section-4.2.1">4.2.1 The Normal Way: <code>%define</code></h4>
-<p>Single-line macros are defined using the <code>%define</code>
-preprocessor directive. The definitions work in a similar way to C; so you
-can do things like</p>
-<pre>
-%define ctrl    0x1F &amp; 
-%define param(a,b) ((a)+(a)*(b)) 
-
-        mov     byte param(2,ebx), ctrl 'D'
-</pre>
-<p>which will expand to</p>
-<pre>
-        mov     byte (2)+(2)*(ebx), 0x1F &amp; 'D'
-</pre>
-<p>When the expansion of a single-line macro contains tokens which invoke
-another macro, the expansion is performed at invocation time, not at
-definition time. Thus the code</p>
-<pre>
-%define a(x)    1+b(x) 
-%define b(x)    2*x 
-
-        mov     ax,a(8)
-</pre>
-<p>will evaluate in the expected way to <code>mov ax,1+2*8</code>, even
-though the macro <code>b</code> wasn't defined at the time of definition of
-<code>a</code>.</p>
-<p>Note that single-line macro argument list cannot be preceded by
-whitespace. Otherwise it will be treated as an expansion. For example:</p>
-<pre>
-   %define foo (a,b)               ; no arguments, (a,b) is the expansion 
-   %define bar(a,b)                ; two arguments, empty expansion
-</pre>
-<p>Macros defined with <code>%define</code> are case sensitive: after
-<code>%define foo bar</code>, only <code>foo</code> will expand to
-<code>bar</code>: <code>Foo</code> or <code>FOO</code> will not. By using
-<code>%idefine</code> instead of <code>%define</code> (the `i' stands for
-`insensitive') you can define all the case variants of a macro at once, so
-that <code>%idefine foo bar</code> would cause <code>foo</code>,
-<code>Foo</code>, <code>FOO</code>, <code>fOO</code> and so on all to
-expand to <code>bar</code>.</p>
-<p>There is a mechanism which detects when a macro call has occurred as a
-result of a previous expansion of the same macro, to guard against circular
-references and infinite loops. If this happens, the preprocessor will only
-expand the first occurrence of the macro. Hence, if you code</p>
-<pre>
-%define a(x)    1+a(x) 
-
-        mov     ax,a(3)
-</pre>
-<p>the macro <code>a(3)</code> will expand once, becoming
-<code>1+a(3)</code>, and will then expand no further. This behaviour can be
-useful: see <a href="nasmdo10.html#section-10.1">section 10.1</a> for an
-example of its use.</p>
-<p>You can overload single-line macros: if you write</p>
-<pre>
-%define foo(x)   1+x 
-%define foo(x,y) 1+x*y
-</pre>
-<p>the preprocessor will be able to handle both types of macro call, by
-counting the parameters you pass; so <code>foo(3)</code> will become
-<code>1+3</code> whereas <code>foo(ebx,2)</code> will become
-<code>1+ebx*2</code>. However, if you define</p>
-<pre>
-%define foo bar
-</pre>
-<p>then no other definition of <code>foo</code> will be accepted: a macro
-with no parameters prohibits the definition of the same name as a macro
-<em>with</em> parameters, and vice versa.</p>
-<p>This doesn't prevent single-line macros being <em>redefined</em>: you
-can perfectly well define a macro with</p>
-<pre>
-%define foo bar
-</pre>
-<p>and then re-define it later in the same source file with</p>
-<pre>
-%define foo baz
-</pre>
-<p>Then everywhere the macro <code>foo</code> is invoked, it will be
-expanded according to the most recent definition. This is particularly
-useful when defining single-line macros with <code>%assign</code> (see
-<a href="#section-4.2.8">section 4.2.8</a>).</p>
-<p>The following additional features were added in NASM 2.15:</p>
-<p>It is possible to define an empty string instead of an argument name if
-the argument is never used. For example:</p>
-<pre>
-   %define ereg(foo,) e %+ foo 
-     mov eax,ereg(dx,cx)
-</pre>
-<p>A single pair of parentheses is a subcase of a single, unused argument:</p>
-<pre>
-   %define myreg() eax 
-     mov edx,myreg()
-</pre>
-<p>This is similar to the behavior of the C preprocessor.</p>
-<ul>
-<li>
-<p>If declared with an <code>=</code>, NASM will expand the argument and
-then evaluate it as a numeric expression.</p>
-</li>
-<li>
-<p>If declared with an <code>&amp;</code>, NASM will expand the argument
-and then turn into a quoted string; if the argument already <em>is</em> a
-quoted string, it will be quoted again.</p>
-</li>
-<li>
-<p>If declared with <code>&amp;&amp;</code>, NASM will expand the argument
-and then turn it into a quoted string, but if the argument already is a
-quoted string, it will <em>not</em> be re-quoted.</p>
-</li>
-<li>
-<p>If declared with a <code>+</code>, it is a greedy or variadic parameter;
-it will include any subsequent commas and parameters.</p>
-</li>
-<li>
-<p>If declared with an <code>!</code>, NASM will not strip whitespace and
-braces (potentially useful in conjunction with <code>&amp;</code> or
-<code>&amp;&amp;</code>.)</p>
-</li>
-</ul>
-<p>For example:</p>
-<pre>
-    %define xyzzy(=expr,&amp;val) expr, str 
-    %define plugh(x) xyzzy(x,x) 
-    db plugh(3+5), `\0` ; Expands to: db 8, "3+5", `\0`
-</pre>
-<p>You can pre-define single-line macros using the `-d' option on the NASM
-command line: see <a href="nasmdoc2.html#section-2.1.20">section
-2.1.20</a>.</p>
-<h4 id="section-4.2.2">4.2.2 Resolving <code>%define</code>: <code>%xdefine</code></h4>
-<p>To have a reference to an embedded single-line macro resolved at the
-time that the embedding macro is <em>defined</em>, as opposed to when the
-embedding macro is <em>expanded</em>, you need a different mechanism to the
-one offered by <code>%define</code>. The solution is to use
-<code>%xdefine</code>, or it's case-insensitive counterpart
-<code>%ixdefine</code>.</p>
-<p>Suppose you have the following code:</p>
-<pre>
-%define  isTrue  1 
-%define  isFalse isTrue 
-%define  isTrue  0 
-
-val1:    db      isFalse 
-
-%define  isTrue  1 
-
-val2:    db      isFalse
-</pre>
-<p>In this case, <code>val1</code> is equal to 0, and <code>val2</code> is
-equal to 1. This is because, when a single-line macro is defined using
-<code>%define</code>, it is expanded only when it is called. As
-<code>isFalse</code> expands to <code>isTrue</code>, the expansion will be
-the current value of <code>isTrue</code>. The first time it is called that
-is 0, and the second time it is 1.</p>
-<p>If you wanted <code>isFalse</code> to expand to the value assigned to
-the embedded macro <code>isTrue</code> at the time that
-<code>isFalse</code> was defined, you need to change the above code to use
-<code>%xdefine</code>.</p>
-<pre>
-%xdefine isTrue  1 
-%xdefine isFalse isTrue 
-%xdefine isTrue  0 
-
-val1:    db      isFalse 
-
-%xdefine isTrue  1 
-
-val2:    db      isFalse
-</pre>
-<p>Now, each time that <code>isFalse</code> is called, it expands to 1, as
-that is what the embedded macro <code>isTrue</code> expanded to at the time
-that <code>isFalse</code> was defined.</p>
-<p><code>%xdefine</code> and <code>%ixdefine</code> supports argument
-expansion exactly the same way that <code>%define</code> and
-<code>%idefine</code> does.</p>
-<h4 id="section-4.2.3">4.2.3 Macro Indirection: <code>%...</code></h4>
-<p>The <code>%...</code> construct can be used to expand macros in
-contexts where macro expansion would otherwise not occur, including in the
-names other macros. For example, if you have a set of macros named
-<code>Foo16</code>, <code>Foo32</code> and <code>Foo64</code>, you could
-write:</p>
-<pre>
-     mov ax,Foo%__?BITS?__ ; The Foo value
-</pre>
-<p>to use the builtin macro <code>__?BITS?__</code> (see
-<a href="nasmdoc5.html#section-5.3">section 5.3</a>) to automatically
-select between them. Similarly, the two statements:</p>
-<pre>
-%xdefine Bar         Quux    ; Expands due to %xdefine 
-%define  Bar         %Quux ; Expands due to %...
-</pre>
-<p>have, in fact, exactly the same effect.</p>
-<p><code>%...</code> concatenates to adjacent tokens in the same way that
-multi-line macro parameters do, see <a href="#section-4.5.9">section
-4.5.9</a> for details.</p>
-<h4 id="section-4.2.4">4.2.4 Concatenating Single Line Macro Tokens: <code>%+</code></h4>
-<p>Individual tokens in single line macros can be concatenated, to produce
-longer tokens for later processing. This can be useful if there are several
-similar macros that perform similar functions.</p>
-<p>Please note that a space is required after <code>%+</code>, in order to
-disambiguate it from the syntax <code>%+1</code> used in multiline macros.</p>
-<p>As an example, consider the following:</p>
-<pre>
-%define BDASTART 400h                ; Start of BIOS data area
-
-struc   tBIOSDA                      ; its structure 
-        .COM1addr       RESW    1 
-        .COM2addr       RESW    1 
-        ; ..and so on 
-endstruc
-</pre>
-<p>Now, if we need to access the elements of tBIOSDA in different places,
-we can end up with:</p>
-<pre>
-        mov     ax,BDASTART + tBIOSDA.COM1addr 
-        mov     bx,BDASTART + tBIOSDA.COM2addr
-</pre>
-<p>This will become pretty ugly (and tedious) if used in many places, and
-can be reduced in size significantly by using the following macro:</p>
-<pre>
-; Macro to access BIOS variables by their names (from tBDA):
-
-%define BDA(x)  BDASTART + tBIOSDA. %+ x
-</pre>
-<p>Now the above code can be written as:</p>
-<pre>
-        mov     ax,BDA(COM1addr) 
-        mov     bx,BDA(COM2addr)
-</pre>
-<p>Using this feature, we can simplify references to a lot of macros (and,
-in turn, reduce typing errors).</p>
-<h4 id="section-4.2.5">4.2.5 The Macro Name Itself: <code>%?</code> and <code>%??</code></h4>
-<p>The special symbols <code>%?</code> and <code>%??</code> can be used to
-reference the macro name itself inside a macro expansion, this is supported
-for both single-and multi-line macros. <code>%?</code> refers to the macro
-name as <em>invoked</em>, whereas <code>%??</code> refers to the macro name
-as <em>declared</em>. The two are always the same for case-sensitive
-macros, but for case-insensitive macros, they can differ.</p>
-<p>For example:</p>
-<pre>
-%imacro Foo 0 
-        mov %?,%?? 
-%endmacro 
-
-        foo 
-        FOO
-</pre>
-<p>will expand to:</p>
-<pre>
-        mov foo,Foo 
-        mov FOO,Foo
-</pre>
-<p>These tokens can be used for single-line macros <em>if defined outside
-any multi-line macros.</em> See below.</p>
-<h4 id="section-4.2.6">4.2.6 The Single-Line Macro Name: <code>%*?</code> and <code>%*??</code></h4>
-<p>If the tokens <code>%?</code> and <code>%??</code> are used inside a
-multi-line macro, they are expanded before any directives are processed. As
-a result,</p>
-<pre>
-%imacro Foo 0 
-      %idefine Bar _%? 
-      mov BAR,bAr 
-%endmacro 
-
-      foo 
-      mov eax,bar
-</pre>
-<p>will expand to:</p>
-<pre>
-      mov _foo,_foo 
-      mov eax,_foo
-</pre>
-<p>which may or may not be what you expected. The tokens <code>%*?</code>
-and <code>%*??</code> behave like <code>%?</code> and <code>%??</code> but
-are only expanded inside single-line macros. Thus:</p>
-<pre>
-%imacro Foo 0 
-      %idefine Bar _%*? 
-      mov BAR,bAr 
-%endmacro 
-
-      foo 
-      mov eax,bar
-</pre>
-<p>will expand to:</p>
-<pre>
-      mov _BAR,_bAr 
-      mov eax,_bar
-</pre>
-<p>The <code>%*?</code> can be used to make a keyword "disappear", for
-example in case a new instruction has been used as a label in older code.
-For example:</p>
-<pre>
-%idefine pause $%*?                 ; Hide the PAUSE instruction
-</pre>
-<p><code>%*?</code> and <code>%*??</code> were introduced in NASM 2.15.04.</p>
-<h4 id="section-4.2.7">4.2.7 Undefining Single-Line Macros: <code>%undef</code></h4>
-<p>Single-line macros can be removed with the <code>%undef</code>
-directive. For example, the following sequence:</p>
-<pre>
-%define foo bar 
-%undef  foo 
-
-        mov     eax, foo
-</pre>
-<p>will expand to the instruction <code>mov eax, foo</code>, since after
-<code>%undef</code> the macro <code>foo</code> is no longer defined.</p>
-<p>Macros that would otherwise be pre-defined can be undefined on the
-command-line using the `-u' option on the NASM command line: see
-<a href="nasmdoc2.html#section-2.1.21">section 2.1.21</a>.</p>
-<h4 id="section-4.2.8">4.2.8 Preprocessor Variables: <code>%assign</code></h4>
-<p>An alternative way to define single-line macros is by means of the
-<code>%assign</code> command (and its case-insensitive counterpart
-<code>%iassign</code>, which differs from <code>%assign</code> in exactly
-the same way that <code>%idefine</code> differs from <code>%define</code>).</p>
-<p><code>%assign</code> is used to define single-line macros which take no
-parameters and have a numeric value. This value can be specified in the
-form of an expression, and it will be evaluated once, when the
-<code>%assign</code> directive is processed.</p>
-<p>Like <code>%define</code>, macros defined using <code>%assign</code> can
-be re-defined later, so you can do things like</p>
-<pre>
-%assign i i+1
-</pre>
-<p>to increment the numeric value of a macro.</p>
-<p><code>%assign</code> is useful for controlling the termination of
-<code>%rep</code> preprocessor loops: see <a href="#section-4.7">section
-4.7</a> for an example of this. Another use for <code>%assign</code> is
-given in <a href="nasmdoc9.html#section-9.4">section 9.4</a> and
-<a href="nasmdo10.html#section-10.1">section 10.1</a>.</p>
-<p>The expression passed to <code>%assign</code> is a critical expression
-(see <a href="nasmdoc3.html#section-3.8">section 3.8</a>), and must also
-evaluate to a pure number (rather than a relocatable reference such as a
-code or data address, or anything involving a register).</p>
-<p>See also the <code>%eval()</code> preprocessor function,
-<a href="#section-4.4.4">section 4.4.4</a>.</p>
-<h4 id="section-4.2.9">4.2.9 Defining Strings: <code>%defstr</code></h4>
-<p><code>%defstr</code>, and its case-insensitive counterpart
-<code>%idefstr</code>, define or redefine a single-line macro without
-parameters but converts the entire right-hand side, after macro expansion,
-to a quoted string before definition.</p>
-<p>For example:</p>
-<pre>
-%defstr test TEST
-</pre>
-<p>is equivalent to</p>
-<pre>
-%define test 'TEST'
-</pre>
-<p>This can be used, for example, with the <code>%!</code> construct (see
-<a href="#section-4.13.2">section 4.13.2</a>):</p>
-<pre>
-%defstr PATH %!PATH          ; The operating system PATH variable
-</pre>
-<p>See also the <code>%str()</code> preprocessor function,
-<a href="#section-4.4.8">section 4.4.8</a>.</p>
-<h4 id="section-4.2.10">4.2.10 Defining Tokens: <code>%deftok</code></h4>
-<p><code>%deftok</code>, and its case-insensitive counterpart
-<code>%ideftok</code>, define or redefine a single-line macro without
-parameters but converts the second parameter, after string conversion, to a
-sequence of tokens.</p>
-<p>For example:</p>
-<pre>
-%deftok test 'TEST'
-</pre>
-<p>is equivalent to</p>
-<pre>
-%define test TEST
-</pre>
-<p>See also the <code>%tok()</code> preprocessor function,
-<a href="#section-4.4.12">section 4.4.12</a>.</p>
-<h4 id="section-4.2.11">4.2.11 Defining Aliases: <code>%defalias</code></h4>
-<p><code>%defalias</code>, and its case-insensitive counterpart
-<code>%idefalias</code>, define an alias to a macro, i.e. equivalent of a
-symbolic link.</p>
-<p>When used with various macro defining and undefining directives, it
-affects the aliased macro. This functionality is intended for being able to
-rename macros while retaining the legacy names.</p>
-<p>When an alias is defined, but the aliased macro is then undefined, the
-aliases can legitimately point to nonexistent macros.</p>
-<p>The alias can be undefined using the <code>%undefalias</code> directive.
-<em>All</em> aliases can be undefined using the
-<code>%clear defalias</code> directive. This includes backwards
-compatibility aliases defined by NASM itself.</p>
-<p>To disable aliases without undefining them, use the
-<code>%aliases off</code> directive.</p>
-<p>To check whether an alias is defined, regardless of the existence of the
-aliased macro, use <code>%ifdefalias</code>.</p>
-<p>For example:</p>
-<pre>
-%defalias OLD NEW 
-   ; OLD and NEW both undefined 
-%define NEW 123 
-   ; OLD and NEW both 123 
-%undef OLD 
-   ; OLD and NEW both undefined 
-%define OLD 456 
-   ; OLD and NEW both 456 
-%undefalias OLD 
-   ; OLD undefined, NEW defined to 456
-</pre>
-<h4 id="section-4.2.12">4.2.12 Conditional Comma Operator: <code>%,</code></h4>
-<p>As of version 2.15, NASM has a conditional comma operator
-<code>%,</code> that expands to a comma <em>unless</em> followed by a null
-expansion, which allows suppressing the comma before an empty argument.
-This is especially useful with greedy single-line macros.</p>
-<p>For example, all the expressions below are valid:</p>
-<pre>
-%define greedy(a,b,c+) a + 66 %, b * 3 %, c 
-
-       db greedy(1,2)          ; db 1 + 66, 2 * 3 
-       db greedy(1,2,3)        ; db 1 + 66, 2 * 3, 3 
-       db greedy(1,2,3,4)      ; db 1 + 66, 2 * 3, 3, 4 
-       db greedy(1,2,3,4,5)    ; db 1 + 66, 2 * 3, 3, 4, 5
-</pre>
-<h3 id="section-4.3">4.3 String Manipulation in Macros</h3>
-<p>It's often useful to be able to handle strings in macros. NASM supports
-a few simple string handling macro operators from which more complex
-operations can be constructed.</p>
-<p>All the string operators define or redefine a value (either a string or
-a numeric value) to a single-line macro. When producing a string value, it
-may change the style of quoting of the input string or strings, and
-possibly use <code>\</code>&ndash;escapes inside
-<code>`</code>&ndash;quoted strings.</p>
-<p>These directives are also available as preprocessor functions, see
-<a href="#section-4.4">section 4.4</a>.</p>
-<h4 id="section-4.3.1">4.3.1 Concatenating Strings: <code>%strcat</code></h4>
-<p>The <code>%strcat</code> operator concatenates quoted strings and assign
-them to a single-line macro.</p>
-<p>For example:</p>
-<pre>
-%strcat alpha "Alpha: ", '12" screen'
-</pre>
-<p>... would assign the value <code>'Alpha: 12" screen'</code> to
-<code>alpha</code>. Similarly:</p>
-<pre>
-%strcat beta '"foo"\', "'bar'"
-</pre>
-<p>... would assign the value <code>`"foo"\\'bar'`</code> to
-<code>beta</code>.</p>
-<p>The use of commas to separate strings is permitted but optional.</p>
-<p>The corresponding preprocessor function is <code>%strcat()</code>, see
-<a href="#section-4.4.9">section 4.4.9</a>.</p>
-<h4 id="section-4.3.2">4.3.2 String Length: <code>%strlen</code></h4>
-<p>The <code>%strlen</code> operator assigns the length of a string to a
-macro. For example:</p>
-<pre>
-%strlen charcnt 'my string'
-</pre>
-<p>In this example, <code>charcnt</code> would receive the value 9, just as
-if an <code>%assign</code> had been used. In this example,
-<code>'my string'</code> was a literal string but it could also have been a
-single-line macro that expands to a string, as in the following example:</p>
-<pre>
-%define sometext 'my string' 
-%strlen charcnt sometext
-</pre>
-<p>As in the first case, this would result in <code>charcnt</code> being
-assigned the value of 9.</p>
-<p>The corresponding preprocessor function is <code>%strlen()</code>, see
-<a href="#section-4.4.10">section 4.4.10</a>.</p>
-<h4 id="section-4.3.3">4.3.3 Extracting Substrings: <code>%substr</code></h4>
-<p>Individual letters or substrings in strings can be extracted using the
-<code>%substr</code> operator. An example of its use is probably more
-useful than the description:</p>
-<pre>
-%substr mychar 'xyzw' 1       ; equivalent to %define mychar 'x' 
-%substr mychar 'xyzw' 2       ; equivalent to %define mychar 'y' 
-%substr mychar 'xyzw' 3       ; equivalent to %define mychar 'z' 
-%substr mychar 'xyzw' 2,2     ; equivalent to %define mychar 'yz' 
-%substr mychar 'xyzw' 2,-1    ; equivalent to %define mychar 'yzw' 
-%substr mychar 'xyzw' 2,-2    ; equivalent to %define mychar 'yz'
-</pre>
-<p>As with <code>%strlen</code> (see <a href="#section-4.3.2">section
-4.3.2</a>), the first parameter is the single-line macro to be created and
-the second is the string. The third parameter specifies the first character
-to be selected, and the optional fourth parameter preceded by comma) is the
-length. Note that the first index is 1, not 0 and the last index is equal
-to the value that <code>%strlen</code> would assign given the same string.
-Index values out of range result in an empty string. A negative length
-means "until N-1 characters before the end of string", i.e. <code>-1</code>
-means until end of string, <code>-2</code> until one character before, etc.</p>
-<p>The corresponding preprocessor function is <code>%substr()</code>, see
-<a href="#section-4.4.11">section 4.4.11</a>, however please note that the
-default value for the length parameter, if omitted, is <code>-1</code>
-rather than <code>1</code> for <code>%substr()</code>.</p>
-<h3 id="section-4.4">4.4 Preprocessor Functions</h3>
-<p>Preprocessor functions are, fundamentally, a kind of built-in
-single-line macros. They expand to a string depending on its arguments, and
-can be used in any context where single-line macro expansion would be
-performed. Preprocessor functions were introduced in NASM 2.16.</p>
-<h4 id="section-4.4.1">4.4.1 <code>%abs()</code> Function</h4>
-<p>The <code>%abs()</code> function evaluates its first argument as an
-expression, and then emits the absolute value. This will always be emitted
-as a single token containing a decimal number; no minus sign will be
-emitted even if the input value is the maximum negative number.</p>
-<h4 id="section-4.4.2">4.4.2 <code>%cond()</code> Function</h4>
-<p>The <code>%cond()</code> function evaluates its first argument as an
-expression, then expands to its second argument if true (nonzero), and the
-third, if present, if false (zero). This is in effect a specialized version
-of the <code>%sel()</code> function; <code>%cond(x,y,z)</code> is
-equivalent to <code>%sel(2-!(x),y,z)</code>.</p>
-<pre>
-%define a 1 
-%xdefine astr %cond(a,"true","false") ; %define astr "true"
-</pre>
-<p>The argument not selected is never expanded.</p>
-<h4 id="section-4.4.3">4.4.3 <code>%count()</code> Function</h4>
-<p>The <code>%count()</code> function expands to the number of argments
-passed to the macro. Note that just as for single-line macros,
-<code>%count()</code> treats an empty argument list as a single empty
-argument.</p>
-<pre>
-%xdefine empty %count()        ; %define empty 1 
-%xdefine one   %count(1)       ; %define one 1 
-%xdefine two   %count(5,q)     ; %define two 2 
-%define  list  a,b,46 
-%xdefine lc1   %count(list)    ; %define lc 1 (just one argument) 
-%xdefine lc2   %count(%list) ; %define lc 3 (indirection expands)
-</pre>
-<h4 id="section-4.4.4">4.4.4 <code>%eval()</code> Function</h4>
-<p>The <code>%eval()</code> function evaluates its argument as a numeric
-expression and expands to the result as an integer constant in much the
-same way the <code>%assign</code> directive would, see
-<a href="#section-4.2.8">section 4.2.8</a>. Unlike <code>%assign</code>,
-<code>%eval()</code> supports more than one argument; if more than one
-argument is specified, it is expanded to a comma-separated list of values.</p>
-<pre>
-%assign a    2 
-%assign b    3  
-%defstr what %expr(a+b,a*b)  ; equivalent to %define what "5,6"
-</pre>
-<p>The expressions passed to <code>%eval()</code> are critical expressions,
-see <a href="nasmdoc3.html#section-3.8">section 3.8</a>.</p>
-<h4 id="section-4.4.5">4.4.5 <code>%is()</code> Family Functions</h4>
-<p>Each <code>%if</code> family directive (see
-<a href="#section-4.6">section 4.6</a>) has an equivalent
-<code>%is()</code> family function, that expands to <code>1</code> if the
-equivalent <code>%if</code> directive would process as true, and
-<code>0</code> if the equivalent <code>%if</code> directive would process
-as false.</p>
-<pre>
-; Instead of !%isidn() could have used %isnidn() 
-%if %isdef(foo) &amp;&amp; !%isidn(foo,bar) 
-      db "foo is defined, but not as 'bar'" 
-%endif
-</pre>
-<p>Note that, being functions, the arguments (before expansion) will always
-need to have balanced parentheses so that the end of the argument list can
-be defined. This means that the syntax of e.g. <code>%istoken()</code> and
-<code>%isidn()</code> is somewhat stricter than their corresponding
-<code>%if</code> directives; it may be necessary to escape the argument to
-the conditional using <code>{}</code>:</p>
-<pre>
-; Instead of !%isidn() could have used %isnidn() 
-%if %isdef(foo) &amp;&amp; !%isidn({foo,)}) 
-      db "foo is defined, but not as ')'" 
-%endif
-</pre>
-<h4 id="section-4.4.6">4.4.6 <code>%num()</code> Function</h4>
-<p>The <code>%num()</code> function evaluates its arguments as expressions,
-and then produces a quoted string encoding the first argument as an
-<em>unsigned</em> integer. The second argument is the desired number of
-digits (max 253, default &ndash;1), and the second argument is the encoding
-base (from 2 to 64, default 10.)</p>
-<p>Only the first argument is required.</p>
-<p>If the number of digits is negative, NASM will add additional digits if
-needed, if positive the string is truncated to the number of digits
-specified. 0 is treated as &ndash;1, except that the input number 0
-generates an empty string (thus, the first digit will never be zero.)</p>
-<p>The full 64-symbol set used is, in order:</p>
-<pre>
-0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ@_
-</pre>
-<p>If a <em>signed</em> number needs to be converted to a string, use
-<code>%abs()</code>, <code>%cond()</code>, and <code>%strcat()</code> to
-format the signed number string to your specific output requirements.</p>
-<h4 id="section-4.4.7">4.4.7 <code>%sel()</code> Function</h4>
-<p>The <code>%sel()</code> function evaluates its first argument as an
-expression, then expands to its second argument if 1, the third argument if
-2, and so on. If the value is less than 1 or larger than the number of
-arguments minus one, then the <code>%sel()</code> function expands to
-nothing.</p>
-<pre>
-%define b 2 
-%xdefine bstr %sel(b,"one","two","three") ; %define bstr "two"
-</pre>
-<p>The arguments not selected are never expanded.</p>
-<h4 id="section-4.4.8">4.4.8 <code>%str()</code> Function</h4>
-<p>The <code>%str()</code> function converts its argument, including any
-commas, to a quoted string, similar to the way the <code>%defstr</code>
-directive would, see <a href="#section-4.2.9">section 4.2.9</a>.</p>
-<p>Being a function, the argument will need to have balanced parentheses or
-be escaped using <code>{}</code>.</p>
-<pre>
-; The following lines are all equivalent 
-%define  test 'TEST' 
-%defstr  test TEST 
-%xdefine test %str(TEST)
-</pre>
-<h4 id="section-4.4.9">4.4.9 <code>%strcat()</code> Function</h4>
-<p>The <code>%strcat()</code> function concatenates a list of quoted
-strings, in the same way the <code>%strcat</code> directive would, see
-<a href="#section-4.3.1">section 4.3.1</a>.</p>
-<pre>
-; The following lines are all equivalent 
-%define  alpha 'Alpha: 12" screen' 
-%strcat  alpha "Alpha: ", '12" screen' 
-%xdefine alpha %strcat("Alpha: ", '12" screen')
-</pre>
-<h4 id="section-4.4.10">4.4.10 <code>%strlen()</code> Function</h4>
-<p>The <code>%strlen()</code> function expands to the length of a quoted
-string, in the same way the <code>%strlen</code> directive would, see
-<a href="#section-4.3.2">section 4.3.2</a>.</p>
-<pre>
-; The following lines are all equivalent 
-%define  charcnt 9 
-%strlen  charcnt 'my string' 
-%xdefine charcnt %strlen('my string')
-</pre>
-<h4 id="section-4.4.11">4.4.11 <code>%substr()</code> Function</h4>
-<p>The <code>%substr()</code> function extracts a substring of a quoted
-string, in the same way the <code>%substr</code> directive would, see
-<a href="#section-4.3.3">section 4.3.3</a>. Note that unlike the
-<code>%substr</code> directive, commas are required between all parameters,
-is required after the string argument, and that the default for the length
-argument, if omitted, is <code>-1</code> (i.e. the remainder of the string)
-rather than <code>1</code>.</p>
-<pre>
-; The following lines are all equivalent 
-%define  mychar 'yzw' 
-%substr  mychar 'xyzw' 2,-1 
-%xdefine mychar %substr('xyzw',2,3) 
-%xdefine mychar %substr('xyzw',2,-1) 
-%xdefine mychar %substr('xyzw',2)
-</pre>
-<h4 id="section-4.4.12">4.4.12 <code>%tok()</code> function</h4>
-<p>The <code>%tok()</code> function converts a quoted string into a
-sequence of tokens, in the same way the <code>%deftok</code> directive
-would, see <a href="#section-4.2.10">section 4.2.10</a>.</p>
-<pre>
-; The following lines are all equivalent 
-%define test TEST 
-%deftok test 'TEST' 
-%define test %tok('TEST')
-</pre>
-<h3 id="section-4.5">4.5 Multi-Line Macros: <code>%macro</code></h3>
-<p>Multi-line macros much like the type of macro seen in MASM and TASM, and
-expand to a new set of lines of source code. A multi-line macro definition
-in NASM looks something like this.</p>
-<pre>
-%macro  prologue 1 
-
-        push    ebp 
-        mov     ebp,esp 
-        sub     esp,%1 
-
-%endmacro
-</pre>
-<p>This defines a C-like function prologue as a macro: so you would invoke
-the macro with a call such as:</p>
-<pre>
-myfunc:   prologue 12
-</pre>
-<p>which would expand to the three lines of code</p>
-<pre>
-myfunc: push    ebp 
-        mov     ebp,esp 
-        sub     esp,12
-</pre>
-<p>The number <code>1</code> after the macro name in the
-<code>%macro</code> line defines the number of parameters the macro
-<code>prologue</code> expects to receive. The use of <code>%1</code> inside
-the macro definition refers to the first parameter to the macro call. With
-a macro taking more than one parameter, subsequent parameters would be
-referred to as <code>%2</code>, <code>%3</code> and so on.</p>
-<p>Multi-line macros, like single-line macros, are case-sensitive, unless
-you define them using the alternative directive <code>%imacro</code>.</p>
-<p>If you need to pass a comma as <em>part</em> of a parameter to a
-multi-line macro, you can do that by enclosing the entire parameter in
-braces. So you could code things like:</p>
-<pre>
-%macro  silly 2 
-
-    %2: db      %1 
-
-%endmacro 
-
-        silly 'a', letter_a             ; letter_a:  db 'a' 
-        silly 'ab', string_ab           ; string_ab: db 'ab' 
-        silly {13,10}, crlf             ; crlf:      db 13,10
-</pre>
-<p>The behavior with regards to empty arguments at the end of multi-line
-macros before NASM 2.15 was often very strange. For backwards
-compatibility, NASM attempts to recognize cases where the legacy behavior
-would give unexpected results, and issues a warning, but largely tries to
-match the legacy behavior. This can be disabled with the
-<code>%pragma</code> (see <a href="#section-4.12.1">section 4.12.1</a>):</p>
-<pre>
-%pragma preproc sane_empty_expansion
-</pre>
-<h4 id="section-4.5.1">4.5.1 Overloading Multi-Line Macros</h4>
-<p>As with single-line macros, multi-line macros can be overloaded by
-defining the same macro name several times with different numbers of
-parameters. This time, no exception is made for macros with no parameters
-at all. So you could define</p>
-<pre>
-%macro  prologue 0 
-
-        push    ebp 
-        mov     ebp,esp 
-
-%endmacro
-</pre>
-<p>to define an alternative form of the function prologue which allocates
-no local stack space.</p>
-<p>Sometimes, however, you might want to `overload' a machine instruction;
-for example, you might want to define</p>
-<pre>
-%macro  push 2 
-
-        push    %1 
-        push    %2 
-
-%endmacro
-</pre>
-<p>so that you could code</p>
-<pre>
-        push    ebx             ; this line is not a macro call 
-        push    eax,ecx         ; but this one is
-</pre>
-<p>Ordinarily, NASM will give a warning for the first of the above two
-lines, since <code>push</code> is now defined to be a macro, and is being
-invoked with a number of parameters for which no definition has been given.
-The correct code will still be generated, but the assembler will give a
-warning. This warning can be disabled by the use of the
-<code>-w-macro-params</code> command-line option (see
-<a href="nasmdoc2.html#section-2.1.26">section 2.1.26</a>).</p>
-<h4 id="section-4.5.2">4.5.2 Macro-Local Labels</h4>
-<p>NASM allows you to define labels within a multi-line macro definition in
-such a way as to make them local to the macro call: so calling the same
-macro multiple times will use a different label each time. You do this by
-prefixing <code>%%</code> to the label name. So you can invent an
-instruction which executes a <code>RET</code> if the <code>Z</code> flag is
-set by doing this:</p>
-<pre>
-%macro  retz 0 
-
-        jnz     %%skip 
-        ret 
-    %%skip: 
-
-%endmacro
-</pre>
-<p>You can call this macro as many times as you want, and every time you
-call it NASM will make up a different `real' name to substitute for the
-label <code>%%skip</code>. The names NASM invents are of the form
-<code>..@2345.skip</code>, where the number 2345 changes with every macro
-call. The <code>..@</code> prefix prevents macro-local labels from
-interfering with the local label mechanism, as described in
-<a href="nasmdoc3.html#section-3.9">section 3.9</a>. You should avoid
-defining your own labels in this form (the <code>..@</code> prefix, then a
-number, then another period) in case they interfere with macro-local
-labels.</p>
-<p>These labels are really macro-local <em>tokens</em>, and can be used for
-other purposes where a token unique to each macro invocation is desired,
-e.g. to name single-line macros without using the context feature
-(<a href="#section-4.9.2">section 4.9.2</a>).</p>
-<h4 id="section-4.5.3">4.5.3 Greedy Macro Parameters</h4>
-<p>Occasionally it is useful to define a macro which lumps its entire
-command line into one parameter definition, possibly after extracting one
-or two smaller parameters from the front. An example might be a macro to
-write a text string to a file in MS-DOS, where you might want to be able to
-write</p>
-<pre>
-        writefile filehandle,"hello, world",13,10
-</pre>
-<p>NASM allows you to define the last parameter of a macro to be
-<em>greedy</em>, meaning that if you invoke the macro with more parameters
-than it expects, all the spare parameters get lumped into the last defined
-one along with the separating commas. So if you code:</p>
-<pre>
-%macro  writefile 2+ 
-
-        jmp     %%endstr 
-  %%str:        db      %2 
-  %%endstr: 
-        mov     dx,%%str 
-        mov     cx,%%endstr-%%str 
-        mov     bx,%1 
-        mov     ah,0x40 
-        int     0x21 
-
-%endmacro
-</pre>
-<p>then the example call to <code>writefile</code> above will work as
-expected: the text before the first comma, <code>filehandle</code>, is
-used as the first macro parameter and expanded when <code>%1</code> is
-referred to, and all the subsequent text is lumped into <code>%2</code> and
-placed after the <code>db</code>.</p>
-<p>The greedy nature of the macro is indicated to NASM by the use of the
-<code>+</code> sign after the parameter count on the <code>%macro</code>
-line.</p>
-<p>If you define a greedy macro, you are effectively telling NASM how it
-should expand the macro given <em>any</em> number of parameters from the
-actual number specified up to infinity; in this case, for example, NASM now
-knows what to do when it sees a call to <code>writefile</code> with 2, 3, 4
-or more parameters. NASM will take this into account when overloading
-macros, and will not allow you to define another form of
-<code>writefile</code> taking 4 parameters (for example).</p>
-<p>Of course, the above macro could have been implemented as a non-greedy
-macro, in which case the call to it would have had to look like</p>
-<pre>
-          writefile filehandle, {"hello, world",13,10}
-</pre>
-<p>NASM provides both mechanisms for putting commas in macro parameters,
-and you choose which one you prefer for each macro definition.</p>
-<p>See <a href="nasmdoc7.html#section-7.3.1">section 7.3.1</a> for a better
-way to write the above macro.</p>
-<h4 id="section-4.5.4">4.5.4 Macro Parameters Range</h4>
-<p>NASM allows you to expand parameters via special construction
-<code>%{x:y}</code> where <code>x</code> is the first parameter index and
-<code>y</code> is the last. Any index can be either negative or positive
-but must never be zero.</p>
-<p>For example</p>
-<pre>
-%macro mpar 1-* 
-     db %{3:5} 
-%endmacro 
-
-mpar 1,2,3,4,5,6
-</pre>
-<p>expands to <code>3,4,5</code> range.</p>
-<p>Even more, the parameters can be reversed so that</p>
-<pre>
-%macro mpar 1-* 
-     db %{5:3} 
-%endmacro 
-
-mpar 1,2,3,4,5,6
-</pre>
-<p>expands to <code>5,4,3</code> range.</p>
-<p>But even this is not the last. The parameters can be addressed via
-negative indices so NASM will count them reversed. The ones who know Python
-may see the analogue here.</p>
-<pre>
-%macro mpar 1-* 
-     db %{-1:-3} 
-%endmacro 
-
-mpar 1,2,3,4,5,6
-</pre>
-<p>expands to <code>6,5,4</code> range.</p>
-<p>Note that NASM uses comma to separate parameters being expanded.</p>
-<p>By the way, here is a trick &ndash; you might use the index
-<code>%{-1:-1</code>} which gives you the last argument passed to a macro.</p>
-<h4 id="section-4.5.5">4.5.5 Default Macro Parameters</h4>
-<p>NASM also allows you to define a multi-line macro with a <em>range</em>
-of allowable parameter counts. If you do this, you can specify defaults for
-omitted parameters. So, for example:</p>
-<pre>
-%macro  die 0-1 "Painful program death has occurred." 
-
-        writefile 2,%1 
-        mov     ax,0x4c01 
-        int     0x21 
-
-%endmacro
-</pre>
-<p>This macro (which makes use of the <code>writefile</code> macro defined
-in <a href="#section-4.5.3">section 4.5.3</a>) can be called with an
-explicit error message, which it will display on the error output stream
-before exiting, or it can be called with no parameters, in which case it
-will use the default error message supplied in the macro definition.</p>
-<p>In general, you supply a minimum and maximum number of parameters for a
-macro of this type; the minimum number of parameters are then required in
-the macro call, and then you provide defaults for the optional ones. So if
-a macro definition began with the line</p>
-<pre>
-%macro foobar 1-3 eax,ebx+2
-</pre>
-<p>then it could be called with between one and three parameters, and
-<code>%1</code> would always be taken from the macro call. <code>%2</code>,
-if not specified by the macro call, would default to <code>eax</code>, and
-<code>%3</code> if not specified would default to <code>ebx+2</code>.</p>
-<p>You can provide extra information to a macro by providing too many
-default parameters:</p>
-<pre>
-%macro quux 1 something
-</pre>
-<p>This will trigger a warning by default; see
-<a href="nasmdoc2.html#section-2.1.26">section 2.1.26</a> for more
-information. When <code>quux</code> is invoked, it receives not one but two
-parameters. <code>something</code> can be referred to as <code>%2</code>.
-The difference between passing <code>something</code> this way and writing
-<code>something</code> in the macro body is that with this way
-<code>something</code> is evaluated when the macro is defined, not when it
-is expanded.</p>
-<p>You may omit parameter defaults from the macro definition, in which case
-the parameter default is taken to be blank. This can be useful for macros
-which can take a variable number of parameters, since the <code>%0</code>
-token (see <a href="#section-4.5.6">section 4.5.6</a>) allows you to
-determine how many parameters were really passed to the macro call.</p>
-<p>This defaulting mechanism can be combined with the greedy-parameter
-mechanism; so the <code>die</code> macro above could be made more powerful,
-and more useful, by changing the first line of the definition to</p>
-<pre>
-%macro die 0-1+ "Painful program death has occurred.",13,10
-</pre>
-<p>The maximum parameter count can be infinite, denoted by <code>*</code>.
-In this case, of course, it is impossible to provide a <em>full</em> set of
-default parameters. Examples of this usage are shown in
-<a href="#section-4.5.8">section 4.5.8</a>.</p>
-<h4 id="section-4.5.6">4.5.6 <code>%0</code>: Macro Parameter Counter</h4>
-<p>The parameter reference <code>%0</code> will return a numeric constant
-giving the number of parameters received, that is, if <code>%0</code> is n
-then <code>%</code>n is the last parameter. <code>%0</code> is mostly
-useful for macros that can take a variable number of parameters. It can be
-used as an argument to <code>%rep</code> (see
-<a href="#section-4.7">section 4.7</a>) in order to iterate through all the
-parameters of a macro. Examples are given in
-<a href="#section-4.5.8">section 4.5.8</a>.</p>
-<h4 id="section-4.5.7">4.5.7 <code>%00</code>: Label Preceding Macro</h4>
-<p><code>%00</code> will return the label preceding the macro invocation,
-if any. The label must be on the same line as the macro invocation, may be
-a local label (see <a href="nasmdoc3.html#section-3.9">section 3.9</a>),
-and need not end in a colon.</p>
-<p>If <code>%00</code> is present anywhere in the macro body, the label
-itself will not be emitted by NASM. You can, of course, put
-<code>%00:</code> explicitly at the beginning of your macro.</p>
-<h4 id="section-4.5.8">4.5.8 <code>%rotate</code>: Rotating Macro Parameters</h4>
-<p>Unix shell programmers will be familiar with the <code>shift</code>
-shell command, which allows the arguments passed to a shell script
-(referenced as <code>$1</code>, <code>$2</code> and so on) to be moved left
-by one place, so that the argument previously referenced as <code>$2</code>
-becomes available as <code>$1</code>, and the argument previously
-referenced as <code>$1</code> is no longer available at all.</p>
-<p>NASM provides a similar mechanism, in the form of <code>%rotate</code>.
-As its name suggests, it differs from the Unix <code>shift</code> in that
-no parameters are lost: parameters rotated off the left end of the argument
-list reappear on the right, and vice versa.</p>
-<p><code>%rotate</code> is invoked with a single numeric argument (which
-may be an expression). The macro parameters are rotated to the left by that
-many places. If the argument to <code>%rotate</code> is negative, the macro
-parameters are rotated to the right.</p>
-<p>So a pair of macros to save and restore a set of registers might work as
-follows:</p>
-<pre>
-%macro  multipush 1-* 
-
-  %rep  %0 
-        push    %1 
-  %rotate 1 
-  %endrep 
-
-%endmacro
-</pre>
-<p>This macro invokes the <code>PUSH</code> instruction on each of its
-arguments in turn, from left to right. It begins by pushing its first
-argument, <code>%1</code>, then invokes <code>%rotate</code> to move all
-the arguments one place to the left, so that the original second argument
-is now available as <code>%1</code>. Repeating this procedure as many times
-as there were arguments (achieved by supplying <code>%0</code> as the
-argument to <code>%rep</code>) causes each argument in turn to be pushed.</p>
-<p>Note also the use of <code>*</code> as the maximum parameter count,
-indicating that there is no upper limit on the number of parameters you may
-supply to the <code>multipush</code> macro.</p>
-<p>It would be convenient, when using this macro, to have a
-<code>POP</code> equivalent, which <em>didn't</em> require the arguments to
-be given in reverse order. Ideally, you would write the
-<code>multipush</code> macro call, then cut-and-paste the line to where the
-pop needed to be done, and change the name of the called macro to
-<code>multipop</code>, and the macro would take care of popping the
-registers in the opposite order from the one in which they were pushed.</p>
-<p>This can be done by the following definition:</p>
-<pre>
-%macro  multipop 1-* 
-
-  %rep %0 
-  %rotate -1 
-        pop     %1 
-  %endrep 
-
-%endmacro
-</pre>
-<p>This macro begins by rotating its arguments one place to the
-<em>right</em>, so that the original <em>last</em> argument appears as
-<code>%1</code>. This is then popped, and the arguments are rotated right
-again, so the second-to-last argument becomes <code>%1</code>. Thus the
-arguments are iterated through in reverse order.</p>
-<h4 id="section-4.5.9">4.5.9 Concatenating Macro Parameters</h4>
-<p>NASM can concatenate macro parameters and macro indirection constructs
-on to other text surrounding them. This allows you to declare a family of
-symbols, for example, in a macro definition. If, for example, you wanted to
-generate a table of key codes along with offsets into the table, you could
-code something like</p>
-<pre>
-%macro keytab_entry 2 
-
-    keypos%1    equ     $-keytab 
-                db      %2 
-
-%endmacro 
-
-keytab: 
-          keytab_entry F1,128+1 
-          keytab_entry F2,128+2 
-          keytab_entry Return,13
-</pre>
-<p>which would expand to</p>
-<pre>
-keytab: 
-keyposF1        equ     $-keytab 
-                db     128+1 
-keyposF2        equ     $-keytab 
-                db      128+2 
-keyposReturn    equ     $-keytab 
-                db      13
-</pre>
-<p>You can just as easily concatenate text on to the other end of a macro
-parameter, by writing <code>%1foo</code>.</p>
-<p>If you need to append a <em>digit</em> to a macro parameter, for example
-defining labels <code>foo1</code> and <code>foo2</code> when passed the
-parameter <code>foo</code>, you can't code <code>%11</code> because that
-would be taken as the eleventh macro parameter. Instead, you must code
-<code>%{1}1</code>, which will separate the first <code>1</code> (giving
-the number of the macro parameter) from the second (literal text to be
-concatenated to the parameter).</p>
-<p>This concatenation can also be applied to other preprocessor in-line
-objects, such as macro-local labels (<a href="#section-4.5.2">section
-4.5.2</a>) and context-local labels (<a href="#section-4.9.2">section
-4.9.2</a>). In all cases, ambiguities in syntax can be resolved by
-enclosing everything after the <code>%</code> sign and before the literal
-text in braces: so <code>%{%foo}bar</code> concatenates the text
-<code>bar</code> to the end of the real name of the macro-local label
-<code>%%foo</code>. (This is unnecessary, since the form NASM uses for the
-real names of macro-local labels means that the two usages
-<code>%{%foo}bar</code> and <code>%%foobar</code> would both expand to the
-same thing anyway; nevertheless, the capability is there.)</p>
-<p>The single-line macro indirection construct, <code>%...</code>
-(<a href="#section-4.2.3">section 4.2.3</a>), behaves the same way as macro
-parameters for the purpose of concatenation.</p>
-<p>See also the <code>%+</code> operator, <a href="#section-4.2.4">section
-4.2.4</a>.</p>
-<h4 id="section-4.5.10">4.5.10 Condition Codes as Macro Parameters</h4>
-<p>NASM can give special treatment to a macro parameter which contains a
-condition code. For a start, you can refer to the macro parameter
-<code>%1</code> by means of the alternative syntax <code>%+1</code>, which
-informs NASM that this macro parameter is supposed to contain a condition
-code, and will cause the preprocessor to report an error message if the
-macro is called with a parameter which is <em>not</em> a valid condition
-code.</p>
-<p>Far more usefully, though, you can refer to the macro parameter by means
-of <code>%-1</code>, which NASM will expand as the <em>inverse</em>
-condition code. So the <code>retz</code> macro defined in
-<a href="#section-4.5.2">section 4.5.2</a> can be replaced by a general
-conditional-return macro like this:</p>
-<pre>
-%macro  retc 1 
-
-        j%-1    %%skip 
-        ret 
-  %%skip: 
-
-%endmacro
-</pre>
-<p>This macro can now be invoked using calls like <code>retc ne</code>,
-which will cause the conditional-jump instruction in the macro expansion to
-come out as <code>JE</code>, or <code>retc po</code> which will make the
-jump a <code>JPE</code>.</p>
-<p>The <code>%+1</code> macro-parameter reference is quite happy to
-interpret the arguments <code>CXZ</code> and <code>ECXZ</code> as valid
-condition codes; however, <code>%-1</code> will report an error if passed
-either of these, because no inverse condition code exists.</p>
-<h4 id="section-4.5.11">4.5.11 Disabling Listing Expansion</h4>
-<p>When NASM is generating a listing file from your program, it will
-generally expand multi-line macros by means of writing the macro call and
-then listing each line of the expansion. This allows you to see which
-instructions in the macro expansion are generating what code; however, for
-some macros this clutters the listing up unnecessarily.</p>
-<p>NASM therefore provides the <code>.nolist</code> qualifier, which you
-can include in a macro definition to inhibit the expansion of the macro in
-the listing file. The <code>.nolist</code> qualifier comes directly after
-the number of parameters, like this:</p>
-<pre>
-%macro foo 1.nolist
-</pre>
-<p>Or like this:</p>
-<pre>
-%macro bar 1-5+.nolist a,b,c,d,e,f,g,h
-</pre>
-<h4 id="section-4.5.12">4.5.12 Undefining Multi-Line Macros: <code>%unmacro</code></h4>
-<p>Multi-line macros can be removed with the <code>%unmacro</code>
-directive. Unlike the <code>%undef</code> directive, however,
-<code>%unmacro</code> takes an argument specification, and will only remove
-exact matches with that argument specification.</p>
-<p>For example:</p>
-<pre>
-%macro foo 1-3 
-        ; Do something 
-%endmacro 
-%unmacro foo 1-3
-</pre>
-<p>removes the previously defined macro <code>foo</code>, but</p>
-<pre>
-%macro bar 1-3 
-        ; Do something 
-%endmacro 
-%unmacro bar 1
-</pre>
-<p>does <em>not</em> remove the macro <code>bar</code>, since the argument
-specification does not match exactly.</p>
-<p>A case-insensitive macro needs to be removed with the
-<code>%unimacro</code> directive.</p>
-<h3 id="section-4.6">4.6 Conditional Assembly</h3>
-<p>Similarly to the C preprocessor, NASM allows sections of a source file
-to be assembled only if certain conditions are met. The general syntax of
-this feature looks like this:</p>
-<pre>
-%if&lt;condition&gt; 
-    ; some code which only appears if &lt;condition&gt; is met 
-%elif&lt;condition2&gt; 
-    ; only appears if &lt;condition&gt; is not met but &lt;condition2&gt; is 
-%else 
-    ; this appears if neither &lt;condition&gt; nor &lt;condition2&gt; was met 
-%endif
-</pre>
-<p>The inverse forms <code>%ifn</code> and <code>%elifn</code> are also
-supported.</p>
-<p>The <code>%else</code> clause is optional, as is the <code>%elif</code>
-clause. You can have more than one <code>%elif</code> clause as well.</p>
-<p>There are a number of variants of the <code>%if</code> directive. Each
-has its corresponding <code>%elif</code>, <code>%ifn</code>, and
-<code>%elifn</code> directives; for example, the equivalents to the
-<code>%ifdef</code> directive are <code>%elifdef</code>,
-<code>%ifndef</code>, and <code>%elifndef</code>.</p>
-<h4 id="section-4.6.1">4.6.1 <code>%ifdef</code>: Testing Single-Line Macro Existence</h4>
-<p>Beginning a conditional-assembly block with the line
-<code>%ifdef MACRO</code> will assemble the subsequent code if, and only
-if, a single-line macro called <code>MACRO</code> is defined. If not, then
-the <code>%elif</code> and <code>%else</code> blocks (if any) will be
-processed instead.</p>
-<p>For example, when debugging a program, you might want to write code such
-as</p>
-<pre>
-          ; perform some function 
-%ifdef DEBUG 
-          writefile 2,"Function performed successfully",13,10 
-%endif 
-          ; go and do something else
-</pre>
-<p>Then you could use the command-line option <code>-dDEBUG</code> to
-create a version of the program which produced debugging messages, and
-remove the option to generate the final release version of the program.</p>
-<p>You can test for a macro <em>not</em> being defined by using
-<code>%ifndef</code> instead of <code>%ifdef</code>. You can also test for
-macro definitions in <code>%elif</code> blocks by using
-<code>%elifdef</code> and <code>%elifndef</code>.</p>
-<h4 id="section-4.6.2">4.6.2 <code>%ifmacro</code>: Testing Multi-Line Macro Existence</h4>
-<p>The <code>%ifmacro</code> directive operates in the same way as the
-<code>%ifdef</code> directive, except that it checks for the existence of a
-multi-line macro.</p>
-<p>For example, you may be working with a large project and not have
-control over the macros in a library. You may want to create a macro with
-one name if it doesn't already exist, and another name if one with that
-name does exist.</p>
-<p>The <code>%ifmacro</code> is considered true if defining a macro with
-the given name and number of arguments would cause a definitions conflict.
-For example:</p>
-<pre>
-%ifmacro MyMacro 1-3 
-
-     %error "MyMacro 1-3" causes a conflict with an existing macro. 
-
-%else 
-
-     %macro MyMacro 1-3 
-
-             ; insert code to define the macro 
-
-     %endmacro 
-
-%endif
-</pre>
-<p>This will create the macro "MyMacro 1-3" if no macro already exists
-which would conflict with it, and emits a warning if there would be a
-definition conflict.</p>
-<p>You can test for the macro not existing by using the
-<code>%ifnmacro</code> instead of <code>%ifmacro</code>. Additional tests
-can be performed in <code>%elif</code> blocks by using
-<code>%elifmacro</code> and <code>%elifnmacro</code>.</p>
-<h4 id="section-4.6.3">4.6.3 <code>%ifctx</code>: Testing the Context Stack</h4>
-<p>The conditional-assembly construct <code>%ifctx</code> will cause the
-subsequent code to be assembled if and only if the top context on the
-preprocessor's context stack has the same name as one of the arguments. As
-with <code>%ifdef</code>, the inverse and <code>%elif</code> forms
-<code>%ifnctx</code>, <code>%elifctx</code> and <code>%elifnctx</code> are
-also supported.</p>
-<p>For more details of the context stack, see
-<a href="#section-4.9">section 4.9</a>. For a sample use of
-<code>%ifctx</code>, see <a href="#section-4.9.6">section 4.9.6</a>.</p>
-<h4 id="section-4.6.4">4.6.4 <code>%if</code>: Testing Arbitrary Numeric Expressions</h4>
-<p>The conditional-assembly construct <code>%if expr</code> will cause the
-subsequent code to be assembled if and only if the value of the numeric
-expression <code>expr</code> is non-zero. An example of the use of this
-feature is in deciding when to break out of a <code>%rep</code>
-preprocessor loop: see <a href="#section-4.7">section 4.7</a> for a
-detailed example.</p>
-<p>The expression given to <code>%if</code>, and its counterpart
-<code>%elif</code>, is a critical expression (see
-<a href="nasmdoc3.html#section-3.8">section 3.8</a>).</p>
-<p>Like other <code>%if</code> constructs, <code>%if</code> has a
-counterpart <code>%elif</code>, and negative forms <code>%ifn</code> and
-<code>%elifn</code>.</p>
-<h4 id="section-4.6.5">4.6.5 <code>%ifidn</code> and <code>%ifidni</code>: Testing Exact Text Identity</h4>
-<p>The construct <code>%ifidn text1,text2</code> will cause the subsequent
-code to be assembled if and only if <code>text1</code> and
-<code>text2</code>, after expanding single-line macros, are identical
-pieces of text. Differences in white space are not counted.</p>
-<p><code>%ifidni</code> is similar to <code>%ifidn</code>, but is
-case-insensitive.</p>
-<p>For example, the following macro pushes a register or number on the
-stack, and allows you to treat <code>IP</code> as a real register:</p>
-<pre>
-%macro  pushparam 1 
-
-  %ifidni %1,ip 
-        call    %%label 
-  %%label: 
-  %else 
-        push    %1 
-  %endif 
-
-%endmacro
-</pre>
-<p>Like other <code>%if</code> constructs, <code>%ifidn</code> has a
-counterpart <code>%elifidn</code>, and negative forms <code>%ifnidn</code>
-and <code>%elifnidn</code>. Similarly, <code>%ifidni</code> has
-counterparts <code>%elifidni</code>, <code>%ifnidni</code> and
-<code>%elifnidni</code>.</p>
-<h4 id="section-4.6.6">4.6.6 <code>%ifid</code>, <code>%ifnum</code>, <code>%ifstr</code>: Testing Token Types</h4>
-<p>Some macros will want to perform different tasks depending on whether
-they are passed a number, a string, or an identifier. For example, a string
-output macro might want to be able to cope with being passed either a
-string constant or a pointer to an existing string.</p>
-<p>The conditional assembly construct <code>%ifid</code>, taking one
-parameter (which may be blank), assembles the subsequent code if and only
-if <em>the first token</em> in the parameter exists and is an identifier.
-<code>$</code> and <code>$$</code> are <em>not</em> considered identifiers
-by <code>%ifid</code>.</p>
-<p><code>%ifnum</code> works similarly, but tests for the token being an
-integer numeric constant (not an expression!) possibly preceded by
-<code>+</code> or <code>-</code>; <code>%ifstr</code> tests for it being a
-quoted string.</p>
-<p>For example, the <code>writefile</code> macro defined in
-<a href="#section-4.5.3">section 4.5.3</a> can be extended to take
-advantage of <code>%ifstr</code> in the following fashion:</p>
-<pre>
-%macro writefile 2-3+ 
-
-  %ifstr %2 
-        jmp     %%endstr 
-    %if %0 = 3 
-      %%str:    db      %2,%3 
-    %else 
-      %%str:    db      %2 
-    %endif 
-      %%endstr: mov     dx,%%str 
-                mov     cx,%%endstr-%%str 
-  %else 
-                mov     dx,%2 
-                mov     cx,%3 
-  %endif 
-                mov     bx,%1 
-                mov     ah,0x40 
-                int     0x21 
-
-%endmacro
-</pre>
-<p>Then the <code>writefile</code> macro can cope with being called in
-either of the following two ways:</p>
-<pre>
-        writefile file, strpointer, length 
-        writefile file, "hello", 13, 10
-</pre>
-<p>In the first, <code>strpointer</code> is used as the address of an
-already-declared string, and <code>length</code> is used as its length; in
-the second, a string is given to the macro, which therefore declares it
-itself and works out the address and length for itself.</p>
-<p>Note the use of <code>%if</code> inside the <code>%ifstr</code>: this is
-to detect whether the macro was passed two arguments (so the string would
-be a single string constant, and <code>db %2</code> would be adequate) or
-more (in which case, all but the first two would be lumped together into
-<code>%3</code>, and <code>db %2,%3</code> would be required).</p>
-<p>The usual <code>%elif</code>..., <code>%ifn</code>..., and
-<code>%elifn</code>... versions exist for each of <code>%ifid</code>,
-<code>%ifnum</code> and <code>%ifstr</code>.</p>
-<h4 id="section-4.6.7">4.6.7 <code>%iftoken</code>: Test for a Single Token</h4>
-<p>Some macros will want to do different things depending on if it is
-passed a single token (e.g. paste it to something else using
-<code>%+</code>) versus a multi-token sequence.</p>
-<p>The conditional assembly construct <code>%iftoken</code> assembles the
-subsequent code if and only if the expanded parameters consist of exactly
-one token, possibly surrounded by whitespace.</p>
-<p>For example:</p>
-<pre>
-%iftoken 1
-</pre>
-<p>will assemble the subsequent code, but</p>
-<pre>
-%iftoken -1
-</pre>
-<p>will not, since <code>-1</code> contains two tokens: the unary minus
-operator <code>-</code>, and the number <code>1</code>.</p>
-<p>The usual <code>%eliftoken</code>, <code>%ifntoken</code>, and
-<code>%elifntoken</code> variants are also provided.</p>
-<h4 id="section-4.6.8">4.6.8 <code>%ifempty</code>: Test for Empty Expansion</h4>
-<p>The conditional assembly construct <code>%ifempty</code> assembles the
-subsequent code if and only if the expanded parameters do not contain any
-tokens at all, whitespace excepted.</p>
-<p>The usual <code>%elifempty</code>, <code>%ifnempty</code>, and
-<code>%elifnempty</code> variants are also provided.</p>
-<h4 id="section-4.6.9">4.6.9 <code>%ifenv</code>: Test If Environment Variable Exists</h4>
-<p>The conditional assembly construct <code>%ifenv</code> assembles the
-subsequent code if and only if the environment variable referenced by the
-<code>%!</code><em>variable</em> directive exists.</p>
-<p>The usual <code>%elifenv</code>, <code>%ifnenv</code>, and
-<code>%elifnenv</code> variants are also provided.</p>
-<p>Just as for <code>%!</code><em>variable</em> the argument should be
-written as a string if it contains characters that would not be legal in an
-identifier. See <a href="#section-4.13.2">section 4.13.2</a>.</p>
-<h3 id="section-4.7">4.7 Preprocessor Loops: <code>%rep</code></h3>
-<p>NASM's <code>TIMES</code> prefix, though useful, cannot be used to
-invoke a multi-line macro multiple times, because it is processed by NASM
-after macros have already been expanded. Therefore NASM provides another
-form of loop, this time at the preprocessor level: <code>%rep</code>.</p>
-<p>The directives <code>%rep</code> and <code>%endrep</code>
-(<code>%rep</code> takes a numeric argument, which can be an expression;
-<code>%endrep</code> takes no arguments) can be used to enclose a chunk of
-code, which is then replicated as many times as specified by the
-preprocessor:</p>
-<pre>
-%assign i 0 
-%rep    64 
-        inc     word table+2*i 
-%assign i i+1 
-%endrep
-</pre>
-<p>This will generate a sequence of 64 <code>INC</code> instructions,
-incrementing every word of memory from <code>table</code> to
-<code>table+126</code>.</p>
-<p>For more complex termination conditions, or to break out of a repeat
-loop part way along, you can use the <code>%exitrep</code> directive to
-terminate the loop, like this:</p>
-<pre>
-fibonacci: 
-%assign i 0 
-%assign j 1 
-%rep 100 
-%if j &gt; 65535 
-    %exitrep 
-%endif 
-        dw j 
-%assign k j+i 
-%assign i j 
-%assign j k 
-%endrep 
-
-fib_number equ ($-fibonacci)/2
-</pre>
-<p>This produces a list of all the Fibonacci numbers that will fit in 16
-bits. Note that a maximum repeat count must still be given to
-<code>%rep</code>. This is to prevent the possibility of NASM getting into
-an infinite loop in the preprocessor, which (on multitasking or multi-user
-systems) would typically cause all the system memory to be gradually used
-up and other applications to start crashing.</p>
-<p>Note the maximum repeat count is limited to the value specified by the
-<code>--limit-rep</code> option or <code>%pragma limit rep</code>, see
-<a href="nasmdoc2.html#section-2.1.31">section 2.1.31</a>.</p>
-<h3 id="section-4.8">4.8 Source Files and Dependencies</h3>
-<p>These commands allow you to split your sources into multiple files.</p>
-<h4 id="section-4.8.1">4.8.1 <code>%include</code>: Including Other Files</h4>
-<p>Using, once again, a very similar syntax to the C preprocessor, NASM's
-preprocessor lets you include other source files into your code. This is
-done by the use of the <code>%include</code> directive:</p>
-<pre>
-%include "macros.mac"
-</pre>
-<p>will include the contents of the file <code>macros.mac</code> into the
-source file containing the <code>%include</code> directive.</p>
-<p>Include files are searched for in the current directory (the directory
-you're in when you run NASM, as opposed to the location of the NASM
-executable or the location of the source file), plus any directories
-specified on the NASM command line using the <code>-i</code> option.</p>
-<p>The standard C idiom for preventing a file being included more than once
-is just as applicable in NASM: if the file <code>macros.mac</code> has the
-form</p>
-<pre>
-%ifndef MACROS_MAC 
-    %define MACROS_MAC 
-    ; now define some macros 
-%endif
-</pre>
-<p>then including the file more than once will not cause errors, because
-the second time the file is included nothing will happen because the macro
-<code>MACROS_MAC</code> will already be defined.</p>
-<p>You can force a file to be included even if there is no
-<code>%include</code> directive that explicitly includes it, by using the
-<code>-p</code> option on the NASM command line (see
-<a href="nasmdoc2.html#section-2.1.19">section 2.1.19</a>).</p>
-<h4 id="section-4.8.2">4.8.2 <code>%pathsearch</code>: Search the Include Path</h4>
-<p>The <code>%pathsearch</code> directive takes a single-line macro name
-and a filename, and declare or redefines the specified single-line macro to
-be the include-path-resolved version of the filename, if the file exists
-(otherwise, it is passed unchanged.)</p>
-<p>For example,</p>
-<pre>
-%pathsearch MyFoo "foo.bin"
-</pre>
-<p>... with <code>-Ibins/</code> in the include path may end up defining
-the macro <code>MyFoo</code> to be <code>"bins/foo.bin"</code>.</p>
-<h4 id="section-4.8.3">4.8.3 <code>%depend</code>: Add Dependent Files</h4>
-<p>The <code>%depend</code> directive takes a filename and adds it to the
-list of files to be emitted as dependency generation when the
-<code>-M</code> options and its relatives (see
-<a href="nasmdoc2.html#section-2.1.5">section 2.1.5</a>) are used. It
-produces no output.</p>
-<p>This is generally used in conjunction with <code>%pathsearch</code>. For
-example, a simplified version of the standard macro wrapper for the
-<code>INCBIN</code> directive looks like:</p>
-<pre>
-%imacro incbin 1-2+ 0 
-%pathsearch dep %1 
-%depend dep 
-        incbin dep,%2 
-%endmacro
-</pre>
-<p>This first resolves the location of the file into the macro
-<code>dep</code>, then adds it to the dependency lists, and finally issues
-the assembler-level <code>INCBIN</code> directive.</p>
-<h4 id="section-4.8.4">4.8.4 <code>%use</code>: Include Standard Macro Package</h4>
-<p>The <code>%use</code> directive is similar to <code>%include</code>, but
-rather than including the contents of a file, it includes a named standard
-macro package. The standard macro packages are part of NASM, and are
-described in <a href="nasmdoc6.html">chapter 6</a>.</p>
-<p>Unlike the <code>%include</code> directive, package names for the
-<code>%use</code> directive do not require quotes, but quotes are
-permitted. In NASM 2.04 and 2.05 the unquoted form would be macro-expanded;
-this is no longer true. Thus, the following lines are equivalent:</p>
-<pre>
-%use altreg 
-%use 'altreg'
-</pre>
-<p>Standard macro packages are protected from multiple inclusion. When a
-standard macro package is used, a testable single-line macro of the form
-<code>__?USE_</code><em>package</em><code>?__</code> is also defined, see
-<a href="nasmdoc5.html#section-5.7">section 5.7</a>.</p>
-<h3 id="section-4.9">4.9 The Context Stack</h3>
-<p>Having labels that are local to a macro definition is sometimes not
-quite powerful enough: sometimes you want to be able to share labels
-between several macro calls. An example might be a <code>REPEAT</code> ...
-<code>UNTIL</code> loop, in which the expansion of the <code>REPEAT</code>
-macro would need to be able to refer to a label which the
-<code>UNTIL</code> macro had defined. However, for such a macro you would
-also want to be able to nest these loops.</p>
-<p>NASM provides this level of power by means of a <em>context stack</em>.
-The preprocessor maintains a stack of <em>contexts</em>, each of which is
-characterized by a name. You add a new context to the stack using the
-<code>%push</code> directive, and remove one using <code>%pop</code>. You
-can define labels that are local to a particular context on the stack.</p>
-<h4 id="section-4.9.1">4.9.1 <code>%push</code> and <code>%pop</code>: Creating and Removing Contexts</h4>
-<p>The <code>%push</code> directive is used to create a new context and
-place it on the top of the context stack. <code>%push</code> takes an
-optional argument, which is the name of the context. For example:</p>
-<pre>
-%push    foobar
-</pre>
-<p>This pushes a new context called <code>foobar</code> on the stack. You
-can have several contexts on the stack with the same name: they can still
-be distinguished. If no name is given, the context is unnamed (this is
-normally used when both the <code>%push</code> and the <code>%pop</code>
-are inside a single macro definition.)</p>
-<p>The directive <code>%pop</code>, taking one optional argument, removes
-the top context from the context stack and destroys it, along with any
-labels associated with it. If an argument is given, it must match the name
-of the current context, otherwise it will issue an error.</p>
-<h4 id="section-4.9.2">4.9.2 Context-Local Labels</h4>
-<p>Just as the usage <code>%%foo</code> defines a label which is local to
-the particular macro call in which it is used, the usage <code>%$foo</code>
-is used to define a label which is local to the context on the top of the
-context stack. So the <code>REPEAT</code> and <code>UNTIL</code> example
-given above could be implemented by means of:</p>
-<pre>
-%macro repeat 0 
-
-    %push   repeat 
-    %$begin: 
-
-%endmacro 
-
-%macro until 1 
-
-        j%-1    %$begin 
-    %pop 
-
-%endmacro
-</pre>
-<p>and invoked by means of, for example,</p>
-<pre>
-        mov     cx,string 
-        repeat 
-        add     cx,3 
-        scasb 
-        until   e
-</pre>
-<p>which would scan every fourth byte of a string in search of the byte in
-<code>AL</code>.</p>
-<p>If you need to define, or access, labels local to the context
-<em>below</em> the top one on the stack, you can use <code>%$$foo</code>,
-or <code>%$$$foo</code> for the context below that, and so on.</p>
-<h4 id="section-4.9.3">4.9.3 Context-Local Single-Line Macros</h4>
-<p>NASM also allows you to define single-line macros which are local to a
-particular context, in just the same way:</p>
-<pre>
-%define %$localmac 3
-</pre>
-<p>will define the single-line macro <code>%$localmac</code> to be local to
-the top context on the stack. Of course, after a subsequent
-<code>%push</code>, it can then still be accessed by the name
-<code>%$$localmac</code>.</p>
-<h4 id="section-4.9.4">4.9.4 Context Fall-Through Lookup <em>(deprecated)</em></h4>
-<p>Context fall-through lookup (automatic searching of outer contexts) is a
-feature that was added in NASM version 0.98.03. Unfortunately, this feature
-is unintuitive and can result in buggy code that would have otherwise been
-prevented by NASM's error reporting. As a result, this feature has been
-<em>deprecated</em>. NASM version 2.09 will issue a warning when usage of
-this <em>deprecated</em> feature is detected. Starting with NASM version
-2.10, usage of this <em>deprecated</em> feature will simply result in an
-<em>expression syntax error</em>.</p>
-<p>An example usage of this <em>deprecated</em> feature follows:</p>
-<pre>
-%macro ctxthru 0 
-%push ctx1 
-    %assign %$external 1 
-        %push ctx2 
-            %assign %$internal 1 
-            mov eax, %$external 
-            mov eax, %$internal 
-        %pop 
-%pop 
-%endmacro
-</pre>
-<p>As demonstrated, <code>%$external</code> is being defined in the
-<code>ctx1</code> context and referenced within the <code>ctx2</code>
-context. With context fall-through lookup, referencing an undefined
-context-local macro like this implicitly searches through all outer
-contexts until a match is made or isn't found in any context. As a result,
-<code>%$external</code> referenced within the <code>ctx2</code> context
-would implicitly use <code>%$external</code> as defined in
-<code>ctx1</code>. Most people would expect NASM to issue an error in this
-situation because <code>%$external</code> was never defined within
-<code>ctx2</code> and also isn't qualified with the proper context depth,
-<code>%$$external</code>.</p>
-<p>Here is a revision of the above example with proper context depth:</p>
-<pre>
-%macro ctxthru 0 
-%push ctx1 
-    %assign %$external 1 
-        %push ctx2 
-            %assign %$internal 1 
-            mov eax, %$$external 
-            mov eax, %$internal 
-        %pop 
-%pop 
-%endmacro
-</pre>
-<p>As demonstrated, <code>%$external</code> is still being defined in the
-<code>ctx1</code> context and referenced within the <code>ctx2</code>
-context. However, the reference to <code>%$external</code> within
-<code>ctx2</code> has been fully qualified with the proper context depth,
-<code>%$$external</code>, and thus is no longer ambiguous, unintuitive or
-erroneous.</p>
-<h4 id="section-4.9.5">4.9.5 <code>%repl</code>: Renaming a Context</h4>
-<p>If you need to change the name of the top context on the stack (in
-order, for example, to have it respond differently to <code>%ifctx</code>),
-you can execute a <code>%pop</code> followed by a <code>%push</code>; but
-this will have the side effect of destroying all context-local labels and
-macros associated with the context that was just popped.</p>
-<p>NASM provides the directive <code>%repl</code>, which <em>replaces</em>
-a context with a different name, without touching the associated macros and
-labels. So you could replace the destructive code</p>
-<pre>
-%pop 
-%push   newname
-</pre>
-<p>with the non-destructive version <code>%repl newname</code>.</p>
-<h4 id="section-4.9.6">4.9.6 Example Use of the Context Stack: Block IFs</h4>
-<p>This example makes use of almost all the context-stack features,
-including the conditional-assembly construct <code>%ifctx</code>, to
-implement a block IF statement as a set of macros.</p>
-<pre>
-%macro if 1 
-
-    %push if 
-    j%-1  %$ifnot 
-
-%endmacro 
-
-%macro else 0 
-
-  %ifctx if 
-        %repl   else 
-        jmp     %$ifend 
-        %$ifnot: 
-  %else 
-        %error  "expected `if' before `else'" 
-  %endif 
-
-%endmacro 
-
-%macro endif 0 
-
-  %ifctx if 
-        %$ifnot: 
-        %pop 
-  %elifctx      else 
-        %$ifend: 
-        %pop 
-  %else 
-        %error  "expected `if' or `else' before `endif'" 
-  %endif 
-
-%endmacro
-</pre>
-<p>This code is more robust than the <code>REPEAT</code> and
-<code>UNTIL</code> macros given in <a href="#section-4.9.2">section
-4.9.2</a>, because it uses conditional assembly to check that the macros
-are issued in the right order (for example, not calling <code>endif</code>
-before <code>if</code>) and issues a <code>%error</code> if they're not.</p>
-<p>In addition, the <code>endif</code> macro has to be able to cope with
-the two distinct cases of either directly following an <code>if</code>, or
-following an <code>else</code>. It achieves this, again, by using
-conditional assembly to do different things depending on whether the
-context on top of the stack is <code>if</code> or <code>else</code>.</p>
-<p>The <code>else</code> macro has to preserve the context on the stack, in
-order to have the <code>%$ifnot</code> referred to by the <code>if</code>
-macro be the same as the one defined by the <code>endif</code> macro, but
-has to change the context's name so that <code>endif</code> will know there
-was an intervening <code>else</code>. It does this by the use of
-<code>%repl</code>.</p>
-<p>A sample usage of these macros might look like:</p>
-<pre>
-        cmp     ax,bx 
-
-        if ae 
-               cmp     bx,cx 
-
-               if ae 
-                       mov     ax,cx 
-               else 
-                       mov     ax,bx 
-               endif 
-
-        else 
-               cmp     ax,cx 
-
-               if ae 
-                       mov     ax,cx 
-               endif 
-
-        endif
-</pre>
-<p>The block-<code>IF</code> macros handle nesting quite happily, by means
-of pushing another context, describing the inner <code>if</code>, on top of
-the one describing the outer <code>if</code>; thus <code>else</code> and
-<code>endif</code> always refer to the last unmatched <code>if</code> or
-<code>else</code>.</p>
-<h3 id="section-4.10">4.10 Stack Relative Preprocessor Directives</h3>
-<p>The following preprocessor directives provide a way to use labels to
-refer to local variables allocated on the stack.</p>
-<ul>
-<li>
-<p><code>%arg</code> (see <a href="#section-4.10.1">section 4.10.1</a>)</p>
-</li>
-<li>
-<p><code>%stacksize</code> (see <a href="#section-4.10.2">section
-4.10.2</a>)</p>
-</li>
-<li>
-<p><code>%local</code> (see <a href="#section-4.10.3">section 4.10.3</a>)</p>
-</li>
-</ul>
-<h4 id="section-4.10.1">4.10.1 <code>%arg</code> Directive</h4>
-<p>The <code>%arg</code> directive is used to simplify the handling of
-parameters passed on the stack. Stack based parameter passing is used by
-many high level languages, including C, C++ and Pascal.</p>
-<p>While NASM has macros which attempt to duplicate this functionality (see
-<a href="nasmdoc9.html#section-9.4.5">section 9.4.5</a>), the syntax is not
-particularly convenient to use and is not TASM compatible. Here is an
-example which shows the use of <code>%arg</code> without any external
-macros:</p>
-<pre>
-some_function: 
-
-    %push     mycontext        ; save the current context 
-    %stacksize large           ; tell NASM to use bp 
-    %arg      i:word, j_ptr:word 
-
-        mov     ax,i 
-        mov     bx,j_ptr 
-        add     ax,bx 
-        ret 
-
-    %pop                       ; restore original context
-</pre>
-<p>This is similar to the procedure defined in
-<a href="nasmdoc9.html#section-9.4.5">section 9.4.5</a> and adds the value
-in i to the value pointed to by j_ptr and returns the sum in the ax
-register. See <a href="#section-4.9.1">section 4.9.1</a> for an explanation
-of <code>push</code> and <code>pop</code> and the use of context stacks.</p>
-<h4 id="section-4.10.2">4.10.2 <code>%stacksize</code> Directive</h4>
-<p>The <code>%stacksize</code> directive is used in conjunction with the
-<code>%arg</code> (see <a href="#section-4.10.1">section 4.10.1</a>) and
-the <code>%local</code> (see <a href="#section-4.10.3">section 4.10.3</a>)
-directives. It tells NASM the default size to use for subsequent
-<code>%arg</code> and <code>%local</code> directives. The
-<code>%stacksize</code> directive takes one required argument which is one
-of <code>flat</code>, <code>flat64</code>, <code>large</code> or
-<code>small</code>.</p>
-<pre>
-%stacksize flat
-</pre>
-<p>This form causes NASM to use stack-based parameter addressing relative
-to <code>ebp</code> and it assumes that a near form of call was used to get
-to this label (i.e. that <code>eip</code> is on the stack).</p>
-<pre>
-%stacksize flat64
-</pre>
-<p>This form causes NASM to use stack-based parameter addressing relative
-to <code>rbp</code> and it assumes that a near form of call was used to get
-to this label (i.e. that <code>rip</code> is on the stack).</p>
-<pre>
-%stacksize large
-</pre>
-<p>This form uses <code>bp</code> to do stack-based parameter addressing
-and assumes that a far form of call was used to get to this address (i.e.
-that <code>ip</code> and <code>cs</code> are on the stack).</p>
-<pre>
-%stacksize small
-</pre>
-<p>This form also uses <code>bp</code> to address stack parameters, but it
-is different from <code>large</code> because it also assumes that the old
-value of bp is pushed onto the stack (i.e. it expects an <code>ENTER</code>
-instruction). In other words, it expects that <code>bp</code>,
-<code>ip</code> and <code>cs</code> are on the top of the stack, underneath
-any local space which may have been allocated by <code>ENTER</code>. This
-form is probably most useful when used in combination with the
-<code>%local</code> directive (see <a href="#section-4.10.3">section
-4.10.3</a>).</p>
-<h4 id="section-4.10.3">4.10.3 <code>%local</code> Directive</h4>
-<p>The <code>%local</code> directive is used to simplify the use of local
-temporary stack variables allocated in a stack frame. Automatic local
-variables in C are an example of this kind of variable. The
-<code>%local</code> directive is most useful when used with the
-<code>%stacksize</code> (see <a href="#section-4.10.2">section 4.10.2</a>
-and is also compatible with the <code>%arg</code> directive (see
-<a href="#section-4.10.1">section 4.10.1</a>). It allows simplified
-reference to variables on the stack which have been allocated typically by
-using the <code>ENTER</code> instruction. An example of its use is the
-following:</p>
-<pre>
-silly_swap: 
-
-    %push mycontext             ; save the current context 
-    %stacksize small            ; tell NASM to use bp 
-    %assign %$localsize 0       ; see text for explanation 
-    %local old_ax:word, old_dx:word 
-
-        enter   %$localsize,0   ; see text for explanation 
-        mov     old_ax,ax     ; swap ax &amp; bx 
-        mov     old_dx,dx     ; and swap dx &amp; cx 
-        mov     ax,bx 
-        mov     dx,cx 
-        mov     bx,old_ax 
-        mov     cx,old_dx 
-        leave                   ; restore old bp 
-        ret                     ; 
-
-    %pop                        ; restore original context
-</pre>
-<p>The <code>%$localsize</code> variable is used internally by the
-<code>%local</code> directive and <em>must</em> be defined within the
-current context before the <code>%local</code> directive may be used.
-Failure to do so will result in one expression syntax error for each
-<code>%local</code> variable declared. It then may be used in the
-construction of an appropriately sized ENTER instruction as shown in the
-example.</p>
-<h3 id="section-4.11">4.11 Reporting User-Defined Errors: <code>%error</code>, <code>%warning</code>, <code>%fatal</code></h3>
-<p>The preprocessor directive <code>%error</code> will cause NASM to report
-an error if it occurs in assembled code. So if other users are going to try
-to assemble your source files, you can ensure that they define the right
-macros by means of code like this:</p>
-<pre>
-%ifdef F1 
-    ; do some setup 
-%elifdef F2 
-    ; do some different setup 
-%else 
-    %error "Neither F1 nor F2 was defined." 
-%endif
-</pre>
-<p>Then any user who fails to understand the way your code is supposed to
-be assembled will be quickly warned of their mistake, rather than having to
-wait until the program crashes on being run and then not knowing what went
-wrong.</p>
-<p>Similarly, <code>%warning</code> issues a warning, but allows assembly
-to continue:</p>
-<pre>
-%ifdef F1 
-    ; do some setup 
-%elifdef F2 
-    ; do some different setup 
-%else 
-    %warning "Neither F1 nor F2 was defined, assuming F1." 
-    %define F1 
-%endif
-</pre>
-<p><code>%error</code> and <code>%warning</code> are issued only on the
-final assembly pass. This makes them safe to use in conjunction with tests
-that depend on symbol values.</p>
-<p><code>%fatal</code> terminates assembly immediately, regardless of pass.
-This is useful when there is no point in continuing the assembly further,
-and doing so is likely just going to cause a spew of confusing error
-messages.</p>
-<p>It is optional for the message string after <code>%error</code>,
-<code>%warning</code> or <code>%fatal</code> to be quoted. If it is
-<em>not</em>, then single-line macros are expanded in it, which can be used
-to display more information to the user. For example:</p>
-<pre>
-%if foo &gt; 64 
-    %assign foo_over foo-64 
-    %error foo is foo_over bytes too large 
-%endif
-</pre>
-<h3 id="section-4.12">4.12 <code>%pragma</code>: Setting Options</h3>
-<p>The <code>%pragma</code> directive controls a number of options in NASM.
-Pragmas are intended to remain backwards compatible, and therefore an
-unknown <code>%pragma</code> directive is not an error.</p>
-<p>The various pragmas are documented with the options they affect.</p>
-<p>The general structure of a NASM pragma is:</p>
-<p><code>%pragma</code> <em>namespace</em> <em>directive</em>
-<em>arguments...</em></p>
-<p>Currently defined namespaces are:</p>
-<ul>
-<li>
-<p><code>ignore</code>: this <code>%pragma</code> is unconditionally
-ignored.</p>
-</li>
-<li>
-<p><code>preproc</code>: preprocessor, see
-<a href="#section-4.12.1">section 4.12.1</a>.</p>
-</li>
-<li>
-<p><code>limit</code>: resource limits, see
-<a href="nasmdoc2.html#section-2.1.31">section 2.1.31</a>.</p>
-</li>
-<li>
-<p><code>asm</code>: the parser and assembler proper. Currently no such
-pragmas are defined.</p>
-</li>
-<li>
-<p><code>list</code>: listing options, see
-<a href="nasmdoc2.html#section-2.1.4">section 2.1.4</a>.</p>
-</li>
-<li>
-<p><code>file</code>: general file handling options. Currently no such
-pragmas are defined.</p>
-</li>
-<li>
-<p><code>input</code>: input file handling options. Currently no such
-pragmas are defined.</p>
-</li>
-<li>
-<p><code>output</code>: output format options.</p>
-</li>
-<li>
-<p><code>debug</code>: debug format options.</p>
-</li>
-</ul>
-<p>In addition, the name of any output or debug format, and sometimes
-groups thereof, also constitute <code>%pragma</code> namespaces. The
-namespaces <code>output</code> and <code>debug</code> simply refer to
-<em>any</em> output or debug format, respectively.</p>
-<p>For example, to prepend an underscore to global symbols regardless of
-the output format (see <a href="nasmdoc7.html#section-7.10">section
-7.10</a>):</p>
-<pre>
-%pragma output gprefix _
-</pre>
-<p>... whereas to prepend an underscore to global symbols only when the
-output is either <code>win32</code> or <code>win64</code>:</p>
-<pre>
-%pragma win gprefix _
-</pre>
-<h4 id="section-4.12.1">4.12.1 Preprocessor Pragmas</h4>
-<p>The only preprocessor <code>%pragma</code> defined in NASM 2.15 is:</p>
-<ul>
-<li>
-<p><code>%pragma preproc sane_empty_expansion</code>: disables legacy
-compatibility handling of braceless empty arguments to multi-line macros.
-See <a href="#section-4.5">section 4.5</a> and
-<a href="nasmdoc2.html#section-2.1.26">section 2.1.26</a>.</p>
-</li>
-</ul>
-<h3 id="section-4.13">4.13 Other Preprocessor Directives</h3>
-<h4 id="section-4.13.1">4.13.1 <code>%line</code> Directive</h4>
-<p>The <code>%line</code> directive is used to notify NASM that the input
-line corresponds to a specific line number in another file. Typically this
-other file would be an original source file, with the current NASM input
-being the output of a pre-processor. The <code>%line</code> directive
-allows NASM to output messages which indicate the line number of the
-original source file, instead of the file that is being read by NASM.</p>
-<p>This preprocessor directive is not generally used directly by
-programmers, but may be of interest to preprocessor authors. The usage of
-the <code>%line</code> preprocessor directive is as follows:</p>
-<pre>
-%line nnn+mmm filename
-</pre>
-<p>In this directive, <code>nnn</code> identifies the line of the original
-source file which this line corresponds to. <code>mmm</code> is an optional
-parameter which specifies a line increment value; each line of the input
-file read in is considered to correspond to <code>mmm</code> lines of the
-original source file. Finally, <code>filename</code> is an optional
-parameter which specifies the file name of the original source file. It may
-be a quoted string, in which case any additional argument after the quoted
-string will be ignored.</p>
-<p>After reading a <code>%line</code> preprocessor directive, NASM will
-report all file name and line numbers relative to the values specified
-therein.</p>
-<p>If the command line option <code>--no-line</code> is given, all
-<code>%line</code> directives are ignored. This may be useful for debugging
-preprocessed code. See <a href="nasmdoc2.html#section-2.1.33">section
-2.1.33</a>.</p>
-<p>Starting in NASM 2.15, <code>%line</code> directives are processed
-before any other processing takes place.</p>
-<p>For compatibility with the output from some other preprocessors,
-including many C preprocessors, a <code>#</code> character followed by
-whitespace <em>at the very beginning of a line</em> is also treated as a
-<code>%line</code> directive, except that double quotes surrounding the
-filename are treated like NASM backquotes, with
-<code>\</code>&ndash;escaped sequences decoded.</p>
-<h4 id="section-4.13.2">4.13.2 <code>%!</code><em>variable</em>: Read an Environment Variable.</h4>
-<p>The <code>%!</code><em>variable</em> directive makes it possible to read
-the value of an environment variable at assembly time. This could, for
-example, be used to store the contents of an environment variable into a
-string, which could be used at some other point in your code.</p>
-<p>For example, suppose that you have an environment variable
-<code>FOO</code>, and you want the contents of <code>FOO</code> to be
-embedded in your program as a quoted string. You could do that as follows:</p>
-<pre>
-%defstr FOO          %!FOO
-</pre>
-<p>See <a href="#section-4.2.9">section 4.2.9</a> for notes on the
-<code>%defstr</code> directive.</p>
-<p>If the name of the environment variable contains non-identifier
-characters, you can use string quotes to surround the name of the variable,
-for example:</p>
-<pre>
-%defstr C_colon      %!'C:'
-</pre>
-<h4 id="section-4.13.3">4.13.3 <code>%clear</code>: Clear All Macro Definitions</h4>
-<p>The directive <code>%clear</code> clears all definitions of a certain
-type, <em>including the ones defined by NASM itself.</em> This can be
-useful when preprocessing non-NASM code, or to drop backwards compatibility
-aliases.</p>
-<p>The syntax is:</p>
-<pre>
-   %clear global|context type...
-</pre>
-<p>... where <code>context</code> indicates that this applies to
-context-local macros only; the default is <code>global</code>.</p>
-<p><code>type</code> can be one or more of:</p>
-<ul>
-<li>
-<p><code>define</code> single-line macros</p>
-</li>
-<li>
-<p><code>defalias</code> single-line macro aliases (useful to remove
-backwards compatibility aliases)</p>
-</li>
-<li>
-<p><code>alldefine</code> same as <code>define defalias</code></p>
-</li>
-<li>
-<p><code>macro</code> multi-line macros</p>
-</li>
-<li>
-<p><code>all</code> same as <code>alldefine macro</code> (default)</p>
-</li>
-</ul>
-<p>In NASM 2.14 and earlier, only the single syntax <code>%clear</code> was
-supported, which is equivalent to <code>%clear global all</code>.</p>
-</div>
-</body>
-</html>

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@@ -1,407 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.1//EN" "http://www.w3.org/TR/xhtml11/DTD/xhtml11.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<meta charset="UTF-8" />
-<title>NASM - The Netwide Assembler</title>
-<link href="nasmdoc.css" rel="stylesheet" type="text/css" />
-<link href="local.css" rel="stylesheet" type="text/css" />
-</head>
-<body>
-<ul class="navbar">
-<li class="first"><a class="prev" href="nasmdoc4.html">Chapter 4</a></li>
-<li><a class="next" href="nasmdoc6.html">Chapter 6</a></li>
-<li><a class="toc" href="nasmdoc0.html">Contents</a></li>
-<li class="last"><a class="index" href="nasmdoci.html">Index</a></li>
-</ul>
-<div class="title">
-<h1>NASM - The Netwide Assembler</h1>
-<span class="subtitle">version 2.16.01</span>
-</div>
-<div class="contents"
->
-<h2 id="chapter-5">Chapter 5: Standard Macros</h2>
-<p>NASM defines a set of standard macros, which are already defined when it
-starts to process any source file. If you really need a program to be
-assembled with no pre-defined macros, you can use the <code>%clear</code>
-directive to empty the preprocessor of everything but context-local
-preprocessor variables and single-line macros, see
-<a href="nasmdoc4.html#section-4.13.3">section 4.13.3</a>.</p>
-<p>Most user-level directives (see <a href="nasmdoc7.html">chapter 7</a>)
-are implemented as macros which invoke primitive directives; these are
-described in <a href="nasmdoc7.html">chapter 7</a>. The rest of the
-standard macro set is described here.</p>
-<p>For compatibility with NASM versions before NASM 2.15, most standard
-macros of the form <code>__?foo?__</code> have aliases of form
-<code>__foo__</code> (see <a href="nasmdoc4.html#section-4.2.11">section
-4.2.11</a>). These can be removed with the directive
-<code>%clear defalias</code>.</p>
-<h3 id="section-5.1">5.1 NASM Version Macros</h3>
-<p>The single-line macros <code>__?NASM_MAJOR?__</code>,
-<code>__?NASM_MINOR?__</code>, <code>__?NASM_SUBMINOR?__</code> and
-<code>__?NASM_PATCHLEVEL?__</code> expand to the major, minor, subminor and
-patch level parts of the version number of NASM being used. So, under NASM
-0.98.32p1 for example, <code>__?NASM_MAJOR?__</code> would be defined to be
-0, <code>__?NASM_MINOR?__</code> would be defined as 98,
-<code>__?NASM_SUBMINOR?__</code> would be defined to 32, and
-<code>__?NASM_PATCHLEVEL?__</code> would be defined as 1.</p>
-<p>Additionally, the macro <code>__?NASM_SNAPSHOT?__</code> is defined for
-automatically generated snapshot releases <em>only</em>.</p>
-<h4 id="section-5.1.1">5.1.1 <code>__?NASM_VERSION_ID?__</code>: NASM Version ID</h4>
-<p>The single-line macro <code>__?NASM_VERSION_ID?__</code> expands to a
-dword integer representing the full version number of the version of nasm
-being used. The value is the equivalent to <code>__?NASM_MAJOR?__</code>,
-<code>__?NASM_MINOR?__</code>, <code>__?NASM_SUBMINOR?__</code> and
-<code>__?NASM_PATCHLEVEL?__</code> concatenated to produce a single
-doubleword. Hence, for 0.98.32p1, the returned number would be equivalent
-to:</p>
-<pre>
-        dd      0x00622001
-</pre>
-<p>or</p>
-<pre>
-        db      1,32,98,0
-</pre>
-<p>Note that the above lines are generate exactly the same code, the second
-line is used just to give an indication of the order that the separate
-values will be present in memory.</p>
-<h4 id="section-5.1.2">5.1.2 <code>__?NASM_VER?__</code>: NASM Version String</h4>
-<p>The single-line macro <code>__?NASM_VER?__</code> expands to a string
-which defines the version number of nasm being used. So, under NASM 0.98.32
-for example,</p>
-<pre>
-        db      __?NASM_VER?__
-</pre>
-<p>would expand to</p>
-<pre>
-        db      "0.98.32"
-</pre>
-<h3 id="section-5.2">5.2 <code>__?FILE?__</code> and <code>__?LINE?__</code>: File Name and Line Number</h3>
-<p>Like the C preprocessor, NASM allows the user to find out the file name
-and line number containing the current instruction. The macro
-<code>__?FILE?__</code> expands to a string constant giving the name of the
-current input file (which may change through the course of assembly if
-<code>%include</code> directives are used), and <code>__?LINE?__</code>
-expands to a numeric constant giving the current line number in the input
-file.</p>
-<p>These macros could be used, for example, to communicate debugging
-information to a macro, since invoking <code>__?LINE?__</code> inside a
-macro definition (either single-line or multi-line) will return the line
-number of the macro <em>call</em>, rather than <em>definition</em>. So to
-determine where in a piece of code a crash is occurring, for example, one
-could write a routine <code>stillhere</code>, which is passed a line number
-in <code>EAX</code> and outputs something like
-<code>line 155: still here</code>. You could then write a macro:</p>
-<pre>
-%macro  notdeadyet 0 
-
-        push    eax 
-        mov     eax,__?LINE?__ 
-        call    stillhere 
-        pop     eax 
-
-%endmacro
-</pre>
-<p>and then pepper your code with calls to <code>notdeadyet</code> until
-you find the crash point.</p>
-<h3 id="section-5.3">5.3 <code>__?BITS?__</code>: Current Code Generation Mode</h3>
-<p>The <code>__?BITS?__</code> standard macro is updated every time that
-the BITS mode is set using the <code>BITS XX</code> or
-<code>BITS XX</code> directive, where XX is a valid mode number of 16, 32
-or 64. <code>__?BITS?__</code> receives the specified mode number and makes
-it globally available. This can be very useful for those who utilize
-mode-dependent macros.</p>
-<h3 id="section-5.4">5.4 <code>__?OUTPUT_FORMAT?__</code>: Current Output Format</h3>
-<p>The <code>__?OUTPUT_FORMAT?__</code> standard macro holds the current
-output format name, as given by the <code>-f</code> option or NASM's
-default. Type <code>nasm -h</code> for a list.</p>
-<pre>
-%ifidn __?OUTPUT_FORMAT?__, win32 
- %define NEWLINE 13, 10 
-%elifidn __?OUTPUT_FORMAT?__, elf32 
- %define NEWLINE 10 
-%endif
-</pre>
-<h3 id="section-5.5">5.5 <code>__?DEBUG_FORMAT?__</code>: Current Debug Format</h3>
-<p>If debugging information generation is enabled, The
-<code>__?DEBUG_FORMAT?__</code> standard macro holds the current debug
-format name as specified by the <code>-F</code> or <code>-g</code> option
-or the output format default. Type <code>nasm -f</code> <em>output</em>
-<code>y</code> for a list.</p>
-<p><code>__?DEBUG_FORMAT?__</code> is not defined if debugging is not
-enabled, or if the debug format specified is <code>null</code>.</p>
-<h3 id="section-5.6">5.6 Assembly Date and Time Macros</h3>
-<p>NASM provides a variety of macros that represent the timestamp of the
-assembly session.</p>
-<ul>
-<li>
-<p>The <code>__?DATE?__</code> and <code>__?TIME?__</code> macros give the
-assembly date and time as strings, in ISO 8601 format
-(<code>"YYYY-MM-DD"</code> and <code>"HH:MM:SS"</code>, respectively.)</p>
-</li>
-<li>
-<p>The <code>__?DATE_NUM?__</code> and <code>__?TIME_NUM?__</code> macros
-give the assembly date and time in numeric form; in the format
-<code>YYYYMMDD</code> and <code>HHMMSS</code> respectively.</p>
-</li>
-<li>
-<p>The <code>__?UTC_DATE?__</code> and <code>__?UTC_TIME?__</code> macros
-give the assembly date and time in universal time (UTC) as strings, in ISO
-8601 format (<code>"YYYY-MM-DD"</code> and <code>"HH:MM:SS"</code>,
-respectively.) If the host platform doesn't provide UTC time, these macros
-are undefined.</p>
-</li>
-<li>
-<p>The <code>__?UTC_DATE_NUM?__</code> and <code>__?UTC_TIME_NUM?__</code>
-macros give the assembly date and time universal time (UTC) in numeric
-form; in the format <code>YYYYMMDD</code> and <code>HHMMSS</code>
-respectively. If the host platform doesn't provide UTC time, these macros
-are undefined.</p>
-</li>
-<li>
-<p>The <code>__?POSIX_TIME?__</code> macro is defined as a number
-containing the number of seconds since the POSIX epoch, 1 January 1970
-00:00:00 UTC; excluding any leap seconds. This is computed using UTC time
-if available on the host platform, otherwise it is computed using the local
-time as if it was UTC.</p>
-</li>
-</ul>
-<p>All instances of time and date macros in the same assembly session
-produce consistent output. For example, in an assembly session started at
-42 seconds after midnight on January 1, 2010 in Moscow (timezone UTC+3)
-these macros would have the following values, assuming, of course, a
-properly configured environment with a correct clock:</p>
-<pre>
-      __?DATE?__             "2010-01-01" 
-      __?TIME?__             "00:00:42" 
-      __?DATE_NUM?__         20100101 
-      __?TIME_NUM?__         000042 
-      __?UTC_DATE?__         "2009-12-31" 
-      __?UTC_TIME?__         "21:00:42" 
-      __?UTC_DATE_NUM?__     20091231 
-      __?UTC_TIME_NUM?__     210042 
-      __?POSIX_TIME?__       1262293242
-</pre>
-<h3 id="section-5.7">5.7 <code>__?USE_</code><em>package</em><code>?__</code>: Package Include Test</h3>
-<p>When a standard macro package (see <a href="nasmdoc6.html">chapter
-6</a>) is included with the <code>%use</code> directive (see
-<a href="nasmdoc4.html#section-4.8.4">section 4.8.4</a>), a single-line
-macro of the form <code>__USE_</code><em>package</em><code>__</code> is
-automatically defined. This allows testing if a particular package is
-invoked or not.</p>
-<p>For example, if the <code>altreg</code> package is included (see
-<a href="nasmdoc6.html#section-6.1">section 6.1</a>), then the macro
-<code>__?USE_ALTREG?__</code> is defined.</p>
-<h3 id="section-5.8">5.8 <code>__?PASS?__</code>: Assembly Pass</h3>
-<p>The macro <code>__?PASS?__</code> is defined to be <code>1</code> on
-preparatory passes, and <code>2</code> on the final pass. In
-preprocess-only mode, it is set to <code>3</code>, and when running only to
-generate dependencies (due to the <code>-M</code> or <code>-MG</code>
-option, see <a href="nasmdoc2.html#section-2.1.5">section 2.1.5</a>) it is
-set to <code>0</code>.</p>
-<p><em>Avoid using this macro if at all possible. It is tremendously easy
-to generate very strange errors by misusing it, and the semantics may
-change in future versions of NASM.</em></p>
-<h3 id="section-5.9">5.9 Structure Data Types</h3>
-<h4 id="section-5.9.1">5.9.1 <code>STRUC</code> and <code>ENDSTRUC</code>: Declaring Structure Data Types</h4>
-<p>The core of NASM contains no intrinsic means of defining data
-structures; instead, the preprocessor is sufficiently powerful that data
-structures can be implemented as a set of macros. The macros
-<code>STRUC</code> and <code>ENDSTRUC</code> are used to define a structure
-data type.</p>
-<p><code>STRUC</code> takes one or two parameters. The first parameter is
-the name of the data type. The second, optional parameter is the base
-offset of the structure. The name of the data type is defined as a symbol
-with the value of the base offset, and the name of the data type with the
-suffix <code>_size</code> appended to it is defined as an <code>EQU</code>
-giving the size of the structure. Once <code>STRUC</code> has been issued,
-you are defining the structure, and should define fields using the
-<code>RESB</code> family of pseudo-instructions, and then invoke
-<code>ENDSTRUC</code> to finish the definition.</p>
-<p>For example, to define a structure called <code>mytype</code> containing
-a longword, a word, a byte and a string of bytes, you might code</p>
-<pre>
-struc   mytype 
-
-  mt_long:      resd    1 
-  mt_word:      resw    1 
-  mt_byte:      resb    1 
-  mt_str:       resb    32 
-
-endstruc
-</pre>
-<p>The above code defines six symbols: <code>mt_long</code> as 0 (the
-offset from the beginning of a <code>mytype</code> structure to the
-longword field), <code>mt_word</code> as 4, <code>mt_byte</code> as 6,
-<code>mt_str</code> as 7, <code>mytype_size</code> as 39, and
-<code>mytype</code> itself as zero.</p>
-<p>The reason why the structure type name is defined at zero by default is
-a side effect of allowing structures to work with the local label
-mechanism: if your structure members tend to have the same names in more
-than one structure, you can define the above structure like this:</p>
-<pre>
-struc mytype 
-
-  .long:        resd    1 
-  .word:        resw    1 
-  .byte:        resb    1 
-  .str:         resb    32 
-
-endstruc
-</pre>
-<p>This defines the offsets to the structure fields as
-<code>mytype.long</code>, <code>mytype.word</code>,
-<code>mytype.byte</code> and <code>mytype.str</code>.</p>
-<p>NASM, since it has no <em>intrinsic</em> structure support, does not
-support any form of period notation to refer to the elements of a structure
-once you have one (except the above local-label notation), so code such as
-<code>mov ax,mystruc.mt_word</code> is not valid. <code>mt_word</code> is
-a constant just like any other constant, so the correct syntax is
-<code>mov ax,mystruc+mt_word</code> or
-<code>mov ax,mystruc+mytype.word</code>.</p>
-<p>Sometimes you only have the address of the structure displaced by an
-offset. For example, consider this standard stack frame setup:</p>
-<pre>
-push ebp 
-mov ebp, esp 
-sub esp, 40
-</pre>
-<p>In this case, you could access an element by subtracting the offset:</p>
-<pre>
-mov ebp - 40 + mytype.word, ax
-</pre>
-<p>However, if you do not want to repeat this offset, you can use &ndash;40
-as a base offset:</p>
-<pre>
-struc mytype, -40
-</pre>
-<p>And access an element this way:</p>
-<pre>
-mov ebp + mytype.word, ax
-</pre>
-<h4 id="section-5.9.2">5.9.2 <code>ISTRUC</code>, <code>AT</code> and <code>IEND</code>: Declaring Instances of Structures</h4>
-<p>Having defined a structure type, the next thing you typically want to do
-is to declare instances of that structure in your data segment. NASM
-provides an easy way to do this in the <code>ISTRUC</code> mechanism. To
-declare a structure of type <code>mytype</code> in a program, you code
-something like this:</p>
-<pre>
-mystruc: 
-    istruc mytype 
-
-        at mt_long, dd      123456 
-        at mt_word, dw      1024 
-        at mt_byte, db      'x' 
-        at mt_str,  db      'hello, world', 13, 10, 0 
-
-    iend
-</pre>
-<p>The function of the <code>AT</code> macro is to make use of the
-<code>TIMES</code> prefix to advance the assembly position to the correct
-point for the specified structure field, and then to declare the specified
-data. Therefore the structure fields must be declared in the same order as
-they were specified in the structure definition.</p>
-<p>If the data to go in a structure field requires more than one source
-line to specify, the remaining source lines can easily come after the
-<code>AT</code> line. For example:</p>
-<pre>
-        at mt_str,  db      123,134,145,156,167,178,189 
-                    db      190,100,0
-</pre>
-<p>Depending on personal taste, you can also omit the code part of the
-<code>AT</code> line completely, and start the structure field on the next
-line:</p>
-<pre>
-        at mt_str 
-                db      'hello, world' 
-                db      13,10,0
-</pre>
-<h3 id="section-5.10">5.10 Alignment Control</h3>
-<h4 id="section-5.10.1">5.10.1 <code>ALIGN</code> and <code>ALIGNB</code>: Code and Data Alignment</h4>
-<p>The <code>ALIGN</code> and <code>ALIGNB</code> macros provides a
-convenient way to align code or data on a word, longword, paragraph or
-other boundary. (Some assemblers call this directive <code>EVEN</code>.)
-The syntax of the <code>ALIGN</code> and <code>ALIGNB</code> macros is</p>
-<pre>
-        align   4               ; align on 4-byte boundary 
-        align   16              ; align on 16-byte boundary 
-        align   8,db 0          ; pad with 0s rather than NOPs 
-        align   4,resb 1        ; align to 4 in the BSS 
-        alignb  4               ; equivalent to previous line
-</pre>
-<p>Both macros require their first argument to be a power of two; they both
-compute the number of additional bytes required to bring the length of the
-current section up to a multiple of that power of two, and then apply the
-<code>TIMES</code> prefix to their second argument to perform the
-alignment.</p>
-<p>If the second argument is not specified, the default for
-<code>ALIGN</code> is <code>NOP</code>, and the default for
-<code>ALIGNB</code> is <code>RESB 1</code>. So if the second argument is
-specified, the two macros are equivalent. Normally, you can just use
-<code>ALIGN</code> in code and data sections and <code>ALIGNB</code> in BSS
-sections, and never need the second argument except for special purposes.</p>
-<p><code>ALIGN</code> and <code>ALIGNB</code>, being simple macros, perform
-no error checking: they cannot warn you if their first argument fails to be
-a power of two, or if their second argument generates more than one byte of
-code. In each of these cases they will silently do the wrong thing.</p>
-<p><code>ALIGNB</code> (or <code>ALIGN</code> with a second argument of
-<code>RESB 1</code>) can be used within structure definitions:</p>
-<pre>
-struc mytype2 
-
-  mt_byte: 
-        resb 1 
-        alignb 2 
-  mt_word: 
-        resw 1 
-        alignb 4 
-  mt_long: 
-        resd 1 
-  mt_str: 
-        resb 32 
-
-endstruc
-</pre>
-<p>This will ensure that the structure members are sensibly aligned
-relative to the base of the structure.</p>
-<p>A final caveat: <code>ALIGN</code> and <code>ALIGNB</code> work relative
-to the beginning of the <em>section</em>, not the beginning of the address
-space in the final executable. Aligning to a 16-byte boundary when the
-section you're in is only guaranteed to be aligned to a 4-byte boundary,
-for example, is a waste of effort. Again, NASM does not check that the
-section's alignment characteristics are sensible for the use of
-<code>ALIGN</code> or <code>ALIGNB</code>.</p>
-<p>Both <code>ALIGN</code> and <code>ALIGNB</code> do call
-<code>SECTALIGN</code> macro implicitly. See
-<a href="#section-5.10.2">section 5.10.2</a> for details.</p>
-<p>See also the <code>smartalign</code> standard macro package,
-<a href="nasmdoc6.html#section-6.2">section 6.2</a>.</p>
-<h4 id="section-5.10.2">5.10.2 <code>SECTALIGN</code>: Section Alignment</h4>
-<p>The <code>SECTALIGN</code> macros provides a way to modify alignment
-attribute of output file section. Unlike the <code>align=</code> attribute
-(which is allowed at section definition only) the <code>SECTALIGN</code>
-macro may be used at any time.</p>
-<p>For example the directive</p>
-<pre>
-SECTALIGN 16
-</pre>
-<p>sets the section alignment requirements to 16 bytes. Once increased it
-can not be decreased, the magnitude may grow only.</p>
-<p>Note that <code>ALIGN</code> (see <a href="#section-5.10.1">section
-5.10.1</a>) calls the <code>SECTALIGN</code> macro implicitly so the active
-section alignment requirements may be updated. This is by default
-behaviour, if for some reason you want the <code>ALIGN</code> do not call
-<code>SECTALIGN</code> at all use the directive</p>
-<pre>
-SECTALIGN OFF
-</pre>
-<p>It is still possible to turn in on again by</p>
-<pre>
-SECTALIGN ON
-</pre>
-<p>Note that <code>SECTALIGN &lt;ON|OFF&gt;</code> affects only the
-<code>ALIGN</code>/<code>ALIGNB</code> directives, not an explicit
-<code>SECTALIGN</code> directive.</p>
-</div>
-</body>
-</html>

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@@ -1,227 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.1//EN" "http://www.w3.org/TR/xhtml11/DTD/xhtml11.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<meta charset="UTF-8" />
-<title>NASM - The Netwide Assembler</title>
-<link href="nasmdoc.css" rel="stylesheet" type="text/css" />
-<link href="local.css" rel="stylesheet" type="text/css" />
-</head>
-<body>
-<ul class="navbar">
-<li class="first"><a class="prev" href="nasmdoc5.html">Chapter 5</a></li>
-<li><a class="next" href="nasmdoc7.html">Chapter 7</a></li>
-<li><a class="toc" href="nasmdoc0.html">Contents</a></li>
-<li class="last"><a class="index" href="nasmdoci.html">Index</a></li>
-</ul>
-<div class="title">
-<h1>NASM - The Netwide Assembler</h1>
-<span class="subtitle">version 2.16.01</span>
-</div>
-<div class="contents"
->
-<h2 id="chapter-6">Chapter 6: Standard Macro Packages</h2>
-<p>The <code>%use</code> directive (see
-<a href="nasmdoc4.html#section-4.8.4">section 4.8.4</a>) includes one of
-the standard macro packages included with the NASM distribution and
-compiled into the NASM binary. It operates like the <code>%include</code>
-directive (see <a href="nasmdoc4.html#section-4.8.1">section 4.8.1</a>),
-but the included contents is provided by NASM itself.</p>
-<p>The names of standard macro packages are case insensitive and can be
-quoted or not.</p>
-<p>As of version 2.15, NASM has <code>%ifusable</code> and
-<code>%ifusing</code> directives to help the user understand whether an
-individual package available in this version of NASM
-(<code>%ifusable</code>) or a particular package already loaded
-(<code>%ifusing</code>).</p>
-<h3 id="section-6.1">6.1 <code>altreg</code>: Alternate Register Names</h3>
-<p>The <code>altreg</code> standard macro package provides alternate
-register names. It provides numeric register names for all registers (not
-just <code>R8</code>&ndash;<code>R15</code>), the Intel-defined aliases
-<code>R8L</code>&ndash;<code>R15L</code> for the low bytes of register (as
-opposed to the NASM/AMD standard names
-<code>R8B</code>&ndash;<code>R15B</code>), and the names
-<code>R0H</code>&ndash;<code>R3H</code> (by analogy with
-<code>R0L</code>&ndash;<code>R3L</code>) for <code>AH</code>,
-<code>CH</code>, <code>DH</code>, and <code>BH</code>.</p>
-<p>Example use:</p>
-<pre>
-%use altreg 
-
-proc: 
-      mov r0l,r3h                    ; mov al,bh 
-      ret
-</pre>
-<p>See also <a href="nasmdo12.html#section-12.1">section 12.1</a>.</p>
-<h3 id="section-6.2">6.2 <code>smartalign</code>: Smart <code>ALIGN</code> Macro</h3>
-<p>The <code>smartalign</code> standard macro package provides for an
-<code>ALIGN</code> macro which is more powerful than the default (and
-backwards-compatible) one (see
-<a href="nasmdoc5.html#section-5.10.1">section 5.10.1</a>). When the
-<code>smartalign</code> package is enabled, when <code>ALIGN</code> is used
-without a second argument, NASM will generate a sequence of instructions
-more efficient than a series of <code>NOP</code>. Furthermore, if the
-padding exceeds a specific threshold, then NASM will generate a jump over
-the entire padding sequence.</p>
-<p>The specific instructions generated can be controlled with the new
-<code>ALIGNMODE</code> macro. This macro takes two parameters: one mode,
-and an optional jump threshold override. If (for any reason) you need to
-turn off the jump completely just set jump threshold value to &ndash;1 (or
-set it to <code>nojmp</code>). The following modes are possible:</p>
-<ul>
-<li>
-<p><code>generic</code>: Works on all x86 CPUs and should have reasonable
-performance. The default jump threshold is 8. This is the default.</p>
-</li>
-<li>
-<p><code>nop</code>: Pad out with <code>NOP</code> instructions. The only
-difference compared to the standard <code>ALIGN</code> macro is that NASM
-can still jump over a large padding area. The default jump threshold is 16.</p>
-</li>
-<li>
-<p><code>k7</code>: Optimize for the AMD K7 (Athlon/Althon XP). These
-instructions should still work on all x86 CPUs. The default jump threshold
-is 16.</p>
-</li>
-<li>
-<p><code>k8</code>: Optimize for the AMD K8 (Opteron/Althon 64). These
-instructions should still work on all x86 CPUs. The default jump threshold
-is 16.</p>
-</li>
-<li>
-<p><code>p6</code>: Optimize for Intel CPUs. This uses the long
-<code>NOP</code> instructions first introduced in Pentium Pro. This is
-incompatible with all CPUs of family 5 or lower, as well as some VIA CPUs
-and several virtualization solutions. The default jump threshold is 16.</p>
-</li>
-</ul>
-<p>The macro <code>__?ALIGNMODE?__</code> is defined to contain the current
-alignment mode. A number of other macros beginning with
-<code>__?ALIGN_</code> are used internally by this macro package.</p>
-<h3 id="section-6.3">6.3 <code>fp</code>: Floating-point macros</h3>
-<p>This packages contains the following floating-point convenience macros:</p>
-<pre>
-%define Inf             __?Infinity?__ 
-%define NaN             __?QNaN?__ 
-%define QNaN            __?QNaN?__ 
-%define SNaN            __?SNaN?__ 
-
-%define float8(x)       __?float8?__(x) 
-%define float16(x)      __?float16?__(x) 
-%define bfloat16(x)     __?bfloat16?__(x) 
-%define float32(x)      __?float32?__(x) 
-%define float64(x)      __?float64?__(x) 
-%define float80m(x)     __?float80m?__(x) 
-%define float80e(x)     __?float80e?__(x) 
-%define float128l(x)    __?float128l?__(x) 
-%define float128h(x)    __?float128h?__(x)
-</pre>
-<p>It also defines the a multi-line macro <code>bf16</code> that can be
-used in a similar way to the <code>D</code><em>x</em> directives for the
-other floating-point numbers:</p>
-<pre>
-     bf16 -3.1415, NaN, 2000.0, +Inf
-</pre>
-<h3 id="section-6.4">6.4 <code>ifunc</code>: Integer functions</h3>
-<p>This package contains a set of macros which implement integer functions.
-These are actually implemented as special operators, but are most
-conveniently accessed via this macro package.</p>
-<p>The macros provided are:</p>
-<h4 id="section-6.4.1">6.4.1 Integer logarithms</h4>
-<p>These functions calculate the integer logarithm base 2 of their
-argument, considered as an unsigned integer. The only differences between
-the functions is their respective behavior if the argument provided is not
-a power of two.</p>
-<p>The function <code>ilog2e()</code> (alias <code>ilog2()</code>)
-generates an error if the argument is not a power of two.</p>
-<p>The function <code>ilog2f()</code> rounds the argument down to the
-nearest power of two; if the argument is zero it returns zero.</p>
-<p>The function <code>ilog2c()</code> rounds the argument up to the nearest
-power of two.</p>
-<p>The functions <code>ilog2fw()</code> (alias <code>ilog2w()</code>) and
-<code>ilog2cw()</code> generate a warning if the argument is not a power of
-two, but otherwise behaves like <code>ilog2f()</code> and
-<code>ilog2c()</code>, respectively.</p>
-<h3 id="section-6.5">6.5 <code>masm</code>: MASM compatibility</h3>
-<p>Since version 2.15, NASM has a MASM compatibility package with minimal
-functionality, as intended to be used primarily with machine-generated
-code. It does not include any "programmer-friendly" shortcuts, nor does it
-in any way support ASSUME, symbol typing, or MASM-style structures.</p>
-<p>To enable the package, use the directive:</p>
-<p><code>%use masm</code></p>
-<p>Currently, the MASM compatibility package emulates:</p>
-<ul>
-<li>
-<p>The <code>FLAT</code> and <code>OFFSET</code> keywords are recognized
-and ignored.</p>
-</li>
-<li>
-<p>The <code>PTR</code> keyword signifies a memory reference, as if the
-argument had been put in square brackets:</p>
-<pre>
-     mov eax,foo               ; memory reference 
-     mov eax,dword ptr foo       ; memory reference 
-     mov eax,dowrd ptr flat:foo  ; memory reference 
-     mov eax,offset foo          ; address 
-     mov eax,foo                 ; address (ambiguous syntax in MASM)
-</pre>
-</li>
-<li>
-<p>The <code>SEGMENT</code> ... <code>ENDS</code> syntax:</p>
-<pre>
-   segname SEGMENT 
-       ... 
-   segname ENDS
-</pre>
-</li>
-<li>
-<p>The <code>PROC</code> ... <code>ENDP</code> syntax:</p>
-<pre>
-   procname PROC FAR 
-        ... 
-   procname ENDP
-</pre>
-<p><code>PROC</code> will also define <code>RET</code> as a macro expanding
-to either <code>RETF</code> if <code>FAR</code> is specified and
-<code>RETN</code> otherwise. Any keyword after <code>PROC</code> other than
-<code>FAR</code> is ignored.</p>
-</li>
-<li>
-<p>The <code>TBYTE</code> keyword as an alias for <code>TWORD</code> (see
-<a href="nasmdoc2.html#section-2.2.7">section 2.2.7</a>).</p>
-</li>
-<li>
-<p>The <code>END</code> directive is ignored.</p>
-</li>
-<li>
-<p>In 64-bit mode relative addressing is the default
-(<code>DEFAULT REL</code>, see
-<a href="nasmdoc7.html#section-7.2.1">section 7.2.1</a>).</p>
-</li>
-</ul>
-<p>In addition, NASM now natively supports, regardless of whether this
-package is used or not:</p>
-<ul>
-<li>
-<p><code>?</code> and <code>DUP</code> syntax for the <code>DB</code> etc
-data declaration directives (see
-<a href="nasmdoc3.html#section-3.2.1">section 3.2.1</a>).</p>
-</li>
-<li>
-<p><code>displacementbase+index</code> syntax for memory operations,
-instead of <code>base+index+displacement</code>.</p>
-</li>
-<li>
-<p><code>seg:addr</code> instead of <code>seg:addr</code> syntax.</p>
-</li>
-<li>
-<p>A pure offset can be given to <code>LEA</code> without square brackets:</p>
-<pre>
-     lea rax,foo               ; standard syntax 
-     lea rax,foo                 ; also accepted
-</pre>
-</li>
-</ul>
-</div>
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-<title>NASM - The Netwide Assembler</title>
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-<h1>NASM - The Netwide Assembler</h1>
-<span class="subtitle">version 2.16.01</span>
-</div>
-<div class="contents"
->
-<h2 id="chapter-7">Chapter 7: Assembler Directives</h2>
-<p>NASM, though it attempts to avoid the bureaucracy of assemblers like
-MASM and TASM, is nevertheless forced to support a <em>few</em> directives.
-These are described in this chapter.</p>
-<p>NASM's directives come in two types: <em>user-level</em> directives and
-<em>primitive</em> directives. Typically, each directive has a user-level
-form and a primitive form. In almost all cases, we recommend that users use
-the user-level forms of the directives, which are implemented as macros
-which call the primitive forms.</p>
-<p>Primitive directives are enclosed in square brackets; user-level
-directives are not.</p>
-<p>In addition to the universal directives described in this chapter, each
-object file format can optionally supply extra directives in order to
-control particular features of that file format. These
-<em>format-specific</em> directives are documented along with the formats
-that implement them, in <a href="nasmdoc8.html">chapter 8</a>.</p>
-<h3 id="section-7.1">7.1 <code>BITS</code>: Specifying Target Processor Mode</h3>
-<p>The <code>BITS</code> directive specifies whether NASM should generate
-code designed to run on a processor operating in 16-bit mode, 32-bit mode
-or 64-bit mode. The syntax is <code>BITS XX</code>, where XX is 16, 32 or
-64.</p>
-<p>In most cases, you should not need to use <code>BITS</code> explicitly.
-The <code>aout</code>, <code>coff</code>, <code>elf*</code>,
-<code>macho</code>, <code>win32</code> and <code>win64</code> object
-formats, which are designed for use in 32-bit or 64-bit operating systems,
-all cause NASM to select 32-bit or 64-bit mode, respectively, by default.
-The <code>obj</code> object format allows you to specify each segment you
-define as either <code>USE16</code> or <code>USE32</code>, and NASM will
-set its operating mode accordingly, so the use of the <code>BITS</code>
-directive is once again unnecessary.</p>
-<p>The most likely reason for using the <code>BITS</code> directive is to
-write 32-bit or 64-bit code in a flat binary file; this is because the
-<code>bin</code> output format defaults to 16-bit mode in anticipation of
-it being used most frequently to write DOS <code>.COM</code> programs, DOS
-<code>.SYS</code> device drivers and boot loader software.</p>
-<p>The <code>BITS</code> directive can also be used to generate code for a
-different mode than the standard one for the output format.</p>
-<p>You do <em>not</em> need to specify <code>BITS 32</code> merely in order
-to use 32-bit instructions in a 16-bit DOS program; if you do, the
-assembler will generate incorrect code because it will be writing code
-targeted at a 32-bit platform, to be run on a 16-bit one.</p>
-<p>When NASM is in <code>BITS 16</code> mode, instructions which use 32-bit
-data are prefixed with an 0x66 byte, and those referring to 32-bit
-addresses have an 0x67 prefix. In <code>BITS 32</code> mode, the reverse is
-true: 32-bit instructions require no prefixes, whereas instructions using
-16-bit data need an 0x66 and those working on 16-bit addresses need an
-0x67.</p>
-<p>When NASM is in <code>BITS 64</code> mode, most instructions operate the
-same as they do for <code>BITS 32</code> mode. However, there are 8 more
-general and SSE registers, and 16-bit addressing is no longer supported.</p>
-<p>The default address size is 64 bits; 32-bit addressing can be selected
-with the 0x67 prefix. The default operand size is still 32 bits, however,
-and the 0x66 prefix selects 16-bit operand size. The <code>REX</code>
-prefix is used both to select 64-bit operand size, and to access the new
-registers. NASM automatically inserts REX prefixes when necessary.</p>
-<p>When the <code>REX</code> prefix is used, the processor does not know
-how to address the AH, BH, CH or DH (high 8-bit legacy) registers. Instead,
-it is possible to access the the low 8-bits of the SP, BP SI and DI
-registers as SPL, BPL, SIL and DIL, respectively; but only when the REX
-prefix is used.</p>
-<p>The <code>BITS</code> directive has an exactly equivalent primitive
-form, <code>BITS 16</code>, <code>BITS 32</code> and
-<code>BITS 64</code>. The user-level form is a macro which has no
-function other than to call the primitive form.</p>
-<p>Note that the space is necessary, e.g. <code>BITS32</code> will
-<em>not</em> work!</p>
-<h4 id="section-7.1.1">7.1.1 <code>USE16</code> &amp; <code>USE32</code>: Aliases for BITS</h4>
-<p>The `<code>USE16</code>' and `<code>USE32</code>' directives can be used
-in place of `<code>BITS 16</code>' and `<code>BITS 32</code>', for
-compatibility with other assemblers.</p>
-<h3 id="section-7.2">7.2 <code>DEFAULT</code>: Change the assembler defaults</h3>
-<p>The <code>DEFAULT</code> directive changes the assembler defaults.
-Normally, NASM defaults to a mode where the programmer is expected to
-explicitly specify most features directly. However, this is occasionally
-obnoxious, as the explicit form is pretty much the only one one wishes to
-use.</p>
-<p>Currently, <code>DEFAULT</code> can set <code>REL</code> &amp;
-<code>ABS</code> and <code>BND</code> &amp; <code>NOBND</code>.</p>
-<h4 id="section-7.2.1">7.2.1 <code>REL</code> &amp; <code>ABS</code>: RIP-relative addressing</h4>
-<p>This sets whether registerless instructions in 64-bit mode are
-<code>RIP</code>&ndash;relative or not. By default, they are absolute
-unless overridden with the <code>REL</code> specifier (see
-<a href="nasmdoc3.html#section-3.3">section 3.3</a>). However, if
-<code>DEFAULT REL</code> is specified, <code>REL</code> is default, unless
-overridden with the <code>ABS</code> specifier, <em>except when used with
-an FS or GS segment override</em>.</p>
-<p>The special handling of <code>FS</code> and <code>GS</code> overrides
-are due to the fact that these registers are generally used as thread
-pointers or other special functions in 64-bit mode, and generating
-<code>RIP</code>&ndash;relative addresses would be extremely confusing.</p>
-<p><code>DEFAULT REL</code> is disabled with <code>DEFAULT ABS</code>.</p>
-<h4 id="section-7.2.2">7.2.2 <code>BND</code> &amp; <code>NOBND</code>: <code>BND</code> prefix</h4>
-<p>If <code>DEFAULT BND</code> is set, all bnd-prefix available
-instructions following this directive are prefixed with bnd. To override
-it, <code>NOBND</code> prefix can be used.</p>
-<pre>
- DEFAULT BND 
-     call foo            ; BND will be prefixed 
-     nobnd call foo      ; BND will NOT be prefixed
-</pre>
-<p><code>DEFAULT NOBND</code> can disable <code>DEFAULT BND</code> and then
-<code>BND</code> prefix will be added only when explicitly specified in
-code.</p>
-<p><code>DEFAULT BND</code> is expected to be the normal configuration for
-writing MPX-enabled code.</p>
-<h3 id="section-7.3">7.3 <code>SECTION</code> or <code>SEGMENT</code>: Changing and Defining Sections</h3>
-<p>The <code>SECTION</code> directive (<code>SEGMENT</code> is an exactly
-equivalent synonym) changes which section of the output file the code you
-write will be assembled into. In some object file formats, the number and
-names of sections are fixed; in others, the user may make up as many as
-they wish. Hence <code>SECTION</code> may sometimes give an error message,
-or may define a new section, if you try to switch to a section that does
-not (yet) exist.</p>
-<p>The Unix object formats, and the <code>bin</code> object format (but see
-<a href="nasmdoc8.html#section-8.1.3">section 8.1.3</a>), all support the
-standardized section names <code>.text</code>, <code>.data</code> and
-<code>.bss</code> for the code, data and uninitialized-data sections. The
-<code>obj</code> format, by contrast, does not recognize these section
-names as being special, and indeed will strip off the leading period of any
-section name that has one.</p>
-<h4 id="section-7.3.1">7.3.1 The <code>__?SECT?__</code> Macro</h4>
-<p>The <code>SECTION</code> directive is unusual in that its user-level
-form functions differently from its primitive form. The primitive form,
-<code>SECTION xyz</code>, simply switches the current target section to
-the one given. The user-level form, <code>SECTION xyz</code>, however,
-first defines the single-line macro <code>__?SECT?__</code> to be the
-primitive <code>SECTION</code> directive which it is about to issue, and
-then issues it. So the user-level directive</p>
-<pre>
-        SECTION .text
-</pre>
-<p>expands to the two lines</p>
-<pre>
-%define __?SECT?__        SECTION .text 
-        SECTION .text
-</pre>
-<p>Users may find it useful to make use of this in their own macros. For
-example, the <code>writefile</code> macro defined in
-<a href="nasmdoc4.html#section-4.5.3">section 4.5.3</a> can be usefully
-rewritten in the following more sophisticated form:</p>
-<pre>
-%macro  writefile 2+ 
-
-        section .data 
-
-  %%str:        db      %2 
-  %%endstr: 
-
-        __?SECT?__ 
-
-        mov     dx,%%str 
-        mov     cx,%%endstr-%%str 
-        mov     bx,%1 
-        mov     ah,0x40 
-        int     0x21 
-
-%endmacro
-</pre>
-<p>This form of the macro, once passed a string to output, first switches
-temporarily to the data section of the file, using the primitive form of
-the <code>SECTION</code> directive so as not to modify
-<code>__?SECT?__</code>. It then declares its string in the data section,
-and then invokes <code>__?SECT?__</code> to switch back to
-<em>whichever</em> section the user was previously working in. It thus
-avoids the need, in the previous version of the macro, to include a
-<code>JMP</code> instruction to jump over the data, and also does not fail
-if, in a complicated <code>OBJ</code> format module, the user could
-potentially be assembling the code in any of several separate code
-sections.</p>
-<h3 id="section-7.4">7.4 <code>ABSOLUTE</code>: Defining Absolute Labels</h3>
-<p>The <code>ABSOLUTE</code> directive can be thought of as an alternative
-form of <code>SECTION</code>: it causes the subsequent code to be directed
-at no physical section, but at the hypothetical section starting at the
-given absolute address. The only instructions you can use in this mode are
-the <code>RESB</code> family.</p>
-<p><code>ABSOLUTE</code> is used as follows:</p>
-<pre>
-absolute 0x1A 
-
-    kbuf_chr    resw    1 
-    kbuf_free   resw    1 
-    kbuf        resw    16
-</pre>
-<p>This example describes a section of the PC BIOS data area, at segment
-address 0x40: the above code defines <code>kbuf_chr</code> to be 0x1A,
-<code>kbuf_free</code> to be 0x1C, and <code>kbuf</code> to be 0x1E.</p>
-<p>The user-level form of <code>ABSOLUTE</code>, like that of
-<code>SECTION</code>, redefines the <code>__?SECT?__</code> macro when it
-is invoked.</p>
-<p><code>STRUC</code> and <code>ENDSTRUC</code> are defined as macros which
-use <code>ABSOLUTE</code> (and also <code>__?SECT?__</code>).</p>
-<p><code>ABSOLUTE</code> doesn't have to take an absolute constant as an
-argument: it can take an expression (actually, a critical expression: see
-<a href="nasmdoc3.html#section-3.8">section 3.8</a>) and it can be a value
-in a segment. For example, a TSR can re-use its setup code as run-time BSS
-like this:</p>
-<pre>
-        org     100h               ; it's a .COM program 
-
-        jmp     setup              ; setup code comes last 
-
-        ; the resident part of the TSR goes here 
-setup: 
-        ; now write the code that installs the TSR here 
-
-absolute setup 
-
-runtimevar1     resw    1 
-runtimevar2     resd    20 
-
-tsr_end:
-</pre>
-<p>This defines some variables `on top of' the setup code, so that after
-the setup has finished running, the space it took up can be re-used as data
-storage for the running TSR. The symbol `tsr_end' can be used to calculate
-the total size of the part of the TSR that needs to be made resident.</p>
-<h3 id="section-7.5">7.5 <code>EXTERN</code>: Importing Symbols from Other Modules</h3>
-<p><code>EXTERN</code> is similar to the MASM directive <code>EXTRN</code>
-and the C keyword <code>extern</code>: it is used to declare a symbol which
-is not defined anywhere in the module being assembled, but is assumed to be
-defined in some other module and needs to be referred to by this one. Not
-every object-file format can support external variables: the
-<code>bin</code> format cannot.</p>
-<p>The <code>EXTERN</code> directive takes as many arguments as you like.
-Each argument is the name of a symbol:</p>
-<pre>
-extern  _printf 
-extern  _sscanf,_fscanf
-</pre>
-<p>Some object-file formats provide extra features to the
-<code>EXTERN</code> directive. In all cases, the extra features are used by
-suffixing a colon to the symbol name followed by object-format specific
-text. For example, the <code>obj</code> format allows you to declare that
-the default segment base of an external should be the group
-<code>dgroup</code> by means of the directive</p>
-<pre>
-extern  _variable:wrt dgroup
-</pre>
-<p>The primitive form of <code>EXTERN</code> differs from the user-level
-form only in that it can take only one argument at a time: the support for
-multiple arguments is implemented at the preprocessor level.</p>
-<p>You can declare the same variable as <code>EXTERN</code> more than once:
-NASM will quietly ignore the second and later redeclarations.</p>
-<p>If a variable is declared both <code>GLOBAL</code> and
-<code>EXTERN</code>, or if it is declared as <code>EXTERN</code> and then
-defined, it will be treated as <code>GLOBAL</code>. If a variable is
-declared both as <code>COMMON</code> and <code>EXTERN</code>, it will be
-treated as <code>COMMON</code>.</p>
-<h3 id="section-7.6">7.6 <code>REQUIRED</code>: Unconditionally Importing Symbols from Other Modules</h3>
-<p>The <code>REQUIRED</code> keyword is similar to <code>EXTERN</code> one.
-The difference is that the <code>EXTERN</code> keyword as of version 2.15
-does not generate unknown symbols as that prevents using common header
-files, as it might cause the linker to pull in a bunch of unnecessary
-modules.</p>
-<p>If the old behavior is required, use <code>REQUIRED</code> keyword
-instead.</p>
-<h3 id="section-7.7">7.7 <code>GLOBAL</code>: Exporting Symbols to Other Modules</h3>
-<p><code>GLOBAL</code> is the other end of <code>EXTERN</code>: if one
-module declares a symbol as <code>EXTERN</code> and refers to it, then in
-order to prevent linker errors, some other module must actually
-<em>define</em> the symbol and declare it as <code>GLOBAL</code>. Some
-assemblers use the name <code>PUBLIC</code> for this purpose.</p>
-<p><code>GLOBAL</code> uses the same syntax as <code>EXTERN</code>, except
-that it must refer to symbols which <em>are</em> defined in the same module
-as the <code>GLOBAL</code> directive. For example:</p>
-<pre>
-global _main 
-_main: 
-        ; some code
-</pre>
-<p><code>GLOBAL</code>, like <code>EXTERN</code>, allows object formats to
-define private extensions by means of a colon. The ELF object format, for
-example, lets you specify whether global data items are functions or data:</p>
-<pre>
-global  hashlookup:function, hashtable:data
-</pre>
-<p>Like <code>EXTERN</code>, the primitive form of <code>GLOBAL</code>
-differs from the user-level form only in that it can take only one argument
-at a time.</p>
-<h3 id="section-7.8">7.8 <code>COMMON</code>: Defining Common Data Areas</h3>
-<p>The <code>COMMON</code> directive is used to declare <em>common
-variables</em>. A common variable is much like a global variable declared
-in the uninitialized data section, so that</p>
-<pre>
-common  intvar  4
-</pre>
-<p>is similar in function to</p>
-<pre>
-global  intvar 
-section .bss 
-
-intvar  resd    1
-</pre>
-<p>The difference is that if more than one module defines the same common
-variable, then at link time those variables will be <em>merged</em>, and
-references to <code>intvar</code> in all modules will point at the same
-piece of memory.</p>
-<p>Like <code>GLOBAL</code> and <code>EXTERN</code>, <code>COMMON</code>
-supports object-format specific extensions. For example, the
-<code>obj</code> format allows common variables to be NEAR or FAR, and the
-ELF format allows you to specify the alignment requirements of a common
-variable:</p>
-<pre>
-common  commvar  4:near  ; works in OBJ 
-common  intarray 100:4   ; works in ELF: 4 byte aligned
-</pre>
-<p>Once again, like <code>EXTERN</code> and <code>GLOBAL</code>, the
-primitive form of <code>COMMON</code> differs from the user-level form only
-in that it can take only one argument at a time.</p>
-<h3 id="section-7.9">7.9 <code>STATIC</code>: Local Symbols within Modules</h3>
-<p>Opposite to <code>EXTERN</code> and <code>GLOBAL</code>,
-<code>STATIC</code> is local symbol, but should be named according to the
-global mangling rules (named by analogy with the C keyword
-<code>static</code> as applied to functions or global variables).</p>
-<pre>
-static foo 
-foo: 
-         ; codes
-</pre>
-<p>Unlike <code>GLOBAL</code>, <code>STATIC</code> does not allow object
-formats to accept private extensions mentioned in
-<a href="#section-7.7">section 7.7</a>.</p>
-<h3 id="section-7.10">7.10 <code>(G|L)PREFIX</code>, <code>(G|L)POSTFIX</code>: Mangling Symbols</h3>
-<p><code>PREFIX</code>, <code>GPREFIX</code>, <code>LPREFIX</code>,
-<code>POSTFIX</code>, <code>GPOSTFIX</code>, and <code>LPOSTFIX</code>
-directives can prepend or append a string to a certain type of symbols,
-normally to fit specific ABI conventions</p>
-<ul>
-<li>
-<p><code>PREFIX</code>|<code>GPREFIX</code>: Prepend the argument to all
-<code>EXTERN</code> <code>COMMON</code>, <code>STATIC</code>, and
-<code>GLOBAL</code> symbols.</p>
-</li>
-<li>
-<p><code>LPREFIX</code>: Prepend the argument to all other symbols such as
-local labels and backend defined symbols.</p>
-</li>
-<li>
-<p><code>POSTFIX</code>|<code>GPOSTFIX</code>: Append the argument to all
-<code>EXTERN</code> <code>COMMON</code>, <code>STATIC</code>, and
-<code>GLOBAL</code> symbols.</p>
-</li>
-<li>
-<p><code>LPOSTFIX</code>: Append the argument to all other symbols such as
-local labels and backend defined symbols.</p>
-</li>
-</ul>
-<p>These a macros implemented as pragmas, and using <code>%pragma</code>
-syntax can be restricted to specific backends (see
-<a href="nasmdoc4.html#section-4.12">section 4.12</a>):</p>
-<pre>
-%pragma macho lprefix L_
-</pre>
-<p>Command line options are also available. See also
-<a href="nasmdoc2.html#section-2.1.28">section 2.1.28</a>.</p>
-<p>One example which supports many ABIs:</p>
-<pre>
-; The most common conventions 
-%pragma output gprefix _ 
-%pragma output lprefix L_ 
-; ELF uses a different convention 
-%pragma elf    gprefix                       ; empty 
-%pragma elf    lprefix .L
-</pre>
-<p>Some toolchains is aware of a particular prefix for its own optimization
-options, such as code elimination. For instance, Mach-O backend has a
-linker that uses a simplistic naming scheme to chunk up sections into a
-meta section. When the <code>subsections_via_symbols</code> directive
-(<a href="nasmdoc8.html#section-8.8.4">section 8.8.4</a>) is declared, each
-symbol is the start of a separate block. The meta section is, then, defined
-to include sections before the one that starts with a 'L'.
-<code>LPREFIX</code> is useful here to mark all local symbols with the 'L'
-prefix to be excluded to the meta section. It converts local symbols
-compatible with the particular toolchain. Note that local symbols declared
-with <code>STATIC</code> (<a href="#section-7.9">section 7.9</a>) are
-excluded from the symbol mangling and also not marked as global.</p>
-<h3 id="section-7.11">7.11 <code>CPU</code>: Defining CPU Dependencies</h3>
-<p>The <code>CPU</code> directive restricts assembly to those instructions
-which are available on the specified CPU. At the moment, it is primarily
-used to enforce unavailable <em>encodings</em> of instructions, such as
-5-byte jumps on the 8080.</p>
-<p>(If someone would volunteer to work through the database and add proper
-annotations to each instruction, this could be greatly improved. Please
-contact the developers to volunteer, see {contact}.)</p>
-<p>Current CPU keywords are:</p>
-<ul>
-<li>
-<p><code>CPU 8086</code> &ndash; Assemble only 8086 instruction set</p>
-</li>
-<li>
-<p><code>CPU 186</code> &ndash; Assemble instructions up to the 80186
-instruction set</p>
-</li>
-<li>
-<p><code>CPU 286</code> &ndash; Assemble instructions up to the 286
-instruction set</p>
-</li>
-<li>
-<p><code>CPU 386</code> &ndash; Assemble instructions up to the 386
-instruction set</p>
-</li>
-<li>
-<p><code>CPU 486</code> &ndash; 486 instruction set</p>
-</li>
-<li>
-<p><code>CPU 586</code> &ndash; Pentium instruction set</p>
-</li>
-<li>
-<p><code>CPU PENTIUM</code> &ndash; Same as 586</p>
-</li>
-<li>
-<p><code>CPU 686</code> &ndash; P6 instruction set</p>
-</li>
-<li>
-<p><code>CPU PPRO</code> &ndash; Same as 686</p>
-</li>
-<li>
-<p><code>CPU P2</code> &ndash; Same as 686</p>
-</li>
-<li>
-<p><code>CPU P3</code> &ndash; Pentium III (Katmai) instruction sets</p>
-</li>
-<li>
-<p><code>CPU KATMAI</code> &ndash; Same as P3</p>
-</li>
-<li>
-<p><code>CPU P4</code> &ndash; Pentium 4 (Willamette) instruction set</p>
-</li>
-<li>
-<p><code>CPU WILLAMETTE</code> &ndash; Same as P4</p>
-</li>
-<li>
-<p><code>CPU PRESCOTT</code> &ndash; Prescott instruction set</p>
-</li>
-<li>
-<p><code>CPU X64</code> &ndash; x86-64 (x64/AMD64/Intel 64) instruction set</p>
-</li>
-<li>
-<p><code>CPU IA64</code> &ndash; IA64 CPU (in x86 mode) instruction set</p>
-</li>
-<li>
-<p><code>CPU DEFAULT</code> &ndash; All available instructions</p>
-</li>
-<li>
-<p><code>CPU ALL</code> &ndash; All available instructions <em>and
-flags</em></p>
-</li>
-</ul>
-<p>All options are case insensitive.</p>
-<p>In addition, optional flags can be specified to modify the instruction
-selections. These can be combined with a CPU declaration or specified
-alone. They can be prefixed by <code>+</code> (add flag, default),
-<code>-</code> (remove flag) or <code>*</code> (set flag to default); these
-prefixes are "sticky", so:</p>
-<pre>
-     cpu -foo,bar
-</pre>
-<p>means remove both the <code>foo</code> and <code>bar</code> options.</p>
-<p>If prefixed with <code>no</code>, it inverts the meaning of the flag,
-but this is not sticky, so:</p>
-<pre>
-     cpu nofoo,bar
-</pre>
-<p>means remove the <code>foo</code> flag but add the <code>bar</code>
-flag.</p>
-<p>Currently available flags are:</p>
-<ul>
-<li>
-<p><code>EVEX</code> &ndash; Enable generation of EVEX (AVX-512) encoded
-instructions without an explicit <code>{evex}</code> prefix. Default on.</p>
-</li>
-<li>
-<p><code>VEX</code> &ndash; Enable generation of VEX (AVX) or XOP encoded
-instructions without an explict <code>{vex}</code> prefix. Default on.</p>
-</li>
-<li>
-<p><code>LATEVEX</code> &ndash; Enable generation of VEX (AVX) encoding of
-instructions where the VEX instructions forms were introduced
-<em>after</em> the corresponding EVEX (AVX-512) instruction forms without
-requiring an explicit <code>{vex}</code> prefix. This is implicit if the
-<code>EVEX</code> flag is disabled and the <code>VEX</code> flag is
-enabled. Default off.</p>
-</li>
-</ul>
-<h3 id="section-7.12">7.12 <code>FLOAT</code>: Handling of floating-point constants</h3>
-<p>By default, floating-point constants are rounded to nearest, and IEEE
-denormals are supported. The following options can be set to alter this
-behaviour:</p>
-<ul>
-<li>
-<p><code>FLOAT DAZ</code> &ndash; Flush denormals to zero</p>
-</li>
-<li>
-<p><code>FLOAT NODAZ</code> &ndash; Do not flush denormals to zero
-(default)</p>
-</li>
-<li>
-<p><code>FLOAT NEAR</code> &ndash; Round to nearest (default)</p>
-</li>
-<li>
-<p><code>FLOAT UP</code> &ndash; Round up (toward +Infinity)</p>
-</li>
-<li>
-<p><code>FLOAT DOWN</code> &ndash; Round down (toward &ndash;Infinity)</p>
-</li>
-<li>
-<p><code>FLOAT ZERO</code> &ndash; Round toward zero</p>
-</li>
-<li>
-<p><code>FLOAT DEFAULT</code> &ndash; Restore default settings</p>
-</li>
-</ul>
-<p>The standard macros <code>__?FLOAT_DAZ?__</code>,
-<code>__?FLOAT_ROUND?__</code>, and <code>__?FLOAT?__</code> contain the
-current state, as long as the programmer has avoided the use of the
-brackeded primitive form, (<code>FLOAT</code>).</p>
-<p><code>__?FLOAT?__</code> contains the full set of floating-point
-settings; this value can be saved away and invoked later to restore the
-setting.</p>
-<h3 id="section-7.13">7.13 <code>WARNING</code>: Enable or disable warnings</h3>
-<p>The <code>WARNING</code> directive can be used to enable or disable
-classes of warnings in the same way as the <code>-w</code> option, see
-<a href="nasmdoca.html">appendix A</a> for more details about warning
-classes.</p>
-<ul>
-<li>
-<p><code>warning +</code><em>warning-class</em><code></code> enables
-warnings for <em>warning-class</em>.</p>
-</li>
-<li>
-<p><code>warning -</code><em>warning-class</em><code></code> disables
-warnings for <em>warning-class</em>.</p>
-</li>
-<li>
-<p><code>warning *</code><em>warning-class</em><code></code> restores
-<em>warning-class</em> to the original value, either the default value or
-as specified on the command line.</p>
-</li>
-<li>
-<p><code>warning push</code> saves the current warning state on a stack.</p>
-</li>
-<li>
-<p><code>warning pop</code> restores the current warning state from the
-stack.</p>
-</li>
-</ul>
-<p>The <code>WARNING</code> directive also accepts the <code>all</code>,
-<code>error</code> and <code>error=</code><em>warning-class</em>
-specifiers, see <a href="nasmdoc2.html#section-2.1.26">section 2.1.26</a>.</p>
-<p>No "user form" (without the brackets) currently exists.</p>
-</div>
-</body>
-</html>

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-<head>
-<meta charset="UTF-8" />
-<title>NASM - The Netwide Assembler</title>
-<link href="nasmdoc.css" rel="stylesheet" type="text/css" />
-<link href="local.css" rel="stylesheet" type="text/css" />
-</head>
-<body>
-<ul class="navbar">
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-<li><a class="next" href="nasmdoc9.html">Chapter 9</a></li>
-<li><a class="toc" href="nasmdoc0.html">Contents</a></li>
-<li class="last"><a class="index" href="nasmdoci.html">Index</a></li>
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-<div class="title">
-<h1>NASM - The Netwide Assembler</h1>
-<span class="subtitle">version 2.16.01</span>
-</div>
-<div class="contents"
->
-<h2 id="chapter-8">Chapter 8: Output Formats</h2>
-<p>NASM is a portable assembler, designed to be able to compile on any ANSI
-C-supporting platform and produce output to run on a variety of Intel x86
-operating systems. For this reason, it has a large number of available
-output formats, selected using the <code>-f</code> option on the NASM
-command line. Each of these formats, along with its extensions to the base
-NASM syntax, is detailed in this chapter.</p>
-<p>As stated in <a href="nasmdoc2.html#section-2.1.1">section 2.1.1</a>,
-NASM chooses a default name for your output file based on the input file
-name and the chosen output format. This will be generated by removing the
-extension (<code>.asm</code>, <code>.s</code>, or whatever you like to use)
-from the input file name, and substituting an extension defined by the
-output format. The extensions are given with each format below.</p>
-<h3 id="section-8.1">8.1 <code>bin</code>: Flat-Form Binary Output</h3>
-<p>The <code>bin</code> format does not produce object files: it generates
-nothing in the output file except the code you wrote. Such `pure binary'
-files are used by MS-DOS: <code>.COM</code> executables and
-<code>.SYS</code> device drivers are pure binary files. Pure binary output
-is also useful for operating system and boot loader development.</p>
-<p>The <code>bin</code> format supports multiple section names. For details
-of how NASM handles sections in the <code>bin</code> format, see
-<a href="#section-8.1.3">section 8.1.3</a>.</p>
-<p>Using the <code>bin</code> format puts NASM by default into 16-bit mode
-(see <a href="nasmdoc7.html#section-7.1">section 7.1</a>). In order to use
-<code>bin</code> to write 32-bit or 64-bit code, such as an OS kernel, you
-need to explicitly issue the <code>BITS 32</code> or <code>BITS 64</code>
-directive.</p>
-<p><code>bin</code> has no default output file name extension: instead, it
-leaves your file name as it is once the original extension has been
-removed. Thus, the default is for NASM to assemble <code>binprog.asm</code>
-into a binary file called <code>binprog</code>.</p>
-<h4 id="section-8.1.1">8.1.1 <code>ORG</code>: Binary File Program Origin</h4>
-<p>The <code>bin</code> format provides an additional directive to the list
-given in <a href="nasmdoc7.html">chapter 7</a>: <code>ORG</code>. The
-function of the <code>ORG</code> directive is to specify the origin address
-which NASM will assume the program begins at when it is loaded into memory.</p>
-<p>For example, the following code will generate the longword
-<code>0x00000104</code>:</p>
-<pre>
-        org     0x100 
-        dd      label 
-label:
-</pre>
-<p>Unlike the <code>ORG</code> directive provided by MASM-compatible
-assemblers, which allows you to jump around in the object file and
-overwrite code you have already generated, NASM's <code>ORG</code> does
-exactly what the directive says: <em>origin</em>. Its sole function is to
-specify one offset which is added to all internal address references within
-the section; it does not permit any of the trickery that MASM's version
-does. See <a href="nasmdo13.html#section-13.1.3">section 13.1.3</a> for
-further comments.</p>
-<h4 id="section-8.1.2">8.1.2 <code>bin</code> Extensions to the <code>SECTION</code> Directive, <code>bin</code> extensions to}</h4>
-<p>The <code>bin</code> output format extends the <code>SECTION</code> (or
-<code>SEGMENT</code>) directive to allow you to specify the alignment
-requirements of segments. This is done by appending the <code>ALIGN</code>
-qualifier to the end of the section-definition line. For example,</p>
-<pre>
-section .data   align=16
-</pre>
-<p>switches to the section <code>.data</code> and also specifies that it
-must be aligned on a 16-byte boundary.</p>
-<p>The parameter to <code>ALIGN</code> specifies how many low bits of the
-section start address must be forced to zero. The alignment value given may
-be any power of two.</p>
-<h4 id="section-8.1.3">8.1.3 Multisection Support for the <code>bin</code> Format</h4>
-<p>The <code>bin</code> format allows the use of multiple sections, of
-arbitrary names, besides the "known" <code>.text</code>,
-<code>.data</code>, and <code>.bss</code> names.</p>
-<ul>
-<li>
-<p>Sections may be designated <code>progbits</code> or <code>nobits</code>.
-Default is <code>progbits</code> (except <code>.bss</code>, which defaults
-to <code>nobits</code>, of course).</p>
-</li>
-<li>
-<p>Sections can be aligned at a specified boundary following the previous
-section with <code>align=</code>, or at an arbitrary byte-granular position
-with <code>start=</code>.</p>
-</li>
-<li>
-<p>Sections can be given a virtual start address, which will be used for
-the calculation of all memory references within that section with
-<code>vstart=</code>.</p>
-</li>
-<li>
-<p>Sections can be ordered using
-<code>follows=</code><code>&lt;section&gt;</code> or
-<code>vfollows=</code><code>&lt;section&gt;</code> as an alternative to
-specifying an explicit start address.</p>
-</li>
-<li>
-<p>Arguments to <code>org</code>, <code>start</code>, <code>vstart</code>,
-and <code>align=</code> are critical expressions. See
-<a href="nasmdoc3.html#section-3.8">section 3.8</a>. E.g.
-<code>align=(1 &lt;&lt; ALIGN_SHIFT)</code> &ndash;
-<code>ALIGN_SHIFT</code> must be defined before it is used here.</p>
-</li>
-<li>
-<p>Any code which comes before an explicit <code>SECTION</code> directive
-is directed by default into the <code>.text</code> section.</p>
-</li>
-<li>
-<p>If an <code>ORG</code> statement is not given, <code>ORG 0</code> is
-used by default.</p>
-</li>
-<li>
-<p>The <code>.bss</code> section will be placed after the last
-<code>progbits</code> section, unless <code>start=</code>,
-<code>vstart=</code>, <code>follows=</code>, or <code>vfollows=</code> has
-been specified.</p>
-</li>
-<li>
-<p>All sections are aligned on dword boundaries, unless a different
-alignment has been specified.</p>
-</li>
-<li>
-<p>Sections may not overlap.</p>
-</li>
-<li>
-<p>NASM creates the <code>section.&lt;secname&gt;.start</code> for each
-section, which may be used in your code.</p>
-</li>
-</ul>
-<h4 id="section-8.1.4">8.1.4 Map Files</h4>
-<p>Map files can be generated in <code>-f bin</code> format by means of the
-<code>map</code> option. Map types of <code>all</code> (default),
-<code>brief</code>, <code>sections</code>, <code>segments</code>, or
-<code>symbols</code> may be specified. Output may be directed to
-<code>stdout</code> (default), <code>stderr</code>, or a specified file.
-E.g. <code>map symbols myfile.map</code>. No "user form" exists, the
-square brackets must be used.</p>
-<h3 id="section-8.2">8.2 <code>ith</code>: Intel Hex Output</h3>
-<p>The <code>ith</code> file format produces Intel hex-format files. Just
-as the <code>bin</code> format, this is a flat memory image format with no
-support for relocation or linking. It is usually used with ROM programmers
-and similar utilities.</p>
-<p>All extensions supported by the <code>bin</code> file format is also
-supported by the <code>ith</code> file format.</p>
-<p><code>ith</code> provides a default output file-name extension of
-<code>.ith</code>.</p>
-<h3 id="section-8.3">8.3 <code>srec</code>: Motorola S-Records Output</h3>
-<p>The <code>srec</code> file format produces Motorola S-records files.
-Just as the <code>bin</code> format, this is a flat memory image format
-with no support for relocation or linking. It is usually used with ROM
-programmers and similar utilities.</p>
-<p>All extensions supported by the <code>bin</code> file format is also
-supported by the <code>srec</code> file format.</p>
-<p><code>srec</code> provides a default output file-name extension of
-<code>.srec</code>.</p>
-<h3 id="section-8.4">8.4 <code>obj</code>: Microsoft OMF Object Files</h3>
-<p>The <code>obj</code> file format (NASM calls it <code>obj</code> rather
-than <code>omf</code> for historical reasons) is the one produced by MASM
-and TASM, which is typically fed to 16-bit DOS linkers to produce
-<code>.EXE</code> files. It is also the format used by OS/2.</p>
-<p><code>obj</code> provides a default output file-name extension of
-<code>.obj</code>.</p>
-<p><code>obj</code> is not exclusively a 16-bit format, though: NASM has
-full support for the 32-bit extensions to the format. In particular, 32-bit
-<code>obj</code> format files are used by Borland's Win32 compilers,
-instead of using Microsoft's newer <code>win32</code> object file format.</p>
-<p>The <code>obj</code> format does not define any special segment names:
-you can call your segments anything you like. Typical names for segments in
-<code>obj</code> format files are <code>CODE</code>, <code>DATA</code> and
-<code>BSS</code>.</p>
-<p>If your source file contains code before specifying an explicit
-<code>SEGMENT</code> directive, then NASM will invent its own segment
-called <code>__NASMDEFSEG</code> for you.</p>
-<p>When you define a segment in an <code>obj</code> file, NASM defines the
-segment name as a symbol as well, so that you can access the segment
-address of the segment. So, for example:</p>
-<pre>
-segment data 
-
-dvar:   dw      1234 
-
-segment code 
-
-function: 
-        mov     ax,data         ; get segment address of data 
-        mov     ds,ax           ; and move it into DS 
-        inc     word dvar     ; now this reference will work 
-        ret
-</pre>
-<p>The <code>obj</code> format also enables the use of the <code>SEG</code>
-and <code>WRT</code> operators, so that you can write code which does
-things like</p>
-<pre>
-extern  foo 
-
-      mov   ax,seg foo            ; get preferred segment of foo 
-      mov   ds,ax 
-      mov   ax,data               ; a different segment 
-      mov   es,ax 
-      mov   ax,ds:foo           ; this accesses `foo' 
-      mov   es:foo wrt data,bx  ; so does this
-</pre>
-<h4 id="section-8.4.1">8.4.1 <code>obj</code> Extensions to the <code>SEGMENT</code> Directive</h4>
-<p>The <code>obj</code> output format extends the <code>SEGMENT</code> (or
-<code>SECTION</code>) directive to allow you to specify various properties
-of the segment you are defining. This is done by appending extra qualifiers
-to the end of the segment-definition line. For example,</p>
-<pre>
-segment code private align=16
-</pre>
-<p>defines the segment <code>code</code>, but also declares it to be a
-private segment, and requires that the portion of it described in this code
-module must be aligned on a 16-byte boundary.</p>
-<p>The available qualifiers are:</p>
-<ul>
-<li>
-<p><code>PRIVATE</code>, <code>PUBLIC</code>, <code>COMMON</code> and
-<code>STACK</code> specify the combination characteristics of the segment.
-<code>PRIVATE</code> segments do not get combined with any others by the
-linker; <code>PUBLIC</code> and <code>STACK</code> segments get
-concatenated together at link time; and <code>COMMON</code> segments all
-get overlaid on top of each other rather than stuck end-to-end.</p>
-</li>
-<li>
-<p><code>ALIGN</code> is used, as shown above, to specify how many low bits
-of the segment start address must be forced to zero. The alignment value
-given may be any power of two from 1 to 4096; in reality, the only values
-supported are 1, 2, 4, 16, 256 and 4096, so if 8 is specified it will be
-rounded up to 16, and 32, 64 and 128 will all be rounded up to 256, and so
-on. Note that alignment to 4096-byte boundaries is a PharLap extension to
-the format and may not be supported by all linkers.</p>
-</li>
-<li>
-<p><code>CLASS</code> can be used to specify the segment class; this
-feature indicates to the linker that segments of the same class should be
-placed near each other in the output file. The class name can be any word,
-e.g. <code>CLASS=CODE</code>.</p>
-</li>
-<li>
-<p><code>OVERLAY</code>, like <code>CLASS</code>, is specified with an
-arbitrary word as an argument, and provides overlay information to an
-overlay-capable linker.</p>
-</li>
-<li>
-<p>Segments can be declared as <code>USE16</code> or <code>USE32</code>,
-which has the effect of recording the choice in the object file and also
-ensuring that NASM's default assembly mode when assembling in that segment
-is 16-bit or 32-bit respectively.</p>
-</li>
-<li>
-<p>When writing OS/2 object files, you should declare 32-bit segments as
-<code>FLAT</code>, which causes the default segment base for anything in
-the segment to be the special group <code>FLAT</code>, and also defines the
-group if it is not already defined.</p>
-</li>
-<li>
-<p>The <code>obj</code> file format also allows segments to be declared as
-having a pre-defined absolute segment address, although no linkers are
-currently known to make sensible use of this feature; nevertheless, NASM
-allows you to declare a segment such as
-<code>SEGMENT SCREEN ABSOLUTE=0xB800</code> if you need to. The
-<code>ABSOLUTE</code> and <code>ALIGN</code> keywords are mutually
-exclusive.</p>
-</li>
-</ul>
-<p>NASM's default segment attributes are <code>PUBLIC</code>,
-<code>ALIGN=1</code>, no class, no overlay, and <code>USE16</code>.</p>
-<h4 id="section-8.4.2">8.4.2 <code>GROUP</code>: Defining Groups of Segments</h4>
-<p>The <code>obj</code> format also allows segments to be grouped, so that
-a single segment register can be used to refer to all the segments in a
-group. NASM therefore supplies the <code>GROUP</code> directive, whereby
-you can code</p>
-<pre>
-segment data 
-
-        ; some data 
-
-segment bss 
-
-        ; some uninitialized data 
-
-group dgroup data bss
-</pre>
-<p>which will define a group called <code>dgroup</code> to contain the
-segments <code>data</code> and <code>bss</code>. Like <code>SEGMENT</code>,
-<code>GROUP</code> causes the group name to be defined as a symbol, so that
-you can refer to a variable <code>var</code> in the <code>data</code>
-segment as <code>var wrt data</code> or as <code>var wrt dgroup</code>,
-depending on which segment value is currently in your segment register.</p>
-<p>If you just refer to <code>var</code>, however, and <code>var</code> is
-declared in a segment which is part of a group, then NASM will default to
-giving you the offset of <code>var</code> from the beginning of the
-<em>group</em>, not the <em>segment</em>. Therefore <code>SEG var</code>,
-also, will return the group base rather than the segment base.</p>
-<p>NASM will allow a segment to be part of more than one group, but will
-generate a warning if you do this. Variables declared in a segment which is
-part of more than one group will default to being relative to the first
-group that was defined to contain the segment.</p>
-<p>A group does not have to contain any segments; you can still make
-<code>WRT</code> references to a group which does not contain the variable
-you are referring to. OS/2, for example, defines the special group
-<code>FLAT</code> with no segments in it.</p>
-<h4 id="section-8.4.3">8.4.3 <code>UPPERCASE</code>: Disabling Case Sensitivity in Output</h4>
-<p>Although NASM itself is case sensitive, some OMF linkers are not;
-therefore it can be useful for NASM to output single-case object files. The
-<code>UPPERCASE</code> format-specific directive causes all segment, group
-and symbol names that are written to the object file to be forced to upper
-case just before being written. Within a source file, NASM is still
-case-sensitive; but the object file can be written entirely in upper case
-if desired.</p>
-<p><code>UPPERCASE</code> is used alone on a line; it requires no
-parameters.</p>
-<h4 id="section-8.4.4">8.4.4 <code>IMPORT</code>: Importing DLL Symbols</h4>
-<p>The <code>IMPORT</code> format-specific directive defines a symbol to be
-imported from a DLL, for use if you are writing a DLL's import library in
-NASM. You still need to declare the symbol as <code>EXTERN</code> as well
-as using the <code>IMPORT</code> directive.</p>
-<p>The <code>IMPORT</code> directive takes two required parameters,
-separated by white space, which are (respectively) the name of the symbol
-you wish to import and the name of the library you wish to import it from.
-For example:</p>
-<pre>
-    import  WSAStartup wsock32.dll
-</pre>
-<p>A third optional parameter gives the name by which the symbol is known
-in the library you are importing it from, in case this is not the same as
-the name you wish the symbol to be known by to your code once you have
-imported it. For example:</p>
-<pre>
-    import  asyncsel wsock32.dll WSAAsyncSelect
-</pre>
-<h4 id="section-8.4.5">8.4.5 <code>EXPORT</code>: Exporting DLL Symbols</h4>
-<p>The <code>EXPORT</code> format-specific directive defines a global
-symbol to be exported as a DLL symbol, for use if you are writing a DLL in
-NASM. You still need to declare the symbol as <code>GLOBAL</code> as well
-as using the <code>EXPORT</code> directive.</p>
-<p><code>EXPORT</code> takes one required parameter, which is the name of
-the symbol you wish to export, as it was defined in your source file. An
-optional second parameter (separated by white space from the first) gives
-the <em>external</em> name of the symbol: the name by which you wish the
-symbol to be known to programs using the DLL. If this name is the same as
-the internal name, you may leave the second parameter off.</p>
-<p>Further parameters can be given to define attributes of the exported
-symbol. These parameters, like the second, are separated by white space. If
-further parameters are given, the external name must also be specified,
-even if it is the same as the internal name. The available attributes are:</p>
-<ul>
-<li>
-<p><code>resident</code> indicates that the exported name is to be kept
-resident by the system loader. This is an optimization for frequently used
-symbols imported by name.</p>
-</li>
-<li>
-<p><code>nodata</code> indicates that the exported symbol is a function
-which does not make use of any initialized data.</p>
-</li>
-<li>
-<p><code>parm=NNN</code>, where <code>NNN</code> is an integer, sets the
-number of parameter words for the case in which the symbol is a call gate
-between 32-bit and 16-bit segments.</p>
-</li>
-<li>
-<p>An attribute which is just a number indicates that the symbol should be
-exported with an identifying number (ordinal), and gives the desired
-number.</p>
-</li>
-</ul>
-<p>For example:</p>
-<pre>
-    export  myfunc 
-    export  myfunc TheRealMoreFormalLookingFunctionName 
-    export  myfunc myfunc 1234  ; export by ordinal 
-    export  myfunc myfunc resident parm=23 nodata
-</pre>
-<h4 id="section-8.4.6">8.4.6 <code>..start</code>: Defining the Program Entry Point</h4>
-<p><code>OMF</code> linkers require exactly one of the object files being
-linked to define the program entry point, where execution will begin when
-the program is run. If the object file that defines the entry point is
-assembled using NASM, you specify the entry point by declaring the special
-symbol <code>..start</code> at the point where you wish execution to begin.</p>
-<h4 id="section-8.4.7">8.4.7 <code>obj</code> Extensions to the <code>EXTERN</code> Directive</h4>
-<p>If you declare an external symbol with the directive</p>
-<pre>
-    extern  foo
-</pre>
-<p>then references such as <code>mov ax,foo</code> will give you the offset
-of <code>foo</code> from its preferred segment base (as specified in
-whichever module <code>foo</code> is actually defined in). So to access the
-contents of <code>foo</code> you will usually need to do something like</p>
-<pre>
-        mov     ax,seg foo      ; get preferred segment base 
-        mov     es,ax           ; move it into ES 
-        mov     ax,es:foo     ; and use offset `foo' from it
-</pre>
-<p>This is a little unwieldy, particularly if you know that an external is
-going to be accessible from a given segment or group, say
-<code>dgroup</code>. So if <code>DS</code> already contained
-<code>dgroup</code>, you could simply code</p>
-<pre>
-        mov     ax,foo wrt dgroup
-</pre>
-<p>However, having to type this every time you want to access
-<code>foo</code> can be a pain; so NASM allows you to declare
-<code>foo</code> in the alternative form</p>
-<pre>
-    extern  foo:wrt dgroup
-</pre>
-<p>This form causes NASM to pretend that the preferred segment base of
-<code>foo</code> is in fact <code>dgroup</code>; so the expression
-<code>seg foo</code> will now return <code>dgroup</code>, and the
-expression <code>foo</code> is equivalent to <code>foo wrt dgroup</code>.</p>
-<p>This default-<code>WRT</code> mechanism can be used to make externals
-appear to be relative to any group or segment in your program. It can also
-be applied to common variables: see <a href="#section-8.4.8">section
-8.4.8</a>.</p>
-<h4 id="section-8.4.8">8.4.8 <code>obj</code> Extensions to the <code>COMMON</code> Directive</h4>
-<p>The <code>obj</code> format allows common variables to be either near or
-far; NASM allows you to specify which your variables should be by the use
-of the syntax</p>
-<pre>
-common  nearvar 2:near   ; `nearvar' is a near common 
-common  farvar  10:far   ; and `farvar' is far
-</pre>
-<p>Far common variables may be greater in size than 64Kb, and so the OMF
-specification says that they are declared as a number of <em>elements</em>
-of a given size. So a 10-byte far common variable could be declared as ten
-one-byte elements, five two-byte elements, two five-byte elements or one
-ten-byte element.</p>
-<p>Some <code>OMF</code> linkers require the element size, as well as the
-variable size, to match when resolving common variables declared in more
-than one module. Therefore NASM must allow you to specify the element size
-on your far common variables. This is done by the following syntax:</p>
-<pre>
-common  c_5by2  10:far 5        ; two five-byte elements 
-common  c_2by5  10:far 2        ; five two-byte elements
-</pre>
-<p>If no element size is specified, the default is 1. Also, the
-<code>FAR</code> keyword is not required when an element size is specified,
-since only far commons may have element sizes at all. So the above
-declarations could equivalently be</p>
-<pre>
-common  c_5by2  10:5            ; two five-byte elements 
-common  c_2by5  10:2            ; five two-byte elements
-</pre>
-<p>In addition to these extensions, the <code>COMMON</code> directive in
-<code>obj</code> also supports default-<code>WRT</code> specification like
-<code>EXTERN</code> does (explained in <a href="#section-8.4.7">section
-8.4.7</a>). So you can also declare things like</p>
-<pre>
-common  foo     10:wrt dgroup 
-common  bar     16:far 2:wrt data 
-common  baz     24:wrt data:6
-</pre>
-<h4 id="section-8.4.9">8.4.9 Embedded File Dependency Information</h4>
-<p>Since NASM 2.13.02, <code>obj</code> files contain embedded dependency
-file information. To suppress the generation of dependencies, use</p>
-<pre>
-%pragma obj nodepend
-</pre>
-<h3 id="section-8.5">8.5 <code>win32</code>: Microsoft Win32 Object Files</h3>
-<p>The <code>win32</code> output format generates Microsoft Win32 object
-files, suitable for passing to Microsoft linkers such as Visual C++. Note
-that Borland Win32 compilers do not use this format, but use
-<code>obj</code> instead (see <a href="#section-8.4">section 8.4</a>).</p>
-<p><code>win32</code> provides a default output file-name extension of
-<code>.obj</code>.</p>
-<p>Note that although Microsoft say that Win32 object files follow the
-<code>COFF</code> (Common Object File Format) standard, the object files
-produced by Microsoft Win32 compilers are not compatible with COFF linkers
-such as DJGPP's, and vice versa. This is due to a difference of opinion
-over the precise semantics of PC-relative relocations. To produce COFF
-files suitable for DJGPP, use NASM's <code>coff</code> output format;
-conversely, the <code>coff</code> format does not produce object files that
-Win32 linkers can generate correct output from.</p>
-<h4 id="section-8.5.1">8.5.1 <code>win32</code> Extensions to the <code>SECTION</code> Directive</h4>
-<p>Like the <code>obj</code> format, <code>win32</code> allows you to
-specify additional information on the <code>SECTION</code> directive line,
-to control the type and properties of sections you declare. Section types
-and properties are generated automatically by NASM for the standard section
-names <code>.text</code>, <code>.data</code> and <code>.bss</code>, but may
-still be overridden by these qualifiers.</p>
-<p>The available qualifiers are:</p>
-<ul>
-<li>
-<p><code>code</code>, or equivalently <code>text</code>, defines the
-section to be a code section. This marks the section as readable and
-executable, but not writable, and also indicates to the linker that the
-type of the section is code.</p>
-</li>
-<li>
-<p><code>data</code> and <code>bss</code> define the section to be a data
-section, analogously to <code>code</code>. Data sections are marked as
-readable and writable, but not executable. <code>data</code> declares an
-initialized data section, whereas <code>bss</code> declares an
-uninitialized data section.</p>
-</li>
-<li>
-<p><code>rdata</code> declares an initialized data section that is readable
-but not writable. Microsoft compilers use this section to place constants
-in it.</p>
-</li>
-<li>
-<p><code>info</code> defines the section to be an informational section,
-which is not included in the executable file by the linker, but may (for
-example) pass information <em>to</em> the linker. For example, declaring an
-<code>info</code>&ndash;type section called <code>.drectve</code> causes
-the linker to interpret the contents of the section as command-line
-options.</p>
-</li>
-<li>
-<p><code>align=</code>, used with a trailing number as in <code>obj</code>,
-gives the alignment requirements of the section. The maximum you may
-specify is 64: the Win32 object file format contains no means to request a
-greater section alignment than this. If alignment is not explicitly
-specified, the defaults are 16-byte alignment for code sections, 8-byte
-alignment for rdata sections and 4-byte alignment for data (and BSS)
-sections. Informational sections get a default alignment of 1 byte (no
-alignment), though the value does not matter.</p>
-</li>
-<li>
-<p><code>comdat=</code>, followed by a number ("selection"), colon (acting
-as a separator) and a name, marks the section as a "COMDAT section". It
-allows Microsoft linkers to perform function-level linking, to deal with
-multiply defined symbols, to eliminate dead code/data. The "selection"
-number should be one of the <code>IMAGE_COMDAT_SELECT_*</code> constants
-from
-<a href="https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src/Debug/pe-format.md#comdat-sections-object-only"><code>COFF format specification</code></a>;
-this value controls if the linker allows multiply defined symbols and how
-it handles them. The name is the "COMDAT symbol" &ndash; basically a new
-name for the section. So even though you have one section given by the main
-name (e.g. <code>.text</code>), it can actually consist of hundreds of
-COMDAT sections having their own name (and alignment). When the "selection"
-is IMAGE_COMDAT_SELECT_ASSOCIATIVE (5), the following name is the "COMDAT
-symbol" of the associated COMDAT section; this way you can link a piece of
-code or data only when another piece of code or data gets actually linked.</p>
-<p>So, when linking a NASM-compiled file with some C code, the source may
-be structured as follows. Note that the default <code>.text</code> section
-in handled in a special way and it doesn't work well with
-<code>comdat</code>; you may want to append a <code>$</code> character and
-an arbitrary suffix to the section name. It will get linked into the
-<code>.text</code> section anyway &ndash; see the info on
-<a href="https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src/Debug/pe-format.md#grouped-sections-object-only"><code>Grouped Sections</code></a>.</p>
-<pre>
-   section .text$1 align=16 comdat=1:FirstFnc 
-      ...                                        ; Code linked only if referenced from C 
-
-   section .text$1 align=16 comdat=1:SecondFnc 
-      ...                                        ; Code linked only if referenced from C 
-
-   section .rdata align=32 comdat=5:FirstFnc 
-      ...                                        ; Data linked only if the related code (FirstFnc) is linked 
-</pre>
-</li>
-</ul>
-<p>The defaults assumed by NASM if you do not specify the above qualifiers
-are:</p>
-<pre>
-section .text    code  align=16 
-section .data    data  align=4 
-section .rdata   rdata align=8 
-section .bss     bss   align=4
-</pre>
-<p>The <code>win64</code> format also adds:</p>
-<pre>
-section .pdata   rdata align=4 
-section .xdata   rdata align=8
-</pre>
-<p>Any other section name is treated by default like <code>.text</code>.</p>
-<h4 id="section-8.5.2">8.5.2 <code>win32</code>: Safe Structured Exception Handling</h4>
-<p>Among other improvements in Windows XP SP2 and Windows Server 2003
-Microsoft has introduced concept of "safe structured exception handling."
-General idea is to collect handlers' entry points in designated read-only
-table and have alleged entry point verified against this table prior
-exception control is passed to the handler. In order for an executable
-module to be equipped with such "safe exception handler table," all object
-modules on linker command line has to comply with certain criteria. If one
-single module among them does not, then the table in question is omitted
-and above mentioned run-time checks will not be performed for application
-in question. Table omission is by default silent and therefore can be
-easily overlooked. One can instruct linker to refuse to produce binary
-without such table by passing <code>/safeseh</code> command line option.</p>
-<p>Without regard to this run-time check merits it's natural to expect NASM
-to be capable of generating modules suitable for <code>/safeseh</code>
-linking. From developer's viewpoint the problem is two-fold:</p>
-<ul>
-<li>
-<p>how to adapt modules not deploying exception handlers of their own;</p>
-</li>
-<li>
-<p>how to adapt/develop modules utilizing custom exception handling;</p>
-</li>
-</ul>
-<p>Former can be easily achieved with any NASM version by adding following
-line to source code:</p>
-<pre>
-$@feat.00 equ 1
-</pre>
-<p>As of version 2.03 NASM adds this absolute symbol automatically. If it's
-not already present to be precise. I.e. if for whatever reason developer
-would choose to assign another value in source file, it would still be
-perfectly possible.</p>
-<p>Registering custom exception handler on the other hand requires certain
-"magic." As of version 2.03 additional directive is implemented,
-<code>safeseh</code>, which instructs the assembler to produce
-appropriately formatted input data for above mentioned "safe exception
-handler table." Its typical use would be:</p>
-<pre>
-section .text 
-extern  _MessageBoxA@16 
-%if     __?NASM_VERSION_ID?__ &gt;= 0x02030000 
-safeseh handler         ; register handler as "safe handler" 
-%endif 
-handler: 
-        push    DWORD 1 ; MB_OKCANCEL 
-        push    DWORD caption 
-        push    DWORD text 
-        push    DWORD 0 
-        call    _MessageBoxA@16 
-        sub     eax,1   ; incidentally suits as return value 
-                        ; for exception handler 
-        ret 
-global  _main 
-_main: 
-        push    DWORD handler 
-        push    DWORD fs:0 
-        mov     DWORD fs:0,esp ; engage exception handler 
-        xor     eax,eax 
-        mov     eax,DWORDeax   ; cause exception 
-        pop     DWORD fs:0     ; disengage exception handler 
-        add     esp,4 
-        ret 
-text:   db      'OK to rethrow, CANCEL to generate core dump',0 
-caption:db      'SEGV',0 
-
-section .drectve info 
-        db      '/defaultlib:user32.lib /defaultlib:msvcrt.lib '
-</pre>
-<p>As you might imagine, it's perfectly possible to produce .exe binary
-with "safe exception handler table" and yet engage unregistered exception
-handler. Indeed, handler is engaged by simply manipulating
-<code>fs:0</code> location at run-time, something linker has no power
-over, run-time that is. It should be explicitly mentioned that such failure
-to register handler's entry point with <code>safeseh</code> directive has
-undesired side effect at run-time. If exception is raised and unregistered
-handler is to be executed, the application is abruptly terminated without
-any notification whatsoever. One can argue that system could at least have
-logged some kind "non-safe exception handler in x.exe at address n" message
-in event log, but no, literally no notification is provided and user is
-left with no clue on what caused application failure.</p>
-<p>Finally, all mentions of linker in this paragraph refer to Microsoft
-linker version 7.x and later. Presence of <code>@feat.00</code> symbol and
-input data for "safe exception handler table" causes no backward
-incompatibilities and "safeseh" modules generated by NASM 2.03 and later
-can still be linked by earlier versions or non-Microsoft linkers.</p>
-<h4 id="section-8.5.3">8.5.3 Debugging formats for Windows </h4>
-<p>The <code>win32</code> and <code>win64</code> formats support the
-Microsoft CodeView debugging format. Currently CodeView version 8 format is
-supported (<code>cv8</code>), but newer versions of the CodeView debugger
-should be able to handle this format as well.</p>
-<h3 id="section-8.6">8.6 <code>win64</code>: Microsoft Win64 Object Files</h3>
-<p>The <code>win64</code> output format generates Microsoft Win64 object
-files, which is nearly 100% identical to the <code>win32</code> object
-format (<a href="#section-8.5">section 8.5</a>) with the exception that it
-is meant to target 64-bit code and the x86-64 platform altogether. This
-object file is used exactly the same as the <code>win32</code> object
-format (<a href="#section-8.5">section 8.5</a>), in NASM, with regard to
-this exception.</p>
-<h4 id="section-8.6.1">8.6.1 <code>win64</code>: Writing Position-Independent Code</h4>
-<p>While <code>REL</code> takes good care of RIP-relative addressing, there
-is one aspect that is easy to overlook for a Win64 programmer: indirect
-references. Consider a switch dispatch table:</p>
-<pre>
-        jmp     qword dsptch+rax*8 
-        ... 
-dsptch: dq      case0 
-        dq      case1 
-        ...
-</pre>
-<p>Even a novice Win64 assembler programmer will soon realize that the code
-is not 64-bit savvy. Most notably linker will refuse to link it with</p>
-<pre>
-'ADDR32' relocation to '.text' invalid without /LARGEADDRESSAWARE:NO
-</pre>
-<p>So she will have to split jmp instruction as following:</p>
-<pre>
-        lea     rbx,rel dsptch 
-        jmp     qword rbx+rax*8
-</pre>
-<p>What happens behind the scene is that effective address in
-<code>lea</code> is encoded relative to instruction pointer, or in
-perfectly position-independent manner. But this is only part of the
-problem! Trouble is that in .dll context <code>caseN</code> relocations
-will make their way to the final module and might have to be adjusted at
-.dll load time. To be specific when it can't be loaded at preferred
-address. And when this occurs, pages with such relocations will be rendered
-private to current process, which kind of undermines the idea of sharing
-.dll. But no worry, it's trivial to fix:</p>
-<pre>
-        lea     rbx,rel dsptch 
-        add     rbx,rbx+rax*8 
-        jmp     rbx 
-        ... 
-dsptch: dq      case0-dsptch 
-        dq      case1-dsptch 
-        ...
-</pre>
-<p>NASM version 2.03 and later provides another alternative,
-<code>wrt ..imagebase</code> operator, which returns offset from base
-address of the current image, be it .exe or .dll module, therefore the
-name. For those acquainted with PE-COFF format base address denotes start
-of <code>IMAGE_DOS_HEADER</code> structure. Here is how to implement switch
-with these image-relative references:</p>
-<pre>
-        lea     rbx,rel dsptch 
-        mov     eax,rbx+rax*4 
-        sub     rbx,dsptch wrt ..imagebase 
-        add     rbx,rax 
-        jmp     rbx 
-        ... 
-dsptch: dd      case0 wrt ..imagebase 
-        dd      case1 wrt ..imagebase
-</pre>
-<p>One can argue that the operator is redundant. Indeed, snippet before
-last works just fine with any NASM version and is not even Windows
-specific... The real reason for implementing <code>wrt ..imagebase</code>
-will become apparent in next paragraph.</p>
-<p>It should be noted that <code>wrt ..imagebase</code> is defined as
-32-bit operand only:</p>
-<pre>
-        dd      label wrt ..imagebase           ; ok 
-        dq      label wrt ..imagebase           ; bad 
-        mov     eax,label wrt ..imagebase       ; ok 
-        mov     rax,label wrt ..imagebase       ; bad
-</pre>
-<h4 id="section-8.6.2">8.6.2 <code>win64</code>: Structured Exception Handling</h4>
-<p>Structured exception handing in Win64 is completely different matter
-from Win32. Upon exception program counter value is noted, and
-linker-generated table comprising start and end addresses of all the
-functions in given executable module is traversed and compared to the
-saved program counter. Thus so called <code>UNWIND_INFO</code> structure is
-identified. If it's not found, then offending subroutine is assumed to be
-"leaf" and just mentioned lookup procedure is attempted for its caller. In
-Win64 leaf function is such function that does not call any other function
-<em>nor</em> modifies any Win64 non-volatile registers, including stack
-pointer. The latter ensures that it's possible to identify leaf function's
-caller by simply pulling the value from the top of the stack.</p>
-<p>While majority of subroutines written in assembler are not calling any
-other function, requirement for non-volatile registers' immutability leaves
-developer with not more than 7 registers and no stack frame, which is not
-necessarily what she counted with. Customarily one would meet the
-requirement by saving non-volatile registers on stack and restoring them
-upon return, so what can go wrong? If and only if an exception is raised
-at run-time and no <code>UNWIND_INFO</code> structure is associated with
-such "leaf" function, the stack unwind procedure will expect to find
-caller's return address on the top of stack immediately followed by its
-frame. Given that developer pushed caller's non-volatile registers on
-stack, would the value on top point at some code segment or even
-addressable space? Well, developer can attempt copying caller's return
-address to the top of stack and this would actually work in some very
-specific circumstances. But unless developer can guarantee that these
-circumstances are always met, it's more appropriate to assume worst case
-scenario, i.e. stack unwind procedure going berserk. Relevant question is
-what happens then? Application is abruptly terminated without any
-notification whatsoever. Just like in Win32 case, one can argue that system
-could at least have logged "unwind procedure went berserk in x.exe at
-address n" in event log, but no, no trace of failure is left.</p>
-<p>Now, when we understand significance of the <code>UNWIND_INFO</code>
-structure, let's discuss what's in it and/or how it's processed. First of
-all it is checked for presence of reference to custom language-specific
-exception handler. If there is one, then it's invoked. Depending on the
-return value, execution flow is resumed (exception is said to be
-"handled"), <em>or</em> rest of <code>UNWIND_INFO</code> structure is
-processed as following. Beside optional reference to custom handler, it
-carries information about current callee's stack frame and where
-non-volatile registers are saved. Information is detailed enough to be able
-to reconstruct contents of caller's non-volatile registers upon call to
-current callee. And so caller's context is reconstructed, and then unwind
-procedure is repeated, i.e. another <code>UNWIND_INFO</code> structure is
-associated, this time, with caller's instruction pointer, which is then
-checked for presence of reference to language-specific handler, etc. The
-procedure is recursively repeated till exception is handled. As last resort
-system "handles" it by generating memory core dump and terminating the
-application.</p>
-<p>As for the moment of this writing NASM unfortunately does not facilitate
-generation of above mentioned detailed information about stack frame
-layout. But as of version 2.03 it implements building blocks for generating
-structures involved in stack unwinding. As simplest example, here is how to
-deploy custom exception handler for leaf function:</p>
-<pre>
-default rel 
-section .text 
-extern  MessageBoxA 
-handler: 
-        sub     rsp,40 
-        mov     rcx,0 
-        lea     rdx,text 
-        lea     r8,caption 
-        mov     r9,1    ; MB_OKCANCEL 
-        call    MessageBoxA 
-        sub     eax,1   ; incidentally suits as return value 
-                        ; for exception handler 
-        add     rsp,40 
-        ret 
-global  main 
-main: 
-        xor     rax,rax 
-        mov     rax,QWORDrax  ; cause exception 
-        ret 
-main_end: 
-text:   db      'OK to rethrow, CANCEL to generate core dump',0 
-caption:db      'SEGV',0 
-
-section .pdata  rdata align=4 
-        dd      main wrt ..imagebase 
-        dd      main_end wrt ..imagebase 
-        dd      xmain wrt ..imagebase 
-section .xdata  rdata align=8 
-xmain:  db      9,0,0,0 
-        dd      handler wrt ..imagebase 
-section .drectve info 
-        db      '/defaultlib:user32.lib /defaultlib:msvcrt.lib '
-</pre>
-<p>What you see in <code>.pdata</code> section is element of the "table
-comprising start and end addresses of function" along with reference to
-associated <code>UNWIND_INFO</code> structure. And what you see in
-<code>.xdata</code> section is <code>UNWIND_INFO</code> structure
-describing function with no frame, but with designated exception handler.
-References are <em>required</em> to be image-relative (which is the real
-reason for implementing <code>wrt ..imagebase</code> operator). It should
-be noted that <code>rdata align=n</code>, as well as
-<code>wrt ..imagebase</code>, are optional in these two segments' contexts,
-i.e. can be omitted. Latter means that <em>all</em> 32-bit references, not
-only above listed required ones, placed into these two segments turn out
-image-relative. Why is it important to understand? Developer is allowed to
-append handler-specific data to <code>UNWIND_INFO</code> structure, and if
-she adds a 32-bit reference, then she will have to remember to adjust
-its value to obtain the real pointer.</p>
-<p>As already mentioned, in Win64 terms leaf function is one that does not
-call any other function <em>nor</em> modifies any non-volatile register,
-including stack pointer. But it's not uncommon that assembler programmer
-plans to utilize every single register and sometimes even have variable
-stack frame. Is there anything one can do with bare building blocks? I.e.
-besides manually composing fully-fledged <code>UNWIND_INFO</code>
-structure, which would surely be considered error-prone? Yes, there is.
-Recall that exception handler is called first, before stack layout is
-analyzed. As it turned out, it's perfectly possible to manipulate current
-callee's context in custom handler in manner that permits further stack
-unwinding. General idea is that handler would not actually "handle" the
-exception, but instead restore callee's context, as it was at its entry
-point and thus mimic leaf function. In other words, handler would simply
-undertake part of unwinding procedure. Consider following example:</p>
-<pre>
-function: 
-        mov     rax,rsp         ; copy rsp to volatile register 
-        push    r15             ; save non-volatile registers 
-        push    rbx 
-        push    rbp 
-        mov     r11,rsp         ; prepare variable stack frame 
-        sub     r11,rcx 
-        and     r11,-64 
-        mov     QWORDr11,rax  ; check for exceptions 
-        mov     rsp,r11         ; allocate stack frame 
-        mov     QWORDrsp,rax  ; save original rsp value 
-magic_point: 
-        ... 
-        mov     r11,QWORDrsp  ; pull original rsp value 
-        mov     rbp,QWORDr11-24 
-        mov     rbx,QWORDr11-16 
-        mov     r15,QWORDr11-8 
-        mov     rsp,r11         ; destroy frame 
-        ret
-</pre>
-<p>The keyword is that up to <code>magic_point</code> original
-<code>rsp</code> value remains in chosen volatile register and no
-non-volatile register, except for <code>rsp</code>, is modified. While past
-<code>magic_point</code> <code>rsp</code> remains constant till the very
-end of the <code>function</code>. In this case custom language-specific
-exception handler would look like this:</p>
-<pre>
-EXCEPTION_DISPOSITION handler (EXCEPTION_RECORD *rec,ULONG64 frame, 
-        CONTEXT *context,DISPATCHER_CONTEXT *disp) 
-{   ULONG64 *rsp; 
-    if (context-&gt;Rip&lt;(ULONG64)magic_point) 
-        rsp = (ULONG64 *)context-&gt;Rax; 
-    else 
-    {   rsp = ((ULONG64 **)context-&gt;Rsp)0; 
-        context-&gt;Rbp = rsp-3; 
-        context-&gt;Rbx = rsp-2; 
-        context-&gt;R15 = rsp-1; 
-    } 
-    context-&gt;Rsp = (ULONG64)rsp; 
-
-    memcpy (disp-&gt;ContextRecord,context,sizeof(CONTEXT)); 
-    RtlVirtualUnwind(UNW_FLAG_NHANDLER,disp-&gt;ImageBase, 
-        dips-&gt;ControlPc,disp-&gt;FunctionEntry,disp-&gt;ContextRecord, 
-        &amp;disp-&gt;HandlerData,&amp;disp-&gt;EstablisherFrame,NULL); 
-    return ExceptionContinueSearch; 
-}
-</pre>
-<p>As custom handler mimics leaf function, corresponding
-<code>UNWIND_INFO</code> structure does not have to contain any information
-about stack frame and its layout.</p>
-<h3 id="section-8.7">8.7 <code>coff</code>: Common Object File Format</h3>
-<p>The <code>coff</code> output type produces <code>COFF</code> object
-files suitable for linking with the DJGPP linker.</p>
-<p><code>coff</code> provides a default output file-name extension of
-<code>.o</code>.</p>
-<p>The <code>coff</code> format supports the same extensions to the
-<code>SECTION</code> directive as <code>win32</code> does, except that the
-<code>align</code> qualifier and the <code>info</code> section type are not
-supported.</p>
-<h3 id="section-8.8">8.8 <code>macho32</code> and <code>macho64</code>: Mach Object File Format</h3>
-<p>The <code>macho32</code> and <code>macho64</code> output formts produces
-Mach-O object files suitable for linking with the MacOS X linker.
-<code>macho</code> is a synonym for <code>macho32</code>.</p>
-<p><code>macho</code> provides a default output file-name extension of
-<code>.o</code>.</p>
-<h4 id="section-8.8.1">8.8.1 <code>macho</code> extensions to the <code>SECTION</code> Directive </h4>
-<p>The <code>macho</code> output format specifies section names in the
-format "<em>segment</em><code>,</code><em>section</em>". No spaces are
-allowed around the comma. The following flags can also be specified:</p>
-<ul>
-<li>
-<p><code>data</code> &ndash; this section contains initialized data items</p>
-</li>
-<li>
-<p><code>code</code> &ndash; this section contains code exclusively</p>
-</li>
-<li>
-<p><code>mixed</code> &ndash; this section contains both code and data</p>
-</li>
-<li>
-<p><code>bss</code> &ndash; this section is uninitialized and filled with
-zero</p>
-</li>
-<li>
-<p><code>zerofill</code> &ndash; same as <code>bss</code></p>
-</li>
-<li>
-<p><code>no_dead_strip</code> &ndash; inhibit dead code stripping for this
-section</p>
-</li>
-<li>
-<p><code>live_support</code> &ndash; set the live support flag for this
-section</p>
-</li>
-<li>
-<p><code>strip_static_syms</code> &ndash; strip static symbols for this
-section</p>
-</li>
-<li>
-<p><code>debug</code> &ndash; this section contains debugging information</p>
-</li>
-<li>
-<p><code>align=</code><em>alignment</em> &ndash; specify section alignment</p>
-</li>
-</ul>
-<p>The default is <code>data</code>, unless the section name is
-<code>__text</code> or <code>__bss</code> in which case the default is
-<code>text</code> or <code>bss</code>, respectively.</p>
-<p>For compatibility with other Unix platforms, the following standard
-names are also supported:</p>
-<pre>
-.text    = __TEXT,__text  text 
-.rodata  = __DATA,__const data 
-.data    = __DATA,__data  data 
-.bss     = __DATA,__bss   bss
-</pre>
-<p>If the <code>.rodata</code> section contains no relocations, it is
-instead put into the <code>__TEXT,__const</code> section unless this
-section has already been specified explicitly. However, it is probably
-better to specify <code>__TEXT,__const</code> and
-<code>__DATA,__const</code> explicitly as appropriate.</p>
-<h4 id="section-8.8.2">8.8.2 Thread Local Storage in Mach-O: <code>macho</code> special symbols and <code>WRT</code></h4>
-<p>Mach-O defines the following special symbols that can be used on the
-right-hand side of the <code>WRT</code> operator:</p>
-<ul>
-<li>
-<p><code>..tlvp</code> is used to specify access to thread-local storage.</p>
-</li>
-<li>
-<p><code>..gotpcrel</code> is used to specify references to the Global
-Offset Table. The GOT is supported in the <code>macho64</code> format only.</p>
-</li>
-</ul>
-<h4 id="section-8.8.3">8.8.3 <code>macho</code> specific directive <code>subsections_via_symbols</code></h4>
-<p>The directive <code>subsections_via_symbols</code> sets the
-<code>MH_SUBSECTIONS_VIA_SYMBOLS</code> flag in the Mach-O header, that
-effectively separates a block (or a subsection) based on a symbol. It is
-often used for eliminating dead codes by a linker.</p>
-<p>This directive takes no arguments.</p>
-<p>This is a macro implemented as a <code>%pragma</code>. It can also be
-specified in its <code>%pragma</code> form, in which case it will not
-affect non-Mach-O builds of the same source code:</p>
-<pre>
-     %pragma macho subsections_via_symbols
-</pre>
-<h4 id="section-8.8.4">8.8.4 <code>macho</code> specific directive <code>no_dead_strip</code></h4>
-<p>The directive <code>no_dead_strip</code> sets the Mach-O
-<code>SH_NO_DEAD_STRIP</code> section flag on the section containing a a
-specific symbol. This directive takes a list of symbols as its arguments.</p>
-<p>This is a macro implemented as a <code>%pragma</code>. It can also be
-specified in its <code>%pragma</code> form, in which case it will not
-affect non-Mach-O builds of the same source code:</p>
-<pre>
-     %pragma macho no_dead_strip symbol...
-</pre>
-<h4 id="section-8.8.5">8.8.5 <code>macho</code> specific extensions to the <code>GLOBAL</code> Directive: <code>private_extern</code></h4>
-<p>The directive extension to <code>GLOBAL</code> marks the symbol with
-limited global scope. For example, you can specify the global symbol with
-this extension:</p>
-<pre>
-global foo:private_extern 
-foo: 
-         ; codes
-</pre>
-<p>Using with static linker will clear the private extern attribute. But
-linker option like <code>-keep_private_externs</code> can avoid it.</p>
-<h3 id="section-8.9">8.9 <code>elf32</code>, <code>elf64</code>, <code>elfx32</code>: Executable and Linkable Format Object Files</h3>
-<p>The <code>elf32</code>, <code>elf64</code> and <code>elfx32</code>
-output formats generate <code>ELF32 and ELF64</code> (Executable and
-Linkable Format) object files, as used by Linux as well as Unix System V,
-including Solaris x86, UnixWare and SCO Unix. ELF provides a default output
-file-name extension of <code>.o</code>. <code>elf</code> is a synonym for
-<code>elf32</code>.</p>
-<p>The <code>elfx32</code> format is used for the x32 ABI, which is a
-32-bit ABI with the CPU in 64-bit mode.</p>
-<h4 id="section-8.9.1">8.9.1 ELF specific directive <code>osabi</code></h4>
-<p>The ELF header specifies the application binary interface for the target
-operating system (OSABI). This field can be set by using the
-<code>osabi</code> directive with the numeric value (0-255) of the target
-system. If this directive is not used, the default value will be "UNIX
-System V ABI" (0) which will work on most systems which support ELF.</p>
-<h4 id="section-8.9.2">8.9.2 ELF extensions to the <code>SECTION</code> Directive </h4>
-<p>Like the <code>obj</code> format, <code>elf</code> allows you to specify
-additional information on the <code>SECTION</code> directive line, to
-control the type and properties of sections you declare. Section types and
-properties are generated automatically by NASM for the standard section
-names, but may still be overridden by these qualifiers.</p>
-<p>The available qualifiers are:</p>
-<ul>
-<li>
-<p><code>alloc</code> defines the section to be one which is loaded into
-memory when the program is run. <code>noalloc</code> defines it to be one
-which is not, such as an informational or comment section.</p>
-</li>
-<li>
-<p><code>exec</code> defines the section to be one which should have
-execute permission when the program is run. <code>noexec</code> defines it
-as one which should not.</p>
-</li>
-<li>
-<p><code>write</code> defines the section to be one which should be
-writable when the program is run. <code>nowrite</code> defines it as one
-which should not.</p>
-</li>
-<li>
-<p><code>progbits</code> defines the section to be one with explicit
-contents stored in the object file: an ordinary code or data section, for
-example.</p>
-</li>
-<li>
-<p><code>nobits</code> defines the section to be one with no explicit
-contents given, such as a BSS section.</p>
-</li>
-<li>
-<p><code>note</code> indicates that this section contains ELF notes. The
-content of ELF notes are specified using normal assembly instructions; it
-is up to the programmer to ensure these are valid ELF notes.</p>
-</li>
-<li>
-<p><code>preinit_array</code> indicates that this section contains function
-addresses to be called before any other initialization has happened.</p>
-</li>
-<li>
-<p><code>init_array</code> indicates that this section contains function
-addresses to be called during initialization.</p>
-</li>
-<li>
-<p><code>fini_array</code> indicates that this section contains function
-pointers to be called during termination.</p>
-</li>
-<li>
-<p><code>align=</code>, used with a trailing number as in <code>obj</code>,
-gives the alignment requirements of the section.</p>
-</li>
-<li>
-<p><code>byte</code>, <code>word</code>, <code>dword</code>,
-<code>qword</code>, <code>tword</code>, <code>oword</code>,
-<code>yword</code>, or <code>zword</code> with an optional
-<code>*</code>multiplier specify the fundamental data item size for a
-section which contains either fixed-sized data structures or strings; it
-also sets a default alignment. This is generally used with the
-<code>strings</code> and <code>merge</code> attributes (see below.) For
-example <code>byte*4</code> defines a unit size of 4 bytes, with a default
-alignment of 1; <code>dword</code> also defines a unit size of 4 bytes, but
-with a default alignment of 4. The <code>align=</code> attribute, if
-specified, overrides this default alignment.</p>
-</li>
-<li>
-<p><code>pointer</code> is equivalent to <code>dword</code> for
-<code>elf32</code> or <code>elfx32</code>, and <code>qword</code> for
-<code>elf64</code>.</p>
-</li>
-<li>
-<p><code>strings</code> indicate that this section contains exclusively
-null-terminated strings. By default these are assumed to be byte strings,
-but a size specifier can be used to override that.</p>
-</li>
-<li>
-<p><code>merge</code> indicates that duplicate data elements in this
-section should be merged with data elements from other object files. Data
-elements can be either fixed-sized objects or null-terminatedstrings (with
-the <code>strings</code> attribute.) A size specifier is required unless
-<code>strings</code> is specified, in which case the size defaults to
-<code>byte</code>.</p>
-</li>
-<li>
-<p><code>tls</code> defines the section to be one which contains thread
-local variables.</p>
-</li>
-</ul>
-<p>The defaults assumed by NASM if you do not specify the above qualifiers
-are:</p>
-<p></p>
-<pre>
-section .text          progbits      alloc   exec    nowrite  align=16 
-section .rodata        progbits      alloc   noexec  nowrite  align=4 
-section .lrodata       progbits      alloc   noexec  nowrite  align=4 
-section .data          progbits      alloc   noexec  write    align=4 
-section .ldata         progbits      alloc   noexec  write    align=4 
-section .bss           nobits        alloc   noexec  write    align=4 
-section .lbss          nobits        alloc   noexec  write    align=4 
-section .tdata         progbits      alloc   noexec  write    align=4   tls 
-section .tbss          nobits        alloc   noexec  write    align=4   tls 
-section .comment       progbits      noalloc noexec  nowrite  align=1 
-section .preinit_array preinit_array alloc   noexec  nowrite  pointer 
-section .init_array    init_array    alloc   noexec  nowrite  pointer 
-section .fini_array    fini_array    alloc   noexec  nowrite  pointer 
-section .note          note          noalloc noexec  nowrite  align=4 
-section other          progbits      alloc   noexec  nowrite  align=1
-</pre>
-<p>(Any section name other than those in the above table is treated by
-default like <code>other</code> in the above table. Please note that
-section names are case sensitive.)</p>
-<h4 id="section-8.9.3">8.9.3 Position-Independent Code: ELF Special Symbols and <code>WRT</code></h4>
-<p>Since <code>ELF</code> does not support segment-base references, the
-<code>WRT</code> operator is not used for its normal purpose; therefore
-NASM's <code>elf</code> output format makes use of <code>WRT</code> for a
-different purpose, namely the PIC-specific relocation types.</p>
-<p><code>elf</code> defines five special symbols which you can use as the
-right-hand side of the <code>WRT</code> operator to obtain PIC relocation
-types. They are <code>..gotpc</code>, <code>..gotoff</code>,
-<code>..got</code>, <code>..plt</code> and <code>..sym</code>. Their
-functions are summarized here:</p>
-<ul>
-<li>
-<p>Referring to the symbol marking the global offset table base using
-<code>wrt ..gotpc</code> will end up giving the distance from the beginning
-of the current section to the global offset table.
-(<code>_GLOBAL_OFFSET_TABLE_</code> is the standard symbol name used to
-refer to the GOT.) So you would then need to add <code>$$</code> to the
-result to get the real address of the GOT.</p>
-</li>
-<li>
-<p>Referring to a location in one of your own sections using
-<code>wrt ..gotoff</code> will give the distance from the beginning of the
-GOT to the specified location, so that adding on the address of the GOT
-would give the real address of the location you wanted.</p>
-</li>
-<li>
-<p>Referring to an external or global symbol using <code>wrt ..got</code>
-causes the linker to build an entry <em>in</em> the GOT containing the
-address of the symbol, and the reference gives the distance from the
-beginning of the GOT to the entry; so you can add on the address of the
-GOT, load from the resulting address, and end up with the address of the
-symbol.</p>
-</li>
-<li>
-<p>Referring to a procedure name using <code>wrt ..plt</code> causes the
-linker to build a procedure linkage table entry for the symbol, and the
-reference gives the address of the PLT entry. You can only use this in
-contexts which would generate a PC-relative relocation normally (i.e. as
-the destination for <code>CALL</code> or <code>JMP</code>), since ELF
-contains no relocation type to refer to PLT entries absolutely.</p>
-</li>
-<li>
-<p>Referring to a symbol name using <code>wrt ..sym</code> causes NASM to
-write an ordinary relocation, but instead of making the relocation relative
-to the start of the section and then adding on the offset to the symbol, it
-will write a relocation record aimed directly at the symbol in question.
-The distinction is a necessary one due to a peculiarity of the dynamic
-linker.</p>
-</li>
-</ul>
-<p>A fuller explanation of how to use these relocation types to write
-shared libraries entirely in NASM is given in
-<a href="nasmdo10.html#section-10.2">section 10.2</a>.</p>
-<h4 id="section-8.9.4">8.9.4 Thread Local Storage in ELF: <code>elf</code> Special Symbols and <code>WRT</code></h4>
-<ul>
-<li>
-<p>In ELF32 mode, referring to an external or global symbol using
-<code>wrt ..tlsie</code>  causes the linker to build an entry <em>in</em>
-the GOT containing the offset of the symbol within the TLS block, so you
-can access the value of the symbol with code such as:</p>
-<pre>
-       mov  eax,tid wrt ..tlsie 
-       mov  gs:eax,ebx
-</pre>
-</li>
-<li>
-<p>In ELF64 or ELFx32 mode, referring to an external or global symbol using
-<code>wrt ..gottpoff</code>  causes the linker to build an entry
-<em>in</em> the GOT containing the offset of the symbol within the TLS
-block, so you can access the value of the symbol with code such as:</p>
-<pre>
-       mov   rax,rel tid wrt ..gottpoff 
-       mov   rcx,fs:rax
-</pre>
-</li>
-</ul>
-<h4 id="section-8.9.5">8.9.5 <code>elf</code> Extensions to the <code>GLOBAL</code> Directive</h4>
-<p><code>ELF</code> object files can contain more information about a
-global symbol than just its address: they can contain the size of the
-symbol and its type as well. These are not merely debugger conveniences,
-but are actually necessary when the program being written is a shared
-library. NASM therefore supports some extensions to the <code>GLOBAL</code>
-directive, allowing you to specify these features.</p>
-<p>You can specify whether a global variable is a function or a data object
-by suffixing the name with a colon and the word <code>function</code> or
-<code>data</code>. (<code>object</code> is a synonym for
-<code>data</code>.) For example:</p>
-<pre>
-global   hashlookup:function, hashtable:data
-</pre>
-<p>exports the global symbol <code>hashlookup</code> as a function and
-<code>hashtable</code> as a data object.</p>
-<p>Optionally, you can control the ELF visibility of the symbol. Just add
-one of the visibility keywords: <code>default</code>,
-<code>internal</code>, <code>hidden</code>, or <code>protected</code>. The
-default is <code>default</code> of course. For example, to make
-<code>hashlookup</code> hidden:</p>
-<pre>
-global   hashlookup:function hidden
-</pre>
-<p>Since version 2.15, it is possible to specify symbols binding. The
-keywords are: <code>weak</code> to generate weak symbol or
-<code>strong</code>. The default is <code>strong</code>.</p>
-<p>You can also specify the size of the data associated with the symbol, as
-a numeric expression (which may involve labels, and even forward
-references) after the type specifier. Like this:</p>
-<pre>
-global  hashtable:data (hashtable.end - hashtable) 
-
-hashtable: 
-        db this,that,theother  ; some data here 
-.end:
-</pre>
-<p>This makes NASM automatically calculate the length of the table and
-place that information into the <code>ELF</code> symbol table.</p>
-<p>Declaring the type and size of global symbols is necessary when writing
-shared library code. For more information, see
-<a href="nasmdo10.html#section-10.2.4">section 10.2.4</a>.</p>
-<h4 id="section-8.9.6">8.9.6 <code>elf</code> Extensions to the <code>EXTERN</code> Directive</h4>
-<p>Since version 2.15 it is possible to specify keyword <code>weak</code>
-to generate weak external reference. Example:</p>
-<pre>
-extern weak_ref:weak
-</pre>
-<h4 id="section-8.9.7">8.9.7 <code>elf</code> Extensions to the <code>COMMON</code> Directive </h4>
-<p><code>ELF</code> also allows you to specify alignment requirements on
-common variables. This is done by putting a number (which must be a power
-of two) after the name and size of the common variable, separated (as
-usual) by a colon. For example, an array of doublewords would benefit from
-4-byte alignment:</p>
-<pre>
-common  dwordarray 128:4
-</pre>
-<p>This declares the total size of the array to be 128 bytes, and requires
-that it be aligned on a 4-byte boundary.</p>
-<h4 id="section-8.9.8">8.9.8 16-bit code and ELF </h4>
-<p>Older versions of the <code>ELF32</code> specification did not provide
-relocations for 8- and 16-bit values. It is now part of the formal
-specification, and any new enough linker should support them.</p>
-<p>ELF has currently no support for segmented programming.</p>
-<h4 id="section-8.9.9">8.9.9 Debug formats and ELF </h4>
-<p>ELF provides debug information in <code>STABS</code> and
-<code>DWARF</code> formats. Line number information is generated for all
-executable sections, but please note that only the ".text" section is
-executable by default.</p>
-<h3 id="section-8.10">8.10 <code>aout</code>: Linux <code>a.out</code> Object Files</h3>
-<p>The <code>aout</code> format generates <code>a.out</code> object files,
-in the form used by early Linux systems (current Linux systems use ELF, see
-<a href="#section-8.9">section 8.9</a>.) These differ from other
-<code>a.out</code> object files in that the magic number in the first four
-bytes of the file is different; also, some implementations of
-<code>a.out</code>, for example NetBSD's, support position-independent
-code, which Linux's implementation does not.</p>
-<p><code>a.out</code> provides a default output file-name extension of
-<code>.o</code>.</p>
-<p><code>a.out</code> is a very simple object format. It supports no
-special directives, no special symbols, no use of <code>SEG</code> or
-<code>WRT</code>, and no extensions to any standard directives. It supports
-only the three standard section names <code>.text</code>,
-<code>.data</code> and <code>.bss</code>.</p>
-<h3 id="section-8.11">8.11 <code>aoutb</code>: NetBSD/FreeBSD/OpenBSD <code>a.out</code> Object Files</h3>
-<p>The <code>aoutb</code> format generates <code>a.out</code> object files,
-in the form used by the various free <code>BSD Unix</code> clones,
-<code>NetBSD</code>, <code>FreeBSD</code> and <code>OpenBSD</code>. For
-simple object files, this object format is exactly the same as
-<code>aout</code> except for the magic number in the first four bytes of
-the file. However, the <code>aoutb</code> format supports
-position-independent code in the same way as the <code>elf</code> format,
-so you can use it to write <code>BSD</code> shared libraries.</p>
-<p><code>aoutb</code> provides a default output file-name extension of
-<code>.o</code>.</p>
-<p><code>aoutb</code> supports no special directives, no special symbols,
-and only the three standard section names <code>.text</code>,
-<code>.data</code> and <code>.bss</code>. However, it also supports the
-same use of <code>WRT</code> as <code>elf</code> does, to provide
-position-independent code relocation types. See
-<a href="#section-8.9.3">section 8.9.3</a> for full documentation of this
-feature.</p>
-<p><code>aoutb</code> also supports the same extensions to the
-<code>GLOBAL</code> directive as <code>elf</code> does: see
-<a href="#section-8.9.5">section 8.9.5</a> for documentation of this.</p>
-<h3 id="section-8.12">8.12 <code>as86</code>: Minix/Linux <code>as86</code> Object Files</h3>
-<p>The Minix/Linux 16-bit assembler <code>as86</code> has its own
-non-standard object file format. Although its companion linker
-<code>ld86</code> produces something close to ordinary <code>a.out</code>
-binaries as output, the object file format used to communicate between
-<code>as86</code> and <code>ld86</code> is not itself <code>a.out</code>.</p>
-<p>NASM supports this format, just in case it is useful, as
-<code>as86</code>. <code>as86</code> provides a default output file-name
-extension of <code>.o</code>.</p>
-<p><code>as86</code> is a very simple object format (from the NASM user's
-point of view). It supports no special directives, no use of
-<code>SEG</code> or <code>WRT</code>, and no extensions to any standard
-directives. It supports only the three standard section names
-<code>.text</code>, <code>.data</code> and <code>.bss</code>. The only
-special symbol supported is <code>..start</code>.</p>
-<h3 id="section-8.13">8.13 <code>dbg</code>: Debugging Format</h3>
-<p>The <code>dbg</code> format does not output an object file as such;
-instead, it outputs a text file which contains a complete list of all the
-transactions between the main body of NASM and the output-format back end
-module. It is primarily intended to aid people who want to write their own
-output drivers, so that they can get a clearer idea of the various requests
-the main program makes of the output driver, and in what order they happen.</p>
-<p>For simple files, one can easily use the <code>dbg</code> format like
-this:</p>
-<pre>
-nasm -f dbg filename.asm
-</pre>
-<p>which will generate a diagnostic file called <code>filename.dbg</code>.
-However, this will not work well on files which were designed for a
-different object format, because each object format defines its own macros
-(usually user-level forms of directives), and those macros will not be
-defined in the <code>dbg</code> format. Therefore it can be useful to run
-NASM twice, in order to do the preprocessing with the native object format
-selected:</p>
-<pre>
-nasm -e -f elf32 -o elfprog.i elfprog.asm 
-nasm -a -f dbg elfprog.i
-</pre>
-<p>This preprocesses <code>elfprog.asm</code> into <code>elfprog.i</code>,
-keeping the <code>elf32</code> object format selected in order to make sure
-ELF special directives are converted into primitive form correctly. Then
-the preprocessed source is fed through the <code>dbg</code> format to
-generate the final diagnostic output.</p>
-<p>This workaround will still typically not work for programs intended for
-<code>obj</code> format, because the <code>obj</code> <code>SEGMENT</code>
-and <code>GROUP</code> directives have side effects of defining the segment
-and group names as symbols; <code>dbg</code> will not do this, so the
-program will not assemble. You will have to work around that by defining
-the symbols yourself (using <code>EXTERN</code>, for example) if you really
-need to get a <code>dbg</code> trace of an <code>obj</code>&ndash;specific
-source file.</p>
-<p><code>dbg</code> accepts any section name and any directives at all, and
-logs them all to its output file.</p>
-<p><code>dbg</code> accepts and logs any <code>%pragma</code>, but the
-specific <code>%pragma</code>:</p>
-<pre>
-     %pragma dbg maxdump &lt;size&gt;
-</pre>
-<p>where <code>&lt;size&gt;</code> is either a number or
-<code>unlimited</code>, can be used to control the maximum size for dumping
-the full contents of a <code>rawdata</code> output object.</p>
-</div>
-</body>
-</html>

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-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.1//EN" "http://www.w3.org/TR/xhtml11/DTD/xhtml11.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<meta charset="UTF-8" />
-<title>NASM - The Netwide Assembler</title>
-<link href="nasmdoc.css" rel="stylesheet" type="text/css" />
-<link href="local.css" rel="stylesheet" type="text/css" />
-</head>
-<body>
-<ul class="navbar">
-<li class="first"><a class="prev" href="nasmdoc8.html">Chapter 8</a></li>
-<li><a class="next" href="nasmdo10.html">Chapter 10</a></li>
-<li><a class="toc" href="nasmdoc0.html">Contents</a></li>
-<li class="last"><a class="index" href="nasmdoci.html">Index</a></li>
-</ul>
-<div class="title">
-<h1>NASM - The Netwide Assembler</h1>
-<span class="subtitle">version 2.16.01</span>
-</div>
-<div class="contents"
->
-<h2 id="chapter-9">Chapter 9: Writing 16-bit Code (DOS, Windows 3/3.1)</h2>
-<p>This chapter attempts to cover some of the common issues encountered
-when writing 16-bit code to run under <code>MS-DOS</code> or
-<code>Windows 3.x</code>. It covers how to link programs to produce
-<code>.EXE</code> or <code>.COM</code> files, how to write
-<code>.SYS</code> device drivers, and how to interface assembly language
-code with 16-bit C compilers and with Borland Pascal.</p>
-<h3 id="section-9.1">9.1 Producing <code>.EXE</code> Files</h3>
-<p>Any large program written under DOS needs to be built as a
-<code>.EXE</code> file: only <code>.EXE</code> files have the necessary
-internal structure required to span more than one 64K segment. Windows
-programs, also, have to be built as <code>.EXE</code> files, since Windows
-does not support the <code>.COM</code> format.</p>
-<p>In general, you generate <code>.EXE</code> files by using the
-<code>obj</code> output format to produce one or more <code>.obj</code>
-files, and then linking them together using a linker. However, NASM also
-supports the direct generation of simple DOS <code>.EXE</code> files using
-the <code>bin</code> output format (by using <code>DB</code> and
-<code>DW</code> to construct the <code>.EXE</code> file header), and a
-macro package is supplied to do this. Thanks to Yann Guidon for
-contributing the code for this.</p>
-<p>NASM may also support <code>.EXE</code> natively as another output
-format in future releases.</p>
-<h4 id="section-9.1.1">9.1.1 Using the <code>obj</code> Format To Generate <code>.EXE</code> Files</h4>
-<p>This section describes the usual method of generating <code>.EXE</code>
-files by linking <code>.OBJ</code> files together.</p>
-<p>Most 16-bit programming language packages come with a suitable linker;
-if you have none of these, there is a free linker called VAL, available in
-<code>LZH</code> archive format from
-<a href="ftp://x2ftp.oulu.fi/pub/msdos/programming/lang/"><code>x2ftp.oulu.fi</code></a>.
-An LZH archiver can be found at
-<a href="ftp://ftp.simtel.net/pub/simtelnet/msdos/arcers"><code>ftp.simtel.net</code></a>.
-There is another `free' linker (though this one doesn't come with sources)
-called FREELINK, available from
-<a href="http://www.pcorner.com/tpc/old/3-101.html"><code>www.pcorner.com</code></a>.
-A third, <code>djlink</code>, written by DJ Delorie, is available at
-<a href="http://www.delorie.com/djgpp/16bit/djlink/"><code>www.delorie.com</code></a>.
-A fourth linker, <code>ALINK</code>, written by Anthony A.J. Williams, is
-available at
-<a href="http://alink.sourceforge.net"><code>alink.sourceforge.net</code></a>.</p>
-<p>When linking several <code>.OBJ</code> files into a <code>.EXE</code>
-file, you should ensure that exactly one of them has a start point defined
-(using the <code>..start</code> special symbol defined by the
-<code>obj</code> format: see <a href="nasmdoc8.html#section-8.4.6">section
-8.4.6</a>). If no module defines a start point, the linker will not know
-what value to give the entry-point field in the output file header; if more
-than one defines a start point, the linker will not know <em>which</em>
-value to use.</p>
-<p>An example of a NASM source file which can be assembled to a
-<code>.OBJ</code> file and linked on its own to a <code>.EXE</code> is
-given here. It demonstrates the basic principles of defining a stack,
-initialising the segment registers, and declaring a start point. This file
-is also provided in the <code>test</code> subdirectory of the NASM
-archives, under the name <code>objexe.asm</code>.</p>
-<pre>
-segment code 
-
-..start: 
-        mov     ax,data 
-        mov     ds,ax 
-        mov     ax,stack 
-        mov     ss,ax 
-        mov     sp,stacktop
-</pre>
-<p>This initial piece of code sets up <code>DS</code> to point to the data
-segment, and initializes <code>SS</code> and <code>SP</code> to point to
-the top of the provided stack. Notice that interrupts are implicitly
-disabled for one instruction after a move into <code>SS</code>, precisely
-for this situation, so that there's no chance of an interrupt occurring
-between the loads of <code>SS</code> and <code>SP</code> and not having a
-stack to execute on.</p>
-<p>Note also that the special symbol <code>..start</code> is defined at the
-beginning of this code, which means that will be the entry point into the
-resulting executable file.</p>
-<pre>
-        mov     dx,hello 
-        mov     ah,9 
-        int     0x21
-</pre>
-<p>The above is the main program: load <code>DS:DX</code> with a pointer to
-the greeting message (<code>hello</code> is implicitly relative to the
-segment <code>data</code>, which was loaded into <code>DS</code> in the
-setup code, so the full pointer is valid), and call the DOS print-string
-function.</p>
-<pre>
-        mov     ax,0x4c00 
-        int     0x21
-</pre>
-<p>This terminates the program using another DOS system call.</p>
-<pre>
-segment data 
-
-hello:  db      'hello, world', 13, 10, '$'
-</pre>
-<p>The data segment contains the string we want to display.</p>
-<pre>
-segment stack stack 
-        resb 64 
-stacktop:
-</pre>
-<p>The above code declares a stack segment containing 64 bytes of
-uninitialized stack space, and points <code>stacktop</code> at the top of
-it. The directive <code>segment stack stack</code> defines a segment
-<em>called</em> <code>stack</code>, and also of <em>type</em>
-<code>STACK</code>. The latter is not necessary to the correct running of
-the program, but linkers are likely to issue warnings or errors if your
-program has no segment of type <code>STACK</code>.</p>
-<p>The above file, when assembled into a <code>.OBJ</code> file, will link
-on its own to a valid <code>.EXE</code> file, which when run will print
-`hello, world' and then exit.</p>
-<h4 id="section-9.1.2">9.1.2 Using the <code>bin</code> Format To Generate <code>.EXE</code> Files</h4>
-<p>The <code>.EXE</code> file format is simple enough that it's possible to
-build a <code>.EXE</code> file by writing a pure-binary program and
-sticking a 32-byte header on the front. This header is simple enough that
-it can be generated using <code>DB</code> and <code>DW</code> commands by
-NASM itself, so that you can use the <code>bin</code> output format to
-directly generate <code>.EXE</code> files.</p>
-<p>Included in the NASM archives, in the <code>misc</code> subdirectory, is
-a file <code>exebin.mac</code> of macros. It defines three macros:
-<code>EXE_begin</code>, <code>EXE_stack</code> and <code>EXE_end</code>.</p>
-<p>To produce a <code>.EXE</code> file using this method, you should start
-by using <code>%include</code> to load the <code>exebin.mac</code> macro
-package into your source file. You should then issue the
-<code>EXE_begin</code> macro call (which takes no arguments) to generate
-the file header data. Then write code as normal for the <code>bin</code>
-format &ndash; you can use all three standard sections <code>.text</code>,
-<code>.data</code> and <code>.bss</code>. At the end of the file you should
-call the <code>EXE_end</code> macro (again, no arguments), which defines
-some symbols to mark section sizes, and these symbols are referred to in
-the header code generated by <code>EXE_begin</code>.</p>
-<p>In this model, the code you end up writing starts at <code>0x100</code>,
-just like a <code>.COM</code> file &ndash; in fact, if you strip off the
-32-byte header from the resulting <code>.EXE</code> file, you will have a
-valid <code>.COM</code> program. All the segment bases are the same, so you
-are limited to a 64K program, again just like a <code>.COM</code> file.
-Note that an <code>ORG</code> directive is issued by the
-<code>EXE_begin</code> macro, so you should not explicitly issue one of
-your own.</p>
-<p>You can't directly refer to your segment base value, unfortunately,
-since this would require a relocation in the header, and things would get a
-lot more complicated. So you should get your segment base by copying it out
-of <code>CS</code> instead.</p>
-<p>On entry to your <code>.EXE</code> file, <code>SS:SP</code> are already
-set up to point to the top of a 2Kb stack. You can adjust the default stack
-size of 2Kb by calling the <code>EXE_stack</code> macro. For example, to
-change the stack size of your program to 64 bytes, you would call
-<code>EXE_stack 64</code>.</p>
-<p>A sample program which generates a <code>.EXE</code> file in this way is
-given in the <code>test</code> subdirectory of the NASM archive, as
-<code>binexe.asm</code>.</p>
-<h3 id="section-9.2">9.2 Producing <code>.COM</code> Files</h3>
-<p>While large DOS programs must be written as <code>.EXE</code> files,
-small ones are often better written as <code>.COM</code> files.
-<code>.COM</code> files are pure binary, and therefore most easily produced
-using the <code>bin</code> output format.</p>
-<h4 id="section-9.2.1">9.2.1 Using the <code>bin</code> Format To Generate <code>.COM</code> Files</h4>
-<p><code>.COM</code> files expect to be loaded at offset <code>100h</code>
-into their segment (though the segment may change). Execution then begins
-at <code>100h</code>, i.e. right at the start of the program. So to write a
-<code>.COM</code> program, you would create a source file looking like</p>
-<pre>
-        org 100h 
-
-section .text 
-
-start: 
-        ; put your code here 
-
-section .data 
-
-        ; put data items here 
-
-section .bss 
-
-        ; put uninitialized data here
-</pre>
-<p>The <code>bin</code> format puts the <code>.text</code> section first in
-the file, so you can declare data or BSS items before beginning to write
-code if you want to and the code will still end up at the front of the file
-where it belongs.</p>
-<p>The BSS (uninitialized data) section does not take up space in the
-<code>.COM</code> file itself: instead, addresses of BSS items are resolved
-to point at space beyond the end of the file, on the grounds that this will
-be free memory when the program is run. Therefore you should not rely on
-your BSS being initialized to all zeros when you run.</p>
-<p>To assemble the above program, you should use a command line like</p>
-<pre>
-nasm myprog.asm -fbin -o myprog.com
-</pre>
-<p>The <code>bin</code> format would produce a file called
-<code>myprog</code> if no explicit output file name were specified, so you
-have to override it and give the desired file name.</p>
-<h4 id="section-9.2.2">9.2.2 Using the <code>obj</code> Format To Generate <code>.COM</code> Files</h4>
-<p>If you are writing a <code>.COM</code> program as more than one module,
-you may wish to assemble several <code>.OBJ</code> files and link them
-together into a <code>.COM</code> program. You can do this, provided you
-have a linker capable of outputting <code>.COM</code> files directly (TLINK
-does this), or alternatively a converter program such as
-<code>EXE2BIN</code> to transform the <code>.EXE</code> file output from
-the linker into a <code>.COM</code> file.</p>
-<p>If you do this, you need to take care of several things:</p>
-<ul>
-<li>
-<p>The first object file containing code should start its code segment with
-a line like <code>RESB 100h</code>. This is to ensure that the code begins
-at offset <code>100h</code> relative to the beginning of the code segment,
-so that the linker or converter program does not have to adjust address
-references within the file when generating the <code>.COM</code> file.
-Other assemblers use an <code>ORG</code> directive for this purpose, but
-<code>ORG</code> in NASM is a format-specific directive to the
-<code>bin</code> output format, and does not mean the same thing as it does
-in MASM-compatible assemblers.</p>
-</li>
-<li>
-<p>You don't need to define a stack segment.</p>
-</li>
-<li>
-<p>All your segments should be in the same group, so that every time your
-code or data references a symbol offset, all offsets are relative to the
-same segment base. This is because, when a <code>.COM</code> file is
-loaded, all the segment registers contain the same value.</p>
-</li>
-</ul>
-<h3 id="section-9.3">9.3 Producing <code>.SYS</code> Files</h3>
-<p>MS-DOS device drivers &ndash; <code>.SYS</code> files &ndash; are pure
-binary files, similar to <code>.COM</code> files, except that they start at
-origin zero rather than <code>100h</code>. Therefore, if you are writing a
-device driver using the <code>bin</code> format, you do not need the
-<code>ORG</code> directive, since the default origin for <code>bin</code>
-is zero. Similarly, if you are using <code>obj</code>, you do not need the
-<code>RESB 100h</code> at the start of your code segment.</p>
-<p><code>.SYS</code> files start with a header structure, containing
-pointers to the various routines inside the driver which do the work. This
-structure should be defined at the start of the code segment, even though
-it is not actually code.</p>
-<p>For more information on the format of <code>.SYS</code> files, and the
-data which has to go in the header structure, a list of books is given in
-the Frequently Asked Questions list for the newsgroup
-<a href="news:comp.os.msdos.programmer"><code>comp.os.msdos.programmer</code></a>.</p>
-<h3 id="section-9.4">9.4 Interfacing to 16-bit C Programs</h3>
-<p>This section covers the basics of writing assembly routines that call,
-or are called from, C programs. To do this, you would typically write an
-assembly module as a <code>.OBJ</code> file, and link it with your C
-modules to produce a mixed-language program.</p>
-<h4 id="section-9.4.1">9.4.1 External Symbol Names</h4>
-<p>C compilers have the convention that the names of all global symbols
-(functions or data) they define are formed by prefixing an underscore to
-the name as it appears in the C program. So, for example, the function a C
-programmer thinks of as <code>printf</code> appears to an assembly language
-programmer as <code>_printf</code>. This means that in your assembly
-programs, you can define symbols without a leading underscore, and not have
-to worry about name clashes with C symbols.</p>
-<p>If you find the underscores inconvenient, you can define macros to
-replace the <code>GLOBAL</code> and <code>EXTERN</code> directives as
-follows:</p>
-<pre>
-%macro  cglobal 1 
-
-  global  _%1 
-  %define %1 _%1 
-
-%endmacro 
-
-%macro  cextern 1 
-
-  extern  _%1 
-  %define %1 _%1 
-
-%endmacro
-</pre>
-<p>(These forms of the macros only take one argument at a time; a
-<code>%rep</code> construct could solve this.)</p>
-<p>If you then declare an external like this:</p>
-<pre>
-cextern printf
-</pre>
-<p>then the macro will expand it as</p>
-<pre>
-extern  _printf 
-%define printf _printf
-</pre>
-<p>Thereafter, you can reference <code>printf</code> as if it was a symbol,
-and the preprocessor will put the leading underscore on where necessary.</p>
-<p>The <code>cglobal</code> macro works similarly. You must use
-<code>cglobal</code> before defining the symbol in question, but you would
-have had to do that anyway if you used <code>GLOBAL</code>.</p>
-<p>Also see <a href="nasmdoc2.html#section-2.1.28">section 2.1.28</a>.</p>
-<h4 id="section-9.4.2">9.4.2 Memory Models</h4>
-<p>NASM contains no mechanism to support the various C memory models
-directly; you have to keep track yourself of which one you are writing for.
-This means you have to keep track of the following things:</p>
-<ul>
-<li>
-<p>In models using a single code segment (tiny, small and compact),
-functions are near. This means that function pointers, when stored in data
-segments or pushed on the stack as function arguments, are 16 bits long and
-contain only an offset field (the <code>CS</code> register never changes
-its value, and always gives the segment part of the full function address),
-and that functions are called using ordinary near <code>CALL</code>
-instructions and return using <code>RETN</code> (which, in NASM, is
-synonymous with <code>RET</code> anyway). This means both that you should
-write your own routines to return with <code>RETN</code>, and that you
-should call external C routines with near <code>CALL</code> instructions.</p>
-</li>
-<li>
-<p>In models using more than one code segment (medium, large and huge),
-functions are far. This means that function pointers are 32 bits long
-(consisting of a 16-bit offset followed by a 16-bit segment), and that
-functions are called using <code>CALL FAR</code> (or
-<code>CALL seg:offset</code>) and return using <code>RETF</code>. Again,
-you should therefore write your own routines to return with
-<code>RETF</code> and use <code>CALL FAR</code> to call external routines.</p>
-</li>
-<li>
-<p>In models using a single data segment (tiny, small and medium), data
-pointers are 16 bits long, containing only an offset field (the
-<code>DS</code> register doesn't change its value, and always gives the
-segment part of the full data item address).</p>
-</li>
-<li>
-<p>In models using more than one data segment (compact, large and huge),
-data pointers are 32 bits long, consisting of a 16-bit offset followed by a
-16-bit segment. You should still be careful not to modify <code>DS</code>
-in your routines without restoring it afterwards, but <code>ES</code> is
-free for you to use to access the contents of 32-bit data pointers you are
-passed.</p>
-</li>
-<li>
-<p>The huge memory model allows single data items to exceed 64K in size. In
-all other memory models, you can access the whole of a data item just by
-doing arithmetic on the offset field of the pointer you are given, whether
-a segment field is present or not; in huge model, you have to be more
-careful of your pointer arithmetic.</p>
-</li>
-<li>
-<p>In most memory models, there is a <em>default</em> data segment, whose
-segment address is kept in <code>DS</code> throughout the program. This
-data segment is typically the same segment as the stack, kept in
-<code>SS</code>, so that functions' local variables (which are stored on
-the stack) and global data items can both be accessed easily without
-changing <code>DS</code>. Particularly large data items are typically
-stored in other segments. However, some memory models (though not the
-standard ones, usually) allow the assumption that <code>SS</code> and
-<code>DS</code> hold the same value to be removed. Be careful about
-functions' local variables in this latter case.</p>
-</li>
-</ul>
-<p>In models with a single code segment, the segment is called
-<code>_TEXT</code>, so your code segment must also go by this name in order
-to be linked into the same place as the main code segment. In models with a
-single data segment, or with a default data segment, it is called
-<code>_DATA</code>.</p>
-<h4 id="section-9.4.3">9.4.3 Function Definitions and Function Calls</h4>
-<p>The C calling convention in 16-bit programs is as follows. In the
-following description, the words <em>caller</em> and <em>callee</em> are
-used to denote the function doing the calling and the function which gets
-called.</p>
-<ul>
-<li>
-<p>The caller pushes the function's parameters on the stack, one after
-another, in reverse order (right to left, so that the first argument
-specified to the function is pushed last).</p>
-</li>
-<li>
-<p>The caller then executes a <code>CALL</code> instruction to pass control
-to the callee. This <code>CALL</code> is either near or far depending on
-the memory model.</p>
-</li>
-<li>
-<p>The callee receives control, and typically (although this is not
-actually necessary, in functions which do not need to access their
-parameters) starts by saving the value of <code>SP</code> in
-<code>BP</code> so as to be able to use <code>BP</code> as a base pointer
-to find its parameters on the stack. However, the caller was probably doing
-this too, so part of the calling convention states that <code>BP</code>
-must be preserved by any C function. Hence the callee, if it is going to
-set up <code>BP</code> as a <em>frame pointer</em>, must push the previous
-value first.</p>
-</li>
-<li>
-<p>The callee may then access its parameters relative to <code>BP</code>.
-The word at <code>BP</code> holds the previous value of <code>BP</code>
-as it was pushed; the next word, at <code>BP+2</code>, holds the offset
-part of the return address, pushed implicitly by <code>CALL</code>. In a
-small-model (near) function, the parameters start after that, at
-<code>BP+4</code>; in a large-model (far) function, the segment part of
-the return address lives at <code>BP+4</code>, and the parameters begin
-at <code>BP+6</code>. The leftmost parameter of the function, since it
-was pushed last, is accessible at this offset from <code>BP</code>; the
-others follow, at successively greater offsets. Thus, in a function such as
-<code>printf</code> which takes a variable number of parameters, the
-pushing of the parameters in reverse order means that the function knows
-where to find its first parameter, which tells it the number and type of
-the remaining ones.</p>
-</li>
-<li>
-<p>The callee may also wish to decrease <code>SP</code> further, so as to
-allocate space on the stack for local variables, which will then be
-accessible at negative offsets from <code>BP</code>.</p>
-</li>
-<li>
-<p>The callee, if it wishes to return a value to the caller, should leave
-the value in <code>AL</code>, <code>AX</code> or <code>DX:AX</code>
-depending on the size of the value. Floating-point results are sometimes
-(depending on the compiler) returned in <code>ST0</code>.</p>
-</li>
-<li>
-<p>Once the callee has finished processing, it restores <code>SP</code>
-from <code>BP</code> if it had allocated local stack space, then pops the
-previous value of <code>BP</code>, and returns via <code>RETN</code> or
-<code>RETF</code> depending on memory model.</p>
-</li>
-<li>
-<p>When the caller regains control from the callee, the function parameters
-are still on the stack, so it typically adds an immediate constant to
-<code>SP</code> to remove them (instead of executing a number of slow
-<code>POP</code> instructions). Thus, if a function is accidentally called
-with the wrong number of parameters due to a prototype mismatch, the stack
-will still be returned to a sensible state since the caller, which
-<em>knows</em> how many parameters it pushed, does the removing.</p>
-</li>
-</ul>
-<p>It is instructive to compare this calling convention with that for
-Pascal programs (described in <a href="#section-9.5.1">section 9.5.1</a>).
-Pascal has a simpler convention, since no functions have variable numbers
-of parameters. Therefore the callee knows how many parameters it should
-have been passed, and is able to deallocate them from the stack itself by
-passing an immediate argument to the <code>RET</code> or <code>RETF</code>
-instruction, so the caller does not have to do it. Also, the parameters are
-pushed in left-to-right order, not right-to-left, which means that a
-compiler can give better guarantees about sequence points without
-performance suffering.</p>
-<p>Thus, you would define a function in C style in the following way. The
-following example is for small model:</p>
-<pre>
-global  _myfunc 
-
-_myfunc: 
-        push    bp 
-        mov     bp,sp 
-        sub     sp,0x40         ; 64 bytes of local stack space 
-        mov     bx,bp+4       ; first parameter to function 
-
-        ; some more code 
-
-        mov     sp,bp           ; undo "sub sp,0x40" above 
-        pop     bp 
-        ret
-</pre>
-<p>For a large-model function, you would replace <code>RET</code> by
-<code>RETF</code>, and look for the first parameter at <code>BP+6</code>
-instead of <code>BP+4</code>. Of course, if one of the parameters is a
-pointer, then the offsets of <em>subsequent</em> parameters will change
-depending on the memory model as well: far pointers take up four bytes on
-the stack when passed as a parameter, whereas near pointers take up two.</p>
-<p>At the other end of the process, to call a C function from your assembly
-code, you would do something like this:</p>
-<pre>
-extern  _printf 
-
-      ; and then, further down... 
-
-      push    word myint        ; one of my integer variables 
-      push    word mystring       ; pointer into my data segment 
-      call    _printf 
-      add     sp,byte 4           ; `byte' saves space 
-
-      ; then those data items... 
-
-segment _DATA 
-
-myint         dw    1234 
-mystring      db    'This number -&gt; %d &lt;- should be 1234',10,0
-</pre>
-<p>This piece of code is the small-model assembly equivalent of the C code</p>
-<pre>
-    int myint = 1234; 
-    printf("This number -&gt; %d &lt;- should be 1234\n", myint);
-</pre>
-<p>In large model, the function-call code might look more like this. In
-this example, it is assumed that <code>DS</code> already holds the segment
-base of the segment <code>_DATA</code>. If not, you would have to
-initialize it first.</p>
-<pre>
-      push    word myint 
-      push    word seg mystring   ; Now push the segment, and... 
-      push    word mystring       ; ... offset of "mystring" 
-      call    far _printf 
-      add    sp,byte 6
-</pre>
-<p>The integer value still takes up one word on the stack, since large
-model does not affect the size of the <code>int</code> data type. The first
-argument (pushed last) to <code>printf</code>, however, is a data pointer,
-and therefore has to contain a segment and offset part. The segment should
-be stored second in memory, and therefore must be pushed first. (Of course,
-<code>PUSH DS</code> would have been a shorter instruction than
-<code>PUSH WORD SEG mystring</code>, if <code>DS</code> was set up as the
-above example assumed.) Then the actual call becomes a far call, since
-functions expect far calls in large model; and <code>SP</code> has to be
-increased by 6 rather than 4 afterwards to make up for the extra word of
-parameters.</p>
-<h4 id="section-9.4.4">9.4.4 Accessing Data Items</h4>
-<p>To get at the contents of C variables, or to declare variables which C
-can access, you need only declare the names as <code>GLOBAL</code> or
-<code>EXTERN</code>. (Again, the names require leading underscores, as
-stated in <a href="#section-9.4.1">section 9.4.1</a>.) Thus, a C variable
-declared as <code>int i</code> can be accessed from assembler as</p>
-<pre>
-extern _i 
-
-        mov ax,_i
-</pre>
-<p>And to declare your own integer variable which C programs can access as
-<code>extern int j</code>, you do this (making sure you are assembling in
-the <code>_DATA</code> segment, if necessary):</p>
-<pre>
-global  _j 
-
-_j      dw      0
-</pre>
-<p>To access a C array, you need to know the size of the components of the
-array. For example, <code>int</code> variables are two bytes long, so if a
-C program declares an array as <code>int a10</code>, you can access
-<code>a3</code> by coding <code>mov ax,_a+6</code>. (The byte offset 6
-is obtained by multiplying the desired array index, 3, by the size of the
-array element, 2.) The sizes of the C base types in 16-bit compilers are: 1
-for <code>char</code>, 2 for <code>short</code> and <code>int</code>, 4 for
-<code>long</code> and <code>float</code>, and 8 for <code>double</code>.</p>
-<p>To access a C data structure, you need to know the offset from the base
-of the structure to the field you are interested in. You can either do this
-by converting the C structure definition into a NASM structure definition
-(using <code>STRUC</code>), or by calculating the one offset and using just
-that.</p>
-<p>To do either of these, you should read your C compiler's manual to find
-out how it organizes data structures. NASM gives no special alignment to
-structure members in its own <code>STRUC</code> macro, so you have to
-specify alignment yourself if the C compiler generates it. Typically, you
-might find that a structure like</p>
-<pre>
-struct { 
-    char c; 
-    int i; 
-} foo;
-</pre>
-<p>might be four bytes long rather than three, since the <code>int</code>
-field would be aligned to a two-byte boundary. However, this sort of
-feature tends to be a configurable option in the C compiler, either using
-command-line options or <code>#pragma</code> lines, so you have to find out
-how your own compiler does it.</p>
-<h4 id="section-9.4.5">9.4.5 <code>c16.mac</code>: Helper Macros for the 16-bit C Interface</h4>
-<p>Included in the NASM archives, in the <code>misc</code> directory, is a
-file <code>c16.mac</code> of macros. It defines three macros:
-<code>proc</code>, <code>arg</code> and <code>endproc</code>. These are
-intended to be used for C-style procedure definitions, and they automate a
-lot of the work involved in keeping track of the calling convention.</p>
-<p>(An alternative, TASM compatible form of <code>arg</code> is also now
-built into NASM's preprocessor. See
-<a href="nasmdoc4.html#section-4.10">section 4.10</a> for details.)</p>
-<p>An example of an assembly function using the macro set is given here:</p>
-<pre>
-proc    _nearproc 
-
-%$i     arg 
-%$j     arg 
-        mov     ax,bp + %$i 
-        mov     bx,bp + %$j 
-        add     ax,bx 
-
-endproc
-</pre>
-<p>This defines <code>_nearproc</code> to be a procedure taking two
-arguments, the first (<code>i</code>) an integer and the second
-(<code>j</code>) a pointer to an integer. It returns <code>i + *j</code>.</p>
-<p>Note that the <code>arg</code> macro has an <code>EQU</code> as the
-first line of its expansion, and since the label before the macro call gets
-prepended to the first line of the expanded macro, the <code>EQU</code>
-works, defining <code>%$i</code> to be an offset from <code>BP</code>. A
-context-local variable is used, local to the context pushed by the
-<code>proc</code> macro and popped by the <code>endproc</code> macro, so
-that the same argument name can be used in later procedures. Of course, you
-don't <em>have</em> to do that.</p>
-<p>The macro set produces code for near functions (tiny, small and
-compact-model code) by default. You can have it generate far functions
-(medium, large and huge-model code) by means of coding
-<code>%define FARCODE</code>. This changes the kind of return instruction
-generated by <code>endproc</code>, and also changes the starting point for
-the argument offsets. The macro set contains no intrinsic dependency on
-whether data pointers are far or not.</p>
-<p><code>arg</code> can take an optional parameter, giving the size of the
-argument. If no size is given, 2 is assumed, since it is likely that many
-function parameters will be of type <code>int</code>.</p>
-<p>The large-model equivalent of the above function would look like this:</p>
-<pre>
-%define FARCODE 
-
-proc    _farproc 
-
-%$i     arg 
-%$j     arg     4 
-        mov     ax,bp + %$i 
-        mov     bx,bp + %$j 
-        mov     es,bp + %$j + 2 
-        add     ax,bx 
-
-endproc
-</pre>
-<p>This makes use of the argument to the <code>arg</code> macro to define a
-parameter of size 4, because <code>j</code> is now a far pointer. When we
-load from <code>j</code>, we must load a segment and an offset.</p>
-<h3 id="section-9.5">9.5 Interfacing to Borland Pascal Programs</h3>
-<p>Interfacing to Borland Pascal programs is similar in concept to
-interfacing to 16-bit C programs. The differences are:</p>
-<ul>
-<li>
-<p>The leading underscore required for interfacing to C programs is not
-required for Pascal.</p>
-</li>
-<li>
-<p>The memory model is always large: functions are far, data pointers are
-far, and no data item can be more than 64K long. (Actually, some functions
-are near, but only those functions that are local to a Pascal unit and
-never called from outside it. All assembly functions that Pascal calls, and
-all Pascal functions that assembly routines are able to call, are far.)
-However, all static data declared in a Pascal program goes into the default
-data segment, which is the one whose segment address will be in
-<code>DS</code> when control is passed to your assembly code. The only
-things that do not live in the default data segment are local variables
-(they live in the stack segment) and dynamically allocated variables. All
-data <em>pointers</em>, however, are far.</p>
-</li>
-<li>
-<p>The function calling convention is different &ndash; described below.</p>
-</li>
-<li>
-<p>Some data types, such as strings, are stored differently.</p>
-</li>
-<li>
-<p>There are restrictions on the segment names you are allowed to use
-&ndash; Borland Pascal will ignore code or data declared in a segment it
-doesn't like the name of. The restrictions are described below.</p>
-</li>
-</ul>
-<h4 id="section-9.5.1">9.5.1 The Pascal Calling Convention</h4>
-<p>The 16-bit Pascal calling convention is as follows. In the following
-description, the words <em>caller</em> and <em>callee</em> are used to
-denote the function doing the calling and the function which gets called.</p>
-<ul>
-<li>
-<p>The caller pushes the function's parameters on the stack, one after
-another, in normal order (left to right, so that the first argument
-specified to the function is pushed first).</p>
-</li>
-<li>
-<p>The caller then executes a far <code>CALL</code> instruction to pass
-control to the callee.</p>
-</li>
-<li>
-<p>The callee receives control, and typically (although this is not
-actually necessary, in functions which do not need to access their
-parameters) starts by saving the value of <code>SP</code> in
-<code>BP</code> so as to be able to use <code>BP</code> as a base pointer
-to find its parameters on the stack. However, the caller was probably doing
-this too, so part of the calling convention states that <code>BP</code>
-must be preserved by any function. Hence the callee, if it is going to set
-up <code>BP</code> as a frame pointer, must push the previous value first.</p>
-</li>
-<li>
-<p>The callee may then access its parameters relative to <code>BP</code>.
-The word at <code>BP</code> holds the previous value of <code>BP</code>
-as it was pushed. The next word, at <code>BP+2</code>, holds the offset
-part of the return address, and the next one at <code>BP+4</code> the
-segment part. The parameters begin at <code>BP+6</code>. The rightmost
-parameter of the function, since it was pushed last, is accessible at this
-offset from <code>BP</code>; the others follow, at successively greater
-offsets.</p>
-</li>
-<li>
-<p>The callee may also wish to decrease <code>SP</code> further, so as to
-allocate space on the stack for local variables, which will then be
-accessible at negative offsets from <code>BP</code>.</p>
-</li>
-<li>
-<p>The callee, if it wishes to return a value to the caller, should leave
-the value in <code>AL</code>, <code>AX</code> or <code>DX:AX</code>
-depending on the size of the value. Floating-point results are returned in
-<code>ST0</code>. Results of type <code>Real</code> (Borland's own custom
-floating-point data type, not handled directly by the FPU) are returned in
-<code>DX:BX:AX</code>. To return a result of type <code>String</code>, the
-caller pushes a pointer to a temporary string before pushing the
-parameters, and the callee places the returned string value at that
-location. The pointer is not a parameter, and should not be removed from
-the stack by the <code>RETF</code> instruction.</p>
-</li>
-<li>
-<p>Once the callee has finished processing, it restores <code>SP</code>
-from <code>BP</code> if it had allocated local stack space, then pops the
-previous value of <code>BP</code>, and returns via <code>RETF</code>. It
-uses the form of <code>RETF</code> with an immediate parameter, giving the
-number of bytes taken up by the parameters on the stack. This causes the
-parameters to be removed from the stack as a side effect of the return
-instruction.</p>
-</li>
-<li>
-<p>When the caller regains control from the callee, the function parameters
-have already been removed from the stack, so it needs to do nothing
-further.</p>
-</li>
-</ul>
-<p>Thus, you would define a function in Pascal style, taking two
-<code>Integer</code>&ndash;type parameters, in the following way:</p>
-<pre>
-global  myfunc 
-
-myfunc: push    bp 
-        mov     bp,sp 
-        sub     sp,0x40         ; 64 bytes of local stack space 
-        mov     bx,bp+8       ; first parameter to function 
-        mov     bx,bp+6       ; second parameter to function 
-
-        ; some more code 
-
-        mov     sp,bp           ; undo "sub sp,0x40" above 
-        pop     bp 
-        retf    4               ; total size of params is 4
-</pre>
-<p>At the other end of the process, to call a Pascal function from your
-assembly code, you would do something like this:</p>
-<pre>
-extern  SomeFunc 
-
-       ; and then, further down... 
-
-       push   word seg mystring   ; Now push the segment, and... 
-       push   word mystring       ; ... offset of "mystring" 
-       push   word myint        ; one of my variables 
-       call   far SomeFunc
-</pre>
-<p>This is equivalent to the Pascal code</p>
-<pre>
-procedure SomeFunc(String: PChar; Int: Integer); 
-    SomeFunc(@mystring, myint);
-</pre>
-<h4 id="section-9.5.2">9.5.2 Borland Pascal Segment Name Restrictions</h4>
-<p>Since Borland Pascal's internal unit file format is completely different
-from <code>OBJ</code>, it only makes a very sketchy job of actually reading
-and understanding the various information contained in a real
-<code>OBJ</code> file when it links that in. Therefore an object file
-intended to be linked to a Pascal program must obey a number of
-restrictions:</p>
-<ul>
-<li>
-<p>Procedures and functions must be in a segment whose name is either
-<code>CODE</code>, <code>CSEG</code>, or something ending in
-<code>_TEXT</code>.</p>
-</li>
-<li>
-<p>initialized data must be in a segment whose name is either
-<code>CONST</code> or something ending in <code>_DATA</code>.</p>
-</li>
-<li>
-<p>Uninitialized data must be in a segment whose name is either
-<code>DATA</code>, <code>DSEG</code>, or something ending in
-<code>_BSS</code>.</p>
-</li>
-<li>
-<p>Any other segments in the object file are completely ignored.
-<code>GROUP</code> directives and segment attributes are also ignored.</p>
-</li>
-</ul>
-<h4 id="section-9.5.3">9.5.3 Using <code>c16.mac</code> With Pascal Programs</h4>
-<p>The <code>c16.mac</code> macro package, described in
-<a href="#section-9.4.5">section 9.4.5</a>, can also be used to simplify
-writing functions to be called from Pascal programs, if you code
-<code>%define PASCAL</code>. This definition ensures that functions are far
-(it implies <code>FARCODE</code>), and also causes procedure return
-instructions to be generated with an operand.</p>
-<p>Defining <code>PASCAL</code> does not change the code which calculates
-the argument offsets; you must declare your function's arguments in reverse
-order. For example:</p>
-<pre>
-%define PASCAL 
-
-proc    _pascalproc 
-
-%$j     arg 4 
-%$i     arg 
-        mov     ax,bp + %$i 
-        mov     bx,bp + %$j 
-        mov     es,bp + %$j + 2 
-        add     ax,bx 
-
-endproc
-</pre>
-<p>This defines the same routine, conceptually, as the example in
-<a href="#section-9.4.5">section 9.4.5</a>: it defines a function taking
-two arguments, an integer and a pointer to an integer, which returns the
-sum of the integer and the contents of the pointer. The only difference
-between this code and the large-model C version is that <code>PASCAL</code>
-is defined instead of <code>FARCODE</code>, and that the arguments are
-declared in reverse order.</p>
-</div>
-</body>
-</html>

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@@ -1,615 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.1//EN" "http://www.w3.org/TR/xhtml11/DTD/xhtml11.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<meta charset="UTF-8" />
-<title>NASM - The Netwide Assembler</title>
-<link href="nasmdoc.css" rel="stylesheet" type="text/css" />
-<link href="local.css" rel="stylesheet" type="text/css" />
-</head>
-<body>
-<ul class="navbar">
-<li class="first"><a class="prev" href="nasmdo13.html">Chapter 13</a></li>
-<li><a class="next" href="nasmdocb.html">Appendix B</a></li>
-<li><a class="toc" href="nasmdoc0.html">Contents</a></li>
-<li class="last"><a class="index" href="nasmdoci.html">Index</a></li>
-</ul>
-<div class="title">
-<h1>NASM - The Netwide Assembler</h1>
-<span class="subtitle">version 2.16.01</span>
-</div>
-<div class="contents"
->
-<h2 id="appendix-A">Appendix A: List of Warning Classes</h2>
-<p>These are the warning classes currently defined by NASM for the purpose
-of enabling, disabling and promoting to error. See
-<a href="nasmdoc2.html#section-2.1.26">section 2.1.26</a> and
-<a href="nasmdoc7.html#section-7.13">section 7.13</a>.</p>
-<ul>
-<li>
-<p> <code>all</code>: all possible warnings</p>
-<p><code>all</code> is an group alias for <em>all</em> warning classes.
-Thus, <code>-w+all</code> enables all available warnings, and
-<code>-w-all</code> disables warnings entirely (since NASM 2.13).</p>
-</li>
-<li>
-<p> <code>bad-pragma</code>: malformed %pragma</p>
-<p><code>bad-pragma</code> is a backwards compatibility alias for
-<code>pragma-bad</code>.</p>
-</li>
-<li>
-<p> <code>bnd</code>: invalid BND prefix</p>
-<p><code>bnd</code> is a backwards compatibility alias for
-<code>prefix-bnd</code>.</p>
-</li>
-<li>
-<p> <code>db-empty</code>: no operand for data declaration</p>
-<p><code>db-empty</code> warns about a <code>DB</code>, <code>DW</code>,
-etc declaration with no operands, producing no output. This is permitted,
-but often indicative of an error. See
-<a href="nasmdoc3.html#section-3.2.1">section 3.2.1</a>.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>ea</code>: all <code>ea-</code> warnings</p>
-<p><code>ea</code> is a group alias for all warning classes prefixed by
-<code>ea-</code>; currently <code>ea-absolute</code> and
-<code>ea-dispsize</code>.</p>
-</li>
-<li>
-<p> <code>ea-absolute</code>: absolute address cannot be RIP-relative</p>
-<p><code>ea-absolute</code> warns that an address that is inherently
-absolute cannot be generated with RIP-relative encoding using
-<code>REL</code>, see <a href="nasmdoc7.html#section-7.2.1">section
-7.2.1</a>.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>ea-dispsize</code>: displacement size ignored on absolute address</p>
-<p><code>ea-dispsize</code> warns that NASM does not support generating
-displacements for inherently absolute addresses that do not match the
-address size of the instruction.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>environment</code>: nonexistent environment variable</p>
-<p><code>environment</code> is a backwards compatibility alias for
-<code>pp-environment</code>.</p>
-</li>
-<li>
-<p> <code>float</code>: all <code>float-</code> warnings</p>
-<p><code>float</code> is a group alias for all warning classes prefixed by
-<code>float-</code>; currently <code>float-denorm</code>,
-<code>float-overflow</code>, <code>float-toolong</code>,
-<code>float-underflow</code>.</p>
-</li>
-<li>
-<p> <code>float-denorm</code>: floating point denormal</p>
-<p><code>float-denorm</code> warns about denormal floating point constants.</p>
-<p>Disabled by default.</p>
-</li>
-<li>
-<p> <code>float-overflow</code>: floating point overflow</p>
-<p><code>float-overflow</code> warns about floating point underflow.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>float-toolong</code>: too many digits in floating-point number</p>
-<p><code>float-toolong</code> warns about too many digits in floating-point
-numbers.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>float-underflow</code>: floating point underflow</p>
-<p><code>float-underflow</code> warns about floating point underflow (a
-nonzero constant rounded to zero.)</p>
-<p>Disabled by default.</p>
-</li>
-<li>
-<p> <code>forward</code>: forward reference may have unpredictable results</p>
-<p><code>forward</code> warns that a forward reference is used which may
-have unpredictable results, notably in a <code>RESB</code>&ndash;type
-pseudo-instruction. These would be <em>critical expressions</em> (see
-<a href="nasmdoc3.html#section-3.8">section 3.8</a>) but are permitted in a
-handful of cases for compatibility with older versions of NASM. This
-warning should be treated as a severe programming error as the code could
-break at any time for any number of reasons.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>hle</code>: invalid HLE prefix</p>
-<p><code>hle</code> is a backwards compatibility alias for
-<code>prefix-hle</code>.</p>
-</li>
-<li>
-<p> <code>label</code>: all <code>label-</code> warnings</p>
-<p><code>label</code> is a group alias for all warning classes prefixed by
-<code>label-</code>; currently <code>label-orphan</code>,
-<code>label-redef</code>, <code>label-redef-late</code>.</p>
-</li>
-<li>
-<p> <code>label-orphan</code>: labels alone on lines without trailing `:'</p>
-<p><code>label-orphan</code> warns about source lines which contain no
-instruction but define a label without a trailing colon. This is most
-likely indicative of a typo, but is technically correct NASM syntax (see
-<a href="nasmdoc3.html#section-3.1">section 3.1</a>.)</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>label-redef</code>: label redefined to an identical value</p>
-<p><code>label-redef</code> warns if a label is defined more than once, but
-the value is identical. It is an unconditional error to define the same
-label more than once to <em>different</em> values.</p>
-<p>Disabled by default.</p>
-</li>
-<li>
-<p> <code>label-redef-late</code>: label (re)defined during code generation</p>
-<p><code>label-redef-late</code> the value of a label changed during the
-final, code-generation pass. This may be the result of strange use of the
-preprocessor. This is very likely to produce incorrect code and may end up
-being an unconditional error in a future version of NASM.</p>
-<p>Enabled and promoted to error by default.</p>
-</li>
-<li>
-<p> <code>lock</code>: LOCK prefix on unlockable instructions</p>
-<p><code>lock</code> is a backwards compatibility alias for
-<code>prefix-lock</code>.</p>
-</li>
-<li>
-<p> <code>macro-def-case-single</code>: single-line macro defined both case
-sensitive and insensitive</p>
-<p><code>macro-def-case-single</code> is a backwards compatibility alias
-for <code>pp-macro-def-case-single</code>.</p>
-</li>
-<li>
-<p> <code>macro-def-greedy-single</code>: single-line macro</p>
-<p><code>macro-def-greedy-single</code> is a backwards compatibility alias
-for <code>pp-macro-def-greedy-single</code>.</p>
-</li>
-<li>
-<p> <code>macro-def-param-single</code>: single-line macro defined with and
-without parameters</p>
-<p><code>macro-def-param-single</code> is a backwards compatibility alias
-for <code>pp-macro-def-param-single</code>.</p>
-</li>
-<li>
-<p> <code>macro-defaults</code>: macros with more default than optional
-parameters</p>
-<p><code>macro-defaults</code> is a backwards compatibility alias for
-<code>pp-macro-defaults</code>.</p>
-</li>
-<li>
-<p> <code>macro-params-legacy</code>: improperly calling multi-line macro
-for legacy support</p>
-<p><code>macro-params-legacy</code> is a backwards compatibility alias for
-<code>pp-macro-params-legacy</code>.</p>
-</li>
-<li>
-<p> <code>macro-params-multi</code>: multi-line macro calls with wrong
-parameter count</p>
-<p><code>macro-params-multi</code> is a backwards compatibility alias for
-<code>pp-macro-params-multi</code>.</p>
-</li>
-<li>
-<p> <code>macro-params-single</code>: single-line macro calls with wrong
-parameter count</p>
-<p><code>macro-params-single</code> is a backwards compatibility alias for
-<code>pp-macro-params-single</code>.</p>
-</li>
-<li>
-<p> <code>negative-rep</code>: regative %rep count</p>
-<p><code>negative-rep</code> is a backwards compatibility alias for
-<code>pp-rep-negative</code>.</p>
-</li>
-<li>
-<p> <code>not-my-pragma</code>: %pragma not applicable to this compilation</p>
-<p><code>not-my-pragma</code> is a backwards compatibility alias for
-<code>pragma-na</code>.</p>
-</li>
-<li>
-<p> <code>number-overflow</code>: numeric constant does not fit</p>
-<p><code>number-overflow</code> covers warnings about numeric constants
-which don't fit in 64 bits.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>obsolete</code>: all <code>obsolete-</code> warnings</p>
-<p><code>obsolete</code> is a group alias for all warning classes prefixed
-by <code>obsolete-</code>; currently <code>obsolete-nop</code>,
-<code>obsolete-removed</code>, <code>obsolete-valid</code>.</p>
-</li>
-<li>
-<p> <code>obsolete-nop</code>: instruction obsolete and is a noop on the
-target CPU</p>
-<p><code>obsolete-nop</code> warns for an instruction which has been
-removed from the architecture, but has been architecturally defined to be a
-noop for future CPUs.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>obsolete-removed</code>: instruction obsolete and removed on the
-target CPU</p>
-<p><code>obsolete-removed</code> warns for an instruction which has been
-removed from the architecture, and is no longer included in the CPU
-definition given in the <code>CPU</code> directive, for example
-<code>POP CS</code>, the opcode for which, <code>0Fh</code>, instead is an
-opcode prefix on CPUs newer than the first generation 8086.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>obsolete-valid</code>: instruction obsolete but valid on the
-target CPU</p>
-<p><code>obsolete-valid</code> warns for an instruction which has been
-removed from the architecture, but is still valid on the specific CPU given
-in the <code>CPU</code> directive. Code using these instructions is most
-likely not forward compatible.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>orphan-labels</code>: labels alone on lines without trailing `:'</p>
-<p><code>orphan-labels</code> is a backwards compatibility alias for
-<code>label-orphan</code>.</p>
-</li>
-<li>
-<p> <code>other</code>: any warning not specifically mentioned above</p>
-<p><code>other</code> specifies any warning not included in any specific
-warning class.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>phase</code>: phase error during stabilization</p>
-<p><code>phase</code> warns about symbols having changed values during the
-second-to-last assembly pass. This is not inherently fatal, but may be a
-source of bugs.</p>
-<p>Disabled by default.</p>
-</li>
-<li>
-<p> <code>pp</code>: all <code>pp-</code> warnings</p>
-<p><code>pp</code> is a group alias for all warning classes prefixed by
-<code>pp-</code>; currently <code>pp-else-elif</code>,
-<code>pp-else-else</code>, <code>pp-empty-braces</code>,
-<code>pp-environment</code>, <code>pp-macro-def-case-single</code>,
-<code>pp-macro-def-greedy-single</code>,
-<code>pp-macro-def-param-single</code>, <code>pp-macro-defaults</code>,
-<code>pp-macro-params-legacy</code>, <code>pp-macro-params-multi</code>,
-<code>pp-macro-params-single</code>, <code>pp-macro-redef-multi</code>,
-<code>pp-open-braces</code>, <code>pp-open-brackets</code>,
-<code>pp-open-string</code>, <code>pp-rep-negative</code>,
-<code>pp-sel-range</code>, <code>pp-trailing</code>.</p>
-</li>
-<li>
-<p> <code>pp-else</code>: all <code>pp-else-</code> warnings</p>
-<p><code>pp-else</code> is a group alias for all warning classes prefixed
-by <code>pp-else-</code>; currently <code>pp-else-elif</code> and
-<code>pp-else-else</code>.</p>
-</li>
-<li>
-<p> <code>pp-else-elif</code>: %elif after %else</p>
-<p><code>pp-else-elif</code> warns that an <code>%%elif</code>&ndash;type
-directive was encountered after <code>%%elif</code> will never be expanded.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>pp-else-else</code>: %else after %else</p>
-<p><code>pp-else-else</code> warns that a second <code>%else</code> clause
-was found for the same <code>%if</code> statement. The content of this
-<code>%else</code> clause will never be expanded.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>pp-empty-braces</code>: empty %{} construct</p>
-<p><code>pp-empty-braces</code> warns that an empty <code>%{}</code> was
-encountered. This expands to a single <code>%</code> character, which is
-normally the <code>%</code> arithmetic operator.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>pp-environment</code>: nonexistent environment variable</p>
-<p><code>pp-environment</code> warns if a nonexistent environment variable
-is accessed using the <code>%!</code> preprocessor construct (see
-<a href="nasmdoc4.html#section-4.13.2">section 4.13.2</a>.) Such
-environment variables are treated as empty (with this warning issued)
-starting in NASM 2.15; earlier versions of NASM would treat this as an
-error.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>pp-macro</code>: all <code>pp-macro-</code> warnings</p>
-<p><code>pp-macro</code> is a group alias for all warning classes prefixed
-by <code>pp-macro-</code>; currently <code>pp-macro-def-case-single</code>,
-<code>pp-macro-def-greedy-single</code>,
-<code>pp-macro-def-param-single</code>, <code>pp-macro-defaults</code>,
-<code>pp-macro-params-legacy</code>, <code>pp-macro-params-multi</code>,
-<code>pp-macro-params-single</code>, <code>pp-macro-redef-multi</code>.</p>
-</li>
-<li>
-<p> <code>pp-macro-def</code>: all <code>pp-macro-def-</code> warnings</p>
-<p><code>pp-macro-def</code> is a group alias for all warning classes
-prefixed by <code>pp-macro-def-</code>; currently
-<code>pp-macro-def-case-single</code>,
-<code>pp-macro-def-greedy-single</code>,
-<code>pp-macro-def-param-single</code>.</p>
-</li>
-<li>
-<p> <code>pp-macro-def-case-single</code>: single-line macro defined both
-case sensitive and insensitive</p>
-<p><code>pp-macro-def-case-single</code> warns when a single-line macro is
-defined both case sensitive and case insensitive. The new macro definition
-will override (shadow) the original one, although the original macro is not
-deleted, and will be re-exposed if the new macro is deleted with
-<code>%undef</code>, or, if the original macro is the case insensitive one,
-the macro call is done with a different case.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>pp-macro-def-greedy-single</code>: single-line macro</p>
-<p><code>pp-macro-def-greedy-single</code> definition shadows greedy macro
-warns when a single-line macro is defined which would match a previously
-existing greedy definition. The new macro definition will override (shadow)
-the original one, although the original macro is not deleted, and will be
-re-exposed if the new macro is deleted with <code>%undef</code>, and will
-be invoked if called with a parameter count that does not match the new
-definition.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>pp-macro-def-param-single</code>: single-line macro defined with
-and without parameters</p>
-<p><code>pp-macro-def-param-single</code> warns if the same single-line
-macro is defined with and without parameters. The new macro definition will
-override (shadow) the original one, although the original macro is not
-deleted, and will be re-exposed if the new macro is deleted with
-<code>%undef</code>.</p>
-<p>Enabled and promoted to error by default.</p>
-</li>
-<li>
-<p> <code>pp-macro-defaults</code>: macros with more default than optional
-parameters</p>
-<p><code>pp-macro-defaults</code> warns when a macro has more default
-parameters than optional parameters. See
-<a href="nasmdoc4.html#section-4.5.5">section 4.5.5</a> for why might want
-to disable this warning.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>pp-macro-params</code>: all <code>pp-macro-params-</code>
-warnings</p>
-<p><code>pp-macro-params</code> is a group alias for all warning classes
-prefixed by <code>pp-macro-params-</code>; currently
-<code>pp-macro-params-legacy</code>, <code>pp-macro-params-multi</code>,
-<code>pp-macro-params-single</code>.</p>
-</li>
-<li>
-<p> <code>pp-macro-params-legacy</code>: improperly calling multi-line
-macro for legacy support</p>
-<p><code>pp-macro-params-legacy</code> warns about multi-line macros being
-invoked with the wrong number of parameters, but for bug-compatibility with
-NASM versions older than 2.15, NASM tried to fix up the parameters to match
-the legacy behavior and call the macro anyway. This can happen in certain
-cases where there are empty arguments without braces, sometimes as a result
-of macro expansion.</p>
-<p>The legacy behavior is quite strange and highly context-dependent, and
-can be disabled with:</p>
-<pre>
-     %pragma preproc sane_empty_expansion true
-</pre>
-<p>It is highly recommended to use this option in new code.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>pp-macro-params-multi</code>: multi-line macro calls with wrong
-parameter count</p>
-<p><code>pp-macro-params-multi</code> warns about multi-line macros being
-invoked with the wrong number of parameters. See
-<a href="nasmdoc4.html#section-4.5.1">section 4.5.1</a> for an example of
-why you might want to disable this warning.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>pp-macro-params-single</code>: single-line macro calls with wrong
-parameter count</p>
-<p><code>pp-macro-params-single</code> warns about single-line macros being
-invoked with the wrong number of parameters.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>pp-macro-redef-multi</code>: redefining multi-line macro</p>
-<p><code>pp-macro-redef-multi</code> warns that a multi-line macro is being
-redefined, without first removing the old definition with
-<code>%unmacro</code>.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>pp-open</code>: all <code>pp-open-</code> warnings</p>
-<p><code>pp-open</code> is a group alias for all warning classes prefixed
-by <code>pp-open-</code>; currently <code>pp-open-braces</code>,
-<code>pp-open-brackets</code>, <code>pp-open-string</code>.</p>
-</li>
-<li>
-<p> <code>pp-open-braces</code>: unterminated %{...}</p>
-<p><code>pp-open-braces</code> warns that a preprocessor parameter enclosed
-in braces <code>%{...}</code> lacks the terminating <code>}</code>
-character.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>pp-open-brackets</code>: unterminated %...</p>
-<p><code>pp-open-brackets</code> warns that a preprocessor
-<code>%...</code> construct lacks the terminating <code></code>
-character.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>pp-open-string</code>: unterminated string</p>
-<p><code>pp-open-string</code> warns that a quoted string without a closing
-quotation mark was encountered during preprocessing.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>pp-rep-negative</code>: regative %rep count</p>
-<p><code>pp-rep-negative</code> warns about a negative count given to the
-<code>%rep</code> preprocessor directive.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>pp-sel-range</code>: %sel() argument out of range</p>
-<p><code>pp-sel-range</code> warns that the %sel() preprocessor function
-was passed a value less than 1 or larger than the number of available
-arguments.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>pp-trailing</code>: trailing garbage ignored</p>
-<p><code>pp-trailing</code> warns that the preprocessor encountered
-additional text where no such text was expected. This can sometimes be the
-result of an incorrectly written expression, or arguments that are
-inadvertently separated.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>pragma</code>: all <code>pragma-</code> warnings</p>
-<p><code>pragma</code> is a group alias for all warning classes prefixed by
-<code>pragma-</code>; currently <code>pragma-bad</code>,
-<code>pragma-empty</code>, <code>pragma-na</code>,
-<code>pragma-unknown</code>.</p>
-</li>
-<li>
-<p> <code>pragma-bad</code>: malformed %pragma</p>
-<p><code>pragma-bad</code> warns about a malformed or otherwise unparsable
-<code>%pragma</code> directive.</p>
-<p>Disabled by default.</p>
-</li>
-<li>
-<p> <code>pragma-empty</code>: empty %pragma directive</p>
-<p><code>pragma-empty</code> warns about a <code>%pragma</code> directive
-containing nothing. This is treated identically to
-<code>%pragma ignore</code> except for this optional warning.</p>
-<p>Disabled by default.</p>
-</li>
-<li>
-<p> <code>pragma-na</code>: %pragma not applicable to this compilation</p>
-<p><code>pragma-na</code> warns about a <code>%pragma</code> directive
-which is not applicable to this particular assembly session. This is not
-yet implemented.</p>
-<p>Disabled by default.</p>
-</li>
-<li>
-<p> <code>pragma-unknown</code>: unknown %pragma facility or directive</p>
-<p><code>pragma-unknown</code> warns about an unknown <code>%pragma</code>
-directive. This is not yet implemented for most cases.</p>
-<p>Disabled by default.</p>
-</li>
-<li>
-<p> <code>prefix</code>: all <code>prefix-</code> warnings</p>
-<p><code>prefix</code> is a group alias for all warning classes prefixed by
-<code>prefix-</code>; currently <code>prefix-bnd</code>,
-<code>prefix-hle</code>, <code>prefix-lock</code>,
-<code>prefix-opsize</code>, <code>prefix-seg</code>.</p>
-</li>
-<li>
-<p> <code>prefix-bnd</code>: invalid BND prefix</p>
-<p><code>prefix-bnd</code> warns about ineffective use of the
-<code>BND</code> prefix when the <code>JMP</code> instruction is converted
-to the <code>SHORT</code> form. This should be extremely rare since the
-short <code>JMP</code> only is applicable to jumps inside the same module,
-but if it is legitimate, it may be necessary to use
-<code>bnd jmp dword</code>.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>prefix-hle</code>: invalid HLE prefix</p>
-<p><code>prefix-hle</code> warns about invalid use of the HLE
-<code>XACQUIRE</code> or <code>XRELEASE</code> prefixes.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>prefix-lock</code>: LOCK prefix on unlockable instructions</p>
-<p><code>prefix-lock</code> warns about <code>LOCK</code> prefixes on
-unlockable instructions.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>prefix-opsize</code>: invalid operand size prefix</p>
-<p><code>prefix-opsize</code> warns that an operand prefix
-(<code>o16</code>, <code>o32</code>, <code>o64</code>, <code>osp</code>)
-invalid for the specified instruction has been specified. The operand
-prefix will be ignored by the assembler.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>prefix-seg</code>: segment prefix ignored in 64-bit mode</p>
-<p><code>prefix-seg</code> warns that an <code>es</code>, <code>cs</code>,
-<code>ss</code> or <code>ds</code> segment override prefix has no effect in
-64-bit mode. The prefix will still be generated as requested.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>ptr</code>: non-NASM keyword used in other assemblers</p>
-<p><code>ptr</code> warns about keywords used in other assemblers that
-might indicate a mistake in the source code. Currently only the MASM
-<code>PTR</code> keyword is recognized. See also
-<a href="nasmdoc6.html#section-6.5">section 6.5</a>.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>regsize</code>: register size specification ignored</p>
-<p><code>regsize</code> warns about a register with implicit size (such as
-<code>EAX</code>, which is always 32 bits) been given an explicit size
-specification which is inconsistent with the size of the named register,
-e.g. <code>WORD EAX</code>. <code>DWORD EAX</code> or <code>WORD AX</code>
-are permitted, and do not trigger this warning. Some registers which <em>do
-not</em> imply a specific size, such as <code>K0</code>, may need this
-specification unless the instruction itself implies the instruction size:</p>
-<pre>
-     KMOVW K0,foo          ; Permitted, KMOVW implies 16 bits 
-     KMOV  WORD K0,foo     ; Permitted, WORD K0 specifies instruction size 
-     KMOV  K0,WORD foo     ; Permitted, WORD foo specifies instruction size 
-     KMOV  K0,foo          ; Not permitted, instruction size ambiguous
-</pre>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>unknown-pragma</code>: unknown %pragma facility or directive</p>
-<p><code>unknown-pragma</code> is a backwards compatibility alias for
-<code>pragma-unknown</code>.</p>
-</li>
-<li>
-<p> <code>unknown-warning</code>: unknown warning in &ndash;W/-w or warning
-directive</p>
-<p><code>unknown-warning</code> warns about a <code>-w</code> or
-<code>-W</code> option or a <code>WARNING</code> directive that contains
-an unknown warning name or is otherwise not possible to process.</p>
-<p>Disabled by default.</p>
-</li>
-<li>
-<p> <code>user</code>: %warning directives</p>
-<p><code>user</code> controls output of <code>%warning</code> directives
-(see <a href="nasmdoc4.html#section-4.11">section 4.11</a>).</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>warn-stack-empty</code>: warning stack empty</p>
-<p><code>warn-stack-empty</code> a WARNING POP directive was executed
-when the warning stack is empty. This is treated as a WARNING *all
-directive.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>zeroing</code>: RESx in initialized section becomes zero</p>
-<p><code>zeroing</code> a <code>RESx</code> directive was used in a section
-which contains initialized data, and the output format does not support
-this. Instead, this will be replaced with explicit zero content, which may
-produce a large output file.</p>
-<p>Enabled by default.</p>
-</li>
-<li>
-<p> <code>zext-reloc</code>: relocation zero-extended to match output
-format</p>
-<p><code>zext-reloc</code> warns that a relocation has been zero-extended
-due to limitations in the output format.</p>
-<p>Enabled by default.</p>
-</li>
-</ul>
-</div>
-</body>
-</html>

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@@ -1,156 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.1//EN" "http://www.w3.org/TR/xhtml11/DTD/xhtml11.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<meta charset="UTF-8" />
-<title>NASM - The Netwide Assembler</title>
-<link href="nasmdoc.css" rel="stylesheet" type="text/css" />
-<link href="local.css" rel="stylesheet" type="text/css" />
-</head>
-<body>
-<ul class="navbar">
-<li class="first"><a class="prev" href="nasmdoca.html">Appendix A</a></li>
-<li><a class="next" href="nasmdocc.html">Appendix C</a></li>
-<li><a class="toc" href="nasmdoc0.html">Contents</a></li>
-<li class="last"><a class="index" href="nasmdoci.html">Index</a></li>
-</ul>
-<div class="title">
-<h1>NASM - The Netwide Assembler</h1>
-<span class="subtitle">version 2.16.01</span>
-</div>
-<div class="contents"
->
-<h2 id="appendix-B">Appendix B: Ndisasm</h2>
-<p>The Netwide Disassembler, NDISASM</p>
-<h3 id="section-B.1">B.1 Introduction</h3>
-<p>The Netwide Disassembler is a small companion program to the Netwide
-Assembler, NASM. It seemed a shame to have an x86 assembler, complete with
-a full instruction table, and not make as much use of it as possible, so
-here's a disassembler which shares the instruction table (and some other
-bits of code) with NASM.</p>
-<p>The Netwide Disassembler does nothing except to produce disassemblies of
-<em>binary</em> source files. NDISASM does not have any understanding of
-object file formats, like <code>objdump</code>, and it will not understand
-<code>DOS .EXE</code> files like <code>debug</code> will. It just
-disassembles.</p>
-<h3 id="section-B.2">B.2 Running NDISASM</h3>
-<p>To disassemble a file, you will typically use a command of the form</p>
-<pre>
-       ndisasm -b {16|32|64} filename
-</pre>
-<p>NDISASM can disassemble 16-, 32- or 64-bit code equally easily, provided
-of course that you remember to specify which it is to work with. If no
-<code>-b</code> switch is present, NDISASM works in 16-bit mode by default.
-The <code>-u</code> switch (for USE32) also invokes 32-bit mode.</p>
-<p>Two more command line options are <code>-r</code> which reports the
-version number of NDISASM you are running, and <code>-h</code> which gives
-a short summary of command line options.</p>
-<h4 id="section-B.2.1">B.2.1 COM Files: Specifying an Origin</h4>
-<p>To disassemble a <code>DOS .COM</code> file correctly, a disassembler
-must assume that the first instruction in the file is loaded at address
-<code>0x100</code>, rather than at zero. NDISASM, which assumes by default
-that any file you give it is loaded at zero, will therefore need to be
-informed of this.</p>
-<p>The <code>-o</code> option allows you to declare a different origin for
-the file you are disassembling. Its argument may be expressed in any of the
-NASM numeric formats: decimal by default, if it begins with
-`<code>$</code>' or `<code>0x</code>' or ends in `<code>H</code>' it's
-<code>hex</code>, if it ends in `<code>Q</code>' it's <code>octal</code>,
-and if it ends in `<code>B</code>' it's <code>binary</code>.</p>
-<p>Hence, to disassemble a <code>.COM</code> file:</p>
-<pre>
-       ndisasm -o100h filename.com
-</pre>
-<p>will do the trick.</p>
-<h4 id="section-B.2.2">B.2.2 Code Following Data: Synchronization</h4>
-<p>Suppose you are disassembling a file which contains some data which
-isn't machine code, and <em>then</em> contains some machine code. NDISASM
-will faithfully plough through the data section, producing machine
-instructions wherever it can (although most of them will look bizarre, and
-some may have unusual prefixes, e.g. `<code>FS OR AX,0x240A</code>'), and
-generating `DB' instructions ever so often if it's totally stumped. Then it
-will reach the code section.</p>
-<p>Supposing NDISASM has just finished generating a strange machine
-instruction from part of the data section, and its file position is now one
-byte <em>before</em> the beginning of the code section. It's entirely
-possible that another spurious instruction will get generated, starting
-with the final byte of the data section, and then the correct first
-instruction in the code section will not be seen because the starting point
-skipped over it. This isn't really ideal.</p>
-<p>To avoid this, you can specify a `synchronization' point, or indeed as
-many synchronization points as you like (although NDISASM can only handle
-2147483647 sync points internally). The definition of a sync point is this:
-NDISASM guarantees to hit sync points exactly during disassembly. If it is
-thinking about generating an instruction which would cause it to jump over
-a sync point, it will discard that instruction and output a
-`<code>db</code>' instead. So it <em>will</em> start disassembly exactly
-from the sync point, and so you <em>will</em> see all the instructions in
-your code section.</p>
-<p>Sync points are specified using the <code>-s</code> option: they are
-measured in terms of the program origin, not the file position. So if you
-want to synchronize after 32 bytes of a <code>.COM</code> file, you would
-have to do</p>
-<pre>
-       ndisasm -o100h -s120h file.com
-</pre>
-<p>rather than</p>
-<pre>
-       ndisasm -o100h -s20h file.com
-</pre>
-<p>As stated above, you can specify multiple sync markers if you need to,
-just by repeating the <code>-s</code> option.</p>
-<h4 id="section-B.2.3">B.2.3 Mixed Code and Data: Automatic (Intelligent) Synchronization </h4>
-<p>Suppose you are disassembling the boot sector of a <code>DOS</code>
-floppy (maybe it has a virus, and you need to understand the virus so that
-you know what kinds of damage it might have done you). Typically, this will
-contain a <code>JMP</code> instruction, then some data, then the rest of
-the code. So there is a very good chance of NDISASM being
-<em>misaligned</em> when the data ends and the code begins. Hence a sync
-point is needed.</p>
-<p>On the other hand, why should you have to specify the sync point
-manually? What you'd do in order to find where the sync point would be,
-surely, would be to read the <code>JMP</code> instruction, and then to use
-its target address as a sync point. So can NDISASM do that for you?</p>
-<p>The answer, of course, is yes: using either of the synonymous switches
-<code>-a</code> (for automatic sync) or <code>-i</code> (for intelligent
-sync) will enable <code>auto-sync</code> mode. Auto-sync mode automatically
-generates a sync point for any forward-referring PC-relative jump or call
-instruction that NDISASM encounters. (Since NDISASM is one-pass, if it
-encounters a PC-relative jump whose target has already been processed,
-there isn't much it can do about it...)</p>
-<p>Only PC-relative jumps are processed, since an absolute jump is either
-through a register (in which case NDISASM doesn't know what the register
-contains) or involves a segment address (in which case the target code
-isn't in the same segment that NDISASM is working in, and so the sync point
-can't be placed anywhere useful).</p>
-<p>For some kinds of file, this mechanism will automatically put sync
-points in all the right places, and save you from having to place any sync
-points manually. However, it should be stressed that auto-sync mode is
-<em>not</em> guaranteed to catch all the sync points, and you may still
-have to place some manually.</p>
-<p>Auto-sync mode doesn't prevent you from declaring manual sync points: it
-just adds automatically generated ones to the ones you provide. It's
-perfectly feasible to specify <code>-i</code> <em>and</em> some
-<code>-s</code> options.</p>
-<p>Another caveat with auto-sync mode is that if, by some unpleasant fluke,
-something in your data section should disassemble to a PC-relative call or
-jump instruction, NDISASM may obediently place a sync point in a totally
-random place, for example in the middle of one of the instructions in your
-code section. So you may end up with a wrong disassembly even if you use
-auto-sync. Again, there isn't much I can do about this. If you have
-problems, you'll have to use manual sync points, or use the <code>-k</code>
-option (documented below) to suppress disassembly of the data area.</p>
-<h4 id="section-B.2.4">B.2.4 Other Options</h4>
-<p>The <code>-e</code> option skips a header on the file, by ignoring the
-first N bytes. This means that the header is <em>not</em> counted towards
-the disassembly offset: if you give <code>-e10 -o10</code>, disassembly
-will start at byte 10 in the file, and this will be given offset 10, not
-20.</p>
-<p>The <code>-k</code> option is provided with two comma-separated numeric
-arguments, the first of which is an assembly offset and the second is a
-number of bytes to skip. This <em>will</em> count the skipped bytes towards
-the assembly offset: its use is to suppress disassembly of a data section
-which wouldn't contain anything you wanted to see anyway.</p>
-</div>
-</body>
-</html>

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-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.1//EN" "http://www.w3.org/TR/xhtml11/DTD/xhtml11.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<meta charset="UTF-8" />
-<title>NASM - The Netwide Assembler</title>
-<link href="nasmdoc.css" rel="stylesheet" type="text/css" />
-<link href="local.css" rel="stylesheet" type="text/css" />
-</head>
-<body>
-<ul class="navbar">
-<li class="first"><a class="prev" href="nasmdocb.html">Appendix B</a></li>
-<li><a class="next" href="nasmdocd.html">Appendix D</a></li>
-<li><a class="toc" href="nasmdoc0.html">Contents</a></li>
-<li class="last"><a class="index" href="nasmdoci.html">Index</a></li>
-</ul>
-<div class="title">
-<h1>NASM - The Netwide Assembler</h1>
-<span class="subtitle">version 2.16.01</span>
-</div>
-<div class="contents"
->
-<h2 id="appendix-C">Appendix C: NASM Version History</h2>
-<h3 id="section-C.1">C.1 NASM 2 Series</h3>
-<p>The NASM 2 series supports x86-64, and is the production version of NASM
-since 2007.</p>
-<h4 id="section-C.1.1">C.1.1 Version 2.16.01</h4>
-<p><em>This is a documentation update release only.</em></p>
-<ul>
-<li>
-<p>Fix the creation of the table of contents in the HTML version of the
-documentation.</p>
-</li>
-</ul>
-<h4 id="section-C.1.2">C.1.2 Version 2.16</h4>
-<ul>
-<li>
-<p>Support for the <code>rdf</code> format has been discontinued and all
-the RDOFF utilities has been removed.</p>
-</li>
-<li>
-<p>The <code>--reproducible</code> option now leaves the filename field in
-the COFF object format blank. This was always rather useless since it is
-only 18 characters long; as such debug formats have to carry their own
-filename information anyway.</p>
-</li>
-<li>
-<p>Fix handling of MASM-syntax reserved memory (e.g. <code>dw ?</code>)
-when used in structure definitions.</p>
-</li>
-<li>
-<p>The preprocessor now supports functions, which can be less verbose and
-more convenient than the equivalent code implemented using directives. See
-<a href="nasmdoc4.html#section-4.4">section 4.4</a>.</p>
-</li>
-<li>
-<p>Fix the handling of <code>%00</code> in the preprocessor.</p>
-</li>
-<li>
-<p>Fix incorrect handling of path names affecting error messages,
-dependency generation, and debug format output.</p>
-</li>
-<li>
-<p>Support for the RDOFF output format and the RDOFF tools have been
-removed. The RDOFF tools had already been broken since at least NASM 2.14.
-For flat code the ELF output format recommended; for segmented code the
-<code>obj</code> (OMF) output format.</p>
-</li>
-<li>
-<p>New facility: preprocessor functions. Preprocessor functions, which are
-expanded similarly to single-line macros, can greatly simplify code that in
-the past would have required a lengthy list of directives and intermediate
-macros. See <a href="nasmdoc4.html#section-4.4">section 4.4</a>.</p>
-</li>
-<li>
-<p>Single-line macros can now declare parameters (using a
-<code>&amp;&amp;</code> prefix) that creates a quoted string, but does
-<em>not</em> requote an already quoted string. See
-<a href="nasmdoc4.html#section-4.2.1">section 4.2.1</a>.</p>
-</li>
-<li>
-<p>Instruction table updated per public information available as of
-November 2022.</p>
-</li>
-<li>
-<p>All warnings in the preprocessor have now been assigned warning classes.
-See <a href="nasmdoca.html">appendix A</a>.</p>
-</li>
-<li>
-<p>Fix the invalid use of <code>RELA</code>&ndash;type relocations instead
-of <code>REL</code>&ndash;type relocations when generating DWARF debug
-information for the <code>elf32</code> output format.</p>
-</li>
-<li>
-<p>Fix the handling <code>at</code> in <code>istruc</code> when the
-structure contains local labels. See
-<a href="nasmdoc5.html#section-5.9.2">section 5.9.2</a>.</p>
-</li>
-<li>
-<p>When assembling with <code>--reproducible</code>, don't encode the
-filename in the COFF header for the <code>coff</code>, <code>win32</code>
-or <code>win64</code> output formats. The COFF header only has space for an
-18-character filename, which makes this field rather useless in the first
-place. Debug output data, if enabled, is not affected.</p>
-</li>
-<li>
-<p>Fix incorrect size calculation when using MASM syntax for non-byte
-reservations (e.g. <code>dw ?</code>.)</p>
-</li>
-<li>
-<p>Allow forcing an instruction in 64-bit mode to have a (possibly
-redundant) REX prefix, using the syntax <code>{rex}</code> as a prefix.</p>
-</li>
-<li>
-<p>Add a <code>{vex}</code> prefix to enforce VEX (AVX) encoding of an
-instruction, either using the 2- or 3-byte VEX prefixes.</p>
-</li>
-<li>
-<p>The <code>CPU</code> directive has been augmented to allow control of
-generation of VEX (AVX) versus EVEX (AVX-512) instruction formats, see
-<a href="nasmdoc7.html#section-7.11">section 7.11</a>.</p>
-</li>
-<li>
-<p>Some recent instructions that previously have been only available using
-EVEX encodings are now also encodable using VEX (AVX) encodings. For
-backwards compatibility these encodings are not enabled by default, but can
-be generated either via an explicit <code>{vex}</code> prefix or by
-specifying either <code>CPU LATEVEX</code> or <code>CPU NOEVEX</code>; see
-<a href="nasmdoc7.html#section-7.11">section 7.11</a>.</p>
-</li>
-<li>
-<p>Document the already existing <code>%unimacro</code> directive. See
-<a href="nasmdoc4.html#section-4.5.12">section 4.5.12</a>.</p>
-</li>
-<li>
-<p>Fix a code range generation bug in the DWARF debug format (incorrect
-information in the <code>DW_AT_high_pc</code> field) for the ELF output
-formats. This bug happened to cancel out with a bug in older versions of
-the GNU binutils linker, but breaks with other linkers and updated or other
-linkers that expect the spec to be followed.</p>
-</li>
-<li>
-<p>Fix segment symbols with addends, e.g. <code>jmp _TEXT+10h:0</code> in
-output formats that support segment relocations, e.g. the <code>obj</code>
-format.</p>
-</li>
-<li>
-<p>Fix various crashes and hangs on invalid input.</p>
-</li>
-</ul>
-<h4 id="section-C.1.3">C.1.3 Version 2.15.05</h4>
-<ul>
-<li>
-<p>Fix <code>%ifid $</code> and <code>%ifid $$</code> incorrectly being
-treated as true. See <a href="nasmdoc4.html#section-4.6.6">section
-4.6.6</a>.</p>
-</li>
-<li>
-<p>Add <code>--reproducible</code> option to suppress NASM version numbers
-and timestamps in output files. See
-<a href="nasmdoc2.html#section-2.1.34">section 2.1.34</a>.</p>
-</li>
-</ul>
-<h4 id="section-C.1.4">C.1.4 Version 2.15.04</h4>
-<ul>
-<li>
-<p>More sensible handling of the case where one single-line macro
-definition will shadow another. A warning will be issued, but the
-additional definition will be allowed. For the existing error case where
-both a parameterless and parametered macro are created, that warning is
-promoted to an error by default.</p>
-</li>
-<li>
-<p>Add special preprocessor tokens <code>%*?</code> and <code>%*??</code>
-that expand like <code>%?</code> and <code>%??</code> in single-line macros
-only. See <a href="nasmdoc4.html#section-4.2.6">section 4.2.6</a>.</p>
-</li>
-<li>
-<p>Correct the encoding of the <code>ENQCMDS</code> and
-<code>TILELOADT1</code> instructions.</p>
-</li>
-<li>
-<p>Fix case where the COFF backend (the <code>coff</code>,
-<code>win32</code> and <code>win64</code> output formats) would add padding
-bytes in the middle of a section if a
-<code>SECTION</code>/<code>SEGMENT</code> directive was provided which
-repeated an <code>ALIGN=</code> attribute. This neither matched legacy
-behavior, other backends, or user expectations.</p>
-</li>
-<li>
-<p>Fix SSE instructions not being recognized with an explicit memory
-operation size (e.g. <code>movsd qword eax,xmm0</code>).</p>
-</li>
-<li>
-<p>The <code>-L+</code> option no longer enables <code>-Lw</code>, which is
-mainly useful to debug NASM crashes. See
-<a href="nasmdoc2.html#section-2.1.4">section 2.1.4</a>.</p>
-</li>
-<li>
-<p>Document long-standing hazards in the use of <code>$</code> in
-<code>Dx</code> statements, see
-<a href="nasmdoc3.html#section-3.2.1">section 3.2.1</a>.</p>
-</li>
-<li>
-<p>The NASM-only RDOFF output format backend, which has been broken since
-at least NASM 2.14, has been disabled. The RDOFF tools are scheduled to be
-removed from the NASM distribution in NASM 2.16. If you have a concrete use
-case for RDOFF, please file a NASM bug report at
-<a href="https://bugs.nasm.us/"><code>https://bugs.nasm.us/</code></a> as
-soon as possible.</p>
-</li>
-</ul>
-<h4 id="section-C.1.5">C.1.5 Version 2.15.03</h4>
-<ul>
-<li>
-<p>Add instructions from the Intel Instruction Set Extensions and Future
-Features Programming Reference, June 2020. This includes AVX5512
-<code>bfloat16</code>, AVX512 mask intersect, and Intel Advanced Matrix
-Extensions (AMX).</p>
-</li>
-<li>
-<p>Support for <code>bfloat16</code> floating-point constants. See
-<a href="nasmdoc3.html#section-3.4.6">section 3.4.6</a> and
-<a href="nasmdoc6.html#section-6.3">section 6.3</a>.</p>
-</li>
-<li>
-<p>Properly display warnings in preprocess-only mode.</p>
-</li>
-<li>
-<p>Fix copy-and-paste of examples from the PDF documentation.</p>
-</li>
-<li>
-<p>Debug information now properly reflect the line numbers of macro
-invocations (unless declared <code>.nolist</code>).</p>
-</li>
-<li>
-<p>Fix excessive alignment of sections in the
-<code>coff</code>/<code>win32</code>/<code>win64</code> output formats when
-the user-specified alignment is less than the default alignment for the
-section or section type.</p>
-</li>
-<li>
-<p>Fix explicit token pasting (<code>%+</code>,
-<a href="nasmdoc4.html#section-4.2.4">section 4.2.4</a>) for the cases
-where one or more parts result from empty token expansion, resulting in
-<code>%+</code> tokens at the beginning or end, or multiple ones in a row.</p>
-</li>
-<li>
-<p>Fix macro label capture (<code>%00</code>,
-<a href="nasmdoc4.html#section-4.5.7">section 4.5.7</a>).</p>
-</li>
-<li>
-<p>Much better documentation for the MASM compatibility package,
-<code>%use masm</code> (see <a href="nasmdoc6.html#section-6.5">section
-6.5</a>).</p>
-</li>
-<li>
-<p>Fix <code>LEA</code> without square brackets, for MASM compatibility.</p>
-</li>
-<li>
-<p>Portability fixes.</p>
-</li>
-</ul>
-<h4 id="section-C.1.6">C.1.6 Version 2.15.02</h4>
-<ul>
-<li>
-<p>Fix miscompilation when building with <code>clang</code>.</p>
-</li>
-<li>
-<p>Add <code>db-empty</code> warning class, see
-<a href="nasmdoc2.html#section-2.1.26">section 2.1.26</a>.</p>
-</li>
-<li>
-<p>Fix the dependencies in the MSVC NMAKE makefile
-(<code>Mkfiles/msvc.mak</code>).</p>
-</li>
-<li>
-<p>Some documentation improvements and cleanups.</p>
-</li>
-<li>
-<p>Fix the handling of macro parameter ranges (<code>%{:}</code>),
-including with brace-enclosed original arguments.</p>
-</li>
-</ul>
-<h4 id="section-C.1.7">C.1.7 Version 2.15.01</h4>
-<ul>
-<li>
-<p>Fix building the documentation from the release archive. For 2.15, the
-user has to do <code>make warnings</code> manually in the main directory in
-order to be able to build the documentation, which means Perl needs to be
-installed on the system.</p>
-</li>
-<li>
-<p>Add instructions for Intel Control Flow Enforcement Technology (CET).</p>
-</li>
-</ul>
-<h4 id="section-C.1.8">C.1.8 Version 2.15</h4>
-<ul>
-<li>
-<p>The comparison and booleanizing operators can now be used in any
-expression context, not just <code>%if</code>. See
-<a href="nasmdoc3.html#section-3.5">section 3.5</a>.</p>
-</li>
-<li>
-<p>New operator <code>?</code> ... <code>:</code>. See
-<a href="nasmdoc3.html#section-3.5.1">section 3.5.1</a>.</p>
-</li>
-<li>
-<p>Signed shift operators <code>&lt;&lt;&lt;</code> and
-<code>&gt;&gt;&gt;</code>. See
-<a href="nasmdoc3.html#section-3.5.9">section 3.5.9</a>.</p>
-</li>
-<li>
-<p>The MASM <code>DUP</code> syntax for data definitions is now supported,
-in a somewhat enhanced form. See
-<a href="nasmdoc3.html#section-3.2.1">section 3.2.1</a>.</p>
-</li>
-<li>
-<p>Warn for strange legacy behavior regarding empty arguments in multi-line
-macro expansion, but try to match legacy behavior in most cases. Legacy
-behavior can be disabled with the directive
-<code>%pragma preproc sane_empty_expansion</code>, see
-<a href="nasmdoc4.html#section-4.5">section 4.5</a> and
-<a href="nasmdoc4.html#section-4.12.1">section 4.12.1</a>.</p>
-</li>
-<li>
-<p>A much more sensible limit to expression evaluation depth. The
-previously defined limit would rarely trigger before NASM died with a stack
-overrun error on most systems. See
-<a href="nasmdoc2.html#section-2.1.31">section 2.1.31</a>.</p>
-</li>
-<li>
-<p>The state of warnings can now be saved and restored via the
-<code>WARNING PUSH</code> and <code>WARNING POP</code> directives. See
-<a href="nasmdoc7.html#section-7.13">section 7.13</a>.</p>
-</li>
-<li>
-<p>The <code>sectalign on|off</code> switch does not affect an explicit
-directive. See <a href="nasmdoc5.html#section-5.10.2">section 5.10.2</a>.</p>
-</li>
-<li>
-<p>Added <code>configure</code> option to enable building with profiling
-(<code>--enable-profiling</code>).</p>
-</li>
-<li>
-<p>Attempt to support of long path names, up to 32767 of UTF-16 characters,
-on Windows.</p>
-</li>
-<li>
-<p>Fixed 'mismatch in operand sizes' error in the <code>MOVDDUP</code>,
-<code>CMPXCHG8B</code> and <code>CMPXCHG16B</code> instructions.</p>
-</li>
-<li>
-<p>Improved error messages in the string transformation routine.</p>
-</li>
-<li>
-<p>Removed obsolete <code>gnu-elf-extensions</code> warning about 8- and
-16-bit relocation generation. See
-<a href="nasmdoc8.html#section-8.9.8">section 8.9.8</a></p>
-</li>
-<li>
-<p>Added group aliases for all prefixed warnings. See
-<a href="nasmdoc2.html#section-2.1.26">section 2.1.26</a>.</p>
-</li>
-<li>
-<p>Allowed building with MSVC versions older than 1700.</p>
-</li>
-<li>
-<p>Added implicitly sized versions of the <code>K...</code> instructions,
-which allows the <code>K...</code> instructions to be specified without a
-size suffix as long as the operands are sized.</p>
-</li>
-<li>
-<p>Added <code>-L</code> option for additional listing information. See
-<a href="nasmdoc2.html#section-2.1.4">section 2.1.4</a>.</p>
-</li>
-<li>
-<p>Added some warnings for obsolete instructions for a specified CPU.</p>
-</li>
-<li>
-<p>Deprecated <code>-hf</code> and <code>-y</code> options. Use
-<code>-h</code> instead.</p>
-</li>
-<li>
-<p>Made DWARF as the default debug format for ELF.</p>
-</li>
-<li>
-<p>Added <code>%pragma list</code> <em>options...</em> to set or clear
-listing options (see <code>opt-L</code>).</p>
-</li>
-<li>
-<p>Allowed immediate syntax for <code>LEA</code> instruction (ignore
-operand size completely).</p>
-</li>
-<li>
-<p>Added limited functionality MASM compatibility package. See
-<a href="nasmdoc6.html#section-6.5">section 6.5</a>.</p>
-</li>
-<li>
-<p>Add single-line macros aliases using <code>%defalias</code> or
-<code>%idefalias</code>. These behave like a kind of "symbolic links" for
-single-line macros. See <a href="nasmdoc4.html#section-4.2.11">section
-4.2.11</a> and <code>clear</code>.</p>
-</li>
-<li>
-<p>Added support for stringify, nostrip, evaluating, and greedy single-line
-macro arguments. See <a href="nasmdoc4.html#section-4.2.1">section
-4.2.1</a>.</p>
-</li>
-<li>
-<p>Unused single-line macro arguments no longer need to have a specified
-name. See <a href="nasmdoc4.html#section-4.2.1">section 4.2.1</a>.</p>
-</li>
-<li>
-<p>Added conditional comma operator <code>%,</code>. See
-<a href="nasmdoc4.html#section-4.2.12">section 4.2.12</a>.</p>
-</li>
-<li>
-<p>Changed private namespace from <code>__foo__</code> to
-<code>__?foo?__</code>, so a user namespace starting from underscore is now
-clean from symbols. For backwards compatibility, the previous names are
-defined as aliases; see <a href="nasmdoc4.html#section-4.2.11">section
-4.2.11</a>, <a href="nasmdoc4.html#section-4.13.3">section 4.13.3</a> and
-<a href="nasmdoc5.html">chapter 5</a>.</p>
-</li>
-<li>
-<p>Added support of ELF weak symbols and external references. See
-<a href="nasmdoc8.html#section-8.9.5">section 8.9.5</a>.</p>
-</li>
-<li>
-<p>Changed the behavior of the EXTERN keyword and introduced REQUIRED
-keyword. See <a href="nasmdoc7.html#section-7.6">section 7.6</a>.</p>
-</li>
-<li>
-<p>Added <code>%ifusable</code> and <code>%ifusing</code> directives. See
-<a href="nasmdoc6.html">chapter 6</a>.</p>
-</li>
-<li>
-<p>Made various performance improvements and stability fixes in macro
-preprocessor engine.</p>
-</li>
-<li>
-<p>Improved NASM error handling and cleaned up error messages.</p>
-</li>
-<li>
-<p>Many, many bug fixes.</p>
-</li>
-</ul>
-<h4 id="section-C.1.9">C.1.9 Version 2.14.03</h4>
-<ul>
-<li>
-<p>Suppress nuisance "<code>label changed during code generation</code>"
-messages after a real error.</p>
-</li>
-<li>
-<p>Add support for the <code>merge</code> and <code>strings</code>
-attributes on ELF sections. See
-<a href="nasmdoc8.html#section-8.9.2">section 8.9.2</a>.</p>
-</li>
-<li>
-<p>Add support for the <code>note</code>, <code>preinit_array</code>,
-<code>init_array</code>, and <code>fini_array</code> sections type in ELF.
-See <a href="nasmdoc8.html#section-8.9.2">section 8.9.2</a>.</p>
-</li>
-<li>
-<p>Handle more than 32,633 sections in ELF.</p>
-</li>
-</ul>
-<h4 id="section-C.1.10">C.1.10 Version 2.14.02</h4>
-<ul>
-<li>
-<p>Fix crash due to multiple errors or warnings during the code generation
-pass if a list file is specified.</p>
-</li>
-</ul>
-<h4 id="section-C.1.11">C.1.11 Version 2.14.01</h4>
-<ul>
-<li>
-<p>Create all system-defined macros before processing command-line given
-preprocessing directives (<code>-p</code>, <code>-d</code>,
-<code>-u</code>, <code>--pragma</code>, <code>--before</code>).</p>
-</li>
-<li>
-<p>If debugging is enabled, define a <code>__DEBUG_FORMAT__</code>
-predefined macro. See <a href="nasmdoc5.html#section-5.5">section 5.5</a>.</p>
-</li>
-<li>
-<p>Fix an assert for the case in the <code>obj</code> format when a
-<code>SEG</code> operator refers to an <code>EXTERN</code> symbol declared
-further down in the code.</p>
-</li>
-<li>
-<p>Fix a corner case in the floating-point code where a binary, octal or
-hexadecimal floating-point having at least 32, 11, or 8 mantissa digits
-could produce slightly incorrect results under very specific conditions.</p>
-</li>
-<li>
-<p>Support <code>-MD</code> without a filename, for <code>gcc</code>
-compatibility. <code>-MF</code> can be used to set the dependencies output
-filename. See <a href="nasmdoc2.html#section-2.1.8">section 2.1.8</a>.</p>
-</li>
-<li>
-<p>Fix <code>-E</code> in combination with <code>-MD</code>. See
-<a href="nasmdoc2.html#section-2.1.22">section 2.1.22</a>.</p>
-</li>
-<li>
-<p>Fix missing errors on redefined labels; would cause convergence failure
-instead which is very slow and not easy to debug.</p>
-</li>
-<li>
-<p>Duplicate definitions of the same label <em>with the same value</em> is
-now explicitly permitted (2.14 would allow it in some circumstances.)</p>
-</li>
-<li>
-<p>Add the option <code>--no-line</code> to ignore <code>%line</code>
-directives in the source. See
-<a href="nasmdoc2.html#section-2.1.33">section 2.1.33</a> and
-<a href="nasmdoc4.html#section-4.13.1">section 4.13.1</a>.</p>
-</li>
-</ul>
-<h4 id="section-C.1.12">C.1.12 Version 2.14</h4>
-<ul>
-<li>
-<p>Changed <code>-I</code> option semantics by adding a trailing path
-separator unconditionally.</p>
-</li>
-<li>
-<p>Fixed null dereference in corrupted invalid single line macros.</p>
-</li>
-<li>
-<p>Fixed division by zero which may happen if source code is malformed.</p>
-</li>
-<li>
-<p>Fixed out of bound access in processing of malformed segment override.</p>
-</li>
-<li>
-<p>Fixed out of bound access in certain <code>EQU</code> parsing.</p>
-</li>
-<li>
-<p>Fixed buffer underflow in float parsing.</p>
-</li>
-<li>
-<p>Added <code>SGX</code> (Intel Software Guard Extensions) instructions.</p>
-</li>
-<li>
-<p>Added <code>+n</code> syntax for multiple contiguous registers.</p>
-</li>
-<li>
-<p>Fixed <code>subsections_via_symbols</code> for <code>macho</code> object
-format.</p>
-</li>
-<li>
-<p>Added the <code>--gprefix</code>, <code>--gpostfix</code>,
-<code>--lprefix</code>, and <code>--lpostfix</code> command line options,
-to allow command line base symbol renaming. See
-<a href="nasmdoc2.html#section-2.1.28">section 2.1.28</a>.</p>
-</li>
-<li>
-<p>Allow label renaming to be specified by <code>%pragma</code> in addition
-to from the command line. See <a href="nasmdoc7.html#section-7.10">section
-7.10</a>.</p>
-</li>
-<li>
-<p>Supported generic <code>%pragma</code> namespaces, <code>output</code>
-and <code>debug</code>. See <a href="nasmdoc4.html#section-4.12">section
-4.12</a>.</p>
-</li>
-<li>
-<p>Added the <code>--pragma</code> command line option to inject a
-<code>%pragma</code> directive. See
-<a href="nasmdoc2.html#section-2.1.29">section 2.1.29</a>.</p>
-</li>
-<li>
-<p>Added the <code>--before</code> command line option to accept preprocess
-statement before input. See <a href="nasmdoc2.html#section-2.1.30">section
-2.1.30</a>.</p>
-</li>
-<li>
-<p>Added <code>AVX512</code> <code>VBMI2</code> (Additional Bit
-Manipulation), <code>VNNI</code> (Vector Neural Network),
-<code>BITALG</code> (Bit Algorithm), and <code>GFNI</code> (Galois Field
-New Instruction) instructions.</p>
-</li>
-<li>
-<p>Added the <code>STATIC</code> directive for local symbols that should be
-renamed using global-symbol rules. See
-<a href="nasmdoc7.html#section-7.9">section 7.9</a>.</p>
-</li>
-<li>
-<p>Allow a symbol to be defined as <code>EXTERN</code> and then later
-overridden as <code>GLOBAL</code> or <code>COMMON</code>. Furthermore, a
-symbol declared <code>EXTERN</code> and then defined will be treated as
-<code>GLOBAL</code>. See <a href="nasmdoc7.html#section-7.5">section
-7.5</a>.</p>
-</li>
-<li>
-<p>The <code>GLOBAL</code> directive no longer is required to precede the
-definition of the symbol.</p>
-</li>
-<li>
-<p>Support <code>private_extern</code> as <code>macho</code> specific
-extension to the <code>GLOBAL</code> directive. See
-<a href="nasmdoc8.html#section-8.8.5">section 8.8.5</a>.</p>
-</li>
-<li>
-<p>Updated <code>UD0</code> encoding to match with the specification</p>
-</li>
-<li>
-<p>Added the <code>--limit-X</code> command line option to set execution
-limits. See <a href="nasmdoc2.html#section-2.1.31">section 2.1.31</a>.</p>
-</li>
-<li>
-<p>Updated the <code>Codeview</code> version number to be aligned with
-<code>MASM</code>.</p>
-</li>
-<li>
-<p>Added the <code>--keep-all</code> command line option to preserve output
-files. See <a href="nasmdoc2.html#section-2.1.32">section 2.1.32</a>.</p>
-</li>
-<li>
-<p>Added the <code>--include</code> command line option, an alias to
-<code>-P</code> (<a href="nasmdoc2.html#section-2.1.19">section
-2.1.19</a>).</p>
-</li>
-<li>
-<p>Added the <code>--help</code> command line option as an alias to
-<code>-h</code> (<a href="nasmdoc3.html#section-3.1">section 3.1</a>).</p>
-</li>
-<li>
-<p>Added <code>-W</code>, <code>-D</code>, and <code>-Q</code> suffix
-aliases for <code>RET</code> instructions so the operand sizes of these
-instructions can be encoded without using <code>o16</code>,
-<code>o32</code> or <code>o64</code>.</p>
-</li>
-</ul>
-<h4 id="section-C.1.13">C.1.13 Version 2.13.03</h4>
-<ul>
-<li>
-<p>Added AVX and AVX512 <code>VAES*</code> and <code>VPCLMULQDQ</code>
-instructions.</p>
-</li>
-<li>
-<p>Fixed missing dwarf record in x32 ELF output format.</p>
-</li>
-</ul>
-<h4 id="section-C.1.14">C.1.14 Version 2.13.02</h4>
-<ul>
-<li>
-<p>Fix false positive in testing of numeric overflows.</p>
-</li>
-<li>
-<p>Fix generation of <code>PEXTRW</code> instruction.</p>
-</li>
-<li>
-<p>Fix <code>smartalign</code> package which could trigger an error during
-optimization if the alignment code expanded too much due to optimization of
-the previous code.</p>
-</li>
-<li>
-<p>Fix a case where negative value in <code>TIMES</code> directive causes
-panic instead of an error.</p>
-</li>
-<li>
-<p>Always finalize <code>.debug_abbrev</code> section with a null in
-<code>dwarf</code> output format.</p>
-</li>
-<li>
-<p>Support <code>debug</code> flag in section attributes for
-<code>macho</code> output format. See
-<a href="nasmdoc8.html#section-8.8.1">section 8.8.1</a>.</p>
-</li>
-<li>
-<p>Support up to 16 characters in section names for <code>macho</code>
-output format.</p>
-</li>
-<li>
-<p>Fix missing update of global <code>BITS</code> setting if
-<code>SECTION</code> directive specified a bit size using output
-format-specific extensions (e.g. <code>USE32</code> for the
-<code>obj</code> output format.)</p>
-</li>
-<li>
-<p>Fix the incorrect generation of VEX-encoded instruction when static mode
-decorators are specified on scalar instructions, losing the decorators as
-they require EVEX encoding.</p>
-</li>
-<li>
-<p>Option <code>-MW</code> to quote dependency outputs according to Watcom
-Make conventions instead of POSIX Make conventions. See
-<a href="nasmdoc2.html#section-2.1.12">section 2.1.12</a>.</p>
-</li>
-<li>
-<p>The <code>obj</code> output format now contains embedded dependency file
-information, unless disabled with <code>%pragma obj nodepend</code>. See
-<a href="nasmdoc8.html#section-8.4.9">section 8.4.9</a>.</p>
-</li>
-<li>
-<p>Fix generation of dependency lists.</p>
-</li>
-<li>
-<p>Fix a number of null pointer reference and memory allocation errors.</p>
-</li>
-<li>
-<p>Always generate symbol-relative relocations for the <code>macho64</code>
-output format; at least some versions of the XCode/LLVM linker fails for
-section-relative relocations.</p>
-</li>
-</ul>
-<h4 id="section-C.1.15">C.1.15 Version 2.13.01</h4>
-<ul>
-<li>
-<p>Fix incorrect output for some types of <code>FAR</code> or
-<code>SEG</code> references in the <code>obj</code> output format, and
-possibly other 16-bit output formats.</p>
-</li>
-<li>
-<p>Fix the address in the list file for an instruction containing a
-<code>TIMES</code> directive.</p>
-</li>
-<li>
-<p>Fix error with <code>TIMES</code> used together with an instruction
-which can vary in size, e.g. <code>JMP</code>.</p>
-</li>
-<li>
-<p>Fix breakage on some uses of the <code>DZ</code> pseudo-op.</p>
-</li>
-</ul>
-<h4 id="section-C.1.16">C.1.16 Version 2.13</h4>
-<ul>
-<li>
-<p>Support the official forms of the <code>UD0</code> and <code>UD1</code>
-instructions.</p>
-</li>
-<li>
-<p>Allow self-segment-relative expressions in immediates and displacements,
-even when combined with an external or otherwise out-of-segment special
-symbol, e.g.:</p>
-<pre>
-     extern foo 
-     mov eax,foo - $ + ebx               ; Now legal
-</pre>
-</li>
-<li>
-<p>Handle a 64-bit origin in NDISASM.</p>
-</li>
-<li>
-<p>NASM can now generate sparse output files for relevant output formats,
-if the underlying operating system supports them.</p>
-</li>
-<li>
-<p>The <code>macho</code> object format now supports the
-<code>subsections_via_symbols</code> and <code>no_dead_strip</code>
-directives, see <a href="nasmdoc8.html#section-8.8.4">section 8.8.4</a>.</p>
-</li>
-<li>
-<p>The <code>macho</code> object format now supports the
-<code>no_dead_strip</code>, <code>live_support</code> and
-<code>strip_static_syms</code> section flags, see
-<a href="nasmdoc8.html#section-8.8.1">section 8.8.1</a>.</p>
-</li>
-<li>
-<p>The <code>macho</code> object format now supports the <code>dwarf</code>
-debugging format, as required by newer toolchains.</p>
-</li>
-<li>
-<p>All warnings can now be suppressed if desired; warnings not otherwise
-part of any warning class are now considered its own warning class called
-<code>other</code> (e.g. <code>-w-other</code>). Furthermore,
-warning-as-error can now be controlled on a per warning class basis, using
-the syntax <code>-w+error=</code><em>warning-class</em> and its equivalent
-for all other warning control options. See
-<a href="nasmdoc2.html#section-2.1.26">section 2.1.26</a> for the
-command-line options and warning classes and
-<a href="nasmdoc7.html#section-7.13">section 7.13</a> for the
-<code>WARNING</code> directive.</p>
-</li>
-<li>
-<p>Fix a number of bugs related to AVX-512 decorators.</p>
-</li>
-<li>
-<p>Significant improvements to building NASM with Microsoft Visual Studio
-via <code>Mkfiles/msvc.mak</code>. It is now possible to build the full
-Windows installer binary as long as the necessary prerequisites are
-installed; see <code>Mkfiles/README</code></p>
-</li>
-<li>
-<p>To build NASM with custom modifications (table changes) or from the git
-tree now requires Perl 5.8 at the very minimum, quite possibly a higher
-version (Perl 5.24.1 tested.) There is no requirement to have Perl on your
-system at all if all you want to do is build unmodified NASM from source
-archives.</p>
-</li>
-<li>
-<p>Fix the <code>{z}</code> decorator on AVX-512 <code>VMOVDQ*</code>
-instructions.</p>
-</li>
-<li>
-<p>Add new warnings for certain dangerous constructs which never ought to
-have been allowed. In particular, the <code>RESB</code> family of
-instructions should have been taking a critical expression all along.</p>
-</li>
-<li>
-<p>Fix the EVEX (AVX-512) versions of the <code>VPBROADCAST</code>,
-<code>VPEXTR</code>, and <code>VPINSR</code> instructions.</p>
-</li>
-<li>
-<p>Support contracted forms of additional instructions. As a general rule,
-if an instruction has a non-destructive source immediately after a
-destination register that isn't used as an input, NASM supports omitting
-that source register, using the destination register as that value. This
-among other things makes it easier to convert SSE code to the equivalent
-AVX code:</p>
-<pre>
-     addps xmm1,xmm0                       ; SSE instruction 
-     vaddps ymm1,ymm1,ymm0                 ; AVX official long form 
-     vaddps ymm1,ymm0                      ; AVX contracted form
-</pre>
-</li>
-<li>
-<p>Fix Codeview malformed compiler version record.</p>
-</li>
-<li>
-<p>Add the <code>CLWB</code> and <code>PCOMMIT</code> instructions. Note
-that the <code>PCOMMIT</code> instruction has been deprecated and will
-never be included in a shipping product; it is included for completeness
-only.</p>
-</li>
-<li>
-<p>Add the <code>%pragma</code> preprocessor directive for soft-error
-directives.</p>
-</li>
-<li>
-<p>Add the <code>RDPID</code> instruction.</p>
-</li>
-</ul>
-<h4 id="section-C.1.17">C.1.17 Version 2.12.02</h4>
-<ul>
-<li>
-<p>Fix preprocessor errors, especially <code>%error</code> and
-<code>%warning</code>, inside <code>%if</code> statements.</p>
-</li>
-<li>
-<p>Fix relative relocations in 32-bit Mach-O.</p>
-</li>
-<li>
-<p>More Codeview debug format fixes.</p>
-</li>
-<li>
-<p>If the MASM <code>PTR</code> keyword is encountered, issue a warning.
-This is much more likely to indicate a MASM-ism encountered in NASM than it
-is a valid label. This warning can be suppressed with <code>-w-ptr</code>,
-the <code>warning</code> directive (see
-<a href="nasmdoc2.html#section-2.1.26">section 2.1.26</a>) or by the macro
-definition <code>%idefine ptr $%?</code> (see
-<a href="nasmdoc4.html#section-4.2.5">section 4.2.5</a>).</p>
-</li>
-<li>
-<p>When an error or a warning comes from the expansion of a multi-line
-macro, display the file and line numbers for the expanded macros. Macros
-defined with <code>.nolist</code> do not get displayed.</p>
-</li>
-<li>
-<p>Add macros <code>ilog2fw()</code> and <code>ilog2cw()</code> to the
-<code>ifunc</code> macro package. See
-<a href="nasmdoc6.html#section-6.4.1">section 6.4.1</a>.</p>
-</li>
-</ul>
-<h4 id="section-C.1.18">C.1.18 Version 2.12.01</h4>
-<ul>
-<li>
-<p>Portability fixes for some platforms.</p>
-</li>
-<li>
-<p>Fix error when not specifying a list file.</p>
-</li>
-<li>
-<p>Correct the handling of macro-local labels in the Codeview debugging
-format.</p>
-</li>
-<li>
-<p>Add <code>CLZERO</code>, <code>MONITORX</code> and <code>MWAITX</code>
-instructions.</p>
-</li>
-</ul>
-<h4 id="section-C.1.19">C.1.19 Version 2.12</h4>
-<ul>
-<li>
-<p>Major fixes to the <code>macho</code> backend
-(<a href="nasmdoc8.html#section-8.8">section 8.8</a>); earlier versions
-would produce invalid symbols and relocations on a regular basis.</p>
-</li>
-<li>
-<p>Support for thread-local storage in Mach-O.</p>
-</li>
-<li>
-<p>Support for arbitrary sections in Mach-O.</p>
-</li>
-<li>
-<p>Fix wrong negative size treated as a big positive value passed into
-backend causing NASM to crash.</p>
-</li>
-<li>
-<p>Fix handling of zero-extending unsigned relocations, we have been
-printing wrong message and forgot to assign segment with predefined value
-before passing it into output format.</p>
-</li>
-<li>
-<p>Fix potential write of oversized (with size greater than allowed in
-output format) relative relocations.</p>
-</li>
-<li>
-<p>Portability fixes for building NASM with the LLVM compiler.</p>
-</li>
-<li>
-<p>Add support of Codeview version 8 (<code>cv8</code>) debug format for
-<code>win32</code> and <code>win64</code> formats in the <code>COFF</code>
-backend, see <a href="nasmdoc8.html#section-8.5.3">section 8.5.3</a>.</p>
-</li>
-<li>
-<p>Allow 64-bit outputs in 16/32-bit only backends. Unsigned 64-bit
-relocations are zero-extended from 32-bits with a warning (suppressible via
-<code>-w-zext-reloc</code>); signed 64-bit relocations are an error.</p>
-</li>
-<li>
-<p>Line numbers in list files now correspond to the lines in the source
-files, instead of simply being sequential.</p>
-</li>
-<li>
-<p>There is now an official 64-bit (x64 a.k.a. x86-64) build for Windows.</p>
-</li>
-</ul>
-<h4 id="section-C.1.20">C.1.20 Version 2.11.09</h4>
-<ul>
-<li>
-<p>Fix potential stack overwrite in <code>macho32</code> backend.</p>
-</li>
-<li>
-<p>Fix relocation records in <code>macho64</code> backend.</p>
-</li>
-<li>
-<p>Fix symbol lookup computation in <code>macho64</code> backend.</p>
-</li>
-<li>
-<p>Adjust <code>.symtab</code> and <code>.rela.text</code> sections
-alignments to 8 bytes in <code>elf64</code> backed.</p>
-</li>
-<li>
-<p>Fix section length computation in <code>bin</code> backend which leaded
-in incorrect relocation records.</p>
-</li>
-</ul>
-<h4 id="section-C.1.21">C.1.21 Version 2.11.08</h4>
-<ul>
-<li>
-<p>Fix section length computation in <code>bin</code> backend which leaded
-in incorrect relocation records.</p>
-</li>
-<li>
-<p>Add a warning for numeric preprocessor definitions passed via command
-line which might have unexpected results otherwise.</p>
-</li>
-<li>
-<p>Add ability to specify a module name record in <code>rdoff</code> linker
-with <code>-mn</code> option.</p>
-</li>
-<li>
-<p>Increase label length capacity up to 256 bytes in <code>rdoff</code>
-backend for FreePascal sake, which tends to generate very long labels for
-procedures.</p>
-</li>
-<li>
-<p>Fix segmentation failure when rip addressing is used in
-<code>macho64</code> backend.</p>
-</li>
-<li>
-<p>Fix access on out of memory when handling strings with a single grave.
-We have sixed similar problem in previous release but not all cases were
-covered.</p>
-</li>
-<li>
-<p>Fix NULL dereference in disassembled on <code>BND</code> instruction.</p>
-</li>
-</ul>
-<h4 id="section-C.1.22">C.1.22 Version 2.11.07</h4>
-<ul>
-<li>
-<p>Fix 256 bit <code>VMOVNTPS</code> instruction.</p>
-</li>
-<li>
-<p>Fix <code>-MD</code> option handling, which was rather broken in
-previous release changing command line api.</p>
-</li>
-<li>
-<p>Fix access to uninitialized space when handling strings with a single
-grave.</p>
-</li>
-<li>
-<p>Fix nil dereference in handling memory reference parsing.</p>
-</li>
-</ul>
-<h4 id="section-C.1.23">C.1.23 Version 2.11.06</h4>
-<ul>
-<li>
-<p>Update AVX512 instructions based on the Extension Reference (319433-021
-Sept 2014).</p>
-</li>
-<li>
-<p>Fix the behavior of <code>-MF</code> and <code>-MD</code> options
-(Bugzilla 3392280)</p>
-</li>
-<li>
-<p>Updated Win32 Makefile to fix issue with build</p>
-</li>
-</ul>
-<h4 id="section-C.1.24">C.1.24 Version 2.11.05</h4>
-<ul>
-<li>
-<p>Add <code>--v</code> as an alias for <code>-v</code> (see
-<a href="nasmdoc2.html#section-2.1.27">section 2.1.27</a>), for
-command-line compatibility with Yasm.</p>
-</li>
-<li>
-<p>Fix a bug introduced in 2.11.03 whereby certain instructions would
-contain multiple REX prefixes, and thus be corrupt.</p>
-</li>
-</ul>
-<h4 id="section-C.1.25">C.1.25 Version 2.11.04</h4>
-<ul>
-<li>
-<p>Removed an invalid error checking code. Sometimes a memref only with a
-displacement can also set an evex flag. For example:</p>
-<pre>
-      vmovdqu32 0xabcd{k1}, zmm0
-</pre>
-</li>
-<li>
-<p>Fixed a bug in disassembler that EVEX.L'L vector length was not matched
-when EVEX.b was set because it was simply considered as EVEC.RC. Separated
-EVEX.L'L case from EVEX.RC which is ignored in matching.</p>
-</li>
-</ul>
-<h4 id="section-C.1.26">C.1.26 Version 2.11.03</h4>
-<ul>
-<li>
-<p>Fix a bug there REX prefixes were missing on instructions inside a
-<code>TIMES</code> statement.</p>
-</li>
-</ul>
-<h4 id="section-C.1.27">C.1.27 Version 2.11.02</h4>
-<ul>
-<li>
-<p>Add the <code>XSAVEC</code>, <code>XSAVES</code> and
-<code>XRSTORS</code> family instructions.</p>
-</li>
-<li>
-<p>Add the <code>CLFLUSHOPT</code> instruction.</p>
-</li>
-</ul>
-<h4 id="section-C.1.28">C.1.28 Version 2.11.01</h4>
-<ul>
-<li>
-<p>Allow instructions which implicitly uses <code>XMM0</code>
-(<code>VBLENDVPD</code>, <code>VBLENDVPS</code>, <code>PBLENDVB</code> and
-<code>SHA256RNDS2</code>) to be specified without an explicit
-<code>xmm0</code> on the assembly line. In other words, the following two
-lines produce the same output:</p>
-<pre>
-     vblendvpd xmm2,xmm1,xmm0      ; Last operand is fixed xmm0 
-     vblendvpd xmm2,xmm1           ; Implicit xmm0 omitted
-</pre>
-</li>
-<li>
-<p>In the ELF backends, don't crash the assembler if
-<code>section align</code> is specified without a value.</p>
-</li>
-</ul>
-<h4 id="section-C.1.29">C.1.29 Version 2.11</h4>
-<ul>
-<li>
-<p>Add support for the Intel AVX-512 instruction set:</p>
-</li>
-<li>
-<p>16 new, 512-bit SIMD registers. Total 32 <code>(ZMM0 ~ ZMM31)</code></p>
-</li>
-<li>
-<p>8 new opmask registers <code>(K0 ~ K7)</code>. One of 7 registers
-<code>(K1 ~ K7)</code> can be used as an opmask for conditional execution.</p>
-</li>
-<li>
-<p>A new EVEX encoding prefix. EVEX is based on VEX and provides more
-capabilities: opmasks, broadcasting, embedded rounding and compressed
-displacements.</p>
-<pre>
- - opmask 
-     VDIVPD zmm0{k1}{z}, zmm1, zmm3  ; conditional vector operation 
-                                     ; using opmask k1. 
-                                     ; {z} is for zero-masking 
- - broadcasting 
-     VDIVPS zmm4, zmm5, rbx{1to16} ; load single-precision float and 
-                                     ; replicate it 16 times. 32 * 16 = 512 
- - embedded rounding 
-     VCVTSI2SD xmm6, xmm7, {rz-sae}, rax ; round toward zero. note that it 
-                                      ; is used as if a separate operand. 
-                                      ; it comes after the last SIMD operand
-</pre>
-</li>
-<li>
-<p>Add support for <code>ZWORD</code> (512 bits), <code>DZ</code> and
-<code>RESZ</code>.</p>
-</li>
-<li>
-<p>Add support for the MPX and SHA instruction sets.</p>
-</li>
-<li>
-<p>Better handling of section redefinition.</p>
-</li>
-<li>
-<p>Generate manpages when running <code>'make dist'</code>.</p>
-</li>
-<li>
-<p>Handle all token chains in mmacro params range.</p>
-</li>
-<li>
-<p>Support split base,index effective address:</p>
-<pre>
-     mov eax,eax+8,ecx*4   ; eax=base, ecx=index, 4=scale, 8=disp
-</pre>
-</li>
-</ul>
-<p>This is expected to be most useful for the MPX instructions.</p>
-<ul>
-<li>
-<p>Support <code>BND</code> prefix for branch instructions (for MPX).</p>
-</li>
-<li>
-<p>The <code>DEFAULT</code> directive can now take <code>BND</code> and
-<code>NOBND</code> options to indicate whether all relevant branches should
-be getting <code>BND</code> prefixes. This is expected to be the normal for
-use in MPX code.</p>
-</li>
-<li>
-<p>Add <code>{evex}</code>, <code>{vex3}</code> and <code>{vex2}</code>
-instruction prefixes to have NASM encode the corresponding instruction, if
-possible, with an EVEX, 3-byte VEX, or 2-byte VEX prefix, respectively.</p>
-</li>
-<li>
-<p>Support for section names longer than 8 bytes in Win32/Win64 COFF.</p>
-</li>
-<li>
-<p>The <code>NOSPLIT</code> directive by itself no longer forces a single
-register to become an index register, unless it has an explicit multiplier.</p>
-<pre>
-     mov eax,nosplit eax       ; eax as base register 
-     mov eax,nosplit eax*1     ; eax as index register
-</pre>
-</li>
-</ul>
-<h4 id="section-C.1.30">C.1.30 Version 2.10.09</h4>
-<ul>
-<li>
-<p>Pregenerate man pages.</p>
-</li>
-</ul>
-<h4 id="section-C.1.31">C.1.31 Version 2.10.08</h4>
-<ul>
-<li>
-<p>Fix <code>VMOVNTDQA</code>, <code>MOVNTDQA</code> and
-<code>MOVLPD</code> instructions.</p>
-</li>
-<li>
-<p>Fix collision for <code>VGATHERQPS</code>, <code>VPGATHERQD</code>
-instructions.</p>
-</li>
-<li>
-<p>Fix <code>VPMOVSXBQ</code>, <code>VGATHERQPD</code>, <code>VSPLLW</code>
-instructions.</p>
-</li>
-<li>
-<p>Add a bunch of AMD TBM instructions.</p>
-</li>
-<li>
-<p>Fix potential stack overwrite in numbers conversion.</p>
-</li>
-<li>
-<p>Allow byte size in <code>PREFETCHTx</code> instructions.</p>
-</li>
-<li>
-<p>Make manual pages up to date.</p>
-</li>
-<li>
-<p>Make <code>F3</code> and <code>F2</code> SSE prefixes to override
-<code>66</code>.</p>
-</li>
-<li>
-<p>Support of AMD SVM instructions in 32 bit mode.</p>
-</li>
-<li>
-<p>Fix near offsets code generation for <code>JMP</code>, <code>CALL</code>
-instrictions in long mode.</p>
-</li>
-<li>
-<p>Fix preprocessor parse regression when id is expanding to a whitespace.</p>
-</li>
-</ul>
-<h4 id="section-C.1.32">C.1.32 Version 2.10.07</h4>
-<ul>
-<li>
-<p>Fix line continuation parsing being broken in previous version.</p>
-</li>
-</ul>
-<h4 id="section-C.1.33">C.1.33 Version 2.10.06</h4>
-<ul>
-<li>
-<p>Always quote the dependency source names when using the automatic
-dependency generation options.</p>
-</li>
-<li>
-<p>If no dependency target name is specified via the <code>-MT</code> or
-<code>-MQ</code> options, quote the default output name.</p>
-</li>
-<li>
-<p>Fix assembly of shift operations in <code>CPU 8086</code> mode.</p>
-</li>
-<li>
-<p>Fix incorrect generation of explicit immediate byte for shift by 1 under
-certain circumstances.</p>
-</li>
-<li>
-<p>Fix assembly of the <code>VPCMPGTQ</code> instruction.</p>
-</li>
-<li>
-<p>Fix RIP-relative relocations in the <code>macho64</code> backend.</p>
-</li>
-</ul>
-<h4 id="section-C.1.34">C.1.34 Version 2.10.05</h4>
-<ul>
-<li>
-<p>Add the <code>CLAC</code> and <code>STAC</code> instructions.</p>
-</li>
-</ul>
-<h4 id="section-C.1.35">C.1.35 Version 2.10.04</h4>
-<ul>
-<li>
-<p>Add back the inadvertently deleted 256-bit version of the
-<code>VORPD</code> instruction.</p>
-</li>
-<li>
-<p>Correct disassembly of instructions starting with byte <code>82</code>
-hex.</p>
-</li>
-<li>
-<p>Fix corner cases in token pasting, for example:</p>
-<pre>
-   %define N 1e%++%+ 5 
-           dd N, 1e+5
-</pre>
-</li>
-</ul>
-<h4 id="section-C.1.36">C.1.36 Version 2.10.03</h4>
-<ul>
-<li>
-<p>Correct the assembly of the instruction:</p>
-<pre>
-XRELEASE MOV absolute,AL
-</pre>
-<p>Previous versions would incorrectly generate <code>F3 A2</code> for this
-instruction and issue a warning; correct behavior is to emit
-<code>F3 88 05</code>.</p>
-</li>
-</ul>
-<h4 id="section-C.1.37">C.1.37 Version 2.10.02</h4>
-<ul>
-<li>
-<p>Add the <code>ifunc</code> macro package with integer functions,
-currently only integer logarithms. See
-<a href="nasmdoc6.html#section-6.4">section 6.4</a>.</p>
-</li>
-<li>
-<p>Add the <code>RDSEED</code>, <code>ADCX</code> and <code>ADOX</code>
-instructions.</p>
-</li>
-</ul>
-<h4 id="section-C.1.38">C.1.38 Version 2.10.01</h4>
-<ul>
-<li>
-<p>Add missing VPMOVMSKB instruction with reg32, ymmreg operands.</p>
-</li>
-</ul>
-<h4 id="section-C.1.39">C.1.39 Version 2.10</h4>
-<ul>
-<li>
-<p>When optimization is enabled, <code>mov r64,imm</code> now optimizes to
-the shortest form possible between:</p>
-<pre>
-     mov r32,imm32                   ;  5 bytes 
-     mov r64,imm32                   ;  7 bytes 
-     mov r64,imm64                   ; 10 bytes
-</pre>
-<p>To force a specific form, use the <code>STRICT</code> keyword, see
-<a href="nasmdoc3.html#section-3.7">section 3.7</a>.</p>
-</li>
-<li>
-<p>Add support for the Intel AVX2 instruction set.</p>
-</li>
-<li>
-<p>Add support for Bit Manipulation Instructions 1 and 2.</p>
-</li>
-<li>
-<p>Add support for Intel Transactional Synchronization Extensions (TSX).</p>
-</li>
-<li>
-<p>Add support for x32 ELF (32-bit ELF with the CPU in 64-bit mode.) See
-<a href="nasmdoc8.html#section-8.9">section 8.9</a>.</p>
-</li>
-<li>
-<p>Add support for bigendian UTF-16 and UTF-32. See
-<a href="nasmdoc3.html#section-3.4.5">section 3.4.5</a>.</p>
-</li>
-</ul>
-<h4 id="section-C.1.40">C.1.40 Version 2.09.10</h4>
-<ul>
-<li>
-<p>Fix up NSIS script to protect uninstaller against registry keys absence
-or corruption. It brings in a few additional questions to a user during
-deinstallation procedure but still it is better than unpredictable file
-removal.</p>
-</li>
-</ul>
-<h4 id="section-C.1.41">C.1.41 Version 2.09.09</h4>
-<ul>
-<li>
-<p>Fix initialization of section attributes of <code>bin</code> output
-format.</p>
-</li>
-<li>
-<p>Fix <code>mach64</code> output format bug that crashes NASM due to NULL
-symbols.</p>
-</li>
-</ul>
-<h4 id="section-C.1.42">C.1.42 Version 2.09.08</h4>
-<ul>
-<li>
-<p>Fix <code>__OUTPUT_FORMAT__</code> assignment when output driver alias
-is used. For example when <code>-f elf</code> is used
-<code>__OUTPUT_FORMAT__</code> must be set to <code>elf</code>, if
-<code>-f elf32</code> is used <code>__OUTPUT_FORMAT__</code> must be
-assigned accordingly, i.e. to <code>elf32</code>. The rule applies to all
-output driver aliases. See <a href="nasmdoc5.html#section-5.4">section
-5.4</a>.</p>
-</li>
-</ul>
-<h4 id="section-C.1.43">C.1.43 Version 2.09.07</h4>
-<ul>
-<li>
-<p>Fix attempts to close same file several times when <code>-a</code>
-option is used.</p>
-</li>
-<li>
-<p>Fixes for VEXTRACTF128, VMASKMOVPS encoding.</p>
-</li>
-</ul>
-<h4 id="section-C.1.44">C.1.44 Version 2.09.06</h4>
-<ul>
-<li>
-<p>Fix missed section attribute initialization in <code>bin</code> output
-target.</p>
-</li>
-</ul>
-<h4 id="section-C.1.45">C.1.45 Version 2.09.05</h4>
-<ul>
-<li>
-<p>Fix arguments encoding for VPEXTRW instruction.</p>
-</li>
-<li>
-<p>Remove invalid form of VPEXTRW instruction.</p>
-</li>
-<li>
-<p>Add <code>VLDDQU</code> as alias for <code>VLDQQU</code> to match
-specification.</p>
-</li>
-</ul>
-<h4 id="section-C.1.46">C.1.46 Version 2.09.04</h4>
-<ul>
-<li>
-<p>Fix incorrect labels offset for VEX instructions.</p>
-</li>
-<li>
-<p>Eliminate bogus warning on implicit operand size override.</p>
-</li>
-<li>
-<p><code>%if</code> term could not handle 64 bit numbers.</p>
-</li>
-<li>
-<p>The COFF backend was limiting relocations number to 16 bits even if in
-real there were a way more relocations.</p>
-</li>
-</ul>
-<h4 id="section-C.1.47">C.1.47 Version 2.09.03</h4>
-<ul>
-<li>
-<p>Print <code>%macro</code> name inside <code>%rep</code> blocks on error.</p>
-</li>
-<li>
-<p>Fix preprocessor expansion behaviour. It happened sometime too early and
-sometime simply wrong. Move behaviour back to the origins (down to NASM
-2.05.01).</p>
-</li>
-<li>
-<p>Fix uninitialized data dereference on OMF output format.</p>
-</li>
-<li>
-<p>Issue warning on unterminated <code>%{</code> construct.</p>
-</li>
-<li>
-<p>Fix for documentation typo.</p>
-</li>
-</ul>
-<h4 id="section-C.1.48">C.1.48 Version 2.09.02</h4>
-<ul>
-<li>
-<p>Fix reversed tokens when <code>%deftok</code> produces more than one
-output token.</p>
-</li>
-<li>
-<p>Fix segmentation fault on disassembling some VEX instructions.</p>
-</li>
-<li>
-<p>Missing <code>%endif</code> did not always cause error.</p>
-</li>
-<li>
-<p>Fix typo in documentation.</p>
-</li>
-<li>
-<p>Compound context local preprocessor single line macro identifiers were
-not expanded early enough and as result lead to unresolved symbols.</p>
-</li>
-</ul>
-<h4 id="section-C.1.49">C.1.49 Version 2.09.01</h4>
-<ul>
-<li>
-<p>Fix NULL dereference on missed %deftok second parameter.</p>
-</li>
-<li>
-<p>Fix NULL dereference on invalid %substr parameters.</p>
-</li>
-</ul>
-<h4 id="section-C.1.50">C.1.50 Version 2.09</h4>
-<ul>
-<li>
-<p>Fixed assignment the magnitude of <code>%rep</code> counter. It is
-limited to 62 bits now.</p>
-</li>
-<li>
-<p>Fixed NULL dereference if argument of <code>%strlen</code> resolves to
-whitespace. For example if nonexistent macro parameter is used.</p>
-</li>
-<li>
-<p><code>%ifenv</code>, <code>%elifenv</code>, <code>%ifnenv</code>, and
-<code>%elifnenv</code> directives introduced. See
-<a href="nasmdoc4.html#section-4.6.9">section 4.6.9</a>.</p>
-</li>
-<li>
-<p>Fixed NULL dereference if environment variable is missed.</p>
-</li>
-<li>
-<p>Updates of new AVX v7 Intel instructions.</p>
-</li>
-<li>
-<p><code>PUSH imm32</code> is now officially documented.</p>
-</li>
-<li>
-<p>Fix for encoding the LFS, LGS and LSS in 64-bit mode.</p>
-</li>
-<li>
-<p>Fixes for compatibility with OpenWatcom compiler and DOS 8.3 file format
-limitation.</p>
-</li>
-<li>
-<p>Macros parameters range expansion introduced. See
-<a href="nasmdoc4.html#section-4.5.4">section 4.5.4</a>.</p>
-</li>
-<li>
-<p>Backward compatibility on expanging of local single macros restored.</p>
-</li>
-<li>
-<p>8 bit relocations for <code>elf</code> and <code>bin</code> output
-formats are introduced.</p>
-</li>
-<li>
-<p>Short intersegment jumps are permitted now.</p>
-</li>
-<li>
-<p>An alignment more than 64 bytes are allowed for <code>win32</code>,
-<code>win64</code> output formats.</p>
-</li>
-<li>
-<p><code>SECTALIGN</code> directive introduced. See
-<a href="nasmdoc5.html#section-5.10.2">section 5.10.2</a>.</p>
-</li>
-<li>
-<p><code>nojmp</code> option introduced in <code>smartalign</code> package.
-See <a href="nasmdoc6.html#section-6.2">section 6.2</a>.</p>
-</li>
-<li>
-<p>Short aliases <code>win</code>, <code>elf</code> and <code>macho</code>
-for output formats are introduced. Each stands for <code>win32</code>,
-<code>elf32</code> and <code>macho32</code> accordingly.</p>
-</li>
-<li>
-<p>Faster handling of missing directives implemented.</p>
-</li>
-<li>
-<p>Various small improvements in documentation.</p>
-</li>
-<li>
-<p>No hang anymore if unable to open malloc.log file.</p>
-</li>
-<li>
-<p>The environments without vsnprintf function are able to build nasm
-again.</p>
-</li>
-<li>
-<p>AMD LWP instructions updated.</p>
-</li>
-<li>
-<p>Tighten EA checks. We warn a user if there overflow in EA addressing.</p>
-</li>
-<li>
-<p>Make <code>-Ox</code> the default optimization level. For the legacy
-behavior, specify <code>-O0</code> explicitly. See
-<a href="nasmdoc2.html#section-2.1.24">section 2.1.24</a>.</p>
-</li>
-<li>
-<p>Environment variables read with <code>%!</code> or tested with
-<code>%ifenv</code> can now contain non-identifier characters if surrounded
-by quotes. See <a href="nasmdoc4.html#section-4.13.2">section 4.13.2</a>.</p>
-</li>
-<li>
-<p>Add a new standard macro package <code>%use fp</code> for floating-point
-convenience macros. See <a href="nasmdoc6.html#section-6.3">section
-6.3</a>.</p>
-</li>
-</ul>
-<h4 id="section-C.1.51">C.1.51 Version 2.08.02</h4>
-<ul>
-<li>
-<p>Fix crash under certain circumstances when using the <code>%+</code>
-operator.</p>
-</li>
-</ul>
-<h4 id="section-C.1.52">C.1.52 Version 2.08.01</h4>
-<ul>
-<li>
-<p>Fix the <code>%use</code> statement, which was broken in 2.08.</p>
-</li>
-</ul>
-<h4 id="section-C.1.53">C.1.53 Version 2.08</h4>
-<ul>
-<li>
-<p>A number of enhancements/fixes in macros area.</p>
-</li>
-<li>
-<p>Support for converting strings to tokens. See
-<a href="nasmdoc4.html#section-4.2.10">section 4.2.10</a>.</p>
-</li>
-<li>
-<p>Fuzzy operand size logic introduced.</p>
-</li>
-<li>
-<p>Fix COFF stack overrun on too long export identifiers.</p>
-</li>
-<li>
-<p>Fix Macho-O alignment bug.</p>
-</li>
-<li>
-<p>Fix crashes with &ndash;fwin32 on file with many exports.</p>
-</li>
-<li>
-<p>Fix stack overrun for too long DEBUG id.</p>
-</li>
-<li>
-<p>Fix incorrect sbyte usage in IMUL (hit only if optimization flag
-passed).</p>
-</li>
-<li>
-<p>Append ending token for <code>.stabs</code> records in the ELF output
-format.</p>
-</li>
-<li>
-<p>New NSIS script which uses ModernUI and MultiUser approach.</p>
-</li>
-<li>
-<p>Visual Studio 2008 NASM integration (rules file).</p>
-</li>
-<li>
-<p>Warn a user if a constant is too long (and as result will be stripped).</p>
-</li>
-<li>
-<p>The obsoleted pre-XOP AMD SSE5 instruction set which was never
-actualized was removed.</p>
-</li>
-<li>
-<p>Fix stack overrun on too long error file name passed from the command
-line.</p>
-</li>
-<li>
-<p>Bind symbols to the .text section by default (ie in case if SECTION
-directive was omitted) in the ELF output format.</p>
-</li>
-<li>
-<p>Fix sync points array index wrapping.</p>
-</li>
-<li>
-<p>A few fixes for FMA4 and XOP instruction templates.</p>
-</li>
-<li>
-<p>Add AMD Lightweight Profiling (LWP) instructions.</p>
-</li>
-<li>
-<p>Fix the offset for <code>%arg</code> in 64-bit mode.</p>
-</li>
-<li>
-<p>An undefined local macro (<code>%$</code>) no longer matches a global
-macro with the same name.</p>
-</li>
-<li>
-<p>Fix NULL dereference on too long local labels.</p>
-</li>
-</ul>
-<h4 id="section-C.1.54">C.1.54 Version 2.07</h4>
-<ul>
-<li>
-<p>NASM is now under the 2-clause BSD license. See
-<a href="nasmdoc1.html#section-1.1.1">section 1.1.1</a>.</p>
-</li>
-<li>
-<p>Fix the section type for the <code>.strtab</code> section in the
-<code>elf64</code> output format.</p>
-</li>
-<li>
-<p>Fix the handling of <code>COMMON</code> directives in the
-<code>obj</code> output format.</p>
-</li>
-<li>
-<p>New <code>ith</code> and <code>srec</code> output formats; these are
-variants of the <code>bin</code> output format which output Intel hex and
-Motorola S-records, respectively. See
-<a href="nasmdoc8.html#section-8.2">section 8.2</a> and
-<a href="nasmdoc8.html#section-8.3">section 8.3</a>.</p>
-</li>
-<li>
-<p><code>rdf2ihx</code> replaced with an enhanced <code>rdf2bin</code>,
-which can output binary, COM, Intel hex or Motorola S-records.</p>
-</li>
-<li>
-<p>The Windows installer now puts the NASM directory first in the
-<code>PATH</code> of the "NASM Shell".</p>
-</li>
-<li>
-<p>Revert the early expansion behavior of <code>%+</code> to pre-2.06
-behavior: <code>%+</code> is only expanded late.</p>
-</li>
-<li>
-<p>Yet another Mach-O alignment fix.</p>
-</li>
-<li>
-<p>Don't delete the list file on errors. Also, include error and warning
-information in the list file.</p>
-</li>
-<li>
-<p>Support for 64-bit Mach-O output, see
-<a href="nasmdoc8.html#section-8.8">section 8.8</a>.</p>
-</li>
-<li>
-<p>Fix assert failure on certain operations that involve strings with
-high-bit bytes.</p>
-</li>
-</ul>
-<h4 id="section-C.1.55">C.1.55 Version 2.06</h4>
-<ul>
-<li>
-<p>This release is dedicated to the memory of Charles A. Crayne, long time
-NASM developer as well as moderator of <code>comp.lang.asm.x86</code> and
-author of the book <em>Serious Assembler</em>. We miss you, Chuck.</p>
-</li>
-<li>
-<p>Support for indirect macro expansion (<code>%...</code>). See
-<a href="nasmdoc4.html#section-4.2.3">section 4.2.3</a>.</p>
-</li>
-<li>
-<p><code>%pop</code> can now take an argument, see
-<a href="nasmdoc4.html#section-4.9.1">section 4.9.1</a>.</p>
-</li>
-<li>
-<p>The argument to <code>%use</code> is no longer macro-expanded. Use
-<code>%...</code> if macro expansion is desired.</p>
-</li>
-<li>
-<p>Support for thread-local storage in ELF32 and ELF64. See
-<a href="nasmdoc8.html#section-8.9.4">section 8.9.4</a>.</p>
-</li>
-<li>
-<p>Fix crash on <code>%ifmacro</code> without an argument.</p>
-</li>
-<li>
-<p>Correct the arguments to the <code>POPCNT</code> instruction.</p>
-</li>
-<li>
-<p>Fix section alignment in the Mach-O format.</p>
-</li>
-<li>
-<p>Update AVX support to version 5 of the Intel specification.</p>
-</li>
-<li>
-<p>Fix the handling of accesses to context-local macros from higher levels
-in the context stack.</p>
-</li>
-<li>
-<p>Treat <code>WAIT</code> as a prefix rather than as an instruction,
-thereby allowing constructs like <code>O16 FSAVE</code> to work correctly.</p>
-</li>
-<li>
-<p>Support for structures with a non-zero base offset. See
-<a href="nasmdoc5.html#section-5.9.1">section 5.9.1</a>.</p>
-</li>
-<li>
-<p>Correctly handle preprocessor token concatenation (see
-<a href="nasmdoc4.html#section-4.5.9">section 4.5.9</a>) involving
-floating-point numbers.</p>
-</li>
-<li>
-<p>The <code>PINSR</code> series of instructions have been corrected and
-rationalized.</p>
-</li>
-<li>
-<p>Removed AMD SSE5, replaced with the new XOP/FMA4/CVT16 (rev 3.03) spec.</p>
-</li>
-<li>
-<p>The ELF backends no longer automatically generate a
-<code>.comment</code> section.</p>
-</li>
-<li>
-<p>Add additional "well-known" ELF sections with default attributes. See
-<a href="nasmdoc8.html#section-8.9.2">section 8.9.2</a>.</p>
-</li>
-</ul>
-<h4 id="section-C.1.56">C.1.56 Version 2.05.01</h4>
-<ul>
-<li>
-<p>Fix the <code>-w</code>/<code>-W</code> option parsing, which was broken
-in NASM 2.05.</p>
-</li>
-</ul>
-<h4 id="section-C.1.57">C.1.57 Version 2.05</h4>
-<ul>
-<li>
-<p>Fix redundant REX.W prefix on <code>JMP reg64</code>.</p>
-</li>
-<li>
-<p>Make the behaviour of <code>-O0</code> match NASM 0.98 legacy behavior.
-See <a href="nasmdoc2.html#section-2.1.24">section 2.1.24</a>.</p>
-</li>
-<li>
-<p><code>-w-user</code> can be used to suppress the output of
-<code>%warning</code> directives. See
-<a href="nasmdoc2.html#section-2.1.26">section 2.1.26</a>.</p>
-</li>
-<li>
-<p>Fix bug where <code>ALIGN</code> would issue a full alignment datum
-instead of zero bytes.</p>
-</li>
-<li>
-<p>Fix offsets in list files.</p>
-</li>
-<li>
-<p>Fix <code>%include</code> inside multi-line macros or loops.</p>
-</li>
-<li>
-<p>Fix error where NASM would generate a spurious warning on valid
-optimizations of immediate values.</p>
-</li>
-<li>
-<p>Fix arguments to a number of the <code>CVT</code> SSE instructions.</p>
-</li>
-<li>
-<p>Fix RIP-relative offsets when the instruction carries an immediate.</p>
-</li>
-<li>
-<p>Massive overhaul of the ELF64 backend for spec compliance.</p>
-</li>
-<li>
-<p>Fix the Geode <code>PFRCPV</code> and <code>PFRSQRTV</code> instruction.</p>
-</li>
-<li>
-<p>Fix the SSE 4.2 <code>CRC32</code> instruction.</p>
-</li>
-</ul>
-<h4 id="section-C.1.58">C.1.58 Version 2.04</h4>
-<ul>
-<li>
-<p>Sanitize macro handing in the <code>%error</code> directive.</p>
-</li>
-<li>
-<p>New <code>%warning</code> directive to issue user-controlled warnings.</p>
-</li>
-<li>
-<p><code>%error</code> directives are now deferred to the final assembly
-phase.</p>
-</li>
-<li>
-<p>New <code>%fatal</code> directive to immediately terminate assembly.</p>
-</li>
-<li>
-<p>New <code>%strcat</code> directive to join quoted strings together.</p>
-</li>
-<li>
-<p>New <code>%use</code> macro directive to support standard macro
-directives. See <a href="nasmdoc4.html#section-4.8.4">section 4.8.4</a>.</p>
-</li>
-<li>
-<p>Excess default parameters to <code>%macro</code> now issues a warning by
-default. See <a href="nasmdoc4.html#section-4.5">section 4.5</a>.</p>
-</li>
-<li>
-<p>Fix <code>%ifn</code> and <code>%elifn</code>.</p>
-</li>
-<li>
-<p>Fix nested <code>%else</code> clauses.</p>
-</li>
-<li>
-<p>Correct the handling of nested <code>%rep</code>s.</p>
-</li>
-<li>
-<p>New <code>%unmacro</code> directive to undeclare a multi-line macro. See
-<a href="nasmdoc4.html#section-4.5.12">section 4.5.12</a>.</p>
-</li>
-<li>
-<p>Builtin macro <code>__PASS__</code> which expands to the current
-assembly pass. See <a href="nasmdoc5.html#section-5.8">section 5.8</a>.</p>
-</li>
-<li>
-<p><code>__utf16__</code> and <code>__utf32__</code> operators to generate
-UTF-16 and UTF-32 strings. See
-<a href="nasmdoc3.html#section-3.4.5">section 3.4.5</a>.</p>
-</li>
-<li>
-<p>Fix bug in case-insensitive matching when compiled on platforms that
-don't use the <code>configure</code> script. Of the official release
-binaries, that only affected the OS/2 binary.</p>
-</li>
-<li>
-<p>Support for x87 packed BCD constants. See
-<a href="nasmdoc3.html#section-3.4.7">section 3.4.7</a>.</p>
-</li>
-<li>
-<p>Correct the <code>LTR</code> and <code>SLDT</code> instructions in
-64-bit mode.</p>
-</li>
-<li>
-<p>Fix unnecessary REX.W prefix on indirect jumps in 64-bit mode.</p>
-</li>
-<li>
-<p>Add AVX versions of the AES instructions (<code>VAES</code>...).</p>
-</li>
-<li>
-<p>Fix the 256-bit FMA instructions.</p>
-</li>
-<li>
-<p>Add 256-bit AVX stores per the latest AVX spec.</p>
-</li>
-<li>
-<p>VIA XCRYPT instructions can now be written either with or without
-<code>REP</code>, apparently different versions of the VIA spec wrote them
-differently.</p>
-</li>
-<li>
-<p>Add missing 64-bit <code>MOVNTI</code> instruction.</p>
-</li>
-<li>
-<p>Fix the operand size of <code>VMREAD</code> and <code>VMWRITE</code>.</p>
-</li>
-<li>
-<p>Numerous bug fixes, especially to the AES, AVX and VTX instructions.</p>
-</li>
-<li>
-<p>The optimizer now always runs until it converges. It also runs even when
-disabled, but doesn't optimize. This allows most forward references to be
-resolved properly.</p>
-</li>
-<li>
-<p><code>%push</code> no longer needs a context identifier; omitting the
-context identifier results in an anonymous context.</p>
-</li>
-</ul>
-<h4 id="section-C.1.59">C.1.59 Version 2.03.01</h4>
-<ul>
-<li>
-<p>Fix buffer overflow in the listing module.</p>
-</li>
-<li>
-<p>Fix the handling of hexadecimal escape codes in `...` strings.</p>
-</li>
-<li>
-<p>The Postscript/PDF documentation has been reformatted.</p>
-</li>
-<li>
-<p>The <code>-F</code> option now implies <code>-g</code>.</p>
-</li>
-</ul>
-<h4 id="section-C.1.60">C.1.60 Version 2.03</h4>
-<ul>
-<li>
-<p>Add support for Intel AVX, CLMUL and FMA instructions, including YMM
-registers.</p>
-</li>
-<li>
-<p><code>dy</code>, <code>resy</code> and <code>yword</code> for 32-byte
-operands.</p>
-</li>
-<li>
-<p>Fix some SSE5 instructions.</p>
-</li>
-<li>
-<p>Intel <code>INVEPT</code>, <code>INVVPID</code> and <code>MOVBE</code>
-instructions.</p>
-</li>
-<li>
-<p>Fix checking for critical expressions when the optimizer is enabled.</p>
-</li>
-<li>
-<p>Support the DWARF debugging format for ELF targets.</p>
-</li>
-<li>
-<p>Fix optimizations of signed bytes.</p>
-</li>
-<li>
-<p>Fix operation on bigendian machines.</p>
-</li>
-<li>
-<p>Fix buffer overflow in the preprocessor.</p>
-</li>
-<li>
-<p><code>SAFESEH</code> support for Win32, <code>IMAGEREL</code> for Win64
-(SEH).</p>
-</li>
-<li>
-<p><code>%?</code> and <code>%??</code> to refer to the name of a macro
-itself. In particular, <code>%idefine keyword $%?</code> can be used to
-make a keyword "disappear".</p>
-</li>
-<li>
-<p>New options for dependency generation: <code>-MD</code>,
-<code>-MF</code>, <code>-MP</code>, <code>-MT</code>, <code>-MQ</code>.</p>
-</li>
-<li>
-<p>New preprocessor directives <code>%pathsearch</code> and
-<code>%depend</code>; INCBIN reimplemented as a macro.</p>
-</li>
-<li>
-<p><code>%include</code> now resolves macros in a sane manner.</p>
-</li>
-<li>
-<p><code>%substr</code> can now be used to get other than one-character
-substrings.</p>
-</li>
-<li>
-<p>New type of character/string constants, using backquotes
-(<code>`...`</code>), which support C-style escape sequences.</p>
-</li>
-<li>
-<p><code>%defstr</code> and <code>%idefstr</code> to stringize macro
-definitions before creation.</p>
-</li>
-<li>
-<p>Fix forward references used in <code>EQU</code> statements.</p>
-</li>
-</ul>
-<h4 id="section-C.1.61">C.1.61 Version 2.02</h4>
-<ul>
-<li>
-<p>Additional fixes for MMX operands with explicit <code>qword</code>, as
-well as (hopefully) SSE operands with <code>oword</code>.</p>
-</li>
-<li>
-<p>Fix handling of truncated strings with <code>DO</code>.</p>
-</li>
-<li>
-<p>Fix segfaults due to memory overwrites when floating-point constants
-were used.</p>
-</li>
-<li>
-<p>Fix segfaults due to missing include files.</p>
-</li>
-<li>
-<p>Fix OpenWatcom Makefiles for DOS and OS/2.</p>
-</li>
-<li>
-<p>Add autogenerated instruction list back into the documentation.</p>
-</li>
-<li>
-<p>ELF: Fix segfault when generating stabs, and no symbols have been
-defined.</p>
-</li>
-<li>
-<p>ELF: Experimental support for DWARF debugging information.</p>
-</li>
-<li>
-<p>New compile date and time standard macros.</p>
-</li>
-<li>
-<p><code>%ifnum</code> now returns true for negative numbers.</p>
-</li>
-<li>
-<p>New <code>%iftoken</code> test for a single token.</p>
-</li>
-<li>
-<p>New <code>%ifempty</code> test for empty expansion.</p>
-</li>
-<li>
-<p>Add support for the <code>XSAVE</code> instruction group.</p>
-</li>
-<li>
-<p>Makefile for Netware/gcc.</p>
-</li>
-<li>
-<p>Fix issue with some warnings getting emitted way too many times.</p>
-</li>
-<li>
-<p>Autogenerated instruction list added to the documentation.</p>
-</li>
-</ul>
-<h4 id="section-C.1.62">C.1.62 Version 2.01</h4>
-<ul>
-<li>
-<p>Fix the handling of MMX registers with explicit <code>qword</code> tags
-on memory (broken in 2.00 due to 64-bit changes.)</p>
-</li>
-<li>
-<p>Fix the PREFETCH instructions.</p>
-</li>
-<li>
-<p>Fix the documentation.</p>
-</li>
-<li>
-<p>Fix debugging info when using <code>-f elf</code> (backwards
-compatibility alias for <code>-f elf32</code>).</p>
-</li>
-<li>
-<p>Man pages for rdoff tools (from the Debian project.)</p>
-</li>
-<li>
-<p>ELF: handle large numbers of sections.</p>
-</li>
-<li>
-<p>Fix corrupt output when the optimizer runs out of passes.</p>
-</li>
-</ul>
-<h4 id="section-C.1.63">C.1.63 Version 2.00</h4>
-<ul>
-<li>
-<p>Added c99 data-type compliance.</p>
-</li>
-<li>
-<p>Added general x86-64 support.</p>
-</li>
-<li>
-<p>Added win64 (x86-64 COFF) output format.</p>
-</li>
-<li>
-<p>Added <code>__BITS__</code> standard macro.</p>
-</li>
-<li>
-<p>Renamed the <code>elf</code> output format to <code>elf32</code> for
-clarity.</p>
-</li>
-<li>
-<p>Added <code>elf64</code> and <code>macho</code> (MacOS X) output
-formats.</p>
-</li>
-<li>
-<p>Added Numeric constants in <code>dq</code> directive.</p>
-</li>
-<li>
-<p>Added <code>oword</code>, <code>do</code> and <code>reso</code> pseudo
-operands.</p>
-</li>
-<li>
-<p>Allow underscores in numbers.</p>
-</li>
-<li>
-<p>Added 8-, 16- and 128-bit floating-point formats.</p>
-</li>
-<li>
-<p>Added binary, octal and hexadecimal floating-point.</p>
-</li>
-<li>
-<p>Correct the generation of floating-point constants.</p>
-</li>
-<li>
-<p>Added floating-point option control.</p>
-</li>
-<li>
-<p>Added Infinity and NaN floating point support.</p>
-</li>
-<li>
-<p>Added ELF Symbol Visibility support.</p>
-</li>
-<li>
-<p>Added setting OSABI value in ELF header directive.</p>
-</li>
-<li>
-<p>Added Generate Makefile Dependencies option.</p>
-</li>
-<li>
-<p>Added Unlimited Optimization Passes option.</p>
-</li>
-<li>
-<p>Added <code>%IFN</code> and <code>%ELIFN</code> support.</p>
-</li>
-<li>
-<p>Added Logical Negation Operator.</p>
-</li>
-<li>
-<p>Enhanced Stack Relative Preprocessor Directives.</p>
-</li>
-<li>
-<p>Enhanced ELF Debug Formats.</p>
-</li>
-<li>
-<p>Enhanced Send Errors to a File option.</p>
-</li>
-<li>
-<p>Added SSSE3, SSE4.1, SSE4.2, SSE5 support.</p>
-</li>
-<li>
-<p>Added a large number of additional instructions.</p>
-</li>
-<li>
-<p>Significant performance improvements.</p>
-</li>
-<li>
-<p><code>-w+warning</code> and <code>-w-warning</code> can now be written
-as &ndash;Wwarning and &ndash;Wno-warning, respectively. See
-<a href="nasmdoc2.html#section-2.1.26">section 2.1.26</a>.</p>
-</li>
-<li>
-<p>Add <code>-w+error</code> to treat warnings as errors. See
-<a href="nasmdoc2.html#section-2.1.26">section 2.1.26</a>.</p>
-</li>
-<li>
-<p>Add <code>-w+all</code> and <code>-w-all</code> to enable or disable all
-suppressible warnings. See <a href="nasmdoc2.html#section-2.1.26">section
-2.1.26</a>.</p>
-</li>
-</ul>
-<h3 id="section-C.2">C.2 NASM 0.98 Series</h3>
-<p>The 0.98 series was the production versions of NASM from 1999 to 2007.</p>
-<h4 id="section-C.2.1">C.2.1 Version 0.98.39</h4>
-<ul>
-<li>
-<p>fix buffer overflow</p>
-</li>
-<li>
-<p>fix outas86's <code>.bss</code> handling</p>
-</li>
-<li>
-<p>"make spotless" no longer deletes config.h.in.</p>
-</li>
-<li>
-<p><code>%(el)if(n)idn</code> insensitivity to string quotes difference
-(#809300).</p>
-</li>
-<li>
-<p>(nasm.c)<code>__OUTPUT_FORMAT__</code> changed to string value instead
-of symbol.</p>
-</li>
-</ul>
-<h4 id="section-C.2.2">C.2.2 Version 0.98.38</h4>
-<ul>
-<li>
-<p>Add Makefile for 16-bit DOS binaries under OpenWatcom, and modify
-<code>mkdep.pl</code> to be able to generate completely pathless
-dependencies, as required by OpenWatcom wmake (it supports path searches,
-but not explicit paths.)</p>
-</li>
-<li>
-<p>Fix the <code>STR</code> instruction.</p>
-</li>
-<li>
-<p>Fix the ELF output format, which was broken under certain circumstances
-due to the addition of stabs support.</p>
-</li>
-<li>
-<p>Quick-fix Borland format debug-info for <code>-f obj</code></p>
-</li>
-<li>
-<p>Fix for <code>%rep</code> with no arguments (#560568)</p>
-</li>
-<li>
-<p>Fix concatenation of preprocessor function call (#794686)</p>
-</li>
-<li>
-<p>Fix long label causes coredump (#677841)</p>
-</li>
-<li>
-<p>Use autoheader as well as autoconf to keep configure from generating
-ridiculously long command lines.</p>
-</li>
-<li>
-<p>Make sure that all of the formats which support debugging output
-actually will suppress debugging output when <code>-g</code> not specified.</p>
-</li>
-</ul>
-<h4 id="section-C.2.3">C.2.3 Version 0.98.37</h4>
-<ul>
-<li>
-<p>Paths given in <code>-I</code> switch searched for
-<code>incbin</code>&ndash;ed as well as <code>%include</code>&ndash;ed
-files.</p>
-</li>
-<li>
-<p>Added stabs debugging for the ELF output format, patch from Martin
-Wawro.</p>
-</li>
-<li>
-<p>Fix <code>output/outbin.c</code> to allow origin &gt; 80000000h.</p>
-</li>
-<li>
-<p>Make <code>-U</code> switch work.</p>
-</li>
-<li>
-<p>Fix the use of relative offsets with explicit prefixes, e.g.
-<code>a32 loop foo</code>.</p>
-</li>
-<li>
-<p>Remove <code>backslash()</code>.</p>
-</li>
-<li>
-<p>Fix the <code>SMSW</code> and <code>SLDT</code> instructions.</p>
-</li>
-<li>
-<p><code>-O2</code> and <code>-O3</code> are no longer aliases for
-<code>-O10</code> and <code>-O15</code>. If you mean the latter, please say
-so! :)</p>
-</li>
-</ul>
-<h4 id="section-C.2.4">C.2.4 Version 0.98.36</h4>
-<ul>
-<li>
-<p>Update rdoff &ndash; librarian/archiver &ndash; common rec &ndash; docs!</p>
-</li>
-<li>
-<p>Fix signed/unsigned problems.</p>
-</li>
-<li>
-<p>Fix <code>JMP FAR label</code> and <code>CALL FAR label</code>.</p>
-</li>
-<li>
-<p>Add new multisection support &ndash; map files &ndash; fix align bug</p>
-</li>
-<li>
-<p>Fix sysexit, movhps/movlps reg,reg bugs in insns.dat</p>
-</li>
-<li>
-<p><code>Q</code> or <code>O</code> suffixes indicate octal</p>
-</li>
-<li>
-<p>Support Prescott new instructions (PNI).</p>
-</li>
-<li>
-<p>Cyrix <code>XSTORE</code> instruction.</p>
-</li>
-</ul>
-<h4 id="section-C.2.5">C.2.5 Version 0.98.35</h4>
-<ul>
-<li>
-<p>Fix build failure on 16-bit DOS (Makefile.bc3 workaround for compiler
-bug.)</p>
-</li>
-<li>
-<p>Fix dependencies and compiler warnings.</p>
-</li>
-<li>
-<p>Add "const" in a number of places.</p>
-</li>
-<li>
-<p>Add &ndash;X option to specify error reporting format (use &ndash;Xvc to
-integrate with Microsoft Visual Studio.)</p>
-</li>
-<li>
-<p>Minor changes for code legibility.</p>
-</li>
-<li>
-<p>Drop use of tmpnam() in rdoff (security fix.)</p>
-</li>
-</ul>
-<h4 id="section-C.2.6">C.2.6 Version 0.98.34</h4>
-<ul>
-<li>
-<p>Correct additional address-size vs. operand-size confusions.</p>
-</li>
-<li>
-<p>Generate dependencies for all Makefiles automatically.</p>
-</li>
-<li>
-<p>Add support for unimplemented (but theoretically available) registers
-such as tr0 and cr5. Segment registers 6 and 7 are called segr6 and segr7
-for the operations which they can be represented.</p>
-</li>
-<li>
-<p>Correct some disassembler bugs related to redundant address-size
-prefixes. Some work still remains in this area.</p>
-</li>
-<li>
-<p>Correctly generate an error for things like "SEG eax".</p>
-</li>
-<li>
-<p>Add the JMPE instruction, enabled by "CPU IA64".</p>
-</li>
-<li>
-<p>Correct compilation on newer gcc/glibc platforms.</p>
-</li>
-<li>
-<p>Issue an error on things like "jmp far eax".</p>
-</li>
-</ul>
-<h4 id="section-C.2.7">C.2.7 Version 0.98.33</h4>
-<ul>
-<li>
-<p>New __NASM_PATCHLEVEL__ and __NASM_VERSION_ID__ standard macros to round
-out the version-query macros. version.pl now understands X.YYplWW or
-X.YY.ZZplWW as a version number, equivalent to X.YY.ZZ.WW (or X.YY.0.WW, as
-appropriate).</p>
-</li>
-<li>
-<p>New keyword "strict" to disable the optimization of specific operands.</p>
-</li>
-<li>
-<p>Fix the handing of size overrides with JMP instructions (instructions
-such as "jmp dword foo".)</p>
-</li>
-<li>
-<p>Fix the handling of "ABSOLUTE label", where "label" points into a
-relocatable segment.</p>
-</li>
-<li>
-<p>Fix OBJ output format with lots of externs.</p>
-</li>
-<li>
-<p>More documentation updates.</p>
-</li>
-<li>
-<p>Add &ndash;Ov option to get verbose information about optimizations.</p>
-</li>
-<li>
-<p>Undo a braindead change which broke <code>%elif</code> directives.</p>
-</li>
-<li>
-<p>Makefile updates.</p>
-</li>
-</ul>
-<h4 id="section-C.2.8">C.2.8 Version 0.98.32</h4>
-<ul>
-<li>
-<p>Fix NASM crashing when <code>%macro</code> directives were left
-unterminated.</p>
-</li>
-<li>
-<p>Lots of documentation updates.</p>
-</li>
-<li>
-<p>Complete rewrite of the PostScript/PDF documentation generator.</p>
-</li>
-<li>
-<p>The MS Visual C++ Makefile was updated and corrected.</p>
-</li>
-<li>
-<p>Recognize .rodata as a standard section name in ELF.</p>
-</li>
-<li>
-<p>Fix some obsolete Perl4-isms in Perl scripts.</p>
-</li>
-<li>
-<p>Fix configure.in to work with autoconf 2.5x.</p>
-</li>
-<li>
-<p>Fix a couple of "make cleaner" misses.</p>
-</li>
-<li>
-<p>Make the normal "./configure &amp;&amp; make" work with Cygwin.</p>
-</li>
-</ul>
-<h4 id="section-C.2.9">C.2.9 Version 0.98.31</h4>
-<ul>
-<li>
-<p>Correctly build in a separate object directory again.</p>
-</li>
-<li>
-<p>Derive all references to the version number from the version file.</p>
-</li>
-<li>
-<p>New standard macros __NASM_SUBMINOR__ and __NASM_VER__ macros.</p>
-</li>
-<li>
-<p>Lots of Makefile updates and bug fixes.</p>
-</li>
-<li>
-<p>New <code>%ifmacro</code> directive to test for multiline macros.</p>
-</li>
-<li>
-<p>Documentation updates.</p>
-</li>
-<li>
-<p>Fixes for 16-bit OBJ format output.</p>
-</li>
-<li>
-<p>Changed the NASM environment variable to NASMENV.</p>
-</li>
-</ul>
-<h4 id="section-C.2.10">C.2.10 Version 0.98.30</h4>
-<ul>
-<li>
-<p>Changed doc files a lot: completely removed old READMExx and Wishlist
-files, incorporating all information in CHANGES and TODO.</p>
-</li>
-<li>
-<p>I waited a long time to rename zoutieee.c to (original) outieee.c</p>
-</li>
-<li>
-<p>moved all output modules to output/ subdirectory.</p>
-</li>
-<li>
-<p>Added 'make strip' target to strip debug info from nasm &amp; ndisasm.</p>
-</li>
-<li>
-<p>Added INSTALL file with installation instructions.</p>
-</li>
-<li>
-<p>Added &ndash;v option description to nasm man.</p>
-</li>
-<li>
-<p>Added dist makefile target to produce source distributions.</p>
-</li>
-<li>
-<p>16-bit support for ELF output format (GNU extension, but useful.)</p>
-</li>
-</ul>
-<h4 id="section-C.2.11">C.2.11 Version 0.98.28</h4>
-<ul>
-<li>
-<p>Fastcooked this for Debian's Woody release: Frank applied the INCBIN bug
-patch to 0.98.25alt and called it 0.98.28 to not confuse poor little
-apt-get.</p>
-</li>
-</ul>
-<h4 id="section-C.2.12">C.2.12 Version 0.98.26</h4>
-<ul>
-<li>
-<p>Reorganised files even better from 0.98.25alt</p>
-</li>
-</ul>
-<h4 id="section-C.2.13">C.2.13 Version 0.98.25alt</h4>
-<ul>
-<li>
-<p>Prettified the source tree. Moved files to more reasonable places.</p>
-</li>
-<li>
-<p>Added findleak.pl script to misc/ directory.</p>
-</li>
-<li>
-<p>Attempted to fix doc.</p>
-</li>
-</ul>
-<h4 id="section-C.2.14">C.2.14 Version 0.98.25</h4>
-<ul>
-<li>
-<p>Line continuation character <code>\</code>.</p>
-</li>
-<li>
-<p>Docs inadvertently reverted &ndash; "dos packaging".</p>
-</li>
-</ul>
-<h4 id="section-C.2.15">C.2.15 Version 0.98.24p1</h4>
-<ul>
-<li>
-<p>FIXME: Someone, document this please.</p>
-</li>
-</ul>
-<h4 id="section-C.2.16">C.2.16 Version 0.98.24</h4>
-<ul>
-<li>
-<p>Documentation &ndash; Ndisasm doc added to Nasm.doc.</p>
-</li>
-</ul>
-<h4 id="section-C.2.17">C.2.17 Version 0.98.23</h4>
-<ul>
-<li>
-<p>Attempted to remove rdoff version1</p>
-</li>
-<li>
-<p>Lino Mastrodomenico's patches to preproc.c (%$$ bug?).</p>
-</li>
-</ul>
-<h4 id="section-C.2.18">C.2.18 Version 0.98.22</h4>
-<ul>
-<li>
-<p>Update rdoff2 &ndash; attempt to remove v1.</p>
-</li>
-</ul>
-<h4 id="section-C.2.19">C.2.19 Version 0.98.21</h4>
-<ul>
-<li>
-<p>Optimization fixes.</p>
-</li>
-</ul>
-<h4 id="section-C.2.20">C.2.20 Version 0.98.20</h4>
-<ul>
-<li>
-<p>Optimization fixes.</p>
-</li>
-</ul>
-<h4 id="section-C.2.21">C.2.21 Version 0.98.19</h4>
-<ul>
-<li>
-<p>H. J. Lu's patch back out.</p>
-</li>
-</ul>
-<h4 id="section-C.2.22">C.2.22 Version 0.98.18</h4>
-<ul>
-<li>
-<p>Added ".rdata" to "-f win32".</p>
-</li>
-</ul>
-<h4 id="section-C.2.23">C.2.23 Version 0.98.17</h4>
-<ul>
-<li>
-<p>H. J. Lu's "bogus elf" patch. (Red Hat problem?)</p>
-</li>
-</ul>
-<h4 id="section-C.2.24">C.2.24 Version 0.98.16</h4>
-<ul>
-<li>
-<p>Fix whitespace before "section ..." bug.</p>
-</li>
-</ul>
-<h4 id="section-C.2.25">C.2.25 Version 0.98.15</h4>
-<ul>
-<li>
-<p>Rdoff changes (?).</p>
-</li>
-<li>
-<p>Fix fixes to memory leaks.</p>
-</li>
-</ul>
-<h4 id="section-C.2.26">C.2.26 Version 0.98.14</h4>
-<ul>
-<li>
-<p>Fix memory leaks.</p>
-</li>
-</ul>
-<h4 id="section-C.2.27">C.2.27 Version 0.98.13</h4>
-<ul>
-<li>
-<p>There was no 0.98.13</p>
-</li>
-</ul>
-<h4 id="section-C.2.28">C.2.28 Version 0.98.12</h4>
-<ul>
-<li>
-<p>Update optimization (new function of "-O1")</p>
-</li>
-<li>
-<p>Changes to test/bintest.asm (?).</p>
-</li>
-</ul>
-<h4 id="section-C.2.29">C.2.29 Version 0.98.11</h4>
-<ul>
-<li>
-<p>Optimization changes.</p>
-</li>
-<li>
-<p>Ndisasm fixed.</p>
-</li>
-</ul>
-<h4 id="section-C.2.30">C.2.30 Version 0.98.10</h4>
-<ul>
-<li>
-<p>There was no 0.98.10</p>
-</li>
-</ul>
-<h4 id="section-C.2.31">C.2.31 Version 0.98.09</h4>
-<ul>
-<li>
-<p>Add multiple sections support to "-f bin".</p>
-</li>
-<li>
-<p>Changed GLOBAL_TEMP_BASE in outelf.c from 6 to 15.</p>
-</li>
-<li>
-<p>Add "-v" as an alias to the "-r" switch.</p>
-</li>
-<li>
-<p>Remove "#ifdef" from Tasm compatibility options.</p>
-</li>
-<li>
-<p>Remove redundant size-overrides on "mov ds, ex", etc.</p>
-</li>
-<li>
-<p>Fixes to SSE2, other insns.dat (?).</p>
-</li>
-<li>
-<p>Enable uppercase "I" and "P" switches.</p>
-</li>
-<li>
-<p>Case insinsitive "seg" and "wrt".</p>
-</li>
-<li>
-<p>Update install.sh (?).</p>
-</li>
-<li>
-<p>Allocate tokens in blocks.</p>
-</li>
-<li>
-<p>Improve "invalid effective address" messages.</p>
-</li>
-</ul>
-<h4 id="section-C.2.32">C.2.32 Version 0.98.08</h4>
-<ul>
-<li>
-<p>Add "<code>%strlen</code>" and "<code>%substr</code>" macro operators</p>
-</li>
-<li>
-<p>Fixed broken c16.mac.</p>
-</li>
-<li>
-<p>Unterminated string error reported.</p>
-</li>
-<li>
-<p>Fixed bugs as per 0.98bf</p>
-</li>
-</ul>
-<h4 id="section-C.2.33">C.2.33 Version 0.98.09b with John Coffman patches released 28-Oct-2001</h4>
-<p>Changes from 0.98.07 release to 98.09b as of 28-Oct-2001</p>
-<ul>
-<li>
-<p>More closely compatible with 0.98 when &ndash;O0 is implied or
-specified. Not strictly identical, since backward branches in range of
-short offsets are recognized, and signed byte values with no explicit size
-specification will be assembled as a single byte.</p>
-</li>
-<li>
-<p>More forgiving with the PUSH instruction. 0.98 requires a size to be
-specified always. 0.98.09b will imply the size from the current BITS
-setting (16 or 32).</p>
-</li>
-<li>
-<p>Changed definition of the optimization flag:</p>
-<pre>
-   -O0     strict two-pass assembly, JMP and Jcc are 
-           handled more like 0.98, except that back- 
-           ward JMPs are short, if possible. 
-
-   -O1     strict two-pass assembly, but forward 
-           branches are assembled with code guaranteed 
-           to reach; may produce larger code than 
-           -O0, but will produce successful assembly 
-           more often if branch offset sizes are not 
-           specified. 
-
-   -O2     multi-pass optimization, minimize branch 
-           offsets; also will minimize signed immed- 
-           iate bytes, overriding size specification. 
-
-   -O3     like -O2, but more passes taken, if needed
-</pre>
-</li>
-</ul>
-<h4 id="section-C.2.34">C.2.34 Version 0.98.07 released 01/28/01</h4>
-<ul>
-<li>
-<p>Added Stepane Denis' SSE2 instructions to a *working* version of the
-code &ndash; some earlier versions were based on broken code &ndash; sorry
-'bout that. version "0.98.07"</p>
-</li>
-<li>
-<p>Cosmetic modifications to nasm.c, nasm.h, AUTHORS, MODIFIED</p>
-</li>
-</ul>
-<h4 id="section-C.2.35">C.2.35 Version 0.98.06f released 01/18/01</h4>
-<ul>
-<li>
-<p>Add "metalbrain"s jecxz bug fix in insns.dat</p>
-</li>
-<li>
-<p>Alter nasmdoc.src to match &ndash; version "0.98.06f"</p>
-</li>
-</ul>
-<h4 id="section-C.2.36">C.2.36 Version 0.98.06e released 01/09/01</h4>
-<ul>
-<li>
-<p>Removed the "outforms.h" file &ndash; it appears to be someone's old
-backup of "outform.h". version "0.98.06e"</p>
-</li>
-<li>
-<p>fbk &ndash; finally added the fix for the "multiple %includes bug",
-known since 7/27/99 &ndash; reported originally (?) and sent to us by
-Austin Lunnen &ndash; he reports that John Fine had a fix within the day.
-Here it is...</p>
-</li>
-<li>
-<p>Nelson Rush resigns from the group. Big thanks to Nelson for his
-leadership and enthusiasm in getting these changes incorporated into Nasm!</p>
-</li>
-<li>
-<p>fbk &ndash; list +, list &ndash; directives &ndash; ineptly
-implemented, should be re-written or removed, perhaps.</p>
-</li>
-<li>
-<p>Brian Raiter / fbk &ndash; "elfso bug" fix &ndash; applied to aoutb
-format as well &ndash; testing might be desirable...</p>
-</li>
-<li>
-<p>James Seter &ndash; &ndash;postfix, &ndash;prefix command line switches.</p>
-</li>
-<li>
-<p>Yuri Zaporozhets &ndash; rdoff utility changes.</p>
-</li>
-</ul>
-<h4 id="section-C.2.37">C.2.37 Version 0.98p1</h4>
-<ul>
-<li>
-<p>GAS-like palign (Panos Minos)</p>
-</li>
-<li>
-<p>FIXME: Someone, fill this in with details</p>
-</li>
-</ul>
-<h4 id="section-C.2.38">C.2.38 Version 0.98bf (bug-fixed)</h4>
-<ul>
-<li>
-<p>Fixed &ndash; elf and aoutb bug &ndash; shared libraries &ndash;
-multiple "%include" bug in "-f obj" &ndash; jcxz, jecxz bug &ndash;
-unrecognized option bug in ndisasm</p>
-</li>
-</ul>
-<h4 id="section-C.2.39">C.2.39 Version 0.98.03 with John Coffman's changes released 27-Jul-2000</h4>
-<ul>
-<li>
-<p>Added signed byte optimizations for the 0x81/0x83 class of instructions:
-ADC, ADD, AND, CMP, OR, SBB, SUB, XOR: when used as 'ADD reg16,imm' or 'ADD
-reg32,imm.' Also optimization of signed byte form of 'PUSH imm' and 'IMUL
-reg,imm'/'IMUL reg,reg,imm.' No size specification is needed.</p>
-</li>
-<li>
-<p>Added multi-pass JMP and Jcc offset optimization. Offsets on forward
-references will preferentially use the short form, without the need to code
-a specific size (short or near) for the branch. Added instructions for 'Jcc
-label' to use the form 'Jnotcc $+3/JMP label', in cases where a short
-offset is out of bounds. If compiling for a 386 or higher CPU, then the 386
-form of Jcc will be used instead.</p>
-<p>This feature is controlled by a new command-line switch: "O", (upper
-case letter O). "-O0" reverts the assembler to no extra optimization
-passes, "-O1" allows up to 5 extra passes, and "-O2"(default), allows up to
-10 extra optimization passes.</p>
-</li>
-<li>
-<p>Added a new directive: 'cpu XXX', where XXX is any of: 8086, 186, 286,
-386, 486, 586, pentium, 686, PPro, P2, P3 or Katmai. All are case
-insensitive. All instructions will be selected only if they apply to the
-selected cpu or lower. Corrected a couple of bugs in cpu-dependence in
-'insns.dat'.</p>
-</li>
-<li>
-<p>Added to 'standard.mac', the "use16" and "use32" forms of the "bits
-16/32" directive. This is nothing new, just conforms to a lot of other
-assemblers. (minor)</p>
-</li>
-<li>
-<p>Changed label allocation from 320/32 (10000 labels @ 200K+) to 32/37
-(1000 labels); makes running under DOS much easier. Since additional label
-space is allocated dynamically, this should have no effect on large
-programs with lots of labels. The 37 is a prime, believed to be better for
-hashing. (minor)</p>
-</li>
-</ul>
-<h4 id="section-C.2.40">C.2.40 Version 0.98.03</h4>
-<p>"Integrated patchfile 0.98-0.98.01. I call this version 0.98.03 for
-historical reasons: 0.98.02 was trashed." &ndash;&ndash;John Coffman
-&lt;johninsd@san.rr.com&gt;, 27-Jul-2000</p>
-<ul>
-<li>
-<p>Kendall Bennett's SciTech MGL changes</p>
-</li>
-<li>
-<p>Note that you must define "TASM_COMPAT" at compile-time to get the Tasm
-Ideal Mode compatibility.</p>
-</li>
-<li>
-<p>All changes can be compiled in and out using the TASM_COMPAT macros, and
-when compiled without TASM_COMPAT defined we get the exact same binary as
-the unmodified 0.98 sources.</p>
-</li>
-<li>
-<p>standard.mac, macros.c: Added macros to ignore TASM directives before
-first include</p>
-</li>
-<li>
-<p>nasm.h: Added extern declaration for tasm_compatible_mode</p>
-</li>
-<li>
-<p>nasm.c: Added global variable tasm_compatible_mode</p>
-</li>
-<li>
-<p>Added command line switch for TASM compatible mode (-t)</p>
-</li>
-<li>
-<p>Changed version command line to reflect when compiled with TASM
-additions</p>
-</li>
-<li>
-<p>Added response file processing to allow all arguments on a single line
-(response file is @resp rather than &ndash;@resp for NASM format).</p>
-</li>
-<li>
-<p>labels.c: Changes islocal() macro to support TASM style @@local labels.</p>
-</li>
-<li>
-<p>Added islocalchar() macro to support TASM style @@local labels.</p>
-</li>
-<li>
-<p>parser.c: Added support for TASM style memory references (ie: mov DWORD
-eax,10 rather than the NASM style mov DWORD eax,10).</p>
-</li>
-<li>
-<p>preproc.c: Added new directives, <code>%arg</code>, <code>%local</code>,
-<code>%stacksize</code> to directives table</p>
-</li>
-<li>
-<p>Added support for TASM style directives without a leading % symbol.</p>
-</li>
-<li>
-<p>Integrated a block of changes from Andrew Zabolotny
-&lt;bit@eltech.ru&gt;:</p>
-</li>
-<li>
-<p>A new keyword <code>%xdefine</code> and its case-insensitive counterpart
-<code>%ixdefine</code>. They work almost the same way as
-<code>%define</code> and <code>%idefine</code> but expand the definition
-immediately, not on the invocation. Something like a cross between
-<code>%define</code> and <code>%assign</code>. The "x" suffix stands for
-"eXpand", so "xdefine" can be deciphered as "expand-and-define". Thus you
-can do things like this:</p>
-<pre>
-     %assign ofs     0 
-
-     %macro  arg     1 
-             %xdefine %1 dword esp+ofs 
-             %assign ofs ofs+4 
-     %endmacro
-</pre>
-</li>
-<li>
-<p>Changed the place where the expansion of %$name macros are expanded. Now
-they are converted into ..@ctxnum.name form when detokenizing, so there are
-no quirks as before when using %$name arguments to macros, in macros etc.
-For example:</p>
-<pre>
-     %macro  abc     1 
-             %define %1 hello 
-     %endm 
-
-     abc     %$here 
-     %$here
-</pre>
-<p>Now last line will be expanded into "hello" as expected. This also
-allows for lots of goodies, a good example are extended "proc" macros
-included in this archive.</p>
-</li>
-<li>
-<p>Added a check for "cstk" in smacro_defined() before calling get_ctx()
-&ndash; this allows for things like:</p>
-<pre>
-     %ifdef %$abc 
-     %endif
-</pre>
-<p>to work without warnings even in no context.</p>
-</li>
-<li>
-<p>Added a check for "cstk" in %if*ctx and %elif*ctx directives &ndash;
-this allows to use <code>%ifctx</code> without excessive warnings. If there
-is no active context, <code>%ifctx</code> goes through "false" branch.</p>
-</li>
-<li>
-<p>Removed "user error: " prefix with <code>%error</code> directive: it
-just clobbers the output and has absolutely no functionality. Besides, this
-allows to write macros that does not differ from built-in functions in any
-way.</p>
-</li>
-<li>
-<p>Added expansion of string that is output by <code>%error</code>
-directive. Now you can do things like:</p>
-<pre>
-     %define hello(x) Hello, x! 
-
-     %define %$name andy 
-     %error "hello(%$name)"
-</pre>
-<p>Same happened with <code>%include</code> directive.</p>
-</li>
-<li>
-<p>Now all directives that expect an identifier will try to expand and
-concatenate everything without whitespaces in between before usage. For
-example, with "unfixed" nasm the commands</p>
-<pre>
-     %define %$abc hello 
-     %define __%$abc goodbye 
-     __%$abc
-</pre>
-<p>would produce "incorrect" output: last line will expand to</p>
-<pre>
-     hello goodbyehello
-</pre>
-<p>Not quite what you expected, eh? :-) The answer is that preprocessor
-treats the <code>%define</code> construct as if it would be</p>
-<pre>
-     %define __ %$abc goodbye
-</pre>
-<p>(note the white space between __ and %$abc). After my "fix" it will
-"correctly" expand into</p>
-<pre>
-     goodbye
-</pre>
-<p>as expected. Note that I use quotes around words "correct", "incorrect"
-etc because this is rather a feature not a bug; however current behaviour
-is more logical (and allows more advanced macro usage :-).</p>
-</li>
-</ul>
-<p>Same change was applied to:
-<code>%push</code>,<code>%macro</code>,<code>%imacro</code>,<code>%define</code>,<code>%idefine</code>,<code>%xdefine</code>,<code>%ixdefine</code>,
-<code>%assign</code>,<code>%iassign</code>,<code>%undef</code></p>
-<ul>
-<li>
-<p>A new directive WARNING {+|-}warning-id have been added. It works only
-if the assembly phase is enabled (i.e. it doesn't work with nasm &ndash;e).</p>
-</li>
-<li>
-<p>A new warning type: macro-selfref. By default this warning is disabled;
-when enabled NASM warns when a macro self-references itself; for example
-the following source:</p>
-<pre>
-       WARNING macro-selfref 
-
-       %macro          push    1-* 
-               %rep    %0 
-                       push    %1 
-                       %rotate 1 
-               %endrep 
-       %endmacro 
-
-                       push    eax,ebx,ecx
-</pre>
-<p>will produce a warning, but if we remove the first line we won't see it
-anymore (which is The Right Thing To Do {tm} IMHO since C preprocessor eats
-such constructs without warnings at all).</p>
-</li>
-<li>
-<p>Added a "error" routine to preprocessor which always will set ERR_PASS1
-bit in severity_code. This removes annoying repeated errors on first and
-second passes from preprocessor.</p>
-</li>
-<li>
-<p>Added the %+ operator in single-line macros for concatenating two
-identifiers. Usage example:</p>
-<pre>
-       %define _myfunc _otherfunc 
-       %define cextern(x) _ %+ x 
-       cextern (myfunc)
-</pre>
-<p>After first expansion, third line will become "_myfunc". After this
-expansion is performed again so it becomes "_otherunc".</p>
-</li>
-<li>
-<p>Now if preprocessor is in a non-emitting state, no warning or error will
-be emitted. Example:</p>
-<pre>
-       %if 1 
-               mov     eax,ebx 
-       %else 
-               put anything you want between these two brackets, 
-               even macro-parameter references %1 or local 
-               labels %$zz or macro-local labels %%zz - no 
-               warning will be emitted. 
-       %endif
-</pre>
-</li>
-<li>
-<p>Context-local variables on expansion as a last resort are looked up in
-outer contexts. For example, the following piece:</p>
-<pre>
-       %push   outer 
-       %define %$a esp 
-
-               %push   inner 
-               %$a 
-               %pop 
-       %pop
-</pre>
-<p>will expand correctly the fourth line to esp; if we'll define another
-%$a inside the "inner" context, it will take precedence over outer
-definition. However, this modification has been applied only to
-expand_smacro and not to smacro_define: as a consequence expansion looks in
-outer contexts, but <code>%ifdef</code> won't look in outer contexts.</p>
-<p>This behaviour is needed because we don't want nested contexts to act on
-already defined local macros. Example:</p>
-<pre>
-       %define %$arg1  esp+4 
-       test    eax,eax 
-       if      nz 
-               mov     eax,%$arg1 
-       endif
-</pre>
-<p>In this example the "if" mmacro enters into the "if" context, so %$arg1
-is not valid anymore inside "if". Of course it could be worked around by
-using explicitly %$$arg1 but this is ugly IMHO.</p>
-</li>
-<li>
-<p>Fixed memory leak in <code>%undef</code>. The origline wasn't freed
-before exiting on success.</p>
-</li>
-<li>
-<p>Fixed trap in preprocessor when line expanded to empty set of tokens.
-This happens, for example, in the following case:</p>
-<pre>
-       #define SOMETHING 
-       SOMETHING
-</pre>
-</li>
-</ul>
-<h4 id="section-C.2.41">C.2.41 Version 0.98</h4>
-<p>All changes since NASM 0.98p3 have been produced by H. Peter Anvin
-&lt;hpa@zytor.com&gt;.</p>
-<ul>
-<li>
-<p>The documentation comment delimiter is</p>
-</li>
-<li>
-<p>Allow EQU definitions to refer to external labels; reported by Pedro
-Gimeno.</p>
-</li>
-<li>
-<p>Re-enable support for RDOFF v1; reported by Pedro Gimeno.</p>
-</li>
-<li>
-<p>Updated License file per OK from Simon and Julian.</p>
-</li>
-</ul>
-<h4 id="section-C.2.42">C.2.42 Version 0.98p9</h4>
-<ul>
-<li>
-<p>Update documentation (although the instruction set reference will have
-to wait; I don't want to hold up the 0.98 release for it.)</p>
-</li>
-<li>
-<p>Verified that the NASM implementation of the PEXTRW and PMOVMSKB
-instructions is correct. The encoding differs from what the Intel manuals
-document, but the Pentium III behaviour matches NASM, not the Intel
-manuals.</p>
-</li>
-<li>
-<p>Fix handling of implicit sizes in PSHUFW and PINSRW, reported by Stefan
-Hoffmeister.</p>
-</li>
-<li>
-<p>Resurrect the &ndash;s option, which was removed when changing the
-diagnostic output to stdout.</p>
-</li>
-</ul>
-<h4 id="section-C.2.43">C.2.43 Version 0.98p8</h4>
-<ul>
-<li>
-<p>Fix for "DB" when NASM is running on a bigendian machine.</p>
-</li>
-<li>
-<p>Invoke insns.pl once for each output script, making Makefile.in legal
-for "make &ndash;j".</p>
-</li>
-<li>
-<p>Improve the Unix configure-based makefiles to make package creation
-easier.</p>
-</li>
-<li>
-<p>Included an RPM .spec file for building RPM (RedHat Package Manager)
-packages on Linux or Unix systems.</p>
-</li>
-<li>
-<p>Fix Makefile dependency problems.</p>
-</li>
-<li>
-<p>Change src/rdsrc.pl to include sectioning information in info output;
-required for install-info to work.</p>
-</li>
-<li>
-<p>Updated the RDOFF distribution to version 2 from Jules; minor massaging
-to make it compile in my environment.</p>
-</li>
-<li>
-<p>Split doc files that can be built by anyone with a Perl interpreter off
-into a separate archive.</p>
-</li>
-<li>
-<p>"Dress rehearsal" release!</p>
-</li>
-</ul>
-<h4 id="section-C.2.44">C.2.44 Version 0.98p7</h4>
-<ul>
-<li>
-<p>Fixed opcodes with a third byte-sized immediate argument to not complain
-if given "byte" on the immediate.</p>
-</li>
-<li>
-<p>Allow <code>%undef</code> to remove single-line macros with arguments.
-This matches the behaviour of #undef in the C preprocessor.</p>
-</li>
-<li>
-<p>Allow &ndash;d, &ndash;u, &ndash;i and &ndash;p to be specified as
-&ndash;D, &ndash;U, &ndash;I and &ndash;P for compatibility with most C
-compilers and preprocessors. This allows Makefile options to be shared
-between cc and nasm, for example.</p>
-</li>
-<li>
-<p>Minor cleanups.</p>
-</li>
-<li>
-<p>Went through the list of Katmai instructions and hopefully fixed the
-(rather few) mistakes in it.</p>
-</li>
-<li>
-<p>(Hopefully) fixed a number of disassembler bugs related to ambiguous
-instructions (disambiguated by &ndash;p) and SSE instructions with REP.</p>
-</li>
-<li>
-<p>Fix for bug reported by Mark Junger: "call dword 0x12345678" should work
-and may add an OSP (affected CALL, JMP, Jcc).</p>
-</li>
-<li>
-<p>Fix for environments when "stderr" isn't a compile-time constant.</p>
-</li>
-</ul>
-<h4 id="section-C.2.45">C.2.45 Version 0.98p6</h4>
-<ul>
-<li>
-<p>Took officially over coordination of the 0.98 release; so drop the p3.x
-notation. Skipped p4 and p5 to avoid confusion with John Fine's J4 and J5
-releases.</p>
-</li>
-<li>
-<p>Update the documentation; however, it still doesn't include
-documentation for the various new instructions. I somehow wonder if it
-makes sense to have an instruction set reference in the assembler manual
-when Intel et al have PDF versions of their manuals online.</p>
-</li>
-<li>
-<p>Recognize "idt" or "centaur" for the &ndash;p option to ndisasm.</p>
-</li>
-<li>
-<p>Changed error messages back to stderr where they belong, but add an
-&ndash;E option to redirect them elsewhere (the DOS shell cannot redirect
-stderr.)</p>
-</li>
-<li>
-<p>&ndash;M option to generate Makefile dependencies (based on code from
-Alex Verstak.)</p>
-</li>
-<li>
-<p><code>%undef</code> preprocessor directive, and &ndash;u option, that
-undefines a single-line macro.</p>
-</li>
-<li>
-<p>OS/2 Makefile (Mkfiles/Makefile.os2) for Borland under OS/2; from Chuck
-Crayne.</p>
-</li>
-<li>
-<p>Various minor bugfixes (reported by): &ndash; Dangling <code>%s</code>
-in preproc.c (Martin Junker)</p>
-</li>
-<li>
-<p>THERE ARE KNOWN BUGS IN SSE AND THE OTHER KATMAI INSTRUCTIONS. I am on a
-trip and didn't bring the Katmai instruction reference, so I can't work on
-them right now.</p>
-</li>
-<li>
-<p>Updated the License file per agreement with Simon and Jules to include a
-GPL distribution clause.</p>
-</li>
-</ul>
-<h4 id="section-C.2.46">C.2.46 Version 0.98p3.7</h4>
-<ul>
-<li>
-<p>(Hopefully) fixed the canned Makefiles to include the outrdf2 and
-zoutieee modules.</p>
-</li>
-<li>
-<p>Renamed changes.asm to changed.asm.</p>
-</li>
-</ul>
-<h4 id="section-C.2.47">C.2.47 Version 0.98p3.6</h4>
-<ul>
-<li>
-<p>Fixed a bunch of instructions that were added in 0.98p3.5 which had
-memory operands, and the address-size prefix was missing from the
-instruction pattern.</p>
-</li>
-</ul>
-<h4 id="section-C.2.48">C.2.48 Version 0.98p3.5</h4>
-<ul>
-<li>
-<p>Merged in changes from John S. Fine's 0.98-J5 release. John's based
-0.98-J5 on my 0.98p3.3 release; this merges the changes.</p>
-</li>
-<li>
-<p>Expanded the instructions flag field to a long so we can fit more flags;
-mark SSE (KNI) and AMD or Katmai-specific instructions as such.</p>
-</li>
-<li>
-<p>Fix the "PRIV" flag on a bunch of instructions, and create new "PROT"
-flag for protected-mode-only instructions (orthogonal to if the instruction
-is privileged!) and new "SMM" flag for SMM-only instructions.</p>
-</li>
-<li>
-<p>Added AMD-only SYSCALL and SYSRET instructions.</p>
-</li>
-<li>
-<p>Make SSE actually work, and add new Katmai MMX instructions.</p>
-</li>
-<li>
-<p>Added a &ndash;p (preferred vendor) option to ndisasm so that it can
-distinguish e.g. Cyrix opcodes also used in SSE. For example:</p>
-<pre>
-     ndisasm -p cyrix aliased.bin 
-     00000000  670F514310        paddsiw mm0,ebx+0x10 
-     00000005  670F514320        paddsiw mm0,ebx+0x20 
-     ndisasm -p intel aliased.bin 
-     00000000  670F514310        sqrtps xmm0,ebx+0x10 
-     00000005  670F514320        sqrtps xmm0,ebx+0x20
-</pre>
-</li>
-<li>
-<p>Added a bunch of Cyrix-specific instructions.</p>
-</li>
-</ul>
-<h4 id="section-C.2.49">C.2.49 Version 0.98p3.4</h4>
-<ul>
-<li>
-<p>Made at least an attempt to modify all the additional Makefiles (in the
-Mkfiles directory). I can't test it, but this was the best I could do.</p>
-</li>
-<li>
-<p>DOS DJGPP+"Opus Make" Makefile from John S. Fine.</p>
-</li>
-<li>
-<p>changes.asm changes from John S. Fine.</p>
-</li>
-</ul>
-<h4 id="section-C.2.50">C.2.50 Version 0.98p3.3</h4>
-<ul>
-<li>
-<p>Patch from Conan Brink to allow nesting of <code>%rep</code> directives.</p>
-</li>
-<li>
-<p>If we're going to allow INT01 as an alias for INT1/ICEBP (one of Jules
-0.98p3 changes), then we should allow INT03 as an alias for INT3 as well.</p>
-</li>
-<li>
-<p>Updated changes.asm to include the latest changes.</p>
-</li>
-<li>
-<p>Tried to clean up the &lt;CR&gt;s that had snuck in from a DOS/Windows
-environment into my Unix environment, and try to make sure than DOS/Windows
-users get them back.</p>
-</li>
-<li>
-<p>We would silently generate broken tools if insns.dat wasn't sorted
-properly. Change insns.pl so that the order doesn't matter.</p>
-</li>
-<li>
-<p>Fix bug in insns.pl (introduced by me) which would cause conditional
-instructions to have an extra "cc" in disassembly, e.g. "jnz" disassembled
-as "jccnz".</p>
-</li>
-</ul>
-<h4 id="section-C.2.51">C.2.51 Version 0.98p3.2</h4>
-<ul>
-<li>
-<p>Merged in John S. Fine's changes from his 0.98-J4 prerelease; see
-http://www.csoft.net/cz/johnfine/</p>
-</li>
-<li>
-<p>Changed previous "spotless" Makefile target (appropriate for
-distribution) to "distclean", and added "cleaner" target which is same as
-"clean" except deletes files generated by Perl scripts; "spotless" is
-union.</p>
-</li>
-<li>
-<p>Removed BASIC programs from distribution. Get a Perl interpreter instead
-(see below.)</p>
-</li>
-<li>
-<p>Calling this "pre-release 3.2" rather than "p3-hpa2" because of John's
-contributions.</p>
-</li>
-<li>
-<p>Actually link in the IEEE output format (zoutieee.c); fix a bunch of
-compiler warnings in that file. Note I don't know what IEEE output is
-supposed to look like, so these changes were made "blind".</p>
-</li>
-</ul>
-<h4 id="section-C.2.52">C.2.52 Version 0.98p3-hpa</h4>
-<ul>
-<li>
-<p>Merged nasm098p3.zip with nasm-0.97.tar.gz to create a fully buildable
-version for Unix systems (Makefile.in updates, etc.)</p>
-</li>
-<li>
-<p>Changed insns.pl to create the instruction tables in nasm.h and names.c,
-so that a new instruction can be added by adding it *only* to insns.dat.</p>
-</li>
-<li>
-<p>Added the following new instructions: SYSENTER, SYSEXIT, FXSAVE,
-FXRSTOR, UD1, UD2 (the latter two are two opcodes that Intel guarantee will
-never be used; one of them is documented as UD2 in Intel documentation, the
-other one just as "Undefined Opcode" &ndash;&ndash; calling it UD1 seemed
-to make sense.)</p>
-</li>
-<li>
-<p>MAX_SYMBOL was defined to be 9, but LOADALL286 and LOADALL386 are 10
-characters long. Now MAX_SYMBOL is derived from insns.dat.</p>
-</li>
-<li>
-<p>A note on the BASIC programs included: forget them. insns.bas is already
-out of date. Get yourself a Perl interpreter for your platform of choice at
-<a href="http://www.cpan.org/ports/index.html">http://www.cpan.org/ports/index.html</a>.</p>
-</li>
-</ul>
-<h4 id="section-C.2.53">C.2.53 Version 0.98 pre-release 3</h4>
-<ul>
-<li>
-<p>added response file support, improved command line handling, new layout
-help screen</p>
-</li>
-<li>
-<p>fixed limit checking bug, 'OUT byte nn, reg' bug, and a couple of rdoff
-related bugs, updated Wishlist; 0.98 Prerelease 3.</p>
-</li>
-</ul>
-<h4 id="section-C.2.54">C.2.54 Version 0.98 pre-release 2</h4>
-<ul>
-<li>
-<p>fixed bug in outcoff.c to do with truncating section names longer than 8
-characters, referencing beyond end of string; 0.98 pre-release 2</p>
-</li>
-</ul>
-<h4 id="section-C.2.55">C.2.55 Version 0.98 pre-release 1</h4>
-<ul>
-<li>
-<p>Fixed a bug whereby STRUC didn't work at all in RDF.</p>
-</li>
-<li>
-<p>Fixed a problem with group specification in PUBDEFs in OBJ.</p>
-</li>
-<li>
-<p>Improved ease of adding new output formats. Contribution due to Fox
-Cutter.</p>
-</li>
-<li>
-<p>Fixed a bug in relocations in the `bin' format: was showing up when a
-relocatable reference crossed an 8192-byte boundary in any output section.</p>
-</li>
-<li>
-<p>Fixed a bug in local labels: local-label lookups were inconsistent
-between passes one and two if an EQU occurred between the definition of a
-global label and the subsequent use of a local label local to that global.</p>
-</li>
-<li>
-<p>Fixed a seg-fault in the preprocessor (again) which happened when you
-use a blank line as the first line of a multi-line macro definition and
-then defined a label on the same line as a call to that macro.</p>
-</li>
-<li>
-<p>Fixed a stale-pointer bug in the handling of the NASM environment
-variable. Thanks to Thomas McWilliams.</p>
-</li>
-<li>
-<p>ELF had a hard limit on the number of sections which caused segfaults
-when transgressed. Fixed.</p>
-</li>
-<li>
-<p>Added ability for ndisasm to read from stdin by using `-' as the
-filename.</p>
-</li>
-<li>
-<p>ndisasm wasn't outputting the TO keyword. Fixed.</p>
-</li>
-<li>
-<p>Fixed error cascade on bogus expression in <code>%if</code> &ndash; an
-error in evaluation was causing the entire <code>%if</code> to be
-discarded, thus creating trouble later when the <code>%else</code> or
-<code>%endif</code> was encountered.</p>
-</li>
-<li>
-<p>Forward reference tracking was instruction-granular not operand-
-granular, which was causing 286-specific code to be generated needlessly on
-code of the form `shr word forwardref,1'. Thanks to Jim Hague for sending
-a patch.</p>
-</li>
-<li>
-<p>All messages now appear on stdout, as sending them to stderr serves no
-useful purpose other than to make redirection difficult.</p>
-</li>
-<li>
-<p>Fixed the problem with EQUs pointing to an external symbol &ndash; this
-now generates an error message.</p>
-</li>
-<li>
-<p>Allowed multiple size prefixes to an operand, of which only the first is
-taken into account.</p>
-</li>
-<li>
-<p>Incorporated John Fine's changes, including fixes of a large number of
-preprocessor bugs, some small problems in OBJ, and a reworking of label
-handling to define labels before their line is assembled, rather than
-after.</p>
-</li>
-<li>
-<p>Reformatted a lot of the source code to be more readable. Included
-'coding.txt' as a guideline for how to format code for contributors.</p>
-</li>
-<li>
-<p>Stopped nested <code>%reps</code> causing a panic &ndash; they now cause
-a slightly more friendly error message instead.</p>
-</li>
-<li>
-<p>Fixed floating point constant problems (patch by Pedro Gimeno)</p>
-</li>
-<li>
-<p>Fixed the return value of insn_size() not being checked for &ndash;1,
-indicating an error.</p>
-</li>
-<li>
-<p>Incorporated 3Dnow! instructions.</p>
-</li>
-<li>
-<p>Fixed the 'mov eax, eax + ebx' bug.</p>
-</li>
-<li>
-<p>Fixed the GLOBAL EQU bug in ELF. Released developers release 3.</p>
-</li>
-<li>
-<p>Incorporated John Fine's command line parsing changes</p>
-</li>
-<li>
-<p>Incorporated David Lindauer's OMF debug support</p>
-</li>
-<li>
-<p>Made changes for LCC 4.0 support (<code>__NASM_CDecl__</code>, removed
-register size specification warning when sizes agree).</p>
-</li>
-</ul>
-<h3 id="section-C.3">C.3 NASM 0.9 Series</h3>
-<p>Revisions before 0.98.</p>
-<h4 id="section-C.3.1">C.3.1 Version 0.97 released December 1997</h4>
-<ul>
-<li>
-<p>This was entirely a bug-fix release to 0.96, which seems to have got
-cursed. Silly me.</p>
-</li>
-<li>
-<p>Fixed stupid mistake in OBJ which caused `MOV EAX,&lt;constant&gt;' to
-fail. Caused by an error in the `MOV EAX,&lt;segment&gt;' support.</p>
-</li>
-<li>
-<p>ndisasm hung at EOF when compiled with lcc on Linux because lcc on Linux
-somehow breaks feof(). ndisasm now does not rely on feof().</p>
-</li>
-<li>
-<p>A heading in the documentation was missing due to a markup error in the
-indexing. Fixed.</p>
-</li>
-<li>
-<p>Fixed failure to update all pointers on realloc() within extended-
-operand code in parser.c. Was causing wrong behaviour and seg faults on
-lines such as `dd 0.0,0.0,0.0,0.0,...'</p>
-</li>
-<li>
-<p>Fixed a subtle preprocessor bug whereby invoking one multi-line macro on
-the first line of the expansion of another, when the second had been
-invoked with a label defined before it, didn't expand the inner macro.</p>
-</li>
-<li>
-<p>Added internal.doc back in to the distribution archives &ndash; it was
-missing in 0.96 *blush*</p>
-</li>
-<li>
-<p>Fixed bug causing 0.96 to be unable to assemble its own test files,
-specifically objtest.asm. *blush again*</p>
-</li>
-<li>
-<p>Fixed seg-faults and bogus error messages caused by mismatching
-<code>%rep</code> and <code>%endrep</code> within multi-line macro
-definitions.</p>
-</li>
-<li>
-<p>Fixed a problem with buffer overrun in OBJ, which was causing corruption
-at ends of long PUBDEF records.</p>
-</li>
-<li>
-<p>Separated DOS archives into main-program and documentation to reduce
-download size.</p>
-</li>
-</ul>
-<h4 id="section-C.3.2">C.3.2 Version 0.96 released November 1997</h4>
-<ul>
-<li>
-<p>Fixed a bug whereby, if `nasm sourcefile' would cause a filename
-collision warning and put output into `nasm.out', then `nasm sourcefile
-&ndash;o outputfile' still gave the warning even though the `-o' was
-honoured. Fixed name pollution under Digital UNIX: one of its header files
-defined R_SP, which broke the enum in nasm.h.</p>
-</li>
-<li>
-<p>Fixed minor instruction table problems: FUCOM and FUCOMP didn't have
-two-operand forms; NDISASM didn't recognise the longer register forms of
-PUSH and POP (eg FF F3 for PUSH BX); TEST mem,imm32 was flagged as
-undocumented; the 32-bit forms of CMOV had 16-bit operand size prefixes;
-`AAD imm' and `AAM imm' are no longer flagged as undocumented because the
-Intel Architecture reference documents them.</p>
-</li>
-<li>
-<p>Fixed a problem with the local-label mechanism, whereby strange types of
-symbol (EQUs, auto-defined OBJ segment base symbols) interfered with the
-`previous global label' value and screwed up local labels.</p>
-</li>
-<li>
-<p>Fixed a bug whereby the stub preprocessor didn't communicate with the
-listing file generator, so that the &ndash;a and &ndash;l options in
-conjunction would produce a useless listing file.</p>
-</li>
-<li>
-<p>Merged `os2' object file format back into `obj', after discovering that
-`obj' _also_ shouldn't have a link pass separator in a module containing a
-non-trivial MODEND. Flat segments are now declared using the FLAT
-attribute. `os2' is no longer a valid object format name: use `obj'.</p>
-</li>
-<li>
-<p>Removed the fixed-size temporary storage in the evaluator. Very very
-long expressions (like `mov ax,1+1+1+1+...' for two hundred 1s or so)
-should now no longer crash NASM.</p>
-</li>
-<li>
-<p>Fixed a bug involving segfaults on disassembly of MMX instructions, by
-changing the meaning of one of the operand-type flags in nasm.h. This may
-cause other apparently unrelated MMX problems; it needs to be tested
-thoroughly.</p>
-</li>
-<li>
-<p>Fixed some buffer overrun problems with large OBJ output files. Thanks
-to DJ Delorie for the bug report and fix.</p>
-</li>
-<li>
-<p>Made preprocess-only mode actually listen to the <code>%line</code>
-markers as it prints them, so that it can report errors more sanely.</p>
-</li>
-<li>
-<p>Re-designed the evaluator to keep more sensible track of expressions
-involving forward references: can now cope with previously-nightmare
-situations such as:</p>
-<pre>
-  mov ax,foo | bar 
-  foo equ 1 
-  bar equ 2
-</pre>
-</li>
-<li>
-<p>Added the ALIGN and ALIGNB standard macros.</p>
-</li>
-<li>
-<p>Added PIC support in ELF: use of WRT to obtain the four extra relocation
-types needed.</p>
-</li>
-<li>
-<p>Added the ability for output file formats to define their own extensions
-to the GLOBAL, COMMON and EXTERN directives.</p>
-</li>
-<li>
-<p>Implemented common-variable alignment, and global-symbol type and size
-declarations, in ELF.</p>
-</li>
-<li>
-<p>Implemented NEAR and FAR keywords for common variables, plus far-common
-element size specification, in OBJ.</p>
-</li>
-<li>
-<p>Added a feature whereby EXTERNs and COMMONs in OBJ can be given a
-default WRT specification (either a segment or a group).</p>
-</li>
-<li>
-<p>Transformed the Unix NASM archive into an auto-configuring package.</p>
-</li>
-<li>
-<p>Added a sanity-check for people applying SEG to things which are already
-segment bases: this previously went unnoticed by the SEG processing and
-caused OBJ-driver panics later.</p>
-</li>
-<li>
-<p>Added the ability, in OBJ format, to deal with `MOV EAX,&lt;segment&gt;'
-type references: OBJ doesn't directly support dword-size segment base
-fixups, but as long as the low two bytes of the constant term are zero, a
-word-size fixup can be generated instead and it will work.</p>
-</li>
-<li>
-<p>Added the ability to specify sections' alignment requirements in Win32
-object files and pure binary files.</p>
-</li>
-<li>
-<p>Added preprocess-time expression evaluation: the <code>%assign</code>
-(and <code>%iassign</code>) directive and the bare <code>%if</code> (and
-<code>%elif</code>) conditional. Added relational operators to the
-evaluator, for use only in <code>%if</code> constructs: the standard
-relationals = &lt; &gt; &lt;= &gt;= &lt;&gt; (and C-like synonyms == and
-!=) plus low-precedence logical operators &amp;&amp;, ^^ and ||.</p>
-</li>
-<li>
-<p>Added a preprocessor repeat construct: <code>%rep</code> /
-<code>%exitrep</code> / <code>%endrep</code>.</p>
-</li>
-<li>
-<p>Added the __FILE__ and __LINE__ standard macros.</p>
-</li>
-<li>
-<p>Added a sanity check for number constants being greater than 0xFFFFFFFF.
-The warning can be disabled.</p>
-</li>
-<li>
-<p>Added the %0 token whereby a variadic multi-line macro can tell how many
-parameters it's been given in a specific invocation.</p>
-</li>
-<li>
-<p>Added <code>%rotate</code>, allowing multi-line macro parameters to be
-cycled.</p>
-</li>
-<li>
-<p>Added the `*' option for the maximum parameter count on multi-line
-macros, allowing them to take arbitrarily many parameters.</p>
-</li>
-<li>
-<p>Added the ability for the user-level forms of EXTERN, GLOBAL and COMMON
-to take more than one argument.</p>
-</li>
-<li>
-<p>Added the IMPORT and EXPORT directives in OBJ format, to deal with
-Windows DLLs.</p>
-</li>
-<li>
-<p>Added some more preprocessor <code>%if</code> constructs:
-<code>%ifidn</code> / <code>%ifidni</code> (exact textual identity), and
-<code>%ifid</code> / <code>%ifnum</code> / <code>%ifstr</code> (token type
-testing).</p>
-</li>
-<li>
-<p>Added the ability to distinguish SHL AX,1 (the 8086 version) from SHL
-AX,BYTE 1 (the 286-and-upwards version whose constant happens to be 1).</p>
-</li>
-<li>
-<p>Added NetBSD/FreeBSD/OpenBSD's variant of a.out format, complete with
-PIC shared library features.</p>
-</li>
-<li>
-<p>Changed NASM's idiosyncratic handling of FCLEX, FDISI, FENI, FINIT,
-FSAVE, FSTCW, FSTENV, and FSTSW to bring it into line with the otherwise
-accepted standard. The previous behaviour, though it was a deliberate
-feature, was a deliberate feature based on a misunderstanding. Apologies
-for the inconvenience.</p>
-</li>
-<li>
-<p>Improved the flexibility of ABSOLUTE: you can now give it an expression
-rather than being restricted to a constant, and it can take relocatable
-arguments as well.</p>
-</li>
-<li>
-<p>Added the ability for a variable to be declared as EXTERN multiple
-times, and the subsequent definitions are just ignored.</p>
-</li>
-<li>
-<p>We now allow instruction prefixes (CS, DS, LOCK, REPZ etc) to be alone
-on a line (without a following instruction).</p>
-</li>
-<li>
-<p>Improved sanity checks on whether the arguments to EXTERN, GLOBAL and
-COMMON are valid identifiers.</p>
-</li>
-<li>
-<p>Added misc/exebin.mac to allow direct generation of .EXE files by
-hacking up an EXE header using DB and DW; also added test/binexe.asm to
-demonstrate the use of this. Thanks to Yann Guidon for contributing the EXE
-header code.</p>
-</li>
-<li>
-<p>ndisasm forgot to check whether the input file had been successfully
-opened. Now it does. Doh!</p>
-</li>
-<li>
-<p>Added the Cyrix extensions to the MMX instruction set.</p>
-</li>
-<li>
-<p>Added a hinting mechanism to allow EAX+EBX and EBX+EAX to be
-assembled differently. This is important since ESI+EBP and EBP+ESI have
-different default base segment registers.</p>
-</li>
-<li>
-<p>Added support for the PharLap OMF extension for 4096-byte segment
-alignment.</p>
-</li>
-</ul>
-<h4 id="section-C.3.3">C.3.3 Version 0.95 released July 1997</h4>
-<ul>
-<li>
-<p>Fixed yet another ELF bug. This one manifested if the user relied on the
-default segment, and attempted to define global symbols without first
-explicitly declaring the target segment.</p>
-</li>
-<li>
-<p>Added makefiles (for NASM and the RDF tools) to build Win32 console apps
-under Symantec C++. Donated by Mark Junker.</p>
-</li>
-<li>
-<p>Added `macros.bas' and `insns.bas', QBasic versions of the Perl scripts
-that convert `standard.mac' to `macros.c' and convert `insns.dat' to
-`insnsa.c' and `insnsd.c'. Also thanks to Mark Junker.</p>
-</li>
-<li>
-<p>Changed the diassembled forms of the conditional instructions so that JB
-is now emitted as JC, and other similar changes. Suggested list by Ulrich
-Doewich.</p>
-</li>
-<li>
-<p>Added `@' to the list of valid characters to begin an identifier with.</p>
-</li>
-<li>
-<p>Documentary changes, notably the addition of the `Common Problems'
-section in nasm.doc.</p>
-</li>
-<li>
-<p>Fixed a bug relating to 32-bit PC-relative fixups in OBJ.</p>
-</li>
-<li>
-<p>Fixed a bug in perm_copy() in labels.c which was causing exceptions in
-cleanup_labels() on some systems.</p>
-</li>
-<li>
-<p>Positivity sanity check in TIMES argument changed from a warning to an
-error following a further complaint.</p>
-</li>
-<li>
-<p>Changed the acceptable limits on byte and word operands to allow things
-like `~10111001b' to work.</p>
-</li>
-<li>
-<p>Fixed a major problem in the preprocessor which caused seg-faults if
-macro definitions contained blank lines or comment-only lines.</p>
-</li>
-<li>
-<p>Fixed inadequate error checking on the commas separating the arguments
-to `db', `dw' etc.</p>
-</li>
-<li>
-<p>Fixed a crippling bug in the handling of macros with operand counts
-defined with a `+' modifier.</p>
-</li>
-<li>
-<p>Fixed a bug whereby object file formats which stored the input file name
-in the output file (such as OBJ and COFF) weren't doing so correctly when
-the output file name was specified on the command line.</p>
-</li>
-<li>
-<p>Removed INC and INCLUDE support for good, since they were obsolete
-anyway.</p>
-</li>
-<li>
-<p>Fixed a bug in OBJ which caused all fixups to be output in 16-bit
-(old-format) FIXUPP records, rather than putting the 32-bit ones in
-FIXUPP32 (new-format) records.</p>
-</li>
-<li>
-<p>Added, tentatively, OS/2 object file support (as a minor variant on
-OBJ).</p>
-</li>
-<li>
-<p>Updates to Fox Cutter's Borland C makefile, Makefile.bc2.</p>
-</li>
-<li>
-<p>Removed a spurious second fclose() on the output file.</p>
-</li>
-<li>
-<p>Added the `-s' command line option to redirect all messages which would
-go to stderr (errors, help text) to stdout instead.</p>
-</li>
-<li>
-<p>Added the `-w' command line option to selectively suppress some classes
-of assembly warning messages.</p>
-</li>
-<li>
-<p>Added the `-p' pre-include and `-d' pre-define command-line options.</p>
-</li>
-<li>
-<p>Added an include file search path: the `-i' command line option.</p>
-</li>
-<li>
-<p>Fixed a silly little preprocessor bug whereby starting a line with a
-`%!' environment-variable reference caused an `unknown directive' error.</p>
-</li>
-<li>
-<p>Added the long-awaited listing file support: the `-l' command line
-option.</p>
-</li>
-<li>
-<p>Fixed a problem with OBJ format whereby, in the absence of any explicit
-segment definition, non-global symbols declared in the implicit default
-segment generated spurious EXTDEF records in the output.</p>
-</li>
-<li>
-<p>Added the NASM environment variable.</p>
-</li>
-<li>
-<p>From this version forward, Win32 console-mode binaries will be included
-in the DOS distribution in addition to the 16-bit binaries. Added
-Makefile.vc for this purpose.</p>
-</li>
-<li>
-<p>Added `return 0;' to test/objlink.c to prevent compiler warnings.</p>
-</li>
-<li>
-<p>Added the __NASM_MAJOR__ and __NASM_MINOR__ standard defines.</p>
-</li>
-<li>
-<p>Added an alternative memory-reference syntax in which prefixing an
-operand with `&amp;' is equivalent to enclosing it in square brackets, at
-the request of Fox Cutter.</p>
-</li>
-<li>
-<p>Errors in pass two now cause the program to return a non-zero error
-code, which they didn't before.</p>
-</li>
-<li>
-<p>Fixed the single-line macro cycle detection, which didn't work at all on
-macros with no parameters (caused an infinite loop). Also changed the
-behaviour of single-line macro cycle detection to work like cpp, so that
-macros like `extrn' as given in the documentation can be implemented.</p>
-</li>
-<li>
-<p>Fixed the implementation of WRT, which was too restrictive in that you
-couldn't do `mov ax,di+abc wrt dgroup' because (di+abc) wasn't a
-relocatable reference.</p>
-</li>
-</ul>
-<h4 id="section-C.3.4">C.3.4 Version 0.94 released April 1997</h4>
-<ul>
-<li>
-<p>Major item: added the macro processor.</p>
-</li>
-<li>
-<p>Added undocumented instructions SMI, IBTS, XBTS and LOADALL286. Also
-reorganised CMPXCHG instruction into early-486 and Pentium forms. Thanks to
-Thobias Jones for the information.</p>
-</li>
-<li>
-<p>Fixed two more stupid bugs in ELF, which were causing `ld' to continue
-to seg-fault in a lot of non-trivial cases.</p>
-</li>
-<li>
-<p>Fixed a seg-fault in the label manager.</p>
-</li>
-<li>
-<p>Stopped FBLD and FBSTP from _requiring_ the TWORD keyword, which is the
-only option for BCD loads/stores in any case.</p>
-</li>
-<li>
-<p>Ensured FLDCW, FSTCW and FSTSW can cope with the WORD keyword, if anyone
-bothers to provide it. Previously they complained unless no keyword at all
-was present.</p>
-</li>
-<li>
-<p>Some forms of FDIV/FDIVR and FSUB/FSUBR were still inverted: a vestige
-of a bug that I thought had been fixed in 0.92. This was fixed, hopefully
-for good this time...</p>
-</li>
-<li>
-<p>Another minor phase error (insofar as a phase error can _ever_ be minor)
-fixed, this one occurring in code of the form</p>
-<pre>
-  rol ax,forward_reference 
-  forward_reference equ 1
-</pre>
-</li>
-<li>
-<p>The number supplied to TIMES is now sanity-checked for positivity, and
-also may be greater than 64K (which previously didn't work on 16-bit
-systems).</p>
-</li>
-<li>
-<p>Added Watcom C makefiles, and misc/pmw.bat, donated by Dominik Behr.</p>
-</li>
-<li>
-<p>Added the INCBIN pseudo-opcode.</p>
-</li>
-<li>
-<p>Due to the advent of the preprocessor, the INCLUDE and INC
-directives have become obsolete. They are still supported in this version,
-with a warning, but won't be in the next.</p>
-</li>
-<li>
-<p>Fixed a bug in OBJ format, which caused incorrect object records to be
-output when absolute labels were made global.</p>
-</li>
-<li>
-<p>Updates to RDOFF subdirectory, and changes to outrdf.c.</p>
-</li>
-</ul>
-<h4 id="section-C.3.5">C.3.5 Version 0.93 released January 1997</h4>
-<p>This release went out in a great hurry after semi-crippling bugs were
-found in 0.92.</p>
-<ul>
-<li>
-<p>Really <em>did</em> fix the stack overflows this time. *blush*</p>
-</li>
-<li>
-<p>Had problems with EA instruction sizes changing between passes, when an
-offset contained a forward reference and so 4 bytes were allocated for the
-offset in pass one; by pass two the symbol had been defined and happened to
-be a small absolute value, so only 1 byte got allocated, causing
-instruction size mismatch between passes and hence incorrect address
-calculations. Fixed.</p>
-</li>
-<li>
-<p>Stupid bug in the revised ELF section generation fixed (associated
-string-table section for .symtab was hard-coded as 7, even when this didn't
-fit with the real section table). Was causing `ld' to seg-fault under
-Linux.</p>
-</li>
-<li>
-<p>Included a new Borland C makefile, Makefile.bc2, donated by Fox Cutter
-&lt;lmb@comtch.iea.com&gt;.</p>
-</li>
-</ul>
-<h4 id="section-C.3.6">C.3.6 Version 0.92 released January 1997</h4>
-<ul>
-<li>
-<p>The FDIVP/FDIVRP and FSUBP/FSUBRP pairs had been inverted: this was
-fixed. This also affected the LCC driver.</p>
-</li>
-<li>
-<p>Fixed a bug regarding 32-bit effective addresses of the form
-<code>other_register+ESP</code>.</p>
-</li>
-<li>
-<p>Documentary changes, notably documentation of the fact that Borland
-Win32 compilers use `obj' rather than `win32' object format.</p>
-</li>
-<li>
-<p>Fixed the COMENT record in OBJ files, which was formatted incorrectly.</p>
-</li>
-<li>
-<p>Fixed a bug causing segfaults in large RDF files.</p>
-</li>
-<li>
-<p>OBJ format now strips initial periods from segment and group
-definitions, in order to avoid complications with the local label syntax.</p>
-</li>
-<li>
-<p>Fixed a bug in disassembling far calls and jumps in NDISASM.</p>
-</li>
-<li>
-<p>Added support for user-defined sections in COFF and ELF files.</p>
-</li>
-<li>
-<p>Compiled the DOS binaries with a sensible amount of stack, to prevent
-stack overflows on any arithmetic expression containing parentheses.</p>
-</li>
-<li>
-<p>Fixed a bug in handling of files that do not terminate in a newline.</p>
-</li>
-</ul>
-<h4 id="section-C.3.7">C.3.7 Version 0.91 released November 1996</h4>
-<ul>
-<li>
-<p>Loads of bug fixes.</p>
-</li>
-<li>
-<p>Support for RDF added.</p>
-</li>
-<li>
-<p>Support for DBG debugging format added.</p>
-</li>
-<li>
-<p>Support for 32-bit extensions to Microsoft OBJ format added.</p>
-</li>
-<li>
-<p>Revised for Borland C: some variable names changed, makefile added.</p>
-</li>
-<li>
-<p>LCC support revised to actually work.</p>
-</li>
-<li>
-<p>JMP/CALL NEAR/FAR notation added.</p>
-</li>
-<li>
-<p>`a16', `o16', `a32' and `o32' prefixes added.</p>
-</li>
-<li>
-<p>Range checking on short jumps implemented.</p>
-</li>
-<li>
-<p>MMX instruction support added.</p>
-</li>
-<li>
-<p>Negative floating point constant support added.</p>
-</li>
-<li>
-<p>Memory handling improved to bypass 64K barrier under DOS.</p>
-</li>
-<li>
-<p><code>$</code> prefix to force treatment of reserved words as
-identifiers added.</p>
-</li>
-<li>
-<p>Default-size mechanism for object formats added.</p>
-</li>
-<li>
-<p>Compile-time configurability added.</p>
-</li>
-<li>
-<p><code>#</code>, <code>@</code>, <code>~</code> and c{?} are now valid
-characters in labels.</p>
-</li>
-<li>
-<p><code>-e</code> and <code>-k</code> options in NDISASM added.</p>
-</li>
-</ul>
-<h4 id="section-C.3.8">C.3.8 Version 0.90 released October 1996</h4>
-<p>First release version. First support for object file output. Other
-changes from previous version (0.3x) too numerous to document.</p>
-</div>
-</body>
-</html>

_service:tar_scm:nasm-2.16.01-xdoc.tar.xz/doc/html/nasmdocd.html Deleted

@@ -1,66 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.1//EN" "http://www.w3.org/TR/xhtml11/DTD/xhtml11.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<meta charset="UTF-8" />
-<title>NASM - The Netwide Assembler</title>
-<link href="nasmdoc.css" rel="stylesheet" type="text/css" />
-<link href="local.css" rel="stylesheet" type="text/css" />
-</head>
-<body>
-<ul class="navbar">
-<li class="first"><a class="prev" href="nasmdocc.html">Appendix C</a></li>
-<li><a class="next" href="nasmdoce.html">Appendix E</a></li>
-<li><a class="toc" href="nasmdoc0.html">Contents</a></li>
-<li class="last"><a class="index" href="nasmdoci.html">Index</a></li>
-</ul>
-<div class="title">
-<h1>NASM - The Netwide Assembler</h1>
-<span class="subtitle">version 2.16.01</span>
-</div>
-<div class="contents"
->
-<h2 id="appendix-D">Appendix D: Building NASM from Source</h2>
-<p>The source code for NASM is available from our website,
-<a href="http://www.nasm.us/">http://wwww.nasm.us/</a>, see
-<a href="nasmdoce.html#section-E.1">section E.1</a>.</p>
-<h3 id="section-D.1">D.1 Building from a Source Archive</h3>
-<p>The source archives available on the web site should be capable of
-building on a number of platforms. This is the recommended method for
-building NASM to support platforms for which executables are not available.</p>
-<p>On a system which has Unix shell (<code>sh</code>), run:</p>
-<pre>
-     sh configure 
-     make everything
-</pre>
-<p>A number of options can be passed to <code>configure</code>; see
-<code>sh configure --help</code>.</p>
-<p>A set of Makefiles for some other environments are also available;
-please see the file <code>Mkfiles/README</code>.</p>
-<p>To build the installer for the Windows platform, you will need the
-<em>Nullsoft Scriptable Installer</em>, NSIS, installed.</p>
-<p>To build the documentation, you will need a set of additional tools. The
-documentation is not likely to be able to build on non-Unix systems.</p>
-<h3 id="section-D.2">D.2 Building from the <code>git</code> Repository</h3>
-<p>The NASM development tree is kept in a source code repository using the
-<code>git</code> distributed source control system. The link is available
-on the website. This is recommended only to participate in the development
-of NASM or to assist with testing the development code.</p>
-<p>To build NASM from the <code>git</code> repository you will need a Perl
-interpreter and, if building on a Unix system, GNU autoconf installed on
-your system.</p>
-<p>To build on a Unix system, run:</p>
-<pre>
-     sh autogen.sh
-</pre>
-<p>to create the <code>configure</code> script and then build as listed
-above.</p>
-<h3 id="section-D.3">D.3 Building the documentation</h3>
-<p>To build the documentation, you will need a Perl interpreter, a
-Postscript to PDF converter such as Ghostscript, and suitable fonts
-installed on your system. The recommended (and default) fonts are Adobe's
-Source Sans and Source Code fonts, which are freely available under the SIL
-Open Font License.</p>
-</div>
-</body>
-</html>

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-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.1//EN" "http://www.w3.org/TR/xhtml11/DTD/xhtml11.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<meta charset="UTF-8" />
-<title>NASM - The Netwide Assembler</title>
-<link href="nasmdoc.css" rel="stylesheet" type="text/css" />
-<link href="local.css" rel="stylesheet" type="text/css" />
-</head>
-<body>
-<ul class="navbar">
-<li class="first"><a class="prev" href="nasmdocd.html">Appendix D</a></li>
-<li><a class="next" href="nasmdocf.html">Appendix F</a></li>
-<li><a class="toc" href="nasmdoc0.html">Contents</a></li>
-<li class="last"><a class="index" href="nasmdoci.html">Index</a></li>
-</ul>
-<div class="title">
-<h1>NASM - The Netwide Assembler</h1>
-<span class="subtitle">version 2.16.01</span>
-</div>
-<div class="contents"
->
-<h2 id="appendix-E">Appendix E: Contact Information</h2>
-<h3 id="section-E.1">E.1 Website</h3>
-<p>NASM has a website at
-<a href="http://www.nasm.us/"><code>http://www.nasm.us/</code></a>.</p>
-<p>New releases, release candidates, and daily development snapshots of
-NASM are available from the official web site in source form as well as
-binaries for a number of common platforms.</p>
-<h4 id="section-E.1.1">E.1.1 User Forums</h4>
-<p>Users of NASM may find the Forums on the website useful. These are,
-however, not frequented much by the developers of NASM, so they are not
-suitable for reporting bugs.</p>
-<h4 id="section-E.1.2">E.1.2 Development Community</h4>
-<p>The development of NASM is coordinated primarily though the
-<code>nasm-devel</code> mailing list. If you wish to participate in
-development of NASM, please join this mailing list. Subscription links and
-archives of past posts are available on the website.</p>
-<h3 id="section-E.2">E.2 Reporting Bugs</h3>
-<p>To report bugs in NASM, please use the bug tracker at
-<a href="http://www.nasm.us/"><code>http://www.nasm.us/</code></a> (click
-on "Bug Tracker"), or if that fails then through one of the contacts in
-<a href="#section-E.1">section E.1</a>.</p>
-<p>Please read <a href="nasmdoc2.html#section-2.2">section 2.2</a> first,
-and don't report the bug if it's listed in there as a deliberate feature.
-(If you think the feature is badly thought out, feel free to send us
-reasons why you think it should be changed, but don't just send us mail
-saying `This is a bug' if the documentation says we did it on purpose.)
-Then read <a href="nasmdo13.html#section-13.1">section 13.1</a>, and don't
-bother reporting the bug if it's listed there.</p>
-<p>If you do report a bug, <em>please</em> make sure your bug report
-includes the following information:</p>
-<ul>
-<li>
-<p>What operating system you're running NASM under. Linux, FreeBSD, NetBSD,
-MacOS X, Win16, Win32, Win64, MS-DOS, OS/2, VMS, whatever.</p>
-</li>
-<li>
-<p>If you compiled your own executable from a source archive, compiled your
-own executable from <code>git</code>, used the standard distribution
-binaries from the website, or got an executable from somewhere else (e.g. a
-Linux distribution.) If you were using a locally built executable, try to
-reproduce the problem using one of the standard binaries, as this will make
-it easier for us to reproduce your problem prior to fixing it.</p>
-</li>
-<li>
-<p>Which version of NASM you're using, and exactly how you invoked it. Give
-us the precise command line, and the contents of the <code>NASMENV</code>
-environment variable if any.</p>
-</li>
-<li>
-<p>Which versions of any supplementary programs you're using, and how you
-invoked them. If the problem only becomes visible at link time, tell us
-what linker you're using, what version of it you've got, and the exact
-linker command line. If the problem involves linking against object files
-generated by a compiler, tell us what compiler, what version, and what
-command line or options you used. (If you're compiling in an IDE, please
-try to reproduce the problem with the command-line version of the
-compiler.)</p>
-</li>
-<li>
-<p>If at all possible, send us a NASM source file which exhibits the
-problem. If this causes copyright problems (e.g. you can only reproduce the
-bug in restricted-distribution code) then bear in mind the following two
-points: firstly, we guarantee that any source code sent to us for the
-purposes of debugging NASM will be used <em>only</em> for the purposes of
-debugging NASM, and that we will delete all our copies of it as soon as we
-have found and fixed the bug or bugs in question; and secondly, we would
-prefer <em>not</em> to be mailed large chunks of code anyway. The smaller
-the file, the better. A three-line sample file that does nothing useful
-<em>except</em> demonstrate the problem is much easier to work with than a
-fully fledged ten-thousand-line program. (Of course, some errors
-<em>do</em> only crop up in large files, so this may not be possible.)</p>
-</li>
-<li>
-<p>A description of what the problem actually <em>is</em>. `It doesn't
-work' is <em>not</em> a helpful description! Please describe exactly what
-is happening that shouldn't be, or what isn't happening that should.
-Examples might be: `NASM generates an error message saying Line 3 for an
-error that's actually on Line 5'; `NASM generates an error message that I
-believe it shouldn't be generating at all'; `NASM fails to generate an
-error message that I believe it <em>should</em> be generating'; `the object
-file produced from this source code crashes my linker'; `the ninth byte of
-the output file is 66 and I think it should be 77 instead'.</p>
-</li>
-<li>
-<p>If you believe the output file from NASM to be faulty, send it to us.
-That allows us to determine whether our own copy of NASM generates the same
-file, or whether the problem is related to portability issues between our
-development platforms and yours. We can handle binary files mailed to us as
-MIME attachments, uuencoded, and even BinHex. Alternatively, we may be able
-to provide an FTP site you can upload the suspect files to; but mailing
-them is easier for us.</p>
-</li>
-<li>
-<p>Any other information or data files that might be helpful. If, for
-example, the problem involves NASM failing to generate an object file while
-TASM can generate an equivalent file without trouble, then send us
-<em>both</em> object files, so we can see what TASM is doing differently
-from us.</p>
-</li>
-</ul>
-</div>
-</body>
-</html>

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@@ -1,6469 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.1//EN" "http://www.w3.org/TR/xhtml11/DTD/xhtml11.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<meta charset="UTF-8" />
-<title>NASM - The Netwide Assembler</title>
-<link href="nasmdoc.css" rel="stylesheet" type="text/css" />
-<link href="local.css" rel="stylesheet" type="text/css" />
-</head>
-<body>
-<ul class="navbar">
-<li class="first"><a class="prev" href="nasmdoce.html">Appendix E</a></li>
-<li><a class="toc" href="nasmdoc0.html">Contents</a></li>
-<li class="last"><a class="index" href="nasmdoci.html">Index</a></li>
-</ul>
-<div class="title">
-<h1>NASM - The Netwide Assembler</h1>
-<span class="subtitle">version 2.16.01</span>
-</div>
-<div class="contents"
->
-<h2 id="appendix-F">Appendix F: Instruction List</h2>
-<h3 id="section-F.1">F.1 Introduction</h3>
-<p>The following sections show the instructions which NASM currently
-supports. For each instruction, there is a separate entry for each
-supported addressing mode. The third column shows the processor type in
-which the instruction was introduced and, when appropriate, one or more
-usage flags.</p>
-<h4 id="section-F.1.1">F.1.1 Special instructions (pseudo-ops)</h4>
-<pre>
-DB                                         
-DW                                         
-DD                                         
-DQ                                         
-DT                                         
-DO                                         
-DY                                         
-DZ                                         
-RESB             imm                      8086 
-RESW             imm                      8086 
-RESD             imm                      8086 
-RESQ             imm                      8086 
-REST             imm                      8086 
-RESO             imm                      8086 
-RESY             imm                      8086 
-RESZ             imm                      8086 
-INCBIN                                    
-</pre>
-<h4 id="section-F.1.2">F.1.2 Conventional instructions</h4>
-<pre>
-AAA                                       8086,NOLONG 
-AAD                                       8086,NOLONG 
-AAD              imm                      8086,NOLONG 
-AAM                                       8086,NOLONG 
-AAM              imm                      8086,NOLONG 
-AAS                                       8086,NOLONG 
-ADC              mem,reg8                 8086,LOCK 
-ADC              reg8,reg8                8086 
-ADC              mem,reg16                8086,LOCK 
-ADC              reg16,reg16              8086 
-ADC              mem,reg32                386,LOCK 
-ADC              reg32,reg32              386 
-ADC              mem,reg64                X86_64,LONG,LOCK 
-ADC              reg64,reg64              X86_64,LONG 
-ADC              reg8,mem                 8086 
-ADC              reg8,reg8                8086 
-ADC              reg16,mem                8086 
-ADC              reg16,reg16              8086 
-ADC              reg32,mem                386 
-ADC              reg32,reg32              386 
-ADC              reg64,mem                X86_64,LONG 
-ADC              reg64,reg64              X86_64,LONG 
-ADC              rm16,imm8                8086,LOCK 
-ADC              rm32,imm8                386,LOCK 
-ADC              rm64,imm8                X86_64,LONG,LOCK 
-ADC              reg_al,imm               8086 
-ADC              reg_ax,sbyteword         8086,ND 
-ADC              reg_ax,imm               8086 
-ADC              reg_eax,sbytedword       386,ND 
-ADC              reg_eax,imm              386 
-ADC              reg_rax,sbytedword       X86_64,LONG,ND 
-ADC              reg_rax,imm              X86_64,LONG 
-ADC              rm8,imm                  8086,LOCK 
-ADC              rm16,sbyteword           8086,LOCK,ND 
-ADC              rm16,imm                 8086,LOCK 
-ADC              rm32,sbytedword          386,LOCK,ND 
-ADC              rm32,imm                 386,LOCK 
-ADC              rm64,sbytedword          X86_64,LONG,LOCK,ND 
-ADC              rm64,imm                 X86_64,LONG,LOCK 
-ADC              mem,imm8                 8086,LOCK,ND 
-ADC              mem,sbyteword16          8086,LOCK,ND 
-ADC              mem,imm16                8086,LOCK 
-ADC              mem,sbytedword32         386,LOCK,ND 
-ADC              mem,imm32                386,LOCK 
-ADC              rm8,imm                  8086,LOCK,ND,NOLONG 
-ADD              mem,reg8                 8086,LOCK 
-ADD              reg8,reg8                8086 
-ADD              mem,reg16                8086,LOCK 
-ADD              reg16,reg16              8086 
-ADD              mem,reg32                386,LOCK 
-ADD              reg32,reg32              386 
-ADD              mem,reg64                X86_64,LONG,LOCK 
-ADD              reg64,reg64              X86_64,LONG 
-ADD              reg8,mem                 8086 
-ADD              reg8,reg8                8086 
-ADD              reg16,mem                8086 
-ADD              reg16,reg16              8086 
-ADD              reg32,mem                386 
-ADD              reg32,reg32              386 
-ADD              reg64,mem                X86_64,LONG 
-ADD              reg64,reg64              X86_64,LONG 
-ADD              rm16,imm8                8086,LOCK 
-ADD              rm32,imm8                386,LOCK 
-ADD              rm64,imm8                X86_64,LONG,LOCK 
-ADD              reg_al,imm               8086 
-ADD              reg_ax,sbyteword         8086,ND 
-ADD              reg_ax,imm               8086 
-ADD              reg_eax,sbytedword       386,ND 
-ADD              reg_eax,imm              386 
-ADD              reg_rax,sbytedword       X86_64,LONG,ND 
-ADD              reg_rax,imm              X86_64,LONG 
-ADD              rm8,imm                  8086,LOCK 
-ADD              rm16,sbyteword           8086,LOCK,ND 
-ADD              rm16,imm                 8086,LOCK 
-ADD              rm32,sbytedword          386,LOCK,ND 
-ADD              rm32,imm                 386,LOCK 
-ADD              rm64,sbytedword          X86_64,LONG,LOCK,ND 
-ADD              rm64,imm                 X86_64,LONG,LOCK 
-ADD              mem,imm8                 8086,LOCK 
-ADD              mem,sbyteword16          8086,LOCK,ND 
-ADD              mem,imm16                8086,LOCK 
-ADD              mem,sbytedword32         386,LOCK,ND 
-ADD              mem,imm32                386,LOCK 
-ADD              rm8,imm                  8086,LOCK,ND,NOLONG 
-AND              mem,reg8                 8086,LOCK 
-AND              reg8,reg8                8086 
-AND              mem,reg16                8086,LOCK 
-AND              reg16,reg16              8086 
-AND              mem,reg32                386,LOCK 
-AND              reg32,reg32              386 
-AND              mem,reg64                X86_64,LONG,LOCK 
-AND              reg64,reg64              X86_64,LONG 
-AND              reg8,mem                 8086 
-AND              reg8,reg8                8086 
-AND              reg16,mem                8086 
-AND              reg16,reg16              8086 
-AND              reg32,mem                386 
-AND              reg32,reg32              386 
-AND              reg64,mem                X86_64,LONG 
-AND              reg64,reg64              X86_64,LONG 
-AND              rm16,imm8                8086,LOCK 
-AND              rm32,imm8                386,LOCK 
-AND              rm64,imm8                X86_64,LONG,LOCK 
-AND              reg_al,imm               8086 
-AND              reg_ax,sbyteword         8086,ND 
-AND              reg_ax,imm               8086 
-AND              reg_eax,sbytedword       386,ND 
-AND              reg_eax,imm              386 
-AND              reg_rax,sbytedword       X86_64,LONG,ND 
-AND              reg_rax,imm              X86_64,LONG 
-AND              rm8,imm                  8086,LOCK 
-AND              rm16,sbyteword           8086,LOCK,ND 
-AND              rm16,imm                 8086,LOCK 
-AND              rm32,sbytedword          386,LOCK,ND 
-AND              rm32,imm                 386,LOCK 
-AND              rm64,sbytedword          X86_64,LONG,LOCK,ND 
-AND              rm64,imm                 X86_64,LONG,LOCK 
-AND              mem,imm8                 8086,LOCK 
-AND              mem,sbyteword16          8086,LOCK,ND 
-AND              mem,imm16                8086,LOCK 
-AND              mem,sbytedword32         386,LOCK,ND 
-AND              mem,imm32                386,LOCK 
-AND              rm8,imm                  8086,LOCK,ND,NOLONG 
-ARPL             mem,reg16                286,PROT,NOLONG 
-ARPL             reg16,reg16              286,PROT,NOLONG 
-BB0_RESET                                 PENT,CYRIX,ND,OBSOLETE 
-BB1_RESET                                 PENT,CYRIX,ND,OBSOLETE 
-BOUND            reg16,mem                186,NOLONG 
-BOUND            reg32,mem                386,NOLONG 
-BSF              reg16,mem                386 
-BSF              reg16,reg16              386 
-BSF              reg32,mem                386 
-BSF              reg32,reg32              386 
-BSF              reg64,mem                X86_64,LONG 
-BSF              reg64,reg64              X86_64,LONG 
-BSR              reg16,mem                386 
-BSR              reg16,reg16              386 
-BSR              reg32,mem                386 
-BSR              reg32,reg32              386 
-BSR              reg64,mem                X86_64,LONG 
-BSR              reg64,reg64              X86_64,LONG 
-BSWAP            reg32                    486 
-BSWAP            reg64                    X86_64,LONG 
-BT               mem,reg16                386 
-BT               reg16,reg16              386 
-BT               mem,reg32                386 
-BT               reg32,reg32              386 
-BT               mem,reg64                X86_64,LONG 
-BT               reg64,reg64              X86_64,LONG 
-BT               rm16,imm8                386 
-BT               rm32,imm8                386 
-BT               rm64,imm8                X86_64,LONG 
-BTC              mem,reg16                386,LOCK 
-BTC              reg16,reg16              386 
-BTC              mem,reg32                386,LOCK 
-BTC              reg32,reg32              386 
-BTC              mem,reg64                X86_64,LONG,LOCK 
-BTC              reg64,reg64              X86_64,LONG 
-BTC              rm16,imm8                386,LOCK 
-BTC              rm32,imm8                386,LOCK 
-BTC              rm64,imm8                X86_64,LONG,LOCK 
-BTR              mem,reg16                386,LOCK 
-BTR              reg16,reg16              386 
-BTR              mem,reg32                386,LOCK 
-BTR              reg32,reg32              386 
-BTR              mem,reg64                X86_64,LONG,LOCK 
-BTR              reg64,reg64              X86_64,LONG 
-BTR              rm16,imm8                386,LOCK 
-BTR              rm32,imm8                386,LOCK 
-BTR              rm64,imm8                X86_64,LONG,LOCK 
-BTS              mem,reg16                386,LOCK 
-BTS              reg16,reg16              386 
-BTS              mem,reg32                386,LOCK 
-BTS              reg32,reg32              386 
-BTS              mem,reg64                X86_64,LONG,LOCK 
-BTS              reg64,reg64              X86_64,LONG 
-BTS              rm16,imm8                386,LOCK 
-BTS              rm32,imm8                386,LOCK 
-BTS              rm64,imm8                X86_64,LONG,LOCK 
-CALL             imm                      8086,BND 
-CALL             imm|near                 8086,ND,BND 
-CALL             imm|far                  8086,ND,NOLONG 
-CALL             imm16                    8086,NOLONG,BND 
-CALL             imm16|near               8086,ND,NOLONG,BND 
-CALL             imm16|far                8086,ND,NOLONG 
-CALL             imm32                    386,NOLONG,BND 
-CALL             imm32|near               386,ND,NOLONG,BND 
-CALL             imm32|far                386,ND,NOLONG 
-CALL             imm64                    X86_64,LONG,BND 
-CALL             imm64|near               X86_64,LONG,ND,BND 
-CALL             imm:imm                  8086,NOLONG 
-CALL             imm16:imm                8086,NOLONG 
-CALL             imm:imm16                8086,NOLONG 
-CALL             imm32:imm                386,NOLONG 
-CALL             imm:imm32                386,NOLONG 
-CALL             mem|far                  8086,NOLONG 
-CALL             mem|far                  X86_64,LONG 
-CALL             mem16|far                8086 
-CALL             mem32|far                386 
-CALL             mem64|far                X86_64,LONG 
-CALL             mem|near                 8086,ND,BND 
-CALL             rm16|near                8086,NOLONG,ND,BND 
-CALL             rm32|near                386,NOLONG,ND,BND 
-CALL             rm64|near                X86_64,LONG,ND,BND 
-CALL             mem                      8086,BND 
-CALL             rm16                     8086,NOLONG,BND 
-CALL             rm32                     386,NOLONG,BND 
-CALL             rm64                     X86_64,LONG,BND 
-CBW                                       8086 
-CDQ                                       386 
-CDQE                                      X86_64,LONG 
-CLC                                       8086 
-CLD                                       8086 
-CLI                                       8086 
-CLTS                                      286,PRIV 
-CMC                                       8086 
-CMP              mem,reg8                 8086 
-CMP              reg8,reg8                8086 
-CMP              mem,reg16                8086 
-CMP              reg16,reg16              8086 
-CMP              mem,reg32                386 
-CMP              reg32,reg32              386 
-CMP              mem,reg64                X86_64,LONG 
-CMP              reg64,reg64              X86_64,LONG 
-CMP              reg8,mem                 8086 
-CMP              reg8,reg8                8086 
-CMP              reg16,mem                8086 
-CMP              reg16,reg16              8086 
-CMP              reg32,mem                386 
-CMP              reg32,reg32              386 
-CMP              reg64,mem                X86_64,LONG 
-CMP              reg64,reg64              X86_64,LONG 
-CMP              rm16,imm8                8086 
-CMP              rm32,imm8                386 
-CMP              rm64,imm8                X86_64,LONG 
-CMP              reg_al,imm               8086 
-CMP              reg_ax,sbyteword         8086,ND 
-CMP              reg_ax,imm               8086 
-CMP              reg_eax,sbytedword       386,ND 
-CMP              reg_eax,imm              386 
-CMP              reg_rax,sbytedword       X86_64,LONG,ND 
-CMP              reg_rax,imm              X86_64,LONG 
-CMP              rm8,imm                  8086 
-CMP              rm16,sbyteword           8086,ND 
-CMP              rm16,imm                 8086 
-CMP              rm32,sbytedword          386,ND 
-CMP              rm32,imm                 386 
-CMP              rm64,sbytedword          X86_64,LONG,ND 
-CMP              rm64,imm                 X86_64,LONG 
-CMP              mem,imm8                 8086 
-CMP              mem,sbyteword16          8086,ND 
-CMP              mem,imm16                8086 
-CMP              mem,sbytedword32         386,ND 
-CMP              mem,imm32                386 
-CMP              rm8,imm                  8086,ND,NOLONG 
-CMPSB                                     8086 
-CMPSD                                     386 
-CMPSQ                                     X86_64,LONG 
-CMPSW                                     8086 
-CMPXCHG          mem,reg8                 PENT,LOCK 
-CMPXCHG          reg8,reg8                PENT 
-CMPXCHG          mem,reg16                PENT,LOCK 
-CMPXCHG          reg16,reg16              PENT 
-CMPXCHG          mem,reg32                PENT,LOCK 
-CMPXCHG          reg32,reg32              PENT 
-CMPXCHG          mem,reg64                X86_64,LONG,LOCK 
-CMPXCHG          reg64,reg64              X86_64,LONG 
-CMPXCHG486       mem,reg8                 486,UNDOC,ND,LOCK,OBSOLETE 
-CMPXCHG486       reg8,reg8                486,UNDOC,ND,OBSOLETE 
-CMPXCHG486       mem,reg16                486,UNDOC,ND,LOCK,OBSOLETE 
-CMPXCHG486       reg16,reg16              486,UNDOC,ND,OBSOLETE 
-CMPXCHG486       mem,reg32                486,UNDOC,ND,LOCK,OBSOLETE 
-CMPXCHG486       reg32,reg32              486,UNDOC,ND,OBSOLETE 
-CMPXCHG8B        mem64                    PENT,LOCK 
-CMPXCHG16B       mem128                   X86_64,LONG,LOCK 
-CPUID                                     PENT 
-CPU_READ                                  PENT,CYRIX 
-CPU_WRITE                                 PENT,CYRIX 
-CQO                                       X86_64,LONG 
-CWD                                       8086 
-CWDE                                      386 
-DAA                                       8086,NOLONG 
-DAS                                       8086,NOLONG 
-DEC              reg16                    8086,NOLONG 
-DEC              reg32                    386,NOLONG 
-DEC              rm8                      8086,LOCK 
-DEC              rm16                     8086,LOCK 
-DEC              rm32                     386,LOCK 
-DEC              rm64                     X86_64,LONG,LOCK 
-DIV              rm8                      8086 
-DIV              rm16                     8086 
-DIV              rm32                     386 
-DIV              rm64                     X86_64,LONG 
-DMINT                                     P6,CYRIX 
-EMMS                                      PENT,MMX 
-ENTER            imm,imm                  186 
-EQU              imm                      8086 
-EQU              imm:imm                  8086 
-F2XM1                                     8086,FPU 
-FABS                                      8086,FPU 
-FADD             mem32                    8086,FPU 
-FADD             mem64                    8086,FPU 
-FADD             fpureg|to                8086,FPU 
-FADD             fpureg                   8086,FPU 
-FADD             fpureg,fpu0              8086,FPU 
-FADD             fpu0,fpureg              8086,FPU 
-FADD                                      8086,FPU,ND 
-FADDP            fpureg                   8086,FPU 
-FADDP            fpureg,fpu0              8086,FPU 
-FADDP                                     8086,FPU,ND 
-FBLD             mem80                    8086,FPU 
-FBLD             mem                      8086,FPU 
-FBSTP            mem80                    8086,FPU 
-FBSTP            mem                      8086,FPU 
-FCHS                                      8086,FPU 
-FCLEX                                     8086,FPU 
-FCMOVB           fpureg                   P6,FPU 
-FCMOVB           fpu0,fpureg              P6,FPU 
-FCMOVB                                    P6,FPU,ND 
-FCMOVBE          fpureg                   P6,FPU 
-FCMOVBE          fpu0,fpureg              P6,FPU 
-FCMOVBE                                   P6,FPU,ND 
-FCMOVE           fpureg                   P6,FPU 
-FCMOVE           fpu0,fpureg              P6,FPU 
-FCMOVE                                    P6,FPU,ND 
-FCMOVNB          fpureg                   P6,FPU 
-FCMOVNB          fpu0,fpureg              P6,FPU 
-FCMOVNB                                   P6,FPU,ND 
-FCMOVNBE         fpureg                   P6,FPU 
-FCMOVNBE         fpu0,fpureg              P6,FPU 
-FCMOVNBE                                  P6,FPU,ND 
-FCMOVNE          fpureg                   P6,FPU 
-FCMOVNE          fpu0,fpureg              P6,FPU 
-FCMOVNE                                   P6,FPU,ND 
-FCMOVNU          fpureg                   P6,FPU 
-FCMOVNU          fpu0,fpureg              P6,FPU 
-FCMOVNU                                   P6,FPU,ND 
-FCMOVU           fpureg                   P6,FPU 
-FCMOVU           fpu0,fpureg              P6,FPU 
-FCMOVU                                    P6,FPU,ND 
-FCOM             mem32                    8086,FPU 
-FCOM             mem64                    8086,FPU 
-FCOM             fpureg                   8086,FPU 
-FCOM             fpu0,fpureg              8086,FPU 
-FCOM                                      8086,FPU,ND 
-FCOMI            fpureg                   P6,FPU 
-FCOMI            fpu0,fpureg              P6,FPU 
-FCOMI                                     P6,FPU,ND 
-FCOMIP           fpureg                   P6,FPU 
-FCOMIP           fpu0,fpureg              P6,FPU 
-FCOMIP                                    P6,FPU,ND 
-FCOMP            mem32                    8086,FPU 
-FCOMP            mem64                    8086,FPU 
-FCOMP            fpureg                   8086,FPU 
-FCOMP            fpu0,fpureg              8086,FPU 
-FCOMP                                     8086,FPU,ND 
-FCOMPP                                    8086,FPU 
-FCOS                                      386,FPU 
-FDECSTP                                   8086,FPU 
-FDISI                                     8086,FPU 
-FDIV             mem32                    8086,FPU 
-FDIV             mem64                    8086,FPU 
-FDIV             fpureg|to                8086,FPU 
-FDIV             fpureg                   8086,FPU 
-FDIV             fpureg,fpu0              8086,FPU 
-FDIV             fpu0,fpureg              8086,FPU 
-FDIV                                      8086,FPU,ND 
-FDIVP            fpureg                   8086,FPU 
-FDIVP            fpureg,fpu0              8086,FPU 
-FDIVP                                     8086,FPU,ND 
-FDIVR            mem32                    8086,FPU 
-FDIVR            mem64                    8086,FPU 
-FDIVR            fpureg|to                8086,FPU 
-FDIVR            fpureg,fpu0              8086,FPU 
-FDIVR            fpureg                   8086,FPU 
-FDIVR            fpu0,fpureg              8086,FPU 
-FDIVR                                     8086,FPU,ND 
-FDIVRP           fpureg                   8086,FPU 
-FDIVRP           fpureg,fpu0              8086,FPU 
-FDIVRP                                    8086,FPU,ND 
-FEMMS                                     PENT,3DNOW 
-FENI                                      8086,FPU 
-FFREE            fpureg                   8086,FPU 
-FFREE                                     8086,FPU 
-FFREEP           fpureg                   286,FPU,UNDOC 
-FFREEP                                    286,FPU,UNDOC 
-FIADD            mem32                    8086,FPU 
-FIADD            mem16                    8086,FPU 
-FICOM            mem32                    8086,FPU 
-FICOM            mem16                    8086,FPU 
-FICOMP           mem32                    8086,FPU 
-FICOMP           mem16                    8086,FPU 
-FIDIV            mem32                    8086,FPU 
-FIDIV            mem16                    8086,FPU 
-FIDIVR           mem32                    8086,FPU 
-FIDIVR           mem16                    8086,FPU 
-FILD             mem32                    8086,FPU 
-FILD             mem16                    8086,FPU 
-FILD             mem64                    8086,FPU 
-FIMUL            mem32                    8086,FPU 
-FIMUL            mem16                    8086,FPU 
-FINCSTP                                   8086,FPU 
-FINIT                                     8086,FPU 
-FIST             mem32                    8086,FPU 
-FIST             mem16                    8086,FPU 
-FISTP            mem32                    8086,FPU 
-FISTP            mem16                    8086,FPU 
-FISTP            mem64                    8086,FPU 
-FISTTP           mem16                    PRESCOTT,FPU 
-FISTTP           mem32                    PRESCOTT,FPU 
-FISTTP           mem64                    PRESCOTT,FPU 
-FISUB            mem32                    8086,FPU 
-FISUB            mem16                    8086,FPU 
-FISUBR           mem32                    8086,FPU 
-FISUBR           mem16                    8086,FPU 
-FLD              mem32                    8086,FPU 
-FLD              mem64                    8086,FPU 
-FLD              mem80                    8086,FPU 
-FLD              fpureg                   8086,FPU 
-FLD                                       8086,FPU,ND 
-FLD1                                      8086,FPU 
-FLDCW            mem                      8086,FPU,SW 
-FLDENV           mem                      8086,FPU 
-FLDL2E                                    8086,FPU 
-FLDL2T                                    8086,FPU 
-FLDLG2                                    8086,FPU 
-FLDLN2                                    8086,FPU 
-FLDPI                                     8086,FPU 
-FLDZ                                      8086,FPU 
-FMUL             mem32                    8086,FPU 
-FMUL             mem64                    8086,FPU 
-FMUL             fpureg|to                8086,FPU 
-FMUL             fpureg,fpu0              8086,FPU 
-FMUL             fpureg                   8086,FPU 
-FMUL             fpu0,fpureg              8086,FPU 
-FMUL                                      8086,FPU,ND 
-FMULP            fpureg                   8086,FPU 
-FMULP            fpureg,fpu0              8086,FPU 
-FMULP                                     8086,FPU,ND 
-FNCLEX                                    8086,FPU 
-FNDISI                                    8086,FPU 
-FNENI                                     8086,FPU 
-FNINIT                                    8086,FPU 
-FNOP                                      8086,FPU 
-FNSAVE           mem                      8086,FPU 
-FNSTCW           mem                      8086,FPU,SW 
-FNSTENV          mem                      8086,FPU 
-FNSTSW           mem                      8086,FPU,SW 
-FNSTSW           reg_ax                   286,FPU 
-FPATAN                                    8086,FPU 
-FPREM                                     8086,FPU 
-FPREM1                                    386,FPU 
-FPTAN                                     8086,FPU 
-FRNDINT                                   8086,FPU 
-FRSTOR           mem                      8086,FPU 
-FSAVE            mem                      8086,FPU 
-FSCALE                                    8086,FPU 
-FSETPM                                    286,FPU 
-FSIN                                      386,FPU 
-FSINCOS                                   386,FPU 
-FSQRT                                     8086,FPU 
-FST              mem32                    8086,FPU 
-FST              mem64                    8086,FPU 
-FST              fpureg                   8086,FPU 
-FST                                       8086,FPU,ND 
-FSTCW            mem                      8086,FPU,SW 
-FSTENV           mem                      8086,FPU 
-FSTP             mem32                    8086,FPU 
-FSTP             mem64                    8086,FPU 
-FSTP             mem80                    8086,FPU 
-FSTP             fpureg                   8086,FPU 
-FSTP                                      8086,FPU,ND 
-FSTSW            mem                      8086,FPU,SW 
-FSTSW            reg_ax                   286,FPU 
-FSUB             mem32                    8086,FPU 
-FSUB             mem64                    8086,FPU 
-FSUB             fpureg|to                8086,FPU 
-FSUB             fpureg,fpu0              8086,FPU 
-FSUB             fpureg                   8086,FPU 
-FSUB             fpu0,fpureg              8086,FPU 
-FSUB                                      8086,FPU,ND 
-FSUBP            fpureg                   8086,FPU 
-FSUBP            fpureg,fpu0              8086,FPU 
-FSUBP                                     8086,FPU,ND 
-FSUBR            mem32                    8086,FPU 
-FSUBR            mem64                    8086,FPU 
-FSUBR            fpureg|to                8086,FPU 
-FSUBR            fpureg,fpu0              8086,FPU 
-FSUBR            fpureg                   8086,FPU 
-FSUBR            fpu0,fpureg              8086,FPU 
-FSUBR                                     8086,FPU,ND 
-FSUBRP           fpureg                   8086,FPU 
-FSUBRP           fpureg,fpu0              8086,FPU 
-FSUBRP                                    8086,FPU,ND 
-FTST                                      8086,FPU 
-FUCOM            fpureg                   386,FPU 
-FUCOM            fpu0,fpureg              386,FPU 
-FUCOM                                     386,FPU,ND 
-FUCOMI           fpureg                   P6,FPU 
-FUCOMI           fpu0,fpureg              P6,FPU 
-FUCOMI                                    P6,FPU,ND 
-FUCOMIP          fpureg                   P6,FPU 
-FUCOMIP          fpu0,fpureg              P6,FPU 
-FUCOMIP                                   P6,FPU,ND 
-FUCOMP           fpureg                   386,FPU 
-FUCOMP           fpu0,fpureg              386,FPU 
-FUCOMP                                    386,FPU,ND 
-FUCOMPP                                   386,FPU 
-FXAM                                      8086,FPU 
-FXCH             fpureg                   8086,FPU 
-FXCH             fpureg,fpu0              8086,FPU 
-FXCH             fpu0,fpureg              8086,FPU 
-FXCH                                      8086,FPU,ND 
-FXTRACT                                   8086,FPU 
-FYL2X                                     8086,FPU 
-FYL2XP1                                   8086,FPU 
-HLT                                       8086,PRIV 
-IBTS             mem,reg16                386,SW,UNDOC,ND,OBSOLETE 
-IBTS             reg16,reg16              386,UNDOC,ND,OBSOLETE 
-IBTS             mem,reg32                386,SD,UNDOC,ND,OBSOLETE 
-IBTS             reg32,reg32              386,UNDOC,ND,OBSOLETE 
-ICEBP                                     386,ND 
-IDIV             rm8                      8086 
-IDIV             rm16                     8086 
-IDIV             rm32                     386 
-IDIV             rm64                     X86_64,LONG 
-IMUL             rm8                      8086 
-IMUL             rm16                     8086 
-IMUL             rm32                     386 
-IMUL             rm64                     X86_64,LONG 
-IMUL             reg16,mem                386 
-IMUL             reg16,reg16              386 
-IMUL             reg32,mem                386 
-IMUL             reg32,reg32              386 
-IMUL             reg64,mem                X86_64,LONG 
-IMUL             reg64,reg64              X86_64,LONG 
-IMUL             reg16,mem,imm8           186 
-IMUL             reg16,mem,sbyteword      186,ND 
-IMUL             reg16,mem,imm16          186 
-IMUL             reg16,mem,imm            186,ND 
-IMUL             reg16,reg16,imm8         186 
-IMUL             reg16,reg16,sbyteword    186,ND 
-IMUL             reg16,reg16,imm16        186 
-IMUL             reg16,reg16,imm          186,ND 
-IMUL             reg32,mem,imm8           386 
-IMUL             reg32,mem,sbytedword     386,ND 
-IMUL             reg32,mem,imm32          386 
-IMUL             reg32,mem,imm            386,ND 
-IMUL             reg32,reg32,imm8         386 
-IMUL             reg32,reg32,sbytedword   386,ND 
-IMUL             reg32,reg32,imm32        386 
-IMUL             reg32,reg32,imm          386,ND 
-IMUL             reg64,mem,imm8           X86_64,LONG 
-IMUL             reg64,mem,sbytedword     X86_64,LONG,ND 
-IMUL             reg64,mem,imm32          X86_64,LONG 
-IMUL             reg64,mem,imm            X86_64,LONG,ND 
-IMUL             reg64,reg64,imm8         X86_64,LONG 
-IMUL             reg64,reg64,sbytedword   X86_64,LONG,ND 
-IMUL             reg64,reg64,imm32        X86_64,LONG 
-IMUL             reg64,reg64,imm          X86_64,LONG,ND 
-IMUL             reg16,imm8               186 
-IMUL             reg16,sbyteword          186,ND 
-IMUL             reg16,imm16              186 
-IMUL             reg16,imm                186,ND 
-IMUL             reg32,imm8               386 
-IMUL             reg32,sbytedword         386,ND 
-IMUL             reg32,imm32              386 
-IMUL             reg32,imm                386,ND 
-IMUL             reg64,imm8               X86_64,LONG 
-IMUL             reg64,sbytedword         X86_64,LONG,ND 
-IMUL             reg64,imm32              X86_64,LONG 
-IMUL             reg64,imm                X86_64,LONG,ND 
-IN               reg_al,imm               8086 
-IN               reg_ax,imm               8086 
-IN               reg_eax,imm              386 
-IN               reg_al,reg_dx            8086 
-IN               reg_ax,reg_dx            8086 
-IN               reg_eax,reg_dx           386 
-INC              reg16                    8086,NOLONG 
-INC              reg32                    386,NOLONG 
-INC              rm8                      8086,LOCK 
-INC              rm16                     8086,LOCK 
-INC              rm32                     386,LOCK 
-INC              rm64                     X86_64,LONG,LOCK 
-INSB                                      186 
-INSD                                      386 
-INSW                                      186 
-INT              imm                      8086 
-INT01                                     386,ND 
-INT1                                      386 
-INT03                                     8086,ND 
-INT3                                      8086 
-INTO                                      8086,NOLONG 
-INVD                                      486,PRIV 
-INVPCID          reg32,mem128             INVPCID,PRIV,NOLONG 
-INVPCID          reg64,mem128             INVPCID,PRIV,LONG 
-INVLPG           mem                      486,PRIV 
-INVLPGA          reg_ax,reg_ecx           X86_64,AMD,NOLONG 
-INVLPGA          reg_eax,reg_ecx          X86_64,AMD 
-INVLPGA          reg_rax,reg_ecx          X86_64,LONG,AMD 
-INVLPGA                                   X86_64,AMD 
-IRET                                      8086 
-IRETD                                     386 
-IRETQ                                     X86_64,LONG 
-IRETW                                     8086 
-JCXZ             imm                      8086,NOLONG 
-JECXZ            imm                      386 
-JRCXZ            imm                      X86_64,LONG 
-JMP              imm|short                8086 
-JMP              imm                      8086,ND 
-JMP              imm                      8086,BND 
-JMP              imm|near                 8086,ND,BND 
-JMP              imm|far                  8086,ND,NOLONG 
-JMP              imm16                    8086,NOLONG,BND 
-JMP              imm16|near               8086,ND,NOLONG,BND 
-JMP              imm16|far                8086,ND,NOLONG 
-JMP              imm32                    386,NOLONG,BND 
-JMP              imm32|near               386,ND,NOLONG,BND 
-JMP              imm32|far                386,ND,NOLONG 
-JMP              imm64                    X86_64,LONG,BND 
-JMP              imm64|near               X86_64,LONG,ND,BND 
-JMP              imm:imm                  8086,NOLONG 
-JMP              imm16:imm                8086,NOLONG 
-JMP              imm:imm16                8086,NOLONG 
-JMP              imm32:imm                386,NOLONG 
-JMP              imm:imm32                386,NOLONG 
-JMP              mem|far                  8086,NOLONG 
-JMP              mem|far                  X86_64,LONG 
-JMP              mem16|far                8086 
-JMP              mem32|far                386 
-JMP              mem64|far                X86_64,LONG 
-JMP              mem|near                 8086,ND,BND 
-JMP              rm16|near                8086,NOLONG,ND,BND 
-JMP              rm32|near                386,NOLONG,ND,BND 
-JMP              rm64|near                X86_64,LONG,ND,BND 
-JMP              mem                      8086,BND 
-JMP              rm16                     8086,NOLONG,BND 
-JMP              rm32                     386,NOLONG,BND 
-JMP              rm64                     X86_64,LONG,BND 
-JMPE             imm                      IA64 
-JMPE             imm16                    IA64 
-JMPE             imm32                    IA64 
-JMPE             rm16                     IA64 
-JMPE             rm32                     IA64 
-LAHF                                      8086 
-LAR              reg16,mem                286,PROT,SW 
-LAR              reg16,reg16              286,PROT 
-LAR              reg16,reg32              386,PROT 
-LAR              reg16,reg64              X86_64,LONG,PROT,ND 
-LAR              reg32,mem                386,PROT,SW 
-LAR              reg32,reg16              386,PROT 
-LAR              reg32,reg32              386,PROT 
-LAR              reg32,reg64              X86_64,LONG,PROT,ND 
-LAR              reg64,mem                X86_64,LONG,PROT,SW 
-LAR              reg64,reg16              X86_64,LONG,PROT 
-LAR              reg64,reg32              X86_64,LONG,PROT 
-LAR              reg64,reg64              X86_64,LONG,PROT 
-LDS              reg16,mem                8086,NOLONG 
-LDS              reg32,mem                386,NOLONG 
-LEA              reg16,mem                8086,ANYSIZE 
-LEA              reg32,mem                386,ANYSIZE 
-LEA              reg64,mem                X86_64,LONG,ANYSIZE 
-LEA              reg16,imm                8086,ND,ANYSIZE 
-LEA              reg32,imm                386,ND,ANYSIZE 
-LEA              reg64,imm                X86_64,LONG,ND,ANYSIZE 
-LEAVE                                     186 
-LES              reg16,mem                8086,NOLONG 
-LES              reg32,mem                386,NOLONG 
-LFENCE                                    X86_64,LONG,AMD 
-LFS              reg16,mem                386 
-LFS              reg32,mem                386 
-LFS              reg64,mem                X86_64,LONG 
-LGDT             mem                      286,PRIV 
-LGS              reg16,mem                386 
-LGS              reg32,mem                386 
-LGS              reg64,mem                X86_64,LONG 
-LIDT             mem                      286,PRIV 
-LLDT             mem                      286,PROT,PRIV 
-LLDT             mem16                    286,PROT,PRIV 
-LLDT             reg16                    286,PROT,PRIV 
-LMSW             mem                      286,PRIV 
-LMSW             mem16                    286,PRIV 
-LMSW             reg16                    286,PRIV 
-LOADALL                                   386,UNDOC,ND,OBSOLETE 
-LOADALL286                                286,UNDOC,ND,OBSOLETE 
-LODSB                                     8086 
-LODSD                                     386 
-LODSQ                                     X86_64,LONG 
-LODSW                                     8086 
-LOOP             imm                      8086 
-LOOP             imm,reg_cx               8086,NOLONG 
-LOOP             imm,reg_ecx              386 
-LOOP             imm,reg_rcx              X86_64,LONG 
-LOOPE            imm                      8086 
-LOOPE            imm,reg_cx               8086,NOLONG 
-LOOPE            imm,reg_ecx              386 
-LOOPE            imm,reg_rcx              X86_64,LONG 
-LOOPNE           imm                      8086 
-LOOPNE           imm,reg_cx               8086,NOLONG 
-LOOPNE           imm,reg_ecx              386 
-LOOPNE           imm,reg_rcx              X86_64,LONG 
-LOOPNZ           imm                      8086 
-LOOPNZ           imm,reg_cx               8086,NOLONG 
-LOOPNZ           imm,reg_ecx              386 
-LOOPNZ           imm,reg_rcx              X86_64,LONG 
-LOOPZ            imm                      8086 
-LOOPZ            imm,reg_cx               8086,NOLONG 
-LOOPZ            imm,reg_ecx              386 
-LOOPZ            imm,reg_rcx              X86_64,LONG 
-LSL              reg16,mem                286,PROT,SW 
-LSL              reg16,reg16              286,PROT 
-LSL              reg16,reg32              386,PROT 
-LSL              reg16,reg64              X86_64,LONG,PROT,ND 
-LSL              reg32,mem                386,PROT,SW 
-LSL              reg32,reg16              386,PROT 
-LSL              reg32,reg32              386,PROT 
-LSL              reg32,reg64              X86_64,LONG,PROT,ND 
-LSL              reg64,mem                X86_64,LONG,PROT,SW 
-LSL              reg64,reg16              X86_64,LONG,PROT 
-LSL              reg64,reg32              X86_64,LONG,PROT 
-LSL              reg64,reg64              X86_64,LONG,PROT 
-LSS              reg16,mem                386 
-LSS              reg32,mem                386 
-LSS              reg64,mem                X86_64,LONG 
-LTR              mem                      286,PROT,PRIV 
-LTR              mem16                    286,PROT,PRIV 
-LTR              reg16                    286,PROT,PRIV 
-MFENCE                                    X86_64,LONG,AMD 
-MONITOR                                   PRESCOTT 
-MONITOR          reg_eax,reg_ecx,reg_edx  PRESCOTT,NOLONG,ND 
-MONITOR          reg_rax,reg_ecx,reg_edx  X86_64,LONG,ND 
-MONITORX                                  AMD 
-MONITORX         reg_rax,reg_ecx,reg_edx  X86_64,LONG,AMD,ND 
-MONITORX         reg_eax,reg_ecx,reg_edx  AMD,ND 
-MONITORX         reg_ax,reg_ecx,reg_edx   AMD,ND 
-MOV              mem,reg_sreg             8086,SW 
-MOV              reg16,reg_sreg           8086 
-MOV              reg32,reg_sreg           386 
-MOV              reg64,reg_sreg           X86_64,LONG,OPT,ND 
-MOV              rm64,reg_sreg            X86_64,LONG 
-MOV              reg_sreg,mem             8086,SW 
-MOV              reg_sreg,reg16           8086,OPT,ND 
-MOV              reg_sreg,reg32           386,OPT,ND 
-MOV              reg_sreg,reg64           X86_64,LONG,OPT,ND 
-MOV              reg_sreg,reg16           8086 
-MOV              reg_sreg,reg32           386 
-MOV              reg_sreg,rm64            X86_64,LONG 
-MOV              reg_al,mem_offs          8086 
-MOV              reg_ax,mem_offs          8086 
-MOV              reg_eax,mem_offs         386 
-MOV              reg_rax,mem_offs         X86_64,LONG 
-MOV              mem_offs,reg_al          8086,NOHLE 
-MOV              mem_offs,reg_ax          8086,NOHLE 
-MOV              mem_offs,reg_eax         386,NOHLE 
-MOV              mem_offs,reg_rax         X86_64,LONG,NOHLE 
-MOV              reg32,reg_creg           386,PRIV,NOLONG 
-MOV              reg64,reg_creg           X86_64,LONG,PRIV 
-MOV              reg_creg,reg32           386,PRIV,NOLONG 
-MOV              reg_creg,reg64           X86_64,LONG,PRIV 
-MOV              reg32,reg_dreg           386,PRIV,NOLONG 
-MOV              reg64,reg_dreg           X86_64,LONG,PRIV 
-MOV              reg_dreg,reg32           386,PRIV,NOLONG 
-MOV              reg_dreg,reg64           X86_64,LONG,PRIV 
-MOV              reg32,reg_treg           386,NOLONG,ND 
-MOV              reg_treg,reg32           386,NOLONG,ND 
-MOV              mem,reg8                 8086 
-MOV              reg8,reg8                8086 
-MOV              mem,reg16                8086 
-MOV              reg16,reg16              8086 
-MOV              mem,reg32                386 
-MOV              reg32,reg32              386 
-MOV              mem,reg64                X86_64,LONG 
-MOV              reg64,reg64              X86_64,LONG 
-MOV              reg8,mem                 8086 
-MOV              reg8,reg8                8086 
-MOV              reg16,mem                8086 
-MOV              reg16,reg16              8086 
-MOV              reg32,mem                386 
-MOV              reg32,reg32              386 
-MOV              reg64,mem                X86_64,LONG 
-MOV              reg64,reg64              X86_64,LONG 
-MOV              reg8,imm                 8086 
-MOV              reg16,imm                8086 
-MOV              reg32,imm                386 
-MOV              reg64,udword             X86_64,LONG,OPT,ND 
-MOV              reg64,sdword             X86_64,LONG,OPT,ND 
-MOV              reg64,imm                X86_64,LONG 
-MOV              rm8,imm                  8086 
-MOV              rm16,imm                 8086 
-MOV              rm32,imm                 386 
-MOV              rm64,imm                 X86_64,LONG 
-MOV              rm64,imm32               X86_64,LONG 
-MOV              mem,imm8                 8086 
-MOV              mem,imm16                8086 
-MOV              mem,imm32                386 
-MOVD             mmxreg,rm32              PENT,MMX,SD 
-MOVD             rm32,mmxreg              PENT,MMX,SD 
-MOVD             mmxreg,rm64              X86_64,LONG,MMX,SX,ND 
-MOVD             rm64,mmxreg              X86_64,LONG,MMX,SX,ND 
-MOVQ             mmxreg,mmxrm             PENT,MMX 
-MOVQ             mmxrm,mmxreg             PENT,MMX 
-MOVQ             mmxreg,rm64              X86_64,LONG,MMX 
-MOVQ             rm64,mmxreg              X86_64,LONG,MMX 
-MOVSB                                     8086 
-MOVSD                                     386 
-MOVSQ                                     X86_64,LONG 
-MOVSW                                     8086 
-MOVSX            reg16,mem                386 
-MOVSX            reg16,reg8               386 
-MOVSX            reg32,rm8                386 
-MOVSX            reg32,rm16               386 
-MOVSX            reg64,rm8                X86_64,LONG 
-MOVSX            reg64,rm16               X86_64,LONG 
-MOVSXD           reg64,rm32               X86_64,LONG 
-MOVSX            reg64,rm32               X86_64,LONG,ND 
-MOVZX            reg16,mem                386 
-MOVZX            reg16,reg8               386 
-MOVZX            reg32,rm8                386 
-MOVZX            reg32,rm16               386 
-MOVZX            reg64,rm8                X86_64,LONG 
-MOVZX            reg64,rm16               X86_64,LONG 
-MUL              rm8                      8086 
-MUL              rm16                     8086 
-MUL              rm32                     386 
-MUL              rm64                     X86_64,LONG 
-MWAIT                                     PRESCOTT 
-MWAIT            reg_eax,reg_ecx          PRESCOTT,ND 
-MWAITX                                    AMD 
-MWAITX           reg_eax,reg_ecx          AMD,ND 
-NEG              rm8                      8086,LOCK 
-NEG              rm16                     8086,LOCK 
-NEG              rm32                     386,LOCK 
-NEG              rm64                     X86_64,LONG,LOCK 
-NOP                                       8086 
-NOP              rm16                     P6 
-NOP              rm32                     P6 
-NOP              rm64                     X86_64,LONG 
-NOT              rm8                      8086,LOCK 
-NOT              rm16                     8086,LOCK 
-NOT              rm32                     386,LOCK 
-NOT              rm64                     X86_64,LONG,LOCK 
-OR               mem,reg8                 8086,LOCK 
-OR               reg8,reg8                8086 
-OR               mem,reg16                8086,LOCK 
-OR               reg16,reg16              8086 
-OR               mem,reg32                386,LOCK 
-OR               reg32,reg32              386 
-OR               mem,reg64                X86_64,LONG,LOCK 
-OR               reg64,reg64              X86_64,LONG 
-OR               reg8,mem                 8086 
-OR               reg8,reg8                8086 
-OR               reg16,mem                8086 
-OR               reg16,reg16              8086 
-OR               reg32,mem                386 
-OR               reg32,reg32              386 
-OR               reg64,mem                X86_64,LONG 
-OR               reg64,reg64              X86_64,LONG 
-OR               rm16,imm8                8086,LOCK 
-OR               rm32,imm8                386,LOCK 
-OR               rm64,imm8                X86_64,LONG,LOCK 
-OR               reg_al,imm               8086 
-OR               reg_ax,sbyteword         8086,ND 
-OR               reg_ax,imm               8086 
-OR               reg_eax,sbytedword       386,ND 
-OR               reg_eax,imm              386 
-OR               reg_rax,sbytedword       X86_64,LONG,ND 
-OR               reg_rax,imm              X86_64,LONG 
-OR               rm8,imm                  8086,LOCK 
-OR               rm16,sbyteword           8086,LOCK,ND 
-OR               rm16,imm                 8086,LOCK 
-OR               rm32,sbytedword          386,LOCK,ND 
-OR               rm32,imm                 386,LOCK 
-OR               rm64,sbytedword          X86_64,LONG,LOCK,ND 
-OR               rm64,imm                 X86_64,LONG,LOCK 
-OR               mem,imm8                 8086,LOCK 
-OR               mem,sbyteword16          8086,LOCK,ND 
-OR               mem,imm16                8086,LOCK 
-OR               mem,sbytedword32         386,LOCK,ND 
-OR               mem,imm32                386,LOCK 
-OR               rm8,imm                  8086,LOCK,ND,NOLONG 
-OUT              imm,reg_al               8086 
-OUT              imm,reg_ax               8086 
-OUT              imm,reg_eax              386 
-OUT              reg_dx,reg_al            8086 
-OUT              reg_dx,reg_ax            8086 
-OUT              reg_dx,reg_eax           386 
-OUTSB                                     186 
-OUTSD                                     386 
-OUTSW                                     186 
-PACKSSDW         mmxreg,mmxrm             PENT,MMX 
-PACKSSWB         mmxreg,mmxrm             PENT,MMX 
-PACKUSWB         mmxreg,mmxrm             PENT,MMX 
-PADDB            mmxreg,mmxrm             PENT,MMX 
-PADDD            mmxreg,mmxrm             PENT,MMX 
-PADDSB           mmxreg,mmxrm             PENT,MMX 
-PADDSIW          mmxreg,mmxrm             PENT,MMX,CYRIX 
-PADDSW           mmxreg,mmxrm             PENT,MMX 
-PADDUSB          mmxreg,mmxrm             PENT,MMX 
-PADDUSW          mmxreg,mmxrm             PENT,MMX 
-PADDW            mmxreg,mmxrm             PENT,MMX 
-PAND             mmxreg,mmxrm             PENT,MMX 
-PANDN            mmxreg,mmxrm             PENT,MMX 
-PAUSE                                     8086 
-PAVEB            mmxreg,mmxrm             PENT,MMX,CYRIX 
-PAVGUSB          mmxreg,mmxrm             PENT,3DNOW 
-PCMPEQB          mmxreg,mmxrm             PENT,MMX 
-PCMPEQD          mmxreg,mmxrm             PENT,MMX 
-PCMPEQW          mmxreg,mmxrm             PENT,MMX 
-PCMPGTB          mmxreg,mmxrm             PENT,MMX 
-PCMPGTD          mmxreg,mmxrm             PENT,MMX 
-PCMPGTW          mmxreg,mmxrm             PENT,MMX 
-PDISTIB          mmxreg,mem               PENT,MMX,CYRIX 
-PF2ID            mmxreg,mmxrm             PENT,3DNOW 
-PFACC            mmxreg,mmxrm             PENT,3DNOW 
-PFADD            mmxreg,mmxrm             PENT,3DNOW 
-PFCMPEQ          mmxreg,mmxrm             PENT,3DNOW 
-PFCMPGE          mmxreg,mmxrm             PENT,3DNOW 
-PFCMPGT          mmxreg,mmxrm             PENT,3DNOW 
-PFMAX            mmxreg,mmxrm             PENT,3DNOW 
-PFMIN            mmxreg,mmxrm             PENT,3DNOW 
-PFMUL            mmxreg,mmxrm             PENT,3DNOW 
-PFRCP            mmxreg,mmxrm             PENT,3DNOW 
-PFRCPIT1         mmxreg,mmxrm             PENT,3DNOW 
-PFRCPIT2         mmxreg,mmxrm             PENT,3DNOW 
-PFRSQIT1         mmxreg,mmxrm             PENT,3DNOW 
-PFRSQRT          mmxreg,mmxrm             PENT,3DNOW 
-PFSUB            mmxreg,mmxrm             PENT,3DNOW 
-PFSUBR           mmxreg,mmxrm             PENT,3DNOW 
-PI2FD            mmxreg,mmxrm             PENT,3DNOW 
-PMACHRIW         mmxreg,mem               PENT,MMX,CYRIX 
-PMADDWD          mmxreg,mmxrm             PENT,MMX 
-PMAGW            mmxreg,mmxrm             PENT,MMX,CYRIX 
-PMULHRIW         mmxreg,mmxrm             PENT,MMX,CYRIX 
-PMULHRWA         mmxreg,mmxrm             PENT,3DNOW 
-PMULHRWC         mmxreg,mmxrm             PENT,MMX,CYRIX 
-PMULHW           mmxreg,mmxrm             PENT,MMX 
-PMULLW           mmxreg,mmxrm             PENT,MMX 
-PMVGEZB          mmxreg,mem               PENT,MMX,CYRIX 
-PMVLZB           mmxreg,mem               PENT,MMX,CYRIX 
-PMVNZB           mmxreg,mem               PENT,MMX,CYRIX 
-PMVZB            mmxreg,mem               PENT,MMX,CYRIX 
-POP              reg16                    8086 
-POP              reg32                    386,NOLONG 
-POP              reg64                    X86_64,LONG 
-POP              rm16                     8086 
-POP              rm32                     386,NOLONG 
-POP              rm64                     X86_64,LONG 
-POP              reg_es                   8086,NOLONG 
-POP              reg_cs                   8086,UNDOC,ND,OBSOLETE 
-POP              reg_ss                   8086,NOLONG 
-POP              reg_ds                   8086,NOLONG 
-POP              reg_fs                   386 
-POP              reg_gs                   386 
-POPA                                      186,NOLONG 
-POPAD                                     386,NOLONG 
-POPAW                                     186,NOLONG 
-POPF                                      8086 
-POPFD                                     386,NOLONG 
-POPFQ                                     X86_64,LONG 
-POPFW                                     8086 
-POR              mmxreg,mmxrm             PENT,MMX 
-PREFETCH         mem                      PENT,3DNOW 
-PREFETCHW        mem                      PENT,3DNOW 
-PSLLD            mmxreg,mmxrm             PENT,MMX 
-PSLLD            mmxreg,imm               PENT,MMX 
-PSLLQ            mmxreg,mmxrm             PENT,MMX 
-PSLLQ            mmxreg,imm               PENT,MMX 
-PSLLW            mmxreg,mmxrm             PENT,MMX 
-PSLLW            mmxreg,imm               PENT,MMX 
-PSRAD            mmxreg,mmxrm             PENT,MMX 
-PSRAD            mmxreg,imm               PENT,MMX 
-PSRAW            mmxreg,mmxrm             PENT,MMX 
-PSRAW            mmxreg,imm               PENT,MMX 
-PSRLD            mmxreg,mmxrm             PENT,MMX 
-PSRLD            mmxreg,imm               PENT,MMX 
-PSRLQ            mmxreg,mmxrm             PENT,MMX 
-PSRLQ            mmxreg,imm               PENT,MMX 
-PSRLW            mmxreg,mmxrm             PENT,MMX 
-PSRLW            mmxreg,imm               PENT,MMX 
-PSUBB            mmxreg,mmxrm             PENT,MMX 
-PSUBD            mmxreg,mmxrm             PENT,MMX 
-PSUBSB           mmxreg,mmxrm             PENT,MMX 
-PSUBSIW          mmxreg,mmxrm             PENT,MMX,CYRIX 
-PSUBSW           mmxreg,mmxrm             PENT,MMX 
-PSUBUSB          mmxreg,mmxrm             PENT,MMX 
-PSUBUSW          mmxreg,mmxrm             PENT,MMX 
-PSUBW            mmxreg,mmxrm             PENT,MMX 
-PUNPCKHBW        mmxreg,mmxrm             PENT,MMX 
-PUNPCKHDQ        mmxreg,mmxrm             PENT,MMX 
-PUNPCKHWD        mmxreg,mmxrm             PENT,MMX 
-PUNPCKLBW        mmxreg,mmxrm             PENT,MMX 
-PUNPCKLDQ        mmxreg,mmxrm             PENT,MMX 
-PUNPCKLWD        mmxreg,mmxrm             PENT,MMX 
-PUSH             reg16                    8086 
-PUSH             reg32                    386,NOLONG 
-PUSH             reg64                    X86_64,LONG 
-PUSH             rm16                     8086 
-PUSH             rm32                     386,NOLONG 
-PUSH             rm64                     X86_64,LONG 
-PUSH             reg_es                   8086,NOLONG 
-PUSH             reg_cs                   8086,NOLONG 
-PUSH             reg_ss                   8086,NOLONG 
-PUSH             reg_ds                   8086,NOLONG 
-PUSH             reg_fs                   386 
-PUSH             reg_gs                   386 
-PUSH             imm8                     186 
-PUSH             sbyteword16              186,AR0,SIZE,ND 
-PUSH             imm16                    186,AR0,SIZE 
-PUSH             sbytedword32             386,NOLONG,AR0,SIZE,ND 
-PUSH             imm32                    386,NOLONG,AR0,SIZE 
-PUSH             sbytedword32             386,NOLONG,SD,ND 
-PUSH             imm32                    386,NOLONG,SD 
-PUSH             sbytedword64             X86_64,LONG,AR0,SIZE,ND 
-PUSH             imm64                    X86_64,LONG,AR0,SIZE 
-PUSH             sbytedword32             X86_64,LONG,AR0,SIZE,ND 
-PUSH             imm32                    X86_64,LONG,AR0,SIZE 
-PUSHA                                     186,NOLONG 
-PUSHAD                                    386,NOLONG 
-PUSHAW                                    186,NOLONG 
-PUSHF                                     8086 
-PUSHFD                                    386,NOLONG 
-PUSHFQ                                    X86_64,LONG 
-PUSHFW                                    8086 
-PXOR             mmxreg,mmxrm             PENT,MMX 
-RCL              rm8,unity                8086 
-RCL              rm8,reg_cl               8086 
-RCL              rm8,imm8                 186 
-RCL              rm16,unity               8086 
-RCL              rm16,reg_cl              8086 
-RCL              rm16,imm8                186 
-RCL              rm32,unity               386 
-RCL              rm32,reg_cl              386 
-RCL              rm32,imm8                386 
-RCL              rm64,unity               X86_64,LONG 
-RCL              rm64,reg_cl              X86_64,LONG 
-RCL              rm64,imm8                X86_64,LONG 
-RCR              rm8,unity                8086 
-RCR              rm8,reg_cl               8086 
-RCR              rm8,imm8                 186 
-RCR              rm16,unity               8086 
-RCR              rm16,reg_cl              8086 
-RCR              rm16,imm8                186 
-RCR              rm32,unity               386 
-RCR              rm32,reg_cl              386 
-RCR              rm32,imm8                386 
-RCR              rm64,unity               X86_64,LONG 
-RCR              rm64,reg_cl              X86_64,LONG 
-RCR              rm64,imm8                X86_64,LONG 
-RDSHR            rm32                     P6,CYRIX,SMM 
-RDMSR                                     PENT,PRIV 
-RDPMC                                     P6 
-RDTSC                                     PENT 
-RDTSCP                                    X86_64 
-RET                                       8086,BND 
-RET              imm                      8086,SW,BND 
-RETF                                      8086 
-RETF             imm                      8086,SW 
-RETN                                      8086,BND 
-RETN             imm                      8086,SW,BND 
-RETW                                      8086,BND 
-RETW             imm                      8086,SW,BND 
-RETFW                                     8086 
-RETFW            imm                      8086,SW 
-RETNW                                     8086,BND 
-RETNW            imm                      8086,SW,BND 
-RETD                                      8086,BND,NOLONG 
-RETD             imm                      8086,SW,BND,NOLONG 
-RETFD                                     8086 
-RETFD            imm                      8086,SW 
-RETND                                     8086,BND,NOLONG 
-RETND            imm                      8086,SW,BND,NOLONG 
-RETQ                                      X86_64,LONG,BND 
-RETQ             imm                      X86_64,LONG,SW,BND 
-RETFQ                                     X86_64,LONG 
-RETFQ            imm                      X86_64,LONG,SW 
-RETNQ                                     X86_64,LONG,BND 
-RETNQ            imm                      X86_64,LONG,SW,BND 
-ROL              rm8,unity                8086 
-ROL              rm8,reg_cl               8086 
-ROL              rm8,imm8                 186 
-ROL              rm16,unity               8086 
-ROL              rm16,reg_cl              8086 
-ROL              rm16,imm8                186 
-ROL              rm32,unity               386 
-ROL              rm32,reg_cl              386 
-ROL              rm32,imm8                386 
-ROL              rm64,unity               X86_64,LONG 
-ROL              rm64,reg_cl              X86_64,LONG 
-ROL              rm64,imm8                X86_64,LONG 
-ROR              rm8,unity                8086 
-ROR              rm8,reg_cl               8086 
-ROR              rm8,imm8                 186 
-ROR              rm16,unity               8086 
-ROR              rm16,reg_cl              8086 
-ROR              rm16,imm8                186 
-ROR              rm32,unity               386 
-ROR              rm32,reg_cl              386 
-ROR              rm32,imm8                386 
-ROR              rm64,unity               X86_64,LONG 
-ROR              rm64,reg_cl              X86_64,LONG 
-ROR              rm64,imm8                X86_64,LONG 
-RDM                                       P6,CYRIX,ND 
-RSDC             reg_sreg,mem80           486,CYRIX,SMM 
-RSLDT            mem80                    486,CYRIX,SMM 
-RSM                                       PENT,SMM 
-RSTS             mem80                    486,CYRIX,SMM 
-SAHF                                      8086 
-SAL              rm8,unity                8086,ND 
-SAL              rm8,reg_cl               8086,ND 
-SAL              rm8,imm8                 186,ND 
-SAL              rm16,unity               8086,ND 
-SAL              rm16,reg_cl              8086,ND 
-SAL              rm16,imm8                186,ND 
-SAL              rm32,unity               386,ND 
-SAL              rm32,reg_cl              386,ND 
-SAL              rm32,imm8                386,ND 
-SAL              rm64,unity               X86_64,LONG,ND 
-SAL              rm64,reg_cl              X86_64,LONG,ND 
-SAL              rm64,imm8                X86_64,LONG,ND 
-SALC                                      8086,UNDOC 
-SAR              rm8,unity                8086 
-SAR              rm8,reg_cl               8086 
-SAR              rm8,imm8                 186 
-SAR              rm16,unity               8086 
-SAR              rm16,reg_cl              8086 
-SAR              rm16,imm8                186 
-SAR              rm32,unity               386 
-SAR              rm32,reg_cl              386 
-SAR              rm32,imm8                386 
-SAR              rm64,unity               X86_64,LONG 
-SAR              rm64,reg_cl              X86_64,LONG 
-SAR              rm64,imm8                X86_64,LONG 
-SBB              mem,reg8                 8086,LOCK 
-SBB              reg8,reg8                8086 
-SBB              mem,reg16                8086,LOCK 
-SBB              reg16,reg16              8086 
-SBB              mem,reg32                386,LOCK 
-SBB              reg32,reg32              386 
-SBB              mem,reg64                X86_64,LONG,LOCK 
-SBB              reg64,reg64              X86_64,LONG 
-SBB              reg8,mem                 8086 
-SBB              reg8,reg8                8086 
-SBB              reg16,mem                8086 
-SBB              reg16,reg16              8086 
-SBB              reg32,mem                386 
-SBB              reg32,reg32              386 
-SBB              reg64,mem                X86_64,LONG 
-SBB              reg64,reg64              X86_64,LONG 
-SBB              rm16,imm8                8086,LOCK 
-SBB              rm32,imm8                386,LOCK 
-SBB              rm64,imm8                X86_64,LONG,LOCK 
-SBB              reg_al,imm               8086 
-SBB              reg_ax,sbyteword         8086,ND 
-SBB              reg_ax,imm               8086 
-SBB              reg_eax,sbytedword       386,ND 
-SBB              reg_eax,imm              386 
-SBB              reg_rax,sbytedword       X86_64,LONG,ND 
-SBB              reg_rax,imm              X86_64,LONG 
-SBB              rm8,imm                  8086,LOCK 
-SBB              rm16,sbyteword           8086,LOCK,ND 
-SBB              rm16,imm                 8086,LOCK 
-SBB              rm32,sbytedword          386,LOCK,ND 
-SBB              rm32,imm                 386,LOCK 
-SBB              rm64,sbytedword          X86_64,LONG,LOCK,ND 
-SBB              rm64,imm                 X86_64,LONG,LOCK 
-SBB              mem,imm8                 8086,LOCK 
-SBB              mem,sbyteword16          8086,LOCK,ND 
-SBB              mem,imm16                8086,LOCK 
-SBB              mem,sbytedword32         386,LOCK,ND 
-SBB              mem,imm32                386,LOCK 
-SBB              rm8,imm                  8086,LOCK,ND,NOLONG 
-SCASB                                     8086 
-SCASD                                     386 
-SCASQ                                     X86_64,LONG 
-SCASW                                     8086 
-SFENCE                                    X86_64,LONG,AMD 
-SGDT             mem                      286 
-SHL              rm8,unity                8086 
-SHL              rm8,reg_cl               8086 
-SHL              rm8,imm8                 186 
-SHL              rm16,unity               8086 
-SHL              rm16,reg_cl              8086 
-SHL              rm16,imm8                186 
-SHL              rm32,unity               386 
-SHL              rm32,reg_cl              386 
-SHL              rm32,imm8                386 
-SHL              rm64,unity               X86_64,LONG 
-SHL              rm64,reg_cl              X86_64,LONG 
-SHL              rm64,imm8                X86_64,LONG 
-SHLD             mem,reg16,imm            386 
-SHLD             reg16,reg16,imm          386 
-SHLD             mem,reg32,imm            386 
-SHLD             reg32,reg32,imm          386 
-SHLD             mem,reg64,imm            X86_64,LONG 
-SHLD             reg64,reg64,imm          X86_64,LONG 
-SHLD             mem,reg16,reg_cl         386 
-SHLD             reg16,reg16,reg_cl       386 
-SHLD             mem,reg32,reg_cl         386 
-SHLD             reg32,reg32,reg_cl       386 
-SHLD             mem,reg64,reg_cl         X86_64,LONG 
-SHLD             reg64,reg64,reg_cl       X86_64,LONG 
-SHR              rm8,unity                8086 
-SHR              rm8,reg_cl               8086 
-SHR              rm8,imm8                 186 
-SHR              rm16,unity               8086 
-SHR              rm16,reg_cl              8086 
-SHR              rm16,imm8                186 
-SHR              rm32,unity               386 
-SHR              rm32,reg_cl              386 
-SHR              rm32,imm8                386 
-SHR              rm64,unity               X86_64,LONG 
-SHR              rm64,reg_cl              X86_64,LONG 
-SHR              rm64,imm8                X86_64,LONG 
-SHRD             mem,reg16,imm            386 
-SHRD             reg16,reg16,imm          386 
-SHRD             mem,reg32,imm            386 
-SHRD             reg32,reg32,imm          386 
-SHRD             mem,reg64,imm            X86_64,LONG 
-SHRD             reg64,reg64,imm          X86_64,LONG 
-SHRD             mem,reg16,reg_cl         386 
-SHRD             reg16,reg16,reg_cl       386 
-SHRD             mem,reg32,reg_cl         386 
-SHRD             reg32,reg32,reg_cl       386 
-SHRD             mem,reg64,reg_cl         X86_64,LONG 
-SHRD             reg64,reg64,reg_cl       X86_64,LONG 
-SIDT             mem                      286 
-SLDT             mem                      286 
-SLDT             mem16                    286 
-SLDT             reg16                    286 
-SLDT             reg32                    386 
-SLDT             reg64                    X86_64,LONG,ND 
-SLDT             reg64                    X86_64,LONG 
-SKINIT                                    X86_64,LONG 
-SMI                                       386,UNDOC 
-SMINT                                     P6,CYRIX,ND 
-SMINTOLD                                  486,CYRIX,ND,OBSOLETE 
-SMSW             mem                      286 
-SMSW             mem16                    286 
-SMSW             reg16                    286 
-SMSW             reg32                    386 
-SMSW             reg64                    X86_64,LONG 
-STC                                       8086 
-STD                                       8086 
-STI                                       8086 
-STOSB                                     8086 
-STOSD                                     386 
-STOSQ                                     X86_64,LONG 
-STOSW                                     8086 
-STR              mem                      286,PROT 
-STR              mem16                    286,PROT 
-STR              reg16                    286,PROT 
-STR              reg32                    386,PROT 
-STR              reg64                    X86_64,LONG 
-SUB              mem,reg8                 8086,LOCK 
-SUB              reg8,reg8                8086 
-SUB              mem,reg16                8086,LOCK 
-SUB              reg16,reg16              8086 
-SUB              mem,reg32                386,LOCK 
-SUB              reg32,reg32              386 
-SUB              mem,reg64                X86_64,LONG,LOCK 
-SUB              reg64,reg64              X86_64,LONG 
-SUB              reg8,mem                 8086 
-SUB              reg8,reg8                8086 
-SUB              reg16,mem                8086 
-SUB              reg16,reg16              8086 
-SUB              reg32,mem                386 
-SUB              reg32,reg32              386 
-SUB              reg64,mem                X86_64,LONG 
-SUB              reg64,reg64              X86_64,LONG 
-SUB              rm16,imm8                8086,LOCK 
-SUB              rm32,imm8                386,LOCK 
-SUB              rm64,imm8                X86_64,LONG,LOCK 
-SUB              reg_al,imm               8086 
-SUB              reg_ax,sbyteword         8086,ND 
-SUB              reg_ax,imm               8086 
-SUB              reg_eax,sbytedword       386,ND 
-SUB              reg_eax,imm              386 
-SUB              reg_rax,sbytedword       X86_64,LONG,ND 
-SUB              reg_rax,imm              X86_64,LONG 
-SUB              rm8,imm                  8086,LOCK 
-SUB              rm16,sbyteword           8086,LOCK,ND 
-SUB              rm16,imm                 8086,LOCK 
-SUB              rm32,sbytedword          386,LOCK,ND 
-SUB              rm32,imm                 386,LOCK 
-SUB              rm64,sbytedword          X86_64,LONG,LOCK,ND 
-SUB              rm64,imm                 X86_64,LONG,LOCK 
-SUB              mem,imm8                 8086,LOCK 
-SUB              mem,sbyteword16          8086,LOCK,ND 
-SUB              mem,imm16                8086,LOCK 
-SUB              mem,sbytedword32         386,LOCK,ND 
-SUB              mem,imm32                386,LOCK 
-SUB              rm8,imm                  8086,LOCK,ND,NOLONG 
-SVDC             mem80,reg_sreg           486,CYRIX,SMM 
-SVLDT            mem80                    486,CYRIX,SMM,ND 
-SVTS             mem80                    486,CYRIX,SMM 
-SWAPGS                                    X86_64,LONG 
-SYSCALL                                   P6,AMD 
-SYSENTER                                  P6 
-SYSEXIT                                   P6,PRIV 
-SYSRET                                    P6,PRIV,AMD 
-TEST             mem,reg8                 8086 
-TEST             reg8,reg8                8086 
-TEST             mem,reg16                8086 
-TEST             reg16,reg16              8086 
-TEST             mem,reg32                386 
-TEST             reg32,reg32              386 
-TEST             mem,reg64                X86_64,LONG 
-TEST             reg64,reg64              X86_64,LONG 
-TEST             reg8,mem                 8086 
-TEST             reg16,mem                8086 
-TEST             reg32,mem                386 
-TEST             reg64,mem                X86_64,LONG 
-TEST             reg_al,imm               8086 
-TEST             reg_ax,imm               8086 
-TEST             reg_eax,imm              386 
-TEST             reg_rax,imm              X86_64,LONG 
-TEST             rm8,imm                  8086 
-TEST             rm16,imm                 8086 
-TEST             rm32,imm                 386 
-TEST             rm64,imm                 X86_64,LONG 
-TEST             mem,imm8                 8086 
-TEST             mem,imm16                8086 
-TEST             mem,imm32                386 
-UD0                                       186,OBSOLETE 
-UD0              reg16,rm16               186 
-UD0              reg32,rm32               186 
-UD0              reg64,rm64               186 
-UD1              reg16,rm16               186 
-UD1              reg32,rm32               186 
-UD1              reg64,rm64               186 
-UD1                                       186,ND 
-UD2B                                      186,ND 
-UD2B             reg16,rm16               186,ND 
-UD2B             reg32,rm32               186,ND 
-UD2B             reg64,rm64               186,ND 
-UD2                                       186 
-UD2A                                      186,ND 
-UMOV             mem,reg8                 386,UNDOC,ND 
-UMOV             reg8,reg8                386,UNDOC,ND 
-UMOV             mem,reg16                386,UNDOC,ND 
-UMOV             reg16,reg16              386,UNDOC,ND 
-UMOV             mem,reg32                386,UNDOC,ND 
-UMOV             reg32,reg32              386,UNDOC,ND 
-UMOV             reg8,mem                 386,UNDOC,ND 
-UMOV             reg8,reg8                386,UNDOC,ND 
-UMOV             reg16,mem                386,UNDOC,ND 
-UMOV             reg16,reg16              386,UNDOC,ND 
-UMOV             reg32,mem                386,UNDOC,ND 
-UMOV             reg32,reg32              386,UNDOC,ND 
-VERR             mem                      286,PROT 
-VERR             mem16                    286,PROT 
-VERR             reg16                    286,PROT 
-VERW             mem                      286,PROT 
-VERW             mem16                    286,PROT 
-VERW             reg16                    286,PROT 
-FWAIT                                     8086 
-WBINVD                                    486,PRIV 
-WRSHR            rm32                     P6,CYRIX,SMM 
-WRMSR                                     PENT,PRIV 
-XADD             mem,reg8                 486,LOCK 
-XADD             reg8,reg8                486 
-XADD             mem,reg16                486,LOCK 
-XADD             reg16,reg16              486 
-XADD             mem,reg32                486,LOCK 
-XADD             reg32,reg32              486 
-XADD             mem,reg64                X86_64,LONG,LOCK 
-XADD             reg64,reg64              X86_64,LONG 
-XBTS             reg16,mem                386,SW,UNDOC,ND 
-XBTS             reg16,reg16              386,UNDOC,ND 
-XBTS             reg32,mem                386,SD,UNDOC,ND 
-XBTS             reg32,reg32              386,UNDOC,ND 
-XCHG             reg_ax,reg16             8086 
-XCHG             reg_eax,reg32na          386 
-XCHG             reg_rax,reg64            X86_64,LONG 
-XCHG             reg16,reg_ax             8086 
-XCHG             reg32na,reg_eax          386 
-XCHG             reg64,reg_rax            X86_64,LONG 
-XCHG             reg_eax,reg_eax          386,NOLONG 
-XCHG             reg8,mem                 8086,LOCK 
-XCHG             reg8,reg8                8086 
-XCHG             reg16,mem                8086,LOCK 
-XCHG             reg16,reg16              8086 
-XCHG             reg32,mem                386,LOCK 
-XCHG             reg32,reg32              386 
-XCHG             reg64,mem                X86_64,LONG,LOCK 
-XCHG             reg64,reg64              X86_64,LONG 
-XCHG             mem,reg8                 8086,LOCK 
-XCHG             reg8,reg8                8086 
-XCHG             mem,reg16                8086,LOCK 
-XCHG             reg16,reg16              8086 
-XCHG             mem,reg32                386,LOCK 
-XCHG             reg32,reg32              386 
-XCHG             mem,reg64                X86_64,LONG,LOCK 
-XCHG             reg64,reg64              X86_64,LONG 
-XLATB                                     8086 
-XLAT                                      8086 
-XOR              mem,reg8                 8086,LOCK 
-XOR              reg8,reg8                8086 
-XOR              mem,reg16                8086,LOCK 
-XOR              reg16,reg16              8086 
-XOR              mem,reg32                386,LOCK 
-XOR              reg32,reg32              386 
-XOR              mem,reg64                X86_64,LONG,LOCK 
-XOR              reg64,reg64              X86_64,LONG 
-XOR              reg8,mem                 8086 
-XOR              reg8,reg8                8086 
-XOR              reg16,mem                8086 
-XOR              reg16,reg16              8086 
-XOR              reg32,mem                386 
-XOR              reg32,reg32              386 
-XOR              reg64,mem                X86_64,LONG 
-XOR              reg64,reg64              X86_64,LONG 
-XOR              rm16,imm8                8086,LOCK 
-XOR              rm32,imm8                386,LOCK 
-XOR              rm64,imm8                X86_64,LONG,LOCK 
-XOR              reg_al,imm               8086 
-XOR              reg_ax,sbyteword         8086,ND 
-XOR              reg_ax,imm               8086 
-XOR              reg_eax,sbytedword       386,ND 
-XOR              reg_eax,imm              386 
-XOR              reg_rax,sbytedword       X86_64,LONG,ND 
-XOR              reg_rax,imm              X86_64,LONG 
-XOR              rm8,imm                  8086,LOCK 
-XOR              rm16,sbyteword           8086,LOCK,ND 
-XOR              rm16,imm                 8086,LOCK 
-XOR              rm32,sbytedword          386,LOCK,ND 
-XOR              rm32,imm                 386,LOCK 
-XOR              rm64,sbytedword          X86_64,LONG,LOCK,ND 
-XOR              rm64,imm                 X86_64,LONG,LOCK 
-XOR              mem,imm8                 8086,LOCK 
-XOR              mem,sbyteword16          8086,LOCK,ND 
-XOR              mem,imm16                8086,LOCK 
-XOR              mem,sbytedword32         386,LOCK,ND 
-XOR              mem,imm32                386,LOCK 
-XOR              rm8,imm                  8086,LOCK,ND,NOLONG 
-CMOVcc           reg16,mem                P6 
-CMOVcc           reg16,reg16              P6 
-CMOVcc           reg32,mem                P6 
-CMOVcc           reg32,reg32              P6 
-CMOVcc           reg64,mem                X86_64,LONG 
-CMOVcc           reg64,reg64              X86_64,LONG 
-Jcc              imm|near                 386,BND 
-Jcc              imm16|near               386,NOLONG,BND 
-Jcc              imm32|near               386,NOLONG,BND 
-Jcc              imm64|near               X86_64,LONG,BND 
-Jcc              imm|short                8086,ND,BND 
-Jcc              imm                      8086,ND,BND 
-Jcc              imm                      386,ND,BND 
-Jcc              imm                      8086,ND,BND 
-Jcc              imm                      8086,BND 
-SETcc            mem                      386 
-SETcc            reg8                     386
-</pre>
-<h4 id="section-F.1.3">F.1.3 Katmai Streaming SIMD instructions (SSE &ndash;&ndash; a.k.a. KNI, XMM, MMX2)</h4>
-<pre>
-ADDPS            xmmreg,xmmrm128          KATMAI,SSE 
-ADDSS            xmmreg,xmmrm32           KATMAI,SSE 
-ANDNPS           xmmreg,xmmrm128          KATMAI,SSE 
-ANDPS            xmmreg,xmmrm128          KATMAI,SSE 
-CMPEQPS          xmmreg,xmmrm128          KATMAI,SSE 
-CMPEQSS          xmmreg,xmmrm32           KATMAI,SSE 
-CMPLEPS          xmmreg,xmmrm128          KATMAI,SSE 
-CMPLESS          xmmreg,xmmrm32           KATMAI,SSE 
-CMPLTPS          xmmreg,xmmrm128          KATMAI,SSE 
-CMPLTSS          xmmreg,xmmrm32           KATMAI,SSE 
-CMPNEQPS         xmmreg,xmmrm128          KATMAI,SSE 
-CMPNEQSS         xmmreg,xmmrm32           KATMAI,SSE 
-CMPNLEPS         xmmreg,xmmrm128          KATMAI,SSE 
-CMPNLESS         xmmreg,xmmrm32           KATMAI,SSE 
-CMPNLTPS         xmmreg,xmmrm128          KATMAI,SSE 
-CMPNLTSS         xmmreg,xmmrm32           KATMAI,SSE 
-CMPORDPS         xmmreg,xmmrm128          KATMAI,SSE 
-CMPORDSS         xmmreg,xmmrm32           KATMAI,SSE 
-CMPUNORDPS       xmmreg,xmmrm128          KATMAI,SSE 
-CMPUNORDSS       xmmreg,xmmrm32           KATMAI,SSE 
-CMPPS            xmmreg,xmmrm128,imm8     KATMAI,SSE 
-CMPSS            xmmreg,xmmrm32,imm8      KATMAI,SSE 
-COMISS           xmmreg,xmmrm32           KATMAI,SSE 
-CVTPI2PS         xmmreg,mmxrm64           KATMAI,SSE,MMX 
-CVTPS2PI         mmxreg,xmmrm64           KATMAI,SSE,MMX 
-CVTSI2SS         xmmreg,mem               KATMAI,SSE,SD,AR1,ND 
-CVTSI2SS         xmmreg,rm32              KATMAI,SSE,SD,AR1 
-CVTSI2SS         xmmreg,rm64              X86_64,LONG,SSE,AR1 
-CVTSS2SI         reg32,xmmreg             KATMAI,SSE,SD,AR1 
-CVTSS2SI         reg32,mem                KATMAI,SSE,SD,AR1 
-CVTSS2SI         reg64,xmmreg             X86_64,LONG,SSE,SD,AR1 
-CVTSS2SI         reg64,mem                X86_64,LONG,SSE,SD,AR1 
-CVTTPS2PI        mmxreg,xmmrm             KATMAI,SSE,MMX 
-CVTTSS2SI        reg32,xmmrm              KATMAI,SSE,SD,AR1 
-CVTTSS2SI        reg64,xmmrm              X86_64,LONG,SSE,SD,AR1 
-DIVPS            xmmreg,xmmrm128          KATMAI,SSE 
-DIVSS            xmmreg,xmmrm32           KATMAI,SSE 
-LDMXCSR          mem32                    KATMAI,SSE 
-MAXPS            xmmreg,xmmrm128          KATMAI,SSE 
-MAXSS            xmmreg,xmmrm32           KATMAI,SSE 
-MINPS            xmmreg,xmmrm128          KATMAI,SSE 
-MINSS            xmmreg,xmmrm32           KATMAI,SSE 
-MOVAPS           xmmreg,xmmrm128          KATMAI,SSE 
-MOVAPS           xmmrm128,xmmreg          KATMAI,SSE 
-MOVHPS           xmmreg,mem64             KATMAI,SSE 
-MOVHPS           mem64,xmmreg             KATMAI,SSE 
-MOVLHPS          xmmreg,xmmreg            KATMAI,SSE 
-MOVLPS           xmmreg,mem64             KATMAI,SSE 
-MOVLPS           mem64,xmmreg             KATMAI,SSE 
-MOVHLPS          xmmreg,xmmreg            KATMAI,SSE 
-MOVMSKPS         reg32,xmmreg             KATMAI,SSE 
-MOVMSKPS         reg64,xmmreg             X86_64,LONG,SSE 
-MOVNTPS          mem128,xmmreg            KATMAI,SSE 
-MOVSS            xmmreg,xmmrm32           KATMAI,SSE 
-MOVSS            xmmrm32,xmmreg           KATMAI,SSE 
-MOVUPS           xmmreg,xmmrm128          KATMAI,SSE 
-MOVUPS           xmmrm128,xmmreg          KATMAI,SSE 
-MULPS            xmmreg,xmmrm128          KATMAI,SSE 
-MULSS            xmmreg,xmmrm32           KATMAI,SSE 
-ORPS             xmmreg,xmmrm128          KATMAI,SSE 
-RCPPS            xmmreg,xmmrm128          KATMAI,SSE 
-RCPSS            xmmreg,xmmrm32           KATMAI,SSE 
-RSQRTPS          xmmreg,xmmrm128          KATMAI,SSE 
-RSQRTSS          xmmreg,xmmrm32           KATMAI,SSE 
-SHUFPS           xmmreg,xmmrm128,imm8     KATMAI,SSE 
-SQRTPS           xmmreg,xmmrm128          KATMAI,SSE 
-SQRTSS           xmmreg,xmmrm32           KATMAI,SSE 
-STMXCSR          mem32                    KATMAI,SSE 
-SUBPS            xmmreg,xmmrm128          KATMAI,SSE 
-SUBSS            xmmreg,xmmrm32           KATMAI,SSE 
-UCOMISS          xmmreg,xmmrm32           KATMAI,SSE 
-UNPCKHPS         xmmreg,xmmrm128          KATMAI,SSE 
-UNPCKLPS         xmmreg,xmmrm128          KATMAI,SSE 
-XORPS            xmmreg,xmmrm128          KATMAI,SSE
-</pre>
-<h4 id="section-F.1.4">F.1.4 Introduced in Deschutes but necessary for SSE support</h4>
-<pre>
-FXRSTOR          mem                      P6,SSE,FPU 
-FXRSTOR64        mem                      X86_64,LONG,SSE,FPU 
-FXSAVE           mem                      P6,SSE,FPU 
-FXSAVE64         mem                      X86_64,LONG,SSE,FPU
-</pre>
-<h4 id="section-F.1.5">F.1.5 XSAVE group (AVX and extended state)</h4>
-<pre>
-XGETBV                                    NEHALEM 
-XSETBV                                    NEHALEM,PRIV 
-XSAVE            mem                      NEHALEM 
-XSAVE64          mem                      LONG,NEHALEM 
-XSAVEC           mem                       
-XSAVEC64         mem                      LONG 
-XSAVEOPT         mem                       
-XSAVEOPT64       mem                      LONG 
-XSAVES           mem                       
-XSAVES64         mem                      LONG 
-XRSTOR           mem                      NEHALEM 
-XRSTOR64         mem                      LONG,NEHALEM 
-XRSTORS          mem                       
-XRSTORS64        mem                      LONG
-</pre>
-<h4 id="section-F.1.6">F.1.6 Generic memory operations</h4>
-<pre>
-PREFETCHNTA      mem8                     KATMAI 
-PREFETCHT0       mem8                     KATMAI 
-PREFETCHT1       mem8                     KATMAI 
-PREFETCHT2       mem8                     KATMAI 
-PREFETCHIT0      mem8                     PREFETCHI 
-PREFETCHIT1      mem8                     PREFETCHI 
-SFENCE                                    KATMAI
-</pre>
-<h4 id="section-F.1.7">F.1.7 New MMX instructions introduced in Katmai</h4>
-<pre>
-MASKMOVQ         mmxreg,mmxreg            KATMAI,MMX 
-MOVNTQ           mem,mmxreg               KATMAI,MMX 
-PAVGB            mmxreg,mmxrm             KATMAI,MMX 
-PAVGW            mmxreg,mmxrm             KATMAI,MMX 
-PEXTRW           reg32,mmxreg,imm         KATMAI,MMX 
-PINSRW           mmxreg,mem,imm           KATMAI,MMX 
-PINSRW           mmxreg,rm16,imm          KATMAI,MMX 
-PINSRW           mmxreg,reg32,imm         KATMAI,MMX 
-PMAXSW           mmxreg,mmxrm             KATMAI,MMX 
-PMAXUB           mmxreg,mmxrm             KATMAI,MMX 
-PMINSW           mmxreg,mmxrm             KATMAI,MMX 
-PMINUB           mmxreg,mmxrm             KATMAI,MMX 
-PMOVMSKB         reg32,mmxreg             KATMAI,MMX 
-PMULHUW          mmxreg,mmxrm             KATMAI,MMX 
-PSADBW           mmxreg,mmxrm             KATMAI,MMX 
-PSHUFW           mmxreg,mmxrm,imm         KATMAI,MMX
-</pre>
-<h4 id="section-F.1.8">F.1.8 AMD Enhanced 3DNow! (Athlon) instructions</h4>
-<pre>
-PF2IW            mmxreg,mmxrm             PENT,3DNOW 
-PFNACC           mmxreg,mmxrm             PENT,3DNOW 
-PFPNACC          mmxreg,mmxrm             PENT,3DNOW 
-PI2FW            mmxreg,mmxrm             PENT,3DNOW 
-PSWAPD           mmxreg,mmxrm             PENT,3DNOW
-</pre>
-<h4 id="section-F.1.9">F.1.9 Willamette SSE2 Cacheability Instructions</h4>
-<pre>
-MASKMOVDQU       xmmreg,xmmreg            WILLAMETTE,SSE2 
-CLFLUSH          mem                      WILLAMETTE,SSE2 
-MOVNTDQ          mem,xmmreg               WILLAMETTE,SSE2,SO 
-MOVNTI           mem,reg32                WILLAMETTE,SD 
-MOVNTI           mem,reg64                X86_64,LONG 
-MOVNTPD          mem,xmmreg               WILLAMETTE,SSE2,SO 
-LFENCE                                    WILLAMETTE,SSE2 
-MFENCE                                    WILLAMETTE,SSE2
-</pre>
-<h4 id="section-F.1.10">F.1.10 Willamette MMX instructions (SSE2 SIMD Integer Instructions)</h4>
-<pre>
-MOVD             mem,xmmreg               WILLAMETTE,SSE2,SD 
-MOVD             xmmreg,mem               WILLAMETTE,SSE2,SD 
-MOVD             xmmreg,rm32              WILLAMETTE,SSE2 
-MOVD             rm32,xmmreg              WILLAMETTE,SSE2 
-MOVDQA           xmmreg,xmmrm128          WILLAMETTE,SSE2,SO 
-MOVDQA           xmmrm128,xmmreg          WILLAMETTE,SSE2,SO 
-MOVDQU           xmmreg,xmmrm128          WILLAMETTE,SSE2,SO 
-MOVDQU           xmmrm128,xmmreg          WILLAMETTE,SSE2,SO 
-MOVDQ2Q          mmxreg,xmmreg            WILLAMETTE,SSE2 
-MOVQ             xmmreg,xmmreg            WILLAMETTE,SSE2 
-MOVQ             xmmreg,xmmreg            WILLAMETTE,SSE2 
-MOVQ             mem,xmmreg               WILLAMETTE,SSE2 
-MOVQ             xmmreg,mem               WILLAMETTE,SSE2 
-MOVQ             xmmreg,rm64              X86_64,LONG,SSE2 
-MOVQ             rm64,xmmreg              X86_64,LONG,SSE2 
-MOVQ2DQ          xmmreg,mmxreg            WILLAMETTE,SSE2 
-PACKSSWB         xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PACKSSDW         xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PACKUSWB         xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PADDB            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PADDW            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PADDD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PADDQ            mmxreg,mmxrm             WILLAMETTE,MMX 
-PADDQ            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PADDSB           xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PADDSW           xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PADDUSB          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PADDUSW          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PAND             xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PANDN            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PAVGB            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PAVGW            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PCMPEQB          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PCMPEQW          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PCMPEQD          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PCMPGTB          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PCMPGTW          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PCMPGTD          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PEXTRW           reg32,xmmreg,imm         WILLAMETTE,SSE2 
-PEXTRW           reg64,xmmreg,imm         X86_64,LONG,SSE2,ND 
-PINSRW           xmmreg,reg16,imm         WILLAMETTE,SSE2 
-PINSRW           xmmreg,reg32,imm         WILLAMETTE,SSE2,ND 
-PINSRW           xmmreg,reg64,imm         X86_64,LONG,SSE2,ND 
-PINSRW           xmmreg,mem,imm           WILLAMETTE,SSE2 
-PINSRW           xmmreg,mem16,imm         WILLAMETTE,SSE2 
-PMADDWD          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PMAXSW           xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PMAXUB           xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PMINSW           xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PMINUB           xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PMOVMSKB         reg32,xmmreg             WILLAMETTE,SSE2 
-PMULHUW          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PMULHW           xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PMULLW           xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PMULUDQ          mmxreg,mmxrm             WILLAMETTE,SSE2,SO 
-PMULUDQ          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-POR              xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PSADBW           xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PSHUFD           xmmreg,xmmreg,imm        WILLAMETTE,SSE2 
-PSHUFD           xmmreg,mem,imm           WILLAMETTE,SSE2 
-PSHUFHW          xmmreg,xmmreg,imm        WILLAMETTE,SSE2 
-PSHUFHW          xmmreg,mem,imm           WILLAMETTE,SSE2 
-PSHUFLW          xmmreg,xmmreg,imm        WILLAMETTE,SSE2 
-PSHUFLW          xmmreg,mem,imm           WILLAMETTE,SSE2 
-PSLLDQ           xmmreg,imm               WILLAMETTE,SSE2,AR1 
-PSLLW            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PSLLW            xmmreg,imm               WILLAMETTE,SSE2,AR1 
-PSLLD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PSLLD            xmmreg,imm               WILLAMETTE,SSE2,AR1 
-PSLLQ            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PSLLQ            xmmreg,imm               WILLAMETTE,SSE2,AR1 
-PSRAW            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PSRAW            xmmreg,imm               WILLAMETTE,SSE2,AR1 
-PSRAD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PSRAD            xmmreg,imm               WILLAMETTE,SSE2,AR1 
-PSRLDQ           xmmreg,imm               WILLAMETTE,SSE2,AR1 
-PSRLW            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PSRLW            xmmreg,imm               WILLAMETTE,SSE2,AR1 
-PSRLD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PSRLD            xmmreg,imm               WILLAMETTE,SSE2,AR1 
-PSRLQ            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PSRLQ            xmmreg,imm               WILLAMETTE,SSE2,AR1 
-PSUBB            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PSUBW            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PSUBD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PSUBQ            mmxreg,mmxrm             WILLAMETTE,SSE2,SO 
-PSUBQ            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PSUBSB           xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PSUBSW           xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PSUBUSB          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PSUBUSW          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PUNPCKHBW        xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PUNPCKHWD        xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PUNPCKHDQ        xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PUNPCKHQDQ       xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PUNPCKLBW        xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PUNPCKLWD        xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PUNPCKLDQ        xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PUNPCKLQDQ       xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-PXOR             xmmreg,xmmrm             WILLAMETTE,SSE2,SO
-</pre>
-<h4 id="section-F.1.11">F.1.11 Willamette Streaming SIMD instructions (SSE2)</h4>
-<pre>
-ADDPD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-ADDSD            xmmreg,xmmrm             WILLAMETTE,SSE2 
-ANDNPD           xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-ANDPD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-CMPEQPD          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-CMPEQSD          xmmreg,xmmrm             WILLAMETTE,SSE2 
-CMPLEPD          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-CMPLESD          xmmreg,xmmrm             WILLAMETTE,SSE2 
-CMPLTPD          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-CMPLTSD          xmmreg,xmmrm             WILLAMETTE,SSE2 
-CMPNEQPD         xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-CMPNEQSD         xmmreg,xmmrm             WILLAMETTE,SSE2 
-CMPNLEPD         xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-CMPNLESD         xmmreg,xmmrm             WILLAMETTE,SSE2 
-CMPNLTPD         xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-CMPNLTSD         xmmreg,xmmrm             WILLAMETTE,SSE2 
-CMPORDPD         xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-CMPORDSD         xmmreg,xmmrm             WILLAMETTE,SSE2 
-CMPUNORDPD       xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-CMPUNORDSD       xmmreg,xmmrm             WILLAMETTE,SSE2 
-CMPPD            xmmreg,xmmrm128,imm8     WILLAMETTE,SSE2 
-CMPSD            xmmreg,xmmrm128,imm8     WILLAMETTE,SSE2 
-COMISD           xmmreg,xmmrm64           WILLAMETTE,SSE2 
-CVTDQ2PD         xmmreg,xmmrm             WILLAMETTE,SSE2 
-CVTDQ2PS         xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-CVTPD2DQ         xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-CVTPD2PI         mmxreg,xmmrm             WILLAMETTE,SSE2,SO 
-CVTPD2PS         xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-CVTPI2PD         xmmreg,mmxrm             WILLAMETTE,SSE2 
-CVTPS2DQ         xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-CVTPS2PD         xmmreg,xmmrm             WILLAMETTE,SSE2 
-CVTSD2SI         reg32,xmmreg             WILLAMETTE,SSE2,AR1 
-CVTSD2SI         reg32,mem                WILLAMETTE,SSE2,AR1 
-CVTSD2SI         reg64,xmmreg             X86_64,LONG,SSE2,AR1 
-CVTSD2SI         reg64,mem                X86_64,LONG,SSE2,AR1 
-CVTSD2SS         xmmreg,xmmrm             WILLAMETTE,SSE2 
-CVTSI2SD         xmmreg,mem               WILLAMETTE,SSE2,SD,AR1,ND 
-CVTSI2SD         xmmreg,rm32              WILLAMETTE,SSE2,SD,AR1 
-CVTSI2SD         xmmreg,rm64              X86_64,LONG,SSE2,AR1 
-CVTSS2SD         xmmreg,xmmrm             WILLAMETTE,SSE2,SD 
-CVTTPD2PI        mmxreg,xmmrm             WILLAMETTE,SSE2,SO 
-CVTTPD2DQ        xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-CVTTPS2DQ        xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-CVTTSD2SI        reg32,xmmreg             WILLAMETTE,SSE2,AR1 
-CVTTSD2SI        reg32,mem                WILLAMETTE,SSE2,AR1 
-CVTTSD2SI        reg64,xmmreg             X86_64,LONG,SSE2,AR1 
-CVTTSD2SI        reg64,mem                X86_64,LONG,SSE2,AR1 
-DIVPD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-DIVSD            xmmreg,xmmrm             WILLAMETTE,SSE2 
-MAXPD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-MAXSD            xmmreg,xmmrm             WILLAMETTE,SSE2 
-MINPD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-MINSD            xmmreg,xmmrm             WILLAMETTE,SSE2 
-MOVAPD           xmmreg,xmmrm128          WILLAMETTE,SSE2 
-MOVAPD           xmmrm128,xmmreg          WILLAMETTE,SSE2 
-MOVHPD           mem64,xmmreg             WILLAMETTE,SSE2 
-MOVHPD           xmmreg,mem64             WILLAMETTE,SSE2 
-MOVLPD           mem64,xmmreg             WILLAMETTE,SSE2 
-MOVLPD           xmmreg,mem64             WILLAMETTE,SSE2 
-MOVMSKPD         reg32,xmmreg             WILLAMETTE,SSE2 
-MOVMSKPD         reg64,xmmreg             X86_64,LONG,SSE2 
-MOVSD            xmmreg,xmmrm64           WILLAMETTE,SSE2 
-MOVSD            xmmrm64,xmmreg           WILLAMETTE,SSE2 
-MOVUPD           xmmreg,xmmrm128          WILLAMETTE,SSE2 
-MOVUPD           xmmrm128,xmmreg          WILLAMETTE,SSE2 
-MULPD            xmmreg,xmmrm128          WILLAMETTE,SSE2,SO 
-MULSD            xmmreg,xmmrm64           WILLAMETTE,SSE2 
-ORPD             xmmreg,xmmrm128          WILLAMETTE,SSE2,SO 
-SHUFPD           xmmreg,xmmrm128,imm8     WILLAMETTE,SSE2 
-SQRTPD           xmmreg,xmmrm128          WILLAMETTE,SSE2,SO 
-SQRTSD           xmmreg,xmmrm64           WILLAMETTE,SSE2 
-SUBPD            xmmreg,xmmrm128          WILLAMETTE,SSE2,SO 
-SUBSD            xmmreg,xmmrm64           WILLAMETTE,SSE2 
-UCOMISD          xmmreg,xmmrm64           WILLAMETTE,SSE2 
-UNPCKHPD         xmmreg,xmmrm128          WILLAMETTE,SSE2 
-UNPCKLPD         xmmreg,xmmrm128          WILLAMETTE,SSE2 
-XORPD            xmmreg,xmmrm128          WILLAMETTE,SSE2
-</pre>
-<h4 id="section-F.1.12">F.1.12 Prescott New Instructions (SSE3)</h4>
-<pre>
-ADDSUBPD         xmmreg,xmmrm128          PRESCOTT,SSE3,SO 
-ADDSUBPS         xmmreg,xmmrm128          PRESCOTT,SSE3,SO 
-HADDPD           xmmreg,xmmrm128          PRESCOTT,SSE3,SO 
-HADDPS           xmmreg,xmmrm128          PRESCOTT,SSE3,SO 
-HSUBPD           xmmreg,xmmrm128          PRESCOTT,SSE3,SO 
-HSUBPS           xmmreg,xmmrm128          PRESCOTT,SSE3,SO 
-LDDQU            xmmreg,mem128            PRESCOTT,SSE3,SO 
-MOVDDUP          xmmreg,xmmrm64           PRESCOTT,SSE3 
-MOVSHDUP         xmmreg,xmmrm128          PRESCOTT,SSE3 
-MOVSLDUP         xmmreg,xmmrm128          PRESCOTT,SSE3
-</pre>
-<h4 id="section-F.1.13">F.1.13 VMX/SVM Instructions</h4>
-<pre>
-CLGI                                      VMX,AMD 
-STGI                                      VMX,AMD 
-VMCALL                                    VMX 
-VMCLEAR          mem                      VMX 
-VMFUNC                                    VMX 
-VMLAUNCH                                  VMX 
-VMLOAD                                    VMX,AMD 
-VMMCALL                                   VMX,AMD 
-VMPTRLD          mem                      VMX 
-VMPTRST          mem                      VMX 
-VMREAD           rm32,reg32               VMX,NOLONG,SD 
-VMREAD           rm64,reg64               X86_64,LONG,VMX 
-VMRESUME                                  VMX 
-VMRUN                                     VMX,AMD 
-VMSAVE                                    VMX,AMD 
-VMWRITE          reg32,rm32               VMX,NOLONG,SD 
-VMWRITE          reg64,rm64               X86_64,LONG,VMX 
-VMXOFF                                    VMX 
-VMXON            mem                      VMX
-</pre>
-<h4 id="section-F.1.14">F.1.14 Extended Page Tables VMX instructions</h4>
-<pre>
-INVEPT           reg32,mem                VMX,SO,NOLONG 
-INVEPT           reg64,mem                VMX,SO,LONG 
-INVVPID          reg32,mem                VMX,SO,NOLONG 
-INVVPID          reg64,mem                VMX,SO,LONG
-</pre>
-<h4 id="section-F.1.15">F.1.15 SEV-SNP AMD instructions</h4>
-<pre>
-PVALIDATE                                 VMX,AMD 
-RMPADJUST                                 VMX,AMD 
-VMGEXIT                                   VMX,AMD 
-VMGEXIT                                   VMX,AMD
-</pre>
-<h4 id="section-F.1.16">F.1.16 Tejas New Instructions (SSSE3)</h4>
-<pre>
-PABSB            mmxreg,mmxrm             SSSE3,MMX 
-PABSB            xmmreg,xmmrm128          SSSE3 
-PABSW            mmxreg,mmxrm             SSSE3,MMX 
-PABSW            xmmreg,xmmrm128          SSSE3 
-PABSD            mmxreg,mmxrm             SSSE3,MMX 
-PABSD            xmmreg,xmmrm128          SSSE3 
-PALIGNR          mmxreg,mmxrm,imm         SSSE3,MMX 
-PALIGNR          xmmreg,xmmrm,imm         SSSE3 
-PHADDW           mmxreg,mmxrm             SSSE3,MMX 
-PHADDW           xmmreg,xmmrm128          SSSE3 
-PHADDD           mmxreg,mmxrm             SSSE3,MMX 
-PHADDD           xmmreg,xmmrm128          SSSE3 
-PHADDSW          mmxreg,mmxrm             SSSE3,MMX 
-PHADDSW          xmmreg,xmmrm128          SSSE3 
-PHSUBW           mmxreg,mmxrm             SSSE3,MMX 
-PHSUBW           xmmreg,xmmrm128          SSSE3 
-PHSUBD           mmxreg,mmxrm             SSSE3,MMX 
-PHSUBD           xmmreg,xmmrm128          SSSE3 
-PHSUBSW          mmxreg,mmxrm             SSSE3,MMX 
-PHSUBSW          xmmreg,xmmrm128          SSSE3 
-PMADDUBSW        mmxreg,mmxrm             SSSE3,MMX 
-PMADDUBSW        xmmreg,xmmrm128          SSSE3 
-PMULHRSW         mmxreg,mmxrm             SSSE3,MMX 
-PMULHRSW         xmmreg,xmmrm128          SSSE3 
-PSHUFB           mmxreg,mmxrm             SSSE3,MMX 
-PSHUFB           xmmreg,xmmrm128          SSSE3 
-PSIGNB           mmxreg,mmxrm             SSSE3,MMX 
-PSIGNB           xmmreg,xmmrm128          SSSE3 
-PSIGNW           mmxreg,mmxrm             SSSE3,MMX 
-PSIGNW           xmmreg,xmmrm128          SSSE3 
-PSIGND           mmxreg,mmxrm             SSSE3,MMX 
-PSIGND           xmmreg,xmmrm128          SSSE3
-</pre>
-<h4 id="section-F.1.17">F.1.17 AMD SSE4A</h4>
-<pre>
-EXTRQ            xmmreg,imm,imm           SSE4A,AMD 
-EXTRQ            xmmreg,xmmreg            SSE4A,AMD 
-INSERTQ          xmmreg,xmmreg,imm,imm    SSE4A,AMD 
-INSERTQ          xmmreg,xmmreg            SSE4A,AMD 
-MOVNTSD          mem64,xmmreg             SSE4A,AMD 
-MOVNTSS          mem32,xmmreg             SSE4A,AMD,SD
-</pre>
-<h4 id="section-F.1.18">F.1.18 New instructions in Barcelona</h4>
-<pre>
-LZCNT            reg16,rm16               P6,AMD 
-LZCNT            reg32,rm32               P6,AMD 
-LZCNT            reg64,rm64               X86_64,LONG,AMD
-</pre>
-<h4 id="section-F.1.19">F.1.19 Penryn New Instructions (SSE4.1)</h4>
-<pre>
-BLENDPD          xmmreg,xmmrm128,imm8     SSE41 
-BLENDPS          xmmreg,xmmrm128,imm8     SSE41 
-BLENDVPD         xmmreg,xmmrm128,xmm0     SSE41 
-BLENDVPD         xmmreg,xmmrm128          SSE41 
-BLENDVPS         xmmreg,xmmrm128,xmm0     SSE41 
-BLENDVPS         xmmreg,xmmrm128          SSE41 
-DPPD             xmmreg,xmmrm128,imm8     SSE41 
-DPPS             xmmreg,xmmrm128,imm8     SSE41 
-EXTRACTPS        rm32,xmmreg,imm8         SSE41 
-EXTRACTPS        reg64,xmmreg,imm8        SSE41,X86_64,LONG 
-INSERTPS         xmmreg,xmmrm32,imm8      SSE41 
-MOVNTDQA         xmmreg,mem128            SSE41 
-MPSADBW          xmmreg,xmmrm128,imm8     SSE41 
-PACKUSDW         xmmreg,xmmrm128          SSE41 
-PBLENDVB         xmmreg,xmmrm,xmm0        SSE41 
-PBLENDVB         xmmreg,xmmrm128          SSE41 
-PBLENDW          xmmreg,xmmrm128,imm8     SSE41 
-PCMPEQQ          xmmreg,xmmrm128          SSE41 
-PEXTRB           reg32,xmmreg,imm8        SSE41 
-PEXTRB           mem8,xmmreg,imm8         SSE41 
-PEXTRB           reg64,xmmreg,imm8        SSE41,X86_64,LONG 
-PEXTRD           rm32,xmmreg,imm8         SSE41 
-PEXTRQ           rm64,xmmreg,imm8         SSE41,X86_64,LONG 
-PEXTRW           reg32,xmmreg,imm8        SSE41 
-PEXTRW           mem16,xmmreg,imm8        SSE41 
-PEXTRW           reg64,xmmreg,imm8        SSE41,X86_64,LONG 
-PHMINPOSUW       xmmreg,xmmrm128          SSE41 
-PINSRB           xmmreg,mem,imm8          SSE41 
-PINSRB           xmmreg,rm8,imm8          SSE41 
-PINSRB           xmmreg,reg32,imm8        SSE41 
-PINSRD           xmmreg,rm32,imm8         SSE41 
-PINSRQ           xmmreg,rm64,imm8         SSE41,X86_64,LONG 
-PMAXSB           xmmreg,xmmrm128          SSE41 
-PMAXSD           xmmreg,xmmrm128          SSE41 
-PMAXUD           xmmreg,xmmrm128          SSE41 
-PMAXUW           xmmreg,xmmrm128          SSE41 
-PMINSB           xmmreg,xmmrm128          SSE41 
-PMINSD           xmmreg,xmmrm128          SSE41 
-PMINUD           xmmreg,xmmrm128          SSE41 
-PMINUW           xmmreg,xmmrm128          SSE41 
-PMOVSXBW         xmmreg,xmmrm64           SSE41 
-PMOVSXBD         xmmreg,xmmrm32           SSE41,SD 
-PMOVSXBQ         xmmreg,xmmrm16           SSE41,SW 
-PMOVSXWD         xmmreg,xmmrm64           SSE41 
-PMOVSXWQ         xmmreg,xmmrm32           SSE41,SD 
-PMOVSXDQ         xmmreg,xmmrm64           SSE41 
-PMOVZXBW         xmmreg,xmmrm64           SSE41 
-PMOVZXBD         xmmreg,xmmrm32           SSE41,SD 
-PMOVZXBQ         xmmreg,xmmrm16           SSE41,SW 
-PMOVZXWD         xmmreg,xmmrm64           SSE41 
-PMOVZXWQ         xmmreg,xmmrm32           SSE41,SD 
-PMOVZXDQ         xmmreg,xmmrm64           SSE41 
-PMULDQ           xmmreg,xmmrm128          SSE41 
-PMULLD           xmmreg,xmmrm128          SSE41 
-PTEST            xmmreg,xmmrm128          SSE41 
-ROUNDPD          xmmreg,xmmrm128,imm8     SSE41 
-ROUNDPS          xmmreg,xmmrm128,imm8     SSE41 
-ROUNDSD          xmmreg,xmmrm64,imm8      SSE41 
-ROUNDSS          xmmreg,xmmrm32,imm8      SSE41
-</pre>
-<h4 id="section-F.1.20">F.1.20 Nehalem New Instructions (SSE4.2)</h4>
-<pre>
-CRC32            reg32,rm8                SSE42 
-CRC32            reg32,rm16               SSE42 
-CRC32            reg32,rm32               SSE42 
-CRC32            reg64,rm8                SSE42,X86_64,LONG 
-CRC32            reg64,rm64               SSE42,X86_64,LONG 
-PCMPESTRI        xmmreg,xmmrm128,imm8     SSE42 
-PCMPESTRM        xmmreg,xmmrm128,imm8     SSE42 
-PCMPISTRI        xmmreg,xmmrm128,imm8     SSE42 
-PCMPISTRM        xmmreg,xmmrm128,imm8     SSE42 
-PCMPGTQ          xmmreg,xmmrm128          SSE42 
-POPCNT           reg16,rm16               NEHALEM,SW 
-POPCNT           reg32,rm32               NEHALEM,SD 
-POPCNT           reg64,rm64               NEHALEM,LONG
-</pre>
-<h4 id="section-F.1.21">F.1.21 Intel SMX</h4>
-<pre>
-GETSEC                                    KATMAI
-</pre>
-<h4 id="section-F.1.22">F.1.22 Geode (Cyrix) 3DNow! additions</h4>
-<pre>
-PFRCPV           mmxreg,mmxrm             PENT,3DNOW,CYRIX 
-PFRSQRTV         mmxreg,mmxrm             PENT,3DNOW,CYRIX
-</pre>
-<h4 id="section-F.1.23">F.1.23 Intel new instructions in ???</h4>
-<pre>
-MOVBE            reg16,mem16              NEHALEM 
-MOVBE            reg32,mem32              NEHALEM 
-MOVBE            reg64,mem64              NEHALEM 
-MOVBE            mem16,reg16              NEHALEM 
-MOVBE            mem32,reg32              NEHALEM 
-MOVBE            mem64,reg64              NEHALEM
-</pre>
-<h4 id="section-F.1.24">F.1.24 Intel AES instructions</h4>
-<pre>
-AESENC           xmmreg,xmmrm128          SSE,WESTMERE 
-AESENCLAST       xmmreg,xmmrm128          SSE,WESTMERE 
-AESDEC           xmmreg,xmmrm128          SSE,WESTMERE 
-AESDECLAST       xmmreg,xmmrm128          SSE,WESTMERE 
-AESIMC           xmmreg,xmmrm128          SSE,WESTMERE 
-AESKEYGENASSIST  xmmreg,xmmrm128,imm8     SSE,WESTMERE
-</pre>
-<h4 id="section-F.1.25">F.1.25 Intel AVX AES instructions</h4>
-<pre>
-VAESENC          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VAESENCLAST      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VAESDEC          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VAESDECLAST      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VAESIMC          xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-VAESKEYGENASSIST xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE
-</pre>
-<h4 id="section-F.1.26">F.1.26 Intel instruction extension based on pub number 319433-030 dated October 2017</h4>
-<pre>
-VAESENC          ymmreg,ymmreg*,ymmrm256  VAES 
-VAESENCLAST      ymmreg,ymmreg*,ymmrm256  VAES 
-VAESDEC          ymmreg,ymmreg*,ymmrm256  VAES 
-VAESDECLAST      ymmreg,ymmreg*,ymmrm256  VAES 
-VAESENC          xmmreg,xmmreg*,xmmrm128  AVX512VL,VAES 
-VAESENC          ymmreg,ymmreg*,ymmrm256  AVX512VL,VAES 
-VAESENCLAST      xmmreg,xmmreg*,xmmrm128  AVX512VL,VAES 
-VAESENCLAST      ymmreg,ymmreg*,ymmrm256  AVX512VL,VAES 
-VAESDEC          xmmreg,xmmreg*,xmmrm128  AVX512VL,VAES 
-VAESDEC          ymmreg,ymmreg*,ymmrm256  AVX512VL,VAES 
-VAESDECLAST      xmmreg,xmmreg*,xmmrm128  AVX512VL,VAES 
-VAESDECLAST      ymmreg,ymmreg*,ymmrm256  AVX512VL,VAES 
-VAESENC          zmmreg,zmmreg*,zmmrm512  AVX512,VAES 
-VAESENCLAST      zmmreg,zmmreg*,zmmrm512  AVX512,VAES 
-VAESDEC          zmmreg,zmmreg*,zmmrm512  AVX512,VAES 
-VAESDECLAST      zmmreg,zmmreg*,zmmrm512  AVX512,VAES
-</pre>
-<h4 id="section-F.1.27">F.1.27 Intel AVX instructions</h4>
-<pre>
-VADDPD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VADDPD           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VADDPS           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VADDPS           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VADDSD           xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VADDSS           xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE 
-VADDSUBPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VADDSUBPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VADDSUBPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VADDSUBPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VANDPD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VANDPD           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VANDPS           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VANDPS           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VANDNPD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VANDNPD          ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VANDNPS          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VANDNPS          ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VBLENDPD         xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-VBLENDPD         ymmreg,ymmreg*,ymmrm256,imm8 AVX,SANDYBRIDGE 
-VBLENDPS         xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-VBLENDPS         ymmreg,ymmreg*,ymmrm256,imm8 AVX,SANDYBRIDGE 
-VBLENDVPD        xmmreg,xmmreg*,xmmrm128,xmmreg AVX,SANDYBRIDGE 
-VBLENDVPD        ymmreg,ymmreg*,ymmrm256,ymmreg AVX,SANDYBRIDGE 
-VBLENDVPS        xmmreg,xmmreg*,xmmrm128,xmmreg AVX,SANDYBRIDGE 
-VBLENDVPS        ymmreg,ymmreg*,ymmrm256,ymmreg AVX,SANDYBRIDGE 
-VBROADCASTSS     xmmreg,mem32             AVX,SANDYBRIDGE 
-VBROADCASTSS     ymmreg,mem32             AVX,SANDYBRIDGE 
-VBROADCASTSD     ymmreg,mem64             AVX,SANDYBRIDGE 
-VBROADCASTF128   ymmreg,mem128            AVX,SANDYBRIDGE 
-VCMPEQ_OSPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPEQ_OSPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPEQPD         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPEQPD         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPLT_OSPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPLT_OSPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPLTPD         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPLTPD         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPLE_OSPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPLE_OSPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPLEPD         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPLEPD         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPUNORD_QPD    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPUNORD_QPD    ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPUNORDPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPUNORDPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNEQ_UQPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNEQ_UQPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNEQPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNEQPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNLT_USPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNLT_USPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNLTPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNLTPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNLE_USPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNLE_USPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNLEPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNLEPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPORD_QPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPORD_QPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPORDPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPORDPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPEQ_UQPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPEQ_UQPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNGE_USPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNGE_USPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNGEPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNGEPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNGT_USPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNGT_USPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNGTPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNGTPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPFALSE_OQPD   xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPFALSE_OQPD   ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPFALSEPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPFALSEPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNEQ_OQPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNEQ_OQPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPGE_OSPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPGE_OSPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPGEPD         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPGEPD         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPGT_OSPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPGT_OSPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPGTPD         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPGTPD         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPTRUE_UQPD    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPTRUE_UQPD    ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPTRUEPD       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPTRUEPD       ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPEQ_OSPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPEQ_OSPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPLT_OQPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPLT_OQPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPLE_OQPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPLE_OQPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPUNORD_SPD    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPUNORD_SPD    ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNEQ_USPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNEQ_USPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNLT_UQPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNLT_UQPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNLE_UQPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNLE_UQPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPORD_SPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPORD_SPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPEQ_USPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPEQ_USPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNGE_UQPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNGE_UQPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNGT_UQPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNGT_UQPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPFALSE_OSPD   xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPFALSE_OSPD   ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNEQ_OSPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNEQ_OSPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPGE_OQPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPGE_OQPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPGT_OQPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPGT_OQPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPTRUE_USPD    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPTRUE_USPD    ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPPD           xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-VCMPPD           ymmreg,ymmreg*,ymmrm256,imm8 AVX,SANDYBRIDGE 
-VCMPEQ_OSPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPEQ_OSPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPEQPS         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPEQPS         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPLT_OSPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPLT_OSPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPLTPS         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPLTPS         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPLE_OSPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPLE_OSPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPLEPS         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPLEPS         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPUNORD_QPS    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPUNORD_QPS    ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPUNORDPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPUNORDPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNEQ_UQPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNEQ_UQPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNEQPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNEQPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNLT_USPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNLT_USPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNLTPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNLTPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNLE_USPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNLE_USPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNLEPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNLEPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPORD_QPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPORD_QPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPORDPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPORDPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPEQ_UQPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPEQ_UQPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNGE_USPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNGE_USPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNGEPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNGEPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNGT_USPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNGT_USPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNGTPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNGTPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPFALSE_OQPS   xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPFALSE_OQPS   ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPFALSEPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPFALSEPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNEQ_OQPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNEQ_OQPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPGE_OSPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPGE_OSPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPGEPS         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPGEPS         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPGT_OSPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPGT_OSPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPGTPS         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPGTPS         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPTRUE_UQPS    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPTRUE_UQPS    ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPTRUEPS       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPTRUEPS       ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPEQ_OSPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPEQ_OSPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPLT_OQPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPLT_OQPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPLE_OQPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPLE_OQPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPUNORD_SPS    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPUNORD_SPS    ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNEQ_USPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNEQ_USPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNLT_UQPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNLT_UQPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNLE_UQPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNLE_UQPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPORD_SPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPORD_SPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPEQ_USPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPEQ_USPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNGE_UQPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNGE_UQPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNGT_UQPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNGT_UQPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPFALSE_OSPS   xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPFALSE_OSPS   ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPNEQ_OSPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPNEQ_OSPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPGE_OQPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPGE_OQPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPGT_OQPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPGT_OQPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPTRUE_USPS    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VCMPTRUE_USPS    ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VCMPPS           xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-VCMPPS           ymmreg,ymmreg*,ymmrm256,imm8 AVX,SANDYBRIDGE 
-VCMPEQ_OSSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPEQSD         xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPLT_OSSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPLTSD         xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPLE_OSSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPLESD         xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPUNORD_QSD    xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPUNORDSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNEQ_UQSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNEQSD        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNLT_USSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNLTSD        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNLE_USSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNLESD        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPORD_QSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPORDSD        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPEQ_UQSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNGE_USSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNGESD        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNGT_USSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNGTSD        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPFALSE_OQSD   xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPFALSESD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNEQ_OQSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPGE_OSSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPGESD         xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPGT_OSSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPGTSD         xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPTRUE_UQSD    xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPTRUESD       xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPEQ_OSSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPLT_OQSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPLE_OQSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPUNORD_SSD    xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNEQ_USSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNLT_UQSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNLE_UQSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPORD_SSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPEQ_USSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNGE_UQSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNGT_UQSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPFALSE_OSSD   xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNEQ_OSSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPGE_OQSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPGT_OQSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPTRUE_USSD    xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPSD           xmmreg,xmmreg*,xmmrm64,imm8 AVX,SANDYBRIDGE 
-VCMPEQ_OSSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPEQSS         xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPLT_OSSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPLTSS         xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPLE_OSSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPLESS         xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPUNORD_QSS    xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPUNORDSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNEQ_UQSS     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNEQSS        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNLT_USSS     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNLTSS        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNLE_USSS     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNLESS        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPORD_QSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPORDSS        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPEQ_UQSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNGE_USSS     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNGESS        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNGT_USSS     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNGTSS        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPFALSE_OQSS   xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPFALSESS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNEQ_OQSS     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPGE_OSSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPGESS         xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPGT_OSSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPGTSS         xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPTRUE_UQSS    xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPTRUESS       xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPEQ_OSSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPLT_OQSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPLE_OQSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPUNORD_SSS    xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNEQ_USSS     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNLT_UQSS     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNLE_UQSS     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPORD_SSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPEQ_USSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNGE_UQSS     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNGT_UQSS     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPFALSE_OSSS   xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPNEQ_OSSS     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPGE_OQSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPGT_OQSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPTRUE_USSS    xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCMPSS           xmmreg,xmmreg*,xmmrm64,imm8 AVX,SANDYBRIDGE 
-VCOMISD          xmmreg,xmmrm64           AVX,SANDYBRIDGE 
-VCOMISS          xmmreg,xmmrm32           AVX,SANDYBRIDGE 
-VCVTDQ2PD        xmmreg,xmmrm64           AVX,SANDYBRIDGE 
-VCVTDQ2PD        ymmreg,xmmrm128          AVX,SANDYBRIDGE 
-VCVTDQ2PS        xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-VCVTDQ2PS        ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-VCVTPD2DQ        xmmreg,xmmreg            AVX,SANDYBRIDGE 
-VCVTPD2DQ        xmmreg,mem128            AVX,SANDYBRIDGE,SO 
-VCVTPD2DQ        xmmreg,ymmreg            AVX,SANDYBRIDGE 
-VCVTPD2DQ        xmmreg,mem256            AVX,SANDYBRIDGE,SY 
-VCVTPD2PS        xmmreg,xmmreg            AVX,SANDYBRIDGE 
-VCVTPD2PS        xmmreg,mem128            AVX,SANDYBRIDGE,SO 
-VCVTPD2PS        xmmreg,ymmreg            AVX,SANDYBRIDGE 
-VCVTPD2PS        xmmreg,mem256            AVX,SANDYBRIDGE,SY 
-VCVTPS2DQ        xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-VCVTPS2DQ        ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-VCVTPS2PD        xmmreg,xmmrm64           AVX,SANDYBRIDGE 
-VCVTPS2PD        ymmreg,xmmrm128          AVX,SANDYBRIDGE 
-VCVTSD2SI        reg32,xmmrm64            AVX,SANDYBRIDGE 
-VCVTSD2SI        reg64,xmmrm64            AVX,SANDYBRIDGE,LONG 
-VCVTSD2SS        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VCVTSI2SD        xmmreg,xmmreg*,rm32      AVX,SANDYBRIDGE,SD 
-VCVTSI2SD        xmmreg,xmmreg*,mem32     AVX,SANDYBRIDGE,ND,SD 
-VCVTSI2SD        xmmreg,xmmreg*,rm64      AVX,SANDYBRIDGE,LONG 
-VCVTSI2SS        xmmreg,xmmreg*,rm32      AVX,SANDYBRIDGE,SD 
-VCVTSI2SS        xmmreg,xmmreg*,mem32     AVX,SANDYBRIDGE,ND,SD 
-VCVTSI2SS        xmmreg,xmmreg*,rm64      AVX,SANDYBRIDGE,LONG 
-VCVTSS2SD        xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE 
-VCVTSS2SI        reg32,xmmrm32            AVX,SANDYBRIDGE 
-VCVTSS2SI        reg64,xmmrm32            AVX,SANDYBRIDGE,LONG 
-VCVTTPD2DQ       xmmreg,xmmreg            AVX,SANDYBRIDGE 
-VCVTTPD2DQ       xmmreg,mem128            AVX,SANDYBRIDGE,SO 
-VCVTTPD2DQ       xmmreg,ymmreg            AVX,SANDYBRIDGE 
-VCVTTPD2DQ       xmmreg,mem256            AVX,SANDYBRIDGE,SY 
-VCVTTPS2DQ       xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-VCVTTPS2DQ       ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-VCVTTSD2SI       reg32,xmmrm64            AVX,SANDYBRIDGE 
-VCVTTSD2SI       reg64,xmmrm64            AVX,SANDYBRIDGE,LONG 
-VCVTTSS2SI       reg32,xmmrm32            AVX,SANDYBRIDGE 
-VCVTTSS2SI       reg64,xmmrm32            AVX,SANDYBRIDGE,LONG 
-VDIVPD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VDIVPD           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VDIVPS           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VDIVPS           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VDIVSD           xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VDIVSS           xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE 
-VDPPD            xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-VDPPS            xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-VDPPS            ymmreg,ymmreg*,ymmrm256,imm8 AVX,SANDYBRIDGE 
-VEXTRACTF128     xmmrm128,ymmreg,imm8     AVX,SANDYBRIDGE 
-VEXTRACTPS       rm32,xmmreg,imm8         AVX,SANDYBRIDGE 
-VHADDPD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VHADDPD          ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VHADDPS          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VHADDPS          ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VHSUBPD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VHSUBPD          ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VHSUBPS          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VHSUBPS          ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VINSERTF128      ymmreg,ymmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-VINSERTPS        xmmreg,xmmreg*,xmmrm32,imm8 AVX,SANDYBRIDGE 
-VLDDQU           xmmreg,mem128            AVX,SANDYBRIDGE 
-VLDQQU           ymmreg,mem256            AVX,SANDYBRIDGE 
-VLDDQU           ymmreg,mem256            AVX,SANDYBRIDGE 
-VLDMXCSR         mem32                    AVX,SANDYBRIDGE 
-VMASKMOVDQU      xmmreg,xmmreg            AVX,SANDYBRIDGE 
-VMASKMOVPS       xmmreg,xmmreg,mem128     AVX,SANDYBRIDGE 
-VMASKMOVPS       ymmreg,ymmreg,mem256     AVX,SANDYBRIDGE 
-VMASKMOVPS       mem128,xmmreg,xmmreg     AVX,SANDYBRIDGE,SO 
-VMASKMOVPS       mem256,ymmreg,ymmreg     AVX,SANDYBRIDGE,SY 
-VMASKMOVPD       xmmreg,xmmreg,mem128     AVX,SANDYBRIDGE 
-VMASKMOVPD       ymmreg,ymmreg,mem256     AVX,SANDYBRIDGE 
-VMASKMOVPD       mem128,xmmreg,xmmreg     AVX,SANDYBRIDGE 
-VMASKMOVPD       mem256,ymmreg,ymmreg     AVX,SANDYBRIDGE 
-VMAXPD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VMAXPD           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VMAXPS           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VMAXPS           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VMAXSD           xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VMAXSS           xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE 
-VMINPD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VMINPD           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VMINPS           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VMINPS           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VMINSD           xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VMINSS           xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE 
-VMOVAPD          xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-VMOVAPD          xmmrm128,xmmreg          AVX,SANDYBRIDGE 
-VMOVAPD          ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-VMOVAPD          ymmrm256,ymmreg          AVX,SANDYBRIDGE 
-VMOVAPS          xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-VMOVAPS          xmmrm128,xmmreg          AVX,SANDYBRIDGE 
-VMOVAPS          ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-VMOVAPS          ymmrm256,ymmreg          AVX,SANDYBRIDGE 
-VMOVD            xmmreg,rm32              AVX,SANDYBRIDGE 
-VMOVD            rm32,xmmreg              AVX,SANDYBRIDGE 
-VMOVQ            xmmreg,xmmrm64           AVX,SANDYBRIDGE 
-VMOVQ            xmmrm64,xmmreg           AVX,SANDYBRIDGE 
-VMOVQ            xmmreg,rm64              AVX,SANDYBRIDGE,LONG 
-VMOVQ            rm64,xmmreg              AVX,SANDYBRIDGE,LONG 
-VMOVDDUP         xmmreg,xmmrm64           AVX,SANDYBRIDGE 
-VMOVDDUP         ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-VMOVDQA          xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-VMOVDQA          xmmrm128,xmmreg          AVX,SANDYBRIDGE 
-VMOVQQA          ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-VMOVQQA          ymmrm256,ymmreg          AVX,SANDYBRIDGE 
-VMOVDQA          ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-VMOVDQA          ymmrm256,ymmreg          AVX,SANDYBRIDGE 
-VMOVDQU          xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-VMOVDQU          xmmrm128,xmmreg          AVX,SANDYBRIDGE 
-VMOVQQU          ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-VMOVQQU          ymmrm256,ymmreg          AVX,SANDYBRIDGE 
-VMOVDQU          ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-VMOVDQU          ymmrm256,ymmreg          AVX,SANDYBRIDGE 
-VMOVHLPS         xmmreg,xmmreg*,xmmreg    AVX,SANDYBRIDGE 
-VMOVHPD          xmmreg,xmmreg*,mem64     AVX,SANDYBRIDGE 
-VMOVHPD          mem64,xmmreg             AVX,SANDYBRIDGE 
-VMOVHPS          xmmreg,xmmreg*,mem64     AVX,SANDYBRIDGE 
-VMOVHPS          mem64,xmmreg             AVX,SANDYBRIDGE 
-VMOVLHPS         xmmreg,xmmreg*,xmmreg    AVX,SANDYBRIDGE 
-VMOVLPD          xmmreg,xmmreg*,mem64     AVX,SANDYBRIDGE 
-VMOVLPD          mem64,xmmreg             AVX,SANDYBRIDGE 
-VMOVLPS          xmmreg,xmmreg*,mem64     AVX,SANDYBRIDGE 
-VMOVLPS          mem64,xmmreg             AVX,SANDYBRIDGE 
-VMOVMSKPD        reg64,xmmreg             AVX,SANDYBRIDGE,LONG 
-VMOVMSKPD        reg32,xmmreg             AVX,SANDYBRIDGE 
-VMOVMSKPD        reg64,ymmreg             AVX,SANDYBRIDGE,LONG 
-VMOVMSKPD        reg32,ymmreg             AVX,SANDYBRIDGE 
-VMOVMSKPS        reg64,xmmreg             AVX,SANDYBRIDGE,LONG 
-VMOVMSKPS        reg32,xmmreg             AVX,SANDYBRIDGE 
-VMOVMSKPS        reg64,ymmreg             AVX,SANDYBRIDGE,LONG 
-VMOVMSKPS        reg32,ymmreg             AVX,SANDYBRIDGE 
-VMOVNTDQ         mem128,xmmreg            AVX,SANDYBRIDGE 
-VMOVNTQQ         mem256,ymmreg            AVX,SANDYBRIDGE 
-VMOVNTDQ         mem256,ymmreg            AVX,SANDYBRIDGE 
-VMOVNTDQA        xmmreg,mem128            AVX,SANDYBRIDGE 
-VMOVNTPD         mem128,xmmreg            AVX,SANDYBRIDGE 
-VMOVNTPD         mem256,ymmreg            AVX,SANDYBRIDGE 
-VMOVNTPS         mem128,xmmreg            AVX,SANDYBRIDGE 
-VMOVNTPS         mem256,ymmreg            AVX,SANDYBRIDGE 
-VMOVSD           xmmreg,xmmreg*,xmmreg    AVX,SANDYBRIDGE 
-VMOVSD           xmmreg,mem64             AVX,SANDYBRIDGE 
-VMOVSD           xmmreg,xmmreg*,xmmreg    AVX,SANDYBRIDGE 
-VMOVSD           mem64,xmmreg             AVX,SANDYBRIDGE 
-VMOVSHDUP        xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-VMOVSHDUP        ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-VMOVSLDUP        xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-VMOVSLDUP        ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-VMOVSS           xmmreg,xmmreg*,xmmreg    AVX,SANDYBRIDGE 
-VMOVSS           xmmreg,mem32             AVX,SANDYBRIDGE 
-VMOVSS           xmmreg,xmmreg*,xmmreg    AVX,SANDYBRIDGE 
-VMOVSS           mem32,xmmreg             AVX,SANDYBRIDGE 
-VMOVUPD          xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-VMOVUPD          xmmrm128,xmmreg          AVX,SANDYBRIDGE 
-VMOVUPD          ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-VMOVUPD          ymmrm256,ymmreg          AVX,SANDYBRIDGE 
-VMOVUPS          xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-VMOVUPS          xmmrm128,xmmreg          AVX,SANDYBRIDGE 
-VMOVUPS          ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-VMOVUPS          ymmrm256,ymmreg          AVX,SANDYBRIDGE 
-VMPSADBW         xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-VMULPD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VMULPD           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VMULPS           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VMULPS           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VMULSD           xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VMULSS           xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE 
-VORPD            xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VORPD            ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VORPS            xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VORPS            ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VPABSB           xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-VPABSW           xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-VPABSD           xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-VPACKSSWB        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPACKSSDW        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPACKUSWB        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPACKUSDW        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPADDB           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPADDW           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPADDD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPADDQ           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPADDSB          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPADDSW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPADDUSB         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPADDUSW         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPALIGNR         xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-VPAND            xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPANDN           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPAVGB           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPAVGW           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPBLENDVB        xmmreg,xmmreg*,xmmrm128,xmmreg AVX,SANDYBRIDGE 
-VPBLENDW         xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-VPCMPESTRI       xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE 
-VPCMPESTRM       xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE 
-VPCMPISTRI       xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE 
-VPCMPISTRM       xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE 
-VPCMPEQB         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPCMPEQW         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPCMPEQD         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPCMPEQQ         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPCMPGTB         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPCMPGTW         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPCMPGTD         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPCMPGTQ         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPERMILPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPERMILPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VPERMILPD        xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE 
-VPERMILPD        ymmreg,ymmrm256,imm8     AVX,SANDYBRIDGE 
-VPERMILPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPERMILPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VPERMILPS        xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE 
-VPERMILPS        ymmreg,ymmrm256,imm8     AVX,SANDYBRIDGE 
-VPERM2F128       ymmreg,ymmreg*,ymmrm256,imm8 AVX,SANDYBRIDGE 
-VPEXTRB          reg64,xmmreg,imm8        AVX,SANDYBRIDGE,LONG 
-VPEXTRB          reg32,xmmreg,imm8        AVX,SANDYBRIDGE 
-VPEXTRB          mem8,xmmreg,imm8         AVX,SANDYBRIDGE 
-VPEXTRW          reg64,xmmreg,imm8        AVX,SANDYBRIDGE,LONG 
-VPEXTRW          reg32,xmmreg,imm8        AVX,SANDYBRIDGE 
-VPEXTRW          reg64,xmmreg,imm8        AVX,SANDYBRIDGE,LONG 
-VPEXTRW          reg32,xmmreg,imm8        AVX,SANDYBRIDGE 
-VPEXTRW          mem16,xmmreg,imm8        AVX,SANDYBRIDGE 
-VPEXTRD          reg64,xmmreg,imm8        AVX,SANDYBRIDGE,LONG 
-VPEXTRD          rm32,xmmreg,imm8         AVX,SANDYBRIDGE 
-VPEXTRQ          rm64,xmmreg,imm8         AVX,SANDYBRIDGE,LONG 
-VPHADDW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPHADDD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPHADDSW         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPHMINPOSUW      xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-VPHSUBW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPHSUBD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPHSUBSW         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPINSRB          xmmreg,xmmreg*,mem8,imm8 AVX,SANDYBRIDGE 
-VPINSRB          xmmreg,xmmreg*,rm8,imm8  AVX,SANDYBRIDGE 
-VPINSRB          xmmreg,xmmreg*,reg32,imm8 AVX,SANDYBRIDGE 
-VPINSRW          xmmreg,xmmreg*,mem16,imm8 AVX,SANDYBRIDGE 
-VPINSRW          xmmreg,xmmreg*,rm16,imm8 AVX,SANDYBRIDGE 
-VPINSRW          xmmreg,xmmreg*,reg32,imm8 AVX,SANDYBRIDGE 
-VPINSRD          xmmreg,xmmreg*,mem32,imm8 AVX,SANDYBRIDGE 
-VPINSRD          xmmreg,xmmreg*,rm32,imm8 AVX,SANDYBRIDGE 
-VPINSRQ          xmmreg,xmmreg*,mem64,imm8 AVX,SANDYBRIDGE,LONG 
-VPINSRQ          xmmreg,xmmreg*,rm64,imm8 AVX,SANDYBRIDGE,LONG 
-VPMADDWD         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPMADDUBSW       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPMAXSB          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPMAXSW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPMAXSD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPMAXUB          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPMAXUW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPMAXUD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPMINSB          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPMINSW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPMINSD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPMINUB          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPMINUW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPMINUD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPMOVMSKB        reg64,xmmreg             AVX,SANDYBRIDGE,LONG 
-VPMOVMSKB        reg32,xmmreg             AVX,SANDYBRIDGE 
-VPMOVSXBW        xmmreg,xmmrm64           AVX,SANDYBRIDGE 
-VPMOVSXBD        xmmreg,xmmrm32           AVX,SANDYBRIDGE 
-VPMOVSXBQ        xmmreg,xmmrm16           AVX,SANDYBRIDGE 
-VPMOVSXWD        xmmreg,xmmrm64           AVX,SANDYBRIDGE 
-VPMOVSXWQ        xmmreg,xmmrm32           AVX,SANDYBRIDGE 
-VPMOVSXDQ        xmmreg,xmmrm64           AVX,SANDYBRIDGE 
-VPMOVZXBW        xmmreg,xmmrm64           AVX,SANDYBRIDGE 
-VPMOVZXBD        xmmreg,xmmrm32           AVX,SANDYBRIDGE 
-VPMOVZXBQ        xmmreg,xmmrm16           AVX,SANDYBRIDGE 
-VPMOVZXWD        xmmreg,xmmrm64           AVX,SANDYBRIDGE 
-VPMOVZXWQ        xmmreg,xmmrm32           AVX,SANDYBRIDGE 
-VPMOVZXDQ        xmmreg,xmmrm64           AVX,SANDYBRIDGE 
-VPMULHUW         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPMULHRSW        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPMULHW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPMULLW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPMULLD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPMULUDQ         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPMULDQ          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPOR             xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPSADBW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPSHUFB          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPSHUFD          xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE 
-VPSHUFHW         xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE 
-VPSHUFLW         xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE 
-VPSIGNB          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPSIGNW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPSIGND          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPSLLDQ          xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE 
-VPSRLDQ          xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE 
-VPSLLW           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPSLLW           xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE 
-VPSLLD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPSLLD           xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE 
-VPSLLQ           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPSLLQ           xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE 
-VPSRAW           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPSRAW           xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE 
-VPSRAD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPSRAD           xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE 
-VPSRLW           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPSRLW           xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE 
-VPSRLD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPSRLD           xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE 
-VPSRLQ           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPSRLQ           xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE 
-VPTEST           xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-VPTEST           ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-VPSUBB           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPSUBW           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPSUBD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPSUBQ           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPSUBSB          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPSUBSW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPSUBUSB         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPSUBUSW         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPUNPCKHBW       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPUNPCKHWD       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPUNPCKHDQ       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPUNPCKHQDQ      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPUNPCKLBW       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPUNPCKLWD       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPUNPCKLDQ       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPUNPCKLQDQ      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPXOR            xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VRCPPS           xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-VRCPPS           ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-VRCPSS           xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE 
-VRSQRTPS         xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-VRSQRTPS         ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-VRSQRTSS         xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE 
-VROUNDPD         xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE 
-VROUNDPD         ymmreg,ymmrm256,imm8     AVX,SANDYBRIDGE 
-VROUNDPS         xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE 
-VROUNDPS         ymmreg,ymmrm256,imm8     AVX,SANDYBRIDGE 
-VROUNDSD         xmmreg,xmmreg*,xmmrm64,imm8 AVX,SANDYBRIDGE 
-VROUNDSS         xmmreg,xmmreg*,xmmrm32,imm8 AVX,SANDYBRIDGE 
-VSHUFPD          xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-VSHUFPD          ymmreg,ymmreg*,ymmrm256,imm8 AVX,SANDYBRIDGE 
-VSHUFPS          xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-VSHUFPS          ymmreg,ymmreg*,ymmrm256,imm8 AVX,SANDYBRIDGE 
-VSQRTPD          xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-VSQRTPD          ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-VSQRTPS          xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-VSQRTPS          ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-VSQRTSD          xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VSQRTSS          xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE 
-VSTMXCSR         mem32                    AVX,SANDYBRIDGE 
-VSUBPD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VSUBPD           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VSUBPS           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VSUBPS           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VSUBSD           xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-VSUBSS           xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE 
-VTESTPS          xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-VTESTPS          ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-VTESTPD          xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-VTESTPD          ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-VUCOMISD         xmmreg,xmmrm64           AVX,SANDYBRIDGE 
-VUCOMISS         xmmreg,xmmrm32           AVX,SANDYBRIDGE 
-VUNPCKHPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VUNPCKHPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VUNPCKHPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VUNPCKHPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VUNPCKLPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VUNPCKLPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VUNPCKLPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VUNPCKLPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VXORPD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VXORPD           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VXORPS           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VXORPS           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-VZEROALL                                  AVX,SANDYBRIDGE 
-VZEROUPPER                                AVX,SANDYBRIDGE
-</pre>
-<h4 id="section-F.1.28">F.1.28 Intel Carry-Less Multiplication instructions (CLMUL)</h4>
-<pre>
-PCLMULLQLQDQ     xmmreg,xmmrm128          SSE,WESTMERE 
-PCLMULHQLQDQ     xmmreg,xmmrm128          SSE,WESTMERE 
-PCLMULLQHQDQ     xmmreg,xmmrm128          SSE,WESTMERE 
-PCLMULHQHQDQ     xmmreg,xmmrm128          SSE,WESTMERE 
-PCLMULQDQ        xmmreg,xmmrm128,imm8     SSE,WESTMERE
-</pre>
-<h4 id="section-F.1.29">F.1.29 Intel AVX Carry-Less Multiplication instructions (CLMUL)</h4>
-<pre>
-VPCLMULLQLQDQ    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPCLMULHQLQDQ    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPCLMULLQHQDQ    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPCLMULHQHQDQ    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-VPCLMULQDQ       xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-VPCLMULLQLQDQ    ymmreg,ymmreg*,ymmrm256  VPCLMULQDQ 
-VPCLMULHQLQDQ    ymmreg,ymmreg*,ymmrm256  VPCLMULQDQ 
-VPCLMULLQHQDQ    ymmreg,ymmreg*,ymmrm256  VPCLMULQDQ 
-VPCLMULHQHQDQ    ymmreg,ymmreg*,ymmrm256  VPCLMULQDQ 
-VPCLMULQDQ       ymmreg,ymmreg*,ymmrm256,imm8 VPCLMULQDQ 
-VPCLMULLQLQDQ    xmmreg,xmmreg*,xmmrm128  AVX512VL,VPCLMULQDQ 
-VPCLMULHQLQDQ    xmmreg,xmmreg*,xmmrm128  AVX512VL,VPCLMULQDQ 
-VPCLMULLQHQDQ    xmmreg,xmmreg*,xmmrm128  AVX512VL,VPCLMULQDQ 
-VPCLMULHQHQDQ    xmmreg,xmmreg*,xmmrm128  AVX512VL,VPCLMULQDQ 
-VPCLMULQDQ       xmmreg,xmmreg*,xmmrm128,imm8 AVX512VL,VPCLMULQDQ 
-VPCLMULLQLQDQ    ymmreg,ymmreg*,ymmrm256  AVX512VL,VPCLMULQDQ 
-VPCLMULHQLQDQ    ymmreg,ymmreg*,ymmrm256  AVX512VL,VPCLMULQDQ 
-VPCLMULLQHQDQ    ymmreg,ymmreg*,ymmrm256  AVX512VL,VPCLMULQDQ 
-VPCLMULHQHQDQ    ymmreg,ymmreg*,ymmrm256  AVX512VL,VPCLMULQDQ 
-VPCLMULQDQ       ymmreg,ymmreg*,ymmrm256,imm8 AVX512VL,VPCLMULQDQ 
-VPCLMULLQLQDQ    zmmreg,zmmreg*,zmmrm512  AVX512,VPCLMULQDQ 
-VPCLMULHQLQDQ    zmmreg,zmmreg*,zmmrm512  AVX512,VPCLMULQDQ 
-VPCLMULLQHQDQ    zmmreg,zmmreg*,zmmrm512  AVX512,VPCLMULQDQ 
-VPCLMULHQHQDQ    zmmreg,zmmreg*,zmmrm512  AVX512,VPCLMULQDQ 
-VPCLMULQDQ       zmmreg,zmmreg*,zmmrm512,imm8 AVX512,VPCLMULQDQ
-</pre>
-<h4 id="section-F.1.30">F.1.30 Intel Fused Multiply-Add instructions (FMA)</h4>
-<pre>
-VFMADD132PS      xmmreg,xmmreg,xmmrm128   FMA 
-VFMADD132PS      ymmreg,ymmreg,ymmrm256   FMA 
-VFMADD132PD      xmmreg,xmmreg,xmmrm128   FMA 
-VFMADD132PD      ymmreg,ymmreg,ymmrm256   FMA 
-VFMADD312PS      xmmreg,xmmreg,xmmrm128   FMA 
-VFMADD312PS      ymmreg,ymmreg,ymmrm256   FMA 
-VFMADD312PD      xmmreg,xmmreg,xmmrm128   FMA 
-VFMADD312PD      ymmreg,ymmreg,ymmrm256   FMA 
-VFMADD213PS      xmmreg,xmmreg,xmmrm128   FMA 
-VFMADD213PS      ymmreg,ymmreg,ymmrm256   FMA 
-VFMADD213PD      xmmreg,xmmreg,xmmrm128   FMA 
-VFMADD213PD      ymmreg,ymmreg,ymmrm256   FMA 
-VFMADD123PS      xmmreg,xmmreg,xmmrm128   FMA 
-VFMADD123PS      ymmreg,ymmreg,ymmrm256   FMA 
-VFMADD123PD      xmmreg,xmmreg,xmmrm128   FMA 
-VFMADD123PD      ymmreg,ymmreg,ymmrm256   FMA 
-VFMADD231PS      xmmreg,xmmreg,xmmrm128   FMA 
-VFMADD231PS      ymmreg,ymmreg,ymmrm256   FMA 
-VFMADD231PD      xmmreg,xmmreg,xmmrm128   FMA 
-VFMADD231PD      ymmreg,ymmreg,ymmrm256   FMA 
-VFMADD321PS      xmmreg,xmmreg,xmmrm128   FMA 
-VFMADD321PS      ymmreg,ymmreg,ymmrm256   FMA 
-VFMADD321PD      xmmreg,xmmreg,xmmrm128   FMA 
-VFMADD321PD      ymmreg,ymmreg,ymmrm256   FMA 
-VFMADDSUB132PS   xmmreg,xmmreg,xmmrm128   FMA 
-VFMADDSUB132PS   ymmreg,ymmreg,ymmrm256   FMA 
-VFMADDSUB132PD   xmmreg,xmmreg,xmmrm128   FMA 
-VFMADDSUB132PD   ymmreg,ymmreg,ymmrm256   FMA 
-VFMADDSUB312PS   xmmreg,xmmreg,xmmrm128   FMA 
-VFMADDSUB312PS   ymmreg,ymmreg,ymmrm256   FMA 
-VFMADDSUB312PD   xmmreg,xmmreg,xmmrm128   FMA 
-VFMADDSUB312PD   ymmreg,ymmreg,ymmrm256   FMA 
-VFMADDSUB213PS   xmmreg,xmmreg,xmmrm128   FMA 
-VFMADDSUB213PS   ymmreg,ymmreg,ymmrm256   FMA 
-VFMADDSUB213PD   xmmreg,xmmreg,xmmrm128   FMA 
-VFMADDSUB213PD   ymmreg,ymmreg,ymmrm256   FMA 
-VFMADDSUB123PS   xmmreg,xmmreg,xmmrm128   FMA 
-VFMADDSUB123PS   ymmreg,ymmreg,ymmrm256   FMA 
-VFMADDSUB123PD   xmmreg,xmmreg,xmmrm128   FMA 
-VFMADDSUB123PD   ymmreg,ymmreg,ymmrm256   FMA 
-VFMADDSUB231PS   xmmreg,xmmreg,xmmrm128   FMA 
-VFMADDSUB231PS   ymmreg,ymmreg,ymmrm256   FMA 
-VFMADDSUB231PD   xmmreg,xmmreg,xmmrm128   FMA 
-VFMADDSUB231PD   ymmreg,ymmreg,ymmrm256   FMA 
-VFMADDSUB321PS   xmmreg,xmmreg,xmmrm128   FMA 
-VFMADDSUB321PS   ymmreg,ymmreg,ymmrm256   FMA 
-VFMADDSUB321PD   xmmreg,xmmreg,xmmrm128   FMA 
-VFMADDSUB321PD   ymmreg,ymmreg,ymmrm256   FMA 
-VFMSUB132PS      xmmreg,xmmreg,xmmrm128   FMA 
-VFMSUB132PS      ymmreg,ymmreg,ymmrm256   FMA 
-VFMSUB132PD      xmmreg,xmmreg,xmmrm128   FMA 
-VFMSUB132PD      ymmreg,ymmreg,ymmrm256   FMA 
-VFMSUB312PS      xmmreg,xmmreg,xmmrm128   FMA 
-VFMSUB312PS      ymmreg,ymmreg,ymmrm256   FMA 
-VFMSUB312PD      xmmreg,xmmreg,xmmrm128   FMA 
-VFMSUB312PD      ymmreg,ymmreg,ymmrm256   FMA 
-VFMSUB213PS      xmmreg,xmmreg,xmmrm128   FMA 
-VFMSUB213PS      ymmreg,ymmreg,ymmrm256   FMA 
-VFMSUB213PD      xmmreg,xmmreg,xmmrm128   FMA 
-VFMSUB213PD      ymmreg,ymmreg,ymmrm256   FMA 
-VFMSUB123PS      xmmreg,xmmreg,xmmrm128   FMA 
-VFMSUB123PS      ymmreg,ymmreg,ymmrm256   FMA 
-VFMSUB123PD      xmmreg,xmmreg,xmmrm128   FMA 
-VFMSUB123PD      ymmreg,ymmreg,ymmrm256   FMA 
-VFMSUB231PS      xmmreg,xmmreg,xmmrm128   FMA 
-VFMSUB231PS      ymmreg,ymmreg,ymmrm256   FMA 
-VFMSUB231PD      xmmreg,xmmreg,xmmrm128   FMA 
-VFMSUB231PD      ymmreg,ymmreg,ymmrm256   FMA 
-VFMSUB321PS      xmmreg,xmmreg,xmmrm128   FMA 
-VFMSUB321PS      ymmreg,ymmreg,ymmrm256   FMA 
-VFMSUB321PD      xmmreg,xmmreg,xmmrm128   FMA 
-VFMSUB321PD      ymmreg,ymmreg,ymmrm256   FMA 
-VFMSUBADD132PS   xmmreg,xmmreg,xmmrm128   FMA 
-VFMSUBADD132PS   ymmreg,ymmreg,ymmrm256   FMA 
-VFMSUBADD132PD   xmmreg,xmmreg,xmmrm128   FMA 
-VFMSUBADD132PD   ymmreg,ymmreg,ymmrm256   FMA 
-VFMSUBADD312PS   xmmreg,xmmreg,xmmrm128   FMA 
-VFMSUBADD312PS   ymmreg,ymmreg,ymmrm256   FMA 
-VFMSUBADD312PD   xmmreg,xmmreg,xmmrm128   FMA 
-VFMSUBADD312PD   ymmreg,ymmreg,ymmrm256   FMA 
-VFMSUBADD213PS   xmmreg,xmmreg,xmmrm128   FMA 
-VFMSUBADD213PS   ymmreg,ymmreg,ymmrm256   FMA 
-VFMSUBADD213PD   xmmreg,xmmreg,xmmrm128   FMA 
-VFMSUBADD213PD   ymmreg,ymmreg,ymmrm256   FMA 
-VFMSUBADD123PS   xmmreg,xmmreg,xmmrm128   FMA 
-VFMSUBADD123PS   ymmreg,ymmreg,ymmrm256   FMA 
-VFMSUBADD123PD   xmmreg,xmmreg,xmmrm128   FMA 
-VFMSUBADD123PD   ymmreg,ymmreg,ymmrm256   FMA 
-VFMSUBADD231PS   xmmreg,xmmreg,xmmrm128   FMA 
-VFMSUBADD231PS   ymmreg,ymmreg,ymmrm256   FMA 
-VFMSUBADD231PD   xmmreg,xmmreg,xmmrm128   FMA 
-VFMSUBADD231PD   ymmreg,ymmreg,ymmrm256   FMA 
-VFMSUBADD321PS   xmmreg,xmmreg,xmmrm128   FMA 
-VFMSUBADD321PS   ymmreg,ymmreg,ymmrm256   FMA 
-VFMSUBADD321PD   xmmreg,xmmreg,xmmrm128   FMA 
-VFMSUBADD321PD   ymmreg,ymmreg,ymmrm256   FMA 
-VFNMADD132PS     xmmreg,xmmreg,xmmrm128   FMA 
-VFNMADD132PS     ymmreg,ymmreg,ymmrm256   FMA 
-VFNMADD132PD     xmmreg,xmmreg,xmmrm128   FMA 
-VFNMADD132PD     ymmreg,ymmreg,ymmrm256   FMA 
-VFNMADD312PS     xmmreg,xmmreg,xmmrm128   FMA 
-VFNMADD312PS     ymmreg,ymmreg,ymmrm256   FMA 
-VFNMADD312PD     xmmreg,xmmreg,xmmrm128   FMA 
-VFNMADD312PD     ymmreg,ymmreg,ymmrm256   FMA 
-VFNMADD213PS     xmmreg,xmmreg,xmmrm128   FMA 
-VFNMADD213PS     ymmreg,ymmreg,ymmrm256   FMA 
-VFNMADD213PD     xmmreg,xmmreg,xmmrm128   FMA 
-VFNMADD213PD     ymmreg,ymmreg,ymmrm256   FMA 
-VFNMADD123PS     xmmreg,xmmreg,xmmrm128   FMA 
-VFNMADD123PS     ymmreg,ymmreg,ymmrm256   FMA 
-VFNMADD123PD     xmmreg,xmmreg,xmmrm128   FMA 
-VFNMADD123PD     ymmreg,ymmreg,ymmrm256   FMA 
-VFNMADD231PS     xmmreg,xmmreg,xmmrm128   FMA 
-VFNMADD231PS     ymmreg,ymmreg,ymmrm256   FMA 
-VFNMADD231PD     xmmreg,xmmreg,xmmrm128   FMA 
-VFNMADD231PD     ymmreg,ymmreg,ymmrm256   FMA 
-VFNMADD321PS     xmmreg,xmmreg,xmmrm128   FMA 
-VFNMADD321PS     ymmreg,ymmreg,ymmrm256   FMA 
-VFNMADD321PD     xmmreg,xmmreg,xmmrm128   FMA 
-VFNMADD321PD     ymmreg,ymmreg,ymmrm256   FMA 
-VFNMSUB132PS     xmmreg,xmmreg,xmmrm128   FMA 
-VFNMSUB132PS     ymmreg,ymmreg,ymmrm256   FMA 
-VFNMSUB132PD     xmmreg,xmmreg,xmmrm128   FMA 
-VFNMSUB132PD     ymmreg,ymmreg,ymmrm256   FMA 
-VFNMSUB312PS     xmmreg,xmmreg,xmmrm128   FMA 
-VFNMSUB312PS     ymmreg,ymmreg,ymmrm256   FMA 
-VFNMSUB312PD     xmmreg,xmmreg,xmmrm128   FMA 
-VFNMSUB312PD     ymmreg,ymmreg,ymmrm256   FMA 
-VFNMSUB213PS     xmmreg,xmmreg,xmmrm128   FMA 
-VFNMSUB213PS     ymmreg,ymmreg,ymmrm256   FMA 
-VFNMSUB213PD     xmmreg,xmmreg,xmmrm128   FMA 
-VFNMSUB213PD     ymmreg,ymmreg,ymmrm256   FMA 
-VFNMSUB123PS     xmmreg,xmmreg,xmmrm128   FMA 
-VFNMSUB123PS     ymmreg,ymmreg,ymmrm256   FMA 
-VFNMSUB123PD     xmmreg,xmmreg,xmmrm128   FMA 
-VFNMSUB123PD     ymmreg,ymmreg,ymmrm256   FMA 
-VFNMSUB231PS     xmmreg,xmmreg,xmmrm128   FMA 
-VFNMSUB231PS     ymmreg,ymmreg,ymmrm256   FMA 
-VFNMSUB231PD     xmmreg,xmmreg,xmmrm128   FMA 
-VFNMSUB231PD     ymmreg,ymmreg,ymmrm256   FMA 
-VFNMSUB321PS     xmmreg,xmmreg,xmmrm128   FMA 
-VFNMSUB321PS     ymmreg,ymmreg,ymmrm256   FMA 
-VFNMSUB321PD     xmmreg,xmmreg,xmmrm128   FMA 
-VFNMSUB321PD     ymmreg,ymmreg,ymmrm256   FMA 
-VFMADD132SS      xmmreg,xmmreg,xmmrm32    FMA 
-VFMADD132SD      xmmreg,xmmreg,xmmrm64    FMA 
-VFMADD312SS      xmmreg,xmmreg,xmmrm32    FMA 
-VFMADD312SD      xmmreg,xmmreg,xmmrm64    FMA 
-VFMADD213SS      xmmreg,xmmreg,xmmrm32    FMA 
-VFMADD213SD      xmmreg,xmmreg,xmmrm64    FMA 
-VFMADD123SS      xmmreg,xmmreg,xmmrm32    FMA 
-VFMADD123SD      xmmreg,xmmreg,xmmrm64    FMA 
-VFMADD231SS      xmmreg,xmmreg,xmmrm32    FMA 
-VFMADD231SD      xmmreg,xmmreg,xmmrm64    FMA 
-VFMADD321SS      xmmreg,xmmreg,xmmrm32    FMA 
-VFMADD321SD      xmmreg,xmmreg,xmmrm64    FMA 
-VFMSUB132SS      xmmreg,xmmreg,xmmrm32    FMA 
-VFMSUB132SD      xmmreg,xmmreg,xmmrm64    FMA 
-VFMSUB312SS      xmmreg,xmmreg,xmmrm32    FMA 
-VFMSUB312SD      xmmreg,xmmreg,xmmrm64    FMA 
-VFMSUB213SS      xmmreg,xmmreg,xmmrm32    FMA 
-VFMSUB213SD      xmmreg,xmmreg,xmmrm64    FMA 
-VFMSUB123SS      xmmreg,xmmreg,xmmrm32    FMA 
-VFMSUB123SD      xmmreg,xmmreg,xmmrm64    FMA 
-VFMSUB231SS      xmmreg,xmmreg,xmmrm32    FMA 
-VFMSUB231SD      xmmreg,xmmreg,xmmrm64    FMA 
-VFMSUB321SS      xmmreg,xmmreg,xmmrm32    FMA 
-VFMSUB321SD      xmmreg,xmmreg,xmmrm64    FMA 
-VFNMADD132SS     xmmreg,xmmreg,xmmrm32    FMA 
-VFNMADD132SD     xmmreg,xmmreg,xmmrm64    FMA 
-VFNMADD312SS     xmmreg,xmmreg,xmmrm32    FMA 
-VFNMADD312SD     xmmreg,xmmreg,xmmrm64    FMA 
-VFNMADD213SS     xmmreg,xmmreg,xmmrm32    FMA 
-VFNMADD213SD     xmmreg,xmmreg,xmmrm64    FMA 
-VFNMADD123SS     xmmreg,xmmreg,xmmrm32    FMA 
-VFNMADD123SD     xmmreg,xmmreg,xmmrm64    FMA 
-VFNMADD231SS     xmmreg,xmmreg,xmmrm32    FMA 
-VFNMADD231SD     xmmreg,xmmreg,xmmrm64    FMA 
-VFNMADD321SS     xmmreg,xmmreg,xmmrm32    FMA 
-VFNMADD321SD     xmmreg,xmmreg,xmmrm64    FMA 
-VFNMSUB132SS     xmmreg,xmmreg,xmmrm32    FMA 
-VFNMSUB132SD     xmmreg,xmmreg,xmmrm64    FMA 
-VFNMSUB312SS     xmmreg,xmmreg,xmmrm32    FMA 
-VFNMSUB312SD     xmmreg,xmmreg,xmmrm64    FMA 
-VFNMSUB213SS     xmmreg,xmmreg,xmmrm32    FMA 
-VFNMSUB213SD     xmmreg,xmmreg,xmmrm64    FMA 
-VFNMSUB123SS     xmmreg,xmmreg,xmmrm32    FMA 
-VFNMSUB123SD     xmmreg,xmmreg,xmmrm64    FMA 
-VFNMSUB231SS     xmmreg,xmmreg,xmmrm32    FMA 
-VFNMSUB231SD     xmmreg,xmmreg,xmmrm64    FMA 
-VFNMSUB321SS     xmmreg,xmmreg,xmmrm32    FMA 
-VFNMSUB321SD     xmmreg,xmmreg,xmmrm64    FMA
-</pre>
-<h4 id="section-F.1.31">F.1.31 Intel post-32 nm processor instructions</h4>
-<pre>
-RDFSBASE         reg32                    LONG 
-RDFSBASE         reg64                    LONG 
-RDGSBASE         reg32                    LONG 
-RDGSBASE         reg64                    LONG 
-RDRAND           reg16                     
-RDRAND           reg32                     
-RDRAND           reg64                    LONG 
-WRFSBASE         reg32                    LONG 
-WRFSBASE         reg64                    LONG 
-WRGSBASE         reg32                    LONG 
-WRGSBASE         reg64                    LONG 
-VCVTPH2PS        ymmreg,xmmrm128          AVX 
-VCVTPH2PS        xmmreg,xmmrm64           AVX 
-VCVTPS2PH        xmmrm128,ymmreg,imm8     AVX 
-VCVTPS2PH        xmmrm64,xmmreg,imm8      AVX 
-ADCX             reg32,rm32                
-ADCX             reg64,rm64               LONG 
-ADOX             reg32,rm32                
-ADOX             reg64,rm64               LONG 
-RDSEED           reg16                     
-RDSEED           reg32                     
-RDSEED           reg64                    LONG 
-CLAC                                      PRIV 
-STAC                                      PRIV
-</pre>
-<h4 id="section-F.1.32">F.1.32 VIA (Centaur) security instructions</h4>
-<pre>
-XSTORE                                    PENT,CYRIX 
-XCRYPTECB                                 PENT,CYRIX 
-XCRYPTCBC                                 PENT,CYRIX 
-XCRYPTCTR                                 PENT,CYRIX 
-XCRYPTCFB                                 PENT,CYRIX 
-XCRYPTOFB                                 PENT,CYRIX 
-MONTMUL                                   PENT,CYRIX 
-XSHA1                                     PENT,CYRIX 
-XSHA256                                   PENT,CYRIX
-</pre>
-<h4 id="section-F.1.33">F.1.33 AMD Lightweight Profiling (LWP) instructions</h4>
-<pre>
-LLWPCB           reg32                    AMD,386 
-LLWPCB           reg64                    AMD,X86_64,LONG 
-SLWPCB           reg32                    AMD,386 
-SLWPCB           reg64                    AMD,X86_64,LONG 
-LWPVAL           reg32,rm32,imm32         AMD,386 
-LWPVAL           reg64,rm32,imm32         AMD,X86_64,LONG 
-LWPINS           reg32,rm32,imm32         AMD,386 
-LWPINS           reg64,rm32,imm32         AMD,X86_64,LONG
-</pre>
-<h4 id="section-F.1.34">F.1.34 AMD XOP and FMA4 instructions (SSE5)</h4>
-<pre>
-VFMADDPD         xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VFMADDPD         ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-VFMADDPD         xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-VFMADDPD         ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-VFMADDPS         xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VFMADDPS         ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-VFMADDPS         xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-VFMADDPS         ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-VFMADDSD         xmmreg,xmmreg*,xmmrm64,xmmreg AMD,SSE5 
-VFMADDSD         xmmreg,xmmreg*,xmmreg,xmmrm64 AMD,SSE5 
-VFMADDSS         xmmreg,xmmreg*,xmmrm32,xmmreg AMD,SSE5 
-VFMADDSS         xmmreg,xmmreg*,xmmreg,xmmrm32 AMD,SSE5 
-VFMADDSUBPD      xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VFMADDSUBPD      ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-VFMADDSUBPD      xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-VFMADDSUBPD      ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-VFMADDSUBPS      xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VFMADDSUBPS      ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-VFMADDSUBPS      xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-VFMADDSUBPS      ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-VFMSUBADDPD      xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VFMSUBADDPD      ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-VFMSUBADDPD      xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-VFMSUBADDPD      ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-VFMSUBADDPS      xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VFMSUBADDPS      ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-VFMSUBADDPS      xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-VFMSUBADDPS      ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-VFMSUBPD         xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VFMSUBPD         ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-VFMSUBPD         xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-VFMSUBPD         ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-VFMSUBPS         xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VFMSUBPS         ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-VFMSUBPS         xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-VFMSUBPS         ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-VFMSUBSD         xmmreg,xmmreg*,xmmrm64,xmmreg AMD,SSE5 
-VFMSUBSD         xmmreg,xmmreg*,xmmreg,xmmrm64 AMD,SSE5 
-VFMSUBSS         xmmreg,xmmreg*,xmmrm32,xmmreg AMD,SSE5 
-VFMSUBSS         xmmreg,xmmreg*,xmmreg,xmmrm32 AMD,SSE5 
-VFNMADDPD        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VFNMADDPD        ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-VFNMADDPD        xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-VFNMADDPD        ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-VFNMADDPS        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VFNMADDPS        ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-VFNMADDPS        xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-VFNMADDPS        ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-VFNMADDSD        xmmreg,xmmreg*,xmmrm64,xmmreg AMD,SSE5 
-VFNMADDSD        xmmreg,xmmreg*,xmmreg,xmmrm64 AMD,SSE5 
-VFNMADDSS        xmmreg,xmmreg*,xmmrm32,xmmreg AMD,SSE5 
-VFNMADDSS        xmmreg,xmmreg*,xmmreg,xmmrm32 AMD,SSE5 
-VFNMSUBPD        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VFNMSUBPD        ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-VFNMSUBPD        xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-VFNMSUBPD        ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-VFNMSUBPS        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VFNMSUBPS        ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-VFNMSUBPS        xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-VFNMSUBPS        ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-VFNMSUBSD        xmmreg,xmmreg*,xmmrm64,xmmreg AMD,SSE5 
-VFNMSUBSD        xmmreg,xmmreg*,xmmreg,xmmrm64 AMD,SSE5 
-VFNMSUBSS        xmmreg,xmmreg*,xmmrm32,xmmreg AMD,SSE5 
-VFNMSUBSS        xmmreg,xmmreg*,xmmreg,xmmrm32 AMD,SSE5 
-VFRCZPD          xmmreg,xmmrm128*         AMD,SSE5 
-VFRCZPD          ymmreg,ymmrm256*         AMD,SSE5 
-VFRCZPS          xmmreg,xmmrm128*         AMD,SSE5 
-VFRCZPS          ymmreg,ymmrm256*         AMD,SSE5 
-VFRCZSD          xmmreg,xmmrm64*          AMD,SSE5 
-VFRCZSS          xmmreg,xmmrm32*          AMD,SSE5 
-VPCMOV           xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VPCMOV           ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-VPCMOV           xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-VPCMOV           ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-VPCOMB           xmmreg,xmmreg*,xmmrm128,imm8 AMD,SSE5 
-VPCOMD           xmmreg,xmmreg*,xmmrm128,imm8 AMD,SSE5 
-VPCOMQ           xmmreg,xmmreg*,xmmrm128,imm8 AMD,SSE5 
-VPCOMUB          xmmreg,xmmreg*,xmmrm128,imm8 AMD,SSE5 
-VPCOMUD          xmmreg,xmmreg*,xmmrm128,imm8 AMD,SSE5 
-VPCOMUQ          xmmreg,xmmreg*,xmmrm128,imm8 AMD,SSE5 
-VPCOMUW          xmmreg,xmmreg*,xmmrm128,imm8 AMD,SSE5 
-VPCOMW           xmmreg,xmmreg*,xmmrm128,imm8 AMD,SSE5 
-VPHADDBD         xmmreg,xmmrm128*         AMD,SSE5 
-VPHADDBQ         xmmreg,xmmrm128*         AMD,SSE5 
-VPHADDBW         xmmreg,xmmrm128*         AMD,SSE5 
-VPHADDDQ         xmmreg,xmmrm128*         AMD,SSE5 
-VPHADDUBD        xmmreg,xmmrm128*         AMD,SSE5 
-VPHADDUBQ        xmmreg,xmmrm128*         AMD,SSE5 
-VPHADDUBW        xmmreg,xmmrm128*         AMD,SSE5 
-VPHADDUDQ        xmmreg,xmmrm128*         AMD,SSE5 
-VPHADDUWD        xmmreg,xmmrm128*         AMD,SSE5 
-VPHADDUWQ        xmmreg,xmmrm128*         AMD,SSE5 
-VPHADDWD         xmmreg,xmmrm128*         AMD,SSE5 
-VPHADDWQ         xmmreg,xmmrm128*         AMD,SSE5 
-VPHSUBBW         xmmreg,xmmrm128*         AMD,SSE5 
-VPHSUBDQ         xmmreg,xmmrm128*         AMD,SSE5 
-VPHSUBWD         xmmreg,xmmrm128*         AMD,SSE5 
-VPMACSDD         xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VPMACSDQH        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VPMACSDQL        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VPMACSSDD        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VPMACSSDQH       xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VPMACSSDQL       xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VPMACSSWD        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VPMACSSWW        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VPMACSWD         xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VPMACSWW         xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VPMADCSSWD       xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VPMADCSWD        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VPPERM           xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-VPPERM           xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-VPROTB           xmmreg,xmmrm128*,xmmreg  AMD,SSE5 
-VPROTB           xmmreg,xmmreg*,xmmrm128  AMD,SSE5 
-VPROTB           xmmreg,xmmrm128*,imm8    AMD,SSE5 
-VPROTD           xmmreg,xmmrm128*,xmmreg  AMD,SSE5 
-VPROTD           xmmreg,xmmreg*,xmmrm128  AMD,SSE5 
-VPROTD           xmmreg,xmmrm128*,imm8    AMD,SSE5 
-VPROTQ           xmmreg,xmmrm128*,xmmreg  AMD,SSE5 
-VPROTQ           xmmreg,xmmreg*,xmmrm128  AMD,SSE5 
-VPROTQ           xmmreg,xmmrm128*,imm8    AMD,SSE5 
-VPROTW           xmmreg,xmmrm128*,xmmreg  AMD,SSE5 
-VPROTW           xmmreg,xmmreg*,xmmrm128  AMD,SSE5 
-VPROTW           xmmreg,xmmrm128*,imm8    AMD,SSE5 
-VPSHAB           xmmreg,xmmrm128*,xmmreg  AMD,SSE5 
-VPSHAB           xmmreg,xmmreg*,xmmrm128  AMD,SSE5 
-VPSHAD           xmmreg,xmmrm128*,xmmreg  AMD,SSE5 
-VPSHAD           xmmreg,xmmreg*,xmmrm128  AMD,SSE5 
-VPSHAQ           xmmreg,xmmrm128*,xmmreg  AMD,SSE5 
-VPSHAQ           xmmreg,xmmreg*,xmmrm128  AMD,SSE5 
-VPSHAW           xmmreg,xmmrm128*,xmmreg  AMD,SSE5 
-VPSHAW           xmmreg,xmmreg*,xmmrm128  AMD,SSE5 
-VPSHLB           xmmreg,xmmrm128*,xmmreg  AMD,SSE5 
-VPSHLB           xmmreg,xmmreg*,xmmrm128  AMD,SSE5 
-VPSHLD           xmmreg,xmmrm128*,xmmreg  AMD,SSE5 
-VPSHLD           xmmreg,xmmreg*,xmmrm128  AMD,SSE5 
-VPSHLQ           xmmreg,xmmrm128*,xmmreg  AMD,SSE5 
-VPSHLQ           xmmreg,xmmreg*,xmmrm128  AMD,SSE5 
-VPSHLW           xmmreg,xmmrm128*,xmmreg  AMD,SSE5 
-VPSHLW           xmmreg,xmmreg*,xmmrm128  AMD,SSE5
-</pre>
-<h4 id="section-F.1.35">F.1.35 Intel AVX2 instructions</h4>
-<pre>
-VMPSADBW         ymmreg,ymmreg*,ymmrm256,imm8 AVX2 
-VPABSB           ymmreg,ymmrm256          AVX2 
-VPABSW           ymmreg,ymmrm256          AVX2 
-VPABSD           ymmreg,ymmrm256          AVX2 
-VPACKSSWB        ymmreg,ymmreg*,ymmrm256  AVX2 
-VPACKSSDW        ymmreg,ymmreg*,ymmrm256  AVX2 
-VPACKUSDW        ymmreg,ymmreg*,ymmrm256  AVX2 
-VPACKUSWB        ymmreg,ymmreg*,ymmrm256  AVX2 
-VPADDB           ymmreg,ymmreg*,ymmrm256  AVX2 
-VPADDW           ymmreg,ymmreg*,ymmrm256  AVX2 
-VPADDD           ymmreg,ymmreg*,ymmrm256  AVX2 
-VPADDQ           ymmreg,ymmreg*,ymmrm256  AVX2 
-VPADDSB          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPADDSW          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPADDUSB         ymmreg,ymmreg*,ymmrm256  AVX2 
-VPADDUSW         ymmreg,ymmreg*,ymmrm256  AVX2 
-VPALIGNR         ymmreg,ymmreg*,ymmrm256,imm8 AVX2 
-VPAND            ymmreg,ymmreg*,ymmrm256  AVX2 
-VPANDN           ymmreg,ymmreg*,ymmrm256  AVX2 
-VPAVGB           ymmreg,ymmreg*,ymmrm256  AVX2 
-VPAVGW           ymmreg,ymmreg*,ymmrm256  AVX2 
-VPBLENDVB        ymmreg,ymmreg*,ymmrm256,ymmreg AVX2 
-VPBLENDW         ymmreg,ymmreg*,ymmrm256,imm8 AVX2 
-VPCMPEQB         ymmreg,ymmreg*,ymmrm256  AVX2 
-VPCMPEQW         ymmreg,ymmreg*,ymmrm256  AVX2 
-VPCMPEQD         ymmreg,ymmreg*,ymmrm256  AVX2 
-VPCMPEQQ         ymmreg,ymmreg*,ymmrm256  AVX2 
-VPCMPGTB         ymmreg,ymmreg*,ymmrm256  AVX2 
-VPCMPGTW         ymmreg,ymmreg*,ymmrm256  AVX2 
-VPCMPGTD         ymmreg,ymmreg*,ymmrm256  AVX2 
-VPCMPGTQ         ymmreg,ymmreg*,ymmrm256  AVX2 
-VPHADDW          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPHADDD          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPHADDSW         ymmreg,ymmreg*,ymmrm256  AVX2 
-VPHSUBW          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPHSUBD          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPHSUBSW         ymmreg,ymmreg*,ymmrm256  AVX2 
-VPMADDUBSW       ymmreg,ymmreg*,ymmrm256  AVX2 
-VPMADDWD         ymmreg,ymmreg*,ymmrm256  AVX2 
-VPMAXSB          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPMAXSW          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPMAXSD          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPMAXUB          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPMAXUW          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPMAXUD          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPMINSB          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPMINSW          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPMINSD          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPMINUB          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPMINUW          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPMINUD          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPMOVMSKB        reg32,ymmreg             AVX2 
-VPMOVMSKB        reg64,ymmreg             AVX2 
-VPMOVSXBW        ymmreg,xmmrm128          AVX2 
-VPMOVSXBD        ymmreg,mem64             AVX2 
-VPMOVSXBD        ymmreg,xmmreg            AVX2 
-VPMOVSXBQ        ymmreg,mem32             AVX2 
-VPMOVSXBQ        ymmreg,xmmreg            AVX2 
-VPMOVSXWD        ymmreg,xmmrm128          AVX2 
-VPMOVSXWQ        ymmreg,mem64             AVX2 
-VPMOVSXWQ        ymmreg,xmmreg            AVX2 
-VPMOVSXDQ        ymmreg,xmmrm128          AVX2 
-VPMOVZXBW        ymmreg,xmmrm128          AVX2 
-VPMOVZXBD        ymmreg,mem64             AVX2 
-VPMOVZXBD        ymmreg,xmmreg            AVX2 
-VPMOVZXBQ        ymmreg,mem32             AVX2 
-VPMOVZXBQ        ymmreg,xmmreg            AVX2 
-VPMOVZXWD        ymmreg,xmmrm128          AVX2 
-VPMOVZXWQ        ymmreg,mem64             AVX2 
-VPMOVZXWQ        ymmreg,xmmreg            AVX2 
-VPMOVZXDQ        ymmreg,xmmrm128          AVX2 
-VPMULDQ          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPMULHRSW        ymmreg,ymmreg*,ymmrm256  AVX2 
-VPMULHUW         ymmreg,ymmreg*,ymmrm256  AVX2 
-VPMULHW          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPMULLW          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPMULLD          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPMULUDQ         ymmreg,ymmreg*,ymmrm256  AVX2 
-VPOR             ymmreg,ymmreg*,ymmrm256  AVX2 
-VPSADBW          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPSHUFB          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPSHUFD          ymmreg,ymmrm256,imm8     AVX2 
-VPSHUFHW         ymmreg,ymmrm256,imm8     AVX2 
-VPSHUFLW         ymmreg,ymmrm256,imm8     AVX2 
-VPSIGNB          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPSIGNW          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPSIGND          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPSLLDQ          ymmreg,ymmreg*,imm8      AVX2 
-VPSLLW           ymmreg,ymmreg*,xmmrm128  AVX2 
-VPSLLW           ymmreg,ymmreg*,imm8      AVX2 
-VPSLLD           ymmreg,ymmreg*,xmmrm128  AVX2 
-VPSLLD           ymmreg,ymmreg*,imm8      AVX2 
-VPSLLQ           ymmreg,ymmreg*,xmmrm128  AVX2 
-VPSLLQ           ymmreg,ymmreg*,imm8      AVX2 
-VPSRAW           ymmreg,ymmreg*,xmmrm128  AVX2 
-VPSRAW           ymmreg,ymmreg*,imm8      AVX2 
-VPSRAD           ymmreg,ymmreg*,xmmrm128  AVX2 
-VPSRAD           ymmreg,ymmreg*,imm8      AVX2 
-VPSRLDQ          ymmreg,ymmreg*,imm8      AVX2 
-VPSRLW           ymmreg,ymmreg*,xmmrm128  AVX2 
-VPSRLW           ymmreg,ymmreg*,imm8      AVX2 
-VPSRLD           ymmreg,ymmreg*,xmmrm128  AVX2 
-VPSRLD           ymmreg,ymmreg*,imm8      AVX2 
-VPSRLQ           ymmreg,ymmreg*,xmmrm128  AVX2 
-VPSRLQ           ymmreg,ymmreg*,imm8      AVX2 
-VPSUBB           ymmreg,ymmreg*,ymmrm256  AVX2 
-VPSUBW           ymmreg,ymmreg*,ymmrm256  AVX2 
-VPSUBD           ymmreg,ymmreg*,ymmrm256  AVX2 
-VPSUBQ           ymmreg,ymmreg*,ymmrm256  AVX2 
-VPSUBSB          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPSUBSW          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPSUBUSB         ymmreg,ymmreg*,ymmrm256  AVX2 
-VPSUBUSW         ymmreg,ymmreg*,ymmrm256  AVX2 
-VPUNPCKHBW       ymmreg,ymmreg*,ymmrm256  AVX2 
-VPUNPCKHWD       ymmreg,ymmreg*,ymmrm256  AVX2 
-VPUNPCKHDQ       ymmreg,ymmreg*,ymmrm256  AVX2 
-VPUNPCKHQDQ      ymmreg,ymmreg*,ymmrm256  AVX2 
-VPUNPCKLBW       ymmreg,ymmreg*,ymmrm256  AVX2 
-VPUNPCKLWD       ymmreg,ymmreg*,ymmrm256  AVX2 
-VPUNPCKLDQ       ymmreg,ymmreg*,ymmrm256  AVX2 
-VPUNPCKLQDQ      ymmreg,ymmreg*,ymmrm256  AVX2 
-VPXOR            ymmreg,ymmreg*,ymmrm256  AVX2 
-VMOVNTDQA        ymmreg,mem256            AVX2 
-VBROADCASTSS     xmmreg,xmmreg            AVX2 
-VBROADCASTSS     ymmreg,xmmreg            AVX2 
-VBROADCASTSD     ymmreg,xmmreg            AVX2 
-VBROADCASTI128   ymmreg,mem128            AVX2 
-VPBLENDD         xmmreg,xmmreg*,xmmrm128,imm8 AVX2 
-VPBLENDD         ymmreg,ymmreg*,ymmrm256,imm8 AVX2 
-VPBROADCASTB     xmmreg,mem8              AVX2 
-VPBROADCASTB     xmmreg,xmmreg            AVX2 
-VPBROADCASTB     ymmreg,mem8              AVX2 
-VPBROADCASTB     ymmreg,xmmreg            AVX2 
-VPBROADCASTW     xmmreg,mem16             AVX2 
-VPBROADCASTW     xmmreg,xmmreg            AVX2 
-VPBROADCASTW     ymmreg,mem16             AVX2 
-VPBROADCASTW     ymmreg,xmmreg            AVX2 
-VPBROADCASTD     xmmreg,mem32             AVX2 
-VPBROADCASTD     xmmreg,xmmreg            AVX2 
-VPBROADCASTD     ymmreg,mem32             AVX2 
-VPBROADCASTD     ymmreg,xmmreg            AVX2 
-VPBROADCASTQ     xmmreg,mem64             AVX2 
-VPBROADCASTQ     xmmreg,xmmreg            AVX2 
-VPBROADCASTQ     ymmreg,mem64             AVX2 
-VPBROADCASTQ     ymmreg,xmmreg            AVX2 
-VPERMD           ymmreg,ymmreg*,ymmrm256  AVX2 
-VPERMPD          ymmreg,ymmrm256,imm8     AVX2 
-VPERMPS          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPERMQ           ymmreg,ymmrm256,imm8     AVX2 
-VPERM2I128       ymmreg,ymmreg*,ymmrm256,imm8 AVX2 
-VEXTRACTI128     xmmrm128,ymmreg,imm8     AVX2 
-VINSERTI128      ymmreg,ymmreg*,xmmrm128,imm8 AVX2 
-VPMASKMOVD       xmmreg,xmmreg*,mem128    AVX2 
-VPMASKMOVD       ymmreg,ymmreg*,mem256    AVX2 
-VPMASKMOVQ       xmmreg,xmmreg*,mem128    AVX2 
-VPMASKMOVQ       ymmreg,ymmreg*,mem256    AVX2 
-VPMASKMOVD       mem128,xmmreg*,xmmreg    AVX2 
-VPMASKMOVD       mem256,ymmreg*,ymmreg    AVX2 
-VPMASKMOVQ       mem128,xmmreg*,xmmreg    AVX2 
-VPMASKMOVQ       mem256,ymmreg*,ymmreg    AVX2 
-VPSLLVD          xmmreg,xmmreg*,xmmrm128  AVX2 
-VPSLLVQ          xmmreg,xmmreg*,xmmrm128  AVX2 
-VPSLLVD          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPSLLVQ          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPSRAVD          xmmreg,xmmreg*,xmmrm128  AVX2 
-VPSRAVD          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPSRLVD          xmmreg,xmmreg*,xmmrm128  AVX2 
-VPSRLVQ          xmmreg,xmmreg*,xmmrm128  AVX2 
-VPSRLVD          ymmreg,ymmreg*,ymmrm256  AVX2 
-VPSRLVQ          ymmreg,ymmreg*,ymmrm256  AVX2 
-VGATHERDPD       xmmreg,xmem64,xmmreg     AVX2 
-VGATHERQPD       xmmreg,xmem64,xmmreg     AVX2 
-VGATHERDPD       ymmreg,xmem64,ymmreg     AVX2 
-VGATHERQPD       ymmreg,ymem64,ymmreg     AVX2 
-VGATHERDPS       xmmreg,xmem32,xmmreg     AVX2 
-VGATHERQPS       xmmreg,xmem32,xmmreg     AVX2 
-VGATHERDPS       ymmreg,ymem32,ymmreg     AVX2 
-VGATHERQPS       xmmreg,ymem32,xmmreg     AVX2 
-VPGATHERDD       xmmreg,xmem32,xmmreg     AVX2 
-VPGATHERQD       xmmreg,xmem32,xmmreg     AVX2 
-VPGATHERDD       ymmreg,ymem32,ymmreg     AVX2 
-VPGATHERQD       xmmreg,ymem32,xmmreg     AVX2 
-VPGATHERDQ       xmmreg,xmem64,xmmreg     AVX2 
-VPGATHERQQ       xmmreg,xmem64,xmmreg     AVX2 
-VPGATHERDQ       ymmreg,xmem64,ymmreg     AVX2 
-VPGATHERQQ       ymmreg,ymem64,ymmreg     AVX2
-</pre>
-<h4 id="section-F.1.36">F.1.36 Intel Transactional Synchronization Extensions (TSX)</h4>
-<pre>
-XABORT           imm                      RTM 
-XABORT           imm8                     RTM 
-XBEGIN           imm                      RTM 
-XBEGIN           imm|near                 RTM,ND 
-XBEGIN           imm16                    RTM,NOLONG 
-XBEGIN           imm16|near               RTM,NOLONG,ND 
-XBEGIN           imm32                    RTM,NOLONG 
-XBEGIN           imm32|near               RTM,NOLONG,ND 
-XBEGIN           imm64                    RTM,LONG 
-XBEGIN           imm64|near               RTM,LONG,ND 
-XEND                                      RTM 
-XTEST                                     HLE,RTM
-</pre>
-<h4 id="section-F.1.37">F.1.37 Intel BMI1 and BMI2 instructions, AMD TBM instructions</h4>
-<pre>
-ANDN             reg32,reg32,rm32         BMI1 
-ANDN             reg64,reg64,rm64         LONG,BMI1 
-BEXTR            reg32,rm32,reg32         BMI1 
-BEXTR            reg64,rm64,reg64         LONG,BMI1 
-BEXTR            reg32,rm32,imm32         TBM 
-BEXTR            reg64,rm64,imm32         LONG,TBM 
-BLCI             reg32,rm32               TBM 
-BLCI             reg64,rm64               LONG,TBM 
-BLCIC            reg32,rm32               TBM 
-BLCIC            reg64,rm64               LONG,TBM 
-BLSI             reg32,rm32               BMI1 
-BLSI             reg64,rm64               LONG,BMI1 
-BLSIC            reg32,rm32               TBM 
-BLSIC            reg64,rm64               LONG,TBM 
-BLCFILL          reg32,rm32               TBM 
-BLCFILL          reg64,rm64               LONG,TBM 
-BLSFILL          reg32,rm32               TBM 
-BLSFILL          reg64,rm64               LONG,TBM 
-BLCMSK           reg32,rm32               TBM 
-BLCMSK           reg64,rm64               LONG,TBM 
-BLSMSK           reg32,rm32               BMI1 
-BLSMSK           reg64,rm64               LONG,BMI1 
-BLSR             reg32,rm32               BMI1 
-BLSR             reg64,rm64               LONG,BMI1 
-BLCS             reg32,rm32               TBM 
-BLCS             reg64,rm64               LONG,TBM 
-BZHI             reg32,rm32,reg32         BMI2 
-BZHI             reg64,rm64,reg64         LONG,BMI2 
-MULX             reg32,reg32,rm32         BMI2 
-MULX             reg64,reg64,rm64         LONG,BMI2 
-PDEP             reg32,reg32,rm32         BMI2 
-PDEP             reg64,reg64,rm64         LONG,BMI2 
-PEXT             reg32,reg32,rm32         BMI2 
-PEXT             reg64,reg64,rm64         LONG,BMI2 
-RORX             reg32,rm32,imm8          BMI2 
-RORX             reg64,rm64,imm8          LONG,BMI2 
-SARX             reg32,rm32,reg32         BMI2 
-SARX             reg64,rm64,reg64         LONG,BMI2 
-SHLX             reg32,rm32,reg32         BMI2 
-SHLX             reg64,rm64,reg64         LONG,BMI2 
-SHRX             reg32,rm32,reg32         BMI2 
-SHRX             reg64,rm64,reg64         LONG,BMI2 
-TZCNT            reg16,rm16               BMI1 
-TZCNT            reg32,rm32               BMI1 
-TZCNT            reg64,rm64               LONG,BMI1 
-TZMSK            reg32,rm32               TBM 
-TZMSK            reg64,rm64               LONG,TBM 
-T1MSKC           reg32,rm32               TBM 
-T1MSKC           reg64,rm64               LONG,TBM 
-PREFETCHWT1      mem8                     PREFETCHWT1
-</pre>
-<h4 id="section-F.1.38">F.1.38 Intel Memory Protection Extensions (MPX)</h4>
-<pre>
-BNDMK            bndreg,mem               MPX,MIB 
-BNDCL            bndreg,mem               MPX 
-BNDCL            bndreg,reg32             MPX,NOLONG 
-BNDCL            bndreg,reg64             MPX,LONG 
-BNDCU            bndreg,mem               MPX 
-BNDCU            bndreg,reg32             MPX,NOLONG 
-BNDCU            bndreg,reg64             MPX,LONG 
-BNDCN            bndreg,mem               MPX 
-BNDCN            bndreg,reg32             MPX,NOLONG 
-BNDCN            bndreg,reg64             MPX,LONG 
-BNDMOV           bndreg,bndreg            MPX 
-BNDMOV           bndreg,mem               MPX 
-BNDMOV           bndreg,bndreg            MPX 
-BNDMOV           mem,bndreg               MPX 
-BNDLDX           bndreg,mem               MPX,MIB 
-BNDLDX           bndreg,mem,reg32         MPX,MIB,NOLONG 
-BNDLDX           bndreg,mem,reg64         MPX,MIB,LONG 
-BNDSTX           mem,bndreg               MPX,MIB 
-BNDSTX           mem,reg32,bndreg         MPX,MIB,NOLONG 
-BNDSTX           mem,reg64,bndreg         MPX,MIB,LONG 
-BNDSTX           mem,bndreg,reg32         MPX,MIB,NOLONG 
-BNDSTX           mem,bndreg,reg64         MPX,MIB,LONG
-</pre>
-<h4 id="section-F.1.39">F.1.39 Intel SHA acceleration instructions</h4>
-<pre>
-SHA1MSG1         xmmreg,xmmrm128          SHA 
-SHA1MSG2         xmmreg,xmmrm128          SHA 
-SHA1NEXTE        xmmreg,xmmrm128          SHA 
-SHA1RNDS4        xmmreg,xmmrm128,imm8     SHA 
-SHA256MSG1       xmmreg,xmmrm128          SHA 
-SHA256MSG2       xmmreg,xmmrm128          SHA 
-SHA256RNDS2      xmmreg,xmmrm128,xmm0     SHA 
-SHA256RNDS2      xmmreg,xmmrm128          SHA
-</pre>
-<h4 id="section-F.1.40">F.1.40 AVX no exception conversions</h4>
-<pre>
-VBCSTNEBF16PS    xmmreg,mem16             AVXNECONVERT,LATEVEX,SW 
-VBCSTNEBF16PS    ymmreg,mem16             AVXNECONVERT,LATEVEX,SW 
-VBCSTNESH2PS     xmmreg,mem16             AVXNECONVERT,LATEVEX,SW 
-VBCSTNESH2PS     ymmreg,mem16             AVXNECONVERT,LATEVEX,SW 
-VCVTNEEBF162PS   xmmreg,mem128            AVXNECONVERT,LATEVEX,SX 
-VCVTNEEBF162PS   ymmreg,mem256            AVXNECONVERT,LATEVEX,SY 
-VCVTNEEPH2PS     xmmreg,mem128            AVXNECONVERT,LATEVEX,SX 
-VCVTNEEPH2PS     ymmreg,mem256            AVXNECONVERT,LATEVEX,SY 
-VCVTNEOBF162PS   xmmreg,mem128            AVXNECONVERT,LATEVEX,SX 
-VCVTNEOBF162PS   ymmreg,mem256            AVXNECONVERT,LATEVEX,SY 
-VCVTNEOPH2PS     xmmreg,mem128            AVXNECONVERT,LATEVEX,SX 
-VCVTNEOPH2PS     ymmreg,mem256            AVXNECONVERT,LATEVEX,SY 
-VCVTNEPS2BF16    xmmreg,xmmrm128          AVXNECONVERT,LATEVEX,SX 
-VCVTNEPS2BF16    ymmreg,ymmrm256          AVXNECONVERT,LATEVEX,SY
-</pre>
-<h4 id="section-F.1.41">F.1.41 AVX Vector Neural Network Instructions</h4>
-<pre>
-VPDPBSSD         xmmreg,xmmreg,xmmrm128   AVXVNNIINT8,LATEVEX,SX 
-VPDPBSSD         ymmreg,ymmreg,ymmrm256   AVXVNNIINT8,LATEVEX,SY 
-VPDPBSSDS        xmmreg,xmmreg,xmmrm128   AVXVNNIINT8,LATEVEX,SX 
-VPDPBSSDS        ymmreg,ymmreg,ymmrm256   AVXVNNIINT8,LATEVEX,SY 
-VPDPBSUD         xmmreg,xmmreg,xmmrm128   AVXVNNIINT8,LATEVEX,SX 
-VPDPBSUD         ymmreg,ymmreg,ymmrm256   AVXVNNIINT8,LATEVEX,SY 
-VPDPBSUDS        xmmreg,xmmreg,xmmrm128   AVXVNNIINT8,LATEVEX,SX 
-VPDPBSUDS        ymmreg,ymmreg,ymmrm256   AVXVNNIINT8,LATEVEX,SY 
-VPDPBUUD         xmmreg,xmmreg,xmmrm128   AVXVNNIINT8,LATEVEX,SX 
-VPDPBUUD         ymmreg,ymmreg,ymmrm256   AVXVNNIINT8,LATEVEX,SY 
-VPDPBUUDS        xmmreg,xmmreg,xmmrm128   AVXVNNIINT8,LATEVEX,SX 
-VPDPBUUDS        ymmreg,ymmreg,ymmrm256   AVXVNNIINT8,LATEVEX,SY
-</pre>
-<h4 id="section-F.1.42">F.1.42 AVX Integer Fused Multiply-Add</h4>
-<pre>
-VPMADD52HUQ      xmmreg,xmmreg,xmmrm128   AVXIFMA,LATEVEX,SX 
-VPMADD52HUQ      ymmreg,ymmreg,ymmrm256   AVXIFMA,LATEVEX,SY 
-VPMADD52LUQ      xmmreg,xmmreg,xmmrm128   AVXIFMA,LATEVEX,SX 
-VPMADD52LUQ      ymmreg,ymmreg,ymmrm256   AVXIFMA,LATEVEX,SY
-</pre>
-<h4 id="section-F.1.43">F.1.43 AVX-512 mask register instructions</h4>
-<pre>
-KADDB            kreg,kreg,kreg            
-KADDD            kreg,kreg,kreg            
-KADDQ            kreg,kreg,kreg            
-KADDW            kreg,kreg,kreg            
-KANDB            kreg,kreg,kreg            
-KANDD            kreg,kreg,kreg            
-KANDNB           kreg,kreg,kreg            
-KANDND           kreg,kreg,kreg            
-KANDNQ           kreg,kreg,kreg            
-KANDNW           kreg,kreg,kreg            
-KANDQ            kreg,kreg,kreg            
-KANDW            kreg,kreg,kreg            
-KMOVB            kreg,krm8                 
-KMOVB            mem8,kreg                 
-KMOVB            kreg,reg32                
-KMOVB            kreg,reg8                ND 
-KMOVB            reg32,kreg                
-KMOVD            kreg,krm32                
-KMOVD            mem32,kreg                
-KMOVD            kreg,reg32                
-KMOVD            reg32,kreg                
-KMOVQ            kreg,krm64                
-KMOVQ            mem64,kreg                
-KMOVQ            kreg,reg64                
-KMOVQ            reg64,kreg                
-KMOVW            kreg,krm16                
-KMOVW            mem16,kreg                
-KMOVW            kreg,reg32                
-KMOVW            kreg,reg16               ND 
-KMOVW            reg32,kreg                
-KNOTB            kreg,kreg                 
-KNOTD            kreg,kreg                 
-KNOTQ            kreg,kreg                 
-KNOTW            kreg,kreg                 
-KORB             kreg,kreg,kreg            
-KORD             kreg,kreg,kreg            
-KORQ             kreg,kreg,kreg            
-KORW             kreg,kreg,kreg            
-KORTESTB         kreg,kreg                 
-KORTESTD         kreg,kreg                 
-KORTESTQ         kreg,kreg                 
-KORTESTW         kreg,kreg                 
-KSHIFTLB         kreg,kreg,imm8            
-KSHIFTLD         kreg,kreg,imm8            
-KSHIFTLQ         kreg,kreg,imm8            
-KSHIFTLW         kreg,kreg,imm8            
-KSHIFTRB         kreg,kreg,imm8            
-KSHIFTRD         kreg,kreg,imm8            
-KSHIFTRQ         kreg,kreg,imm8            
-KSHIFTRW         kreg,kreg,imm8            
-KTESTB           kreg,kreg                 
-KTESTD           kreg,kreg                 
-KTESTQ           kreg,kreg                 
-KTESTW           kreg,kreg                 
-KUNPCKBW         kreg,kreg,kreg            
-KUNPCKDQ         kreg,kreg,kreg            
-KUNPCKWD         kreg,kreg,kreg            
-KXNORB           kreg,kreg,kreg            
-KXNORD           kreg,kreg,kreg            
-KXNORQ           kreg,kreg,kreg            
-KXNORW           kreg,kreg,kreg            
-KXORB            kreg,kreg,kreg            
-KXORD            kreg,kreg,kreg            
-KXORQ            kreg,kreg,kreg            
-KXORW            kreg,kreg,kreg           
-</pre>
-<h4 id="section-F.1.44">F.1.44 AVX-512 mask register instructions (aliases requiring explicit size support)</h4>
-<pre>
-KADD             kreg8,kreg,kreg          ND 
-KADD             kreg32,kreg,kreg         ND 
-KADD             kreg64,kreg,kreg         ND 
-KADD             kreg16,kreg,kreg         ND 
-KAND             kreg8,kreg,kreg          ND 
-KAND             kreg32,kreg,kreg         ND 
-KANDN            kreg64,kreg,kreg         ND 
-KANDN            kreg16,kreg,kreg         ND 
-KANDN            kreg8,kreg,kreg          ND 
-KANDN            kreg32,kreg,kreg         ND 
-KAND             kreg64,kreg,kreg         ND 
-KAND             kreg16,kreg,kreg         ND 
-KMOV             kreg8,krm8               ND 
-KMOV             mem8,kreg8               ND 
-KMOV             kreg8,reg32              ND,SX 
-KMOV             kreg8,reg8               ND 
-KMOV             reg32,kreg8              ND,SX 
-KMOV             kreg32,krm32             ND 
-KMOV             mem32,kreg32             ND 
-KMOV             kreg32,reg32             ND 
-KMOV             reg32,kreg32             ND 
-KMOV             kreg64,krm64             ND 
-KMOV             mem64,kreg64             ND 
-KMOV             kreg64,reg64             ND 
-KMOV             reg64,kreg64             ND 
-KMOV             kreg16,krm16             ND 
-KMOV             mem16,kreg16             ND 
-KMOV             kreg16,reg32             ND,SX 
-KMOV             reg32,kreg16             ND,SX 
-KMOV             kreg16,reg32             ND,SX 
-KMOV             kreg16,reg16             ND 
-KNOT             kreg8,kreg8              ND 
-KNOT             kreg32,kreg32            ND 
-KNOT             kreg64,kreg64            ND 
-KNOT             kreg16,kreg16            ND 
-KOR              kreg8,kreg,kreg          ND 
-KOR              kreg32,kreg,kreg         ND 
-KOR              kreg64,kreg,kreg         ND 
-KOR              kreg16,kreg,kreg         ND 
-KORTEST          kreg8,kreg               ND 
-KORTEST          kreg32,kreg              ND 
-KORTEST          kreg64,kreg              ND 
-KORTEST          kreg16,kreg              ND 
-KSHIFTL          kreg8,kreg,imm8          ND 
-KSHIFTL          kreg32,kreg,imm8         ND 
-KSHIFTL          kreg64,kreg,imm8         ND 
-KSHIFTL          kreg16,kreg,imm8         ND 
-KSHIFTR          kreg8,kreg,imm8          ND 
-KSHIFTR          kreg32,kreg,imm8         ND 
-KSHIFTR          kreg64,kreg,imm8         ND 
-KSHIFTR          kreg16,kreg,imm8         ND 
-KTEST            kreg8,kreg               ND 
-KTEST            kreg32,kreg              ND 
-KTEST            kreg64,kreg              ND 
-KTEST            kreg16,kreg              ND 
-KUNPCK           kreg16,kreg8,kreg8       ND 
-KUNPCK           kreg64,kreg32,kreg32     ND 
-KUNPCK           kreg32,kreg16,kreg16     ND 
-KXNOR            kreg8,kreg,kreg          ND 
-KXNOR            kreg32,kreg,kreg         ND 
-KXNOR            kreg64,kreg,kreg         ND 
-KXNOR            kreg16,kreg,kreg         ND 
-KXOR             kreg8,kreg,kreg          ND 
-KXOR             kreg32,kreg,kreg         ND 
-KXOR             kreg64,kreg,kreg         ND 
-KXOR             kreg16,kreg,kreg         ND
-</pre>
-<h4 id="section-F.1.45">F.1.45 AVX-512 instructions</h4>
-<pre>
-VADDPD           xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VADDPD           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VADDPD           zmmreg|mask|z,zmmreg*,zmmrm512|b64|er AVX512 
-VADDPS           xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VADDPS           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VADDPS           zmmreg|mask|z,zmmreg*,zmmrm512|b32|er AVX512 
-VADDSD           xmmreg|mask|z,xmmreg*,xmmrm64|er AVX512 
-VADDSS           xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512 
-VALIGND          xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 AVX512VL 
-VALIGND          ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 AVX512VL 
-VALIGND          zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 AVX512 
-VALIGNQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 AVX512VL 
-VALIGNQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VL 
-VALIGNQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 AVX512 
-VANDNPD          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL/DQ 
-VANDNPD          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL/DQ 
-VANDNPD          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512DQ 
-VANDNPS          xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL/DQ 
-VANDNPS          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL/DQ 
-VANDNPS          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512DQ 
-VANDPD           xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL/DQ 
-VANDPD           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL/DQ 
-VANDPD           zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512DQ 
-VANDPS           xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL/DQ 
-VANDPS           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL/DQ 
-VANDPS           zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512DQ 
-VBLENDMPD        xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-VBLENDMPD        ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-VBLENDMPD        zmmreg|mask|z,zmmreg,zmmrm512|b64 AVX512 
-VBLENDMPS        xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-VBLENDMPS        ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-VBLENDMPS        zmmreg|mask|z,zmmreg,zmmrm512|b32 AVX512 
-VBROADCASTF32X2  ymmreg|mask|z,xmmrm64    AVX512VL/DQ 
-VBROADCASTF32X2  zmmreg|mask|z,xmmrm64    AVX512DQ 
-VBROADCASTF32X4  ymmreg|mask|z,mem128     AVX512VL 
-VBROADCASTF32X4  zmmreg|mask|z,mem128     AVX512 
-VBROADCASTF32X8  zmmreg|mask|z,mem256     AVX512DQ 
-VBROADCASTF64X2  ymmreg|mask|z,mem128     AVX512VL/DQ 
-VBROADCASTF64X2  zmmreg|mask|z,mem128     AVX512DQ 
-VBROADCASTF64X4  zmmreg|mask|z,mem256     AVX512 
-VBROADCASTI32X2  xmmreg|mask|z,xmmrm64    AVX512VL/DQ 
-VBROADCASTI32X2  ymmreg|mask|z,xmmrm64    AVX512VL/DQ 
-VBROADCASTI32X2  zmmreg|mask|z,xmmrm64    AVX512DQ 
-VBROADCASTI32X4  ymmreg|mask|z,mem128     AVX512VL 
-VBROADCASTI32X4  zmmreg|mask|z,mem128     AVX512 
-VBROADCASTI32X8  zmmreg|mask|z,mem256     AVX512DQ 
-VBROADCASTI64X2  ymmreg|mask|z,mem128     AVX512VL/DQ 
-VBROADCASTI64X2  zmmreg|mask|z,mem128     AVX512DQ 
-VBROADCASTI64X4  zmmreg|mask|z,mem256     AVX512 
-VBROADCASTSD     ymmreg|mask|z,mem64      AVX512VL 
-VBROADCASTSD     zmmreg|mask|z,mem64      AVX512 
-VBROADCASTSD     ymmreg|mask|z,xmmreg     AVX512VL 
-VBROADCASTSD     zmmreg|mask|z,xmmreg     AVX512 
-VBROADCASTSS     xmmreg|mask|z,mem32      AVX512VL 
-VBROADCASTSS     ymmreg|mask|z,mem32      AVX512VL 
-VBROADCASTSS     zmmreg|mask|z,mem32      AVX512 
-VBROADCASTSS     xmmreg|mask|z,xmmreg     AVX512VL 
-VBROADCASTSS     ymmreg|mask|z,xmmreg     AVX512VL 
-VBROADCASTSS     zmmreg|mask|z,xmmreg     AVX512 
-VCMPEQPD         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPEQPD         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPEQPD         kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPEQPS         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPEQPS         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPEQPS         kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPEQSD         kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPEQSS         kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPEQ_OQPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPEQ_OQPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPEQ_OQPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPEQ_OQPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPEQ_OQPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPEQ_OQPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPEQ_OQSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPEQ_OQSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPLTPD         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPLTPD         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPLTPD         kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPLTPS         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPLTPS         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPLTPS         kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPLTSD         kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPLTSS         kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPLT_OSPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPLT_OSPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPLT_OSPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPLT_OSPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPLT_OSPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPLT_OSPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPLT_OSSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPLT_OSSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPLEPD         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPLEPD         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPLEPD         kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPLEPS         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPLEPS         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPLEPS         kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPLESD         kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPLESS         kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPLE_OSPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPLE_OSPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPLE_OSPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPLE_OSPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPLE_OSPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPLE_OSPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPLE_OSSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPLE_OSSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPUNORDPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPUNORDPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPUNORDPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPUNORDPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPUNORDPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPUNORDPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPUNORDSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPUNORDSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPUNORD_QPD    kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPUNORD_QPD    kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPUNORD_QPD    kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPUNORD_QPS    kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPUNORD_QPS    kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPUNORD_QPS    kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPUNORD_QSD    kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPUNORD_QSS    kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPNEQPD        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPNEQPD        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPNEQPD        kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPNEQPS        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPNEQPS        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPNEQPS        kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPNEQSD        kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPNEQSS        kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPNEQ_UQPD     kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPNEQ_UQPD     kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPNEQ_UQPD     kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPNEQ_UQPS     kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPNEQ_UQPS     kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPNEQ_UQPS     kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPNEQ_UQSD     kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPNEQ_UQSS     kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPNLTPD        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPNLTPD        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPNLTPD        kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPNLTPS        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPNLTPS        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPNLTPS        kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPNLTSD        kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPNLTSS        kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPNLT_USPD     kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPNLT_USPD     kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPNLT_USPD     kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPNLT_USPS     kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPNLT_USPS     kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPNLT_USPS     kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPNLT_USSD     kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPNLT_USSS     kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPNLEPD        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPNLEPD        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPNLEPD        kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPNLEPS        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPNLEPS        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPNLEPS        kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPNLESD        kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPNLESS        kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPNLE_USPD     kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPNLE_USPD     kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPNLE_USPD     kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPNLE_USPS     kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPNLE_USPS     kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPNLE_USPS     kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPNLE_USSD     kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPNLE_USSS     kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPORDPD        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPORDPD        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPORDPD        kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPORDPS        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPORDPS        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPORDPS        kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPORDSD        kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPORDSS        kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPORD_QPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPORD_QPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPORD_QPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPORD_QPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPORD_QPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPORD_QPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPORD_QSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPORD_QSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPEQ_UQPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPEQ_UQPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPEQ_UQPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPEQ_UQPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPEQ_UQPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPEQ_UQPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPEQ_UQSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPEQ_UQSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPNGEPD        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPNGEPD        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPNGEPD        kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPNGEPS        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPNGEPS        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPNGEPS        kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPNGESD        kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPNGESS        kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPNGE_USPD     kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPNGE_USPD     kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPNGE_USPD     kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPNGE_USPS     kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPNGE_USPS     kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPNGE_USPS     kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPNGE_USSD     kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPNGE_USSS     kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPNGTPD        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPNGTPD        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPNGTPD        kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPNGTPS        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPNGTPS        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPNGTPS        kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPNGTSD        kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPNGTSS        kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPNGT_USPD     kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPNGT_USPD     kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPNGT_USPD     kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPNGT_USPS     kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPNGT_USPS     kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPNGT_USPS     kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPNGT_USSD     kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPNGT_USSS     kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPFALSEPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPFALSEPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPFALSEPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPFALSEPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPFALSEPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPFALSEPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPFALSESD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPFALSESS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPFALSE_OQPD   kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPFALSE_OQPD   kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPFALSE_OQPD   kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPFALSE_OQPS   kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPFALSE_OQPS   kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPFALSE_OQPS   kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPFALSE_OQSD   kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPFALSE_OQSS   kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPNEQ_OQPD     kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPNEQ_OQPD     kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPNEQ_OQPD     kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPNEQ_OQPS     kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPNEQ_OQPS     kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPNEQ_OQPS     kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPNEQ_OQSD     kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPNEQ_OQSS     kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPGEPD         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPGEPD         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPGEPD         kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPGEPS         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPGEPS         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPGEPS         kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPGESD         kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPGESS         kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPGE_OSPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPGE_OSPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPGE_OSPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPGE_OSPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPGE_OSPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPGE_OSPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPGE_OSSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPGE_OSSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPGTPD         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPGTPD         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPGTPD         kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPGTPS         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPGTPS         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPGTPS         kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPGTSD         kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPGTSS         kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPGT_OSPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPGT_OSPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPGT_OSPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPGT_OSPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPGT_OSPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPGT_OSPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPGT_OSSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPGT_OSSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPTRUEPD       kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPTRUEPD       kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPTRUEPD       kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPTRUEPS       kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPTRUEPS       kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPTRUEPS       kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPTRUESD       kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPTRUESS       kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPTRUE_UQPD    kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPTRUE_UQPD    kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPTRUE_UQPD    kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPTRUE_UQPS    kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPTRUE_UQPS    kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPTRUE_UQPS    kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPTRUE_UQSD    kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPTRUE_UQSS    kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPEQ_OSPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPEQ_OSPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPEQ_OSPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPEQ_OSPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPEQ_OSPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPEQ_OSPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPEQ_OSSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPEQ_OSSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPLT_OQPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPLT_OQPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPLT_OQPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPLT_OQPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPLT_OQPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPLT_OQPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPLT_OQSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPLT_OQSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPLE_OQPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPLE_OQPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPLE_OQPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPLE_OQPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPLE_OQPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPLE_OQPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPLE_OQSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPLE_OQSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPUNORD_SPD    kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPUNORD_SPD    kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPUNORD_SPD    kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPUNORD_SPS    kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPUNORD_SPS    kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPUNORD_SPS    kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPUNORD_SSD    kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPUNORD_SSS    kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPNEQ_USPD     kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPNEQ_USPD     kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPNEQ_USPD     kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPNEQ_USPS     kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPNEQ_USPS     kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPNEQ_USPS     kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPNEQ_USSD     kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPNEQ_USSS     kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPNLT_UQPD     kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPNLT_UQPD     kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPNLT_UQPD     kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPNLT_UQPS     kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPNLT_UQPS     kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPNLT_UQPS     kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPNLT_UQSD     kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPNLT_UQSS     kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPNLE_UQPD     kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPNLE_UQPD     kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPNLE_UQPD     kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPNLE_UQPS     kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPNLE_UQPS     kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPNLE_UQPS     kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPNLE_UQSD     kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPNLE_UQSS     kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPORD_SPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPORD_SPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPORD_SPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPORD_SPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPORD_SPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPORD_SPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPORD_SSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPORD_SSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPEQ_USPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPEQ_USPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPEQ_USPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPEQ_USPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPEQ_USPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPEQ_USPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPEQ_USSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPEQ_USSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPNGE_UQPD     kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPNGE_UQPD     kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPNGE_UQPD     kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPNGE_UQPS     kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPNGE_UQPS     kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPNGE_UQPS     kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPNGE_UQSD     kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPNGE_UQSS     kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPNGT_UQPD     kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPNGT_UQPD     kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPNGT_UQPD     kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPNGT_UQPS     kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPNGT_UQPS     kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPNGT_UQPS     kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPNGT_UQSD     kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPNGT_UQSS     kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPFALSE_OSPD   kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPFALSE_OSPD   kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPFALSE_OSPD   kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPFALSE_OSPS   kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPFALSE_OSPS   kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPFALSE_OSPS   kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPFALSE_OSSD   kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPFALSE_OSSS   kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPNEQ_OSPD     kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPNEQ_OSPD     kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPNEQ_OSPD     kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPNEQ_OSPS     kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPNEQ_OSPS     kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPNEQ_OSPS     kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPNEQ_OSSD     kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPNEQ_OSSS     kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPGE_OQPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPGE_OQPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPGE_OQPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPGE_OQPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPGE_OQPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPGE_OQPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPGE_OQSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPGE_OQSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPGT_OQPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPGT_OQPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPGT_OQPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPGT_OQPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPGT_OQPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPGT_OQPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPGT_OQSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPGT_OQSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPTRUE_USPD    kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VCMPTRUE_USPD    kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VCMPTRUE_USPD    kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-VCMPTRUE_USPS    kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VCMPTRUE_USPS    kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VCMPTRUE_USPS    kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-VCMPTRUE_USSD    kreg|mask,xmmreg,xmmrm64|sae AVX512 
-VCMPTRUE_USSS    kreg|mask,xmmreg,xmmrm32|sae AVX512 
-VCMPPD           kreg|mask,xmmreg,xmmrm128|b64,imm8 AVX512VL 
-VCMPPD           kreg|mask,ymmreg,ymmrm256|b64,imm8 AVX512VL 
-VCMPPD           kreg|mask,zmmreg,zmmrm512|b64|sae,imm8 AVX512 
-VCMPPS           kreg|mask,xmmreg,xmmrm128|b32,imm8 AVX512VL 
-VCMPPS           kreg|mask,ymmreg,ymmrm256|b32,imm8 AVX512VL 
-VCMPPS           kreg|mask,zmmreg,zmmrm512|b32|sae,imm8 AVX512 
-VCMPSD           kreg|mask,xmmreg,xmmrm64|sae,imm8 AVX512 
-VCMPSS           kreg|mask,xmmreg,xmmrm32|sae,imm8 AVX512 
-VCOMISD          xmmreg,xmmrm64|sae       AVX512 
-VCOMISS          xmmreg,xmmrm32|sae       AVX512 
-VCOMPRESSPD      mem128|mask,xmmreg       AVX512VL 
-VCOMPRESSPD      mem256|mask,ymmreg       AVX512VL 
-VCOMPRESSPD      mem512|mask,zmmreg       AVX512 
-VCOMPRESSPD      xmmreg|mask|z,xmmreg     AVX512VL 
-VCOMPRESSPD      ymmreg|mask|z,ymmreg     AVX512VL 
-VCOMPRESSPD      zmmreg|mask|z,zmmreg     AVX512 
-VCOMPRESSPS      mem128|mask,xmmreg       AVX512VL 
-VCOMPRESSPS      mem256|mask,ymmreg       AVX512VL 
-VCOMPRESSPS      mem512|mask,zmmreg       AVX512 
-VCOMPRESSPS      xmmreg|mask|z,xmmreg     AVX512VL 
-VCOMPRESSPS      ymmreg|mask|z,ymmreg     AVX512VL 
-VCOMPRESSPS      zmmreg|mask|z,zmmreg     AVX512 
-VCVTDQ2PD        xmmreg|mask|z,xmmrm64|b32 AVX512VL 
-VCVTDQ2PD        ymmreg|mask|z,xmmrm128|b32 AVX512VL 
-VCVTDQ2PD        zmmreg|mask|z,ymmrm256|b32|er AVX512 
-VCVTDQ2PS        xmmreg|mask|z,xmmrm128|b32 AVX512VL 
-VCVTDQ2PS        ymmreg|mask|z,ymmrm256|b32 AVX512VL 
-VCVTDQ2PS        zmmreg|mask|z,zmmrm512|b32|er AVX512 
-VCVTPD2DQ        xmmreg|mask|z,xmmrm128|b64 AVX512VL 
-VCVTPD2DQ        xmmreg|mask|z,ymmrm256|b64 AVX512VL 
-VCVTPD2DQ        ymmreg|mask|z,zmmrm512|b64|er AVX512 
-VCVTPD2PS        xmmreg|mask|z,xmmrm128|b64 AVX512VL 
-VCVTPD2PS        xmmreg|mask|z,ymmrm256|b64 AVX512VL 
-VCVTPD2PS        ymmreg|mask|z,zmmrm512|b64|er AVX512 
-VCVTPD2QQ        xmmreg|mask|z,xmmrm128|b64 AVX512VL/DQ 
-VCVTPD2QQ        ymmreg|mask|z,ymmrm256|b64 AVX512VL/DQ 
-VCVTPD2QQ        zmmreg|mask|z,zmmrm512|b64|er AVX512DQ 
-VCVTPD2UDQ       xmmreg|mask|z,xmmrm128|b64 AVX512VL 
-VCVTPD2UDQ       xmmreg|mask|z,ymmrm256|b64 AVX512VL 
-VCVTPD2UDQ       ymmreg|mask|z,zmmrm512|b64|er AVX512 
-VCVTPD2UQQ       xmmreg|mask|z,xmmrm128|b64 AVX512VL/DQ 
-VCVTPD2UQQ       ymmreg|mask|z,ymmrm256|b64 AVX512VL/DQ 
-VCVTPD2UQQ       zmmreg|mask|z,zmmrm512|b64|er AVX512DQ 
-VCVTPH2PS        xmmreg|mask|z,xmmrm64    AVX512VL 
-VCVTPH2PS        ymmreg|mask|z,xmmrm128   AVX512VL 
-VCVTPH2PS        zmmreg|mask|z,ymmrm256|sae AVX512 
-VCVTPS2DQ        xmmreg|mask|z,xmmrm128|b32 AVX512VL 
-VCVTPS2DQ        ymmreg|mask|z,ymmrm256|b32 AVX512VL 
-VCVTPS2DQ        zmmreg|mask|z,zmmrm512|b32|er AVX512 
-VCVTPS2PD        xmmreg|mask|z,xmmrm64|b32 AVX512VL 
-VCVTPS2PD        ymmreg|mask|z,xmmrm128|b32 AVX512VL 
-VCVTPS2PD        zmmreg|mask|z,ymmrm256|b32|sae AVX512 
-VCVTPS2PH        xmmreg|mask|z,xmmreg,imm8 AVX512VL 
-VCVTPS2PH        xmmreg|mask|z,ymmreg,imm8 AVX512VL 
-VCVTPS2PH        ymmreg|mask|z,zmmreg|sae,imm8 AVX512 
-VCVTPS2PH        mem64|mask,xmmreg,imm8   AVX512VL 
-VCVTPS2PH        mem128|mask,ymmreg,imm8  AVX512VL 
-VCVTPS2PH        mem256|mask,zmmreg|sae,imm8 AVX512 
-VCVTPS2QQ        xmmreg|mask|z,xmmrm64|b32 AVX512VL/DQ 
-VCVTPS2QQ        ymmreg|mask|z,xmmrm128|b32 AVX512VL/DQ 
-VCVTPS2QQ        zmmreg|mask|z,ymmrm256|b32|er AVX512DQ 
-VCVTPS2UDQ       xmmreg|mask|z,xmmrm128|b32 AVX512VL 
-VCVTPS2UDQ       ymmreg|mask|z,ymmrm256|b32 AVX512VL 
-VCVTPS2UDQ       zmmreg|mask|z,zmmrm512|b32|er AVX512 
-VCVTPS2UQQ       xmmreg|mask|z,xmmrm64|b32 AVX512VL/DQ 
-VCVTPS2UQQ       ymmreg|mask|z,xmmrm128|b32 AVX512VL/DQ 
-VCVTPS2UQQ       zmmreg|mask|z,ymmrm256|b32|er AVX512DQ 
-VCVTQQ2PD        xmmreg|mask|z,xmmrm128|b64 AVX512VL/DQ 
-VCVTQQ2PD        ymmreg|mask|z,ymmrm256|b64 AVX512VL/DQ 
-VCVTQQ2PD        zmmreg|mask|z,zmmrm512|b64|er AVX512DQ 
-VCVTQQ2PS        xmmreg|mask|z,xmmrm128|b64 AVX512VL/DQ 
-VCVTQQ2PS        xmmreg|mask|z,ymmrm256|b64 AVX512VL/DQ 
-VCVTQQ2PS        ymmreg|mask|z,zmmrm512|b64|er AVX512DQ 
-VCVTSD2SI        reg32,xmmrm64|er         AVX512 
-VCVTSD2SI        reg64,xmmrm64|er         AVX512 
-VCVTSD2SS        xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-VCVTSD2USI       reg32,xmmrm64|er         AVX512 
-VCVTSD2USI       reg64,xmmrm64|er         AVX512 
-VCVTSI2SD        xmmreg,xmmreg|er,rm32    AVX512 
-VCVTSI2SD        xmmreg,xmmreg|er,rm64    AVX512 
-VCVTSI2SS        xmmreg,xmmreg|er,rm32    AVX512 
-VCVTSI2SS        xmmreg,xmmreg|er,rm64    AVX512 
-VCVTSS2SD        xmmreg|mask|z,xmmreg,xmmrm32|sae AVX512 
-VCVTSS2SI        reg32,xmmrm32|er         AVX512 
-VCVTSS2SI        reg64,xmmrm32|er         AVX512 
-VCVTSS2USI       reg32,xmmrm32|er         AVX512 
-VCVTSS2USI       reg64,xmmrm32|er         AVX512 
-VCVTTPD2DQ       xmmreg|mask|z,xmmrm128|b64 AVX512VL 
-VCVTTPD2DQ       xmmreg|mask|z,ymmrm256|b64 AVX512VL 
-VCVTTPD2DQ       ymmreg|mask|z,zmmrm512|b64|sae AVX512 
-VCVTTPD2QQ       xmmreg|mask|z,xmmrm128|b64 AVX512VL/DQ 
-VCVTTPD2QQ       ymmreg|mask|z,ymmrm256|b64 AVX512VL/DQ 
-VCVTTPD2QQ       zmmreg|mask|z,zmmrm512|b64|sae AVX512DQ 
-VCVTTPD2UDQ      xmmreg|mask|z,xmmrm128|b64 AVX512VL 
-VCVTTPD2UDQ      xmmreg|mask|z,ymmrm256|b64 AVX512VL 
-VCVTTPD2UDQ      ymmreg|mask|z,zmmrm512|b64|sae AVX512 
-VCVTTPD2UQQ      xmmreg|mask|z,xmmrm128|b64 AVX512VL/DQ 
-VCVTTPD2UQQ      ymmreg|mask|z,ymmrm256|b64 AVX512VL/DQ 
-VCVTTPD2UQQ      zmmreg|mask|z,zmmrm512|b64|sae AVX512DQ 
-VCVTTPS2DQ       xmmreg|mask|z,xmmrm128|b32 AVX512VL 
-VCVTTPS2DQ       ymmreg|mask|z,ymmrm256|b32 AVX512VL 
-VCVTTPS2DQ       zmmreg|mask|z,zmmrm512|b32|sae AVX512 
-VCVTTPS2QQ       xmmreg|mask|z,xmmrm64|b32 AVX512VL/DQ 
-VCVTTPS2QQ       ymmreg|mask|z,xmmrm128|b32 AVX512VL/DQ 
-VCVTTPS2QQ       zmmreg|mask|z,ymmrm256|b32|sae AVX512DQ 
-VCVTTPS2UDQ      xmmreg|mask|z,xmmrm128|b32 AVX512VL 
-VCVTTPS2UDQ      ymmreg|mask|z,ymmrm256|b32 AVX512VL 
-VCVTTPS2UDQ      zmmreg|mask|z,zmmrm512|b32|sae AVX512 
-VCVTTPS2UQQ      xmmreg|mask|z,xmmrm64|b32 AVX512VL/DQ 
-VCVTTPS2UQQ      ymmreg|mask|z,xmmrm128|b32 AVX512VL/DQ 
-VCVTTPS2UQQ      zmmreg|mask|z,ymmrm256|b32|sae AVX512DQ 
-VCVTTSD2SI       reg32,xmmrm64|sae        AVX512 
-VCVTTSD2SI       reg64,xmmrm64|sae        AVX512 
-VCVTTSD2USI      reg32,xmmrm64|sae        AVX512 
-VCVTTSD2USI      reg64,xmmrm64|sae        AVX512 
-VCVTTSS2SI       reg32,xmmrm32|sae        AVX512 
-VCVTTSS2SI       reg64,xmmrm32|sae        AVX512 
-VCVTTSS2USI      reg32,xmmrm32|sae        AVX512 
-VCVTTSS2USI      reg64,xmmrm32|sae        AVX512 
-VCVTUDQ2PD       xmmreg|mask|z,xmmrm64|b32 AVX512VL 
-VCVTUDQ2PD       ymmreg|mask|z,xmmrm128|b32 AVX512VL 
-VCVTUDQ2PD       zmmreg|mask|z,ymmrm256|b32|er AVX512 
-VCVTUDQ2PS       xmmreg|mask|z,xmmrm128|b32 AVX512VL 
-VCVTUDQ2PS       ymmreg|mask|z,ymmrm256|b32 AVX512VL 
-VCVTUDQ2PS       zmmreg|mask|z,zmmrm512|b32|er AVX512 
-VCVTUQQ2PD       xmmreg|mask|z,xmmrm128|b64 AVX512VL/DQ 
-VCVTUQQ2PD       ymmreg|mask|z,ymmrm256|b64 AVX512VL/DQ 
-VCVTUQQ2PD       zmmreg|mask|z,zmmrm512|b64|er AVX512DQ 
-VCVTUQQ2PS       xmmreg|mask|z,xmmrm128|b64 AVX512VL/DQ 
-VCVTUQQ2PS       xmmreg|mask|z,ymmrm256|b64 AVX512VL/DQ 
-VCVTUQQ2PS       ymmreg|mask|z,zmmrm512|b64|er AVX512DQ 
-VCVTUSI2SD       xmmreg,xmmreg|er,rm32    AVX512 
-VCVTUSI2SD       xmmreg,xmmreg|er,rm64    AVX512 
-VCVTUSI2SS       xmmreg,xmmreg|er,rm32    AVX512 
-VCVTUSI2SS       xmmreg,xmmreg|er,rm64    AVX512 
-VDBPSADBW        xmmreg|mask|z,xmmreg*,xmmrm128,imm8 AVX512VL/BW 
-VDBPSADBW        ymmreg|mask|z,ymmreg*,ymmrm256,imm8 AVX512VL/BW 
-VDBPSADBW        zmmreg|mask|z,zmmreg*,zmmrm512,imm8 AVX512BW 
-VDIVPD           xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VDIVPD           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VDIVPD           zmmreg|mask|z,zmmreg*,zmmrm512|b64|er AVX512 
-VDIVPS           xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VDIVPS           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VDIVPS           zmmreg|mask|z,zmmreg*,zmmrm512|b32|er AVX512 
-VDIVSD           xmmreg|mask|z,xmmreg*,xmmrm64|er AVX512 
-VDIVSS           xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512 
-VEXP2PD          zmmreg|mask|z,zmmrm512|b64|sae AVX512ER 
-VEXP2PS          zmmreg|mask|z,zmmrm512|b32|sae AVX512ER 
-VEXPANDPD        xmmreg|mask|z,mem128     AVX512VL 
-VEXPANDPD        ymmreg|mask|z,mem256     AVX512VL 
-VEXPANDPD        zmmreg|mask|z,mem512     AVX512 
-VEXPANDPD        xmmreg|mask|z,xmmreg     AVX512VL 
-VEXPANDPD        ymmreg|mask|z,ymmreg     AVX512VL 
-VEXPANDPD        zmmreg|mask|z,zmmreg     AVX512 
-VEXPANDPS        xmmreg|mask|z,mem128     AVX512VL 
-VEXPANDPS        ymmreg|mask|z,mem256     AVX512VL 
-VEXPANDPS        zmmreg|mask|z,mem512     AVX512 
-VEXPANDPS        xmmreg|mask|z,xmmreg     AVX512VL 
-VEXPANDPS        ymmreg|mask|z,ymmreg     AVX512VL 
-VEXPANDPS        zmmreg|mask|z,zmmreg     AVX512 
-VEXTRACTF32X4    xmmreg|mask|z,ymmreg,imm8 AVX512VL 
-VEXTRACTF32X4    xmmreg|mask|z,zmmreg,imm8 AVX512 
-VEXTRACTF32X4    mem128|mask,ymmreg,imm8  AVX512VL 
-VEXTRACTF32X4    mem128|mask,zmmreg,imm8  AVX512 
-VEXTRACTF32X8    ymmreg|mask|z,zmmreg,imm8 AVX512DQ 
-VEXTRACTF32X8    mem256|mask,zmmreg,imm8  AVX512DQ 
-VEXTRACTF64X2    xmmreg|mask|z,ymmreg,imm8 AVX512VL/DQ 
-VEXTRACTF64X2    xmmreg|mask|z,zmmreg,imm8 AVX512DQ 
-VEXTRACTF64X2    mem128|mask,ymmreg,imm8  AVX512VL/DQ 
-VEXTRACTF64X2    mem128|mask,zmmreg,imm8  AVX512DQ 
-VEXTRACTF64X4    ymmreg|mask|z,zmmreg,imm8 AVX512 
-VEXTRACTF64X4    mem256|mask,zmmreg,imm8  AVX512 
-VEXTRACTI32X4    xmmreg|mask|z,ymmreg,imm8 AVX512VL 
-VEXTRACTI32X4    xmmreg|mask|z,zmmreg,imm8 AVX512 
-VEXTRACTI32X4    mem128|mask,ymmreg,imm8  AVX512VL 
-VEXTRACTI32X4    mem128|mask,zmmreg,imm8  AVX512 
-VEXTRACTI32X8    ymmreg|mask|z,zmmreg,imm8 AVX512DQ 
-VEXTRACTI32X8    mem256|mask,zmmreg,imm8  AVX512DQ 
-VEXTRACTI64X2    xmmreg|mask|z,ymmreg,imm8 AVX512VL/DQ 
-VEXTRACTI64X2    xmmreg|mask|z,zmmreg,imm8 AVX512DQ 
-VEXTRACTI64X2    mem128|mask,ymmreg,imm8  AVX512VL/DQ 
-VEXTRACTI64X2    mem128|mask,zmmreg,imm8  AVX512DQ 
-VEXTRACTI64X4    ymmreg|mask|z,zmmreg,imm8 AVX512 
-VEXTRACTI64X4    mem256|mask,zmmreg,imm8  AVX512 
-VEXTRACTPS       reg32,xmmreg,imm8        AVX512 
-VEXTRACTPS       reg64,xmmreg,imm8        AVX512 
-VEXTRACTPS       mem32,xmmreg,imm8        AVX512 
-VFIXUPIMMPD      xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 AVX512VL 
-VFIXUPIMMPD      ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VL 
-VFIXUPIMMPD      zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae,imm8 AVX512 
-VFIXUPIMMPS      xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 AVX512VL 
-VFIXUPIMMPS      ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 AVX512VL 
-VFIXUPIMMPS      zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae,imm8 AVX512 
-VFIXUPIMMSD      xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 AVX512 
-VFIXUPIMMSS      xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 AVX512 
-VFMADD132PD      xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-VFMADD132PD      ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-VFMADD132PD      zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-VFMADD132PS      xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-VFMADD132PS      ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-VFMADD132PS      zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-VFMADD132SD      xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-VFMADD132SS      xmmreg|mask|z,xmmreg,xmmrm32|er AVX512 
-VFMADD213PD      xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-VFMADD213PD      ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-VFMADD213PD      zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-VFMADD213PS      xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-VFMADD213PS      ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-VFMADD213PS      zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-VFMADD213SD      xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-VFMADD213SS      xmmreg|mask|z,xmmreg,xmmrm32|er AVX512 
-VFMADD231PD      xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-VFMADD231PD      ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-VFMADD231PD      zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-VFMADD231PS      xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-VFMADD231PS      ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-VFMADD231PS      zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-VFMADD231SD      xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-VFMADD231SS      xmmreg|mask|z,xmmreg,xmmrm32|er AVX512 
-VFMADDSUB132PD   xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-VFMADDSUB132PD   ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-VFMADDSUB132PD   zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-VFMADDSUB132PS   xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-VFMADDSUB132PS   ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-VFMADDSUB132PS   zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-VFMADDSUB213PD   xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-VFMADDSUB213PD   ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-VFMADDSUB213PD   zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-VFMADDSUB213PS   xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-VFMADDSUB213PS   ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-VFMADDSUB213PS   zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-VFMADDSUB231PD   xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-VFMADDSUB231PD   ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-VFMADDSUB231PD   zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-VFMADDSUB231PS   xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-VFMADDSUB231PS   ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-VFMADDSUB231PS   zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-VFMSUB132PD      xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-VFMSUB132PD      ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-VFMSUB132PD      zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-VFMSUB132PS      xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-VFMSUB132PS      ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-VFMSUB132PS      zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-VFMSUB132SD      xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-VFMSUB132SS      xmmreg|mask|z,xmmreg,xmmrm32|er AVX512 
-VFMSUB213PD      xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-VFMSUB213PD      ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-VFMSUB213PD      zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-VFMSUB213PS      xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-VFMSUB213PS      ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-VFMSUB213PS      zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-VFMSUB213SD      xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-VFMSUB213SS      xmmreg|mask|z,xmmreg,xmmrm32|er AVX512 
-VFMSUB231PD      xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-VFMSUB231PD      ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-VFMSUB231PD      zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-VFMSUB231PS      xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-VFMSUB231PS      ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-VFMSUB231PS      zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-VFMSUB231SD      xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-VFMSUB231SS      xmmreg|mask|z,xmmreg,xmmrm32|er AVX512 
-VFMSUBADD132PD   xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-VFMSUBADD132PD   ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-VFMSUBADD132PD   zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-VFMSUBADD132PS   xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-VFMSUBADD132PS   ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-VFMSUBADD132PS   zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-VFMSUBADD213PD   xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-VFMSUBADD213PD   ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-VFMSUBADD213PD   zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-VFMSUBADD213PS   xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-VFMSUBADD213PS   ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-VFMSUBADD213PS   zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-VFMSUBADD231PD   xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-VFMSUBADD231PD   ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-VFMSUBADD231PD   zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-VFMSUBADD231PS   xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-VFMSUBADD231PS   ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-VFMSUBADD231PS   zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-VFNMADD132PD     xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-VFNMADD132PD     ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-VFNMADD132PD     zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-VFNMADD132PS     xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-VFNMADD132PS     ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-VFNMADD132PS     zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-VFNMADD132SD     xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-VFNMADD132SS     xmmreg|mask|z,xmmreg,xmmrm32|er AVX512 
-VFNMADD213PD     xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-VFNMADD213PD     ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-VFNMADD213PD     zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-VFNMADD213PS     xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-VFNMADD213PS     ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-VFNMADD213PS     zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-VFNMADD213SD     xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-VFNMADD213SS     xmmreg|mask|z,xmmreg,xmmrm32|er AVX512 
-VFNMADD231PD     xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-VFNMADD231PD     ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-VFNMADD231PD     zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-VFNMADD231PS     xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-VFNMADD231PS     ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-VFNMADD231PS     zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-VFNMADD231SD     xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-VFNMADD231SS     xmmreg|mask|z,xmmreg,xmmrm32|er AVX512 
-VFNMSUB132PD     xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-VFNMSUB132PD     ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-VFNMSUB132PD     zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-VFNMSUB132PS     xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-VFNMSUB132PS     ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-VFNMSUB132PS     zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-VFNMSUB132SD     xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-VFNMSUB132SS     xmmreg|mask|z,xmmreg,xmmrm32|er AVX512 
-VFNMSUB213PD     xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-VFNMSUB213PD     ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-VFNMSUB213PD     zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-VFNMSUB213PS     xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-VFNMSUB213PS     ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-VFNMSUB213PS     zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-VFNMSUB213SD     xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-VFNMSUB213SS     xmmreg|mask|z,xmmreg,xmmrm32|er AVX512 
-VFNMSUB231PD     xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-VFNMSUB231PD     ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-VFNMSUB231PD     zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-VFNMSUB231PS     xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-VFNMSUB231PS     ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-VFNMSUB231PS     zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-VFNMSUB231SD     xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-VFNMSUB231SS     xmmreg|mask|z,xmmreg,xmmrm32|er AVX512 
-VFPCLASSPD       kreg|mask,xmmrm128|b64,imm8 AVX512VL/DQ 
-VFPCLASSPD       kreg|mask,ymmrm256|b64,imm8 AVX512VL/DQ 
-VFPCLASSPD       kreg|mask,zmmrm512|b64,imm8 AVX512DQ 
-VFPCLASSPS       kreg|mask,xmmrm128|b32,imm8 AVX512VL/DQ 
-VFPCLASSPS       kreg|mask,ymmrm256|b32,imm8 AVX512VL/DQ 
-VFPCLASSPS       kreg|mask,zmmrm512|b32,imm8 AVX512DQ 
-VFPCLASSSD       kreg|mask,xmmrm64,imm8   AVX512DQ 
-VFPCLASSSS       kreg|mask,xmmrm32,imm8   AVX512DQ 
-VGATHERDPD       xmmreg|mask,xmem64       AVX512VL 
-VGATHERDPD       ymmreg|mask,xmem64       AVX512VL 
-VGATHERDPD       zmmreg|mask,ymem64       AVX512 
-VGATHERDPS       xmmreg|mask,xmem32       AVX512VL 
-VGATHERDPS       ymmreg|mask,ymem32       AVX512VL 
-VGATHERDPS       zmmreg|mask,zmem32       AVX512 
-VGATHERPF0DPD    ymem64|mask              AVX512PF 
-VGATHERPF0DPS    zmem32|mask              AVX512PF 
-VGATHERPF0QPD    zmem64|mask              AVX512PF 
-VGATHERPF0QPS    zmem32|mask              AVX512PF 
-VGATHERPF1DPD    ymem64|mask              AVX512PF 
-VGATHERPF1DPS    zmem32|mask              AVX512PF 
-VGATHERPF1QPD    zmem64|mask              AVX512PF 
-VGATHERPF1QPS    zmem32|mask              AVX512PF 
-VGATHERQPD       xmmreg|mask,xmem64       AVX512VL 
-VGATHERQPD       ymmreg|mask,ymem64       AVX512VL 
-VGATHERQPD       zmmreg|mask,zmem64       AVX512 
-VGATHERQPS       xmmreg|mask,xmem32       AVX512VL 
-VGATHERQPS       xmmreg|mask,ymem32       AVX512VL 
-VGATHERQPS       ymmreg|mask,zmem32       AVX512 
-VGETEXPPD        xmmreg|mask|z,xmmrm128|b64 AVX512VL 
-VGETEXPPD        ymmreg|mask|z,ymmrm256|b64 AVX512VL 
-VGETEXPPD        zmmreg|mask|z,zmmrm512|b64|sae AVX512 
-VGETEXPPS        xmmreg|mask|z,xmmrm128|b32 AVX512VL 
-VGETEXPPS        ymmreg|mask|z,ymmrm256|b32 AVX512VL 
-VGETEXPPS        zmmreg|mask|z,zmmrm512|b32|sae AVX512 
-VGETEXPSD        xmmreg|mask|z,xmmreg,xmmrm64|sae AVX512 
-VGETEXPSS        xmmreg|mask|z,xmmreg,xmmrm32|sae AVX512 
-VGETMANTPD       xmmreg|mask|z,xmmrm128|b64,imm8 AVX512VL 
-VGETMANTPD       ymmreg|mask|z,ymmrm256|b64,imm8 AVX512VL 
-VGETMANTPD       zmmreg|mask|z,zmmrm512|b64|sae,imm8 AVX512 
-VGETMANTPS       xmmreg|mask|z,xmmrm128|b32,imm8 AVX512VL 
-VGETMANTPS       ymmreg|mask|z,ymmrm256|b32,imm8 AVX512VL 
-VGETMANTPS       zmmreg|mask|z,zmmrm512|b32|sae,imm8 AVX512 
-VGETMANTSD       xmmreg|mask|z,xmmreg,xmmrm64|sae,imm8 AVX512 
-VGETMANTSS       xmmreg|mask|z,xmmreg,xmmrm32|sae,imm8 AVX512 
-VINSERTF32X4     ymmreg|mask|z,ymmreg*,xmmrm128,imm8 AVX512VL 
-VINSERTF32X4     zmmreg|mask|z,zmmreg*,xmmrm128,imm8 AVX512 
-VINSERTF32X8     zmmreg|mask|z,zmmreg*,ymmrm256,imm8 AVX512DQ 
-VINSERTF64X2     ymmreg|mask|z,ymmreg*,xmmrm128,imm8 AVX512VL/DQ 
-VINSERTF64X2     zmmreg|mask|z,zmmreg*,xmmrm128,imm8 AVX512DQ 
-VINSERTF64X4     zmmreg|mask|z,zmmreg*,ymmrm256,imm8 AVX512 
-VINSERTI32X4     ymmreg|mask|z,ymmreg*,xmmrm128,imm8 AVX512VL 
-VINSERTI32X4     zmmreg|mask|z,zmmreg*,xmmrm128,imm8 AVX512 
-VINSERTI32X8     zmmreg|mask|z,zmmreg*,ymmrm256,imm8 AVX512DQ 
-VINSERTI64X2     ymmreg|mask|z,ymmreg*,xmmrm128,imm8 AVX512VL/DQ 
-VINSERTI64X2     zmmreg|mask|z,zmmreg*,xmmrm128,imm8 AVX512DQ 
-VINSERTI64X4     zmmreg|mask|z,zmmreg*,ymmrm256,imm8 AVX512 
-VINSERTPS        xmmreg,xmmreg*,xmmrm32,imm8 AVX512 
-VMAXPD           xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VMAXPD           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VMAXPD           zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae AVX512 
-VMAXPS           xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VMAXPS           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VMAXPS           zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae AVX512 
-VMAXSD           xmmreg|mask|z,xmmreg*,xmmrm64|sae AVX512 
-VMAXSS           xmmreg|mask|z,xmmreg*,xmmrm32|sae AVX512 
-VMINPD           xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VMINPD           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VMINPD           zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae AVX512 
-VMINPS           xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VMINPS           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VMINPS           zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae AVX512 
-VMINSD           xmmreg|mask|z,xmmreg*,xmmrm64|sae AVX512 
-VMINSS           xmmreg|mask|z,xmmreg*,xmmrm32|sae AVX512 
-VMOVAPD          xmmreg|mask|z,xmmrm128   AVX512VL 
-VMOVAPD          ymmreg|mask|z,ymmrm256   AVX512VL 
-VMOVAPD          zmmreg|mask|z,zmmrm512   AVX512 
-VMOVAPD          xmmreg|mask|z,xmmreg     AVX512VL 
-VMOVAPD          ymmreg|mask|z,ymmreg     AVX512VL 
-VMOVAPD          zmmreg|mask|z,zmmreg     AVX512 
-VMOVAPD          mem128|mask,xmmreg       AVX512VL 
-VMOVAPD          mem256|mask,ymmreg       AVX512VL 
-VMOVAPD          mem512|mask,zmmreg       AVX512 
-VMOVAPS          xmmreg|mask|z,xmmrm128   AVX512VL 
-VMOVAPS          ymmreg|mask|z,ymmrm256   AVX512VL 
-VMOVAPS          zmmreg|mask|z,zmmrm512   AVX512 
-VMOVAPS          xmmreg|mask|z,xmmreg     AVX512VL 
-VMOVAPS          ymmreg|mask|z,ymmreg     AVX512VL 
-VMOVAPS          zmmreg|mask|z,zmmreg     AVX512 
-VMOVAPS          mem128|mask,xmmreg       AVX512VL 
-VMOVAPS          mem256|mask,ymmreg       AVX512VL 
-VMOVAPS          mem512|mask,zmmreg       AVX512 
-VMOVD            xmmreg,rm32              AVX512 
-VMOVD            rm32,xmmreg              AVX512 
-VMOVDDUP         xmmreg|mask|z,xmmrm64    AVX512VL 
-VMOVDDUP         ymmreg|mask|z,ymmrm256   AVX512VL 
-VMOVDDUP         zmmreg|mask|z,zmmrm512   AVX512 
-VMOVDQA32        xmmreg|mask|z,xmmrm128   AVX512VL 
-VMOVDQA32        ymmreg|mask|z,ymmrm256   AVX512VL 
-VMOVDQA32        zmmreg|mask|z,zmmrm512   AVX512 
-VMOVDQA32        xmmrm128|mask|z,xmmreg   AVX512VL 
-VMOVDQA32        ymmrm256|mask|z,ymmreg   AVX512VL 
-VMOVDQA32        zmmrm512|mask|z,zmmreg   AVX512 
-VMOVDQA64        xmmreg|mask|z,xmmrm128   AVX512VL 
-VMOVDQA64        ymmreg|mask|z,ymmrm256   AVX512VL 
-VMOVDQA64        zmmreg|mask|z,zmmrm512   AVX512 
-VMOVDQA64        xmmrm128|mask|z,xmmreg   AVX512VL 
-VMOVDQA64        ymmrm256|mask|z,ymmreg   AVX512VL 
-VMOVDQA64        zmmrm512|mask|z,zmmreg   AVX512 
-VMOVDQU16        xmmreg|mask|z,xmmrm128   AVX512VL/BW 
-VMOVDQU16        ymmreg|mask|z,ymmrm256   AVX512VL/BW 
-VMOVDQU16        zmmreg|mask|z,zmmrm512   AVX512BW 
-VMOVDQU16        xmmrm128|mask|z,xmmreg   AVX512VL/BW 
-VMOVDQU16        ymmrm256|mask|z,ymmreg   AVX512VL/BW 
-VMOVDQU16        zmmrm512|mask|z,zmmreg   AVX512BW 
-VMOVDQU32        xmmreg|mask|z,xmmrm128   AVX512VL 
-VMOVDQU32        ymmreg|mask|z,ymmrm256   AVX512VL 
-VMOVDQU32        zmmreg|mask|z,zmmrm512   AVX512 
-VMOVDQU32        xmmrm128|mask|z,xmmreg   AVX512VL 
-VMOVDQU32        ymmrm256|mask|z,ymmreg   AVX512VL 
-VMOVDQU32        zmmrm512|mask|z,zmmreg   AVX512 
-VMOVDQU64        xmmreg|mask|z,xmmrm128   AVX512VL 
-VMOVDQU64        ymmreg|mask|z,ymmrm256   AVX512VL 
-VMOVDQU64        zmmreg|mask|z,zmmrm512   AVX512 
-VMOVDQU64        xmmrm128|mask|z,xmmreg   AVX512VL 
-VMOVDQU64        ymmrm256|mask|z,ymmreg   AVX512VL 
-VMOVDQU64        zmmrm512|mask|z,zmmreg   AVX512 
-VMOVDQU8         xmmreg|mask|z,xmmrm128   AVX512VL/BW 
-VMOVDQU8         ymmreg|mask|z,ymmrm256   AVX512VL/BW 
-VMOVDQU8         zmmreg|mask|z,zmmrm512   AVX512BW 
-VMOVDQU8         xmmrm128|mask|z,xmmreg   AVX512VL/BW 
-VMOVDQU8         ymmrm256|mask|z,ymmreg   AVX512VL/BW 
-VMOVDQU8         zmmrm512|mask|z,zmmreg   AVX512BW 
-VMOVHLPS         xmmreg,xmmreg*,xmmreg    AVX512 
-VMOVHPD          xmmreg,xmmreg*,mem64     AVX512 
-VMOVHPD          mem64,xmmreg             AVX512 
-VMOVHPS          xmmreg,xmmreg*,mem64     AVX512 
-VMOVHPS          mem64,xmmreg             AVX512 
-VMOVLHPS         xmmreg,xmmreg*,xmmreg    AVX512 
-VMOVLPD          xmmreg,xmmreg*,mem64     AVX512 
-VMOVLPD          mem64,xmmreg             AVX512 
-VMOVLPS          xmmreg,xmmreg*,mem64     AVX512 
-VMOVLPS          mem64,xmmreg             AVX512 
-VMOVNTDQ         mem128,xmmreg            AVX512VL 
-VMOVNTDQ         mem256,ymmreg            AVX512VL 
-VMOVNTDQ         mem512,zmmreg            AVX512 
-VMOVNTDQA        xmmreg,mem128            AVX512VL 
-VMOVNTDQA        ymmreg,mem256            AVX512VL 
-VMOVNTDQA        zmmreg,mem512            AVX512 
-VMOVNTPD         mem128,xmmreg            AVX512VL 
-VMOVNTPD         mem256,ymmreg            AVX512VL 
-VMOVNTPD         mem512,zmmreg            AVX512 
-VMOVNTPS         mem128,xmmreg            AVX512VL 
-VMOVNTPS         mem256,ymmreg            AVX512VL 
-VMOVNTPS         mem512,zmmreg            AVX512 
-VMOVQ            xmmreg,rm64              AVX512 
-VMOVQ            rm64,xmmreg              AVX512 
-VMOVQ            xmmreg,xmmrm64           AVX512 
-VMOVQ            xmmrm64,xmmreg           AVX512 
-VMOVSD           xmmreg|mask|z,mem64      AVX512 
-VMOVSD           mem64|mask,xmmreg        AVX512 
-VMOVSD           xmmreg|mask|z,xmmreg*,xmmreg AVX512 
-VMOVSD           xmmreg|mask|z,xmmreg*,xmmreg AVX512 
-VMOVSHDUP        xmmreg|mask|z,xmmrm128   AVX512VL 
-VMOVSHDUP        ymmreg|mask|z,ymmrm256   AVX512VL 
-VMOVSHDUP        zmmreg|mask|z,zmmrm512   AVX512 
-VMOVSLDUP        xmmreg|mask|z,xmmrm128   AVX512VL 
-VMOVSLDUP        ymmreg|mask|z,ymmrm256   AVX512VL 
-VMOVSLDUP        zmmreg|mask|z,zmmrm512   AVX512 
-VMOVSS           xmmreg|mask|z,mem32      AVX512 
-VMOVSS           mem32|mask,xmmreg        AVX512 
-VMOVSS           xmmreg|mask|z,xmmreg*,xmmreg AVX512 
-VMOVSS           xmmreg|mask|z,xmmreg*,xmmreg AVX512 
-VMOVUPD          xmmreg|mask|z,xmmrm128   AVX512VL 
-VMOVUPD          ymmreg|mask|z,ymmrm256   AVX512VL 
-VMOVUPD          zmmreg|mask|z,zmmrm512   AVX512 
-VMOVUPD          xmmreg|mask|z,xmmreg     AVX512VL 
-VMOVUPD          ymmreg|mask|z,ymmreg     AVX512VL 
-VMOVUPD          zmmreg|mask|z,zmmreg     AVX512 
-VMOVUPD          mem128|mask,xmmreg       AVX512VL 
-VMOVUPD          mem256|mask,ymmreg       AVX512VL 
-VMOVUPD          mem512|mask,zmmreg       AVX512 
-VMOVUPS          xmmreg|mask|z,xmmrm128   AVX512VL 
-VMOVUPS          ymmreg|mask|z,ymmrm256   AVX512VL 
-VMOVUPS          zmmreg|mask|z,zmmrm512   AVX512 
-VMOVUPS          xmmreg|mask|z,xmmreg     AVX512VL 
-VMOVUPS          ymmreg|mask|z,ymmreg     AVX512VL 
-VMOVUPS          zmmreg|mask|z,zmmreg     AVX512 
-VMOVUPS          mem128|mask,xmmreg       AVX512VL 
-VMOVUPS          mem256|mask,ymmreg       AVX512VL 
-VMOVUPS          mem512|mask,zmmreg       AVX512 
-VMULPD           xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VMULPD           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VMULPD           zmmreg|mask|z,zmmreg*,zmmrm512|b64|er AVX512 
-VMULPS           xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VMULPS           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VMULPS           zmmreg|mask|z,zmmreg*,zmmrm512|b32|er AVX512 
-VMULSD           xmmreg|mask|z,xmmreg*,xmmrm64|er AVX512 
-VMULSS           xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512 
-VORPD            xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL/DQ 
-VORPD            ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL/DQ 
-VORPD            zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512DQ 
-VORPS            xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL/DQ 
-VORPS            ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL/DQ 
-VORPS            zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512DQ 
-VPABSB           xmmreg|mask|z,xmmrm128   AVX512VL/BW 
-VPABSB           ymmreg|mask|z,ymmrm256   AVX512VL/BW 
-VPABSB           zmmreg|mask|z,zmmrm512   AVX512BW 
-VPABSD           xmmreg|mask|z,xmmrm128|b32 AVX512VL 
-VPABSD           ymmreg|mask|z,ymmrm256|b32 AVX512VL 
-VPABSD           zmmreg|mask|z,zmmrm512|b32 AVX512 
-VPABSQ           xmmreg|mask|z,xmmrm128|b64 AVX512VL 
-VPABSQ           ymmreg|mask|z,ymmrm256|b64 AVX512VL 
-VPABSQ           zmmreg|mask|z,zmmrm512|b64 AVX512 
-VPABSW           xmmreg|mask|z,xmmrm128   AVX512VL/BW 
-VPABSW           ymmreg|mask|z,ymmrm256   AVX512VL/BW 
-VPABSW           zmmreg|mask|z,zmmrm512   AVX512BW 
-VPACKSSDW        xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL/BW 
-VPACKSSDW        ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL/BW 
-VPACKSSDW        zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512BW 
-VPACKSSWB        xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPACKSSWB        ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPACKSSWB        zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPACKUSDW        xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL/BW 
-VPACKUSDW        ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL/BW 
-VPACKUSDW        zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512BW 
-VPACKUSWB        xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPACKUSWB        ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPACKUSWB        zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPADDB           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPADDB           ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPADDB           zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPADDD           xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VPADDD           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VPADDD           zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-VPADDQ           xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VPADDQ           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VPADDQ           zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-VPADDSB          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPADDSB          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPADDSB          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPADDSW          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPADDSW          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPADDSW          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPADDUSB         xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPADDUSB         ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPADDUSB         zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPADDUSW         xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPADDUSW         ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPADDUSW         zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPADDW           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPADDW           ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPADDW           zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPALIGNR         xmmreg|mask|z,xmmreg*,xmmrm128,imm8 AVX512VL/BW 
-VPALIGNR         ymmreg|mask|z,ymmreg*,ymmrm256,imm8 AVX512VL/BW 
-VPALIGNR         zmmreg|mask|z,zmmreg*,zmmrm512,imm8 AVX512BW 
-VPANDD           xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VPANDD           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VPANDD           zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-VPANDND          xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VPANDND          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VPANDND          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-VPANDNQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VPANDNQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VPANDNQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-VPANDQ           xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VPANDQ           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VPANDQ           zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-VPAVGB           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPAVGB           ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPAVGB           zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPAVGW           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPAVGW           ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPAVGW           zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPBLENDMB        xmmreg|mask|z,xmmreg,xmmrm128 AVX512VL/BW 
-VPBLENDMB        ymmreg|mask|z,ymmreg,ymmrm256 AVX512VL/BW 
-VPBLENDMB        zmmreg|mask|z,zmmreg,zmmrm512 AVX512BW 
-VPBLENDMD        xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-VPBLENDMD        ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-VPBLENDMD        zmmreg|mask|z,zmmreg,zmmrm512|b32 AVX512 
-VPBLENDMQ        xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-VPBLENDMQ        ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-VPBLENDMQ        zmmreg|mask|z,zmmreg,zmmrm512|b64 AVX512 
-VPBLENDMW        xmmreg|mask|z,xmmreg,xmmrm128 AVX512VL/BW 
-VPBLENDMW        ymmreg|mask|z,ymmreg,ymmrm256 AVX512VL/BW 
-VPBLENDMW        zmmreg|mask|z,zmmreg,zmmrm512 AVX512BW 
-VPBROADCASTB     xmmreg|mask|z,xmmrm8     AVX512VL/BW 
-VPBROADCASTB     ymmreg|mask|z,xmmrm8     AVX512VL/BW 
-VPBROADCASTB     zmmreg|mask|z,xmmrm8     AVX512BW 
-VPBROADCASTB     xmmreg|mask|z,reg8       AVX512VL/BW 
-VPBROADCASTB     xmmreg|mask|z,reg16      AVX512VL/BW 
-VPBROADCASTB     xmmreg|mask|z,reg32      AVX512VL/BW 
-VPBROADCASTB     xmmreg|mask|z,reg64      AVX512VL/BW 
-VPBROADCASTB     ymmreg|mask|z,reg8       AVX512VL/BW 
-VPBROADCASTB     ymmreg|mask|z,reg16      AVX512VL/BW 
-VPBROADCASTB     ymmreg|mask|z,reg32      AVX512VL/BW 
-VPBROADCASTB     ymmreg|mask|z,reg64      AVX512VL/BW 
-VPBROADCASTB     zmmreg|mask|z,reg8       AVX512BW 
-VPBROADCASTB     zmmreg|mask|z,reg16      AVX512BW 
-VPBROADCASTB     zmmreg|mask|z,reg32      AVX512BW 
-VPBROADCASTB     zmmreg|mask|z,reg64      AVX512BW 
-VPBROADCASTD     xmmreg|mask|z,mem32      AVX512VL 
-VPBROADCASTD     ymmreg|mask|z,mem32      AVX512VL 
-VPBROADCASTD     zmmreg|mask|z,mem32      AVX512 
-VPBROADCASTD     xmmreg|mask|z,xmmreg     AVX512VL 
-VPBROADCASTD     ymmreg|mask|z,xmmreg     AVX512VL 
-VPBROADCASTD     zmmreg|mask|z,xmmreg     AVX512 
-VPBROADCASTD     xmmreg|mask|z,reg32      AVX512VL 
-VPBROADCASTD     ymmreg|mask|z,reg32      AVX512VL 
-VPBROADCASTD     zmmreg|mask|z,reg32      AVX512 
-VPBROADCASTMB2Q  xmmreg,kreg              AVX512VL/CD 
-VPBROADCASTMB2Q  ymmreg,kreg              AVX512VL/CD 
-VPBROADCASTMB2Q  zmmreg,kreg              AVX512CD 
-VPBROADCASTMW2D  xmmreg,kreg              AVX512VL/CD 
-VPBROADCASTMW2D  ymmreg,kreg              AVX512VL/CD 
-VPBROADCASTMW2D  zmmreg,kreg              AVX512CD 
-VPBROADCASTQ     xmmreg|mask|z,mem64      AVX512VL 
-VPBROADCASTQ     ymmreg|mask|z,mem64      AVX512VL 
-VPBROADCASTQ     zmmreg|mask|z,mem64      AVX512 
-VPBROADCASTQ     xmmreg|mask|z,xmmreg     AVX512VL 
-VPBROADCASTQ     ymmreg|mask|z,xmmreg     AVX512VL 
-VPBROADCASTQ     zmmreg|mask|z,xmmreg     AVX512 
-VPBROADCASTQ     xmmreg|mask|z,reg64      AVX512VL 
-VPBROADCASTQ     ymmreg|mask|z,reg64      AVX512VL 
-VPBROADCASTQ     zmmreg|mask|z,reg64      AVX512 
-VPBROADCASTW     xmmreg|mask|z,xmmrm16    AVX512VL/BW 
-VPBROADCASTW     ymmreg|mask|z,xmmrm16    AVX512VL/BW 
-VPBROADCASTW     zmmreg|mask|z,xmmrm16    AVX512BW 
-VPBROADCASTW     xmmreg|mask|z,reg16      AVX512VL/BW 
-VPBROADCASTW     xmmreg|mask|z,reg32      AVX512VL/BW 
-VPBROADCASTW     xmmreg|mask|z,reg64      AVX512VL/BW 
-VPBROADCASTW     ymmreg|mask|z,reg16      AVX512VL/BW 
-VPBROADCASTW     ymmreg|mask|z,reg32      AVX512VL/BW 
-VPBROADCASTW     ymmreg|mask|z,reg64      AVX512VL/BW 
-VPBROADCASTW     zmmreg|mask|z,reg16      AVX512BW 
-VPBROADCASTW     zmmreg|mask|z,reg32      AVX512BW 
-VPBROADCASTW     zmmreg|mask|z,reg64      AVX512BW 
-VPCMPEQB         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPEQB         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPEQB         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPEQD         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VPCMPEQD         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VPCMPEQD         kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-VPCMPEQQ         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VPCMPEQQ         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VPCMPEQQ         kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-VPCMPEQW         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPEQW         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPEQW         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPGTB         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPGTB         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPGTB         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPGTD         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VPCMPGTD         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VPCMPGTD         kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-VPCMPGTQ         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VPCMPGTQ         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VPCMPGTQ         kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-VPCMPGTW         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPGTW         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPGTW         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPEQB         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPEQB         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPEQB         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPEQD         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VPCMPEQD         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VPCMPEQD         kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-VPCMPEQQ         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VPCMPEQQ         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VPCMPEQQ         kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-VPCMPEQUB        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPEQUB        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPEQUB        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPEQUD        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VPCMPEQUD        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VPCMPEQUD        kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-VPCMPEQUQ        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VPCMPEQUQ        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VPCMPEQUQ        kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-VPCMPEQUW        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPEQUW        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPEQUW        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPEQW         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPEQW         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPEQW         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPGEB         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPGEB         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPGEB         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPGED         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VPCMPGED         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VPCMPGED         kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-VPCMPGEQ         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VPCMPGEQ         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VPCMPGEQ         kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-VPCMPGEUB        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPGEUB        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPGEUB        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPGEUD        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VPCMPGEUD        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VPCMPGEUD        kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-VPCMPGEUQ        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VPCMPGEUQ        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VPCMPGEUQ        kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-VPCMPGEUW        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPGEUW        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPGEUW        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPGEW         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPGEW         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPGEW         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPGTB         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPGTB         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPGTB         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPGTD         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VPCMPGTD         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VPCMPGTD         kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-VPCMPGTQ         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VPCMPGTQ         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VPCMPGTQ         kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-VPCMPGTUB        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPGTUB        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPGTUB        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPGTUD        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VPCMPGTUD        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VPCMPGTUD        kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-VPCMPGTUQ        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VPCMPGTUQ        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VPCMPGTUQ        kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-VPCMPGTUW        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPGTUW        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPGTUW        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPGTW         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPGTW         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPGTW         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPLEB         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPLEB         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPLEB         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPLED         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VPCMPLED         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VPCMPLED         kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-VPCMPLEQ         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VPCMPLEQ         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VPCMPLEQ         kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-VPCMPLEUB        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPLEUB        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPLEUB        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPLEUD        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VPCMPLEUD        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VPCMPLEUD        kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-VPCMPLEUQ        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VPCMPLEUQ        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VPCMPLEUQ        kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-VPCMPLEUW        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPLEUW        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPLEUW        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPLEW         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPLEW         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPLEW         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPLTB         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPLTB         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPLTB         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPLTD         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VPCMPLTD         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VPCMPLTD         kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-VPCMPLTQ         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VPCMPLTQ         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VPCMPLTQ         kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-VPCMPLTUB        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPLTUB        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPLTUB        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPLTUD        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VPCMPLTUD        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VPCMPLTUD        kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-VPCMPLTUQ        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VPCMPLTUQ        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VPCMPLTUQ        kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-VPCMPLTUW        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPLTUW        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPLTUW        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPLTW         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPLTW         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPLTW         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPNEQB        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPNEQB        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPNEQB        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPNEQD        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VPCMPNEQD        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VPCMPNEQD        kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-VPCMPNEQQ        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VPCMPNEQQ        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VPCMPNEQQ        kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-VPCMPNEQUB       kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPNEQUB       kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPNEQUB       kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPNEQUD       kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VPCMPNEQUD       kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VPCMPNEQUD       kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-VPCMPNEQUQ       kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VPCMPNEQUQ       kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VPCMPNEQUQ       kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-VPCMPNEQUW       kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPNEQUW       kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPNEQUW       kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPNEQW        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPNEQW        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPNEQW        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPNGTB        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPNGTB        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPNGTB        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPNGTD        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VPCMPNGTD        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VPCMPNGTD        kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-VPCMPNGTQ        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VPCMPNGTQ        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VPCMPNGTQ        kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-VPCMPNGTUB       kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPNGTUB       kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPNGTUB       kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPNGTUD       kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VPCMPNGTUD       kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VPCMPNGTUD       kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-VPCMPNGTUQ       kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VPCMPNGTUQ       kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VPCMPNGTUQ       kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-VPCMPNGTUW       kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPNGTUW       kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPNGTUW       kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPNGTW        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPNGTW        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPNGTW        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPNLEB        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPNLEB        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPNLEB        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPNLED        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VPCMPNLED        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VPCMPNLED        kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-VPCMPNLEQ        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VPCMPNLEQ        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VPCMPNLEQ        kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-VPCMPNLEUB       kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPNLEUB       kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPNLEUB       kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPNLEUD       kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VPCMPNLEUD       kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VPCMPNLEUD       kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-VPCMPNLEUQ       kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VPCMPNLEUQ       kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VPCMPNLEUQ       kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-VPCMPNLEUW       kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPNLEUW       kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPNLEUW       kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPNLEW        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPNLEW        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPNLEW        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPNLTB        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPNLTB        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPNLTB        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPNLTD        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VPCMPNLTD        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VPCMPNLTD        kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-VPCMPNLTQ        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VPCMPNLTQ        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VPCMPNLTQ        kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-VPCMPNLTUB       kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPNLTUB       kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPNLTUB       kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPNLTUD       kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VPCMPNLTUD       kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VPCMPNLTUD       kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-VPCMPNLTUQ       kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VPCMPNLTUQ       kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VPCMPNLTUQ       kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-VPCMPNLTUW       kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPNLTUW       kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPNLTUW       kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPNLTW        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPCMPNLTW        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPCMPNLTW        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPCMPB           kreg|mask,xmmreg,xmmrm128,imm8 AVX512VL/BW 
-VPCMPB           kreg|mask,ymmreg,ymmrm256,imm8 AVX512VL/BW 
-VPCMPB           kreg|mask,zmmreg,zmmrm512,imm8 AVX512BW 
-VPCMPD           kreg|mask,xmmreg,xmmrm128|b32,imm8 AVX512VL 
-VPCMPD           kreg|mask,ymmreg,ymmrm256|b32,imm8 AVX512VL 
-VPCMPD           kreg|mask,zmmreg,zmmrm512|b32,imm8 AVX512 
-VPCMPQ           kreg|mask,xmmreg,xmmrm128|b64,imm8 AVX512VL 
-VPCMPQ           kreg|mask,ymmreg,ymmrm256|b64,imm8 AVX512VL 
-VPCMPQ           kreg|mask,zmmreg,zmmrm512|b64,imm8 AVX512 
-VPCMPUB          kreg|mask,xmmreg,xmmrm128,imm8 AVX512VL/BW 
-VPCMPUB          kreg|mask,ymmreg,ymmrm256,imm8 AVX512VL/BW 
-VPCMPUB          kreg|mask,zmmreg,zmmrm512,imm8 AVX512BW 
-VPCMPUD          kreg|mask,xmmreg,xmmrm128|b32,imm8 AVX512VL 
-VPCMPUD          kreg|mask,ymmreg,ymmrm256|b32,imm8 AVX512VL 
-VPCMPUD          kreg|mask,zmmreg,zmmrm512|b32,imm8 AVX512 
-VPCMPUQ          kreg|mask,xmmreg,xmmrm128|b64,imm8 AVX512VL 
-VPCMPUQ          kreg|mask,ymmreg,ymmrm256|b64,imm8 AVX512VL 
-VPCMPUQ          kreg|mask,zmmreg,zmmrm512|b64,imm8 AVX512 
-VPCMPUW          kreg|mask,xmmreg,xmmrm128,imm8 AVX512VL/BW 
-VPCMPUW          kreg|mask,ymmreg,ymmrm256,imm8 AVX512VL/BW 
-VPCMPUW          kreg|mask,zmmreg,zmmrm512,imm8 AVX512BW 
-VPCMPW           kreg|mask,xmmreg,xmmrm128,imm8 AVX512VL/BW 
-VPCMPW           kreg|mask,ymmreg,ymmrm256,imm8 AVX512VL/BW 
-VPCMPW           kreg|mask,zmmreg,zmmrm512,imm8 AVX512BW 
-VPCOMPRESSD      mem128|mask,xmmreg       AVX512VL 
-VPCOMPRESSD      mem256|mask,ymmreg       AVX512VL 
-VPCOMPRESSD      mem512|mask,zmmreg       AVX512 
-VPCOMPRESSD      xmmreg|mask|z,xmmreg     AVX512VL 
-VPCOMPRESSD      ymmreg|mask|z,ymmreg     AVX512VL 
-VPCOMPRESSD      zmmreg|mask|z,zmmreg     AVX512 
-VPCOMPRESSQ      mem128|mask,xmmreg       AVX512VL 
-VPCOMPRESSQ      mem256|mask,ymmreg       AVX512VL 
-VPCOMPRESSQ      mem512|mask,zmmreg       AVX512 
-VPCOMPRESSQ      xmmreg|mask|z,xmmreg     AVX512VL 
-VPCOMPRESSQ      ymmreg|mask|z,ymmreg     AVX512VL 
-VPCOMPRESSQ      zmmreg|mask|z,zmmreg     AVX512 
-VPCONFLICTD      xmmreg|mask|z,xmmrm128|b32 AVX512VL/CD 
-VPCONFLICTD      ymmreg|mask|z,ymmrm256|b32 AVX512VL/CD 
-VPCONFLICTD      zmmreg|mask|z,zmmrm512|b32 AVX512CD 
-VPCONFLICTQ      xmmreg|mask|z,xmmrm128|b64 AVX512VL/CD 
-VPCONFLICTQ      ymmreg|mask|z,ymmrm256|b64 AVX512VL/CD 
-VPCONFLICTQ      zmmreg|mask|z,zmmrm512|b64 AVX512CD 
-VPERMB           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/VBMI 
-VPERMB           ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/VBMI 
-VPERMB           zmmreg|mask|z,zmmreg*,zmmrm512 AVX512VBMI 
-VPERMD           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VPERMD           zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-VPERMI2B         xmmreg|mask|z,xmmreg,xmmrm128 AVX512VL/VBMI 
-VPERMI2B         ymmreg|mask|z,ymmreg,ymmrm256 AVX512VL/VBMI 
-VPERMI2B         zmmreg|mask|z,zmmreg,zmmrm512 AVX512VBMI 
-VPERMI2D         xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-VPERMI2D         ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-VPERMI2D         zmmreg|mask|z,zmmreg,zmmrm512|b32 AVX512 
-VPERMI2PD        xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-VPERMI2PD        ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-VPERMI2PD        zmmreg|mask|z,zmmreg,zmmrm512|b64 AVX512 
-VPERMI2PS        xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-VPERMI2PS        ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-VPERMI2PS        zmmreg|mask|z,zmmreg,zmmrm512|b32 AVX512 
-VPERMI2Q         xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-VPERMI2Q         ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-VPERMI2Q         zmmreg|mask|z,zmmreg,zmmrm512|b64 AVX512 
-VPERMI2W         xmmreg|mask|z,xmmreg,xmmrm128 AVX512VL/BW 
-VPERMI2W         ymmreg|mask|z,ymmreg,ymmrm256 AVX512VL/BW 
-VPERMI2W         zmmreg|mask|z,zmmreg,zmmrm512 AVX512BW 
-VPERMILPD        xmmreg|mask|z,xmmrm128|b64,imm8 AVX512VL 
-VPERMILPD        ymmreg|mask|z,ymmrm256|b64,imm8 AVX512VL 
-VPERMILPD        zmmreg|mask|z,zmmrm512|b64,imm8 AVX512 
-VPERMILPD        xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VPERMILPD        ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VPERMILPD        zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-VPERMILPS        xmmreg|mask|z,xmmrm128|b32,imm8 AVX512VL 
-VPERMILPS        ymmreg|mask|z,ymmrm256|b32,imm8 AVX512VL 
-VPERMILPS        zmmreg|mask|z,zmmrm512|b32,imm8 AVX512 
-VPERMILPS        xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VPERMILPS        ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VPERMILPS        zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-VPERMPD          ymmreg|mask|z,ymmrm256|b64,imm8 AVX512VL 
-VPERMPD          zmmreg|mask|z,zmmrm512|b64,imm8 AVX512 
-VPERMPD          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VPERMPD          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-VPERMPS          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VPERMPS          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-VPERMQ           ymmreg|mask|z,ymmrm256|b64,imm8 AVX512VL 
-VPERMQ           zmmreg|mask|z,zmmrm512|b64,imm8 AVX512 
-VPERMQ           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VPERMQ           zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-VPERMT2B         xmmreg|mask|z,xmmreg,xmmrm128 AVX512VL/VBMI 
-VPERMT2B         ymmreg|mask|z,ymmreg,ymmrm256 AVX512VL/VBMI 
-VPERMT2B         zmmreg|mask|z,zmmreg,zmmrm512 AVX512VBMI 
-VPERMT2D         xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-VPERMT2D         ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-VPERMT2D         zmmreg|mask|z,zmmreg,zmmrm512|b32 AVX512 
-VPERMT2PD        xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-VPERMT2PD        ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-VPERMT2PD        zmmreg|mask|z,zmmreg,zmmrm512|b64 AVX512 
-VPERMT2PS        xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-VPERMT2PS        ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-VPERMT2PS        zmmreg|mask|z,zmmreg,zmmrm512|b32 AVX512 
-VPERMT2Q         xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-VPERMT2Q         ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-VPERMT2Q         zmmreg|mask|z,zmmreg,zmmrm512|b64 AVX512 
-VPERMT2W         xmmreg|mask|z,xmmreg,xmmrm128 AVX512VL/BW 
-VPERMT2W         ymmreg|mask|z,ymmreg,ymmrm256 AVX512VL/BW 
-VPERMT2W         zmmreg|mask|z,zmmreg,zmmrm512 AVX512BW 
-VPERMW           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPERMW           ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPERMW           zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPEXPANDD        xmmreg|mask|z,mem128     AVX512VL 
-VPEXPANDD        ymmreg|mask|z,mem256     AVX512VL 
-VPEXPANDD        zmmreg|mask|z,mem512     AVX512 
-VPEXPANDD        xmmreg|mask|z,xmmreg     AVX512VL 
-VPEXPANDD        ymmreg|mask|z,ymmreg     AVX512VL 
-VPEXPANDD        zmmreg|mask|z,zmmreg     AVX512 
-VPEXPANDQ        xmmreg|mask|z,mem128     AVX512VL 
-VPEXPANDQ        ymmreg|mask|z,mem256     AVX512VL 
-VPEXPANDQ        zmmreg|mask|z,mem512     AVX512 
-VPEXPANDQ        xmmreg|mask|z,xmmreg     AVX512VL 
-VPEXPANDQ        ymmreg|mask|z,ymmreg     AVX512VL 
-VPEXPANDQ        zmmreg|mask|z,zmmreg     AVX512 
-VPEXTRB          reg8,xmmreg,imm8         AVX512BW 
-VPEXTRB          reg16,xmmreg,imm8        AVX512BW 
-VPEXTRB          reg32,xmmreg,imm8        AVX512BW 
-VPEXTRB          reg64,xmmreg,imm8        AVX512BW 
-VPEXTRB          mem8,xmmreg,imm8         AVX512BW 
-VPEXTRD          rm32,xmmreg,imm8         AVX512DQ 
-VPEXTRQ          rm64,xmmreg,imm8         AVX512DQ 
-VPEXTRW          reg16,xmmreg,imm8        AVX512BW 
-VPEXTRW          reg32,xmmreg,imm8        AVX512BW 
-VPEXTRW          reg64,xmmreg,imm8        AVX512BW 
-VPEXTRW          mem16,xmmreg,imm8        AVX512BW 
-VPEXTRW          reg16,xmmreg,imm8        AVX512BW 
-VPEXTRW          reg32,xmmreg,imm8        AVX512BW 
-VPEXTRW          reg64,xmmreg,imm8        AVX512BW 
-VPGATHERDD       xmmreg|mask,xmem32       AVX512VL 
-VPGATHERDD       ymmreg|mask,ymem32       AVX512VL 
-VPGATHERDD       zmmreg|mask,zmem32       AVX512 
-VPGATHERDQ       xmmreg|mask,xmem64       AVX512VL 
-VPGATHERDQ       ymmreg|mask,xmem64       AVX512VL 
-VPGATHERDQ       zmmreg|mask,ymem64       AVX512 
-VPGATHERQD       xmmreg|mask,xmem32       AVX512VL 
-VPGATHERQD       xmmreg|mask,ymem32       AVX512VL 
-VPGATHERQD       ymmreg|mask,zmem32       AVX512 
-VPGATHERQQ       xmmreg|mask,xmem64       AVX512VL 
-VPGATHERQQ       ymmreg|mask,ymem64       AVX512VL 
-VPGATHERQQ       zmmreg|mask,zmem64       AVX512 
-VPINSRB          xmmreg,xmmreg*,reg32,imm8 AVX512BW 
-VPINSRB          xmmreg,xmmreg*,mem8,imm8 AVX512BW 
-VPINSRD          xmmreg,xmmreg*,rm32,imm8 AVX512DQ 
-VPINSRQ          xmmreg,xmmreg*,rm64,imm8 AVX512DQ 
-VPINSRW          xmmreg,xmmreg*,reg32,imm8 AVX512BW 
-VPINSRW          xmmreg,xmmreg*,mem16,imm8 AVX512BW 
-VPLZCNTD         xmmreg|mask|z,xmmrm128|b32 AVX512VL/CD 
-VPLZCNTD         ymmreg|mask|z,ymmrm256|b32 AVX512VL/CD 
-VPLZCNTD         zmmreg|mask|z,zmmrm512|b32 AVX512CD 
-VPLZCNTQ         xmmreg|mask|z,xmmrm128|b64 AVX512VL/CD 
-VPLZCNTQ         ymmreg|mask|z,ymmrm256|b64 AVX512VL/CD 
-VPLZCNTQ         zmmreg|mask|z,zmmrm512|b64 AVX512CD 
-VPMADD52HUQ      xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL/IFMA 
-VPMADD52HUQ      ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL/IFMA 
-VPMADD52HUQ      zmmreg|mask|z,zmmreg,zmmrm512|b64 AVX512IFMA 
-VPMADD52LUQ      xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL/IFMA 
-VPMADD52LUQ      ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL/IFMA 
-VPMADD52LUQ      zmmreg|mask|z,zmmreg,zmmrm512|b64 AVX512IFMA 
-VPMADDUBSW       xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPMADDUBSW       ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPMADDUBSW       zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPMADDWD         xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPMADDWD         ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPMADDWD         zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPMAXSB          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPMAXSB          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPMAXSB          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPMAXSD          xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VPMAXSD          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VPMAXSD          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-VPMAXSQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VPMAXSQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VPMAXSQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-VPMAXSW          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPMAXSW          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPMAXSW          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPMAXUB          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPMAXUB          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPMAXUB          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPMAXUD          xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VPMAXUD          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VPMAXUD          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-VPMAXUQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VPMAXUQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VPMAXUQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-VPMAXUW          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPMAXUW          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPMAXUW          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPMINSB          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPMINSB          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPMINSB          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPMINSD          xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VPMINSD          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VPMINSD          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-VPMINSQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VPMINSQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VPMINSQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-VPMINSW          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPMINSW          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPMINSW          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPMINUB          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPMINUB          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPMINUB          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPMINUD          xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VPMINUD          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VPMINUD          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-VPMINUQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VPMINUQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VPMINUQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-VPMINUW          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPMINUW          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPMINUW          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPMOVB2M         kreg,xmmreg              AVX512VL/BW 
-VPMOVB2M         kreg,ymmreg              AVX512VL/BW 
-VPMOVB2M         kreg,zmmreg              AVX512BW 
-VPMOVD2M         kreg,xmmreg              AVX512VL/DQ 
-VPMOVD2M         kreg,ymmreg              AVX512VL/DQ 
-VPMOVD2M         kreg,zmmreg              AVX512DQ 
-VPMOVDB          xmmreg|mask|z,xmmreg     AVX512VL 
-VPMOVDB          xmmreg|mask|z,ymmreg     AVX512VL 
-VPMOVDB          xmmreg|mask|z,zmmreg     AVX512 
-VPMOVDB          mem32|mask,xmmreg        AVX512VL 
-VPMOVDB          mem64|mask,ymmreg        AVX512VL 
-VPMOVDB          mem128|mask,zmmreg       AVX512 
-VPMOVDW          xmmreg|mask|z,xmmreg     AVX512VL 
-VPMOVDW          xmmreg|mask|z,ymmreg     AVX512VL 
-VPMOVDW          ymmreg|mask|z,zmmreg     AVX512 
-VPMOVDW          mem64|mask,xmmreg        AVX512VL 
-VPMOVDW          mem128|mask,ymmreg       AVX512VL 
-VPMOVDW          mem256|mask,zmmreg       AVX512 
-VPMOVM2B         xmmreg,kreg              AVX512VL/BW 
-VPMOVM2B         ymmreg,kreg              AVX512VL/BW 
-VPMOVM2B         zmmreg,kreg              AVX512BW 
-VPMOVM2D         xmmreg,kreg              AVX512VL/DQ 
-VPMOVM2D         ymmreg,kreg              AVX512VL/DQ 
-VPMOVM2D         zmmreg,kreg              AVX512DQ 
-VPMOVM2Q         xmmreg,kreg              AVX512VL/DQ 
-VPMOVM2Q         ymmreg,kreg              AVX512VL/DQ 
-VPMOVM2Q         zmmreg,kreg              AVX512DQ 
-VPMOVM2W         xmmreg,kreg              AVX512VL/BW 
-VPMOVM2W         ymmreg,kreg              AVX512VL/BW 
-VPMOVM2W         zmmreg,kreg              AVX512BW 
-VPMOVQ2M         kreg,xmmreg              AVX512VL/DQ 
-VPMOVQ2M         kreg,ymmreg              AVX512VL/DQ 
-VPMOVQ2M         kreg,zmmreg              AVX512DQ 
-VPMOVQB          xmmreg|mask|z,xmmreg     AVX512VL 
-VPMOVQB          xmmreg|mask|z,ymmreg     AVX512VL 
-VPMOVQB          xmmreg|mask|z,zmmreg     AVX512 
-VPMOVQB          mem16|mask,xmmreg        AVX512VL 
-VPMOVQB          mem32|mask,ymmreg        AVX512VL 
-VPMOVQB          mem64|mask,zmmreg        AVX512 
-VPMOVQD          xmmreg|mask|z,xmmreg     AVX512VL 
-VPMOVQD          xmmreg|mask|z,ymmreg     AVX512VL 
-VPMOVQD          ymmreg|mask|z,zmmreg     AVX512 
-VPMOVQD          mem64|mask,xmmreg        AVX512VL 
-VPMOVQD          mem128|mask,ymmreg       AVX512VL 
-VPMOVQD          mem256|mask,zmmreg       AVX512 
-VPMOVQW          xmmreg|mask|z,xmmreg     AVX512VL 
-VPMOVQW          xmmreg|mask|z,ymmreg     AVX512VL 
-VPMOVQW          xmmreg|mask|z,zmmreg     AVX512 
-VPMOVQW          mem32|mask,xmmreg        AVX512VL 
-VPMOVQW          mem64|mask,ymmreg        AVX512VL 
-VPMOVQW          mem128|mask,zmmreg       AVX512 
-VPMOVSDB         xmmreg|mask|z,xmmreg     AVX512VL 
-VPMOVSDB         xmmreg|mask|z,ymmreg     AVX512VL 
-VPMOVSDB         xmmreg|mask|z,zmmreg     AVX512 
-VPMOVSDB         mem32|mask,xmmreg        AVX512VL 
-VPMOVSDB         mem64|mask,ymmreg        AVX512VL 
-VPMOVSDB         mem128|mask,zmmreg       AVX512 
-VPMOVSDW         xmmreg|mask|z,xmmreg     AVX512VL 
-VPMOVSDW         xmmreg|mask|z,ymmreg     AVX512VL 
-VPMOVSDW         ymmreg|mask|z,zmmreg     AVX512 
-VPMOVSDW         mem64|mask,xmmreg        AVX512VL 
-VPMOVSDW         mem128|mask,ymmreg       AVX512VL 
-VPMOVSDW         mem256|mask,zmmreg       AVX512 
-VPMOVSQB         xmmreg|mask|z,xmmreg     AVX512VL 
-VPMOVSQB         xmmreg|mask|z,ymmreg     AVX512VL 
-VPMOVSQB         xmmreg|mask|z,zmmreg     AVX512 
-VPMOVSQB         mem16|mask,xmmreg        AVX512VL 
-VPMOVSQB         mem32|mask,ymmreg        AVX512VL 
-VPMOVSQB         mem64|mask,zmmreg        AVX512 
-VPMOVSQD         xmmreg|mask|z,xmmreg     AVX512VL 
-VPMOVSQD         xmmreg|mask|z,ymmreg     AVX512VL 
-VPMOVSQD         ymmreg|mask|z,zmmreg     AVX512 
-VPMOVSQD         mem64|mask,xmmreg        AVX512VL 
-VPMOVSQD         mem128|mask,ymmreg       AVX512VL 
-VPMOVSQD         mem256|mask,zmmreg       AVX512 
-VPMOVSQW         xmmreg|mask|z,xmmreg     AVX512VL 
-VPMOVSQW         xmmreg|mask|z,ymmreg     AVX512VL 
-VPMOVSQW         xmmreg|mask|z,zmmreg     AVX512 
-VPMOVSQW         mem32|mask,xmmreg        AVX512VL 
-VPMOVSQW         mem64|mask,ymmreg        AVX512VL 
-VPMOVSQW         mem128|mask,zmmreg       AVX512 
-VPMOVSWB         xmmreg|mask|z,xmmreg     AVX512VL/BW 
-VPMOVSWB         xmmreg|mask|z,ymmreg     AVX512VL/BW 
-VPMOVSWB         ymmreg|mask|z,zmmreg     AVX512BW 
-VPMOVSWB         mem64|mask,xmmreg        AVX512VL/BW 
-VPMOVSWB         mem128|mask,ymmreg       AVX512VL/BW 
-VPMOVSWB         mem256|mask,zmmreg       AVX512BW 
-VPMOVSXBD        xmmreg|mask|z,xmmrm32    AVX512VL 
-VPMOVSXBD        ymmreg|mask|z,xmmrm64    AVX512VL 
-VPMOVSXBD        zmmreg|mask|z,xmmrm128   AVX512 
-VPMOVSXBQ        xmmreg|mask|z,xmmrm16    AVX512VL 
-VPMOVSXBQ        ymmreg|mask|z,xmmrm32    AVX512VL 
-VPMOVSXBQ        zmmreg|mask|z,xmmrm64    AVX512 
-VPMOVSXBW        xmmreg|mask|z,xmmrm64    AVX512VL/BW 
-VPMOVSXBW        ymmreg|mask|z,xmmrm128   AVX512VL/BW 
-VPMOVSXBW        zmmreg|mask|z,ymmrm256   AVX512BW 
-VPMOVSXDQ        xmmreg|mask|z,xmmrm64    AVX512VL 
-VPMOVSXDQ        ymmreg|mask|z,xmmrm128   AVX512VL 
-VPMOVSXDQ        zmmreg|mask|z,ymmrm256   AVX512 
-VPMOVSXWD        xmmreg|mask|z,xmmrm64    AVX512VL 
-VPMOVSXWD        ymmreg|mask|z,xmmrm128   AVX512VL 
-VPMOVSXWD        zmmreg|mask|z,ymmrm256   AVX512 
-VPMOVSXWQ        xmmreg|mask|z,xmmrm32    AVX512VL 
-VPMOVSXWQ        ymmreg|mask|z,xmmrm64    AVX512VL 
-VPMOVSXWQ        zmmreg|mask|z,xmmrm128   AVX512 
-VPMOVUSDB        xmmreg|mask|z,xmmreg     AVX512VL 
-VPMOVUSDB        xmmreg|mask|z,ymmreg     AVX512VL 
-VPMOVUSDB        xmmreg|mask|z,zmmreg     AVX512 
-VPMOVUSDB        mem32|mask,xmmreg        AVX512VL 
-VPMOVUSDB        mem64|mask,ymmreg        AVX512VL 
-VPMOVUSDB        mem128|mask,zmmreg       AVX512 
-VPMOVUSDW        xmmreg|mask|z,xmmreg     AVX512VL 
-VPMOVUSDW        xmmreg|mask|z,ymmreg     AVX512VL 
-VPMOVUSDW        ymmreg|mask|z,zmmreg     AVX512 
-VPMOVUSDW        mem64|mask,xmmreg        AVX512VL 
-VPMOVUSDW        mem128|mask,ymmreg       AVX512VL 
-VPMOVUSDW        mem256|mask,zmmreg       AVX512 
-VPMOVUSQB        xmmreg|mask|z,xmmreg     AVX512VL 
-VPMOVUSQB        xmmreg|mask|z,ymmreg     AVX512VL 
-VPMOVUSQB        xmmreg|mask|z,zmmreg     AVX512 
-VPMOVUSQB        mem16|mask,xmmreg        AVX512VL 
-VPMOVUSQB        mem32|mask,ymmreg        AVX512VL 
-VPMOVUSQB        mem64|mask,zmmreg        AVX512 
-VPMOVUSQD        xmmreg|mask|z,xmmreg     AVX512VL 
-VPMOVUSQD        xmmreg|mask|z,ymmreg     AVX512VL 
-VPMOVUSQD        ymmreg|mask|z,zmmreg     AVX512 
-VPMOVUSQD        mem64|mask,xmmreg        AVX512VL 
-VPMOVUSQD        mem128|mask,ymmreg       AVX512VL 
-VPMOVUSQD        mem256|mask,zmmreg       AVX512 
-VPMOVUSQW        xmmreg|mask|z,xmmreg     AVX512VL 
-VPMOVUSQW        xmmreg|mask|z,ymmreg     AVX512VL 
-VPMOVUSQW        xmmreg|mask|z,zmmreg     AVX512 
-VPMOVUSQW        mem32|mask,xmmreg        AVX512VL 
-VPMOVUSQW        mem64|mask,ymmreg        AVX512VL 
-VPMOVUSQW        mem128|mask,zmmreg       AVX512 
-VPMOVUSWB        xmmreg|mask|z,xmmreg     AVX512VL/BW 
-VPMOVUSWB        xmmreg|mask|z,ymmreg     AVX512VL/BW 
-VPMOVUSWB        ymmreg|mask|z,zmmreg     AVX512BW 
-VPMOVUSWB        mem64|mask,xmmreg        AVX512VL/BW 
-VPMOVUSWB        mem128|mask,ymmreg       AVX512VL/BW 
-VPMOVUSWB        mem256|mask,zmmreg       AVX512BW 
-VPMOVW2M         kreg,xmmreg              AVX512VL/BW 
-VPMOVW2M         kreg,ymmreg              AVX512VL/BW 
-VPMOVW2M         kreg,zmmreg              AVX512BW 
-VPMOVWB          xmmreg|mask|z,xmmreg     AVX512VL/BW 
-VPMOVWB          xmmreg|mask|z,ymmreg     AVX512VL/BW 
-VPMOVWB          ymmreg|mask|z,zmmreg     AVX512BW 
-VPMOVWB          mem64|mask,xmmreg        AVX512VL/BW 
-VPMOVWB          mem128|mask,ymmreg       AVX512VL/BW 
-VPMOVWB          mem256|mask,zmmreg       AVX512BW 
-VPMOVZXBD        xmmreg|mask|z,xmmrm32    AVX512VL 
-VPMOVZXBD        ymmreg|mask|z,xmmrm64    AVX512VL 
-VPMOVZXBD        zmmreg|mask|z,xmmrm128   AVX512 
-VPMOVZXBQ        xmmreg|mask|z,xmmrm16    AVX512VL 
-VPMOVZXBQ        ymmreg|mask|z,xmmrm32    AVX512VL 
-VPMOVZXBQ        zmmreg|mask|z,xmmrm64    AVX512 
-VPMOVZXBW        xmmreg|mask|z,xmmrm64    AVX512VL/BW 
-VPMOVZXBW        ymmreg|mask|z,xmmrm128   AVX512VL/BW 
-VPMOVZXBW        zmmreg|mask|z,ymmrm256   AVX512BW 
-VPMOVZXDQ        xmmreg|mask|z,xmmrm64    AVX512VL 
-VPMOVZXDQ        ymmreg|mask|z,xmmrm128   AVX512VL 
-VPMOVZXDQ        zmmreg|mask|z,ymmrm256   AVX512 
-VPMOVZXWD        xmmreg|mask|z,xmmrm64    AVX512VL 
-VPMOVZXWD        ymmreg|mask|z,xmmrm128   AVX512VL 
-VPMOVZXWD        zmmreg|mask|z,ymmrm256   AVX512 
-VPMOVZXWQ        xmmreg|mask|z,xmmrm32    AVX512VL 
-VPMOVZXWQ        ymmreg|mask|z,xmmrm64    AVX512VL 
-VPMOVZXWQ        zmmreg|mask|z,xmmrm128   AVX512 
-VPMULDQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VPMULDQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VPMULDQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-VPMULHRSW        xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPMULHRSW        ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPMULHRSW        zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPMULHUW         xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPMULHUW         ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPMULHUW         zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPMULHW          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPMULHW          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPMULHW          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPMULLD          xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VPMULLD          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VPMULLD          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-VPMULLQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL/DQ 
-VPMULLQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL/DQ 
-VPMULLQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512DQ 
-VPMULLW          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPMULLW          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPMULLW          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPMULTISHIFTQB   xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL/VBMI 
-VPMULTISHIFTQB   ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL/VBMI 
-VPMULTISHIFTQB   zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512VBMI 
-VPMULUDQ         xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VPMULUDQ         ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VPMULUDQ         zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-VPORD            xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VPORD            ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VPORD            zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-VPORQ            xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VPORQ            ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VPORQ            zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-VPROLD           xmmreg|mask|z,xmmrm128|b32*,imm8 AVX512VL 
-VPROLD           ymmreg|mask|z,ymmrm256|b32*,imm8 AVX512VL 
-VPROLD           zmmreg|mask|z,zmmrm512|b32*,imm8 AVX512 
-VPROLQ           xmmreg|mask|z,xmmrm128|b64*,imm8 AVX512VL 
-VPROLQ           ymmreg|mask|z,ymmrm256|b64*,imm8 AVX512VL 
-VPROLQ           zmmreg|mask|z,zmmrm512|b64*,imm8 AVX512 
-VPROLVD          xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VPROLVD          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VPROLVD          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-VPROLVQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VPROLVQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VPROLVQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-VPRORD           xmmreg|mask|z,xmmrm128|b32*,imm8 AVX512VL 
-VPRORD           ymmreg|mask|z,ymmrm256|b32*,imm8 AVX512VL 
-VPRORD           zmmreg|mask|z,zmmrm512|b32*,imm8 AVX512 
-VPRORQ           xmmreg|mask|z,xmmrm128|b64*,imm8 AVX512VL 
-VPRORQ           ymmreg|mask|z,ymmrm256|b64*,imm8 AVX512VL 
-VPRORQ           zmmreg|mask|z,zmmrm512|b64*,imm8 AVX512 
-VPRORVD          xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VPRORVD          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VPRORVD          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-VPRORVQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VPRORVQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VPRORVQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-VPSADBW          xmmreg,xmmreg*,xmmrm128  AVX512VL/BW 
-VPSADBW          ymmreg,ymmreg*,ymmrm256  AVX512VL/BW 
-VPSADBW          zmmreg,zmmreg*,zmmrm512  AVX512BW 
-VPSCATTERDD      xmem32|mask,xmmreg       AVX512VL 
-VPSCATTERDD      ymem32|mask,ymmreg       AVX512VL 
-VPSCATTERDD      zmem32|mask,zmmreg       AVX512 
-VPSCATTERDQ      xmem64|mask,xmmreg       AVX512VL 
-VPSCATTERDQ      xmem64|mask,ymmreg       AVX512VL 
-VPSCATTERDQ      ymem64|mask,zmmreg       AVX512 
-VPSCATTERQD      xmem32|mask,xmmreg       AVX512VL 
-VPSCATTERQD      ymem32|mask,xmmreg       AVX512VL 
-VPSCATTERQD      zmem32|mask,ymmreg       AVX512 
-VPSCATTERQQ      xmem64|mask,xmmreg       AVX512VL 
-VPSCATTERQQ      ymem64|mask,ymmreg       AVX512VL 
-VPSCATTERQQ      zmem64|mask,zmmreg       AVX512 
-VPSHUFB          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPSHUFB          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPSHUFB          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPSHUFD          xmmreg|mask|z,xmmrm128|b32,imm8 AVX512VL 
-VPSHUFD          ymmreg|mask|z,ymmrm256|b32,imm8 AVX512VL 
-VPSHUFD          zmmreg|mask|z,zmmrm512|b32,imm8 AVX512 
-VPSHUFHW         xmmreg|mask|z,xmmrm128,imm8 AVX512VL/BW 
-VPSHUFHW         ymmreg|mask|z,ymmrm256,imm8 AVX512VL/BW 
-VPSHUFHW         zmmreg|mask|z,zmmrm512,imm8 AVX512BW 
-VPSHUFLW         xmmreg|mask|z,xmmrm128,imm8 AVX512VL/BW 
-VPSHUFLW         ymmreg|mask|z,ymmrm256,imm8 AVX512VL/BW 
-VPSHUFLW         zmmreg|mask|z,zmmrm512,imm8 AVX512BW 
-VPSLLD           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL 
-VPSLLD           ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL 
-VPSLLD           zmmreg|mask|z,zmmreg*,xmmrm128 AVX512 
-VPSLLD           xmmreg|mask|z,xmmrm128|b32*,imm8 AVX512VL 
-VPSLLD           ymmreg|mask|z,ymmrm256|b32*,imm8 AVX512VL 
-VPSLLD           zmmreg|mask|z,zmmrm512|b32*,imm8 AVX512 
-VPSLLDQ          xmmreg,xmmrm128*,imm8    AVX512VL/BW 
-VPSLLDQ          ymmreg,ymmrm256*,imm8    AVX512VL/BW 
-VPSLLDQ          zmmreg,zmmrm512*,imm8    AVX512BW 
-VPSLLQ           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL 
-VPSLLQ           ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL 
-VPSLLQ           zmmreg|mask|z,zmmreg*,xmmrm128 AVX512 
-VPSLLQ           xmmreg|mask|z,xmmrm128|b64*,imm8 AVX512VL 
-VPSLLQ           ymmreg|mask|z,ymmrm256|b64*,imm8 AVX512VL 
-VPSLLQ           zmmreg|mask|z,zmmrm512|b64*,imm8 AVX512 
-VPSLLVD          xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VPSLLVD          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VPSLLVD          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-VPSLLVQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VPSLLVQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VPSLLVQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-VPSLLVW          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPSLLVW          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPSLLVW          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPSLLW           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPSLLW           ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL/BW 
-VPSLLW           zmmreg|mask|z,zmmreg*,xmmrm128 AVX512BW 
-VPSLLW           xmmreg|mask|z,xmmrm128*,imm8 AVX512VL/BW 
-VPSLLW           ymmreg|mask|z,ymmrm256*,imm8 AVX512VL/BW 
-VPSLLW           zmmreg|mask|z,zmmrm512*,imm8 AVX512BW 
-VPSRAD           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL 
-VPSRAD           ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL 
-VPSRAD           zmmreg|mask|z,zmmreg*,xmmrm128 AVX512 
-VPSRAD           xmmreg|mask|z,xmmrm128|b32*,imm8 AVX512VL 
-VPSRAD           ymmreg|mask|z,ymmrm256|b32*,imm8 AVX512VL 
-VPSRAD           zmmreg|mask|z,zmmrm512|b32*,imm8 AVX512 
-VPSRAQ           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL 
-VPSRAQ           ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL 
-VPSRAQ           zmmreg|mask|z,zmmreg*,xmmrm128 AVX512 
-VPSRAQ           xmmreg|mask|z,xmmrm128|b64*,imm8 AVX512VL 
-VPSRAQ           ymmreg|mask|z,ymmrm256|b64*,imm8 AVX512VL 
-VPSRAQ           zmmreg|mask|z,zmmrm512|b64*,imm8 AVX512 
-VPSRAVD          xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VPSRAVD          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VPSRAVD          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-VPSRAVQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VPSRAVQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VPSRAVQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-VPSRAVW          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPSRAVW          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPSRAVW          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPSRAW           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPSRAW           ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL/BW 
-VPSRAW           zmmreg|mask|z,zmmreg*,xmmrm128 AVX512BW 
-VPSRAW           xmmreg|mask|z,xmmrm128*,imm8 AVX512VL/BW 
-VPSRAW           ymmreg|mask|z,ymmrm256*,imm8 AVX512VL/BW 
-VPSRAW           zmmreg|mask|z,zmmrm512*,imm8 AVX512BW 
-VPSRLD           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL 
-VPSRLD           ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL 
-VPSRLD           zmmreg|mask|z,zmmreg*,xmmrm128 AVX512 
-VPSRLD           xmmreg|mask|z,xmmrm128|b32*,imm8 AVX512VL 
-VPSRLD           ymmreg|mask|z,ymmrm256|b32*,imm8 AVX512VL 
-VPSRLD           zmmreg|mask|z,zmmrm512|b32*,imm8 AVX512 
-VPSRLDQ          xmmreg,xmmrm128*,imm8    AVX512VL/BW 
-VPSRLDQ          ymmreg,ymmrm256*,imm8    AVX512VL/BW 
-VPSRLDQ          zmmreg,zmmrm512*,imm8    AVX512BW 
-VPSRLQ           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL 
-VPSRLQ           ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL 
-VPSRLQ           zmmreg|mask|z,zmmreg*,xmmrm128 AVX512 
-VPSRLQ           xmmreg|mask|z,xmmrm128|b64*,imm8 AVX512VL 
-VPSRLQ           ymmreg|mask|z,ymmrm256|b64*,imm8 AVX512VL 
-VPSRLQ           zmmreg|mask|z,zmmrm512|b64*,imm8 AVX512 
-VPSRLVD          xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VPSRLVD          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VPSRLVD          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-VPSRLVQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VPSRLVQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VPSRLVQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-VPSRLVW          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPSRLVW          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPSRLVW          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPSRLW           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPSRLW           ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL/BW 
-VPSRLW           zmmreg|mask|z,zmmreg*,xmmrm128 AVX512BW 
-VPSRLW           xmmreg|mask|z,xmmrm128*,imm8 AVX512VL/BW 
-VPSRLW           ymmreg|mask|z,ymmrm256*,imm8 AVX512VL/BW 
-VPSRLW           zmmreg|mask|z,zmmrm512*,imm8 AVX512BW 
-VPSUBB           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPSUBB           ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPSUBB           zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPSUBD           xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VPSUBD           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VPSUBD           zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-VPSUBQ           xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VPSUBQ           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VPSUBQ           zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-VPSUBSB          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPSUBSB          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPSUBSB          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPSUBSW          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPSUBSW          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPSUBSW          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPSUBUSB         xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPSUBUSB         ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPSUBUSB         zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPSUBUSW         xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPSUBUSW         ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPSUBUSW         zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPSUBW           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPSUBW           ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPSUBW           zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPTERNLOGD       xmmreg|mask|z,xmmreg,xmmrm128|b32,imm8 AVX512VL 
-VPTERNLOGD       ymmreg|mask|z,ymmreg,ymmrm256|b32,imm8 AVX512VL 
-VPTERNLOGD       zmmreg|mask|z,zmmreg,zmmrm512|b32,imm8 AVX512 
-VPTERNLOGQ       xmmreg|mask|z,xmmreg,xmmrm128|b64,imm8 AVX512VL 
-VPTERNLOGQ       ymmreg|mask|z,ymmreg,ymmrm256|b64,imm8 AVX512VL 
-VPTERNLOGQ       zmmreg|mask|z,zmmreg,zmmrm512|b64,imm8 AVX512 
-VPTESTMB         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPTESTMB         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPTESTMB         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPTESTMD         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VPTESTMD         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VPTESTMD         kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-VPTESTMQ         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VPTESTMQ         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VPTESTMQ         kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-VPTESTMW         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPTESTMW         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPTESTMW         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPTESTNMB        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPTESTNMB        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPTESTNMB        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPTESTNMD        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-VPTESTNMD        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-VPTESTNMD        kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-VPTESTNMQ        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-VPTESTNMQ        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-VPTESTNMQ        kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-VPTESTNMW        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-VPTESTNMW        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-VPTESTNMW        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-VPUNPCKHBW       xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPUNPCKHBW       ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPUNPCKHBW       zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPUNPCKHDQ       xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VPUNPCKHDQ       ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VPUNPCKHDQ       zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-VPUNPCKHQDQ      xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VPUNPCKHQDQ      ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VPUNPCKHQDQ      zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-VPUNPCKHWD       xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPUNPCKHWD       ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPUNPCKHWD       zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPUNPCKLBW       xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPUNPCKLBW       ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPUNPCKLBW       zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPUNPCKLDQ       xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VPUNPCKLDQ       ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VPUNPCKLDQ       zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-VPUNPCKLQDQ      xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VPUNPCKLQDQ      ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VPUNPCKLQDQ      zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-VPUNPCKLWD       xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-VPUNPCKLWD       ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-VPUNPCKLWD       zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-VPXORD           xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VPXORD           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VPXORD           zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-VPXORQ           xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VPXORQ           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VPXORQ           zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-VRANGEPD         xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 AVX512VL/DQ 
-VRANGEPD         ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VL/DQ 
-VRANGEPD         zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae,imm8 AVX512DQ 
-VRANGEPS         xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 AVX512VL/DQ 
-VRANGEPS         ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 AVX512VL/DQ 
-VRANGEPS         zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae,imm8 AVX512DQ 
-VRANGESD         xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 AVX512DQ 
-VRANGESS         xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 AVX512DQ 
-VRCP14PD         xmmreg|mask|z,xmmrm128|b64 AVX512VL 
-VRCP14PD         ymmreg|mask|z,ymmrm256|b64 AVX512VL 
-VRCP14PD         zmmreg|mask|z,zmmrm512|b64 AVX512 
-VRCP14PS         xmmreg|mask|z,xmmrm128|b32 AVX512VL 
-VRCP14PS         ymmreg|mask|z,ymmrm256|b32 AVX512VL 
-VRCP14PS         zmmreg|mask|z,zmmrm512|b32 AVX512 
-VRCP14SD         xmmreg|mask|z,xmmreg*,xmmrm64 AVX512 
-VRCP14SS         xmmreg|mask|z,xmmreg*,xmmrm32 AVX512 
-VRCP28PD         zmmreg|mask|z,zmmrm512|b64|sae AVX512ER 
-VRCP28PS         zmmreg|mask|z,zmmrm512|b32|sae AVX512ER 
-VRCP28SD         xmmreg|mask|z,xmmreg*,xmmrm64|sae AVX512ER 
-VRCP28SS         xmmreg|mask|z,xmmreg*,xmmrm32|sae AVX512ER 
-VREDUCEPD        xmmreg|mask|z,xmmrm128|b64,imm8 AVX512VL/DQ 
-VREDUCEPD        ymmreg|mask|z,ymmrm256|b64,imm8 AVX512VL/DQ 
-VREDUCEPD        zmmreg|mask|z,zmmrm512|b64|sae,imm8 AVX512DQ 
-VREDUCEPS        xmmreg|mask|z,xmmrm128|b32,imm8 AVX512VL/DQ 
-VREDUCEPS        ymmreg|mask|z,ymmrm256|b32,imm8 AVX512VL/DQ 
-VREDUCEPS        zmmreg|mask|z,zmmrm512|b32|sae,imm8 AVX512DQ 
-VREDUCESD        xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 AVX512DQ 
-VREDUCESS        xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 AVX512DQ 
-VRNDSCALEPD      xmmreg|mask|z,xmmrm128|b64,imm8 AVX512VL 
-VRNDSCALEPD      ymmreg|mask|z,ymmrm256|b64,imm8 AVX512VL 
-VRNDSCALEPD      zmmreg|mask|z,zmmrm512|b64|sae,imm8 AVX512 
-VRNDSCALEPS      xmmreg|mask|z,xmmrm128|b32,imm8 AVX512VL 
-VRNDSCALEPS      ymmreg|mask|z,ymmrm256|b32,imm8 AVX512VL 
-VRNDSCALEPS      zmmreg|mask|z,zmmrm512|b32|sae,imm8 AVX512 
-VRNDSCALESD      xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 AVX512 
-VRNDSCALESS      xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 AVX512 
-VRSQRT14PD       xmmreg|mask|z,xmmrm128|b64 AVX512VL 
-VRSQRT14PD       ymmreg|mask|z,ymmrm256|b64 AVX512VL 
-VRSQRT14PD       zmmreg|mask|z,zmmrm512|b64 AVX512 
-VRSQRT14PS       xmmreg|mask|z,xmmrm128|b32 AVX512VL 
-VRSQRT14PS       ymmreg|mask|z,ymmrm256|b32 AVX512VL 
-VRSQRT14PS       zmmreg|mask|z,zmmrm512|b32 AVX512 
-VRSQRT14SD       xmmreg|mask|z,xmmreg*,xmmrm64 AVX512 
-VRSQRT14SS       xmmreg|mask|z,xmmreg*,xmmrm32 AVX512 
-VRSQRT28PD       zmmreg|mask|z,zmmrm512|b64|sae AVX512ER 
-VRSQRT28PS       zmmreg|mask|z,zmmrm512|b32|sae AVX512ER 
-VRSQRT28SD       xmmreg|mask|z,xmmreg*,xmmrm64|sae AVX512ER 
-VRSQRT28SS       xmmreg|mask|z,xmmreg*,xmmrm32|sae AVX512ER 
-VSCALEFPD        xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VSCALEFPD        ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VSCALEFPD        zmmreg|mask|z,zmmreg*,zmmrm512|b64|er AVX512 
-VSCALEFPS        xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VSCALEFPS        ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VSCALEFPS        zmmreg|mask|z,zmmreg*,zmmrm512|b32|er AVX512 
-VSCALEFSD        xmmreg|mask|z,xmmreg*,xmmrm64|er AVX512 
-VSCALEFSS        xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512 
-VSCATTERDPD      xmem64|mask,xmmreg       AVX512VL 
-VSCATTERDPD      xmem64|mask,ymmreg       AVX512VL 
-VSCATTERDPD      ymem64|mask,zmmreg       AVX512 
-VSCATTERDPS      xmem32|mask,xmmreg       AVX512VL 
-VSCATTERDPS      ymem32|mask,ymmreg       AVX512VL 
-VSCATTERDPS      zmem32|mask,zmmreg       AVX512 
-VSCATTERPF0DPD   ymem64|mask              AVX512PF 
-VSCATTERPF0DPS   zmem32|mask              AVX512PF 
-VSCATTERPF0QPD   zmem64|mask              AVX512PF 
-VSCATTERPF0QPS   zmem32|mask              AVX512PF 
-VSCATTERPF1DPD   ymem64|mask              AVX512PF 
-VSCATTERPF1DPS   zmem32|mask              AVX512PF 
-VSCATTERPF1QPD   zmem64|mask              AVX512PF 
-VSCATTERPF1QPS   zmem32|mask              AVX512PF 
-VSCATTERQPD      xmem64|mask,xmmreg       AVX512VL 
-VSCATTERQPD      ymem64|mask,ymmreg       AVX512VL 
-VSCATTERQPD      zmem64|mask,zmmreg       AVX512 
-VSCATTERQPS      xmem32|mask,xmmreg       AVX512VL 
-VSCATTERQPS      ymem32|mask,xmmreg       AVX512VL 
-VSCATTERQPS      zmem32|mask,ymmreg       AVX512 
-VSHUFF32X4       ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 AVX512VL 
-VSHUFF32X4       zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 AVX512 
-VSHUFF64X2       ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VL 
-VSHUFF64X2       zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 AVX512 
-VSHUFI32X4       ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 AVX512VL 
-VSHUFI32X4       zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 AVX512 
-VSHUFI64X2       ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VL 
-VSHUFI64X2       zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 AVX512 
-VSHUFPD          xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 AVX512VL 
-VSHUFPD          ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VL 
-VSHUFPD          zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 AVX512 
-VSHUFPS          xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 AVX512VL 
-VSHUFPS          ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 AVX512VL 
-VSHUFPS          zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 AVX512 
-VSQRTPD          xmmreg|mask|z,xmmrm128|b64 AVX512VL 
-VSQRTPD          ymmreg|mask|z,ymmrm256|b64 AVX512VL 
-VSQRTPD          zmmreg|mask|z,zmmrm512|b64|er AVX512 
-VSQRTPS          xmmreg|mask|z,xmmrm128|b32 AVX512VL 
-VSQRTPS          ymmreg|mask|z,ymmrm256|b32 AVX512VL 
-VSQRTPS          zmmreg|mask|z,zmmrm512|b32|er AVX512 
-VSQRTSD          xmmreg|mask|z,xmmreg*,xmmrm64|er AVX512 
-VSQRTSS          xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512 
-VSUBPD           xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VSUBPD           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VSUBPD           zmmreg|mask|z,zmmreg*,zmmrm512|b64|er AVX512 
-VSUBPS           xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VSUBPS           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VSUBPS           zmmreg|mask|z,zmmreg*,zmmrm512|b32|er AVX512 
-VSUBSD           xmmreg|mask|z,xmmreg*,xmmrm64|er AVX512 
-VSUBSS           xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512 
-VUCOMISD         xmmreg,xmmrm64|sae       AVX512 
-VUCOMISS         xmmreg,xmmrm32|sae       AVX512 
-VUNPCKHPD        xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VUNPCKHPD        ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VUNPCKHPD        zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-VUNPCKHPS        xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VUNPCKHPS        ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VUNPCKHPS        zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-VUNPCKLPD        xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-VUNPCKLPD        ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-VUNPCKLPD        zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-VUNPCKLPS        xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-VUNPCKLPS        ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-VUNPCKLPS        zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-VXORPD           xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL/DQ 
-VXORPD           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL/DQ 
-VXORPD           zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512DQ 
-VXORPS           xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL/DQ 
-VXORPS           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL/DQ 
-VXORPS           zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512DQ
-</pre>
-<h4 id="section-F.1.46">F.1.46 Intel memory protection keys for userspace (PKU aka PKEYs)</h4>
-<pre>
-RDPKRU                                    LONG 
-WRPKRU                                    LONG
-</pre>
-<h4 id="section-F.1.47">F.1.47 Read Processor ID</h4>
-<pre>
-RDPID            reg32                    NOLONG 
-RDPID            reg64                    LONG 
-RDPID            reg32                    LONG,UNDOC
-</pre>
-<h4 id="section-F.1.48">F.1.48 New memory instructions</h4>
-<pre>
-CLFLUSHOPT       mem                       
-CLWB             mem                       
-PCOMMIT                                   NEVER,NOP 
-CLZERO                                    AMD 
-CLZERO           reg_ax                   AMD,ND,NOLONG 
-CLZERO           reg_eax                  AMD,ND 
-CLZERO           reg_rax                  AMD,ND,LONG
-</pre>
-<h4 id="section-F.1.49">F.1.49 Processor trace write</h4>
-<pre>
-PTWRITE          rm32                      
-PTWRITE          rm64                     LONG
-</pre>
-<h4 id="section-F.1.50">F.1.50 Instructions from the Intel Instruction Set Extensions,</h4>
-<h4 id="section-F.1.51">F.1.51 doc 319433-034 May 2018</h4>
-<pre>
-CLDEMOTE         mem                       
-MOVDIRI          mem32,reg32              SD 
-MOVDIRI          mem64,reg64              LONG 
-MOVDIR64B        reg16,mem512             NOLONG 
-MOVDIR64B        reg32,mem512              
-MOVDIR64B        reg64,mem512             LONG 
-PCONFIG                                    
-TPAUSE           reg32                     
-TPAUSE           reg32,reg_edx,reg_eax    ND 
-UMONITOR         reg16                    NOLONG 
-UMONITOR         reg32                     
-UMONITOR         reg64                    LONG 
-UMWAIT           reg32                     
-UMWAIT           reg32,reg_edx,reg_eax    ND 
-WBNOINVD                                  
-</pre>
-<h4 id="section-F.1.52">F.1.52 Galois field operations (GFNI)</h4>
-<pre>
-GF2P8AFFINEINVQB xmmreg,xmmrm128,imm8     GFNI,SSE 
-VGF2P8AFFINEINVQB xmmreg,xmmreg*,xmmrm128,imm8 GFNI,AVX 
-VGF2P8AFFINEINVQB ymmreg,ymmreg*,ymmrm256,imm8 GFNI,AVX 
-VGF2P8AFFINEINVQB xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 AVX512VL,GFNI 
-VGF2P8AFFINEINVQB ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VL,GFNI 
-VGF2P8AFFINEINVQB zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 AVX512,GFNI 
-GF2P8AFFINEQB    xmmreg,xmmrm128,imm8     GFNI,SSE 
-VGF2P8AFFINEQB   xmmreg,xmmreg*,xmmrm128,imm8 GFNI,AVX 
-VGF2P8AFFINEQB   ymmreg,ymmreg*,ymmrm256,imm8 GFNI,AVX 
-VGF2P8AFFINEQB   xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 AVX512VL,GFNI 
-VGF2P8AFFINEQB   ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VL,GFNI 
-VGF2P8AFFINEQB   zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 AVX512,GFNI 
-GF2P8MULB        xmmreg,xmmrm128          GFNI,SSE 
-VGF2P8MULB       xmmreg,xmmreg*,xmmrm128  GFNI,AVX 
-VGF2P8MULB       ymmreg,ymmreg*,ymmrm256  GFNI,AVX 
-VGF2P8MULB       xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL,GFNI 
-VGF2P8MULB       ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL,GFNI 
-VGF2P8MULB       zmmreg|mask|z,zmmreg*,zmmrm512 AVX512,GFNI
-</pre>
-<h4 id="section-F.1.53">F.1.53 AVX512 Vector Bit Manipulation Instructions 2</h4>
-<pre>
-VPCOMPRESSB      mem128|mask,xmmreg       AVX512VBMI2/VL 
-VPCOMPRESSB      mem256|mask,ymmreg       AVX512VBMI2/VL 
-VPCOMPRESSB      mem512|mask,zmmreg       AVX512VBMI2 
-VPCOMPRESSB      xmmreg|mask|z,xmmreg     AVX512VBMI2/VL 
-VPCOMPRESSB      ymmreg|mask|z,ymmreg     AVX512VBMI2/VL 
-VPCOMPRESSB      zmmreg|mask|z,zmmreg     AVX512VBMI2 
-VPCOMPRESSW      mem128|mask,xmmreg       AVX512VBMI2/VL 
-VPCOMPRESSW      mem256|mask,ymmreg       AVX512VBMI2/VL 
-VPCOMPRESSW      mem512|mask,zmmreg       AVX512VBMI2 
-VPCOMPRESSW      xmmreg|mask|z,xmmreg     AVX512VBMI2/VL 
-VPCOMPRESSW      ymmreg|mask|z,ymmreg     AVX512VBMI2/VL 
-VPCOMPRESSW      zmmreg|mask|z,zmmreg     AVX512VBMI2 
-VPEXPANDB        xmmreg|mask|z,xmmrm128   AVX512VBMI2/VL 
-VPEXPANDB        ymmreg|mask|z,ymmrm256   AVX512VBMI2/VL 
-VPEXPANDB        zmmreg|mask|z,zmmrm512   AVX512VBMI2 
-VPEXPANDW        xmmreg|mask|z,xmmrm128   AVX512VBMI2/VL 
-VPEXPANDW        ymmreg|mask|z,ymmrm256   AVX512VBMI2/VL 
-VPEXPANDW        zmmreg|mask|z,zmmrm512   AVX512VBMI2 
-VPSHLDW          xmmreg|mask|z,xmmreg*,xmmrm128,imm8 AVX512VBMI2/VL 
-VPSHLDW          ymmreg|mask|z,ymmreg*,ymmrm256,imm8 AVX512VBMI2/VL 
-VPSHLDW          zmmreg|mask|z,zmmreg*,zmmrm512,imm8 AVX512VBMI2 
-VPSHLDD          xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 AVX512VBMI2/VL 
-VPSHLDD          ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 AVX512VBMI2/VL 
-VPSHLDD          zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 AVX512VBMI2 
-VPSHLDQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 AVX512VBMI2/VL 
-VPSHLDQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VBMI2/VL 
-VPSHLDQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 AVX512VBMI2 
-VPSHLDVW         xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VBMI2/VL 
-VPSHLDVW         ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VBMI2/VL 
-VPSHLDVW         zmmreg|mask|z,zmmreg*,zmmrm512 AVX512VBMI2 
-VPSHLDVD         xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VBMI2/VL 
-VPSHLDVD         ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VBMI2/VL 
-VPSHLDVD         zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512VBMI2 
-VPSHLDVQ         xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VBMI2/VL 
-VPSHLDVQ         ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VBMI2/VL 
-VPSHLDVQ         zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512VBMI2 
-VPSHRDW          xmmreg|mask|z,xmmreg*,xmmrm128,imm8 AVX512VBMI2/VL 
-VPSHRDW          ymmreg|mask|z,ymmreg*,ymmrm256,imm8 AVX512VBMI2/VL 
-VPSHRDW          zmmreg|mask|z,zmmreg*,zmmrm512,imm8 AVX512VBMI2 
-VPSHRDD          xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 AVX512VBMI2/VL 
-VPSHRDD          ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 AVX512VBMI2/VL 
-VPSHRDD          zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 AVX512VBMI2 
-VPSHRDQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 AVX512VBMI2/VL 
-VPSHRDQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VBMI2/VL 
-VPSHRDQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 AVX512VBMI2 
-VPSHRDVW         xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VBMI2/VL 
-VPSHRDVW         ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VBMI2/VL 
-VPSHRDVW         zmmreg|mask|z,zmmreg*,zmmrm512 AVX512VBMI2 
-VPSHRDVD         xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VBMI2/VL 
-VPSHRDVD         ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VBMI2/VL 
-VPSHRDVD         zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512VBMI2 
-VPSHRDVQ         xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VBMI2/VL 
-VPSHRDVQ         ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VBMI2/VL 
-VPSHRDVQ         zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512VBMI2
-</pre>
-<h4 id="section-F.1.54">F.1.54 AVX512 VNNI</h4>
-<pre>
-VPDPBUSD         xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VNNI/VL 
-VPDPBUSD         ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VNNI/VL 
-VPDPBUSD         zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512VNNI 
-VPDPBUSDS        xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VNNI/VL 
-VPDPBUSDS        ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VNNI/VL 
-VPDPBUSDS        zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512VNNI 
-VPDPWSSD         xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VNNI/VL 
-VPDPWSSD         ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VNNI/VL 
-VPDPWSSD         zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512VNNI 
-VPDPWSSDS        xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VNNI/VL 
-VPDPWSSDS        ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VNNI/VL 
-VPDPWSSDS        zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512VNNI
-</pre>
-<h4 id="section-F.1.55">F.1.55 AVX512 Bit Algorithms</h4>
-<pre>
-VPOPCNTB         xmmreg|mask|z,xmmrm128   AVX512BITALG/VL 
-VPOPCNTB         ymmreg|mask|z,ymmrm256   AVX512BITALG/VL 
-VPOPCNTB         zmmreg|mask|z,zmmrm512   AVX512BITALG 
-VPOPCNTW         xmmreg|mask|z,xmmrm128   AVX512BITALG/VL 
-VPOPCNTW         ymmreg|mask|z,ymmrm256   AVX512BITALG/VL 
-VPOPCNTW         zmmreg|mask|z,zmmrm512   AVX512BITALG 
-VPOPCNTD         xmmreg|mask|z,xmmrm128   AVX512VPOPCNTDQ/VL 
-VPOPCNTD         ymmreg|mask|z,ymmrm256   AVX512VPOPCNTDQ/VL 
-VPOPCNTD         zmmreg|mask|z,zmmrm512   AVX512VPOPCNTDQ 
-VPOPCNTQ         xmmreg|mask|z,xmmrm128   AVX512VPOPCNTDQ/VL 
-VPOPCNTQ         ymmreg|mask|z,ymmrm256   AVX512VPOPCNTDQ/VL 
-VPOPCNTQ         zmmreg|mask|z,zmmrm512   AVX512VPOPCNTDQ 
-VPSHUFBITQMB     kreg|mask,xmmreg,xmmrm128 AVX512BITALG/VL 
-VPSHUFBITQMB     kreg|mask,ymmreg,ymmrm256 AVX512BITALG/VL 
-VPSHUFBITQMB     kreg|mask,zmmreg,zmmrm512 AVX512BITALG
-</pre>
-<h4 id="section-F.1.56">F.1.56 AVX512 4-iteration Multiply-Add</h4>
-<pre>
-V4FMADDPS        zmmreg|mask|z,zmmreg|rs4,mem AVX5124FMAPS,SO 
-V4FNMADDPS       zmmreg|mask|z,zmmreg|rs4,mem AVX5124FMAPS,SO 
-V4FMADDSS        zmmreg|mask|z,zmmreg|rs4,mem AVX5124FMAPS,SO 
-V4FNMADDSS       zmmreg|mask|z,zmmreg|rs4,mem AVX5124FMAPS,SO
-</pre>
-<h4 id="section-F.1.57">F.1.57 AVX512 4-iteration Dot Product</h4>
-<pre>
-V4DPWSSDS        zmmreg|mask|z,zmmreg|rs4,mem AVX5124VNNIW,SO 
-V4DPWSSD         zmmreg|mask|z,zmmreg|rs4,mem AVX5124VNNIW,SO
-</pre>
-<h4 id="section-F.1.58">F.1.58 Intel Software Guard Extensions (SGX)</h4>
-<pre>
-ENCLS                                     SGX 
-ENCLU                                     SGX 
-ENCLV                                     SGX
-</pre>
-<h4 id="section-F.1.59">F.1.59 Intel Control-Flow Enforcement Technology (CET)</h4>
-<pre>
-CLRSSBSY         mem64                    CET 
-ENDBR32                                   CET 
-ENDBR64                                   CET 
-INCSSPD          reg32                    CET 
-INCSSPQ          reg64                    CET,LONG 
-RDSSPD           reg32                    CET 
-RDSSPQ           reg64                    CET,LONG 
-RSTORSSP         mem64                    CET 
-SAVEPREVSSP                               CET 
-SETSSBSY                                  CET 
-WRUSSD           mem32,reg32              CET 
-WRUSSQ           mem64,reg64              CET,LONG 
-WRSSD            mem32,reg32              CET 
-WRSSQ            mem64,reg64              CET,LONG
-</pre>
-<h4 id="section-F.1.60">F.1.60 Instructions from ISE doc 319433-040, June 2020</h4>
-<pre>
-ENQCMD           reg16,mem512             ENQCMD,SZ,NOLONG 
-ENQCMD           reg32,mem512             ENQCMD,SZ,NOLONG,ND 
-ENQCMD           reg32,mem512             ENQCMD,SZ 
-ENQCMD           reg64,mem512             ENQCMD,SZ,LONG 
-ENQCMDS          reg16,mem512             ENQCMD,SZ,NOLONG,PRIV 
-ENQCMDS          reg32,mem512             ENQCMD,SZ,NOLONG,PRIV,ND 
-ENQCMDS          reg32,mem512             ENQCMD,SZ,PRIV 
-ENQCMDS          reg64,mem512             ENQCMD,SZ,PRIV,LONG 
-PCONFIG                                   PCONFIG,PRIV 
-SERIALIZE                                 SERIALIZE 
-WBNOINVD                                  WBNOINVD,PRIV 
-XRESLDTRK                                 TSXLDTRK 
-XSUSLDTRK                                 TSXLDTRK
-</pre>
-<h4 id="section-F.1.61">F.1.61 AVX512 Bfloat16 instructions</h4>
-<pre>
-VCVTNE2PS2BF16   xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512BF16 
-VCVTNE2PS2BF16   ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512BF16 
-VCVTNE2PS2BF16   zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512BF16 
-VCVTNEPS2BF16    xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512BF16 
-VCVTNEPS2BF16    ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512BF16 
-VCVTNEPS2BF16    zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512BF16 
-VDPBF16PS        xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512BF16 
-VDPBF16PS        ymmreg|mask|z,ymmreg*,ymmrm128|b32 AVX512BF16 
-VDPBF16PS        zmmreg|mask|z,zmmreg*,zmmrm128|b32 AVX512BF16
-</pre>
-<h4 id="section-F.1.62">F.1.62 AVX512 mask intersect instructions</h4>
-<pre>
-VP2INTERSECTD    kreg|rs2,xmmreg,xmmrm128|b32 AVX512BF16 
-VP2INTERSECTD    kreg|rs2,ymmreg,ymmrm128|b32 AVX512BF16 
-VP2INTERSECTD    kreg|rs2,zmmreg,zmmrm128|b32 AVX512BF16
-</pre>
-<h4 id="section-F.1.63">F.1.63 Intel Advanced Matrix Extensions (AMX)</h4>
-<pre>
-LDTILECFG        mem512                   AMXTILE,SZ,LONG 
-STTILECFG        mem512                   AMXTILE,SZ,LONG 
-TDPBF16PS        tmmreg,tmmreg,tmmreg     AMXBF16,LONG 
-TDPBSSD          tmmreg,tmmreg,tmmreg     AMXINT8,LONG 
-TDPBSUD          tmmreg,tmmreg,tmmreg     AMXINT8,LONG 
-TDPBUSD          tmmreg,tmmreg,tmmreg     AMXINT8,LONG 
-TDPBUUD          tmmreg,tmmreg,tmmreg     AMXINT8,LONG 
-TILELOADD        tmmreg,mem               AMXTILE,MIB,SIB,SX,LONG 
-TILELOADDT1      tmmreg,mem               AMXTILE,MIB,SIB,SX,LONG 
-TILERELEASE                               AMXTILE,LONG 
-TILESTORED       mem,tmmreg               AMXTILE,MIB,SIB,SX,LONG 
-TILEZERO         tmmreg                   AMXTILE,LONG
-</pre>
-<h4 id="section-F.1.64">F.1.64 Intel AVX512-FP16 instructions</h4>
-<pre>
-VADDPH           xmmreg|mask|z,xmmreg*,xmmrm16|b16 AVX512FP16/VL 
-VADDPH           ymmreg|mask|z,ymmreg*,ymmrm16|b16 AVX512FP16/VL 
-VADDPH           zmmreg|mask|z,zmmreg*,zmmrm16|b16|er AVX512FP16 
-VADDSH           xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-VCMPPH           kreg|mask,xmmreg*,xmmrm16|b16,imm8 AVX512FP16/VL 
-VCMPPH           kreg|mask,ymmreg*,ymmrm16|b16,imm8 AVX512FP16/VL 
-VCMPPH           kreg|mask,zmmreg*,zmmrm16|b16|sae,imm8 AVX512FP16 
-VCMPSH           kreg|mask,xmmreg*,xmmrm16|sae,imm8 AVX512FP16 
-VCOMISH          xmmreg,xmmrm16|sae       AVX512FP16 
-VCVTDQ2PH        xmmreg|mask|z,xmmrm128|b32 AVX512FP16/VL 
-VCVTDQ2PH        ymmreg|mask|z,ymmrm256|b32 AVX512FP16/VL 
-VCVTDQ2PH        zmmreg|mask|z,zmmrm512|b32|er AVX512FP16 
-VCVTPD2PH        xmmreg|mask|z,xmmrm128|b64 AVX512FP16/VL 
-VCVTPD2PH        ymmreg|mask|z,ymmrm256|b64 AVX512FP16/VL 
-VCVTPD2PH        zmmreg|mask|z,zmmrm512|b64|er AVX512FP16 
-VCVTPH2DQ        xmmreg|mask|z,xmmrm64|b16 AVX512FP16/VL 
-VCVTPH2DQ        ymmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-VCVTPH2DQ        zmmreg|mask|z,ymmrm256|b16|er AVX512FP16 
-VCVTPH2PD        xmmreg|mask|z,xmmrm32|b16 AVX512FP16/VL 
-VCVTPH2PD        ymmreg|mask|z,xmmrm64|b16 AVX512FP16/VL 
-VCVTPH2PD        zmmreg|mask|z,xmmrm128|b16|sae AVX512FP16 
-VCVTPH2PS        xmmreg,xmmrm64           AVX512FC16 
-VCVTPH2PS        ymmreg,xmmrm128          AVX512FC16 
-VCVTPH2PS        xmmreg|mask|z,xmmrm64    AVX512VL 
-VCVTPH2PS        ymmreg|mask|z,xmmrm128   AVX512VL 
-VCVTPH2PS        zmmreg|mask|z,ymmrm256|sae AVX512 
-VCVTPH2PSX       xmmreg|mask|z,xmmrm64|b16 AVX512FP16/VL 
-VCVTPH2PSX       ymmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-VCVTPH2PSX       zmmreg|mask|z,ymmrm256|b16|sae AVX512FP16 
-VCVTPH2QQ        xmmreg|mask|z,xmmrm32|b16 AVX512FP16/VL 
-VCVTPH2QQ        ymmreg|mask|z,xmmrm64|b16 AVX512FP16/VL 
-VCVTPH2QQ        zmmreg|mask|z,xmmrm128|b16|er AVX512FP16 
-VCVTPH2UDQ       xmmreg|mask|z,xmmrm32|b16 AVX512FP16/VL 
-VCVTPH2UDQ       ymmreg|mask|z,xmmrm64|b16 AVX512FP16/VL 
-VCVTPH2UDQ       zmmreg|mask|z,xmmrm128|b16|er AVX512FP16 
-VCVTPH2UQQ       xmmreg|mask|z,xmmrm32|b16 AVX512FP16/VL 
-VCVTPH2UQQ       ymmreg|mask|z,xmmrm64|b16 AVX512FP16/VL 
-VCVTPH2UQQ       zmmreg|mask|z,xmmrm128|b16|er AVX512FP16 
-VCVTPH2UW        xmmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-VCVTPH2UW        ymmreg|mask|z,ymmrm256|b16 AVX512FP16/VL 
-VCVTPH2UW        zmmreg|mask|z,zmmrm512|b16|er AVX512FP16 
-VCVTPH2W         xmmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-VCVTPH2W         ymmreg|mask|z,ymmrm256|b16 AVX512FP16/VL 
-VCVTPH2W         zmmreg|mask|z,zmmrm512|b16|er AVX512FP16 
-VCVTPS2PH        xmmrm64,xmmreg,imm8      AVX512FC16/VL 
-VCVTPS2PH        xmmrm128,ymmreg,imm8     AVX512FC16/VL 
-VCVTPS2PH        xmmreg|mask|z,xmmreg,imm8 AVX512VL 
-VCVTPS2PH        mem64|mask,xmmreg,imm8   AVX512VL 
-VCVTPS2PH        xmmreg|mask|z,ymmreg,imm8 AVX512VL 
-VCVTPS2PH        mem128|mask,ymmreg,imm8  AVX512VL 
-VCVTPS2PH        ymmreg|mask|z,zmmreg|sae,imm8 AVX512 
-VCVTPS2PH        mem256|mask,zmmreg|sae,imm8 AVX512 
-VCVTPS2PH        xmmreg|mask|z,xmmrm128|b32 AVX512FP16/VL 
-VCVTPS2PH        ymmreg|mask|z,ymmrm256|b32 AVX512FP16/VL 
-VCVTPS2PH        zmmreg|mask|z,zmmrm512|b32|er AVX512FP16 
-VCVTQQ2PH        xmmreg|mask|z,xmmrm128|b64 AVX512FP16/VL 
-VCVTQQ2PH        ymmreg|mask|z,ymmrm256|b64 AVX512FP16/VL 
-VCVTQQ2PH        zmmreg|mask|z,zmmrm512|b64|er AVX512FP16/VL 
-VCVTSD2SH        xmmreg|mask|z,xmmreg*,xmmrm64|er AVX512FP16 
-VCVTSH2SD        xmmreg,xmmreg*,xmmrm16|sae AVX512FP16 
-VCVTSH2SI        reg32,xmmrm16|er         AVX512FP16 
-VCVTSH2SI        reg64,xmmrm16|er         AVX512FP16 
-VCVTSH2SS        xmmreg|mask|z,xmmreg*,xmmrm16|sae AVX512FP16 
-VCVTSH2USI       reg32,xmmrm16|er         AVX512FP16 
-VCVTSH2USI       reg64,xmmrm16|er         AVX512FP16 
-VCVTSI2SH        xmmreg,xmmreg*,rm32|er   AVX512FP16 
-VCVTSI2SH        xmmreg,xmmreg*,rm64|er   AVX512FP16 
-VCVTSS2SH        xmmreg,xmmreg*,xmmrm32|er AVX512FP16 
-VCVTTPH2DQ       xmmreg|mask|z,xmmrm64|b16 AVX512FP16/VL 
-VCVTTPH2DQ       ymmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-VCVTTPH2DQ       zmmreg|mask|z,ymmrm256|b16|sae AVX512FP16 
-VCVTTPH2QQ       xmmreg|mask|z,xmmrm32|b16 AVX512FP16/VL 
-VCVTTPH2QQ       ymmreg|mask|z,xmmrm64|b16 AVX512FP16/VL 
-VCVTTPH2QQ       zmmreg|mask|z,xmmrm128|b16|sae AVX512FP16 
-VCVTTPH2UDQ      xmmreg|mask|z,xmmrm64|b16 AVX512FP16/VL 
-VCVTTPH2UDQ      ymmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-VCVTTPH2UDQ      zmmreg|mask|z,ymmrm256|b16|sae AVX512FP16 
-VCVTTPH2UQQ      xmmreg|mask|z,xmmrm32|b16 AVX512FP16/VL 
-VCVTTPH2UQQ      ymmreg|mask|z,xmmrm64|b16 AVX512FP16/VL 
-VCVTTPH2UQQ      zmmreg|mask|z,xmmrm128|b16|sae AVX512FP16 
-VCVTTPH2UW       xmmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-VCVTTPH2UW       ymmreg|mask|z,ymmrm256|b16 AVX512FP16/VL 
-VCVTTPH2UW       zmmreg|mask|z,zmmrm512|b16|sae AVX512FP16 
-VCVTTPH2W        xmmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-VCVTTPH2W        ymmreg|mask|z,ymmrm256|b16 AVX512FP16/VL 
-VCVTTPH2W        zmmreg|mask|z,zmmrm512|b16|sae AVX512FP16 
-VCVTTSH2SI       reg32,xmmrm16|sae        AVX512FP16 
-VCVTTSH2SI       reg64,xmmrm16|sae        AVX512FP16 
-VCVTTSH2USI      reg32,xmmrm16|sae        AVX512FP16 
-VCVTTSH2USI      reg64,xmmrm16|sae        AVX512FP16 
-VCVTUDQ2PH       xmmreg|mask|z,xmmrm128|b32 AVX512FP16/VL 
-VCVTUDQ2PH       ymmreg|mask|z,ymmrm256|b32 AVX512FP16/VL 
-VCVTUDQ2PH       zmmreg|mask|z,zmmrm512|b32 AVX512FP16 
-VCVTUQQ2PH       xmmreg|mask|z,xmmrm128|b32 AVX512FP16/VL 
-VCVTUQQ2PH       ymmreg|mask|z,ymmrm256|b32 AVX512FP16/VL 
-VCVTUQQ2PH       zmmreg|mask|z,zmmrm512|b32 AVX512FP16 
-VCVTUSI2SH       xmmreg,xmmreg|er,rm32|er AVX512FP16 
-VCVTUSI2SS       xmmreg,xmmreg|er,rm64|er AVX512FP16 
-VCVTUW2PH        xmmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-VCVTUW2PH        ymmreg|mask|z,ymmrm256|b16 AVX512FP16/VL 
-VCVTUW2PH        zmmreg|mask|z,zmmrm512|b16|er AVX512FP16 
-VCVTW2PH         xmmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-VCVTW2PH         ymmreg|mask|z,ymmrm256|b16 AVX512FP16/VL 
-VCVTW2PH         zmmreg|mask|z,zmmrm512|b16|er AVX512FP16 
-VDIVPH           xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-VDIVPH           ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-VDIVPH           zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-VDIVSH           xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-VFCMADDCPH       xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512FP16/VL 
-VFCMADDCPH       ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512FP16/VL 
-VFCMADDCPH       zmmreg|mask|z,zmmreg*,zmmrm512|b32|er AVX512FP16/VL 
-VFMADDCPH        xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512FP16/VL 
-VFMADDCPH        ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512FP16/VL 
-VFMADDCPH        zmmreg|mask|z,zmmreg*,zmmrm512|b32|er AVX512FP16/VL 
-VFCMADDCSH       xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512FP16 
-VFMADDCSH        xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512FP16 
-VFCMULCPCH       xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512FP16/VL 
-VFCMULCPCH       ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512FP16/VL 
-VFCMULCPCH       zmmreg|mask|z,zmmreg*,zmmrm512|b32|er AVX512FP16/VL 
-VFMULCPCH        xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512FP16/VL 
-VFMULCPCH        ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512FP16/VL 
-VFMULCPCH        zmmreg|mask|z,zmmreg*,zmmrm512|b32|er AVX512FP16/VL 
-VFCMULCSH        xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512FP16 
-VFMULCSH         xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512FP16 
-VFMADDSUB132PH   xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-VFMADDSUB132PH   ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-VFMADDSUB132PH   zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-VFMADDSUB213PH   xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-VFMADDSUB213PH   ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-VFMADDSUB213PH   zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-VFMADDSUB231PH   xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-VFMADDSUB231PH   ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-VFMADDSUB231PH   zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-VFMSUBADD132PH   xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-VFMSUBADD132PH   ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-VFMSUBADD132PH   zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-VFMSUBADD213PH   xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-VFMSUBADD213PH   ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-VFMSUBADD213PH   zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-VFMSUBADD231PH   xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-VFMSUBADD231PH   ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-VFMSUBADD231PH   zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-VPMADD132PH      xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-VPMADD132PH      ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-VPMADD132PH      zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-VPMADD213PH      xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-VPMADD213PH      ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-VPMADD213PH      zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-VPMADD231PH      xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-VPMADD231PH      ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-VPMADD231PH      zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-VFMADD132PH      xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-VFMADD132PH      ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-VFMADD132PH      zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-VFMADD213PH      xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-VFMADD213PH      ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-VFMADD213PH      zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-VFMADD231PH      xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-VFMADD231PH      ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-VFMADD231PH      zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-VPMADD132SH      xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-VPMADD213SH      xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-VPMADD231SH      xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-VPNMADD132SH     xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-VPNMADD213SH     xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-VPNMADD231SH     xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-VPMSUB132PH      xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-VPMSUB132PH      ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-VPMSUB132PH      zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-VPMSUB213PH      xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-VPMSUB213PH      ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-VPMSUB213PH      zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-VPMSUB231PH      xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-VPMSUB231PH      ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-VPMSUB231PH      zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-VFMSUB132PH      xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-VFMSUB132PH      ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-VFMSUB132PH      zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-VFMSUB213PH      xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-VFMSUB213PH      ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-VFMSUB213PH      zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-VFMSUB231PH      xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-VFMSUB231PH      ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-VFMSUB231PH      zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-VPMSUB132SH      xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-VPMSUB213SH      xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-VPMSUB231SH      xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-VPNMSUB132SH     xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-VPNMSUB213SH     xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-VPNMSUB231SH     xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-VFPCLASSPH       kreg|mask,xmmrm128|b16,imm8 AVX512FP16/VL 
-VFPCLASSPH       kreg|mask,ymmrm256|b16,imm8 AVX512FP16/VL 
-VFPCLASSPH       kreg|mask,zmmrm512|b16,imm8 AVX512FP16 
-VFPCLASSSH       kreg|mask,xmmrm16,imm8   AVX512FP16 
-VGETEXPPH        xmmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-VGETEXPPH        ymmreg|mask|z,ymmrm256|b16 AVX512FP16/VL 
-VGETEXPPH        zmmreg|mask|z,zmmrm512|b16|sae AVX512FP16 
-VGETEXPSH        xmmreg|mask|z,xmmrm16|sae AVX512FP16 
-VGETMANTPH       xmmreg|mask|z,xmmrm128|b16,imm8 AVX512FP16/VL 
-VGETMANTPH       ymmreg|mask|z,ymmrm256|b16,imm8 AVX512FP16/VL 
-VGETMANTPH       zmmreg|mask|z,zmmrm512|b16|sae,imm8 AVX512FP16 
-VGETMANTSH       xmmreg|mask|z,xmmrm16|sae,imm8 AVX512FP16 
-VGETMAXPH        xmmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-VGETMAXPH        ymmreg|mask|z,ymmrm256|b16 AVX512FP16/VL 
-VGETMAXPH        zmmreg|mask|z,zmmrm512|b16|sae AVX512FP16 
-VGETMAXSH        xmmreg|mask|z,xmmrm16|sae AVX512FP16 
-VGETMINPH        xmmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-VGETMINPH        ymmreg|mask|z,xmmrm256|b16 AVX512FP16/VL 
-VGETMINPH        zmmreg|mask|z,zmmrm512|b16|sae AVX512FP16 
-VGETMINSH        xmmreg|mask|z,xmmrm16|sae AVX512FP16 
-VMOVSH           xmmreg|mask|z,mem16      AVX512FP16 
-VMOVSH           mem16|mask,xmmreg        AVX512FP16 
-VMOVSH           xmmreg|mask|z,xmmreg*,xmmreg AVX512FP16 
-VMOVSH           xmmreg|mask|z,xmmreg*,xmmreg AVX512FP16 
-VMOVW            xmmreg|mask|z,rm16       AVX512FP16 
-VMOVW            rm16,xmmreg              AVX512FP16 
-VMULPH           xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-VMULPH           ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-VMULPH           zmmreg|mask|z,zmmreg*,zmmrm512|b16 AVX512FP16 
-VMULSH           xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-VRCPPH           xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-VRCPPH           ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-VRCPPH           zmmreg|mask|z,zmmreg*,zmmrm512|b16 AVX512FP16 
-VRCPSH           xmmreg|mask|z,xmmreg*,xmmrm16|sae AVX512FP16 
-VREDUCEPH        xmmreg|mask|z,xmmrm128|b16,imm8 AVX512FP16/VL 
-VREDUCEPH        ymmreg|mask|z,ymmrm256|b16,imm8 AVX512FP16/VL 
-VREDUCEPH        zmmreg|mask|z,zmmrm512|b16|sae,imm8 AVX512FP16 
-VREDUCESH        xmmreg|mask|z,xmmreg*,xmmrm16|sae,imm8 AVX512FP16 
-VENDSCALEPH      xmmreg|mask|z,xmmrm128|b16,imm8 AVX512FP16/VL 
-VENDSCALEPH      ymmreg|mask|z,ymmrm256|b16,imm8 AVX512FP16/VL 
-VENDSCALEPH      zmmreg|mask|z,zmmrm512|b16|sae,imm8 AVX512FP16 
-VENDSCALESH      xmmreg|mask|z,xmmreg*,xmmrm16|sae,imm8 AVX512FP16 
-VRSQRTPH         xmmreg|mask|z,xmmrm128|b16,imm8 AVX512FP16/VL 
-VRSQRTPH         ymmreg|mask|z,ymmrm256|b16,imm8 AVX512FP16/VL 
-VRSQRTPH         zmmreg|mask|z,zmmrm512|b16|sae,imm8 AVX512FP16 
-VRSQRTSH         xmmreg|mask|z,xmmreg*,xmmrm16|sae,imm8 AVX512FP16 
-VSCALEFPH        xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-VSCALEFPH        ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-VSCALEFPH        zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-VSCALEFSH        xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-VSQRTPH          xmmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-VSQRTPH          ymmreg|mask|z,ymmrm256|b16 AVX512FP16/VL 
-VSQRTPH          zmmreg|mask|z,zmmrm512|b16|er AVX512FP16 
-VSQRTSH          xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-VSUBPH           xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-VSUBPH           ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-VSUBPH           zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-VSUBSH           xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-VUCOMISH         xmmreg,xmmrm16|sae       AVX512FP16
-</pre>
-<h4 id="section-F.1.65">F.1.65 RAO-INT weakly ordered atomic operations</h4>
-<pre>
-AADD             mem32,reg32              RAOINT,SD 
-AADD             mem64,reg64              RAOINT,LONG 
-AAND             mem32,reg32              RAOINT,SD 
-AAND             mem64,reg64              RAOINT,LONG 
-AXOR             mem32,reg32              RAOINT,SD 
-AXOR             mem64,reg64              RAOINT,LONG
-</pre>
-<h4 id="section-F.1.66">F.1.66 User interrupts</h4>
-<pre>
-CLUI                                      UINTR,LONG 
-SENDUIPI         reg64                    UINTR,LONG 
-STUI                                      UINTR,LONG 
-TESTUI                                    UINTR,LONG 
-UIRET                                     UINTR,LONG
-</pre>
-<h4 id="section-F.1.67">F.1.67 Compare, exchange and add conditional</h4>
-<pre>
-CMPccXADD        mem32,reg32,reg32        CMPCCXADD,LONG,SD 
-CMPccXADD        mem64,reg64,reg64        CMPCCXADD,LONG
-</pre>
-<h4 id="section-F.1.68">F.1.68 WRMSRNS and MSRLIST instructions</h4>
-<pre>
-WRMSRNS                                   WRMSRNS,PRIV,LONG 
-RDMSRLIST                                 MSRLIST,PRIV,LONG 
-WRMSRLIST                                 MSRLIST,PRIV,LONG
-</pre>
-<h4 id="section-F.1.69">F.1.69 History reset</h4>
-<pre>
-HRESET           imm,reg_eax              HRESET,PRIV 
-HRESET           imm                      HRESET,PRIV,ND
-</pre>
-<h4 id="section-F.1.70">F.1.70 Systematic names for the hinting nop instructions</h4>
-<pre>
-HINT_NOP0        rm16                     P6,UNDOC 
-HINT_NOP0        rm32                     P6,UNDOC 
-HINT_NOP0        rm64                     X86_64,LONG,UNDOC 
-HINT_NOP1        rm16                     P6,UNDOC 
-HINT_NOP1        rm32                     P6,UNDOC 
-HINT_NOP1        rm64                     X86_64,LONG,UNDOC 
-HINT_NOP2        rm16                     P6,UNDOC 
-HINT_NOP2        rm32                     P6,UNDOC 
-HINT_NOP2        rm64                     X86_64,LONG,UNDOC 
-HINT_NOP3        rm16                     P6,UNDOC 
-HINT_NOP3        rm32                     P6,UNDOC 
-HINT_NOP3        rm64                     X86_64,LONG,UNDOC 
-HINT_NOP4        rm16                     P6,UNDOC 
-HINT_NOP4        rm32                     P6,UNDOC 
-HINT_NOP4        rm64                     X86_64,LONG,UNDOC 
-HINT_NOP5        rm16                     P6,UNDOC 
-HINT_NOP5        rm32                     P6,UNDOC 
-HINT_NOP5        rm64                     X86_64,LONG,UNDOC 
-HINT_NOP6        rm16                     P6,UNDOC 
-HINT_NOP6        rm32                     P6,UNDOC 
-HINT_NOP6        rm64                     X86_64,LONG,UNDOC 
-HINT_NOP7        rm16                     P6,UNDOC 
-HINT_NOP7        rm32                     P6,UNDOC 
-HINT_NOP7        rm64                     X86_64,LONG,UNDOC 
-HINT_NOP8        rm16                     P6,UNDOC 
-HINT_NOP8        rm32                     P6,UNDOC 
-HINT_NOP8        rm64                     X86_64,LONG,UNDOC 
-HINT_NOP9        rm16                     P6,UNDOC 
-HINT_NOP9        rm32                     P6,UNDOC 
-HINT_NOP9        rm64                     X86_64,LONG,UNDOC 
-HINT_NOP10       rm16                     P6,UNDOC 
-HINT_NOP10       rm32                     P6,UNDOC 
-HINT_NOP10       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP11       rm16                     P6,UNDOC 
-HINT_NOP11       rm32                     P6,UNDOC 
-HINT_NOP11       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP12       rm16                     P6,UNDOC 
-HINT_NOP12       rm32                     P6,UNDOC 
-HINT_NOP12       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP13       rm16                     P6,UNDOC 
-HINT_NOP13       rm32                     P6,UNDOC 
-HINT_NOP13       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP14       rm16                     P6,UNDOC 
-HINT_NOP14       rm32                     P6,UNDOC 
-HINT_NOP14       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP15       rm16                     P6,UNDOC 
-HINT_NOP15       rm32                     P6,UNDOC 
-HINT_NOP15       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP16       rm16                     P6,UNDOC 
-HINT_NOP16       rm32                     P6,UNDOC 
-HINT_NOP16       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP17       rm16                     P6,UNDOC 
-HINT_NOP17       rm32                     P6,UNDOC 
-HINT_NOP17       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP18       rm16                     P6,UNDOC 
-HINT_NOP18       rm32                     P6,UNDOC 
-HINT_NOP18       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP19       rm16                     P6,UNDOC 
-HINT_NOP19       rm32                     P6,UNDOC 
-HINT_NOP19       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP20       rm16                     P6,UNDOC 
-HINT_NOP20       rm32                     P6,UNDOC 
-HINT_NOP20       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP21       rm16                     P6,UNDOC 
-HINT_NOP21       rm32                     P6,UNDOC 
-HINT_NOP21       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP22       rm16                     P6,UNDOC 
-HINT_NOP22       rm32                     P6,UNDOC 
-HINT_NOP22       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP23       rm16                     P6,UNDOC 
-HINT_NOP23       rm32                     P6,UNDOC 
-HINT_NOP23       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP24       rm16                     P6,UNDOC 
-HINT_NOP24       rm32                     P6,UNDOC 
-HINT_NOP24       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP25       rm16                     P6,UNDOC 
-HINT_NOP25       rm32                     P6,UNDOC 
-HINT_NOP25       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP26       rm16                     P6,UNDOC 
-HINT_NOP26       rm32                     P6,UNDOC 
-HINT_NOP26       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP27       rm16                     P6,UNDOC 
-HINT_NOP27       rm32                     P6,UNDOC 
-HINT_NOP27       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP28       rm16                     P6,UNDOC 
-HINT_NOP28       rm32                     P6,UNDOC 
-HINT_NOP28       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP29       rm16                     P6,UNDOC 
-HINT_NOP29       rm32                     P6,UNDOC 
-HINT_NOP29       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP30       rm16                     P6,UNDOC 
-HINT_NOP30       rm32                     P6,UNDOC 
-HINT_NOP30       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP31       rm16                     P6,UNDOC 
-HINT_NOP31       rm32                     P6,UNDOC 
-HINT_NOP31       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP32       rm16                     P6,UNDOC 
-HINT_NOP32       rm32                     P6,UNDOC 
-HINT_NOP32       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP33       rm16                     P6,UNDOC 
-HINT_NOP33       rm32                     P6,UNDOC 
-HINT_NOP33       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP34       rm16                     P6,UNDOC 
-HINT_NOP34       rm32                     P6,UNDOC 
-HINT_NOP34       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP35       rm16                     P6,UNDOC 
-HINT_NOP35       rm32                     P6,UNDOC 
-HINT_NOP35       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP36       rm16                     P6,UNDOC 
-HINT_NOP36       rm32                     P6,UNDOC 
-HINT_NOP36       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP37       rm16                     P6,UNDOC 
-HINT_NOP37       rm32                     P6,UNDOC 
-HINT_NOP37       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP38       rm16                     P6,UNDOC 
-HINT_NOP38       rm32                     P6,UNDOC 
-HINT_NOP38       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP39       rm16                     P6,UNDOC 
-HINT_NOP39       rm32                     P6,UNDOC 
-HINT_NOP39       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP40       rm16                     P6,UNDOC 
-HINT_NOP40       rm32                     P6,UNDOC 
-HINT_NOP40       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP41       rm16                     P6,UNDOC 
-HINT_NOP41       rm32                     P6,UNDOC 
-HINT_NOP41       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP42       rm16                     P6,UNDOC 
-HINT_NOP42       rm32                     P6,UNDOC 
-HINT_NOP42       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP43       rm16                     P6,UNDOC 
-HINT_NOP43       rm32                     P6,UNDOC 
-HINT_NOP43       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP44       rm16                     P6,UNDOC 
-HINT_NOP44       rm32                     P6,UNDOC 
-HINT_NOP44       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP45       rm16                     P6,UNDOC 
-HINT_NOP45       rm32                     P6,UNDOC 
-HINT_NOP45       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP46       rm16                     P6,UNDOC 
-HINT_NOP46       rm32                     P6,UNDOC 
-HINT_NOP46       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP47       rm16                     P6,UNDOC 
-HINT_NOP47       rm32                     P6,UNDOC 
-HINT_NOP47       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP48       rm16                     P6,UNDOC 
-HINT_NOP48       rm32                     P6,UNDOC 
-HINT_NOP48       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP49       rm16                     P6,UNDOC 
-HINT_NOP49       rm32                     P6,UNDOC 
-HINT_NOP49       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP50       rm16                     P6,UNDOC 
-HINT_NOP50       rm32                     P6,UNDOC 
-HINT_NOP50       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP51       rm16                     P6,UNDOC 
-HINT_NOP51       rm32                     P6,UNDOC 
-HINT_NOP51       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP52       rm16                     P6,UNDOC 
-HINT_NOP52       rm32                     P6,UNDOC 
-HINT_NOP52       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP53       rm16                     P6,UNDOC 
-HINT_NOP53       rm32                     P6,UNDOC 
-HINT_NOP53       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP54       rm16                     P6,UNDOC 
-HINT_NOP54       rm32                     P6,UNDOC 
-HINT_NOP54       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP55       rm16                     P6,UNDOC 
-HINT_NOP55       rm32                     P6,UNDOC 
-HINT_NOP55       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP56       rm16                     P6,UNDOC 
-HINT_NOP56       rm32                     P6,UNDOC 
-HINT_NOP56       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP57       rm16                     P6,UNDOC 
-HINT_NOP57       rm32                     P6,UNDOC 
-HINT_NOP57       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP58       rm16                     P6,UNDOC 
-HINT_NOP58       rm32                     P6,UNDOC 
-HINT_NOP58       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP59       rm16                     P6,UNDOC 
-HINT_NOP59       rm32                     P6,UNDOC 
-HINT_NOP59       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP60       rm16                     P6,UNDOC 
-HINT_NOP60       rm32                     P6,UNDOC 
-HINT_NOP60       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP61       rm16                     P6,UNDOC 
-HINT_NOP61       rm32                     P6,UNDOC 
-HINT_NOP61       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP62       rm16                     P6,UNDOC 
-HINT_NOP62       rm32                     P6,UNDOC 
-HINT_NOP62       rm64                     X86_64,LONG,UNDOC 
-HINT_NOP63       rm16                     P6,UNDOC 
-HINT_NOP63       rm32                     P6,UNDOC 
-HINT_NOP63       rm64                     X86_64,LONG,UNDOC
-</pre>
-</div>
-</body>
-</html>

_service:tar_scm:nasm-2.16.01-xdoc.tar.xz/doc/html/nasmdoci.html Deleted

@@ -1,7582 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.1//EN" "http://www.w3.org/TR/xhtml11/DTD/xhtml11.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<meta charset="UTF-8" />
-<title>NASM - The Netwide Assembler</title>
-<link href="nasmdoc.css" rel="stylesheet" type="text/css" />
-<link href="local.css" rel="stylesheet" type="text/css" />
-</head>
-<body>
-<ul class="navbar">
-<li class="first"><a class="prev" href="nasmdoce.html">Appendix E</a></li>
-<li><a class="toc" href="nasmdoc0.html">Contents</a></li>
-<li class="last"><a class="index" href="nasmdoci.html">Index</a></li>
-</ul>
-<div class="title">
-<h1>NASM - The Netwide Assembler</h1>
-<span class="subtitle">version 2.16.01</span>
-</div>
-<div class="contents"
->
-<h2 class="index">Index</h2>
-<div class="index">
-<ul>
-<li>
-<div class="term">
-<code>!</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.12">3.5.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>!=</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.5">3.5.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>$</code>, current address
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5">3.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>$</code>, prefix
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.1">3.1</a>, <a href="nasmdoc3.html#section-3.4.1">3.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>$$</code> token
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5">3.5</a>, <a href="nasmdoc8.html#section-8.9.3">8.9.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%,</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.2.12">4.2.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.2.3">4.2.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.6">4.1.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.11">3.5.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%</code> prefix to <code>DB</code> lists
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2.1">3.2.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%!</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.8">4.1.8</a>, <a href="nasmdoc4.html#section-4.13.2">4.13.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%$</code> and <code>%$$</code> prefixes
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.9.2">4.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%%</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.11">3.5.11</a>, <a href="nasmdoc4.html#section-4.5.2">4.5.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%*?</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.2.6">4.2.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%*??</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.2.6">4.2.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%+</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.6">4.1.6</a>, <a href="nasmdoc4.html#section-4.2.4">4.2.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%+1</code> and <code>%-1</code> syntax
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.10">4.5.10</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%?</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.2.5">4.2.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%??</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.2.5">4.2.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%00</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.7">4.5.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%0</code> parameter count
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.5">4.5.5</a>, <a href="nasmdoc4.html#section-4.5.6">4.5.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%abs()</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.4.1">4.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%arg</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.10.1">4.10.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%assign</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.2.8">4.2.8</a>, <a href="nasmdoc4.html#section-4.4.4">4.4.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%clear</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.13.3">4.13.3</a>, <a href="nasmdoc5.html">5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%cond()</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.4.2">4.4.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%count()</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.4.3">4.4.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%defalias</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.2.11">4.2.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%define</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.20">2.1.20</a>, <a href="nasmdoc4.html#section-4.2.1">4.2.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%defstr</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.2.9">4.2.9</a>, <a href="nasmdoc4.html#section-4.4.8">4.4.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%deftok</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.2.10">4.2.10</a>, <a href="nasmdoc4.html#section-4.4.12">4.4.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%depend</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.8.3">4.8.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%elif</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6">4.6</a>, <a href="nasmdoc4.html#section-4.6.4">4.6.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%elifctx</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.3">4.6.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%elifdef</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.1">4.6.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%elifempty</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.8">4.6.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%elifenv</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.9">4.6.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%elifid</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.6">4.6.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%elifidn</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.5">4.6.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%elifidni</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.5">4.6.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%elifmacro</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.2">4.6.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%elifn</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6">4.6</a>, <a href="nasmdoc4.html#section-4.6.4">4.6.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%elifnctx</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.3">4.6.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%elifndef</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.1">4.6.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%elifnempty</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.8">4.6.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%elifnenv</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.9">4.6.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%elifnid</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.6">4.6.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%elifnidn</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.5">4.6.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%elifnidni</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.5">4.6.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%elifnmacro</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.2">4.6.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%elifnnum</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.6">4.6.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%elifnstr</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.6">4.6.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%elifntoken</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.7">4.6.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%elifnum</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.6">4.6.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%elifstr</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.6">4.6.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%eliftoken</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.7">4.6.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%else</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6">4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%endrep</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.7">4.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%error</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.11">4.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%eval()</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.2.8">4.2.8</a>, <a href="nasmdoc4.html#section-4.4.4">4.4.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%exitrep</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.7">4.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%fatal</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.11">4.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%iassign</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.2.8">4.2.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%idefalias</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.2.11">4.2.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%idefine</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.2.1">4.2.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%idefstr</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.2.9">4.2.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%ideftok</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.2.10">4.2.10</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%if</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.4">4.1.4</a>, <a href="nasmdoc4.html#section-4.4.5">4.4.5</a>,
- <a href="nasmdoc4.html#section-4.6">4.6</a>, <a href="nasmdoc4.html#section-4.6.4">4.6.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%ifctx</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.3">4.6.3</a>, <a href="nasmdoc4.html#section-4.9.6">4.9.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%ifdef</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.1">4.6.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%ifempty</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.8">4.6.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%ifenv</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.9">4.6.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%ifid</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.6">4.6.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%ifidn</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.5">4.6.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%ifidni</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.5">4.6.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%ifmacro</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.2">4.6.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%ifn</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6">4.6</a>, <a href="nasmdoc4.html#section-4.6.4">4.6.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%ifnctx</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.3">4.6.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%ifndef</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.1">4.6.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%ifnempty</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.8">4.6.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%ifnenv</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.9">4.6.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%ifnid</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.6">4.6.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%ifnidn</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.5">4.6.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%ifnidni</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.5">4.6.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%ifnmacro</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.2">4.6.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%ifnnum</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.6">4.6.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%ifnstr</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.6">4.6.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%ifntoken</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.7">4.6.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%ifnum</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.6">4.6.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%ifstr</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.6">4.6.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%iftoken</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.7">4.6.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%imacro</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.4">4.1.4</a>, <a href="nasmdoc4.html#section-4.5">4.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%include</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.18">2.1.18</a>, <a href="nasmdoc2.html#section-2.1.19">2.1.19</a>,
- <a href="nasmdoc4.html#section-4.8.1">4.8.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%is()</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.4.5">4.4.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%ixdefine</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.2.2">4.2.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%line</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.33">2.1.33</a>, <a href="nasmdoc4.html#section-4.1.3">4.1.3</a>,
- <a href="nasmdoc4.html#section-4.1.8">4.1.8</a>, <a href="nasmdoc4.html#section-4.13.1">4.13.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%local</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.10.3">4.10.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%macro</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.4">4.1.4</a>, <a href="nasmdoc4.html#section-4.5">4.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%num()</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.4.6">4.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%pathsearch</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.18">2.1.18</a>, <a href="nasmdoc4.html#section-4.8.2">4.8.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%pop</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.9">4.9</a>, <a href="nasmdoc4.html#section-4.9.1">4.9.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%pragma</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.12">4.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%push</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.9">4.9</a>, <a href="nasmdoc4.html#section-4.9.1">4.9.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%rep</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2.5">3.2.5</a>, <a href="nasmdoc4.html#section-4.1.4">4.1.4</a>,
- <a href="nasmdoc4.html#section-4.7">4.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%repl</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.9.5">4.9.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%rotate</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.8">4.5.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%sel()</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.4.2">4.4.2</a>, <a href="nasmdoc4.html#section-4.4.7">4.4.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%stacksize</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.10.2">4.10.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%str()</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.2.9">4.2.9</a>, <a href="nasmdoc4.html#section-4.4.8">4.4.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%strcat</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.3.1">4.3.1</a>, <a href="nasmdoc4.html#section-4.4.9">4.4.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%strcat()</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.4.9">4.4.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%strlen</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.3.2">4.3.2</a>, <a href="nasmdoc4.html#section-4.4.10">4.4.10</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%strlen()</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.4.10">4.4.10</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%substr</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.3.3">4.3.3</a>, <a href="nasmdoc4.html#section-4.4.11">4.4.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%substr()</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.4.11">4.4.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%tok()</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.2.10">4.2.10</a>, <a href="nasmdoc4.html#section-4.4.12">4.4.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%undef</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.21">2.1.21</a>, <a href="nasmdoc4.html#section-4.2.7">4.2.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%unimacro</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.12">4.5.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%unmacro</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.12">4.5.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%use</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.8.4">4.8.4</a>, <a href="nasmdoc6.html">6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%warning</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.11">4.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>%xdefine</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.2.2">4.2.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>&amp;</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.8">3.5.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>&amp;&amp;</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.4">3.5.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>*</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.11">3.5.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>+</code> modifier
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.3">4.5.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>+</code> operator, binary
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.10">3.5.10</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>+</code> operator, unary
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.12">3.5.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-</code> operator, binary
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.10">3.5.10</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-</code> operator, unary
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.12">3.5.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>--before</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.30">2.1.30</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>--(g|l)postfix</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.28">2.1.28</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>--(g|l)prefix</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.28">2.1.28</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>--keep-all</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.32">2.1.32</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>--limit-X</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.31">2.1.31</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>--no-line</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.33">2.1.33</a>, <a href="nasmdoc4.html#section-4.13.1">4.13.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>--pragma</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.29">2.1.29</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>--reproducible</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.34">2.1.34</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>--v</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.27">2.1.27</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-a</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.23">2.1.23</a>, <a href="nasmdocb.html#section-B.2.3">B.2.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-b</code>
-</div>
-<div class="ref">
-<a href="nasmdocb.html#section-B.2">B.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-D</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.20">2.1.20</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-d</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.20">2.1.20</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-E</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.22">2.1.22</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-e</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.22">2.1.22</a>, <a href="nasmdocb.html#section-B.2.4">B.2.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-F</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.13">2.1.13</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-f</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.2">2.1.2</a>, <a href="nasmdoc8.html">8</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-g</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.14">2.1.14</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-h</code>
-</div>
-<div class="ref">
-<a href="nasmdocb.html#section-B.2">B.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-I</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.18">2.1.18</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-i</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.18">2.1.18</a>, <a href="nasmdocb.html#section-B.2.3">B.2.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-k</code>
-</div>
-<div class="ref">
-<a href="nasmdocb.html#section-B.2.4">B.2.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-L</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.4">2.1.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-l</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.3">2.1.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-M</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.5">2.1.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-MD</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.8">2.1.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-MF</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.7">2.1.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-MG</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.6">2.1.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-MP</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.11">2.1.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-MQ</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.10">2.1.10</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-MT</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.9">2.1.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-MW</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.12">2.1.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-O</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.24">2.1.24</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-o</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.1">2.1.1</a>, <a href="nasmdocb.html#section-B.2.1">B.2.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-P</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.19">2.1.19</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-p</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.19">2.1.19</a>, <a href="nasmdoc4.html#section-4.8.1">4.8.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-r</code>
-</div>
-<div class="ref">
-<a href="nasmdocb.html#section-B.2">B.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-s</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.17">2.1.17</a>, <a href="nasmdocb.html#section-B.2.2">B.2.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-soname</code>
-</div>
-<div class="ref">
-<a href="nasmdo10.html#section-10.2.6">10.2.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-t</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.25">2.1.25</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-U</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.21">2.1.21</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-u</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.21">2.1.21</a>, <a href="nasmdocb.html#section-B.2">B.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-v</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.27">2.1.27</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-W</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.26">2.1.26</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-w</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.26">2.1.26</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-Werror</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.26">2.1.26</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-Wno-error</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.26">2.1.26</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-X</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.15">2.1.15</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>-Z</code> option
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.16">2.1.16</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>..@</code> symbol prefix
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.9">3.9</a>, <a href="nasmdoc4.html#section-4.5.2">4.5.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>..got</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.3">8.9.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>..gotoff</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.3">8.9.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>..gotpc</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.3">8.9.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>..gottpoff</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.4">8.9.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>..plt</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.3">8.9.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>..start</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.6">8.4.6</a>, <a href="nasmdoc9.html#section-9.1.1">9.1.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>..sym</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.3">8.9.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>..tlsie</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.4">8.9.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>.bss</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>, <a href="nasmdoc8.html#section-8.10">8.10</a>,
- <a href="nasmdoc8.html#section-8.11">8.11</a>, <a href="nasmdoc8.html#section-8.12">8.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>.COM</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.1">8.1</a>, <a href="nasmdoc9.html#section-9.2">9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>.comment</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>.data</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>, <a href="nasmdoc8.html#section-8.10">8.10</a>,
- <a href="nasmdoc8.html#section-8.11">8.11</a>, <a href="nasmdoc8.html#section-8.12">8.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>.drectve</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.5.1">8.5.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>.EXE</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4">8.4</a>, <a href="nasmdoc9.html#section-9.1">9.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>.lbss</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>.ldata</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>.lrodata</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>.nolist</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.11">4.5.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>.obj</code>
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.1">9.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>.rodata</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>.SYS</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.1">8.1</a>, <a href="nasmdoc9.html#section-9.3">9.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>.tbss</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>.tdata</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>.text</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>, <a href="nasmdoc8.html#section-8.10">8.10</a>,
- <a href="nasmdoc8.html#section-8.11">8.11</a>, <a href="nasmdoc8.html#section-8.12">8.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>/</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.11">3.5.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>//</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.11">3.5.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>&lt;</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.5">3.5.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>&lt;&lt;</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.9">3.5.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>&lt;&lt;&lt;</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.9">3.5.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>&lt;=</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.5">3.5.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>&lt;=&gt;</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.5">3.5.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>&lt;=&gt;</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.5">3.5.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>&lt;&gt;</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.5">3.5.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>=</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.5">3.5.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>==</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.5">3.5.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>&gt;</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.5">3.5.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>&gt;=</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.5">3.5.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>&gt;&gt;</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.9">3.5.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>&gt;&gt;&gt;</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.9">3.5.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>?</code>, data syntax
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2.1">3.2.1</a>, <a href="nasmdoc3.html#section-3.2.2">3.2.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>?</code>, operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.1">3.5.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-\c{section
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.1.2">8.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>^</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.7">3.5.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>^^</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.3">3.5.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?ALIGNMODE?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc6.html#section-6.2">6.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?bfloat16?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.6">3.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?BITS?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.3">5.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?DATE?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.6">5.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?DATE_NUM?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.6">5.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?DEBUG_FORMAT?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.5">5.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?FILE?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.2">5.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?FLOAT?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.12">7.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?FLOAT_DAZ?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.12">7.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?FLOAT_ROUND?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.12">7.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?float8?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.6">3.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?float16?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.6">3.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?float32?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.6">3.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?float64?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.6">3.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?float80e?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.6">3.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?float80m?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.6">3.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?float128h?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.6">3.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?float128l?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.6">3.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?Infinity?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.6">3.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?LINE?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.2">5.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?NaN?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.6">3.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?NASM_MAJOR?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.1">5.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?NASM_MINOR?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.1">5.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?NASM_PATCHLEVEL?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.1">5.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?NASM_SNAPSHOT?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.1">5.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?NASM_SUBMINOR?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.1">5.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?NASM_VER?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.1.2">5.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?NASM_VERSION_ID?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.1.1">5.1.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?OUTPUT_FORMAT?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.4">5.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?PASS?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.8">5.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?QNaN?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.6">3.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?SECT?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.3.1">7.3.1</a>, <a href="nasmdoc7.html#section-7.4">7.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?SNaN?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.6">3.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?TIME?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.6">5.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?TIME_NUM?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.6">5.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?USE_*?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.7">5.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?UTC_DATE?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.6">5.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?UTC_DATE_NUM?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.6">5.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?UTC_TIME?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.6">5.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?UTC_TIME_NUM?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.6">5.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?utf16?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.5">3.4.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?utf16be?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.5">3.4.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?utf16le?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.5">3.4.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?utf32?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.5">3.4.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?utf32be?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.5">3.4.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__?utf32le?__</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.5">3.4.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>__NASMDEFSEG</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4">8.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>_DATA</code>
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.4.2">9.4.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>_GLOBAL_OFFSET_TABLE_</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.3">8.9.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>_TEXT</code>
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.4.2">9.4.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-`nowait'
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.2.6">2.2.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>|</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.6">3.5.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>||</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.2">3.5.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>~</code> operator
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.12">3.5.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-1's complement
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.12">3.5.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-2's complement
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.12">3.5.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-16-bit mode, versus 32-bit mode
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.1">7.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-64-bit displacement
-</div>
-<div class="ref">
-<a href="nasmdo12.html#section-12.2">12.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-64-bit immediate
-</div>
-<div class="ref">
-<a href="nasmdo12.html#section-12.2">12.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>a.out</code>, BSD version
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.11">8.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>a.out</code>, Linux version
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.10">8.10</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>A16</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.1">3.1</a>, <a href="nasmdo11.html#section-11.3">11.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>A32</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.1">3.1</a>, <a href="nasmdo11.html#section-11.3">11.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>A64</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.1">3.1</a>, <a href="nasmdo11.html#section-11.3">11.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>a86</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.2">2.2</a>, <a href="nasmdoc2.html#section-2.2.2">2.2.2</a>,
- <a href="nasmdoc2.html#section-2.2.6">2.2.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>ABS</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.3">3.3</a>, <a href="nasmdoc7.html#section-7.2.1">7.2.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>ABSOLUTE</code>
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.4">7.4</a>, <a href="nasmdoc8.html#section-8.4.1">8.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-addition
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.10">3.5.10</a>
-</div>
-</li>
-<li>
-<div class="term">
-address-size prefixes
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.1">3.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-addressing, mixed-size
-</div>
-<div class="ref">
-<a href="nasmdo11.html#section-11.2">11.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-algebra
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.3">3.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>ALIGN</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.10.1">5.10.1</a>, <a href="nasmdoc6.html#section-6.2">6.2</a>,
- <a href="nasmdoc8.html#section-8.1.2">8.1.2</a>, <a href="nasmdoc8.html#section-8.4.1">8.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>ALIGN</code>, smart
-</div>
-<div class="ref">
-<a href="nasmdoc6.html#section-6.2">6.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-align, elf attribute
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>ALIGNB</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.10.1">5.10.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-alignment
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.10">5.10</a>
-</div>
-</li>
-<li>
-<div class="term">
-alignment, in <code>bin</code> sections
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.1.2">8.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-alignment, in ELF sections
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-alignment, in <code>obj</code> sections
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.1">8.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-alignment, in <code>win32</code> sections
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.5.1">8.5.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-alignment, of ELF common variables
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.7">8.9.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>ALIGNMODE</code>
-</div>
-<div class="ref">
-<a href="nasmdoc6.html#section-6.2">6.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>ALINK</code>
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.1.1">9.1.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>alink.sourceforge.net</code>
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.1.1">9.1.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>alloc</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-alternate register names
-</div>
-<div class="ref">
-<a href="nasmdoc6.html#section-6.1">6.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>altreg</code>
-</div>
-<div class="ref">
-<a href="nasmdoc6.html#section-6.1">6.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-ambiguity
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.2.3">2.2.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>aout</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.10">8.10</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>aoutb</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.11">8.11</a>, <a href="nasmdo10.html#section-10.2">10.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>arg</code>
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.4.5">9.4.5</a>, <a href="nasmdo10.html#section-10.1.4">10.1.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>as86</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.12">8.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-assembler directives
-</div>
-<div class="ref">
-<a href="nasmdoc7.html">7</a>
-</div>
-</li>
-<li>
-<div class="term">
-assembly-time options
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.20">2.1.20</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>ASSUME</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.2.4">2.2.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>AT</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.9.2">5.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>auto-sync</code>
-</div>
-<div class="ref">
-<a href="nasmdocb.html#section-B.2.3">B.2.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-baddb
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2.1">3.2.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>bf16</code>
-</div>
-<div class="ref">
-<a href="nasmdoc6.html#section-6.3">6.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>bfloat16</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.6">3.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>bin</code> output format
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.2">2.1.2</a>, <a href="nasmdoc8.html#section-8.1">8.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-bin, multisection
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.1.3">8.1.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-binary
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.1">3.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-binary files
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2.3">3.2.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-bit shift
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.9">3.5.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>BITS</code>
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.1">7.1</a>, <a href="nasmdoc8.html#section-8.1">8.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-bitwise AND
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.8">3.5.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-bitwise OR
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.6">3.5.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-bitwise XOR
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.7">3.5.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-block IFs
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.9.6">4.9.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>BND</code>
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.2.2">7.2.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-boolean, AND
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.4">3.5.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-boolean, OR
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.2">3.5.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-boolean, XOR
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.3">3.5.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-boot loader
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.1">8.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-boot sector
-</div>
-<div class="ref">
-<a href="nasmdo13.html#section-13.1.3">13.1.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-Borland, Pascal
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.5">9.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-Borland, Win32 compilers
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4">8.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-braces, after <code>%</code> sign
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.9">4.5.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-braces, around macro parameters
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5">4.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-BSD
-</div>
-<div class="ref">
-<a href="nasmdo10.html#section-10.2">10.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-bug tracker
-</div>
-<div class="ref">
-<a href="nasmdoce.html#section-E.2">E.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-bugs
-</div>
-<div class="ref">
-<a href="nasmdoce.html#section-E.2">E.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>BYTE</code>
-</div>
-<div class="ref">
-<a href="nasmdo13.html#section-13.1.1">13.1.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-C calling convention
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.4.3">9.4.3</a>, <a href="nasmdo10.html#section-10.1.2">10.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-C symbol names
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.4.1">9.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>c16.mac</code>
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.4.5">9.4.5</a>, <a href="nasmdoc9.html#section-9.5.3">9.5.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>c32.mac</code>
-</div>
-<div class="ref">
-<a href="nasmdo10.html#section-10.1.4">10.1.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>CALL FAR</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.6">3.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-case sensitivity
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.2.1">2.2.1</a>, <a href="nasmdoc4.html#section-4.2.1">4.2.1</a>,
- <a href="nasmdoc4.html#section-4.2.2">4.2.2</a>, <a href="nasmdoc4.html#section-4.2.8">4.2.8</a>,
- <a href="nasmdoc4.html#section-4.5">4.5</a>, <a href="nasmdoc4.html#section-4.6.5">4.6.5</a>,
- <a href="nasmdoc8.html#section-8.4.3">8.4.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-changing sections
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.3">7.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-character constant
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2.1">3.2.1</a>, <a href="nasmdoc3.html#section-3.4.3">3.4.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-character strings
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.2">3.4.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-circular references
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.2.1">4.2.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>CLASS</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.1">8.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-CodeView debugging format
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.5.3">8.5.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>coff</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.7">8.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-colon
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.1">3.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-comdat section, in win32
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.5.1">8.5.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-comdat symbol, in win32
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.5.1">8.5.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-comdat, win32 attribute
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.5.1">8.5.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-comma
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.4">4.5.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-command-line
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1">2.1</a>, <a href="nasmdoc8.html">8</a>
-</div>
-</li>
-<li>
-<div class="term">
-commas in macro parameters
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.3">4.5.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-comment
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.1">3.1</a>, <a href="nasmdoc4.html#section-4.1.2">4.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-comment, ending in <code>\</code>
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.2">4.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-comment, removal
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.2">4.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-comment, syntax
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.2">4.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>COMMON</code>
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.8">7.8</a>, <a href="nasmdoc8.html#section-8.4.1">8.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>COMMON</code>, ELF extensions to
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.7">8.9.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>COMMON</code>, <code>obj</code> extensions to
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.8">8.4.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-Common Object File Format
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.7">8.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-common variables
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.8">7.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-common variables, alignment in ELF
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.7">8.9.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-common variables, element size
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.8">8.4.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>comp.os.msdos.programmer</code>
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.3">9.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-comparison operators
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.5">3.5.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-concatenating macro parameters
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.9">4.5.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-concatenating strings
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.3.1">4.3.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-concatenation
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.6">4.1.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-condition codes as macro parameters
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.10">4.5.10</a>
-</div>
-</li>
-<li>
-<div class="term">
-conditional assembly
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.4">4.1.4</a>, <a href="nasmdoc4.html#section-4.6">4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-conditional comma operator
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.2.12">4.2.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-conditional jumps
-</div>
-<div class="ref">
-<a href="nasmdo13.html#section-13.1.2">13.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-conditional-return macro
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.10">4.5.10</a>
-</div>
-</li>
-<li>
-<div class="term">
-constants
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4">3.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-context fall-through lookup
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.9.4">4.9.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-context stack
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.9">4.9</a>, <a href="nasmdoc4.html#section-4.9.6">4.9.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-context-local labels
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.8">4.1.8</a>, <a href="nasmdoc4.html#section-4.9.2">4.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-context-local single-line macros
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.9.3">4.9.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-continuation line
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.1">4.1.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-continuation lines
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.2">4.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-counting macro parameters
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.6">4.5.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>CPU</code>
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.11">7.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>CPUID</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.3">3.4.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-creating contexts
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.9.1">4.9.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-critical expression
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2.2">3.2.2</a>, <a href="nasmdoc3.html#section-3.8">3.8</a>,
- <a href="nasmdoc4.html#section-4.2.8">4.2.8</a>, <a href="nasmdoc4.html#section-4.4.4">4.4.4</a>,
- <a href="nasmdoc7.html#section-7.4">7.4</a>, <a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>cv8</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.5.3">8.5.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-daily development snapshots
-</div>
-<div class="ref">
-<a href="nasmdoce.html#section-E.1">E.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>data</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.5">8.9.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-data structure
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.4.4">9.4.4</a>, <a href="nasmdo10.html#section-10.1.3">10.1.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>DB</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2">3.2</a>, <a href="nasmdoc3.html#section-3.2.1">3.2.1</a>,
- <a href="nasmdoc3.html#section-3.4.4">3.4.4</a>, <a href="nasmdoc3.html#section-3.4.6">3.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>dbg</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.13">8.13</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>DD</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2">3.2</a>, <a href="nasmdoc3.html#section-3.2.1">3.2.1</a>,
- <a href="nasmdoc3.html#section-3.4.4">3.4.4</a>, <a href="nasmdoc3.html#section-3.4.6">3.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-debug information
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.14">2.1.14</a>
-</div>
-</li>
-<li>
-<div class="term">
-debug information format
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.13">2.1.13</a>
-</div>
-</li>
-<li>
-<div class="term">
-decimal
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.1">3.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-declaring structures
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.9.1">5.9.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>DEFAULT</code>
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.2">7.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>default</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.5">8.9.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-default macro parameters
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.5">4.5.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-default name
-</div>
-<div class="ref">
-<a href="nasmdoc8.html">8</a>
-</div>
-</li>
-<li>
-<div class="term">
-default-<code>WRT</code> mechanism
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.7">8.4.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-defining sections
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.3">7.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-design goals
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.2.2">2.2.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-detokenization
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.4">4.1.4</a>, <a href="nasmdoc4.html#section-4.1.5">4.1.5</a>,
- <a href="nasmdoc4.html#section-4.1.8">4.1.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-DevPac
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.9">3.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-directives
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.5">4.1.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-disabling listing expansion
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.11">4.5.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-division
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.11">3.5.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-division, signed
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.11">3.5.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-division, unsigned
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.11">3.5.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-DJGPP
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.7">8.7</a>, <a href="nasmdo10.html">10</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>djlink</code>
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.1.1">9.1.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-DLL symbols, exporting
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.5">8.4.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-DLL symbols, importing
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.4">8.4.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>DO</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2">3.2</a>, <a href="nasmdoc3.html#section-3.2.1">3.2.1</a>,
- <a href="nasmdoc3.html#section-3.4.4">3.4.4</a>, <a href="nasmdoc3.html#section-3.4.6">3.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-DOS
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.16">2.1.16</a>, <a href="nasmdoc2.html#section-2.1.17">2.1.17</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>DQ</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2">3.2</a>, <a href="nasmdoc3.html#section-3.2.1">3.2.1</a>,
- <a href="nasmdoc3.html#section-3.4.4">3.4.4</a>, <a href="nasmdoc3.html#section-3.4.6">3.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>DT</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2">3.2</a>, <a href="nasmdoc3.html#section-3.2.1">3.2.1</a>,
- <a href="nasmdoc3.html#section-3.4.4">3.4.4</a>, <a href="nasmdoc3.html#section-3.4.6">3.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>DUP</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2.1">3.2.1</a>, <a href="nasmdoc3.html#section-3.2.2">3.2.2</a>,
- <a href="nasmdoc3.html#section-3.2.5">3.2.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>DW</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2">3.2</a>, <a href="nasmdoc3.html#section-3.2.1">3.2.1</a>,
- <a href="nasmdoc3.html#section-3.4.4">3.4.4</a>, <a href="nasmdoc3.html#section-3.4.6">3.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>DWORD</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.1">3.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>DY</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2">3.2</a>, <a href="nasmdoc3.html#section-3.2.1">3.2.1</a>,
- <a href="nasmdoc3.html#section-3.4.4">3.4.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>DZ</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2">3.2</a>, <a href="nasmdoc3.html#section-3.2.1">3.2.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-effective addresses
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.1">3.1</a>, <a href="nasmdoc3.html#section-3.3">3.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-element size, in common variables
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.8">8.4.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-ELF
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9">8.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-ELF, 16-bit code
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.8">8.9.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-ELF, debug formats
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.9">8.9.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-ELF, shared libraries
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.5">8.9.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>elf32</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9">8.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>elf64</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9">8.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>elfx32</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9">8.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>endproc</code>
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.4.5">9.4.5</a>, <a href="nasmdo10.html#section-10.1.4">10.1.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>ENDSTRUC</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.9.1">5.9.1</a>, <a href="nasmdoc7.html#section-7.4">7.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-environment
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.35">2.1.35</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>EQU</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2">3.2</a>, <a href="nasmdoc3.html#section-3.2.4">3.2.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-error messages
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.16">2.1.16</a>, <a href="nasmdoc2.html#section-2.1.17">2.1.17</a>
-</div>
-</li>
-<li>
-<div class="term">
-error reporting format
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.15">2.1.15</a>
-</div>
-</li>
-<li>
-<div class="term">
-escape sequences
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.2">3.4.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>EVEN</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.10.1">5.10.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-exact matches
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.12">4.5.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>EXE_begin</code>
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.1.2">9.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>EXE_end</code>
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.1.2">9.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>EXE_stack</code>
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.1.2">9.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>EXE2BIN</code>
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.2.2">9.2.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>exebin.mac</code>
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.1.2">9.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>exec</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-Executable and Linkable Format
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9">8.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>EXPORT</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.5">8.4.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-exporting symbols
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.7">7.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-expressions
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.22">2.1.22</a>, <a href="nasmdoc3.html#section-3.5">3.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-extension
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.1">2.1.1</a>, <a href="nasmdoc8.html">8</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>EXTERN</code>
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.5">7.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>EXTERN</code>, <code>elf</code> extensions to
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.6">8.9.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>EXTERN</code>, <code>obj</code> extensions to
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.7">8.4.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-extracting substrings
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.3.3">4.3.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-far call
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.2.5">2.2.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-far common variables
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.8">8.4.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-far pointer
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.6">3.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>FARCODE</code>
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.4.5">9.4.5</a>, <a href="nasmdoc9.html#section-9.5.3">9.5.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>fini_array</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>FLAT</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.1">8.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-flat memory model
-</div>
-<div class="ref">
-<a href="nasmdo10.html">10</a>
-</div>
-</li>
-<li>
-<div class="term">
-flat-form binary
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.1">8.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>FLOAT</code>
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.12">7.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-floating-point, constants
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.6">3.4.6</a>, <a href="nasmdoc7.html#section-7.12">7.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-floating-point, packed BCD constants
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.7">3.4.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-floating-point
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.2.6">2.2.6</a>, <a href="nasmdoc3.html#section-3.1">3.1</a>,
- <a href="nasmdoc3.html#section-3.2.1">3.2.1</a>, <a href="nasmdoc3.html#section-3.4.6">3.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>follows=</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.1.3">8.1.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-format-specific directives
-</div>
-<div class="ref">
-<a href="nasmdoc7.html">7</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>fp</code>
-</div>
-<div class="ref">
-<a href="nasmdoc6.html#section-6.3">6.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-frame pointer
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.4.3">9.4.3</a>, <a href="nasmdoc9.html#section-9.5.1">9.5.1</a>,
- <a href="nasmdo10.html#section-10.1.2">10.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-FreeBSD
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.11">8.11</a>, <a href="nasmdo10.html#section-10.2">10.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-FreeLink
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.1.1">9.1.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>ftp.simtel.net</code>
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.1.1">9.1.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>function</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.5">8.9.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-functions, C calling convention
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.4.3">9.4.3</a>, <a href="nasmdo10.html#section-10.1.2">10.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-functions, <code>PASCAL</code> calling convention
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.5.1">9.5.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>(G|L)POSTFIX</code>
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.10">7.10</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>(G|L)PREFIX</code>
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.10">7.10</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>git</code>
-</div>
-<div class="ref">
-<a href="nasmdocd.html#section-D.2">D.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>GLOBAL</code>
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.7">7.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>GLOBAL</code>, <code>aoutb</code> extensions to
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.5">8.9.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>GLOBAL</code>, ELF extensions to
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.5">8.9.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-global offset table
-</div>
-<div class="ref">
-<a href="nasmdo10.html#section-10.2">10.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>GLOBAL</code>, <code>rdf</code> extensions to
-</div>
-<div class="ref">
-</div>
-</li>
-<li>
-<div class="term">
-GOT
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.3">8.9.3</a>, <a href="nasmdo10.html#section-10.2">10.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>GOT</code> relocations
-</div>
-<div class="ref">
-<a href="nasmdo10.html#section-10.2.3">10.2.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>GOTOFF</code> relocations
-</div>
-<div class="ref">
-<a href="nasmdo10.html#section-10.2.2">10.2.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>GOTPC</code> relocations
-</div>
-<div class="ref">
-<a href="nasmdo10.html#section-10.2.1">10.2.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-graphics
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2.3">3.2.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-greedy macro parameters
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.3">4.5.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>GROUP</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.2">8.4.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-groups
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.6">3.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-here token
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5">3.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-hexadecimal
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.1">3.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>hidden</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.5">8.9.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-hybrid syntaxes
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.2.2">2.2.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>IEND</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.9.2">5.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>ifunc</code>
-</div>
-<div class="ref">
-<a href="nasmdoc6.html#section-6.4">6.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>ilog2()</code>
-</div>
-<div class="ref">
-<a href="nasmdoc6.html#section-6.4.1">6.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>ilog2c()</code>
-</div>
-<div class="ref">
-<a href="nasmdoc6.html#section-6.4.1">6.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>ilog2cw()</code>
-</div>
-<div class="ref">
-<a href="nasmdoc6.html#section-6.4.1">6.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>ilog2e()</code>
-</div>
-<div class="ref">
-<a href="nasmdoc6.html#section-6.4.1">6.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>ilog2f()</code>
-</div>
-<div class="ref">
-<a href="nasmdoc6.html#section-6.4.1">6.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>ilog2fw()</code>
-</div>
-<div class="ref">
-<a href="nasmdoc6.html#section-6.4.1">6.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>ilog2w()</code>
-</div>
-<div class="ref">
-<a href="nasmdoc6.html#section-6.4.1">6.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>IMPORT</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.4">8.4.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-import library
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.4">8.4.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-importing symbols
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.5">7.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-importing symbols, unconditionally
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.6">7.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>INCBIN</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2">3.2</a>, <a href="nasmdoc3.html#section-3.2.3">3.2.3</a>,
- <a href="nasmdoc3.html#section-3.4.4">3.4.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-include search path
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.18">2.1.18</a>
-</div>
-</li>
-<li>
-<div class="term">
-including other files
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.8.1">4.8.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-inefficient code
-</div>
-<div class="ref">
-<a href="nasmdo13.html#section-13.1.1">13.1.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-infinite loop
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5">3.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-infinity
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.6">3.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-informational section
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.5.1">8.5.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>init_array</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-inline expansions
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.4">4.1.4</a>, <a href="nasmdoc4.html#section-4.1.5">4.1.5</a>,
- <a href="nasmdoc4.html#section-4.1.6">4.1.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-instances of structures
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.9.2">5.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-instruction list
-</div>
-<div class="ref">
-<a href="nasmdocf.html">F</a>
-</div>
-</li>
-<li>
-<div class="term">
-integer functions
-</div>
-<div class="ref">
-<a href="nasmdoc6.html#section-6.4">6.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-integer logarithms
-</div>
-<div class="ref">
-<a href="nasmdoc6.html#section-6.4.1">6.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-intel hex
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.2">8.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-Intel number formats
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.6">3.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>internal</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.5">8.9.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>ISTRUC</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.9.2">5.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-iterating over macro parameters
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.8">4.5.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>ith</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.2">8.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>Jcc NEAR</code>
-</div>
-<div class="ref">
-<a href="nasmdo13.html#section-13.1.2">13.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>JMP DWORD</code>
-</div>
-<div class="ref">
-<a href="nasmdo11.html#section-11.1">11.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-jumps, mixed-size
-</div>
-<div class="ref">
-<a href="nasmdo11.html#section-11.1">11.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-label preceding macro
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.7">4.5.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-label prefix
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.9">3.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-label-orphan
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.1">3.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-last
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.4">4.5.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>ld86</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.12">8.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-license
-</div>
-<div class="ref">
-<a href="nasmdoc1.html#section-1.1.1">1.1.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-linker, free
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.1.1">9.1.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-Linux, <code>a.out</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.10">8.10</a>
-</div>
-</li>
-<li>
-<div class="term">
-Linux, <code>as86</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.12">8.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-Linux, ELF
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9">8.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-list of warning classes
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-listing file
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.3">2.1.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-little-endian
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.3">3.4.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-local labels
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.9">3.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-Mach, object file format
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.8">8.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-Mach-O, object file format
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.8">8.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>macho32</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.8">8.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>macho64</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.8">8.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-MacOS X
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.8">8.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-macro indirection
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.6">4.1.6</a>, <a href="nasmdoc4.html#section-4.2.3">4.2.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-macro library
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.18">2.1.18</a>
-</div>
-</li>
-<li>
-<div class="term">
-macro parameters range
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.4">4.5.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-macro processor
-</div>
-<div class="ref">
-<a href="nasmdoc4.html">4</a>
-</div>
-</li>
-<li>
-<div class="term">
-macro-local labels
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.6">4.1.6</a>, <a href="nasmdoc4.html#section-4.5.2">4.5.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-macros
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2.5">3.2.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-makefile dependencies
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.5">2.1.5</a>, <a href="nasmdoc2.html#section-2.1.6">2.1.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-map files
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.1.4">8.1.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-MASM
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.2">2.2</a>, <a href="nasmdoc3.html#section-3.2.1">3.2.1</a>,
- <a href="nasmdoc3.html#section-3.2.5">3.2.5</a>, <a href="nasmdoc6.html#section-6.5">6.5</a>,
- <a href="nasmdoc8.html#section-8.4">8.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-masm compatibility
-</div>
-<div class="ref">
-<a href="nasmdoc6.html#section-6.5">6.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-MASM, <code>DB</code> syntax
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2.1">3.2.1</a>, <a href="nasmdoc3.html#section-3.2.2">3.2.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-memory models
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.2.5">2.2.5</a>, <a href="nasmdoc9.html#section-9.4.2">9.4.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-memory operand
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.1">3.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-memory references
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.2.2">2.2.2</a>, <a href="nasmdoc3.html#section-3.3">3.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>merge</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-Microsoft OMF
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4">8.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-minifloat
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.6">3.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-Minix
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.12">8.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>misc</code> subdirectory
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.1.2">9.1.2</a>, <a href="nasmdoc9.html#section-9.4.5">9.4.5</a>,
- <a href="nasmdo10.html#section-10.1.4">10.1.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-mixed-language program
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.4">9.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-mixed-size addressing
-</div>
-<div class="ref">
-<a href="nasmdo11.html#section-11.2">11.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-mixed-size instruction
-</div>
-<div class="ref">
-<a href="nasmdo11.html#section-11.1">11.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-modulo
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.11">3.5.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-modulo, signed
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.11">3.5.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-modulo, unsigned
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.11">3.5.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-motorola s-records
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.3">8.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-MS-DOS
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.1">8.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-MS-DOS device drivers
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.3">9.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-multi-line macro
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.4">4.1.4</a>, <a href="nasmdoc4.html#section-4.1.6">4.1.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-multi-line macro expansion
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.7">4.1.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-multi-line macros
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.7">4.1.7</a>, <a href="nasmdoc4.html#section-4.5">4.5</a>,
- <a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-multipass optimization
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.24">2.1.24</a>
-</div>
-</li>
-<li>
-<div class="term">
-multiple section names
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.1">8.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-multiplication
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.11">3.5.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-multiplier
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>multipush</code> macro
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.8">4.5.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-multisection
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.1.3">8.1.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-NaN
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.6">3.4.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>nasm -h</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.2">2.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-NASM version
-</div>
-<div class="ref">
-</div>
-</li>
-<li>
-<div class="term">
-NASM version, history
-</div>
-<div class="ref">
-<a href="nasmdocc.html">C</a>
-</div>
-</li>
-<li>
-<div class="term">
-NASM version, ID macro
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.1.1">5.1.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-NASM version, macros
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.1">5.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-NASM version, string macro
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.1.2">5.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>nasm-devel</code>
-</div>
-<div class="ref">
-<a href="nasmdoce.html#section-E.1.2">E.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>nasm.out</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.1">2.1.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>NASMENV</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.35">2.1.35</a>
-</div>
-</li>
-<li>
-<div class="term">
-ndisasm
-</div>
-<div class="ref">
-<a href="nasmdocb.html">B</a>
-</div>
-</li>
-<li>
-<div class="term">
-near call
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.2.5">2.2.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-near common variables
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.8">8.4.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-negation, arithmetic
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.12">3.5.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-negation, bitwise
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.12">3.5.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-negation, bitwise
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.12">3.5.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-negation, boolean
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.12">3.5.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-negation, boolean
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.12">3.5.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-NetBSD
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.11">8.11</a>, <a href="nasmdo10.html#section-10.2">10.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-new releases
-</div>
-<div class="ref">
-<a href="nasmdoce.html#section-E.1">E.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>no_dead_strip</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.8.4">8.8.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>noalloc</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>nobits</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.1.3">8.1.3</a>, <a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>NOBND</code>
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.2.2">7.2.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>noexec</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>note</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>nowrite</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-NSIS
-</div>
-<div class="ref">
-<a href="nasmdocd.html#section-D.1">D.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-Nullsoft Scriptable Installer
-</div>
-<div class="ref">
-<a href="nasmdocd.html#section-D.1">D.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-numeric constants
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2.1">3.2.1</a>, <a href="nasmdoc3.html#section-3.4.1">3.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>O16</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.1">3.1</a>, <a href="nasmdo11.html#section-11.3">11.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>O32</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.1">3.1</a>, <a href="nasmdo11.html#section-11.3">11.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>O64</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.1">3.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>obj</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4">8.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>object</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.5">8.9.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-octal
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.1">3.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>OF_DEFAULT</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.2">2.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>OFFSET</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.2.2">2.2.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-OMF
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4">8.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-omitted parameters
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.5">4.5.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-OpenBSD
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.11">8.11</a>, <a href="nasmdo10.html#section-10.2">10.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-operand-size prefixes
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.1">3.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-operands
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.1">3.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-operating system
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.1">8.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-operating system, writing
-</div>
-<div class="ref">
-<a href="nasmdo11.html#section-11.1">11.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-operators
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5">3.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-operators, unary
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.12">3.5.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>ORG</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.1.1">8.1.1</a>, <a href="nasmdoc9.html#section-9.2.1">9.2.1</a>,
- <a href="nasmdoc9.html#section-9.2.2">9.2.2</a>, <a href="nasmdo13.html#section-13.1.3">13.1.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-OS/2
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4">8.4</a>, <a href="nasmdoc8.html#section-8.4.1">8.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>osabi</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.1">8.9.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-other preprocessor directives
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.13">4.13</a>
-</div>
-</li>
-<li>
-<div class="term">
-out of range, jumps
-</div>
-<div class="ref">
-<a href="nasmdo13.html#section-13.1.2">13.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-output file format
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.2">2.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-output formats
-</div>
-<div class="ref">
-<a href="nasmdoc8.html">8</a>
-</div>
-</li>
-<li>
-<div class="term">
-overlapping segments
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.6">3.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>OVERLAY</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.1">8.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-overloading, multi-line macros
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.1">4.5.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-overloading, single-line macros
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.2.1">4.2.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-paradox
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.8">3.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>PASCAL</code>
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.5.3">9.5.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-Pascal calling convention
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.5.1">9.5.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-period
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.9">3.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-PharLap
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.1">8.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-PIC
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.3">8.9.3</a>, <a href="nasmdoc8.html#section-8.11">8.11</a>,
- <a href="nasmdo10.html#section-10.2">10.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-PLT
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.3">8.9.3</a>, <a href="nasmdo10.html#section-10.2.4">10.2.4</a>,
- <a href="nasmdo10.html#section-10.2.5">10.2.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>PLT</code> relocations
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.3">8.9.3</a>, <a href="nasmdo10.html#section-10.2.4">10.2.4</a>,
- <a href="nasmdo10.html#section-10.2.5">10.2.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-plt relocations
-</div>
-<div class="ref">
-<a href="nasmdo10.html#section-10.2.5">10.2.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-pointer, elf attribute
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-position-independent code
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.3">8.9.3</a>, <a href="nasmdoc8.html#section-8.11">8.11</a>,
- <a href="nasmdo10.html#section-10.2">10.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-pre-defining macros
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.20">2.1.20</a>, <a href="nasmdoc4.html#section-4.2.1">4.2.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-pre-including files
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.19">2.1.19</a>
-</div>
-</li>
-<li>
-<div class="term">
-precedence
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5">3.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-preferred
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.6">3.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>preinit_array</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-preprocess-only mode
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.22">2.1.22</a>
-</div>
-</li>
-<li>
-<div class="term">
-preprocessor
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.22">2.1.22</a>, <a href="nasmdoc2.html#section-2.1.23">2.1.23</a>,
- <a href="nasmdoc3.html#section-3.2.4">3.2.4</a>, <a href="nasmdoc3.html#section-3.5.11">3.5.11</a>,
- <a href="nasmdoc4.html">4</a>
-</div>
-</li>
-<li>
-<div class="term">
-preprocessor directives
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.4">4.1.4</a>, <a href="nasmdoc4.html#section-4.1.6">4.1.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-preprocessor functions
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.6">4.1.6</a>, <a href="nasmdoc4.html#section-4.3">4.3</a>,
- <a href="nasmdoc4.html#section-4.4">4.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-preprocessor, comment removal
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.2">4.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-preprocessor, conditionals
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.4">4.1.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-preprocessor, continuation line
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.1">4.1.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-preprocessor, expansions
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1">4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-preprocessor, expressions
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.22">2.1.22</a>
-</div>
-</li>
-<li>
-<div class="term">
-preprocessor, loops
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.4">4.1.4</a>, <a href="nasmdoc4.html#section-4.7">4.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-preprocessor, variables
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.2.8">4.2.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-primitive directives
-</div>
-<div class="ref">
-<a href="nasmdoc7.html">7</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>PRIVATE</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.1">8.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>private_extern</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.8.5">8.8.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>proc</code>
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.4.5">9.4.5</a>, <a href="nasmdo10.html#section-10.1.4">10.1.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-procedure linkage table
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.3">8.9.3</a>, <a href="nasmdo10.html#section-10.2.4">10.2.4</a>,
- <a href="nasmdo10.html#section-10.2.5">10.2.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-processor mode
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.1">7.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>progbits</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.1.3">8.1.3</a>, <a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-program entry point
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.6">8.4.6</a>, <a href="nasmdoc9.html#section-9.1.1">9.1.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-program origin
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.1.1">8.1.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>protected</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.5">8.9.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-pseudo-instructions
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2">3.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>PUBLIC</code>
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.7">7.7</a>, <a href="nasmdoc8.html#section-8.4.1">8.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-pure binary
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.1">8.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-quick start
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.2">2.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>QWORD</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.1">3.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-redirecting errors
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.16">2.1.16</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>REL</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.3">3.3</a>, <a href="nasmdoc7.html#section-7.2.1">7.2.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-release candidates
-</div>
-<div class="ref">
-<a href="nasmdoce.html#section-E.1">E.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-relocations, PIC-specific
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.3">8.9.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-removing contexts
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.9.1">4.9.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-renaming contexts
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.9.5">4.9.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-repeating
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2.5">3.2.5</a>, <a href="nasmdoc4.html#section-4.7">4.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-reporting bugs
-</div>
-<div class="ref">
-<a href="nasmdoce.html#section-E.2">E.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>REQUIRED</code>
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.6">7.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>RESB</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2">3.2</a>, <a href="nasmdoc3.html#section-3.2.2">3.2.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>RESD</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2">3.2</a>, <a href="nasmdoc3.html#section-3.2.2">3.2.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>RESO</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2">3.2</a>, <a href="nasmdoc3.html#section-3.2.2">3.2.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>RESQ</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2">3.2</a>, <a href="nasmdoc3.html#section-3.2.2">3.2.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>REST</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2">3.2</a>, <a href="nasmdoc3.html#section-3.2.2">3.2.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>RESW</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2">3.2</a>, <a href="nasmdoc3.html#section-3.2.2">3.2.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>RESY</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2">3.2</a>, <a href="nasmdoc3.html#section-3.2.2">3.2.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>RESZ</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2">3.2</a>, <a href="nasmdoc3.html#section-3.2.2">3.2.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>{rex}</code>
-</div>
-<div class="ref">
-<a href="nasmdocc.html#section-C.1.2">C.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-rotating macro parameters
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.8">4.5.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-searching for include files
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.8.1">4.8.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>SECTALIGN</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.10.2">5.10.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>SECTION</code>
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.3">7.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-section alignment, in <code>bin</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.1.2">8.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-section alignment, in ELF
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-section alignment, in <code>obj</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.1">8.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-section alignment, in <code>win32</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.5.1">8.5.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>SECTION</code>, ELF extensions to
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>SECTION</code>, <code>macho</code> extensions to
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.8.1">8.8.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>SECTION</code>, Windows extensions to
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.5.1">8.5.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>SEG</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.6">3.6</a>, <a href="nasmdoc8.html#section-8.4">8.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>SEGMENT</code>
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.3">7.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-segment address
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.12">3.5.12</a>, <a href="nasmdoc3.html#section-3.6">3.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-segment alignment, in <code>bin</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.1.2">8.1.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-segment alignment, in <code>obj</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.1">8.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-segment names, Borland Pascal
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.5.2">9.5.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>SEGMENT</code>, <code>obj</code> extensions to
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.1">8.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-segment override
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.2.4">2.2.4</a>, <a href="nasmdoc3.html#section-3.1">3.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-segments
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.6">3.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-segments, groups of
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.2">8.4.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-separator character
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.35">2.1.35</a>
-</div>
-</li>
-<li>
-<div class="term">
-shared libraries
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.11">8.11</a>, <a href="nasmdo10.html#section-10.2">10.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>shift</code> command
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.5.8">4.5.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-signed, bit shift
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.9">3.5.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-signed, division
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.11">3.5.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-signed, modulo
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.11">3.5.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-single-line macros
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.1.6">4.1.6</a>, <a href="nasmdoc4.html#section-4.2">4.2</a>,
- <a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-size, of symbols
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.5">8.9.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>smartalign</code>
-</div>
-<div class="ref">
-<a href="nasmdoc6.html#section-6.2">6.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-snapshots, daily development
-</div>
-<div class="ref">
-<a href="nasmdoce.html#section-E.1">E.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-Solaris x86
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9">8.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-sound
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2.3">3.2.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-source-listing file
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.3">2.1.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-square brackets
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.2.2">2.2.2</a>, <a href="nasmdoc3.html#section-3.3">3.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>srec</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.3">8.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>STACK</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.1">8.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-stack relative preprocessor directives
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.10">4.10</a>
-</div>
-</li>
-<li>
-<div class="term">
-standard macro packages
-</div>
-<div class="ref">
-<a href="nasmdoc6.html">6</a>
-</div>
-</li>
-<li>
-<div class="term">
-standard macros
-</div>
-<div class="ref">
-<a href="nasmdoc5.html">5</a>
-</div>
-</li>
-<li>
-<div class="term">
-standardized section names
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.3">7.3</a>, <a href="nasmdoc8.html#section-8.5.1">8.5.1</a>,
- <a href="nasmdoc8.html#section-8.9.2">8.9.2</a>, <a href="nasmdoc8.html#section-8.10">8.10</a>,
- <a href="nasmdoc8.html#section-8.11">8.11</a>, <a href="nasmdoc8.html#section-8.12">8.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>start=</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.1.3">8.1.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>STATIC</code>
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.9">7.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>stderr</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.16">2.1.16</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>stdout</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.17">2.1.17</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>STRICT</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.7">3.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-string
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.2">3.4.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-string, constants
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2.1">3.2.1</a>, <a href="nasmdoc3.html#section-3.4.2">3.4.2</a>,
- <a href="nasmdoc3.html#section-3.4.4">3.4.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-string, length
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.3.2">4.3.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-string, manipulation in macros
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.3">4.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-strings, elf attribute
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>strong</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.5">8.9.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>STRUC</code>
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.9.1">5.9.1</a>, <a href="nasmdoc7.html#section-7.4">7.4</a>,
- <a href="nasmdoc9.html#section-9.4.4">9.4.4</a>, <a href="nasmdo10.html#section-10.1.3">10.1.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-structure data types
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.9">5.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-stub preprocessor
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.23">2.1.23</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>subsections_via_symbols</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.8.3">8.8.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-subtraction
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.10">3.5.10</a>
-</div>
-</li>
-<li>
-<div class="term">
-suppressing preprocessing
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.23">2.1.23</a>
-</div>
-</li>
-<li>
-<div class="term">
-switching between sections
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.3">7.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-symbols, exporting from DLLs
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.5">8.4.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-symbols, importing from DLLs
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4.4">8.4.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-symbols, specifying sizes
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.5">8.9.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-symbols, specifying types
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.5">8.9.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-synchronization
-</div>
-<div class="ref">
-<a href="nasmdocb.html#section-B.2.2">B.2.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>TASM</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.25">2.1.25</a>
-</div>
-</li>
-<li>
-<div class="term">
-tasm
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.2">2.2</a>, <a href="nasmdoc8.html#section-8.4">8.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>TBYTE</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.2.7">2.2.7</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>test</code> subdirectory
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.1.1">9.1.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-testing, arbitrary numeric expressions
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.4">4.6.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-testing, context stack
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.3">4.6.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-testing, exact text identity
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.5">4.6.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-testing, multi-line macro existence
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.2">4.6.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-testing, single-line macro existence
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.1">4.6.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-testing, token types
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.6.6">4.6.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-thread local storage, in ELF
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.4">8.9.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-thread local storage, in <code>macho</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.8.2">8.8.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>TIMES</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2">3.2</a>, <a href="nasmdoc3.html#section-3.2.5">3.2.5</a>,
- <a href="nasmdoc3.html#section-3.8">3.8</a>, <a href="nasmdo13.html#section-13.1.3">13.1.3</a>,
- <a href="nasmdo13.html#section-13.1.4">13.1.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>TLINK</code>
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.2.2">9.2.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-tls
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.8.2">8.8.2</a>, <a href="nasmdoc8.html#section-8.9.2">8.9.2</a>,
- <a href="nasmdoc8.html#section-8.9.4">8.9.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-trailing colon
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.1">3.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>TWORD</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.2.7">2.2.7</a>, <a href="nasmdoc3.html#section-3.1">3.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-type, of symbols
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.5">8.9.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-unary operators
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.12">3.5.12</a>
-</div>
-</li>
-<li>
-<div class="term">
-undefining macros
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.21">2.1.21</a>
-</div>
-</li>
-<li>
-<div class="term">
-underscore, in C symbols
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.4.1">9.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-Unicode
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.2">3.4.2</a>, <a href="nasmdoc3.html#section-3.4.5">3.4.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-uninitialized
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2">3.2</a>, <a href="nasmdoc3.html#section-3.2.2">3.2.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-uninitialized storage
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.2.7">2.2.7</a>, <a href="nasmdoc3.html#section-3.2">3.2</a>,
- <a href="nasmdoc3.html#section-3.2.1">3.2.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-Unix
-</div>
-<div class="ref">
-</div>
-</li>
-<li>
-<div class="term">
-Unix, SCO
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9">8.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-Unix, System V
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9">8.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-UnixWare
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9">8.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-unrolled loops
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.2.5">3.2.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-unsigned, bit shift
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.9">3.5.9</a>
-</div>
-</li>
-<li>
-<div class="term">
-unsigned, division
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.11">3.5.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-unsigned, modulo
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.5.11">3.5.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>UPPERCASE</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.2.1">2.2.1</a>, <a href="nasmdoc8.html#section-8.4.3">8.4.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>USE16</code>
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.1.1">7.1.1</a>, <a href="nasmdoc8.html#section-8.4.1">8.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>USE32</code>
-</div>
-<div class="ref">
-<a href="nasmdoc7.html#section-7.1.1">7.1.1</a>, <a href="nasmdoc8.html#section-8.4.1">8.4.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-user-defined errors
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.11">4.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-user-level directives
-</div>
-<div class="ref">
-<a href="nasmdoc5.html">5</a>, <a href="nasmdoc7.html">7</a>
-</div>
-</li>
-<li>
-<div class="term">
-UTF-8
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.2">3.4.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-UTF-16
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.5">3.4.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-UTF-32
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.4.5">3.4.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-VAL
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.1.1">9.1.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-valid characters
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.1">3.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-variable types
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.2.3">2.2.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-variables, preprocessor
-</div>
-<div class="ref">
-<a href="nasmdoc4.html#section-4.2.8">4.2.8</a>
-</div>
-</li>
-<li>
-<div class="term">
-version
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.27">2.1.27</a>
-</div>
-</li>
-<li>
-<div class="term">
-version number of nasm
-</div>
-<div class="ref">
-<a href="nasmdoc5.html#section-5.1">5.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>vfollows=</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.1.3">8.1.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-Visual C++
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.5">8.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>vstart=</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.1.3">8.1.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>WARNING</code>
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.26">2.1.26</a>, <a href="nasmdoc7.html#section-7.13">7.13</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>all</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>bad-pragma</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>bnd</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>db-empty</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>ea</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>ea-absolute</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>ea-dispsize</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>environment</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>float</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>float-denorm</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>float-overflow</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>float-toolong</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>float-underflow</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>forward</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>hle</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>label</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>label-orphan</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>label-redef</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>label-redef-late</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>lock</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>macro-def-case-single</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>macro-def-greedy-single</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>macro-def-param-single</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>macro-defaults</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>macro-params-legacy</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>macro-params-multi</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>macro-params-single</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>negative-rep</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>not-my-pragma</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>number-overflow</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>obsolete</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>obsolete-nop</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>obsolete-removed</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>obsolete-valid</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>orphan-labels</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>other</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>phase</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pp</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pp-else</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pp-else-elif</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pp-else-else</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pp-empty-braces</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pp-environment</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pp-macro</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pp-macro-def</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pp-macro-def-case-single</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pp-macro-def-greedy-single</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pp-macro-def-param-single</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pp-macro-defaults</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pp-macro-params</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pp-macro-params-legacy</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pp-macro-params-multi</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pp-macro-params-single</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pp-macro-redef-multi</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pp-open</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pp-open-braces</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pp-open-brackets</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pp-open-string</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pp-rep-negative</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pp-sel-range</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pp-trailing</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pragma</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pragma-bad</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pragma-empty</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pragma-na</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>pragma-unknown</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>prefix</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>prefix-bnd</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>prefix-hle</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>prefix-lock</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>prefix-opsize</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>prefix-seg</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>ptr</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>regsize</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>unknown-pragma</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>unknown-warning</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>user</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>warn-stack-empty</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>zeroing</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning class, <code>zext-reloc</code>
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warning classes, list
-</div>
-<div class="ref">
-<a href="nasmdoca.html">A</a>
-</div>
-</li>
-<li>
-<div class="term">
-warnings
-</div>
-<div class="ref">
-<a href="nasmdoc2.html#section-2.1.26">2.1.26</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>weak</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.5">8.9.5</a>, <a href="nasmdoc8.html#section-8.9.6">8.9.6</a>
-</div>
-</li>
-<li>
-<div class="term">
-website
-</div>
-<div class="ref">
-<a href="nasmdoce.html#section-E.1">E.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-Win32
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.4">8.4</a>, <a href="nasmdoc8.html#section-8.5">8.5</a>,
- <a href="nasmdo10.html">10</a>
-</div>
-</li>
-<li>
-<div class="term">
-Win64
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.6">8.6</a>, <a href="nasmdo12.html">12</a>
-</div>
-</li>
-<li>
-<div class="term">
-Windows
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.1">9.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-Windows, debugging formats
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.5.3">8.5.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>write</code>
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9.2">8.9.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-writing operating systems
-</div>
-<div class="ref">
-<a href="nasmdo11.html#section-11.1">11.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>WRT</code>
-</div>
-<div class="ref">
-<a href="nasmdoc3.html#section-3.6">3.6</a>, <a href="nasmdoc8.html#section-8.4">8.4</a>,
- <a href="nasmdoc8.html#section-8.8.2">8.8.2</a>, <a href="nasmdoc8.html#section-8.9.3">8.9.3</a>,
- <a href="nasmdoc8.html#section-8.9.4">8.9.4</a>, <a href="nasmdoc8.html#section-8.11">8.11</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>WRT ..got</code>
-</div>
-<div class="ref">
-<a href="nasmdo10.html#section-10.2.3">10.2.3</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>WRT ..gotoff</code>
-</div>
-<div class="ref">
-<a href="nasmdo10.html#section-10.2.2">10.2.2</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>WRT ..gotpc</code>
-</div>
-<div class="ref">
-<a href="nasmdo10.html#section-10.2.1">10.2.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>WRT ..plt</code>
-</div>
-<div class="ref">
-<a href="nasmdo10.html#section-10.2.5">10.2.5</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>WRT ..sym</code>
-</div>
-<div class="ref">
-<a href="nasmdo10.html#section-10.2.4">10.2.4</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>www.delorie.com</code>
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.1.1">9.1.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>www.pcorner.com</code>
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.1.1">9.1.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-<code>x2ftp.oulu.fi</code>
-</div>
-<div class="ref">
-<a href="nasmdoc9.html#section-9.1.1">9.1.1</a>
-</div>
-</li>
-<li>
-<div class="term">
-x32
-</div>
-<div class="ref">
-<a href="nasmdoc8.html#section-8.9">8.9</a>
-</div>
-</li>
-</ul>
-</div>
-
-</body>
-</html>

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@@ -1,18809 +0,0 @@
-                       NASM - The Netwide Assembler
-                       ============================
-
-Chapter 1: Introduction
------------------------
-
-   1.1 What Is NASM?
-
-       The Netwide Assembler, NASM, is an 80x86 and x86-64 assembler
-       designed for portability and modularity. It supports a range of
-       object file formats, including Linux and *BSD `a.out', ELF, Mach-O,
-       16-bit and 32-bit `.obj' (OMF) format, COFF (including its Win32 and
-       Win64 variants.) It can also output plain binary files, Intel hex
-       and Motorola S-Record formats. Its syntax is designed to be simple
-       and easy to understand, similar to the syntax in the Intel Software
-       Developer Manual with minimal complexity. It supports all currently
-       known x86 architectural extensions, and has strong support for
-       macros.
-
- 1.1.1 License
-
-       NASM is under the so-called 2-clause BSD license, also known as the
-       simplified BSD license:
-
-       Copyright 1996-2022 the NASM Authors - All rights reserved.
-
-       Redistribution and use in source and binary forms, with or without
-       modification, are permitted provided that the following conditions
-       are met:
-
-       (*) Redistributions of source code must retain the above copyright
-           notice, this list of conditions and the following disclaimer.
-
-       (*) Redistributions in binary form must reproduce the above
-           copyright notice, this list of conditions and the following
-           disclaimer in the documentation and/or other materials provided
-           with the distribution.
-
-       THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-       "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-       LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-       FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-       COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-       INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-       BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-       LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-       CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-       LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-       ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-       POSSIBILITY OF SUCH DAMAGE.
-
-Chapter 2: Running NASM
------------------------
-
-   2.1 NASM Command-Line Syntax
-
-       To assemble a file, you issue a command of the form
-
-       nasm -f <format> <filename> -o <output>
-
-       For example,
-
-       nasm -f elf myfile.asm
-
-       will assemble `myfile.asm' into an ELF object file `myfile.o'. And
-
-       nasm -f bin myfile.asm -o myfile.com
-
-       will assemble `myfile.asm' into a raw binary file `myfile.com'.
-
-       To produce a listing file, with the hex codes output from NASM
-       displayed on the left of the original sources, use the `-l' option
-       to give a listing file name, for example:
-
-       nasm -f coff myfile.asm -l myfile.lst
-
-       To get further usage instructions from NASM, try typing
-
-       nasm -h
-
-       The option `--help' is an alias for the `-h' option.
-
-       If you use Linux but aren't sure whether your system is `a.out' or
-       ELF, type
-
-       file nasm
-
-       (in the directory in which you put the NASM binary when you
-       installed it). If it says something like
-
-       nasm: ELF 32-bit LSB executable i386 (386 and up) Version 1
-
-       then your system is `ELF', and you should use the option `-f elf'
-       when you want NASM to produce Linux object files. If it says
-
-       nasm: Linux/i386 demand-paged executable (QMAGIC)
-
-       or something similar, your system is `a.out', and you should use
-       `-f aout' instead (Linux `a.out' systems have long been obsolete,
-       and are rare these days.)
-
-       Like Unix compilers and assemblers, NASM is silent unless it goes
-       wrong: you won't see any output at all, unless it gives error
-       messages.
-
- 2.1.1 The `-o' Option: Specifying the Output File Name
-
-       NASM will normally choose the name of your output file for you;
-       precisely how it does this is dependent on the object file format.
-       For Microsoft object file formats (`obj', `win32' and `win64'), it
-       will remove the `.asm' extension (or whatever extension you like to
-       use - NASM doesn't care) from your source file name and substitute
-       `.obj'. For Unix object file formats (`aout', `as86', `coff',
-       `elf32', `elf64', `elfx32', `ieee', `macho32' and `macho64') it will
-       substitute `.o'. For `dbg', `ith' and `srec', it will use `.dbg',
-       `.ith' and `.srec', respectively, and for the `bin' format it will
-       simply remove the extension, so that `myfile.asm' produces the
-       output file `myfile'.
-
-       If the output file already exists, NASM will overwrite it, unless it
-       has the same name as the input file, in which case it will give a
-       warning and use `nasm.out' as the output file name instead.
-
-       For situations in which this behaviour is unacceptable, NASM
-       provides the `-o' command-line option, which allows you to specify
-       your desired output file name. You invoke `-o' by following it with
-       the name you wish for the output file, either with or without an
-       intervening space. For example:
-
-       nasm -f bin program.asm -o program.com 
-       nasm -f bin driver.asm -odriver.sys
-
-       Note that this is a small o, and is different from a capital O ,
-       which is used to specify the number of optimization passes required.
-       See section 2.1.24.
-
- 2.1.2 The `-f' Option: Specifying the Output File Format
-
-       If you do not supply the `-f' option to NASM, it will choose an
-       output file format for you itself. In the distribution versions of
-       NASM, the default is always `bin'; if you've compiled your own copy
-       of NASM, you can redefine `OF_DEFAULT' at compile time and choose
-       what you want the default to be.
-
-       Like `-o', the intervening space between `-f' and the output file
-       format is optional; so `-f elf' and `-felf' are both valid.
-
-       A complete list of the available output file formats can be given by
-       issuing the command `nasm -h'.
-
- 2.1.3 The `-l' Option: Generating a Listing File
-
-       If you supply the `-l' option to NASM, followed (with the usual
-       optional space) by a file name, NASM will generate a source-listing
-       file for you, in which addresses and generated code are listed on
-       the left, and the actual source code, with expansions of multi-line
-       macros (except those which specifically request no expansion in
-       source listings: see section 4.5.11) on the right. For example:
-
-       nasm -f elf myfile.asm -l myfile.lst
-
-       If a list file is selected, you may turn off listing for a section
-       of your source with `list -', and turn it back on with `list +',
-       (the default, obviously). There is no "user form" (without the
-       brackets). This can be used to list only sections of interest,
-       avoiding excessively long listings.
-
- 2.1.4 The `-L' Option: Additional or Modified Listing Info
-
-       Use this option to specify listing output details.
-
-       Supported options are:
-
-       (*) `-Lb' show builtin macro packages (standard and `%use')
-
-       (*) `-Ld' show byte and repeat counts in decimal, not hex
-
-       (*) `-Le' show the preprocessed input
-
-       (*) `-Lf' ignore `.nolist' and force listing output
-
-       (*) `-Lm' show multi-line macro calls with expanded parameters
-
-       (*) `-Lp' output a list file in every pass, in case of errors
-
-       (*) `-Ls' show all single-line macro definitions
-
-       (*) `-Lw' flush the output after every line (very slow, mainly
-           useful to debug NASM crashes)
-
-       (*) `-L+' enable _all_ listing options except `-Lw' (very verbose)
-
-       These options can be enabled or disabled at runtime using the
-       `%pragma list options' directive:
-
-       %pragma list options +|-flags...
-
-       For example, to turn on the `d' and `m' flags but disable the `s'
-       flag:
-
-       %pragma list options +dm -s
-
-       For forward compatility reasons, an undefined flag will be ignored.
-       Thus, a new flag introduced in a newer version of NASM can be
-       specified without breaking older versions. Listing flags will always
-       be a single alphanumeric character and are case sensitive.
-
- 2.1.5 The `-M' Option: Generate Makefile Dependencies
-
-       This option can be used to generate makefile dependencies on stdout.
-       This can be redirected to a file for further processing. For
-       example:
-
-       nasm -M myfile.asm > myfile.dep
-
- 2.1.6 The `-MG' Option: Generate Makefile Dependencies
-
-       This option can be used to generate makefile dependencies on stdout.
-       This differs from the `-M' option in that if a nonexisting file is
-       encountered, it is assumed to be a generated file and is added to
-       the dependency list without a prefix.
-
- 2.1.7 The `-MF' Option: Set Makefile Dependency File
-
-       This option can be used with the `-M' or `-MG' options to send the
-       output to a file, rather than to stdout. For example:
-
-       nasm -M -MF myfile.dep myfile.asm
-
- 2.1.8 The `-MD' Option: Assemble and Generate Dependencies
-
-       The `-MD' option acts as the combination of the `-M' and `-MF'
-       options (i.e. a filename has to be specified.) However, unlike the
-       `-M' or `-MG' options, `-MD' does _not_ inhibit the normal operation
-       of the assembler. Use this to automatically generate updated
-       dependencies with every assembly session. For example:
-
-       nasm -f elf -o myfile.o -MD myfile.dep myfile.asm
-
-       If the argument after `-MD' is an option rather than a filename,
-       then the output filename is the first applicable one of:
-
-       (*) the filename set in the `-MF' option;
-
-       (*) the output filename from the `-o' option with `.d' appended;
-
-       (*) the input filename with the extension set to `.d'.
-
- 2.1.9 The `-MT' Option: Dependency Target Name
-
-       The `-MT' option can be used to override the default name of the
-       dependency target. This is normally the same as the output filename,
-       specified by the `-o' option.
-
-2.1.10 The `-MQ' Option: Dependency Target Name (Quoted)
-
-       The `-MQ' option acts as the `-MT' option, except it tries to quote
-       characters that have special meaning in Makefile syntax. This is not
-       foolproof, as not all characters with special meaning are quotable
-       in Make. The default output (if no `-MT' or `-MQ' option is
-       specified) is automatically quoted.
-
-2.1.11 The `-MP' Option: Emit phony targets
-
-       When used with any of the dependency generation options, the `-MP'
-       option causes NASM to emit a phony target without dependencies for
-       each header file. This prevents Make from complaining if a header
-       file has been removed.
-
-2.1.12 The `-MW' Option: Watcom Make quoting style
-
-       This option causes NASM to attempt to quote dependencies according
-       to Watcom Make conventions rather than POSIX Make conventions (also
-       used by most other Make variants.) This quotes `#' as `$#' rather
-       than `\#', uses `&' rather than `\' for continuation lines, and
-       encloses filenames containing whitespace in double quotes.
-
-2.1.13 The `-F' Option: Selecting a Debug Information Format
-
-       This option is used to select the format of the debug information
-       emitted into the output file, to be used by a debugger (or _will_
-       be). Prior to version 2.03.01, the use of this switch did _not_
-       enable output of the selected debug info format. Use `-g', see
-       section 2.1.14, to enable output. Versions 2.03.01 and later
-       automatically enable `-g' if `-F' is specified.
-
-       A complete list of the available debug file formats for an output
-       format can be seen by issuing the command `nasm -h'. Not all output
-       formats currently support debugging output.
-
-       This should not be confused with the `-f dbg' output format option,
-       see section 8.13.
-
-2.1.14 The `-g' Option: Enabling Debug Information.
-
-       This option can be used to generate debugging information in the
-       specified format. See section 2.1.13. Using `-g' without `-F'
-       results in emitting debug info in the default format, if any, for
-       the selected output format. If no debug information is currently
-       implemented in the selected output format, `-g' is _silently
-       ignored_.
-
-2.1.15 The `-X' Option: Selecting an Error Reporting Format
-
-       This option can be used to select an error reporting format for any
-       error messages that might be produced by NASM.
-
-       Currently, two error reporting formats may be selected. They are the
-       `-Xvc' option and the `-Xgnu' option. The GNU format is the default
-       and looks like this:
-
-       filename.asm:65: error: specific error message
-
-       where `filename.asm' is the name of the source file in which the
-       error was detected, `65' is the source file line number on which the
-       error was detected, `error' is the severity of the error (this could
-       be `warning'), and `specific error message' is a more detailed text
-       message which should help pinpoint the exact problem.
-
-       The other format, specified by `-Xvc' is the style used by Microsoft
-       Visual C++ and some other programs. It looks like this:
-
-       filename.asm(65) : error: specific error message
-
-       where the only difference is that the line number is in parentheses
-       instead of being delimited by colons.
-
-       See also the `Visual C++' output format, section 8.5.
-
-2.1.16 The `-Z' Option: Send Errors to a File
-
-       Under `MS-DOS' it can be difficult (though there are ways) to
-       redirect the standard-error output of a program to a file. Since
-       NASM usually produces its warning and error messages on `stderr',
-       this can make it hard to capture the errors if (for example) you
-       want to load them into an editor.
-
-       NASM therefore provides the `-Z' option, taking a filename argument
-       which causes errors to be sent to the specified files rather than
-       standard error. Therefore you can redirect the errors into a file by
-       typing
-
-       nasm -Z myfile.err -f obj myfile.asm
-
-       In earlier versions of NASM, this option was called `-E', but it was
-       changed since `-E' is an option conventionally used for
-       preprocessing only, with disastrous results. See section 2.1.22.
-
-2.1.17 The `-s' Option: Send Errors to `stdout'
-
-       The `-s' option redirects error messages to `stdout' rather than
-       `stderr', so it can be redirected under `MS-DOS'. To assemble the
-       file `myfile.asm' and pipe its output to the `more' program, you can
-       type:
-
-       nasm -s -f obj myfile.asm | more
-
-       See also the `-Z' option, section 2.1.16.
-
-2.1.18 The `-i' Option: Include File Search Directories
-
-       When NASM sees the `%include' or `%pathsearch' directive in a source
-       file (see section 4.8.1, section 4.8.2 or section 3.2.3), it will
-       search for the given file not only in the current directory, but
-       also in any directories specified on the command line by the use of
-       the `-i' option. Therefore you can include files from a macro
-       library, for example, by typing
-
-       nasm -ic:\macrolib\ -f obj myfile.asm
-
-       (As usual, a space between `-i' and the path name is allowed, and
-       optional).
-
-       Prior NASM 2.14 a path provided in the option has been considered as
-       a verbatim copy and providing a path separator been up to a caller.
-       One could implicitly concatenate a search path together with a
-       filename. Still this was rather a trick than something useful. Now
-       the trailing path separator is made to always present, thus `-ifoo'
-       will be considered as the `-ifoo/' directory.
-
-       If you want to define a _standard_ include search path, similar to
-       `/usr/include' on Unix systems, you should place one or more `-i'
-       directives in the `NASMENV' environment variable (see section
-       2.1.35).
-
-       For Makefile compatibility with many C compilers, this option can
-       also be specified as `-I'.
-
-2.1.19 The `-p' Option: Pre-Include a File
-
-       NASM allows you to specify files to be _pre-included_ into your
-       source file, by the use of the `-p' option. So running
-
-       nasm myfile.asm -p myinc.inc
-
-       is equivalent to running `nasm myfile.asm' and placing the directive
-       `%include "myinc.inc"' at the start of the file.
-
-       `--include' option is also accepted.
-
-       For consistency with the `-I', `-D' and `-U' options, this option
-       can also be specified as `-P'.
-
-2.1.20 The `-d' Option: Pre-Define a Macro
-
-       Just as the `-p' option gives an alternative to placing `%include'
-       directives at the start of a source file, the `-d' option gives an
-       alternative to placing a `%define' directive. You could code
-
-       nasm myfile.asm -dFOO=100
-
-       as an alternative to placing the directive
-
-       %define FOO 100
-
-       at the start of the file. You can miss off the macro value, as well:
-       the option `-dFOO' is equivalent to coding `%define FOO'. This form
-       of the directive may be useful for selecting assembly-time options
-       which are then tested using `%ifdef', for example `-dDEBUG'.
-
-       For Makefile compatibility with many C compilers, this option can
-       also be specified as `-D'.
-
-2.1.21 The `-u' Option: Undefine a Macro
-
-       The `-u' option undefines a macro that would otherwise have been
-       pre-defined, either automatically or by a `-p' or `-d' option
-       specified earlier on the command lines.
-
-       For example, the following command line:
-
-       nasm myfile.asm -dFOO=100 -uFOO
-
-       would result in `FOO' _not_ being a predefined macro in the program.
-       This is useful to override options specified at a different point in
-       a Makefile.
-
-       For Makefile compatibility with many C compilers, this option can
-       also be specified as `-U'.
-
-2.1.22 The `-E' Option: Preprocess Only
-
-       NASM allows the preprocessor to be run on its own, up to a point.
-       Using the `-E' option (which requires no arguments) will cause NASM
-       to preprocess its input file, expand all the macro references,
-       remove all the comments and preprocessor directives, and print the
-       resulting file on standard output (or save it to a file, if the `-o'
-       option is also used).
-
-       This option cannot be applied to programs which require the
-       preprocessor to evaluate expressions which depend on the values of
-       symbols: so code such as
-
-       %assign tablesize ($-tablestart)
-
-       will cause an error in preprocess-only mode.
-
-       For compatibility with older version of NASM, this option can also
-       be written `-e'. `-E' in older versions of NASM was the equivalent
-       of the current `-Z' option, section 2.1.16.
-
-2.1.23 The `-a' Option: Don't Preprocess At All
-
-       If NASM is being used as the back end to a compiler, it might be
-       desirable to suppress preprocessing completely and assume the
-       compiler has already done it, to save time and increase compilation
-       speeds. The `-a' option, requiring no argument, instructs NASM to
-       replace its powerful preprocessor with a stub preprocessor which
-       does nothing.
-
-2.1.24 The `-O' Option: Specifying Multipass Optimization
-
-       Using the `-O' option, you can tell NASM to carry out different
-       levels of optimization. Multiple flags can be specified after the
-       `-O' options, some of which can be combined in a single option, e.g.
-       `-Oxv'.
-
-       (*) `-O0': No optimization. All operands take their long forms, if a
-           short form is not specified, except conditional jumps. This is
-           intended to match NASM 0.98 behavior.
-
-       (*) `-O1': Minimal optimization. As above, but immediate operands
-           which will fit in a signed byte are optimized, unless the long
-           form is specified. Conditional jumps default to the long form
-           unless otherwise specified.
-
-       (*) `-Ox' (where `x' is the actual letter `x'): Multipass
-           optimization. Minimize branch offsets and signed immediate
-           bytes, overriding size specification unless the `strict' keyword
-           has been used (see section 3.7). For compatibility with earlier
-           releases, the letter `x' may also be any number greater than
-           one. This number has no effect on the actual number of passes.
-
-       (*) `-Ov': At the end of assembly, print the number of passes
-           actually executed.
-
-       The `-Ox' mode is recommended for most uses, and is the default
-       since NASM 2.09.
-
-       Note that this is a capital `O', and is different from a small `o',
-       which is used to specify the output file name. See section 2.1.1.
-
-2.1.25 The `-t' Option: Enable TASM Compatibility Mode
-
-       NASM includes a limited form of compatibility with Borland's `TASM'.
-       When NASM's `-t' option is used, the following changes are made:
-
-       (*) local labels may be prefixed with `@@' instead of `.'
-
-       (*) size override is supported within brackets. In TASM compatible
-           mode, a size override inside square brackets changes the size of
-           the operand, and not the address type of the operand as it does
-           in NASM syntax. E.g. `mov eax,DWORD val' is valid syntax in
-           TASM compatibility mode. Note that you lose the ability to
-           override the default address type for the instruction.
-
-       (*) unprefixed forms of some directives supported (`arg', `elif',
-           `else', `endif', `if', `ifdef', `ifdifi', `ifndef', `include',
-           `local')
-
-2.1.26 The `-w' and `-W' Options: Enable or Disable Assembly Warnings
-
-       NASM can observe many conditions during the course of assembly which
-       are worth mentioning to the user, but not a sufficiently severe
-       error to justify NASM refusing to generate an output file. These
-       conditions are reported like errors, but come up with the word
-       `warning' before the message. Warnings do not prevent NASM from
-       generating an output file and returning a success status to the
-       operating system.
-
-       Some conditions are even less severe than that: they are only
-       sometimes worth mentioning to the user. Therefore NASM supports the
-       `-w' command-line option, which enables or disables certain classes
-       of assembly warning. Such warning classes are described by a name,
-       for example `label-orphan'; you can enable warnings of this class by
-       the command-line option `-w+label-orphan' and disable it by
-       `-w-label-orphan'.
-
-       Since version 2.15, NASM has group aliases for all prefixed
-       warnings, so they can be used to enable or disable all warnings in
-       the group. For example, -w+float enables all warnings with names
-       starting with float-*.
-
-       Since version 2.00, NASM has also supported the `gcc'-like syntax
-       `-Wwarning-class' and `-Wno-warning-class' instead of
-       `-w+warning-class' and `-w-warning-class', respectively; both
-       syntaxes work identically.
-
-       The option `-w+error' or `-Werror' can be used to treat warnings as
-       errors. This can be controlled on a per warning class basis
-       (`-w+error='_warning-class_ or `-Werror='_warning-class_); if no
-       _warning-class_ is specified NASM treats it as `-w+error=all'; the
-       same applies to `-w-error' or `-Wno-error', of course.
-
-       In addition, you can control warnings in the source code itself,
-       using the `WARNING' directive. See section 7.13.
-
-       See appendix A for the complete list of warning classes.
-
-2.1.27 The `-v' Option: Display Version Info
-
-       Typing `NASM -v' will display the version of NASM which you are
-       using, and the date on which it was compiled.
-
-       You will need the version number if you report a bug.
-
-       For command-line compatibility with Yasm, the form `--v' is also
-       accepted for this option starting in NASM version 2.11.05.
-
-2.1.28 The `--(g|l)prefix', `--(g|l)postfix' Options.
-
-       The `--(g)prefix' options prepend the given argument to all
-       `extern', `common', `static', and `global' symbols, and the
-       `--lprefix' option prepends to all other symbols. Similarly,
-       `--(g)postfix' and `--lpostfix' options append the argument in the
-       exactly same way as the `--xxprefix' options does.
-
-       Running this:
-
-       nasm -f macho --gprefix _
-
-       is equivalent to place the directive with `%pragma macho gprefix _'
-       at the start of the file (section 7.10). It will prepend the
-       underscore to all global and external variables, as C requires it in
-       some, but not all, system calling conventions.
-
-2.1.29 The `--pragma' Option
-
-       NASM accepts an argument as `%pragma' option, which is like placing
-       a `%pragma' preprocess statement at the beginning of the source.
-       Running this:
-
-       nasm -f macho --pragma "macho gprefix _"
-
-       is equivalent to the example in section 2.1.28. See section 4.12.
-
-2.1.30 The `--before' Option
-
-       A preprocess statement can be accepted with this option. The example
-       shown in section 2.1.29 is the same as running this:
-
-       nasm -f macho --before "%pragma macho gprefix _"
-
-2.1.31 The `--limit-X' Option
-
-       This option allows user to setup various maximum values after which
-       NASM will terminate with a fatal error rather than consume arbitrary
-       amount of compute time. Each limit can be set to a positive number
-       or `unlimited'.
-
-       (*) `--limit-passes': Number of maximum allowed passes. Default is
-           `unlimited'.
-
-       (*) `--limit-stalled-passes': Maximum number of allowed unfinished
-           passes. Default is 1000.
-
-       (*) `--limit-macro-levels': Define maximum depth of macro expansion
-           (in preprocess). Default is 10000
-
-       (*) `--limit-macro-tokens': Maximum number of tokens processed
-           during single-line macro expansion. Default is 10000000.
-
-       (*) `--limit-mmacros': Maximum number of multi-line macros processed
-           before returning to the top-level input. Default is 100000.
-
-       (*) `--limit-rep': Maximum number of allowed preprocessor loop,
-           defined under `%rep'. Default is 1000000.
-
-       (*) `--limit-eval': This number sets the boundary condition of
-           allowed expression length. Default is 8192 on most systems.
-
-       (*) `--limit-lines': Total number of source lines allowed to be
-           processed. Default is 2000000000.
-
-       For example, set the maximum line count to 1000:
-
-       nasm --limit-lines 1000
-
-       Limits can also be set via the directive `%pragma limit', for
-       example:
-
-       %pragma limit lines 1000
-
-2.1.32 The `--keep-all' Option
-
-       This option prevents NASM from deleting any output files even if an
-       error happens.
-
-2.1.33 The `--no-line' Option
-
-       If this option is given, all `%line' directives in the source code
-       are ignored. This can be useful for debugging already preprocessed
-       code. See section 4.13.1.
-
-2.1.34 The `--reproducible' Option
-
-       If this option is given, NASM will not emit information that is
-       inherently dependent on the NASM version or different from run to
-       run (such as timestamps) into the output file.
-
-2.1.35 The `NASMENV' Environment Variable
-
-       If you define an environment variable called `NASMENV', the program
-       will interpret it as a list of extra command-line options, which are
-       processed before the real command line. You can use this to define
-       standard search directories for include files, by putting `-i'
-       options in the `NASMENV' variable.
-
-       The value of the variable is split up at white space, so that the
-       value `-s -ic:\nasmlib\' will be treated as two separate options.
-       However, that means that the value `-dNAME="my name"' won't do what
-       you might want, because it will be split at the space and the NASM
-       command-line processing will get confused by the two nonsensical
-       words `-dNAME="my' and `name"'.
-
-       To get round this, NASM provides a feature whereby, if you begin the
-       `NASMENV' environment variable with some character that isn't a
-       minus sign, then NASM will treat this character as the separator
-       character for options. So setting the `NASMENV' variable to the
-       value `!-s!-ic:\nasmlib\' is equivalent to setting it to
-       `-s -ic:\nasmlib\', but `!-dNAME="my name"' will work.
-
-       This environment variable was previously called `NASM'. This was
-       changed with version 0.98.31.
-
-   2.2 Quick Start for MASM Users
-
-       If you're used to writing programs with MASM, or with TASM in MASM-
-       compatible (non-Ideal) mode, or with `a86', this section attempts to
-       outline the major differences between MASM's syntax and NASM's. If
-       you're not already used to MASM, it's probably worth skipping this
-       section.
-
- 2.2.1 NASM Is Case-Sensitive
-
-       One simple difference is that NASM is case-sensitive. It makes a
-       difference whether you call your label `foo', `Foo' or `FOO'. If
-       you're assembling to `DOS' or `OS/2' `.OBJ' files, you can invoke
-       the `UPPERCASE' directive (documented in section 8.4) to ensure that
-       all symbols exported to other code modules are forced to be upper
-       case; but even then, _within_ a single module, NASM will distinguish
-       between labels differing only in case.
-
- 2.2.2 NASM Requires Square Brackets For Memory References
-
-       NASM was designed with simplicity of syntax in mind. One of the
-       design goals of NASM is that it should be possible, as far as is
-       practical, for the user to look at a single line of NASM code and
-       tell what opcode is generated by it. You can't do this in MASM: if
-       you declare, for example,
-
-       foo     equ     1 
-       bar     dw      2
-
-       then the two lines of code
-
-               mov     ax,foo 
-               mov     ax,bar
-
-       generate completely different opcodes, despite having identical-
-       looking syntaxes.
-
-       NASM avoids this undesirable situation by having a much simpler
-       syntax for memory references. The rule is simply that any access to
-       the _contents_ of a memory location requires square brackets around
-       the address, and any access to the _address_ of a variable doesn't.
-       So an instruction of the form `mov ax,foo' will _always_ refer to a
-       compile-time constant, whether it's an `EQU' or the address of a
-       variable; and to access the _contents_ of the variable `bar', you
-       must code `mov ax,bar'.
-
-       This also means that NASM has no need for MASM's `OFFSET' keyword,
-       since the MASM code `mov ax,offset bar' means exactly the same thing
-       as NASM's `mov ax,bar'. If you're trying to get large amounts of
-       MASM code to assemble sensibly under NASM, you can always code
-       `%idefine offset' to make the preprocessor treat the `OFFSET'
-       keyword as a no-op.
-
-       This issue is even more confusing in `a86', where declaring a label
-       with a trailing colon defines it to be a `label' as opposed to a
-       `variable' and causes `a86' to adopt NASM-style semantics; so in
-       `a86', `mov ax,var' has different behaviour depending on whether
-       `var' was declared as `var: dw 0' (a label) or `var dw 0' (a word-
-       size variable). NASM is very simple by comparison: _everything_ is a
-       label.
-
-       NASM, in the interests of simplicity, also does not support the
-       hybrid syntaxes supported by MASM and its clones, such as
-       `mov ax,tablebx', where a memory reference is denoted by one
-       portion outside square brackets and another portion inside. The
-       correct syntax for the above is `mov ax,table+bx'. Likewise,
-       `mov ax,es:di' is wrong and `mov ax,es:di' is right.
-
- 2.2.3 NASM Doesn't Store Variable Types
-
-       NASM, by design, chooses not to remember the types of variables you
-       declare. Whereas MASM will remember, on seeing `var dw 0', that you
-       declared `var' as a word-size variable, and will then be able to
-       fill in the ambiguity in the size of the instruction `mov var,2',
-       NASM will deliberately remember nothing about the symbol `var'
-       except where it begins, and so you must explicitly code
-       `mov word var,2'.
-
-       For this reason, NASM doesn't support the `LODS', `MOVS', `STOS',
-       `SCAS', `CMPS', `INS', or `OUTS' instructions, but only supports the
-       forms such as `LODSB', `MOVSW', and `SCASD', which explicitly
-       specify the size of the components of the strings being manipulated.
-
- 2.2.4 NASM Doesn't `ASSUME'
-
-       As part of NASM's drive for simplicity, it also does not support the
-       `ASSUME' directive. NASM will not keep track of what values you
-       choose to put in your segment registers, and will never
-       _automatically_ generate a segment override prefix.
-
- 2.2.5 NASM Doesn't Support Memory Models
-
-       NASM also does not have any directives to support different 16-bit
-       memory models. The programmer has to keep track of which functions
-       are supposed to be called with a far call and which with a near
-       call, and is responsible for putting the correct form of `RET'
-       instruction (`RETN' or `RETF'; NASM accepts `RET' itself as an
-       alternate form for `RETN'); in addition, the programmer is
-       responsible for coding CALL FAR instructions where necessary when
-       calling _external_ functions, and must also keep track of which
-       external variable definitions are far and which are near.
-
- 2.2.6 Floating-Point Differences
-
-       NASM uses different names to refer to floating-point registers from
-       MASM: where MASM would call them `ST(0)', `ST(1)' and so on, and
-       `a86' would call them simply `0', `1' and so on, NASM chooses to
-       call them `st0', `st1' etc.
-
-       As of version 0.96, NASM now treats the instructions with `nowait'
-       forms in the same way as MASM-compatible assemblers. The
-       idiosyncratic treatment employed by 0.95 and earlier was based on a
-       misunderstanding by the authors.
-
- 2.2.7 Other Differences
-
-       For historical reasons, NASM uses the keyword `TWORD' where MASM and
-       compatible assemblers use `TBYTE'.
-
-       Historically, NASM does not declare uninitialized storage in the
-       same way as MASM: where a MASM programmer might use
-       `stack db 64 dup (?)', NASM requires `stack resb 64', intended to be
-       read as `reserve 64 bytes'. For a limited amount of compatibility,
-       since NASM treats `?' as a valid character in symbol names, you can
-       code `? equ 0' and then writing `dw ?' will at least do something
-       vaguely useful.
-
-       As of NASM 2.15, the MASM syntax is also supported.
-
-       In addition to all of this, macros and directives work completely
-       differently to MASM. See chapter 4 and chapter 7 for further
-       details.
-
- 2.2.8 MASM compatibility package
-
-       See section 6.5.
-
-Chapter 3: The NASM Language
-----------------------------
-
-   3.1 Layout of a NASM Source Line
-
-       Like most assemblers, each NASM source line contains (unless it is a
-       macro, a preprocessor directive or an assembler directive: see
-       chapter 4 and chapter 7) some combination of the four fields
-
-       label:    instruction operands        ; comment
-
-       As usual, most of these fields are optional; the presence or absence
-       of any combination of a label, an instruction and a comment is
-       allowed. Of course, the operand field is either required or
-       forbidden by the presence and nature of the instruction field.
-
-       NASM uses backslash (\) as the line continuation character; if a
-       line ends with backslash, the next line is considered to be a part
-       of the backslash-ended line.
-
-       NASM places no restrictions on white space within a line: labels may
-       have white space before them, or instructions may have no space
-       before them, or anything. The colon after a label is also optional.
-       (Note that this means that if you intend to code `lodsb' alone on a
-       line, and type `lodab' by accident, then that's still a valid source
-       line which does nothing but define a label. Running NASM with the
-       command-line option `-w+orphan-labels' will cause it to warn you if
-       you define a label alone on a line without a trailing colon.)
-
-       Valid characters in labels are letters, numbers, `_', `$', `#', `@',
-       `~', `.', and `?'. The only characters which may be used as the
-       _first_ character of an identifier are letters, `.' (with special
-       meaning: see section 3.9), `_' and `?'. An identifier may also be
-       prefixed with a `$' to indicate that it is intended to be read as an
-       identifier and not a reserved word; thus, if some other module you
-       are linking with defines a symbol called `eax', you can refer to
-       `$eax' in NASM code to distinguish the symbol from the register.
-       Maximum length of an identifier is 4095 characters.
-
-       The instruction field may contain any machine instruction: Pentium
-       and P6 instructions, FPU instructions, MMX instructions and even
-       undocumented instructions are all supported. The instruction may be
-       prefixed by `LOCK', `REP', `REPE'/`REPZ', `REPNE'/`REPNZ',
-       `XACQUIRE'/`XRELEASE' or `BND'/`NOBND', in the usual way. Explicit
-       address-size and operand-size prefixes `A16', `A32', `A64', `O16'
-       and `O32', `O64' are provided - one example of their use is given in
-       chapter 11. You can also use the name of a segment register as an
-       instruction prefix: coding `es mov bx,ax' is equivalent to coding
-       `mov es:bx,ax'. We recommend the latter syntax, since it is
-       consistent with other syntactic features of the language, but for
-       instructions such as `LODSB', which has no operands and yet can
-       require a segment override, there is no clean syntactic way to
-       proceed apart from `es lodsb'.
-
-       An instruction is not required to use a prefix: prefixes such as
-       `CS', `A32', `LOCK' or `REPE' can appear on a line by themselves,
-       and NASM will just generate the prefix bytes.
-
-       In addition to actual machine instructions, NASM also supports a
-       number of pseudo-instructions, described in section 3.2.
-
-       Instruction operands may take a number of forms: they can be
-       registers, described simply by the register name (e.g. `ax', `bp',
-       `ebx', `cr0': NASM does not use the `gas'-style syntax in which
-       register names must be prefixed by a `%' sign), or they can be
-       effective addresses (see section 3.3), constants (section 3.4) or
-       expressions (section 3.5).
-
-       For x87 floating-point instructions, NASM accepts a wide range of
-       syntaxes: you can use two-operand forms like MASM supports, or you
-       can use NASM's native single-operand forms in most cases. For
-       example, you can code:
-
-               fadd    st1             ; this sets st0 := st0 + st1 
-               fadd    st0,st1         ; so does this 
-       
-               fadd    st1,st0         ; this sets st1 := st1 + st0 
-               fadd    to st1          ; so does this
-
-       Almost any x87 floating-point instruction that references memory
-       must use one of the prefixes `DWORD', `QWORD' or `TWORD' to indicate
-       what size of memory operand it refers to.
-
-   3.2 Pseudo-Instructions
-
-       Pseudo-instructions are things which, though not real x86 machine
-       instructions, are used in the instruction field anyway because
-       that's the most convenient place to put them. The current pseudo-
-       instructions are `DB', `DW', `DD', `DQ', `DT', `DO', `DY' and `DZ';
-       their uninitialized counterparts `RESB', `RESW', `RESD', `RESQ',
-       `REST', `RESO', `RESY' and `RESZ'; the `INCBIN' command, the `EQU'
-       command, and the `TIMES' prefix.
-
-       In this documentation, the notation "`Dx'" and "`RESx'" is used to
-       indicate all the `DB' and `RESB' type directives, respectively.
-
- 3.2.1 `Dx': Declaring Initialized Data
-
-       `DB', `DW', `DD', `DQ', `DT', `DO', `DY' and `DZ' (collectively
-       "`Dx'" in this documentation) are used, much as in MASM, to declare
-       initialized data in the output file. They can be invoked in a wide
-       range of ways:
-
-             db    0x55                ; just the byte 0x55 
-             db    0x55,0x56,0x57      ; three bytes in succession 
-             db    'a',0x55            ; character constants are OK 
-             db    'hello',13,10,'$'   ; so are string constants 
-             dw    0x1234              ; 0x34 0x12 
-             dw    'a'                 ; 0x61 0x00 (it's just a number) 
-             dw    'ab'                ; 0x61 0x62 (character constant) 
-             dw    'abc'               ; 0x61 0x62 0x63 0x00 (string) 
-             dd    0x12345678          ; 0x78 0x56 0x34 0x12 
-             dd    1.234567e20         ; floating-point constant 
-             dq    0x123456789abcdef0  ; eight byte constant 
-             dq    1.234567e20         ; double-precision float 
-             dt    1.234567e20         ; extended-precision float
-
-       `DT', `DO', `DY' and `DZ' do not accept integer numeric constants as
-       operands.
-
-        Starting in NASM 2.15, a the following MASM-like features have been
-       implemented:
-
-       (*) A `?' argument to declare uninitialized storage:
-
-             db    ?                   ; uninitialized
-
-       (*) A superset of the `DUP' syntax. The NASM version of this has the
-           following syntax specification; capital letters indicate literal
-           keywords:
-
-            dx      := DB | DW | DD | DQ | DT | DO | DY | DZ 
-            type    := BYTE | WORD | DWORD | QWORD | TWORD | OWORD | YWORD | ZWORD 
-            atom    := expression | string | float | '?' 
-            parlist := '(' value , value ... ')' 
-            duplist := expression DUP type '%' parlist 
-            list    := duplist | '%' parlist | type '%' parlist 
-            value   := atom | type value | list 
-       
-            stmt    := dx value , value...
-
-           Note that a _list_ needs to be prefixed with a `%' sign unless
-           prefixed by either `DUP' or a _type_ in order to avoid confusing
-           it with a parenthesis starting an expression. The following
-           expressions are all valid:
-
-              db 33 
-              db (44)               ; Integer expression 
-            ; db (44,55)            ; Invalid - error 
-              db %(44,55) 
-              db %('XX','YY') 
-              db ('AA')             ; Integer expression - outputs single byte 
-              db %('BB')            ; List, containing a string 
-              db ? 
-              db 6 dup (33) 
-              db 6 dup (33, 34) 
-              db 6 dup (33, 34), 35 
-              db 7 dup (99) 
-              db 7 dup dword (?, word ?, ?) 
-              dw byte (?,44) 
-              dw 3 dup (0xcc, 4 dup byte ('PQR'), ?), 0xabcd 
-              dd 16 dup (0xaaaa, ?, 0xbbbbbb) 
-              dd 64 dup (?)
-
-        The use of `$' (current address) in a `Dx' statement is undefined
-       in the current version of NASM, _except in the following cases_:
-
-       (*) For the first expression in the statement, either a `DUP' or a
-           data item.
-
-       (*) An expression of the form "_value_` - $'", which is converted to
-           a self-relative relocation.
-
-       Future versions of NASM is likely to produce a different result or
-       issue an error this case.
-
-       There is no such restriction on using `$$' or section-relative
-       symbols.
-
- 3.2.2 `RESB' and Friends: Declaring Uninitialized Data
-
-       `RESB', `RESW', `RESD', `RESQ', `REST', `RESO', `RESY' and `RESZ'
-       are designed to be used in the BSS section of a module: they declare
-       _uninitialized_ storage space. Each takes a single operand, which is
-       the number of bytes, words, doublewords or whatever to reserve. The
-       operand to a `RESB'-type pseudo-instruction _would_ be a _critical
-       expression_ (see section 3.8), except that for legacy compatibility
-       reasons forward references are permitted, however _the code will be
-       extremely fragile and this should be considered a severe programming
-       error._ A warning will be issued; code generating this warning
-       should be remedied as quickly as possible (see the `forward' class
-       in appendix A.)
-
-       For example:
-
-       buffer:         resb    64              ; reserve 64 bytes 
-       wordvar:        resw    1               ; reserve a word 
-       realarray       resq    10              ; array of ten reals 
-       ymmval:         resy    1               ; one YMM register 
-       zmmvals:        resz    32              ; 32 ZMM registers
-
-        Since NASM 2.15, the MASM syntax of using `?' and `DUP' in the
-       `D'_x_ directives is also supported. Thus, the above example could
-       also be written:
-
-       buffer:         db      64 dup (?)      ; reserve 64 bytes 
-       wordvar:        dw      ?               ; reserve a word 
-       realarray       dq      10 dup (?)      ; array of ten reals 
-       ymmval:         dy      ?               ; one YMM register 
-       zmmvals:        dz      32 dup (?)      ; 32 ZMM registers
-
- 3.2.3 `INCBIN': Including External Binary Files
-
-       `INCBIN' includes binary file data verbatim into the output file.
-       This can be handy for (for example) including graphics and sound
-       data directly into a game executable file. It can be called in one
-       of these three ways:
-
-           incbin  "file.dat"             ; include the whole file 
-           incbin  "file.dat",1024        ; skip the first 1024 bytes 
-           incbin  "file.dat",1024,512    ; skip the first 1024, and 
-                                          ; actually include at most 512
-
-       `INCBIN' is both a directive and a standard macro; the standard
-       macro version searches for the file in the include file search path
-       and adds the file to the dependency lists. This macro can be
-       overridden if desired.
-
- 3.2.4 `EQU': Defining Constants
-
-       `EQU' defines a symbol to a given constant value: when `EQU' is
-       used, the source line must contain a label. The action of `EQU' is
-       to define the given label name to the value of its (only) operand.
-       This definition is absolute, and cannot change later. So, for
-       example,
-
-       message         db      'hello, world' 
-       msglen          equ     $-message
-
-       defines `msglen' to be the constant 12. `msglen' may not then be
-       redefined later. This is not a preprocessor definition either: the
-       value of `msglen' is evaluated _once_, using the value of `$' (see
-       section 3.5 for an explanation of `$') at the point of definition,
-       rather than being evaluated wherever it is referenced and using the
-       value of `$' at the point of reference.
-
- 3.2.5 `TIMES': Repeating Instructions or Data
-
-       The `TIMES' prefix causes the instruction to be assembled multiple
-       times. This is partly present as NASM's equivalent of the `DUP'
-       syntax supported by MASM-compatible assemblers, in that you can code
-
-       zerobuf:        times 64 db 0
-
-       or similar things; but `TIMES' is more versatile than that. The
-       argument to `TIMES' is not just a numeric constant, but a numeric
-       _expression_, so you can do things like
-
-       buffer: db      'hello, world' 
-               times 64-$+buffer db ' '
-
-       which will store exactly enough spaces to make the total length of
-       `buffer' up to 64. Finally, `TIMES' can be applied to ordinary
-       instructions, so you can code trivial unrolled loops in it:
-
-               times 100 movsb
-
-       Note that there is no effective difference between
-       `times 100 resb 1' and `resb 100', except that the latter will be
-       assembled about 100 times faster due to the internal structure of
-       the assembler.
-
-       The operand to `TIMES' is a critical expression (section 3.8).
-
-       Note also that `TIMES' can't be applied to macros: the reason for
-       this is that `TIMES' is processed after the macro phase, which
-       allows the argument to `TIMES' to contain expressions such as
-       `64-$+buffer' as above. To repeat more than one line of code, or a
-       complex macro, use the preprocessor `%rep' directive.
-
-   3.3 Effective Addresses
-
-       An effective address is any operand to an instruction which
-       references memory. Effective addresses, in NASM, have a very simple
-       syntax: they consist of an expression evaluating to the desired
-       address, enclosed in square brackets. For example:
-
-       wordvar dw      123 
-               mov     ax,wordvar 
-               mov     ax,wordvar+1 
-               mov     ax,es:wordvar+bx
-
-       Anything not conforming to this simple system is not a valid memory
-       reference in NASM, for example `es:wordvarbx'.
-
-       More complicated effective addresses, such as those involving more
-       than one register, work in exactly the same way:
-
-               mov     eax,ebx*2+ecx+offset 
-               mov     ax,bp+di+8
-
-       NASM is capable of doing algebra on these effective addresses, so
-       that things which don't necessarily _look_ legal are perfectly all
-       right:
-
-           mov     eax,ebx*5             ; assembles as ebx*4+ebx 
-           mov     eax,label1*2-label2   ; ie label1+(label1-label2)
-
-       Some forms of effective address have more than one assembled form;
-       in most such cases NASM will generate the smallest form it can. For
-       example, there are distinct assembled forms for the 32-bit effective
-       addresses `eax*2+0' and `eax+eax', and NASM will generally
-       generate the latter on the grounds that the former requires four
-       bytes to store a zero offset.
-
-       NASM has a hinting mechanism which will cause `eax+ebx' and
-       `ebx+eax' to generate different opcodes; this is occasionally
-       useful because `esi+ebp' and `ebp+esi' have different default
-       segment registers.
-
-       However, you can force NASM to generate an effective address in a
-       particular form by the use of the keywords `BYTE', `WORD', `DWORD'
-       and `NOSPLIT'. If you need `eax+3' to be assembled using a double-
-       word offset field instead of the one byte NASM will normally
-       generate, you can code `dword eax+3'. Similarly, you can force
-       NASM to use a byte offset for a small value which it hasn't seen on
-       the first pass (see section 3.8 for an example of such a code
-       fragment) by using `byte eax+offset'. As special cases,
-       `byte eax' will code `eax+0' with a byte offset of zero, and
-       `dword eax' will code it with a double-word offset of zero. The
-       normal form, `eax', will be coded with no offset field.
-
-       The form described in the previous paragraph is also useful if you
-       are trying to access data in a 32-bit segment from within 16 bit
-       code. For more information on this see the section on mixed-size
-       addressing (section 11.2). In particular, if you need to access data
-       with a known offset that is larger than will fit in a 16-bit value,
-       if you don't specify that it is a dword offset, nasm will cause the
-       high word of the offset to be lost.
-
-       Similarly, NASM will split `eax*2' into `eax+eax' because that
-       allows the offset field to be absent and space to be saved; in fact,
-       it will also split `eax*2+offset' into `eax+eax+offset'. You can
-       combat this behaviour by the use of the `NOSPLIT' keyword:
-       `nosplit eax*2' will force `eax*2+0' to be generated literally.
-       `nosplit eax*1' also has the same effect. In another way, a split
-       EA form `0, eax*2' can be used, too. However, `NOSPLIT' in
-       `nosplit eax+eax' will be ignored because user's intention here is
-       considered as `eax+eax'.
-
-       In 64-bit mode, NASM will by default generate absolute addresses.
-       The `REL' keyword makes it produce `RIP'-relative addresses. Since
-       this is frequently the normally desired behaviour, see the `DEFAULT'
-       directive (section 7.2). The keyword `ABS' overrides `REL'.
-
-       A new form of split effective address syntax is also supported. This
-       is mainly intended for mib operands as used by MPX instructions, but
-       can be used for any memory reference. The basic concept of this form
-       is splitting base and index.
-
-            mov eax,ebx+8,ecx*4   ; ebx=base, ecx=index, 4=scale, 8=disp
-
-       For mib operands, there are several ways of writing effective
-       address depending on the tools. NASM supports all currently possible
-       ways of mib syntax:
-
-            ; bndstx 
-            ; next 5 lines are parsed same 
-            ; base=rax, index=rbx, scale=1, displacement=3 
-            bndstx rax+0x3,rbx, bnd0      ; NASM - split EA 
-            bndstx rbx*1+rax+0x3, bnd0    ; GAS - '*1' indecates an index reg 
-            bndstx rax+rbx+3, bnd0        ; GAS - without hints 
-            bndstx rax+0x3, bnd0, rbx     ; ICC-1 
-            bndstx rax+0x3, rbx, bnd0     ; ICC-2
-
-       When broadcasting decorator is used, the opsize keyword should match
-       the size of each element.
-
-            VDIVPS zmm4, zmm5, dword rbx{1to16}   ; single-precision float 
-            VDIVPS zmm4, zmm5, zword rbx          ; packed 512 bit memory
-
-   3.4 Constants
-
-       NASM understands four different types of constant: numeric,
-       character, string and floating-point.
-
- 3.4.1 Numeric Constants
-
-       A numeric constant is simply a number. NASM allows you to specify
-       numbers in a variety of number bases, in a variety of ways: you can
-       suffix `H' or `X', `D' or `T', `Q' or `O', and `B' or `Y' for
-       hexadecimal, decimal, octal and binary respectively, or you can
-       prefix `0x', for hexadecimal in the style of C, or you can prefix
-       `$' for hexadecimal in the style of Borland Pascal or Motorola
-       Assemblers. Note, though, that the `$' prefix does double duty as a
-       prefix on identifiers (see section 3.1), so a hex number prefixed
-       with a `$' sign must have a digit after the `$' rather than a
-       letter. In addition, current versions of NASM accept the prefix `0h'
-       for hexadecimal, `0d' or `0t' for decimal, `0o' or `0q' for octal,
-       and `0b' or `0y' for binary. Please note that unlike C, a `0' prefix
-       by itself does _not_ imply an octal constant!
-
-       Numeric constants can have underscores (`_') interspersed to break
-       up long strings.
-
-       Some examples (all producing exactly the same code):
-
-               mov     ax,200          ; decimal 
-               mov     ax,0200         ; still decimal 
-               mov     ax,0200d        ; explicitly decimal 
-               mov     ax,0d200        ; also decimal 
-               mov     ax,0c8h         ; hex 
-               mov     ax,$0c8         ; hex again: the 0 is required 
-               mov     ax,0xc8         ; hex yet again 
-               mov     ax,0hc8         ; still hex 
-               mov     ax,310q         ; octal 
-               mov     ax,310o         ; octal again 
-               mov     ax,0o310        ; octal yet again 
-               mov     ax,0q310        ; octal yet again 
-               mov     ax,11001000b    ; binary 
-               mov     ax,1100_1000b   ; same binary constant 
-               mov     ax,1100_1000y   ; same binary constant once more 
-               mov     ax,0b1100_1000  ; same binary constant yet again 
-               mov     ax,0y1100_1000  ; same binary constant yet again
-
- 3.4.2 Character Strings
-
-       A character string consists of up to eight characters enclosed in
-       either single quotes (`'...''), double quotes (`"..."') or
-       backquotes (``...`'). Single or double quotes are equivalent to NASM
-       (except of course that surrounding the constant with single quotes
-       allows double quotes to appear within it and vice versa); the
-       contents of those are represented verbatim. Strings enclosed in
-       backquotes support C-style `\'-escapes for special characters.
-
-       The following escape sequences are recognized by backquoted strings:
-
-             \'          single quote (') 
-             \"          double quote (") 
-             \`          backquote (`) 
-             \\          backslash (\) 
-             \?          question mark (?) 
-             \a          BEL (ASCII 7) 
-             \b          BS  (ASCII 8) 
-             \t          TAB (ASCII 9) 
-             \n          LF  (ASCII 10) 
-             \v          VT  (ASCII 11) 
-             \f          FF  (ASCII 12) 
-             \r          CR  (ASCII 13) 
-             \e          ESC (ASCII 27) 
-             \377        Up to 3 octal digits - literal byte 
-             \xFF        Up to 2 hexadecimal digits - literal byte 
-             \u1234      4 hexadecimal digits - Unicode character 
-             \U12345678  8 hexadecimal digits - Unicode character
-
-       All other escape sequences are reserved. Note that `\0', meaning a
-       `NUL' character (ASCII 0), is a special case of the octal escape
-       sequence.
-
-       Unicode characters specified with `\u' or `\U' are converted to
-       UTF-8. For example, the following lines are all equivalent:
-
-             db `\u263a`            ; UTF-8 smiley face 
-             db `\xe2\x98\xba`      ; UTF-8 smiley face 
-             db 0E2h, 098h, 0BAh    ; UTF-8 smiley face
-
- 3.4.3 Character Constants
-
-       A character constant consists of a string up to eight bytes long,
-       used in an expression context. It is treated as if it was an
-       integer.
-
-       A character constant with more than one byte will be arranged with
-       little-endian order in mind: if you code
-
-                 mov eax,'abcd'
-
-       then the constant generated is not `0x61626364', but `0x64636261',
-       so that if you were then to store the value into memory, it would
-       read `abcd' rather than `dcba'. This is also the sense of character
-       constants understood by the Pentium's `CPUID' instruction.
-
- 3.4.4 String Constants
-
-       String constants are character strings used in the context of some
-       pseudo-instructions, namely the `DB' family and `INCBIN' (where it
-       represents a filename.) They are also used in certain preprocessor
-       directives.
-
-       A string constant looks like a character constant, only longer. It
-       is treated as a concatenation of maximum-size character constants
-       for the conditions. So the following are equivalent:
-
-             db    'hello'               ; string constant 
-             db    'h','e','l','l','o'   ; equivalent character constants
-
-       And the following are also equivalent:
-
-             dd    'ninechars'           ; doubleword string constant 
-             dd    'nine','char','s'     ; becomes three doublewords 
-             db    'ninechars',0,0,0     ; and really looks like this
-
-       Note that when used in a string-supporting context, quoted strings
-       are treated as a string constants even if they are short enough to
-       be a character constant, because otherwise `db 'ab'' would have the
-       same effect as `db 'a'', which would be silly. Similarly, three-
-       character or four-character constants are treated as strings when
-       they are operands to `DW', and so forth.
-
- 3.4.5 Unicode Strings
-
-       The special operators `__?utf16?__', `__?utf16le?__',
-       `__?utf16be?__', `__?utf32?__', `__?utf32le?__' and `__?utf32be?__'
-       allows definition of Unicode strings. They take a string in UTF-8
-       format and converts it to UTF-16 or UTF-32, respectively. Unless the
-       `be' forms are specified, the output is littleendian.
-
-       For example:
-
-       %define u(x) __?utf16?__(x) 
-       %define w(x) __?utf32?__(x) 
-       
-             dw u('C:\WINDOWS'), 0       ; Pathname in UTF-16 
-             dd w(`A + B = \u206a`), 0   ; String in UTF-32
-
-       The UTF operators can be applied either to strings passed to the
-       `DB' family instructions, or to character constants in an expression
-       context.
-
- 3.4.6 Floating-Point Constants
-
-       Floating-point constants are acceptable only as arguments to `DB',
-       `DW', `DD', `DQ', `DT', and `DO', or as arguments to the special
-       operators `__?float8?__', `__?float16?__', `__?bfloat16?__',
-       `__?float32?__', `__?float64?__', `__?float80m?__',
-       `__?float80e?__', `__?float128l?__', and `__?float128h?__'. See also
-       section 6.3.
-
-       Floating-point constants are expressed in the traditional form:
-       digits, then a period, then optionally more digits, then optionally
-       an `E' followed by an exponent. The period is mandatory, so that
-       NASM can distinguish between `dd 1', which declares an integer
-       constant, and `dd 1.0' which declares a floating-point constant.
-
-       NASM also support C99-style hexadecimal floating-point: `0x',
-       hexadecimal digits, period, optionally more hexadeximal digits, then
-       optionally a `P' followed by a _binary_ (not hexadecimal) exponent
-       in decimal notation. As an extension, NASM additionally supports the
-       `0h' and `$' prefixes for hexadecimal, as well binary and octal
-       floating-point, using the `0b' or `0y' and `0o' or `0q' prefixes,
-       respectively.
-
-       Underscores to break up groups of digits are permitted in floating-
-       point constants as well.
-
-       Some examples:
-
-             db    -0.2                    ; "Quarter precision" 
-             dw    -0.5                    ; IEEE 754r/SSE5 half precision 
-             dd    1.2                     ; an easy one 
-             dd    1.222_222_222           ; underscores are permitted 
-             dd    0x1p+2                  ; 1.0x2^2 = 4.0 
-             dq    0x1p+32                 ; 1.0x2^32 = 4 294 967 296.0 
-             dq    1.e10                   ; 10 000 000 000.0 
-             dq    1.e+10                  ; synonymous with 1.e10 
-             dq    1.e-10                  ; 0.000 000 000 1 
-             dt    3.141592653589793238462 ; pi 
-             do    1.e+4000                ; IEEE 754r quad precision
-
-       The 8-bit "quarter-precision" floating-point format is
-       sign:exponent:mantissa = 1:4:3 with an exponent bias of 7. This
-       appears to be the most frequently used 8-bit floating-point format,
-       although it is not covered by any formal standard. This is sometimes
-       called a "minifloat."
-
-       The `bfloat16' format is effectively a compressed version of the 32-
-       bit single precision format, with a reduced mantissa. It is
-       effectively the same as truncating the 32-bit format to the upper 16
-       bits, except for rounding. There is no `D'_x_ directive that
-       corresponds to `bfloat16' as it obviously has the same size as the
-       IEEE standard 16-bit half precision format, see however section 6.3.
-
-       The special operators are used to produce floating-point numbers in
-       other contexts. They produce the binary representation of a specific
-       floating-point number as an integer, and can use anywhere integer
-       constants are used in an expression. `__?float80m?__' and
-       `__?float80e?__' produce the 64-bit mantissa and 16-bit exponent of
-       an 80-bit floating-point number, and `__?float128l?__' and
-       `__?float128h?__' produce the lower and upper 64-bit halves of a
-       128-bit floating-point number, respectively.
-
-       For example:
-
-             mov    rax,__?float64?__(3.141592653589793238462)
-
-       ... would assign the binary representation of pi as a 64-bit
-       floating point number into `RAX'. This is exactly equivalent to:
-
-             mov    rax,0x400921fb54442d18
-
-       NASM cannot do compile-time arithmetic on floating-point constants.
-       This is because NASM is designed to be portable - although it always
-       generates code to run on x86 processors, the assembler itself can
-       run on any system with an ANSI C compiler. Therefore, the assembler
-       cannot guarantee the presence of a floating-point unit capable of
-       handling the Intel number formats, and so for NASM to be able to do
-       floating arithmetic it would have to include its own complete set of
-       floating-point routines, which would significantly increase the size
-       of the assembler for very little benefit.
-
-       The special tokens `__?Infinity?__', `__?QNaN?__' (or `__?NaN?__')
-       and `__?SNaN?__' can be used to generate infinities, quiet NaNs, and
-       signalling NaNs, respectively. These are normally used as macros:
-
-       %define Inf __?Infinity?__ 
-       %define NaN __?QNaN?__ 
-       
-             dq    +1.5, -Inf, NaN         ; Double-precision constants
-
-       The `%use fp' standard macro package contains a set of convenience
-       macros. See section 6.3.
-
- 3.4.7 Packed BCD Constants
-
-       x87-style packed BCD constants can be used in the same contexts as
-       80-bit floating-point numbers. They are suffixed with `p' or
-       prefixed with `0p', and can include up to 18 decimal digits.
-
-       As with other numeric constants, underscores can be used to separate
-       digits.
-
-       For example:
-
-             dt 12_345_678_901_245_678p 
-             dt -12_345_678_901_245_678p 
-             dt +0p33 
-             dt 33p
-
-   3.5 Expressions
-
-       Expressions in NASM are similar in syntax to those in C. Expressions
-       are evaluated as 64-bit integers which are then adjusted to the
-       appropriate size.
-
-       NASM supports two special tokens in expressions, allowing
-       calculations to involve the current assembly position: the `$' and
-       `$$' tokens. `$' evaluates to the assembly position at the beginning
-       of the line containing the expression; so you can code an infinite
-       loop using `JMP $'. `$$' evaluates to the beginning of the current
-       section; so you can tell how far into the section you are by using
-       `($-$$)'.
-
-       The arithmetic operators provided by NASM are listed here, in
-       increasing order of precedence.
-
-       A _boolean_ value is true if nonzero and false if zero. The
-       operators which return a boolean value always return 1 for true and
-       0 for false.
-
- 3.5.1 `?' ... `:': Conditional Operator
-
-       The syntax of this operator, similar to the C conditional operator,
-       is:
-
-       _boolean_ `?' _trueval_ `:' _falseval_
-
-       This operator evaluates to _trueval_ if _boolean_ is true, otherwise
-       to _falseval_.
-
-       Note that NASM allows `?' characters in symbol names. Therefore, it
-       is highly advisable to always put spaces around the `?' and `:'
-       characters.
-
- 3.5.2 : `||': Boolean OR Operator
-
-       The `||' operator gives a boolean OR: it evaluates to 1 if both
-       sides of the expression are nonzero, otherwise 0.
-
- 3.5.3 : `^^': Boolean XOR Operator
-
-       The `^^' operator gives a boolean XOR: it evaluates to 1 if any one
-       side of the expression is nonzero, otherwise 0.
-
- 3.5.4 : `&&': Boolean AND Operator
-
-       The `&&' operator gives a boolean AND: it evaluates to 1 if both
-       sides of the expression is nonzero, otherwise 0.
-
- 3.5.5 : Comparison Operators
-
-       NASM supports the following comparison operators:
-
-       (*) `=' or `==' compare for equality.
-
-       (*) `!=' or `<>' compare for inequality.
-
-       (*) `<' compares signed less than.
-
-       (*) `<=' compares signed less than or equal.
-
-       (*) `>' compares signed greater than.
-
-       (*) `>=' compares signed greater than or equal.
-
-       These operators evaluate to 0 for false or 1 for true.
-
-       (*) <=> does a signed comparison, and evaluates to -1 for less than,
-           0 for equal, and 1 for greater than.
-
-       At this time, NASM does not provide unsigned comparison operators.
-
- 3.5.6 `|': Bitwise OR Operator
-
-       The `|' operator gives a bitwise OR, exactly as performed by the
-       `OR' machine instruction.
-
- 3.5.7 `^': Bitwise XOR Operator
-
-       `^' provides the bitwise XOR operation.
-
- 3.5.8 `&': Bitwise AND Operator
-
-       `&' provides the bitwise AND operation.
-
- 3.5.9 Bit Shift Operators
-
-       `<<' gives a bit-shift to the left, just as it does in C. So `5<<3'
-       evaluates to 5 times 8, or 40. `>>' gives an _unsigned_ (logical)
-       bit-shift to the right; the bits shifted in from the left are set to
-       zero.
-
-       `<<<' gives a bit-shift to the left, exactly equivalent to the `<<'
-       operator; it is included for completeness. `>>>' gives an _signed_
-       (arithmetic) bit-shift to the right; the bits shifted in from the
-       left are filled with copies of the most significant (sign) bit.
-
-3.5.10 `+' and `-': Addition and Subtraction Operators
-
-       The `+' and `-' operators do perfectly ordinary addition and
-       subtraction.
-
-3.5.11 Multiplication, Division and Modulo
-
-       `*' is the multiplication operator.
-
-       `/' and `//' are both division operators: `/' is unsigned division
-       and `//' is signed division.
-
-       Similarly, `%' and `%%' provide unsigned and signed modulo operators
-       respectively.
-
-       Since the `%' character is used extensively by the macro
-       preprocessor, you should ensure that both the signed and unsigned
-       modulo operators are followed by white space wherever they appear.
-
-       NASM, like ANSI C, provides no guarantees about the sensible
-       operation of the signed modulo operator. On most systems it will
-       match the signed division operator, such that:
-
-            b * (a // b) + (a %% b) = a       (b != 0)
-
-3.5.12 Unary Operators
-
-       The highest-priority operators in NASM's expression grammar are
-       those which only apply to one argument. These are:
-
-       (*) `-' negates (2's complement) its operand.
-
-       (*) `+' does nothing; it's provided for symmetry with `-'.
-
-       (*) `~' computes the bitwise negation (1's complement) of its
-           operand.
-
-       (*) `!' is the boolean negation operator. It evaluates to 1 if the
-           argument is 0, otherwise 0.
-
-       (*) `SEG' provides the segment address of its operand (explained in
-           more detail in section 3.6).
-
-       (*) A set of additional operators with leading and trailing double
-           underscores are used to implement the `integer functions' of the
-           `ifunc' macro package, see section 6.4.
-
-   3.6 `SEG' and `WRT'
-
-       When writing large 16-bit programs, which must be split into
-       multiple segments, it is often necessary to be able to refer to the
-       segment part of the address of a symbol. NASM supports the `SEG'
-       operator to perform this function.
-
-       The `SEG' operator evaluates to the _preferred_ segment base of a
-       symbol, defined as the segment base relative to which the offset of
-       the symbol makes sense. So the code
-
-               mov     ax,seg symbol 
-               mov     es,ax 
-               mov     bx,symbol
-
-       will load `ES:BX' with a valid pointer to the symbol `symbol'.
-
-       Things can be more complex than this: since 16-bit segments and
-       groups may overlap, you might occasionally want to refer to some
-       symbol using a different segment base from the preferred one. NASM
-       lets you do this, by the use of the `WRT' (With Reference To)
-       keyword. So you can do things like
-
-               mov     ax,weird_seg        ; weird_seg is a segment base 
-               mov     es,ax 
-               mov     bx,symbol wrt weird_seg
-
-       to load `ES:BX' with a different, but functionally equivalent,
-       pointer to the symbol `symbol'.
-
-       NASM supports far (inter-segment) calls and jumps by means of the
-       syntax `call segment:offset', where `segment' and `offset' both
-       represent immediate values. So to call a far procedure, you could
-       code either of
-
-               call    (seg procedure):procedure 
-               call    weird_seg:(procedure wrt weird_seg)
-
-       (The parentheses are included for clarity, to show the intended
-       parsing of the above instructions. They are not necessary in
-       practice.)
-
-       NASM supports the syntax `call far procedure' as a synonym for the
-       first of the above usages. `JMP' works identically to `CALL' in
-       these examples.
-
-       To declare a far pointer to a data item in a data segment, you must
-       code
-
-               dw      symbol, seg symbol
-
-       NASM supports no convenient synonym for this, though you can always
-       invent one using the macro processor.
-
-   3.7 `STRICT': Inhibiting Optimization
-
-       When assembling with the optimizer set to level 2 or higher (see
-       section 2.1.24), NASM will use size specifiers (`BYTE', `WORD',
-       `DWORD', `QWORD', `TWORD', `OWORD', `YWORD' or `ZWORD'), but will
-       give them the smallest possible size. The keyword `STRICT' can be
-       used to inhibit optimization and force a particular operand to be
-       emitted in the specified size. For example, with the optimizer on,
-       and in `BITS 16' mode,
-
-               push dword 33
-
-       is encoded in three bytes `66 6A 21', whereas
-
-               push strict dword 33
-
-       is encoded in six bytes, with a full dword immediate operand
-       `66 68 21 00 00 00'.
-
-       With the optimizer off, the same code (six bytes) is generated
-       whether the `STRICT' keyword was used or not.
-
-   3.8 Critical Expressions
-
-       Although NASM has an optional multi-pass optimizer, there are some
-       expressions which must be resolvable on the first pass. These are
-       called _Critical Expressions_.
-
-       The first pass is used to determine the size of all the assembled
-       code and data, so that the second pass, when generating all the
-       code, knows all the symbol addresses the code refers to. So one
-       thing NASM can't handle is code whose size depends on the value of a
-       symbol declared after the code in question. For example,
-
-               times (label-$) db 0 
-       label:  db      'Where am I?'
-
-       The argument to `TIMES' in this case could equally legally evaluate
-       to anything at all; NASM will reject this example because it cannot
-       tell the size of the `TIMES' line when it first sees it. It will
-       just as firmly reject the slightly paradoxical code
-
-               times (label-$+1) db 0 
-       label:  db      'NOW where am I?'
-
-       in which _any_ value for the `TIMES' argument is by definition
-       wrong!
-
-       NASM rejects these examples by means of a concept called a _critical
-       expression_, which is defined to be an expression whose value is
-       required to be computable in the first pass, and which must
-       therefore depend only on symbols defined before it. The argument to
-       the `TIMES' prefix is a critical expression.
-
-   3.9 Local Labels
-
-       NASM gives special treatment to symbols beginning with a period. A
-       label beginning with a single period is treated as a _local_ label,
-       which means that it is associated with the previous non-local label.
-       So, for example:
-
-       label1  ; some code 
-       
-       .loop 
-               ; some more code 
-       
-               jne     .loop 
-               ret 
-       
-       label2  ; some code 
-       
-       .loop 
-               ; some more code 
-       
-               jne     .loop 
-               ret
-
-       In the above code fragment, each `JNE' instruction jumps to the line
-       immediately before it, because the two definitions of `.loop' are
-       kept separate by virtue of each being associated with the previous
-       non-local label.
-
-       This form of local label handling is borrowed from the old Amiga
-       assembler DevPac; however, NASM goes one step further, in allowing
-       access to local labels from other parts of the code. This is
-       achieved by means of _defining_ a local label in terms of the
-       previous non-local label: the first definition of `.loop' above is
-       really defining a symbol called `label1.loop', and the second
-       defines a symbol called `label2.loop'. So, if you really needed to,
-       you could write
-
-       label3  ; some more code 
-               ; and some more 
-       
-               jmp label1.loop
-
-       Sometimes it is useful - in a macro, for instance - to be able to
-       define a label which can be referenced from anywhere but which
-       doesn't interfere with the normal local-label mechanism. Such a
-       label can't be non-local because it would interfere with subsequent
-       definitions of, and references to, local labels; and it can't be
-       local because the macro that defined it wouldn't know the label's
-       full name. NASM therefore introduces a third type of label, which is
-       probably only useful in macro definitions: if a label begins with
-       the special prefix `..@', then it does nothing to the local label
-       mechanism. So you could code
-
-       label1:                         ; a non-local label 
-       .local:                         ; this is really label1.local 
-       ..@foo:                         ; this is a special symbol 
-       label2:                         ; another non-local label 
-       .local:                         ; this is really label2.local 
-       
-               jmp     ..@foo          ; this will jump three lines up
-
-       NASM has the capacity to define other special symbols beginning with
-       a double period: for example, `..start' is used to specify the entry
-       point in the `obj' output format (see section 8.4.6), `..imagebase'
-       is used to find out the offset from a base address of the current
-       image in the `win64' output format (see section 8.6.1). So just keep
-       in mind that symbols beginning with a double period are special.
-
-Chapter 4: The NASM Preprocessor
---------------------------------
-
-       NASM contains a powerful macro processor, which supports conditional
-       assembly, multi-level file inclusion, two forms of macro (single-
-       line and multi-line), and a `context stack' mechanism for extra
-       macro power. Preprocessor directives all begin with a `%' sign. As a
-       result, some care needs to be taken when using the `%' arithmetic
-       operator to avoid it being confused with a preprocessor directive;
-       it is recommended that it always be surrounded by whitespace.
-
-       The NASM preprocessor borrows concepts from both the C preprocessor
-       and the macro facilities of many other assemblers.
-
-   4.1 Preprocessor Expansions
-
-       The input to the preprocessor is expanded in the following ways in
-       the order specified here.
-
- 4.1.1 Continuation Line Collapsing
-
-       The preprocessor first collapses all lines which end with a
-       backslash (`\') character into a single line. Thus:
-
-       %define THIS_VERY_LONG_MACRO_NAME_IS_DEFINED_TO \ 
-               THIS_VALUE
-
-       will work like a single-line macro without the backslash-newline
-       sequence.
-
- 4.1.2 Comment Removal
-
-       After concatenation, comments are removed. Comments begin with the
-       character `;' unless contained inside a quoted string or a handful
-       of other special contexts.
-
-       Note that this is applied _after_ continuation lines are collapsed.
-       This means that
-
-             add al,'\'     ; Add the ASCII code for \ 
-             mov ecx,al   ; Save the character
-
-       will probably not do what you expect, as the second line will be
-       considered part of the preceeding comment. Although this behavior is
-       sometimes confusing, it is both the behavior of NASM since the very
-       first version as well as the behavior of the C preprocessor.
-
- 4.1.3 `%line' directives
-
-       In this step, `%line' directives are processed. See section 4.13.1.
-
- 4.1.4  Conditionals, Loops and Multi-Line Macro Definitions
-
-       In this step, the following preprocessor directives are processed:
-
-       (*) Multi-line macro definitions, specified by the `%macro' and
-           `%imacro' directives. The body of a multi-line macro is stored
-           and is not further expanded at this time. See section 4.5.
-
-       (*) Conditional assembly, specified by the `%if' family of
-           preprocessor directives. Disabled part of the source code are
-           discarded and are not futher expanded. See section 4.6.
-
-       (*) Preprocessor loops, specified by the `%rep' preprocessor
-           directive. A preprocessor loop is very similar to a multi-line
-           macro and as such the body is stored and is not futher expanded
-           at this time. See section 4.7.
-
-       These constructs are required to be balanced, so that the ending of
-       a block can be detected, but no further processing is done at this
-       time; stored blocks will be inserted at this step when they are
-       expanded (see below.)
-
-       It is specific to each directive to what extent inline expansions
-       and detokenization are performed for the arguments of the
-       directives.
-
- 4.1.5 Directives processing
-
-       Remaining preprocessor directives are processed. It is specific to
-       each directive to what extend the above expansions or the ones
-       specified in section 4.1.8 are performed on their arguments.
-
-       It is specific to each directive to what extent inline expansions
-       and detokenization are performed for the arguments of the
-       directives.
-
- 4.1.6 Inline expansions and other directives
-
-       In this step, the following expansions are performed on each line:
-
-       (*) Single-line macros are expanded. See section 4.2.
-
-       (*) Preprocessor functions are expanded. See section 4.4.
-
-       (*) If this line is the result of multi-line macro expansions (see
-           below), the parameters to that macro are expanded at this time.
-           See section 4.5.
-
-       (*) Macro indirection, using the `%' construct, is expanded. See
-           section 4.2.3.
-
-       (*) Token concatenation using either the `%+' operator (see section
-           4.2.4) or implicitly (see section 4.2.3 and section 4.5.9.)
-
-       (*) Macro-local labels are converted into unique strings, see
-           section 4.5.2.
-
- 4.1.7 Multi-Line Macro Expansion
-
-       In this step, multi-line macros are expanded into new lines of
-       source, like the typical macro feature of many other assemblers. See
-       section 4.5.
-
-       After expansion, the newly injected lines of source are processed
-       starting with the step defined in section 4.1.4.
-
- 4.1.8 Detokenization
-
-       In this step, the final line of source code is produced. It performs
-       the following operations:
-
-       (*) Environment variables specified using the `%!' construct are
-           expanded. See section 4.9.2.
-
-       (*) Context-local labels are expanded into unique strings. See
-           section 4.9.2.
-
-       (*) All tokens are converted to their text representation. Unlike
-           the C preprocessor, the NASM preprocessor does not insert
-           whitespace between adjacent tokens unless present in the source
-           code. See section 4.5.9.
-
-       The resulting line of text either is sent to the assembler, or, if
-       running in preprocessor-only mode, to the output file (see section
-       2.1.22); if necessary prefixed by a newly inserted `%line'
-       directive.
-
-   4.2 Single-Line Macros
-
-       Single-line macros are expanded inline, much like macros in the C
-       preprocessor.
-
- 4.2.1 The Normal Way: `%define'
-
-       Single-line macros are defined using the `%define' preprocessor
-       directive. The definitions work in a similar way to C; so you can do
-       things like
-
-       %define ctrl    0x1F & 
-       %define param(a,b) ((a)+(a)*(b)) 
-       
-               mov     byte param(2,ebx), ctrl 'D'
-
-       which will expand to
-
-               mov     byte (2)+(2)*(ebx), 0x1F & 'D'
-
-       When the expansion of a single-line macro contains tokens which
-       invoke another macro, the expansion is performed at invocation time,
-       not at definition time. Thus the code
-
-       %define a(x)    1+b(x) 
-       %define b(x)    2*x 
-       
-               mov     ax,a(8)
-
-       will evaluate in the expected way to `mov ax,1+2*8', even though the
-       macro `b' wasn't defined at the time of definition of `a'.
-
-       Note that single-line macro argument list cannot be preceded by
-       whitespace. Otherwise it will be treated as an expansion. For
-       example:
-
-          %define foo (a,b)               ; no arguments, (a,b) is the expansion 
-          %define bar(a,b)                ; two arguments, empty expansion
-
-       Macros defined with `%define' are case sensitive: after
-       `%define foo bar', only `foo' will expand to `bar': `Foo' or `FOO'
-       will not. By using `%idefine' instead of `%define' (the `i' stands
-       for `insensitive') you can define all the case variants of a macro
-       at once, so that `%idefine foo bar' would cause `foo', `Foo', `FOO',
-       `fOO' and so on all to expand to `bar'.
-
-       There is a mechanism which detects when a macro call has occurred as
-       a result of a previous expansion of the same macro, to guard against
-       circular references and infinite loops. If this happens, the
-       preprocessor will only expand the first occurrence of the macro.
-       Hence, if you code
-
-       %define a(x)    1+a(x) 
-       
-               mov     ax,a(3)
-
-       the macro `a(3)' will expand once, becoming `1+a(3)', and will then
-       expand no further. This behaviour can be useful: see section 10.1
-       for an example of its use.
-
-       You can overload single-line macros: if you write
-
-       %define foo(x)   1+x 
-       %define foo(x,y) 1+x*y
-
-       the preprocessor will be able to handle both types of macro call, by
-       counting the parameters you pass; so `foo(3)' will become `1+3'
-       whereas `foo(ebx,2)' will become `1+ebx*2'. However, if you define
-
-       %define foo bar
-
-       then no other definition of `foo' will be accepted: a macro with no
-       parameters prohibits the definition of the same name as a macro
-       _with_ parameters, and vice versa.
-
-       This doesn't prevent single-line macros being _redefined_: you can
-       perfectly well define a macro with
-
-       %define foo bar
-
-       and then re-define it later in the same source file with
-
-       %define foo baz
-
-       Then everywhere the macro `foo' is invoked, it will be expanded
-       according to the most recent definition. This is particularly useful
-       when defining single-line macros with `%assign' (see section 4.2.8).
-
-       The following additional features were added in NASM 2.15:
-
-       It is possible to define an empty string instead of an argument name
-       if the argument is never used. For example:
-
-          %define ereg(foo,) e %+ foo 
-            mov eax,ereg(dx,cx)
-
-       A single pair of parentheses is a subcase of a single, unused
-       argument:
-
-          %define myreg() eax 
-            mov edx,myreg()
-
-       This is similar to the behavior of the C preprocessor.
-
-       (*) If declared with an `=', NASM will expand the argument and then
-           evaluate it as a numeric expression.
-
-       (*) If declared with an `&', NASM will expand the argument and then
-           turn into a quoted string; if the argument already _is_ a quoted
-           string, it will be quoted again.
-
-       (*) If declared with `&&', NASM will expand the argument and then
-           turn it into a quoted string, but if the argument already is a
-           quoted string, it will _not_ be re-quoted.
-
-       (*) If declared with a `+', it is a greedy or variadic parameter; it
-           will include any subsequent commas and parameters.
-
-       (*) If declared with an `!', NASM will not strip whitespace and
-           braces (potentially useful in conjunction with `&' or `&&'.)
-
-       For example:
-
-           %define xyzzy(=expr,&val) expr, str 
-           %define plugh(x) xyzzy(x,x) 
-           db plugh(3+5), `\0` ; Expands to: db 8, "3+5", `\0`
-
-       You can pre-define single-line macros using the `-d' option on the
-       NASM command line: see section 2.1.20.
-
- 4.2.2 Resolving `%define': `%xdefine'
-
-       To have a reference to an embedded single-line macro resolved at the
-       time that the embedding macro is _defined_, as opposed to when the
-       embedding macro is _expanded_, you need a different mechanism to the
-       one offered by `%define'. The solution is to use `%xdefine', or it's
-       case-insensitive counterpart `%ixdefine'.
-
-       Suppose you have the following code:
-
-       %define  isTrue  1 
-       %define  isFalse isTrue 
-       %define  isTrue  0 
-       
-       val1:    db      isFalse 
-       
-       %define  isTrue  1 
-       
-       val2:    db      isFalse
-
-       In this case, `val1' is equal to 0, and `val2' is equal to 1. This
-       is because, when a single-line macro is defined using `%define', it
-       is expanded only when it is called. As `isFalse' expands to
-       `isTrue', the expansion will be the current value of `isTrue'. The
-       first time it is called that is 0, and the second time it is 1.
-
-       If you wanted `isFalse' to expand to the value assigned to the
-       embedded macro `isTrue' at the time that `isFalse' was defined, you
-       need to change the above code to use `%xdefine'.
-
-       %xdefine isTrue  1 
-       %xdefine isFalse isTrue 
-       %xdefine isTrue  0 
-       
-       val1:    db      isFalse 
-       
-       %xdefine isTrue  1 
-       
-       val2:    db      isFalse
-
-       Now, each time that `isFalse' is called, it expands to 1, as that is
-       what the embedded macro `isTrue' expanded to at the time that
-       `isFalse' was defined.
-
-       `%xdefine' and `%ixdefine' supports argument expansion exactly the
-       same way that `%define' and `%idefine' does.
-
- 4.2.3 Macro Indirection: `%...'
-
-       The `%...' construct can be used to expand macros in contexts
-       where macro expansion would otherwise not occur, including in the
-       names other macros. For example, if you have a set of macros named
-       `Foo16', `Foo32' and `Foo64', you could write:
-
-            mov ax,Foo%__?BITS?__ ; The Foo value
-
-       to use the builtin macro `__?BITS?__' (see section 5.3) to
-       automatically select between them. Similarly, the two statements:
-
-       %xdefine Bar         Quux    ; Expands due to %xdefine 
-       %define  Bar         %Quux ; Expands due to %...
-
-       have, in fact, exactly the same effect.
-
-       `%...' concatenates to adjacent tokens in the same way that multi-
-       line macro parameters do, see section 4.5.9 for details.
-
- 4.2.4 Concatenating Single Line Macro Tokens: `%+'
-
-       Individual tokens in single line macros can be concatenated, to
-       produce longer tokens for later processing. This can be useful if
-       there are several similar macros that perform similar functions.
-
-       Please note that a space is required after `%+', in order to
-       disambiguate it from the syntax `%+1' used in multiline macros.
-
-       As an example, consider the following:
-
-       %define BDASTART 400h                ; Start of BIOS data area
-
-       struc   tBIOSDA                      ; its structure 
-               .COM1addr       RESW    1 
-               .COM2addr       RESW    1 
-               ; ..and so on 
-       endstruc
-
-       Now, if we need to access the elements of tBIOSDA in different
-       places, we can end up with:
-
-               mov     ax,BDASTART + tBIOSDA.COM1addr 
-               mov     bx,BDASTART + tBIOSDA.COM2addr
-
-       This will become pretty ugly (and tedious) if used in many places,
-       and can be reduced in size significantly by using the following
-       macro:
-
-       ; Macro to access BIOS variables by their names (from tBDA):
-
-       %define BDA(x)  BDASTART + tBIOSDA. %+ x
-
-       Now the above code can be written as:
-
-               mov     ax,BDA(COM1addr) 
-               mov     bx,BDA(COM2addr)
-
-       Using this feature, we can simplify references to a lot of macros
-       (and, in turn, reduce typing errors).
-
- 4.2.5 The Macro Name Itself: `%?' and `%??'
-
-       The special symbols `%?' and `%??' can be used to reference the
-       macro name itself inside a macro expansion, this is supported for
-       both single-and multi-line macros. `%?' refers to the macro name as
-       _invoked_, whereas `%??' refers to the macro name as _declared_. The
-       two are always the same for case-sensitive macros, but for case-
-       insensitive macros, they can differ.
-
-       For example:
-
-       %imacro Foo 0 
-               mov %?,%?? 
-       %endmacro 
-       
-               foo 
-               FOO
-
-       will expand to:
-
-               mov foo,Foo 
-               mov FOO,Foo
-
-       These tokens can be used for single-line macros _if defined outside
-       any multi-line macros._ See below.
-
- 4.2.6 The Single-Line Macro Name: `%*?' and `%*??'
-
-       If the tokens `%?' and `%??' are used inside a multi-line macro,
-       they are expanded before any directives are processed. As a result,
-
-       %imacro Foo 0 
-             %idefine Bar _%? 
-             mov BAR,bAr 
-       %endmacro 
-       
-             foo 
-             mov eax,bar
-
-       will expand to:
-
-             mov _foo,_foo 
-             mov eax,_foo
-
-       which may or may not be what you expected. The tokens `%*?' and
-       `%*??' behave like `%?' and `%??' but are only expanded inside
-       single-line macros. Thus:
-
-       %imacro Foo 0 
-             %idefine Bar _%*? 
-             mov BAR,bAr 
-       %endmacro 
-       
-             foo 
-             mov eax,bar
-
-       will expand to:
-
-             mov _BAR,_bAr 
-             mov eax,_bar
-
-       The `%*?' can be used to make a keyword "disappear", for example in
-       case a new instruction has been used as a label in older code. For
-       example:
-
-       %idefine pause $%*?                 ; Hide the PAUSE instruction
-
-       `%*?' and `%*??' were introduced in NASM 2.15.04.
-
- 4.2.7 Undefining Single-Line Macros: `%undef'
-
-       Single-line macros can be removed with the `%undef' directive. For
-       example, the following sequence:
-
-       %define foo bar 
-       %undef  foo 
-       
-               mov     eax, foo
-
-       will expand to the instruction `mov eax, foo', since after `%undef'
-       the macro `foo' is no longer defined.
-
-       Macros that would otherwise be pre-defined can be undefined on the
-       command-line using the `-u' option on the NASM command line: see
-       section 2.1.21.
-
- 4.2.8 Preprocessor Variables: `%assign'
-
-       An alternative way to define single-line macros is by means of the
-       `%assign' command (and its case-insensitive counterpart `%iassign',
-       which differs from `%assign' in exactly the same way that `%idefine'
-       differs from `%define').
-
-       `%assign' is used to define single-line macros which take no
-       parameters and have a numeric value. This value can be specified in
-       the form of an expression, and it will be evaluated once, when the
-       `%assign' directive is processed.
-
-       Like `%define', macros defined using `%assign' can be re-defined
-       later, so you can do things like
-
-       %assign i i+1
-
-       to increment the numeric value of a macro.
-
-       `%assign' is useful for controlling the termination of `%rep'
-       preprocessor loops: see section 4.7 for an example of this. Another
-       use for `%assign' is given in section 9.4 and section 10.1.
-
-       The expression passed to `%assign' is a critical expression (see
-       section 3.8), and must also evaluate to a pure number (rather than a
-       relocatable reference such as a code or data address, or anything
-       involving a register).
-
-       See also the `%eval()' preprocessor function, section 4.4.4.
-
- 4.2.9 Defining Strings: `%defstr'
-
-       `%defstr', and its case-insensitive counterpart `%idefstr', define
-       or redefine a single-line macro without parameters but converts the
-       entire right-hand side, after macro expansion, to a quoted string
-       before definition.
-
-       For example:
-
-       %defstr test TEST
-
-       is equivalent to
-
-       %define test 'TEST'
-
-       This can be used, for example, with the `%!' construct (see section
-       4.13.2):
-
-       %defstr PATH %!PATH          ; The operating system PATH variable
-
-       See also the `%str()' preprocessor function, section 4.4.8.
-
-4.2.10 Defining Tokens: `%deftok'
-
-       `%deftok', and its case-insensitive counterpart `%ideftok', define
-       or redefine a single-line macro without parameters but converts the
-       second parameter, after string conversion, to a sequence of tokens.
-
-       For example:
-
-       %deftok test 'TEST'
-
-       is equivalent to
-
-       %define test TEST
-
-       See also the `%tok()' preprocessor function, section 4.4.12.
-
-4.2.11 Defining Aliases: `%defalias'
-
-       `%defalias', and its case-insensitive counterpart `%idefalias',
-       define an alias to a macro, i.e. equivalent of a symbolic link.
-
-       When used with various macro defining and undefining directives, it
-       affects the aliased macro. This functionality is intended for being
-       able to rename macros while retaining the legacy names.
-
-       When an alias is defined, but the aliased macro is then undefined,
-       the aliases can legitimately point to nonexistent macros.
-
-       The alias can be undefined using the `%undefalias' directive. _All_
-       aliases can be undefined using the `%clear defalias' directive. This
-       includes backwards compatibility aliases defined by NASM itself.
-
-       To disable aliases without undefining them, use the `%aliases off'
-       directive.
-
-       To check whether an alias is defined, regardless of the existence of
-       the aliased macro, use `%ifdefalias'.
-
-       For example:
-
-       %defalias OLD NEW 
-          ; OLD and NEW both undefined 
-       %define NEW 123 
-          ; OLD and NEW both 123 
-       %undef OLD 
-          ; OLD and NEW both undefined 
-       %define OLD 456 
-          ; OLD and NEW both 456 
-       %undefalias OLD 
-          ; OLD undefined, NEW defined to 456
-
-4.2.12 Conditional Comma Operator: `%,'
-
-       As of version 2.15, NASM has a conditional comma operator `%,' that
-       expands to a comma _unless_ followed by a null expansion, which
-       allows suppressing the comma before an empty argument. This is
-       especially useful with greedy single-line macros.
-
-       For example, all the expressions below are valid:
-
-       %define greedy(a,b,c+) a + 66 %, b * 3 %, c 
-       
-              db greedy(1,2)          ; db 1 + 66, 2 * 3 
-              db greedy(1,2,3)        ; db 1 + 66, 2 * 3, 3 
-              db greedy(1,2,3,4)      ; db 1 + 66, 2 * 3, 3, 4 
-              db greedy(1,2,3,4,5)    ; db 1 + 66, 2 * 3, 3, 4, 5
-
-   4.3 String Manipulation in Macros
-
-       It's often useful to be able to handle strings in macros. NASM
-       supports a few simple string handling macro operators from which
-       more complex operations can be constructed.
-
-       All the string operators define or redefine a value (either a string
-       or a numeric value) to a single-line macro. When producing a string
-       value, it may change the style of quoting of the input string or
-       strings, and possibly use `\'-escapes inside ``'-quoted strings.
-
-       These directives are also available as preprocessor functions, see
-       section 4.4.
-
- 4.3.1 Concatenating Strings: `%strcat'
-
-       The `%strcat' operator concatenates quoted strings and assign them
-       to a single-line macro.
-
-       For example:
-
-       %strcat alpha "Alpha: ", '12" screen'
-
-       ... would assign the value `'Alpha: 12" screen'' to `alpha'.
-       Similarly:
-
-       %strcat beta '"foo"\', "'bar'"
-
-       ... would assign the value ``"foo"\\'bar'`' to `beta'.
-
-       The use of commas to separate strings is permitted but optional.
-
-       The corresponding preprocessor function is `%strcat()', see section
-       4.4.9.
-
- 4.3.2 String Length: `%strlen'
-
-       The `%strlen' operator assigns the length of a string to a macro.
-       For example:
-
-       %strlen charcnt 'my string'
-
-       In this example, `charcnt' would receive the value 9, just as if an
-       `%assign' had been used. In this example, `'my string'' was a
-       literal string but it could also have been a single-line macro that
-       expands to a string, as in the following example:
-
-       %define sometext 'my string' 
-       %strlen charcnt sometext
-
-       As in the first case, this would result in `charcnt' being assigned
-       the value of 9.
-
-       The corresponding preprocessor function is `%strlen()', see section
-       4.4.10.
-
- 4.3.3 Extracting Substrings: `%substr'
-
-       Individual letters or substrings in strings can be extracted using
-       the `%substr' operator. An example of its use is probably more
-       useful than the description:
-
-       %substr mychar 'xyzw' 1       ; equivalent to %define mychar 'x' 
-       %substr mychar 'xyzw' 2       ; equivalent to %define mychar 'y' 
-       %substr mychar 'xyzw' 3       ; equivalent to %define mychar 'z' 
-       %substr mychar 'xyzw' 2,2     ; equivalent to %define mychar 'yz' 
-       %substr mychar 'xyzw' 2,-1    ; equivalent to %define mychar 'yzw' 
-       %substr mychar 'xyzw' 2,-2    ; equivalent to %define mychar 'yz'
-
-       As with `%strlen' (see section 4.3.2), the first parameter is the
-       single-line macro to be created and the second is the string. The
-       third parameter specifies the first character to be selected, and
-       the optional fourth parameter preceded by comma) is the length. Note
-       that the first index is 1, not 0 and the last index is equal to the
-       value that `%strlen' would assign given the same string. Index
-       values out of range result in an empty string. A negative length
-       means "until N-1 characters before the end of string", i.e. `-1'
-       means until end of string, `-2' until one character before, etc.
-
-       The corresponding preprocessor function is `%substr()', see section
-       4.4.11, however please note that the default value for the length
-       parameter, if omitted, is `-1' rather than `1' for `%substr()'.
-
-   4.4 Preprocessor Functions
-
-       Preprocessor functions are, fundamentally, a kind of built-in
-       single-line macros. They expand to a string depending on its
-       arguments, and can be used in any context where single-line macro
-       expansion would be performed. Preprocessor functions were introduced
-       in NASM 2.16.
-
- 4.4.1 `%abs()' Function
-
-       The `%abs()' function evaluates its first argument as an expression,
-       and then emits the absolute value. This will always be emitted as a
-       single token containing a decimal number; no minus sign will be
-       emitted even if the input value is the maximum negative number.
-
- 4.4.2 `%cond()' Function
-
-       The `%cond()' function evaluates its first argument as an
-       expression, then expands to its second argument if true (nonzero),
-       and the third, if present, if false (zero). This is in effect a
-       specialized version of the `%sel()' function; `%cond(x,y,z)' is
-       equivalent to `%sel(2-!(x),y,z)'.
-
-       %define a 1 
-       %xdefine astr %cond(a,"true","false") ; %define astr "true"
-
-       The argument not selected is never expanded.
-
- 4.4.3 `%count()' Function
-
-       The `%count()' function expands to the number of argments passed to
-       the macro. Note that just as for single-line macros, `%count()'
-       treats an empty argument list as a single empty argument.
-
-       %xdefine empty %count()        ; %define empty 1 
-       %xdefine one   %count(1)       ; %define one 1 
-       %xdefine two   %count(5,q)     ; %define two 2 
-       %define  list  a,b,46 
-       %xdefine lc1   %count(list)    ; %define lc 1 (just one argument) 
-       %xdefine lc2   %count(%list) ; %define lc 3 (indirection expands)
-
- 4.4.4 `%eval()' Function
-
-       The `%eval()' function evaluates its argument as a numeric
-       expression and expands to the result as an integer constant in much
-       the same way the `%assign' directive would, see section 4.2.8.
-       Unlike `%assign', `%eval()' supports more than one argument; if more
-       than one argument is specified, it is expanded to a comma-separated
-       list of values.
-
-       %assign a    2 
-       %assign b    3  
-       %defstr what %expr(a+b,a*b)  ; equivalent to %define what "5,6"
-
-       The expressions passed to `%eval()' are critical expressions, see
-       section 3.8.
-
- 4.4.5 `%is()' Family Functions
-
-       Each `%if' family directive (see section 4.6) has an equivalent
-       `%is()' family function, that expands to `1' if the equivalent `%if'
-       directive would process as true, and `0' if the equivalent `%if'
-       directive would process as false.
-
-       ; Instead of !%isidn() could have used %isnidn() 
-       %if %isdef(foo) && !%isidn(foo,bar) 
-             db "foo is defined, but not as 'bar'" 
-       %endif
-
-       Note that, being functions, the arguments (before expansion) will
-       always need to have balanced parentheses so that the end of the
-       argument list can be defined. This means that the syntax of e.g.
-       `%istoken()' and `%isidn()' is somewhat stricter than their
-       corresponding `%if' directives; it may be necessary to escape the
-       argument to the conditional using `{}':
-
-       ; Instead of !%isidn() could have used %isnidn() 
-       %if %isdef(foo) && !%isidn({foo,)}) 
-             db "foo is defined, but not as ')'" 
-       %endif
-
- 4.4.6 `%num()' Function
-
-       The `%num()' function evaluates its arguments as expressions, and
-       then produces a quoted string encoding the first argument as an
-       _unsigned_ integer. The second argument is the desired number of
-       digits (max 253, default -1), and the second argument is the
-       encoding base (from 2 to 64, default 10.)
-
-       Only the first argument is required.
-
-       If the number of digits is negative, NASM will add additional digits
-       if needed, if positive the string is truncated to the number of
-       digits specified. 0 is treated as -1, except that the input number 0
-       generates an empty string (thus, the first digit will never be
-       zero.)
-
-       The full 64-symbol set used is, in order:
-
-       0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ@_
-
-       If a _signed_ number needs to be converted to a string, use
-       `%abs()', `%cond()', and `%strcat()' to format the signed number
-       string to your specific output requirements.
-
- 4.4.7 `%sel()' Function
-
-       The `%sel()' function evaluates its first argument as an expression,
-       then expands to its second argument if 1, the third argument if 2,
-       and so on. If the value is less than 1 or larger than the number of
-       arguments minus one, then the `%sel()' function expands to nothing.
-
-       %define b 2 
-       %xdefine bstr %sel(b,"one","two","three") ; %define bstr "two"
-
-       The arguments not selected are never expanded.
-
- 4.4.8 `%str()' Function
-
-       The `%str()' function converts its argument, including any commas,
-       to a quoted string, similar to the way the `%defstr' directive
-       would, see section 4.2.9.
-
-       Being a function, the argument will need to have balanced
-       parentheses or be escaped using `{}'.
-
-       ; The following lines are all equivalent 
-       %define  test 'TEST' 
-       %defstr  test TEST 
-       %xdefine test %str(TEST)
-
- 4.4.9 `%strcat()' Function
-
-       The `%strcat()' function concatenates a list of quoted strings, in
-       the same way the `%strcat' directive would, see section 4.3.1.
-
-       ; The following lines are all equivalent 
-       %define  alpha 'Alpha: 12" screen' 
-       %strcat  alpha "Alpha: ", '12" screen' 
-       %xdefine alpha %strcat("Alpha: ", '12" screen')
-
-4.4.10 `%strlen()' Function
-
-       The `%strlen()' function expands to the length of a quoted string,
-       in the same way the `%strlen' directive would, see section 4.3.2.
-
-       ; The following lines are all equivalent 
-       %define  charcnt 9 
-       %strlen  charcnt 'my string' 
-       %xdefine charcnt %strlen('my string')
-
-4.4.11 `%substr()' Function
-
-       The `%substr()' function extracts a substring of a quoted string, in
-       the same way the `%substr' directive would, see section 4.3.3. Note
-       that unlike the `%substr' directive, commas are required between all
-       parameters, is required after the string argument, and that the
-       default for the length argument, if omitted, is `-1' (i.e. the
-       remainder of the string) rather than `1'.
-
-       ; The following lines are all equivalent 
-       %define  mychar 'yzw' 
-       %substr  mychar 'xyzw' 2,-1 
-       %xdefine mychar %substr('xyzw',2,3) 
-       %xdefine mychar %substr('xyzw',2,-1) 
-       %xdefine mychar %substr('xyzw',2)
-
-4.4.12 `%tok()' function
-
-       The `%tok()' function converts a quoted string into a sequence of
-       tokens, in the same way the `%deftok' directive would, see section
-       4.2.10.
-
-       ; The following lines are all equivalent 
-       %define test TEST 
-       %deftok test 'TEST' 
-       %define test %tok('TEST')
-
-   4.5 Multi-Line Macros: `%macro'
-
-       Multi-line macros much like the type of macro seen in MASM and TASM,
-       and expand to a new set of lines of source code. A multi-line macro
-       definition in NASM looks something like this.
-
-       %macro  prologue 1 
-       
-               push    ebp 
-               mov     ebp,esp 
-               sub     esp,%1 
-       
-       %endmacro
-
-       This defines a C-like function prologue as a macro: so you would
-       invoke the macro with a call such as:
-
-       myfunc:   prologue 12
-
-       which would expand to the three lines of code
-
-       myfunc: push    ebp 
-               mov     ebp,esp 
-               sub     esp,12
-
-       The number `1' after the macro name in the `%macro' line defines the
-       number of parameters the macro `prologue' expects to receive. The
-       use of `%1' inside the macro definition refers to the first
-       parameter to the macro call. With a macro taking more than one
-       parameter, subsequent parameters would be referred to as `%2', `%3'
-       and so on.
-
-       Multi-line macros, like single-line macros, are case-sensitive,
-       unless you define them using the alternative directive `%imacro'.
-
-       If you need to pass a comma as _part_ of a parameter to a multi-line
-       macro, you can do that by enclosing the entire parameter in braces.
-       So you could code things like:
-
-       %macro  silly 2 
-       
-           %2: db      %1 
-       
-       %endmacro 
-       
-               silly 'a', letter_a             ; letter_a:  db 'a' 
-               silly 'ab', string_ab           ; string_ab: db 'ab' 
-               silly {13,10}, crlf             ; crlf:      db 13,10
-
-       The behavior with regards to empty arguments at the end of multi-
-       line macros before NASM 2.15 was often very strange. For backwards
-       compatibility, NASM attempts to recognize cases where the legacy
-       behavior would give unexpected results, and issues a warning, but
-       largely tries to match the legacy behavior. This can be disabled
-       with the `%pragma' (see section 4.12.1):
-
-       %pragma preproc sane_empty_expansion
-
- 4.5.1 Overloading Multi-Line Macros
-
-       As with single-line macros, multi-line macros can be overloaded by
-       defining the same macro name several times with different numbers of
-       parameters. This time, no exception is made for macros with no
-       parameters at all. So you could define
-
-       %macro  prologue 0 
-       
-               push    ebp 
-               mov     ebp,esp 
-       
-       %endmacro
-
-       to define an alternative form of the function prologue which
-       allocates no local stack space.
-
-       Sometimes, however, you might want to `overload' a machine
-       instruction; for example, you might want to define
-
-       %macro  push 2 
-       
-               push    %1 
-               push    %2 
-       
-       %endmacro
-
-       so that you could code
-
-               push    ebx             ; this line is not a macro call 
-               push    eax,ecx         ; but this one is
-
-       Ordinarily, NASM will give a warning for the first of the above two
-       lines, since `push' is now defined to be a macro, and is being
-       invoked with a number of parameters for which no definition has been
-       given. The correct code will still be generated, but the assembler
-       will give a warning. This warning can be disabled by the use of the
-       `-w-macro-params' command-line option (see section 2.1.26).
-
- 4.5.2 Macro-Local Labels
-
-       NASM allows you to define labels within a multi-line macro
-       definition in such a way as to make them local to the macro call: so
-       calling the same macro multiple times will use a different label
-       each time. You do this by prefixing `%%' to the label name. So you
-       can invent an instruction which executes a `RET' if the `Z' flag is
-       set by doing this:
-
-       %macro  retz 0 
-       
-               jnz     %%skip 
-               ret 
-           %%skip: 
-       
-       %endmacro
-
-       You can call this macro as many times as you want, and every time
-       you call it NASM will make up a different `real' name to substitute
-       for the label `%%skip'. The names NASM invents are of the form
-       `..@2345.skip', where the number 2345 changes with every macro call.
-       The `..@' prefix prevents macro-local labels from interfering with
-       the local label mechanism, as described in section 3.9. You should
-       avoid defining your own labels in this form (the `..@' prefix, then
-       a number, then another period) in case they interfere with macro-
-       local labels.
-
-       These labels are really macro-local _tokens_, and can be used for
-       other purposes where a token unique to each macro invocation is
-       desired, e.g. to name single-line macros without using the context
-       feature (section 4.9.2).
-
- 4.5.3 Greedy Macro Parameters
-
-       Occasionally it is useful to define a macro which lumps its entire
-       command line into one parameter definition, possibly after
-       extracting one or two smaller parameters from the front. An example
-       might be a macro to write a text string to a file in MS-DOS, where
-       you might want to be able to write
-
-               writefile filehandle,"hello, world",13,10
-
-       NASM allows you to define the last parameter of a macro to be
-       _greedy_, meaning that if you invoke the macro with more parameters
-       than it expects, all the spare parameters get lumped into the last
-       defined one along with the separating commas. So if you code:
-
-       %macro  writefile 2+ 
-       
-               jmp     %%endstr 
-         %%str:        db      %2 
-         %%endstr: 
-               mov     dx,%%str 
-               mov     cx,%%endstr-%%str 
-               mov     bx,%1 
-               mov     ah,0x40 
-               int     0x21 
-       
-       %endmacro
-
-       then the example call to `writefile' above will work as expected:
-       the text before the first comma, `filehandle', is used as the
-       first macro parameter and expanded when `%1' is referred to, and all
-       the subsequent text is lumped into `%2' and placed after the `db'.
-
-       The greedy nature of the macro is indicated to NASM by the use of
-       the `+' sign after the parameter count on the `%macro' line.
-
-       If you define a greedy macro, you are effectively telling NASM how
-       it should expand the macro given _any_ number of parameters from the
-       actual number specified up to infinity; in this case, for example,
-       NASM now knows what to do when it sees a call to `writefile' with 2,
-       3, 4 or more parameters. NASM will take this into account when
-       overloading macros, and will not allow you to define another form of
-       `writefile' taking 4 parameters (for example).
-
-       Of course, the above macro could have been implemented as a non-
-       greedy macro, in which case the call to it would have had to look
-       like
-
-                 writefile filehandle, {"hello, world",13,10}
-
-       NASM provides both mechanisms for putting commas in macro
-       parameters, and you choose which one you prefer for each macro
-       definition.
-
-       See section 7.3.1 for a better way to write the above macro.
-
- 4.5.4 Macro Parameters Range
-
-       NASM allows you to expand parameters via special construction
-       `%{x:y}' where `x' is the first parameter index and `y' is the last.
-       Any index can be either negative or positive but must never be zero.
-
-       For example
-
-       %macro mpar 1-* 
-            db %{3:5} 
-       %endmacro 
-       
-       mpar 1,2,3,4,5,6
-
-       expands to `3,4,5' range.
-
-       Even more, the parameters can be reversed so that
-
-       %macro mpar 1-* 
-            db %{5:3} 
-       %endmacro 
-       
-       mpar 1,2,3,4,5,6
-
-       expands to `5,4,3' range.
-
-       But even this is not the last. The parameters can be addressed via
-       negative indices so NASM will count them reversed. The ones who know
-       Python may see the analogue here.
-
-       %macro mpar 1-* 
-            db %{-1:-3} 
-       %endmacro 
-       
-       mpar 1,2,3,4,5,6
-
-       expands to `6,5,4' range.
-
-       Note that NASM uses comma to separate parameters being expanded.
-
-       By the way, here is a trick - you might use the index `%{-1:-1'}
-       which gives you the last argument passed to a macro.
-
- 4.5.5 Default Macro Parameters
-
-       NASM also allows you to define a multi-line macro with a _range_ of
-       allowable parameter counts. If you do this, you can specify defaults
-       for omitted parameters. So, for example:
-
-       %macro  die 0-1 "Painful program death has occurred." 
-       
-               writefile 2,%1 
-               mov     ax,0x4c01 
-               int     0x21 
-       
-       %endmacro
-
-       This macro (which makes use of the `writefile' macro defined in
-       section 4.5.3) can be called with an explicit error message, which
-       it will display on the error output stream before exiting, or it can
-       be called with no parameters, in which case it will use the default
-       error message supplied in the macro definition.
-
-       In general, you supply a minimum and maximum number of parameters
-       for a macro of this type; the minimum number of parameters are then
-       required in the macro call, and then you provide defaults for the
-       optional ones. So if a macro definition began with the line
-
-       %macro foobar 1-3 eax,ebx+2
-
-       then it could be called with between one and three parameters, and
-       `%1' would always be taken from the macro call. `%2', if not
-       specified by the macro call, would default to `eax', and `%3' if not
-       specified would default to `ebx+2'.
-
-       You can provide extra information to a macro by providing too many
-       default parameters:
-
-       %macro quux 1 something
-
-       This will trigger a warning by default; see section 2.1.26 for more
-       information. When `quux' is invoked, it receives not one but two
-       parameters. `something' can be referred to as `%2'. The difference
-       between passing `something' this way and writing `something' in the
-       macro body is that with this way `something' is evaluated when the
-       macro is defined, not when it is expanded.
-
-       You may omit parameter defaults from the macro definition, in which
-       case the parameter default is taken to be blank. This can be useful
-       for macros which can take a variable number of parameters, since the
-       `%0' token (see section 4.5.6) allows you to determine how many
-       parameters were really passed to the macro call.
-
-       This defaulting mechanism can be combined with the greedy-parameter
-       mechanism; so the `die' macro above could be made more powerful, and
-       more useful, by changing the first line of the definition to
-
-       %macro die 0-1+ "Painful program death has occurred.",13,10
-
-       The maximum parameter count can be infinite, denoted by `*'. In this
-       case, of course, it is impossible to provide a _full_ set of default
-       parameters. Examples of this usage are shown in section 4.5.8.
-
- 4.5.6 `%0': Macro Parameter Counter
-
-       The parameter reference `%0' will return a numeric constant giving
-       the number of parameters received, that is, if `%0' is n then `%'n
-       is the last parameter. `%0' is mostly useful for macros that can
-       take a variable number of parameters. It can be used as an argument
-       to `%rep' (see section 4.7) in order to iterate through all the
-       parameters of a macro. Examples are given in section 4.5.8.
-
- 4.5.7 `%00': Label Preceding Macro
-
-       `%00' will return the label preceding the macro invocation, if any.
-       The label must be on the same line as the macro invocation, may be a
-       local label (see section 3.9), and need not end in a colon.
-
-       If `%00' is present anywhere in the macro body, the label itself
-       will not be emitted by NASM. You can, of course, put `%00:'
-       explicitly at the beginning of your macro.
-
- 4.5.8 `%rotate': Rotating Macro Parameters
-
-       Unix shell programmers will be familiar with the `shift' shell
-       command, which allows the arguments passed to a shell script
-       (referenced as `$1', `$2' and so on) to be moved left by one place,
-       so that the argument previously referenced as `$2' becomes available
-       as `$1', and the argument previously referenced as `$1' is no longer
-       available at all.
-
-       NASM provides a similar mechanism, in the form of `%rotate'. As its
-       name suggests, it differs from the Unix `shift' in that no
-       parameters are lost: parameters rotated off the left end of the
-       argument list reappear on the right, and vice versa.
-
-       `%rotate' is invoked with a single numeric argument (which may be an
-       expression). The macro parameters are rotated to the left by that
-       many places. If the argument to `%rotate' is negative, the macro
-       parameters are rotated to the right.
-
-       So a pair of macros to save and restore a set of registers might
-       work as follows:
-
-       %macro  multipush 1-* 
-       
-         %rep  %0 
-               push    %1 
-         %rotate 1 
-         %endrep 
-       
-       %endmacro
-
-       This macro invokes the `PUSH' instruction on each of its arguments
-       in turn, from left to right. It begins by pushing its first
-       argument, `%1', then invokes `%rotate' to move all the arguments one
-       place to the left, so that the original second argument is now
-       available as `%1'. Repeating this procedure as many times as there
-       were arguments (achieved by supplying `%0' as the argument to
-       `%rep') causes each argument in turn to be pushed.
-
-       Note also the use of `*' as the maximum parameter count, indicating
-       that there is no upper limit on the number of parameters you may
-       supply to the `multipush' macro.
-
-       It would be convenient, when using this macro, to have a `POP'
-       equivalent, which _didn't_ require the arguments to be given in
-       reverse order. Ideally, you would write the `multipush' macro call,
-       then cut-and-paste the line to where the pop needed to be done, and
-       change the name of the called macro to `multipop', and the macro
-       would take care of popping the registers in the opposite order from
-       the one in which they were pushed.
-
-       This can be done by the following definition:
-
-       %macro  multipop 1-* 
-       
-         %rep %0 
-         %rotate -1 
-               pop     %1 
-         %endrep 
-       
-       %endmacro
-
-       This macro begins by rotating its arguments one place to the
-       _right_, so that the original _last_ argument appears as `%1'. This
-       is then popped, and the arguments are rotated right again, so the
-       second-to-last argument becomes `%1'. Thus the arguments are
-       iterated through in reverse order.
-
- 4.5.9 Concatenating Macro Parameters
-
-       NASM can concatenate macro parameters and macro indirection
-       constructs on to other text surrounding them. This allows you to
-       declare a family of symbols, for example, in a macro definition. If,
-       for example, you wanted to generate a table of key codes along with
-       offsets into the table, you could code something like
-
-       %macro keytab_entry 2 
-       
-           keypos%1    equ     $-keytab 
-                       db      %2 
-       
-       %endmacro 
-       
-       keytab: 
-                 keytab_entry F1,128+1 
-                 keytab_entry F2,128+2 
-                 keytab_entry Return,13
-
-       which would expand to
-
-       keytab: 
-       keyposF1        equ     $-keytab 
-                       db     128+1 
-       keyposF2        equ     $-keytab 
-                       db      128+2 
-       keyposReturn    equ     $-keytab 
-                       db      13
-
-       You can just as easily concatenate text on to the other end of a
-       macro parameter, by writing `%1foo'.
-
-       If you need to append a _digit_ to a macro parameter, for example
-       defining labels `foo1' and `foo2' when passed the parameter `foo',
-       you can't code `%11' because that would be taken as the eleventh
-       macro parameter. Instead, you must code `%{1}1', which will separate
-       the first `1' (giving the number of the macro parameter) from the
-       second (literal text to be concatenated to the parameter).
-
-       This concatenation can also be applied to other preprocessor in-line
-       objects, such as macro-local labels (section 4.5.2) and context-
-       local labels (section 4.9.2). In all cases, ambiguities in syntax
-       can be resolved by enclosing everything after the `%' sign and
-       before the literal text in braces: so `%{%foo}bar' concatenates the
-       text `bar' to the end of the real name of the macro-local label
-       `%%foo'. (This is unnecessary, since the form NASM uses for the real
-       names of macro-local labels means that the two usages `%{%foo}bar'
-       and `%%foobar' would both expand to the same thing anyway;
-       nevertheless, the capability is there.)
-
-       The single-line macro indirection construct, `%...' (section
-       4.2.3), behaves the same way as macro parameters for the purpose of
-       concatenation.
-
-       See also the `%+' operator, section 4.2.4.
-
-4.5.10 Condition Codes as Macro Parameters
-
-       NASM can give special treatment to a macro parameter which contains
-       a condition code. For a start, you can refer to the macro parameter
-       `%1' by means of the alternative syntax `%+1', which informs NASM
-       that this macro parameter is supposed to contain a condition code,
-       and will cause the preprocessor to report an error message if the
-       macro is called with a parameter which is _not_ a valid condition
-       code.
-
-       Far more usefully, though, you can refer to the macro parameter by
-       means of `%-1', which NASM will expand as the _inverse_ condition
-       code. So the `retz' macro defined in section 4.5.2 can be replaced
-       by a general conditional-return macro like this:
-
-       %macro  retc 1 
-       
-               j%-1    %%skip 
-               ret 
-         %%skip: 
-       
-       %endmacro
-
-       This macro can now be invoked using calls like `retc ne', which will
-       cause the conditional-jump instruction in the macro expansion to
-       come out as `JE', or `retc po' which will make the jump a `JPE'.
-
-       The `%+1' macro-parameter reference is quite happy to interpret the
-       arguments `CXZ' and `ECXZ' as valid condition codes; however, `%-1'
-       will report an error if passed either of these, because no inverse
-       condition code exists.
-
-4.5.11 Disabling Listing Expansion
-
-       When NASM is generating a listing file from your program, it will
-       generally expand multi-line macros by means of writing the macro
-       call and then listing each line of the expansion. This allows you to
-       see which instructions in the macro expansion are generating what
-       code; however, for some macros this clutters the listing up
-       unnecessarily.
-
-       NASM therefore provides the `.nolist' qualifier, which you can
-       include in a macro definition to inhibit the expansion of the macro
-       in the listing file. The `.nolist' qualifier comes directly after
-       the number of parameters, like this:
-
-       %macro foo 1.nolist
-
-       Or like this:
-
-       %macro bar 1-5+.nolist a,b,c,d,e,f,g,h
-
-4.5.12 Undefining Multi-Line Macros: `%unmacro'
-
-       Multi-line macros can be removed with the `%unmacro' directive.
-       Unlike the `%undef' directive, however, `%unmacro' takes an argument
-       specification, and will only remove exact matches with that argument
-       specification.
-
-       For example:
-
-       %macro foo 1-3 
-               ; Do something 
-       %endmacro 
-       %unmacro foo 1-3
-
-       removes the previously defined macro `foo', but
-
-       %macro bar 1-3 
-               ; Do something 
-       %endmacro 
-       %unmacro bar 1
-
-       does _not_ remove the macro `bar', since the argument specification
-       does not match exactly.
-
-       A case-insensitive macro needs to be removed with the `%unimacro'
-       directive.
-
-   4.6 Conditional Assembly
-
-       Similarly to the C preprocessor, NASM allows sections of a source
-       file to be assembled only if certain conditions are met. The general
-       syntax of this feature looks like this:
-
-       %if<condition> 
-           ; some code which only appears if <condition> is met 
-       %elif<condition2> 
-           ; only appears if <condition> is not met but <condition2> is 
-       %else 
-           ; this appears if neither <condition> nor <condition2> was met 
-       %endif
-
-       The inverse forms `%ifn' and `%elifn' are also supported.
-
-       The `%else' clause is optional, as is the `%elif' clause. You can
-       have more than one `%elif' clause as well.
-
-       There are a number of variants of the `%if' directive. Each has its
-       corresponding `%elif', `%ifn', and `%elifn' directives; for example,
-       the equivalents to the `%ifdef' directive are `%elifdef', `%ifndef',
-       and `%elifndef'.
-
- 4.6.1 `%ifdef': Testing Single-Line Macro Existence
-
-       Beginning a conditional-assembly block with the line `%ifdef MACRO'
-       will assemble the subsequent code if, and only if, a single-line
-       macro called `MACRO' is defined. If not, then the `%elif' and
-       `%else' blocks (if any) will be processed instead.
-
-       For example, when debugging a program, you might want to write code
-       such as
-
-                 ; perform some function 
-       %ifdef DEBUG 
-                 writefile 2,"Function performed successfully",13,10 
-       %endif 
-                 ; go and do something else
-
-       Then you could use the command-line option `-dDEBUG' to create a
-       version of the program which produced debugging messages, and remove
-       the option to generate the final release version of the program.
-
-       You can test for a macro _not_ being defined by using `%ifndef'
-       instead of `%ifdef'. You can also test for macro definitions in
-       `%elif' blocks by using `%elifdef' and `%elifndef'.
-
- 4.6.2 `%ifmacro': Testing Multi-Line Macro Existence
-
-       The `%ifmacro' directive operates in the same way as the `%ifdef'
-       directive, except that it checks for the existence of a multi-line
-       macro.
-
-       For example, you may be working with a large project and not have
-       control over the macros in a library. You may want to create a macro
-       with one name if it doesn't already exist, and another name if one
-       with that name does exist.
-
-       The `%ifmacro' is considered true if defining a macro with the given
-       name and number of arguments would cause a definitions conflict. For
-       example:
-
-       %ifmacro MyMacro 1-3 
-       
-            %error "MyMacro 1-3" causes a conflict with an existing macro. 
-       
-       %else 
-       
-            %macro MyMacro 1-3 
-       
-                    ; insert code to define the macro 
-       
-            %endmacro 
-       
-       %endif
-
-       This will create the macro "MyMacro 1-3" if no macro already exists
-       which would conflict with it, and emits a warning if there would be
-       a definition conflict.
-
-       You can test for the macro not existing by using the `%ifnmacro'
-       instead of `%ifmacro'. Additional tests can be performed in `%elif'
-       blocks by using `%elifmacro' and `%elifnmacro'.
-
- 4.6.3 `%ifctx': Testing the Context Stack
-
-       The conditional-assembly construct `%ifctx' will cause the
-       subsequent code to be assembled if and only if the top context on
-       the preprocessor's context stack has the same name as one of the
-       arguments. As with `%ifdef', the inverse and `%elif' forms
-       `%ifnctx', `%elifctx' and `%elifnctx' are also supported.
-
-       For more details of the context stack, see section 4.9. For a sample
-       use of `%ifctx', see section 4.9.6.
-
- 4.6.4 `%if': Testing Arbitrary Numeric Expressions
-
-       The conditional-assembly construct `%if expr' will cause the
-       subsequent code to be assembled if and only if the value of the
-       numeric expression `expr' is non-zero. An example of the use of this
-       feature is in deciding when to break out of a `%rep' preprocessor
-       loop: see section 4.7 for a detailed example.
-
-       The expression given to `%if', and its counterpart `%elif', is a
-       critical expression (see section 3.8).
-
-       Like other `%if' constructs, `%if' has a counterpart `%elif', and
-       negative forms `%ifn' and `%elifn'.
-
- 4.6.5 `%ifidn' and `%ifidni': Testing Exact Text Identity
-
-       The construct `%ifidn text1,text2' will cause the subsequent code to
-       be assembled if and only if `text1' and `text2', after expanding
-       single-line macros, are identical pieces of text. Differences in
-       white space are not counted.
-
-       `%ifidni' is similar to `%ifidn', but is case-insensitive.
-
-       For example, the following macro pushes a register or number on the
-       stack, and allows you to treat `IP' as a real register:
-
-       %macro  pushparam 1 
-       
-         %ifidni %1,ip 
-               call    %%label 
-         %%label: 
-         %else 
-               push    %1 
-         %endif 
-       
-       %endmacro
-
-       Like other `%if' constructs, `%ifidn' has a counterpart `%elifidn',
-       and negative forms `%ifnidn' and `%elifnidn'. Similarly, `%ifidni'
-       has counterparts `%elifidni', `%ifnidni' and `%elifnidni'.
-
- 4.6.6 `%ifid', `%ifnum', `%ifstr': Testing Token Types
-
-       Some macros will want to perform different tasks depending on
-       whether they are passed a number, a string, or an identifier. For
-       example, a string output macro might want to be able to cope with
-       being passed either a string constant or a pointer to an existing
-       string.
-
-       The conditional assembly construct `%ifid', taking one parameter
-       (which may be blank), assembles the subsequent code if and only if
-       _the first token_ in the parameter exists and is an identifier. `$'
-       and `$$' are _not_ considered identifiers by `%ifid'.
-
-       `%ifnum' works similarly, but tests for the token being an integer
-       numeric constant (not an expression!) possibly preceded by `+' or
-       `-'; `%ifstr' tests for it being a quoted string.
-
-       For example, the `writefile' macro defined in section 4.5.3 can be
-       extended to take advantage of `%ifstr' in the following fashion:
-
-       %macro writefile 2-3+ 
-       
-         %ifstr %2 
-               jmp     %%endstr 
-           %if %0 = 3 
-             %%str:    db      %2,%3 
-           %else 
-             %%str:    db      %2 
-           %endif 
-             %%endstr: mov     dx,%%str 
-                       mov     cx,%%endstr-%%str 
-         %else 
-                       mov     dx,%2 
-                       mov     cx,%3 
-         %endif 
-                       mov     bx,%1 
-                       mov     ah,0x40 
-                       int     0x21 
-       
-       %endmacro
-
-       Then the `writefile' macro can cope with being called in either of
-       the following two ways:
-
-               writefile file, strpointer, length 
-               writefile file, "hello", 13, 10
-
-       In the first, `strpointer' is used as the address of an already-
-       declared string, and `length' is used as its length; in the second,
-       a string is given to the macro, which therefore declares it itself
-       and works out the address and length for itself.
-
-       Note the use of `%if' inside the `%ifstr': this is to detect whether
-       the macro was passed two arguments (so the string would be a single
-       string constant, and `db %2' would be adequate) or more (in which
-       case, all but the first two would be lumped together into `%3', and
-       `db %2,%3' would be required).
-
-       The usual `%elif'..., `%ifn'..., and `%elifn'... versions exist for
-       each of `%ifid', `%ifnum' and `%ifstr'.
-
- 4.6.7 `%iftoken': Test for a Single Token
-
-       Some macros will want to do different things depending on if it is
-       passed a single token (e.g. paste it to something else using `%+')
-       versus a multi-token sequence.
-
-       The conditional assembly construct `%iftoken' assembles the
-       subsequent code if and only if the expanded parameters consist of
-       exactly one token, possibly surrounded by whitespace.
-
-       For example:
-
-       %iftoken 1
-
-       will assemble the subsequent code, but
-
-       %iftoken -1
-
-       will not, since `-1' contains two tokens: the unary minus operator
-       `-', and the number `1'.
-
-       The usual `%eliftoken', `%ifntoken', and `%elifntoken' variants are
-       also provided.
-
- 4.6.8 `%ifempty': Test for Empty Expansion
-
-       The conditional assembly construct `%ifempty' assembles the
-       subsequent code if and only if the expanded parameters do not
-       contain any tokens at all, whitespace excepted.
-
-       The usual `%elifempty', `%ifnempty', and `%elifnempty' variants are
-       also provided.
-
- 4.6.9 `%ifenv': Test If Environment Variable Exists
-
-       The conditional assembly construct `%ifenv' assembles the subsequent
-       code if and only if the environment variable referenced by the
-       `%!'_variable_ directive exists.
-
-       The usual `%elifenv', `%ifnenv', and `%elifnenv' variants are also
-       provided.
-
-       Just as for `%!'_variable_ the argument should be written as a
-       string if it contains characters that would not be legal in an
-       identifier. See section 4.13.2.
-
-   4.7 Preprocessor Loops: `%rep'
-
-       NASM's `TIMES' prefix, though useful, cannot be used to invoke a
-       multi-line macro multiple times, because it is processed by NASM
-       after macros have already been expanded. Therefore NASM provides
-       another form of loop, this time at the preprocessor level: `%rep'.
-
-       The directives `%rep' and `%endrep' (`%rep' takes a numeric
-       argument, which can be an expression; `%endrep' takes no arguments)
-       can be used to enclose a chunk of code, which is then replicated as
-       many times as specified by the preprocessor:
-
-       %assign i 0 
-       %rep    64 
-               inc     word table+2*i 
-       %assign i i+1 
-       %endrep
-
-       This will generate a sequence of 64 `INC' instructions, incrementing
-       every word of memory from `table' to `table+126'.
-
-       For more complex termination conditions, or to break out of a repeat
-       loop part way along, you can use the `%exitrep' directive to
-       terminate the loop, like this:
-
-       fibonacci: 
-       %assign i 0 
-       %assign j 1 
-       %rep 100 
-       %if j > 65535 
-           %exitrep 
-       %endif 
-               dw j 
-       %assign k j+i 
-       %assign i j 
-       %assign j k 
-       %endrep 
-       
-       fib_number equ ($-fibonacci)/2
-
-       This produces a list of all the Fibonacci numbers that will fit in
-       16 bits. Note that a maximum repeat count must still be given to
-       `%rep'. This is to prevent the possibility of NASM getting into an
-       infinite loop in the preprocessor, which (on multitasking or multi-
-       user systems) would typically cause all the system memory to be
-       gradually used up and other applications to start crashing.
-
-       Note the maximum repeat count is limited to the value specified by
-       the `--limit-rep' option or `%pragma limit rep', see section 2.1.31.
-
-   4.8 Source Files and Dependencies
-
-       These commands allow you to split your sources into multiple files.
-
- 4.8.1 `%include': Including Other Files
-
-       Using, once again, a very similar syntax to the C preprocessor,
-       NASM's preprocessor lets you include other source files into your
-       code. This is done by the use of the `%include' directive:
-
-       %include "macros.mac"
-
-       will include the contents of the file `macros.mac' into the source
-       file containing the `%include' directive.
-
-       Include files are searched for in the current directory (the
-       directory you're in when you run NASM, as opposed to the location of
-       the NASM executable or the location of the source file), plus any
-       directories specified on the NASM command line using the `-i'
-       option.
-
-       The standard C idiom for preventing a file being included more than
-       once is just as applicable in NASM: if the file `macros.mac' has the
-       form
-
-       %ifndef MACROS_MAC 
-           %define MACROS_MAC 
-           ; now define some macros 
-       %endif
-
-       then including the file more than once will not cause errors,
-       because the second time the file is included nothing will happen
-       because the macro `MACROS_MAC' will already be defined.
-
-       You can force a file to be included even if there is no `%include'
-       directive that explicitly includes it, by using the `-p' option on
-       the NASM command line (see section 2.1.19).
-
- 4.8.2 `%pathsearch': Search the Include Path
-
-       The `%pathsearch' directive takes a single-line macro name and a
-       filename, and declare or redefines the specified single-line macro
-       to be the include-path-resolved version of the filename, if the file
-       exists (otherwise, it is passed unchanged.)
-
-       For example,
-
-       %pathsearch MyFoo "foo.bin"
-
-       ... with `-Ibins/' in the include path may end up defining the macro
-       `MyFoo' to be `"bins/foo.bin"'.
-
- 4.8.3 `%depend': Add Dependent Files
-
-       The `%depend' directive takes a filename and adds it to the list of
-       files to be emitted as dependency generation when the `-M' options
-       and its relatives (see section 2.1.5) are used. It produces no
-       output.
-
-       This is generally used in conjunction with `%pathsearch'. For
-       example, a simplified version of the standard macro wrapper for the
-       `INCBIN' directive looks like:
-
-       %imacro incbin 1-2+ 0 
-       %pathsearch dep %1 
-       %depend dep 
-               incbin dep,%2 
-       %endmacro
-
-       This first resolves the location of the file into the macro `dep',
-       then adds it to the dependency lists, and finally issues the
-       assembler-level `INCBIN' directive.
-
- 4.8.4 `%use': Include Standard Macro Package
-
-       The `%use' directive is similar to `%include', but rather than
-       including the contents of a file, it includes a named standard macro
-       package. The standard macro packages are part of NASM, and are
-       described in chapter 6.
-
-       Unlike the `%include' directive, package names for the `%use'
-       directive do not require quotes, but quotes are permitted. In NASM
-       2.04 and 2.05 the unquoted form would be macro-expanded; this is no
-       longer true. Thus, the following lines are equivalent:
-
-       %use altreg 
-       %use 'altreg'
-
-       Standard macro packages are protected from multiple inclusion. When
-       a standard macro package is used, a testable single-line macro of
-       the form `__?USE_'_package_`?__' is also defined, see section 5.7.
-
-   4.9 The Context Stack
-
-       Having labels that are local to a macro definition is sometimes not
-       quite powerful enough: sometimes you want to be able to share labels
-       between several macro calls. An example might be a `REPEAT' ...
-       `UNTIL' loop, in which the expansion of the `REPEAT' macro would
-       need to be able to refer to a label which the `UNTIL' macro had
-       defined. However, for such a macro you would also want to be able to
-       nest these loops.
-
-       NASM provides this level of power by means of a _context stack_. The
-       preprocessor maintains a stack of _contexts_, each of which is
-       characterized by a name. You add a new context to the stack using
-       the `%push' directive, and remove one using `%pop'. You can define
-       labels that are local to a particular context on the stack.
-
- 4.9.1 `%push' and `%pop': Creating and Removing Contexts
-
-       The `%push' directive is used to create a new context and place it
-       on the top of the context stack. `%push' takes an optional argument,
-       which is the name of the context. For example:
-
-       %push    foobar
-
-       This pushes a new context called `foobar' on the stack. You can have
-       several contexts on the stack with the same name: they can still be
-       distinguished. If no name is given, the context is unnamed (this is
-       normally used when both the `%push' and the `%pop' are inside a
-       single macro definition.)
-
-       The directive `%pop', taking one optional argument, removes the top
-       context from the context stack and destroys it, along with any
-       labels associated with it. If an argument is given, it must match
-       the name of the current context, otherwise it will issue an error.
-
- 4.9.2 Context-Local Labels
-
-       Just as the usage `%%foo' defines a label which is local to the
-       particular macro call in which it is used, the usage `%$foo' is used
-       to define a label which is local to the context on the top of the
-       context stack. So the `REPEAT' and `UNTIL' example given above could
-       be implemented by means of:
-
-       %macro repeat 0 
-       
-           %push   repeat 
-           %$begin: 
-       
-       %endmacro 
-       
-       %macro until 1 
-       
-               j%-1    %$begin 
-           %pop 
-       
-       %endmacro
-
-       and invoked by means of, for example,
-
-               mov     cx,string 
-               repeat 
-               add     cx,3 
-               scasb 
-               until   e
-
-       which would scan every fourth byte of a string in search of the byte
-       in `AL'.
-
-       If you need to define, or access, labels local to the context
-       _below_ the top one on the stack, you can use `%$$foo', or `%$$$foo'
-       for the context below that, and so on.
-
- 4.9.3 Context-Local Single-Line Macros
-
-       NASM also allows you to define single-line macros which are local to
-       a particular context, in just the same way:
-
-       %define %$localmac 3
-
-       will define the single-line macro `%$localmac' to be local to the
-       top context on the stack. Of course, after a subsequent `%push', it
-       can then still be accessed by the name `%$$localmac'.
-
- 4.9.4 Context Fall-Through Lookup _(deprecated)_
-
-       Context fall-through lookup (automatic searching of outer contexts)
-       is a feature that was added in NASM version 0.98.03. Unfortunately,
-       this feature is unintuitive and can result in buggy code that would
-       have otherwise been prevented by NASM's error reporting. As a
-       result, this feature has been _deprecated_. NASM version 2.09 will
-       issue a warning when usage of this _deprecated_ feature is detected.
-       Starting with NASM version 2.10, usage of this _deprecated_ feature
-       will simply result in an _expression syntax error_.
-
-       An example usage of this _deprecated_ feature follows:
-
-       %macro ctxthru 0 
-       %push ctx1 
-           %assign %$external 1 
-               %push ctx2 
-                   %assign %$internal 1 
-                   mov eax, %$external 
-                   mov eax, %$internal 
-               %pop 
-       %pop 
-       %endmacro
-
-       As demonstrated, `%$external' is being defined in the `ctx1' context
-       and referenced within the `ctx2' context. With context fall-through
-       lookup, referencing an undefined context-local macro like this
-       implicitly searches through all outer contexts until a match is made
-       or isn't found in any context. As a result, `%$external' referenced
-       within the `ctx2' context would implicitly use `%$external' as
-       defined in `ctx1'. Most people would expect NASM to issue an error
-       in this situation because `%$external' was never defined within
-       `ctx2' and also isn't qualified with the proper context depth,
-       `%$$external'.
-
-       Here is a revision of the above example with proper context depth:
-
-       %macro ctxthru 0 
-       %push ctx1 
-           %assign %$external 1 
-               %push ctx2 
-                   %assign %$internal 1 
-                   mov eax, %$$external 
-                   mov eax, %$internal 
-               %pop 
-       %pop 
-       %endmacro
-
-       As demonstrated, `%$external' is still being defined in the `ctx1'
-       context and referenced within the `ctx2' context. However, the
-       reference to `%$external' within `ctx2' has been fully qualified
-       with the proper context depth, `%$$external', and thus is no longer
-       ambiguous, unintuitive or erroneous.
-
- 4.9.5 `%repl': Renaming a Context
-
-       If you need to change the name of the top context on the stack (in
-       order, for example, to have it respond differently to `%ifctx'), you
-       can execute a `%pop' followed by a `%push'; but this will have the
-       side effect of destroying all context-local labels and macros
-       associated with the context that was just popped.
-
-       NASM provides the directive `%repl', which _replaces_ a context with
-       a different name, without touching the associated macros and labels.
-       So you could replace the destructive code
-
-       %pop 
-       %push   newname
-
-       with the non-destructive version `%repl newname'.
-
- 4.9.6 Example Use of the Context Stack: Block IFs
-
-       This example makes use of almost all the context-stack features,
-       including the conditional-assembly construct `%ifctx', to implement
-       a block IF statement as a set of macros.
-
-       %macro if 1 
-       
-           %push if 
-           j%-1  %$ifnot 
-       
-       %endmacro 
-       
-       %macro else 0 
-       
-         %ifctx if 
-               %repl   else 
-               jmp     %$ifend 
-               %$ifnot: 
-         %else 
-               %error  "expected `if' before `else'" 
-         %endif 
-       
-       %endmacro 
-       
-       %macro endif 0 
-       
-         %ifctx if 
-               %$ifnot: 
-               %pop 
-         %elifctx      else 
-               %$ifend: 
-               %pop 
-         %else 
-               %error  "expected `if' or `else' before `endif'" 
-         %endif 
-       
-       %endmacro
-
-       This code is more robust than the `REPEAT' and `UNTIL' macros given
-       in section 4.9.2, because it uses conditional assembly to check that
-       the macros are issued in the right order (for example, not calling
-       `endif' before `if') and issues a `%error' if they're not.
-
-       In addition, the `endif' macro has to be able to cope with the two
-       distinct cases of either directly following an `if', or following an
-       `else'. It achieves this, again, by using conditional assembly to do
-       different things depending on whether the context on top of the
-       stack is `if' or `else'.
-
-       The `else' macro has to preserve the context on the stack, in order
-       to have the `%$ifnot' referred to by the `if' macro be the same as
-       the one defined by the `endif' macro, but has to change the
-       context's name so that `endif' will know there was an intervening
-       `else'. It does this by the use of `%repl'.
-
-       A sample usage of these macros might look like:
-
-               cmp     ax,bx 
-       
-               if ae 
-                      cmp     bx,cx 
-       
-                      if ae 
-                              mov     ax,cx 
-                      else 
-                              mov     ax,bx 
-                      endif 
-       
-               else 
-                      cmp     ax,cx 
-       
-                      if ae 
-                              mov     ax,cx 
-                      endif 
-       
-               endif
-
-       The block-`IF' macros handle nesting quite happily, by means of
-       pushing another context, describing the inner `if', on top of the
-       one describing the outer `if'; thus `else' and `endif' always refer
-       to the last unmatched `if' or `else'.
-
-  4.10 Stack Relative Preprocessor Directives
-
-       The following preprocessor directives provide a way to use labels to
-       refer to local variables allocated on the stack.
-
-       (*) `%arg' (see section 4.10.1)
-
-       (*) `%stacksize' (see section 4.10.2)
-
-       (*) `%local' (see section 4.10.3)
-
-4.10.1 `%arg' Directive
-
-       The `%arg' directive is used to simplify the handling of parameters
-       passed on the stack. Stack based parameter passing is used by many
-       high level languages, including C, C++ and Pascal.
-
-       While NASM has macros which attempt to duplicate this functionality
-       (see section 9.4.5), the syntax is not particularly convenient to
-       use and is not TASM compatible. Here is an example which shows the
-       use of `%arg' without any external macros:
-
-       some_function: 
-       
-           %push     mycontext        ; save the current context 
-           %stacksize large           ; tell NASM to use bp 
-           %arg      i:word, j_ptr:word 
-       
-               mov     ax,i 
-               mov     bx,j_ptr 
-               add     ax,bx 
-               ret 
-       
-           %pop                       ; restore original context
-
-       This is similar to the procedure defined in section 9.4.5 and adds
-       the value in i to the value pointed to by j_ptr and returns the sum
-       in the ax register. See section 4.9.1 for an explanation of `push'
-       and `pop' and the use of context stacks.
-
-4.10.2 `%stacksize' Directive
-
-       The `%stacksize' directive is used in conjunction with the `%arg'
-       (see section 4.10.1) and the `%local' (see section 4.10.3)
-       directives. It tells NASM the default size to use for subsequent
-       `%arg' and `%local' directives. The `%stacksize' directive takes one
-       required argument which is one of `flat', `flat64', `large' or
-       `small'.
-
-       %stacksize flat
-
-       This form causes NASM to use stack-based parameter addressing
-       relative to `ebp' and it assumes that a near form of call was used
-       to get to this label (i.e. that `eip' is on the stack).
-
-       %stacksize flat64
-
-       This form causes NASM to use stack-based parameter addressing
-       relative to `rbp' and it assumes that a near form of call was used
-       to get to this label (i.e. that `rip' is on the stack).
-
-       %stacksize large
-
-       This form uses `bp' to do stack-based parameter addressing and
-       assumes that a far form of call was used to get to this address
-       (i.e. that `ip' and `cs' are on the stack).
-
-       %stacksize small
-
-       This form also uses `bp' to address stack parameters, but it is
-       different from `large' because it also assumes that the old value of
-       bp is pushed onto the stack (i.e. it expects an `ENTER'
-       instruction). In other words, it expects that `bp', `ip' and `cs'
-       are on the top of the stack, underneath any local space which may
-       have been allocated by `ENTER'. This form is probably most useful
-       when used in combination with the `%local' directive (see section
-       4.10.3).
-
-4.10.3 `%local' Directive
-
-       The `%local' directive is used to simplify the use of local
-       temporary stack variables allocated in a stack frame. Automatic
-       local variables in C are an example of this kind of variable. The
-       `%local' directive is most useful when used with the `%stacksize'
-       (see section 4.10.2 and is also compatible with the `%arg' directive
-       (see section 4.10.1). It allows simplified reference to variables on
-       the stack which have been allocated typically by using the `ENTER'
-       instruction. An example of its use is the following:
-
-       silly_swap: 
-       
-           %push mycontext             ; save the current context 
-           %stacksize small            ; tell NASM to use bp 
-           %assign %$localsize 0       ; see text for explanation 
-           %local old_ax:word, old_dx:word 
-       
-               enter   %$localsize,0   ; see text for explanation 
-               mov     old_ax,ax     ; swap ax & bx 
-               mov     old_dx,dx     ; and swap dx & cx 
-               mov     ax,bx 
-               mov     dx,cx 
-               mov     bx,old_ax 
-               mov     cx,old_dx 
-               leave                   ; restore old bp 
-               ret                     ; 
-       
-           %pop                        ; restore original context
-
-       The `%$localsize' variable is used internally by the `%local'
-       directive and _must_ be defined within the current context before
-       the `%local' directive may be used. Failure to do so will result in
-       one expression syntax error for each `%local' variable declared. It
-       then may be used in the construction of an appropriately sized ENTER
-       instruction as shown in the example.
-
-  4.11 Reporting User-Defined Errors: `%error', `%warning', `%fatal'
-
-       The preprocessor directive `%error' will cause NASM to report an
-       error if it occurs in assembled code. So if other users are going to
-       try to assemble your source files, you can ensure that they define
-       the right macros by means of code like this:
-
-       %ifdef F1 
-           ; do some setup 
-       %elifdef F2 
-           ; do some different setup 
-       %else 
-           %error "Neither F1 nor F2 was defined." 
-       %endif
-
-       Then any user who fails to understand the way your code is supposed
-       to be assembled will be quickly warned of their mistake, rather than
-       having to wait until the program crashes on being run and then not
-       knowing what went wrong.
-
-       Similarly, `%warning' issues a warning, but allows assembly to
-       continue:
-
-       %ifdef F1 
-           ; do some setup 
-       %elifdef F2 
-           ; do some different setup 
-       %else 
-           %warning "Neither F1 nor F2 was defined, assuming F1." 
-           %define F1 
-       %endif
-
-       `%error' and `%warning' are issued only on the final assembly pass.
-       This makes them safe to use in conjunction with tests that depend on
-       symbol values.
-
-       `%fatal' terminates assembly immediately, regardless of pass. This
-       is useful when there is no point in continuing the assembly further,
-       and doing so is likely just going to cause a spew of confusing error
-       messages.
-
-       It is optional for the message string after `%error', `%warning' or
-       `%fatal' to be quoted. If it is _not_, then single-line macros are
-       expanded in it, which can be used to display more information to the
-       user. For example:
-
-       %if foo > 64 
-           %assign foo_over foo-64 
-           %error foo is foo_over bytes too large 
-       %endif
-
-  4.12 `%pragma': Setting Options
-
-       The `%pragma' directive controls a number of options in NASM.
-       Pragmas are intended to remain backwards compatible, and therefore
-       an unknown `%pragma' directive is not an error.
-
-       The various pragmas are documented with the options they affect.
-
-       The general structure of a NASM pragma is:
-
-       `%pragma' _namespace_ _directive_ _arguments..._
-
-       Currently defined namespaces are:
-
-       (*) `ignore': this `%pragma' is unconditionally ignored.
-
-       (*) `preproc': preprocessor, see section 4.12.1.
-
-       (*) `limit': resource limits, see section 2.1.31.
-
-       (*) `asm': the parser and assembler proper. Currently no such
-           pragmas are defined.
-
-       (*) `list': listing options, see section 2.1.4.
-
-       (*) `file': general file handling options. Currently no such pragmas
-           are defined.
-
-       (*) `input': input file handling options. Currently no such pragmas
-           are defined.
-
-       (*) `output': output format options.
-
-       (*) `debug': debug format options.
-
-       In addition, the name of any output or debug format, and sometimes
-       groups thereof, also constitute `%pragma' namespaces. The namespaces
-       `output' and `debug' simply refer to _any_ output or debug format,
-       respectively.
-
-       For example, to prepend an underscore to global symbols regardless
-       of the output format (see section 7.10):
-
-       %pragma output gprefix _
-
-       ... whereas to prepend an underscore to global symbols only when the
-       output is either `win32' or `win64':
-
-       %pragma win gprefix _
-
-4.12.1 Preprocessor Pragmas
-
-       The only preprocessor `%pragma' defined in NASM 2.15 is:
-
-       (*) `%pragma preproc sane_empty_expansion': disables legacy
-           compatibility handling of braceless empty arguments to multi-
-           line macros. See section 4.5 and section 2.1.26.
-
-  4.13 Other Preprocessor Directives
-
-4.13.1 `%line' Directive
-
-       The `%line' directive is used to notify NASM that the input line
-       corresponds to a specific line number in another file. Typically
-       this other file would be an original source file, with the current
-       NASM input being the output of a pre-processor. The `%line'
-       directive allows NASM to output messages which indicate the line
-       number of the original source file, instead of the file that is
-       being read by NASM.
-
-       This preprocessor directive is not generally used directly by
-       programmers, but may be of interest to preprocessor authors. The
-       usage of the `%line' preprocessor directive is as follows:
-
-       %line nnn+mmm filename
-
-       In this directive, `nnn' identifies the line of the original source
-       file which this line corresponds to. `mmm' is an optional parameter
-       which specifies a line increment value; each line of the input file
-       read in is considered to correspond to `mmm' lines of the original
-       source file. Finally, `filename' is an optional parameter which
-       specifies the file name of the original source file. It may be a
-       quoted string, in which case any additional argument after the
-       quoted string will be ignored.
-
-       After reading a `%line' preprocessor directive, NASM will report all
-       file name and line numbers relative to the values specified therein.
-
-       If the command line option `--no-line' is given, all `%line'
-       directives are ignored. This may be useful for debugging
-       preprocessed code. See section 2.1.33.
-
-       Starting in NASM 2.15, `%line' directives are processed before any
-       other processing takes place.
-
-       For compatibility with the output from some other preprocessors,
-       including many C preprocessors, a `#' character followed by
-       whitespace _at the very beginning of a line_ is also treated as a
-       `%line' directive, except that double quotes surrounding the
-       filename are treated like NASM backquotes, with `\'-escaped
-       sequences decoded.
-
-4.13.2 `%!'_variable_: Read an Environment Variable.
-
-       The `%!'_variable_ directive makes it possible to read the value of
-       an environment variable at assembly time. This could, for example,
-       be used to store the contents of an environment variable into a
-       string, which could be used at some other point in your code.
-
-       For example, suppose that you have an environment variable `FOO',
-       and you want the contents of `FOO' to be embedded in your program as
-       a quoted string. You could do that as follows:
-
-       %defstr FOO          %!FOO
-
-       See section 4.2.9 for notes on the `%defstr' directive.
-
-       If the name of the environment variable contains non-identifier
-       characters, you can use string quotes to surround the name of the
-       variable, for example:
-
-       %defstr C_colon      %!'C:'
-
-4.13.3 `%clear': Clear All Macro Definitions
-
-       The directive `%clear' clears all definitions of a certain type,
-       _including the ones defined by NASM itself._ This can be useful when
-       preprocessing non-NASM code, or to drop backwards compatibility
-       aliases.
-
-       The syntax is:
-
-          %clear global|context type...
-
-       ... where `context' indicates that this applies to context-local
-       macros only; the default is `global'.
-
-       `type' can be one or more of:
-
-       (*) `define' single-line macros
-
-       (*) `defalias' single-line macro aliases (useful to remove backwards
-           compatibility aliases)
-
-       (*) `alldefine' same as `define defalias'
-
-       (*) `macro' multi-line macros
-
-       (*) `all' same as `alldefine macro' (default)
-
-       In NASM 2.14 and earlier, only the single syntax `%clear' was
-       supported, which is equivalent to `%clear global all'.
-
-Chapter 5: Standard Macros
---------------------------
-
-       NASM defines a set of standard macros, which are already defined
-       when it starts to process any source file. If you really need a
-       program to be assembled with no pre-defined macros, you can use the
-       `%clear' directive to empty the preprocessor of everything but
-       context-local preprocessor variables and single-line macros, see
-       section 4.13.3.
-
-       Most user-level directives (see chapter 7) are implemented as macros
-       which invoke primitive directives; these are described in chapter 7.
-       The rest of the standard macro set is described here.
-
-       For compatibility with NASM versions before NASM 2.15, most standard
-       macros of the form `__?foo?__' have aliases of form `__foo__' (see
-       section 4.2.11). These can be removed with the directive
-       `%clear defalias'.
-
-   5.1 NASM Version Macros
-
-       The single-line macros `__?NASM_MAJOR?__', `__?NASM_MINOR?__',
-       `__?NASM_SUBMINOR?__' and `__?NASM_PATCHLEVEL?__' expand to the
-       major, minor, subminor and patch level parts of the version number
-       of NASM being used. So, under NASM 0.98.32p1 for example,
-       `__?NASM_MAJOR?__' would be defined to be 0, `__?NASM_MINOR?__'
-       would be defined as 98, `__?NASM_SUBMINOR?__' would be defined to
-       32, and `__?NASM_PATCHLEVEL?__' would be defined as 1.
-
-       Additionally, the macro `__?NASM_SNAPSHOT?__' is defined for
-       automatically generated snapshot releases _only_.
-
- 5.1.1 `__?NASM_VERSION_ID?__': NASM Version ID
-
-       The single-line macro `__?NASM_VERSION_ID?__' expands to a dword
-       integer representing the full version number of the version of nasm
-       being used. The value is the equivalent to `__?NASM_MAJOR?__',
-       `__?NASM_MINOR?__', `__?NASM_SUBMINOR?__' and
-       `__?NASM_PATCHLEVEL?__' concatenated to produce a single doubleword.
-       Hence, for 0.98.32p1, the returned number would be equivalent to:
-
-               dd      0x00622001
-
-       or
-
-               db      1,32,98,0
-
-       Note that the above lines are generate exactly the same code, the
-       second line is used just to give an indication of the order that the
-       separate values will be present in memory.
-
- 5.1.2 `__?NASM_VER?__': NASM Version String
-
-       The single-line macro `__?NASM_VER?__' expands to a string which
-       defines the version number of nasm being used. So, under NASM
-       0.98.32 for example,
-
-               db      __?NASM_VER?__
-
-       would expand to
-
-               db      "0.98.32"
-
-   5.2 `__?FILE?__' and `__?LINE?__': File Name and Line Number
-
-       Like the C preprocessor, NASM allows the user to find out the file
-       name and line number containing the current instruction. The macro
-       `__?FILE?__' expands to a string constant giving the name of the
-       current input file (which may change through the course of assembly
-       if `%include' directives are used), and `__?LINE?__' expands to a
-       numeric constant giving the current line number in the input file.
-
-       These macros could be used, for example, to communicate debugging
-       information to a macro, since invoking `__?LINE?__' inside a macro
-       definition (either single-line or multi-line) will return the line
-       number of the macro _call_, rather than _definition_. So to
-       determine where in a piece of code a crash is occurring, for
-       example, one could write a routine `stillhere', which is passed a
-       line number in `EAX' and outputs something like
-       `line 155: still here'. You could then write a macro:
-
-       %macro  notdeadyet 0 
-       
-               push    eax 
-               mov     eax,__?LINE?__ 
-               call    stillhere 
-               pop     eax 
-       
-       %endmacro
-
-       and then pepper your code with calls to `notdeadyet' until you find
-       the crash point.
-
-   5.3 `__?BITS?__': Current Code Generation Mode
-
-       The `__?BITS?__' standard macro is updated every time that the BITS
-       mode is set using the `BITS XX' or `BITS XX' directive, where XX
-       is a valid mode number of 16, 32 or 64. `__?BITS?__' receives the
-       specified mode number and makes it globally available. This can be
-       very useful for those who utilize mode-dependent macros.
-
-   5.4 `__?OUTPUT_FORMAT?__': Current Output Format
-
-       The `__?OUTPUT_FORMAT?__' standard macro holds the current output
-       format name, as given by the `-f' option or NASM's default. Type
-       `nasm -h' for a list.
-
-       %ifidn __?OUTPUT_FORMAT?__, win32 
-        %define NEWLINE 13, 10 
-       %elifidn __?OUTPUT_FORMAT?__, elf32 
-        %define NEWLINE 10 
-       %endif
-
-   5.5 `__?DEBUG_FORMAT?__': Current Debug Format
-
-       If debugging information generation is enabled, The
-       `__?DEBUG_FORMAT?__' standard macro holds the current debug format
-       name as specified by the `-F' or `-g' option or the output format
-       default. Type `nasm -f' _output_ `y' for a list.
-
-       `__?DEBUG_FORMAT?__' is not defined if debugging is not enabled, or
-       if the debug format specified is `null'.
-
-   5.6 Assembly Date and Time Macros
-
-       NASM provides a variety of macros that represent the timestamp of
-       the assembly session.
-
-       (*) The `__?DATE?__' and `__?TIME?__' macros give the assembly date
-           and time as strings, in ISO 8601 format (`"YYYY-MM-DD"' and
-           `"HH:MM:SS"', respectively.)
-
-       (*) The `__?DATE_NUM?__' and `__?TIME_NUM?__' macros give the
-           assembly date and time in numeric form; in the format `YYYYMMDD'
-           and `HHMMSS' respectively.
-
-       (*) The `__?UTC_DATE?__' and `__?UTC_TIME?__' macros give the
-           assembly date and time in universal time (UTC) as strings, in
-           ISO 8601 format (`"YYYY-MM-DD"' and `"HH:MM:SS"', respectively.)
-           If the host platform doesn't provide UTC time, these macros are
-           undefined.
-
-       (*) The `__?UTC_DATE_NUM?__' and `__?UTC_TIME_NUM?__' macros give
-           the assembly date and time universal time (UTC) in numeric form;
-           in the format `YYYYMMDD' and `HHMMSS' respectively. If the host
-           platform doesn't provide UTC time, these macros are undefined.
-
-       (*) The `__?POSIX_TIME?__' macro is defined as a number containing
-           the number of seconds since the POSIX epoch, 1 January 1970
-           00:00:00 UTC; excluding any leap seconds. This is computed using
-           UTC time if available on the host platform, otherwise it is
-           computed using the local time as if it was UTC.
-
-       All instances of time and date macros in the same assembly session
-       produce consistent output. For example, in an assembly session
-       started at 42 seconds after midnight on January 1, 2010 in Moscow
-       (timezone UTC+3) these macros would have the following values,
-       assuming, of course, a properly configured environment with a
-       correct clock:
-
-             __?DATE?__             "2010-01-01" 
-             __?TIME?__             "00:00:42" 
-             __?DATE_NUM?__         20100101 
-             __?TIME_NUM?__         000042 
-             __?UTC_DATE?__         "2009-12-31" 
-             __?UTC_TIME?__         "21:00:42" 
-             __?UTC_DATE_NUM?__     20091231 
-             __?UTC_TIME_NUM?__     210042 
-             __?POSIX_TIME?__       1262293242
-
-   5.7 `__?USE_'_package_`?__': Package Include Test
-
-       When a standard macro package (see chapter 6) is included with the
-       `%use' directive (see section 4.8.4), a single-line macro of the
-       form `__USE_'_package_`__' is automatically defined. This allows
-       testing if a particular package is invoked or not.
-
-       For example, if the `altreg' package is included (see section 6.1),
-       then the macro `__?USE_ALTREG?__' is defined.
-
-   5.8 `__?PASS?__': Assembly Pass
-
-       The macro `__?PASS?__' is defined to be `1' on preparatory passes,
-       and `2' on the final pass. In preprocess-only mode, it is set to
-       `3', and when running only to generate dependencies (due to the `-M'
-       or `-MG' option, see section 2.1.5) it is set to `0'.
-
-       _Avoid using this macro if at all possible. It is tremendously easy
-       to generate very strange errors by misusing it, and the semantics
-       may change in future versions of NASM._
-
-   5.9 Structure Data Types
-
- 5.9.1 `STRUC' and `ENDSTRUC': Declaring Structure Data Types
-
-       The core of NASM contains no intrinsic means of defining data
-       structures; instead, the preprocessor is sufficiently powerful that
-       data structures can be implemented as a set of macros. The macros
-       `STRUC' and `ENDSTRUC' are used to define a structure data type.
-
-       `STRUC' takes one or two parameters. The first parameter is the name
-       of the data type. The second, optional parameter is the base offset
-       of the structure. The name of the data type is defined as a symbol
-       with the value of the base offset, and the name of the data type
-       with the suffix `_size' appended to it is defined as an `EQU' giving
-       the size of the structure. Once `STRUC' has been issued, you are
-       defining the structure, and should define fields using the `RESB'
-       family of pseudo-instructions, and then invoke `ENDSTRUC' to finish
-       the definition.
-
-       For example, to define a structure called `mytype' containing a
-       longword, a word, a byte and a string of bytes, you might code
-
-       struc   mytype 
-       
-         mt_long:      resd    1 
-         mt_word:      resw    1 
-         mt_byte:      resb    1 
-         mt_str:       resb    32 
-       
-       endstruc
-
-       The above code defines six symbols: `mt_long' as 0 (the offset from
-       the beginning of a `mytype' structure to the longword field),
-       `mt_word' as 4, `mt_byte' as 6, `mt_str' as 7, `mytype_size' as 39,
-       and `mytype' itself as zero.
-
-       The reason why the structure type name is defined at zero by default
-       is a side effect of allowing structures to work with the local label
-       mechanism: if your structure members tend to have the same names in
-       more than one structure, you can define the above structure like
-       this:
-
-       struc mytype 
-       
-         .long:        resd    1 
-         .word:        resw    1 
-         .byte:        resb    1 
-         .str:         resb    32 
-       
-       endstruc
-
-       This defines the offsets to the structure fields as `mytype.long',
-       `mytype.word', `mytype.byte' and `mytype.str'.
-
-       NASM, since it has no _intrinsic_ structure support, does not
-       support any form of period notation to refer to the elements of a
-       structure once you have one (except the above local-label notation),
-       so code such as `mov ax,mystruc.mt_word' is not valid. `mt_word'
-       is a constant just like any other constant, so the correct syntax is
-       `mov ax,mystruc+mt_word' or `mov ax,mystruc+mytype.word'.
-
-       Sometimes you only have the address of the structure displaced by an
-       offset. For example, consider this standard stack frame setup:
-
-       push ebp 
-       mov ebp, esp 
-       sub esp, 40
-
-       In this case, you could access an element by subtracting the offset:
-
-       mov ebp - 40 + mytype.word, ax
-
-       However, if you do not want to repeat this offset, you can use -40
-       as a base offset:
-
-       struc mytype, -40
-
-       And access an element this way:
-
-       mov ebp + mytype.word, ax
-
- 5.9.2 `ISTRUC', `AT' and `IEND': Declaring Instances of Structures
-
-       Having defined a structure type, the next thing you typically want
-       to do is to declare instances of that structure in your data
-       segment. NASM provides an easy way to do this in the `ISTRUC'
-       mechanism. To declare a structure of type `mytype' in a program, you
-       code something like this:
-
-       mystruc: 
-           istruc mytype 
-       
-               at mt_long, dd      123456 
-               at mt_word, dw      1024 
-               at mt_byte, db      'x' 
-               at mt_str,  db      'hello, world', 13, 10, 0 
-       
-           iend
-
-       The function of the `AT' macro is to make use of the `TIMES' prefix
-       to advance the assembly position to the correct point for the
-       specified structure field, and then to declare the specified data.
-       Therefore the structure fields must be declared in the same order as
-       they were specified in the structure definition.
-
-       If the data to go in a structure field requires more than one source
-       line to specify, the remaining source lines can easily come after
-       the `AT' line. For example:
-
-               at mt_str,  db      123,134,145,156,167,178,189 
-                           db      190,100,0
-
-       Depending on personal taste, you can also omit the code part of the
-       `AT' line completely, and start the structure field on the next
-       line:
-
-               at mt_str 
-                       db      'hello, world' 
-                       db      13,10,0
-
-  5.10 Alignment Control
-
-5.10.1 `ALIGN' and `ALIGNB': Code and Data Alignment
-
-       The `ALIGN' and `ALIGNB' macros provides a convenient way to align
-       code or data on a word, longword, paragraph or other boundary. (Some
-       assemblers call this directive `EVEN'.) The syntax of the `ALIGN'
-       and `ALIGNB' macros is
-
-               align   4               ; align on 4-byte boundary 
-               align   16              ; align on 16-byte boundary 
-               align   8,db 0          ; pad with 0s rather than NOPs 
-               align   4,resb 1        ; align to 4 in the BSS 
-               alignb  4               ; equivalent to previous line
-
-       Both macros require their first argument to be a power of two; they
-       both compute the number of additional bytes required to bring the
-       length of the current section up to a multiple of that power of two,
-       and then apply the `TIMES' prefix to their second argument to
-       perform the alignment.
-
-       If the second argument is not specified, the default for `ALIGN' is
-       `NOP', and the default for `ALIGNB' is `RESB 1'. So if the second
-       argument is specified, the two macros are equivalent. Normally, you
-       can just use `ALIGN' in code and data sections and `ALIGNB' in BSS
-       sections, and never need the second argument except for special
-       purposes.
-
-       `ALIGN' and `ALIGNB', being simple macros, perform no error
-       checking: they cannot warn you if their first argument fails to be a
-       power of two, or if their second argument generates more than one
-       byte of code. In each of these cases they will silently do the wrong
-       thing.
-
-       `ALIGNB' (or `ALIGN' with a second argument of `RESB 1') can be used
-       within structure definitions:
-
-       struc mytype2 
-       
-         mt_byte: 
-               resb 1 
-               alignb 2 
-         mt_word: 
-               resw 1 
-               alignb 4 
-         mt_long: 
-               resd 1 
-         mt_str: 
-               resb 32 
-       
-       endstruc
-
-       This will ensure that the structure members are sensibly aligned
-       relative to the base of the structure.
-
-       A final caveat: `ALIGN' and `ALIGNB' work relative to the beginning
-       of the _section_, not the beginning of the address space in the
-       final executable. Aligning to a 16-byte boundary when the section
-       you're in is only guaranteed to be aligned to a 4-byte boundary, for
-       example, is a waste of effort. Again, NASM does not check that the
-       section's alignment characteristics are sensible for the use of
-       `ALIGN' or `ALIGNB'.
-
-       Both `ALIGN' and `ALIGNB' do call `SECTALIGN' macro implicitly. See
-       section 5.10.2 for details.
-
-       See also the `smartalign' standard macro package, section 6.2.
-
-5.10.2 `SECTALIGN': Section Alignment
-
-       The `SECTALIGN' macros provides a way to modify alignment attribute
-       of output file section. Unlike the `align=' attribute (which is
-       allowed at section definition only) the `SECTALIGN' macro may be
-       used at any time.
-
-       For example the directive
-
-       SECTALIGN 16
-
-       sets the section alignment requirements to 16 bytes. Once increased
-       it can not be decreased, the magnitude may grow only.
-
-       Note that `ALIGN' (see section 5.10.1) calls the `SECTALIGN' macro
-       implicitly so the active section alignment requirements may be
-       updated. This is by default behaviour, if for some reason you want
-       the `ALIGN' do not call `SECTALIGN' at all use the directive
-
-       SECTALIGN OFF
-
-       It is still possible to turn in on again by
-
-       SECTALIGN ON
-
-       Note that `SECTALIGN <ON|OFF>' affects only the `ALIGN'/`ALIGNB'
-       directives, not an explicit `SECTALIGN' directive.
-
-Chapter 6: Standard Macro Packages
-----------------------------------
-
-       The `%use' directive (see section 4.8.4) includes one of the
-       standard macro packages included with the NASM distribution and
-       compiled into the NASM binary. It operates like the `%include'
-       directive (see section 4.8.1), but the included contents is provided
-       by NASM itself.
-
-       The names of standard macro packages are case insensitive and can be
-       quoted or not.
-
-       As of version 2.15, NASM has `%ifusable' and `%ifusing' directives
-       to help the user understand whether an individual package available
-       in this version of NASM (`%ifusable') or a particular package
-       already loaded (`%ifusing').
-
-   6.1 `altreg': Alternate Register Names
-
-       The `altreg' standard macro package provides alternate register
-       names. It provides numeric register names for all registers (not
-       just `R8'-`R15'), the Intel-defined aliases `R8L'-`R15L' for the low
-       bytes of register (as opposed to the NASM/AMD standard names `R8B'-
-       `R15B'), and the names `R0H'-`R3H' (by analogy with `R0L'-`R3L') for
-       `AH', `CH', `DH', and `BH'.
-
-       Example use:
-
-       %use altreg 
-       
-       proc: 
-             mov r0l,r3h                    ; mov al,bh 
-             ret
-
-       See also section 12.1.
-
-   6.2 `smartalign': Smart `ALIGN' Macro
-
-       The `smartalign' standard macro package provides for an `ALIGN'
-       macro which is more powerful than the default (and backwards-
-       compatible) one (see section 5.10.1). When the `smartalign' package
-       is enabled, when `ALIGN' is used without a second argument, NASM
-       will generate a sequence of instructions more efficient than a
-       series of `NOP'. Furthermore, if the padding exceeds a specific
-       threshold, then NASM will generate a jump over the entire padding
-       sequence.
-
-       The specific instructions generated can be controlled with the new
-       `ALIGNMODE' macro. This macro takes two parameters: one mode, and an
-       optional jump threshold override. If (for any reason) you need to
-       turn off the jump completely just set jump threshold value to -1 (or
-       set it to `nojmp'). The following modes are possible:
-
-       (*) `generic': Works on all x86 CPUs and should have reasonable
-           performance. The default jump threshold is 8. This is the
-           default.
-
-       (*) `nop': Pad out with `NOP' instructions. The only difference
-           compared to the standard `ALIGN' macro is that NASM can still
-           jump over a large padding area. The default jump threshold is
-           16.
-
-       (*) `k7': Optimize for the AMD K7 (Athlon/Althon XP). These
-           instructions should still work on all x86 CPUs. The default jump
-           threshold is 16.
-
-       (*) `k8': Optimize for the AMD K8 (Opteron/Althon 64). These
-           instructions should still work on all x86 CPUs. The default jump
-           threshold is 16.
-
-       (*) `p6': Optimize for Intel CPUs. This uses the long `NOP'
-           instructions first introduced in Pentium Pro. This is
-           incompatible with all CPUs of family 5 or lower, as well as some
-           VIA CPUs and several virtualization solutions. The default jump
-           threshold is 16.
-
-       The macro `__?ALIGNMODE?__' is defined to contain the current
-       alignment mode. A number of other macros beginning with `__?ALIGN_'
-       are used internally by this macro package.
-
-   6.3 `fp': Floating-point macros
-
-       This packages contains the following floating-point convenience
-       macros:
-
-       %define Inf             __?Infinity?__ 
-       %define NaN             __?QNaN?__ 
-       %define QNaN            __?QNaN?__ 
-       %define SNaN            __?SNaN?__ 
-       
-       %define float8(x)       __?float8?__(x) 
-       %define float16(x)      __?float16?__(x) 
-       %define bfloat16(x)     __?bfloat16?__(x) 
-       %define float32(x)      __?float32?__(x) 
-       %define float64(x)      __?float64?__(x) 
-       %define float80m(x)     __?float80m?__(x) 
-       %define float80e(x)     __?float80e?__(x) 
-       %define float128l(x)    __?float128l?__(x) 
-       %define float128h(x)    __?float128h?__(x)
-
-       It also defines the a multi-line macro `bf16' that can be used in a
-       similar way to the `D'_x_ directives for the other floating-point
-       numbers:
-
-            bf16 -3.1415, NaN, 2000.0, +Inf
-
-   6.4 `ifunc': Integer functions
-
-       This package contains a set of macros which implement integer
-       functions. These are actually implemented as special operators, but
-       are most conveniently accessed via this macro package.
-
-       The macros provided are:
-
- 6.4.1 Integer logarithms
-
-       These functions calculate the integer logarithm base 2 of their
-       argument, considered as an unsigned integer. The only differences
-       between the functions is their respective behavior if the argument
-       provided is not a power of two.
-
-       The function `ilog2e()' (alias `ilog2()') generates an error if the
-       argument is not a power of two.
-
-       The function `ilog2f()' rounds the argument down to the nearest
-       power of two; if the argument is zero it returns zero.
-
-       The function `ilog2c()' rounds the argument up to the nearest power
-       of two.
-
-       The functions `ilog2fw()' (alias `ilog2w()') and `ilog2cw()'
-       generate a warning if the argument is not a power of two, but
-       otherwise behaves like `ilog2f()' and `ilog2c()', respectively.
-
-   6.5 `masm': MASM compatibility
-
-       Since version 2.15, NASM has a MASM compatibility package with
-       minimal functionality, as intended to be used primarily with
-       machine-generated code. It does not include any "programmer-
-       friendly" shortcuts, nor does it in any way support ASSUME, symbol
-       typing, or MASM-style structures.
-
-       To enable the package, use the directive:
-
-       `%use masm'
-
-       Currently, the MASM compatibility package emulates:
-
-       (*) The `FLAT' and `OFFSET' keywords are recognized and ignored.
-
-       (*) The `PTR' keyword signifies a memory reference, as if the
-           argument had been put in square brackets:
-
-            mov eax,foo               ; memory reference 
-            mov eax,dword ptr foo       ; memory reference 
-            mov eax,dowrd ptr flat:foo  ; memory reference 
-            mov eax,offset foo          ; address 
-            mov eax,foo                 ; address (ambiguous syntax in MASM)
-
-       (*) The `SEGMENT' ... `ENDS' syntax:
-
-          segname SEGMENT 
-              ... 
-          segname ENDS
-
-       (*) The `PROC' ... `ENDP' syntax:
-
-          procname PROC FAR 
-               ... 
-          procname ENDP
-
-           `PROC' will also define `RET' as a macro expanding to either
-           `RETF' if `FAR' is specified and `RETN' otherwise. Any keyword
-           after `PROC' other than `FAR' is ignored.
-
-       (*) The `TBYTE' keyword as an alias for `TWORD' (see section 2.2.7).
-
-       (*) The `END' directive is ignored.
-
-       (*) In 64-bit mode relative addressing is the default
-           (`DEFAULT REL', see section 7.2.1).
-
-       In addition, NASM now natively supports, regardless of whether this
-       package is used or not:
-
-       (*) `?' and `DUP' syntax for the `DB' etc data declaration
-           directives (see section 3.2.1).
-
-       (*) `displacementbase+index' syntax for memory operations, instead
-           of `base+index+displacement'.
-
-       (*) `seg:addr' instead of `seg:addr' syntax.
-
-       (*) A pure offset can be given to `LEA' without square brackets:
-
-            lea rax,foo               ; standard syntax 
-            lea rax,foo                 ; also accepted
-
-Chapter 7: Assembler Directives
--------------------------------
-
-       NASM, though it attempts to avoid the bureaucracy of assemblers like
-       MASM and TASM, is nevertheless forced to support a _few_ directives.
-       These are described in this chapter.
-
-       NASM's directives come in two types: _user-level_ directives and
-       _primitive_ directives. Typically, each directive has a user-level
-       form and a primitive form. In almost all cases, we recommend that
-       users use the user-level forms of the directives, which are
-       implemented as macros which call the primitive forms.
-
-       Primitive directives are enclosed in square brackets; user-level
-       directives are not.
-
-       In addition to the universal directives described in this chapter,
-       each object file format can optionally supply extra directives in
-       order to control particular features of that file format. These
-       _format-specific_ directives are documented along with the formats
-       that implement them, in chapter 8.
-
-   7.1 `BITS': Specifying Target Processor Mode
-
-       The `BITS' directive specifies whether NASM should generate code
-       designed to run on a processor operating in 16-bit mode, 32-bit mode
-       or 64-bit mode. The syntax is `BITS XX', where XX is 16, 32 or 64.
-
-       In most cases, you should not need to use `BITS' explicitly. The
-       `aout', `coff', `elf*', `macho', `win32' and `win64' object formats,
-       which are designed for use in 32-bit or 64-bit operating systems,
-       all cause NASM to select 32-bit or 64-bit mode, respectively, by
-       default. The `obj' object format allows you to specify each segment
-       you define as either `USE16' or `USE32', and NASM will set its
-       operating mode accordingly, so the use of the `BITS' directive is
-       once again unnecessary.
-
-       The most likely reason for using the `BITS' directive is to write
-       32-bit or 64-bit code in a flat binary file; this is because the
-       `bin' output format defaults to 16-bit mode in anticipation of it
-       being used most frequently to write DOS `.COM' programs, DOS `.SYS'
-       device drivers and boot loader software.
-
-       The `BITS' directive can also be used to generate code for a
-       different mode than the standard one for the output format.
-
-       You do _not_ need to specify `BITS 32' merely in order to use 32-bit
-       instructions in a 16-bit DOS program; if you do, the assembler will
-       generate incorrect code because it will be writing code targeted at
-       a 32-bit platform, to be run on a 16-bit one.
-
-       When NASM is in `BITS 16' mode, instructions which use 32-bit data
-       are prefixed with an 0x66 byte, and those referring to 32-bit
-       addresses have an 0x67 prefix. In `BITS 32' mode, the reverse is
-       true: 32-bit instructions require no prefixes, whereas instructions
-       using 16-bit data need an 0x66 and those working on 16-bit addresses
-       need an 0x67.
-
-       When NASM is in `BITS 64' mode, most instructions operate the same
-       as they do for `BITS 32' mode. However, there are 8 more general and
-       SSE registers, and 16-bit addressing is no longer supported.
-
-       The default address size is 64 bits; 32-bit addressing can be
-       selected with the 0x67 prefix. The default operand size is still 32
-       bits, however, and the 0x66 prefix selects 16-bit operand size. The
-       `REX' prefix is used both to select 64-bit operand size, and to
-       access the new registers. NASM automatically inserts REX prefixes
-       when necessary.
-
-       When the `REX' prefix is used, the processor does not know how to
-       address the AH, BH, CH or DH (high 8-bit legacy) registers. Instead,
-       it is possible to access the the low 8-bits of the SP, BP SI and DI
-       registers as SPL, BPL, SIL and DIL, respectively; but only when the
-       REX prefix is used.
-
-       The `BITS' directive has an exactly equivalent primitive form,
-       `BITS 16', `BITS 32' and `BITS 64'. The user-level form is a
-       macro which has no function other than to call the primitive form.
-
-       Note that the space is necessary, e.g. `BITS32' will _not_ work!
-
- 7.1.1 `USE16' & `USE32': Aliases for BITS
-
-       The ``USE16'' and ``USE32'' directives can be used in place of
-       ``BITS 16'' and ``BITS 32'', for compatibility with other
-       assemblers.
-
-   7.2 `DEFAULT': Change the assembler defaults
-
-       The `DEFAULT' directive changes the assembler defaults. Normally,
-       NASM defaults to a mode where the programmer is expected to
-       explicitly specify most features directly. However, this is
-       occasionally obnoxious, as the explicit form is pretty much the only
-       one one wishes to use.
-
-       Currently, `DEFAULT' can set `REL' & `ABS' and `BND' & `NOBND'.
-
- 7.2.1 `REL' & `ABS': RIP-relative addressing
-
-       This sets whether registerless instructions in 64-bit mode are
-       `RIP'-relative or not. By default, they are absolute unless
-       overridden with the `REL' specifier (see section 3.3). However, if
-       `DEFAULT REL' is specified, `REL' is default, unless overridden with
-       the `ABS' specifier, _except when used with an FS or GS segment
-       override_.
-
-       The special handling of `FS' and `GS' overrides are due to the fact
-       that these registers are generally used as thread pointers or other
-       special functions in 64-bit mode, and generating `RIP'-relative
-       addresses would be extremely confusing.
-
-       `DEFAULT REL' is disabled with `DEFAULT ABS'.
-
- 7.2.2 `BND' & `NOBND': `BND' prefix
-
-       If `DEFAULT BND' is set, all bnd-prefix available instructions
-       following this directive are prefixed with bnd. To override it,
-       `NOBND' prefix can be used.
-
-        DEFAULT BND 
-            call foo            ; BND will be prefixed 
-            nobnd call foo      ; BND will NOT be prefixed
-
-       `DEFAULT NOBND' can disable `DEFAULT BND' and then `BND' prefix will
-       be added only when explicitly specified in code.
-
-       `DEFAULT BND' is expected to be the normal configuration for writing
-       MPX-enabled code.
-
-   7.3 `SECTION' or `SEGMENT': Changing and Defining Sections
-
-       The `SECTION' directive (`SEGMENT' is an exactly equivalent synonym)
-       changes which section of the output file the code you write will be
-       assembled into. In some object file formats, the number and names of
-       sections are fixed; in others, the user may make up as many as they
-       wish. Hence `SECTION' may sometimes give an error message, or may
-       define a new section, if you try to switch to a section that does
-       not (yet) exist.
-
-       The Unix object formats, and the `bin' object format (but see
-       section 8.1.3), all support the standardized section names `.text',
-       `.data' and `.bss' for the code, data and uninitialized-data
-       sections. The `obj' format, by contrast, does not recognize these
-       section names as being special, and indeed will strip off the
-       leading period of any section name that has one.
-
- 7.3.1 The `__?SECT?__' Macro
-
-       The `SECTION' directive is unusual in that its user-level form
-       functions differently from its primitive form. The primitive form,
-       `SECTION xyz', simply switches the current target section to the
-       one given. The user-level form, `SECTION xyz', however, first
-       defines the single-line macro `__?SECT?__' to be the primitive
-       `SECTION' directive which it is about to issue, and then issues
-       it. So the user-level directive
-
-               SECTION .text
-
-       expands to the two lines
-
-       %define __?SECT?__        SECTION .text 
-               SECTION .text
-
-       Users may find it useful to make use of this in their own macros.
-       For example, the `writefile' macro defined in section 4.5.3 can be
-       usefully rewritten in the following more sophisticated form:
-
-       %macro  writefile 2+ 
-       
-               section .data 
-       
-         %%str:        db      %2 
-         %%endstr: 
-       
-               __?SECT?__ 
-       
-               mov     dx,%%str 
-               mov     cx,%%endstr-%%str 
-               mov     bx,%1 
-               mov     ah,0x40 
-               int     0x21 
-       
-       %endmacro
-
-       This form of the macro, once passed a string to output, first
-       switches temporarily to the data section of the file, using the
-       primitive form of the `SECTION' directive so as not to modify
-       `__?SECT?__'. It then declares its string in the data section, and
-       then invokes `__?SECT?__' to switch back to _whichever_ section the
-       user was previously working in. It thus avoids the need, in the
-       previous version of the macro, to include a `JMP' instruction to
-       jump over the data, and also does not fail if, in a complicated
-       `OBJ' format module, the user could potentially be assembling the
-       code in any of several separate code sections.
-
-   7.4 `ABSOLUTE': Defining Absolute Labels
-
-       The `ABSOLUTE' directive can be thought of as an alternative form of
-       `SECTION': it causes the subsequent code to be directed at no
-       physical section, but at the hypothetical section starting at the
-       given absolute address. The only instructions you can use in this
-       mode are the `RESB' family.
-
-       `ABSOLUTE' is used as follows:
-
-       absolute 0x1A 
-       
-           kbuf_chr    resw    1 
-           kbuf_free   resw    1 
-           kbuf        resw    16
-
-       This example describes a section of the PC BIOS data area, at
-       segment address 0x40: the above code defines `kbuf_chr' to be 0x1A,
-       `kbuf_free' to be 0x1C, and `kbuf' to be 0x1E.
-
-       The user-level form of `ABSOLUTE', like that of `SECTION', redefines
-       the `__?SECT?__' macro when it is invoked.
-
-       `STRUC' and `ENDSTRUC' are defined as macros which use `ABSOLUTE'
-       (and also `__?SECT?__').
-
-       `ABSOLUTE' doesn't have to take an absolute constant as an argument:
-       it can take an expression (actually, a critical expression: see
-       section 3.8) and it can be a value in a segment. For example, a TSR
-       can re-use its setup code as run-time BSS like this:
-
-               org     100h               ; it's a .COM program 
-       
-               jmp     setup              ; setup code comes last 
-       
-               ; the resident part of the TSR goes here 
-       setup: 
-               ; now write the code that installs the TSR here 
-       
-       absolute setup 
-       
-       runtimevar1     resw    1 
-       runtimevar2     resd    20 
-       
-       tsr_end:
-
-       This defines some variables `on top of' the setup code, so that
-       after the setup has finished running, the space it took up can be
-       re-used as data storage for the running TSR. The symbol `tsr_end'
-       can be used to calculate the total size of the part of the TSR that
-       needs to be made resident.
-
-   7.5 `EXTERN': Importing Symbols from Other Modules
-
-       `EXTERN' is similar to the MASM directive `EXTRN' and the C keyword
-       `extern': it is used to declare a symbol which is not defined
-       anywhere in the module being assembled, but is assumed to be defined
-       in some other module and needs to be referred to by this one. Not
-       every object-file format can support external variables: the `bin'
-       format cannot.
-
-       The `EXTERN' directive takes as many arguments as you like. Each
-       argument is the name of a symbol:
-
-       extern  _printf 
-       extern  _sscanf,_fscanf
-
-       Some object-file formats provide extra features to the `EXTERN'
-       directive. In all cases, the extra features are used by suffixing a
-       colon to the symbol name followed by object-format specific text.
-       For example, the `obj' format allows you to declare that the default
-       segment base of an external should be the group `dgroup' by means of
-       the directive
-
-       extern  _variable:wrt dgroup
-
-       The primitive form of `EXTERN' differs from the user-level form only
-       in that it can take only one argument at a time: the support for
-       multiple arguments is implemented at the preprocessor level.
-
-       You can declare the same variable as `EXTERN' more than once: NASM
-       will quietly ignore the second and later redeclarations.
-
-       If a variable is declared both `GLOBAL' and `EXTERN', or if it is
-       declared as `EXTERN' and then defined, it will be treated as
-       `GLOBAL'. If a variable is declared both as `COMMON' and `EXTERN',
-       it will be treated as `COMMON'.
-
-   7.6 `REQUIRED': Unconditionally Importing Symbols from Other Modules
-
-       The `REQUIRED' keyword is similar to `EXTERN' one. The difference is
-       that the `EXTERN' keyword as of version 2.15 does not generate
-       unknown symbols as that prevents using common header files, as it
-       might cause the linker to pull in a bunch of unnecessary modules.
-
-       If the old behavior is required, use `REQUIRED' keyword instead.
-
-   7.7 `GLOBAL': Exporting Symbols to Other Modules
-
-       `GLOBAL' is the other end of `EXTERN': if one module declares a
-       symbol as `EXTERN' and refers to it, then in order to prevent linker
-       errors, some other module must actually _define_ the symbol and
-       declare it as `GLOBAL'. Some assemblers use the name `PUBLIC' for
-       this purpose.
-
-       `GLOBAL' uses the same syntax as `EXTERN', except that it must refer
-       to symbols which _are_ defined in the same module as the `GLOBAL'
-       directive. For example:
-
-       global _main 
-       _main: 
-               ; some code
-
-       `GLOBAL', like `EXTERN', allows object formats to define private
-       extensions by means of a colon. The ELF object format, for example,
-       lets you specify whether global data items are functions or data:
-
-       global  hashlookup:function, hashtable:data
-
-       Like `EXTERN', the primitive form of `GLOBAL' differs from the user-
-       level form only in that it can take only one argument at a time.
-
-   7.8 `COMMON': Defining Common Data Areas
-
-       The `COMMON' directive is used to declare _common variables_. A
-       common variable is much like a global variable declared in the
-       uninitialized data section, so that
-
-       common  intvar  4
-
-       is similar in function to
-
-       global  intvar 
-       section .bss 
-       
-       intvar  resd    1
-
-       The difference is that if more than one module defines the same
-       common variable, then at link time those variables will be _merged_,
-       and references to `intvar' in all modules will point at the same
-       piece of memory.
-
-       Like `GLOBAL' and `EXTERN', `COMMON' supports object-format specific
-       extensions. For example, the `obj' format allows common variables to
-       be NEAR or FAR, and the ELF format allows you to specify the
-       alignment requirements of a common variable:
-
-       common  commvar  4:near  ; works in OBJ 
-       common  intarray 100:4   ; works in ELF: 4 byte aligned
-
-       Once again, like `EXTERN' and `GLOBAL', the primitive form of
-       `COMMON' differs from the user-level form only in that it can take
-       only one argument at a time.
-
-   7.9 `STATIC': Local Symbols within Modules
-
-       Opposite to `EXTERN' and `GLOBAL', `STATIC' is local symbol, but
-       should be named according to the global mangling rules (named by
-       analogy with the C keyword `static' as applied to functions or
-       global variables).
-
-       static foo 
-       foo: 
-                ; codes
-
-       Unlike `GLOBAL', `STATIC' does not allow object formats to accept
-       private extensions mentioned in section 7.7.
-
-  7.10 `(G|L)PREFIX', `(G|L)POSTFIX': Mangling Symbols
-
-       `PREFIX', `GPREFIX', `LPREFIX', `POSTFIX', `GPOSTFIX', and
-       `LPOSTFIX' directives can prepend or append a string to a certain
-       type of symbols, normally to fit specific ABI conventions
-
-       (*) `PREFIX'|`GPREFIX': Prepend the argument to all `EXTERN'
-           `COMMON', `STATIC', and `GLOBAL' symbols.
-
-       (*) `LPREFIX': Prepend the argument to all other symbols such as
-           local labels and backend defined symbols.
-
-       (*) `POSTFIX'|`GPOSTFIX': Append the argument to all `EXTERN'
-           `COMMON', `STATIC', and `GLOBAL' symbols.
-
-       (*) `LPOSTFIX': Append the argument to all other symbols such as
-           local labels and backend defined symbols.
-
-       These a macros implemented as pragmas, and using `%pragma' syntax
-       can be restricted to specific backends (see section 4.12):
-
-       %pragma macho lprefix L_
-
-       Command line options are also available. See also section 2.1.28.
-
-       One example which supports many ABIs:
-
-       ; The most common conventions 
-       %pragma output gprefix _ 
-       %pragma output lprefix L_ 
-       ; ELF uses a different convention 
-       %pragma elf    gprefix                       ; empty 
-       %pragma elf    lprefix .L
-
-       Some toolchains is aware of a particular prefix for its own
-       optimization options, such as code elimination. For instance, Mach-O
-       backend has a linker that uses a simplistic naming scheme to chunk
-       up sections into a meta section. When the `subsections_via_symbols'
-       directive (section 8.8.4) is declared, each symbol is the start of a
-       separate block. The meta section is, then, defined to include
-       sections before the one that starts with a 'L'. `LPREFIX' is useful
-       here to mark all local symbols with the 'L' prefix to be excluded to
-       the meta section. It converts local symbols compatible with the
-       particular toolchain. Note that local symbols declared with `STATIC'
-       (section 7.9) are excluded from the symbol mangling and also not
-       marked as global.
-
-  7.11 `CPU': Defining CPU Dependencies
-
-       The `CPU' directive restricts assembly to those instructions which
-       are available on the specified CPU. At the moment, it is primarily
-       used to enforce unavailable _encodings_ of instructions, such as 5-
-       byte jumps on the 8080.
-
-       (If someone would volunteer to work through the database and add
-       proper annotations to each instruction, this could be greatly
-       improved. Please contact the developers to volunteer, see
-       {contact}.)
-
-       Current CPU keywords are:
-
-       (*) `CPU 8086' - Assemble only 8086 instruction set
-
-       (*) `CPU 186' - Assemble instructions up to the 80186 instruction
-           set
-
-       (*) `CPU 286' - Assemble instructions up to the 286 instruction set
-
-       (*) `CPU 386' - Assemble instructions up to the 386 instruction set
-
-       (*) `CPU 486' - 486 instruction set
-
-       (*) `CPU 586' - Pentium instruction set
-
-       (*) `CPU PENTIUM' - Same as 586
-
-       (*) `CPU 686' - P6 instruction set
-
-       (*) `CPU PPRO' - Same as 686
-
-       (*) `CPU P2' - Same as 686
-
-       (*) `CPU P3' - Pentium III (Katmai) instruction sets
-
-       (*) `CPU KATMAI' - Same as P3
-
-       (*) `CPU P4' - Pentium 4 (Willamette) instruction set
-
-       (*) `CPU WILLAMETTE' - Same as P4
-
-       (*) `CPU PRESCOTT' - Prescott instruction set
-
-       (*) `CPU X64' - x86-64 (x64/AMD64/Intel 64) instruction set
-
-       (*) `CPU IA64' - IA64 CPU (in x86 mode) instruction set
-
-       (*) `CPU DEFAULT' - All available instructions
-
-       (*) `CPU ALL' - All available instructions _and flags_
-
-       All options are case insensitive.
-
-       In addition, optional flags can be specified to modify the
-       instruction selections. These can be combined with a CPU declaration
-       or specified alone. They can be prefixed by `+' (add flag, default),
-       `-' (remove flag) or `*' (set flag to default); these prefixes are
-       "sticky", so:
-
-            cpu -foo,bar
-
-       means remove both the `foo' and `bar' options.
-
-       If prefixed with `no', it inverts the meaning of the flag, but this
-       is not sticky, so:
-
-            cpu nofoo,bar
-
-       means remove the `foo' flag but add the `bar' flag.
-
-       Currently available flags are:
-
-       (*) `EVEX' - Enable generation of EVEX (AVX-512) encoded
-           instructions without an explicit `{evex}' prefix. Default on.
-
-       (*) `VEX' - Enable generation of VEX (AVX) or XOP encoded
-           instructions without an explict `{vex}' prefix. Default on.
-
-       (*) `LATEVEX' - Enable generation of VEX (AVX) encoding of
-           instructions where the VEX instructions forms were introduced
-           _after_ the corresponding EVEX (AVX-512) instruction forms
-           without requiring an explicit `{vex}' prefix. This is implicit
-           if the `EVEX' flag is disabled and the `VEX' flag is enabled.
-           Default off.
-
-  7.12 `FLOAT': Handling of floating-point constants
-
-       By default, floating-point constants are rounded to nearest, and
-       IEEE denormals are supported. The following options can be set to
-       alter this behaviour:
-
-       (*) `FLOAT DAZ' - Flush denormals to zero
-
-       (*) `FLOAT NODAZ' - Do not flush denormals to zero (default)
-
-       (*) `FLOAT NEAR' - Round to nearest (default)
-
-       (*) `FLOAT UP' - Round up (toward +Infinity)
-
-       (*) `FLOAT DOWN' - Round down (toward -Infinity)
-
-       (*) `FLOAT ZERO' - Round toward zero
-
-       (*) `FLOAT DEFAULT' - Restore default settings
-
-       The standard macros `__?FLOAT_DAZ?__', `__?FLOAT_ROUND?__', and
-       `__?FLOAT?__' contain the current state, as long as the programmer
-       has avoided the use of the brackeded primitive form, (`FLOAT').
-
-       `__?FLOAT?__' contains the full set of floating-point settings; this
-       value can be saved away and invoked later to restore the setting.
-
-  7.13 `WARNING': Enable or disable warnings
-
-       The `WARNING' directive can be used to enable or disable classes
-       of warnings in the same way as the `-w' option, see appendix A for
-       more details about warning classes.
-
-       (*) `warning +'_warning-class_`' enables warnings for
-           _warning-class_.
-
-       (*) `warning -'_warning-class_`' disables warnings for
-           _warning-class_.
-
-       (*) `warning *'_warning-class_`' restores _warning-class_ to the
-           original value, either the default value or as specified on the
-           command line.
-
-       (*) `warning push' saves the current warning state on a stack.
-
-       (*) `warning pop' restores the current warning state from the
-           stack.
-
-       The `WARNING' directive also accepts the `all', `error' and
-       `error='_warning-class_ specifiers, see section 2.1.26.
-
-       No "user form" (without the brackets) currently exists.
-
-Chapter 8: Output Formats
--------------------------
-
-       NASM is a portable assembler, designed to be able to compile on any
-       ANSI C-supporting platform and produce output to run on a variety of
-       Intel x86 operating systems. For this reason, it has a large number
-       of available output formats, selected using the `-f' option on the
-       NASM command line. Each of these formats, along with its extensions
-       to the base NASM syntax, is detailed in this chapter.
-
-       As stated in section 2.1.1, NASM chooses a default name for your
-       output file based on the input file name and the chosen output
-       format. This will be generated by removing the extension (`.asm',
-       `.s', or whatever you like to use) from the input file name, and
-       substituting an extension defined by the output format. The
-       extensions are given with each format below.
-
-   8.1 `bin': Flat-Form Binary Output
-
-       The `bin' format does not produce object files: it generates nothing
-       in the output file except the code you wrote. Such `pure binary'
-       files are used by MS-DOS: `.COM' executables and `.SYS' device
-       drivers are pure binary files. Pure binary output is also useful for
-       operating system and boot loader development.
-
-       The `bin' format supports multiple section names. For details of how
-       NASM handles sections in the `bin' format, see section 8.1.3.
-
-       Using the `bin' format puts NASM by default into 16-bit mode (see
-       section 7.1). In order to use `bin' to write 32-bit or 64-bit code,
-       such as an OS kernel, you need to explicitly issue the `BITS 32' or
-       `BITS 64' directive.
-
-       `bin' has no default output file name extension: instead, it leaves
-       your file name as it is once the original extension has been
-       removed. Thus, the default is for NASM to assemble `binprog.asm'
-       into a binary file called `binprog'.
-
- 8.1.1 `ORG': Binary File Program Origin
-
-       The `bin' format provides an additional directive to the list given
-       in chapter 7: `ORG'. The function of the `ORG' directive is to
-       specify the origin address which NASM will assume the program begins
-       at when it is loaded into memory.
-
-       For example, the following code will generate the longword
-       `0x00000104':
-
-               org     0x100 
-               dd      label 
-       label:
-
-       Unlike the `ORG' directive provided by MASM-compatible assemblers,
-       which allows you to jump around in the object file and overwrite
-       code you have already generated, NASM's `ORG' does exactly what the
-       directive says: _origin_. Its sole function is to specify one offset
-       which is added to all internal address references within the
-       section; it does not permit any of the trickery that MASM's version
-       does. See section 13.1.3 for further comments.
-
- 8.1.2 `bin' Extensions to the `SECTION' Directive, `bin' extensions to}
-
-       The `bin' output format extends the `SECTION' (or `SEGMENT')
-       directive to allow you to specify the alignment requirements of
-       segments. This is done by appending the `ALIGN' qualifier to the end
-       of the section-definition line. For example,
-
-       section .data   align=16
-
-       switches to the section `.data' and also specifies that it must be
-       aligned on a 16-byte boundary.
-
-       The parameter to `ALIGN' specifies how many low bits of the section
-       start address must be forced to zero. The alignment value given may
-       be any power of two.
-
- 8.1.3 Multisection Support for the `bin' Format
-
-       The `bin' format allows the use of multiple sections, of arbitrary
-       names, besides the "known" `.text', `.data', and `.bss' names.
-
-       (*) Sections may be designated `progbits' or `nobits'. Default is
-           `progbits' (except `.bss', which defaults to `nobits', of
-           course).
-
-       (*) Sections can be aligned at a specified boundary following the
-           previous section with `align=', or at an arbitrary byte-granular
-           position with `start='.
-
-       (*) Sections can be given a virtual start address, which will be
-           used for the calculation of all memory references within that
-           section with `vstart='.
-
-       (*) Sections can be ordered using `follows='`<section>' or
-           `vfollows='`<section>' as an alternative to specifying an
-           explicit start address.
-
-       (*) Arguments to `org', `start', `vstart', and `align=' are critical
-           expressions. See section 3.8. E.g. `align=(1 << ALIGN_SHIFT)' -
-           `ALIGN_SHIFT' must be defined before it is used here.
-
-       (*) Any code which comes before an explicit `SECTION' directive is
-           directed by default into the `.text' section.
-
-       (*) If an `ORG' statement is not given, `ORG 0' is used by default.
-
-       (*) The `.bss' section will be placed after the last `progbits'
-           section, unless `start=', `vstart=', `follows=', or `vfollows='
-           has been specified.
-
-       (*) All sections are aligned on dword boundaries, unless a different
-           alignment has been specified.
-
-       (*) Sections may not overlap.
-
-       (*) NASM creates the `section.<secname>.start' for each section,
-           which may be used in your code.
-
- 8.1.4 Map Files
-
-       Map files can be generated in `-f bin' format by means of the
-       `map' option. Map types of `all' (default), `brief', `sections',
-       `segments', or `symbols' may be specified. Output may be directed to
-       `stdout' (default), `stderr', or a specified file. E.g.
-       `map symbols myfile.map'. No "user form" exists, the square
-       brackets must be used.
-
-   8.2 `ith': Intel Hex Output
-
-       The `ith' file format produces Intel hex-format files. Just as the
-       `bin' format, this is a flat memory image format with no support for
-       relocation or linking. It is usually used with ROM programmers and
-       similar utilities.
-
-       All extensions supported by the `bin' file format is also supported
-       by the `ith' file format.
-
-       `ith' provides a default output file-name extension of `.ith'.
-
-   8.3 `srec': Motorola S-Records Output
-
-       The `srec' file format produces Motorola S-records files. Just as
-       the `bin' format, this is a flat memory image format with no support
-       for relocation or linking. It is usually used with ROM programmers
-       and similar utilities.
-
-       All extensions supported by the `bin' file format is also supported
-       by the `srec' file format.
-
-       `srec' provides a default output file-name extension of `.srec'.
-
-   8.4 `obj': Microsoft OMF Object Files
-
-       The `obj' file format (NASM calls it `obj' rather than `omf' for
-       historical reasons) is the one produced by MASM and TASM, which is
-       typically fed to 16-bit DOS linkers to produce `.EXE' files. It is
-       also the format used by OS/2.
-
-       `obj' provides a default output file-name extension of `.obj'.
-
-       `obj' is not exclusively a 16-bit format, though: NASM has full
-       support for the 32-bit extensions to the format. In particular, 32-
-       bit `obj' format files are used by Borland's Win32 compilers,
-       instead of using Microsoft's newer `win32' object file format.
-
-       The `obj' format does not define any special segment names: you can
-       call your segments anything you like. Typical names for segments in
-       `obj' format files are `CODE', `DATA' and `BSS'.
-
-       If your source file contains code before specifying an explicit
-       `SEGMENT' directive, then NASM will invent its own segment called
-       `__NASMDEFSEG' for you.
-
-       When you define a segment in an `obj' file, NASM defines the segment
-       name as a symbol as well, so that you can access the segment address
-       of the segment. So, for example:
-
-       segment data 
-       
-       dvar:   dw      1234 
-       
-       segment code 
-       
-       function: 
-               mov     ax,data         ; get segment address of data 
-               mov     ds,ax           ; and move it into DS 
-               inc     word dvar     ; now this reference will work 
-               ret
-
-       The `obj' format also enables the use of the `SEG' and `WRT'
-       operators, so that you can write code which does things like
-
-       extern  foo 
-       
-             mov   ax,seg foo            ; get preferred segment of foo 
-             mov   ds,ax 
-             mov   ax,data               ; a different segment 
-             mov   es,ax 
-             mov   ax,ds:foo           ; this accesses `foo' 
-             mov   es:foo wrt data,bx  ; so does this
-
- 8.4.1 `obj' Extensions to the `SEGMENT' Directive
-
-       The `obj' output format extends the `SEGMENT' (or `SECTION')
-       directive to allow you to specify various properties of the segment
-       you are defining. This is done by appending extra qualifiers to the
-       end of the segment-definition line. For example,
-
-       segment code private align=16
-
-       defines the segment `code', but also declares it to be a private
-       segment, and requires that the portion of it described in this code
-       module must be aligned on a 16-byte boundary.
-
-       The available qualifiers are:
-
-       (*) `PRIVATE', `PUBLIC', `COMMON' and `STACK' specify the
-           combination characteristics of the segment. `PRIVATE' segments
-           do not get combined with any others by the linker; `PUBLIC' and
-           `STACK' segments get concatenated together at link time; and
-           `COMMON' segments all get overlaid on top of each other rather
-           than stuck end-to-end.
-
-       (*) `ALIGN' is used, as shown above, to specify how many low bits of
-           the segment start address must be forced to zero. The alignment
-           value given may be any power of two from 1 to 4096; in reality,
-           the only values supported are 1, 2, 4, 16, 256 and 4096, so if 8
-           is specified it will be rounded up to 16, and 32, 64 and 128
-           will all be rounded up to 256, and so on. Note that alignment to
-           4096-byte boundaries is a PharLap extension to the format and
-           may not be supported by all linkers.
-
-       (*) `CLASS' can be used to specify the segment class; this feature
-           indicates to the linker that segments of the same class should
-           be placed near each other in the output file. The class name can
-           be any word, e.g. `CLASS=CODE'.
-
-       (*) `OVERLAY', like `CLASS', is specified with an arbitrary word as
-           an argument, and provides overlay information to an overlay-
-           capable linker.
-
-       (*) Segments can be declared as `USE16' or `USE32', which has the
-           effect of recording the choice in the object file and also
-           ensuring that NASM's default assembly mode when assembling in
-           that segment is 16-bit or 32-bit respectively.
-
-       (*) When writing OS/2 object files, you should declare 32-bit
-           segments as `FLAT', which causes the default segment base for
-           anything in the segment to be the special group `FLAT', and also
-           defines the group if it is not already defined.
-
-       (*) The `obj' file format also allows segments to be declared as
-           having a pre-defined absolute segment address, although no
-           linkers are currently known to make sensible use of this
-           feature; nevertheless, NASM allows you to declare a segment such
-           as `SEGMENT SCREEN ABSOLUTE=0xB800' if you need to. The
-           `ABSOLUTE' and `ALIGN' keywords are mutually exclusive.
-
-       NASM's default segment attributes are `PUBLIC', `ALIGN=1', no class,
-       no overlay, and `USE16'.
-
- 8.4.2 `GROUP': Defining Groups of Segments
-
-       The `obj' format also allows segments to be grouped, so that a
-       single segment register can be used to refer to all the segments in
-       a group. NASM therefore supplies the `GROUP' directive, whereby you
-       can code
-
-       segment data 
-       
-               ; some data 
-       
-       segment bss 
-       
-               ; some uninitialized data 
-       
-       group dgroup data bss
-
-       which will define a group called `dgroup' to contain the segments
-       `data' and `bss'. Like `SEGMENT', `GROUP' causes the group name to
-       be defined as a symbol, so that you can refer to a variable `var' in
-       the `data' segment as `var wrt data' or as `var wrt dgroup',
-       depending on which segment value is currently in your segment
-       register.
-
-       If you just refer to `var', however, and `var' is declared in a
-       segment which is part of a group, then NASM will default to giving
-       you the offset of `var' from the beginning of the _group_, not the
-       _segment_. Therefore `SEG var', also, will return the group base
-       rather than the segment base.
-
-       NASM will allow a segment to be part of more than one group, but
-       will generate a warning if you do this. Variables declared in a
-       segment which is part of more than one group will default to being
-       relative to the first group that was defined to contain the segment.
-
-       A group does not have to contain any segments; you can still make
-       `WRT' references to a group which does not contain the variable you
-       are referring to. OS/2, for example, defines the special group
-       `FLAT' with no segments in it.
-
- 8.4.3 `UPPERCASE': Disabling Case Sensitivity in Output
-
-       Although NASM itself is case sensitive, some OMF linkers are not;
-       therefore it can be useful for NASM to output single-case object
-       files. The `UPPERCASE' format-specific directive causes all segment,
-       group and symbol names that are written to the object file to be
-       forced to upper case just before being written. Within a source
-       file, NASM is still case-sensitive; but the object file can be
-       written entirely in upper case if desired.
-
-       `UPPERCASE' is used alone on a line; it requires no parameters.
-
- 8.4.4 `IMPORT': Importing DLL Symbols
-
-       The `IMPORT' format-specific directive defines a symbol to be
-       imported from a DLL, for use if you are writing a DLL's import
-       library in NASM. You still need to declare the symbol as `EXTERN' as
-       well as using the `IMPORT' directive.
-
-       The `IMPORT' directive takes two required parameters, separated by
-       white space, which are (respectively) the name of the symbol you
-       wish to import and the name of the library you wish to import it
-       from. For example:
-
-           import  WSAStartup wsock32.dll
-
-       A third optional parameter gives the name by which the symbol is
-       known in the library you are importing it from, in case this is not
-       the same as the name you wish the symbol to be known by to your code
-       once you have imported it. For example:
-
-           import  asyncsel wsock32.dll WSAAsyncSelect
-
- 8.4.5 `EXPORT': Exporting DLL Symbols
-
-       The `EXPORT' format-specific directive defines a global symbol to be
-       exported as a DLL symbol, for use if you are writing a DLL in NASM.
-       You still need to declare the symbol as `GLOBAL' as well as using
-       the `EXPORT' directive.
-
-       `EXPORT' takes one required parameter, which is the name of the
-       symbol you wish to export, as it was defined in your source file. An
-       optional second parameter (separated by white space from the first)
-       gives the _external_ name of the symbol: the name by which you wish
-       the symbol to be known to programs using the DLL. If this name is
-       the same as the internal name, you may leave the second parameter
-       off.
-
-       Further parameters can be given to define attributes of the exported
-       symbol. These parameters, like the second, are separated by white
-       space. If further parameters are given, the external name must also
-       be specified, even if it is the same as the internal name. The
-       available attributes are:
-
-       (*) `resident' indicates that the exported name is to be kept
-           resident by the system loader. This is an optimization for
-           frequently used symbols imported by name.
-
-       (*) `nodata' indicates that the exported symbol is a function which
-           does not make use of any initialized data.
-
-       (*) `parm=NNN', where `NNN' is an integer, sets the number of
-           parameter words for the case in which the symbol is a call gate
-           between 32-bit and 16-bit segments.
-
-       (*) An attribute which is just a number indicates that the symbol
-           should be exported with an identifying number (ordinal), and
-           gives the desired number.
-
-       For example:
-
-           export  myfunc 
-           export  myfunc TheRealMoreFormalLookingFunctionName 
-           export  myfunc myfunc 1234  ; export by ordinal 
-           export  myfunc myfunc resident parm=23 nodata
-
- 8.4.6 `..start': Defining the Program Entry Point
-
-       `OMF' linkers require exactly one of the object files being linked
-       to define the program entry point, where execution will begin when
-       the program is run. If the object file that defines the entry point
-       is assembled using NASM, you specify the entry point by declaring
-       the special symbol `..start' at the point where you wish execution
-       to begin.
-
- 8.4.7 `obj' Extensions to the `EXTERN' Directive
-
-       If you declare an external symbol with the directive
-
-           extern  foo
-
-       then references such as `mov ax,foo' will give you the offset of
-       `foo' from its preferred segment base (as specified in whichever
-       module `foo' is actually defined in). So to access the contents of
-       `foo' you will usually need to do something like
-
-               mov     ax,seg foo      ; get preferred segment base 
-               mov     es,ax           ; move it into ES 
-               mov     ax,es:foo     ; and use offset `foo' from it
-
-       This is a little unwieldy, particularly if you know that an external
-       is going to be accessible from a given segment or group, say
-       `dgroup'. So if `DS' already contained `dgroup', you could simply
-       code
-
-               mov     ax,foo wrt dgroup
-
-       However, having to type this every time you want to access `foo' can
-       be a pain; so NASM allows you to declare `foo' in the alternative
-       form
-
-           extern  foo:wrt dgroup
-
-       This form causes NASM to pretend that the preferred segment base of
-       `foo' is in fact `dgroup'; so the expression `seg foo' will now
-       return `dgroup', and the expression `foo' is equivalent to
-       `foo wrt dgroup'.
-
-       This default-`WRT' mechanism can be used to make externals appear to
-       be relative to any group or segment in your program. It can also be
-       applied to common variables: see section 8.4.8.
-
- 8.4.8 `obj' Extensions to the `COMMON' Directive
-
-       The `obj' format allows common variables to be either near or far;
-       NASM allows you to specify which your variables should be by the use
-       of the syntax
-
-       common  nearvar 2:near   ; `nearvar' is a near common 
-       common  farvar  10:far   ; and `farvar' is far
-
-       Far common variables may be greater in size than 64Kb, and so the
-       OMF specification says that they are declared as a number of
-       _elements_ of a given size. So a 10-byte far common variable could
-       be declared as ten one-byte elements, five two-byte elements, two
-       five-byte elements or one ten-byte element.
-
-       Some `OMF' linkers require the element size, as well as the variable
-       size, to match when resolving common variables declared in more than
-       one module. Therefore NASM must allow you to specify the element
-       size on your far common variables. This is done by the following
-       syntax:
-
-       common  c_5by2  10:far 5        ; two five-byte elements 
-       common  c_2by5  10:far 2        ; five two-byte elements
-
-       If no element size is specified, the default is 1. Also, the `FAR'
-       keyword is not required when an element size is specified, since
-       only far commons may have element sizes at all. So the above
-       declarations could equivalently be
-
-       common  c_5by2  10:5            ; two five-byte elements 
-       common  c_2by5  10:2            ; five two-byte elements
-
-       In addition to these extensions, the `COMMON' directive in `obj'
-       also supports default-`WRT' specification like `EXTERN' does
-       (explained in section 8.4.7). So you can also declare things like
-
-       common  foo     10:wrt dgroup 
-       common  bar     16:far 2:wrt data 
-       common  baz     24:wrt data:6
-
- 8.4.9 Embedded File Dependency Information
-
-       Since NASM 2.13.02, `obj' files contain embedded dependency file
-       information. To suppress the generation of dependencies, use
-
-       %pragma obj nodepend
-
-   8.5 `win32': Microsoft Win32 Object Files
-
-       The `win32' output format generates Microsoft Win32 object files,
-       suitable for passing to Microsoft linkers such as Visual C++. Note
-       that Borland Win32 compilers do not use this format, but use `obj'
-       instead (see section 8.4).
-
-       `win32' provides a default output file-name extension of `.obj'.
-
-       Note that although Microsoft say that Win32 object files follow the
-       `COFF' (Common Object File Format) standard, the object files
-       produced by Microsoft Win32 compilers are not compatible with COFF
-       linkers such as DJGPP's, and vice versa. This is due to a difference
-       of opinion over the precise semantics of PC-relative relocations. To
-       produce COFF files suitable for DJGPP, use NASM's `coff' output
-       format; conversely, the `coff' format does not produce object files
-       that Win32 linkers can generate correct output from.
-
- 8.5.1 `win32' Extensions to the `SECTION' Directive
-
-       Like the `obj' format, `win32' allows you to specify additional
-       information on the `SECTION' directive line, to control the type and
-       properties of sections you declare. Section types and properties are
-       generated automatically by NASM for the standard section names
-       `.text', `.data' and `.bss', but may still be overridden by these
-       qualifiers.
-
-       The available qualifiers are:
-
-       (*) `code', or equivalently `text', defines the section to be a code
-           section. This marks the section as readable and executable, but
-           not writable, and also indicates to the linker that the type of
-           the section is code.
-
-       (*) `data' and `bss' define the section to be a data section,
-           analogously to `code'. Data sections are marked as readable and
-           writable, but not executable. `data' declares an initialized
-           data section, whereas `bss' declares an uninitialized data
-           section.
-
-       (*) `rdata' declares an initialized data section that is readable
-           but not writable. Microsoft compilers use this section to place
-           constants in it.
-
-       (*) `info' defines the section to be an informational section, which
-           is not included in the executable file by the linker, but may
-           (for example) pass information _to_ the linker. For example,
-           declaring an `info'-type section called `.drectve' causes the
-           linker to interpret the contents of the section as command-line
-           options.
-
-       (*) `align=', used with a trailing number as in `obj', gives the
-           alignment requirements of the section. The maximum you may
-           specify is 64: the Win32 object file format contains no means to
-           request a greater section alignment than this. If alignment is
-           not explicitly specified, the defaults are 16-byte alignment for
-           code sections, 8-byte alignment for rdata sections and 4-byte
-           alignment for data (and BSS) sections. Informational sections
-           get a default alignment of 1 byte (no alignment), though the
-           value does not matter.
-
-       (*) `comdat=', followed by a number ("selection"), colon (acting as
-           a separator) and a name, marks the section as a "COMDAT
-           section". It allows Microsoft linkers to perform function-level
-           linking, to deal with multiply defined symbols, to eliminate
-           dead code/data. The "selection" number should be one of the
-           `IMAGE_COMDAT_SELECT_*' constants from
-           `COFF format specification'; this value controls if the linker
-           allows multiply defined symbols and how it handles them. The
-           name is the "COMDAT symbol" - basically a new name for the
-           section. So even though you have one section given by the main
-           name (e.g. `.text'), it can actually consist of hundreds of
-           COMDAT sections having their own name (and alignment). When the
-           "selection" is IMAGE_COMDAT_SELECT_ASSOCIATIVE (5), the
-           following name is the "COMDAT symbol" of the associated COMDAT
-           section; this way you can link a piece of code or data only when
-           another piece of code or data gets actually linked.
-
-           So, when linking a NASM-compiled file with some C code, the
-           source may be structured as follows. Note that the default
-           `.text' section in handled in a special way and it doesn't work
-           well with `comdat'; you may want to append a `$' character and
-           an arbitrary suffix to the section name. It will get linked into
-           the `.text' section anyway - see the info on `Grouped Sections'.
-
-          section .text$1 align=16 comdat=1:FirstFnc 
-             ...                                        ; Code linked only if referenced from C 
-       
-          section .text$1 align=16 comdat=1:SecondFnc 
-             ...                                        ; Code linked only if referenced from C 
-       
-          section .rdata align=32 comdat=5:FirstFnc 
-             ...                                        ; Data linked only if the related code (FirstFnc) is linked 
-
-       The defaults assumed by NASM if you do not specify the above
-       qualifiers are:
-
-       section .text    code  align=16 
-       section .data    data  align=4 
-       section .rdata   rdata align=8 
-       section .bss     bss   align=4
-
-       The `win64' format also adds:
-
-       section .pdata   rdata align=4 
-       section .xdata   rdata align=8
-
-       Any other section name is treated by default like `.text'.
-
- 8.5.2 `win32': Safe Structured Exception Handling
-
-       Among other improvements in Windows XP SP2 and Windows Server 2003
-       Microsoft has introduced concept of "safe structured exception
-       handling." General idea is to collect handlers' entry points in
-       designated read-only table and have alleged entry point verified
-       against this table prior exception control is passed to the handler.
-       In order for an executable module to be equipped with such "safe
-       exception handler table," all object modules on linker command line
-       has to comply with certain criteria. If one single module among them
-       does not, then the table in question is omitted and above mentioned
-       run-time checks will not be performed for application in question.
-       Table omission is by default silent and therefore can be easily
-       overlooked. One can instruct linker to refuse to produce binary
-       without such table by passing `/safeseh' command line option.
-
-       Without regard to this run-time check merits it's natural to expect
-       NASM to be capable of generating modules suitable for `/safeseh'
-       linking. From developer's viewpoint the problem is two-fold:
-
-       (*) how to adapt modules not deploying exception handlers of their
-           own;
-
-       (*) how to adapt/develop modules utilizing custom exception
-           handling;
-
-       Former can be easily achieved with any NASM version by adding
-       following line to source code:
-
-       $@feat.00 equ 1
-
-       As of version 2.03 NASM adds this absolute symbol automatically. If
-       it's not already present to be precise. I.e. if for whatever reason
-       developer would choose to assign another value in source file, it
-       would still be perfectly possible.
-
-       Registering custom exception handler on the other hand requires
-       certain "magic." As of version 2.03 additional directive is
-       implemented, `safeseh', which instructs the assembler to produce
-       appropriately formatted input data for above mentioned "safe
-       exception handler table." Its typical use would be:
-
-       section .text 
-       extern  _MessageBoxA@16 
-       %if     __?NASM_VERSION_ID?__ >= 0x02030000 
-       safeseh handler         ; register handler as "safe handler" 
-       %endif 
-       handler: 
-               push    DWORD 1 ; MB_OKCANCEL 
-               push    DWORD caption 
-               push    DWORD text 
-               push    DWORD 0 
-               call    _MessageBoxA@16 
-               sub     eax,1   ; incidentally suits as return value 
-                               ; for exception handler 
-               ret 
-       global  _main 
-       _main: 
-               push    DWORD handler 
-               push    DWORD fs:0 
-               mov     DWORD fs:0,esp ; engage exception handler 
-               xor     eax,eax 
-               mov     eax,DWORDeax   ; cause exception 
-               pop     DWORD fs:0     ; disengage exception handler 
-               add     esp,4 
-               ret 
-       text:   db      'OK to rethrow, CANCEL to generate core dump',0 
-       caption:db      'SEGV',0 
-       
-       section .drectve info 
-               db      '/defaultlib:user32.lib /defaultlib:msvcrt.lib '
-
-       As you might imagine, it's perfectly possible to produce .exe binary
-       with "safe exception handler table" and yet engage unregistered
-       exception handler. Indeed, handler is engaged by simply manipulating
-       `fs:0' location at run-time, something linker has no power over,
-       run-time that is. It should be explicitly mentioned that such
-       failure to register handler's entry point with `safeseh' directive
-       has undesired side effect at run-time. If exception is raised and
-       unregistered handler is to be executed, the application is abruptly
-       terminated without any notification whatsoever. One can argue that
-       system could at least have logged some kind "non-safe exception
-       handler in x.exe at address n" message in event log, but no,
-       literally no notification is provided and user is left with no clue
-       on what caused application failure.
-
-       Finally, all mentions of linker in this paragraph refer to Microsoft
-       linker version 7.x and later. Presence of `@feat.00' symbol and
-       input data for "safe exception handler table" causes no backward
-       incompatibilities and "safeseh" modules generated by NASM 2.03 and
-       later can still be linked by earlier versions or non-Microsoft
-       linkers.
-
- 8.5.3 Debugging formats for Windows 
-
-       The `win32' and `win64' formats support the Microsoft CodeView
-       debugging format. Currently CodeView version 8 format is supported
-       (`cv8'), but newer versions of the CodeView debugger should be able
-       to handle this format as well.
-
-   8.6 `win64': Microsoft Win64 Object Files
-
-       The `win64' output format generates Microsoft Win64 object files,
-       which is nearly 100% identical to the `win32' object format (section
-       8.5) with the exception that it is meant to target 64-bit code and
-       the x86-64 platform altogether. This object file is used exactly the
-       same as the `win32' object format (section 8.5), in NASM, with
-       regard to this exception.
-
- 8.6.1 `win64': Writing Position-Independent Code
-
-       While `REL' takes good care of RIP-relative addressing, there is one
-       aspect that is easy to overlook for a Win64 programmer: indirect
-       references. Consider a switch dispatch table:
-
-               jmp     qword dsptch+rax*8 
-               ... 
-       dsptch: dq      case0 
-               dq      case1 
-               ...
-
-       Even a novice Win64 assembler programmer will soon realize that the
-       code is not 64-bit savvy. Most notably linker will refuse to link it
-       with
-
-       'ADDR32' relocation to '.text' invalid without /LARGEADDRESSAWARE:NO
-
-       So she will have to split jmp instruction as following:
-
-               lea     rbx,rel dsptch 
-               jmp     qword rbx+rax*8
-
-       What happens behind the scene is that effective address in `lea' is
-       encoded relative to instruction pointer, or in perfectly position-
-       independent manner. But this is only part of the problem! Trouble is
-       that in .dll context `caseN' relocations will make their way to the
-       final module and might have to be adjusted at .dll load time. To be
-       specific when it can't be loaded at preferred address. And when this
-       occurs, pages with such relocations will be rendered private to
-       current process, which kind of undermines the idea of sharing .dll.
-       But no worry, it's trivial to fix:
-
-               lea     rbx,rel dsptch 
-               add     rbx,rbx+rax*8 
-               jmp     rbx 
-               ... 
-       dsptch: dq      case0-dsptch 
-               dq      case1-dsptch 
-               ...
-
-       NASM version 2.03 and later provides another alternative,
-       `wrt ..imagebase' operator, which returns offset from base address
-       of the current image, be it .exe or .dll module, therefore the name.
-       For those acquainted with PE-COFF format base address denotes start
-       of `IMAGE_DOS_HEADER' structure. Here is how to implement switch
-       with these image-relative references:
-
-               lea     rbx,rel dsptch 
-               mov     eax,rbx+rax*4 
-               sub     rbx,dsptch wrt ..imagebase 
-               add     rbx,rax 
-               jmp     rbx 
-               ... 
-       dsptch: dd      case0 wrt ..imagebase 
-               dd      case1 wrt ..imagebase
-
-       One can argue that the operator is redundant. Indeed, snippet before
-       last works just fine with any NASM version and is not even Windows
-       specific... The real reason for implementing `wrt ..imagebase' will
-       become apparent in next paragraph.
-
-       It should be noted that `wrt ..imagebase' is defined as 32-bit
-       operand only:
-
-               dd      label wrt ..imagebase           ; ok 
-               dq      label wrt ..imagebase           ; bad 
-               mov     eax,label wrt ..imagebase       ; ok 
-               mov     rax,label wrt ..imagebase       ; bad
-
- 8.6.2 `win64': Structured Exception Handling
-
-       Structured exception handing in Win64 is completely different matter
-       from Win32. Upon exception program counter value is noted, and
-       linker-generated table comprising start and end addresses of all the
-       functions in given executable module is traversed and compared to
-       the saved program counter. Thus so called `UNWIND_INFO' structure is
-       identified. If it's not found, then offending subroutine is assumed
-       to be "leaf" and just mentioned lookup procedure is attempted for
-       its caller. In Win64 leaf function is such function that does not
-       call any other function _nor_ modifies any Win64 non-volatile
-       registers, including stack pointer. The latter ensures that it's
-       possible to identify leaf function's caller by simply pulling the
-       value from the top of the stack.
-
-       While majority of subroutines written in assembler are not calling
-       any other function, requirement for non-volatile registers'
-       immutability leaves developer with not more than 7 registers and no
-       stack frame, which is not necessarily what she counted with.
-       Customarily one would meet the requirement by saving non-volatile
-       registers on stack and restoring them upon return, so what can go
-       wrong? If and only if an exception is raised at run-time and no
-       `UNWIND_INFO' structure is associated with such "leaf" function, the
-       stack unwind procedure will expect to find caller's return address
-       on the top of stack immediately followed by its frame. Given that
-       developer pushed caller's non-volatile registers on stack, would the
-       value on top point at some code segment or even addressable space?
-       Well, developer can attempt copying caller's return address to the
-       top of stack and this would actually work in some very specific
-       circumstances. But unless developer can guarantee that these
-       circumstances are always met, it's more appropriate to assume worst
-       case scenario, i.e. stack unwind procedure going berserk. Relevant
-       question is what happens then? Application is abruptly terminated
-       without any notification whatsoever. Just like in Win32 case, one
-       can argue that system could at least have logged "unwind procedure
-       went berserk in x.exe at address n" in event log, but no, no trace
-       of failure is left.
-
-       Now, when we understand significance of the `UNWIND_INFO' structure,
-       let's discuss what's in it and/or how it's processed. First of all
-       it is checked for presence of reference to custom language-specific
-       exception handler. If there is one, then it's invoked. Depending on
-       the return value, execution flow is resumed (exception is said to be
-       "handled"), _or_ rest of `UNWIND_INFO' structure is processed as
-       following. Beside optional reference to custom handler, it carries
-       information about current callee's stack frame and where non-
-       volatile registers are saved. Information is detailed enough to be
-       able to reconstruct contents of caller's non-volatile registers upon
-       call to current callee. And so caller's context is reconstructed,
-       and then unwind procedure is repeated, i.e. another `UNWIND_INFO'
-       structure is associated, this time, with caller's instruction
-       pointer, which is then checked for presence of reference to
-       language-specific handler, etc. The procedure is recursively
-       repeated till exception is handled. As last resort system "handles"
-       it by generating memory core dump and terminating the application.
-
-       As for the moment of this writing NASM unfortunately does not
-       facilitate generation of above mentioned detailed information about
-       stack frame layout. But as of version 2.03 it implements building
-       blocks for generating structures involved in stack unwinding. As
-       simplest example, here is how to deploy custom exception handler for
-       leaf function:
-
-       default rel 
-       section .text 
-       extern  MessageBoxA 
-       handler: 
-               sub     rsp,40 
-               mov     rcx,0 
-               lea     rdx,text 
-               lea     r8,caption 
-               mov     r9,1    ; MB_OKCANCEL 
-               call    MessageBoxA 
-               sub     eax,1   ; incidentally suits as return value 
-                               ; for exception handler 
-               add     rsp,40 
-               ret 
-       global  main 
-       main: 
-               xor     rax,rax 
-               mov     rax,QWORDrax  ; cause exception 
-               ret 
-       main_end: 
-       text:   db      'OK to rethrow, CANCEL to generate core dump',0 
-       caption:db      'SEGV',0 
-       
-       section .pdata  rdata align=4 
-               dd      main wrt ..imagebase 
-               dd      main_end wrt ..imagebase 
-               dd      xmain wrt ..imagebase 
-       section .xdata  rdata align=8 
-       xmain:  db      9,0,0,0 
-               dd      handler wrt ..imagebase 
-       section .drectve info 
-               db      '/defaultlib:user32.lib /defaultlib:msvcrt.lib '
-
-       What you see in `.pdata' section is element of the "table comprising
-       start and end addresses of function" along with reference to
-       associated `UNWIND_INFO' structure. And what you see in `.xdata'
-       section is `UNWIND_INFO' structure describing function with no
-       frame, but with designated exception handler. References are
-       _required_ to be image-relative (which is the real reason for
-       implementing `wrt ..imagebase' operator). It should be noted that
-       `rdata align=n', as well as `wrt ..imagebase', are optional in these
-       two segments' contexts, i.e. can be omitted. Latter means that _all_
-       32-bit references, not only above listed required ones, placed into
-       these two segments turn out image-relative. Why is it important to
-       understand? Developer is allowed to append handler-specific data to
-       `UNWIND_INFO' structure, and if she adds a 32-bit reference, then
-       she will have to remember to adjust its value to obtain the real
-       pointer.
-
-       As already mentioned, in Win64 terms leaf function is one that does
-       not call any other function _nor_ modifies any non-volatile
-       register, including stack pointer. But it's not uncommon that
-       assembler programmer plans to utilize every single register and
-       sometimes even have variable stack frame. Is there anything one can
-       do with bare building blocks? I.e. besides manually composing fully-
-       fledged `UNWIND_INFO' structure, which would surely be considered
-       error-prone? Yes, there is. Recall that exception handler is called
-       first, before stack layout is analyzed. As it turned out, it's
-       perfectly possible to manipulate current callee's context in custom
-       handler in manner that permits further stack unwinding. General idea
-       is that handler would not actually "handle" the exception, but
-       instead restore callee's context, as it was at its entry point and
-       thus mimic leaf function. In other words, handler would simply
-       undertake part of unwinding procedure. Consider following example:
-
-       function: 
-               mov     rax,rsp         ; copy rsp to volatile register 
-               push    r15             ; save non-volatile registers 
-               push    rbx 
-               push    rbp 
-               mov     r11,rsp         ; prepare variable stack frame 
-               sub     r11,rcx 
-               and     r11,-64 
-               mov     QWORDr11,rax  ; check for exceptions 
-               mov     rsp,r11         ; allocate stack frame 
-               mov     QWORDrsp,rax  ; save original rsp value 
-       magic_point: 
-               ... 
-               mov     r11,QWORDrsp  ; pull original rsp value 
-               mov     rbp,QWORDr11-24 
-               mov     rbx,QWORDr11-16 
-               mov     r15,QWORDr11-8 
-               mov     rsp,r11         ; destroy frame 
-               ret
-
-       The keyword is that up to `magic_point' original `rsp' value remains
-       in chosen volatile register and no non-volatile register, except for
-       `rsp', is modified. While past `magic_point' `rsp' remains constant
-       till the very end of the `function'. In this case custom language-
-       specific exception handler would look like this:
-
-       EXCEPTION_DISPOSITION handler (EXCEPTION_RECORD *rec,ULONG64 frame, 
-               CONTEXT *context,DISPATCHER_CONTEXT *disp) 
-       {   ULONG64 *rsp; 
-           if (context->Rip<(ULONG64)magic_point) 
-               rsp = (ULONG64 *)context->Rax; 
-           else 
-           {   rsp = ((ULONG64 **)context->Rsp)0; 
-               context->Rbp = rsp-3; 
-               context->Rbx = rsp-2; 
-               context->R15 = rsp-1; 
-           } 
-           context->Rsp = (ULONG64)rsp; 
-       
-           memcpy (disp->ContextRecord,context,sizeof(CONTEXT)); 
-           RtlVirtualUnwind(UNW_FLAG_NHANDLER,disp->ImageBase, 
-               dips->ControlPc,disp->FunctionEntry,disp->ContextRecord, 
-               &disp->HandlerData,&disp->EstablisherFrame,NULL); 
-           return ExceptionContinueSearch; 
-       }
-
-       As custom handler mimics leaf function, corresponding `UNWIND_INFO'
-       structure does not have to contain any information about stack frame
-       and its layout.
-
-   8.7 `coff': Common Object File Format
-
-       The `coff' output type produces `COFF' object files suitable for
-       linking with the DJGPP linker.
-
-       `coff' provides a default output file-name extension of `.o'.
-
-       The `coff' format supports the same extensions to the `SECTION'
-       directive as `win32' does, except that the `align' qualifier and the
-       `info' section type are not supported.
-
-   8.8 `macho32' and `macho64': Mach Object File Format
-
-       The `macho32' and `macho64' output formts produces Mach-O object
-       files suitable for linking with the MacOS X linker. `macho' is a
-       synonym for `macho32'.
-
-       `macho' provides a default output file-name extension of `.o'.
-
- 8.8.1 `macho' extensions to the `SECTION' Directive 
-
-       The `macho' output format specifies section names in the format
-       "_segment_`,'_section_". No spaces are allowed around the comma. The
-       following flags can also be specified:
-
-       (*) `data' - this section contains initialized data items
-
-       (*) `code' - this section contains code exclusively
-
-       (*) `mixed' - this section contains both code and data
-
-       (*) `bss' - this section is uninitialized and filled with zero
-
-       (*) `zerofill' - same as `bss'
-
-       (*) `no_dead_strip' - inhibit dead code stripping for this section
-
-       (*) `live_support' - set the live support flag for this section
-
-       (*) `strip_static_syms' - strip static symbols for this section
-
-       (*) `debug' - this section contains debugging information
-
-       (*) `align='_alignment_ - specify section alignment
-
-       The default is `data', unless the section name is `__text' or
-       `__bss' in which case the default is `text' or `bss', respectively.
-
-       For compatibility with other Unix platforms, the following standard
-       names are also supported:
-
-       .text    = __TEXT,__text  text 
-       .rodata  = __DATA,__const data 
-       .data    = __DATA,__data  data 
-       .bss     = __DATA,__bss   bss
-
-       If the `.rodata' section contains no relocations, it is instead put
-       into the `__TEXT,__const' section unless this section has already
-       been specified explicitly. However, it is probably better to specify
-       `__TEXT,__const' and `__DATA,__const' explicitly as appropriate.
-
- 8.8.2 Thread Local Storage in Mach-O: `macho' special symbols and `WRT'
-
-       Mach-O defines the following special symbols that can be used on the
-       right-hand side of the `WRT' operator:
-
-       (*) `..tlvp' is used to specify access to thread-local storage.
-
-       (*) `..gotpcrel' is used to specify references to the Global Offset
-           Table. The GOT is supported in the `macho64' format only.
-
- 8.8.3 `macho' specific directive `subsections_via_symbols'
-
-       The directive `subsections_via_symbols' sets the
-       `MH_SUBSECTIONS_VIA_SYMBOLS' flag in the Mach-O header, that
-       effectively separates a block (or a subsection) based on a symbol.
-       It is often used for eliminating dead codes by a linker.
-
-       This directive takes no arguments.
-
-       This is a macro implemented as a `%pragma'. It can also be specified
-       in its `%pragma' form, in which case it will not affect non-Mach-O
-       builds of the same source code:
-
-            %pragma macho subsections_via_symbols
-
- 8.8.4 `macho' specific directive `no_dead_strip'
-
-       The directive `no_dead_strip' sets the Mach-O `SH_NO_DEAD_STRIP'
-       section flag on the section containing a a specific symbol. This
-       directive takes a list of symbols as its arguments.
-
-       This is a macro implemented as a `%pragma'. It can also be specified
-       in its `%pragma' form, in which case it will not affect non-Mach-O
-       builds of the same source code:
-
-            %pragma macho no_dead_strip symbol...
-
- 8.8.5 `macho' specific extensions to the `GLOBAL' Directive: `private_extern'
-
-       The directive extension to `GLOBAL' marks the symbol with limited
-       global scope. For example, you can specify the global symbol with
-       this extension:
-
-       global foo:private_extern 
-       foo: 
-                ; codes
-
-       Using with static linker will clear the private extern attribute.
-       But linker option like `-keep_private_externs' can avoid it.
-
-   8.9 `elf32', `elf64', `elfx32': Executable and Linkable Format Object Files
-
-       The `elf32', `elf64' and `elfx32' output formats generate
-       `ELF32 and ELF64' (Executable and Linkable Format) object files, as
-       used by Linux as well as Unix System V, including Solaris x86,
-       UnixWare and SCO Unix. ELF provides a default output file-name
-       extension of `.o'. `elf' is a synonym for `elf32'.
-
-       The `elfx32' format is used for the x32 ABI, which is a 32-bit ABI
-       with the CPU in 64-bit mode.
-
- 8.9.1 ELF specific directive `osabi'
-
-       The ELF header specifies the application binary interface for the
-       target operating system (OSABI). This field can be set by using the
-       `osabi' directive with the numeric value (0-255) of the target
-       system. If this directive is not used, the default value will be
-       "UNIX System V ABI" (0) which will work on most systems which
-       support ELF.
-
- 8.9.2 ELF extensions to the `SECTION' Directive 
-
-       Like the `obj' format, `elf' allows you to specify additional
-       information on the `SECTION' directive line, to control the type and
-       properties of sections you declare. Section types and properties are
-       generated automatically by NASM for the standard section names, but
-       may still be overridden by these qualifiers.
-
-       The available qualifiers are:
-
-       (*) `alloc' defines the section to be one which is loaded into
-           memory when the program is run. `noalloc' defines it to be one
-           which is not, such as an informational or comment section.
-
-       (*) `exec' defines the section to be one which should have execute
-           permission when the program is run. `noexec' defines it as one
-           which should not.
-
-       (*) `write' defines the section to be one which should be writable
-           when the program is run. `nowrite' defines it as one which
-           should not.
-
-       (*) `progbits' defines the section to be one with explicit contents
-           stored in the object file: an ordinary code or data section, for
-           example.
-
-       (*) `nobits' defines the section to be one with no explicit contents
-           given, such as a BSS section.
-
-       (*) `note' indicates that this section contains ELF notes. The
-           content of ELF notes are specified using normal assembly
-           instructions; it is up to the programmer to ensure these are
-           valid ELF notes.
-
-       (*) `preinit_array' indicates that this section contains function
-           addresses to be called before any other initialization has
-           happened.
-
-       (*) `init_array' indicates that this section contains function
-           addresses to be called during initialization.
-
-       (*) `fini_array' indicates that this section contains function
-           pointers to be called during termination.
-
-       (*) `align=', used with a trailing number as in `obj', gives the
-           alignment requirements of the section.
-
-       (*) `byte', `word', `dword', `qword', `tword', `oword', `yword', or
-           `zword' with an optional `*'multiplier specify the fundamental
-           data item size for a section which contains either fixed-sized
-           data structures or strings; it also sets a default alignment.
-           This is generally used with the `strings' and `merge' attributes
-           (see below.) For example `byte*4' defines a unit size of 4
-           bytes, with a default alignment of 1; `dword' also defines a
-           unit size of 4 bytes, but with a default alignment of 4. The
-           `align=' attribute, if specified, overrides this default
-           alignment.
-
-       (*) `pointer' is equivalent to `dword' for `elf32' or `elfx32', and
-           `qword' for `elf64'.
-
-       (*) `strings' indicate that this section contains exclusively null-
-           terminated strings. By default these are assumed to be byte
-           strings, but a size specifier can be used to override that.
-
-       (*) `merge' indicates that duplicate data elements in this section
-           should be merged with data elements from other object files.
-           Data elements can be either fixed-sized objects or null-
-           terminatedstrings (with the `strings' attribute.) A size
-           specifier is required unless `strings' is specified, in which
-           case the size defaults to `byte'.
-
-       (*) `tls' defines the section to be one which contains thread local
-           variables.
-
-       The defaults assumed by NASM if you do not specify the above
-       qualifiers are:
-
-
-       section .text          progbits      alloc   exec    nowrite  align=16 
-       section .rodata        progbits      alloc   noexec  nowrite  align=4 
-       section .lrodata       progbits      alloc   noexec  nowrite  align=4 
-       section .data          progbits      alloc   noexec  write    align=4 
-       section .ldata         progbits      alloc   noexec  write    align=4 
-       section .bss           nobits        alloc   noexec  write    align=4 
-       section .lbss          nobits        alloc   noexec  write    align=4 
-       section .tdata         progbits      alloc   noexec  write    align=4   tls 
-       section .tbss          nobits        alloc   noexec  write    align=4   tls 
-       section .comment       progbits      noalloc noexec  nowrite  align=1 
-       section .preinit_array preinit_array alloc   noexec  nowrite  pointer 
-       section .init_array    init_array    alloc   noexec  nowrite  pointer 
-       section .fini_array    fini_array    alloc   noexec  nowrite  pointer 
-       section .note          note          noalloc noexec  nowrite  align=4 
-       section other          progbits      alloc   noexec  nowrite  align=1
-
-       (Any section name other than those in the above table is treated by
-       default like `other' in the above table. Please note that section
-       names are case sensitive.)
-
- 8.9.3 Position-Independent Code: ELF Special Symbols and `WRT'
-
-       Since `ELF' does not support segment-base references, the `WRT'
-       operator is not used for its normal purpose; therefore NASM's `elf'
-       output format makes use of `WRT' for a different purpose, namely the
-       PIC-specific relocation types.
-
-       `elf' defines five special symbols which you can use as the right-
-       hand side of the `WRT' operator to obtain PIC relocation types. They
-       are `..gotpc', `..gotoff', `..got', `..plt' and `..sym'. Their
-       functions are summarized here:
-
-       (*) Referring to the symbol marking the global offset table base
-           using `wrt ..gotpc' will end up giving the distance from the
-           beginning of the current section to the global offset table.
-           (`_GLOBAL_OFFSET_TABLE_' is the standard symbol name used to
-           refer to the GOT.) So you would then need to add `$$' to the
-           result to get the real address of the GOT.
-
-       (*) Referring to a location in one of your own sections using
-           `wrt ..gotoff' will give the distance from the beginning of the
-           GOT to the specified location, so that adding on the address of
-           the GOT would give the real address of the location you wanted.
-
-       (*) Referring to an external or global symbol using `wrt ..got'
-           causes the linker to build an entry _in_ the GOT containing the
-           address of the symbol, and the reference gives the distance from
-           the beginning of the GOT to the entry; so you can add on the
-           address of the GOT, load from the resulting address, and end up
-           with the address of the symbol.
-
-       (*) Referring to a procedure name using `wrt ..plt' causes the
-           linker to build a procedure linkage table entry for the symbol,
-           and the reference gives the address of the PLT entry. You can
-           only use this in contexts which would generate a PC-relative
-           relocation normally (i.e. as the destination for `CALL' or
-           `JMP'), since ELF contains no relocation type to refer to PLT
-           entries absolutely.
-
-       (*) Referring to a symbol name using `wrt ..sym' causes NASM to
-           write an ordinary relocation, but instead of making the
-           relocation relative to the start of the section and then adding
-           on the offset to the symbol, it will write a relocation record
-           aimed directly at the symbol in question. The distinction is a
-           necessary one due to a peculiarity of the dynamic linker.
-
-       A fuller explanation of how to use these relocation types to write
-       shared libraries entirely in NASM is given in section 10.2.
-
- 8.9.4 Thread Local Storage in ELF: `elf' Special Symbols and `WRT'
-
-       (*) In ELF32 mode, referring to an external or global symbol using
-           `wrt ..tlsie'  causes the linker to build an entry _in_ the GOT
-           containing the offset of the symbol within the TLS block, so you
-           can access the value of the symbol with code such as:
-
-              mov  eax,tid wrt ..tlsie 
-              mov  gs:eax,ebx
-
-       (*) In ELF64 or ELFx32 mode, referring to an external or global
-           symbol using `wrt ..gottpoff'  causes the linker to build an
-           entry _in_ the GOT containing the offset of the symbol within
-           the TLS block, so you can access the value of the symbol with
-           code such as:
-
-              mov   rax,rel tid wrt ..gottpoff 
-              mov   rcx,fs:rax
-
- 8.9.5 `elf' Extensions to the `GLOBAL' Directive
-
-       `ELF' object files can contain more information about a global
-       symbol than just its address: they can contain the size of the
-       symbol and its type as well. These are not merely debugger
-       conveniences, but are actually necessary when the program being
-       written is a shared library. NASM therefore supports some extensions
-       to the `GLOBAL' directive, allowing you to specify these features.
-
-       You can specify whether a global variable is a function or a data
-       object by suffixing the name with a colon and the word `function' or
-       `data'. (`object' is a synonym for `data'.) For example:
-
-       global   hashlookup:function, hashtable:data
-
-       exports the global symbol `hashlookup' as a function and `hashtable'
-       as a data object.
-
-       Optionally, you can control the ELF visibility of the symbol. Just
-       add one of the visibility keywords: `default', `internal', `hidden',
-       or `protected'. The default is `default' of course. For example, to
-       make `hashlookup' hidden:
-
-       global   hashlookup:function hidden
-
-       Since version 2.15, it is possible to specify symbols binding. The
-       keywords are: `weak' to generate weak symbol or `strong'. The
-       default is `strong'.
-
-       You can also specify the size of the data associated with the
-       symbol, as a numeric expression (which may involve labels, and even
-       forward references) after the type specifier. Like this:
-
-       global  hashtable:data (hashtable.end - hashtable) 
-       
-       hashtable: 
-               db this,that,theother  ; some data here 
-       .end:
-
-       This makes NASM automatically calculate the length of the table and
-       place that information into the `ELF' symbol table.
-
-       Declaring the type and size of global symbols is necessary when
-       writing shared library code. For more information, see section
-       10.2.4.
-
- 8.9.6 `elf' Extensions to the `EXTERN' Directive
-
-       Since version 2.15 it is possible to specify keyword `weak' to
-       generate weak external reference. Example:
-
-       extern weak_ref:weak
-
- 8.9.7 `elf' Extensions to the `COMMON' Directive 
-
-       `ELF' also allows you to specify alignment requirements on common
-       variables. This is done by putting a number (which must be a power
-       of two) after the name and size of the common variable, separated
-       (as usual) by a colon. For example, an array of doublewords would
-       benefit from 4-byte alignment:
-
-       common  dwordarray 128:4
-
-       This declares the total size of the array to be 128 bytes, and
-       requires that it be aligned on a 4-byte boundary.
-
- 8.9.8 16-bit code and ELF 
-
-       Older versions of the `ELF32' specification did not provide
-       relocations for 8- and 16-bit values. It is now part of the formal
-       specification, and any new enough linker should support them.
-
-       ELF has currently no support for segmented programming.
-
- 8.9.9 Debug formats and ELF 
-
-       ELF provides debug information in `STABS' and `DWARF' formats. Line
-       number information is generated for all executable sections, but
-       please note that only the ".text" section is executable by default.
-
-  8.10 `aout': Linux `a.out' Object Files
-
-       The `aout' format generates `a.out' object files, in the form used
-       by early Linux systems (current Linux systems use ELF, see section
-       8.9.) These differ from other `a.out' object files in that the magic
-       number in the first four bytes of the file is different; also, some
-       implementations of `a.out', for example NetBSD's, support position-
-       independent code, which Linux's implementation does not.
-
-       `a.out' provides a default output file-name extension of `.o'.
-
-       `a.out' is a very simple object format. It supports no special
-       directives, no special symbols, no use of `SEG' or `WRT', and no
-       extensions to any standard directives. It supports only the three
-       standard section names `.text', `.data' and `.bss'.
-
-  8.11 `aoutb': NetBSD/FreeBSD/OpenBSD `a.out' Object Files
-
-       The `aoutb' format generates `a.out' object files, in the form used
-       by the various free `BSD Unix' clones, `NetBSD', `FreeBSD' and
-       `OpenBSD'. For simple object files, this object format is exactly
-       the same as `aout' except for the magic number in the first four
-       bytes of the file. However, the `aoutb' format supports
-       position-independent code in the same way as the `elf' format, so
-       you can use it to write `BSD' shared libraries.
-
-       `aoutb' provides a default output file-name extension of `.o'.
-
-       `aoutb' supports no special directives, no special symbols, and only
-       the three standard section names `.text', `.data' and `.bss'.
-       However, it also supports the same use of `WRT' as `elf' does, to
-       provide position-independent code relocation types. See section
-       8.9.3 for full documentation of this feature.
-
-       `aoutb' also supports the same extensions to the `GLOBAL' directive
-       as `elf' does: see section 8.9.5 for documentation of this.
-
-  8.12 `as86': Minix/Linux `as86' Object Files
-
-       The Minix/Linux 16-bit assembler `as86' has its own non-standard
-       object file format. Although its companion linker `ld86' produces
-       something close to ordinary `a.out' binaries as output, the object
-       file format used to communicate between `as86' and `ld86' is not
-       itself `a.out'.
-
-       NASM supports this format, just in case it is useful, as `as86'.
-       `as86' provides a default output file-name extension of `.o'.
-
-       `as86' is a very simple object format (from the NASM user's point of
-       view). It supports no special directives, no use of `SEG' or `WRT',
-       and no extensions to any standard directives. It supports only the
-       three standard section names `.text', `.data' and `.bss'. The only
-       special symbol supported is `..start'.
-
-  8.13 `dbg': Debugging Format
-
-       The `dbg' format does not output an object file as such; instead, it
-       outputs a text file which contains a complete list of all the
-       transactions between the main body of NASM and the output-format
-       back end module. It is primarily intended to aid people who want to
-       write their own output drivers, so that they can get a clearer idea
-       of the various requests the main program makes of the output driver,
-       and in what order they happen.
-
-       For simple files, one can easily use the `dbg' format like this:
-
-       nasm -f dbg filename.asm
-
-       which will generate a diagnostic file called `filename.dbg'.
-       However, this will not work well on files which were designed for a
-       different object format, because each object format defines its own
-       macros (usually user-level forms of directives), and those macros
-       will not be defined in the `dbg' format. Therefore it can be useful
-       to run NASM twice, in order to do the preprocessing with the native
-       object format selected:
-
-       nasm -e -f elf32 -o elfprog.i elfprog.asm 
-       nasm -a -f dbg elfprog.i
-
-       This preprocesses `elfprog.asm' into `elfprog.i', keeping the
-       `elf32' object format selected in order to make sure ELF special
-       directives are converted into primitive form correctly. Then the
-       preprocessed source is fed through the `dbg' format to generate the
-       final diagnostic output.
-
-       This workaround will still typically not work for programs intended
-       for `obj' format, because the `obj' `SEGMENT' and `GROUP' directives
-       have side effects of defining the segment and group names as
-       symbols; `dbg' will not do this, so the program will not assemble.
-       You will have to work around that by defining the symbols yourself
-       (using `EXTERN', for example) if you really need to get a `dbg'
-       trace of an `obj'-specific source file.
-
-       `dbg' accepts any section name and any directives at all, and logs
-       them all to its output file.
-
-       `dbg' accepts and logs any `%pragma', but the specific `%pragma':
-
-            %pragma dbg maxdump <size>
-
-       where `<size>' is either a number or `unlimited', can be used to
-       control the maximum size for dumping the full contents of a
-       `rawdata' output object.
-
-Chapter 9: Writing 16-bit Code (DOS, Windows 3/3.1)
----------------------------------------------------
-
-       This chapter attempts to cover some of the common issues encountered
-       when writing 16-bit code to run under `MS-DOS' or `Windows 3.x'. It
-       covers how to link programs to produce `.EXE' or `.COM' files, how
-       to write `.SYS' device drivers, and how to interface assembly
-       language code with 16-bit C compilers and with Borland Pascal.
-
-   9.1 Producing `.EXE' Files
-
-       Any large program written under DOS needs to be built as a `.EXE'
-       file: only `.EXE' files have the necessary internal structure
-       required to span more than one 64K segment. Windows programs, also,
-       have to be built as `.EXE' files, since Windows does not support the
-       `.COM' format.
-
-       In general, you generate `.EXE' files by using the `obj' output
-       format to produce one or more `.obj' files, and then linking them
-       together using a linker. However, NASM also supports the direct
-       generation of simple DOS `.EXE' files using the `bin' output format
-       (by using `DB' and `DW' to construct the `.EXE' file header), and a
-       macro package is supplied to do this. Thanks to Yann Guidon for
-       contributing the code for this.
-
-       NASM may also support `.EXE' natively as another output format in
-       future releases.
-
- 9.1.1 Using the `obj' Format To Generate `.EXE' Files
-
-       This section describes the usual method of generating `.EXE' files
-       by linking `.OBJ' files together.
-
-       Most 16-bit programming language packages come with a suitable
-       linker; if you have none of these, there is a free linker called
-       VAL, available in `LZH' archive format from `x2ftp.oulu.fi'. An LZH
-       archiver can be found at `ftp.simtel.net'. There is another `free'
-       linker (though this one doesn't come with sources) called FREELINK,
-       available from `www.pcorner.com'. A third, `djlink', written by DJ
-       Delorie, is available at `www.delorie.com'. A fourth linker,
-       `ALINK', written by Anthony A.J. Williams, is available at
-       `alink.sourceforge.net'.
-
-       When linking several `.OBJ' files into a `.EXE' file, you should
-       ensure that exactly one of them has a start point defined (using the
-       `..start' special symbol defined by the `obj' format: see section
-       8.4.6). If no module defines a start point, the linker will not know
-       what value to give the entry-point field in the output file header;
-       if more than one defines a start point, the linker will not know
-       _which_ value to use.
-
-       An example of a NASM source file which can be assembled to a `.OBJ'
-       file and linked on its own to a `.EXE' is given here. It
-       demonstrates the basic principles of defining a stack, initialising
-       the segment registers, and declaring a start point. This file is
-       also provided in the `test' subdirectory of the NASM archives, under
-       the name `objexe.asm'.
-
-       segment code 
-       
-       ..start: 
-               mov     ax,data 
-               mov     ds,ax 
-               mov     ax,stack 
-               mov     ss,ax 
-               mov     sp,stacktop
-
-       This initial piece of code sets up `DS' to point to the data
-       segment, and initializes `SS' and `SP' to point to the top of the
-       provided stack. Notice that interrupts are implicitly disabled for
-       one instruction after a move into `SS', precisely for this
-       situation, so that there's no chance of an interrupt occurring
-       between the loads of `SS' and `SP' and not having a stack to execute
-       on.
-
-       Note also that the special symbol `..start' is defined at the
-       beginning of this code, which means that will be the entry point
-       into the resulting executable file.
-
-               mov     dx,hello 
-               mov     ah,9 
-               int     0x21
-
-       The above is the main program: load `DS:DX' with a pointer to the
-       greeting message (`hello' is implicitly relative to the segment
-       `data', which was loaded into `DS' in the setup code, so the full
-       pointer is valid), and call the DOS print-string function.
-
-               mov     ax,0x4c00 
-               int     0x21
-
-       This terminates the program using another DOS system call.
-
-       segment data 
-       
-       hello:  db      'hello, world', 13, 10, '$'
-
-       The data segment contains the string we want to display.
-
-       segment stack stack 
-               resb 64 
-       stacktop:
-
-       The above code declares a stack segment containing 64 bytes of
-       uninitialized stack space, and points `stacktop' at the top of it.
-       The directive `segment stack stack' defines a segment _called_
-       `stack', and also of _type_ `STACK'. The latter is not necessary to
-       the correct running of the program, but linkers are likely to issue
-       warnings or errors if your program has no segment of type `STACK'.
-
-       The above file, when assembled into a `.OBJ' file, will link on its
-       own to a valid `.EXE' file, which when run will print `hello, world'
-       and then exit.
-
- 9.1.2 Using the `bin' Format To Generate `.EXE' Files
-
-       The `.EXE' file format is simple enough that it's possible to build
-       a `.EXE' file by writing a pure-binary program and sticking a 32-
-       byte header on the front. This header is simple enough that it can
-       be generated using `DB' and `DW' commands by NASM itself, so that
-       you can use the `bin' output format to directly generate `.EXE'
-       files.
-
-       Included in the NASM archives, in the `misc' subdirectory, is a file
-       `exebin.mac' of macros. It defines three macros: `EXE_begin',
-       `EXE_stack' and `EXE_end'.
-
-       To produce a `.EXE' file using this method, you should start by
-       using `%include' to load the `exebin.mac' macro package into your
-       source file. You should then issue the `EXE_begin' macro call (which
-       takes no arguments) to generate the file header data. Then write
-       code as normal for the `bin' format - you can use all three standard
-       sections `.text', `.data' and `.bss'. At the end of the file you
-       should call the `EXE_end' macro (again, no arguments), which defines
-       some symbols to mark section sizes, and these symbols are referred
-       to in the header code generated by `EXE_begin'.
-
-       In this model, the code you end up writing starts at `0x100', just
-       like a `.COM' file - in fact, if you strip off the 32-byte header
-       from the resulting `.EXE' file, you will have a valid `.COM'
-       program. All the segment bases are the same, so you are limited to a
-       64K program, again just like a `.COM' file. Note that an `ORG'
-       directive is issued by the `EXE_begin' macro, so you should not
-       explicitly issue one of your own.
-
-       You can't directly refer to your segment base value, unfortunately,
-       since this would require a relocation in the header, and things
-       would get a lot more complicated. So you should get your segment
-       base by copying it out of `CS' instead.
-
-       On entry to your `.EXE' file, `SS:SP' are already set up to point to
-       the top of a 2Kb stack. You can adjust the default stack size of 2Kb
-       by calling the `EXE_stack' macro. For example, to change the stack
-       size of your program to 64 bytes, you would call `EXE_stack 64'.
-
-       A sample program which generates a `.EXE' file in this way is given
-       in the `test' subdirectory of the NASM archive, as `binexe.asm'.
-
-   9.2 Producing `.COM' Files
-
-       While large DOS programs must be written as `.EXE' files, small ones
-       are often better written as `.COM' files. `.COM' files are pure
-       binary, and therefore most easily produced using the `bin' output
-       format.
-
- 9.2.1 Using the `bin' Format To Generate `.COM' Files
-
-       `.COM' files expect to be loaded at offset `100h' into their segment
-       (though the segment may change). Execution then begins at `100h',
-       i.e. right at the start of the program. So to write a `.COM'
-       program, you would create a source file looking like
-
-               org 100h 
-       
-       section .text 
-       
-       start: 
-               ; put your code here 
-       
-       section .data 
-       
-               ; put data items here 
-       
-       section .bss 
-       
-               ; put uninitialized data here
-
-       The `bin' format puts the `.text' section first in the file, so you
-       can declare data or BSS items before beginning to write code if you
-       want to and the code will still end up at the front of the file
-       where it belongs.
-
-       The BSS (uninitialized data) section does not take up space in the
-       `.COM' file itself: instead, addresses of BSS items are resolved to
-       point at space beyond the end of the file, on the grounds that this
-       will be free memory when the program is run. Therefore you should
-       not rely on your BSS being initialized to all zeros when you run.
-
-       To assemble the above program, you should use a command line like
-
-       nasm myprog.asm -fbin -o myprog.com
-
-       The `bin' format would produce a file called `myprog' if no explicit
-       output file name were specified, so you have to override it and give
-       the desired file name.
-
- 9.2.2 Using the `obj' Format To Generate `.COM' Files
-
-       If you are writing a `.COM' program as more than one module, you may
-       wish to assemble several `.OBJ' files and link them together into a
-       `.COM' program. You can do this, provided you have a linker capable
-       of outputting `.COM' files directly (TLINK does this), or
-       alternatively a converter program such as `EXE2BIN' to transform the
-       `.EXE' file output from the linker into a `.COM' file.
-
-       If you do this, you need to take care of several things:
-
-       (*) The first object file containing code should start its code
-           segment with a line like `RESB 100h'. This is to ensure that the
-           code begins at offset `100h' relative to the beginning of the
-           code segment, so that the linker or converter program does not
-           have to adjust address references within the file when
-           generating the `.COM' file. Other assemblers use an `ORG'
-           directive for this purpose, but `ORG' in NASM is a format-
-           specific directive to the `bin' output format, and does not mean
-           the same thing as it does in MASM-compatible assemblers.
-
-       (*) You don't need to define a stack segment.
-
-       (*) All your segments should be in the same group, so that every
-           time your code or data references a symbol offset, all offsets
-           are relative to the same segment base. This is because, when a
-           `.COM' file is loaded, all the segment registers contain the
-           same value.
-
-   9.3 Producing `.SYS' Files
-
-       MS-DOS device drivers - `.SYS' files - are pure binary files,
-       similar to `.COM' files, except that they start at origin zero
-       rather than `100h'. Therefore, if you are writing a device driver
-       using the `bin' format, you do not need the `ORG' directive, since
-       the default origin for `bin' is zero. Similarly, if you are using
-       `obj', you do not need the `RESB 100h' at the start of your code
-       segment.
-
-       `.SYS' files start with a header structure, containing pointers to
-       the various routines inside the driver which do the work. This
-       structure should be defined at the start of the code segment, even
-       though it is not actually code.
-
-       For more information on the format of `.SYS' files, and the data
-       which has to go in the header structure, a list of books is given in
-       the Frequently Asked Questions list for the newsgroup
-       `comp.os.msdos.programmer'.
-
-   9.4 Interfacing to 16-bit C Programs
-
-       This section covers the basics of writing assembly routines that
-       call, or are called from, C programs. To do this, you would
-       typically write an assembly module as a `.OBJ' file, and link it
-       with your C modules to produce a mixed-language program.
-
- 9.4.1 External Symbol Names
-
-       C compilers have the convention that the names of all global symbols
-       (functions or data) they define are formed by prefixing an
-       underscore to the name as it appears in the C program. So, for
-       example, the function a C programmer thinks of as `printf' appears
-       to an assembly language programmer as `_printf'. This means that in
-       your assembly programs, you can define symbols without a leading
-       underscore, and not have to worry about name clashes with C symbols.
-
-       If you find the underscores inconvenient, you can define macros to
-       replace the `GLOBAL' and `EXTERN' directives as follows:
-
-       %macro  cglobal 1 
-       
-         global  _%1 
-         %define %1 _%1 
-       
-       %endmacro 
-       
-       %macro  cextern 1 
-       
-         extern  _%1 
-         %define %1 _%1 
-       
-       %endmacro
-
-       (These forms of the macros only take one argument at a time; a
-       `%rep' construct could solve this.)
-
-       If you then declare an external like this:
-
-       cextern printf
-
-       then the macro will expand it as
-
-       extern  _printf 
-       %define printf _printf
-
-       Thereafter, you can reference `printf' as if it was a symbol, and
-       the preprocessor will put the leading underscore on where necessary.
-
-       The `cglobal' macro works similarly. You must use `cglobal' before
-       defining the symbol in question, but you would have had to do that
-       anyway if you used `GLOBAL'.
-
-       Also see section 2.1.28.
-
- 9.4.2 Memory Models
-
-       NASM contains no mechanism to support the various C memory models
-       directly; you have to keep track yourself of which one you are
-       writing for. This means you have to keep track of the following
-       things:
-
-       (*) In models using a single code segment (tiny, small and compact),
-           functions are near. This means that function pointers, when
-           stored in data segments or pushed on the stack as function
-           arguments, are 16 bits long and contain only an offset field
-           (the `CS' register never changes its value, and always gives the
-           segment part of the full function address), and that functions
-           are called using ordinary near `CALL' instructions and return
-           using `RETN' (which, in NASM, is synonymous with `RET' anyway).
-           This means both that you should write your own routines to
-           return with `RETN', and that you should call external C routines
-           with near `CALL' instructions.
-
-       (*) In models using more than one code segment (medium, large and
-           huge), functions are far. This means that function pointers are
-           32 bits long (consisting of a 16-bit offset followed by a 16-bit
-           segment), and that functions are called using `CALL FAR' (or
-           `CALL seg:offset') and return using `RETF'. Again, you should
-           therefore write your own routines to return with `RETF' and use
-           `CALL FAR' to call external routines.
-
-       (*) In models using a single data segment (tiny, small and medium),
-           data pointers are 16 bits long, containing only an offset field
-           (the `DS' register doesn't change its value, and always gives
-           the segment part of the full data item address).
-
-       (*) In models using more than one data segment (compact, large and
-           huge), data pointers are 32 bits long, consisting of a 16-bit
-           offset followed by a 16-bit segment. You should still be careful
-           not to modify `DS' in your routines without restoring it
-           afterwards, but `ES' is free for you to use to access the
-           contents of 32-bit data pointers you are passed.
-
-       (*) The huge memory model allows single data items to exceed 64K in
-           size. In all other memory models, you can access the whole of a
-           data item just by doing arithmetic on the offset field of the
-           pointer you are given, whether a segment field is present or
-           not; in huge model, you have to be more careful of your pointer
-           arithmetic.
-
-       (*) In most memory models, there is a _default_ data segment, whose
-           segment address is kept in `DS' throughout the program. This
-           data segment is typically the same segment as the stack, kept in
-           `SS', so that functions' local variables (which are stored on
-           the stack) and global data items can both be accessed easily
-           without changing `DS'. Particularly large data items are
-           typically stored in other segments. However, some memory models
-           (though not the standard ones, usually) allow the assumption
-           that `SS' and `DS' hold the same value to be removed. Be careful
-           about functions' local variables in this latter case.
-
-       In models with a single code segment, the segment is called `_TEXT',
-       so your code segment must also go by this name in order to be linked
-       into the same place as the main code segment. In models with a
-       single data segment, or with a default data segment, it is called
-       `_DATA'.
-
- 9.4.3 Function Definitions and Function Calls
-
-       The C calling convention in 16-bit programs is as follows. In the
-       following description, the words _caller_ and _callee_ are used to
-       denote the function doing the calling and the function which gets
-       called.
-
-       (*) The caller pushes the function's parameters on the stack, one
-           after another, in reverse order (right to left, so that the
-           first argument specified to the function is pushed last).
-
-       (*) The caller then executes a `CALL' instruction to pass control to
-           the callee. This `CALL' is either near or far depending on the
-           memory model.
-
-       (*) The callee receives control, and typically (although this is not
-           actually necessary, in functions which do not need to access
-           their parameters) starts by saving the value of `SP' in `BP' so
-           as to be able to use `BP' as a base pointer to find its
-           parameters on the stack. However, the caller was probably doing
-           this too, so part of the calling convention states that `BP'
-           must be preserved by any C function. Hence the callee, if it is
-           going to set up `BP' as a _frame pointer_, must push the
-           previous value first.
-
-       (*) The callee may then access its parameters relative to `BP'. The
-           word at `BP' holds the previous value of `BP' as it was
-           pushed; the next word, at `BP+2', holds the offset part of the
-           return address, pushed implicitly by `CALL'. In a small-model
-           (near) function, the parameters start after that, at `BP+4';
-           in a large-model (far) function, the segment part of the return
-           address lives at `BP+4', and the parameters begin at `BP+6'.
-           The leftmost parameter of the function, since it was pushed
-           last, is accessible at this offset from `BP'; the others follow,
-           at successively greater offsets. Thus, in a function such as
-           `printf' which takes a variable number of parameters, the
-           pushing of the parameters in reverse order means that the
-           function knows where to find its first parameter, which tells it
-           the number and type of the remaining ones.
-
-       (*) The callee may also wish to decrease `SP' further, so as to
-           allocate space on the stack for local variables, which will then
-           be accessible at negative offsets from `BP'.
-
-       (*) The callee, if it wishes to return a value to the caller, should
-           leave the value in `AL', `AX' or `DX:AX' depending on the size
-           of the value. Floating-point results are sometimes (depending on
-           the compiler) returned in `ST0'.
-
-       (*) Once the callee has finished processing, it restores `SP' from
-           `BP' if it had allocated local stack space, then pops the
-           previous value of `BP', and returns via `RETN' or `RETF'
-           depending on memory model.
-
-       (*) When the caller regains control from the callee, the function
-           parameters are still on the stack, so it typically adds an
-           immediate constant to `SP' to remove them (instead of executing
-           a number of slow `POP' instructions). Thus, if a function is
-           accidentally called with the wrong number of parameters due to a
-           prototype mismatch, the stack will still be returned to a
-           sensible state since the caller, which _knows_ how many
-           parameters it pushed, does the removing.
-
-       It is instructive to compare this calling convention with that for
-       Pascal programs (described in section 9.5.1). Pascal has a simpler
-       convention, since no functions have variable numbers of parameters.
-       Therefore the callee knows how many parameters it should have been
-       passed, and is able to deallocate them from the stack itself by
-       passing an immediate argument to the `RET' or `RETF' instruction, so
-       the caller does not have to do it. Also, the parameters are pushed
-       in left-to-right order, not right-to-left, which means that a
-       compiler can give better guarantees about sequence points without
-       performance suffering.
-
-       Thus, you would define a function in C style in the following way.
-       The following example is for small model:
-
-       global  _myfunc 
-       
-       _myfunc: 
-               push    bp 
-               mov     bp,sp 
-               sub     sp,0x40         ; 64 bytes of local stack space 
-               mov     bx,bp+4       ; first parameter to function 
-       
-               ; some more code 
-       
-               mov     sp,bp           ; undo "sub sp,0x40" above 
-               pop     bp 
-               ret
-
-       For a large-model function, you would replace `RET' by `RETF', and
-       look for the first parameter at `BP+6' instead of `BP+4'. Of
-       course, if one of the parameters is a pointer, then the offsets of
-       _subsequent_ parameters will change depending on the memory model as
-       well: far pointers take up four bytes on the stack when passed as a
-       parameter, whereas near pointers take up two.
-
-       At the other end of the process, to call a C function from your
-       assembly code, you would do something like this:
-
-       extern  _printf 
-       
-             ; and then, further down... 
-       
-             push    word myint        ; one of my integer variables 
-             push    word mystring       ; pointer into my data segment 
-             call    _printf 
-             add     sp,byte 4           ; `byte' saves space 
-       
-             ; then those data items... 
-       
-       segment _DATA 
-       
-       myint         dw    1234 
-       mystring      db    'This number -> %d <- should be 1234',10,0
-
-       This piece of code is the small-model assembly equivalent of the C
-       code
-
-           int myint = 1234; 
-           printf("This number -> %d <- should be 1234\n", myint);
-
-       In large model, the function-call code might look more like this. In
-       this example, it is assumed that `DS' already holds the segment base
-       of the segment `_DATA'. If not, you would have to initialize it
-       first.
-
-             push    word myint 
-             push    word seg mystring   ; Now push the segment, and... 
-             push    word mystring       ; ... offset of "mystring" 
-             call    far _printf 
-             add    sp,byte 6
-
-       The integer value still takes up one word on the stack, since large
-       model does not affect the size of the `int' data type. The first
-       argument (pushed last) to `printf', however, is a data pointer, and
-       therefore has to contain a segment and offset part. The segment
-       should be stored second in memory, and therefore must be pushed
-       first. (Of course, `PUSH DS' would have been a shorter instruction
-       than `PUSH WORD SEG mystring', if `DS' was set up as the above
-       example assumed.) Then the actual call becomes a far call, since
-       functions expect far calls in large model; and `SP' has to be
-       increased by 6 rather than 4 afterwards to make up for the extra
-       word of parameters.
-
- 9.4.4 Accessing Data Items
-
-       To get at the contents of C variables, or to declare variables which
-       C can access, you need only declare the names as `GLOBAL' or
-       `EXTERN'. (Again, the names require leading underscores, as stated
-       in section 9.4.1.) Thus, a C variable declared as `int i' can be
-       accessed from assembler as
-
-       extern _i 
-       
-               mov ax,_i
-
-       And to declare your own integer variable which C programs can access
-       as `extern int j', you do this (making sure you are assembling in
-       the `_DATA' segment, if necessary):
-
-       global  _j 
-       
-       _j      dw      0
-
-       To access a C array, you need to know the size of the components of
-       the array. For example, `int' variables are two bytes long, so if a
-       C program declares an array as `int a10', you can access `a3' by
-       coding `mov ax,_a+6'. (The byte offset 6 is obtained by
-       multiplying the desired array index, 3, by the size of the array
-       element, 2.) The sizes of the C base types in 16-bit compilers are:
-       1 for `char', 2 for `short' and `int', 4 for `long' and `float', and
-       8 for `double'.
-
-       To access a C data structure, you need to know the offset from the
-       base of the structure to the field you are interested in. You can
-       either do this by converting the C structure definition into a NASM
-       structure definition (using `STRUC'), or by calculating the one
-       offset and using just that.
-
-       To do either of these, you should read your C compiler's manual to
-       find out how it organizes data structures. NASM gives no special
-       alignment to structure members in its own `STRUC' macro, so you have
-       to specify alignment yourself if the C compiler generates it.
-       Typically, you might find that a structure like
-
-       struct { 
-           char c; 
-           int i; 
-       } foo;
-
-       might be four bytes long rather than three, since the `int' field
-       would be aligned to a two-byte boundary. However, this sort of
-       feature tends to be a configurable option in the C compiler, either
-       using command-line options or `#pragma' lines, so you have to find
-       out how your own compiler does it.
-
- 9.4.5 `c16.mac': Helper Macros for the 16-bit C Interface
-
-       Included in the NASM archives, in the `misc' directory, is a file
-       `c16.mac' of macros. It defines three macros: `proc', `arg' and
-       `endproc'. These are intended to be used for C-style procedure
-       definitions, and they automate a lot of the work involved in keeping
-       track of the calling convention.
-
-       (An alternative, TASM compatible form of `arg' is also now built
-       into NASM's preprocessor. See section 4.10 for details.)
-
-       An example of an assembly function using the macro set is given
-       here:
-
-       proc    _nearproc 
-       
-       %$i     arg 
-       %$j     arg 
-               mov     ax,bp + %$i 
-               mov     bx,bp + %$j 
-               add     ax,bx 
-       
-       endproc
-
-       This defines `_nearproc' to be a procedure taking two arguments, the
-       first (`i') an integer and the second (`j') a pointer to an integer.
-       It returns `i + *j'.
-
-       Note that the `arg' macro has an `EQU' as the first line of its
-       expansion, and since the label before the macro call gets prepended
-       to the first line of the expanded macro, the `EQU' works, defining
-       `%$i' to be an offset from `BP'. A context-local variable is used,
-       local to the context pushed by the `proc' macro and popped by the
-       `endproc' macro, so that the same argument name can be used in later
-       procedures. Of course, you don't _have_ to do that.
-
-       The macro set produces code for near functions (tiny, small and
-       compact-model code) by default. You can have it generate far
-       functions (medium, large and huge-model code) by means of coding
-       `%define FARCODE'. This changes the kind of return instruction
-       generated by `endproc', and also changes the starting point for the
-       argument offsets. The macro set contains no intrinsic dependency on
-       whether data pointers are far or not.
-
-       `arg' can take an optional parameter, giving the size of the
-       argument. If no size is given, 2 is assumed, since it is likely that
-       many function parameters will be of type `int'.
-
-       The large-model equivalent of the above function would look like
-       this:
-
-       %define FARCODE 
-       
-       proc    _farproc 
-       
-       %$i     arg 
-       %$j     arg     4 
-               mov     ax,bp + %$i 
-               mov     bx,bp + %$j 
-               mov     es,bp + %$j + 2 
-               add     ax,bx 
-       
-       endproc
-
-       This makes use of the argument to the `arg' macro to define a
-       parameter of size 4, because `j' is now a far pointer. When we load
-       from `j', we must load a segment and an offset.
-
-   9.5 Interfacing to Borland Pascal Programs
-
-       Interfacing to Borland Pascal programs is similar in concept to
-       interfacing to 16-bit C programs. The differences are:
-
-       (*) The leading underscore required for interfacing to C programs is
-           not required for Pascal.
-
-       (*) The memory model is always large: functions are far, data
-           pointers are far, and no data item can be more than 64K long.
-           (Actually, some functions are near, but only those functions
-           that are local to a Pascal unit and never called from outside
-           it. All assembly functions that Pascal calls, and all Pascal
-           functions that assembly routines are able to call, are far.)
-           However, all static data declared in a Pascal program goes into
-           the default data segment, which is the one whose segment address
-           will be in `DS' when control is passed to your assembly code.
-           The only things that do not live in the default data segment are
-           local variables (they live in the stack segment) and dynamically
-           allocated variables. All data _pointers_, however, are far.
-
-       (*) The function calling convention is different - described below.
-
-       (*) Some data types, such as strings, are stored differently.
-
-       (*) There are restrictions on the segment names you are allowed to
-           use - Borland Pascal will ignore code or data declared in a
-           segment it doesn't like the name of. The restrictions are
-           described below.
-
- 9.5.1 The Pascal Calling Convention
-
-       The 16-bit Pascal calling convention is as follows. In the following
-       description, the words _caller_ and _callee_ are used to denote the
-       function doing the calling and the function which gets called.
-
-       (*) The caller pushes the function's parameters on the stack, one
-           after another, in normal order (left to right, so that the first
-           argument specified to the function is pushed first).
-
-       (*) The caller then executes a far `CALL' instruction to pass
-           control to the callee.
-
-       (*) The callee receives control, and typically (although this is not
-           actually necessary, in functions which do not need to access
-           their parameters) starts by saving the value of `SP' in `BP' so
-           as to be able to use `BP' as a base pointer to find its
-           parameters on the stack. However, the caller was probably doing
-           this too, so part of the calling convention states that `BP'
-           must be preserved by any function. Hence the callee, if it is
-           going to set up `BP' as a frame pointer, must push the previous
-           value first.
-
-       (*) The callee may then access its parameters relative to `BP'. The
-           word at `BP' holds the previous value of `BP' as it was
-           pushed. The next word, at `BP+2', holds the offset part of the
-           return address, and the next one at `BP+4' the segment part.
-           The parameters begin at `BP+6'. The rightmost parameter of the
-           function, since it was pushed last, is accessible at this offset
-           from `BP'; the others follow, at successively greater offsets.
-
-       (*) The callee may also wish to decrease `SP' further, so as to
-           allocate space on the stack for local variables, which will then
-           be accessible at negative offsets from `BP'.
-
-       (*) The callee, if it wishes to return a value to the caller, should
-           leave the value in `AL', `AX' or `DX:AX' depending on the size
-           of the value. Floating-point results are returned in `ST0'.
-           Results of type `Real' (Borland's own custom floating-point data
-           type, not handled directly by the FPU) are returned in
-           `DX:BX:AX'. To return a result of type `String', the caller
-           pushes a pointer to a temporary string before pushing the
-           parameters, and the callee places the returned string value at
-           that location. The pointer is not a parameter, and should not be
-           removed from the stack by the `RETF' instruction.
-
-       (*) Once the callee has finished processing, it restores `SP' from
-           `BP' if it had allocated local stack space, then pops the
-           previous value of `BP', and returns via `RETF'. It uses the form
-           of `RETF' with an immediate parameter, giving the number of
-           bytes taken up by the parameters on the stack. This causes the
-           parameters to be removed from the stack as a side effect of the
-           return instruction.
-
-       (*) When the caller regains control from the callee, the function
-           parameters have already been removed from the stack, so it needs
-           to do nothing further.
-
-       Thus, you would define a function in Pascal style, taking two
-       `Integer'-type parameters, in the following way:
-
-       global  myfunc 
-       
-       myfunc: push    bp 
-               mov     bp,sp 
-               sub     sp,0x40         ; 64 bytes of local stack space 
-               mov     bx,bp+8       ; first parameter to function 
-               mov     bx,bp+6       ; second parameter to function 
-       
-               ; some more code 
-       
-               mov     sp,bp           ; undo "sub sp,0x40" above 
-               pop     bp 
-               retf    4               ; total size of params is 4
-
-       At the other end of the process, to call a Pascal function from your
-       assembly code, you would do something like this:
-
-       extern  SomeFunc 
-       
-              ; and then, further down... 
-       
-              push   word seg mystring   ; Now push the segment, and... 
-              push   word mystring       ; ... offset of "mystring" 
-              push   word myint        ; one of my variables 
-              call   far SomeFunc
-
-       This is equivalent to the Pascal code
-
-       procedure SomeFunc(String: PChar; Int: Integer); 
-           SomeFunc(@mystring, myint);
-
- 9.5.2 Borland Pascal Segment Name Restrictions
-
-       Since Borland Pascal's internal unit file format is completely
-       different from `OBJ', it only makes a very sketchy job of actually
-       reading and understanding the various information contained in a
-       real `OBJ' file when it links that in. Therefore an object file
-       intended to be linked to a Pascal program must obey a number of
-       restrictions:
-
-       (*) Procedures and functions must be in a segment whose name is
-           either `CODE', `CSEG', or something ending in `_TEXT'.
-
-       (*) initialized data must be in a segment whose name is either
-           `CONST' or something ending in `_DATA'.
-
-       (*) Uninitialized data must be in a segment whose name is either
-           `DATA', `DSEG', or something ending in `_BSS'.
-
-       (*) Any other segments in the object file are completely ignored.
-           `GROUP' directives and segment attributes are also ignored.
-
- 9.5.3 Using `c16.mac' With Pascal Programs
-
-       The `c16.mac' macro package, described in section 9.4.5, can also be
-       used to simplify writing functions to be called from Pascal
-       programs, if you code `%define PASCAL'. This definition ensures that
-       functions are far (it implies `FARCODE'), and also causes procedure
-       return instructions to be generated with an operand.
-
-       Defining `PASCAL' does not change the code which calculates the
-       argument offsets; you must declare your function's arguments in
-       reverse order. For example:
-
-       %define PASCAL 
-       
-       proc    _pascalproc 
-       
-       %$j     arg 4 
-       %$i     arg 
-               mov     ax,bp + %$i 
-               mov     bx,bp + %$j 
-               mov     es,bp + %$j + 2 
-               add     ax,bx 
-       
-       endproc
-
-       This defines the same routine, conceptually, as the example in
-       section 9.4.5: it defines a function taking two arguments, an
-       integer and a pointer to an integer, which returns the sum of the
-       integer and the contents of the pointer. The only difference between
-       this code and the large-model C version is that `PASCAL' is defined
-       instead of `FARCODE', and that the arguments are declared in reverse
-       order.
-
-Chapter 10: Writing 32-bit Code (Unix, Win32, DJGPP)
-----------------------------------------------------
-
-       This chapter attempts to cover some of the common issues involved
-       when writing 32-bit code, to run under Win32 or Unix, or to be
-       linked with C code generated by a Unix-style C compiler such as
-       DJGPP. It covers how to write assembly code to interface with 32-bit
-       C routines, and how to write position-independent code for shared
-       libraries.
-
-       Almost all 32-bit code, and in particular all code running under
-       `Win32', `DJGPP' or any of the PC Unix variants, runs in _flat_
-       memory model. This means that the segment registers and paging have
-       already been set up to give you the same 32-bit 4Gb address space no
-       matter what segment you work relative to, and that you should ignore
-       all segment registers completely. When writing flat-model
-       application code, you never need to use a segment override or modify
-       any segment register, and the code-section addresses you pass to
-       `CALL' and `JMP' live in the same address space as the data-section
-       addresses you access your variables by and the stack-section
-       addresses you access local variables and procedure parameters by.
-       Every address is 32 bits long and contains only an offset part.
-
-  10.1 Interfacing to 32-bit C Programs
-
-       A lot of the discussion in section 9.4, about interfacing to 16-bit
-       C programs, still applies when working in 32 bits. The absence of
-       memory models or segmentation worries simplifies things a lot.
-
-10.1.1 External Symbol Names
-
-       Most 32-bit C compilers share the convention used by 16-bit
-       compilers, that the names of all global symbols (functions or data)
-       they define are formed by prefixing an underscore to the name as it
-       appears in the C program. However, not all of them do: the `ELF'
-       specification states that C symbols do _not_ have a leading
-       underscore on their assembly-language names.
-
-       The older Linux `a.out' C compiler, all `Win32' compilers, `DJGPP',
-       and `NetBSD' and `FreeBSD', all use the leading underscore; for
-       these compilers, the macros `cextern' and `cglobal', as given in
-       section 9.4.1, will still work. For `ELF', though, the leading
-       underscore should not be used.
-
-       See also section 2.1.28.
-
-10.1.2 Function Definitions and Function Calls
-
-       The C calling convention in 32-bit programs is as follows. In the
-       following description, the words _caller_ and _callee_ are used to
-       denote the function doing the calling and the function which gets
-       called.
-
-       (*) The caller pushes the function's parameters on the stack, one
-           after another, in reverse order (right to left, so that the
-           first argument specified to the function is pushed last).
-
-       (*) The caller then executes a near `CALL' instruction to pass
-           control to the callee.
-
-       (*) The callee receives control, and typically (although this is not
-           actually necessary, in functions which do not need to access
-           their parameters) starts by saving the value of `ESP' in `EBP'
-           so as to be able to use `EBP' as a base pointer to find its
-           parameters on the stack. However, the caller was probably doing
-           this too, so part of the calling convention states that `EBP'
-           must be preserved by any C function. Hence the callee, if it is
-           going to set up `EBP' as a frame pointer, must push the previous
-           value first.
-
-       (*) The callee may then access its parameters relative to `EBP'. The
-           doubleword at `EBP' holds the previous value of `EBP' as it
-           was pushed; the next doubleword, at `EBP+4', holds the return
-           address, pushed implicitly by `CALL'. The parameters start after
-           that, at `EBP+8'. The leftmost parameter of the function,
-           since it was pushed last, is accessible at this offset from
-           `EBP'; the others follow, at successively greater offsets. Thus,
-           in a function such as `printf' which takes a variable number of
-           parameters, the pushing of the parameters in reverse order means
-           that the function knows where to find its first parameter, which
-           tells it the number and type of the remaining ones.
-
-       (*) The callee may also wish to decrease `ESP' further, so as to
-           allocate space on the stack for local variables, which will then
-           be accessible at negative offsets from `EBP'.
-
-       (*) The callee, if it wishes to return a value to the caller, should
-           leave the value in `AL', `AX' or `EAX' depending on the size of
-           the value. Floating-point results are typically returned in
-           `ST0'.
-
-       (*) Once the callee has finished processing, it restores `ESP' from
-           `EBP' if it had allocated local stack space, then pops the
-           previous value of `EBP', and returns via `RET' (equivalently,
-           `RETN').
-
-       (*) When the caller regains control from the callee, the function
-           parameters are still on the stack, so it typically adds an
-           immediate constant to `ESP' to remove them (instead of executing
-           a number of slow `POP' instructions). Thus, if a function is
-           accidentally called with the wrong number of parameters due to a
-           prototype mismatch, the stack will still be returned to a
-           sensible state since the caller, which _knows_ how many
-           parameters it pushed, does the removing.
-
-       There is an alternative calling convention used by Win32 programs
-       for Windows API calls, and also for functions called _by_ the
-       Windows API such as window procedures: they follow what Microsoft
-       calls the `__stdcall' convention. This is slightly closer to the
-       Pascal convention, in that the callee clears the stack by passing a
-       parameter to the `RET' instruction. However, the parameters are
-       still pushed in right-to-left order.
-
-       Thus, you would define a function in C style in the following way:
-
-       global  _myfunc 
-       
-       _myfunc: 
-               push    ebp 
-               mov     ebp,esp 
-               sub     esp,0x40        ; 64 bytes of local stack space 
-               mov     ebx,ebp+8     ; first parameter to function 
-       
-               ; some more code 
-       
-               leave                   ; mov esp,ebp / pop ebp 
-               ret
-
-       At the other end of the process, to call a C function from your
-       assembly code, you would do something like this:
-
-       extern  _printf 
-       
-               ; and then, further down... 
-       
-               push    dword myint   ; one of my integer variables 
-               push    dword mystring  ; pointer into my data segment 
-               call    _printf 
-               add     esp,byte 8      ; `byte' saves space 
-       
-               ; then those data items... 
-       
-       segment _DATA 
-       
-       myint       dd   1234 
-       mystring    db   'This number -> %d <- should be 1234',10,0
-
-       This piece of code is the assembly equivalent of the C code
-
-           int myint = 1234; 
-           printf("This number -> %d <- should be 1234\n", myint);
-
-10.1.3 Accessing Data Items
-
-       To get at the contents of C variables, or to declare variables which
-       C can access, you need only declare the names as `GLOBAL' or
-       `EXTERN'. (Again, the names require leading underscores, as stated
-       in section 10.1.1.) Thus, a C variable declared as `int i' can be
-       accessed from assembler as
-
-                 extern _i 
-                 mov eax,_i
-
-       And to declare your own integer variable which C programs can access
-       as `extern int j', you do this (making sure you are assembling in
-       the `_DATA' segment, if necessary):
-
-                 global _j 
-       _j        dd 0
-
-       To access a C array, you need to know the size of the components of
-       the array. For example, `int' variables are four bytes long, so if a
-       C program declares an array as `int a10', you can access `a3' by
-       coding `mov ax,_a+12'. (The byte offset 12 is obtained by
-       multiplying the desired array index, 3, by the size of the array
-       element, 4.) The sizes of the C base types in 32-bit compilers are:
-       1 for `char', 2 for `short', 4 for `int', `long' and `float', and 8
-       for `double'. Pointers, being 32-bit addresses, are also 4 bytes
-       long.
-
-       To access a C data structure, you need to know the offset from the
-       base of the structure to the field you are interested in. You can
-       either do this by converting the C structure definition into a NASM
-       structure definition (using `STRUC'), or by calculating the one
-       offset and using just that.
-
-       To do either of these, you should read your C compiler's manual to
-       find out how it organizes data structures. NASM gives no special
-       alignment to structure members in its own `STRUC' macro, so you have
-       to specify alignment yourself if the C compiler generates it.
-       Typically, you might find that a structure like
-
-       struct { 
-           char c; 
-           int i; 
-       } foo;
-
-       might be eight bytes long rather than five, since the `int' field
-       would be aligned to a four-byte boundary. However, this sort of
-       feature is sometimes a configurable option in the C compiler, either
-       using command-line options or `#pragma' lines, so you have to find
-       out how your own compiler does it.
-
-10.1.4 `c32.mac': Helper Macros for the 32-bit C Interface
-
-       Included in the NASM archives, in the `misc' directory, is a file
-       `c32.mac' of macros. It defines three macros: `proc', `arg' and
-       `endproc'. These are intended to be used for C-style procedure
-       definitions, and they automate a lot of the work involved in keeping
-       track of the calling convention.
-
-       An example of an assembly function using the macro set is given
-       here:
-
-       proc    _proc32 
-       
-       %$i     arg 
-       %$j     arg 
-               mov     eax,ebp + %$i 
-               mov     ebx,ebp + %$j 
-               add     eax,ebx 
-       
-       endproc
-
-       This defines `_proc32' to be a procedure taking two arguments, the
-       first (`i') an integer and the second (`j') a pointer to an integer.
-       It returns `i + *j'.
-
-       Note that the `arg' macro has an `EQU' as the first line of its
-       expansion, and since the label before the macro call gets prepended
-       to the first line of the expanded macro, the `EQU' works, defining
-       `%$i' to be an offset from `BP'. A context-local variable is used,
-       local to the context pushed by the `proc' macro and popped by the
-       `endproc' macro, so that the same argument name can be used in later
-       procedures. Of course, you don't _have_ to do that.
-
-       `arg' can take an optional parameter, giving the size of the
-       argument. If no size is given, 4 is assumed, since it is likely that
-       many function parameters will be of type `int' or pointers.
-
-  10.2 Writing NetBSD/FreeBSD/OpenBSD and Linux/ELF Shared Libraries
-
-       `ELF' replaced the older `a.out' object file format under Linux
-       because it contains support for position-independent code (PIC),
-       which makes writing shared libraries much easier. NASM supports the
-       `ELF' position-independent code features, so you can write Linux
-       `ELF' shared libraries in NASM.
-
-       NetBSD, and its close cousins FreeBSD and OpenBSD, take a different
-       approach by hacking PIC support into the `a.out' format. NASM
-       supports this as the `aoutb' output format, so you can write BSD
-       shared libraries in NASM too.
-
-       The operating system loads a PIC shared library by memory-mapping
-       the library file at an arbitrarily chosen point in the address space
-       of the running process. The contents of the library's code section
-       must therefore not depend on where it is loaded in memory.
-
-       Therefore, you cannot get at your variables by writing code like
-       this:
-
-               mov     eax,myvar             ; WRONG
-
-       Instead, the linker provides an area of memory called the _global
-       offset table_, or GOT; the GOT is situated at a constant distance
-       from your library's code, so if you can find out where your library
-       is loaded (which is typically done using a `CALL' and `POP'
-       combination), you can obtain the address of the GOT, and you can
-       then load the addresses of your variables out of linker-generated
-       entries in the GOT.
-
-       The _data_ section of a PIC shared library does not have these
-       restrictions: since the data section is writable, it has to be
-       copied into memory anyway rather than just paged in from the library
-       file, so as long as it's being copied it can be relocated too. So
-       you can put ordinary types of relocation in the data section without
-       too much worry (but see section 10.2.4 for a caveat).
-
-10.2.1 Obtaining the Address of the GOT
-
-       Each code module in your shared library should define the GOT as an
-       external symbol:
-
-       extern  _GLOBAL_OFFSET_TABLE_   ; in ELF 
-       extern  __GLOBAL_OFFSET_TABLE_  ; in BSD a.out
-
-       At the beginning of any function in your shared library which plans
-       to access your data or BSS sections, you must first calculate the
-       address of the GOT. This is typically done by writing the function
-       in this form:
-
-       func:   push    ebp 
-               mov     ebp,esp 
-               push    ebx 
-               call    .get_GOT 
-       .get_GOT: 
-               pop     ebx 
-               add     ebx,_GLOBAL_OFFSET_TABLE_+$$-.get_GOT wrt ..gotpc 
-       
-               ; the function body comes here 
-       
-               mov     ebx,ebp-4 
-               mov     esp,ebp 
-               pop     ebp 
-               ret
-
-       (For BSD, again, the symbol `_GLOBAL_OFFSET_TABLE' requires a second
-       leading underscore.)
-
-       The first two lines of this function are simply the standard C
-       prologue to set up a stack frame, and the last three lines are
-       standard C function epilogue. The third line, and the fourth to last
-       line, save and restore the `EBX' register, because PIC shared
-       libraries use this register to store the address of the GOT.
-
-       The interesting bit is the `CALL' instruction and the following two
-       lines. The `CALL' and `POP' combination obtains the address of the
-       label `.get_GOT', without having to know in advance where the
-       program was loaded (since the `CALL' instruction is encoded relative
-       to the current position). The `ADD' instruction makes use of one of
-       the special PIC relocation types: GOTPC relocation. With the
-       `WRT ..gotpc' qualifier specified, the symbol referenced (here
-       `_GLOBAL_OFFSET_TABLE_', the special symbol assigned to the GOT) is
-       given as an offset from the beginning of the section. (Actually,
-       `ELF' encodes it as the offset from the operand field of the `ADD'
-       instruction, but NASM simplifies this deliberately, so you do things
-       the same way for both `ELF' and `BSD'.) So the instruction then
-       _adds_ the beginning of the section, to get the real address of the
-       GOT, and subtracts the value of `.get_GOT' which it knows is in
-       `EBX'. Therefore, by the time that instruction has finished, `EBX'
-       contains the address of the GOT.
-
-       If you didn't follow that, don't worry: it's never necessary to
-       obtain the address of the GOT by any other means, so you can put
-       those three instructions into a macro and safely ignore them:
-
-       %macro  get_GOT 0 
-       
-               call    %%getgot 
-         %%getgot: 
-               pop     ebx 
-               add     ebx,_GLOBAL_OFFSET_TABLE_+$$-%%getgot wrt ..gotpc 
-       
-       %endmacro
-
-10.2.2 Finding Your Local Data Items
-
-       Having got the GOT, you can then use it to obtain the addresses of
-       your data items. Most variables will reside in the sections you have
-       declared; they can be accessed using the `..gotoff' special `WRT'
-       type. The way this works is like this:
-
-               lea     eax,ebx+myvar wrt ..gotoff
-
-       The expression `myvar wrt ..gotoff' is calculated, when the shared
-       library is linked, to be the offset to the local variable `myvar'
-       from the beginning of the GOT. Therefore, adding it to `EBX' as
-       above will place the real address of `myvar' in `EAX'.
-
-       If you declare variables as `GLOBAL' without specifying a size for
-       them, they are shared between code modules in the library, but do
-       not get exported from the library to the program that loaded it.
-       They will still be in your ordinary data and BSS sections, so you
-       can access them in the same way as local variables, using the above
-       `..gotoff' mechanism.
-
-       Note that due to a peculiarity of the way BSD `a.out' format handles
-       this relocation type, there must be at least one non-local symbol in
-       the same section as the address you're trying to access.
-
-10.2.3 Finding External and Common Data Items
-
-       If your library needs to get at an external variable (external to
-       the _library_, not just to one of the modules within it), you must
-       use the `..got' type to get at it. The `..got' type, instead of
-       giving you the offset from the GOT base to the variable, gives you
-       the offset from the GOT base to a GOT _entry_ containing the address
-       of the variable. The linker will set up this GOT entry when it
-       builds the library, and the dynamic linker will place the correct
-       address in it at load time. So to obtain the address of an external
-       variable `extvar' in `EAX', you would code
-
-               mov     eax,ebx+extvar wrt ..got
-
-       This loads the address of `extvar' out of an entry in the GOT. The
-       linker, when it builds the shared library, collects together every
-       relocation of type `..got', and builds the GOT so as to ensure it
-       has every necessary entry present.
-
-       Common variables must also be accessed in this way.
-
-10.2.4 Exporting Symbols to the Library User
-
-       If you want to export symbols to the user of the library, you have
-       to declare whether they are functions or data, and if they are data,
-       you have to give the size of the data item. This is because the
-       dynamic linker has to build procedure linkage table entries for any
-       exported functions, and also moves exported data items away from the
-       library's data section in which they were declared.
-
-       So to export a function to users of the library, you must use
-
-       global  func:function           ; declare it as a function 
-       
-       func:   push    ebp 
-       
-               ; etc.
-
-       And to export a data item such as an array, you would have to code
-
-       global  array:data array.end-array      ; give the size too 
-       
-       array:  resd    128 
-       .end:
-
-       Be careful: If you export a variable to the library user, by
-       declaring it as `GLOBAL' and supplying a size, the variable will end
-       up living in the data section of the main program, rather than in
-       your library's data section, where you declared it. So you will have
-       to access your own global variable with the `..got' mechanism rather
-       than `..gotoff', as if it were external (which, effectively, it has
-       become).
-
-       Equally, if you need to store the address of an exported global in
-       one of your data sections, you can't do it by means of the standard
-       sort of code:
-
-       dataptr:        dd      global_data_item        ; WRONG
-
-       NASM will interpret this code as an ordinary relocation, in which
-       `global_data_item' is merely an offset from the beginning of the
-       `.data' section (or whatever); so this reference will end up
-       pointing at your data section instead of at the exported global
-       which resides elsewhere.
-
-       Instead of the above code, then, you must write
-
-       dataptr:        dd      global_data_item wrt ..sym
-
-       which makes use of the special `WRT' type `..sym' to instruct NASM
-       to search the symbol table for a particular symbol at that address,
-       rather than just relocating by section base.
-
-       Either method will work for functions: referring to one of your
-       functions by means of
-
-       funcptr:        dd      my_function
-
-       will give the user the address of the code you wrote, whereas
-
-       funcptr:        dd      my_function wrt ..sym
-
-       will give the address of the procedure linkage table for the
-       function, which is where the calling program will _believe_ the
-       function lives. Either address is a valid way to call the function.
-
-10.2.5 Calling Procedures Outside the Library
-
-       Calling procedures outside your shared library has to be done by
-       means of a _procedure linkage table_, or PLT. The PLT is placed at a
-       known offset from where the library is loaded, so the library code
-       can make calls to the PLT in a position-independent way. Within the
-       PLT there is code to jump to offsets contained in the GOT, so
-       function calls to other shared libraries or to routines in the main
-       program can be transparently passed off to their real destinations.
-
-       To call an external routine, you must use another special PIC
-       relocation type, `WRT ..plt'. This is much easier than the GOT-based
-       ones: you simply replace calls such as `CALL printf' with the PLT-
-       relative version `CALL printf WRT ..plt'.
-
-10.2.6 Generating the Library File
-
-       Having written some code modules and assembled them to `.o' files,
-       you then generate your shared library with a command such as
-
-       ld -shared -o library.so module1.o module2.o       # for ELF 
-       ld -Bshareable -o library.so module1.o module2.o   # for BSD
-
-       For ELF, if your shared library is going to reside in system
-       directories such as `/usr/lib' or `/lib', it is usually worth using
-       the `-soname' flag to the linker, to store the final library file
-       name, with a version number, into the library:
-
-       ld -shared -soname library.so.1 -o library.so.1.2 *.o
-
-       You would then copy `library.so.1.2' into the library directory, and
-       create `library.so.1' as a symbolic link to it.
-
-Chapter 11: Mixing 16- and 32-bit Code
---------------------------------------
-
-       This chapter tries to cover some of the issues, largely related to
-       unusual forms of addressing and jump instructions, encountered when
-       writing operating system code such as protected-mode initialization
-       routines, which require code that operates in mixed segment sizes,
-       such as code in a 16-bit segment trying to modify data in a 32-bit
-       one, or jumps between different-size segments.
-
-  11.1 Mixed-Size Jumps
-
-       The most common form of mixed-size instruction is the one used when
-       writing a 32-bit OS: having done your setup in 16-bit mode, such as
-       loading the kernel, you then have to boot it by switching into
-       protected mode and jumping to the 32-bit kernel start address. In a
-       fully 32-bit OS, this tends to be the _only_ mixed-size instruction
-       you need, since everything before it can be done in pure 16-bit
-       code, and everything after it can be pure 32-bit.
-
-       This jump must specify a 48-bit far address, since the target
-       segment is a 32-bit one. However, it must be assembled in a 16-bit
-       segment, so just coding, for example,
-
-               jmp     0x1234:0x56789ABC       ; wrong!
-
-       will not work, since the offset part of the address will be
-       truncated to `0x9ABC' and the jump will be an ordinary 16-bit far
-       one.
-
-       The Linux kernel setup code gets round the inability of `as86' to
-       generate the required instruction by coding it manually, using `DB'
-       instructions. NASM can go one better than that, by actually
-       generating the right instruction itself. Here's how to do it right:
-
-               jmp     dword 0x1234:0x56789ABC         ; right
-
-       The `DWORD' prefix (strictly speaking, it should come _after_ the
-       colon, since it is declaring the _offset_ field to be a doubleword;
-       but NASM will accept either form, since both are unambiguous) forces
-       the offset part to be treated as far, in the assumption that you are
-       deliberately writing a jump from a 16-bit segment to a 32-bit one.
-
-       You can do the reverse operation, jumping from a 32-bit segment to a
-       16-bit one, by means of the `WORD' prefix:
-
-               jmp     word 0x8765:0x4321      ; 32 to 16 bit
-
-       If the `WORD' prefix is specified in 16-bit mode, or the `DWORD'
-       prefix in 32-bit mode, they will be ignored, since each is
-       explicitly forcing NASM into a mode it was in anyway.
-
-  11.2 Addressing Between Different-Size Segments
-
-       If your OS is mixed 16 and 32-bit, or if you are writing a DOS
-       extender, you are likely to have to deal with some 16-bit segments
-       and some 32-bit ones. At some point, you will probably end up
-       writing code in a 16-bit segment which has to access data in a 32-
-       bit segment, or vice versa.
-
-       If the data you are trying to access in a 32-bit segment lies within
-       the first 64K of the segment, you may be able to get away with using
-       an ordinary 16-bit addressing operation for the purpose; but sooner
-       or later, you will want to do 32-bit addressing from 16-bit mode.
-
-       The easiest way to do this is to make sure you use a register for
-       the address, since any effective address containing a 32-bit
-       register is forced to be a 32-bit address. So you can do
-
-               mov     eax,offset_into_32_bit_segment_specified_by_fs 
-               mov     dword fs:eax,0x11223344
-
-       This is fine, but slightly cumbersome (since it wastes an
-       instruction and a register) if you already know the precise offset
-       you are aiming at. The x86 architecture does allow 32-bit effective
-       addresses to specify nothing but a 4-byte offset, so why shouldn't
-       NASM be able to generate the best instruction for the purpose?
-
-       It can. As in section 11.1, you need only prefix the address with
-       the `DWORD' keyword, and it will be forced to be a 32-bit address:
-
-               mov     dword fs:dword my_offset,0x11223344
-
-       Also as in section 11.1, NASM is not fussy about whether the `DWORD'
-       prefix comes before or after the segment override, so arguably a
-       nicer-looking way to code the above instruction is
-
-               mov     dword dword fs:my_offset,0x11223344
-
-       Don't confuse the `DWORD' prefix _outside_ the square brackets,
-       which controls the size of the data stored at the address, with the
-       one `inside' the square brackets which controls the length of the
-       address itself. The two can quite easily be different:
-
-               mov     word dword 0x12345678,0x9ABC
-
-       This moves 16 bits of data to an address specified by a 32-bit
-       offset.
-
-       You can also specify `WORD' or `DWORD' prefixes along with the `FAR'
-       prefix to indirect far jumps or calls. For example:
-
-               call    dword far fs:word 0x4321
-
-       This instruction contains an address specified by a 16-bit offset;
-       it loads a 48-bit far pointer from that (16-bit segment and 32-bit
-       offset), and calls that address.
-
-  11.3 Other Mixed-Size Instructions
-
-       The other way you might want to access data might be using the
-       string instructions (`LODSx', `STOSx' and so on) or the `XLATB'
-       instruction. These instructions, since they take no parameters,
-       might seem to have no easy way to make them perform 32-bit
-       addressing when assembled in a 16-bit segment.
-
-       This is the purpose of NASM's `a16', `a32' and `a64' prefixes. If
-       you are coding `LODSB' in a 16-bit segment but it is supposed to be
-       accessing a string in a 32-bit segment, you should load the desired
-       address into `ESI' and then code
-
-               a32     lodsb
-
-       The prefix forces the addressing size to 32 bits, meaning that
-       `LODSB' loads from `DS:ESI' instead of `DS:SI'. To access a
-       string in a 16-bit segment when coding in a 32-bit one, the
-       corresponding `a16' prefix can be used.
-
-       The `a16', `a32' and `a64' prefixes can be applied to any
-       instruction in NASM's instruction table, but most of them can
-       generate all the useful forms without them. The prefixes are
-       necessary only for instructions with implicit addressing: `CMPSx',
-       `SCASx', `LODSx', `STOSx', `MOVSx', `INSx', `OUTSx', and `XLATB'.
-       Also, the various push and pop instructions (`PUSHA' and `POPF' as
-       well as the more usual `PUSH' and `POP') can accept `a16', `a32' or
-       `a64' prefixes to force a particular one of `SP', `ESP' or `RSP' to
-       be used as a stack pointer, in case the stack segment in use is a
-       different size from the code segment.
-
-       `PUSH' and `POP', when applied to segment registers in 32-bit mode,
-       also have the slightly odd behaviour that they push and pop 4 bytes
-       at a time, of which the top two are ignored and the bottom two give
-       the value of the segment register being manipulated. To force the
-       16-bit behaviour of segment-register push and pop instructions, you
-       can use the operand-size prefix `o16':
-
-               o16 push    ss 
-               o16 push    ds
-
-       This code saves a doubleword of stack space by fitting two segment
-       registers into the space which would normally be consumed by pushing
-       one.
-
-       (You can also use the `o32' prefix to force the 32-bit behaviour
-       when in 16-bit mode, but this seems less useful.)
-
-Chapter 12: Writing 64-bit Code (Unix, Win64)
----------------------------------------------
-
-       This chapter attempts to cover some of the common issues involved
-       when writing 64-bit code, to run under Win64 or Unix. It covers how
-       to write assembly code to interface with 64-bit C routines, and how
-       to write position-independent code for shared libraries.
-
-       All 64-bit code uses a flat memory model, since segmentation is not
-       available in 64-bit mode. The one exception is the `FS' and `GS'
-       registers, which still add their bases.
-
-       Position independence in 64-bit mode is significantly simpler, since
-       the processor supports `RIP'-relative addressing directly; see the
-       `REL' keyword (section 3.3). On most 64-bit platforms, it is
-       probably desirable to make that the default, using the directive
-       `DEFAULT REL' (section 7.2).
-
-       64-bit programming is relatively similar to 32-bit programming, but
-       of course pointers are 64 bits long; additionally, all existing
-       platforms pass arguments in registers rather than on the stack.
-       Furthermore, 64-bit platforms use SSE2 by default for floating
-       point. Please see the ABI documentation for your platform.
-
-       64-bit platforms differ in the sizes of the C/C++ fundamental
-       datatypes, not just from 32-bit platforms but from each other. If a
-       specific size data type is desired, it is probably best to use the
-       types defined in the standard C header `<inttypes.h>'.
-
-       All known 64-bit platforms except some embedded platforms require
-       that the stack is 16-byte aligned at the entry to a function. In
-       order to enforce that, the stack pointer (`RSP') needs to be aligned
-       on an `odd' multiple of 8 bytes before the `CALL' instruction.
-
-       In 64-bit mode, the default instruction size is still 32 bits. When
-       loading a value into a 32-bit register (but not an 8- or 16-bit
-       register), the upper 32 bits of the corresponding 64-bit register
-       are set to zero.
-
-  12.1 Register Names in 64-bit Mode
-
-       NASM uses the following names for general-purpose registers in 64-
-       bit mode, for 8-, 16-, 32- and 64-bit references, respectively:
-
-            AL/AH, CL/CH, DL/DH, BL/BH, SPL, BPL, SIL, DIL, R8B-R15B 
-            AX, CX, DX, BX, SP, BP, SI, DI, R8W-R15W 
-            EAX, ECX, EDX, EBX, ESP, EBP, ESI, EDI, R8D-R15D 
-            RAX, RCX, RDX, RBX, RSP, RBP, RSI, RDI, R8-R15
-
-       This is consistent with the AMD documentation and most other
-       assemblers. The Intel documentation, however, uses the names
-       `R8L-R15L' for 8-bit references to the higher registers. It is
-       possible to use those names by definiting them as macros; similarly,
-       if one wants to use numeric names for the low 8 registers, define
-       them as macros. The standard macro package `altreg' (see section
-       6.1) can be used for this purpose.
-
-  12.2 Immediates and Displacements in 64-bit Mode
-
-       In 64-bit mode, immediates and displacements are generally only 32
-       bits wide. NASM will therefore truncate most displacements and
-       immediates to 32 bits.
-
-       The only instruction which takes a full 64-bit immediate is:
-
-            MOV reg64,imm64
-
-       NASM will produce this instruction whenever the programmer uses
-       `MOV' with an immediate into a 64-bit register. If this is not
-       desirable, simply specify the equivalent 32-bit register, which will
-       be automatically zero-extended by the processor, or specify the
-       immediate as `DWORD':
-
-            mov rax,foo             ; 64-bit immediate 
-            mov rax,qword foo       ; (identical) 
-            mov eax,foo             ; 32-bit immediate, zero-extended 
-            mov rax,dword foo       ; 32-bit immediate, sign-extended
-
-       The length of these instructions are 10, 5 and 7 bytes,
-       respectively.
-
-       If optimization is enabled and NASM can determine at assembly time
-       that a shorter instruction will suffice, the shorter instruction
-       will be emitted unless of course `STRICT QWORD' or `STRICT DWORD' is
-       specified (see section 3.7):
-
-            mov rax,1               ; Assembles as "mov eax,1" (5 bytes) 
-            mov rax,strict qword 1  ; Full 10-byte instruction 
-            mov rax,strict dword 1  ; 7-byte instruction 
-            mov rax,symbol          ; 10 bytes, not known at assembly time 
-            lea rax,rel symbol    ; 7 bytes, usually preferred by the ABI
-
-       Note that `lea rax,rel symbol' is position-independent, whereas
-       `mov rax,symbol' is not. Most ABIs prefer or even require position-
-       independent code in 64-bit mode. However, the `MOV' instruction is
-       able to reference a symbol anywhere in the 64-bit address space,
-       whereas `LEA' is only able to access a symbol within within 2 GB of
-       the instruction itself (see below.)
-
-       The only instructions which take a full 64-bit _displacement_ is
-       loading or storing, using `MOV', `AL', `AX', `EAX' or `RAX' (but no
-       other registers) to an absolute 64-bit address. Since this is a
-       relatively rarely used instruction (64-bit code generally uses
-       relative addressing), the programmer has to explicitly declare the
-       displacement size as `ABS QWORD':
-
-            default abs 
-       
-            mov eax,foo           ; 32-bit absolute disp, sign-extended 
-            mov eax,a32 foo       ; 32-bit absolute disp, zero-extended 
-            mov eax,qword foo     ; 64-bit absolute disp 
-       
-            default rel 
-       
-            mov eax,foo           ; 32-bit relative disp 
-            mov eax,a32 foo       ; d:o, address truncated to 32 bits(!) 
-            mov eax,qword foo     ; error 
-            mov eax,abs qword foo ; 64-bit absolute disp
-
-       A sign-extended absolute displacement can access from -2 GB to +2
-       GB; a zero-extended absolute displacement can access from 0 to 4 GB.
-
-  12.3 Interfacing to 64-bit C Programs (Unix)
-
-       On Unix, the 64-bit ABI as well as the x32 ABI (32-bit ABI with the
-       CPU in 64-bit mode) is defined by the documents at:
-
-       `http://www.nasm.us/abi/unix64'
-
-       Although written for AT&T-syntax assembly, the concepts apply
-       equally well for NASM-style assembly. What follows is a simplified
-       summary.
-
-       The first six integer arguments (from the left) are passed in `RDI',
-       `RSI', `RDX', `RCX', `R8', and `R9', in that order. Additional
-       integer arguments are passed on the stack. These registers, plus
-       `RAX', `R10' and `R11' are destroyed by function calls, and thus are
-       available for use by the function without saving.
-
-       Integer return values are passed in `RAX' and `RDX', in that order.
-
-       Floating point is done using SSE registers, except for
-       `long double', which is 80 bits (`TWORD') on most platforms (Android
-       is one exception; there `long double' is 64 bits and treated the
-       same as `double'.) Floating-point arguments are passed in `XMM0' to
-       `XMM7'; return is `XMM0' and `XMM1'. `long double' are passed on the
-       stack, and returned in `ST0' and `ST1'.
-
-       All SSE and x87 registers are destroyed by function calls.
-
-       On 64-bit Unix, `long' is 64 bits.
-
-       Integer and SSE register arguments are counted separately, so for
-       the case of
-
-            void foo(long a, double b, int c)
-
-       `a' is passed in `RDI', `b' in `XMM0', and `c' in `ESI'.
-
-  12.4 Interfacing to 64-bit C Programs (Win64)
-
-       The Win64 ABI is described by the document at:
-
-       `http://www.nasm.us/abi/win64'
-
-       What follows is a simplified summary.
-
-       The first four integer arguments are passed in `RCX', `RDX', `R8'
-       and `R9', in that order. Additional integer arguments are passed on
-       the stack. These registers, plus `RAX', `R10' and `R11' are
-       destroyed by function calls, and thus are available for use by the
-       function without saving.
-
-       Integer return values are passed in `RAX' only.
-
-       Floating point is done using SSE registers, except for
-       `long double'. Floating-point arguments are passed in `XMM0' to
-       `XMM3'; return is `XMM0' only.
-
-       On Win64, `long' is 32 bits; `long long' or `_int64' is 64 bits.
-
-       Integer and SSE register arguments are counted together, so for the
-       case of
-
-            void foo(long long a, double b, int c)
-
-       `a' is passed in `RCX', `b' in `XMM1', and `c' in `R8D'.
-
-Chapter 13: Troubleshooting
----------------------------
-
-       This chapter describes some of the common problems that users have
-       been known to encounter with NASM, and answers them. If you think
-       you have found a bug in NASM, please see section E.2.
-
-  13.1 Common Problems
-
-13.1.1 NASM Generates Inefficient Code
-
-       We sometimes get `bug' reports about NASM generating inefficient, or
-       even `wrong', code on instructions such as `ADD ESP,8'. This is a
-       deliberate design feature, connected to predictability of output:
-       NASM, on seeing `ADD ESP,8', will generate the form of the
-       instruction which leaves room for a 32-bit offset. You need to code
-       `ADD ESP,BYTE 8' if you want the space-efficient form of the
-       instruction. This isn't a bug, it's user error: if you prefer to
-       have NASM produce the more efficient code automatically enable
-       optimization with the `-O' option (see section 2.1.24).
-
-13.1.2 My Jumps are Out of Range
-
-       Similarly, people complain that when they issue conditional jumps
-       (which are `SHORT' by default) that try to jump too far, NASM
-       reports `short jump out of range' instead of making the jumps
-       longer.
-
-       This, again, is partly a predictability issue, but in fact has a
-       more practical reason as well. NASM has no means of being told what
-       type of processor the code it is generating will be run on; so it
-       cannot decide for itself that it should generate `Jcc NEAR' type
-       instructions, because it doesn't know that it's working for a 386 or
-       above. Alternatively, it could replace the out-of-range short `JNE'
-       instruction with a very short `JE' instruction that jumps over a
-       `JMP NEAR'; this is a sensible solution for processors below a 386,
-       but hardly efficient on processors which have good branch prediction
-       _and_ could have used `JNE NEAR' instead. So, once again, it's up to
-       the user, not the assembler, to decide what instructions should be
-       generated. See section 2.1.24.
-
-13.1.3 `ORG' Doesn't Work
-
-       People writing boot sector programs in the `bin' format often
-       complain that `ORG' doesn't work the way they'd like: in order to
-       place the `0xAA55' signature word at the end of a 512-byte boot
-       sector, people who are used to MASM tend to code
-
-               ORG 0 
-       
-               ; some boot sector code 
-       
-               ORG 510 
-               DW 0xAA55
-
-       This is not the intended use of the `ORG' directive in NASM, and
-       will not work. The correct way to solve this problem in NASM is to
-       use the `TIMES' directive, like this:
-
-               ORG 0 
-       
-               ; some boot sector code 
-       
-               TIMES 510-($-$$) DB 0 
-               DW 0xAA55
-
-       The `TIMES' directive will insert exactly enough zero bytes into the
-       output to move the assembly point up to 510. This method also has
-       the advantage that if you accidentally fill your boot sector too
-       full, NASM will catch the problem at assembly time and report it, so
-       you won't end up with a boot sector that you have to disassemble to
-       find out what's wrong with it.
-
-13.1.4 `TIMES' Doesn't Work
-
-       The other common problem with the above code is people who write the
-       `TIMES' line as
-
-               TIMES 510-$ DB 0
-
-       by reasoning that `$' should be a pure number, just like 510, so the
-       difference between them is also a pure number and can happily be fed
-       to `TIMES'.
-
-       NASM is a _modular_ assembler: the various component parts are
-       designed to be easily separable for re-use, so they don't exchange
-       information unnecessarily. In consequence, the `bin' output format,
-       even though it has been told by the `ORG' directive that the `.text'
-       section should start at 0, does not pass that information back to
-       the expression evaluator. So from the evaluator's point of view, `$'
-       isn't a pure number: it's an offset from a section base. Therefore
-       the difference between `$' and 510 is also not a pure number, but
-       involves a section base. Values involving section bases cannot be
-       passed as arguments to `TIMES'.
-
-       The solution, as in the previous section, is to code the `TIMES'
-       line in the form
-
-               TIMES 510-($-$$) DB 0
-
-       in which `$' and `$$' are offsets from the same section base, and so
-       their difference is a pure number. This will solve the problem and
-       generate sensible code.
-
-Appendix A: List of Warning Classes
------------------------------------
-
-       These are the warning classes currently defined by NASM for the
-       purpose of enabling, disabling and promoting to error. See section
-       2.1.26 and section 7.13.
-
-       (*)  `all': all possible warnings
-
-           `all' is an group alias for _all_ warning classes. Thus,
-           `-w+all' enables all available warnings, and `-w-all' disables
-           warnings entirely (since NASM 2.13).
-
-       (*)  `bad-pragma': malformed %pragma
-
-           `bad-pragma' is a backwards compatibility alias for
-           `pragma-bad'.
-
-       (*)  `bnd': invalid BND prefix
-
-           `bnd' is a backwards compatibility alias for `prefix-bnd'.
-
-       (*)  `db-empty': no operand for data declaration
-
-           `db-empty' warns about a `DB', `DW', etc declaration with no
-           operands, producing no output. This is permitted, but often
-           indicative of an error. See section 3.2.1.
-
-           Enabled by default.
-
-       (*)  `ea': all `ea-' warnings
-
-           `ea' is a group alias for all warning classes prefixed by `ea-';
-           currently `ea-absolute' and `ea-dispsize'.
-
-       (*)  `ea-absolute': absolute address cannot be RIP-relative
-
-           `ea-absolute' warns that an address that is inherently absolute
-           cannot be generated with RIP-relative encoding using `REL', see
-           section 7.2.1.
-
-           Enabled by default.
-
-       (*)  `ea-dispsize': displacement size ignored on absolute address
-
-           `ea-dispsize' warns that NASM does not support generating
-           displacements for inherently absolute addresses that do not
-           match the address size of the instruction.
-
-           Enabled by default.
-
-       (*)  `environment': nonexistent environment variable
-
-           `environment' is a backwards compatibility alias for
-           `pp-environment'.
-
-       (*)  `float': all `float-' warnings
-
-           `float' is a group alias for all warning classes prefixed by
-           `float-'; currently `float-denorm', `float-overflow',
-           `float-toolong', `float-underflow'.
-
-       (*)  `float-denorm': floating point denormal
-
-           `float-denorm' warns about denormal floating point constants.
-
-           Disabled by default.
-
-       (*)  `float-overflow': floating point overflow
-
-           `float-overflow' warns about floating point underflow.
-
-           Enabled by default.
-
-       (*)  `float-toolong': too many digits in floating-point number
-
-           `float-toolong' warns about too many digits in floating-point
-           numbers.
-
-           Enabled by default.
-
-       (*)  `float-underflow': floating point underflow
-
-           `float-underflow' warns about floating point underflow (a
-           nonzero constant rounded to zero.)
-
-           Disabled by default.
-
-       (*)  `forward': forward reference may have unpredictable results
-
-           `forward' warns that a forward reference is used which may have
-           unpredictable results, notably in a `RESB'-type pseudo-
-           instruction. These would be _critical expressions_ (see section
-           3.8) but are permitted in a handful of cases for compatibility
-           with older versions of NASM. This warning should be treated as a
-           severe programming error as the code could break at any time for
-           any number of reasons.
-
-           Enabled by default.
-
-       (*)  `hle': invalid HLE prefix
-
-           `hle' is a backwards compatibility alias for `prefix-hle'.
-
-       (*)  `label': all `label-' warnings
-
-           `label' is a group alias for all warning classes prefixed by
-           `label-'; currently `label-orphan', `label-redef',
-           `label-redef-late'.
-
-       (*)  `label-orphan': labels alone on lines without trailing `:'
-
-           `label-orphan' warns about source lines which contain no
-           instruction but define a label without a trailing colon. This is
-           most likely indicative of a typo, but is technically correct
-           NASM syntax (see section 3.1.)
-
-           Enabled by default.
-
-       (*)  `label-redef': label redefined to an identical value
-
-           `label-redef' warns if a label is defined more than once, but
-           the value is identical. It is an unconditional error to define
-           the same label more than once to _different_ values.
-
-           Disabled by default.
-
-       (*)  `label-redef-late': label (re)defined during code generation
-
-           `label-redef-late' the value of a label changed during the
-           final, code-generation pass. This may be the result of strange
-           use of the preprocessor. This is very likely to produce
-           incorrect code and may end up being an unconditional error in a
-           future version of NASM.
-
-           Enabled and promoted to error by default.
-
-       (*)  `lock': LOCK prefix on unlockable instructions
-
-           `lock' is a backwards compatibility alias for `prefix-lock'.
-
-       (*)  `macro-def-case-single': single-line macro defined both case
-           sensitive and insensitive
-
-           `macro-def-case-single' is a backwards compatibility alias for
-           `pp-macro-def-case-single'.
-
-       (*)  `macro-def-greedy-single': single-line macro
-
-           `macro-def-greedy-single' is a backwards compatibility alias for
-           `pp-macro-def-greedy-single'.
-
-       (*)  `macro-def-param-single': single-line macro defined with and
-           without parameters
-
-           `macro-def-param-single' is a backwards compatibility alias for
-           `pp-macro-def-param-single'.
-
-       (*)  `macro-defaults': macros with more default than optional
-           parameters
-
-           `macro-defaults' is a backwards compatibility alias for
-           `pp-macro-defaults'.
-
-       (*)  `macro-params-legacy': improperly calling multi-line macro for
-           legacy support
-
-           `macro-params-legacy' is a backwards compatibility alias for
-           `pp-macro-params-legacy'.
-
-       (*)  `macro-params-multi': multi-line macro calls with wrong
-           parameter count
-
-           `macro-params-multi' is a backwards compatibility alias for
-           `pp-macro-params-multi'.
-
-       (*)  `macro-params-single': single-line macro calls with wrong
-           parameter count
-
-           `macro-params-single' is a backwards compatibility alias for
-           `pp-macro-params-single'.
-
-       (*)  `negative-rep': regative %rep count
-
-           `negative-rep' is a backwards compatibility alias for
-           `pp-rep-negative'.
-
-       (*)  `not-my-pragma': %pragma not applicable to this compilation
-
-           `not-my-pragma' is a backwards compatibility alias for
-           `pragma-na'.
-
-       (*)  `number-overflow': numeric constant does not fit
-
-           `number-overflow' covers warnings about numeric constants which
-           don't fit in 64 bits.
-
-           Enabled by default.
-
-       (*)  `obsolete': all `obsolete-' warnings
-
-           `obsolete' is a group alias for all warning classes prefixed by
-           `obsolete-'; currently `obsolete-nop', `obsolete-removed',
-           `obsolete-valid'.
-
-       (*)  `obsolete-nop': instruction obsolete and is a noop on the
-           target CPU
-
-           `obsolete-nop' warns for an instruction which has been removed
-           from the architecture, but has been architecturally defined to
-           be a noop for future CPUs.
-
-           Enabled by default.
-
-       (*)  `obsolete-removed': instruction obsolete and removed on the
-           target CPU
-
-           `obsolete-removed' warns for an instruction which has been
-           removed from the architecture, and is no longer included in the
-           CPU definition given in the `CPU' directive, for example
-           `POP CS', the opcode for which, `0Fh', instead is an opcode
-           prefix on CPUs newer than the first generation 8086.
-
-           Enabled by default.
-
-       (*)  `obsolete-valid': instruction obsolete but valid on the target
-           CPU
-
-           `obsolete-valid' warns for an instruction which has been removed
-           from the architecture, but is still valid on the specific CPU
-           given in the `CPU' directive. Code using these instructions is
-           most likely not forward compatible.
-
-           Enabled by default.
-
-       (*)  `orphan-labels': labels alone on lines without trailing `:'
-
-           `orphan-labels' is a backwards compatibility alias for
-           `label-orphan'.
-
-       (*)  `other': any warning not specifically mentioned above
-
-           `other' specifies any warning not included in any specific
-           warning class.
-
-           Enabled by default.
-
-       (*)  `phase': phase error during stabilization
-
-           `phase' warns about symbols having changed values during the
-           second-to-last assembly pass. This is not inherently fatal, but
-           may be a source of bugs.
-
-           Disabled by default.
-
-       (*)  `pp': all `pp-' warnings
-
-           `pp' is a group alias for all warning classes prefixed by `pp-';
-           currently `pp-else-elif', `pp-else-else', `pp-empty-braces',
-           `pp-environment', `pp-macro-def-case-single',
-           `pp-macro-def-greedy-single', `pp-macro-def-param-single',
-           `pp-macro-defaults', `pp-macro-params-legacy',
-           `pp-macro-params-multi', `pp-macro-params-single',
-           `pp-macro-redef-multi', `pp-open-braces', `pp-open-brackets',
-           `pp-open-string', `pp-rep-negative', `pp-sel-range',
-           `pp-trailing'.
-
-       (*)  `pp-else': all `pp-else-' warnings
-
-           `pp-else' is a group alias for all warning classes prefixed by
-           `pp-else-'; currently `pp-else-elif' and `pp-else-else'.
-
-       (*)  `pp-else-elif': %elif after %else
-
-           `pp-else-elif' warns that an `%%elif'-type directive was
-           encountered after `%%elif' will never be expanded.
-
-           Enabled by default.
-
-       (*)  `pp-else-else': %else after %else
-
-           `pp-else-else' warns that a second `%else' clause was found for
-           the same `%if' statement. The content of this `%else' clause
-           will never be expanded.
-
-           Enabled by default.
-
-       (*)  `pp-empty-braces': empty %{} construct
-
-           `pp-empty-braces' warns that an empty `%{}' was encountered.
-           This expands to a single `%' character, which is normally the
-           `%' arithmetic operator.
-
-           Enabled by default.
-
-       (*)  `pp-environment': nonexistent environment variable
-
-           `pp-environment' warns if a nonexistent environment variable is
-           accessed using the `%!' preprocessor construct (see section
-           4.13.2.) Such environment variables are treated as empty (with
-           this warning issued) starting in NASM 2.15; earlier versions of
-           NASM would treat this as an error.
-
-           Enabled by default.
-
-       (*)  `pp-macro': all `pp-macro-' warnings
-
-           `pp-macro' is a group alias for all warning classes prefixed by
-           `pp-macro-'; currently `pp-macro-def-case-single',
-           `pp-macro-def-greedy-single', `pp-macro-def-param-single',
-           `pp-macro-defaults', `pp-macro-params-legacy',
-           `pp-macro-params-multi', `pp-macro-params-single',
-           `pp-macro-redef-multi'.
-
-       (*)  `pp-macro-def': all `pp-macro-def-' warnings
-
-           `pp-macro-def' is a group alias for all warning classes prefixed
-           by `pp-macro-def-'; currently `pp-macro-def-case-single',
-           `pp-macro-def-greedy-single', `pp-macro-def-param-single'.
-
-       (*)  `pp-macro-def-case-single': single-line macro defined both case
-           sensitive and insensitive
-
-           `pp-macro-def-case-single' warns when a single-line macro is
-           defined both case sensitive and case insensitive. The new macro
-           definition will override (shadow) the original one, although the
-           original macro is not deleted, and will be re-exposed if the new
-           macro is deleted with `%undef', or, if the original macro is the
-           case insensitive one, the macro call is done with a different
-           case.
-
-           Enabled by default.
-
-       (*)  `pp-macro-def-greedy-single': single-line macro
-
-           `pp-macro-def-greedy-single' definition shadows greedy macro
-           warns when a single-line macro is defined which would match a
-           previously existing greedy definition. The new macro definition
-           will override (shadow) the original one, although the original
-           macro is not deleted, and will be re-exposed if the new macro is
-           deleted with `%undef', and will be invoked if called with a
-           parameter count that does not match the new definition.
-
-           Enabled by default.
-
-       (*)  `pp-macro-def-param-single': single-line macro defined with and
-           without parameters
-
-           `pp-macro-def-param-single' warns if the same single-line macro
-           is defined with and without parameters. The new macro definition
-           will override (shadow) the original one, although the original
-           macro is not deleted, and will be re-exposed if the new macro is
-           deleted with `%undef'.
-
-           Enabled and promoted to error by default.
-
-       (*)  `pp-macro-defaults': macros with more default than optional
-           parameters
-
-           `pp-macro-defaults' warns when a macro has more default
-           parameters than optional parameters. See section 4.5.5 for why
-           might want to disable this warning.
-
-           Enabled by default.
-
-       (*)  `pp-macro-params': all `pp-macro-params-' warnings
-
-           `pp-macro-params' is a group alias for all warning classes
-           prefixed by `pp-macro-params-'; currently
-           `pp-macro-params-legacy', `pp-macro-params-multi',
-           `pp-macro-params-single'.
-
-       (*)  `pp-macro-params-legacy': improperly calling multi-line macro
-           for legacy support
-
-           `pp-macro-params-legacy' warns about multi-line macros being
-           invoked with the wrong number of parameters, but for bug-
-           compatibility with NASM versions older than 2.15, NASM tried to
-           fix up the parameters to match the legacy behavior and call the
-           macro anyway. This can happen in certain cases where there are
-           empty arguments without braces, sometimes as a result of macro
-           expansion.
-
-           The legacy behavior is quite strange and highly context-
-           dependent, and can be disabled with:
-
-            %pragma preproc sane_empty_expansion true
-
-           It is highly recommended to use this option in new code.
-
-           Enabled by default.
-
-       (*)  `pp-macro-params-multi': multi-line macro calls with wrong
-           parameter count
-
-           `pp-macro-params-multi' warns about multi-line macros being
-           invoked with the wrong number of parameters. See section 4.5.1
-           for an example of why you might want to disable this warning.
-
-           Enabled by default.
-
-       (*)  `pp-macro-params-single': single-line macro calls with wrong
-           parameter count
-
-           `pp-macro-params-single' warns about single-line macros being
-           invoked with the wrong number of parameters.
-
-           Enabled by default.
-
-       (*)  `pp-macro-redef-multi': redefining multi-line macro
-
-           `pp-macro-redef-multi' warns that a multi-line macro is being
-           redefined, without first removing the old definition with
-           `%unmacro'.
-
-           Enabled by default.
-
-       (*)  `pp-open': all `pp-open-' warnings
-
-           `pp-open' is a group alias for all warning classes prefixed by
-           `pp-open-'; currently `pp-open-braces', `pp-open-brackets',
-           `pp-open-string'.
-
-       (*)  `pp-open-braces': unterminated %{...}
-
-           `pp-open-braces' warns that a preprocessor parameter enclosed in
-           braces `%{...}' lacks the terminating `}' character.
-
-           Enabled by default.
-
-       (*)  `pp-open-brackets': unterminated %...
-
-           `pp-open-brackets' warns that a preprocessor `%...' construct
-           lacks the terminating `' character.
-
-           Enabled by default.
-
-       (*)  `pp-open-string': unterminated string
-
-           `pp-open-string' warns that a quoted string without a closing
-           quotation mark was encountered during preprocessing.
-
-           Enabled by default.
-
-       (*)  `pp-rep-negative': regative %rep count
-
-           `pp-rep-negative' warns about a negative count given to the
-           `%rep' preprocessor directive.
-
-           Enabled by default.
-
-       (*)  `pp-sel-range': %sel() argument out of range
-
-           `pp-sel-range' warns that the %sel() preprocessor function was
-           passed a value less than 1 or larger than the number of
-           available arguments.
-
-           Enabled by default.
-
-       (*)  `pp-trailing': trailing garbage ignored
-
-           `pp-trailing' warns that the preprocessor encountered additional
-           text where no such text was expected. This can sometimes be the
-           result of an incorrectly written expression, or arguments that
-           are inadvertently separated.
-
-           Enabled by default.
-
-       (*)  `pragma': all `pragma-' warnings
-
-           `pragma' is a group alias for all warning classes prefixed by
-           `pragma-'; currently `pragma-bad', `pragma-empty', `pragma-na',
-           `pragma-unknown'.
-
-       (*)  `pragma-bad': malformed %pragma
-
-           `pragma-bad' warns about a malformed or otherwise unparsable
-           `%pragma' directive.
-
-           Disabled by default.
-
-       (*)  `pragma-empty': empty %pragma directive
-
-           `pragma-empty' warns about a `%pragma' directive containing
-           nothing. This is treated identically to `%pragma ignore' except
-           for this optional warning.
-
-           Disabled by default.
-
-       (*)  `pragma-na': %pragma not applicable to this compilation
-
-           `pragma-na' warns about a `%pragma' directive which is not
-           applicable to this particular assembly session. This is not yet
-           implemented.
-
-           Disabled by default.
-
-       (*)  `pragma-unknown': unknown %pragma facility or directive
-
-           `pragma-unknown' warns about an unknown `%pragma' directive.
-           This is not yet implemented for most cases.
-
-           Disabled by default.
-
-       (*)  `prefix': all `prefix-' warnings
-
-           `prefix' is a group alias for all warning classes prefixed by
-           `prefix-'; currently `prefix-bnd', `prefix-hle', `prefix-lock',
-           `prefix-opsize', `prefix-seg'.
-
-       (*)  `prefix-bnd': invalid BND prefix
-
-           `prefix-bnd' warns about ineffective use of the `BND' prefix
-           when the `JMP' instruction is converted to the `SHORT' form.
-           This should be extremely rare since the short `JMP' only is
-           applicable to jumps inside the same module, but if it is
-           legitimate, it may be necessary to use `bnd jmp dword'.
-
-           Enabled by default.
-
-       (*)  `prefix-hle': invalid HLE prefix
-
-           `prefix-hle' warns about invalid use of the HLE `XACQUIRE' or
-           `XRELEASE' prefixes.
-
-           Enabled by default.
-
-       (*)  `prefix-lock': LOCK prefix on unlockable instructions
-
-           `prefix-lock' warns about `LOCK' prefixes on unlockable
-           instructions.
-
-           Enabled by default.
-
-       (*)  `prefix-opsize': invalid operand size prefix
-
-           `prefix-opsize' warns that an operand prefix (`o16', `o32',
-           `o64', `osp') invalid for the specified instruction has been
-           specified. The operand prefix will be ignored by the assembler.
-
-           Enabled by default.
-
-       (*)  `prefix-seg': segment prefix ignored in 64-bit mode
-
-           `prefix-seg' warns that an `es', `cs', `ss' or `ds' segment
-           override prefix has no effect in 64-bit mode. The prefix will
-           still be generated as requested.
-
-           Enabled by default.
-
-       (*)  `ptr': non-NASM keyword used in other assemblers
-
-           `ptr' warns about keywords used in other assemblers that might
-           indicate a mistake in the source code. Currently only the MASM
-           `PTR' keyword is recognized. See also section 6.5.
-
-           Enabled by default.
-
-       (*)  `regsize': register size specification ignored
-
-           `regsize' warns about a register with implicit size (such as
-           `EAX', which is always 32 bits) been given an explicit size
-           specification which is inconsistent with the size of the named
-           register, e.g. `WORD EAX'. `DWORD EAX' or `WORD AX' are
-           permitted, and do not trigger this warning. Some registers which
-           _do not_ imply a specific size, such as `K0', may need this
-           specification unless the instruction itself implies the
-           instruction size:
-
-            KMOVW K0,foo          ; Permitted, KMOVW implies 16 bits 
-            KMOV  WORD K0,foo     ; Permitted, WORD K0 specifies instruction size 
-            KMOV  K0,WORD foo     ; Permitted, WORD foo specifies instruction size 
-            KMOV  K0,foo          ; Not permitted, instruction size ambiguous
-
-           Enabled by default.
-
-       (*)  `unknown-pragma': unknown %pragma facility or directive
-
-           `unknown-pragma' is a backwards compatibility alias for
-           `pragma-unknown'.
-
-       (*)  `unknown-warning': unknown warning in -W/-w or warning
-           directive
-
-           `unknown-warning' warns about a `-w' or `-W' option or a
-           `WARNING' directive that contains an unknown warning name or
-           is otherwise not possible to process.
-
-           Disabled by default.
-
-       (*)  `user': %warning directives
-
-           `user' controls output of `%warning' directives (see section
-           4.11).
-
-           Enabled by default.
-
-       (*)  `warn-stack-empty': warning stack empty
-
-           `warn-stack-empty' a WARNING POP directive was executed when
-           the warning stack is empty. This is treated as a WARNING *all
-           directive.
-
-           Enabled by default.
-
-       (*)  `zeroing': RESx in initialized section becomes zero
-
-           `zeroing' a `RESx' directive was used in a section which
-           contains initialized data, and the output format does not
-           support this. Instead, this will be replaced with explicit zero
-           content, which may produce a large output file.
-
-           Enabled by default.
-
-       (*)  `zext-reloc': relocation zero-extended to match output format
-
-           `zext-reloc' warns that a relocation has been zero-extended due
-           to limitations in the output format.
-
-           Enabled by default.
-
-Appendix B: Ndisasm
--------------------
-
-       The Netwide Disassembler, NDISASM
-
-   B.1 Introduction
-
-       The Netwide Disassembler is a small companion program to the Netwide
-       Assembler, NASM. It seemed a shame to have an x86 assembler,
-       complete with a full instruction table, and not make as much use of
-       it as possible, so here's a disassembler which shares the
-       instruction table (and some other bits of code) with NASM.
-
-       The Netwide Disassembler does nothing except to produce
-       disassemblies of _binary_ source files. NDISASM does not have any
-       understanding of object file formats, like `objdump', and it will
-       not understand `DOS .EXE' files like `debug' will. It just
-       disassembles.
-
-   B.2 Running NDISASM
-
-       To disassemble a file, you will typically use a command of the form
-
-              ndisasm -b {16|32|64} filename
-
-       NDISASM can disassemble 16-, 32- or 64-bit code equally easily,
-       provided of course that you remember to specify which it is to work
-       with. If no `-b' switch is present, NDISASM works in 16-bit mode by
-       default. The `-u' switch (for USE32) also invokes 32-bit mode.
-
-       Two more command line options are `-r' which reports the version
-       number of NDISASM you are running, and `-h' which gives a short
-       summary of command line options.
-
- B.2.1 COM Files: Specifying an Origin
-
-       To disassemble a `DOS .COM' file correctly, a disassembler must
-       assume that the first instruction in the file is loaded at address
-       `0x100', rather than at zero. NDISASM, which assumes by default that
-       any file you give it is loaded at zero, will therefore need to be
-       informed of this.
-
-       The `-o' option allows you to declare a different origin for the
-       file you are disassembling. Its argument may be expressed in any of
-       the NASM numeric formats: decimal by default, if it begins with
-       ``$'' or ``0x'' or ends in ``H'' it's `hex', if it ends in ``Q''
-       it's `octal', and if it ends in ``B'' it's `binary'.
-
-       Hence, to disassemble a `.COM' file:
-
-              ndisasm -o100h filename.com
-
-       will do the trick.
-
- B.2.2 Code Following Data: Synchronization
-
-       Suppose you are disassembling a file which contains some data which
-       isn't machine code, and _then_ contains some machine code. NDISASM
-       will faithfully plough through the data section, producing machine
-       instructions wherever it can (although most of them will look
-       bizarre, and some may have unusual prefixes, e.g.
-       ``FS OR AX,0x240A''), and generating `DB' instructions ever so often
-       if it's totally stumped. Then it will reach the code section.
-
-       Supposing NDISASM has just finished generating a strange machine
-       instruction from part of the data section, and its file position is
-       now one byte _before_ the beginning of the code section. It's
-       entirely possible that another spurious instruction will get
-       generated, starting with the final byte of the data section, and
-       then the correct first instruction in the code section will not be
-       seen because the starting point skipped over it. This isn't really
-       ideal.
-
-       To avoid this, you can specify a `synchronization' point, or indeed
-       as many synchronization points as you like (although NDISASM can
-       only handle 2147483647 sync points internally). The definition of a
-       sync point is this: NDISASM guarantees to hit sync points exactly
-       during disassembly. If it is thinking about generating an
-       instruction which would cause it to jump over a sync point, it will
-       discard that instruction and output a ``db'' instead. So it _will_
-       start disassembly exactly from the sync point, and so you _will_ see
-       all the instructions in your code section.
-
-       Sync points are specified using the `-s' option: they are measured
-       in terms of the program origin, not the file position. So if you
-       want to synchronize after 32 bytes of a `.COM' file, you would have
-       to do
-
-              ndisasm -o100h -s120h file.com
-
-       rather than
-
-              ndisasm -o100h -s20h file.com
-
-       As stated above, you can specify multiple sync markers if you need
-       to, just by repeating the `-s' option.
-
- B.2.3 Mixed Code and Data: Automatic (Intelligent) Synchronization 
-
-       Suppose you are disassembling the boot sector of a `DOS' floppy
-       (maybe it has a virus, and you need to understand the virus so that
-       you know what kinds of damage it might have done you). Typically,
-       this will contain a `JMP' instruction, then some data, then the rest
-       of the code. So there is a very good chance of NDISASM being
-       _misaligned_ when the data ends and the code begins. Hence a sync
-       point is needed.
-
-       On the other hand, why should you have to specify the sync point
-       manually? What you'd do in order to find where the sync point would
-       be, surely, would be to read the `JMP' instruction, and then to use
-       its target address as a sync point. So can NDISASM do that for you?
-
-       The answer, of course, is yes: using either of the synonymous
-       switches `-a' (for automatic sync) or `-i' (for intelligent sync)
-       will enable `auto-sync' mode. Auto-sync mode automatically generates
-       a sync point for any forward-referring PC-relative jump or call
-       instruction that NDISASM encounters. (Since NDISASM is one-pass, if
-       it encounters a PC-relative jump whose target has already been
-       processed, there isn't much it can do about it...)
-
-       Only PC-relative jumps are processed, since an absolute jump is
-       either through a register (in which case NDISASM doesn't know what
-       the register contains) or involves a segment address (in which case
-       the target code isn't in the same segment that NDISASM is working
-       in, and so the sync point can't be placed anywhere useful).
-
-       For some kinds of file, this mechanism will automatically put sync
-       points in all the right places, and save you from having to place
-       any sync points manually. However, it should be stressed that auto-
-       sync mode is _not_ guaranteed to catch all the sync points, and you
-       may still have to place some manually.
-
-       Auto-sync mode doesn't prevent you from declaring manual sync
-       points: it just adds automatically generated ones to the ones you
-       provide. It's perfectly feasible to specify `-i' _and_ some `-s'
-       options.
-
-       Another caveat with auto-sync mode is that if, by some unpleasant
-       fluke, something in your data section should disassemble to a PC-
-       relative call or jump instruction, NDISASM may obediently place a
-       sync point in a totally random place, for example in the middle of
-       one of the instructions in your code section. So you may end up with
-       a wrong disassembly even if you use auto-sync. Again, there isn't
-       much I can do about this. If you have problems, you'll have to use
-       manual sync points, or use the `-k' option (documented below) to
-       suppress disassembly of the data area.
-
- B.2.4 Other Options
-
-       The `-e' option skips a header on the file, by ignoring the first N
-       bytes. This means that the header is _not_ counted towards the
-       disassembly offset: if you give `-e10 -o10', disassembly will start
-       at byte 10 in the file, and this will be given offset 10, not 20.
-
-       The `-k' option is provided with two comma-separated numeric
-       arguments, the first of which is an assembly offset and the second
-       is a number of bytes to skip. This _will_ count the skipped bytes
-       towards the assembly offset: its use is to suppress disassembly of a
-       data section which wouldn't contain anything you wanted to see
-       anyway.
-
-Appendix C: NASM Version History
---------------------------------
-
-   C.1 NASM 2 Series
-
-       The NASM 2 series supports x86-64, and is the production version of
-       NASM since 2007.
-
- C.1.1 Version 2.16.01
-
-       _This is a documentation update release only._
-
-       (*) Fix the creation of the table of contents in the HTML version of
-           the documentation.
-
- C.1.2 Version 2.16
-
-       (*) Support for the `rdf' format has been discontinued and all the
-           RDOFF utilities has been removed.
-
-       (*) The `--reproducible' option now leaves the filename field in the
-           COFF object format blank. This was always rather useless since
-           it is only 18 characters long; as such debug formats have to
-           carry their own filename information anyway.
-
-       (*) Fix handling of MASM-syntax reserved memory (e.g. `dw ?') when
-           used in structure definitions.
-
-       (*) The preprocessor now supports functions, which can be less
-           verbose and more convenient than the equivalent code implemented
-           using directives. See section 4.4.
-
-       (*) Fix the handling of `%00' in the preprocessor.
-
-       (*) Fix incorrect handling of path names affecting error messages,
-           dependency generation, and debug format output.
-
-       (*) Support for the RDOFF output format and the RDOFF tools have
-           been removed. The RDOFF tools had already been broken since at
-           least NASM 2.14. For flat code the ELF output format
-           recommended; for segmented code the `obj' (OMF) output format.
-
-       (*) New facility: preprocessor functions. Preprocessor functions,
-           which are expanded similarly to single-line macros, can greatly
-           simplify code that in the past would have required a lengthy
-           list of directives and intermediate macros. See section 4.4.
-
-       (*) Single-line macros can now declare parameters (using a `&&'
-           prefix) that creates a quoted string, but does _not_ requote an
-           already quoted string. See section 4.2.1.
-
-       (*) Instruction table updated per public information available as of
-           November 2022.
-
-       (*) All warnings in the preprocessor have now been assigned warning
-           classes. See appendix A.
-
-       (*) Fix the invalid use of `RELA'-type relocations instead of `REL'-
-           type relocations when generating DWARF debug information for the
-           `elf32' output format.
-
-       (*) Fix the handling `at' in `istruc' when the structure contains
-           local labels. See section 5.9.2.
-
-       (*) When assembling with `--reproducible', don't encode the filename
-           in the COFF header for the `coff', `win32' or `win64' output
-           formats. The COFF header only has space for an 18-character
-           filename, which makes this field rather useless in the first
-           place. Debug output data, if enabled, is not affected.
-
-       (*) Fix incorrect size calculation when using MASM syntax for non-
-           byte reservations (e.g. `dw ?'.)
-
-       (*) Allow forcing an instruction in 64-bit mode to have a (possibly
-           redundant) REX prefix, using the syntax `{rex}' as a prefix.
-
-       (*) Add a `{vex}' prefix to enforce VEX (AVX) encoding of an
-           instruction, either using the 2- or 3-byte VEX prefixes.
-
-       (*) The `CPU' directive has been augmented to allow control of
-           generation of VEX (AVX) versus EVEX (AVX-512) instruction
-           formats, see section 7.11.
-
-       (*) Some recent instructions that previously have been only
-           available using EVEX encodings are now also encodable using VEX
-           (AVX) encodings. For backwards compatibility these encodings are
-           not enabled by default, but can be generated either via an
-           explicit `{vex}' prefix or by specifying either `CPU LATEVEX' or
-           `CPU NOEVEX'; see section 7.11.
-
-       (*) Document the already existing `%unimacro' directive. See section
-           4.5.12.
-
-       (*) Fix a code range generation bug in the DWARF debug format
-           (incorrect information in the `DW_AT_high_pc' field) for the ELF
-           output formats. This bug happened to cancel out with a bug in
-           older versions of the GNU binutils linker, but breaks with other
-           linkers and updated or other linkers that expect the spec to be
-           followed.
-
-       (*) Fix segment symbols with addends, e.g. `jmp _TEXT+10h:0' in
-           output formats that support segment relocations, e.g. the `obj'
-           format.
-
-       (*) Fix various crashes and hangs on invalid input.
-
- C.1.3 Version 2.15.05
-
-       (*) Fix `%ifid $' and `%ifid $$' incorrectly being treated as true.
-           See section 4.6.6.
-
-       (*) Add `--reproducible' option to suppress NASM version numbers and
-           timestamps in output files. See section 2.1.34.
-
- C.1.4 Version 2.15.04
-
-       (*) More sensible handling of the case where one single-line macro
-           definition will shadow another. A warning will be issued, but
-           the additional definition will be allowed. For the existing
-           error case where both a parameterless and parametered macro are
-           created, that warning is promoted to an error by default.
-
-       (*) Add special preprocessor tokens `%*?' and `%*??' that expand
-           like `%?' and `%??' in single-line macros only. See section
-           4.2.6.
-
-       (*) Correct the encoding of the `ENQCMDS' and `TILELOADT1'
-           instructions.
-
-       (*) Fix case where the COFF backend (the `coff', `win32' and `win64'
-           output formats) would add padding bytes in the middle of a
-           section if a `SECTION'/`SEGMENT' directive was provided which
-           repeated an `ALIGN=' attribute. This neither matched legacy
-           behavior, other backends, or user expectations.
-
-       (*) Fix SSE instructions not being recognized with an explicit
-           memory operation size (e.g. `movsd qword eax,xmm0').
-
-       (*) The `-L+' option no longer enables `-Lw', which is mainly useful
-           to debug NASM crashes. See section 2.1.4.
-
-       (*) Document long-standing hazards in the use of `$' in `Dx'
-           statements, see section 3.2.1.
-
-       (*) The NASM-only RDOFF output format backend, which has been broken
-           since at least NASM 2.14, has been disabled. The RDOFF tools are
-           scheduled to be removed from the NASM distribution in NASM 2.16.
-           If you have a concrete use case for RDOFF, please file a NASM
-           bug report at `https://bugs.nasm.us/' as soon as possible.
-
- C.1.5 Version 2.15.03
-
-       (*) Add instructions from the Intel Instruction Set Extensions and
-           Future Features Programming Reference, June 2020. This includes
-           AVX5512 `bfloat16', AVX512 mask intersect, and Intel Advanced
-           Matrix Extensions (AMX).
-
-       (*) Support for `bfloat16' floating-point constants. See section
-           3.4.6 and section 6.3.
-
-       (*) Properly display warnings in preprocess-only mode.
-
-       (*) Fix copy-and-paste of examples from the PDF documentation.
-
-       (*) Debug information now properly reflect the line numbers of macro
-           invocations (unless declared `.nolist').
-
-       (*) Fix excessive alignment of sections in the
-           `coff'/`win32'/`win64' output formats when the user-specified
-           alignment is less than the default alignment for the section or
-           section type.
-
-       (*) Fix explicit token pasting (`%+', section 4.2.4) for the cases
-           where one or more parts result from empty token expansion,
-           resulting in `%+' tokens at the beginning or end, or multiple
-           ones in a row.
-
-       (*) Fix macro label capture (`%00', section 4.5.7).
-
-       (*) Much better documentation for the MASM compatibility package,
-           `%use masm' (see section 6.5).
-
-       (*) Fix `LEA' without square brackets, for MASM compatibility.
-
-       (*) Portability fixes.
-
- C.1.6 Version 2.15.02
-
-       (*) Fix miscompilation when building with `clang'.
-
-       (*) Add `db-empty' warning class, see section 2.1.26.
-
-       (*) Fix the dependencies in the MSVC NMAKE makefile
-           (`Mkfiles/msvc.mak').
-
-       (*) Some documentation improvements and cleanups.
-
-       (*) Fix the handling of macro parameter ranges (`%{:}'), including
-           with brace-enclosed original arguments.
-
- C.1.7 Version 2.15.01
-
-       (*) Fix building the documentation from the release archive. For
-           2.15, the user has to do `make warnings' manually in the main
-           directory in order to be able to build the documentation, which
-           means Perl needs to be installed on the system.
-
-       (*) Add instructions for Intel Control Flow Enforcement Technology
-           (CET).
-
- C.1.8 Version 2.15
-
-       (*) The comparison and booleanizing operators can now be used in any
-           expression context, not just `%if'. See section 3.5.
-
-       (*) New operator `?' ... `:'. See section 3.5.1.
-
-       (*) Signed shift operators `<<<' and `>>>'. See section 3.5.9.
-
-       (*) The MASM `DUP' syntax for data definitions is now supported, in
-           a somewhat enhanced form. See section 3.2.1.
-
-       (*) Warn for strange legacy behavior regarding empty arguments in
-           multi-line macro expansion, but try to match legacy behavior in
-           most cases. Legacy behavior can be disabled with the directive
-           `%pragma preproc sane_empty_expansion', see section 4.5 and
-           section 4.12.1.
-
-       (*) A much more sensible limit to expression evaluation depth. The
-           previously defined limit would rarely trigger before NASM died
-           with a stack overrun error on most systems. See section 2.1.31.
-
-       (*) The state of warnings can now be saved and restored via the
-           `WARNING PUSH' and `WARNING POP' directives. See section
-           7.13.
-
-       (*) The `sectalign on|off' switch does not affect an explicit
-           directive. See section 5.10.2.
-
-       (*) Added `configure' option to enable building with profiling
-           (`--enable-profiling').
-
-       (*) Attempt to support of long path names, up to 32767 of UTF-16
-           characters, on Windows.
-
-       (*) Fixed 'mismatch in operand sizes' error in the `MOVDDUP',
-           `CMPXCHG8B' and `CMPXCHG16B' instructions.
-
-       (*) Improved error messages in the string transformation routine.
-
-       (*) Removed obsolete `gnu-elf-extensions' warning about 8- and 16-
-           bit relocation generation. See section 8.9.8
-
-       (*) Added group aliases for all prefixed warnings. See section
-           2.1.26.
-
-       (*) Allowed building with MSVC versions older than 1700.
-
-       (*) Added implicitly sized versions of the `K...' instructions,
-           which allows the `K...' instructions to be specified without a
-           size suffix as long as the operands are sized.
-
-       (*) Added `-L' option for additional listing information. See
-           section 2.1.4.
-
-       (*) Added some warnings for obsolete instructions for a specified
-           CPU.
-
-       (*) Deprecated `-hf' and `-y' options. Use `-h' instead.
-
-       (*) Made DWARF as the default debug format for ELF.
-
-       (*) Added `%pragma list' _options..._ to set or clear listing
-           options (see `opt-L').
-
-       (*) Allowed immediate syntax for `LEA' instruction (ignore operand
-           size completely).
-
-       (*) Added limited functionality MASM compatibility package. See
-           section 6.5.
-
-       (*) Add single-line macros aliases using `%defalias' or
-           `%idefalias'. These behave like a kind of "symbolic links" for
-           single-line macros. See section 4.2.11 and `clear'.
-
-       (*) Added support for stringify, nostrip, evaluating, and greedy
-           single-line macro arguments. See section 4.2.1.
-
-       (*) Unused single-line macro arguments no longer need to have a
-           specified name. See section 4.2.1.
-
-       (*) Added conditional comma operator `%,'. See section 4.2.12.
-
-       (*) Changed private namespace from `__foo__' to `__?foo?__', so a
-           user namespace starting from underscore is now clean from
-           symbols. For backwards compatibility, the previous names are
-           defined as aliases; see section 4.2.11, section 4.13.3 and
-           chapter 5.
-
-       (*) Added support of ELF weak symbols and external references. See
-           section 8.9.5.
-
-       (*) Changed the behavior of the EXTERN keyword and introduced
-           REQUIRED keyword. See section 7.6.
-
-       (*) Added `%ifusable' and `%ifusing' directives. See chapter 6.
-
-       (*) Made various performance improvements and stability fixes in
-           macro preprocessor engine.
-
-       (*) Improved NASM error handling and cleaned up error messages.
-
-       (*) Many, many bug fixes.
-
- C.1.9 Version 2.14.03
-
-       (*) Suppress nuisance "`label changed during code generation'"
-           messages after a real error.
-
-       (*) Add support for the `merge' and `strings' attributes on ELF
-           sections. See section 8.9.2.
-
-       (*) Add support for the `note', `preinit_array', `init_array', and
-           `fini_array' sections type in ELF. See section 8.9.2.
-
-       (*) Handle more than 32,633 sections in ELF.
-
-C.1.10 Version 2.14.02
-
-       (*) Fix crash due to multiple errors or warnings during the code
-           generation pass if a list file is specified.
-
-C.1.11 Version 2.14.01
-
-       (*) Create all system-defined macros before processing command-line
-           given preprocessing directives (`-p', `-d', `-u', `--pragma',
-           `--before').
-
-       (*) If debugging is enabled, define a `__DEBUG_FORMAT__' predefined
-           macro. See section 5.5.
-
-       (*) Fix an assert for the case in the `obj' format when a `SEG'
-           operator refers to an `EXTERN' symbol declared further down in
-           the code.
-
-       (*) Fix a corner case in the floating-point code where a binary,
-           octal or hexadecimal floating-point having at least 32, 11, or 8
-           mantissa digits could produce slightly incorrect results under
-           very specific conditions.
-
-       (*) Support `-MD' without a filename, for `gcc' compatibility. `-MF'
-           can be used to set the dependencies output filename. See section
-           2.1.8.
-
-       (*) Fix `-E' in combination with `-MD'. See section 2.1.22.
-
-       (*) Fix missing errors on redefined labels; would cause convergence
-           failure instead which is very slow and not easy to debug.
-
-       (*) Duplicate definitions of the same label _with the same value_ is
-           now explicitly permitted (2.14 would allow it in some
-           circumstances.)
-
-       (*) Add the option `--no-line' to ignore `%line' directives in the
-           source. See section 2.1.33 and section 4.13.1.
-
-C.1.12 Version 2.14
-
-       (*) Changed `-I' option semantics by adding a trailing path
-           separator unconditionally.
-
-       (*) Fixed null dereference in corrupted invalid single line macros.
-
-       (*) Fixed division by zero which may happen if source code is
-           malformed.
-
-       (*) Fixed out of bound access in processing of malformed segment
-           override.
-
-       (*) Fixed out of bound access in certain `EQU' parsing.
-
-       (*) Fixed buffer underflow in float parsing.
-
-       (*) Added `SGX' (Intel Software Guard Extensions) instructions.
-
-       (*) Added `+n' syntax for multiple contiguous registers.
-
-       (*) Fixed `subsections_via_symbols' for `macho' object format.
-
-       (*) Added the `--gprefix', `--gpostfix', `--lprefix', and
-           `--lpostfix' command line options, to allow command line base
-           symbol renaming. See section 2.1.28.
-
-       (*) Allow label renaming to be specified by `%pragma' in addition to
-           from the command line. See section 7.10.
-
-       (*) Supported generic `%pragma' namespaces, `output' and `debug'.
-           See section 4.12.
-
-       (*) Added the `--pragma' command line option to inject a `%pragma'
-           directive. See section 2.1.29.
-
-       (*) Added the `--before' command line option to accept preprocess
-           statement before input. See section 2.1.30.
-
-       (*) Added `AVX512' `VBMI2' (Additional Bit Manipulation), `VNNI'
-           (Vector Neural Network), `BITALG' (Bit Algorithm), and `GFNI'
-           (Galois Field New Instruction) instructions.
-
-       (*) Added the `STATIC' directive for local symbols that should be
-           renamed using global-symbol rules. See section 7.9.
-
-       (*) Allow a symbol to be defined as `EXTERN' and then later
-           overridden as `GLOBAL' or `COMMON'. Furthermore, a symbol
-           declared `EXTERN' and then defined will be treated as `GLOBAL'.
-           See section 7.5.
-
-       (*) The `GLOBAL' directive no longer is required to precede the
-           definition of the symbol.
-
-       (*) Support `private_extern' as `macho' specific extension to the
-           `GLOBAL' directive. See section 8.8.5.
-
-       (*) Updated `UD0' encoding to match with the specification
-
-       (*) Added the `--limit-X' command line option to set execution
-           limits. See section 2.1.31.
-
-       (*) Updated the `Codeview' version number to be aligned with `MASM'.
-
-       (*) Added the `--keep-all' command line option to preserve output
-           files. See section 2.1.32.
-
-       (*) Added the `--include' command line option, an alias to `-P'
-           (section 2.1.19).
-
-       (*) Added the `--help' command line option as an alias to `-h'
-           (section 3.1).
-
-       (*) Added `-W', `-D', and `-Q' suffix aliases for `RET' instructions
-           so the operand sizes of these instructions can be encoded
-           without using `o16', `o32' or `o64'.
-
-C.1.13 Version 2.13.03
-
-       (*) Added AVX and AVX512 `VAES*' and `VPCLMULQDQ' instructions.
-
-       (*) Fixed missing dwarf record in x32 ELF output format.
-
-C.1.14 Version 2.13.02
-
-       (*) Fix false positive in testing of numeric overflows.
-
-       (*) Fix generation of `PEXTRW' instruction.
-
-       (*) Fix `smartalign' package which could trigger an error during
-           optimization if the alignment code expanded too much due to
-           optimization of the previous code.
-
-       (*) Fix a case where negative value in `TIMES' directive causes
-           panic instead of an error.
-
-       (*) Always finalize `.debug_abbrev' section with a null in `dwarf'
-           output format.
-
-       (*) Support `debug' flag in section attributes for `macho' output
-           format. See section 8.8.1.
-
-       (*) Support up to 16 characters in section names for `macho' output
-           format.
-
-       (*) Fix missing update of global `BITS' setting if `SECTION'
-           directive specified a bit size using output format-specific
-           extensions (e.g. `USE32' for the `obj' output format.)
-
-       (*) Fix the incorrect generation of VEX-encoded instruction when
-           static mode decorators are specified on scalar instructions,
-           losing the decorators as they require EVEX encoding.
-
-       (*) Option `-MW' to quote dependency outputs according to Watcom
-           Make conventions instead of POSIX Make conventions. See section
-           2.1.12.
-
-       (*) The `obj' output format now contains embedded dependency file
-           information, unless disabled with `%pragma obj nodepend'. See
-           section 8.4.9.
-
-       (*) Fix generation of dependency lists.
-
-       (*) Fix a number of null pointer reference and memory allocation
-           errors.
-
-       (*) Always generate symbol-relative relocations for the `macho64'
-           output format; at least some versions of the XCode/LLVM linker
-           fails for section-relative relocations.
-
-C.1.15 Version 2.13.01
-
-       (*) Fix incorrect output for some types of `FAR' or `SEG' references
-           in the `obj' output format, and possibly other 16-bit output
-           formats.
-
-       (*) Fix the address in the list file for an instruction containing a
-           `TIMES' directive.
-
-       (*) Fix error with `TIMES' used together with an instruction which
-           can vary in size, e.g. `JMP'.
-
-       (*) Fix breakage on some uses of the `DZ' pseudo-op.
-
-C.1.16 Version 2.13
-
-       (*) Support the official forms of the `UD0' and `UD1' instructions.
-
-       (*) Allow self-segment-relative expressions in immediates and
-           displacements, even when combined with an external or otherwise
-           out-of-segment special symbol, e.g.:
-
-            extern foo 
-            mov eax,foo - $ + ebx               ; Now legal
-
-       (*) Handle a 64-bit origin in NDISASM.
-
-       (*) NASM can now generate sparse output files for relevant output
-           formats, if the underlying operating system supports them.
-
-       (*) The `macho' object format now supports the
-           `subsections_via_symbols' and `no_dead_strip' directives, see
-           section 8.8.4.
-
-       (*) The `macho' object format now supports the `no_dead_strip',
-           `live_support' and `strip_static_syms' section flags, see
-           section 8.8.1.
-
-       (*) The `macho' object format now supports the `dwarf' debugging
-           format, as required by newer toolchains.
-
-       (*) All warnings can now be suppressed if desired; warnings not
-           otherwise part of any warning class are now considered its own
-           warning class called `other' (e.g. `-w-other'). Furthermore,
-           warning-as-error can now be controlled on a per warning class
-           basis, using the syntax `-w+error='_warning-class_ and its
-           equivalent for all other warning control options. See section
-           2.1.26 for the command-line options and warning classes and
-           section 7.13 for the `WARNING' directive.
-
-       (*) Fix a number of bugs related to AVX-512 decorators.
-
-       (*) Significant improvements to building NASM with Microsoft Visual
-           Studio via `Mkfiles/msvc.mak'. It is now possible to build the
-           full Windows installer binary as long as the necessary
-           prerequisites are installed; see `Mkfiles/README'
-
-       (*) To build NASM with custom modifications (table changes) or from
-           the git tree now requires Perl 5.8 at the very minimum, quite
-           possibly a higher version (Perl 5.24.1 tested.) There is no
-           requirement to have Perl on your system at all if all you want
-           to do is build unmodified NASM from source archives.
-
-       (*) Fix the `{z}' decorator on AVX-512 `VMOVDQ*' instructions.
-
-       (*) Add new warnings for certain dangerous constructs which never
-           ought to have been allowed. In particular, the `RESB' family of
-           instructions should have been taking a critical expression all
-           along.
-
-       (*) Fix the EVEX (AVX-512) versions of the `VPBROADCAST', `VPEXTR',
-           and `VPINSR' instructions.
-
-       (*) Support contracted forms of additional instructions. As a
-           general rule, if an instruction has a non-destructive source
-           immediately after a destination register that isn't used as an
-           input, NASM supports omitting that source register, using the
-           destination register as that value. This among other things
-           makes it easier to convert SSE code to the equivalent AVX code:
-
-            addps xmm1,xmm0                       ; SSE instruction 
-            vaddps ymm1,ymm1,ymm0                 ; AVX official long form 
-            vaddps ymm1,ymm0                      ; AVX contracted form
-
-       (*) Fix Codeview malformed compiler version record.
-
-       (*) Add the `CLWB' and `PCOMMIT' instructions. Note that the
-           `PCOMMIT' instruction has been deprecated and will never be
-           included in a shipping product; it is included for completeness
-           only.
-
-       (*) Add the `%pragma' preprocessor directive for soft-error
-           directives.
-
-       (*) Add the `RDPID' instruction.
-
-C.1.17 Version 2.12.02
-
-       (*) Fix preprocessor errors, especially `%error' and `%warning',
-           inside `%if' statements.
-
-       (*) Fix relative relocations in 32-bit Mach-O.
-
-       (*) More Codeview debug format fixes.
-
-       (*) If the MASM `PTR' keyword is encountered, issue a warning. This
-           is much more likely to indicate a MASM-ism encountered in NASM
-           than it is a valid label. This warning can be suppressed with
-           `-w-ptr', the `warning' directive (see section 2.1.26) or by
-           the macro definition `%idefine ptr $%?' (see section 4.2.5).
-
-       (*) When an error or a warning comes from the expansion of a multi-
-           line macro, display the file and line numbers for the expanded
-           macros. Macros defined with `.nolist' do not get displayed.
-
-       (*) Add macros `ilog2fw()' and `ilog2cw()' to the `ifunc' macro
-           package. See section 6.4.1.
-
-C.1.18 Version 2.12.01
-
-       (*) Portability fixes for some platforms.
-
-       (*) Fix error when not specifying a list file.
-
-       (*) Correct the handling of macro-local labels in the Codeview
-           debugging format.
-
-       (*) Add `CLZERO', `MONITORX' and `MWAITX' instructions.
-
-C.1.19 Version 2.12
-
-       (*) Major fixes to the `macho' backend (section 8.8); earlier
-           versions would produce invalid symbols and relocations on a
-           regular basis.
-
-       (*) Support for thread-local storage in Mach-O.
-
-       (*) Support for arbitrary sections in Mach-O.
-
-       (*) Fix wrong negative size treated as a big positive value passed
-           into backend causing NASM to crash.
-
-       (*) Fix handling of zero-extending unsigned relocations, we have
-           been printing wrong message and forgot to assign segment with
-           predefined value before passing it into output format.
-
-       (*) Fix potential write of oversized (with size greater than allowed
-           in output format) relative relocations.
-
-       (*) Portability fixes for building NASM with the LLVM compiler.
-
-       (*) Add support of Codeview version 8 (`cv8') debug format for
-           `win32' and `win64' formats in the `COFF' backend, see section
-           8.5.3.
-
-       (*) Allow 64-bit outputs in 16/32-bit only backends. Unsigned 64-bit
-           relocations are zero-extended from 32-bits with a warning
-           (suppressible via `-w-zext-reloc'); signed 64-bit relocations
-           are an error.
-
-       (*) Line numbers in list files now correspond to the lines in the
-           source files, instead of simply being sequential.
-
-       (*) There is now an official 64-bit (x64 a.k.a. x86-64) build for
-           Windows.
-
-C.1.20 Version 2.11.09
-
-       (*) Fix potential stack overwrite in `macho32' backend.
-
-       (*) Fix relocation records in `macho64' backend.
-
-       (*) Fix symbol lookup computation in `macho64' backend.
-
-       (*) Adjust `.symtab' and `.rela.text' sections alignments to 8 bytes
-           in `elf64' backed.
-
-       (*) Fix section length computation in `bin' backend which leaded in
-           incorrect relocation records.
-
-C.1.21 Version 2.11.08
-
-       (*) Fix section length computation in `bin' backend which leaded in
-           incorrect relocation records.
-
-       (*) Add a warning for numeric preprocessor definitions passed via
-           command line which might have unexpected results otherwise.
-
-       (*) Add ability to specify a module name record in `rdoff' linker
-           with `-mn' option.
-
-       (*) Increase label length capacity up to 256 bytes in `rdoff'
-           backend for FreePascal sake, which tends to generate very long
-           labels for procedures.
-
-       (*) Fix segmentation failure when rip addressing is used in
-           `macho64' backend.
-
-       (*) Fix access on out of memory when handling strings with a single
-           grave. We have sixed similar problem in previous release but not
-           all cases were covered.
-
-       (*) Fix NULL dereference in disassembled on `BND' instruction.
-
-C.1.22 Version 2.11.07
-
-       (*) Fix 256 bit `VMOVNTPS' instruction.
-
-       (*) Fix `-MD' option handling, which was rather broken in previous
-           release changing command line api.
-
-       (*) Fix access to uninitialized space when handling strings with a
-           single grave.
-
-       (*) Fix nil dereference in handling memory reference parsing.
-
-C.1.23 Version 2.11.06
-
-       (*) Update AVX512 instructions based on the Extension Reference
-           (319433-021 Sept 2014).
-
-       (*) Fix the behavior of `-MF' and `-MD' options (Bugzilla 3392280)
-
-       (*) Updated Win32 Makefile to fix issue with build
-
-C.1.24 Version 2.11.05
-
-       (*) Add `--v' as an alias for `-v' (see section 2.1.27), for
-           command-line compatibility with Yasm.
-
-       (*) Fix a bug introduced in 2.11.03 whereby certain instructions
-           would contain multiple REX prefixes, and thus be corrupt.
-
-C.1.25 Version 2.11.04
-
-       (*) Removed an invalid error checking code. Sometimes a memref only
-           with a displacement can also set an evex flag. For example:
-
-             vmovdqu32 0xabcd{k1}, zmm0
-
-       (*) Fixed a bug in disassembler that EVEX.L'L vector length was not
-           matched when EVEX.b was set because it was simply considered as
-           EVEC.RC. Separated EVEX.L'L case from EVEX.RC which is ignored
-           in matching.
-
-C.1.26 Version 2.11.03
-
-       (*) Fix a bug there REX prefixes were missing on instructions inside
-           a `TIMES' statement.
-
-C.1.27 Version 2.11.02
-
-       (*) Add the `XSAVEC', `XSAVES' and `XRSTORS' family instructions.
-
-       (*) Add the `CLFLUSHOPT' instruction.
-
-C.1.28 Version 2.11.01
-
-       (*) Allow instructions which implicitly uses `XMM0' (`VBLENDVPD',
-           `VBLENDVPS', `PBLENDVB' and `SHA256RNDS2') to be specified
-           without an explicit `xmm0' on the assembly line. In other words,
-           the following two lines produce the same output:
-
-            vblendvpd xmm2,xmm1,xmm0      ; Last operand is fixed xmm0 
-            vblendvpd xmm2,xmm1           ; Implicit xmm0 omitted
-
-       (*) In the ELF backends, don't crash the assembler if
-           `section align' is specified without a value.
-
-C.1.29 Version 2.11
-
-       (*) Add support for the Intel AVX-512 instruction set:
-
-       (*) 16 new, 512-bit SIMD registers. Total 32 `(ZMM0 ~ ZMM31)'
-
-       (*) 8 new opmask registers `(K0 ~ K7)'. One of 7 registers
-           `(K1 ~ K7)' can be used as an opmask for conditional execution.
-
-       (*) A new EVEX encoding prefix. EVEX is based on VEX and provides
-           more capabilities: opmasks, broadcasting, embedded rounding and
-           compressed displacements.
-
-        - opmask 
-            VDIVPD zmm0{k1}{z}, zmm1, zmm3  ; conditional vector operation 
-                                            ; using opmask k1. 
-                                            ; {z} is for zero-masking 
-        - broadcasting 
-            VDIVPS zmm4, zmm5, rbx{1to16} ; load single-precision float and 
-                                            ; replicate it 16 times. 32 * 16 = 512 
-        - embedded rounding 
-            VCVTSI2SD xmm6, xmm7, {rz-sae}, rax ; round toward zero. note that it 
-                                             ; is used as if a separate operand. 
-                                             ; it comes after the last SIMD operand
-
-       (*) Add support for `ZWORD' (512 bits), `DZ' and `RESZ'.
-
-       (*) Add support for the MPX and SHA instruction sets.
-
-       (*) Better handling of section redefinition.
-
-       (*) Generate manpages when running `'make dist''.
-
-       (*) Handle all token chains in mmacro params range.
-
-       (*) Support split base,index effective address:
-
-            mov eax,eax+8,ecx*4   ; eax=base, ecx=index, 4=scale, 8=disp
-
-       This is expected to be most useful for the MPX instructions.
-
-       (*) Support `BND' prefix for branch instructions (for MPX).
-
-       (*) The `DEFAULT' directive can now take `BND' and `NOBND' options
-           to indicate whether all relevant branches should be getting
-           `BND' prefixes. This is expected to be the normal for use in MPX
-           code.
-
-       (*) Add `{evex}', `{vex3}' and `{vex2}' instruction prefixes to have
-           NASM encode the corresponding instruction, if possible, with an
-           EVEX, 3-byte VEX, or 2-byte VEX prefix, respectively.
-
-       (*) Support for section names longer than 8 bytes in Win32/Win64
-           COFF.
-
-       (*) The `NOSPLIT' directive by itself no longer forces a single
-           register to become an index register, unless it has an explicit
-           multiplier.
-
-            mov eax,nosplit eax       ; eax as base register 
-            mov eax,nosplit eax*1     ; eax as index register
-
-C.1.30 Version 2.10.09
-
-       (*) Pregenerate man pages.
-
-C.1.31 Version 2.10.08
-
-       (*) Fix `VMOVNTDQA', `MOVNTDQA' and `MOVLPD' instructions.
-
-       (*) Fix collision for `VGATHERQPS', `VPGATHERQD' instructions.
-
-       (*) Fix `VPMOVSXBQ', `VGATHERQPD', `VSPLLW' instructions.
-
-       (*) Add a bunch of AMD TBM instructions.
-
-       (*) Fix potential stack overwrite in numbers conversion.
-
-       (*) Allow byte size in `PREFETCHTx' instructions.
-
-       (*) Make manual pages up to date.
-
-       (*) Make `F3' and `F2' SSE prefixes to override `66'.
-
-       (*) Support of AMD SVM instructions in 32 bit mode.
-
-       (*) Fix near offsets code generation for `JMP', `CALL' instrictions
-           in long mode.
-
-       (*) Fix preprocessor parse regression when id is expanding to a
-           whitespace.
-
-C.1.32 Version 2.10.07
-
-       (*) Fix line continuation parsing being broken in previous version.
-
-C.1.33 Version 2.10.06
-
-       (*) Always quote the dependency source names when using the
-           automatic dependency generation options.
-
-       (*) If no dependency target name is specified via the `-MT' or `-MQ'
-           options, quote the default output name.
-
-       (*) Fix assembly of shift operations in `CPU 8086' mode.
-
-       (*) Fix incorrect generation of explicit immediate byte for shift by
-           1 under certain circumstances.
-
-       (*) Fix assembly of the `VPCMPGTQ' instruction.
-
-       (*) Fix RIP-relative relocations in the `macho64' backend.
-
-C.1.34 Version 2.10.05
-
-       (*) Add the `CLAC' and `STAC' instructions.
-
-C.1.35 Version 2.10.04
-
-       (*) Add back the inadvertently deleted 256-bit version of the
-           `VORPD' instruction.
-
-       (*) Correct disassembly of instructions starting with byte `82' hex.
-
-       (*) Fix corner cases in token pasting, for example:
-
-          %define N 1e%++%+ 5 
-                  dd N, 1e+5
-
-C.1.36 Version 2.10.03
-
-       (*) Correct the assembly of the instruction:
-
-       XRELEASE MOV absolute,AL
-
-           Previous versions would incorrectly generate `F3 A2' for this
-           instruction and issue a warning; correct behavior is to emit
-           `F3 88 05'.
-
-C.1.37 Version 2.10.02
-
-       (*) Add the `ifunc' macro package with integer functions, currently
-           only integer logarithms. See section 6.4.
-
-       (*) Add the `RDSEED', `ADCX' and `ADOX' instructions.
-
-C.1.38 Version 2.10.01
-
-       (*) Add missing VPMOVMSKB instruction with reg32, ymmreg operands.
-
-C.1.39 Version 2.10
-
-       (*) When optimization is enabled, `mov r64,imm' now optimizes to the
-           shortest form possible between:
-
-            mov r32,imm32                   ;  5 bytes 
-            mov r64,imm32                   ;  7 bytes 
-            mov r64,imm64                   ; 10 bytes
-
-           To force a specific form, use the `STRICT' keyword, see section
-           3.7.
-
-       (*) Add support for the Intel AVX2 instruction set.
-
-       (*) Add support for Bit Manipulation Instructions 1 and 2.
-
-       (*) Add support for Intel Transactional Synchronization Extensions
-           (TSX).
-
-       (*) Add support for x32 ELF (32-bit ELF with the CPU in 64-bit
-           mode.) See section 8.9.
-
-       (*) Add support for bigendian UTF-16 and UTF-32. See section 3.4.5.
-
-C.1.40 Version 2.09.10
-
-       (*) Fix up NSIS script to protect uninstaller against registry keys
-           absence or corruption. It brings in a few additional questions
-           to a user during deinstallation procedure but still it is better
-           than unpredictable file removal.
-
-C.1.41 Version 2.09.09
-
-       (*) Fix initialization of section attributes of `bin' output format.
-
-       (*) Fix `mach64' output format bug that crashes NASM due to NULL
-           symbols.
-
-C.1.42 Version 2.09.08
-
-       (*) Fix `__OUTPUT_FORMAT__' assignment when output driver alias is
-           used. For example when `-f elf' is used `__OUTPUT_FORMAT__' must
-           be set to `elf', if `-f elf32' is used `__OUTPUT_FORMAT__' must
-           be assigned accordingly, i.e. to `elf32'. The rule applies to
-           all output driver aliases. See section 5.4.
-
-C.1.43 Version 2.09.07
-
-       (*) Fix attempts to close same file several times when `-a' option
-           is used.
-
-       (*) Fixes for VEXTRACTF128, VMASKMOVPS encoding.
-
-C.1.44 Version 2.09.06
-
-       (*) Fix missed section attribute initialization in `bin' output
-           target.
-
-C.1.45 Version 2.09.05
-
-       (*) Fix arguments encoding for VPEXTRW instruction.
-
-       (*) Remove invalid form of VPEXTRW instruction.
-
-       (*) Add `VLDDQU' as alias for `VLDQQU' to match specification.
-
-C.1.46 Version 2.09.04
-
-       (*) Fix incorrect labels offset for VEX instructions.
-
-       (*) Eliminate bogus warning on implicit operand size override.
-
-       (*) `%if' term could not handle 64 bit numbers.
-
-       (*) The COFF backend was limiting relocations number to 16 bits even
-           if in real there were a way more relocations.
-
-C.1.47 Version 2.09.03
-
-       (*) Print `%macro' name inside `%rep' blocks on error.
-
-       (*) Fix preprocessor expansion behaviour. It happened sometime too
-           early and sometime simply wrong. Move behaviour back to the
-           origins (down to NASM 2.05.01).
-
-       (*) Fix uninitialized data dereference on OMF output format.
-
-       (*) Issue warning on unterminated `%{' construct.
-
-       (*) Fix for documentation typo.
-
-C.1.48 Version 2.09.02
-
-       (*) Fix reversed tokens when `%deftok' produces more than one output
-           token.
-
-       (*) Fix segmentation fault on disassembling some VEX instructions.
-
-       (*) Missing `%endif' did not always cause error.
-
-       (*) Fix typo in documentation.
-
-       (*) Compound context local preprocessor single line macro
-           identifiers were not expanded early enough and as result lead to
-           unresolved symbols.
-
-C.1.49 Version 2.09.01
-
-       (*) Fix NULL dereference on missed %deftok second parameter.
-
-       (*) Fix NULL dereference on invalid %substr parameters.
-
-C.1.50 Version 2.09
-
-       (*) Fixed assignment the magnitude of `%rep' counter. It is limited
-           to 62 bits now.
-
-       (*) Fixed NULL dereference if argument of `%strlen' resolves to
-           whitespace. For example if nonexistent macro parameter is used.
-
-       (*) `%ifenv', `%elifenv', `%ifnenv', and `%elifnenv' directives
-           introduced. See section 4.6.9.
-
-       (*) Fixed NULL dereference if environment variable is missed.
-
-       (*) Updates of new AVX v7 Intel instructions.
-
-       (*) `PUSH imm32' is now officially documented.
-
-       (*) Fix for encoding the LFS, LGS and LSS in 64-bit mode.
-
-       (*) Fixes for compatibility with OpenWatcom compiler and DOS 8.3
-           file format limitation.
-
-       (*) Macros parameters range expansion introduced. See section 4.5.4.
-
-       (*) Backward compatibility on expanging of local single macros
-           restored.
-
-       (*) 8 bit relocations for `elf' and `bin' output formats are
-           introduced.
-
-       (*) Short intersegment jumps are permitted now.
-
-       (*) An alignment more than 64 bytes are allowed for `win32', `win64'
-           output formats.
-
-       (*) `SECTALIGN' directive introduced. See section 5.10.2.
-
-       (*) `nojmp' option introduced in `smartalign' package. See section
-           6.2.
-
-       (*) Short aliases `win', `elf' and `macho' for output formats are
-           introduced. Each stands for `win32', `elf32' and `macho32'
-           accordingly.
-
-       (*) Faster handling of missing directives implemented.
-
-       (*) Various small improvements in documentation.
-
-       (*) No hang anymore if unable to open malloc.log file.
-
-       (*) The environments without vsnprintf function are able to build
-           nasm again.
-
-       (*) AMD LWP instructions updated.
-
-       (*) Tighten EA checks. We warn a user if there overflow in EA
-           addressing.
-
-       (*) Make `-Ox' the default optimization level. For the legacy
-           behavior, specify `-O0' explicitly. See section 2.1.24.
-
-       (*) Environment variables read with `%!' or tested with `%ifenv' can
-           now contain non-identifier characters if surrounded by quotes.
-           See section 4.13.2.
-
-       (*) Add a new standard macro package `%use fp' for floating-point
-           convenience macros. See section 6.3.
-
-C.1.51 Version 2.08.02
-
-       (*) Fix crash under certain circumstances when using the `%+'
-           operator.
-
-C.1.52 Version 2.08.01
-
-       (*) Fix the `%use' statement, which was broken in 2.08.
-
-C.1.53 Version 2.08
-
-       (*) A number of enhancements/fixes in macros area.
-
-       (*) Support for converting strings to tokens. See section 4.2.10.
-
-       (*) Fuzzy operand size logic introduced.
-
-       (*) Fix COFF stack overrun on too long export identifiers.
-
-       (*) Fix Macho-O alignment bug.
-
-       (*) Fix crashes with -fwin32 on file with many exports.
-
-       (*) Fix stack overrun for too long DEBUG id.
-
-       (*) Fix incorrect sbyte usage in IMUL (hit only if optimization flag
-           passed).
-
-       (*) Append ending token for `.stabs' records in the ELF output
-           format.
-
-       (*) New NSIS script which uses ModernUI and MultiUser approach.
-
-       (*) Visual Studio 2008 NASM integration (rules file).
-
-       (*) Warn a user if a constant is too long (and as result will be
-           stripped).
-
-       (*) The obsoleted pre-XOP AMD SSE5 instruction set which was never
-           actualized was removed.
-
-       (*) Fix stack overrun on too long error file name passed from the
-           command line.
-
-       (*) Bind symbols to the .text section by default (ie in case if
-           SECTION directive was omitted) in the ELF output format.
-
-       (*) Fix sync points array index wrapping.
-
-       (*) A few fixes for FMA4 and XOP instruction templates.
-
-       (*) Add AMD Lightweight Profiling (LWP) instructions.
-
-       (*) Fix the offset for `%arg' in 64-bit mode.
-
-       (*) An undefined local macro (`%$') no longer matches a global macro
-           with the same name.
-
-       (*) Fix NULL dereference on too long local labels.
-
-C.1.54 Version 2.07
-
-       (*) NASM is now under the 2-clause BSD license. See section 1.1.1.
-
-       (*) Fix the section type for the `.strtab' section in the `elf64'
-           output format.
-
-       (*) Fix the handling of `COMMON' directives in the `obj' output
-           format.
-
-       (*) New `ith' and `srec' output formats; these are variants of the
-           `bin' output format which output Intel hex and Motorola S-
-           records, respectively. See section 8.2 and section 8.3.
-
-       (*) `rdf2ihx' replaced with an enhanced `rdf2bin', which can output
-           binary, COM, Intel hex or Motorola S-records.
-
-       (*) The Windows installer now puts the NASM directory first in the
-           `PATH' of the "NASM Shell".
-
-       (*) Revert the early expansion behavior of `%+' to pre-2.06
-           behavior: `%+' is only expanded late.
-
-       (*) Yet another Mach-O alignment fix.
-
-       (*) Don't delete the list file on errors. Also, include error and
-           warning information in the list file.
-
-       (*) Support for 64-bit Mach-O output, see section 8.8.
-
-       (*) Fix assert failure on certain operations that involve strings
-           with high-bit bytes.
-
-C.1.55 Version 2.06
-
-       (*) This release is dedicated to the memory of Charles A. Crayne,
-           long time NASM developer as well as moderator of
-           `comp.lang.asm.x86' and author of the book _Serious Assembler_.
-           We miss you, Chuck.
-
-       (*) Support for indirect macro expansion (`%...'). See section
-           4.2.3.
-
-       (*) `%pop' can now take an argument, see section 4.9.1.
-
-       (*) The argument to `%use' is no longer macro-expanded. Use `%...'
-           if macro expansion is desired.
-
-       (*) Support for thread-local storage in ELF32 and ELF64. See section
-           8.9.4.
-
-       (*) Fix crash on `%ifmacro' without an argument.
-
-       (*) Correct the arguments to the `POPCNT' instruction.
-
-       (*) Fix section alignment in the Mach-O format.
-
-       (*) Update AVX support to version 5 of the Intel specification.
-
-       (*) Fix the handling of accesses to context-local macros from higher
-           levels in the context stack.
-
-       (*) Treat `WAIT' as a prefix rather than as an instruction, thereby
-           allowing constructs like `O16 FSAVE' to work correctly.
-
-       (*) Support for structures with a non-zero base offset. See section
-           5.9.1.
-
-       (*) Correctly handle preprocessor token concatenation (see section
-           4.5.9) involving floating-point numbers.
-
-       (*) The `PINSR' series of instructions have been corrected and
-           rationalized.
-
-       (*) Removed AMD SSE5, replaced with the new XOP/FMA4/CVT16 (rev
-           3.03) spec.
-
-       (*) The ELF backends no longer automatically generate a `.comment'
-           section.
-
-       (*) Add additional "well-known" ELF sections with default
-           attributes. See section 8.9.2.
-
-C.1.56 Version 2.05.01
-
-       (*) Fix the `-w'/`-W' option parsing, which was broken in NASM 2.05.
-
-C.1.57 Version 2.05
-
-       (*) Fix redundant REX.W prefix on `JMP reg64'.
-
-       (*) Make the behaviour of `-O0' match NASM 0.98 legacy behavior. See
-           section 2.1.24.
-
-       (*) `-w-user' can be used to suppress the output of `%warning'
-           directives. See section 2.1.26.
-
-       (*) Fix bug where `ALIGN' would issue a full alignment datum instead
-           of zero bytes.
-
-       (*) Fix offsets in list files.
-
-       (*) Fix `%include' inside multi-line macros or loops.
-
-       (*) Fix error where NASM would generate a spurious warning on valid
-           optimizations of immediate values.
-
-       (*) Fix arguments to a number of the `CVT' SSE instructions.
-
-       (*) Fix RIP-relative offsets when the instruction carries an
-           immediate.
-
-       (*) Massive overhaul of the ELF64 backend for spec compliance.
-
-       (*) Fix the Geode `PFRCPV' and `PFRSQRTV' instruction.
-
-       (*) Fix the SSE 4.2 `CRC32' instruction.
-
-C.1.58 Version 2.04
-
-       (*) Sanitize macro handing in the `%error' directive.
-
-       (*) New `%warning' directive to issue user-controlled warnings.
-
-       (*) `%error' directives are now deferred to the final assembly
-           phase.
-
-       (*) New `%fatal' directive to immediately terminate assembly.
-
-       (*) New `%strcat' directive to join quoted strings together.
-
-       (*) New `%use' macro directive to support standard macro directives.
-           See section 4.8.4.
-
-       (*) Excess default parameters to `%macro' now issues a warning by
-           default. See section 4.5.
-
-       (*) Fix `%ifn' and `%elifn'.
-
-       (*) Fix nested `%else' clauses.
-
-       (*) Correct the handling of nested `%rep's.
-
-       (*) New `%unmacro' directive to undeclare a multi-line macro. See
-           section 4.5.12.
-
-       (*) Builtin macro `__PASS__' which expands to the current assembly
-           pass. See section 5.8.
-
-       (*) `__utf16__' and `__utf32__' operators to generate UTF-16 and
-           UTF-32 strings. See section 3.4.5.
-
-       (*) Fix bug in case-insensitive matching when compiled on platforms
-           that don't use the `configure' script. Of the official release
-           binaries, that only affected the OS/2 binary.
-
-       (*) Support for x87 packed BCD constants. See section 3.4.7.
-
-       (*) Correct the `LTR' and `SLDT' instructions in 64-bit mode.
-
-       (*) Fix unnecessary REX.W prefix on indirect jumps in 64-bit mode.
-
-       (*) Add AVX versions of the AES instructions (`VAES'...).
-
-       (*) Fix the 256-bit FMA instructions.
-
-       (*) Add 256-bit AVX stores per the latest AVX spec.
-
-       (*) VIA XCRYPT instructions can now be written either with or
-           without `REP', apparently different versions of the VIA spec
-           wrote them differently.
-
-       (*) Add missing 64-bit `MOVNTI' instruction.
-
-       (*) Fix the operand size of `VMREAD' and `VMWRITE'.
-
-       (*) Numerous bug fixes, especially to the AES, AVX and VTX
-           instructions.
-
-       (*) The optimizer now always runs until it converges. It also runs
-           even when disabled, but doesn't optimize. This allows most
-           forward references to be resolved properly.
-
-       (*) `%push' no longer needs a context identifier; omitting the
-           context identifier results in an anonymous context.
-
-C.1.59 Version 2.03.01
-
-       (*) Fix buffer overflow in the listing module.
-
-       (*) Fix the handling of hexadecimal escape codes in `...` strings.
-
-       (*) The Postscript/PDF documentation has been reformatted.
-
-       (*) The `-F' option now implies `-g'.
-
-C.1.60 Version 2.03
-
-       (*) Add support for Intel AVX, CLMUL and FMA instructions, including
-           YMM registers.
-
-       (*) `dy', `resy' and `yword' for 32-byte operands.
-
-       (*) Fix some SSE5 instructions.
-
-       (*) Intel `INVEPT', `INVVPID' and `MOVBE' instructions.
-
-       (*) Fix checking for critical expressions when the optimizer is
-           enabled.
-
-       (*) Support the DWARF debugging format for ELF targets.
-
-       (*) Fix optimizations of signed bytes.
-
-       (*) Fix operation on bigendian machines.
-
-       (*) Fix buffer overflow in the preprocessor.
-
-       (*) `SAFESEH' support for Win32, `IMAGEREL' for Win64 (SEH).
-
-       (*) `%?' and `%??' to refer to the name of a macro itself. In
-           particular, `%idefine keyword $%?' can be used to make a keyword
-           "disappear".
-
-       (*) New options for dependency generation: `-MD', `-MF', `-MP',
-           `-MT', `-MQ'.
-
-       (*) New preprocessor directives `%pathsearch' and `%depend'; INCBIN
-           reimplemented as a macro.
-
-       (*) `%include' now resolves macros in a sane manner.
-
-       (*) `%substr' can now be used to get other than one-character
-           substrings.
-
-       (*) New type of character/string constants, using backquotes
-           (``...`'), which support C-style escape sequences.
-
-       (*) `%defstr' and `%idefstr' to stringize macro definitions before
-           creation.
-
-       (*) Fix forward references used in `EQU' statements.
-
-C.1.61 Version 2.02
-
-       (*) Additional fixes for MMX operands with explicit `qword', as well
-           as (hopefully) SSE operands with `oword'.
-
-       (*) Fix handling of truncated strings with `DO'.
-
-       (*) Fix segfaults due to memory overwrites when floating-point
-           constants were used.
-
-       (*) Fix segfaults due to missing include files.
-
-       (*) Fix OpenWatcom Makefiles for DOS and OS/2.
-
-       (*) Add autogenerated instruction list back into the documentation.
-
-       (*) ELF: Fix segfault when generating stabs, and no symbols have
-           been defined.
-
-       (*) ELF: Experimental support for DWARF debugging information.
-
-       (*) New compile date and time standard macros.
-
-       (*) `%ifnum' now returns true for negative numbers.
-
-       (*) New `%iftoken' test for a single token.
-
-       (*) New `%ifempty' test for empty expansion.
-
-       (*) Add support for the `XSAVE' instruction group.
-
-       (*) Makefile for Netware/gcc.
-
-       (*) Fix issue with some warnings getting emitted way too many times.
-
-       (*) Autogenerated instruction list added to the documentation.
-
-C.1.62 Version 2.01
-
-       (*) Fix the handling of MMX registers with explicit `qword' tags on
-           memory (broken in 2.00 due to 64-bit changes.)
-
-       (*) Fix the PREFETCH instructions.
-
-       (*) Fix the documentation.
-
-       (*) Fix debugging info when using `-f elf' (backwards compatibility
-           alias for `-f elf32').
-
-       (*) Man pages for rdoff tools (from the Debian project.)
-
-       (*) ELF: handle large numbers of sections.
-
-       (*) Fix corrupt output when the optimizer runs out of passes.
-
-C.1.63 Version 2.00
-
-       (*) Added c99 data-type compliance.
-
-       (*) Added general x86-64 support.
-
-       (*) Added win64 (x86-64 COFF) output format.
-
-       (*) Added `__BITS__' standard macro.
-
-       (*) Renamed the `elf' output format to `elf32' for clarity.
-
-       (*) Added `elf64' and `macho' (MacOS X) output formats.
-
-       (*) Added Numeric constants in `dq' directive.
-
-       (*) Added `oword', `do' and `reso' pseudo operands.
-
-       (*) Allow underscores in numbers.
-
-       (*) Added 8-, 16- and 128-bit floating-point formats.
-
-       (*) Added binary, octal and hexadecimal floating-point.
-
-       (*) Correct the generation of floating-point constants.
-
-       (*) Added floating-point option control.
-
-       (*) Added Infinity and NaN floating point support.
-
-       (*) Added ELF Symbol Visibility support.
-
-       (*) Added setting OSABI value in ELF header directive.
-
-       (*) Added Generate Makefile Dependencies option.
-
-       (*) Added Unlimited Optimization Passes option.
-
-       (*) Added `%IFN' and `%ELIFN' support.
-
-       (*) Added Logical Negation Operator.
-
-       (*) Enhanced Stack Relative Preprocessor Directives.
-
-       (*) Enhanced ELF Debug Formats.
-
-       (*) Enhanced Send Errors to a File option.
-
-       (*) Added SSSE3, SSE4.1, SSE4.2, SSE5 support.
-
-       (*) Added a large number of additional instructions.
-
-       (*) Significant performance improvements.
-
-       (*) `-w+warning' and `-w-warning' can now be written as -Wwarning
-           and -Wno-warning, respectively. See section 2.1.26.
-
-       (*) Add `-w+error' to treat warnings as errors. See section 2.1.26.
-
-       (*) Add `-w+all' and `-w-all' to enable or disable all suppressible
-           warnings. See section 2.1.26.
-
-   C.2 NASM 0.98 Series
-
-       The 0.98 series was the production versions of NASM from 1999 to
-       2007.
-
- C.2.1 Version 0.98.39
-
-       (*) fix buffer overflow
-
-       (*) fix outas86's `.bss' handling
-
-       (*) "make spotless" no longer deletes config.h.in.
-
-       (*) `%(el)if(n)idn' insensitivity to string quotes difference
-           (#809300).
-
-       (*) (nasm.c)`__OUTPUT_FORMAT__' changed to string value instead of
-           symbol.
-
- C.2.2 Version 0.98.38
-
-       (*) Add Makefile for 16-bit DOS binaries under OpenWatcom, and
-           modify `mkdep.pl' to be able to generate completely pathless
-           dependencies, as required by OpenWatcom wmake (it supports path
-           searches, but not explicit paths.)
-
-       (*) Fix the `STR' instruction.
-
-       (*) Fix the ELF output format, which was broken under certain
-           circumstances due to the addition of stabs support.
-
-       (*) Quick-fix Borland format debug-info for `-f obj'
-
-       (*) Fix for `%rep' with no arguments (#560568)
-
-       (*) Fix concatenation of preprocessor function call (#794686)
-
-       (*) Fix long label causes coredump (#677841)
-
-       (*) Use autoheader as well as autoconf to keep configure from
-           generating ridiculously long command lines.
-
-       (*) Make sure that all of the formats which support debugging output
-           actually will suppress debugging output when `-g' not specified.
-
- C.2.3 Version 0.98.37
-
-       (*) Paths given in `-I' switch searched for `incbin'-ed as well as
-           `%include'-ed files.
-
-       (*) Added stabs debugging for the ELF output format, patch from
-           Martin Wawro.
-
-       (*) Fix `output/outbin.c' to allow origin > 80000000h.
-
-       (*) Make `-U' switch work.
-
-       (*) Fix the use of relative offsets with explicit prefixes, e.g.
-           `a32 loop foo'.
-
-       (*) Remove `backslash()'.
-
-       (*) Fix the `SMSW' and `SLDT' instructions.
-
-       (*) `-O2' and `-O3' are no longer aliases for `-O10' and `-O15'. If
-           you mean the latter, please say so! :)
-
- C.2.4 Version 0.98.36
-
-       (*) Update rdoff - librarian/archiver - common rec - docs!
-
-       (*) Fix signed/unsigned problems.
-
-       (*) Fix `JMP FAR label' and `CALL FAR label'.
-
-       (*) Add new multisection support - map files - fix align bug
-
-       (*) Fix sysexit, movhps/movlps reg,reg bugs in insns.dat
-
-       (*) `Q' or `O' suffixes indicate octal
-
-       (*) Support Prescott new instructions (PNI).
-
-       (*) Cyrix `XSTORE' instruction.
-
- C.2.5 Version 0.98.35
-
-       (*) Fix build failure on 16-bit DOS (Makefile.bc3 workaround for
-           compiler bug.)
-
-       (*) Fix dependencies and compiler warnings.
-
-       (*) Add "const" in a number of places.
-
-       (*) Add -X option to specify error reporting format (use -Xvc to
-           integrate with Microsoft Visual Studio.)
-
-       (*) Minor changes for code legibility.
-
-       (*) Drop use of tmpnam() in rdoff (security fix.)
-
- C.2.6 Version 0.98.34
-
-       (*) Correct additional address-size vs. operand-size confusions.
-
-       (*) Generate dependencies for all Makefiles automatically.
-
-       (*) Add support for unimplemented (but theoretically available)
-           registers such as tr0 and cr5. Segment registers 6 and 7 are
-           called segr6 and segr7 for the operations which they can be
-           represented.
-
-       (*) Correct some disassembler bugs related to redundant address-size
-           prefixes. Some work still remains in this area.
-
-       (*) Correctly generate an error for things like "SEG eax".
-
-       (*) Add the JMPE instruction, enabled by "CPU IA64".
-
-       (*) Correct compilation on newer gcc/glibc platforms.
-
-       (*) Issue an error on things like "jmp far eax".
-
- C.2.7 Version 0.98.33
-
-       (*) New __NASM_PATCHLEVEL__ and __NASM_VERSION_ID__ standard macros
-           to round out the version-query macros. version.pl now
-           understands X.YYplWW or X.YY.ZZplWW as a version number,
-           equivalent to X.YY.ZZ.WW (or X.YY.0.WW, as appropriate).
-
-       (*) New keyword "strict" to disable the optimization of specific
-           operands.
-
-       (*) Fix the handing of size overrides with JMP instructions
-           (instructions such as "jmp dword foo".)
-
-       (*) Fix the handling of "ABSOLUTE label", where "label" points into
-           a relocatable segment.
-
-       (*) Fix OBJ output format with lots of externs.
-
-       (*) More documentation updates.
-
-       (*) Add -Ov option to get verbose information about optimizations.
-
-       (*) Undo a braindead change which broke `%elif' directives.
-
-       (*) Makefile updates.
-
- C.2.8 Version 0.98.32
-
-       (*) Fix NASM crashing when `%macro' directives were left
-           unterminated.
-
-       (*) Lots of documentation updates.
-
-       (*) Complete rewrite of the PostScript/PDF documentation generator.
-
-       (*) The MS Visual C++ Makefile was updated and corrected.
-
-       (*) Recognize .rodata as a standard section name in ELF.
-
-       (*) Fix some obsolete Perl4-isms in Perl scripts.
-
-       (*) Fix configure.in to work with autoconf 2.5x.
-
-       (*) Fix a couple of "make cleaner" misses.
-
-       (*) Make the normal "./configure && make" work with Cygwin.
-
- C.2.9 Version 0.98.31
-
-       (*) Correctly build in a separate object directory again.
-
-       (*) Derive all references to the version number from the version
-           file.
-
-       (*) New standard macros __NASM_SUBMINOR__ and __NASM_VER__ macros.
-
-       (*) Lots of Makefile updates and bug fixes.
-
-       (*) New `%ifmacro' directive to test for multiline macros.
-
-       (*) Documentation updates.
-
-       (*) Fixes for 16-bit OBJ format output.
-
-       (*) Changed the NASM environment variable to NASMENV.
-
-C.2.10 Version 0.98.30
-
-       (*) Changed doc files a lot: completely removed old READMExx and
-           Wishlist files, incorporating all information in CHANGES and
-           TODO.
-
-       (*) I waited a long time to rename zoutieee.c to (original)
-           outieee.c
-
-       (*) moved all output modules to output/ subdirectory.
-
-       (*) Added 'make strip' target to strip debug info from nasm &
-           ndisasm.
-
-       (*) Added INSTALL file with installation instructions.
-
-       (*) Added -v option description to nasm man.
-
-       (*) Added dist makefile target to produce source distributions.
-
-       (*) 16-bit support for ELF output format (GNU extension, but
-           useful.)
-
-C.2.11 Version 0.98.28
-
-       (*) Fastcooked this for Debian's Woody release: Frank applied the
-           INCBIN bug patch to 0.98.25alt and called it 0.98.28 to not
-           confuse poor little apt-get.
-
-C.2.12 Version 0.98.26
-
-       (*) Reorganised files even better from 0.98.25alt
-
-C.2.13 Version 0.98.25alt
-
-       (*) Prettified the source tree. Moved files to more reasonable
-           places.
-
-       (*) Added findleak.pl script to misc/ directory.
-
-       (*) Attempted to fix doc.
-
-C.2.14 Version 0.98.25
-
-       (*) Line continuation character `\'.
-
-       (*) Docs inadvertently reverted - "dos packaging".
-
-C.2.15 Version 0.98.24p1
-
-       (*) FIXME: Someone, document this please.
-
-C.2.16 Version 0.98.24
-
-       (*) Documentation - Ndisasm doc added to Nasm.doc.
-
-C.2.17 Version 0.98.23
-
-       (*) Attempted to remove rdoff version1
-
-       (*) Lino Mastrodomenico's patches to preproc.c (%$$ bug?).
-
-C.2.18 Version 0.98.22
-
-       (*) Update rdoff2 - attempt to remove v1.
-
-C.2.19 Version 0.98.21
-
-       (*) Optimization fixes.
-
-C.2.20 Version 0.98.20
-
-       (*) Optimization fixes.
-
-C.2.21 Version 0.98.19
-
-       (*) H. J. Lu's patch back out.
-
-C.2.22 Version 0.98.18
-
-       (*) Added ".rdata" to "-f win32".
-
-C.2.23 Version 0.98.17
-
-       (*) H. J. Lu's "bogus elf" patch. (Red Hat problem?)
-
-C.2.24 Version 0.98.16
-
-       (*) Fix whitespace before "section ..." bug.
-
-C.2.25 Version 0.98.15
-
-       (*) Rdoff changes (?).
-
-       (*) Fix fixes to memory leaks.
-
-C.2.26 Version 0.98.14
-
-       (*) Fix memory leaks.
-
-C.2.27 Version 0.98.13
-
-       (*) There was no 0.98.13
-
-C.2.28 Version 0.98.12
-
-       (*) Update optimization (new function of "-O1")
-
-       (*) Changes to test/bintest.asm (?).
-
-C.2.29 Version 0.98.11
-
-       (*) Optimization changes.
-
-       (*) Ndisasm fixed.
-
-C.2.30 Version 0.98.10
-
-       (*) There was no 0.98.10
-
-C.2.31 Version 0.98.09
-
-       (*) Add multiple sections support to "-f bin".
-
-       (*) Changed GLOBAL_TEMP_BASE in outelf.c from 6 to 15.
-
-       (*) Add "-v" as an alias to the "-r" switch.
-
-       (*) Remove "#ifdef" from Tasm compatibility options.
-
-       (*) Remove redundant size-overrides on "mov ds, ex", etc.
-
-       (*) Fixes to SSE2, other insns.dat (?).
-
-       (*) Enable uppercase "I" and "P" switches.
-
-       (*) Case insinsitive "seg" and "wrt".
-
-       (*) Update install.sh (?).
-
-       (*) Allocate tokens in blocks.
-
-       (*) Improve "invalid effective address" messages.
-
-C.2.32 Version 0.98.08
-
-       (*) Add "`%strlen'" and "`%substr'" macro operators
-
-       (*) Fixed broken c16.mac.
-
-       (*) Unterminated string error reported.
-
-       (*) Fixed bugs as per 0.98bf
-
-C.2.33 Version 0.98.09b with John Coffman patches released 28-Oct-2001
-
-       Changes from 0.98.07 release to 98.09b as of 28-Oct-2001
-
-       (*) More closely compatible with 0.98 when -O0 is implied or
-           specified. Not strictly identical, since backward branches in
-           range of short offsets are recognized, and signed byte values
-           with no explicit size specification will be assembled as a
-           single byte.
-
-       (*) More forgiving with the PUSH instruction. 0.98 requires a size
-           to be specified always. 0.98.09b will imply the size from the
-           current BITS setting (16 or 32).
-
-       (*) Changed definition of the optimization flag:
-
-          -O0     strict two-pass assembly, JMP and Jcc are 
-                  handled more like 0.98, except that back- 
-                  ward JMPs are short, if possible. 
-       
-          -O1     strict two-pass assembly, but forward 
-                  branches are assembled with code guaranteed 
-                  to reach; may produce larger code than 
-                  -O0, but will produce successful assembly 
-                  more often if branch offset sizes are not 
-                  specified. 
-       
-          -O2     multi-pass optimization, minimize branch 
-                  offsets; also will minimize signed immed- 
-                  iate bytes, overriding size specification. 
-       
-          -O3     like -O2, but more passes taken, if needed
-
-C.2.34 Version 0.98.07 released 01/28/01
-
-       (*) Added Stepane Denis' SSE2 instructions to a *working* version of
-           the code - some earlier versions were based on broken code -
-           sorry 'bout that. version "0.98.07"
-
-       (*) Cosmetic modifications to nasm.c, nasm.h, AUTHORS, MODIFIED
-
-C.2.35 Version 0.98.06f released 01/18/01
-
-       (*) Add "metalbrain"s jecxz bug fix in insns.dat
-
-       (*) Alter nasmdoc.src to match - version "0.98.06f"
-
-C.2.36 Version 0.98.06e released 01/09/01
-
-       (*) Removed the "outforms.h" file - it appears to be someone's old
-           backup of "outform.h". version "0.98.06e"
-
-       (*) fbk - finally added the fix for the "multiple %includes bug",
-           known since 7/27/99 - reported originally (?) and sent to us by
-           Austin Lunnen - he reports that John Fine had a fix within the
-           day. Here it is...
-
-       (*) Nelson Rush resigns from the group. Big thanks to Nelson for his
-           leadership and enthusiasm in getting these changes incorporated
-           into Nasm!
-
-       (*) fbk - list +, list - directives - ineptly implemented,
-           should be re-written or removed, perhaps.
-
-       (*) Brian Raiter / fbk - "elfso bug" fix - applied to aoutb format
-           as well - testing might be desirable...
-
-       (*) James Seter - -postfix, -prefix command line switches.
-
-       (*) Yuri Zaporozhets - rdoff utility changes.
-
-C.2.37 Version 0.98p1
-
-       (*) GAS-like palign (Panos Minos)
-
-       (*) FIXME: Someone, fill this in with details
-
-C.2.38 Version 0.98bf (bug-fixed)
-
-       (*) Fixed - elf and aoutb bug - shared libraries - multiple
-           "%include" bug in "-f obj" - jcxz, jecxz bug - unrecognized
-           option bug in ndisasm
-
-C.2.39 Version 0.98.03 with John Coffman's changes released 27-Jul-2000
-
-       (*) Added signed byte optimizations for the 0x81/0x83 class of
-           instructions: ADC, ADD, AND, CMP, OR, SBB, SUB, XOR: when used
-           as 'ADD reg16,imm' or 'ADD reg32,imm.' Also optimization of
-           signed byte form of 'PUSH imm' and 'IMUL reg,imm'/'IMUL
-           reg,reg,imm.' No size specification is needed.
-
-       (*) Added multi-pass JMP and Jcc offset optimization. Offsets on
-           forward references will preferentially use the short form,
-           without the need to code a specific size (short or near) for the
-           branch. Added instructions for 'Jcc label' to use the form
-           'Jnotcc $+3/JMP label', in cases where a short offset is out of
-           bounds. If compiling for a 386 or higher CPU, then the 386 form
-           of Jcc will be used instead.
-
-           This feature is controlled by a new command-line switch: "O",
-           (upper case letter O). "-O0" reverts the assembler to no extra
-           optimization passes, "-O1" allows up to 5 extra passes, and "-
-           O2"(default), allows up to 10 extra optimization passes.
-
-       (*) Added a new directive: 'cpu XXX', where XXX is any of: 8086,
-           186, 286, 386, 486, 586, pentium, 686, PPro, P2, P3 or Katmai.
-           All are case insensitive. All instructions will be selected only
-           if they apply to the selected cpu or lower. Corrected a couple
-           of bugs in cpu-dependence in 'insns.dat'.
-
-       (*) Added to 'standard.mac', the "use16" and "use32" forms of the
-           "bits 16/32" directive. This is nothing new, just conforms to a
-           lot of other assemblers. (minor)
-
-       (*) Changed label allocation from 320/32 (10000 labels @ 200K+) to
-           32/37 (1000 labels); makes running under DOS much easier. Since
-           additional label space is allocated dynamically, this should
-           have no effect on large programs with lots of labels. The 37 is
-           a prime, believed to be better for hashing. (minor)
-
-C.2.40 Version 0.98.03
-
-       "Integrated patchfile 0.98-0.98.01. I call this version 0.98.03 for
-       historical reasons: 0.98.02 was trashed." --John Coffman
-       <johninsd@san.rr.com>, 27-Jul-2000
-
-       (*) Kendall Bennett's SciTech MGL changes
-
-       (*) Note that you must define "TASM_COMPAT" at compile-time to get
-           the Tasm Ideal Mode compatibility.
-
-       (*) All changes can be compiled in and out using the TASM_COMPAT
-           macros, and when compiled without TASM_COMPAT defined we get the
-           exact same binary as the unmodified 0.98 sources.
-
-       (*) standard.mac, macros.c: Added macros to ignore TASM directives
-           before first include
-
-       (*) nasm.h: Added extern declaration for tasm_compatible_mode
-
-       (*) nasm.c: Added global variable tasm_compatible_mode
-
-       (*) Added command line switch for TASM compatible mode (-t)
-
-       (*) Changed version command line to reflect when compiled with TASM
-           additions
-
-       (*) Added response file processing to allow all arguments on a
-           single line (response file is @resp rather than -@resp for NASM
-           format).
-
-       (*) labels.c: Changes islocal() macro to support TASM style @@local
-           labels.
-
-       (*) Added islocalchar() macro to support TASM style @@local labels.
-
-       (*) parser.c: Added support for TASM style memory references (ie:
-           mov DWORD eax,10 rather than the NASM style mov DWORD
-           eax,10).
-
-       (*) preproc.c: Added new directives, `%arg', `%local', `%stacksize'
-           to directives table
-
-       (*) Added support for TASM style directives without a leading %
-           symbol.
-
-       (*) Integrated a block of changes from Andrew Zabolotny
-           <bit@eltech.ru>:
-
-       (*) A new keyword `%xdefine' and its case-insensitive counterpart
-           `%ixdefine'. They work almost the same way as `%define' and
-           `%idefine' but expand the definition immediately, not on the
-           invocation. Something like a cross between `%define' and
-           `%assign'. The "x" suffix stands for "eXpand", so "xdefine" can
-           be deciphered as "expand-and-define". Thus you can do things
-           like this:
-
-            %assign ofs     0 
-       
-            %macro  arg     1 
-                    %xdefine %1 dword esp+ofs 
-                    %assign ofs ofs+4 
-            %endmacro
-
-       (*) Changed the place where the expansion of %$name macros are
-           expanded. Now they are converted into ..@ctxnum.name form when
-           detokenizing, so there are no quirks as before when using %$name
-           arguments to macros, in macros etc. For example:
-
-            %macro  abc     1 
-                    %define %1 hello 
-            %endm 
-       
-            abc     %$here 
-            %$here
-
-           Now last line will be expanded into "hello" as expected. This
-           also allows for lots of goodies, a good example are extended
-           "proc" macros included in this archive.
-
-       (*) Added a check for "cstk" in smacro_defined() before calling
-           get_ctx() - this allows for things like:
-
-            %ifdef %$abc 
-            %endif
-
-           to work without warnings even in no context.
-
-       (*) Added a check for "cstk" in %if*ctx and %elif*ctx directives -
-           this allows to use `%ifctx' without excessive warnings. If there
-           is no active context, `%ifctx' goes through "false" branch.
-
-       (*) Removed "user error: " prefix with `%error' directive: it just
-           clobbers the output and has absolutely no functionality.
-           Besides, this allows to write macros that does not differ from
-           built-in functions in any way.
-
-       (*) Added expansion of string that is output by `%error' directive.
-           Now you can do things like:
-
-            %define hello(x) Hello, x! 
-       
-            %define %$name andy 
-            %error "hello(%$name)"
-
-           Same happened with `%include' directive.
-
-       (*) Now all directives that expect an identifier will try to expand
-           and concatenate everything without whitespaces in between before
-           usage. For example, with "unfixed" nasm the commands
-
-            %define %$abc hello 
-            %define __%$abc goodbye 
-            __%$abc
-
-           would produce "incorrect" output: last line will expand to
-
-            hello goodbyehello
-
-           Not quite what you expected, eh? :-) The answer is that
-           preprocessor treats the `%define' construct as if it would be
-
-            %define __ %$abc goodbye
-
-           (note the white space between __ and %$abc). After my "fix" it
-           will "correctly" expand into
-
-            goodbye
-
-           as expected. Note that I use quotes around words "correct",
-           "incorrect" etc because this is rather a feature not a bug;
-           however current behaviour is more logical (and allows more
-           advanced macro usage :-).
-
-       Same change was applied to:
-       `%push',`%macro',`%imacro',`%define',`%idefine',`%xdefine',`%ixdefine',
-       `%assign',`%iassign',`%undef'
-
-       (*) A new directive WARNING {+|-}warning-id have been added. It
-           works only if the assembly phase is enabled (i.e. it doesn't
-           work with nasm -e).
-
-       (*) A new warning type: macro-selfref. By default this warning is
-           disabled; when enabled NASM warns when a macro self-references
-           itself; for example the following source:
-
-              WARNING macro-selfref 
-       
-              %macro          push    1-* 
-                      %rep    %0 
-                              push    %1 
-                              %rotate 1 
-                      %endrep 
-              %endmacro 
-       
-                              push    eax,ebx,ecx
-
-           will produce a warning, but if we remove the first line we won't
-           see it anymore (which is The Right Thing To Do {tm} IMHO since C
-           preprocessor eats such constructs without warnings at all).
-
-       (*) Added a "error" routine to preprocessor which always will set
-           ERR_PASS1 bit in severity_code. This removes annoying repeated
-           errors on first and second passes from preprocessor.
-
-       (*) Added the %+ operator in single-line macros for concatenating
-           two identifiers. Usage example:
-
-              %define _myfunc _otherfunc 
-              %define cextern(x) _ %+ x 
-              cextern (myfunc)
-
-           After first expansion, third line will become "_myfunc". After
-           this expansion is performed again so it becomes "_otherunc".
-
-       (*) Now if preprocessor is in a non-emitting state, no warning or
-           error will be emitted. Example:
-
-              %if 1 
-                      mov     eax,ebx 
-              %else 
-                      put anything you want between these two brackets, 
-                      even macro-parameter references %1 or local 
-                      labels %$zz or macro-local labels %%zz - no 
-                      warning will be emitted. 
-              %endif
-
-       (*) Context-local variables on expansion as a last resort are looked
-           up in outer contexts. For example, the following piece:
-
-              %push   outer 
-              %define %$a esp 
-       
-                      %push   inner 
-                      %$a 
-                      %pop 
-              %pop
-
-           will expand correctly the fourth line to esp; if we'll define
-           another %$a inside the "inner" context, it will take precedence
-           over outer definition. However, this modification has been
-           applied only to expand_smacro and not to smacro_define: as a
-           consequence expansion looks in outer contexts, but `%ifdef'
-           won't look in outer contexts.
-
-           This behaviour is needed because we don't want nested contexts
-           to act on already defined local macros. Example:
-
-              %define %$arg1  esp+4 
-              test    eax,eax 
-              if      nz 
-                      mov     eax,%$arg1 
-              endif
-
-           In this example the "if" mmacro enters into the "if" context, so
-           %$arg1 is not valid anymore inside "if". Of course it could be
-           worked around by using explicitly %$$arg1 but this is ugly IMHO.
-
-       (*) Fixed memory leak in `%undef'. The origline wasn't freed before
-           exiting on success.
-
-       (*) Fixed trap in preprocessor when line expanded to empty set of
-           tokens. This happens, for example, in the following case:
-
-              #define SOMETHING 
-              SOMETHING
-
-C.2.41 Version 0.98
-
-       All changes since NASM 0.98p3 have been produced by H. Peter Anvin
-       <hpa@zytor.com>.
-
-       (*) The documentation comment delimiter is
-
-       (*) Allow EQU definitions to refer to external labels; reported by
-           Pedro Gimeno.
-
-       (*) Re-enable support for RDOFF v1; reported by Pedro Gimeno.
-
-       (*) Updated License file per OK from Simon and Julian.
-
-C.2.42 Version 0.98p9
-
-       (*) Update documentation (although the instruction set reference
-           will have to wait; I don't want to hold up the 0.98 release for
-           it.)
-
-       (*) Verified that the NASM implementation of the PEXTRW and PMOVMSKB
-           instructions is correct. The encoding differs from what the
-           Intel manuals document, but the Pentium III behaviour matches
-           NASM, not the Intel manuals.
-
-       (*) Fix handling of implicit sizes in PSHUFW and PINSRW, reported by
-           Stefan Hoffmeister.
-
-       (*) Resurrect the -s option, which was removed when changing the
-           diagnostic output to stdout.
-
-C.2.43 Version 0.98p8
-
-       (*) Fix for "DB" when NASM is running on a bigendian machine.
-
-       (*) Invoke insns.pl once for each output script, making Makefile.in
-           legal for "make -j".
-
-       (*) Improve the Unix configure-based makefiles to make package
-           creation easier.
-
-       (*) Included an RPM .spec file for building RPM (RedHat Package
-           Manager) packages on Linux or Unix systems.
-
-       (*) Fix Makefile dependency problems.
-
-       (*) Change src/rdsrc.pl to include sectioning information in info
-           output; required for install-info to work.
-
-       (*) Updated the RDOFF distribution to version 2 from Jules; minor
-           massaging to make it compile in my environment.
-
-       (*) Split doc files that can be built by anyone with a Perl
-           interpreter off into a separate archive.
-
-       (*) "Dress rehearsal" release!
-
-C.2.44 Version 0.98p7
-
-       (*) Fixed opcodes with a third byte-sized immediate argument to not
-           complain if given "byte" on the immediate.
-
-       (*) Allow `%undef' to remove single-line macros with arguments. This
-           matches the behaviour of #undef in the C preprocessor.
-
-       (*) Allow -d, -u, -i and -p to be specified as -D, -U, -I and -P for
-           compatibility with most C compilers and preprocessors. This
-           allows Makefile options to be shared between cc and nasm, for
-           example.
-
-       (*) Minor cleanups.
-
-       (*) Went through the list of Katmai instructions and hopefully fixed
-           the (rather few) mistakes in it.
-
-       (*) (Hopefully) fixed a number of disassembler bugs related to
-           ambiguous instructions (disambiguated by -p) and SSE
-           instructions with REP.
-
-       (*) Fix for bug reported by Mark Junger: "call dword 0x12345678"
-           should work and may add an OSP (affected CALL, JMP, Jcc).
-
-       (*) Fix for environments when "stderr" isn't a compile-time
-           constant.
-
-C.2.45 Version 0.98p6
-
-       (*) Took officially over coordination of the 0.98 release; so drop
-           the p3.x notation. Skipped p4 and p5 to avoid confusion with
-           John Fine's J4 and J5 releases.
-
-       (*) Update the documentation; however, it still doesn't include
-           documentation for the various new instructions. I somehow wonder
-           if it makes sense to have an instruction set reference in the
-           assembler manual when Intel et al have PDF versions of their
-           manuals online.
-
-       (*) Recognize "idt" or "centaur" for the -p option to ndisasm.
-
-       (*) Changed error messages back to stderr where they belong, but add
-           an -E option to redirect them elsewhere (the DOS shell cannot
-           redirect stderr.)
-
-       (*) -M option to generate Makefile dependencies (based on code from
-           Alex Verstak.)
-
-       (*) `%undef' preprocessor directive, and -u option, that undefines a
-           single-line macro.
-
-       (*) OS/2 Makefile (Mkfiles/Makefile.os2) for Borland under OS/2;
-           from Chuck Crayne.
-
-       (*) Various minor bugfixes (reported by): - Dangling `%s' in
-           preproc.c (Martin Junker)
-
-       (*) THERE ARE KNOWN BUGS IN SSE AND THE OTHER KATMAI INSTRUCTIONS. I
-           am on a trip and didn't bring the Katmai instruction reference,
-           so I can't work on them right now.
-
-       (*) Updated the License file per agreement with Simon and Jules to
-           include a GPL distribution clause.
-
-C.2.46 Version 0.98p3.7
-
-       (*) (Hopefully) fixed the canned Makefiles to include the outrdf2
-           and zoutieee modules.
-
-       (*) Renamed changes.asm to changed.asm.
-
-C.2.47 Version 0.98p3.6
-
-       (*) Fixed a bunch of instructions that were added in 0.98p3.5 which
-           had memory operands, and the address-size prefix was missing
-           from the instruction pattern.
-
-C.2.48 Version 0.98p3.5
-
-       (*) Merged in changes from John S. Fine's 0.98-J5 release. John's
-           based 0.98-J5 on my 0.98p3.3 release; this merges the changes.
-
-       (*) Expanded the instructions flag field to a long so we can fit
-           more flags; mark SSE (KNI) and AMD or Katmai-specific
-           instructions as such.
-
-       (*) Fix the "PRIV" flag on a bunch of instructions, and create new
-           "PROT" flag for protected-mode-only instructions (orthogonal to
-           if the instruction is privileged!) and new "SMM" flag for SMM-
-           only instructions.
-
-       (*) Added AMD-only SYSCALL and SYSRET instructions.
-
-       (*) Make SSE actually work, and add new Katmai MMX instructions.
-
-       (*) Added a -p (preferred vendor) option to ndisasm so that it can
-           distinguish e.g. Cyrix opcodes also used in SSE. For example:
-
-            ndisasm -p cyrix aliased.bin 
-            00000000  670F514310        paddsiw mm0,ebx+0x10 
-            00000005  670F514320        paddsiw mm0,ebx+0x20 
-            ndisasm -p intel aliased.bin 
-            00000000  670F514310        sqrtps xmm0,ebx+0x10 
-            00000005  670F514320        sqrtps xmm0,ebx+0x20
-
-       (*) Added a bunch of Cyrix-specific instructions.
-
-C.2.49 Version 0.98p3.4
-
-       (*) Made at least an attempt to modify all the additional Makefiles
-           (in the Mkfiles directory). I can't test it, but this was the
-           best I could do.
-
-       (*) DOS DJGPP+"Opus Make" Makefile from John S. Fine.
-
-       (*) changes.asm changes from John S. Fine.
-
-C.2.50 Version 0.98p3.3
-
-       (*) Patch from Conan Brink to allow nesting of `%rep' directives.
-
-       (*) If we're going to allow INT01 as an alias for INT1/ICEBP (one of
-           Jules 0.98p3 changes), then we should allow INT03 as an alias
-           for INT3 as well.
-
-       (*) Updated changes.asm to include the latest changes.
-
-       (*) Tried to clean up the <CR>s that had snuck in from a DOS/Windows
-           environment into my Unix environment, and try to make sure than
-           DOS/Windows users get them back.
-
-       (*) We would silently generate broken tools if insns.dat wasn't
-           sorted properly. Change insns.pl so that the order doesn't
-           matter.
-
-       (*) Fix bug in insns.pl (introduced by me) which would cause
-           conditional instructions to have an extra "cc" in disassembly,
-           e.g. "jnz" disassembled as "jccnz".
-
-C.2.51 Version 0.98p3.2
-
-       (*) Merged in John S. Fine's changes from his 0.98-J4 prerelease;
-           see http://www.csoft.net/cz/johnfine/
-
-       (*) Changed previous "spotless" Makefile target (appropriate for
-           distribution) to "distclean", and added "cleaner" target which
-           is same as "clean" except deletes files generated by Perl
-           scripts; "spotless" is union.
-
-       (*) Removed BASIC programs from distribution. Get a Perl interpreter
-           instead (see below.)
-
-       (*) Calling this "pre-release 3.2" rather than "p3-hpa2" because of
-           John's contributions.
-
-       (*) Actually link in the IEEE output format (zoutieee.c); fix a
-           bunch of compiler warnings in that file. Note I don't know what
-           IEEE output is supposed to look like, so these changes were made
-           "blind".
-
-C.2.52 Version 0.98p3-hpa
-
-       (*) Merged nasm098p3.zip with nasm-0.97.tar.gz to create a fully
-           buildable version for Unix systems (Makefile.in updates, etc.)
-
-       (*) Changed insns.pl to create the instruction tables in nasm.h and
-           names.c, so that a new instruction can be added by adding it
-           *only* to insns.dat.
-
-       (*) Added the following new instructions: SYSENTER, SYSEXIT, FXSAVE,
-           FXRSTOR, UD1, UD2 (the latter two are two opcodes that Intel
-           guarantee will never be used; one of them is documented as UD2
-           in Intel documentation, the other one just as "Undefined Opcode"
-           -- calling it UD1 seemed to make sense.)
-
-       (*) MAX_SYMBOL was defined to be 9, but LOADALL286 and LOADALL386
-           are 10 characters long. Now MAX_SYMBOL is derived from
-           insns.dat.
-
-       (*) A note on the BASIC programs included: forget them. insns.bas is
-           already out of date. Get yourself a Perl interpreter for your
-           platform of choice at http://www.cpan.org/ports/index.html.
-
-C.2.53 Version 0.98 pre-release 3
-
-       (*) added response file support, improved command line handling, new
-           layout help screen
-
-       (*) fixed limit checking bug, 'OUT byte nn, reg' bug, and a couple
-           of rdoff related bugs, updated Wishlist; 0.98 Prerelease 3.
-
-C.2.54 Version 0.98 pre-release 2
-
-       (*) fixed bug in outcoff.c to do with truncating section names
-           longer than 8 characters, referencing beyond end of string; 0.98
-           pre-release 2
-
-C.2.55 Version 0.98 pre-release 1
-
-       (*) Fixed a bug whereby STRUC didn't work at all in RDF.
-
-       (*) Fixed a problem with group specification in PUBDEFs in OBJ.
-
-       (*) Improved ease of adding new output formats. Contribution due to
-           Fox Cutter.
-
-       (*) Fixed a bug in relocations in the `bin' format: was showing up
-           when a relocatable reference crossed an 8192-byte boundary in
-           any output section.
-
-       (*) Fixed a bug in local labels: local-label lookups were
-           inconsistent between passes one and two if an EQU occurred
-           between the definition of a global label and the subsequent use
-           of a local label local to that global.
-
-       (*) Fixed a seg-fault in the preprocessor (again) which happened
-           when you use a blank line as the first line of a multi-line
-           macro definition and then defined a label on the same line as a
-           call to that macro.
-
-       (*) Fixed a stale-pointer bug in the handling of the NASM
-           environment variable. Thanks to Thomas McWilliams.
-
-       (*) ELF had a hard limit on the number of sections which caused
-           segfaults when transgressed. Fixed.
-
-       (*) Added ability for ndisasm to read from stdin by using `-' as the
-           filename.
-
-       (*) ndisasm wasn't outputting the TO keyword. Fixed.
-
-       (*) Fixed error cascade on bogus expression in `%if' - an error in
-           evaluation was causing the entire `%if' to be discarded, thus
-           creating trouble later when the `%else' or `%endif' was
-           encountered.
-
-       (*) Forward reference tracking was instruction-granular not operand-
-           granular, which was causing 286-specific code to be generated
-           needlessly on code of the form `shr word forwardref,1'. Thanks
-           to Jim Hague for sending a patch.
-
-       (*) All messages now appear on stdout, as sending them to stderr
-           serves no useful purpose other than to make redirection
-           difficult.
-
-       (*) Fixed the problem with EQUs pointing to an external symbol -
-           this now generates an error message.
-
-       (*) Allowed multiple size prefixes to an operand, of which only the
-           first is taken into account.
-
-       (*) Incorporated John Fine's changes, including fixes of a large
-           number of preprocessor bugs, some small problems in OBJ, and a
-           reworking of label handling to define labels before their line
-           is assembled, rather than after.
-
-       (*) Reformatted a lot of the source code to be more readable.
-           Included 'coding.txt' as a guideline for how to format code for
-           contributors.
-
-       (*) Stopped nested `%reps' causing a panic - they now cause a
-           slightly more friendly error message instead.
-
-       (*) Fixed floating point constant problems (patch by Pedro Gimeno)
-
-       (*) Fixed the return value of insn_size() not being checked for -1,
-           indicating an error.
-
-       (*) Incorporated 3Dnow! instructions.
-
-       (*) Fixed the 'mov eax, eax + ebx' bug.
-
-       (*) Fixed the GLOBAL EQU bug in ELF. Released developers release 3.
-
-       (*) Incorporated John Fine's command line parsing changes
-
-       (*) Incorporated David Lindauer's OMF debug support
-
-       (*) Made changes for LCC 4.0 support (`__NASM_CDecl__', removed
-           register size specification warning when sizes agree).
-
-   C.3 NASM 0.9 Series
-
-       Revisions before 0.98.
-
- C.3.1 Version 0.97 released December 1997
-
-       (*) This was entirely a bug-fix release to 0.96, which seems to have
-           got cursed. Silly me.
-
-       (*) Fixed stupid mistake in OBJ which caused `MOV EAX,<constant>' to
-           fail. Caused by an error in the `MOV EAX,<segment>' support.
-
-       (*) ndisasm hung at EOF when compiled with lcc on Linux because lcc
-           on Linux somehow breaks feof(). ndisasm now does not rely on
-           feof().
-
-       (*) A heading in the documentation was missing due to a markup error
-           in the indexing. Fixed.
-
-       (*) Fixed failure to update all pointers on realloc() within
-           extended- operand code in parser.c. Was causing wrong behaviour
-           and seg faults on lines such as `dd 0.0,0.0,0.0,0.0,...'
-
-       (*) Fixed a subtle preprocessor bug whereby invoking one multi-line
-           macro on the first line of the expansion of another, when the
-           second had been invoked with a label defined before it, didn't
-           expand the inner macro.
-
-       (*) Added internal.doc back in to the distribution archives - it was
-           missing in 0.96 *blush*
-
-       (*) Fixed bug causing 0.96 to be unable to assemble its own test
-           files, specifically objtest.asm. *blush again*
-
-       (*) Fixed seg-faults and bogus error messages caused by mismatching
-           `%rep' and `%endrep' within multi-line macro definitions.
-
-       (*) Fixed a problem with buffer overrun in OBJ, which was causing
-           corruption at ends of long PUBDEF records.
-
-       (*) Separated DOS archives into main-program and documentation to
-           reduce download size.
-
- C.3.2 Version 0.96 released November 1997
-
-       (*) Fixed a bug whereby, if `nasm sourcefile' would cause a filename
-           collision warning and put output into `nasm.out', then `nasm
-           sourcefile -o outputfile' still gave the warning even though the
-           `-o' was honoured. Fixed name pollution under Digital UNIX: one
-           of its header files defined R_SP, which broke the enum in
-           nasm.h.
-
-       (*) Fixed minor instruction table problems: FUCOM and FUCOMP didn't
-           have two-operand forms; NDISASM didn't recognise the longer
-           register forms of PUSH and POP (eg FF F3 for PUSH BX); TEST
-           mem,imm32 was flagged as undocumented; the 32-bit forms of CMOV
-           had 16-bit operand size prefixes; `AAD imm' and `AAM imm' are no
-           longer flagged as undocumented because the Intel Architecture
-           reference documents them.
-
-       (*) Fixed a problem with the local-label mechanism, whereby strange
-           types of symbol (EQUs, auto-defined OBJ segment base symbols)
-           interfered with the `previous global label' value and screwed up
-           local labels.
-
-       (*) Fixed a bug whereby the stub preprocessor didn't communicate
-           with the listing file generator, so that the -a and -l options
-           in conjunction would produce a useless listing file.
-
-       (*) Merged `os2' object file format back into `obj', after
-           discovering that `obj' _also_ shouldn't have a link pass
-           separator in a module containing a non-trivial MODEND. Flat
-           segments are now declared using the FLAT attribute. `os2' is no
-           longer a valid object format name: use `obj'.
-
-       (*) Removed the fixed-size temporary storage in the evaluator. Very
-           very long expressions (like `mov ax,1+1+1+1+...' for two hundred
-           1s or so) should now no longer crash NASM.
-
-       (*) Fixed a bug involving segfaults on disassembly of MMX
-           instructions, by changing the meaning of one of the operand-type
-           flags in nasm.h. This may cause other apparently unrelated MMX
-           problems; it needs to be tested thoroughly.
-
-       (*) Fixed some buffer overrun problems with large OBJ output files.
-           Thanks to DJ Delorie for the bug report and fix.
-
-       (*) Made preprocess-only mode actually listen to the `%line' markers
-           as it prints them, so that it can report errors more sanely.
-
-       (*) Re-designed the evaluator to keep more sensible track of
-           expressions involving forward references: can now cope with
-           previously-nightmare situations such as:
-
-         mov ax,foo | bar 
-         foo equ 1 
-         bar equ 2
-
-       (*) Added the ALIGN and ALIGNB standard macros.
-
-       (*) Added PIC support in ELF: use of WRT to obtain the four extra
-           relocation types needed.
-
-       (*) Added the ability for output file formats to define their own
-           extensions to the GLOBAL, COMMON and EXTERN directives.
-
-       (*) Implemented common-variable alignment, and global-symbol type
-           and size declarations, in ELF.
-
-       (*) Implemented NEAR and FAR keywords for common variables, plus
-           far-common element size specification, in OBJ.
-
-       (*) Added a feature whereby EXTERNs and COMMONs in OBJ can be given
-           a default WRT specification (either a segment or a group).
-
-       (*) Transformed the Unix NASM archive into an auto-configuring
-           package.
-
-       (*) Added a sanity-check for people applying SEG to things which are
-           already segment bases: this previously went unnoticed by the SEG
-           processing and caused OBJ-driver panics later.
-
-       (*) Added the ability, in OBJ format, to deal with `MOV
-           EAX,<segment>' type references: OBJ doesn't directly support
-           dword-size segment base fixups, but as long as the low two bytes
-           of the constant term are zero, a word-size fixup can be
-           generated instead and it will work.
-
-       (*) Added the ability to specify sections' alignment requirements in
-           Win32 object files and pure binary files.
-
-       (*) Added preprocess-time expression evaluation: the `%assign' (and
-           `%iassign') directive and the bare `%if' (and `%elif')
-           conditional. Added relational operators to the evaluator, for
-           use only in `%if' constructs: the standard relationals = < > <=
-           >= <> (and C-like synonyms == and !=) plus low-precedence
-           logical operators &&, ^^ and ||.
-
-       (*) Added a preprocessor repeat construct: `%rep' / `%exitrep' /
-           `%endrep'.
-
-       (*) Added the __FILE__ and __LINE__ standard macros.
-
-       (*) Added a sanity check for number constants being greater than
-           0xFFFFFFFF. The warning can be disabled.
-
-       (*) Added the %0 token whereby a variadic multi-line macro can tell
-           how many parameters it's been given in a specific invocation.
-
-       (*) Added `%rotate', allowing multi-line macro parameters to be
-           cycled.
-
-       (*) Added the `*' option for the maximum parameter count on multi-
-           line macros, allowing them to take arbitrarily many parameters.
-
-       (*) Added the ability for the user-level forms of EXTERN, GLOBAL and
-           COMMON to take more than one argument.
-
-       (*) Added the IMPORT and EXPORT directives in OBJ format, to deal
-           with Windows DLLs.
-
-       (*) Added some more preprocessor `%if' constructs: `%ifidn' /
-           `%ifidni' (exact textual identity), and `%ifid' / `%ifnum' /
-           `%ifstr' (token type testing).
-
-       (*) Added the ability to distinguish SHL AX,1 (the 8086 version)
-           from SHL AX,BYTE 1 (the 286-and-upwards version whose constant
-           happens to be 1).
-
-       (*) Added NetBSD/FreeBSD/OpenBSD's variant of a.out format, complete
-           with PIC shared library features.
-
-       (*) Changed NASM's idiosyncratic handling of FCLEX, FDISI, FENI,
-           FINIT, FSAVE, FSTCW, FSTENV, and FSTSW to bring it into line
-           with the otherwise accepted standard. The previous behaviour,
-           though it was a deliberate feature, was a deliberate feature
-           based on a misunderstanding. Apologies for the inconvenience.
-
-       (*) Improved the flexibility of ABSOLUTE: you can now give it an
-           expression rather than being restricted to a constant, and it
-           can take relocatable arguments as well.
-
-       (*) Added the ability for a variable to be declared as EXTERN
-           multiple times, and the subsequent definitions are just ignored.
-
-       (*) We now allow instruction prefixes (CS, DS, LOCK, REPZ etc) to be
-           alone on a line (without a following instruction).
-
-       (*) Improved sanity checks on whether the arguments to EXTERN,
-           GLOBAL and COMMON are valid identifiers.
-
-       (*) Added misc/exebin.mac to allow direct generation of .EXE files
-           by hacking up an EXE header using DB and DW; also added
-           test/binexe.asm to demonstrate the use of this. Thanks to Yann
-           Guidon for contributing the EXE header code.
-
-       (*) ndisasm forgot to check whether the input file had been
-           successfully opened. Now it does. Doh!
-
-       (*) Added the Cyrix extensions to the MMX instruction set.
-
-       (*) Added a hinting mechanism to allow EAX+EBX and EBX+EAX to be
-           assembled differently. This is important since ESI+EBP and
-           EBP+ESI have different default base segment registers.
-
-       (*) Added support for the PharLap OMF extension for 4096-byte
-           segment alignment.
-
- C.3.3 Version 0.95 released July 1997
-
-       (*) Fixed yet another ELF bug. This one manifested if the user
-           relied on the default segment, and attempted to define global
-           symbols without first explicitly declaring the target segment.
-
-       (*) Added makefiles (for NASM and the RDF tools) to build Win32
-           console apps under Symantec C++. Donated by Mark Junker.
-
-       (*) Added `macros.bas' and `insns.bas', QBasic versions of the Perl
-           scripts that convert `standard.mac' to `macros.c' and convert
-           `insns.dat' to `insnsa.c' and `insnsd.c'. Also thanks to Mark
-           Junker.
-
-       (*) Changed the diassembled forms of the conditional instructions so
-           that JB is now emitted as JC, and other similar changes.
-           Suggested list by Ulrich Doewich.
-
-       (*) Added `@' to the list of valid characters to begin an identifier
-           with.
-
-       (*) Documentary changes, notably the addition of the `Common
-           Problems' section in nasm.doc.
-
-       (*) Fixed a bug relating to 32-bit PC-relative fixups in OBJ.
-
-       (*) Fixed a bug in perm_copy() in labels.c which was causing
-           exceptions in cleanup_labels() on some systems.
-
-       (*) Positivity sanity check in TIMES argument changed from a warning
-           to an error following a further complaint.
-
-       (*) Changed the acceptable limits on byte and word operands to allow
-           things like `~10111001b' to work.
-
-       (*) Fixed a major problem in the preprocessor which caused seg-
-           faults if macro definitions contained blank lines or comment-
-           only lines.
-
-       (*) Fixed inadequate error checking on the commas separating the
-           arguments to `db', `dw' etc.
-
-       (*) Fixed a crippling bug in the handling of macros with operand
-           counts defined with a `+' modifier.
-
-       (*) Fixed a bug whereby object file formats which stored the input
-           file name in the output file (such as OBJ and COFF) weren't
-           doing so correctly when the output file name was specified on
-           the command line.
-
-       (*) Removed INC and INCLUDE support for good, since they were
-           obsolete anyway.
-
-       (*) Fixed a bug in OBJ which caused all fixups to be output in 16-
-           bit (old-format) FIXUPP records, rather than putting the 32-bit
-           ones in FIXUPP32 (new-format) records.
-
-       (*) Added, tentatively, OS/2 object file support (as a minor variant
-           on OBJ).
-
-       (*) Updates to Fox Cutter's Borland C makefile, Makefile.bc2.
-
-       (*) Removed a spurious second fclose() on the output file.
-
-       (*) Added the `-s' command line option to redirect all messages
-           which would go to stderr (errors, help text) to stdout instead.
-
-       (*) Added the `-w' command line option to selectively suppress some
-           classes of assembly warning messages.
-
-       (*) Added the `-p' pre-include and `-d' pre-define command-line
-           options.
-
-       (*) Added an include file search path: the `-i' command line option.
-
-       (*) Fixed a silly little preprocessor bug whereby starting a line
-           with a `%!' environment-variable reference caused an `unknown
-           directive' error.
-
-       (*) Added the long-awaited listing file support: the `-l' command
-           line option.
-
-       (*) Fixed a problem with OBJ format whereby, in the absence of any
-           explicit segment definition, non-global symbols declared in the
-           implicit default segment generated spurious EXTDEF records in
-           the output.
-
-       (*) Added the NASM environment variable.
-
-       (*) From this version forward, Win32 console-mode binaries will be
-           included in the DOS distribution in addition to the 16-bit
-           binaries. Added Makefile.vc for this purpose.
-
-       (*) Added `return 0;' to test/objlink.c to prevent compiler
-           warnings.
-
-       (*) Added the __NASM_MAJOR__ and __NASM_MINOR__ standard defines.
-
-       (*) Added an alternative memory-reference syntax in which prefixing
-           an operand with `&' is equivalent to enclosing it in square
-           brackets, at the request of Fox Cutter.
-
-       (*) Errors in pass two now cause the program to return a non-zero
-           error code, which they didn't before.
-
-       (*) Fixed the single-line macro cycle detection, which didn't work
-           at all on macros with no parameters (caused an infinite loop).
-           Also changed the behaviour of single-line macro cycle detection
-           to work like cpp, so that macros like `extrn' as given in the
-           documentation can be implemented.
-
-       (*) Fixed the implementation of WRT, which was too restrictive in
-           that you couldn't do `mov ax,di+abc wrt dgroup' because
-           (di+abc) wasn't a relocatable reference.
-
- C.3.4 Version 0.94 released April 1997
-
-       (*) Major item: added the macro processor.
-
-       (*) Added undocumented instructions SMI, IBTS, XBTS and LOADALL286.
-           Also reorganised CMPXCHG instruction into early-486 and Pentium
-           forms. Thanks to Thobias Jones for the information.
-
-       (*) Fixed two more stupid bugs in ELF, which were causing `ld' to
-           continue to seg-fault in a lot of non-trivial cases.
-
-       (*) Fixed a seg-fault in the label manager.
-
-       (*) Stopped FBLD and FBSTP from _requiring_ the TWORD keyword, which
-           is the only option for BCD loads/stores in any case.
-
-       (*) Ensured FLDCW, FSTCW and FSTSW can cope with the WORD keyword,
-           if anyone bothers to provide it. Previously they complained
-           unless no keyword at all was present.
-
-       (*) Some forms of FDIV/FDIVR and FSUB/FSUBR were still inverted: a
-           vestige of a bug that I thought had been fixed in 0.92. This was
-           fixed, hopefully for good this time...
-
-       (*) Another minor phase error (insofar as a phase error can _ever_
-           be minor) fixed, this one occurring in code of the form
-
-         rol ax,forward_reference 
-         forward_reference equ 1
-
-       (*) The number supplied to TIMES is now sanity-checked for
-           positivity, and also may be greater than 64K (which previously
-           didn't work on 16-bit systems).
-
-       (*) Added Watcom C makefiles, and misc/pmw.bat, donated by Dominik
-           Behr.
-
-       (*) Added the INCBIN pseudo-opcode.
-
-       (*) Due to the advent of the preprocessor, the INCLUDE and INC
-           directives have become obsolete. They are still supported in
-           this version, with a warning, but won't be in the next.
-
-       (*) Fixed a bug in OBJ format, which caused incorrect object records
-           to be output when absolute labels were made global.
-
-       (*) Updates to RDOFF subdirectory, and changes to outrdf.c.
-
- C.3.5 Version 0.93 released January 1997
-
-       This release went out in a great hurry after semi-crippling bugs
-       were found in 0.92.
-
-       (*) Really _did_ fix the stack overflows this time. *blush*
-
-       (*) Had problems with EA instruction sizes changing between passes,
-           when an offset contained a forward reference and so 4 bytes were
-           allocated for the offset in pass one; by pass two the symbol had
-           been defined and happened to be a small absolute value, so only
-           1 byte got allocated, causing instruction size mismatch between
-           passes and hence incorrect address calculations. Fixed.
-
-       (*) Stupid bug in the revised ELF section generation fixed
-           (associated string-table section for .symtab was hard-coded as
-           7, even when this didn't fit with the real section table). Was
-           causing `ld' to seg-fault under Linux.
-
-       (*) Included a new Borland C makefile, Makefile.bc2, donated by Fox
-           Cutter <lmb@comtch.iea.com>.
-
- C.3.6 Version 0.92 released January 1997
-
-       (*) The FDIVP/FDIVRP and FSUBP/FSUBRP pairs had been inverted: this
-           was fixed. This also affected the LCC driver.
-
-       (*) Fixed a bug regarding 32-bit effective addresses of the form
-           `other_register+ESP'.
-
-       (*) Documentary changes, notably documentation of the fact that
-           Borland Win32 compilers use `obj' rather than `win32' object
-           format.
-
-       (*) Fixed the COMENT record in OBJ files, which was formatted
-           incorrectly.
-
-       (*) Fixed a bug causing segfaults in large RDF files.
-
-       (*) OBJ format now strips initial periods from segment and group
-           definitions, in order to avoid complications with the local
-           label syntax.
-
-       (*) Fixed a bug in disassembling far calls and jumps in NDISASM.
-
-       (*) Added support for user-defined sections in COFF and ELF files.
-
-       (*) Compiled the DOS binaries with a sensible amount of stack, to
-           prevent stack overflows on any arithmetic expression containing
-           parentheses.
-
-       (*) Fixed a bug in handling of files that do not terminate in a
-           newline.
-
- C.3.7 Version 0.91 released November 1996
-
-       (*) Loads of bug fixes.
-
-       (*) Support for RDF added.
-
-       (*) Support for DBG debugging format added.
-
-       (*) Support for 32-bit extensions to Microsoft OBJ format added.
-
-       (*) Revised for Borland C: some variable names changed, makefile
-           added.
-
-       (*) LCC support revised to actually work.
-
-       (*) JMP/CALL NEAR/FAR notation added.
-
-       (*) `a16', `o16', `a32' and `o32' prefixes added.
-
-       (*) Range checking on short jumps implemented.
-
-       (*) MMX instruction support added.
-
-       (*) Negative floating point constant support added.
-
-       (*) Memory handling improved to bypass 64K barrier under DOS.
-
-       (*) `$' prefix to force treatment of reserved words as identifiers
-           added.
-
-       (*) Default-size mechanism for object formats added.
-
-       (*) Compile-time configurability added.
-
-       (*) `#', `@', `~' and c{?} are now valid characters in labels.
-
-       (*) `-e' and `-k' options in NDISASM added.
-
- C.3.8 Version 0.90 released October 1996
-
-       First release version. First support for object file output. Other
-       changes from previous version (0.3x) too numerous to document.
-
-Appendix D: Building NASM from Source
--------------------------------------
-
-       The source code for NASM is available from our website,
-       http://wwww.nasm.us/, see section E.1.
-
-   D.1 Building from a Source Archive
-
-       The source archives available on the web site should be capable of
-       building on a number of platforms. This is the recommended method
-       for building NASM to support platforms for which executables are not
-       available.
-
-       On a system which has Unix shell (`sh'), run:
-
-            sh configure 
-            make everything
-
-       A number of options can be passed to `configure'; see
-       `sh configure --help'.
-
-       A set of Makefiles for some other environments are also available;
-       please see the file `Mkfiles/README'.
-
-       To build the installer for the Windows platform, you will need the
-       _Nullsoft Scriptable Installer_, NSIS, installed.
-
-       To build the documentation, you will need a set of additional tools.
-       The documentation is not likely to be able to build on non-Unix
-       systems.
-
-   D.2 Building from the `git' Repository
-
-       The NASM development tree is kept in a source code repository using
-       the `git' distributed source control system. The link is available
-       on the website. This is recommended only to participate in the
-       development of NASM or to assist with testing the development code.
-
-       To build NASM from the `git' repository you will need a Perl
-       interpreter and, if building on a Unix system, GNU autoconf
-       installed on your system.
-
-       To build on a Unix system, run:
-
-            sh autogen.sh
-
-       to create the `configure' script and then build as listed above.
-
-   D.3 Building the documentation
-
-       To build the documentation, you will need a Perl interpreter, a
-       Postscript to PDF converter such as Ghostscript, and suitable fonts
-       installed on your system. The recommended (and default) fonts are
-       Adobe's Source Sans and Source Code fonts, which are freely
-       available under the SIL Open Font License.
-
-Appendix E: Contact Information
--------------------------------
-
-   E.1 Website
-
-       NASM has a website at `http://www.nasm.us/'.
-
-       New releases, release candidates, and daily development snapshots of
-       NASM are available from the official web site in source form as well
-       as binaries for a number of common platforms.
-
- E.1.1 User Forums
-
-       Users of NASM may find the Forums on the website useful. These are,
-       however, not frequented much by the developers of NASM, so they are
-       not suitable for reporting bugs.
-
- E.1.2 Development Community
-
-       The development of NASM is coordinated primarily though the
-       `nasm-devel' mailing list. If you wish to participate in development
-       of NASM, please join this mailing list. Subscription links and
-       archives of past posts are available on the website.
-
-   E.2 Reporting Bugs
-
-       To report bugs in NASM, please use the bug tracker at
-       `http://www.nasm.us/' (click on "Bug Tracker"), or if that fails
-       then through one of the contacts in section E.1.
-
-       Please read section 2.2 first, and don't report the bug if it's
-       listed in there as a deliberate feature. (If you think the feature
-       is badly thought out, feel free to send us reasons why you think it
-       should be changed, but don't just send us mail saying `This is a
-       bug' if the documentation says we did it on purpose.) Then read
-       section 13.1, and don't bother reporting the bug if it's listed
-       there.
-
-       If you do report a bug, _please_ make sure your bug report includes
-       the following information:
-
-       (*) What operating system you're running NASM under. Linux, FreeBSD,
-           NetBSD, MacOS X, Win16, Win32, Win64, MS-DOS, OS/2, VMS,
-           whatever.
-
-       (*) If you compiled your own executable from a source archive,
-           compiled your own executable from `git', used the standard
-           distribution binaries from the website, or got an executable
-           from somewhere else (e.g. a Linux distribution.) If you were
-           using a locally built executable, try to reproduce the problem
-           using one of the standard binaries, as this will make it easier
-           for us to reproduce your problem prior to fixing it.
-
-       (*) Which version of NASM you're using, and exactly how you invoked
-           it. Give us the precise command line, and the contents of the
-           `NASMENV' environment variable if any.
-
-       (*) Which versions of any supplementary programs you're using, and
-           how you invoked them. If the problem only becomes visible at
-           link time, tell us what linker you're using, what version of it
-           you've got, and the exact linker command line. If the problem
-           involves linking against object files generated by a compiler,
-           tell us what compiler, what version, and what command line or
-           options you used. (If you're compiling in an IDE, please try to
-           reproduce the problem with the command-line version of the
-           compiler.)
-
-       (*) If at all possible, send us a NASM source file which exhibits
-           the problem. If this causes copyright problems (e.g. you can
-           only reproduce the bug in restricted-distribution code) then
-           bear in mind the following two points: firstly, we guarantee
-           that any source code sent to us for the purposes of debugging
-           NASM will be used _only_ for the purposes of debugging NASM, and
-           that we will delete all our copies of it as soon as we have
-           found and fixed the bug or bugs in question; and secondly, we
-           would prefer _not_ to be mailed large chunks of code anyway. The
-           smaller the file, the better. A three-line sample file that does
-           nothing useful _except_ demonstrate the problem is much easier
-           to work with than a fully fledged ten-thousand-line program. (Of
-           course, some errors _do_ only crop up in large files, so this
-           may not be possible.)
-
-       (*) A description of what the problem actually _is_. `It doesn't
-           work' is _not_ a helpful description! Please describe exactly
-           what is happening that shouldn't be, or what isn't happening
-           that should. Examples might be: `NASM generates an error message
-           saying Line 3 for an error that's actually on Line 5'; `NASM
-           generates an error message that I believe it shouldn't be
-           generating at all'; `NASM fails to generate an error message
-           that I believe it _should_ be generating'; `the object file
-           produced from this source code crashes my linker'; `the ninth
-           byte of the output file is 66 and I think it should be 77
-           instead'.
-
-       (*) If you believe the output file from NASM to be faulty, send it
-           to us. That allows us to determine whether our own copy of NASM
-           generates the same file, or whether the problem is related to
-           portability issues between our development platforms and yours.
-           We can handle binary files mailed to us as MIME attachments,
-           uuencoded, and even BinHex. Alternatively, we may be able to
-           provide an FTP site you can upload the suspect files to; but
-           mailing them is easier for us.
-
-       (*) Any other information or data files that might be helpful. If,
-           for example, the problem involves NASM failing to generate an
-           object file while TASM can generate an equivalent file without
-           trouble, then send us _both_ object files, so we can see what
-           TASM is doing differently from us.
-
-Appendix F: Instruction List
-----------------------------
-
-   F.1 Introduction
-
-       The following sections show the instructions which NASM currently
-       supports. For each instruction, there is a separate entry for each
-       supported addressing mode. The third column shows the processor type
-       in which the instruction was introduced and, when appropriate, one
-       or more usage flags.
-
- F.1.1 Special instructions (pseudo-ops)
-
-       DB                                         
-       DW                                         
-       DD                                         
-       DQ                                         
-       DT                                         
-       DO                                         
-       DY                                         
-       DZ                                         
-       RESB             imm                      8086 
-       RESW             imm                      8086 
-       RESD             imm                      8086 
-       RESQ             imm                      8086 
-       REST             imm                      8086 
-       RESO             imm                      8086 
-       RESY             imm                      8086 
-       RESZ             imm                      8086 
-       INCBIN                                    
-
- F.1.2 Conventional instructions
-
-       AAA                                       8086,NOLONG 
-       AAD                                       8086,NOLONG 
-       AAD              imm                      8086,NOLONG 
-       AAM                                       8086,NOLONG 
-       AAM              imm                      8086,NOLONG 
-       AAS                                       8086,NOLONG 
-       ADC              mem,reg8                 8086,LOCK 
-       ADC              reg8,reg8                8086 
-       ADC              mem,reg16                8086,LOCK 
-       ADC              reg16,reg16              8086 
-       ADC              mem,reg32                386,LOCK 
-       ADC              reg32,reg32              386 
-       ADC              mem,reg64                X86_64,LONG,LOCK 
-       ADC              reg64,reg64              X86_64,LONG 
-       ADC              reg8,mem                 8086 
-       ADC              reg8,reg8                8086 
-       ADC              reg16,mem                8086 
-       ADC              reg16,reg16              8086 
-       ADC              reg32,mem                386 
-       ADC              reg32,reg32              386 
-       ADC              reg64,mem                X86_64,LONG 
-       ADC              reg64,reg64              X86_64,LONG 
-       ADC              rm16,imm8                8086,LOCK 
-       ADC              rm32,imm8                386,LOCK 
-       ADC              rm64,imm8                X86_64,LONG,LOCK 
-       ADC              reg_al,imm               8086 
-       ADC              reg_ax,sbyteword         8086,ND 
-       ADC              reg_ax,imm               8086 
-       ADC              reg_eax,sbytedword       386,ND 
-       ADC              reg_eax,imm              386 
-       ADC              reg_rax,sbytedword       X86_64,LONG,ND 
-       ADC              reg_rax,imm              X86_64,LONG 
-       ADC              rm8,imm                  8086,LOCK 
-       ADC              rm16,sbyteword           8086,LOCK,ND 
-       ADC              rm16,imm                 8086,LOCK 
-       ADC              rm32,sbytedword          386,LOCK,ND 
-       ADC              rm32,imm                 386,LOCK 
-       ADC              rm64,sbytedword          X86_64,LONG,LOCK,ND 
-       ADC              rm64,imm                 X86_64,LONG,LOCK 
-       ADC              mem,imm8                 8086,LOCK,ND 
-       ADC              mem,sbyteword16          8086,LOCK,ND 
-       ADC              mem,imm16                8086,LOCK 
-       ADC              mem,sbytedword32         386,LOCK,ND 
-       ADC              mem,imm32                386,LOCK 
-       ADC              rm8,imm                  8086,LOCK,ND,NOLONG 
-       ADD              mem,reg8                 8086,LOCK 
-       ADD              reg8,reg8                8086 
-       ADD              mem,reg16                8086,LOCK 
-       ADD              reg16,reg16              8086 
-       ADD              mem,reg32                386,LOCK 
-       ADD              reg32,reg32              386 
-       ADD              mem,reg64                X86_64,LONG,LOCK 
-       ADD              reg64,reg64              X86_64,LONG 
-       ADD              reg8,mem                 8086 
-       ADD              reg8,reg8                8086 
-       ADD              reg16,mem                8086 
-       ADD              reg16,reg16              8086 
-       ADD              reg32,mem                386 
-       ADD              reg32,reg32              386 
-       ADD              reg64,mem                X86_64,LONG 
-       ADD              reg64,reg64              X86_64,LONG 
-       ADD              rm16,imm8                8086,LOCK 
-       ADD              rm32,imm8                386,LOCK 
-       ADD              rm64,imm8                X86_64,LONG,LOCK 
-       ADD              reg_al,imm               8086 
-       ADD              reg_ax,sbyteword         8086,ND 
-       ADD              reg_ax,imm               8086 
-       ADD              reg_eax,sbytedword       386,ND 
-       ADD              reg_eax,imm              386 
-       ADD              reg_rax,sbytedword       X86_64,LONG,ND 
-       ADD              reg_rax,imm              X86_64,LONG 
-       ADD              rm8,imm                  8086,LOCK 
-       ADD              rm16,sbyteword           8086,LOCK,ND 
-       ADD              rm16,imm                 8086,LOCK 
-       ADD              rm32,sbytedword          386,LOCK,ND 
-       ADD              rm32,imm                 386,LOCK 
-       ADD              rm64,sbytedword          X86_64,LONG,LOCK,ND 
-       ADD              rm64,imm                 X86_64,LONG,LOCK 
-       ADD              mem,imm8                 8086,LOCK 
-       ADD              mem,sbyteword16          8086,LOCK,ND 
-       ADD              mem,imm16                8086,LOCK 
-       ADD              mem,sbytedword32         386,LOCK,ND 
-       ADD              mem,imm32                386,LOCK 
-       ADD              rm8,imm                  8086,LOCK,ND,NOLONG 
-       AND              mem,reg8                 8086,LOCK 
-       AND              reg8,reg8                8086 
-       AND              mem,reg16                8086,LOCK 
-       AND              reg16,reg16              8086 
-       AND              mem,reg32                386,LOCK 
-       AND              reg32,reg32              386 
-       AND              mem,reg64                X86_64,LONG,LOCK 
-       AND              reg64,reg64              X86_64,LONG 
-       AND              reg8,mem                 8086 
-       AND              reg8,reg8                8086 
-       AND              reg16,mem                8086 
-       AND              reg16,reg16              8086 
-       AND              reg32,mem                386 
-       AND              reg32,reg32              386 
-       AND              reg64,mem                X86_64,LONG 
-       AND              reg64,reg64              X86_64,LONG 
-       AND              rm16,imm8                8086,LOCK 
-       AND              rm32,imm8                386,LOCK 
-       AND              rm64,imm8                X86_64,LONG,LOCK 
-       AND              reg_al,imm               8086 
-       AND              reg_ax,sbyteword         8086,ND 
-       AND              reg_ax,imm               8086 
-       AND              reg_eax,sbytedword       386,ND 
-       AND              reg_eax,imm              386 
-       AND              reg_rax,sbytedword       X86_64,LONG,ND 
-       AND              reg_rax,imm              X86_64,LONG 
-       AND              rm8,imm                  8086,LOCK 
-       AND              rm16,sbyteword           8086,LOCK,ND 
-       AND              rm16,imm                 8086,LOCK 
-       AND              rm32,sbytedword          386,LOCK,ND 
-       AND              rm32,imm                 386,LOCK 
-       AND              rm64,sbytedword          X86_64,LONG,LOCK,ND 
-       AND              rm64,imm                 X86_64,LONG,LOCK 
-       AND              mem,imm8                 8086,LOCK 
-       AND              mem,sbyteword16          8086,LOCK,ND 
-       AND              mem,imm16                8086,LOCK 
-       AND              mem,sbytedword32         386,LOCK,ND 
-       AND              mem,imm32                386,LOCK 
-       AND              rm8,imm                  8086,LOCK,ND,NOLONG 
-       ARPL             mem,reg16                286,PROT,NOLONG 
-       ARPL             reg16,reg16              286,PROT,NOLONG 
-       BB0_RESET                                 PENT,CYRIX,ND,OBSOLETE 
-       BB1_RESET                                 PENT,CYRIX,ND,OBSOLETE 
-       BOUND            reg16,mem                186,NOLONG 
-       BOUND            reg32,mem                386,NOLONG 
-       BSF              reg16,mem                386 
-       BSF              reg16,reg16              386 
-       BSF              reg32,mem                386 
-       BSF              reg32,reg32              386 
-       BSF              reg64,mem                X86_64,LONG 
-       BSF              reg64,reg64              X86_64,LONG 
-       BSR              reg16,mem                386 
-       BSR              reg16,reg16              386 
-       BSR              reg32,mem                386 
-       BSR              reg32,reg32              386 
-       BSR              reg64,mem                X86_64,LONG 
-       BSR              reg64,reg64              X86_64,LONG 
-       BSWAP            reg32                    486 
-       BSWAP            reg64                    X86_64,LONG 
-       BT               mem,reg16                386 
-       BT               reg16,reg16              386 
-       BT               mem,reg32                386 
-       BT               reg32,reg32              386 
-       BT               mem,reg64                X86_64,LONG 
-       BT               reg64,reg64              X86_64,LONG 
-       BT               rm16,imm8                386 
-       BT               rm32,imm8                386 
-       BT               rm64,imm8                X86_64,LONG 
-       BTC              mem,reg16                386,LOCK 
-       BTC              reg16,reg16              386 
-       BTC              mem,reg32                386,LOCK 
-       BTC              reg32,reg32              386 
-       BTC              mem,reg64                X86_64,LONG,LOCK 
-       BTC              reg64,reg64              X86_64,LONG 
-       BTC              rm16,imm8                386,LOCK 
-       BTC              rm32,imm8                386,LOCK 
-       BTC              rm64,imm8                X86_64,LONG,LOCK 
-       BTR              mem,reg16                386,LOCK 
-       BTR              reg16,reg16              386 
-       BTR              mem,reg32                386,LOCK 
-       BTR              reg32,reg32              386 
-       BTR              mem,reg64                X86_64,LONG,LOCK 
-       BTR              reg64,reg64              X86_64,LONG 
-       BTR              rm16,imm8                386,LOCK 
-       BTR              rm32,imm8                386,LOCK 
-       BTR              rm64,imm8                X86_64,LONG,LOCK 
-       BTS              mem,reg16                386,LOCK 
-       BTS              reg16,reg16              386 
-       BTS              mem,reg32                386,LOCK 
-       BTS              reg32,reg32              386 
-       BTS              mem,reg64                X86_64,LONG,LOCK 
-       BTS              reg64,reg64              X86_64,LONG 
-       BTS              rm16,imm8                386,LOCK 
-       BTS              rm32,imm8                386,LOCK 
-       BTS              rm64,imm8                X86_64,LONG,LOCK 
-       CALL             imm                      8086,BND 
-       CALL             imm|near                 8086,ND,BND 
-       CALL             imm|far                  8086,ND,NOLONG 
-       CALL             imm16                    8086,NOLONG,BND 
-       CALL             imm16|near               8086,ND,NOLONG,BND 
-       CALL             imm16|far                8086,ND,NOLONG 
-       CALL             imm32                    386,NOLONG,BND 
-       CALL             imm32|near               386,ND,NOLONG,BND 
-       CALL             imm32|far                386,ND,NOLONG 
-       CALL             imm64                    X86_64,LONG,BND 
-       CALL             imm64|near               X86_64,LONG,ND,BND 
-       CALL             imm:imm                  8086,NOLONG 
-       CALL             imm16:imm                8086,NOLONG 
-       CALL             imm:imm16                8086,NOLONG 
-       CALL             imm32:imm                386,NOLONG 
-       CALL             imm:imm32                386,NOLONG 
-       CALL             mem|far                  8086,NOLONG 
-       CALL             mem|far                  X86_64,LONG 
-       CALL             mem16|far                8086 
-       CALL             mem32|far                386 
-       CALL             mem64|far                X86_64,LONG 
-       CALL             mem|near                 8086,ND,BND 
-       CALL             rm16|near                8086,NOLONG,ND,BND 
-       CALL             rm32|near                386,NOLONG,ND,BND 
-       CALL             rm64|near                X86_64,LONG,ND,BND 
-       CALL             mem                      8086,BND 
-       CALL             rm16                     8086,NOLONG,BND 
-       CALL             rm32                     386,NOLONG,BND 
-       CALL             rm64                     X86_64,LONG,BND 
-       CBW                                       8086 
-       CDQ                                       386 
-       CDQE                                      X86_64,LONG 
-       CLC                                       8086 
-       CLD                                       8086 
-       CLI                                       8086 
-       CLTS                                      286,PRIV 
-       CMC                                       8086 
-       CMP              mem,reg8                 8086 
-       CMP              reg8,reg8                8086 
-       CMP              mem,reg16                8086 
-       CMP              reg16,reg16              8086 
-       CMP              mem,reg32                386 
-       CMP              reg32,reg32              386 
-       CMP              mem,reg64                X86_64,LONG 
-       CMP              reg64,reg64              X86_64,LONG 
-       CMP              reg8,mem                 8086 
-       CMP              reg8,reg8                8086 
-       CMP              reg16,mem                8086 
-       CMP              reg16,reg16              8086 
-       CMP              reg32,mem                386 
-       CMP              reg32,reg32              386 
-       CMP              reg64,mem                X86_64,LONG 
-       CMP              reg64,reg64              X86_64,LONG 
-       CMP              rm16,imm8                8086 
-       CMP              rm32,imm8                386 
-       CMP              rm64,imm8                X86_64,LONG 
-       CMP              reg_al,imm               8086 
-       CMP              reg_ax,sbyteword         8086,ND 
-       CMP              reg_ax,imm               8086 
-       CMP              reg_eax,sbytedword       386,ND 
-       CMP              reg_eax,imm              386 
-       CMP              reg_rax,sbytedword       X86_64,LONG,ND 
-       CMP              reg_rax,imm              X86_64,LONG 
-       CMP              rm8,imm                  8086 
-       CMP              rm16,sbyteword           8086,ND 
-       CMP              rm16,imm                 8086 
-       CMP              rm32,sbytedword          386,ND 
-       CMP              rm32,imm                 386 
-       CMP              rm64,sbytedword          X86_64,LONG,ND 
-       CMP              rm64,imm                 X86_64,LONG 
-       CMP              mem,imm8                 8086 
-       CMP              mem,sbyteword16          8086,ND 
-       CMP              mem,imm16                8086 
-       CMP              mem,sbytedword32         386,ND 
-       CMP              mem,imm32                386 
-       CMP              rm8,imm                  8086,ND,NOLONG 
-       CMPSB                                     8086 
-       CMPSD                                     386 
-       CMPSQ                                     X86_64,LONG 
-       CMPSW                                     8086 
-       CMPXCHG          mem,reg8                 PENT,LOCK 
-       CMPXCHG          reg8,reg8                PENT 
-       CMPXCHG          mem,reg16                PENT,LOCK 
-       CMPXCHG          reg16,reg16              PENT 
-       CMPXCHG          mem,reg32                PENT,LOCK 
-       CMPXCHG          reg32,reg32              PENT 
-       CMPXCHG          mem,reg64                X86_64,LONG,LOCK 
-       CMPXCHG          reg64,reg64              X86_64,LONG 
-       CMPXCHG486       mem,reg8                 486,UNDOC,ND,LOCK,OBSOLETE 
-       CMPXCHG486       reg8,reg8                486,UNDOC,ND,OBSOLETE 
-       CMPXCHG486       mem,reg16                486,UNDOC,ND,LOCK,OBSOLETE 
-       CMPXCHG486       reg16,reg16              486,UNDOC,ND,OBSOLETE 
-       CMPXCHG486       mem,reg32                486,UNDOC,ND,LOCK,OBSOLETE 
-       CMPXCHG486       reg32,reg32              486,UNDOC,ND,OBSOLETE 
-       CMPXCHG8B        mem64                    PENT,LOCK 
-       CMPXCHG16B       mem128                   X86_64,LONG,LOCK 
-       CPUID                                     PENT 
-       CPU_READ                                  PENT,CYRIX 
-       CPU_WRITE                                 PENT,CYRIX 
-       CQO                                       X86_64,LONG 
-       CWD                                       8086 
-       CWDE                                      386 
-       DAA                                       8086,NOLONG 
-       DAS                                       8086,NOLONG 
-       DEC              reg16                    8086,NOLONG 
-       DEC              reg32                    386,NOLONG 
-       DEC              rm8                      8086,LOCK 
-       DEC              rm16                     8086,LOCK 
-       DEC              rm32                     386,LOCK 
-       DEC              rm64                     X86_64,LONG,LOCK 
-       DIV              rm8                      8086 
-       DIV              rm16                     8086 
-       DIV              rm32                     386 
-       DIV              rm64                     X86_64,LONG 
-       DMINT                                     P6,CYRIX 
-       EMMS                                      PENT,MMX 
-       ENTER            imm,imm                  186 
-       EQU              imm                      8086 
-       EQU              imm:imm                  8086 
-       F2XM1                                     8086,FPU 
-       FABS                                      8086,FPU 
-       FADD             mem32                    8086,FPU 
-       FADD             mem64                    8086,FPU 
-       FADD             fpureg|to                8086,FPU 
-       FADD             fpureg                   8086,FPU 
-       FADD             fpureg,fpu0              8086,FPU 
-       FADD             fpu0,fpureg              8086,FPU 
-       FADD                                      8086,FPU,ND 
-       FADDP            fpureg                   8086,FPU 
-       FADDP            fpureg,fpu0              8086,FPU 
-       FADDP                                     8086,FPU,ND 
-       FBLD             mem80                    8086,FPU 
-       FBLD             mem                      8086,FPU 
-       FBSTP            mem80                    8086,FPU 
-       FBSTP            mem                      8086,FPU 
-       FCHS                                      8086,FPU 
-       FCLEX                                     8086,FPU 
-       FCMOVB           fpureg                   P6,FPU 
-       FCMOVB           fpu0,fpureg              P6,FPU 
-       FCMOVB                                    P6,FPU,ND 
-       FCMOVBE          fpureg                   P6,FPU 
-       FCMOVBE          fpu0,fpureg              P6,FPU 
-       FCMOVBE                                   P6,FPU,ND 
-       FCMOVE           fpureg                   P6,FPU 
-       FCMOVE           fpu0,fpureg              P6,FPU 
-       FCMOVE                                    P6,FPU,ND 
-       FCMOVNB          fpureg                   P6,FPU 
-       FCMOVNB          fpu0,fpureg              P6,FPU 
-       FCMOVNB                                   P6,FPU,ND 
-       FCMOVNBE         fpureg                   P6,FPU 
-       FCMOVNBE         fpu0,fpureg              P6,FPU 
-       FCMOVNBE                                  P6,FPU,ND 
-       FCMOVNE          fpureg                   P6,FPU 
-       FCMOVNE          fpu0,fpureg              P6,FPU 
-       FCMOVNE                                   P6,FPU,ND 
-       FCMOVNU          fpureg                   P6,FPU 
-       FCMOVNU          fpu0,fpureg              P6,FPU 
-       FCMOVNU                                   P6,FPU,ND 
-       FCMOVU           fpureg                   P6,FPU 
-       FCMOVU           fpu0,fpureg              P6,FPU 
-       FCMOVU                                    P6,FPU,ND 
-       FCOM             mem32                    8086,FPU 
-       FCOM             mem64                    8086,FPU 
-       FCOM             fpureg                   8086,FPU 
-       FCOM             fpu0,fpureg              8086,FPU 
-       FCOM                                      8086,FPU,ND 
-       FCOMI            fpureg                   P6,FPU 
-       FCOMI            fpu0,fpureg              P6,FPU 
-       FCOMI                                     P6,FPU,ND 
-       FCOMIP           fpureg                   P6,FPU 
-       FCOMIP           fpu0,fpureg              P6,FPU 
-       FCOMIP                                    P6,FPU,ND 
-       FCOMP            mem32                    8086,FPU 
-       FCOMP            mem64                    8086,FPU 
-       FCOMP            fpureg                   8086,FPU 
-       FCOMP            fpu0,fpureg              8086,FPU 
-       FCOMP                                     8086,FPU,ND 
-       FCOMPP                                    8086,FPU 
-       FCOS                                      386,FPU 
-       FDECSTP                                   8086,FPU 
-       FDISI                                     8086,FPU 
-       FDIV             mem32                    8086,FPU 
-       FDIV             mem64                    8086,FPU 
-       FDIV             fpureg|to                8086,FPU 
-       FDIV             fpureg                   8086,FPU 
-       FDIV             fpureg,fpu0              8086,FPU 
-       FDIV             fpu0,fpureg              8086,FPU 
-       FDIV                                      8086,FPU,ND 
-       FDIVP            fpureg                   8086,FPU 
-       FDIVP            fpureg,fpu0              8086,FPU 
-       FDIVP                                     8086,FPU,ND 
-       FDIVR            mem32                    8086,FPU 
-       FDIVR            mem64                    8086,FPU 
-       FDIVR            fpureg|to                8086,FPU 
-       FDIVR            fpureg,fpu0              8086,FPU 
-       FDIVR            fpureg                   8086,FPU 
-       FDIVR            fpu0,fpureg              8086,FPU 
-       FDIVR                                     8086,FPU,ND 
-       FDIVRP           fpureg                   8086,FPU 
-       FDIVRP           fpureg,fpu0              8086,FPU 
-       FDIVRP                                    8086,FPU,ND 
-       FEMMS                                     PENT,3DNOW 
-       FENI                                      8086,FPU 
-       FFREE            fpureg                   8086,FPU 
-       FFREE                                     8086,FPU 
-       FFREEP           fpureg                   286,FPU,UNDOC 
-       FFREEP                                    286,FPU,UNDOC 
-       FIADD            mem32                    8086,FPU 
-       FIADD            mem16                    8086,FPU 
-       FICOM            mem32                    8086,FPU 
-       FICOM            mem16                    8086,FPU 
-       FICOMP           mem32                    8086,FPU 
-       FICOMP           mem16                    8086,FPU 
-       FIDIV            mem32                    8086,FPU 
-       FIDIV            mem16                    8086,FPU 
-       FIDIVR           mem32                    8086,FPU 
-       FIDIVR           mem16                    8086,FPU 
-       FILD             mem32                    8086,FPU 
-       FILD             mem16                    8086,FPU 
-       FILD             mem64                    8086,FPU 
-       FIMUL            mem32                    8086,FPU 
-       FIMUL            mem16                    8086,FPU 
-       FINCSTP                                   8086,FPU 
-       FINIT                                     8086,FPU 
-       FIST             mem32                    8086,FPU 
-       FIST             mem16                    8086,FPU 
-       FISTP            mem32                    8086,FPU 
-       FISTP            mem16                    8086,FPU 
-       FISTP            mem64                    8086,FPU 
-       FISTTP           mem16                    PRESCOTT,FPU 
-       FISTTP           mem32                    PRESCOTT,FPU 
-       FISTTP           mem64                    PRESCOTT,FPU 
-       FISUB            mem32                    8086,FPU 
-       FISUB            mem16                    8086,FPU 
-       FISUBR           mem32                    8086,FPU 
-       FISUBR           mem16                    8086,FPU 
-       FLD              mem32                    8086,FPU 
-       FLD              mem64                    8086,FPU 
-       FLD              mem80                    8086,FPU 
-       FLD              fpureg                   8086,FPU 
-       FLD                                       8086,FPU,ND 
-       FLD1                                      8086,FPU 
-       FLDCW            mem                      8086,FPU,SW 
-       FLDENV           mem                      8086,FPU 
-       FLDL2E                                    8086,FPU 
-       FLDL2T                                    8086,FPU 
-       FLDLG2                                    8086,FPU 
-       FLDLN2                                    8086,FPU 
-       FLDPI                                     8086,FPU 
-       FLDZ                                      8086,FPU 
-       FMUL             mem32                    8086,FPU 
-       FMUL             mem64                    8086,FPU 
-       FMUL             fpureg|to                8086,FPU 
-       FMUL             fpureg,fpu0              8086,FPU 
-       FMUL             fpureg                   8086,FPU 
-       FMUL             fpu0,fpureg              8086,FPU 
-       FMUL                                      8086,FPU,ND 
-       FMULP            fpureg                   8086,FPU 
-       FMULP            fpureg,fpu0              8086,FPU 
-       FMULP                                     8086,FPU,ND 
-       FNCLEX                                    8086,FPU 
-       FNDISI                                    8086,FPU 
-       FNENI                                     8086,FPU 
-       FNINIT                                    8086,FPU 
-       FNOP                                      8086,FPU 
-       FNSAVE           mem                      8086,FPU 
-       FNSTCW           mem                      8086,FPU,SW 
-       FNSTENV          mem                      8086,FPU 
-       FNSTSW           mem                      8086,FPU,SW 
-       FNSTSW           reg_ax                   286,FPU 
-       FPATAN                                    8086,FPU 
-       FPREM                                     8086,FPU 
-       FPREM1                                    386,FPU 
-       FPTAN                                     8086,FPU 
-       FRNDINT                                   8086,FPU 
-       FRSTOR           mem                      8086,FPU 
-       FSAVE            mem                      8086,FPU 
-       FSCALE                                    8086,FPU 
-       FSETPM                                    286,FPU 
-       FSIN                                      386,FPU 
-       FSINCOS                                   386,FPU 
-       FSQRT                                     8086,FPU 
-       FST              mem32                    8086,FPU 
-       FST              mem64                    8086,FPU 
-       FST              fpureg                   8086,FPU 
-       FST                                       8086,FPU,ND 
-       FSTCW            mem                      8086,FPU,SW 
-       FSTENV           mem                      8086,FPU 
-       FSTP             mem32                    8086,FPU 
-       FSTP             mem64                    8086,FPU 
-       FSTP             mem80                    8086,FPU 
-       FSTP             fpureg                   8086,FPU 
-       FSTP                                      8086,FPU,ND 
-       FSTSW            mem                      8086,FPU,SW 
-       FSTSW            reg_ax                   286,FPU 
-       FSUB             mem32                    8086,FPU 
-       FSUB             mem64                    8086,FPU 
-       FSUB             fpureg|to                8086,FPU 
-       FSUB             fpureg,fpu0              8086,FPU 
-       FSUB             fpureg                   8086,FPU 
-       FSUB             fpu0,fpureg              8086,FPU 
-       FSUB                                      8086,FPU,ND 
-       FSUBP            fpureg                   8086,FPU 
-       FSUBP            fpureg,fpu0              8086,FPU 
-       FSUBP                                     8086,FPU,ND 
-       FSUBR            mem32                    8086,FPU 
-       FSUBR            mem64                    8086,FPU 
-       FSUBR            fpureg|to                8086,FPU 
-       FSUBR            fpureg,fpu0              8086,FPU 
-       FSUBR            fpureg                   8086,FPU 
-       FSUBR            fpu0,fpureg              8086,FPU 
-       FSUBR                                     8086,FPU,ND 
-       FSUBRP           fpureg                   8086,FPU 
-       FSUBRP           fpureg,fpu0              8086,FPU 
-       FSUBRP                                    8086,FPU,ND 
-       FTST                                      8086,FPU 
-       FUCOM            fpureg                   386,FPU 
-       FUCOM            fpu0,fpureg              386,FPU 
-       FUCOM                                     386,FPU,ND 
-       FUCOMI           fpureg                   P6,FPU 
-       FUCOMI           fpu0,fpureg              P6,FPU 
-       FUCOMI                                    P6,FPU,ND 
-       FUCOMIP          fpureg                   P6,FPU 
-       FUCOMIP          fpu0,fpureg              P6,FPU 
-       FUCOMIP                                   P6,FPU,ND 
-       FUCOMP           fpureg                   386,FPU 
-       FUCOMP           fpu0,fpureg              386,FPU 
-       FUCOMP                                    386,FPU,ND 
-       FUCOMPP                                   386,FPU 
-       FXAM                                      8086,FPU 
-       FXCH             fpureg                   8086,FPU 
-       FXCH             fpureg,fpu0              8086,FPU 
-       FXCH             fpu0,fpureg              8086,FPU 
-       FXCH                                      8086,FPU,ND 
-       FXTRACT                                   8086,FPU 
-       FYL2X                                     8086,FPU 
-       FYL2XP1                                   8086,FPU 
-       HLT                                       8086,PRIV 
-       IBTS             mem,reg16                386,SW,UNDOC,ND,OBSOLETE 
-       IBTS             reg16,reg16              386,UNDOC,ND,OBSOLETE 
-       IBTS             mem,reg32                386,SD,UNDOC,ND,OBSOLETE 
-       IBTS             reg32,reg32              386,UNDOC,ND,OBSOLETE 
-       ICEBP                                     386,ND 
-       IDIV             rm8                      8086 
-       IDIV             rm16                     8086 
-       IDIV             rm32                     386 
-       IDIV             rm64                     X86_64,LONG 
-       IMUL             rm8                      8086 
-       IMUL             rm16                     8086 
-       IMUL             rm32                     386 
-       IMUL             rm64                     X86_64,LONG 
-       IMUL             reg16,mem                386 
-       IMUL             reg16,reg16              386 
-       IMUL             reg32,mem                386 
-       IMUL             reg32,reg32              386 
-       IMUL             reg64,mem                X86_64,LONG 
-       IMUL             reg64,reg64              X86_64,LONG 
-       IMUL             reg16,mem,imm8           186 
-       IMUL             reg16,mem,sbyteword      186,ND 
-       IMUL             reg16,mem,imm16          186 
-       IMUL             reg16,mem,imm            186,ND 
-       IMUL             reg16,reg16,imm8         186 
-       IMUL             reg16,reg16,sbyteword    186,ND 
-       IMUL             reg16,reg16,imm16        186 
-       IMUL             reg16,reg16,imm          186,ND 
-       IMUL             reg32,mem,imm8           386 
-       IMUL             reg32,mem,sbytedword     386,ND 
-       IMUL             reg32,mem,imm32          386 
-       IMUL             reg32,mem,imm            386,ND 
-       IMUL             reg32,reg32,imm8         386 
-       IMUL             reg32,reg32,sbytedword   386,ND 
-       IMUL             reg32,reg32,imm32        386 
-       IMUL             reg32,reg32,imm          386,ND 
-       IMUL             reg64,mem,imm8           X86_64,LONG 
-       IMUL             reg64,mem,sbytedword     X86_64,LONG,ND 
-       IMUL             reg64,mem,imm32          X86_64,LONG 
-       IMUL             reg64,mem,imm            X86_64,LONG,ND 
-       IMUL             reg64,reg64,imm8         X86_64,LONG 
-       IMUL             reg64,reg64,sbytedword   X86_64,LONG,ND 
-       IMUL             reg64,reg64,imm32        X86_64,LONG 
-       IMUL             reg64,reg64,imm          X86_64,LONG,ND 
-       IMUL             reg16,imm8               186 
-       IMUL             reg16,sbyteword          186,ND 
-       IMUL             reg16,imm16              186 
-       IMUL             reg16,imm                186,ND 
-       IMUL             reg32,imm8               386 
-       IMUL             reg32,sbytedword         386,ND 
-       IMUL             reg32,imm32              386 
-       IMUL             reg32,imm                386,ND 
-       IMUL             reg64,imm8               X86_64,LONG 
-       IMUL             reg64,sbytedword         X86_64,LONG,ND 
-       IMUL             reg64,imm32              X86_64,LONG 
-       IMUL             reg64,imm                X86_64,LONG,ND 
-       IN               reg_al,imm               8086 
-       IN               reg_ax,imm               8086 
-       IN               reg_eax,imm              386 
-       IN               reg_al,reg_dx            8086 
-       IN               reg_ax,reg_dx            8086 
-       IN               reg_eax,reg_dx           386 
-       INC              reg16                    8086,NOLONG 
-       INC              reg32                    386,NOLONG 
-       INC              rm8                      8086,LOCK 
-       INC              rm16                     8086,LOCK 
-       INC              rm32                     386,LOCK 
-       INC              rm64                     X86_64,LONG,LOCK 
-       INSB                                      186 
-       INSD                                      386 
-       INSW                                      186 
-       INT              imm                      8086 
-       INT01                                     386,ND 
-       INT1                                      386 
-       INT03                                     8086,ND 
-       INT3                                      8086 
-       INTO                                      8086,NOLONG 
-       INVD                                      486,PRIV 
-       INVPCID          reg32,mem128             INVPCID,PRIV,NOLONG 
-       INVPCID          reg64,mem128             INVPCID,PRIV,LONG 
-       INVLPG           mem                      486,PRIV 
-       INVLPGA          reg_ax,reg_ecx           X86_64,AMD,NOLONG 
-       INVLPGA          reg_eax,reg_ecx          X86_64,AMD 
-       INVLPGA          reg_rax,reg_ecx          X86_64,LONG,AMD 
-       INVLPGA                                   X86_64,AMD 
-       IRET                                      8086 
-       IRETD                                     386 
-       IRETQ                                     X86_64,LONG 
-       IRETW                                     8086 
-       JCXZ             imm                      8086,NOLONG 
-       JECXZ            imm                      386 
-       JRCXZ            imm                      X86_64,LONG 
-       JMP              imm|short                8086 
-       JMP              imm                      8086,ND 
-       JMP              imm                      8086,BND 
-       JMP              imm|near                 8086,ND,BND 
-       JMP              imm|far                  8086,ND,NOLONG 
-       JMP              imm16                    8086,NOLONG,BND 
-       JMP              imm16|near               8086,ND,NOLONG,BND 
-       JMP              imm16|far                8086,ND,NOLONG 
-       JMP              imm32                    386,NOLONG,BND 
-       JMP              imm32|near               386,ND,NOLONG,BND 
-       JMP              imm32|far                386,ND,NOLONG 
-       JMP              imm64                    X86_64,LONG,BND 
-       JMP              imm64|near               X86_64,LONG,ND,BND 
-       JMP              imm:imm                  8086,NOLONG 
-       JMP              imm16:imm                8086,NOLONG 
-       JMP              imm:imm16                8086,NOLONG 
-       JMP              imm32:imm                386,NOLONG 
-       JMP              imm:imm32                386,NOLONG 
-       JMP              mem|far                  8086,NOLONG 
-       JMP              mem|far                  X86_64,LONG 
-       JMP              mem16|far                8086 
-       JMP              mem32|far                386 
-       JMP              mem64|far                X86_64,LONG 
-       JMP              mem|near                 8086,ND,BND 
-       JMP              rm16|near                8086,NOLONG,ND,BND 
-       JMP              rm32|near                386,NOLONG,ND,BND 
-       JMP              rm64|near                X86_64,LONG,ND,BND 
-       JMP              mem                      8086,BND 
-       JMP              rm16                     8086,NOLONG,BND 
-       JMP              rm32                     386,NOLONG,BND 
-       JMP              rm64                     X86_64,LONG,BND 
-       JMPE             imm                      IA64 
-       JMPE             imm16                    IA64 
-       JMPE             imm32                    IA64 
-       JMPE             rm16                     IA64 
-       JMPE             rm32                     IA64 
-       LAHF                                      8086 
-       LAR              reg16,mem                286,PROT,SW 
-       LAR              reg16,reg16              286,PROT 
-       LAR              reg16,reg32              386,PROT 
-       LAR              reg16,reg64              X86_64,LONG,PROT,ND 
-       LAR              reg32,mem                386,PROT,SW 
-       LAR              reg32,reg16              386,PROT 
-       LAR              reg32,reg32              386,PROT 
-       LAR              reg32,reg64              X86_64,LONG,PROT,ND 
-       LAR              reg64,mem                X86_64,LONG,PROT,SW 
-       LAR              reg64,reg16              X86_64,LONG,PROT 
-       LAR              reg64,reg32              X86_64,LONG,PROT 
-       LAR              reg64,reg64              X86_64,LONG,PROT 
-       LDS              reg16,mem                8086,NOLONG 
-       LDS              reg32,mem                386,NOLONG 
-       LEA              reg16,mem                8086,ANYSIZE 
-       LEA              reg32,mem                386,ANYSIZE 
-       LEA              reg64,mem                X86_64,LONG,ANYSIZE 
-       LEA              reg16,imm                8086,ND,ANYSIZE 
-       LEA              reg32,imm                386,ND,ANYSIZE 
-       LEA              reg64,imm                X86_64,LONG,ND,ANYSIZE 
-       LEAVE                                     186 
-       LES              reg16,mem                8086,NOLONG 
-       LES              reg32,mem                386,NOLONG 
-       LFENCE                                    X86_64,LONG,AMD 
-       LFS              reg16,mem                386 
-       LFS              reg32,mem                386 
-       LFS              reg64,mem                X86_64,LONG 
-       LGDT             mem                      286,PRIV 
-       LGS              reg16,mem                386 
-       LGS              reg32,mem                386 
-       LGS              reg64,mem                X86_64,LONG 
-       LIDT             mem                      286,PRIV 
-       LLDT             mem                      286,PROT,PRIV 
-       LLDT             mem16                    286,PROT,PRIV 
-       LLDT             reg16                    286,PROT,PRIV 
-       LMSW             mem                      286,PRIV 
-       LMSW             mem16                    286,PRIV 
-       LMSW             reg16                    286,PRIV 
-       LOADALL                                   386,UNDOC,ND,OBSOLETE 
-       LOADALL286                                286,UNDOC,ND,OBSOLETE 
-       LODSB                                     8086 
-       LODSD                                     386 
-       LODSQ                                     X86_64,LONG 
-       LODSW                                     8086 
-       LOOP             imm                      8086 
-       LOOP             imm,reg_cx               8086,NOLONG 
-       LOOP             imm,reg_ecx              386 
-       LOOP             imm,reg_rcx              X86_64,LONG 
-       LOOPE            imm                      8086 
-       LOOPE            imm,reg_cx               8086,NOLONG 
-       LOOPE            imm,reg_ecx              386 
-       LOOPE            imm,reg_rcx              X86_64,LONG 
-       LOOPNE           imm                      8086 
-       LOOPNE           imm,reg_cx               8086,NOLONG 
-       LOOPNE           imm,reg_ecx              386 
-       LOOPNE           imm,reg_rcx              X86_64,LONG 
-       LOOPNZ           imm                      8086 
-       LOOPNZ           imm,reg_cx               8086,NOLONG 
-       LOOPNZ           imm,reg_ecx              386 
-       LOOPNZ           imm,reg_rcx              X86_64,LONG 
-       LOOPZ            imm                      8086 
-       LOOPZ            imm,reg_cx               8086,NOLONG 
-       LOOPZ            imm,reg_ecx              386 
-       LOOPZ            imm,reg_rcx              X86_64,LONG 
-       LSL              reg16,mem                286,PROT,SW 
-       LSL              reg16,reg16              286,PROT 
-       LSL              reg16,reg32              386,PROT 
-       LSL              reg16,reg64              X86_64,LONG,PROT,ND 
-       LSL              reg32,mem                386,PROT,SW 
-       LSL              reg32,reg16              386,PROT 
-       LSL              reg32,reg32              386,PROT 
-       LSL              reg32,reg64              X86_64,LONG,PROT,ND 
-       LSL              reg64,mem                X86_64,LONG,PROT,SW 
-       LSL              reg64,reg16              X86_64,LONG,PROT 
-       LSL              reg64,reg32              X86_64,LONG,PROT 
-       LSL              reg64,reg64              X86_64,LONG,PROT 
-       LSS              reg16,mem                386 
-       LSS              reg32,mem                386 
-       LSS              reg64,mem                X86_64,LONG 
-       LTR              mem                      286,PROT,PRIV 
-       LTR              mem16                    286,PROT,PRIV 
-       LTR              reg16                    286,PROT,PRIV 
-       MFENCE                                    X86_64,LONG,AMD 
-       MONITOR                                   PRESCOTT 
-       MONITOR          reg_eax,reg_ecx,reg_edx  PRESCOTT,NOLONG,ND 
-       MONITOR          reg_rax,reg_ecx,reg_edx  X86_64,LONG,ND 
-       MONITORX                                  AMD 
-       MONITORX         reg_rax,reg_ecx,reg_edx  X86_64,LONG,AMD,ND 
-       MONITORX         reg_eax,reg_ecx,reg_edx  AMD,ND 
-       MONITORX         reg_ax,reg_ecx,reg_edx   AMD,ND 
-       MOV              mem,reg_sreg             8086,SW 
-       MOV              reg16,reg_sreg           8086 
-       MOV              reg32,reg_sreg           386 
-       MOV              reg64,reg_sreg           X86_64,LONG,OPT,ND 
-       MOV              rm64,reg_sreg            X86_64,LONG 
-       MOV              reg_sreg,mem             8086,SW 
-       MOV              reg_sreg,reg16           8086,OPT,ND 
-       MOV              reg_sreg,reg32           386,OPT,ND 
-       MOV              reg_sreg,reg64           X86_64,LONG,OPT,ND 
-       MOV              reg_sreg,reg16           8086 
-       MOV              reg_sreg,reg32           386 
-       MOV              reg_sreg,rm64            X86_64,LONG 
-       MOV              reg_al,mem_offs          8086 
-       MOV              reg_ax,mem_offs          8086 
-       MOV              reg_eax,mem_offs         386 
-       MOV              reg_rax,mem_offs         X86_64,LONG 
-       MOV              mem_offs,reg_al          8086,NOHLE 
-       MOV              mem_offs,reg_ax          8086,NOHLE 
-       MOV              mem_offs,reg_eax         386,NOHLE 
-       MOV              mem_offs,reg_rax         X86_64,LONG,NOHLE 
-       MOV              reg32,reg_creg           386,PRIV,NOLONG 
-       MOV              reg64,reg_creg           X86_64,LONG,PRIV 
-       MOV              reg_creg,reg32           386,PRIV,NOLONG 
-       MOV              reg_creg,reg64           X86_64,LONG,PRIV 
-       MOV              reg32,reg_dreg           386,PRIV,NOLONG 
-       MOV              reg64,reg_dreg           X86_64,LONG,PRIV 
-       MOV              reg_dreg,reg32           386,PRIV,NOLONG 
-       MOV              reg_dreg,reg64           X86_64,LONG,PRIV 
-       MOV              reg32,reg_treg           386,NOLONG,ND 
-       MOV              reg_treg,reg32           386,NOLONG,ND 
-       MOV              mem,reg8                 8086 
-       MOV              reg8,reg8                8086 
-       MOV              mem,reg16                8086 
-       MOV              reg16,reg16              8086 
-       MOV              mem,reg32                386 
-       MOV              reg32,reg32              386 
-       MOV              mem,reg64                X86_64,LONG 
-       MOV              reg64,reg64              X86_64,LONG 
-       MOV              reg8,mem                 8086 
-       MOV              reg8,reg8                8086 
-       MOV              reg16,mem                8086 
-       MOV              reg16,reg16              8086 
-       MOV              reg32,mem                386 
-       MOV              reg32,reg32              386 
-       MOV              reg64,mem                X86_64,LONG 
-       MOV              reg64,reg64              X86_64,LONG 
-       MOV              reg8,imm                 8086 
-       MOV              reg16,imm                8086 
-       MOV              reg32,imm                386 
-       MOV              reg64,udword             X86_64,LONG,OPT,ND 
-       MOV              reg64,sdword             X86_64,LONG,OPT,ND 
-       MOV              reg64,imm                X86_64,LONG 
-       MOV              rm8,imm                  8086 
-       MOV              rm16,imm                 8086 
-       MOV              rm32,imm                 386 
-       MOV              rm64,imm                 X86_64,LONG 
-       MOV              rm64,imm32               X86_64,LONG 
-       MOV              mem,imm8                 8086 
-       MOV              mem,imm16                8086 
-       MOV              mem,imm32                386 
-       MOVD             mmxreg,rm32              PENT,MMX,SD 
-       MOVD             rm32,mmxreg              PENT,MMX,SD 
-       MOVD             mmxreg,rm64              X86_64,LONG,MMX,SX,ND 
-       MOVD             rm64,mmxreg              X86_64,LONG,MMX,SX,ND 
-       MOVQ             mmxreg,mmxrm             PENT,MMX 
-       MOVQ             mmxrm,mmxreg             PENT,MMX 
-       MOVQ             mmxreg,rm64              X86_64,LONG,MMX 
-       MOVQ             rm64,mmxreg              X86_64,LONG,MMX 
-       MOVSB                                     8086 
-       MOVSD                                     386 
-       MOVSQ                                     X86_64,LONG 
-       MOVSW                                     8086 
-       MOVSX            reg16,mem                386 
-       MOVSX            reg16,reg8               386 
-       MOVSX            reg32,rm8                386 
-       MOVSX            reg32,rm16               386 
-       MOVSX            reg64,rm8                X86_64,LONG 
-       MOVSX            reg64,rm16               X86_64,LONG 
-       MOVSXD           reg64,rm32               X86_64,LONG 
-       MOVSX            reg64,rm32               X86_64,LONG,ND 
-       MOVZX            reg16,mem                386 
-       MOVZX            reg16,reg8               386 
-       MOVZX            reg32,rm8                386 
-       MOVZX            reg32,rm16               386 
-       MOVZX            reg64,rm8                X86_64,LONG 
-       MOVZX            reg64,rm16               X86_64,LONG 
-       MUL              rm8                      8086 
-       MUL              rm16                     8086 
-       MUL              rm32                     386 
-       MUL              rm64                     X86_64,LONG 
-       MWAIT                                     PRESCOTT 
-       MWAIT            reg_eax,reg_ecx          PRESCOTT,ND 
-       MWAITX                                    AMD 
-       MWAITX           reg_eax,reg_ecx          AMD,ND 
-       NEG              rm8                      8086,LOCK 
-       NEG              rm16                     8086,LOCK 
-       NEG              rm32                     386,LOCK 
-       NEG              rm64                     X86_64,LONG,LOCK 
-       NOP                                       8086 
-       NOP              rm16                     P6 
-       NOP              rm32                     P6 
-       NOP              rm64                     X86_64,LONG 
-       NOT              rm8                      8086,LOCK 
-       NOT              rm16                     8086,LOCK 
-       NOT              rm32                     386,LOCK 
-       NOT              rm64                     X86_64,LONG,LOCK 
-       OR               mem,reg8                 8086,LOCK 
-       OR               reg8,reg8                8086 
-       OR               mem,reg16                8086,LOCK 
-       OR               reg16,reg16              8086 
-       OR               mem,reg32                386,LOCK 
-       OR               reg32,reg32              386 
-       OR               mem,reg64                X86_64,LONG,LOCK 
-       OR               reg64,reg64              X86_64,LONG 
-       OR               reg8,mem                 8086 
-       OR               reg8,reg8                8086 
-       OR               reg16,mem                8086 
-       OR               reg16,reg16              8086 
-       OR               reg32,mem                386 
-       OR               reg32,reg32              386 
-       OR               reg64,mem                X86_64,LONG 
-       OR               reg64,reg64              X86_64,LONG 
-       OR               rm16,imm8                8086,LOCK 
-       OR               rm32,imm8                386,LOCK 
-       OR               rm64,imm8                X86_64,LONG,LOCK 
-       OR               reg_al,imm               8086 
-       OR               reg_ax,sbyteword         8086,ND 
-       OR               reg_ax,imm               8086 
-       OR               reg_eax,sbytedword       386,ND 
-       OR               reg_eax,imm              386 
-       OR               reg_rax,sbytedword       X86_64,LONG,ND 
-       OR               reg_rax,imm              X86_64,LONG 
-       OR               rm8,imm                  8086,LOCK 
-       OR               rm16,sbyteword           8086,LOCK,ND 
-       OR               rm16,imm                 8086,LOCK 
-       OR               rm32,sbytedword          386,LOCK,ND 
-       OR               rm32,imm                 386,LOCK 
-       OR               rm64,sbytedword          X86_64,LONG,LOCK,ND 
-       OR               rm64,imm                 X86_64,LONG,LOCK 
-       OR               mem,imm8                 8086,LOCK 
-       OR               mem,sbyteword16          8086,LOCK,ND 
-       OR               mem,imm16                8086,LOCK 
-       OR               mem,sbytedword32         386,LOCK,ND 
-       OR               mem,imm32                386,LOCK 
-       OR               rm8,imm                  8086,LOCK,ND,NOLONG 
-       OUT              imm,reg_al               8086 
-       OUT              imm,reg_ax               8086 
-       OUT              imm,reg_eax              386 
-       OUT              reg_dx,reg_al            8086 
-       OUT              reg_dx,reg_ax            8086 
-       OUT              reg_dx,reg_eax           386 
-       OUTSB                                     186 
-       OUTSD                                     386 
-       OUTSW                                     186 
-       PACKSSDW         mmxreg,mmxrm             PENT,MMX 
-       PACKSSWB         mmxreg,mmxrm             PENT,MMX 
-       PACKUSWB         mmxreg,mmxrm             PENT,MMX 
-       PADDB            mmxreg,mmxrm             PENT,MMX 
-       PADDD            mmxreg,mmxrm             PENT,MMX 
-       PADDSB           mmxreg,mmxrm             PENT,MMX 
-       PADDSIW          mmxreg,mmxrm             PENT,MMX,CYRIX 
-       PADDSW           mmxreg,mmxrm             PENT,MMX 
-       PADDUSB          mmxreg,mmxrm             PENT,MMX 
-       PADDUSW          mmxreg,mmxrm             PENT,MMX 
-       PADDW            mmxreg,mmxrm             PENT,MMX 
-       PAND             mmxreg,mmxrm             PENT,MMX 
-       PANDN            mmxreg,mmxrm             PENT,MMX 
-       PAUSE                                     8086 
-       PAVEB            mmxreg,mmxrm             PENT,MMX,CYRIX 
-       PAVGUSB          mmxreg,mmxrm             PENT,3DNOW 
-       PCMPEQB          mmxreg,mmxrm             PENT,MMX 
-       PCMPEQD          mmxreg,mmxrm             PENT,MMX 
-       PCMPEQW          mmxreg,mmxrm             PENT,MMX 
-       PCMPGTB          mmxreg,mmxrm             PENT,MMX 
-       PCMPGTD          mmxreg,mmxrm             PENT,MMX 
-       PCMPGTW          mmxreg,mmxrm             PENT,MMX 
-       PDISTIB          mmxreg,mem               PENT,MMX,CYRIX 
-       PF2ID            mmxreg,mmxrm             PENT,3DNOW 
-       PFACC            mmxreg,mmxrm             PENT,3DNOW 
-       PFADD            mmxreg,mmxrm             PENT,3DNOW 
-       PFCMPEQ          mmxreg,mmxrm             PENT,3DNOW 
-       PFCMPGE          mmxreg,mmxrm             PENT,3DNOW 
-       PFCMPGT          mmxreg,mmxrm             PENT,3DNOW 
-       PFMAX            mmxreg,mmxrm             PENT,3DNOW 
-       PFMIN            mmxreg,mmxrm             PENT,3DNOW 
-       PFMUL            mmxreg,mmxrm             PENT,3DNOW 
-       PFRCP            mmxreg,mmxrm             PENT,3DNOW 
-       PFRCPIT1         mmxreg,mmxrm             PENT,3DNOW 
-       PFRCPIT2         mmxreg,mmxrm             PENT,3DNOW 
-       PFRSQIT1         mmxreg,mmxrm             PENT,3DNOW 
-       PFRSQRT          mmxreg,mmxrm             PENT,3DNOW 
-       PFSUB            mmxreg,mmxrm             PENT,3DNOW 
-       PFSUBR           mmxreg,mmxrm             PENT,3DNOW 
-       PI2FD            mmxreg,mmxrm             PENT,3DNOW 
-       PMACHRIW         mmxreg,mem               PENT,MMX,CYRIX 
-       PMADDWD          mmxreg,mmxrm             PENT,MMX 
-       PMAGW            mmxreg,mmxrm             PENT,MMX,CYRIX 
-       PMULHRIW         mmxreg,mmxrm             PENT,MMX,CYRIX 
-       PMULHRWA         mmxreg,mmxrm             PENT,3DNOW 
-       PMULHRWC         mmxreg,mmxrm             PENT,MMX,CYRIX 
-       PMULHW           mmxreg,mmxrm             PENT,MMX 
-       PMULLW           mmxreg,mmxrm             PENT,MMX 
-       PMVGEZB          mmxreg,mem               PENT,MMX,CYRIX 
-       PMVLZB           mmxreg,mem               PENT,MMX,CYRIX 
-       PMVNZB           mmxreg,mem               PENT,MMX,CYRIX 
-       PMVZB            mmxreg,mem               PENT,MMX,CYRIX 
-       POP              reg16                    8086 
-       POP              reg32                    386,NOLONG 
-       POP              reg64                    X86_64,LONG 
-       POP              rm16                     8086 
-       POP              rm32                     386,NOLONG 
-       POP              rm64                     X86_64,LONG 
-       POP              reg_es                   8086,NOLONG 
-       POP              reg_cs                   8086,UNDOC,ND,OBSOLETE 
-       POP              reg_ss                   8086,NOLONG 
-       POP              reg_ds                   8086,NOLONG 
-       POP              reg_fs                   386 
-       POP              reg_gs                   386 
-       POPA                                      186,NOLONG 
-       POPAD                                     386,NOLONG 
-       POPAW                                     186,NOLONG 
-       POPF                                      8086 
-       POPFD                                     386,NOLONG 
-       POPFQ                                     X86_64,LONG 
-       POPFW                                     8086 
-       POR              mmxreg,mmxrm             PENT,MMX 
-       PREFETCH         mem                      PENT,3DNOW 
-       PREFETCHW        mem                      PENT,3DNOW 
-       PSLLD            mmxreg,mmxrm             PENT,MMX 
-       PSLLD            mmxreg,imm               PENT,MMX 
-       PSLLQ            mmxreg,mmxrm             PENT,MMX 
-       PSLLQ            mmxreg,imm               PENT,MMX 
-       PSLLW            mmxreg,mmxrm             PENT,MMX 
-       PSLLW            mmxreg,imm               PENT,MMX 
-       PSRAD            mmxreg,mmxrm             PENT,MMX 
-       PSRAD            mmxreg,imm               PENT,MMX 
-       PSRAW            mmxreg,mmxrm             PENT,MMX 
-       PSRAW            mmxreg,imm               PENT,MMX 
-       PSRLD            mmxreg,mmxrm             PENT,MMX 
-       PSRLD            mmxreg,imm               PENT,MMX 
-       PSRLQ            mmxreg,mmxrm             PENT,MMX 
-       PSRLQ            mmxreg,imm               PENT,MMX 
-       PSRLW            mmxreg,mmxrm             PENT,MMX 
-       PSRLW            mmxreg,imm               PENT,MMX 
-       PSUBB            mmxreg,mmxrm             PENT,MMX 
-       PSUBD            mmxreg,mmxrm             PENT,MMX 
-       PSUBSB           mmxreg,mmxrm             PENT,MMX 
-       PSUBSIW          mmxreg,mmxrm             PENT,MMX,CYRIX 
-       PSUBSW           mmxreg,mmxrm             PENT,MMX 
-       PSUBUSB          mmxreg,mmxrm             PENT,MMX 
-       PSUBUSW          mmxreg,mmxrm             PENT,MMX 
-       PSUBW            mmxreg,mmxrm             PENT,MMX 
-       PUNPCKHBW        mmxreg,mmxrm             PENT,MMX 
-       PUNPCKHDQ        mmxreg,mmxrm             PENT,MMX 
-       PUNPCKHWD        mmxreg,mmxrm             PENT,MMX 
-       PUNPCKLBW        mmxreg,mmxrm             PENT,MMX 
-       PUNPCKLDQ        mmxreg,mmxrm             PENT,MMX 
-       PUNPCKLWD        mmxreg,mmxrm             PENT,MMX 
-       PUSH             reg16                    8086 
-       PUSH             reg32                    386,NOLONG 
-       PUSH             reg64                    X86_64,LONG 
-       PUSH             rm16                     8086 
-       PUSH             rm32                     386,NOLONG 
-       PUSH             rm64                     X86_64,LONG 
-       PUSH             reg_es                   8086,NOLONG 
-       PUSH             reg_cs                   8086,NOLONG 
-       PUSH             reg_ss                   8086,NOLONG 
-       PUSH             reg_ds                   8086,NOLONG 
-       PUSH             reg_fs                   386 
-       PUSH             reg_gs                   386 
-       PUSH             imm8                     186 
-       PUSH             sbyteword16              186,AR0,SIZE,ND 
-       PUSH             imm16                    186,AR0,SIZE 
-       PUSH             sbytedword32             386,NOLONG,AR0,SIZE,ND 
-       PUSH             imm32                    386,NOLONG,AR0,SIZE 
-       PUSH             sbytedword32             386,NOLONG,SD,ND 
-       PUSH             imm32                    386,NOLONG,SD 
-       PUSH             sbytedword64             X86_64,LONG,AR0,SIZE,ND 
-       PUSH             imm64                    X86_64,LONG,AR0,SIZE 
-       PUSH             sbytedword32             X86_64,LONG,AR0,SIZE,ND 
-       PUSH             imm32                    X86_64,LONG,AR0,SIZE 
-       PUSHA                                     186,NOLONG 
-       PUSHAD                                    386,NOLONG 
-       PUSHAW                                    186,NOLONG 
-       PUSHF                                     8086 
-       PUSHFD                                    386,NOLONG 
-       PUSHFQ                                    X86_64,LONG 
-       PUSHFW                                    8086 
-       PXOR             mmxreg,mmxrm             PENT,MMX 
-       RCL              rm8,unity                8086 
-       RCL              rm8,reg_cl               8086 
-       RCL              rm8,imm8                 186 
-       RCL              rm16,unity               8086 
-       RCL              rm16,reg_cl              8086 
-       RCL              rm16,imm8                186 
-       RCL              rm32,unity               386 
-       RCL              rm32,reg_cl              386 
-       RCL              rm32,imm8                386 
-       RCL              rm64,unity               X86_64,LONG 
-       RCL              rm64,reg_cl              X86_64,LONG 
-       RCL              rm64,imm8                X86_64,LONG 
-       RCR              rm8,unity                8086 
-       RCR              rm8,reg_cl               8086 
-       RCR              rm8,imm8                 186 
-       RCR              rm16,unity               8086 
-       RCR              rm16,reg_cl              8086 
-       RCR              rm16,imm8                186 
-       RCR              rm32,unity               386 
-       RCR              rm32,reg_cl              386 
-       RCR              rm32,imm8                386 
-       RCR              rm64,unity               X86_64,LONG 
-       RCR              rm64,reg_cl              X86_64,LONG 
-       RCR              rm64,imm8                X86_64,LONG 
-       RDSHR            rm32                     P6,CYRIX,SMM 
-       RDMSR                                     PENT,PRIV 
-       RDPMC                                     P6 
-       RDTSC                                     PENT 
-       RDTSCP                                    X86_64 
-       RET                                       8086,BND 
-       RET              imm                      8086,SW,BND 
-       RETF                                      8086 
-       RETF             imm                      8086,SW 
-       RETN                                      8086,BND 
-       RETN             imm                      8086,SW,BND 
-       RETW                                      8086,BND 
-       RETW             imm                      8086,SW,BND 
-       RETFW                                     8086 
-       RETFW            imm                      8086,SW 
-       RETNW                                     8086,BND 
-       RETNW            imm                      8086,SW,BND 
-       RETD                                      8086,BND,NOLONG 
-       RETD             imm                      8086,SW,BND,NOLONG 
-       RETFD                                     8086 
-       RETFD            imm                      8086,SW 
-       RETND                                     8086,BND,NOLONG 
-       RETND            imm                      8086,SW,BND,NOLONG 
-       RETQ                                      X86_64,LONG,BND 
-       RETQ             imm                      X86_64,LONG,SW,BND 
-       RETFQ                                     X86_64,LONG 
-       RETFQ            imm                      X86_64,LONG,SW 
-       RETNQ                                     X86_64,LONG,BND 
-       RETNQ            imm                      X86_64,LONG,SW,BND 
-       ROL              rm8,unity                8086 
-       ROL              rm8,reg_cl               8086 
-       ROL              rm8,imm8                 186 
-       ROL              rm16,unity               8086 
-       ROL              rm16,reg_cl              8086 
-       ROL              rm16,imm8                186 
-       ROL              rm32,unity               386 
-       ROL              rm32,reg_cl              386 
-       ROL              rm32,imm8                386 
-       ROL              rm64,unity               X86_64,LONG 
-       ROL              rm64,reg_cl              X86_64,LONG 
-       ROL              rm64,imm8                X86_64,LONG 
-       ROR              rm8,unity                8086 
-       ROR              rm8,reg_cl               8086 
-       ROR              rm8,imm8                 186 
-       ROR              rm16,unity               8086 
-       ROR              rm16,reg_cl              8086 
-       ROR              rm16,imm8                186 
-       ROR              rm32,unity               386 
-       ROR              rm32,reg_cl              386 
-       ROR              rm32,imm8                386 
-       ROR              rm64,unity               X86_64,LONG 
-       ROR              rm64,reg_cl              X86_64,LONG 
-       ROR              rm64,imm8                X86_64,LONG 
-       RDM                                       P6,CYRIX,ND 
-       RSDC             reg_sreg,mem80           486,CYRIX,SMM 
-       RSLDT            mem80                    486,CYRIX,SMM 
-       RSM                                       PENT,SMM 
-       RSTS             mem80                    486,CYRIX,SMM 
-       SAHF                                      8086 
-       SAL              rm8,unity                8086,ND 
-       SAL              rm8,reg_cl               8086,ND 
-       SAL              rm8,imm8                 186,ND 
-       SAL              rm16,unity               8086,ND 
-       SAL              rm16,reg_cl              8086,ND 
-       SAL              rm16,imm8                186,ND 
-       SAL              rm32,unity               386,ND 
-       SAL              rm32,reg_cl              386,ND 
-       SAL              rm32,imm8                386,ND 
-       SAL              rm64,unity               X86_64,LONG,ND 
-       SAL              rm64,reg_cl              X86_64,LONG,ND 
-       SAL              rm64,imm8                X86_64,LONG,ND 
-       SALC                                      8086,UNDOC 
-       SAR              rm8,unity                8086 
-       SAR              rm8,reg_cl               8086 
-       SAR              rm8,imm8                 186 
-       SAR              rm16,unity               8086 
-       SAR              rm16,reg_cl              8086 
-       SAR              rm16,imm8                186 
-       SAR              rm32,unity               386 
-       SAR              rm32,reg_cl              386 
-       SAR              rm32,imm8                386 
-       SAR              rm64,unity               X86_64,LONG 
-       SAR              rm64,reg_cl              X86_64,LONG 
-       SAR              rm64,imm8                X86_64,LONG 
-       SBB              mem,reg8                 8086,LOCK 
-       SBB              reg8,reg8                8086 
-       SBB              mem,reg16                8086,LOCK 
-       SBB              reg16,reg16              8086 
-       SBB              mem,reg32                386,LOCK 
-       SBB              reg32,reg32              386 
-       SBB              mem,reg64                X86_64,LONG,LOCK 
-       SBB              reg64,reg64              X86_64,LONG 
-       SBB              reg8,mem                 8086 
-       SBB              reg8,reg8                8086 
-       SBB              reg16,mem                8086 
-       SBB              reg16,reg16              8086 
-       SBB              reg32,mem                386 
-       SBB              reg32,reg32              386 
-       SBB              reg64,mem                X86_64,LONG 
-       SBB              reg64,reg64              X86_64,LONG 
-       SBB              rm16,imm8                8086,LOCK 
-       SBB              rm32,imm8                386,LOCK 
-       SBB              rm64,imm8                X86_64,LONG,LOCK 
-       SBB              reg_al,imm               8086 
-       SBB              reg_ax,sbyteword         8086,ND 
-       SBB              reg_ax,imm               8086 
-       SBB              reg_eax,sbytedword       386,ND 
-       SBB              reg_eax,imm              386 
-       SBB              reg_rax,sbytedword       X86_64,LONG,ND 
-       SBB              reg_rax,imm              X86_64,LONG 
-       SBB              rm8,imm                  8086,LOCK 
-       SBB              rm16,sbyteword           8086,LOCK,ND 
-       SBB              rm16,imm                 8086,LOCK 
-       SBB              rm32,sbytedword          386,LOCK,ND 
-       SBB              rm32,imm                 386,LOCK 
-       SBB              rm64,sbytedword          X86_64,LONG,LOCK,ND 
-       SBB              rm64,imm                 X86_64,LONG,LOCK 
-       SBB              mem,imm8                 8086,LOCK 
-       SBB              mem,sbyteword16          8086,LOCK,ND 
-       SBB              mem,imm16                8086,LOCK 
-       SBB              mem,sbytedword32         386,LOCK,ND 
-       SBB              mem,imm32                386,LOCK 
-       SBB              rm8,imm                  8086,LOCK,ND,NOLONG 
-       SCASB                                     8086 
-       SCASD                                     386 
-       SCASQ                                     X86_64,LONG 
-       SCASW                                     8086 
-       SFENCE                                    X86_64,LONG,AMD 
-       SGDT             mem                      286 
-       SHL              rm8,unity                8086 
-       SHL              rm8,reg_cl               8086 
-       SHL              rm8,imm8                 186 
-       SHL              rm16,unity               8086 
-       SHL              rm16,reg_cl              8086 
-       SHL              rm16,imm8                186 
-       SHL              rm32,unity               386 
-       SHL              rm32,reg_cl              386 
-       SHL              rm32,imm8                386 
-       SHL              rm64,unity               X86_64,LONG 
-       SHL              rm64,reg_cl              X86_64,LONG 
-       SHL              rm64,imm8                X86_64,LONG 
-       SHLD             mem,reg16,imm            386 
-       SHLD             reg16,reg16,imm          386 
-       SHLD             mem,reg32,imm            386 
-       SHLD             reg32,reg32,imm          386 
-       SHLD             mem,reg64,imm            X86_64,LONG 
-       SHLD             reg64,reg64,imm          X86_64,LONG 
-       SHLD             mem,reg16,reg_cl         386 
-       SHLD             reg16,reg16,reg_cl       386 
-       SHLD             mem,reg32,reg_cl         386 
-       SHLD             reg32,reg32,reg_cl       386 
-       SHLD             mem,reg64,reg_cl         X86_64,LONG 
-       SHLD             reg64,reg64,reg_cl       X86_64,LONG 
-       SHR              rm8,unity                8086 
-       SHR              rm8,reg_cl               8086 
-       SHR              rm8,imm8                 186 
-       SHR              rm16,unity               8086 
-       SHR              rm16,reg_cl              8086 
-       SHR              rm16,imm8                186 
-       SHR              rm32,unity               386 
-       SHR              rm32,reg_cl              386 
-       SHR              rm32,imm8                386 
-       SHR              rm64,unity               X86_64,LONG 
-       SHR              rm64,reg_cl              X86_64,LONG 
-       SHR              rm64,imm8                X86_64,LONG 
-       SHRD             mem,reg16,imm            386 
-       SHRD             reg16,reg16,imm          386 
-       SHRD             mem,reg32,imm            386 
-       SHRD             reg32,reg32,imm          386 
-       SHRD             mem,reg64,imm            X86_64,LONG 
-       SHRD             reg64,reg64,imm          X86_64,LONG 
-       SHRD             mem,reg16,reg_cl         386 
-       SHRD             reg16,reg16,reg_cl       386 
-       SHRD             mem,reg32,reg_cl         386 
-       SHRD             reg32,reg32,reg_cl       386 
-       SHRD             mem,reg64,reg_cl         X86_64,LONG 
-       SHRD             reg64,reg64,reg_cl       X86_64,LONG 
-       SIDT             mem                      286 
-       SLDT             mem                      286 
-       SLDT             mem16                    286 
-       SLDT             reg16                    286 
-       SLDT             reg32                    386 
-       SLDT             reg64                    X86_64,LONG,ND 
-       SLDT             reg64                    X86_64,LONG 
-       SKINIT                                    X86_64,LONG 
-       SMI                                       386,UNDOC 
-       SMINT                                     P6,CYRIX,ND 
-       SMINTOLD                                  486,CYRIX,ND,OBSOLETE 
-       SMSW             mem                      286 
-       SMSW             mem16                    286 
-       SMSW             reg16                    286 
-       SMSW             reg32                    386 
-       SMSW             reg64                    X86_64,LONG 
-       STC                                       8086 
-       STD                                       8086 
-       STI                                       8086 
-       STOSB                                     8086 
-       STOSD                                     386 
-       STOSQ                                     X86_64,LONG 
-       STOSW                                     8086 
-       STR              mem                      286,PROT 
-       STR              mem16                    286,PROT 
-       STR              reg16                    286,PROT 
-       STR              reg32                    386,PROT 
-       STR              reg64                    X86_64,LONG 
-       SUB              mem,reg8                 8086,LOCK 
-       SUB              reg8,reg8                8086 
-       SUB              mem,reg16                8086,LOCK 
-       SUB              reg16,reg16              8086 
-       SUB              mem,reg32                386,LOCK 
-       SUB              reg32,reg32              386 
-       SUB              mem,reg64                X86_64,LONG,LOCK 
-       SUB              reg64,reg64              X86_64,LONG 
-       SUB              reg8,mem                 8086 
-       SUB              reg8,reg8                8086 
-       SUB              reg16,mem                8086 
-       SUB              reg16,reg16              8086 
-       SUB              reg32,mem                386 
-       SUB              reg32,reg32              386 
-       SUB              reg64,mem                X86_64,LONG 
-       SUB              reg64,reg64              X86_64,LONG 
-       SUB              rm16,imm8                8086,LOCK 
-       SUB              rm32,imm8                386,LOCK 
-       SUB              rm64,imm8                X86_64,LONG,LOCK 
-       SUB              reg_al,imm               8086 
-       SUB              reg_ax,sbyteword         8086,ND 
-       SUB              reg_ax,imm               8086 
-       SUB              reg_eax,sbytedword       386,ND 
-       SUB              reg_eax,imm              386 
-       SUB              reg_rax,sbytedword       X86_64,LONG,ND 
-       SUB              reg_rax,imm              X86_64,LONG 
-       SUB              rm8,imm                  8086,LOCK 
-       SUB              rm16,sbyteword           8086,LOCK,ND 
-       SUB              rm16,imm                 8086,LOCK 
-       SUB              rm32,sbytedword          386,LOCK,ND 
-       SUB              rm32,imm                 386,LOCK 
-       SUB              rm64,sbytedword          X86_64,LONG,LOCK,ND 
-       SUB              rm64,imm                 X86_64,LONG,LOCK 
-       SUB              mem,imm8                 8086,LOCK 
-       SUB              mem,sbyteword16          8086,LOCK,ND 
-       SUB              mem,imm16                8086,LOCK 
-       SUB              mem,sbytedword32         386,LOCK,ND 
-       SUB              mem,imm32                386,LOCK 
-       SUB              rm8,imm                  8086,LOCK,ND,NOLONG 
-       SVDC             mem80,reg_sreg           486,CYRIX,SMM 
-       SVLDT            mem80                    486,CYRIX,SMM,ND 
-       SVTS             mem80                    486,CYRIX,SMM 
-       SWAPGS                                    X86_64,LONG 
-       SYSCALL                                   P6,AMD 
-       SYSENTER                                  P6 
-       SYSEXIT                                   P6,PRIV 
-       SYSRET                                    P6,PRIV,AMD 
-       TEST             mem,reg8                 8086 
-       TEST             reg8,reg8                8086 
-       TEST             mem,reg16                8086 
-       TEST             reg16,reg16              8086 
-       TEST             mem,reg32                386 
-       TEST             reg32,reg32              386 
-       TEST             mem,reg64                X86_64,LONG 
-       TEST             reg64,reg64              X86_64,LONG 
-       TEST             reg8,mem                 8086 
-       TEST             reg16,mem                8086 
-       TEST             reg32,mem                386 
-       TEST             reg64,mem                X86_64,LONG 
-       TEST             reg_al,imm               8086 
-       TEST             reg_ax,imm               8086 
-       TEST             reg_eax,imm              386 
-       TEST             reg_rax,imm              X86_64,LONG 
-       TEST             rm8,imm                  8086 
-       TEST             rm16,imm                 8086 
-       TEST             rm32,imm                 386 
-       TEST             rm64,imm                 X86_64,LONG 
-       TEST             mem,imm8                 8086 
-       TEST             mem,imm16                8086 
-       TEST             mem,imm32                386 
-       UD0                                       186,OBSOLETE 
-       UD0              reg16,rm16               186 
-       UD0              reg32,rm32               186 
-       UD0              reg64,rm64               186 
-       UD1              reg16,rm16               186 
-       UD1              reg32,rm32               186 
-       UD1              reg64,rm64               186 
-       UD1                                       186,ND 
-       UD2B                                      186,ND 
-       UD2B             reg16,rm16               186,ND 
-       UD2B             reg32,rm32               186,ND 
-       UD2B             reg64,rm64               186,ND 
-       UD2                                       186 
-       UD2A                                      186,ND 
-       UMOV             mem,reg8                 386,UNDOC,ND 
-       UMOV             reg8,reg8                386,UNDOC,ND 
-       UMOV             mem,reg16                386,UNDOC,ND 
-       UMOV             reg16,reg16              386,UNDOC,ND 
-       UMOV             mem,reg32                386,UNDOC,ND 
-       UMOV             reg32,reg32              386,UNDOC,ND 
-       UMOV             reg8,mem                 386,UNDOC,ND 
-       UMOV             reg8,reg8                386,UNDOC,ND 
-       UMOV             reg16,mem                386,UNDOC,ND 
-       UMOV             reg16,reg16              386,UNDOC,ND 
-       UMOV             reg32,mem                386,UNDOC,ND 
-       UMOV             reg32,reg32              386,UNDOC,ND 
-       VERR             mem                      286,PROT 
-       VERR             mem16                    286,PROT 
-       VERR             reg16                    286,PROT 
-       VERW             mem                      286,PROT 
-       VERW             mem16                    286,PROT 
-       VERW             reg16                    286,PROT 
-       FWAIT                                     8086 
-       WBINVD                                    486,PRIV 
-       WRSHR            rm32                     P6,CYRIX,SMM 
-       WRMSR                                     PENT,PRIV 
-       XADD             mem,reg8                 486,LOCK 
-       XADD             reg8,reg8                486 
-       XADD             mem,reg16                486,LOCK 
-       XADD             reg16,reg16              486 
-       XADD             mem,reg32                486,LOCK 
-       XADD             reg32,reg32              486 
-       XADD             mem,reg64                X86_64,LONG,LOCK 
-       XADD             reg64,reg64              X86_64,LONG 
-       XBTS             reg16,mem                386,SW,UNDOC,ND 
-       XBTS             reg16,reg16              386,UNDOC,ND 
-       XBTS             reg32,mem                386,SD,UNDOC,ND 
-       XBTS             reg32,reg32              386,UNDOC,ND 
-       XCHG             reg_ax,reg16             8086 
-       XCHG             reg_eax,reg32na          386 
-       XCHG             reg_rax,reg64            X86_64,LONG 
-       XCHG             reg16,reg_ax             8086 
-       XCHG             reg32na,reg_eax          386 
-       XCHG             reg64,reg_rax            X86_64,LONG 
-       XCHG             reg_eax,reg_eax          386,NOLONG 
-       XCHG             reg8,mem                 8086,LOCK 
-       XCHG             reg8,reg8                8086 
-       XCHG             reg16,mem                8086,LOCK 
-       XCHG             reg16,reg16              8086 
-       XCHG             reg32,mem                386,LOCK 
-       XCHG             reg32,reg32              386 
-       XCHG             reg64,mem                X86_64,LONG,LOCK 
-       XCHG             reg64,reg64              X86_64,LONG 
-       XCHG             mem,reg8                 8086,LOCK 
-       XCHG             reg8,reg8                8086 
-       XCHG             mem,reg16                8086,LOCK 
-       XCHG             reg16,reg16              8086 
-       XCHG             mem,reg32                386,LOCK 
-       XCHG             reg32,reg32              386 
-       XCHG             mem,reg64                X86_64,LONG,LOCK 
-       XCHG             reg64,reg64              X86_64,LONG 
-       XLATB                                     8086 
-       XLAT                                      8086 
-       XOR              mem,reg8                 8086,LOCK 
-       XOR              reg8,reg8                8086 
-       XOR              mem,reg16                8086,LOCK 
-       XOR              reg16,reg16              8086 
-       XOR              mem,reg32                386,LOCK 
-       XOR              reg32,reg32              386 
-       XOR              mem,reg64                X86_64,LONG,LOCK 
-       XOR              reg64,reg64              X86_64,LONG 
-       XOR              reg8,mem                 8086 
-       XOR              reg8,reg8                8086 
-       XOR              reg16,mem                8086 
-       XOR              reg16,reg16              8086 
-       XOR              reg32,mem                386 
-       XOR              reg32,reg32              386 
-       XOR              reg64,mem                X86_64,LONG 
-       XOR              reg64,reg64              X86_64,LONG 
-       XOR              rm16,imm8                8086,LOCK 
-       XOR              rm32,imm8                386,LOCK 
-       XOR              rm64,imm8                X86_64,LONG,LOCK 
-       XOR              reg_al,imm               8086 
-       XOR              reg_ax,sbyteword         8086,ND 
-       XOR              reg_ax,imm               8086 
-       XOR              reg_eax,sbytedword       386,ND 
-       XOR              reg_eax,imm              386 
-       XOR              reg_rax,sbytedword       X86_64,LONG,ND 
-       XOR              reg_rax,imm              X86_64,LONG 
-       XOR              rm8,imm                  8086,LOCK 
-       XOR              rm16,sbyteword           8086,LOCK,ND 
-       XOR              rm16,imm                 8086,LOCK 
-       XOR              rm32,sbytedword          386,LOCK,ND 
-       XOR              rm32,imm                 386,LOCK 
-       XOR              rm64,sbytedword          X86_64,LONG,LOCK,ND 
-       XOR              rm64,imm                 X86_64,LONG,LOCK 
-       XOR              mem,imm8                 8086,LOCK 
-       XOR              mem,sbyteword16          8086,LOCK,ND 
-       XOR              mem,imm16                8086,LOCK 
-       XOR              mem,sbytedword32         386,LOCK,ND 
-       XOR              mem,imm32                386,LOCK 
-       XOR              rm8,imm                  8086,LOCK,ND,NOLONG 
-       CMOVcc           reg16,mem                P6 
-       CMOVcc           reg16,reg16              P6 
-       CMOVcc           reg32,mem                P6 
-       CMOVcc           reg32,reg32              P6 
-       CMOVcc           reg64,mem                X86_64,LONG 
-       CMOVcc           reg64,reg64              X86_64,LONG 
-       Jcc              imm|near                 386,BND 
-       Jcc              imm16|near               386,NOLONG,BND 
-       Jcc              imm32|near               386,NOLONG,BND 
-       Jcc              imm64|near               X86_64,LONG,BND 
-       Jcc              imm|short                8086,ND,BND 
-       Jcc              imm                      8086,ND,BND 
-       Jcc              imm                      386,ND,BND 
-       Jcc              imm                      8086,ND,BND 
-       Jcc              imm                      8086,BND 
-       SETcc            mem                      386 
-       SETcc            reg8                     386
-
- F.1.3 Katmai Streaming SIMD instructions (SSE -- a.k.a. KNI, XMM, MMX2)
-
-       ADDPS            xmmreg,xmmrm128          KATMAI,SSE 
-       ADDSS            xmmreg,xmmrm32           KATMAI,SSE 
-       ANDNPS           xmmreg,xmmrm128          KATMAI,SSE 
-       ANDPS            xmmreg,xmmrm128          KATMAI,SSE 
-       CMPEQPS          xmmreg,xmmrm128          KATMAI,SSE 
-       CMPEQSS          xmmreg,xmmrm32           KATMAI,SSE 
-       CMPLEPS          xmmreg,xmmrm128          KATMAI,SSE 
-       CMPLESS          xmmreg,xmmrm32           KATMAI,SSE 
-       CMPLTPS          xmmreg,xmmrm128          KATMAI,SSE 
-       CMPLTSS          xmmreg,xmmrm32           KATMAI,SSE 
-       CMPNEQPS         xmmreg,xmmrm128          KATMAI,SSE 
-       CMPNEQSS         xmmreg,xmmrm32           KATMAI,SSE 
-       CMPNLEPS         xmmreg,xmmrm128          KATMAI,SSE 
-       CMPNLESS         xmmreg,xmmrm32           KATMAI,SSE 
-       CMPNLTPS         xmmreg,xmmrm128          KATMAI,SSE 
-       CMPNLTSS         xmmreg,xmmrm32           KATMAI,SSE 
-       CMPORDPS         xmmreg,xmmrm128          KATMAI,SSE 
-       CMPORDSS         xmmreg,xmmrm32           KATMAI,SSE 
-       CMPUNORDPS       xmmreg,xmmrm128          KATMAI,SSE 
-       CMPUNORDSS       xmmreg,xmmrm32           KATMAI,SSE 
-       CMPPS            xmmreg,xmmrm128,imm8     KATMAI,SSE 
-       CMPSS            xmmreg,xmmrm32,imm8      KATMAI,SSE 
-       COMISS           xmmreg,xmmrm32           KATMAI,SSE 
-       CVTPI2PS         xmmreg,mmxrm64           KATMAI,SSE,MMX 
-       CVTPS2PI         mmxreg,xmmrm64           KATMAI,SSE,MMX 
-       CVTSI2SS         xmmreg,mem               KATMAI,SSE,SD,AR1,ND 
-       CVTSI2SS         xmmreg,rm32              KATMAI,SSE,SD,AR1 
-       CVTSI2SS         xmmreg,rm64              X86_64,LONG,SSE,AR1 
-       CVTSS2SI         reg32,xmmreg             KATMAI,SSE,SD,AR1 
-       CVTSS2SI         reg32,mem                KATMAI,SSE,SD,AR1 
-       CVTSS2SI         reg64,xmmreg             X86_64,LONG,SSE,SD,AR1 
-       CVTSS2SI         reg64,mem                X86_64,LONG,SSE,SD,AR1 
-       CVTTPS2PI        mmxreg,xmmrm             KATMAI,SSE,MMX 
-       CVTTSS2SI        reg32,xmmrm              KATMAI,SSE,SD,AR1 
-       CVTTSS2SI        reg64,xmmrm              X86_64,LONG,SSE,SD,AR1 
-       DIVPS            xmmreg,xmmrm128          KATMAI,SSE 
-       DIVSS            xmmreg,xmmrm32           KATMAI,SSE 
-       LDMXCSR          mem32                    KATMAI,SSE 
-       MAXPS            xmmreg,xmmrm128          KATMAI,SSE 
-       MAXSS            xmmreg,xmmrm32           KATMAI,SSE 
-       MINPS            xmmreg,xmmrm128          KATMAI,SSE 
-       MINSS            xmmreg,xmmrm32           KATMAI,SSE 
-       MOVAPS           xmmreg,xmmrm128          KATMAI,SSE 
-       MOVAPS           xmmrm128,xmmreg          KATMAI,SSE 
-       MOVHPS           xmmreg,mem64             KATMAI,SSE 
-       MOVHPS           mem64,xmmreg             KATMAI,SSE 
-       MOVLHPS          xmmreg,xmmreg            KATMAI,SSE 
-       MOVLPS           xmmreg,mem64             KATMAI,SSE 
-       MOVLPS           mem64,xmmreg             KATMAI,SSE 
-       MOVHLPS          xmmreg,xmmreg            KATMAI,SSE 
-       MOVMSKPS         reg32,xmmreg             KATMAI,SSE 
-       MOVMSKPS         reg64,xmmreg             X86_64,LONG,SSE 
-       MOVNTPS          mem128,xmmreg            KATMAI,SSE 
-       MOVSS            xmmreg,xmmrm32           KATMAI,SSE 
-       MOVSS            xmmrm32,xmmreg           KATMAI,SSE 
-       MOVUPS           xmmreg,xmmrm128          KATMAI,SSE 
-       MOVUPS           xmmrm128,xmmreg          KATMAI,SSE 
-       MULPS            xmmreg,xmmrm128          KATMAI,SSE 
-       MULSS            xmmreg,xmmrm32           KATMAI,SSE 
-       ORPS             xmmreg,xmmrm128          KATMAI,SSE 
-       RCPPS            xmmreg,xmmrm128          KATMAI,SSE 
-       RCPSS            xmmreg,xmmrm32           KATMAI,SSE 
-       RSQRTPS          xmmreg,xmmrm128          KATMAI,SSE 
-       RSQRTSS          xmmreg,xmmrm32           KATMAI,SSE 
-       SHUFPS           xmmreg,xmmrm128,imm8     KATMAI,SSE 
-       SQRTPS           xmmreg,xmmrm128          KATMAI,SSE 
-       SQRTSS           xmmreg,xmmrm32           KATMAI,SSE 
-       STMXCSR          mem32                    KATMAI,SSE 
-       SUBPS            xmmreg,xmmrm128          KATMAI,SSE 
-       SUBSS            xmmreg,xmmrm32           KATMAI,SSE 
-       UCOMISS          xmmreg,xmmrm32           KATMAI,SSE 
-       UNPCKHPS         xmmreg,xmmrm128          KATMAI,SSE 
-       UNPCKLPS         xmmreg,xmmrm128          KATMAI,SSE 
-       XORPS            xmmreg,xmmrm128          KATMAI,SSE
-
- F.1.4 Introduced in Deschutes but necessary for SSE support
-
-       FXRSTOR          mem                      P6,SSE,FPU 
-       FXRSTOR64        mem                      X86_64,LONG,SSE,FPU 
-       FXSAVE           mem                      P6,SSE,FPU 
-       FXSAVE64         mem                      X86_64,LONG,SSE,FPU
-
- F.1.5 XSAVE group (AVX and extended state)
-
-       XGETBV                                    NEHALEM 
-       XSETBV                                    NEHALEM,PRIV 
-       XSAVE            mem                      NEHALEM 
-       XSAVE64          mem                      LONG,NEHALEM 
-       XSAVEC           mem                       
-       XSAVEC64         mem                      LONG 
-       XSAVEOPT         mem                       
-       XSAVEOPT64       mem                      LONG 
-       XSAVES           mem                       
-       XSAVES64         mem                      LONG 
-       XRSTOR           mem                      NEHALEM 
-       XRSTOR64         mem                      LONG,NEHALEM 
-       XRSTORS          mem                       
-       XRSTORS64        mem                      LONG
-
- F.1.6 Generic memory operations
-
-       PREFETCHNTA      mem8                     KATMAI 
-       PREFETCHT0       mem8                     KATMAI 
-       PREFETCHT1       mem8                     KATMAI 
-       PREFETCHT2       mem8                     KATMAI 
-       PREFETCHIT0      mem8                     PREFETCHI 
-       PREFETCHIT1      mem8                     PREFETCHI 
-       SFENCE                                    KATMAI
-
- F.1.7 New MMX instructions introduced in Katmai
-
-       MASKMOVQ         mmxreg,mmxreg            KATMAI,MMX 
-       MOVNTQ           mem,mmxreg               KATMAI,MMX 
-       PAVGB            mmxreg,mmxrm             KATMAI,MMX 
-       PAVGW            mmxreg,mmxrm             KATMAI,MMX 
-       PEXTRW           reg32,mmxreg,imm         KATMAI,MMX 
-       PINSRW           mmxreg,mem,imm           KATMAI,MMX 
-       PINSRW           mmxreg,rm16,imm          KATMAI,MMX 
-       PINSRW           mmxreg,reg32,imm         KATMAI,MMX 
-       PMAXSW           mmxreg,mmxrm             KATMAI,MMX 
-       PMAXUB           mmxreg,mmxrm             KATMAI,MMX 
-       PMINSW           mmxreg,mmxrm             KATMAI,MMX 
-       PMINUB           mmxreg,mmxrm             KATMAI,MMX 
-       PMOVMSKB         reg32,mmxreg             KATMAI,MMX 
-       PMULHUW          mmxreg,mmxrm             KATMAI,MMX 
-       PSADBW           mmxreg,mmxrm             KATMAI,MMX 
-       PSHUFW           mmxreg,mmxrm,imm         KATMAI,MMX
-
- F.1.8 AMD Enhanced 3DNow! (Athlon) instructions
-
-       PF2IW            mmxreg,mmxrm             PENT,3DNOW 
-       PFNACC           mmxreg,mmxrm             PENT,3DNOW 
-       PFPNACC          mmxreg,mmxrm             PENT,3DNOW 
-       PI2FW            mmxreg,mmxrm             PENT,3DNOW 
-       PSWAPD           mmxreg,mmxrm             PENT,3DNOW
-
- F.1.9 Willamette SSE2 Cacheability Instructions
-
-       MASKMOVDQU       xmmreg,xmmreg            WILLAMETTE,SSE2 
-       CLFLUSH          mem                      WILLAMETTE,SSE2 
-       MOVNTDQ          mem,xmmreg               WILLAMETTE,SSE2,SO 
-       MOVNTI           mem,reg32                WILLAMETTE,SD 
-       MOVNTI           mem,reg64                X86_64,LONG 
-       MOVNTPD          mem,xmmreg               WILLAMETTE,SSE2,SO 
-       LFENCE                                    WILLAMETTE,SSE2 
-       MFENCE                                    WILLAMETTE,SSE2
-
-F.1.10 Willamette MMX instructions (SSE2 SIMD Integer Instructions)
-
-       MOVD             mem,xmmreg               WILLAMETTE,SSE2,SD 
-       MOVD             xmmreg,mem               WILLAMETTE,SSE2,SD 
-       MOVD             xmmreg,rm32              WILLAMETTE,SSE2 
-       MOVD             rm32,xmmreg              WILLAMETTE,SSE2 
-       MOVDQA           xmmreg,xmmrm128          WILLAMETTE,SSE2,SO 
-       MOVDQA           xmmrm128,xmmreg          WILLAMETTE,SSE2,SO 
-       MOVDQU           xmmreg,xmmrm128          WILLAMETTE,SSE2,SO 
-       MOVDQU           xmmrm128,xmmreg          WILLAMETTE,SSE2,SO 
-       MOVDQ2Q          mmxreg,xmmreg            WILLAMETTE,SSE2 
-       MOVQ             xmmreg,xmmreg            WILLAMETTE,SSE2 
-       MOVQ             xmmreg,xmmreg            WILLAMETTE,SSE2 
-       MOVQ             mem,xmmreg               WILLAMETTE,SSE2 
-       MOVQ             xmmreg,mem               WILLAMETTE,SSE2 
-       MOVQ             xmmreg,rm64              X86_64,LONG,SSE2 
-       MOVQ             rm64,xmmreg              X86_64,LONG,SSE2 
-       MOVQ2DQ          xmmreg,mmxreg            WILLAMETTE,SSE2 
-       PACKSSWB         xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PACKSSDW         xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PACKUSWB         xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PADDB            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PADDW            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PADDD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PADDQ            mmxreg,mmxrm             WILLAMETTE,MMX 
-       PADDQ            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PADDSB           xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PADDSW           xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PADDUSB          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PADDUSW          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PAND             xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PANDN            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PAVGB            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PAVGW            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PCMPEQB          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PCMPEQW          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PCMPEQD          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PCMPGTB          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PCMPGTW          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PCMPGTD          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PEXTRW           reg32,xmmreg,imm         WILLAMETTE,SSE2 
-       PEXTRW           reg64,xmmreg,imm         X86_64,LONG,SSE2,ND 
-       PINSRW           xmmreg,reg16,imm         WILLAMETTE,SSE2 
-       PINSRW           xmmreg,reg32,imm         WILLAMETTE,SSE2,ND 
-       PINSRW           xmmreg,reg64,imm         X86_64,LONG,SSE2,ND 
-       PINSRW           xmmreg,mem,imm           WILLAMETTE,SSE2 
-       PINSRW           xmmreg,mem16,imm         WILLAMETTE,SSE2 
-       PMADDWD          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PMAXSW           xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PMAXUB           xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PMINSW           xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PMINUB           xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PMOVMSKB         reg32,xmmreg             WILLAMETTE,SSE2 
-       PMULHUW          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PMULHW           xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PMULLW           xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PMULUDQ          mmxreg,mmxrm             WILLAMETTE,SSE2,SO 
-       PMULUDQ          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       POR              xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PSADBW           xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PSHUFD           xmmreg,xmmreg,imm        WILLAMETTE,SSE2 
-       PSHUFD           xmmreg,mem,imm           WILLAMETTE,SSE2 
-       PSHUFHW          xmmreg,xmmreg,imm        WILLAMETTE,SSE2 
-       PSHUFHW          xmmreg,mem,imm           WILLAMETTE,SSE2 
-       PSHUFLW          xmmreg,xmmreg,imm        WILLAMETTE,SSE2 
-       PSHUFLW          xmmreg,mem,imm           WILLAMETTE,SSE2 
-       PSLLDQ           xmmreg,imm               WILLAMETTE,SSE2,AR1 
-       PSLLW            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PSLLW            xmmreg,imm               WILLAMETTE,SSE2,AR1 
-       PSLLD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PSLLD            xmmreg,imm               WILLAMETTE,SSE2,AR1 
-       PSLLQ            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PSLLQ            xmmreg,imm               WILLAMETTE,SSE2,AR1 
-       PSRAW            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PSRAW            xmmreg,imm               WILLAMETTE,SSE2,AR1 
-       PSRAD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PSRAD            xmmreg,imm               WILLAMETTE,SSE2,AR1 
-       PSRLDQ           xmmreg,imm               WILLAMETTE,SSE2,AR1 
-       PSRLW            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PSRLW            xmmreg,imm               WILLAMETTE,SSE2,AR1 
-       PSRLD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PSRLD            xmmreg,imm               WILLAMETTE,SSE2,AR1 
-       PSRLQ            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PSRLQ            xmmreg,imm               WILLAMETTE,SSE2,AR1 
-       PSUBB            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PSUBW            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PSUBD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PSUBQ            mmxreg,mmxrm             WILLAMETTE,SSE2,SO 
-       PSUBQ            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PSUBSB           xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PSUBSW           xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PSUBUSB          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PSUBUSW          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PUNPCKHBW        xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PUNPCKHWD        xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PUNPCKHDQ        xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PUNPCKHQDQ       xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PUNPCKLBW        xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PUNPCKLWD        xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PUNPCKLDQ        xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PUNPCKLQDQ       xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       PXOR             xmmreg,xmmrm             WILLAMETTE,SSE2,SO
-
-F.1.11 Willamette Streaming SIMD instructions (SSE2)
-
-       ADDPD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       ADDSD            xmmreg,xmmrm             WILLAMETTE,SSE2 
-       ANDNPD           xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       ANDPD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       CMPEQPD          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       CMPEQSD          xmmreg,xmmrm             WILLAMETTE,SSE2 
-       CMPLEPD          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       CMPLESD          xmmreg,xmmrm             WILLAMETTE,SSE2 
-       CMPLTPD          xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       CMPLTSD          xmmreg,xmmrm             WILLAMETTE,SSE2 
-       CMPNEQPD         xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       CMPNEQSD         xmmreg,xmmrm             WILLAMETTE,SSE2 
-       CMPNLEPD         xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       CMPNLESD         xmmreg,xmmrm             WILLAMETTE,SSE2 
-       CMPNLTPD         xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       CMPNLTSD         xmmreg,xmmrm             WILLAMETTE,SSE2 
-       CMPORDPD         xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       CMPORDSD         xmmreg,xmmrm             WILLAMETTE,SSE2 
-       CMPUNORDPD       xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       CMPUNORDSD       xmmreg,xmmrm             WILLAMETTE,SSE2 
-       CMPPD            xmmreg,xmmrm128,imm8     WILLAMETTE,SSE2 
-       CMPSD            xmmreg,xmmrm128,imm8     WILLAMETTE,SSE2 
-       COMISD           xmmreg,xmmrm64           WILLAMETTE,SSE2 
-       CVTDQ2PD         xmmreg,xmmrm             WILLAMETTE,SSE2 
-       CVTDQ2PS         xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       CVTPD2DQ         xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       CVTPD2PI         mmxreg,xmmrm             WILLAMETTE,SSE2,SO 
-       CVTPD2PS         xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       CVTPI2PD         xmmreg,mmxrm             WILLAMETTE,SSE2 
-       CVTPS2DQ         xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       CVTPS2PD         xmmreg,xmmrm             WILLAMETTE,SSE2 
-       CVTSD2SI         reg32,xmmreg             WILLAMETTE,SSE2,AR1 
-       CVTSD2SI         reg32,mem                WILLAMETTE,SSE2,AR1 
-       CVTSD2SI         reg64,xmmreg             X86_64,LONG,SSE2,AR1 
-       CVTSD2SI         reg64,mem                X86_64,LONG,SSE2,AR1 
-       CVTSD2SS         xmmreg,xmmrm             WILLAMETTE,SSE2 
-       CVTSI2SD         xmmreg,mem               WILLAMETTE,SSE2,SD,AR1,ND 
-       CVTSI2SD         xmmreg,rm32              WILLAMETTE,SSE2,SD,AR1 
-       CVTSI2SD         xmmreg,rm64              X86_64,LONG,SSE2,AR1 
-       CVTSS2SD         xmmreg,xmmrm             WILLAMETTE,SSE2,SD 
-       CVTTPD2PI        mmxreg,xmmrm             WILLAMETTE,SSE2,SO 
-       CVTTPD2DQ        xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       CVTTPS2DQ        xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       CVTTSD2SI        reg32,xmmreg             WILLAMETTE,SSE2,AR1 
-       CVTTSD2SI        reg32,mem                WILLAMETTE,SSE2,AR1 
-       CVTTSD2SI        reg64,xmmreg             X86_64,LONG,SSE2,AR1 
-       CVTTSD2SI        reg64,mem                X86_64,LONG,SSE2,AR1 
-       DIVPD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       DIVSD            xmmreg,xmmrm             WILLAMETTE,SSE2 
-       MAXPD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       MAXSD            xmmreg,xmmrm             WILLAMETTE,SSE2 
-       MINPD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO 
-       MINSD            xmmreg,xmmrm             WILLAMETTE,SSE2 
-       MOVAPD           xmmreg,xmmrm128          WILLAMETTE,SSE2 
-       MOVAPD           xmmrm128,xmmreg          WILLAMETTE,SSE2 
-       MOVHPD           mem64,xmmreg             WILLAMETTE,SSE2 
-       MOVHPD           xmmreg,mem64             WILLAMETTE,SSE2 
-       MOVLPD           mem64,xmmreg             WILLAMETTE,SSE2 
-       MOVLPD           xmmreg,mem64             WILLAMETTE,SSE2 
-       MOVMSKPD         reg32,xmmreg             WILLAMETTE,SSE2 
-       MOVMSKPD         reg64,xmmreg             X86_64,LONG,SSE2 
-       MOVSD            xmmreg,xmmrm64           WILLAMETTE,SSE2 
-       MOVSD            xmmrm64,xmmreg           WILLAMETTE,SSE2 
-       MOVUPD           xmmreg,xmmrm128          WILLAMETTE,SSE2 
-       MOVUPD           xmmrm128,xmmreg          WILLAMETTE,SSE2 
-       MULPD            xmmreg,xmmrm128          WILLAMETTE,SSE2,SO 
-       MULSD            xmmreg,xmmrm64           WILLAMETTE,SSE2 
-       ORPD             xmmreg,xmmrm128          WILLAMETTE,SSE2,SO 
-       SHUFPD           xmmreg,xmmrm128,imm8     WILLAMETTE,SSE2 
-       SQRTPD           xmmreg,xmmrm128          WILLAMETTE,SSE2,SO 
-       SQRTSD           xmmreg,xmmrm64           WILLAMETTE,SSE2 
-       SUBPD            xmmreg,xmmrm128          WILLAMETTE,SSE2,SO 
-       SUBSD            xmmreg,xmmrm64           WILLAMETTE,SSE2 
-       UCOMISD          xmmreg,xmmrm64           WILLAMETTE,SSE2 
-       UNPCKHPD         xmmreg,xmmrm128          WILLAMETTE,SSE2 
-       UNPCKLPD         xmmreg,xmmrm128          WILLAMETTE,SSE2 
-       XORPD            xmmreg,xmmrm128          WILLAMETTE,SSE2
-
-F.1.12 Prescott New Instructions (SSE3)
-
-       ADDSUBPD         xmmreg,xmmrm128          PRESCOTT,SSE3,SO 
-       ADDSUBPS         xmmreg,xmmrm128          PRESCOTT,SSE3,SO 
-       HADDPD           xmmreg,xmmrm128          PRESCOTT,SSE3,SO 
-       HADDPS           xmmreg,xmmrm128          PRESCOTT,SSE3,SO 
-       HSUBPD           xmmreg,xmmrm128          PRESCOTT,SSE3,SO 
-       HSUBPS           xmmreg,xmmrm128          PRESCOTT,SSE3,SO 
-       LDDQU            xmmreg,mem128            PRESCOTT,SSE3,SO 
-       MOVDDUP          xmmreg,xmmrm64           PRESCOTT,SSE3 
-       MOVSHDUP         xmmreg,xmmrm128          PRESCOTT,SSE3 
-       MOVSLDUP         xmmreg,xmmrm128          PRESCOTT,SSE3
-
-F.1.13 VMX/SVM Instructions
-
-       CLGI                                      VMX,AMD 
-       STGI                                      VMX,AMD 
-       VMCALL                                    VMX 
-       VMCLEAR          mem                      VMX 
-       VMFUNC                                    VMX 
-       VMLAUNCH                                  VMX 
-       VMLOAD                                    VMX,AMD 
-       VMMCALL                                   VMX,AMD 
-       VMPTRLD          mem                      VMX 
-       VMPTRST          mem                      VMX 
-       VMREAD           rm32,reg32               VMX,NOLONG,SD 
-       VMREAD           rm64,reg64               X86_64,LONG,VMX 
-       VMRESUME                                  VMX 
-       VMRUN                                     VMX,AMD 
-       VMSAVE                                    VMX,AMD 
-       VMWRITE          reg32,rm32               VMX,NOLONG,SD 
-       VMWRITE          reg64,rm64               X86_64,LONG,VMX 
-       VMXOFF                                    VMX 
-       VMXON            mem                      VMX
-
-F.1.14 Extended Page Tables VMX instructions
-
-       INVEPT           reg32,mem                VMX,SO,NOLONG 
-       INVEPT           reg64,mem                VMX,SO,LONG 
-       INVVPID          reg32,mem                VMX,SO,NOLONG 
-       INVVPID          reg64,mem                VMX,SO,LONG
-
-F.1.15 SEV-SNP AMD instructions
-
-       PVALIDATE                                 VMX,AMD 
-       RMPADJUST                                 VMX,AMD 
-       VMGEXIT                                   VMX,AMD 
-       VMGEXIT                                   VMX,AMD
-
-F.1.16 Tejas New Instructions (SSSE3)
-
-       PABSB            mmxreg,mmxrm             SSSE3,MMX 
-       PABSB            xmmreg,xmmrm128          SSSE3 
-       PABSW            mmxreg,mmxrm             SSSE3,MMX 
-       PABSW            xmmreg,xmmrm128          SSSE3 
-       PABSD            mmxreg,mmxrm             SSSE3,MMX 
-       PABSD            xmmreg,xmmrm128          SSSE3 
-       PALIGNR          mmxreg,mmxrm,imm         SSSE3,MMX 
-       PALIGNR          xmmreg,xmmrm,imm         SSSE3 
-       PHADDW           mmxreg,mmxrm             SSSE3,MMX 
-       PHADDW           xmmreg,xmmrm128          SSSE3 
-       PHADDD           mmxreg,mmxrm             SSSE3,MMX 
-       PHADDD           xmmreg,xmmrm128          SSSE3 
-       PHADDSW          mmxreg,mmxrm             SSSE3,MMX 
-       PHADDSW          xmmreg,xmmrm128          SSSE3 
-       PHSUBW           mmxreg,mmxrm             SSSE3,MMX 
-       PHSUBW           xmmreg,xmmrm128          SSSE3 
-       PHSUBD           mmxreg,mmxrm             SSSE3,MMX 
-       PHSUBD           xmmreg,xmmrm128          SSSE3 
-       PHSUBSW          mmxreg,mmxrm             SSSE3,MMX 
-       PHSUBSW          xmmreg,xmmrm128          SSSE3 
-       PMADDUBSW        mmxreg,mmxrm             SSSE3,MMX 
-       PMADDUBSW        xmmreg,xmmrm128          SSSE3 
-       PMULHRSW         mmxreg,mmxrm             SSSE3,MMX 
-       PMULHRSW         xmmreg,xmmrm128          SSSE3 
-       PSHUFB           mmxreg,mmxrm             SSSE3,MMX 
-       PSHUFB           xmmreg,xmmrm128          SSSE3 
-       PSIGNB           mmxreg,mmxrm             SSSE3,MMX 
-       PSIGNB           xmmreg,xmmrm128          SSSE3 
-       PSIGNW           mmxreg,mmxrm             SSSE3,MMX 
-       PSIGNW           xmmreg,xmmrm128          SSSE3 
-       PSIGND           mmxreg,mmxrm             SSSE3,MMX 
-       PSIGND           xmmreg,xmmrm128          SSSE3
-
-F.1.17 AMD SSE4A
-
-       EXTRQ            xmmreg,imm,imm           SSE4A,AMD 
-       EXTRQ            xmmreg,xmmreg            SSE4A,AMD 
-       INSERTQ          xmmreg,xmmreg,imm,imm    SSE4A,AMD 
-       INSERTQ          xmmreg,xmmreg            SSE4A,AMD 
-       MOVNTSD          mem64,xmmreg             SSE4A,AMD 
-       MOVNTSS          mem32,xmmreg             SSE4A,AMD,SD
-
-F.1.18 New instructions in Barcelona
-
-       LZCNT            reg16,rm16               P6,AMD 
-       LZCNT            reg32,rm32               P6,AMD 
-       LZCNT            reg64,rm64               X86_64,LONG,AMD
-
-F.1.19 Penryn New Instructions (SSE4.1)
-
-       BLENDPD          xmmreg,xmmrm128,imm8     SSE41 
-       BLENDPS          xmmreg,xmmrm128,imm8     SSE41 
-       BLENDVPD         xmmreg,xmmrm128,xmm0     SSE41 
-       BLENDVPD         xmmreg,xmmrm128          SSE41 
-       BLENDVPS         xmmreg,xmmrm128,xmm0     SSE41 
-       BLENDVPS         xmmreg,xmmrm128          SSE41 
-       DPPD             xmmreg,xmmrm128,imm8     SSE41 
-       DPPS             xmmreg,xmmrm128,imm8     SSE41 
-       EXTRACTPS        rm32,xmmreg,imm8         SSE41 
-       EXTRACTPS        reg64,xmmreg,imm8        SSE41,X86_64,LONG 
-       INSERTPS         xmmreg,xmmrm32,imm8      SSE41 
-       MOVNTDQA         xmmreg,mem128            SSE41 
-       MPSADBW          xmmreg,xmmrm128,imm8     SSE41 
-       PACKUSDW         xmmreg,xmmrm128          SSE41 
-       PBLENDVB         xmmreg,xmmrm,xmm0        SSE41 
-       PBLENDVB         xmmreg,xmmrm128          SSE41 
-       PBLENDW          xmmreg,xmmrm128,imm8     SSE41 
-       PCMPEQQ          xmmreg,xmmrm128          SSE41 
-       PEXTRB           reg32,xmmreg,imm8        SSE41 
-       PEXTRB           mem8,xmmreg,imm8         SSE41 
-       PEXTRB           reg64,xmmreg,imm8        SSE41,X86_64,LONG 
-       PEXTRD           rm32,xmmreg,imm8         SSE41 
-       PEXTRQ           rm64,xmmreg,imm8         SSE41,X86_64,LONG 
-       PEXTRW           reg32,xmmreg,imm8        SSE41 
-       PEXTRW           mem16,xmmreg,imm8        SSE41 
-       PEXTRW           reg64,xmmreg,imm8        SSE41,X86_64,LONG 
-       PHMINPOSUW       xmmreg,xmmrm128          SSE41 
-       PINSRB           xmmreg,mem,imm8          SSE41 
-       PINSRB           xmmreg,rm8,imm8          SSE41 
-       PINSRB           xmmreg,reg32,imm8        SSE41 
-       PINSRD           xmmreg,rm32,imm8         SSE41 
-       PINSRQ           xmmreg,rm64,imm8         SSE41,X86_64,LONG 
-       PMAXSB           xmmreg,xmmrm128          SSE41 
-       PMAXSD           xmmreg,xmmrm128          SSE41 
-       PMAXUD           xmmreg,xmmrm128          SSE41 
-       PMAXUW           xmmreg,xmmrm128          SSE41 
-       PMINSB           xmmreg,xmmrm128          SSE41 
-       PMINSD           xmmreg,xmmrm128          SSE41 
-       PMINUD           xmmreg,xmmrm128          SSE41 
-       PMINUW           xmmreg,xmmrm128          SSE41 
-       PMOVSXBW         xmmreg,xmmrm64           SSE41 
-       PMOVSXBD         xmmreg,xmmrm32           SSE41,SD 
-       PMOVSXBQ         xmmreg,xmmrm16           SSE41,SW 
-       PMOVSXWD         xmmreg,xmmrm64           SSE41 
-       PMOVSXWQ         xmmreg,xmmrm32           SSE41,SD 
-       PMOVSXDQ         xmmreg,xmmrm64           SSE41 
-       PMOVZXBW         xmmreg,xmmrm64           SSE41 
-       PMOVZXBD         xmmreg,xmmrm32           SSE41,SD 
-       PMOVZXBQ         xmmreg,xmmrm16           SSE41,SW 
-       PMOVZXWD         xmmreg,xmmrm64           SSE41 
-       PMOVZXWQ         xmmreg,xmmrm32           SSE41,SD 
-       PMOVZXDQ         xmmreg,xmmrm64           SSE41 
-       PMULDQ           xmmreg,xmmrm128          SSE41 
-       PMULLD           xmmreg,xmmrm128          SSE41 
-       PTEST            xmmreg,xmmrm128          SSE41 
-       ROUNDPD          xmmreg,xmmrm128,imm8     SSE41 
-       ROUNDPS          xmmreg,xmmrm128,imm8     SSE41 
-       ROUNDSD          xmmreg,xmmrm64,imm8      SSE41 
-       ROUNDSS          xmmreg,xmmrm32,imm8      SSE41
-
-F.1.20 Nehalem New Instructions (SSE4.2)
-
-       CRC32            reg32,rm8                SSE42 
-       CRC32            reg32,rm16               SSE42 
-       CRC32            reg32,rm32               SSE42 
-       CRC32            reg64,rm8                SSE42,X86_64,LONG 
-       CRC32            reg64,rm64               SSE42,X86_64,LONG 
-       PCMPESTRI        xmmreg,xmmrm128,imm8     SSE42 
-       PCMPESTRM        xmmreg,xmmrm128,imm8     SSE42 
-       PCMPISTRI        xmmreg,xmmrm128,imm8     SSE42 
-       PCMPISTRM        xmmreg,xmmrm128,imm8     SSE42 
-       PCMPGTQ          xmmreg,xmmrm128          SSE42 
-       POPCNT           reg16,rm16               NEHALEM,SW 
-       POPCNT           reg32,rm32               NEHALEM,SD 
-       POPCNT           reg64,rm64               NEHALEM,LONG
-
-F.1.21 Intel SMX
-
-       GETSEC                                    KATMAI
-
-F.1.22 Geode (Cyrix) 3DNow! additions
-
-       PFRCPV           mmxreg,mmxrm             PENT,3DNOW,CYRIX 
-       PFRSQRTV         mmxreg,mmxrm             PENT,3DNOW,CYRIX
-
-F.1.23 Intel new instructions in ???
-
-       MOVBE            reg16,mem16              NEHALEM 
-       MOVBE            reg32,mem32              NEHALEM 
-       MOVBE            reg64,mem64              NEHALEM 
-       MOVBE            mem16,reg16              NEHALEM 
-       MOVBE            mem32,reg32              NEHALEM 
-       MOVBE            mem64,reg64              NEHALEM
-
-F.1.24 Intel AES instructions
-
-       AESENC           xmmreg,xmmrm128          SSE,WESTMERE 
-       AESENCLAST       xmmreg,xmmrm128          SSE,WESTMERE 
-       AESDEC           xmmreg,xmmrm128          SSE,WESTMERE 
-       AESDECLAST       xmmreg,xmmrm128          SSE,WESTMERE 
-       AESIMC           xmmreg,xmmrm128          SSE,WESTMERE 
-       AESKEYGENASSIST  xmmreg,xmmrm128,imm8     SSE,WESTMERE
-
-F.1.25 Intel AVX AES instructions
-
-       VAESENC          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VAESENCLAST      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VAESDEC          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VAESDECLAST      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VAESIMC          xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-       VAESKEYGENASSIST xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE
-
-F.1.26 Intel instruction extension based on pub number 319433-030 dated October 2017
-
-       VAESENC          ymmreg,ymmreg*,ymmrm256  VAES 
-       VAESENCLAST      ymmreg,ymmreg*,ymmrm256  VAES 
-       VAESDEC          ymmreg,ymmreg*,ymmrm256  VAES 
-       VAESDECLAST      ymmreg,ymmreg*,ymmrm256  VAES 
-       VAESENC          xmmreg,xmmreg*,xmmrm128  AVX512VL,VAES 
-       VAESENC          ymmreg,ymmreg*,ymmrm256  AVX512VL,VAES 
-       VAESENCLAST      xmmreg,xmmreg*,xmmrm128  AVX512VL,VAES 
-       VAESENCLAST      ymmreg,ymmreg*,ymmrm256  AVX512VL,VAES 
-       VAESDEC          xmmreg,xmmreg*,xmmrm128  AVX512VL,VAES 
-       VAESDEC          ymmreg,ymmreg*,ymmrm256  AVX512VL,VAES 
-       VAESDECLAST      xmmreg,xmmreg*,xmmrm128  AVX512VL,VAES 
-       VAESDECLAST      ymmreg,ymmreg*,ymmrm256  AVX512VL,VAES 
-       VAESENC          zmmreg,zmmreg*,zmmrm512  AVX512,VAES 
-       VAESENCLAST      zmmreg,zmmreg*,zmmrm512  AVX512,VAES 
-       VAESDEC          zmmreg,zmmreg*,zmmrm512  AVX512,VAES 
-       VAESDECLAST      zmmreg,zmmreg*,zmmrm512  AVX512,VAES
-
-F.1.27 Intel AVX instructions
-
-       VADDPD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VADDPD           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VADDPS           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VADDPS           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VADDSD           xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VADDSS           xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE 
-       VADDSUBPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VADDSUBPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VADDSUBPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VADDSUBPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VANDPD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VANDPD           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VANDPS           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VANDPS           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VANDNPD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VANDNPD          ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VANDNPS          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VANDNPS          ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VBLENDPD         xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-       VBLENDPD         ymmreg,ymmreg*,ymmrm256,imm8 AVX,SANDYBRIDGE 
-       VBLENDPS         xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-       VBLENDPS         ymmreg,ymmreg*,ymmrm256,imm8 AVX,SANDYBRIDGE 
-       VBLENDVPD        xmmreg,xmmreg*,xmmrm128,xmmreg AVX,SANDYBRIDGE 
-       VBLENDVPD        ymmreg,ymmreg*,ymmrm256,ymmreg AVX,SANDYBRIDGE 
-       VBLENDVPS        xmmreg,xmmreg*,xmmrm128,xmmreg AVX,SANDYBRIDGE 
-       VBLENDVPS        ymmreg,ymmreg*,ymmrm256,ymmreg AVX,SANDYBRIDGE 
-       VBROADCASTSS     xmmreg,mem32             AVX,SANDYBRIDGE 
-       VBROADCASTSS     ymmreg,mem32             AVX,SANDYBRIDGE 
-       VBROADCASTSD     ymmreg,mem64             AVX,SANDYBRIDGE 
-       VBROADCASTF128   ymmreg,mem128            AVX,SANDYBRIDGE 
-       VCMPEQ_OSPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPEQ_OSPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPEQPD         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPEQPD         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPLT_OSPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPLT_OSPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPLTPD         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPLTPD         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPLE_OSPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPLE_OSPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPLEPD         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPLEPD         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPUNORD_QPD    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPUNORD_QPD    ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPUNORDPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPUNORDPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNEQ_UQPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNEQ_UQPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNEQPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNEQPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNLT_USPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNLT_USPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNLTPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNLTPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNLE_USPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNLE_USPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNLEPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNLEPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPORD_QPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPORD_QPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPORDPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPORDPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPEQ_UQPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPEQ_UQPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNGE_USPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNGE_USPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNGEPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNGEPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNGT_USPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNGT_USPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNGTPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNGTPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPFALSE_OQPD   xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPFALSE_OQPD   ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPFALSEPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPFALSEPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNEQ_OQPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNEQ_OQPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPGE_OSPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPGE_OSPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPGEPD         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPGEPD         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPGT_OSPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPGT_OSPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPGTPD         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPGTPD         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPTRUE_UQPD    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPTRUE_UQPD    ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPTRUEPD       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPTRUEPD       ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPEQ_OSPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPEQ_OSPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPLT_OQPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPLT_OQPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPLE_OQPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPLE_OQPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPUNORD_SPD    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPUNORD_SPD    ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNEQ_USPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNEQ_USPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNLT_UQPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNLT_UQPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNLE_UQPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNLE_UQPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPORD_SPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPORD_SPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPEQ_USPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPEQ_USPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNGE_UQPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNGE_UQPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNGT_UQPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNGT_UQPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPFALSE_OSPD   xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPFALSE_OSPD   ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNEQ_OSPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNEQ_OSPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPGE_OQPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPGE_OQPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPGT_OQPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPGT_OQPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPTRUE_USPD    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPTRUE_USPD    ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPPD           xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-       VCMPPD           ymmreg,ymmreg*,ymmrm256,imm8 AVX,SANDYBRIDGE 
-       VCMPEQ_OSPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPEQ_OSPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPEQPS         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPEQPS         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPLT_OSPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPLT_OSPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPLTPS         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPLTPS         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPLE_OSPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPLE_OSPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPLEPS         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPLEPS         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPUNORD_QPS    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPUNORD_QPS    ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPUNORDPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPUNORDPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNEQ_UQPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNEQ_UQPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNEQPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNEQPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNLT_USPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNLT_USPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNLTPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNLTPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNLE_USPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNLE_USPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNLEPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNLEPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPORD_QPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPORD_QPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPORDPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPORDPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPEQ_UQPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPEQ_UQPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNGE_USPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNGE_USPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNGEPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNGEPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNGT_USPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNGT_USPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNGTPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNGTPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPFALSE_OQPS   xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPFALSE_OQPS   ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPFALSEPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPFALSEPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNEQ_OQPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNEQ_OQPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPGE_OSPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPGE_OSPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPGEPS         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPGEPS         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPGT_OSPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPGT_OSPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPGTPS         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPGTPS         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPTRUE_UQPS    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPTRUE_UQPS    ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPTRUEPS       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPTRUEPS       ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPEQ_OSPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPEQ_OSPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPLT_OQPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPLT_OQPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPLE_OQPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPLE_OQPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPUNORD_SPS    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPUNORD_SPS    ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNEQ_USPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNEQ_USPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNLT_UQPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNLT_UQPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNLE_UQPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNLE_UQPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPORD_SPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPORD_SPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPEQ_USPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPEQ_USPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNGE_UQPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNGE_UQPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNGT_UQPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNGT_UQPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPFALSE_OSPS   xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPFALSE_OSPS   ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPNEQ_OSPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPNEQ_OSPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPGE_OQPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPGE_OQPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPGT_OQPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPGT_OQPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPTRUE_USPS    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VCMPTRUE_USPS    ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VCMPPS           xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-       VCMPPS           ymmreg,ymmreg*,ymmrm256,imm8 AVX,SANDYBRIDGE 
-       VCMPEQ_OSSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPEQSD         xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPLT_OSSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPLTSD         xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPLE_OSSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPLESD         xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPUNORD_QSD    xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPUNORDSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNEQ_UQSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNEQSD        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNLT_USSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNLTSD        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNLE_USSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNLESD        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPORD_QSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPORDSD        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPEQ_UQSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNGE_USSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNGESD        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNGT_USSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNGTSD        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPFALSE_OQSD   xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPFALSESD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNEQ_OQSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPGE_OSSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPGESD         xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPGT_OSSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPGTSD         xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPTRUE_UQSD    xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPTRUESD       xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPEQ_OSSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPLT_OQSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPLE_OQSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPUNORD_SSD    xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNEQ_USSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNLT_UQSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNLE_UQSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPORD_SSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPEQ_USSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNGE_UQSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNGT_UQSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPFALSE_OSSD   xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNEQ_OSSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPGE_OQSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPGT_OQSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPTRUE_USSD    xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPSD           xmmreg,xmmreg*,xmmrm64,imm8 AVX,SANDYBRIDGE 
-       VCMPEQ_OSSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPEQSS         xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPLT_OSSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPLTSS         xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPLE_OSSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPLESS         xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPUNORD_QSS    xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPUNORDSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNEQ_UQSS     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNEQSS        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNLT_USSS     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNLTSS        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNLE_USSS     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNLESS        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPORD_QSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPORDSS        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPEQ_UQSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNGE_USSS     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNGESS        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNGT_USSS     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNGTSS        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPFALSE_OQSS   xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPFALSESS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNEQ_OQSS     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPGE_OSSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPGESS         xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPGT_OSSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPGTSS         xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPTRUE_UQSS    xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPTRUESS       xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPEQ_OSSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPLT_OQSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPLE_OQSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPUNORD_SSS    xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNEQ_USSS     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNLT_UQSS     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNLE_UQSS     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPORD_SSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPEQ_USSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNGE_UQSS     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNGT_UQSS     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPFALSE_OSSS   xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPNEQ_OSSS     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPGE_OQSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPGT_OQSS      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPTRUE_USSS    xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCMPSS           xmmreg,xmmreg*,xmmrm64,imm8 AVX,SANDYBRIDGE 
-       VCOMISD          xmmreg,xmmrm64           AVX,SANDYBRIDGE 
-       VCOMISS          xmmreg,xmmrm32           AVX,SANDYBRIDGE 
-       VCVTDQ2PD        xmmreg,xmmrm64           AVX,SANDYBRIDGE 
-       VCVTDQ2PD        ymmreg,xmmrm128          AVX,SANDYBRIDGE 
-       VCVTDQ2PS        xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-       VCVTDQ2PS        ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-       VCVTPD2DQ        xmmreg,xmmreg            AVX,SANDYBRIDGE 
-       VCVTPD2DQ        xmmreg,mem128            AVX,SANDYBRIDGE,SO 
-       VCVTPD2DQ        xmmreg,ymmreg            AVX,SANDYBRIDGE 
-       VCVTPD2DQ        xmmreg,mem256            AVX,SANDYBRIDGE,SY 
-       VCVTPD2PS        xmmreg,xmmreg            AVX,SANDYBRIDGE 
-       VCVTPD2PS        xmmreg,mem128            AVX,SANDYBRIDGE,SO 
-       VCVTPD2PS        xmmreg,ymmreg            AVX,SANDYBRIDGE 
-       VCVTPD2PS        xmmreg,mem256            AVX,SANDYBRIDGE,SY 
-       VCVTPS2DQ        xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-       VCVTPS2DQ        ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-       VCVTPS2PD        xmmreg,xmmrm64           AVX,SANDYBRIDGE 
-       VCVTPS2PD        ymmreg,xmmrm128          AVX,SANDYBRIDGE 
-       VCVTSD2SI        reg32,xmmrm64            AVX,SANDYBRIDGE 
-       VCVTSD2SI        reg64,xmmrm64            AVX,SANDYBRIDGE,LONG 
-       VCVTSD2SS        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VCVTSI2SD        xmmreg,xmmreg*,rm32      AVX,SANDYBRIDGE,SD 
-       VCVTSI2SD        xmmreg,xmmreg*,mem32     AVX,SANDYBRIDGE,ND,SD 
-       VCVTSI2SD        xmmreg,xmmreg*,rm64      AVX,SANDYBRIDGE,LONG 
-       VCVTSI2SS        xmmreg,xmmreg*,rm32      AVX,SANDYBRIDGE,SD 
-       VCVTSI2SS        xmmreg,xmmreg*,mem32     AVX,SANDYBRIDGE,ND,SD 
-       VCVTSI2SS        xmmreg,xmmreg*,rm64      AVX,SANDYBRIDGE,LONG 
-       VCVTSS2SD        xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE 
-       VCVTSS2SI        reg32,xmmrm32            AVX,SANDYBRIDGE 
-       VCVTSS2SI        reg64,xmmrm32            AVX,SANDYBRIDGE,LONG 
-       VCVTTPD2DQ       xmmreg,xmmreg            AVX,SANDYBRIDGE 
-       VCVTTPD2DQ       xmmreg,mem128            AVX,SANDYBRIDGE,SO 
-       VCVTTPD2DQ       xmmreg,ymmreg            AVX,SANDYBRIDGE 
-       VCVTTPD2DQ       xmmreg,mem256            AVX,SANDYBRIDGE,SY 
-       VCVTTPS2DQ       xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-       VCVTTPS2DQ       ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-       VCVTTSD2SI       reg32,xmmrm64            AVX,SANDYBRIDGE 
-       VCVTTSD2SI       reg64,xmmrm64            AVX,SANDYBRIDGE,LONG 
-       VCVTTSS2SI       reg32,xmmrm32            AVX,SANDYBRIDGE 
-       VCVTTSS2SI       reg64,xmmrm32            AVX,SANDYBRIDGE,LONG 
-       VDIVPD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VDIVPD           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VDIVPS           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VDIVPS           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VDIVSD           xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VDIVSS           xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE 
-       VDPPD            xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-       VDPPS            xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-       VDPPS            ymmreg,ymmreg*,ymmrm256,imm8 AVX,SANDYBRIDGE 
-       VEXTRACTF128     xmmrm128,ymmreg,imm8     AVX,SANDYBRIDGE 
-       VEXTRACTPS       rm32,xmmreg,imm8         AVX,SANDYBRIDGE 
-       VHADDPD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VHADDPD          ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VHADDPS          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VHADDPS          ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VHSUBPD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VHSUBPD          ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VHSUBPS          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VHSUBPS          ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VINSERTF128      ymmreg,ymmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-       VINSERTPS        xmmreg,xmmreg*,xmmrm32,imm8 AVX,SANDYBRIDGE 
-       VLDDQU           xmmreg,mem128            AVX,SANDYBRIDGE 
-       VLDQQU           ymmreg,mem256            AVX,SANDYBRIDGE 
-       VLDDQU           ymmreg,mem256            AVX,SANDYBRIDGE 
-       VLDMXCSR         mem32                    AVX,SANDYBRIDGE 
-       VMASKMOVDQU      xmmreg,xmmreg            AVX,SANDYBRIDGE 
-       VMASKMOVPS       xmmreg,xmmreg,mem128     AVX,SANDYBRIDGE 
-       VMASKMOVPS       ymmreg,ymmreg,mem256     AVX,SANDYBRIDGE 
-       VMASKMOVPS       mem128,xmmreg,xmmreg     AVX,SANDYBRIDGE,SO 
-       VMASKMOVPS       mem256,ymmreg,ymmreg     AVX,SANDYBRIDGE,SY 
-       VMASKMOVPD       xmmreg,xmmreg,mem128     AVX,SANDYBRIDGE 
-       VMASKMOVPD       ymmreg,ymmreg,mem256     AVX,SANDYBRIDGE 
-       VMASKMOVPD       mem128,xmmreg,xmmreg     AVX,SANDYBRIDGE 
-       VMASKMOVPD       mem256,ymmreg,ymmreg     AVX,SANDYBRIDGE 
-       VMAXPD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VMAXPD           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VMAXPS           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VMAXPS           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VMAXSD           xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VMAXSS           xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE 
-       VMINPD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VMINPD           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VMINPS           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VMINPS           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VMINSD           xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VMINSS           xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE 
-       VMOVAPD          xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-       VMOVAPD          xmmrm128,xmmreg          AVX,SANDYBRIDGE 
-       VMOVAPD          ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-       VMOVAPD          ymmrm256,ymmreg          AVX,SANDYBRIDGE 
-       VMOVAPS          xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-       VMOVAPS          xmmrm128,xmmreg          AVX,SANDYBRIDGE 
-       VMOVAPS          ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-       VMOVAPS          ymmrm256,ymmreg          AVX,SANDYBRIDGE 
-       VMOVD            xmmreg,rm32              AVX,SANDYBRIDGE 
-       VMOVD            rm32,xmmreg              AVX,SANDYBRIDGE 
-       VMOVQ            xmmreg,xmmrm64           AVX,SANDYBRIDGE 
-       VMOVQ            xmmrm64,xmmreg           AVX,SANDYBRIDGE 
-       VMOVQ            xmmreg,rm64              AVX,SANDYBRIDGE,LONG 
-       VMOVQ            rm64,xmmreg              AVX,SANDYBRIDGE,LONG 
-       VMOVDDUP         xmmreg,xmmrm64           AVX,SANDYBRIDGE 
-       VMOVDDUP         ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-       VMOVDQA          xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-       VMOVDQA          xmmrm128,xmmreg          AVX,SANDYBRIDGE 
-       VMOVQQA          ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-       VMOVQQA          ymmrm256,ymmreg          AVX,SANDYBRIDGE 
-       VMOVDQA          ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-       VMOVDQA          ymmrm256,ymmreg          AVX,SANDYBRIDGE 
-       VMOVDQU          xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-       VMOVDQU          xmmrm128,xmmreg          AVX,SANDYBRIDGE 
-       VMOVQQU          ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-       VMOVQQU          ymmrm256,ymmreg          AVX,SANDYBRIDGE 
-       VMOVDQU          ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-       VMOVDQU          ymmrm256,ymmreg          AVX,SANDYBRIDGE 
-       VMOVHLPS         xmmreg,xmmreg*,xmmreg    AVX,SANDYBRIDGE 
-       VMOVHPD          xmmreg,xmmreg*,mem64     AVX,SANDYBRIDGE 
-       VMOVHPD          mem64,xmmreg             AVX,SANDYBRIDGE 
-       VMOVHPS          xmmreg,xmmreg*,mem64     AVX,SANDYBRIDGE 
-       VMOVHPS          mem64,xmmreg             AVX,SANDYBRIDGE 
-       VMOVLHPS         xmmreg,xmmreg*,xmmreg    AVX,SANDYBRIDGE 
-       VMOVLPD          xmmreg,xmmreg*,mem64     AVX,SANDYBRIDGE 
-       VMOVLPD          mem64,xmmreg             AVX,SANDYBRIDGE 
-       VMOVLPS          xmmreg,xmmreg*,mem64     AVX,SANDYBRIDGE 
-       VMOVLPS          mem64,xmmreg             AVX,SANDYBRIDGE 
-       VMOVMSKPD        reg64,xmmreg             AVX,SANDYBRIDGE,LONG 
-       VMOVMSKPD        reg32,xmmreg             AVX,SANDYBRIDGE 
-       VMOVMSKPD        reg64,ymmreg             AVX,SANDYBRIDGE,LONG 
-       VMOVMSKPD        reg32,ymmreg             AVX,SANDYBRIDGE 
-       VMOVMSKPS        reg64,xmmreg             AVX,SANDYBRIDGE,LONG 
-       VMOVMSKPS        reg32,xmmreg             AVX,SANDYBRIDGE 
-       VMOVMSKPS        reg64,ymmreg             AVX,SANDYBRIDGE,LONG 
-       VMOVMSKPS        reg32,ymmreg             AVX,SANDYBRIDGE 
-       VMOVNTDQ         mem128,xmmreg            AVX,SANDYBRIDGE 
-       VMOVNTQQ         mem256,ymmreg            AVX,SANDYBRIDGE 
-       VMOVNTDQ         mem256,ymmreg            AVX,SANDYBRIDGE 
-       VMOVNTDQA        xmmreg,mem128            AVX,SANDYBRIDGE 
-       VMOVNTPD         mem128,xmmreg            AVX,SANDYBRIDGE 
-       VMOVNTPD         mem256,ymmreg            AVX,SANDYBRIDGE 
-       VMOVNTPS         mem128,xmmreg            AVX,SANDYBRIDGE 
-       VMOVNTPS         mem256,ymmreg            AVX,SANDYBRIDGE 
-       VMOVSD           xmmreg,xmmreg*,xmmreg    AVX,SANDYBRIDGE 
-       VMOVSD           xmmreg,mem64             AVX,SANDYBRIDGE 
-       VMOVSD           xmmreg,xmmreg*,xmmreg    AVX,SANDYBRIDGE 
-       VMOVSD           mem64,xmmreg             AVX,SANDYBRIDGE 
-       VMOVSHDUP        xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-       VMOVSHDUP        ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-       VMOVSLDUP        xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-       VMOVSLDUP        ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-       VMOVSS           xmmreg,xmmreg*,xmmreg    AVX,SANDYBRIDGE 
-       VMOVSS           xmmreg,mem32             AVX,SANDYBRIDGE 
-       VMOVSS           xmmreg,xmmreg*,xmmreg    AVX,SANDYBRIDGE 
-       VMOVSS           mem32,xmmreg             AVX,SANDYBRIDGE 
-       VMOVUPD          xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-       VMOVUPD          xmmrm128,xmmreg          AVX,SANDYBRIDGE 
-       VMOVUPD          ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-       VMOVUPD          ymmrm256,ymmreg          AVX,SANDYBRIDGE 
-       VMOVUPS          xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-       VMOVUPS          xmmrm128,xmmreg          AVX,SANDYBRIDGE 
-       VMOVUPS          ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-       VMOVUPS          ymmrm256,ymmreg          AVX,SANDYBRIDGE 
-       VMPSADBW         xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-       VMULPD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VMULPD           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VMULPS           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VMULPS           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VMULSD           xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VMULSS           xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE 
-       VORPD            xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VORPD            ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VORPS            xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VORPS            ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VPABSB           xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-       VPABSW           xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-       VPABSD           xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-       VPACKSSWB        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPACKSSDW        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPACKUSWB        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPACKUSDW        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPADDB           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPADDW           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPADDD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPADDQ           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPADDSB          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPADDSW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPADDUSB         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPADDUSW         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPALIGNR         xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-       VPAND            xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPANDN           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPAVGB           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPAVGW           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPBLENDVB        xmmreg,xmmreg*,xmmrm128,xmmreg AVX,SANDYBRIDGE 
-       VPBLENDW         xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-       VPCMPESTRI       xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE 
-       VPCMPESTRM       xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE 
-       VPCMPISTRI       xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE 
-       VPCMPISTRM       xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE 
-       VPCMPEQB         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPCMPEQW         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPCMPEQD         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPCMPEQQ         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPCMPGTB         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPCMPGTW         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPCMPGTD         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPCMPGTQ         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPERMILPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPERMILPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VPERMILPD        xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE 
-       VPERMILPD        ymmreg,ymmrm256,imm8     AVX,SANDYBRIDGE 
-       VPERMILPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPERMILPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VPERMILPS        xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE 
-       VPERMILPS        ymmreg,ymmrm256,imm8     AVX,SANDYBRIDGE 
-       VPERM2F128       ymmreg,ymmreg*,ymmrm256,imm8 AVX,SANDYBRIDGE 
-       VPEXTRB          reg64,xmmreg,imm8        AVX,SANDYBRIDGE,LONG 
-       VPEXTRB          reg32,xmmreg,imm8        AVX,SANDYBRIDGE 
-       VPEXTRB          mem8,xmmreg,imm8         AVX,SANDYBRIDGE 
-       VPEXTRW          reg64,xmmreg,imm8        AVX,SANDYBRIDGE,LONG 
-       VPEXTRW          reg32,xmmreg,imm8        AVX,SANDYBRIDGE 
-       VPEXTRW          reg64,xmmreg,imm8        AVX,SANDYBRIDGE,LONG 
-       VPEXTRW          reg32,xmmreg,imm8        AVX,SANDYBRIDGE 
-       VPEXTRW          mem16,xmmreg,imm8        AVX,SANDYBRIDGE 
-       VPEXTRD          reg64,xmmreg,imm8        AVX,SANDYBRIDGE,LONG 
-       VPEXTRD          rm32,xmmreg,imm8         AVX,SANDYBRIDGE 
-       VPEXTRQ          rm64,xmmreg,imm8         AVX,SANDYBRIDGE,LONG 
-       VPHADDW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPHADDD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPHADDSW         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPHMINPOSUW      xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-       VPHSUBW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPHSUBD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPHSUBSW         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPINSRB          xmmreg,xmmreg*,mem8,imm8 AVX,SANDYBRIDGE 
-       VPINSRB          xmmreg,xmmreg*,rm8,imm8  AVX,SANDYBRIDGE 
-       VPINSRB          xmmreg,xmmreg*,reg32,imm8 AVX,SANDYBRIDGE 
-       VPINSRW          xmmreg,xmmreg*,mem16,imm8 AVX,SANDYBRIDGE 
-       VPINSRW          xmmreg,xmmreg*,rm16,imm8 AVX,SANDYBRIDGE 
-       VPINSRW          xmmreg,xmmreg*,reg32,imm8 AVX,SANDYBRIDGE 
-       VPINSRD          xmmreg,xmmreg*,mem32,imm8 AVX,SANDYBRIDGE 
-       VPINSRD          xmmreg,xmmreg*,rm32,imm8 AVX,SANDYBRIDGE 
-       VPINSRQ          xmmreg,xmmreg*,mem64,imm8 AVX,SANDYBRIDGE,LONG 
-       VPINSRQ          xmmreg,xmmreg*,rm64,imm8 AVX,SANDYBRIDGE,LONG 
-       VPMADDWD         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPMADDUBSW       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPMAXSB          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPMAXSW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPMAXSD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPMAXUB          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPMAXUW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPMAXUD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPMINSB          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPMINSW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPMINSD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPMINUB          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPMINUW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPMINUD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPMOVMSKB        reg64,xmmreg             AVX,SANDYBRIDGE,LONG 
-       VPMOVMSKB        reg32,xmmreg             AVX,SANDYBRIDGE 
-       VPMOVSXBW        xmmreg,xmmrm64           AVX,SANDYBRIDGE 
-       VPMOVSXBD        xmmreg,xmmrm32           AVX,SANDYBRIDGE 
-       VPMOVSXBQ        xmmreg,xmmrm16           AVX,SANDYBRIDGE 
-       VPMOVSXWD        xmmreg,xmmrm64           AVX,SANDYBRIDGE 
-       VPMOVSXWQ        xmmreg,xmmrm32           AVX,SANDYBRIDGE 
-       VPMOVSXDQ        xmmreg,xmmrm64           AVX,SANDYBRIDGE 
-       VPMOVZXBW        xmmreg,xmmrm64           AVX,SANDYBRIDGE 
-       VPMOVZXBD        xmmreg,xmmrm32           AVX,SANDYBRIDGE 
-       VPMOVZXBQ        xmmreg,xmmrm16           AVX,SANDYBRIDGE 
-       VPMOVZXWD        xmmreg,xmmrm64           AVX,SANDYBRIDGE 
-       VPMOVZXWQ        xmmreg,xmmrm32           AVX,SANDYBRIDGE 
-       VPMOVZXDQ        xmmreg,xmmrm64           AVX,SANDYBRIDGE 
-       VPMULHUW         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPMULHRSW        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPMULHW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPMULLW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPMULLD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPMULUDQ         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPMULDQ          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPOR             xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPSADBW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPSHUFB          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPSHUFD          xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE 
-       VPSHUFHW         xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE 
-       VPSHUFLW         xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE 
-       VPSIGNB          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPSIGNW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPSIGND          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPSLLDQ          xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE 
-       VPSRLDQ          xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE 
-       VPSLLW           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPSLLW           xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE 
-       VPSLLD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPSLLD           xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE 
-       VPSLLQ           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPSLLQ           xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE 
-       VPSRAW           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPSRAW           xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE 
-       VPSRAD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPSRAD           xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE 
-       VPSRLW           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPSRLW           xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE 
-       VPSRLD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPSRLD           xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE 
-       VPSRLQ           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPSRLQ           xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE 
-       VPTEST           xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-       VPTEST           ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-       VPSUBB           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPSUBW           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPSUBD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPSUBQ           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPSUBSB          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPSUBSW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPSUBUSB         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPSUBUSW         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPUNPCKHBW       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPUNPCKHWD       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPUNPCKHDQ       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPUNPCKHQDQ      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPUNPCKLBW       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPUNPCKLWD       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPUNPCKLDQ       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPUNPCKLQDQ      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPXOR            xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VRCPPS           xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-       VRCPPS           ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-       VRCPSS           xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE 
-       VRSQRTPS         xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-       VRSQRTPS         ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-       VRSQRTSS         xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE 
-       VROUNDPD         xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE 
-       VROUNDPD         ymmreg,ymmrm256,imm8     AVX,SANDYBRIDGE 
-       VROUNDPS         xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE 
-       VROUNDPS         ymmreg,ymmrm256,imm8     AVX,SANDYBRIDGE 
-       VROUNDSD         xmmreg,xmmreg*,xmmrm64,imm8 AVX,SANDYBRIDGE 
-       VROUNDSS         xmmreg,xmmreg*,xmmrm32,imm8 AVX,SANDYBRIDGE 
-       VSHUFPD          xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-       VSHUFPD          ymmreg,ymmreg*,ymmrm256,imm8 AVX,SANDYBRIDGE 
-       VSHUFPS          xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-       VSHUFPS          ymmreg,ymmreg*,ymmrm256,imm8 AVX,SANDYBRIDGE 
-       VSQRTPD          xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-       VSQRTPD          ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-       VSQRTPS          xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-       VSQRTPS          ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-       VSQRTSD          xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VSQRTSS          xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE 
-       VSTMXCSR         mem32                    AVX,SANDYBRIDGE 
-       VSUBPD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VSUBPD           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VSUBPS           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VSUBPS           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VSUBSD           xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE 
-       VSUBSS           xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE 
-       VTESTPS          xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-       VTESTPS          ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-       VTESTPD          xmmreg,xmmrm128          AVX,SANDYBRIDGE 
-       VTESTPD          ymmreg,ymmrm256          AVX,SANDYBRIDGE 
-       VUCOMISD         xmmreg,xmmrm64           AVX,SANDYBRIDGE 
-       VUCOMISS         xmmreg,xmmrm32           AVX,SANDYBRIDGE 
-       VUNPCKHPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VUNPCKHPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VUNPCKHPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VUNPCKHPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VUNPCKLPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VUNPCKLPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VUNPCKLPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VUNPCKLPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VXORPD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VXORPD           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VXORPS           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VXORPS           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE 
-       VZEROALL                                  AVX,SANDYBRIDGE 
-       VZEROUPPER                                AVX,SANDYBRIDGE
-
-F.1.28 Intel Carry-Less Multiplication instructions (CLMUL)
-
-       PCLMULLQLQDQ     xmmreg,xmmrm128          SSE,WESTMERE 
-       PCLMULHQLQDQ     xmmreg,xmmrm128          SSE,WESTMERE 
-       PCLMULLQHQDQ     xmmreg,xmmrm128          SSE,WESTMERE 
-       PCLMULHQHQDQ     xmmreg,xmmrm128          SSE,WESTMERE 
-       PCLMULQDQ        xmmreg,xmmrm128,imm8     SSE,WESTMERE
-
-F.1.29 Intel AVX Carry-Less Multiplication instructions (CLMUL)
-
-       VPCLMULLQLQDQ    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPCLMULHQLQDQ    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPCLMULLQHQDQ    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPCLMULHQHQDQ    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE 
-       VPCLMULQDQ       xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE 
-       VPCLMULLQLQDQ    ymmreg,ymmreg*,ymmrm256  VPCLMULQDQ 
-       VPCLMULHQLQDQ    ymmreg,ymmreg*,ymmrm256  VPCLMULQDQ 
-       VPCLMULLQHQDQ    ymmreg,ymmreg*,ymmrm256  VPCLMULQDQ 
-       VPCLMULHQHQDQ    ymmreg,ymmreg*,ymmrm256  VPCLMULQDQ 
-       VPCLMULQDQ       ymmreg,ymmreg*,ymmrm256,imm8 VPCLMULQDQ 
-       VPCLMULLQLQDQ    xmmreg,xmmreg*,xmmrm128  AVX512VL,VPCLMULQDQ 
-       VPCLMULHQLQDQ    xmmreg,xmmreg*,xmmrm128  AVX512VL,VPCLMULQDQ 
-       VPCLMULLQHQDQ    xmmreg,xmmreg*,xmmrm128  AVX512VL,VPCLMULQDQ 
-       VPCLMULHQHQDQ    xmmreg,xmmreg*,xmmrm128  AVX512VL,VPCLMULQDQ 
-       VPCLMULQDQ       xmmreg,xmmreg*,xmmrm128,imm8 AVX512VL,VPCLMULQDQ 
-       VPCLMULLQLQDQ    ymmreg,ymmreg*,ymmrm256  AVX512VL,VPCLMULQDQ 
-       VPCLMULHQLQDQ    ymmreg,ymmreg*,ymmrm256  AVX512VL,VPCLMULQDQ 
-       VPCLMULLQHQDQ    ymmreg,ymmreg*,ymmrm256  AVX512VL,VPCLMULQDQ 
-       VPCLMULHQHQDQ    ymmreg,ymmreg*,ymmrm256  AVX512VL,VPCLMULQDQ 
-       VPCLMULQDQ       ymmreg,ymmreg*,ymmrm256,imm8 AVX512VL,VPCLMULQDQ 
-       VPCLMULLQLQDQ    zmmreg,zmmreg*,zmmrm512  AVX512,VPCLMULQDQ 
-       VPCLMULHQLQDQ    zmmreg,zmmreg*,zmmrm512  AVX512,VPCLMULQDQ 
-       VPCLMULLQHQDQ    zmmreg,zmmreg*,zmmrm512  AVX512,VPCLMULQDQ 
-       VPCLMULHQHQDQ    zmmreg,zmmreg*,zmmrm512  AVX512,VPCLMULQDQ 
-       VPCLMULQDQ       zmmreg,zmmreg*,zmmrm512,imm8 AVX512,VPCLMULQDQ
-
-F.1.30 Intel Fused Multiply-Add instructions (FMA)
-
-       VFMADD132PS      xmmreg,xmmreg,xmmrm128   FMA 
-       VFMADD132PS      ymmreg,ymmreg,ymmrm256   FMA 
-       VFMADD132PD      xmmreg,xmmreg,xmmrm128   FMA 
-       VFMADD132PD      ymmreg,ymmreg,ymmrm256   FMA 
-       VFMADD312PS      xmmreg,xmmreg,xmmrm128   FMA 
-       VFMADD312PS      ymmreg,ymmreg,ymmrm256   FMA 
-       VFMADD312PD      xmmreg,xmmreg,xmmrm128   FMA 
-       VFMADD312PD      ymmreg,ymmreg,ymmrm256   FMA 
-       VFMADD213PS      xmmreg,xmmreg,xmmrm128   FMA 
-       VFMADD213PS      ymmreg,ymmreg,ymmrm256   FMA 
-       VFMADD213PD      xmmreg,xmmreg,xmmrm128   FMA 
-       VFMADD213PD      ymmreg,ymmreg,ymmrm256   FMA 
-       VFMADD123PS      xmmreg,xmmreg,xmmrm128   FMA 
-       VFMADD123PS      ymmreg,ymmreg,ymmrm256   FMA 
-       VFMADD123PD      xmmreg,xmmreg,xmmrm128   FMA 
-       VFMADD123PD      ymmreg,ymmreg,ymmrm256   FMA 
-       VFMADD231PS      xmmreg,xmmreg,xmmrm128   FMA 
-       VFMADD231PS      ymmreg,ymmreg,ymmrm256   FMA 
-       VFMADD231PD      xmmreg,xmmreg,xmmrm128   FMA 
-       VFMADD231PD      ymmreg,ymmreg,ymmrm256   FMA 
-       VFMADD321PS      xmmreg,xmmreg,xmmrm128   FMA 
-       VFMADD321PS      ymmreg,ymmreg,ymmrm256   FMA 
-       VFMADD321PD      xmmreg,xmmreg,xmmrm128   FMA 
-       VFMADD321PD      ymmreg,ymmreg,ymmrm256   FMA 
-       VFMADDSUB132PS   xmmreg,xmmreg,xmmrm128   FMA 
-       VFMADDSUB132PS   ymmreg,ymmreg,ymmrm256   FMA 
-       VFMADDSUB132PD   xmmreg,xmmreg,xmmrm128   FMA 
-       VFMADDSUB132PD   ymmreg,ymmreg,ymmrm256   FMA 
-       VFMADDSUB312PS   xmmreg,xmmreg,xmmrm128   FMA 
-       VFMADDSUB312PS   ymmreg,ymmreg,ymmrm256   FMA 
-       VFMADDSUB312PD   xmmreg,xmmreg,xmmrm128   FMA 
-       VFMADDSUB312PD   ymmreg,ymmreg,ymmrm256   FMA 
-       VFMADDSUB213PS   xmmreg,xmmreg,xmmrm128   FMA 
-       VFMADDSUB213PS   ymmreg,ymmreg,ymmrm256   FMA 
-       VFMADDSUB213PD   xmmreg,xmmreg,xmmrm128   FMA 
-       VFMADDSUB213PD   ymmreg,ymmreg,ymmrm256   FMA 
-       VFMADDSUB123PS   xmmreg,xmmreg,xmmrm128   FMA 
-       VFMADDSUB123PS   ymmreg,ymmreg,ymmrm256   FMA 
-       VFMADDSUB123PD   xmmreg,xmmreg,xmmrm128   FMA 
-       VFMADDSUB123PD   ymmreg,ymmreg,ymmrm256   FMA 
-       VFMADDSUB231PS   xmmreg,xmmreg,xmmrm128   FMA 
-       VFMADDSUB231PS   ymmreg,ymmreg,ymmrm256   FMA 
-       VFMADDSUB231PD   xmmreg,xmmreg,xmmrm128   FMA 
-       VFMADDSUB231PD   ymmreg,ymmreg,ymmrm256   FMA 
-       VFMADDSUB321PS   xmmreg,xmmreg,xmmrm128   FMA 
-       VFMADDSUB321PS   ymmreg,ymmreg,ymmrm256   FMA 
-       VFMADDSUB321PD   xmmreg,xmmreg,xmmrm128   FMA 
-       VFMADDSUB321PD   ymmreg,ymmreg,ymmrm256   FMA 
-       VFMSUB132PS      xmmreg,xmmreg,xmmrm128   FMA 
-       VFMSUB132PS      ymmreg,ymmreg,ymmrm256   FMA 
-       VFMSUB132PD      xmmreg,xmmreg,xmmrm128   FMA 
-       VFMSUB132PD      ymmreg,ymmreg,ymmrm256   FMA 
-       VFMSUB312PS      xmmreg,xmmreg,xmmrm128   FMA 
-       VFMSUB312PS      ymmreg,ymmreg,ymmrm256   FMA 
-       VFMSUB312PD      xmmreg,xmmreg,xmmrm128   FMA 
-       VFMSUB312PD      ymmreg,ymmreg,ymmrm256   FMA 
-       VFMSUB213PS      xmmreg,xmmreg,xmmrm128   FMA 
-       VFMSUB213PS      ymmreg,ymmreg,ymmrm256   FMA 
-       VFMSUB213PD      xmmreg,xmmreg,xmmrm128   FMA 
-       VFMSUB213PD      ymmreg,ymmreg,ymmrm256   FMA 
-       VFMSUB123PS      xmmreg,xmmreg,xmmrm128   FMA 
-       VFMSUB123PS      ymmreg,ymmreg,ymmrm256   FMA 
-       VFMSUB123PD      xmmreg,xmmreg,xmmrm128   FMA 
-       VFMSUB123PD      ymmreg,ymmreg,ymmrm256   FMA 
-       VFMSUB231PS      xmmreg,xmmreg,xmmrm128   FMA 
-       VFMSUB231PS      ymmreg,ymmreg,ymmrm256   FMA 
-       VFMSUB231PD      xmmreg,xmmreg,xmmrm128   FMA 
-       VFMSUB231PD      ymmreg,ymmreg,ymmrm256   FMA 
-       VFMSUB321PS      xmmreg,xmmreg,xmmrm128   FMA 
-       VFMSUB321PS      ymmreg,ymmreg,ymmrm256   FMA 
-       VFMSUB321PD      xmmreg,xmmreg,xmmrm128   FMA 
-       VFMSUB321PD      ymmreg,ymmreg,ymmrm256   FMA 
-       VFMSUBADD132PS   xmmreg,xmmreg,xmmrm128   FMA 
-       VFMSUBADD132PS   ymmreg,ymmreg,ymmrm256   FMA 
-       VFMSUBADD132PD   xmmreg,xmmreg,xmmrm128   FMA 
-       VFMSUBADD132PD   ymmreg,ymmreg,ymmrm256   FMA 
-       VFMSUBADD312PS   xmmreg,xmmreg,xmmrm128   FMA 
-       VFMSUBADD312PS   ymmreg,ymmreg,ymmrm256   FMA 
-       VFMSUBADD312PD   xmmreg,xmmreg,xmmrm128   FMA 
-       VFMSUBADD312PD   ymmreg,ymmreg,ymmrm256   FMA 
-       VFMSUBADD213PS   xmmreg,xmmreg,xmmrm128   FMA 
-       VFMSUBADD213PS   ymmreg,ymmreg,ymmrm256   FMA 
-       VFMSUBADD213PD   xmmreg,xmmreg,xmmrm128   FMA 
-       VFMSUBADD213PD   ymmreg,ymmreg,ymmrm256   FMA 
-       VFMSUBADD123PS   xmmreg,xmmreg,xmmrm128   FMA 
-       VFMSUBADD123PS   ymmreg,ymmreg,ymmrm256   FMA 
-       VFMSUBADD123PD   xmmreg,xmmreg,xmmrm128   FMA 
-       VFMSUBADD123PD   ymmreg,ymmreg,ymmrm256   FMA 
-       VFMSUBADD231PS   xmmreg,xmmreg,xmmrm128   FMA 
-       VFMSUBADD231PS   ymmreg,ymmreg,ymmrm256   FMA 
-       VFMSUBADD231PD   xmmreg,xmmreg,xmmrm128   FMA 
-       VFMSUBADD231PD   ymmreg,ymmreg,ymmrm256   FMA 
-       VFMSUBADD321PS   xmmreg,xmmreg,xmmrm128   FMA 
-       VFMSUBADD321PS   ymmreg,ymmreg,ymmrm256   FMA 
-       VFMSUBADD321PD   xmmreg,xmmreg,xmmrm128   FMA 
-       VFMSUBADD321PD   ymmreg,ymmreg,ymmrm256   FMA 
-       VFNMADD132PS     xmmreg,xmmreg,xmmrm128   FMA 
-       VFNMADD132PS     ymmreg,ymmreg,ymmrm256   FMA 
-       VFNMADD132PD     xmmreg,xmmreg,xmmrm128   FMA 
-       VFNMADD132PD     ymmreg,ymmreg,ymmrm256   FMA 
-       VFNMADD312PS     xmmreg,xmmreg,xmmrm128   FMA 
-       VFNMADD312PS     ymmreg,ymmreg,ymmrm256   FMA 
-       VFNMADD312PD     xmmreg,xmmreg,xmmrm128   FMA 
-       VFNMADD312PD     ymmreg,ymmreg,ymmrm256   FMA 
-       VFNMADD213PS     xmmreg,xmmreg,xmmrm128   FMA 
-       VFNMADD213PS     ymmreg,ymmreg,ymmrm256   FMA 
-       VFNMADD213PD     xmmreg,xmmreg,xmmrm128   FMA 
-       VFNMADD213PD     ymmreg,ymmreg,ymmrm256   FMA 
-       VFNMADD123PS     xmmreg,xmmreg,xmmrm128   FMA 
-       VFNMADD123PS     ymmreg,ymmreg,ymmrm256   FMA 
-       VFNMADD123PD     xmmreg,xmmreg,xmmrm128   FMA 
-       VFNMADD123PD     ymmreg,ymmreg,ymmrm256   FMA 
-       VFNMADD231PS     xmmreg,xmmreg,xmmrm128   FMA 
-       VFNMADD231PS     ymmreg,ymmreg,ymmrm256   FMA 
-       VFNMADD231PD     xmmreg,xmmreg,xmmrm128   FMA 
-       VFNMADD231PD     ymmreg,ymmreg,ymmrm256   FMA 
-       VFNMADD321PS     xmmreg,xmmreg,xmmrm128   FMA 
-       VFNMADD321PS     ymmreg,ymmreg,ymmrm256   FMA 
-       VFNMADD321PD     xmmreg,xmmreg,xmmrm128   FMA 
-       VFNMADD321PD     ymmreg,ymmreg,ymmrm256   FMA 
-       VFNMSUB132PS     xmmreg,xmmreg,xmmrm128   FMA 
-       VFNMSUB132PS     ymmreg,ymmreg,ymmrm256   FMA 
-       VFNMSUB132PD     xmmreg,xmmreg,xmmrm128   FMA 
-       VFNMSUB132PD     ymmreg,ymmreg,ymmrm256   FMA 
-       VFNMSUB312PS     xmmreg,xmmreg,xmmrm128   FMA 
-       VFNMSUB312PS     ymmreg,ymmreg,ymmrm256   FMA 
-       VFNMSUB312PD     xmmreg,xmmreg,xmmrm128   FMA 
-       VFNMSUB312PD     ymmreg,ymmreg,ymmrm256   FMA 
-       VFNMSUB213PS     xmmreg,xmmreg,xmmrm128   FMA 
-       VFNMSUB213PS     ymmreg,ymmreg,ymmrm256   FMA 
-       VFNMSUB213PD     xmmreg,xmmreg,xmmrm128   FMA 
-       VFNMSUB213PD     ymmreg,ymmreg,ymmrm256   FMA 
-       VFNMSUB123PS     xmmreg,xmmreg,xmmrm128   FMA 
-       VFNMSUB123PS     ymmreg,ymmreg,ymmrm256   FMA 
-       VFNMSUB123PD     xmmreg,xmmreg,xmmrm128   FMA 
-       VFNMSUB123PD     ymmreg,ymmreg,ymmrm256   FMA 
-       VFNMSUB231PS     xmmreg,xmmreg,xmmrm128   FMA 
-       VFNMSUB231PS     ymmreg,ymmreg,ymmrm256   FMA 
-       VFNMSUB231PD     xmmreg,xmmreg,xmmrm128   FMA 
-       VFNMSUB231PD     ymmreg,ymmreg,ymmrm256   FMA 
-       VFNMSUB321PS     xmmreg,xmmreg,xmmrm128   FMA 
-       VFNMSUB321PS     ymmreg,ymmreg,ymmrm256   FMA 
-       VFNMSUB321PD     xmmreg,xmmreg,xmmrm128   FMA 
-       VFNMSUB321PD     ymmreg,ymmreg,ymmrm256   FMA 
-       VFMADD132SS      xmmreg,xmmreg,xmmrm32    FMA 
-       VFMADD132SD      xmmreg,xmmreg,xmmrm64    FMA 
-       VFMADD312SS      xmmreg,xmmreg,xmmrm32    FMA 
-       VFMADD312SD      xmmreg,xmmreg,xmmrm64    FMA 
-       VFMADD213SS      xmmreg,xmmreg,xmmrm32    FMA 
-       VFMADD213SD      xmmreg,xmmreg,xmmrm64    FMA 
-       VFMADD123SS      xmmreg,xmmreg,xmmrm32    FMA 
-       VFMADD123SD      xmmreg,xmmreg,xmmrm64    FMA 
-       VFMADD231SS      xmmreg,xmmreg,xmmrm32    FMA 
-       VFMADD231SD      xmmreg,xmmreg,xmmrm64    FMA 
-       VFMADD321SS      xmmreg,xmmreg,xmmrm32    FMA 
-       VFMADD321SD      xmmreg,xmmreg,xmmrm64    FMA 
-       VFMSUB132SS      xmmreg,xmmreg,xmmrm32    FMA 
-       VFMSUB132SD      xmmreg,xmmreg,xmmrm64    FMA 
-       VFMSUB312SS      xmmreg,xmmreg,xmmrm32    FMA 
-       VFMSUB312SD      xmmreg,xmmreg,xmmrm64    FMA 
-       VFMSUB213SS      xmmreg,xmmreg,xmmrm32    FMA 
-       VFMSUB213SD      xmmreg,xmmreg,xmmrm64    FMA 
-       VFMSUB123SS      xmmreg,xmmreg,xmmrm32    FMA 
-       VFMSUB123SD      xmmreg,xmmreg,xmmrm64    FMA 
-       VFMSUB231SS      xmmreg,xmmreg,xmmrm32    FMA 
-       VFMSUB231SD      xmmreg,xmmreg,xmmrm64    FMA 
-       VFMSUB321SS      xmmreg,xmmreg,xmmrm32    FMA 
-       VFMSUB321SD      xmmreg,xmmreg,xmmrm64    FMA 
-       VFNMADD132SS     xmmreg,xmmreg,xmmrm32    FMA 
-       VFNMADD132SD     xmmreg,xmmreg,xmmrm64    FMA 
-       VFNMADD312SS     xmmreg,xmmreg,xmmrm32    FMA 
-       VFNMADD312SD     xmmreg,xmmreg,xmmrm64    FMA 
-       VFNMADD213SS     xmmreg,xmmreg,xmmrm32    FMA 
-       VFNMADD213SD     xmmreg,xmmreg,xmmrm64    FMA 
-       VFNMADD123SS     xmmreg,xmmreg,xmmrm32    FMA 
-       VFNMADD123SD     xmmreg,xmmreg,xmmrm64    FMA 
-       VFNMADD231SS     xmmreg,xmmreg,xmmrm32    FMA 
-       VFNMADD231SD     xmmreg,xmmreg,xmmrm64    FMA 
-       VFNMADD321SS     xmmreg,xmmreg,xmmrm32    FMA 
-       VFNMADD321SD     xmmreg,xmmreg,xmmrm64    FMA 
-       VFNMSUB132SS     xmmreg,xmmreg,xmmrm32    FMA 
-       VFNMSUB132SD     xmmreg,xmmreg,xmmrm64    FMA 
-       VFNMSUB312SS     xmmreg,xmmreg,xmmrm32    FMA 
-       VFNMSUB312SD     xmmreg,xmmreg,xmmrm64    FMA 
-       VFNMSUB213SS     xmmreg,xmmreg,xmmrm32    FMA 
-       VFNMSUB213SD     xmmreg,xmmreg,xmmrm64    FMA 
-       VFNMSUB123SS     xmmreg,xmmreg,xmmrm32    FMA 
-       VFNMSUB123SD     xmmreg,xmmreg,xmmrm64    FMA 
-       VFNMSUB231SS     xmmreg,xmmreg,xmmrm32    FMA 
-       VFNMSUB231SD     xmmreg,xmmreg,xmmrm64    FMA 
-       VFNMSUB321SS     xmmreg,xmmreg,xmmrm32    FMA 
-       VFNMSUB321SD     xmmreg,xmmreg,xmmrm64    FMA
-
-F.1.31 Intel post-32 nm processor instructions
-
-       RDFSBASE         reg32                    LONG 
-       RDFSBASE         reg64                    LONG 
-       RDGSBASE         reg32                    LONG 
-       RDGSBASE         reg64                    LONG 
-       RDRAND           reg16                     
-       RDRAND           reg32                     
-       RDRAND           reg64                    LONG 
-       WRFSBASE         reg32                    LONG 
-       WRFSBASE         reg64                    LONG 
-       WRGSBASE         reg32                    LONG 
-       WRGSBASE         reg64                    LONG 
-       VCVTPH2PS        ymmreg,xmmrm128          AVX 
-       VCVTPH2PS        xmmreg,xmmrm64           AVX 
-       VCVTPS2PH        xmmrm128,ymmreg,imm8     AVX 
-       VCVTPS2PH        xmmrm64,xmmreg,imm8      AVX 
-       ADCX             reg32,rm32                
-       ADCX             reg64,rm64               LONG 
-       ADOX             reg32,rm32                
-       ADOX             reg64,rm64               LONG 
-       RDSEED           reg16                     
-       RDSEED           reg32                     
-       RDSEED           reg64                    LONG 
-       CLAC                                      PRIV 
-       STAC                                      PRIV
-
-F.1.32 VIA (Centaur) security instructions
-
-       XSTORE                                    PENT,CYRIX 
-       XCRYPTECB                                 PENT,CYRIX 
-       XCRYPTCBC                                 PENT,CYRIX 
-       XCRYPTCTR                                 PENT,CYRIX 
-       XCRYPTCFB                                 PENT,CYRIX 
-       XCRYPTOFB                                 PENT,CYRIX 
-       MONTMUL                                   PENT,CYRIX 
-       XSHA1                                     PENT,CYRIX 
-       XSHA256                                   PENT,CYRIX
-
-F.1.33 AMD Lightweight Profiling (LWP) instructions
-
-       LLWPCB           reg32                    AMD,386 
-       LLWPCB           reg64                    AMD,X86_64,LONG 
-       SLWPCB           reg32                    AMD,386 
-       SLWPCB           reg64                    AMD,X86_64,LONG 
-       LWPVAL           reg32,rm32,imm32         AMD,386 
-       LWPVAL           reg64,rm32,imm32         AMD,X86_64,LONG 
-       LWPINS           reg32,rm32,imm32         AMD,386 
-       LWPINS           reg64,rm32,imm32         AMD,X86_64,LONG
-
-F.1.34 AMD XOP and FMA4 instructions (SSE5)
-
-       VFMADDPD         xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VFMADDPD         ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-       VFMADDPD         xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-       VFMADDPD         ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-       VFMADDPS         xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VFMADDPS         ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-       VFMADDPS         xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-       VFMADDPS         ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-       VFMADDSD         xmmreg,xmmreg*,xmmrm64,xmmreg AMD,SSE5 
-       VFMADDSD         xmmreg,xmmreg*,xmmreg,xmmrm64 AMD,SSE5 
-       VFMADDSS         xmmreg,xmmreg*,xmmrm32,xmmreg AMD,SSE5 
-       VFMADDSS         xmmreg,xmmreg*,xmmreg,xmmrm32 AMD,SSE5 
-       VFMADDSUBPD      xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VFMADDSUBPD      ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-       VFMADDSUBPD      xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-       VFMADDSUBPD      ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-       VFMADDSUBPS      xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VFMADDSUBPS      ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-       VFMADDSUBPS      xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-       VFMADDSUBPS      ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-       VFMSUBADDPD      xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VFMSUBADDPD      ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-       VFMSUBADDPD      xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-       VFMSUBADDPD      ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-       VFMSUBADDPS      xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VFMSUBADDPS      ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-       VFMSUBADDPS      xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-       VFMSUBADDPS      ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-       VFMSUBPD         xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VFMSUBPD         ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-       VFMSUBPD         xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-       VFMSUBPD         ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-       VFMSUBPS         xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VFMSUBPS         ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-       VFMSUBPS         xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-       VFMSUBPS         ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-       VFMSUBSD         xmmreg,xmmreg*,xmmrm64,xmmreg AMD,SSE5 
-       VFMSUBSD         xmmreg,xmmreg*,xmmreg,xmmrm64 AMD,SSE5 
-       VFMSUBSS         xmmreg,xmmreg*,xmmrm32,xmmreg AMD,SSE5 
-       VFMSUBSS         xmmreg,xmmreg*,xmmreg,xmmrm32 AMD,SSE5 
-       VFNMADDPD        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VFNMADDPD        ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-       VFNMADDPD        xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-       VFNMADDPD        ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-       VFNMADDPS        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VFNMADDPS        ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-       VFNMADDPS        xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-       VFNMADDPS        ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-       VFNMADDSD        xmmreg,xmmreg*,xmmrm64,xmmreg AMD,SSE5 
-       VFNMADDSD        xmmreg,xmmreg*,xmmreg,xmmrm64 AMD,SSE5 
-       VFNMADDSS        xmmreg,xmmreg*,xmmrm32,xmmreg AMD,SSE5 
-       VFNMADDSS        xmmreg,xmmreg*,xmmreg,xmmrm32 AMD,SSE5 
-       VFNMSUBPD        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VFNMSUBPD        ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-       VFNMSUBPD        xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-       VFNMSUBPD        ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-       VFNMSUBPS        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VFNMSUBPS        ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-       VFNMSUBPS        xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-       VFNMSUBPS        ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-       VFNMSUBSD        xmmreg,xmmreg*,xmmrm64,xmmreg AMD,SSE5 
-       VFNMSUBSD        xmmreg,xmmreg*,xmmreg,xmmrm64 AMD,SSE5 
-       VFNMSUBSS        xmmreg,xmmreg*,xmmrm32,xmmreg AMD,SSE5 
-       VFNMSUBSS        xmmreg,xmmreg*,xmmreg,xmmrm32 AMD,SSE5 
-       VFRCZPD          xmmreg,xmmrm128*         AMD,SSE5 
-       VFRCZPD          ymmreg,ymmrm256*         AMD,SSE5 
-       VFRCZPS          xmmreg,xmmrm128*         AMD,SSE5 
-       VFRCZPS          ymmreg,ymmrm256*         AMD,SSE5 
-       VFRCZSD          xmmreg,xmmrm64*          AMD,SSE5 
-       VFRCZSS          xmmreg,xmmrm32*          AMD,SSE5 
-       VPCMOV           xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VPCMOV           ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5 
-       VPCMOV           xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-       VPCMOV           ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5 
-       VPCOMB           xmmreg,xmmreg*,xmmrm128,imm8 AMD,SSE5 
-       VPCOMD           xmmreg,xmmreg*,xmmrm128,imm8 AMD,SSE5 
-       VPCOMQ           xmmreg,xmmreg*,xmmrm128,imm8 AMD,SSE5 
-       VPCOMUB          xmmreg,xmmreg*,xmmrm128,imm8 AMD,SSE5 
-       VPCOMUD          xmmreg,xmmreg*,xmmrm128,imm8 AMD,SSE5 
-       VPCOMUQ          xmmreg,xmmreg*,xmmrm128,imm8 AMD,SSE5 
-       VPCOMUW          xmmreg,xmmreg*,xmmrm128,imm8 AMD,SSE5 
-       VPCOMW           xmmreg,xmmreg*,xmmrm128,imm8 AMD,SSE5 
-       VPHADDBD         xmmreg,xmmrm128*         AMD,SSE5 
-       VPHADDBQ         xmmreg,xmmrm128*         AMD,SSE5 
-       VPHADDBW         xmmreg,xmmrm128*         AMD,SSE5 
-       VPHADDDQ         xmmreg,xmmrm128*         AMD,SSE5 
-       VPHADDUBD        xmmreg,xmmrm128*         AMD,SSE5 
-       VPHADDUBQ        xmmreg,xmmrm128*         AMD,SSE5 
-       VPHADDUBW        xmmreg,xmmrm128*         AMD,SSE5 
-       VPHADDUDQ        xmmreg,xmmrm128*         AMD,SSE5 
-       VPHADDUWD        xmmreg,xmmrm128*         AMD,SSE5 
-       VPHADDUWQ        xmmreg,xmmrm128*         AMD,SSE5 
-       VPHADDWD         xmmreg,xmmrm128*         AMD,SSE5 
-       VPHADDWQ         xmmreg,xmmrm128*         AMD,SSE5 
-       VPHSUBBW         xmmreg,xmmrm128*         AMD,SSE5 
-       VPHSUBDQ         xmmreg,xmmrm128*         AMD,SSE5 
-       VPHSUBWD         xmmreg,xmmrm128*         AMD,SSE5 
-       VPMACSDD         xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VPMACSDQH        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VPMACSDQL        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VPMACSSDD        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VPMACSSDQH       xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VPMACSSDQL       xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VPMACSSWD        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VPMACSSWW        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VPMACSWD         xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VPMACSWW         xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VPMADCSSWD       xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VPMADCSWD        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VPPERM           xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5 
-       VPPERM           xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5 
-       VPROTB           xmmreg,xmmrm128*,xmmreg  AMD,SSE5 
-       VPROTB           xmmreg,xmmreg*,xmmrm128  AMD,SSE5 
-       VPROTB           xmmreg,xmmrm128*,imm8    AMD,SSE5 
-       VPROTD           xmmreg,xmmrm128*,xmmreg  AMD,SSE5 
-       VPROTD           xmmreg,xmmreg*,xmmrm128  AMD,SSE5 
-       VPROTD           xmmreg,xmmrm128*,imm8    AMD,SSE5 
-       VPROTQ           xmmreg,xmmrm128*,xmmreg  AMD,SSE5 
-       VPROTQ           xmmreg,xmmreg*,xmmrm128  AMD,SSE5 
-       VPROTQ           xmmreg,xmmrm128*,imm8    AMD,SSE5 
-       VPROTW           xmmreg,xmmrm128*,xmmreg  AMD,SSE5 
-       VPROTW           xmmreg,xmmreg*,xmmrm128  AMD,SSE5 
-       VPROTW           xmmreg,xmmrm128*,imm8    AMD,SSE5 
-       VPSHAB           xmmreg,xmmrm128*,xmmreg  AMD,SSE5 
-       VPSHAB           xmmreg,xmmreg*,xmmrm128  AMD,SSE5 
-       VPSHAD           xmmreg,xmmrm128*,xmmreg  AMD,SSE5 
-       VPSHAD           xmmreg,xmmreg*,xmmrm128  AMD,SSE5 
-       VPSHAQ           xmmreg,xmmrm128*,xmmreg  AMD,SSE5 
-       VPSHAQ           xmmreg,xmmreg*,xmmrm128  AMD,SSE5 
-       VPSHAW           xmmreg,xmmrm128*,xmmreg  AMD,SSE5 
-       VPSHAW           xmmreg,xmmreg*,xmmrm128  AMD,SSE5 
-       VPSHLB           xmmreg,xmmrm128*,xmmreg  AMD,SSE5 
-       VPSHLB           xmmreg,xmmreg*,xmmrm128  AMD,SSE5 
-       VPSHLD           xmmreg,xmmrm128*,xmmreg  AMD,SSE5 
-       VPSHLD           xmmreg,xmmreg*,xmmrm128  AMD,SSE5 
-       VPSHLQ           xmmreg,xmmrm128*,xmmreg  AMD,SSE5 
-       VPSHLQ           xmmreg,xmmreg*,xmmrm128  AMD,SSE5 
-       VPSHLW           xmmreg,xmmrm128*,xmmreg  AMD,SSE5 
-       VPSHLW           xmmreg,xmmreg*,xmmrm128  AMD,SSE5
-
-F.1.35 Intel AVX2 instructions
-
-       VMPSADBW         ymmreg,ymmreg*,ymmrm256,imm8 AVX2 
-       VPABSB           ymmreg,ymmrm256          AVX2 
-       VPABSW           ymmreg,ymmrm256          AVX2 
-       VPABSD           ymmreg,ymmrm256          AVX2 
-       VPACKSSWB        ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPACKSSDW        ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPACKUSDW        ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPACKUSWB        ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPADDB           ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPADDW           ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPADDD           ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPADDQ           ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPADDSB          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPADDSW          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPADDUSB         ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPADDUSW         ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPALIGNR         ymmreg,ymmreg*,ymmrm256,imm8 AVX2 
-       VPAND            ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPANDN           ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPAVGB           ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPAVGW           ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPBLENDVB        ymmreg,ymmreg*,ymmrm256,ymmreg AVX2 
-       VPBLENDW         ymmreg,ymmreg*,ymmrm256,imm8 AVX2 
-       VPCMPEQB         ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPCMPEQW         ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPCMPEQD         ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPCMPEQQ         ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPCMPGTB         ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPCMPGTW         ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPCMPGTD         ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPCMPGTQ         ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPHADDW          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPHADDD          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPHADDSW         ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPHSUBW          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPHSUBD          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPHSUBSW         ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPMADDUBSW       ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPMADDWD         ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPMAXSB          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPMAXSW          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPMAXSD          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPMAXUB          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPMAXUW          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPMAXUD          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPMINSB          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPMINSW          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPMINSD          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPMINUB          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPMINUW          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPMINUD          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPMOVMSKB        reg32,ymmreg             AVX2 
-       VPMOVMSKB        reg64,ymmreg             AVX2 
-       VPMOVSXBW        ymmreg,xmmrm128          AVX2 
-       VPMOVSXBD        ymmreg,mem64             AVX2 
-       VPMOVSXBD        ymmreg,xmmreg            AVX2 
-       VPMOVSXBQ        ymmreg,mem32             AVX2 
-       VPMOVSXBQ        ymmreg,xmmreg            AVX2 
-       VPMOVSXWD        ymmreg,xmmrm128          AVX2 
-       VPMOVSXWQ        ymmreg,mem64             AVX2 
-       VPMOVSXWQ        ymmreg,xmmreg            AVX2 
-       VPMOVSXDQ        ymmreg,xmmrm128          AVX2 
-       VPMOVZXBW        ymmreg,xmmrm128          AVX2 
-       VPMOVZXBD        ymmreg,mem64             AVX2 
-       VPMOVZXBD        ymmreg,xmmreg            AVX2 
-       VPMOVZXBQ        ymmreg,mem32             AVX2 
-       VPMOVZXBQ        ymmreg,xmmreg            AVX2 
-       VPMOVZXWD        ymmreg,xmmrm128          AVX2 
-       VPMOVZXWQ        ymmreg,mem64             AVX2 
-       VPMOVZXWQ        ymmreg,xmmreg            AVX2 
-       VPMOVZXDQ        ymmreg,xmmrm128          AVX2 
-       VPMULDQ          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPMULHRSW        ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPMULHUW         ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPMULHW          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPMULLW          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPMULLD          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPMULUDQ         ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPOR             ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPSADBW          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPSHUFB          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPSHUFD          ymmreg,ymmrm256,imm8     AVX2 
-       VPSHUFHW         ymmreg,ymmrm256,imm8     AVX2 
-       VPSHUFLW         ymmreg,ymmrm256,imm8     AVX2 
-       VPSIGNB          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPSIGNW          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPSIGND          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPSLLDQ          ymmreg,ymmreg*,imm8      AVX2 
-       VPSLLW           ymmreg,ymmreg*,xmmrm128  AVX2 
-       VPSLLW           ymmreg,ymmreg*,imm8      AVX2 
-       VPSLLD           ymmreg,ymmreg*,xmmrm128  AVX2 
-       VPSLLD           ymmreg,ymmreg*,imm8      AVX2 
-       VPSLLQ           ymmreg,ymmreg*,xmmrm128  AVX2 
-       VPSLLQ           ymmreg,ymmreg*,imm8      AVX2 
-       VPSRAW           ymmreg,ymmreg*,xmmrm128  AVX2 
-       VPSRAW           ymmreg,ymmreg*,imm8      AVX2 
-       VPSRAD           ymmreg,ymmreg*,xmmrm128  AVX2 
-       VPSRAD           ymmreg,ymmreg*,imm8      AVX2 
-       VPSRLDQ          ymmreg,ymmreg*,imm8      AVX2 
-       VPSRLW           ymmreg,ymmreg*,xmmrm128  AVX2 
-       VPSRLW           ymmreg,ymmreg*,imm8      AVX2 
-       VPSRLD           ymmreg,ymmreg*,xmmrm128  AVX2 
-       VPSRLD           ymmreg,ymmreg*,imm8      AVX2 
-       VPSRLQ           ymmreg,ymmreg*,xmmrm128  AVX2 
-       VPSRLQ           ymmreg,ymmreg*,imm8      AVX2 
-       VPSUBB           ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPSUBW           ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPSUBD           ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPSUBQ           ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPSUBSB          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPSUBSW          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPSUBUSB         ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPSUBUSW         ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPUNPCKHBW       ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPUNPCKHWD       ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPUNPCKHDQ       ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPUNPCKHQDQ      ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPUNPCKLBW       ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPUNPCKLWD       ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPUNPCKLDQ       ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPUNPCKLQDQ      ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPXOR            ymmreg,ymmreg*,ymmrm256  AVX2 
-       VMOVNTDQA        ymmreg,mem256            AVX2 
-       VBROADCASTSS     xmmreg,xmmreg            AVX2 
-       VBROADCASTSS     ymmreg,xmmreg            AVX2 
-       VBROADCASTSD     ymmreg,xmmreg            AVX2 
-       VBROADCASTI128   ymmreg,mem128            AVX2 
-       VPBLENDD         xmmreg,xmmreg*,xmmrm128,imm8 AVX2 
-       VPBLENDD         ymmreg,ymmreg*,ymmrm256,imm8 AVX2 
-       VPBROADCASTB     xmmreg,mem8              AVX2 
-       VPBROADCASTB     xmmreg,xmmreg            AVX2 
-       VPBROADCASTB     ymmreg,mem8              AVX2 
-       VPBROADCASTB     ymmreg,xmmreg            AVX2 
-       VPBROADCASTW     xmmreg,mem16             AVX2 
-       VPBROADCASTW     xmmreg,xmmreg            AVX2 
-       VPBROADCASTW     ymmreg,mem16             AVX2 
-       VPBROADCASTW     ymmreg,xmmreg            AVX2 
-       VPBROADCASTD     xmmreg,mem32             AVX2 
-       VPBROADCASTD     xmmreg,xmmreg            AVX2 
-       VPBROADCASTD     ymmreg,mem32             AVX2 
-       VPBROADCASTD     ymmreg,xmmreg            AVX2 
-       VPBROADCASTQ     xmmreg,mem64             AVX2 
-       VPBROADCASTQ     xmmreg,xmmreg            AVX2 
-       VPBROADCASTQ     ymmreg,mem64             AVX2 
-       VPBROADCASTQ     ymmreg,xmmreg            AVX2 
-       VPERMD           ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPERMPD          ymmreg,ymmrm256,imm8     AVX2 
-       VPERMPS          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPERMQ           ymmreg,ymmrm256,imm8     AVX2 
-       VPERM2I128       ymmreg,ymmreg*,ymmrm256,imm8 AVX2 
-       VEXTRACTI128     xmmrm128,ymmreg,imm8     AVX2 
-       VINSERTI128      ymmreg,ymmreg*,xmmrm128,imm8 AVX2 
-       VPMASKMOVD       xmmreg,xmmreg*,mem128    AVX2 
-       VPMASKMOVD       ymmreg,ymmreg*,mem256    AVX2 
-       VPMASKMOVQ       xmmreg,xmmreg*,mem128    AVX2 
-       VPMASKMOVQ       ymmreg,ymmreg*,mem256    AVX2 
-       VPMASKMOVD       mem128,xmmreg*,xmmreg    AVX2 
-       VPMASKMOVD       mem256,ymmreg*,ymmreg    AVX2 
-       VPMASKMOVQ       mem128,xmmreg*,xmmreg    AVX2 
-       VPMASKMOVQ       mem256,ymmreg*,ymmreg    AVX2 
-       VPSLLVD          xmmreg,xmmreg*,xmmrm128  AVX2 
-       VPSLLVQ          xmmreg,xmmreg*,xmmrm128  AVX2 
-       VPSLLVD          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPSLLVQ          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPSRAVD          xmmreg,xmmreg*,xmmrm128  AVX2 
-       VPSRAVD          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPSRLVD          xmmreg,xmmreg*,xmmrm128  AVX2 
-       VPSRLVQ          xmmreg,xmmreg*,xmmrm128  AVX2 
-       VPSRLVD          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VPSRLVQ          ymmreg,ymmreg*,ymmrm256  AVX2 
-       VGATHERDPD       xmmreg,xmem64,xmmreg     AVX2 
-       VGATHERQPD       xmmreg,xmem64,xmmreg     AVX2 
-       VGATHERDPD       ymmreg,xmem64,ymmreg     AVX2 
-       VGATHERQPD       ymmreg,ymem64,ymmreg     AVX2 
-       VGATHERDPS       xmmreg,xmem32,xmmreg     AVX2 
-       VGATHERQPS       xmmreg,xmem32,xmmreg     AVX2 
-       VGATHERDPS       ymmreg,ymem32,ymmreg     AVX2 
-       VGATHERQPS       xmmreg,ymem32,xmmreg     AVX2 
-       VPGATHERDD       xmmreg,xmem32,xmmreg     AVX2 
-       VPGATHERQD       xmmreg,xmem32,xmmreg     AVX2 
-       VPGATHERDD       ymmreg,ymem32,ymmreg     AVX2 
-       VPGATHERQD       xmmreg,ymem32,xmmreg     AVX2 
-       VPGATHERDQ       xmmreg,xmem64,xmmreg     AVX2 
-       VPGATHERQQ       xmmreg,xmem64,xmmreg     AVX2 
-       VPGATHERDQ       ymmreg,xmem64,ymmreg     AVX2 
-       VPGATHERQQ       ymmreg,ymem64,ymmreg     AVX2
-
-F.1.36 Intel Transactional Synchronization Extensions (TSX)
-
-       XABORT           imm                      RTM 
-       XABORT           imm8                     RTM 
-       XBEGIN           imm                      RTM 
-       XBEGIN           imm|near                 RTM,ND 
-       XBEGIN           imm16                    RTM,NOLONG 
-       XBEGIN           imm16|near               RTM,NOLONG,ND 
-       XBEGIN           imm32                    RTM,NOLONG 
-       XBEGIN           imm32|near               RTM,NOLONG,ND 
-       XBEGIN           imm64                    RTM,LONG 
-       XBEGIN           imm64|near               RTM,LONG,ND 
-       XEND                                      RTM 
-       XTEST                                     HLE,RTM
-
-F.1.37 Intel BMI1 and BMI2 instructions, AMD TBM instructions
-
-       ANDN             reg32,reg32,rm32         BMI1 
-       ANDN             reg64,reg64,rm64         LONG,BMI1 
-       BEXTR            reg32,rm32,reg32         BMI1 
-       BEXTR            reg64,rm64,reg64         LONG,BMI1 
-       BEXTR            reg32,rm32,imm32         TBM 
-       BEXTR            reg64,rm64,imm32         LONG,TBM 
-       BLCI             reg32,rm32               TBM 
-       BLCI             reg64,rm64               LONG,TBM 
-       BLCIC            reg32,rm32               TBM 
-       BLCIC            reg64,rm64               LONG,TBM 
-       BLSI             reg32,rm32               BMI1 
-       BLSI             reg64,rm64               LONG,BMI1 
-       BLSIC            reg32,rm32               TBM 
-       BLSIC            reg64,rm64               LONG,TBM 
-       BLCFILL          reg32,rm32               TBM 
-       BLCFILL          reg64,rm64               LONG,TBM 
-       BLSFILL          reg32,rm32               TBM 
-       BLSFILL          reg64,rm64               LONG,TBM 
-       BLCMSK           reg32,rm32               TBM 
-       BLCMSK           reg64,rm64               LONG,TBM 
-       BLSMSK           reg32,rm32               BMI1 
-       BLSMSK           reg64,rm64               LONG,BMI1 
-       BLSR             reg32,rm32               BMI1 
-       BLSR             reg64,rm64               LONG,BMI1 
-       BLCS             reg32,rm32               TBM 
-       BLCS             reg64,rm64               LONG,TBM 
-       BZHI             reg32,rm32,reg32         BMI2 
-       BZHI             reg64,rm64,reg64         LONG,BMI2 
-       MULX             reg32,reg32,rm32         BMI2 
-       MULX             reg64,reg64,rm64         LONG,BMI2 
-       PDEP             reg32,reg32,rm32         BMI2 
-       PDEP             reg64,reg64,rm64         LONG,BMI2 
-       PEXT             reg32,reg32,rm32         BMI2 
-       PEXT             reg64,reg64,rm64         LONG,BMI2 
-       RORX             reg32,rm32,imm8          BMI2 
-       RORX             reg64,rm64,imm8          LONG,BMI2 
-       SARX             reg32,rm32,reg32         BMI2 
-       SARX             reg64,rm64,reg64         LONG,BMI2 
-       SHLX             reg32,rm32,reg32         BMI2 
-       SHLX             reg64,rm64,reg64         LONG,BMI2 
-       SHRX             reg32,rm32,reg32         BMI2 
-       SHRX             reg64,rm64,reg64         LONG,BMI2 
-       TZCNT            reg16,rm16               BMI1 
-       TZCNT            reg32,rm32               BMI1 
-       TZCNT            reg64,rm64               LONG,BMI1 
-       TZMSK            reg32,rm32               TBM 
-       TZMSK            reg64,rm64               LONG,TBM 
-       T1MSKC           reg32,rm32               TBM 
-       T1MSKC           reg64,rm64               LONG,TBM 
-       PREFETCHWT1      mem8                     PREFETCHWT1
-
-F.1.38 Intel Memory Protection Extensions (MPX)
-
-       BNDMK            bndreg,mem               MPX,MIB 
-       BNDCL            bndreg,mem               MPX 
-       BNDCL            bndreg,reg32             MPX,NOLONG 
-       BNDCL            bndreg,reg64             MPX,LONG 
-       BNDCU            bndreg,mem               MPX 
-       BNDCU            bndreg,reg32             MPX,NOLONG 
-       BNDCU            bndreg,reg64             MPX,LONG 
-       BNDCN            bndreg,mem               MPX 
-       BNDCN            bndreg,reg32             MPX,NOLONG 
-       BNDCN            bndreg,reg64             MPX,LONG 
-       BNDMOV           bndreg,bndreg            MPX 
-       BNDMOV           bndreg,mem               MPX 
-       BNDMOV           bndreg,bndreg            MPX 
-       BNDMOV           mem,bndreg               MPX 
-       BNDLDX           bndreg,mem               MPX,MIB 
-       BNDLDX           bndreg,mem,reg32         MPX,MIB,NOLONG 
-       BNDLDX           bndreg,mem,reg64         MPX,MIB,LONG 
-       BNDSTX           mem,bndreg               MPX,MIB 
-       BNDSTX           mem,reg32,bndreg         MPX,MIB,NOLONG 
-       BNDSTX           mem,reg64,bndreg         MPX,MIB,LONG 
-       BNDSTX           mem,bndreg,reg32         MPX,MIB,NOLONG 
-       BNDSTX           mem,bndreg,reg64         MPX,MIB,LONG
-
-F.1.39 Intel SHA acceleration instructions
-
-       SHA1MSG1         xmmreg,xmmrm128          SHA 
-       SHA1MSG2         xmmreg,xmmrm128          SHA 
-       SHA1NEXTE        xmmreg,xmmrm128          SHA 
-       SHA1RNDS4        xmmreg,xmmrm128,imm8     SHA 
-       SHA256MSG1       xmmreg,xmmrm128          SHA 
-       SHA256MSG2       xmmreg,xmmrm128          SHA 
-       SHA256RNDS2      xmmreg,xmmrm128,xmm0     SHA 
-       SHA256RNDS2      xmmreg,xmmrm128          SHA
-
-F.1.40 AVX no exception conversions
-
-       VBCSTNEBF16PS    xmmreg,mem16             AVXNECONVERT,LATEVEX,SW 
-       VBCSTNEBF16PS    ymmreg,mem16             AVXNECONVERT,LATEVEX,SW 
-       VBCSTNESH2PS     xmmreg,mem16             AVXNECONVERT,LATEVEX,SW 
-       VBCSTNESH2PS     ymmreg,mem16             AVXNECONVERT,LATEVEX,SW 
-       VCVTNEEBF162PS   xmmreg,mem128            AVXNECONVERT,LATEVEX,SX 
-       VCVTNEEBF162PS   ymmreg,mem256            AVXNECONVERT,LATEVEX,SY 
-       VCVTNEEPH2PS     xmmreg,mem128            AVXNECONVERT,LATEVEX,SX 
-       VCVTNEEPH2PS     ymmreg,mem256            AVXNECONVERT,LATEVEX,SY 
-       VCVTNEOBF162PS   xmmreg,mem128            AVXNECONVERT,LATEVEX,SX 
-       VCVTNEOBF162PS   ymmreg,mem256            AVXNECONVERT,LATEVEX,SY 
-       VCVTNEOPH2PS     xmmreg,mem128            AVXNECONVERT,LATEVEX,SX 
-       VCVTNEOPH2PS     ymmreg,mem256            AVXNECONVERT,LATEVEX,SY 
-       VCVTNEPS2BF16    xmmreg,xmmrm128          AVXNECONVERT,LATEVEX,SX 
-       VCVTNEPS2BF16    ymmreg,ymmrm256          AVXNECONVERT,LATEVEX,SY
-
-F.1.41 AVX Vector Neural Network Instructions
-
-       VPDPBSSD         xmmreg,xmmreg,xmmrm128   AVXVNNIINT8,LATEVEX,SX 
-       VPDPBSSD         ymmreg,ymmreg,ymmrm256   AVXVNNIINT8,LATEVEX,SY 
-       VPDPBSSDS        xmmreg,xmmreg,xmmrm128   AVXVNNIINT8,LATEVEX,SX 
-       VPDPBSSDS        ymmreg,ymmreg,ymmrm256   AVXVNNIINT8,LATEVEX,SY 
-       VPDPBSUD         xmmreg,xmmreg,xmmrm128   AVXVNNIINT8,LATEVEX,SX 
-       VPDPBSUD         ymmreg,ymmreg,ymmrm256   AVXVNNIINT8,LATEVEX,SY 
-       VPDPBSUDS        xmmreg,xmmreg,xmmrm128   AVXVNNIINT8,LATEVEX,SX 
-       VPDPBSUDS        ymmreg,ymmreg,ymmrm256   AVXVNNIINT8,LATEVEX,SY 
-       VPDPBUUD         xmmreg,xmmreg,xmmrm128   AVXVNNIINT8,LATEVEX,SX 
-       VPDPBUUD         ymmreg,ymmreg,ymmrm256   AVXVNNIINT8,LATEVEX,SY 
-       VPDPBUUDS        xmmreg,xmmreg,xmmrm128   AVXVNNIINT8,LATEVEX,SX 
-       VPDPBUUDS        ymmreg,ymmreg,ymmrm256   AVXVNNIINT8,LATEVEX,SY
-
-F.1.42 AVX Integer Fused Multiply-Add
-
-       VPMADD52HUQ      xmmreg,xmmreg,xmmrm128   AVXIFMA,LATEVEX,SX 
-       VPMADD52HUQ      ymmreg,ymmreg,ymmrm256   AVXIFMA,LATEVEX,SY 
-       VPMADD52LUQ      xmmreg,xmmreg,xmmrm128   AVXIFMA,LATEVEX,SX 
-       VPMADD52LUQ      ymmreg,ymmreg,ymmrm256   AVXIFMA,LATEVEX,SY
-
-F.1.43 AVX-512 mask register instructions
-
-       KADDB            kreg,kreg,kreg            
-       KADDD            kreg,kreg,kreg            
-       KADDQ            kreg,kreg,kreg            
-       KADDW            kreg,kreg,kreg            
-       KANDB            kreg,kreg,kreg            
-       KANDD            kreg,kreg,kreg            
-       KANDNB           kreg,kreg,kreg            
-       KANDND           kreg,kreg,kreg            
-       KANDNQ           kreg,kreg,kreg            
-       KANDNW           kreg,kreg,kreg            
-       KANDQ            kreg,kreg,kreg            
-       KANDW            kreg,kreg,kreg            
-       KMOVB            kreg,krm8                 
-       KMOVB            mem8,kreg                 
-       KMOVB            kreg,reg32                
-       KMOVB            kreg,reg8                ND 
-       KMOVB            reg32,kreg                
-       KMOVD            kreg,krm32                
-       KMOVD            mem32,kreg                
-       KMOVD            kreg,reg32                
-       KMOVD            reg32,kreg                
-       KMOVQ            kreg,krm64                
-       KMOVQ            mem64,kreg                
-       KMOVQ            kreg,reg64                
-       KMOVQ            reg64,kreg                
-       KMOVW            kreg,krm16                
-       KMOVW            mem16,kreg                
-       KMOVW            kreg,reg32                
-       KMOVW            kreg,reg16               ND 
-       KMOVW            reg32,kreg                
-       KNOTB            kreg,kreg                 
-       KNOTD            kreg,kreg                 
-       KNOTQ            kreg,kreg                 
-       KNOTW            kreg,kreg                 
-       KORB             kreg,kreg,kreg            
-       KORD             kreg,kreg,kreg            
-       KORQ             kreg,kreg,kreg            
-       KORW             kreg,kreg,kreg            
-       KORTESTB         kreg,kreg                 
-       KORTESTD         kreg,kreg                 
-       KORTESTQ         kreg,kreg                 
-       KORTESTW         kreg,kreg                 
-       KSHIFTLB         kreg,kreg,imm8            
-       KSHIFTLD         kreg,kreg,imm8            
-       KSHIFTLQ         kreg,kreg,imm8            
-       KSHIFTLW         kreg,kreg,imm8            
-       KSHIFTRB         kreg,kreg,imm8            
-       KSHIFTRD         kreg,kreg,imm8            
-       KSHIFTRQ         kreg,kreg,imm8            
-       KSHIFTRW         kreg,kreg,imm8            
-       KTESTB           kreg,kreg                 
-       KTESTD           kreg,kreg                 
-       KTESTQ           kreg,kreg                 
-       KTESTW           kreg,kreg                 
-       KUNPCKBW         kreg,kreg,kreg            
-       KUNPCKDQ         kreg,kreg,kreg            
-       KUNPCKWD         kreg,kreg,kreg            
-       KXNORB           kreg,kreg,kreg            
-       KXNORD           kreg,kreg,kreg            
-       KXNORQ           kreg,kreg,kreg            
-       KXNORW           kreg,kreg,kreg            
-       KXORB            kreg,kreg,kreg            
-       KXORD            kreg,kreg,kreg            
-       KXORQ            kreg,kreg,kreg            
-       KXORW            kreg,kreg,kreg           
-
-F.1.44 AVX-512 mask register instructions (aliases requiring explicit size support)
-
-       KADD             kreg8,kreg,kreg          ND 
-       KADD             kreg32,kreg,kreg         ND 
-       KADD             kreg64,kreg,kreg         ND 
-       KADD             kreg16,kreg,kreg         ND 
-       KAND             kreg8,kreg,kreg          ND 
-       KAND             kreg32,kreg,kreg         ND 
-       KANDN            kreg64,kreg,kreg         ND 
-       KANDN            kreg16,kreg,kreg         ND 
-       KANDN            kreg8,kreg,kreg          ND 
-       KANDN            kreg32,kreg,kreg         ND 
-       KAND             kreg64,kreg,kreg         ND 
-       KAND             kreg16,kreg,kreg         ND 
-       KMOV             kreg8,krm8               ND 
-       KMOV             mem8,kreg8               ND 
-       KMOV             kreg8,reg32              ND,SX 
-       KMOV             kreg8,reg8               ND 
-       KMOV             reg32,kreg8              ND,SX 
-       KMOV             kreg32,krm32             ND 
-       KMOV             mem32,kreg32             ND 
-       KMOV             kreg32,reg32             ND 
-       KMOV             reg32,kreg32             ND 
-       KMOV             kreg64,krm64             ND 
-       KMOV             mem64,kreg64             ND 
-       KMOV             kreg64,reg64             ND 
-       KMOV             reg64,kreg64             ND 
-       KMOV             kreg16,krm16             ND 
-       KMOV             mem16,kreg16             ND 
-       KMOV             kreg16,reg32             ND,SX 
-       KMOV             reg32,kreg16             ND,SX 
-       KMOV             kreg16,reg32             ND,SX 
-       KMOV             kreg16,reg16             ND 
-       KNOT             kreg8,kreg8              ND 
-       KNOT             kreg32,kreg32            ND 
-       KNOT             kreg64,kreg64            ND 
-       KNOT             kreg16,kreg16            ND 
-       KOR              kreg8,kreg,kreg          ND 
-       KOR              kreg32,kreg,kreg         ND 
-       KOR              kreg64,kreg,kreg         ND 
-       KOR              kreg16,kreg,kreg         ND 
-       KORTEST          kreg8,kreg               ND 
-       KORTEST          kreg32,kreg              ND 
-       KORTEST          kreg64,kreg              ND 
-       KORTEST          kreg16,kreg              ND 
-       KSHIFTL          kreg8,kreg,imm8          ND 
-       KSHIFTL          kreg32,kreg,imm8         ND 
-       KSHIFTL          kreg64,kreg,imm8         ND 
-       KSHIFTL          kreg16,kreg,imm8         ND 
-       KSHIFTR          kreg8,kreg,imm8          ND 
-       KSHIFTR          kreg32,kreg,imm8         ND 
-       KSHIFTR          kreg64,kreg,imm8         ND 
-       KSHIFTR          kreg16,kreg,imm8         ND 
-       KTEST            kreg8,kreg               ND 
-       KTEST            kreg32,kreg              ND 
-       KTEST            kreg64,kreg              ND 
-       KTEST            kreg16,kreg              ND 
-       KUNPCK           kreg16,kreg8,kreg8       ND 
-       KUNPCK           kreg64,kreg32,kreg32     ND 
-       KUNPCK           kreg32,kreg16,kreg16     ND 
-       KXNOR            kreg8,kreg,kreg          ND 
-       KXNOR            kreg32,kreg,kreg         ND 
-       KXNOR            kreg64,kreg,kreg         ND 
-       KXNOR            kreg16,kreg,kreg         ND 
-       KXOR             kreg8,kreg,kreg          ND 
-       KXOR             kreg32,kreg,kreg         ND 
-       KXOR             kreg64,kreg,kreg         ND 
-       KXOR             kreg16,kreg,kreg         ND
-
-F.1.45 AVX-512 instructions
-
-       VADDPD           xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VADDPD           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VADDPD           zmmreg|mask|z,zmmreg*,zmmrm512|b64|er AVX512 
-       VADDPS           xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VADDPS           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VADDPS           zmmreg|mask|z,zmmreg*,zmmrm512|b32|er AVX512 
-       VADDSD           xmmreg|mask|z,xmmreg*,xmmrm64|er AVX512 
-       VADDSS           xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512 
-       VALIGND          xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 AVX512VL 
-       VALIGND          ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 AVX512VL 
-       VALIGND          zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 AVX512 
-       VALIGNQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 AVX512VL 
-       VALIGNQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VL 
-       VALIGNQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 AVX512 
-       VANDNPD          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL/DQ 
-       VANDNPD          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL/DQ 
-       VANDNPD          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512DQ 
-       VANDNPS          xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL/DQ 
-       VANDNPS          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL/DQ 
-       VANDNPS          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512DQ 
-       VANDPD           xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL/DQ 
-       VANDPD           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL/DQ 
-       VANDPD           zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512DQ 
-       VANDPS           xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL/DQ 
-       VANDPS           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL/DQ 
-       VANDPS           zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512DQ 
-       VBLENDMPD        xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-       VBLENDMPD        ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-       VBLENDMPD        zmmreg|mask|z,zmmreg,zmmrm512|b64 AVX512 
-       VBLENDMPS        xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-       VBLENDMPS        ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-       VBLENDMPS        zmmreg|mask|z,zmmreg,zmmrm512|b32 AVX512 
-       VBROADCASTF32X2  ymmreg|mask|z,xmmrm64    AVX512VL/DQ 
-       VBROADCASTF32X2  zmmreg|mask|z,xmmrm64    AVX512DQ 
-       VBROADCASTF32X4  ymmreg|mask|z,mem128     AVX512VL 
-       VBROADCASTF32X4  zmmreg|mask|z,mem128     AVX512 
-       VBROADCASTF32X8  zmmreg|mask|z,mem256     AVX512DQ 
-       VBROADCASTF64X2  ymmreg|mask|z,mem128     AVX512VL/DQ 
-       VBROADCASTF64X2  zmmreg|mask|z,mem128     AVX512DQ 
-       VBROADCASTF64X4  zmmreg|mask|z,mem256     AVX512 
-       VBROADCASTI32X2  xmmreg|mask|z,xmmrm64    AVX512VL/DQ 
-       VBROADCASTI32X2  ymmreg|mask|z,xmmrm64    AVX512VL/DQ 
-       VBROADCASTI32X2  zmmreg|mask|z,xmmrm64    AVX512DQ 
-       VBROADCASTI32X4  ymmreg|mask|z,mem128     AVX512VL 
-       VBROADCASTI32X4  zmmreg|mask|z,mem128     AVX512 
-       VBROADCASTI32X8  zmmreg|mask|z,mem256     AVX512DQ 
-       VBROADCASTI64X2  ymmreg|mask|z,mem128     AVX512VL/DQ 
-       VBROADCASTI64X2  zmmreg|mask|z,mem128     AVX512DQ 
-       VBROADCASTI64X4  zmmreg|mask|z,mem256     AVX512 
-       VBROADCASTSD     ymmreg|mask|z,mem64      AVX512VL 
-       VBROADCASTSD     zmmreg|mask|z,mem64      AVX512 
-       VBROADCASTSD     ymmreg|mask|z,xmmreg     AVX512VL 
-       VBROADCASTSD     zmmreg|mask|z,xmmreg     AVX512 
-       VBROADCASTSS     xmmreg|mask|z,mem32      AVX512VL 
-       VBROADCASTSS     ymmreg|mask|z,mem32      AVX512VL 
-       VBROADCASTSS     zmmreg|mask|z,mem32      AVX512 
-       VBROADCASTSS     xmmreg|mask|z,xmmreg     AVX512VL 
-       VBROADCASTSS     ymmreg|mask|z,xmmreg     AVX512VL 
-       VBROADCASTSS     zmmreg|mask|z,xmmreg     AVX512 
-       VCMPEQPD         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPEQPD         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPEQPD         kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPEQPS         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPEQPS         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPEQPS         kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPEQSD         kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPEQSS         kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPEQ_OQPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPEQ_OQPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPEQ_OQPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPEQ_OQPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPEQ_OQPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPEQ_OQPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPEQ_OQSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPEQ_OQSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPLTPD         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPLTPD         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPLTPD         kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPLTPS         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPLTPS         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPLTPS         kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPLTSD         kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPLTSS         kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPLT_OSPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPLT_OSPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPLT_OSPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPLT_OSPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPLT_OSPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPLT_OSPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPLT_OSSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPLT_OSSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPLEPD         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPLEPD         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPLEPD         kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPLEPS         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPLEPS         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPLEPS         kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPLESD         kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPLESS         kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPLE_OSPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPLE_OSPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPLE_OSPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPLE_OSPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPLE_OSPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPLE_OSPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPLE_OSSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPLE_OSSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPUNORDPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPUNORDPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPUNORDPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPUNORDPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPUNORDPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPUNORDPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPUNORDSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPUNORDSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPUNORD_QPD    kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPUNORD_QPD    kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPUNORD_QPD    kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPUNORD_QPS    kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPUNORD_QPS    kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPUNORD_QPS    kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPUNORD_QSD    kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPUNORD_QSS    kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPNEQPD        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPNEQPD        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPNEQPD        kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPNEQPS        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPNEQPS        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPNEQPS        kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPNEQSD        kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPNEQSS        kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPNEQ_UQPD     kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPNEQ_UQPD     kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPNEQ_UQPD     kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPNEQ_UQPS     kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPNEQ_UQPS     kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPNEQ_UQPS     kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPNEQ_UQSD     kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPNEQ_UQSS     kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPNLTPD        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPNLTPD        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPNLTPD        kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPNLTPS        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPNLTPS        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPNLTPS        kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPNLTSD        kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPNLTSS        kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPNLT_USPD     kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPNLT_USPD     kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPNLT_USPD     kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPNLT_USPS     kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPNLT_USPS     kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPNLT_USPS     kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPNLT_USSD     kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPNLT_USSS     kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPNLEPD        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPNLEPD        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPNLEPD        kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPNLEPS        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPNLEPS        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPNLEPS        kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPNLESD        kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPNLESS        kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPNLE_USPD     kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPNLE_USPD     kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPNLE_USPD     kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPNLE_USPS     kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPNLE_USPS     kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPNLE_USPS     kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPNLE_USSD     kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPNLE_USSS     kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPORDPD        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPORDPD        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPORDPD        kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPORDPS        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPORDPS        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPORDPS        kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPORDSD        kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPORDSS        kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPORD_QPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPORD_QPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPORD_QPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPORD_QPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPORD_QPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPORD_QPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPORD_QSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPORD_QSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPEQ_UQPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPEQ_UQPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPEQ_UQPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPEQ_UQPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPEQ_UQPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPEQ_UQPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPEQ_UQSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPEQ_UQSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPNGEPD        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPNGEPD        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPNGEPD        kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPNGEPS        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPNGEPS        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPNGEPS        kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPNGESD        kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPNGESS        kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPNGE_USPD     kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPNGE_USPD     kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPNGE_USPD     kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPNGE_USPS     kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPNGE_USPS     kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPNGE_USPS     kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPNGE_USSD     kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPNGE_USSS     kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPNGTPD        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPNGTPD        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPNGTPD        kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPNGTPS        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPNGTPS        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPNGTPS        kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPNGTSD        kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPNGTSS        kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPNGT_USPD     kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPNGT_USPD     kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPNGT_USPD     kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPNGT_USPS     kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPNGT_USPS     kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPNGT_USPS     kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPNGT_USSD     kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPNGT_USSS     kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPFALSEPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPFALSEPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPFALSEPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPFALSEPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPFALSEPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPFALSEPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPFALSESD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPFALSESS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPFALSE_OQPD   kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPFALSE_OQPD   kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPFALSE_OQPD   kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPFALSE_OQPS   kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPFALSE_OQPS   kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPFALSE_OQPS   kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPFALSE_OQSD   kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPFALSE_OQSS   kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPNEQ_OQPD     kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPNEQ_OQPD     kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPNEQ_OQPD     kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPNEQ_OQPS     kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPNEQ_OQPS     kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPNEQ_OQPS     kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPNEQ_OQSD     kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPNEQ_OQSS     kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPGEPD         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPGEPD         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPGEPD         kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPGEPS         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPGEPS         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPGEPS         kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPGESD         kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPGESS         kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPGE_OSPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPGE_OSPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPGE_OSPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPGE_OSPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPGE_OSPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPGE_OSPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPGE_OSSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPGE_OSSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPGTPD         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPGTPD         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPGTPD         kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPGTPS         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPGTPS         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPGTPS         kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPGTSD         kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPGTSS         kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPGT_OSPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPGT_OSPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPGT_OSPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPGT_OSPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPGT_OSPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPGT_OSPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPGT_OSSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPGT_OSSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPTRUEPD       kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPTRUEPD       kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPTRUEPD       kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPTRUEPS       kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPTRUEPS       kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPTRUEPS       kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPTRUESD       kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPTRUESS       kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPTRUE_UQPD    kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPTRUE_UQPD    kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPTRUE_UQPD    kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPTRUE_UQPS    kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPTRUE_UQPS    kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPTRUE_UQPS    kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPTRUE_UQSD    kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPTRUE_UQSS    kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPEQ_OSPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPEQ_OSPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPEQ_OSPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPEQ_OSPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPEQ_OSPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPEQ_OSPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPEQ_OSSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPEQ_OSSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPLT_OQPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPLT_OQPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPLT_OQPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPLT_OQPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPLT_OQPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPLT_OQPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPLT_OQSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPLT_OQSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPLE_OQPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPLE_OQPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPLE_OQPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPLE_OQPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPLE_OQPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPLE_OQPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPLE_OQSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPLE_OQSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPUNORD_SPD    kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPUNORD_SPD    kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPUNORD_SPD    kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPUNORD_SPS    kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPUNORD_SPS    kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPUNORD_SPS    kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPUNORD_SSD    kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPUNORD_SSS    kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPNEQ_USPD     kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPNEQ_USPD     kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPNEQ_USPD     kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPNEQ_USPS     kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPNEQ_USPS     kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPNEQ_USPS     kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPNEQ_USSD     kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPNEQ_USSS     kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPNLT_UQPD     kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPNLT_UQPD     kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPNLT_UQPD     kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPNLT_UQPS     kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPNLT_UQPS     kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPNLT_UQPS     kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPNLT_UQSD     kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPNLT_UQSS     kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPNLE_UQPD     kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPNLE_UQPD     kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPNLE_UQPD     kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPNLE_UQPS     kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPNLE_UQPS     kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPNLE_UQPS     kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPNLE_UQSD     kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPNLE_UQSS     kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPORD_SPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPORD_SPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPORD_SPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPORD_SPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPORD_SPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPORD_SPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPORD_SSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPORD_SSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPEQ_USPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPEQ_USPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPEQ_USPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPEQ_USPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPEQ_USPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPEQ_USPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPEQ_USSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPEQ_USSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPNGE_UQPD     kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPNGE_UQPD     kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPNGE_UQPD     kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPNGE_UQPS     kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPNGE_UQPS     kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPNGE_UQPS     kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPNGE_UQSD     kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPNGE_UQSS     kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPNGT_UQPD     kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPNGT_UQPD     kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPNGT_UQPD     kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPNGT_UQPS     kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPNGT_UQPS     kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPNGT_UQPS     kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPNGT_UQSD     kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPNGT_UQSS     kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPFALSE_OSPD   kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPFALSE_OSPD   kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPFALSE_OSPD   kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPFALSE_OSPS   kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPFALSE_OSPS   kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPFALSE_OSPS   kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPFALSE_OSSD   kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPFALSE_OSSS   kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPNEQ_OSPD     kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPNEQ_OSPD     kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPNEQ_OSPD     kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPNEQ_OSPS     kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPNEQ_OSPS     kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPNEQ_OSPS     kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPNEQ_OSSD     kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPNEQ_OSSS     kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPGE_OQPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPGE_OQPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPGE_OQPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPGE_OQPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPGE_OQPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPGE_OQPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPGE_OQSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPGE_OQSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPGT_OQPD      kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPGT_OQPD      kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPGT_OQPD      kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPGT_OQPS      kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPGT_OQPS      kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPGT_OQPS      kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPGT_OQSD      kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPGT_OQSS      kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPTRUE_USPD    kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VCMPTRUE_USPD    kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VCMPTRUE_USPD    kreg|mask,zmmreg,zmmrm512|b64|sae AVX512 
-       VCMPTRUE_USPS    kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VCMPTRUE_USPS    kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VCMPTRUE_USPS    kreg|mask,zmmreg,zmmrm512|b32|sae AVX512 
-       VCMPTRUE_USSD    kreg|mask,xmmreg,xmmrm64|sae AVX512 
-       VCMPTRUE_USSS    kreg|mask,xmmreg,xmmrm32|sae AVX512 
-       VCMPPD           kreg|mask,xmmreg,xmmrm128|b64,imm8 AVX512VL 
-       VCMPPD           kreg|mask,ymmreg,ymmrm256|b64,imm8 AVX512VL 
-       VCMPPD           kreg|mask,zmmreg,zmmrm512|b64|sae,imm8 AVX512 
-       VCMPPS           kreg|mask,xmmreg,xmmrm128|b32,imm8 AVX512VL 
-       VCMPPS           kreg|mask,ymmreg,ymmrm256|b32,imm8 AVX512VL 
-       VCMPPS           kreg|mask,zmmreg,zmmrm512|b32|sae,imm8 AVX512 
-       VCMPSD           kreg|mask,xmmreg,xmmrm64|sae,imm8 AVX512 
-       VCMPSS           kreg|mask,xmmreg,xmmrm32|sae,imm8 AVX512 
-       VCOMISD          xmmreg,xmmrm64|sae       AVX512 
-       VCOMISS          xmmreg,xmmrm32|sae       AVX512 
-       VCOMPRESSPD      mem128|mask,xmmreg       AVX512VL 
-       VCOMPRESSPD      mem256|mask,ymmreg       AVX512VL 
-       VCOMPRESSPD      mem512|mask,zmmreg       AVX512 
-       VCOMPRESSPD      xmmreg|mask|z,xmmreg     AVX512VL 
-       VCOMPRESSPD      ymmreg|mask|z,ymmreg     AVX512VL 
-       VCOMPRESSPD      zmmreg|mask|z,zmmreg     AVX512 
-       VCOMPRESSPS      mem128|mask,xmmreg       AVX512VL 
-       VCOMPRESSPS      mem256|mask,ymmreg       AVX512VL 
-       VCOMPRESSPS      mem512|mask,zmmreg       AVX512 
-       VCOMPRESSPS      xmmreg|mask|z,xmmreg     AVX512VL 
-       VCOMPRESSPS      ymmreg|mask|z,ymmreg     AVX512VL 
-       VCOMPRESSPS      zmmreg|mask|z,zmmreg     AVX512 
-       VCVTDQ2PD        xmmreg|mask|z,xmmrm64|b32 AVX512VL 
-       VCVTDQ2PD        ymmreg|mask|z,xmmrm128|b32 AVX512VL 
-       VCVTDQ2PD        zmmreg|mask|z,ymmrm256|b32|er AVX512 
-       VCVTDQ2PS        xmmreg|mask|z,xmmrm128|b32 AVX512VL 
-       VCVTDQ2PS        ymmreg|mask|z,ymmrm256|b32 AVX512VL 
-       VCVTDQ2PS        zmmreg|mask|z,zmmrm512|b32|er AVX512 
-       VCVTPD2DQ        xmmreg|mask|z,xmmrm128|b64 AVX512VL 
-       VCVTPD2DQ        xmmreg|mask|z,ymmrm256|b64 AVX512VL 
-       VCVTPD2DQ        ymmreg|mask|z,zmmrm512|b64|er AVX512 
-       VCVTPD2PS        xmmreg|mask|z,xmmrm128|b64 AVX512VL 
-       VCVTPD2PS        xmmreg|mask|z,ymmrm256|b64 AVX512VL 
-       VCVTPD2PS        ymmreg|mask|z,zmmrm512|b64|er AVX512 
-       VCVTPD2QQ        xmmreg|mask|z,xmmrm128|b64 AVX512VL/DQ 
-       VCVTPD2QQ        ymmreg|mask|z,ymmrm256|b64 AVX512VL/DQ 
-       VCVTPD2QQ        zmmreg|mask|z,zmmrm512|b64|er AVX512DQ 
-       VCVTPD2UDQ       xmmreg|mask|z,xmmrm128|b64 AVX512VL 
-       VCVTPD2UDQ       xmmreg|mask|z,ymmrm256|b64 AVX512VL 
-       VCVTPD2UDQ       ymmreg|mask|z,zmmrm512|b64|er AVX512 
-       VCVTPD2UQQ       xmmreg|mask|z,xmmrm128|b64 AVX512VL/DQ 
-       VCVTPD2UQQ       ymmreg|mask|z,ymmrm256|b64 AVX512VL/DQ 
-       VCVTPD2UQQ       zmmreg|mask|z,zmmrm512|b64|er AVX512DQ 
-       VCVTPH2PS        xmmreg|mask|z,xmmrm64    AVX512VL 
-       VCVTPH2PS        ymmreg|mask|z,xmmrm128   AVX512VL 
-       VCVTPH2PS        zmmreg|mask|z,ymmrm256|sae AVX512 
-       VCVTPS2DQ        xmmreg|mask|z,xmmrm128|b32 AVX512VL 
-       VCVTPS2DQ        ymmreg|mask|z,ymmrm256|b32 AVX512VL 
-       VCVTPS2DQ        zmmreg|mask|z,zmmrm512|b32|er AVX512 
-       VCVTPS2PD        xmmreg|mask|z,xmmrm64|b32 AVX512VL 
-       VCVTPS2PD        ymmreg|mask|z,xmmrm128|b32 AVX512VL 
-       VCVTPS2PD        zmmreg|mask|z,ymmrm256|b32|sae AVX512 
-       VCVTPS2PH        xmmreg|mask|z,xmmreg,imm8 AVX512VL 
-       VCVTPS2PH        xmmreg|mask|z,ymmreg,imm8 AVX512VL 
-       VCVTPS2PH        ymmreg|mask|z,zmmreg|sae,imm8 AVX512 
-       VCVTPS2PH        mem64|mask,xmmreg,imm8   AVX512VL 
-       VCVTPS2PH        mem128|mask,ymmreg,imm8  AVX512VL 
-       VCVTPS2PH        mem256|mask,zmmreg|sae,imm8 AVX512 
-       VCVTPS2QQ        xmmreg|mask|z,xmmrm64|b32 AVX512VL/DQ 
-       VCVTPS2QQ        ymmreg|mask|z,xmmrm128|b32 AVX512VL/DQ 
-       VCVTPS2QQ        zmmreg|mask|z,ymmrm256|b32|er AVX512DQ 
-       VCVTPS2UDQ       xmmreg|mask|z,xmmrm128|b32 AVX512VL 
-       VCVTPS2UDQ       ymmreg|mask|z,ymmrm256|b32 AVX512VL 
-       VCVTPS2UDQ       zmmreg|mask|z,zmmrm512|b32|er AVX512 
-       VCVTPS2UQQ       xmmreg|mask|z,xmmrm64|b32 AVX512VL/DQ 
-       VCVTPS2UQQ       ymmreg|mask|z,xmmrm128|b32 AVX512VL/DQ 
-       VCVTPS2UQQ       zmmreg|mask|z,ymmrm256|b32|er AVX512DQ 
-       VCVTQQ2PD        xmmreg|mask|z,xmmrm128|b64 AVX512VL/DQ 
-       VCVTQQ2PD        ymmreg|mask|z,ymmrm256|b64 AVX512VL/DQ 
-       VCVTQQ2PD        zmmreg|mask|z,zmmrm512|b64|er AVX512DQ 
-       VCVTQQ2PS        xmmreg|mask|z,xmmrm128|b64 AVX512VL/DQ 
-       VCVTQQ2PS        xmmreg|mask|z,ymmrm256|b64 AVX512VL/DQ 
-       VCVTQQ2PS        ymmreg|mask|z,zmmrm512|b64|er AVX512DQ 
-       VCVTSD2SI        reg32,xmmrm64|er         AVX512 
-       VCVTSD2SI        reg64,xmmrm64|er         AVX512 
-       VCVTSD2SS        xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-       VCVTSD2USI       reg32,xmmrm64|er         AVX512 
-       VCVTSD2USI       reg64,xmmrm64|er         AVX512 
-       VCVTSI2SD        xmmreg,xmmreg|er,rm32    AVX512 
-       VCVTSI2SD        xmmreg,xmmreg|er,rm64    AVX512 
-       VCVTSI2SS        xmmreg,xmmreg|er,rm32    AVX512 
-       VCVTSI2SS        xmmreg,xmmreg|er,rm64    AVX512 
-       VCVTSS2SD        xmmreg|mask|z,xmmreg,xmmrm32|sae AVX512 
-       VCVTSS2SI        reg32,xmmrm32|er         AVX512 
-       VCVTSS2SI        reg64,xmmrm32|er         AVX512 
-       VCVTSS2USI       reg32,xmmrm32|er         AVX512 
-       VCVTSS2USI       reg64,xmmrm32|er         AVX512 
-       VCVTTPD2DQ       xmmreg|mask|z,xmmrm128|b64 AVX512VL 
-       VCVTTPD2DQ       xmmreg|mask|z,ymmrm256|b64 AVX512VL 
-       VCVTTPD2DQ       ymmreg|mask|z,zmmrm512|b64|sae AVX512 
-       VCVTTPD2QQ       xmmreg|mask|z,xmmrm128|b64 AVX512VL/DQ 
-       VCVTTPD2QQ       ymmreg|mask|z,ymmrm256|b64 AVX512VL/DQ 
-       VCVTTPD2QQ       zmmreg|mask|z,zmmrm512|b64|sae AVX512DQ 
-       VCVTTPD2UDQ      xmmreg|mask|z,xmmrm128|b64 AVX512VL 
-       VCVTTPD2UDQ      xmmreg|mask|z,ymmrm256|b64 AVX512VL 
-       VCVTTPD2UDQ      ymmreg|mask|z,zmmrm512|b64|sae AVX512 
-       VCVTTPD2UQQ      xmmreg|mask|z,xmmrm128|b64 AVX512VL/DQ 
-       VCVTTPD2UQQ      ymmreg|mask|z,ymmrm256|b64 AVX512VL/DQ 
-       VCVTTPD2UQQ      zmmreg|mask|z,zmmrm512|b64|sae AVX512DQ 
-       VCVTTPS2DQ       xmmreg|mask|z,xmmrm128|b32 AVX512VL 
-       VCVTTPS2DQ       ymmreg|mask|z,ymmrm256|b32 AVX512VL 
-       VCVTTPS2DQ       zmmreg|mask|z,zmmrm512|b32|sae AVX512 
-       VCVTTPS2QQ       xmmreg|mask|z,xmmrm64|b32 AVX512VL/DQ 
-       VCVTTPS2QQ       ymmreg|mask|z,xmmrm128|b32 AVX512VL/DQ 
-       VCVTTPS2QQ       zmmreg|mask|z,ymmrm256|b32|sae AVX512DQ 
-       VCVTTPS2UDQ      xmmreg|mask|z,xmmrm128|b32 AVX512VL 
-       VCVTTPS2UDQ      ymmreg|mask|z,ymmrm256|b32 AVX512VL 
-       VCVTTPS2UDQ      zmmreg|mask|z,zmmrm512|b32|sae AVX512 
-       VCVTTPS2UQQ      xmmreg|mask|z,xmmrm64|b32 AVX512VL/DQ 
-       VCVTTPS2UQQ      ymmreg|mask|z,xmmrm128|b32 AVX512VL/DQ 
-       VCVTTPS2UQQ      zmmreg|mask|z,ymmrm256|b32|sae AVX512DQ 
-       VCVTTSD2SI       reg32,xmmrm64|sae        AVX512 
-       VCVTTSD2SI       reg64,xmmrm64|sae        AVX512 
-       VCVTTSD2USI      reg32,xmmrm64|sae        AVX512 
-       VCVTTSD2USI      reg64,xmmrm64|sae        AVX512 
-       VCVTTSS2SI       reg32,xmmrm32|sae        AVX512 
-       VCVTTSS2SI       reg64,xmmrm32|sae        AVX512 
-       VCVTTSS2USI      reg32,xmmrm32|sae        AVX512 
-       VCVTTSS2USI      reg64,xmmrm32|sae        AVX512 
-       VCVTUDQ2PD       xmmreg|mask|z,xmmrm64|b32 AVX512VL 
-       VCVTUDQ2PD       ymmreg|mask|z,xmmrm128|b32 AVX512VL 
-       VCVTUDQ2PD       zmmreg|mask|z,ymmrm256|b32|er AVX512 
-       VCVTUDQ2PS       xmmreg|mask|z,xmmrm128|b32 AVX512VL 
-       VCVTUDQ2PS       ymmreg|mask|z,ymmrm256|b32 AVX512VL 
-       VCVTUDQ2PS       zmmreg|mask|z,zmmrm512|b32|er AVX512 
-       VCVTUQQ2PD       xmmreg|mask|z,xmmrm128|b64 AVX512VL/DQ 
-       VCVTUQQ2PD       ymmreg|mask|z,ymmrm256|b64 AVX512VL/DQ 
-       VCVTUQQ2PD       zmmreg|mask|z,zmmrm512|b64|er AVX512DQ 
-       VCVTUQQ2PS       xmmreg|mask|z,xmmrm128|b64 AVX512VL/DQ 
-       VCVTUQQ2PS       xmmreg|mask|z,ymmrm256|b64 AVX512VL/DQ 
-       VCVTUQQ2PS       ymmreg|mask|z,zmmrm512|b64|er AVX512DQ 
-       VCVTUSI2SD       xmmreg,xmmreg|er,rm32    AVX512 
-       VCVTUSI2SD       xmmreg,xmmreg|er,rm64    AVX512 
-       VCVTUSI2SS       xmmreg,xmmreg|er,rm32    AVX512 
-       VCVTUSI2SS       xmmreg,xmmreg|er,rm64    AVX512 
-       VDBPSADBW        xmmreg|mask|z,xmmreg*,xmmrm128,imm8 AVX512VL/BW 
-       VDBPSADBW        ymmreg|mask|z,ymmreg*,ymmrm256,imm8 AVX512VL/BW 
-       VDBPSADBW        zmmreg|mask|z,zmmreg*,zmmrm512,imm8 AVX512BW 
-       VDIVPD           xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VDIVPD           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VDIVPD           zmmreg|mask|z,zmmreg*,zmmrm512|b64|er AVX512 
-       VDIVPS           xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VDIVPS           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VDIVPS           zmmreg|mask|z,zmmreg*,zmmrm512|b32|er AVX512 
-       VDIVSD           xmmreg|mask|z,xmmreg*,xmmrm64|er AVX512 
-       VDIVSS           xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512 
-       VEXP2PD          zmmreg|mask|z,zmmrm512|b64|sae AVX512ER 
-       VEXP2PS          zmmreg|mask|z,zmmrm512|b32|sae AVX512ER 
-       VEXPANDPD        xmmreg|mask|z,mem128     AVX512VL 
-       VEXPANDPD        ymmreg|mask|z,mem256     AVX512VL 
-       VEXPANDPD        zmmreg|mask|z,mem512     AVX512 
-       VEXPANDPD        xmmreg|mask|z,xmmreg     AVX512VL 
-       VEXPANDPD        ymmreg|mask|z,ymmreg     AVX512VL 
-       VEXPANDPD        zmmreg|mask|z,zmmreg     AVX512 
-       VEXPANDPS        xmmreg|mask|z,mem128     AVX512VL 
-       VEXPANDPS        ymmreg|mask|z,mem256     AVX512VL 
-       VEXPANDPS        zmmreg|mask|z,mem512     AVX512 
-       VEXPANDPS        xmmreg|mask|z,xmmreg     AVX512VL 
-       VEXPANDPS        ymmreg|mask|z,ymmreg     AVX512VL 
-       VEXPANDPS        zmmreg|mask|z,zmmreg     AVX512 
-       VEXTRACTF32X4    xmmreg|mask|z,ymmreg,imm8 AVX512VL 
-       VEXTRACTF32X4    xmmreg|mask|z,zmmreg,imm8 AVX512 
-       VEXTRACTF32X4    mem128|mask,ymmreg,imm8  AVX512VL 
-       VEXTRACTF32X4    mem128|mask,zmmreg,imm8  AVX512 
-       VEXTRACTF32X8    ymmreg|mask|z,zmmreg,imm8 AVX512DQ 
-       VEXTRACTF32X8    mem256|mask,zmmreg,imm8  AVX512DQ 
-       VEXTRACTF64X2    xmmreg|mask|z,ymmreg,imm8 AVX512VL/DQ 
-       VEXTRACTF64X2    xmmreg|mask|z,zmmreg,imm8 AVX512DQ 
-       VEXTRACTF64X2    mem128|mask,ymmreg,imm8  AVX512VL/DQ 
-       VEXTRACTF64X2    mem128|mask,zmmreg,imm8  AVX512DQ 
-       VEXTRACTF64X4    ymmreg|mask|z,zmmreg,imm8 AVX512 
-       VEXTRACTF64X4    mem256|mask,zmmreg,imm8  AVX512 
-       VEXTRACTI32X4    xmmreg|mask|z,ymmreg,imm8 AVX512VL 
-       VEXTRACTI32X4    xmmreg|mask|z,zmmreg,imm8 AVX512 
-       VEXTRACTI32X4    mem128|mask,ymmreg,imm8  AVX512VL 
-       VEXTRACTI32X4    mem128|mask,zmmreg,imm8  AVX512 
-       VEXTRACTI32X8    ymmreg|mask|z,zmmreg,imm8 AVX512DQ 
-       VEXTRACTI32X8    mem256|mask,zmmreg,imm8  AVX512DQ 
-       VEXTRACTI64X2    xmmreg|mask|z,ymmreg,imm8 AVX512VL/DQ 
-       VEXTRACTI64X2    xmmreg|mask|z,zmmreg,imm8 AVX512DQ 
-       VEXTRACTI64X2    mem128|mask,ymmreg,imm8  AVX512VL/DQ 
-       VEXTRACTI64X2    mem128|mask,zmmreg,imm8  AVX512DQ 
-       VEXTRACTI64X4    ymmreg|mask|z,zmmreg,imm8 AVX512 
-       VEXTRACTI64X4    mem256|mask,zmmreg,imm8  AVX512 
-       VEXTRACTPS       reg32,xmmreg,imm8        AVX512 
-       VEXTRACTPS       reg64,xmmreg,imm8        AVX512 
-       VEXTRACTPS       mem32,xmmreg,imm8        AVX512 
-       VFIXUPIMMPD      xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 AVX512VL 
-       VFIXUPIMMPD      ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VL 
-       VFIXUPIMMPD      zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae,imm8 AVX512 
-       VFIXUPIMMPS      xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 AVX512VL 
-       VFIXUPIMMPS      ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 AVX512VL 
-       VFIXUPIMMPS      zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae,imm8 AVX512 
-       VFIXUPIMMSD      xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 AVX512 
-       VFIXUPIMMSS      xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 AVX512 
-       VFMADD132PD      xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-       VFMADD132PD      ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-       VFMADD132PD      zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-       VFMADD132PS      xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-       VFMADD132PS      ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-       VFMADD132PS      zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-       VFMADD132SD      xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-       VFMADD132SS      xmmreg|mask|z,xmmreg,xmmrm32|er AVX512 
-       VFMADD213PD      xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-       VFMADD213PD      ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-       VFMADD213PD      zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-       VFMADD213PS      xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-       VFMADD213PS      ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-       VFMADD213PS      zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-       VFMADD213SD      xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-       VFMADD213SS      xmmreg|mask|z,xmmreg,xmmrm32|er AVX512 
-       VFMADD231PD      xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-       VFMADD231PD      ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-       VFMADD231PD      zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-       VFMADD231PS      xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-       VFMADD231PS      ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-       VFMADD231PS      zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-       VFMADD231SD      xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-       VFMADD231SS      xmmreg|mask|z,xmmreg,xmmrm32|er AVX512 
-       VFMADDSUB132PD   xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-       VFMADDSUB132PD   ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-       VFMADDSUB132PD   zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-       VFMADDSUB132PS   xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-       VFMADDSUB132PS   ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-       VFMADDSUB132PS   zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-       VFMADDSUB213PD   xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-       VFMADDSUB213PD   ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-       VFMADDSUB213PD   zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-       VFMADDSUB213PS   xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-       VFMADDSUB213PS   ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-       VFMADDSUB213PS   zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-       VFMADDSUB231PD   xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-       VFMADDSUB231PD   ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-       VFMADDSUB231PD   zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-       VFMADDSUB231PS   xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-       VFMADDSUB231PS   ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-       VFMADDSUB231PS   zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-       VFMSUB132PD      xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-       VFMSUB132PD      ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-       VFMSUB132PD      zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-       VFMSUB132PS      xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-       VFMSUB132PS      ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-       VFMSUB132PS      zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-       VFMSUB132SD      xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-       VFMSUB132SS      xmmreg|mask|z,xmmreg,xmmrm32|er AVX512 
-       VFMSUB213PD      xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-       VFMSUB213PD      ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-       VFMSUB213PD      zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-       VFMSUB213PS      xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-       VFMSUB213PS      ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-       VFMSUB213PS      zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-       VFMSUB213SD      xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-       VFMSUB213SS      xmmreg|mask|z,xmmreg,xmmrm32|er AVX512 
-       VFMSUB231PD      xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-       VFMSUB231PD      ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-       VFMSUB231PD      zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-       VFMSUB231PS      xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-       VFMSUB231PS      ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-       VFMSUB231PS      zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-       VFMSUB231SD      xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-       VFMSUB231SS      xmmreg|mask|z,xmmreg,xmmrm32|er AVX512 
-       VFMSUBADD132PD   xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-       VFMSUBADD132PD   ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-       VFMSUBADD132PD   zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-       VFMSUBADD132PS   xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-       VFMSUBADD132PS   ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-       VFMSUBADD132PS   zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-       VFMSUBADD213PD   xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-       VFMSUBADD213PD   ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-       VFMSUBADD213PD   zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-       VFMSUBADD213PS   xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-       VFMSUBADD213PS   ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-       VFMSUBADD213PS   zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-       VFMSUBADD231PD   xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-       VFMSUBADD231PD   ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-       VFMSUBADD231PD   zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-       VFMSUBADD231PS   xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-       VFMSUBADD231PS   ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-       VFMSUBADD231PS   zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-       VFNMADD132PD     xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-       VFNMADD132PD     ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-       VFNMADD132PD     zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-       VFNMADD132PS     xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-       VFNMADD132PS     ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-       VFNMADD132PS     zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-       VFNMADD132SD     xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-       VFNMADD132SS     xmmreg|mask|z,xmmreg,xmmrm32|er AVX512 
-       VFNMADD213PD     xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-       VFNMADD213PD     ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-       VFNMADD213PD     zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-       VFNMADD213PS     xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-       VFNMADD213PS     ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-       VFNMADD213PS     zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-       VFNMADD213SD     xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-       VFNMADD213SS     xmmreg|mask|z,xmmreg,xmmrm32|er AVX512 
-       VFNMADD231PD     xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-       VFNMADD231PD     ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-       VFNMADD231PD     zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-       VFNMADD231PS     xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-       VFNMADD231PS     ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-       VFNMADD231PS     zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-       VFNMADD231SD     xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-       VFNMADD231SS     xmmreg|mask|z,xmmreg,xmmrm32|er AVX512 
-       VFNMSUB132PD     xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-       VFNMSUB132PD     ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-       VFNMSUB132PD     zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-       VFNMSUB132PS     xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-       VFNMSUB132PS     ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-       VFNMSUB132PS     zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-       VFNMSUB132SD     xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-       VFNMSUB132SS     xmmreg|mask|z,xmmreg,xmmrm32|er AVX512 
-       VFNMSUB213PD     xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-       VFNMSUB213PD     ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-       VFNMSUB213PD     zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-       VFNMSUB213PS     xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-       VFNMSUB213PS     ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-       VFNMSUB213PS     zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-       VFNMSUB213SD     xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-       VFNMSUB213SS     xmmreg|mask|z,xmmreg,xmmrm32|er AVX512 
-       VFNMSUB231PD     xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-       VFNMSUB231PD     ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-       VFNMSUB231PD     zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512 
-       VFNMSUB231PS     xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-       VFNMSUB231PS     ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-       VFNMSUB231PS     zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512 
-       VFNMSUB231SD     xmmreg|mask|z,xmmreg,xmmrm64|er AVX512 
-       VFNMSUB231SS     xmmreg|mask|z,xmmreg,xmmrm32|er AVX512 
-       VFPCLASSPD       kreg|mask,xmmrm128|b64,imm8 AVX512VL/DQ 
-       VFPCLASSPD       kreg|mask,ymmrm256|b64,imm8 AVX512VL/DQ 
-       VFPCLASSPD       kreg|mask,zmmrm512|b64,imm8 AVX512DQ 
-       VFPCLASSPS       kreg|mask,xmmrm128|b32,imm8 AVX512VL/DQ 
-       VFPCLASSPS       kreg|mask,ymmrm256|b32,imm8 AVX512VL/DQ 
-       VFPCLASSPS       kreg|mask,zmmrm512|b32,imm8 AVX512DQ 
-       VFPCLASSSD       kreg|mask,xmmrm64,imm8   AVX512DQ 
-       VFPCLASSSS       kreg|mask,xmmrm32,imm8   AVX512DQ 
-       VGATHERDPD       xmmreg|mask,xmem64       AVX512VL 
-       VGATHERDPD       ymmreg|mask,xmem64       AVX512VL 
-       VGATHERDPD       zmmreg|mask,ymem64       AVX512 
-       VGATHERDPS       xmmreg|mask,xmem32       AVX512VL 
-       VGATHERDPS       ymmreg|mask,ymem32       AVX512VL 
-       VGATHERDPS       zmmreg|mask,zmem32       AVX512 
-       VGATHERPF0DPD    ymem64|mask              AVX512PF 
-       VGATHERPF0DPS    zmem32|mask              AVX512PF 
-       VGATHERPF0QPD    zmem64|mask              AVX512PF 
-       VGATHERPF0QPS    zmem32|mask              AVX512PF 
-       VGATHERPF1DPD    ymem64|mask              AVX512PF 
-       VGATHERPF1DPS    zmem32|mask              AVX512PF 
-       VGATHERPF1QPD    zmem64|mask              AVX512PF 
-       VGATHERPF1QPS    zmem32|mask              AVX512PF 
-       VGATHERQPD       xmmreg|mask,xmem64       AVX512VL 
-       VGATHERQPD       ymmreg|mask,ymem64       AVX512VL 
-       VGATHERQPD       zmmreg|mask,zmem64       AVX512 
-       VGATHERQPS       xmmreg|mask,xmem32       AVX512VL 
-       VGATHERQPS       xmmreg|mask,ymem32       AVX512VL 
-       VGATHERQPS       ymmreg|mask,zmem32       AVX512 
-       VGETEXPPD        xmmreg|mask|z,xmmrm128|b64 AVX512VL 
-       VGETEXPPD        ymmreg|mask|z,ymmrm256|b64 AVX512VL 
-       VGETEXPPD        zmmreg|mask|z,zmmrm512|b64|sae AVX512 
-       VGETEXPPS        xmmreg|mask|z,xmmrm128|b32 AVX512VL 
-       VGETEXPPS        ymmreg|mask|z,ymmrm256|b32 AVX512VL 
-       VGETEXPPS        zmmreg|mask|z,zmmrm512|b32|sae AVX512 
-       VGETEXPSD        xmmreg|mask|z,xmmreg,xmmrm64|sae AVX512 
-       VGETEXPSS        xmmreg|mask|z,xmmreg,xmmrm32|sae AVX512 
-       VGETMANTPD       xmmreg|mask|z,xmmrm128|b64,imm8 AVX512VL 
-       VGETMANTPD       ymmreg|mask|z,ymmrm256|b64,imm8 AVX512VL 
-       VGETMANTPD       zmmreg|mask|z,zmmrm512|b64|sae,imm8 AVX512 
-       VGETMANTPS       xmmreg|mask|z,xmmrm128|b32,imm8 AVX512VL 
-       VGETMANTPS       ymmreg|mask|z,ymmrm256|b32,imm8 AVX512VL 
-       VGETMANTPS       zmmreg|mask|z,zmmrm512|b32|sae,imm8 AVX512 
-       VGETMANTSD       xmmreg|mask|z,xmmreg,xmmrm64|sae,imm8 AVX512 
-       VGETMANTSS       xmmreg|mask|z,xmmreg,xmmrm32|sae,imm8 AVX512 
-       VINSERTF32X4     ymmreg|mask|z,ymmreg*,xmmrm128,imm8 AVX512VL 
-       VINSERTF32X4     zmmreg|mask|z,zmmreg*,xmmrm128,imm8 AVX512 
-       VINSERTF32X8     zmmreg|mask|z,zmmreg*,ymmrm256,imm8 AVX512DQ 
-       VINSERTF64X2     ymmreg|mask|z,ymmreg*,xmmrm128,imm8 AVX512VL/DQ 
-       VINSERTF64X2     zmmreg|mask|z,zmmreg*,xmmrm128,imm8 AVX512DQ 
-       VINSERTF64X4     zmmreg|mask|z,zmmreg*,ymmrm256,imm8 AVX512 
-       VINSERTI32X4     ymmreg|mask|z,ymmreg*,xmmrm128,imm8 AVX512VL 
-       VINSERTI32X4     zmmreg|mask|z,zmmreg*,xmmrm128,imm8 AVX512 
-       VINSERTI32X8     zmmreg|mask|z,zmmreg*,ymmrm256,imm8 AVX512DQ 
-       VINSERTI64X2     ymmreg|mask|z,ymmreg*,xmmrm128,imm8 AVX512VL/DQ 
-       VINSERTI64X2     zmmreg|mask|z,zmmreg*,xmmrm128,imm8 AVX512DQ 
-       VINSERTI64X4     zmmreg|mask|z,zmmreg*,ymmrm256,imm8 AVX512 
-       VINSERTPS        xmmreg,xmmreg*,xmmrm32,imm8 AVX512 
-       VMAXPD           xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VMAXPD           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VMAXPD           zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae AVX512 
-       VMAXPS           xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VMAXPS           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VMAXPS           zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae AVX512 
-       VMAXSD           xmmreg|mask|z,xmmreg*,xmmrm64|sae AVX512 
-       VMAXSS           xmmreg|mask|z,xmmreg*,xmmrm32|sae AVX512 
-       VMINPD           xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VMINPD           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VMINPD           zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae AVX512 
-       VMINPS           xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VMINPS           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VMINPS           zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae AVX512 
-       VMINSD           xmmreg|mask|z,xmmreg*,xmmrm64|sae AVX512 
-       VMINSS           xmmreg|mask|z,xmmreg*,xmmrm32|sae AVX512 
-       VMOVAPD          xmmreg|mask|z,xmmrm128   AVX512VL 
-       VMOVAPD          ymmreg|mask|z,ymmrm256   AVX512VL 
-       VMOVAPD          zmmreg|mask|z,zmmrm512   AVX512 
-       VMOVAPD          xmmreg|mask|z,xmmreg     AVX512VL 
-       VMOVAPD          ymmreg|mask|z,ymmreg     AVX512VL 
-       VMOVAPD          zmmreg|mask|z,zmmreg     AVX512 
-       VMOVAPD          mem128|mask,xmmreg       AVX512VL 
-       VMOVAPD          mem256|mask,ymmreg       AVX512VL 
-       VMOVAPD          mem512|mask,zmmreg       AVX512 
-       VMOVAPS          xmmreg|mask|z,xmmrm128   AVX512VL 
-       VMOVAPS          ymmreg|mask|z,ymmrm256   AVX512VL 
-       VMOVAPS          zmmreg|mask|z,zmmrm512   AVX512 
-       VMOVAPS          xmmreg|mask|z,xmmreg     AVX512VL 
-       VMOVAPS          ymmreg|mask|z,ymmreg     AVX512VL 
-       VMOVAPS          zmmreg|mask|z,zmmreg     AVX512 
-       VMOVAPS          mem128|mask,xmmreg       AVX512VL 
-       VMOVAPS          mem256|mask,ymmreg       AVX512VL 
-       VMOVAPS          mem512|mask,zmmreg       AVX512 
-       VMOVD            xmmreg,rm32              AVX512 
-       VMOVD            rm32,xmmreg              AVX512 
-       VMOVDDUP         xmmreg|mask|z,xmmrm64    AVX512VL 
-       VMOVDDUP         ymmreg|mask|z,ymmrm256   AVX512VL 
-       VMOVDDUP         zmmreg|mask|z,zmmrm512   AVX512 
-       VMOVDQA32        xmmreg|mask|z,xmmrm128   AVX512VL 
-       VMOVDQA32        ymmreg|mask|z,ymmrm256   AVX512VL 
-       VMOVDQA32        zmmreg|mask|z,zmmrm512   AVX512 
-       VMOVDQA32        xmmrm128|mask|z,xmmreg   AVX512VL 
-       VMOVDQA32        ymmrm256|mask|z,ymmreg   AVX512VL 
-       VMOVDQA32        zmmrm512|mask|z,zmmreg   AVX512 
-       VMOVDQA64        xmmreg|mask|z,xmmrm128   AVX512VL 
-       VMOVDQA64        ymmreg|mask|z,ymmrm256   AVX512VL 
-       VMOVDQA64        zmmreg|mask|z,zmmrm512   AVX512 
-       VMOVDQA64        xmmrm128|mask|z,xmmreg   AVX512VL 
-       VMOVDQA64        ymmrm256|mask|z,ymmreg   AVX512VL 
-       VMOVDQA64        zmmrm512|mask|z,zmmreg   AVX512 
-       VMOVDQU16        xmmreg|mask|z,xmmrm128   AVX512VL/BW 
-       VMOVDQU16        ymmreg|mask|z,ymmrm256   AVX512VL/BW 
-       VMOVDQU16        zmmreg|mask|z,zmmrm512   AVX512BW 
-       VMOVDQU16        xmmrm128|mask|z,xmmreg   AVX512VL/BW 
-       VMOVDQU16        ymmrm256|mask|z,ymmreg   AVX512VL/BW 
-       VMOVDQU16        zmmrm512|mask|z,zmmreg   AVX512BW 
-       VMOVDQU32        xmmreg|mask|z,xmmrm128   AVX512VL 
-       VMOVDQU32        ymmreg|mask|z,ymmrm256   AVX512VL 
-       VMOVDQU32        zmmreg|mask|z,zmmrm512   AVX512 
-       VMOVDQU32        xmmrm128|mask|z,xmmreg   AVX512VL 
-       VMOVDQU32        ymmrm256|mask|z,ymmreg   AVX512VL 
-       VMOVDQU32        zmmrm512|mask|z,zmmreg   AVX512 
-       VMOVDQU64        xmmreg|mask|z,xmmrm128   AVX512VL 
-       VMOVDQU64        ymmreg|mask|z,ymmrm256   AVX512VL 
-       VMOVDQU64        zmmreg|mask|z,zmmrm512   AVX512 
-       VMOVDQU64        xmmrm128|mask|z,xmmreg   AVX512VL 
-       VMOVDQU64        ymmrm256|mask|z,ymmreg   AVX512VL 
-       VMOVDQU64        zmmrm512|mask|z,zmmreg   AVX512 
-       VMOVDQU8         xmmreg|mask|z,xmmrm128   AVX512VL/BW 
-       VMOVDQU8         ymmreg|mask|z,ymmrm256   AVX512VL/BW 
-       VMOVDQU8         zmmreg|mask|z,zmmrm512   AVX512BW 
-       VMOVDQU8         xmmrm128|mask|z,xmmreg   AVX512VL/BW 
-       VMOVDQU8         ymmrm256|mask|z,ymmreg   AVX512VL/BW 
-       VMOVDQU8         zmmrm512|mask|z,zmmreg   AVX512BW 
-       VMOVHLPS         xmmreg,xmmreg*,xmmreg    AVX512 
-       VMOVHPD          xmmreg,xmmreg*,mem64     AVX512 
-       VMOVHPD          mem64,xmmreg             AVX512 
-       VMOVHPS          xmmreg,xmmreg*,mem64     AVX512 
-       VMOVHPS          mem64,xmmreg             AVX512 
-       VMOVLHPS         xmmreg,xmmreg*,xmmreg    AVX512 
-       VMOVLPD          xmmreg,xmmreg*,mem64     AVX512 
-       VMOVLPD          mem64,xmmreg             AVX512 
-       VMOVLPS          xmmreg,xmmreg*,mem64     AVX512 
-       VMOVLPS          mem64,xmmreg             AVX512 
-       VMOVNTDQ         mem128,xmmreg            AVX512VL 
-       VMOVNTDQ         mem256,ymmreg            AVX512VL 
-       VMOVNTDQ         mem512,zmmreg            AVX512 
-       VMOVNTDQA        xmmreg,mem128            AVX512VL 
-       VMOVNTDQA        ymmreg,mem256            AVX512VL 
-       VMOVNTDQA        zmmreg,mem512            AVX512 
-       VMOVNTPD         mem128,xmmreg            AVX512VL 
-       VMOVNTPD         mem256,ymmreg            AVX512VL 
-       VMOVNTPD         mem512,zmmreg            AVX512 
-       VMOVNTPS         mem128,xmmreg            AVX512VL 
-       VMOVNTPS         mem256,ymmreg            AVX512VL 
-       VMOVNTPS         mem512,zmmreg            AVX512 
-       VMOVQ            xmmreg,rm64              AVX512 
-       VMOVQ            rm64,xmmreg              AVX512 
-       VMOVQ            xmmreg,xmmrm64           AVX512 
-       VMOVQ            xmmrm64,xmmreg           AVX512 
-       VMOVSD           xmmreg|mask|z,mem64      AVX512 
-       VMOVSD           mem64|mask,xmmreg        AVX512 
-       VMOVSD           xmmreg|mask|z,xmmreg*,xmmreg AVX512 
-       VMOVSD           xmmreg|mask|z,xmmreg*,xmmreg AVX512 
-       VMOVSHDUP        xmmreg|mask|z,xmmrm128   AVX512VL 
-       VMOVSHDUP        ymmreg|mask|z,ymmrm256   AVX512VL 
-       VMOVSHDUP        zmmreg|mask|z,zmmrm512   AVX512 
-       VMOVSLDUP        xmmreg|mask|z,xmmrm128   AVX512VL 
-       VMOVSLDUP        ymmreg|mask|z,ymmrm256   AVX512VL 
-       VMOVSLDUP        zmmreg|mask|z,zmmrm512   AVX512 
-       VMOVSS           xmmreg|mask|z,mem32      AVX512 
-       VMOVSS           mem32|mask,xmmreg        AVX512 
-       VMOVSS           xmmreg|mask|z,xmmreg*,xmmreg AVX512 
-       VMOVSS           xmmreg|mask|z,xmmreg*,xmmreg AVX512 
-       VMOVUPD          xmmreg|mask|z,xmmrm128   AVX512VL 
-       VMOVUPD          ymmreg|mask|z,ymmrm256   AVX512VL 
-       VMOVUPD          zmmreg|mask|z,zmmrm512   AVX512 
-       VMOVUPD          xmmreg|mask|z,xmmreg     AVX512VL 
-       VMOVUPD          ymmreg|mask|z,ymmreg     AVX512VL 
-       VMOVUPD          zmmreg|mask|z,zmmreg     AVX512 
-       VMOVUPD          mem128|mask,xmmreg       AVX512VL 
-       VMOVUPD          mem256|mask,ymmreg       AVX512VL 
-       VMOVUPD          mem512|mask,zmmreg       AVX512 
-       VMOVUPS          xmmreg|mask|z,xmmrm128   AVX512VL 
-       VMOVUPS          ymmreg|mask|z,ymmrm256   AVX512VL 
-       VMOVUPS          zmmreg|mask|z,zmmrm512   AVX512 
-       VMOVUPS          xmmreg|mask|z,xmmreg     AVX512VL 
-       VMOVUPS          ymmreg|mask|z,ymmreg     AVX512VL 
-       VMOVUPS          zmmreg|mask|z,zmmreg     AVX512 
-       VMOVUPS          mem128|mask,xmmreg       AVX512VL 
-       VMOVUPS          mem256|mask,ymmreg       AVX512VL 
-       VMOVUPS          mem512|mask,zmmreg       AVX512 
-       VMULPD           xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VMULPD           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VMULPD           zmmreg|mask|z,zmmreg*,zmmrm512|b64|er AVX512 
-       VMULPS           xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VMULPS           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VMULPS           zmmreg|mask|z,zmmreg*,zmmrm512|b32|er AVX512 
-       VMULSD           xmmreg|mask|z,xmmreg*,xmmrm64|er AVX512 
-       VMULSS           xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512 
-       VORPD            xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL/DQ 
-       VORPD            ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL/DQ 
-       VORPD            zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512DQ 
-       VORPS            xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL/DQ 
-       VORPS            ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL/DQ 
-       VORPS            zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512DQ 
-       VPABSB           xmmreg|mask|z,xmmrm128   AVX512VL/BW 
-       VPABSB           ymmreg|mask|z,ymmrm256   AVX512VL/BW 
-       VPABSB           zmmreg|mask|z,zmmrm512   AVX512BW 
-       VPABSD           xmmreg|mask|z,xmmrm128|b32 AVX512VL 
-       VPABSD           ymmreg|mask|z,ymmrm256|b32 AVX512VL 
-       VPABSD           zmmreg|mask|z,zmmrm512|b32 AVX512 
-       VPABSQ           xmmreg|mask|z,xmmrm128|b64 AVX512VL 
-       VPABSQ           ymmreg|mask|z,ymmrm256|b64 AVX512VL 
-       VPABSQ           zmmreg|mask|z,zmmrm512|b64 AVX512 
-       VPABSW           xmmreg|mask|z,xmmrm128   AVX512VL/BW 
-       VPABSW           ymmreg|mask|z,ymmrm256   AVX512VL/BW 
-       VPABSW           zmmreg|mask|z,zmmrm512   AVX512BW 
-       VPACKSSDW        xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL/BW 
-       VPACKSSDW        ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL/BW 
-       VPACKSSDW        zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512BW 
-       VPACKSSWB        xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPACKSSWB        ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPACKSSWB        zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPACKUSDW        xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL/BW 
-       VPACKUSDW        ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL/BW 
-       VPACKUSDW        zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512BW 
-       VPACKUSWB        xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPACKUSWB        ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPACKUSWB        zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPADDB           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPADDB           ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPADDB           zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPADDD           xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VPADDD           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VPADDD           zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-       VPADDQ           xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VPADDQ           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VPADDQ           zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-       VPADDSB          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPADDSB          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPADDSB          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPADDSW          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPADDSW          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPADDSW          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPADDUSB         xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPADDUSB         ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPADDUSB         zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPADDUSW         xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPADDUSW         ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPADDUSW         zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPADDW           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPADDW           ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPADDW           zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPALIGNR         xmmreg|mask|z,xmmreg*,xmmrm128,imm8 AVX512VL/BW 
-       VPALIGNR         ymmreg|mask|z,ymmreg*,ymmrm256,imm8 AVX512VL/BW 
-       VPALIGNR         zmmreg|mask|z,zmmreg*,zmmrm512,imm8 AVX512BW 
-       VPANDD           xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VPANDD           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VPANDD           zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-       VPANDND          xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VPANDND          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VPANDND          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-       VPANDNQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VPANDNQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VPANDNQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-       VPANDQ           xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VPANDQ           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VPANDQ           zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-       VPAVGB           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPAVGB           ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPAVGB           zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPAVGW           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPAVGW           ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPAVGW           zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPBLENDMB        xmmreg|mask|z,xmmreg,xmmrm128 AVX512VL/BW 
-       VPBLENDMB        ymmreg|mask|z,ymmreg,ymmrm256 AVX512VL/BW 
-       VPBLENDMB        zmmreg|mask|z,zmmreg,zmmrm512 AVX512BW 
-       VPBLENDMD        xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-       VPBLENDMD        ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-       VPBLENDMD        zmmreg|mask|z,zmmreg,zmmrm512|b32 AVX512 
-       VPBLENDMQ        xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-       VPBLENDMQ        ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-       VPBLENDMQ        zmmreg|mask|z,zmmreg,zmmrm512|b64 AVX512 
-       VPBLENDMW        xmmreg|mask|z,xmmreg,xmmrm128 AVX512VL/BW 
-       VPBLENDMW        ymmreg|mask|z,ymmreg,ymmrm256 AVX512VL/BW 
-       VPBLENDMW        zmmreg|mask|z,zmmreg,zmmrm512 AVX512BW 
-       VPBROADCASTB     xmmreg|mask|z,xmmrm8     AVX512VL/BW 
-       VPBROADCASTB     ymmreg|mask|z,xmmrm8     AVX512VL/BW 
-       VPBROADCASTB     zmmreg|mask|z,xmmrm8     AVX512BW 
-       VPBROADCASTB     xmmreg|mask|z,reg8       AVX512VL/BW 
-       VPBROADCASTB     xmmreg|mask|z,reg16      AVX512VL/BW 
-       VPBROADCASTB     xmmreg|mask|z,reg32      AVX512VL/BW 
-       VPBROADCASTB     xmmreg|mask|z,reg64      AVX512VL/BW 
-       VPBROADCASTB     ymmreg|mask|z,reg8       AVX512VL/BW 
-       VPBROADCASTB     ymmreg|mask|z,reg16      AVX512VL/BW 
-       VPBROADCASTB     ymmreg|mask|z,reg32      AVX512VL/BW 
-       VPBROADCASTB     ymmreg|mask|z,reg64      AVX512VL/BW 
-       VPBROADCASTB     zmmreg|mask|z,reg8       AVX512BW 
-       VPBROADCASTB     zmmreg|mask|z,reg16      AVX512BW 
-       VPBROADCASTB     zmmreg|mask|z,reg32      AVX512BW 
-       VPBROADCASTB     zmmreg|mask|z,reg64      AVX512BW 
-       VPBROADCASTD     xmmreg|mask|z,mem32      AVX512VL 
-       VPBROADCASTD     ymmreg|mask|z,mem32      AVX512VL 
-       VPBROADCASTD     zmmreg|mask|z,mem32      AVX512 
-       VPBROADCASTD     xmmreg|mask|z,xmmreg     AVX512VL 
-       VPBROADCASTD     ymmreg|mask|z,xmmreg     AVX512VL 
-       VPBROADCASTD     zmmreg|mask|z,xmmreg     AVX512 
-       VPBROADCASTD     xmmreg|mask|z,reg32      AVX512VL 
-       VPBROADCASTD     ymmreg|mask|z,reg32      AVX512VL 
-       VPBROADCASTD     zmmreg|mask|z,reg32      AVX512 
-       VPBROADCASTMB2Q  xmmreg,kreg              AVX512VL/CD 
-       VPBROADCASTMB2Q  ymmreg,kreg              AVX512VL/CD 
-       VPBROADCASTMB2Q  zmmreg,kreg              AVX512CD 
-       VPBROADCASTMW2D  xmmreg,kreg              AVX512VL/CD 
-       VPBROADCASTMW2D  ymmreg,kreg              AVX512VL/CD 
-       VPBROADCASTMW2D  zmmreg,kreg              AVX512CD 
-       VPBROADCASTQ     xmmreg|mask|z,mem64      AVX512VL 
-       VPBROADCASTQ     ymmreg|mask|z,mem64      AVX512VL 
-       VPBROADCASTQ     zmmreg|mask|z,mem64      AVX512 
-       VPBROADCASTQ     xmmreg|mask|z,xmmreg     AVX512VL 
-       VPBROADCASTQ     ymmreg|mask|z,xmmreg     AVX512VL 
-       VPBROADCASTQ     zmmreg|mask|z,xmmreg     AVX512 
-       VPBROADCASTQ     xmmreg|mask|z,reg64      AVX512VL 
-       VPBROADCASTQ     ymmreg|mask|z,reg64      AVX512VL 
-       VPBROADCASTQ     zmmreg|mask|z,reg64      AVX512 
-       VPBROADCASTW     xmmreg|mask|z,xmmrm16    AVX512VL/BW 
-       VPBROADCASTW     ymmreg|mask|z,xmmrm16    AVX512VL/BW 
-       VPBROADCASTW     zmmreg|mask|z,xmmrm16    AVX512BW 
-       VPBROADCASTW     xmmreg|mask|z,reg16      AVX512VL/BW 
-       VPBROADCASTW     xmmreg|mask|z,reg32      AVX512VL/BW 
-       VPBROADCASTW     xmmreg|mask|z,reg64      AVX512VL/BW 
-       VPBROADCASTW     ymmreg|mask|z,reg16      AVX512VL/BW 
-       VPBROADCASTW     ymmreg|mask|z,reg32      AVX512VL/BW 
-       VPBROADCASTW     ymmreg|mask|z,reg64      AVX512VL/BW 
-       VPBROADCASTW     zmmreg|mask|z,reg16      AVX512BW 
-       VPBROADCASTW     zmmreg|mask|z,reg32      AVX512BW 
-       VPBROADCASTW     zmmreg|mask|z,reg64      AVX512BW 
-       VPCMPEQB         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPEQB         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPEQB         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPEQD         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VPCMPEQD         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VPCMPEQD         kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-       VPCMPEQQ         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VPCMPEQQ         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VPCMPEQQ         kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-       VPCMPEQW         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPEQW         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPEQW         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPGTB         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPGTB         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPGTB         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPGTD         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VPCMPGTD         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VPCMPGTD         kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-       VPCMPGTQ         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VPCMPGTQ         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VPCMPGTQ         kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-       VPCMPGTW         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPGTW         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPGTW         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPEQB         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPEQB         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPEQB         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPEQD         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VPCMPEQD         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VPCMPEQD         kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-       VPCMPEQQ         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VPCMPEQQ         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VPCMPEQQ         kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-       VPCMPEQUB        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPEQUB        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPEQUB        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPEQUD        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VPCMPEQUD        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VPCMPEQUD        kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-       VPCMPEQUQ        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VPCMPEQUQ        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VPCMPEQUQ        kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-       VPCMPEQUW        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPEQUW        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPEQUW        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPEQW         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPEQW         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPEQW         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPGEB         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPGEB         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPGEB         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPGED         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VPCMPGED         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VPCMPGED         kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-       VPCMPGEQ         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VPCMPGEQ         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VPCMPGEQ         kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-       VPCMPGEUB        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPGEUB        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPGEUB        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPGEUD        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VPCMPGEUD        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VPCMPGEUD        kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-       VPCMPGEUQ        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VPCMPGEUQ        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VPCMPGEUQ        kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-       VPCMPGEUW        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPGEUW        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPGEUW        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPGEW         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPGEW         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPGEW         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPGTB         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPGTB         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPGTB         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPGTD         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VPCMPGTD         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VPCMPGTD         kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-       VPCMPGTQ         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VPCMPGTQ         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VPCMPGTQ         kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-       VPCMPGTUB        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPGTUB        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPGTUB        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPGTUD        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VPCMPGTUD        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VPCMPGTUD        kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-       VPCMPGTUQ        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VPCMPGTUQ        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VPCMPGTUQ        kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-       VPCMPGTUW        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPGTUW        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPGTUW        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPGTW         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPGTW         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPGTW         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPLEB         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPLEB         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPLEB         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPLED         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VPCMPLED         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VPCMPLED         kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-       VPCMPLEQ         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VPCMPLEQ         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VPCMPLEQ         kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-       VPCMPLEUB        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPLEUB        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPLEUB        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPLEUD        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VPCMPLEUD        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VPCMPLEUD        kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-       VPCMPLEUQ        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VPCMPLEUQ        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VPCMPLEUQ        kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-       VPCMPLEUW        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPLEUW        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPLEUW        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPLEW         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPLEW         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPLEW         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPLTB         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPLTB         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPLTB         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPLTD         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VPCMPLTD         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VPCMPLTD         kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-       VPCMPLTQ         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VPCMPLTQ         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VPCMPLTQ         kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-       VPCMPLTUB        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPLTUB        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPLTUB        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPLTUD        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VPCMPLTUD        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VPCMPLTUD        kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-       VPCMPLTUQ        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VPCMPLTUQ        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VPCMPLTUQ        kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-       VPCMPLTUW        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPLTUW        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPLTUW        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPLTW         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPLTW         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPLTW         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPNEQB        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPNEQB        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPNEQB        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPNEQD        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VPCMPNEQD        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VPCMPNEQD        kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-       VPCMPNEQQ        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VPCMPNEQQ        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VPCMPNEQQ        kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-       VPCMPNEQUB       kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPNEQUB       kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPNEQUB       kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPNEQUD       kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VPCMPNEQUD       kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VPCMPNEQUD       kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-       VPCMPNEQUQ       kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VPCMPNEQUQ       kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VPCMPNEQUQ       kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-       VPCMPNEQUW       kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPNEQUW       kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPNEQUW       kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPNEQW        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPNEQW        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPNEQW        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPNGTB        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPNGTB        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPNGTB        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPNGTD        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VPCMPNGTD        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VPCMPNGTD        kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-       VPCMPNGTQ        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VPCMPNGTQ        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VPCMPNGTQ        kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-       VPCMPNGTUB       kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPNGTUB       kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPNGTUB       kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPNGTUD       kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VPCMPNGTUD       kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VPCMPNGTUD       kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-       VPCMPNGTUQ       kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VPCMPNGTUQ       kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VPCMPNGTUQ       kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-       VPCMPNGTUW       kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPNGTUW       kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPNGTUW       kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPNGTW        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPNGTW        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPNGTW        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPNLEB        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPNLEB        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPNLEB        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPNLED        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VPCMPNLED        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VPCMPNLED        kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-       VPCMPNLEQ        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VPCMPNLEQ        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VPCMPNLEQ        kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-       VPCMPNLEUB       kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPNLEUB       kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPNLEUB       kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPNLEUD       kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VPCMPNLEUD       kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VPCMPNLEUD       kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-       VPCMPNLEUQ       kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VPCMPNLEUQ       kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VPCMPNLEUQ       kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-       VPCMPNLEUW       kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPNLEUW       kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPNLEUW       kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPNLEW        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPNLEW        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPNLEW        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPNLTB        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPNLTB        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPNLTB        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPNLTD        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VPCMPNLTD        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VPCMPNLTD        kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-       VPCMPNLTQ        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VPCMPNLTQ        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VPCMPNLTQ        kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-       VPCMPNLTUB       kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPNLTUB       kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPNLTUB       kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPNLTUD       kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VPCMPNLTUD       kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VPCMPNLTUD       kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-       VPCMPNLTUQ       kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VPCMPNLTUQ       kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VPCMPNLTUQ       kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-       VPCMPNLTUW       kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPNLTUW       kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPNLTUW       kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPNLTW        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPCMPNLTW        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPCMPNLTW        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPCMPB           kreg|mask,xmmreg,xmmrm128,imm8 AVX512VL/BW 
-       VPCMPB           kreg|mask,ymmreg,ymmrm256,imm8 AVX512VL/BW 
-       VPCMPB           kreg|mask,zmmreg,zmmrm512,imm8 AVX512BW 
-       VPCMPD           kreg|mask,xmmreg,xmmrm128|b32,imm8 AVX512VL 
-       VPCMPD           kreg|mask,ymmreg,ymmrm256|b32,imm8 AVX512VL 
-       VPCMPD           kreg|mask,zmmreg,zmmrm512|b32,imm8 AVX512 
-       VPCMPQ           kreg|mask,xmmreg,xmmrm128|b64,imm8 AVX512VL 
-       VPCMPQ           kreg|mask,ymmreg,ymmrm256|b64,imm8 AVX512VL 
-       VPCMPQ           kreg|mask,zmmreg,zmmrm512|b64,imm8 AVX512 
-       VPCMPUB          kreg|mask,xmmreg,xmmrm128,imm8 AVX512VL/BW 
-       VPCMPUB          kreg|mask,ymmreg,ymmrm256,imm8 AVX512VL/BW 
-       VPCMPUB          kreg|mask,zmmreg,zmmrm512,imm8 AVX512BW 
-       VPCMPUD          kreg|mask,xmmreg,xmmrm128|b32,imm8 AVX512VL 
-       VPCMPUD          kreg|mask,ymmreg,ymmrm256|b32,imm8 AVX512VL 
-       VPCMPUD          kreg|mask,zmmreg,zmmrm512|b32,imm8 AVX512 
-       VPCMPUQ          kreg|mask,xmmreg,xmmrm128|b64,imm8 AVX512VL 
-       VPCMPUQ          kreg|mask,ymmreg,ymmrm256|b64,imm8 AVX512VL 
-       VPCMPUQ          kreg|mask,zmmreg,zmmrm512|b64,imm8 AVX512 
-       VPCMPUW          kreg|mask,xmmreg,xmmrm128,imm8 AVX512VL/BW 
-       VPCMPUW          kreg|mask,ymmreg,ymmrm256,imm8 AVX512VL/BW 
-       VPCMPUW          kreg|mask,zmmreg,zmmrm512,imm8 AVX512BW 
-       VPCMPW           kreg|mask,xmmreg,xmmrm128,imm8 AVX512VL/BW 
-       VPCMPW           kreg|mask,ymmreg,ymmrm256,imm8 AVX512VL/BW 
-       VPCMPW           kreg|mask,zmmreg,zmmrm512,imm8 AVX512BW 
-       VPCOMPRESSD      mem128|mask,xmmreg       AVX512VL 
-       VPCOMPRESSD      mem256|mask,ymmreg       AVX512VL 
-       VPCOMPRESSD      mem512|mask,zmmreg       AVX512 
-       VPCOMPRESSD      xmmreg|mask|z,xmmreg     AVX512VL 
-       VPCOMPRESSD      ymmreg|mask|z,ymmreg     AVX512VL 
-       VPCOMPRESSD      zmmreg|mask|z,zmmreg     AVX512 
-       VPCOMPRESSQ      mem128|mask,xmmreg       AVX512VL 
-       VPCOMPRESSQ      mem256|mask,ymmreg       AVX512VL 
-       VPCOMPRESSQ      mem512|mask,zmmreg       AVX512 
-       VPCOMPRESSQ      xmmreg|mask|z,xmmreg     AVX512VL 
-       VPCOMPRESSQ      ymmreg|mask|z,ymmreg     AVX512VL 
-       VPCOMPRESSQ      zmmreg|mask|z,zmmreg     AVX512 
-       VPCONFLICTD      xmmreg|mask|z,xmmrm128|b32 AVX512VL/CD 
-       VPCONFLICTD      ymmreg|mask|z,ymmrm256|b32 AVX512VL/CD 
-       VPCONFLICTD      zmmreg|mask|z,zmmrm512|b32 AVX512CD 
-       VPCONFLICTQ      xmmreg|mask|z,xmmrm128|b64 AVX512VL/CD 
-       VPCONFLICTQ      ymmreg|mask|z,ymmrm256|b64 AVX512VL/CD 
-       VPCONFLICTQ      zmmreg|mask|z,zmmrm512|b64 AVX512CD 
-       VPERMB           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/VBMI 
-       VPERMB           ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/VBMI 
-       VPERMB           zmmreg|mask|z,zmmreg*,zmmrm512 AVX512VBMI 
-       VPERMD           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VPERMD           zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-       VPERMI2B         xmmreg|mask|z,xmmreg,xmmrm128 AVX512VL/VBMI 
-       VPERMI2B         ymmreg|mask|z,ymmreg,ymmrm256 AVX512VL/VBMI 
-       VPERMI2B         zmmreg|mask|z,zmmreg,zmmrm512 AVX512VBMI 
-       VPERMI2D         xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-       VPERMI2D         ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-       VPERMI2D         zmmreg|mask|z,zmmreg,zmmrm512|b32 AVX512 
-       VPERMI2PD        xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-       VPERMI2PD        ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-       VPERMI2PD        zmmreg|mask|z,zmmreg,zmmrm512|b64 AVX512 
-       VPERMI2PS        xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-       VPERMI2PS        ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-       VPERMI2PS        zmmreg|mask|z,zmmreg,zmmrm512|b32 AVX512 
-       VPERMI2Q         xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-       VPERMI2Q         ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-       VPERMI2Q         zmmreg|mask|z,zmmreg,zmmrm512|b64 AVX512 
-       VPERMI2W         xmmreg|mask|z,xmmreg,xmmrm128 AVX512VL/BW 
-       VPERMI2W         ymmreg|mask|z,ymmreg,ymmrm256 AVX512VL/BW 
-       VPERMI2W         zmmreg|mask|z,zmmreg,zmmrm512 AVX512BW 
-       VPERMILPD        xmmreg|mask|z,xmmrm128|b64,imm8 AVX512VL 
-       VPERMILPD        ymmreg|mask|z,ymmrm256|b64,imm8 AVX512VL 
-       VPERMILPD        zmmreg|mask|z,zmmrm512|b64,imm8 AVX512 
-       VPERMILPD        xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VPERMILPD        ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VPERMILPD        zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-       VPERMILPS        xmmreg|mask|z,xmmrm128|b32,imm8 AVX512VL 
-       VPERMILPS        ymmreg|mask|z,ymmrm256|b32,imm8 AVX512VL 
-       VPERMILPS        zmmreg|mask|z,zmmrm512|b32,imm8 AVX512 
-       VPERMILPS        xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VPERMILPS        ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VPERMILPS        zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-       VPERMPD          ymmreg|mask|z,ymmrm256|b64,imm8 AVX512VL 
-       VPERMPD          zmmreg|mask|z,zmmrm512|b64,imm8 AVX512 
-       VPERMPD          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VPERMPD          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-       VPERMPS          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VPERMPS          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-       VPERMQ           ymmreg|mask|z,ymmrm256|b64,imm8 AVX512VL 
-       VPERMQ           zmmreg|mask|z,zmmrm512|b64,imm8 AVX512 
-       VPERMQ           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VPERMQ           zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-       VPERMT2B         xmmreg|mask|z,xmmreg,xmmrm128 AVX512VL/VBMI 
-       VPERMT2B         ymmreg|mask|z,ymmreg,ymmrm256 AVX512VL/VBMI 
-       VPERMT2B         zmmreg|mask|z,zmmreg,zmmrm512 AVX512VBMI 
-       VPERMT2D         xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-       VPERMT2D         ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-       VPERMT2D         zmmreg|mask|z,zmmreg,zmmrm512|b32 AVX512 
-       VPERMT2PD        xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-       VPERMT2PD        ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-       VPERMT2PD        zmmreg|mask|z,zmmreg,zmmrm512|b64 AVX512 
-       VPERMT2PS        xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL 
-       VPERMT2PS        ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL 
-       VPERMT2PS        zmmreg|mask|z,zmmreg,zmmrm512|b32 AVX512 
-       VPERMT2Q         xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL 
-       VPERMT2Q         ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL 
-       VPERMT2Q         zmmreg|mask|z,zmmreg,zmmrm512|b64 AVX512 
-       VPERMT2W         xmmreg|mask|z,xmmreg,xmmrm128 AVX512VL/BW 
-       VPERMT2W         ymmreg|mask|z,ymmreg,ymmrm256 AVX512VL/BW 
-       VPERMT2W         zmmreg|mask|z,zmmreg,zmmrm512 AVX512BW 
-       VPERMW           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPERMW           ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPERMW           zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPEXPANDD        xmmreg|mask|z,mem128     AVX512VL 
-       VPEXPANDD        ymmreg|mask|z,mem256     AVX512VL 
-       VPEXPANDD        zmmreg|mask|z,mem512     AVX512 
-       VPEXPANDD        xmmreg|mask|z,xmmreg     AVX512VL 
-       VPEXPANDD        ymmreg|mask|z,ymmreg     AVX512VL 
-       VPEXPANDD        zmmreg|mask|z,zmmreg     AVX512 
-       VPEXPANDQ        xmmreg|mask|z,mem128     AVX512VL 
-       VPEXPANDQ        ymmreg|mask|z,mem256     AVX512VL 
-       VPEXPANDQ        zmmreg|mask|z,mem512     AVX512 
-       VPEXPANDQ        xmmreg|mask|z,xmmreg     AVX512VL 
-       VPEXPANDQ        ymmreg|mask|z,ymmreg     AVX512VL 
-       VPEXPANDQ        zmmreg|mask|z,zmmreg     AVX512 
-       VPEXTRB          reg8,xmmreg,imm8         AVX512BW 
-       VPEXTRB          reg16,xmmreg,imm8        AVX512BW 
-       VPEXTRB          reg32,xmmreg,imm8        AVX512BW 
-       VPEXTRB          reg64,xmmreg,imm8        AVX512BW 
-       VPEXTRB          mem8,xmmreg,imm8         AVX512BW 
-       VPEXTRD          rm32,xmmreg,imm8         AVX512DQ 
-       VPEXTRQ          rm64,xmmreg,imm8         AVX512DQ 
-       VPEXTRW          reg16,xmmreg,imm8        AVX512BW 
-       VPEXTRW          reg32,xmmreg,imm8        AVX512BW 
-       VPEXTRW          reg64,xmmreg,imm8        AVX512BW 
-       VPEXTRW          mem16,xmmreg,imm8        AVX512BW 
-       VPEXTRW          reg16,xmmreg,imm8        AVX512BW 
-       VPEXTRW          reg32,xmmreg,imm8        AVX512BW 
-       VPEXTRW          reg64,xmmreg,imm8        AVX512BW 
-       VPGATHERDD       xmmreg|mask,xmem32       AVX512VL 
-       VPGATHERDD       ymmreg|mask,ymem32       AVX512VL 
-       VPGATHERDD       zmmreg|mask,zmem32       AVX512 
-       VPGATHERDQ       xmmreg|mask,xmem64       AVX512VL 
-       VPGATHERDQ       ymmreg|mask,xmem64       AVX512VL 
-       VPGATHERDQ       zmmreg|mask,ymem64       AVX512 
-       VPGATHERQD       xmmreg|mask,xmem32       AVX512VL 
-       VPGATHERQD       xmmreg|mask,ymem32       AVX512VL 
-       VPGATHERQD       ymmreg|mask,zmem32       AVX512 
-       VPGATHERQQ       xmmreg|mask,xmem64       AVX512VL 
-       VPGATHERQQ       ymmreg|mask,ymem64       AVX512VL 
-       VPGATHERQQ       zmmreg|mask,zmem64       AVX512 
-       VPINSRB          xmmreg,xmmreg*,reg32,imm8 AVX512BW 
-       VPINSRB          xmmreg,xmmreg*,mem8,imm8 AVX512BW 
-       VPINSRD          xmmreg,xmmreg*,rm32,imm8 AVX512DQ 
-       VPINSRQ          xmmreg,xmmreg*,rm64,imm8 AVX512DQ 
-       VPINSRW          xmmreg,xmmreg*,reg32,imm8 AVX512BW 
-       VPINSRW          xmmreg,xmmreg*,mem16,imm8 AVX512BW 
-       VPLZCNTD         xmmreg|mask|z,xmmrm128|b32 AVX512VL/CD 
-       VPLZCNTD         ymmreg|mask|z,ymmrm256|b32 AVX512VL/CD 
-       VPLZCNTD         zmmreg|mask|z,zmmrm512|b32 AVX512CD 
-       VPLZCNTQ         xmmreg|mask|z,xmmrm128|b64 AVX512VL/CD 
-       VPLZCNTQ         ymmreg|mask|z,ymmrm256|b64 AVX512VL/CD 
-       VPLZCNTQ         zmmreg|mask|z,zmmrm512|b64 AVX512CD 
-       VPMADD52HUQ      xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL/IFMA 
-       VPMADD52HUQ      ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL/IFMA 
-       VPMADD52HUQ      zmmreg|mask|z,zmmreg,zmmrm512|b64 AVX512IFMA 
-       VPMADD52LUQ      xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL/IFMA 
-       VPMADD52LUQ      ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL/IFMA 
-       VPMADD52LUQ      zmmreg|mask|z,zmmreg,zmmrm512|b64 AVX512IFMA 
-       VPMADDUBSW       xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPMADDUBSW       ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPMADDUBSW       zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPMADDWD         xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPMADDWD         ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPMADDWD         zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPMAXSB          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPMAXSB          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPMAXSB          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPMAXSD          xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VPMAXSD          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VPMAXSD          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-       VPMAXSQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VPMAXSQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VPMAXSQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-       VPMAXSW          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPMAXSW          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPMAXSW          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPMAXUB          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPMAXUB          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPMAXUB          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPMAXUD          xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VPMAXUD          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VPMAXUD          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-       VPMAXUQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VPMAXUQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VPMAXUQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-       VPMAXUW          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPMAXUW          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPMAXUW          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPMINSB          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPMINSB          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPMINSB          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPMINSD          xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VPMINSD          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VPMINSD          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-       VPMINSQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VPMINSQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VPMINSQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-       VPMINSW          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPMINSW          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPMINSW          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPMINUB          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPMINUB          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPMINUB          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPMINUD          xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VPMINUD          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VPMINUD          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-       VPMINUQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VPMINUQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VPMINUQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-       VPMINUW          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPMINUW          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPMINUW          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPMOVB2M         kreg,xmmreg              AVX512VL/BW 
-       VPMOVB2M         kreg,ymmreg              AVX512VL/BW 
-       VPMOVB2M         kreg,zmmreg              AVX512BW 
-       VPMOVD2M         kreg,xmmreg              AVX512VL/DQ 
-       VPMOVD2M         kreg,ymmreg              AVX512VL/DQ 
-       VPMOVD2M         kreg,zmmreg              AVX512DQ 
-       VPMOVDB          xmmreg|mask|z,xmmreg     AVX512VL 
-       VPMOVDB          xmmreg|mask|z,ymmreg     AVX512VL 
-       VPMOVDB          xmmreg|mask|z,zmmreg     AVX512 
-       VPMOVDB          mem32|mask,xmmreg        AVX512VL 
-       VPMOVDB          mem64|mask,ymmreg        AVX512VL 
-       VPMOVDB          mem128|mask,zmmreg       AVX512 
-       VPMOVDW          xmmreg|mask|z,xmmreg     AVX512VL 
-       VPMOVDW          xmmreg|mask|z,ymmreg     AVX512VL 
-       VPMOVDW          ymmreg|mask|z,zmmreg     AVX512 
-       VPMOVDW          mem64|mask,xmmreg        AVX512VL 
-       VPMOVDW          mem128|mask,ymmreg       AVX512VL 
-       VPMOVDW          mem256|mask,zmmreg       AVX512 
-       VPMOVM2B         xmmreg,kreg              AVX512VL/BW 
-       VPMOVM2B         ymmreg,kreg              AVX512VL/BW 
-       VPMOVM2B         zmmreg,kreg              AVX512BW 
-       VPMOVM2D         xmmreg,kreg              AVX512VL/DQ 
-       VPMOVM2D         ymmreg,kreg              AVX512VL/DQ 
-       VPMOVM2D         zmmreg,kreg              AVX512DQ 
-       VPMOVM2Q         xmmreg,kreg              AVX512VL/DQ 
-       VPMOVM2Q         ymmreg,kreg              AVX512VL/DQ 
-       VPMOVM2Q         zmmreg,kreg              AVX512DQ 
-       VPMOVM2W         xmmreg,kreg              AVX512VL/BW 
-       VPMOVM2W         ymmreg,kreg              AVX512VL/BW 
-       VPMOVM2W         zmmreg,kreg              AVX512BW 
-       VPMOVQ2M         kreg,xmmreg              AVX512VL/DQ 
-       VPMOVQ2M         kreg,ymmreg              AVX512VL/DQ 
-       VPMOVQ2M         kreg,zmmreg              AVX512DQ 
-       VPMOVQB          xmmreg|mask|z,xmmreg     AVX512VL 
-       VPMOVQB          xmmreg|mask|z,ymmreg     AVX512VL 
-       VPMOVQB          xmmreg|mask|z,zmmreg     AVX512 
-       VPMOVQB          mem16|mask,xmmreg        AVX512VL 
-       VPMOVQB          mem32|mask,ymmreg        AVX512VL 
-       VPMOVQB          mem64|mask,zmmreg        AVX512 
-       VPMOVQD          xmmreg|mask|z,xmmreg     AVX512VL 
-       VPMOVQD          xmmreg|mask|z,ymmreg     AVX512VL 
-       VPMOVQD          ymmreg|mask|z,zmmreg     AVX512 
-       VPMOVQD          mem64|mask,xmmreg        AVX512VL 
-       VPMOVQD          mem128|mask,ymmreg       AVX512VL 
-       VPMOVQD          mem256|mask,zmmreg       AVX512 
-       VPMOVQW          xmmreg|mask|z,xmmreg     AVX512VL 
-       VPMOVQW          xmmreg|mask|z,ymmreg     AVX512VL 
-       VPMOVQW          xmmreg|mask|z,zmmreg     AVX512 
-       VPMOVQW          mem32|mask,xmmreg        AVX512VL 
-       VPMOVQW          mem64|mask,ymmreg        AVX512VL 
-       VPMOVQW          mem128|mask,zmmreg       AVX512 
-       VPMOVSDB         xmmreg|mask|z,xmmreg     AVX512VL 
-       VPMOVSDB         xmmreg|mask|z,ymmreg     AVX512VL 
-       VPMOVSDB         xmmreg|mask|z,zmmreg     AVX512 
-       VPMOVSDB         mem32|mask,xmmreg        AVX512VL 
-       VPMOVSDB         mem64|mask,ymmreg        AVX512VL 
-       VPMOVSDB         mem128|mask,zmmreg       AVX512 
-       VPMOVSDW         xmmreg|mask|z,xmmreg     AVX512VL 
-       VPMOVSDW         xmmreg|mask|z,ymmreg     AVX512VL 
-       VPMOVSDW         ymmreg|mask|z,zmmreg     AVX512 
-       VPMOVSDW         mem64|mask,xmmreg        AVX512VL 
-       VPMOVSDW         mem128|mask,ymmreg       AVX512VL 
-       VPMOVSDW         mem256|mask,zmmreg       AVX512 
-       VPMOVSQB         xmmreg|mask|z,xmmreg     AVX512VL 
-       VPMOVSQB         xmmreg|mask|z,ymmreg     AVX512VL 
-       VPMOVSQB         xmmreg|mask|z,zmmreg     AVX512 
-       VPMOVSQB         mem16|mask,xmmreg        AVX512VL 
-       VPMOVSQB         mem32|mask,ymmreg        AVX512VL 
-       VPMOVSQB         mem64|mask,zmmreg        AVX512 
-       VPMOVSQD         xmmreg|mask|z,xmmreg     AVX512VL 
-       VPMOVSQD         xmmreg|mask|z,ymmreg     AVX512VL 
-       VPMOVSQD         ymmreg|mask|z,zmmreg     AVX512 
-       VPMOVSQD         mem64|mask,xmmreg        AVX512VL 
-       VPMOVSQD         mem128|mask,ymmreg       AVX512VL 
-       VPMOVSQD         mem256|mask,zmmreg       AVX512 
-       VPMOVSQW         xmmreg|mask|z,xmmreg     AVX512VL 
-       VPMOVSQW         xmmreg|mask|z,ymmreg     AVX512VL 
-       VPMOVSQW         xmmreg|mask|z,zmmreg     AVX512 
-       VPMOVSQW         mem32|mask,xmmreg        AVX512VL 
-       VPMOVSQW         mem64|mask,ymmreg        AVX512VL 
-       VPMOVSQW         mem128|mask,zmmreg       AVX512 
-       VPMOVSWB         xmmreg|mask|z,xmmreg     AVX512VL/BW 
-       VPMOVSWB         xmmreg|mask|z,ymmreg     AVX512VL/BW 
-       VPMOVSWB         ymmreg|mask|z,zmmreg     AVX512BW 
-       VPMOVSWB         mem64|mask,xmmreg        AVX512VL/BW 
-       VPMOVSWB         mem128|mask,ymmreg       AVX512VL/BW 
-       VPMOVSWB         mem256|mask,zmmreg       AVX512BW 
-       VPMOVSXBD        xmmreg|mask|z,xmmrm32    AVX512VL 
-       VPMOVSXBD        ymmreg|mask|z,xmmrm64    AVX512VL 
-       VPMOVSXBD        zmmreg|mask|z,xmmrm128   AVX512 
-       VPMOVSXBQ        xmmreg|mask|z,xmmrm16    AVX512VL 
-       VPMOVSXBQ        ymmreg|mask|z,xmmrm32    AVX512VL 
-       VPMOVSXBQ        zmmreg|mask|z,xmmrm64    AVX512 
-       VPMOVSXBW        xmmreg|mask|z,xmmrm64    AVX512VL/BW 
-       VPMOVSXBW        ymmreg|mask|z,xmmrm128   AVX512VL/BW 
-       VPMOVSXBW        zmmreg|mask|z,ymmrm256   AVX512BW 
-       VPMOVSXDQ        xmmreg|mask|z,xmmrm64    AVX512VL 
-       VPMOVSXDQ        ymmreg|mask|z,xmmrm128   AVX512VL 
-       VPMOVSXDQ        zmmreg|mask|z,ymmrm256   AVX512 
-       VPMOVSXWD        xmmreg|mask|z,xmmrm64    AVX512VL 
-       VPMOVSXWD        ymmreg|mask|z,xmmrm128   AVX512VL 
-       VPMOVSXWD        zmmreg|mask|z,ymmrm256   AVX512 
-       VPMOVSXWQ        xmmreg|mask|z,xmmrm32    AVX512VL 
-       VPMOVSXWQ        ymmreg|mask|z,xmmrm64    AVX512VL 
-       VPMOVSXWQ        zmmreg|mask|z,xmmrm128   AVX512 
-       VPMOVUSDB        xmmreg|mask|z,xmmreg     AVX512VL 
-       VPMOVUSDB        xmmreg|mask|z,ymmreg     AVX512VL 
-       VPMOVUSDB        xmmreg|mask|z,zmmreg     AVX512 
-       VPMOVUSDB        mem32|mask,xmmreg        AVX512VL 
-       VPMOVUSDB        mem64|mask,ymmreg        AVX512VL 
-       VPMOVUSDB        mem128|mask,zmmreg       AVX512 
-       VPMOVUSDW        xmmreg|mask|z,xmmreg     AVX512VL 
-       VPMOVUSDW        xmmreg|mask|z,ymmreg     AVX512VL 
-       VPMOVUSDW        ymmreg|mask|z,zmmreg     AVX512 
-       VPMOVUSDW        mem64|mask,xmmreg        AVX512VL 
-       VPMOVUSDW        mem128|mask,ymmreg       AVX512VL 
-       VPMOVUSDW        mem256|mask,zmmreg       AVX512 
-       VPMOVUSQB        xmmreg|mask|z,xmmreg     AVX512VL 
-       VPMOVUSQB        xmmreg|mask|z,ymmreg     AVX512VL 
-       VPMOVUSQB        xmmreg|mask|z,zmmreg     AVX512 
-       VPMOVUSQB        mem16|mask,xmmreg        AVX512VL 
-       VPMOVUSQB        mem32|mask,ymmreg        AVX512VL 
-       VPMOVUSQB        mem64|mask,zmmreg        AVX512 
-       VPMOVUSQD        xmmreg|mask|z,xmmreg     AVX512VL 
-       VPMOVUSQD        xmmreg|mask|z,ymmreg     AVX512VL 
-       VPMOVUSQD        ymmreg|mask|z,zmmreg     AVX512 
-       VPMOVUSQD        mem64|mask,xmmreg        AVX512VL 
-       VPMOVUSQD        mem128|mask,ymmreg       AVX512VL 
-       VPMOVUSQD        mem256|mask,zmmreg       AVX512 
-       VPMOVUSQW        xmmreg|mask|z,xmmreg     AVX512VL 
-       VPMOVUSQW        xmmreg|mask|z,ymmreg     AVX512VL 
-       VPMOVUSQW        xmmreg|mask|z,zmmreg     AVX512 
-       VPMOVUSQW        mem32|mask,xmmreg        AVX512VL 
-       VPMOVUSQW        mem64|mask,ymmreg        AVX512VL 
-       VPMOVUSQW        mem128|mask,zmmreg       AVX512 
-       VPMOVUSWB        xmmreg|mask|z,xmmreg     AVX512VL/BW 
-       VPMOVUSWB        xmmreg|mask|z,ymmreg     AVX512VL/BW 
-       VPMOVUSWB        ymmreg|mask|z,zmmreg     AVX512BW 
-       VPMOVUSWB        mem64|mask,xmmreg        AVX512VL/BW 
-       VPMOVUSWB        mem128|mask,ymmreg       AVX512VL/BW 
-       VPMOVUSWB        mem256|mask,zmmreg       AVX512BW 
-       VPMOVW2M         kreg,xmmreg              AVX512VL/BW 
-       VPMOVW2M         kreg,ymmreg              AVX512VL/BW 
-       VPMOVW2M         kreg,zmmreg              AVX512BW 
-       VPMOVWB          xmmreg|mask|z,xmmreg     AVX512VL/BW 
-       VPMOVWB          xmmreg|mask|z,ymmreg     AVX512VL/BW 
-       VPMOVWB          ymmreg|mask|z,zmmreg     AVX512BW 
-       VPMOVWB          mem64|mask,xmmreg        AVX512VL/BW 
-       VPMOVWB          mem128|mask,ymmreg       AVX512VL/BW 
-       VPMOVWB          mem256|mask,zmmreg       AVX512BW 
-       VPMOVZXBD        xmmreg|mask|z,xmmrm32    AVX512VL 
-       VPMOVZXBD        ymmreg|mask|z,xmmrm64    AVX512VL 
-       VPMOVZXBD        zmmreg|mask|z,xmmrm128   AVX512 
-       VPMOVZXBQ        xmmreg|mask|z,xmmrm16    AVX512VL 
-       VPMOVZXBQ        ymmreg|mask|z,xmmrm32    AVX512VL 
-       VPMOVZXBQ        zmmreg|mask|z,xmmrm64    AVX512 
-       VPMOVZXBW        xmmreg|mask|z,xmmrm64    AVX512VL/BW 
-       VPMOVZXBW        ymmreg|mask|z,xmmrm128   AVX512VL/BW 
-       VPMOVZXBW        zmmreg|mask|z,ymmrm256   AVX512BW 
-       VPMOVZXDQ        xmmreg|mask|z,xmmrm64    AVX512VL 
-       VPMOVZXDQ        ymmreg|mask|z,xmmrm128   AVX512VL 
-       VPMOVZXDQ        zmmreg|mask|z,ymmrm256   AVX512 
-       VPMOVZXWD        xmmreg|mask|z,xmmrm64    AVX512VL 
-       VPMOVZXWD        ymmreg|mask|z,xmmrm128   AVX512VL 
-       VPMOVZXWD        zmmreg|mask|z,ymmrm256   AVX512 
-       VPMOVZXWQ        xmmreg|mask|z,xmmrm32    AVX512VL 
-       VPMOVZXWQ        ymmreg|mask|z,xmmrm64    AVX512VL 
-       VPMOVZXWQ        zmmreg|mask|z,xmmrm128   AVX512 
-       VPMULDQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VPMULDQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VPMULDQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-       VPMULHRSW        xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPMULHRSW        ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPMULHRSW        zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPMULHUW         xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPMULHUW         ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPMULHUW         zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPMULHW          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPMULHW          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPMULHW          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPMULLD          xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VPMULLD          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VPMULLD          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-       VPMULLQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL/DQ 
-       VPMULLQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL/DQ 
-       VPMULLQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512DQ 
-       VPMULLW          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPMULLW          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPMULLW          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPMULTISHIFTQB   xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL/VBMI 
-       VPMULTISHIFTQB   ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL/VBMI 
-       VPMULTISHIFTQB   zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512VBMI 
-       VPMULUDQ         xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VPMULUDQ         ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VPMULUDQ         zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-       VPORD            xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VPORD            ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VPORD            zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-       VPORQ            xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VPORQ            ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VPORQ            zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-       VPROLD           xmmreg|mask|z,xmmrm128|b32*,imm8 AVX512VL 
-       VPROLD           ymmreg|mask|z,ymmrm256|b32*,imm8 AVX512VL 
-       VPROLD           zmmreg|mask|z,zmmrm512|b32*,imm8 AVX512 
-       VPROLQ           xmmreg|mask|z,xmmrm128|b64*,imm8 AVX512VL 
-       VPROLQ           ymmreg|mask|z,ymmrm256|b64*,imm8 AVX512VL 
-       VPROLQ           zmmreg|mask|z,zmmrm512|b64*,imm8 AVX512 
-       VPROLVD          xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VPROLVD          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VPROLVD          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-       VPROLVQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VPROLVQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VPROLVQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-       VPRORD           xmmreg|mask|z,xmmrm128|b32*,imm8 AVX512VL 
-       VPRORD           ymmreg|mask|z,ymmrm256|b32*,imm8 AVX512VL 
-       VPRORD           zmmreg|mask|z,zmmrm512|b32*,imm8 AVX512 
-       VPRORQ           xmmreg|mask|z,xmmrm128|b64*,imm8 AVX512VL 
-       VPRORQ           ymmreg|mask|z,ymmrm256|b64*,imm8 AVX512VL 
-       VPRORQ           zmmreg|mask|z,zmmrm512|b64*,imm8 AVX512 
-       VPRORVD          xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VPRORVD          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VPRORVD          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-       VPRORVQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VPRORVQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VPRORVQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-       VPSADBW          xmmreg,xmmreg*,xmmrm128  AVX512VL/BW 
-       VPSADBW          ymmreg,ymmreg*,ymmrm256  AVX512VL/BW 
-       VPSADBW          zmmreg,zmmreg*,zmmrm512  AVX512BW 
-       VPSCATTERDD      xmem32|mask,xmmreg       AVX512VL 
-       VPSCATTERDD      ymem32|mask,ymmreg       AVX512VL 
-       VPSCATTERDD      zmem32|mask,zmmreg       AVX512 
-       VPSCATTERDQ      xmem64|mask,xmmreg       AVX512VL 
-       VPSCATTERDQ      xmem64|mask,ymmreg       AVX512VL 
-       VPSCATTERDQ      ymem64|mask,zmmreg       AVX512 
-       VPSCATTERQD      xmem32|mask,xmmreg       AVX512VL 
-       VPSCATTERQD      ymem32|mask,xmmreg       AVX512VL 
-       VPSCATTERQD      zmem32|mask,ymmreg       AVX512 
-       VPSCATTERQQ      xmem64|mask,xmmreg       AVX512VL 
-       VPSCATTERQQ      ymem64|mask,ymmreg       AVX512VL 
-       VPSCATTERQQ      zmem64|mask,zmmreg       AVX512 
-       VPSHUFB          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPSHUFB          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPSHUFB          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPSHUFD          xmmreg|mask|z,xmmrm128|b32,imm8 AVX512VL 
-       VPSHUFD          ymmreg|mask|z,ymmrm256|b32,imm8 AVX512VL 
-       VPSHUFD          zmmreg|mask|z,zmmrm512|b32,imm8 AVX512 
-       VPSHUFHW         xmmreg|mask|z,xmmrm128,imm8 AVX512VL/BW 
-       VPSHUFHW         ymmreg|mask|z,ymmrm256,imm8 AVX512VL/BW 
-       VPSHUFHW         zmmreg|mask|z,zmmrm512,imm8 AVX512BW 
-       VPSHUFLW         xmmreg|mask|z,xmmrm128,imm8 AVX512VL/BW 
-       VPSHUFLW         ymmreg|mask|z,ymmrm256,imm8 AVX512VL/BW 
-       VPSHUFLW         zmmreg|mask|z,zmmrm512,imm8 AVX512BW 
-       VPSLLD           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL 
-       VPSLLD           ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL 
-       VPSLLD           zmmreg|mask|z,zmmreg*,xmmrm128 AVX512 
-       VPSLLD           xmmreg|mask|z,xmmrm128|b32*,imm8 AVX512VL 
-       VPSLLD           ymmreg|mask|z,ymmrm256|b32*,imm8 AVX512VL 
-       VPSLLD           zmmreg|mask|z,zmmrm512|b32*,imm8 AVX512 
-       VPSLLDQ          xmmreg,xmmrm128*,imm8    AVX512VL/BW 
-       VPSLLDQ          ymmreg,ymmrm256*,imm8    AVX512VL/BW 
-       VPSLLDQ          zmmreg,zmmrm512*,imm8    AVX512BW 
-       VPSLLQ           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL 
-       VPSLLQ           ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL 
-       VPSLLQ           zmmreg|mask|z,zmmreg*,xmmrm128 AVX512 
-       VPSLLQ           xmmreg|mask|z,xmmrm128|b64*,imm8 AVX512VL 
-       VPSLLQ           ymmreg|mask|z,ymmrm256|b64*,imm8 AVX512VL 
-       VPSLLQ           zmmreg|mask|z,zmmrm512|b64*,imm8 AVX512 
-       VPSLLVD          xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VPSLLVD          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VPSLLVD          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-       VPSLLVQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VPSLLVQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VPSLLVQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-       VPSLLVW          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPSLLVW          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPSLLVW          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPSLLW           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPSLLW           ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL/BW 
-       VPSLLW           zmmreg|mask|z,zmmreg*,xmmrm128 AVX512BW 
-       VPSLLW           xmmreg|mask|z,xmmrm128*,imm8 AVX512VL/BW 
-       VPSLLW           ymmreg|mask|z,ymmrm256*,imm8 AVX512VL/BW 
-       VPSLLW           zmmreg|mask|z,zmmrm512*,imm8 AVX512BW 
-       VPSRAD           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL 
-       VPSRAD           ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL 
-       VPSRAD           zmmreg|mask|z,zmmreg*,xmmrm128 AVX512 
-       VPSRAD           xmmreg|mask|z,xmmrm128|b32*,imm8 AVX512VL 
-       VPSRAD           ymmreg|mask|z,ymmrm256|b32*,imm8 AVX512VL 
-       VPSRAD           zmmreg|mask|z,zmmrm512|b32*,imm8 AVX512 
-       VPSRAQ           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL 
-       VPSRAQ           ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL 
-       VPSRAQ           zmmreg|mask|z,zmmreg*,xmmrm128 AVX512 
-       VPSRAQ           xmmreg|mask|z,xmmrm128|b64*,imm8 AVX512VL 
-       VPSRAQ           ymmreg|mask|z,ymmrm256|b64*,imm8 AVX512VL 
-       VPSRAQ           zmmreg|mask|z,zmmrm512|b64*,imm8 AVX512 
-       VPSRAVD          xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VPSRAVD          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VPSRAVD          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-       VPSRAVQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VPSRAVQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VPSRAVQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-       VPSRAVW          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPSRAVW          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPSRAVW          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPSRAW           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPSRAW           ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL/BW 
-       VPSRAW           zmmreg|mask|z,zmmreg*,xmmrm128 AVX512BW 
-       VPSRAW           xmmreg|mask|z,xmmrm128*,imm8 AVX512VL/BW 
-       VPSRAW           ymmreg|mask|z,ymmrm256*,imm8 AVX512VL/BW 
-       VPSRAW           zmmreg|mask|z,zmmrm512*,imm8 AVX512BW 
-       VPSRLD           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL 
-       VPSRLD           ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL 
-       VPSRLD           zmmreg|mask|z,zmmreg*,xmmrm128 AVX512 
-       VPSRLD           xmmreg|mask|z,xmmrm128|b32*,imm8 AVX512VL 
-       VPSRLD           ymmreg|mask|z,ymmrm256|b32*,imm8 AVX512VL 
-       VPSRLD           zmmreg|mask|z,zmmrm512|b32*,imm8 AVX512 
-       VPSRLDQ          xmmreg,xmmrm128*,imm8    AVX512VL/BW 
-       VPSRLDQ          ymmreg,ymmrm256*,imm8    AVX512VL/BW 
-       VPSRLDQ          zmmreg,zmmrm512*,imm8    AVX512BW 
-       VPSRLQ           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL 
-       VPSRLQ           ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL 
-       VPSRLQ           zmmreg|mask|z,zmmreg*,xmmrm128 AVX512 
-       VPSRLQ           xmmreg|mask|z,xmmrm128|b64*,imm8 AVX512VL 
-       VPSRLQ           ymmreg|mask|z,ymmrm256|b64*,imm8 AVX512VL 
-       VPSRLQ           zmmreg|mask|z,zmmrm512|b64*,imm8 AVX512 
-       VPSRLVD          xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VPSRLVD          ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VPSRLVD          zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-       VPSRLVQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VPSRLVQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VPSRLVQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-       VPSRLVW          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPSRLVW          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPSRLVW          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPSRLW           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPSRLW           ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL/BW 
-       VPSRLW           zmmreg|mask|z,zmmreg*,xmmrm128 AVX512BW 
-       VPSRLW           xmmreg|mask|z,xmmrm128*,imm8 AVX512VL/BW 
-       VPSRLW           ymmreg|mask|z,ymmrm256*,imm8 AVX512VL/BW 
-       VPSRLW           zmmreg|mask|z,zmmrm512*,imm8 AVX512BW 
-       VPSUBB           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPSUBB           ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPSUBB           zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPSUBD           xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VPSUBD           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VPSUBD           zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-       VPSUBQ           xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VPSUBQ           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VPSUBQ           zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-       VPSUBSB          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPSUBSB          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPSUBSB          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPSUBSW          xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPSUBSW          ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPSUBSW          zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPSUBUSB         xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPSUBUSB         ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPSUBUSB         zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPSUBUSW         xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPSUBUSW         ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPSUBUSW         zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPSUBW           xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPSUBW           ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPSUBW           zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPTERNLOGD       xmmreg|mask|z,xmmreg,xmmrm128|b32,imm8 AVX512VL 
-       VPTERNLOGD       ymmreg|mask|z,ymmreg,ymmrm256|b32,imm8 AVX512VL 
-       VPTERNLOGD       zmmreg|mask|z,zmmreg,zmmrm512|b32,imm8 AVX512 
-       VPTERNLOGQ       xmmreg|mask|z,xmmreg,xmmrm128|b64,imm8 AVX512VL 
-       VPTERNLOGQ       ymmreg|mask|z,ymmreg,ymmrm256|b64,imm8 AVX512VL 
-       VPTERNLOGQ       zmmreg|mask|z,zmmreg,zmmrm512|b64,imm8 AVX512 
-       VPTESTMB         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPTESTMB         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPTESTMB         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPTESTMD         kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VPTESTMD         kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VPTESTMD         kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-       VPTESTMQ         kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VPTESTMQ         kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VPTESTMQ         kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-       VPTESTMW         kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPTESTMW         kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPTESTMW         kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPTESTNMB        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPTESTNMB        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPTESTNMB        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPTESTNMD        kreg|mask,xmmreg,xmmrm128|b32 AVX512VL 
-       VPTESTNMD        kreg|mask,ymmreg,ymmrm256|b32 AVX512VL 
-       VPTESTNMD        kreg|mask,zmmreg,zmmrm512|b32 AVX512 
-       VPTESTNMQ        kreg|mask,xmmreg,xmmrm128|b64 AVX512VL 
-       VPTESTNMQ        kreg|mask,ymmreg,ymmrm256|b64 AVX512VL 
-       VPTESTNMQ        kreg|mask,zmmreg,zmmrm512|b64 AVX512 
-       VPTESTNMW        kreg|mask,xmmreg,xmmrm128 AVX512VL/BW 
-       VPTESTNMW        kreg|mask,ymmreg,ymmrm256 AVX512VL/BW 
-       VPTESTNMW        kreg|mask,zmmreg,zmmrm512 AVX512BW 
-       VPUNPCKHBW       xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPUNPCKHBW       ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPUNPCKHBW       zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPUNPCKHDQ       xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VPUNPCKHDQ       ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VPUNPCKHDQ       zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-       VPUNPCKHQDQ      xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VPUNPCKHQDQ      ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VPUNPCKHQDQ      zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-       VPUNPCKHWD       xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPUNPCKHWD       ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPUNPCKHWD       zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPUNPCKLBW       xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPUNPCKLBW       ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPUNPCKLBW       zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPUNPCKLDQ       xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VPUNPCKLDQ       ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VPUNPCKLDQ       zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-       VPUNPCKLQDQ      xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VPUNPCKLQDQ      ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VPUNPCKLQDQ      zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-       VPUNPCKLWD       xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW 
-       VPUNPCKLWD       ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW 
-       VPUNPCKLWD       zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW 
-       VPXORD           xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VPXORD           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VPXORD           zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-       VPXORQ           xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VPXORQ           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VPXORQ           zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-       VRANGEPD         xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 AVX512VL/DQ 
-       VRANGEPD         ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VL/DQ 
-       VRANGEPD         zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae,imm8 AVX512DQ 
-       VRANGEPS         xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 AVX512VL/DQ 
-       VRANGEPS         ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 AVX512VL/DQ 
-       VRANGEPS         zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae,imm8 AVX512DQ 
-       VRANGESD         xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 AVX512DQ 
-       VRANGESS         xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 AVX512DQ 
-       VRCP14PD         xmmreg|mask|z,xmmrm128|b64 AVX512VL 
-       VRCP14PD         ymmreg|mask|z,ymmrm256|b64 AVX512VL 
-       VRCP14PD         zmmreg|mask|z,zmmrm512|b64 AVX512 
-       VRCP14PS         xmmreg|mask|z,xmmrm128|b32 AVX512VL 
-       VRCP14PS         ymmreg|mask|z,ymmrm256|b32 AVX512VL 
-       VRCP14PS         zmmreg|mask|z,zmmrm512|b32 AVX512 
-       VRCP14SD         xmmreg|mask|z,xmmreg*,xmmrm64 AVX512 
-       VRCP14SS         xmmreg|mask|z,xmmreg*,xmmrm32 AVX512 
-       VRCP28PD         zmmreg|mask|z,zmmrm512|b64|sae AVX512ER 
-       VRCP28PS         zmmreg|mask|z,zmmrm512|b32|sae AVX512ER 
-       VRCP28SD         xmmreg|mask|z,xmmreg*,xmmrm64|sae AVX512ER 
-       VRCP28SS         xmmreg|mask|z,xmmreg*,xmmrm32|sae AVX512ER 
-       VREDUCEPD        xmmreg|mask|z,xmmrm128|b64,imm8 AVX512VL/DQ 
-       VREDUCEPD        ymmreg|mask|z,ymmrm256|b64,imm8 AVX512VL/DQ 
-       VREDUCEPD        zmmreg|mask|z,zmmrm512|b64|sae,imm8 AVX512DQ 
-       VREDUCEPS        xmmreg|mask|z,xmmrm128|b32,imm8 AVX512VL/DQ 
-       VREDUCEPS        ymmreg|mask|z,ymmrm256|b32,imm8 AVX512VL/DQ 
-       VREDUCEPS        zmmreg|mask|z,zmmrm512|b32|sae,imm8 AVX512DQ 
-       VREDUCESD        xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 AVX512DQ 
-       VREDUCESS        xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 AVX512DQ 
-       VRNDSCALEPD      xmmreg|mask|z,xmmrm128|b64,imm8 AVX512VL 
-       VRNDSCALEPD      ymmreg|mask|z,ymmrm256|b64,imm8 AVX512VL 
-       VRNDSCALEPD      zmmreg|mask|z,zmmrm512|b64|sae,imm8 AVX512 
-       VRNDSCALEPS      xmmreg|mask|z,xmmrm128|b32,imm8 AVX512VL 
-       VRNDSCALEPS      ymmreg|mask|z,ymmrm256|b32,imm8 AVX512VL 
-       VRNDSCALEPS      zmmreg|mask|z,zmmrm512|b32|sae,imm8 AVX512 
-       VRNDSCALESD      xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 AVX512 
-       VRNDSCALESS      xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 AVX512 
-       VRSQRT14PD       xmmreg|mask|z,xmmrm128|b64 AVX512VL 
-       VRSQRT14PD       ymmreg|mask|z,ymmrm256|b64 AVX512VL 
-       VRSQRT14PD       zmmreg|mask|z,zmmrm512|b64 AVX512 
-       VRSQRT14PS       xmmreg|mask|z,xmmrm128|b32 AVX512VL 
-       VRSQRT14PS       ymmreg|mask|z,ymmrm256|b32 AVX512VL 
-       VRSQRT14PS       zmmreg|mask|z,zmmrm512|b32 AVX512 
-       VRSQRT14SD       xmmreg|mask|z,xmmreg*,xmmrm64 AVX512 
-       VRSQRT14SS       xmmreg|mask|z,xmmreg*,xmmrm32 AVX512 
-       VRSQRT28PD       zmmreg|mask|z,zmmrm512|b64|sae AVX512ER 
-       VRSQRT28PS       zmmreg|mask|z,zmmrm512|b32|sae AVX512ER 
-       VRSQRT28SD       xmmreg|mask|z,xmmreg*,xmmrm64|sae AVX512ER 
-       VRSQRT28SS       xmmreg|mask|z,xmmreg*,xmmrm32|sae AVX512ER 
-       VSCALEFPD        xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VSCALEFPD        ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VSCALEFPD        zmmreg|mask|z,zmmreg*,zmmrm512|b64|er AVX512 
-       VSCALEFPS        xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VSCALEFPS        ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VSCALEFPS        zmmreg|mask|z,zmmreg*,zmmrm512|b32|er AVX512 
-       VSCALEFSD        xmmreg|mask|z,xmmreg*,xmmrm64|er AVX512 
-       VSCALEFSS        xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512 
-       VSCATTERDPD      xmem64|mask,xmmreg       AVX512VL 
-       VSCATTERDPD      xmem64|mask,ymmreg       AVX512VL 
-       VSCATTERDPD      ymem64|mask,zmmreg       AVX512 
-       VSCATTERDPS      xmem32|mask,xmmreg       AVX512VL 
-       VSCATTERDPS      ymem32|mask,ymmreg       AVX512VL 
-       VSCATTERDPS      zmem32|mask,zmmreg       AVX512 
-       VSCATTERPF0DPD   ymem64|mask              AVX512PF 
-       VSCATTERPF0DPS   zmem32|mask              AVX512PF 
-       VSCATTERPF0QPD   zmem64|mask              AVX512PF 
-       VSCATTERPF0QPS   zmem32|mask              AVX512PF 
-       VSCATTERPF1DPD   ymem64|mask              AVX512PF 
-       VSCATTERPF1DPS   zmem32|mask              AVX512PF 
-       VSCATTERPF1QPD   zmem64|mask              AVX512PF 
-       VSCATTERPF1QPS   zmem32|mask              AVX512PF 
-       VSCATTERQPD      xmem64|mask,xmmreg       AVX512VL 
-       VSCATTERQPD      ymem64|mask,ymmreg       AVX512VL 
-       VSCATTERQPD      zmem64|mask,zmmreg       AVX512 
-       VSCATTERQPS      xmem32|mask,xmmreg       AVX512VL 
-       VSCATTERQPS      ymem32|mask,xmmreg       AVX512VL 
-       VSCATTERQPS      zmem32|mask,ymmreg       AVX512 
-       VSHUFF32X4       ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 AVX512VL 
-       VSHUFF32X4       zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 AVX512 
-       VSHUFF64X2       ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VL 
-       VSHUFF64X2       zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 AVX512 
-       VSHUFI32X4       ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 AVX512VL 
-       VSHUFI32X4       zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 AVX512 
-       VSHUFI64X2       ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VL 
-       VSHUFI64X2       zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 AVX512 
-       VSHUFPD          xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 AVX512VL 
-       VSHUFPD          ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VL 
-       VSHUFPD          zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 AVX512 
-       VSHUFPS          xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 AVX512VL 
-       VSHUFPS          ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 AVX512VL 
-       VSHUFPS          zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 AVX512 
-       VSQRTPD          xmmreg|mask|z,xmmrm128|b64 AVX512VL 
-       VSQRTPD          ymmreg|mask|z,ymmrm256|b64 AVX512VL 
-       VSQRTPD          zmmreg|mask|z,zmmrm512|b64|er AVX512 
-       VSQRTPS          xmmreg|mask|z,xmmrm128|b32 AVX512VL 
-       VSQRTPS          ymmreg|mask|z,ymmrm256|b32 AVX512VL 
-       VSQRTPS          zmmreg|mask|z,zmmrm512|b32|er AVX512 
-       VSQRTSD          xmmreg|mask|z,xmmreg*,xmmrm64|er AVX512 
-       VSQRTSS          xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512 
-       VSUBPD           xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VSUBPD           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VSUBPD           zmmreg|mask|z,zmmreg*,zmmrm512|b64|er AVX512 
-       VSUBPS           xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VSUBPS           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VSUBPS           zmmreg|mask|z,zmmreg*,zmmrm512|b32|er AVX512 
-       VSUBSD           xmmreg|mask|z,xmmreg*,xmmrm64|er AVX512 
-       VSUBSS           xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512 
-       VUCOMISD         xmmreg,xmmrm64|sae       AVX512 
-       VUCOMISS         xmmreg,xmmrm32|sae       AVX512 
-       VUNPCKHPD        xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VUNPCKHPD        ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VUNPCKHPD        zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-       VUNPCKHPS        xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VUNPCKHPS        ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VUNPCKHPS        zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-       VUNPCKLPD        xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL 
-       VUNPCKLPD        ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL 
-       VUNPCKLPD        zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512 
-       VUNPCKLPS        xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL 
-       VUNPCKLPS        ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL 
-       VUNPCKLPS        zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512 
-       VXORPD           xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL/DQ 
-       VXORPD           ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL/DQ 
-       VXORPD           zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512DQ 
-       VXORPS           xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL/DQ 
-       VXORPS           ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL/DQ 
-       VXORPS           zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512DQ
-
-F.1.46 Intel memory protection keys for userspace (PKU aka PKEYs)
-
-       RDPKRU                                    LONG 
-       WRPKRU                                    LONG
-
-F.1.47 Read Processor ID
-
-       RDPID            reg32                    NOLONG 
-       RDPID            reg64                    LONG 
-       RDPID            reg32                    LONG,UNDOC
-
-F.1.48 New memory instructions
-
-       CLFLUSHOPT       mem                       
-       CLWB             mem                       
-       PCOMMIT                                   NEVER,NOP 
-       CLZERO                                    AMD 
-       CLZERO           reg_ax                   AMD,ND,NOLONG 
-       CLZERO           reg_eax                  AMD,ND 
-       CLZERO           reg_rax                  AMD,ND,LONG
-
-F.1.49 Processor trace write
-
-       PTWRITE          rm32                      
-       PTWRITE          rm64                     LONG
-
-F.1.50 Instructions from the Intel Instruction Set Extensions,
-
-F.1.51 doc 319433-034 May 2018
-
-       CLDEMOTE         mem                       
-       MOVDIRI          mem32,reg32              SD 
-       MOVDIRI          mem64,reg64              LONG 
-       MOVDIR64B        reg16,mem512             NOLONG 
-       MOVDIR64B        reg32,mem512              
-       MOVDIR64B        reg64,mem512             LONG 
-       PCONFIG                                    
-       TPAUSE           reg32                     
-       TPAUSE           reg32,reg_edx,reg_eax    ND 
-       UMONITOR         reg16                    NOLONG 
-       UMONITOR         reg32                     
-       UMONITOR         reg64                    LONG 
-       UMWAIT           reg32                     
-       UMWAIT           reg32,reg_edx,reg_eax    ND 
-       WBNOINVD                                  
-
-F.1.52 Galois field operations (GFNI)
-
-       GF2P8AFFINEINVQB xmmreg,xmmrm128,imm8     GFNI,SSE 
-       VGF2P8AFFINEINVQB xmmreg,xmmreg*,xmmrm128,imm8 GFNI,AVX 
-       VGF2P8AFFINEINVQB ymmreg,ymmreg*,ymmrm256,imm8 GFNI,AVX 
-       VGF2P8AFFINEINVQB xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 AVX512VL,GFNI 
-       VGF2P8AFFINEINVQB ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VL,GFNI 
-       VGF2P8AFFINEINVQB zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 AVX512,GFNI 
-       GF2P8AFFINEQB    xmmreg,xmmrm128,imm8     GFNI,SSE 
-       VGF2P8AFFINEQB   xmmreg,xmmreg*,xmmrm128,imm8 GFNI,AVX 
-       VGF2P8AFFINEQB   ymmreg,ymmreg*,ymmrm256,imm8 GFNI,AVX 
-       VGF2P8AFFINEQB   xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 AVX512VL,GFNI 
-       VGF2P8AFFINEQB   ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VL,GFNI 
-       VGF2P8AFFINEQB   zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 AVX512,GFNI 
-       GF2P8MULB        xmmreg,xmmrm128          GFNI,SSE 
-       VGF2P8MULB       xmmreg,xmmreg*,xmmrm128  GFNI,AVX 
-       VGF2P8MULB       ymmreg,ymmreg*,ymmrm256  GFNI,AVX 
-       VGF2P8MULB       xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL,GFNI 
-       VGF2P8MULB       ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL,GFNI 
-       VGF2P8MULB       zmmreg|mask|z,zmmreg*,zmmrm512 AVX512,GFNI
-
-F.1.53 AVX512 Vector Bit Manipulation Instructions 2
-
-       VPCOMPRESSB      mem128|mask,xmmreg       AVX512VBMI2/VL 
-       VPCOMPRESSB      mem256|mask,ymmreg       AVX512VBMI2/VL 
-       VPCOMPRESSB      mem512|mask,zmmreg       AVX512VBMI2 
-       VPCOMPRESSB      xmmreg|mask|z,xmmreg     AVX512VBMI2/VL 
-       VPCOMPRESSB      ymmreg|mask|z,ymmreg     AVX512VBMI2/VL 
-       VPCOMPRESSB      zmmreg|mask|z,zmmreg     AVX512VBMI2 
-       VPCOMPRESSW      mem128|mask,xmmreg       AVX512VBMI2/VL 
-       VPCOMPRESSW      mem256|mask,ymmreg       AVX512VBMI2/VL 
-       VPCOMPRESSW      mem512|mask,zmmreg       AVX512VBMI2 
-       VPCOMPRESSW      xmmreg|mask|z,xmmreg     AVX512VBMI2/VL 
-       VPCOMPRESSW      ymmreg|mask|z,ymmreg     AVX512VBMI2/VL 
-       VPCOMPRESSW      zmmreg|mask|z,zmmreg     AVX512VBMI2 
-       VPEXPANDB        xmmreg|mask|z,xmmrm128   AVX512VBMI2/VL 
-       VPEXPANDB        ymmreg|mask|z,ymmrm256   AVX512VBMI2/VL 
-       VPEXPANDB        zmmreg|mask|z,zmmrm512   AVX512VBMI2 
-       VPEXPANDW        xmmreg|mask|z,xmmrm128   AVX512VBMI2/VL 
-       VPEXPANDW        ymmreg|mask|z,ymmrm256   AVX512VBMI2/VL 
-       VPEXPANDW        zmmreg|mask|z,zmmrm512   AVX512VBMI2 
-       VPSHLDW          xmmreg|mask|z,xmmreg*,xmmrm128,imm8 AVX512VBMI2/VL 
-       VPSHLDW          ymmreg|mask|z,ymmreg*,ymmrm256,imm8 AVX512VBMI2/VL 
-       VPSHLDW          zmmreg|mask|z,zmmreg*,zmmrm512,imm8 AVX512VBMI2 
-       VPSHLDD          xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 AVX512VBMI2/VL 
-       VPSHLDD          ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 AVX512VBMI2/VL 
-       VPSHLDD          zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 AVX512VBMI2 
-       VPSHLDQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 AVX512VBMI2/VL 
-       VPSHLDQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VBMI2/VL 
-       VPSHLDQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 AVX512VBMI2 
-       VPSHLDVW         xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VBMI2/VL 
-       VPSHLDVW         ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VBMI2/VL 
-       VPSHLDVW         zmmreg|mask|z,zmmreg*,zmmrm512 AVX512VBMI2 
-       VPSHLDVD         xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VBMI2/VL 
-       VPSHLDVD         ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VBMI2/VL 
-       VPSHLDVD         zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512VBMI2 
-       VPSHLDVQ         xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VBMI2/VL 
-       VPSHLDVQ         ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VBMI2/VL 
-       VPSHLDVQ         zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512VBMI2 
-       VPSHRDW          xmmreg|mask|z,xmmreg*,xmmrm128,imm8 AVX512VBMI2/VL 
-       VPSHRDW          ymmreg|mask|z,ymmreg*,ymmrm256,imm8 AVX512VBMI2/VL 
-       VPSHRDW          zmmreg|mask|z,zmmreg*,zmmrm512,imm8 AVX512VBMI2 
-       VPSHRDD          xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 AVX512VBMI2/VL 
-       VPSHRDD          ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 AVX512VBMI2/VL 
-       VPSHRDD          zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 AVX512VBMI2 
-       VPSHRDQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 AVX512VBMI2/VL 
-       VPSHRDQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VBMI2/VL 
-       VPSHRDQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 AVX512VBMI2 
-       VPSHRDVW         xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VBMI2/VL 
-       VPSHRDVW         ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VBMI2/VL 
-       VPSHRDVW         zmmreg|mask|z,zmmreg*,zmmrm512 AVX512VBMI2 
-       VPSHRDVD         xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VBMI2/VL 
-       VPSHRDVD         ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VBMI2/VL 
-       VPSHRDVD         zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512VBMI2 
-       VPSHRDVQ         xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VBMI2/VL 
-       VPSHRDVQ         ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VBMI2/VL 
-       VPSHRDVQ         zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512VBMI2
-
-F.1.54 AVX512 VNNI
-
-       VPDPBUSD         xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VNNI/VL 
-       VPDPBUSD         ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VNNI/VL 
-       VPDPBUSD         zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512VNNI 
-       VPDPBUSDS        xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VNNI/VL 
-       VPDPBUSDS        ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VNNI/VL 
-       VPDPBUSDS        zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512VNNI 
-       VPDPWSSD         xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VNNI/VL 
-       VPDPWSSD         ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VNNI/VL 
-       VPDPWSSD         zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512VNNI 
-       VPDPWSSDS        xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VNNI/VL 
-       VPDPWSSDS        ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VNNI/VL 
-       VPDPWSSDS        zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512VNNI
-
-F.1.55 AVX512 Bit Algorithms
-
-       VPOPCNTB         xmmreg|mask|z,xmmrm128   AVX512BITALG/VL 
-       VPOPCNTB         ymmreg|mask|z,ymmrm256   AVX512BITALG/VL 
-       VPOPCNTB         zmmreg|mask|z,zmmrm512   AVX512BITALG 
-       VPOPCNTW         xmmreg|mask|z,xmmrm128   AVX512BITALG/VL 
-       VPOPCNTW         ymmreg|mask|z,ymmrm256   AVX512BITALG/VL 
-       VPOPCNTW         zmmreg|mask|z,zmmrm512   AVX512BITALG 
-       VPOPCNTD         xmmreg|mask|z,xmmrm128   AVX512VPOPCNTDQ/VL 
-       VPOPCNTD         ymmreg|mask|z,ymmrm256   AVX512VPOPCNTDQ/VL 
-       VPOPCNTD         zmmreg|mask|z,zmmrm512   AVX512VPOPCNTDQ 
-       VPOPCNTQ         xmmreg|mask|z,xmmrm128   AVX512VPOPCNTDQ/VL 
-       VPOPCNTQ         ymmreg|mask|z,ymmrm256   AVX512VPOPCNTDQ/VL 
-       VPOPCNTQ         zmmreg|mask|z,zmmrm512   AVX512VPOPCNTDQ 
-       VPSHUFBITQMB     kreg|mask,xmmreg,xmmrm128 AVX512BITALG/VL 
-       VPSHUFBITQMB     kreg|mask,ymmreg,ymmrm256 AVX512BITALG/VL 
-       VPSHUFBITQMB     kreg|mask,zmmreg,zmmrm512 AVX512BITALG
-
-F.1.56 AVX512 4-iteration Multiply-Add
-
-       V4FMADDPS        zmmreg|mask|z,zmmreg|rs4,mem AVX5124FMAPS,SO 
-       V4FNMADDPS       zmmreg|mask|z,zmmreg|rs4,mem AVX5124FMAPS,SO 
-       V4FMADDSS        zmmreg|mask|z,zmmreg|rs4,mem AVX5124FMAPS,SO 
-       V4FNMADDSS       zmmreg|mask|z,zmmreg|rs4,mem AVX5124FMAPS,SO
-
-F.1.57 AVX512 4-iteration Dot Product
-
-       V4DPWSSDS        zmmreg|mask|z,zmmreg|rs4,mem AVX5124VNNIW,SO 
-       V4DPWSSD         zmmreg|mask|z,zmmreg|rs4,mem AVX5124VNNIW,SO
-
-F.1.58 Intel Software Guard Extensions (SGX)
-
-       ENCLS                                     SGX 
-       ENCLU                                     SGX 
-       ENCLV                                     SGX
-
-F.1.59 Intel Control-Flow Enforcement Technology (CET)
-
-       CLRSSBSY         mem64                    CET 
-       ENDBR32                                   CET 
-       ENDBR64                                   CET 
-       INCSSPD          reg32                    CET 
-       INCSSPQ          reg64                    CET,LONG 
-       RDSSPD           reg32                    CET 
-       RDSSPQ           reg64                    CET,LONG 
-       RSTORSSP         mem64                    CET 
-       SAVEPREVSSP                               CET 
-       SETSSBSY                                  CET 
-       WRUSSD           mem32,reg32              CET 
-       WRUSSQ           mem64,reg64              CET,LONG 
-       WRSSD            mem32,reg32              CET 
-       WRSSQ            mem64,reg64              CET,LONG
-
-F.1.60 Instructions from ISE doc 319433-040, June 2020
-
-       ENQCMD           reg16,mem512             ENQCMD,SZ,NOLONG 
-       ENQCMD           reg32,mem512             ENQCMD,SZ,NOLONG,ND 
-       ENQCMD           reg32,mem512             ENQCMD,SZ 
-       ENQCMD           reg64,mem512             ENQCMD,SZ,LONG 
-       ENQCMDS          reg16,mem512             ENQCMD,SZ,NOLONG,PRIV 
-       ENQCMDS          reg32,mem512             ENQCMD,SZ,NOLONG,PRIV,ND 
-       ENQCMDS          reg32,mem512             ENQCMD,SZ,PRIV 
-       ENQCMDS          reg64,mem512             ENQCMD,SZ,PRIV,LONG 
-       PCONFIG                                   PCONFIG,PRIV 
-       SERIALIZE                                 SERIALIZE 
-       WBNOINVD                                  WBNOINVD,PRIV 
-       XRESLDTRK                                 TSXLDTRK 
-       XSUSLDTRK                                 TSXLDTRK
-
-F.1.61 AVX512 Bfloat16 instructions
-
-       VCVTNE2PS2BF16   xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512BF16 
-       VCVTNE2PS2BF16   ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512BF16 
-       VCVTNE2PS2BF16   zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512BF16 
-       VCVTNEPS2BF16    xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512BF16 
-       VCVTNEPS2BF16    ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512BF16 
-       VCVTNEPS2BF16    zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512BF16 
-       VDPBF16PS        xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512BF16 
-       VDPBF16PS        ymmreg|mask|z,ymmreg*,ymmrm128|b32 AVX512BF16 
-       VDPBF16PS        zmmreg|mask|z,zmmreg*,zmmrm128|b32 AVX512BF16
-
-F.1.62 AVX512 mask intersect instructions
-
-       VP2INTERSECTD    kreg|rs2,xmmreg,xmmrm128|b32 AVX512BF16 
-       VP2INTERSECTD    kreg|rs2,ymmreg,ymmrm128|b32 AVX512BF16 
-       VP2INTERSECTD    kreg|rs2,zmmreg,zmmrm128|b32 AVX512BF16
-
-F.1.63 Intel Advanced Matrix Extensions (AMX)
-
-       LDTILECFG        mem512                   AMXTILE,SZ,LONG 
-       STTILECFG        mem512                   AMXTILE,SZ,LONG 
-       TDPBF16PS        tmmreg,tmmreg,tmmreg     AMXBF16,LONG 
-       TDPBSSD          tmmreg,tmmreg,tmmreg     AMXINT8,LONG 
-       TDPBSUD          tmmreg,tmmreg,tmmreg     AMXINT8,LONG 
-       TDPBUSD          tmmreg,tmmreg,tmmreg     AMXINT8,LONG 
-       TDPBUUD          tmmreg,tmmreg,tmmreg     AMXINT8,LONG 
-       TILELOADD        tmmreg,mem               AMXTILE,MIB,SIB,SX,LONG 
-       TILELOADDT1      tmmreg,mem               AMXTILE,MIB,SIB,SX,LONG 
-       TILERELEASE                               AMXTILE,LONG 
-       TILESTORED       mem,tmmreg               AMXTILE,MIB,SIB,SX,LONG 
-       TILEZERO         tmmreg                   AMXTILE,LONG
-
-F.1.64 Intel AVX512-FP16 instructions
-
-       VADDPH           xmmreg|mask|z,xmmreg*,xmmrm16|b16 AVX512FP16/VL 
-       VADDPH           ymmreg|mask|z,ymmreg*,ymmrm16|b16 AVX512FP16/VL 
-       VADDPH           zmmreg|mask|z,zmmreg*,zmmrm16|b16|er AVX512FP16 
-       VADDSH           xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-       VCMPPH           kreg|mask,xmmreg*,xmmrm16|b16,imm8 AVX512FP16/VL 
-       VCMPPH           kreg|mask,ymmreg*,ymmrm16|b16,imm8 AVX512FP16/VL 
-       VCMPPH           kreg|mask,zmmreg*,zmmrm16|b16|sae,imm8 AVX512FP16 
-       VCMPSH           kreg|mask,xmmreg*,xmmrm16|sae,imm8 AVX512FP16 
-       VCOMISH          xmmreg,xmmrm16|sae       AVX512FP16 
-       VCVTDQ2PH        xmmreg|mask|z,xmmrm128|b32 AVX512FP16/VL 
-       VCVTDQ2PH        ymmreg|mask|z,ymmrm256|b32 AVX512FP16/VL 
-       VCVTDQ2PH        zmmreg|mask|z,zmmrm512|b32|er AVX512FP16 
-       VCVTPD2PH        xmmreg|mask|z,xmmrm128|b64 AVX512FP16/VL 
-       VCVTPD2PH        ymmreg|mask|z,ymmrm256|b64 AVX512FP16/VL 
-       VCVTPD2PH        zmmreg|mask|z,zmmrm512|b64|er AVX512FP16 
-       VCVTPH2DQ        xmmreg|mask|z,xmmrm64|b16 AVX512FP16/VL 
-       VCVTPH2DQ        ymmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-       VCVTPH2DQ        zmmreg|mask|z,ymmrm256|b16|er AVX512FP16 
-       VCVTPH2PD        xmmreg|mask|z,xmmrm32|b16 AVX512FP16/VL 
-       VCVTPH2PD        ymmreg|mask|z,xmmrm64|b16 AVX512FP16/VL 
-       VCVTPH2PD        zmmreg|mask|z,xmmrm128|b16|sae AVX512FP16 
-       VCVTPH2PS        xmmreg,xmmrm64           AVX512FC16 
-       VCVTPH2PS        ymmreg,xmmrm128          AVX512FC16 
-       VCVTPH2PS        xmmreg|mask|z,xmmrm64    AVX512VL 
-       VCVTPH2PS        ymmreg|mask|z,xmmrm128   AVX512VL 
-       VCVTPH2PS        zmmreg|mask|z,ymmrm256|sae AVX512 
-       VCVTPH2PSX       xmmreg|mask|z,xmmrm64|b16 AVX512FP16/VL 
-       VCVTPH2PSX       ymmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-       VCVTPH2PSX       zmmreg|mask|z,ymmrm256|b16|sae AVX512FP16 
-       VCVTPH2QQ        xmmreg|mask|z,xmmrm32|b16 AVX512FP16/VL 
-       VCVTPH2QQ        ymmreg|mask|z,xmmrm64|b16 AVX512FP16/VL 
-       VCVTPH2QQ        zmmreg|mask|z,xmmrm128|b16|er AVX512FP16 
-       VCVTPH2UDQ       xmmreg|mask|z,xmmrm32|b16 AVX512FP16/VL 
-       VCVTPH2UDQ       ymmreg|mask|z,xmmrm64|b16 AVX512FP16/VL 
-       VCVTPH2UDQ       zmmreg|mask|z,xmmrm128|b16|er AVX512FP16 
-       VCVTPH2UQQ       xmmreg|mask|z,xmmrm32|b16 AVX512FP16/VL 
-       VCVTPH2UQQ       ymmreg|mask|z,xmmrm64|b16 AVX512FP16/VL 
-       VCVTPH2UQQ       zmmreg|mask|z,xmmrm128|b16|er AVX512FP16 
-       VCVTPH2UW        xmmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-       VCVTPH2UW        ymmreg|mask|z,ymmrm256|b16 AVX512FP16/VL 
-       VCVTPH2UW        zmmreg|mask|z,zmmrm512|b16|er AVX512FP16 
-       VCVTPH2W         xmmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-       VCVTPH2W         ymmreg|mask|z,ymmrm256|b16 AVX512FP16/VL 
-       VCVTPH2W         zmmreg|mask|z,zmmrm512|b16|er AVX512FP16 
-       VCVTPS2PH        xmmrm64,xmmreg,imm8      AVX512FC16/VL 
-       VCVTPS2PH        xmmrm128,ymmreg,imm8     AVX512FC16/VL 
-       VCVTPS2PH        xmmreg|mask|z,xmmreg,imm8 AVX512VL 
-       VCVTPS2PH        mem64|mask,xmmreg,imm8   AVX512VL 
-       VCVTPS2PH        xmmreg|mask|z,ymmreg,imm8 AVX512VL 
-       VCVTPS2PH        mem128|mask,ymmreg,imm8  AVX512VL 
-       VCVTPS2PH        ymmreg|mask|z,zmmreg|sae,imm8 AVX512 
-       VCVTPS2PH        mem256|mask,zmmreg|sae,imm8 AVX512 
-       VCVTPS2PH        xmmreg|mask|z,xmmrm128|b32 AVX512FP16/VL 
-       VCVTPS2PH        ymmreg|mask|z,ymmrm256|b32 AVX512FP16/VL 
-       VCVTPS2PH        zmmreg|mask|z,zmmrm512|b32|er AVX512FP16 
-       VCVTQQ2PH        xmmreg|mask|z,xmmrm128|b64 AVX512FP16/VL 
-       VCVTQQ2PH        ymmreg|mask|z,ymmrm256|b64 AVX512FP16/VL 
-       VCVTQQ2PH        zmmreg|mask|z,zmmrm512|b64|er AVX512FP16/VL 
-       VCVTSD2SH        xmmreg|mask|z,xmmreg*,xmmrm64|er AVX512FP16 
-       VCVTSH2SD        xmmreg,xmmreg*,xmmrm16|sae AVX512FP16 
-       VCVTSH2SI        reg32,xmmrm16|er         AVX512FP16 
-       VCVTSH2SI        reg64,xmmrm16|er         AVX512FP16 
-       VCVTSH2SS        xmmreg|mask|z,xmmreg*,xmmrm16|sae AVX512FP16 
-       VCVTSH2USI       reg32,xmmrm16|er         AVX512FP16 
-       VCVTSH2USI       reg64,xmmrm16|er         AVX512FP16 
-       VCVTSI2SH        xmmreg,xmmreg*,rm32|er   AVX512FP16 
-       VCVTSI2SH        xmmreg,xmmreg*,rm64|er   AVX512FP16 
-       VCVTSS2SH        xmmreg,xmmreg*,xmmrm32|er AVX512FP16 
-       VCVTTPH2DQ       xmmreg|mask|z,xmmrm64|b16 AVX512FP16/VL 
-       VCVTTPH2DQ       ymmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-       VCVTTPH2DQ       zmmreg|mask|z,ymmrm256|b16|sae AVX512FP16 
-       VCVTTPH2QQ       xmmreg|mask|z,xmmrm32|b16 AVX512FP16/VL 
-       VCVTTPH2QQ       ymmreg|mask|z,xmmrm64|b16 AVX512FP16/VL 
-       VCVTTPH2QQ       zmmreg|mask|z,xmmrm128|b16|sae AVX512FP16 
-       VCVTTPH2UDQ      xmmreg|mask|z,xmmrm64|b16 AVX512FP16/VL 
-       VCVTTPH2UDQ      ymmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-       VCVTTPH2UDQ      zmmreg|mask|z,ymmrm256|b16|sae AVX512FP16 
-       VCVTTPH2UQQ      xmmreg|mask|z,xmmrm32|b16 AVX512FP16/VL 
-       VCVTTPH2UQQ      ymmreg|mask|z,xmmrm64|b16 AVX512FP16/VL 
-       VCVTTPH2UQQ      zmmreg|mask|z,xmmrm128|b16|sae AVX512FP16 
-       VCVTTPH2UW       xmmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-       VCVTTPH2UW       ymmreg|mask|z,ymmrm256|b16 AVX512FP16/VL 
-       VCVTTPH2UW       zmmreg|mask|z,zmmrm512|b16|sae AVX512FP16 
-       VCVTTPH2W        xmmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-       VCVTTPH2W        ymmreg|mask|z,ymmrm256|b16 AVX512FP16/VL 
-       VCVTTPH2W        zmmreg|mask|z,zmmrm512|b16|sae AVX512FP16 
-       VCVTTSH2SI       reg32,xmmrm16|sae        AVX512FP16 
-       VCVTTSH2SI       reg64,xmmrm16|sae        AVX512FP16 
-       VCVTTSH2USI      reg32,xmmrm16|sae        AVX512FP16 
-       VCVTTSH2USI      reg64,xmmrm16|sae        AVX512FP16 
-       VCVTUDQ2PH       xmmreg|mask|z,xmmrm128|b32 AVX512FP16/VL 
-       VCVTUDQ2PH       ymmreg|mask|z,ymmrm256|b32 AVX512FP16/VL 
-       VCVTUDQ2PH       zmmreg|mask|z,zmmrm512|b32 AVX512FP16 
-       VCVTUQQ2PH       xmmreg|mask|z,xmmrm128|b32 AVX512FP16/VL 
-       VCVTUQQ2PH       ymmreg|mask|z,ymmrm256|b32 AVX512FP16/VL 
-       VCVTUQQ2PH       zmmreg|mask|z,zmmrm512|b32 AVX512FP16 
-       VCVTUSI2SH       xmmreg,xmmreg|er,rm32|er AVX512FP16 
-       VCVTUSI2SS       xmmreg,xmmreg|er,rm64|er AVX512FP16 
-       VCVTUW2PH        xmmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-       VCVTUW2PH        ymmreg|mask|z,ymmrm256|b16 AVX512FP16/VL 
-       VCVTUW2PH        zmmreg|mask|z,zmmrm512|b16|er AVX512FP16 
-       VCVTW2PH         xmmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-       VCVTW2PH         ymmreg|mask|z,ymmrm256|b16 AVX512FP16/VL 
-       VCVTW2PH         zmmreg|mask|z,zmmrm512|b16|er AVX512FP16 
-       VDIVPH           xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-       VDIVPH           ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-       VDIVPH           zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-       VDIVSH           xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-       VFCMADDCPH       xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512FP16/VL 
-       VFCMADDCPH       ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512FP16/VL 
-       VFCMADDCPH       zmmreg|mask|z,zmmreg*,zmmrm512|b32|er AVX512FP16/VL 
-       VFMADDCPH        xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512FP16/VL 
-       VFMADDCPH        ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512FP16/VL 
-       VFMADDCPH        zmmreg|mask|z,zmmreg*,zmmrm512|b32|er AVX512FP16/VL 
-       VFCMADDCSH       xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512FP16 
-       VFMADDCSH        xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512FP16 
-       VFCMULCPCH       xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512FP16/VL 
-       VFCMULCPCH       ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512FP16/VL 
-       VFCMULCPCH       zmmreg|mask|z,zmmreg*,zmmrm512|b32|er AVX512FP16/VL 
-       VFMULCPCH        xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512FP16/VL 
-       VFMULCPCH        ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512FP16/VL 
-       VFMULCPCH        zmmreg|mask|z,zmmreg*,zmmrm512|b32|er AVX512FP16/VL 
-       VFCMULCSH        xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512FP16 
-       VFMULCSH         xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512FP16 
-       VFMADDSUB132PH   xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-       VFMADDSUB132PH   ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-       VFMADDSUB132PH   zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-       VFMADDSUB213PH   xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-       VFMADDSUB213PH   ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-       VFMADDSUB213PH   zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-       VFMADDSUB231PH   xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-       VFMADDSUB231PH   ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-       VFMADDSUB231PH   zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-       VFMSUBADD132PH   xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-       VFMSUBADD132PH   ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-       VFMSUBADD132PH   zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-       VFMSUBADD213PH   xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-       VFMSUBADD213PH   ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-       VFMSUBADD213PH   zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-       VFMSUBADD231PH   xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-       VFMSUBADD231PH   ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-       VFMSUBADD231PH   zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-       VPMADD132PH      xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-       VPMADD132PH      ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-       VPMADD132PH      zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-       VPMADD213PH      xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-       VPMADD213PH      ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-       VPMADD213PH      zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-       VPMADD231PH      xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-       VPMADD231PH      ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-       VPMADD231PH      zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-       VFMADD132PH      xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-       VFMADD132PH      ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-       VFMADD132PH      zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-       VFMADD213PH      xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-       VFMADD213PH      ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-       VFMADD213PH      zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-       VFMADD231PH      xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-       VFMADD231PH      ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-       VFMADD231PH      zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-       VPMADD132SH      xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-       VPMADD213SH      xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-       VPMADD231SH      xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-       VPNMADD132SH     xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-       VPNMADD213SH     xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-       VPNMADD231SH     xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-       VPMSUB132PH      xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-       VPMSUB132PH      ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-       VPMSUB132PH      zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-       VPMSUB213PH      xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-       VPMSUB213PH      ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-       VPMSUB213PH      zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-       VPMSUB231PH      xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-       VPMSUB231PH      ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-       VPMSUB231PH      zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-       VFMSUB132PH      xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-       VFMSUB132PH      ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-       VFMSUB132PH      zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-       VFMSUB213PH      xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-       VFMSUB213PH      ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-       VFMSUB213PH      zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-       VFMSUB231PH      xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-       VFMSUB231PH      ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-       VFMSUB231PH      zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-       VPMSUB132SH      xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-       VPMSUB213SH      xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-       VPMSUB231SH      xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-       VPNMSUB132SH     xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-       VPNMSUB213SH     xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-       VPNMSUB231SH     xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-       VFPCLASSPH       kreg|mask,xmmrm128|b16,imm8 AVX512FP16/VL 
-       VFPCLASSPH       kreg|mask,ymmrm256|b16,imm8 AVX512FP16/VL 
-       VFPCLASSPH       kreg|mask,zmmrm512|b16,imm8 AVX512FP16 
-       VFPCLASSSH       kreg|mask,xmmrm16,imm8   AVX512FP16 
-       VGETEXPPH        xmmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-       VGETEXPPH        ymmreg|mask|z,ymmrm256|b16 AVX512FP16/VL 
-       VGETEXPPH        zmmreg|mask|z,zmmrm512|b16|sae AVX512FP16 
-       VGETEXPSH        xmmreg|mask|z,xmmrm16|sae AVX512FP16 
-       VGETMANTPH       xmmreg|mask|z,xmmrm128|b16,imm8 AVX512FP16/VL 
-       VGETMANTPH       ymmreg|mask|z,ymmrm256|b16,imm8 AVX512FP16/VL 
-       VGETMANTPH       zmmreg|mask|z,zmmrm512|b16|sae,imm8 AVX512FP16 
-       VGETMANTSH       xmmreg|mask|z,xmmrm16|sae,imm8 AVX512FP16 
-       VGETMAXPH        xmmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-       VGETMAXPH        ymmreg|mask|z,ymmrm256|b16 AVX512FP16/VL 
-       VGETMAXPH        zmmreg|mask|z,zmmrm512|b16|sae AVX512FP16 
-       VGETMAXSH        xmmreg|mask|z,xmmrm16|sae AVX512FP16 
-       VGETMINPH        xmmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-       VGETMINPH        ymmreg|mask|z,xmmrm256|b16 AVX512FP16/VL 
-       VGETMINPH        zmmreg|mask|z,zmmrm512|b16|sae AVX512FP16 
-       VGETMINSH        xmmreg|mask|z,xmmrm16|sae AVX512FP16 
-       VMOVSH           xmmreg|mask|z,mem16      AVX512FP16 
-       VMOVSH           mem16|mask,xmmreg        AVX512FP16 
-       VMOVSH           xmmreg|mask|z,xmmreg*,xmmreg AVX512FP16 
-       VMOVSH           xmmreg|mask|z,xmmreg*,xmmreg AVX512FP16 
-       VMOVW            xmmreg|mask|z,rm16       AVX512FP16 
-       VMOVW            rm16,xmmreg              AVX512FP16 
-       VMULPH           xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-       VMULPH           ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-       VMULPH           zmmreg|mask|z,zmmreg*,zmmrm512|b16 AVX512FP16 
-       VMULSH           xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-       VRCPPH           xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-       VRCPPH           ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-       VRCPPH           zmmreg|mask|z,zmmreg*,zmmrm512|b16 AVX512FP16 
-       VRCPSH           xmmreg|mask|z,xmmreg*,xmmrm16|sae AVX512FP16 
-       VREDUCEPH        xmmreg|mask|z,xmmrm128|b16,imm8 AVX512FP16/VL 
-       VREDUCEPH        ymmreg|mask|z,ymmrm256|b16,imm8 AVX512FP16/VL 
-       VREDUCEPH        zmmreg|mask|z,zmmrm512|b16|sae,imm8 AVX512FP16 
-       VREDUCESH        xmmreg|mask|z,xmmreg*,xmmrm16|sae,imm8 AVX512FP16 
-       VENDSCALEPH      xmmreg|mask|z,xmmrm128|b16,imm8 AVX512FP16/VL 
-       VENDSCALEPH      ymmreg|mask|z,ymmrm256|b16,imm8 AVX512FP16/VL 
-       VENDSCALEPH      zmmreg|mask|z,zmmrm512|b16|sae,imm8 AVX512FP16 
-       VENDSCALESH      xmmreg|mask|z,xmmreg*,xmmrm16|sae,imm8 AVX512FP16 
-       VRSQRTPH         xmmreg|mask|z,xmmrm128|b16,imm8 AVX512FP16/VL 
-       VRSQRTPH         ymmreg|mask|z,ymmrm256|b16,imm8 AVX512FP16/VL 
-       VRSQRTPH         zmmreg|mask|z,zmmrm512|b16|sae,imm8 AVX512FP16 
-       VRSQRTSH         xmmreg|mask|z,xmmreg*,xmmrm16|sae,imm8 AVX512FP16 
-       VSCALEFPH        xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-       VSCALEFPH        ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-       VSCALEFPH        zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-       VSCALEFSH        xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-       VSQRTPH          xmmreg|mask|z,xmmrm128|b16 AVX512FP16/VL 
-       VSQRTPH          ymmreg|mask|z,ymmrm256|b16 AVX512FP16/VL 
-       VSQRTPH          zmmreg|mask|z,zmmrm512|b16|er AVX512FP16 
-       VSQRTSH          xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-       VSUBPH           xmmreg|mask|z,xmmreg*,xmmrm128|b16 AVX512FP16/VL 
-       VSUBPH           ymmreg|mask|z,ymmreg*,ymmrm256|b16 AVX512FP16/VL 
-       VSUBPH           zmmreg|mask|z,zmmreg*,zmmrm512|b16|er AVX512FP16 
-       VSUBSH           xmmreg|mask|z,xmmreg*,xmmrm16|er AVX512FP16 
-       VUCOMISH         xmmreg,xmmrm16|sae       AVX512FP16
-
-F.1.65 RAO-INT weakly ordered atomic operations
-
-       AADD             mem32,reg32              RAOINT,SD 
-       AADD             mem64,reg64              RAOINT,LONG 
-       AAND             mem32,reg32              RAOINT,SD 
-       AAND             mem64,reg64              RAOINT,LONG 
-       AXOR             mem32,reg32              RAOINT,SD 
-       AXOR             mem64,reg64              RAOINT,LONG
-
-F.1.66 User interrupts
-
-       CLUI                                      UINTR,LONG 
-       SENDUIPI         reg64                    UINTR,LONG 
-       STUI                                      UINTR,LONG 
-       TESTUI                                    UINTR,LONG 
-       UIRET                                     UINTR,LONG
-
-F.1.67 Compare, exchange and add conditional
-
-       CMPccXADD        mem32,reg32,reg32        CMPCCXADD,LONG,SD 
-       CMPccXADD        mem64,reg64,reg64        CMPCCXADD,LONG
-
-F.1.68 WRMSRNS and MSRLIST instructions
-
-       WRMSRNS                                   WRMSRNS,PRIV,LONG 
-       RDMSRLIST                                 MSRLIST,PRIV,LONG 
-       WRMSRLIST                                 MSRLIST,PRIV,LONG
-
-F.1.69 History reset
-
-       HRESET           imm,reg_eax              HRESET,PRIV 
-       HRESET           imm                      HRESET,PRIV,ND
-
-F.1.70 Systematic names for the hinting nop instructions
-
-       HINT_NOP0        rm16                     P6,UNDOC 
-       HINT_NOP0        rm32                     P6,UNDOC 
-       HINT_NOP0        rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP1        rm16                     P6,UNDOC 
-       HINT_NOP1        rm32                     P6,UNDOC 
-       HINT_NOP1        rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP2        rm16                     P6,UNDOC 
-       HINT_NOP2        rm32                     P6,UNDOC 
-       HINT_NOP2        rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP3        rm16                     P6,UNDOC 
-       HINT_NOP3        rm32                     P6,UNDOC 
-       HINT_NOP3        rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP4        rm16                     P6,UNDOC 
-       HINT_NOP4        rm32                     P6,UNDOC 
-       HINT_NOP4        rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP5        rm16                     P6,UNDOC 
-       HINT_NOP5        rm32                     P6,UNDOC 
-       HINT_NOP5        rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP6        rm16                     P6,UNDOC 
-       HINT_NOP6        rm32                     P6,UNDOC 
-       HINT_NOP6        rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP7        rm16                     P6,UNDOC 
-       HINT_NOP7        rm32                     P6,UNDOC 
-       HINT_NOP7        rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP8        rm16                     P6,UNDOC 
-       HINT_NOP8        rm32                     P6,UNDOC 
-       HINT_NOP8        rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP9        rm16                     P6,UNDOC 
-       HINT_NOP9        rm32                     P6,UNDOC 
-       HINT_NOP9        rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP10       rm16                     P6,UNDOC 
-       HINT_NOP10       rm32                     P6,UNDOC 
-       HINT_NOP10       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP11       rm16                     P6,UNDOC 
-       HINT_NOP11       rm32                     P6,UNDOC 
-       HINT_NOP11       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP12       rm16                     P6,UNDOC 
-       HINT_NOP12       rm32                     P6,UNDOC 
-       HINT_NOP12       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP13       rm16                     P6,UNDOC 
-       HINT_NOP13       rm32                     P6,UNDOC 
-       HINT_NOP13       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP14       rm16                     P6,UNDOC 
-       HINT_NOP14       rm32                     P6,UNDOC 
-       HINT_NOP14       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP15       rm16                     P6,UNDOC 
-       HINT_NOP15       rm32                     P6,UNDOC 
-       HINT_NOP15       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP16       rm16                     P6,UNDOC 
-       HINT_NOP16       rm32                     P6,UNDOC 
-       HINT_NOP16       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP17       rm16                     P6,UNDOC 
-       HINT_NOP17       rm32                     P6,UNDOC 
-       HINT_NOP17       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP18       rm16                     P6,UNDOC 
-       HINT_NOP18       rm32                     P6,UNDOC 
-       HINT_NOP18       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP19       rm16                     P6,UNDOC 
-       HINT_NOP19       rm32                     P6,UNDOC 
-       HINT_NOP19       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP20       rm16                     P6,UNDOC 
-       HINT_NOP20       rm32                     P6,UNDOC 
-       HINT_NOP20       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP21       rm16                     P6,UNDOC 
-       HINT_NOP21       rm32                     P6,UNDOC 
-       HINT_NOP21       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP22       rm16                     P6,UNDOC 
-       HINT_NOP22       rm32                     P6,UNDOC 
-       HINT_NOP22       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP23       rm16                     P6,UNDOC 
-       HINT_NOP23       rm32                     P6,UNDOC 
-       HINT_NOP23       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP24       rm16                     P6,UNDOC 
-       HINT_NOP24       rm32                     P6,UNDOC 
-       HINT_NOP24       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP25       rm16                     P6,UNDOC 
-       HINT_NOP25       rm32                     P6,UNDOC 
-       HINT_NOP25       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP26       rm16                     P6,UNDOC 
-       HINT_NOP26       rm32                     P6,UNDOC 
-       HINT_NOP26       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP27       rm16                     P6,UNDOC 
-       HINT_NOP27       rm32                     P6,UNDOC 
-       HINT_NOP27       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP28       rm16                     P6,UNDOC 
-       HINT_NOP28       rm32                     P6,UNDOC 
-       HINT_NOP28       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP29       rm16                     P6,UNDOC 
-       HINT_NOP29       rm32                     P6,UNDOC 
-       HINT_NOP29       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP30       rm16                     P6,UNDOC 
-       HINT_NOP30       rm32                     P6,UNDOC 
-       HINT_NOP30       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP31       rm16                     P6,UNDOC 
-       HINT_NOP31       rm32                     P6,UNDOC 
-       HINT_NOP31       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP32       rm16                     P6,UNDOC 
-       HINT_NOP32       rm32                     P6,UNDOC 
-       HINT_NOP32       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP33       rm16                     P6,UNDOC 
-       HINT_NOP33       rm32                     P6,UNDOC 
-       HINT_NOP33       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP34       rm16                     P6,UNDOC 
-       HINT_NOP34       rm32                     P6,UNDOC 
-       HINT_NOP34       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP35       rm16                     P6,UNDOC 
-       HINT_NOP35       rm32                     P6,UNDOC 
-       HINT_NOP35       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP36       rm16                     P6,UNDOC 
-       HINT_NOP36       rm32                     P6,UNDOC 
-       HINT_NOP36       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP37       rm16                     P6,UNDOC 
-       HINT_NOP37       rm32                     P6,UNDOC 
-       HINT_NOP37       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP38       rm16                     P6,UNDOC 
-       HINT_NOP38       rm32                     P6,UNDOC 
-       HINT_NOP38       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP39       rm16                     P6,UNDOC 
-       HINT_NOP39       rm32                     P6,UNDOC 
-       HINT_NOP39       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP40       rm16                     P6,UNDOC 
-       HINT_NOP40       rm32                     P6,UNDOC 
-       HINT_NOP40       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP41       rm16                     P6,UNDOC 
-       HINT_NOP41       rm32                     P6,UNDOC 
-       HINT_NOP41       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP42       rm16                     P6,UNDOC 
-       HINT_NOP42       rm32                     P6,UNDOC 
-       HINT_NOP42       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP43       rm16                     P6,UNDOC 
-       HINT_NOP43       rm32                     P6,UNDOC 
-       HINT_NOP43       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP44       rm16                     P6,UNDOC 
-       HINT_NOP44       rm32                     P6,UNDOC 
-       HINT_NOP44       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP45       rm16                     P6,UNDOC 
-       HINT_NOP45       rm32                     P6,UNDOC 
-       HINT_NOP45       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP46       rm16                     P6,UNDOC 
-       HINT_NOP46       rm32                     P6,UNDOC 
-       HINT_NOP46       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP47       rm16                     P6,UNDOC 
-       HINT_NOP47       rm32                     P6,UNDOC 
-       HINT_NOP47       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP48       rm16                     P6,UNDOC 
-       HINT_NOP48       rm32                     P6,UNDOC 
-       HINT_NOP48       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP49       rm16                     P6,UNDOC 
-       HINT_NOP49       rm32                     P6,UNDOC 
-       HINT_NOP49       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP50       rm16                     P6,UNDOC 
-       HINT_NOP50       rm32                     P6,UNDOC 
-       HINT_NOP50       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP51       rm16                     P6,UNDOC 
-       HINT_NOP51       rm32                     P6,UNDOC 
-       HINT_NOP51       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP52       rm16                     P6,UNDOC 
-       HINT_NOP52       rm32                     P6,UNDOC 
-       HINT_NOP52       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP53       rm16                     P6,UNDOC 
-       HINT_NOP53       rm32                     P6,UNDOC 
-       HINT_NOP53       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP54       rm16                     P6,UNDOC 
-       HINT_NOP54       rm32                     P6,UNDOC 
-       HINT_NOP54       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP55       rm16                     P6,UNDOC 
-       HINT_NOP55       rm32                     P6,UNDOC 
-       HINT_NOP55       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP56       rm16                     P6,UNDOC 
-       HINT_NOP56       rm32                     P6,UNDOC 
-       HINT_NOP56       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP57       rm16                     P6,UNDOC 
-       HINT_NOP57       rm32                     P6,UNDOC 
-       HINT_NOP57       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP58       rm16                     P6,UNDOC 
-       HINT_NOP58       rm32                     P6,UNDOC 
-       HINT_NOP58       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP59       rm16                     P6,UNDOC 
-       HINT_NOP59       rm32                     P6,UNDOC 
-       HINT_NOP59       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP60       rm16                     P6,UNDOC 
-       HINT_NOP60       rm32                     P6,UNDOC 
-       HINT_NOP60       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP61       rm16                     P6,UNDOC 
-       HINT_NOP61       rm32                     P6,UNDOC 
-       HINT_NOP61       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP62       rm16                     P6,UNDOC 
-       HINT_NOP62       rm32                     P6,UNDOC 
-       HINT_NOP62       rm64                     X86_64,LONG,UNDOC 
-       HINT_NOP63       rm16                     P6,UNDOC 
-       HINT_NOP63       rm32                     P6,UNDOC 
-       HINT_NOP63       rm64                     X86_64,LONG,UNDOC

_service:tar_scm:nasm-2.16.01.tar.xz Deleted

_service:tar_scm:nasm-2.16.03-xdoc.tar.xz Added

_service:tar_scm:nasm-2.16.03.tar.xz/. Added

_service:tar_scm:nasm-2.16.03.tar.xz/.gitattributes Added

_service:tar_scm:nasm-2.16.03.tar.xz/.travis.yml Added

_service:tar_scm:nasm-2.16.03.tar.xz/AUTHORS Added

@@ -0,0 +1,137 @@
+This is the AUTHORS file for the NASM project located at:
+http://nasm.sourceforge.net/
+
+Names should be inserted as follows:
+
+N: Name Here
+E: Email Here
+D: Description Here
+D: Additional Description Here.... and so on
+C: Copyright information
+
+Such is life.
+-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
+
+N: Julian Hall
+E: Jules@acris.co.uk
+D: Original author and co-conspirator
+
+N: Simon Tatham
+E: anakin@pobox.com
+D: Original author and co-conspirator
+
+N: Nelson Rush
+E: palisade@users.sourceforge.net
+D: Some guy.
+
+N: Frank Kotler
+E: fbkotler@users.sf.net
+D: Bug smashing.
+D: Documentation - "KATMAI" and "3DNow!" instructions supported by 0.98
+D: General coordination and moral support.
+
+N: Stephen Silver
+E: nasm@argentum.freeserve.co.uk
+D: Documentation - "3dNow!" instructions and misc.
+D: insns.dat fixes and new instructions.
+
+N: AMD Inc. (names of developers here?)
+E:
+D: 3DNow instructions
+D: New Athlon instructions
+D: Makefile.vc fix
+
+N: John Coffman
+E: johninsd@users.sourceforge.net
+D: added Jcc optimizations; CPU level checks
+D: bug fixes, compilation fixes
+
+N: Yuri Zaporozhets
+E: r_tty@yahoo.co.uk
+D: RDOFF support
+
+N: H. Peter Anvin
+E: hpa@zytor.com
+D: Primary maintainer for the 0.98, late 0.98.x and 2.x releases.
+C: Contributions since 2008-12-15 are Copyright Intel Corporation.
+
+N: John Fine
+E: johnfine@earthlink.net
+D: Preprocessor and OBJ (OMF) output format driver
+D: Organized DOS versions of 0.98 release
+
+N: Kendall Bennet
+E: KendallB@scitechsoft.com
+D: NASM enhancements
+D: macros
+D: Syntax modifications
+
+N: Gary Clark
+E:
+D: AMD 3DNow! instructions
+
+N: Andrew Crabtree
+E:
+D: Debugging support
+
+N: Rafael R. Sevilla
+E: dido@pacific.net.ph
+D: RDF2HEX utility
+
+N: Jaime Tejedor Gómez, aka Metalbrain
+E: metalbrain_coder@gmx.net
+D: jecxz bug fix
+
+N: James Seter
+E: pharos@zsnes.com
+D: --POSTFIX, --PREFIX switches
+D: ?
+
+N: Edward J. Beroset
+E: beroset@mindspring.com
+D: added %substr and %strlen
+
+N: Stanislav Karchebny, aka berkus, madfire, daemonhunter
+E: madfire@users.sourceforge.net
+D: multiple sections support for -fbin format
+D: cvs maintenance
+D: webpage at http://nasm.2y.net maintenance
+
+N: Debbie Wiles, aka debs
+E: debs@dwiles.demon.co.uk
+D: Work on docs, added undocumented instructions (esp SSE2 and 3D-Now!)
+D: Added other documentation and tidied up docs
+D: Added a few instructions to insns.dat and tidied it up.
+
+N: Trevor Woerner
+E: FIXME
+D: Quiet compiler warnings
+
+N: Michael K. Ter Louw
+E: mterlo1 "at" uic "dot" edu
+D: Multisection support for "-f bin"
+
+N: Martin Wawro
+E: FIXME
+D: stabs debug support for "-f elf"
+
+N: Alexei Frounze
+E: alexfru@users.sourceforge.net
+D: "-I" paths searched for "incbined" files
+D: bugswatting
+
+N: Keith Kanios, aka SpooK
+E: keith@kanios.net
+D: c99 Compliance
+D: General x64 Support
+D: win64 (x86-64 COFF) output format
+D: __BITS__ Standard Macro
+D: Website Maintenance @ http://nasm.sourceforge.net/
+
+N: Chuck Crayne
+E: ccrayne@users.sourceforge.net
+D: elf64 (x86_64) output format
+
+N: Cyrill Gorcunov
+E: gorcunov@gmail.com
+D: AMD XOP/FMA4/CVT16 instructions

_service:tar_scm:nasm-2.16.03.tar.xz/CHANGES Added

_service:tar_scm:nasm-2.16.03.tar.xz/ChangeLog Added

@@ -0,0 +1,2905 @@
+Sat Nov 24 16:31:48 2007 -0800 H. Peter Anvin 
+  * Typo fixes in documentation
+Tue Nov 20 23:37:46 2007 -0800 H. Peter Anvin 
+  * NASM 2.00rc3
+Tue Nov 20 21:45:16 2007 -0800 H. Peter Anvin 
+  * Unbreak CMPSW/CMPSD/CMPSQ
+Tue Nov 20 13:23:34 2007 -0800 H. Peter Anvin 
+  * Merge branch 'master' of git+ssh://repo.or.cz/srv/git/nasm
+Tue Nov 20 13:22:58 2007 -0800 H. Peter Anvin 
+  * ndisasm: handle the case of "no more sync points"
+Mon Nov 19 23:09:31 2007 -0800 H. Peter Anvin 
+  * NASM 2.00rc2
+Mon Nov 19 23:09:24 2007 -0800 H. Peter Anvin 
+  * tag-release: a simple script to tag the repository for release
+Mon Nov 19 13:14:59 2007 -0800 H. Peter Anvin 
+  * Slightly faster implementation of the deadman counter
+Mon Nov 19 12:26:50 2007 -0800 H. Peter Anvin 
+  * BR 812417: Deadman counter for macro expansion
+Mon Nov 19 12:02:38 2007 -0800 H. Peter Anvin 
+  * BR 877583: Fix RAA memory leak
+Mon Nov 19 11:53:18 2007 -0800 H. Peter Anvin 
+  * BR 863173: Fix offsets of TIMES/INCBIN in list file
+Mon Nov 19 11:45:40 2007 -0800 H. Peter Anvin 
+  * BR 1834731: Remove redundant error messages for no input file
+Mon Nov 19 11:44:05 2007 -0800 H. Peter Anvin 
+  * insns.pl: remove debugging output
+Sun Nov 18 22:18:09 2007 -0800 H. Peter Anvin 
+  * Clean up remaining build warnings
+Sun Nov 18 21:55:26 2007 -0800 H. Peter Anvin 
+  * BR 1834292: Fix multiple disassembler bugs
+Sun Nov 18 12:01:05 2007 -0800 H. Peter Anvin 
+  * BR 1834056: Remove warnings in rdoff/rdoff.c
+Sun Nov 18 11:55:10 2007 -0800 H. Peter Anvin 
+  * BR 1091926: Bounds checking for command line parsing
+Sat Nov 17 21:21:18 2007 -0800 H. Peter Anvin 
+  * Remove FIXME from documentation
+Sat Nov 17 21:08:33 2007 -0800 Charles Crayne 
+  * Check in Keith's Fixes
+Sat Nov 17 14:35:19 2007 -0800 H. Peter Anvin 
+  * Make the definition for float_const() match the prototype
+Fri Nov 16 00:03:02 2007 -0800 H. Peter Anvin 
+  * NASM 2.00rc1
+Thu Nov 15 17:12:29 2007 -0800 H. Peter Anvin 
+  * Clean up the command-line parsing; make -w/-W match others
+Thu Nov 15 14:38:19 2007 -0800 H. Peter Anvin 
+  * BR 993895: Support zero-operand floating-point insn
+Thu Nov 15 10:25:52 2007 -0800 H. Peter Anvin 
+  * Remove some vestiges of "native" RESW/RESD support
+Thu Nov 15 10:24:55 2007 -0800 H. Peter Anvin 
+  * outbin.c: fix one missed change from type -> size
+Tue Nov 13 19:52:54 2007 -0800 root 
+  * Support setting OSABI value in ELF header.
+Tue Nov 13 11:34:34 2007 -0800 H. Peter Anvin 
+  * Enable a few warnings by default; clean up warning descriptions
+Tue Nov 13 11:31:15 2007 -0800 H. Peter Anvin 
+  * Add gcc-style -W/-Wno- warning selections; -Wall; -Werror
+Tue Nov 13 10:37:23 2007 -0800 H. Peter Anvin 
+  * Clean up the fwrite*() function definitions somewhat
+Tue Nov 13 09:49:51 2007 -0800 H. Peter Anvin 
+  * Cast 64-bit switch expressions to (int) to keep OpenWatcom happy
+Tue Nov 13 09:46:38 2007 -0800 H. Peter Anvin 
+  * x86-host-specific performance improvement
+Tue Nov 13 09:37:59 2007 -0800 H. Peter Anvin 
+  * Address data is int64_t; simplify writing an address object
+Mon Nov 12 23:00:31 2007 -0800 H. Peter Anvin 
+  * ndisasm: factor out the common operand-extraction code
+Mon Nov 12 22:56:07 2007 -0800 H. Peter Anvin 
+  * Un-special-case "xchg rax,rax"; disassemble o64
+Mon Nov 12 22:11:46 2007 -0800 H. Peter Anvin 
+  * BR 1709392: Fix alignment handling in Mach-O format
+Mon Nov 12 22:05:31 2007 -0800 H. Peter Anvin 
+  * BR 1828866: fix handling of LAR/LSL
+Mon Nov 12 21:57:00 2007 -0800 H. Peter Anvin 
+  * Better (but not *good!*) handling of 64-bit addressing in ndisasm
+Mon Nov 12 21:02:33 2007 -0800 H. Peter Anvin 
+  * Fix disassembly of XCHG
+Mon Nov 12 20:18:33 2007 -0800 H. Peter Anvin 
+  * Test of XCHG
+Mon Nov 12 20:18:05 2007 -0800 H. Peter Anvin 
+  * Fix handling of XCHG in 64-bit mode
+Mon Nov 12 19:36:13 2007 -0800 H. Peter Anvin 
+  * More \321 -> \324 bug fixes
+Mon Nov 12 18:26:31 2007 -0800 H. Peter Anvin 
+  * float.c: all warnings and errors are pass 1 only
+Sat Nov 10 21:55:19 2007 -0800 Charles Crayne 
+  * Update documentation for stack relative directives.
+Sat Nov 10 17:52:23 2007 -0800 Charles Crayne 
+  * Clean up a few more 32-bit bottlenecks
+Fri Nov 9 16:37:41 2007 -0800 Charles Crayne 
+  * Update documentation for stack relative directives
+Fri Nov 9 16:33:54 2007 -0800 Charles Crayne 
+  * Merge branch 'master' of /home/chuck/development/gitnasm/
+Fri Nov 9 16:25:43 2007 -0800 Charles Crayne 
+  * Update documentation for stack relative directives
+Fri Nov 9 14:44:02 2007 -0800 H. Peter Anvin 
+  * Don't combine type and size into a single argument
+Thu Nov 8 22:11:14 2007 -0800 Charles Crayne 
+  * Add flat64 to %stacksize choices
+Thu Nov 8 20:43:22 2007 -0800 H. Peter Anvin 
+  * Fix building under OpenWatcom
+Thu Nov 8 20:29:37 2007 -0800 H. Peter Anvin 
+  * ps2pdf: remove -dOptimize=true
+Thu Nov 8 20:21:41 2007 -0800 H. Peter Anvin 
+  * No binary files left in the source distro; unbreak release script
+Thu Nov 8 20:01:11 2007 -0800 H. Peter Anvin 
+  * BR 1828103: Fix %arg and %local
+Thu Nov 8 19:34:01 2007 -0800 H. Peter Anvin 
+  * nasmlib.c: prefix_name(): use the elements() macro
+Thu Nov 8 19:30:22 2007 -0800 H. Peter Anvin 
+  * Move elements() to nasmlib.h
+Thu Nov 8 19:15:33 2007 -0800 H. Peter Anvin 
+  * constipate the "str" argument to bsi() and bsii()
+Wed Nov 7 19:03:46 2007 -0800 Charles Crayne 
+  * Upgrade RAA functions to hold 64-bit data.
+Tue Nov 6 21:48:12 2007 -0800 Charles Crayne 
+  * Pass 64-bit instruction lengths to back-ends.
+Tue Nov 6 18:27:23 2007 -0800 Charles Crayne 
+  * Prepare for 64-bit instruction lengths
+Mon Nov 5 21:49:49 2007 -0800 Charles Crayne 
+  * Disambiguate error messages
+Mon Nov 5 17:19:32 2007 -0800 Charles Crayne 
+  * Upgrade label functions to 64-bit
+Sun Nov 4 21:10:42 2007 -0800 H. Peter Anvin 
+  * Permit opcode names as labels as long as they are followed by a colon
+Sun Nov 4 15:28:30 2007 -0800 Charles Crayne 
+  * Make warning limit valid for both i386 and x86_64
+Sat Nov 3 22:06:13 2007 -0700 Charles Crayne 
+  * Warn on out of bounds EA displacements
+Thu Nov 1 15:08:27 2007 -0700 H. Peter Anvin 
+  * Treat info files as binary when creating xdoc distro file
+Thu Nov 1 15:07:42 2007 -0700 H. Peter Anvin 
+  * Remove obsolete binary files from the distribution
+Thu Nov 1 14:53:32 2007 -0700 H. Peter Anvin 
+  * Move declarations before statements
+Wed Oct 31 23:37:35 2007 -0700 H. Peter Anvin 
+  * NASM 0.99.06
+Wed Oct 31 23:37:19 2007 -0700 H. Peter Anvin 
+  * Script to tag the tree for release
+Wed Oct 31 10:59:26 2007 -0700 H. Peter Anvin 
+  * Even more "riprel" tests
+Tue Oct 30 01:17:57 2007 -0700 H. Peter Anvin 
+  * floatx.asm: add tests for "rounds up to smallest denorm"
+Tue Oct 30 01:13:27 2007 -0700 H. Peter Anvin 
+  * Run "make alldeps"
+Tue Oct 30 01:13:09 2007 -0700 H. Peter Anvin 
+  * float.c: handle round-up-to-denorm correctly.
+Tue Oct 30 00:59:27 2007 -0700 H. Peter Anvin 
+  * Exhaustive test for 8-bit floating point values
+Mon Oct 29 23:12:47 2007 -0700 H. Peter Anvin 
+  * Clean up the handing of operands in assemble.c
+Mon Oct 29 22:56:08 2007 -0700 H. Peter Anvin 
+  * Don't warn for segmented references
+Mon Oct 29 20:20:12 2007 -0700 H. Peter Anvin 
+  * Use a 32-bit floating-point limb size; support 8-bit float
+Mon Oct 29 18:24:59 2007 -0700 Charles Crayne 
+  * Reduce severity of redundant prefixes from error to warning.
+Sun Oct 28 23:23:24 2007 -0700 H. Peter Anvin 
+  * Test of some addressing modes in 64-bit mode.
+Sun Oct 28 23:21:46 2007 -0700 H. Peter Anvin 
+  * Fix bogus flagging of effective addresses as invalid
+Sun Oct 28 23:10:34 2007 -0700 H. Peter Anvin 
+  * Actually shut up the warning in rdfload.c
+Sun Oct 28 22:04:42 2007 -0700 H. Peter Anvin 
+  * Clean up stealth whitespace
+Sun Oct 28 22:04:00 2007 -0700 H. Peter Anvin 
+  * Fix warning about cast to pointer in rdfload.c
+Sun Oct 28 22:04:00 2007 -0700 H. Peter Anvin 
+  * 64-bit addressing and prefix handling changes
+Sun Oct 28 15:29:54 2007 -0700 Charles Crayne 
+  * Adjust stabs symbol index to match symbol table.
+Fri Oct 26 21:38:02 2007 -0700 H. Peter Anvin 
+  * readnum(): handle prefix-suffix collision like "0h"
+Fri Oct 26 18:49:29 2007 -0700 H. Peter Anvin 
+  * Better handling of platforms which hide "extended" functionality
+Wed Oct 24 15:51:40 2007 -0700 Charles Crayne 
+  * Merge branch 'master' of /home/chuck/development/gitnasm/
+Wed Oct 24 15:30:17 2007 -0700 Charles Crayne 
+  * Update sections about debug info formats
+Wed Oct 24 15:29:51 2007 -0700 H. Peter Anvin 
+  * Fix the handling of floating-point tokens in the preprocessor
+Tue Oct 23 19:28:39 2007 -0700 Charles Crayne 
+  * Fix bugs item #1817677
+Tue Oct 23 00:08:58 2007 -0700 H. Peter Anvin 
+  * Slightly simplify the radix-detection code
+Mon Oct 22 19:48:06 2007 -0700 H. Peter Anvin 
+  * Unbreak particularly tricky hex constants
+Mon Oct 22 19:37:36 2007 -0700 H. Peter Anvin 
+  * Decimal floating point can also start with 0. 0e 0E
+Mon Oct 22 17:34:10 2007 -0700 H. Peter Anvin 
+  * Support binary and octal floating-point
+Mon Oct 22 16:53:48 2007 -0700 H. Peter Anvin 
+  * More consistent handling of radix letters
+Sun Oct 21 15:33:01 2007 -0700 H. Peter Anvin 
+  * float.c: correct exponent capping
+Sun Oct 21 14:21:43 2007 -0700 Charles Crayne 
+  * Clean up elf symbol table section
+Fri Oct 19 18:33:57 2007 -0700 H. Peter Anvin 
+  * Allow $-prefixed hexadecimal FP as an alternative to 0x
+Fri Oct 19 14:43:22 2007 -0700 H. Peter Anvin 
+  * Scripts to remove stealth whitespace
+Fri Oct 19 14:42:29 2007 -0700 H. Peter Anvin 
+  * Formatting: kill off "stealth whitespace"
+Fri Oct 19 14:26:52 2007 -0700 H. Peter Anvin 
+  * test/floatx.asm: fix test case
+Fri Oct 19 14:19:52 2007 -0700 H. Peter Anvin 
+  * uscore.asm: Fix test case
+Fri Oct 19 14:17:51 2007 -0700 H. Peter Anvin 
+  * float.c: mark read_exponent() static
+Fri Oct 19 14:10:35 2007 -0700 H. Peter Anvin 
+  * Don't confuse suffixed hexadecimal with floating-point
+Fri Oct 19 13:17:24 2007 -0700 H. Peter Anvin 
+  * Anchor filename locations in .gitignore
+Fri Oct 19 13:16:51 2007 -0700 H. Peter Anvin 
+  * test/Makefile: Use -Ox instead of -O999
+Fri Oct 19 13:14:06 2007 -0700 H. Peter Anvin 
+  * Test of underscored constants
+Fri Oct 19 13:10:46 2007 -0700 H. Peter Anvin 
+  * Allow underscores in numbers; better detection of FP
+Fri Oct 19 10:52:31 2007 -0700 H. Peter Anvin 
+  * Modernize nasm.spec.in and make it closer to the Fedora version
+Thu Oct 18 23:33:06 2007 -0700 Charles Crayne 
+  * Suppress datarootdir warnings from configure
+Thu Oct 18 21:17:20 2007 -0700 Charles Crayne 
+  * Suppress signedness warnings in disassembler
+Thu Oct 18 19:14:08 2007 -0700 H. Peter Anvin 
+  * Cleaner solution for MinGW handling of __STRICT_ANSI__
+Thu Oct 18 19:14:08 2007 -0700 H. Peter Anvin 
+  * configure: Undefine __STRICT_ANSI__ for mingw's benefit
+Thu Oct 18 19:14:07 2007 -0700 H. Peter Anvin 
+  * Fix invocation of readnum()
+Thu Oct 18 19:02:42 2007 -0700 Charles Crayne 
+  * Suppress a few signedness warnings
+Thu Oct 18 17:04:10 2007 -0700 root 
+  * Avoid unnecessary warning on redefinition of section (bug 801180)
+Wed Oct 17 17:55:45 2007 -0700 Charles Crayne 
+  * Generate stabs entries for any executable section
+Tue Oct 16 22:59:09 2007 -0700 H. Peter Anvin 
+  * NASM 0.99.05
+Tue Oct 16 15:46:04 2007 -0700 H. Peter Anvin 
+  * Tests of obscenely large exponents
+Tue Oct 16 14:42:32 2007 -0700 H. Peter Anvin 
+  * Comma-separate contents of __FLOAT__
+Tue Oct 16 14:40:27 2007 -0700 H. Peter Anvin 
+  * Implement floating-point option control directive
+Tue Oct 16 11:48:07 2007 -0700 H. Peter Anvin 
+  * Floating-point warning fixes; fix round-to-overflow
+Tue Oct 16 11:32:58 2007 -0700 H. Peter Anvin 
+  * Handle rounding of denorms correctly; make fp overflow a warning
+Tue Oct 16 10:35:02 2007 -0700 H. Peter Anvin 
+  * Additional entries for .gitignore
+Tue Oct 16 10:32:57 2007 -0700 H. Peter Anvin 
+  * Refactor floating-point formatting code; fix 80-bit denorms
+Tue Oct 16 10:31:16 2007 -0700 H. Peter Anvin 
+  * Add 1.5 as a test case: representative of an exact fraction
+Mon Oct 15 20:06:06 2007 -0700 H. Peter Anvin 
+  * Recognize 'd', 't' and 'y' as radix suffixes
+Mon Oct 15 19:53:10 2007 -0700 H. Peter Anvin 
+  * Fix FISTTP opcodes (BR 689695)
+Mon Oct 15 19:46:32 2007 -0700 H. Peter Anvin 
+  * New floating-point conversion routines
+Mon Oct 15 17:48:43 2007 -0700 H. Peter Anvin 
+  * Add testnos3 from the gdtoa package (floating-point test)
+Sat Oct 13 23:19:21 2007 -0700 H. Peter Anvin 
+  * .gitignore file doesn't need to be in the release file
+Sat Oct 13 23:17:41 2007 -0700 H. Peter Anvin 
+  * Add .gitignore file so "git status" produces something sane
+Sat Oct 13 23:12:46 2007 -0700 H. Peter Anvin 
+  * autoconf: drop AC_USE_SYSTEM_EXTENSIONS to support autoconf 2.59
+Sat Oct 13 07:09:22 2007 -0700 Keith Kanios 
+  * Fix 32-bit types in preproc.c and eval.c
+Thu Oct 11 20:32:33 2007 -0700 Charles Crayne 
+  * Must define types before using them
+Thu Oct 11 13:42:09 2007 -0700 H. Peter Anvin 
+  * preproc.c: move smacro define/undef to separate functions
+Thu Oct 11 13:38:38 2007 -0700 H. Peter Anvin 
+  * preproc.c: PP_DEFINE and PP_XDEFINE are case-sensitive
+Thu Oct 11 12:52:03 2007 -0700 H. Peter Anvin 
+  * preproc.c: normalize the handling of case sensitivity
+Thu Oct 11 12:51:06 2007 -0700 H. Peter Anvin 
+  * Define macros necessary for <inttypes.h> on C++
+Thu Oct 11 10:12:58 2007 -0700 H. Peter Anvin 
+  * More "bool" fixes
+Thu Oct 11 10:11:57 2007 -0700 H. Peter Anvin 
+  * preproc.c: allow 64-bit repeat counts
+Thu Oct 11 10:06:19 2007 -0700 H. Peter Anvin 
+  * preproc.c: For an SMacro, in_progress really is a boolean (no %rep)
+Thu Oct 11 00:05:57 2007 -0700 H. Peter Anvin 
+  * Additional uses of bool and enum
+Thu Oct 11 00:05:57 2007 -0700 H. Peter Anvin 
+  * preproc.c: MMacro.in_progress is not a boolean
+Wed Oct 10 18:07:51 2007 -0700 H. Peter Anvin 
+  * saa_fread/fwrite: when seeking, must set rwptr as well
+Wed Oct 10 14:58:45 2007 -0700 H. Peter Anvin 
+  * Use the compiler-provided booleans if available, otherwise emulate
+Wed Oct 10 14:55:14 2007 -0700 H. Peter Anvin 
+  * owlinux.mak: don't clean things we won't be able to
+Wed Oct 10 14:29:53 2007 -0700 H. Peter Anvin 
+  * configure.in: looks like we need autoconf 2.61 :(
+Wed Oct 10 14:06:59 2007 -0700 H. Peter Anvin 
+  * Create option -Ox to tell NASM to do unlimited passes
+Mon Oct 8 19:26:57 2007 -0700 H. Peter Anvin 
+  * Revert "floatb.asm: fix broken testcase"
+Mon Oct 8 18:39:24 2007 -0700 H. Peter Anvin 
+  * floatb.asm: fix broken testcase
+Mon Oct 8 12:41:00 2007 -0700 H. Peter Anvin 
+  * saa_rstruct: fix overrun check
+Mon Oct 8 12:12:23 2007 -0700 H. Peter Anvin 
+  * Add Frank's floattest.asm test file
+Sun Oct 7 21:13:14 2007 -0700 H. Peter Anvin 
+  * saa_fpwrite: initializing "len" should be part of the loop
+Sun Oct 7 18:46:57 2007 -0700 Charles Crayne 
+  * Fix infinite loop in function saa_fpwrite
+Fri Oct 5 17:44:16 2007 -0700 H. Peter Anvin 
+  * zerobyte.asm: use a real instruction to avoid confusing ndisasm
+Fri Oct 5 17:42:31 2007 -0700 H. Peter Anvin 
+  * zerobyte.asm: add test cases for non-initial \170 uses
+Fri Oct 5 17:29:01 2007 -0700 H. Peter Anvin 
+  * Check in the proper zerobyte test
+Fri Oct 5 17:04:32 2007 -0700 H. Peter Anvin 
+  * Emit REX prefix before literal zero (\170)
+Fri Oct 5 17:01:15 2007 -0700 H. Peter Anvin 
+  * LICENSE: Break long line
+Fri Oct 5 14:36:03 2007 -0700 H. Peter Anvin 
+  * Add test for problematic floats
+Thu Oct 4 23:51:08 2007 -0700 H. Peter Anvin 
+  * floatx.asm: add Inf and NaN to the boundary condition tests
+Thu Oct 4 23:09:19 2007 -0700 H. Peter Anvin 
+  * floatx.asm: add specific tests for exponent boundary conditions
+Thu Oct 4 22:51:08 2007 -0700 H. Peter Anvin 
+  * float.c: correct the exponent
+Thu Oct 4 15:18:23 2007 -0700 H. Peter Anvin 
+  * Additional rules in test/Makefile
+Thu Oct 4 13:42:56 2007 -0700 H. Peter Anvin 
+  * Rewrite the handling of SAA's to allow random access
+Wed Oct 3 21:30:57 2007 -0700 H. Peter Anvin 
+  * Change cloc_t to struct location, and reorder the members
+Wed Oct 3 21:24:51 2007 -0700 H. Peter Anvin 
+  * BR 1352920: change loc_t -> cloc_t
+Wed Oct 3 21:22:16 2007 -0700 H. Peter Anvin 
+  * BR 1352920: Handle upper case %line
+Wed Oct 3 17:40:12 2007 -0700 H. Peter Anvin 
+  * Use autoconf to request feature macros
+Tue Oct 2 22:04:15 2007 -0700 H. Peter Anvin 
+  * preproc.c: constipation
+Tue Oct 2 21:57:27 2007 -0700 H. Peter Anvin 
+  * make alldeps
+Tue Oct 2 21:53:51 2007 -0700 H. Peter Anvin 
+  * Portability fixes
+Tue Oct 2 21:13:18 2007 -0700 H. Peter Anvin 
+  * Run "make alldeps".
+Tue Oct 2 17:40:00 2007 -0700 H. Peter Anvin 
+  * Use the crc64 we already use as the perfect hash function prehash
+Tue Oct 2 15:09:33 2007 -0700 H. Peter Anvin 
+  * insns.dat: add systematic names for the hinting NOPs (0F18-0F1F)
+Mon Oct 1 11:28:32 2007 -0700 H. Peter Anvin 
+  * Unspecified files are null strings, not null pointers
+Mon Oct 1 11:26:31 2007 -0700 H. Peter Anvin 
+  * Check for the most basic filename overlaps
+Sun Sep 30 22:15:36 2007 -0700 Charles Crayne 
+  * modified:   nasm.1 to add newer command line options
+Fri Sep 28 21:27:41 2007 -0700 Charles Crayne 
+  * Merge branch 'master' of git+ssh://ccrayne@repo.or.cz/srv/git/nasm
+Fri Sep 28 20:17:12 2007 -0700 H. Peter Anvin 
+  * configure.in: AC_SUBST_FILE should have been AC_SUBST
+Fri Sep 28 17:17:20 2007 -0700 H. Peter Anvin 
+  * Unbreak relative references to immediate addresses
+Fri Sep 28 15:16:47 2007 -0700 Charles Crayne 
+  * Merge branch 'master' of git+ssh://ccrayne@repo.or.cz/srv/git/nasm
+Fri Sep 28 12:01:55 2007 -0700 H. Peter Anvin 
+  * lib/vsnprintf.c: correct boundary conditions
+Fri Sep 28 10:50:20 2007 -0700 H. Peter Anvin 
+  * Add substitutes for snprintf() and vsnprintf()
+Fri Sep 28 02:03:41 2007 -0400 Frank Kotler 
+  * Merge branch 'master' of git+ssh://fbkotler@repo.or.cz/srv/git/nasm
+Thu Sep 27 21:35:04 2007 -0700 H. Peter Anvin 
+  * Exclude config.h from the dependency list for the canned makefiles
+Thu Sep 27 21:12:17 2007 -0700 H. Peter Anvin 
+  * version.pl: Add support for daily snapshot releases
+Thu Sep 27 19:46:55 2007 -0700 H. Peter Anvin 
+  * Add Makefile for Linux -> DOS, Win32, OS/2 using OpenWatcom
+Wed Sep 26 19:57:07 2007 -0700 H. Peter Anvin 
+  * Add Makefile for OpenWatcom (DOS, OS/2 or Win32 output)
+Wed Sep 26 17:00:18 2007 -0700 H. Peter Anvin 
+  * Test for various addressing modes in 64-bit mode
+Wed Sep 26 15:19:28 2007 -0700 H. Peter Anvin 
+  * nasm option reshuffling, -E -> -Z
+Tue Sep 25 23:57:21 2007 -0400 Frank Kotler 
+  * Version 0.99.04
+Tue Sep 25 20:36:45 2007 -0700 H. Peter Anvin 
+  * nasmdoc: corrections on 64-bit immediates/displacements
+Tue Sep 25 16:02:21 2007 -0700 H. Peter Anvin 
+  * nasmdoc: shorten lines which are too long
+Tue Sep 25 16:01:07 2007 -0700 H. Peter Anvin 
+  * Document NASM behaviour for 64-bit immediates and displacements
+Tue Sep 25 15:44:40 2007 -0700 H. Peter Anvin 
+  * test/movimm.asm: add optimizable forms
+Tue Sep 25 15:41:19 2007 -0700 H. Peter Anvin 
+  * assemble.c: clean up whitespace
+Tue Sep 25 15:40:36 2007 -0700 H. Peter Anvin 
+  * Correct the handling of "MOV" with immediate in 64-bit mode
+Tue Sep 25 15:39:42 2007 -0700 H. Peter Anvin 
+  * Test of immediate handling on 64-bit mode
+Tue Sep 25 14:27:34 2007 -0700 H. Peter Anvin 
+  * Add nasm_zalloc() to nasmlib.c
+Tue Sep 25 14:26:03 2007 -0700 H. Peter Anvin 
+  * Fix BR 1490407: size of the second operand of LAR/LSL
+Tue Sep 25 14:11:29 2007 -0700 H. Peter Anvin 
+  * Fix BR 1490407: size of the second operand of LAR/LSL
+Tue Sep 25 13:34:55 2007 -0700 H. Peter Anvin 
+  * Makefile.in: make "make install" create directories
+Tue Sep 25 08:48:37 2007 -0700 H. Peter Anvin 
+  * Fix BR 1445441: uninitialized use of "error_file"
+Mon Sep 24 21:33:17 2007 -0700 H. Peter Anvin 
+  * preproc.c: fix the loop in %undef
+Mon Sep 24 20:53:48 2007 -0700 H. Peter Anvin 
+  * float.c: clear off uninitialized warning
+Mon Sep 24 17:02:41 2007 -0700 H. Peter Anvin 
+  * outcoff: set the "virtual size field" to zero (BR 1351586)
+Mon Sep 24 15:56:02 2007 -0700 H. Peter Anvin 
+  * insns.dat: SMINT - mark ND, DMINT - fix opcode
+Mon Sep 24 15:55:20 2007 -0700 H. Peter Anvin 
+  * 0F0F is a 3Dnow! prefix; remove from prefix list
+Mon Sep 24 15:48:09 2007 -0700 H. Peter Anvin 
+  * Additional compaction missed by script
+Mon Sep 24 15:42:53 2007 -0700 H. Peter Anvin 
+  * insns.dat: machine-generated compaction mmx/xmmreg,mem -> mmx/xmmrm
+Mon Sep 24 13:54:00 2007 -0700 H. Peter Anvin 
+  * nasmdoc: grammar fix
+Mon Sep 24 13:44:02 2007 -0700 H. Peter Anvin 
+  * nasmdoc: remove stray periods
+Mon Sep 24 13:42:09 2007 -0700 H. Peter Anvin 
+  * test/Makefile: make a bit more useful
+Mon Sep 24 13:41:58 2007 -0700 H. Peter Anvin 
+  * Implement the -MG option (SF RFE 1564264)
+Mon Sep 24 12:52:09 2007 -0700 H. Peter Anvin 
+  * nasmdoc: clarify __float*__ example
+Mon Sep 24 12:44:38 2007 -0700 H. Peter Anvin 
+  * nasmdoc: document the __float*__ operators
+Mon Sep 24 12:30:54 2007 -0700 H. Peter Anvin 
+  * Support __float*__ for floating-point numbers in expressions
+Mon Sep 24 10:51:07 2007 -0700 H. Peter Anvin 
+  * eval.c: replace sequence of ifs with switch
+Mon Sep 24 10:50:23 2007 -0700 H. Peter Anvin 
+  * tokhash: allow a bit smarter pattern matching
+Sat Sep 22 22:35:28 2007 -0700 H. Peter Anvin 
+  * Implement INVLPGA according to the documentation
+Sat Sep 22 22:02:34 2007 -0700 H. Peter Anvin 
+  * Reformat insns.dat to uniform column width
+Sat Sep 22 21:50:03 2007 -0700 H. Peter Anvin 
+  * Simple test for 0x67 prefixes
+Sat Sep 22 21:49:51 2007 -0700 H. Peter Anvin 
+  * Auto-generate 0x67 prefixes without the need for \30x codes
+Sat Sep 22 21:47:13 2007 -0700 H. Peter Anvin 
+  * Make test/Makefile a bit more useful
+Sat Sep 22 21:29:41 2007 -0700 H. Peter Anvin 
+  * Add TY_OWORD for "DO" output
+Sat Sep 22 19:52:11 2007 -0700 H. Peter Anvin 
+  * LDDQU needs \301 (BR 1103549)
+Sat Sep 22 19:51:13 2007 -0700 H. Peter Anvin 
+  * RDTSCP and INVLPGA aren't 64-bit specific
+Sat Sep 22 19:40:37 2007 -0700 H. Peter Anvin 
+  * Cyrix GX1 instructions: BBx_RESET, CPU_READ, CPU_WRITE
+Sat Sep 22 19:28:14 2007 -0700 H. Peter Anvin 
+  * Centaur XSHA1, XSHA256, MONTMUL
+Sat Sep 22 19:20:56 2007 -0700 H. Peter Anvin 
+  * Implement Centaur's XCRYPT instructions
+Sat Sep 22 19:13:05 2007 -0700 H. Peter Anvin 
+  * Add Geode LX (AMD's Cyrix-derived core) instructions
+Sat Sep 22 19:05:11 2007 -0700 H. Peter Anvin 
+  * Add the GETSEC instruction for Intel SMX
+Sat Sep 22 18:59:18 2007 -0700 H. Peter Anvin 
+  * Add the AMD SSE4a and LZCNT instructions
+Sat Sep 22 18:23:20 2007 -0700 H. Peter Anvin 
+  * Tag UMOV as ND (no disassembly) to avoid collision
+Sat Sep 22 18:20:49 2007 -0700 H. Peter Anvin 
+  * Disallow optimizing by less than 5 passes.
+Sat Sep 22 17:45:45 2007 -0700 H. Peter Anvin 
+  * BR 1783117: Document that %+ needs a space after it, and fix crash
+Sat Sep 22 16:44:56 2007 -0700 H. Peter Anvin 
+  * nasm.spec.in: minor fixes
+Sat Sep 22 16:38:25 2007 -0700 H. Peter Anvin 
+  * release script: handle stricter CLI parsing for "git tag"
+Sat Sep 22 16:35:11 2007 -0700 H. Peter Anvin 
+  * Update nasm.spec.in and make it handle rc releases
+Sat Sep 22 16:19:19 2007 -0700 H. Peter Anvin 
+  * version.pl: support version numbers of the form X.Y.ZrcW
+Thu Sep 20 21:33:43 2007 -0700 Charles Crayne 
+  * Merge branch 'master' of git+ssh://ccrayne@repo.or.cz/srv/git/nasm
+Thu Sep 20 21:12:33 2007 -0700 Charles Crayne 
+  * 	modified:   misc/release to fix bug in removing .git
+Wed Sep 19 21:41:43 2007 -0700 H. Peter Anvin 
+  * Merge branch 'master' of git+ssh://repo.or.cz/srv/git/nasm
+Wed Sep 19 21:41:27 2007 -0700 H. Peter Anvin 
+  * Update manual pages
+Wed Sep 19 21:41:02 2007 -0700 H. Peter Anvin 
+  * Remove limit on number of sync points
+Wed Sep 19 21:40:37 2007 -0700 H. Peter Anvin 
+  * Make nasm_malloc() et al available from inside ndisasm
+Wed Sep 19 21:07:32 2007 -0400 Frank Kotler 
+  * Version 0.99.03
+Wed Sep 19 21:06:59 2007 -0400 Frank Kotler 
+  * Merge branch 'master' of git+ssh://fbkotler@repo.or.cz/srv/git/nasm
+Wed Sep 19 16:22:03 2007 -0700 H. Peter Anvin 
+  * Merge commit 'origin/sse5'
+Wed Sep 19 16:15:22 2007 -0700 H. Peter Anvin 
+  * test/Makefile: make a bit more useful
+Tue Sep 18 22:54:40 2007 -0700 H. Peter Anvin 
+  * Slightly optimize the interface to nasm_token_hash()
+Wed Sep 19 01:34:55 2007 -0400 Frank Kotler 
+  * Merge branch 'master' of git+ssh://fbkotler@repo.or.cz/srv/git/nasm
+Tue Sep 18 22:23:42 2007 -0700 H. Peter Anvin 
+  * Merge commit 'origin/master' into sse5
+Tue Sep 18 22:22:49 2007 -0700 H. Peter Anvin 
+  * elf64: fix 32-bit truncations
+Tue Sep 18 22:08:04 2007 -0700 H. Peter Anvin 
+  * Document Infinity and NaN
+Tue Sep 18 21:55:56 2007 -0700 H. Peter Anvin 
+  * Support generating NaNs and infinities
+Tue Sep 18 19:12:26 2007 -0700 H. Peter Anvin 
+  * Update documentation
+Tue Sep 18 18:37:36 2007 -0700 H. Peter Anvin 
+  * Simple test for hexadecimal floating-point numbers
+Tue Sep 18 18:33:17 2007 -0700 H. Peter Anvin 
+  * Fix error-reporting in hexadecimal floating-point numbers
+Tue Sep 18 18:31:26 2007 -0700 H. Peter Anvin 
+  * Support C99-style hexadecimal floating point.
+Tue Sep 18 17:50:34 2007 -0700 H. Peter Anvin 
+  * Unify all standard IEEE floating-point formats; add 128-bit
+Tue Sep 18 17:49:09 2007 -0700 H. Peter Anvin 
+  * Fix handling of DO; support unary + for floating-point numbers
+Tue Sep 18 16:39:03 2007 -0700 H. Peter Anvin 
+  * Support 16-bit IEEE floating point; used in SSE5
+Tue Sep 18 15:43:40 2007 -0700 H. Peter Anvin 
+  * Merge commit 'origin/master' into sse5
+Tue Sep 18 15:43:08 2007 -0700 H. Peter Anvin 
+  * Add NOP with argument to the instruction list
+Tue Sep 18 15:24:38 2007 -0700 H. Peter Anvin 
+  * Remove 0FC2 from list of instruction prefixes
+Tue Sep 18 15:08:20 2007 -0700 H. Peter Anvin 
+  * Speed up the disassembler by allowing prefixed instruction tables
+Tue Sep 18 13:45:12 2007 -0700 H. Peter Anvin 
+  * Document oword, do and reso
+Tue Sep 18 13:01:32 2007 -0700 H. Peter Anvin 
+  * Implement "oword" (128 bits) as a first-class size
+Tue Sep 18 12:38:07 2007 -0700 H. Peter Anvin 
+  * Change the token prehash function for better convergence
+Tue Sep 18 12:23:21 2007 -0700 H. Peter Anvin 
+  * SSE5 instruction table
+Tue Sep 18 02:06:09 2007 -0400 Frank Kotler 
+  * add "const" to output/outdbg.c
+Mon Sep 17 18:45:44 2007 -0700 H. Peter Anvin 
+  * Disassembler support for SSE5 instructions
+Mon Sep 17 17:27:46 2007 -0700 H. Peter Anvin 
+  * insns.dat: All SSE5 instructions are AMD
+Mon Sep 17 17:25:27 2007 -0700 H. Peter Anvin 
+  * Actually generate SSE5 instructions
+Mon Sep 17 16:55:04 2007 -0700 H. Peter Anvin 
+  * Initial support for generating DREX suffixes
+Mon Sep 17 16:31:33 2007 -0700 H. Peter Anvin 
+  * Fix a few instances of missing renumbers
+Mon Sep 17 16:20:45 2007 -0700 H. Peter Anvin 
+  * Enable IF_AR3
+Mon Sep 17 15:49:53 2007 -0700 H. Peter Anvin 
+  * Merge commit 'origin/master' into sse5
+Mon Sep 17 15:49:30 2007 -0700 H. Peter Anvin 
+  * Initial support for four arguments per instruction
+Mon Sep 17 15:48:32 2007 -0700 H. Peter Anvin 
+  * CLFLUSH: Neither an x64 instruction nor AMD
+Mon Sep 17 13:56:26 2007 -0700 H. Peter Anvin 
+  * Sort dependency lists
+Mon Sep 17 13:53:14 2007 -0700 H. Peter Anvin 
+  * Cleaner way to handle MSVC's _snprintf() underscore damage
+Mon Sep 17 13:19:25 2007 -0700 H. Peter Anvin 
+  * test/r13.asm: test special-casing of rbp and r13 in 64-bit mode
+Mon Sep 17 13:03:33 2007 -0700 H. Peter Anvin 
+  * Additional documentation for 64-bit programming
+Sun Sep 16 22:27:07 2007 -0700 H. Peter Anvin 
+  * INSTALL: MSVC++ compilation instructions
+Sun Sep 16 22:17:29 2007 -0700 H. Peter Anvin 
+  * make alldeps: change Mkfiles/Makefile.* to Mkfiles/*.mak
+Sun Sep 16 22:16:24 2007 -0700 H. Peter Anvin 
+  * Fix Makefile for MSVC++ 2005, delete obsolete Makefiles
+Sun Sep 16 22:15:34 2007 -0700 H. Peter Anvin 
+  * Minor fixes needed to compile with MSVC++ 2005
+Sun Sep 16 18:35:02 2007 -0700 H. Peter Anvin 
+  * Run "make alldeps"
+Sun Sep 16 18:04:57 2007 -0700 H. Peter Anvin 
+  * Switch the preprocessor over to using the hash table library
+Sun Sep 16 17:53:17 2007 -0700 H. Peter Anvin 
+  * Fix the handling of local labels
+Fri Sep 14 18:36:01 2007 -0700 H. Peter Anvin 
+  * preproc.c: remove unnecessary int64_t
+Fri Sep 14 18:03:29 2007 -0700 H. Peter Anvin 
+  * Use the new hash table function library to store labels
+Fri Sep 14 09:24:38 2007 -0700 H. Peter Anvin 
+  * Define a proper hash table library
+Thu Sep 13 18:13:20 2007 -0700 H. Peter Anvin 
+  * Simple performance benchmarks: label, macro and token lookups
+Thu Sep 13 12:25:32 2007 -0700 H. Peter Anvin 
+  * release script: fix final cleanup
+Thu Sep 13 12:22:00 2007 -0700 H. Peter Anvin 
+  * Modify release script for a git-centric world
+Thu Sep 13 11:06:42 2007 -0700 H. Peter Anvin 
+  * pptok.c: don't insist on C99 compiler behaviour
+Wed Sep 12 22:02:06 2007 -0700 H. Peter Anvin 
+  * Fix literal F2 and F3 prefixes
+Wed Sep 12 21:58:51 2007 -0700 H. Peter Anvin 
+  * Add (untested!) SSSE3, SSE4.1, SSE4.2 instructions
+Wed Sep 12 21:06:36 2007 -0700 H. Peter Anvin 
+  * Add support for Tejas New Instructions (SSSE3)
+Wed Sep 12 21:05:06 2007 -0700 H. Peter Anvin 
+  * Remove $Id$ tags (useless with git)
+Wed Sep 12 21:04:58 2007 -0700 H. Peter Anvin 
+  * Use rm32 operands for VMREAD/VMWRITE
+Wed Sep 12 21:04:51 2007 -0700 H. Peter Anvin 
+  * Macros for SSSE3/SSE4 instruction sets
+Wed Sep 12 21:04:39 2007 -0700 H. Peter Anvin 
+  * Support r/m operands for non-integer types
+Wed Sep 12 20:27:41 2007 -0700 H. Peter Anvin 
+  * Use enumerations where practical to ease debugging
+Wed Sep 12 17:02:55 2007 +0000 H. Peter Anvin 
+  * pptok.c: quick-and-dirty downcasing during prehashing
+Wed Sep 12 16:55:57 2007 +0000 H. Peter Anvin 
+  * phash: Tell the user when the graph is OK
+Wed Sep 12 05:18:20 2007 +0000 H. Peter Anvin 
+  * pptok.c: handle holes in the pp_directives array
+Wed Sep 12 04:20:08 2007 +0000 H. Peter Anvin 
+  * preproc.c: adjust whitespace
+Wed Sep 12 04:18:37 2007 +0000 H. Peter Anvin 
+  * More automation in the preprocessor conditionals handling
+Wed Sep 12 02:13:39 2007 +0000 H. Peter Anvin 
+  * pptok.c: fix spacing
+Wed Sep 12 02:12:07 2007 +0000 H. Peter Anvin 
+  * Generate automatically correct tests for %if and %elif
+Wed Sep 12 01:34:19 2007 +0000 H. Peter Anvin 
+  * Run "make alldeps"; add dependencies missing from the previous checkin
+Wed Sep 12 01:29:43 2007 +0000 H. Peter Anvin 
+  * Use a perfect hash to look up preprocessor directives
+Wed Sep 12 01:27:53 2007 +0000 H. Peter Anvin 
+  * phash: Be a bit more aggressive about trying to make a small hash
+Wed Sep 12 00:22:29 2007 +0000 H. Peter Anvin 
+  * Add RCXZ as a known preprocessor condition
+Tue Sep 11 23:57:23 2007 +0000 H. Peter Anvin 
+  * doc: add some cross-references
+Tue Sep 11 23:52:01 2007 +0000 H. Peter Anvin 
+  * Feeble attempt at updating the documentation; remove Appendix B
+Tue Sep 11 22:44:03 2007 +0000 H. Peter Anvin 
+  * Handle instructions which can have both REX.W and OSP
+Tue Sep 11 22:14:18 2007 +0000 H. Peter Anvin 
+  * Use enums to make debugging easier
+Tue Sep 11 22:13:17 2007 +0000 H. Peter Anvin 
+  * ndisasm: handle \366 codes, prefer unprefixed instructions
+Tue Sep 11 22:00:34 2007 +0000 H. Peter Anvin 
+  * Simplify tokens.dat slightly
+Tue Sep 11 04:26:44 2007 +0000 H. Peter Anvin 
+  * Quiet gcc warning about uninitialized variables
+Tue Sep 11 04:16:57 2007 +0000 H. Peter Anvin 
+  * Make the big instruction arrays "const"
+Mon Sep 10 23:32:05 2007 +0000 H. Peter Anvin 
+  * Use an actual enum for the opcode
+Mon Sep 10 23:30:21 2007 +0000 H. Peter Anvin 
+  * Fix order of token arguments
+Mon Sep 10 18:59:26 2007 +0000 H. Peter Anvin 
+  * assemble.c: correct special handing of ESP/RSP
+Mon Sep 10 18:59:01 2007 +0000 H. Peter Anvin 
+  * tokhash: correct duplicate-token test
+Mon Sep 10 18:58:40 2007 +0000 H. Peter Anvin 
+  * tokhash: adjust table types to reduce size
+Mon Sep 10 18:55:52 2007 +0000 H. Peter Anvin 
+  * Fix the MMXREG and XMMREG flags definitions.
+Wed Sep 5 06:48:38 2007 +0000 H. Peter Anvin 
+  * nasm.spec.in: Copyright -> License
+Wed Sep 5 06:40:51 2007 +0000 H. Peter Anvin 
+  * Fix "make tar"; useful for RPM testing
+Wed Sep 5 06:24:43 2007 +0000 H. Peter Anvin 
+  * Remove obsolete Serial: construct; we shouldn't need it anyway.
+Tue Sep 4 01:29:43 2007 +0000 Chuck Crayne 
+  * Provide 64-bit support for ORG directive
+Sun Sep 2 16:37:03 2007 +0000 H. Peter Anvin 
+  * Fix some MMX/SSE irregularities which interact with the 64-bit support
+Sun Sep 2 14:46:00 2007 +0000 H. Peter Anvin 
+  * phash.ph: yet another attempt at getting Perl to behave, arithmetically
+Sun Sep 2 06:23:29 2007 +0000 H. Peter Anvin 
+  * Simple 64-bit org test
+Sun Sep 2 06:20:15 2007 +0000 H. Peter Anvin 
+  * phash.ph: remove some stale code
+Sun Sep 2 01:00:34 2007 +0000 Chuck Crayne 
+  * Force use of integer values for generating hash keys.
+Fri Aug 31 18:10:23 2007 +0000 H. Peter Anvin 
+  * phash: don't rely on the build platform Perl version of rand()
+Fri Aug 31 07:31:51 2007 +0000 H. Peter Anvin 
+  * tokhash.pl: formatting changes for readability
+Fri Aug 31 07:23:31 2007 +0000 H. Peter Anvin 
+  * tokhash: Speed up the rejection of unhashed values
+Fri Aug 31 06:06:17 2007 +0000 H. Peter Anvin 
+  * tokhash.pl: "ix" should have the same width as the "hash" arrays
+Fri Aug 31 00:28:35 2007 +0000 H. Peter Anvin 
+  * Add "do not edit" comment to tokhash.c
+Fri Aug 31 00:23:40 2007 +0000 H. Peter Anvin 
+  * Make the token hash a bit smaller by using 16-bit hash tables
+Fri Aug 31 00:16:10 2007 +0000 H. Peter Anvin 
+  * Minor cleanup; remove duplication of names.c
+Thu Aug 30 23:42:39 2007 +0000 H. Peter Anvin 
+  * phash.ph: use a bipartite graph to reduce the storage requirements
+Thu Aug 30 22:35:34 2007 +0000 H. Peter Anvin 
+  * Finishing touches on perfect hash tokenizer; actually turn the thing on
+Thu Aug 30 21:50:20 2007 +0000 H. Peter Anvin 
+  * Makefile rule for tokhash.c
+Thu Aug 30 21:47:46 2007 +0000 H. Peter Anvin 
+  * tokens.dat: Data file containing alphanumeric tokens not in other .dats
+Thu Aug 30 21:45:56 2007 +0000 H. Peter Anvin 
+  * Generate a perfect hash for the token parser
+Thu Aug 30 21:40:08 2007 +0000 H. Peter Anvin 
+  * Fix bugs in repeated suffix handling, which led to missing r8d/r8w/r8d
+Thu Aug 30 21:39:37 2007 +0000 H. Peter Anvin 
+  * phash.ph: more powerful prehashing
+Thu Aug 30 20:15:25 2007 +0000 H. Peter Anvin 
+  * Make the perfect hash generator an includable module
+Wed Aug 29 20:30:31 2007 +0000 H. Peter Anvin 
+  * Correct the logic for recording fs: and gs: overrides.
+Wed Aug 29 18:20:19 2007 +0000 H. Peter Anvin 
+  * Generate R_X86_64_64 relocations in elf64 output
+Wed Aug 29 17:24:03 2007 +0000 H. Peter Anvin 
+  * Add README file
+Wed Aug 29 17:20:09 2007 +0000 H. Peter Anvin 
+  * Create a Perl library directory, and add the Graph module to it
+Wed Aug 29 17:05:17 2007 +0000 H. Peter Anvin 
+  * Perfect hash generator, as a perl script
+Wed Aug 29 16:41:43 2007 +0000 H. Peter Anvin 
+  * Use standard macro for the default directive
+Wed Aug 29 16:40:26 2007 +0000 H. Peter Anvin 
+  * Add standard macro for default directive
+Wed Aug 29 16:38:47 2007 +0000 H. Peter Anvin 
+  * More test cases for rel and abs addressing
+Wed Aug 29 16:38:05 2007 +0000 H. Peter Anvin 
+  * Add default directive
+Wed Aug 29 16:25:46 2007 +0000 H. Peter Anvin 
+  * nasmlib: add bsii() case-insensitive version of bsi()
+Wed Aug 29 15:49:53 2007 +0000 H. Peter Anvin 
+  * Add test cases for IP-relative addressing
+Wed Aug 29 15:19:19 2007 +0000 H. Peter Anvin 
+  * Suppress IP-relative only for fs: and gs: overrides
+Tue Aug 28 23:06:00 2007 +0000 H. Peter Anvin 
+  * Implement REL/ABS modifiers
+Sun Aug 26 05:51:39 2007 +0000 Frank Kotler 
+  * attempt to make static makefiles aware of outelf32/outelf64
+Sun Aug 26 05:48:54 2007 +0000 Frank Kotler 
+  * add nasm_strsep to nasmlib, for output/outmacho.c - strtok doesn't work
+Sun Aug 26 05:41:33 2007 +0000 Frank Kotler 
+  * remove "#include <unistd.h> from rdoff directory - two places - it annoyed Windows users and seems unneeded
+Sun Aug 26 05:10:24 2007 +0000 Frank Kotler 
+  * finally commit Mike Frysinger's "elf-visibility" patch
+Mon Aug 20 21:03:14 2007 +0000 H. Peter Anvin 
+  * regs.pl: handle dashed sequences with suffixes
+Mon Aug 20 20:10:04 2007 +0000 H. Peter Anvin 
+  * sync.c: change ULONG_MAX to UINT32_MAX
+Mon Aug 20 20:09:11 2007 +0000 H. Peter Anvin 
+  * Add _MIN and _MAX macros for the fixed-size types.
+Mon Aug 20 20:02:17 2007 +0000 H. Peter Anvin 
+  * ldrdf: cast output of sizeof() before passing to printf(), to avoid warning.
+Sun Aug 19 18:49:26 2007 +0000 Keith Kanios 
+  * Fixed RIP address processing ambiguity found by Charles Crayne.
+Fri Aug 17 07:37:52 2007 +0000 Keith Kanios 
+  * Fixed issues with REX prefix effective address generation. Fixed XMM instruction output.
+Fri Aug 17 02:03:10 2007 +0000 Keith Kanios 
+  * Changed MMXREG and XMMREG flags to help resolve invalid REX prefix generation for MMX instructions.
+Sat Jul 7 02:01:08 2007 +0000 H. Peter Anvin 
+  * More int/int32_t confusion
+Sat Jul 7 01:59:52 2007 +0000 H. Peter Anvin 
+  * regflag() should return int32_t.
+Thu Jun 21 19:00:12 2007 +0000 H. Peter Anvin 
+  * Detect missing <inttypes.h> and include ersatz version if missing
+Thu Jun 21 06:24:23 2007 +0000 H. Peter Anvin 
+  * inttypes.h: for older preprocessors, specify L and LL as appropriate
+Thu Jun 21 06:20:43 2007 +0000 H. Peter Anvin 
+  * inttypes.h: Fix spelling of SHRT_MAX
+Thu Jun 21 06:15:42 2007 +0000 H. Peter Anvin 
+  * inttypes.h: do a single ersatz <inttypes.h> based on <limits.h>
+Sun Jun 3 02:42:41 2007 +0000 Chuck Crayne 
+  * Support 32-bit direct addressing in 64-bit mode without base or index regs
+Sat Jun 2 02:26:21 2007 +0000 H. Peter Anvin 
+  * Fix the UINT*_C() creation macros
+Sat Jun 2 00:05:35 2007 +0000 H. Peter Anvin 
+  * For platforms that don't have them, provide <inttypes.h> for common models.
+Wed May 30 22:21:11 2007 +0000 H. Peter Anvin 
+  * Fix the handling of the \313 code.
+Wed May 30 22:20:01 2007 +0000 H. Peter Anvin 
+  * Machine-generated \321->\324 corrections
+Wed May 30 21:22:33 2007 +0000 Frank Kotler 
+  * update "version" to 0.99.02
+Wed May 30 20:30:15 2007 +0000 H. Peter Anvin 
+  * Correct the generation of 67 prefixes.
+Wed May 30 18:30:18 2007 +0000 H. Peter Anvin 
+  * Update dependencies.
+Wed May 30 16:34:29 2007 +0000 Frank Kotler 
+  * update cvs server name in misc/release script
+Wed May 30 04:28:50 2007 +0000 H. Peter Anvin 
+  * Avoid magic values; we have more than 124 registers now
+Wed May 30 04:27:58 2007 +0000 H. Peter Anvin 
+  * Remove bogus redundant tests
+Wed May 30 03:44:50 2007 +0000 H. Peter Anvin 
+  * More \321 -> \324
+Wed May 30 03:44:02 2007 +0000 H. Peter Anvin 
+  * Remove bogus check for 64-bitness
+Wed May 30 03:25:21 2007 +0000 H. Peter Anvin 
+  * Get rid of magic open-coded "register numbers"
+Wed May 30 02:48:51 2007 +0000 H. Peter Anvin 
+  * MOV reg64,reg64 takes \324 (64 bit with REX) not \321 (32 bit)
+Wed May 30 00:18:26 2007 +0000 H. Peter Anvin 
+  * Rename REGNORM to REG_EA
+Wed May 30 00:15:25 2007 +0000 H. Peter Anvin 
+  * More instruction flag surgery
+Wed May 30 00:05:00 2007 +0000 H. Peter Anvin 
+  * More cleanup of operand flags/register classes
+Tue May 29 23:57:12 2007 +0000 H. Peter Anvin 
+  * Clean up the existing operand flag definitions, and document
+Tue May 29 21:44:55 2007 +0000 H. Peter Anvin 
+  * Run "make alldeps"
+Thu May 24 22:33:07 2007 +0000 Frank Kotler 
+  * update version number to 0.99.01
+Tue May 15 04:33:43 2007 +0000 H. Peter Anvin 
+  * regs.dat: fix comment
+Fri May 4 18:47:16 2007 +0000 H. Peter Anvin 
+  * 16-bit relocations are standard in ELF64 (at my request, incidentally)
+Fri May 4 02:16:08 2007 +0000 Chuck Crayne 
+  * Addition of elf32 and elf64 output formats.
+Wed May 2 04:21:26 2007 +0000 Chuck Crayne 
+  * Allow '!' to be used in expressions with same meaning as in C.
+Wed May 2 01:59:16 2007 +0000 Chuck Crayne 
+  * Add %IFN and %ELIFN as per RFE #786286
+Mon Apr 30 22:26:58 2007 +0000 Chuck Crayne 
+  * Accept responsibility for support of outelf64.c
+Sun Apr 29 20:57:53 2007 +0000 Chuck Crayne 
+  * Clarify comments about relocation entries.
+Sun Apr 29 00:28:24 2007 +0000 Chuck Crayne 
+  * Allow ELF32 to be invoked either as -f elf or -f elf32
+Sat Apr 28 22:18:04 2007 +0000 Chuck Crayne 
+  * Eliminate shift count warnings when building on 32-bit systems
+Sat Apr 28 06:18:48 2007 +0000 Chuck Crayne 
+  * Initial support for ELF64
+Wed Apr 18 02:27:18 2007 +0000 H. Peter Anvin 
+  * Fix the handling of \324 for computing the length
+Wed Apr 18 02:24:34 2007 +0000 Keith Kanios 
+  * Fixed RDF/2 to comply with "maxbits" use.
+Tue Apr 17 20:23:11 2007 +0000 H. Peter Anvin 
+  * Handle "LOCK as REX.R" for MOV CRx; fix warning for invalid 64-bit regs
+Mon Apr 16 18:16:46 2007 +0000 Keith Kanios 
+  * MEM_OFFSET Instructions Fixed.
+Mon Apr 16 15:46:46 2007 +0000 Keith Kanios 
+  * Fixed 64-bit Mode Segment Selection.
+Mon Apr 16 14:31:54 2007 +0000 Keith Kanios 
+  * Fixed distinction between LOCALSYMBOL/IMMEDIATE for RIP-relative addressing.
+Mon Apr 16 14:05:01 2007 +0000 Keith Kanios 
+  * Fixed long mode MEM_OFFS issue.
+Mon Apr 16 13:54:49 2007 +0000 Keith Kanios 
+  * Filled in all RIP Register Flags.
+Mon Apr 16 05:26:29 2007 +0000 H. Peter Anvin 
+  * More \321 -> \324 for 64-bit instructions
+Mon Apr 16 04:56:06 2007 +0000 Keith Kanios 
+  * Fixed 64-bit offset generation.
+Mon Apr 16 02:39:56 2007 +0000 H. Peter Anvin 
+  * More 64-bit ndisasm fixes.
+Mon Apr 16 02:02:06 2007 +0000 H. Peter Anvin 
+  * Fixes for 64-bit ndisasm.
+Mon Apr 16 01:21:29 2007 +0000 H. Peter Anvin 
+  * Use + instead of * for extension; it feels cleaner with the new meaning.
+Mon Apr 16 01:18:30 2007 +0000 H. Peter Anvin 
+  * Initial 64-bit support for ndisasm.  Still a work in progress.
+Sun Apr 15 23:12:17 2007 +0000 H. Peter Anvin 
+  * Clean up the 64-bitification of regs.dat for 64-bit ndisasm support
+Sun Apr 15 23:10:26 2007 +0000 H. Peter Anvin 
+  * Remove @GCCFLAGS@
+Sun Apr 15 23:09:23 2007 +0000 H. Peter Anvin 
+  * CR8 is not special in any way as far as the assembler is concerned.
+Sun Apr 15 23:03:28 2007 +0000 H. Peter Anvin Sat Nov 24 16:31:48 2007 -0800 H. Peter Anvin 
+  * Typo fixes in documentation
+Tue Nov 20 23:37:46 2007 -0800 H. Peter Anvin 
+  * NASM 2.00rc3
+Tue Nov 20 21:45:16 2007 -0800 H. Peter Anvin 
+  * Unbreak CMPSW/CMPSD/CMPSQ
+Tue Nov 20 13:23:34 2007 -0800 H. Peter Anvin 
+  * Merge branch 'master' of git+ssh://repo.or.cz/srv/git/nasm
+Tue Nov 20 13:22:58 2007 -0800 H. Peter Anvin 
+  * ndisasm: handle the case of "no more sync points"
+Mon Nov 19 23:09:31 2007 -0800 H. Peter Anvin 
+  * NASM 2.00rc2
+Mon Nov 19 23:09:24 2007 -0800 H. Peter Anvin 
+  * tag-release: a simple script to tag the repository for release
+Mon Nov 19 13:14:59 2007 -0800 H. Peter Anvin 
+  * Slightly faster implementation of the deadman counter
+Mon Nov 19 12:26:50 2007 -0800 H. Peter Anvin 
+  * BR 812417: Deadman counter for macro expansion
+Mon Nov 19 12:02:38 2007 -0800 H. Peter Anvin 
+  * BR 877583: Fix RAA memory leak
+Mon Nov 19 11:53:18 2007 -0800 H. Peter Anvin 
+  * BR 863173: Fix offsets of TIMES/INCBIN in list file
+Mon Nov 19 11:45:40 2007 -0800 H. Peter Anvin 
+  * BR 1834731: Remove redundant error messages for no input file
+Mon Nov 19 11:44:05 2007 -0800 H. Peter Anvin 
+  * insns.pl: remove debugging output
+Sun Nov 18 22:18:09 2007 -0800 H. Peter Anvin 
+  * Clean up remaining build warnings
+Sun Nov 18 21:55:26 2007 -0800 H. Peter Anvin 
+  * BR 1834292: Fix multiple disassembler bugs
+Sun Nov 18 12:01:05 2007 -0800 H. Peter Anvin 
+  * BR 1834056: Remove warnings in rdoff/rdoff.c
+Sun Nov 18 11:55:10 2007 -0800 H. Peter Anvin 
+  * BR 1091926: Bounds checking for command line parsing
+Sat Nov 17 21:21:18 2007 -0800 H. Peter Anvin 
+  * Remove FIXME from documentation
+Sat Nov 17 21:08:33 2007 -0800 Charles Crayne 
+  * Check in Keith's Fixes
+Sat Nov 17 14:35:19 2007 -0800 H. Peter Anvin 
+  * Make the definition for float_const() match the prototype
+Fri Nov 16 00:03:02 2007 -0800 H. Peter Anvin 
+  * NASM 2.00rc1
+Thu Nov 15 17:12:29 2007 -0800 H. Peter Anvin 
+  * Clean up the command-line parsing; make -w/-W match others
+Thu Nov 15 14:38:19 2007 -0800 H. Peter Anvin 
+  * BR 993895: Support zero-operand floating-point insn
+Thu Nov 15 10:25:52 2007 -0800 H. Peter Anvin 
+  * Remove some vestiges of "native" RESW/RESD support
+Thu Nov 15 10:24:55 2007 -0800 H. Peter Anvin 
+  * outbin.c: fix one missed change from type -> size
+Tue Nov 13 19:52:54 2007 -0800 root 
+  * Support setting OSABI value in ELF header.
+Tue Nov 13 11:34:34 2007 -0800 H. Peter Anvin 
+  * Enable a few warnings by default; clean up warning descriptions
+Tue Nov 13 11:31:15 2007 -0800 H. Peter Anvin 
+  * Add gcc-style -W/-Wno- warning selections; -Wall; -Werror
+Tue Nov 13 10:37:23 2007 -0800 H. Peter Anvin 
+  * Clean up the fwrite*() function definitions somewhat
+Tue Nov 13 09:49:51 2007 -0800 H. Peter Anvin 
+  * Cast 64-bit switch expressions to (int) to keep OpenWatcom happy
+Tue Nov 13 09:46:38 2007 -0800 H. Peter Anvin 
+  * x86-host-specific performance improvement
+Tue Nov 13 09:37:59 2007 -0800 H. Peter Anvin 
+  * Address data is int64_t; simplify writing an address object
+Mon Nov 12 23:00:31 2007 -0800 H. Peter Anvin 
+  * ndisasm: factor out the common operand-extraction code
+Mon Nov 12 22:56:07 2007 -0800 H. Peter Anvin 
+  * Un-special-case "xchg rax,rax"; disassemble o64
+Mon Nov 12 22:11:46 2007 -0800 H. Peter Anvin 
+  * BR 1709392: Fix alignment handling in Mach-O formatSat Nov 24 16:31:48 2007 -0800 H. Peter Anvin 
+  * Typo fixes in documentation
+Tue Nov 20 23:37:46 2007 -0800 H. Peter Anvin 
+  * NASM 2.00rc3
+Tue Nov 20 21:45:16 2007 -0800 H. Peter Anvin 
+  * Unbreak CMPSW/CMPSD/CMPSQ
+Tue Nov 20 13:23:34 2007 -0800 H. Peter Anvin 
+  * Merge branch 'master' of git+ssh://repo.or.cz/srv/git/nasm
+Tue Nov 20 13:22:58 2007 -0800 H. Peter Anvin 
+  * ndisasm: handle the case of "no more sync points"
+Mon Nov 19 23:09:31 2007 -0800 H. Peter Anvin 
+  * NASM 2.00rc2
+Mon Nov 19 23:09:24 2007 -0800 H. Peter Anvin 
+  * tag-release: a simple script to tag the repository for release
+Mon Nov 19 13:14:59 2007 -0800 H. Peter Anvin 
+  * Slightly faster implementation of the deadman counter
+Mon Nov 19 12:26:50 2007 -0800 H. Peter Anvin 
+  * BR 812417: Deadman counter for macro expansion
+Mon Nov 19 12:02:38 2007 -0800 H. Peter Anvin 
+  * BR 877583: Fix RAA memory leak
+Mon Nov 19 11:53:18 2007 -0800 H. Peter Anvin 
+  * BR 863173: Fix offsets of TIMES/INCBIN in list file
+Mon Nov 19 11:45:40 2007 -0800 H. Peter Anvin 
+  * BR 1834731: Remove redundant error messages for no input file
+Mon Nov 19 11:44:05 2007 -0800 H. Peter Anvin 
+  * insns.pl: remove debugging output
+Sun Nov 18 22:18:09 2007 -0800 H. Peter Anvin 
+  * Clean up remaining build warnings
+Sun Nov 18 21:55:26 2007 -0800 H. Peter Anvin 
+  * BR 1834292: Fix multiple disassembler bugs
+Sun Nov 18 12:01:05 2007 -0800 H. Peter Anvin 
+  * BR 1834056: Remove warnings in rdoff/rdoff.c
+Sun Nov 18 11:55:10 2007 -0800 H. Peter Anvin 
+  * BR 1091926: Bounds checking for command line parsing
+Sat Nov 17 21:21:18 2007 -0800 H. Peter Anvin 
+  * Remove FIXME from documentation
+Sat Nov 17 21:08:33 2007 -0800 Charles Crayne 
+  * Check in Keith's Fixes
+Sat Nov 17 14:35:19 2007 -0800 H. Peter Anvin 
+  * Make the definition for float_const() match the prototype
+Fri Nov 16 00:03:02 2007 -0800 H. Peter Anvin 
+  * NASM 2.00rc1
+Thu Nov 15 17:12:29 2007 -0800 H. Peter Anvin 
+  * Clean up the command-line parsing; make -w/-W match others
+Thu Nov 15 14:38:19 2007 -0800 H. Peter Anvin 
+  * BR 993895: Support zero-operand floating-point insn
+Thu Nov 15 10:25:52 2007 -0800 H. Peter Anvin 
+  * Remove some vestiges of "native" RESW/RESD support
+Thu Nov 15 10:24:55 2007 -0800 H. Peter Anvin 
+  * outbin.c: fix one missed change from type -> size
+Tue Nov 13 19:52:54 2007 -0800 root 
+  * Support setting OSABI value in ELF header.
+Tue Nov 13 11:34:34 2007 -0800 H. Peter Anvin 
+  * Enable a few warnings by default; clean up warning descriptions
+Tue Nov 13 11:31:15 2007 -0800 H. Peter Anvin 
+  * Add gcc-style -W/-Wno- warning selections; -Wall; -Werror
+Tue Nov 13 10:37:23 2007 -0800 H. Peter Anvin 
+  * Clean up the fwrite*() function definitions somewhat
+Tue Nov 13 09:49:51 2007 -0800 H. Peter Anvin 
+  * Cast 64-bit switch expressions to (int) to keep OpenWatcom happy
+Tue Nov 13 09:46:38 2007 -0800 H. Peter Anvin 
+  * x86-host-specific performance improvement
+Tue Nov 13 09:37:59 2007 -0800 H. Peter Anvin 
+  * Address data is int64_t; simplify writing an address object
+Mon Nov 12 23:00:31 2007 -0800 H. Peter Anvin 
+  * ndisasm: factor out the common operand-extraction code
+Mon Nov 12 22:56:07 2007 -0800 H. Peter Anvin 
+  * Un-special-case "xchg rax,rax"; disassemble o64
+Mon Nov 12 22:11:46 2007 -0800 H. Peter Anvin 
+  * BR 1709392: Fix alignment handling in Mach-O format
+Mon Nov 12 22:05:31 2007 -0800 H. Peter Anvin 
+  * BR 1828866: fix handling of LAR/LSL
+Mon Nov 12 21:57:00 2007 -0800 H. Peter Anvin 
+  * Better (but not *good!*) handling of 64-bit addressing in ndisasm
+Mon Nov 12 21:02:33 2007 -0800 H. Peter Anvin 
+  * Fix disassembly of XCHG
+Mon Nov 12 20:18:33 2007 -0800 H. Peter Anvin 
+  * Test of XCHG
+Mon Nov 12 20:18:05 2007 -0800 H. Peter Anvin 
+  * Fix handling of XCHG in 64-bit mode
+Mon Nov 12 19:36:13 2007 -0800 H. Peter Anvin 
+  * More \321 -> \324 bug fixes
+Mon Nov 12 18:26:31 2007 -0800 H. Peter Anvin 
+  * float.c: all warnings and errors are pass 1 only
+Sat Nov 10 21:55:19 2007 -0800 Charles Crayne 
+  * Update documentation for stack relative directives.
+Sat Nov 10 17:52:23 2007 -0800 Charles Crayne 
+  * Clean up a few more 32-bit bottlenecks
+Fri Nov 9 16:37:41 2007 -0800 Charles Crayne 
+  * Update documentation for stack relative directives
+Fri Nov 9 16:33:54 2007 -0800 Charles Crayne 
+  * Merge branch 'master' of /home/chuck/development/gitnasm/
+Fri Nov 9 16:25:43 2007 -0800 Charles Crayne 
+  * Update documentation for stack relative directives
+Fri Nov 9 14:44:02 2007 -0800 H. Peter Anvin 
+  * Don't combine type and size into a single argument
+Thu Nov 8 22:11:14 2007 -0800 Charles Crayne 
+  * Add flat64 to %stacksize choices
+Thu Nov 8 20:43:22 2007 -0800 H. Peter Anvin 
+  * Fix building under OpenWatcom
+Thu Nov 8 20:29:37 2007 -0800 H. Peter Anvin 
+  * ps2pdf: remove -dOptimize=true
+Thu Nov 8 20:21:41 2007 -0800 H. Peter Anvin 
+  * No binary files left in the source distro; unbreak release script
+Thu Nov 8 20:01:11 2007 -0800 H. Peter Anvin 
+  * BR 1828103: Fix %arg and %local
+Thu Nov 8 19:34:01 2007 -0800 H. Peter Anvin 
+  * nasmlib.c: prefix_name(): use the elements() macro
+Thu Nov 8 19:30:22 2007 -0800 H. Peter Anvin 
+  * Move elements() to nasmlib.h
+Thu Nov 8 19:15:33 2007 -0800 H. Peter Anvin 
+  * constipate the "str" argument to bsi() and bsii()
+Wed Nov 7 19:03:46 2007 -0800 Charles Crayne 
+  * Upgrade RAA functions to hold 64-bit data.
+Tue Nov 6 21:48:12 2007 -0800 Charles Crayne 
+  * Pass 64-bit instruction lengths to back-ends.
+Tue Nov 6 18:27:23 2007 -0800 Charles Crayne 
+  * Prepare for 64-bit instruction lengths
+Mon Nov 5 21:49:49 2007 -0800 Charles Crayne 
+  * Disambiguate error messages
+Mon Nov 5 17:19:32 2007 -0800 Charles Crayne 
+  * Upgrade label functions to 64-bit
+Sun Nov 4 21:10:42 2007 -0800 H. Peter Anvin 
+  * Permit opcode names as labels as long as they are followed by a colon
+Sun Nov 4 15:28:30 2007 -0800 Charles Crayne 
+  * Make warning limit valid for both i386 and x86_64
+Sat Nov 3 22:06:13 2007 -0700 Charles Crayne 
+  * Warn on out of bounds EA displacements
+Thu Nov 1 15:08:27 2007 -0700 H. Peter Anvin 
+  * Treat info files as binary when creating xdoc distro file
+Thu Nov 1 15:07:42 2007 -0700 H. Peter Anvin 
+  * Remove obsolete binary files from the distribution
+Thu Nov 1 14:53:32 2007 -0700 H. Peter Anvin 
+  * Move declarations before statements
+Wed Oct 31 23:37:35 2007 -0700 H. Peter Anvin 
+  * NASM 0.99.06
+Wed Oct 31 23:37:19 2007 -0700 H. Peter Anvin 
+  * Script to tag the tree for release
+Wed Oct 31 10:59:26 2007 -0700 H. Peter Anvin 
+  * Even more "riprel" tests
+Tue Oct 30 01:17:57 2007 -0700 H. Peter Anvin 
+  * floatx.asm: add tests for "rounds up to smallest denorm"
+Tue Oct 30 01:13:27 2007 -0700 H. Peter Anvin 
+  * Run "make alldeps"
+Tue Oct 30 01:13:09 2007 -0700 H. Peter Anvin 
+  * float.c: handle round-up-to-denorm correctly.
+Tue Oct 30 00:59:27 2007 -0700 H. Peter Anvin 
+  * Exhaustive test for 8-bit floating point values
+Mon Oct 29 23:12:47 2007 -0700 H. Peter Anvin 
+  * Clean up the handing of operands in assemble.c
+Mon Oct 29 22:56:08 2007 -0700 H. Peter Anvin 
+  * Don't warn for segmented references
+Mon Oct 29 20:20:12 2007 -0700 H. Peter Anvin 
+  * Use a 32-bit floating-point limb size; support 8-bit float
+Mon Oct 29 18:24:59 2007 -0700 Charles Crayne 
+  * Reduce severity of redundant prefixes from error to warning.
+Sun Oct 28 23:23:24 2007 -0700 H. Peter Anvin 
+  * Test of some addressing modes in 64-bit mode.
+Sun Oct 28 23:21:46 2007 -0700 H. Peter Anvin 
+  * Fix bogus flagging of effective addresses as invalid
+Sun Oct 28 23:10:34 2007 -0700 H. Peter Anvin 
+  * Actually shut up the warning in rdfload.c
+Sun Oct 28 22:04:42 2007 -0700 H. Peter Anvin 
+  * Clean up stealth whitespace
+Sun Oct 28 22:04:00 2007 -0700 H. Peter Anvin 
+  * Fix warning about cast to pointer in rdfload.c
+Sun Oct 28 22:04:00 2007 -0700 H. Peter Anvin 
+  * 64-bit addressing and prefix handling changes
+Sun Oct 28 15:29:54 2007 -0700 Charles Crayne 
+  * Adjust stabs symbol index to match symbol table.
+Fri Oct 26 21:38:02 2007 -0700 H. Peter Anvin 
+  * readnum(): handle prefix-suffix collision like "0h"
+Fri Oct 26 18:49:29 2007 -0700 H. Peter Anvin 
+  * Better handling of platforms which hide "extended" functionality
+Wed Oct 24 15:51:40 2007 -0700 Charles Crayne 
+  * Merge branch 'master' of /home/chuck/development/gitnasm/
+Wed Oct 24 15:30:17 2007 -0700 Charles Crayne 
+  * Update sections about debug info formats
+Wed Oct 24 15:29:51 2007 -0700 H. Peter Anvin 
+  * Fix the handling of floating-point tokens in the preprocessor
+Tue Oct 23 19:28:39 2007 -0700 Charles Crayne 
+  * Fix bugs item #1817677
+Tue Oct 23 00:08:58 2007 -0700 H. Peter Anvin 
+  * Slightly simplify the radix-detection code
+Mon Oct 22 19:48:06 2007 -0700 H. Peter Anvin 
+  * Unbreak particularly tricky hex constants
+Mon Oct 22 19:37:36 2007 -0700 H. Peter Anvin 
+  * Decimal floating point can also start with 0. 0e 0E
+Mon Oct 22 17:34:10 2007 -0700 H. Peter Anvin 
+  * Support binary and octal floating-point
+Mon Oct 22 16:53:48 2007 -0700 H. Peter Anvin 
+  * More consistent handling of radix letters
+Sun Oct 21 15:33:01 2007 -0700 H. Peter Anvin 
+  * float.c: correct exponent capping
+Sun Oct 21 14:21:43 2007 -0700 Charles Crayne 
+  * Clean up elf symbol table section
+Fri Oct 19 18:33:57 2007 -0700 H. Peter Anvin 
+  * Allow $-prefixed hexadecimal FP as an alternative to 0x
+Fri Oct 19 14:43:22 2007 -0700 H. Peter Anvin 
+  * Scripts to remove stealth whitespace
+Fri Oct 19 14:42:29 2007 -0700 H. Peter Anvin 
+  * Formatting: kill off "stealth whitespace"
+Fri Oct 19 14:26:52 2007 -0700 H. Peter Anvin 
+  * test/floatx.asm: fix test case
+Fri Oct 19 14:19:52 2007 -0700 H. Peter Anvin 
+  * uscore.asm: Fix test case
+Fri Oct 19 14:17:51 2007 -0700 H. Peter Anvin 
+  * float.c: mark read_exponent() static
+Fri Oct 19 14:10:35 2007 -0700 H. Peter Anvin 
+  * Don't confuse suffixed hexadecimal with floating-point
+Fri Oct 19 13:17:24 2007 -0700 H. Peter Anvin 
+  * Anchor filename locations in .gitignore
+Fri Oct 19 13:16:51 2007 -0700 H. Peter Anvin 
+  * test/Makefile: Use -Ox instead of -O999
+Fri Oct 19 13:14:06 2007 -0700 H. Peter Anvin 
+  * Test of underscored constants
+Fri Oct 19 13:10:46 2007 -0700 H. Peter Anvin 
+  * Allow underscores in numbers; better detection of FP
+Fri Oct 19 10:52:31 2007 -0700 H. Peter Anvin 
+  * Modernize nasm.spec.in and make it closer to the Fedora version
+Thu Oct 18 23:33:06 2007 -0700 Charles Crayne 
+  * Suppress datarootdir warnings from configure
+Thu Oct 18 21:17:20 2007 -0700 Charles Crayne 
+  * Suppress signedness warnings in disassembler
+Thu Oct 18 19:14:08 2007 -0700 H. Peter Anvin 
+  * Cleaner solution for MinGW handling of __STRICT_ANSI__
+Thu Oct 18 19:14:08 2007 -0700 H. Peter Anvin 
+  * configure: Undefine __STRICT_ANSI__ for mingw's benefit
+Thu Oct 18 19:14:07 2007 -0700 H. Peter Anvin 
+  * Fix invocation of readnum()
+Thu Oct 18 19:02:42 2007 -0700 Charles Crayne 
+  * Suppress a few signedness warnings
+Thu Oct 18 17:04:10 2007 -0700 root 
+  * Avoid unnecessary warning on redefinition of section (bug 801180)
+Wed Oct 17 17:55:45 2007 -0700 Charles Crayne 
+  * Generate stabs entries for any executable section
+Tue Oct 16 22:59:09 2007 -0700 H. Peter Anvin 
+  * NASM 0.99.05
+Tue Oct 16 15:46:04 2007 -0700 H. Peter Anvin 
+  * Tests of obscenely large exponents
+Tue Oct 16 14:42:32 2007 -0700 H. Peter Anvin 
+  * Comma-separate contents of __FLOAT__
+Tue Oct 16 14:40:27 2007 -0700 H. Peter Anvin 
+  * Implement floating-point option control directive
+Tue Oct 16 11:48:07 2007 -0700 H. Peter Anvin 
+  * Floating-point warning fixes; fix round-to-overflow
+Tue Oct 16 11:32:58 2007 -0700 H. Peter Anvin 
+  * Handle rounding of denorms correctly; make fp overflow a warning
+Tue Oct 16 10:35:02 2007 -0700 H. Peter Anvin 
+  * Additional entries for .gitignore
+Tue Oct 16 10:32:57 2007 -0700 H. Peter Anvin 
+  * Refactor floating-point formatting code; fix 80-bit denorms
+Tue Oct 16 10:31:16 2007 -0700 H. Peter Anvin 
+  * Add 1.5 as a test case: representative of an exact fraction
+Mon Oct 15 20:06:06 2007 -0700 H. Peter Anvin 
+  * Recognize 'd', 't' and 'y' as radix suffixes
+Mon Oct 15 19:53:10 2007 -0700 H. Peter Anvin 
+  * Fix FISTTP opcodes (BR 689695)
+Mon Oct 15 19:46:32 2007 -0700 H. Peter Anvin 
+  * New floating-point conversion routines
+Mon Oct 15 17:48:43 2007 -0700 H. Peter Anvin 
+  * Add testnos3 from the gdtoa package (floating-point test)
+Sat Oct 13 23:19:21 2007 -0700 H. Peter Anvin 
+  * .gitignore file doesn't need to be in the release file
+Sat Oct 13 23:17:41 2007 -0700 H. Peter Anvin 
+  * Add .gitignore file so "git status" produces something sane
+Sat Oct 13 23:12:46 2007 -0700 H. Peter Anvin 
+  * autoconf: drop AC_USE_SYSTEM_EXTENSIONS to support autoconf 2.59
+Sat Oct 13 07:09:22 2007 -0700 Keith Kanios 
+  * Fix 32-bit types in preproc.c and eval.c
+Thu Oct 11 20:32:33 2007 -0700 Charles Crayne 
+  * Must define types before using them
+Thu Oct 11 13:42:09 2007 -0700 H. Peter Anvin 
+  * preproc.c: move smacro define/undef to separate functions
+Thu Oct 11 13:38:38 2007 -0700 H. Peter Anvin 
+  * preproc.c: PP_DEFINE and PP_XDEFINE are case-sensitive
+Thu Oct 11 12:52:03 2007 -0700 H. Peter Anvin 
+  * preproc.c: normalize the handling of case sensitivity
+Thu Oct 11 12:51:06 2007 -0700 H. Peter Anvin 
+  * Define macros necessary for <inttypes.h> on C++
+Thu Oct 11 10:12:58 2007 -0700 H. Peter Anvin 
+  * More "bool" fixes
+Thu Oct 11 10:11:57 2007 -0700 H. Peter Anvin 
+  * preproc.c: allow 64-bit repeat counts
+Thu Oct 11 10:06:19 2007 -0700 H. Peter Anvin 
+  * preproc.c: For an SMacro, in_progress really is a boolean (no %rep)
+Thu Oct 11 00:05:57 2007 -0700 H. Peter Anvin 
+  * Additional uses of bool and enum
+Thu Oct 11 00:05:57 2007 -0700 H. Peter Anvin 
+  * preproc.c: MMacro.in_progress is not a boolean
+Wed Oct 10 18:07:51 2007 -0700 H. Peter Anvin 
+  * saa_fread/fwrite: when seeking, must set rwptr as well
+Wed Oct 10 14:58:45 2007 -0700 H. Peter Anvin 
+  * Use the compiler-provided booleans if available, otherwise emulate
+Wed Oct 10 14:55:14 2007 -0700 H. Peter Anvin 
+  * owlinux.mak: don't clean things we won't be able to
+Wed Oct 10 14:29:53 2007 -0700 H. Peter Anvin 
+  * configure.in: looks like we need autoconf 2.61 :(
+Wed Oct 10 14:06:59 2007 -0700 H. Peter Anvin 
+  * Create option -Ox to tell NASM to do unlimited passes
+Mon Oct 8 19:26:57 2007 -0700 H. Peter Anvin 
+  * Revert "floatb.asm: fix broken testcase"
+Mon Oct 8 18:39:24 2007 -0700 H. Peter Anvin 
+  * floatb.asm: fix broken testcase
+Mon Oct 8 12:41:00 2007 -0700 H. Peter Anvin 
+  * saa_rstruct: fix overrun check
+Mon Oct 8 12:12:23 2007 -0700 H. Peter Anvin 
+  * Add Frank's floattest.asm test file
+Sun Oct 7 21:13:14 2007 -0700 H. Peter Anvin 
+  * saa_fpwrite: initializing "len" should be part of the loop
+Sun Oct 7 18:46:57 2007 -0700 Charles Crayne 
+  * Fix infinite loop in function saa_fpwrite
+Fri Oct 5 17:44:16 2007 -0700 H. Peter Anvin 
+  * zerobyte.asm: use a real instruction to avoid confusing ndisasm
+Fri Oct 5 17:42:31 2007 -0700 H. Peter Anvin 
+  * zerobyte.asm: add test cases for non-initial \170 uses
+Fri Oct 5 17:29:01 2007 -0700 H. Peter Anvin 
+  * Check in the proper zerobyte test
+Fri Oct 5 17:04:32 2007 -0700 H. Peter Anvin 
+  * Emit REX prefix before literal zero (\170)
+Fri Oct 5 17:01:15 2007 -0700 H. Peter Anvin 
+  * LICENSE: Break long line
+Fri Oct 5 14:36:03 2007 -0700 H. Peter Anvin 
+  * Add test for problematic floats
+Thu Oct 4 23:51:08 2007 -0700 H. Peter Anvin 
+  * floatx.asm: add Inf and NaN to the boundary condition tests
+Thu Oct 4 23:09:19 2007 -0700 H. Peter Anvin 
+  * floatx.asm: add specific tests for exponent boundary conditions
+Thu Oct 4 22:51:08 2007 -0700 H. Peter Anvin 
+  * float.c: correct the exponent
+Thu Oct 4 15:18:23 2007 -0700 H. Peter Anvin 
+  * Additional rules in test/Makefile
+Thu Oct 4 13:42:56 2007 -0700 H. Peter Anvin 
+  * Rewrite the handling of SAA's to allow random access
+Wed Oct 3 21:30:57 2007 -0700 H. Peter Anvin 
+  * Change cloc_t to struct location, and reorder the members
+Wed Oct 3 21:24:51 2007 -0700 H. Peter Anvin 
+  * BR 1352920: change loc_t -> cloc_t
+Wed Oct 3 21:22:16 2007 -0700 H. Peter Anvin 
+  * BR 1352920: Handle upper case %line
+Wed Oct 3 17:40:12 2007 -0700 H. Peter Anvin 
+  * Use autoconf to request feature macros
+Tue Oct 2 22:04:15 2007 -0700 H. Peter Anvin 
+  * preproc.c: constipation
+Tue Oct 2 21:57:27 2007 -0700 H. Peter Anvin 
+  * make alldeps
+Tue Oct 2 21:53:51 2007 -0700 H. Peter Anvin 
+  * Portability fixes
+Tue Oct 2 21:13:18 2007 -0700 H. Peter Anvin 
+  * Run "make alldeps".
+Tue Oct 2 17:40:00 2007 -0700 H. Peter Anvin 
+  * Use the crc64 we already use as the perfect hash function prehash
+Tue Oct 2 15:09:33 2007 -0700 H. Peter Anvin 
+  * insns.dat: add systematic names for the hinting NOPs (0F18-0F1F)
+Mon Oct 1 11:28:32 2007 -0700 H. Peter Anvin 
+  * Unspecified files are null strings, not null pointers
+Mon Oct 1 11:26:31 2007 -0700 H. Peter Anvin 
+  * Check for the most basic filename overlaps
+Sun Sep 30 22:15:36 2007 -0700 Charles Crayne 
+  * modified:   nasm.1 to add newer command line options
+Fri Sep 28 21:27:41 2007 -0700 Charles Crayne 
+  * Merge branch 'master' of git+ssh://ccrayne@repo.or.cz/srv/git/nasm
+Fri Sep 28 20:17:12 2007 -0700 H. Peter Anvin 
+  * configure.in: AC_SUBST_FILE should have been AC_SUBST
+Fri Sep 28 17:17:20 2007 -0700 H. Peter Anvin 
+  * Unbreak relative references to immediate addresses
+Fri Sep 28 15:16:47 2007 -0700 Charles Crayne 
+  * Merge branch 'master' of git+ssh://ccrayne@repo.or.cz/srv/git/nasm
+Fri Sep 28 12:01:55 2007 -0700 H. Peter Anvin 
+  * lib/vsnprintf.c: correct boundary conditions
+Fri Sep 28 10:50:20 2007 -0700 H. Peter Anvin 
+  * Add substitutes for snprintf() and vsnprintf()
+Fri Sep 28 02:03:41 2007 -0400 Frank Kotler 
+  * Merge branch 'master' of git+ssh://fbkotler@repo.or.cz/srv/git/nasm
+Thu Sep 27 21:35:04 2007 -0700 H. Peter Anvin 
+  * Exclude config.h from the dependency list for the canned makefiles
+Thu Sep 27 21:12:17 2007 -0700 H. Peter Anvin 
+  * version.pl: Add support for daily snapshot releases
+Thu Sep 27 19:46:55 2007 -0700 H. Peter Anvin 
+  * Add Makefile for Linux -> DOS, Win32, OS/2 using OpenWatcom
+Wed Sep 26 19:57:07 2007 -0700 H. Peter Anvin 
+  * Add Makefile for OpenWatcom (DOS, OS/2 or Win32 output)
+Wed Sep 26 17:00:18 2007 -0700 H. Peter Anvin 
+  * Test for various addressing modes in 64-bit mode
+Wed Sep 26 15:19:28 2007 -0700 H. Peter Anvin 
+  * nasm option reshuffling, -E -> -Z
+Tue Sep 25 23:57:21 2007 -0400 Frank Kotler 
+  * Version 0.99.04
+Tue Sep 25 20:36:45 2007 -0700 H. Peter Anvin 
+  * nasmdoc: corrections on 64-bit immediates/displacements
+Tue Sep 25 16:02:21 2007 -0700 H. Peter Anvin 
+  * nasmdoc: shorten lines which are too long
+Tue Sep 25 16:01:07 2007 -0700 H. Peter Anvin 
+  * Document NASM behaviour for 64-bit immediates and displacements
+Tue Sep 25 15:44:40 2007 -0700 H. Peter Anvin 
+  * test/movimm.asm: add optimizable forms
+Tue Sep 25 15:41:19 2007 -0700 H. Peter Anvin 
+  * assemble.c: clean up whitespace
+Tue Sep 25 15:40:36 2007 -0700 H. Peter Anvin 
+  * Correct the handling of "MOV" with immediate in 64-bit mode
+Tue Sep 25 15:39:42 2007 -0700 H. Peter Anvin 
+  * Test of immediate handling on 64-bit mode
+Tue Sep 25 14:27:34 2007 -0700 H. Peter Anvin 
+  * Add nasm_zalloc() to nasmlib.c
+Tue Sep 25 14:26:03 2007 -0700 H. Peter Anvin 
+  * Fix BR 1490407: size of the second operand of LAR/LSL
+Tue Sep 25 14:11:29 2007 -0700 H. Peter Anvin 
+  * Fix BR 1490407: size of the second operand of LAR/LSL
+Tue Sep 25 13:34:55 2007 -0700 H. Peter Anvin 
+  * Makefile.in: make "make install" create directories
+Tue Sep 25 08:48:37 2007 -0700 H. Peter Anvin 
+  * Fix BR 1445441: uninitialized use of "error_file"
+Mon Sep 24 21:33:17 2007 -0700 H. Peter Anvin 
+  * preproc.c: fix the loop in %undef
+Mon Sep 24 20:53:48 2007 -0700 H. Peter Anvin 
+  * float.c: clear off uninitialized warning
+Mon Sep 24 17:02:41 2007 -0700 H. Peter Anvin 
+  * outcoff: set the "virtual size field" to zero (BR 1351586)
+Mon Sep 24 15:56:02 2007 -0700 H. Peter Anvin 
+  * insns.dat: SMINT - mark ND, DMINT - fix opcode
+Mon Sep 24 15:55:20 2007 -0700 H. Peter Anvin 
+  * 0F0F is a 3Dnow! prefix; remove from prefix list
+Mon Sep 24 15:48:09 2007 -0700 H. Peter Anvin 
+  * Additional compaction missed by script
+Mon Sep 24 15:42:53 2007 -0700 H. Peter Anvin 
+  * insns.dat: machine-generated compaction mmx/xmmreg,mem -> mmx/xmmrm
+Mon Sep 24 13:54:00 2007 -0700 H. Peter Anvin 
+  * nasmdoc: grammar fix
+Mon Sep 24 13:44:02 2007 -0700 H. Peter Anvin 
+  * nasmdoc: remove stray periods
+Mon Sep 24 13:42:09 2007 -0700 H. Peter Anvin 
+  * test/Makefile: make a bit more useful
+Mon Sep 24 13:41:58 2007 -0700 H. Peter Anvin 
+  * Implement the -MG option (SF RFE 1564264)
+Mon Sep 24 12:52:09 2007 -0700 H. Peter Anvin 
+  * nasmdoc: clarify __float*__ example
+Mon Sep 24 12:44:38 2007 -0700 H. Peter Anvin 
+  * nasmdoc: document the __float*__ operators
+Mon Sep 24 12:30:54 2007 -0700 H. Peter Anvin 
+  * Support __float*__ for floating-point numbers in expressions
+Mon Sep 24 10:51:07 2007 -0700 H. Peter Anvin 
+  * eval.c: replace sequence of ifs with switch
+Mon Sep 24 10:50:23 2007 -0700 H. Peter Anvin 
+  * tokhash: allow a bit smarter pattern matching
+Sat Sep 22 22:35:28 2007 -0700 H. Peter Anvin 
+  * Implement INVLPGA according to the documentation
+Sat Sep 22 22:02:34 2007 -0700 H. Peter Anvin 
+  * Reformat insns.dat to uniform column width
+Sat Sep 22 21:50:03 2007 -0700 H. Peter Anvin 
+  * Simple test for 0x67 prefixes
+Sat Sep 22 21:49:51 2007 -0700 H. Peter Anvin 
+  * Auto-generate 0x67 prefixes without the need for \30x codes
+Sat Sep 22 21:47:13 2007 -0700 H. Peter Anvin 
+  * Make test/Makefile a bit more useful
+Sat Sep 22 21:29:41 2007 -0700 H. Peter Anvin 
+  * Add TY_OWORD for "DO" output
+Sat Sep 22 19:52:11 2007 -0700 H. Peter Anvin 
+  * LDDQU needs \301 (BR 1103549)
+Sat Sep 22 19:51:13 2007 -0700 H. Peter Anvin 
+  * RDTSCP and INVLPGA aren't 64-bit specific
+Sat Sep 22 19:40:37 2007 -0700 H. Peter Anvin 
+  * Cyrix GX1 instructions: BBx_RESET, CPU_READ, CPU_WRITE
+Sat Sep 22 19:28:14 2007 -0700 H. Peter Anvin 
+  * Centaur XSHA1, XSHA256, MONTMUL
+Sat Sep 22 19:20:56 2007 -0700 H. Peter Anvin 
+  * Implement Centaur's XCRYPT instructions
+Sat Sep 22 19:13:05 2007 -0700 H. Peter Anvin 
+  * Add Geode LX (AMD's Cyrix-derived core) instructions
+Sat Sep 22 19:05:11 2007 -0700 H. Peter Anvin 
+  * Add the GETSEC instruction for Intel SMX
+Sat Sep 22 18:59:18 2007 -0700 H. Peter Anvin 
+  * Add the AMD SSE4a and LZCNT instructions
+Sat Sep 22 18:23:20 2007 -0700 H. Peter Anvin 
+  * Tag UMOV as ND (no disassembly) to avoid collision
+Sat Sep 22 18:20:49 2007 -0700 H. Peter Anvin 
+  * Disallow optimizing by less than 5 passes.
+Sat Sep 22 17:45:45 2007 -0700 H. Peter Anvin 
+  * BR 1783117: Document that %+ needs a space after it, and fix crash
+Sat Sep 22 16:44:56 2007 -0700 H. Peter Anvin 
+  * nasm.spec.in: minor fixes
+Sat Sep 22 16:38:25 2007 -0700 H. Peter Anvin 
+  * release script: handle stricter CLI parsing for "git tag"
+Sat Sep 22 16:35:11 2007 -0700 H. Peter Anvin 
+  * Update nasm.spec.in and make it handle rc releases
+Sat Sep 22 16:19:19 2007 -0700 H. Peter Anvin 
+  * version.pl: support version numbers of the form X.Y.ZrcW
+Thu Sep 20 21:33:43 2007 -0700 Charles Crayne 
+  * Merge branch 'master' of git+ssh://ccrayne@repo.or.cz/srv/git/nasm
+Thu Sep 20 21:12:33 2007 -0700 Charles Crayne 
+  * 	modified:   misc/release to fix bug in removing .git
+Wed Sep 19 21:41:43 2007 -0700 H. Peter Anvin 
+  * Merge branch 'master' of git+ssh://repo.or.cz/srv/git/nasm
+Wed Sep 19 21:41:27 2007 -0700 H. Peter Anvin 
+  * Update manual pages
+Wed Sep 19 21:41:02 2007 -0700 H. Peter Anvin 
+  * Remove limit on number of sync points
+Wed Sep 19 21:40:37 2007 -0700 H. Peter Anvin 
+  * Make nasm_malloc() et al available from inside ndisasm
+Wed Sep 19 21:07:32 2007 -0400 Frank Kotler 
+  * Version 0.99.03
+Wed Sep 19 21:06:59 2007 -0400 Frank Kotler 
+  * Merge branch 'master' of git+ssh://fbkotler@repo.or.cz/srv/git/nasm
+Wed Sep 19 16:22:03 2007 -0700 H. Peter Anvin 
+  * Merge commit 'origin/sse5'
+Wed Sep 19 16:15:22 2007 -0700 H. Peter Anvin 
+  * test/Makefile: make a bit more useful
+Tue Sep 18 22:54:40 2007 -0700 H. Peter Anvin 
+  * Slightly optimize the interface to nasm_token_hash()
+Wed Sep 19 01:34:55 2007 -0400 Frank Kotler 
+  * Merge branch 'master' of git+ssh://fbkotler@repo.or.cz/srv/git/nasm
+Tue Sep 18 22:23:42 2007 -0700 H. Peter Anvin 
+  * Merge commit 'origin/master' into sse5
+Tue Sep 18 22:22:49 2007 -0700 H. Peter Anvin 
+  * elf64: fix 32-bit truncations
+Tue Sep 18 22:08:04 2007 -0700 H. Peter Anvin 
+  * Document Infinity and NaN
+Tue Sep 18 21:55:56 2007 -0700 H. Peter Anvin 
+  * Support generating NaNs and infinities
+Tue Sep 18 19:12:26 2007 -0700 H. Peter Anvin 
+  * Update documentation
+Tue Sep 18 18:37:36 2007 -0700 H. Peter Anvin 
+  * Simple test for hexadecimal floating-point numbers
+Tue Sep 18 18:33:17 2007 -0700 H. Peter Anvin 
+  * Fix error-reporting in hexadecimal floating-point numbers
+Tue Sep 18 18:31:26 2007 -0700 H. Peter Anvin 
+  * Support C99-style hexadecimal floating point.
+Tue Sep 18 17:50:34 2007 -0700 H. Peter Anvin 
+  * Unify all standard IEEE floating-point formats; add 128-bit
+Tue Sep 18 17:49:09 2007 -0700 H. Peter Anvin 
+  * Fix handling of DO; support unary + for floating-point numbers
+Tue Sep 18 16:39:03 2007 -0700 H. Peter Anvin 
+  * Support 16-bit IEEE floating point; used in SSE5
+Tue Sep 18 15:43:40 2007 -0700 H. Peter Anvin 
+  * Merge commit 'origin/master' into sse5
+Tue Sep 18 15:43:08 2007 -0700 H. Peter Anvin 
+  * Add NOP with argument to the instruction list
+Tue Sep 18 15:24:38 2007 -0700 H. Peter Anvin 
+  * Remove 0FC2 from list of instruction prefixes
+Tue Sep 18 15:08:20 2007 -0700 H. Peter Anvin 
+  * Speed up the disassembler by allowing prefixed instruction tables
+Tue Sep 18 13:45:12 2007 -0700 H. Peter Anvin 
+  * Document oword, do and reso
+Tue Sep 18 13:01:32 2007 -0700 H. Peter Anvin 
+  * Implement "oword" (128 bits) as a first-class size
+Tue Sep 18 12:38:07 2007 -0700 H. Peter Anvin 
+  * Change the token prehash function for better convergence
+Tue Sep 18 12:23:21 2007 -0700 H. Peter Anvin 
+  * SSE5 instruction table
+Tue Sep 18 02:06:09 2007 -0400 Frank Kotler 
+  * add "const" to output/outdbg.c
+Mon Sep 17 18:45:44 2007 -0700 H. Peter Anvin 
+  * Disassembler support for SSE5 instructions
+Mon Sep 17 17:27:46 2007 -0700 H. Peter Anvin 
+  * insns.dat: All SSE5 instructions are AMD
+Mon Sep 17 17:25:27 2007 -0700 H. Peter Anvin 
+  * Actually generate SSE5 instructions
+Mon Sep 17 16:55:04 2007 -0700 H. Peter Anvin 
+  * Initial support for generating DREX suffixes
+Mon Sep 17 16:31:33 2007 -0700 H. Peter Anvin 
+  * Fix a few instances of missing renumbers
+Mon Sep 17 16:20:45 2007 -0700 H. Peter Anvin 
+  * Enable IF_AR3
+Mon Sep 17 15:49:53 2007 -0700 H. Peter Anvin 
+  * Merge commit 'origin/master' into sse5
+Mon Sep 17 15:49:30 2007 -0700 H. Peter Anvin 
+  * Initial support for four arguments per instruction
+Mon Sep 17 15:48:32 2007 -0700 H. Peter Anvin 
+  * CLFLUSH: Neither an x64 instruction nor AMD
+Mon Sep 17 13:56:26 2007 -0700 H. Peter Anvin 
+  * Sort dependency lists
+Mon Sep 17 13:53:14 2007 -0700 H. Peter Anvin 
+  * Cleaner way to handle MSVC's _snprintf() underscore damage
+Mon Sep 17 13:19:25 2007 -0700 H. Peter Anvin 
+  * test/r13.asm: test special-casing of rbp and r13 in 64-bit mode
+Mon Sep 17 13:03:33 2007 -0700 H. Peter Anvin 
+  * Additional documentation for 64-bit programming
+Sun Sep 16 22:27:07 2007 -0700 H. Peter Anvin 
+  * INSTALL: MSVC++ compilation instructions
+Sun Sep 16 22:17:29 2007 -0700 H. Peter Anvin 
+  * make alldeps: change Mkfiles/Makefile.* to Mkfiles/*.mak
+Sun Sep 16 22:16:24 2007 -0700 H. Peter Anvin 
+  * Fix Makefile for MSVC++ 2005, delete obsolete Makefiles
+Sun Sep 16 22:15:34 2007 -0700 H. Peter Anvin 
+  * Minor fixes needed to compile with MSVC++ 2005
+Sun Sep 16 18:35:02 2007 -0700 H. Peter Anvin 
+  * Run "make alldeps"
+Sun Sep 16 18:04:57 2007 -0700 H. Peter Anvin 
+  * Switch the preprocessor over to using the hash table library
+Sun Sep 16 17:53:17 2007 -0700 H. Peter Anvin 
+  * Fix the handling of local labels
+Fri Sep 14 18:36:01 2007 -0700 H. Peter Anvin 
+  * preproc.c: remove unnecessary int64_t
+Fri Sep 14 18:03:29 2007 -0700 H. Peter Anvin 
+  * Use the new hash table function library to store labels
+Fri Sep 14 09:24:38 2007 -0700 H. Peter Anvin 
+  * Define a proper hash table library
+Thu Sep 13 18:13:20 2007 -0700 H. Peter Anvin 
+  * Simple performance benchmarks: label, macro and token lookups
+Thu Sep 13 12:25:32 2007 -0700 H. Peter Anvin 
+  * release script: fix final cleanup
+Thu Sep 13 12:22:00 2007 -0700 H. Peter Anvin 
+  * Modify release script for a git-centric world
+Thu Sep 13 11:06:42 2007 -0700 H. Peter Anvin 
+  * pptok.c: don't insist on C99 compiler behaviour
+Wed Sep 12 22:02:06 2007 -0700 H. Peter Anvin 
+  * Fix literal F2 and F3 prefixes
+Wed Sep 12 21:58:51 2007 -0700 H. Peter Anvin 
+  * Add (untested!) SSSE3, SSE4.1, SSE4.2 instructions
+Wed Sep 12 21:06:36 2007 -0700 H. Peter Anvin 
+  * Add support for Tejas New Instructions (SSSE3)
+Wed Sep 12 21:05:06 2007 -0700 H. Peter Anvin 
+  * Remove $Id$ tags (useless with git)
+Wed Sep 12 21:04:58 2007 -0700 H. Peter Anvin 
+  * Use rm32 operands for VMREAD/VMWRITE
+Wed Sep 12 21:04:51 2007 -0700 H. Peter Anvin 
+  * Macros for SSSE3/SSE4 instruction sets
+Wed Sep 12 21:04:39 2007 -0700 H. Peter Anvin 
+  * Support r/m operands for non-integer types
+Wed Sep 12 20:27:41 2007 -0700 H. Peter Anvin 
+  * Use enumerations where practical to ease debugging
+Wed Sep 12 17:02:55 2007 +0000 H. Peter Anvin 
+  * pptok.c: quick-and-dirty downcasing during prehashing
+Wed Sep 12 16:55:57 2007 +0000 H. Peter Anvin 
+  * phash: Tell the user when the graph is OK
+Wed Sep 12 05:18:20 2007 +0000 H. Peter Anvin 
+  * pptok.c: handle holes in the pp_directives array
+Wed Sep 12 04:20:08 2007 +0000 H. Peter Anvin 
+  * preproc.c: adjust whitespace
+Wed Sep 12 04:18:37 2007 +0000 H. Peter Anvin 
+  * More automation in the preprocessor conditionals handling
+Wed Sep 12 02:13:39 2007 +0000 H. Peter Anvin 
+  * pptok.c: fix spacing
+Wed Sep 12 02:12:07 2007 +0000 H. Peter Anvin 
+  * Generate automatically correct tests for %if and %elif
+Wed Sep 12 01:34:19 2007 +0000 H. Peter Anvin 
+  * Run "make alldeps"; add dependencies missing from the previous checkin
+Wed Sep 12 01:29:43 2007 +0000 H. Peter Anvin 
+  * Use a perfect hash to look up preprocessor directives
+Wed Sep 12 01:27:53 2007 +0000 H. Peter Anvin 
+  * phash: Be a bit more aggressive about trying to make a small hash
+Wed Sep 12 00:22:29 2007 +0000 H. Peter Anvin 
+  * Add RCXZ as a known preprocessor condition
+Tue Sep 11 23:57:23 2007 +0000 H. Peter Anvin 
+  * doc: add some cross-references
+Tue Sep 11 23:52:01 2007 +0000 H. Peter Anvin 
+  * Feeble attempt at updating the documentation; remove Appendix B
+Tue Sep 11 22:44:03 2007 +0000 H. Peter Anvin 
+  * Handle instructions which can have both REX.W and OSP
+Tue Sep 11 22:14:18 2007 +0000 H. Peter Anvin 
+  * Use enums to make debugging easier
+Tue Sep 11 22:13:17 2007 +0000 H. Peter Anvin 
+  * ndisasm: handle \366 codes, prefer unprefixed instructions
+Tue Sep 11 22:00:34 2007 +0000 H. Peter Anvin 
+  * Simplify tokens.dat slightly
+Tue Sep 11 04:26:44 2007 +0000 H. Peter Anvin 
+  * Quiet gcc warning about uninitialized variables
+Tue Sep 11 04:16:57 2007 +0000 H. Peter Anvin 
+  * Make the big instruction arrays "const"
+Mon Sep 10 23:32:05 2007 +0000 H. Peter Anvin 
+  * Use an actual enum for the opcode
+Mon Sep 10 23:30:21 2007 +0000 H. Peter Anvin 
+  * Fix order of token arguments
+Mon Sep 10 18:59:26 2007 +0000 H. Peter Anvin 
+  * assemble.c: correct special handing of ESP/RSP
+Mon Sep 10 18:59:01 2007 +0000 H. Peter Anvin 
+  * tokhash: correct duplicate-token test
+Mon Sep 10 18:58:40 2007 +0000 H. Peter Anvin 
+  * tokhash: adjust table types to reduce size
+Mon Sep 10 18:55:52 2007 +0000 H. Peter Anvin 
+  * Fix the MMXREG and XMMREG flags definitions.
+Wed Sep 5 06:48:38 2007 +0000 H. Peter Anvin 
+  * nasm.spec.in: Copyright -> License
+Wed Sep 5 06:40:51 2007 +0000 H. Peter Anvin 
+  * Fix "make tar"; useful for RPM testing
+Wed Sep 5 06:24:43 2007 +0000 H. Peter Anvin 
+  * Remove obsolete Serial: construct; we shouldn't need it anyway.
+Tue Sep 4 01:29:43 2007 +0000 Chuck Crayne 
+  * Provide 64-bit support for ORG directive
+Sun Sep 2 16:37:03 2007 +0000 H. Peter Anvin 
+  * Fix some MMX/SSE irregularities which interact with the 64-bit support
+Sun Sep 2 14:46:00 2007 +0000 H. Peter Anvin 
+  * phash.ph: yet another attempt at getting Perl to behave, arithmetically
+Sun Sep 2 06:23:29 2007 +0000 H. Peter Anvin 
+  * Simple 64-bit org test
+Sun Sep 2 06:20:15 2007 +0000 H. Peter Anvin 
+  * phash.ph: remove some stale code
+Sun Sep 2 01:00:34 2007 +0000 Chuck Crayne 
+  * Force use of integer values for generating hash keys.
+Fri Aug 31 18:10:23 2007 +0000 H. Peter Anvin 
+  * phash: don't rely on the build platform Perl version of rand()
+Fri Aug 31 07:31:51 2007 +0000 H. Peter Anvin 
+  * tokhash.pl: formatting changes for readability
+Fri Aug 31 07:23:31 2007 +0000 H. Peter Anvin 
+  * tokhash: Speed up the rejection of unhashed values
+Fri Aug 31 06:06:17 2007 +0000 H. Peter Anvin 
+  * tokhash.pl: "ix" should have the same width as the "hash" arrays
+Fri Aug 31 00:28:35 2007 +0000 H. Peter Anvin 
+  * Add "do not edit" comment to tokhash.c
+Fri Aug 31 00:23:40 2007 +0000 H. Peter Anvin 
+  * Make the token hash a bit smaller by using 16-bit hash tables
+Fri Aug 31 00:16:10 2007 +0000 H. Peter Anvin 
+  * Minor cleanup; remove duplication of names.c
+Thu Aug 30 23:42:39 2007 +0000 H. Peter Anvin 
+  * phash.ph: use a bipartite graph to reduce the storage requirements
+Thu Aug 30 22:35:34 2007 +0000 H. Peter Anvin 
+  * Finishing touches on perfect hash tokenizer; actually turn the thing on
+Thu Aug 30 21:50:20 2007 +0000 H. Peter Anvin 
+  * Makefile rule for tokhash.c
+Thu Aug 30 21:47:46 2007 +0000 H. Peter Anvin 
+  * tokens.dat: Data file containing alphanumeric tokens not in other .dats
+Thu Aug 30 21:45:56 2007 +0000 H. Peter Anvin 
+  * Generate a perfect hash for the token parser
+Thu Aug 30 21:40:08 2007 +0000 H. Peter Anvin 
+  * Fix bugs in repeated suffix handling, which led to missing r8d/r8w/r8d
+Thu Aug 30 21:39:37 2007 +0000 H. Peter Anvin 
+  * phash.ph: more powerful prehashing
+Thu Aug 30 20:15:25 2007 +0000 H. Peter Anvin 
+  * Make the perfect hash generator an includable module
+Wed Aug 29 20:30:31 2007 +0000 H. Peter Anvin 
+  * Correct the logic for recording fs: and gs: overrides.
+Wed Aug 29 18:20:19 2007 +0000 H. Peter Anvin 
+  * Generate R_X86_64_64 relocations in elf64 output
+Wed Aug 29 17:24:03 2007 +0000 H. Peter Anvin 
+  * Add README file
+Wed Aug 29 17:20:09 2007 +0000 H. Peter Anvin 
+  * Create a Perl library directory, and add the Graph module to it
+Wed Aug 29 17:05:17 2007 +0000 H. Peter Anvin 
+  * Perfect hash generator, as a perl script
+Wed Aug 29 16:41:43 2007 +0000 H. Peter Anvin 
+  * Use standard macro for the default directive
+Wed Aug 29 16:40:26 2007 +0000 H. Peter Anvin 
+  * Add standard macro for default directive
+Wed Aug 29 16:38:47 2007 +0000 H. Peter Anvin 
+  * More test cases for rel and abs addressing
+Wed Aug 29 16:38:05 2007 +0000 H. Peter Anvin 
+  * Add default directive
+Wed Aug 29 16:25:46 2007 +0000 H. Peter Anvin 
+  * nasmlib: add bsii() case-insensitive version of bsi()
+Wed Aug 29 15:49:53 2007 +0000 H. Peter Anvin 
+  * Add test cases for IP-relative addressing
+Wed Aug 29 15:19:19 2007 +0000 H. Peter Anvin 
+  * Suppress IP-relative only for fs: and gs: overrides
+Tue Aug 28 23:06:00 2007 +0000 H. Peter Anvin 
+  * Implement REL/ABS modifiers
+Sun Aug 26 05:51:39 2007 +0000 Frank Kotler 
+  * attempt to make static makefiles aware of outelf32/outelf64
+Sun Aug 26 05:48:54 2007 +0000 Frank Kotler 
+  * add nasm_strsep to nasmlib, for output/outmacho.c - strtok doesn't work
+Sun Aug 26 05:41:33 2007 +0000 Frank Kotler 
+  * remove "#include <unistd.h> from rdoff directory - two places - it annoyed Windows users and seems unneeded
+Sun Aug 26 05:10:24 2007 +0000 Frank Kotler 
+  * finally commit Mike Frysinger's "elf-visibility" patch
+Mon Aug 20 21:03:14 2007 +0000 H. Peter Anvin 
+  * regs.pl: handle dashed sequences with suffixes
+Mon Aug 20 20:10:04 2007 +0000 H. Peter Anvin 
+  * sync.c: change ULONG_MAX to UINT32_MAX
+Mon Aug 20 20:09:11 2007 +0000 H. Peter Anvin 
+  * Add _MIN and _MAX macros for the fixed-size types.
+Mon Aug 20 20:02:17 2007 +0000 H. Peter Anvin 
+  * ldrdf: cast output of sizeof() before passing to printf(), to avoid warning.
+Sun Aug 19 18:49:26 2007 +0000 Keith Kanios 
+  * Fixed RIP address processing ambiguity found by Charles Crayne.
+Fri Aug 17 07:37:52 2007 +0000 Keith Kanios 
+  * Fixed issues with REX prefix effective address generation. Fixed XMM instruction output.
+Fri Aug 17 02:03:10 2007 +0000 Keith Kanios 
+  * Changed MMXREG and XMMREG flags to help resolve invalid REX prefix generation for MMX instructions.
+Sat Jul 7 02:01:08 2007 +0000 H. Peter Anvin 
+  * More int/int32_t confusion
+Sat Jul 7 01:59:52 2007 +0000 H. Peter Anvin 
+  * regflag() should return int32_t.
+Thu Jun 21 19:00:12 2007 +0000 H. Peter Anvin 
+  * Detect missing <inttypes.h> and include ersatz version if missing
+Thu Jun 21 06:24:23 2007 +0000 H. Peter Anvin 
+  * inttypes.h: for older preprocessors, specify L and LL as appropriate
+Thu Jun 21 06:20:43 2007 +0000 H. Peter Anvin 
+  * inttypes.h: Fix spelling of SHRT_MAX
+Thu Jun 21 06:15:42 2007 +0000 H. Peter Anvin 
+  * inttypes.h: do a single ersatz <inttypes.h> based on <limits.h>
+Sun Jun 3 02:42:41 2007 +0000 Chuck Crayne 
+  * Support 32-bit direct addressing in 64-bit mode without base or index regs
+Sat Jun 2 02:26:21 2007 +0000 H. Peter Anvin 
+  * Fix the UINT*_C() creation macros
+Sat Jun 2 00:05:35 2007 +0000 H. Peter Anvin 
+  * For platforms that don't have them, provide <inttypes.h> for common models.
+Wed May 30 22:21:11 2007 +0000 H. Peter Anvin 
+  * Fix the handling of the \313 code.
+Wed May 30 22:20:01 2007 +0000 H. Peter Anvin 
+  * Machine-generated \321->\324 corrections
+Wed May 30 21:22:33 2007 +0000 Frank Kotler 
+  * update "version" to 0.99.02
+Wed May 30 20:30:15 2007 +0000 H. Peter Anvin 
+  * Correct the generation of 67 prefixes.
+Wed May 30 18:30:18 2007 +0000 H. Peter Anvin 
+  * Update dependencies.
+Wed May 30 16:34:29 2007 +0000 Frank Kotler 
+  * update cvs server name in misc/release script
+Wed May 30 04:28:50 2007 +0000 H. Peter Anvin 
+  * Avoid magic values; we have more than 124 registers now
+Wed May 30 04:27:58 2007 +0000 H. Peter Anvin 
+  * Remove bogus redundant tests
+Wed May 30 03:44:50 2007 +0000 H. Peter Anvin 
+  * More \321 -> \324
+Wed May 30 03:44:02 2007 +0000 H. Peter Anvin 
+  * Remove bogus check for 64-bitness
+Wed May 30 03:25:21 2007 +0000 H. Peter Anvin 
+  * Get rid of magic open-coded "register numbers"
+Wed May 30 02:48:51 2007 +0000 H. Peter Anvin 
+  * MOV reg64,reg64 takes \324 (64 bit with REX) not \321 (32 bit)
+Wed May 30 00:18:26 2007 +0000 H. Peter Anvin 
+  * Rename REGNORM to REG_EA
+Wed May 30 00:15:25 2007 +0000 H. Peter Anvin 
+  * More instruction flag surgery
+Wed May 30 00:05:00 2007 +0000 H. Peter Anvin 
+  * More cleanup of operand flags/register classes
+Tue May 29 23:57:12 2007 +0000 H. Peter Anvin 
+  * Clean up the existing operand flag definitions, and document
+Tue May 29 21:44:55 2007 +0000 H. Peter Anvin 
+  * Run "make alldeps"
+Thu May 24 22:33:07 2007 +0000 Frank Kotler 
+  * update version number to 0.99.01
+Tue May 15 04:33:43 2007 +0000 H. Peter Anvin 
+  * regs.dat: fix comment
+Fri May 4 18:47:16 2007 +0000 H. Peter Anvin 
+  * 16-bit relocations are standard in ELF64 (at my request, incidentally)
+Fri May 4 02:16:08 2007 +0000 Chuck Crayne 
+  * Addition of elf32 and elf64 output formats.
+Wed May 2 04:21:26 2007 +0000 Chuck Crayne 
+  * Allow '!' to be used in expressions with same meaning as in C.
+Wed May 2 01:59:16 2007 +0000 Chuck Crayne 
+  * Add %IFN and %ELIFN as per RFE #786286
+Mon Apr 30 22:26:58 2007 +0000 Chuck Crayne 
+  * Accept responsibility for support of outelf64.c
+Sun Apr 29 20:57:53 2007 +0000 Chuck Crayne 
+  * Clarify comments about relocation entries.
+Sun Apr 29 00:28:24 2007 +0000 Chuck Crayne 
+  * Allow ELF32 to be invoked either as -f elf or -f elf32
+Sat Apr 28 22:18:04 2007 +0000 Chuck Crayne 
+  * Eliminate shift count warnings when building on 32-bit systems
+Sat Apr 28 06:18:48 2007 +0000 Chuck Crayne 
+  * Initial support for ELF64
+Wed Apr 18 02:27:18 2007 +0000 H. Peter Anvin 
+  * Fix the handling of \324 for computing the length
+Wed Apr 18 02:24:34 2007 +0000 Keith Kanios 
+  * Fixed RDF/2 to comply with "maxbits" use.
+Tue Apr 17 20:23:11 2007 +0000 H. Peter Anvin 
+  * Handle "LOCK as REX.R" for MOV CRx; fix warning for invalid 64-bit regs
+Mon Apr 16 18:16:46 2007 +0000 Keith Kanios 
+  * MEM_OFFSET Instructions Fixed.
+Mon Apr 16 15:46:46 2007 +0000 Keith Kanios 
+  * Fixed 64-bit Mode Segment Selection.
+Mon Apr 16 14:31:54 2007 +0000 Keith Kanios 
+  * Fixed distinction between LOCALSYMBOL/IMMEDIATE for RIP-relative addressing.
+Mon Apr 16 14:05:01 2007 +0000 Keith Kanios 
+  * Fixed long mode MEM_OFFS issue.
+Mon Apr 16 13:54:49 2007 +0000 Keith Kanios 
+  * Filled in all RIP Register Flags.
+Mon Apr 16 05:26:29 2007 +0000 H. Peter Anvin 
+  * More \321 -> \324 for 64-bit instructions
+Mon Apr 16 04:56:06 2007 +0000 Keith Kanios 
+  * Fixed 64-bit offset generation.
+Mon Apr 16 02:39:56 2007 +0000 H. Peter Anvin 
+  * More 64-bit ndisasm fixes.
+Mon Apr 16 02:02:06 2007 +0000 H. Peter Anvin 
+  * Fixes for 64-bit ndisasm.
+Mon Apr 16 01:21:29 2007 +0000 H. Peter Anvin 
+  * Use + instead of * for extension; it feels cleaner with the new meaning.
+Mon Apr 16 01:18:30 2007 +0000 H. Peter Anvin 
+  * Initial 64-bit support for ndisasm.  Still a work in progress.
+Sun Apr 15 23:12:17 2007 +0000 H. Peter Anvin 
+  * Clean up the 64-bitification of regs.dat for 64-bit ndisasm support
+Sun Apr 15 23:10:26 2007 +0000 H. Peter Anvin 
+  * Remove @GCCFLAGS@
+Sun Apr 15 23:09:23 2007 +0000 H. Peter Anvin 
+  * CR8 is not special in any way as far as the assembler is concerned.
+Sun Apr 15 23:03:28 2007 +0000 H. Peter Anvin 
+  * Get rid of @GCCFLAGS@
+Sun Apr 15 22:45:25 2007 +0000 H. Peter Anvin 
+  * Cleaner way to add gcc options
+Sun Apr 15 22:08:30 2007 +0000 Keith Kanios 
+  * Fixed distinction between RIP relative symbols and immediate values.
+Sun Apr 15 05:40:43 2007 +0000 H. Peter Anvin 
+  * Fix the register number for CR7 (it was using the same number as CR15).
+Sun Apr 15 05:32:18 2007 +0000 H. Peter Anvin 
+  * More perl-like idioms for generating regdis.c
+Sun Apr 15 01:37:13 2007 +0000 Keith Kanios 
+  * Fixed regdis.c generation.
+Sat Apr 14 18:54:52 2007 +0000 Keith Kanios 
+  * Added DQ constants for all BITS modes.
+Sat Apr 14 08:03:02 2007 +0000 H. Peter Anvin 
+  * outmacho.c: stylistic cleanups
+Sat Apr 14 03:52:05 2007 +0000 Keith Kanios 
+  * Fixed support for DQ constants in long mode.
+Sat Apr 14 03:44:31 2007 +0000 Keith Kanios 
+  * Hopefully it is actually fixed this time :P
+Sat Apr 14 01:49:07 2007 +0000 Keith Kanios 
+  * Fixed structure initialization issue.
+Sat Apr 14 01:44:35 2007 +0000 Keith Kanios 
+  * Refixed uninitialized data.
+Sat Apr 14 01:40:24 2007 +0000 Keith Kanios 
+  * Fixed uninitialized structure data.
+Sat Apr 14 01:24:14 2007 +0000 Keith Kanios 
+  * c99 printf/fprintf compliance.
+Sat Apr 14 00:46:25 2007 +0000 Keith Kanios 
+  * Placated unreferenced types.
+Sat Apr 14 00:10:59 2007 +0000 Keith Kanios 
+  * c99 printf/fprintf compliance.
+Fri Apr 13 23:09:18 2007 +0000 Keith Kanios 
+  * Added outmacho.* to static makefile.
+Fri Apr 13 22:24:46 2007 +0000 Keith Kanios 
+  * Fixed REGRIP -> RIPREG to match regs.dat.
+Fri Apr 13 22:07:53 2007 +0000 Keith Kanios 
+  * Fixed obj_fwrite() declaration to match "static" definition.
+Fri Apr 13 22:03:24 2007 +0000 Keith Kanios 
+  * Added appropriate "void" prototypes.
+Fri Apr 13 22:00:42 2007 +0000 Keith Kanios 
+  * Replaced str(n)casecmp with more standard str(n)icmp.
+Fri Apr 13 20:06:41 2007 +0000 H. Peter Anvin 
+  * AIf we have config.h, we should actually include it!!
+Fri Apr 13 19:59:20 2007 +0000 H. Peter Anvin 
+  * When compiling with gcc, compile with -W -Wall for maximum warnings.
+Fri Apr 13 19:58:42 2007 +0000 H. Peter Anvin 
+  * Macroize any compiler-specific code; macros defined in "compiler.h"
+Fri Apr 13 16:47:53 2007 +0000 Keith Kanios 
+  * Fixed distinction between char and int8_t data types.
+Fri Apr 13 01:17:45 2007 +0000 Keith Kanios 
+  * Comment "REX.I" should have been "REX.X"
+Fri Apr 13 00:52:54 2007 +0000 Keith Kanios 
+  * Fixed c99 data-types after removal of typedefs.
+Fri Apr 13 00:43:50 2007 +0000 Keith Kanios 
+  * Added Dev-Cpp Makefile
+Fri Apr 13 00:38:29 2007 +0000 Keith Kanios 
+  * *** empty log message ***
+Thu Apr 12 17:58:02 2007 +0000 H. Peter Anvin 
+  * Remove redundant inclusion of <inttypes.h>
+Thu Apr 12 16:54:50 2007 +0000 H. Peter Anvin 
+  * Remove obsolete types; add <inttypes.h> where needed; header fixes
+Thu Apr 12 16:25:58 2007 +0000 H. Peter Anvin 
+  * autogen.sh script to create configure, et al.
+Thu Apr 12 16:23:11 2007 +0000 Keith Kanios 
+  * Fixed c99 support for RDOFF Tools
+Thu Apr 12 16:12:09 2007 +0000 H. Peter Anvin 
+  * outmacho.c: Don't assume __builtin_ctzl exists for gcc < 4
+
+Mon Nov 12 22:05:31 2007 -0800 H. Peter Anvin 
+  * BR 1828866: fix handling of LAR/LSL
+Mon Nov 12 21:57:00 2007 -0800 H. Peter Anvin 
+  * Better (but not *good!*) handling of 64-bit addressing in ndisasm
+Mon Nov 12 21:02:33 2007 -0800 H. Peter Anvin 
+  * Fix disassembly of XCHG
+Mon Nov 12 20:18:33 2007 -0800 H. Peter Anvin 
+  * Test of XCHG
+Mon Nov 12 20:18:05 2007 -0800 H. Peter Anvin 
+  * Fix handling of XCHG in 64-bit mode
+Mon Nov 12 19:36:13 2007 -0800 H. Peter Anvin 
+  * More \321 -> \324 bug fixes
+Mon Nov 12 18:26:31 2007 -0800 H. Peter Anvin 
+  * float.c: all warnings and errors are pass 1 only
+Sat Nov 10 21:55:19 2007 -0800 Charles Crayne 
+  * Update documentation for stack relative directives.
+Sat Nov 10 17:52:23 2007 -0800 Charles Crayne 
+  * Clean up a few more 32-bit bottlenecks
+Fri Nov 9 16:37:41 2007 -0800 Charles Crayne 
+  * Update documentation for stack relative directives
+Fri Nov 9 16:33:54 2007 -0800 Charles Crayne 
+  * Merge branch 'master' of /home/chuck/development/gitnasm/
+Fri Nov 9 16:25:43 2007 -0800 Charles Crayne 
+  * Update documentation for stack relative directives
+Fri Nov 9 14:44:02 2007 -0800 H. Peter Anvin 
+  * Don't combine type and size into a single argument
+Thu Nov 8 22:11:14 2007 -0800 Charles Crayne 
+  * Add flat64 to %stacksize choices
+Thu Nov 8 20:43:22 2007 -0800 H. Peter Anvin 
+  * Fix building under OpenWatcom
+Thu Nov 8 20:29:37 2007 -0800 H. Peter Anvin 
+  * ps2pdf: remove -dOptimize=true
+Thu Nov 8 20:21:41 2007 -0800 H. Peter Anvin 
+  * No binary files left in the source distro; unbreak release script
+Thu Nov 8 20:01:11 2007 -0800 H. Peter Anvin 
+  * BR 1828103: Fix %arg and %local
+Thu Nov 8 19:34:01 2007 -0800 H. Peter Anvin 
+  * nasmlib.c: prefix_name(): use the elements() macro
+Thu Nov 8 19:30:22 2007 -0800 H. Peter Anvin 
+  * Move elements() to nasmlib.h
+Thu Nov 8 19:15:33 2007 -0800 H. Peter Anvin 
+  * constipate the "str" argument to bsi() and bsii()
+Wed Nov 7 19:03:46 2007 -0800 Charles Crayne 
+  * Upgrade RAA functions to hold 64-bit data.
+Tue Nov 6 21:48:12 2007 -0800 Charles Crayne 
+  * Pass 64-bit instruction lengths to back-ends.
+Tue Nov 6 18:27:23 2007 -0800 Charles Crayne 
+  * Prepare for 64-bit instruction lengths
+Mon Nov 5 21:49:49 2007 -0800 Charles Crayne 
+  * Disambiguate error messages
+Mon Nov 5 17:19:32 2007 -0800 Charles Crayne 
+  * Upgrade label functions to 64-bit
+Sun Nov 4 21:10:42 2007 -0800 H. Peter Anvin 
+  * Permit opcode names as labels as long as they are followed by a colon
+Sun Nov 4 15:28:30 2007 -0800 Charles Crayne 
+  * Make warning limit valid for both i386 and x86_64
+Sat Nov 3 22:06:13 2007 -0700 Charles Crayne 
+  * Warn on out of bounds EA displacements
+Thu Nov 1 15:08:27 2007 -0700 H. Peter Anvin 
+  * Treat info files as binary when creating xdoc distro file
+Thu Nov 1 15:07:42 2007 -0700 H. Peter Anvin 
+  * Remove obsolete binary files from the distribution
+Thu Nov 1 14:53:32 2007 -0700 H. Peter Anvin 
+  * Move declarations before statements
+Wed Oct 31 23:37:35 2007 -0700 H. Peter Anvin 
+  * NASM 0.99.06
+Wed Oct 31 23:37:19 2007 -0700 H. Peter Anvin 
+  * Script to tag the tree for release
+Wed Oct 31 10:59:26 2007 -0700 H. Peter Anvin 
+  * Even more "riprel" tests
+Tue Oct 30 01:17:57 2007 -0700 H. Peter Anvin 
+  * floatx.asm: add tests for "rounds up to smallest denorm"
+Tue Oct 30 01:13:27 2007 -0700 H. Peter Anvin 
+  * Run "make alldeps"
+Tue Oct 30 01:13:09 2007 -0700 H. Peter Anvin 
+  * float.c: handle round-up-to-denorm correctly.
+Tue Oct 30 00:59:27 2007 -0700 H. Peter Anvin 
+  * Exhaustive test for 8-bit floating point values
+Mon Oct 29 23:12:47 2007 -0700 H. Peter Anvin 
+  * Clean up the handing of operands in assemble.c
+Mon Oct 29 22:56:08 2007 -0700 H. Peter Anvin 
+  * Don't warn for segmented references
+Mon Oct 29 20:20:12 2007 -0700 H. Peter Anvin 
+  * Use a 32-bit floating-point limb size; support 8-bit float
+Mon Oct 29 18:24:59 2007 -0700 Charles Crayne 
+  * Reduce severity of redundant prefixes from error to warning.
+Sun Oct 28 23:23:24 2007 -0700 H. Peter Anvin 
+  * Test of some addressing modes in 64-bit mode.
+Sun Oct 28 23:21:46 2007 -0700 H. Peter Anvin 
+  * Fix bogus flagging of effective addresses as invalid
+Sun Oct 28 23:10:34 2007 -0700 H. Peter Anvin 
+  * Actually shut up the warning in rdfload.c
+Sun Oct 28 22:04:42 2007 -0700 H. Peter Anvin 
+  * Clean up stealth whitespace
+Sun Oct 28 22:04:00 2007 -0700 H. Peter Anvin 
+  * Fix warning about cast to pointer in rdfload.c
+Sun Oct 28 22:04:00 2007 -0700 H. Peter Anvin 
+  * 64-bit addressing and prefix handling changes
+Sun Oct 28 15:29:54 2007 -0700 Charles Crayne 
+  * Adjust stabs symbol index to match symbol table.
+Fri Oct 26 21:38:02 2007 -0700 H. Peter Anvin 
+  * readnum(): handle prefix-suffix collision like "0h"
+Fri Oct 26 18:49:29 2007 -0700 H. Peter Anvin 
+  * Better handling of platforms which hide "extended" functionality
+Wed Oct 24 15:51:40 2007 -0700 Charles Crayne 
+  * Merge branch 'master' of /home/chuck/development/gitnasm/
+Wed Oct 24 15:30:17 2007 -0700 Charles Crayne 
+  * Update sections about debug info formats
+Wed Oct 24 15:29:51 2007 -0700 H. Peter Anvin 
+  * Fix the handling of floating-point tokens in the preprocessor
+Tue Oct 23 19:28:39 2007 -0700 Charles Crayne 
+  * Fix bugs item #1817677
+Tue Oct 23 00:08:58 2007 -0700 H. Peter Anvin 
+  * Slightly simplify the radix-detection code
+Mon Oct 22 19:48:06 2007 -0700 H. Peter Anvin 
+  * Unbreak particularly tricky hex constants
+Mon Oct 22 19:37:36 2007 -0700 H. Peter Anvin 
+  * Decimal floating point can also start with 0. 0e 0E
+Mon Oct 22 17:34:10 2007 -0700 H. Peter Anvin 
+  * Support binary and octal floating-point
+Mon Oct 22 16:53:48 2007 -0700 H. Peter Anvin 
+  * More consistent handling of radix letters
+Sun Oct 21 15:33:01 2007 -0700 H. Peter Anvin 
+  * float.c: correct exponent capping
+Sun Oct 21 14:21:43 2007 -0700 Charles Crayne 
+  * Clean up elf symbol table section
+Fri Oct 19 18:33:57 2007 -0700 H. Peter Anvin 
+  * Allow $-prefixed hexadecimal FP as an alternative to 0x
+Fri Oct 19 14:43:22 2007 -0700 H. Peter Anvin 
+  * Scripts to remove stealth whitespace
+Fri Oct 19 14:42:29 2007 -0700 H. Peter Anvin 
+  * Formatting: kill off "stealth whitespace"
+Fri Oct 19 14:26:52 2007 -0700 H. Peter Anvin 
+  * test/floatx.asm: fix test case
+Fri Oct 19 14:19:52 2007 -0700 H. Peter Anvin 
+  * uscore.asm: Fix test case
+Fri Oct 19 14:17:51 2007 -0700 H. Peter Anvin 
+  * float.c: mark read_exponent() static
+Fri Oct 19 14:10:35 2007 -0700 H. Peter Anvin 
+  * Don't confuse suffixed hexadecimal with floating-point
+Fri Oct 19 13:17:24 2007 -0700 H. Peter Anvin 
+  * Anchor filename locations in .gitignore
+Fri Oct 19 13:16:51 2007 -0700 H. Peter Anvin 
+  * test/Makefile: Use -Ox instead of -O999
+Fri Oct 19 13:14:06 2007 -0700 H. Peter Anvin 
+  * Test of underscored constants
+Fri Oct 19 13:10:46 2007 -0700 H. Peter Anvin 
+  * Allow underscores in numbers; better detection of FP
+Fri Oct 19 10:52:31 2007 -0700 H. Peter Anvin 
+  * Modernize nasm.spec.in and make it closer to the Fedora version
+Thu Oct 18 23:33:06 2007 -0700 Charles Crayne 
+  * Suppress datarootdir warnings from configure
+Thu Oct 18 21:17:20 2007 -0700 Charles Crayne 
+  * Suppress signedness warnings in disassembler
+Thu Oct 18 19:14:08 2007 -0700 H. Peter Anvin 
+  * Cleaner solution for MinGW handling of __STRICT_ANSI__
+Thu Oct 18 19:14:08 2007 -0700 H. Peter Anvin 
+  * configure: Undefine __STRICT_ANSI__ for mingw's benefit
+Thu Oct 18 19:14:07 2007 -0700 H. Peter Anvin 
+  * Fix invocation of readnum()
+Thu Oct 18 19:02:42 2007 -0700 Charles Crayne 
+  * Suppress a few signedness warnings
+Thu Oct 18 17:04:10 2007 -0700 root 
+  * Avoid unnecessary warning on redefinition of section (bug 801180)
+Wed Oct 17 17:55:45 2007 -0700 Charles Crayne 
+  * Generate stabs entries for any executable section
+Tue Oct 16 22:59:09 2007 -0700 H. Peter Anvin 
+  * NASM 0.99.05
+Tue Oct 16 15:46:04 2007 -0700 H. Peter Anvin 
+  * Tests of obscenely large exponents
+Tue Oct 16 14:42:32 2007 -0700 H. Peter Anvin 
+  * Comma-separate contents of __FLOAT__
+Tue Oct 16 14:40:27 2007 -0700 H. Peter Anvin 
+  * Implement floating-point option control directive
+Tue Oct 16 11:48:07 2007 -0700 H. Peter Anvin 
+  * Floating-point warning fixes; fix round-to-overflow
+Tue Oct 16 11:32:58 2007 -0700 H. Peter Anvin 
+  * Handle rounding of denorms correctly; make fp overflow a warning
+Tue Oct 16 10:35:02 2007 -0700 H. Peter Anvin 
+  * Additional entries for .gitignore
+Tue Oct 16 10:32:57 2007 -0700 H. Peter Anvin 
+  * Refactor floating-point formatting code; fix 80-bit denorms
+Tue Oct 16 10:31:16 2007 -0700 H. Peter Anvin 
+  * Add 1.5 as a test case: representative of an exact fraction
+Mon Oct 15 20:06:06 2007 -0700 H. Peter Anvin 
+  * Recognize 'd', 't' and 'y' as radix suffixes
+Mon Oct 15 19:53:10 2007 -0700 H. Peter Anvin 
+  * Fix FISTTP opcodes (BR 689695)
+Mon Oct 15 19:46:32 2007 -0700 H. Peter Anvin 
+  * New floating-point conversion routines
+Mon Oct 15 17:48:43 2007 -0700 H. Peter Anvin 
+  * Add testnos3 from the gdtoa package (floating-point test)
+Sat Oct 13 23:19:21 2007 -0700 H. Peter Anvin 
+  * .gitignore file doesn't need to be in the release file
+Sat Oct 13 23:17:41 2007 -0700 H. Peter Anvin 
+  * Add .gitignore file so "git status" produces something sane
+Sat Oct 13 23:12:46 2007 -0700 H. Peter Anvin 
+  * autoconf: drop AC_USE_SYSTEM_EXTENSIONS to support autoconf 2.59
+Sat Oct 13 07:09:22 2007 -0700 Keith Kanios 
+  * Fix 32-bit types in preproc.c and eval.c
+Thu Oct 11 20:32:33 2007 -0700 Charles Crayne 
+  * Must define types before using them
+Thu Oct 11 13:42:09 2007 -0700 H. Peter Anvin 
+  * preproc.c: move smacro define/undef to separate functions
+Thu Oct 11 13:38:38 2007 -0700 H. Peter Anvin 
+  * preproc.c: PP_DEFINE and PP_XDEFINE are case-sensitive
+Thu Oct 11 12:52:03 2007 -0700 H. Peter Anvin 
+  * preproc.c: normalize the handling of case sensitivity
+Thu Oct 11 12:51:06 2007 -0700 H. Peter Anvin 
+  * Define macros necessary for <inttypes.h> on C++
+Thu Oct 11 10:12:58 2007 -0700 H. Peter Anvin 
+  * More "bool" fixes
+Thu Oct 11 10:11:57 2007 -0700 H. Peter Anvin 
+  * preproc.c: allow 64-bit repeat counts
+Thu Oct 11 10:06:19 2007 -0700 H. Peter Anvin 
+  * preproc.c: For an SMacro, in_progress really is a boolean (no %rep)
+Thu Oct 11 00:05:57 2007 -0700 H. Peter Anvin 
+  * Additional uses of bool and enum
+Thu Oct 11 00:05:57 2007 -0700 H. Peter Anvin 
+  * preproc.c: MMacro.in_progress is not a boolean
+Wed Oct 10 18:07:51 2007 -0700 H. Peter Anvin 
+  * saa_fread/fwrite: when seeking, must set rwptr as well
+Wed Oct 10 14:58:45 2007 -0700 H. Peter Anvin 
+  * Use the compiler-provided booleans if available, otherwise emulate
+Wed Oct 10 14:55:14 2007 -0700 H. Peter Anvin 
+  * owlinux.mak: don't clean things we won't be able to
+Wed Oct 10 14:29:53 2007 -0700 H. Peter Anvin 
+  * configure.in: looks like we need autoconf 2.61 :(
+Wed Oct 10 14:06:59 2007 -0700 H. Peter Anvin 
+  * Create option -Ox to tell NASM to do unlimited passes
+Mon Oct 8 19:26:57 2007 -0700 H. Peter Anvin 
+  * Revert "floatb.asm: fix broken testcase"
+Mon Oct 8 18:39:24 2007 -0700 H. Peter Anvin 
+  * floatb.asm: fix broken testcase
+Mon Oct 8 12:41:00 2007 -0700 H. Peter Anvin 
+  * saa_rstruct: fix overrun check
+Mon Oct 8 12:12:23 2007 -0700 H. Peter Anvin 
+  * Add Frank's floattest.asm test file
+Sun Oct 7 21:13:14 2007 -0700 H. Peter Anvin 
+  * saa_fpwrite: initializing "len" should be part of the loop
+Sun Oct 7 18:46:57 2007 -0700 Charles Crayne 
+  * Fix infinite loop in function saa_fpwrite
+Fri Oct 5 17:44:16 2007 -0700 H. Peter Anvin 
+  * zerobyte.asm: use a real instruction to avoid confusing ndisasm
+Fri Oct 5 17:42:31 2007 -0700 H. Peter Anvin 
+  * zerobyte.asm: add test cases for non-initial \170 uses
+Fri Oct 5 17:29:01 2007 -0700 H. Peter Anvin 
+  * Check in the proper zerobyte test
+Fri Oct 5 17:04:32 2007 -0700 H. Peter Anvin 
+  * Emit REX prefix before literal zero (\170)
+Fri Oct 5 17:01:15 2007 -0700 H. Peter Anvin 
+  * LICENSE: Break long line
+Fri Oct 5 14:36:03 2007 -0700 H. Peter Anvin 
+  * Add test for problematic floats
+Thu Oct 4 23:51:08 2007 -0700 H. Peter Anvin 
+  * floatx.asm: add Inf and NaN to the boundary condition tests
+Thu Oct 4 23:09:19 2007 -0700 H. Peter Anvin 
+  * floatx.asm: add specific tests for exponent boundary conditions
+Thu Oct 4 22:51:08 2007 -0700 H. Peter Anvin 
+  * float.c: correct the exponent
+Thu Oct 4 15:18:23 2007 -0700 H. Peter Anvin 
+  * Additional rules in test/Makefile
+Thu Oct 4 13:42:56 2007 -0700 H. Peter Anvin 
+  * Rewrite the handling of SAA's to allow random access
+Wed Oct 3 21:30:57 2007 -0700 H. Peter Anvin 
+  * Change cloc_t to struct location, and reorder the members
+Wed Oct 3 21:24:51 2007 -0700 H. Peter Anvin 
+  * BR 1352920: change loc_t -> cloc_t
+Wed Oct 3 21:22:16 2007 -0700 H. Peter Anvin 
+  * BR 1352920: Handle upper case %line
+Wed Oct 3 17:40:12 2007 -0700 H. Peter Anvin 
+  * Use autoconf to request feature macros
+Tue Oct 2 22:04:15 2007 -0700 H. Peter Anvin 
+  * preproc.c: constipation
+Tue Oct 2 21:57:27 2007 -0700 H. Peter Anvin 
+  * make alldeps
+Tue Oct 2 21:53:51 2007 -0700 H. Peter Anvin 
+  * Portability fixes
+Tue Oct 2 21:13:18 2007 -0700 H. Peter Anvin 
+  * Run "make alldeps".
+Tue Oct 2 17:40:00 2007 -0700 H. Peter Anvin 
+  * Use the crc64 we already use as the perfect hash function prehash
+Tue Oct 2 15:09:33 2007 -0700 H. Peter Anvin 
+  * insns.dat: add systematic names for the hinting NOPs (0F18-0F1F)
+Mon Oct 1 11:28:32 2007 -0700 H. Peter Anvin 
+  * Unspecified files are null strings, not null pointers
+Mon Oct 1 11:26:31 2007 -0700 H. Peter Anvin 
+  * Check for the most basic filename overlaps
+Sun Sep 30 22:15:36 2007 -0700 Charles Crayne 
+  * modified:   nasm.1 to add newer command line options
+Fri Sep 28 21:27:41 2007 -0700 Charles Crayne 
+  * Merge branch 'master' of git+ssh://ccrayne@repo.or.cz/srv/git/nasm
+Fri Sep 28 20:17:12 2007 -0700 H. Peter Anvin 
+  * configure.in: AC_SUBST_FILE should have been AC_SUBST
+Fri Sep 28 17:17:20 2007 -0700 H. Peter Anvin 
+  * Unbreak relative references to immediate addresses
+Fri Sep 28 15:16:47 2007 -0700 Charles Crayne 
+  * Merge branch 'master' of git+ssh://ccrayne@repo.or.cz/srv/git/nasm
+Fri Sep 28 12:01:55 2007 -0700 H. Peter Anvin 
+  * lib/vsnprintf.c: correct boundary conditions
+Fri Sep 28 10:50:20 2007 -0700 H. Peter Anvin 
+  * Add substitutes for snprintf() and vsnprintf()
+Fri Sep 28 02:03:41 2007 -0400 Frank Kotler 
+  * Merge branch 'master' of git+ssh://fbkotler@repo.or.cz/srv/git/nasm
+Thu Sep 27 21:35:04 2007 -0700 H. Peter Anvin 
+  * Exclude config.h from the dependency list for the canned makefiles
+Thu Sep 27 21:12:17 2007 -0700 H. Peter Anvin 
+  * version.pl: Add support for daily snapshot releases
+Thu Sep 27 19:46:55 2007 -0700 H. Peter Anvin 
+  * Add Makefile for Linux -> DOS, Win32, OS/2 using OpenWatcom
+Wed Sep 26 19:57:07 2007 -0700 H. Peter Anvin 
+  * Add Makefile for OpenWatcom (DOS, OS/2 or Win32 output)
+Wed Sep 26 17:00:18 2007 -0700 H. Peter Anvin 
+  * Test for various addressing modes in 64-bit mode
+Wed Sep 26 15:19:28 2007 -0700 H. Peter Anvin 
+  * nasm option reshuffling, -E -> -Z
+Tue Sep 25 23:57:21 2007 -0400 Frank Kotler 
+  * Version 0.99.04
+Tue Sep 25 20:36:45 2007 -0700 H. Peter Anvin 
+  * nasmdoc: corrections on 64-bit immediates/displacements
+Tue Sep 25 16:02:21 2007 -0700 H. Peter Anvin 
+  * nasmdoc: shorten lines which are too long
+Tue Sep 25 16:01:07 2007 -0700 H. Peter Anvin 
+  * Document NASM behaviour for 64-bit immediates and displacements
+Tue Sep 25 15:44:40 2007 -0700 H. Peter Anvin 
+  * test/movimm.asm: add optimizable forms
+Tue Sep 25 15:41:19 2007 -0700 H. Peter Anvin 
+  * assemble.c: clean up whitespace
+Tue Sep 25 15:40:36 2007 -0700 H. Peter Anvin 
+  * Correct the handling of "MOV" with immediate in 64-bit mode
+Tue Sep 25 15:39:42 2007 -0700 H. Peter Anvin 
+  * Test of immediate handling on 64-bit mode
+Tue Sep 25 14:27:34 2007 -0700 H. Peter Anvin 
+  * Add nasm_zalloc() to nasmlib.c
+Tue Sep 25 14:26:03 2007 -0700 H. Peter Anvin 
+  * Fix BR 1490407: size of the second operand of LAR/LSL
+Tue Sep 25 14:11:29 2007 -0700 H. Peter Anvin 
+  * Fix BR 1490407: size of the second operand of LAR/LSL
+Tue Sep 25 13:34:55 2007 -0700 H. Peter Anvin 
+  * Makefile.in: make "make install" create directories
+Tue Sep 25 08:48:37 2007 -0700 H. Peter Anvin 
+  * Fix BR 1445441: uninitialized use of "error_file"
+Mon Sep 24 21:33:17 2007 -0700 H. Peter Anvin 
+  * preproc.c: fix the loop in %undef
+Mon Sep 24 20:53:48 2007 -0700 H. Peter Anvin 
+  * float.c: clear off uninitialized warning
+Mon Sep 24 17:02:41 2007 -0700 H. Peter Anvin 
+  * outcoff: set the "virtual size field" to zero (BR 1351586)
+Mon Sep 24 15:56:02 2007 -0700 H. Peter Anvin 
+  * insns.dat: SMINT - mark ND, DMINT - fix opcode
+Mon Sep 24 15:55:20 2007 -0700 H. Peter Anvin 
+  * 0F0F is a 3Dnow! prefix; remove from prefix list
+Mon Sep 24 15:48:09 2007 -0700 H. Peter Anvin 
+  * Additional compaction missed by script
+Mon Sep 24 15:42:53 2007 -0700 H. Peter Anvin 
+  * insns.dat: machine-generated compaction mmx/xmmreg,mem -> mmx/xmmrm
+Mon Sep 24 13:54:00 2007 -0700 H. Peter Anvin 
+  * nasmdoc: grammar fix
+Mon Sep 24 13:44:02 2007 -0700 H. Peter Anvin 
+  * nasmdoc: remove stray periods
+Mon Sep 24 13:42:09 2007 -0700 H. Peter Anvin 
+  * test/Makefile: make a bit more useful
+Mon Sep 24 13:41:58 2007 -0700 H. Peter Anvin 
+  * Implement the -MG option (SF RFE 1564264)
+Mon Sep 24 12:52:09 2007 -0700 H. Peter Anvin 
+  * nasmdoc: clarify __float*__ example
+Mon Sep 24 12:44:38 2007 -0700 H. Peter Anvin 
+  * nasmdoc: document the __float*__ operators
+Mon Sep 24 12:30:54 2007 -0700 H. Peter Anvin 
+  * Support __float*__ for floating-point numbers in expressions
+Mon Sep 24 10:51:07 2007 -0700 H. Peter Anvin 
+  * eval.c: replace sequence of ifs with switch
+Mon Sep 24 10:50:23 2007 -0700 H. Peter Anvin 
+  * tokhash: allow a bit smarter pattern matching
+Sat Sep 22 22:35:28 2007 -0700 H. Peter Anvin 
+  * Implement INVLPGA according to the documentation
+Sat Sep 22 22:02:34 2007 -0700 H. Peter Anvin 
+  * Reformat insns.dat to uniform column width
+Sat Sep 22 21:50:03 2007 -0700 H. Peter Anvin 
+  * Simple test for 0x67 prefixes
+Sat Sep 22 21:49:51 2007 -0700 H. Peter Anvin 
+  * Auto-generate 0x67 prefixes without the need for \30x codes
+Sat Sep 22 21:47:13 2007 -0700 H. Peter Anvin 
+  * Make test/Makefile a bit more useful
+Sat Sep 22 21:29:41 2007 -0700 H. Peter Anvin 
+  * Add TY_OWORD for "DO" output
+Sat Sep 22 19:52:11 2007 -0700 H. Peter Anvin 
+  * LDDQU needs \301 (BR 1103549)
+Sat Sep 22 19:51:13 2007 -0700 H. Peter Anvin 
+  * RDTSCP and INVLPGA aren't 64-bit specific
+Sat Sep 22 19:40:37 2007 -0700 H. Peter Anvin 
+  * Cyrix GX1 instructions: BBx_RESET, CPU_READ, CPU_WRITE
+Sat Sep 22 19:28:14 2007 -0700 H. Peter Anvin 
+  * Centaur XSHA1, XSHA256, MONTMUL
+Sat Sep 22 19:20:56 2007 -0700 H. Peter Anvin 
+  * Implement Centaur's XCRYPT instructions
+Sat Sep 22 19:13:05 2007 -0700 H. Peter Anvin 
+  * Add Geode LX (AMD's Cyrix-derived core) instructions
+Sat Sep 22 19:05:11 2007 -0700 H. Peter Anvin 
+  * Add the GETSEC instruction for Intel SMX
+Sat Sep 22 18:59:18 2007 -0700 H. Peter Anvin 
+  * Add the AMD SSE4a and LZCNT instructions
+Sat Sep 22 18:23:20 2007 -0700 H. Peter Anvin 
+  * Tag UMOV as ND (no disassembly) to avoid collision
+Sat Sep 22 18:20:49 2007 -0700 H. Peter Anvin 
+  * Disallow optimizing by less than 5 passes.
+Sat Sep 22 17:45:45 2007 -0700 H. Peter Anvin 
+  * BR 1783117: Document that %+ needs a space after it, and fix crash
+Sat Sep 22 16:44:56 2007 -0700 H. Peter Anvin 
+  * nasm.spec.in: minor fixes
+Sat Sep 22 16:38:25 2007 -0700 H. Peter Anvin 
+  * release script: handle stricter CLI parsing for "git tag"
+Sat Sep 22 16:35:11 2007 -0700 H. Peter Anvin 
+  * Update nasm.spec.in and make it handle rc releases
+Sat Sep 22 16:19:19 2007 -0700 H. Peter Anvin 
+  * version.pl: support version numbers of the form X.Y.ZrcW
+Thu Sep 20 21:33:43 2007 -0700 Charles Crayne 
+  * Merge branch 'master' of git+ssh://ccrayne@repo.or.cz/srv/git/nasm
+Thu Sep 20 21:12:33 2007 -0700 Charles Crayne 
+  * 	modified:   misc/release to fix bug in removing .git
+Wed Sep 19 21:41:43 2007 -0700 H. Peter Anvin 
+  * Merge branch 'master' of git+ssh://repo.or.cz/srv/git/nasm
+Wed Sep 19 21:41:27 2007 -0700 H. Peter Anvin 
+  * Update manual pages
+Wed Sep 19 21:41:02 2007 -0700 H. Peter Anvin 
+  * Remove limit on number of sync points
+Wed Sep 19 21:40:37 2007 -0700 H. Peter Anvin 
+  * Make nasm_malloc() et al available from inside ndisasm
+Wed Sep 19 21:07:32 2007 -0400 Frank Kotler 
+  * Version 0.99.03
+Wed Sep 19 21:06:59 2007 -0400 Frank Kotler 
+  * Merge branch 'master' of git+ssh://fbkotler@repo.or.cz/srv/git/nasm
+Wed Sep 19 16:22:03 2007 -0700 H. Peter Anvin 
+  * Merge commit 'origin/sse5'
+Wed Sep 19 16:15:22 2007 -0700 H. Peter Anvin 
+  * test/Makefile: make a bit more useful
+Tue Sep 18 22:54:40 2007 -0700 H. Peter Anvin 
+  * Slightly optimize the interface to nasm_token_hash()
+Wed Sep 19 01:34:55 2007 -0400 Frank Kotler 
+  * Merge branch 'master' of git+ssh://fbkotler@repo.or.cz/srv/git/nasm
+Tue Sep 18 22:23:42 2007 -0700 H. Peter Anvin 
+  * Merge commit 'origin/master' into sse5
+Tue Sep 18 22:22:49 2007 -0700 H. Peter Anvin 
+  * elf64: fix 32-bit truncations
+Tue Sep 18 22:08:04 2007 -0700 H. Peter Anvin 
+  * Document Infinity and NaN
+Tue Sep 18 21:55:56 2007 -0700 H. Peter Anvin 
+  * Support generating NaNs and infinities
+Tue Sep 18 19:12:26 2007 -0700 H. Peter Anvin 
+  * Update documentation
+Tue Sep 18 18:37:36 2007 -0700 H. Peter Anvin 
+  * Simple test for hexadecimal floating-point numbers
+Tue Sep 18 18:33:17 2007 -0700 H. Peter Anvin 
+  * Fix error-reporting in hexadecimal floating-point numbers
+Tue Sep 18 18:31:26 2007 -0700 H. Peter Anvin 
+  * Support C99-style hexadecimal floating point.
+Tue Sep 18 17:50:34 2007 -0700 H. Peter Anvin 
+  * Unify all standard IEEE floating-point formats; add 128-bit
+Tue Sep 18 17:49:09 2007 -0700 H. Peter Anvin 
+  * Fix handling of DO; support unary + for floating-point numbers
+Tue Sep 18 16:39:03 2007 -0700 H. Peter Anvin 
+  * Support 16-bit IEEE floating point; used in SSE5
+Tue Sep 18 15:43:40 2007 -0700 H. Peter Anvin 
+  * Merge commit 'origin/master' into sse5
+Tue Sep 18 15:43:08 2007 -0700 H. Peter Anvin 
+  * Add NOP with argument to the instruction list
+Tue Sep 18 15:24:38 2007 -0700 H. Peter Anvin 
+  * Remove 0FC2 from list of instruction prefixes
+Tue Sep 18 15:08:20 2007 -0700 H. Peter Anvin 
+  * Speed up the disassembler by allowing prefixed instruction tables
+Tue Sep 18 13:45:12 2007 -0700 H. Peter Anvin 
+  * Document oword, do and reso
+Tue Sep 18 13:01:32 2007 -0700 H. Peter Anvin 
+  * Implement "oword" (128 bits) as a first-class size
+Tue Sep 18 12:38:07 2007 -0700 H. Peter Anvin 
+  * Change the token prehash function for better convergence
+Tue Sep 18 12:23:21 2007 -0700 H. Peter Anvin 
+  * SSE5 instruction table
+Tue Sep 18 02:06:09 2007 -0400 Frank Kotler 
+  * add "const" to output/outdbg.c
+Mon Sep 17 18:45:44 2007 -0700 H. Peter Anvin 
+  * Disassembler support for SSE5 instructions
+Mon Sep 17 17:27:46 2007 -0700 H. Peter Anvin 
+  * insns.dat: All SSE5 instructions are AMD
+Mon Sep 17 17:25:27 2007 -0700 H. Peter Anvin 
+  * Actually generate SSE5 instructions
+Mon Sep 17 16:55:04 2007 -0700 H. Peter Anvin 
+  * Initial support for generating DREX suffixes
+Mon Sep 17 16:31:33 2007 -0700 H. Peter Anvin 
+  * Fix a few instances of missing renumbers
+Mon Sep 17 16:20:45 2007 -0700 H. Peter Anvin 
+  * Enable IF_AR3
+Mon Sep 17 15:49:53 2007 -0700 H. Peter Anvin 
+  * Merge commit 'origin/master' into sse5
+Mon Sep 17 15:49:30 2007 -0700 H. Peter Anvin 
+  * Initial support for four arguments per instruction
+Mon Sep 17 15:48:32 2007 -0700 H. Peter Anvin 
+  * CLFLUSH: Neither an x64 instruction nor AMD
+Mon Sep 17 13:56:26 2007 -0700 H. Peter Anvin 
+  * Sort dependency lists
+Mon Sep 17 13:53:14 2007 -0700 H. Peter Anvin 
+  * Cleaner way to handle MSVC's _snprintf() underscore damage
+Mon Sep 17 13:19:25 2007 -0700 H. Peter Anvin 
+  * test/r13.asm: test special-casing of rbp and r13 in 64-bit mode
+Mon Sep 17 13:03:33 2007 -0700 H. Peter Anvin 
+  * Additional documentation for 64-bit programming
+Sun Sep 16 22:27:07 2007 -0700 H. Peter Anvin 
+  * INSTALL: MSVC++ compilation instructions
+Sun Sep 16 22:17:29 2007 -0700 H. Peter Anvin 
+  * make alldeps: change Mkfiles/Makefile.* to Mkfiles/*.mak
+Sun Sep 16 22:16:24 2007 -0700 H. Peter Anvin 
+  * Fix Makefile for MSVC++ 2005, delete obsolete Makefiles
+Sun Sep 16 22:15:34 2007 -0700 H. Peter Anvin 
+  * Minor fixes needed to compile with MSVC++ 2005
+Sun Sep 16 18:35:02 2007 -0700 H. Peter Anvin 
+  * Run "make alldeps"
+Sun Sep 16 18:04:57 2007 -0700 H. Peter Anvin 
+  * Switch the preprocessor over to using the hash table library
+Sun Sep 16 17:53:17 2007 -0700 H. Peter Anvin 
+  * Fix the handling of local labels
+Fri Sep 14 18:36:01 2007 -0700 H. Peter Anvin 
+  * preproc.c: remove unnecessary int64_t
+Fri Sep 14 18:03:29 2007 -0700 H. Peter Anvin 
+  * Use the new hash table function library to store labels
+Fri Sep 14 09:24:38 2007 -0700 H. Peter Anvin 
+  * Define a proper hash table library
+Thu Sep 13 18:13:20 2007 -0700 H. Peter Anvin 
+  * Simple performance benchmarks: label, macro and token lookups
+Thu Sep 13 12:25:32 2007 -0700 H. Peter Anvin 
+  * release script: fix final cleanup
+Thu Sep 13 12:22:00 2007 -0700 H. Peter Anvin 
+  * Modify release script for a git-centric world
+Thu Sep 13 11:06:42 2007 -0700 H. Peter Anvin 
+  * pptok.c: don't insist on C99 compiler behaviour
+Wed Sep 12 22:02:06 2007 -0700 H. Peter Anvin 
+  * Fix literal F2 and F3 prefixes
+Wed Sep 12 21:58:51 2007 -0700 H. Peter Anvin 
+  * Add (untested!) SSSE3, SSE4.1, SSE4.2 instructions
+Wed Sep 12 21:06:36 2007 -0700 H. Peter Anvin 
+  * Add support for Tejas New Instructions (SSSE3)
+Wed Sep 12 21:05:06 2007 -0700 H. Peter Anvin 
+  * Remove $Id$ tags (useless with git)
+Wed Sep 12 21:04:58 2007 -0700 H. Peter Anvin 
+  * Use rm32 operands for VMREAD/VMWRITE
+Wed Sep 12 21:04:51 2007 -0700 H. Peter Anvin 
+  * Macros for SSSE3/SSE4 instruction sets
+Wed Sep 12 21:04:39 2007 -0700 H. Peter Anvin 
+  * Support r/m operands for non-integer types
+Wed Sep 12 20:27:41 2007 -0700 H. Peter Anvin 
+  * Use enumerations where practical to ease debugging
+Wed Sep 12 17:02:55 2007 +0000 H. Peter Anvin 
+  * pptok.c: quick-and-dirty downcasing during prehashing
+Wed Sep 12 16:55:57 2007 +0000 H. Peter Anvin 
+  * phash: Tell the user when the graph is OK
+Wed Sep 12 05:18:20 2007 +0000 H. Peter Anvin 
+  * pptok.c: handle holes in the pp_directives array
+Wed Sep 12 04:20:08 2007 +0000 H. Peter Anvin 
+  * preproc.c: adjust whitespace
+Wed Sep 12 04:18:37 2007 +0000 H. Peter Anvin 
+  * More automation in the preprocessor conditionals handling
+Wed Sep 12 02:13:39 2007 +0000 H. Peter Anvin 
+  * pptok.c: fix spacing
+Wed Sep 12 02:12:07 2007 +0000 H. Peter Anvin 
+  * Generate automatically correct tests for %if and %elif
+Wed Sep 12 01:34:19 2007 +0000 H. Peter Anvin 
+  * Run "make alldeps"; add dependencies missing from the previous checkin
+Wed Sep 12 01:29:43 2007 +0000 H. Peter Anvin 
+  * Use a perfect hash to look up preprocessor directives
+Wed Sep 12 01:27:53 2007 +0000 H. Peter Anvin 
+  * phash: Be a bit more aggressive about trying to make a small hash
+Wed Sep 12 00:22:29 2007 +0000 H. Peter Anvin 
+  * Add RCXZ as a known preprocessor condition
+Tue Sep 11 23:57:23 2007 +0000 H. Peter Anvin 
+  * doc: add some cross-references
+Tue Sep 11 23:52:01 2007 +0000 H. Peter Anvin 
+  * Feeble attempt at updating the documentation; remove Appendix B
+Tue Sep 11 22:44:03 2007 +0000 H. Peter Anvin 
+  * Handle instructions which can have both REX.W and OSP
+Tue Sep 11 22:14:18 2007 +0000 H. Peter Anvin 
+  * Use enums to make debugging easier
+Tue Sep 11 22:13:17 2007 +0000 H. Peter Anvin 
+  * ndisasm: handle \366 codes, prefer unprefixed instructions
+Tue Sep 11 22:00:34 2007 +0000 H. Peter Anvin 
+  * Simplify tokens.dat slightly
+Tue Sep 11 04:26:44 2007 +0000 H. Peter Anvin 
+  * Quiet gcc warning about uninitialized variables
+Tue Sep 11 04:16:57 2007 +0000 H. Peter Anvin 
+  * Make the big instruction arrays "const"
+Mon Sep 10 23:32:05 2007 +0000 H. Peter Anvin 
+  * Use an actual enum for the opcode
+Mon Sep 10 23:30:21 2007 +0000 H. Peter Anvin 
+  * Fix order of token arguments
+Mon Sep 10 18:59:26 2007 +0000 H. Peter Anvin 
+  * assemble.c: correct special handing of ESP/RSP
+Mon Sep 10 18:59:01 2007 +0000 H. Peter Anvin 
+  * tokhash: correct duplicate-token test
+Mon Sep 10 18:58:40 2007 +0000 H. Peter Anvin 
+  * tokhash: adjust table types to reduce size
+Mon Sep 10 18:55:52 2007 +0000 H. Peter Anvin 
+  * Fix the MMXREG and XMMREG flags definitions.
+Wed Sep 5 06:48:38 2007 +0000 H. Peter Anvin 
+  * nasm.spec.in: Copyright -> License
+Wed Sep 5 06:40:51 2007 +0000 H. Peter Anvin 
+  * Fix "make tar"; useful for RPM testing
+Wed Sep 5 06:24:43 2007 +0000 H. Peter Anvin 
+  * Remove obsolete Serial: construct; we shouldn't need it anyway.
+Tue Sep 4 01:29:43 2007 +0000 Chuck Crayne 
+  * Provide 64-bit support for ORG directive
+Sun Sep 2 16:37:03 2007 +0000 H. Peter Anvin 
+  * Fix some MMX/SSE irregularities which interact with the 64-bit support
+Sun Sep 2 14:46:00 2007 +0000 H. Peter Anvin 
+  * phash.ph: yet another attempt at getting Perl to behave, arithmetically
+Sun Sep 2 06:23:29 2007 +0000 H. Peter Anvin 
+  * Simple 64-bit org test
+Sun Sep 2 06:20:15 2007 +0000 H. Peter Anvin 
+  * phash.ph: remove some stale code
+Sun Sep 2 01:00:34 2007 +0000 Chuck Crayne 
+  * Force use of integer values for generating hash keys.
+Fri Aug 31 18:10:23 2007 +0000 H. Peter Anvin 
+  * phash: don't rely on the build platform Perl version of rand()
+Fri Aug 31 07:31:51 2007 +0000 H. Peter Anvin 
+  * tokhash.pl: formatting changes for readability
+Fri Aug 31 07:23:31 2007 +0000 H. Peter Anvin 
+  * tokhash: Speed up the rejection of unhashed values
+Fri Aug 31 06:06:17 2007 +0000 H. Peter Anvin 
+  * tokhash.pl: "ix" should have the same width as the "hash" arrays
+Fri Aug 31 00:28:35 2007 +0000 H. Peter Anvin 
+  * Add "do not edit" comment to tokhash.c
+Fri Aug 31 00:23:40 2007 +0000 H. Peter Anvin 
+  * Make the token hash a bit smaller by using 16-bit hash tables
+Fri Aug 31 00:16:10 2007 +0000 H. Peter Anvin 
+  * Minor cleanup; remove duplication of names.c
+Thu Aug 30 23:42:39 2007 +0000 H. Peter Anvin 
+  * phash.ph: use a bipartite graph to reduce the storage requirements
+Thu Aug 30 22:35:34 2007 +0000 H. Peter Anvin 
+  * Finishing touches on perfect hash tokenizer; actually turn the thing on
+Thu Aug 30 21:50:20 2007 +0000 H. Peter Anvin 
+  * Makefile rule for tokhash.c
+Thu Aug 30 21:47:46 2007 +0000 H. Peter Anvin 
+  * tokens.dat: Data file containing alphanumeric tokens not in other .dats
+Thu Aug 30 21:45:56 2007 +0000 H. Peter Anvin 
+  * Generate a perfect hash for the token parser
+Thu Aug 30 21:40:08 2007 +0000 H. Peter Anvin 
+  * Fix bugs in repeated suffix handling, which led to missing r8d/r8w/r8d
+Thu Aug 30 21:39:37 2007 +0000 H. Peter Anvin 
+  * phash.ph: more powerful prehashing
+Thu Aug 30 20:15:25 2007 +0000 H. Peter Anvin 
+  * Make the perfect hash generator an includable module
+Wed Aug 29 20:30:31 2007 +0000 H. Peter Anvin 
+  * Correct the logic for recording fs: and gs: overrides.
+Wed Aug 29 18:20:19 2007 +0000 H. Peter Anvin 
+  * Generate R_X86_64_64 relocations in elf64 output
+Wed Aug 29 17:24:03 2007 +0000 H. Peter Anvin 
+  * Add README file
+Wed Aug 29 17:20:09 2007 +0000 H. Peter Anvin 
+  * Create a Perl library directory, and add the Graph module to it
+Wed Aug 29 17:05:17 2007 +0000 H. Peter Anvin 
+  * Perfect hash generator, as a perl script
+Wed Aug 29 16:41:43 2007 +0000 H. Peter Anvin 
+  * Use standard macro for the default directive
+Wed Aug 29 16:40:26 2007 +0000 H. Peter Anvin 
+  * Add standard macro for default directive
+Wed Aug 29 16:38:47 2007 +0000 H. Peter Anvin 
+  * More test cases for rel and abs addressing
+Wed Aug 29 16:38:05 2007 +0000 H. Peter Anvin 
+  * Add default directive
+Wed Aug 29 16:25:46 2007 +0000 H. Peter Anvin 
+  * nasmlib: add bsii() case-insensitive version of bsi()
+Wed Aug 29 15:49:53 2007 +0000 H. Peter Anvin 
+  * Add test cases for IP-relative addressing
+Wed Aug 29 15:19:19 2007 +0000 H. Peter Anvin 
+  * Suppress IP-relative only for fs: and gs: overrides
+Tue Aug 28 23:06:00 2007 +0000 H. Peter Anvin 
+  * Implement REL/ABS modifiers
+Sun Aug 26 05:51:39 2007 +0000 Frank Kotler 
+  * attempt to make static makefiles aware of outelf32/outelf64
+Sun Aug 26 05:48:54 2007 +0000 Frank Kotler 
+  * add nasm_strsep to nasmlib, for output/outmacho.c - strtok doesn't work
+Sun Aug 26 05:41:33 2007 +0000 Frank Kotler 
+  * remove "#include <unistd.h> from rdoff directory - two places - it annoyed Windows users and seems unneeded
+Sun Aug 26 05:10:24 2007 +0000 Frank Kotler 
+  * finally commit Mike Frysinger's "elf-visibility" patch
+Mon Aug 20 21:03:14 2007 +0000 H. Peter Anvin 
+  * regs.pl: handle dashed sequences with suffixes
+Mon Aug 20 20:10:04 2007 +0000 H. Peter Anvin 
+  * sync.c: change ULONG_MAX to UINT32_MAX
+Mon Aug 20 20:09:11 2007 +0000 H. Peter Anvin 
+  * Add _MIN and _MAX macros for the fixed-size types.
+Mon Aug 20 20:02:17 2007 +0000 H. Peter Anvin 
+  * ldrdf: cast output of sizeof() before passing to printf(), to avoid warning.
+Sun Aug 19 18:49:26 2007 +0000 Keith Kanios 
+  * Fixed RIP address processing ambiguity found by Charles Crayne.
+Fri Aug 17 07:37:52 2007 +0000 Keith Kanios 
+  * Fixed issues with REX prefix effective address generation. Fixed XMM instruction output.
+Fri Aug 17 02:03:10 2007 +0000 Keith Kanios 
+  * Changed MMXREG and XMMREG flags to help resolve invalid REX prefix generation for MMX instructions.
+Sat Jul 7 02:01:08 2007 +0000 H. Peter Anvin 
+  * More int/int32_t confusion
+Sat Jul 7 01:59:52 2007 +0000 H. Peter Anvin 
+  * regflag() should return int32_t.
+Thu Jun 21 19:00:12 2007 +0000 H. Peter Anvin 
+  * Detect missing <inttypes.h> and include ersatz version if missing
+Thu Jun 21 06:24:23 2007 +0000 H. Peter Anvin 
+  * inttypes.h: for older preprocessors, specify L and LL as appropriate
+Thu Jun 21 06:20:43 2007 +0000 H. Peter Anvin 
+  * inttypes.h: Fix spelling of SHRT_MAX
+Thu Jun 21 06:15:42 2007 +0000 H. Peter Anvin 
+  * inttypes.h: do a single ersatz <inttypes.h> based on <limits.h>
+Sun Jun 3 02:42:41 2007 +0000 Chuck Crayne 
+  * Support 32-bit direct addressing in 64-bit mode without base or index regs
+Sat Jun 2 02:26:21 2007 +0000 H. Peter Anvin 
+  * Fix the UINT*_C() creation macros
+Sat Jun 2 00:05:35 2007 +0000 H. Peter Anvin 
+  * For platforms that don't have them, provide <inttypes.h> for common models.
+Wed May 30 22:21:11 2007 +0000 H. Peter Anvin 
+  * Fix the handling of the \313 code.
+Wed May 30 22:20:01 2007 +0000 H. Peter Anvin 
+  * Machine-generated \321->\324 corrections
+Wed May 30 21:22:33 2007 +0000 Frank Kotler 
+  * update "version" to 0.99.02
+Wed May 30 20:30:15 2007 +0000 H. Peter Anvin 
+  * Correct the generation of 67 prefixes.
+Wed May 30 18:30:18 2007 +0000 H. Peter Anvin 
+  * Update dependencies.
+Wed May 30 16:34:29 2007 +0000 Frank Kotler 
+  * update cvs server name in misc/release script
+Wed May 30 04:28:50 2007 +0000 H. Peter Anvin 
+  * Avoid magic values; we have more than 124 registers now
+Wed May 30 04:27:58 2007 +0000 H. Peter Anvin 
+  * Remove bogus redundant tests
+Wed May 30 03:44:50 2007 +0000 H. Peter Anvin 
+  * More \321 -> \324
+Wed May 30 03:44:02 2007 +0000 H. Peter Anvin 
+  * Remove bogus check for 64-bitness
+Wed May 30 03:25:21 2007 +0000 H. Peter Anvin 
+  * Get rid of magic open-coded "register numbers"
+Wed May 30 02:48:51 2007 +0000 H. Peter Anvin 
+  * MOV reg64,reg64 takes \324 (64 bit with REX) not \321 (32 bit)
+Wed May 30 00:18:26 2007 +0000 H. Peter Anvin 
+  * Rename REGNORM to REG_EA
+Wed May 30 00:15:25 2007 +0000 H. Peter Anvin 
+  * More instruction flag surgery
+Wed May 30 00:05:00 2007 +0000 H. Peter Anvin 
+  * More cleanup of operand flags/register classes
+Tue May 29 23:57:12 2007 +0000 H. Peter Anvin 
+  * Clean up the existing operand flag definitions, and document
+Tue May 29 21:44:55 2007 +0000 H. Peter Anvin 
+  * Run "make alldeps"
+Thu May 24 22:33:07 2007 +0000 Frank Kotler 
+  * update version number to 0.99.01
+Tue May 15 04:33:43 2007 +0000 H. Peter Anvin 
+  * regs.dat: fix comment
+Fri May 4 18:47:16 2007 +0000 H. Peter Anvin 
+  * 16-bit relocations are standard in ELF64 (at my request, incidentally)
+Fri May 4 02:16:08 2007 +0000 Chuck Crayne 
+  * Addition of elf32 and elf64 output formats.
+Wed May 2 04:21:26 2007 +0000 Chuck Crayne 
+  * Allow '!' to be used in expressions with same meaning as in C.
+Wed May 2 01:59:16 2007 +0000 Chuck Crayne 
+  * Add %IFN and %ELIFN as per RFE #786286
+Mon Apr 30 22:26:58 2007 +0000 Chuck Crayne 
+  * Accept responsibility for support of outelf64.c
+Sun Apr 29 20:57:53 2007 +0000 Chuck Crayne 
+  * Clarify comments about relocation entries.
+Sun Apr 29 00:28:24 2007 +0000 Chuck Crayne 
+  * Allow ELF32 to be invoked either as -f elf or -f elf32
+Sat Apr 28 22:18:04 2007 +0000 Chuck Crayne 
+  * Eliminate shift count warnings when building on 32-bit systems
+Sat Apr 28 06:18:48 2007 +0000 Chuck Crayne 
+  * Initial support for ELF64
+Wed Apr 18 02:27:18 2007 +0000 H. Peter Anvin 
+  * Fix the handling of \324 for computing the length
+Wed Apr 18 02:24:34 2007 +0000 Keith Kanios 
+  * Fixed RDF/2 to comply with "maxbits" use.
+Tue Apr 17 20:23:11 2007 +0000 H. Peter Anvin 
+  * Handle "LOCK as REX.R" for MOV CRx; fix warning for invalid 64-bit regs
+Mon Apr 16 18:16:46 2007 +0000 Keith Kanios 
+  * MEM_OFFSET Instructions Fixed.
+Mon Apr 16 15:46:46 2007 +0000 Keith Kanios 
+  * Fixed 64-bit Mode Segment Selection.
+Mon Apr 16 14:31:54 2007 +0000 Keith Kanios 
+  * Fixed distinction between LOCALSYMBOL/IMMEDIATE for RIP-relative addressing.
+Mon Apr 16 14:05:01 2007 +0000 Keith Kanios 
+  * Fixed long mode MEM_OFFS issue.
+Mon Apr 16 13:54:49 2007 +0000 Keith Kanios 
+  * Filled in all RIP Register Flags.
+Mon Apr 16 05:26:29 2007 +0000 H. Peter Anvin 
+  * More \321 -> \324 for 64-bit instructions
+Mon Apr 16 04:56:06 2007 +0000 Keith Kanios 
+  * Fixed 64-bit offset generation.
+Mon Apr 16 02:39:56 2007 +0000 H. Peter Anvin 
+  * More 64-bit ndisasm fixes.
+Mon Apr 16 02:02:06 2007 +0000 H. Peter Anvin 
+  * Fixes for 64-bit ndisasm.
+Mon Apr 16 01:21:29 2007 +0000 H. Peter Anvin 
+  * Use + instead of * for extension; it feels cleaner with the new meaning.
+Mon Apr 16 01:18:30 2007 +0000 H. Peter Anvin 
+  * Initial 64-bit support for ndisasm.  Still a work in progress.
+Sun Apr 15 23:12:17 2007 +0000 H. Peter Anvin 
+  * Clean up the 64-bitification of regs.dat for 64-bit ndisasm support
+Sun Apr 15 23:10:26 2007 +0000 H. Peter Anvin 
+  * Remove @GCCFLAGS@
+Sun Apr 15 23:09:23 2007 +0000 H. Peter Anvin 
+  * CR8 is not special in any way as far as the assembler is concerned.
+Sun Apr 15 23:03:28 2007 +0000 H. Peter Anvin 
+  * Get rid of @GCCFLAGS@
+Sun Apr 15 22:45:25 2007 +0000 H. Peter Anvin 
+  * Cleaner way to add gcc options
+Sun Apr 15 22:08:30 2007 +0000 Keith Kanios 
+  * Fixed distinction between RIP relative symbols and immediate values.
+Sun Apr 15 05:40:43 2007 +0000 H. Peter Anvin 
+  * Fix the register number for CR7 (it was using the same number as CR15).
+Sun Apr 15 05:32:18 2007 +0000 H. Peter Anvin 
+  * More perl-like idioms for generating regdis.c
+Sun Apr 15 01:37:13 2007 +0000 Keith Kanios 
+  * Fixed regdis.c generation.
+Sat Apr 14 18:54:52 2007 +0000 Keith Kanios 
+  * Added DQ constants for all BITS modes.
+Sat Apr 14 08:03:02 2007 +0000 H. Peter Anvin 
+  * outmacho.c: stylistic cleanups
+Sat Apr 14 03:52:05 2007 +0000 Keith Kanios 
+  * Fixed support for DQ constants in long mode.
+Sat Apr 14 03:44:31 2007 +0000 Keith Kanios 
+  * Hopefully it is actually fixed this time :P
+Sat Apr 14 01:49:07 2007 +0000 Keith Kanios 
+  * Fixed structure initialization issue.
+Sat Apr 14 01:44:35 2007 +0000 Keith Kanios 
+  * Refixed uninitialized data.
+Sat Apr 14 01:40:24 2007 +0000 Keith Kanios 
+  * Fixed uninitialized structure data.
+Sat Apr 14 01:24:14 2007 +0000 Keith Kanios 
+  * c99 printf/fprintf compliance.
+Sat Apr 14 00:46:25 2007 +0000 Keith Kanios 
+  * Placated unreferenced types.
+Sat Apr 14 00:10:59 2007 +0000 Keith Kanios 
+  * c99 printf/fprintf compliance.
+Fri Apr 13 23:09:18 2007 +0000 Keith Kanios 
+  * Added outmacho.* to static makefile.
+Fri Apr 13 22:24:46 2007 +0000 Keith Kanios 
+  * Fixed REGRIP -> RIPREG to match regs.dat.
+Fri Apr 13 22:07:53 2007 +0000 Keith Kanios 
+  * Fixed obj_fwrite() declaration to match "static" definition.
+Fri Apr 13 22:03:24 2007 +0000 Keith Kanios 
+  * Added appropriate "void" prototypes.
+Fri Apr 13 22:00:42 2007 +0000 Keith Kanios 
+  * Replaced str(n)casecmp with more standard str(n)icmp.
+Fri Apr 13 20:06:41 2007 +0000 H. Peter Anvin 
+  * AIf we have config.h, we should actually include it!!
+Fri Apr 13 19:59:20 2007 +0000 H. Peter Anvin 
+  * When compiling with gcc, compile with -W -Wall for maximum warnings.
+Fri Apr 13 19:58:42 2007 +0000 H. Peter Anvin 
+  * Macroize any compiler-specific code; macros defined in "compiler.h"
+Fri Apr 13 16:47:53 2007 +0000 Keith Kanios 
+  * Fixed distinction between char and int8_t data types.
+Fri Apr 13 01:17:45 2007 +0000 Keith Kanios 
+  * Comment "REX.I" should have been "REX.X"
+Fri Apr 13 00:52:54 2007 +0000 Keith Kanios 
+  * Fixed c99 data-types after removal of typedefs.
+Fri Apr 13 00:43:50 2007 +0000 Keith Kanios 
+  * Added Dev-Cpp Makefile
+Fri Apr 13 00:38:29 2007 +0000 Keith Kanios 
+  * *** empty log message ***
+Thu Apr 12 17:58:02 2007 +0000 H. Peter Anvin 
+  * Remove redundant inclusion of <inttypes.h>
+Thu Apr 12 16:54:50 2007 +0000 H. Peter Anvin 
+  * Remove obsolete types; add <inttypes.h> where needed; header fixes
+Thu Apr 12 16:25:58 2007 +0000 H. Peter Anvin 
+  * autogen.sh script to create configure, et al.
+Thu Apr 12 16:23:11 2007 +0000 Keith Kanios 
+  * Fixed c99 support for RDOFF Tools
+Thu Apr 12 16:12:09 2007 +0000 H. Peter Anvin 
+  * outmacho.c: Don't assume __builtin_ctzl exists for gcc < 4
+
+  * Get rid of @GCCFLAGS@
+Sun Apr 15 22:45:25 2007 +0000 H. Peter Anvin 
+  * Cleaner way to add gcc options
+Sun Apr 15 22:08:30 2007 +0000 Keith Kanios 
+  * Fixed distinction between RIP relative symbols and immediate values.
+Sun Apr 15 05:40:43 2007 +0000 H. Peter Anvin 
+  * Fix the register number for CR7 (it was using the same number as CR15).
+Sun Apr 15 05:32:18 2007 +0000 H. Peter Anvin 
+  * More perl-like idioms for generating regdis.c
+Sun Apr 15 01:37:13 2007 +0000 Keith Kanios 
+  * Fixed regdis.c generation.
+Sat Apr 14 18:54:52 2007 +0000 Keith Kanios 
+  * Added DQ constants for all BITS modes.
+Sat Apr 14 08:03:02 2007 +0000 H. Peter Anvin 
+  * outmacho.c: stylistic cleanups
+Sat Apr 14 03:52:05 2007 +0000 Keith Kanios 
+  * Fixed support for DQ constants in long mode.
+Sat Apr 14 03:44:31 2007 +0000 Keith Kanios 
+  * Hopefully it is actually fixed this time :P
+Sat Apr 14 01:49:07 2007 +0000 Keith Kanios 
+  * Fixed structure initialization issue.
+Sat Apr 14 01:44:35 2007 +0000 Keith Kanios 
+  * Refixed uninitialized data.
+Sat Apr 14 01:40:24 2007 +0000 Keith Kanios 
+  * Fixed uninitialized structure data.
+Sat Apr 14 01:24:14 2007 +0000 Keith Kanios 
+  * c99 printf/fprintf compliance.
+Sat Apr 14 00:46:25 2007 +0000 Keith Kanios 
+  * Placated unreferenced types.
+Sat Apr 14 00:10:59 2007 +0000 Keith Kanios 
+  * c99 printf/fprintf compliance.
+Fri Apr 13 23:09:18 2007 +0000 Keith Kanios 
+  * Added outmacho.* to static makefile.
+Fri Apr 13 22:24:46 2007 +0000 Keith Kanios 
+  * Fixed REGRIP -> RIPREG to match regs.dat.
+Fri Apr 13 22:07:53 2007 +0000 Keith Kanios 
+  * Fixed obj_fwrite() declaration to match "static" definition.
+Fri Apr 13 22:03:24 2007 +0000 Keith Kanios 
+  * Added appropriate "void" prototypes.
+Fri Apr 13 22:00:42 2007 +0000 Keith Kanios 
+  * Replaced str(n)casecmp with more standard str(n)icmp.
+Fri Apr 13 20:06:41 2007 +0000 H. Peter Anvin 
+  * AIf we have config.h, we should actually include it!!
+Fri Apr 13 19:59:20 2007 +0000 H. Peter Anvin 
+  * When compiling with gcc, compile with -W -Wall for maximum warnings.
+Fri Apr 13 19:58:42 2007 +0000 H. Peter Anvin 
+  * Macroize any compiler-specific code; macros defined in "compiler.h"
+Fri Apr 13 16:47:53 2007 +0000 Keith Kanios 
+  * Fixed distinction between char and int8_t data types.
+Fri Apr 13 01:17:45 2007 +0000 Keith Kanios 
+  * Comment "REX.I" should have been "REX.X"
+Fri Apr 13 00:52:54 2007 +0000 Keith Kanios 
+  * Fixed c99 data-types after removal of typedefs.
+Fri Apr 13 00:43:50 2007 +0000 Keith Kanios 
+  * Added Dev-Cpp Makefile
+Fri Apr 13 00:38:29 2007 +0000 Keith Kanios 
+  * *** empty log message ***
+Thu Apr 12 17:58:02 2007 +0000 H. Peter Anvin 
+  * Remove redundant inclusion of <inttypes.h>
+Thu Apr 12 16:54:50 2007 +0000 H. Peter Anvin 
+  * Remove obsolete types; add <inttypes.h> where needed; header fixes
+Thu Apr 12 16:25:58 2007 +0000 H. Peter Anvin 
+  * autogen.sh script to create configure, et al.
+Thu Apr 12 16:23:11 2007 +0000 Keith Kanios 
+  * Fixed c99 support for RDOFF Tools
+Thu Apr 12 16:12:09 2007 +0000 H. Peter Anvin 
+  * outmacho.c: Don't assume __builtin_ctzl exists for gcc < 4
+2007-04-10  Keith Kanios <keith@kanios.net>
+   * (insns.dat): updated x86-64 general+system instruction set.
+
+2007-04-09  Keith Kanios <keith@kanios.net>
+   * (outrdf.c): added support for 64-bit addressing.
+   * (outrdf2.c): added support for 64-bit addressing.
+
+2007-04-08  Keith Kanios <keith@kanios.net>
+   * (standard.mac): added entry for __BITS__ standard macro.
+   * (preproc.c): added __BITS__ to the standard macro processing.
+
+2007-04-05  Keith Kanios <keith@kanios.net>
+   * (nasm.c): added BITS 64 for the x86-64 architecture extension.
+   * (nasm.h): added general flags to support the x86-64 architecture.
+   * (nasmlib.h): updated to support the x86-64 architecture.
+   * (nasmlib.c): revamped readnum/readlinenum to support 64-bit.
+   * (assemble.c): modified for the x86-64 architecture extension.
+   * (regs.dat): added x86-64 register extensions; revamped flags.
+   * (insns.dat): added AMD64 instruction set support.
+   * (outbin.c): added support for 64-bit addressing.
+   * (outcoff.c): added win64 (x86-64 COFF) support.
+   * (outform.h): added entry for win64.
+
+2007-03-15  Keith Kanios <keith@kanios.net>
+   * (*.c): added c99 data-type compliance and <inttypes.h> inclusion.
+   * (*.pl): added c99 data-type compliance and <inttypes.h> inclusion.
+   * (*.h): added c99 data-type compliance.
+   * (assemble.h): fixed procedure definitions to sync with respective
+   procedure declarations.
+
+2002-05-16  Ed Beroset <beroset@mindspring.com>
+   * (preproc.c): fixed unterminated macro bug error reporting
+   * (nasmlib.h): changed strdup's arg to const char *
+   * (nasmlib.c): changed strdup's arg to const char *
+
+2002-05-12  Debbie Wiles <debs@dwiles.demon.co.uk>
+   * (insns.dat): fixed incorrect processor flags
+   * (Mkfiles/Makefile.vc): added optimisation, and changed to work with 0.98.31
+   * (doc/nasmdoc.src): added %ifmacro, and tidied up format of code items.
+
+2002-05-03  H. Peter Anvin <hpa@zytor.com>
+   * (nasm.c): Change the NASM environment variable to NASMOPT.
+
+2002-05-03  H. Peter Anvin <hpa@zytor.com>
+   * (Makefile.in Mkfiles/*): use new version -> version.{h,mac}.
+   * (macros.pl): support multiple input files (standard.mac, version.mac).
+   * (standard.mac): use an explicit delimiter to end the TASM macros.
+   * (nasm-version): remove, no longer needed.
+   * (version.pl): script to produce version.h and version.mac from version.
+   * (version): contains the official NASM version.
+   * (nasm.h): include version.h.
+
+2002-05-03  H. Peter Anvin <hpa@zytor.com>
+
+   * (configure.in): create output directory.
+   * (Makefile.in): change cd ; to cd &&.
+   * (rdoff/Makefile.in): handle building in a separate obj directory
+     correctly.
+	
+2002-04-29  Stanislav Karchebny  <madfire@users.sourceforge.net>
+
+   * (Makefile.in): added 'strip' target to strip debug info.
+   * (INSTALL): added INSTALL file.
+   * (nasm.1): added -v option description.
+
+
+2002-04-29  Frank Kotler  <fbkotler@users.sourceforge.net>
+
+   * (parser.c): fixed INCBIN bug reported by Rebel.
+
+
+2002-04-11  Stanislav Karchebny  <madfire@users.sourceforge.net>
+
+   * Started ChangeLog for recording per-file changes in the project.
+     We could get away without ChangeLog at all (use CVS logs), but we
+     lose CVS so often its better to have log glued to the sources =)
+     You should record changes in CHANGES also, not for every change
+     but rather when making a release.
+

_service:tar_scm:nasm-2.16.03.tar.xz/INSTALL Added

@@ -0,0 +1,102 @@
+1. Installing NASM from source (Unix, MacOS X; Windows - Cygwin;
+   Windows - MinGW; DOS - DJGPP)
+2. Installing NASM from source (Windows - MS Visual C++)
+3. Installing NASM from source (DOS, Windows, OS/2 - OpenWatcom)
+
+
+1. Installing NASM from source (Unix, MacOS X; Windows - Cygwin;
+   Windows - MinGW; DOS - DJGPP)
+================================================================
+
+Installing NASM is pretty straightforward on Unix or Unix-like systems
+with a C compiler, Make, and standard shell tools installed, including
+MinGW for Windows (with MSYS installed) and DJGPP for DOS with the
+appropriate tools.  Perl is not required for compiling unmodified
+sources from a tarball, but is required to build from git or for most
+source modifications.
+
+If you checked out source from git you will need to run autoconf to
+generate configure, otherwise you don't have to.
+
+$ sh autogen.sh
+
+Then run configure to detect your platform settings and generate makefiles.
+
+$ sh configure
+
+You can get information about available configuration options by
+running `sh configure --help`.
+
+If configure fails, please file a bug report with detailed platform
+information at:
+
+    http://www.sf.net/projects/nasm/
+
+If everything went okay, type
+
+$ make
+
+to build NASM, ndisasm and rdoff tools, or
+
+$ make everything
+
+to build the former plus the docs.
+
+You can decrease the size of produces executables by stripping off
+unnecessary information, to achieve this run
+
+$ make strip
+
+If you install to a system-wide location you might need to become
+root:
+
+$ su <enter root password>
+
+then
+
+$ make install
+
+optionally followed by 
+
+$ make install_rdf
+
+Or you can 
+
+$ make install_everything
+
+to install everything =)
+
+
+That's it, enjoy!
+
+
+2. Installing NASM from source (Windows - MS Visual C++)
+========================================================
+
+The recommended compiler for NASM on Windows is MinGW
+(http://www.mingw.org/), but it is also possible to compile with
+Microsoft Visual C++ (tested with Visual C++ 2005 Express Edition.)
+
+To do so, start the "Visual C++ Command Shell", go to the directory
+where the NASM source code was extracted, and run:
+
+> nmake /f Mkfiles/msvc.mak
+
+We recommend MinGW over Visual C++ 2005 as we have found it to be more
+up to date with regards to C99 compliance, and we are increasingly
+using C99 features in NASM.
+
+
+3. Installing NASM from source (DOS, Windows, OS/2 - OpenWatcom)
+================================================================
+
+NASM has been reported to build correctly with OpenWatcom 1.7 on the
+Windows and OS/2 platforms.  In addition, it *should* work under DOS
+with the DOS4GW DOS extender, although the NASM developers recommend
+using DJGPP with the CWSDPMI DOS extender instead.
+
+A WMAKE make file is provided:
+
+> wmake -f Mkfiles\openwcom.mak <platform>
+
+... where <platform> is "dos", "win32" or "os2".

_service:tar_scm:nasm-2.16.03.tar.xz/LICENSE Added

@@ -0,0 +1,29 @@
+NASM is now licensed under the 2-clause BSD license, also known as the
+simplified BSD license.
+
+    Copyright 1996-2010 the NASM Authors - All rights reserved.
+
+    Redistribution and use in source and binary forms, with or without
+    modification, are permitted provided that the following
+    conditions are met:
+
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above
+      copyright notice, this list of conditions and the following
+      disclaimer in the documentation and/or other materials provided
+      with the distribution.
+      
+      THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+      CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+      INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+      MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+      DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+      CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+      SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+      NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+      LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+      HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+      CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+      OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+      EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

_service:tar_scm:nasm-2.16.03.tar.xz/Makefile.in Added

@@ -0,0 +1,742 @@
+#
+# Auto-configuring Makefile for the Netwide Assembler.
+#
+# The Netwide Assembler is copyright (C) 1996 Simon Tatham and
+# Julian Hall. All rights reserved. The software is
+# redistributable under the license given in the file "LICENSE"
+# distributed in the NASM archive.
+
+@SET_MAKE@
+
+top_srcdir	= @top_srcdir@
+srcdir		= @srcdir@
+objdir		= @builddir@
+VPATH		= @srcdir@
+prefix		= @prefix@
+exec_prefix	= @exec_prefix@
+bindir		= @bindir@
+mandir		= @mandir@
+datarootdir	= @datarootdir@
+
+CC		= @CC@
+CFLAGS		= @CFLAGS@
+CPPFLAGS	= @CPPFLAGS@
+BUILD_CFLAGS	= $(CPPFLAGS) $(CFLAGS) @DEFS@
+INTERNAL_CFLAGS = -I$(srcdir) -I$(objdir) \
+		  -I$(srcdir)/include -I$(objdir)/include \
+		  -I$(srcdir)/x86 -I$(objdir)/x86 \
+		  -I$(srcdir)/asm -I$(objdir)/asm \
+		  -I$(srcdir)/disasm -I$(objdir)/disasm \
+		  -I$(srcdir)/output -I$(objdir)/output
+ALL_CFLAGS	= $(BUILD_CFLAGS) $(INTERNAL_CFLAGS)
+LDFLAGS		= @LDFLAGS@
+ALL_LDFLAGS     = $(ALL_CFLAGS) $(LDFLAGS)
+LIBS		= @LIBS@
+
+AR		= @AR@
+RANLIB		= @RANLIB@
+STRIP		= @STRIP@
+
+tools		= $(top_srcdir)/tools
+
+PERL		= perl
+PERLFLAGS	= -I$(top_srcdir)/perllib -I$(srcdir)
+RUNPERL         = $(PERL) $(PERLFLAGS)
+
+EMPTY		= : >
+
+PYTHON3		= python3
+
+INSTALL		= @INSTALL@
+INSTALL_PROGRAM	= @INSTALL_PROGRAM@
+INSTALL_DATA	= @INSTALL_DATA@
+
+# Optional tools
+NROFF		= @NROFF@
+ASCIIDOC	= @ASCIIDOC@
+XMLTO		= @XMLTO@
+MAKENSIS	= @MAKENSIS@
+XZ              = @XZ@
+WINDRES         = @WINDRES@
+
+# Optional targets
+MANPAGES        = @MANPAGES@
+NSIS            = @NSIS@
+
+MKDIR_P		= @MKDIR_P@
+RM_F		= rm -f
+RM_RF		= rm -rf
+LN_S		= @LN_S@
+FIND		= find
+
+# Binary suffixes
+O		= @OBJEXT@
+X		= @EXEEXT@
+A		= @LIBEXT@
+
+# Debug stuff
+ifeq ($(TRACE),1)
+	CFLAGS += -DNASM_TRACE
+endif
+
+# Don't delete intermediate files
+.SECONDARY:
+
+# Delete files on error
+.DELETE_ON_ERROR:
+
+.SUFFIXES:
+.SUFFIXES: $(X) .$(O) .$(A) .xml .1 .c .i .s .txt .time
+
+.PHONY: all doc install clean distclean cleaner spotless test
+.PHONY: install_doc everything install_everything strip perlreq dist tags TAGS
+.PHONY: nothing manpages nsis
+
+.c.$(O):
+	$(CC) -c $(ALL_CFLAGS) -o $@ $<
+
+.c.s:
+	$(CC) -S $(ALL_CFLAGS) -o $@ $<
+
+.c.i:
+	$(CC) -E $(ALL_CFLAGS) -o $@ $<
+
+.txt.xml:
+	$(ASCIIDOC) -b docbook -d manpage -o $@ $<
+
+.xml.1:
+	$(XMLTO) man --skip-validation $< 2>/dev/null
+
+MANIFEST = @MANIFEST@
+
+#-- Begin File Lists --#
+NASM    = asm/nasm.$(O)
+NDISASM = disasm/ndisasm.$(O)
+
+PROGOBJ = $(NASM) $(NDISASM)
+PROGS   = nasm$(X) ndisasm$(X)
+
+LIBOBJ_NW = stdlib/snprintf.$(O) stdlib/vsnprintf.$(O) stdlib/strlcpy.$(O) \
+	stdlib/strnlen.$(O) stdlib/strrchrnul.$(O) \
+	\
+	nasmlib/ver.$(O) \
+	nasmlib/alloc.$(O) nasmlib/asprintf.$(O) nasmlib/errfile.$(O) \
+	nasmlib/crc32.$(O) nasmlib/crc64.$(O) nasmlib/md5c.$(O) \
+	nasmlib/string.$(O) nasmlib/nctype.$(O) \
+	nasmlib/file.$(O) nasmlib/mmap.$(O) nasmlib/ilog2.$(O) \
+	nasmlib/realpath.$(O) nasmlib/path.$(O) \
+	nasmlib/filename.$(O) nasmlib/rlimit.$(O) \
+	nasmlib/readnum.$(O) nasmlib/numstr.$(O) \
+	nasmlib/zerobuf.$(O) nasmlib/bsi.$(O) \
+	nasmlib/rbtree.$(O) nasmlib/hashtbl.$(O) \
+	nasmlib/raa.$(O) nasmlib/saa.$(O) \
+	nasmlib/strlist.$(O) \
+	nasmlib/perfhash.$(O) nasmlib/badenum.$(O) \
+	\
+	common/common.$(O) \
+	\
+	x86/insnsa.$(O) x86/insnsb.$(O) x86/insnsd.$(O) x86/insnsn.$(O) \
+	x86/regs.$(O) x86/regvals.$(O) x86/regflags.$(O) x86/regdis.$(O) \
+	x86/disp8.$(O) x86/iflag.$(O) \
+	\
+	asm/error.$(O) \
+	asm/floats.$(O) \
+	asm/directiv.$(O) asm/directbl.$(O) \
+	asm/pragma.$(O) \
+	asm/assemble.$(O) asm/labels.$(O) asm/parser.$(O) \
+	asm/preproc.$(O) asm/quote.$(O) asm/pptok.$(O) \
+	asm/listing.$(O) asm/eval.$(O) asm/exprlib.$(O) asm/exprdump.$(O) \
+	asm/stdscan.$(O) \
+	asm/strfunc.$(O) asm/tokhash.$(O) \
+	asm/segalloc.$(O) \
+	asm/rdstrnum.$(O) \
+	asm/srcfile.$(O) \
+	macros/macros.$(O) \
+	\
+	output/outform.$(O) output/outlib.$(O) output/legacy.$(O) \
+	output/nulldbg.$(O) output/nullout.$(O) \
+	output/outbin.$(O) output/outaout.$(O) output/outcoff.$(O) \
+	output/outelf.$(O) \
+	output/outobj.$(O) output/outas86.$(O) \
+	output/outdbg.$(O) output/outieee.$(O) output/outmacho.$(O) \
+	output/codeview.$(O) \
+	\
+	disasm/disasm.$(O) disasm/sync.$(O)
+
+# Warnings depend on all source files, so handle them separately
+WARNOBJ   = asm/warnings.$(O)
+WARNFILES = asm/warnings_c.h include/warnings.h doc/warnings.src
+
+LIBOBJ    = $(LIBOBJ_NW) $(WARNOBJ)
+ALLOBJ_NW = $(PROGOBJ) $(LIBOBJ_NW)
+ALLOBJ    = $(PROGOBJ) $(LIBOBJ)
+
+SUBDIRS  = stdlib nasmlib include config output asm disasm x86 \
+	   common macros
+XSUBDIRS = test doc nsis win
+DEPDIRS  = . $(SUBDIRS)
+#-- End File Lists --#
+
+all: dirs
+	$(MAKE) $(PROGS)
+
+NASMLIB = libnasm.$(A)
+
+dirs:
+	$(MKDIR_P) $(SUBDIRS) $(XSUBDIRS)
+
+$(NASMLIB): $(LIBOBJ)
+	$(RM_F) $(NASMLIB)
+	$(AR) cq $(NASMLIB) $(LIBOBJ)
+	$(RANLIB) $(NASMLIB)
+
+nasm$(X): $(NASM) $(MANIFEST) $(NASMLIB)
+	$(CC) $(ALL_LDFLAGS) -o nasm$(X) $^ $(LIBS)
+
+ndisasm$(X): $(NDISASM) $(MANIFEST) $(NASMLIB)
+	$(CC) $(ALL_LDFLAGS) -o ndisasm$(X) $^ $(LIBS)
+
+# These are specific to certain Makefile syntaxes...
+WARNTIMES = $(WARNFILES:=.time)
+WARNSRCS  = $(LIBOBJ_NW:.$(O)=.c) asm/nasm.c
+
+#-- Begin Generated File Rules --#
+
+# These source files are automagically generated from data files using
+# Perl scripts. They're distributed, though, so it isn't necessary to
+# have Perl just to recompile NASM from the distribution.
+
+# Perl-generated source files
+PERLREQ_CLEANABLE = \
+	  x86/insnsb.c x86/insnsa.c x86/insnsd.c x86/insnsi.h x86/insnsn.c \
+	  x86/regs.c x86/regs.h x86/regflags.c x86/regdis.c x86/regdis.h \
+	  x86/regvals.c asm/tokhash.c asm/tokens.h asm/pptok.h asm/pptok.c \
+	  x86/iflag.c x86/iflaggen.h \
+	  macros/macros.c \
+	  asm/pptok.ph asm/directbl.c asm/directiv.h \
+	  $(WARNFILES) \
+	  misc/nasmtok.el \
+	  version.h version.mac version.mak nsis/version.nsh
+
+# Special hack to keep config/unconfig.h from getting deleted
+# by "make spotless"...
+PERLREQ = config/unconfig.h $(PERLREQ_CLEANABLE)
+
+INSDEP = x86/insns.dat x86/insns.pl x86/insns-iflags.ph x86/iflags.ph
+
+config/unconfig.h: config/config.h.in autoconf/unconfig.pl
+	$(RUNPERL) '$(srcdir)'/autoconf/unconfig.pl \
+		'$(srcdir)' config/config.h.in config/unconfig.h
+
+x86/iflag.c: $(INSDEP)
+	$(RUNPERL) $(srcdir)/x86/insns.pl -fc \
+		$(srcdir)/x86/insns.dat x86/iflag.c
+x86/iflaggen.h: $(INSDEP)
+	$(RUNPERL) $(srcdir)/x86/insns.pl -fh \
+		$(srcdir)/x86/insns.dat x86/iflaggen.h
+x86/insnsb.c: $(INSDEP)
+	$(RUNPERL) $(srcdir)/x86/insns.pl -b \
+		$(srcdir)/x86/insns.dat x86/insnsb.c
+x86/insnsa.c: $(INSDEP)
+	$(RUNPERL) $(srcdir)/x86/insns.pl -a \
+		$(srcdir)/x86/insns.dat x86/insnsa.c
+x86/insnsd.c: $(INSDEP)
+	$(RUNPERL) $(srcdir)/x86/insns.pl -d \
+		$(srcdir)/x86/insns.dat x86/insnsd.c
+x86/insnsi.h: $(INSDEP)
+	$(RUNPERL) $(srcdir)/x86/insns.pl -i \
+		$(srcdir)/x86/insns.dat x86/insnsi.h
+x86/insnsn.c: $(INSDEP)
+	$(RUNPERL) $(srcdir)/x86/insns.pl -n \
+		$(srcdir)/x86/insns.dat x86/insnsn.c
+
+# These files contains all the standard macros that are derived from
+# the version number.
+version.h: version version.pl
+	$(RUNPERL) $(srcdir)/version.pl h < $(srcdir)/version > version.h
+version.mac: version version.pl
+	$(RUNPERL) $(srcdir)/version.pl mac < $(srcdir)/version > version.mac
+version.sed: version version.pl
+	$(RUNPERL) $(srcdir)/version.pl sed < $(srcdir)/version > version.sed
+version.mak: version version.pl
+	$(RUNPERL) $(srcdir)/version.pl make < $(srcdir)/version > version.mak
+nsis/version.nsh: version version.pl
+	$(RUNPERL) $(srcdir)/version.pl nsis < $(srcdir)/version > nsis/version.nsh
+
+# This source file is generated from the standard macros file
+# `standard.mac' by another Perl script. Again, it's part of the
+# standard distribution.
+macros/macros.c: macros/macros.pl asm/pptok.ph version.mac \
+	$(srcdir)/macros/*.mac $(srcdir)/output/*.mac
+	$(RUNPERL) $(srcdir)/macros/macros.pl version.mac \
+		$(srcdir)/macros/*.mac $(srcdir)/output/*.mac
+
+# These source files are generated from regs.dat by yet another
+# perl script.
+x86/regs.c: x86/regs.dat x86/regs.pl
+	$(RUNPERL) $(srcdir)/x86/regs.pl c \
+		$(srcdir)/x86/regs.dat > x86/regs.c
+x86/regflags.c: x86/regs.dat x86/regs.pl
+	$(RUNPERL) $(srcdir)/x86/regs.pl fc \
+		$(srcdir)/x86/regs.dat > x86/regflags.c
+x86/regdis.c: x86/regs.dat x86/regs.pl
+	$(RUNPERL) $(srcdir)/x86/regs.pl dc \
+		$(srcdir)/x86/regs.dat > x86/regdis.c
+x86/regdis.h: x86/regs.dat x86/regs.pl
+	$(RUNPERL) $(srcdir)/x86/regs.pl dh \
+		$(srcdir)/x86/regs.dat > x86/regdis.h
+x86/regvals.c: x86/regs.dat x86/regs.pl
+	$(RUNPERL) $(srcdir)/x86/regs.pl vc \
+		$(srcdir)/x86/regs.dat > x86/regvals.c
+x86/regs.h: x86/regs.dat x86/regs.pl
+	$(RUNPERL) $(srcdir)/x86/regs.pl h \
+		$(srcdir)/x86/regs.dat > x86/regs.h
+
+# Extract warnings from source code. This is done automatically if any
+# C files have changed; the script is fast enough that that is
+# reasonable, but doesn't update the time stamp if the files aren't
+# changed, to avoid rebuilding everything every time. Track the actual
+# dependency by the empty file asm/warnings.time.
+.PHONY: warnings
+warnings: dirs
+	$(RM_F) $(WARNFILES) $(WARNTIMES) asm/warnings.time
+	$(MAKE) asm/warnings.time
+
+asm/warnings.time: $(WARNSRCS) asm/warnings.pl
+	$(EMPTY) asm/warnings.time
+	$(MAKE) $(WARNTIMES)
+
+asm/warnings_c.h.time: asm/warnings.pl asm/warnings.time
+	$(RUNPERL) $(srcdir)/asm/warnings.pl c asm/warnings_c.h $(srcdir)
+	$(EMPTY) asm/warnings_c.h.time
+
+asm/warnings_c.h: asm/warnings_c.h.time
+	@: Side effect
+
+include/warnings.h.time: asm/warnings.pl asm/warnings.time
+	$(RUNPERL) $(srcdir)/asm/warnings.pl h include/warnings.h $(srcdir)
+	$(EMPTY) include/warnings.h.time
+
+include/warnings.h: include/warnings.h.time
+	@: Side effect
+
+doc/warnings.src.time: asm/warnings.pl asm/warnings.time
+	$(RUNPERL) $(srcdir)/asm/warnings.pl doc doc/warnings.src $(srcdir)
+	$(EMPTY) doc/warnings.src.time
+
+doc/warnings.src : doc/warnings.src.time
+	@: Side effect
+
+# Assembler token hash
+asm/tokhash.c: x86/insns.dat x86/insnsn.c asm/tokens.dat asm/tokhash.pl \
+	perllib/phash.ph
+	$(RUNPERL) $(srcdir)/asm/tokhash.pl c \
+		x86/insnsn.c $(srcdir)/x86/regs.dat \
+		$(srcdir)/asm/tokens.dat > asm/tokhash.c
+
+# Assembler token metadata
+asm/tokens.h: x86/insns.dat x86/insnsn.c asm/tokens.dat asm/tokhash.pl \
+	perllib/phash.ph
+	$(RUNPERL) $(srcdir)/asm/tokhash.pl h \
+		x86/insnsn.c $(srcdir)/x86/regs.dat \
+		$(srcdir)/asm/tokens.dat > asm/tokens.h
+
+# Preprocessor token hash
+asm/pptok.h: asm/pptok.dat asm/pptok.pl perllib/phash.ph
+	$(RUNPERL) $(srcdir)/asm/pptok.pl h \
+		$(srcdir)/asm/pptok.dat asm/pptok.h
+asm/pptok.c: asm/pptok.dat asm/pptok.pl perllib/phash.ph
+	$(RUNPERL) $(srcdir)/asm/pptok.pl c \
+		$(srcdir)/asm/pptok.dat asm/pptok.c
+asm/pptok.ph: asm/pptok.dat asm/pptok.pl perllib/phash.ph
+	$(RUNPERL) $(srcdir)/asm/pptok.pl ph \
+		$(srcdir)/asm/pptok.dat asm/pptok.ph
+
+# Directives hash
+asm/directiv.h: asm/directiv.dat nasmlib/perfhash.pl perllib/phash.ph
+	$(RUNPERL) $(srcdir)/nasmlib/perfhash.pl h \
+		$(srcdir)/asm/directiv.dat asm/directiv.h
+asm/directbl.c: asm/directiv.dat nasmlib/perfhash.pl perllib/phash.ph
+	$(RUNPERL) $(srcdir)/nasmlib/perfhash.pl c \
+		$(srcdir)/asm/directiv.dat asm/directbl.c
+
+# Emacs token files
+misc/nasmtok.el: misc/emacstbl.pl asm/tokhash.c asm/pptok.c \
+		 asm/directiv.dat version
+	$(RUNPERL) $< $@ "$(srcdir)" "$(objdir)"
+
+#-- End Generated File Rules --#
+
+perlreq: dirs
+	$(MAKE) $(PERLREQ)
+
+#-- Begin NSIS Rules --#
+
+nsis/arch.nsh: nsis/getpearch.pl nasm$(X)
+	$(PERL) $(srcdir)/nsis/getpearch.pl nasm$(X) > nsis/arch.nsh
+
+# Should only be done after "make everything".
+# The use of redirection here keeps makensis from moving the cwd to the
+# source directory.
+nsis: nsis/nasm.nsi nsis/arch.nsh nsis/version.nsh
+	$(MAKENSIS) -Dsrcdir="$(srcdir)" -Dobjdir="$(objdir)" - < nsis/nasm.nsi
+
+#-- End NSIS Rules --#
+
+# Windows embedded manifest
+MANIFEST_RC = win/manifest.rc
+win/manifest.$(O): win/manifest.xml $(MANIFEST_RC)
+	$(WINDRES) -I. -Iwin -DMANIFEST_FILE='\"$<\"' -i $(MANIFEST_RC) -o $@
+
+# Generated manpages, also pregenerated for distribution
+manpages: nasm.1 ndisasm.1
+
+install: $(PROGS)
+	$(MKDIR_P) $(DESTDIR)$(bindir)
+	$(INSTALL_PROGRAM) $(PROGS) $(DESTDIR)$(bindir)/
+	$(MKDIR_P) $(DESTDIR)$(mandir)/man1
+	$(INSTALL_DATA) $(srcdir)/nasm.1 $(DESTDIR)$(mandir)/man1/nasm.1
+	$(INSTALL_DATA) $(srcdir)/ndisasm.1 $(DESTDIR)$(mandir)/man1/ndisasm.1
+
+clean:
+	for d in . $(SUBDIRS) $(XSUBDIRS); do \
+		$(RM_F) "$$d"/*.$(O) "$$d"/*.s "$$d"/*.i "$$d"/*.$(A) ; \
+	done
+	$(RM_F) $(PROGS)
+	$(RM_F) nasm-*-installer-*.exe
+	$(RM_F) tags TAGS
+	$(RM_F) nsis/arch.nsh
+	$(RM_F) perlbreq.si
+
+distclean: clean
+	for d in . $(SUBDIRS) $(XSUBDIRS); do \
+		$(RM_F) "$$d"/.\# "$$d"/\# "$$d"/*~ "$$d"/*.bak \
+			"$$d"/*.lst "$$d"/*.bin ; \
+	done
+	$(RM_F) test/*.$(O)
+	$(RM_F) *.dep
+	-sh autoconf/clean.sh || sh '$(srcdir)'/autoconf/clean.sh
+
+cleaner:
+	$(RM_F) $(PERLREQ_CL) *.1 nasm.spec
+	$(MAKE) -C doc clean
+	$(MAKE) distclean
+	$(RM_F) */*.time
+
+spotless: cleaner
+	$(RM_F) configure autoconf/aclocal.m4 autoconf/clean.sh
+
+strip:
+	$(STRIP) --strip-unneeded $(PROGS)
+
+TAGS:
+	$(RM_F) TAGS
+	$(FIND) . -name '*.hcS' -print | xargs etags -a
+
+tags:
+	$(RM_F) tags
+	$(FIND) . -name '*.hcS' -print | xargs ctags -a
+
+cscope:
+	$(RM_F) cscope.out cscope.files
+	$(FIND) . -name '*.hcS' -print > cscope.files
+	cscope -b -f cscope.out
+
+doc: doc/warnings.src
+	$(MAKE) -C doc all
+
+doc_install install_doc:
+	$(MAKE) -C doc install
+
+# Dummy target to prevent accidental invocation of the default "all" target
+nothing:
+
+always_everything: dirs
+	$(MAKE) all doc
+
+everything: always_everything
+	$(MAKE) $(MANPAGES) $(NSIS) nothing
+
+install_everything: everything install install_doc
+
+dist:
+	$(MAKE) alldeps
+	$(MAKE) perlreq warnings spec $(MANPAGES)
+	$(MAKE) distclean
+	./autogen.sh
+
+tar: dist
+	tar -cv --exclude CVS --exclude .git -C .. -f - `basename \`pwd\`` | \
+		$(XZ) -9e > ../nasm-`cat version`-`date +%Y%m%d`.tar.xz
+
+spec: nasm.spec
+
+ALLPERLSRC := $(shell find $(srcdir) -type f -name '*.plh')
+
+perlbreq.si: $(ALLPERLSRC)
+	sed -n -r -e 's/^:space:*use:space:+(:upper:^:space:;*).*$$/BuildRequires: perl(\1)/p' $(ALLPERLSRC) | \
+	sed -r -e '/perl$(Win32.*)$/d' | \
+	sort | uniq > perlbreq.si
+
+nasm.spec: nasm.spec.in nasm.spec.sed version.sed perlbreq.si
+	sed -f version.sed -f nasm.spec.sed \
+	< nasm.spec.in > nasm.spec
+
+splint:
+	splint -weak *.c
+
+test: $(PROGS)
+	cd test && $(RUNPERL) performtest.pl --nasm=../nasm *.asm
+
+golden: $(PROGS)
+	cd test && $(RUNPERL) performtest.pl --golden --nasm=../nasm *.asm
+
+travis: $(PROGS)
+	$(PYTHON3) travis/nasm-t.py run
+
+#
+# Rules to run autogen if necessary
+#
+configure: configure.ac autoconf/aclocal.m4
+	sh autogen.sh --recheck
+
+config.status: configure
+	@if  ! -f config.status ; then \
+		echo "*** ERROR: Need to run configure!" 1>&2 ; \
+		exit 1; \
+	fi
+	sh config.status --recheck
+
+Makefile: config.status Makefile.in doc/Makefile.in
+	sh config.status
+
+doc/Makefile: Makefile
+
+config/config.h: config.status
+
+#
+# Dummy rules that changes make behavior
+# (at end to avoid confusing non-GNU makes)
+#
+.SECONDARY:
+
+.DELETE_ON_ERROR:
+
+#
+# Does this version of this file have external dependencies?  This definition
+# will be automatically updated by mkdep.pl as needed.
+#
+EXTERNAL_DEPENDENCIES = 0
+
+#
+# Generate dependency information for this Makefile only.
+# If this Makefile has external dependency information, then
+# the dependency information will remain external, so it doesn't
+# pollute the git logs.
+#
+Makefile.dep: $(tools)/mkdep.pl config.status $(PERLREQ)
+	$(RUNPERL) $(tools)/mkdep.pl -s '$(top_srcdir)' \
+		-M $(srcdir)/Makefile.in -- $(DEPDIRS)
+
+dep: Makefile.dep
+
+#
+# This build dependencies in *ALL* makefiles, and forces all
+# dependencies to be inserted inline.  For that reason, it should only
+# be invoked manually or via "make dist".  It should be run before
+# creating release archives.
+#
+alldeps: $(PERLREQ) $(tools)/syncfiles.pl $(tools)/mkdep.pl
+	$(RUNPERL) $(tools)/syncfiles.pl Makefile.in Mkfiles/*.mak
+	$(RUNPERL) $(tools)/mkdep.pl -i -M Makefile.in Mkfiles/*.mak -- \
+		$(DEPDIRS)
+	$(RM_F) *.dep
+	if  -f config.status ; then \
+		sh config.status; \
+	fi
+
+# Strip internal dependency information from all Makefiles; this makes
+# the output good for git checkin
+cleandeps: $(PERLREQ) $(tools)/syncfiles.pl $(tools)/mkdep.pl
+	$(RUNPERL) $(tools)/syncfiles.pl Makefile.in Mkfiles/*.mak
+	$(RUNPERL) $(tools)/mkdep.pl -e -M Makefile.in Mkfiles/*.mak -- \
+		$(DEPDIRS)
+	$(RM_F) *.dep
+	if  -f config.status ; then \
+		sh config.status; \
+	fi
+
+#-- Magic hints to mkdep.pl --#
+# @object-ending: ".$(O)"
+# @path-separator: "/"
+# @external: "Makefile.dep"
+# @include-command: "include"
+# @selfrule: "1"
+#-- Everything below is generated by mkdep.pl - do not edit --#
+asm/assemble.$(O): asm/assemble.c asm/assemble.h asm/listing.h \
+ include/compiler.h include/dbginfo.h include/disp8.h include/error.h \
+ include/insns.h include/nasm.h include/nasmlib.h include/tables.h
+asm/directbl.$(O): asm/directbl.c asm/directiv.h
+asm/directiv.$(O): asm/directiv.c asm/assemble.h asm/eval.h asm/floats.h \
+ asm/listing.h asm/preproc.h asm/stdscan.h include/compiler.h \
+ include/error.h include/iflag.h include/ilog2.h include/labels.h \
+ include/nasm.h include/nasmlib.h include/nctype.h output/outform.h
+asm/error.$(O): asm/error.c include/compiler.h include/error.h \
+ include/nasmlib.h
+asm/eval.$(O): asm/eval.c asm/assemble.h asm/eval.h asm/floats.h \
+ include/compiler.h include/error.h include/ilog2.h include/labels.h \
+ include/nasm.h include/nasmlib.h include/nctype.h
+asm/exprdump.$(O): asm/exprdump.c include/nasm.h
+asm/exprlib.$(O): asm/exprlib.c include/nasm.h
+asm/floats.$(O): asm/floats.c asm/floats.h include/compiler.h \
+ include/error.h include/nasm.h include/nctype.h
+asm/labels.$(O): asm/labels.c include/compiler.h include/error.h \
+ include/hashtbl.h include/labels.h include/nasm.h include/nasmlib.h
+asm/listing.$(O): asm/listing.c asm/listing.h include/compiler.h \
+ include/error.h include/nasm.h include/nasmlib.h include/nctype.h \
+ include/strlist.h
+asm/nasm.$(O): asm/nasm.c asm/assemble.h asm/eval.h asm/floats.h \
+ asm/listing.h asm/parser.h asm/preproc.h asm/quote.h asm/stdscan.h \
+ include/compiler.h include/error.h include/iflag.h include/insns.h \
+ include/labels.h include/nasm.h include/nasmlib.h include/nctype.h \
+ include/raa.h include/saa.h include/ver.h output/outform.h
+asm/parser.$(O): asm/parser.c asm/assemble.h asm/eval.h asm/floats.h \
+ asm/parser.h asm/stdscan.h include/compiler.h include/error.h \
+ include/insns.h include/nasm.h include/nasmlib.h include/nctype.h \
+ include/tables.h
+asm/pptok.$(O): asm/pptok.c asm/preproc.h include/compiler.h \
+ include/hashtbl.h include/nasmlib.h include/nctype.h
+asm/pragma.$(O): asm/pragma.c asm/assemble.h asm/listing.h \
+ include/compiler.h include/error.h include/nasm.h include/nasmlib.h \
+ include/nctype.h
+asm/preproc.$(O): asm/preproc.c asm/eval.h asm/listing.h asm/preproc.h \
+ asm/quote.h asm/stdscan.h asm/tokens.h include/compiler.h include/dbginfo.h \
+ include/error.h include/hashtbl.h include/nasm.h include/nasmlib.h \
+ include/nctype.h include/tables.h
+asm/quote.$(O): asm/quote.c asm/quote.h include/compiler.h include/error.h \
+ include/nasmlib.h include/nctype.h
+asm/rdstrnum.$(O): asm/rdstrnum.c include/compiler.h include/nasm.h \
+ include/nasmlib.h
+asm/segalloc.$(O): asm/segalloc.c include/compiler.h include/insns.h \
+ include/nasm.h include/nasmlib.h
+asm/srcfile.$(O): asm/srcfile.c asm/srcfile.h include/compiler.h \
+ include/hashtbl.h include/nasmlib.h
+asm/stdscan.$(O): asm/stdscan.c asm/quote.h asm/stdscan.h include/compiler.h \
+ include/error.h include/insns.h include/nasm.h include/nasmlib.h \
+ include/nctype.h
+asm/strfunc.$(O): asm/strfunc.c include/nasm.h include/nasmlib.h
+asm/tokhash.$(O): asm/tokhash.c asm/stdscan.h include/compiler.h \
+ include/hashtbl.h include/insns.h include/nasm.h
+asm/warnings.$(O): asm/warnings.c asm/warnings_c.h
+common/common.$(O): common/common.c include/compiler.h include/insns.h \
+ include/nasm.h include/nasmlib.h
+disasm/disasm.$(O): disasm/disasm.c disasm/disasm.h disasm/sync.h \
+ include/compiler.h include/disp8.h include/insns.h include/nasm.h \
+ include/tables.h x86/regdis.h
+disasm/ndisasm.$(O): disasm/ndisasm.c disasm/disasm.h disasm/sync.h \
+ include/compiler.h include/error.h include/insns.h include/nasm.h \
+ include/nasmlib.h include/nctype.h include/ver.h
+disasm/sync.$(O): disasm/sync.c disasm/sync.h include/compiler.h \
+ include/nasmlib.h
+macros/macros.$(O): macros/macros.c include/hashtbl.h include/nasmlib.h \
+ include/tables.h output/outform.h
+nasmlib/alloc.$(O): nasmlib/alloc.c include/compiler.h include/error.h \
+ include/nasmlib.h nasmlib/alloc.h
+nasmlib/asprintf.$(O): nasmlib/asprintf.c include/compiler.h \
+ include/nasmlib.h nasmlib/alloc.h
+nasmlib/badenum.$(O): nasmlib/badenum.c include/nasmlib.h
+nasmlib/bsi.$(O): nasmlib/bsi.c include/compiler.h include/nasmlib.h
+nasmlib/crc32.$(O): nasmlib/crc32.c include/compiler.h include/hashtbl.h
+nasmlib/crc64.$(O): nasmlib/crc64.c include/compiler.h include/hashtbl.h \
+ include/nctype.h
+nasmlib/errfile.$(O): nasmlib/errfile.c include/compiler.h
+nasmlib/file.$(O): nasmlib/file.c nasmlib/file.h
+nasmlib/filename.$(O): nasmlib/filename.c include/compiler.h include/error.h \
+ include/nasmlib.h
+nasmlib/hashtbl.$(O): nasmlib/hashtbl.c include/compiler.h include/hashtbl.h \
+ include/nasm.h
+nasmlib/ilog2.$(O): nasmlib/ilog2.c include/ilog2.h
+nasmlib/md5c.$(O): nasmlib/md5c.c include/md5.h
+nasmlib/mmap.$(O): nasmlib/mmap.c nasmlib/file.h
+nasmlib/nctype.$(O): nasmlib/nctype.c include/nctype.h
+nasmlib/numstr.$(O): nasmlib/numstr.c include/nasmlib.h
+nasmlib/path.$(O): nasmlib/path.c include/compiler.h include/error.h \
+ include/nasmlib.h
+nasmlib/perfhash.$(O): nasmlib/perfhash.c include/hashtbl.h \
+ include/perfhash.h
+nasmlib/raa.$(O): nasmlib/raa.c include/ilog2.h include/nasmlib.h \
+ include/raa.h
+nasmlib/rbtree.$(O): nasmlib/rbtree.c include/nasmlib.h include/rbtree.h
+nasmlib/readnum.$(O): nasmlib/readnum.c include/compiler.h include/error.h \
+ include/nasm.h include/nasmlib.h include/nctype.h
+nasmlib/realpath.$(O): nasmlib/realpath.c include/compiler.h \
+ include/nasmlib.h
+nasmlib/rlimit.$(O): nasmlib/rlimit.c include/compiler.h include/nasmlib.h
+nasmlib/saa.$(O): nasmlib/saa.c include/compiler.h include/nasmlib.h \
+ include/saa.h
+nasmlib/string.$(O): nasmlib/string.c include/compiler.h include/nasmlib.h \
+ include/nctype.h
+nasmlib/strlist.$(O): nasmlib/strlist.c include/strlist.h
+nasmlib/ver.$(O): nasmlib/ver.c include/ver.h version.h
+nasmlib/zerobuf.$(O): nasmlib/zerobuf.c include/compiler.h include/nasmlib.h
+output/codeview.$(O): output/codeview.c asm/preproc.h include/compiler.h \
+ include/error.h include/hashtbl.h include/md5.h include/nasm.h \
+ include/nasmlib.h include/saa.h output/outlib.h output/pecoff.h version.h
+output/legacy.$(O): output/legacy.c include/nasm.h output/outlib.h
+output/nulldbg.$(O): output/nulldbg.c include/nasm.h include/nasmlib.h \
+ output/outlib.h
+output/nullout.$(O): output/nullout.c include/nasm.h include/nasmlib.h \
+ output/outlib.h
+output/outaout.$(O): output/outaout.c asm/eval.h asm/stdscan.h \
+ include/compiler.h include/error.h include/nasm.h include/nasmlib.h \
+ include/nctype.h include/raa.h include/saa.h output/outform.h \
+ output/outlib.h
+output/outas86.$(O): output/outas86.c include/compiler.h include/error.h \
+ include/nasm.h include/nasmlib.h include/nctype.h include/raa.h \
+ include/saa.h output/outform.h output/outlib.h
+output/outbin.$(O): output/outbin.c asm/eval.h asm/stdscan.h \
+ include/compiler.h include/error.h include/labels.h include/nasm.h \
+ include/nasmlib.h include/nctype.h include/saa.h output/outform.h \
+ output/outlib.h
+output/outcoff.$(O): output/outcoff.c asm/eval.h include/compiler.h \
+ include/error.h include/ilog2.h include/nasm.h include/nasmlib.h \
+ include/nctype.h include/raa.h include/saa.h include/ver.h output/outform.h \
+ output/outlib.h output/pecoff.h
+output/outdbg.$(O): output/outdbg.c include/compiler.h include/dbginfo.h \
+ include/insns.h include/nasm.h include/nasmlib.h include/nctype.h \
+ output/outform.h output/outlib.h
+output/outelf.$(O): output/outelf.c asm/eval.h asm/stdscan.h \
+ include/compiler.h include/error.h include/hashtbl.h include/nasm.h \
+ include/nasmlib.h include/raa.h include/rbtree.h include/saa.h \
+ include/ver.h output/dwarf.h output/elf.h output/outelf.h output/outform.h \
+ output/outlib.h output/stabs.h
+output/outform.$(O): output/outform.c include/compiler.h output/outform.h \
+ output/outlib.h
+output/outieee.$(O): output/outieee.c include/compiler.h include/error.h \
+ include/nasm.h include/nasmlib.h include/nctype.h include/ver.h \
+ output/outform.h output/outlib.h
+output/outlib.$(O): output/outlib.c include/raa.h output/outlib.h
+output/outmacho.$(O): output/outmacho.c include/compiler.h include/error.h \
+ include/hashtbl.h include/ilog2.h include/labels.h include/nasm.h \
+ include/nasmlib.h include/nctype.h include/raa.h include/rbtree.h \
+ include/saa.h include/ver.h output/dwarf.h output/macho.h output/outform.h \
+ output/outlib.h
+output/outobj.$(O): output/outobj.c asm/eval.h asm/stdscan.h \
+ include/compiler.h include/error.h include/nasm.h include/nasmlib.h \
+ include/nctype.h include/ver.h output/outform.h output/outlib.h
+stdlib/snprintf.$(O): stdlib/snprintf.c include/compiler.h include/nasmlib.h
+stdlib/strlcpy.$(O): stdlib/strlcpy.c include/compiler.h
+stdlib/strnlen.$(O): stdlib/strnlen.c include/compiler.h
+stdlib/strrchrnul.$(O): stdlib/strrchrnul.c include/compiler.h
+stdlib/vsnprintf.$(O): stdlib/vsnprintf.c include/compiler.h include/error.h \
+ include/nasmlib.h
+x86/disp8.$(O): x86/disp8.c include/disp8.h
+x86/iflag.$(O): x86/iflag.c include/iflag.h
+x86/insnsa.$(O): x86/insnsa.c include/insns.h include/nasm.h
+x86/insnsb.$(O): x86/insnsb.c include/insns.h include/nasm.h
+x86/insnsd.$(O): x86/insnsd.c include/insns.h include/nasm.h
+x86/insnsn.$(O): x86/insnsn.c include/tables.h
+x86/regdis.$(O): x86/regdis.c x86/regdis.h
+x86/regflags.$(O): x86/regflags.c include/nasm.h include/tables.h
+x86/regs.$(O): x86/regs.c include/tables.h
+x86/regvals.$(O): x86/regvals.c include/tables.h

_service:tar_scm:nasm-2.16.03.tar.xz/Mkfiles Added

_service:tar_scm:nasm-2.16.03.tar.xz/Mkfiles/README Added

@@ -0,0 +1,51 @@
+These are pre-created Makefiles for various platforms, use them if
+GNU autoconf/automake packages are not supported on your system.
+
+The Makefiles are:
+
+  Filename      Target		Compiler	Tested with
+  ---------------------------------------------------------------------------
+  msvc.mak	Win32		MS Visual C++	Visual Visual Studio 2013-2022
+
+	For building on a Win32 host using Microsoft Visual C++.
+
+	Usage:	nmake /f Mkfiles\msvc.mak
+
+	If the following tools are installed, the full installer package can
+	be built:
+		1. Perl (5.6 or later), e.g. ActivePerl or StrawberryPerl
+		   http://strawberryperl.com/
+		2. Nullsoft Scriptable Install System (makensis)
+		   http://nsis.sourceforge.net/Download
+		3. Ghostscript (ps2pdf) or Acrobat Distriller (acrodist)
+		   https://downloads.ghostscript.com/
+		4. The Adobe Source Sans Pro and Source Code Pro fonts
+		   https://github.com/adobe-fonts
+		5. The Perl module Font::TTF (can usually be installed
+		   via the "CPAN Client" in your Perl distribution)
+		   http://search.cpan.org/~bhallissy/Font-TTF/
+		6. The Perl module Sort::Versions (can usually be installed
+		   via the "CPAN Client" in your Perl distribution)
+		   http://search.cpan.org/~neilb/Sort-Versions-1.62/lib/Sort/Versions.pm
+
+	The tools need to be in your current path.  To build the
+	installer package, run:
+
+		nmake /f Mkfiles\msvc.mak everything nsis
+
+	NOTE: the preferred way to build NASM on Windows is to use
+	the standard configure script under the MSYS2 environment.
+	See http://www.msys2.org/.
+
+
+  Filename      Target		Compiler	Tested with
+  ---------------------------------------------------------------------------
+  openwcom.mak	DOS,Win32,OS/2	OpenWatcom C	OpenWatcom 1.7 (Win32)
+		Linux (386)			OpenWatcom 1.9 (Linux)
+
+	For building on a DOS, OS/2, Win32 or Linux host using OpenWatcom.
+	OpenWatcom can be downloaded from http://www.openwatcom.org/.
+
+	Usage:	wmake /f Mkfiles/openwcom.mak <target>
+
+	<target> is dos, win32, os2, or linux386.

_service:tar_scm:nasm-2.16.03.tar.xz/Mkfiles/msvc.mak Added

@@ -0,0 +1,586 @@
+# -*- makefile -*-
+#
+# Makefile for building NASM using Microsoft Visual C++ and NMAKE.
+# Tested on Microsoft Visual C++ 2005 Express Edition.
+#
+# Make sure to put the appropriate directories in your PATH, in
+# the case of MSVC++ 2005, they are ...\VC\bin and ...\Common7\IDE.
+#
+# This is typically done by opening the Visual Studio Command Prompt.
+#
+
+top_srcdir	= .
+srcdir		= .
+objdir          = .
+VPATH		= .
+prefix		= "C:\Program Files\NASM"
+exec_prefix	= $(prefix)
+bindir		= $(prefix)/bin
+mandir		= $(prefix)/man
+
+MANIFEST_FLAGS  = /MANIFEST:EMBED /MANIFESTFILE:$(MANIFEST)
+
+!IF "$(DEBUG)" == "1"
+CFLAGS		= /Od /Zi
+LDFLAGS		= /DEBUG
+!ELSE
+CFLAGS		= /O2 /Zi
+ # /OPT:REF and /OPT:ICF two undo /DEBUG harm
+LDFLAGS		= /DEBUG /OPT:REF /OPT:ICF
+!ENDIF
+
+CC		= cl
+AR		= lib
+BUILD_CFLAGS	= $(CFLAGS) /W2
+INTERNAL_CFLAGS = /I$(srcdir) /I. \
+		  /I$(srcdir)/include /I./include \
+		  /I$(srcdir)/x86 /I./x86 \
+		  /I$(srcdir)/asm /I./asm \
+		  /I$(srcdir)/disasm /I./disasm \
+		  /I$(srcdir)/output /I./output
+ALL_CFLAGS	= $(BUILD_CFLAGS) $(INTERNAL_CFLAGS)
+MANIFEST_FLAGS  = /MANIFEST:EMBED /MANIFESTINPUT:$(MANIFEST)
+ALL_LDFLAGS	= /link $(LDFLAGS) $(MANIFEST_FLAGS) /SUBSYSTEM:CONSOLE /RELEASE
+LIBS		=
+
+PERL		= perl
+PERLFLAGS	= -I$(srcdir)/perllib -I$(srcdir)
+RUNPERL         = $(PERL) $(PERLFLAGS)
+
+MAKENSIS        = makensis
+
+RM_F		= -del /f
+LN_S		= copy
+
+# Binary suffixes
+O               = obj
+A		= lib
+X               = .exe
+.SUFFIXES:
+.SUFFIXES: $(X) .$(A) .obj .c .i .s .1 .man
+
+.c.obj:
+	$(CC) /c $(ALL_CFLAGS) /Fo$@ $<
+
+MANIFEST = win/manifest.xml
+
+#-- Begin File Lists --#
+# Edit in Makefile.in, not here!
+NASM    = asm\nasm.obj
+NDISASM = disasm\ndisasm.obj
+
+PROGOBJ = $(NASM) $(NDISASM)
+PROGS   = nasm$(X) ndisasm$(X)
+
+LIBOBJ_NW = stdlib\snprintf.obj stdlib\vsnprintf.obj stdlib\strlcpy.obj \
+	stdlib\strnlen.obj stdlib\strrchrnul.obj \
+	\
+	nasmlib\ver.obj \
+	nasmlib\alloc.obj nasmlib\asprintf.obj nasmlib\errfile.obj \
+	nasmlib\crc32.obj nasmlib\crc64.obj nasmlib\md5c.obj \
+	nasmlib\string.obj nasmlib\nctype.obj \
+	nasmlib\file.obj nasmlib\mmap.obj nasmlib\ilog2.obj \
+	nasmlib\realpath.obj nasmlib\path.obj \
+	nasmlib\filename.obj nasmlib\rlimit.obj \
+	nasmlib\readnum.obj nasmlib\numstr.obj \
+	nasmlib\zerobuf.obj nasmlib\bsi.obj \
+	nasmlib\rbtree.obj nasmlib\hashtbl.obj \
+	nasmlib\raa.obj nasmlib\saa.obj \
+	nasmlib\strlist.obj \
+	nasmlib\perfhash.obj nasmlib\badenum.obj \
+	\
+	common\common.obj \
+	\
+	x86\insnsa.obj x86\insnsb.obj x86\insnsd.obj x86\insnsn.obj \
+	x86\regs.obj x86\regvals.obj x86\regflags.obj x86\regdis.obj \
+	x86\disp8.obj x86\iflag.obj \
+	\
+	asm\error.obj \
+	asm\floats.obj \
+	asm\directiv.obj asm\directbl.obj \
+	asm\pragma.obj \
+	asm\assemble.obj asm\labels.obj asm\parser.obj \
+	asm\preproc.obj asm\quote.obj asm\pptok.obj \
+	asm\listing.obj asm\eval.obj asm\exprlib.obj asm\exprdump.obj \
+	asm\stdscan.obj \
+	asm\strfunc.obj asm\tokhash.obj \
+	asm\segalloc.obj \
+	asm\rdstrnum.obj \
+	asm\srcfile.obj \
+	macros\macros.obj \
+	\
+	output\outform.obj output\outlib.obj output\legacy.obj \
+	output\nulldbg.obj output\nullout.obj \
+	output\outbin.obj output\outaout.obj output\outcoff.obj \
+	output\outelf.obj \
+	output\outobj.obj output\outas86.obj \
+	output\outdbg.obj output\outieee.obj output\outmacho.obj \
+	output\codeview.obj \
+	\
+	disasm\disasm.obj disasm\sync.obj
+
+# Warnings depend on all source files, so handle them separately
+WARNOBJ   = asm\warnings.obj
+WARNFILES = asm\warnings_c.h include\warnings.h doc\warnings.src
+
+LIBOBJ    = $(LIBOBJ_NW) $(WARNOBJ)
+ALLOBJ_NW = $(PROGOBJ) $(LIBOBJ_NW)
+ALLOBJ    = $(PROGOBJ) $(LIBOBJ)
+
+SUBDIRS  = stdlib nasmlib include config output asm disasm x86 \
+	   common macros
+XSUBDIRS = test doc nsis win
+DEPDIRS  = . $(SUBDIRS)
+#-- End File Lists --#
+
+NASMLIB = libnasm.$(A)
+
+all: nasm$(X) ndisasm$(X)
+
+nasm$(X): $(NASM) $(MANIFEST) $(NASMLIB)
+	$(CC) /Fe$@ $(NASM) $(ALL_LDFLAGS) $(NASMLIB) $(LIBS)
+
+ndisasm$(X): $(NDISASM) $(MANIFEST) $(NASMLIB)
+	$(CC) /Fe$@ $(NDISASM) $(ALL_LDFLAGS) $(NASMLIB) $(LIBS)
+
+$(NASMLIB): $(LIBOBJ)
+	$(AR) $(ARFLAGS) /OUT:$@ $**
+
+# These are specific to certain Makefile syntaxes...
+WARNTIMES = $(patsubst %,%.time,$(WARNFILES))
+WARNSRCS  = $(patsubst %.obj,%.c,$(LIBOBJ_NW))
+
+#-- Begin Generated File Rules --#
+# Edit in Makefile.in, not here!
+
+# These source files are automagically generated from data files using
+# Perl scripts. They're distributed, though, so it isn't necessary to
+# have Perl just to recompile NASM from the distribution.
+
+# Perl-generated source files
+PERLREQ_CLEANABLE = \
+	  x86\insnsb.c x86\insnsa.c x86\insnsd.c x86\insnsi.h x86\insnsn.c \
+	  x86\regs.c x86\regs.h x86\regflags.c x86\regdis.c x86\regdis.h \
+	  x86\regvals.c asm\tokhash.c asm\tokens.h asm\pptok.h asm\pptok.c \
+	  x86\iflag.c x86\iflaggen.h \
+	  macros\macros.c \
+	  asm\pptok.ph asm\directbl.c asm\directiv.h \
+	  $(WARNFILES) \
+	  misc\nasmtok.el \
+	  version.h version.mac version.mak nsis\version.nsh
+
+# Special hack to keep config\unconfig.h from getting deleted
+# by "make spotless"...
+PERLREQ = config\unconfig.h $(PERLREQ_CLEANABLE)
+
+INSDEP = x86\insns.dat x86\insns.pl x86\insns-iflags.ph x86\iflags.ph
+
+config\unconfig.h: config\config.h.in autoconf\unconfig.pl
+	$(RUNPERL) '$(srcdir)'\autoconf\unconfig.pl \
+		'$(srcdir)' config\config.h.in config\unconfig.h
+
+x86\iflag.c: $(INSDEP)
+	$(RUNPERL) $(srcdir)\x86\insns.pl -fc \
+		$(srcdir)\x86\insns.dat x86\iflag.c
+x86\iflaggen.h: $(INSDEP)
+	$(RUNPERL) $(srcdir)\x86\insns.pl -fh \
+		$(srcdir)\x86\insns.dat x86\iflaggen.h
+x86\insnsb.c: $(INSDEP)
+	$(RUNPERL) $(srcdir)\x86\insns.pl -b \
+		$(srcdir)\x86\insns.dat x86\insnsb.c
+x86\insnsa.c: $(INSDEP)
+	$(RUNPERL) $(srcdir)\x86\insns.pl -a \
+		$(srcdir)\x86\insns.dat x86\insnsa.c
+x86\insnsd.c: $(INSDEP)
+	$(RUNPERL) $(srcdir)\x86\insns.pl -d \
+		$(srcdir)\x86\insns.dat x86\insnsd.c
+x86\insnsi.h: $(INSDEP)
+	$(RUNPERL) $(srcdir)\x86\insns.pl -i \
+		$(srcdir)\x86\insns.dat x86\insnsi.h
+x86\insnsn.c: $(INSDEP)
+	$(RUNPERL) $(srcdir)\x86\insns.pl -n \
+		$(srcdir)\x86\insns.dat x86\insnsn.c
+
+# These files contains all the standard macros that are derived from
+# the version number.
+version.h: version version.pl
+	$(RUNPERL) $(srcdir)\version.pl h < $(srcdir)\version > version.h
+version.mac: version version.pl
+	$(RUNPERL) $(srcdir)\version.pl mac < $(srcdir)\version > version.mac
+version.sed: version version.pl
+	$(RUNPERL) $(srcdir)\version.pl sed < $(srcdir)\version > version.sed
+version.mak: version version.pl
+	$(RUNPERL) $(srcdir)\version.pl make < $(srcdir)\version > version.mak
+nsis\version.nsh: version version.pl
+	$(RUNPERL) $(srcdir)\version.pl nsis < $(srcdir)\version > nsis\version.nsh
+
+# This source file is generated from the standard macros file
+# `standard.mac' by another Perl script. Again, it's part of the
+# standard distribution.
+macros\macros.c: macros\macros.pl asm\pptok.ph version.mac \
+	$(srcdir)\macros\*.mac $(srcdir)\output\*.mac
+	$(RUNPERL) $(srcdir)\macros\macros.pl version.mac \
+		$(srcdir)\macros\*.mac $(srcdir)\output\*.mac
+
+# These source files are generated from regs.dat by yet another
+# perl script.
+x86\regs.c: x86\regs.dat x86\regs.pl
+	$(RUNPERL) $(srcdir)\x86\regs.pl c \
+		$(srcdir)\x86\regs.dat > x86\regs.c
+x86\regflags.c: x86\regs.dat x86\regs.pl
+	$(RUNPERL) $(srcdir)\x86\regs.pl fc \
+		$(srcdir)\x86\regs.dat > x86\regflags.c
+x86\regdis.c: x86\regs.dat x86\regs.pl
+	$(RUNPERL) $(srcdir)\x86\regs.pl dc \
+		$(srcdir)\x86\regs.dat > x86\regdis.c
+x86\regdis.h: x86\regs.dat x86\regs.pl
+	$(RUNPERL) $(srcdir)\x86\regs.pl dh \
+		$(srcdir)\x86\regs.dat > x86\regdis.h
+x86\regvals.c: x86\regs.dat x86\regs.pl
+	$(RUNPERL) $(srcdir)\x86\regs.pl vc \
+		$(srcdir)\x86\regs.dat > x86\regvals.c
+x86\regs.h: x86\regs.dat x86\regs.pl
+	$(RUNPERL) $(srcdir)\x86\regs.pl h \
+		$(srcdir)\x86\regs.dat > x86\regs.h
+
+# Extract warnings from source code. This is done automatically if any
+# C files have changed; the script is fast enough that that is
+# reasonable, but doesn't update the time stamp if the files aren't
+# changed, to avoid rebuilding everything every time. Track the actual
+# dependency by the empty file asm\warnings.time.
+.PHONY: warnings
+warnings: dirs
+	$(RM_F) $(WARNFILES) $(WARNTIMES) asm\warnings.time
+	$(MAKE) asm\warnings.time
+
+asm\warnings.time: $(WARNSRCS) asm\warnings.pl
+	$(EMPTY) asm\warnings.time
+	$(MAKE) $(WARNTIMES)
+
+asm\warnings_c.h.time: asm\warnings.pl asm\warnings.time
+	$(RUNPERL) $(srcdir)\asm\warnings.pl c asm\warnings_c.h $(srcdir)
+	$(EMPTY) asm\warnings_c.h.time
+
+asm\warnings_c.h: asm\warnings_c.h.time
+	@: Side effect
+
+include\warnings.h.time: asm\warnings.pl asm\warnings.time
+	$(RUNPERL) $(srcdir)\asm\warnings.pl h include\warnings.h $(srcdir)
+	$(EMPTY) include\warnings.h.time
+
+include\warnings.h: include\warnings.h.time
+	@: Side effect
+
+doc\warnings.src.time: asm\warnings.pl asm\warnings.time
+	$(RUNPERL) $(srcdir)\asm\warnings.pl doc doc\warnings.src $(srcdir)
+	$(EMPTY) doc\warnings.src.time
+
+doc\warnings.src : doc\warnings.src.time
+	@: Side effect
+
+# Assembler token hash
+asm\tokhash.c: x86\insns.dat x86\insnsn.c asm\tokens.dat asm\tokhash.pl \
+	perllib\phash.ph
+	$(RUNPERL) $(srcdir)\asm\tokhash.pl c \
+		x86\insnsn.c $(srcdir)\x86\regs.dat \
+		$(srcdir)\asm\tokens.dat > asm\tokhash.c
+
+# Assembler token metadata
+asm\tokens.h: x86\insns.dat x86\insnsn.c asm\tokens.dat asm\tokhash.pl \
+	perllib\phash.ph
+	$(RUNPERL) $(srcdir)\asm\tokhash.pl h \
+		x86\insnsn.c $(srcdir)\x86\regs.dat \
+		$(srcdir)\asm\tokens.dat > asm\tokens.h
+
+# Preprocessor token hash
+asm\pptok.h: asm\pptok.dat asm\pptok.pl perllib\phash.ph
+	$(RUNPERL) $(srcdir)\asm\pptok.pl h \
+		$(srcdir)\asm\pptok.dat asm\pptok.h
+asm\pptok.c: asm\pptok.dat asm\pptok.pl perllib\phash.ph
+	$(RUNPERL) $(srcdir)\asm\pptok.pl c \
+		$(srcdir)\asm\pptok.dat asm\pptok.c
+asm\pptok.ph: asm\pptok.dat asm\pptok.pl perllib\phash.ph
+	$(RUNPERL) $(srcdir)\asm\pptok.pl ph \
+		$(srcdir)\asm\pptok.dat asm\pptok.ph
+
+# Directives hash
+asm\directiv.h: asm\directiv.dat nasmlib\perfhash.pl perllib\phash.ph
+	$(RUNPERL) $(srcdir)\nasmlib\perfhash.pl h \
+		$(srcdir)\asm\directiv.dat asm\directiv.h
+asm\directbl.c: asm\directiv.dat nasmlib\perfhash.pl perllib\phash.ph
+	$(RUNPERL) $(srcdir)\nasmlib\perfhash.pl c \
+		$(srcdir)\asm\directiv.dat asm\directbl.c
+
+# Emacs token files
+misc\nasmtok.el: misc\emacstbl.pl asm\tokhash.c asm\pptok.c \
+		 asm\directiv.dat version
+	$(RUNPERL) $< $@ "$(srcdir)" "$(objdir)"
+
+#-- End Generated File Rules --#
+
+perlreq: $(PERLREQ)
+
+#-- Begin NSIS Rules --#
+# Edit in Makefile.in, not here!
+
+nsis\arch.nsh: nsis\getpearch.pl nasm$(X)
+	$(PERL) $(srcdir)\nsis\getpearch.pl nasm$(X) > nsis\arch.nsh
+
+# Should only be done after "make everything".
+# The use of redirection here keeps makensis from moving the cwd to the
+# source directory.
+nsis: nsis\nasm.nsi nsis\arch.nsh nsis\version.nsh
+	$(MAKENSIS) -Dsrcdir="$(srcdir)" -Dobjdir="$(objdir)" - < nsis\nasm.nsi
+
+#-- End NSIS Rules --#
+
+clean:
+	-del /f /s *.obj
+	-del /f /s *.pdb
+	-del /f /s *.s
+	-del /f /s *.i
+	-del /f $(NASMLIB) $(RDFLIB)
+	-del /f nasm$(X)
+	-del /f ndisasm$(X)
+
+distclean: clean
+	-del /f config.h
+	-del /f config.log
+	-del /f config.status
+	-del /f Makefile
+	-del /f /s *~
+	-del /f /s *.bak
+	-del /f /s *.lst
+	-del /f /s *.bin
+	-del /f /s *.dep
+	-del /f output\*~
+	-del /f output\*.bak
+	-del /f test\*.lst
+	-del /f test\*.bin
+	-del /f test\*.obj
+	-del /f test\*.bin
+	-del /f/s autom4te*.cache
+
+cleaner: clean
+	-del /f $(PERLREQ)
+	-del /f *.man
+	-del /f nasm.spec
+	rem cd doc && $(MAKE) clean
+
+spotless: distclean cleaner
+	-del /f doc\Makefile
+	-del doc\*~
+	-del doc\*.bak
+
+strip:
+
+# Abuse doc/Makefile.in to build nasmdoc.pdf only
+docs:
+	cd doc && $(MAKE) /f Makefile.in srcdir=. top_srcdir=.. \
+		PERL=$(PERL) PDFOPT= nasmdoc.pdf
+
+everything: all docs nsis
+
+#
+# Does this version of this file have external dependencies?  This definition
+# will be automatically updated by mkdep.pl as needed.
+#
+EXTERNAL_DEPENDENCIES = 0
+
+#
+# Generate dependency information for this Makefile only.
+# If this Makefile has external dependency information, then
+# the dependency information will remain external, so it doesn't
+# pollute the git logs.
+#
+msvc.dep: $(PERLREQ) tools\mkdep.pl
+	$(RUNPERL) tools\mkdep.pl -M Mkfiles\msvc.mak -- $(DEPDIRS)
+
+dep: msvc.dep
+
+# Include and/or generate msvc.dep as needed. This is too complex to
+# use the include-command feature, but we can open-code it here.
+MKDEP=0
+!IF $(EXTERNAL_DEPENDENCIES) == 1 && $(MKDEP) == 0
+!IF EXISTS(msvc.dep)
+!INCLUDE msvc.dep
+!ELSEIF $(MAKE) /c MKDEP=1 /f Mkfiles\msvc.mak msvc.dep == 0
+!INCLUDE msvc.dep
+!ELSE
+!ERROR Unable to rebuild dependencies file msvc.dep
+!ENDIF
+!ENDIF
+
+#-- Magic hints to mkdep.pl --#
+# @object-ending: ".obj"
+# @path-separator: "\"
+# @exclude: "config/config.h"
+# @external: "msvc.dep"
+# @selfrule: "1"
+#-- Everything below is generated by mkdep.pl - do not edit --#
+asm\assemble.obj: asm\assemble.c asm\assemble.h asm\listing.h \
+ include\compiler.h include\dbginfo.h include\disp8.h include\error.h \
+ include\insns.h include\nasm.h include\nasmlib.h include\tables.h
+asm\directbl.obj: asm\directbl.c asm\directiv.h
+asm\directiv.obj: asm\directiv.c asm\assemble.h asm\eval.h asm\floats.h \
+ asm\listing.h asm\preproc.h asm\stdscan.h include\compiler.h \
+ include\error.h include\iflag.h include\ilog2.h include\labels.h \
+ include\nasm.h include\nasmlib.h include\nctype.h output\outform.h
+asm\error.obj: asm\error.c include\compiler.h include\error.h \
+ include\nasmlib.h
+asm\eval.obj: asm\eval.c asm\assemble.h asm\eval.h asm\floats.h \
+ include\compiler.h include\error.h include\ilog2.h include\labels.h \
+ include\nasm.h include\nasmlib.h include\nctype.h
+asm\exprdump.obj: asm\exprdump.c include\nasm.h
+asm\exprlib.obj: asm\exprlib.c include\nasm.h
+asm\floats.obj: asm\floats.c asm\floats.h include\compiler.h include\error.h \
+ include\nasm.h include\nctype.h
+asm\labels.obj: asm\labels.c include\compiler.h include\error.h \
+ include\hashtbl.h include\labels.h include\nasm.h include\nasmlib.h
+asm\listing.obj: asm\listing.c asm\listing.h include\compiler.h \
+ include\error.h include\nasm.h include\nasmlib.h include\nctype.h \
+ include\strlist.h
+asm\nasm.obj: asm\nasm.c asm\assemble.h asm\eval.h asm\floats.h \
+ asm\listing.h asm\parser.h asm\preproc.h asm\quote.h asm\stdscan.h \
+ include\compiler.h include\error.h include\iflag.h include\insns.h \
+ include\labels.h include\nasm.h include\nasmlib.h include\nctype.h \
+ include\raa.h include\saa.h include\ver.h output\outform.h
+asm\parser.obj: asm\parser.c asm\assemble.h asm\eval.h asm\floats.h \
+ asm\parser.h asm\stdscan.h include\compiler.h include\error.h \
+ include\insns.h include\nasm.h include\nasmlib.h include\nctype.h \
+ include\tables.h
+asm\pptok.obj: asm\pptok.c asm\preproc.h include\compiler.h \
+ include\hashtbl.h include\nasmlib.h include\nctype.h
+asm\pragma.obj: asm\pragma.c asm\assemble.h asm\listing.h include\compiler.h \
+ include\error.h include\nasm.h include\nasmlib.h include\nctype.h
+asm\preproc.obj: asm\preproc.c asm\eval.h asm\listing.h asm\preproc.h \
+ asm\quote.h asm\stdscan.h asm\tokens.h include\compiler.h include\dbginfo.h \
+ include\error.h include\hashtbl.h include\nasm.h include\nasmlib.h \
+ include\nctype.h include\tables.h
+asm\quote.obj: asm\quote.c asm\quote.h include\compiler.h include\error.h \
+ include\nasmlib.h include\nctype.h
+asm\rdstrnum.obj: asm\rdstrnum.c include\compiler.h include\nasm.h \
+ include\nasmlib.h
+asm\segalloc.obj: asm\segalloc.c include\compiler.h include\insns.h \
+ include\nasm.h include\nasmlib.h
+asm\srcfile.obj: asm\srcfile.c asm\srcfile.h include\compiler.h \
+ include\hashtbl.h include\nasmlib.h
+asm\stdscan.obj: asm\stdscan.c asm\quote.h asm\stdscan.h include\compiler.h \
+ include\error.h include\insns.h include\nasm.h include\nasmlib.h \
+ include\nctype.h
+asm\strfunc.obj: asm\strfunc.c include\nasm.h include\nasmlib.h
+asm\tokhash.obj: asm\tokhash.c asm\stdscan.h include\compiler.h \
+ include\hashtbl.h include\insns.h include\nasm.h
+asm\warnings.obj: asm\warnings.c asm\warnings_c.h
+common\common.obj: common\common.c include\compiler.h include\insns.h \
+ include\nasm.h include\nasmlib.h
+disasm\disasm.obj: disasm\disasm.c disasm\disasm.h disasm\sync.h \
+ include\compiler.h include\disp8.h include\insns.h include\nasm.h \
+ include\tables.h x86\regdis.h
+disasm\ndisasm.obj: disasm\ndisasm.c disasm\disasm.h disasm\sync.h \
+ include\compiler.h include\error.h include\insns.h include\nasm.h \
+ include\nasmlib.h include\nctype.h include\ver.h
+disasm\sync.obj: disasm\sync.c disasm\sync.h include\compiler.h \
+ include\nasmlib.h
+macros\macros.obj: macros\macros.c include\hashtbl.h include\nasmlib.h \
+ include\tables.h output\outform.h
+nasmlib\alloc.obj: nasmlib\alloc.c include\compiler.h include\error.h \
+ include\nasmlib.h nasmlib\alloc.h
+nasmlib\asprintf.obj: nasmlib\asprintf.c include\compiler.h \
+ include\nasmlib.h nasmlib\alloc.h
+nasmlib\badenum.obj: nasmlib\badenum.c include\nasmlib.h
+nasmlib\bsi.obj: nasmlib\bsi.c include\compiler.h include\nasmlib.h
+nasmlib\crc32.obj: nasmlib\crc32.c include\compiler.h include\hashtbl.h
+nasmlib\crc64.obj: nasmlib\crc64.c include\compiler.h include\hashtbl.h \
+ include\nctype.h
+nasmlib\errfile.obj: nasmlib\errfile.c include\compiler.h
+nasmlib\file.obj: nasmlib\file.c nasmlib\file.h
+nasmlib\filename.obj: nasmlib\filename.c include\compiler.h include\error.h \
+ include\nasmlib.h
+nasmlib\hashtbl.obj: nasmlib\hashtbl.c include\compiler.h include\hashtbl.h \
+ include\nasm.h
+nasmlib\ilog2.obj: nasmlib\ilog2.c include\ilog2.h
+nasmlib\md5c.obj: nasmlib\md5c.c include\md5.h
+nasmlib\mmap.obj: nasmlib\mmap.c nasmlib\file.h
+nasmlib\nctype.obj: nasmlib\nctype.c include\nctype.h
+nasmlib\numstr.obj: nasmlib\numstr.c include\nasmlib.h
+nasmlib\path.obj: nasmlib\path.c include\compiler.h include\error.h \
+ include\nasmlib.h
+nasmlib\perfhash.obj: nasmlib\perfhash.c include\hashtbl.h \
+ include\perfhash.h
+nasmlib\raa.obj: nasmlib\raa.c include\ilog2.h include\nasmlib.h \
+ include\raa.h
+nasmlib\rbtree.obj: nasmlib\rbtree.c include\nasmlib.h include\rbtree.h
+nasmlib\readnum.obj: nasmlib\readnum.c include\compiler.h include\error.h \
+ include\nasm.h include\nasmlib.h include\nctype.h
+nasmlib\realpath.obj: nasmlib\realpath.c include\compiler.h \
+ include\nasmlib.h
+nasmlib\rlimit.obj: nasmlib\rlimit.c include\compiler.h include\nasmlib.h
+nasmlib\saa.obj: nasmlib\saa.c include\compiler.h include\nasmlib.h \
+ include\saa.h
+nasmlib\string.obj: nasmlib\string.c include\compiler.h include\nasmlib.h \
+ include\nctype.h
+nasmlib\strlist.obj: nasmlib\strlist.c include\strlist.h
+nasmlib\ver.obj: nasmlib\ver.c include\ver.h version.h
+nasmlib\zerobuf.obj: nasmlib\zerobuf.c include\compiler.h include\nasmlib.h
+output\codeview.obj: output\codeview.c asm\preproc.h include\compiler.h \
+ include\error.h include\hashtbl.h include\md5.h include\nasm.h \
+ include\nasmlib.h include\saa.h output\outlib.h output\pecoff.h version.h
+output\legacy.obj: output\legacy.c include\nasm.h output\outlib.h
+output\nulldbg.obj: output\nulldbg.c include\nasm.h include\nasmlib.h \
+ output\outlib.h
+output\nullout.obj: output\nullout.c include\nasm.h include\nasmlib.h \
+ output\outlib.h
+output\outaout.obj: output\outaout.c asm\eval.h asm\stdscan.h \
+ include\compiler.h include\error.h include\nasm.h include\nasmlib.h \
+ include\nctype.h include\raa.h include\saa.h output\outform.h \
+ output\outlib.h
+output\outas86.obj: output\outas86.c include\compiler.h include\error.h \
+ include\nasm.h include\nasmlib.h include\nctype.h include\raa.h \
+ include\saa.h output\outform.h output\outlib.h
+output\outbin.obj: output\outbin.c asm\eval.h asm\stdscan.h \
+ include\compiler.h include\error.h include\labels.h include\nasm.h \
+ include\nasmlib.h include\nctype.h include\saa.h output\outform.h \
+ output\outlib.h
+output\outcoff.obj: output\outcoff.c asm\eval.h include\compiler.h \
+ include\error.h include\ilog2.h include\nasm.h include\nasmlib.h \
+ include\nctype.h include\raa.h include\saa.h include\ver.h output\outform.h \
+ output\outlib.h output\pecoff.h
+output\outdbg.obj: output\outdbg.c include\compiler.h include\dbginfo.h \
+ include\insns.h include\nasm.h include\nasmlib.h include\nctype.h \
+ output\outform.h output\outlib.h
+output\outelf.obj: output\outelf.c asm\eval.h asm\stdscan.h \
+ include\compiler.h include\error.h include\hashtbl.h include\nasm.h \
+ include\nasmlib.h include\raa.h include\rbtree.h include\saa.h \
+ include\ver.h output\dwarf.h output\elf.h output\outelf.h output\outform.h \
+ output\outlib.h output\stabs.h
+output\outform.obj: output\outform.c include\compiler.h output\outform.h \
+ output\outlib.h
+output\outieee.obj: output\outieee.c include\compiler.h include\error.h \
+ include\nasm.h include\nasmlib.h include\nctype.h include\ver.h \
+ output\outform.h output\outlib.h
+output\outlib.obj: output\outlib.c include\raa.h output\outlib.h
+output\outmacho.obj: output\outmacho.c include\compiler.h include\error.h \
+ include\hashtbl.h include\ilog2.h include\labels.h include\nasm.h \
+ include\nasmlib.h include\nctype.h include\raa.h include\rbtree.h \
+ include\saa.h include\ver.h output\dwarf.h output\macho.h output\outform.h \
+ output\outlib.h
+output\outobj.obj: output\outobj.c asm\eval.h asm\stdscan.h \
+ include\compiler.h include\error.h include\nasm.h include\nasmlib.h \
+ include\nctype.h include\ver.h output\outform.h output\outlib.h
+stdlib\snprintf.obj: stdlib\snprintf.c include\compiler.h include\nasmlib.h
+stdlib\strlcpy.obj: stdlib\strlcpy.c include\compiler.h
+stdlib\strnlen.obj: stdlib\strnlen.c include\compiler.h
+stdlib\strrchrnul.obj: stdlib\strrchrnul.c include\compiler.h
+stdlib\vsnprintf.obj: stdlib\vsnprintf.c include\compiler.h include\error.h \
+ include\nasmlib.h
+x86\disp8.obj: x86\disp8.c include\disp8.h
+x86\iflag.obj: x86\iflag.c include\iflag.h
+x86\insnsa.obj: x86\insnsa.c include\insns.h include\nasm.h
+x86\insnsb.obj: x86\insnsb.c include\insns.h include\nasm.h
+x86\insnsd.obj: x86\insnsd.c include\insns.h include\nasm.h
+x86\insnsn.obj: x86\insnsn.c include\tables.h
+x86\regdis.obj: x86\regdis.c x86\regdis.h
+x86\regflags.obj: x86\regflags.c include\nasm.h include\tables.h
+x86\regs.obj: x86\regs.c include\tables.h
+x86\regvals.obj: x86\regvals.c include\tables.h

_service:tar_scm:nasm-2.16.03.tar.xz/Mkfiles/openwcom.mak Added

@@ -0,0 +1,566 @@
+# -*- makefile -*-
+#
+# Makefile for building NASM using OpenWatcom
+# cross-compile on a DOS/Win32/OS2 platform host
+#
+
+top_srcdir  = .
+srcdir      = .
+VPATH       = $(srcdir)\asm;$(srcdir)\x86;asm;x86;$(srcdir)\macros;macros;$(srcdir)\output;$(srcdir)\lib;$(srcdir)\common;$(srcdir)\stdlib;$(srcdir)\nasmlib;$(srcdir)\disasm
+prefix      = C:\Program Files\NASM
+exec_prefix = $(prefix)
+bindir      = $(prefix)\bin
+mandir      = $(prefix)\man
+
+CC      = *wcl386
+DEBUG       =
+CFLAGS      = -zq -6 -ox -wx -wcd=124 -ze -fpi $(DEBUG)
+BUILD_CFLAGS    = $(CFLAGS) $(%TARGET_CFLAGS)
+INTERNAL_CFLAGS = -I$(srcdir) -I. -I$(srcdir)\include -I$(srcdir)\x86 -Ix86 -I$(srcdir)\asm -Iasm -I$(srcdir)\disasm -I$(srcdir)\output
+ALL_CFLAGS  = $(BUILD_CFLAGS) $(INTERNAL_CFLAGS)
+LD      = *wlink
+LDEBUG      =
+LDFLAGS     = op q $(%TARGET_LFLAGS) $(LDEBUG)
+LIBS        =
+STRIP       = wstrip
+
+PERL		= perl
+PERLFLAGS	= -I$(srcdir)\perllib -I$(srcdir)
+RUNPERL         = $(PERL) $(PERLFLAGS)
+
+EMPTY		= $(RUNPERL) -e ""
+
+MAKENSIS        = makensis
+
+# Binary suffixes
+O               = obj
+X               = .exe
+
+# WMAKE errors out if a suffix is declared more than once, including
+# its own built-in declarations.  Thus, we need to explicitly clear the list
+# first.  Also, WMAKE only allows implicit rules that point "to the left"
+# in this list!
+.SUFFIXES:
+.SUFFIXES: .man .1 .obj .i .c
+
+# Needed to find C files anywhere but in the current directory
+.c : $(VPATH)
+
+.c.obj:
+    @set INCLUDE=
+    $(CC) -c $(ALL_CFLAGS) -fo=$^@ $@
+
+MANIFEST =
+
+#-- Begin File Lists --#
+# Edit in Makefile.in, not here!
+NASM    = asm\nasm.obj
+NDISASM = disasm\ndisasm.obj
+
+PROGOBJ = $(NASM) $(NDISASM)
+PROGS   = nasm$(X) ndisasm$(X)
+
+LIBOBJ_NW = stdlib\snprintf.obj stdlib\vsnprintf.obj stdlib\strlcpy.obj &
+	stdlib\strnlen.obj stdlib\strrchrnul.obj &
+	&
+	nasmlib\ver.obj &
+	nasmlib\alloc.obj nasmlib\asprintf.obj nasmlib\errfile.obj &
+	nasmlib\crc32.obj nasmlib\crc64.obj nasmlib\md5c.obj &
+	nasmlib\string.obj nasmlib\nctype.obj &
+	nasmlib\file.obj nasmlib\mmap.obj nasmlib\ilog2.obj &
+	nasmlib\realpath.obj nasmlib\path.obj &
+	nasmlib\filename.obj nasmlib\rlimit.obj &
+	nasmlib\readnum.obj nasmlib\numstr.obj &
+	nasmlib\zerobuf.obj nasmlib\bsi.obj &
+	nasmlib\rbtree.obj nasmlib\hashtbl.obj &
+	nasmlib\raa.obj nasmlib\saa.obj &
+	nasmlib\strlist.obj &
+	nasmlib\perfhash.obj nasmlib\badenum.obj &
+	&
+	common\common.obj &
+	&
+	x86\insnsa.obj x86\insnsb.obj x86\insnsd.obj x86\insnsn.obj &
+	x86\regs.obj x86\regvals.obj x86\regflags.obj x86\regdis.obj &
+	x86\disp8.obj x86\iflag.obj &
+	&
+	asm\error.obj &
+	asm\floats.obj &
+	asm\directiv.obj asm\directbl.obj &
+	asm\pragma.obj &
+	asm\assemble.obj asm\labels.obj asm\parser.obj &
+	asm\preproc.obj asm\quote.obj asm\pptok.obj &
+	asm\listing.obj asm\eval.obj asm\exprlib.obj asm\exprdump.obj &
+	asm\stdscan.obj &
+	asm\strfunc.obj asm\tokhash.obj &
+	asm\segalloc.obj &
+	asm\rdstrnum.obj &
+	asm\srcfile.obj &
+	macros\macros.obj &
+	&
+	output\outform.obj output\outlib.obj output\legacy.obj &
+	output\nulldbg.obj output\nullout.obj &
+	output\outbin.obj output\outaout.obj output\outcoff.obj &
+	output\outelf.obj &
+	output\outobj.obj output\outas86.obj &
+	output\outdbg.obj output\outieee.obj output\outmacho.obj &
+	output\codeview.obj &
+	&
+	disasm\disasm.obj disasm\sync.obj
+
+# Warnings depend on all source files, so handle them separately
+WARNOBJ   = asm\warnings.obj
+WARNFILES = asm\warnings_c.h include\warnings.h doc\warnings.src
+
+LIBOBJ    = $(LIBOBJ_NW) $(WARNOBJ)
+ALLOBJ_NW = $(PROGOBJ) $(LIBOBJ_NW)
+ALLOBJ    = $(PROGOBJ) $(LIBOBJ)
+
+SUBDIRS  = stdlib nasmlib include config output asm disasm x86 &
+	   common macros
+XSUBDIRS = test doc nsis win
+DEPDIRS  = . $(SUBDIRS)
+#-- End File Lists --#
+
+what:   .SYMBOLIC
+    @echo Please build "dos", "win32", "os2" or "linux386"
+
+dos:    .SYMBOLIC
+    @set TARGET_CFLAGS=-bt=DOS -I"$(%WATCOM)\h"
+    @set TARGET_LFLAGS=sys causeway
+    @%make all
+
+win32:  .SYMBOLIC
+    @set TARGET_CFLAGS=-bt=NT -I"$(%WATCOM)\h" -I"$(%WATCOM)\h\nt"
+    @set TARGET_LFLAGS=sys nt
+    @%make all
+
+os2:    .SYMBOLIC
+    @set TARGET_CFLAGS=-bt=OS2 -I"$(%WATCOM)\h" -I"$(%WATCOM)\h\os2"
+    @set TARGET_LFLAGS=sys os2v2
+    @%make all
+
+linux386:   .SYMBOLIC
+    @set TARGET_CFLAGS=-bt=LINUX -I"$(%WATCOM)\lh"
+    @set TARGET_LFLAGS=sys linux
+    @%make all
+
+all: perlreq nasm$(X) ndisasm$(X) .SYMBOLIC
+#   cd rdoff && $(MAKE) all
+
+NASMLIB = nasm.lib
+
+nasm$(X): $(NASM) $(NASMLIB)
+    $(LD) $(LDFLAGS) name nasm$(X) libr {$(NASMLIB) $(LIBS)} file {$(NASM)}
+
+ndisasm$(X): $(NDISASM) $(LIBOBJ)
+    $(LD) $(LDFLAGS) name ndisasm$(X) libr {$(NASMLIB) $(LIBS)} file {$(NDISASM)}
+
+nasm.lib: $(LIBOBJ)
+    wlib -q -b -n $@ $(LIBOBJ)
+
+# These are specific to certain Makefile syntaxes (what are they
+# actually supposed to look like for wmake?)
+WARNTIMES = $(WARNFILES:=.time)
+WARNSRCS  = $(LIBOBJ_NW:.obj=.c)
+
+#-- Begin Generated File Rules --#
+# Edit in Makefile.in, not here!
+
+# These source files are automagically generated from data files using
+# Perl scripts. They're distributed, though, so it isn't necessary to
+# have Perl just to recompile NASM from the distribution.
+
+# Perl-generated source files
+PERLREQ_CLEANABLE = &
+	  x86\insnsb.c x86\insnsa.c x86\insnsd.c x86\insnsi.h x86\insnsn.c &
+	  x86\regs.c x86\regs.h x86\regflags.c x86\regdis.c x86\regdis.h &
+	  x86\regvals.c asm\tokhash.c asm\tokens.h asm\pptok.h asm\pptok.c &
+	  x86\iflag.c x86\iflaggen.h &
+	  macros\macros.c &
+	  asm\pptok.ph asm\directbl.c asm\directiv.h &
+	  $(WARNFILES) &
+	  misc\nasmtok.el &
+	  version.h version.mac version.mak nsis\version.nsh
+
+# Special hack to keep config\unconfig.h from getting deleted
+# by "make spotless"...
+PERLREQ = config\unconfig.h $(PERLREQ_CLEANABLE)
+
+INSDEP = x86\insns.dat x86\insns.pl x86\insns-iflags.ph x86\iflags.ph
+
+config\unconfig.h: config\config.h.in autoconf\unconfig.pl
+	$(RUNPERL) '$(srcdir)'\autoconf\unconfig.pl &
+		'$(srcdir)' config\config.h.in config\unconfig.h
+
+x86\iflag.c: $(INSDEP)
+	$(RUNPERL) $(srcdir)\x86\insns.pl -fc &
+		$(srcdir)\x86\insns.dat x86\iflag.c
+x86\iflaggen.h: $(INSDEP)
+	$(RUNPERL) $(srcdir)\x86\insns.pl -fh &
+		$(srcdir)\x86\insns.dat x86\iflaggen.h
+x86\insnsb.c: $(INSDEP)
+	$(RUNPERL) $(srcdir)\x86\insns.pl -b &
+		$(srcdir)\x86\insns.dat x86\insnsb.c
+x86\insnsa.c: $(INSDEP)
+	$(RUNPERL) $(srcdir)\x86\insns.pl -a &
+		$(srcdir)\x86\insns.dat x86\insnsa.c
+x86\insnsd.c: $(INSDEP)
+	$(RUNPERL) $(srcdir)\x86\insns.pl -d &
+		$(srcdir)\x86\insns.dat x86\insnsd.c
+x86\insnsi.h: $(INSDEP)
+	$(RUNPERL) $(srcdir)\x86\insns.pl -i &
+		$(srcdir)\x86\insns.dat x86\insnsi.h
+x86\insnsn.c: $(INSDEP)
+	$(RUNPERL) $(srcdir)\x86\insns.pl -n &
+		$(srcdir)\x86\insns.dat x86\insnsn.c
+
+# These files contains all the standard macros that are derived from
+# the version number.
+version.h: version version.pl
+	$(RUNPERL) $(srcdir)\version.pl h < $(srcdir)\version > version.h
+version.mac: version version.pl
+	$(RUNPERL) $(srcdir)\version.pl mac < $(srcdir)\version > version.mac
+version.sed: version version.pl
+	$(RUNPERL) $(srcdir)\version.pl sed < $(srcdir)\version > version.sed
+version.mak: version version.pl
+	$(RUNPERL) $(srcdir)\version.pl make < $(srcdir)\version > version.mak
+nsis\version.nsh: version version.pl
+	$(RUNPERL) $(srcdir)\version.pl nsis < $(srcdir)\version > nsis\version.nsh
+
+# This source file is generated from the standard macros file
+# `standard.mac' by another Perl script. Again, it's part of the
+# standard distribution.
+macros\macros.c: macros\macros.pl asm\pptok.ph version.mac &
+	$(srcdir)\macros\*.mac $(srcdir)\output\*.mac
+	$(RUNPERL) $(srcdir)\macros\macros.pl version.mac &
+		$(srcdir)\macros\*.mac $(srcdir)\output\*.mac
+
+# These source files are generated from regs.dat by yet another
+# perl script.
+x86\regs.c: x86\regs.dat x86\regs.pl
+	$(RUNPERL) $(srcdir)\x86\regs.pl c &
+		$(srcdir)\x86\regs.dat > x86\regs.c
+x86\regflags.c: x86\regs.dat x86\regs.pl
+	$(RUNPERL) $(srcdir)\x86\regs.pl fc &
+		$(srcdir)\x86\regs.dat > x86\regflags.c
+x86\regdis.c: x86\regs.dat x86\regs.pl
+	$(RUNPERL) $(srcdir)\x86\regs.pl dc &
+		$(srcdir)\x86\regs.dat > x86\regdis.c
+x86\regdis.h: x86\regs.dat x86\regs.pl
+	$(RUNPERL) $(srcdir)\x86\regs.pl dh &
+		$(srcdir)\x86\regs.dat > x86\regdis.h
+x86\regvals.c: x86\regs.dat x86\regs.pl
+	$(RUNPERL) $(srcdir)\x86\regs.pl vc &
+		$(srcdir)\x86\regs.dat > x86\regvals.c
+x86\regs.h: x86\regs.dat x86\regs.pl
+	$(RUNPERL) $(srcdir)\x86\regs.pl h &
+		$(srcdir)\x86\regs.dat > x86\regs.h
+
+# Extract warnings from source code. This is done automatically if any
+# C files have changed; the script is fast enough that that is
+# reasonable, but doesn't update the time stamp if the files aren't
+# changed, to avoid rebuilding everything every time. Track the actual
+# dependency by the empty file asm\warnings.time.
+.PHONY: warnings
+warnings: dirs
+	$(RM_F) $(WARNFILES) $(WARNTIMES) asm\warnings.time
+	$(MAKE) asm\warnings.time
+
+asm\warnings.time: $(WARNSRCS) asm\warnings.pl
+	$(EMPTY) asm\warnings.time
+	$(MAKE) $(WARNTIMES)
+
+asm\warnings_c.h.time: asm\warnings.pl asm\warnings.time
+	$(RUNPERL) $(srcdir)\asm\warnings.pl c asm\warnings_c.h $(srcdir)
+	$(EMPTY) asm\warnings_c.h.time
+
+asm\warnings_c.h: asm\warnings_c.h.time
+	@: Side effect
+
+include\warnings.h.time: asm\warnings.pl asm\warnings.time
+	$(RUNPERL) $(srcdir)\asm\warnings.pl h include\warnings.h $(srcdir)
+	$(EMPTY) include\warnings.h.time
+
+include\warnings.h: include\warnings.h.time
+	@: Side effect
+
+doc\warnings.src.time: asm\warnings.pl asm\warnings.time
+	$(RUNPERL) $(srcdir)\asm\warnings.pl doc doc\warnings.src $(srcdir)
+	$(EMPTY) doc\warnings.src.time
+
+doc\warnings.src : doc\warnings.src.time
+	@: Side effect
+
+# Assembler token hash
+asm\tokhash.c: x86\insns.dat x86\insnsn.c asm\tokens.dat asm\tokhash.pl &
+	perllib\phash.ph
+	$(RUNPERL) $(srcdir)\asm\tokhash.pl c &
+		x86\insnsn.c $(srcdir)\x86\regs.dat &
+		$(srcdir)\asm\tokens.dat > asm\tokhash.c
+
+# Assembler token metadata
+asm\tokens.h: x86\insns.dat x86\insnsn.c asm\tokens.dat asm\tokhash.pl &
+	perllib\phash.ph
+	$(RUNPERL) $(srcdir)\asm\tokhash.pl h &
+		x86\insnsn.c $(srcdir)\x86\regs.dat &
+		$(srcdir)\asm\tokens.dat > asm\tokens.h
+
+# Preprocessor token hash
+asm\pptok.h: asm\pptok.dat asm\pptok.pl perllib\phash.ph
+	$(RUNPERL) $(srcdir)\asm\pptok.pl h &
+		$(srcdir)\asm\pptok.dat asm\pptok.h
+asm\pptok.c: asm\pptok.dat asm\pptok.pl perllib\phash.ph
+	$(RUNPERL) $(srcdir)\asm\pptok.pl c &
+		$(srcdir)\asm\pptok.dat asm\pptok.c
+asm\pptok.ph: asm\pptok.dat asm\pptok.pl perllib\phash.ph
+	$(RUNPERL) $(srcdir)\asm\pptok.pl ph &
+		$(srcdir)\asm\pptok.dat asm\pptok.ph
+
+# Directives hash
+asm\directiv.h: asm\directiv.dat nasmlib\perfhash.pl perllib\phash.ph
+	$(RUNPERL) $(srcdir)\nasmlib\perfhash.pl h &
+		$(srcdir)\asm\directiv.dat asm\directiv.h
+asm\directbl.c: asm\directiv.dat nasmlib\perfhash.pl perllib\phash.ph
+	$(RUNPERL) $(srcdir)\nasmlib\perfhash.pl c &
+		$(srcdir)\asm\directiv.dat asm\directbl.c
+
+# Emacs token files
+misc\nasmtok.el: misc\emacstbl.pl asm\tokhash.c asm\pptok.c &
+		 asm\directiv.dat version
+	$(RUNPERL) $< $@ "$(srcdir)" "$(objdir)"
+
+#-- End Generated File Rules --#
+
+perlreq: $(PERLREQ) .SYMBOLIC
+
+#-- Begin NSIS Rules --#
+# Edit in Makefile.in, not here!
+
+nsis\arch.nsh: nsis\getpearch.pl nasm$(X)
+	$(PERL) $(srcdir)\nsis\getpearch.pl nasm$(X) > nsis\arch.nsh
+
+# Should only be done after "make everything".
+# The use of redirection here keeps makensis from moving the cwd to the
+# source directory.
+nsis: nsis\nasm.nsi nsis\arch.nsh nsis\version.nsh
+	$(MAKENSIS) -Dsrcdir="$(srcdir)" -Dobjdir="$(objdir)" - < nsis\nasm.nsi
+
+#-- End NSIS Rules --#
+
+clean: .SYMBOLIC
+    rm -f *.obj *.s *.i
+    rm -f asm\*.obj asm\*.s asm\*.i
+    rm -f x86\*.obj x86\*.s x86\*.i
+    rm -f lib\*.obj lib\*.s lib\*.i
+    rm -f macros\*.obj macros\*.s macros\*.i
+    rm -f output\*.obj output\*.s output\*.i
+    rm -f common\*.obj common\*.s common\*.i
+    rm -f stdlib\*.obj stdlib\*.s stdlib\*.i
+    rm -f nasmlib\*.obj nasmlib\*.s nasmlib\*.i
+    rm -f disasm\*.obj disasm\*.s disasm\*.i
+    rm -f config.h config.log config.status
+    rm -f nasm$(X) ndisasm$(X) $(NASMLIB)
+
+distclean: clean .SYMBOLIC
+    rm -f config.h config.log config.status
+    rm -f Makefile *~ *.bak *.lst *.bin
+    rm -f output\*~ output\*.bak
+    rm -f test\*.lst test\*.bin test\*.obj test\*.bin
+
+cleaner: clean .SYMBOLIC
+    rm -f $(PERLREQ)
+    rm -f *.man
+    rm -f nasm.spec
+#   cd doc && $(MAKE) clean
+
+spotless: distclean cleaner .SYMBOLIC
+    rm -f doc\Makefile doc\*~ doc\*.bak
+
+strip: .SYMBOLIC
+    $(STRIP) *.exe
+
+doc:
+#   cd doc && $(MAKE) all
+
+everything: all doc
+
+#
+# This build dependencies in *ALL* makefiles.  Partially for that reason,
+# it's expected to be invoked manually.
+#
+alldeps: perlreq .SYMBOLIC
+    $(PERL) syncfiles.pl Makefile.in Mkfiles\openwcom.mak
+    $(PERL) mkdep.pl -M Makefile.in Mkfiles\openwcom.mak -- . output lib
+
+#-- Magic hints to mkdep.pl --#
+# @object-ending: ".obj"
+# @path-separator: "\"
+# @exclude: "config/config.h"
+# @continuation: "&"
+#-- Everything below is generated by mkdep.pl - do not edit --#
+asm\assemble.obj: asm\assemble.c asm\assemble.h asm\listing.h &
+ include\compiler.h include\dbginfo.h include\disp8.h include\error.h &
+ include\insns.h include\nasm.h include\nasmlib.h include\tables.h
+asm\directbl.obj: asm\directbl.c asm\directiv.h
+asm\directiv.obj: asm\directiv.c asm\assemble.h asm\eval.h asm\floats.h &
+ asm\listing.h asm\preproc.h asm\stdscan.h include\compiler.h &
+ include\error.h include\iflag.h include\ilog2.h include\labels.h &
+ include\nasm.h include\nasmlib.h include\nctype.h output\outform.h
+asm\error.obj: asm\error.c include\compiler.h include\error.h &
+ include\nasmlib.h
+asm\eval.obj: asm\eval.c asm\assemble.h asm\eval.h asm\floats.h &
+ include\compiler.h include\error.h include\ilog2.h include\labels.h &
+ include\nasm.h include\nasmlib.h include\nctype.h
+asm\exprdump.obj: asm\exprdump.c include\nasm.h
+asm\exprlib.obj: asm\exprlib.c include\nasm.h
+asm\floats.obj: asm\floats.c asm\floats.h include\compiler.h include\error.h &
+ include\nasm.h include\nctype.h
+asm\labels.obj: asm\labels.c include\compiler.h include\error.h &
+ include\hashtbl.h include\labels.h include\nasm.h include\nasmlib.h
+asm\listing.obj: asm\listing.c asm\listing.h include\compiler.h &
+ include\error.h include\nasm.h include\nasmlib.h include\nctype.h &
+ include\strlist.h
+asm\nasm.obj: asm\nasm.c asm\assemble.h asm\eval.h asm\floats.h &
+ asm\listing.h asm\parser.h asm\preproc.h asm\quote.h asm\stdscan.h &
+ include\compiler.h include\error.h include\iflag.h include\insns.h &
+ include\labels.h include\nasm.h include\nasmlib.h include\nctype.h &
+ include\raa.h include\saa.h include\ver.h output\outform.h
+asm\parser.obj: asm\parser.c asm\assemble.h asm\eval.h asm\floats.h &
+ asm\parser.h asm\stdscan.h include\compiler.h include\error.h &
+ include\insns.h include\nasm.h include\nasmlib.h include\nctype.h &
+ include\tables.h
+asm\pptok.obj: asm\pptok.c asm\preproc.h include\compiler.h &
+ include\hashtbl.h include\nasmlib.h include\nctype.h
+asm\pragma.obj: asm\pragma.c asm\assemble.h asm\listing.h include\compiler.h &
+ include\error.h include\nasm.h include\nasmlib.h include\nctype.h
+asm\preproc.obj: asm\preproc.c asm\eval.h asm\listing.h asm\preproc.h &
+ asm\quote.h asm\stdscan.h asm\tokens.h include\compiler.h include\dbginfo.h &
+ include\error.h include\hashtbl.h include\nasm.h include\nasmlib.h &
+ include\nctype.h include\tables.h
+asm\quote.obj: asm\quote.c asm\quote.h include\compiler.h include\error.h &
+ include\nasmlib.h include\nctype.h
+asm\rdstrnum.obj: asm\rdstrnum.c include\compiler.h include\nasm.h &
+ include\nasmlib.h
+asm\segalloc.obj: asm\segalloc.c include\compiler.h include\insns.h &
+ include\nasm.h include\nasmlib.h
+asm\srcfile.obj: asm\srcfile.c asm\srcfile.h include\compiler.h &
+ include\hashtbl.h include\nasmlib.h
+asm\stdscan.obj: asm\stdscan.c asm\quote.h asm\stdscan.h include\compiler.h &
+ include\error.h include\insns.h include\nasm.h include\nasmlib.h &
+ include\nctype.h
+asm\strfunc.obj: asm\strfunc.c include\nasm.h include\nasmlib.h
+asm\tokhash.obj: asm\tokhash.c asm\stdscan.h include\compiler.h &
+ include\hashtbl.h include\insns.h include\nasm.h
+asm\warnings.obj: asm\warnings.c asm\warnings_c.h
+common\common.obj: common\common.c include\compiler.h include\insns.h &
+ include\nasm.h include\nasmlib.h
+disasm\disasm.obj: disasm\disasm.c disasm\disasm.h disasm\sync.h &
+ include\compiler.h include\disp8.h include\insns.h include\nasm.h &
+ include\tables.h x86\regdis.h
+disasm\ndisasm.obj: disasm\ndisasm.c disasm\disasm.h disasm\sync.h &
+ include\compiler.h include\error.h include\insns.h include\nasm.h &
+ include\nasmlib.h include\nctype.h include\ver.h
+disasm\sync.obj: disasm\sync.c disasm\sync.h include\compiler.h &
+ include\nasmlib.h
+macros\macros.obj: macros\macros.c include\hashtbl.h include\nasmlib.h &
+ include\tables.h output\outform.h
+nasmlib\alloc.obj: nasmlib\alloc.c include\compiler.h include\error.h &
+ include\nasmlib.h nasmlib\alloc.h
+nasmlib\asprintf.obj: nasmlib\asprintf.c include\compiler.h &
+ include\nasmlib.h nasmlib\alloc.h
+nasmlib\badenum.obj: nasmlib\badenum.c include\nasmlib.h
+nasmlib\bsi.obj: nasmlib\bsi.c include\compiler.h include\nasmlib.h
+nasmlib\crc32.obj: nasmlib\crc32.c include\compiler.h include\hashtbl.h
+nasmlib\crc64.obj: nasmlib\crc64.c include\compiler.h include\hashtbl.h &
+ include\nctype.h
+nasmlib\errfile.obj: nasmlib\errfile.c include\compiler.h
+nasmlib\file.obj: nasmlib\file.c nasmlib\file.h
+nasmlib\filename.obj: nasmlib\filename.c include\compiler.h include\error.h &
+ include\nasmlib.h
+nasmlib\hashtbl.obj: nasmlib\hashtbl.c include\compiler.h include\hashtbl.h &
+ include\nasm.h
+nasmlib\ilog2.obj: nasmlib\ilog2.c include\ilog2.h
+nasmlib\md5c.obj: nasmlib\md5c.c include\md5.h
+nasmlib\mmap.obj: nasmlib\mmap.c nasmlib\file.h
+nasmlib\nctype.obj: nasmlib\nctype.c include\nctype.h
+nasmlib\numstr.obj: nasmlib\numstr.c include\nasmlib.h
+nasmlib\path.obj: nasmlib\path.c include\compiler.h include\error.h &
+ include\nasmlib.h
+nasmlib\perfhash.obj: nasmlib\perfhash.c include\hashtbl.h &
+ include\perfhash.h
+nasmlib\raa.obj: nasmlib\raa.c include\ilog2.h include\nasmlib.h &
+ include\raa.h
+nasmlib\rbtree.obj: nasmlib\rbtree.c include\nasmlib.h include\rbtree.h
+nasmlib\readnum.obj: nasmlib\readnum.c include\compiler.h include\error.h &
+ include\nasm.h include\nasmlib.h include\nctype.h
+nasmlib\realpath.obj: nasmlib\realpath.c include\compiler.h &
+ include\nasmlib.h
+nasmlib\rlimit.obj: nasmlib\rlimit.c include\compiler.h include\nasmlib.h
+nasmlib\saa.obj: nasmlib\saa.c include\compiler.h include\nasmlib.h &
+ include\saa.h
+nasmlib\string.obj: nasmlib\string.c include\compiler.h include\nasmlib.h &
+ include\nctype.h
+nasmlib\strlist.obj: nasmlib\strlist.c include\strlist.h
+nasmlib\ver.obj: nasmlib\ver.c include\ver.h version.h
+nasmlib\zerobuf.obj: nasmlib\zerobuf.c include\compiler.h include\nasmlib.h
+output\codeview.obj: output\codeview.c asm\preproc.h include\compiler.h &
+ include\error.h include\hashtbl.h include\md5.h include\nasm.h &
+ include\nasmlib.h include\saa.h output\outlib.h output\pecoff.h version.h
+output\legacy.obj: output\legacy.c include\nasm.h output\outlib.h
+output\nulldbg.obj: output\nulldbg.c include\nasm.h include\nasmlib.h &
+ output\outlib.h
+output\nullout.obj: output\nullout.c include\nasm.h include\nasmlib.h &
+ output\outlib.h
+output\outaout.obj: output\outaout.c asm\eval.h asm\stdscan.h &
+ include\compiler.h include\error.h include\nasm.h include\nasmlib.h &
+ include\nctype.h include\raa.h include\saa.h output\outform.h &
+ output\outlib.h
+output\outas86.obj: output\outas86.c include\compiler.h include\error.h &
+ include\nasm.h include\nasmlib.h include\nctype.h include\raa.h &
+ include\saa.h output\outform.h output\outlib.h
+output\outbin.obj: output\outbin.c asm\eval.h asm\stdscan.h &
+ include\compiler.h include\error.h include\labels.h include\nasm.h &
+ include\nasmlib.h include\nctype.h include\saa.h output\outform.h &
+ output\outlib.h
+output\outcoff.obj: output\outcoff.c asm\eval.h include\compiler.h &
+ include\error.h include\ilog2.h include\nasm.h include\nasmlib.h &
+ include\nctype.h include\raa.h include\saa.h include\ver.h output\outform.h &
+ output\outlib.h output\pecoff.h
+output\outdbg.obj: output\outdbg.c include\compiler.h include\dbginfo.h &
+ include\insns.h include\nasm.h include\nasmlib.h include\nctype.h &
+ output\outform.h output\outlib.h
+output\outelf.obj: output\outelf.c asm\eval.h asm\stdscan.h &
+ include\compiler.h include\error.h include\hashtbl.h include\nasm.h &
+ include\nasmlib.h include\raa.h include\rbtree.h include\saa.h &
+ include\ver.h output\dwarf.h output\elf.h output\outelf.h output\outform.h &
+ output\outlib.h output\stabs.h
+output\outform.obj: output\outform.c include\compiler.h output\outform.h &
+ output\outlib.h
+output\outieee.obj: output\outieee.c include\compiler.h include\error.h &
+ include\nasm.h include\nasmlib.h include\nctype.h include\ver.h &
+ output\outform.h output\outlib.h
+output\outlib.obj: output\outlib.c include\raa.h output\outlib.h
+output\outmacho.obj: output\outmacho.c include\compiler.h include\error.h &
+ include\hashtbl.h include\ilog2.h include\labels.h include\nasm.h &
+ include\nasmlib.h include\nctype.h include\raa.h include\rbtree.h &
+ include\saa.h include\ver.h output\dwarf.h output\macho.h output\outform.h &
+ output\outlib.h
+output\outobj.obj: output\outobj.c asm\eval.h asm\stdscan.h &
+ include\compiler.h include\error.h include\nasm.h include\nasmlib.h &
+ include\nctype.h include\ver.h output\outform.h output\outlib.h
+stdlib\snprintf.obj: stdlib\snprintf.c include\compiler.h include\nasmlib.h
+stdlib\strlcpy.obj: stdlib\strlcpy.c include\compiler.h
+stdlib\strnlen.obj: stdlib\strnlen.c include\compiler.h
+stdlib\strrchrnul.obj: stdlib\strrchrnul.c include\compiler.h
+stdlib\vsnprintf.obj: stdlib\vsnprintf.c include\compiler.h include\error.h &
+ include\nasmlib.h
+x86\disp8.obj: x86\disp8.c include\disp8.h
+x86\iflag.obj: x86\iflag.c include\iflag.h
+x86\insnsa.obj: x86\insnsa.c include\insns.h include\nasm.h
+x86\insnsb.obj: x86\insnsb.c include\insns.h include\nasm.h
+x86\insnsd.obj: x86\insnsd.c include\insns.h include\nasm.h
+x86\insnsn.obj: x86\insnsn.c include\tables.h
+x86\regdis.obj: x86\regdis.c x86\regdis.h
+x86\regflags.obj: x86\regflags.c include\nasm.h include\tables.h
+x86\regs.obj: x86\regs.c include\tables.h
+x86\regvals.obj: x86\regvals.c include\tables.h

_service:tar_scm:nasm-2.16.03.tar.xz/README.md Added

_service:tar_scm:nasm-2.16.03.tar.xz/SubmittingPatches Added

@@ -0,0 +1,116 @@
+How to submit patches into the NASM
+===================================
+
+Actually the rules are pretty simple
+
+Obtaining the source code
+-------------------------
+
+The NASM sources are tracked by Git SCM at http://repo.or.cz/w/nasm.git
+repository. You either could download packed sources or use git tool itself
+
+        git clone git://repo.or.cz/nasm.git
+
+Changin the source code
+-----------------------
+
+When you change the NASM source code keep in mind -- we prefer tabs and
+indentations to be 4 characters width, space filled.
+
+Other "rules" could be learned from NASM sources -- just make your code
+to look similar.
+
+Producing patch
+---------------
+
+There are at least two ways to make it right.
+
+ 1) git format-patch
+
+    You might need to read documentation on Git SCM how to prepare patch
+    for mail submission. Take a look on http://book.git-scm.com/ and/or
+    http://git-scm.com/documentation for details. It should not be hard
+    at all.
+
+ 2) Use "diff -up"
+ 
+    Use "diff -up" or "diff -uprN" to create patches.
+
+Signing your work
+-----------------
+
+To improve tracking of who did what we've introduced a "sign-off" procedure
+on patches that are being emailed around.
+
+The sign-off is a simple line at the end of the explanation for the
+patch, which certifies that you wrote it or otherwise have the right to
+pass it on as a open-source patch.  The rules are pretty simple: if you
+can certify the below:
+
+        Developer's Certificate of Origin 1.1
+
+        By making a contribution to this project, I certify that:
+
+        (a) The contribution was created in whole or in part by me and I
+            have the right to submit it under the open source license
+            indicated in the file; or
+
+        (b) The contribution is based upon previous work that, to the best
+            of my knowledge, is covered under an appropriate open source
+            license and I have the right under that license to submit that
+            work with modifications, whether created in whole or in part
+            by me, under the same open source license (unless I am
+            permitted to submit under a different license), as indicated
+            in the file; or
+
+        (c) The contribution was provided directly to me by some other
+            person who certified (a), (b) or (c) and I have not modified
+            it.
+
+	(d) I understand and agree that this project and the contribution
+	    are public and that a record of the contribution (including all
+	    personal information I submit with it, including my sign-off) is
+	    maintained indefinitely and may be redistributed consistent with
+	    this project or the open source license(s) involved.
+
+then you just add a line saying
+
+        Signed-off-by: Random J Developer <random@developer.example.org>
+
+using your real name (please, no pseudonyms or anonymous contributions if
+it possible)
+
+An example of patch message
+---------------------------
+
+From: Random J Developer <random@developer.example.org>
+Subject: PATCH Short patch description
+
+Long patch description (could be skipped if patch
+is trivial enough)
+
+Signed-off-by: Random J Developer <random@developer.example.org>
+---
+Patch body here
+
+Mailing patches
+---------------
+
+The patches should be sent to NASM development mailing list
+
+    nasm-devel@lists.sourceforge.net
+
+Please make sure the email client you're using doesn't screw
+your patch (line wrapping and so on).
+
+Wait for response
+-----------------
+
+Be patient. Most NASM developers are pretty busy people so if
+there is no immediate response on your patch -- don't
+be surprised, sometimes a patch may fly around a week(s) before
+gets reviewed. But definitely the patches will not go to /dev/null.
+
+    ---
+    With best regards,
+    NASM-team

_service:tar_scm:nasm-2.16.03.tar.xz/asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/asm/assemble.c Added

@@ -0,0 +1,3529 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2023 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * assemble.c   code generation for the Netwide Assembler
+ *
+ * Bytecode specification
+ * ----------------------
+ *
+ *
+ * Codes            Mnemonic        Explanation
+ *
+ * \0                                       terminates the code. (Unless it's a literal of course.)
+ * \1..\4                                   that many literal bytes follow in the code stream
+ * \5                                       add 4 to the primary operand number (b, low octdigit)
+ * \6                                       add 4 to the secondary operand number (a, middle octdigit)
+ * \7                                       add 4 to both the primary and the secondary operand number
+ * \10..\13                                 a literal byte follows in the code stream, to be added
+ *                                          to the register value of operand 0..3
+ * \14..\17                                 the position of index register operand in MIB (BND insns)
+ * \20..\23         ib                      a byte immediate operand, from operand 0..3
+ * \24..\27         ib,u                    a zero-extended byte immediate operand, from operand 0..3
+ * \30..\33         iw                      a word immediate operand, from operand 0..3
+ * \34..\37         iwd                     select between \30-3 and \40-3 depending on 16/32 bit
+ *                                          assembly mode or the operand-size override on the operand
+ * \40..\43         id                      a long immediate operand, from operand 0..3
+ * \44..\47         iwdq                    select between \30-3, \40-3 and \54-7
+ *                                          depending on the address size of the instruction.
+ * \50..\53         rel8                    a byte relative operand, from operand 0..3
+ * \54..\57         iq                      a qword immediate operand, from operand 0..3
+ * \60..\63         rel16                   a word relative operand, from operand 0..3
+ * \64..\67         rel                     select between \60-3 and \70-3 depending on 16/32 bit
+ *                                          assembly mode or the operand-size override on the operand
+ * \70..\73         rel32                   a long relative operand, from operand 0..3
+ * \74..\77         seg                     a word constant, from the _segment_ part of operand 0..3
+ * \1ab             /r                      a ModRM, calculated on EA in operand a, with the reg
+ *                                          field the register value of operand b.
+ * \171\mab         /mrb (e.g /3r0)         a ModRM, with the reg field taken from operand a, and the m
+ *                                          and b fields set to the specified values.
+ * \172\ab          /is4                    the register number from operand a in bits 7..4, with
+ *                                          the 4-bit immediate from operand b in bits 3..0.
+ * \173\xab                                 the register number from operand a in bits 7..4, with
+ *                                          the value b in bits 3..0.
+ * \174..\177                               the register number from operand 0..3 in bits 7..4, and
+ *                                          an arbitrary value in bits 3..0 (assembled as zero.)
+ * \2ab             /b                      a ModRM, calculated on EA in operand a, with the reg
+ *                                          field equal to digit b.
+ * \240..\243                               this instruction uses EVEX rather than REX or VEX/XOP, with the
+ *                                          V field taken from operand 0..3.
+ * \250                                     this instruction uses EVEX rather than REX or VEX/XOP, with the
+ *                                          V field set to 1111b.
+ *
+ * EVEX prefixes are followed by the sequence:
+ * \cm\wlp\tup    where cm is:
+ *                  cc 00m mmm
+ *                  c = 2 for EVEX and mmmm is the M field (EVEX.P03:0)
+ *                and wlp is:
+ *                  00 wwl lpp
+ *                  l0  ll = 0 (.128, .lz)
+ *                  l1  ll = 1 (.256)
+ *                  l2  ll = 2 (.512)
+ *                  lig ll = 3 for EVEX.L'L don't care (always assembled as 0)
+ *
+ *                  w0  ww = 0 for W = 0
+ *                  w1  ww = 1 for W = 1
+ *                  wig ww = 2 for W don't care (always assembled as 0)
+ *                  ww  ww = 3 for W used as REX.W
+ *
+ *                  p0  pp = 0 for no prefix
+ *                  60  pp = 1 for legacy prefix 60
+ *                  f3  pp = 2
+ *                  f2  pp = 3
+ *
+ *                tup is tuple type for Disp8*N from %tuple_codes in insns.pl
+ *                    (compressed displacement encoding)
+ *
+ * \254..\257       id,s                    a signed 32-bit operand to be extended to 64 bits.
+ * \260..\263                               this instruction uses VEX/XOP rather than REX, with the
+ *                                          V field taken from operand 0..3.
+ * \270                                     this instruction uses VEX/XOP rather than REX, with the
+ *                                          V field set to 1111b.
+ * VEX/XOP prefixes are followed by the sequence:
+ * \tmm\wlp        where mm is the M field; and wlp is:
+ *                 00 wwl lpp
+ *                 l0  ll = 0 for L = 0 (.128, .lz)
+ *                 l1  ll = 1 for L = 1 (.256)
+ *                 lig ll = 2 for L don't care (always assembled as 0)
+ *
+ *                 w0  ww = 0 for W = 0
+ *                 w1  ww = 1 for W = 1
+ *                 wig ww = 2 for W don't care (always assembled as 0)
+ *                 ww  ww = 3 for W used as REX.W
+ *
+ * t = 0 for VEX (C4/C5), t = 1 for XOP (8F).
+ *
+ * \271             hlexr                       instruction takes XRELEASE (F3) with or without lock
+ * \272             hlenl                       instruction takes XACQUIRE/XRELEASE with or without lock
+ * \273             hle                         instruction takes XACQUIRE/XRELEASE with lock only
+ * \274..\277       ib,s                        a byte immediate operand, from operand 0..3, sign-extended
+ *                                              to the operand size (if o16/o32/o64 present) or the bit size
+ * \310             a16                         indicates fixed 16-bit address size, i.e. optional 0x67.
+ * \311             a32                         indicates fixed 32-bit address size, i.e. optional 0x67.
+ * \312             adf                         (disassembler only) invalid with non-default address size.
+ * \313             a64                         indicates fixed 64-bit address size, 0x67 invalid.
+ * \314             norexb                      (disassembler only) invalid with REX.B
+ * \315             norexx                      (disassembler only) invalid with REX.X
+ * \316             norexr                      (disassembler only) invalid with REX.R
+ * \317             norexw                      (disassembler only) invalid with REX.W
+ * \320             o16                         indicates fixed 16-bit operand size, i.e. optional 0x66.
+ * \321             o32                         indicates fixed 32-bit operand size, i.e. optional 0x66.
+ * \322             odf                         indicates that this instruction is only valid when the
+ *                                              operand size is the default (instruction to disassembler,
+ *                                              generates no code in the assembler)
+ * \323             o64nw                       indicates fixed 64-bit operand size, REX on extensions only.
+ * \324             o64                         indicates 64-bit operand size requiring REX prefix.
+ * \325             nohi                        instruction which always uses spl/bpl/sil/dil
+ * \326             nof3                        instruction not valid with 0xF3 REP prefix.  Hint for
+                                                disassembler only; for SSE instructions.
+ * \331             norep                       instruction not valid with REP prefix.  Hint for
+ *                                              disassembler only; for SSE instructions.
+ * \332             f2i                         REP prefix (0xF2 byte) used as opcode extension.
+ * \333             f3i                         REP prefix (0xF3 byte) used as opcode extension.
+ * \334             rex.l                       LOCK prefix used as REX.R (used in non-64-bit mode)
+ * \335             repe                        disassemble a rep (0xF3 byte) prefix as repe not rep.
+ * \336             mustrep                     force a REP(E) prefix (0xF3) even if not specified.
+ * \337             mustrepne                   force a REPNE prefix (0xF2) even if not specified.
+ *                                              \336-\337 are still listed as prefixes in the disassembler.
+ * \340             resb                        reserve <operand 0> bytes of uninitialized storage.
+ *                                              Operand 0 had better be a segmentless constant.
+ * \341             wait                        this instruction needs a WAIT "prefix"
+ * \360             np                          no SSE prefix (== \364\331)
+ * \361                                         66 SSE prefix (== \366\331)
+ * \364             !osp                        operand-size prefix (0x66) not permitted
+ * \365             !asp                        address-size prefix (0x67) not permitted
+ * \366                                         operand-size prefix (0x66) used as opcode extension
+ * \367                                         address-size prefix (0x67) used as opcode extension
+ * \370,\371        jcc8                        match only if operand 0 meets byte jump criteria.
+ *                  jmp8                        370 is used for Jcc, 371 is used for JMP.
+ * \373             jlen                        assemble 0x03 if bits==16, 0x05 if bits==32;
+ *                                              used for conditional jump over longer jump
+ * \374             vsibx|vm32x|vm64x           this instruction takes an XMM VSIB memory EA
+ * \375             vsiby|vm32y|vm64y           this instruction takes an YMM VSIB memory EA
+ * \376             vsibz|vm32z|vm64z           this instruction takes an ZMM VSIB memory EA
+ */
+
+#include "compiler.h"
+
+
+#include "nasm.h"
+#include "nasmlib.h"
+#include "error.h"
+#include "assemble.h"
+#include "insns.h"
+#include "tables.h"
+#include "disp8.h"
+#include "listing.h"
+#include "dbginfo.h"
+
+enum match_result {
+    /*
+     * Matching errors.  These should be sorted so that more specific
+     * errors come later in the sequence.
+     */
+    MERR_INVALOP,
+    MERR_OPSIZEMISSING,
+    MERR_OPSIZEMISMATCH,
+    MERR_BRNOTHERE,
+    MERR_BRNUMMISMATCH,
+    MERR_MASKNOTHERE,
+    MERR_DECONOTHERE,
+    MERR_BADCPU,
+    MERR_BADMODE,
+    MERR_BADHLE,
+    MERR_ENCMISMATCH,
+    MERR_BADBND,
+    MERR_BADREPNE,
+    MERR_REGSETSIZE,
+    MERR_REGSET,
+    /*
+     * Matching success; the conditional ones first
+     */
+    MOK_JUMP,		/* Matching OK but needs jmp_match() */
+    MOK_GOOD		/* Matching unconditionally OK */
+};
+
+typedef struct {
+    enum ea_type type;            /* what kind of EA is this? */
+    int sib_present;              /* is a SIB byte necessary? */
+    int bytes;                    /* # of bytes of offset needed */
+    int size;                     /* lazy - this is sib+bytes+1 */
+    uint8_t modrm, sib, rex, rip; /* the bytes themselves */
+    int8_t disp8;                  /* compressed displacement for EVEX */
+} ea;
+
+#define GEN_SIB(scale, index, base)                 \
+        (((scale) << 6) | ((index) << 3) | ((base)))
+
+#define GEN_MODRM(mod, reg, rm)                     \
+        (((mod) << 6) | (((reg) & 7) << 3) | ((rm) & 7))
+
+static int64_t calcsize(int32_t, int64_t, int, insn *,
+                        const struct itemplate *);
+static int emit_prefix(struct out_data *data, const int bits, insn *ins);
+static void gencode(struct out_data *data, insn *ins);
+static enum match_result find_match(const struct itemplate **tempp,
+                                    insn *instruction,
+                                    int32_t segment, int64_t offset, int bits);
+static enum match_result matches(const struct itemplate *, insn *, int bits);
+static opflags_t regflag(const operand *);
+static int32_t regval(const operand *);
+static int rexflags(int, opflags_t, int);
+static int op_rexflags(const operand *, int);
+static int op_evexflags(const operand *, int, uint8_t);
+static void add_asp(insn *, int);
+
+static int process_ea(operand *, ea *, int, int, opflags_t,
+                      insn *, enum ea_type, const char **);
+
+static inline bool absolute_op(const struct operand *o)
+{
+    return o->segment == NO_SEG && o->wrt == NO_SEG &&
+        !(o->opflags & OPFLAG_RELATIVE);
+}
+
+static int has_prefix(insn * ins, enum prefix_pos pos, int prefix)
+{
+    return ins->prefixespos == prefix;
+}
+
+static void assert_no_prefix(insn * ins, enum prefix_pos pos)
+{
+    if (ins->prefixespos)
+        nasm_nonfatal("invalid %s prefix", prefix_name(ins->prefixespos));
+}
+
+static const char *size_name(int size)
+{
+    switch (size) {
+    case 1:
+        return "byte";
+    case 2:
+        return "word";
+    case 4:
+        return "dword";
+    case 8:
+        return "qword";
+    case 10:
+        return "tword";
+    case 16:
+        return "oword";
+    case 32:
+        return "yword";
+    case 64:
+        return "zword";
+    default:
+        return "???";
+    }
+}
+
+static void warn_overflow(int size)
+{
+    nasm_warn(ERR_PASS2 | WARN_NUMBER_OVERFLOW, "%s data exceeds bounds",
+               size_name(size));
+}
+
+static void warn_overflow_const(int64_t data, int size)
+{
+    if (overflow_general(data, size))
+        warn_overflow(size);
+}
+
+static void warn_overflow_out(int64_t data, int size, enum out_flags flags)
+{
+    bool err;
+
+    if (flags & OUT_SIGNED)
+        err = overflow_signed(data, size);
+    else if (flags & OUT_UNSIGNED)
+        err = overflow_unsigned(data, size);
+    else
+        err = overflow_general(data, size);
+
+    if (err)
+        warn_overflow(size);
+}
+
+/*
+ * Collect macro-related debug information, if applicable.
+ */
+static void debug_macro_out(const struct out_data *data)
+{
+    struct debug_macro_addr *addr;
+    uint64_t start = data->offset;
+    uint64_t end  = start + data->size;
+
+    addr = debug_macro_get_addr(data->segment);
+    while (addr) {
+        if (!addr->len)
+            addr->start = start;
+        addr->len = end - addr->start;
+        addr = addr->up;
+    }
+}
+
+/*
+ * This routine wrappers the real output format's output routine,
+ * in order to pass a copy of the data off to the listing file
+ * generator at the same time, flatten unnecessary relocations,
+ * and verify backend compatibility.
+ */
+/*
+ * This warning is currently issued by backends, but in the future
+ * this code should be centralized.
+ *
+ *!zeroing on \c{RES}\e{x} in initialized section becomes zero
+ *!  a \c{RES}\e{x} directive was used in a section which contains
+ *!  initialized data, and the output format does not support
+ *!  this. Instead, this will be replaced with explicit zero
+ *!  content, which may produce a large output file.
+ */
+static void out(struct out_data *data)
+{
+    static struct last_debug_info {
+        struct src_location where;
+        int32_t segment;
+    } dbg;
+    union {
+        uint8_t b8;
+        uint64_t q;
+    } xdata;
+    size_t asize, amax;
+    uint64_t zeropad = 0;
+    int64_t addrval;
+    int32_t fixseg;             /* Segment for which to produce fixed data */
+
+    if (!data->size)
+        return;                 /* Nothing to do */
+
+    /*
+     * Convert addresses to RAWDATA if possible
+     * XXX: not all backends want this for global symbols!!!!
+     */
+    switch (data->type) {
+    case OUT_ADDRESS:
+        addrval = data->toffset;
+        fixseg = NO_SEG;        /* Absolute address is fixed data */
+        goto address;
+
+    case OUT_RELADDR:
+        addrval = data->toffset - data->relbase;
+        fixseg = data->segment; /* Our own segment is fixed data */
+        goto address;
+
+    address:
+        nasm_assert(data->size <= 8);
+        asize = data->size;
+        amax = ofmt->maxbits >> 3; /* Maximum address size in bytes */
+        if (data->tsegment == fixseg && data->twrt == NO_SEG) {
+            if (!(ofmt->flags & OFMT_KEEP_ADDR)) {
+                if (asize >= (size_t)(data->bits >> 3)) {
+                    /* Support address space wrapping for low-bit modes */
+                    data->flags &= ~OUT_SIGNMASK;
+                }
+                warn_overflow_out(addrval, asize, data->flags);
+                xdata.q = cpu_to_le64(addrval);
+                data->data = xdata.b;
+                data->type = OUT_RAWDATA;
+                asize = amax = 0;   /* No longer an address */
+            }
+        } else {
+            /*!
+             *!reloc-abs-byte off 8-bit absolute section-crossing relocation
+             *!  warns that an 8-bit absolute relocation that could
+             *!  not be resolved at assembly time was generated in
+             *!  the output format.
+             *!
+             *!  This is usually normal, but may not be handled by all
+             *!  possible target environments
+             */
+            /*!
+             *!reloc-abs-word off 16-bit absolute section-crossing relocation
+             *!  warns that a 16-bit absolute relocation that could
+             *!  not be resolved at assembly time was generated in
+             *!  the output format.
+             *!
+             *!  This is usually normal, but may not be handled by all
+             *!  possible target environments
+             */
+            /*!
+             *!reloc-abs-dword off 32-bit absolute section-crossing relocation
+             *!  warns that a 32-bit absolute relocation that could
+             *!  not be resolved at assembly time was generated in
+             *!  the output format.
+             *!
+             *!  This is usually normal, but may not be handled by all
+             *!  possible target environments
+             */
+            /*!
+             *!reloc-abs-qword off 64-bit absolute section-crossing relocation
+             *!  warns that a 64-bit absolute relocation that could
+             *!  not be resolved at assembly time was generated in
+             *!  the output format.
+             *!
+             *!  This is usually normal, but may not be handled by all
+             *!  possible target environments
+             */
+            /*!
+             *!reloc-rel-byte off 8-bit relative section-crossing relocation
+             *!  warns that an 8-bit relative relocation that could
+             *!  not be resolved at assembly time was generated in
+             *!  the output format.
+             *!
+             *!  This is usually normal, but may not be handled by all
+             *!  possible target environments
+             */
+            /*!
+             *!reloc-rel-word off 16-bit relative section-crossing relocation
+             *!  warns that a 16-bit relative relocation that could
+             *!  not be resolved at assembly time was generated in
+             *!  the output format.
+             *!
+             *!  This is usually normal, but may not be handled by all
+             *!  possible target environments
+             */
+            /*!
+             *!reloc-rel-dword off 32-bit relative section-crossing relocation
+             *!  warns that a 32-bit relative relocation that could
+             *!  not be resolved at assembly time was generated in
+             *!  the output format.
+             *!
+             *!  This is usually normal, but may not be handled by all
+             *!  possible target environments
+             */
+            /*!
+             *!reloc-rel-qword off 64-bit relative section-crossing relocation
+             *!  warns that an 64-bit relative relocation that could
+             *!  not be resolved at assembly time was generated in
+             *!  the output format.
+             *!
+             *!  This is usually normal, but may not be handled by all
+             *!  possible target environments
+             */
+            int warn;
+            const char *type;
+
+            switch (data->type) {
+            case OUT_ADDRESS:
+                type = "absolute";
+                switch (asize) {
+                case 1: warn = WARN_RELOC_ABS_BYTE; break;
+                case 2: warn = WARN_RELOC_ABS_WORD; break;
+                case 4: warn = WARN_RELOC_ABS_DWORD; break;
+                case 8: warn = WARN_RELOC_ABS_QWORD; break;
+                default: panic();
+                }
+                break;
+            case OUT_RELADDR:
+                type = "relative";
+                switch (asize) {
+                case 1: warn = WARN_RELOC_REL_BYTE; break;
+                case 2: warn = WARN_RELOC_REL_WORD; break;
+                case 4: warn = WARN_RELOC_REL_DWORD; break;
+                case 8: warn = WARN_RELOC_REL_QWORD; break;
+                default: panic();
+                }
+                break;
+            default:
+                warn = 0;
+            }
+
+            if (warn) {
+                nasm_warn(warn, "%u-bit %s section-crossing relocation",
+                          (unsigned int)(asize << 3), type);
+            }
+        }
+        break;
+
+    case OUT_SEGMENT:
+        nasm_assert(data->size <= 8);
+        asize = data->size;
+        amax = 2;
+        break;
+
+    default:
+        asize = amax = 0;       /* Not an address */
+        break;
+    }
+
+    /*
+     * If the source location or output segment has changed,
+     * let the debug backend know. Some backends really don't
+     * like being given a NULL filename as can happen if we
+     * use -Lb and expand a macro, so filter out that case.
+     */
+    data->where = src_where();
+    if (data->where.filename &&
+        (!src_location_same(data->where, dbg.where) |
+         (data->segment != dbg.segment))) {
+        dbg.where   = data->where;
+        dbg.segment = data->segment;
+        dfmt->linenum(dbg.where.filename, dbg.where.lineno, data->segment);
+    }
+
+    if (asize > amax) {
+        if (data->type == OUT_RELADDR || (data->flags & OUT_SIGNED)) {
+            nasm_nonfatal("%u-bit signed relocation unsupported by output format %s",
+                          (unsigned int)(asize << 3), ofmt->shortname);
+        } else {
+            /*!
+             *!zext-reloc on relocation zero-extended to match output format
+             *!  warns that a relocation has been zero-extended due
+             *!  to limitations in the output format.
+             */
+            nasm_warn(WARN_ZEXT_RELOC,
+                       "%u-bit %s relocation zero-extended from %u bits",
+                       (unsigned int)(asize << 3),
+                       data->type == OUT_SEGMENT ? "segment" : "unsigned",
+                       (unsigned int)(amax << 3));
+        }
+        zeropad = data->size - amax;
+        data->size = amax;
+    }
+    lfmt->output(data);
+
+    if (likely(data->segment != NO_SEG)) {
+        /*
+         * Collect macro-related information for the debugger, if applicable
+         */
+        if (debug_current_macro)
+            debug_macro_out(data);
+
+        ofmt->output(data);
+    } else {
+        /* Outputting to ABSOLUTE section - only reserve is permitted */
+        if (data->type != OUT_RESERVE)
+            nasm_nonfatal("attempt to assemble code in ABSOLUTE space");
+        /* No need to push to the backend */
+    }
+
+    data->offset  += data->size;
+    data->insoffs += data->size;
+
+    if (zeropad) {
+        data->type     = OUT_ZERODATA;
+        data->size     = zeropad;
+        lfmt->output(data);
+        ofmt->output(data);
+        data->offset  += zeropad;
+        data->insoffs += zeropad;
+        data->size    += zeropad;  /* Restore original size value */
+    }
+}
+
+static inline void out_rawdata(struct out_data *data, const void *rawdata,
+                               size_t size)
+{
+    data->type = OUT_RAWDATA;
+    data->data = rawdata;
+    data->size = size;
+    out(data);
+}
+
+static void out_rawbyte(struct out_data *data, uint8_t byte)
+{
+    data->type = OUT_RAWDATA;
+    data->data = &byte;
+    data->size = 1;
+    out(data);
+}
+
+static inline void out_reserve(struct out_data *data, uint64_t size)
+{
+    data->type = OUT_RESERVE;
+    data->size = size;
+    out(data);
+}
+
+static void out_segment(struct out_data *data, const struct operand *opx)
+{
+    if (opx->opflags & OPFLAG_RELATIVE)
+        nasm_nonfatal("segment references cannot be relative");
+
+    data->type      = OUT_SEGMENT;
+    data->flags     = OUT_UNSIGNED;
+    data->size      = 2;
+    data->toffset   = opx->offset;
+    data->tsegment  = ofmt->segbase(opx->segment | 1);
+    data->twrt      = opx->wrt;
+    out(data);
+}
+
+static void out_imm(struct out_data *data, const struct operand *opx,
+                    int size, enum out_flags sign)
+{
+    if (opx->segment != NO_SEG && (opx->segment & 1)) {
+        /*
+         * This is actually a segment reference, but eval() has
+         * already called ofmt->segbase() for us.  Sigh.
+         */
+        if (size < 2)
+            nasm_nonfatal("segment reference must be 16 bits");
+
+        data->type = OUT_SEGMENT;
+    } else {
+        data->type = (opx->opflags & OPFLAG_RELATIVE)
+            ? OUT_RELADDR : OUT_ADDRESS;
+    }
+    data->flags    = sign;
+    data->toffset  = opx->offset;
+    data->tsegment = opx->segment;
+    data->twrt     = opx->wrt;
+    /*
+     * XXX: improve this if at some point in the future we can
+     * distinguish the subtrahend in expressions like foo - bar
+     * where bar is a symbol in the current segment.  However, at the
+     * current point, if OPFLAG_RELATIVE is set that subtraction has
+     * already occurred.
+     */
+    data->relbase = 0;
+    data->size = size;
+    out(data);
+}
+
+static void out_reladdr(struct out_data *data, const struct operand *opx,
+                        int size)
+{
+    if (opx->opflags & OPFLAG_RELATIVE)
+        nasm_nonfatal("invalid use of self-relative expression");
+
+    data->type     = OUT_RELADDR;
+    data->flags    = OUT_SIGNED;
+    data->size     = size;
+    data->toffset  = opx->offset;
+    data->tsegment = opx->segment;
+    data->twrt     = opx->wrt;
+    data->relbase  = data->offset + (data->inslen - data->insoffs);
+    out(data);
+}
+
+static bool jmp_match(int32_t segment, int64_t offset, int bits,
+                      insn * ins, const struct itemplate *temp)
+{
+    int64_t isize;
+    const uint8_t *code = temp->code;
+    uint8_t c = code0;
+    bool is_byte;
+
+    if (((c & ~1) != 0370) || (ins->oprs0.type & STRICT))
+        return false;
+    if (!optimizing.level || (optimizing.flag & OPTIM_DISABLE_JMP_MATCH))
+        return false;
+    if (optimizing.level < 0 && c == 0371)
+        return false;
+
+    isize = calcsize(segment, offset, bits, ins, temp);
+
+    if (ins->oprs0.opflags & OPFLAG_UNKNOWN)
+        /* Be optimistic in pass 1 */
+        return true;
+
+    if (ins->oprs0.segment != segment)
+        return false;
+
+    isize = ins->oprs0.offset - offset - isize; /* isize is delta */
+    is_byte = (isize >= -128 && isize <= 127); /* is it byte size? */
+
+    if (is_byte && c == 0371 && ins->prefixesPPS_REP == P_BND) {
+        /* jmp short (opcode eb) cannot be used with bnd prefix. */
+        ins->prefixesPPS_REP = P_none;
+        /*!
+         *!prefix-bnd on invalid \c{BND} prefix
+         *!=bnd
+         *!  warns about ineffective use of the \c{BND} prefix when the
+         *!  \c{JMP} instruction is converted to the \c{SHORT} form.
+         *!  This should be extremely rare since the short \c{JMP} only
+         *!  is applicable to jumps inside the same module, but if
+         *!  it is legitimate, it may be necessary to use
+         *!  \c{bnd jmp dword}.
+         */
+        nasm_warn(WARN_PREFIX_BND|ERR_PASS2 ,
+                   "jmp short does not init bnd regs - bnd prefix dropped");
+    }
+
+    return is_byte;
+}
+
+static inline int64_t merge_resb(insn *ins, int64_t isize)
+{
+    int nbytes = resb_bytes(ins->opcode);
+
+    if (likely(!nbytes))
+        return isize;
+
+    if (isize != nbytes * ins->oprs0.offset)
+        return isize;           /* Has prefixes of some sort */
+
+    ins->oprs0.offset *= ins->times;
+    isize *= ins->times;
+    ins->times = 1;
+    return isize;
+}
+
+/* This must be handle non-power-of-2 alignment values */
+static inline size_t pad_bytes(size_t len, size_t align)
+{
+    size_t partial = len % align;
+    return partial ? align - partial : 0;
+}
+
+static void out_eops(struct out_data *data, const extop *e)
+{
+    while (e) {
+        size_t dup = e->dup;
+
+        switch (e->type) {
+        case EOT_NOTHING:
+            break;
+
+        case EOT_EXTOP:
+            while (dup--)
+                out_eops(data, e->val.subexpr);
+            break;
+
+        case EOT_DB_NUMBER:
+            if (e->elem > 8) {
+                nasm_nonfatal("integer supplied as %d-bit data",
+                              e->elem << 3);
+            } else {
+                while (dup--) {
+                    data->insoffs = 0;
+                    data->inslen = data->size = e->elem;
+                    data->tsegment = e->val.num.segment;
+                    data->toffset  = e->val.num.offset;
+                    data->twrt = e->val.num.wrt;
+                    data->relbase = 0;
+                    if (e->val.num.segment != NO_SEG &&
+                        (e->val.num.segment & 1)) {
+                        data->type  = OUT_SEGMENT;
+                        data->flags = OUT_UNSIGNED;
+                    } else {
+                        data->type = e->val.num.relative
+                            ? OUT_RELADDR : OUT_ADDRESS;
+                        data->flags = OUT_WRAP;
+                    }
+                    out(data);
+                }
+            }
+            break;
+
+        case EOT_DB_FLOAT:
+        case EOT_DB_STRING:
+        case EOT_DB_STRING_FREE:
+        {
+            size_t pad, len;
+
+            pad = pad_bytes(e->val.string.len, e->elem);
+            len = e->val.string.len + pad;
+
+            while (dup--) {
+                data->insoffs = 0;
+                data->inslen = len;
+                out_rawdata(data, e->val.string.data, e->val.string.len);
+                if (pad)
+                    out_rawdata(data, zero_buffer, pad);
+            }
+            break;
+        }
+
+        case EOT_DB_RESERVE:
+            data->insoffs = 0;
+            data->inslen = dup * e->elem;
+            out_reserve(data, data->inslen);
+            break;
+        }
+
+        e = e->next;
+    }
+}
+
+/* This is totally just a wild guess what is reasonable... */
+#define INCBIN_MAX_BUF (ZERO_BUF_SIZE * 16)
+
+int64_t assemble(int32_t segment, int64_t start, int bits, insn *instruction)
+{
+    struct out_data data;
+    const struct itemplate *temp;
+    enum match_result m;
+
+    if (instruction->opcode == I_none)
+        return 0;
+
+    nasm_zero(data);
+    data.offset = start;
+    data.segment = segment;
+    data.itemp = NULL;
+    data.bits = bits;
+
+    if (opcode_is_db(instruction->opcode)) {
+        out_eops(&data, instruction->eops);
+    } else if (instruction->opcode == I_INCBIN) {
+        const char *fname = instruction->eops->val.string.data;
+        FILE *fp;
+        size_t t = instruction->times; /* INCBIN handles TIMES by itself */
+        off_t base = 0;
+        off_t len;
+        const void *map = NULL;
+        char *buf = NULL;
+        size_t blk = 0;         /* Buffered I/O block size */
+        size_t m = 0;           /* Bytes last read */
+
+        if (!t)
+            goto done;
+
+        fp = nasm_open_read(fname, NF_BINARY|NF_FORMAP);
+        if (!fp) {
+            nasm_nonfatal("`incbin': unable to open file `%s'",
+                          fname);
+            goto done;
+        }
+
+        len = nasm_file_size(fp);
+
+        if (len == (off_t)-1) {
+            nasm_nonfatal("`incbin': unable to get length of file `%s'",
+                          fname);
+            goto close_done;
+        }
+
+        if (instruction->eops->next) {
+            base = instruction->eops->next->val.num.offset;
+            if (base >= len) {
+                len = 0;
+            } else {
+                len -= base;
+                if (instruction->eops->next->next &&
+                    len > (off_t)instruction->eops->next->next->val.num.offset)
+                    len = (off_t)instruction->eops->next->next->val.num.offset;
+            }
+        }
+
+        lfmt->set_offset(data.offset);
+        lfmt->uplevel(LIST_INCBIN, len);
+
+        if (!len)
+            goto end_incbin;
+
+        /* Try to map file data */
+        map = nasm_map_file(fp, base, len);
+        if (!map) {
+            blk = len < (off_t)INCBIN_MAX_BUF ? (size_t)len : INCBIN_MAX_BUF;
+            buf = nasm_malloc(blk);
+        }
+
+        while (t--) {
+            /*
+             * Consider these irrelevant for INCBIN, since it is fully
+             * possible that these might be (way) bigger than an int
+             * can hold; there is, however, no reason to widen these
+             * types just for INCBIN.  data.inslen == 0 signals to the
+             * backend that these fields are meaningless, if at all
+             * needed.
+             */
+            data.insoffs = 0;
+            data.inslen = 0;
+
+            if (map) {
+                out_rawdata(&data, map, len);
+            } else if ((off_t)m == len) {
+                out_rawdata(&data, buf, len);
+            } else {
+                off_t l = len;
+
+                if (fseeko(fp, base, SEEK_SET) < 0 || ferror(fp)) {
+                    nasm_nonfatal("`incbin': unable to seek on file `%s'",
+                                  fname);
+                    goto end_incbin;
+                }
+                while (l > 0) {
+                    m = fread(buf, 1, l < (off_t)blk ? (size_t)l : blk, fp);
+                    if (!m || feof(fp)) {
+                        /*
+                         * This shouldn't happen unless the file
+                         * actually changes while we are reading
+                         * it.
+                         */
+                        nasm_nonfatal("`incbin': unexpected EOF while"
+                                      " reading file `%s'", fname);
+                        goto end_incbin;
+                    }
+                    out_rawdata(&data, buf, m);
+                    l -= m;
+                }
+            }
+        }
+    end_incbin:
+        lfmt->downlevel(LIST_INCBIN);
+        if (instruction->times > 1) {
+            lfmt->uplevel(LIST_TIMES, instruction->times);
+            lfmt->downlevel(LIST_TIMES);
+        }
+        if (ferror(fp)) {
+            nasm_nonfatal("`incbin': error while"
+                          " reading file `%s'", fname);
+        }
+    close_done:
+        if (buf)
+            nasm_free(buf);
+        if (map)
+            nasm_unmap_file(map, len);
+        fclose(fp);
+    done:
+        instruction->times = 1; /* Tell the upper layer not to iterate */
+        ;
+    } else {
+        /* "Real" instruction */
+
+        /* Check to see if we need an address-size prefix */
+        add_asp(instruction, bits);
+
+        m = find_match(&temp, instruction, data.segment, data.offset, bits);
+
+        if (m == MOK_GOOD) {
+            /* Matches! */
+            if (unlikely(itemp_has(temp, IF_OBSOLETE))) {
+                errflags warning;
+                const char *whathappened;
+                const char *validity;
+                bool never = itemp_has(temp, IF_NEVER);
+
+                /*
+                 * If IF_OBSOLETE is set, warn the user. Different
+                 * warning classes for "obsolete but valid for this
+                 * specific CPU" and "obsolete and gone."
+                 *
+                 *!obsolete-removed on instruction obsolete and removed on the target CPU
+                 *!  warns for an instruction which has been removed
+                 *!  from the architecture, and is no longer included
+                 *!  in the CPU definition given in the \c{CPU}
+                 *!  directive, for example \c{POP CS}, the opcode for
+                 *!  which, \c{0Fh}, instead is an opcode prefix on
+                 *!  CPUs newer than the first generation 8086.
+                 *
+                 *!obsolete-nop on instruction obsolete and is a noop on the target CPU
+                 *!  warns for an instruction which has been removed
+                 *!  from the architecture, but has been architecturally
+                 *!  defined to be a noop for future CPUs.
+                 *
+                 *!obsolete-valid on instruction obsolete but valid on the target CPU
+                 *!  warns for an instruction which has been removed
+                 *!  from the architecture, but is still valid on the
+                 *!  specific CPU given in the \c{CPU} directive. Code
+                 *!  using these instructions is most likely not
+                 *!  forward compatible.
+                 */
+
+                whathappened = never ? "never implemented" : "obsolete";
+
+                if (!never && !iflag_cmp_cpu_level(&insns_flagstemp->iflag_idx, &cpu)) {
+                    warning = WARN_OBSOLETE_VALID;
+                    validity = "but valid on";
+                } else if (itemp_has(temp, IF_NOP)) {
+                    warning = WARN_OBSOLETE_NOP;
+                    validity = "and is a noop on";
+                } else {
+                    warning = WARN_OBSOLETE_REMOVED;
+                    validity = never ? "and invalid on" : "and removed from";
+                }
+
+                nasm_warn(warning, "instruction %s %s the target CPU",
+                          whathappened, validity);
+            }
+
+            data.itemp = temp;
+            data.bits = bits;
+            data.insoffs = 0;
+
+            data.inslen = calcsize(data.segment, data.offset,
+                                   bits, instruction, temp);
+            nasm_assert(data.inslen >= 0);
+            data.inslen = merge_resb(instruction, data.inslen);
+
+            gencode(&data, instruction);
+            nasm_assert(data.insoffs == data.inslen);
+        } else {
+            /* No match */
+            switch (m) {
+            case MERR_OPSIZEMISSING:
+                nasm_nonfatal("operation size not specified");
+                break;
+            case MERR_OPSIZEMISMATCH:
+                nasm_nonfatal("mismatch in operand sizes");
+                break;
+            case MERR_BRNOTHERE:
+                nasm_nonfatal("broadcast not permitted on this operand");
+                break;
+            case MERR_BRNUMMISMATCH:
+                nasm_nonfatal("mismatch in the number of broadcasting elements");
+                break;
+            case MERR_MASKNOTHERE:
+                nasm_nonfatal("mask not permitted on this operand");
+                break;
+            case MERR_DECONOTHERE:
+                nasm_nonfatal("unsupported mode decorator for instruction");
+                break;
+            case MERR_BADCPU:
+                nasm_nonfatal("no instruction for this cpu level");
+                break;
+            case MERR_BADMODE:
+                nasm_nonfatal("instruction not supported in %d-bit mode", bits);
+                break;
+            case MERR_ENCMISMATCH:
+                if (!instruction->prefixesPPS_REX) {
+                    nasm_nonfatal("instruction not encodable without explicit prefix");
+                } else {
+                    nasm_nonfatal("instruction not encodable with %s prefix",
+                                  prefix_name(instruction->prefixesPPS_REX));
+                }
+                break;
+            case MERR_BADBND:
+            case MERR_BADREPNE:
+                nasm_nonfatal("%s prefix is not allowed",
+                              prefix_name(instruction->prefixesPPS_REP));
+                break;
+            case MERR_REGSETSIZE:
+                nasm_nonfatal("invalid register set size");
+                break;
+            case MERR_REGSET:
+                nasm_nonfatal("register set not valid for operand");
+                break;
+            default:
+                nasm_nonfatal("invalid combination of opcode and operands");
+                break;
+            }
+
+            instruction->times = 1; /* Avoid repeated error messages */
+        }
+    }
+    return data.offset - start;
+}
+
+static int32_t eops_typeinfo(const extop *e)
+{
+    int32_t typeinfo = 0;
+
+    while (e) {
+        switch (e->type) {
+        case EOT_NOTHING:
+            break;
+
+        case EOT_EXTOP:
+            typeinfo |= eops_typeinfo(e->val.subexpr);
+            break;
+
+        case EOT_DB_FLOAT:
+            switch (e->elem) {
+            case  1: typeinfo |= TY_BYTE;  break;
+            case  2: typeinfo |= TY_WORD;  break;
+            case  4: typeinfo |= TY_FLOAT; break;
+            case  8: typeinfo |= TY_QWORD; break; /* double? */
+            case 10: typeinfo |= TY_TBYTE; break; /* long double? */
+            case 16: typeinfo |= TY_YWORD; break;
+            case 32: typeinfo |= TY_ZWORD; break;
+            default: break;
+            }
+            break;
+
+        default:
+            switch (e->elem) {
+            case  1: typeinfo |= TY_BYTE;  break;
+            case  2: typeinfo |= TY_WORD;  break;
+            case  4: typeinfo |= TY_DWORD; break;
+            case  8: typeinfo |= TY_QWORD; break;
+            case 10: typeinfo |= TY_TBYTE; break;
+            case 16: typeinfo |= TY_YWORD; break;
+            case 32: typeinfo |= TY_ZWORD; break;
+            default: break;
+            }
+            break;
+        }
+        e = e->next;
+    }
+
+    return typeinfo;
+}
+
+static inline void debug_set_db_type(insn *instruction)
+{
+
+    int32_t typeinfo = TYS_ELEMENTS(instruction->operands);
+
+    typeinfo |= eops_typeinfo(instruction->eops);
+    dfmt->debug_typevalue(typeinfo);
+}
+
+static void debug_set_type(insn *instruction)
+{
+    int32_t typeinfo;
+
+    if (opcode_is_resb(instruction->opcode)) {
+        typeinfo = TYS_ELEMENTS(instruction->oprs0.offset);
+
+        switch (instruction->opcode) {
+        case I_RESB:
+            typeinfo |= TY_BYTE;
+            break;
+        case I_RESW:
+            typeinfo |= TY_WORD;
+            break;
+        case I_RESD:
+            typeinfo |= TY_DWORD;
+            break;
+        case I_RESQ:
+            typeinfo |= TY_QWORD;
+            break;
+        case I_REST:
+            typeinfo |= TY_TBYTE;
+            break;
+        case I_RESO:
+            typeinfo |= TY_OWORD;
+            break;
+        case I_RESY:
+            typeinfo |= TY_YWORD;
+            break;
+        case I_RESZ:
+            typeinfo |= TY_ZWORD;
+            break;
+        default:
+            panic();
+        }
+    } else {
+        typeinfo = TY_LABEL;
+    }
+
+    dfmt->debug_typevalue(typeinfo);
+}
+
+
+/* Proecess an EQU directive */
+static void define_equ(insn * instruction)
+{
+    if (!instruction->label) {
+        nasm_nonfatal("EQU not preceded by label");
+    } else if (instruction->operands == 1 &&
+               (instruction->oprs0.type & IMMEDIATE) &&
+               instruction->oprs0.wrt == NO_SEG) {
+        define_label(instruction->label,
+                     instruction->oprs0.segment,
+                     instruction->oprs0.offset, false);
+    } else if (instruction->operands == 2
+               && (instruction->oprs0.type & IMMEDIATE)
+               && (instruction->oprs0.type & COLON)
+               && instruction->oprs0.segment == NO_SEG
+               && instruction->oprs0.wrt == NO_SEG
+               && (instruction->oprs1.type & IMMEDIATE)
+               && instruction->oprs1.segment == NO_SEG
+               && instruction->oprs1.wrt == NO_SEG) {
+        define_label(instruction->label,
+                     instruction->oprs0.offset | SEG_ABS,
+                     instruction->oprs1.offset, false);
+    } else {
+        nasm_nonfatal("bad syntax for EQU");
+    }
+}
+
+static int64_t len_extops(const extop *e)
+{
+    int64_t isize = 0;
+    size_t pad;
+
+    while (e) {
+        switch (e->type) {
+        case EOT_NOTHING:
+            break;
+
+        case EOT_EXTOP:
+            isize += e->dup * len_extops(e->val.subexpr);
+            break;
+
+        case EOT_DB_STRING:
+        case EOT_DB_STRING_FREE:
+        case EOT_DB_FLOAT:
+            pad = pad_bytes(e->val.string.len, e->elem);
+            isize += e->dup * (e->val.string.len + pad);
+            break;
+
+        case EOT_DB_NUMBER:
+            warn_overflow_const(e->val.num.offset, e->elem);
+            isize += e->dup * e->elem;
+            break;
+
+        case EOT_DB_RESERVE:
+            isize += e->dup * e->elem;
+            break;
+        }
+
+        e = e->next;
+    }
+
+    return isize;
+}
+
+int64_t insn_size(int32_t segment, int64_t offset, int bits, insn *instruction)
+{
+    const struct itemplate *temp;
+    enum match_result m;
+    int64_t isize = 0;
+
+    if (instruction->opcode == I_none) {
+        return 0;
+    } else if (instruction->opcode == I_EQU) {
+        define_equ(instruction);
+        return 0;
+    } else if (opcode_is_db(instruction->opcode)) {
+        isize = len_extops(instruction->eops);
+        debug_set_db_type(instruction);
+        return isize;
+    } else if (instruction->opcode == I_INCBIN) {
+        const extop *e = instruction->eops;
+        const char *fname = e->val.string.data;
+        off_t len;
+
+        len = nasm_file_size_by_path(fname);
+        if (len == (off_t)-1) {
+            nasm_nonfatal("`incbin': unable to get length of file `%s'",
+                          fname);
+            return 0;
+        }
+
+        e = e->next;
+        if (e) {
+            if (len <= (off_t)e->val.num.offset) {
+                len = 0;
+            } else {
+                len -= e->val.num.offset;
+                e = e->next;
+                if (e && len > (off_t)e->val.num.offset) {
+                    len = (off_t)e->val.num.offset;
+                }
+            }
+        }
+
+        len *= instruction->times;
+        instruction->times = 1; /* Tell the upper layer to not iterate */
+
+        return len;
+    } else {
+        /* Normal instruction, or RESx */
+
+        /* Check to see if we need an address-size prefix */
+        add_asp(instruction, bits);
+
+        m = find_match(&temp, instruction, segment, offset, bits);
+        if (m != MOK_GOOD)
+            return -1;              /* No match */
+
+        isize = calcsize(segment, offset, bits, instruction, temp);
+        debug_set_type(instruction);
+        isize = merge_resb(instruction, isize);
+
+        return isize;
+    }
+}
+
+static void bad_hle_warn(const insn * ins, uint8_t hleok)
+{
+    enum prefixes rep_pfx = ins->prefixesPPS_REP;
+    enum whatwarn { w_none, w_lock, w_inval } ww;
+    static const enum whatwarn warn24 =
+    {
+        { w_inval, w_inval, w_none, w_lock }, /* XACQUIRE */
+        { w_inval, w_none,  w_none, w_lock }, /* XRELEASE */
+    };
+    unsigned int n;
+
+    n = (unsigned int)rep_pfx - P_XACQUIRE;
+    if (n > 1)
+        return;                 /* Not XACQUIRE/XRELEASE */
+
+    ww = warnnhleok;
+    if (!is_class(MEMORY, ins->oprs0.type))
+        ww = w_inval;           /* HLE requires operand 0 to be memory */
+
+    /*!
+     *!prefix-hle on invalid HLE prefix
+     *!=hle
+     *!  warns about invalid use of the HLE \c{XACQUIRE} or \c{XRELEASE}
+     *!  prefixes.
+     */
+    switch (ww) {
+    case w_none:
+        break;
+
+    case w_lock:
+        if (ins->prefixesPPS_LOCK != P_LOCK) {
+            nasm_warn(WARN_PREFIX_HLE|ERR_PASS2,
+                       "%s with this instruction requires lock",
+                       prefix_name(rep_pfx));
+        }
+        break;
+
+    case w_inval:
+        nasm_warn(WARN_PREFIX_HLE|ERR_PASS2,
+                   "%s invalid with this instruction",
+                   prefix_name(rep_pfx));
+        break;
+    }
+}
+
+/* Common construct */
+#define case3(x) case (x): case (x)+1: case (x)+2
+#define case4(x) case3(x): case (x)+3
+
+static int64_t calcsize(int32_t segment, int64_t offset, int bits,
+                        insn * ins, const struct itemplate *temp)
+{
+    const uint8_t *codes = temp->code;
+    int64_t length = 0;
+    uint8_t c;
+    int rex_mask = ~0;
+    int op1, op2;
+    struct operand *opx;
+    uint8_t opex = 0;
+    enum ea_type eat;
+    uint8_t hleok = 0;
+    bool lockcheck = true;
+    enum reg_enum mib_index = R_none;   /* For a separate index reg form */
+    const char *errmsg;
+
+    ins->rex = 0;               /* Ensure REX is reset */
+    eat = EA_SCALAR;            /* Expect a scalar EA */
+    memset(ins->evex_p, 0, 3);  /* Ensure EVEX is reset */
+
+    if (ins->prefixesPPS_OSIZE == P_O64)
+        ins->rex |= REX_W;
+
+    (void)segment;              /* Don't warn that this parameter is unused */
+    (void)offset;               /* Don't warn that this parameter is unused */
+
+    while (*codes) {
+        c = *codes++;
+        op1 = (c & 3) + ((opex & 1) << 2);
+        op2 = ((c >> 3) & 3) + ((opex & 2) << 1);
+        opx = &ins->oprsop1;
+        opex = 0;               /* For the next iteration */
+
+        switch (c) {
+        case4(01):
+            codes += c, length += c;
+            break;
+
+        case3(05):
+            opex = c;
+            break;
+
+        case4(010):
+            ins->rex |=
+                op_rexflags(opx, REX_B|REX_H|REX_P|REX_W);
+            codes++, length++;
+            break;
+
+        case4(014):
+            /* this is an index reg of a split SIB operand */
+            mib_index = opx->basereg;
+            break;
+
+        case4(020):
+        case4(024):
+            length++;
+            break;
+
+        case4(030):
+            length += 2;
+            break;
+
+        case4(034):
+            if (opx->type & (BITS16 | BITS32 | BITS64))
+                length += (opx->type & BITS16) ? 2 : 4;
+            else
+                length += (bits == 16) ? 2 : 4;
+            break;
+
+        case4(040):
+            length += 4;
+            break;
+
+        case4(044):
+            length += ins->addr_size >> 3;
+            break;
+
+        case4(050):
+            length++;
+            break;
+
+        case4(054):
+            length += 8; /* MOV reg64/imm */
+            break;
+
+        case4(060):
+            length += 2;
+            break;
+
+        case4(064):
+            if (opx->type & (BITS16 | BITS32 | BITS64))
+                length += (opx->type & BITS16) ? 2 : 4;
+            else
+                length += (bits == 16) ? 2 : 4;
+            break;
+
+        case4(070):
+            length += 4;
+            break;
+
+        case4(074):
+            length += 2;
+            break;
+
+        case 0171:
+            c = *codes++;
+            op2 = (op2 & ~3) | ((c >> 3) & 3);
+            opx = &ins->oprsop2;
+            ins->rex |= op_rexflags(opx, REX_R|REX_H|REX_P|REX_W);
+            length++;
+            break;
+
+        case 0172:
+        case 0173:
+            codes++;
+            length++;
+            break;
+
+        case4(0174):
+            length++;
+            break;
+
+        case4(0240):
+            ins->rex |= REX_EV;
+            ins->vexreg = regval(opx);
+            ins->evex_p2 |= op_evexflags(opx, EVEX_P2VP, 2); /* High-16 NDS */
+            ins->vex_cm = *codes++;
+            ins->vex_wlp = *codes++;
+            ins->evex_tuple = (*codes++ - 0300);
+            break;
+
+        case 0250:
+            ins->rex |= REX_EV;
+            ins->vexreg = 0;
+            ins->vex_cm = *codes++;
+            ins->vex_wlp = *codes++;
+            ins->evex_tuple = (*codes++ - 0300);
+            break;
+
+        case4(0254):
+            length += 4;
+            break;
+
+        case4(0260):
+            ins->rex |= REX_V;
+            ins->vexreg = regval(opx);
+            ins->vex_cm = *codes++;
+            ins->vex_wlp = *codes++;
+            break;
+
+        case 0270:
+            ins->rex |= REX_V;
+            ins->vexreg = 0;
+            ins->vex_cm = *codes++;
+            ins->vex_wlp = *codes++;
+            break;
+
+        case3(0271):
+            hleok = c & 3;
+            break;
+
+        case4(0274):
+            length++;
+            break;
+
+        case4(0300):
+            break;
+
+        case 0310:
+            if (bits == 64)
+                return -1;
+            length += (bits != 16) && !has_prefix(ins, PPS_ASIZE, P_A16);
+            break;
+
+        case 0311:
+            length += (bits != 32) && !has_prefix(ins, PPS_ASIZE, P_A32);
+            break;
+
+        case 0312:
+            break;
+
+        case 0313:
+            if (bits != 64 || has_prefix(ins, PPS_ASIZE, P_A16) ||
+                has_prefix(ins, PPS_ASIZE, P_A32))
+                return -1;
+            break;
+
+        case4(0314):
+            break;
+
+        case 0320:
+        {
+            /*! prefix-opsize on invalid operand size prefix
+             *!   warns that an operand prefix (\c{o16}, \c{o32}, \c{o64},
+             *!   \c{osp}) invalid for the specified instruction has been specified.
+             *!   The operand prefix will be ignored by the assembler.
+             */
+            enum prefixes pfx = ins->prefixesPPS_OSIZE;
+            if (pfx == P_O16)
+                break;
+            if (pfx != P_none)
+                nasm_warn(WARN_PREFIX_OPSIZE|ERR_PASS2,
+                          "invalid operand size prefix, must be o16");
+            else
+                ins->prefixesPPS_OSIZE = P_O16;
+            break;
+        }
+
+        case 0321:
+        {
+            enum prefixes pfx = ins->prefixesPPS_OSIZE;
+            if (pfx == P_O32)
+                break;
+            if (pfx != P_none)
+                nasm_warn(WARN_PREFIX_OPSIZE|ERR_PASS2,
+                          "invalid operand size prefix, must be o32");
+            else
+                ins->prefixesPPS_OSIZE = P_O32;
+            break;
+        }
+
+        case 0322:
+            break;
+
+        case 0323:
+            rex_mask &= ~REX_W;
+            break;
+
+        case 0324:
+            ins->rex |= REX_W;
+            break;
+
+        case 0325:
+            ins->rex |= REX_NH;
+            break;
+
+        case 0326:
+            break;
+
+        case 0331:
+            break;
+
+        case 0332:
+        case 0333:
+            length++;
+            break;
+
+        case 0334:
+            ins->rex |= REX_L;
+            break;
+
+        case 0335:
+            break;
+
+        case 0336:
+            if (!ins->prefixesPPS_REP)
+                ins->prefixesPPS_REP = P_REP;
+            break;
+
+        case 0337:
+            if (!ins->prefixesPPS_REP)
+                ins->prefixesPPS_REP = P_REPNE;
+            break;
+
+        case 0340:
+            /*!
+             *!forward on forward reference may have unpredictable results
+             *!  warns that a forward reference is used which may have
+             *!  unpredictable results, notably in a \c{RESB}-type
+             *!  pseudo-instruction. These would be \i\e{critical
+             *!  expressions} (see \k{crit}) but are permitted in a
+             *!  handful of cases for compatibility with older
+             *!  versions of NASM. This warning should be treated as a
+             *!  severe programming error as the code could break at
+             *!  any time for any number of reasons.
+             */
+            if (!absolute_op(&ins->oprs0))
+                nasm_nonfatal("attempt to reserve non-constant"
+                              " quantity of BSS space");
+            else if (ins->oprs0.opflags & OPFLAG_FORWARD)
+                nasm_warn(WARN_FORWARD, "forward reference in RESx "
+                           "can have unpredictable results");
+            else
+                length += ins->oprs0.offset * resb_bytes(ins->opcode);
+            break;
+
+        case 0341:
+            if (!ins->prefixesPPS_WAIT)
+                ins->prefixesPPS_WAIT = P_WAIT;
+            break;
+
+        case 0360:
+            break;
+
+        case 0361:
+            length++;
+            break;
+
+        case 0364:
+        case 0365:
+            break;
+
+        case 0366:
+        case 0367:
+            length++;
+            break;
+
+        case 0370:
+        case 0371:
+            break;
+
+        case 0373:
+            length++;
+            break;
+
+        case 0374:
+            eat = EA_XMMVSIB;
+            break;
+
+        case 0375:
+            eat = EA_YMMVSIB;
+            break;
+
+        case 0376:
+            eat = EA_ZMMVSIB;
+            break;
+
+        case4(0100):
+        case4(0110):
+        case4(0120):
+        case4(0130):
+        case4(0200):
+        case4(0204):
+        case4(0210):
+        case4(0214):
+        case4(0220):
+        case4(0224):
+        case4(0230):
+        case4(0234):
+            {
+                ea ea_data;
+                int rfield;
+                opflags_t rflags;
+                struct operand *opy = &ins->oprsop2;
+                struct operand *op_er_sae;
+
+                ea_data.rex = 0;           /* Ensure ea.REX is initially 0 */
+
+                if (c <= 0177) {
+                    /* pick rfield from operand b (opx) */
+                    rflags = regflag(opx);
+                    rfield = nasm_regvalsopx->basereg;
+                } else {
+                    rflags = 0;
+                    rfield = c & 7;
+                }
+
+                /* EVEX.b1 : evex_brerop contains the operand position */
+                op_er_sae = (ins->evex_brerop >= 0 ?
+                             &ins->oprsins->evex_brerop : NULL);
+
+                if (op_er_sae && (op_er_sae->decoflags & (ER | SAE))) {
+                    /* set EVEX.b */
+                    ins->evex_p2 |= EVEX_P2B;
+                    if (op_er_sae->decoflags & ER) {
+                        /* set EVEX.RC (rounding control) */
+                        ins->evex_p2 |= ((ins->evex_rm - BRC_RN) << 5)
+                                          & EVEX_P2RC;
+                    }
+                } else {
+                    /* set EVEX.L'L (vector length) */
+                    ins->evex_p2 |= ((ins->vex_wlp << (5 - 2)) & EVEX_P2LL);
+                    ins->evex_p1 |= ((ins->vex_wlp << (7 - 4)) & EVEX_P1W);
+                    if (opy->decoflags & BRDCAST_MASK) {
+                        /* set EVEX.b */
+                        ins->evex_p2 |= EVEX_P2B;
+                    }
+                }
+
+                if (itemp_has(temp, IF_MIB)) {
+                    opy->eaflags |= EAF_MIB;
+                    /*
+                     * if a separate form of MIB (ICC style) is used,
+                     * the index reg info is merged into mem operand
+                     */
+                    if (mib_index != R_none) {
+                        opy->indexreg = mib_index;
+                        opy->scale = 1;
+                        opy->hintbase = mib_index;
+                        opy->hinttype = EAH_NOTBASE;
+                    }
+                }
+
+                /* SIB encoding required */
+                if (itemp_has(temp, IF_SIB))
+                    opy->eaflags |= EAF_SIB;
+
+                if (process_ea(opy, &ea_data, bits,
+                               rfield, rflags, ins, eat, &errmsg)) {
+                    nasm_nonfatal("%s", errmsg);
+                    return -1;
+                } else {
+                    ins->rex |= ea_data.rex;
+                    length += ea_data.size;
+                }
+            }
+            break;
+
+        default:
+            nasm_panic("internal instruction table corrupt"
+                    ": instruction code \\%o (0x%02X) given", c, c);
+            break;
+        }
+    }
+
+    ins->rex &= rex_mask;
+
+    if (ins->rex & REX_NH) {
+        if (ins->rex & REX_H) {
+            nasm_nonfatal("instruction cannot use high registers");
+            return -1;
+        }
+        ins->rex &= ~REX_P;        /* Don't force REX prefix due to high reg */
+    }
+
+    switch (ins->prefixesPPS_REX) {
+    case P_EVEX:
+        if (!(ins->rex & REX_EV))
+            return -1;
+        break;
+    case P_VEX:
+    case P_VEX3:
+    case P_VEX2:
+        if (!(ins->rex & REX_V))
+            return -1;
+        break;
+    case P_REX:
+        if (ins->rex & (REX_V|REX_EV))
+            return -1;
+        ins->rex |= REX_P;      /* Force REX prefix */
+        break;
+    default:
+        break;
+    }
+
+    if (ins->rex & (REX_V | REX_EV)) {
+        int bad32 = REX_R|REX_W|REX_X|REX_B;
+
+        if (ins->rex & REX_H) {
+            nasm_nonfatal("cannot use high register in AVX instruction");
+            return -1;
+        }
+        switch (ins->vex_wlp & 060) {
+        case 000:
+        case 040:
+            ins->rex &= ~REX_W;
+            break;
+        case 020:
+            ins->rex |= REX_W;
+            bad32 &= ~REX_W;
+            break;
+        case 060:
+            /* Follow REX_W */
+            break;
+        }
+
+        if (bits != 64 && ((ins->rex & bad32) || ins->vexreg > 7)) {
+            nasm_nonfatal("invalid operands in non-64-bit mode");
+            return -1;
+        } else if (!(ins->rex & REX_EV) &&
+                   ((ins->vexreg > 15) || (ins->evex_p0 & 0xf0))) {
+            nasm_nonfatal("invalid high-16 register in non-AVX-512");
+            return -1;
+        }
+        if (ins->rex & REX_EV) {
+            length += 4;
+        } else if (ins->vex_cm != 1 || (ins->rex & (REX_W|REX_X|REX_B)) ||
+                 ins->prefixesPPS_REX == P_VEX3) {
+            if (ins->prefixesPPS_REX == P_VEX2)
+                nasm_nonfatal("instruction not encodable with {vex2} prefix");
+            length += 3;
+        } else {
+            length += 2;
+        }
+    } else if (ins->rex & REX_MASK) {
+        if (ins->rex & REX_H) {
+            nasm_nonfatal("cannot use high byte register in rex instruction");
+            return -1;
+        } else if (bits == 64) {
+            length++;
+        } else if ((ins->rex & REX_L) &&
+                   !(ins->rex & (REX_P|REX_W|REX_X|REX_B)) &&
+                   iflag_cpu_level_ok(&cpu, IF_X86_64)) {
+            /* LOCK-as-REX.R */
+            assert_no_prefix(ins, PPS_LOCK);
+            lockcheck = false;  /* Already errored, no need for warning */
+            length++;
+        } else {
+            nasm_nonfatal("invalid operands in non-64-bit mode");
+            return -1;
+        }
+    }
+
+    if (lockcheck && has_prefix(ins, PPS_LOCK, P_LOCK)) {
+        if ((!itemp_has(temp,IF_LOCK)  || !is_class(MEMORY, ins->oprs0.type)) &&
+            (!itemp_has(temp,IF_LOCK1) || !is_class(MEMORY, ins->oprs1.type))) {
+            /*!
+             *!prefix-lock-error on \c{LOCK} prefix on unlockable instruction
+             *!=lock
+             *!  warns about \c{LOCK} prefixes on unlockable instructions.
+             */
+            nasm_warn(WARN_PREFIX_LOCK_ERROR|ERR_PASS2 , "instruction is not lockable");
+        } else if (temp->opcode == I_XCHG) {
+            /*!
+             *!prefix-lock-xchg on superfluous \c{LOCK} prefix on \c{XCHG} instruction
+             *!  warns about a \c{LOCK} prefix added to an \c{XCHG} instruction.
+             *!  The \c{XCHG} instruction is \e{always} locking, and so this
+             *!  prefix is not necessary; however, NASM will generate it if
+             *!  explicitly provided by the user, so this warning indicates that
+             *!  suboptimal code is being generated.
+             */
+            nasm_warn(WARN_PREFIX_LOCK_XCHG|ERR_PASS2,
+                      "superfluous LOCK prefix on XCHG instruction");
+        }
+    }
+
+    bad_hle_warn(ins, hleok);
+
+    /*
+     * when BND prefix is set by DEFAULT directive,
+     * BND prefix is added to every appropriate instruction line
+     * unless it is overridden by NOBND prefix.
+     */
+    if (globalbnd &&
+        (itemp_has(temp, IF_BND) && !has_prefix(ins, PPS_REP, P_NOBND)))
+            ins->prefixesPPS_REP = P_BND;
+
+    /*
+     * Add length of legacy prefixes
+     */
+    length += emit_prefix(NULL, bits, ins);
+
+    return length;
+}
+
+static inline void emit_rex(struct out_data *data, insn *ins)
+{
+    if (data->bits == 64) {
+        if ((ins->rex & REX_MASK) &&
+            !(ins->rex & (REX_V | REX_EV)) &&
+            !ins->rex_done) {
+            uint8_t rex = (ins->rex & REX_MASK) | REX_P;
+            out_rawbyte(data, rex);
+            ins->rex_done = true;
+        }
+    }
+}
+
+static int emit_prefix(struct out_data *data, const int bits, insn *ins)
+{
+    int bytes = 0;
+    int j;
+
+    for (j = 0; j < MAXPREFIX; j++) {
+        uint8_t c = 0;
+        switch (ins->prefixesj) {
+        case P_WAIT:
+            c = 0x9B;
+            break;
+        case P_LOCK:
+            c = 0xF0;
+            break;
+        case P_REPNE:
+        case P_REPNZ:
+        case P_XACQUIRE:
+        case P_BND:
+            c = 0xF2;
+            break;
+        case P_REPE:
+        case P_REPZ:
+        case P_REP:
+        case P_XRELEASE:
+            c = 0xF3;
+            break;
+        case R_CS:
+            /*!
+             *!prefix-seg on segment prefix ignored in 64-bit mode
+             *!  warns that an \c{es}, \c{cs}, \c{ss} or \c{ds} segment override
+             *!  prefix has no effect in 64-bit mode. The prefix will still be
+             *!  generated as requested.
+             */
+            if (bits == 64)
+                nasm_warn(WARN_PREFIX_SEG|ERR_PASS2, "cs segment base generated, "
+                           "but will be ignored in 64-bit mode");
+            c = 0x2E;
+            break;
+        case R_DS:
+            if (bits == 64)
+                nasm_warn(WARN_PREFIX_SEG|ERR_PASS2, "ds segment base generated, "
+                           "but will be ignored in 64-bit mode");
+            c = 0x3E;
+            break;
+        case R_ES:
+            if (bits == 64)
+                nasm_warn(WARN_PREFIX_SEG|ERR_PASS2, "es segment base generated, "
+                           "but will be ignored in 64-bit mode");
+            c = 0x26;
+            break;
+        case R_FS:
+            c = 0x64;
+            break;
+        case R_GS:
+            c = 0x65;
+            break;
+        case R_SS:
+            if (bits == 64) {
+                nasm_warn(WARN_PREFIX_SEG|ERR_PASS2, "ss segment base generated, "
+                           "but will be ignored in 64-bit mode");
+            }
+            c = 0x36;
+            break;
+        case R_SEGR6:
+        case R_SEGR7:
+            nasm_nonfatal("segr6 and segr7 cannot be used as prefixes");
+            break;
+        case P_A16:
+            if (bits == 64) {
+                nasm_nonfatal("16-bit addressing is not supported "
+                              "in 64-bit mode");
+            } else if (bits != 16)
+                c = 0x67;
+            break;
+        case P_A32:
+            if (bits != 32)
+                c = 0x67;
+            break;
+        case P_A64:
+            if (bits != 64) {
+                nasm_nonfatal("64-bit addressing is only supported "
+			      "in 64-bit mode");
+            }
+            break;
+        case P_ASP:
+            c = 0x67;
+            break;
+        case P_O16:
+            if (bits != 16)
+                c = 0x66;
+            break;
+        case P_O32:
+            if (bits == 16)
+                c = 0x66;
+            break;
+        case P_O64:
+            /* REX.W */
+            break;
+        case P_OSP:
+            c = 0x66;
+            break;
+        case P_REX:
+        case P_VEX:
+        case P_EVEX:
+        case P_VEX3:
+        case P_VEX2:
+        case P_NOBND:
+        case P_none:
+            break;
+        default:
+            nasm_panic("invalid instruction prefix");
+        }
+        if (c) {
+            if (data)
+                out_rawbyte(data, c);
+            bytes++;
+        }
+    }
+    return bytes;
+}
+
+static void gencode(struct out_data *data, insn *ins)
+{
+    uint8_t c;
+    uint8_t bytes4;
+    int64_t size;
+    int op1, op2;
+    struct operand *opx;
+    const uint8_t *codes = data->itemp->code;
+    uint8_t opex = 0;
+    enum ea_type eat = EA_SCALAR;
+    int r;
+    const int bits = data->bits;
+    const char *errmsg;
+
+    ins->rex_done = false;
+
+    emit_prefix(data, bits, ins);
+
+    while (*codes) {
+        c = *codes++;
+        op1 = (c & 3) + ((opex & 1) << 2);
+        op2 = ((c >> 3) & 3) + ((opex & 2) << 1);
+        opx = &ins->oprsop1;
+        opex = 0;                /* For the next iteration */
+
+
+        switch (c) {
+        case 01:
+        case 02:
+        case 03:
+        case 04:
+            emit_rex(data, ins);
+            out_rawdata(data, codes, c);
+            codes += c;
+            break;
+
+        case 05:
+        case 06:
+        case 07:
+            opex = c;
+            break;
+
+        case4(010):
+            emit_rex(data, ins);
+            out_rawbyte(data, *codes++ + (regval(opx) & 7));
+            break;
+
+        case4(014):
+            break;
+
+        case4(020):
+            out_imm(data, opx, 1, OUT_WRAP);
+            break;
+
+        case4(024):
+            out_imm(data, opx, 1, OUT_UNSIGNED);
+            break;
+
+        case4(030):
+            out_imm(data, opx, 2, OUT_WRAP);
+            break;
+
+        case4(034):
+            if (opx->type & (BITS16 | BITS32))
+                size = (opx->type & BITS16) ? 2 : 4;
+            else
+                size = (bits == 16) ? 2 : 4;
+            out_imm(data, opx, size, OUT_WRAP);
+            break;
+
+        case4(040):
+            out_imm(data, opx, 4, OUT_WRAP);
+            break;
+
+        case4(044):
+            size = ins->addr_size >> 3;
+            out_imm(data, opx, size, OUT_WRAP);
+            break;
+
+        case4(050):
+            if (opx->segment == data->segment) {
+                int64_t delta = opx->offset - data->offset
+                    - (data->inslen - data->insoffs);
+                if (delta > 127 || delta < -128)
+                    nasm_nonfatal("short jump is out of range");
+            }
+            out_reladdr(data, opx, 1);
+            break;
+
+        case4(054):
+            out_imm(data, opx, 8, OUT_WRAP);
+            break;
+
+        case4(060):
+            out_reladdr(data, opx, 2);
+            break;
+
+        case4(064):
+            if (opx->type & (BITS16 | BITS32 | BITS64))
+                size = (opx->type & BITS16) ? 2 : 4;
+            else
+                size = (bits == 16) ? 2 : 4;
+
+            out_reladdr(data, opx, size);
+            break;
+
+        case4(070):
+            out_reladdr(data, opx, 4);
+            break;
+
+        case4(074):
+            if (opx->segment == NO_SEG)
+                nasm_nonfatal("value referenced by FAR is not relocatable");
+            out_segment(data, opx);
+            break;
+
+        case 0171:
+            c = *codes++;
+            op2 = (op2 & ~3) | ((c >> 3) & 3);
+            opx = &ins->oprsop2;
+            r = nasm_regvalsopx->basereg;
+            c = (c & ~070) | ((r & 7) << 3);
+            out_rawbyte(data, c);
+            break;
+
+        case 0172:
+        {
+            int mask = ins->prefixesPPS_REX == P_EVEX ? 7 : 15;
+            const struct operand *opy;
+
+            c = *codes++;
+            opx = &ins->oprsc >> 3;
+            opy = &ins->oprsc & 7;
+            if (!absolute_op(opy))
+                nasm_nonfatal("non-absolute expression not permitted "
+                              "as argument %d", c & 7);
+            else if (opy->offset & ~mask)
+                nasm_warn(ERR_PASS2|WARN_NUMBER_OVERFLOW,
+                           "is4 argument exceeds bounds");
+            c = opy->offset & mask;
+            goto emit_is4;
+         }
+
+        case 0173:
+            c = *codes++;
+            opx = &ins->oprsc >> 4;
+            c &= 15;
+            goto emit_is4;
+
+        case4(0174):
+            c = 0;
+        emit_is4:
+            r = nasm_regvalsopx->basereg;
+            out_rawbyte(data, (r << 4) | ((r & 0x10) >> 1) | c);
+            break;
+
+        case4(0254):
+            if (absolute_op(opx) &&
+                (int32_t)opx->offset != (int64_t)opx->offset) {
+                nasm_warn(ERR_PASS2|WARN_NUMBER_OVERFLOW,
+                           "signed dword immediate exceeds bounds");
+            }
+            out_imm(data, opx, 4, OUT_SIGNED);
+            break;
+
+        case4(0240):
+        case 0250:
+            codes += 3;
+            ins->evex_p2 |= op_evexflags(&ins->oprs0,
+                                           EVEX_P2Z | EVEX_P2AAA, 2);
+            ins->evex_p2 ^= EVEX_P2VP;        /* 1's complement */
+            bytes0 = 0x62;
+            /* EVEX.X can be set by either REX or EVEX for different reasons */
+            bytes1 = ((((ins->rex & 7) << 5) |
+                         (ins->evex_p0 & (EVEX_P0X | EVEX_P0RP))) ^ 0xf0) |
+                       (ins->vex_cm & EVEX_P0MM);
+            bytes2 = ((ins->rex & REX_W) << (7 - 3)) |
+                       ((~ins->vexreg & 15) << 3) |
+                       (1 << 2) | (ins->vex_wlp & 3);
+            bytes3 = ins->evex_p2;
+            out_rawdata(data, bytes, 4);
+            break;
+
+        case4(0260):
+        case 0270:
+            codes += 2;
+            if (ins->vex_cm != 1 || (ins->rex & (REX_W|REX_X|REX_B)) ||
+                ins->prefixesPPS_REX == P_VEX3) {
+                bytes0 = (ins->vex_cm >> 6) ? 0x8f : 0xc4;
+                bytes1 = (ins->vex_cm & 31) | ((~ins->rex & 7) << 5);
+                bytes2 = ((ins->rex & REX_W) << (7-3)) |
+                    ((~ins->vexreg & 15)<< 3) | (ins->vex_wlp & 07);
+                out_rawdata(data, bytes, 3);
+            } else {
+                bytes0 = 0xc5;
+                bytes1 = ((~ins->rex & REX_R) << (7-2)) |
+                    ((~ins->vexreg & 15) << 3) | (ins->vex_wlp & 07);
+                out_rawdata(data, bytes, 2);
+            }
+            break;
+
+        case 0271:
+        case 0272:
+        case 0273:
+            break;
+
+        case4(0274):
+        {
+            uint64_t uv, um;
+            int s;
+
+            if (absolute_op(opx)) {
+                if (ins->rex & REX_W)
+                    s = 64;
+                else if (ins->prefixesPPS_OSIZE == P_O16)
+                    s = 16;
+                else if (ins->prefixesPPS_OSIZE == P_O32)
+                    s = 32;
+                else
+                    s = bits;
+
+                um = (uint64_t)2 << (s-1);
+                uv = opx->offset;
+
+                if (uv > 127 && uv < (uint64_t)-128 &&
+                    (uv < um-128 || uv > um-1)) {
+                    /* If this wasn't explicitly byte-sized, warn as though we
+                     * had fallen through to the imm16/32/64 case.
+                     */
+                    nasm_warn(ERR_PASS2|WARN_NUMBER_OVERFLOW,
+                               "%s value exceeds bounds",
+                               (opx->type & BITS8) ? "signed byte" :
+                               s == 16 ? "word" :
+                               s == 32 ? "dword" :
+                               "signed dword");
+                }
+
+                /* Output as a raw byte to avoid byte overflow check */
+                out_rawbyte(data, (uint8_t)uv);
+            } else {
+                out_imm(data, opx, 1, OUT_WRAP); /* XXX: OUT_SIGNED? */
+            }
+            break;
+        }
+
+        case4(0300):
+            break;
+
+        case 0310:
+            if (bits == 32 && !has_prefix(ins, PPS_ASIZE, P_A16))
+                out_rawbyte(data, 0x67);
+            break;
+
+        case 0311:
+            if (bits != 32 && !has_prefix(ins, PPS_ASIZE, P_A32))
+                out_rawbyte(data, 0x67);
+            break;
+
+        case 0312:
+            break;
+
+        case 0313:
+            break;
+
+        case4(0314):
+            break;
+
+        case 0320:
+        case 0321:
+            break;
+
+        case 0322:
+        case 0323:
+            break;
+
+        case 0324:
+            ins->rex |= REX_W;
+            break;
+
+        case 0325:
+            break;
+
+        case 0326:
+            break;
+
+        case 0331:
+            break;
+
+        case 0332:
+        case 0333:
+            out_rawbyte(data, c - 0332 + 0xF2);
+            break;
+
+        case 0334:
+            if (ins->rex & REX_R)
+                out_rawbyte(data, 0xF0);
+            ins->rex &= ~(REX_L|REX_R);
+            break;
+
+        case 0335:
+            break;
+
+        case 0336:
+        case 0337:
+            break;
+
+        case 0340:
+            if (ins->oprs0.segment != NO_SEG)
+                nasm_panic("non-constant BSS size in pass two");
+
+            out_reserve(data, ins->oprs0.offset * resb_bytes(ins->opcode));
+            break;
+
+        case 0341:
+            break;
+
+        case 0360:
+            break;
+
+        case 0361:
+            out_rawbyte(data, 0x66);
+            break;
+
+        case 0364:
+        case 0365:
+            break;
+
+        case 0366:
+        case 0367:
+            out_rawbyte(data, c - 0366 + 0x66);
+            break;
+
+        case3(0370):
+            break;
+
+        case 0373:
+            out_rawbyte(data, bits == 16 ? 3 : 5);
+            break;
+
+        case 0374:
+            eat = EA_XMMVSIB;
+            break;
+
+        case 0375:
+            eat = EA_YMMVSIB;
+            break;
+
+        case 0376:
+            eat = EA_ZMMVSIB;
+            break;
+
+        case4(0100):
+        case4(0110):
+        case4(0120):
+        case4(0130):
+        case4(0200):
+        case4(0204):
+        case4(0210):
+        case4(0214):
+        case4(0220):
+        case4(0224):
+        case4(0230):
+        case4(0234):
+            {
+                ea ea_data;
+                int rfield;
+                opflags_t rflags;
+                uint8_t *p;
+                struct operand *opy = &ins->oprsop2;
+
+                if (c <= 0177) {
+                    /* pick rfield from operand b (opx) */
+                    rflags = regflag(opx);
+                    rfield = nasm_regvalsopx->basereg;
+                } else {
+                    /* rfield is constant */
+                    rflags = 0;
+                    rfield = c & 7;
+                }
+
+                if (process_ea(opy, &ea_data, bits,
+                               rfield, rflags, ins, eat, &errmsg))
+                    nasm_nonfatal("%s", errmsg);
+
+                p = bytes;
+                *p++ = ea_data.modrm;
+                if (ea_data.sib_present)
+                    *p++ = ea_data.sib;
+                out_rawdata(data, bytes, p - bytes);
+
+                /*
+                 * Make sure the address gets the right offset in case
+                 * the line breaks in the .lst file (BR 1197827)
+                 */
+
+                if (ea_data.bytes) {
+                    /* use compressed displacement, if available */
+                    if (ea_data.disp8) {
+                        out_rawbyte(data, ea_data.disp8);
+                    } else if (ea_data.rip) {
+                        out_reladdr(data, opy, ea_data.bytes);
+                    } else {
+                        int asize = ins->addr_size >> 3;
+
+                        if (overflow_general(opy->offset, asize) ||
+                            signed_bits(opy->offset, ins->addr_size) !=
+                            signed_bits(opy->offset, ea_data.bytes << 3))
+                            warn_overflow(ea_data.bytes);
+
+                        out_imm(data, opy, ea_data.bytes,
+                                (asize > ea_data.bytes)
+                                ? OUT_SIGNED : OUT_WRAP);
+                    }
+                }
+            }
+            break;
+
+        default:
+            nasm_panic("internal instruction table corrupt"
+                    ": instruction code \\%o (0x%02X) given", c, c);
+            break;
+        }
+    }
+}
+
+static opflags_t regflag(const operand * o)
+{
+    if (!is_register(o->basereg))
+        nasm_panic("invalid operand passed to regflag()");
+    return nasm_reg_flagso->basereg;
+}
+
+static int32_t regval(const operand * o)
+{
+    if (!is_register(o->basereg))
+        nasm_panic("invalid operand passed to regval()");
+    return nasm_regvalso->basereg;
+}
+
+static int op_rexflags(const operand * o, int mask)
+{
+    opflags_t flags;
+    int val;
+
+    if (!is_register(o->basereg))
+        nasm_panic("invalid operand passed to op_rexflags()");
+
+    flags = nasm_reg_flagso->basereg;
+    val = nasm_regvalso->basereg;
+
+    return rexflags(val, flags, mask);
+}
+
+static int rexflags(int val, opflags_t flags, int mask)
+{
+    int rex = 0;
+
+    if (val >= 0 && (val & 8))
+        rex |= REX_B|REX_X|REX_R;
+    if (flags & BITS64)
+        rex |= REX_W;
+    if (!(REG_HIGH & ~flags))                   /* AH, CH, DH, BH */
+        rex |= REX_H;
+    else if (!(REG8 & ~flags) && val >= 4)      /* SPL, BPL, SIL, DIL */
+        rex |= REX_P;
+
+    return rex & mask;
+}
+
+static int evexflags(int val, decoflags_t deco,
+                     int mask, uint8_t byte)
+{
+    int evex = 0;
+
+    switch (byte) {
+    case 0:
+        if (val >= 0 && (val & 16))
+            evex |= (EVEX_P0RP | EVEX_P0X);
+        break;
+    case 2:
+        if (val >= 0 && (val & 16))
+            evex |= EVEX_P2VP;
+        if (deco & Z)
+            evex |= EVEX_P2Z;
+        if (deco & OPMASK_MASK)
+            evex |= deco & EVEX_P2AAA;
+        break;
+    }
+    return evex & mask;
+}
+
+static int op_evexflags(const operand * o, int mask, uint8_t byte)
+{
+    int val;
+
+    val = nasm_regvalso->basereg;
+
+    return evexflags(val, o->decoflags, mask, byte);
+}
+
+static enum match_result find_match(const struct itemplate **tempp,
+                                    insn *instruction,
+                                    int32_t segment, int64_t offset, int bits)
+{
+    const struct itemplate *temp;
+    enum match_result m, merr;
+    opflags_t xsizeflagsMAX_OPERANDS;
+    bool opsizemissing = false;
+    int8_t broadcast = instruction->evex_brerop;
+    int i;
+
+    /* broadcasting uses a different data element size */
+    for (i = 0; i < instruction->operands; i++) {
+        if (i == broadcast)
+            xsizeflagsi = instruction->oprsi.decoflags & BRSIZE_MASK;
+        else
+            xsizeflagsi = instruction->oprsi.type & SIZE_MASK;
+    }
+
+    merr = MERR_INVALOP;
+
+    for (temp = nasm_instructionsinstruction->opcode;
+         temp->opcode != I_none; temp++) {
+        m = matches(temp, instruction, bits);
+        if (m == MOK_JUMP) {
+            if (jmp_match(segment, offset, bits, instruction, temp))
+                m = MOK_GOOD;
+            else
+                m = MERR_INVALOP;
+        } else if (m == MERR_OPSIZEMISSING && !itemp_has(temp, IF_SX)) {
+            /*
+             * Missing operand size and a candidate for fuzzy matching...
+             */
+            for (i = 0; i < temp->operands; i++)
+                if (i == broadcast)
+                    xsizeflagsi |= temp->decoi & BRSIZE_MASK;
+                else
+                    xsizeflagsi |= temp->opdi & SIZE_MASK;
+            opsizemissing = true;
+        }
+        if (m > merr)
+            merr = m;
+        if (merr == MOK_GOOD)
+            goto done;
+    }
+
+    /* No match, but see if we can get a fuzzy operand size match... */
+    if (!opsizemissing)
+        goto done;
+
+    for (i = 0; i < instruction->operands; i++) {
+        /*
+         * We ignore extrinsic operand sizes on registers, so we should
+         * never try to fuzzy-match on them.  This also resolves the case
+         * when we have e.g. "xmmrm128" in two different positions.
+         */
+        if (is_class(REGISTER, instruction->oprsi.type))
+            continue;
+
+        /* This tests if xsizeflagsi has more than one bit set */
+        if ((xsizeflagsi & (xsizeflagsi-1)))
+            goto done;                /* No luck */
+
+        if (i == broadcast) {
+            instruction->oprsi.decoflags |= xsizeflagsi;
+            instruction->oprsi.type |= brsize_to_size(xsizeflagsi);
+        } else {
+            instruction->oprsi.type |= xsizeflagsi; /* Set the size */
+        }
+    }
+
+    /* Try matching again... */
+    for (temp = nasm_instructionsinstruction->opcode;
+         temp->opcode != I_none; temp++) {
+        m = matches(temp, instruction, bits);
+        if (m == MOK_JUMP) {
+            if (jmp_match(segment, offset, bits, instruction, temp))
+                m = MOK_GOOD;
+            else
+                m = MERR_INVALOP;
+        }
+        if (m > merr)
+            merr = m;
+        if (merr == MOK_GOOD)
+            goto done;
+    }
+
+done:
+    *tempp = temp;
+    return merr;
+}
+
+static uint8_t get_broadcast_num(opflags_t opflags, opflags_t brsize)
+{
+    unsigned int opsize = (opflags & SIZE_MASK) >> SIZE_SHIFT;
+    uint8_t brcast_num;
+
+    if (brsize > BITS64)
+        nasm_fatal("size of broadcasting element is greater than 64 bits");
+
+    /*
+     * The shift term is to take care of the extra BITS80 inserted
+     * between BITS64 and BITS128.
+     */
+    brcast_num = ((opsize / (BITS64 >> SIZE_SHIFT)) * (BITS64 / brsize))
+        >> (opsize > (BITS64 >> SIZE_SHIFT));
+
+    return brcast_num;
+}
+
+static enum match_result matches(const struct itemplate *itemp,
+                                 insn *instruction, int bits)
+{
+    opflags_t sizeMAX_OPERANDS, asize;
+    bool opsizemissing = false;
+    int i, oprs;
+
+    /*
+     * Check the opcode
+     */
+    if (itemp->opcode != instruction->opcode)
+        return MERR_INVALOP;
+
+    /*
+     * Count the operands
+     */
+    if (itemp->operands != instruction->operands)
+        return MERR_INVALOP;
+
+    /*
+     * Is it legal?
+     */
+    if (!(optimizing.level > 0) && itemp_has(itemp, IF_OPT))
+	return MERR_INVALOP;
+
+    /*
+     * {rex/vexn/evex} available?
+     */
+    switch (instruction->prefixesPPS_REX) {
+    case P_EVEX:
+        if (!itemp_has(itemp, IF_EVEX))
+            return MERR_ENCMISMATCH;
+        break;
+    case P_VEX:
+    case P_VEX3:
+    case P_VEX2:
+        if (!itemp_has(itemp, IF_VEX))
+            return MERR_ENCMISMATCH;
+        break;
+    case P_REX:
+        if (itemp_has(itemp, IF_VEX) || itemp_has(itemp, IF_EVEX) ||
+            bits != 64)
+            return MERR_ENCMISMATCH;
+        break;
+    default:
+        if (itemp_has(itemp, IF_EVEX)) {
+            if (!iflag_test(&cpu, IF_EVEX))
+                return MERR_ENCMISMATCH;
+        } else if (itemp_has(itemp, IF_VEX)) {
+            if (!iflag_test(&cpu, IF_VEX)) {
+                return MERR_ENCMISMATCH;
+            } else if (itemp_has(itemp, IF_LATEVEX)) {
+                if (!iflag_test(&cpu, IF_LATEVEX) && iflag_test(&cpu, IF_EVEX))
+                    return MERR_ENCMISMATCH;
+            }
+        }
+        break;
+    }
+
+    /*
+     * Check that no spurious colons or TOs are present
+     */
+    for (i = 0; i < itemp->operands; i++)
+        if (instruction->oprsi.type & ~itemp->opdi & (COLON | TO))
+            return MERR_INVALOP;
+
+    /*
+     * Process size flags
+     */
+    switch (itemp_smask(itemp)) {
+    case IF_GENBIT(IF_SB):
+        asize = BITS8;
+        break;
+    case IF_GENBIT(IF_SW):
+        asize = BITS16;
+        break;
+    case IF_GENBIT(IF_SD):
+        asize = BITS32;
+        break;
+    case IF_GENBIT(IF_SQ):
+        asize = BITS64;
+        break;
+    case IF_GENBIT(IF_SO):
+        asize = BITS128;
+        break;
+    case IF_GENBIT(IF_SY):
+        asize = BITS256;
+        break;
+    case IF_GENBIT(IF_SZ):
+        asize = BITS512;
+        break;
+    case IF_GENBIT(IF_ANYSIZE):
+        asize = SIZE_MASK;
+        break;
+    case IF_GENBIT(IF_SIZE):
+        switch (bits) {
+        case 16:
+            asize = BITS16;
+            break;
+        case 32:
+            asize = BITS32;
+            break;
+        case 64:
+            asize = BITS64;
+            break;
+        default:
+            asize = 0;
+            break;
+        }
+        break;
+    default:
+        asize = 0;
+        break;
+    }
+
+    if (itemp_armask(itemp)) {
+        /* S- flags only apply to a specific operand */
+        i = itemp_arg(itemp);
+        memset(size, 0, sizeof size);
+        sizei = asize;
+    } else {
+        /* S- flags apply to all operands */
+        for (i = 0; i < MAX_OPERANDS; i++)
+            sizei = asize;
+    }
+
+    /*
+     * Check that the operand flags all match up,
+     * it's a bit tricky so lets be verbose:
+     *
+     * 1) Find out the size of operand. If instruction
+     *    doesn't have one specified -- we're trying to
+     *    guess it either from template (IF_S* flag) or
+     *    from code bits.
+     *
+     * 2) If template operand do not match the instruction OR
+     *    template has an operand size specified AND this size differ
+     *    from which instruction has (perhaps we got it from code bits)
+     *    we are:
+     *      a)  Check that only size of instruction and operand is differ
+     *          other characteristics do match
+     *      b)  Perhaps it's a register specified in instruction so
+     *          for such a case we just mark that operand as "size
+     *          missing" and this will turn on fuzzy operand size
+     *          logic facility (handled by a caller)
+     */
+    for (i = 0; i < itemp->operands; i++) {
+        opflags_t type = instruction->oprsi.type;
+        decoflags_t deco = instruction->oprsi.decoflags;
+        decoflags_t ideco = itemp->decoi;
+        bool is_broadcast = deco & BRDCAST_MASK;
+        uint8_t brcast_num = 0;
+        opflags_t template_opsize, insn_opsize;
+
+        if (!(type & SIZE_MASK))
+            type |= sizei;
+
+        insn_opsize     = type & SIZE_MASK;
+        if (!is_broadcast) {
+            template_opsize = itemp->opdi & SIZE_MASK;
+        } else {
+            decoflags_t deco_brsize = ideco & BRSIZE_MASK;
+
+            if (~ideco & BRDCAST_MASK)
+                return MERR_BRNOTHERE;
+
+            /*
+             * when broadcasting, the element size depends on
+             * the instruction type. decorator flag should match.
+             */
+            if (deco_brsize) {
+                template_opsize = brsize_to_size(deco_brsize);
+                /* calculate the proper number : {1to<brcast_num>} */
+                brcast_num = get_broadcast_num(itemp->opdi, template_opsize);
+            } else {
+                template_opsize = 0;
+            }
+        }
+
+        if (~ideco & deco & OPMASK_MASK)
+            return MERR_MASKNOTHERE;
+
+        if (~ideco & deco & (Z_MASK|STATICRND_MASK|SAE_MASK))
+            return MERR_DECONOTHERE;
+
+        if (itemp->opdi & ~type & ~(SIZE_MASK|REGSET_MASK))
+            return MERR_INVALOP;
+
+        if (~itemp->opdi & type & REGSET_MASK)
+            return (itemp->opdi & REGSET_MASK)
+                ? MERR_REGSETSIZE : MERR_REGSET;
+
+        if (template_opsize) {
+            if (template_opsize != insn_opsize) {
+                if (insn_opsize) {
+                    return MERR_INVALOP;
+                } else if (!is_class(REGISTER, type)) {
+                    /*
+                     * Note: we don't honor extrinsic operand sizes for registers,
+                     * so "missing operand size" for a register should be
+                     * considered a wildcard match rather than an error.
+                     */
+                    opsizemissing = true;
+                } else if (is_class(REG_HIGH, type) &&
+                           instruction->prefixesPPS_REX) {
+                    return MERR_ENCMISMATCH;
+                }
+            } else if (is_broadcast &&
+                       (brcast_num !=
+                        (2U << ((deco & BRNUM_MASK) >> BRNUM_SHIFT)))) {
+                /*
+                 * broadcasting opsize matches but the number of repeated memory
+                 * element does not match.
+                 * if 64b double precision float is broadcasted to ymm (256b),
+                 * broadcasting decorator must be {1to4}.
+                 */
+                return MERR_BRNUMMISMATCH;
+            }
+        }
+    }
+
+    if (opsizemissing)
+        return MERR_OPSIZEMISSING;
+
+    /*
+     * Check operand sizes
+     */
+    if (itemp_has(itemp, IF_SM) || itemp_has(itemp, IF_SM2)) {
+        oprs = (itemp_has(itemp, IF_SM2) ? 2 : itemp->operands);
+        for (i = 0; i < oprs; i++) {
+            asize = itemp->opdi & SIZE_MASK;
+            if (asize) {
+                for (i = 0; i < oprs; i++)
+                    sizei = asize;
+                break;
+            }
+        }
+    } else {
+        oprs = itemp->operands;
+    }
+
+    for (i = 0; i < itemp->operands; i++) {
+        if (!(itemp->opdi & SIZE_MASK) &&
+            (instruction->oprsi.type & SIZE_MASK & ~sizei))
+            return MERR_OPSIZEMISMATCH;
+    }
+
+    /*
+     * Check template is okay at the set cpu level
+     */
+    if (iflag_cmp_cpu_level(&insns_flagsitemp->iflag_idx, &cpu) > 0)
+        return MERR_BADCPU;
+
+    /*
+     * Verify the appropriate long mode flag.
+     */
+    if (itemp_has(itemp, (bits == 64 ? IF_NOLONG : IF_LONG)))
+        return MERR_BADMODE;
+
+    /*
+     * If we have a HLE prefix, look for the NOHLE flag
+     */
+    if (itemp_has(itemp, IF_NOHLE) &&
+        (has_prefix(instruction, PPS_REP, P_XACQUIRE) ||
+         has_prefix(instruction, PPS_REP, P_XRELEASE)))
+        return MERR_BADHLE;
+
+    /*
+     * Check if special handling needed for Jumps
+     */
+    if ((itemp->code0 & ~1) == 0370)
+        return MOK_JUMP;
+
+    /*
+     * Check if BND prefix is allowed.
+     * Other 0xF2 (REPNE/REPNZ) prefix is prohibited.
+     */
+    if (!itemp_has(itemp, IF_BND) &&
+        (has_prefix(instruction, PPS_REP, P_BND) ||
+         has_prefix(instruction, PPS_REP, P_NOBND)))
+        return MERR_BADBND;
+    else if (itemp_has(itemp, IF_BND) &&
+             (has_prefix(instruction, PPS_REP, P_REPNE) ||
+              has_prefix(instruction, PPS_REP, P_REPNZ)))
+        return MERR_BADREPNE;
+
+    return MOK_GOOD;
+}
+
+/*
+ * Check if ModR/M.mod should/can be 01.
+ * - EAF_BYTEOFFS is set
+ * - offset can fit in a byte when EVEX is not used
+ * - offset can be compressed when EVEX is used
+ */
+#define IS_MOD_01() (!(input->eaflags & EAF_WORDOFFS) &&               \
+                    (ins->rex & REX_EV ? seg == NO_SEG && !forw_ref && \
+                     is_disp8n(input, ins, &output->disp8) :           \
+                     input->eaflags & EAF_BYTEOFFS || (o >= -128 &&    \
+                     o <= 127 && seg == NO_SEG && !forw_ref)))
+
+static int process_ea(operand *input, ea *output, int bits,
+                      int rfield, opflags_t rflags, insn *ins,
+                      enum ea_type expected, const char **errmsgp)
+{
+    bool forw_ref = !!(input->opflags & OPFLAG_UNKNOWN);
+    const int addrbits = ins->addr_size;
+    const int eaflags = input->eaflags;
+    const char *errmsg = NULL;
+
+    errmsg = NULL;
+
+    output->type    = EA_SCALAR;
+    output->rip     = false;
+    output->disp8   = 0;
+
+    /* REX flags for the rfield operand */
+    output->rex     |= rexflags(rfield, rflags, REX_R | REX_P | REX_W | REX_H);
+    /* EVEX.R' flag for the REG operand */
+    ins->evex_p0  |= evexflags(rfield, 0, EVEX_P0RP, 0);
+
+    if (is_class(REGISTER, input->type)) {
+        /*
+         * It's a direct register.
+         */
+        if (!is_register(input->basereg))
+            goto err;
+
+        if (!is_reg_class(REG_EA, input->basereg))
+            goto err;
+
+        /* broadcasting is not available with a direct register operand. */
+        if (input->decoflags & BRDCAST_MASK) {
+            errmsg = "broadcast not allowed with register operand";
+            goto err;
+        }
+
+        output->rex         |= op_rexflags(input, REX_B | REX_P | REX_W | REX_H);
+        ins->evex_p0      |= op_evexflags(input, EVEX_P0X, 0);
+        output->sib_present = false;    /* no SIB necessary */
+        output->bytes       = 0;        /* no offset necessary either */
+        output->modrm       = GEN_MODRM(3, rfield, nasm_regvalsinput->basereg);
+    } else {
+        /*
+         * It's a memory reference.
+         */
+
+        /* Embedded rounding or SAE is not available with a mem ref operand. */
+        if (input->decoflags & (ER | SAE)) {
+            errmsg = "embedded rounding is available only with "
+                "register-register operations";
+            goto err;
+        }
+
+        if (input->basereg == -1 &&
+            (input->indexreg == -1 || input->scale == 0)) {
+            /*
+             * It's a pure offset. If it is an IMMEDIATE, it is a pattern
+             * in insns.dat which allows an immediate to be used as a memory
+             * address, in which case apply the default REL/ABS.
+             */
+            if (bits == 64) {
+                if (is_class(IMMEDIATE, input->type)) {
+                    if (!(input->eaflags & EAF_ABS) &&
+                        ((input->eaflags & EAF_REL) || globalrel))
+                        input->type |= IP_REL;
+                }
+                if ((input->type & IP_REL) == IP_REL) {
+                    /*!
+                     *!ea-absolute on absolute address cannot be RIP-relative
+                     *!  warns that an address that is inherently absolute cannot
+                     *!  be generated with RIP-relative encoding using \c{REL},
+                     *!  see \k{REL & ABS}.
+                     */
+                    if (input->segment == NO_SEG ||
+                        (input->opflags & OPFLAG_RELATIVE)) {
+                        nasm_warn(WARN_EA_ABSOLUTE|ERR_PASS2,
+                                  "absolute address can not be RIP-relative");
+                        input->type &= ~IP_REL;
+                        input->type |= MEMORY;
+                    }
+                }
+            }
+
+            if (bits == 64 && !(IP_REL & ~input->type) && (eaflags & EAF_SIB)) {
+                errmsg = "instruction requires SIB encoding, cannot be RIP-relative";
+                goto err;
+            }
+
+            if (eaflags & EAF_BYTEOFFS ||
+                (eaflags & EAF_WORDOFFS &&
+                 input->disp_size != (addrbits != 16 ? 32 : 16))) {
+                /*!
+                 *!ea-dispsize on displacement size ignored on absolute address
+                 *!  warns that NASM does not support generating displacements for
+                 *!  inherently absolute addresses that do not match the address size
+                 *!  of the instruction.
+                 */
+                nasm_warn(WARN_EA_DISPSIZE, "displacement size ignored on absolute address");
+            }
+
+            if ((eaflags & EAF_SIB) || (bits == 64 && (~input->type & IP_REL))) {
+                output->sib_present = true;
+                output->sib         = GEN_SIB(0, 4, 5);
+                output->bytes       = 4;
+                output->modrm       = GEN_MODRM(0, rfield, 4);
+                output->rip         = false;
+            } else {
+                output->sib_present = false;
+                output->bytes       = (addrbits != 16 ? 4 : 2);
+                output->modrm       = GEN_MODRM(0, rfield,
+                                                (addrbits != 16 ? 5 : 6));
+                output->rip         = bits == 64;
+            }
+        } else {
+            /*
+             * It's an indirection.
+             */
+            int i = input->indexreg, b = input->basereg, s = input->scale;
+            int32_t seg = input->segment;
+            int hb = input->hintbase, ht = input->hinttype;
+            int t, it, bt;              /* register numbers */
+            opflags_t x, ix, bx;        /* register flags */
+
+            if (s == 0)
+                i = -1;         /* make this easy, at least */
+
+            if (is_register(i)) {
+                it = nasm_regvalsi;
+                ix = nasm_reg_flagsi;
+            } else {
+                it = -1;
+                ix = 0;
+            }
+
+            if (is_register(b)) {
+                bt = nasm_regvalsb;
+                bx = nasm_reg_flagsb;
+            } else {
+                bt = -1;
+                bx = 0;
+            }
+
+            /* if either one are a vector register... */
+            if ((ix|bx) & (XMMREG|YMMREG|ZMMREG) & ~REG_EA) {
+                opflags_t sok = BITS32 | BITS64;
+                int32_t o = input->offset;
+                int mod, scale, index, base;
+
+                /*
+                 * For a vector SIB, one has to be a vector and the other,
+                 * if present, a GPR.  The vector must be the index operand.
+                 */
+                if (it == -1 || (bx & (XMMREG|YMMREG|ZMMREG) & ~REG_EA)) {
+                    if (s == 0)
+                        s = 1;
+                    else if (s != 1)
+                        goto err;
+
+                    t = bt, bt = it, it = t;
+                    x = bx, bx = ix, ix = x;
+                }
+
+                if (bt != -1) {
+                    if (REG_GPR & ~bx)
+                        goto err;
+                    if (!(REG64 & ~bx) || !(REG32 & ~bx))
+                        sok &= bx;
+                    else
+                        goto err;
+                }
+
+                /*
+                 * While we're here, ensure the user didn't specify
+                 * WORD or QWORD
+                 */
+                if (input->disp_size == 16 || input->disp_size == 64)
+                    goto err;
+
+                if (addrbits == 16 ||
+                    (addrbits == 32 && !(sok & BITS32)) ||
+                    (addrbits == 64 && !(sok & BITS64)))
+                    goto err;
+
+                output->type = ((ix & ZMMREG & ~REG_EA) ? EA_ZMMVSIB
+                                : ((ix & YMMREG & ~REG_EA)
+                                ? EA_YMMVSIB : EA_XMMVSIB));
+
+                output->rex    |= rexflags(it, ix, REX_X);
+                output->rex    |= rexflags(bt, bx, REX_B);
+                ins->evex_p2 |= evexflags(it, 0, EVEX_P2VP, 2);
+
+                index = it & 7; /* it is known to be != -1 */
+
+                switch (s) {
+                case 1:
+                    scale = 0;
+                    break;
+                case 2:
+                    scale = 1;
+                    break;
+                case 4:
+                    scale = 2;
+                    break;
+                case 8:
+                    scale = 3;
+                    break;
+                default:   /* then what the smeg is it? */
+                    goto err;    /* panic */
+                }
+
+                if (bt == -1) {
+                    base = 5;
+                    mod = 0;
+                } else {
+                    base = (bt & 7);
+                    if (base != REG_NUM_EBP && o == 0 &&
+                        seg == NO_SEG && !forw_ref &&
+                        !(eaflags & (EAF_BYTEOFFS | EAF_WORDOFFS)))
+                        mod = 0;
+                    else if (IS_MOD_01())
+                        mod = 1;
+                    else
+                        mod = 2;
+                }
+
+                output->sib_present = true;
+                output->bytes       = (bt == -1 || mod == 2 ? 4 : mod);
+                output->modrm       = GEN_MODRM(mod, rfield, 4);
+                output->sib         = GEN_SIB(scale, index, base);
+            } else if ((ix|bx) & (BITS32|BITS64)) {
+                /*
+                 * it must be a 32/64-bit memory reference. Firstly we have
+                 * to check that all registers involved are type E/Rxx.
+                 */
+                opflags_t sok = BITS32 | BITS64;
+                int32_t o = input->offset;
+
+                if (it != -1) {
+                    if (!(REG64 & ~ix) || !(REG32 & ~ix))
+                        sok &= ix;
+                    else
+                        goto err;
+                }
+
+                if (bt != -1) {
+                    if (REG_GPR & ~bx)
+                        goto err; /* Invalid register */
+                    if (~sok & bx & SIZE_MASK)
+                        goto err; /* Invalid size */
+                    sok &= bx;
+                }
+
+                /*
+                 * While we're here, ensure the user didn't specify
+                 * WORD or QWORD
+                 */
+                if (input->disp_size == 16 || input->disp_size == 64)
+                    goto err;
+
+                if (addrbits == 16 ||
+                    (addrbits == 32 && !(sok & BITS32)) ||
+                    (addrbits == 64 && !(sok & BITS64)))
+                    goto err;
+
+                /* now reorganize base/index */
+                if (s == 1 && bt != it && bt != -1 && it != -1 &&
+                    ((hb == b && ht == EAH_NOTBASE) ||
+                     (hb == i && ht == EAH_MAKEBASE))) {
+                    /* swap if hints say so */
+                    t = bt, bt = it, it = t;
+                    x = bx, bx = ix, ix = x;
+                }
+
+                if (bt == -1 && s == 1 && !(hb == i && ht == EAH_NOTBASE)) {
+                    /* make single reg base, unless hint */
+                    bt = it, bx = ix, it = -1, ix = 0;
+                }
+                if (eaflags & EAF_MIB) {
+                    /* MIB/split-SIB encoding */
+                    if (it == -1 && (hb == b && ht == EAH_NOTBASE)) {
+                        /*
+                         * make a single reg index reg*1.
+                         * gas uses this form for an explicit index register.
+                         */
+                        it = bt, ix = bx, bt = -1, bx = 0, s = 1;
+                    }
+                    if ((ht == EAH_SUMMED) && bt == -1) {
+                        /* separate once summed index into base, index */
+                        bt = it, bx = ix, s--;
+                    }
+                } else {
+                    if (((s == 2 && it != REG_NUM_ESP &&
+                          (!(eaflags & EAF_TIMESTWO) || (ht == EAH_SUMMED))) ||
+                         s == 3 || s == 5 || s == 9) && bt == -1) {
+                        /* convert 3*EAX to EAX+2*EAX */
+                        bt = it, bx = ix, s--;
+                    }
+                    if (it == -1 && (bt & 7) != REG_NUM_ESP &&
+                        (eaflags & EAF_TIMESTWO) &&
+                        (hb == b && ht == EAH_NOTBASE)) {
+                        /*
+                         * convert NOSPLIT EAX*1
+                         * to sib format with 0x0 displacement - EAX*1+0.
+                         */
+                        it = bt, ix = bx, bt = -1, bx = 0, s = 1;
+                    }
+                }
+                if (s == 1 && it == REG_NUM_ESP) {
+                    /* swap ESP into base if scale is 1 */
+                    t = it, it = bt, bt = t;
+                    x = ix, ix = bx, bx = x;
+                }
+                if (it == REG_NUM_ESP ||
+                    (s != 1 && s != 2 && s != 4 && s != 8 && it != -1))
+                    goto err;        /* wrong, for various reasons */
+
+                output->rex |= rexflags(it, ix, REX_X);
+                output->rex |= rexflags(bt, bx, REX_B);
+
+                if (it == -1 && (bt & 7) != REG_NUM_ESP && !(eaflags & EAF_SIB)) {
+                    /* no SIB needed */
+                    int mod, rm;
+
+                    if (bt == -1) {
+                        rm = 5;
+                        mod = 0;
+                    } else {
+                        rm = (bt & 7);
+                        if (rm != REG_NUM_EBP && o == 0 &&
+                            seg == NO_SEG && !forw_ref &&
+                            !(eaflags & (EAF_BYTEOFFS | EAF_WORDOFFS)))
+                            mod = 0;
+                        else if (IS_MOD_01())
+                            mod = 1;
+                        else
+                            mod = 2;
+                    }
+
+                    output->sib_present = false;
+                    output->bytes       = (bt == -1 || mod == 2 ? 4 : mod);
+                    output->modrm       = GEN_MODRM(mod, rfield, rm);
+                } else {
+                    /* we need a SIB */
+                    int mod, scale, index, base;
+
+                    if (it == -1)
+                        index = 4, s = 1;
+                    else
+                        index = (it & 7);
+
+                    switch (s) {
+                    case 1:
+                        scale = 0;
+                        break;
+                    case 2:
+                        scale = 1;
+                        break;
+                    case 4:
+                        scale = 2;
+                        break;
+                    case 8:
+                        scale = 3;
+                        break;
+                    default:   /* then what the smeg is it? */
+                        goto err;    /* panic */
+                    }
+
+                    if (bt == -1) {
+                        base = 5;
+                        mod = 0;
+                    } else {
+                        base = (bt & 7);
+                        if (base != REG_NUM_EBP && o == 0 &&
+                            seg == NO_SEG && !forw_ref &&
+                            !(eaflags & (EAF_BYTEOFFS | EAF_WORDOFFS)))
+                            mod = 0;
+                        else if (IS_MOD_01())
+                            mod = 1;
+                        else
+                            mod = 2;
+                    }
+
+                    output->sib_present = true;
+                    output->bytes       = (bt == -1 || mod == 2 ? 4 : mod);
+                    output->modrm       = GEN_MODRM(mod, rfield, 4);
+                    output->sib         = GEN_SIB(scale, index, base);
+                }
+            } else {            /* it's 16-bit */
+                int mod, rm;
+                int16_t o = input->offset;
+
+                /* check for 64-bit long mode */
+                if (addrbits == 64)
+                    goto err;
+
+                /* check all registers are BX, BP, SI or DI */
+                if ((b != -1 && b != R_BP && b != R_BX && b != R_SI && b != R_DI) ||
+                    (i != -1 && i != R_BP && i != R_BX && i != R_SI && i != R_DI))
+                    goto err;
+
+                /* ensure the user didn't specify DWORD/QWORD */
+                if (input->disp_size == 32 || input->disp_size == 64)
+                    goto err;
+
+                if (s != 1 && i != -1)
+                    goto err;        /* no can do, in 16-bit EA */
+                if (b == -1 && i != -1) {
+                    int tmp = b;
+                    b = i;
+                    i = tmp;
+                }               /* swap */
+                if ((b == R_SI || b == R_DI) && i != -1) {
+                    int tmp = b;
+                    b = i;
+                    i = tmp;
+                }
+                /* have BX/BP as base, SI/DI index */
+                if (b == i)
+                    goto err;        /* shouldn't ever happen, in theory */
+                if (i != -1 && b != -1 &&
+                    (i == R_BP || i == R_BX || b == R_SI || b == R_DI))
+                    goto err;        /* invalid combinations */
+                if (b == -1)            /* pure offset: handled above */
+                    goto err;        /* so if it gets to here, panic! */
+
+                rm = -1;
+                if (i != -1)
+                    switch (i * 256 + b) {
+                    case R_SI * 256 + R_BX:
+                        rm = 0;
+                        break;
+                    case R_DI * 256 + R_BX:
+                        rm = 1;
+                        break;
+                    case R_SI * 256 + R_BP:
+                        rm = 2;
+                        break;
+                    case R_DI * 256 + R_BP:
+                        rm = 3;
+                        break;
+                } else
+                    switch (b) {
+                    case R_SI:
+                        rm = 4;
+                        break;
+                    case R_DI:
+                        rm = 5;
+                        break;
+                    case R_BP:
+                        rm = 6;
+                        break;
+                    case R_BX:
+                        rm = 7;
+                        break;
+                    }
+                if (rm == -1)           /* can't happen, in theory */
+                    goto err;        /* so panic if it does */
+
+                if (o == 0 && seg == NO_SEG && !forw_ref && rm != 6 &&
+                    !(eaflags & (EAF_BYTEOFFS | EAF_WORDOFFS)))
+                    mod = 0;
+                else if (IS_MOD_01())
+                    mod = 1;
+                else
+                    mod = 2;
+
+                output->sib_present = false;    /* no SIB - it's 16-bit */
+                output->bytes       = mod;      /* bytes of offset needed */
+                output->modrm       = GEN_MODRM(mod, rfield, rm);
+            }
+
+            if (eaflags & EAF_REL) {
+                /* Explicit REL reference with indirect memory */
+                nasm_warn(WARN_OTHER,
+                          "indirect address displacements cannot be RIP-relative");
+            }
+        }
+    }
+
+    output->size = 1 + output->sib_present + output->bytes;
+    /*
+     * The type parsed might not match one supplied by
+     * a caller. In this case exit with error and let
+     * the caller to decide how critical it is.
+     */
+    if (output->type != expected)
+        goto err_set_msg;
+
+    return 0;
+
+err_set_msg:
+    if (!errmsg) {
+        /* Default error message */
+        static char invalid_address_msg40;
+        snprintf(invalid_address_msg, sizeof invalid_address_msg,
+                 "invalid %d-bit effective address", bits);
+        errmsg = invalid_address_msg;
+    }
+    *errmsgp = errmsg;
+    return -1;
+
+err:
+    output->type = EA_INVALID;
+    goto err_set_msg;
+}
+
+static void add_asp(insn *ins, int addrbits)
+{
+    int j, valid;
+    int defdisp;
+
+    valid = (addrbits == 64) ? 64|32 : 32|16;
+
+    switch (ins->prefixesPPS_ASIZE) {
+    case P_A16:
+        valid &= 16;
+        break;
+    case P_A32:
+        valid &= 32;
+        break;
+    case P_A64:
+        valid &= 64;
+        break;
+    case P_ASP:
+        valid &= (addrbits == 32) ? 16 : 32;
+        break;
+    default:
+        break;
+    }
+
+    for (j = 0; j < ins->operands; j++) {
+        if (is_class(MEMORY, ins->oprsj.type)) {
+            opflags_t i, b;
+
+            /* Verify as Register */
+            if (!is_register(ins->oprsj.indexreg))
+                i = 0;
+            else
+                i = nasm_reg_flagsins->oprsj.indexreg;
+
+            /* Verify as Register */
+            if (!is_register(ins->oprsj.basereg))
+                b = 0;
+            else
+                b = nasm_reg_flagsins->oprsj.basereg;
+
+            if (ins->oprsj.scale == 0)
+                i = 0;
+
+            if (!i && !b) {
+                int ds = ins->oprsj.disp_size;
+                if ((addrbits != 64 && ds > 8) ||
+                    (addrbits == 64 && ds == 16))
+                    valid &= ds;
+            } else {
+                if (!(REG16 & ~b))
+                    valid &= 16;
+                if (!(REG32 & ~b))
+                    valid &= 32;
+                if (!(REG64 & ~b))
+                    valid &= 64;
+
+                if (!(REG16 & ~i))
+                    valid &= 16;
+                if (!(REG32 & ~i))
+                    valid &= 32;
+                if (!(REG64 & ~i))
+                    valid &= 64;
+            }
+        }
+    }
+
+    if (valid & addrbits) {
+        ins->addr_size = addrbits;
+    } else if (valid & ((addrbits == 32) ? 16 : 32)) {
+        /* Add an address size prefix */
+        ins->prefixesPPS_ASIZE = (addrbits == 32) ? P_A16 : P_A32;;
+        ins->addr_size = (addrbits == 32) ? 16 : 32;
+    } else {
+        /* Impossible... */
+        nasm_nonfatal("impossible combination of address sizes");
+        ins->addr_size = addrbits; /* Error recovery */
+    }
+
+    defdisp = ins->addr_size == 16 ? 16 : 32;
+
+    for (j = 0; j < ins->operands; j++) {
+        if (!(MEM_OFFS & ~ins->oprsj.type) &&
+            (ins->oprsj.disp_size ? ins->oprsj.disp_size : defdisp) != ins->addr_size) {
+            /*
+             * mem_offs sizes must match the address size; if not,
+             * strip the MEM_OFFS bit and match only EA instructions
+             */
+            ins->oprsj.type &= ~(MEM_OFFS & ~MEMORY);
+        }
+    }
+}

_service:tar_scm:nasm-2.16.03.tar.xz/asm/assemble.h Added

@@ -0,0 +1,56 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2017 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * assemble.h - header file for stuff private to the assembler
+ */
+
+#ifndef NASM_ASSEMBLE_H
+#define NASM_ASSEMBLE_H
+
+#include "nasm.h"
+#include "iflag.h"
+
+extern iflag_t cpu, cmd_cpu;
+void set_cpu(const char *cpuspec);
+
+extern bool in_absolute;        /* Are we in an absolute segment? */
+extern struct location absolute;
+
+int64_t insn_size(int32_t segment, int64_t offset, int bits, insn *instruction);
+int64_t assemble(int32_t segment, int64_t offset, int bits, insn *instruction);
+
+bool process_directives(char *);
+void process_pragma(char *);
+
+#endif

_service:tar_scm:nasm-2.16.03.tar.xz/asm/directbl.c Added

@@ -0,0 +1,192 @@
+/*
+ * This file is generated from ./asm/directiv.dat
+ * by perfhash.pl; do not edit.
+ */
+
+#include "directiv.h"
+
+const char * const directive_tbl40 = {
+    "absolute",
+    "bits",
+    "common",
+    "cpu",
+    "debug",
+    "default",
+    "extern",
+    "float",
+    "global",
+    "static",
+    "list",
+    "section",
+    "segment",
+    "warning",
+    "sectalign",
+    "pragma",
+    "required",
+    "export",
+    "group",
+    "import",
+    "library",
+    "map",
+    "module",
+    "org",
+    "osabi",
+    "safeseh",
+    "uppercase",
+    "prefix",
+    "suffix",
+    "gprefix",
+    "gsuffix",
+    "lprefix",
+    "lsuffix",
+    "limit",
+    "options",
+    "subsections_via_symbols",
+    "no_dead_strip",
+    "maxdump",
+    "nodepend",
+    "noseclabels"
+};
+
+#define INVALID_HASH_ENTRY (65536/3)
+
+static const int16_t directive_hashvals128 = {
+    0,
+    INVALID_HASH_ENTRY,
+    0,
+    INVALID_HASH_ENTRY,
+    0,
+    INVALID_HASH_ENTRY,
+    0,
+    6,
+    0,
+    0,
+    INVALID_HASH_ENTRY,
+    0,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    0,
+    3,
+    INVALID_HASH_ENTRY,
+    0,
+    0,
+    0,
+    32,
+    0,
+    4,
+    0,
+    0,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    12,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    0,
+    INVALID_HASH_ENTRY,
+    0,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    1,
+    INVALID_HASH_ENTRY,
+    0,
+    33,
+    INVALID_HASH_ENTRY,
+    0,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    0,
+    0,
+    0,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    25,
+    38,
+    1,
+    9,
+    INVALID_HASH_ENTRY,
+    31,
+    INVALID_HASH_ENTRY,
+    0,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    -12,
+    0,
+    INVALID_HASH_ENTRY,
+    34,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    0,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    29,
+    INVALID_HASH_ENTRY,
+    13,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    0,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    27,
+    INVALID_HASH_ENTRY,
+    7,
+    22,
+    0,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    19,
+    INVALID_HASH_ENTRY,
+    37,
+    5,
+    -11,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    16,
+    15,
+    11,
+    INVALID_HASH_ENTRY,
+    23,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    0,
+    36,
+    12,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    27,
+    INVALID_HASH_ENTRY,
+    21,
+    26,
+    10,
+    5,
+    29,
+    35,
+    INVALID_HASH_ENTRY,
+    INVALID_HASH_ENTRY,
+    30,
+    INVALID_HASH_ENTRY,
+    28,
+    4,
+    INVALID_HASH_ENTRY
+};
+
+const struct perfect_hash directive_hash = {
+    UINT64_C(0x076259c3e291c26c),
+    UINT32_C(0x7e),
+    UINT32_C(40),
+    3,
+    (D_unknown),
+    directive_hashvals,
+    directive_tbl
+};

_service:tar_scm:nasm-2.16.03.tar.xz/asm/directiv.c Added

@@ -0,0 +1,567 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2022 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * Parse and handle assembler directives
+ */
+
+#include "compiler.h"
+
+#include "nctype.h"
+
+#include "nasm.h"
+#include "nasmlib.h"
+#include "ilog2.h"
+#include "error.h"
+#include "floats.h"
+#include "stdscan.h"
+#include "preproc.h"
+#include "eval.h"
+#include "assemble.h"
+#include "outform.h"
+#include "listing.h"
+#include "labels.h"
+#include "iflag.h"
+
+struct cpunames {
+    const char *name;
+    unsigned int level;
+    /* Eventually a table of features */
+};
+
+static void iflag_set_cpu(iflag_t *a, unsigned int lvl)
+{
+    a->field0 = 0;     /* Not applicable to the CPU type */
+    iflag_set_all_features(a);    /* All feature masking bits set for now */
+    if (lvl >= IF_ANY) {
+        /* This is a hack for now */
+        iflag_set(a, IF_LATEVEX);
+    }
+    a->fieldIF_CPU_FIELD &= ~IF_CPU_LEVEL_MASK;
+    iflag_set(a, lvl);
+}
+
+void set_cpu(const char *value)
+{
+    const char *p;
+    char modifier;
+    const struct cpunames *cpuflag;
+    static const struct cpunames cpunames = {
+        { "default", IF_DEFAULT }, /* Must be first */
+        { "8086", IF_8086 },
+        { "186",  IF_186  },
+        { "286",  IF_286  },
+        { "386",  IF_386  },
+        { "486",  IF_486  },
+        { "586",  IF_PENT },
+        { "pentium", IF_PENT },
+        { "pentiummmx", IF_PENT },
+        { "686",  IF_P6 },
+        { "p6",   IF_P6 },
+        { "ppro", IF_P6 },
+        { "pentiumpro", IF_P6 },
+        { "p2", IF_P6 },        /* +MMX */
+        { "pentiumii", IF_P6 },
+        { "p3", IF_KATMAI },
+        { "katmai", IF_KATMAI },
+        { "p4", IF_WILLAMETTE },
+        { "willamette", IF_WILLAMETTE },
+        { "prescott", IF_PRESCOTT },
+        { "x64", IF_X86_64 },
+        { "x86-64", IF_X86_64 },
+        { "ia64", IF_IA64 },
+        { "ia-64", IF_IA64 },
+        { "itanium", IF_IA64 },
+        { "itanic", IF_IA64 },
+        { "merced", IF_IA64 },
+        { "nehalem", IF_NEHALEM },
+        { "westmere", IF_WESTMERE },
+        { "sandybridge", IF_SANDYBRIDGE },
+        { "ivybridge", IF_FUTURE },
+        { "any", IF_ANY },
+        { "all", IF_ANY },
+        { "latevex", IF_LATEVEX },
+        { "evex", IF_EVEX },
+        { "vex", IF_VEX },
+        { NULL, 0 }
+    };
+
+    if (!value) {
+        iflag_set_cpu(&cpu, cpunames0.level);
+        return;
+    }
+
+    p = value;
+    modifier = '+';
+    while (*p) {
+        int len = strcspn(p, " ,");
+
+        while (len && (*p == '+' || *p == '-' || *p == '*')) {
+            modifier = *p++;
+            len--;
+            if (!len && modifier == '*')
+                cpu = cmd_cpu;
+        }
+
+        if (len) {
+            bool invert_flag = false;
+
+            if (len >= 3 && !nasm_memicmp(p, "no", 2)) {
+                invert_flag = true;
+                p += 2;
+                len -= 2;
+            }
+
+            for (cpuflag = cpunames; cpuflag->name; cpuflag++)
+                if (!nasm_strnicmp(p, cpuflag->name, len))
+                    break;
+
+            if (!cpuflag->name) {
+                nasm_nonfatal("unknown CPU type or flag '%.*s'", len, p);
+                return;
+            }
+
+            if (cpuflag->level >= IF_CPU_FIRST && cpuflag->level <= IF_ANY) {
+                iflag_set_cpu(&cpu, cpuflag->level);
+            } else {
+                switch (modifier) {
+                case '-':
+                    invert_flag = !invert_flag;
+                    break;
+                case '*':
+                    invert_flag ^= iflag_test(&cmd_cpu, cpuflag->level);
+                    break;
+                default:
+                    break;
+                }
+
+                iflag_set(&cpu, cpuflag->level);
+                if (invert_flag)
+                    iflag_clear(&cpu, cpuflag->level);
+            }
+        }
+        p += len;
+        if (!*p)
+            break;
+        p++;                /* Skip separator */
+    }
+}
+
+static int get_bits(const char *value)
+{
+    int i = atoi(value);
+
+    switch (i) {
+    case 16:
+        break;                  /* Always safe */
+    case 32:
+        if (!iflag_cpu_level_ok(&cpu, IF_386)) {
+            nasm_nonfatal("cannot specify 32-bit segment on processor below a 386");
+            i = 16;
+        }
+        break;
+    case 64:
+        if (!iflag_cpu_level_ok(&cpu, IF_X86_64)) {
+            nasm_nonfatal("cannot specify 64-bit segment on processor below an x86-64");
+            i = 16;
+        }
+        break;
+    default:
+        nasm_nonfatal("`%s' is not a valid segment size; must be 16, 32 or 64",
+                      value);
+        i = 16;
+        break;
+    }
+    return i;
+}
+
+static enum directive parse_directive_line(char **directive, char **value)
+{
+    char *p, *q, *buf;
+
+    buf = nasm_skip_spaces(*directive);
+
+    /*
+     * It should be enclosed in  .
+     * XXX: we don't check there is nothing else on the remainder of the
+     * line, except a possible comment.
+     */
+    if (*buf != '')
+        return D_none;
+    q = strchr(buf, '');
+    if (!q)
+        return D_corrupt;
+
+    /*
+     * Strip off the comments.  XXX: this doesn't account for quoted
+     * strings inside a directive.  We should really strip the
+     * comments in generic code, not here.  While we're at it, it
+     * would be better to pass the backend a series of tokens instead
+     * of a raw string, and actually process quoted strings for it,
+     * like of like argv is handled in C.
+     */
+    p = strchr(buf, ';');
+    if (p) {
+        if (p < q) /* ouch! somewhere inside */
+            return D_corrupt;
+        *p = '\0';
+    }
+
+    /* no brace, no trailing spaces */
+    *q = '\0';
+    nasm_zap_spaces_rev(--q);
+
+    /* directive */
+    p = nasm_skip_spaces(++buf);
+    q = nasm_skip_word(p);
+    if (!q)
+        return D_corrupt; /* sigh... no value there */
+    *q = '\0';
+    *directive = p;
+
+    /* and value finally */
+    p = nasm_skip_spaces(++q);
+    *value = p;
+
+    return directive_find(*directive);
+}
+
+/*
+ * Process a line from the assembler and try to handle it if it
+ * is a directive.  Return true if the line was handled (including
+ * if it was an error), false otherwise.
+ */
+bool process_directives(char *directive)
+{
+    enum directive d;
+    char *value, *p, *q, *special;
+    struct tokenval tokval;
+    bool bad_param = false;
+    enum label_type type;
+
+    d = parse_directive_line(&directive, &value);
+
+    switch (d) {
+    case D_none:
+        return D_none;      /* Not a directive */
+
+    case D_corrupt:
+	nasm_nonfatal("invalid directive line");
+	break;
+
+    default:			/* It's a backend-specific directive */
+        switch (ofmt->directive(d, value)) {
+        case DIRR_UNKNOWN:
+            goto unknown;
+        case DIRR_OK:
+        case DIRR_ERROR:
+            break;
+        case DIRR_BADPARAM:
+            bad_param = true;
+            break;
+        default:
+            panic();
+        }
+        break;
+
+    case D_unknown:
+    unknown:
+        nasm_nonfatal("unrecognized directive %s", directive);
+        break;
+
+    case D_SEGMENT:         /* SEGMENT n */
+    case D_SECTION:
+    {
+	int sb = globalbits;
+        int32_t seg = ofmt->section(value, &sb);
+
+        if (seg == NO_SEG) {
+            nasm_nonfatal("segment name `%s' not recognized", value);
+        } else {
+            globalbits = sb;
+            switch_segment(seg);
+        }
+        break;
+    }
+
+    case D_SECTALIGN:       /* SECTALIGN n */
+    {
+	expr *e;
+
+        if (*value) {
+            stdscan_reset();
+            stdscan_set(value);
+            tokval.t_type = TOKEN_INVALID;
+            e = evaluate(stdscan, NULL, &tokval, NULL, true, NULL);
+            if (e) {
+                uint64_t align = e->value;
+
+		if (!is_power2(e->value)) {
+                    nasm_nonfatal("segment alignment `%s' is not power of two",
+				  value);
+		} else if (align > UINT64_C(0x7fffffff)) {
+                    /*
+                     * FIXME: Please make some sane message here
+                     * ofmt should have some 'check' method which
+                     * would report segment alignment bounds.
+                     */
+		    nasm_nonfatal("absurdly large segment alignment `%s' (2^%d)",
+				  value, ilog2_64(align));
+                }
+
+                /* callee should be able to handle all details */
+                if (location.segment != NO_SEG)
+                    ofmt->sectalign(location.segment, align);
+            }
+        }
+        break;
+    }
+
+    case D_BITS:            /* BITS bits */
+        globalbits = get_bits(value);
+        break;
+
+    case D_GLOBAL:          /* GLOBAL|STATIC|EXTERN|COMMON symbol:special */
+        type = LBL_GLOBAL;
+        goto symdef;
+    case D_STATIC:
+        type = LBL_STATIC;
+        goto symdef;
+    case D_EXTERN:
+        type = LBL_EXTERN;
+        goto symdef;
+    case D_REQUIRED:
+        type = LBL_REQUIRED;
+        goto symdef;
+    case D_COMMON:
+        type = LBL_COMMON;
+        goto symdef;
+
+    symdef:
+    {
+        bool validid = true;
+        int64_t size = 0;
+        char *sizestr;
+        bool rn_error;
+
+        if (*value == '$')
+            value++;        /* skip initial $ if present */
+
+        q = value;
+        if (!nasm_isidstart(*q)) {
+            validid = false;
+        } else {
+            q++;
+            while (*q && *q != ':' && !nasm_isspace(*q)) {
+                if (!nasm_isidchar(*q))
+                    validid = false;
+                q++;
+            }
+        }
+        if (!validid) {
+            nasm_nonfatal("identifier expected after %s, got `%s'",
+			  directive, value);
+            break;
+        }
+
+        if (nasm_isspace(*q)) {
+            *q++ = '\0';
+            sizestr = q = nasm_skip_spaces(q);
+            q = strchr(q, ':');
+        } else {
+            sizestr = NULL;
+        }
+
+        if (q && *q == ':') {
+            *q++ = '\0';
+            special = q;
+        } else {
+            special = NULL;
+        }
+
+        if (type == LBL_COMMON) {
+            if (sizestr)
+                size = readnum(sizestr, &rn_error);
+            if (!sizestr || rn_error)
+                nasm_nonfatal("%s size specified in common declaration",
+			      sizestr ? "invalid" : "no");
+        } else if (sizestr) {
+            nasm_nonfatal("invalid syntax in %s declaration", directive);
+        }
+
+        if (!declare_label(value, type, special))
+            break;
+
+        if (type == LBL_COMMON || type == LBL_EXTERN || type == LBL_REQUIRED)
+            define_label(value, 0, size, false);
+
+	break;
+    }
+
+    case D_ABSOLUTE:        /* ABSOLUTE address */
+    {
+	expr *e;
+
+        stdscan_reset();
+        stdscan_set(value);
+        tokval.t_type = TOKEN_INVALID;
+        e = evaluate(stdscan, NULL, &tokval, NULL, true, NULL);
+        if (e) {
+            if (!is_reloc(e)) {
+                nasm_nonfatal("cannot use non-relocatable expression as "
+                              "ABSOLUTE address");
+            } else {
+                absolute.segment = reloc_seg(e);
+                absolute.offset = reloc_value(e);
+            }
+        } else if (pass_first()) {
+            absolute.offset = 0x100;     /* don't go near zero in case of / */
+        } else {
+            nasm_nonfatal("invalid ABSOLUTE address");
+        }
+        in_absolute = true;
+        location.segment = NO_SEG;
+        location.offset = absolute.offset;
+        break;
+    }
+
+    case D_DEBUG:           /* DEBUG */
+    {
+        bool badid, overlong;
+	char debugid128;
+
+        p = value;
+        q = debugid;
+        badid = overlong = false;
+        if (!nasm_isidstart(*p)) {
+            badid = true;
+        } else {
+            while (*p && !nasm_isspace(*p)) {
+                if (q >= debugid + sizeof debugid - 1) {
+                    overlong = true;
+                    break;
+                }
+                if (!nasm_isidchar(*p))
+                    badid = true;
+                *q++ = *p++;
+            }
+            *q = 0;
+        }
+        if (badid) {
+            nasm_nonfatal("identifier expected after DEBUG");
+            break;
+        }
+        if (overlong) {
+            nasm_nonfatal("DEBUG identifier too long");
+            break;
+        }
+        p = nasm_skip_spaces(p);
+        if (pass_final())
+            dfmt->debug_directive(debugid, p);
+        break;
+    }
+
+    case D_WARNING:         /* WARNING {push|pop|{+|-|*}warn-name} */
+        value = nasm_skip_spaces(value);
+        if ((*value | 0x20) == 'p') {
+            if (!nasm_stricmp(value, "push"))
+                push_warnings();
+            else if (!nasm_stricmp(value, "pop"))
+                pop_warnings();
+        }
+        set_warning_status(value);
+        break;
+
+    case D_CPU:         /* CPU */
+        set_cpu(value);
+        break;
+
+    case D_LIST:        /* LIST {+|-} */
+        value = nasm_skip_spaces(value);
+        if (*value == '+') {
+            user_nolist = false;
+        } else {
+            if (*value == '-') {
+                user_nolist = true;
+            } else {
+                bad_param = true;
+            }
+        }
+        break;
+
+    case D_DEFAULT:         /* DEFAULT */
+        stdscan_reset();
+        stdscan_set(value);
+        tokval.t_type = TOKEN_INVALID;
+        if (stdscan(NULL, &tokval) != TOKEN_INVALID) {
+            switch (tokval.t_integer) {
+            case S_REL:
+                globalrel = 1;
+                break;
+            case S_ABS:
+                globalrel = 0;
+                break;
+            case P_BND:
+                globalbnd = 1;
+                break;
+            case P_NOBND:
+                globalbnd = 0;
+                break;
+            default:
+                bad_param = true;
+                break;
+            }
+        } else {
+            bad_param = true;
+        }
+        break;
+
+    case D_FLOAT:
+        if (float_option(value)) {
+            nasm_nonfatal("unknown 'float' directive: %s", value);
+        }
+        break;
+
+    case D_PRAGMA:
+        process_pragma(value);
+        break;
+    }
+
+
+    /* A common error message */
+    if (bad_param) {
+        nasm_nonfatal("invalid parameter to %s directive", directive);
+    }
+
+    return d != D_none;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/asm/directiv.dat Added

@@ -0,0 +1,110 @@
+;; --------------------------------------------------------------------------
+;;
+;;   Copyright 1996-2017 The NASM Authors - All Rights Reserved
+;;   See the file AUTHORS included with the NASM distribution for
+;;   the specific copyright holders.
+;;
+;;   Redistribution and use in source and binary forms, with or without
+;;   modification, are permitted provided that the following
+;;   conditions are met:
+;;
+;;   * Redistributions of source code must retain the above copyright
+;;     notice, this list of conditions and the following disclaimer.
+;;   * Redistributions in binary form must reproduce the above
+;;     copyright notice, this list of conditions and the following
+;;     disclaimer in the documentation and/or other materials provided
+;;     with the distribution.
+;;
+;;     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+;;     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+;;     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+;;     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;;     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+;;     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;;     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+;;     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+;;     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+;;     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+;;     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+;;     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;;     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+;; --------------------------------------------------------------------------
+;;
+;; List of global NASM directives and pragma operations codes
+;;
+;; ALL directives, including backend-specific, need to be added here.
+;;
+;; %pragma operation keywords (the second word, after facility) MAY
+;; be added here too to assist in parsing, but it is not required.
+;; See the definition of struct pragma in include/nasm.h.
+;;
+;; The same keyword can be used as a directive and as a pragma
+;; operation, or as pragma operations in different namespaces.  The
+;; same D_ constant will be used for both, and this is perfectly
+;; acceptable.
+;;
+;; In the future, this will be turned into a general list of keywords
+;; to be parsed in special contexts.
+;;
+
+; --- General configuration
+#name directive
+#prefix D_
+#errval D_unknown
+#header directiv.h
+
+; --- Special enum values
+#special none = 0			; Must be zero
+#special unknown
+#special corrupt
+
+; --- Global directives
+absolute
+bits
+common
+cpu
+debug
+default
+extern
+float
+global
+static
+list
+section
+segment
+warning
+sectalign
+pragma
+required
+
+; --- Format-specific directives
+export				; outcoff, outobj
+group				; outobj
+import				; outobj
+library				; outrdf2
+map				; outbin
+module				; outrdf2
+org				; outbin
+osabi				; outelf
+safeseh				; outcoff
+uppercase			; outieee, outobj
+
+; --- Assembler pragmas
+prefix
+suffix
+gprefix
+gsuffix
+lprefix
+lsuffix
+limit
+
+; --- Listing pragmas
+options
+
+; --- Backend pragmas
+subsections_via_symbols		; macho
+no_dead_strip			; macho
+maxdump				; dbg
+nodepend			; obj
+noseclabels			; dbg

_service:tar_scm:nasm-2.16.03.tar.xz/asm/directiv.h Added

@@ -0,0 +1,79 @@
+/*
+ * This file is generated from ./asm/directiv.dat
+ * by perfhash.pl; do not edit.
+ */
+
+#ifndef DIRECTIV_H
+#define DIRECTIV_H 1
+
+#include "perfhash.h"
+
+enum directive {
+    D_none,
+    D_unknown,
+    D_corrupt,
+    D_ABSOLUTE,
+    D_BITS,
+    D_COMMON,
+    D_CPU,
+    D_DEBUG,
+    D_DEFAULT,
+    D_EXTERN,
+    D_FLOAT,
+    D_GLOBAL,
+    D_STATIC,
+    D_LIST,
+    D_SECTION,
+    D_SEGMENT,
+    D_WARNING,
+    D_SECTALIGN,
+    D_PRAGMA,
+    D_REQUIRED,
+    D_EXPORT,
+    D_GROUP,
+    D_IMPORT,
+    D_LIBRARY,
+    D_MAP,
+    D_MODULE,
+    D_ORG,
+    D_OSABI,
+    D_SAFESEH,
+    D_UPPERCASE,
+    D_PREFIX,
+    D_SUFFIX,
+    D_GPREFIX,
+    D_GSUFFIX,
+    D_LPREFIX,
+    D_LSUFFIX,
+    D_LIMIT,
+    D_OPTIONS,
+    D_SUBSECTIONS_VIA_SYMBOLS,
+    D_NO_DEAD_STRIP,
+    D_MAXDUMP,
+    D_NODEPEND,
+    D_NOSECLABELS
+};
+
+extern const struct perfect_hash directive_hash;
+extern const char * const directive_tbl40;
+
+static inline enum directive directive_find(const char *str)
+{
+    return perfhash_find(&directive_hash, str);
+}
+
+static inline const char * directive_name(enum directive x)
+{
+    size_t ix = (size_t)x - (3);
+    if (ix >= 40)
+        return NULL;
+    return directive_tblix;
+}
+
+static inline const char * directive_dname(enum directive x)
+{
+    const char *y = directive_name(x);
+    return y ? y : invalid_enum_str(x);
+}
+
+#endif /* DIRECTIV_H */

_service:tar_scm:nasm-2.16.03.tar.xz/asm/error.c Added

@@ -0,0 +1,291 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2019 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * error.c - error message handling routines for the assembler
+ */
+
+#include "compiler.h"
+
+
+#include "nasmlib.h"
+#include "error.h"
+
+/* Common function body */
+#define nasm_do_error(_sev,_flags)				\
+	va_list ap;						\
+        va_start(ap, fmt);					\
+	if ((_sev) >= ERR_CRITICAL)				\
+		nasm_verror_critical((_sev)|(_flags), fmt, ap);	\
+	else							\
+		nasm_verror((_sev)|(_flags), fmt, ap);		\
+	va_end(ap);						\
+	if ((_sev) >= ERR_FATAL)                                \
+		abort();
+
+
+void nasm_error(errflags severity, const char *fmt, ...)
+{
+	nasm_do_error(severity & ERR_MASK, severity & ~ERR_MASK);
+}
+
+#define nasm_err_helpers(_type, _name, _sev)				\
+_type nasm_ ## _name ## f (errflags flags, const char *fmt, ...)	\
+{									\
+	nasm_do_error(_sev, flags);					\
+}									\
+_type nasm_ ## _name (const char *fmt, ...)				\
+{									\
+	nasm_do_error(_sev, 0);						\
+}
+
+nasm_err_helpers(void,       listmsg,  ERR_LISTMSG)
+nasm_err_helpers(void,       debug,    ERR_DEBUG)
+nasm_err_helpers(void,       info,     ERR_INFO)
+nasm_err_helpers(void,       nonfatal, ERR_NONFATAL)
+nasm_err_helpers(fatal_func, fatal,    ERR_FATAL)
+nasm_err_helpers(fatal_func, critical, ERR_CRITICAL)
+nasm_err_helpers(fatal_func, panic,    ERR_PANIC)
+
+/*
+ * Strongly discourage warnings without level by require flags on warnings.
+ * This means nasm_warn() is the equivalent of the -f variants of the
+ * other ones.
+ *
+ * This is wrapped in a macro to be able to elide it if the warning is
+ * disabled, hence the extra underscore.
+ */
+void nasm_warn_(errflags flags, const char *fmt, ...)
+{
+	nasm_do_error(ERR_WARNING, flags);
+}
+
+fatal_func nasm_panic_from_macro(const char *file, int line)
+{
+	nasm_panic("internal error at %s:%d\n", file, line);
+}
+
+fatal_func nasm_assert_failed(const char *file, int line, const char *msg)
+{
+	nasm_panic("assertion %s failed at %s:%d", msg, file, line);
+}
+
+
+/*
+ * Warning stack management. Note that there is an implicit "push"
+ * after the command line has been parsed, but this particular push
+ * cannot be popped.
+ */
+struct warning_stack {
+	struct warning_stack *next;
+	uint8_t statesizeof warning_state;
+};
+static struct warning_stack *warning_stack, *warning_state_init;
+
+/* Push the warning status onto the warning stack */
+void push_warnings(void)
+{
+	struct warning_stack *ws;
+
+	ws = nasm_malloc(sizeof *ws);
+	memcpy(ws->state, warning_state, sizeof warning_state);
+	ws->next = warning_stack;
+	warning_stack = ws;
+}
+
+/* Pop the warning status off the warning stack */
+void pop_warnings(void)
+{
+	struct warning_stack *ws = warning_stack;
+
+	memcpy(warning_state, ws->state, sizeof warning_state);
+	if (!ws->next) {
+		/*!
+		 *!warn-stack-empty on warning stack empty
+		 *!  a \c{WARNING POP} directive was executed when
+		 *!  the warning stack is empty. This is treated
+		 *!  as a \c{WARNING *all} directive.
+		 */
+		nasm_warn(WARN_WARN_STACK_EMPTY, "warning stack empty");
+	} else {
+		warning_stack = ws->next;
+		nasm_free(ws);
+	}
+}
+
+/* Call after the command line is parsed, but before the first pass */
+void init_warnings(void)
+{
+	push_warnings();
+	warning_state_init = warning_stack;
+}
+
+
+/* Call after each pass */
+void reset_warnings(void)
+{
+	struct warning_stack *ws = warning_stack;
+
+	/* Unwind the warning stack. We do NOT delete the last entry! */
+	while (ws->next) {
+		struct warning_stack *wst = ws;
+		ws = ws->next;
+		nasm_free(wst);
+	}
+	warning_stack = ws;
+	memcpy(warning_state, ws->state, sizeof warning_state);
+}
+
+/*
+ * This is called when processing a -w or -W option, or a warning directive.
+ * Returns ok if the action was successful.
+ *
+ * Special pseudo-warnings:
+ *
+ *!other on any warning not specifically mentioned above
+ *!  specifies any warning not included in any specific warning class.
+ *
+ *!all all all possible warnings
+ *!  is an group alias for \e{all} warning classes.  Thus, \c{-w+all}
+ *!  enables all available warnings, and \c{-w-all} disables warnings
+ *!  entirely (since NASM 2.13).
+ */
+bool set_warning_status(const char *value)
+{
+	enum warn_action { WID_OFF, WID_ON, WID_RESET };
+	enum warn_action action;
+        const struct warning_alias *wa;
+        size_t vlen;
+	bool ok = false;
+	uint8_t mask;
+
+	value = nasm_skip_spaces(value);
+
+	switch (*value) {
+	case '-':
+		action = WID_OFF;
+		value++;
+		break;
+	case '+':
+		action = WID_ON;
+		value++;
+		break;
+	case '*':
+		action = WID_RESET;
+		value++;
+		break;
+	case 'N':
+	case 'n':
+		if (!nasm_strnicmp(value, "no-", 3)) {
+			action = WID_OFF;
+			value += 3;
+			break;
+		} else if (!nasm_stricmp(value, "none")) {
+			action = WID_OFF;
+			value = NULL;
+			break;
+		}
+		/* else fall through */
+	default:
+		action = WID_ON;
+		break;
+	}
+
+	mask = WARN_ST_ENABLED;
+
+	if (value && !nasm_strnicmp(value, "error", 5)) {
+		switch (value5) {
+		case '=':
+			mask = WARN_ST_ERROR;
+			value += 6;
+			break;
+		case '\0':
+			mask = WARN_ST_ERROR;
+			value = NULL;
+			break;
+		default:
+			/* Just an accidental prefix? */
+			break;
+		}
+	}
+
+	if (value && !nasm_stricmp(value, "all"))
+		value = NULL;
+
+        vlen = value ? strlen(value) : 0;
+
+	/*
+         * This is inefficient, but it shouldn't matter.
+         * Note: warning_alias0 is "all".
+         */
+	for (wa = warning_alias+1;
+             wa < &warning_aliasNUM_WARNING_ALIAS; wa++) {
+            enum warn_index i = wa->warning;
+
+            if (value) {
+                char sep;
+
+                if (nasm_strnicmp(value, wa->name, vlen))
+                    continue;   /* Not a prefix */
+
+                sep = wa->namevlen;
+                if (sep != '\0' && sep != '-')
+                    continue;   /* Not a valid prefix */
+            }
+
+            ok = true; /* At least one action taken */
+            switch (action) {
+            case WID_OFF:
+                warning_statei &= ~mask;
+                break;
+            case WID_ON:
+                warning_statei |= mask;
+                break;
+            case WID_RESET:
+                warning_statei &= ~mask;
+                warning_statei |= warning_state_init->statei & mask;
+                break;
+            }
+        }
+
+        if (!ok && value) {
+            /*!
+             *!unknown-warning off unknown warning in \c{-W}/\c{-w} or warning directive
+             *!  warns about a \c{-w} or \c{-W} option or a \c{WARNING} directive
+             *!  that contains an unknown warning name or is otherwise not possible to process.
+             */
+            nasm_warn(WARN_UNKNOWN_WARNING, "unknown warning name: %s", value);
+	}
+
+	return ok;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/asm/eval.c Added

@@ -0,0 +1,1067 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2018 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * eval.c    expression evaluator for the Netwide Assembler
+ */
+
+#include "compiler.h"
+
+#include "nctype.h"
+
+#include "nasm.h"
+#include "nasmlib.h"
+#include "ilog2.h"
+#include "error.h"
+#include "eval.h"
+#include "labels.h"
+#include "floats.h"
+#include "assemble.h"
+
+#define TEMPEXPRS_DELTA 128
+#define TEMPEXPR_DELTA 8
+
+static scanner scanfunc;        /* Address of scanner routine */
+static void *scpriv;            /* Scanner private pointer */
+
+static expr **tempexprs = NULL;
+static int ntempexprs;
+static int tempexprs_size = 0;
+
+static expr *tempexpr;
+static int ntempexpr;
+static int tempexpr_size;
+
+static struct tokenval *tokval; /* The current token */
+static int tt;                   /* The t_type of tokval */
+
+static bool critical;
+static int *opflags;
+
+static struct eval_hints *hint;
+static int64_t deadman;
+
+
+/*
+ * Unimportant cleanup is done to avoid confusing people who are trying
+ * to debug real memory leaks
+ */
+void eval_cleanup(void)
+{
+    while (ntempexprs)
+        nasm_free(tempexprs--ntempexprs);
+    nasm_free(tempexprs);
+}
+
+/*
+ * Construct a temporary expression.
+ */
+static void begintemp(void)
+{
+    tempexpr = NULL;
+    tempexpr_size = ntempexpr = 0;
+}
+
+static void addtotemp(int32_t type, int64_t value)
+{
+    while (ntempexpr >= tempexpr_size) {
+        tempexpr_size += TEMPEXPR_DELTA;
+        tempexpr = nasm_realloc(tempexpr,
+                                tempexpr_size * sizeof(*tempexpr));
+    }
+    tempexprntempexpr.type = type;
+    tempexprntempexpr++.value = value;
+}
+
+static expr *finishtemp(void)
+{
+    addtotemp(0L, 0L);          /* terminate */
+    while (ntempexprs >= tempexprs_size) {
+        tempexprs_size += TEMPEXPRS_DELTA;
+        tempexprs = nasm_realloc(tempexprs,
+                                 tempexprs_size * sizeof(*tempexprs));
+    }
+    return tempexprsntempexprs++ = tempexpr;
+}
+
+/*
+ * Add two vector datatypes. We have some bizarre behaviour on far-
+ * absolute segment types: we preserve them during addition _only_
+ * if one of the segments is a truly pure scalar.
+ */
+static expr *add_vectors(expr * p, expr * q)
+{
+    int preserve;
+
+    preserve = is_really_simple(p) || is_really_simple(q);
+
+    begintemp();
+
+    while (p->type && q->type &&
+           p->type < EXPR_SEGBASE + SEG_ABS &&
+           q->type < EXPR_SEGBASE + SEG_ABS) {
+        int lasttype;
+
+        if (p->type > q->type) {
+            addtotemp(q->type, q->value);
+            lasttype = q++->type;
+        } else if (p->type < q->type) {
+            addtotemp(p->type, p->value);
+            lasttype = p++->type;
+        } else {                /* *p and *q have same type */
+            int64_t sum = p->value + q->value;
+            if (sum) {
+                addtotemp(p->type, sum);
+                if (hint)
+                    hint->type = EAH_SUMMED;
+            }
+            lasttype = p->type;
+            p++, q++;
+        }
+        if (lasttype == EXPR_UNKNOWN) {
+            return finishtemp();
+        }
+    }
+    while (p->type && (preserve || p->type < EXPR_SEGBASE + SEG_ABS)) {
+        addtotemp(p->type, p->value);
+        p++;
+    }
+    while (q->type && (preserve || q->type < EXPR_SEGBASE + SEG_ABS)) {
+        addtotemp(q->type, q->value);
+        q++;
+    }
+
+    return finishtemp();
+}
+
+/*
+ * Multiply a vector by a scalar. Strip far-absolute segment part
+ * if present.
+ *
+ * Explicit treatment of UNKNOWN is not required in this routine,
+ * since it will silently do the Right Thing anyway.
+ *
+ * If `affect_hints' is set, we also change the hint type to
+ * NOTBASE if a MAKEBASE hint points at a register being
+ * multiplied. This allows eax*1+ebx to hint EBX rather than EAX
+ * as the base register.
+ */
+static expr *scalar_mult(expr * vect, int64_t scalar, int affect_hints)
+{
+    expr *p = vect;
+
+    while (p->type && p->type < EXPR_SEGBASE + SEG_ABS) {
+        p->value = scalar * (p->value);
+        if (hint && hint->type == EAH_MAKEBASE &&
+            p->type == hint->base && affect_hints)
+            hint->type = EAH_NOTBASE;
+        p++;
+    }
+    p->type = 0;
+
+    return vect;
+}
+
+static expr *scalarvect(int64_t scalar)
+{
+    begintemp();
+    addtotemp(EXPR_SIMPLE, scalar);
+    return finishtemp();
+}
+
+static expr *unknown_expr(void)
+{
+    begintemp();
+    addtotemp(EXPR_UNKNOWN, 1L);
+    return finishtemp();
+}
+
+/*
+ * The SEG operator: calculate the segment part of a relocatable
+ * value. Return NULL, as usual, if an error occurs. Report the
+ * error too.
+ */
+static expr *segment_part(expr * e)
+{
+    int32_t seg;
+
+    if (is_unknown(e))
+        return unknown_expr();
+
+    if (!is_reloc(e)) {
+        nasm_nonfatal("cannot apply SEG to a non-relocatable value");
+        return NULL;
+    }
+
+    seg = reloc_seg(e);
+    if (seg == NO_SEG) {
+        nasm_nonfatal("cannot apply SEG to a non-relocatable value");
+        return NULL;
+    } else if (seg & SEG_ABS) {
+        return scalarvect(seg & ~SEG_ABS);
+    } else if (seg & 1) {
+        nasm_nonfatal("SEG applied to something which"
+                      " is already a segment base");
+        return NULL;
+    } else {
+        int32_t base = ofmt->segbase(seg + 1);
+
+        begintemp();
+        addtotemp((base == NO_SEG ? EXPR_UNKNOWN : EXPR_SEGBASE + base),
+                  1L);
+        return finishtemp();
+    }
+}
+
+/*
+ * Recursive-descent parser. Called with a single boolean operand,
+ * which is true if the evaluation is critical (i.e. unresolved
+ * symbols are an error condition). Must update the global `tt' to
+ * reflect the token after the parsed string. May return NULL.
+ *
+ * evaluate() should report its own errors: on return it is assumed
+ * that if NULL has been returned, the error has already been
+ * reported.
+ *
+ */
+
+/*
+ * Wrapper function around the scanner
+ */
+static int scan(void)
+{
+    return tt = scanfunc(scpriv, tokval);
+}
+
+/*
+ * Grammar parsed is:
+ *
+ * expr  : bexpr  WRT expr6 
+ * bexpr : cexpr
+ * cexpr : rexp0  {?} bexpr {:} cexpr 
+ * rexp0 : rexp1  {||} rexp1...
+ * rexp1 : rexp2  {^^} rexp2...
+ * rexp2 : rexp3  {&&} rexp3...
+ * rexp3 : expr0  {=,==,<>,!=,<,>,<=,>=,<=>} expr0... 
+ * expr0 : expr1  {|} expr1...
+ * expr1 : expr2  {^} expr2...
+ * expr2 : expr3  {&} expr3...
+ * expr3 : expr4  {<<,>>,<<<,>>>} expr4...
+ * expr4 : expr5  {+,-} expr5...
+ * expr5 : expr6  {*,/,%,//,%%} expr6...
+ * expr6 : { ~,+,-,IFUNC,SEG } expr6
+ *       | (bexpr)
+ *       | symbol
+ *       | $
+ *       | number
+ */
+
+static expr *cexpr(void);
+static expr *rexp0(void), *rexp1(void), *rexp2(void), *rexp3(void);
+
+static expr *expr0(void), *expr1(void), *expr2(void), *expr3(void);
+static expr *expr4(void), *expr5(void), *expr6(void);
+
+/* This inline is a placeholder for the root of the basic expression */
+static inline expr *bexpr(void)
+{
+    return cexpr();
+}
+
+static expr *cexpr(void)
+{
+    expr *e, *f, *g;
+
+    e = rexp0();
+    if (!e)
+        return NULL;
+
+    if (tt == TOKEN_QMARK) {
+        scan();
+        f = bexpr();
+        if (!f)
+            return NULL;
+
+        if (tt != ':') {
+            nasm_nonfatal("`?' without matching `:'");
+            return NULL;
+        }
+
+        scan();
+        g = cexpr();
+        if (!g)
+            return NULL;
+
+        if (is_simple(e)) {
+            e = reloc_value(e) ? f : g;
+        } else if (is_just_unknown(e)) {
+            e = unknown_expr();
+        } else {
+            nasm_nonfatal("the left-hand side of `?' must be "
+                          "a scalar value");
+        }
+    }
+
+    return e;
+}
+
+static expr *rexp0(void)
+{
+    expr *e, *f;
+
+    e = rexp1();
+    if (!e)
+        return NULL;
+
+    while (tt == TOKEN_DBL_OR) {
+        scan();
+        f = rexp1();
+        if (!f)
+            return NULL;
+        if (!(is_simple(e) || is_just_unknown(e)) ||
+            !(is_simple(f) || is_just_unknown(f))) {
+            nasm_nonfatal("`|' operator may only be applied to"
+                          " scalar values");
+        }
+
+        if (is_just_unknown(e) || is_just_unknown(f))
+            e = unknown_expr();
+        else
+            e = scalarvect((int64_t)(reloc_value(e) || reloc_value(f)));
+    }
+    return e;
+}
+
+static expr *rexp1(void)
+{
+    expr *e, *f;
+
+    e = rexp2();
+    if (!e)
+        return NULL;
+
+    while (tt == TOKEN_DBL_XOR) {
+        scan();
+        f = rexp2();
+        if (!f)
+            return NULL;
+        if (!(is_simple(e) || is_just_unknown(e)) ||
+            !(is_simple(f) || is_just_unknown(f))) {
+            nasm_nonfatal("`^' operator may only be applied to"
+                          " scalar values");
+        }
+
+        if (is_just_unknown(e) || is_just_unknown(f))
+            e = unknown_expr();
+        else
+            e = scalarvect((int64_t)(!reloc_value(e) ^ !reloc_value(f)));
+    }
+    return e;
+}
+
+static expr *rexp2(void)
+{
+    expr *e, *f;
+
+    e = rexp3();
+    if (!e)
+        return NULL;
+    while (tt == TOKEN_DBL_AND) {
+        scan();
+        f = rexp3();
+        if (!f)
+            return NULL;
+        if (!(is_simple(e) || is_just_unknown(e)) ||
+            !(is_simple(f) || is_just_unknown(f))) {
+            nasm_nonfatal("`&' operator may only be applied to"
+                          " scalar values");
+        }
+        if (is_just_unknown(e) || is_just_unknown(f))
+            e = unknown_expr();
+        else
+            e = scalarvect((int64_t)(reloc_value(e) && reloc_value(f)));
+    }
+    return e;
+}
+
+static expr *rexp3(void)
+{
+    expr *e, *f;
+    int64_t v;
+
+    e = expr0();
+    if (!e)
+        return NULL;
+
+    while (tt == TOKEN_EQ || tt == TOKEN_LT || tt == TOKEN_GT ||
+           tt == TOKEN_NE || tt == TOKEN_LE || tt == TOKEN_GE ||
+           tt == TOKEN_LEG) {
+        int tto = tt;
+        scan();
+        f = expr0();
+        if (!f)
+            return NULL;
+
+        e = add_vectors(e, scalar_mult(f, -1L, false));
+
+        switch (tto) {
+        case TOKEN_EQ:
+        case TOKEN_NE:
+            if (is_unknown(e))
+                v = -1;         /* means unknown */
+            else if (!is_really_simple(e) || reloc_value(e) != 0)
+                v = (tto == TOKEN_NE);    /* unequal, so return true if NE */
+            else
+                v = (tto == TOKEN_EQ);    /* equal, so return true if EQ */
+            break;
+        default:
+            if (is_unknown(e))
+                v = -1;         /* means unknown */
+            else if (!is_really_simple(e)) {
+                nasm_nonfatal("`%s': operands differ by a non-scalar",
+                              (tto == TOKEN_LE ? "<=" :
+                               tto == TOKEN_LT ? "<" :
+                               tto == TOKEN_GE ? ">=" :
+                               tto == TOKEN_GT ? ">" :
+                               tto == TOKEN_LEG ? "<=>" :
+                               "<internal error>"));
+                v = 0;          /* must set it to _something_ */
+            } else {
+                int64_t vv = reloc_value(e);
+                if (tto == TOKEN_LEG)
+                    v = (vv < 0) ? -1 : (vv > 0) ? 1 : 0;
+                else if (vv == 0)
+                    v = (tto == TOKEN_LE || tto == TOKEN_GE);
+                else if (vv > 0)
+                    v = (tto == TOKEN_GE || tto == TOKEN_GT);
+                else            /* vv < 0 */
+                    v = (tto == TOKEN_LE || tto == TOKEN_LT);
+            }
+            break;
+        }
+
+        if (v == -1)
+            e = unknown_expr();
+        else
+            e = scalarvect(v);
+    }
+    return e;
+}
+
+static expr *expr0(void)
+{
+    expr *e, *f;
+
+    e = expr1();
+    if (!e)
+        return NULL;
+
+    while (tt == '|') {
+        scan();
+        f = expr1();
+        if (!f)
+            return NULL;
+        if (!(is_simple(e) || is_just_unknown(e)) ||
+            !(is_simple(f) || is_just_unknown(f))) {
+            nasm_nonfatal("`|' operator may only be applied to"
+                          " scalar values");
+        }
+        if (is_just_unknown(e) || is_just_unknown(f))
+            e = unknown_expr();
+        else
+            e = scalarvect(reloc_value(e) | reloc_value(f));
+    }
+    return e;
+}
+
+static expr *expr1(void)
+{
+    expr *e, *f;
+
+    e = expr2();
+    if (!e)
+        return NULL;
+
+    while (tt == '^') {
+        scan();
+        f = expr2();
+        if (!f)
+            return NULL;
+        if (!(is_simple(e) || is_just_unknown(e)) ||
+            !(is_simple(f) || is_just_unknown(f))) {
+            nasm_nonfatal("`^' operator may only be applied to"
+                          " scalar values");
+        }
+        if (is_just_unknown(e) || is_just_unknown(f))
+            e = unknown_expr();
+        else
+            e = scalarvect(reloc_value(e) ^ reloc_value(f));
+    }
+    return e;
+}
+
+static expr *expr2(void)
+{
+    expr *e, *f;
+
+    e = expr3();
+    if (!e)
+        return NULL;
+
+    while (tt == '&') {
+        scan();
+        f = expr3();
+        if (!f)
+            return NULL;
+        if (!(is_simple(e) || is_just_unknown(e)) ||
+            !(is_simple(f) || is_just_unknown(f))) {
+            nasm_nonfatal("`&' operator may only be applied to"
+                          " scalar values");
+        }
+        if (is_just_unknown(e) || is_just_unknown(f))
+            e = unknown_expr();
+        else
+            e = scalarvect(reloc_value(e) & reloc_value(f));
+    }
+    return e;
+}
+
+static expr *expr3(void)
+{
+    expr *e, *f;
+
+    e = expr4();
+    if (!e)
+        return NULL;
+
+    while (tt == TOKEN_SHL || tt == TOKEN_SHR || tt == TOKEN_SAR) {
+        int tto = tt;
+        scan();
+        f = expr4();
+        if (!f)
+            return NULL;
+        if (!(is_simple(e) || is_just_unknown(e)) ||
+            !(is_simple(f) || is_just_unknown(f))) {
+            nasm_nonfatal("shift operator may only be applied to"
+                          " scalar values");
+        } else if (is_just_unknown(e) || is_just_unknown(f)) {
+            e = unknown_expr();
+        } else {
+            switch (tto) {
+            case TOKEN_SHL:
+                e = scalarvect(reloc_value(e) << reloc_value(f));
+                break;
+            case TOKEN_SHR:
+                e = scalarvect(((uint64_t)reloc_value(e)) >>
+                               reloc_value(f));
+                break;
+            case TOKEN_SAR:
+                e = scalarvect(((int64_t)reloc_value(e)) >>
+                               reloc_value(f));
+                break;
+            }
+        }
+    }
+    return e;
+}
+
+static expr *expr4(void)
+{
+    expr *e, *f;
+
+    e = expr5();
+    if (!e)
+        return NULL;
+    while (tt == '+' || tt == '-') {
+        int tto = tt;
+        scan();
+        f = expr5();
+        if (!f)
+            return NULL;
+        switch (tto) {
+        case '+':
+            e = add_vectors(e, f);
+            break;
+        case '-':
+            e = add_vectors(e, scalar_mult(f, -1L, false));
+            break;
+        }
+    }
+    return e;
+}
+
+static expr *expr5(void)
+{
+    expr *e, *f;
+
+    e = expr6();
+    if (!e)
+        return NULL;
+    while (tt == '*' || tt == '/' || tt == '%' ||
+           tt == TOKEN_SDIV || tt == TOKEN_SMOD) {
+        int tto = tt;
+        scan();
+        f = expr6();
+        if (!f)
+            return NULL;
+        if (tto != '*' && (!(is_simple(e) || is_just_unknown(e)) ||
+                         !(is_simple(f) || is_just_unknown(f)))) {
+            nasm_nonfatal("division operator may only be applied to"
+                          " scalar values");
+            return NULL;
+        }
+        if (tto != '*' && !is_just_unknown(f) && reloc_value(f) == 0) {
+            nasm_nonfatal("division by zero");
+            return NULL;
+        }
+        switch (tto) {
+        case '*':
+            if (is_simple(e))
+                e = scalar_mult(f, reloc_value(e), true);
+            else if (is_simple(f))
+                e = scalar_mult(e, reloc_value(f), true);
+            else if (is_just_unknown(e) && is_just_unknown(f))
+                e = unknown_expr();
+            else {
+                nasm_nonfatal("unable to multiply two "
+                              "non-scalar objects");
+                return NULL;
+            }
+            break;
+        case '/':
+            if (is_just_unknown(e) || is_just_unknown(f))
+                e = unknown_expr();
+            else
+                e = scalarvect(((uint64_t)reloc_value(e)) /
+                               ((uint64_t)reloc_value(f)));
+            break;
+        case '%':
+            if (is_just_unknown(e) || is_just_unknown(f))
+                e = unknown_expr();
+            else
+                e = scalarvect(((uint64_t)reloc_value(e)) %
+                               ((uint64_t)reloc_value(f)));
+            break;
+        case TOKEN_SDIV:
+            if (is_just_unknown(e) || is_just_unknown(f))
+                e = unknown_expr();
+            else
+                e = scalarvect(((int64_t)reloc_value(e)) /
+                               ((int64_t)reloc_value(f)));
+            break;
+        case TOKEN_SMOD:
+            if (is_just_unknown(e) || is_just_unknown(f))
+                e = unknown_expr();
+            else
+                e = scalarvect(((int64_t)reloc_value(e)) %
+                               ((int64_t)reloc_value(f)));
+            break;
+        }
+    }
+    return e;
+}
+
+static expr *eval_floatize(enum floatize type)
+{
+    uint8_t result16, *p;     /* Up to 128 bits */
+    int sign = 1;
+    int64_t val;
+    size_t len;
+    int i;
+    const struct ieee_format *fmt;
+
+    fmt = &fp_formatstype;
+
+    scan();
+    if (tt != '(') {
+        nasm_nonfatal("expecting `('");
+        return NULL;
+    }
+    scan();
+    if (tt == '-' || tt == '+') {
+        sign = (tt == '-') ? -1 : 1;
+        scan();
+    }
+    if (tt != TOKEN_FLOAT) {
+        nasm_nonfatal("expecting floating-point number");
+        return NULL;
+    }
+    if (!float_const(tokval->t_charptr, sign, result, type))
+        return NULL;
+    scan();
+    if (tt != ')') {
+        nasm_nonfatal("expecting `)'");
+        return NULL;
+    }
+
+    len = fmt->bytes - fmt->offset;
+    if (len > 8)
+        len = 8;                /* Max 64 bits */
+    p = result + len + fmt->offset;
+    val = 0;
+    for (i = len; i; i--) {
+        p--;
+        val = (val << 8) + *p;
+    }
+
+    begintemp();
+    addtotemp(EXPR_SIMPLE, val);
+
+    scan();
+    return finishtemp();
+}
+
+static expr *eval_strfunc(enum strfunc type, const char *name)
+{
+    char *string;
+    size_t string_len;
+    int64_t val;
+    bool parens, rn_warn;
+
+    parens = false;
+    scan();
+    if (tt == '(') {
+        parens = true;
+        scan();
+    }
+    if (tt != TOKEN_STR) {
+        nasm_nonfatal("expecting string as argument to %s", name);
+        return NULL;
+    }
+    string_len = string_transform(tokval->t_charptr, tokval->t_inttwo,
+                                  &string, type);
+    if (string_len == (size_t)-1) {
+        nasm_nonfatal("invalid input string to %s", name);
+        return NULL;
+    }
+
+    val = readstrnum(string, string_len, &rn_warn);
+    if (parens) {
+        scan();
+        if (tt != ')') {
+            nasm_nonfatal("expecting `)'");
+            return NULL;
+        }
+    }
+
+    if (rn_warn)
+        nasm_warn(WARN_OTHER, "character constant too long");
+
+    begintemp();
+    addtotemp(EXPR_SIMPLE, val);
+
+    scan();
+    return finishtemp();
+}
+
+static int64_t eval_ifunc(int64_t val, enum ifunc func)
+{
+    uint64_t uval = (uint64_t)val;
+    int64_t rv;
+
+    switch (func) {
+    case IFUNC_ILOG2E:
+    case IFUNC_ILOG2W:
+        if (!is_power2(uval))
+            nasm_error((func == IFUNC_ILOG2E) ? ERR_NONFATAL : ERR_WARNING|WARN_OTHER,
+                       "ilog2 argument is not a power of two");
+        /* fall through */
+    case IFUNC_ILOG2F:
+        rv = ilog2_64(uval);
+        break;
+
+    case IFUNC_ILOG2C:
+        rv = (uval < 2) ? 0 : ilog2_64(uval-1) + 1;
+        break;
+
+    default:
+        nasm_panic("invalid IFUNC token %d", func);
+        rv = 0;
+        break;
+    }
+
+    return rv;
+}
+
+static expr *expr6(void)
+{
+    int32_t type;
+    expr *e;
+    int32_t label_seg;
+    int64_t label_ofs;
+    int64_t tmpval;
+    bool rn_warn;
+    const char *scope;
+
+    if (++deadman > nasm_limitLIMIT_EVAL) {
+        nasm_nonfatal("expression too long");
+        return NULL;
+    }
+
+    switch (tt) {
+    case '-':
+        scan();
+        e = expr6();
+        if (!e)
+            return NULL;
+        return scalar_mult(e, -1L, false);
+
+    case '+':
+        scan();
+        return expr6();
+
+    case '~':
+        scan();
+        e = expr6();
+        if (!e)
+            return NULL;
+        if (is_just_unknown(e))
+            return unknown_expr();
+        else if (!is_simple(e)) {
+            nasm_nonfatal("`~' operator may only be applied to"
+                  " scalar values");
+            return NULL;
+        }
+        return scalarvect(~reloc_value(e));
+
+    case '!':
+        scan();
+        e = expr6();
+        if (!e)
+            return NULL;
+        if (is_just_unknown(e))
+            return unknown_expr();
+        else if (!is_simple(e)) {
+            nasm_nonfatal("`!' operator may only be applied to"
+                  " scalar values");
+            return NULL;
+        }
+        return scalarvect(!reloc_value(e));
+
+    case TOKEN_IFUNC:
+    {
+        enum ifunc func = tokval->t_integer;
+        scan();
+        e = expr6();
+        if (!e)
+            return NULL;
+        if (is_just_unknown(e))
+            return unknown_expr();
+        else if (!is_simple(e)) {
+            nasm_nonfatal("function may only be applied to"
+                  " scalar values");
+            return NULL;
+        }
+        return scalarvect(eval_ifunc(reloc_value(e), func));
+    }
+
+    case TOKEN_SEG:
+        scan();
+        e = expr6();
+        if (!e)
+            return NULL;
+        e = segment_part(e);
+        if (!e)
+            return NULL;
+        if (is_unknown(e) && critical) {
+            nasm_nonfatal("unable to determine segment base");
+            return NULL;
+        }
+        return e;
+
+    case TOKEN_FLOATIZE:
+        return eval_floatize(tokval->t_integer);
+
+    case TOKEN_STRFUNC:
+        return eval_strfunc(tokval->t_integer, tokval->t_charptr);
+
+    case '(':
+        scan();
+        e = bexpr();
+        if (!e)
+            return NULL;
+        if (tt != ')') {
+            nasm_nonfatal("expecting `)'");
+            return NULL;
+        }
+        scan();
+        return e;
+
+    case TOKEN_NUM:
+    case TOKEN_STR:
+    case TOKEN_REG:
+    case TOKEN_ID:
+    case TOKEN_INSN:            /* Opcodes that occur here are really labels */
+    case TOKEN_HERE:
+    case TOKEN_BASE:
+    case TOKEN_DECORATOR:
+        begintemp();
+        switch (tt) {
+        case TOKEN_NUM:
+            addtotemp(EXPR_SIMPLE, tokval->t_integer);
+            break;
+        case TOKEN_STR:
+            tmpval = readstrnum(tokval->t_charptr, tokval->t_inttwo, &rn_warn);
+            if (rn_warn)
+                nasm_warn(WARN_OTHER, "character constant too long");
+            addtotemp(EXPR_SIMPLE, tmpval);
+            break;
+        case TOKEN_REG:
+            addtotemp(tokval->t_integer, 1L);
+            if (hint && hint->type == EAH_NOHINT)
+                hint->base = tokval->t_integer, hint->type = EAH_MAKEBASE;
+            break;
+        case TOKEN_ID:
+        case TOKEN_INSN:
+        case TOKEN_HERE:
+        case TOKEN_BASE:
+            /*
+             * If !location.known, this indicates that no
+             * symbol, Here or Base references are valid because we
+             * are in preprocess-only mode.
+             */
+            if (!location.known) {
+                nasm_nonfatal("%s not supported in preprocess-only mode",
+                              (tt == TOKEN_HERE ? "`$'" :
+                               tt == TOKEN_BASE ? "`$$'" :
+                               "symbol references"));
+                addtotemp(EXPR_UNKNOWN, 1L);
+                break;
+            }
+
+            type = EXPR_SIMPLE; /* might get overridden by UNKNOWN */
+            if (tt == TOKEN_BASE) {
+                label_seg = in_absolute ? absolute.segment : location.segment;
+                label_ofs = 0;
+            } else if (tt == TOKEN_HERE) {
+                label_seg = in_absolute ? absolute.segment : location.segment;
+                label_ofs = in_absolute ? absolute.offset : location.offset;
+            } else {
+                enum label_type ltype;
+                ltype = lookup_label(tokval->t_charptr, &label_seg, &label_ofs);
+                if (ltype == LBL_none) {
+                    scope = local_scope(tokval->t_charptr);
+                    if (critical) {
+                        nasm_nonfatal("symbol `%s%s' not defined%s",
+                                      scope,tokval->t_charptr,
+                                      pass_first() ? " before use" : "");
+                        return NULL;
+                    }
+                    if (opflags)
+                        *opflags |= OPFLAG_FORWARD;
+                    type = EXPR_UNKNOWN;
+                    label_seg = NO_SEG;
+                    label_ofs = 1;
+                } else if (is_extern(ltype)) {
+                    if (opflags)
+                        *opflags |= OPFLAG_EXTERN;
+                }
+            }
+            addtotemp(type, label_ofs);
+            if (label_seg != NO_SEG)
+                addtotemp(EXPR_SEGBASE + label_seg, 1L);
+            break;
+        case TOKEN_DECORATOR:
+            addtotemp(EXPR_RDSAE, tokval->t_integer);
+            break;
+        }
+        scan();
+        return finishtemp();
+
+    default:
+        nasm_nonfatal("expression syntax error");
+        return NULL;
+    }
+}
+
+expr *evaluate(scanner sc, void *scprivate, struct tokenval *tv,
+               int *fwref, bool crit, struct eval_hints *hints)
+{
+    expr *e;
+    expr *f = NULL;
+
+    deadman = 0;
+
+    hint = hints;
+    if (hint)
+        hint->type = EAH_NOHINT;
+
+    critical = crit;
+    scanfunc = sc;
+    scpriv = scprivate;
+    tokval = tv;
+    opflags = fwref;
+
+    while (ntempexprs)          /* initialize temporary storage */
+        nasm_free(tempexprs--ntempexprs);
+
+    tt = tokval->t_type;
+    if (tt == TOKEN_INVALID)
+        scan();
+
+    e = bexpr();
+    if (!e)
+        return NULL;
+
+    if (tt == TOKEN_WRT) {
+        scan();                 /* eat the WRT */
+        f = expr6();
+        if (!f)
+            return NULL;
+    }
+    e = scalar_mult(e, 1L, false);      /* strip far-absolute segment part */
+    if (f) {
+        expr *g;
+        if (is_just_unknown(f))
+            g = unknown_expr();
+        else {
+            int64_t value;
+            begintemp();
+            if (!is_reloc(f)) {
+                nasm_nonfatal("invalid right-hand operand to WRT");
+                return NULL;
+            }
+            value = reloc_seg(f);
+            if (value == NO_SEG)
+                value = reloc_value(f) | SEG_ABS;
+            else if (!(value & SEG_ABS) && !(value % 2) && critical) {
+                nasm_nonfatal("invalid right-hand operand to WRT");
+                return NULL;
+            }
+            addtotemp(EXPR_WRT, value);
+            g = finishtemp();
+        }
+        e = add_vectors(e, g);
+    }
+    return e;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/asm/eval.h Added

@@ -0,0 +1,49 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2009 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/* 
+ * eval.h   header file for eval.c
+ */
+
+#ifndef NASM_EVAL_H
+#define NASM_EVAL_H
+
+/*
+ * The evaluator itself.
+ */
+expr *evaluate(scanner sc, void *scprivate, struct tokenval *tv,
+               int *fwref, bool critical, struct eval_hints *hints);
+
+void eval_cleanup(void);
+
+#endif

_service:tar_scm:nasm-2.16.03.tar.xz/asm/exprdump.c Added

@@ -0,0 +1,79 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2017 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * exprdump.c
+ *
+ * Debugging code to dump the contents of an expression vector to stdout
+ */
+
+#include "nasm.h"
+
+static const char *expr_type(int32_t type)
+{
+    static char seg_str64;
+
+    switch (type) {
+    case 0:
+        return "null";
+    case EXPR_UNKNOWN:
+        return "unknown";
+    case EXPR_SIMPLE:
+        return "simple";
+    case EXPR_WRT:
+        return "wrt";
+    case EXPR_RDSAE:
+        return "sae";
+    default:
+        break;
+    }
+
+    if (type >= EXPR_REG_START && type <= EXPR_REG_END) {
+        return nasm_reg_namestype - EXPR_REG_START;
+    } else if (type >= EXPR_SEGBASE) {
+        snprintf(seg_str, sizeof seg_str, "%sseg %d",
+                 (type - EXPR_SEGBASE) == location.segment ? "this " : "",
+                 type - EXPR_SEGBASE);
+        return seg_str;
+    } else {
+        return "ERR";
+    }
+}
+
+void dump_expr(const expr *e)
+{
+    printf("");
+    for (; e->type; e++)
+        printf("<%s(%d),%"PRId64">", expr_type(e->type), e->type, e->value);
+    printf("\n");
+}

_service:tar_scm:nasm-2.16.03.tar.xz/asm/exprlib.c Added

@@ -0,0 +1,200 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2017 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * exprlib.c
+ *
+ * Library routines to manipulate expression data types.
+ */
+
+#include "nasm.h"
+
+/*
+ * Return true if the argument is a simple scalar. (Or a far-
+ * absolute, which counts.)
+ */
+bool is_simple(const expr *vect)
+{
+    while (vect->type && !vect->value)
+        vect++;
+    if (!vect->type)
+        return true;
+    if (vect->type != EXPR_SIMPLE)
+        return false;
+    do {
+        vect++;
+    } while (vect->type && !vect->value);
+    if (vect->type && vect->type < EXPR_SEGBASE + SEG_ABS)
+        return false;
+    return true;
+}
+
+/*
+ * Return true if the argument is a simple scalar, _NOT_ a far-
+ * absolute.
+ */
+bool is_really_simple(const expr *vect)
+{
+    while (vect->type && !vect->value)
+        vect++;
+    if (!vect->type)
+        return true;
+    if (vect->type != EXPR_SIMPLE)
+        return false;
+    do {
+        vect++;
+    } while (vect->type && !vect->value);
+    if (vect->type)
+        return false;
+    return true;
+}
+
+/*
+ * Return true if the argument is relocatable (i.e. a simple
+ * scalar, plus at most one segment-base, possibly a subtraction
+ * of the current segment base, plus possibly a WRT).
+ */
+bool is_reloc(const expr *vect)
+{
+    bool has_rel = false;       /* Has a self-segment-subtract */
+    bool has_seg = false;       /* Has a segment base */
+
+    for (; vect->type; vect++) {
+        if (!vect->value) {
+            /* skip value-0 terms */
+            continue;
+        } else if (vect->type < EXPR_SIMPLE) {
+            /* false if a register is present */
+            return false;
+        } else if (vect->type == EXPR_SIMPLE) {
+            /* skip over a pure number term... */
+            continue;
+        } else if (vect->type == EXPR_WRT) {
+            /* skip over a WRT term... */
+            continue;
+        } else if (vect->type < EXPR_SEGBASE) {
+            /* other special type -> problem */
+            return false;
+        } else if (vect->value == 1) {
+            if (has_seg)
+                return false;   /* only one segbase allowed */
+            has_seg = true;
+        } else if (vect->value == -1) {
+            if (vect->type != location.segment + EXPR_SEGBASE)
+                return false;   /* can only subtract current segment */
+            if (has_rel)
+                return false;   /* already is relative */
+            has_rel = true;
+        }
+    }
+
+    return true;
+}
+
+/*
+ * Return true if the argument contains an `unknown' part.
+ */
+bool is_unknown(const expr *vect)
+{
+    while (vect->type && vect->type < EXPR_UNKNOWN)
+        vect++;
+    return (vect->type == EXPR_UNKNOWN);
+}
+
+/*
+ * Return true if the argument contains nothing but an `unknown'
+ * part.
+ */
+bool is_just_unknown(const expr *vect)
+{
+    while (vect->type && !vect->value)
+        vect++;
+    return (vect->type == EXPR_UNKNOWN);
+}
+
+/*
+ * Return the scalar part of a relocatable vector. (Including
+ * simple scalar vectors - those qualify as relocatable.)
+ */
+int64_t reloc_value(const expr *vect)
+{
+    while (vect->type && !vect->value)
+        vect++;
+    if (!vect->type)
+        return 0;
+    if (vect->type == EXPR_SIMPLE)
+        return vect->value;
+    else
+        return 0;
+}
+
+/*
+ * Return the segment number of a relocatable vector, or NO_SEG for
+ * simple scalars.
+ */
+int32_t reloc_seg(const expr *vect)
+{
+    for (; vect->type; vect++) {
+        if (vect->type >= EXPR_SEGBASE && vect->value == 1)
+            return vect->type - EXPR_SEGBASE;
+    }
+
+    return NO_SEG;
+}
+
+/*
+ * Return the WRT segment number of a relocatable vector, or NO_SEG
+ * if no WRT part is present.
+ */
+int32_t reloc_wrt(const expr *vect)
+{
+    while (vect->type && vect->type < EXPR_WRT)
+        vect++;
+    if (vect->type == EXPR_WRT) {
+        return vect->value;
+    } else
+        return NO_SEG;
+}
+
+/*
+ * Return true if this expression contains a subtraction of the location
+ */
+bool is_self_relative(const expr *vect)
+{
+    for (; vect->type; vect++) {
+        if (vect->type == location.segment + EXPR_SEGBASE && vect->value == -1)
+            return true;
+    }
+
+    return false;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/asm/floats.c Added

@@ -0,0 +1,960 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2020 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * float.c     floating-point constant support for the Netwide Assembler
+ */
+
+#include "compiler.h"
+
+#include "nctype.h"
+
+#include "nasm.h"
+#include "floats.h"
+#include "error.h"
+
+/*
+ * -----------------
+ *  local variables
+ * -----------------
+ */
+static bool daz = false;        /* denormals as zero */
+static enum float_round rc = FLOAT_RC_NEAR;     /* rounding control */
+
+/*
+ * -----------
+ *  constants
+ * -----------
+ */
+
+/* "A limb is like a digit but bigger */
+typedef uint32_t fp_limb;
+typedef uint64_t fp_2limb;
+
+#define LIMB_BITS       32
+#define LIMB_BYTES      (LIMB_BITS/8)
+#define LIMB_TOP_BIT    ((fp_limb)1 << (LIMB_BITS-1))
+#define LIMB_MASK       ((fp_limb)(~0))
+#define LIMB_ALL_BYTES  ((fp_limb)0x01010101)
+#define LIMB_BYTE(x)    ((x)*LIMB_ALL_BYTES)
+
+/* 112 bits + 64 bits for accuracy + 16 bits for rounding */
+#define MANT_LIMBS 6
+
+/* 52 digits fit in 176 bits because 10^53 > 2^176 > 10^52 */
+#define MANT_DIGITS 52
+
+/* the format and the argument list depend on MANT_LIMBS */
+#define MANT_FMT "%08x_%08x_%08x_%08x_%08x_%08x"
+#define MANT_ARG SOME_ARG(mant, 0)
+
+#define SOME_ARG(a,i) (a)(i)+0, (a)(i)+1, (a)(i)+2, \
+                      (a)(i)+3, (a)(i)+4, (a)(i)+5
+
+/*
+ * ---------------------------------------------------------------------------
+ *  emit a printf()-like debug message... but only if DEBUG_FLOAT was defined
+ * ---------------------------------------------------------------------------
+ */
+
+#ifdef DEBUG_FLOAT
+#define dprintf(x) printf x
+#else
+#define dprintf(x) do { } while (0)
+#endif
+
+/*
+ * ---------------------------------------------------------------------------
+ *  multiply
+ * ---------------------------------------------------------------------------
+ */
+static int float_multiply(fp_limb *to, fp_limb *from)
+{
+    fp_2limb tempMANT_LIMBS * 2;
+    int i, j;
+
+    /*
+     * guaranteed that top bit of 'from' is set -- so we only have
+     * to worry about _one_ bit shift to the left
+     */
+    dprintf(("%s=" MANT_FMT "\n", "mul1", SOME_ARG(to, 0)));
+    dprintf(("%s=" MANT_FMT "\n", "mul2", SOME_ARG(from, 0)));
+
+    memset(temp, 0, sizeof temp);
+
+    for (i = 0; i < MANT_LIMBS; i++) {
+        for (j = 0; j < MANT_LIMBS; j++) {
+            fp_2limb n;
+            n = (fp_2limb) toi * (fp_2limb) fromj;
+            tempi + j += n >> LIMB_BITS;
+            tempi + j + 1 += (fp_limb)n;
+        }
+    }
+
+    for (i = MANT_LIMBS * 2; --i;) {
+        tempi - 1 += tempi >> LIMB_BITS;
+        tempi &= LIMB_MASK;
+    }
+
+    dprintf(("%s=" MANT_FMT "_" MANT_FMT "\n", "temp", SOME_ARG(temp, 0),
+             SOME_ARG(temp, MANT_LIMBS)));
+
+    if (temp0 & LIMB_TOP_BIT) {
+        for (i = 0; i < MANT_LIMBS; i++) {
+            toi = tempi & LIMB_MASK;
+        }
+        dprintf(("%s=" MANT_FMT " (%i)\n", "prod", SOME_ARG(to, 0), 0));
+        return 0;
+    } else {
+        for (i = 0; i < MANT_LIMBS; i++) {
+            toi = (tempi << 1) + !!(tempi + 1 & LIMB_TOP_BIT);
+        }
+        dprintf(("%s=" MANT_FMT " (%i)\n", "prod", SOME_ARG(to, 0), -1));
+        return -1;
+    }
+}
+
+/*
+ * ---------------------------------------------------------------------------
+ *  read an exponent; returns INT32_MAX on error
+ * ---------------------------------------------------------------------------
+ */
+static int32_t read_exponent(const char *string, int32_t max)
+{
+    int32_t i = 0;
+    bool neg = false;
+
+    if (*string == '+') {
+        string++;
+    } else if (*string == '-') {
+        neg = true;
+        string++;
+    }
+    while (*string) {
+        if (*string >= '0' && *string <= '9') {
+            i = (i * 10) + (*string - '0');
+
+            /*
+             * To ensure that underflows and overflows are
+             * handled properly we must avoid wraparounds of
+             * the signed integer value that is used to hold
+             * the exponent. Therefore we cap the exponent at
+             * +/-5000, which is slightly more/less than
+             * what's required for normal and denormal numbers
+             * in single, double, and extended precision, but
+             * sufficient to avoid signed integer wraparound.
+             */
+            if (i > max)
+                i = max;
+        } else if (*string == '_') {
+            /* do nothing */
+        } else {
+            nasm_nonfatal("invalid character in floating-point constant %s: '%c'",
+                          "exponent", *string);
+            return INT32_MAX;
+        }
+        string++;
+    }
+
+    return neg ? -i : i;
+}
+
+/*
+ * ---------------------------------------------------------------------------
+ *  convert
+ * ---------------------------------------------------------------------------
+ */
+static bool ieee_flconvert(const char *string, fp_limb *mant,
+                           int32_t * exponent)
+{
+    char digitsMANT_DIGITS;
+    char *p, *q, *r;
+    fp_limb multMANT_LIMBS, bit;
+    fp_limb *m;
+    int32_t tenpwr, twopwr;
+    int32_t extratwos;
+    bool started, seendot, warned;
+
+    warned = false;
+    p = digits;
+    tenpwr = 0;
+    started = seendot = false;
+
+    while (*string && *string != 'E' && *string != 'e') {
+        if (*string == '.') {
+            if (!seendot) {
+                seendot = true;
+            } else {
+                nasm_nonfatal("too many periods in floating-point constant");
+                return false;
+            }
+        } else if (*string >= '0' && *string <= '9') {
+            if (*string == '0' && !started) {
+                if (seendot) {
+                    tenpwr--;
+                }
+            } else {
+                started = true;
+                if (p < digits + sizeof(digits)) {
+                    *p++ = *string - '0';
+                } else {
+                    if (!warned) {
+                        /*!
+                         *!float-toolong on too many digits in floating-point number
+                         *!  warns about too many digits in floating-point numbers.
+                         */
+                        nasm_warn(WARN_FLOAT_TOOLONG|ERR_PASS2,
+                                   "floating-point constant significand contains "
+                                   "more than %i digits", MANT_DIGITS);
+                        warned = true;
+                    }
+                }
+                if (!seendot) {
+                    tenpwr++;
+                }
+            }
+        } else if (*string == '_') {
+            /* do nothing */
+        } else {
+            nasm_nonfatalf(ERR_PASS2,
+                           "invalid character in floating-point constant %s: '%c'",
+                           "significand", *string);
+            return false;
+        }
+        string++;
+    }
+
+    if (*string) {
+        int32_t e;
+
+        string++;               /* eat the E */
+        e = read_exponent(string, 5000);
+        if (e == INT32_MAX)
+            return false;
+        tenpwr += e;
+    }
+
+    /*
+     * At this point, the memory interval digits,p) contains a
+     * series of decimal digits zzzzzzz, such that our number X
+     * satisfies X = 0.zzzzzzz * 10^tenpwr.
+     */
+    q = digits;
+    dprintf(("X = 0."));
+    while (q < p) {
+        dprintf(("%c", *q + '0'));
+        q++;
+    }
+    dprintf((" * 10^%i\n", tenpwr));
+
+    /*
+     * Now convert digits,p) to our internal representation.
+     */
+    bit = LIMB_TOP_BIT;
+    for (m = mant; m < mant + MANT_LIMBS; m++) {
+        *m = 0;
+    }
+    m = mant;
+    q = digits;
+    started = false;
+    twopwr = 0;
+    while (m < mant + MANT_LIMBS) {
+        fp_limb carry = 0;
+        while (p > q && !p-1) {
+            p--;
+        }
+        if (p <= q) {
+            break;
+        }
+        for (r = p; r-- > q;) {
+            int32_t i;
+            i = 2 * *r + carry;
+            if (i >= 10) {
+                carry = 1;
+                i -= 10;
+            } else {
+                carry = 0;
+            }
+            *r = i;
+        }
+        if (carry) {
+            *m |= bit;
+            started = true;
+        }
+        if (started) {
+            if (bit == 1) {
+                bit = LIMB_TOP_BIT;
+                m++;
+            } else {
+                bit >>= 1;
+            }
+        } else {
+            twopwr--;
+        }
+    }
+    twopwr += tenpwr;
+
+    /*
+     * At this point, the 'mant' array contains the first frac-
+     * tional places of a base-2^16 real number which when mul-
+     * tiplied by 2^twopwr and 5^tenpwr gives X.
+     */
+    dprintf(("X = " MANT_FMT " * 2^%i * 5^%i\n", MANT_ARG, twopwr,
+             tenpwr));
+
+    /*
+     * Now multiply 'mant' by 5^tenpwr.
+     */
+    if (tenpwr < 0) {           /* mult = 5^-1 = 0.2 */
+        for (m = mult; m < mult + MANT_LIMBS - 1; m++) {
+            *m = LIMB_BYTE(0xcc);
+        }
+        multMANT_LIMBS - 1 = LIMB_BYTE(0xcc)+1;
+        extratwos = -2;
+        tenpwr = -tenpwr;
+
+        /*
+         * If tenpwr was 1000...000b, then it becomes 1000...000b. See
+         * the "ANSI C" comment below for more details on that case.
+         *
+         * Because we already truncated tenpwr to +5000...-5000 inside
+         * the exponent parsing code, this shouldn't happen though.
+         */
+    } else if (tenpwr > 0) {    /* mult = 5^+1 = 5.0 */
+        mult0 = (fp_limb)5 << (LIMB_BITS-3); /* 0xA000... */
+        for (m = mult + 1; m < mult + MANT_LIMBS; m++) {
+            *m = 0;
+        }
+        extratwos = 3;
+    } else {
+        extratwos = 0;
+    }
+    while (tenpwr) {
+        dprintf(("loop=" MANT_FMT " * 2^%i * 5^%i (%i)\n", MANT_ARG,
+                 twopwr, tenpwr, extratwos));
+        if (tenpwr & 1) {
+            dprintf(("mant*mult\n"));
+            twopwr += extratwos + float_multiply(mant, mult);
+        }
+        dprintf(("mult*mult\n"));
+        extratwos = extratwos * 2 + float_multiply(mult, mult);
+        tenpwr >>= 1;
+
+        /*
+         * In ANSI C, the result of right-shifting a signed integer is
+         * considered implementation-specific. To ensure that the loop
+         * terminates even if tenpwr was 1000...000b to begin with, we
+         * manually clear the MSB, in case a 1 was shifted in.
+         *
+         * Because we already truncated tenpwr to +5000...-5000 inside
+         * the exponent parsing code, this shouldn't matter; neverthe-
+         * less it is the right thing to do here.
+         */
+        tenpwr &= (uint32_t) - 1 >> 1;
+    }
+
+    /*
+     * At this point, the 'mant' array contains the first frac-
+     * tional places of a base-2^16 real number in 0.5,1) that
+     * when multiplied by 2^twopwr gives X. Or it contains zero
+     * of course. We are done.
+     */
+    *exponent = twopwr;
+    return true;
+}
+
+/*
+ * ---------------------------------------------------------------------------
+ *  operations of specific bits
+ * ---------------------------------------------------------------------------
+ */
+
+/* Set a bit, using *bigendian* bit numbering (0 = MSB) */
+static void set_bit(fp_limb *mant, int bit)
+{
+    mantbit/LIMB_BITS |= LIMB_TOP_BIT >> (bit & (LIMB_BITS-1));
+}
+
+/* Test a single bit */
+static int test_bit(const fp_limb *mant, int bit)
+{
+    return (mantbit/LIMB_BITS >> (~bit & (LIMB_BITS-1))) & 1;
+}
+
+/* Report if the mantissa value is all zero */
+static bool is_zero(const fp_limb *mant)
+{
+    int i;
+
+    for (i = 0; i < MANT_LIMBS; i++)
+        if (manti)
+            return false;
+
+    return true;
+}
+
+/*
+ * ---------------------------------------------------------------------------
+ *  round a mantissa off after i words
+ * ---------------------------------------------------------------------------
+ */
+
+#define ROUND_COLLECT_BITS                      \
+    do {                                        \
+        m = manti & (2*bit-1);                \
+        for (j = i+1; j < MANT_LIMBS; j++)      \
+            m = m | mantj;                    \
+    } while (0)
+
+#define ROUND_ABS_DOWN                          \
+    do {                                        \
+        manti &= ~(bit-1);                    \
+        for (j = i+1; j < MANT_LIMBS; j++)      \
+            mantj = 0;                        \
+        return false;                           \
+    } while (0)
+
+#define ROUND_ABS_UP                            \
+    do {                                        \
+        manti = (manti & ~(bit-1)) + bit;   \
+        for (j = i+1; j < MANT_LIMBS; j++)      \
+            mantj = 0;                        \
+        while (i > 0 && !manti)               \
+            ++mant--i;                        \
+        return !mant0;                        \
+    } while (0)
+
+static bool ieee_round(bool minus, fp_limb *mant, int bits)
+{
+    fp_limb m = 0;
+    int32_t j;
+    int i = bits / LIMB_BITS;
+    int p = bits % LIMB_BITS;
+    fp_limb bit = LIMB_TOP_BIT >> p;
+
+    if (rc == FLOAT_RC_NEAR) {
+        if (manti & bit) {
+            manti &= ~bit;
+            ROUND_COLLECT_BITS;
+            manti |= bit;
+            if (m) {
+                ROUND_ABS_UP;
+            } else {
+                if (test_bit(mant, bits-1)) {
+                    ROUND_ABS_UP;
+                } else {
+                    ROUND_ABS_DOWN;
+                }
+            }
+        } else {
+            ROUND_ABS_DOWN;
+        }
+    } else if (rc == FLOAT_RC_ZERO ||
+               rc == (minus ? FLOAT_RC_UP : FLOAT_RC_DOWN)) {
+        ROUND_ABS_DOWN;
+    } else {
+        /* rc == (minus ? FLOAT_RC_DOWN : FLOAT_RC_UP) */
+        /* Round toward +/- infinity */
+        ROUND_COLLECT_BITS;
+        if (m) {
+            ROUND_ABS_UP;
+        } else {
+            ROUND_ABS_DOWN;
+        }
+    }
+    return false;
+}
+
+/* Returns a value >= 16 if not a valid hex digit */
+static unsigned int hexval(char c)
+{
+    unsigned int v = (unsigned char) c;
+
+    if (v >= '0' && v <= '9')
+        return v - '0';
+    else
+        return (v|0x20) - 'a' + 10;
+}
+
+/* Handle floating-point numbers with radix 2^bits and binary exponent */
+static bool ieee_flconvert_bin(const char *string, int bits,
+                               fp_limb *mant, int32_t *exponent)
+{
+    static const int log2tbl16 =
+        { -1, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3 };
+    fp_limb multMANT_LIMBS + 1, *mp;
+    int ms;
+    int32_t twopwr;
+    bool seendot, seendigit;
+    unsigned char c;
+    const int radix = 1 << bits;
+    fp_limb v;
+
+    twopwr = 0;
+    seendot = seendigit = false;
+    ms = 0;
+    mp = NULL;
+
+    memset(mult, 0, sizeof mult);
+
+    while ((c = *string++) != '\0') {
+        if (c == '.') {
+            if (!seendot)
+                seendot = true;
+            else {
+                nasm_nonfatal("too many periods in floating-point constant");
+                return false;
+            }
+        } else if ((v = hexval(c)) < (unsigned int)radix) {
+            if (!seendigit && v) {
+                int l = log2tblv;
+
+                seendigit = true;
+                mp = mult;
+                ms = (LIMB_BITS-1)-l;
+
+                twopwr += l+1-bits;
+            }
+
+            if (seendigit) {
+                if (ms < 0) {
+                    /* Cast to fp_2limb as ms == -LIMB_BITS is possible. */
+                    *mp |= (fp_2limb)v >> -ms;
+                    mp++;
+                    if (mp > &multMANT_LIMBS)
+                        mp = &multMANT_LIMBS; /* Guard slot */
+                    ms += LIMB_BITS;
+                }
+                *mp |= v << ms;
+                ms -= bits;
+
+                if (!seendot)
+                    twopwr += bits;
+            } else {
+                if (seendot)
+                    twopwr -= bits;
+            }
+        } else if (c == 'p' || c == 'P') {
+            int32_t e;
+            e = read_exponent(string, 20000);
+            if (e == INT32_MAX)
+                return false;
+            twopwr += e;
+            break;
+        } else if (c == '_') {
+            /* ignore */
+        } else {
+            nasm_nonfatal("floating-point constant: `%c' is invalid character", c);
+            return false;
+        }
+    }
+
+    if (!seendigit) {
+        memset(mant, 0, MANT_LIMBS*sizeof(fp_limb)); /* Zero */
+        *exponent = 0;
+    } else {
+        memcpy(mant, mult, MANT_LIMBS*sizeof(fp_limb));
+        *exponent = twopwr;
+    }
+
+    return true;
+}
+
+/*
+ * Shift a mantissa to the right by i bits.
+ */
+static void ieee_shr(fp_limb *mant, int i)
+{
+    fp_limb n, m;
+    int j = 0;
+    int sr, sl, offs;
+
+    sr = i % LIMB_BITS; sl = LIMB_BITS-sr;
+    offs = i/LIMB_BITS;
+
+    if (sr == 0) {
+        if (offs)
+            for (j = MANT_LIMBS-1; j >= offs; j--)
+                mantj = mantj-offs;
+    } else if (MANT_LIMBS-1-offs < 0) {
+        j = MANT_LIMBS-1;
+    } else {
+        n = mantMANT_LIMBS-1-offs >> sr;
+        for (j = MANT_LIMBS-1; j > offs; j--) {
+            m = mantj-offs-1;
+            mantj = (m << sl) | n;
+            n = m >> sr;
+        }
+        mantj-- = n;
+    }
+    while (j >= 0)
+        mantj-- = 0;
+}
+
+/* Produce standard IEEE formats, with implicit or explicit integer
+   bit; this makes the following assumptions:
+
+   - the sign bit is the MSB, followed by the exponent,
+     followed by the integer bit if present.
+   - the sign bit plus exponent fit in 16 bits.
+   - the exponent bias is 2^(n-1)-1 for an n-bit exponent */
+
+/*
+ * The 16- and 128-bit formats are expected to be in IEEE 754r.
+ * AMD SSE5 uses the 16-bit format.
+ *
+ * The 32- and 64-bit formats are the original IEEE 754 formats.
+ *
+ * The 80-bit format is x87-specific, but widely used.
+ *
+ * The 8-bit format appears to be the consensus 8-bit floating-point
+ * format.  It is apparently used in graphics applications.
+ *
+ * The b16 format is a 16-bit format with smaller mantissa and larger
+ * exponent field.  It is effectively a truncated version of the standard
+ * IEEE 32-bit (single) format, but is explicitly supported here in
+ * order to support proper rounding.
+ *
+ * This array must correspond to enum floatize in include/nasm.h.
+ * Note that there are some formats which have more than one enum;
+ * both need to be listed here with the appropriate offset into the
+ * floating-point byte array (use for the floatize operators.)
+ *
+ * FLOAT_ERR is a value that both represents "invalid format" and the
+ * size of this array.
+ */
+const struct ieee_format fp_formatsFLOAT_ERR = {
+    {  1,   3, 0,  4, 0 },         /* FLOAT_8 */
+    {  2,  10, 0,  5, 0 },         /* FLOAT_16 */
+    {  2,   7, 0,  8, 0 },         /* FLOAT_B16 */
+    {  4,  23, 0,  8, 0 },         /* FLOAT_32 */
+    {  8,  52, 0, 11, 0 },         /* FLOAT_64 */
+    { 10,  63, 1, 15, 0 },         /* FLOAT_80M */
+    { 10,  63, 1, 15, 8 },         /* FLOAT_80E */
+    { 16, 112, 0, 15, 0 },         /* FLOAT_128L */
+    { 16, 112, 0, 15, 8 }          /* FLOAT_128H */
+};
+
+/* Types of values we can generate */
+enum floats {
+    FL_ZERO,
+    FL_DENORMAL,
+    FL_NORMAL,
+    FL_INFINITY,
+    FL_QNAN,
+    FL_SNAN
+};
+
+static int to_packed_bcd(const char *str, const char *p,
+                         int s, uint8_t *result,
+                         const struct ieee_format *fmt)
+{
+    int n = 0;
+    char c;
+    int tv = -1;
+
+    if (fmt->bytes != 10) {
+        nasm_nonfatal("packed BCD requires an 80-bit format");
+        return 0;
+    }
+
+    while (p >= str) {
+        c = *p--;
+        if (c >= '0' && c <= '9') {
+            if (tv < 0) {
+                if (n == 9)
+                    nasm_warn(WARN_OTHER|ERR_PASS2, "packed BCD truncated to 18 digits");
+                tv = c-'0';
+            } else {
+                if (n < 9)
+                    *result++ = tv + ((c-'0') << 4);
+                n++;
+                tv = -1;
+            }
+        } else if (c == '_') {
+            /* do nothing */
+        } else {
+            nasm_nonfatal("invalid character `%c' in packed BCD constant", c);
+            return 0;
+        }
+    }
+    if (tv >= 0) {
+        if (n < 9)
+            *result++ = tv;
+        n++;
+    }
+    while (n < 9) {
+        *result++ = 0;
+        n++;
+    }
+    *result = (s < 0) ? 0x80 : 0;
+
+    return 1;                   /* success */
+}
+
+int float_const(const char *str, int s, uint8_t *result, enum floatize ffmt)
+{
+    const struct ieee_format *fmt = &fp_formatsffmt;
+    fp_limb mantMANT_LIMBS;
+    int32_t exponent = 0;
+    const int32_t expmax = 1 << (fmt->exponent - 1);
+    fp_limb one_mask = LIMB_TOP_BIT >>
+        ((fmt->exponent+fmt->explicit) % LIMB_BITS);
+    const int one_pos = (fmt->exponent+fmt->explicit)/LIMB_BITS;
+    int i;
+    int shift;
+    enum floats type;
+    bool ok;
+    const bool minus = s < 0;
+    const int bits = fmt->bytes * 8;
+    const char *strend;
+
+    nasm_assert(str0);
+
+    strend = strchr(str, '\0');
+    if (strend-1 == 'P' || strend-1 == 'p')
+        return to_packed_bcd(str, strend-2, s, result, fmt);
+
+    if (str0 == '_') {
+        /* Special tokens */
+
+        switch (str3) {
+        case 'n':              /* __?nan?__ */
+        case 'N':
+        case 'q':              /* __?qnan?__ */
+        case 'Q':
+            type = FL_QNAN;
+            break;
+        case 's':              /* __?snan?__ */
+        case 'S':
+            type = FL_SNAN;
+            break;
+        case 'i':              /* __?infinity?__ */
+        case 'I':
+            type = FL_INFINITY;
+            break;
+        default:
+            nasm_nonfatal("internal error: unknown FP constant token `%s'", str);
+            type = FL_QNAN;
+            break;
+        }
+    } else {
+        if (str0 == '0') {
+            switch (str1) {
+            case 'x': case 'X':
+            case 'h': case 'H':
+                ok = ieee_flconvert_bin(str+2, 4, mant, &exponent);
+                break;
+            case 'o': case 'O':
+            case 'q': case 'Q':
+                ok = ieee_flconvert_bin(str+2, 3, mant, &exponent);
+                break;
+            case 'b': case 'B':
+            case 'y': case 'Y':
+                ok = ieee_flconvert_bin(str+2, 1, mant, &exponent);
+                break;
+            case 'd': case 'D':
+            case 't': case 'T':
+                ok = ieee_flconvert(str+2, mant, &exponent);
+                break;
+            case 'p': case 'P':
+                return to_packed_bcd(str+2, strend-1, s, result, fmt);
+            default:
+                /* Leading zero was just a zero? */
+                ok = ieee_flconvert(str, mant, &exponent);
+                break;
+            }
+        } else if (str0 == '$') {
+            ok = ieee_flconvert_bin(str+1, 4, mant, &exponent);
+        } else {
+            ok = ieee_flconvert(str, mant, &exponent);
+        }
+
+        if (!ok) {
+            type = FL_QNAN;
+        } else if (mant0 & LIMB_TOP_BIT) {
+            /*
+             * Non-zero.
+             */
+            exponent--;
+            if (exponent >= 2 - expmax && exponent <= expmax) {
+                type = FL_NORMAL;
+            } else if (exponent > 0) {
+                nasm_warn(WARN_FLOAT_OVERFLOW|ERR_PASS2,
+                           "overflow in floating-point constant");
+                type = FL_INFINITY;
+            } else {
+                /* underflow or denormal; the denormal code handles
+                   actual underflow. */
+                type = FL_DENORMAL;
+            }
+        } else {
+            /* Zero */
+            type = FL_ZERO;
+        }
+    }
+
+    switch (type) {
+    case FL_ZERO:
+    zero:
+        memset(mant, 0, sizeof mant);
+        break;
+
+    case FL_DENORMAL:
+    {
+        shift = -(exponent + expmax - 2 - fmt->exponent)
+            + fmt->explicit;
+        ieee_shr(mant, shift);
+        ieee_round(minus, mant, bits);
+        if (mantone_pos & one_mask) {
+            /* One's position is set, we rounded up into normal range */
+            exponent = 1;
+            if (!fmt->explicit)
+                mantone_pos &= ~one_mask;     /* remove explicit one */
+            mant0 |= exponent << (LIMB_BITS-1 - fmt->exponent);
+        } else {
+            if (daz || is_zero(mant)) {
+                /*!
+                 *!float-underflow off floating point underflow
+                 *!  warns about floating point underflow (a nonzero
+                 *!  constant rounded to zero.)
+                 */
+                nasm_warn(WARN_FLOAT_UNDERFLOW|ERR_PASS2,
+                           "underflow in floating-point constant");
+                goto zero;
+            } else {
+                /*!
+                 *!float-denorm off floating point denormal
+                 *!  warns about denormal floating point constants.
+                 */
+                nasm_warn(WARN_FLOAT_DENORM|ERR_PASS2,
+                           "denormal floating-point constant");
+            }
+        }
+        break;
+    }
+
+    case FL_NORMAL:
+        exponent += expmax - 1;
+        ieee_shr(mant, fmt->exponent+fmt->explicit);
+        ieee_round(minus, mant, bits);
+        /* did we scale up by one? */
+        if (test_bit(mant, fmt->exponent+fmt->explicit-1)) {
+            ieee_shr(mant, 1);
+            exponent++;
+            if (exponent >= (expmax << 1)-1) {
+                /*!
+                 *!float-overflow on floating point overflow
+                 *!  warns about floating point underflow.
+                 */
+                nasm_warn(WARN_FLOAT_OVERFLOW|ERR_PASS2,
+                           "overflow in floating-point constant");
+                type = FL_INFINITY;
+                goto overflow;
+            }
+        }
+
+        if (!fmt->explicit)
+            mantone_pos &= ~one_mask; /* remove explicit one */
+        mant0 |= exponent << (LIMB_BITS-1 - fmt->exponent);
+        break;
+
+    case FL_INFINITY:
+    case FL_QNAN:
+    case FL_SNAN:
+    overflow:
+        memset(mant, 0, sizeof mant);
+        mant0 = (((fp_limb)1 << fmt->exponent)-1)
+            << (LIMB_BITS-1 - fmt->exponent);
+        if (fmt->explicit)
+            mantone_pos |= one_mask;
+        if (type == FL_QNAN)
+            set_bit(mant, fmt->exponent+fmt->explicit+1);
+        else if (type == FL_SNAN)
+            set_bit(mant, fmt->exponent+fmt->explicit+fmt->mantissa);
+        break;
+    }
+
+    mant0 |= minus ? LIMB_TOP_BIT : 0;
+
+    for (i = fmt->bytes - 1; i >= 0; i--)
+        *result++ = manti/LIMB_BYTES >> (((LIMB_BYTES-1)-(i%LIMB_BYTES))*8);
+
+    return 1;                   /* success */
+}
+
+/*
+ * Get the default floating point format for this specific field size.
+ * Used for the Dx pseudoops.
+ */
+enum floatize float_deffmt(int bytes)
+{
+    enum floatize type;
+
+    for (type = 0; type < FLOAT_ERR; type++) {
+        if (fp_formatstype.bytes == bytes)
+            break;
+    }
+
+    return type;                /* FLOAT_ERR if invalid */
+}
+
+/* Set floating-point options */
+int float_option(const char *option)
+{
+    if (!nasm_stricmp(option, "daz")) {
+        daz = true;
+        return 0;
+    } else if (!nasm_stricmp(option, "nodaz")) {
+        daz = false;
+        return 0;
+    } else if (!nasm_stricmp(option, "near")) {
+        rc = FLOAT_RC_NEAR;
+        return 0;
+    } else if (!nasm_stricmp(option, "down")) {
+        rc = FLOAT_RC_DOWN;
+        return 0;
+    } else if (!nasm_stricmp(option, "up")) {
+        rc = FLOAT_RC_UP;
+        return 0;
+    } else if (!nasm_stricmp(option, "zero")) {
+        rc = FLOAT_RC_ZERO;
+        return 0;
+    } else if (!nasm_stricmp(option, "default")) {
+        rc = FLOAT_RC_NEAR;
+        daz = false;
+        return 0;
+    } else {
+        return -1;              /* Unknown option */
+    }
+}

_service:tar_scm:nasm-2.16.03.tar.xz/asm/floats.h Added

@@ -0,0 +1,67 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2020 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/* 
+ * floats.h   header file for the floating-point constant module of
+ *	      the Netwide Assembler
+ */
+
+#ifndef NASM_FLOATS_H
+#define NASM_FLOATS_H
+
+#include "nasm.h"
+
+enum float_round {
+    FLOAT_RC_NEAR,
+    FLOAT_RC_ZERO,
+    FLOAT_RC_DOWN,
+    FLOAT_RC_UP
+};
+
+/* Note: enum floatize and FLOAT_ERR are defined in nasm.h */
+
+/* Floating-point format description */
+struct ieee_format {
+    int bytes;                  /* Total bytes */
+    int mantissa;               /* Fractional bits in the mantissa */
+    int explicit;               /* Explicit integer */
+    int exponent;               /* Bits in the exponent */
+    int offset;                 /* Offset into byte array for floatize op */
+};
+extern const struct ieee_format fp_formatsFLOAT_ERR;
+
+int float_const(const char *str, int s, uint8_t *result, enum floatize ffmt);
+enum floatize float_deffmt(int bytes);
+int float_option(const char *option);
+
+#endif /* NASM_FLOATS_H */

_service:tar_scm:nasm-2.16.03.tar.xz/asm/labels.c Added

@@ -0,0 +1,720 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2018 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * labels.c  label handling for the Netwide Assembler
+ */
+
+#include "compiler.h"
+
+
+#include "nasm.h"
+#include "nasmlib.h"
+#include "error.h"
+#include "hashtbl.h"
+#include "labels.h"
+
+/*
+ * A dot-local label is one that begins with exactly one period. Things
+ * that begin with _two_ periods are NASM-specific things.
+ *
+ * If TASM compatibility is enabled, a local label can also begin with
+ * @@.
+ */
+static bool islocal(const char *l)
+{
+    if (tasm_compatible_mode) {
+        if (l0 == '@' && l1 == '@')
+            return true;
+    }
+
+    return (l0 == '.' && l1 != '.');
+}
+
+/*
+ * Return true if this falls into NASM's '..' namespace
+ */
+static bool ismagic(const char *l)
+{
+    return l0 == '.' && l1 == '.' && l2 != '@';
+}
+
+/*
+ * Return true if we should update the local label base
+ * as a result of this symbol.  We must exclude local labels
+ * as well as any kind of special labels, including ..@ ones.
+ */
+static bool set_prevlabel(const char *l)
+{
+    if (tasm_compatible_mode) {
+        if (l0 == '@' && l1 == '@')
+            return false;
+    }
+
+    return l0 != '.';
+}
+
+#define LABEL_BLOCK     128     /* no. of labels/block */
+#define LBLK_SIZE       (LABEL_BLOCK * sizeof(union label))
+
+#define END_LIST        -3      /* don't clash with NO_SEG! */
+#define END_BLOCK       -2
+
+#define PERMTS_SIZE     16384   /* size of text blocks */
+#if (PERMTS_SIZE < IDLEN_MAX)
+ #error "IPERMTS_SIZE must be greater than or equal to IDLEN_MAX"
+#endif
+
+/* string values for enum label_type */
+static const char * const types = {
+    "local", "static", "global", "extern", "required", "common",
+    "special", "output format special"
+};
+
+union label {                   /* actual label structures */
+    struct {
+        int32_t segment;
+        int32_t subsection;     /* Available for ofmt->herelabel() */
+        int64_t offset;
+        int64_t size;
+        int64_t defined;        /* 0 if undefined, passn+1 for when defn seen */
+        int64_t lastref;        /* Last pass where we saw a reference */
+        char *label, *mangled, *special;
+        const char *def_file;   /* Where defined */
+        int32_t def_line;
+        enum label_type type, mangled_type;
+    } defn;
+    struct {
+        int32_t movingon;
+        int64_t dummy;
+        union label *next;
+    } admin;
+};
+
+struct permts {                 /* permanent text storage */
+    struct permts *next;        /* for the linked list */
+    unsigned int size, usage;   /* size and used space in ... */
+    char dataPERMTS_SIZE;     /* ... the data block itself */
+};
+#define PERMTS_HEADER offsetof(struct permts, data)
+
+uint64_t global_offset_changed;		/* counter for global offset changes */
+
+static struct hash_table ltab;          /* labels hash table */
+static union label *ldata;              /* all label data blocks */
+static union label *lfree;              /* labels free block */
+static struct permts *perm_head;        /* start of perm. text storage */
+static struct permts *perm_tail;        /* end of perm. text storage */
+
+static void init_block(union label *blk);
+static char *perm_alloc(size_t len);
+static char *perm_copy(const char *string);
+static char *perm_copy3(const char *s1, const char *s2, const char *s3);
+static const char *mangle_label_name(union label *lptr);
+
+static const char *prevlabel;
+
+static bool initialized = false;
+
+/*
+ * Emit a symdef to the output and the debug format backends.
+ */
+static void out_symdef(union label *lptr)
+{
+    int backend_type;
+    int64_t backend_offset;
+
+    /* Backend-defined special segments are passed to symdef immediately */
+    if (pass_final()) {
+        /* Emit special fixups for globals and commons */
+        switch (lptr->defn.type) {
+        case LBL_GLOBAL:
+        case LBL_REQUIRED:
+        case LBL_COMMON:
+            if (lptr->defn.special)
+                ofmt->symdef(lptr->defn.mangled, 0, 0, 3, lptr->defn.special);
+            break;
+        default:
+            break;
+        }
+        return;
+    }
+
+    if (pass_type() != PASS_STAB && lptr->defn.type != LBL_BACKEND)
+        return;
+
+    /* Clean up this hack... */
+    switch(lptr->defn.type) {
+    case LBL_EXTERN:
+        /* If not seen in the previous or this pass, drop it */
+        if (lptr->defn.lastref < pass_count())
+            return;
+
+        /* Otherwise, promote to LBL_REQUIRED at this time */
+        lptr->defn.type = LBL_REQUIRED;
+
+        /* fall through */
+    case LBL_GLOBAL:
+    case LBL_REQUIRED:
+        backend_type = 1;
+        backend_offset = lptr->defn.offset;
+        break;
+    case LBL_COMMON:
+        backend_type = 2;
+        backend_offset = lptr->defn.size;
+        break;
+    default:
+        backend_type = 0;
+        backend_offset = lptr->defn.offset;
+        break;
+    }
+
+    /* Might be necessary for a backend symbol */
+    mangle_label_name(lptr);
+
+    ofmt->symdef(lptr->defn.mangled, lptr->defn.segment,
+                 backend_offset, backend_type,
+                 lptr->defn.special);
+
+    /*
+     * NASM special symbols are not passed to the debug format; none
+     * of the current backends want to see them.
+     */
+    if (lptr->defn.type == LBL_SPECIAL || lptr->defn.type == LBL_BACKEND)
+        return;
+
+    dfmt->debug_deflabel(lptr->defn.mangled, lptr->defn.segment,
+                         lptr->defn.offset, backend_type,
+                         lptr->defn.special);
+}
+
+/*
+ * Internal routine: finds the `union label' corresponding to the
+ * given label name. Creates a new one, if it isn't found, and if
+ * `create' is true.
+ */
+static union label *find_label(const char *label, bool create, bool *created)
+{
+    union label *lptr, **lpp;
+    char *label_str = NULL;
+    struct hash_insert ip;
+
+    nasm_assert(label != NULL);
+
+    if (islocal(label))
+        label = label_str = nasm_strcat(prevlabel, label);
+
+    lpp = (union label **) hash_find(&ltab, label, &ip);
+    lptr = lpp ? *lpp : NULL;
+
+    if (lptr || !create) {
+        if (created)
+            *created = false;
+        return lptr;
+    }
+
+    /* Create a new label... */
+    if (lfree->admin.movingon == END_BLOCK) {
+        /*
+         * must allocate a new block
+         */
+        lfree->admin.next = nasm_malloc(LBLK_SIZE);
+        lfree = lfree->admin.next;
+        init_block(lfree);
+    }
+
+    if (created)
+        *created = true;
+
+    nasm_zero(*lfree);
+    lfree->defn.label     = perm_copy(label);
+    lfree->defn.subsection = NO_SEG;
+    if (label_str)
+        nasm_free(label_str);
+
+    hash_add(&ip, lfree->defn.label, lfree);
+    return lfree++;
+}
+
+enum label_type lookup_label(const char *label,
+                             int32_t *segment, int64_t *offset)
+{
+    union label *lptr;
+
+    if (!initialized)
+        return LBL_none;
+
+    lptr = find_label(label, false, NULL);
+    if (lptr && lptr->defn.defined) {
+        int64_t lpass = pass_count() + 1;
+
+        lptr->defn.lastref = lpass;
+        *segment = lptr->defn.segment;
+        *offset = lptr->defn.offset;
+        return lptr->defn.type;
+    }
+
+    return LBL_none;
+}
+
+static inline bool is_global(enum label_type type)
+{
+    return type == LBL_GLOBAL || type == LBL_COMMON;
+}
+
+static const char *mangle_strings = {"", "", "", ""};
+static bool mangle_string_setARRAY_SIZE(mangle_strings);
+
+/*
+ * Set a prefix or suffix
+ */
+void set_label_mangle(enum mangle_index which, const char *what)
+{
+    if (mangle_string_setwhich)
+        return;                 /* Once set, do not change */
+
+    mangle_stringswhich = perm_copy(what);
+    mangle_string_setwhich = true;
+}
+
+/*
+ * Format a label name with appropriate prefixes and suffixes
+ */
+static const char *mangle_label_name(union label *lptr)
+{
+    const char *prefix;
+    const char *suffix;
+
+    if (likely(lptr->defn.mangled &&
+               lptr->defn.mangled_type == lptr->defn.type))
+        return lptr->defn.mangled; /* Already mangled */
+
+    switch (lptr->defn.type) {
+    case LBL_GLOBAL:
+    case LBL_STATIC:
+    case LBL_EXTERN:
+    case LBL_REQUIRED:
+        prefix = mangle_stringsLM_GPREFIX;
+        suffix = mangle_stringsLM_GSUFFIX;
+        break;
+    case LBL_BACKEND:
+    case LBL_SPECIAL:
+        prefix = suffix = "";
+        break;
+    default:
+        prefix = mangle_stringsLM_LPREFIX;
+        suffix = mangle_stringsLM_LSUFFIX;
+        break;
+    }
+
+    lptr->defn.mangled_type = lptr->defn.type;
+
+    if (!(*prefix) && !(*suffix))
+        lptr->defn.mangled = lptr->defn.label;
+    else
+        lptr->defn.mangled = perm_copy3(prefix, lptr->defn.label, suffix);
+
+    return lptr->defn.mangled;
+}
+
+static void
+handle_herelabel(union label *lptr, int32_t *segment, int64_t *offset)
+{
+    int32_t oldseg;
+
+    if (likely(!ofmt->herelabel))
+        return;
+
+    if (unlikely(location.segment == NO_SEG))
+        return;
+
+    oldseg = *segment;
+
+    if (oldseg == location.segment && *offset == location.offset) {
+        /* This label is defined at this location */
+        int32_t newseg;
+        bool copyoffset = false;
+
+        nasm_assert(lptr->defn.mangled);
+        newseg = ofmt->herelabel(lptr->defn.mangled, lptr->defn.type,
+                                 oldseg, &lptr->defn.subsection, &copyoffset);
+        if (likely(newseg == oldseg))
+            return;
+
+        *segment = newseg;
+        if (copyoffset) {
+            /* Maintain the offset from the old to the new segment */
+            switch_segment(newseg);
+            location.offset = *offset;
+        } else {
+            /* Keep a separate offset for the new segment */
+            *offset = switch_segment(newseg);
+        }
+    }
+}
+
+static bool declare_label_lptr(union label *lptr,
+                               enum label_type type, const char *special)
+{
+    enum label_type oldtype = lptr->defn.type;
+
+    if (special && !special0)
+        special = NULL;
+
+    if (oldtype == type || (!pass_stable() && oldtype == LBL_LOCAL) ||
+        (oldtype == LBL_EXTERN && type == LBL_REQUIRED)) {
+        lptr->defn.type = type;
+
+        if (special) {
+            if (!lptr->defn.special)
+                lptr->defn.special = perm_copy(special);
+            else if (nasm_stricmp(lptr->defn.special, special))
+                nasm_nonfatal("symbol `%s' has inconsistent attributes `%s' and `%s'",
+                              lptr->defn.label, lptr->defn.special, special);
+        }
+        return true;
+    } else if (is_extern(oldtype) && is_global(type)) {
+        /* EXTERN or REQUIRED can be replaced with GLOBAL or COMMON */
+        lptr->defn.type = type;
+
+        /* Override special unconditionally */
+        if (special)
+            lptr->defn.special = perm_copy(special);
+        return true;
+    } else if (is_extern(type) && (is_global(oldtype) || is_extern(oldtype))) {
+        /*
+         * GLOBAL or COMMON ignore subsequent EXTERN or REQUIRED;
+         * REQUIRED ignores subsequent EXTERN.
+         */
+
+        /* Ignore special unless we don't already have one */
+        if (!lptr->defn.special)
+            lptr->defn.special = perm_copy(special);
+
+        return false; /* Don't call define_label() after this! */
+    }
+
+    nasm_nonfatal("symbol `%s' declared both as %s and %s",
+                  lptr->defn.label, typeslptr->defn.type, typestype);
+    return false;
+}
+
+bool declare_label(const char *label, enum label_type type, const char *special)
+{
+    union label *lptr = find_label(label, true, NULL);
+    return declare_label_lptr(lptr, type, special);
+}
+
+/*
+ * The "normal" argument decides if we should update the local segment
+ * base name or not.
+ */
+void define_label(const char *label, int32_t segment,
+                  int64_t offset, bool normal)
+{
+    union label *lptr;
+    bool created, changed;
+    int64_t size;
+    int64_t lpass, lastdef;
+
+    /*
+     * The backend may invoke this during initialization, at which
+     * pass_count() is zero, so add one so we never have a zero value
+     * for a defined variable.
+     */
+    lpass = pass_count() + 1;
+
+    /*
+     * Phase errors here can be one of two types: a new label appears,
+     * or the offset changes. Increment global_offset_changed when that
+     * happens, to tell the assembler core to make another pass.
+     */
+    lptr = find_label(label, true, &created);
+
+    lastdef = lptr->defn.defined;
+
+    if (segment) {
+        /* We are actually defining this label */
+        if (is_extern(lptr->defn.type)) {
+            /* auto-promote EXTERN/REQUIRED to GLOBAL */
+            lptr->defn.type = LBL_GLOBAL;
+            lastdef = 0; /* We are "re-creating" this label */
+        }
+    } else {
+        /* It's a pseudo-segment (extern, required, common) */
+        segment = lptr->defn.segment ? lptr->defn.segment : seg_alloc();
+    }
+
+    if (lastdef || lptr->defn.type == LBL_BACKEND) {
+        /*
+         * We have seen this on at least one previous pass, or
+         * potentially earlier in this same pass (in which case we
+         * will probably error out further down.)
+         */
+        mangle_label_name(lptr);
+        handle_herelabel(lptr, &segment, &offset);
+    }
+
+    if (ismagic(label) && lptr->defn.type == LBL_LOCAL)
+        lptr->defn.type = LBL_SPECIAL;
+
+    if (set_prevlabel(label) && normal)
+        prevlabel = lptr->defn.label;
+
+    if (lptr->defn.type == LBL_COMMON) {
+        size = offset;
+        offset = 0;
+    } else {
+        size = 0;               /* This is a hack... */
+    }
+
+    changed = created || !lastdef ||
+        lptr->defn.segment != segment ||
+        lptr->defn.offset != offset ||
+        lptr->defn.size != size;
+    global_offset_changed += changed;
+
+    if (lastdef == lpass) {
+        int32_t saved_line = 0;
+        const char *saved_fname = NULL;
+        int noteflags;
+
+        /*
+         * Defined elsewhere in the program, seen in this pass.
+         */
+        if (changed) {
+            nasm_nonfatal("label `%s' inconsistently redefined", lptr->defn.label);
+            noteflags = ERR_NONFATAL|ERR_HERE|ERR_NO_SEVERITY;
+        } else {
+            /*!
+             *!label-redef off label redefined to an identical value
+             *!  warns if a label is defined more than once, but the
+             *!  value is identical. It is an unconditional error to
+             *!  define the same label more than once to \e{different} values.
+             */
+            nasm_warn(WARN_LABEL_REDEF,
+                       "info: label `%s' redefined to an identical value", lptr->defn.label);
+            noteflags = ERR_WARNING|ERR_HERE|ERR_NO_SEVERITY|WARN_LABEL_REDEF;
+        }
+
+        src_get(&saved_line, &saved_fname);
+        src_set(lptr->defn.def_line, lptr->defn.def_file);
+        nasm_error(noteflags, "info: label `%s' originally defined", lptr->defn.label);
+        src_set(saved_line, saved_fname);
+    } else if (changed && pass_final() && lptr->defn.type != LBL_SPECIAL) {
+        /*!
+         *!label-redef-late err label (re)defined during code generation
+         *!  the value of a label changed during the final, code-generation
+         *!  pass. This may be the result of strange use of the
+         *!  preprocessor. This is very likely to produce incorrect code and
+         *!  may end up being an unconditional error in a future
+         *!  version of NASM.
+         *
+         * WARN_LABEL_LATE defaults to an error, as this should never
+         * actually happen.  Just in case this is a backwards
+         * compatibility problem, still make it a warning so that the
+         * user can suppress or demote it.
+         *
+         * Note: As a special case, LBL_SPECIAL symbols are allowed
+         * to be changed even during the last pass.
+         */
+        nasm_warn(WARN_LABEL_REDEF_LATE|ERR_UNDEAD,
+                   "label `%s' %s during code generation",
+                   lptr->defn.label, created ? "defined" : "changed");
+    }
+    lptr->defn.segment = segment;
+    lptr->defn.offset  = offset;
+    lptr->defn.size    = size;
+    lptr->defn.defined = lpass;
+
+    if (changed || lastdef != lpass)
+        src_get(&lptr->defn.def_line, &lptr->defn.def_file);
+
+    if (lastdef != lpass)
+        out_symdef(lptr);
+}
+
+/*
+ * Define a special backend label
+ */
+void backend_label(const char *label, int32_t segment, int64_t offset)
+{
+    if (!declare_label(label, LBL_BACKEND, NULL))
+        return;
+
+    define_label(label, segment, offset, false);
+}
+
+int init_labels(void)
+{
+    ldata = lfree = nasm_malloc(LBLK_SIZE);
+    init_block(lfree);
+
+    perm_head = perm_tail =
+        nasm_malloc(sizeof(struct permts));
+
+    perm_head->next = NULL;
+    perm_head->size = PERMTS_SIZE;
+    perm_head->usage = 0;
+
+    prevlabel = "";
+
+    initialized = true;
+
+    return 0;
+}
+
+void cleanup_labels(void)
+{
+    union label *lptr, *lhold;
+
+    initialized = false;
+
+    hash_free(&ltab);
+
+    lptr = lhold = ldata;
+    while (lptr) {
+        lptr = &lptrLABEL_BLOCK-1;
+        lptr = lptr->admin.next;
+        nasm_free(lhold);
+        lhold = lptr;
+    }
+
+    while (perm_head) {
+        perm_tail = perm_head;
+        perm_head = perm_head->next;
+        nasm_free(perm_tail);
+    }
+}
+
+static void init_block(union label *blk)
+{
+    int j;
+
+    for (j = 0; j < LABEL_BLOCK - 1; j++)
+        blkj.admin.movingon = END_LIST;
+    blkLABEL_BLOCK - 1.admin.movingon = END_BLOCK;
+    blkLABEL_BLOCK - 1.admin.next = NULL;
+}
+
+static char * safe_alloc perm_alloc(size_t len)
+{
+    char *p;
+
+    if (perm_tail->size - perm_tail->usage < len) {
+        size_t alloc_len = (len > PERMTS_SIZE) ? len : PERMTS_SIZE;
+        perm_tail->next = nasm_malloc(PERMTS_HEADER + alloc_len);
+        perm_tail = perm_tail->next;
+        perm_tail->next = NULL;
+        perm_tail->size = alloc_len;
+        perm_tail->usage = 0;
+    }
+    p = perm_tail->data + perm_tail->usage;
+    perm_tail->usage += len;
+    return p;
+}
+
+static char *perm_copy(const char *string)
+{
+    char *p;
+    size_t len;
+
+    if (!string)
+        return NULL;
+
+    len = strlen(string)+1; /* Include final NUL */
+
+    p = perm_alloc(len);
+    memcpy(p, string, len);
+
+    return p;
+}
+
+static char *
+perm_copy3(const char *s1, const char *s2, const char *s3)
+{
+    char *p;
+    size_t l1 = strlen(s1);
+    size_t l2 = strlen(s2);
+    size_t l3 = strlen(s3)+1;   /* Include final NUL */
+
+    p = perm_alloc(l1+l2+l3);
+    memcpy(p, s1, l1);
+    memcpy(p+l1, s2, l2);
+    memcpy(p+l1+l2, s3, l3);
+
+    return p;
+}
+
+const char *local_scope(const char *label)
+{
+   return islocal(label) ? prevlabel : "";
+}
+
+/*
+ * Notes regarding bug involving redefinition of external segments.
+ *
+ * Up to and including v0.97, the following code didn't work. From 0.97
+ * developers release 2 onwards, it will generate an error.
+ *
+ * EXTERN extlabel
+ * newlabel EQU extlabel + 1
+ *
+ * The results of allowing this code through are that two import records
+ * are generated, one for 'extlabel' and one for 'newlabel'.
+ *
+ * The reason for this is an inadequacy in the defined interface between
+ * the label manager and the output formats. The problem lies in how the
+ * output format driver tells that a label is an external label for which
+ * a label import record must be produced. Most (all except bin?) produce
+ * the record if the segment number of the label is not one of the internal
+ * segments that the output driver is producing.
+ *
+ * A simple fix to this would be to make the output formats keep track of
+ * which symbols they've produced import records for, and make them not
+ * produce import records for segments that are already defined.
+ *
+ * The best way, which is slightly harder but reduces duplication of code
+ * and should therefore make the entire system smaller and more stable is
+ * to change the interface between assembler, define_label(), and
+ * the output module. The changes that are needed are:
+ *
+ * The semantics of the 'isextern' flag passed to define_label() need
+ * examining. This information may or may not tell us what we need to
+ * know (ie should we be generating an import record at this point for this
+ * label). If these aren't the semantics, the semantics should be changed
+ * to this.
+ *
+ * The output module interface needs changing, so that the `isextern' flag
+ * is passed to the module, so that it can be easily tested for.
+ */

_service:tar_scm:nasm-2.16.03.tar.xz/asm/listing.c Added

@@ -0,0 +1,415 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2020 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * listing.c    listing file generator for the Netwide Assembler
+ */
+
+#include "compiler.h"
+
+#include "nctype.h"
+
+#include "nasm.h"
+#include "nasmlib.h"
+#include "error.h"
+#include "strlist.h"
+#include "listing.h"
+
+#define LIST_MAX_LEN 1024       /* something sensible */
+#define LIST_INDENT  40
+#define LIST_HEXBIT  18
+
+static const char xdigit = "0123456789ABCDEF";
+
+#define HEX(a,b) (*(a)=xdigit((b)>>4)&15,(a)1=xdigit(b)&15);
+
+uint64_t list_options, active_list_options;
+
+static char listlineLIST_MAX_LEN;
+static bool listlinep;
+
+static struct strlist *list_errors;
+
+static char listdata2 * LIST_INDENT;  /* we need less than that actually */
+static int32_t listoffset;
+
+static int32_t listlineno;
+
+static int suppress;            /* for INCBIN & TIMES special cases */
+
+static int listlevel, listlevel_e;
+
+static FILE *listfp;
+
+static void list_emit(void)
+{
+    int i;
+    const struct strlist_entry *e;
+
+    if (listlinep || *listdata) {
+        fprintf(listfp, "%6"PRId32" ", listlineno);
+
+        if (listdata0)
+            fprintf(listfp, "%08"PRIX32" %-*s", listoffset, LIST_HEXBIT + 1,
+                    listdata);
+        else
+            fprintf(listfp, "%*s", LIST_HEXBIT + 10, "");
+
+        if (listlevel_e)
+            fprintf(listfp, "%s<%d>", (listlevel < 10 ? " " : ""),
+                    listlevel_e);
+        else if (listlinep)
+            fprintf(listfp, "    ");
+
+        if (listlinep)
+            fprintf(listfp, " %s", listline);
+
+        putc('\n', listfp);
+        listlinep = false;
+        listdata0 = '\0';
+    }
+
+    if (list_errors) {
+        static const char fillchars = " --***XX";
+        char fillchar;
+
+        strlist_for_each(e, list_errors) {
+            fprintf(listfp, "%6"PRId32"          ", listlineno);
+            fillchar = fillcharse->pvt.u & ERR_MASK;
+            for (i = 0; i < LIST_HEXBIT; i++)
+                putc(fillchar, listfp);
+
+            if (listlevel_e)
+                fprintf(listfp, " %s<%d>", (listlevel < 10 ? " " : ""),
+                        listlevel_e);
+            else
+                fprintf(listfp, "     ");
+
+            fprintf(listfp, "  %s\n", e->str);
+        }
+
+        strlist_free(&list_errors);
+    }
+}
+
+static void list_cleanup(void)
+{
+    if (!listfp)
+        return;
+
+    list_emit();
+    fclose(listfp);
+    listfp = NULL;
+    active_list_options = 0;
+}
+
+static void list_init(const char *fname)
+{
+    enum file_flags flags = NF_TEXT;
+
+    if (listfp)
+        list_cleanup();
+
+    if (!fname || fname0 == '\0') {
+	listfp = NULL;
+	return;
+    }
+
+    if (list_option('w'))
+        flags |= NF_IOLBF;
+
+    listfp = nasm_open_write(fname, flags);
+    if (!listfp) {
+        nasm_nonfatal("unable to open listing file `%s'", fname);
+        return;
+    }
+
+    active_list_options = list_options | 1;
+
+    *listline = '\0';
+    listlineno = 0;
+    list_errors = NULL;
+    listlevel = 0;
+    suppress = 0;
+}
+
+static void list_out(int64_t offset, char *str)
+{
+    if (strlen(listdata) + strlen(str) > LIST_HEXBIT) {
+        strcat(listdata, "-");
+        list_emit();
+    }
+    if (!listdata0)
+        listoffset = offset;
+    strcat(listdata, str);
+}
+
+static void list_address(int64_t offset, const char *brackets,
+			 int64_t addr, int size)
+{
+    char q20;
+    char *r = q;
+
+    nasm_assert(size <= 8);
+
+    *r++ = brackets0;
+    while (size--) {
+	HEX(r, addr);
+	addr >>= 8;
+	r += 2;
+    }
+    *r++ = brackets1;
+    *r = '\0';
+    list_out(offset, q);
+}
+
+static void list_size(int64_t offset, const char *tag, uint64_t size)
+{
+    char buf64;
+    const char *fmt;
+
+    if (list_option('d'))
+        fmt = "<%s %"PRIu64">";
+    else
+        fmt = "<%s %"PRIX64"h>";
+
+    snprintf(buf, sizeof buf, fmt, tag, size);
+    list_out(offset, buf);
+}
+
+static void list_output(const struct out_data *data)
+{
+    char q24;
+    uint64_t size = data->size;
+    uint64_t offset = data->offset;
+    const uint8_t *p = data->data;
+
+
+    if (!listfp || suppress || user_nolist)
+        return;
+
+    switch (data->type) {
+    case OUT_ZERODATA:
+        if (size > 16) {
+            list_size(offset, "zero", size);
+            break;
+        } else {
+            p = zero_buffer;
+        }
+        /* fall through */
+    case OUT_RAWDATA:
+    {
+	if (size == 0) {
+            if (!listdata0)
+                listoffset = data->offset;
+        } else if (p) {
+            while (size--) {
+                HEX(q, *p);
+                q2 = '\0';
+                list_out(offset++, q);
+                p++;
+            }
+        } else {
+            /* Used for listing on non-code generation passes with -Lp */
+            list_size(offset, "len", size);
+        }
+	break;
+    }
+    case OUT_ADDRESS:
+        list_address(offset, "", data->toffset, size);
+	break;
+    case OUT_SEGMENT:
+        q0 = '';
+        memset(q+1, 's', size << 1);
+        q(size << 1)+1 = '';
+        q(size << 1)+2 = '\0';
+        list_out(offset, q);
+        offset += size;
+        break;
+    case OUT_RELADDR:
+	list_address(offset, "()", data->toffset, size);
+	break;
+    case OUT_RESERVE:
+    {
+        if (size > 8) {
+            list_size(offset, "res", size);
+        } else {
+            memset(q, '?', size << 1);
+            qsize << 1 = '\0';
+            list_out(offset, q);
+        }
+	break;
+    }
+    default:
+        panic();
+    }
+}
+
+static void list_line(int type, int32_t lineno, const char *line)
+{
+    (void)type;
+
+    if (!listfp)
+        return;
+
+    if (user_nolist)
+      return;
+
+    list_emit();
+    if (lineno >= 0)
+        listlineno = lineno;
+    listlinep = true;
+    strlcpy(listline, line, LIST_MAX_LEN-3);
+    memcpy(listline + LIST_MAX_LEN-4, "...", 4);
+    listlevel_e = listlevel;
+}
+
+static void list_uplevel(int type, int64_t size)
+{
+    if (!listfp)
+        return;
+
+    switch (type) {
+    case LIST_INCBIN:
+        suppress |= 1;
+        list_size(listoffset, "bin", size);
+        break;
+
+    case LIST_TIMES:
+        suppress |= 2;
+        list_size(listoffset, "rep", size);
+        break;
+
+    case LIST_INCLUDE:
+        listlevel++;
+        break;
+
+    default:
+        listlevel++;
+        break;
+    }
+}
+
+static void list_downlevel(int type)
+{
+    if (!listfp)
+        return;
+
+    switch (type) {
+    case LIST_INCBIN:
+        suppress &= ~1;
+        break;
+
+    case LIST_TIMES:
+        suppress &= ~2;
+        break;
+
+    default:
+        listlevel--;
+        break;
+    }
+}
+
+static void printf_func(2, 3) list_error(errflags severity, const char *fmt, ...)
+{
+    va_list ap;
+
+    if (!listfp)
+	return;
+
+    if (!list_errors)
+        list_errors = strlist_alloc(false);
+
+    va_start(ap, fmt);
+    strlist_vprintf(list_errors, fmt, ap);
+    va_end(ap);
+    strlist_tail(list_errors)->pvt.u = severity;
+
+    if ((severity & ERR_MASK) >= ERR_FATAL)
+	list_emit();
+}
+
+static void list_set_offset(uint64_t offset)
+{
+    listoffset = offset;
+}
+
+static void list_update_options(const char *str)
+{
+    bool state = true;
+    unsigned char c;
+    uint64_t mask;
+
+    while ((c = *str++)) {
+        switch (c) {
+        case '+':
+            state = true;
+            break;
+        case '-':
+            state = false;
+            break;
+        default:
+            mask = list_option_mask(c);
+            if (state)
+                list_options |= mask;
+            else
+                list_options &= ~mask;
+            break;
+        }
+    }
+}
+
+enum directive_result list_pragma(const struct pragma *pragma)
+{
+    switch (pragma->opcode) {
+    case D_OPTIONS:
+        list_update_options(pragma->tail);
+        return DIRR_OK;
+
+    default:
+        return DIRR_UNKNOWN;
+    }
+}
+
+static const struct lfmt nasm_list = {
+    list_init,
+    list_cleanup,
+    list_output,
+    list_line,
+    list_uplevel,
+    list_downlevel,
+    list_error,
+    list_set_offset
+};
+
+const struct lfmt *lfmt = &nasm_list;

_service:tar_scm:nasm-2.16.03.tar.xz/asm/listing.h Added

@@ -0,0 +1,196 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2020 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * listing.h   header file for listing.c
+ */
+
+#ifndef NASM_LISTING_H
+#define NASM_LISTING_H
+
+#include "nasm.h"
+
+/*
+ * List-file generators should look like this:
+ */
+struct lfmt {
+    /*
+     * Called to initialize the listing file generator. Before this
+     * is called, the other routines will silently do nothing when
+     * called. The `char *' parameter is the file name to write the
+     * listing to.
+     */
+    void (*init)(const char *fname);
+
+    /*
+     * Called to clear stuff up and close the listing file.
+     */
+    void (*cleanup)(void);
+
+    /*
+     * Called to output binary data. Parameters are: the offset;
+     * the data; the data type. Data types are similar to the
+     * output-format interface, only OUT_ADDRESS will _always_ be
+     * displayed as if it's relocatable, so ensure that any non-
+     * relocatable address has been converted to OUT_RAWDATA by
+     * then.
+     */
+    void (*output)(const struct out_data *data);
+
+    /*
+     * Called to send a text line to the listing generator. The
+     * `int' parameter is LIST_READ or LIST_MACRO depending on
+     * whether the line came directly from an input file or is the
+     * result of a multi-line macro expansion.
+     *
+     * If a line number is provided, print it; if the line number is
+     * -1 then use the same line number as the previous call.
+     */
+    void (*line)(int type, int32_t lineno, const char *line);
+
+    /*
+     * Called to change one of the various levelled mechanisms in the
+     * listing generator. LIST_INCLUDE and LIST_MACRO can be used to
+     * increase the nesting level of include files and macro
+     * expansions; LIST_TIMES and LIST_INCBIN switch on the two
+     * binary-output-suppression mechanisms for large-scale
+     * pseudo-instructions; the size argument prints the size or
+     * repetiiton count.
+     *
+     * LIST_MACRO_NOLIST is synonymous with LIST_MACRO except that
+     * it indicates the beginning of the expansion of a `nolist'
+     * macro, so anything under that level won't be expanded unless
+     * it includes another file.
+     */
+    void (*uplevel)(int type, int64_t size);
+
+    /*
+     * Reverse the effects of uplevel.
+     */
+    void (*downlevel)(int type);
+
+    /*
+     * Called on a warning or error, with the error message.
+     */
+    void printf_func_ptr(2, 3) (*error)(errflags severity, const char *fmt, ...);
+
+    /*
+     * Update the current offset.  Used to give the listing generator
+     * an offset to work with when doing things like
+     * uplevel(LIST_TIMES) or uplevel(LIST_INCBIN); see
+     * list_set_offset();
+     */
+    void (*set_offset)(uint64_t offset);
+};
+
+extern const struct lfmt *lfmt;
+extern bool user_nolist;
+
+/*
+ * list_options are the requested options; active_list_options gets
+ * set when a pass starts.
+ *
+ * These are simple bitmasks of ASCII-64 mapping directly to option
+ * letters.
+ */
+extern uint64_t list_options, active_list_options;
+
+/*
+ * This maps the characters a-z, A-Z and 0-9 onto a 64-bit bitmask.
+ * Bit 0 is used to indicate that the listing engine is active, and
+ * bit 1 is reserved, so this will only return mask bits 2 and higher;
+ * as there are 62 possible characters this fits nicely.
+ *
+ * The mask returned is 0 for invalid characters, accessing no bits at
+ * all.
+ *
+ * This isn't particularly efficient code, but just about every
+ * instance of it should be fed a constant, so the entire function can
+ * be precomputed at compile time. The only cases where the full
+ * computation is needed is when parsing the -L option or %pragma list
+ * options, neither of which is in any way performance critical.
+ *
+ * The character + represents ALL listing options except -Lw (flush
+ * after every line.)
+ */
+static inline const_func uint64_t list_option_mask_val(unsigned char x)
+{
+    if (x >= 'a') {
+        if (x > 'z')
+            return 0;
+        x = x - 'a' + 2;
+    } else if (x >= 'A') {
+        if (x > 'Z')
+            return 0;
+        x = x - 'A' + 2 + 26;
+    } else if (x >= '0') {
+        if (x > '9')
+            return 0;
+        x = x - '0' + 2 + 26*2;
+    } else {
+        return 0;
+    }
+
+    return UINT64_C(1) << x;
+}
+
+static inline const_func uint64_t list_option_mask(unsigned char x)
+{
+    if (x == '+')
+        return ~(list_option_mask_val('w') | 3);
+    else
+        return list_option_mask_val(x);
+}
+
+/* Return true if the listing engine is active and a certain option is set. */
+static inline pure_func bool list_option(unsigned char x)
+{
+    return unlikely(active_list_options & list_option_mask(x));
+}
+
+/* We can't test this using active_list_options for obvious reasons... */
+static inline pure_func bool list_on_every_pass(void)
+{
+    return unlikely(list_options & list_option_mask('p'));
+}
+
+/* Is the listing engine active? */
+static inline pure_func bool list_active(void)
+{
+    return (active_list_options & 1);
+}
+
+/* Pragma handler */
+enum directive_result list_pragma(const struct pragma *);
+
+#endif

_service:tar_scm:nasm-2.16.03.tar.xz/asm/nasm.c Added

@@ -0,0 +1,2352 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2022 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * The Netwide Assembler main program module
+ */
+
+#include "compiler.h"
+
+
+#include "nasm.h"
+#include "nasmlib.h"
+#include "nctype.h"
+#include "error.h"
+#include "saa.h"
+#include "raa.h"
+#include "floats.h"
+#include "stdscan.h"
+#include "insns.h"
+#include "preproc.h"
+#include "parser.h"
+#include "eval.h"
+#include "assemble.h"
+#include "labels.h"
+#include "outform.h"
+#include "listing.h"
+#include "iflag.h"
+#include "quote.h"
+#include "ver.h"
+
+/*
+ * This is the maximum number of optimization passes to do.  If we ever
+ * find a case where the optimizer doesn't naturally converge, we might
+ * have to drop this value so the assembler doesn't appear to just hang.
+ */
+#define MAX_OPTIMIZE (INT_MAX >> 1)
+
+struct forwrefinfo {            /* info held on forward refs. */
+    int lineno;
+    int operand;
+};
+
+const char *_progname;
+
+static void parse_cmdline(int, char **, int);
+static void assemble_file(const char *, struct strlist *);
+static bool skip_this_pass(errflags severity);
+static void usage(void);
+static void help(FILE *);
+
+struct error_format {
+    const char *beforeline;     /* Before line number, if present */
+    const char *afterline;      /* After line number, if present */
+    const char *beforemsg;      /* Before actual message */
+};
+
+static const struct error_format errfmt_gnu  = { ":", "",  ": "  };
+static const struct error_format errfmt_msvc = { "(", ")", " : " };
+static const struct error_format *errfmt = &errfmt_gnu;
+static struct strlist *warn_list;
+static struct nasm_errhold *errhold_stack;
+
+unsigned int debug_nasm;        /* Debugging messages? */
+
+static bool using_debug_info, opt_verbose_info;
+static const char *debug_format;
+
+#ifndef ABORT_ON_PANIC
+# define ABORT_ON_PANIC 0
+#endif
+static bool abort_on_panic = ABORT_ON_PANIC;
+static bool keep_all;
+
+bool tasm_compatible_mode = false;
+enum pass_type _pass_type;
+const char * const _pass_types =
+{
+    "init", "preproc-only", "first", "optimize", "stabilize", "final"
+};
+int64_t _passn;
+int globalrel = 0;
+int globalbnd = 0;
+
+struct compile_time official_compile_time;
+
+const char *inname;
+const char *outname;
+static const char *listname;
+static const char *errname;
+
+static int64_t globallineno;    /* for forward-reference tracking */
+
+const struct ofmt *ofmt = &OF_DEFAULT;
+const struct ofmt_alias *ofmt_alias = NULL;
+const struct dfmt *dfmt;
+
+FILE *error_file;               /* Where to write error messages */
+
+FILE *ofile = NULL;
+struct optimization optimizing =
+    { MAX_OPTIMIZE, OPTIM_ALL_ENABLED }; /* number of optimization passes to take */
+static int cmd_sb = 16;    /* by default */
+
+iflag_t cpu, cmd_cpu;
+
+struct location location;
+bool in_absolute;                 /* Flag we are in ABSOLUTE seg */
+struct location absolute;         /* Segment/offset inside ABSOLUTE */
+
+static struct RAA *offsets;
+
+static struct SAA *forwrefs;    /* keep track of forward references */
+static const struct forwrefinfo *forwref;
+
+static struct strlist *include_path;
+static enum preproc_opt ppopt;
+
+#define OP_NORMAL           (1U << 0)
+#define OP_PREPROCESS       (1U << 1)
+#define OP_DEPEND           (1U << 2)
+
+static unsigned int operating_mode;
+
+/* Dependency flags */
+static bool depend_emit_phony = false;
+static bool depend_missing_ok = false;
+static const char *depend_target = NULL;
+static const char *depend_file = NULL;
+struct strlist *depend_list;
+
+static bool want_usage;
+static bool terminate_after_phase;
+bool user_nolist = false;
+
+static char *quote_for_pmake(const char *str);
+static char *quote_for_wmake(const char *str);
+static char *(*quote_for_make)(const char *) = quote_for_pmake;
+
+/*
+ * Execution limits that can be set via a command-line option or %pragma
+ */
+
+/*
+ * This is really unlimited; it would take far longer than the
+ * current age of the universe for this limit to be reached even on
+ * much faster CPUs than currently exist.
+*/
+#define LIMIT_MAX_VAL	(INT64_MAX >> 1)
+
+int64_t nasm_limitLIMIT_MAX+1;
+
+struct limit_info {
+    const char *name;
+    const char *help;
+    int64_t default_val;
+};
+/* The order here must match enum nasm_limit in nasm.h */
+static const struct limit_info limit_infoLIMIT_MAX+1 = {
+    { "passes", "total number of passes", LIMIT_MAX_VAL },
+    { "stalled-passes", "number of passes without forward progress", 1000 },
+    { "macro-levels", "levels of macro expansion", 10000 },
+    { "macro-tokens", "tokens processed during single-lime macro expansion", 10000000 },
+    { "mmacros", "multi-line macros before final return", 100000 },
+    { "rep", "%rep count", 1000000 },
+    { "eval", "expression evaluation descent", 8192 },
+    { "lines", "total source lines processed", 2000000000 }
+};
+
+static void set_default_limits(void)
+{
+    int i;
+    size_t rl;
+    int64_t new_limit;
+
+    for (i = 0; i <= LIMIT_MAX; i++)
+        nasm_limiti = limit_infoi.default_val;
+
+    /*
+     * Try to set a sensible default value for the eval depth based
+     * on the limit of the stack size, if knowable...
+     */
+    rl = nasm_get_stack_size_limit();
+    new_limit = rl / (128 * sizeof(void *)); /* Sensible heuristic */
+    if (new_limit < nasm_limitLIMIT_EVAL)
+        nasm_limitLIMIT_EVAL = new_limit;
+}
+
+enum directive_result
+nasm_set_limit(const char *limit, const char *valstr)
+{
+    int i;
+    int64_t val;
+    bool rn_error;
+    int errlevel;
+
+    if (!limit)
+        limit = "";
+    if (!valstr)
+        valstr = "";
+
+    for (i = 0; i <= LIMIT_MAX; i++) {
+        if (!nasm_stricmp(limit, limit_infoi.name))
+            break;
+    }
+    if (i > LIMIT_MAX) {
+        if (not_started())
+            errlevel = ERR_WARNING|WARN_OTHER|ERR_USAGE;
+        else
+            errlevel = ERR_WARNING|WARN_PRAGMA_UNKNOWN;
+        nasm_error(errlevel, "unknown limit: `%s'", limit);
+        return DIRR_ERROR;
+    }
+
+    if (!nasm_stricmp(valstr, "unlimited")) {
+        val = LIMIT_MAX_VAL;
+    } else {
+        val = readnum(valstr, &rn_error);
+        if (rn_error || val < 0) {
+            if (not_started())
+                errlevel = ERR_WARNING|WARN_OTHER|ERR_USAGE;
+            else
+                errlevel = ERR_WARNING|WARN_PRAGMA_BAD;
+            nasm_error(errlevel, "invalid limit value: `%s'", valstr);
+            return DIRR_ERROR;
+        }
+        if (val > LIMIT_MAX_VAL)
+            val = LIMIT_MAX_VAL;
+    }
+
+    nasm_limiti = val;
+    return DIRR_OK;
+}
+
+int64_t switch_segment(int32_t segment)
+{
+    location.segment = segment;
+    if (segment == NO_SEG) {
+        location.offset = absolute.offset;
+        in_absolute = true;
+    } else {
+        location.offset = raa_read(offsets, segment);
+        in_absolute = false;
+    }
+    return location.offset;
+}
+
+static void set_curr_offs(int64_t l_off)
+{
+        if (in_absolute)
+            absolute.offset = l_off;
+        else
+            offsets = raa_write(offsets, location.segment, l_off);
+}
+
+static void increment_offset(int64_t delta)
+{
+    if (unlikely(delta == 0))
+        return;
+
+    location.offset += delta;
+    set_curr_offs(location.offset);
+}
+
+/*
+ * Define system-defined macros that are not part of
+ * macros/standard.mac.
+ */
+static void define_macros(void)
+{
+    const struct compile_time * const oct = &official_compile_time;
+    char temp128;
+
+    if (oct->have_local) {
+        strftime(temp, sizeof temp, "__?DATE?__=\"%Y-%m-%d\"", &oct->local);
+        pp_pre_define(temp);
+        strftime(temp, sizeof temp, "__?DATE_NUM?__=%Y%m%d", &oct->local);
+        pp_pre_define(temp);
+        strftime(temp, sizeof temp, "__?TIME?__=\"%H:%M:%S\"", &oct->local);
+        pp_pre_define(temp);
+        strftime(temp, sizeof temp, "__?TIME_NUM?__=%H%M%S", &oct->local);
+        pp_pre_define(temp);
+    }
+
+    if (oct->have_gm) {
+        strftime(temp, sizeof temp, "__?UTC_DATE?__=\"%Y-%m-%d\"", &oct->gm);
+        pp_pre_define(temp);
+        strftime(temp, sizeof temp, "__?UTC_DATE_NUM?__=%Y%m%d", &oct->gm);
+        pp_pre_define(temp);
+        strftime(temp, sizeof temp, "__?UTC_TIME?__=\"%H:%M:%S\"", &oct->gm);
+        pp_pre_define(temp);
+        strftime(temp, sizeof temp, "__?UTC_TIME_NUM?__=%H%M%S", &oct->gm);
+        pp_pre_define(temp);
+    }
+
+    if (oct->have_posix) {
+        snprintf(temp, sizeof temp, "__?POSIX_TIME?__=%"PRId64, oct->posix);
+        pp_pre_define(temp);
+    }
+
+    /*
+     * In case if output format is defined by alias
+     * we have to put shortname of the alias itself here
+     * otherwise ABI backward compatibility gets broken.
+     */
+    snprintf(temp, sizeof(temp), "__?OUTPUT_FORMAT?__=%s",
+             ofmt_alias ? ofmt_alias->shortname : ofmt->shortname);
+    pp_pre_define(temp);
+
+    /*
+     * Output-format specific macros.
+     */
+    if (ofmt->stdmac)
+        pp_extra_stdmac(ofmt->stdmac);
+
+    /*
+     * Debug format, if any
+     */
+    if (dfmt != &null_debug_form) {
+        snprintf(temp, sizeof(temp), "__?DEBUG_FORMAT?__=%s", dfmt->shortname);
+        pp_pre_define(temp);
+    }
+}
+
+/*
+ * Initialize the preprocessor, set up the include path, and define
+ * the system-included macros.  This is called between passes 1 and 2
+ * of parsing the command options; ofmt and dfmt are defined at this
+ * point.
+ *
+ * Command-line specified preprocessor directives (-p, -d, -u,
+ * --pragma, --before) are processed after this function.
+ */
+static void preproc_init(struct strlist *ipath)
+{
+    pp_init(ppopt);
+    define_macros();
+    pp_include_path(ipath);
+}
+
+static void emit_dependencies(struct strlist *list)
+{
+    FILE *deps;
+    int linepos, len;
+    bool wmake = (quote_for_make == quote_for_wmake);
+    const char *wrapstr, *nulltarget;
+    const struct strlist_entry *l;
+
+    if (!list)
+        return;
+
+    wrapstr = wmake ? " &\n " : " \\\n ";
+    nulltarget = wmake ? "\t%null\n" : "";
+
+    if (depend_file && strcmp(depend_file, "-")) {
+        deps = nasm_open_write(depend_file, NF_TEXT);
+        if (!deps) {
+            nasm_nonfatal("unable to write dependency file `%s'", depend_file);
+            return;
+        }
+    } else {
+        deps = stdout;
+    }
+
+    linepos = fprintf(deps, "%s :", depend_target);
+    strlist_for_each(l, list) {
+        char *file = quote_for_make(l->str);
+        len = strlen(file);
+        if (linepos + len > 62 && linepos > 1) {
+            fputs(wrapstr, deps);
+            linepos = 1;
+        }
+        fprintf(deps, " %s", file);
+        linepos += len+1;
+        nasm_free(file);
+    }
+    fputs("\n\n", deps);
+
+    strlist_for_each(l, list) {
+        if (depend_emit_phony) {
+            char *file = quote_for_make(l->str);
+            fprintf(deps, "%s :\n%s\n", file, nulltarget);
+            nasm_free(file);
+        }
+    }
+
+    strlist_free(&list);
+
+    if (deps != stdout)
+        fclose(deps);
+}
+
+/* Convert a struct tm to a POSIX-style time constant */
+static int64_t make_posix_time(const struct tm *tm)
+{
+    int64_t t;
+    int64_t y = tm->tm_year;
+
+    /* See IEEE 1003.1:2004, section 4.14 */
+
+    t = (y-70)*365 + (y-69)/4 - (y-1)/100 + (y+299)/400;
+    t += tm->tm_yday;
+    t *= 24;
+    t += tm->tm_hour;
+    t *= 60;
+    t += tm->tm_min;
+    t *= 60;
+    t += tm->tm_sec;
+
+    return t;
+}
+
+/*
+ * Quote a filename string if and only if it is necessary.
+ * It is considered necessary if any one of these is true:
+ * 1. The filename contains control characters;
+ * 2. The filename starts or ends with a space or quote mark;
+ * 3. The filename contains more than one space in a row;
+ * 4. The filename is empty.
+ *
+ * The filename is returned in a newly allocated buffer.
+ */
+static char *nasm_quote_filename(const char *fn)
+{
+    const unsigned char *p =
+        (const unsigned char *)fn;
+    size_t len;
+
+    if (!p || !*p)
+        return nasm_strdup("\"\"");
+
+    if (*p <= ' ' || nasm_isquote(*p)) {
+        goto quote;
+    } else {
+        unsigned char cutoff = ' ';
+
+        while (*p) {
+            if (*p < cutoff)
+                goto quote;
+            cutoff = ' ' + (*p == ' ');
+            p++;
+        }
+        if (p-1 <= ' ' || nasm_isquote(p-1))
+            goto quote;
+    }
+
+    /* Quoting not necessary */
+    return nasm_strdup(fn);
+
+quote:
+    len = strlen(fn);
+    return nasm_quote(fn, &len);
+}
+
+static void timestamp(void)
+{
+    struct compile_time * const oct = &official_compile_time;
+    const struct tm *tp, *best_gm;
+
+    time(&oct->t);
+
+    best_gm = NULL;
+
+    tp = localtime(&oct->t);
+    if (tp) {
+        oct->local = *tp;
+        best_gm = &oct->local;
+        oct->have_local = true;
+    }
+
+    tp = gmtime(&oct->t);
+    if (tp) {
+        oct->gm = *tp;
+        best_gm = &oct->gm;
+        oct->have_gm = true;
+        if (!oct->have_local)
+            oct->local = oct->gm;
+    } else {
+        oct->gm = oct->local;
+    }
+
+    if (best_gm) {
+        oct->posix = make_posix_time(best_gm);
+        oct->have_posix = true;
+    }
+}
+
+int main(int argc, char **argv)
+{
+    /* Do these as early as possible */
+    error_file = stderr;
+    _progname = argv0;
+    if (!_progname || !_progname0)
+        _progname = "nasm";
+
+    timestamp();
+
+    set_cpu(NULL);
+    cmd_cpu = cpu;
+
+    set_default_limits();
+
+    include_path = strlist_alloc(true);
+
+    _pass_type = PASS_INIT;
+    _passn = 0;
+
+    want_usage = terminate_after_phase = false;
+
+    nasm_ctype_init();
+    src_init();
+
+    /*
+     * We must call init_labels() before the command line parsing,
+     * because we may be setting prefixes/suffixes from the command
+     * line.
+     */
+    init_labels();
+
+    offsets = raa_init();
+    forwrefs = saa_init((int32_t)sizeof(struct forwrefinfo));
+
+    operating_mode = OP_NORMAL;
+
+    parse_cmdline(argc, argv, 1);
+    if (terminate_after_phase) {
+        if (want_usage)
+            usage();
+        return 1;
+    }
+
+    /* At this point we have ofmt and the name of the desired debug format */
+    if (!using_debug_info) {
+        /* No debug info, redirect to the null backend (empty stubs) */
+        dfmt = &null_debug_form;
+    } else if (!debug_format) {
+        /* Default debug format for this backend */
+        dfmt = ofmt->default_dfmt;
+    } else {
+        dfmt = dfmt_find(ofmt, debug_format);
+        if (!dfmt) {
+            nasm_fatalf(ERR_USAGE, "unrecognized debug format `%s' for output format `%s'",
+                       debug_format, ofmt->shortname);
+        }
+    }
+
+    /* Have we enabled TASM mode? */
+    if (tasm_compatible_mode) {
+        ppopt |= PP_TASM;
+        nasm_ctype_tasm_mode();
+    }
+    preproc_init(include_path);
+
+    parse_cmdline(argc, argv, 2);
+    if (terminate_after_phase) {
+        if (want_usage)
+            usage();
+        return 1;
+    }
+
+    /* Save away the default state of warnings */
+    init_warnings();
+
+    /* Dependency filename if we are also doing other things */
+    if (!depend_file && (operating_mode & ~OP_DEPEND)) {
+        if (outname)
+            depend_file = nasm_strcat(outname, ".d");
+        else
+            depend_file = filename_set_extension(inname, ".d");
+    }
+
+    /*
+     * If no output file name provided and this
+     * is preprocess mode, we're perfectly
+     * fine to output into stdout.
+     */
+    if (!outname && !(operating_mode & OP_PREPROCESS)) {
+        outname = filename_set_extension(inname, ofmt->extension);
+        if (!strcmp(outname, inname)) {
+            outname = "nasm.out";
+            nasm_warn(WARN_OTHER, "default output file same as input, using `%s' for output\n", outname);
+        }
+    }
+
+    depend_list = (operating_mode & OP_DEPEND) ? strlist_alloc(true) : NULL;
+
+    if (!depend_target)
+        depend_target = quote_for_make(outname);
+
+    if (!(operating_mode & (OP_PREPROCESS|OP_NORMAL))) {
+            char *line;
+
+            if (depend_missing_ok)
+                pp_include_path(NULL);    /* "assume generated" */
+
+            pp_reset(inname, PP_DEPS, depend_list);
+            ofile = NULL;
+            while ((line = pp_getline()))
+                nasm_free(line);
+            pp_cleanup_pass();
+            reset_warnings();
+    } else if (operating_mode & OP_PREPROCESS) {
+            char *line;
+            const char *file_name = NULL;
+            char *quoted_file_name = nasm_quote_filename(file_name);
+            int32_t linnum  = 0;
+            int32_t lineinc = 0;
+            FILE *out;
+
+            if (outname) {
+                ofile = nasm_open_write(outname, NF_TEXT);
+                if (!ofile)
+                    nasm_fatal("unable to open output file `%s'", outname);
+                out = ofile;
+            } else {
+                ofile = NULL;
+                out = stdout;
+            }
+
+            location.known = false;
+
+            _pass_type = PASS_PREPROC;
+            pp_reset(inname, PP_PREPROC, depend_list);
+
+            while ((line = pp_getline())) {
+                /*
+                 * We generate %line directives if needed for later programs
+                 */
+                struct src_location where = src_where();
+                if (file_name != where.filename) {
+                    file_name = where.filename;
+                    linnum = -1; /* Force a new %line statement */
+                    lineinc = file_name ? 1 : 0;
+                    nasm_free(quoted_file_name);
+                    quoted_file_name = nasm_quote_filename(file_name);
+                } else if (lineinc) {
+                    if (linnum + lineinc == where.lineno) {
+                        /* Add one blank line to account for increment */
+                        fputc('\n', out);
+                        linnum += lineinc;
+                    } else if (linnum - lineinc == where.lineno) {
+                        /*
+                         * Standing still, probably a macro. Set increment
+                         * to zero.
+                         */
+                        lineinc = 0;
+                    }
+                } else {
+                    /* lineinc == 0 */
+                    if (linnum + 1 == where.lineno)
+                        lineinc = 1;
+                }
+
+                /* Skip blank lines if we will need a %line anyway */
+                if (linnum == -1 && !line0)
+                    continue;
+
+                if (linnum != where.lineno) {
+                    fprintf(out, "%%line %"PRId32"%+"PRId32" %s\n",
+                            where.lineno, lineinc, quoted_file_name);
+                }
+                linnum = where.lineno + lineinc;
+
+                fputs(line, out);
+                fputc('\n', out);
+            }
+
+            nasm_free(quoted_file_name);
+
+            pp_cleanup_pass();
+            reset_warnings();
+            if (ofile)
+                fclose(ofile);
+            if (ofile && terminate_after_phase && !keep_all)
+                remove(outname);
+            ofile = NULL;
+    }
+
+    if (operating_mode & OP_NORMAL) {
+        ofile = nasm_open_write(outname, (ofmt->flags & OFMT_TEXT) ? NF_TEXT : NF_BINARY);
+        if (!ofile)
+            nasm_fatal("unable to open output file `%s'", outname);
+
+        ofmt->init();
+        dfmt->init();
+
+        assemble_file(inname, depend_list);
+
+        if (!terminate_after_phase) {
+            ofmt->cleanup();
+            cleanup_labels();
+            fflush(ofile);
+            if (ferror(ofile))
+                nasm_nonfatal("write error on output file `%s'", outname);
+        }
+
+        if (ofile) {
+            fclose(ofile);
+            if (terminate_after_phase && !keep_all)
+                remove(outname);
+            ofile = NULL;
+        }
+    }
+
+    pp_cleanup_session();
+
+    if (depend_list && !terminate_after_phase)
+        emit_dependencies(depend_list);
+
+    if (want_usage)
+        usage();
+
+    raa_free(offsets);
+    saa_free(forwrefs);
+    eval_cleanup();
+    stdscan_cleanup();
+    src_free();
+    strlist_free(&include_path);
+
+    return terminate_after_phase;
+}
+
+/*
+ * Get a parameter for a command line option.
+ * First arg must be in the form of e.g. -f...
+ */
+static char *get_param(char *p, char *q, bool *advance)
+{
+    *advance = false;
+    if (p2) /* the parameter's in the option */
+        return nasm_skip_spaces(p + 2);
+    if (q && q0) {
+        *advance = true;
+        return q;
+    }
+    nasm_nonfatalf(ERR_USAGE, "option `-%c' requires an argument", p1);
+    return NULL;
+}
+
+/*
+ * Copy a filename
+ */
+static void copy_filename(const char **dst, const char *src, const char *what)
+{
+    if (*dst)
+        nasm_fatal("more than one %s file specified: %s\n", what, src);
+
+    *dst = nasm_strdup(src);
+}
+
+/*
+ * Convert a string to a POSIX make-safe form
+ */
+static char *quote_for_pmake(const char *str)
+{
+    const char *p;
+    char *os, *q;
+
+    size_t n = 1; /* Terminating zero */
+    size_t nbs = 0;
+
+    if (!str)
+        return NULL;
+
+    for (p = str; *p; p++) {
+        switch (*p) {
+        case ' ':
+        case '\t':
+            /* Convert N backslashes + ws -> 2N+1 backslashes + ws */
+            n += nbs + 2;
+            nbs = 0;
+            break;
+        case '$':
+        case '#':
+            nbs = 0;
+            n += 2;
+            break;
+        case '\\':
+            nbs++;
+            n++;
+            break;
+        default:
+            nbs = 0;
+            n++;
+            break;
+        }
+    }
+
+    /* Convert N backslashes at the end of filename to 2N backslashes */
+    n += nbs;
+
+    os = q = nasm_malloc(n);
+
+    nbs = 0;
+    for (p = str; *p; p++) {
+        switch (*p) {
+        case ' ':
+        case '\t':
+            q = mempset(q, '\\', nbs);
+            *q++ = '\\';
+            *q++ = *p;
+            nbs = 0;
+            break;
+        case '$':
+            *q++ = *p;
+            *q++ = *p;
+            nbs = 0;
+            break;
+        case '#':
+            *q++ = '\\';
+            *q++ = *p;
+            nbs = 0;
+            break;
+        case '\\':
+            *q++ = *p;
+            nbs++;
+            break;
+        default:
+            *q++ = *p;
+            nbs = 0;
+            break;
+        }
+    }
+
+    q = mempset(q, '\\', nbs);
+    *q = '\0';
+
+    return os;
+}
+
+/*
+ * Convert a string to a Watcom make-safe form
+ */
+static char *quote_for_wmake(const char *str)
+{
+    const char *p;
+    char *os, *q;
+    bool quote = false;
+
+    size_t n = 1; /* Terminating zero */
+
+    if (!str)
+        return NULL;
+
+    for (p = str; *p; p++) {
+        switch (*p) {
+        case ' ':
+        case '\t':
+        case '&':
+            quote = true;
+            n++;
+            break;
+        case '\"':
+            quote = true;
+            n += 2;
+            break;
+        case '$':
+        case '#':
+            n += 2;
+            break;
+        default:
+            n++;
+            break;
+        }
+    }
+
+    if (quote)
+        n += 2;
+
+    os = q = nasm_malloc(n);
+
+    if (quote)
+        *q++ = '\"';
+
+    for (p = str; *p; p++) {
+        switch (*p) {
+        case '$':
+        case '#':
+            *q++ = '$';
+            *q++ = *p;
+            break;
+        case '\"':
+            *q++ = *p;
+            *q++ = *p;
+            break;
+        default:
+            *q++ = *p;
+            break;
+        }
+    }
+
+    if (quote)
+        *q++ = '\"';
+
+    *q = '\0';
+
+    return os;
+}
+
+enum text_options {
+    OPT_BOGUS,
+    OPT_VERSION,
+    OPT_HELP,
+    OPT_ABORT_ON_PANIC,
+    OPT_MANGLE,
+    OPT_INCLUDE,
+    OPT_PRAGMA,
+    OPT_BEFORE,
+    OPT_LIMIT,
+    OPT_KEEP_ALL,
+    OPT_NO_LINE,
+    OPT_DEBUG,
+    OPT_REPRODUCIBLE
+};
+enum need_arg {
+    ARG_NO,
+    ARG_YES,
+    ARG_MAYBE
+};
+
+struct textargs {
+    const char *label;
+    enum text_options opt;
+    enum need_arg need_arg;
+    int pvt;
+};
+static const struct textargs textopts = {
+    {"v", OPT_VERSION, ARG_NO, 0},
+    {"version", OPT_VERSION, ARG_NO, 0},
+    {"help",     OPT_HELP,  ARG_NO, 0},
+    {"abort-on-panic", OPT_ABORT_ON_PANIC, ARG_NO, 0},
+    {"prefix",   OPT_MANGLE, ARG_YES, LM_GPREFIX},
+    {"postfix",  OPT_MANGLE, ARG_YES, LM_GSUFFIX},
+    {"gprefix",  OPT_MANGLE, ARG_YES, LM_GPREFIX},
+    {"gpostfix", OPT_MANGLE, ARG_YES, LM_GSUFFIX},
+    {"lprefix",  OPT_MANGLE, ARG_YES, LM_LPREFIX},
+    {"lpostfix", OPT_MANGLE, ARG_YES, LM_LSUFFIX},
+    {"include",  OPT_INCLUDE, ARG_YES, 0},
+    {"pragma",   OPT_PRAGMA,  ARG_YES, 0},
+    {"before",   OPT_BEFORE,  ARG_YES, 0},
+    {"limit-",   OPT_LIMIT,   ARG_YES, 0},
+    {"keep-all", OPT_KEEP_ALL, ARG_NO, 0},
+    {"no-line",  OPT_NO_LINE, ARG_NO, 0},
+    {"debug",    OPT_DEBUG, ARG_MAYBE, 0},
+    {"reproducible", OPT_REPRODUCIBLE, ARG_NO, 0},
+    {NULL, OPT_BOGUS, ARG_NO, 0}
+};
+
+static void show_version(void)
+{
+    printf("NASM version %s compiled on %s%s\n",
+           nasm_version, nasm_date, nasm_compile_options);
+    exit(0);
+}
+
+static bool stopoptions = false;
+static bool process_arg(char *p, char *q, int pass)
+{
+    char *param;
+    bool advance = false;
+
+    if (!p || !p0)
+        return false;
+
+    if (p0 == '-' && !stopoptions) {
+        if (strchr("oOfpPdDiIlLFXuUZwW", p1)) {
+            /* These parameters take values */
+            if (!(param = get_param(p, q, &advance)))
+                return advance;
+        }
+
+        switch (p1) {
+        case 's':
+            if (pass == 1)
+                error_file = stdout;
+            break;
+
+        case 'o':       /* output file */
+            if (pass == 2)
+                copy_filename(&outname, param, "output");
+            break;
+
+        case 'f':       /* output format */
+            if (pass == 1) {
+                ofmt = ofmt_find(param, &ofmt_alias);
+                if (!ofmt) {
+                    nasm_fatalf(ERR_USAGE, "unrecognised output format `%s' - use -hf for a list", param);
+                }
+            }
+            break;
+
+        case 'O':       /* Optimization level */
+            if (pass == 1) {
+                int opt;
+
+                if (!*param) {
+                    /* Naked -O == -Ox */
+                    optimizing.level = MAX_OPTIMIZE;
+                } else {
+                    while (*param) {
+                        switch (*param) {
+                        case '0': case '1': case '2': case '3': case '4':
+                        case '5': case '6': case '7': case '8': case '9':
+                            opt = strtoul(param, &param, 10);
+
+                            /* -O0 -> optimizing.level == -1, 0.98 behaviour */
+                            /* -O1 -> optimizing.level == 0, 0.98.09 behaviour */
+                            if (opt < 2)
+                                optimizing.level = opt - 1;
+                            else
+                                optimizing.level = opt;
+                            break;
+
+                        case 'v':
+                        case '+':
+                        param++;
+                        opt_verbose_info = true;
+                        break;
+
+                        case 'x':
+                            param++;
+                            optimizing.level = MAX_OPTIMIZE;
+                            break;
+
+                        default:
+                            nasm_fatal("unknown optimization option -O%c\n",
+                                       *param);
+                            break;
+                        }
+                    }
+                    if (optimizing.level > MAX_OPTIMIZE)
+                        optimizing.level = MAX_OPTIMIZE;
+                }
+            }
+            break;
+
+        case 'p':       /* pre-include */
+        case 'P':
+            if (pass == 2)
+                pp_pre_include(param);
+            break;
+
+        case 'd':       /* pre-define */
+        case 'D':
+            if (pass == 2)
+                pp_pre_define(param);
+            break;
+
+        case 'u':       /* un-define */
+        case 'U':
+            if (pass == 2)
+                pp_pre_undefine(param);
+            break;
+
+        case 'i':       /* include search path */
+        case 'I':
+            if (pass == 1)
+                strlist_add(include_path, param);
+            break;
+
+        case 'l':       /* listing file */
+            if (pass == 2)
+                copy_filename(&listname, param, "listing");
+            break;
+
+        case 'L':        /* listing options */
+            if (pass == 2) {
+                while (*param)
+                    list_options |= list_option_mask(*param++);
+            }
+            break;
+
+        case 'Z':       /* error messages file */
+            if (pass == 1)
+                copy_filename(&errname, param, "error");
+            break;
+
+        case 'F':       /* specify debug format */
+            if (pass == 1) {
+                using_debug_info = true;
+                debug_format = param;
+            }
+            break;
+
+        case 'X':       /* specify error reporting format */
+            if (pass == 1) {
+                if (!nasm_stricmp("vc", param) || !nasm_stricmp("msvc", param) || !nasm_stricmp("ms", param))
+                    errfmt = &errfmt_msvc;
+                else if (!nasm_stricmp("gnu", param) || !nasm_stricmp("gcc", param))
+                    errfmt = &errfmt_gnu;
+                else
+                    nasm_fatalf(ERR_USAGE, "unrecognized error reporting format `%s'", param);
+            }
+            break;
+
+        case 'g':
+            if (pass == 1) {
+                using_debug_info = true;
+                if (p2)
+                    debug_format = nasm_skip_spaces(p + 2);
+            }
+            break;
+
+        case 'h':
+            help(stdout);
+            exit(0);    /* never need usage message here */
+            break;
+
+        case 'y':
+            /* legacy option */
+            dfmt_list(stdout);
+            exit(0);
+            break;
+
+        case 't':
+            if (pass == 1)
+                tasm_compatible_mode = true;
+            break;
+
+        case 'v':
+            show_version();
+            break;
+
+        case 'e':       /* preprocess only */
+        case 'E':
+            if (pass == 1)
+                operating_mode = OP_PREPROCESS;
+            break;
+
+        case 'a':       /* assemble only - don't preprocess */
+            if (pass == 1)
+                ppopt |= PP_TRIVIAL;
+            break;
+
+        case 'w':
+        case 'W':
+            if (pass == 2)
+                set_warning_status(param);
+        break;
+
+        case 'M':
+            if (pass == 1) {
+                switch (p2) {
+                case 'W':
+                    quote_for_make = quote_for_wmake;
+                    break;
+                case 'D':
+                case 'F':
+                case 'T':
+                case 'Q':
+                    advance = true;
+                    break;
+                default:
+                    break;
+                }
+            } else {
+                switch (p2) {
+                case 0:
+                    operating_mode = OP_DEPEND;
+                    break;
+                case 'G':
+                    operating_mode = OP_DEPEND;
+                    depend_missing_ok = true;
+                    break;
+                case 'P':
+                    depend_emit_phony = true;
+                    break;
+                case 'D':
+                    operating_mode |= OP_DEPEND;
+                    if (q && (q0 != '-' || q1 == '\0')) {
+                        depend_file = q;
+                        advance = true;
+                    }
+                    break;
+                case 'F':
+                    depend_file = q;
+                    advance = true;
+                    break;
+                case 'T':
+                    depend_target = q;
+                    advance = true;
+                    break;
+                case 'Q':
+                    depend_target = quote_for_make(q);
+                    advance = true;
+                    break;
+                case 'W':
+                    /* handled in pass 1 */
+                    break;
+                default:
+                    nasm_nonfatalf(ERR_USAGE, "unknown dependency option `-M%c'", p2);
+                    break;
+                }
+            }
+            if (advance && (!q || !q0)) {
+                nasm_nonfatalf(ERR_USAGE, "option `-M%c' requires a parameter", p2);
+                break;
+            }
+            break;
+
+        case '-':
+            {
+                const struct textargs *tx;
+                size_t olen, plen;
+                char *eqsave;
+                enum text_options opt;
+
+                p += 2;
+
+                if (!*p) {        /* -- => stop processing options */
+                    stopoptions = true;
+                    break;
+                }
+
+                olen = 0;       /* Placate gcc at lower optimization levels */
+                plen = strlen(p);
+                for (tx = textopts; tx->label; tx++) {
+                    olen = strlen(tx->label);
+
+                    if (olen > plen)
+                        continue;
+
+                    if (nasm_memicmp(p, tx->label, olen))
+                        continue;
+
+                    if (tx->labelolen-1 == '-')
+                        break;  /* Incomplete option */
+
+                    if (!polen || polen == '=')
+                        break;  /* Complete option */
+                }
+
+                if (!tx->label) {
+                    nasm_nonfatalf(ERR_USAGE, "unrecognized option `--%s'", p);
+                }
+
+                opt = tx->opt;
+
+                eqsave = param = strchr(p+olen, '=');
+                if (param)
+                    *param++ = '\0';
+
+                switch (tx->need_arg) {
+                case ARG_YES:   /* Argument required, and may be standalone */
+                    if (!param) {
+                        param = q;
+                        advance = true;
+                    }
+
+                    /* Note: a null string is a valid parameter */
+                    if (!param) {
+                        nasm_nonfatalf(ERR_USAGE, "option `--%s' requires an argument", p);
+                        opt = OPT_BOGUS;
+                    }
+                    break;
+
+                case ARG_NO:    /* Argument prohibited */
+                    if (param) {
+                        nasm_nonfatalf(ERR_USAGE, "option `--%s' does not take an argument", p);
+                        opt = OPT_BOGUS;
+                    }
+                    break;
+
+                case ARG_MAYBE: /* Argument permitted, but must be attached with = */
+                    break;
+                }
+
+                switch (opt) {
+                case OPT_BOGUS:
+                    break;      /* We have already errored out */
+                case OPT_VERSION:
+                    show_version();
+                    break;
+                case OPT_ABORT_ON_PANIC:
+                    abort_on_panic = true;
+                    break;
+                case OPT_MANGLE:
+                    if (pass == 2)
+                        set_label_mangle(tx->pvt, param);
+                    break;
+                case OPT_INCLUDE:
+                    if (pass == 2)
+                        pp_pre_include(q);
+                    break;
+                case OPT_PRAGMA:
+                    if (pass == 2)
+                        pp_pre_command("%pragma", param);
+                    break;
+                case OPT_BEFORE:
+                    if (pass == 2)
+                        pp_pre_command(NULL, param);
+                    break;
+                case OPT_LIMIT:
+                    if (pass == 1)
+                        nasm_set_limit(p+olen, param);
+                    break;
+                case OPT_KEEP_ALL:
+                    keep_all = true;
+                    break;
+                case OPT_NO_LINE:
+                    ppopt |= PP_NOLINE;
+                    break;
+                case OPT_DEBUG:
+                    debug_nasm = param ? strtoul(param, NULL, 10) : debug_nasm+1;
+                    break;
+                case OPT_REPRODUCIBLE:
+                    reproducible = true;
+                    break;
+                case OPT_HELP:
+                    help(stdout);
+                    exit(0);
+                default:
+                    panic();
+                }
+
+                if (eqsave)
+                    *eqsave = '='; /* Restore = argument separator */
+
+                break;
+            }
+
+        default:
+            nasm_nonfatalf(ERR_USAGE, "unrecognised option `-%c'", p1);
+            break;
+        }
+    } else if (pass == 2) {
+        /* In theory we could allow multiple input files... */
+        copy_filename(&inname, p, "input");
+    }
+
+    return advance;
+}
+
+#define ARG_BUF_DELTA 128
+
+static void process_respfile(FILE * rfile, int pass)
+{
+    char *buffer, *p, *q, *prevarg;
+    int bufsize, prevargsize;
+
+    bufsize = prevargsize = ARG_BUF_DELTA;
+    buffer = nasm_malloc(ARG_BUF_DELTA);
+    prevarg = nasm_malloc(ARG_BUF_DELTA);
+    prevarg0 = '\0';
+
+    while (1) {                 /* Loop to handle all lines in file */
+        p = buffer;
+        while (1) {             /* Loop to handle long lines */
+            q = fgets(p, bufsize - (p - buffer), rfile);
+            if (!q)
+                break;
+            p += strlen(p);
+            if (p > buffer && p-1 == '\n')
+                break;
+            if (p - buffer > bufsize - 10) {
+                int offset;
+                offset = p - buffer;
+                bufsize += ARG_BUF_DELTA;
+                buffer = nasm_realloc(buffer, bufsize);
+                p = buffer + offset;
+            }
+        }
+
+        if (!q && p == buffer) {
+            if (prevarg0)
+                process_arg(prevarg, NULL, pass);
+            nasm_free(buffer);
+            nasm_free(prevarg);
+            return;
+        }
+
+        /*
+         * Play safe: remove CRs, LFs and any spurious ^Zs, if any of
+         * them are present at the end of the line.
+         */
+        *(p = &bufferstrcspn(buffer, "\r\n\032")) = '\0';
+
+        while (p > buffer && nasm_isspace(p-1))
+            *--p = '\0';
+
+        p = nasm_skip_spaces(buffer);
+
+        if (process_arg(prevarg, p, pass))
+            *p = '\0';
+
+        if ((int) strlen(p) > prevargsize - 10) {
+            prevargsize += ARG_BUF_DELTA;
+            prevarg = nasm_realloc(prevarg, prevargsize);
+        }
+        strncpy(prevarg, p, prevargsize);
+    }
+}
+
+/* Function to process args from a string of args, rather than the
+ * argv array. Used by the environment variable and response file
+ * processing.
+ */
+static void process_args(char *args, int pass)
+{
+    char *p, *q, *arg, *prevarg;
+    char separator = ' ';
+
+    p = args;
+    if (*p && *p != '-')
+        separator = *p++;
+    arg = NULL;
+    while (*p) {
+        q = p;
+        while (*p && *p != separator)
+            p++;
+        while (*p == separator)
+            *p++ = '\0';
+        prevarg = arg;
+        arg = q;
+        if (process_arg(prevarg, arg, pass))
+            arg = NULL;
+    }
+    if (arg)
+        process_arg(arg, NULL, pass);
+}
+
+static void process_response_file(const char *file, int pass)
+{
+    char str2048;
+    FILE *f = nasm_open_read(file, NF_TEXT);
+    if (!f) {
+        perror(file);
+        exit(-1);
+    }
+    while (fgets(str, sizeof str, f)) {
+        process_args(str, pass);
+    }
+    fclose(f);
+}
+
+static void parse_cmdline(int argc, char **argv, int pass)
+{
+    FILE *rfile;
+    char *envreal, *envcopy = NULL, *p;
+
+    /*
+     * Initialize all the warnings to their default state, including
+     * warning index 0 used for "always on".
+     */
+    memcpy(warning_state, warning_default, sizeof warning_state);
+
+    /*
+     * First, process the NASMENV environment variable.
+     */
+    envreal = getenv("NASMENV");
+    if (envreal) {
+        envcopy = nasm_strdup(envreal);
+        process_args(envcopy, pass);
+        nasm_free(envcopy);
+    }
+
+    /*
+     * Now process the actual command line.
+     */
+    while (--argc) {
+        bool advance;
+        argv++;
+        if (argv00 == '@') {
+            /*
+             * We have a response file, so process this as a set of
+             * arguments like the environment variable. This allows us
+             * to have multiple arguments on a single line, which is
+             * different to the -@resp file processing below for regular
+             * NASM.
+             */
+            process_response_file(argv0+1, pass);
+            argc--;
+            argv++;
+        }
+        if (!stopoptions && argv00 == '-' && argv01 == '@') {
+            p = get_param(argv0, argc > 1 ? argv1 : NULL, &advance);
+            if (p) {
+                rfile = nasm_open_read(p, NF_TEXT);
+                if (rfile) {
+                    process_respfile(rfile, pass);
+                    fclose(rfile);
+                } else {
+                    nasm_nonfatalf(ERR_USAGE, "unable to open response file `%s'", p);
+                }
+            }
+        } else
+            advance = process_arg(argv0, argc > 1 ? argv1 : NULL, pass);
+        argv += advance, argc -= advance;
+    }
+
+    /*
+     * Look for basic command line typos. This definitely doesn't
+     * catch all errors, but it might help cases of fumbled fingers.
+     */
+    if (pass != 2)
+        return;
+
+    if (!inname)
+        nasm_fatalf(ERR_USAGE, "no input file specified");
+    else if ((errname && !strcmp(inname, errname)) ||
+             (outname && !strcmp(inname, outname)) ||
+             (listname &&  !strcmp(inname, listname))  ||
+             (depend_file && !strcmp(inname, depend_file)))
+        nasm_fatalf(ERR_USAGE, "will not overwrite input file");
+
+    if (errname) {
+        error_file = nasm_open_write(errname, NF_TEXT);
+        if (!error_file) {
+            error_file = stderr;        /* Revert to default! */
+            nasm_fatalf(ERR_USAGE, "cannot open file `%s' for error messages", errname);
+        }
+    }
+}
+
+static void forward_refs(insn *instruction)
+{
+    int i;
+    struct forwrefinfo *fwinf;
+
+    instruction->forw_ref = false;
+
+    if (!optimizing.level)
+        return;                 /* For -O0 don't bother */
+
+    if (!forwref)
+        return;
+
+    if (forwref->lineno != globallineno)
+        return;
+
+    instruction->forw_ref = true;
+    do {
+        instruction->oprsforwref->operand.opflags |= OPFLAG_FORWARD;
+        forwref = saa_rstruct(forwrefs);
+    } while (forwref && forwref->lineno == globallineno);
+
+    if (!pass_first())
+        return;
+
+    for (i = 0; i < instruction->operands; i++) {
+        if (instruction->oprsi.opflags & OPFLAG_FORWARD) {
+            fwinf = saa_wstruct(forwrefs);
+            fwinf->lineno = globallineno;
+            fwinf->operand = i;
+        }
+    }
+}
+
+static void process_insn(insn *instruction)
+{
+    int32_t n;
+    int64_t l;
+
+    if (!instruction->times)
+        return;                 /* Nothing to do... */
+
+    nasm_assert(instruction->times > 0);
+
+    /*
+     * NOTE: insn_size() can change instruction->times
+     * (usually to 1) when called.
+     */
+    if (!pass_final()) {
+        int64_t start = location.offset;
+        for (n = 1; n <= instruction->times; n++) {
+            l = insn_size(location.segment, location.offset,
+                          globalbits, instruction);
+            /* l == -1 -> invalid instruction */
+            if (l != -1)
+                increment_offset(l);
+        }
+        if (list_option('p')) {
+            struct out_data dummy;
+            memset(&dummy, 0, sizeof dummy);
+            dummy.type   = OUT_RAWDATA; /* Handled specially with .data NULL */
+            dummy.offset = start;
+            dummy.size   = location.offset - start;
+            lfmt->output(&dummy);
+        }
+    } else {
+        l = assemble(location.segment, location.offset,
+                     globalbits, instruction);
+                /* We can't get an invalid instruction here */
+        increment_offset(l);
+
+        if (instruction->times > 1) {
+            lfmt->uplevel(LIST_TIMES, instruction->times);
+            for (n = 2; n <= instruction->times; n++) {
+                l = assemble(location.segment, location.offset,
+                             globalbits, instruction);
+                increment_offset(l);
+            }
+            lfmt->downlevel(LIST_TIMES);
+        }
+    }
+}
+
+static void assemble_file(const char *fname, struct strlist *depend_list)
+{
+    char *line;
+    insn output_ins;
+    uint64_t prev_offset_changed;
+    int64_t stall_count = 0; /* Make sure we make forward progress... */
+
+    switch (cmd_sb) {
+    case 16:
+        break;
+    case 32:
+        if (!iflag_cpu_level_ok(&cmd_cpu, IF_386))
+            nasm_fatal("command line: 32-bit segment size requires a higher cpu");
+        break;
+    case 64:
+        if (!iflag_cpu_level_ok(&cmd_cpu, IF_X86_64))
+            nasm_fatal("command line: 64-bit segment size requires a higher cpu");
+        break;
+    default:
+        panic();
+        break;
+    }
+
+    prev_offset_changed = INT64_MAX;
+
+    if (listname && !keep_all) {
+        /* Remove the list file in case we die before the output pass */
+        remove(listname);
+    }
+
+    while (!terminate_after_phase && !pass_final()) {
+        _passn++;
+        switch (pass_type()) {
+        case PASS_INIT:
+            _pass_type = PASS_FIRST;
+            break;
+        case PASS_OPT:
+            if (global_offset_changed)
+                break;          /* One more optimization pass */
+            /* fall through */
+        default:
+            _pass_type++;
+            break;
+        }
+
+        global_offset_changed = 0;
+
+	/*
+	 * Create a warning buffer list unless we are in
+         * pass 2 (everything will be emitted immediately in pass 2.)
+	 */
+	if (warn_list) {
+            if (warn_list->nstr || pass_final())
+                strlist_free(&warn_list);
+        }
+
+	if (!pass_final() && !warn_list)
+            warn_list = strlist_alloc(false);
+
+        globalbits = cmd_sb;  /* set 'bits' to command line default */
+        cpu = cmd_cpu;
+        if (listname) {
+            if (pass_final() || list_on_every_pass()) {
+                lfmt->init(listname);
+            } else if (list_active()) {
+                /*
+                 * Looks like we used the list engine on a previous pass,
+                 * but now it is turned off, presumably via %pragma -p
+                 */
+                lfmt->cleanup();
+                if (!keep_all)
+                    remove(listname);
+            }
+        }
+
+        in_absolute = false;
+        if (!pass_first()) {
+            saa_rewind(forwrefs);
+            forwref = saa_rstruct(forwrefs);
+            raa_free(offsets);
+            offsets = raa_init();
+        }
+        location.segment = NO_SEG;
+        location.offset  = 0;
+        if (pass_first())
+            location.known = true;
+        ofmt->reset();
+        switch_segment(ofmt->section(NULL, &globalbits));
+        pp_reset(fname, PP_NORMAL, depend_list);
+
+        globallineno = 0;
+
+        while ((line = pp_getline())) {
+            if (++globallineno > nasm_limitLIMIT_LINES)
+                nasm_fatal("overall line count exceeds the maximum %"PRId64"\n",
+                           nasm_limitLIMIT_LINES);
+
+            /*
+             * Here we parse our directives; this is not handled by the
+             * main parser.
+             */
+            if (process_directives(line))
+                goto end_of_line; /* Just do final cleanup */
+
+            /* Not a directive, or even something that starts with  */
+            parse_line(line, &output_ins);
+            forward_refs(&output_ins);
+            process_insn(&output_ins);
+            cleanup_insn(&output_ins);
+
+        end_of_line:
+            nasm_free(line);
+        }                       /* end while (line = pp_getline... */
+
+        pp_cleanup_pass();
+
+        /* We better not be having an error hold still... */
+        nasm_assert(!errhold_stack);
+
+        if (global_offset_changed) {
+            switch (pass_type()) {
+            case PASS_OPT:
+                /*
+                 * This is the only pass type that can be executed more
+                 * than once, and therefore has the ability to stall.
+                 */
+                if (global_offset_changed < prev_offset_changed) {
+                    prev_offset_changed = global_offset_changed;
+                    stall_count = 0;
+                } else {
+                    stall_count++;
+                }
+
+                if (stall_count > nasm_limitLIMIT_STALLED ||
+                    pass_count() >= nasm_limitLIMIT_PASSES) {
+                    /* No convergence, almost certainly dead */
+                    nasm_nonfatalf(ERR_UNDEAD,
+                                   "unable to find valid values for all labels "
+                                   "after %"PRId64" passes; "
+                                   "stalled for %"PRId64", giving up.",
+                                   pass_count(), stall_count);
+                    nasm_nonfatalf(ERR_UNDEAD,
+                               "Possible causes: recursive EQUs, macro abuse.");
+                }
+                break;
+
+            case PASS_STAB:
+                /*!
+                 *!phase off phase error during stabilization
+                 *!  warns about symbols having changed values during
+                 *!  the second-to-last assembly pass. This is not
+                 *!  inherently fatal, but may be a source of bugs.
+                 */
+                nasm_warn(WARN_PHASE|ERR_UNDEAD,
+                          "phase error during stabilization "
+                          "pass, hoping for the best");
+                break;
+
+            case PASS_FINAL:
+                nasm_nonfatalf(ERR_UNDEAD,
+                               "phase error during code generation pass");
+                break;
+
+            default:
+                /* This is normal, we'll keep going... */
+                break;
+            }
+        }
+
+        reset_warnings();
+    }
+
+    if (opt_verbose_info && pass_final()) {
+        /*  -On and -Ov switches */
+        nasm_info("assembly required 1+%"PRId64"+2 passes\n", pass_count()-3);
+    }
+
+    lfmt->cleanup();
+    strlist_free(&warn_list);
+}
+
+/**
+ * get warning index; 0 if this is non-suppressible.
+ */
+static size_t warn_index(errflags severity)
+{
+    size_t index;
+
+    if ((severity & ERR_MASK) >= ERR_FATAL)
+        return 0;               /* Fatal errors are never suppressible */
+
+    /* Warnings MUST HAVE a warning category specifier! */
+    nasm_assert((severity & (ERR_MASK|WARN_MASK)) != ERR_WARNING);
+
+    index = WARN_IDX(severity);
+    nasm_assert(index < WARN_IDX_ALL);
+
+    return index;
+}
+
+static bool skip_this_pass(errflags severity)
+{
+    errflags type = severity & ERR_MASK;
+
+    /*
+     * See if it's a pass-specific error or warning which should be skipped.
+     * We can never skip fatal errors as by definition they cannot be
+     * resumed from.
+     */
+    if (type >= ERR_FATAL)
+        return false;
+
+    /*
+     * ERR_LISTMSG messages are always skipped; the list file
+     * receives them anyway as this function is not consulted
+     * for sending to the list file.
+     */
+    if (type == ERR_LISTMSG)
+        return true;
+
+    /*
+     * This message not applicable unless it is the last pass we are going
+     * to execute; this can be either the final code-generation pass or
+     * the single pass executed in preproc-only mode.
+     */
+    return (severity & ERR_PASS2) && !pass_final_or_preproc();
+}
+
+/**
+ * check for suppressed message (usually warnings or notes)
+ *
+ * @param severity the severity of the warning or error
+ * @return true if we should abort error/warning printing
+ */
+static bool is_suppressed(errflags severity)
+{
+    /* Fatal errors must never be suppressed */
+    if ((severity & ERR_MASK) >= ERR_FATAL)
+        return false;
+
+    /* This error/warning is pointless if we are dead anyway */
+    if ((severity & ERR_UNDEAD) && terminate_after_phase)
+        return true;
+
+    if (!(warning_statewarn_index(severity) & WARN_ST_ENABLED))
+        return true;
+
+    if (!(severity & ERR_PP_LISTMACRO))
+        return pp_suppress_error(severity);
+
+    return false;
+}
+
+/**
+ * Return the true error type (the ERR_MASK part) of the given
+ * severity, accounting for warnings that may need to be promoted to
+ * error.
+ *
+ * @param severity the severity of the warning or error
+ * @return true if we should error out
+ */
+static errflags true_error_type(errflags severity)
+{
+    const uint8_t warn_is_err = WARN_ST_ENABLED|WARN_ST_ERROR;
+    int type;
+
+    type = severity & ERR_MASK;
+
+    /* Promote warning to error? */
+    if (type == ERR_WARNING) {
+        uint8_t state = warning_statewarn_index(severity);
+        if ((state & warn_is_err) == warn_is_err)
+            type = ERR_NONFATAL;
+    }
+
+    return type;
+}
+
+/*
+ * The various error type prefixes
+ */
+static const char * const error_pfx_tableERR_MASK+1 = {
+    ";;; ", "debug: ", "info: ", "warning: ",
+        "error: ", "fatal: ", "critical: ", "panic: "
+};
+static const char no_file_name = "nasm"; /* What to print if no file name */
+
+/*
+ * For fatal/critical/panic errors, kill this process.
+ */
+static fatal_func die_hard(errflags true_type, errflags severity)
+{
+    fflush(NULL);
+
+    if (true_type == ERR_PANIC && abort_on_panic)
+        abort();
+
+    if (ofile) {
+        fclose(ofile);
+        if (!keep_all)
+            remove(outname);
+        ofile = NULL;
+    }
+
+    if (severity & ERR_USAGE)
+        usage();
+
+    /* Terminate immediately */
+    exit(true_type - ERR_FATAL + 1);
+}
+
+/*
+ * Returns the struct src_location appropriate for use, after some
+ * potential filename mangling.
+ */
+static struct src_location error_where(errflags severity)
+{
+    struct src_location where;
+
+    if (severity & ERR_NOFILE) {
+        where.filename = NULL;
+        where.lineno = 0;
+    } else {
+        where = src_where_error();
+
+        if (!where.filename) {
+            where.filename =
+            inname && inname0 ? inname :
+                outname && outname0 ? outname :
+                NULL;
+            where.lineno = 0;
+        }
+    }
+
+    return where;
+}
+
+/*
+ * error reporting for critical and panic errors: minimize
+ * the amount of system dependencies for getting a message out,
+ * and in particular try to avoid memory allocations.
+ */
+fatal_func nasm_verror_critical(errflags severity, const char *fmt, va_list args)
+{
+    struct src_location where;
+    errflags true_type = severity & ERR_MASK;
+    static bool been_here = false;
+
+    if (unlikely(been_here))
+        abort();                /* Recursive error... just die */
+
+    been_here = true;
+
+    where = error_where(severity);
+    if (!where.filename)
+        where.filename = no_file_name;
+
+    fputs(error_pfx_tableseverity, error_file);
+    fputs(where.filename, error_file);
+    if (where.lineno) {
+        fprintf(error_file, "%s%"PRId32"%s",
+                errfmt->beforeline, where.lineno, errfmt->afterline);
+    }
+    fputs(errfmt->beforemsg, error_file);
+    vfprintf(error_file, fmt, args);
+    fputc('\n', error_file);
+
+    die_hard(true_type, severity);
+}
+
+/**
+ * Stack of tentative error hold lists.
+ */
+struct nasm_errtext {
+    struct nasm_errtext *next;
+    char *msg;                  /* Owned by this structure */
+    struct src_location where;  /* Owned by the srcfile system */
+    errflags severity;
+    errflags true_type;
+};
+struct nasm_errhold {
+    struct nasm_errhold *up;
+    struct nasm_errtext *head, **tail;
+};
+
+static void nasm_free_error(struct nasm_errtext *et)
+{
+    nasm_free(et->msg);
+    nasm_free(et);
+}
+
+static void nasm_issue_error(struct nasm_errtext *et);
+
+struct nasm_errhold *nasm_error_hold_push(void)
+{
+    struct nasm_errhold *eh;
+
+    nasm_new(eh);
+    eh->up = errhold_stack;
+    eh->tail = &eh->head;
+    errhold_stack = eh;
+
+    return eh;
+}
+
+void nasm_error_hold_pop(struct nasm_errhold *eh, bool issue)
+{
+    struct nasm_errtext *et, *etmp;
+
+    /* Allow calling with a null argument saying no hold in the first place */
+    if (!eh)
+        return;
+
+    /* This *must* be the current top of the errhold stack */
+    nasm_assert(eh == errhold_stack);
+
+    if (eh->head) {
+        if (issue) {
+            if (eh->up) {
+                /* Commit the current hold list to the previous level */
+                *eh->up->tail = eh->head;
+                eh->up->tail = eh->tail;
+            } else {
+                /* Issue errors */
+                list_for_each_safe(et, etmp, eh->head)
+                    nasm_issue_error(et);
+            }
+        } else {
+            /* Free the list, drop errors */
+            list_for_each_safe(et, etmp, eh->head)
+                nasm_free_error(et);
+        }
+    }
+
+    errhold_stack = eh->up;
+    nasm_free(eh);
+}
+
+/**
+ * common error reporting
+ * This is the common back end of the error reporting schemes currently
+ * implemented.  It prints the nature of the warning and then the
+ * specific error message to error_file and may or may not return.  It
+ * doesn't return if the error severity is a "panic" or "debug" type.
+ *
+ * @param severity the severity of the warning or error
+ * @param fmt the printf style format string
+ */
+void nasm_verror(errflags severity, const char *fmt, va_list args)
+{
+    struct nasm_errtext *et;
+    errflags true_type = true_error_type(severity);
+
+    if (true_type >= ERR_CRITICAL)
+        nasm_verror_critical(severity, fmt, args);
+
+    if (is_suppressed(severity))
+        return;
+
+    nasm_new(et);
+    et->severity = severity;
+    et->true_type = true_type;
+    et->msg = nasm_vasprintf(fmt, args);
+    et->where = error_where(severity);
+
+    if (errhold_stack && true_type <= ERR_NONFATAL) {
+        /* It is a tentative error */
+        *errhold_stack->tail = et;
+        errhold_stack->tail = &et->next;
+    } else {
+        nasm_issue_error(et);
+    }
+
+    /*
+     * Don't do this before then, if we do, we lose messages in the list
+     * file, as the list file is only generated in the last pass.
+     */
+    if (skip_this_pass(severity))
+        return;
+
+    if (!(severity & (ERR_HERE|ERR_PP_LISTMACRO)))
+        pp_error_list_macros(severity);
+}
+
+/*
+ * Actually print, list and take action on an error
+ */
+static void nasm_issue_error(struct nasm_errtext *et)
+{
+    const char *pfx;
+    char warnsuf64;           /* Warning suffix */
+    char linestr64;           /* Formatted line number if applicable */
+    const errflags severity  = et->severity;
+    const errflags true_type = et->true_type;
+    const struct src_location where = et->where;
+
+    if (severity & ERR_NO_SEVERITY)
+        pfx = "";
+    else
+        pfx = error_pfx_tabletrue_type;
+
+    *warnsuf = 0;
+    if ((severity & (ERR_MASK|ERR_HERE|ERR_PP_LISTMACRO)) == ERR_WARNING) {
+        /*
+         * It's a warning without ERR_HERE defined, and we are not already
+         * unwinding the macros that led us here.
+         */
+        snprintf(warnsuf, sizeof warnsuf, " -w+%s%s",
+                 (true_type >= ERR_NONFATAL) ? "error=" : "",
+                 warning_namewarn_index(severity));
+    }
+
+    *linestr = 0;
+    if (where.lineno) {
+        snprintf(linestr, sizeof linestr, "%s%"PRId32"%s",
+                 errfmt->beforeline, where.lineno, errfmt->afterline);
+    }
+
+    if (!skip_this_pass(severity)) {
+        const char *file = where.filename ? where.filename : no_file_name;
+        const char *here = "";
+
+        if (severity & ERR_HERE) {
+            here = where.filename ? " here" : " in an unknown location";
+        }
+
+        if (warn_list && true_type < ERR_NONFATAL) {
+            /*
+             * Buffer up warnings until we either get an error
+             * or we are on the code-generation pass.
+             */
+            strlist_printf(warn_list, "%s%s%s%s%s%s%s",
+                           file, linestr, errfmt->beforemsg,
+                           pfx, et->msg, here, warnsuf);
+        } else {
+            /*
+             * Actually output an error.  If we have buffered
+             * warnings, and this is a non-warning, output them now.
+             */
+            if (true_type >= ERR_NONFATAL && warn_list) {
+                strlist_write(warn_list, "\n", error_file);
+                strlist_free(&warn_list);
+            }
+
+            fprintf(error_file, "%s%s%s%s%s%s%s\n",
+                    file, linestr, errfmt->beforemsg,
+                    pfx, et->msg, here, warnsuf);
+        }
+    }
+
+    /* Are we recursing from error_list_macros? */
+    if (severity & ERR_PP_LISTMACRO)
+        goto done;
+
+    /*
+     * Don't suppress this with skip_this_pass(), or we don't get
+     * pass1 or preprocessor warnings in the list file
+     */
+    if (severity & ERR_HERE) {
+        if (where.lineno)
+            lfmt->error(severity, "%s%s at %s:%"PRId32"%s",
+                        pfx, et->msg, where.filename, where.lineno, warnsuf);
+        else if (where.filename)
+            lfmt->error(severity, "%s%s in file %s%s",
+                        pfx, et->msg, where.filename, warnsuf);
+        else
+            lfmt->error(severity, "%s%s in an unknown location%s",
+                        pfx, et->msg, warnsuf);
+    } else {
+        lfmt->error(severity, "%s%s%s", pfx, et->msg, warnsuf);
+    }
+
+    if (skip_this_pass(severity))
+        goto done;
+
+    if (true_type >= ERR_FATAL)
+        die_hard(true_type, severity);
+    else if (true_type >= ERR_NONFATAL)
+        terminate_after_phase = true;
+
+done:
+    nasm_free_error(et);
+}
+
+static void usage(void)
+{
+    fprintf(error_file, "Type %s -h for help.\n", _progname);
+}
+
+static void help(FILE *out)
+{
+    int i;
+
+    fprintf(out,
+            "Usage: %s -@ response_file options... -- filename\n"
+            "       %s -v (or --v)\n",
+            _progname, _progname);
+    fputs(
+        "\n"
+        "Options (values in brackets indicate defaults):\n"
+        "\n"
+        "    -h            show this text and exit (also --help)\n"
+        "    -v (or --v)   print the NASM version number and exit\n"
+        "    -@ file       response file; one command line option per line\n"
+        "\n"
+        "    -o outfile    write output to outfile\n"
+        "    --keep-all    output files will not be removed even if an error happens\n"
+        "\n"
+        "    -Xformat      specify error reporting format (gnu or vc)\n"
+        "    -s            redirect error messages to stdout\n"
+        "    -Zfile        redirect error messages to file\n"
+        "\n"
+        "    -M            generate Makefile dependencies on stdout\n"
+        "    -MG           d:o, missing files assumed generated\n"
+        "    -MF file      set Makefile dependency file\n"
+        "    -MD file      assemble and generate dependencies\n"
+        "    -MT file      dependency target name\n"
+        "    -MQ file      dependency target name (quoted)\n"
+        "    -MP           emit phony targets\n"
+        "\n"
+        "    -f format     select output file format\n"
+        , out);
+    ofmt_list(ofmt, out);
+    fputs(
+        "\n"
+        "    -g            generate debugging information\n"
+        "    -F format     select a debugging format (output format dependent)\n"
+        "    -gformat      same as -g -F format\n"
+        , out);
+    dfmt_list(out);
+    fputs(
+        "\n"
+        "    -l listfile   write listing to a list file\n"
+        "    -Lflags...    add optional information to the list file\n"
+        "       -Lb        show builtin macro packages (standard and %use)\n"
+        "       -Ld        show byte and repeat counts in decimal, not hex\n"
+        "       -Le        show the preprocessed output\n"
+        "       -Lf        ignore .nolist (force output)\n"
+        "       -Lm        show multi-line macro calls with expanded parameters\n"
+        "       -Lp        output a list file every pass, in case of errors\n"
+        "       -Ls        show all single-line macro definitions\n"
+        "       -Lw        flush the output after every line (very slow!)\n"
+        "       -L+        enable all listing options except -Lw (very verbose!)\n"
+        "\n"
+        "    -Oflags...    optimize opcodes, immediates and branch offsets\n"
+        "       -O0        no optimization\n"
+        "       -O1        minimal optimization\n"
+        "       -Ox        multipass optimization (default)\n"
+        "       -Ov        display the number of passes executed at the end\n"
+        "    -t            assemble in limited SciTech TASM compatible mode\n"
+        "\n"
+        "    -E (or -e)    preprocess only (writes output to stdout by default)\n"
+        "    -a            don't preprocess (assemble only)\n"
+        "    -Ipath        add a pathname to the include file path\n"
+        "    -Pfile        pre-include a file (also --include)\n"
+        "    -Dmacro=str pre-define a macro\n"
+        "    -Umacro       undefine a macro\n"
+        "   --pragma str   pre-executes a specific %%pragma\n"
+        "   --before str   add line (usually a preprocessor statement) before the input\n"
+        "   --no-line      ignore %line directives in input\n"
+        "\n"
+        "   --prefix str   prepend the given string to the names of all extern,\n"
+        "                  common and global symbols (also --gprefix)\n"
+        "   --suffix str   append the given string to the names of all extern,\n"
+        "                  common and global symbols (also --gprefix)\n"
+        "   --lprefix str  prepend the given string to local symbols\n"
+        "   --lpostfix str append the given string to local symbols\n"
+        "\n"
+        "   --reproducible attempt to produce run-to-run identical output\n"
+        "\n"
+        "    -w+x          enable warning x (also -Wx)\n"
+        "    -w-x          disable warning x (also -Wno-x)\n"
+        "    -w+-error   promote all warnings to errors (also -Werror)\n"
+        "    -w+-error=x promote warning x to errors (also -Werror=x)\n"
+        , out);
+
+    fprintf(out, "       %-20s %s\n",
+            warning_nameWARN_IDX_ALL, warning_helpWARN_IDX_ALL);
+
+    for (i = 1; i < WARN_IDX_ALL; i++) {
+        const char *me   = warning_namei;
+        const char *prev = warning_namei-1;
+        const char *next = warning_namei+1;
+
+        if (prev) {
+            int prev_len = strlen(prev);
+            const char *dash = me;
+
+            while ((dash = strchr(dash+1, '-'))) {
+                int prefix_len = dash - me; /* Not including final dash */
+                if (strncmp(next, me, prefix_len+1)) {
+                    /* Only one or last option with this prefix */
+                    break;
+                }
+                if (prefix_len >= prev_len ||
+                    strncmp(prev, me, prefix_len) ||
+                    (prevprefix_len != '-' && prevprefix_len != '\0')) {
+                    /* This prefix is different from the previous option */
+                    fprintf(out, "       %-20.*s all warnings prefixed with \"%.*s\"\n",
+                            prefix_len, me, prefix_len+1, me);
+                }
+            }
+        }
+
+        fprintf(out, "       %-20s %s%s\n",
+                warning_namei, warning_helpi,
+                (warning_defaulti & WARN_ST_ERROR) ? " error" :
+                (warning_defaulti & WARN_ST_ENABLED) ? " on" : " off");
+    }
+
+    fputs(
+        "\n"
+        "   --limit-X val  set execution limit X\n"
+        , out);
+
+
+    for (i = 0; i <= LIMIT_MAX; i++) {
+        fprintf(out, "       %-20s %s ",
+                limit_infoi.name, limit_infoi.help);
+        if (nasm_limiti < LIMIT_MAX_VAL) {
+            fprintf(out, "%"PRId64"\n", nasm_limiti);
+        } else {
+            fputs("unlimited\n", out);
+        }
+    }
+}

_service:tar_scm:nasm-2.16.03.tar.xz/asm/parser.c Added

@@ -0,0 +1,1348 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2023 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * parser.c   source line parser for the Netwide Assembler
+ */
+
+#include "compiler.h"
+
+#include "nctype.h"
+
+#include "nasm.h"
+#include "insns.h"
+#include "nasmlib.h"
+#include "error.h"
+#include "stdscan.h"
+#include "eval.h"
+#include "parser.h"
+#include "floats.h"
+#include "assemble.h"
+#include "tables.h"
+
+
+static int end_expression_next(void);
+
+static struct tokenval tokval;
+
+/*
+ * Human-readable description of a token, intended for error messages.
+ * The resulting string needs to be freed.
+ */
+static char *tokstr(const struct tokenval *tok)
+{
+    if (tok->t_type == TOKEN_EOS) {
+        return nasm_strdup("end of line");
+    } else if (tok->t_len) {
+        return nasm_asprintf("`%.*s'", tok->t_len, tok->t_start);
+    } else {
+        return nasm_strdup("invalid token");
+    }
+}
+
+static void process_size_override(insn *result, operand *op)
+{
+    if (tasm_compatible_mode) {
+        switch (tokval.t_integer) {
+            /* For TASM compatibility a size override inside the
+             * brackets changes the size of the operand, not the
+             * address type of the operand as it does in standard
+             * NASM syntax. Hence:
+             *
+             *  mov     eax,DWORD val
+             *
+             * is valid syntax in TASM compatibility mode. Note that
+             * you lose the ability to override the default address
+             * type for the instruction, but we never use anything
+             * but 32-bit flat model addressing in our code.
+             */
+        case S_BYTE:
+            op->type |= BITS8;
+            break;
+        case S_WORD:
+            op->type |= BITS16;
+            break;
+        case S_DWORD:
+        case S_LONG:
+            op->type |= BITS32;
+            break;
+        case S_QWORD:
+            op->type |= BITS64;
+            break;
+        case S_TWORD:
+            op->type |= BITS80;
+            break;
+        case S_OWORD:
+            op->type |= BITS128;
+            break;
+        default:
+            nasm_nonfatal("invalid operand size specification");
+            break;
+        }
+    } else {
+        /* Standard NASM compatible syntax */
+        switch (tokval.t_integer) {
+        case S_NOSPLIT:
+            op->eaflags |= EAF_TIMESTWO;
+            break;
+        case S_REL:
+            op->eaflags |= EAF_REL;
+            break;
+        case S_ABS:
+            op->eaflags |= EAF_ABS;
+            break;
+        case S_BYTE:
+            op->disp_size = 8;
+            op->eaflags |= EAF_BYTEOFFS;
+            break;
+        case P_A16:
+        case P_A32:
+        case P_A64:
+            if (result->prefixesPPS_ASIZE &&
+                result->prefixesPPS_ASIZE != tokval.t_integer)
+                nasm_nonfatal("conflicting address size specifications");
+            else
+                result->prefixesPPS_ASIZE = tokval.t_integer;
+            break;
+        case S_WORD:
+            op->disp_size = 16;
+            op->eaflags |= EAF_WORDOFFS;
+            break;
+        case S_DWORD:
+        case S_LONG:
+            op->disp_size = 32;
+            op->eaflags |= EAF_WORDOFFS;
+            break;
+        case S_QWORD:
+            op->disp_size = 64;
+            op->eaflags |= EAF_WORDOFFS;
+            break;
+        default:
+            nasm_nonfatal("invalid size specification in"
+                          " effective address");
+            break;
+        }
+    }
+}
+
+/*
+ * Braced keywords are parsed here.  opmask and zeroing
+ * decorators can be placed in any order.  e.g. zmm1 {k2}{z} or zmm2
+ * {z}{k3} decorator(s) are placed at the end of an operand.
+ */
+static bool parse_braces(decoflags_t *decoflags)
+{
+    int i, j;
+
+    i = tokval.t_type;
+
+    while (true) {
+        switch (i) {
+        case TOKEN_OPMASK:
+            if (*decoflags & OPMASK_MASK) {
+                nasm_nonfatal("opmask k%"PRIu64" is already set",
+                              *decoflags & OPMASK_MASK);
+                *decoflags &= ~OPMASK_MASK;
+            }
+            *decoflags |= VAL_OPMASK(nasm_regvalstokval.t_integer);
+            break;
+        case TOKEN_DECORATOR:
+            j = tokval.t_integer;
+            switch (j) {
+            case BRC_Z:
+                *decoflags |= Z_MASK;
+                break;
+            case BRC_1TO2:
+            case BRC_1TO4:
+            case BRC_1TO8:
+            case BRC_1TO16:
+            case BRC_1TO32:
+                *decoflags |= BRDCAST_MASK | VAL_BRNUM(j - BRC_1TO2);
+                break;
+            default:
+                nasm_nonfatal("{%s} is not an expected decorator",
+                              tokval.t_charptr);
+                break;
+            }
+            break;
+        case ',':
+        case TOKEN_EOS:
+            return false;
+        default:
+            nasm_nonfatal("only a series of valid decorators expected");
+            return true;
+        }
+        i = stdscan(NULL, &tokval);
+    }
+}
+
+static inline unused_func
+const expr *next_expr(const expr *e, const expr **next_list)
+{
+    e++;
+    if (!e->type) {
+        if (next_list) {
+            e = *next_list;
+            *next_list = NULL;
+        } else {
+            e = NULL;
+        }
+    }
+    return e;
+}
+
+static inline void init_operand(operand *op)
+{
+    memset(op, 0, sizeof *op);
+
+    op->basereg  = -1;
+    op->indexreg = -1;
+    op->segment  = NO_SEG;
+    op->wrt      = NO_SEG;
+}
+
+static int parse_mref(operand *op, const expr *e)
+{
+    int b, i, s;        /* basereg, indexreg, scale */
+    int64_t o;          /* offset */
+
+    b = op->basereg;
+    i = op->indexreg;
+    s = op->scale;
+    o = op->offset;
+
+    for (; e->type; e++) {
+        if (e->type <= EXPR_REG_END) {
+            bool is_gpr = is_class(REG_GPR,nasm_reg_flagse->type);
+
+            if (is_gpr && e->value == 1 && b == -1) {
+                /* It can be basereg */
+                b = e->type;
+            } else if (i == -1) {
+                /* Must be index register */
+                i = e->type;
+                s = e->value;
+            } else {
+                if (b == -1)
+                    nasm_nonfatal("invalid effective address: two index registers");
+                else if (!is_gpr)
+                    nasm_nonfatal("invalid effective address: impossible register");
+                else
+                    nasm_nonfatal("invalid effective address: too many registers");
+                return -1;
+            }
+        } else if (e->type == EXPR_UNKNOWN) {
+            op->opflags |= OPFLAG_UNKNOWN;
+        } else if (e->type == EXPR_SIMPLE) {
+            o += e->value;
+        } else if  (e->type == EXPR_WRT) {
+            op->wrt = e->value;
+        } else if (e->type >= EXPR_SEGBASE) {
+            if (e->value == 1) {
+                if (op->segment != NO_SEG) {
+                    nasm_nonfatal("invalid effective address: multiple base segments");
+                    return -1;
+                }
+                op->segment = e->type - EXPR_SEGBASE;
+            } else if (e->value == -1 &&
+                       e->type == location.segment + EXPR_SEGBASE &&
+                       !(op->opflags & OPFLAG_RELATIVE)) {
+                op->opflags |= OPFLAG_RELATIVE;
+            } else {
+                nasm_nonfatal("invalid effective address: impossible segment base multiplier");
+                return -1;
+            }
+        } else {
+            nasm_nonfatal("invalid effective address: bad subexpression type");
+            return -1;
+        }
+   }
+
+    op->basereg  = b;
+    op->indexreg = i;
+    op->scale    = s;
+    op->offset   = o;
+    return 0;
+}
+
+static void mref_set_optype(operand *op)
+{
+    int b = op->basereg;
+    int i = op->indexreg;
+    int s = op->scale;
+
+    /* It is memory, but it can match any r/m operand */
+    op->type |= MEMORY_ANY;
+
+    if (b == -1 && (i == -1 || s == 0)) {
+        int is_rel = globalbits == 64 &&
+            !(op->eaflags & EAF_ABS) &&
+            ((globalrel &&
+              !(op->eaflags & EAF_FSGS)) ||
+             (op->eaflags & EAF_REL));
+
+        op->type |= is_rel ? IP_REL : MEM_OFFS;
+    }
+
+    if (i != -1) {
+        opflags_t iclass = nasm_reg_flagsi;
+
+        if (is_class(XMMREG,iclass))
+            op->type |= XMEM;
+        else if (is_class(YMMREG,iclass))
+            op->type |= YMEM;
+        else if (is_class(ZMMREG,iclass))
+            op->type |= ZMEM;
+    }
+}
+
+/*
+ * Convert an expression vector returned from evaluate() into an
+ * extop structure.  Return zero on success.  Note that the eop
+ * already has dup and elem set, so we can't clear it here.
+ */
+static int value_to_extop(expr *vect, extop *eop, int32_t myseg)
+{
+    eop->type = EOT_DB_NUMBER;
+    eop->val.num.offset = 0;
+    eop->val.num.segment = eop->val.num.wrt = NO_SEG;
+    eop->val.num.relative = false;
+
+    for (; vect->type; vect++) {
+        if (!vect->value)       /* zero term, safe to ignore */
+            continue;
+
+        if (vect->type <= EXPR_REG_END) /* false if a register is present */
+            return -1;
+
+        if (vect->type == EXPR_UNKNOWN) /* something we can't resolve yet */
+            return 0;
+
+        if (vect->type == EXPR_SIMPLE) {
+            /* Simple number expression */
+            eop->val.num.offset += vect->value;
+            continue;
+        }
+        if (eop->val.num.wrt == NO_SEG && !eop->val.num.relative &&
+            vect->type == EXPR_WRT) {
+            /* WRT term */
+            eop->val.num.wrt = vect->value;
+            continue;
+        }
+
+        if (!eop->val.num.relative &&
+            vect->type == EXPR_SEGBASE + myseg && vect->value == -1) {
+            /* Expression of the form: foo - $ */
+            eop->val.num.relative = true;
+            continue;
+        }
+
+        if (eop->val.num.segment == NO_SEG &&
+            vect->type >= EXPR_SEGBASE && vect->value == 1) {
+            eop->val.num.segment = vect->type - EXPR_SEGBASE;
+            continue;
+        }
+
+        /* Otherwise, badness */
+        return -1;
+    }
+
+    /* We got to the end and it was all okay */
+    return 0;
+}
+
+/*
+ * Parse an extended expression, used by db et al. "elem" is the element
+ * size; initially comes from the specific opcode (e.g. db == 1) but
+ * can be overridden.
+ */
+static int parse_eops(extop **result, bool critical, int elem)
+{
+    extop *eop = NULL, *prev = NULL;
+    extop **tail = result;
+    int sign;
+    int i = tokval.t_type;
+    int oper_num = 0;
+    bool do_subexpr = false;
+
+    *tail = NULL;
+
+    /* End of string is obvious; ) ends a sub-expression list e.g. DUP */
+    for (i = tokval.t_type; i != TOKEN_EOS; i = stdscan(NULL, &tokval)) {
+        bool skip;
+        char endparen = ')';   /* Is a right paren the end of list? */
+
+        if (i == ')')
+            break;
+
+        if (!eop) {
+            nasm_new(eop);
+            eop->dup  = 1;
+            eop->elem = elem;
+            do_subexpr = false;
+        }
+        sign = +1;
+
+        if (i == TOKEN_QMARK) {
+            eop->type = EOT_DB_RESERVE;
+            skip = true;
+        } else if (do_subexpr && i == '(') {
+            extop *subexpr;
+
+            stdscan(NULL, &tokval); /* Skip paren */
+            if (parse_eops(&eop->val.subexpr, critical, eop->elem) < 0)
+                goto fail;
+
+            subexpr = eop->val.subexpr;
+            if (!subexpr) {
+                /* Subexpression is empty */
+                eop->type = EOT_NOTHING;
+            } else if (!subexpr->next) {
+                /*
+                 * Subexpression is a single element, flatten.
+                 * Note that if subexpr has an allocated buffer associated
+                 * with it, freeing it would free the buffer, too, so
+                 * we need to move subexpr up, not eop down.
+                 */
+                if (!subexpr->elem)
+                    subexpr->elem = eop->elem;
+                subexpr->dup *= eop->dup;
+                nasm_free(eop);
+                eop = subexpr;
+            } else {
+                eop->type = EOT_EXTOP;
+            }
+
+            /* We should have ended on a closing paren */
+            if (tokval.t_type != ')') {
+                char *tp = tokstr(&tokval);
+                nasm_nonfatal("expected `)' after subexpression, got %s", tp);
+                nasm_free(tp);
+                goto fail;
+            }
+            endparen = 0;       /* This time the paren is not the end */
+            skip = true;
+        } else if (i == '%') {
+            /* %(expression_list) */
+            do_subexpr = true;
+            continue;
+        } else if (i == TOKEN_SIZE) {
+            /* Element size override */
+            eop->elem = tokval.t_inttwo;
+            do_subexpr = true;
+            continue;
+        } else if (i == TOKEN_STR && end_expression_next()) {
+            /*
+             * end_expression_next() is to distinguish this from
+             * a string used as part of an expression...
+             */
+            eop->type            = EOT_DB_STRING;
+            eop->val.string.data = tokval.t_charptr;
+            eop->val.string.len  = tokval.t_inttwo;
+            skip = true;
+        } else if (i == TOKEN_STRFUNC) {
+            bool parens = false;
+            const char *funcname = tokval.t_charptr;
+            enum strfunc func = tokval.t_integer;
+
+            i = stdscan(NULL, &tokval);
+            if (i == '(') {
+                parens = true;
+                endparen = 0;
+                i = stdscan(NULL, &tokval);
+            }
+            if (i != TOKEN_STR) {
+                char *tp = tokstr(&tokval);
+                nasm_nonfatal("%s must be followed by a string constant, got %s",
+                              funcname, tp);
+                nasm_free(tp);
+                eop->type = EOT_NOTHING;
+            } else {
+                eop->type = EOT_DB_STRING_FREE;
+                eop->val.string.len =
+                    string_transform(tokval.t_charptr, tokval.t_inttwo,
+                                     &eop->val.string.data, func);
+                if (eop->val.string.len == (size_t)-1) {
+                    nasm_nonfatal("invalid input string to %s", funcname);
+                    eop->type = EOT_NOTHING;
+                }
+            }
+            if (parens && i && i != ')') {
+                i = stdscan(NULL, &tokval);
+                if (i != ')')
+                    nasm_nonfatal("unterminated %s function", funcname);
+            }
+            skip = i != ',';
+        } else if (i == '-' || i == '+') {
+            char *save = stdscan_get();
+            struct tokenval tmptok;
+
+            sign = (i == '-') ? -1 : 1;
+            if (stdscan(NULL, &tmptok) != TOKEN_FLOAT) {
+                stdscan_set(save);
+                goto is_expression;
+            } else {
+                tokval = tmptok;
+                goto is_float;
+            }
+        } else if (i == TOKEN_FLOAT) {
+            enum floatize fmt;
+        is_float:
+            eop->type = EOT_DB_FLOAT;
+
+            fmt = float_deffmt(eop->elem);
+            if (fmt == FLOAT_ERR) {
+                nasm_nonfatal("no %d-bit floating-point format supported",
+                              eop->elem << 3);
+                eop->val.string.len = 0;
+            } else if (eop->elem < 1) {
+                nasm_nonfatal("floating-point constant"
+                              " encountered in unknown instruction");
+                /*
+                 * fix suggested by Pedro Gimeno... original line was:
+                 * eop->type = EOT_NOTHING;
+                 */
+                eop->val.string.len = 0;
+            } else {
+                eop->val.string.len = eop->elem;
+
+                eop = nasm_realloc(eop, sizeof(extop) + eop->val.string.len);
+                eop->val.string.data = (char *)eop + sizeof(extop);
+                if (!float_const(tokval.t_charptr, sign,
+                                 (uint8_t *)eop->val.string.data, fmt))
+                    eop->val.string.len = 0;
+            }
+            if (!eop->val.string.len)
+                eop->type = EOT_NOTHING;
+            skip = true;
+        } else {
+            /* anything else, assume it is an expression */
+            expr *value;
+
+        is_expression:
+            value = evaluate(stdscan, NULL, &tokval, NULL,
+                             critical, NULL);
+            i = tokval.t_type;
+            if (!value)                  /* Error in evaluator */
+                goto fail;
+            if (tokval.t_flag & TFLAG_DUP) {
+                /* Expression followed by DUP */
+                if (!is_simple(value)) {
+                    nasm_nonfatal("non-constant argument supplied to DUP");
+                    goto fail;
+                } else if (value->value < 0) {
+                    nasm_nonfatal("negative argument supplied to DUP");
+                    goto fail;
+                }
+                eop->dup *= (size_t)value->value;
+                do_subexpr = true;
+                continue;
+            }
+            if (value_to_extop(value, eop, location.segment)) {
+                nasm_nonfatal("expression is not simple or relocatable");
+            }
+            skip = false;
+        }
+
+        if (eop->dup == 0 || eop->type == EOT_NOTHING) {
+            nasm_free(eop);
+        } else if (eop->type == EOT_DB_RESERVE &&
+                   prev && prev->type == EOT_DB_RESERVE &&
+                   prev->elem == eop->elem) {
+            /* Coalesce multiple EOT_DB_RESERVE */
+            prev->dup += eop->dup;
+            nasm_free(eop);
+        } else {
+            /* Add this eop to the end of the chain */
+            prev = eop;
+            *tail = eop;
+            tail = &eop->next;
+        }
+
+        oper_num++;
+        eop = NULL;             /* Done with this operand */
+
+        if (skip) {
+            /* Consume the (last) token if that didn't happen yet */
+            i = stdscan(NULL, &tokval);
+        }
+
+        /*
+         * We're about to call stdscan(), which will eat the
+         * comma that we're currently sitting on between
+         * arguments. However, we'd better check first that it
+         * _is_ a comma.
+         */
+        if (i == TOKEN_EOS || i == endparen)	/* Already at end? */
+            break;
+        if (i != ',') {
+            char *tp = tokstr(&tokval);
+            nasm_nonfatal("comma expected after operand, got %s", tp);
+            nasm_free(tp);
+            goto fail;
+        }
+    }
+
+    return oper_num;
+
+fail:
+    if (eop)
+        nasm_free(eop);
+    return -1;
+}
+
+insn *parse_line(char *buffer, insn *result)
+{
+    bool insn_is_label = false;
+    struct eval_hints hints;
+    int opnum;
+    bool critical;
+    bool first;
+    bool recover;
+    bool far_jmp_ok;
+    int i;
+
+    nasm_static_assert(P_none == 0);
+
+restart_parse:
+    first               = true;
+    result->forw_ref    = false;
+
+    stdscan_reset();
+    stdscan_set(buffer);
+    i = stdscan(NULL, &tokval);
+
+    memset(result->prefixes, P_none, sizeof(result->prefixes));
+    result->times       = 1;    /* No TIMES either yet */
+    result->label       = NULL; /* Assume no label */
+    result->eops        = NULL; /* must do this, whatever happens */
+    result->operands    = 0;    /* must initialize this */
+    result->evex_rm     = 0;    /* Ensure EVEX rounding mode is reset */
+    result->evex_brerop = -1;   /* Reset EVEX broadcasting/ER op position */
+
+    /* Ignore blank lines */
+    if (i == TOKEN_EOS)
+        goto fail;
+
+    if (i != TOKEN_ID       &&
+        i != TOKEN_INSN     &&
+        i != TOKEN_PREFIX   &&
+        (i != TOKEN_REG || !IS_SREG(tokval.t_integer))) {
+        nasm_nonfatal("label or instruction expected at start of line");
+        goto fail;
+    }
+
+    if (i == TOKEN_ID || (insn_is_label && i == TOKEN_INSN)) {
+        /* there's a label here */
+        first = false;
+        result->label = tokval.t_charptr;
+        i = stdscan(NULL, &tokval);
+        if (i == ':') {         /* skip over the optional colon */
+            i = stdscan(NULL, &tokval);
+        } else if (i == 0) {
+            /*!
+             *!label-orphan on labels alone on lines without trailing \c{:}
+             *!=orphan-labels
+             *!  warns about source lines which contain no instruction but define
+             *!  a label without a trailing colon. This is most likely indicative
+             *!  of a typo, but is technically correct NASM syntax (see \k{syntax}.)
+             */
+            nasm_warn(WARN_LABEL_ORPHAN ,
+                       "label alone on a line without a colon might be in error");
+        }
+        if (i != TOKEN_INSN || tokval.t_integer != I_EQU) {
+            /*
+             * FIXME: location.segment could be NO_SEG, in which case
+             * it is possible we should be passing 'absolute.segment'. Look into this.
+             * Work out whether that is *really* what we should be doing.
+             * Generally fix things. I think this is right as it is, but
+             * am still not certain.
+             */
+            define_label(result->label,
+                         in_absolute ? absolute.segment : location.segment,
+                         location.offset, true);
+        }
+    }
+
+    /* Just a label here */
+    if (i == TOKEN_EOS)
+        goto fail;
+
+    while (i) {
+        int slot = PPS_SEG;
+
+        if (i == TOKEN_PREFIX) {
+            slot = tokval.t_inttwo;
+
+            if (slot == PPS_TIMES) {
+                /* TIMES is a very special prefix */
+                expr *value;
+
+                i = stdscan(NULL, &tokval);
+                value = evaluate(stdscan, NULL, &tokval, NULL,
+                                 pass_stable(), NULL);
+                i = tokval.t_type;
+                if (!value)                  /* Error in evaluator */
+                    goto fail;
+                if (!is_simple(value)) {
+                    nasm_nonfatal("non-constant argument supplied to TIMES");
+                    result->times = 1;
+                } else {
+                    result->times = value->value;
+                    if (value->value < 0) {
+                        nasm_nonfatalf(ERR_PASS2, "TIMES value %"PRId64" is negative", value->value);
+                        result->times = 0;
+                    }
+                }
+                first = false;
+                continue;
+            }
+        } else if (i == TOKEN_REG && IS_SREG(tokval.t_integer)) {
+            slot = PPS_SEG;
+            first = false;
+        } else {
+            break;              /* Not a prefix */
+        }
+
+        if (result->prefixesslot) {
+            if (result->prefixesslot == tokval.t_integer)
+                nasm_warn(WARN_OTHER, "instruction has redundant prefixes");
+            else
+                nasm_nonfatal("instruction has conflicting prefixes");
+        }
+        result->prefixesslot = tokval.t_integer;
+        i = stdscan(NULL, &tokval);
+        first = false;
+    }
+
+    if (i != TOKEN_INSN) {
+        int j;
+        enum prefixes pfx;
+
+        for (j = 0; j < MAXPREFIX; j++) {
+            if ((pfx = result->prefixesj) != P_none)
+                break;
+        }
+
+        if (i == 0 && pfx != P_none) {
+            /*
+             * Instruction prefixes are present, but no actual
+             * instruction. This is allowed: at this point we
+             * invent a notional instruction of RESB 0.
+             */
+            result->opcode          = I_RESB;
+            result->operands        = 1;
+            nasm_zero(result->oprs);
+            result->oprs0.type    = IMMEDIATE;
+            result->oprs0.offset  = 0L;
+            result->oprs0.segment = result->oprs0.wrt = NO_SEG;
+            return result;
+        } else {
+            nasm_nonfatal("parser: instruction expected");
+            goto fail;
+        }
+    }
+
+    result->opcode = tokval.t_integer;
+
+    /*
+     * INCBIN cannot be satisfied with incorrectly
+     * evaluated operands, since the correct values _must_ be known
+     * on the first pass. Hence, even in pass one, we set the
+     * `critical' flag on calling evaluate(), so that it will bomb
+     * out on undefined symbols.
+     */
+    critical = pass_final() || (result->opcode == I_INCBIN);
+
+    if (opcode_is_db(result->opcode) || result->opcode == I_INCBIN) {
+        int oper_num;
+
+        i = stdscan(NULL, &tokval);
+
+        if (first && i == ':') {
+            /* Really a label */
+            insn_is_label = true;
+            goto restart_parse;
+        }
+        first = false;
+        oper_num = parse_eops(&result->eops, critical, db_bytes(result->opcode));
+        if (oper_num < 0)
+            goto fail;
+
+        if (result->opcode == I_INCBIN) {
+            /*
+             * Correct syntax for INCBIN is that there should be
+             * one string operand, followed by one or two numeric
+             * operands.
+             */
+            if (!result->eops || result->eops->type != EOT_DB_STRING)
+                nasm_nonfatal("`incbin' expects a file name");
+            else if (result->eops->next &&
+                     result->eops->next->type != EOT_DB_NUMBER)
+                nasm_nonfatal("`incbin': second parameter is"
+                              " non-numeric");
+            else if (result->eops->next && result->eops->next->next &&
+                     result->eops->next->next->type != EOT_DB_NUMBER)
+                nasm_nonfatal("`incbin': third parameter is"
+                              " non-numeric");
+            else if (result->eops->next && result->eops->next->next &&
+                     result->eops->next->next->next)
+                nasm_nonfatal("`incbin': more than three parameters");
+            else
+                return result;
+            /*
+             * If we reach here, one of the above errors happened.
+             * Throw the instruction away.
+             */
+            goto fail;
+        } else {
+            /* DB et al */
+            result->operands = oper_num;
+            if (oper_num == 0)
+                /*!
+                 *!db-empty on no operand for data declaration
+                 *!  warns about a \c{D}\e{x} declaration
+                 *!  with no operands, producing no output.
+                 *!  This is permitted, but often indicative of an error.
+                 *!  See \k{db}.
+                 */
+                nasm_warn(WARN_DB_EMPTY, "no operand for data declaration");
+        }
+        return result;
+    }
+
+    /*
+     * Now we begin to parse the operands. There may be up to four
+     * of these, separated by commas, and terminated by a zero token.
+     */
+    far_jmp_ok = result->opcode == I_JMP || result->opcode == I_CALL;
+
+    for (opnum = 0; opnum < MAX_OPERANDS; opnum++) {
+        operand *op = &result->oprsopnum;
+        expr *value;            /* used most of the time */
+        bool mref = false;      /* is this going to be a memory ref? */
+        int bracket = 0;        /* is it a  mref, or a "naked" mref? */
+        bool mib;               /* compound (mib) mref? */
+        int setsize = 0;
+        decoflags_t brace_flags = 0;    /* flags for decorators in braces */
+
+        init_operand(op);
+
+        i = stdscan(NULL, &tokval);
+        if (i == TOKEN_EOS)
+            break;              /* end of operands: get out of here */
+        else if (first && i == ':') {
+            insn_is_label = true;
+            goto restart_parse;
+        }
+        first = false;
+        op->type = 0; /* so far, no override */
+        /* size specifiers */
+        while (i == TOKEN_SPECIAL || i == TOKEN_SIZE) {
+            switch (tokval.t_integer) {
+            case S_BYTE:
+                if (!setsize)   /* we want to use only the first */
+                    op->type |= BITS8;
+                setsize = 1;
+                break;
+            case S_WORD:
+                if (!setsize)
+                    op->type |= BITS16;
+                setsize = 1;
+                break;
+            case S_DWORD:
+            case S_LONG:
+                if (!setsize)
+                    op->type |= BITS32;
+                setsize = 1;
+                break;
+            case S_QWORD:
+                if (!setsize)
+                    op->type |= BITS64;
+                setsize = 1;
+                break;
+            case S_TWORD:
+                if (!setsize)
+                    op->type |= BITS80;
+                setsize = 1;
+                break;
+            case S_OWORD:
+                if (!setsize)
+                    op->type |= BITS128;
+                setsize = 1;
+                break;
+            case S_YWORD:
+                if (!setsize)
+                    op->type |= BITS256;
+                setsize = 1;
+                break;
+            case S_ZWORD:
+                if (!setsize)
+                    op->type |= BITS512;
+                setsize = 1;
+                break;
+            case S_TO:
+                op->type |= TO;
+                break;
+            case S_STRICT:
+                op->type |= STRICT;
+                break;
+            case S_FAR:
+                op->type |= FAR;
+                break;
+            case S_NEAR:
+                op->type |= NEAR;
+                break;
+            case S_SHORT:
+                op->type |= SHORT;
+                break;
+            default:
+                nasm_nonfatal("invalid operand size specification");
+            }
+            i = stdscan(NULL, &tokval);
+        }
+
+        if (i == '' || i == TOKEN_MASM_PTR || i == '&') {
+            /* memory reference */
+            mref = true;
+            bracket += (i == '');
+            i = stdscan(NULL, &tokval);
+        }
+
+    mref_more:
+        if (mref) {
+            bool done = false;
+            bool nofw = false;
+
+            while (!done) {
+                switch (i) {
+                case TOKEN_SPECIAL:
+                case TOKEN_SIZE:
+                case TOKEN_PREFIX:
+                    process_size_override(result, op);
+                    break;
+
+                case '':
+                    bracket++;
+                    break;
+
+                case ',':
+                    tokval.t_type = TOKEN_NUM;
+                    tokval.t_integer = 0;
+                    stdscan_set(stdscan_get() - 1);     /* rewind the comma */
+                    done = nofw = true;
+                    break;
+
+                case TOKEN_MASM_FLAT:
+                    i = stdscan(NULL, &tokval);
+                    if (i != ':') {
+                        nasm_nonfatal("unknown use of FLAT in MASM emulation");
+                        nofw = true;
+                    }
+                    done = true;
+                    break;
+
+                default:
+                    done = nofw = true;
+                    break;
+                }
+
+                if (!nofw)
+                    i = stdscan(NULL, &tokval);
+            }
+        }
+
+        value = evaluate(stdscan, NULL, &tokval,
+                         &op->opflags, critical, &hints);
+        i = tokval.t_type;
+        if (op->opflags & OPFLAG_FORWARD) {
+            result->forw_ref = true;
+        }
+        if (!value)                  /* Error in evaluator */
+            goto fail;
+
+        if (i == '' && !bracket) {
+            /* displacementregs syntax */
+            mref = true;
+            parse_mref(op, value); /* Process what we have so far */
+            goto mref_more;
+        }
+
+        if (i == ':' && (mref || !far_jmp_ok)) {
+            /* segment override? */
+            mref = true;
+
+            /*
+             * Process the segment override.
+             */
+            if (!IS_SREG(value->type) || value->value != 1 ||
+                value1.type != 0) {
+                nasm_nonfatal("invalid segment override");
+            } else if (result->prefixesPPS_SEG) {
+                nasm_nonfatal("instruction has conflicting segment overrides");
+            } else {
+                result->prefixesPPS_SEG = value->type;
+                if (IS_FSGS(value->type))
+                    op->eaflags |= EAF_FSGS;
+            }
+
+            i = stdscan(NULL, &tokval); /* then skip the colon */
+            goto mref_more;
+        }
+
+        mib = false;
+        if (mref && bracket && i == ',') {
+            /* seg:base+offset,index*scale syntax (mib) */
+            operand o2;         /* Index operand */
+
+            if (parse_mref(op, value))
+                goto fail;
+
+            i = stdscan(NULL, &tokval); /* Eat comma */
+            value = evaluate(stdscan, NULL, &tokval, &op->opflags,
+                             critical, &hints);
+            i = tokval.t_type;
+            if (!value)
+                goto fail;
+
+            init_operand(&o2);
+            if (parse_mref(&o2, value))
+                goto fail;
+
+            if (o2.basereg != -1 && o2.indexreg == -1) {
+                o2.indexreg = o2.basereg;
+                o2.scale = 1;
+                o2.basereg = -1;
+            }
+
+            if (op->indexreg != -1 || o2.basereg != -1 || o2.offset != 0 ||
+                o2.segment != NO_SEG || o2.wrt != NO_SEG) {
+                nasm_nonfatal("invalid mib expression");
+                goto fail;
+            }
+
+            op->indexreg = o2.indexreg;
+            op->scale = o2.scale;
+
+            if (op->basereg != -1) {
+                op->hintbase = op->basereg;
+                op->hinttype = EAH_MAKEBASE;
+            } else if (op->indexreg != -1) {
+                op->hintbase = op->indexreg;
+                op->hinttype = EAH_NOTBASE;
+            } else {
+                op->hintbase = -1;
+                op->hinttype = EAH_NOHINT;
+            }
+
+            mib = true;
+        }
+
+        recover = false;
+        if (mref) {
+            if (bracket == 1) {
+                if (i == '') {
+                    bracket--;
+                    i = stdscan(NULL, &tokval);
+                } else {
+                    nasm_nonfatal("expecting  at end of memory operand");
+                    recover = true;
+                }
+            } else if (bracket == 0) {
+                /* Do nothing */
+            } else if (bracket > 0) {
+                nasm_nonfatal("excess brackets in memory operand");
+                recover = true;
+            } else if (bracket < 0) {
+                nasm_nonfatal("unmatched  in memory operand");
+                recover = true;
+            }
+
+            if (i == TOKEN_DECORATOR || i == TOKEN_OPMASK) {
+                /* parse opmask (and zeroing) after an operand */
+                recover = parse_braces(&brace_flags);
+                i = tokval.t_type;
+            }
+            if (!recover && i != 0 && i != ',') {
+                nasm_nonfatal("comma, decorator or end of line expected, got %d", i);
+                recover = true;
+            }
+        } else {                /* immediate operand */
+            if (i != 0 && i != ',' && i != ':' &&
+                i != TOKEN_DECORATOR && i != TOKEN_OPMASK) {
+                nasm_nonfatal("comma, colon, decorator or end of "
+                              "line expected after operand");
+                recover = true;
+            } else if (i == ':') {
+                op->type |= COLON;
+            } else if (i == TOKEN_DECORATOR || i == TOKEN_OPMASK) {
+                /* parse opmask (and zeroing) after an operand */
+                recover = parse_braces(&brace_flags);
+            }
+        }
+        if (recover) {
+            do {                /* error recovery */
+                i = stdscan(NULL, &tokval);
+            } while (i != 0 && i != ',');
+        }
+
+        /*
+         * now convert the exprs returned from evaluate()
+         * into operand descriptions...
+         */
+        op->decoflags |= brace_flags;
+
+        if (mref) {             /* it's a memory reference */
+            /* A mib reference was fully parsed already */
+            if (!mib) {
+                if (parse_mref(op, value))
+                    goto fail;
+                op->hintbase = hints.base;
+                op->hinttype = hints.type;
+            }
+            mref_set_optype(op);
+        } else if ((op->type & FAR) && !far_jmp_ok) {
+                nasm_nonfatal("invalid use of FAR operand specifier");
+                recover = true;
+        } else {                /* it's not a memory reference */
+            if (is_just_unknown(value)) {       /* it's immediate but unknown */
+                op->type      |= IMMEDIATE;
+                op->opflags   |= OPFLAG_UNKNOWN;
+                op->offset    = 0;        /* don't care */
+                op->segment   = NO_SEG;   /* don't care again */
+                op->wrt       = NO_SEG;   /* still don't care */
+
+                if(optimizing.level >= 0 && !(op->type & STRICT)) {
+                    /* Be optimistic */
+                    op->type |=
+                        UNITY | SBYTEWORD | SBYTEDWORD | UDWORD | SDWORD;
+                }
+            } else if (is_reloc(value)) {       /* it's immediate */
+                uint64_t n = reloc_value(value);
+
+                op->type      |= IMMEDIATE;
+                op->offset    = n;
+                op->segment   = reloc_seg(value);
+                op->wrt       = reloc_wrt(value);
+                op->opflags   |= is_self_relative(value) ? OPFLAG_RELATIVE : 0;
+
+                if (is_simple(value)) {
+                    if (n == 1)
+                        op->type |= UNITY;
+                    if (optimizing.level >= 0 && !(op->type & STRICT)) {
+                        if ((uint32_t) (n + 128) <= 255)
+                            op->type |= SBYTEDWORD;
+                        if ((uint16_t) (n + 128) <= 255)
+                            op->type |= SBYTEWORD;
+                        if (n <= UINT64_C(0xFFFFFFFF))
+                            op->type |= UDWORD;
+                        if (n + UINT64_C(0x80000000) <= UINT64_C(0xFFFFFFFF))
+                            op->type |= SDWORD;
+                    }
+                }
+            } else if (value->type == EXPR_RDSAE) {
+                /*
+                 * it's not an operand but a rounding or SAE decorator.
+                 * put the decorator information in the (opflag_t) type field
+                 * of previous operand.
+                 */
+                opnum--; op--;
+                switch (value->value) {
+                case BRC_RN:
+                case BRC_RU:
+                case BRC_RD:
+                case BRC_RZ:
+                case BRC_SAE:
+                    op->decoflags |= (value->value == BRC_SAE ? SAE : ER);
+                    result->evex_rm = value->value;
+                    break;
+                default:
+                    nasm_nonfatal("invalid decorator");
+                    break;
+                }
+            } else {            /* it's a register */
+                opflags_t rs;
+                uint64_t regset_size = 0;
+
+                if (value->type >= EXPR_SIMPLE || value->value != 1) {
+                    nasm_nonfatal("invalid operand type");
+                    goto fail;
+                }
+
+                /*
+                 * We do not allow any kind of expression, except for
+                 * reg+value in which case it is a register set.
+                 */
+                for (i = 1; valuei.type; i++) {
+                    if (!valuei.value)
+                        continue;
+
+                    switch (valuei.type) {
+                    case EXPR_SIMPLE:
+                        if (!regset_size) {
+                            regset_size = valuei.value + 1;
+                            break;
+                        }
+                        /* fallthrough */
+                    default:
+                        nasm_nonfatal("invalid operand type");
+                        goto fail;
+                    }
+                }
+
+                if ((regset_size & (regset_size - 1)) ||
+                    regset_size >= (UINT64_C(1) << REGSET_BITS)) {
+                    nasm_nonfatalf(ERR_PASS2, "invalid register set size");
+                    regset_size = 0;
+                }
+
+                /* clear overrides, except TO which applies to FPU regs */
+                if (op->type & ~TO) {
+                    /*
+                     * we want to produce a warning iff the specified size
+                     * is different from the register size
+                     */
+                    rs = op->type & SIZE_MASK;
+                } else {
+                    rs = 0;
+                }
+
+                /*
+                 * Make sure we're not out of nasm_reg_flags, still
+                 * probably this should be fixed when we're defining
+                 * the label.
+                 *
+                 * An easy trigger is
+                 *
+                 *      e equ 0x80000000:0
+                 *      pshufw word e-0
+                 *
+                 */
+                if (value->type < EXPR_REG_START ||
+                    value->type > EXPR_REG_END) {
+                        nasm_nonfatal("invalid operand type");
+                        goto fail;
+                }
+
+                op->type      &= TO;
+                op->type      |= REGISTER;
+                op->type      |= nasm_reg_flagsvalue->type;
+                op->type      |= (regset_size >> 1) << REGSET_SHIFT;
+                op->decoflags |= brace_flags;
+                op->basereg   = value->type;
+
+                if (rs) {
+                    opflags_t opsize = nasm_reg_flagsvalue->type & SIZE_MASK;
+                    if (!opsize) {
+                        op->type |= rs; /* For non-size-specific registers, permit size override */
+                    } else if (opsize != rs) {
+                        /*!
+                         *!regsize on register size specification ignored
+                         *!
+                         *!  warns about a register with implicit size (such as \c{EAX}, which is always 32 bits)
+                         *!  been given an explicit size specification which is inconsistent with the size
+                         *!  of the named register, e.g. \c{WORD EAX}. \c{DWORD EAX} or \c{WORD AX} are
+                         *!  permitted, and do not trigger this warning. Some registers which \e{do not} imply
+                         *!  a specific size, such as \c{K0}, may need this specification unless the instruction
+                         *!  itself implies the instruction size:
+                         *!-
+                         *!  \c      KMOVW K0,foo          ; Permitted, KMOVW implies 16 bits
+                         *!  \c      KMOV  WORD K0,foo     ; Permitted, WORD K0 specifies instruction size
+                         *!  \c      KMOV  K0,WORD foo     ; Permitted, WORD foo specifies instruction size
+                         *!  \c      KMOV  K0,foo          ; Not permitted, instruction size ambiguous
+                         */
+                        nasm_warn(WARN_REGSIZE, "invalid register size specification ignored");
+                    }
+                }
+            }
+        }
+
+        /* remember the position of operand having broadcasting/ER mode */
+        if (op->decoflags & (BRDCAST_MASK | ER | SAE))
+            result->evex_brerop = opnum;
+    }
+
+    result->operands = opnum; /* set operand count */
+
+    /* clear remaining operands */
+    while (opnum < MAX_OPERANDS)
+        result->oprsopnum++.type = 0;
+
+    return result;
+
+fail:
+    result->opcode = I_none;
+    return result;
+}
+
+static int end_expression_next(void)
+{
+    struct tokenval tv;
+    char *p;
+    int i;
+
+    p = stdscan_get();
+    i = stdscan(NULL, &tv);
+    stdscan_set(p);
+
+    return (i == ',' || i == ';' || i == ')' || !i);
+}
+
+static void free_eops(extop *e)
+{
+    extop *next;
+
+    while (e) {
+        next = e->next;
+        switch (e->type) {
+        case EOT_EXTOP:
+            free_eops(e->val.subexpr);
+            break;
+
+        case EOT_DB_STRING_FREE:
+            nasm_free(e->val.string.data);
+            break;
+
+        default:
+            break;
+        }
+
+        nasm_free(e);
+        e = next;
+    }
+}
+
+void cleanup_insn(insn * i)
+{
+    free_eops(i->eops);
+}

_service:tar_scm:nasm-2.16.03.tar.xz/asm/parser.h Added

@@ -0,0 +1,45 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2009 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/* 
+ * parser.h   header file for the parser module of the Netwide
+ *            Assembler
+ */
+
+#ifndef NASM_PARSER_H
+#define NASM_PARSER_H
+
+insn *parse_line(char *buffer, insn *result);
+void cleanup_insn(insn *instruction);
+
+#endif

_service:tar_scm:nasm-2.16.03.tar.xz/asm/pptok.c Added

@@ -0,0 +1,848 @@
+/* Automatically generated from ./asm/pptok.dat by ./asm/pptok.pl */
+/* Do not edit */
+
+#include "compiler.h"
+#include "nctype.h"
+#include "nasmlib.h"
+#include "hashtbl.h"
+#include "preproc.h"
+
+const char * const pp_directives120 = {
+    "%if",
+    "%ifctx",
+    "%ifdef",
+    "%ifdefalias",
+    "%ifdifi",
+    "%ifempty",
+    "%ifenv",
+    "%ifid",
+    "%ifidn",
+    "%ifidni",
+    "%ifmacro",
+    "%ifnum",
+    "%ifstr",
+    "%iftoken",
+    "%ifusable",
+    "%ifusing",
+    "%ifn",
+    "%ifnctx",
+    "%ifndef",
+    "%ifndefalias",
+    "%ifndifi",
+    "%ifnempty",
+    "%ifnenv",
+    "%ifnid",
+    "%ifnidn",
+    "%ifnidni",
+    "%ifnmacro",
+    "%ifnnum",
+    "%ifnstr",
+    "%ifntoken",
+    "%ifnusable",
+    "%ifnusing",
+    "%elif",
+    "%elifctx",
+    "%elifdef",
+    "%elifdefalias",
+    "%elifdifi",
+    "%elifempty",
+    "%elifenv",
+    "%elifid",
+    "%elifidn",
+    "%elifidni",
+    "%elifmacro",
+    "%elifnum",
+    "%elifstr",
+    "%eliftoken",
+    "%elifusable",
+    "%elifusing",
+    "%elifn",
+    "%elifnctx",
+    "%elifndef",
+    "%elifndefalias",
+    "%elifndifi",
+    "%elifnempty",
+    "%elifnenv",
+    "%elifnid",
+    "%elifnidn",
+    "%elifnidni",
+    "%elifnmacro",
+    "%elifnnum",
+    "%elifnstr",
+    "%elifntoken",
+    "%elifnusable",
+    "%elifnusing",
+    "%aliases",
+    "%arg",
+    "%clear",
+    "%depend",
+    "%else",
+    "%endif",
+    "%endm",
+    "%endmacro",
+    "%endrep",
+    "%error",
+    "%exitmacro",
+    "%exitrep",
+    "%fatal",
+    "%include",
+    "%line",
+    "%local",
+    "%null",
+    "%pop",
+    "%pragma",
+    "%push",
+    "%rep",
+    "%repl",
+    "%require",
+    "%rotate",
+    "%stacksize",
+    "%undef",
+    "%undefalias",
+    "%use",
+    "%warning",
+    NULL,
+    "%assign",
+    "%iassign",
+    "%defalias",
+    "%idefalias",
+    "%define",
+    "%idefine",
+    "%defstr",
+    "%idefstr",
+    "%deftok",
+    "%ideftok",
+    "%macro",
+    "%imacro",
+    "%pathsearch",
+    "%ipathsearch",
+    "%rmacro",
+    "%irmacro",
+    "%strcat",
+    "%istrcat",
+    "%strlen",
+    "%istrlen",
+    "%substr",
+    "%isubstr",
+    "%xdefine",
+    "%ixdefine",
+    "%unmacro",
+    "%unimacro",
+};
+const uint8_t pp_directives_len120 = {
+    3,
+    6,
+    6,
+    11,
+    7,
+    8,
+    6,
+    5,
+    6,
+    7,
+    8,
+    6,
+    6,
+    8,
+    9,
+    8,
+    4,
+    7,
+    7,
+    12,
+    8,
+    9,
+    7,
+    6,
+    7,
+    8,
+    9,
+    7,
+    7,
+    9,
+    10,
+    9,
+    5,
+    8,
+    8,
+    13,
+    9,
+    10,
+    8,
+    7,
+    8,
+    9,
+    10,
+    8,
+    8,
+    10,
+    11,
+    10,
+    6,
+    9,
+    9,
+    14,
+    10,
+    11,
+    9,
+    8,
+    9,
+    10,
+    11,
+    9,
+    9,
+    11,
+    12,
+    11,
+    8,
+    4,
+    6,
+    7,
+    5,
+    6,
+    5,
+    9,
+    7,
+    6,
+    10,
+    8,
+    6,
+    8,
+    5,
+    6,
+    5,
+    4,
+    7,
+    5,
+    4,
+    5,
+    8,
+    7,
+    10,
+    6,
+    11,
+    4,
+    8,
+    9,
+    7,
+    8,
+    9,
+    10,
+    7,
+    8,
+    7,
+    8,
+    7,
+    8,
+    6,
+    7,
+    11,
+    12,
+    7,
+    8,
+    7,
+    8,
+    7,
+    8,
+    7,
+    8,
+    8,
+    9,
+    8,
+    9,
+};
+
+#define INVALID_HASH_ENTRY (65535/3)
+
+
+/* Primary preprocessor token hash */
+
+enum preproc_token pp_token_hash(const char *token)
+{
+    static const int16_t hashdata512 = {
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        107,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        74,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        67,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        65,
+        -66,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        94,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        31,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        38,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        78,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        54,
+        70,
+        INVALID_HASH_ENTRY,
+        12,
+        21,
+        0,
+        0,
+        3,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        80,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        49,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -77,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        56,
+        INVALID_HASH_ENTRY,
+        47,
+        INVALID_HASH_ENTRY,
+        37,
+        0,
+        INVALID_HASH_ENTRY,
+        37,
+        0,
+        INVALID_HASH_ENTRY,
+        -20,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        7,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        116,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -32,
+        39,
+        INVALID_HASH_ENTRY,
+        72,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        179,
+        -72,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        26,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -40,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        25,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        98,
+        0,
+        71,
+        INVALID_HASH_ENTRY,
+        53,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        76,
+        INVALID_HASH_ENTRY,
+        63,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        20,
+        INVALID_HASH_ENTRY,
+        99,
+        INVALID_HASH_ENTRY,
+        14,
+        0,
+        -6,
+        91,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        164,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        37,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        59,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        117,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        19,
+        INVALID_HASH_ENTRY,
+        16,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        105,
+        INVALID_HASH_ENTRY,
+        18,
+        -47,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        104,
+        8,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        109,
+        INVALID_HASH_ENTRY,
+        4,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        100,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -53,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        85,
+        INVALID_HASH_ENTRY,
+        87,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        32,
+        0,
+        60,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        29,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -12,
+        104,
+        63,
+        INVALID_HASH_ENTRY,
+        113,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        28,
+        112,
+        59,
+        INVALID_HASH_ENTRY,
+        -5,
+        62,
+        INVALID_HASH_ENTRY,
+        50,
+        24,
+        44,
+        INVALID_HASH_ENTRY,
+        46,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        90,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        51,
+        -14,
+        83,
+        58,
+        INVALID_HASH_ENTRY,
+        40,
+        INVALID_HASH_ENTRY,
+        97,
+        0,
+        INVALID_HASH_ENTRY,
+        103,
+        22,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        69,
+        INVALID_HASH_ENTRY,
+        -61,
+        INVALID_HASH_ENTRY,
+        79,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        33,
+        INVALID_HASH_ENTRY,
+        52,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        45,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        87,
+        17,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        111,
+        -97,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        108,
+        43,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        86,
+        118,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -23,
+        66,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        89,
+        INVALID_HASH_ENTRY,
+        69,
+        INVALID_HASH_ENTRY,
+        41,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        75,
+        15,
+        -90,
+        5,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        9,
+        INVALID_HASH_ENTRY,
+        75,
+        INVALID_HASH_ENTRY,
+        48,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        68,
+        -9,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        11,
+        -31,
+        INVALID_HASH_ENTRY,
+        73,
+        INVALID_HASH_ENTRY,
+        119,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        110,
+        INVALID_HASH_ENTRY,
+        92,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+    };
+    uint32_t k1, k2;
+    uint64_t crc;
+    uint16_t ix;
+
+    crc = crc64i(UINT64_C(0x076259c3e291c26c), token);
+    k1 = ((uint32_t)crc & 0x1fe) + 0;
+    k2 = ((uint32_t)(crc >> 32) & 0x1fe) + 1;
+
+    ix = hashdatak1 + hashdatak2;
+    if (ix >= 120)
+        return PP_invalid;
+
+    if (!pp_directivesix || nasm_stricmp(pp_directivesix, token))
+        return PP_invalid;
+
+    return ix;
+}
+
+
+/* TASM compatibility preprocessor token hash */
+enum preproc_token pp_tasm_token_hash(const char *token)
+{
+    static const int16_t hashdata32 = {
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        69,
+        0,
+        83,
+        32,
+        2,
+        0,
+        0,
+        77,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        79,
+        68,
+        INVALID_HASH_ENTRY,
+        63,
+        INVALID_HASH_ENTRY,
+        -65,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+    };
+    uint32_t k1, k2;
+    uint64_t crc;
+    uint16_t ix;
+
+    crc = crc64i(UINT64_C(0x076259c3e291c26c), token);
+    k1 = ((uint32_t)crc & 0x1e) + 0;
+    k2 = ((uint32_t)(crc >> 32) & 0x1e) + 1;
+
+    ix = hashdatak1 + hashdatak2;
+    if (ix >= 120)
+        return PP_invalid;
+
+    if (!pp_directivesix || nasm_stricmp(pp_directivesix+1, token))
+        return PP_invalid;
+
+    return ix;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/asm/pptok.dat Added

@@ -0,0 +1,117 @@
+## --------------------------------------------------------------------------
+##   
+##   Copyright 1996-2019 The NASM Authors - All Rights Reserved
+##   See the file AUTHORS included with the NASM distribution for
+##   the specific copyright holders.
+##
+##   Redistribution and use in source and binary forms, with or without
+##   modification, are permitted provided that the following
+##   conditions are met:
+##
+##   * Redistributions of source code must retain the above copyright
+##     notice, this list of conditions and the following disclaimer.
+##   * Redistributions in binary form must reproduce the above
+##     copyright notice, this list of conditions and the following
+##     disclaimer in the documentation and/or other materials provided
+##     with the distribution.
+##     
+##     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+##     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+##     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+##     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+##     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+##     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+##     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+##     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+##     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+##     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+##     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+##     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+##     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+##
+## --------------------------------------------------------------------------
+
+#
+# A * at the end indicates a condition; the list of conditions are
+# on lines starting with *; the negatives are auto-generated
+#
+
+# Condition stems. %if MUST BE FIRST in this list.
+%if*
+%elif*
+
+# Condition tests.
+*
+*ctx
+*def
+*defalias
+*difi
+*empty
+*env
+*id
+*idn
+*idni
+*macro
+*num
+*str
+*token
+*usable
+*using
+
+# Directives with -i- versions for case insensitive
+%!assign
+%!defalias
+%!define
+%!defstr
+%!deftok
+%!macro
+%!pathsearch
+%!rmacro
+%!strcat
+%!strlen
+%!substr
+%!xdefine
+%un!macro
+
+# Other directives
+%aliases
+%arg
+%clear
+%depend
+%else
+%endif
+%endm
+%endmacro
+%endrep
+%error
+%exitmacro
+%exitrep
+%fatal
+%include
+%line
+%local
+%null
+%pop
+%pragma
+%push
+%rep
+%repl
+%require
+%rotate
+%stacksize
+%undef
+%undefalias
+%use
+%warning
+
+# These directives do not require % in TASM-compatible mode
+@arg
+@elif
+@else
+@endif
+@if
+@ifdef
+@ifdifi
+@ifndef
+@include
+@local

_service:tar_scm:nasm-2.16.03.tar.xz/asm/pptok.h Added

@@ -0,0 +1,202 @@
+/* Automatically generated from ./asm/pptok.dat by ./asm/pptok.pl */
+/* Do not edit */
+
+enum preproc_token {
+    PP_IF                    =   0,
+    PP_IFCTX                 =   1,
+    PP_IFDEF                 =   2,
+    PP_IFDEFALIAS            =   3,
+    PP_IFDIFI                =   4,
+    PP_IFEMPTY               =   5,
+    PP_IFENV                 =   6,
+    PP_IFID                  =   7,
+    PP_IFIDN                 =   8,
+    PP_IFIDNI                =   9,
+    PP_IFMACRO               =  10,
+    PP_IFNUM                 =  11,
+    PP_IFSTR                 =  12,
+    PP_IFTOKEN               =  13,
+    PP_IFUSABLE              =  14,
+    PP_IFUSING               =  15,
+    PP_IFN                   =  16,
+    PP_IFNCTX                =  17,
+    PP_IFNDEF                =  18,
+    PP_IFNDEFALIAS           =  19,
+    PP_IFNDIFI               =  20,
+    PP_IFNEMPTY              =  21,
+    PP_IFNENV                =  22,
+    PP_IFNID                 =  23,
+    PP_IFNIDN                =  24,
+    PP_IFNIDNI               =  25,
+    PP_IFNMACRO              =  26,
+    PP_IFNNUM                =  27,
+    PP_IFNSTR                =  28,
+    PP_IFNTOKEN              =  29,
+    PP_IFNUSABLE             =  30,
+    PP_IFNUSING              =  31,
+    PP_ELIF                  =  32,
+    PP_ELIFCTX               =  33,
+    PP_ELIFDEF               =  34,
+    PP_ELIFDEFALIAS          =  35,
+    PP_ELIFDIFI              =  36,
+    PP_ELIFEMPTY             =  37,
+    PP_ELIFENV               =  38,
+    PP_ELIFID                =  39,
+    PP_ELIFIDN               =  40,
+    PP_ELIFIDNI              =  41,
+    PP_ELIFMACRO             =  42,
+    PP_ELIFNUM               =  43,
+    PP_ELIFSTR               =  44,
+    PP_ELIFTOKEN             =  45,
+    PP_ELIFUSABLE            =  46,
+    PP_ELIFUSING             =  47,
+    PP_ELIFN                 =  48,
+    PP_ELIFNCTX              =  49,
+    PP_ELIFNDEF              =  50,
+    PP_ELIFNDEFALIAS         =  51,
+    PP_ELIFNDIFI             =  52,
+    PP_ELIFNEMPTY            =  53,
+    PP_ELIFNENV              =  54,
+    PP_ELIFNID               =  55,
+    PP_ELIFNIDN              =  56,
+    PP_ELIFNIDNI             =  57,
+    PP_ELIFNMACRO            =  58,
+    PP_ELIFNNUM              =  59,
+    PP_ELIFNSTR              =  60,
+    PP_ELIFNTOKEN            =  61,
+    PP_ELIFNUSABLE           =  62,
+    PP_ELIFNUSING            =  63,
+    PP_ALIASES               =  64,
+    PP_ARG                   =  65,
+    PP_CLEAR                 =  66,
+    PP_DEPEND                =  67,
+    PP_ELSE                  =  68,
+    PP_ENDIF                 =  69,
+    PP_ENDM                  =  70,
+    PP_ENDMACRO              =  71,
+    PP_ENDREP                =  72,
+    PP_ERROR                 =  73,
+    PP_EXITMACRO             =  74,
+    PP_EXITREP               =  75,
+    PP_FATAL                 =  76,
+    PP_INCLUDE               =  77,
+    PP_LINE                  =  78,
+    PP_LOCAL                 =  79,
+    PP_NULL                  =  80,
+    PP_POP                   =  81,
+    PP_PRAGMA                =  82,
+    PP_PUSH                  =  83,
+    PP_REP                   =  84,
+    PP_REPL                  =  85,
+    PP_REQUIRE               =  86,
+    PP_ROTATE                =  87,
+    PP_STACKSIZE             =  88,
+    PP_UNDEF                 =  89,
+    PP_UNDEFALIAS            =  90,
+    PP_USE                   =  91,
+    PP_WARNING               =  92,
+    PP_CASE_PAD              =  93,
+    PP_ASSIGN                =  94,
+    PP_IASSIGN               =  95,
+    PP_DEFALIAS              =  96,
+    PP_IDEFALIAS             =  97,
+    PP_DEFINE                =  98,
+    PP_IDEFINE               =  99,
+    PP_DEFSTR                = 100,
+    PP_IDEFSTR               = 101,
+    PP_DEFTOK                = 102,
+    PP_IDEFTOK               = 103,
+    PP_MACRO                 = 104,
+    PP_IMACRO                = 105,
+    PP_PATHSEARCH            = 106,
+    PP_IPATHSEARCH           = 107,
+    PP_RMACRO                = 108,
+    PP_IRMACRO               = 109,
+    PP_STRCAT                = 110,
+    PP_ISTRCAT               = 111,
+    PP_STRLEN                = 112,
+    PP_ISTRLEN               = 113,
+    PP_SUBSTR                = 114,
+    PP_ISUBSTR               = 115,
+    PP_XDEFINE               = 116,
+    PP_IXDEFINE              = 117,
+    PP_UNMACRO               = 118,
+    PP_UNIMACRO              = 119,
+    PP_count                 = 120,
+    PP_invalid               =  -1
+};
+
+#define PP_COND(x)     ((x) & 0xf)
+#define PP_IS_COND(x)  ((unsigned int)(x) < PP_ALIASES)
+#define PP_COND_NEGATIVE(x) (!!((x) & 0x10))
+
+#define PP_HAS_CASE(x) ((x) >= PP_ASSIGN)
+#define PP_INSENSITIVE(x) ((x) & 1)
+#define PP_TOKLEN_MAX 14
+
+#define CASE_PP_IF \
+	case PP_IF:\
+	case PP_IFCTX:\
+	case PP_IFDEF:\
+	case PP_IFDEFALIAS:\
+	case PP_IFDIFI:\
+	case PP_IFEMPTY:\
+	case PP_IFENV:\
+	case PP_IFID:\
+	case PP_IFIDN:\
+	case PP_IFIDNI:\
+	case PP_IFMACRO:\
+	case PP_IFNUM:\
+	case PP_IFSTR:\
+	case PP_IFTOKEN:\
+	case PP_IFUSABLE:\
+	case PP_IFUSING:\
+	case PP_IFN:\
+	case PP_IFNCTX:\
+	case PP_IFNDEF:\
+	case PP_IFNDEFALIAS:\
+	case PP_IFNDIFI:\
+	case PP_IFNEMPTY:\
+	case PP_IFNENV:\
+	case PP_IFNID:\
+	case PP_IFNIDN:\
+	case PP_IFNIDNI:\
+	case PP_IFNMACRO:\
+	case PP_IFNNUM:\
+	case PP_IFNSTR:\
+	case PP_IFNTOKEN:\
+	case PP_IFNUSABLE:\
+	case PP_IFNUSING
+#define CASE_PP_ELIF \
+	case PP_ELIF:\
+	case PP_ELIFCTX:\
+	case PP_ELIFDEF:\
+	case PP_ELIFDEFALIAS:\
+	case PP_ELIFDIFI:\
+	case PP_ELIFEMPTY:\
+	case PP_ELIFENV:\
+	case PP_ELIFID:\
+	case PP_ELIFIDN:\
+	case PP_ELIFIDNI:\
+	case PP_ELIFMACRO:\
+	case PP_ELIFNUM:\
+	case PP_ELIFSTR:\
+	case PP_ELIFTOKEN:\
+	case PP_ELIFUSABLE:\
+	case PP_ELIFUSING:\
+	case PP_ELIFN:\
+	case PP_ELIFNCTX:\
+	case PP_ELIFNDEF:\
+	case PP_ELIFNDEFALIAS:\
+	case PP_ELIFNDIFI:\
+	case PP_ELIFNEMPTY:\
+	case PP_ELIFNENV:\
+	case PP_ELIFNID:\
+	case PP_ELIFNIDN:\
+	case PP_ELIFNIDNI:\
+	case PP_ELIFNMACRO:\
+	case PP_ELIFNNUM:\
+	case PP_ELIFNSTR:\
+	case PP_ELIFNTOKEN:\
+	case PP_ELIFNUSABLE:\
+	case PP_ELIFNUSING

_service:tar_scm:nasm-2.16.03.tar.xz/asm/pptok.ph Added

@@ -0,0 +1,250 @@
+# Automatically generated from ./asm/pptok.dat by ./asm/pptok.pl
+# Do not edit
+
+%pptok_hash = (
+    '%if' => 0,
+    '%ifctx' => 1,
+    '%ifdef' => 2,
+    '%ifdefalias' => 3,
+    '%ifdifi' => 4,
+    '%ifempty' => 5,
+    '%ifenv' => 6,
+    '%ifid' => 7,
+    '%ifidn' => 8,
+    '%ifidni' => 9,
+    '%ifmacro' => 10,
+    '%ifnum' => 11,
+    '%ifstr' => 12,
+    '%iftoken' => 13,
+    '%ifusable' => 14,
+    '%ifusing' => 15,
+    '%ifn' => 16,
+    '%ifnctx' => 17,
+    '%ifndef' => 18,
+    '%ifndefalias' => 19,
+    '%ifndifi' => 20,
+    '%ifnempty' => 21,
+    '%ifnenv' => 22,
+    '%ifnid' => 23,
+    '%ifnidn' => 24,
+    '%ifnidni' => 25,
+    '%ifnmacro' => 26,
+    '%ifnnum' => 27,
+    '%ifnstr' => 28,
+    '%ifntoken' => 29,
+    '%ifnusable' => 30,
+    '%ifnusing' => 31,
+    '%elif' => 32,
+    '%elifctx' => 33,
+    '%elifdef' => 34,
+    '%elifdefalias' => 35,
+    '%elifdifi' => 36,
+    '%elifempty' => 37,
+    '%elifenv' => 38,
+    '%elifid' => 39,
+    '%elifidn' => 40,
+    '%elifidni' => 41,
+    '%elifmacro' => 42,
+    '%elifnum' => 43,
+    '%elifstr' => 44,
+    '%eliftoken' => 45,
+    '%elifusable' => 46,
+    '%elifusing' => 47,
+    '%elifn' => 48,
+    '%elifnctx' => 49,
+    '%elifndef' => 50,
+    '%elifndefalias' => 51,
+    '%elifndifi' => 52,
+    '%elifnempty' => 53,
+    '%elifnenv' => 54,
+    '%elifnid' => 55,
+    '%elifnidn' => 56,
+    '%elifnidni' => 57,
+    '%elifnmacro' => 58,
+    '%elifnnum' => 59,
+    '%elifnstr' => 60,
+    '%elifntoken' => 61,
+    '%elifnusable' => 62,
+    '%elifnusing' => 63,
+    '%aliases' => 64,
+    '%arg' => 65,
+    '%clear' => 66,
+    '%depend' => 67,
+    '%else' => 68,
+    '%endif' => 69,
+    '%endm' => 70,
+    '%endmacro' => 71,
+    '%endrep' => 72,
+    '%error' => 73,
+    '%exitmacro' => 74,
+    '%exitrep' => 75,
+    '%fatal' => 76,
+    '%include' => 77,
+    '%line' => 78,
+    '%local' => 79,
+    '%null' => 80,
+    '%pop' => 81,
+    '%pragma' => 82,
+    '%push' => 83,
+    '%rep' => 84,
+    '%repl' => 85,
+    '%require' => 86,
+    '%rotate' => 87,
+    '%stacksize' => 88,
+    '%undef' => 89,
+    '%undefalias' => 90,
+    '%use' => 91,
+    '%warning' => 92,
+    '%CASE_PAD' => 93,
+    '%assign' => 94,
+    '%iassign' => 95,
+    '%defalias' => 96,
+    '%idefalias' => 97,
+    '%define' => 98,
+    '%idefine' => 99,
+    '%defstr' => 100,
+    '%idefstr' => 101,
+    '%deftok' => 102,
+    '%ideftok' => 103,
+    '%macro' => 104,
+    '%imacro' => 105,
+    '%pathsearch' => 106,
+    '%ipathsearch' => 107,
+    '%rmacro' => 108,
+    '%irmacro' => 109,
+    '%strcat' => 110,
+    '%istrcat' => 111,
+    '%strlen' => 112,
+    '%istrlen' => 113,
+    '%substr' => 114,
+    '%isubstr' => 115,
+    '%xdefine' => 116,
+    '%ixdefine' => 117,
+    '%unmacro' => 118,
+    '%unimacro' => 119,
+);
+
+@pptok_list = (
+    '%if',
+    '%ifctx',
+    '%ifdef',
+    '%ifdefalias',
+    '%ifdifi',
+    '%ifempty',
+    '%ifenv',
+    '%ifid',
+    '%ifidn',
+    '%ifidni',
+    '%ifmacro',
+    '%ifnum',
+    '%ifstr',
+    '%iftoken',
+    '%ifusable',
+    '%ifusing',
+    '%ifn',
+    '%ifnctx',
+    '%ifndef',
+    '%ifndefalias',
+    '%ifndifi',
+    '%ifnempty',
+    '%ifnenv',
+    '%ifnid',
+    '%ifnidn',
+    '%ifnidni',
+    '%ifnmacro',
+    '%ifnnum',
+    '%ifnstr',
+    '%ifntoken',
+    '%ifnusable',
+    '%ifnusing',
+    '%elif',
+    '%elifctx',
+    '%elifdef',
+    '%elifdefalias',
+    '%elifdifi',
+    '%elifempty',
+    '%elifenv',
+    '%elifid',
+    '%elifidn',
+    '%elifidni',
+    '%elifmacro',
+    '%elifnum',
+    '%elifstr',
+    '%eliftoken',
+    '%elifusable',
+    '%elifusing',
+    '%elifn',
+    '%elifnctx',
+    '%elifndef',
+    '%elifndefalias',
+    '%elifndifi',
+    '%elifnempty',
+    '%elifnenv',
+    '%elifnid',
+    '%elifnidn',
+    '%elifnidni',
+    '%elifnmacro',
+    '%elifnnum',
+    '%elifnstr',
+    '%elifntoken',
+    '%elifnusable',
+    '%elifnusing',
+    '%aliases',
+    '%arg',
+    '%clear',
+    '%depend',
+    '%else',
+    '%endif',
+    '%endm',
+    '%endmacro',
+    '%endrep',
+    '%error',
+    '%exitmacro',
+    '%exitrep',
+    '%fatal',
+    '%include',
+    '%line',
+    '%local',
+    '%null',
+    '%pop',
+    '%pragma',
+    '%push',
+    '%rep',
+    '%repl',
+    '%require',
+    '%rotate',
+    '%stacksize',
+    '%undef',
+    '%undefalias',
+    '%use',
+    '%warning',
+    '%CASE_PAD',
+    '%assign',
+    '%iassign',
+    '%defalias',
+    '%idefalias',
+    '%define',
+    '%idefine',
+    '%defstr',
+    '%idefstr',
+    '%deftok',
+    '%ideftok',
+    '%macro',
+    '%imacro',
+    '%pathsearch',
+    '%ipathsearch',
+    '%rmacro',
+    '%irmacro',
+    '%strcat',
+    '%istrcat',
+    '%strlen',
+    '%istrlen',
+    '%substr',
+    '%isubstr',
+    '%xdefine',
+    '%ixdefine',
+    '%unmacro',
+    '%unimacro',
+);
+
+1;

_service:tar_scm:nasm-2.16.03.tar.xz/asm/pptok.pl Added

@@ -0,0 +1,353 @@
+#!/usr/bin/perl
+## --------------------------------------------------------------------------
+##
+##   Copyright 1996-2022 The NASM Authors - All Rights Reserved
+##   See the file AUTHORS included with the NASM distribution for
+##   the specific copyright holders.
+##
+##   Redistribution and use in source and binary forms, with or without
+##   modification, are permitted provided that the following
+##   conditions are met:
+##
+##   * Redistributions of source code must retain the above copyright
+##     notice, this list of conditions and the following disclaimer.
+##   * Redistributions in binary form must reproduce the above
+##     copyright notice, this list of conditions and the following
+##     disclaimer in the documentation and/or other materials provided
+##     with the distribution.
+##
+##     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+##     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+##     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+##     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+##     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+##     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+##     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+##     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+##     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+##     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+##     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+##     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+##     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+##
+## --------------------------------------------------------------------------
+
+#
+# Produce pptok.c, pptok.h and pptok.ph from pptok.dat
+#
+
+require 'phash.ph';
+
+my($what, $in, $out) = @ARGV;
+
+#
+# Read pptok.dat
+#
+open(IN, '<', $in) or die "$0: cannot open: $in\n";
+while (defined($line = <IN>)) {
+    $line =~ s/\r?\n$//;	# Remove trailing \r\n or \n
+    $line =~ s/^\s+//;		# Remove leading whitespace
+    $line =~ s/\s*\#.*$//;	# Remove comments and trailing whitespace
+    next if ($line eq '');
+
+    if ($line =~ /^\%(.*)\*$/) {
+	# Condition stem
+	push(@cctok, $1);
+    } elsif ($line =~ /^\%(.*\!.*)$/) {
+	# Directive with case insensitity "i" option
+	# Mnemonic: ! is "upside down i"
+	push(@ppitok, $1);
+    } elsif ($line =~ /^\%(.*)$/) {
+	# Other directive
+	push(@pptok, $1);
+    } elsif ($line =~ /^\*(.*)$/) {
+	# Condition tail
+	push(@cond, $1);
+    } elsif ($line =~ /^\@(.*)$/) {
+	# TASM compatibility directive
+	push(@tasm, $1);
+    }
+}
+close(IN);
+
+# Always sort %if first
+@cctok  = sort { $a eq 'if' ? -1 : $b eq 'if' ? 1 : $a cmp $b } @cctok;
+@cond   = sort @cond;
+@pptok  = sort @pptok;
+@ppitok = sort @ppitok;
+@tasm   = sort @tasm;
+
+# Generate the expanded list including conditionals.  The conditionals
+# are at the beginning, padded to a power of 2, with the inverses
+# following each group; this allows a simple mask to pick out the condition,
+# polarity, and directive type.
+
+while ((scalar @cond) & (scalar @cond)-1) {
+    push(@cond, sprintf("_COND_%d", scalar @cond));
+}
+
+@cptok = ();
+foreach $ct (@cctok) {
+    foreach $cc (@cond) {
+	push(@cptok, $ct.$cc);
+    }
+    foreach $cc (@cond) {
+	push(@cptok, $ct.'n'.$cc);
+    }
+}
+$first_uncond = scalar @cptok;
+@pptok = (@cptok, @pptok);
+
+# Generate the list of case-specific tokens; these are in pairs
+# with the -i- variant following the plain variant
+if (scalar(@pptok) & 1) {
+    push(@pptok, 'CASE_PAD');
+}
+
+$first_itoken = scalar @pptok;
+foreach $it (@ppitok) {
+    (my $at = $it) =~ s/\!//;
+    (my $bt = $it) =~ s/\!/i/;
+
+    push(@pptok, $at, $bt);
+}
+
+open(OUT, '>', $out) or die "$0: cannot open: $out\n";
+
+#
+# Output pptok.h
+#
+if ($what eq 'h') {
+    print OUT "/* Automatically generated from $in by $0 */\n";
+    print OUT "/* Do not edit */\n";
+    print OUT "\n";
+
+    print OUT "enum preproc_token {\n";
+    $n = 0;
+    my $maxlen = 0;
+    foreach $pt (@pptok) {
+	if (defined($pt)) {
+	    printf OUT "    %-24s = %3d,\n", "PP_\U$pt\E", $n;
+	    $maxlen = length($pt) if (length($pt) > $maxlen);
+	}
+	$n++;
+    }
+    printf OUT "    %-24s = %3d,\n", 'PP_count', $n;
+    printf OUT "    %-24s = %3d\n", 'PP_invalid', -1;
+    print OUT "};\n";
+    print OUT "\n";
+
+    printf OUT "#define PP_COND(x)     ((x) & 0x%x)\n",
+	(scalar(@cond)-1);
+    printf OUT "#define PP_IS_COND(x)  ((unsigned int)(x) < PP_%s)\n",
+	uc($pptok$first_uncond);
+    printf OUT "#define PP_COND_NEGATIVE(x) (!!((x) & 0x%x))\n", scalar(@cond);
+    print  OUT "\n";
+    printf OUT "#define PP_HAS_CASE(x) ((x) >= PP_%s)\n",
+	uc($pptok$first_itoken);
+    print  OUT "#define PP_INSENSITIVE(x) ((x) & 1)\n";
+    # The +1 here is for the initial % sign
+    printf OUT "#define PP_TOKLEN_MAX %d\n", $maxlen+1;
+    print  OUT "\n";
+
+    foreach $ct (@cctok) {
+	print OUT "#define CASE_PP_\U$ct\E";
+	$pref = " \\\n";
+	foreach $cc (@cond) {
+	    print OUT "$pref\tcase PP_\U${ct}${cc}\E";
+	    $pref = ":\\\n";
+	}
+	foreach $cc (@cond) {
+	    print OUT "$pref\tcase PP_\U${ct}N${cc}\E";
+	    $pref = ":\\\n";
+	}
+	print OUT "\n";		# No colon or newline on the last one
+    }
+}
+
+#
+# Output pptok.c
+#
+if ($what eq 'c') {
+    print OUT "/* Automatically generated from $in by $0 */\n";
+    print OUT "/* Do not edit */\n";
+    print OUT "\n";
+
+    print OUT "#include \"compiler.h\"\n";
+    print OUT "#include \"nctype.h\"\n";
+    print OUT "#include \"nasmlib.h\"\n";
+    print OUT "#include \"hashtbl.h\"\n";
+    print OUT "#include \"preproc.h\"\n";
+    print OUT "\n";
+
+    # Note that this is global.
+    printf OUT "const char * const pp_directives%d = {\n", scalar(@pptok);
+    foreach $d (@pptok) {
+	if (defined($d) && $d !~ /A-Z/) {
+	    print OUT "    \"%$d\",\n";
+	} else {
+	    print OUT "    NULL,\n";
+	}
+    }
+    print OUT  "};\n";
+
+    printf OUT "const uint8_t pp_directives_len%d = {\n", scalar(@pptok);
+    foreach $d (@pptok) {
+	printf OUT "    %d,\n", defined($d) ? length($d)+1 : 0;
+    }
+    print OUT  "};\n";
+
+    # Put a large value in unused hash slots.  This makes it extremely
+    # unlikely that any combination that involves unused slot will
+    # pass the range test.  This speeds up rejection of unrecognized
+    # tokens, i.e. identifiers.
+    print OUT "\n#define INVALID_HASH_ENTRY (65535/3)\n";
+
+    my %tokens = ();
+    my @tokendata = ();
+
+    my $n = 0;
+    foreach $pt (@pptok) {
+	# Upper case characters signify internal use tokens only
+	if (defined($pt) && $pt !~ /A-Z/) {
+	    $tokens{'%'.$pt} = $n;
+	    if ($pt =~ /\@\\\\_/) {
+		# Fail on characters which look like upper-case letters
+		# to the quick-and-dirty downcasing in the prehash
+		# (see below)
+		die "$in: invalid character in token: $pt";
+	    }
+	}
+	$n++;
+    }
+
+    my @hashinfo = gen_perfect_hash(\%tokens);
+    if (!@hashinfo) {
+	die "$0: no hash found\n";
+    }
+
+    # Paranoia...
+    verify_hash_table(\%tokens, \@hashinfo);
+
+    ($n, $sv, $g) = @hashinfo;
+    die if ($n & ($n-1));
+    $n <<= 1;
+
+
+    print OUT "\n\n/* Primary preprocessor token hash */\n\n";
+
+    print OUT "enum preproc_token pp_token_hash(const char *token)\n";
+    print OUT "{\n";
+    print OUT "    static const int16_t hashdata$n = {\n";
+    for ($i = 0; $i < $n; $i++) {
+	my $h = ${$g}$i;
+	print OUT "        ", defined($h) ? $h : 'INVALID_HASH_ENTRY', ",\n";
+    }
+    print OUT "    };\n";
+    print OUT  "    uint32_t k1, k2;\n";
+    print OUT  "    uint64_t crc;\n";
+    # For correct overflow behavior, "ix" should be unsigned of the same
+    # width as the hash arrays.
+    print OUT  "    uint16_t ix;\n";
+    print OUT  "\n";
+
+    printf OUT "    crc = crc64i(UINT64_C(0x%08x%08x), token);\n",
+	$$sv0, $$sv1;
+    printf OUT "    k1 = ((uint32_t)crc & 0x%x) + 0;\n", $n-2;
+    printf OUT "    k2 = ((uint32_t)(crc >> 32) & 0x%x) + 1;\n", $n-2;
+    print  OUT "\n";
+    print  OUT "    ix = hashdatak1 + hashdatak2;\n";
+    printf OUT "    if (ix >= %d)\n", scalar(@pptok);
+    print OUT  "        return PP_invalid;\n";
+    print OUT  "\n";
+
+    print OUT  "    if (!pp_directivesix || nasm_stricmp(pp_directivesix, token))\n";
+    print OUT  "        return PP_invalid;\n";
+    print OUT  "\n";
+    print OUT  "    return ix;\n";
+    print OUT  "}\n";
+
+    my %tasmtokens = ();
+    foreach $pt (@tasm) {
+	# TASM compatibility token
+	$nasmt = '%'.$pt;
+	if (!defined($tokens{$nasmt})) {
+	    die "$in: TASM compat token $pt does not have a ".
+		"corresponding $nasmt\n";
+	}
+	$tasmtokens{$pt} = $tokens{$nasmt};
+    }
+
+    @hashinfo = gen_perfect_hash(\%tasmtokens);
+    if (!@hashinfo) {
+	die "$0: no hash found\n";
+    }
+
+    # Paranoia...
+    verify_hash_table(\%tasmtokens, \@hashinfo);
+
+    ($n, $sv, $g) = @hashinfo;
+    die if ($n & ($n-1));
+    $n <<= 1;
+
+    print OUT "\n\n/* TASM compatibility preprocessor token hash */\n";
+
+    print OUT "enum preproc_token pp_tasm_token_hash(const char *token)\n";
+    print OUT "{\n";
+    print OUT "    static const int16_t hashdata$n = {\n";
+    for ($i = 0; $i < $n; $i++) {
+	my $h = ${$g}$i;
+	print OUT "        ", defined($h) ? $h : 'INVALID_HASH_ENTRY', ",\n";
+    }
+    print OUT "    };\n";
+    print OUT  "    uint32_t k1, k2;\n";
+    print OUT  "    uint64_t crc;\n";
+    # For correct overflow behavior, "ix" should be unsigned of the same
+    # width as the hash arrays.
+    print OUT  "    uint16_t ix;\n";
+    print OUT  "\n";
+
+    printf OUT "    crc = crc64i(UINT64_C(0x%08x%08x), token);\n",
+	$$sv0, $$sv1;
+    printf OUT "    k1 = ((uint32_t)crc & 0x%x) + 0;\n", $n-2;
+    printf OUT "    k2 = ((uint32_t)(crc >> 32) & 0x%x) + 1;\n", $n-2;
+    print  OUT "\n";
+    printf OUT "    ix = hashdatak1 + hashdatak2;\n", $n-1, $n-1;
+    # Comparing to pptok here is correct, because this hash produces
+    # an enum preproc_token value directly.
+    printf OUT "    if (ix >= %d)\n", scalar(@pptok);
+    print OUT  "        return PP_invalid;\n";
+    print OUT  "\n";
+
+    print OUT  "    if (!pp_directivesix || nasm_stricmp(pp_directivesix+1, token))\n";
+    print OUT  "        return PP_invalid;\n";
+    print OUT  "\n";
+    print OUT  "    return ix;\n";
+    print OUT  "}\n";
+}
+
+#
+# Output pptok.ph
+#
+if ($what eq 'ph') {
+    print OUT "# Automatically generated from $in by $0\n";
+    print OUT "# Do not edit\n";
+
+    print OUT "\n\%pptok_hash = (\n";
+    $n = 0;
+    foreach $tok (@pptok) {
+	if (defined($tok)) {
+	    printf OUT "    '%%%s' => %d,\n", $tok, $n;
+	}
+	$n++;
+    }
+    print OUT ");\n";
+
+    print OUT "\n\@pptok_list = (\n";
+    foreach $tok (@pptok) {
+	print OUT "    ", (defined($tok) ? "'\%$tok'" : 'undef'), ",\n";
+    }
+    print OUT ");\n";
+
+    print OUT "\n1;\n";
+}

_service:tar_scm:nasm-2.16.03.tar.xz/asm/pragma.c Added

@@ -0,0 +1,369 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2019 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * Parse and handle pragma directives.  The preprocessor handles
+ * %pragma preproc directives separately, all other namespaces are
+ * simply converted to pragma.
+ */
+
+#include "compiler.h"
+
+#include "nctype.h"
+
+#include "nasm.h"
+#include "nasmlib.h"
+#include "assemble.h"
+#include "error.h"
+#include "listing.h"
+
+static enum directive_result ignore_pragma(const struct pragma *pragma);
+static enum directive_result output_pragma(const struct pragma *pragma);
+static enum directive_result debug_pragma(const struct pragma *pragma);
+static enum directive_result limit_pragma(const struct pragma *pragma);
+
+/*
+ * Handle pragma directives.  pragma is generally produced by
+ * the %pragma preprocessor directive, which simply passes on any
+ * string that it finds *except* %pragma preproc.  The idea is
+ * that pragmas are of the form:
+ *
+ * %pragma <facility> <opname> <options>...
+ *
+ * ... where "facility" can be either a generic facility or a backend
+ * name.
+ *
+ * The following names are currently reserved for global facilities;
+ * so far none of these have any defined pragmas at all:
+ *
+ * preproc	- preprocessor
+ * limit	- limit setting
+ * asm		- assembler
+ * list		- listing generator
+ * file		- generic file handling
+ * input	- input file handling
+ * output	- backend-independent output handling
+ * debug	- backend-independent debug handling
+ * ignore	- dummy pragma (can be used to "comment out")
+ *
+ * This function should generally not error out if it doesn't understand
+ * what a pragma is for, for unknown arguments, etc; the whole point of
+ * a pragma is that future releases might add new ones that should be
+ * ignored rather than be an error.  Erroring out is acceptable for
+ * known pragmas suffering from parsing errors and so on.
+ *
+ * Adding default-suppressed warnings would, however, be a good idea
+ * at some point.
+ */
+static struct pragma_facility global_pragmas =
+{
+    { "asm",		NULL },
+    { "limit",          limit_pragma },
+    { "list",		list_pragma },
+    { "file",		NULL },
+    { "input",		NULL },
+    { "output",		output_pragma },
+    { "debug",	        debug_pragma },
+    { "ignore",		ignore_pragma },
+
+    /* This will never actually get this far... */
+    { "preproc",	NULL }, /* Handled in the preprocessor by necessity */
+    { NULL, NULL }
+};
+
+/*
+ * Invoke a pragma handler
+ */
+static enum directive_result
+call_pragma(const struct pragma_facility *pf, struct pragma *pragma)
+{
+    if (!pf || !pf->handler)
+        return DIRR_UNKNOWN;
+
+    pragma->facility = pf;
+    return pf->handler(pragma);
+}
+
+/*
+ * Search a pragma list for a known pragma facility and if so, invoke
+ * the handler.  Return true if processing is complete.  The "default
+ * name", *or def->name*, if set, matches the final NULL entry (used
+ * for backends, so multiple backends can share the same list under
+ * some circumstances, and the backends can implement common operations.)
+ */
+static enum directive_result
+search_pragma_list(const struct pragma_facility *list,
+                   const char *defaultname,
+                   const struct pragma_facility *def,
+                   const struct pragma *cpragma)
+{
+    const struct pragma_facility *pf = NULL;
+    enum directive_result rv;
+    bool facility_match, is_default;
+    struct pragma pragma = *cpragma;
+    const char *facname = pragma.facility_name;
+
+    /* Is there a default facility and we match its name? */
+    is_default = def && def->name && !nasm_stricmp(facname, def->name);
+    facility_match = is_default;
+
+    /*
+     * Promote def->name to defaultname if both are set. This handles
+     * e.g. output -> elf32 so that we can handle elf32-specific
+     * directives in that handler.
+     */
+    if (defaultname) {
+        if (is_default)
+            facname = defaultname;
+        else
+            facility_match = !nasm_stricmp(facname, defaultname);
+    }
+
+    if (facname && list) {
+        for (pf = list; pf->name; pf++) {
+            if (!nasm_stricmp(facname, pf->name)) {
+                facility_match = true;
+                rv = call_pragma(pf, &pragma);
+                if (rv != DIRR_UNKNOWN)
+                    goto found_it;
+            }
+        }
+
+        if (facility_match) {
+            /*
+             * Facility name match but no matching directive; handler in NULL
+             * entry at end of list?
+             */
+            rv = call_pragma(pf, &pragma);
+            if (rv != DIRR_UNKNOWN)
+                goto found_it;
+        }
+    }
+
+    if (facility_match) {
+        /*
+         * Facility match but still nothing: def->handler if it exists
+         */
+        rv = call_pragma(def, &pragma);
+    } else {
+        /*
+         * No facility matched
+         */
+        return DIRR_UNKNOWN;
+    }
+
+    /*
+     * Otherwise we found the facility but not any supported directive,
+     * fall through...
+     */
+
+found_it:
+    switch (rv) {
+    case DIRR_UNKNOWN:
+        switch (pragma.opcode) {
+        case D_none:
+            /*!
+             *!pragma-bad off malformed \c{%pragma}
+             *!=bad-pragma
+             *!  warns about a malformed or otherwise unparsable
+             *!  \c{%pragma} directive.
+             */
+            nasm_warn(ERR_PASS2|WARN_PRAGMA_BAD,
+                       "empty %%pragma %s", pragma.facility_name);
+            break;
+        default:
+            /*!
+             *!pragma-unknown off unknown \c{%pragma} facility or directive
+             *!=unknown-pragma
+             *!  warns about an unknown \c{%pragma} directive.
+             *!  This is not yet implemented for most cases.
+             */
+            nasm_warn(ERR_PASS2|WARN_PRAGMA_UNKNOWN,
+                       "unknown %%pragma %s %s",
+                       pragma.facility_name, pragma.opname);
+            break;
+        }
+        rv = DIRR_ERROR;        /* Already printed an error message */
+        break;
+
+    case DIRR_OK:
+    case DIRR_ERROR:
+        break;                  /* Nothing to do */
+
+    case DIRR_BADPARAM:
+        /*
+         * This one is an error.  Don't use it if forward compatibility
+         * would be compromised, as opposed to an inherent error.
+         */
+        nasm_error(ERR_NONFATAL, "bad argument to %%pragma %s %s",
+                   pragma.facility_name, pragma.opname);
+        break;
+
+    default:
+        panic();
+    }
+    return rv;
+}
+
+/* This warning message is intended for future use */
+/*!
+ *!pragma-na off \c{%pragma} not applicable to this compilation
+ *!=not-my-pragma
+ *!  warns about a \c{%pragma} directive which is not applicable to
+ *!  this particular assembly session.  This is not yet implemented.
+ */
+
+/* Naked %pragma */
+/*!
+ *!pragma-empty off empty \c{%pragma} directive
+ *!  warns about a \c{%pragma} directive containing nothing.
+ *!  This is treated identically to \c{%pragma ignore} except
+ *!  for this optional warning.
+ */
+void process_pragma(char *str)
+{
+    const struct pragma_facility *pf;
+    struct pragma pragma;
+    char *p;
+
+    nasm_zero(pragma);
+
+    pragma.facility_name = nasm_get_word(str, &p);
+    if (!pragma.facility_name) {
+        /* Empty %pragma */
+	nasm_warn(ERR_PASS2|WARN_PRAGMA_EMPTY,
+		   "empty %%pragma directive, ignored");
+        return;
+    }
+
+    pragma.opname = nasm_get_word(p, &p);
+    if (!pragma.opname)
+        pragma.opcode = D_none;
+    else
+        pragma.opcode = directive_find(pragma.opname);
+
+    pragma.tail = nasm_trim_spaces(p);
+
+    /*
+     * Search the global pragma namespaces. This is done
+     * as a loop rather than letting search_pragma_list()
+     * just run, because we don't want to keep searching if
+     * we have a facility match, thus we want to call
+     * search_pragma_list() individually for each namespace.
+     */
+    for (pf = global_pragmas; pf->name; pf++) {
+        if (search_pragma_list(NULL, NULL, pf, &pragma) != DIRR_UNKNOWN)
+            return;
+    }
+
+    /* Is it an output pragma? */
+    if (output_pragma(&pragma) != DIRR_UNKNOWN)
+        return;
+
+    /* Is it a debug pragma */
+    if (debug_pragma(&pragma) != DIRR_UNKNOWN)
+        return;
+
+    /*
+     * Note: it would be nice to warn for an unknown namespace,
+     * but in order to do so we need to walk *ALL* the backends
+     * in order to make sure we aren't dealing with a pragma that
+     * is for another backend.  On the other hand, that could
+     * also be a warning with a separate warning flag.
+     *
+     * Leave this for the future, however, the warning classes are
+     * already defined for future compatibility.
+     */
+}
+
+/* %pragma ignore */
+static enum directive_result ignore_pragma(const struct pragma *pragma)
+{
+    (void)pragma;
+    return DIRR_OK;             /* Even for D_none! */
+}
+
+/*
+ * Process output and debug pragmas, by either list name or generic
+ * name. Note that the output/debug format list can hook the default
+ * names if they so choose.
+ */
+static enum directive_result output_pragma_common(const struct pragma *);
+static enum directive_result output_pragma(const struct pragma *pragma)
+{
+    static const struct pragma_facility
+        output_pragma_def = { "output", output_pragma_common };
+
+    return search_pragma_list(ofmt->pragmas, ofmt->shortname,
+                              &output_pragma_def, pragma);
+}
+
+/* Generic pragmas that apply to all output backends */
+static enum directive_result output_pragma_common(const struct pragma *pragma)
+{
+    switch (pragma->opcode) {
+    case D_PREFIX:
+    case D_GPREFIX:
+        set_label_mangle(LM_GPREFIX, pragma->tail);
+        return DIRR_OK;
+    case D_SUFFIX:
+    case D_GSUFFIX:
+        set_label_mangle(LM_GSUFFIX, pragma->tail);
+        return DIRR_OK;
+    case D_LPREFIX:
+        set_label_mangle(LM_LPREFIX, pragma->tail);
+        return DIRR_OK;
+    case D_LSUFFIX:
+        set_label_mangle(LM_LSUFFIX, pragma->tail);
+        return DIRR_OK;
+    default:
+        return DIRR_UNKNOWN;
+    }
+}
+
+static enum directive_result debug_pragma(const struct pragma *pragma)
+{
+    static const struct pragma_facility
+        debug_pragma_def = { "debug", NULL };
+
+    return search_pragma_list(dfmt->pragmas, dfmt->shortname,
+                              &debug_pragma_def, pragma);
+}
+
+/*
+ * %pragma limit to set resource limits
+ */
+static enum directive_result limit_pragma(const struct pragma *pragma)
+{
+    return nasm_set_limit(pragma->opname, pragma->tail);
+}

_service:tar_scm:nasm-2.16.03.tar.xz/asm/preproc.c Added

@@ -0,0 +1,8414 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2023 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * preproc.c   macro preprocessor for the Netwide Assembler
+ */
+
+/* Typical flow of text through preproc
+ *
+ * pp_getline gets tokenized lines, either
+ *
+ *   from a macro expansion
+ *
+ * or
+ *   {
+ *   read_line  gets raw text from stdmacpos, or predef, or current input file
+ *   tokenize   converts to tokens
+ *   }
+ *
+ * expand_mmac_params is used to expand %1 etc., unless a macro is being
+ * defined or a false conditional is being processed
+ * (%0, %1, %+1, %-1, %%foo
+ *
+ * do_directive checks for directives
+ *
+ * expand_smacro is used to expand single line macros
+ *
+ * expand_mmacro is used to expand multi-line macros
+ *
+ * detoken is used to convert the line back to text
+ */
+
+#include "compiler.h"
+
+#include "nctype.h"
+
+#include "nasm.h"
+#include "nasmlib.h"
+#include "error.h"
+#include "preproc.h"
+#include "hashtbl.h"
+#include "quote.h"
+#include "stdscan.h"
+#include "eval.h"
+#include "tokens.h"
+#include "tables.h"
+#include "listing.h"
+#include "dbginfo.h"
+
+/*
+ * Preprocessor execution options that can be controlled by %pragma or
+ * other directives.  This structure is initialized to zero on each
+ * pass; this *must* reflect the default initial state.
+ */
+static struct pp_config {
+    bool noaliases;
+    bool sane_empty_expansion;
+} ppconf;
+
+/*
+ * Preprocessor debug-related flags
+ */
+static enum pp_debug_flags {
+    PDBG_MMACROS      = 1,      /* Collect mmacro information */
+    PDBG_SMACROS      = 2,      /* Collect smacro information */
+    PDBG_LIST_SMACROS = 4,      /* Smacros to list file (list option 's') */
+    PDBG_INCLUDE      = 8       /* Collect %include information */
+} ppdbg;
+
+/*
+ * Preprocessor options configured on the command line
+ */
+static enum preproc_opt ppopt;
+
+typedef struct SMacro SMacro;
+typedef struct MMacro MMacro;
+typedef struct Context Context;
+typedef struct Token Token;
+typedef struct Line Line;
+typedef struct Include Include;
+typedef struct Cond Cond;
+
+/*
+ * Map of preprocessor directives that are also preprocessor functions;
+ * if they are at the beginning of a line they are a function if and
+ * only if they are followed by a (
+ */
+static bool pp_op_may_be_functionPP_count;
+
+/*
+ * This is the internal form which we break input lines up into.
+ * Typically stored in linked lists.
+ *
+ * Note that `type' serves a double meaning: TOKEN_SMAC_START_PARAMS is
+ * not necessarily used as-is, but is also used to encode the number
+ * and expansion type of substituted parameter. So in the definition
+ *
+ *     %define a(x,=y) ( (x) & ~(y) )
+ *
+ * the token representing `x' will have its type changed to
+ * tok_smac_param(0) but the one representing `y' will be
+ * tok_smac_param(1); see the accessor functions below.
+ *
+ * TOKEN_INTERNAL_STR is a string which has been unquoted, but should
+ * be treated as if it was a quoted string. The code is free to change
+ * one into the other at will. TOKEN_NAKED_STR is a text token which
+ * should be treated as a string, but which MUST NOT be turned into a
+ * quoted string. TOKEN_INTERNAL_STRs can contain any character,
+ * including NUL, but TOKEN_NAKED_STR must be a valid C string.
+ */
+
+static inline enum token_type tok_smac_param(int param)
+{
+    return TOKEN_SMAC_START_PARAMS + param;
+}
+static int smac_nparam(enum token_type toktype)
+{
+    return toktype - TOKEN_SMAC_START_PARAMS;
+}
+static bool is_smac_param(enum token_type toktype)
+{
+    return toktype >= TOKEN_SMAC_START_PARAMS;
+}
+
+/*
+ * This is tuned so struct Token should be 64 bytes on 64-bit
+ * systems and 32 bytes on 32-bit systems. It enables them
+ * to be nicely cache aligned, and the text to still be kept
+ * inline for nearly all tokens.
+ *
+ * We prohibit tokens of length > MAX_TEXT even though
+ * length here is an unsigned int; this avoids problems
+ * if the length is passed through an interface with type "int",
+ * and is absurdly large anyway.
+ *
+ * Earlier versions of the source code incorrectly stated that
+ * examining the text string alone can be unconditionally valid. This
+ * is incorrect, as some token types strip parts of the string,
+ * e.g. indirect tokens.
+ */
+#define INLINE_TEXT (7*sizeof(char *)-sizeof(enum token_type)-sizeof(unsigned int)-1)
+#define MAX_TEXT (INT_MAX-2)
+
+struct Token {
+    Token *next;
+    enum token_type type;
+    unsigned int len;
+    union {
+        char aINLINE_TEXT+1;
+        struct {
+            char padINLINE_TEXT+1 - sizeof(char *);
+            char *ptr;
+        } p;
+    } text;
+};
+
+/*
+ * Note on the storage of both SMacro and MMacros: the hash table
+ * indexes them case-insensitively, and we then have to go through a
+ * linked list of potential case aliases (and, for MMacros, parameter
+ * ranges); this is to preserve the matching semantics of the earlier
+ * code.  If the number of case aliases for a specific macro is a
+ * performance issue, you may want to reconsider your coding style.
+ */
+
+/*
+ * Function call tp obtain the expansion of an smacro
+ */
+typedef Token *(*ExpandSMacro)(const SMacro *s, Token **params, int nparams);
+
+/*
+ * Store the definition of a single-line macro.
+ *
+ * Note: for user-defined macros, SPARM_VARADIC and SPARM_DEFAULT are
+ * currently never set, and SPARM_OPTIONAL is set if and only
+ * if SPARM_GREEDY is set.
+ */
+enum sparmflags {
+    SPARM_PLAIN     =   0,
+    SPARM_EVAL      =   1,  /* Evaluate as a numeric expression (=) */
+    SPARM_STR       =   2,  /* Convert to quoted string ($) */
+    SPARM_NOSTRIP   =   4,  /* Don't strip braces (!) */
+    SPARM_GREEDY    =   8,  /* Greedy final parameter (+) */
+    SPARM_VARADIC   =  16,  /* Any number of separate arguments */
+    SPARM_OPTIONAL  =  32,  /* Optional argument */
+    SPARM_CONDQUOTE =  64,  /* With SPARM_STR, don't re-quote a string */
+    SPARM_UNSIGNED  = 128   /* With SPARM_EVAL, generate unsigned numbers */
+};
+
+struct smac_param {
+    Token name;
+    enum sparmflags flags;
+    char radix;                 /* Radix type for SPARM_EVAL */
+    const Token *def;           /* Default, if any */
+};
+
+struct SMacro {
+    SMacro *next;               /* MUST BE FIRST - see free_smacro() */
+    char *name;
+    Token *expansion;
+    ExpandSMacro expand;
+    intorptr expandpvt;
+    struct smac_param *params;
+    int nparam;                 /* length of the params structure */
+    int nparam_min;             /* allows < nparam arguments */
+    int in_progress;
+    bool recursive;
+    bool varadic;               /* greedy or supports > nparam arguments */
+    bool casesense;
+    bool alias;                 /* This is an alias macro */
+};
+
+/*
+ * "No listing" flags. Inside a loop (%rep..%endrep) we may have
+ * macro listing suppressed with .nolist, but we still need to
+ * update line numbers for error messages and debug information...
+ * unless we are nested inside an actual .nolist macro.
+ */
+enum nolist_flags {
+    NL_LIST   = 1,              /* Suppress list output */
+    NL_LINE   = 2               /* Don't update line information */
+};
+
+/*
+ * Store the definition of a multi-line macro. This is also used to
+ * store the interiors of `%rep...%endrep' blocks, which are
+ * effectively self-re-invoking multi-line macros which simply
+ * don't have a name or bother to appear in the hash tables. %rep
+ * blocks are signified by having a NULL `name' field.
+ *
+ * In a MMacro describing a `%rep' block, the `in_progress' field
+ * isn't merely boolean, but gives the number of repeats left to
+ * run.
+ *
+ * The `next' field is used for storing MMacros in hash tables; the
+ * `next_active' field is for stacking them on istk entries.
+ *
+ * When a MMacro is being expanded, `params', `iline', `nparam',
+ * `paramlen', `rotate' and `unique' are local to the invocation.
+ */
+
+/*
+ * Expansion stack. Note that .mmac can point back to the macro itself,
+ * whereas .mstk cannot.
+ */
+struct mstk {
+    MMacro *mstk;               /* Any expansion, real macro or not */
+    MMacro *mmac;               /* Highest level actual mmacro */
+};
+
+struct MMacro {
+    MMacro *next;
+#if 0
+    MMacroInvocation *prev;     /* previous invocation */
+#endif
+    char *name;
+    int nparam_min, nparam_max;
+    enum nolist_flags nolist;   /* is this macro listing-inhibited? */
+    bool casesense;
+    bool plus;                  /* is the last parameter greedy? */
+    bool capture_label;         /* macro definition has %00; capture label */
+    int32_t in_progress;        /* is this macro currently being expanded? */
+    int32_t max_depth;          /* maximum number of recursive expansions allowed */
+    Token *dlist;               /* All defaults as one list */
+    Token **defaults;           /* Parameter default pointers */
+    int ndefs;                  /* number of default parameters */
+    Line *expansion;
+
+    struct mstk mstk;           /* Macro expansion stack */
+    struct mstk dstk;           /* Macro definitions stack */
+    Token **params;             /* actual parameters */
+    Token *iline;               /* invocation line */
+    struct src_location where;  /* location of definition */
+    unsigned int nparam, rotate;
+    char *iname;                /* name invoked as */
+    int *paramlen;
+    uint64_t unique;
+    uint64_t condcnt;           /* number of if blocks... */
+    struct {                    /* Debug information */
+        struct debug_macro_def *def; /* Definition */
+        struct debug_macro_inv *inv; /* Current invocation (if any) */
+    } dbg;
+};
+
+
+/* Store the definition of a multi-line macro, as defined in a
+ * previous recursive macro expansion.
+ */
+#if 0
+
+struct MMacroInvocation {
+    MMacroInvocation *prev;     /* previous invocation */
+    Token **params;             /* actual parameters */
+    Token *iline;               /* invocation line */
+    unsigned int nparam, rotate;
+    int *paramlen;
+    uint64_t unique;
+    uint64_t condcnt;
+};
+
+#endif
+
+/*
+ * The context stack is composed of a linked list of these.
+ */
+struct Context {
+    Context *next;
+    const char *name;
+    struct hash_table localmac;
+    uint64_t number;
+    unsigned int depth;
+};
+
+
+static inline const char *tok_text(const struct Token *t)
+{
+    return (t->len <= INLINE_TEXT) ? t->text.a : t->text.p.ptr;
+}
+
+/*
+ * Returns a mutable pointer to the text buffer. The text can be changed,
+ * but the length MUST NOT CHANGE, in either direction; nor is it permitted
+ * to pad with null characters to create an artificially shorter string.
+ */
+static inline char *tok_text_buf(struct Token *t)
+{
+    return (t->len <= INLINE_TEXT) ? t->text.a : t->text.p.ptr;
+}
+
+static inline unsigned int tok_check_len(size_t len)
+{
+    if (unlikely(len > MAX_TEXT))
+	nasm_fatal("impossibly large token");
+
+    return len;
+}
+
+static inline bool tok_text_match(const struct Token *a, const struct Token *b)
+{
+    return a->len == b->len && !memcmp(tok_text(a), tok_text(b), a->len);
+}
+
+static inline unused_func bool
+tok_match(const struct Token *a, const struct Token *b)
+{
+    return a->type == b->type && tok_text_match(a, b);
+}
+
+/* strlen() variant useful for set_text() and its variants */
+static size_t tok_strlen(const char *str)
+{
+    return strnlen(str, MAX_TEXT+1);
+}
+
+/*
+ * Set the text field to a copy of the given string; the length if
+ * not given should be obtained with tok_strlen().
+ */
+static Token *set_text(struct Token *t, const char *text, size_t len)
+{
+    char *textp;
+
+    if (t->len > INLINE_TEXT)
+	nasm_free(t->text.p.ptr);
+
+    nasm_zero(t->text);
+
+    t->len = len = tok_check_len(len);
+    textp = (len > INLINE_TEXT)
+	? (t->text.p.ptr = nasm_malloc(len+1)) : t->text.a;
+    memcpy(textp, text, len);
+    textplen = '\0';
+    return t;
+}
+
+/*
+ * Set the text field to the existing pre-allocated string, either
+ * taking over or freeing the allocation in the process.
+ */
+static Token *set_text_free(struct Token *t, char *text, unsigned int len)
+{
+    char *textp;
+
+    if (t->len > INLINE_TEXT)
+	nasm_free(t->text.p.ptr);
+
+    nasm_zero(t->text);
+
+    t->len = len = tok_check_len(len);
+    if (len > INLINE_TEXT) {
+	textp = t->text.p.ptr = text;
+    } else {
+	textp = memcpy(t->text.a, text, len);
+	nasm_free(text);
+    }
+    textplen = '\0';
+
+    return t;
+}
+
+/*
+ * Allocate a new buffer containing a copy of the text field
+ * of the token.
+ */
+static char *dup_text(const struct Token *t)
+{
+    size_t size = t->len + 1;
+    char *p = nasm_malloc(size);
+
+    return memcpy(p, tok_text(t), size);
+}
+
+/*
+ * Multi-line macro definitions are stored as a linked list of
+ * these, which is essentially a container to allow several linked
+ * lists of Tokens.
+ *
+ * Note that in this module, linked lists are treated as stacks
+ * wherever possible. For this reason, Lines are _pushed_ on to the
+ * `expansion' field in MMacro structures, so that the linked list,
+ * if walked, would give the macro lines in reverse order; this
+ * means that we can walk the list when expanding a macro, and thus
+ * push the lines on to the `expansion' field in _istk_ in reverse
+ * order (so that when popped back off they are in the right
+ * order). It may seem cockeyed, and it relies on my design having
+ * an even number of steps in, but it works...
+ *
+ * Some of these structures, rather than being actual lines, are
+ * markers delimiting the end of the expansion of a given macro.
+ * This is for use in the cycle-tracking and %rep-handling code.
+ * Such structures have `finishes' non-NULL, and `first' NULL. All
+ * others have `finishes' NULL, but `first' may still be NULL if
+ * the line is blank.
+ */
+struct Line {
+    Line *next;
+    MMacro *finishes;
+    Token *first;
+    struct src_location where;      /* Where defined */
+};
+
+/*
+ * To handle an arbitrary level of file inclusion, we maintain a
+ * stack (ie linked list) of these things.
+ *
+ * Note: when we issue a message for a continuation line, we want to
+ * issue it for the actual *start* of the continuation line. This means
+ * we need to remember how many lines to skip over for the next one.
+ */
+struct Include {
+    Include *next;
+    FILE *fp;
+    Cond *conds;
+    Line *expansion;
+    uint64_t nolist;            /* Listing inhibit counter */
+    uint64_t noline;            /* Line number update inhibit counter */
+    struct mstk mstk;
+    struct src_location where;  /* Filename and current line number */
+    int32_t lineinc;            /* Increment given by %line */
+    int32_t lineskip;           /* Accounting for passed continuation lines */
+};
+
+/*
+ * File real name hash, so we don't have to re-search the include
+ * path for every pass (and potentially more than that if a file
+ * is used more than once.)
+ */
+struct hash_table FileHash;
+
+/*
+ * Counters to trap on insane macro recursion or processing.
+ * Note: for smacros these count *down*, for mmacros they count *up*.
+ */
+struct deadman {
+    int64_t total;              /* Total number of macros/tokens */
+    int64_t levels;             /* Descent depth across all macros */
+    bool triggered;             /* Already triggered, no need for error msg */
+};
+
+static struct deadman smacro_deadman, mmacro_deadman;
+
+/*
+ * Conditional assembly: we maintain a separate stack of these for
+ * each level of file inclusion. (The only reason we keep the
+ * stacks separate is to ensure that a stray `%endif' in a file
+ * included from within the true branch of a `%if' won't terminate
+ * it and cause confusion: instead, rightly, it'll cause an error.)
+ */
+enum cond_state {
+    /*
+     * These states are for use just after %if or %elif: IF_TRUE
+     * means the condition has evaluated to truth so we are
+     * currently emitting, whereas IF_FALSE means we are not
+     * currently emitting but will start doing so if a %else comes
+     * up. In these states, all directives are admissible: %elif,
+     * %else and %endif. (And of course %if.)
+     */
+    COND_IF_TRUE, COND_IF_FALSE,
+    /*
+     * These states come up after a %else: ELSE_TRUE means we're
+     * emitting, and ELSE_FALSE means we're not. In ELSE_* states,
+     * any %elif or %else will cause an error.
+     */
+    COND_ELSE_TRUE, COND_ELSE_FALSE,
+    /*
+     * These states mean that we're not emitting now, and also that
+     * nothing until %endif will be emitted at all. COND_DONE is
+     * used when we've had our moment of emission
+     * and have now started seeing %elifs. COND_NEVER is used when
+     * the condition construct in question is contained within a
+     * non-emitting branch of a larger condition construct,
+     * or if there is an error.
+     */
+    COND_DONE, COND_NEVER
+};
+struct Cond {
+    Cond *next;
+    enum cond_state state;
+};
+#define emitting(x) ( (x) == COND_IF_TRUE || (x) == COND_ELSE_TRUE )
+
+/*
+ * These defines are used as the possible return values for do_directive
+ */
+#define NO_DIRECTIVE_FOUND  0
+#define DIRECTIVE_FOUND     1
+
+/*
+ * Condition codes. Note that we use c_ prefix not C_ because C_ is
+ * used in nasm.h for the "real" condition codes. At _this_ level,
+ * we treat CXZ and ECXZ as condition codes, albeit non-invertible
+ * ones, so we need a different enum...
+ */
+static const char * const conditions = {
+    "a", "ae", "b", "be", "c", "cxz", "e", "ecxz", "g", "ge", "l", "le",
+    "na", "nae", "nb", "nbe", "nc", "ne", "ng", "nge", "nl", "nle", "no",
+    "np", "ns", "nz", "o", "p", "pe", "po", "rcxz", "s", "z"
+};
+enum pp_conds {
+    c_A, c_AE, c_B, c_BE, c_C, c_CXZ, c_E, c_ECXZ, c_G, c_GE, c_L, c_LE,
+    c_NA, c_NAE, c_NB, c_NBE, c_NC, c_NE, c_NG, c_NGE, c_NL, c_NLE, c_NO,
+    c_NP, c_NS, c_NZ, c_O, c_P, c_PE, c_PO, c_RCXZ, c_S, c_Z,
+    c_none = -1
+};
+static const enum pp_conds inverse_ccs = {
+    c_NA, c_NAE, c_NB, c_NBE, c_NC, -1, c_NE, -1, c_NG, c_NGE, c_NL, c_NLE,
+    c_A, c_AE, c_B, c_BE, c_C, c_E, c_G, c_GE, c_L, c_LE, c_O, c_P, c_S,
+    c_Z, c_NO, c_NP, c_PO, c_PE, -1, c_NS, c_NZ
+};
+
+/*
+ * Directive names.
+ */
+/* If this is a an IF, ELIF, ELSE or ENDIF keyword */
+static int is_condition(enum preproc_token arg)
+{
+    return PP_IS_COND(arg) || (arg == PP_ELSE) || (arg == PP_ENDIF);
+}
+
+static int StackSize = 4;
+static const char *StackPointer = "ebp";
+static int ArgOffset = 8;
+static int LocalOffset = 0;
+
+static Context *cstk;
+static Include *istk;
+static const struct strlist *ipath_list;
+
+static struct strlist *deplist;
+
+static uint64_t unique;     /* unique identifier numbers */
+
+static Line *predef = NULL;
+static bool do_predef;
+static enum preproc_mode pp_mode;
+
+/*
+ * The current set of multi-line macros we have defined.
+ */
+static struct hash_table mmacros;
+
+/*
+ * The current set of single-line macros we have defined.
+ */
+static struct hash_table smacros;
+
+/*
+ * The multi-line macro we are currently defining, or the %rep
+ * block we are currently reading, if any.
+ */
+static MMacro *defining;
+
+static uint64_t nested_mac_count;
+static uint64_t nested_rep_count;
+
+/*
+ * The number of macro parameters to allocate space for at a time.
+ */
+#define PARAM_DELTA 16
+
+/*
+ * The standard macro set: defined in macros.c in a set of arrays.
+ * This gives our position in any macro set, while we are processing it.
+ * The stdmacset is an array of such macro sets.
+ */
+static macros_t *stdmacpos;
+static macros_t **stdmacnext;
+static macros_t *stdmacros8;
+static macros_t *extrastdmac;
+
+/*
+ * Map of which %use packages have been loaded
+ */
+static bool *use_loaded;
+
+/*
+ * Forward declarations.
+ */
+static void pp_add_stdmac(macros_t *macros);
+static Token *expand_mmac_params(Token * tline);
+static Token *expand_smacro(Token * tline);
+static Token *expand_id(Token * tline);
+static Context *get_ctx(const char *name, const char **namep);
+static Token *make_tok_num(Token *next, int64_t val);
+static Token *
+make_tok_num_radix(Token *next, int64_t val, char radix, bool uns);
+static int64_t get_tok_num(const Token *t, bool *err);
+static Token *make_tok_qstr(Token *next, const char *str);
+static Token *make_tok_qstr_len(Token *next, const char *str, size_t len);
+static Token *make_tok_char(Token *next, char op);
+static Token *new_Token(Token * next, enum token_type type,
+                        const char *text, size_t txtlen);
+static Token *new_Token_free(Token * next, enum token_type type,
+                             char *text, size_t txtlen);
+static Token *dup_Token(Token *next, const Token *src);
+static Token *new_White(Token *next);
+static Token *delete_Token(Token *t);
+static Token *steal_Token(Token *dst, Token *src);
+static const struct use_package *
+get_use_pkg(Token *t, const char *dname, const char **name);
+static void mark_smac_params(Token *tline, const SMacro *tmpl,
+                             enum token_type type);
+
+/* Safe extraction of token type */
+static inline enum token_type tok_type(const Token *x)
+{
+    return x ? x->type : TOKEN_EOS;
+}
+
+/* Safe test for token type, false on x == NULL */
+static inline bool tok_is(const Token *x, enum token_type t)
+{
+    return tok_type(x) == t;
+}
+/* True if token is any other kind other that "c", but not NULL */
+static inline bool tok_isnt(const Token *x, enum token_type t)
+{
+    return x && x->type != t;
+}
+
+/* Whitespace token? */
+static inline bool tok_white(const Token *x)
+{
+    return tok_is(x, TOKEN_WHITESPACE);
+}
+
+/* Skip past any whitespace */
+static inline Token *skip_white(Token *x)
+{
+    while (tok_white(x))
+        x = x->next;
+
+    return x;
+}
+
+/* Delete any whitespace */
+static Token *zap_white(Token *x)
+{
+    while (tok_white(x))
+        x = delete_Token(x);
+
+    return x;
+}
+
+/*
+ * Unquote a token if it is a string, and set its type to
+ * TOKEN_INTERNAL_STR.
+ */
+
+/*
+ * Common version for any kind of quoted string; see asm/quote.c for
+ * information about the arguments.
+ */
+static const char *unquote_token_anystr(Token *t, uint32_t badctl, char qstart)
+{
+    size_t nlen, olen;
+    char *p;
+
+    if (t->type != TOKEN_STR)
+	return tok_text(t);
+
+    olen = t->len;
+    p = (olen > INLINE_TEXT) ? t->text.p.ptr : t->text.a;
+    t->len = nlen = nasm_unquote_anystr(p, NULL, badctl, qstart);
+    t->type = TOKEN_INTERNAL_STR;
+
+    if (olen <= INLINE_TEXT || nlen > INLINE_TEXT)
+        return p;
+
+    nasm_zero(t->text.a);
+    memcpy(t->text.a, p, nlen);
+    nasm_free(p);
+    return t->text.a;
+}
+
+/* Unquote any string, can produce any arbitrary binary output */
+static const char *unquote_token(Token *t)
+{
+    return unquote_token_anystr(t, 0, STR_NASM);
+}
+
+/*
+ * Same as unquote_token(), but error out if the resulting string
+ * contains unacceptable control characters.
+ */
+static const char *unquote_token_cstr(Token *t)
+{
+    return unquote_token_anystr(t, BADCTL, STR_NASM);
+}
+
+/*
+ * Convert a TOKEN_INTERNAL_STR token to a quoted
+ * TOKEN_STR tokens.
+ */
+static Token *quote_any_token(Token *t);
+static inline unused_func
+Token *quote_token(Token *t)
+{
+    if (likely(!tok_is(t, TOKEN_INTERNAL_STR)))
+	return t;
+
+    return quote_any_token(t);
+}
+
+/*
+ * Convert *any* kind of token to a quoted
+ * TOKEN_STR token.
+ */
+static Token *quote_any_token(Token *t)
+{
+    size_t len = t->len;
+    char *p;
+
+    p = nasm_quote(tok_text(t), &len);
+    t->type = TOKEN_STR;
+    return set_text_free(t, p, len);
+}
+
+/*
+ * In-place reverse a list of tokens.
+ */
+static Token *reverse_tokens(Token *t)
+{
+    Token *prev = NULL;
+    Token *next;
+
+    while (t) {
+        next = t->next;
+        t->next = prev;
+        prev = t;
+        t = next;
+    }
+
+    return prev;
+}
+
+/*
+ * getenv() variant operating on an input token
+ */
+static const char *pp_getenv(const Token *t, bool warn)
+{
+    const char *txt = tok_text(t);
+    const char *v;
+    char *buf = NULL;
+    bool is_string = false;
+
+    if (!t)
+	return NULL;
+
+    switch (t->type) {
+    case TOKEN_ENVIRON:
+	txt += 2;		/* Skip leading %! */
+	is_string = nasm_isquote(*txt);
+	break;
+
+    case TOKEN_STR:
+	is_string = true;
+	break;
+
+    case TOKEN_INTERNAL_STR:
+    case TOKEN_NAKED_STR:
+    case TOKEN_ID:
+	is_string = false;
+	break;
+
+    default:
+	return NULL;
+    }
+
+    if (is_string) {
+	buf = nasm_strdup(txt);
+	nasm_unquote_cstr(buf, NULL);
+	txt = buf;
+    }
+
+    v = getenv(txt);
+    if (warn && !v) {
+	/*!
+	 *!pp-environment on nonexistent environment variable
+         *!=environment
+	 *!  warns if a nonexistent environment variable
+	 *!  is accessed using the \c{%!} preprocessor
+	 *!  construct (see \k{getenv}.)  Such environment
+	 *!  variables are treated as empty (with this
+	 *!  warning issued) starting in NASM 2.15;
+	 *!  earlier versions of NASM would treat this as
+	 *!  an error.
+	 */
+	nasm_warn(WARN_PP_ENVIRONMENT,
+                  "nonexistent environment variable `%s'", txt);
+	v = "";
+    }
+
+    if (buf)
+	nasm_free(buf);
+
+    return v;
+}
+
+/*
+ * Free a linked list of tokens.
+ */
+static void free_tlist(Token * list)
+{
+    while (list)
+        list = delete_Token(list);
+}
+
+/*
+ * Free a linked list of lines.
+ */
+static void free_llist(Line * list)
+{
+    Line *l, *tmp;
+    list_for_each_safe(l, tmp, list) {
+        free_tlist(l->first);
+        nasm_free(l);
+    }
+}
+
+/*
+ * Free an array of linked lists of tokens
+ */
+static void free_tlist_array(Token **array, size_t nlists)
+{
+    Token **listp = array;
+
+    if (!array)
+        return;
+
+    while (nlists--)
+        free_tlist(*listp++);
+
+    nasm_free(array);
+}
+
+/*
+ * Duplicate a linked list of tokens.
+ */
+static Token *dup_tlist(const Token *list, Token ***tailp)
+{
+    Token *newlist = NULL;
+    Token **tailpp = &newlist;
+    const Token *t;
+
+    list_for_each(t, list) {
+        Token *nt;
+        *tailpp = nt = dup_Token(NULL, t);
+        tailpp = &nt->next;
+    }
+
+    if (tailp) {
+        **tailp = newlist;
+        *tailp = tailpp;
+    }
+
+    return newlist;
+}
+
+/*
+ * Duplicate a linked list of tokens with a maximum count
+ */
+static Token *dup_tlistn(const Token *list, size_t cnt, Token ***tailp)
+{
+    Token *newlist = NULL;
+    Token **tailpp = &newlist;
+    const Token *t;
+
+    list_for_each(t, list) {
+        Token *nt;
+        if (!cnt--)
+            break;
+        *tailpp = nt = dup_Token(NULL, t);
+        tailpp = &nt->next;
+    }
+
+    if (tailp) {
+        **tailp = newlist;
+        if (newlist)
+            *tailp = tailpp;
+    }
+
+    return newlist;
+}
+
+/*
+ * Duplicate a linked list of tokens in reverse order
+ */
+static Token *dup_tlist_reverse(const Token *list, Token *tail)
+{
+    const Token *t;
+
+    list_for_each(t, list)
+        tail = dup_Token(tail, t);
+
+    return tail;
+}
+
+/*
+ * Append an existing tlist to a tail pointer and returns the
+ * updated tail pointer.
+ */
+static Token **steal_tlist(Token *tlist, Token **tailp)
+{
+    *tailp = tlist;
+
+    if (!tlist)
+        return tailp;
+
+    list_last(tlist, tlist);
+    return &tlist->next;
+}
+
+/*
+ * Free an MMacro
+ */
+static void free_mmacro(MMacro * m)
+{
+    nasm_free(m->name);
+    free_tlist(m->dlist);
+    nasm_free(m->defaults);
+    free_llist(m->expansion);
+    nasm_free(m);
+}
+
+/*
+ * Clear or free an SMacro
+ */
+static void free_smacro_members(SMacro *s)
+{
+    if (s->params) {
+        int i;
+        for (i = 0; i < s->nparam; i++) {
+	    if (s->paramsi.name.len > INLINE_TEXT)
+		nasm_free(s->paramsi.name.text.p.ptr);
+            if (s->paramsi.def)
+                free_tlist((Token *)s->paramsi.def);
+	}
+        nasm_free(s->params);
+    }
+    nasm_free(s->name);
+    free_tlist(s->expansion);
+}
+
+static void clear_smacro(SMacro *s)
+{
+    free_smacro_members(s);
+    /* Wipe everything except the next pointer */
+    memset(&s->name, 0, sizeof(*s) - offsetof(SMacro, name));
+}
+
+/*
+ * Free an SMacro
+ */
+static void free_smacro(SMacro *s)
+{
+    free_smacro_members(s);
+    nasm_free(s);
+}
+
+/*
+ * Free all currently defined macros, and free the hash tables if empty
+ */
+enum clear_what {
+    CLEAR_NONE      = 0,
+    CLEAR_DEFINE    = 1,         /* Clear smacros */
+    CLEAR_DEFALIAS  = 2,         /* Clear smacro aliases */
+    CLEAR_ALLDEFINE = CLEAR_DEFINE|CLEAR_DEFALIAS,
+    CLEAR_MMACRO    = 4,
+    CLEAR_ALL       = CLEAR_ALLDEFINE|CLEAR_MMACRO
+};
+
+static void clear_smacro_table(struct hash_table *smt, enum clear_what what)
+{
+    struct hash_iterator it;
+    const struct hash_node *np;
+    bool empty = true;
+
+    /*
+     * Walk the hash table and clear out anything we don't want
+     */
+    hash_for_each(smt, it, np) {
+        SMacro *tmp;
+        SMacro *s = np->data;
+        SMacro **head = (SMacro **)&np->data;
+
+        list_for_each_safe(s, tmp, s) {
+            if (what & ((enum clear_what)s->alias + 1)) {
+                *head = s->next;
+                free_smacro(s);
+            } else {
+                empty = false;
+            }
+        }
+    }
+
+    /*
+     * Free the hash table and keys if and only if it is now empty.
+     * Note: we cannot free keys even for an empty list above, as that
+     * mucks up the hash algorithm.
+     */
+    if (empty)
+        hash_free_all(smt, true);
+}
+
+static void free_smacro_table(struct hash_table *smt)
+{
+    clear_smacro_table(smt, CLEAR_ALLDEFINE);
+}
+
+static void free_mmacro_table(struct hash_table *mmt)
+{
+    struct hash_iterator it;
+    const struct hash_node *np;
+
+    hash_for_each(mmt, it, np) {
+        MMacro *tmp;
+        MMacro *m = np->data;
+        nasm_free((void *)np->key);
+        list_for_each_safe(m, tmp, m)
+            free_mmacro(m);
+    }
+    hash_free(mmt);
+}
+
+static void free_macros(void)
+{
+    free_smacro_table(&smacros);
+    free_mmacro_table(&mmacros);
+}
+
+/*
+ * Initialize the hash tables
+ */
+static void init_macros(void)
+{
+}
+
+/*
+ * Pop the context stack.
+ */
+static void ctx_pop(void)
+{
+    Context *c = cstk;
+
+    cstk = cstk->next;
+    free_smacro_table(&c->localmac);
+    nasm_free((char *)c->name);
+    nasm_free(c);
+}
+
+/*
+ * Search for a key in the hash index; adding it if necessary
+ * (in which case we initialize the data pointer to NULL.)
+ */
+static void **
+hash_findi_add(struct hash_table *hash, const char *str)
+{
+    struct hash_insert hi;
+    void **r;
+    char *strx;
+    size_t l = strlen(str) + 1;
+
+    r = hash_findib(hash, str, l, &hi);
+    if (r)
+        return r;
+
+    strx = nasm_malloc(l);  /* Use a more efficient allocator here? */
+    memcpy(strx, str, l);
+    return hash_add(&hi, strx, NULL);
+}
+
+/*
+ * Like hash_findi, but returns the data element rather than a pointer
+ * to it.  Used only when not adding a new element, hence no third
+ * argument.
+ */
+static void *
+hash_findix(struct hash_table *hash, const char *str)
+{
+    void **p;
+
+    p = hash_findi(hash, str, NULL);
+    return p ? *p : NULL;
+}
+
+/*
+ * read line from standard macros set,
+ * if there no more left -- return NULL
+ */
+static char *line_from_stdmac(void)
+{
+    unsigned char c;
+    const unsigned char *p = stdmacpos;
+    char *line, *q;
+    size_t len = 0;
+
+    if (!stdmacpos)
+        return NULL;
+
+    /*
+     * 32-126 is ASCII, 127 is end of line, 128-31 are directives
+     * (allowed to wrap around) corresponding to PP_* tokens 0-159.
+     */
+    while ((c = *p++) != 127) {
+        uint8_t ndir = c - 128;
+        if (ndir < 256-96)
+            len += pp_directives_lenndir + 1;
+        else
+            len++;
+    }
+
+    line = nasm_malloc(len + 1);
+    q = line;
+
+    while ((c = *stdmacpos++) != 127) {
+        uint8_t ndir = c - 128;
+        if (ndir < 256-96) {
+            memcpy(q, pp_directivesndir, pp_directives_lenndir);
+            q += pp_directives_lenndir;
+            *q++ = ' ';
+        } else {
+            *q++ = c;
+        }
+    }
+    stdmacpos = p;
+    *q = '\0';
+
+    if (*stdmacpos == 127) {
+        /* This was the last of this particular macro set */
+        stdmacpos = NULL;
+        if (*stdmacnext) {
+            stdmacpos = *stdmacnext++;
+        } else if (do_predef) {
+            Line *pd, *l;
+
+            /*
+             * Nasty hack: here we push the contents of
+             * `predef' on to the top-level expansion stack,
+             * since this is the most convenient way to
+             * implement the pre-include and pre-define
+             * features.
+             */
+            list_for_each(pd, predef) {
+                nasm_new(l);
+                l->next     = istk->expansion;
+                l->first    = dup_tlist(pd->first, NULL);
+                l->finishes = NULL;
+
+                istk->expansion = l;
+            }
+            do_predef = false;
+        }
+    }
+
+    return line;
+}
+
+/*
+ * Read a line from a file. Return NULL on end of file.
+ */
+static char *line_from_file(FILE *f)
+{
+    int c;
+    unsigned int size, next;
+    const unsigned int delta = 512;
+    const unsigned int pad = 8;
+    bool cont = false;
+    char *buffer, *p;
+
+    istk->where.lineno += istk->lineskip + istk->lineinc;
+    src_set_linnum(istk->where.lineno);
+    istk->lineskip = 0;
+
+    size = delta;
+    p = buffer = nasm_malloc(size);
+
+    do {
+        c = fgetc(f);
+
+        switch (c) {
+        case EOF:
+            if (p == buffer) {
+                nasm_free(buffer);
+                return NULL;
+            }
+            c = 0;
+            break;
+
+        case '\r':
+            next = fgetc(f);
+            if (next != '\n')
+                ungetc(next, f);
+            if (cont) {
+                cont = false;
+                continue;
+            }
+            c = 0;
+            break;
+
+        case '\n':
+            if (cont) {
+                cont = false;
+                continue;
+            }
+            c = 0;
+            break;
+
+        case 032:               /* ^Z = legacy MS-DOS end of file mark */
+            c = 0;
+            break;
+
+        case '\\':
+            next = fgetc(f);
+            ungetc(next, f);
+            if (next == '\r' || next == '\n') {
+                cont = true;
+                istk->lineskip += istk->lineinc;
+                continue;
+            }
+            break;
+        }
+
+        if (p >= (buffer + size - pad)) {
+            buffer = nasm_realloc(buffer, size + delta);
+            p = buffer + size - pad;
+            size += delta;
+        }
+
+        *p++ = c;
+    } while (c);
+
+    return buffer;
+}
+
+/*
+ * Common read routine regardless of source
+ */
+static char *read_line(void)
+{
+    char *line;
+    FILE *f = istk->fp;
+
+    if (f)
+        line = line_from_file(f);
+    else
+        line = line_from_stdmac();
+
+    if (!line)
+        return NULL;
+
+    if (!istk->nolist)
+        lfmt->line(LIST_READ, istk->where.lineno, line);
+
+    return line;
+}
+
+/*
+ * Tokenize a line of text. This is a very simple process since we
+ * don't need to parse the value out of e.g. numeric tokens: we
+ * simply split one string into many.
+ */
+static Token *tokenize(const char *line)
+{
+    enum token_type type;
+    Token *list = NULL;
+    Token *t, **tail = &list;
+
+    while (*line) {
+        const char *p = line;
+        const char *ep = NULL;  /* End of token, for trimming the end */
+        size_t toklen;
+        char firstchar = *p;    /* Can be used to override the first char */
+
+        if (*p == '%') {
+            /*
+             * Preprocessor construct; find the end of the token.
+             * Classification is handled later, because %{...} can be
+             * used to create any preprocessor token.
+             */
+            p++;
+            if (*p == '+' && !nasm_isdigit(p1)) {
+                /* Paste token */
+                p++;
+            } else if (nasm_isdigit(*p) ||
+                       ((*p == '-' || *p == '+') && nasm_isdigit(p1))) {
+                do {
+                    p++;
+                }
+                while (nasm_isdigit(*p));
+            } else if (*p == '{' || *p == '') {
+                /* %{...} or %... */
+                char firstchar = *p;
+                char endchar = *p + 2; /* } or  */
+                int lvl = 1;
+                line += (*p++ == '{'); /* Skip { but not  (yet) */
+                while (lvl) {
+                    if (*p == firstchar) {
+                        lvl++;
+                    } else if (*p == endchar) {
+                        lvl--;
+                    } else if (nasm_isquote(*p)) {
+                        p = nasm_skip_string(p);
+                    }
+
+                    /*
+                     * *p can have been advanced to a null character by
+                     * nasm_skip_string()
+                     */
+                    if (!*p) {
+                        /*!
+                         *!pp-open-brackets on unterminated \c{%...}
+                         *!  warns that a preprocessor \c{%...} construct
+                         *!  lacks the terminating \c{} character.
+                         */
+                        /*!
+                         *!pp-open-braces on unterminated \c{%\{...\}}
+                         *!  warns that a preprocessor parameter
+                         *!  enclosed in braces \c{%\{...\}} lacks the
+                         *!  terminating \c{\}} character.
+                         */
+                        nasm_warn(firstchar == '}' ?
+                                  WARN_PP_OPEN_BRACES : WARN_PP_OPEN_BRACKETS,
+                                  "unterminated %%%c...%c construct (missing `%c')",
+                                  firstchar, endchar, endchar);
+                        break;
+                    }
+                    p++;
+                }
+                ep = lvl ? p : p-1; /* Terminal character not part of token */
+            } else if (*p == '?') {
+                /* %? or %?? */
+                p++;
+                if (*p == '?')
+                    p++;
+            } else if (*p == '*' && p1 == '?') {
+                /* %*? and %*?? */
+                p += 2;
+                if (*p == '?')
+                    p++;
+            } else if (*p == '!') {
+                /* Environment variable reference */
+                p++;
+                if (nasm_isidchar(*p)) {
+                    do {
+                        p++;
+                    }
+                    while (nasm_isidchar(*p));
+                } else if (nasm_isquote(*p)) {
+                    p = nasm_skip_string(p);
+                    if (*p)
+                        p++;
+                    else
+                        nasm_nonfatal("unterminated %%! string");
+                } else {
+                    /* %! without anything else... */
+                }
+            } else if (*p == ',') {
+                /* Conditional comma */
+                p++;
+            } else if (nasm_isidchar(*p) ||
+                       ((*p == '%' || *p == '$') && nasm_isidchar(p1))) {
+                /* Identifier or some sort */
+                do {
+                    p++;
+                }
+                while (nasm_isidchar(*p));
+            } else if (*p == '%') {
+                /* %% operator */
+                p++;
+            }
+
+            if (!ep)
+                ep = p;
+            toklen = ep - line;
+
+            /* Classify here, to handle %{...} correctly */
+            if (toklen < 2) {
+                type = '%';     /* % operator */
+                if (unlikely(*line == '{')) {
+                    /*!
+                     *!pp-empty-braces on empty \c{%\{\}} construct
+                     *!  warns that an empty \c{%\{\}} was encountered.
+                     *!  This expands to a single \c{%} character, which
+                     *!  is normally the \c{%} arithmetic operator.
+                     */
+                    nasm_warn(WARN_PP_EMPTY_BRACES,
+                              "empty %%{} construct expands to the %% operator");
+                }
+            } else {
+                char c0 = line1;
+
+                switch (c0) {
+                case '+':
+                    type = (toklen == 2) ? TOKEN_PASTE : TOKEN_MMACRO_PARAM;
+                    break;
+
+                case '-':
+                    type = TOKEN_MMACRO_PARAM;
+                    break;
+
+                case '?':
+                    if (toklen == 2)
+                        type = TOKEN_PREPROC_Q;
+                    else if (toklen == 3 && line2 == '?')
+                        type = TOKEN_PREPROC_QQ;
+                    else
+                        type = TOKEN_PREPROC_ID;
+                    break;
+
+                case '*':
+                    type = TOKEN_OTHER;
+                    if (line2 == '?') {
+                        if (toklen == 3)
+                            type = TOKEN_PREPROC_SQ;
+                        else if (toklen == 4 && line3 == '?')
+                            type = TOKEN_PREPROC_SQQ;
+                    }
+                    break;
+
+                case '!':
+                    type = (toklen == 2) ? TOKEN_OTHER : TOKEN_ENVIRON;
+                    break;
+
+                case '%':
+                    type = (toklen == 2) ? TOKEN_SMOD : TOKEN_LOCAL_SYMBOL;
+                    break;
+
+                case '$':
+                    type = (toklen == 2) ? TOKEN_OTHER : TOKEN_LOCAL_MACRO;
+                    break;
+
+                case '':
+                    line += 2;  /* Skip % */
+                    firstchar = *line; /* Don't clobber */
+                    toklen -= 2;
+                    type = TOKEN_INDIRECT;
+                    break;
+
+                case ',':
+                    type = (toklen == 2) ? TOKEN_COND_COMMA : TOKEN_PREPROC_ID;
+                    break;
+
+                case '\'':
+                case '\"':
+                case '`':
+                    /* %{'string'} */
+                    type = TOKEN_PREPROC_ID;
+                    break;
+
+                case ':':
+                    type = TOKEN_MMACRO_PARAM; /* %{:..} */
+                    break;
+
+                default:
+                    if (nasm_isdigit(c0))
+                        type = TOKEN_MMACRO_PARAM;
+                    else if (nasm_isidchar(c0) || toklen > 2)
+                        type = TOKEN_PREPROC_ID;
+                    else
+                        type = TOKEN_OTHER;
+                    break;
+                }
+            }
+        } else if (*p == '?' && !nasm_isidchar(p1)) {
+            /* ? operator */
+            type = TOKEN_QMARK;
+            p++;
+        } else if (nasm_isidstart(*p) || (*p == '$' && nasm_isidstart(p1))) {
+            /*
+             * A regular identifier. This includes keywords which are not
+             * special to the preprocessor.
+             */
+            type = TOKEN_ID;
+            while (nasm_isidchar(*++p))
+                ;
+         } else if (nasm_isquote(*p)) {
+            /*
+             * A string token.
+             */
+            char quote = *p;
+
+            type = TOKEN_STR;
+            p = nasm_skip_string(p);
+
+            if (*p) {
+                p++;
+            } else {
+                /*!
+                 *!pp-open-string on unterminated string
+                 *!  warns that a quoted string without a closing quotation
+                 *!  mark was encountered during preprocessing.
+                 */
+                nasm_warn(WARN_PP_OPEN_STRING,
+                          "unterminated string (missing `%c')", quote);
+                type = TOKEN_ERRSTR;
+            }
+        } else if (p0 == '$' && p1 == '$') {
+            type = TOKEN_BASE;
+            p += 2;
+        } else if (nasm_isnumstart(*p)) {
+            bool is_hex = false;
+            bool is_float = false;
+            bool has_e = false;
+            char c;
+
+            /*
+             * A numeric token.
+             */
+
+            if (*p == '$') {
+                p++;
+                is_hex = true;
+            }
+
+            for (;;) {
+                c = *p++;
+
+                if (!is_hex && (c == 'e' || c == 'E')) {
+                    has_e = true;
+                    if (*p == '+' || *p == '-') {
+                        /*
+                         * e can only be followed by +/- if it is either a
+                         * prefixed hex number or a floating-point number
+                         */
+                        p++;
+                        is_float = true;
+                    }
+                } else if (c == 'H' || c == 'h' || c == 'X' || c == 'x') {
+                    is_hex = true;
+                } else if (c == 'P' || c == 'p') {
+                    is_float = true;
+                    if (*p == '+' || *p == '-')
+                        p++;
+                } else if (nasm_isnumchar(c))
+                    ; /* just advance */
+                else if (c == '.') {
+                    /*
+                     * we need to deal with consequences of the legacy
+                     * parser, like "1.nolist" being two tokens
+                     * (TOKEN_NUM, TOKEN_ID) here; at least give it
+                     * a shot for now.  In the future, we probably need
+                     * a flex-based scanner with proper pattern matching
+                     * to do it as well as it can be done.  Nothing in
+                     * the world is going to help the person who wants
+                     * 0x123.p16 interpreted as two tokens, though.
+                     */
+                    const char *r = p;
+                    while (*r == '_')
+                        r++;
+
+                    if (nasm_isdigit(*r) || (is_hex && nasm_isxdigit(*r)) ||
+                        (!is_hex && (*r == 'e' || *r == 'E')) ||
+                        (*r == 'p' || *r == 'P')) {
+                        p = r;
+                        is_float = true;
+                    } else
+                        break;  /* Terminate the token */
+                } else
+                    break;
+            }
+            p--;        /* Point to first character beyond number */
+
+            if (p == line+1 && *line == '$') {
+                type = TOKEN_HERE;
+            } else {
+                if (has_e && !is_hex) {
+                    /* 1e13 is floating-point, but 1e13h is not */
+                    is_float = true;
+                }
+
+                type = is_float ? TOKEN_FLOAT : TOKEN_NUM;
+            }
+        } else if (nasm_isspace(*p)) {
+            firstchar = ' ';    /* Always a single space */
+            type = TOKEN_WHITESPACE;
+            p = nasm_skip_spaces(p);
+            /*
+             * Whitespace just before end-of-line is discarded by
+             * pretending it's a comment; whitespace just before a
+             * comment gets lumped into the comment.
+             */
+            if (!*p || *p == ';')
+                type = TOKEN_EOS;
+        } else if (*p == ';') {
+            type = TOKEN_EOS;
+        } else {
+            /*
+             * Anything else is an operator of some kind. We check
+             * for all the double-character operators (>>, <<, //,
+             * %%, <=, >=, ==, !=, <>, &&, ||, ^^) and the triple-
+	     * character operators (<<<, >>>, <=>) but anything
+             * else is a single-character operator.
+             */
+            type = (unsigned char)*p;
+	    switch (*p++) {
+	    case '>':
+		if (*p == '>') {
+		    p++;
+                    type = TOKEN_SHR;
+		    if (*p == '>') {
+                        type = TOKEN_SAR;
+			p++;
+                    }
+		} else if (*p == '=') {
+                    type = TOKEN_GE;
+                    p++;
+                }
+		break;
+
+	    case '<':
+		if (*p == '<') {
+		    p++;
+                    type = TOKEN_SHL;
+		    if (*p == '<')
+			p++;
+		} else if (*p == '=') {
+		    p++;
+                    type = TOKEN_LE;
+		    if (*p == '>') {
+			p++;
+                        type = TOKEN_LEG;
+                    }
+		} else if (*p == '>') {
+		    p++;
+                    type = TOKEN_NE;
+		}
+		break;
+
+	    case '!':
+		if (*p == '=') {
+		    p++;
+                    type = TOKEN_NE;
+                }
+		break;
+
+	    case '/':
+                if (*p == '/') {
+                    p++;
+                    type = TOKEN_SDIV;
+                }
+                break;
+	    case '=':
+                if (*p == '=')
+                    p++;        /* Still TOKEN_EQ == '=' though */
+                break;
+	    case '&':
+                if (*p == '&') {
+                    p++;
+                    type = TOKEN_DBL_AND;
+                }
+                break;
+
+	    case '|':
+                if (*p == '|') {
+                    p++;
+                    type = TOKEN_DBL_OR;
+                }
+                break;
+
+	    case '^':
+                if (*p == '^') {
+                    p++;
+                    type = TOKEN_DBL_XOR;
+                }
+		break;
+
+	    default:
+		break;
+	    }
+        }
+
+        if (type == TOKEN_EOS)
+            break;              /* done with the string... */
+
+        if (!ep)
+            ep = p;
+        toklen = ep - line;
+
+        if (toklen) {
+            *tail = t = new_Token(NULL, type, line, toklen);
+            *tok_text_buf(t) = firstchar; /* E.g. %{foo} -> {foo -> %foo */
+            tail = &t->next;
+        }
+
+        line = p;
+    }
+    return list;
+}
+
+/*
+ * Tokens are allocated in blocks to improve speed. Set the blocksize
+ * to 0 to use regular nasm_malloc(); this is useful for debugging.
+ *
+ * alloc_Token() returns a zero-initialized token structure.
+ */
+#define TOKEN_BLOCKSIZE 4096
+
+#if TOKEN_BLOCKSIZE
+
+static Token *freeTokens  = NULL;
+static Token *tokenblocks = NULL;
+
+static Token *alloc_Token(void)
+{
+    Token *t = freeTokens;
+
+    if (unlikely(!t)) {
+        Token *block;
+        size_t i;
+
+        nasm_newn(block, TOKEN_BLOCKSIZE);
+
+        /*
+         * The first entry in each array are a linked list of
+         * block allocations and is not used for data.
+         */
+        block0.next = tokenblocks;
+	block0.type = TOKEN_BLOCK;
+        tokenblocks = block;
+
+        /*
+         * Add the rest to the free list
+         */
+        for (i = 2; i < TOKEN_BLOCKSIZE - 1; i++)
+            blocki.next = &blocki+1;
+
+        freeTokens = &block2;
+
+        /*
+         * Return the topmost usable token
+         */
+        return &block1;
+    }
+
+    freeTokens = t->next;
+    t->next = NULL;
+    return t;
+}
+
+static Token *delete_Token(Token *t)
+{
+    Token *next;
+
+    nasm_assert(t && t->type != TOKEN_FREE);
+
+    next = t->next;
+    nasm_zero(*t);
+    t->type = TOKEN_FREE;
+    t->next = freeTokens;
+    freeTokens = t;
+
+    return next;
+}
+
+static void delete_Blocks(void)
+{
+    Token *block, *blocktmp;
+
+    list_for_each_safe(block, blocktmp, tokenblocks)
+        nasm_free(block);
+
+    freeTokens = tokenblocks = NULL;
+}
+
+#else
+
+static inline Token *alloc_Token(void)
+{
+    Token *t;
+    nasm_new(t);
+    return t;
+}
+
+static Token *delete_Token(Token *t)
+{
+    Token *next = t->next;
+    nasm_free(t);
+    return next;
+}
+
+static inline void delete_Blocks(void)
+{
+    /* Nothing to do */
+}
+
+#endif
+
+/*
+ *  this function creates a new Token and passes a pointer to it
+ *  back to the caller.  It sets the type, text, and next pointer elements.
+ */
+static Token *new_Token(Token * next, enum token_type type,
+                        const char *text, size_t txtlen)
+{
+    Token *t = alloc_Token();
+    char *textp;
+
+    t->next = next;
+    t->type = type;
+    if (type == TOKEN_WHITESPACE) {
+        t->len = 1;
+        t->text.a0 = ' ';
+    } else {
+        if (text && text0 && !txtlen)
+            txtlen = tok_strlen(text);
+
+        t->len = tok_check_len(txtlen);
+
+        if (text) {
+            textp = (txtlen > INLINE_TEXT)
+                ? (t->text.p.ptr = nasm_malloc(txtlen+1)) : t->text.a;
+            memcpy(textp, text, txtlen);
+            textptxtlen = '\0';   /* In case we needed malloc() */
+        } else {
+            /*
+             * Allocate a buffer but do not fill it. The caller
+             * can fill in text, but must not change the length.
+             * The filled in text must be exactly txtlen once
+             * the buffer is filled and before the token is added
+             * to any line lists.
+             */
+            if (txtlen > INLINE_TEXT)
+                t->text.p.ptr = nasm_zalloc(txtlen+1);
+        }
+    }
+    return t;
+}
+
+/*
+ * Same as new_Token(), but text belongs to the new token and is
+ * either taken over or freed.  This function MUST be called
+ * with valid txt and txtlen, unlike new_Token().
+ */
+static Token *new_Token_free(Token * next, enum token_type type,
+                             char *text, size_t txtlen)
+{
+    Token *t = alloc_Token();
+
+    t->next = next;
+    t->type = type;
+    t->len = tok_check_len(txtlen);
+
+    if (txtlen <= INLINE_TEXT) {
+        memcpy(t->text.a, text, txtlen);
+        nasm_free(text);
+    } else {
+        t->text.p.ptr = text;
+    }
+
+    return t;
+}
+
+static Token *dup_Token(Token *next, const Token *src)
+{
+    Token *t = alloc_Token();
+
+    memcpy(t, src, sizeof *src);
+    t->next = next;
+
+    if (t->len > INLINE_TEXT) {
+        t->text.p.ptr = nasm_malloc(t->len + 1);
+        memcpy(t->text.p.ptr, src->text.p.ptr, t->len+1);
+    }
+
+    return t;
+}
+
+static Token *new_White(Token *next)
+{
+    Token *t = alloc_Token();
+
+    t->next = next;
+    t->type = TOKEN_WHITESPACE;
+    t->len  = 1;
+    t->text.a0 = ' ';
+
+    return t;
+}
+
+/*
+ * This *transfers* the content from one token to another, leaving the
+ * next pointer of the latter intact. Unlike dup_Token(), the old
+ * token is destroyed, except for its next pointer, and the text
+ * pointer allocation, if any, is simply transferred.
+ */
+static Token *steal_Token(Token *dst, Token *src)
+{
+    /* Overwrite everything except the next pointers */
+    memcpy((char *)dst + sizeof(Token *), (char *)src + sizeof(Token *),
+	   sizeof(Token) - sizeof(Token *));
+
+    /* Clear the donor token */
+    memset((char *)src + sizeof(Token *), 0, sizeof(Token) - sizeof(Token *));
+
+    return dst;
+}
+
+/*
+ * Convert a line of tokens back into text. This modifies the list
+ * by expanding environment variables.
+ *
+ * If expand_locals is not zero, identifiers of the form "%$*xxx"
+ * are also transformed into ..@ctxnum.xxx
+ */
+static char *detoken(Token * tlist, bool expand_locals)
+{
+    Token *t;
+    char *line, *p;
+    int len = 0;
+
+    list_for_each(t, tlist) {
+	switch (t->type) {
+	case TOKEN_ENVIRON:
+	{
+	    const char *v = pp_getenv(t, true);
+	    set_text(t, v, tok_strlen(v));
+	    t->type = TOKEN_NAKED_STR;
+	    break;
+        }
+
+	case TOKEN_LOCAL_MACRO:
+        case TOKEN_LOCAL_SYMBOL:
+	    if (expand_locals) {
+		const char *q;
+		char *p;
+		Context *ctx = get_ctx(tok_text(t), &q);
+		if (ctx) {
+		    p = nasm_asprintf("..@%"PRIu64".%s", ctx->number, q);
+		    set_text_free(t, p, nasm_last_string_len());
+		    t->type = TOKEN_ID;
+		}
+	    }
+	    break;
+
+        case TOKEN_INDIRECT:
+            /*
+             * This won't happen in when emitting to the assembler,
+             * but can happen when emitting output for some of the
+             * list options. The token string doesn't actually include
+             * the brackets in this case.
+             */
+            len += 3;           /* % */
+            break;
+
+	default:
+	    break;		/* No modifications */
+        }
+
+        if (debug_level(2)) {
+            unsigned int t_len  = t->len;
+            unsigned int s_len = tok_strlen(tok_text(t));
+            if (t_len != s_len) {
+                nasm_panic("assertion failed: token \"%s\" type %u len %u has t->len %u\n",
+                           tok_text(t), t->type, s_len, t_len);
+                t->len = s_len;
+            }
+        }
+
+	len += t->len;
+    }
+
+    p = line = nasm_malloc(len + 1);
+
+    list_for_each(t, tlist) {
+        switch (t->type) {
+        case TOKEN_INDIRECT:
+            *p++ = '%';
+            *p++ = '';
+            p = mempcpy(p, tok_text(t), t->len);
+            *p++ = '';
+            break;
+
+        default:
+            p = mempcpy(p, tok_text(t), t->len);
+        }
+    }
+    *p = '\0';
+
+    return line;
+}
+
+/*
+ * A scanner, suitable for use by the expression evaluator, which
+ * operates on a line of Tokens. Expects a pointer to a pointer to
+ * the first token in the line to be passed in as its private_data
+ * field.
+ *
+ * FIX: This really needs to be unified with stdscan.
+ */
+struct ppscan {
+    Token *tptr;
+    int ntokens;
+};
+
+static int ppscan(void *private_data, struct tokenval *tokval)
+{
+    struct ppscan *pps = private_data;
+    Token *tline;
+    const char *txt;
+
+    do {
+	if (pps->ntokens && (tline = pps->tptr)) {
+	    pps->ntokens--;
+	    pps->tptr = tline->next;
+	} else {
+	    pps->tptr = NULL;
+	    pps->ntokens = 0;
+	    return tokval->t_type = TOKEN_EOS;
+	}
+    } while (tline->type == TOKEN_WHITESPACE);
+
+    txt = tok_text(tline);
+    tokval->t_charptr = (char *)txt; /* Fix this */
+
+    switch (tline->type) {
+    default:
+        return tokval->t_type = tline->type;
+
+    case TOKEN_ID:
+        /* This could be an assembler keyword */
+	return nasm_token_hash(txt, tokval);
+
+    case TOKEN_NUM:
+    {
+        bool rn_error;
+        tokval->t_integer = readnum(txt, &rn_error);
+        if (rn_error)
+            return tokval->t_type = TOKEN_ERRNUM;
+        else
+            return tokval->t_type = TOKEN_NUM;
+    }
+
+    case TOKEN_STR:
+	tokval->t_charptr = (char *)unquote_token(tline);
+        /* fall through */
+    case TOKEN_INTERNAL_STR:
+    case TOKEN_NAKED_STR:
+        tokval->t_inttwo = tline->len;
+	return tokval->t_type = TOKEN_STR;
+    }
+}
+
+/*
+ * 1. An expression (true if nonzero 0)
+ * 2. The keywords true, on, yes for true
+ * 3. The keywords false, off, no for false
+ * 4. An empty line, for true
+ *
+ * On error, return defval (usually the previous value)
+ */
+static bool pp_get_boolean_option(Token *tline, bool defval)
+{
+    static const char * const noyes = {
+        "no", "yes",
+        "false", "true",
+        "off", "on"
+    };
+    struct ppscan pps;
+    struct tokenval tokval;
+    expr *evalresult;
+
+    tline = skip_white(tline);
+    if (!tline)
+        return true;
+
+    if (tline->type == TOKEN_ID) {
+        size_t i;
+	const char *txt = tok_text(tline);
+
+        for (i = 0; i < ARRAY_SIZE(noyes); i++)
+            if (!nasm_stricmp(txt, noyesi))
+                return i & 1;
+    }
+
+    pps.tptr = NULL;
+    pps.tptr = tline;
+    pps.ntokens = -1;
+    tokval.t_type = TOKEN_INVALID;
+    evalresult = evaluate(ppscan, &pps, &tokval, NULL, true, NULL);
+
+    if (!evalresult)
+        return true;
+
+    if (tokval.t_type) {
+        /*!
+         *!pp-trailing on trailing garbage ignored
+         *!  warns that the preprocessor encountered additional text
+         *!  where no such text was expected. This can
+         *!  sometimes be the result of an incorrectly written expression,
+         *!  or arguments that are inadvertently separated.
+         */
+        nasm_warn(WARN_PP_TRAILING,
+                  "trailing garbage after expression ignored");
+    }
+    if (!is_really_simple(evalresult)) {
+        nasm_nonfatal("boolean flag expression must be a constant");
+        return defval;
+    }
+
+    return reloc_value(evalresult) != 0;
+}
+
+/*
+ * Compare a string to the name of an existing macro; this is a
+ * simple wrapper which calls either strcmp or nasm_stricmp
+ * depending on the value of the `casesense' parameter.
+ */
+static int mstrcmp(const char *p, const char *q, bool casesense)
+{
+    return casesense ? strcmp(p, q) : nasm_stricmp(p, q);
+}
+
+/*
+ * Compare a string to the name of an existing macro; this is a
+ * simple wrapper which calls either strcmp or nasm_stricmp
+ * depending on the value of the `casesense' parameter.
+ */
+static int mmemcmp(const char *p, const char *q, size_t l, bool casesense)
+{
+    return casesense ? memcmp(p, q, l) : nasm_memicmp(p, q, l);
+}
+
+/*
+ * Return the Context structure associated with a %$ token. Return
+ * NULL, having _already_ reported an error condition, if the
+ * context stack isn't deep enough for the supplied number of $
+ * signs.
+ *
+ * If "namep" is non-NULL, set it to the pointer to the macro name
+ * tail, i.e. the part beyond %$...
+ */
+static Context *get_ctx(const char *name, const char **namep)
+{
+    Context *ctx;
+    int i;
+
+    if (namep)
+        *namep = name;
+
+    if (!name || name0 != '%' || name1 != '$')
+        return NULL;
+
+    if (!cstk) {
+        nasm_nonfatal("`%s': context stack is empty", name);
+        return NULL;
+    }
+
+    name += 2;
+    ctx = cstk;
+    i = 0;
+    while (ctx && *name == '$') {
+        name++;
+        i++;
+        ctx = ctx->next;
+    }
+    if (!ctx) {
+        nasm_nonfatal("`%s': context stack is only"
+                      " %d level%s deep", name, i, (i == 1 ? "" : "s"));
+        return NULL;
+    }
+
+    if (namep)
+        *namep = name;
+
+    return ctx;
+}
+
+/*
+ * Open an include file. This routine must always return a valid
+ * file pointer if it returns - it's responsible for throwing an
+ * ERR_FATAL and bombing out completely if not. It should also try
+ * the include path one by one until it finds the file or reaches
+ * the end of the path.
+ *
+ * Note: for INC_PROBE the function returns NULL at all times;
+ * instead look for a filename in *slpath.
+ */
+enum incopen_mode {
+    INC_NEEDED,                 /* File must exist */
+    INC_REQUIRED,               /* File must exist, but only open once/pass */
+    INC_OPTIONAL,               /* Missing is OK */
+    INC_PROBE                   /* Only an existence probe */
+};
+
+/* This is conducts a full pathname search */
+static FILE *inc_fopen_search(const char *file, char **slpath,
+                              enum incopen_mode omode, enum file_flags fmode)
+{
+    const struct strlist_entry *ip = strlist_head(ipath_list);
+    FILE *fp;
+    const char *prefix = "";
+    char *sp;
+    bool found;
+
+    while (1) {
+        sp = nasm_catfile(prefix, file);
+        if (omode == INC_PROBE) {
+            fp = NULL;
+            found = nasm_file_exists(sp);
+        } else {
+            fp = nasm_open_read(sp, fmode);
+            found = (fp != NULL);
+        }
+        if (found) {
+            *slpath = sp;
+            return fp;
+        }
+
+        nasm_free(sp);
+
+        if (!ip) {
+            *slpath = NULL;
+            return NULL;
+        }
+
+        prefix = ip->str;
+        ip = ip->next;
+    }
+}
+
+/*
+ * Open a file, or test for the presence of one (depending on omode),
+ * considering the include path.
+ */
+struct file_hash_entry {
+    const char *path;
+    struct file_hash_entry *full; /* Hash entry for the full path */
+    int64_t include_pass; /* Pass in which last included (for %require) */
+};
+
+static FILE *inc_fopen(const char *file,
+                       struct strlist *dhead,
+                       const char **found_path,
+                       enum incopen_mode omode,
+                       enum file_flags fmode)
+{
+    struct file_hash_entry **fhep;
+    struct file_hash_entry *fhe = NULL;
+    struct hash_insert hi;
+    const char *path = NULL;
+    FILE *fp = NULL;
+    const int64_t pass = pass_count();
+    bool skip_open = (omode == INC_PROBE);
+
+    fhep = (struct file_hash_entry **)hash_find(&FileHash, file, &hi);
+    if (fhep) {
+        fhe = *fhep;
+        if (fhe) {
+            path = fhe->path;
+            skip_open |= (omode == INC_REQUIRED) &&
+                (fhe->full->include_pass >= pass);
+        }
+    } else {
+        /* Need to do the actual path search */
+        char *pptr;
+        fp = inc_fopen_search(file, &pptr, omode, fmode);
+        path = pptr;
+
+        /* Positive or negative result */
+        if (path) {
+            nasm_new(fhe);
+            fhe->path = path;
+            fhe->full = fhe;    /* It is *possible*... */
+        }
+        hash_add(&hi, nasm_strdup(file), fhe);
+
+        /*
+         * Add a hash entry for the canonical path if there isn't one
+         * already. Try to get the unique name from the OS best we can.
+         * Note that ->path and ->full->path can be different, and that
+         * is okay (we don't want to print out a full canonical path
+         * in messages, for example.)
+         */
+        if (path) {
+            char *fullpath = nasm_realpath(path);
+
+            if (!strcmp(file, fullpath)) {
+                nasm_free(fullpath);
+            } else {
+                struct file_hash_entry **fullp, *full;
+                fullp = (struct file_hash_entry **)
+                    hash_find(&FileHash, fullpath, &hi);
+
+                if (fullp) {
+                    full = *fullp;
+                    nasm_free(fullpath);
+                } else {
+                    nasm_new(full);
+                    full->path = fullpath;
+                    full->full = full;
+                    hash_add(&hi, path, full);
+                }
+                fhe->full = full;
+            }
+        }
+
+        /*
+         * Add file to dependency path.
+         */
+        strlist_add(dhead, path ? path : file);
+    }
+
+    if (path && !fp && omode != INC_PROBE)
+        fp = nasm_open_read(path, fmode);
+
+    if (omode < INC_OPTIONAL && !fp) {
+        if (!path)
+            errno = ENOENT;
+
+        nasm_nonfatal("unable to open include file `%s': %s",
+                      file, strerror(errno));
+    }
+
+    if (fp)
+        fhe->full->include_pass = pass;
+
+    if (found_path)
+        *found_path = path;
+
+    return fp;
+}
+
+/*
+ * Opens an include or input file. Public version, for use by modules
+ * that get a file:lineno pair and need to look at the file again
+ * (e.g. the CodeView debug backend). Returns NULL on failure.
+ */
+FILE *pp_input_fopen(const char *filename, enum file_flags mode)
+{
+    return inc_fopen(filename, NULL, NULL, INC_OPTIONAL, mode);
+}
+
+/*
+ * Determine if we should warn on defining a single-line macro of
+ * name `name', with `nparam' parameters. If nparam is 0 or -1, will
+ * return true if _any_ single-line macro of that name is defined.
+ * Otherwise, will return true if a single-line macro with either
+ * `nparam' or no parameters is defined.
+ *
+ * If a macro with precisely the right number of parameters is
+ * defined, or nparam is -1, the address of the definition structure
+ * will be returned in `defn'; otherwise NULL will be returned. If `defn'
+ * is NULL, no action will be taken regarding its contents, and no
+ * error will occur.
+ *
+ * Note that this is also called with nparam zero to resolve
+ * `ifdef'.
+ */
+static bool
+smacro_defined(Context *ctx, const char *name, int nparam, SMacro **defn,
+               bool nocase, bool find_alias)
+{
+    struct hash_table *smtbl;
+    SMacro *m;
+
+    smtbl = ctx ? &ctx->localmac : &smacros;
+
+restart:
+    m = (SMacro *) hash_findix(smtbl, name);
+
+    while (m) {
+        if (!mstrcmp(m->name, name, m->casesense && nocase) &&
+            (nparam <= 0 || m->nparam == 0 ||
+             (nparam >= m->nparam_min &&
+              (m->varadic || nparam <= m->nparam)))) {
+            if (m->alias && !find_alias) {
+                if (!ppconf.noaliases) {
+                    name = tok_text(m->expansion);
+                    goto restart;
+                } else {
+                    continue;
+                }
+            }
+            if (defn)
+                *defn = m;
+            return true;
+        }
+        m = m->next;
+    }
+
+    return false;
+}
+
+/* param should be a natural number 0; INT_MAX */
+static int read_param_count(const char *str)
+{
+    int result;
+    bool err;
+
+    result = readnum(str, &err);
+    if (result < 0 || result > INT_MAX) {
+        result = 0;
+        nasm_nonfatal("parameter count `%s' is out of bounds %d; %d",
+                      str, 0, INT_MAX);
+    } else if (err)
+        nasm_nonfatal("unable to parse parameter count `%s'", str);
+    return result;
+}
+
+/*
+ * Count and mark off the parameters in a multi-line macro call.
+ * This is called both from within the multi-line macro expansion
+ * code, and also to mark off the default parameters when provided
+ * in a %macro definition line.
+ *
+ * Note that we need space in the params array for parameter 0 being
+ * a possible captured label as well as the final NULL.
+ *
+ * Returns a pointer to the pointer to a terminal comma if present;
+ * used to drop an empty terminal argument for legacy reasons.
+ */
+static Token **count_mmac_params(Token *tline, int *nparamp, Token ***paramsp)
+{
+    int paramsize;
+    int nparam = 0;
+    Token *t;
+    Token **comma = NULL, **maybe_comma = NULL;
+    Token **params;
+
+    paramsize = PARAM_DELTA;
+    nasm_newn(params, paramsize);
+
+    t = skip_white(tline);
+    if (t) {
+        while (true) {
+            /* Need two slots for captured label and NULL */
+            if (unlikely(nparam+2 >= paramsize)) {
+                paramsize += PARAM_DELTA;
+                params = nasm_realloc(params, sizeof(*params) * paramsize);
+            }
+            params++nparam = t;
+            if (tok_is(t, '{')) {
+                int brace = 1;
+
+                comma = NULL;   /* Non-empty parameter */
+
+                while (brace && (t = t->next)) {
+                    brace += tok_is(t, '{');
+                    brace -= tok_is(t, '}');
+                }
+
+                if (t) {
+                    /*
+                     * Now we've found the closing brace, look further
+                     * for the comma.
+                     */
+                    t = skip_white(t->next);
+                    if (tok_isnt(t, ','))
+                        nasm_nonfatal("braces do not enclose all of macro parameter");
+                } else {
+                    nasm_nonfatal("expecting closing brace in macro parameter");
+                }
+            }
+
+            /* Advance to the next comma */
+            maybe_comma = &t->next;
+            while (tok_isnt(t, ',')) {
+                if (!tok_white(t))
+                    comma = NULL; /* Non-empty parameter */
+                maybe_comma = &t->next;
+                t = t->next;
+            }
+
+            if (!t)
+                break;              /* End of string, no comma */
+
+            comma = maybe_comma;     /* Point to comma pointer */
+            t = skip_white(t->next); /* Eat the comma and whitespace */
+        }
+    }
+
+    paramsnparam+1 = NULL;
+    *paramsp = params;
+    *nparamp = nparam;
+
+    return comma;
+}
+
+/*
+ * Determine whether one of the various `if' conditions is true or
+ * not.
+ *
+ * We must free the tline we get passed.
+ */
+static enum cond_state if_condition(Token * tline, enum preproc_token ct)
+{
+    bool j;
+    Token *t, *tt, *origline;
+    struct ppscan pps;
+    struct tokenval tokval;
+    expr *evalresult;
+    enum token_type needtype;
+    const char *dname = pp_directivesct;
+    bool casesense = true;
+    enum preproc_token cond = PP_COND(ct);
+
+    origline = tline;
+
+    switch (cond) {
+    case PP_IFCTX:
+        j = false;              /* have we matched yet? */
+        while (true) {
+            tline = skip_white(tline);
+            if (!tline)
+                break;
+            if (tline->type != TOKEN_ID) {
+                nasm_nonfatal("`%s' expects context identifiers",
+                              dname);
+                goto fail;
+            }
+            if (cstk && cstk->name && !nasm_stricmp(tok_text(tline), cstk->name))
+                j = true;
+            tline = tline->next;
+        }
+        break;
+
+    case PP_IFDEF:
+    case PP_IFDEFALIAS:
+    {
+        bool alias = cond == PP_IFDEFALIAS;
+        SMacro *smac;
+        Context *ctx;
+        const char *mname;
+
+        j = false;              /* have we matched yet? */
+        while (tline) {
+            tline = skip_white(tline);
+            if (!tline || (tline->type != TOKEN_ID &&
+			   tline->type != TOKEN_LOCAL_MACRO)) {
+                nasm_nonfatal("`%s' expects macro identifiers",
+                              dname);
+                goto fail;
+            }
+
+            mname = tok_text(tline);
+            ctx = get_ctx(mname, &mname);
+            if (smacro_defined(ctx, mname, -1, &smac, true, alias) && smac
+                && smac->alias == alias) {
+                j = true;
+                break;
+            }
+            tline = tline->next;
+        }
+        break;
+    }
+
+    case PP_IFDIFI:
+        /*
+         * %ifdifi doesn't actually exist; it ignores its argument and is
+         * always false. This exists solely to stub out the corresponding
+         * TASM directive.
+         */
+        j = false;
+        goto fail;
+
+    case PP_IFENV:
+        tline = expand_smacro(tline);
+        j = false;              /* have we matched yet? */
+        while (tline) {
+            tline = skip_white(tline);
+            if (!tline || (tline->type != TOKEN_ID &&
+                           tline->type != TOKEN_STR &&
+			   tline->type != TOKEN_INTERNAL_STR &&
+                           tline->type != TOKEN_ENVIRON)) {
+                nasm_nonfatal("`%s' expects environment variable names",
+                              dname);
+                goto fail;
+            }
+
+	    j |= !!pp_getenv(tline, false);
+            tline = tline->next;
+	}
+	break;
+
+    case PP_IFIDNI:
+        casesense = false;
+        /* fall through */
+    case PP_IFIDN:
+        tline = expand_smacro(tline);
+        t = tt = tline;
+        while (tok_isnt(tt, ','))
+            tt = tt->next;
+        if (!tt) {
+            nasm_nonfatal("`%s' expects two comma-separated arguments",
+                          dname);
+            goto fail;
+        }
+        tt = tt->next;
+        j = true;               /* assume equality unless proved not */
+        while (tok_isnt(t, ',') && tt) {
+	    unsigned int l1, l2;
+	    const char *t1, *t2;
+
+            if (tok_is(tt, ',')) {
+                nasm_nonfatal("`%s': more than one comma on line",
+                              dname);
+                goto fail;
+            }
+            if (t->type == TOKEN_WHITESPACE) {
+                t = t->next;
+                continue;
+            }
+            if (tt->type == TOKEN_WHITESPACE) {
+                tt = tt->next;
+                continue;
+            }
+            if (tt->type != t->type) {
+                j = false;      /* found mismatching tokens */
+                break;
+            }
+
+	    t1 = unquote_token(t);
+	    t2 = unquote_token(tt);
+	    l1 = t->len;
+	    l2 = tt->len;
+
+	    if (l1 != l2 || mmemcmp(t1, t2, l1, casesense)) {
+		j = false;
+		break;
+	    }
+
+            t = t->next;
+            tt = tt->next;
+        }
+        if (!tok_is(t, ',') || tt)
+            j = false;          /* trailing gunk on one end or other */
+        break;
+
+    case PP_IFMACRO:
+    {
+        bool found = false;
+        MMacro searching, *mmac;
+
+        tline = skip_white(tline);
+        tline = expand_id(tline);
+        if (!tok_is(tline, TOKEN_ID)) {
+            nasm_nonfatal("`%s' expects a macro name", dname);
+            goto fail;
+        }
+        nasm_zero(searching);
+        searching.name = dup_text(tline);
+        searching.casesense = true;
+        searching.nparam_min = 0;
+        searching.nparam_max = INT_MAX;
+        tline = expand_smacro(tline->next);
+        tline = skip_white(tline);
+        if (!tline) {
+        } else if (!tok_is(tline, TOKEN_NUM)) {
+            nasm_nonfatal("`%s' expects a parameter count or nothing",
+                          dname);
+        } else {
+            searching.nparam_min = searching.nparam_max =
+                read_param_count(tok_text(tline));
+        }
+        if (tline && tok_is(tline->next, '-')) {
+            tline = tline->next->next;
+            if (tok_is(tline, '*'))
+                searching.nparam_max = INT_MAX;
+            else if (!tok_is(tline, TOKEN_NUM))
+                nasm_nonfatal("`%s' expects a parameter count after `-'",
+                              dname);
+            else {
+                searching.nparam_max = read_param_count(tok_text(tline));
+                if (searching.nparam_min > searching.nparam_max) {
+                    nasm_nonfatal("minimum parameter count exceeds maximum");
+                    searching.nparam_max = searching.nparam_min;
+                }
+            }
+        }
+        if (tline && tok_is(tline->next, '+')) {
+            tline = tline->next;
+            searching.plus = true;
+        }
+        mmac = (MMacro *) hash_findix(&mmacros, searching.name);
+        while (mmac) {
+            if (!strcmp(mmac->name, searching.name) &&
+                (mmac->nparam_min <= searching.nparam_max
+                 || searching.plus)
+                && (searching.nparam_min <= mmac->nparam_max
+                    || mmac->plus)) {
+                found = true;
+                break;
+            }
+            mmac = mmac->next;
+        }
+        if (tline && tline->next) {
+            nasm_warn(WARN_PP_TRAILING,
+                      "trailing garbage after `%s' ignored", dname);
+        }
+        nasm_free(searching.name);
+        j = found;
+        break;
+    }
+
+    case PP_IFID:
+        needtype = TOKEN_ID;
+        goto iftype;
+    case PP_IFNUM:
+        needtype = TOKEN_NUM;
+        goto iftype;
+    case PP_IFSTR:
+        needtype = TOKEN_STR;
+        goto iftype;
+
+iftype:
+        t = tline = expand_smacro(tline);
+
+        while (tok_white(t) ||
+               (needtype == TOKEN_NUM && (tok_is(t, '-') | tok_is(t, '+'))))
+            t = t->next;
+
+        j = tok_is(t, needtype);
+        break;
+
+    case PP_IFTOKEN:
+        tline = expand_smacro(tline);
+        t = skip_white(tline);
+
+        j = false;
+        if (t) {
+            t = skip_white(t->next); /* Skip the actual token + whitespace */
+            j = !t;
+        }
+        break;
+
+    case PP_IFEMPTY:
+        tline = expand_smacro(tline);
+        t = skip_white(tline);
+        j = !t;                 /* Should be empty */
+        break;
+
+    case PP_IF:
+        pps.tptr = tline = expand_smacro(tline);
+	pps.ntokens = -1;
+        tokval.t_type = TOKEN_INVALID;
+        evalresult = evaluate(ppscan, &pps, &tokval, NULL, true, NULL);
+        if (!evalresult)
+            return -1;
+        if (tokval.t_type) {
+            nasm_warn(WARN_PP_TRAILING, "trailing garbage after expression ignored");
+        }
+        if (!is_simple(evalresult)) {
+            nasm_nonfatal("non-constant value given to `%s'",
+                          dname);
+            goto fail;
+        }
+        j = reloc_value(evalresult) != 0;
+        break;
+
+    case PP_IFUSING:
+    case PP_IFUSABLE:
+    {
+        const struct use_package *pkg;
+        const char *name;
+
+        pkg = get_use_pkg(tline, dname, &name);
+        if (!name)
+            goto fail;
+
+        j = pkg && ((cond == PP_IFUSABLE) | use_loadedpkg->index);
+        break;
+    }
+
+    default:
+        nasm_nonfatal("unknown preprocessor directive `%s'", dname);
+        goto fail;
+    }
+
+    free_tlist(origline);
+    return (j ^ PP_COND_NEGATIVE(ct)) ? COND_IF_TRUE : COND_IF_FALSE;
+
+fail:
+    free_tlist(origline);
+    return COND_NEVER;
+}
+
+/*
+ * Default smacro expansion routine: just returns a copy of the
+ * expansion list.
+ */
+static Token *
+smacro_expand_default(const SMacro *s, Token **params, int nparams)
+{
+    (void)params;
+    (void)nparams;
+
+    return dup_tlist(s->expansion, NULL);
+}
+
+/*
+ * Emit a macro definition or undef to the listing file or debug format
+ * if desired. This is similar to detoken(), but it handles the
+ * reverse expansion list, does not expand %! or local variable
+ * tokens, and does some special handling for macro parameters.
+ */
+static void
+list_smacro_def(enum preproc_token op, const Context *ctx, const SMacro *m)
+{
+    Token *t;
+    size_t namelen, size;
+    char *def, *p, *end_spec;
+    char *context_prefix = NULL;
+    size_t context_len;
+
+    namelen = strlen(m->name);
+    size = namelen + 2;  /* Include room for space after name + NUL */
+
+    if (ctx) {
+        int context_depth = cstk->depth - ctx->depth + 1;
+        context_prefix =
+            nasm_asprintf("%s::%"PRIu64" %%%-*s",
+                          ctx->name ? ctx->name : "",
+                          ctx->number, context_depth, "");
+
+        context_len = nasm_last_string_len();
+        memset(context_prefix + context_len - context_depth,
+               '$', context_depth);
+        size += context_len;
+    }
+
+    list_for_each(t, m->expansion)
+        size += t->len;
+
+    if (m->nparam) {
+        /*
+         * Space for ( and either , or ) around each
+         * parameter, plus up to 5 flags + /ux
+         */
+        int i;
+
+        size += 1 + 8 * m->nparam;
+        for (i = 0; i < m->nparam; i++)
+            size += m->paramsi.name.len;
+    }
+
+    def = nasm_malloc(size);
+    p = def+size;
+    *--p = '\0';
+
+    list_for_each(t, m->expansion) {
+	p -= t->len;
+	memcpy(p, tok_text(t), t->len);
+    }
+
+    *--p = ' ';
+    end_spec = p;               /* Truncate here for macro def only */
+
+    if (m->nparam) {
+        int i;
+
+        *--p = ')';
+
+        for (i = m->nparam-1; i >= 0; i--) {
+            enum sparmflags flags = m->paramsi.flags;
+            bool slash = false;
+
+            if (m->paramsi.radix) {
+                *--p = m->paramsi.radix;
+                slash = true;
+            }
+            if (flags & SPARM_UNSIGNED) {
+                *--p = 'u';
+                slash = true;
+            }
+            if (slash)
+                *--p = '/';
+
+            if (flags & (SPARM_GREEDY|SPARM_VARADIC))
+                *--p = '+';
+	    p -= m->paramsi.name.len;
+	    memcpy(p, tok_text(&m->paramsi.name), m->paramsi.name.len);
+
+            if (flags & SPARM_NOSTRIP)
+                *--p = '!';
+            if (flags & SPARM_STR) {
+                *--p = '&';
+                if (flags & SPARM_CONDQUOTE)
+                    *--p = '&';
+            }
+            if (flags & SPARM_EVAL)
+                *--p = '=';
+            *--p = ',';
+        }
+        *p = '(';               /* First parameter starts with ( not , */
+    }
+
+    p -= namelen;
+    memcpy(p, m->name, namelen);
+
+    if (context_prefix) {
+        p -= context_len;
+        memcpy(p, context_prefix, context_len);
+        nasm_free(context_prefix);
+    }
+
+    if (ppdbg & PDBG_LIST_SMACROS)
+        nasm_listmsg("%s %s", pp_directivesop, p);
+    if (ppdbg & PDBG_SMACROS) {
+        bool define = !(op == PP_UNDEF || op == PP_UNDEFALIAS);
+        if (!define)
+            *end_spec = '\0';   /* Remove the expansion (for list file only) */
+        dfmt->debug_smacros(define, p);
+    }
+    nasm_free(def);
+}
+
+/*
+ * Parse smacro arguments, return argument count. If the tmpl argument
+ * is set, set the nparam, varadic and params field in the template.
+ * The varadic field is not used by define_smacro(), but is provided
+ * in case the caller wants it for other purposes.
+ *
+ * *tpp is updated to point to the pointer to the first token after the
+ * prototype.
+ *
+ * The text values from any argument tokens are "stolen" and the
+ * corresponding text fields set to NULL.
+ *
+ * Note that the user can't define a true varadic macro; doing so
+ * would be meaningless. The true varadic macros are only used for
+ * internal "magic macro" functions.
+ */
+static int parse_smacro_template(Token ***tpp, SMacro *tmpl)
+{
+    int nparam = 0;
+    enum sparmflags flags;
+    struct smac_param *params = NULL;
+    bool err, done;
+    bool greedy = false;
+    bool parsing_radix;
+    char radix;
+    Token **tn = *tpp;
+    Token *t = *tn;
+    Token *name;
+
+    /*
+     * DO NOT skip whitespace here, or we won't be able to distinguish:
+     *
+     * %define foo (a,b)		; no arguments, (a,b) is the expansion
+     * %define bar(a,b)			; two arguments, empty expansion
+     *
+     * This ambiguity was inherited from C.
+     */
+
+    if (!tok_is(t, '('))
+        goto finish;
+
+    if (tmpl) {
+        Token *tx = t;
+        Token **txpp = &tx;
+        int sparam;
+
+        /* Count parameters first */
+        sparam = parse_smacro_template(&txpp, NULL);
+        if (!sparam)
+            goto finish;        /* No parameters, we're done */
+        nasm_newn(params, sparam);
+    }
+
+    /* Skip leading paren */
+    tn = &t->next;
+    t = *tn;
+
+    name = NULL;
+    flags = 0;
+    radix = 0;
+    parsing_radix = false;
+    err = done = false;
+
+    while (!done) {
+        if (!t) {
+            if (name || flags)
+                nasm_nonfatal("`)' expected to terminate macro template");
+            else
+                nasm_nonfatal("parameter identifier expected");
+            break;
+        }
+
+        switch (t->type) {
+        case TOKEN_ID:
+            if (parsing_radix) {
+                const char *cp;
+                for (cp = tok_text(t); cp && *cp; cp++) {
+                    switch (*cp | 0x20) {
+                    case 'b': case 'y':
+                    case 'd': case 't':
+                    case 'o': case 'q':
+                    case 'h': case 'x':
+                        radix = *cp;
+                        break;
+                    case 's':
+                        flags &= ~SPARM_UNSIGNED;
+                        break;
+                    case 'u':
+                        flags |= SPARM_UNSIGNED;
+                        break;
+                    default:
+                        nasm_nonfatal("invalid radix specifier `/%s'",
+                                      tok_text(t));
+                        cp = NULL;
+                        break;
+                    }
+                }
+            } else {
+                if (name)
+                    goto bad;
+                name = t;
+            }
+            break;
+        case '=':
+            flags |= SPARM_EVAL;
+            break;
+        case '&':
+            flags |= SPARM_STR;
+            break;
+        case TOKEN_DBL_AND:
+            flags |= SPARM_STR|SPARM_CONDQUOTE;
+            break;
+        case '!':
+            flags |= SPARM_NOSTRIP;
+            break;
+        case '+':
+            flags |= SPARM_GREEDY|SPARM_OPTIONAL;
+            greedy = true;
+            break;
+        case '/':
+            if (!(flags & SPARM_EVAL))
+                nasm_nonfatal("radix specifier for parameter without `='");
+            parsing_radix = true;
+            break;
+        case ',':
+            if (greedy)
+                nasm_nonfatal("greedy parameter must be last");
+            goto end_param;
+        case ')':
+            done = true;
+            goto end_param;
+        end_param:
+            if (params) {
+                if (name)
+                    steal_Token(&paramsnparam.name, name);
+                paramsnparam.flags = flags;
+                paramsnparam.radix = radix;
+            }
+            nparam++;
+            name = NULL;
+            flags = 0;
+            parsing_radix = false;
+            radix = 0;
+            break;
+        case TOKEN_WHITESPACE:
+            break;
+        default:
+        bad:
+            if (!err) {
+                nasm_nonfatal("garbage `%s' in macro parameter list",
+                              tok_text(t));
+                err = true;
+            }
+            break;
+        }
+
+        tn = &t->next;
+        t = *tn;
+    }
+
+finish:
+    while (t && t->type == TOKEN_WHITESPACE) {
+        tn = &t->next;
+        t = t->next;
+    }
+    *tpp = tn;
+    if (tmpl) {
+        tmpl->nparam     = nparam;
+        tmpl->varadic    = greedy;
+        tmpl->params     = params;
+    }
+    return nparam;
+}
+
+/*
+ * Common code for defining an smacro. The tmpl argument, if not NULL,
+ * contains any macro parameters that aren't explicit arguments;
+ * those are the more uncommon macro variants.
+ */
+static SMacro *define_smacro(const char *mname, bool casesense,
+                             Token *expansion, SMacro *tmpl)
+{
+    SMacro *smac, **smhead;
+    struct hash_table *smtbl;
+    Context *ctx;
+    bool defining_alias = false;
+    int nparam = 0;
+    bool defined;
+
+    if (tmpl) {
+        defining_alias = tmpl->alias;
+        nparam = tmpl->nparam;
+        if (nparam && !defining_alias)
+            mark_smac_params(expansion, tmpl, 0);
+    }
+
+    ctx = get_ctx(mname, &mname);
+
+    defined = smacro_defined(ctx, mname, nparam, &smac, casesense, true);
+
+    if (defined) {
+        if (smac->alias) {
+            if (smac->in_progress) {
+                nasm_nonfatal("macro alias loop");
+                goto fail;
+            }
+
+            if (!defining_alias && !ppconf.noaliases) {
+                /* It is an alias macro; follow the alias link */
+                SMacro *s;
+
+                smac->in_progress++;
+                s = define_smacro(tok_text(smac->expansion), casesense,
+                                  expansion, tmpl);
+                smac->in_progress--;
+                return s;
+            }
+        }
+
+        if (casesense ^ smac->casesense) {
+            /*
+             *!pp-macro-def-case-single on single-line macro defined both case sensitive and insensitive
+             *!=macro-def-case-single
+             *!  warns when a single-line macro is defined both case
+             *!  sensitive and case insensitive.
+             *!  The new macro
+             *!  definition will override (shadow) the original one,
+             *!  although the original macro is not deleted, and will
+             *!  be re-exposed if the new macro is deleted with
+             *!  \c{%undef}, or, if the original macro is the case
+             *!  insensitive one, the macro call is done with a
+             *!  different case.
+             */
+            nasm_warn(WARN_PP_MACRO_DEF_CASE_SINGLE, "case %ssensitive definition of macro `%s' will shadow %ssensitive macro `%s'",
+                      casesense ? "" : "in",
+                      mname,
+                      smac->casesense ? "" : "in",
+                      smac->name);
+            defined = false;
+        } else if ((!!nparam) ^ (!!smac->nparam)) {
+            /*
+             * Most recent versions of NASM considered this an error,
+             * so promote this warning to error by default.
+             *
+             *!pp-macro-def-param-single err single-line macro defined with and without parameters
+             *!=macro-def-param-single
+             *!  warns if the same single-line macro is defined with and
+             *!  without parameters.
+             *!  The new macro
+             *!  definition will override (shadow) the original one,
+             *!  although the original macro is not deleted, and will
+             *!  be re-exposed if the new macro is deleted with
+             *!  \c{%undef}.
+             */
+            nasm_warn(WARN_PP_MACRO_DEF_PARAM_SINGLE,
+                      "macro `%s' defined both with and without parameters",
+                      mname);
+            defined = false;
+        } else if (smac->nparam < nparam) {
+            /*
+             *!pp-macro-def-greedy-single on single-line macro
+             *!=macro-def-greedy-single
+             *!  definition shadows greedy macro warns when a
+             *!  single-line macro is defined which would match a
+             *!  previously existing greedy definition.  The new macro
+             *!  definition will override (shadow) the original one,
+             *!  although the original macro is not deleted, and will
+             *!  be re-exposed if the new macro is deleted with
+             *!  \c{%undef}, and will be invoked if called with a
+             *!  parameter count that does not match the new definition.
+             */
+            nasm_warn(WARN_PP_MACRO_DEF_GREEDY_SINGLE,
+                      "defining macro `%s' shadows previous greedy definition",
+                      mname);
+            defined = false;
+        }
+    }
+
+    if (defined) {
+        /*
+         * We're redefinining, so we have to take over an
+         * existing SMacro structure. This means freeing
+         * what was already in it, but not the structure itself.
+         */
+        clear_smacro(smac);
+    } else {
+        /* Create a new macro */
+        smtbl  = ctx ? &ctx->localmac : &smacros;
+        smhead = (SMacro **) hash_findi_add(smtbl, mname);
+        nasm_new(smac);
+        smac->next = *smhead;
+        *smhead = smac;
+    }
+
+    smac->name       = nasm_strdup(mname);
+    smac->casesense  = casesense;
+    smac->expansion  = reverse_tokens(expansion);
+    smac->expand     = smacro_expand_default;
+    smac->nparam     = nparam;
+    smac->nparam_min = nparam;
+    if (tmpl) {
+        smac->params     = tmpl->params;
+        smac->alias      = tmpl->alias;
+        smac->recursive  = tmpl->recursive;
+        if (tmpl->expand) {
+            smac->expand    = tmpl->expand;
+            smac->expandpvt = tmpl->expandpvt;
+        }
+        if (nparam) {
+            int nparam_min = nparam;
+
+            smac->varadic =
+                !!(tmpl->paramsnparam-1.flags &
+                   (SPARM_GREEDY|SPARM_VARADIC));
+
+            while (nparam_min > 1) {
+                if (!(tmpl->paramsnparam_min-1.flags & SPARM_OPTIONAL))
+                    break;
+                nparam_min--;
+            }
+
+            smac->nparam_min = nparam_min;
+        }
+    }
+    if (ppdbg & (PDBG_SMACROS|PDBG_LIST_SMACROS)) {
+        list_smacro_def((smac->alias ? PP_DEFALIAS : PP_DEFINE)
+                        + !casesense, ctx, smac);
+    }
+    return smac;
+
+fail:
+    free_tlist(expansion);
+    if (tmpl)
+        free_smacro_members(tmpl);
+    return NULL;
+}
+
+/*
+ * Undefine an smacro
+ */
+static void undef_smacro(const char *mname, bool undefalias)
+{
+    SMacro **smhead, *s, **sp;
+    struct hash_table *smtbl;
+    Context *ctx;
+
+    ctx = get_ctx(mname, &mname);
+    smtbl = ctx ? &ctx->localmac : &smacros;
+    smhead = (SMacro **)hash_findi(smtbl, mname, NULL);
+
+    if (smhead) {
+        /*
+         * We now have a macro name... go hunt for it.
+         */
+        sp = smhead;
+        while ((s = *sp) != NULL) {
+            if (!mstrcmp(s->name, mname, s->casesense)) {
+                if (s->alias && !undefalias) {
+                    if (!ppconf.noaliases) {
+                        if (s->in_progress) {
+                            nasm_nonfatal("macro alias loop");
+                        } else {
+                            s->in_progress = true;
+                            undef_smacro(tok_text(s->expansion), false);
+                            s->in_progress = false;
+                        }
+                    }
+                } else {
+                    if (list_option('d'))
+                        list_smacro_def(s->alias ? PP_UNDEFALIAS : PP_UNDEF,
+                                        ctx, s);
+                    *sp = s->next;
+                    free_smacro(s);
+                    continue;
+                }
+            }
+            sp = &s->next;
+        }
+    }
+}
+
+/*
+ * Parse a mmacro specification.
+ */
+static bool parse_mmacro_spec(Token *tline, MMacro *def, const char *directive)
+{
+    tline = tline->next;
+    tline = skip_white(tline);
+    tline = expand_id(tline);
+    if (!tok_is(tline, TOKEN_ID)) {
+        nasm_nonfatal("`%s' expects a macro name", directive);
+        return false;
+    }
+
+#if 0
+    def->prev = NULL;
+#endif
+    def->name = dup_text(tline);
+    def->plus = false;
+    def->nolist = 0;
+    def->nparam_min = 0;
+    def->nparam_max = 0;
+
+    tline = expand_smacro(tline->next);
+    tline = skip_white(tline);
+    if (!tok_is(tline, TOKEN_NUM))
+        nasm_nonfatal("`%s' expects a parameter count", directive);
+    else
+        def->nparam_min = def->nparam_max = read_param_count(tok_text(tline));
+    if (tline && tok_is(tline->next, '-')) {
+        tline = tline->next->next;
+        if (tok_is(tline, '*')) {
+            def->nparam_max = INT_MAX;
+        } else if (!tok_is(tline, TOKEN_NUM)) {
+            nasm_nonfatal("`%s' expects a parameter count after `-'", directive);
+        } else {
+            def->nparam_max = read_param_count(tok_text(tline));
+            if (def->nparam_min > def->nparam_max) {
+                nasm_nonfatal("minimum parameter count exceeds maximum");
+                def->nparam_max = def->nparam_min;
+            }
+        }
+    }
+    if (tline && tok_is(tline->next, '+')) {
+        tline = tline->next;
+        def->plus = true;
+    }
+    if (tline && tok_is(tline->next, TOKEN_ID) &&
+	tline->next->len == 7 &&
+        !nasm_stricmp(tline->next->text.a, ".nolist")) {
+        tline = tline->next;
+        if (!list_option('f'))
+            def->nolist |= NL_LIST|NL_LINE;
+    }
+
+    /*
+     * Handle default parameters.
+     */
+    def->ndefs = 0;
+    if (tline && tline->next) {
+        Token **comma;
+        def->dlist = tline->next;
+        tline->next = NULL;
+        comma = count_mmac_params(def->dlist, &def->ndefs, &def->defaults);
+        if (!ppconf.sane_empty_expansion && comma) {
+            *comma = NULL;
+            def->ndefs--;
+            nasm_warn(WARN_PP_MACRO_PARAMS_LEGACY,
+                      "dropping trailing empty default parameter in definition of multi-line macro `%s'",
+                      def->name);
+        }
+    } else {
+        def->dlist = NULL;
+        def->defaults = NULL;
+    }
+    def->expansion = NULL;
+
+    if (def->defaults && def->ndefs > def->nparam_max - def->nparam_min &&
+        !def->plus) {
+        /*
+         *!pp-macro-defaults on macros with more default than optional parameters
+         *!=macro-defaults
+         *!  warns when a macro has more default parameters than optional parameters.
+         *!  See \k{mlmacdef} for why might want to disable this warning.
+         */
+        nasm_warn(WARN_PP_MACRO_DEFAULTS,
+                   "too many default macro parameters in macro `%s'", def->name);
+    }
+
+    return true;
+}
+
+
+/*
+ * Decode a size directive
+ */
+static int parse_size(const char *str) {
+    static const char *size_names =
+        { "byte", "dword", "oword", "qword", "tword", "word", "yword" };
+    static const int sizes =
+        { 0, 1, 4, 16, 8, 10, 2, 32 };
+    return str ? sizesbsii(str, size_names, ARRAY_SIZE(size_names))+1 : 0;
+}
+
+/*
+ * Process a preprocessor %pragma directive.  Currently there are none.
+ * Gets passed the token list starting with the "preproc" token from
+ * "%pragma preproc".
+ */
+static void do_pragma_preproc(Token *tline)
+{
+    const char *txt;
+
+    /* Skip to the real stuff */
+    tline = tline->next;
+    tline = skip_white(tline);
+
+    if (!tok_is(tline, TOKEN_ID))
+        return;
+
+    txt = tok_text(tline);
+    if (!nasm_stricmp(txt, "sane_empty_expansion")) {
+        tline = skip_white(tline->next);
+        ppconf.sane_empty_expansion =
+            pp_get_boolean_option(tline, ppconf.sane_empty_expansion);
+    } else {
+        /* Unknown pragma, ignore for now */
+    }
+}
+
+static bool is_macro_id(const Token *t)
+{
+    return tok_is(t, TOKEN_ID) || tok_is(t, TOKEN_LOCAL_MACRO);
+}
+
+static const char *get_id_noskip(Token **tp, const char *dname);
+
+static const char *get_id(Token **tp, const char *dname)
+{
+    *tp = (*tp)->next;          /* Skip directive */
+    return get_id_noskip(tp, dname);
+}
+
+static const char *get_id_noskip(Token **tp, const char *dname)
+{
+    const char *id;
+    Token *t = *tp;
+
+    t = skip_white(t);
+    t = expand_id(t);
+
+    if (!is_macro_id(t)) {
+        nasm_nonfatal("`%s' expects a macro identifier", dname);
+        return NULL;
+    }
+
+    id = tok_text(t);
+    nasm_assert(!tok_white(t)); /* Had skip_white() here?? */
+    *tp = t;
+    return id;
+}
+
+/* Parse a %use package name and find the package. Set *err on syntax error. */
+static const struct use_package *
+get_use_pkg(Token *t, const char *dname, const char **name)
+{
+    const char *id;
+
+    t = skip_white(t);
+    t = expand_smacro(t);
+
+    *name = NULL;
+
+    if (!t) {
+        nasm_nonfatal("`%s' expects a package name, got end of line", dname);
+        return NULL;
+    } else if (t->type != TOKEN_ID && t->type != TOKEN_STR) {
+        nasm_nonfatal("`%s' expects a package name, got `%s'",
+                      dname, tok_text(t));
+        return NULL;
+    }
+
+    *name = id = unquote_token(t);
+
+    t = t->next;
+    t = skip_white(t);
+    if (t) {
+        nasm_warn(WARN_PP_TRAILING,
+                  "trailing garbage after `%s' ignored", dname);
+    }
+
+    return nasm_find_use_package(id);
+}
+
+/*
+ * Mark parameter tokens in an smacro definition. If the type argument
+ * is 0, create smac param tokens, otherwise use the type specified;
+ * normally this is used for TOKEN_XDEF_PARAM, which is used to protect
+ * parameter tokens during expansion during %xdefine.
+ *
+ * tmpl may not be NULL here.
+ */
+static void mark_smac_params(Token *tline, const SMacro *tmpl,
+                             enum token_type type)
+{
+    const struct smac_param *params = tmpl->params;
+    int nparam = tmpl->nparam;
+    Token *t;
+    int i;
+
+    list_for_each(t, tline) {
+        if (t->type != TOKEN_ID && t->type != TOKEN_XDEF_PARAM)
+            continue;
+
+        for (i = 0; i < nparam; i++) {
+            if (tok_text_match(t, &paramsi.name))
+                t->type = type ? type : tok_smac_param(i);
+        }
+    }
+}
+
+/**
+ * %clear selected macro sets either globally or in contexts
+ */
+static void do_clear(enum clear_what what, bool context)
+{
+    if (context) {
+        if (what & CLEAR_ALLDEFINE) {
+            Context *ctx;
+            list_for_each(ctx, cstk)
+                clear_smacro_table(&ctx->localmac, what);
+        }
+        /* Nothing else can be context-local */
+    } else {
+        if (what & CLEAR_ALLDEFINE)
+            clear_smacro_table(&smacros, what);
+        if (what & CLEAR_MMACRO)
+            free_mmacro_table(&mmacros);
+    }
+}
+
+/*
+ * Process a %line directive, including the gcc/cpp compatibility
+ * form with a # at the front.
+ */
+static int line_directive(Token *origline, Token *tline)
+{
+    int k, m;
+    bool err;
+    const char *dname;
+
+    /*
+     * Valid syntaxes:
+     * %line nnn+mmm filename
+     * %line nnn+mmm "filename" flags...
+     *
+     * "flags" are for gcc compatibility and are currently ignored.
+     *
+     * "#" at the beginning of the line is also treated as a %line
+     * directive, again for compatibility with gcc.
+     */
+    if ((ppopt & PP_NOLINE) || istk->mstk.mstk)
+        goto done;
+
+    dname = tok_text(tline);
+    tline = tline->next;
+    tline = skip_white(tline);
+    if (!tok_is(tline, TOKEN_NUM)) {
+        nasm_nonfatal("`%s' expects a line number", dname);
+        goto done;
+    }
+    k = readnum(tok_text(tline), &err);
+    m = 1;
+    tline = tline->next;
+    if (tok_is(tline, '+') || tok_is(tline, '-')) {
+        bool minus = tok_is(tline, '-');
+        tline = tline->next;
+        if (!tok_is(tline, TOKEN_NUM)) {
+            nasm_nonfatal("`%s' expects a line increment", dname);
+            goto done;
+        }
+        m = readnum(tok_text(tline), &err);
+        if (minus)
+            m = -m;
+        tline = tline->next;
+    }
+    tline = skip_white(tline);
+    if (tline) {
+        if (tline->type == TOKEN_STR) {
+            const char *fname;
+            /*
+             * If this is a quoted string, ignore anything after
+             * it; this allows for compatibility with gcc's
+             * additional flags options.
+             */
+
+            fname = unquote_token_anystr(tline, BADCTL,
+                                          dname0 == '#' ? STR_C : STR_NASM);
+            src_set_fname(fname);
+        } else {
+            char *fname;
+            fname = detoken(tline, false);
+            src_set_fname(fname);
+            nasm_free(fname);
+        }
+    }
+    src_set_linnum(k);
+
+    istk->where = src_where();
+    istk->lineinc = m;
+    goto done;
+
+done:
+    free_tlist(origline);
+    return DIRECTIVE_FOUND;
+}
+
+/*
+ * Used for the %arg and %local directives
+ */
+static void define_stack_smacro(const char *name, int offset)
+{
+    Token *tt;
+
+    tt = make_tok_char(NULL, ')');
+    tt = make_tok_num(tt, offset);
+    if (!tok_is(tt, '-'))
+        tt = make_tok_char(tt, '+');
+    tt = new_Token(tt, TOKEN_ID, StackPointer, 0);
+    tt = make_tok_char(tt, '(');
+
+    define_smacro(name, true, tt, NULL);
+}
+
+
+/*
+ * This implements the %assign directive: expand an smacro expression,
+ * then evaluate it, and assign the corresponding number to an smacro.
+ */
+static void assign_smacro(const char *mname, bool casesense,
+                          Token *tline, const char *dname)
+{
+    struct ppscan pps;
+    expr *evalresult;
+    struct tokenval tokval;
+
+    tline = expand_smacro(tline);
+
+    pps.tptr = tline;
+    pps.ntokens = -1;
+    tokval.t_type = TOKEN_INVALID;
+    evalresult = evaluate(ppscan, &pps, &tokval, NULL, true, NULL);
+    free_tlist(tline);
+    if (!evalresult)
+        return;
+
+    if (tokval.t_type) {
+        nasm_warn(WARN_PP_TRAILING,
+                  "trailing garbage after expression ignored");
+    }
+    if (!is_simple(evalresult)) {
+        nasm_nonfatal("non-constant value given to `%s'", dname);
+    } else {
+	tline = make_tok_num(NULL, reloc_value(evalresult));
+
+        /*
+         * We now have a macro name, an implicit parameter count of
+         * zero, and a numeric token to use as an expansion. Create
+         * and store an SMacro.
+         */
+        define_smacro(mname, casesense, tline, NULL);
+    }
+}
+
+/*
+ * Implement string concatenation as used by the %strcat directive
+ * and function.
+ */
+static Token *pp_strcat(Token *tline, const char *dname)
+{
+
+    size_t len;
+    Token *t;
+    Token *res = NULL;
+    char *q, *qbuf;
+
+    len = 0;
+    list_for_each(t, tline) {
+        switch (t->type) {
+        case TOKEN_WHITESPACE:
+        case TOKEN_COMMA:
+            break;
+        case TOKEN_STR:
+            unquote_token(t);
+            /* fall through */
+        case TOKEN_INTERNAL_STR:
+            len += t->len;
+            break;
+        default:
+            nasm_nonfatal("non-string passed to `%s': %s", dname,
+                          tok_text(t));
+            goto err;
+        }
+    }
+
+    q = qbuf = nasm_malloc(len+1);
+    list_for_each(t, tline) {
+        if (t->type == TOKEN_INTERNAL_STR)
+            q = mempcpy(q, tok_text(t), t->len);
+    }
+    *q = '\0';
+
+    res = make_tok_qstr_len(NULL, qbuf, len);
+    nasm_free(qbuf);
+err:
+    free_tlist(tline);
+    return res;
+}
+
+
+/*
+ * Implement substring extraction as used by the %substr directive
+ * and function.
+ */
+static Token *pp_substr_common(Token *t, int64_t start, int64_t count);
+
+static Token *pp_substr(Token *tline, const char *dname)
+{
+    int64_t start, count;
+    struct ppscan pps;
+    Token *t;
+    Token *res = NULL;
+    expr *evalresult;
+    struct tokenval tokval;
+
+    t = skip_white(tline);
+
+    if (!tok_is(t, TOKEN_STR)) {
+        nasm_nonfatal("`%s' requires a string as parameter", dname);
+        goto err;
+    }
+
+    pps.tptr = skip_white(t->next);
+    if (tok_is(pps.tptr, TOKEN_COMMA))
+        pps.tptr = skip_white(pps.tptr->next);
+    if (!pps.tptr) {
+        nasm_nonfatal("`%s' requires a starting index", dname);
+        goto err;
+    }
+
+    pps.ntokens = -1;
+    tokval.t_type = TOKEN_INVALID;
+    evalresult = evaluate(ppscan, &pps, &tokval, NULL, true, NULL);
+    if (!evalresult) {
+        goto err;
+    } else if (!is_simple(evalresult)) {
+        nasm_nonfatal("non-constant value given to `%s'", dname);
+        goto err;
+    }
+    start = evalresult->value;
+
+    pps.tptr = skip_white(pps.tptr);
+    if (!pps.tptr) {
+        count = 1;  /* Backwards compatibility: one character */
+    } else {
+        tokval.t_type = TOKEN_INVALID;
+        evalresult = evaluate(ppscan, &pps, &tokval, NULL, true, NULL);
+        if (!evalresult) {
+            goto err;
+        } else if (!is_simple(evalresult)) {
+            nasm_nonfatal("non-constant value given to `%s'", dname);
+            goto err;
+        }
+        count = evalresult->value;
+    }
+
+    res = pp_substr_common(t, start, count);
+
+err:
+    free_tlist(tline);
+    return res;
+}
+
+static Token *pp_substr_common(Token *t, int64_t start, int64_t count)
+{
+    size_t len;
+    const char *txt;
+
+    unquote_token(t);
+    len = t->len;
+
+    /* make start and count being in range */
+    start -= 1;                 /* First character is 1 */
+
+    if (start < 0)
+        start = 0;
+    if (count < 0)
+        count = len + count + 1 - start;
+    if (start + count > (int64_t)len)
+        count = len - start;
+    if (!len || count < 0 || start >=(int64_t)len)
+        start = -1, count = 0; /* empty string */
+
+    txt = (start < 0) ? "" : tok_text(t) + start;
+    return make_tok_qstr_len(NULL, txt, count);
+}
+
+/**
+ * find and process preprocessor directive in passed line
+ * Find out if a line contains a preprocessor directive, and deal
+ * with it if so.
+ *
+ * If a directive _is_ found, it is the responsibility of this routine
+ * (and not the caller) to free_tlist() the line.
+ *
+ * @param tline a pointer to the current tokeninzed line linked list
+ * @param output if this directive generated output
+ * @return DIRECTIVE_FOUND or NO_DIRECTIVE_FOUND
+ *
+ */
+static int do_directive(Token *tline, Token **output)
+{
+    enum preproc_token op;
+    int j;
+    enum nolist_flags nolist;
+    bool casesense;
+    int offset;
+    const char *p;
+    char *q;
+    const char *found_path;
+    const char *mname;
+    struct ppscan pps;
+    Include *inc;
+    Context *ctx;
+    Cond *cond;
+    MMacro *mmac, **mmhead;
+    Token *t = NULL, *tt, *macro_start, *last, *origline;
+    Line *l;
+    struct tokenval tokval;
+    expr *evalresult;
+    int64_t count;
+    errflags severity;
+    const char *dname;          /* Name of directive, for messages */
+
+    *output = NULL;             /* No output generated */
+    origline = tline;
+
+    /* cpp-like line directive, must not be preceded by whitespace */
+    if (tok_is(tline, '#'))
+        return line_directive(origline, tline);
+
+    tline = skip_white(tline);
+    if (!tline)
+        return NO_DIRECTIVE_FOUND;
+
+    switch (tline->type) {
+    case TOKEN_PREPROC_ID:
+        dname = tok_text(tline);
+        /*
+         * For it to be a directive, the second character has to be an
+         * ASCII letter; this is a very quick and dirty test for that;
+         * all other cases will get rejected by the token hash.
+         */
+        if ((uint8_t)(dname1 - 'A') > (uint8_t)('z' - 'A'))
+            return NO_DIRECTIVE_FOUND;
+
+        op = pp_token_hash(dname);
+        break;
+
+    case TOKEN_ID:
+        if (likely(!(ppopt & PP_TASM)))
+            return NO_DIRECTIVE_FOUND;
+
+        dname = tok_text(tline);
+        op = pp_tasm_token_hash(dname);
+        break;
+
+    default:
+        return NO_DIRECTIVE_FOUND;
+    }
+
+    switch (op) {
+    case PP_invalid:
+        return NO_DIRECTIVE_FOUND;
+
+    case PP_LINE:
+        /*
+         * %line directives are always processed immediately and
+         * unconditionally, as they are intended to reflect position
+         * in externally preprocessed sources.
+         */
+        return line_directive(origline, tline);
+
+    default:
+        break;
+    }
+
+    if (unlikely(ppopt & PP_TRIVIAL))
+        goto done;
+
+    casesense = true;
+    if (PP_HAS_CASE(op) & PP_INSENSITIVE(op)) {
+        casesense = false;
+        op--;
+    }
+
+    /*
+     * If we're in a non-emitting branch of a condition construct,
+     * or walking to the end of an already terminated %rep block,
+     * we should ignore all directives except for condition
+     * directives.
+     */
+    if (((istk->conds && !emitting(istk->conds->state)) ||
+         (istk->mstk.mstk && !istk->mstk.mstk->in_progress)) &&
+        !is_condition(op)) {
+        return NO_DIRECTIVE_FOUND;
+    }
+
+    /*
+     * If we're defining a macro or reading a %rep block, we should
+     * ignore all directives except for %macro/%imacro (which nest),
+     * %endm/%endmacro, %line and (only if we're in a %rep block) %endrep.
+     * If we're in a %rep block, another %rep nests, so should be let through.
+     */
+    if (defining && op != PP_MACRO && op != PP_RMACRO &&
+        op != PP_ENDMACRO && op != PP_ENDM &&
+        (defining->name || (op != PP_ENDREP && op != PP_REP))) {
+        return NO_DIRECTIVE_FOUND;
+    }
+
+    if (defining) {
+        if (op == PP_MACRO || op == PP_RMACRO) {
+            nested_mac_count++;
+            return NO_DIRECTIVE_FOUND;
+        } else if (nested_mac_count > 0) {
+            if (op == PP_ENDMACRO) {
+                nested_mac_count--;
+                return NO_DIRECTIVE_FOUND;
+            }
+        }
+        if (!defining->name) {
+            if (op == PP_REP) {
+                nested_rep_count++;
+                return NO_DIRECTIVE_FOUND;
+            } else if (nested_rep_count > 0) {
+                if (op == PP_ENDREP) {
+                    nested_rep_count--;
+                    return NO_DIRECTIVE_FOUND;
+                }
+            }
+        }
+    }
+
+    if (pp_op_may_be_functionop) {
+        if (tok_is(skip_white(tline->next), '('))
+            return NO_DIRECTIVE_FOUND; /* Expand as a preprocessor function */
+    }
+
+    switch (op) {
+    default:
+        nasm_nonfatal("unknown preprocessor directive `%s'", dname);
+        return NO_DIRECTIVE_FOUND;      /* didn't get it */
+
+    case PP_PRAGMA:
+        /*
+         * %pragma namespace options...
+         *
+         * The namespace "preproc" is reserved for the preprocessor;
+         * all other namespaces generate a pragma assembly directive.
+         *
+         * Invalid %pragmas are ignored and may have different
+         * meaning in future versions of NASM.
+         */
+        t = tline;
+        tline = tline->next;
+        t->next = NULL;
+        tline = zap_white(expand_smacro(tline));
+        if (tok_is(tline, TOKEN_ID)) {
+            if (!nasm_stricmp(tok_text(tline), "preproc")) {
+                /* Preprocessor pragma */
+                do_pragma_preproc(tline);
+                free_tlist(tline);
+            } else {
+                /* Build the assembler directive */
+
+                /* Append bracket to the end of the output */
+                for (t = tline; t->next; t = t->next)
+                    ;
+                t->next = make_tok_char(NULL, '');
+
+                /* Prepend "pragma " */
+                t = new_White(tline);
+                t = new_Token(t, TOKEN_ID, "pragma", 6);
+                t = make_tok_char(t, '');
+                tline = t;
+                *output = tline;
+            }
+        }
+        break;
+
+    case PP_STACKSIZE:
+    {
+        const char *arg;
+
+        /* Directive to tell NASM what the default stack size is. The
+         * default is for a 16-bit stack, and this can be overridden with
+         * %stacksize large.
+         */
+        tline = skip_white(tline->next);
+        if (!tline || tline->type != TOKEN_ID) {
+            nasm_nonfatal("`%s' missing size parameter", dname);
+            break;
+        }
+
+        arg = tok_text(tline);
+
+        if (nasm_stricmp(arg, "flat") == 0) {
+            /* All subsequent ARG directives are for a 32-bit stack */
+            StackSize = 4;
+            StackPointer = "ebp";
+            ArgOffset = 8;
+            LocalOffset = 0;
+        } else if (nasm_stricmp(arg, "flat64") == 0) {
+            /* All subsequent ARG directives are for a 64-bit stack */
+            StackSize = 8;
+            StackPointer = "rbp";
+            ArgOffset = 16;
+            LocalOffset = 0;
+        } else if (nasm_stricmp(arg, "large") == 0) {
+            /* All subsequent ARG directives are for a 16-bit stack,
+             * far function call.
+             */
+            StackSize = 2;
+            StackPointer = "bp";
+            ArgOffset = 4;
+            LocalOffset = 0;
+        } else if (nasm_stricmp(arg, "small") == 0) {
+            /* All subsequent ARG directives are for a 16-bit stack,
+             * far function call. We don't support near functions.
+             */
+            StackSize = 2;
+            StackPointer = "bp";
+            ArgOffset = 6;
+            LocalOffset = 0;
+        } else {
+            nasm_nonfatal("`%s' invalid size type", dname);
+        }
+        break;
+    }
+
+    case PP_ARG:
+        /* TASM like ARG directive to define arguments to functions, in
+         * the following form:
+         *
+         *      ARG arg1:WORD, arg2:DWORD, arg4:QWORD
+         */
+        offset = ArgOffset;
+        do {
+            const char *arg;
+            int size = StackSize;
+
+            /* Find the argument name */
+            tline = skip_white(tline->next);
+            if (!tline || tline->type != TOKEN_ID) {
+                nasm_nonfatal("`%s' missing argument parameter", dname);
+                goto done;
+            }
+            arg = tok_text(tline);
+
+            /* Find the argument size type */
+            tline = tline->next;
+            if (!tok_is(tline, ':')) {
+                nasm_nonfatal("syntax error processing `%s' directive", dname);
+                goto done;
+            }
+            tline = tline->next;
+            if (!tok_is(tline, TOKEN_ID)) {
+                nasm_nonfatal("`%s' missing size type parameter", dname);
+                goto done;
+            }
+
+            /* Allow macro expansion of type parameter */
+            tt = tokenize(tok_text(tline));
+            tt = expand_smacro(tt);
+            size = parse_size(tok_text(tt));
+            if (!size) {
+                nasm_nonfatal("invalid size type for `%s' missing directive", dname);
+                free_tlist(tt);
+                goto done;
+            }
+            free_tlist(tt);
+
+            /* Round up to even stack slots */
+            size = ALIGN(size, StackSize);
+
+            /* Now define the macro for the argument */
+            define_stack_smacro(arg, offset);
+            offset += size;
+
+            /* Move to the next argument in the list */
+            tline = skip_white(tline->next);
+        } while (tok_is(tline, ','));
+        ArgOffset = offset;
+        break;
+
+    case PP_LOCAL:
+    {
+        int total_size = 0;
+
+        /* TASM like LOCAL directive to define local variables for a
+         * function, in the following form:
+         *
+         *      LOCAL local1:WORD, local2:DWORD, local4:QWORD = LocalSize
+         *
+         * The '= LocalSize' at the end is ignored by NASM, but is
+         * required by TASM to define the local parameter size (and used
+         * by the TASM macro package).
+         */
+        offset = LocalOffset;
+        do {
+            const char *local;
+            int size = StackSize;
+
+            /* Find the argument name */
+            tline = skip_white(tline->next);
+            if (!tline || tline->type != TOKEN_ID) {
+                nasm_nonfatal("`%s' missing argument parameter", dname);
+                goto done;
+            }
+            local = tok_text(tline);
+
+            /* Find the argument size type */
+            tline = tline->next;
+            if (!tok_is(tline, ':')) {
+                nasm_nonfatal("syntax error processing `%s' directive", dname);
+                goto done;
+            }
+            tline = tline->next;
+            if (!tok_is(tline, TOKEN_ID)) {
+                nasm_nonfatal("`%s' missing size type parameter", dname);
+                goto done;
+            }
+
+            /* Allow macro expansion of type parameter */
+            tt = tokenize(tok_text(tline));
+            tt = expand_smacro(tt);
+            size = parse_size(tok_text(tt));
+            if (!size) {
+                nasm_nonfatal("invalid size type for `%s' missing directive", dname);
+                free_tlist(tt);
+                goto done;
+            }
+            free_tlist(tt);
+
+            /* Round up to even stack slots */
+            size = ALIGN(size, StackSize);
+
+            offset += size;     /* Negative offset, increment before */
+
+            /* Now define the macro for the argument */
+            define_stack_smacro(local, -offset);
+
+            /* How is this different from offset? */
+            total_size += size;
+
+            /* Move to the next argument in the list */
+            tline = skip_white(tline->next);
+        } while (tok_is(tline, ','));
+
+        /* Now define the assign to setup the enter_c macro correctly */
+        tt = make_tok_num(NULL, total_size);
+        tt = make_tok_char(tt, '+');
+        tt = new_Token(tt, TOKEN_LOCAL_MACRO, "%$localsize", 11);
+        assign_smacro("%$localsize", true, tt, dname);
+
+        LocalOffset = offset;
+        break;
+    }
+    case PP_CLEAR:
+    {
+        bool context = false;
+
+        t = tline->next = expand_smacro(tline->next);
+        t = skip_white(t);
+        if (!t) {
+            /* Emulate legacy behavior */
+            do_clear(CLEAR_DEFINE|CLEAR_MMACRO, false);
+        } else {
+            while ((t = skip_white(t)) && t->type == TOKEN_ID) {
+                const char *txt = tok_text(t);
+                if (!nasm_stricmp(txt, "all")) {
+                    do_clear(CLEAR_ALL, context);
+                } else if (!nasm_stricmp(txt, "define") ||
+                           !nasm_stricmp(txt, "def") ||
+                           !nasm_stricmp(txt, "smacro")) {
+                    do_clear(CLEAR_DEFINE, context);
+                } else if (!nasm_stricmp(txt, "defalias") ||
+                           !nasm_stricmp(txt, "alias") ||
+                           !nasm_stricmp(txt, "salias")) {
+                    do_clear(CLEAR_DEFALIAS, context);
+                } else if (!nasm_stricmp(txt, "alldef") ||
+                           !nasm_stricmp(txt, "alldefine")) {
+                    do_clear(CLEAR_ALLDEFINE, context);
+                } else if (!nasm_stricmp(txt, "macro") ||
+                           !nasm_stricmp(txt, "mmacro")) {
+                    do_clear(CLEAR_MMACRO, context);
+                } else if (!nasm_stricmp(txt, "context") ||
+                           !nasm_stricmp(txt, "ctx")) {
+                    context = true;
+                } else if (!nasm_stricmp(txt, "global")) {
+                    context = false;
+                } else if (!nasm_stricmp(txt, "nothing") ||
+                         !nasm_stricmp(txt, "none") ||
+                         !nasm_stricmp(txt, "ignore") ||
+                         !nasm_stricmp(txt, "-") ||
+                         !nasm_stricmp(txt, "--")) {
+                    /* Do nothing */
+                } else {
+                    nasm_nonfatal("invalid option to %s: %s", dname, txt);
+                    t = NULL;
+                }
+            }
+        }
+
+        t = skip_white(t);
+        if (t) {
+            nasm_warn(WARN_PP_TRAILING,
+                      "trailing garbage after `%s' ignored", dname);
+        }
+        break;
+    }
+
+    case PP_DEPEND:
+        t = tline->next = expand_smacro(tline->next);
+        t = skip_white(t);
+        if (!t || (t->type != TOKEN_STR &&
+                   t->type != TOKEN_INTERNAL_STR)) {
+            nasm_nonfatal("`%s' expects a file name", dname);
+            goto done;
+        }
+        if (skip_white(t->next)) {
+            nasm_warn(WARN_PP_TRAILING,
+                      "trailing garbage after `%s' ignored", dname);
+        }
+
+        strlist_add(deplist, unquote_token_cstr(t));
+        goto done;
+
+    case PP_INCLUDE:
+    case PP_REQUIRE:
+        t = tline->next = expand_smacro(tline->next);
+        t = skip_white(t);
+
+        if (!t || (t->type != TOKEN_STR &&
+                   t->type != TOKEN_INTERNAL_STR)) {
+            nasm_nonfatal("`%s' expects a file name", dname);
+            goto done;
+        }
+        if (skip_white(t->next)) {
+            nasm_warn(WARN_PP_TRAILING,
+                      "trailing garbage after `%s' ignored", dname);
+        }
+        p = unquote_token_cstr(t);
+        nasm_new(inc);
+        inc->next = istk;
+        found_path = NULL;
+        inc->fp = inc_fopen(p, deplist, &found_path,
+                            (pp_mode == PP_DEPS) ? INC_OPTIONAL :
+                            (op == PP_REQUIRE) ? INC_REQUIRED :
+                            INC_NEEDED, NF_TEXT);
+        if (!inc->fp) {
+            /* -MG given but file not found, or repeated %require */
+            nasm_free(inc);
+        } else {
+            inc->nolist  = istk->nolist;
+            inc->noline  = istk->noline;
+            inc->where   = istk->where;
+            inc->lineinc = 0;
+            istk = inc;
+            if (!istk->noline) {
+                src_set(0, found_path ? found_path : p);
+                istk->where = src_where();
+                istk->lineinc = 1;
+                if (ppdbg & PDBG_INCLUDE)
+                    dfmt->debug_include(true, istk->next->where, istk->where);
+            }
+            if (!istk->nolist)
+                lfmt->uplevel(LIST_INCLUDE, 0);
+        }
+        break;
+
+    case PP_USE:
+    {
+        const struct use_package *pkg;
+        const char *name;
+
+        pkg = get_use_pkg(tline->next, dname, &name);
+        if (!name)
+            goto done;
+        if (!pkg) {
+            nasm_nonfatal("unknown `%s' package: `%s'", dname, name);
+        } else if (!use_loadedpkg->index) {
+            /*
+             * Not already included, go ahead and include it.
+             * Treat it as an include file for the purpose of
+             * producing a listing.
+             */
+            use_loadedpkg->index = true;
+            stdmacpos = pkg->macros;
+            nasm_new(inc);
+            inc->next = istk;
+            if (!list_option('b')) {
+                inc->nolist++;
+                inc->noline++;
+            }
+            istk = inc;
+            if (!istk->nolist)
+                lfmt->uplevel(LIST_INCLUDE, 0);
+            if (!inc->noline)
+                src_set(0, NULL);
+        }
+        break;
+    }
+    case PP_PUSH:
+    case PP_REPL:
+    case PP_POP:
+        tline = tline->next;
+        tline = skip_white(tline);
+        tline = expand_id(tline);
+        if (tline) {
+            if (!tok_is(tline, TOKEN_ID)) {
+                nasm_nonfatal("`%s' expects a context identifier", dname);
+                goto done;
+            }
+            if (skip_white(tline->next)) {
+                nasm_warn(WARN_PP_TRAILING, "trailing garbage after `%s' ignored",
+                           dname);
+            }
+            p = tok_text(tline);
+        } else {
+            p = NULL; /* Anonymous */
+        }
+
+        if (op == PP_PUSH) {
+            nasm_new(ctx);
+            ctx->depth = cstk ? cstk->depth + 1 : 1;
+            ctx->next = cstk;
+            ctx->name = p ? nasm_strdup(p) : NULL;
+            ctx->number = unique++;
+            cstk = ctx;
+        } else {
+            /* %pop or %repl */
+            if (!cstk) {
+                nasm_nonfatal("`%s': context stack is empty", dname);
+            } else if (op == PP_POP) {
+                if (p && (!cstk->name || nasm_stricmp(p, cstk->name)))
+                    nasm_nonfatal("`%s' in wrong context: %s, "
+                               "expected %s",
+                               dname, cstk->name ? cstk->name : "anonymous", p);
+                else
+                    ctx_pop();
+            } else {
+                /* op == PP_REPL */
+                nasm_free((char *)cstk->name);
+                cstk->name = p ? nasm_strdup(p) : NULL;
+                p = NULL;
+            }
+        }
+        break;
+    case PP_FATAL:
+        severity = ERR_FATAL;
+        goto issue_error;
+    case PP_ERROR:
+        severity = ERR_NONFATAL|ERR_PASS2;
+        goto issue_error;
+    case PP_WARNING:
+        /*!
+         *!user on \c{%warning} directives
+         *!  controls output of \c{%warning} directives (see \k{pperror}).
+         */
+        severity = ERR_WARNING|WARN_USER|ERR_PASS2;
+        goto issue_error;
+
+issue_error:
+    {
+        /* Only error out if this is the final pass */
+        tline->next = expand_smacro(tline->next);
+        tline = tline->next;
+        tline = skip_white(tline);
+        t = tline ? tline->next : NULL;
+        t = skip_white(t);
+        if (tok_is(tline, TOKEN_STR) && !t) {
+            /* The line contains only a quoted string */
+            p = unquote_token(tline); /* Ignore NUL character truncation */
+            nasm_error(severity, "%s",  p);
+        } else {
+            /* Not a quoted string, or more than a quoted string */
+            q = detoken(tline, false);
+            nasm_error(severity, "%s",  q);
+            nasm_free(q);
+        }
+        break;
+    }
+
+    CASE_PP_IF:
+        if (istk->conds && !emitting(istk->conds->state))
+            j = COND_NEVER;
+        else {
+            j = if_condition(tline->next, op);
+            tline->next = NULL; /* it got freed */
+        }
+        cond = nasm_malloc(sizeof(Cond));
+        cond->next = istk->conds;
+        cond->state = j;
+        istk->conds = cond;
+        if(istk->mstk.mstk)
+            istk->mstk.mstk->condcnt++;
+        break;
+
+    CASE_PP_ELIF:
+        if (!istk->conds) {
+            nasm_nonfatal("`%s': no matching `%%if'", dname);
+            break;
+        }
+        switch(istk->conds->state) {
+        case COND_IF_TRUE:
+            istk->conds->state = COND_DONE;
+            break;
+
+        case COND_DONE:
+        case COND_NEVER:
+            break;
+
+        case COND_ELSE_TRUE:
+        case COND_ELSE_FALSE:
+            /*!
+             *!pp-else-elif on \c{%elif} after \c{%else}
+             *!  warns that an \c{%elif}-type directive was encountered
+             *!  after \c{%else} has already been encounted. As a result, the
+             *!  content of the \c{%elif} will never be expanded.
+             */
+            nasm_warn(WARN_PP_ELSE_ELIF|ERR_PP_PRECOND,
+                       "`%s' after `%%else', ignoring content", dname);
+            istk->conds->state = COND_NEVER;
+            break;
+
+        case COND_IF_FALSE:
+            /*
+             * IMPORTANT: In the case of %if, we will already have
+             * called expand_mmac_params(); however, if we're
+             * processing an %elif we must have been in a
+             * non-emitting mode, which would have inhibited
+             * the normal invocation of expand_mmac_params().
+             * Therefore, we have to do it explicitly here.
+             */
+            j = if_condition(expand_mmac_params(tline->next), op);
+            tline->next = NULL; /* it got freed */
+            istk->conds->state = j;
+            break;
+        }
+        break;
+
+    case PP_ELSE:
+        if (tline->next)
+            nasm_warn(WARN_PP_TRAILING|ERR_PP_PRECOND,
+                      "trailing garbage after `%s' ignored", dname);
+        if (!istk->conds) {
+	    nasm_nonfatal("`%s': no matching `%%if'", dname);
+            break;
+        }
+        switch(istk->conds->state) {
+        case COND_IF_TRUE:
+        case COND_DONE:
+            istk->conds->state = COND_ELSE_FALSE;
+            break;
+
+        case COND_NEVER:
+            break;
+
+        case COND_IF_FALSE:
+            istk->conds->state = COND_ELSE_TRUE;
+            break;
+
+        case COND_ELSE_TRUE:
+        case COND_ELSE_FALSE:
+            /*!
+             *!pp-else-else on \c{%else} after \c{%else}
+             *!  warns that a second \c{%else} clause was found for
+             *!  the same \c{%if} statement. The content of this \c{%else}
+             *!  clause will never be expanded.
+             */
+            nasm_warn(WARN_PP_ELSE_ELSE|ERR_PP_PRECOND,
+                      "`%s' after `%%else', ignoring content", dname);
+            istk->conds->state = COND_NEVER;
+            break;
+        }
+        break;
+
+    case PP_ENDIF:
+        if (tline->next) {
+            nasm_warn(WARN_PP_TRAILING|ERR_PP_PRECOND,
+                      "trailing garbage after `%s' ignored", dname);
+        }
+        if (!istk->conds) {
+            nasm_nonfatal("`%s': no matching `%%if'", dname);
+            break;
+        }
+        cond = istk->conds;
+        istk->conds = cond->next;
+        nasm_free(cond);
+        if(istk->mstk.mstk)
+            istk->mstk.mstk->condcnt--;
+        break;
+
+    case PP_RMACRO:
+    case PP_MACRO:
+    {
+        MMacro *def;
+
+        nasm_assert(!defining);
+        nasm_new(def);
+        def->casesense = casesense;
+        /*
+         * dstk.mstk points to the previous definition bracket,
+         * whereas dstk.mmac points to the topmost mmacro, which
+         * in this case is the one we are just starting to create.
+         */
+        def->dstk.mstk = defining;
+        def->dstk.mmac = def;
+        if (op == PP_RMACRO)
+            def->max_depth = nasm_limitLIMIT_MACRO_LEVELS;
+        if (!parse_mmacro_spec(tline, def, dname)) {
+            nasm_free(def);
+            goto done;
+        }
+
+        defining = def;
+        defining->where = istk->where;
+
+        mmac = (MMacro *) hash_findix(&mmacros, defining->name);
+        while (mmac) {
+            if (!strcmp(mmac->name, defining->name) &&
+                (mmac->nparam_min <= defining->nparam_max
+                 || defining->plus)
+                && (defining->nparam_min <= mmac->nparam_max
+                    || mmac->plus)) {
+                /*!
+                 *!pp-macro-redef-multi on redefining multi-line macro
+                 *!  warns that a multi-line macro is being redefined,
+                 *!  without first removing the old definition with
+                 *!  \c{%unmacro}.
+                 */
+                nasm_warn(WARN_PP_MACRO_REDEF_MULTI,
+                          "redefining multi-line macro `%s'",
+                           defining->name);
+                break;
+            }
+            mmac = mmac->next;
+        }
+        break;
+    }
+
+    case PP_ENDM:
+    case PP_ENDMACRO:
+        if (!(defining && defining->name)) {
+            nasm_nonfatal("`%s': not defining a macro", tok_text(tline));
+            goto done;
+        }
+        mmhead = (MMacro **) hash_findi_add(&mmacros, defining->name);
+        defining->next = *mmhead;
+        *mmhead = defining;
+        defining = NULL;
+        break;
+
+    case PP_EXITMACRO:
+        /*
+         * We must search along istk->expansion until we hit a
+         * macro-end marker for a macro with a name. Then we
+         * bypass all lines between exitmacro and endmacro.
+         */
+        list_for_each(l, istk->expansion)
+            if (l->finishes && l->finishes->name)
+                break;
+
+        if (l) {
+            /*
+             * Remove all conditional entries relative to this
+             * macro invocation. (safe to do in this context)
+             */
+            for ( ; l->finishes->condcnt > 0; l->finishes->condcnt --) {
+                cond = istk->conds;
+                if (!cond) {
+                    l->finishes->condcnt = 0;
+                    break;      /* Possible in case of invalid nesting */
+                }
+                istk->conds = cond->next;
+                nasm_free(cond);
+            }
+            istk->expansion = l;
+        } else {
+            nasm_nonfatal("`%%exitmacro' not within `%%macro' block");
+        }
+        break;
+
+    case PP_UNIMACRO:
+        casesense = false;
+        /* fall through */
+    case PP_UNMACRO:
+    {
+        MMacro **mmac_p;
+        MMacro spec;
+
+        nasm_zero(spec);
+        spec.casesense = casesense;
+        if (!parse_mmacro_spec(tline, &spec, dname)) {
+            goto done;
+        }
+        mmac_p = (MMacro **) hash_findi(&mmacros, spec.name, NULL);
+        if (!mmac_p) {
+            /* No such macro */
+            free_tlist(spec.dlist);
+            break;
+        }
+
+        /* Check the macro to be undefined is not being expanded */
+        list_for_each(l, istk->expansion) {
+            if (l->finishes == *mmac_p) {
+                nasm_nonfatal("`%%unmacro' can't undefine the macro being expanded");
+                /*
+                 * Do not release the macro instance to avoid using the freed
+                 * memory while proceeding the expansion.
+                 */
+                goto done;
+            }
+        }
+
+        while (mmac_p && *mmac_p) {
+            mmac = *mmac_p;
+            if (mmac->casesense == spec.casesense &&
+                !mstrcmp(mmac->name, spec.name, spec.casesense) &&
+                mmac->nparam_min == spec.nparam_min &&
+                mmac->nparam_max == spec.nparam_max &&
+                mmac->plus == spec.plus) {
+                *mmac_p = mmac->next;
+                free_mmacro(mmac);
+            } else {
+                mmac_p = &mmac->next;
+            }
+        }
+        free_tlist(spec.dlist);
+        break;
+    }
+
+    case PP_ROTATE:
+        while (tok_white(tline->next))
+            tline = tline->next;
+        if (!tline->next) {
+            free_tlist(origline);
+            nasm_nonfatal("`%s' missing rotate count", dname);
+            return DIRECTIVE_FOUND;
+        }
+        t = expand_smacro(tline->next);
+        tline->next = NULL;
+        pps.tptr = tline = t;
+	pps.ntokens = -1;
+        tokval.t_type = TOKEN_INVALID;
+        evalresult =
+            evaluate(ppscan, &pps, &tokval, NULL, true, NULL);
+        free_tlist(tline);
+        if (!evalresult)
+            return DIRECTIVE_FOUND;
+        if (tokval.t_type) {
+            nasm_warn(WARN_PP_TRAILING,
+                      "trailing garbage after expression ignored");
+        }
+        if (!is_simple(evalresult)) {
+            nasm_nonfatal("non-constant value given to `%s'", dname);
+            return DIRECTIVE_FOUND;
+        }
+        mmac = istk->mstk.mmac;
+        if (!mmac) {
+            nasm_nonfatal("`%s' invoked outside a macro call", dname);;
+        } else if (mmac->nparam == 0) {
+            nasm_nonfatal("`%s' invoked within macro without parameters", dname);
+        } else {
+            int rotate = mmac->rotate + reloc_value(evalresult);
+
+            rotate %= (int)mmac->nparam;
+            if (rotate < 0)
+                rotate += mmac->nparam;
+
+            mmac->rotate = rotate;
+        }
+        break;
+
+    case PP_REP:
+    {
+        MMacro *tmp_defining;
+
+        nolist = 0;
+        tline = skip_white(tline->next);
+        if (tok_is(tline, TOKEN_ID) && tline->len == 7 &&
+	    !nasm_memicmp(tline->text.a, ".nolist", 7)) {
+            if (!list_option('f'))
+                nolist |= NL_LIST; /* ... but update line numbers */
+            tline = skip_white(tline->next);
+        }
+
+        if (tline) {
+            pps.tptr = expand_smacro(tline);
+	    pps.ntokens = -1;
+            tokval.t_type = TOKEN_INVALID;
+            /* XXX: really critical?! */
+            evalresult =
+                evaluate(ppscan, &pps, &tokval, NULL, true, NULL);
+            if (!evalresult)
+                goto done;
+            if (tokval.t_type)
+                nasm_warn(WARN_PP_TRAILING, "trailing garbage after expression ignored");
+            if (!is_simple(evalresult)) {
+                nasm_nonfatal("non-constant value given to `%s'", dname);
+                goto done;
+            }
+            count = reloc_value(evalresult);
+            if (count > nasm_limitLIMIT_REP) {
+                nasm_nonfatal("`%s' count %"PRId64" exceeds limit (currently %"PRId64")",
+                              dname, count, nasm_limitLIMIT_REP);
+                count = 0;
+            } else if (count < 0) {
+                /*!
+                 *!pp-rep-negative on regative \c{%rep} count
+                 *!=negative-rep
+                 *!  warns about a negative count given to the \c{%rep}
+                 *!  preprocessor directive.
+                 */
+                nasm_warn(ERR_PASS2|WARN_PP_REP_NEGATIVE,
+                          "negative `%s' count: %"PRId64, dname, count);
+                count = 0;
+            } else {
+                count++;
+            }
+        } else {
+            nasm_nonfatal("`%s' expects a repeat count", dname);
+            count = 0;
+        }
+        tmp_defining = defining;
+        nasm_new(defining);
+        defining->nolist = nolist;
+        defining->in_progress = count;
+        defining->mstk = istk->mstk;
+        defining->dstk.mstk = tmp_defining;
+        defining->dstk.mmac = tmp_defining ? tmp_defining->dstk.mmac : NULL;
+        defining->where = istk->where;
+        break;
+    }
+
+    case PP_ENDREP:
+        if (!defining || defining->name) {
+            nasm_nonfatal("`%%endrep': no matching `%%rep'");
+            goto done;
+        }
+
+        /*
+         * Now we have a "macro" defined - although it has no name
+         * and we won't be entering it in the hash tables - we must
+         * push a macro-end marker for it on to istk->expansion.
+         * After that, it will take care of propagating itself (a
+         * macro-end marker line for a macro which is really a %rep
+         * block will cause the macro to be re-expanded, complete
+         * with another macro-end marker to ensure the process
+         * continues) until the whole expansion is forcibly removed
+         * from istk->expansion by a %exitrep.
+         */
+        nasm_new(l);
+        l->next = istk->expansion;
+        l->finishes = defining;
+        l->first = NULL;
+        l->where = src_where();
+        istk->expansion = l;
+
+        istk->mstk.mstk = defining;
+
+        /* A loop does not change istk->noline */
+        istk->nolist += !!(defining->nolist & NL_LIST);
+        if (!istk->nolist)
+            lfmt->uplevel(LIST_MACRO, 0);
+
+        defining = defining->dstk.mstk;
+        break;
+
+    case PP_EXITREP:
+        /*
+         * We must search along istk->expansion until we hit a
+         * macro-end marker for a macro with no name. Then we set
+         * its `in_progress' flag to 0.
+         */
+        list_for_each(l, istk->expansion)
+            if (l->finishes && !l->finishes->name)
+                break;
+
+        if (l)
+            l->finishes->in_progress = 0;
+        else
+            nasm_nonfatal("`%%exitrep' not within `%%rep' block");
+        break;
+
+    case PP_DEFINE:
+    case PP_XDEFINE:
+    case PP_DEFALIAS:
+    {
+        SMacro tmpl;
+        Token **lastp;
+        int nparam;
+
+        if (!(mname = get_id(&tline, dname)))
+            goto done;
+
+        nasm_zero(tmpl);
+        lastp = &tline->next;
+        nparam = parse_smacro_template(&lastp, &tmpl);
+        tline = *lastp;
+        *lastp = NULL;
+
+        if (unlikely(op == PP_DEFALIAS)) {
+            macro_start = tline;
+            if (!is_macro_id(macro_start)) {
+                nasm_nonfatal("`%s' expects a macro identifier to alias",
+                              dname);
+                goto done;
+            }
+            tt = macro_start->next;
+            macro_start->next = NULL;
+            tline = tline->next;
+            tline = skip_white(tline);
+            if (tline && tline->type) {
+                nasm_warn(WARN_PP_TRAILING,
+                          "trailing garbage after aliasing identifier ignored");
+            }
+            free_tlist(tt);
+            tmpl.alias = true;
+        } else {
+            if (op == PP_XDEFINE) {
+                /* Protect macro parameter tokens */
+                if (nparam)
+                    mark_smac_params(tline, &tmpl, TOKEN_XDEF_PARAM);
+                tline = expand_smacro(tline);
+            }
+            macro_start = tline;
+        }
+
+        /*
+         * Good. We now have a macro name, a parameter count, and a
+         * token list (in reverse order) for an expansion. We ought
+         * to be OK just to create an SMacro, store it, and let
+         * free_tlist have the rest of the line (which we have
+         * carefully re-terminated after chopping off the expansion
+         * from the end).
+         */
+        define_smacro(mname, casesense, macro_start, &tmpl);
+        break;
+    }
+
+    case PP_UNDEF:
+    case PP_UNDEFALIAS:
+        if (!(mname = get_id(&tline, dname)))
+            goto done;
+        if (tline->next)
+            nasm_warn(WARN_PP_TRAILING,
+                      "trailing garbage after macro name ignored");
+
+        undef_smacro(mname, op == PP_UNDEFALIAS);
+        break;
+
+    case PP_DEFSTR:
+        if (!(mname = get_id(&tline, dname)))
+            goto done;
+
+        last = tline;
+        tline = expand_smacro(tline->next);
+        last->next = NULL;
+
+        tline = zap_white(tline);
+        q = detoken(tline, false);
+        macro_start = make_tok_qstr(NULL, q);
+        nasm_free(q);
+
+        /*
+         * We now have a macro name, an implicit parameter count of
+         * zero, and a string token to use as an expansion. Create
+         * and store an SMacro.
+         */
+        define_smacro(mname, casesense, macro_start, NULL);
+        break;
+
+    case PP_DEFTOK:
+        if (!(mname = get_id(&tline, dname)))
+            goto done;
+
+        last = tline;
+        tline = expand_smacro(tline->next);
+        last->next = NULL;
+
+        t = skip_white(tline);
+        /* t should now point to the string */
+        if (!tok_is(t, TOKEN_STR)) {
+            nasm_nonfatal("`%s' requires string as second parameter", dname);
+            free_tlist(tline);
+            goto done;
+        }
+
+        /*
+         * Convert the string to a token stream.
+         */
+        macro_start = tokenize(unquote_token_cstr(t));
+
+        /*
+         * We now have a macro name, an implicit parameter count of
+         * zero, and a numeric token to use as an expansion. Create
+         * and store an SMacro.
+         */
+        define_smacro(mname, casesense, macro_start, NULL);
+        free_tlist(tline);
+        break;
+
+    case PP_PATHSEARCH:
+    {
+        const char *found_path;
+
+        if (!(mname = get_id(&tline, dname)))
+            goto done;
+
+        last = tline;
+        tline = expand_smacro(tline->next);
+        last->next = NULL;
+
+        t = skip_white(tline);
+        if (!t || (t->type != TOKEN_STR &&
+                   t->type != TOKEN_INTERNAL_STR)) {
+            nasm_nonfatal("`%s' expects a file name", dname);
+            free_tlist(tline);
+            goto done;
+        }
+        if (t->next)
+            nasm_warn(WARN_PP_TRAILING,
+                      "trailing garbage after `%s' ignored", dname);
+
+	p = unquote_token_cstr(t);
+
+        inc_fopen(p, NULL, &found_path, INC_PROBE, NF_BINARY);
+        if (!found_path)
+            found_path = p;
+	macro_start = make_tok_qstr(NULL, found_path);
+
+        /*
+         * We now have a macro name, an implicit parameter count of
+         * zero, and a string token to use as an expansion. Create
+         * and store an SMacro.
+         */
+        define_smacro(mname, casesense, macro_start, NULL);
+        free_tlist(tline);
+        break;
+    }
+
+    case PP_STRLEN:
+        if (!(mname = get_id(&tline, dname)))
+            goto done;
+
+        last = tline;
+        tline = expand_smacro(tline->next);
+        last->next = NULL;
+
+        t = skip_white(tline);
+        /* t should now point to the string */
+        if (!tok_is(t, TOKEN_STR)) {
+            nasm_nonfatal("`%s' requires string as second parameter", dname);
+            free_tlist(tline);
+            free_tlist(origline);
+            return DIRECTIVE_FOUND;
+        }
+
+	unquote_token(t);
+        macro_start = make_tok_num(NULL, t->len);
+
+        /*
+         * We now have a macro name, an implicit parameter count of
+         * zero, and a numeric token to use as an expansion. Create
+         * and store an SMacro.
+         */
+        define_smacro(mname, casesense, macro_start, NULL);
+        free_tlist(tline);
+        free_tlist(origline);
+        return DIRECTIVE_FOUND;
+
+    case PP_STRCAT:
+        if (!(mname = get_id(&tline, dname)))
+            goto done;
+
+        last = tline;
+        tline = expand_smacro(tline->next);
+        last->next = NULL;
+
+        macro_start = pp_strcat(tline, dname);
+        /*
+         * We now have a macro name, an implicit parameter count of
+         * zero, and a string token to use as an expansion. Create
+         * and store an SMacro.
+         */
+        if (macro_start)
+            define_smacro(mname, casesense, macro_start, NULL);
+        break;
+
+    case PP_SUBSTR:
+        if (!(mname = get_id(&tline, dname)))
+            goto done;
+
+        last = tline;
+        tline = expand_smacro(tline->next);
+        last->next = NULL;
+
+        macro_start = pp_substr(tline, dname);
+        /*
+         * We now have a macro name, an implicit parameter count of
+         * zero, and a string token to use as an expansion. Create
+         * and store an SMacro.
+         */
+        if (macro_start)
+            define_smacro(mname, casesense, macro_start, NULL);
+        break;
+
+    case PP_ASSIGN:
+        if (!(mname = get_id(&tline, dname)))
+            goto done;
+
+        last = tline;
+        tline = tline->next;
+        last->next = NULL;
+        assign_smacro(mname, casesense, tline, dname);
+        goto done;
+
+    case PP_ALIASES:
+        tline = tline->next;
+        tline = expand_smacro(tline);
+        ppconf.noaliases = !pp_get_boolean_option(tline, !ppconf.noaliases);
+        break;
+
+    case PP_LINE:
+        nasm_panic("`%s' directive not preprocessed early", dname);
+        break;
+
+    case PP_NULL:
+        /* Goes nowhere, does nothing... */
+        break;
+
+    }
+
+done:
+    free_tlist(origline);
+    return DIRECTIVE_FOUND;
+}
+
+/*
+ * Ensure that a macro parameter contains a condition code and
+ * nothing else. Return the condition code index if so, or -1
+ * otherwise.
+ */
+static int find_cc(Token * t)
+{
+    Token *tt;
+
+    if (!t)
+        return -1;              /* Probably a %+ without a space */
+
+    t = skip_white(t);
+    if (!tok_is(t, TOKEN_ID))
+        return -1;
+    tt = t->next;
+    tt = skip_white(tt);
+    if (tok_isnt(tt, ','))
+        return -1;
+
+    return bsii(tok_text(t), (const char **)conditions,
+		ARRAY_SIZE(conditions));
+}
+
+enum concat_flags {
+    CONCAT_ID             = 0x01,
+    CONCAT_LOCAL_MACRO    = 0x02,
+    CONCAT_ENVIRON        = 0x04,
+    CONCAT_PREPROC_ID     = 0x08,
+    CONCAT_NUM            = 0x10,
+    CONCAT_FLOAT          = 0x20,
+    CONCAT_OP             = 0x40  /* Operators */
+};
+
+struct concat_mask {
+    enum concat_flags mask_head;
+    enum concat_flags mask_tail;
+};
+
+
+static inline bool pp_concat_match(const Token *t, enum concat_flags mask)
+{
+    enum concat_flags ctype = 0;
+
+    if (!t)
+        return false;
+
+    switch (t->type) {
+    case TOKEN_ID:
+    case TOKEN_QMARK:           /* Keyword, treated as ID for pasting */
+        ctype = CONCAT_ID;
+        break;
+    case TOKEN_LOCAL_MACRO:
+        ctype = CONCAT_LOCAL_MACRO;
+        break;
+    case TOKEN_ENVIRON:
+        ctype = CONCAT_ENVIRON;
+        break;
+    case TOKEN_PREPROC_ID:
+        ctype = CONCAT_PREPROC_ID;
+        break;
+    case TOKEN_NUM:
+    case TOKEN_FLOAT:
+        ctype = CONCAT_NUM;
+        break;
+    case TOKEN_HERE:
+    case TOKEN_BASE:
+        /* NASM 2.15 treats these as operators, but is that sane? */
+        ctype = CONCAT_OP;
+        break;
+    case TOKEN_OTHER:
+        ctype = CONCAT_OP;      /* For historical reasons */
+        break;
+    default:
+        if (t->type > TOKEN_WHITESPACE && t->type < TOKEN_MAX_OPERATOR)
+            ctype = CONCAT_OP;
+        else
+            ctype = 0;
+    }
+
+    return !!(ctype & mask);
+}
+
+/*
+ * This routines walks over tokens stream and handles tokens
+ * pasting, if @handle_explicit passed then explicit pasting
+ * term is handled, otherwise -- implicit pastings only.
+ * The @m array can contain a series of token types which are
+ * executed as separate passes.
+ */
+static bool paste_tokens(Token **head, const struct concat_mask *m,
+                         size_t mnum, bool handle_explicit)
+{
+    Token *tok, *t, *next, **prev_next, **prev_nonspace, **nextp;
+    bool pasted = false;
+    char *buf, *p;
+    size_t len, i;
+
+    /*
+     * The last token before pasting. We need it
+     * to be able to connect new handled tokens.
+     * In other words if there were a tokens stream
+     *
+     * A -> B -> C -> D
+     *
+     * and we've joined tokens B and C, the resulting
+     * stream should be
+     *
+     * A -> BC -> D
+     */
+    tok = *head;
+    prev_next = prev_nonspace = head;
+
+    if (tok_white(tok) || tok_is(tok, TOKEN_PASTE))
+        prev_nonspace = NULL;
+
+    while (tok && (next = tok->next)) {
+        bool did_paste = false;
+
+        switch (tok->type) {
+        case TOKEN_WHITESPACE:
+            /* Zap redundant whitespaces */
+            tok->next = next = zap_white(next);
+            break;
+
+        case TOKEN_PASTE:
+            /* Explicit pasting */
+            if (!handle_explicit)
+                break;
+
+            did_paste = true;
+
+            /* Left pasting token is start of line, just drop %+ */
+            if (!prev_nonspace) {
+                prev_next = nextp = head;
+                t = NULL;
+            } else {
+                prev_next = prev_nonspace;
+                t = *prev_next;
+                nextp = &t->next;
+            }
+
+            /*
+             * Delete the %+ token itself plus any whitespace.
+             * In a sequence of %+ ... %+ ... %+ pasting sequences where
+             * some expansions in the middle have ended up empty,
+             * we can end up having multiple %+ tokens in a row;
+             * just drop whem in that case.
+             */
+            next = *nextp;
+            while (next) {
+                if (next->type == TOKEN_PASTE || next->type == TOKEN_WHITESPACE)
+                    next = delete_Token(next);
+                else
+                    break;
+            }
+            *nextp = next;
+
+            /*
+             * Nothing after? Just leave the existing token.
+             */
+            if (!next)
+                break;
+
+            if (!t) {
+                /* Nothing to actually paste, just zapping the paste */
+                *prev_next = tok = next;
+                break;
+            }
+
+            /* An actual paste */
+            p = buf = nasm_malloc(t->len + next->len + 1);
+            p = mempcpy(p, tok_text(t), t->len);
+            p = mempcpy(p, tok_text(next), next->len);
+            *p = '\0';
+            delete_Token(t);
+            t = tokenize(buf);
+            nasm_free(buf);
+
+            if (unlikely(!t)) {
+                /*
+                 * No output at all? Replace with a single whitespace.
+                 * This should never happen.
+                 */
+                tok = t = new_White(NULL);
+            } else {
+                *prev_nonspace = tok = t;
+            }
+            while (t->next)
+                t = t->next;    /* Find the last token produced */
+
+            /* Delete the second token and attach to the end of the list */
+            t->next = delete_Token(next);
+
+            /* We want to restart from the head of the pasted token */
+            *prev_next = next = tok;
+            break;
+
+        default:
+            /* implicit pasting */
+            for (i = 0; i < mnum; i++) {
+                if (pp_concat_match(tok, mi.mask_head))
+                    break;
+            }
+
+            if (i >= mnum)
+                break;
+
+            len =  tok->len;
+            while (pp_concat_match(next, mi.mask_tail)) {
+                len += next->len;
+                next = next->next;
+            }
+
+            /* No match or no text to process */
+            if (len == tok->len)
+                break;
+
+            p = buf = nasm_malloc(len + 1);
+            while (tok != next) {
+                p = mempcpy(p, tok_text(tok), tok->len);
+                tok = delete_Token(tok);
+            }
+            *p = '\0';
+            *prev_next = tok = t = tokenize(buf);
+            nasm_free(buf);
+
+            /*
+             * Connect pasted into original stream,
+             * ie A -> new-tokens -> B
+             */
+            while ((tok = t->next)) {
+                if (tok->type != TOKEN_WHITESPACE && tok->type != TOKEN_PASTE)
+                    prev_nonspace = &t->next;
+                t = tok;
+            }
+
+            t->next = next;
+            prev_next = &t->next;
+            did_paste = true;
+            break;
+        }
+
+        if (did_paste) {
+            pasted = true;
+        } else {
+            prev_next = &tok->next;
+            if (next && next->type != TOKEN_WHITESPACE &&
+                next->type != TOKEN_PASTE)
+                prev_nonspace = prev_next;
+        }
+        tok = next;
+    }
+
+    return pasted;
+}
+
+/*
+ * Computes the proper rotation of mmacro parameters
+ */
+static int mmac_rotate(const MMacro *mac, unsigned int n)
+{
+    if (--n < mac->nparam)
+        n = (n + mac->rotate) % mac->nparam;
+
+    return n+1;
+}
+
+/*
+ * expands to a list of tokens from %{x:y}
+ */
+static void expand_mmac_params_range(MMacro *mac, Token *tline, Token ***tail)
+{
+    Token *t;
+    const char *arg = tok_text(tline) + 1;
+    int fst, lst, incr, n;
+    int parsed;
+
+    parsed = sscanf(arg, "%d:%d", &fst, &lst);
+    nasm_assert(parsed == 2);
+
+    /*
+     * only macros params are accounted so
+     * if someone passes %0 -- we reject such
+     * value(s)
+     */
+    if (lst == 0 || fst == 0)
+        goto err;
+
+    /* the values should be sane */
+    if ((fst > (int)mac->nparam || fst < (-(int)mac->nparam)) ||
+        (lst > (int)mac->nparam || lst < (-(int)mac->nparam)))
+        goto err;
+
+    fst = fst < 0 ? fst + (int)mac->nparam + 1: fst;
+    lst = lst < 0 ? lst + (int)mac->nparam + 1: lst;
+
+    /*
+     * It will be at least one parameter, as we can loop
+     * in either direction.
+     */
+    incr = (fst < lst) ? 1 : -1;
+
+    while (true) {
+        n = mmac_rotate(mac, fst);
+        dup_tlistn(mac->paramsn, mac->paramlenn, tail);
+        if (fst == lst)
+            break;
+        t = make_tok_char(NULL, ',');
+        **tail = t;
+        *tail = &t->next;
+        fst += incr;
+    }
+
+    return;
+
+err:
+    nasm_nonfatal("`%%{%s}': macro parameters out of range", arg);
+    return;
+}
+
+/*
+ * Expand MMacro-local things: parameter references (%0, %n, %+n,
+ * %-n) and MMacro-local identifiers (%%foo) as well as
+ * macro indirection (%...) and range (%{..:..}).
+ */
+static Token *expand_mmac_params(Token * tline)
+{
+    Token **tail, *thead;
+    bool changed = false;
+    MMacro *mac = istk->mstk.mmac;
+
+    tail = &thead;
+    thead = NULL;
+
+    while (tline) {
+        bool change;
+        bool err_not_mac = false;
+        Token *t = tline;
+        const char *text = tok_text(t);
+        int type = t->type;
+
+        tline = tline->next;
+        t->next = NULL;
+
+        switch (type) {
+        case TOKEN_LOCAL_SYMBOL:
+            change = true;
+
+            if (!mac) {
+                err_not_mac = true;
+                break;
+            }
+
+            type = TOKEN_ID;
+            text = nasm_asprintf("..@%"PRIu64".%s", mac->unique, text+2);
+            break;
+        case TOKEN_MMACRO_PARAM:
+        {
+            Token *tt = NULL;
+
+            change = true;
+
+            if (!mac) {
+                err_not_mac = true;
+                break;
+            }
+
+            if (strchr(text, ':')) {
+                /* It is a range */
+                expand_mmac_params_range(mac, t, &tail);
+                text = NULL;
+                break;
+            }
+
+            switch (text1) {
+                /*
+                 * We have to make a substitution of one of the
+                 * forms %1, %-1, %+1, %%foo, %0, %00.
+                 */
+            case '0':
+                if (!text2) {
+                    type = TOKEN_NUM;
+                    text = nasm_asprintf("%d", mac->nparam);
+                    break;
+                }
+                if (text2 != '0' || text3)
+                    goto invalid;
+                /* a possible captured label == mac->params0 */
+                /* fall through */
+            default:
+            {
+                unsigned long n;
+                char *ep;
+
+                n = strtoul(text + 1, &ep, 10);
+                if (unlikely(*ep))
+                    goto invalid;
+
+                if (n <= mac->nparam) {
+                    n = mmac_rotate(mac, n);
+                    dup_tlistn(mac->paramsn, mac->paramlenn, &tail);
+                }
+                text = NULL;
+                break;
+            }
+            case '-':
+            case '+':
+            {
+                int cc;
+                unsigned long n;
+                char *ep;
+
+                n = strtoul(tok_text(t) + 2, &ep, 10);
+                if (unlikely(*ep))
+                    goto invalid;
+
+                if (n && n <= mac->nparam) {
+                    n = mmac_rotate(mac, n);
+                    tt = mac->paramsn;
+                }
+                cc = find_cc(tt);
+                if (cc == -1) {
+                    nasm_nonfatal("macro parameter `%s' is not a condition code",
+                                  tok_text(t));
+                    text = NULL;
+                    break;
+                }
+
+                type = TOKEN_ID;
+                if (text1 == '-') {
+                    int ncc = inverse_ccscc;
+                    if (unlikely(ncc == -1)) {
+                        nasm_nonfatal("condition code `%s' is not invertible",
+                                      conditionscc);
+                        break;
+                    }
+                    cc = ncc;
+                }
+                text = nasm_strdup(conditionscc);
+                break;
+            }
+
+            invalid:
+                nasm_nonfatal("invalid macro parameter: `%s'", text);
+                text = NULL;
+                break;
+            }
+            break;
+        }
+
+        case TOKEN_PREPROC_Q:
+            if (mac) {
+                type = TOKEN_ID;
+                text = nasm_strdup(mac->iname);
+                change = true;
+            } else {
+                change = false;
+            }
+            break;
+
+        case TOKEN_PREPROC_QQ:
+            if (mac) {
+                type = TOKEN_ID;
+                text = nasm_strdup(mac->name);
+                change = true;
+            } else {
+                change = false;
+            }
+            break;
+
+        case TOKEN_INDIRECT:
+        {
+            Token *tt;
+
+            tt = tokenize(tok_text(t));
+            tt = expand_mmac_params(tt);
+            tt = expand_smacro(tt);
+            tail = steal_tlist(tt, tail);
+            text = NULL;
+            change = true;
+            break;
+        }
+
+        default:
+            change = false;
+            break;
+        }
+
+        if (err_not_mac) {
+            nasm_nonfatal("`%s': not in a macro call", text);
+            text = NULL;
+            change = true;
+        }
+
+        if (change) {
+            if (!text) {
+                delete_Token(t);
+            } else {
+                *tail = t;
+                tail = &t->next;
+		set_text(t, text, tok_strlen(text));
+                t->type = type;
+            }
+            changed = true;
+        } else {
+            *tail = t;
+            tail = &t->next;
+        }
+    }
+
+    *tail = NULL;
+
+    if (changed) {
+        const struct concat_mask t = {
+            {
+                CONCAT_ID | CONCAT_FLOAT,   /* head */
+                CONCAT_ID | CONCAT_NUM | CONCAT_FLOAT | CONCAT_OP /* tail */
+            },
+            {
+                CONCAT_NUM,     /* head */
+                CONCAT_NUM      /* tail */
+            }
+        };
+        paste_tokens(&thead, t, ARRAY_SIZE(t), false);
+    }
+
+    return thead;
+}
+
+static Token *expand_smacro_noreset(Token * tline);
+static SMacro *expand_one_smacro(Token ***tpp);
+
+/*
+ * Expand one single-line macro instance given a specific macro and a
+ * specific set of parameters. Returns a pointer to the expansion, and
+ * the pointer *epp pointing to the next pointer of the last token of
+ * the expansion; if the expansion is empty return NULL and *epp is
+ * unchanged.
+ *
+ * mstart is the token containing the token name *as invoked*.
+ */
+static Token *
+expand_smacro_with_params(SMacro *m, Token *mstart, Token **params,
+                          int nparam, Token ***epp)
+{
+    /* Is it a macro or a preprocessor function? Used for diagnostics. */
+    const char * const mtype = m->name0 == '%' ? "function" : "macro";
+    Token *t, *tline, *tup;
+    bool cond_comma;
+    const struct smac_param *mparm;
+    int i;
+
+    /* Expand the macro */
+    m->in_progress++;
+
+    /*
+     * Postprocessing of of parameters. Note that the ordering matters
+     * here.
+     *
+     * mparm points to the current parameter specification
+     * structure (struct smac_param); this may not match the index
+     * i in the case of varadic parameters.
+     */
+    if (nparam) {
+        for (i = 0, mparm = m->params; i < nparam;
+             i++, mparm += !(mparm->flags & SPARM_VARADIC)) {
+            const enum sparmflags flags = mparm->flags;
+
+            if (flags & SPARM_EVAL) {
+                /* Evaluate this parameter as a number */
+                struct ppscan pps;
+                struct tokenval tokval;
+                expr *evalresult;
+                Token *eval_param;
+
+                eval_param = zap_white(expand_smacro_noreset(paramsi));
+                paramsi = NULL;
+
+                if (!eval_param) {
+                    /* empty argument */
+                    if (mparm->def) {
+                        paramsi = dup_tlist(mparm->def, NULL);
+                        continue;
+                    } else if (flags & SPARM_OPTIONAL) {
+                        continue;
+                    }
+                    /* otherwise, allow evaluate() to generate an error */
+                }
+
+                pps.tptr = eval_param;
+                pps.ntokens = -1;
+                tokval.t_type = TOKEN_INVALID;
+                evalresult = evaluate(ppscan, &pps, &tokval, NULL, true, NULL);
+
+                free_tlist(eval_param);
+
+                if (!evalresult) {
+                    /* Nothing meaningful to do */
+                } else if (tokval.t_type) {
+                    nasm_nonfatal("invalid expression in parameter %d of %s `%s'",
+                                  i+1, mtype, m->name);
+                } else if (!is_simple(evalresult)) {
+                    nasm_nonfatal("non-constant expression in parameter %d of %s `%s'",
+                                  i+1, mtype, m->name);
+                } else {
+                    int64_t v = reloc_value(evalresult);
+                    paramsi = make_tok_num_radix(NULL, v, mparm->radix,
+                                                   !!(flags & SPARM_UNSIGNED));
+                }
+            }
+
+            if (flags & SPARM_STR) {
+                /* Convert expansion to a quoted string */
+                Token *qs;
+
+                qs = expand_smacro_noreset(paramsi);
+                if ((flags & SPARM_CONDQUOTE) &&
+                    tok_is(qs, TOKEN_STR) && !qs->next) {
+                    /* A single quoted string token */
+                    paramsi = qs;
+                } else {
+                    char *arg = detoken(qs, false);
+                    free_tlist(qs);
+                    paramsi = make_tok_qstr(NULL, arg);
+                    nasm_free(arg);
+                }
+            }
+        }
+    }
+
+
+    /* Note: we own the expansion this returns. */
+    t = m->expand(m, params, nparam);
+
+    tup = tline = NULL;
+    cond_comma = false;
+
+    while (t) {
+        enum token_type type = t->type;
+        Token *tnext = t->next;
+
+        switch (type) {
+        case TOKEN_PREPROC_Q:
+        case TOKEN_PREPROC_SQ:
+            delete_Token(t);
+            t = dup_Token(tline, mstart);
+            break;
+
+        case TOKEN_PREPROC_QQ:
+        case TOKEN_PREPROC_SQQ:
+        {
+            size_t mlen = strlen(m->name);
+	    size_t len;
+            char *p, *from;
+
+            t->type = mstart->type;
+            if (t->type == TOKEN_LOCAL_MACRO) {
+		const char *psp; /* prefix start pointer */
+                const char *pep; /* prefix end pointer */
+		size_t plen;
+
+		psp = tok_text(mstart);
+                get_ctx(psp, &pep);
+                plen = pep - psp;
+
+                len = mlen + plen;
+                from = p = nasm_malloc(len + 1);
+                p = mempcpy(p, psp, plen);
+            } else {
+                len = mlen;
+                from = p = nasm_malloc(len + 1);
+            }
+            p = mempcpy(p, m->name, mlen);
+            *p = '\0';
+	    set_text_free(t, from, len);
+
+            t->next = tline;
+            break;
+        }
+
+        case TOKEN_COND_COMMA:
+            delete_Token(t);
+            t = cond_comma ? make_tok_char(tline, ',') : NULL;
+            break;
+
+        case TOKEN_ID:
+        case TOKEN_PREPROC_ID:
+	case TOKEN_LOCAL_MACRO:
+        {
+            /*
+             * Chain this into the target line *before* expanding,
+             * that way we pick up any arguments to the new macro call,
+             * if applicable.
+             */
+            Token **tp = &t;
+            t->next = tline;
+            expand_one_smacro(&tp);
+            tline = *tp;        /* First token left after any macro call */
+            break;
+        }
+        default:
+            if (is_smac_param(t->type)) {
+                int param = smac_nparam(t->type);
+                nasm_assert(!tup && param < nparam);
+                delete_Token(t);
+                t = NULL;
+                tup = tnext;
+                tnext = dup_tlist_reverse(paramsparam, NULL);
+                cond_comma = false;
+            } else {
+                t->next = tline;
+            }
+        }
+
+        if (t) {
+            Token *endt = tline;
+
+            tline = t;
+            while (!cond_comma && t && t != endt) {
+                cond_comma = t->type != TOKEN_WHITESPACE;
+                t = t->next;
+            }
+        }
+
+        if (tnext) {
+            t = tnext;
+        } else {
+            t = tup;
+            tup = NULL;
+        }
+    }
+
+    if (epp) {
+        Token **ep = *epp;
+        for (t = tline; t; t = t->next)
+            ep = &t->next;
+        *epp = ep;
+    }
+
+    /* Expansion complete */
+    m->in_progress--;
+
+    return tline;
+}
+
+/*
+ * Count the arguments to an smacro call. Returns 0 if the token following
+ * is not a left paren. *tp is set to point to the final ) if non-NULL;
+ * it is left unchanged for the zero-argument case.
+ */
+static int count_smacro_args(Token *t, Token **tp)
+{
+    int nparam;
+    int paren, brackets;
+
+    t = skip_white(t);
+
+    if (!tok_is(t, '('))
+        return 0;
+
+    paren = 1;
+    nparam = 1;
+    brackets = 0;
+
+    while (paren) {
+        t = t->next;
+
+        if (!t) {
+            nasm_nonfatal("macro call expects terminating `)'");
+            return 0;
+        }
+
+        switch (t->type) {
+        case ',':
+            if (!brackets && paren == 1)
+                nparam++;
+            break;
+
+        case '{':
+            brackets++;
+            break;
+
+        case '}':
+            if (brackets > 0)
+                brackets--;
+            break;
+
+        case '(':
+            if (!brackets)
+                paren++;
+            break;
+
+        case ')':
+            if (!brackets)
+                paren--;
+            break;
+
+        default:
+            break;          /* Normal token */
+        }
+    }
+
+    if (tp)
+        *tp = t;
+    return nparam;
+}
+
+/*
+ * Collect the arguments to an smacro call. The size of the array must have
+ * been previously counted. It *is* permitted to call this with an nparam
+ * value that is too small for the macro in question; in that case the
+ * parameters are treated as missing optional arguments, even if they
+ * are not optional in the macro specification.
+ *
+ * *nparamp is adjusted if some arguments got merged as greedy or entered
+ * as optional/empty.
+ *
+ * Moves *tp to point to the final ) token.
+ */
+static Token **parse_smacro_args(Token **tp, int *nparamp, const SMacro *m)
+{
+    Token **phead, **pep;
+    int white = 0;
+    int brackets = 0;
+    int paren;
+    bool bracketed = false;
+    bool bad_bracket = false;
+    int i;
+    enum sparmflags flags;
+    const struct smac_param *mparm;
+    Token *t = *tp;
+    int nparam = *nparamp;
+    Token **params;
+    /* Is it a macro or a preprocessor function? Used for diagnostics. */
+    const char * const mtype = m->name0 == '%' ? "function" : "macro";
+
+    t = skip_white(t);
+    nasm_assert(tok_is(t, '('));
+
+    if (nparam > m->nparam) {
+        if (m->paramsm->nparam-1.flags & SPARM_GREEDY)
+            *nparamp = nparam = m->nparam;
+    } else if (nparam < m->nparam) {
+        *nparamp = nparam = m->nparam; /* Missing optional arguments = empty */
+    }
+    paren = 1;
+    nasm_newn(params, nparam);
+    i = 0;
+    mparm = m->params;
+    flags = mparm->flags;
+    phead = pep = &paramsi;
+    *pep = NULL;
+
+    while (paren) {
+        bool skip;
+
+        t = t->next;
+
+        if (!t)
+            nasm_nonfatal("%s `%s' call expects terminating `)'",
+                          mtype, m->name);
+
+        skip = false;
+
+        switch (t->type) {
+        case TOKEN_WHITESPACE:
+            if (!(flags & SPARM_NOSTRIP)) {
+                if (brackets || *phead)
+                    white++;    /* Keep interior whitespace */
+                skip = true;
+            }
+            break;
+
+        case ',':
+            if (!brackets && paren == 1 && !(flags & SPARM_GREEDY)) {
+                i++;
+                nasm_assert(i < nparam);
+                phead = pep = &paramsi;
+                *pep = NULL;
+                bracketed = false;
+                skip = true;
+                if (!(flags & SPARM_VARADIC)) {
+                    mparm++;
+                    flags = mparm->flags;
+                }
+            }
+            break;
+
+        case '{':
+            if (!bracketed) {
+                bracketed = !*phead && !(flags & SPARM_NOSTRIP);
+                skip = bracketed;
+            }
+            brackets++;
+            break;
+
+        case '}':
+            if (brackets > 0) {
+                if (!--brackets)
+                    skip = bracketed;
+            }
+            break;
+
+        case '(':
+            if (!brackets)
+                paren++;
+            break;
+
+        case ')':
+            if (!brackets) {
+                paren--;
+                if (!paren) {
+                    skip = true;
+                    i++;    /* Found last argument */
+                }
+            }
+            break;
+
+        default:
+            break;          /* Normal token */
+        }
+
+        if (!skip) {
+            Token *tt;
+
+            bad_bracket |= bracketed && !brackets;
+
+            if (white) {
+                *pep = tt = new_White(NULL);
+                pep = &tt->next;
+                white = 0;
+            }
+            *pep = tt = dup_Token(NULL, t);
+            pep = &tt->next;
+        }
+    }
+
+    *tp = t;
+    return params;
+}
+
+/*
+ * Expand *one* single-line macro instance. If the first token is not
+ * a macro at all, it is simply copied to the output and the pointer
+ * advanced.  tpp should be a pointer to a pointer (usually the next
+ * pointer of the previous token) to the first token. **tpp is updated
+ * to point to the first token of the expansion, and *tpp updated to
+ * point to the next pointer of the last token of the expansion.
+ *
+ * If the expansion is empty, *tpp will be unchanged but **tpp will
+ * be advanced past the macro call.
+ *
+ * Return the macro expanded, or NULL if no expansion took place.
+ */
+static SMacro *expand_one_smacro(Token ***tpp)
+{
+    Token **params = NULL;
+    const char *mname;
+    Token *mstart = **tpp;
+    Token *tline  = mstart;
+    SMacro *head, *m;
+    Token *tafter, **tep;
+    int nparam = 0;
+
+    if (!tline)
+        return false;           /* Empty line, nothing to do */
+
+    mname = tok_text(mstart);
+
+    smacro_deadman.total--;
+    smacro_deadman.levels--;
+
+    if (unlikely(smacro_deadman.total < 0 || smacro_deadman.levels < 0)) {
+        if (unlikely(!smacro_deadman.triggered)) {
+            nasm_nonfatal("interminable macro recursion");
+            smacro_deadman.triggered = true;
+        }
+        goto not_a_macro;
+    } else if (tline->type == TOKEN_ID || tline->type == TOKEN_PREPROC_ID) {
+        head = (SMacro *)hash_findix(&smacros, mname);
+    } else if (tline->type == TOKEN_LOCAL_MACRO) {
+        Context *ctx = get_ctx(mname, &mname);
+        head = ctx ? (SMacro *)hash_findix(&ctx->localmac, mname) : NULL;
+    } else {
+        goto not_a_macro;
+    }
+
+    /*
+     * We've hit an identifier of some sort. First check whether the
+     * identifier is a single-line macro at all, then think about
+     * checking for parameters if necessary.
+     */
+    list_for_each(m, head) {
+        if (unlikely(m->alias && ppconf.noaliases))
+            continue;
+        if (!mstrcmp(m->name, mname, m->casesense))
+            break;
+    }
+
+    if (!m) {
+        goto not_a_macro;
+    }
+
+    /* Parse parameters, if applicable */
+
+    params = NULL;
+    nparam = 0;
+
+    if (m->nparam == 0) {
+        /*
+         * Simple case: the macro is parameterless.
+         * Nothing to parse; the expansion code will
+         * drop the macro name token.
+         */
+    } else {
+        /*
+         * Complicated case: at least one macro with this name
+         * exists and takes parameters. We must find the
+         * parameters in the call, count them, find the SMacro
+         * that corresponds to that form of the macro call, and
+         * substitute for the parameters when we expand. What a
+         * pain.
+         */
+        tline = skip_white(tline->next);
+        nparam = count_smacro_args(tline, NULL);
+        if (!nparam)
+            goto not_a_macro;
+
+        /*
+         * Look for a macro matching in both name and parameter count.
+         * We already know any matches cannot be anywhere before the
+         * current position of "m", so there is no reason to
+         * backtrack.
+         */
+        while (1) {
+            if (!m) {
+                /*!
+                 *!pp-macro-params-single on single-line macro calls with wrong parameter count
+                 *!=macro-params-single
+                 *!  warns about \i{single-line macros} being invoked
+                 *!  with the wrong number of parameters.
+                 */
+                nasm_warn(WARN_PP_MACRO_PARAMS_SINGLE|ERR_HOLD,
+                    "single-line macro `%s' exists, "
+                    "but not taking %d parameter%s",
+                    mname, nparam, (nparam == 1) ? "" : "s");
+                goto not_a_macro;
+            }
+
+            if (!mstrcmp(m->name, mname, m->casesense)) {
+                if (nparam >= m->nparam_min &&
+                    (m->varadic || nparam <= m->nparam))
+                    break;      /* It's good */
+            }
+            m = m->next;
+        }
+    }
+
+    if (m->in_progress && !m->recursive)
+        goto not_a_macro;
+
+   if (nparam) {
+        params = parse_smacro_args(&tline, &nparam, m);
+    }
+
+    tafter = tline->next;   /* Skip past the macro call */
+    tline->next = NULL;     /* Truncate mstart list at the macro call end */
+    tline = expand_smacro_with_params(m, mstart, params, nparam, &tep);
+    if (tline) {
+        **tpp = tline;
+        *tep = tafter;
+        *tpp = tep;
+    } else {
+        **tpp = tafter;
+    }
+
+    /* Don't do this until after expansion or we will clobber mname */
+    free_tlist(mstart);
+    goto done;
+
+    /*
+     * No macro expansion needed; roll back to mstart (if necessary)
+     * and then advance to the next input token. Note that this is
+     * by far the common case!
+     */
+not_a_macro:
+    *tpp = &mstart->next;
+    m = NULL;
+done:
+    free_tlist_array(params, nparam);
+    smacro_deadman.levels++;
+    return m;
+}
+
+/*
+ * Expand all single-line macro calls made in the given line.
+ * Return the expanded version of the line. The original is deemed
+ * to be destroyed in the process. (In reality we'll just move
+ * Tokens from input to output a lot of the time, rather than
+ * actually bothering to destroy and replicate.)
+ */
+static Token *expand_smacro(Token *tline)
+{
+    smacro_deadman.total  = nasm_limitLIMIT_MACRO_TOKENS;
+    smacro_deadman.levels = nasm_limitLIMIT_MACRO_LEVELS;
+    smacro_deadman.triggered = false;
+    return expand_smacro_noreset(tline);
+}
+
+static Token *expand_smacro_noreset(Token *org_tline)
+{
+    Token *tline;
+    bool expanded;
+    errhold errhold;       /* Hold warning/errors during expansion */
+
+    if (!org_tline)
+        return NULL;            /* Empty input */
+
+    /*
+     * Trick: we should avoid changing the start token pointer since it can
+     * be contained in "next" field of other token. Because of this
+     * we allocate a copy of first token and work with it; at the end of
+     * routine we copy it back
+     */
+    tline = dup_Token(org_tline->next, org_tline);
+
+    /*
+     * Pretend that we always end up doing expansion on the first pass;
+     * that way %+ get processed. However, if we process %+ before the
+     * first pass, we end up with things like MACRO %+ TAIL trying to
+     * look up the macro "MACROTAIL", which we don't want.
+     */
+    expanded = true;
+
+    while (true) {
+        static const struct concat_mask tmatch = {
+            {
+                CONCAT_ID | CONCAT_LOCAL_MACRO |
+                CONCAT_ENVIRON | CONCAT_PREPROC_ID, /* head */
+                CONCAT_ID | CONCAT_LOCAL_MACRO |
+                CONCAT_ENVIRON | CONCAT_PREPROC_ID |
+                CONCAT_NUM      /* tail */
+            }
+        };
+        Token **tail = &tline;
+
+        /*
+         * We hold warnings/errors until we are done in this loop. It is
+         * possible for nuisance warnings to appear that disappear on later
+         * passes.
+         */
+        errhold = nasm_error_hold_push();
+
+        while (*tail)           /* main token loop */
+            expanded |= !!expand_one_smacro(&tail);
+
+         if (!expanded)
+            break;              /* Done! */
+
+        /*
+         * Now scan the entire line and look for successive TOKEN_IDs
+         * that resulted after expansion (they can't be produced by
+         * tokenize()). The successive TOKEN_IDs should be concatenated.
+         * Also we look for %+ tokens and concatenate the tokens
+         * before and after them (without white spaces in between).
+         */
+        if (!paste_tokens(&tline, tmatch, ARRAY_SIZE(tmatch), true))
+            break;              /* Done again! */
+
+        nasm_error_hold_pop(errhold, false);
+        expanded = false;
+    }
+    nasm_error_hold_pop(errhold, true);
+
+    if (!tline) {
+        /*
+         * The expression expanded to empty line;
+         * we can't return NULL because of the "trick" above.
+         * Just set the line to a single WHITESPACE token.
+	 */
+
+	tline = new_White(NULL);
+    }
+
+    steal_Token(org_tline, tline);
+    org_tline->next = tline->next;
+    delete_Token(tline);
+
+    return org_tline;
+}
+
+/*
+ * Similar to expand_smacro but used exclusively with macro identifiers
+ * right before they are fetched in. The reason is that there can be
+ * identifiers consisting of several subparts. We consider that if there
+ * are more than one element forming the name, user wants a expansion,
+ * otherwise it will be left as-is. Example:
+ *
+ *      %define %$abc cde
+ *
+ * the identifier %$abc will be left as-is so that the handler for %define
+ * will suck it and define the corresponding value. Other case:
+ *
+ *      %define _%$abc cde
+ *
+ * In this case user wants name to be expanded *before* %define starts
+ * working, so we'll expand %$abc into something (if it has a value;
+ * otherwise it will be left as-is) then concatenate all successive
+ * PP_IDs into one.
+ */
+static Token *expand_id(Token * tline)
+{
+    Token *cur, *oldnext = NULL;
+
+    if (!tline || !tline->next)
+        return tline;
+
+    cur = tline;
+    while (cur->next &&
+           (cur->next->type == TOKEN_ID ||
+            cur->next->type == TOKEN_PREPROC_ID ||
+            cur->next->type == TOKEN_LOCAL_MACRO ||
+            cur->next->type == TOKEN_NUM))
+        cur = cur->next;
+
+    /* If identifier consists of just one token, don't expand */
+    if (cur == tline)
+        return tline;
+
+    if (cur) {
+        oldnext = cur->next;    /* Detach the tail past identifier */
+        cur->next = NULL;       /* so that expand_smacro stops here */
+    }
+
+    tline = expand_smacro(tline);
+
+    if (cur) {
+        /* expand_smacro possibly changhed tline; re-scan for EOL */
+        cur = tline;
+        while (cur && cur->next)
+            cur = cur->next;
+        if (cur)
+            cur->next = oldnext;
+    }
+
+    return tline;
+}
+
+/*
+ * This is called from find_mmacro_in_list() after finding a suitable macro.
+ */
+static MMacro *use_mmacro(MMacro *m, int *nparamp, Token ***paramsp)
+{
+    int nparam = *nparamp;
+    Token **params = *paramsp;
+
+    /*
+     * This one is right. Just check if cycle removal
+     * prohibits us using it before we actually celebrate...
+     */
+    if (m->in_progress > m->max_depth) {
+        if (m->max_depth > 0) {
+            /* Document this properly when recursive mmacros re-implemented */
+            nasm_warn(WARN_OTHER, "reached maximum recursion depth of %i",
+                      m->max_depth);
+        }
+        nasm_free(params);
+        *nparamp = 0;
+        *paramsp = NULL;
+        return NULL;
+    }
+
+    /*
+     * It's right, and we can use it. Add its default
+     * parameters to the end of our list if necessary.
+     */
+    if (m->defaults && nparam < m->nparam_min + m->ndefs) {
+        int newnparam = m->nparam_min + m->ndefs;
+        params = nasm_realloc(params, sizeof(*params) * (newnparam+2));
+        memcpy(&paramsnparam+1, &m->defaultsnparam+1-m->nparam_min,
+               (newnparam - nparam) * sizeof(*params));
+        nparam = newnparam;
+    }
+    /*
+     * If we've gone over the maximum parameter count (and
+     * we're in Plus mode), ignore parameters beyond
+     * nparam_max.
+     */
+    if (m->plus && nparam > m->nparam_max)
+        nparam = m->nparam_max;
+
+    /*
+     * If nparam was adjusted above, make sure the list is still
+     * NULL-terminated.
+     */
+    paramsnparam+1 = NULL;
+
+    /* Done! */
+    *paramsp = params;
+    *nparamp = nparam;
+    return m;
+}
+
+/*
+ * Search a macro list and try to find a match. If matching, call
+ * use_mmacro() to set up the macro call. m points to the list of
+ * search, which is_mmacro() sets to the first *possible* match.
+ */
+static MMacro *
+find_mmacro_in_list(MMacro *m, const char *finding,
+                    int *nparamp, Token ***paramsp)
+{
+    int nparam = *nparamp;
+
+    while (m) {
+        if (m->nparam_min <= nparam
+            && (m->plus || nparam <= m->nparam_max)) {
+            /*
+             * This one matches, use it.
+             */
+            return use_mmacro(m, nparamp, paramsp);
+        }
+
+        /*
+         * Otherwise search for the next one with a name match.
+         */
+        list_for_each(m, m->next) {
+            if (!mstrcmp(m->name, finding, m->casesense))
+                break;
+        }
+    }
+
+    return NULL;
+}
+
+/*
+ * Determine whether the given line constitutes a multi-line macro
+ * call, and return the MMacro structure called if so. Doesn't have
+ * to check for an initial label - that's taken care of in
+ * expand_mmacro - but must check numbers of parameters. Guaranteed
+ * to be called with tline->type == TOKEN_ID, so the putative macro
+ * name is easy to find.
+ */
+static MMacro *is_mmacro(Token * tline, int *nparamp, Token ***paramsp)
+{
+    MMacro *head, *m, *found;
+    Token **params, **comma;
+    int raw_nparam, nparam;
+    const char *finding = tok_text(tline);
+    bool empty_args = !tline->next;
+
+    *nparamp = 0;
+    *paramsp = NULL;
+
+    head = (MMacro *) hash_findix(&mmacros, finding);
+
+    /*
+     * Efficiency: first we see if any macro exists with the given
+     * name which isn't already excluded by macro cycle removal.
+     * (The cycle removal test here helps optimize the case of wrapping
+     * instructions, and is cheap to do here.)
+     *
+     * If not, we can return NULL immediately. _Then_ we
+     * count the parameters, and then we look further along the
+     * list if necessary to find the proper MMacro.
+     */
+    list_for_each(m, head) {
+        if (!mstrcmp(m->name, finding, m->casesense) &&
+            (m->in_progress != 1 || m->max_depth > 0))
+            break;              /* Found something that needs consideration */
+    }
+    if (!m)
+        return NULL;
+
+    /*
+     * OK, we have a potential macro. Count and demarcate the
+     * parameters.
+     */
+    comma = count_mmac_params(tline->next, nparamp, paramsp);
+    raw_nparam = *nparamp;
+
+    /*
+     * Search for an exact match. This cannot come *before* the m
+     * found in the list search before, so we can start there.
+     *
+     * If found is NULL and *paramsp has been cleared, then we
+     * encountered an error for which we have already issued a
+     * diagnostic, so we should not proceed.
+     */
+    found = find_mmacro_in_list(m, finding, nparamp, paramsp);
+    if (!*paramsp)
+        return NULL;
+
+    nparam = *nparamp;
+    params = *paramsp;
+
+    /*
+     * Special weirdness: in NASM < 2.15, an expansion of
+     * *only* whitespace, as can happen during macro expansion under
+     * certain circumstances, is counted as zero arguments for the
+     * purpose of %0, but one argument for the purpose of macro
+     * matching! In particular, this affects:
+     *
+     * foobar %1
+     *
+     * ... with %1 being empty; this would call the one-argument
+     * version of "foobar" with an empty argument, equivalent to
+     *
+     * foobar {%1}
+     *
+     * ... except that %0 would be set to 0 inside foobar, even if
+     * foobar is declared with "%macro foobar 1" or equivalent!
+     *
+     * The proper way to do that is to define "%macro foobar 0-1".
+     *
+     * To be compatible without doing something too stupid, try to
+     * match a zero-argument macro first, but if that fails, try
+     * for a one-argument macro with the above behavior.
+     *
+     * Furthermore, NASM < 2.15 will match stripping a tailing empty
+     * argument, but in that case %0 *does* reflect that this argument
+     * have been stripped; this is handled in count_mmac_params().
+     *
+     * To disable these insane legacy behaviors, use:
+     *
+     * %pragma preproc sane_empty_expansion yes
+     *
+     *!pp-macro-params-legacy on improperly calling multi-line macro for legacy support
+     *!=macro-params-legacy
+     *!  warns about \i{multi-line macros} being invoked
+     *!  with the wrong number of parameters, but for bug-compatibility
+     *!  with NASM versions older than 2.15, NASM tried to fix up the
+     *!  parameters to match the legacy behavior and call the macro anyway.
+     *!  This can happen in certain cases where there are empty arguments
+     *!  without braces, sometimes as a result of macro expansion.
+     *!-
+     *!  The legacy behavior is quite strange and highly context-dependent,
+     *!  and can be disabled with:
+     *!-
+     *!  \c      %pragma preproc sane_empty_expansion true
+     *!-
+     *!  It is highly recommended to use this option in new code.
+     */
+    if (!ppconf.sane_empty_expansion) {
+        if (!found) {
+            if (raw_nparam == 0 && !empty_args) {
+                /*
+                 * A single all-whitespace parameter as the only thing?
+                 * Look for a one-argument macro, but don't adjust
+                 * *nparamp.
+                 */
+                int bogus_nparam = 1;
+                params2 = NULL;
+                found = find_mmacro_in_list(m, finding, &bogus_nparam, paramsp);
+            } else if (raw_nparam > 1 && comma) {
+                Token *comma_tail = *comma;
+
+                /*
+                 * Drop the terminal argument and try again.
+                 * If we fail, we need to restore the comma to
+                 * preserve tlist.
+                 */
+                *comma = NULL;
+                *nparamp = raw_nparam - 1;
+                found = find_mmacro_in_list(m, finding, nparamp, paramsp);
+                if (found)
+                    free_tlist(comma_tail);
+                else
+                    *comma = comma_tail;
+            }
+
+            if (!*paramsp)
+                return NULL;
+        } else if (comma) {
+            free_tlist(*comma);
+            *comma = NULL;
+            if (raw_nparam > found->nparam_min &&
+                raw_nparam <= found->nparam_min + found->ndefs) {
+                /* Replace empty argument with default parameter */
+                paramsraw_nparam =
+                    found->defaultsraw_nparam - found->nparam_min;
+            } else if (raw_nparam > found->nparam_max && found->plus) {
+                /* Just drop the comma, don't adjust argument count */
+            } else {
+                /* Drop argument. This may cause nparam < nparam_min. */
+                paramsraw_nparam = NULL;
+                *nparamp = nparam = raw_nparam - 1;
+            }
+        }
+
+        if (found) {
+            if (raw_nparam < found->nparam_min ||
+                (raw_nparam > found->nparam_max && !found->plus)) {
+                nasm_warn(WARN_PP_MACRO_PARAMS_LEGACY,
+                          "improperly calling multi-line macro `%s' with %d parameters",
+                          found->name, raw_nparam);
+            } else if (comma) {
+                nasm_warn(WARN_PP_MACRO_PARAMS_LEGACY,
+                          "dropping trailing empty parameter in call to multi-line macro `%s'", found->name);
+            }
+        }
+    }
+
+    /*
+     * After all that, we didn't find one with the right number of
+     * parameters. Issue a warning, and fail to expand the macro.
+     *!
+     *!pp-macro-params-multi on multi-line macro calls with wrong parameter count
+     *!=macro-params-multi
+     *!  warns about \i{multi-line macros} being invoked
+     *!  with the wrong number of parameters. See \k{mlmacover} for an
+     *!  example of why you might want to disable this warning.
+     */
+    if (found)
+        return found;
+
+    nasm_warn(WARN_PP_MACRO_PARAMS_MULTI,
+               "multi-line macro `%s' exists, but not taking %d parameter%s",
+              finding, nparam, (nparam == 1) ? "" : "s");
+    nasm_free(*paramsp);
+    return NULL;
+}
+
+
+#if 0
+
+/*
+ * Save MMacro invocation specific fields in
+ * preparation for a recursive macro expansion
+ */
+static void push_mmacro(MMacro *m)
+{
+    MMacroInvocation *i;
+
+    i = nasm_malloc(sizeof(MMacroInvocation));
+    i->prev = m->prev;
+    i->params = m->params;
+    i->iline = m->iline;
+    i->nparam = m->nparam;
+    i->rotate = m->rotate;
+    i->paramlen = m->paramlen;
+    i->unique = m->unique;
+    i->condcnt = m->condcnt;
+    m->prev = i;
+}
+
+
+/*
+ * Restore MMacro invocation specific fields that were
+ * saved during a previous recursive macro expansion
+ */
+static void pop_mmacro(MMacro *m)
+{
+    MMacroInvocation *i;
+
+    if (m->prev) {
+        i = m->prev;
+        m->prev = i->prev;
+        m->params = i->params;
+        m->iline = i->iline;
+        m->nparam = i->nparam;
+        m->rotate = i->rotate;
+        m->paramlen = i->paramlen;
+        m->unique = i->unique;
+        m->condcnt = i->condcnt;
+        nasm_free(i);
+    }
+}
+
+#endif
+
+/*
+ * List an mmacro call with arguments (-Lm option)
+ */
+static void list_mmacro_call(const MMacro *m)
+{
+    const char prefix = " ;;; macro ";
+    size_t namelen, size;
+    char *buf, *p;
+    unsigned int i;
+    const Token *t;
+
+    namelen = strlen(m->iname);
+    size = namelen + sizeof(prefix); /* Includes final null (from prefix) */
+
+    for (i = 1; i <= m->nparam; i++) {
+        int j = 0;
+        size += 3;              /* Braces and space/comma */
+        list_for_each(t, m->paramsi) {
+            if (j++ >= m->paramleni)
+                break;
+            size += (t->type == TOKEN_WHITESPACE) ? 1 : t->len;
+        }
+    }
+
+    buf = p = nasm_malloc(size);
+    p = mempcpy(p, prefix, sizeof(prefix) - 1);
+    p = mempcpy(p, m->iname, namelen);
+    *p++ = ' ';
+
+    for (i = 1; i <= m->nparam; i++) {
+        int j = 0;
+        *p++ = '{';
+        list_for_each(t, m->paramsi) {
+            if (j++ >= m->paramleni)
+                break;
+	    p = mempcpy(p, tok_text(t), t->len);
+        }
+        *p++ = '}';
+        *p++ = ',';
+    }
+
+    *--p = '\0';                /* Replace last delimiter with null */
+    lfmt->line(LIST_MACRO, -1, buf);
+    nasm_free(buf);
+}
+
+/*
+ * Collect information about macro invocations for the benefit of
+ * the debugger. During execution we create a reverse list; before
+ * calling the backend reverse it to definition/invocation order just
+ * to be nicer. XXX: not implemented yet
+ */
+struct debug_macro_inv *debug_current_macro;
+
+/* Get/create a addr structure for a seg:inv combo */
+static struct debug_macro_addr *
+debug_macro_get_addr_inv(int32_t seg, struct debug_macro_inv *inv)
+{
+    struct debug_macro_addr *addr;
+    nasm_static_assert(offsetof(struct debug_macro_addr, tree) == 0);
+
+    if (likely(seg == inv->lastseg))
+        return inv->addr.last;
+
+    inv->lastseg = seg;
+    addr = (struct debug_macro_addr *)
+        rb_search_exact(inv->addr.tree, seg);
+    if (unlikely(!addr)) {
+        nasm_new(addr);
+        addr->tree.key = seg;
+        inv->addr.tree = rb_insert(inv->addr.tree, &addr->tree);
+        inv->naddr++;
+        if (inv->up)
+            addr->up = debug_macro_get_addr_inv(seg, inv->up);
+    }
+
+    return inv->addr.last = addr;
+}
+
+/* Get/create an addr structure for a seg in debug_current_macro */
+struct debug_macro_addr *debug_macro_get_addr(int32_t seg)
+{
+    return debug_macro_get_addr_inv(seg, debug_current_macro);
+}
+
+static struct debug_macro_info dmi;
+static struct debug_macro_inv_list *current_inv_list = &dmi.inv;
+
+static void debug_macro_start(MMacro *m, struct src_location where)
+{
+    struct debug_macro_def *def = m->dbg.def;
+    struct debug_macro_inv *inv;
+
+    nasm_assert(!m->dbg.inv);
+
+    /* First invocation? Need to create a def structure */
+    if (unlikely(!def)) {
+        nasm_new(def);
+        def->name = nasm_strdup(m->name);
+        def->where = m->where;
+
+        def->next = dmi.def.l;
+        dmi.def.l = def;
+        dmi.def.n++;
+
+        m->dbg.def = def;
+    }
+
+    nasm_new(inv);
+    inv->lastseg = NO_SEG;
+    inv->where = where;
+    inv->up = debug_current_macro;
+    inv->next = current_inv_list->l;
+    inv->def = def;
+    current_inv_list->l = inv;
+    current_inv_list->n++;
+    current_inv_list = &inv->down;
+
+    def->ninv++;
+    m->dbg.inv = inv;
+    debug_current_macro = inv;
+}
+
+static void debug_macro_end(MMacro *m)
+{
+    struct debug_macro_inv *inv = m->dbg.inv;
+
+    nasm_assert(inv == debug_current_macro);
+
+    list_reverse(inv->down.l);
+
+    m->dbg.inv = NULL;
+    inv = inv->up;
+
+    m = istk->mstk.mmac;
+    if (m) {
+        nasm_assert(inv == m->dbg.inv);
+        debug_current_macro = inv;
+        current_inv_list = &inv->down;
+    } else {
+        nasm_assert(!inv);
+        debug_current_macro = NULL;
+        current_inv_list = &dmi.inv;
+    }
+}
+
+static void free_debug_macro_addr_tree(struct rbtree *tree)
+{
+    struct rbtree *left, *right;
+    nasm_static_assert(offsetof(struct debug_macro_addr,tree) == 0);
+
+    if (!tree)
+        return;
+
+    left  = rb_left(tree);
+    right = rb_right(tree);
+
+    nasm_free(tree);
+
+    free_debug_macro_addr_tree(left);
+    free_debug_macro_addr_tree(right);
+}
+
+static void free_debug_macro_inv_list(struct debug_macro_inv *inv)
+{
+    struct debug_macro_inv *itmp;
+
+    if (!inv)
+        return;
+
+    list_for_each_safe(inv, itmp, inv) {
+        free_debug_macro_inv_list(inv->down.l);
+        free_debug_macro_addr_tree(inv->addr.tree);
+        nasm_free(inv);
+    }
+}
+
+static void free_debug_macro_info(void)
+{
+    struct debug_macro_def *def, *dtmp;
+
+    list_for_each_safe(def, dtmp, dmi.def.l)
+        nasm_free(def);
+
+    free_debug_macro_inv_list(dmi.inv.l);
+
+    nasm_zero(dmi);
+}
+
+static void debug_macro_output(void)
+{
+    list_reverse(dmi.inv.l);
+    dfmt->debug_mmacros(&dmi);
+    free_debug_macro_info();
+}
+
+/*
+ * Expand the multi-line macro call made by the given line, if
+ * there is one to be expanded. If there is, push the expansion on
+ * istk->expansion and return 1. Otherwise return 0.
+ */
+static int expand_mmacro(Token * tline)
+{
+    Token *startline = tline;
+    Token *label = NULL;
+    bool dont_prepend = false;
+    Token **params, *t, *tt;
+    MMacro *m;
+    Line *l, *ll;
+    int i, *paramlen;
+    const char *mname;
+    int nparam = 0;
+
+    t = tline;
+    t = skip_white(t);
+    if (!tok_is(t, TOKEN_ID) && !tok_is(t, TOKEN_LOCAL_MACRO))
+        return 0;
+    m = is_mmacro(t, &nparam, &params);
+    if (m) {
+        mname = tok_text(t);
+    } else {
+        Token *last;
+        /*
+         * We have an id which isn't a macro call. We'll assume
+         * it might be a label; we'll also check to see if a
+         * colon follows it. Then, if there's another id after
+         * that lot, we'll check it again for macro-hood.
+         */
+        label = last = t;
+        t = t->next;
+        if (tok_white(t))
+            last = t, t = t->next;
+        if (tok_is(t, ':')) {
+            dont_prepend = true;
+            last = t, t = t->next;
+            if (tok_white(t))
+                last = t, t = t->next;
+        }
+        if (!tok_is(t, TOKEN_ID) || !(m = is_mmacro(t, &nparam, &params)))
+            return 0;
+        last->next = NULL;
+        mname = tok_text(t);
+        tline = t;
+    }
+
+    if (unlikely(mmacro_deadman.total >= nasm_limitLIMIT_MMACROS ||
+                 mmacro_deadman.levels >= nasm_limitLIMIT_MACRO_LEVELS)) {
+        if (!mmacro_deadman.triggered) {
+            nasm_nonfatal("interminable multiline macro recursion");
+            mmacro_deadman.triggered = true;
+        }
+        return 0;
+    }
+
+    mmacro_deadman.total++;
+    mmacro_deadman.levels++;
+
+    /*
+     * Fix up the parameters: this involves stripping leading and
+     * trailing whitespace and stripping braces if they are present.
+     */
+    nasm_newn(paramlen, nparam+1);
+
+    for (i = 1; (t = paramsi); i++) {
+        bool braced = false;
+        int brace = 0;
+        int white = 0;
+        bool comma = !m->plus || i < nparam;
+
+        t = skip_white(t);
+        if (tok_is(t, '{')) {
+            t = t->next;
+            brace = 1;
+            braced = true;
+            comma = false;
+        }
+
+        paramsi = t;
+        for (; t; t = t->next) {
+            if (tok_white(t)) {
+                white++;
+                continue;
+            }
+
+            switch(t->type) {
+            case ',':
+                if (comma && !brace)
+                    goto endparam;
+                break;
+
+            case '{':
+                brace++;
+                break;
+
+            case '}':
+                brace--;
+                if (braced && !brace) {
+                    paramleni += white;
+                    goto endparam;
+                }
+                break;
+
+            default:
+                break;
+            }
+
+            paramleni += white + 1;
+            white = 0;
+        }
+    endparam:
+        ;
+    }
+
+    /*
+     * OK, we have a MMacro structure together with a set of
+     * parameters. We must now go through the expansion and push
+     * copies of each Line on to istk->expansion. Substitution of
+     * parameter tokens and macro-local tokens doesn't get done
+     * until the single-line macro substitution process; this is
+     * because delaying them allows us to change the semantics
+     * later through %rotate and give the right semantics for
+     * nested mmacros.
+     *
+     * First, push an end marker on to istk->expansion, mark this
+     * macro as in progress, and set up its invocation-specific
+     * variables.
+     */
+    nasm_new(ll);
+    ll->next = istk->expansion;
+    ll->finishes = m;
+    ll->where = istk->where;
+    istk->expansion = ll;
+
+    /*
+     * Save the previous MMacro expansion in the case of
+     * macro recursion
+     */
+#if 0
+    if (m->max_depth && m->in_progress)
+        push_mmacro(m);
+#endif
+
+    m->in_progress ++;
+    m->params = params;
+    m->iline = tline;
+    m->iname = nasm_strdup(mname);
+    m->nparam = nparam;
+    m->rotate = 0;
+    m->paramlen = paramlen;
+    m->unique = unique++;
+    m->condcnt = 0;
+
+    m->mstk = istk->mstk;
+    istk->mstk.mstk = istk->mstk.mmac = m;
+
+    list_for_each(l, m->expansion) {
+        nasm_new(ll);
+        ll->next = istk->expansion;
+        istk->expansion = ll;
+        ll->first = dup_tlist(l->first, NULL);
+        ll->where = l->where;
+    }
+
+    /*
+     * If we had a label, and this macro definition does not include
+     * a %00, push it on as the first line of, ot
+     * the macro expansion.
+     */
+    if (label) {
+        /*
+         * We had a label. If this macro contains an %00 parameter,
+         * save the value as a special parameter (which is what it
+         * is), otherwise push it as the first line of the macro
+         * expansion.
+         */
+        if (m->capture_label) {
+            params0 = dup_Token(NULL, label);
+            paramlen0 = 1;
+            free_tlist(startline);
+       } else {
+            nasm_new(ll);
+            ll->finishes = NULL;
+            ll->next = istk->expansion;
+            istk->expansion = ll;
+            ll->first = startline;
+            ll->where = istk->where;
+            if (!dont_prepend) {
+                while (label->next)
+                    label = label->next;
+                label->next = tt = make_tok_char(NULL, ':');
+            }
+        }
+    }
+
+    istk->nolist += !!(m->nolist & NL_LIST);
+    istk->noline += !!(m->nolist & NL_LINE);
+
+    if (!istk->nolist) {
+        if (list_option('m'))
+            list_mmacro_call(m);
+
+        lfmt->uplevel(LIST_MACRO, 0);
+
+        if (ppdbg & PDBG_MMACROS)
+            debug_macro_start(m, src_where());
+    }
+
+    if (!istk->noline)
+        src_macro_push(m, istk->where);
+
+    return 1;
+}
+
+/*
+ * This function decides if an error message should be suppressed.
+ * It will never be called with a severity level of ERR_FATAL or
+ * higher.
+ */
+bool pp_suppress_error(errflags severity)
+{
+    /*
+     * If we're in a dead branch of IF or something like it, ignore the error.
+     * However, because %else etc are evaluated in the state context
+     * of the previous branch, errors might get lost:
+     *   %if 0 ... %else trailing garbage ... %endif
+     * So %else etc should set the ERR_PP_PRECOND flag.
+     */
+    if (istk && istk->conds &&
+	((severity & ERR_PP_PRECOND) ?
+	 istk->conds->state == COND_NEVER :
+	 !emitting(istk->conds->state)))
+        return true;
+
+    return false;
+}
+
+static Token *
+stdmac_file(const SMacro *s, Token **params, int nparams)
+{
+    const char *fname = src_get_fname();
+
+    (void)s;
+    (void)params;
+    (void)nparams;
+
+    return fname ? make_tok_qstr(NULL, fname) : NULL;
+}
+
+static Token *
+stdmac_line(const SMacro *s, Token **params, int nparams)
+{
+    (void)s;
+    (void)params;
+    (void)nparams;
+
+    return make_tok_num(NULL, src_get_linnum());
+}
+
+static Token *
+stdmac_bits(const SMacro *s, Token **params, int nparams)
+{
+    (void)s;
+    (void)params;
+    (void)nparams;
+
+    return make_tok_num(NULL, globalbits);
+}
+
+static Token *
+stdmac_ptr(const SMacro *s, Token **params, int nparams)
+{
+    (void)s;
+    (void)params;
+    (void)nparams;
+
+    switch (globalbits) {
+    case 16:
+	return new_Token(NULL, TOKEN_ID, "word", 4);
+    case 32:
+	return new_Token(NULL, TOKEN_ID, "dword", 5);
+    case 64:
+	return new_Token(NULL, TOKEN_ID, "qword", 5);
+    default:
+        panic();
+    }
+}
+
+/* %is...() function macros */
+static Token *
+stdmac_is(const SMacro *s, Token **params, int nparams)
+{
+    int retval;
+    struct Token *pline = params0;
+
+    (void)nparams;
+
+    params0 = NULL;           /* Don't free this later */
+
+    retval = if_condition(pline, s->expandpvt.u) == COND_IF_TRUE;
+    return make_tok_num(NULL, retval);
+}
+
+/*
+ * Join all expanded macro arguments with commas, e.g. %eval().
+ * Remember that this needs to output the tokens in reverse order.
+ *
+ * This can also be used when only single argument is already ready
+ * to be emitted, e.g. %str().
+ */
+static Token *
+stdmac_join(const SMacro *s, Token **params, int nparams)
+{
+    struct Token *tline = NULL;
+    int i;
+
+    (void)s;
+
+    for (i = 0; i < nparams; i++) {
+        Token *t, *ttmp;
+
+        if (i)
+            tline = make_tok_char(tline, ',');
+
+        list_for_each_safe(t, ttmp, paramsi) {
+            t->next = tline;
+            tline = t;
+        }
+
+        /* Avoid freeing the tokens we "stole" */
+        paramsi = NULL;
+    }
+
+    return tline;
+}
+
+/* %strcat() function */
+static Token *
+stdmac_strcat(const SMacro *s, Token **params, int nparams)
+{
+    int i;
+    size_t len = 0;
+    char *str, *p;
+
+    (void)s;
+
+    for (i = 0; i < nparams; i++) {
+        unquote_token(paramsi);
+        len += paramsi->len;
+    }
+
+    nasm_newn(str, len+1);
+    p = str;
+
+    for (i = 0; i < nparams; i++) {
+        p = mempcpy(p, tok_text(paramsi), paramsi->len);
+    }
+
+    return make_tok_qstr_len(NULL, str, len);
+}
+
+/* %substr() function */
+static Token *
+stdmac_substr(const SMacro *s, Token **params, int nparams)
+{
+    int64_t start, count;
+
+    (void)nparams;
+    (void)s;
+
+    start = get_tok_num(params1, NULL);
+    count = get_tok_num(params2, NULL);
+
+    return pp_substr_common(params0, start, count);
+}
+
+/* %strlen() function */
+static Token *
+stdmac_strlen(const SMacro *s, Token **params, int nparams)
+{
+    (void)nparams;
+    (void)s;
+
+    unquote_token(params0);
+    return make_tok_num(NULL, params0->len);
+}
+
+/* %tok() function */
+static Token *
+stdmac_tok(const SMacro *s, Token **params, int nparams)
+{
+    (void)nparams;
+    (void)s;
+
+    return reverse_tokens(tokenize(unquote_token_cstr(params0)));
+}
+
+/* %cond() or %sel() */
+static Token *
+stdmac_cond_sel(const SMacro *s, Token **params, int nparams)
+{
+    int64_t which;
+
+    /*
+     * params0 will have been generated by make_tok_num.
+     */
+    which = get_tok_num(params0, NULL);
+
+    if (s->expandpvt.u) {
+        /* Booleanize (for %cond): true -> 1, false -> 2 (else) */
+        which = which ? 1 : 2;
+        if (which >= nparams) {
+            /* false, and no else clause */
+            return NULL;
+        }
+    } else {
+            /*!
+             *!pp-sel-range on \c{%sel()} argument out of range
+             *!  warns that the \c{%sel()} preprocessor function was passed
+             *!  a value less than 1 or larger than the number of available
+             *!  arguments.
+             */
+        if (unlikely(which < 1)) {
+            nasm_warn(WARN_PP_SEL_RANGE,
+                      "%s(%"PRId64") is not a valid selector", s->name, which);
+            return NULL;
+        } else if (unlikely(which >= nparams)) {
+            nasm_warn(WARN_PP_SEL_RANGE,
+                      "%s(%"PRId64") exceeds the number of arguments",
+                      s->name, which);
+            return NULL;
+        }
+    }
+
+    return new_Token(NULL, tok_smac_param(which), "", 0);
+}
+
+/* %count() function */
+static Token *
+stdmac_count(const SMacro *s, Token **params, int nparams)
+{
+    (void)s;
+    (void)params;
+
+    return make_tok_num(NULL, nparams);
+}
+
+/* %num() function */
+static Token *
+stdmac_num(const SMacro *s, Token **params, int nparam)
+{
+    int64_t parm3;
+    uint64_t n;
+    int64_t dparm, bparm;
+    const int maxlen = 256;
+    char numbuf256+5;
+    char *p;
+    char decorate;
+    int i;
+
+    (void)nparam;
+
+    for (i = 0; i < (int)ARRAY_SIZE(parm); i++)
+        parmi = get_tok_num(paramsi, NULL);
+
+    n      = parm0;
+    dparm  = parm1;
+    bparm  = parm2;
+
+    decorate = 0;
+    if (bparm < 0) {
+        bparm = -bparm;
+        switch (bparm) {
+        case 2:
+            decorate = 'b';
+            break;
+        case 8:
+            decorate = 'q';
+            break;
+        case 10:
+            decorate = 'd';
+            break;
+        case 16:
+            decorate = 'x';
+            break;
+        default:
+            bparm = -bparm;     /* Error out below */
+            break;
+        }
+    }
+
+    if (bparm < 2 || bparm > NUMSTR_MAXBASE) {
+        nasm_nonfatal("invalid base %"PRId64" in %s()\n", bparm, s->name);
+        return NULL;
+    }
+
+    if (dparm < -maxlen || dparm > maxlen) {
+        nasm_nonfatal("digit count %"PRId64" specified to %s() too large",
+                      dparm, s->name);
+        dparm = -1;
+    }
+
+    /* Are we supposed to generate an empty string for zero? */
+    if (!dparm && !n)
+        decorate = 0;
+
+    p = numbuf;
+    *p++ = '\'';
+    if (decorate) {
+        *p++ = '0';
+        *p++ = decorate;
+    }
+
+    p += numstr(p, maxlen, n, dparm, bparm, false);
+    *p++ = '\'';
+    *p = '\0';
+
+    return new_Token(NULL, TOKEN_STR, numbuf, p - numbuf);
+}
+
+/* %abs() function */
+static Token *
+stdmac_abs(const SMacro *s, Token **params, int nparam)
+{
+    char numbuf24;
+    int len;
+    int64_t v;
+    uint64_t u;
+
+    (void)s;
+    (void)nparam;
+
+    v = get_tok_num(params0, NULL);
+    u = v < 0 ? -v : v;
+
+    /*
+     * Don't use make_tok_num() here, to make sure we don't emit
+     * a minus sign for the case of v = -2^63
+     */
+    len = snprintf(numbuf, sizeof numbuf, "%"PRIu64, u);
+    return new_Token(NULL, TOKEN_NUM, numbuf, len);
+}
+
+/* %map() function */
+static Token *
+stdmac_map(const SMacro *s, Token **params, int nparam)
+{
+    const char *mname, *ctxname;
+    SMacro *smac;
+    Context *ctx;
+    Token *t, *tline, *mstart;
+    int i;
+    Token *fixargs;
+    int fixparams;              /* Number of fixed parameters */
+    int mparams;                /* Number of variable parameters */
+    int tparams;                /* Total number of parameters */
+    int greedify;               /* Number of parameters that must be joined */
+    Token **fparam;             /* Fixed parameters */
+    Token **cparam;             /* Final list of macro call parameters */
+
+    t = params0;
+    mname = get_id_noskip(&t, "%map");
+    if (!mname)
+        return NULL;
+
+    mstart = t;
+
+    fixargs = NULL;
+    fixparams = 0;
+    mparams = 1;
+    t = skip_white(t->next);
+    if (tok_is(t, ':')) {
+        fixargs = t->next;
+        fixparams = count_smacro_args(fixargs, &t);
+        t = skip_white(t->next);
+
+        if (tok_is(t, ':')) {
+            struct ppscan pps;
+            struct tokenval tokval;
+            expr *evalresult;
+            Token *ep;
+
+            pps.tptr = ep = zap_white(expand_smacro_noreset(t->next));
+            t->next = NULL;
+            pps.ntokens = -1;
+            tokval.t_type = TOKEN_INVALID;
+            evalresult = evaluate(ppscan, &pps, &tokval, NULL, true, NULL);
+            free_tlist(ep);
+
+            if (!evalresult || tokval.t_type) {
+                nasm_nonfatal("invalid expression in parameter count for `%s' in function %s",
+                              mname, s->name);
+                return NULL;
+            } else if (!is_simple(evalresult)) {
+                nasm_nonfatal("non-constant expression in parameter count for `%s' in function %s",
+                              mname, s->name);
+                return NULL;
+            }
+            mparams = reloc_value(evalresult);
+            if (mparams < 1) {
+                nasm_nonfatal("invalid parameter count for `%s' in function %s",
+                              mname, s->name);
+                return NULL;
+            }
+        }
+    }
+
+    nparam--;
+    params++;
+    if (nparam % mparams) {
+        nasm_nonfatal("%s expected a multiple of %d expansion parameters, got %d\n",
+                      s->name, mparams, nparam);
+    }
+
+    tparams = fixparams + mparams;
+
+    ctx = get_ctx(mname, &ctxname);
+    if (!smacro_defined(ctx, ctxname, tparams, &smac, true, false)
+        || smac->nparam == 0 || (smac->in_progress && !smac->recursive)) {
+        nasm_nonfatal("macro `%s' taking %d parameter%s not found in function %s",
+                      mname, tparams, tparams == 1 ? "" : "s", s->name);
+        return NULL;
+    }
+
+    if (nparam < mparams)
+        return NULL;            /* Empty expansion */
+
+    fparam = NULL;
+    if (fixparams) {
+        int nfp = fixparams;
+        fparam = parse_smacro_args(&fixargs, &nfp, smac);
+        if (nfp < fixparams) {
+            fixparams = nfp;
+            tparams = fixparams + mparams;
+        }
+    }
+
+    greedify = 0;
+    if (unlikely(tparams > smac->nparam)) {
+        if (smac->paramssmac->nparam-1.flags & SPARM_GREEDY)
+            greedify = smac->nparam;
+    }
+
+    nasm_newn(cparam, tparams);
+
+    tline = NULL;
+    while (1) {
+        int xparams;
+
+        for (i = 0; i < fixparams; i++) {
+            /* expand_smacro_with_params() is allowed to clobber the
+             * parameter array, so we need to give it its own copy.
+             */
+            cparami = dup_tlist(fparami, NULL);
+        }
+
+        for (i = fixparams; i < tparams; i++) {
+            cparami = *params;
+            *params = NULL;     /* Taking over ownership */
+            params++;
+        }
+
+        if (unlikely(greedify)) {
+            /* Need to re-concatenate some number of arguments as
+               comma-separated lists... */
+            int i;
+            Token **tp = &cparamgreedify-1;
+            while (*tp)
+                tp = &(*tp)->next;
+
+            for (i = greedify; i < tparams; i++) {
+                *tp = make_tok_char(NULL, ',');
+                tp = steal_tlist(cparami, &(*tp)->next);
+                cparami = NULL;
+            }
+            xparams = greedify;
+        } else {
+            xparams = tparams;
+        }
+
+        t = expand_smacro_with_params(smac, mstart, cparam, xparams, NULL);
+        if (t) {
+            Token *rt = reverse_tokens(t);
+            t->next = tline;
+            tline = rt;
+        }
+
+        for (i = 0; i < xparams; i++)
+            free_tlist(cparami);
+
+        nparam -= mparams;
+        if (nparam < mparams)
+            break;
+
+        tline = make_tok_char(tline, ',');
+    }
+
+    nasm_free(fparam);
+    nasm_free(cparam);
+
+    return tline;
+}
+
+/* Add magic standard macros */
+struct magic_macros {
+    const char *name;
+    bool casesense;
+    int nparam;
+    enum sparmflags flags;
+    ExpandSMacro func;
+};
+
+static void pp_add_magic_stdmac(void)
+{
+    static const struct magic_macros magic_macros = {
+        { "__?FILE?__", true, 0, 0, stdmac_file },
+        { "__?LINE?__", true, 0, 0, stdmac_line },
+        { "__?BITS?__", true, 0, 0, stdmac_bits },
+        { "__?PTR?__",  true, 0, 0, stdmac_ptr },
+        { "%abs",       false, 1, SPARM_EVAL, stdmac_abs },
+        { "%count",     false, 1, SPARM_VARADIC, stdmac_count },
+        { "%eval",      false, 1, SPARM_EVAL|SPARM_VARADIC, stdmac_join },
+        { "%map",	false, 1, SPARM_VARADIC, stdmac_map },
+        { "%str",       false, 1, SPARM_GREEDY|SPARM_STR, stdmac_join },
+        { "%strcat",    false, 1, SPARM_STR|SPARM_CONDQUOTE|SPARM_VARADIC, stdmac_strcat },
+        { "%strlen",    false, 1, SPARM_STR|SPARM_CONDQUOTE, stdmac_strlen },
+        { "%tok",       false, 1, SPARM_STR|SPARM_CONDQUOTE, stdmac_tok },
+        { NULL, false, 0, 0, NULL }
+    };
+    const struct magic_macros *m;
+    SMacro tmpl;
+    enum preproc_token pt;
+    char name_bufPP_TOKLEN_MAX+1;
+
+    /*
+     * Simple standard magic macros and functions.
+     * Note that preprocessor functions are allowed to recurse.
+     */
+    nasm_zero(tmpl);
+    for (m = magic_macros; m->name; m++) {
+        tmpl.nparam = m->nparam;
+        tmpl.expand = m->func;
+        tmpl.recursive = m->nparam && m->name0 == '%';
+
+        if (m->nparam) {
+            int i;
+            enum sparmflags flags = m->flags;
+
+            nasm_newn(tmpl.params, m->nparam);
+            for (i = m->nparam-1; i >= 0; i--) {
+                tmpl.paramsi.flags = flags;
+                /* These flags for the last arg only */
+                flags &= ~(SPARM_GREEDY|SPARM_VARADIC|SPARM_OPTIONAL);
+            }
+        }
+        define_smacro(m->name, m->casesense, NULL, &tmpl);
+        if (m->name0 == '%') {
+            enum preproc_token op = pp_token_hash(m->name);
+            if (op != PP_invalid)
+                pp_op_may_be_functionop = true;
+        }
+    }
+
+    /* %hex() function */
+    nasm_zero(tmpl);
+    tmpl.nparam    = 1;
+    tmpl.recursive = true;
+    tmpl.expand    =  stdmac_join;
+    nasm_newn(tmpl.params, tmpl.nparam);
+    tmpl.params0.flags = SPARM_EVAL|SPARM_UNSIGNED|SPARM_VARADIC;
+    tmpl.params0.radix = 'x';
+    define_smacro("%hex", false, NULL, &tmpl);
+
+    /* %sel() function */
+    nasm_zero(tmpl);
+    tmpl.nparam    = 2;
+    tmpl.recursive = true;
+    tmpl.expand    = stdmac_cond_sel;
+    nasm_newn(tmpl.params, tmpl.nparam);
+    tmpl.params0.flags = SPARM_EVAL;
+    tmpl.params1.flags = SPARM_VARADIC;
+    define_smacro("%sel", false, NULL, &tmpl);
+
+    /* %cond() function, a variation on %sel */
+    tmpl.nparam = 3;
+    tmpl.expandpvt.u = 1;         /* Booleanize */
+    nasm_newn(tmpl.params, tmpl.nparam);
+    tmpl.params0.flags = SPARM_EVAL;
+    tmpl.params1.flags = 0;
+    tmpl.params2.flags = SPARM_OPTIONAL;
+    define_smacro("%cond", false, NULL, &tmpl);
+
+    /* %num() function */
+    nasm_zero(tmpl);
+    tmpl.nparam = 3;
+    tmpl.expand = stdmac_num;
+    tmpl.recursive = true;
+    nasm_newn(tmpl.params, tmpl.nparam);
+    tmpl.params0.flags = SPARM_EVAL;
+    tmpl.params1.flags = SPARM_EVAL|SPARM_OPTIONAL;
+    tmpl.params1.def   = make_tok_num(NULL, -1);
+    tmpl.params2.flags = SPARM_EVAL|SPARM_OPTIONAL;
+    tmpl.params2.def   = make_tok_num(NULL, 10);
+    define_smacro("%num", false, NULL, &tmpl);
+
+    /* %substr() function */
+    nasm_zero(tmpl);
+    tmpl.nparam = 3;
+    tmpl.expand = stdmac_substr;
+    tmpl.recursive = true;
+    nasm_newn(tmpl.params, tmpl.nparam);
+    tmpl.params0.flags  = SPARM_STR|SPARM_CONDQUOTE;
+    tmpl.params1.flags  = SPARM_EVAL;
+    tmpl.params2.flags  = SPARM_EVAL|SPARM_OPTIONAL;
+    tmpl.params2.def    = make_tok_num(NULL, -1);
+    define_smacro("%substr", false, NULL, &tmpl);
+
+    /* %is...() macro functions */
+    nasm_zero(tmpl);
+    tmpl.nparam  = 1;
+    tmpl.expand  = stdmac_is;
+    tmpl.recursive = true;
+    name_buf0  = '%';
+    name_buf1  = 'i';
+    name_buf2  = 's';
+    for (pt = PP_IF; pt < (PP_IFN+(PP_IFN-PP_IF)); pt++) {
+        if (!pp_directivespt)
+            continue;
+
+        nasm_new(tmpl.params);
+        tmpl.params0.flags = SPARM_GREEDY;
+
+        strcpy(name_buf+3, pp_directivespt+3);
+        tmpl.expandpvt.u = pt;
+        define_smacro(name_buf, false, NULL, &tmpl);
+    }
+}
+
+static void pp_reset_stdmac(enum preproc_mode mode)
+{
+    int apass;
+    struct Include *inc;
+
+    /*
+     * Set up the stdmac packages as a virtual include file,
+     * indicated by a null file pointer.
+     */
+    nasm_new(inc);
+    inc->next = istk;
+    inc->nolist = inc->noline = !list_option('b');
+    inc->where = istk->where;
+    istk = inc;
+    if (!istk->nolist) {
+        lfmt->uplevel(LIST_INCLUDE, 0);
+    }
+    if (!istk->noline) {
+        src_set(0, NULL);
+        istk->where = src_where();
+        if (ppdbg & PDBG_INCLUDE)
+            dfmt->debug_include(true, istk->next->where, istk->where);
+    }
+
+    pp_add_magic_stdmac();
+
+    if (tasm_compatible_mode)
+        pp_add_stdmac(nasm_stdmac_tasm);
+
+    pp_add_stdmac(nasm_stdmac_nasm);
+    pp_add_stdmac(nasm_stdmac_version);
+
+    if (extrastdmac)
+        pp_add_stdmac(extrastdmac);
+
+    stdmacpos  = stdmacros0;
+    stdmacnext = &stdmacros1;
+
+    do_predef = true;
+
+    /*
+     * Define the __?PASS?__ macro.  This is defined here unlike all the
+     * other builtins, because it is special -- it varies between
+     * passes -- but there is really no particular reason to make it
+     * magic.
+     *
+     * 0 = dependencies only
+     * 1 = preparatory passes
+     * 2 = final pass
+     * 3 = preprocess only
+     */
+    switch (mode) {
+    case PP_NORMAL:
+        apass = pass_final() ? 2 : 1;
+        break;
+    case PP_DEPS:
+        apass = 0;
+        break;
+    case PP_PREPROC:
+        apass = 3;
+        break;
+    default:
+        panic();
+    }
+
+    define_smacro("__?PASS?__", true, make_tok_num(NULL, apass), NULL);
+}
+
+void pp_reset(const char *file, enum preproc_mode mode,
+              struct strlist *dep_list)
+{
+    cstk = NULL;
+    defining = NULL;
+    nested_mac_count = 0;
+    nested_rep_count = 0;
+    init_macros();
+    unique = 0;
+    deplist = dep_list;
+    pp_mode = mode;
+
+    /* Reset options to default */
+    nasm_zero(ppconf);
+
+    /* Disable all debugging info, except in the last pass */
+    ppdbg = 0;
+    if (!(ppopt & PP_TRIVIAL)) {
+        if (pass_final()) {
+            if (dfmt->debug_mmacros)
+                ppdbg |= PDBG_MMACROS;
+            if (dfmt->debug_smacros)
+                ppdbg |= PDBG_SMACROS;
+            if (dfmt->debug_include)
+                ppdbg |= PDBG_INCLUDE;
+        }
+
+        if (list_option('s'))
+            ppdbg |= PDBG_LIST_SMACROS;
+    }
+
+    memset(use_loaded, 0, use_package_count * sizeof(bool));
+
+    /* First set up the top level input file */
+    nasm_new(istk);
+    istk->fp = nasm_open_read(file, NF_TEXT);
+    if (!istk->fp) {
+	nasm_fatalf(ERR_NOFILE, "unable to open input file `%s'%s%s",
+                    file, errno ? " " : "", errno ? strerror(errno) : "");
+    }
+    src_set(0, file);
+    istk->where = src_where();
+    istk->lineinc = 1;
+
+    if (ppdbg & PDBG_INCLUDE) {
+        /* Let the debug format know the main file */
+        dfmt->debug_include(true, src_nowhere(), istk->where);
+    }
+
+    strlist_add(deplist, file);
+
+    do_predef = false;
+
+    if (!(ppopt & PP_TRIVIAL))
+        pp_reset_stdmac(mode);
+}
+
+void pp_init(enum preproc_opt opt)
+{
+    ppopt = opt;
+    nasm_newn(use_loaded, use_package_count);
+}
+
+/*
+ * Get a line of tokens. If we popped the macro expansion/include stack,
+ * we return a pointer to the dummy token tok_pop; at that point if
+ * istk is NULL then we have reached end of input;
+ */
+static Token tok_pop;           /* Dummy token placeholder */
+
+static Token *pp_tokline(void)
+{
+    while (true) {
+        Line *l = istk->expansion;
+        Token *tline = NULL;
+        Token *dtline;
+
+        /*
+         * Fetch a tokenized line, either from the macro-expansion
+         * buffer or from the input file.
+         */
+        tline = NULL;
+        while (l && l->finishes) {
+            MMacro *fm = l->finishes;
+
+            nasm_assert(fm == istk->mstk.mstk);
+
+            if (!fm->name && fm->in_progress > 1) {
+                /*
+                 * This is a macro-end marker for a macro with no
+                 * name, which means it's not really a macro at all
+                 * but a %rep block, and the `in_progress' field is
+                 * more than 1, meaning that we still need to
+                 * repeat. (1 means the natural last repetition; 0
+                 * means termination by %exitrep.) We have
+                 * therefore expanded up to the %endrep, and must
+                 * push the whole block on to the expansion buffer
+                 * again. We don't bother to remove the macro-end
+                 * marker: we'd only have to generate another one
+                 * if we did.
+                 */
+                fm->in_progress--;
+                list_for_each(l, fm->expansion) {
+                    Line *ll;
+
+                    nasm_new(ll);
+                    ll->next  = istk->expansion;
+                    ll->first = dup_tlist(l->first, NULL);
+                    ll->where = l->where;
+                    istk->expansion = ll;
+                }
+                l = istk->expansion;
+                continue;
+            } else {
+                MMacro *m = istk->mstk.mstk;
+
+                /*
+                 * Check whether a `%rep' was started and not ended
+                 * within this macro expansion. This can happen and
+                 * should be detected. It's a fatal error because
+                 * I'm too confused to work out how to recover
+                 * sensibly from it.
+                 */
+                if (defining) {
+                    if (defining->name)
+                        nasm_panic("defining with name in expansion");
+                    else if (m->name)
+                        nasm_fatal("`%%rep' without `%%endrep' within"
+				   " expansion of macro `%s'", m->name);
+                }
+
+                /*
+                 * FIXME:  investigate the relationship at this point between
+                 * istk->mstk.mstk and fm
+                 */
+                istk->mstk = m->mstk;
+                if (m->name) {
+                    /*
+                     * This was a real macro call, not a %rep, and
+                     * therefore the parameter information needs to
+                     * be freed and the iteration count/nesting
+                     * depth adjusted.
+                     */
+
+                    if (!--mmacro_deadman.levels) {
+                        /*
+                         * If all mmacro processing done,
+                         * clear all counters and the deadman
+                         * message trigger.
+                         */
+                        nasm_zero(mmacro_deadman); /* Clear all counters */
+                    }
+
+#if 0
+                    if (m->prev) {
+                        pop_mmacro(m);
+                        fm->in_progress --;
+                    } else
+#endif
+                    {
+                        nasm_free(m->params);
+                        nasm_free(m->iname);
+                        free_tlist(m->iline);
+                        nasm_free(m->paramlen);
+                        fm->in_progress = 0;
+			m->params = NULL;
+                        m->iname = NULL;
+			m->iline = NULL;
+			m->paramlen = NULL;
+                    }
+                }
+
+                if (fm->nolist & NL_LINE) {
+                    istk->noline--;
+                } else if (!istk->noline) {
+                    if (fm == src_macro_current())
+                        src_macro_pop();
+                    src_update(l->where);
+                }
+
+                if (fm->nolist & NL_LIST) {
+                    istk->nolist--;
+                } else if (!istk->nolist) {
+                    lfmt->downlevel(LIST_MACRO);
+                    if ((ppdbg & PDBG_MMACROS) && fm->name)
+                        debug_macro_end(fm);
+                }
+
+                istk->where = l->where;
+
+                if (!m->name)
+                    free_mmacro(m);
+            }
+            istk->expansion = l->next;
+            nasm_free(l);
+
+            return &tok_pop;
+        }
+
+        do {                    /* until we get a line we can use */
+            char *line;
+
+            if (istk->expansion) {      /* from a macro expansion */
+                Line *l = istk->expansion;
+
+                istk->expansion = l->next;
+                istk->where = l->where;
+                tline = l->first;
+                nasm_free(l);
+
+                if (!istk->noline)
+                    src_update(istk->where);
+
+                if (!istk->nolist) {
+                    line = detoken(tline, false);
+                    lfmt->line(LIST_MACRO, istk->where.lineno, line);
+                    nasm_free(line);
+                }
+            } else if ((line = read_line())) {
+                tline = tokenize(line);
+                nasm_free(line);
+            } else {
+                /*
+                 * The current file has ended; work down the istk
+                 */
+                Include *i = istk;
+
+                if (i->fp)
+                    fclose(i->fp);
+                if (i->conds) {
+                    /* nasm_fatal can't be conditionally suppressed */
+                    nasm_fatal("expected `%%endif' before end of file");
+                }
+
+                istk = i->next;
+
+                if (!i->nolist)
+                    lfmt->downlevel(LIST_INCLUDE);
+                if (!i->noline) {
+                    struct src_location whereto
+                        = istk ? istk->where : src_nowhere();
+                    if (ppdbg & PDBG_INCLUDE)
+                        dfmt->debug_include(false, whereto, i->where);
+                    if (istk)
+                        src_update(istk->where);
+                }
+
+                nasm_free(i);
+                return &tok_pop;
+            }
+        } while (0);
+
+        /*
+         * We must expand MMacro parameters and MMacro-local labels
+         * _before_ we plunge into directive processing, to cope
+         * with things like `%define something %1' such as STRUC
+         * uses. Unless we're _defining_ a MMacro, in which case
+         * those tokens should be left alone to go into the
+         * definition; and unless we're in a non-emitting
+         * condition, in which case we don't want to meddle with
+         * anything.
+         */
+        if (!defining &&
+            !(istk->conds && !emitting(istk->conds->state)) &&
+            !(istk->mstk.mmac && !istk->mstk.mmac->in_progress)) {
+            tline = expand_mmac_params(tline);
+        }
+
+        /*
+         * Check the line to see if it's a preprocessor directive.
+         */
+        if (do_directive(tline, &dtline) == DIRECTIVE_FOUND) {
+            if (dtline)
+                return dtline;
+        } else if (defining) {
+            /*
+             * We're defining a multi-line macro. We emit nothing
+             * at all, and just
+             * shove the tokenized line on to the macro definition.
+             */
+            MMacro *mmac = defining->dstk.mmac;
+            Line *l;
+
+            nasm_new(l);
+            l->next = defining->expansion;
+            l->first = tline;
+            l->finishes = NULL;
+            l->where = istk->where;
+            defining->expansion = l;
+
+            /*
+             * Remember if this mmacro expansion contains %00:
+             * if it does, we will have to handle leading labels
+             * specially.
+             */
+            if (mmac) {
+                const Token *t;
+                list_for_each(t, tline) {
+                    if (t->type == TOKEN_MMACRO_PARAM &&
+                        !memcmp(t->text.a, "%00", 4))
+                        mmac->capture_label = true;
+                }
+            }
+        } else if (istk->conds && !emitting(istk->conds->state)) {
+            /*
+             * We're in a non-emitting branch of a condition block.
+             * Emit nothing at all, not even a blank line: when we
+             * emerge from the condition we'll give a line-number
+             * directive so we keep our place correctly.
+             */
+            free_tlist(tline);
+        } else if (istk->mstk.mstk && !istk->mstk.mstk->in_progress) {
+            /*
+             * We're in a %rep block which has been terminated, so
+             * we're walking through to the %endrep without
+             * emitting anything. Emit nothing at all, not even a
+             * blank line: when we emerge from the %rep block we'll
+             * give a line-number directive so we keep our place
+             * correctly.
+             */
+            free_tlist(tline);
+        } else {
+            tline = expand_smacro(tline);
+            if (!expand_mmacro(tline))
+                return tline;
+        }
+    }
+}
+
+char *pp_getline(void)
+{
+    char *line = NULL;
+    Token *tline;
+
+    while (true) {
+        tline = pp_tokline();
+        if (tline == &tok_pop) {
+            /*
+             * We popped the macro/include stack. If istk is empty,
+             * we are at end of input, otherwise just loop back.
+             */
+            if (!istk)
+                break;
+        } else {
+            /*
+             * De-tokenize the line and emit it.
+             */
+            line = detoken(tline, true);
+            free_tlist(tline);
+            break;
+        }
+    }
+
+    if (list_option('e') && istk && !istk->nolist && line && line0) {
+        char *buf = nasm_strcat(" ;;; ", line);
+        lfmt->line(LIST_MACRO, -1, buf);
+        nasm_free(buf);
+    }
+
+    return line;
+}
+
+void pp_cleanup_pass(void)
+{
+    if (defining) {
+        if (defining->name) {
+            nasm_nonfatal("end of file while still defining macro `%s'",
+                          defining->name);
+        } else {
+            nasm_nonfatal("end of file while still in %%rep");
+        }
+
+        free_mmacro(defining);
+        defining = NULL;
+    }
+
+    while (cstk)
+        ctx_pop();
+    free_macros();
+    while (istk) {
+        Include *i = istk;
+        istk = istk->next;
+        fclose(i->fp);
+        if (!istk && (ppdbg & PDBG_INCLUDE)) {
+            /* Signal closing the top-level input file */
+            dfmt->debug_include(false, src_nowhere(), i->where);
+        }
+        nasm_free(i);
+    }
+    while (cstk)
+        ctx_pop();
+    src_set_fname(NULL);
+
+    if (ppdbg & PDBG_MMACROS)
+        debug_macro_output();
+}
+
+void pp_cleanup_session(void)
+{
+    nasm_free(use_loaded);
+    free_llist(predef);
+    predef = NULL;
+    delete_Blocks();
+    ipath_list = NULL;
+}
+
+void pp_include_path(struct strlist *list)
+{
+    ipath_list = list;
+}
+
+void pp_pre_include(char *fname)
+{
+    Token *inc, *space, *name;
+    Line *l;
+
+    name = new_Token(NULL, TOKEN_INTERNAL_STR, fname, 0);
+    space = new_White(name);
+    inc = new_Token(space, TOKEN_PREPROC_ID, "%include", 0);
+
+    l = nasm_malloc(sizeof(Line));
+    l->next = predef;
+    l->first = inc;
+    l->finishes = NULL;
+    predef = l;
+}
+
+void pp_pre_define(char *definition)
+{
+    Token *def, *space;
+    Line *l;
+    char *equals;
+
+    equals = strchr(definition, '=');
+    space = new_White(NULL);
+    def = new_Token(space, TOKEN_PREPROC_ID, "%define", 0);
+    if (equals)
+        *equals = ' ';
+    space->next = tokenize(definition);
+    if (equals)
+        *equals = '=';
+
+    nasm_new(l);
+    l->next = predef;
+    l->first = def;
+    l->finishes = NULL;
+    predef = l;
+}
+
+void pp_pre_undefine(char *definition)
+{
+    Token *def, *space;
+    Line *l;
+
+    space = new_White(NULL);
+    def = new_Token(space, TOKEN_PREPROC_ID, "%undef", 0);
+    space->next = tokenize(definition);
+
+    nasm_new(l);
+    l->next = predef;
+    l->first = def;
+    l->finishes = NULL;
+    predef = l;
+}
+
+/* Insert an early preprocessor command that doesn't need special handling */
+void pp_pre_command(const char *what, char *string)
+{
+    Token *def, *space;
+    Line *l;
+
+    def = tokenize(string);
+    if (what) {
+        space = new_White(def);
+        def = new_Token(space, TOKEN_PREPROC_ID, what, 0);
+    }
+
+    nasm_new(l);
+    l->next = predef;
+    l->first = def;
+    l->finishes = NULL;
+    predef = l;
+}
+
+static void pp_add_stdmac(macros_t *macros)
+{
+    macros_t **mp;
+
+    /* Find the end of the list and avoid duplicates */
+    for (mp = stdmacros; *mp; mp++) {
+        if (*mp == macros)
+            return;             /* Nothing to do */
+    }
+
+    nasm_assert(mp < &stdmacrosARRAY_SIZE(stdmacros)-1);
+
+    *mp = macros;
+}
+
+void pp_extra_stdmac(macros_t *macros)
+{
+        extrastdmac = macros;
+}
+
+/* Create a numeric token, with possible - token in front */
+static Token *make_tok_num(Token *next, int64_t val)
+{
+    char numbuf32;
+    int len;
+    uint64_t uval;
+    bool minus = val < 0;
+
+    uval = minus ? -val : val;
+
+    len = snprintf(numbuf, sizeof numbuf, "%"PRIu64, uval);
+    next = new_Token(next, TOKEN_NUM, numbuf, len);
+
+    if (minus)
+        next = make_tok_char(next, '-');
+
+    return next;
+}
+
+/*
+ * Create a numeric token with specified radix and signedness;
+ * prefix the number with 0<radix> if a radix letter is specified,
+ * otherwise generate a decimal constant without prefix.
+ */
+static Token *
+make_tok_num_radix(Token *next, int64_t val, char radix, bool uns)
+{
+    char numbuf2+64+1; /* Maximum possible: 0b + binary + null */
+    char *p;
+    uint64_t uval;
+    bool minus = val < 0 && !uns;
+    unsigned int base;
+    bool upper;
+
+    uval = minus ? -val : val;
+
+    p = numbuf;
+    base = 10;
+    upper = false;
+    if (radix) {
+        *p++ = '0';
+        *p++ = radix;
+
+        base = radix_letter(radix);
+        upper = !(radix & 0x20);
+    }
+
+    p += numstr(p, 64, uval, -1, base, upper);
+    next = new_Token(next, TOKEN_NUM, numbuf, p - numbuf);
+
+    if (minus)
+        next = make_tok_char(next, '-');
+
+    return next;
+}
+
+/*
+ * Do the inverse of make_tok_num(). This only needs to be able
+ * to parse the output of make_tok_num() or make_tok_hex().
+ */
+static int64_t get_tok_num(const Token *t, bool *err)
+{
+    bool minus = false;
+    int64_t v;
+
+    if (tok_is(t, '-')) {
+        minus = true;
+        t = t->next;
+    }
+    if (!tok_is(t, TOKEN_NUM)) {
+        if (err)
+            *err = true;
+        return 0;
+    }
+
+    v = readnum(tok_text(t), err);
+    return minus ? -v : v;
+}
+
+/* Create a quoted string token */
+static Token *make_tok_qstr_len(Token *next, const char *str, size_t len)
+{
+    char *p = nasm_quote(str, &len);
+    return new_Token_free(next, TOKEN_STR, p, len);
+}
+static Token *make_tok_qstr(Token *next, const char *str)
+{
+    return make_tok_qstr_len(next, str, strlen(str));
+}
+
+/* Create a single-character operator token */
+static Token *make_tok_char(Token *next, char op)
+{
+    Token *t = new_Token(next, op, NULL, 1);
+    t->text.a0 = op;
+    return t;
+}
+
+/*
+ * Descent the macro hierarchy and display the expansion after
+ * encountering an error message.
+ */
+void pp_error_list_macros(errflags severity)
+{
+    const MMacro *m;
+
+    severity |= ERR_PP_LISTMACRO | ERR_NO_SEVERITY | ERR_HERE;
+
+    while ((m = src_error_down())) {
+        if ((m->nolist & NL_LIST) || !m->where.filename)
+            break;
+	nasm_error(severity, "... from macro `%s' defined", m->name);
+    }
+
+    src_error_reset();
+}

_service:tar_scm:nasm-2.16.03.tar.xz/asm/preproc.h Added

@@ -0,0 +1,56 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2020 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/* 
+ * preproc.h  header file for preproc.c
+ */
+
+#ifndef NASM_PREPROC_H
+#define NASM_PREPROC_H
+
+#include "nasmlib.h"
+#include "pptok.h"
+
+extern const char * const pp_directives;
+extern const uint8_t pp_directives_len;
+
+/* Pointer to a macro chain */
+typedef const unsigned char macros_t;
+
+enum preproc_token pp_token_hash(const char *token);
+enum preproc_token pp_tasm_token_hash(const char *token);
+
+/* Opens an include file or input file. This uses the include path. */
+FILE *pp_input_fopen(const char *filename, enum file_flags mode);
+
+#endif

_service:tar_scm:nasm-2.16.03.tar.xz/asm/quote.c Added

@@ -0,0 +1,563 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2020 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * quote.c
+ */
+
+#include "compiler.h"
+#include "nasmlib.h"
+#include "quote.h"
+#include "nctype.h"
+#include "error.h"
+
+/*
+ * Create a NASM quoted string in newly allocated memory. Update the
+ * *lenp parameter with the output length (sans final NUL).
+ */
+
+char *nasm_quote(const char *str, size_t *lenp)
+{
+    const char *p, *ep;
+    char c, c1, *q, *nstr;
+    unsigned char uc;
+    bool sq_ok, dq_ok;
+    size_t qlen;
+    size_t len = *lenp;
+
+    sq_ok = dq_ok = true;
+    ep = str+len;
+    qlen = 0;			/* Length if we need `...` quotes */
+    for (p = str; p < ep; p++) {
+	c = *p;
+	switch (c) {
+	case '\'':
+	    sq_ok = false;
+	    qlen++;
+	    break;
+	case '\"':
+	    dq_ok = false;
+	    qlen++;
+	    break;
+	case '`':
+	case '\\':
+	    qlen += 2;
+	    break;
+	default:
+	    if (c < ' ' || c > '~') {
+		sq_ok = dq_ok = false;
+		switch (c) {
+		case '\a':
+		case '\b':
+		case '\t':
+		case '\n':
+		case '\v':
+		case '\f':
+		case '\r':
+		case 27:
+		    qlen += 2;
+		    break;
+		default:
+		    c1 = (p+1 < ep) ? p1 : 0;
+		    if (c1 >= '0' && c1 <= '7')
+			uc = 0377; /* Must use the full form */
+		    else
+			uc = c;
+		    if (uc > 077)
+			qlen++;
+		    if (uc > 07)
+			qlen++;
+		    qlen += 2;
+		    break;
+		}
+	    } else {
+		qlen++;
+	    }
+	    break;
+	}
+    }
+
+    if (sq_ok || dq_ok) {
+	/* Use '...' or "..." */
+	nstr = nasm_malloc(len+3);
+	nstr0 = nstrlen+1 = sq_ok ? '\'' : '\"';
+        q = &nstrlen+2;
+	if (len > 0)
+	    memcpy(nstr+1, str, len);
+    } else {
+	/* Need to use `...` quoted syntax */
+	nstr = nasm_malloc(qlen+3);
+	q = nstr;
+	*q++ = '`';
+	for (p = str; p < ep; p++) {
+	    c = *p;
+	    switch (c) {
+	    case '`':
+	    case '\\':
+		*q++ = '\\';
+		*q++ = c;
+		break;
+	    case 7:
+		*q++ = '\\';
+		*q++ = 'a';
+		break;
+	    case 8:
+		*q++ = '\\';
+		*q++ = 'b';
+		break;
+	    case 9:
+		*q++ = '\\';
+		*q++ = 't';
+		break;
+	    case 10:
+		*q++ = '\\';
+		*q++ = 'n';
+		break;
+	    case 11:
+		*q++ = '\\';
+		*q++ = 'v';
+		break;
+	    case 12:
+		*q++ = '\\';
+		*q++ = 'f';
+		break;
+	    case 13:
+		*q++ = '\\';
+		*q++ = 'r';
+		break;
+	    case 27:
+		*q++ = '\\';
+		*q++ = 'e';
+		break;
+	    default:
+		if (c < ' ' || c > '~') {
+		    c1 = (p+1 < ep) ? p1 : 0;
+		    if (c1 >= '0' && c1 <= '7')
+			uc = 0377; /* Must use the full form */
+		    else
+			uc = c;
+		    *q++ = '\\';
+		    if (uc > 077)
+			*q++ = ((unsigned char)c >> 6) + '0';
+		    if (uc > 07)
+			*q++ = (((unsigned char)c >> 3) & 7) + '0';
+		    *q++ = ((unsigned char)c & 7) + '0';
+		    break;
+		} else {
+		    *q++ = c;
+		}
+		break;
+	    }
+	}
+	*q++ = '`';
+	nasm_assert((size_t)(q-nstr) == qlen+2);
+    }
+    *q = '\0';
+    *lenp = q - nstr;
+    return nstr;
+}
+
+static unsigned char *emit_utf8(unsigned char *q, uint32_t v)
+{
+    uint32_t vb1, vb2, vb3, vb4, vb5;
+
+    if (v <= 0x7f) {
+	*q++ = v;
+        goto out0;
+    }
+
+    vb1 = v >> 6;
+    if (vb1 <= 0x1f) {
+	*q++ = 0xc0 + vb1;
+        goto out1;
+    }
+
+    vb2 = vb1 >> 6;
+    if (vb2 <= 0x0f) {
+        *q++ = 0xe0 + vb2;
+        goto out2;
+    }
+
+    vb3 = vb2 >> 6;
+    if (vb3 <= 0x07) {
+        *q++ = 0xf0 + vb3;
+        goto out3;
+    }
+
+    vb4 = vb3 >> 6;
+    if (vb4 <= 0x03) {
+        *q++ = 0xf8 + vb4;
+        goto out4;
+    }
+
+    /*
+     * Note: this is invalid even for "classic" (pre-UTF16) 31-bit
+     * UTF-8 if the value is >= 0x8000000. This at least tries to do
+     * something vaguely sensible with it. Caveat programmer.
+     * The __utf*__ string transform functions do reject these
+     * as invalid input.
+     *
+     * vb5 cannot be more than 3, as a 32-bit value has been shifted
+     * right by 5*6 = 30 bits already.
+     */
+    vb5 = vb4 >> 6;
+    *q++ = 0xfc + vb5;
+    goto out5;
+
+    /* Emit extension bytes as appropriate */
+out5: *q++ = 0x80 + (vb4 & 63);
+out4: *q++ = 0x80 + (vb3 & 63);
+out3: *q++ = 0x80 + (vb2 & 63);
+out2: *q++ = 0x80 + (vb1 & 63);
+out1: *q++ = 0x80 + (v & 63);
+out0: return q;
+}
+
+static inline uint32_t ctlbit(uint32_t v)
+{
+    return unlikely(v < 32) ? UINT32_C(1) << v : 0;
+}
+
+#define CTL_ERR(c)						\
+    (badctl & (ctlmask |= ctlbit(c)))
+
+#define EMIT_UTF8(c)						\
+    do {							\
+        uint32_t ec = (c);                                      \
+        if (!CTL_ERR(ec))                                       \
+            q = emit_utf8(q, ec);                               \
+    } while (0)
+
+#define EMIT(c)                                                 \
+    do {                                                        \
+        unsigned char ec = (c);                                 \
+        if (!CTL_ERR(ec))                                       \
+            *q++ = ec;                                          \
+    } while (0)
+
+/*
+ * Same as nasm_quote, but take the length of a C string;
+ * the lenp argument is optional.
+ */
+char *nasm_quote_cstr(const char *str, size_t *lenp)
+{
+    size_t len = strlen(str);
+    char *qstr = nasm_quote(str, &len);
+    if (lenp)
+        *lenp = len;
+    return qstr;
+}
+
+/*
+ * Do an *in-place* dequoting of the specified string, returning the
+ * resulting length (which may be containing embedded nulls.)
+ *
+ * In-place replacement is possible since the unquoted length is always
+ * shorter than or equal to the quoted length.
+ *
+ * *ep points to the final quote, or to the null if improperly quoted.
+ *
+ * Issue an error if the string contains control characters
+ * corresponding to bits set in badctl; in that case, the output
+ * string, but not *ep, is truncated before the first invalid
+ * character.
+ *
+ * badctl is a bitmask of control characters (0-31) which are forbidden
+ * from appearing in the final output.
+ *
+ * The qstart character can be either '`' (NASM style) or '\"' (C style),
+ * to indicate the lead marker of a quoted string. If it is '\"', then
+ * '`' is not a special character at all.
+ */
+
+size_t nasm_unquote_anystr(char *str, char **ep, const uint32_t badctl,
+                           const char qstart)
+{
+    unsigned char bq;
+    const unsigned char *p;
+    const unsigned char *escp = NULL;
+    unsigned char *q;
+    unsigned char c;
+    uint32_t ctlmask = 0;       /* Mask of control characters seen */
+    enum unq_state {
+	st_start,
+	st_backslash,
+	st_hex,
+	st_oct,
+	st_ucs,
+        st_done
+    } state;
+    int ndig = 0;
+    uint32_t nval = 0;
+
+    p = q = (unsigned char *)str;
+
+    bq = *p++;
+    if (!bq)
+	return 0;
+
+    if (bq == (unsigned char)qstart) {
+	/* `...` string */
+	state = st_start;
+
+	while (state != st_done) {
+	    c = *p++;
+	    switch (state) {
+	    case st_start:
+                if (c == '\\') {
+		    state = st_backslash;
+                } else if ((c == '\0') | (c == bq)) {
+                    state = st_done;
+                } else {
+                    EMIT(c);
+                }
+		break;
+
+	    case st_backslash:
+		state = st_start;
+		escp = p;	/* Beginning of argument sequence */
+		nval = 0;
+		switch (c) {
+		case 'a':
+		    nval = 7;
+		    break;
+		case 'b':
+		    nval = 8;
+		    break;
+		case 'e':
+		    nval = 27;
+		    break;
+		case 'f':
+		    nval = 12;
+		    break;
+		case 'n':
+		    nval = 10;
+		    break;
+		case 'r':
+		    nval = 13;
+		    break;
+		case 't':
+		    nval = 9;
+		    break;
+		case 'u':
+		    state = st_ucs;
+		    ndig = 4;
+		    break;
+		case 'U':
+		    state = st_ucs;
+		    ndig = 8;
+		    break;
+		case 'v':
+		    nval = 11;
+		    break;
+		case 'x':
+		case 'X':
+		    state = st_hex;
+		    ndig = 2;
+		    break;
+		case '0':
+		case '1':
+		case '2':
+		case '3':
+		case '4':
+		case '5':
+		case '6':
+		case '7':
+		    state = st_oct;
+		    ndig = 2;	/* Up to two more digits */
+		    nval = c - '0';
+		    break;
+                case '\0':
+                    nval = '\\';
+                    p--;        /* Reprocess; terminates string */
+                    break;
+		default:
+		    nval = c;
+		    break;
+		}
+                if (state == st_start)
+                    EMIT(nval);
+		break;
+
+	    case st_oct:
+		if (c >= '0' && c <= '7') {
+		    nval = (nval << 3) + (c - '0');
+                    if (--ndig)
+                        break;  /* Might have more digits */
+                } else {
+		    p--;	/* Process this character again */
+                }
+                EMIT(nval);
+                state = st_start;
+                break;
+
+	    case st_hex:
+            case st_ucs:
+		if (nasm_isxdigit(c)) {
+		    nval = (nval << 4) + numvalue(c);
+                    if (--ndig)
+                        break;  /* Might have more digits */
+                } else {
+		    p--;	/* Process this character again */
+                }
+
+                if (unlikely(p <= escp))
+                    EMIT(escp-1);
+                else if (state == st_ucs)
+                    EMIT_UTF8(nval);
+                else
+                    EMIT(nval);
+
+                state = st_start;
+		break;
+
+            default:
+                panic();
+            }
+        }
+    } else if (bq == '\'' || bq == '\"') {
+	/*
+         * '...' or "..." string, NASM legacy style (no escapes of
+         * * any kind, including collapsing double quote marks.)
+         * We obviously can't get here if qstart == '\"'.
+         */
+        while ((c = *p++) && (c != bq))
+            EMIT(c);
+    } else {
+	/* Not a quoted string, just return the input... */
+        while ((c = *p++))
+            EMIT(c);
+    }
+
+    /* Zero-terminate the output */
+    *q = '\0';
+
+    if (ctlmask & badctl)
+        nasm_nonfatal("control character in string not allowed here");
+
+    if (ep)
+	*ep = (char *)p - 1;
+    return (char *)q - str;
+}
+#undef EMIT
+
+/*
+ * Unquote any arbitrary string; may produce any bytes, including embedded
+ * control- and NUL characters.
+ */
+size_t nasm_unquote(char *str, char **ep)
+{
+    return nasm_unquote_anystr(str, ep, 0, STR_NASM);
+}
+
+/*
+ * Unquote a string intended to be used as a C string; most control
+ * characters are rejected, including whitespace characters that
+ * would imply line endings and so on.
+ */
+size_t nasm_unquote_cstr(char *str, char **ep)
+{
+    return nasm_unquote_anystr(str, ep, BADCTL, STR_NASM);
+}
+
+/*
+ * Find the end of a quoted string; returns the pointer to the terminating
+ * character (either the ending quote or the null character, if unterminated.)
+ * If the input is not a quoted string, return NULL.
+ * This applies to NASM style strings only.
+ */
+char *nasm_skip_string(const char *str)
+{
+    char bq;
+    const char *p;
+    char c;
+    enum unq_state {
+	st_start,
+	st_backslash,
+        st_done
+    } state;
+
+    bq = str0;
+    p = str+1;
+    switch (bq) {
+    case '\'':
+    case '\"':
+	/* '...' or "..." string */
+        while ((c = *p++) && (c != bq))
+            ;
+        break;
+
+    case '`':
+	/* `...` string */
+	state = st_start;
+	while (state != st_done) {
+            c = *p++;
+	    switch (state) {
+	    case st_start:
+		switch (c) {
+		case '\\':
+		    state = st_backslash;
+		    break;
+		case '`':
+                case '\0':
+                    state = st_done;
+                    break;
+		default:
+		    break;
+		}
+		break;
+
+	    case st_backslash:
+		/*
+		 * Note: for the purpose of finding the end of the string,
+		 * all successor states to st_backslash are functionally
+		 * equivalent to st_start, since either a backslash or
+		 * a backquote will force a return to the st_start state,
+                 * and any possible multi-character state will terminate
+                 * for any non-alphanumeric character.
+		 */
+		state = c ? st_start : st_done;
+		break;
+
+            default:
+                panic();
+	    }
+	}
+        break;
+
+    default:
+        /* Not a string at all... */
+        return NULL;
+    }
+    return (char *)p - 1;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/asm/quote.h Added

@@ -0,0 +1,61 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2009 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#ifndef NASM_QUOTE_H
+#define NASM_QUOTE_H
+
+#include "compiler.h"
+
+char *nasm_quote(const char *str, size_t *len);
+char *nasm_quote_cstr(const char *str, size_t *len);
+size_t nasm_unquote_anystr(char *str, char **endptr,
+                           uint32_t badctl, char qstart);
+size_t nasm_unquote(char *str, char **endptr);
+size_t nasm_unquote_cstr(char *str, char **endptr);
+char *nasm_skip_string(const char *str);
+
+/* Arguments used with nasm_quote_anystr() */
+
+/*
+ * These are the only control characters when we produce a C string:
+ * BEL BS TAB ESC
+ */
+#define OKCTL ((1U << '\a') | (1U << '\b') | (1U << '\t') | (1U << 27))
+#define BADCTL (~(uint32_t)OKCTL)
+
+/* Initial quotation mark */
+#define STR_C    '\"'
+#define STR_NASM '`'
+
+#endif /* NASM_QUOTE_H */
+

_service:tar_scm:nasm-2.16.03.tar.xz/asm/rdstrnum.c Added

@@ -0,0 +1,61 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2016 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * rdstrnum.c
+ *
+ * This converts a NASM string to an integer, used when a string
+ * is used in an integer constant context.  This is a binary conversion,
+ * not a conversion from a numeric constant in text form.
+ */
+
+#include "compiler.h"
+#include "nasmlib.h"
+#include "nasm.h"
+
+int64_t readstrnum(char *str, int length, bool *warn)
+{
+    int64_t charconst = 0;
+    int i;
+
+    *warn = false;
+    if (length > 8) {
+        *warn = true;
+        length = 8;
+    }
+
+    for (i = 0; i < length; i++)
+        charconst += (uint64_t)((uint8_t)(*str++)) << (i*8);
+
+    return charconst;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/asm/segalloc.c Added

@@ -0,0 +1,51 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2018 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * nasmlib.c	library routines for the Netwide Assembler
+ */
+
+#include "compiler.h"
+#include "nasm.h"
+#include "nasmlib.h"
+#include "insns.h"
+
+static int32_t next_seg  = 2;
+
+int32_t seg_alloc(void)
+{
+    int32_t this_seg = next_seg;
+
+    next_seg += 2;
+    return this_seg;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/asm/srcfile.c Added

@@ -0,0 +1,118 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2020 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * srcfile.c - keep track of the current position in the input stream.
+ *
+ * This is used for error messages, listing, and debug information. In
+ * both cases we also want to understand where inside a non-nolist
+ * macro we may be.
+ *
+ * This hierarchy is a stack that is kept as a doubly-linked list, as
+ * we want to traverse it in either top-down order or bottom-up.
+ */
+
+#include "compiler.h"
+
+
+#include "nasmlib.h"
+#include "hashtbl.h"
+#include "srcfile.h"
+
+struct src_location_stack _src_top;
+struct src_location_stack *_src_bottom = &_src_top;
+struct src_location_stack *_src_error = &_src_top;
+
+static struct hash_table filename_hash;
+
+void src_init(void)
+{
+}
+
+void src_free(void)
+{
+    hash_free_all(&filename_hash, false);
+}
+
+/*
+ * Set the current filename, returning the old one.  The input
+ * filename is duplicated if needed.
+ */
+const char *src_set_fname(const char *newname)
+{
+    struct hash_insert hi;
+    const char *oldname;
+    void **dp;
+
+    if (newname) {
+        dp = hash_find(&filename_hash, newname, &hi);
+        if (dp) {
+            newname = (const char *)(*dp);
+        } else {
+            newname = nasm_strdup(newname);
+            hash_add(&hi, newname, (void *)newname);
+        }
+    }
+
+    oldname = _src_bottom->l.filename;
+    _src_bottom->l.filename = newname;
+    return oldname;
+}
+
+void src_set(int32_t line, const char *fname)
+{
+    src_set_fname(fname);
+    src_set_linnum(line);
+}
+
+void src_macro_push(const void *macro, struct src_location where)
+{
+    struct src_location_stack *sl;
+
+    nasm_new(sl);
+    sl->l = where;
+    sl->macro = macro;
+    sl->up = _src_bottom;
+    _src_bottom->down = sl;
+    _src_bottom = sl;
+}
+
+void src_macro_pop(void)
+{
+    struct src_location_stack *sl = _src_bottom;
+
+    _src_bottom = sl->up;
+    _src_bottom->down = NULL;
+
+    nasm_free(sl);
+}

_service:tar_scm:nasm-2.16.03.tar.xz/asm/srcfile.h Added

@@ -0,0 +1,183 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2020 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * These functions are used to keep track of the source code file and name.
+ */
+#ifndef ASM_SRCFILE_H
+#define ASM_SRCFILE_H
+
+#include "compiler.h"
+
+struct src_location {
+    const char *filename;
+    int32_t lineno;
+};
+
+static inline const_func struct src_location src_nowhere(void)
+{
+    struct src_location no_where = { NULL, 0 };
+    return no_where;
+}
+
+/*
+ * Comparing the *pointer value* of filenames is valid, because the
+ * filename hash system guarantees that each unique filename string is
+ * permanently allocated in exactly one location.
+ */
+static inline bool
+src_location_same(struct src_location here, struct src_location there)
+{
+    return here.filename == there.filename && here.lineno == there.lineno;
+}
+
+struct src_location_stack {
+    struct src_location l;
+    struct src_location_stack *up, *down;
+    const void *macro;
+};
+extern struct src_location_stack _src_top;
+extern struct src_location_stack *_src_bottom;
+extern struct src_location_stack *_src_error;
+
+void src_init(void);
+void src_free(void);
+const char *src_set_fname(const char *newname);
+static inline const char *src_get_fname(void)
+{
+    return _src_bottom->l.filename;
+}
+static inline int32_t src_set_linnum(int32_t newline)
+{
+    int32_t oldline = _src_bottom->l.lineno;
+    _src_bottom->l.lineno = newline;
+    return oldline;
+}
+static inline int32_t src_get_linnum(void)
+{
+    return _src_bottom->l.lineno;
+}
+
+/* Can be used when there is no need for the old information */
+void src_set(int32_t line, const char *filename);
+
+/*
+ * src_get gets both the source file name and line.
+ * It is also used if you maintain private status about the source location
+ * It return 0 if the information was the same as the last time you
+ * checked, -2 if the name changed and (new-old) if just the line changed.
+ *
+ * xname must point to a filename string previously returned from any
+ * function of this subsystem or be NULL; another string value will
+ * not work.
+ */
+static inline int32_t src_get(int32_t *xline, const char **xname)
+{
+    const char *xn = *xname;
+    int32_t xl = *xline;
+    int32_t line = _src_bottom->l.lineno;
+
+    *xline = line;
+    *xname = _src_bottom->l.filename;
+
+    /* The return value is expected to be optimized out almost everywhere */
+    if (!xn || xn != _src_bottom->l.filename)
+        return -2;
+    else
+        return line - xl;
+}
+
+/*
+ * Returns the current information as a structure.
+ */
+static inline struct src_location src_where(void)
+{
+    return _src_bottom->l;
+}
+
+/*
+ * Returns the top-level information as a structure. Use this for panic
+ * errors, since descent is not possible there.
+ */
+static inline struct src_location src_where_top(void)
+{
+    return _src_top.l;
+}
+
+/*
+ * Returns the appropriate level of the location stack to use for error
+ * messages. This is the same as the top level except during the descent
+ * through the macro hierarchy for elucidation;
+ */
+static inline struct src_location src_where_error(void)
+{
+    return _src_error->l;
+}
+static inline const void *src_error_down(void)
+{
+    if (_src_error->down) {
+        _src_error = _src_error->down;
+        return _src_error->macro;
+    } else {
+        return NULL;
+    }
+}
+static inline void src_error_reset(void)
+{
+    _src_error = &_src_top;
+}
+
+/*
+ * Sets the current information. The filename member of the structure
+ * *must* have been previously returned by src_get(), src_where(), or
+ * src_get_fname() and therefore be present in the hash.
+ */
+static inline struct src_location src_update(struct src_location whence)
+{
+    struct src_location old = _src_bottom->l;
+    _src_bottom->l = whence;
+    return old;
+}
+
+/*
+ * Push/pop macro expansion level. "macroname" must remain constant at
+ * least until the same macro expansion level is popped.
+ */
+void src_macro_push(const void *macroname, struct src_location where);
+static inline const void *src_macro_current(void)
+{
+    return _src_bottom->macro;
+}
+void src_macro_pop(void);
+
+#endif /* ASM_SRCFILE_H */

_service:tar_scm:nasm-2.16.03.tar.xz/asm/stdscan.c Added

@@ -0,0 +1,365 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2023 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#include "compiler.h"
+
+#include "nctype.h"
+
+#include "nasm.h"
+#include "nasmlib.h"
+#include "error.h"
+#include "quote.h"
+#include "stdscan.h"
+#include "insns.h"
+
+/*
+ * Standard scanner routine used by parser.c and some output
+ * formats. It keeps a succession of temporary-storage strings in
+ * stdscan_tempstorage, which can be cleared using stdscan_reset.
+ */
+static char *stdscan_bufptr = NULL;
+static char **stdscan_tempstorage = NULL;
+static int stdscan_tempsize = 0, stdscan_templen = 0;
+#define STDSCAN_TEMP_DELTA 256
+
+void stdscan_set(char *str)
+{
+        stdscan_bufptr = str;
+}
+
+char *stdscan_get(void)
+{
+        return stdscan_bufptr;
+}
+
+static void stdscan_pop(void)
+{
+    nasm_free(stdscan_tempstorage--stdscan_templen);
+}
+
+void stdscan_reset(void)
+{
+    while (stdscan_templen > 0)
+        stdscan_pop();
+}
+
+/*
+ * Unimportant cleanup is done to avoid confusing people who are trying
+ * to debug real memory leaks
+ */
+void stdscan_cleanup(void)
+{
+    stdscan_reset();
+    nasm_free(stdscan_tempstorage);
+}
+
+static char *stdscan_copy(const char *p, int len)
+{
+    char *text;
+
+    text = nasm_malloc(len + 1);
+    memcpy(text, p, len);
+    textlen = '\0';
+
+    if (stdscan_templen >= stdscan_tempsize) {
+        stdscan_tempsize += STDSCAN_TEMP_DELTA;
+        stdscan_tempstorage = nasm_realloc(stdscan_tempstorage,
+                                           stdscan_tempsize *
+                                           sizeof(char *));
+    }
+    stdscan_tempstoragestdscan_templen++ = text;
+
+    return text;
+}
+
+/*
+ * a token is enclosed with braces. proper token type will be assigned
+ * accordingly with the token flag.
+ */
+static int stdscan_handle_brace(struct tokenval *tv)
+{
+    if (!(tv->t_flag & TFLAG_BRC_ANY)) {
+        /* invalid token is put inside braces */
+        nasm_nonfatal("`%s' is not a valid decorator with braces", tv->t_charptr);
+        tv->t_type = TOKEN_INVALID;
+    } else if (tv->t_flag & TFLAG_BRC_OPT) {
+        if (is_reg_class(OPMASKREG, tv->t_integer)) {
+            /* within braces, opmask register is now used as a mask */
+            tv->t_type = TOKEN_OPMASK;
+        }
+    }
+
+    return tv->t_type;
+}
+
+static int stdscan_token(struct tokenval *tv);
+
+int stdscan(void *private_data, struct tokenval *tv)
+{
+    int i;
+
+    (void)private_data;         /* Don't warn that this parameter is unused */
+
+    nasm_zero(*tv);
+
+    stdscan_bufptr = nasm_skip_spaces(stdscan_bufptr);
+    tv->t_start = stdscan_bufptr;
+
+    if (!*stdscan_bufptr)
+        return tv->t_type = TOKEN_EOS;
+
+    i = stdscan_token(tv);
+    tv->t_len = stdscan_bufptr - tv->t_start;
+
+    return i;
+}
+
+static int stdscan_token(struct tokenval *tv)
+{
+    const char *r;
+
+    /* we have a token; either an id, a number, operator or char */
+    if (nasm_isidstart(*stdscan_bufptr) ||
+        (*stdscan_bufptr == '$' && nasm_isidstart(stdscan_bufptr1))) {
+        /* now we've got an identifier */
+        bool is_sym = false;
+        int token_type;
+
+        if (*stdscan_bufptr == '$') {
+            is_sym = true;
+            stdscan_bufptr++;
+        }
+
+        r = stdscan_bufptr++;
+        /* read the entire buffer to advance the buffer pointer but... */
+        while (nasm_isidchar(*stdscan_bufptr))
+            stdscan_bufptr++;
+
+        /* ... copy only up to IDLEN_MAX-1 characters */
+        tv->t_charptr = stdscan_copy(r, stdscan_bufptr - r < IDLEN_MAX ?
+                                     stdscan_bufptr - r : IDLEN_MAX - 1);
+
+        if (is_sym || stdscan_bufptr - r > MAX_KEYWORD)
+            return tv->t_type = TOKEN_ID;       /* bypass all other checks */
+
+        token_type = nasm_token_hash(tv->t_charptr, tv);
+        if (unlikely(tv->t_flag & TFLAG_WARN)) {
+            /*! ptr on non-NASM keyword used in other assemblers
+             *!  warns about keywords used in other assemblers that
+             *!  might indicate a mistake in the source code.
+             *!  Currently only the MASM \c{PTR} keyword is
+             *!  recognized. If (limited) MASM compatibility is
+             *!  desired, the \c{%use masm} macro package is
+             *!  available, see \k{pkg_masm}; however, carefully note
+             *!  the caveats listed.
+             */
+            nasm_warn(WARN_PTR, "`%s' is not a NASM keyword",
+                       tv->t_charptr);
+        }
+
+        if (likely(!(tv->t_flag & TFLAG_BRC))) {
+            /* most of the tokens fall into this case */
+            return token_type;
+        } else {
+            return tv->t_type = TOKEN_ID;
+        }
+    } else if (*stdscan_bufptr == '$' && !nasm_isnumchar(stdscan_bufptr1)) {
+        /*
+         * It's a $ sign with no following hex number; this must
+         * mean it's a Here token ($), evaluating to the current
+         * assembly location, or a Base token ($$), evaluating to
+         * the base of the current segment.
+         */
+        stdscan_bufptr++;
+        if (*stdscan_bufptr == '$') {
+            stdscan_bufptr++;
+            return tv->t_type = TOKEN_BASE;
+        }
+        return tv->t_type = TOKEN_HERE;
+    } else if (nasm_isnumstart(*stdscan_bufptr)) {   /* now we've got a number */
+        bool rn_error;
+        bool is_hex = false;
+        bool is_float = false;
+        bool has_e = false;
+        char c;
+
+        r = stdscan_bufptr;
+
+        if (*stdscan_bufptr == '$') {
+            stdscan_bufptr++;
+            is_hex = true;
+        }
+
+        for (;;) {
+            c = *stdscan_bufptr++;
+
+            if (!is_hex && (c == 'e' || c == 'E')) {
+                has_e = true;
+                if (*stdscan_bufptr == '+' || *stdscan_bufptr == '-') {
+                    /*
+                     * e can only be followed by +/- if it is either a
+                     * prefixed hex number or a floating-point number
+                     */
+                    is_float = true;
+                    stdscan_bufptr++;
+                }
+            } else if (c == 'H' || c == 'h' || c == 'X' || c == 'x') {
+                is_hex = true;
+            } else if (c == 'P' || c == 'p') {
+                is_float = true;
+                if (*stdscan_bufptr == '+' || *stdscan_bufptr == '-')
+                    stdscan_bufptr++;
+            } else if (nasm_isnumchar(c))
+                ; /* just advance */
+            else if (c == '.')
+                is_float = true;
+            else
+                break;
+        }
+        stdscan_bufptr--;       /* Point to first character beyond number */
+
+        if (has_e && !is_hex) {
+            /* 1e13 is floating-point, but 1e13h is not */
+            is_float = true;
+        }
+
+        if (is_float) {
+            tv->t_charptr = stdscan_copy(r, stdscan_bufptr - r);
+            return tv->t_type = TOKEN_FLOAT;
+        } else {
+            r = stdscan_copy(r, stdscan_bufptr - r);
+            tv->t_integer = readnum(r, &rn_error);
+            stdscan_pop();
+            if (rn_error) {
+                /* some malformation occurred */
+                return tv->t_type = TOKEN_ERRNUM;
+            }
+            tv->t_charptr = NULL;
+            return tv->t_type = TOKEN_NUM;
+        }
+    } else if (*stdscan_bufptr == '\'' || *stdscan_bufptr == '"' ||
+               *stdscan_bufptr == '`') {
+        /* a quoted string */
+        char start_quote = *stdscan_bufptr;
+        tv->t_charptr = stdscan_bufptr;
+        tv->t_inttwo = nasm_unquote(tv->t_charptr, &stdscan_bufptr);
+        if (*stdscan_bufptr != start_quote)
+            return tv->t_type = TOKEN_ERRSTR;
+        stdscan_bufptr++;       /* Skip final quote */
+        return tv->t_type = TOKEN_STR;
+    } else if (*stdscan_bufptr == '{') {
+        /* now we've got a decorator */
+        int token_len;
+
+        stdscan_bufptr = nasm_skip_spaces(stdscan_bufptr);
+
+        r = ++stdscan_bufptr;
+        /*
+         * read the entire buffer to advance the buffer pointer
+         * {rn-sae}, {rd-sae}, {ru-sae}, {rz-sae} contain '-' in tokens.
+         */
+        while (nasm_isbrcchar(*stdscan_bufptr))
+            stdscan_bufptr++;
+
+        token_len = stdscan_bufptr - r;
+
+        /* ... copy only up to DECOLEN_MAX-1 characters */
+        tv->t_charptr = stdscan_copy(r, token_len < DECOLEN_MAX ?
+                                        token_len : DECOLEN_MAX - 1);
+
+        stdscan_bufptr = nasm_skip_spaces(stdscan_bufptr);
+        /* if brace is not closed properly or token is too long  */
+        if ((*stdscan_bufptr != '}') || (token_len > MAX_KEYWORD)) {
+            nasm_nonfatal("invalid decorator token inside braces");
+            return tv->t_type = TOKEN_INVALID;
+        }
+
+        stdscan_bufptr++;       /* skip closing brace */
+
+        /* handle tokens inside braces */
+        nasm_token_hash(tv->t_charptr, tv);
+        return stdscan_handle_brace(tv);
+    } else if (*stdscan_bufptr == ';') {
+        /* a comment has happened - stay */
+        return tv->t_type = TOKEN_EOS;
+    } else if (stdscan_bufptr0 == '>' && stdscan_bufptr1 == '>') {
+        if (stdscan_bufptr2 == '>') {
+            stdscan_bufptr += 3;
+            return tv->t_type = TOKEN_SAR;
+        } else {
+            stdscan_bufptr += 2;
+            return tv->t_type = TOKEN_SHR;
+        }
+    } else if (stdscan_bufptr0 == '<' && stdscan_bufptr1 == '<') {
+        stdscan_bufptr += stdscan_bufptr2 == '<' ? 3 : 2;
+        return tv->t_type = TOKEN_SHL;
+    } else if (stdscan_bufptr0 == '/' && stdscan_bufptr1 == '/') {
+        stdscan_bufptr += 2;
+        return tv->t_type = TOKEN_SDIV;
+    } else if (stdscan_bufptr0 == '%' && stdscan_bufptr1 == '%') {
+        stdscan_bufptr += 2;
+        return tv->t_type = TOKEN_SMOD;
+    } else if (stdscan_bufptr0 == '=' && stdscan_bufptr1 == '=') {
+        stdscan_bufptr += 2;
+        return tv->t_type = TOKEN_EQ;
+    } else if (stdscan_bufptr0 == '<' && stdscan_bufptr1 == '>') {
+        stdscan_bufptr += 2;
+        return tv->t_type = TOKEN_NE;
+    } else if (stdscan_bufptr0 == '!' && stdscan_bufptr1 == '=') {
+        stdscan_bufptr += 2;
+        return tv->t_type = TOKEN_NE;
+    } else if (stdscan_bufptr0 == '<' && stdscan_bufptr1 == '=') {
+        if (stdscan_bufptr2 == '>') {
+            stdscan_bufptr += 3;
+            return tv->t_type = TOKEN_LEG;
+        } else {
+            stdscan_bufptr += 2;
+            return tv->t_type = TOKEN_LE;
+        }
+    } else if (stdscan_bufptr0 == '>' && stdscan_bufptr1 == '=') {
+        stdscan_bufptr += 2;
+        return tv->t_type = TOKEN_GE;
+    } else if (stdscan_bufptr0 == '&' && stdscan_bufptr1 == '&') {
+        stdscan_bufptr += 2;
+        return tv->t_type = TOKEN_DBL_AND;
+    } else if (stdscan_bufptr0 == '^' && stdscan_bufptr1 == '^') {
+        stdscan_bufptr += 2;
+        return tv->t_type = TOKEN_DBL_XOR;
+    } else if (stdscan_bufptr0 == '|' && stdscan_bufptr1 == '|') {
+        stdscan_bufptr += 2;
+        return tv->t_type = TOKEN_DBL_OR;
+    } else {
+        /* just an ordinary char */
+        return tv->t_type = (uint8_t)(*stdscan_bufptr++);
+    }
+}

_service:tar_scm:nasm-2.16.03.tar.xz/asm/stdscan.h Added

@@ -0,0 +1,49 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2009 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/* 
+ * stdscan.h	header file for stdscan.c
+ */
+
+#ifndef NASM_STDSCAN_H
+#define NASM_STDSCAN_H
+
+/* Standard scanner */
+void stdscan_set(char *str);
+char *stdscan_get(void);
+void stdscan_reset(void);
+int stdscan(void *private_data, struct tokenval *tv);
+int nasm_token_hash(const char *token, struct tokenval *tv);
+void stdscan_cleanup(void);
+
+#endif

_service:tar_scm:nasm-2.16.03.tar.xz/asm/strfunc.c Added

@@ -0,0 +1,359 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2009 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * strfunc.c
+ *
+ * String transformation functions
+ */
+
+#include "nasmlib.h"
+#include "nasm.h"
+
+/*
+ * Convert a string in UTF-8 format to UTF-16LE
+ */
+static size_t utf8_to_16le(uint8_t *str, size_t len, char *op)
+{
+#define EMIT(x) do { if (op) { WRITESHORT(op,x); } outlen++; } while(0)
+
+    size_t outlen = 0;
+    int expect = 0;
+    uint8_t c;
+    uint32_t v = 0, vmin = 0;
+
+    while (len--) {
+        c = *str++;
+
+        if (expect) {
+            if ((c & 0xc0) != 0x80) {
+                expect = 0;
+                return -1;
+            } else {
+                v = (v << 6) | (c & 0x3f);
+                if (!--expect) {
+                    if (v < vmin || v > 0x10ffff ||
+                        (v >= 0xd800 && v <= 0xdfff)) {
+                        return -1;
+                    } else if (v > 0xffff) {
+                        v -= 0x10000;
+                        EMIT(0xd800 | (v >> 10));
+                        EMIT(0xdc00 | (v & 0x3ff));
+                    } else {
+                        EMIT(v);
+                    }
+                }
+                continue;
+            }
+        }
+
+        if (c < 0x80) {
+            EMIT(c);
+        } else if (c < 0xc0 || c >= 0xfe) {
+            /* Invalid UTF-8 */
+            return -1;
+        } else if (c < 0xe0) {
+            v = c & 0x1f;
+            expect = 1;
+            vmin = 0x80;
+        } else if (c < 0xf0) {
+            v = c & 0x0f;
+            expect = 2;
+            vmin = 0x800;
+        } else if (c < 0xf8) {
+            v = c & 0x07;
+            expect = 3;
+            vmin = 0x10000;
+        } else if (c < 0xfc) {
+            v = c & 0x03;
+            expect = 4;
+            vmin = 0x200000;
+        } else {
+            v = c & 0x01;
+            expect = 5;
+            vmin = 0x4000000;
+        }
+    }
+
+    return expect ? (size_t)-1 : outlen << 1;
+
+#undef EMIT
+}
+
+/*
+ * Convert a string in UTF-8 format to UTF-16BE
+ */
+static size_t utf8_to_16be(uint8_t *str, size_t len, char *op)
+{
+#define EMIT(x)                                 \
+    do {                                        \
+        uint16_t _y = (x);                      \
+        if (op) {                               \
+            WRITECHAR(op, _y >> 8);             \
+            WRITECHAR(op, _y);                  \
+        }                                       \
+        outlen++;                               \
+    } while (0)                                 \
+
+    size_t outlen = 0;
+    int expect = 0;
+    uint8_t c;
+    uint32_t v = 0, vmin = 0;
+
+    while (len--) {
+        c = *str++;
+
+        if (expect) {
+            if ((c & 0xc0) != 0x80) {
+                expect = 0;
+                return -1;
+            } else {
+                v = (v << 6) | (c & 0x3f);
+                if (!--expect) {
+                    if (v < vmin || v > 0x10ffff ||
+                        (v >= 0xd800 && v <= 0xdfff)) {
+                        return -1;
+                    } else if (v > 0xffff) {
+                        v -= 0x10000;
+                        EMIT(0xdc00 | (v & 0x3ff));
+                        EMIT(0xd800 | (v >> 10));
+                    } else {
+                        EMIT(v);
+                    }
+                }
+                continue;
+            }
+        }
+
+        if (c < 0x80) {
+            EMIT(c);
+        } else if (c < 0xc0 || c >= 0xfe) {
+            /* Invalid UTF-8 */
+            return -1;
+        } else if (c < 0xe0) {
+            v = c & 0x1f;
+            expect = 1;
+            vmin = 0x80;
+        } else if (c < 0xf0) {
+            v = c & 0x0f;
+            expect = 2;
+            vmin = 0x800;
+        } else if (c < 0xf8) {
+            v = c & 0x07;
+            expect = 3;
+            vmin = 0x10000;
+        } else if (c < 0xfc) {
+            v = c & 0x03;
+            expect = 4;
+            vmin = 0x200000;
+        } else {
+            v = c & 0x01;
+            expect = 5;
+            vmin = 0x4000000;
+        }
+    }
+
+    return expect ? (size_t)-1 : outlen << 1;
+
+#undef EMIT
+}
+
+/*
+ * Convert a string in UTF-8 format to UTF-32LE
+ */
+static size_t utf8_to_32le(uint8_t *str, size_t len, char *op)
+{
+#define EMIT(x) do { if (op) { WRITELONG(op,x); } outlen++; } while(0)
+
+    size_t outlen = 0;
+    int expect = 0;
+    uint8_t c;
+    uint32_t v = 0, vmin = 0;
+
+    while (len--) {
+        c = *str++;
+
+        if (expect) {
+            if ((c & 0xc0) != 0x80) {
+                return -1;
+            } else {
+                v = (v << 6) | (c & 0x3f);
+                if (!--expect) {
+                    if (v < vmin || (v >= 0xd800 && v <= 0xdfff)) {
+                        return -1;
+                    } else {
+                        EMIT(v);
+                    }
+                }
+                continue;
+            }
+        }
+
+        if (c < 0x80) {
+            EMIT(c);
+        } else if (c < 0xc0 || c >= 0xfe) {
+            /* Invalid UTF-8 */
+            return -1;
+        } else if (c < 0xe0) {
+            v = c & 0x1f;
+            expect = 1;
+            vmin = 0x80;
+        } else if (c < 0xf0) {
+            v = c & 0x0f;
+            expect = 2;
+            vmin = 0x800;
+        } else if (c < 0xf8) {
+            v = c & 0x07;
+            expect = 3;
+            vmin = 0x10000;
+        } else if (c < 0xfc) {
+            v = c & 0x03;
+            expect = 4;
+            vmin = 0x200000;
+        } else {
+            v = c & 0x01;
+            expect = 5;
+            vmin = 0x4000000;
+        }
+    }
+
+    return expect ? (size_t)-1 : outlen << 2;
+
+#undef EMIT
+}
+
+/*
+ * Convert a string in UTF-8 format to UTF-32BE
+ */
+static size_t utf8_to_32be(uint8_t *str, size_t len, char *op)
+{
+#define EMIT(x)                                         \
+    do {                                                \
+        uint32_t _y = (x);                              \
+        if (op) {                                       \
+            WRITECHAR(op,_y >> 24);                     \
+            WRITECHAR(op,_y >> 16);                     \
+            WRITECHAR(op,_y >> 8);                      \
+            WRITECHAR(op,_y);                           \
+        }                                               \
+        outlen++;                                       \
+    } while (0)
+
+    size_t outlen = 0;
+    int expect = 0;
+    uint8_t c;
+    uint32_t v = 0, vmin = 0;
+
+    while (len--) {
+        c = *str++;
+
+        if (expect) {
+            if ((c & 0xc0) != 0x80) {
+                return -1;
+            } else {
+                v = (v << 6) | (c & 0x3f);
+                if (!--expect) {
+                    if (v < vmin || (v >= 0xd800 && v <= 0xdfff)) {
+                        return -1;
+                    } else {
+                        EMIT(v);
+                    }
+                }
+                continue;
+            }
+        }
+
+        if (c < 0x80) {
+            EMIT(c);
+        } else if (c < 0xc0 || c >= 0xfe) {
+            /* Invalid UTF-8 */
+            return -1;
+        } else if (c < 0xe0) {
+            v = c & 0x1f;
+            expect = 1;
+            vmin = 0x80;
+        } else if (c < 0xf0) {
+            v = c & 0x0f;
+            expect = 2;
+            vmin = 0x800;
+        } else if (c < 0xf8) {
+            v = c & 0x07;
+            expect = 3;
+            vmin = 0x10000;
+        } else if (c < 0xfc) {
+            v = c & 0x03;
+            expect = 4;
+            vmin = 0x200000;
+        } else {
+            v = c & 0x01;
+            expect = 5;
+            vmin = 0x4000000;
+        }
+    }
+
+    return expect ? (size_t)-1 : outlen << 2;
+
+#undef EMIT
+}
+
+typedef size_t (*transform_func)(uint8_t *, size_t, char *);
+
+/*
+ * Apply a specific string transform and return it in a nasm_malloc'd
+ * buffer, returning the length.  On error, returns (size_t)-1 and no
+ * buffer is allocated.
+ */
+size_t string_transform(char *str, size_t len, char **out, enum strfunc func)
+{
+    /* This should match enum strfunc in nasm.h */
+    static const transform_func str_transforms = {
+        utf8_to_16le,
+        utf8_to_16le,
+        utf8_to_16be,
+        utf8_to_32le,
+        utf8_to_32le,
+        utf8_to_32be,
+    };
+    transform_func transform = str_transformsfunc;
+    size_t outlen;
+    uint8_t *s = (uint8_t *)str;
+    char *buf;
+
+    outlen = transform(s, len, NULL);
+    if (outlen == (size_t)-1)
+        return -1;
+
+    *out = buf = nasm_malloc(outlen+1);
+    bufoutlen = '\0'; /* Forcibly null-terminate the buffer */
+    return transform(s, len, buf);
+}

_service:tar_scm:nasm-2.16.03.tar.xz/asm/tokens.dat Added

@@ -0,0 +1,215 @@
+## --------------------------------------------------------------------------
+##
+##   Copyright 1996-2021 The NASM Authors - All Rights Reserved
+##   See the file AUTHORS included with the NASM distribution for
+##   the specific copyright holders.
+##
+##   Redistribution and use in source and binary forms, with or without
+##   modification, are permitted provided that the following
+##   conditions are met:
+##
+##   * Redistributions of source code must retain the above copyright
+##     notice, this list of conditions and the following disclaimer.
+##   * Redistributions in binary form must reproduce the above
+##     copyright notice, this list of conditions and the following
+##     disclaimer in the documentation and/or other materials provided
+##     with the distribution.
+##
+##     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+##     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+##     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+##     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+##     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+##     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+##     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+##     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+##     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+##     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+##     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+##     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+##     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+##
+## --------------------------------------------------------------------------
+
+# The token parameters are in the other:
+# TOKEN_TYPE, t_inttwo, t_flags, t_integer
+#
+# * is replaced with the token name converted to upper case.
+# {xxx*yyy} is replaced with the token name stripped from the prefix
+# xxx and suffix yyy before converting to upper case.
+
+#
+# Tokens other than instructions and registers
+#
+
+# The ? operator is a keyword, because ? is a legitimate symbol character
+% TOKEN_QMARK, 0, 0, 0
+?
+
+% TOKEN_PREFIX, PPS_ASIZE, 0, P_*
+a16
+a32
+a64
+asp
+
+% TOKEN_PREFIX, PPS_LOCK, 0, P_*
+lock
+
+% TOKEN_PREFIX, PPS_OSIZE, 0, P_*
+o16
+o32
+o64
+osp
+
+% TOKEN_PREFIX, PPS_REP, 0, P_*
+rep
+repe
+repne
+repnz
+repz
+xacquire
+xrelease
+bnd
+nobnd
+
+% TOKEN_PREFIX, PPS_TIMES, 0, P_*
+times
+
+% TOKEN_PREFIX, PPS_WAIT, 0, P_*
+wait
+
+% TOKEN_PREFIX, PPS_REX, TFLAG_BRC, P_*
+rex
+evex
+vex
+vex3
+vex2
+
+% TOKEN_SIZE, SIZE_*, 0, S_*
+byte
+word
+dword
+qword
+tword
+oword
+yword
+zword
+
+% TOKEN_SPECIAL, 0, 0, S_*
+abs
+far
+long
+near
+nosplit
+rel
+short
+strict
+to
+
+# PTR is a legitimate symbol, but has an optional warning
+% TOKEN_ID, 0, TFLAG_WARN, 0
+ptr
+
+# DUP is a legitimate symbol, but also has context-specific use in extops
+% TOKEN_ID, 0, TFLAG_DUP, 0
+dup
+
+% TOKEN_FLOAT, 0, 0, 0
+__?infinity?__
+__?nan?__
+__?qnan?__
+__?snan?__
+
+% TOKEN_FLOATIZE, 0, 0, FLOAT_{__?float*?__}
+__?float8?__
+__?float16?__
+__?float32?__
+__?float64?__
+__?float80m?__
+__?float80e?__
+__?float128l?__
+__?float128h?__
+
+% TOKEN_FLOATIZE, 0, 0, FLOAT_B{__?bfloat*?__}
+__?bfloat16?__
+
+% TOKEN_STRFUNC, 0, 0, STRFUNC_{__?*?__}
+__?utf16?__
+__?utf16le?__
+__?utf16be?__
+__?utf32?__
+__?utf32le?__
+__?utf32be?__
+
+% TOKEN_IFUNC, 0, 0, IFUNC_{__?*?__}
+__?ilog2e?__
+__?ilog2w?__
+__?ilog2f?__
+__?ilog2c?__
+
+% TOKEN_*, 0, 0, 0
+seg
+wrt
+
+% TOKEN_{__?*?__}, 0, 0, 0
+__?masm_ptr?__
+__?masm_flat?__
+
+% TOKEN_DECORATOR, 0, TFLAG_BRC | TFLAG_BRDCAST , BRC_1TO{1to*}
+1to2
+1to4
+1to8
+1to16
+1to32
+
+% TOKEN_DECORATOR, 0, TFLAG_BRC, BRC_{*-sae}
+rn-sae
+rd-sae
+ru-sae
+rz-sae
+
+% TOKEN_DECORATOR, 0, TFLAG_BRC, BRC_*
+sae
+z
+
+# Multi-character operators. Used in ppscan().
+% TOKEN_SHR, 0, 0, 0
+>>
+
+% TOKEN_SAR, 0, 0, 0
+>>>
+
+% TOKEN_SHL, 0, 0, 0
+<<
+<<<
+
+% TOKEN_SDIV, 0, 0, 0
+//
+
+% TOKEN_SMOD, 0, 0, 0
+%%
+
+% TOKEN_EQ, 0, 0, 0
+==
+
+% TOKEN_NE, 0, 0, 0
+!=
+<>
+
+% TOKEN_LE, 0, 0, 0
+<=
+
+% TOKEN_GE, 0, 0, 0
+>=
+
+% TOKEN_LEG, 0, 0, 0
+<=>
+
+% TOKEN_DBL_AND, 0, 0, 0
+&&
+
+% TOKEN_DBL_OR, 0, 0, 0
+||
+
+% TOKEN_DBL_XOR, 0, 0, 0
+^^

_service:tar_scm:nasm-2.16.03.tar.xz/asm/tokens.h Added

_service:tar_scm:nasm-2.16.03.tar.xz/asm/tokhash.c Added

@@ -0,0 +1,19056 @@
+/*
+ * This file is generated from insns.dat, regs.dat and token.dat
+ * by tokhash.pl; do not edit.
+ */
+
+#include "compiler.h"
+#include "nasm.h"
+#include "hashtbl.h"
+#include "insns.h"
+#include "stdscan.h"
+
+struct tokendata {
+    const char *string;
+    uint16_t len;
+    int16_t tokentype;
+    int16_t aux;
+    uint16_t tokflag;
+    int32_t num;
+};
+
+int nasm_token_hash(const char *token, struct tokenval *tv)
+{
+#define INVALID_HASH_ENTRY (65535/3)
+    static const int16_t hashdata16384 = {
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        -1309,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        57,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        1963,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1233,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        401,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        659,
+        0,
+        0,
+        1294,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        456,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1910,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1772,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        2162,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1218,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2113,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        2356,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        226,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        247,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        824,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        643,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
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+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
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+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
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+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
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+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
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+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
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+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
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+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
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+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
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+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1222,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        725,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        670,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        237,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
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+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1423,
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+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
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+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        0,
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+        0,
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+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
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+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
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+        INVALID_HASH_ENTRY,
+        0,
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+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        302,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
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+        0,
+        INVALID_HASH_ENTRY,
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+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
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+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
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+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
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+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1342,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1844,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        493,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        898,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        724,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
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+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2244,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1686,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        230,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        170,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1490,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1935,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2362,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2145,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        1621,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        1261,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1560,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        1008,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        -184,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1076,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1434,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2048,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -524,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        291,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        326,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1633,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        729,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        1162,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        476,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1801,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        395,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2006,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1518,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1315,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        750,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1547,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        2574,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1051,
+        1610,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1435,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1890,
+        0,
+        1979,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1135,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1408,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1297,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        535,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        712,
+        0,
+        0,
+        536,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2339,
+        INVALID_HASH_ENTRY,
+        2501,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1465,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        1750,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        487,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        915,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1293,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        -55,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        1909,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1994,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2251,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1549,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        1604,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2273,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1422,
+        INVALID_HASH_ENTRY,
+        0,
+        2201,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        1172,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1648,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        951,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2334,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1612,
+        INVALID_HASH_ENTRY,
+        -613,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        672,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2334,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        508,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2227,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        390,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2159,
+        INVALID_HASH_ENTRY,
+        1261,
+        0,
+        749,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2436,
+        0,
+        1195,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        467,
+        INVALID_HASH_ENTRY,
+        2569,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        822,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        945,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1029,
+        INVALID_HASH_ENTRY,
+        1171,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        869,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        2360,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        788,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        519,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        2112,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1413,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        757,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        1992,
+        0,
+        1298,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1852,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1821,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -78,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        46,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        2548,
+        INVALID_HASH_ENTRY,
+        0,
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+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1959,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        663,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        2108,
+        1291,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2517,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1813,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -30,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1983,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        192,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        580,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1220,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        873,
+        2580,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1023,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1239,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        1463,
+        1695,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2240,
+        INVALID_HASH_ENTRY,
+        0,
+        991,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1873,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2052,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        215,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        2033,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2216,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        -1183,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        928,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        1134,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        365,
+        134,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        494,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2282,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        -1892,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1744,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        2195,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2573,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1175,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -152,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1677,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -45,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1146,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        187,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        1145,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1389,
+        0,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        6,
+        919,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        68,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        1477,
+        INVALID_HASH_ENTRY,
+        1238,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1497,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        367,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        817,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1837,
+        1312,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        433,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        977,
+        1311,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        398,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1899,
+        0,
+        0,
+        1292,
+        0,
+        INVALID_HASH_ENTRY,
+        852,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        2010,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        1156,
+        1450,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        419,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1191,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2476,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1079,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2106,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        3097,
+        1409,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1645,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2321,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1102,
+        INVALID_HASH_ENTRY,
+        2168,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1879,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        488,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1584,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1625,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        267,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        613,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        427,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        693,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        121,
+        62,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2343,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        882,
+        539,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        36,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        728,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1105,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1228,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1777,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        888,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -848,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1724,
+        0,
+        INVALID_HASH_ENTRY,
+        1491,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        605,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2348,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        873,
+        1690,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1549,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        397,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        234,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        383,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        614,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1937,
+        0,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        818,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -637,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1308,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2509,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2430,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1432,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        -1307,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1213,
+        504,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1652,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1595,
+        INVALID_HASH_ENTRY,
+        2578,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        223,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2067,
+        2137,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        935,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1282,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2382,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -530,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2415,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2316,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        653,
+        INVALID_HASH_ENTRY,
+        554,
+        INVALID_HASH_ENTRY,
+        902,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        606,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2309,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        239,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        315,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        -184,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -2236,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1495,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1051,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        1766,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1944,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1404,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1062,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1938,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1554,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        1440,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2174,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        2368,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2486,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2126,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1908,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1603,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        842,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2121,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        54,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        94,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        360,
+        INVALID_HASH_ENTRY,
+        2084,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1457,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        -333,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2310,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        305,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        300,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        2100,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1393,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        627,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1263,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1541,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        483,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2345,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        414,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2131,
+        867,
+        1795,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1756,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        729,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        271,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        1032,
+        -279,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        2418,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1513,
+        0,
+        INVALID_HASH_ENTRY,
+        1734,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1470,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -873,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        225,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        755,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        1126,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1123,
+        0,
+        55,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        976,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1274,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1316,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1006,
+        1949,
+        1287,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        442,
+        2250,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        174,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2000,
+        583,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1322,
+        1216,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        744,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        163,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2120,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        17,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1496,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        -495,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        880,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1697,
+        1851,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        318,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1049,
+        1640,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        723,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        2537,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -403,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2503,
+        INVALID_HASH_ENTRY,
+        2452,
+        1094,
+        INVALID_HASH_ENTRY,
+        -1687,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2142,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        875,
+        INVALID_HASH_ENTRY,
+        1260,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        654,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1776,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        766,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1788,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        814,
+        INVALID_HASH_ENTRY,
+        0,
+        114,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        680,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        799,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1738,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        758,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1252,
+        INVALID_HASH_ENTRY,
+        2473,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1888,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        3456,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1864,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1365,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        731,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2386,
+        0,
+        801,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        827,
+        INVALID_HASH_ENTRY,
+        1904,
+        INVALID_HASH_ENTRY,
+        1004,
+        2369,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -80,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        386,
+        INVALID_HASH_ENTRY,
+        -492,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        1144,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2449,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1013,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1574,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        12,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2136,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        555,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        387,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        60,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1534,
+        INVALID_HASH_ENTRY,
+        164,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1265,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        953,
+        1068,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -343,
+        INVALID_HASH_ENTRY,
+        1236,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        178,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        1993,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2069,
+        INVALID_HASH_ENTRY,
+        2427,
+        INVALID_HASH_ENTRY,
+        1455,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        80,
+        918,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1616,
+        577,
+        346,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1199,
+        INVALID_HASH_ENTRY,
+        1315,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        2507,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1474,
+        1030,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1288,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        2041,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2258,
+        155,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1398,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        602,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1401,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1196,
+        INVALID_HASH_ENTRY,
+        1321,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2217,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1838,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2148,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1533,
+        2491,
+        1312,
+        2332,
+        71,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        816,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -56,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1952,
+        INVALID_HASH_ENTRY,
+        1128,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        678,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        13,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        781,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        739,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        100,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        967,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        444,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1629,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1209,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        2021,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        160,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1401,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        685,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2209,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        624,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -979,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2916,
+        1763,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1066,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1868,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -525,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1693,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1373,
+        -1280,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        2034,
+        INVALID_HASH_ENTRY,
+        1077,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        979,
+        2152,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1075,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -235,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        -903,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        567,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        52,
+        INVALID_HASH_ENTRY,
+        925,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        821,
+        410,
+        0,
+        INVALID_HASH_ENTRY,
+        2494,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2167,
+        INVALID_HASH_ENTRY,
+        452,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2567,
+        INVALID_HASH_ENTRY,
+        2144,
+        -778,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1749,
+        INVALID_HASH_ENTRY,
+        2357,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        79,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        2193,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2432,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        -992,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        913,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1097,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2419,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        498,
+        INVALID_HASH_ENTRY,
+        969,
+        930,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2457,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        904,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1486,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1984,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -710,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        367,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        3641,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1977,
+        0,
+        INVALID_HASH_ENTRY,
+        1527,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        380,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1022,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1273,
+        2383,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        340,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1095,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        2555,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        359,
+        INVALID_HASH_ENTRY,
+        1330,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1221,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1402,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2003,
+        196,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        328,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1063,
+        0,
+        INVALID_HASH_ENTRY,
+        1875,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -75,
+        454,
+        2324,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1223,
+        571,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        984,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -40,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1344,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        459,
+        765,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        2553,
+        INVALID_HASH_ENTRY,
+        1586,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        641,
+        INVALID_HASH_ENTRY,
+        2514,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        372,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        984,
+        INVALID_HASH_ENTRY,
+        1115,
+        INVALID_HASH_ENTRY,
+        1055,
+        0,
+        INVALID_HASH_ENTRY,
+        1442,
+        2525,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        525,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        334,
+        1983,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        548,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        334,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1555,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        858,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1433,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1481,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2101,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1968,
+        2589,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        87,
+        1705,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        563,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        91,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2192,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        288,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -42,
+        INVALID_HASH_ENTRY,
+        1205,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        879,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1596,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        455,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        211,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1993,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        981,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1211,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1086,
+        INVALID_HASH_ENTRY,
+        2331,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        785,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        719,
+        787,
+        INVALID_HASH_ENTRY,
+        0,
+        754,
+        469,
+        529,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        856,
+        0,
+        INVALID_HASH_ENTRY,
+        1160,
+        INVALID_HASH_ENTRY,
+        0,
+        1270,
+        669,
+        943,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -2224,
+        709,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        608,
+        INVALID_HASH_ENTRY,
+        517,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2032,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2495,
+        293,
+        1333,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1700,
+        INVALID_HASH_ENTRY,
+        2472,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        462,
+        INVALID_HASH_ENTRY,
+        2568,
+        901,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        637,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        166,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        319,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1092,
+        INVALID_HASH_ENTRY,
+        454,
+        INVALID_HASH_ENTRY,
+        0,
+        1689,
+        INVALID_HASH_ENTRY,
+        181,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        2226,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2597,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1818,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1406,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        126,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        4,
+        INVALID_HASH_ENTRY,
+        1334,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1385,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1894,
+        INVALID_HASH_ENTRY,
+        0,
+        694,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2212,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        2541,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1920,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        769,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2529,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        940,
+        619,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        492,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        34,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1185,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1522,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1576,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2448,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        399,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1317,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        -9,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1130,
+        0,
+        INVALID_HASH_ENTRY,
+        2518,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        829,
+        INVALID_HASH_ENTRY,
+        628,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        24,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1248,
+        INVALID_HASH_ENTRY,
+        2208,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        649,
+        0,
+        INVALID_HASH_ENTRY,
+        1520,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1622,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        372,
+        INVALID_HASH_ENTRY,
+        2198,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2342,
+        INVALID_HASH_ENTRY,
+        1180,
+        INVALID_HASH_ENTRY,
+        1246,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -315,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1067,
+        1168,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        557,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -504,
+        INVALID_HASH_ENTRY,
+        9,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        933,
+        2259,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        -582,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1218,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        -358,
+        INVALID_HASH_ENTRY,
+        -1550,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2469,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1177,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -312,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2363,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        21,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2456,
+        INVALID_HASH_ENTRY,
+        2262,
+        INVALID_HASH_ENTRY,
+        2550,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -123,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        999,
+        INVALID_HASH_ENTRY,
+        1078,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1583,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1237,
+        2592,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        647,
+        INVALID_HASH_ENTRY,
+        0,
+        1827,
+        140,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2563,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        449,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        872,
+        INVALID_HASH_ENTRY,
+        64,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        -2103,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1002,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        692,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1390,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2006,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1874,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        230,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        158,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2254,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        37,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1592,
+        INVALID_HASH_ENTRY,
+        0,
+        1080,
+        INVALID_HASH_ENTRY,
+        2093,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1880,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        42,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2163,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1694,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        777,
+        219,
+        893,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        1741,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        1245,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        103,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        229,
+        2477,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2213,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        129,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1740,
+        0,
+        INVALID_HASH_ENTRY,
+        384,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        828,
+        INVALID_HASH_ENTRY,
+        -733,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1893,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1546,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1846,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1656,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        323,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        986,
+        INVALID_HASH_ENTRY,
+        2403,
+        962,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        584,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        847,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        779,
+        INVALID_HASH_ENTRY,
+        -985,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1231,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        88,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        870,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1318,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        125,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1561,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        308,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -914,
+        INVALID_HASH_ENTRY,
+        0,
+        1220,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2187,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        394,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        502,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1791,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        809,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        956,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        7,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2182,
+        INVALID_HASH_ENTRY,
+        77,
+        1553,
+        INVALID_HASH_ENTRY,
+        0,
+        1950,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        938,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1617,
+        2391,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1537,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2255,
+        245,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -16,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        417,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2268,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1804,
+        926,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1620,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        362,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        958,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        631,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        106,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2431,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        -905,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        2009,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        764,
+        1298,
+        2016,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        293,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        -989,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2183,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        606,
+        INVALID_HASH_ENTRY,
+        353,
+        430,
+        0,
+        2382,
+        2002,
+        INVALID_HASH_ENTRY,
+        336,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        530,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        -1608,
+        INVALID_HASH_ENTRY,
+        48,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        274,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1732,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2168,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        565,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        792,
+        -1015,
+        1503,
+        INVALID_HASH_ENTRY,
+        203,
+        1736,
+        INVALID_HASH_ENTRY,
+        1087,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        320,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        43,
+        INVALID_HASH_ENTRY,
+        294,
+        564,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        331,
+        -745,
+        INVALID_HASH_ENTRY,
+        1437,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        368,
+        INVALID_HASH_ENTRY,
+        1336,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        762,
+        1850,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        422,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        421,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        995,
+        INVALID_HASH_ENTRY,
+        335,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        27,
+        1214,
+        INVALID_HASH_ENTRY,
+        1957,
+        934,
+        INVALID_HASH_ENTRY,
+        766,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2122,
+        INVALID_HASH_ENTRY,
+        783,
+        0,
+        126,
+        674,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -465,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1760,
+        INVALID_HASH_ENTRY,
+        1936,
+        INVALID_HASH_ENTRY,
+        1577,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1114,
+        2532,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1438,
+        2347,
+        INVALID_HASH_ENTRY,
+        1511,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2396,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        280,
+        2061,
+        1615,
+        639,
+        INVALID_HASH_ENTRY,
+        697,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1760,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        840,
+        329,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1283,
+        874,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        666,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        1145,
+        INVALID_HASH_ENTRY,
+        748,
+        1630,
+        INVALID_HASH_ENTRY,
+        -880,
+        2061,
+        1025,
+        INVALID_HASH_ENTRY,
+        1160,
+        INVALID_HASH_ENTRY,
+        1081,
+        1344,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        863,
+        972,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        160,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1494,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        889,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        325,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2030,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        772,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1004,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2055,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1814,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        588,
+        -1638,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        399,
+        1863,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1377,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        793,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        47,
+        INVALID_HASH_ENTRY,
+        2416,
+        2408,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1553,
+        INVALID_HASH_ENTRY,
+        0,
+        1810,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1724,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2534,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1543,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1131,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        706,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        1709,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        789,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        3630,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        222,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        356,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        441,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1068,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1209,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1935,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        484,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        97,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -847,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        924,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1775,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2519,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        281,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        574,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1098,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1284,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1013,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2585,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1151,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2154,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        675,
+        4432,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        186,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2305,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2367,
+        INVALID_HASH_ENTRY,
+        1660,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        216,
+        371,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1380,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        144,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        895,
+        INVALID_HASH_ENTRY,
+        668,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2554,
+        INVALID_HASH_ENTRY,
+        836,
+        INVALID_HASH_ENTRY,
+        943,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2096,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1467,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        980,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        1387,
+        INVALID_HASH_ENTRY,
+        1540,
+        INVALID_HASH_ENTRY,
+        1412,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        377,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        306,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -211,
+        2313,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        439,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1745,
+        INVALID_HASH_ENTRY,
+        116,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2584,
+        1150,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -463,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        495,
+        INVALID_HASH_ENTRY,
+        431,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        937,
+        INVALID_HASH_ENTRY,
+        1840,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1669,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1710,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        481,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2138,
+        INVALID_HASH_ENTRY,
+        2337,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        203,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        929,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2358,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        594,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        410,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1802,
+        1136,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1276,
+        822,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        4933,
+        INVALID_HASH_ENTRY,
+        843,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2364,
+        0,
+        475,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2045,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2443,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1591,
+        INVALID_HASH_ENTRY,
+        0,
+        1057,
+        INVALID_HASH_ENTRY,
+        539,
+        INVALID_HASH_ENTRY,
+        545,
+        INVALID_HASH_ENTRY,
+        1164,
+        INVALID_HASH_ENTRY,
+        1137,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2404,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -733,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1033,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1378,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        843,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        412,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        429,
+        172,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1172,
+        2147,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1552,
+        INVALID_HASH_ENTRY,
+        1900,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        482,
+        INVALID_HASH_ENTRY,
+        1779,
+        INVALID_HASH_ENTRY,
+        2207,
+        INVALID_HASH_ENTRY,
+        -1361,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1143,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        514,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2330,
+        1898,
+        INVALID_HASH_ENTRY,
+        922,
+        INVALID_HASH_ENTRY,
+        0,
+        2201,
+        1140,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1430,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2187,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1369,
+        INVALID_HASH_ENTRY,
+        877,
+        757,
+        INVALID_HASH_ENTRY,
+        1155,
+        1154,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1336,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        960,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        987,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        3001,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        -247,
+        INVALID_HASH_ENTRY,
+        188,
+        INVALID_HASH_ENTRY,
+        0,
+        1536,
+        INVALID_HASH_ENTRY,
+        1582,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        2302,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2467,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        66,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        633,
+        580,
+        2274,
+        167,
+        561,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1070,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1621,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1862,
+        329,
+        2249,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1920,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1668,
+        INVALID_HASH_ENTRY,
+        850,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1731,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1386,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        701,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -2361,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        -979,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2165,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -116,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2233,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        93,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        635,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        491,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1212,
+        INVALID_HASH_ENTRY,
+        -1460,
+        2596,
+        1767,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1133,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -643,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2450,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1809,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1956,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1948,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2540,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        377,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2414,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        277,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2385,
+        409,
+        INVALID_HASH_ENTRY,
+        -1942,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        235,
+        2522,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        388,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1416,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        -115,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2319,
+        162,
+        149,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        875,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        2218,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        250,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1548,
+        2044,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        2474,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        816,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1239,
+        INVALID_HASH_ENTRY,
+        238,
+        INVALID_HASH_ENTRY,
+        1,
+        1182,
+        INVALID_HASH_ENTRY,
+        2141,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1258,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1613,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1116,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1764,
+        1877,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1563,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1941,
+        586,
+        INVALID_HASH_ENTRY,
+        343,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2373,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        838,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        998,
+        INVALID_HASH_ENTRY,
+        0,
+        2257,
+        2442,
+        INVALID_HASH_ENTRY,
+        2194,
+        699,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        151,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1780,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        751,
+        -947,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1625,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2380,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        607,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        695,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        966,
+        0,
+        -475,
+        INVALID_HASH_ENTRY,
+        2428,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1257,
+        1737,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2160,
+        2150,
+        INVALID_HASH_ENTRY,
+        32,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1650,
+        INVALID_HASH_ENTRY,
+        2,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        286,
+        0,
+        INVALID_HASH_ENTRY,
+        1508,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2303,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1774,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1370,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        741,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        923,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1568,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        49,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        198,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2556,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1356,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        321,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        2318,
+        0,
+        303,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2622,
+        INVALID_HASH_ENTRY,
+        537,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2378,
+        1517,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        169,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1354,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1747,
+        INVALID_HASH_ENTRY,
+        1350,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        913,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        352,
+        INVALID_HASH_ENTRY,
+        1509,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1176,
+        2462,
+        INVALID_HASH_ENTRY,
+        65,
+        INVALID_HASH_ENTRY,
+        155,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1272,
+        INVALID_HASH_ENTRY,
+        580,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        921,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1771,
+        106,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1954,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1793,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        702,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        290,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1279,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -158,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        497,
+        1697,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -2373,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        506,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        797,
+        INVALID_HASH_ENTRY,
+        376,
+        2426,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2354,
+        INVALID_HASH_ENTRY,
+        -1334,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        411,
+        1944,
+        -1856,
+        253,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        261,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2024,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1471,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        115,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        -352,
+        375,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1947,
+        INVALID_HASH_ENTRY,
+        2117,
+        855,
+        INVALID_HASH_ENTRY,
+        963,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1348,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2105,
+        1529,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1288,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        499,
+        0,
+        INVALID_HASH_ENTRY,
+        -1110,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1443,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2583,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1254,
+        1652,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        786,
+        INVALID_HASH_ENTRY,
+        -308,
+        INVALID_HASH_ENTRY,
+        -285,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2400,
+        INVALID_HASH_ENTRY,
+        1808,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1355,
+        2538,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        496,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2153,
+        971,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2547,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2271,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        626,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -438,
+        INVALID_HASH_ENTRY,
+        1476,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1217,
+        0,
+        740,
+        249,
+        883,
+        -816,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        205,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1207,
+        1275,
+        1707,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        562,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        462,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1313,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2505,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2280,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        711,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1620,
+        2422,
+        470,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        2420,
+        INVALID_HASH_ENTRY,
+        283,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        2341,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        581,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1485,
+        INVALID_HASH_ENTRY,
+        1848,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1903,
+        1476,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1882,
+        0,
+        1966,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        982,
+        446,
+        -390,
+        -1254,
+        2493,
+        690,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        950,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2321,
+        0,
+        1514,
+        INVALID_HASH_ENTRY,
+        515,
+        INVALID_HASH_ENTRY,
+        15,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        464,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        622,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        719,
+        INVALID_HASH_ENTRY,
+        620,
+        2488,
+        INVALID_HASH_ENTRY,
+        846,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        20,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        878,
+        -242,
+        2127,
+        1922,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        339,
+        INVALID_HASH_ENTRY,
+        0,
+        -954,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        693,
+        2035,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2222,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2267,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -824,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2072,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2090,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        105,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        667,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        241,
+        191,
+        INVALID_HASH_ENTRY,
+        0,
+        2238,
+        INVALID_HASH_ENTRY,
+        -2194,
+        INVALID_HASH_ENTRY,
+        1784,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -208,
+        1373,
+        INVALID_HASH_ENTRY,
+        1468,
+        1513,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1449,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2482,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        123,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1794,
+        INVALID_HASH_ENTRY,
+        154,
+        INVALID_HASH_ENTRY,
+        2011,
+        1661,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -812,
+        INVALID_HASH_ENTRY,
+        2323,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        656,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1722,
+        INVALID_HASH_ENTRY,
+        310,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        542,
+        INVALID_HASH_ENTRY,
+        522,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -846,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        1379,
+        INVALID_HASH_ENTRY,
+        1834,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2501,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        -149,
+        INVALID_HASH_ENTRY,
+        1787,
+        INVALID_HASH_ENTRY,
+        29,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        391,
+        INVALID_HASH_ENTRY,
+        1467,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1609,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1186,
+        1708,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        806,
+        1343,
+        0,
+        INVALID_HASH_ENTRY,
+        1478,
+        INVALID_HASH_ENTRY,
+        1314,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1532,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1602,
+        0,
+        INVALID_HASH_ENTRY,
+        958,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1495,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        309,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1441,
+        INVALID_HASH_ENTRY,
+        1396,
+        INVALID_HASH_ENTRY,
+        1189,
+        1174,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        67,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        -995,
+        -249,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2552,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1184,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -799,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1470,
+        566,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        996,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -140,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2051,
+        INVALID_HASH_ENTRY,
+        230,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2374,
+        INVALID_HASH_ENTRY,
+        0,
+        2296,
+        INVALID_HASH_ENTRY,
+        617,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1169,
+        -1255,
+        1578,
+        2601,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        177,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        2184,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1265,
+        INVALID_HASH_ENTRY,
+        584,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2444,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1017,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1523,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1458,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2143,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1165,
+        1838,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1521,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        798,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        10,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1999,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        255,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1688,
+        -378,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2103,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        599,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1585,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        730,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        489,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1804,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2557,
+        854,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        658,
+        83,
+        1792,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -685,
+        1681,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2421,
+        INVALID_HASH_ENTRY,
+        906,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        541,
+        INVALID_HASH_ENTRY,
+        1335,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2024,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2149,
+        INVALID_HASH_ENTRY,
+        2225,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -249,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1493,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        596,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        150,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        107,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2049,
+        590,
+        INVALID_HASH_ENTRY,
+        949,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        639,
+        INVALID_HASH_ENTRY,
+        -828,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        509,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1107,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2185,
+        18,
+        INVALID_HASH_ENTRY,
+        892,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2534,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        281,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -825,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        72,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2392,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1174,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        165,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1855,
+        413,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        177,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1490,
+        -138,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        920,
+        1398,
+        2496,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1161,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2598,
+        2005,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        886,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2487,
+        1500,
+        INVALID_HASH_ENTRY,
+        1259,
+        665,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1366,
+        2508,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        358,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        660,
+        423,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        131,
+        2028,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1667,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        2470,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1459,
+        -1450,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        110,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1271,
+        217,
+        INVALID_HASH_ENTRY,
+        1816,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1972,
+        2197,
+        894,
+        INVALID_HASH_ENTRY,
+        -1043,
+        1507,
+        791,
+        INVALID_HASH_ENTRY,
+        195,
+        INVALID_HASH_ENTRY,
+        1230,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1391,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        589,
+        599,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        866,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -183,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1921,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        341,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1544,
+        INVALID_HASH_ENTRY,
+        2801,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        587,
+        INVALID_HASH_ENTRY,
+        1488,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        796,
+        2350,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1338,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1516,
+        1571,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        882,
+        INVALID_HASH_ENTRY,
+        826,
+        INVALID_HASH_ENTRY,
+        985,
+        -1247,
+        INVALID_HASH_ENTRY,
+        2129,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        402,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1558,
+        INVALID_HASH_ENTRY,
+        1896,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1943,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        33,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        901,
+        INVALID_HASH_ENTRY,
+        1009,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        710,
+        INVALID_HASH_ENTRY,
+        2068,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1243,
+        INVALID_HASH_ENTRY,
+        -97,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1449,
+        INVALID_HASH_ENTRY,
+        522,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2539,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        2559,
+        2260,
+        INVALID_HASH_ENTRY,
+        26,
+        INVALID_HASH_ENTRY,
+        236,
+        INVALID_HASH_ENTRY,
+        392,
+        INVALID_HASH_ENTRY,
+        2253,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        661,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -708,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        185,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        147,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1228,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -996,
+        21,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        90,
+        INVALID_HASH_ENTRY,
+        794,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1942,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -156,
+        2511,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        208,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        983,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2065,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2062,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1995,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        700,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1728,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2245,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1137,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2098,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        978,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1121,
+        1641,
+        2542,
+        1201,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1012,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1506,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        864,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2279,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        567,
+        INVALID_HASH_ENTRY,
+        2468,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        592,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        472,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        2229,
+        330,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        349,
+        2455,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1514,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2566,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        87,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1782,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        128,
+        0,
+        INVALID_HASH_ENTRY,
+        2264,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1212,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        -465,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1448,
+        932,
+        INVALID_HASH_ENTRY,
+        618,
+        INVALID_HASH_ENTRY,
+        1473,
+        8,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -171,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        533,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2461,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1337,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1859,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        194,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -709,
+        2275,
+        111,
+        1649,
+        0,
+        761,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2524,
+        -379,
+        INVALID_HASH_ENTRY,
+        1567,
+        INVALID_HASH_ENTRY,
+        1905,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        733,
+        1111,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2377,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1472,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2012,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        480,
+        INVALID_HASH_ENTRY,
+        2312,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1605,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1244,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1847,
+        332,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2214,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        477,
+        INVALID_HASH_ENTRY,
+        2478,
+        2438,
+        INVALID_HASH_ENTRY,
+        -140,
+        INVALID_HASH_ENTRY,
+        278,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        375,
+        INVALID_HASH_ENTRY,
+        40,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1365,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1992,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        661,
+        132,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        890,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        848,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2425,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        255,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        260,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1347,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1550,
+        1869,
+        448,
+        848,
+        INVALID_HASH_ENTRY,
+        364,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2290,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2043,
+        2073,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        30,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1985,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        98,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        742,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        109,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2042,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1141,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        735,
+        876,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1751,
+        168,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        638,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1623,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1492,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1340,
+        910,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        691,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1139,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        811,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1693,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1698,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        214,
+        INVALID_HASH_ENTRY,
+        956,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2432,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1163,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        756,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        970,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1054,
+        INVALID_HASH_ENTRY,
+        646,
+        1826,
+        1016,
+        168,
+        -870,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        354,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        941,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        432,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        644,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        99,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        342,
+        INVALID_HASH_ENTRY,
+        -317,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        625,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1853,
+        INVALID_HASH_ENTRY,
+        45,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1198,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1600,
+        INVALID_HASH_ENTRY,
+        689,
+        1058,
+        0,
+        2579,
+        896,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        346,
+        INVALID_HASH_ENTRY,
+        2189,
+        INVALID_HASH_ENTRY,
+        1861,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1385,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2064,
+        119,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        273,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1203,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1599,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1453,
+        1800,
+        1005,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        458,
+        INVALID_HASH_ENTRY,
+        679,
+        INVALID_HASH_ENTRY,
+        -883,
+        INVALID_HASH_ENTRY,
+        2520,
+        1839,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1917,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1866,
+        INVALID_HASH_ENTRY,
+        1068,
+        INVALID_HASH_ENTRY,
+        0,
+        1948,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1232,
+        INVALID_HASH_ENTRY,
+        703,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -296,
+        INVALID_HASH_ENTRY,
+        2288,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        2023,
+        INVALID_HASH_ENTRY,
+        707,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1196,
+        1502,
+        1000,
+        INVALID_HASH_ENTRY,
+        2221,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1998,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        173,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2344,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2169,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        292,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        297,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1101,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        942,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        777,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1811,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1702,
+        585,
+        118,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1170,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1290,
+        55,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        870,
+        INVALID_HASH_ENTRY,
+        1049,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        752,
+        1224,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2326,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1692,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1572,
+        1717,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        86,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        28,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        597,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2125,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -2411,
+        INVALID_HASH_ENTRY,
+        2291,
+        -471,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2294,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2059,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2371,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        107,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -7,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1469,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1819,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1730,
+        INVALID_HASH_ENTRY,
+        1353,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        82,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2359,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1946,
+        1286,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1672,
+        INVALID_HASH_ENTRY,
+        -294,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1653,
+        INVALID_HASH_ENTRY,
+        2246,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2269,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1044,
+        1159,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2186,
+        0,
+        2292,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        299,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2008,
+        279,
+        INVALID_HASH_ENTRY,
+        2166,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1689,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2311,
+        0,
+        -1065,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1417,
+        2277,
+        INVALID_HASH_ENTRY,
+        1406,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1256,
+        INVALID_HASH_ENTRY,
+        2335,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1367,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        737,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        863,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        50,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1325,
+        720,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1132,
+        INVALID_HASH_ENTRY,
+        1908,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        861,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        2346,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1142,
+        INVALID_HASH_ENTRY,
+        453,
+        INVALID_HASH_ENTRY,
+        957,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        60,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        416,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2409,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1849,
+        INVALID_HASH_ENTRY,
+        1575,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2479,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1289,
+        193,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2355,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1987,
+        0,
+        2056,
+        705,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        916,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -467,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1670,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        2590,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        282,
+        INVALID_HASH_ENTRY,
+        1926,
+        INVALID_HASH_ENTRY,
+        242,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1691,
+        INVALID_HASH_ENTRY,
+        1506,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1978,
+        INVALID_HASH_ENTRY,
+        2044,
+        INVALID_HASH_ENTRY,
+        1928,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1127,
+        INVALID_HASH_ENTRY,
+        0,
+        -1680,
+        INVALID_HASH_ENTRY,
+        1040,
+        558,
+        INVALID_HASH_ENTRY,
+        1355,
+        INVALID_HASH_ENTRY,
+        2437,
+        2500,
+        2020,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        312,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2128,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        959,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2489,
+        2401,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        152,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1143,
+        296,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1082,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        156,
+        0,
+        INVALID_HASH_ENTRY,
+        -1987,
+        INVALID_HASH_ENTRY,
+        2219,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1028,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2074,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2243,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2235,
+        476,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        0,
+        726,
+        988,
+        INVALID_HASH_ENTRY,
+        -806,
+        INVALID_HASH_ENTRY,
+        1197,
+        0,
+        INVALID_HASH_ENTRY,
+        2361,
+        2587,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1524,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        542,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        714,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        206,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1278,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1843,
+        -396,
+        -261,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        717,
+        INVALID_HASH_ENTRY,
+        2191,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        748,
+        1323,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2329,
+        1831,
+        INVALID_HASH_ENTRY,
+        1445,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1841,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        207,
+        INVALID_HASH_ENTRY,
+        907,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1907,
+        63,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        461,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1113,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1746,
+        -323,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        445,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1048,
+        INVALID_HASH_ENTRY,
+        486,
+        INVALID_HASH_ENTRY,
+        -318,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2157,
+        INVALID_HASH_ENTRY,
+        1281,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        166,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2406,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2484,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        587,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        311,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        338,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        157,
+        1825,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2564,
+        1845,
+        435,
+        1354,
+        1071,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1594,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1138,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        389,
+        75,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1945,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1026,
+        INVALID_HASH_ENTRY,
+        1679,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        396,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1762,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        831,
+        1865,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        973,
+        INVALID_HASH_ENTRY,
+        2370,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1975,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1803,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1646,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1976,
+        -985,
+        2582,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1096,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1930,
+        1014,
+        INVALID_HASH_ENTRY,
+        159,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        2114,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1153,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1924,
+        1489,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        127,
+        2463,
+        INVALID_HASH_ENTRY,
+        1090,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        677,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1682,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2447,
+        58,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1345,
+        1295,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2146,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        2047,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1822,
+        1361,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1778,
+        INVALID_HASH_ENTRY,
+        -1177,
+        778,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1678,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        575,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1897,
+        1726,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        359,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1158,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        183,
+        2512,
+        1973,
+        INVALID_HASH_ENTRY,
+        1059,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2215,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        299,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        767,
+        2270,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        884,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1943,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1267,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1824,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        121,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1743,
+        0,
+        INVALID_HASH_ENTRY,
+        1581,
+        INVALID_HASH_ENTRY,
+        366,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1598,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1805,
+        INVALID_HASH_ENTRY,
+        113,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1304,
+        2118,
+        2384,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2535,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -53,
+        -1231,
+        INVALID_HASH_ENTRY,
+        651,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        572,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2164,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        134,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2439,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        944,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        688,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2109,
+        1211,
+        INVALID_HASH_ENTRY,
+        1073,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        937,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1415,
+        2424,
+        1933,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2037,
+        INVALID_HASH_ENTRY,
+        2526,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1424,
+        INVALID_HASH_ENTRY,
+        495,
+        1192,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        153,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1371,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1047,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1415,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        773,
+        INVALID_HASH_ENTRY,
+        1664,
+        INVALID_HASH_ENTRY,
+        0,
+        287,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        337,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -708,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        808,
+        1505,
+        INVALID_HASH_ENTRY,
+        2252,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        233,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        5,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2057,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        0,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -56,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        745,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2058,
+        676,
+        INVALID_HASH_ENTRY,
+        2300,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1104,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1436,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        243,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        812,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2376,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        124,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1684,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1309,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1427,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        96,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        871,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1711,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1761,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1439,
+        2180,
+        2248,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        802,
+        INVALID_HASH_ENTRY,
+        1430,
+        INVALID_HASH_ENTRY,
+        382,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2211,
+        1110,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        673,
+        INVALID_HASH_ENTRY,
+        2272,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1089,
+        INVALID_HASH_ENTRY,
+        994,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1099,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1876,
+        1642,
+        930,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1084,
+        INVALID_HASH_ENTRY,
+        413,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1569,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1614,
+        1915,
+        INVALID_HASH_ENTRY,
+        0,
+        474,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2232,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        600,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        2079,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2328,
+        INVALID_HASH_ENTRY,
+        1421,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1573,
+        1119,
+        INVALID_HASH_ENTRY,
+        1234,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        3377,
+        1097,
+        1719,
+        INVALID_HASH_ENTRY,
+        131,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        655,
+        INVALID_HASH_ENTRY,
+        74,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        968,
+        2435,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        275,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2333,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1651,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1359,
+        INVALID_HASH_ENTRY,
+        295,
+        1400,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2295,
+        INVALID_HASH_ENTRY,
+        1091,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2199,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        629,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1346,
+        1823,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2528,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1991,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        3,
+        INVALID_HASH_ENTRY,
+        1053,
+        2353,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        624,
+        1989,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        611,
+        -216,
+        INVALID_HASH_ENTRY,
+        1036,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1638,
+        627,
+        1602,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        642,
+        INVALID_HASH_ENTRY,
+        698,
+        0,
+        -156,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        379,
+        2281,
+        INVALID_HASH_ENTRY,
+        810,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1202,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1796,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1912,
+        569,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        381,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1770,
+        INVALID_HASH_ENTRY,
+        -1478,
+        INVALID_HASH_ENTRY,
+        815,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2544,
+        715,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2039,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2204,
+        1188,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1828,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2095,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2004,
+        1042,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1219,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1039,
+        4,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1487,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        485,
+        -1390,
+        INVALID_HASH_ENTRY,
+        1960,
+        201,
+        298,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2543,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1557,
+        INVALID_HASH_ENTRY,
+        1037,
+        1673,
+        INVALID_HASH_ENTRY,
+        2572,
+        406,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1881,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        917,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        463,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1389,
+        713,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1225,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        304,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        96,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2036,
+        INVALID_HASH_ENTRY,
+        122,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        161,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2055,
+        1713,
+        INVALID_HASH_ENTRY,
+        1373,
+        1680,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        990,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        800,
+        2131,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        865,
+        2026,
+        INVALID_HASH_ENTRY,
+        2178,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2399,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1580,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2412,
+        2285,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1260,
+        INVALID_HASH_ENTRY,
+        634,
+        92,
+        1832,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1425,
+        -399,
+        -287,
+        1034,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        955,
+        1414,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2429,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1056,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1319,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        664,
+        INVALID_HASH_ENTRY,
+        610,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1721,
+        INVALID_HASH_ENTRY,
+        256,
+        814,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -380,
+        465,
+        1324,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        617,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        662,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        2446,
+        INVALID_HASH_ENTRY,
+        1885,
+        1227,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        526,
+        887,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1327,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1906,
+        200,
+        1384,
+        2007,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2172,
+        1179,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        975,
+        INVALID_HASH_ENTRY,
+        2093,
+        2460,
+        INVALID_HASH_ENTRY,
+        1073,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        410,
+        -400,
+        1564,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1210,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1282,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        193,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        505,
+        INVALID_HASH_ENTRY,
+        117,
+        1887,
+        460,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        828,
+        INVALID_HASH_ENTRY,
+        0,
+        727,
+        0,
+        INVALID_HASH_ENTRY,
+        2808,
+        -14,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2510,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        859,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1856,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1060,
+        INVALID_HASH_ENTRY,
+        0,
+        1129,
+        INVALID_HASH_ENTRY,
+        1070,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2082,
+        1883,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1884,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1247,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        11,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -505,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1773,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        403,
+        INVALID_HASH_ENTRY,
+        1027,
+        171,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1170,
+        2284,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1308,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1696,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2577,
+        INVALID_HASH_ENTRY,
+        1178,
+        INVALID_HASH_ENTRY,
+        330,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2694,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2551,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1647,
+        38,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        199,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        408,
+        832,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        145,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        376,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1755,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1982,
+        1064,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2123,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        494,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -479,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        1676,
+        2001,
+        1639,
+        INVALID_HASH_ENTRY,
+        1671,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1663,
+        1627,
+        INVALID_HASH_ENTRY,
+        104,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        759,
+        232,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        738,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2080,
+        2286,
+        1358,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2085,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1157,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1925,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2177,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        156,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1124,
+        INVALID_HASH_ENTRY,
+        543,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        686,
+        INVALID_HASH_ENTRY,
+        1356,
+        658,
+        -671,
+        2277,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2465,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        807,
+        369,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2600,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2340,
+        1786,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        154,
+        682,
+        385,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2492,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2304,
+        220,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        400,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2134,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2536,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        263,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        478,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1997,
+        167,
+        1729,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1932,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        853,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        961,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -369,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        81,
+        327,
+        490,
+        2202,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        804,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2078,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2504,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -762,
+        INVALID_HASH_ENTRY,
+        1093,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        511,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1166,
+        INVALID_HASH_ENTRY,
+        -1475,
+        213,
+        908,
+        2228,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1054,
+        2190,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1740,
+        INVALID_HASH_ENTRY,
+        1657,
+        1957,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        228,
+        INVALID_HASH_ENTRY,
+        254,
+        INVALID_HASH_ENTRY,
+        1519,
+        INVALID_HASH_ENTRY,
+        306,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -371,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1173,
+        0,
+        1307,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2223,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1243,
+        INVALID_HASH_ENTRY,
+        1285,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2591,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1475,
+        1576,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1375,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1045,
+        393,
+        148,
+        INVALID_HASH_ENTRY,
+        3890,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        556,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1722,
+        INVALID_HASH_ENTRY,
+        1833,
+        152,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        601,
+        INVALID_HASH_ENTRY,
+        576,
+        -12,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1867,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        851,
+        INVALID_HASH_ENTRY,
+        -371,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        909,
+        INVALID_HASH_ENTRY,
+        734,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        435,
+        INVALID_HASH_ENTRY,
+        1386,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2599,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1368,
+        INVALID_HASH_ENTRY,
+        693,
+        1122,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        841,
+        1572,
+        268,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        41,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        332,
+        INVALID_HASH_ENTRY,
+        -877,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1326,
+        INVALID_HASH_ENTRY,
+        276,
+        INVALID_HASH_ENTRY,
+        1410,
+        1021,
+        INVALID_HASH_ENTRY,
+        2483,
+        INVALID_HASH_ENTRY,
+        1988,
+        2393,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1939,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        770,
+        496,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        1003,
+        2405,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        2106,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1918,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2588,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1902,
+        0,
+        -40,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1456,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2239,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1210,
+        INVALID_HASH_ENTRY,
+        1242,
+        -689,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        550,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -448,
+        2481,
+        1088,
+        819,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        671,
+        INVALID_HASH_ENTRY,
+        -1448,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1154,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2397,
+        2477,
+        40,
+        INVALID_HASH_ENTRY,
+        1996,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2327,
+        1961,
+        INVALID_HASH_ENTRY,
+        208,
+        2158,
+        954,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        899,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2301,
+        1010,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1007,
+        -255,
+        509,
+        1102,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2410,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1790,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2595,
+        INVALID_HASH_ENTRY,
+        1701,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2196,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1065,
+        1733,
+        424,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1101,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2013,
+        2441,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        59,
+        431,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2031,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1662,
+        INVALID_HASH_ENTRY,
+        133,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1718,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        196,
+        1357,
+        507,
+        INVALID_HASH_ENTRY,
+        2521,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2088,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2558,
+        712,
+        2102,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1300,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        -1055,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2359,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        153,
+        270,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        534,
+        440,
+        INVALID_HASH_ENTRY,
+        2060,
+        76,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        102,
+        2110,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2077,
+        INVALID_HASH_ENTRY,
+        1911,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1327,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1815,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        790,
+        1043,
+        INVALID_HASH_ENTRY,
+        603,
+        2029,
+        INVALID_HASH_ENTRY,
+        2527,
+        1695,
+        2423,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -187,
+        INVALID_HASH_ENTRY,
+        1342,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1655,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2351,
+        1560,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1659,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        225,
+        INVALID_HASH_ENTRY,
+        425,
+        INVALID_HASH_ENTRY,
+        248,
+        1768,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2440,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2156,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        760,
+        INVALID_HASH_ENTRY,
+        355,
+        1393,
+        1913,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        224,
+        -191,
+        INVALID_HASH_ENTRY,
+        2314,
+        2027,
+        492,
+        221,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        512,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2019,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1714,
+        2389,
+        1374,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        671,
+        INVALID_HASH_ENTRY,
+        -1662,
+        INVALID_HASH_ENTRY,
+        1418,
+        INVALID_HASH_ENTRY,
+        1011,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        911,
+        1895,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1052,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1240,
+        1970,
+        885,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2513,
+        INVALID_HASH_ENTRY,
+        2458,
+        1986,
+        1305,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        139,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1480,
+        947,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1035,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        47,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2459,
+        INVALID_HASH_ENTRY,
+        2453,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        977,
+        -686,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1302,
+        INVALID_HASH_ENTRY,
+        1686,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1320,
+        578,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        683,
+        1951,
+        1872,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        437,
+        INVALID_HASH_ENTRY,
+        1001,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        456,
+        INVALID_HASH_ENTRY,
+        -1946,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        974,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        899,
+        INVALID_HASH_ENTRY,
+        2196,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1632,
+        INVALID_HASH_ENTRY,
+        1964,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        540,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -617,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2571,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1399,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        450,
+        44,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1083,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        106,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1074,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -387,
+        INVALID_HASH_ENTRY,
+        1264,
+        2119,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -381,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2114,
+        2306,
+        INVALID_HASH_ENTRY,
+        1971,
+        INVALID_HASH_ENTRY,
+        2490,
+        INVALID_HASH_ENTRY,
+        -42,
+        1351,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2464,
+        1098,
+        INVALID_HASH_ENTRY,
+        1420,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        344,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        672,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2565,
+        1752,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        736,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -223,
+        1562,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1148,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        218,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        615,
+        1981,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        15,
+        609,
+        61,
+        120,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1168,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1117,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1360,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        143,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        593,
+        1725,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2089,
+        1113,
+        195,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1565,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        447,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1628,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1208,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        136,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -91,
+        1587,
+        1754,
+        1251,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1958,
+        2151,
+        0,
+        264,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2076,
+        1125,
+        INVALID_HASH_ENTRY,
+        -263,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        500,
+        -95,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2561,
+        INVALID_HASH_ENTRY,
+        2451,
+        1451,
+        2395,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1401,
+        1891,
+        INVALID_HASH_ENTRY,
+        345,
+        -632,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1175,
+        INVALID_HASH_ENTRY,
+        527,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2094,
+        1419,
+        2066,
+        965,
+        695,
+        INVALID_HASH_ENTRY,
+        1566,
+        834,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        326,
+        2067,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        407,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1262,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        931,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        345,
+        INVALID_HASH_ENTRY,
+        1241,
+        560,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        347,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        95,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        547,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1410,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        993,
+        INVALID_HASH_ENTRY,
+        1482,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        983,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1934,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2499,
+        -970,
+        348,
+        INVALID_HASH_ENTRY,
+        1739,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        716,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        328,
+        1301,
+        16,
+        1687,
+        INVALID_HASH_ENTRY,
+        551,
+        2025,
+        INVALID_HASH_ENTRY,
+        1372,
+        -716,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1046,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        604,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2454,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1006,
+        351,
+        2276,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        552,
+        INVALID_HASH_ENTRY,
+        1460,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1312,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        636,
+        INVALID_HASH_ENTRY,
+        1675,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1194,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        468,
+        285,
+        INVALID_HASH_ENTRY,
+        616,
+        INVALID_HASH_ENTRY,
+        2107,
+        INVALID_HASH_ENTRY,
+        1200,
+        INVALID_HASH_ENTRY,
+        0,
+        140,
+        1215,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        503,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        -1575,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        148,
+        INVALID_HASH_ENTRY,
+        721,
+        784,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1991,
+        1103,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1658,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        598,
+        INVALID_HASH_ENTRY,
+        269,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1914,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2230,
+        INVALID_HASH_ENTRY,
+        212,
+        210,
+        1310,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1426,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1187,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2081,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        267,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2603,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1923,
+        70,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1929,
+        INVALID_HASH_ENTRY,
+        434,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        544,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1683,
+        2570,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2231,
+        -563,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2466,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1699,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2124,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1626,
+        1362,
+        903,
+        INVALID_HASH_ENTRY,
+        2011,
+        INVALID_HASH_ENTRY,
+        271,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1252,
+        117,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1643,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1927,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        258,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        108,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1551,
+        1020,
+        1907,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1636,
+        INVALID_HASH_ENTRY,
+        1204,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1953,
+        INVALID_HASH_ENTRY,
+        2206,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        591,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1860,
+        190,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        479,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        78,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        48,
+        378,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        85,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1453,
+        978,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        39,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2237,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2200,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1889,
+        INVALID_HASH_ENTRY,
+        1397,
+        INVALID_HASH_ENTRY,
+        182,
+        -171,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2475,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        169,
+        INVALID_HASH_ENTRY,
+        1303,
+        1593,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1181,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2133,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2155,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        31,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        1901,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+    };
+    static const struct tokendata tokendata2605 = {
+        { "db", 2, TOKEN_INSN, 0, 0, I_DB },
+        { "dw", 2, TOKEN_INSN, 0, 0, I_DW },
+        { "dd", 2, TOKEN_INSN, 0, 0, I_DD },
+        { "dq", 2, TOKEN_INSN, 0, 0, I_DQ },
+        { "dt", 2, TOKEN_INSN, 0, 0, I_DT },
+        { "do", 2, TOKEN_INSN, 0, 0, I_DO },
+        { "dy", 2, TOKEN_INSN, 0, 0, I_DY },
+        { "dz", 2, TOKEN_INSN, 0, 0, I_DZ },
+        { "resb", 4, TOKEN_INSN, 0, 0, I_RESB },
+        { "resw", 4, TOKEN_INSN, 0, 0, I_RESW },
+        { "resd", 4, TOKEN_INSN, 0, 0, I_RESD },
+        { "resq", 4, TOKEN_INSN, 0, 0, I_RESQ },
+        { "rest", 4, TOKEN_INSN, 0, 0, I_REST },
+        { "reso", 4, TOKEN_INSN, 0, 0, I_RESO },
+        { "resy", 4, TOKEN_INSN, 0, 0, I_RESY },
+        { "resz", 4, TOKEN_INSN, 0, 0, I_RESZ },
+        { "incbin", 6, TOKEN_INSN, 0, 0, I_INCBIN },
+        { "aaa", 3, TOKEN_INSN, 0, 0, I_AAA },
+        { "aad", 3, TOKEN_INSN, 0, 0, I_AAD },
+        { "aam", 3, TOKEN_INSN, 0, 0, I_AAM },
+        { "aas", 3, TOKEN_INSN, 0, 0, I_AAS },
+        { "adc", 3, TOKEN_INSN, 0, 0, I_ADC },
+        { "add", 3, TOKEN_INSN, 0, 0, I_ADD },
+        { "and", 3, TOKEN_INSN, 0, 0, I_AND },
+        { "arpl", 4, TOKEN_INSN, 0, 0, I_ARPL },
+        { "bb0_reset", 9, TOKEN_INSN, 0, 0, I_BB0_RESET },
+        { "bb1_reset", 9, TOKEN_INSN, 0, 0, I_BB1_RESET },
+        { "bound", 5, TOKEN_INSN, 0, 0, I_BOUND },
+        { "bsf", 3, TOKEN_INSN, 0, 0, I_BSF },
+        { "bsr", 3, TOKEN_INSN, 0, 0, I_BSR },
+        { "bswap", 5, TOKEN_INSN, 0, 0, I_BSWAP },
+        { "bt", 2, TOKEN_INSN, 0, 0, I_BT },
+        { "btc", 3, TOKEN_INSN, 0, 0, I_BTC },
+        { "btr", 3, TOKEN_INSN, 0, 0, I_BTR },
+        { "bts", 3, TOKEN_INSN, 0, 0, I_BTS },
+        { "call", 4, TOKEN_INSN, 0, 0, I_CALL },
+        { "cbw", 3, TOKEN_INSN, 0, 0, I_CBW },
+        { "cdq", 3, TOKEN_INSN, 0, 0, I_CDQ },
+        { "cdqe", 4, TOKEN_INSN, 0, 0, I_CDQE },
+        { "clc", 3, TOKEN_INSN, 0, 0, I_CLC },
+        { "cld", 3, TOKEN_INSN, 0, 0, I_CLD },
+        { "cli", 3, TOKEN_INSN, 0, 0, I_CLI },
+        { "clts", 4, TOKEN_INSN, 0, 0, I_CLTS },
+        { "cmc", 3, TOKEN_INSN, 0, 0, I_CMC },
+        { "cmp", 3, TOKEN_INSN, 0, 0, I_CMP },
+        { "cmpsb", 5, TOKEN_INSN, 0, 0, I_CMPSB },
+        { "cmpsd", 5, TOKEN_INSN, 0, 0, I_CMPSD },
+        { "cmpsq", 5, TOKEN_INSN, 0, 0, I_CMPSQ },
+        { "cmpsw", 5, TOKEN_INSN, 0, 0, I_CMPSW },
+        { "cmpxchg", 7, TOKEN_INSN, 0, 0, I_CMPXCHG },
+        { "cmpxchg486", 10, TOKEN_INSN, 0, 0, I_CMPXCHG486 },
+        { "cmpxchg8b", 9, TOKEN_INSN, 0, 0, I_CMPXCHG8B },
+        { "cmpxchg16b", 10, TOKEN_INSN, 0, 0, I_CMPXCHG16B },
+        { "cpuid", 5, TOKEN_INSN, 0, 0, I_CPUID },
+        { "cpu_read", 8, TOKEN_INSN, 0, 0, I_CPU_READ },
+        { "cpu_write", 9, TOKEN_INSN, 0, 0, I_CPU_WRITE },
+        { "cqo", 3, TOKEN_INSN, 0, 0, I_CQO },
+        { "cwd", 3, TOKEN_INSN, 0, 0, I_CWD },
+        { "cwde", 4, TOKEN_INSN, 0, 0, I_CWDE },
+        { "daa", 3, TOKEN_INSN, 0, 0, I_DAA },
+        { "das", 3, TOKEN_INSN, 0, 0, I_DAS },
+        { "dec", 3, TOKEN_INSN, 0, 0, I_DEC },
+        { "div", 3, TOKEN_INSN, 0, 0, I_DIV },
+        { "dmint", 5, TOKEN_INSN, 0, 0, I_DMINT },
+        { "emms", 4, TOKEN_INSN, 0, 0, I_EMMS },
+        { "enter", 5, TOKEN_INSN, 0, 0, I_ENTER },
+        { "equ", 3, TOKEN_INSN, 0, 0, I_EQU },
+        { "f2xm1", 5, TOKEN_INSN, 0, 0, I_F2XM1 },
+        { "fabs", 4, TOKEN_INSN, 0, 0, I_FABS },
+        { "fadd", 4, TOKEN_INSN, 0, 0, I_FADD },
+        { "faddp", 5, TOKEN_INSN, 0, 0, I_FADDP },
+        { "fbld", 4, TOKEN_INSN, 0, 0, I_FBLD },
+        { "fbstp", 5, TOKEN_INSN, 0, 0, I_FBSTP },
+        { "fchs", 4, TOKEN_INSN, 0, 0, I_FCHS },
+        { "fclex", 5, TOKEN_INSN, 0, 0, I_FCLEX },
+        { "fcmovb", 6, TOKEN_INSN, 0, 0, I_FCMOVB },
+        { "fcmovbe", 7, TOKEN_INSN, 0, 0, I_FCMOVBE },
+        { "fcmove", 6, TOKEN_INSN, 0, 0, I_FCMOVE },
+        { "fcmovnb", 7, TOKEN_INSN, 0, 0, I_FCMOVNB },
+        { "fcmovnbe", 8, TOKEN_INSN, 0, 0, I_FCMOVNBE },
+        { "fcmovne", 7, TOKEN_INSN, 0, 0, I_FCMOVNE },
+        { "fcmovnu", 7, TOKEN_INSN, 0, 0, I_FCMOVNU },
+        { "fcmovu", 6, TOKEN_INSN, 0, 0, I_FCMOVU },
+        { "fcom", 4, TOKEN_INSN, 0, 0, I_FCOM },
+        { "fcomi", 5, TOKEN_INSN, 0, 0, I_FCOMI },
+        { "fcomip", 6, TOKEN_INSN, 0, 0, I_FCOMIP },
+        { "fcomp", 5, TOKEN_INSN, 0, 0, I_FCOMP },
+        { "fcompp", 6, TOKEN_INSN, 0, 0, I_FCOMPP },
+        { "fcos", 4, TOKEN_INSN, 0, 0, I_FCOS },
+        { "fdecstp", 7, TOKEN_INSN, 0, 0, I_FDECSTP },
+        { "fdisi", 5, TOKEN_INSN, 0, 0, I_FDISI },
+        { "fdiv", 4, TOKEN_INSN, 0, 0, I_FDIV },
+        { "fdivp", 5, TOKEN_INSN, 0, 0, I_FDIVP },
+        { "fdivr", 5, TOKEN_INSN, 0, 0, I_FDIVR },
+        { "fdivrp", 6, TOKEN_INSN, 0, 0, I_FDIVRP },
+        { "femms", 5, TOKEN_INSN, 0, 0, I_FEMMS },
+        { "feni", 4, TOKEN_INSN, 0, 0, I_FENI },
+        { "ffree", 5, TOKEN_INSN, 0, 0, I_FFREE },
+        { "ffreep", 6, TOKEN_INSN, 0, 0, I_FFREEP },
+        { "fiadd", 5, TOKEN_INSN, 0, 0, I_FIADD },
+        { "ficom", 5, TOKEN_INSN, 0, 0, I_FICOM },
+        { "ficomp", 6, TOKEN_INSN, 0, 0, I_FICOMP },
+        { "fidiv", 5, TOKEN_INSN, 0, 0, I_FIDIV },
+        { "fidivr", 6, TOKEN_INSN, 0, 0, I_FIDIVR },
+        { "fild", 4, TOKEN_INSN, 0, 0, I_FILD },
+        { "fimul", 5, TOKEN_INSN, 0, 0, I_FIMUL },
+        { "fincstp", 7, TOKEN_INSN, 0, 0, I_FINCSTP },
+        { "finit", 5, TOKEN_INSN, 0, 0, I_FINIT },
+        { "fist", 4, TOKEN_INSN, 0, 0, I_FIST },
+        { "fistp", 5, TOKEN_INSN, 0, 0, I_FISTP },
+        { "fisttp", 6, TOKEN_INSN, 0, 0, I_FISTTP },
+        { "fisub", 5, TOKEN_INSN, 0, 0, I_FISUB },
+        { "fisubr", 6, TOKEN_INSN, 0, 0, I_FISUBR },
+        { "fld", 3, TOKEN_INSN, 0, 0, I_FLD },
+        { "fld1", 4, TOKEN_INSN, 0, 0, I_FLD1 },
+        { "fldcw", 5, TOKEN_INSN, 0, 0, I_FLDCW },
+        { "fldenv", 6, TOKEN_INSN, 0, 0, I_FLDENV },
+        { "fldl2e", 6, TOKEN_INSN, 0, 0, I_FLDL2E },
+        { "fldl2t", 6, TOKEN_INSN, 0, 0, I_FLDL2T },
+        { "fldlg2", 6, TOKEN_INSN, 0, 0, I_FLDLG2 },
+        { "fldln2", 6, TOKEN_INSN, 0, 0, I_FLDLN2 },
+        { "fldpi", 5, TOKEN_INSN, 0, 0, I_FLDPI },
+        { "fldz", 4, TOKEN_INSN, 0, 0, I_FLDZ },
+        { "fmul", 4, TOKEN_INSN, 0, 0, I_FMUL },
+        { "fmulp", 5, TOKEN_INSN, 0, 0, I_FMULP },
+        { "fnclex", 6, TOKEN_INSN, 0, 0, I_FNCLEX },
+        { "fndisi", 6, TOKEN_INSN, 0, 0, I_FNDISI },
+        { "fneni", 5, TOKEN_INSN, 0, 0, I_FNENI },
+        { "fninit", 6, TOKEN_INSN, 0, 0, I_FNINIT },
+        { "fnop", 4, TOKEN_INSN, 0, 0, I_FNOP },
+        { "fnsave", 6, TOKEN_INSN, 0, 0, I_FNSAVE },
+        { "fnstcw", 6, TOKEN_INSN, 0, 0, I_FNSTCW },
+        { "fnstenv", 7, TOKEN_INSN, 0, 0, I_FNSTENV },
+        { "fnstsw", 6, TOKEN_INSN, 0, 0, I_FNSTSW },
+        { "fpatan", 6, TOKEN_INSN, 0, 0, I_FPATAN },
+        { "fprem", 5, TOKEN_INSN, 0, 0, I_FPREM },
+        { "fprem1", 6, TOKEN_INSN, 0, 0, I_FPREM1 },
+        { "fptan", 5, TOKEN_INSN, 0, 0, I_FPTAN },
+        { "frndint", 7, TOKEN_INSN, 0, 0, I_FRNDINT },
+        { "frstor", 6, TOKEN_INSN, 0, 0, I_FRSTOR },
+        { "fsave", 5, TOKEN_INSN, 0, 0, I_FSAVE },
+        { "fscale", 6, TOKEN_INSN, 0, 0, I_FSCALE },
+        { "fsetpm", 6, TOKEN_INSN, 0, 0, I_FSETPM },
+        { "fsin", 4, TOKEN_INSN, 0, 0, I_FSIN },
+        { "fsincos", 7, TOKEN_INSN, 0, 0, I_FSINCOS },
+        { "fsqrt", 5, TOKEN_INSN, 0, 0, I_FSQRT },
+        { "fst", 3, TOKEN_INSN, 0, 0, I_FST },
+        { "fstcw", 5, TOKEN_INSN, 0, 0, I_FSTCW },
+        { "fstenv", 6, TOKEN_INSN, 0, 0, I_FSTENV },
+        { "fstp", 4, TOKEN_INSN, 0, 0, I_FSTP },
+        { "fstsw", 5, TOKEN_INSN, 0, 0, I_FSTSW },
+        { "fsub", 4, TOKEN_INSN, 0, 0, I_FSUB },
+        { "fsubp", 5, TOKEN_INSN, 0, 0, I_FSUBP },
+        { "fsubr", 5, TOKEN_INSN, 0, 0, I_FSUBR },
+        { "fsubrp", 6, TOKEN_INSN, 0, 0, I_FSUBRP },
+        { "ftst", 4, TOKEN_INSN, 0, 0, I_FTST },
+        { "fucom", 5, TOKEN_INSN, 0, 0, I_FUCOM },
+        { "fucomi", 6, TOKEN_INSN, 0, 0, I_FUCOMI },
+        { "fucomip", 7, TOKEN_INSN, 0, 0, I_FUCOMIP },
+        { "fucomp", 6, TOKEN_INSN, 0, 0, I_FUCOMP },
+        { "fucompp", 7, TOKEN_INSN, 0, 0, I_FUCOMPP },
+        { "fxam", 4, TOKEN_INSN, 0, 0, I_FXAM },
+        { "fxch", 4, TOKEN_INSN, 0, 0, I_FXCH },
+        { "fxtract", 7, TOKEN_INSN, 0, 0, I_FXTRACT },
+        { "fyl2x", 5, TOKEN_INSN, 0, 0, I_FYL2X },
+        { "fyl2xp1", 7, TOKEN_INSN, 0, 0, I_FYL2XP1 },
+        { "hlt", 3, TOKEN_INSN, 0, 0, I_HLT },
+        { "ibts", 4, TOKEN_INSN, 0, 0, I_IBTS },
+        { "icebp", 5, TOKEN_INSN, 0, 0, I_ICEBP },
+        { "idiv", 4, TOKEN_INSN, 0, 0, I_IDIV },
+        { "imul", 4, TOKEN_INSN, 0, 0, I_IMUL },
+        { "in", 2, TOKEN_INSN, 0, 0, I_IN },
+        { "inc", 3, TOKEN_INSN, 0, 0, I_INC },
+        { "insb", 4, TOKEN_INSN, 0, 0, I_INSB },
+        { "insd", 4, TOKEN_INSN, 0, 0, I_INSD },
+        { "insw", 4, TOKEN_INSN, 0, 0, I_INSW },
+        { "int", 3, TOKEN_INSN, 0, 0, I_INT },
+        { "int01", 5, TOKEN_INSN, 0, 0, I_INT01 },
+        { "int1", 4, TOKEN_INSN, 0, 0, I_INT1 },
+        { "int03", 5, TOKEN_INSN, 0, 0, I_INT03 },
+        { "int3", 4, TOKEN_INSN, 0, 0, I_INT3 },
+        { "into", 4, TOKEN_INSN, 0, 0, I_INTO },
+        { "invd", 4, TOKEN_INSN, 0, 0, I_INVD },
+        { "invpcid", 7, TOKEN_INSN, 0, 0, I_INVPCID },
+        { "invlpg", 6, TOKEN_INSN, 0, 0, I_INVLPG },
+        { "invlpga", 7, TOKEN_INSN, 0, 0, I_INVLPGA },
+        { "iret", 4, TOKEN_INSN, 0, 0, I_IRET },
+        { "iretd", 5, TOKEN_INSN, 0, 0, I_IRETD },
+        { "iretq", 5, TOKEN_INSN, 0, 0, I_IRETQ },
+        { "iretw", 5, TOKEN_INSN, 0, 0, I_IRETW },
+        { "jcxz", 4, TOKEN_INSN, 0, 0, I_JCXZ },
+        { "jecxz", 5, TOKEN_INSN, 0, 0, I_JECXZ },
+        { "jrcxz", 5, TOKEN_INSN, 0, 0, I_JRCXZ },
+        { "jmp", 3, TOKEN_INSN, 0, 0, I_JMP },
+        { "jmpe", 4, TOKEN_INSN, 0, 0, I_JMPE },
+        { "lahf", 4, TOKEN_INSN, 0, 0, I_LAHF },
+        { "lar", 3, TOKEN_INSN, 0, 0, I_LAR },
+        { "lds", 3, TOKEN_INSN, 0, 0, I_LDS },
+        { "lea", 3, TOKEN_INSN, 0, 0, I_LEA },
+        { "leave", 5, TOKEN_INSN, 0, 0, I_LEAVE },
+        { "les", 3, TOKEN_INSN, 0, 0, I_LES },
+        { "lfence", 6, TOKEN_INSN, 0, 0, I_LFENCE },
+        { "lfs", 3, TOKEN_INSN, 0, 0, I_LFS },
+        { "lgdt", 4, TOKEN_INSN, 0, 0, I_LGDT },
+        { "lgs", 3, TOKEN_INSN, 0, 0, I_LGS },
+        { "lidt", 4, TOKEN_INSN, 0, 0, I_LIDT },
+        { "lldt", 4, TOKEN_INSN, 0, 0, I_LLDT },
+        { "lmsw", 4, TOKEN_INSN, 0, 0, I_LMSW },
+        { "loadall", 7, TOKEN_INSN, 0, 0, I_LOADALL },
+        { "loadall286", 10, TOKEN_INSN, 0, 0, I_LOADALL286 },
+        { "lodsb", 5, TOKEN_INSN, 0, 0, I_LODSB },
+        { "lodsd", 5, TOKEN_INSN, 0, 0, I_LODSD },
+        { "lodsq", 5, TOKEN_INSN, 0, 0, I_LODSQ },
+        { "lodsw", 5, TOKEN_INSN, 0, 0, I_LODSW },
+        { "loop", 4, TOKEN_INSN, 0, 0, I_LOOP },
+        { "loope", 5, TOKEN_INSN, 0, 0, I_LOOPE },
+        { "loopne", 6, TOKEN_INSN, 0, 0, I_LOOPNE },
+        { "loopnz", 6, TOKEN_INSN, 0, 0, I_LOOPNZ },
+        { "loopz", 5, TOKEN_INSN, 0, 0, I_LOOPZ },
+        { "lsl", 3, TOKEN_INSN, 0, 0, I_LSL },
+        { "lss", 3, TOKEN_INSN, 0, 0, I_LSS },
+        { "ltr", 3, TOKEN_INSN, 0, 0, I_LTR },
+        { "mfence", 6, TOKEN_INSN, 0, 0, I_MFENCE },
+        { "monitor", 7, TOKEN_INSN, 0, 0, I_MONITOR },
+        { "monitorx", 8, TOKEN_INSN, 0, 0, I_MONITORX },
+        { "mov", 3, TOKEN_INSN, 0, 0, I_MOV },
+        { "movd", 4, TOKEN_INSN, 0, 0, I_MOVD },
+        { "movq", 4, TOKEN_INSN, 0, 0, I_MOVQ },
+        { "movsb", 5, TOKEN_INSN, 0, 0, I_MOVSB },
+        { "movsd", 5, TOKEN_INSN, 0, 0, I_MOVSD },
+        { "movsq", 5, TOKEN_INSN, 0, 0, I_MOVSQ },
+        { "movsw", 5, TOKEN_INSN, 0, 0, I_MOVSW },
+        { "movsx", 5, TOKEN_INSN, 0, 0, I_MOVSX },
+        { "movsxd", 6, TOKEN_INSN, 0, 0, I_MOVSXD },
+        { "movzx", 5, TOKEN_INSN, 0, 0, I_MOVZX },
+        { "mul", 3, TOKEN_INSN, 0, 0, I_MUL },
+        { "mwait", 5, TOKEN_INSN, 0, 0, I_MWAIT },
+        { "mwaitx", 6, TOKEN_INSN, 0, 0, I_MWAITX },
+        { "neg", 3, TOKEN_INSN, 0, 0, I_NEG },
+        { "nop", 3, TOKEN_INSN, 0, 0, I_NOP },
+        { "not", 3, TOKEN_INSN, 0, 0, I_NOT },
+        { "or", 2, TOKEN_INSN, 0, 0, I_OR },
+        { "out", 3, TOKEN_INSN, 0, 0, I_OUT },
+        { "outsb", 5, TOKEN_INSN, 0, 0, I_OUTSB },
+        { "outsd", 5, TOKEN_INSN, 0, 0, I_OUTSD },
+        { "outsw", 5, TOKEN_INSN, 0, 0, I_OUTSW },
+        { "packssdw", 8, TOKEN_INSN, 0, 0, I_PACKSSDW },
+        { "packsswb", 8, TOKEN_INSN, 0, 0, I_PACKSSWB },
+        { "packuswb", 8, TOKEN_INSN, 0, 0, I_PACKUSWB },
+        { "paddb", 5, TOKEN_INSN, 0, 0, I_PADDB },
+        { "paddd", 5, TOKEN_INSN, 0, 0, I_PADDD },
+        { "paddsb", 6, TOKEN_INSN, 0, 0, I_PADDSB },
+        { "paddsiw", 7, TOKEN_INSN, 0, 0, I_PADDSIW },
+        { "paddsw", 6, TOKEN_INSN, 0, 0, I_PADDSW },
+        { "paddusb", 7, TOKEN_INSN, 0, 0, I_PADDUSB },
+        { "paddusw", 7, TOKEN_INSN, 0, 0, I_PADDUSW },
+        { "paddw", 5, TOKEN_INSN, 0, 0, I_PADDW },
+        { "pand", 4, TOKEN_INSN, 0, 0, I_PAND },
+        { "pandn", 5, TOKEN_INSN, 0, 0, I_PANDN },
+        { "pause", 5, TOKEN_INSN, 0, 0, I_PAUSE },
+        { "paveb", 5, TOKEN_INSN, 0, 0, I_PAVEB },
+        { "pavgusb", 7, TOKEN_INSN, 0, 0, I_PAVGUSB },
+        { "pcmpeqb", 7, TOKEN_INSN, 0, 0, I_PCMPEQB },
+        { "pcmpeqd", 7, TOKEN_INSN, 0, 0, I_PCMPEQD },
+        { "pcmpeqw", 7, TOKEN_INSN, 0, 0, I_PCMPEQW },
+        { "pcmpgtb", 7, TOKEN_INSN, 0, 0, I_PCMPGTB },
+        { "pcmpgtd", 7, TOKEN_INSN, 0, 0, I_PCMPGTD },
+        { "pcmpgtw", 7, TOKEN_INSN, 0, 0, I_PCMPGTW },
+        { "pdistib", 7, TOKEN_INSN, 0, 0, I_PDISTIB },
+        { "pf2id", 5, TOKEN_INSN, 0, 0, I_PF2ID },
+        { "pfacc", 5, TOKEN_INSN, 0, 0, I_PFACC },
+        { "pfadd", 5, TOKEN_INSN, 0, 0, I_PFADD },
+        { "pfcmpeq", 7, TOKEN_INSN, 0, 0, I_PFCMPEQ },
+        { "pfcmpge", 7, TOKEN_INSN, 0, 0, I_PFCMPGE },
+        { "pfcmpgt", 7, TOKEN_INSN, 0, 0, I_PFCMPGT },
+        { "pfmax", 5, TOKEN_INSN, 0, 0, I_PFMAX },
+        { "pfmin", 5, TOKEN_INSN, 0, 0, I_PFMIN },
+        { "pfmul", 5, TOKEN_INSN, 0, 0, I_PFMUL },
+        { "pfrcp", 5, TOKEN_INSN, 0, 0, I_PFRCP },
+        { "pfrcpit1", 8, TOKEN_INSN, 0, 0, I_PFRCPIT1 },
+        { "pfrcpit2", 8, TOKEN_INSN, 0, 0, I_PFRCPIT2 },
+        { "pfrsqit1", 8, TOKEN_INSN, 0, 0, I_PFRSQIT1 },
+        { "pfrsqrt", 7, TOKEN_INSN, 0, 0, I_PFRSQRT },
+        { "pfsub", 5, TOKEN_INSN, 0, 0, I_PFSUB },
+        { "pfsubr", 6, TOKEN_INSN, 0, 0, I_PFSUBR },
+        { "pi2fd", 5, TOKEN_INSN, 0, 0, I_PI2FD },
+        { "pmachriw", 8, TOKEN_INSN, 0, 0, I_PMACHRIW },
+        { "pmaddwd", 7, TOKEN_INSN, 0, 0, I_PMADDWD },
+        { "pmagw", 5, TOKEN_INSN, 0, 0, I_PMAGW },
+        { "pmulhriw", 8, TOKEN_INSN, 0, 0, I_PMULHRIW },
+        { "pmulhrwa", 8, TOKEN_INSN, 0, 0, I_PMULHRWA },
+        { "pmulhrwc", 8, TOKEN_INSN, 0, 0, I_PMULHRWC },
+        { "pmulhw", 6, TOKEN_INSN, 0, 0, I_PMULHW },
+        { "pmullw", 6, TOKEN_INSN, 0, 0, I_PMULLW },
+        { "pmvgezb", 7, TOKEN_INSN, 0, 0, I_PMVGEZB },
+        { "pmvlzb", 6, TOKEN_INSN, 0, 0, I_PMVLZB },
+        { "pmvnzb", 6, TOKEN_INSN, 0, 0, I_PMVNZB },
+        { "pmvzb", 5, TOKEN_INSN, 0, 0, I_PMVZB },
+        { "pop", 3, TOKEN_INSN, 0, 0, I_POP },
+        { "popa", 4, TOKEN_INSN, 0, 0, I_POPA },
+        { "popad", 5, TOKEN_INSN, 0, 0, I_POPAD },
+        { "popaw", 5, TOKEN_INSN, 0, 0, I_POPAW },
+        { "popf", 4, TOKEN_INSN, 0, 0, I_POPF },
+        { "popfd", 5, TOKEN_INSN, 0, 0, I_POPFD },
+        { "popfq", 5, TOKEN_INSN, 0, 0, I_POPFQ },
+        { "popfw", 5, TOKEN_INSN, 0, 0, I_POPFW },
+        { "por", 3, TOKEN_INSN, 0, 0, I_POR },
+        { "prefetch", 8, TOKEN_INSN, 0, 0, I_PREFETCH },
+        { "prefetchw", 9, TOKEN_INSN, 0, 0, I_PREFETCHW },
+        { "pslld", 5, TOKEN_INSN, 0, 0, I_PSLLD },
+        { "psllq", 5, TOKEN_INSN, 0, 0, I_PSLLQ },
+        { "psllw", 5, TOKEN_INSN, 0, 0, I_PSLLW },
+        { "psrad", 5, TOKEN_INSN, 0, 0, I_PSRAD },
+        { "psraw", 5, TOKEN_INSN, 0, 0, I_PSRAW },
+        { "psrld", 5, TOKEN_INSN, 0, 0, I_PSRLD },
+        { "psrlq", 5, TOKEN_INSN, 0, 0, I_PSRLQ },
+        { "psrlw", 5, TOKEN_INSN, 0, 0, I_PSRLW },
+        { "psubb", 5, TOKEN_INSN, 0, 0, I_PSUBB },
+        { "psubd", 5, TOKEN_INSN, 0, 0, I_PSUBD },
+        { "psubsb", 6, TOKEN_INSN, 0, 0, I_PSUBSB },
+        { "psubsiw", 7, TOKEN_INSN, 0, 0, I_PSUBSIW },
+        { "psubsw", 6, TOKEN_INSN, 0, 0, I_PSUBSW },
+        { "psubusb", 7, TOKEN_INSN, 0, 0, I_PSUBUSB },
+        { "psubusw", 7, TOKEN_INSN, 0, 0, I_PSUBUSW },
+        { "psubw", 5, TOKEN_INSN, 0, 0, I_PSUBW },
+        { "punpckhbw", 9, TOKEN_INSN, 0, 0, I_PUNPCKHBW },
+        { "punpckhdq", 9, TOKEN_INSN, 0, 0, I_PUNPCKHDQ },
+        { "punpckhwd", 9, TOKEN_INSN, 0, 0, I_PUNPCKHWD },
+        { "punpcklbw", 9, TOKEN_INSN, 0, 0, I_PUNPCKLBW },
+        { "punpckldq", 9, TOKEN_INSN, 0, 0, I_PUNPCKLDQ },
+        { "punpcklwd", 9, TOKEN_INSN, 0, 0, I_PUNPCKLWD },
+        { "push", 4, TOKEN_INSN, 0, 0, I_PUSH },
+        { "pusha", 5, TOKEN_INSN, 0, 0, I_PUSHA },
+        { "pushad", 6, TOKEN_INSN, 0, 0, I_PUSHAD },
+        { "pushaw", 6, TOKEN_INSN, 0, 0, I_PUSHAW },
+        { "pushf", 5, TOKEN_INSN, 0, 0, I_PUSHF },
+        { "pushfd", 6, TOKEN_INSN, 0, 0, I_PUSHFD },
+        { "pushfq", 6, TOKEN_INSN, 0, 0, I_PUSHFQ },
+        { "pushfw", 6, TOKEN_INSN, 0, 0, I_PUSHFW },
+        { "pxor", 4, TOKEN_INSN, 0, 0, I_PXOR },
+        { "rcl", 3, TOKEN_INSN, 0, 0, I_RCL },
+        { "rcr", 3, TOKEN_INSN, 0, 0, I_RCR },
+        { "rdshr", 5, TOKEN_INSN, 0, 0, I_RDSHR },
+        { "rdmsr", 5, TOKEN_INSN, 0, 0, I_RDMSR },
+        { "rdpmc", 5, TOKEN_INSN, 0, 0, I_RDPMC },
+        { "rdtsc", 5, TOKEN_INSN, 0, 0, I_RDTSC },
+        { "rdtscp", 6, TOKEN_INSN, 0, 0, I_RDTSCP },
+        { "ret", 3, TOKEN_INSN, 0, 0, I_RET },
+        { "retf", 4, TOKEN_INSN, 0, 0, I_RETF },
+        { "retn", 4, TOKEN_INSN, 0, 0, I_RETN },
+        { "retw", 4, TOKEN_INSN, 0, 0, I_RETW },
+        { "retfw", 5, TOKEN_INSN, 0, 0, I_RETFW },
+        { "retnw", 5, TOKEN_INSN, 0, 0, I_RETNW },
+        { "retd", 4, TOKEN_INSN, 0, 0, I_RETD },
+        { "retfd", 5, TOKEN_INSN, 0, 0, I_RETFD },
+        { "retnd", 5, TOKEN_INSN, 0, 0, I_RETND },
+        { "retq", 4, TOKEN_INSN, 0, 0, I_RETQ },
+        { "retfq", 5, TOKEN_INSN, 0, 0, I_RETFQ },
+        { "retnq", 5, TOKEN_INSN, 0, 0, I_RETNQ },
+        { "rol", 3, TOKEN_INSN, 0, 0, I_ROL },
+        { "ror", 3, TOKEN_INSN, 0, 0, I_ROR },
+        { "rdm", 3, TOKEN_INSN, 0, 0, I_RDM },
+        { "rsdc", 4, TOKEN_INSN, 0, 0, I_RSDC },
+        { "rsldt", 5, TOKEN_INSN, 0, 0, I_RSLDT },
+        { "rsm", 3, TOKEN_INSN, 0, 0, I_RSM },
+        { "rsts", 4, TOKEN_INSN, 0, 0, I_RSTS },
+        { "sahf", 4, TOKEN_INSN, 0, 0, I_SAHF },
+        { "sal", 3, TOKEN_INSN, 0, 0, I_SAL },
+        { "salc", 4, TOKEN_INSN, 0, 0, I_SALC },
+        { "sar", 3, TOKEN_INSN, 0, 0, I_SAR },
+        { "sbb", 3, TOKEN_INSN, 0, 0, I_SBB },
+        { "scasb", 5, TOKEN_INSN, 0, 0, I_SCASB },
+        { "scasd", 5, TOKEN_INSN, 0, 0, I_SCASD },
+        { "scasq", 5, TOKEN_INSN, 0, 0, I_SCASQ },
+        { "scasw", 5, TOKEN_INSN, 0, 0, I_SCASW },
+        { "sfence", 6, TOKEN_INSN, 0, 0, I_SFENCE },
+        { "sgdt", 4, TOKEN_INSN, 0, 0, I_SGDT },
+        { "shl", 3, TOKEN_INSN, 0, 0, I_SHL },
+        { "shld", 4, TOKEN_INSN, 0, 0, I_SHLD },
+        { "shr", 3, TOKEN_INSN, 0, 0, I_SHR },
+        { "shrd", 4, TOKEN_INSN, 0, 0, I_SHRD },
+        { "sidt", 4, TOKEN_INSN, 0, 0, I_SIDT },
+        { "sldt", 4, TOKEN_INSN, 0, 0, I_SLDT },
+        { "skinit", 6, TOKEN_INSN, 0, 0, I_SKINIT },
+        { "smi", 3, TOKEN_INSN, 0, 0, I_SMI },
+        { "smint", 5, TOKEN_INSN, 0, 0, I_SMINT },
+        { "smintold", 8, TOKEN_INSN, 0, 0, I_SMINTOLD },
+        { "smsw", 4, TOKEN_INSN, 0, 0, I_SMSW },
+        { "stc", 3, TOKEN_INSN, 0, 0, I_STC },
+        { "std", 3, TOKEN_INSN, 0, 0, I_STD },
+        { "sti", 3, TOKEN_INSN, 0, 0, I_STI },
+        { "stosb", 5, TOKEN_INSN, 0, 0, I_STOSB },
+        { "stosd", 5, TOKEN_INSN, 0, 0, I_STOSD },
+        { "stosq", 5, TOKEN_INSN, 0, 0, I_STOSQ },
+        { "stosw", 5, TOKEN_INSN, 0, 0, I_STOSW },
+        { "str", 3, TOKEN_INSN, 0, 0, I_STR },
+        { "sub", 3, TOKEN_INSN, 0, 0, I_SUB },
+        { "svdc", 4, TOKEN_INSN, 0, 0, I_SVDC },
+        { "svldt", 5, TOKEN_INSN, 0, 0, I_SVLDT },
+        { "svts", 4, TOKEN_INSN, 0, 0, I_SVTS },
+        { "swapgs", 6, TOKEN_INSN, 0, 0, I_SWAPGS },
+        { "syscall", 7, TOKEN_INSN, 0, 0, I_SYSCALL },
+        { "sysenter", 8, TOKEN_INSN, 0, 0, I_SYSENTER },
+        { "sysexit", 7, TOKEN_INSN, 0, 0, I_SYSEXIT },
+        { "sysret", 6, TOKEN_INSN, 0, 0, I_SYSRET },
+        { "test", 4, TOKEN_INSN, 0, 0, I_TEST },
+        { "ud0", 3, TOKEN_INSN, 0, 0, I_UD0 },
+        { "ud1", 3, TOKEN_INSN, 0, 0, I_UD1 },
+        { "ud2b", 4, TOKEN_INSN, 0, 0, I_UD2B },
+        { "ud2", 3, TOKEN_INSN, 0, 0, I_UD2 },
+        { "ud2a", 4, TOKEN_INSN, 0, 0, I_UD2A },
+        { "umov", 4, TOKEN_INSN, 0, 0, I_UMOV },
+        { "verr", 4, TOKEN_INSN, 0, 0, I_VERR },
+        { "verw", 4, TOKEN_INSN, 0, 0, I_VERW },
+        { "fwait", 5, TOKEN_INSN, 0, 0, I_FWAIT },
+        { "wbinvd", 6, TOKEN_INSN, 0, 0, I_WBINVD },
+        { "wrshr", 5, TOKEN_INSN, 0, 0, I_WRSHR },
+        { "wrmsr", 5, TOKEN_INSN, 0, 0, I_WRMSR },
+        { "xadd", 4, TOKEN_INSN, 0, 0, I_XADD },
+        { "xbts", 4, TOKEN_INSN, 0, 0, I_XBTS },
+        { "xchg", 4, TOKEN_INSN, 0, 0, I_XCHG },
+        { "xlatb", 5, TOKEN_INSN, 0, 0, I_XLATB },
+        { "xlat", 4, TOKEN_INSN, 0, 0, I_XLAT },
+        { "xor", 3, TOKEN_INSN, 0, 0, I_XOR },
+        { "cmova", 5, TOKEN_INSN, 0, 0, I_CMOVA },
+        { "cmovae", 6, TOKEN_INSN, 0, 0, I_CMOVAE },
+        { "cmovb", 5, TOKEN_INSN, 0, 0, I_CMOVB },
+        { "cmovbe", 6, TOKEN_INSN, 0, 0, I_CMOVBE },
+        { "cmovc", 5, TOKEN_INSN, 0, 0, I_CMOVC },
+        { "cmove", 5, TOKEN_INSN, 0, 0, I_CMOVE },
+        { "cmovg", 5, TOKEN_INSN, 0, 0, I_CMOVG },
+        { "cmovge", 6, TOKEN_INSN, 0, 0, I_CMOVGE },
+        { "cmovl", 5, TOKEN_INSN, 0, 0, I_CMOVL },
+        { "cmovle", 6, TOKEN_INSN, 0, 0, I_CMOVLE },
+        { "cmovna", 6, TOKEN_INSN, 0, 0, I_CMOVNA },
+        { "cmovnae", 7, TOKEN_INSN, 0, 0, I_CMOVNAE },
+        { "cmovnb", 6, TOKEN_INSN, 0, 0, I_CMOVNB },
+        { "cmovnbe", 7, TOKEN_INSN, 0, 0, I_CMOVNBE },
+        { "cmovnc", 6, TOKEN_INSN, 0, 0, I_CMOVNC },
+        { "cmovne", 6, TOKEN_INSN, 0, 0, I_CMOVNE },
+        { "cmovng", 6, TOKEN_INSN, 0, 0, I_CMOVNG },
+        { "cmovnge", 7, TOKEN_INSN, 0, 0, I_CMOVNGE },
+        { "cmovnl", 6, TOKEN_INSN, 0, 0, I_CMOVNL },
+        { "cmovnle", 7, TOKEN_INSN, 0, 0, I_CMOVNLE },
+        { "cmovno", 6, TOKEN_INSN, 0, 0, I_CMOVNO },
+        { "cmovnp", 6, TOKEN_INSN, 0, 0, I_CMOVNP },
+        { "cmovns", 6, TOKEN_INSN, 0, 0, I_CMOVNS },
+        { "cmovnz", 6, TOKEN_INSN, 0, 0, I_CMOVNZ },
+        { "cmovo", 5, TOKEN_INSN, 0, 0, I_CMOVO },
+        { "cmovp", 5, TOKEN_INSN, 0, 0, I_CMOVP },
+        { "cmovpe", 6, TOKEN_INSN, 0, 0, I_CMOVPE },
+        { "cmovpo", 6, TOKEN_INSN, 0, 0, I_CMOVPO },
+        { "cmovs", 5, TOKEN_INSN, 0, 0, I_CMOVS },
+        { "cmovz", 5, TOKEN_INSN, 0, 0, I_CMOVZ },
+        { "ja", 2, TOKEN_INSN, 0, 0, I_JA },
+        { "jae", 3, TOKEN_INSN, 0, 0, I_JAE },
+        { "jb", 2, TOKEN_INSN, 0, 0, I_JB },
+        { "jbe", 3, TOKEN_INSN, 0, 0, I_JBE },
+        { "jc", 2, TOKEN_INSN, 0, 0, I_JC },
+        { "je", 2, TOKEN_INSN, 0, 0, I_JE },
+        { "jg", 2, TOKEN_INSN, 0, 0, I_JG },
+        { "jge", 3, TOKEN_INSN, 0, 0, I_JGE },
+        { "jl", 2, TOKEN_INSN, 0, 0, I_JL },
+        { "jle", 3, TOKEN_INSN, 0, 0, I_JLE },
+        { "jna", 3, TOKEN_INSN, 0, 0, I_JNA },
+        { "jnae", 4, TOKEN_INSN, 0, 0, I_JNAE },
+        { "jnb", 3, TOKEN_INSN, 0, 0, I_JNB },
+        { "jnbe", 4, TOKEN_INSN, 0, 0, I_JNBE },
+        { "jnc", 3, TOKEN_INSN, 0, 0, I_JNC },
+        { "jne", 3, TOKEN_INSN, 0, 0, I_JNE },
+        { "jng", 3, TOKEN_INSN, 0, 0, I_JNG },
+        { "jnge", 4, TOKEN_INSN, 0, 0, I_JNGE },
+        { "jnl", 3, TOKEN_INSN, 0, 0, I_JNL },
+        { "jnle", 4, TOKEN_INSN, 0, 0, I_JNLE },
+        { "jno", 3, TOKEN_INSN, 0, 0, I_JNO },
+        { "jnp", 3, TOKEN_INSN, 0, 0, I_JNP },
+        { "jns", 3, TOKEN_INSN, 0, 0, I_JNS },
+        { "jnz", 3, TOKEN_INSN, 0, 0, I_JNZ },
+        { "jo", 2, TOKEN_INSN, 0, 0, I_JO },
+        { "jp", 2, TOKEN_INSN, 0, 0, I_JP },
+        { "jpe", 3, TOKEN_INSN, 0, 0, I_JPE },
+        { "jpo", 3, TOKEN_INSN, 0, 0, I_JPO },
+        { "js", 2, TOKEN_INSN, 0, 0, I_JS },
+        { "jz", 2, TOKEN_INSN, 0, 0, I_JZ },
+        { "seta", 4, TOKEN_INSN, 0, 0, I_SETA },
+        { "setae", 5, TOKEN_INSN, 0, 0, I_SETAE },
+        { "setb", 4, TOKEN_INSN, 0, 0, I_SETB },
+        { "setbe", 5, TOKEN_INSN, 0, 0, I_SETBE },
+        { "setc", 4, TOKEN_INSN, 0, 0, I_SETC },
+        { "sete", 4, TOKEN_INSN, 0, 0, I_SETE },
+        { "setg", 4, TOKEN_INSN, 0, 0, I_SETG },
+        { "setge", 5, TOKEN_INSN, 0, 0, I_SETGE },
+        { "setl", 4, TOKEN_INSN, 0, 0, I_SETL },
+        { "setle", 5, TOKEN_INSN, 0, 0, I_SETLE },
+        { "setna", 5, TOKEN_INSN, 0, 0, I_SETNA },
+        { "setnae", 6, TOKEN_INSN, 0, 0, I_SETNAE },
+        { "setnb", 5, TOKEN_INSN, 0, 0, I_SETNB },
+        { "setnbe", 6, TOKEN_INSN, 0, 0, I_SETNBE },
+        { "setnc", 5, TOKEN_INSN, 0, 0, I_SETNC },
+        { "setne", 5, TOKEN_INSN, 0, 0, I_SETNE },
+        { "setng", 5, TOKEN_INSN, 0, 0, I_SETNG },
+        { "setnge", 6, TOKEN_INSN, 0, 0, I_SETNGE },
+        { "setnl", 5, TOKEN_INSN, 0, 0, I_SETNL },
+        { "setnle", 6, TOKEN_INSN, 0, 0, I_SETNLE },
+        { "setno", 5, TOKEN_INSN, 0, 0, I_SETNO },
+        { "setnp", 5, TOKEN_INSN, 0, 0, I_SETNP },
+        { "setns", 5, TOKEN_INSN, 0, 0, I_SETNS },
+        { "setnz", 5, TOKEN_INSN, 0, 0, I_SETNZ },
+        { "seto", 4, TOKEN_INSN, 0, 0, I_SETO },
+        { "setp", 4, TOKEN_INSN, 0, 0, I_SETP },
+        { "setpe", 5, TOKEN_INSN, 0, 0, I_SETPE },
+        { "setpo", 5, TOKEN_INSN, 0, 0, I_SETPO },
+        { "sets", 4, TOKEN_INSN, 0, 0, I_SETS },
+        { "setz", 4, TOKEN_INSN, 0, 0, I_SETZ },
+        { "addps", 5, TOKEN_INSN, 0, 0, I_ADDPS },
+        { "addss", 5, TOKEN_INSN, 0, 0, I_ADDSS },
+        { "andnps", 6, TOKEN_INSN, 0, 0, I_ANDNPS },
+        { "andps", 5, TOKEN_INSN, 0, 0, I_ANDPS },
+        { "cmpeqps", 7, TOKEN_INSN, 0, 0, I_CMPEQPS },
+        { "cmpeqss", 7, TOKEN_INSN, 0, 0, I_CMPEQSS },
+        { "cmpleps", 7, TOKEN_INSN, 0, 0, I_CMPLEPS },
+        { "cmpless", 7, TOKEN_INSN, 0, 0, I_CMPLESS },
+        { "cmpltps", 7, TOKEN_INSN, 0, 0, I_CMPLTPS },
+        { "cmpltss", 7, TOKEN_INSN, 0, 0, I_CMPLTSS },
+        { "cmpneqps", 8, TOKEN_INSN, 0, 0, I_CMPNEQPS },
+        { "cmpneqss", 8, TOKEN_INSN, 0, 0, I_CMPNEQSS },
+        { "cmpnleps", 8, TOKEN_INSN, 0, 0, I_CMPNLEPS },
+        { "cmpnless", 8, TOKEN_INSN, 0, 0, I_CMPNLESS },
+        { "cmpnltps", 8, TOKEN_INSN, 0, 0, I_CMPNLTPS },
+        { "cmpnltss", 8, TOKEN_INSN, 0, 0, I_CMPNLTSS },
+        { "cmpordps", 8, TOKEN_INSN, 0, 0, I_CMPORDPS },
+        { "cmpordss", 8, TOKEN_INSN, 0, 0, I_CMPORDSS },
+        { "cmpunordps", 10, TOKEN_INSN, 0, 0, I_CMPUNORDPS },
+        { "cmpunordss", 10, TOKEN_INSN, 0, 0, I_CMPUNORDSS },
+        { "cmpps", 5, TOKEN_INSN, 0, 0, I_CMPPS },
+        { "cmpss", 5, TOKEN_INSN, 0, 0, I_CMPSS },
+        { "comiss", 6, TOKEN_INSN, 0, 0, I_COMISS },
+        { "cvtpi2ps", 8, TOKEN_INSN, 0, 0, I_CVTPI2PS },
+        { "cvtps2pi", 8, TOKEN_INSN, 0, 0, I_CVTPS2PI },
+        { "cvtsi2ss", 8, TOKEN_INSN, 0, 0, I_CVTSI2SS },
+        { "cvtss2si", 8, TOKEN_INSN, 0, 0, I_CVTSS2SI },
+        { "cvttps2pi", 9, TOKEN_INSN, 0, 0, I_CVTTPS2PI },
+        { "cvttss2si", 9, TOKEN_INSN, 0, 0, I_CVTTSS2SI },
+        { "divps", 5, TOKEN_INSN, 0, 0, I_DIVPS },
+        { "divss", 5, TOKEN_INSN, 0, 0, I_DIVSS },
+        { "ldmxcsr", 7, TOKEN_INSN, 0, 0, I_LDMXCSR },
+        { "maxps", 5, TOKEN_INSN, 0, 0, I_MAXPS },
+        { "maxss", 5, TOKEN_INSN, 0, 0, I_MAXSS },
+        { "minps", 5, TOKEN_INSN, 0, 0, I_MINPS },
+        { "minss", 5, TOKEN_INSN, 0, 0, I_MINSS },
+        { "movaps", 6, TOKEN_INSN, 0, 0, I_MOVAPS },
+        { "movhps", 6, TOKEN_INSN, 0, 0, I_MOVHPS },
+        { "movlhps", 7, TOKEN_INSN, 0, 0, I_MOVLHPS },
+        { "movlps", 6, TOKEN_INSN, 0, 0, I_MOVLPS },
+        { "movhlps", 7, TOKEN_INSN, 0, 0, I_MOVHLPS },
+        { "movmskps", 8, TOKEN_INSN, 0, 0, I_MOVMSKPS },
+        { "movntps", 7, TOKEN_INSN, 0, 0, I_MOVNTPS },
+        { "movss", 5, TOKEN_INSN, 0, 0, I_MOVSS },
+        { "movups", 6, TOKEN_INSN, 0, 0, I_MOVUPS },
+        { "mulps", 5, TOKEN_INSN, 0, 0, I_MULPS },
+        { "mulss", 5, TOKEN_INSN, 0, 0, I_MULSS },
+        { "orps", 4, TOKEN_INSN, 0, 0, I_ORPS },
+        { "rcpps", 5, TOKEN_INSN, 0, 0, I_RCPPS },
+        { "rcpss", 5, TOKEN_INSN, 0, 0, I_RCPSS },
+        { "rsqrtps", 7, TOKEN_INSN, 0, 0, I_RSQRTPS },
+        { "rsqrtss", 7, TOKEN_INSN, 0, 0, I_RSQRTSS },
+        { "shufps", 6, TOKEN_INSN, 0, 0, I_SHUFPS },
+        { "sqrtps", 6, TOKEN_INSN, 0, 0, I_SQRTPS },
+        { "sqrtss", 6, TOKEN_INSN, 0, 0, I_SQRTSS },
+        { "stmxcsr", 7, TOKEN_INSN, 0, 0, I_STMXCSR },
+        { "subps", 5, TOKEN_INSN, 0, 0, I_SUBPS },
+        { "subss", 5, TOKEN_INSN, 0, 0, I_SUBSS },
+        { "ucomiss", 7, TOKEN_INSN, 0, 0, I_UCOMISS },
+        { "unpckhps", 8, TOKEN_INSN, 0, 0, I_UNPCKHPS },
+        { "unpcklps", 8, TOKEN_INSN, 0, 0, I_UNPCKLPS },
+        { "xorps", 5, TOKEN_INSN, 0, 0, I_XORPS },
+        { "fxrstor", 7, TOKEN_INSN, 0, 0, I_FXRSTOR },
+        { "fxrstor64", 9, TOKEN_INSN, 0, 0, I_FXRSTOR64 },
+        { "fxsave", 6, TOKEN_INSN, 0, 0, I_FXSAVE },
+        { "fxsave64", 8, TOKEN_INSN, 0, 0, I_FXSAVE64 },
+        { "xgetbv", 6, TOKEN_INSN, 0, 0, I_XGETBV },
+        { "xsetbv", 6, TOKEN_INSN, 0, 0, I_XSETBV },
+        { "xsave", 5, TOKEN_INSN, 0, 0, I_XSAVE },
+        { "xsave64", 7, TOKEN_INSN, 0, 0, I_XSAVE64 },
+        { "xsavec", 6, TOKEN_INSN, 0, 0, I_XSAVEC },
+        { "xsavec64", 8, TOKEN_INSN, 0, 0, I_XSAVEC64 },
+        { "xsaveopt", 8, TOKEN_INSN, 0, 0, I_XSAVEOPT },
+        { "xsaveopt64", 10, TOKEN_INSN, 0, 0, I_XSAVEOPT64 },
+        { "xsaves", 6, TOKEN_INSN, 0, 0, I_XSAVES },
+        { "xsaves64", 8, TOKEN_INSN, 0, 0, I_XSAVES64 },
+        { "xrstor", 6, TOKEN_INSN, 0, 0, I_XRSTOR },
+        { "xrstor64", 8, TOKEN_INSN, 0, 0, I_XRSTOR64 },
+        { "xrstors", 7, TOKEN_INSN, 0, 0, I_XRSTORS },
+        { "xrstors64", 9, TOKEN_INSN, 0, 0, I_XRSTORS64 },
+        { "prefetchnta", 11, TOKEN_INSN, 0, 0, I_PREFETCHNTA },
+        { "prefetcht0", 10, TOKEN_INSN, 0, 0, I_PREFETCHT0 },
+        { "prefetcht1", 10, TOKEN_INSN, 0, 0, I_PREFETCHT1 },
+        { "prefetcht2", 10, TOKEN_INSN, 0, 0, I_PREFETCHT2 },
+        { "prefetchit0", 11, TOKEN_INSN, 0, 0, I_PREFETCHIT0 },
+        { "prefetchit1", 11, TOKEN_INSN, 0, 0, I_PREFETCHIT1 },
+        { "maskmovq", 8, TOKEN_INSN, 0, 0, I_MASKMOVQ },
+        { "movntq", 6, TOKEN_INSN, 0, 0, I_MOVNTQ },
+        { "pavgb", 5, TOKEN_INSN, 0, 0, I_PAVGB },
+        { "pavgw", 5, TOKEN_INSN, 0, 0, I_PAVGW },
+        { "pextrw", 6, TOKEN_INSN, 0, 0, I_PEXTRW },
+        { "pinsrw", 6, TOKEN_INSN, 0, 0, I_PINSRW },
+        { "pmaxsw", 6, TOKEN_INSN, 0, 0, I_PMAXSW },
+        { "pmaxub", 6, TOKEN_INSN, 0, 0, I_PMAXUB },
+        { "pminsw", 6, TOKEN_INSN, 0, 0, I_PMINSW },
+        { "pminub", 6, TOKEN_INSN, 0, 0, I_PMINUB },
+        { "pmovmskb", 8, TOKEN_INSN, 0, 0, I_PMOVMSKB },
+        { "pmulhuw", 7, TOKEN_INSN, 0, 0, I_PMULHUW },
+        { "psadbw", 6, TOKEN_INSN, 0, 0, I_PSADBW },
+        { "pshufw", 6, TOKEN_INSN, 0, 0, I_PSHUFW },
+        { "pf2iw", 5, TOKEN_INSN, 0, 0, I_PF2IW },
+        { "pfnacc", 6, TOKEN_INSN, 0, 0, I_PFNACC },
+        { "pfpnacc", 7, TOKEN_INSN, 0, 0, I_PFPNACC },
+        { "pi2fw", 5, TOKEN_INSN, 0, 0, I_PI2FW },
+        { "pswapd", 6, TOKEN_INSN, 0, 0, I_PSWAPD },
+        { "maskmovdqu", 10, TOKEN_INSN, 0, 0, I_MASKMOVDQU },
+        { "clflush", 7, TOKEN_INSN, 0, 0, I_CLFLUSH },
+        { "movntdq", 7, TOKEN_INSN, 0, 0, I_MOVNTDQ },
+        { "movnti", 6, TOKEN_INSN, 0, 0, I_MOVNTI },
+        { "movntpd", 7, TOKEN_INSN, 0, 0, I_MOVNTPD },
+        { "movdqa", 6, TOKEN_INSN, 0, 0, I_MOVDQA },
+        { "movdqu", 6, TOKEN_INSN, 0, 0, I_MOVDQU },
+        { "movdq2q", 7, TOKEN_INSN, 0, 0, I_MOVDQ2Q },
+        { "movq2dq", 7, TOKEN_INSN, 0, 0, I_MOVQ2DQ },
+        { "paddq", 5, TOKEN_INSN, 0, 0, I_PADDQ },
+        { "pmuludq", 7, TOKEN_INSN, 0, 0, I_PMULUDQ },
+        { "pshufd", 6, TOKEN_INSN, 0, 0, I_PSHUFD },
+        { "pshufhw", 7, TOKEN_INSN, 0, 0, I_PSHUFHW },
+        { "pshuflw", 7, TOKEN_INSN, 0, 0, I_PSHUFLW },
+        { "pslldq", 6, TOKEN_INSN, 0, 0, I_PSLLDQ },
+        { "psrldq", 6, TOKEN_INSN, 0, 0, I_PSRLDQ },
+        { "psubq", 5, TOKEN_INSN, 0, 0, I_PSUBQ },
+        { "punpckhqdq", 10, TOKEN_INSN, 0, 0, I_PUNPCKHQDQ },
+        { "punpcklqdq", 10, TOKEN_INSN, 0, 0, I_PUNPCKLQDQ },
+        { "addpd", 5, TOKEN_INSN, 0, 0, I_ADDPD },
+        { "addsd", 5, TOKEN_INSN, 0, 0, I_ADDSD },
+        { "andnpd", 6, TOKEN_INSN, 0, 0, I_ANDNPD },
+        { "andpd", 5, TOKEN_INSN, 0, 0, I_ANDPD },
+        { "cmpeqpd", 7, TOKEN_INSN, 0, 0, I_CMPEQPD },
+        { "cmpeqsd", 7, TOKEN_INSN, 0, 0, I_CMPEQSD },
+        { "cmplepd", 7, TOKEN_INSN, 0, 0, I_CMPLEPD },
+        { "cmplesd", 7, TOKEN_INSN, 0, 0, I_CMPLESD },
+        { "cmpltpd", 7, TOKEN_INSN, 0, 0, I_CMPLTPD },
+        { "cmpltsd", 7, TOKEN_INSN, 0, 0, I_CMPLTSD },
+        { "cmpneqpd", 8, TOKEN_INSN, 0, 0, I_CMPNEQPD },
+        { "cmpneqsd", 8, TOKEN_INSN, 0, 0, I_CMPNEQSD },
+        { "cmpnlepd", 8, TOKEN_INSN, 0, 0, I_CMPNLEPD },
+        { "cmpnlesd", 8, TOKEN_INSN, 0, 0, I_CMPNLESD },
+        { "cmpnltpd", 8, TOKEN_INSN, 0, 0, I_CMPNLTPD },
+        { "cmpnltsd", 8, TOKEN_INSN, 0, 0, I_CMPNLTSD },
+        { "cmpordpd", 8, TOKEN_INSN, 0, 0, I_CMPORDPD },
+        { "cmpordsd", 8, TOKEN_INSN, 0, 0, I_CMPORDSD },
+        { "cmpunordpd", 10, TOKEN_INSN, 0, 0, I_CMPUNORDPD },
+        { "cmpunordsd", 10, TOKEN_INSN, 0, 0, I_CMPUNORDSD },
+        { "cmppd", 5, TOKEN_INSN, 0, 0, I_CMPPD },
+        { "comisd", 6, TOKEN_INSN, 0, 0, I_COMISD },
+        { "cvtdq2pd", 8, TOKEN_INSN, 0, 0, I_CVTDQ2PD },
+        { "cvtdq2ps", 8, TOKEN_INSN, 0, 0, I_CVTDQ2PS },
+        { "cvtpd2dq", 8, TOKEN_INSN, 0, 0, I_CVTPD2DQ },
+        { "cvtpd2pi", 8, TOKEN_INSN, 0, 0, I_CVTPD2PI },
+        { "cvtpd2ps", 8, TOKEN_INSN, 0, 0, I_CVTPD2PS },
+        { "cvtpi2pd", 8, TOKEN_INSN, 0, 0, I_CVTPI2PD },
+        { "cvtps2dq", 8, TOKEN_INSN, 0, 0, I_CVTPS2DQ },
+        { "cvtps2pd", 8, TOKEN_INSN, 0, 0, I_CVTPS2PD },
+        { "cvtsd2si", 8, TOKEN_INSN, 0, 0, I_CVTSD2SI },
+        { "cvtsd2ss", 8, TOKEN_INSN, 0, 0, I_CVTSD2SS },
+        { "cvtsi2sd", 8, TOKEN_INSN, 0, 0, I_CVTSI2SD },
+        { "cvtss2sd", 8, TOKEN_INSN, 0, 0, I_CVTSS2SD },
+        { "cvttpd2pi", 9, TOKEN_INSN, 0, 0, I_CVTTPD2PI },
+        { "cvttpd2dq", 9, TOKEN_INSN, 0, 0, I_CVTTPD2DQ },
+        { "cvttps2dq", 9, TOKEN_INSN, 0, 0, I_CVTTPS2DQ },
+        { "cvttsd2si", 9, TOKEN_INSN, 0, 0, I_CVTTSD2SI },
+        { "divpd", 5, TOKEN_INSN, 0, 0, I_DIVPD },
+        { "divsd", 5, TOKEN_INSN, 0, 0, I_DIVSD },
+        { "maxpd", 5, TOKEN_INSN, 0, 0, I_MAXPD },
+        { "maxsd", 5, TOKEN_INSN, 0, 0, I_MAXSD },
+        { "minpd", 5, TOKEN_INSN, 0, 0, I_MINPD },
+        { "minsd", 5, TOKEN_INSN, 0, 0, I_MINSD },
+        { "movapd", 6, TOKEN_INSN, 0, 0, I_MOVAPD },
+        { "movhpd", 6, TOKEN_INSN, 0, 0, I_MOVHPD },
+        { "movlpd", 6, TOKEN_INSN, 0, 0, I_MOVLPD },
+        { "movmskpd", 8, TOKEN_INSN, 0, 0, I_MOVMSKPD },
+        { "movupd", 6, TOKEN_INSN, 0, 0, I_MOVUPD },
+        { "mulpd", 5, TOKEN_INSN, 0, 0, I_MULPD },
+        { "mulsd", 5, TOKEN_INSN, 0, 0, I_MULSD },
+        { "orpd", 4, TOKEN_INSN, 0, 0, I_ORPD },
+        { "shufpd", 6, TOKEN_INSN, 0, 0, I_SHUFPD },
+        { "sqrtpd", 6, TOKEN_INSN, 0, 0, I_SQRTPD },
+        { "sqrtsd", 6, TOKEN_INSN, 0, 0, I_SQRTSD },
+        { "subpd", 5, TOKEN_INSN, 0, 0, I_SUBPD },
+        { "subsd", 5, TOKEN_INSN, 0, 0, I_SUBSD },
+        { "ucomisd", 7, TOKEN_INSN, 0, 0, I_UCOMISD },
+        { "unpckhpd", 8, TOKEN_INSN, 0, 0, I_UNPCKHPD },
+        { "unpcklpd", 8, TOKEN_INSN, 0, 0, I_UNPCKLPD },
+        { "xorpd", 5, TOKEN_INSN, 0, 0, I_XORPD },
+        { "addsubpd", 8, TOKEN_INSN, 0, 0, I_ADDSUBPD },
+        { "addsubps", 8, TOKEN_INSN, 0, 0, I_ADDSUBPS },
+        { "haddpd", 6, TOKEN_INSN, 0, 0, I_HADDPD },
+        { "haddps", 6, TOKEN_INSN, 0, 0, I_HADDPS },
+        { "hsubpd", 6, TOKEN_INSN, 0, 0, I_HSUBPD },
+        { "hsubps", 6, TOKEN_INSN, 0, 0, I_HSUBPS },
+        { "lddqu", 5, TOKEN_INSN, 0, 0, I_LDDQU },
+        { "movddup", 7, TOKEN_INSN, 0, 0, I_MOVDDUP },
+        { "movshdup", 8, TOKEN_INSN, 0, 0, I_MOVSHDUP },
+        { "movsldup", 8, TOKEN_INSN, 0, 0, I_MOVSLDUP },
+        { "clgi", 4, TOKEN_INSN, 0, 0, I_CLGI },
+        { "stgi", 4, TOKEN_INSN, 0, 0, I_STGI },
+        { "vmcall", 6, TOKEN_INSN, 0, 0, I_VMCALL },
+        { "vmclear", 7, TOKEN_INSN, 0, 0, I_VMCLEAR },
+        { "vmfunc", 6, TOKEN_INSN, 0, 0, I_VMFUNC },
+        { "vmlaunch", 8, TOKEN_INSN, 0, 0, I_VMLAUNCH },
+        { "vmload", 6, TOKEN_INSN, 0, 0, I_VMLOAD },
+        { "vmmcall", 7, TOKEN_INSN, 0, 0, I_VMMCALL },
+        { "vmptrld", 7, TOKEN_INSN, 0, 0, I_VMPTRLD },
+        { "vmptrst", 7, TOKEN_INSN, 0, 0, I_VMPTRST },
+        { "vmread", 6, TOKEN_INSN, 0, 0, I_VMREAD },
+        { "vmresume", 8, TOKEN_INSN, 0, 0, I_VMRESUME },
+        { "vmrun", 5, TOKEN_INSN, 0, 0, I_VMRUN },
+        { "vmsave", 6, TOKEN_INSN, 0, 0, I_VMSAVE },
+        { "vmwrite", 7, TOKEN_INSN, 0, 0, I_VMWRITE },
+        { "vmxoff", 6, TOKEN_INSN, 0, 0, I_VMXOFF },
+        { "vmxon", 5, TOKEN_INSN, 0, 0, I_VMXON },
+        { "invept", 6, TOKEN_INSN, 0, 0, I_INVEPT },
+        { "invvpid", 7, TOKEN_INSN, 0, 0, I_INVVPID },
+        { "pvalidate", 9, TOKEN_INSN, 0, 0, I_PVALIDATE },
+        { "rmpadjust", 9, TOKEN_INSN, 0, 0, I_RMPADJUST },
+        { "vmgexit", 7, TOKEN_INSN, 0, 0, I_VMGEXIT },
+        { "pabsb", 5, TOKEN_INSN, 0, 0, I_PABSB },
+        { "pabsw", 5, TOKEN_INSN, 0, 0, I_PABSW },
+        { "pabsd", 5, TOKEN_INSN, 0, 0, I_PABSD },
+        { "palignr", 7, TOKEN_INSN, 0, 0, I_PALIGNR },
+        { "phaddw", 6, TOKEN_INSN, 0, 0, I_PHADDW },
+        { "phaddd", 6, TOKEN_INSN, 0, 0, I_PHADDD },
+        { "phaddsw", 7, TOKEN_INSN, 0, 0, I_PHADDSW },
+        { "phsubw", 6, TOKEN_INSN, 0, 0, I_PHSUBW },
+        { "phsubd", 6, TOKEN_INSN, 0, 0, I_PHSUBD },
+        { "phsubsw", 7, TOKEN_INSN, 0, 0, I_PHSUBSW },
+        { "pmaddubsw", 9, TOKEN_INSN, 0, 0, I_PMADDUBSW },
+        { "pmulhrsw", 8, TOKEN_INSN, 0, 0, I_PMULHRSW },
+        { "pshufb", 6, TOKEN_INSN, 0, 0, I_PSHUFB },
+        { "psignb", 6, TOKEN_INSN, 0, 0, I_PSIGNB },
+        { "psignw", 6, TOKEN_INSN, 0, 0, I_PSIGNW },
+        { "psignd", 6, TOKEN_INSN, 0, 0, I_PSIGND },
+        { "extrq", 5, TOKEN_INSN, 0, 0, I_EXTRQ },
+        { "insertq", 7, TOKEN_INSN, 0, 0, I_INSERTQ },
+        { "movntsd", 7, TOKEN_INSN, 0, 0, I_MOVNTSD },
+        { "movntss", 7, TOKEN_INSN, 0, 0, I_MOVNTSS },
+        { "lzcnt", 5, TOKEN_INSN, 0, 0, I_LZCNT },
+        { "blendpd", 7, TOKEN_INSN, 0, 0, I_BLENDPD },
+        { "blendps", 7, TOKEN_INSN, 0, 0, I_BLENDPS },
+        { "blendvpd", 8, TOKEN_INSN, 0, 0, I_BLENDVPD },
+        { "blendvps", 8, TOKEN_INSN, 0, 0, I_BLENDVPS },
+        { "dppd", 4, TOKEN_INSN, 0, 0, I_DPPD },
+        { "dpps", 4, TOKEN_INSN, 0, 0, I_DPPS },
+        { "extractps", 9, TOKEN_INSN, 0, 0, I_EXTRACTPS },
+        { "insertps", 8, TOKEN_INSN, 0, 0, I_INSERTPS },
+        { "movntdqa", 8, TOKEN_INSN, 0, 0, I_MOVNTDQA },
+        { "mpsadbw", 7, TOKEN_INSN, 0, 0, I_MPSADBW },
+        { "packusdw", 8, TOKEN_INSN, 0, 0, I_PACKUSDW },
+        { "pblendvb", 8, TOKEN_INSN, 0, 0, I_PBLENDVB },
+        { "pblendw", 7, TOKEN_INSN, 0, 0, I_PBLENDW },
+        { "pcmpeqq", 7, TOKEN_INSN, 0, 0, I_PCMPEQQ },
+        { "pextrb", 6, TOKEN_INSN, 0, 0, I_PEXTRB },
+        { "pextrd", 6, TOKEN_INSN, 0, 0, I_PEXTRD },
+        { "pextrq", 6, TOKEN_INSN, 0, 0, I_PEXTRQ },
+        { "phminposuw", 10, TOKEN_INSN, 0, 0, I_PHMINPOSUW },
+        { "pinsrb", 6, TOKEN_INSN, 0, 0, I_PINSRB },
+        { "pinsrd", 6, TOKEN_INSN, 0, 0, I_PINSRD },
+        { "pinsrq", 6, TOKEN_INSN, 0, 0, I_PINSRQ },
+        { "pmaxsb", 6, TOKEN_INSN, 0, 0, I_PMAXSB },
+        { "pmaxsd", 6, TOKEN_INSN, 0, 0, I_PMAXSD },
+        { "pmaxud", 6, TOKEN_INSN, 0, 0, I_PMAXUD },
+        { "pmaxuw", 6, TOKEN_INSN, 0, 0, I_PMAXUW },
+        { "pminsb", 6, TOKEN_INSN, 0, 0, I_PMINSB },
+        { "pminsd", 6, TOKEN_INSN, 0, 0, I_PMINSD },
+        { "pminud", 6, TOKEN_INSN, 0, 0, I_PMINUD },
+        { "pminuw", 6, TOKEN_INSN, 0, 0, I_PMINUW },
+        { "pmovsxbw", 8, TOKEN_INSN, 0, 0, I_PMOVSXBW },
+        { "pmovsxbd", 8, TOKEN_INSN, 0, 0, I_PMOVSXBD },
+        { "pmovsxbq", 8, TOKEN_INSN, 0, 0, I_PMOVSXBQ },
+        { "pmovsxwd", 8, TOKEN_INSN, 0, 0, I_PMOVSXWD },
+        { "pmovsxwq", 8, TOKEN_INSN, 0, 0, I_PMOVSXWQ },
+        { "pmovsxdq", 8, TOKEN_INSN, 0, 0, I_PMOVSXDQ },
+        { "pmovzxbw", 8, TOKEN_INSN, 0, 0, I_PMOVZXBW },
+        { "pmovzxbd", 8, TOKEN_INSN, 0, 0, I_PMOVZXBD },
+        { "pmovzxbq", 8, TOKEN_INSN, 0, 0, I_PMOVZXBQ },
+        { "pmovzxwd", 8, TOKEN_INSN, 0, 0, I_PMOVZXWD },
+        { "pmovzxwq", 8, TOKEN_INSN, 0, 0, I_PMOVZXWQ },
+        { "pmovzxdq", 8, TOKEN_INSN, 0, 0, I_PMOVZXDQ },
+        { "pmuldq", 6, TOKEN_INSN, 0, 0, I_PMULDQ },
+        { "pmulld", 6, TOKEN_INSN, 0, 0, I_PMULLD },
+        { "ptest", 5, TOKEN_INSN, 0, 0, I_PTEST },
+        { "roundpd", 7, TOKEN_INSN, 0, 0, I_ROUNDPD },
+        { "roundps", 7, TOKEN_INSN, 0, 0, I_ROUNDPS },
+        { "roundsd", 7, TOKEN_INSN, 0, 0, I_ROUNDSD },
+        { "roundss", 7, TOKEN_INSN, 0, 0, I_ROUNDSS },
+        { "crc32", 5, TOKEN_INSN, 0, 0, I_CRC32 },
+        { "pcmpestri", 9, TOKEN_INSN, 0, 0, I_PCMPESTRI },
+        { "pcmpestrm", 9, TOKEN_INSN, 0, 0, I_PCMPESTRM },
+        { "pcmpistri", 9, TOKEN_INSN, 0, 0, I_PCMPISTRI },
+        { "pcmpistrm", 9, TOKEN_INSN, 0, 0, I_PCMPISTRM },
+        { "pcmpgtq", 7, TOKEN_INSN, 0, 0, I_PCMPGTQ },
+        { "popcnt", 6, TOKEN_INSN, 0, 0, I_POPCNT },
+        { "getsec", 6, TOKEN_INSN, 0, 0, I_GETSEC },
+        { "pfrcpv", 6, TOKEN_INSN, 0, 0, I_PFRCPV },
+        { "pfrsqrtv", 8, TOKEN_INSN, 0, 0, I_PFRSQRTV },
+        { "movbe", 5, TOKEN_INSN, 0, 0, I_MOVBE },
+        { "aesenc", 6, TOKEN_INSN, 0, 0, I_AESENC },
+        { "aesenclast", 10, TOKEN_INSN, 0, 0, I_AESENCLAST },
+        { "aesdec", 6, TOKEN_INSN, 0, 0, I_AESDEC },
+        { "aesdeclast", 10, TOKEN_INSN, 0, 0, I_AESDECLAST },
+        { "aesimc", 6, TOKEN_INSN, 0, 0, I_AESIMC },
+        { "aeskeygenassist", 15, TOKEN_INSN, 0, 0, I_AESKEYGENASSIST },
+        { "vaesenc", 7, TOKEN_INSN, 0, 0, I_VAESENC },
+        { "vaesenclast", 11, TOKEN_INSN, 0, 0, I_VAESENCLAST },
+        { "vaesdec", 7, TOKEN_INSN, 0, 0, I_VAESDEC },
+        { "vaesdeclast", 11, TOKEN_INSN, 0, 0, I_VAESDECLAST },
+        { "vaesimc", 7, TOKEN_INSN, 0, 0, I_VAESIMC },
+        { "vaeskeygenassist", 16, TOKEN_INSN, 0, 0, I_VAESKEYGENASSIST },
+        { "vaddpd", 6, TOKEN_INSN, 0, 0, I_VADDPD },
+        { "vaddps", 6, TOKEN_INSN, 0, 0, I_VADDPS },
+        { "vaddsd", 6, TOKEN_INSN, 0, 0, I_VADDSD },
+        { "vaddss", 6, TOKEN_INSN, 0, 0, I_VADDSS },
+        { "vaddsubpd", 9, TOKEN_INSN, 0, 0, I_VADDSUBPD },
+        { "vaddsubps", 9, TOKEN_INSN, 0, 0, I_VADDSUBPS },
+        { "vandpd", 6, TOKEN_INSN, 0, 0, I_VANDPD },
+        { "vandps", 6, TOKEN_INSN, 0, 0, I_VANDPS },
+        { "vandnpd", 7, TOKEN_INSN, 0, 0, I_VANDNPD },
+        { "vandnps", 7, TOKEN_INSN, 0, 0, I_VANDNPS },
+        { "vblendpd", 8, TOKEN_INSN, 0, 0, I_VBLENDPD },
+        { "vblendps", 8, TOKEN_INSN, 0, 0, I_VBLENDPS },
+        { "vblendvpd", 9, TOKEN_INSN, 0, 0, I_VBLENDVPD },
+        { "vblendvps", 9, TOKEN_INSN, 0, 0, I_VBLENDVPS },
+        { "vbroadcastss", 12, TOKEN_INSN, 0, 0, I_VBROADCASTSS },
+        { "vbroadcastsd", 12, TOKEN_INSN, 0, 0, I_VBROADCASTSD },
+        { "vbroadcastf128", 14, TOKEN_INSN, 0, 0, I_VBROADCASTF128 },
+        { "vcmpeq_ospd", 11, TOKEN_INSN, 0, 0, I_VCMPEQ_OSPD },
+        { "vcmpeqpd", 8, TOKEN_INSN, 0, 0, I_VCMPEQPD },
+        { "vcmplt_ospd", 11, TOKEN_INSN, 0, 0, I_VCMPLT_OSPD },
+        { "vcmpltpd", 8, TOKEN_INSN, 0, 0, I_VCMPLTPD },
+        { "vcmple_ospd", 11, TOKEN_INSN, 0, 0, I_VCMPLE_OSPD },
+        { "vcmplepd", 8, TOKEN_INSN, 0, 0, I_VCMPLEPD },
+        { "vcmpunord_qpd", 13, TOKEN_INSN, 0, 0, I_VCMPUNORD_QPD },
+        { "vcmpunordpd", 11, TOKEN_INSN, 0, 0, I_VCMPUNORDPD },
+        { "vcmpneq_uqpd", 12, TOKEN_INSN, 0, 0, I_VCMPNEQ_UQPD },
+        { "vcmpneqpd", 9, TOKEN_INSN, 0, 0, I_VCMPNEQPD },
+        { "vcmpnlt_uspd", 12, TOKEN_INSN, 0, 0, I_VCMPNLT_USPD },
+        { "vcmpnltpd", 9, TOKEN_INSN, 0, 0, I_VCMPNLTPD },
+        { "vcmpnle_uspd", 12, TOKEN_INSN, 0, 0, I_VCMPNLE_USPD },
+        { "vcmpnlepd", 9, TOKEN_INSN, 0, 0, I_VCMPNLEPD },
+        { "vcmpord_qpd", 11, TOKEN_INSN, 0, 0, I_VCMPORD_QPD },
+        { "vcmpordpd", 9, TOKEN_INSN, 0, 0, I_VCMPORDPD },
+        { "vcmpeq_uqpd", 11, TOKEN_INSN, 0, 0, I_VCMPEQ_UQPD },
+        { "vcmpnge_uspd", 12, TOKEN_INSN, 0, 0, I_VCMPNGE_USPD },
+        { "vcmpngepd", 9, TOKEN_INSN, 0, 0, I_VCMPNGEPD },
+        { "vcmpngt_uspd", 12, TOKEN_INSN, 0, 0, I_VCMPNGT_USPD },
+        { "vcmpngtpd", 9, TOKEN_INSN, 0, 0, I_VCMPNGTPD },
+        { "vcmpfalse_oqpd", 14, TOKEN_INSN, 0, 0, I_VCMPFALSE_OQPD },
+        { "vcmpfalsepd", 11, TOKEN_INSN, 0, 0, I_VCMPFALSEPD },
+        { "vcmpneq_oqpd", 12, TOKEN_INSN, 0, 0, I_VCMPNEQ_OQPD },
+        { "vcmpge_ospd", 11, TOKEN_INSN, 0, 0, I_VCMPGE_OSPD },
+        { "vcmpgepd", 8, TOKEN_INSN, 0, 0, I_VCMPGEPD },
+        { "vcmpgt_ospd", 11, TOKEN_INSN, 0, 0, I_VCMPGT_OSPD },
+        { "vcmpgtpd", 8, TOKEN_INSN, 0, 0, I_VCMPGTPD },
+        { "vcmptrue_uqpd", 13, TOKEN_INSN, 0, 0, I_VCMPTRUE_UQPD },
+        { "vcmptruepd", 10, TOKEN_INSN, 0, 0, I_VCMPTRUEPD },
+        { "vcmplt_oqpd", 11, TOKEN_INSN, 0, 0, I_VCMPLT_OQPD },
+        { "vcmple_oqpd", 11, TOKEN_INSN, 0, 0, I_VCMPLE_OQPD },
+        { "vcmpunord_spd", 13, TOKEN_INSN, 0, 0, I_VCMPUNORD_SPD },
+        { "vcmpneq_uspd", 12, TOKEN_INSN, 0, 0, I_VCMPNEQ_USPD },
+        { "vcmpnlt_uqpd", 12, TOKEN_INSN, 0, 0, I_VCMPNLT_UQPD },
+        { "vcmpnle_uqpd", 12, TOKEN_INSN, 0, 0, I_VCMPNLE_UQPD },
+        { "vcmpord_spd", 11, TOKEN_INSN, 0, 0, I_VCMPORD_SPD },
+        { "vcmpeq_uspd", 11, TOKEN_INSN, 0, 0, I_VCMPEQ_USPD },
+        { "vcmpnge_uqpd", 12, TOKEN_INSN, 0, 0, I_VCMPNGE_UQPD },
+        { "vcmpngt_uqpd", 12, TOKEN_INSN, 0, 0, I_VCMPNGT_UQPD },
+        { "vcmpfalse_ospd", 14, TOKEN_INSN, 0, 0, I_VCMPFALSE_OSPD },
+        { "vcmpneq_ospd", 12, TOKEN_INSN, 0, 0, I_VCMPNEQ_OSPD },
+        { "vcmpge_oqpd", 11, TOKEN_INSN, 0, 0, I_VCMPGE_OQPD },
+        { "vcmpgt_oqpd", 11, TOKEN_INSN, 0, 0, I_VCMPGT_OQPD },
+        { "vcmptrue_uspd", 13, TOKEN_INSN, 0, 0, I_VCMPTRUE_USPD },
+        { "vcmppd", 6, TOKEN_INSN, 0, 0, I_VCMPPD },
+        { "vcmpeq_osps", 11, TOKEN_INSN, 0, 0, I_VCMPEQ_OSPS },
+        { "vcmpeqps", 8, TOKEN_INSN, 0, 0, I_VCMPEQPS },
+        { "vcmplt_osps", 11, TOKEN_INSN, 0, 0, I_VCMPLT_OSPS },
+        { "vcmpltps", 8, TOKEN_INSN, 0, 0, I_VCMPLTPS },
+        { "vcmple_osps", 11, TOKEN_INSN, 0, 0, I_VCMPLE_OSPS },
+        { "vcmpleps", 8, TOKEN_INSN, 0, 0, I_VCMPLEPS },
+        { "vcmpunord_qps", 13, TOKEN_INSN, 0, 0, I_VCMPUNORD_QPS },
+        { "vcmpunordps", 11, TOKEN_INSN, 0, 0, I_VCMPUNORDPS },
+        { "vcmpneq_uqps", 12, TOKEN_INSN, 0, 0, I_VCMPNEQ_UQPS },
+        { "vcmpneqps", 9, TOKEN_INSN, 0, 0, I_VCMPNEQPS },
+        { "vcmpnlt_usps", 12, TOKEN_INSN, 0, 0, I_VCMPNLT_USPS },
+        { "vcmpnltps", 9, TOKEN_INSN, 0, 0, I_VCMPNLTPS },
+        { "vcmpnle_usps", 12, TOKEN_INSN, 0, 0, I_VCMPNLE_USPS },
+        { "vcmpnleps", 9, TOKEN_INSN, 0, 0, I_VCMPNLEPS },
+        { "vcmpord_qps", 11, TOKEN_INSN, 0, 0, I_VCMPORD_QPS },
+        { "vcmpordps", 9, TOKEN_INSN, 0, 0, I_VCMPORDPS },
+        { "vcmpeq_uqps", 11, TOKEN_INSN, 0, 0, I_VCMPEQ_UQPS },
+        { "vcmpnge_usps", 12, TOKEN_INSN, 0, 0, I_VCMPNGE_USPS },
+        { "vcmpngeps", 9, TOKEN_INSN, 0, 0, I_VCMPNGEPS },
+        { "vcmpngt_usps", 12, TOKEN_INSN, 0, 0, I_VCMPNGT_USPS },
+        { "vcmpngtps", 9, TOKEN_INSN, 0, 0, I_VCMPNGTPS },
+        { "vcmpfalse_oqps", 14, TOKEN_INSN, 0, 0, I_VCMPFALSE_OQPS },
+        { "vcmpfalseps", 11, TOKEN_INSN, 0, 0, I_VCMPFALSEPS },
+        { "vcmpneq_oqps", 12, TOKEN_INSN, 0, 0, I_VCMPNEQ_OQPS },
+        { "vcmpge_osps", 11, TOKEN_INSN, 0, 0, I_VCMPGE_OSPS },
+        { "vcmpgeps", 8, TOKEN_INSN, 0, 0, I_VCMPGEPS },
+        { "vcmpgt_osps", 11, TOKEN_INSN, 0, 0, I_VCMPGT_OSPS },
+        { "vcmpgtps", 8, TOKEN_INSN, 0, 0, I_VCMPGTPS },
+        { "vcmptrue_uqps", 13, TOKEN_INSN, 0, 0, I_VCMPTRUE_UQPS },
+        { "vcmptrueps", 10, TOKEN_INSN, 0, 0, I_VCMPTRUEPS },
+        { "vcmplt_oqps", 11, TOKEN_INSN, 0, 0, I_VCMPLT_OQPS },
+        { "vcmple_oqps", 11, TOKEN_INSN, 0, 0, I_VCMPLE_OQPS },
+        { "vcmpunord_sps", 13, TOKEN_INSN, 0, 0, I_VCMPUNORD_SPS },
+        { "vcmpneq_usps", 12, TOKEN_INSN, 0, 0, I_VCMPNEQ_USPS },
+        { "vcmpnlt_uqps", 12, TOKEN_INSN, 0, 0, I_VCMPNLT_UQPS },
+        { "vcmpnle_uqps", 12, TOKEN_INSN, 0, 0, I_VCMPNLE_UQPS },
+        { "vcmpord_sps", 11, TOKEN_INSN, 0, 0, I_VCMPORD_SPS },
+        { "vcmpeq_usps", 11, TOKEN_INSN, 0, 0, I_VCMPEQ_USPS },
+        { "vcmpnge_uqps", 12, TOKEN_INSN, 0, 0, I_VCMPNGE_UQPS },
+        { "vcmpngt_uqps", 12, TOKEN_INSN, 0, 0, I_VCMPNGT_UQPS },
+        { "vcmpfalse_osps", 14, TOKEN_INSN, 0, 0, I_VCMPFALSE_OSPS },
+        { "vcmpneq_osps", 12, TOKEN_INSN, 0, 0, I_VCMPNEQ_OSPS },
+        { "vcmpge_oqps", 11, TOKEN_INSN, 0, 0, I_VCMPGE_OQPS },
+        { "vcmpgt_oqps", 11, TOKEN_INSN, 0, 0, I_VCMPGT_OQPS },
+        { "vcmptrue_usps", 13, TOKEN_INSN, 0, 0, I_VCMPTRUE_USPS },
+        { "vcmpps", 6, TOKEN_INSN, 0, 0, I_VCMPPS },
+        { "vcmpeq_ossd", 11, TOKEN_INSN, 0, 0, I_VCMPEQ_OSSD },
+        { "vcmpeqsd", 8, TOKEN_INSN, 0, 0, I_VCMPEQSD },
+        { "vcmplt_ossd", 11, TOKEN_INSN, 0, 0, I_VCMPLT_OSSD },
+        { "vcmpltsd", 8, TOKEN_INSN, 0, 0, I_VCMPLTSD },
+        { "vcmple_ossd", 11, TOKEN_INSN, 0, 0, I_VCMPLE_OSSD },
+        { "vcmplesd", 8, TOKEN_INSN, 0, 0, I_VCMPLESD },
+        { "vcmpunord_qsd", 13, TOKEN_INSN, 0, 0, I_VCMPUNORD_QSD },
+        { "vcmpunordsd", 11, TOKEN_INSN, 0, 0, I_VCMPUNORDSD },
+        { "vcmpneq_uqsd", 12, TOKEN_INSN, 0, 0, I_VCMPNEQ_UQSD },
+        { "vcmpneqsd", 9, TOKEN_INSN, 0, 0, I_VCMPNEQSD },
+        { "vcmpnlt_ussd", 12, TOKEN_INSN, 0, 0, I_VCMPNLT_USSD },
+        { "vcmpnltsd", 9, TOKEN_INSN, 0, 0, I_VCMPNLTSD },
+        { "vcmpnle_ussd", 12, TOKEN_INSN, 0, 0, I_VCMPNLE_USSD },
+        { "vcmpnlesd", 9, TOKEN_INSN, 0, 0, I_VCMPNLESD },
+        { "vcmpord_qsd", 11, TOKEN_INSN, 0, 0, I_VCMPORD_QSD },
+        { "vcmpordsd", 9, TOKEN_INSN, 0, 0, I_VCMPORDSD },
+        { "vcmpeq_uqsd", 11, TOKEN_INSN, 0, 0, I_VCMPEQ_UQSD },
+        { "vcmpnge_ussd", 12, TOKEN_INSN, 0, 0, I_VCMPNGE_USSD },
+        { "vcmpngesd", 9, TOKEN_INSN, 0, 0, I_VCMPNGESD },
+        { "vcmpngt_ussd", 12, TOKEN_INSN, 0, 0, I_VCMPNGT_USSD },
+        { "vcmpngtsd", 9, TOKEN_INSN, 0, 0, I_VCMPNGTSD },
+        { "vcmpfalse_oqsd", 14, TOKEN_INSN, 0, 0, I_VCMPFALSE_OQSD },
+        { "vcmpfalsesd", 11, TOKEN_INSN, 0, 0, I_VCMPFALSESD },
+        { "vcmpneq_oqsd", 12, TOKEN_INSN, 0, 0, I_VCMPNEQ_OQSD },
+        { "vcmpge_ossd", 11, TOKEN_INSN, 0, 0, I_VCMPGE_OSSD },
+        { "vcmpgesd", 8, TOKEN_INSN, 0, 0, I_VCMPGESD },
+        { "vcmpgt_ossd", 11, TOKEN_INSN, 0, 0, I_VCMPGT_OSSD },
+        { "vcmpgtsd", 8, TOKEN_INSN, 0, 0, I_VCMPGTSD },
+        { "vcmptrue_uqsd", 13, TOKEN_INSN, 0, 0, I_VCMPTRUE_UQSD },
+        { "vcmptruesd", 10, TOKEN_INSN, 0, 0, I_VCMPTRUESD },
+        { "vcmplt_oqsd", 11, TOKEN_INSN, 0, 0, I_VCMPLT_OQSD },
+        { "vcmple_oqsd", 11, TOKEN_INSN, 0, 0, I_VCMPLE_OQSD },
+        { "vcmpunord_ssd", 13, TOKEN_INSN, 0, 0, I_VCMPUNORD_SSD },
+        { "vcmpneq_ussd", 12, TOKEN_INSN, 0, 0, I_VCMPNEQ_USSD },
+        { "vcmpnlt_uqsd", 12, TOKEN_INSN, 0, 0, I_VCMPNLT_UQSD },
+        { "vcmpnle_uqsd", 12, TOKEN_INSN, 0, 0, I_VCMPNLE_UQSD },
+        { "vcmpord_ssd", 11, TOKEN_INSN, 0, 0, I_VCMPORD_SSD },
+        { "vcmpeq_ussd", 11, TOKEN_INSN, 0, 0, I_VCMPEQ_USSD },
+        { "vcmpnge_uqsd", 12, TOKEN_INSN, 0, 0, I_VCMPNGE_UQSD },
+        { "vcmpngt_uqsd", 12, TOKEN_INSN, 0, 0, I_VCMPNGT_UQSD },
+        { "vcmpfalse_ossd", 14, TOKEN_INSN, 0, 0, I_VCMPFALSE_OSSD },
+        { "vcmpneq_ossd", 12, TOKEN_INSN, 0, 0, I_VCMPNEQ_OSSD },
+        { "vcmpge_oqsd", 11, TOKEN_INSN, 0, 0, I_VCMPGE_OQSD },
+        { "vcmpgt_oqsd", 11, TOKEN_INSN, 0, 0, I_VCMPGT_OQSD },
+        { "vcmptrue_ussd", 13, TOKEN_INSN, 0, 0, I_VCMPTRUE_USSD },
+        { "vcmpsd", 6, TOKEN_INSN, 0, 0, I_VCMPSD },
+        { "vcmpeq_osss", 11, TOKEN_INSN, 0, 0, I_VCMPEQ_OSSS },
+        { "vcmpeqss", 8, TOKEN_INSN, 0, 0, I_VCMPEQSS },
+        { "vcmplt_osss", 11, TOKEN_INSN, 0, 0, I_VCMPLT_OSSS },
+        { "vcmpltss", 8, TOKEN_INSN, 0, 0, I_VCMPLTSS },
+        { "vcmple_osss", 11, TOKEN_INSN, 0, 0, I_VCMPLE_OSSS },
+        { "vcmpless", 8, TOKEN_INSN, 0, 0, I_VCMPLESS },
+        { "vcmpunord_qss", 13, TOKEN_INSN, 0, 0, I_VCMPUNORD_QSS },
+        { "vcmpunordss", 11, TOKEN_INSN, 0, 0, I_VCMPUNORDSS },
+        { "vcmpneq_uqss", 12, TOKEN_INSN, 0, 0, I_VCMPNEQ_UQSS },
+        { "vcmpneqss", 9, TOKEN_INSN, 0, 0, I_VCMPNEQSS },
+        { "vcmpnlt_usss", 12, TOKEN_INSN, 0, 0, I_VCMPNLT_USSS },
+        { "vcmpnltss", 9, TOKEN_INSN, 0, 0, I_VCMPNLTSS },
+        { "vcmpnle_usss", 12, TOKEN_INSN, 0, 0, I_VCMPNLE_USSS },
+        { "vcmpnless", 9, TOKEN_INSN, 0, 0, I_VCMPNLESS },
+        { "vcmpord_qss", 11, TOKEN_INSN, 0, 0, I_VCMPORD_QSS },
+        { "vcmpordss", 9, TOKEN_INSN, 0, 0, I_VCMPORDSS },
+        { "vcmpeq_uqss", 11, TOKEN_INSN, 0, 0, I_VCMPEQ_UQSS },
+        { "vcmpnge_usss", 12, TOKEN_INSN, 0, 0, I_VCMPNGE_USSS },
+        { "vcmpngess", 9, TOKEN_INSN, 0, 0, I_VCMPNGESS },
+        { "vcmpngt_usss", 12, TOKEN_INSN, 0, 0, I_VCMPNGT_USSS },
+        { "vcmpngtss", 9, TOKEN_INSN, 0, 0, I_VCMPNGTSS },
+        { "vcmpfalse_oqss", 14, TOKEN_INSN, 0, 0, I_VCMPFALSE_OQSS },
+        { "vcmpfalsess", 11, TOKEN_INSN, 0, 0, I_VCMPFALSESS },
+        { "vcmpneq_oqss", 12, TOKEN_INSN, 0, 0, I_VCMPNEQ_OQSS },
+        { "vcmpge_osss", 11, TOKEN_INSN, 0, 0, I_VCMPGE_OSSS },
+        { "vcmpgess", 8, TOKEN_INSN, 0, 0, I_VCMPGESS },
+        { "vcmpgt_osss", 11, TOKEN_INSN, 0, 0, I_VCMPGT_OSSS },
+        { "vcmpgtss", 8, TOKEN_INSN, 0, 0, I_VCMPGTSS },
+        { "vcmptrue_uqss", 13, TOKEN_INSN, 0, 0, I_VCMPTRUE_UQSS },
+        { "vcmptruess", 10, TOKEN_INSN, 0, 0, I_VCMPTRUESS },
+        { "vcmplt_oqss", 11, TOKEN_INSN, 0, 0, I_VCMPLT_OQSS },
+        { "vcmple_oqss", 11, TOKEN_INSN, 0, 0, I_VCMPLE_OQSS },
+        { "vcmpunord_sss", 13, TOKEN_INSN, 0, 0, I_VCMPUNORD_SSS },
+        { "vcmpneq_usss", 12, TOKEN_INSN, 0, 0, I_VCMPNEQ_USSS },
+        { "vcmpnlt_uqss", 12, TOKEN_INSN, 0, 0, I_VCMPNLT_UQSS },
+        { "vcmpnle_uqss", 12, TOKEN_INSN, 0, 0, I_VCMPNLE_UQSS },
+        { "vcmpord_sss", 11, TOKEN_INSN, 0, 0, I_VCMPORD_SSS },
+        { "vcmpeq_usss", 11, TOKEN_INSN, 0, 0, I_VCMPEQ_USSS },
+        { "vcmpnge_uqss", 12, TOKEN_INSN, 0, 0, I_VCMPNGE_UQSS },
+        { "vcmpngt_uqss", 12, TOKEN_INSN, 0, 0, I_VCMPNGT_UQSS },
+        { "vcmpfalse_osss", 14, TOKEN_INSN, 0, 0, I_VCMPFALSE_OSSS },
+        { "vcmpneq_osss", 12, TOKEN_INSN, 0, 0, I_VCMPNEQ_OSSS },
+        { "vcmpge_oqss", 11, TOKEN_INSN, 0, 0, I_VCMPGE_OQSS },
+        { "vcmpgt_oqss", 11, TOKEN_INSN, 0, 0, I_VCMPGT_OQSS },
+        { "vcmptrue_usss", 13, TOKEN_INSN, 0, 0, I_VCMPTRUE_USSS },
+        { "vcmpss", 6, TOKEN_INSN, 0, 0, I_VCMPSS },
+        { "vcomisd", 7, TOKEN_INSN, 0, 0, I_VCOMISD },
+        { "vcomiss", 7, TOKEN_INSN, 0, 0, I_VCOMISS },
+        { "vcvtdq2pd", 9, TOKEN_INSN, 0, 0, I_VCVTDQ2PD },
+        { "vcvtdq2ps", 9, TOKEN_INSN, 0, 0, I_VCVTDQ2PS },
+        { "vcvtpd2dq", 9, TOKEN_INSN, 0, 0, I_VCVTPD2DQ },
+        { "vcvtpd2ps", 9, TOKEN_INSN, 0, 0, I_VCVTPD2PS },
+        { "vcvtps2dq", 9, TOKEN_INSN, 0, 0, I_VCVTPS2DQ },
+        { "vcvtps2pd", 9, TOKEN_INSN, 0, 0, I_VCVTPS2PD },
+        { "vcvtsd2si", 9, TOKEN_INSN, 0, 0, I_VCVTSD2SI },
+        { "vcvtsd2ss", 9, TOKEN_INSN, 0, 0, I_VCVTSD2SS },
+        { "vcvtsi2sd", 9, TOKEN_INSN, 0, 0, I_VCVTSI2SD },
+        { "vcvtsi2ss", 9, TOKEN_INSN, 0, 0, I_VCVTSI2SS },
+        { "vcvtss2sd", 9, TOKEN_INSN, 0, 0, I_VCVTSS2SD },
+        { "vcvtss2si", 9, TOKEN_INSN, 0, 0, I_VCVTSS2SI },
+        { "vcvttpd2dq", 10, TOKEN_INSN, 0, 0, I_VCVTTPD2DQ },
+        { "vcvttps2dq", 10, TOKEN_INSN, 0, 0, I_VCVTTPS2DQ },
+        { "vcvttsd2si", 10, TOKEN_INSN, 0, 0, I_VCVTTSD2SI },
+        { "vcvttss2si", 10, TOKEN_INSN, 0, 0, I_VCVTTSS2SI },
+        { "vdivpd", 6, TOKEN_INSN, 0, 0, I_VDIVPD },
+        { "vdivps", 6, TOKEN_INSN, 0, 0, I_VDIVPS },
+        { "vdivsd", 6, TOKEN_INSN, 0, 0, I_VDIVSD },
+        { "vdivss", 6, TOKEN_INSN, 0, 0, I_VDIVSS },
+        { "vdppd", 5, TOKEN_INSN, 0, 0, I_VDPPD },
+        { "vdpps", 5, TOKEN_INSN, 0, 0, I_VDPPS },
+        { "vextractf128", 12, TOKEN_INSN, 0, 0, I_VEXTRACTF128 },
+        { "vextractps", 10, TOKEN_INSN, 0, 0, I_VEXTRACTPS },
+        { "vhaddpd", 7, TOKEN_INSN, 0, 0, I_VHADDPD },
+        { "vhaddps", 7, TOKEN_INSN, 0, 0, I_VHADDPS },
+        { "vhsubpd", 7, TOKEN_INSN, 0, 0, I_VHSUBPD },
+        { "vhsubps", 7, TOKEN_INSN, 0, 0, I_VHSUBPS },
+        { "vinsertf128", 11, TOKEN_INSN, 0, 0, I_VINSERTF128 },
+        { "vinsertps", 9, TOKEN_INSN, 0, 0, I_VINSERTPS },
+        { "vlddqu", 6, TOKEN_INSN, 0, 0, I_VLDDQU },
+        { "vldqqu", 6, TOKEN_INSN, 0, 0, I_VLDQQU },
+        { "vldmxcsr", 8, TOKEN_INSN, 0, 0, I_VLDMXCSR },
+        { "vmaskmovdqu", 11, TOKEN_INSN, 0, 0, I_VMASKMOVDQU },
+        { "vmaskmovps", 10, TOKEN_INSN, 0, 0, I_VMASKMOVPS },
+        { "vmaskmovpd", 10, TOKEN_INSN, 0, 0, I_VMASKMOVPD },
+        { "vmaxpd", 6, TOKEN_INSN, 0, 0, I_VMAXPD },
+        { "vmaxps", 6, TOKEN_INSN, 0, 0, I_VMAXPS },
+        { "vmaxsd", 6, TOKEN_INSN, 0, 0, I_VMAXSD },
+        { "vmaxss", 6, TOKEN_INSN, 0, 0, I_VMAXSS },
+        { "vminpd", 6, TOKEN_INSN, 0, 0, I_VMINPD },
+        { "vminps", 6, TOKEN_INSN, 0, 0, I_VMINPS },
+        { "vminsd", 6, TOKEN_INSN, 0, 0, I_VMINSD },
+        { "vminss", 6, TOKEN_INSN, 0, 0, I_VMINSS },
+        { "vmovapd", 7, TOKEN_INSN, 0, 0, I_VMOVAPD },
+        { "vmovaps", 7, TOKEN_INSN, 0, 0, I_VMOVAPS },
+        { "vmovd", 5, TOKEN_INSN, 0, 0, I_VMOVD },
+        { "vmovq", 5, TOKEN_INSN, 0, 0, I_VMOVQ },
+        { "vmovddup", 8, TOKEN_INSN, 0, 0, I_VMOVDDUP },
+        { "vmovdqa", 7, TOKEN_INSN, 0, 0, I_VMOVDQA },
+        { "vmovqqa", 7, TOKEN_INSN, 0, 0, I_VMOVQQA },
+        { "vmovdqu", 7, TOKEN_INSN, 0, 0, I_VMOVDQU },
+        { "vmovqqu", 7, TOKEN_INSN, 0, 0, I_VMOVQQU },
+        { "vmovhlps", 8, TOKEN_INSN, 0, 0, I_VMOVHLPS },
+        { "vmovhpd", 7, TOKEN_INSN, 0, 0, I_VMOVHPD },
+        { "vmovhps", 7, TOKEN_INSN, 0, 0, I_VMOVHPS },
+        { "vmovlhps", 8, TOKEN_INSN, 0, 0, I_VMOVLHPS },
+        { "vmovlpd", 7, TOKEN_INSN, 0, 0, I_VMOVLPD },
+        { "vmovlps", 7, TOKEN_INSN, 0, 0, I_VMOVLPS },
+        { "vmovmskpd", 9, TOKEN_INSN, 0, 0, I_VMOVMSKPD },
+        { "vmovmskps", 9, TOKEN_INSN, 0, 0, I_VMOVMSKPS },
+        { "vmovntdq", 8, TOKEN_INSN, 0, 0, I_VMOVNTDQ },
+        { "vmovntqq", 8, TOKEN_INSN, 0, 0, I_VMOVNTQQ },
+        { "vmovntdqa", 9, TOKEN_INSN, 0, 0, I_VMOVNTDQA },
+        { "vmovntpd", 8, TOKEN_INSN, 0, 0, I_VMOVNTPD },
+        { "vmovntps", 8, TOKEN_INSN, 0, 0, I_VMOVNTPS },
+        { "vmovsd", 6, TOKEN_INSN, 0, 0, I_VMOVSD },
+        { "vmovshdup", 9, TOKEN_INSN, 0, 0, I_VMOVSHDUP },
+        { "vmovsldup", 9, TOKEN_INSN, 0, 0, I_VMOVSLDUP },
+        { "vmovss", 6, TOKEN_INSN, 0, 0, I_VMOVSS },
+        { "vmovupd", 7, TOKEN_INSN, 0, 0, I_VMOVUPD },
+        { "vmovups", 7, TOKEN_INSN, 0, 0, I_VMOVUPS },
+        { "vmpsadbw", 8, TOKEN_INSN, 0, 0, I_VMPSADBW },
+        { "vmulpd", 6, TOKEN_INSN, 0, 0, I_VMULPD },
+        { "vmulps", 6, TOKEN_INSN, 0, 0, I_VMULPS },
+        { "vmulsd", 6, TOKEN_INSN, 0, 0, I_VMULSD },
+        { "vmulss", 6, TOKEN_INSN, 0, 0, I_VMULSS },
+        { "vorpd", 5, TOKEN_INSN, 0, 0, I_VORPD },
+        { "vorps", 5, TOKEN_INSN, 0, 0, I_VORPS },
+        { "vpabsb", 6, TOKEN_INSN, 0, 0, I_VPABSB },
+        { "vpabsw", 6, TOKEN_INSN, 0, 0, I_VPABSW },
+        { "vpabsd", 6, TOKEN_INSN, 0, 0, I_VPABSD },
+        { "vpacksswb", 9, TOKEN_INSN, 0, 0, I_VPACKSSWB },
+        { "vpackssdw", 9, TOKEN_INSN, 0, 0, I_VPACKSSDW },
+        { "vpackuswb", 9, TOKEN_INSN, 0, 0, I_VPACKUSWB },
+        { "vpackusdw", 9, TOKEN_INSN, 0, 0, I_VPACKUSDW },
+        { "vpaddb", 6, TOKEN_INSN, 0, 0, I_VPADDB },
+        { "vpaddw", 6, TOKEN_INSN, 0, 0, I_VPADDW },
+        { "vpaddd", 6, TOKEN_INSN, 0, 0, I_VPADDD },
+        { "vpaddq", 6, TOKEN_INSN, 0, 0, I_VPADDQ },
+        { "vpaddsb", 7, TOKEN_INSN, 0, 0, I_VPADDSB },
+        { "vpaddsw", 7, TOKEN_INSN, 0, 0, I_VPADDSW },
+        { "vpaddusb", 8, TOKEN_INSN, 0, 0, I_VPADDUSB },
+        { "vpaddusw", 8, TOKEN_INSN, 0, 0, I_VPADDUSW },
+        { "vpalignr", 8, TOKEN_INSN, 0, 0, I_VPALIGNR },
+        { "vpand", 5, TOKEN_INSN, 0, 0, I_VPAND },
+        { "vpandn", 6, TOKEN_INSN, 0, 0, I_VPANDN },
+        { "vpavgb", 6, TOKEN_INSN, 0, 0, I_VPAVGB },
+        { "vpavgw", 6, TOKEN_INSN, 0, 0, I_VPAVGW },
+        { "vpblendvb", 9, TOKEN_INSN, 0, 0, I_VPBLENDVB },
+        { "vpblendw", 8, TOKEN_INSN, 0, 0, I_VPBLENDW },
+        { "vpcmpestri", 10, TOKEN_INSN, 0, 0, I_VPCMPESTRI },
+        { "vpcmpestrm", 10, TOKEN_INSN, 0, 0, I_VPCMPESTRM },
+        { "vpcmpistri", 10, TOKEN_INSN, 0, 0, I_VPCMPISTRI },
+        { "vpcmpistrm", 10, TOKEN_INSN, 0, 0, I_VPCMPISTRM },
+        { "vpcmpeqb", 8, TOKEN_INSN, 0, 0, I_VPCMPEQB },
+        { "vpcmpeqw", 8, TOKEN_INSN, 0, 0, I_VPCMPEQW },
+        { "vpcmpeqd", 8, TOKEN_INSN, 0, 0, I_VPCMPEQD },
+        { "vpcmpeqq", 8, TOKEN_INSN, 0, 0, I_VPCMPEQQ },
+        { "vpcmpgtb", 8, TOKEN_INSN, 0, 0, I_VPCMPGTB },
+        { "vpcmpgtw", 8, TOKEN_INSN, 0, 0, I_VPCMPGTW },
+        { "vpcmpgtd", 8, TOKEN_INSN, 0, 0, I_VPCMPGTD },
+        { "vpcmpgtq", 8, TOKEN_INSN, 0, 0, I_VPCMPGTQ },
+        { "vpermilpd", 9, TOKEN_INSN, 0, 0, I_VPERMILPD },
+        { "vpermilps", 9, TOKEN_INSN, 0, 0, I_VPERMILPS },
+        { "vperm2f128", 10, TOKEN_INSN, 0, 0, I_VPERM2F128 },
+        { "vpextrb", 7, TOKEN_INSN, 0, 0, I_VPEXTRB },
+        { "vpextrw", 7, TOKEN_INSN, 0, 0, I_VPEXTRW },
+        { "vpextrd", 7, TOKEN_INSN, 0, 0, I_VPEXTRD },
+        { "vpextrq", 7, TOKEN_INSN, 0, 0, I_VPEXTRQ },
+        { "vphaddw", 7, TOKEN_INSN, 0, 0, I_VPHADDW },
+        { "vphaddd", 7, TOKEN_INSN, 0, 0, I_VPHADDD },
+        { "vphaddsw", 8, TOKEN_INSN, 0, 0, I_VPHADDSW },
+        { "vphminposuw", 11, TOKEN_INSN, 0, 0, I_VPHMINPOSUW },
+        { "vphsubw", 7, TOKEN_INSN, 0, 0, I_VPHSUBW },
+        { "vphsubd", 7, TOKEN_INSN, 0, 0, I_VPHSUBD },
+        { "vphsubsw", 8, TOKEN_INSN, 0, 0, I_VPHSUBSW },
+        { "vpinsrb", 7, TOKEN_INSN, 0, 0, I_VPINSRB },
+        { "vpinsrw", 7, TOKEN_INSN, 0, 0, I_VPINSRW },
+        { "vpinsrd", 7, TOKEN_INSN, 0, 0, I_VPINSRD },
+        { "vpinsrq", 7, TOKEN_INSN, 0, 0, I_VPINSRQ },
+        { "vpmaddwd", 8, TOKEN_INSN, 0, 0, I_VPMADDWD },
+        { "vpmaddubsw", 10, TOKEN_INSN, 0, 0, I_VPMADDUBSW },
+        { "vpmaxsb", 7, TOKEN_INSN, 0, 0, I_VPMAXSB },
+        { "vpmaxsw", 7, TOKEN_INSN, 0, 0, I_VPMAXSW },
+        { "vpmaxsd", 7, TOKEN_INSN, 0, 0, I_VPMAXSD },
+        { "vpmaxub", 7, TOKEN_INSN, 0, 0, I_VPMAXUB },
+        { "vpmaxuw", 7, TOKEN_INSN, 0, 0, I_VPMAXUW },
+        { "vpmaxud", 7, TOKEN_INSN, 0, 0, I_VPMAXUD },
+        { "vpminsb", 7, TOKEN_INSN, 0, 0, I_VPMINSB },
+        { "vpminsw", 7, TOKEN_INSN, 0, 0, I_VPMINSW },
+        { "vpminsd", 7, TOKEN_INSN, 0, 0, I_VPMINSD },
+        { "vpminub", 7, TOKEN_INSN, 0, 0, I_VPMINUB },
+        { "vpminuw", 7, TOKEN_INSN, 0, 0, I_VPMINUW },
+        { "vpminud", 7, TOKEN_INSN, 0, 0, I_VPMINUD },
+        { "vpmovmskb", 9, TOKEN_INSN, 0, 0, I_VPMOVMSKB },
+        { "vpmovsxbw", 9, TOKEN_INSN, 0, 0, I_VPMOVSXBW },
+        { "vpmovsxbd", 9, TOKEN_INSN, 0, 0, I_VPMOVSXBD },
+        { "vpmovsxbq", 9, TOKEN_INSN, 0, 0, I_VPMOVSXBQ },
+        { "vpmovsxwd", 9, TOKEN_INSN, 0, 0, I_VPMOVSXWD },
+        { "vpmovsxwq", 9, TOKEN_INSN, 0, 0, I_VPMOVSXWQ },
+        { "vpmovsxdq", 9, TOKEN_INSN, 0, 0, I_VPMOVSXDQ },
+        { "vpmovzxbw", 9, TOKEN_INSN, 0, 0, I_VPMOVZXBW },
+        { "vpmovzxbd", 9, TOKEN_INSN, 0, 0, I_VPMOVZXBD },
+        { "vpmovzxbq", 9, TOKEN_INSN, 0, 0, I_VPMOVZXBQ },
+        { "vpmovzxwd", 9, TOKEN_INSN, 0, 0, I_VPMOVZXWD },
+        { "vpmovzxwq", 9, TOKEN_INSN, 0, 0, I_VPMOVZXWQ },
+        { "vpmovzxdq", 9, TOKEN_INSN, 0, 0, I_VPMOVZXDQ },
+        { "vpmulhuw", 8, TOKEN_INSN, 0, 0, I_VPMULHUW },
+        { "vpmulhrsw", 9, TOKEN_INSN, 0, 0, I_VPMULHRSW },
+        { "vpmulhw", 7, TOKEN_INSN, 0, 0, I_VPMULHW },
+        { "vpmullw", 7, TOKEN_INSN, 0, 0, I_VPMULLW },
+        { "vpmulld", 7, TOKEN_INSN, 0, 0, I_VPMULLD },
+        { "vpmuludq", 8, TOKEN_INSN, 0, 0, I_VPMULUDQ },
+        { "vpmuldq", 7, TOKEN_INSN, 0, 0, I_VPMULDQ },
+        { "vpor", 4, TOKEN_INSN, 0, 0, I_VPOR },
+        { "vpsadbw", 7, TOKEN_INSN, 0, 0, I_VPSADBW },
+        { "vpshufb", 7, TOKEN_INSN, 0, 0, I_VPSHUFB },
+        { "vpshufd", 7, TOKEN_INSN, 0, 0, I_VPSHUFD },
+        { "vpshufhw", 8, TOKEN_INSN, 0, 0, I_VPSHUFHW },
+        { "vpshuflw", 8, TOKEN_INSN, 0, 0, I_VPSHUFLW },
+        { "vpsignb", 7, TOKEN_INSN, 0, 0, I_VPSIGNB },
+        { "vpsignw", 7, TOKEN_INSN, 0, 0, I_VPSIGNW },
+        { "vpsignd", 7, TOKEN_INSN, 0, 0, I_VPSIGND },
+        { "vpslldq", 7, TOKEN_INSN, 0, 0, I_VPSLLDQ },
+        { "vpsrldq", 7, TOKEN_INSN, 0, 0, I_VPSRLDQ },
+        { "vpsllw", 6, TOKEN_INSN, 0, 0, I_VPSLLW },
+        { "vpslld", 6, TOKEN_INSN, 0, 0, I_VPSLLD },
+        { "vpsllq", 6, TOKEN_INSN, 0, 0, I_VPSLLQ },
+        { "vpsraw", 6, TOKEN_INSN, 0, 0, I_VPSRAW },
+        { "vpsrad", 6, TOKEN_INSN, 0, 0, I_VPSRAD },
+        { "vpsrlw", 6, TOKEN_INSN, 0, 0, I_VPSRLW },
+        { "vpsrld", 6, TOKEN_INSN, 0, 0, I_VPSRLD },
+        { "vpsrlq", 6, TOKEN_INSN, 0, 0, I_VPSRLQ },
+        { "vptest", 6, TOKEN_INSN, 0, 0, I_VPTEST },
+        { "vpsubb", 6, TOKEN_INSN, 0, 0, I_VPSUBB },
+        { "vpsubw", 6, TOKEN_INSN, 0, 0, I_VPSUBW },
+        { "vpsubd", 6, TOKEN_INSN, 0, 0, I_VPSUBD },
+        { "vpsubq", 6, TOKEN_INSN, 0, 0, I_VPSUBQ },
+        { "vpsubsb", 7, TOKEN_INSN, 0, 0, I_VPSUBSB },
+        { "vpsubsw", 7, TOKEN_INSN, 0, 0, I_VPSUBSW },
+        { "vpsubusb", 8, TOKEN_INSN, 0, 0, I_VPSUBUSB },
+        { "vpsubusw", 8, TOKEN_INSN, 0, 0, I_VPSUBUSW },
+        { "vpunpckhbw", 10, TOKEN_INSN, 0, 0, I_VPUNPCKHBW },
+        { "vpunpckhwd", 10, TOKEN_INSN, 0, 0, I_VPUNPCKHWD },
+        { "vpunpckhdq", 10, TOKEN_INSN, 0, 0, I_VPUNPCKHDQ },
+        { "vpunpckhqdq", 11, TOKEN_INSN, 0, 0, I_VPUNPCKHQDQ },
+        { "vpunpcklbw", 10, TOKEN_INSN, 0, 0, I_VPUNPCKLBW },
+        { "vpunpcklwd", 10, TOKEN_INSN, 0, 0, I_VPUNPCKLWD },
+        { "vpunpckldq", 10, TOKEN_INSN, 0, 0, I_VPUNPCKLDQ },
+        { "vpunpcklqdq", 11, TOKEN_INSN, 0, 0, I_VPUNPCKLQDQ },
+        { "vpxor", 5, TOKEN_INSN, 0, 0, I_VPXOR },
+        { "vrcpps", 6, TOKEN_INSN, 0, 0, I_VRCPPS },
+        { "vrcpss", 6, TOKEN_INSN, 0, 0, I_VRCPSS },
+        { "vrsqrtps", 8, TOKEN_INSN, 0, 0, I_VRSQRTPS },
+        { "vrsqrtss", 8, TOKEN_INSN, 0, 0, I_VRSQRTSS },
+        { "vroundpd", 8, TOKEN_INSN, 0, 0, I_VROUNDPD },
+        { "vroundps", 8, TOKEN_INSN, 0, 0, I_VROUNDPS },
+        { "vroundsd", 8, TOKEN_INSN, 0, 0, I_VROUNDSD },
+        { "vroundss", 8, TOKEN_INSN, 0, 0, I_VROUNDSS },
+        { "vshufpd", 7, TOKEN_INSN, 0, 0, I_VSHUFPD },
+        { "vshufps", 7, TOKEN_INSN, 0, 0, I_VSHUFPS },
+        { "vsqrtpd", 7, TOKEN_INSN, 0, 0, I_VSQRTPD },
+        { "vsqrtps", 7, TOKEN_INSN, 0, 0, I_VSQRTPS },
+        { "vsqrtsd", 7, TOKEN_INSN, 0, 0, I_VSQRTSD },
+        { "vsqrtss", 7, TOKEN_INSN, 0, 0, I_VSQRTSS },
+        { "vstmxcsr", 8, TOKEN_INSN, 0, 0, I_VSTMXCSR },
+        { "vsubpd", 6, TOKEN_INSN, 0, 0, I_VSUBPD },
+        { "vsubps", 6, TOKEN_INSN, 0, 0, I_VSUBPS },
+        { "vsubsd", 6, TOKEN_INSN, 0, 0, I_VSUBSD },
+        { "vsubss", 6, TOKEN_INSN, 0, 0, I_VSUBSS },
+        { "vtestps", 7, TOKEN_INSN, 0, 0, I_VTESTPS },
+        { "vtestpd", 7, TOKEN_INSN, 0, 0, I_VTESTPD },
+        { "vucomisd", 8, TOKEN_INSN, 0, 0, I_VUCOMISD },
+        { "vucomiss", 8, TOKEN_INSN, 0, 0, I_VUCOMISS },
+        { "vunpckhpd", 9, TOKEN_INSN, 0, 0, I_VUNPCKHPD },
+        { "vunpckhps", 9, TOKEN_INSN, 0, 0, I_VUNPCKHPS },
+        { "vunpcklpd", 9, TOKEN_INSN, 0, 0, I_VUNPCKLPD },
+        { "vunpcklps", 9, TOKEN_INSN, 0, 0, I_VUNPCKLPS },
+        { "vxorpd", 6, TOKEN_INSN, 0, 0, I_VXORPD },
+        { "vxorps", 6, TOKEN_INSN, 0, 0, I_VXORPS },
+        { "vzeroall", 8, TOKEN_INSN, 0, 0, I_VZEROALL },
+        { "vzeroupper", 10, TOKEN_INSN, 0, 0, I_VZEROUPPER },
+        { "pclmullqlqdq", 12, TOKEN_INSN, 0, 0, I_PCLMULLQLQDQ },
+        { "pclmulhqlqdq", 12, TOKEN_INSN, 0, 0, I_PCLMULHQLQDQ },
+        { "pclmullqhqdq", 12, TOKEN_INSN, 0, 0, I_PCLMULLQHQDQ },
+        { "pclmulhqhqdq", 12, TOKEN_INSN, 0, 0, I_PCLMULHQHQDQ },
+        { "pclmulqdq", 9, TOKEN_INSN, 0, 0, I_PCLMULQDQ },
+        { "vpclmullqlqdq", 13, TOKEN_INSN, 0, 0, I_VPCLMULLQLQDQ },
+        { "vpclmulhqlqdq", 13, TOKEN_INSN, 0, 0, I_VPCLMULHQLQDQ },
+        { "vpclmullqhqdq", 13, TOKEN_INSN, 0, 0, I_VPCLMULLQHQDQ },
+        { "vpclmulhqhqdq", 13, TOKEN_INSN, 0, 0, I_VPCLMULHQHQDQ },
+        { "vpclmulqdq", 10, TOKEN_INSN, 0, 0, I_VPCLMULQDQ },
+        { "vfmadd132ps", 11, TOKEN_INSN, 0, 0, I_VFMADD132PS },
+        { "vfmadd132pd", 11, TOKEN_INSN, 0, 0, I_VFMADD132PD },
+        { "vfmadd312ps", 11, TOKEN_INSN, 0, 0, I_VFMADD312PS },
+        { "vfmadd312pd", 11, TOKEN_INSN, 0, 0, I_VFMADD312PD },
+        { "vfmadd213ps", 11, TOKEN_INSN, 0, 0, I_VFMADD213PS },
+        { "vfmadd213pd", 11, TOKEN_INSN, 0, 0, I_VFMADD213PD },
+        { "vfmadd123ps", 11, TOKEN_INSN, 0, 0, I_VFMADD123PS },
+        { "vfmadd123pd", 11, TOKEN_INSN, 0, 0, I_VFMADD123PD },
+        { "vfmadd231ps", 11, TOKEN_INSN, 0, 0, I_VFMADD231PS },
+        { "vfmadd231pd", 11, TOKEN_INSN, 0, 0, I_VFMADD231PD },
+        { "vfmadd321ps", 11, TOKEN_INSN, 0, 0, I_VFMADD321PS },
+        { "vfmadd321pd", 11, TOKEN_INSN, 0, 0, I_VFMADD321PD },
+        { "vfmaddsub132ps", 14, TOKEN_INSN, 0, 0, I_VFMADDSUB132PS },
+        { "vfmaddsub132pd", 14, TOKEN_INSN, 0, 0, I_VFMADDSUB132PD },
+        { "vfmaddsub312ps", 14, TOKEN_INSN, 0, 0, I_VFMADDSUB312PS },
+        { "vfmaddsub312pd", 14, TOKEN_INSN, 0, 0, I_VFMADDSUB312PD },
+        { "vfmaddsub213ps", 14, TOKEN_INSN, 0, 0, I_VFMADDSUB213PS },
+        { "vfmaddsub213pd", 14, TOKEN_INSN, 0, 0, I_VFMADDSUB213PD },
+        { "vfmaddsub123ps", 14, TOKEN_INSN, 0, 0, I_VFMADDSUB123PS },
+        { "vfmaddsub123pd", 14, TOKEN_INSN, 0, 0, I_VFMADDSUB123PD },
+        { "vfmaddsub231ps", 14, TOKEN_INSN, 0, 0, I_VFMADDSUB231PS },
+        { "vfmaddsub231pd", 14, TOKEN_INSN, 0, 0, I_VFMADDSUB231PD },
+        { "vfmaddsub321ps", 14, TOKEN_INSN, 0, 0, I_VFMADDSUB321PS },
+        { "vfmaddsub321pd", 14, TOKEN_INSN, 0, 0, I_VFMADDSUB321PD },
+        { "vfmsub132ps", 11, TOKEN_INSN, 0, 0, I_VFMSUB132PS },
+        { "vfmsub132pd", 11, TOKEN_INSN, 0, 0, I_VFMSUB132PD },
+        { "vfmsub312ps", 11, TOKEN_INSN, 0, 0, I_VFMSUB312PS },
+        { "vfmsub312pd", 11, TOKEN_INSN, 0, 0, I_VFMSUB312PD },
+        { "vfmsub213ps", 11, TOKEN_INSN, 0, 0, I_VFMSUB213PS },
+        { "vfmsub213pd", 11, TOKEN_INSN, 0, 0, I_VFMSUB213PD },
+        { "vfmsub123ps", 11, TOKEN_INSN, 0, 0, I_VFMSUB123PS },
+        { "vfmsub123pd", 11, TOKEN_INSN, 0, 0, I_VFMSUB123PD },
+        { "vfmsub231ps", 11, TOKEN_INSN, 0, 0, I_VFMSUB231PS },
+        { "vfmsub231pd", 11, TOKEN_INSN, 0, 0, I_VFMSUB231PD },
+        { "vfmsub321ps", 11, TOKEN_INSN, 0, 0, I_VFMSUB321PS },
+        { "vfmsub321pd", 11, TOKEN_INSN, 0, 0, I_VFMSUB321PD },
+        { "vfmsubadd132ps", 14, TOKEN_INSN, 0, 0, I_VFMSUBADD132PS },
+        { "vfmsubadd132pd", 14, TOKEN_INSN, 0, 0, I_VFMSUBADD132PD },
+        { "vfmsubadd312ps", 14, TOKEN_INSN, 0, 0, I_VFMSUBADD312PS },
+        { "vfmsubadd312pd", 14, TOKEN_INSN, 0, 0, I_VFMSUBADD312PD },
+        { "vfmsubadd213ps", 14, TOKEN_INSN, 0, 0, I_VFMSUBADD213PS },
+        { "vfmsubadd213pd", 14, TOKEN_INSN, 0, 0, I_VFMSUBADD213PD },
+        { "vfmsubadd123ps", 14, TOKEN_INSN, 0, 0, I_VFMSUBADD123PS },
+        { "vfmsubadd123pd", 14, TOKEN_INSN, 0, 0, I_VFMSUBADD123PD },
+        { "vfmsubadd231ps", 14, TOKEN_INSN, 0, 0, I_VFMSUBADD231PS },
+        { "vfmsubadd231pd", 14, TOKEN_INSN, 0, 0, I_VFMSUBADD231PD },
+        { "vfmsubadd321ps", 14, TOKEN_INSN, 0, 0, I_VFMSUBADD321PS },
+        { "vfmsubadd321pd", 14, TOKEN_INSN, 0, 0, I_VFMSUBADD321PD },
+        { "vfnmadd132ps", 12, TOKEN_INSN, 0, 0, I_VFNMADD132PS },
+        { "vfnmadd132pd", 12, TOKEN_INSN, 0, 0, I_VFNMADD132PD },
+        { "vfnmadd312ps", 12, TOKEN_INSN, 0, 0, I_VFNMADD312PS },
+        { "vfnmadd312pd", 12, TOKEN_INSN, 0, 0, I_VFNMADD312PD },
+        { "vfnmadd213ps", 12, TOKEN_INSN, 0, 0, I_VFNMADD213PS },
+        { "vfnmadd213pd", 12, TOKEN_INSN, 0, 0, I_VFNMADD213PD },
+        { "vfnmadd123ps", 12, TOKEN_INSN, 0, 0, I_VFNMADD123PS },
+        { "vfnmadd123pd", 12, TOKEN_INSN, 0, 0, I_VFNMADD123PD },
+        { "vfnmadd231ps", 12, TOKEN_INSN, 0, 0, I_VFNMADD231PS },
+        { "vfnmadd231pd", 12, TOKEN_INSN, 0, 0, I_VFNMADD231PD },
+        { "vfnmadd321ps", 12, TOKEN_INSN, 0, 0, I_VFNMADD321PS },
+        { "vfnmadd321pd", 12, TOKEN_INSN, 0, 0, I_VFNMADD321PD },
+        { "vfnmsub132ps", 12, TOKEN_INSN, 0, 0, I_VFNMSUB132PS },
+        { "vfnmsub132pd", 12, TOKEN_INSN, 0, 0, I_VFNMSUB132PD },
+        { "vfnmsub312ps", 12, TOKEN_INSN, 0, 0, I_VFNMSUB312PS },
+        { "vfnmsub312pd", 12, TOKEN_INSN, 0, 0, I_VFNMSUB312PD },
+        { "vfnmsub213ps", 12, TOKEN_INSN, 0, 0, I_VFNMSUB213PS },
+        { "vfnmsub213pd", 12, TOKEN_INSN, 0, 0, I_VFNMSUB213PD },
+        { "vfnmsub123ps", 12, TOKEN_INSN, 0, 0, I_VFNMSUB123PS },
+        { "vfnmsub123pd", 12, TOKEN_INSN, 0, 0, I_VFNMSUB123PD },
+        { "vfnmsub231ps", 12, TOKEN_INSN, 0, 0, I_VFNMSUB231PS },
+        { "vfnmsub231pd", 12, TOKEN_INSN, 0, 0, I_VFNMSUB231PD },
+        { "vfnmsub321ps", 12, TOKEN_INSN, 0, 0, I_VFNMSUB321PS },
+        { "vfnmsub321pd", 12, TOKEN_INSN, 0, 0, I_VFNMSUB321PD },
+        { "vfmadd132ss", 11, TOKEN_INSN, 0, 0, I_VFMADD132SS },
+        { "vfmadd132sd", 11, TOKEN_INSN, 0, 0, I_VFMADD132SD },
+        { "vfmadd312ss", 11, TOKEN_INSN, 0, 0, I_VFMADD312SS },
+        { "vfmadd312sd", 11, TOKEN_INSN, 0, 0, I_VFMADD312SD },
+        { "vfmadd213ss", 11, TOKEN_INSN, 0, 0, I_VFMADD213SS },
+        { "vfmadd213sd", 11, TOKEN_INSN, 0, 0, I_VFMADD213SD },
+        { "vfmadd123ss", 11, TOKEN_INSN, 0, 0, I_VFMADD123SS },
+        { "vfmadd123sd", 11, TOKEN_INSN, 0, 0, I_VFMADD123SD },
+        { "vfmadd231ss", 11, TOKEN_INSN, 0, 0, I_VFMADD231SS },
+        { "vfmadd231sd", 11, TOKEN_INSN, 0, 0, I_VFMADD231SD },
+        { "vfmadd321ss", 11, TOKEN_INSN, 0, 0, I_VFMADD321SS },
+        { "vfmadd321sd", 11, TOKEN_INSN, 0, 0, I_VFMADD321SD },
+        { "vfmsub132ss", 11, TOKEN_INSN, 0, 0, I_VFMSUB132SS },
+        { "vfmsub132sd", 11, TOKEN_INSN, 0, 0, I_VFMSUB132SD },
+        { "vfmsub312ss", 11, TOKEN_INSN, 0, 0, I_VFMSUB312SS },
+        { "vfmsub312sd", 11, TOKEN_INSN, 0, 0, I_VFMSUB312SD },
+        { "vfmsub213ss", 11, TOKEN_INSN, 0, 0, I_VFMSUB213SS },
+        { "vfmsub213sd", 11, TOKEN_INSN, 0, 0, I_VFMSUB213SD },
+        { "vfmsub123ss", 11, TOKEN_INSN, 0, 0, I_VFMSUB123SS },
+        { "vfmsub123sd", 11, TOKEN_INSN, 0, 0, I_VFMSUB123SD },
+        { "vfmsub231ss", 11, TOKEN_INSN, 0, 0, I_VFMSUB231SS },
+        { "vfmsub231sd", 11, TOKEN_INSN, 0, 0, I_VFMSUB231SD },
+        { "vfmsub321ss", 11, TOKEN_INSN, 0, 0, I_VFMSUB321SS },
+        { "vfmsub321sd", 11, TOKEN_INSN, 0, 0, I_VFMSUB321SD },
+        { "vfnmadd132ss", 12, TOKEN_INSN, 0, 0, I_VFNMADD132SS },
+        { "vfnmadd132sd", 12, TOKEN_INSN, 0, 0, I_VFNMADD132SD },
+        { "vfnmadd312ss", 12, TOKEN_INSN, 0, 0, I_VFNMADD312SS },
+        { "vfnmadd312sd", 12, TOKEN_INSN, 0, 0, I_VFNMADD312SD },
+        { "vfnmadd213ss", 12, TOKEN_INSN, 0, 0, I_VFNMADD213SS },
+        { "vfnmadd213sd", 12, TOKEN_INSN, 0, 0, I_VFNMADD213SD },
+        { "vfnmadd123ss", 12, TOKEN_INSN, 0, 0, I_VFNMADD123SS },
+        { "vfnmadd123sd", 12, TOKEN_INSN, 0, 0, I_VFNMADD123SD },
+        { "vfnmadd231ss", 12, TOKEN_INSN, 0, 0, I_VFNMADD231SS },
+        { "vfnmadd231sd", 12, TOKEN_INSN, 0, 0, I_VFNMADD231SD },
+        { "vfnmadd321ss", 12, TOKEN_INSN, 0, 0, I_VFNMADD321SS },
+        { "vfnmadd321sd", 12, TOKEN_INSN, 0, 0, I_VFNMADD321SD },
+        { "vfnmsub132ss", 12, TOKEN_INSN, 0, 0, I_VFNMSUB132SS },
+        { "vfnmsub132sd", 12, TOKEN_INSN, 0, 0, I_VFNMSUB132SD },
+        { "vfnmsub312ss", 12, TOKEN_INSN, 0, 0, I_VFNMSUB312SS },
+        { "vfnmsub312sd", 12, TOKEN_INSN, 0, 0, I_VFNMSUB312SD },
+        { "vfnmsub213ss", 12, TOKEN_INSN, 0, 0, I_VFNMSUB213SS },
+        { "vfnmsub213sd", 12, TOKEN_INSN, 0, 0, I_VFNMSUB213SD },
+        { "vfnmsub123ss", 12, TOKEN_INSN, 0, 0, I_VFNMSUB123SS },
+        { "vfnmsub123sd", 12, TOKEN_INSN, 0, 0, I_VFNMSUB123SD },
+        { "vfnmsub231ss", 12, TOKEN_INSN, 0, 0, I_VFNMSUB231SS },
+        { "vfnmsub231sd", 12, TOKEN_INSN, 0, 0, I_VFNMSUB231SD },
+        { "vfnmsub321ss", 12, TOKEN_INSN, 0, 0, I_VFNMSUB321SS },
+        { "vfnmsub321sd", 12, TOKEN_INSN, 0, 0, I_VFNMSUB321SD },
+        { "rdfsbase", 8, TOKEN_INSN, 0, 0, I_RDFSBASE },
+        { "rdgsbase", 8, TOKEN_INSN, 0, 0, I_RDGSBASE },
+        { "rdrand", 6, TOKEN_INSN, 0, 0, I_RDRAND },
+        { "wrfsbase", 8, TOKEN_INSN, 0, 0, I_WRFSBASE },
+        { "wrgsbase", 8, TOKEN_INSN, 0, 0, I_WRGSBASE },
+        { "vcvtph2ps", 9, TOKEN_INSN, 0, 0, I_VCVTPH2PS },
+        { "vcvtps2ph", 9, TOKEN_INSN, 0, 0, I_VCVTPS2PH },
+        { "adcx", 4, TOKEN_INSN, 0, 0, I_ADCX },
+        { "adox", 4, TOKEN_INSN, 0, 0, I_ADOX },
+        { "rdseed", 6, TOKEN_INSN, 0, 0, I_RDSEED },
+        { "clac", 4, TOKEN_INSN, 0, 0, I_CLAC },
+        { "stac", 4, TOKEN_INSN, 0, 0, I_STAC },
+        { "xstore", 6, TOKEN_INSN, 0, 0, I_XSTORE },
+        { "xcryptecb", 9, TOKEN_INSN, 0, 0, I_XCRYPTECB },
+        { "xcryptcbc", 9, TOKEN_INSN, 0, 0, I_XCRYPTCBC },
+        { "xcryptctr", 9, TOKEN_INSN, 0, 0, I_XCRYPTCTR },
+        { "xcryptcfb", 9, TOKEN_INSN, 0, 0, I_XCRYPTCFB },
+        { "xcryptofb", 9, TOKEN_INSN, 0, 0, I_XCRYPTOFB },
+        { "montmul", 7, TOKEN_INSN, 0, 0, I_MONTMUL },
+        { "xsha1", 5, TOKEN_INSN, 0, 0, I_XSHA1 },
+        { "xsha256", 7, TOKEN_INSN, 0, 0, I_XSHA256 },
+        { "llwpcb", 6, TOKEN_INSN, 0, 0, I_LLWPCB },
+        { "slwpcb", 6, TOKEN_INSN, 0, 0, I_SLWPCB },
+        { "lwpval", 6, TOKEN_INSN, 0, 0, I_LWPVAL },
+        { "lwpins", 6, TOKEN_INSN, 0, 0, I_LWPINS },
+        { "vfmaddpd", 8, TOKEN_INSN, 0, 0, I_VFMADDPD },
+        { "vfmaddps", 8, TOKEN_INSN, 0, 0, I_VFMADDPS },
+        { "vfmaddsd", 8, TOKEN_INSN, 0, 0, I_VFMADDSD },
+        { "vfmaddss", 8, TOKEN_INSN, 0, 0, I_VFMADDSS },
+        { "vfmaddsubpd", 11, TOKEN_INSN, 0, 0, I_VFMADDSUBPD },
+        { "vfmaddsubps", 11, TOKEN_INSN, 0, 0, I_VFMADDSUBPS },
+        { "vfmsubaddpd", 11, TOKEN_INSN, 0, 0, I_VFMSUBADDPD },
+        { "vfmsubaddps", 11, TOKEN_INSN, 0, 0, I_VFMSUBADDPS },
+        { "vfmsubpd", 8, TOKEN_INSN, 0, 0, I_VFMSUBPD },
+        { "vfmsubps", 8, TOKEN_INSN, 0, 0, I_VFMSUBPS },
+        { "vfmsubsd", 8, TOKEN_INSN, 0, 0, I_VFMSUBSD },
+        { "vfmsubss", 8, TOKEN_INSN, 0, 0, I_VFMSUBSS },
+        { "vfnmaddpd", 9, TOKEN_INSN, 0, 0, I_VFNMADDPD },
+        { "vfnmaddps", 9, TOKEN_INSN, 0, 0, I_VFNMADDPS },
+        { "vfnmaddsd", 9, TOKEN_INSN, 0, 0, I_VFNMADDSD },
+        { "vfnmaddss", 9, TOKEN_INSN, 0, 0, I_VFNMADDSS },
+        { "vfnmsubpd", 9, TOKEN_INSN, 0, 0, I_VFNMSUBPD },
+        { "vfnmsubps", 9, TOKEN_INSN, 0, 0, I_VFNMSUBPS },
+        { "vfnmsubsd", 9, TOKEN_INSN, 0, 0, I_VFNMSUBSD },
+        { "vfnmsubss", 9, TOKEN_INSN, 0, 0, I_VFNMSUBSS },
+        { "vfrczpd", 7, TOKEN_INSN, 0, 0, I_VFRCZPD },
+        { "vfrczps", 7, TOKEN_INSN, 0, 0, I_VFRCZPS },
+        { "vfrczsd", 7, TOKEN_INSN, 0, 0, I_VFRCZSD },
+        { "vfrczss", 7, TOKEN_INSN, 0, 0, I_VFRCZSS },
+        { "vpcmov", 6, TOKEN_INSN, 0, 0, I_VPCMOV },
+        { "vpcomb", 6, TOKEN_INSN, 0, 0, I_VPCOMB },
+        { "vpcomd", 6, TOKEN_INSN, 0, 0, I_VPCOMD },
+        { "vpcomq", 6, TOKEN_INSN, 0, 0, I_VPCOMQ },
+        { "vpcomub", 7, TOKEN_INSN, 0, 0, I_VPCOMUB },
+        { "vpcomud", 7, TOKEN_INSN, 0, 0, I_VPCOMUD },
+        { "vpcomuq", 7, TOKEN_INSN, 0, 0, I_VPCOMUQ },
+        { "vpcomuw", 7, TOKEN_INSN, 0, 0, I_VPCOMUW },
+        { "vpcomw", 6, TOKEN_INSN, 0, 0, I_VPCOMW },
+        { "vphaddbd", 8, TOKEN_INSN, 0, 0, I_VPHADDBD },
+        { "vphaddbq", 8, TOKEN_INSN, 0, 0, I_VPHADDBQ },
+        { "vphaddbw", 8, TOKEN_INSN, 0, 0, I_VPHADDBW },
+        { "vphadddq", 8, TOKEN_INSN, 0, 0, I_VPHADDDQ },
+        { "vphaddubd", 9, TOKEN_INSN, 0, 0, I_VPHADDUBD },
+        { "vphaddubq", 9, TOKEN_INSN, 0, 0, I_VPHADDUBQ },
+        { "vphaddubw", 9, TOKEN_INSN, 0, 0, I_VPHADDUBW },
+        { "vphaddudq", 9, TOKEN_INSN, 0, 0, I_VPHADDUDQ },
+        { "vphadduwd", 9, TOKEN_INSN, 0, 0, I_VPHADDUWD },
+        { "vphadduwq", 9, TOKEN_INSN, 0, 0, I_VPHADDUWQ },
+        { "vphaddwd", 8, TOKEN_INSN, 0, 0, I_VPHADDWD },
+        { "vphaddwq", 8, TOKEN_INSN, 0, 0, I_VPHADDWQ },
+        { "vphsubbw", 8, TOKEN_INSN, 0, 0, I_VPHSUBBW },
+        { "vphsubdq", 8, TOKEN_INSN, 0, 0, I_VPHSUBDQ },
+        { "vphsubwd", 8, TOKEN_INSN, 0, 0, I_VPHSUBWD },
+        { "vpmacsdd", 8, TOKEN_INSN, 0, 0, I_VPMACSDD },
+        { "vpmacsdqh", 9, TOKEN_INSN, 0, 0, I_VPMACSDQH },
+        { "vpmacsdql", 9, TOKEN_INSN, 0, 0, I_VPMACSDQL },
+        { "vpmacssdd", 9, TOKEN_INSN, 0, 0, I_VPMACSSDD },
+        { "vpmacssdqh", 10, TOKEN_INSN, 0, 0, I_VPMACSSDQH },
+        { "vpmacssdql", 10, TOKEN_INSN, 0, 0, I_VPMACSSDQL },
+        { "vpmacsswd", 9, TOKEN_INSN, 0, 0, I_VPMACSSWD },
+        { "vpmacssww", 9, TOKEN_INSN, 0, 0, I_VPMACSSWW },
+        { "vpmacswd", 8, TOKEN_INSN, 0, 0, I_VPMACSWD },
+        { "vpmacsww", 8, TOKEN_INSN, 0, 0, I_VPMACSWW },
+        { "vpmadcsswd", 10, TOKEN_INSN, 0, 0, I_VPMADCSSWD },
+        { "vpmadcswd", 9, TOKEN_INSN, 0, 0, I_VPMADCSWD },
+        { "vpperm", 6, TOKEN_INSN, 0, 0, I_VPPERM },
+        { "vprotb", 6, TOKEN_INSN, 0, 0, I_VPROTB },
+        { "vprotd", 6, TOKEN_INSN, 0, 0, I_VPROTD },
+        { "vprotq", 6, TOKEN_INSN, 0, 0, I_VPROTQ },
+        { "vprotw", 6, TOKEN_INSN, 0, 0, I_VPROTW },
+        { "vpshab", 6, TOKEN_INSN, 0, 0, I_VPSHAB },
+        { "vpshad", 6, TOKEN_INSN, 0, 0, I_VPSHAD },
+        { "vpshaq", 6, TOKEN_INSN, 0, 0, I_VPSHAQ },
+        { "vpshaw", 6, TOKEN_INSN, 0, 0, I_VPSHAW },
+        { "vpshlb", 6, TOKEN_INSN, 0, 0, I_VPSHLB },
+        { "vpshld", 6, TOKEN_INSN, 0, 0, I_VPSHLD },
+        { "vpshlq", 6, TOKEN_INSN, 0, 0, I_VPSHLQ },
+        { "vpshlw", 6, TOKEN_INSN, 0, 0, I_VPSHLW },
+        { "vbroadcasti128", 14, TOKEN_INSN, 0, 0, I_VBROADCASTI128 },
+        { "vpblendd", 8, TOKEN_INSN, 0, 0, I_VPBLENDD },
+        { "vpbroadcastb", 12, TOKEN_INSN, 0, 0, I_VPBROADCASTB },
+        { "vpbroadcastw", 12, TOKEN_INSN, 0, 0, I_VPBROADCASTW },
+        { "vpbroadcastd", 12, TOKEN_INSN, 0, 0, I_VPBROADCASTD },
+        { "vpbroadcastq", 12, TOKEN_INSN, 0, 0, I_VPBROADCASTQ },
+        { "vpermd", 6, TOKEN_INSN, 0, 0, I_VPERMD },
+        { "vpermpd", 7, TOKEN_INSN, 0, 0, I_VPERMPD },
+        { "vpermps", 7, TOKEN_INSN, 0, 0, I_VPERMPS },
+        { "vpermq", 6, TOKEN_INSN, 0, 0, I_VPERMQ },
+        { "vperm2i128", 10, TOKEN_INSN, 0, 0, I_VPERM2I128 },
+        { "vextracti128", 12, TOKEN_INSN, 0, 0, I_VEXTRACTI128 },
+        { "vinserti128", 11, TOKEN_INSN, 0, 0, I_VINSERTI128 },
+        { "vpmaskmovd", 10, TOKEN_INSN, 0, 0, I_VPMASKMOVD },
+        { "vpmaskmovq", 10, TOKEN_INSN, 0, 0, I_VPMASKMOVQ },
+        { "vpsllvd", 7, TOKEN_INSN, 0, 0, I_VPSLLVD },
+        { "vpsllvq", 7, TOKEN_INSN, 0, 0, I_VPSLLVQ },
+        { "vpsravd", 7, TOKEN_INSN, 0, 0, I_VPSRAVD },
+        { "vpsrlvd", 7, TOKEN_INSN, 0, 0, I_VPSRLVD },
+        { "vpsrlvq", 7, TOKEN_INSN, 0, 0, I_VPSRLVQ },
+        { "vgatherdpd", 10, TOKEN_INSN, 0, 0, I_VGATHERDPD },
+        { "vgatherqpd", 10, TOKEN_INSN, 0, 0, I_VGATHERQPD },
+        { "vgatherdps", 10, TOKEN_INSN, 0, 0, I_VGATHERDPS },
+        { "vgatherqps", 10, TOKEN_INSN, 0, 0, I_VGATHERQPS },
+        { "vpgatherdd", 10, TOKEN_INSN, 0, 0, I_VPGATHERDD },
+        { "vpgatherqd", 10, TOKEN_INSN, 0, 0, I_VPGATHERQD },
+        { "vpgatherdq", 10, TOKEN_INSN, 0, 0, I_VPGATHERDQ },
+        { "vpgatherqq", 10, TOKEN_INSN, 0, 0, I_VPGATHERQQ },
+        { "xabort", 6, TOKEN_INSN, 0, 0, I_XABORT },
+        { "xbegin", 6, TOKEN_INSN, 0, 0, I_XBEGIN },
+        { "xend", 4, TOKEN_INSN, 0, 0, I_XEND },
+        { "xtest", 5, TOKEN_INSN, 0, 0, I_XTEST },
+        { "andn", 4, TOKEN_INSN, 0, 0, I_ANDN },
+        { "bextr", 5, TOKEN_INSN, 0, 0, I_BEXTR },
+        { "blci", 4, TOKEN_INSN, 0, 0, I_BLCI },
+        { "blcic", 5, TOKEN_INSN, 0, 0, I_BLCIC },
+        { "blsi", 4, TOKEN_INSN, 0, 0, I_BLSI },
+        { "blsic", 5, TOKEN_INSN, 0, 0, I_BLSIC },
+        { "blcfill", 7, TOKEN_INSN, 0, 0, I_BLCFILL },
+        { "blsfill", 7, TOKEN_INSN, 0, 0, I_BLSFILL },
+        { "blcmsk", 6, TOKEN_INSN, 0, 0, I_BLCMSK },
+        { "blsmsk", 6, TOKEN_INSN, 0, 0, I_BLSMSK },
+        { "blsr", 4, TOKEN_INSN, 0, 0, I_BLSR },
+        { "blcs", 4, TOKEN_INSN, 0, 0, I_BLCS },
+        { "bzhi", 4, TOKEN_INSN, 0, 0, I_BZHI },
+        { "mulx", 4, TOKEN_INSN, 0, 0, I_MULX },
+        { "pdep", 4, TOKEN_INSN, 0, 0, I_PDEP },
+        { "pext", 4, TOKEN_INSN, 0, 0, I_PEXT },
+        { "rorx", 4, TOKEN_INSN, 0, 0, I_RORX },
+        { "sarx", 4, TOKEN_INSN, 0, 0, I_SARX },
+        { "shlx", 4, TOKEN_INSN, 0, 0, I_SHLX },
+        { "shrx", 4, TOKEN_INSN, 0, 0, I_SHRX },
+        { "tzcnt", 5, TOKEN_INSN, 0, 0, I_TZCNT },
+        { "tzmsk", 5, TOKEN_INSN, 0, 0, I_TZMSK },
+        { "t1mskc", 6, TOKEN_INSN, 0, 0, I_T1MSKC },
+        { "prefetchwt1", 11, TOKEN_INSN, 0, 0, I_PREFETCHWT1 },
+        { "bndmk", 5, TOKEN_INSN, 0, 0, I_BNDMK },
+        { "bndcl", 5, TOKEN_INSN, 0, 0, I_BNDCL },
+        { "bndcu", 5, TOKEN_INSN, 0, 0, I_BNDCU },
+        { "bndcn", 5, TOKEN_INSN, 0, 0, I_BNDCN },
+        { "bndmov", 6, TOKEN_INSN, 0, 0, I_BNDMOV },
+        { "bndldx", 6, TOKEN_INSN, 0, 0, I_BNDLDX },
+        { "bndstx", 6, TOKEN_INSN, 0, 0, I_BNDSTX },
+        { "sha1msg1", 8, TOKEN_INSN, 0, 0, I_SHA1MSG1 },
+        { "sha1msg2", 8, TOKEN_INSN, 0, 0, I_SHA1MSG2 },
+        { "sha1nexte", 9, TOKEN_INSN, 0, 0, I_SHA1NEXTE },
+        { "sha1rnds4", 9, TOKEN_INSN, 0, 0, I_SHA1RNDS4 },
+        { "sha256msg1", 10, TOKEN_INSN, 0, 0, I_SHA256MSG1 },
+        { "sha256msg2", 10, TOKEN_INSN, 0, 0, I_SHA256MSG2 },
+        { "sha256rnds2", 11, TOKEN_INSN, 0, 0, I_SHA256RNDS2 },
+        { "vsha512msg1", 11, TOKEN_INSN, 0, 0, I_VSHA512MSG1 },
+        { "vsha512msg2", 11, TOKEN_INSN, 0, 0, I_VSHA512MSG2 },
+        { "vsha512rnds2", 12, TOKEN_INSN, 0, 0, I_VSHA512RNDS2 },
+        { "vsm3msg1", 8, TOKEN_INSN, 0, 0, I_VSM3MSG1 },
+        { "vsm3msg2", 8, TOKEN_INSN, 0, 0, I_VSM3MSG2 },
+        { "vsm3rnds2", 9, TOKEN_INSN, 0, 0, I_VSM3RNDS2 },
+        { "vsm4key4", 8, TOKEN_INSN, 0, 0, I_VSM4KEY4 },
+        { "vsm4rnds4", 9, TOKEN_INSN, 0, 0, I_VSM4RNDS4 },
+        { "vbcstnebf16ps", 13, TOKEN_INSN, 0, 0, I_VBCSTNEBF16PS },
+        { "vbcstnesh2ps", 12, TOKEN_INSN, 0, 0, I_VBCSTNESH2PS },
+        { "vcvtneebf162ps", 14, TOKEN_INSN, 0, 0, I_VCVTNEEBF162PS },
+        { "vcvtneeph2ps", 12, TOKEN_INSN, 0, 0, I_VCVTNEEPH2PS },
+        { "vcvtneobf162ps", 14, TOKEN_INSN, 0, 0, I_VCVTNEOBF162PS },
+        { "vcvtneoph2ps", 12, TOKEN_INSN, 0, 0, I_VCVTNEOPH2PS },
+        { "vcvtneps2bf16", 13, TOKEN_INSN, 0, 0, I_VCVTNEPS2BF16 },
+        { "vpdpbssd", 8, TOKEN_INSN, 0, 0, I_VPDPBSSD },
+        { "vpdpbssds", 9, TOKEN_INSN, 0, 0, I_VPDPBSSDS },
+        { "vpdpbsud", 8, TOKEN_INSN, 0, 0, I_VPDPBSUD },
+        { "vpdpbsuds", 9, TOKEN_INSN, 0, 0, I_VPDPBSUDS },
+        { "vpdpbuud", 8, TOKEN_INSN, 0, 0, I_VPDPBUUD },
+        { "vpdpbuuds", 9, TOKEN_INSN, 0, 0, I_VPDPBUUDS },
+        { "vpmadd52huq", 11, TOKEN_INSN, 0, 0, I_VPMADD52HUQ },
+        { "vpmadd52luq", 11, TOKEN_INSN, 0, 0, I_VPMADD52LUQ },
+        { "kaddb", 5, TOKEN_INSN, 0, 0, I_KADDB },
+        { "kaddd", 5, TOKEN_INSN, 0, 0, I_KADDD },
+        { "kaddq", 5, TOKEN_INSN, 0, 0, I_KADDQ },
+        { "kaddw", 5, TOKEN_INSN, 0, 0, I_KADDW },
+        { "kandb", 5, TOKEN_INSN, 0, 0, I_KANDB },
+        { "kandd", 5, TOKEN_INSN, 0, 0, I_KANDD },
+        { "kandnb", 6, TOKEN_INSN, 0, 0, I_KANDNB },
+        { "kandnd", 6, TOKEN_INSN, 0, 0, I_KANDND },
+        { "kandnq", 6, TOKEN_INSN, 0, 0, I_KANDNQ },
+        { "kandnw", 6, TOKEN_INSN, 0, 0, I_KANDNW },
+        { "kandq", 5, TOKEN_INSN, 0, 0, I_KANDQ },
+        { "kandw", 5, TOKEN_INSN, 0, 0, I_KANDW },
+        { "kmovb", 5, TOKEN_INSN, 0, 0, I_KMOVB },
+        { "kmovd", 5, TOKEN_INSN, 0, 0, I_KMOVD },
+        { "kmovq", 5, TOKEN_INSN, 0, 0, I_KMOVQ },
+        { "kmovw", 5, TOKEN_INSN, 0, 0, I_KMOVW },
+        { "knotb", 5, TOKEN_INSN, 0, 0, I_KNOTB },
+        { "knotd", 5, TOKEN_INSN, 0, 0, I_KNOTD },
+        { "knotq", 5, TOKEN_INSN, 0, 0, I_KNOTQ },
+        { "knotw", 5, TOKEN_INSN, 0, 0, I_KNOTW },
+        { "korb", 4, TOKEN_INSN, 0, 0, I_KORB },
+        { "kord", 4, TOKEN_INSN, 0, 0, I_KORD },
+        { "korq", 4, TOKEN_INSN, 0, 0, I_KORQ },
+        { "korw", 4, TOKEN_INSN, 0, 0, I_KORW },
+        { "kortestb", 8, TOKEN_INSN, 0, 0, I_KORTESTB },
+        { "kortestd", 8, TOKEN_INSN, 0, 0, I_KORTESTD },
+        { "kortestq", 8, TOKEN_INSN, 0, 0, I_KORTESTQ },
+        { "kortestw", 8, TOKEN_INSN, 0, 0, I_KORTESTW },
+        { "kshiftlb", 8, TOKEN_INSN, 0, 0, I_KSHIFTLB },
+        { "kshiftld", 8, TOKEN_INSN, 0, 0, I_KSHIFTLD },
+        { "kshiftlq", 8, TOKEN_INSN, 0, 0, I_KSHIFTLQ },
+        { "kshiftlw", 8, TOKEN_INSN, 0, 0, I_KSHIFTLW },
+        { "kshiftrb", 8, TOKEN_INSN, 0, 0, I_KSHIFTRB },
+        { "kshiftrd", 8, TOKEN_INSN, 0, 0, I_KSHIFTRD },
+        { "kshiftrq", 8, TOKEN_INSN, 0, 0, I_KSHIFTRQ },
+        { "kshiftrw", 8, TOKEN_INSN, 0, 0, I_KSHIFTRW },
+        { "ktestb", 6, TOKEN_INSN, 0, 0, I_KTESTB },
+        { "ktestd", 6, TOKEN_INSN, 0, 0, I_KTESTD },
+        { "ktestq", 6, TOKEN_INSN, 0, 0, I_KTESTQ },
+        { "ktestw", 6, TOKEN_INSN, 0, 0, I_KTESTW },
+        { "kunpckbw", 8, TOKEN_INSN, 0, 0, I_KUNPCKBW },
+        { "kunpckdq", 8, TOKEN_INSN, 0, 0, I_KUNPCKDQ },
+        { "kunpckwd", 8, TOKEN_INSN, 0, 0, I_KUNPCKWD },
+        { "kxnorb", 6, TOKEN_INSN, 0, 0, I_KXNORB },
+        { "kxnord", 6, TOKEN_INSN, 0, 0, I_KXNORD },
+        { "kxnorq", 6, TOKEN_INSN, 0, 0, I_KXNORQ },
+        { "kxnorw", 6, TOKEN_INSN, 0, 0, I_KXNORW },
+        { "kxorb", 5, TOKEN_INSN, 0, 0, I_KXORB },
+        { "kxord", 5, TOKEN_INSN, 0, 0, I_KXORD },
+        { "kxorq", 5, TOKEN_INSN, 0, 0, I_KXORQ },
+        { "kxorw", 5, TOKEN_INSN, 0, 0, I_KXORW },
+        { "kadd", 4, TOKEN_INSN, 0, 0, I_KADD },
+        { "kand", 4, TOKEN_INSN, 0, 0, I_KAND },
+        { "kandn", 5, TOKEN_INSN, 0, 0, I_KANDN },
+        { "kmov", 4, TOKEN_INSN, 0, 0, I_KMOV },
+        { "knot", 4, TOKEN_INSN, 0, 0, I_KNOT },
+        { "kor", 3, TOKEN_INSN, 0, 0, I_KOR },
+        { "kortest", 7, TOKEN_INSN, 0, 0, I_KORTEST },
+        { "kshiftl", 7, TOKEN_INSN, 0, 0, I_KSHIFTL },
+        { "kshiftr", 7, TOKEN_INSN, 0, 0, I_KSHIFTR },
+        { "ktest", 5, TOKEN_INSN, 0, 0, I_KTEST },
+        { "kunpck", 6, TOKEN_INSN, 0, 0, I_KUNPCK },
+        { "kxnor", 5, TOKEN_INSN, 0, 0, I_KXNOR },
+        { "kxor", 4, TOKEN_INSN, 0, 0, I_KXOR },
+        { "valignd", 7, TOKEN_INSN, 0, 0, I_VALIGND },
+        { "valignq", 7, TOKEN_INSN, 0, 0, I_VALIGNQ },
+        { "vblendmpd", 9, TOKEN_INSN, 0, 0, I_VBLENDMPD },
+        { "vblendmps", 9, TOKEN_INSN, 0, 0, I_VBLENDMPS },
+        { "vbroadcastf32x2", 15, TOKEN_INSN, 0, 0, I_VBROADCASTF32X2 },
+        { "vbroadcastf32x4", 15, TOKEN_INSN, 0, 0, I_VBROADCASTF32X4 },
+        { "vbroadcastf32x8", 15, TOKEN_INSN, 0, 0, I_VBROADCASTF32X8 },
+        { "vbroadcastf64x2", 15, TOKEN_INSN, 0, 0, I_VBROADCASTF64X2 },
+        { "vbroadcastf64x4", 15, TOKEN_INSN, 0, 0, I_VBROADCASTF64X4 },
+        { "vbroadcasti32x2", 15, TOKEN_INSN, 0, 0, I_VBROADCASTI32X2 },
+        { "vbroadcasti32x4", 15, TOKEN_INSN, 0, 0, I_VBROADCASTI32X4 },
+        { "vbroadcasti32x8", 15, TOKEN_INSN, 0, 0, I_VBROADCASTI32X8 },
+        { "vbroadcasti64x2", 15, TOKEN_INSN, 0, 0, I_VBROADCASTI64X2 },
+        { "vbroadcasti64x4", 15, TOKEN_INSN, 0, 0, I_VBROADCASTI64X4 },
+        { "vcmpeq_oqpd", 11, TOKEN_INSN, 0, 0, I_VCMPEQ_OQPD },
+        { "vcmpeq_oqps", 11, TOKEN_INSN, 0, 0, I_VCMPEQ_OQPS },
+        { "vcmpeq_oqsd", 11, TOKEN_INSN, 0, 0, I_VCMPEQ_OQSD },
+        { "vcmpeq_oqss", 11, TOKEN_INSN, 0, 0, I_VCMPEQ_OQSS },
+        { "vcompresspd", 11, TOKEN_INSN, 0, 0, I_VCOMPRESSPD },
+        { "vcompressps", 11, TOKEN_INSN, 0, 0, I_VCOMPRESSPS },
+        { "vcvtpd2qq", 9, TOKEN_INSN, 0, 0, I_VCVTPD2QQ },
+        { "vcvtpd2udq", 10, TOKEN_INSN, 0, 0, I_VCVTPD2UDQ },
+        { "vcvtpd2uqq", 10, TOKEN_INSN, 0, 0, I_VCVTPD2UQQ },
+        { "vcvtps2qq", 9, TOKEN_INSN, 0, 0, I_VCVTPS2QQ },
+        { "vcvtps2udq", 10, TOKEN_INSN, 0, 0, I_VCVTPS2UDQ },
+        { "vcvtps2uqq", 10, TOKEN_INSN, 0, 0, I_VCVTPS2UQQ },
+        { "vcvtqq2pd", 9, TOKEN_INSN, 0, 0, I_VCVTQQ2PD },
+        { "vcvtqq2ps", 9, TOKEN_INSN, 0, 0, I_VCVTQQ2PS },
+        { "vcvtsd2usi", 10, TOKEN_INSN, 0, 0, I_VCVTSD2USI },
+        { "vcvtss2usi", 10, TOKEN_INSN, 0, 0, I_VCVTSS2USI },
+        { "vcvttpd2qq", 10, TOKEN_INSN, 0, 0, I_VCVTTPD2QQ },
+        { "vcvttpd2udq", 11, TOKEN_INSN, 0, 0, I_VCVTTPD2UDQ },
+        { "vcvttpd2uqq", 11, TOKEN_INSN, 0, 0, I_VCVTTPD2UQQ },
+        { "vcvttps2qq", 10, TOKEN_INSN, 0, 0, I_VCVTTPS2QQ },
+        { "vcvttps2udq", 11, TOKEN_INSN, 0, 0, I_VCVTTPS2UDQ },
+        { "vcvttps2uqq", 11, TOKEN_INSN, 0, 0, I_VCVTTPS2UQQ },
+        { "vcvttsd2usi", 11, TOKEN_INSN, 0, 0, I_VCVTTSD2USI },
+        { "vcvttss2usi", 11, TOKEN_INSN, 0, 0, I_VCVTTSS2USI },
+        { "vcvtudq2pd", 10, TOKEN_INSN, 0, 0, I_VCVTUDQ2PD },
+        { "vcvtudq2ps", 10, TOKEN_INSN, 0, 0, I_VCVTUDQ2PS },
+        { "vcvtuqq2pd", 10, TOKEN_INSN, 0, 0, I_VCVTUQQ2PD },
+        { "vcvtuqq2ps", 10, TOKEN_INSN, 0, 0, I_VCVTUQQ2PS },
+        { "vcvtusi2sd", 10, TOKEN_INSN, 0, 0, I_VCVTUSI2SD },
+        { "vcvtusi2ss", 10, TOKEN_INSN, 0, 0, I_VCVTUSI2SS },
+        { "vdbpsadbw", 9, TOKEN_INSN, 0, 0, I_VDBPSADBW },
+        { "vexp2pd", 7, TOKEN_INSN, 0, 0, I_VEXP2PD },
+        { "vexp2ps", 7, TOKEN_INSN, 0, 0, I_VEXP2PS },
+        { "vexpandpd", 9, TOKEN_INSN, 0, 0, I_VEXPANDPD },
+        { "vexpandps", 9, TOKEN_INSN, 0, 0, I_VEXPANDPS },
+        { "vextractf32x4", 13, TOKEN_INSN, 0, 0, I_VEXTRACTF32X4 },
+        { "vextractf32x8", 13, TOKEN_INSN, 0, 0, I_VEXTRACTF32X8 },
+        { "vextractf64x2", 13, TOKEN_INSN, 0, 0, I_VEXTRACTF64X2 },
+        { "vextractf64x4", 13, TOKEN_INSN, 0, 0, I_VEXTRACTF64X4 },
+        { "vextracti32x4", 13, TOKEN_INSN, 0, 0, I_VEXTRACTI32X4 },
+        { "vextracti32x8", 13, TOKEN_INSN, 0, 0, I_VEXTRACTI32X8 },
+        { "vextracti64x2", 13, TOKEN_INSN, 0, 0, I_VEXTRACTI64X2 },
+        { "vextracti64x4", 13, TOKEN_INSN, 0, 0, I_VEXTRACTI64X4 },
+        { "vfixupimmpd", 11, TOKEN_INSN, 0, 0, I_VFIXUPIMMPD },
+        { "vfixupimmps", 11, TOKEN_INSN, 0, 0, I_VFIXUPIMMPS },
+        { "vfixupimmsd", 11, TOKEN_INSN, 0, 0, I_VFIXUPIMMSD },
+        { "vfixupimmss", 11, TOKEN_INSN, 0, 0, I_VFIXUPIMMSS },
+        { "vfpclasspd", 10, TOKEN_INSN, 0, 0, I_VFPCLASSPD },
+        { "vfpclassps", 10, TOKEN_INSN, 0, 0, I_VFPCLASSPS },
+        { "vfpclasssd", 10, TOKEN_INSN, 0, 0, I_VFPCLASSSD },
+        { "vfpclassss", 10, TOKEN_INSN, 0, 0, I_VFPCLASSSS },
+        { "vgatherpf0dpd", 13, TOKEN_INSN, 0, 0, I_VGATHERPF0DPD },
+        { "vgatherpf0dps", 13, TOKEN_INSN, 0, 0, I_VGATHERPF0DPS },
+        { "vgatherpf0qpd", 13, TOKEN_INSN, 0, 0, I_VGATHERPF0QPD },
+        { "vgatherpf0qps", 13, TOKEN_INSN, 0, 0, I_VGATHERPF0QPS },
+        { "vgatherpf1dpd", 13, TOKEN_INSN, 0, 0, I_VGATHERPF1DPD },
+        { "vgatherpf1dps", 13, TOKEN_INSN, 0, 0, I_VGATHERPF1DPS },
+        { "vgatherpf1qpd", 13, TOKEN_INSN, 0, 0, I_VGATHERPF1QPD },
+        { "vgatherpf1qps", 13, TOKEN_INSN, 0, 0, I_VGATHERPF1QPS },
+        { "vgetexppd", 9, TOKEN_INSN, 0, 0, I_VGETEXPPD },
+        { "vgetexpps", 9, TOKEN_INSN, 0, 0, I_VGETEXPPS },
+        { "vgetexpsd", 9, TOKEN_INSN, 0, 0, I_VGETEXPSD },
+        { "vgetexpss", 9, TOKEN_INSN, 0, 0, I_VGETEXPSS },
+        { "vgetmantpd", 10, TOKEN_INSN, 0, 0, I_VGETMANTPD },
+        { "vgetmantps", 10, TOKEN_INSN, 0, 0, I_VGETMANTPS },
+        { "vgetmantsd", 10, TOKEN_INSN, 0, 0, I_VGETMANTSD },
+        { "vgetmantss", 10, TOKEN_INSN, 0, 0, I_VGETMANTSS },
+        { "vinsertf32x4", 12, TOKEN_INSN, 0, 0, I_VINSERTF32X4 },
+        { "vinsertf32x8", 12, TOKEN_INSN, 0, 0, I_VINSERTF32X8 },
+        { "vinsertf64x2", 12, TOKEN_INSN, 0, 0, I_VINSERTF64X2 },
+        { "vinsertf64x4", 12, TOKEN_INSN, 0, 0, I_VINSERTF64X4 },
+        { "vinserti32x4", 12, TOKEN_INSN, 0, 0, I_VINSERTI32X4 },
+        { "vinserti32x8", 12, TOKEN_INSN, 0, 0, I_VINSERTI32X8 },
+        { "vinserti64x2", 12, TOKEN_INSN, 0, 0, I_VINSERTI64X2 },
+        { "vinserti64x4", 12, TOKEN_INSN, 0, 0, I_VINSERTI64X4 },
+        { "vmovdqa32", 9, TOKEN_INSN, 0, 0, I_VMOVDQA32 },
+        { "vmovdqa64", 9, TOKEN_INSN, 0, 0, I_VMOVDQA64 },
+        { "vmovdqu16", 9, TOKEN_INSN, 0, 0, I_VMOVDQU16 },
+        { "vmovdqu32", 9, TOKEN_INSN, 0, 0, I_VMOVDQU32 },
+        { "vmovdqu64", 9, TOKEN_INSN, 0, 0, I_VMOVDQU64 },
+        { "vmovdqu8", 8, TOKEN_INSN, 0, 0, I_VMOVDQU8 },
+        { "vpabsq", 6, TOKEN_INSN, 0, 0, I_VPABSQ },
+        { "vpandd", 6, TOKEN_INSN, 0, 0, I_VPANDD },
+        { "vpandnd", 7, TOKEN_INSN, 0, 0, I_VPANDND },
+        { "vpandnq", 7, TOKEN_INSN, 0, 0, I_VPANDNQ },
+        { "vpandq", 6, TOKEN_INSN, 0, 0, I_VPANDQ },
+        { "vpblendmb", 9, TOKEN_INSN, 0, 0, I_VPBLENDMB },
+        { "vpblendmd", 9, TOKEN_INSN, 0, 0, I_VPBLENDMD },
+        { "vpblendmq", 9, TOKEN_INSN, 0, 0, I_VPBLENDMQ },
+        { "vpblendmw", 9, TOKEN_INSN, 0, 0, I_VPBLENDMW },
+        { "vpbroadcastmb2q", 15, TOKEN_INSN, 0, 0, I_VPBROADCASTMB2Q },
+        { "vpbroadcastmw2d", 15, TOKEN_INSN, 0, 0, I_VPBROADCASTMW2D },
+        { "vpcmpequb", 9, TOKEN_INSN, 0, 0, I_VPCMPEQUB },
+        { "vpcmpequd", 9, TOKEN_INSN, 0, 0, I_VPCMPEQUD },
+        { "vpcmpequq", 9, TOKEN_INSN, 0, 0, I_VPCMPEQUQ },
+        { "vpcmpequw", 9, TOKEN_INSN, 0, 0, I_VPCMPEQUW },
+        { "vpcmpgeb", 8, TOKEN_INSN, 0, 0, I_VPCMPGEB },
+        { "vpcmpged", 8, TOKEN_INSN, 0, 0, I_VPCMPGED },
+        { "vpcmpgeq", 8, TOKEN_INSN, 0, 0, I_VPCMPGEQ },
+        { "vpcmpgeub", 9, TOKEN_INSN, 0, 0, I_VPCMPGEUB },
+        { "vpcmpgeud", 9, TOKEN_INSN, 0, 0, I_VPCMPGEUD },
+        { "vpcmpgeuq", 9, TOKEN_INSN, 0, 0, I_VPCMPGEUQ },
+        { "vpcmpgeuw", 9, TOKEN_INSN, 0, 0, I_VPCMPGEUW },
+        { "vpcmpgew", 8, TOKEN_INSN, 0, 0, I_VPCMPGEW },
+        { "vpcmpgtub", 9, TOKEN_INSN, 0, 0, I_VPCMPGTUB },
+        { "vpcmpgtud", 9, TOKEN_INSN, 0, 0, I_VPCMPGTUD },
+        { "vpcmpgtuq", 9, TOKEN_INSN, 0, 0, I_VPCMPGTUQ },
+        { "vpcmpgtuw", 9, TOKEN_INSN, 0, 0, I_VPCMPGTUW },
+        { "vpcmpleb", 8, TOKEN_INSN, 0, 0, I_VPCMPLEB },
+        { "vpcmpled", 8, TOKEN_INSN, 0, 0, I_VPCMPLED },
+        { "vpcmpleq", 8, TOKEN_INSN, 0, 0, I_VPCMPLEQ },
+        { "vpcmpleub", 9, TOKEN_INSN, 0, 0, I_VPCMPLEUB },
+        { "vpcmpleud", 9, TOKEN_INSN, 0, 0, I_VPCMPLEUD },
+        { "vpcmpleuq", 9, TOKEN_INSN, 0, 0, I_VPCMPLEUQ },
+        { "vpcmpleuw", 9, TOKEN_INSN, 0, 0, I_VPCMPLEUW },
+        { "vpcmplew", 8, TOKEN_INSN, 0, 0, I_VPCMPLEW },
+        { "vpcmpltb", 8, TOKEN_INSN, 0, 0, I_VPCMPLTB },
+        { "vpcmpltd", 8, TOKEN_INSN, 0, 0, I_VPCMPLTD },
+        { "vpcmpltq", 8, TOKEN_INSN, 0, 0, I_VPCMPLTQ },
+        { "vpcmpltub", 9, TOKEN_INSN, 0, 0, I_VPCMPLTUB },
+        { "vpcmpltud", 9, TOKEN_INSN, 0, 0, I_VPCMPLTUD },
+        { "vpcmpltuq", 9, TOKEN_INSN, 0, 0, I_VPCMPLTUQ },
+        { "vpcmpltuw", 9, TOKEN_INSN, 0, 0, I_VPCMPLTUW },
+        { "vpcmpltw", 8, TOKEN_INSN, 0, 0, I_VPCMPLTW },
+        { "vpcmpneqb", 9, TOKEN_INSN, 0, 0, I_VPCMPNEQB },
+        { "vpcmpneqd", 9, TOKEN_INSN, 0, 0, I_VPCMPNEQD },
+        { "vpcmpneqq", 9, TOKEN_INSN, 0, 0, I_VPCMPNEQQ },
+        { "vpcmpnequb", 10, TOKEN_INSN, 0, 0, I_VPCMPNEQUB },
+        { "vpcmpnequd", 10, TOKEN_INSN, 0, 0, I_VPCMPNEQUD },
+        { "vpcmpnequq", 10, TOKEN_INSN, 0, 0, I_VPCMPNEQUQ },
+        { "vpcmpnequw", 10, TOKEN_INSN, 0, 0, I_VPCMPNEQUW },
+        { "vpcmpneqw", 9, TOKEN_INSN, 0, 0, I_VPCMPNEQW },
+        { "vpcmpngtb", 9, TOKEN_INSN, 0, 0, I_VPCMPNGTB },
+        { "vpcmpngtd", 9, TOKEN_INSN, 0, 0, I_VPCMPNGTD },
+        { "vpcmpngtq", 9, TOKEN_INSN, 0, 0, I_VPCMPNGTQ },
+        { "vpcmpngtub", 10, TOKEN_INSN, 0, 0, I_VPCMPNGTUB },
+        { "vpcmpngtud", 10, TOKEN_INSN, 0, 0, I_VPCMPNGTUD },
+        { "vpcmpngtuq", 10, TOKEN_INSN, 0, 0, I_VPCMPNGTUQ },
+        { "vpcmpngtuw", 10, TOKEN_INSN, 0, 0, I_VPCMPNGTUW },
+        { "vpcmpngtw", 9, TOKEN_INSN, 0, 0, I_VPCMPNGTW },
+        { "vpcmpnleb", 9, TOKEN_INSN, 0, 0, I_VPCMPNLEB },
+        { "vpcmpnled", 9, TOKEN_INSN, 0, 0, I_VPCMPNLED },
+        { "vpcmpnleq", 9, TOKEN_INSN, 0, 0, I_VPCMPNLEQ },
+        { "vpcmpnleub", 10, TOKEN_INSN, 0, 0, I_VPCMPNLEUB },
+        { "vpcmpnleud", 10, TOKEN_INSN, 0, 0, I_VPCMPNLEUD },
+        { "vpcmpnleuq", 10, TOKEN_INSN, 0, 0, I_VPCMPNLEUQ },
+        { "vpcmpnleuw", 10, TOKEN_INSN, 0, 0, I_VPCMPNLEUW },
+        { "vpcmpnlew", 9, TOKEN_INSN, 0, 0, I_VPCMPNLEW },
+        { "vpcmpnltb", 9, TOKEN_INSN, 0, 0, I_VPCMPNLTB },
+        { "vpcmpnltd", 9, TOKEN_INSN, 0, 0, I_VPCMPNLTD },
+        { "vpcmpnltq", 9, TOKEN_INSN, 0, 0, I_VPCMPNLTQ },
+        { "vpcmpnltub", 10, TOKEN_INSN, 0, 0, I_VPCMPNLTUB },
+        { "vpcmpnltud", 10, TOKEN_INSN, 0, 0, I_VPCMPNLTUD },
+        { "vpcmpnltuq", 10, TOKEN_INSN, 0, 0, I_VPCMPNLTUQ },
+        { "vpcmpnltuw", 10, TOKEN_INSN, 0, 0, I_VPCMPNLTUW },
+        { "vpcmpnltw", 9, TOKEN_INSN, 0, 0, I_VPCMPNLTW },
+        { "vpcmpb", 6, TOKEN_INSN, 0, 0, I_VPCMPB },
+        { "vpcmpd", 6, TOKEN_INSN, 0, 0, I_VPCMPD },
+        { "vpcmpq", 6, TOKEN_INSN, 0, 0, I_VPCMPQ },
+        { "vpcmpub", 7, TOKEN_INSN, 0, 0, I_VPCMPUB },
+        { "vpcmpud", 7, TOKEN_INSN, 0, 0, I_VPCMPUD },
+        { "vpcmpuq", 7, TOKEN_INSN, 0, 0, I_VPCMPUQ },
+        { "vpcmpuw", 7, TOKEN_INSN, 0, 0, I_VPCMPUW },
+        { "vpcmpw", 6, TOKEN_INSN, 0, 0, I_VPCMPW },
+        { "vpcompressd", 11, TOKEN_INSN, 0, 0, I_VPCOMPRESSD },
+        { "vpcompressq", 11, TOKEN_INSN, 0, 0, I_VPCOMPRESSQ },
+        { "vpconflictd", 11, TOKEN_INSN, 0, 0, I_VPCONFLICTD },
+        { "vpconflictq", 11, TOKEN_INSN, 0, 0, I_VPCONFLICTQ },
+        { "vpermb", 6, TOKEN_INSN, 0, 0, I_VPERMB },
+        { "vpermi2b", 8, TOKEN_INSN, 0, 0, I_VPERMI2B },
+        { "vpermi2d", 8, TOKEN_INSN, 0, 0, I_VPERMI2D },
+        { "vpermi2pd", 9, TOKEN_INSN, 0, 0, I_VPERMI2PD },
+        { "vpermi2ps", 9, TOKEN_INSN, 0, 0, I_VPERMI2PS },
+        { "vpermi2q", 8, TOKEN_INSN, 0, 0, I_VPERMI2Q },
+        { "vpermi2w", 8, TOKEN_INSN, 0, 0, I_VPERMI2W },
+        { "vpermt2b", 8, TOKEN_INSN, 0, 0, I_VPERMT2B },
+        { "vpermt2d", 8, TOKEN_INSN, 0, 0, I_VPERMT2D },
+        { "vpermt2pd", 9, TOKEN_INSN, 0, 0, I_VPERMT2PD },
+        { "vpermt2ps", 9, TOKEN_INSN, 0, 0, I_VPERMT2PS },
+        { "vpermt2q", 8, TOKEN_INSN, 0, 0, I_VPERMT2Q },
+        { "vpermt2w", 8, TOKEN_INSN, 0, 0, I_VPERMT2W },
+        { "vpermw", 6, TOKEN_INSN, 0, 0, I_VPERMW },
+        { "vpexpandd", 9, TOKEN_INSN, 0, 0, I_VPEXPANDD },
+        { "vpexpandq", 9, TOKEN_INSN, 0, 0, I_VPEXPANDQ },
+        { "vplzcntd", 8, TOKEN_INSN, 0, 0, I_VPLZCNTD },
+        { "vplzcntq", 8, TOKEN_INSN, 0, 0, I_VPLZCNTQ },
+        { "vpmaxsq", 7, TOKEN_INSN, 0, 0, I_VPMAXSQ },
+        { "vpmaxuq", 7, TOKEN_INSN, 0, 0, I_VPMAXUQ },
+        { "vpminsq", 7, TOKEN_INSN, 0, 0, I_VPMINSQ },
+        { "vpminuq", 7, TOKEN_INSN, 0, 0, I_VPMINUQ },
+        { "vpmovb2m", 8, TOKEN_INSN, 0, 0, I_VPMOVB2M },
+        { "vpmovd2m", 8, TOKEN_INSN, 0, 0, I_VPMOVD2M },
+        { "vpmovdb", 7, TOKEN_INSN, 0, 0, I_VPMOVDB },
+        { "vpmovdw", 7, TOKEN_INSN, 0, 0, I_VPMOVDW },
+        { "vpmovm2b", 8, TOKEN_INSN, 0, 0, I_VPMOVM2B },
+        { "vpmovm2d", 8, TOKEN_INSN, 0, 0, I_VPMOVM2D },
+        { "vpmovm2q", 8, TOKEN_INSN, 0, 0, I_VPMOVM2Q },
+        { "vpmovm2w", 8, TOKEN_INSN, 0, 0, I_VPMOVM2W },
+        { "vpmovq2m", 8, TOKEN_INSN, 0, 0, I_VPMOVQ2M },
+        { "vpmovqb", 7, TOKEN_INSN, 0, 0, I_VPMOVQB },
+        { "vpmovqd", 7, TOKEN_INSN, 0, 0, I_VPMOVQD },
+        { "vpmovqw", 7, TOKEN_INSN, 0, 0, I_VPMOVQW },
+        { "vpmovsdb", 8, TOKEN_INSN, 0, 0, I_VPMOVSDB },
+        { "vpmovsdw", 8, TOKEN_INSN, 0, 0, I_VPMOVSDW },
+        { "vpmovsqb", 8, TOKEN_INSN, 0, 0, I_VPMOVSQB },
+        { "vpmovsqd", 8, TOKEN_INSN, 0, 0, I_VPMOVSQD },
+        { "vpmovsqw", 8, TOKEN_INSN, 0, 0, I_VPMOVSQW },
+        { "vpmovswb", 8, TOKEN_INSN, 0, 0, I_VPMOVSWB },
+        { "vpmovusdb", 9, TOKEN_INSN, 0, 0, I_VPMOVUSDB },
+        { "vpmovusdw", 9, TOKEN_INSN, 0, 0, I_VPMOVUSDW },
+        { "vpmovusqb", 9, TOKEN_INSN, 0, 0, I_VPMOVUSQB },
+        { "vpmovusqd", 9, TOKEN_INSN, 0, 0, I_VPMOVUSQD },
+        { "vpmovusqw", 9, TOKEN_INSN, 0, 0, I_VPMOVUSQW },
+        { "vpmovuswb", 9, TOKEN_INSN, 0, 0, I_VPMOVUSWB },
+        { "vpmovw2m", 8, TOKEN_INSN, 0, 0, I_VPMOVW2M },
+        { "vpmovwb", 7, TOKEN_INSN, 0, 0, I_VPMOVWB },
+        { "vpmullq", 7, TOKEN_INSN, 0, 0, I_VPMULLQ },
+        { "vpmultishiftqb", 14, TOKEN_INSN, 0, 0, I_VPMULTISHIFTQB },
+        { "vpord", 5, TOKEN_INSN, 0, 0, I_VPORD },
+        { "vporq", 5, TOKEN_INSN, 0, 0, I_VPORQ },
+        { "vprold", 6, TOKEN_INSN, 0, 0, I_VPROLD },
+        { "vprolq", 6, TOKEN_INSN, 0, 0, I_VPROLQ },
+        { "vprolvd", 7, TOKEN_INSN, 0, 0, I_VPROLVD },
+        { "vprolvq", 7, TOKEN_INSN, 0, 0, I_VPROLVQ },
+        { "vprord", 6, TOKEN_INSN, 0, 0, I_VPRORD },
+        { "vprorq", 6, TOKEN_INSN, 0, 0, I_VPRORQ },
+        { "vprorvd", 7, TOKEN_INSN, 0, 0, I_VPRORVD },
+        { "vprorvq", 7, TOKEN_INSN, 0, 0, I_VPRORVQ },
+        { "vpscatterdd", 11, TOKEN_INSN, 0, 0, I_VPSCATTERDD },
+        { "vpscatterdq", 11, TOKEN_INSN, 0, 0, I_VPSCATTERDQ },
+        { "vpscatterqd", 11, TOKEN_INSN, 0, 0, I_VPSCATTERQD },
+        { "vpscatterqq", 11, TOKEN_INSN, 0, 0, I_VPSCATTERQQ },
+        { "vpsllvw", 7, TOKEN_INSN, 0, 0, I_VPSLLVW },
+        { "vpsraq", 6, TOKEN_INSN, 0, 0, I_VPSRAQ },
+        { "vpsravq", 7, TOKEN_INSN, 0, 0, I_VPSRAVQ },
+        { "vpsravw", 7, TOKEN_INSN, 0, 0, I_VPSRAVW },
+        { "vpsrlvw", 7, TOKEN_INSN, 0, 0, I_VPSRLVW },
+        { "vpternlogd", 10, TOKEN_INSN, 0, 0, I_VPTERNLOGD },
+        { "vpternlogq", 10, TOKEN_INSN, 0, 0, I_VPTERNLOGQ },
+        { "vptestmb", 8, TOKEN_INSN, 0, 0, I_VPTESTMB },
+        { "vptestmd", 8, TOKEN_INSN, 0, 0, I_VPTESTMD },
+        { "vptestmq", 8, TOKEN_INSN, 0, 0, I_VPTESTMQ },
+        { "vptestmw", 8, TOKEN_INSN, 0, 0, I_VPTESTMW },
+        { "vptestnmb", 9, TOKEN_INSN, 0, 0, I_VPTESTNMB },
+        { "vptestnmd", 9, TOKEN_INSN, 0, 0, I_VPTESTNMD },
+        { "vptestnmq", 9, TOKEN_INSN, 0, 0, I_VPTESTNMQ },
+        { "vptestnmw", 9, TOKEN_INSN, 0, 0, I_VPTESTNMW },
+        { "vpxord", 6, TOKEN_INSN, 0, 0, I_VPXORD },
+        { "vpxorq", 6, TOKEN_INSN, 0, 0, I_VPXORQ },
+        { "vrangepd", 8, TOKEN_INSN, 0, 0, I_VRANGEPD },
+        { "vrangeps", 8, TOKEN_INSN, 0, 0, I_VRANGEPS },
+        { "vrangesd", 8, TOKEN_INSN, 0, 0, I_VRANGESD },
+        { "vrangess", 8, TOKEN_INSN, 0, 0, I_VRANGESS },
+        { "vrcp14pd", 8, TOKEN_INSN, 0, 0, I_VRCP14PD },
+        { "vrcp14ps", 8, TOKEN_INSN, 0, 0, I_VRCP14PS },
+        { "vrcp14sd", 8, TOKEN_INSN, 0, 0, I_VRCP14SD },
+        { "vrcp14ss", 8, TOKEN_INSN, 0, 0, I_VRCP14SS },
+        { "vrcp28pd", 8, TOKEN_INSN, 0, 0, I_VRCP28PD },
+        { "vrcp28ps", 8, TOKEN_INSN, 0, 0, I_VRCP28PS },
+        { "vrcp28sd", 8, TOKEN_INSN, 0, 0, I_VRCP28SD },
+        { "vrcp28ss", 8, TOKEN_INSN, 0, 0, I_VRCP28SS },
+        { "vreducepd", 9, TOKEN_INSN, 0, 0, I_VREDUCEPD },
+        { "vreduceps", 9, TOKEN_INSN, 0, 0, I_VREDUCEPS },
+        { "vreducesd", 9, TOKEN_INSN, 0, 0, I_VREDUCESD },
+        { "vreducess", 9, TOKEN_INSN, 0, 0, I_VREDUCESS },
+        { "vrndscalepd", 11, TOKEN_INSN, 0, 0, I_VRNDSCALEPD },
+        { "vrndscaleps", 11, TOKEN_INSN, 0, 0, I_VRNDSCALEPS },
+        { "vrndscalesd", 11, TOKEN_INSN, 0, 0, I_VRNDSCALESD },
+        { "vrndscaless", 11, TOKEN_INSN, 0, 0, I_VRNDSCALESS },
+        { "vrsqrt14pd", 10, TOKEN_INSN, 0, 0, I_VRSQRT14PD },
+        { "vrsqrt14ps", 10, TOKEN_INSN, 0, 0, I_VRSQRT14PS },
+        { "vrsqrt14sd", 10, TOKEN_INSN, 0, 0, I_VRSQRT14SD },
+        { "vrsqrt14ss", 10, TOKEN_INSN, 0, 0, I_VRSQRT14SS },
+        { "vrsqrt28pd", 10, TOKEN_INSN, 0, 0, I_VRSQRT28PD },
+        { "vrsqrt28ps", 10, TOKEN_INSN, 0, 0, I_VRSQRT28PS },
+        { "vrsqrt28sd", 10, TOKEN_INSN, 0, 0, I_VRSQRT28SD },
+        { "vrsqrt28ss", 10, TOKEN_INSN, 0, 0, I_VRSQRT28SS },
+        { "vscalefpd", 9, TOKEN_INSN, 0, 0, I_VSCALEFPD },
+        { "vscalefps", 9, TOKEN_INSN, 0, 0, I_VSCALEFPS },
+        { "vscalefsd", 9, TOKEN_INSN, 0, 0, I_VSCALEFSD },
+        { "vscalefss", 9, TOKEN_INSN, 0, 0, I_VSCALEFSS },
+        { "vscatterdpd", 11, TOKEN_INSN, 0, 0, I_VSCATTERDPD },
+        { "vscatterdps", 11, TOKEN_INSN, 0, 0, I_VSCATTERDPS },
+        { "vscatterpf0dpd", 14, TOKEN_INSN, 0, 0, I_VSCATTERPF0DPD },
+        { "vscatterpf0dps", 14, TOKEN_INSN, 0, 0, I_VSCATTERPF0DPS },
+        { "vscatterpf0qpd", 14, TOKEN_INSN, 0, 0, I_VSCATTERPF0QPD },
+        { "vscatterpf0qps", 14, TOKEN_INSN, 0, 0, I_VSCATTERPF0QPS },
+        { "vscatterpf1dpd", 14, TOKEN_INSN, 0, 0, I_VSCATTERPF1DPD },
+        { "vscatterpf1dps", 14, TOKEN_INSN, 0, 0, I_VSCATTERPF1DPS },
+        { "vscatterpf1qpd", 14, TOKEN_INSN, 0, 0, I_VSCATTERPF1QPD },
+        { "vscatterpf1qps", 14, TOKEN_INSN, 0, 0, I_VSCATTERPF1QPS },
+        { "vscatterqpd", 11, TOKEN_INSN, 0, 0, I_VSCATTERQPD },
+        { "vscatterqps", 11, TOKEN_INSN, 0, 0, I_VSCATTERQPS },
+        { "vshuff32x4", 10, TOKEN_INSN, 0, 0, I_VSHUFF32X4 },
+        { "vshuff64x2", 10, TOKEN_INSN, 0, 0, I_VSHUFF64X2 },
+        { "vshufi32x4", 10, TOKEN_INSN, 0, 0, I_VSHUFI32X4 },
+        { "vshufi64x2", 10, TOKEN_INSN, 0, 0, I_VSHUFI64X2 },
+        { "rdpkru", 6, TOKEN_INSN, 0, 0, I_RDPKRU },
+        { "wrpkru", 6, TOKEN_INSN, 0, 0, I_WRPKRU },
+        { "rdpid", 5, TOKEN_INSN, 0, 0, I_RDPID },
+        { "clflushopt", 10, TOKEN_INSN, 0, 0, I_CLFLUSHOPT },
+        { "clwb", 4, TOKEN_INSN, 0, 0, I_CLWB },
+        { "pcommit", 7, TOKEN_INSN, 0, 0, I_PCOMMIT },
+        { "clzero", 6, TOKEN_INSN, 0, 0, I_CLZERO },
+        { "ptwrite", 7, TOKEN_INSN, 0, 0, I_PTWRITE },
+        { "cldemote", 8, TOKEN_INSN, 0, 0, I_CLDEMOTE },
+        { "movdiri", 7, TOKEN_INSN, 0, 0, I_MOVDIRI },
+        { "movdir64b", 9, TOKEN_INSN, 0, 0, I_MOVDIR64B },
+        { "pconfig", 7, TOKEN_INSN, 0, 0, I_PCONFIG },
+        { "tpause", 6, TOKEN_INSN, 0, 0, I_TPAUSE },
+        { "umonitor", 8, TOKEN_INSN, 0, 0, I_UMONITOR },
+        { "umwait", 6, TOKEN_INSN, 0, 0, I_UMWAIT },
+        { "wbnoinvd", 8, TOKEN_INSN, 0, 0, I_WBNOINVD },
+        { "gf2p8affineinvqb", 16, TOKEN_INSN, 0, 0, I_GF2P8AFFINEINVQB },
+        { "vgf2p8affineinvqb", 17, TOKEN_INSN, 0, 0, I_VGF2P8AFFINEINVQB },
+        { "gf2p8affineqb", 13, TOKEN_INSN, 0, 0, I_GF2P8AFFINEQB },
+        { "vgf2p8affineqb", 14, TOKEN_INSN, 0, 0, I_VGF2P8AFFINEQB },
+        { "gf2p8mulb", 9, TOKEN_INSN, 0, 0, I_GF2P8MULB },
+        { "vgf2p8mulb", 10, TOKEN_INSN, 0, 0, I_VGF2P8MULB },
+        { "vpcompressb", 11, TOKEN_INSN, 0, 0, I_VPCOMPRESSB },
+        { "vpcompressw", 11, TOKEN_INSN, 0, 0, I_VPCOMPRESSW },
+        { "vpexpandb", 9, TOKEN_INSN, 0, 0, I_VPEXPANDB },
+        { "vpexpandw", 9, TOKEN_INSN, 0, 0, I_VPEXPANDW },
+        { "vpshldw", 7, TOKEN_INSN, 0, 0, I_VPSHLDW },
+        { "vpshldd", 7, TOKEN_INSN, 0, 0, I_VPSHLDD },
+        { "vpshldq", 7, TOKEN_INSN, 0, 0, I_VPSHLDQ },
+        { "vpshldvw", 8, TOKEN_INSN, 0, 0, I_VPSHLDVW },
+        { "vpshldvd", 8, TOKEN_INSN, 0, 0, I_VPSHLDVD },
+        { "vpshldvq", 8, TOKEN_INSN, 0, 0, I_VPSHLDVQ },
+        { "vpshrdw", 7, TOKEN_INSN, 0, 0, I_VPSHRDW },
+        { "vpshrdd", 7, TOKEN_INSN, 0, 0, I_VPSHRDD },
+        { "vpshrdq", 7, TOKEN_INSN, 0, 0, I_VPSHRDQ },
+        { "vpshrdvw", 8, TOKEN_INSN, 0, 0, I_VPSHRDVW },
+        { "vpshrdvd", 8, TOKEN_INSN, 0, 0, I_VPSHRDVD },
+        { "vpshrdvq", 8, TOKEN_INSN, 0, 0, I_VPSHRDVQ },
+        { "vpdpbusd", 8, TOKEN_INSN, 0, 0, I_VPDPBUSD },
+        { "vpdpbusds", 9, TOKEN_INSN, 0, 0, I_VPDPBUSDS },
+        { "vpdpwssd", 8, TOKEN_INSN, 0, 0, I_VPDPWSSD },
+        { "vpdpwssds", 9, TOKEN_INSN, 0, 0, I_VPDPWSSDS },
+        { "vpopcntb", 8, TOKEN_INSN, 0, 0, I_VPOPCNTB },
+        { "vpopcntw", 8, TOKEN_INSN, 0, 0, I_VPOPCNTW },
+        { "vpopcntd", 8, TOKEN_INSN, 0, 0, I_VPOPCNTD },
+        { "vpopcntq", 8, TOKEN_INSN, 0, 0, I_VPOPCNTQ },
+        { "vpshufbitqmb", 12, TOKEN_INSN, 0, 0, I_VPSHUFBITQMB },
+        { "v4fmaddps", 9, TOKEN_INSN, 0, 0, I_V4FMADDPS },
+        { "v4fnmaddps", 10, TOKEN_INSN, 0, 0, I_V4FNMADDPS },
+        { "v4fmaddss", 9, TOKEN_INSN, 0, 0, I_V4FMADDSS },
+        { "v4fnmaddss", 10, TOKEN_INSN, 0, 0, I_V4FNMADDSS },
+        { "v4dpwssds", 9, TOKEN_INSN, 0, 0, I_V4DPWSSDS },
+        { "v4dpwssd", 8, TOKEN_INSN, 0, 0, I_V4DPWSSD },
+        { "encls", 5, TOKEN_INSN, 0, 0, I_ENCLS },
+        { "enclu", 5, TOKEN_INSN, 0, 0, I_ENCLU },
+        { "enclv", 5, TOKEN_INSN, 0, 0, I_ENCLV },
+        { "clrssbsy", 8, TOKEN_INSN, 0, 0, I_CLRSSBSY },
+        { "endbr32", 7, TOKEN_INSN, 0, 0, I_ENDBR32 },
+        { "endbr64", 7, TOKEN_INSN, 0, 0, I_ENDBR64 },
+        { "incsspd", 7, TOKEN_INSN, 0, 0, I_INCSSPD },
+        { "incsspq", 7, TOKEN_INSN, 0, 0, I_INCSSPQ },
+        { "rdsspd", 6, TOKEN_INSN, 0, 0, I_RDSSPD },
+        { "rdsspq", 6, TOKEN_INSN, 0, 0, I_RDSSPQ },
+        { "rstorssp", 8, TOKEN_INSN, 0, 0, I_RSTORSSP },
+        { "saveprevssp", 11, TOKEN_INSN, 0, 0, I_SAVEPREVSSP },
+        { "setssbsy", 8, TOKEN_INSN, 0, 0, I_SETSSBSY },
+        { "wrussd", 6, TOKEN_INSN, 0, 0, I_WRUSSD },
+        { "wrussq", 6, TOKEN_INSN, 0, 0, I_WRUSSQ },
+        { "wrssd", 5, TOKEN_INSN, 0, 0, I_WRSSD },
+        { "wrssq", 5, TOKEN_INSN, 0, 0, I_WRSSQ },
+        { "enqcmd", 6, TOKEN_INSN, 0, 0, I_ENQCMD },
+        { "enqcmds", 7, TOKEN_INSN, 0, 0, I_ENQCMDS },
+        { "serialize", 9, TOKEN_INSN, 0, 0, I_SERIALIZE },
+        { "xresldtrk", 9, TOKEN_INSN, 0, 0, I_XRESLDTRK },
+        { "xsusldtrk", 9, TOKEN_INSN, 0, 0, I_XSUSLDTRK },
+        { "vcvtne2ps2bf16", 14, TOKEN_INSN, 0, 0, I_VCVTNE2PS2BF16 },
+        { "vdpbf16ps", 9, TOKEN_INSN, 0, 0, I_VDPBF16PS },
+        { "vp2intersectd", 13, TOKEN_INSN, 0, 0, I_VP2INTERSECTD },
+        { "ldtilecfg", 9, TOKEN_INSN, 0, 0, I_LDTILECFG },
+        { "sttilecfg", 9, TOKEN_INSN, 0, 0, I_STTILECFG },
+        { "tdpbf16ps", 9, TOKEN_INSN, 0, 0, I_TDPBF16PS },
+        { "tdpbssd", 7, TOKEN_INSN, 0, 0, I_TDPBSSD },
+        { "tdpbsud", 7, TOKEN_INSN, 0, 0, I_TDPBSUD },
+        { "tdpbusd", 7, TOKEN_INSN, 0, 0, I_TDPBUSD },
+        { "tdpbuud", 7, TOKEN_INSN, 0, 0, I_TDPBUUD },
+        { "tileloadd", 9, TOKEN_INSN, 0, 0, I_TILELOADD },
+        { "tileloaddt1", 11, TOKEN_INSN, 0, 0, I_TILELOADDT1 },
+        { "tilerelease", 11, TOKEN_INSN, 0, 0, I_TILERELEASE },
+        { "tilestored", 10, TOKEN_INSN, 0, 0, I_TILESTORED },
+        { "tilezero", 8, TOKEN_INSN, 0, 0, I_TILEZERO },
+        { "vaddph", 6, TOKEN_INSN, 0, 0, I_VADDPH },
+        { "vaddsh", 6, TOKEN_INSN, 0, 0, I_VADDSH },
+        { "vcmpph", 6, TOKEN_INSN, 0, 0, I_VCMPPH },
+        { "vcmpsh", 6, TOKEN_INSN, 0, 0, I_VCMPSH },
+        { "vcomish", 7, TOKEN_INSN, 0, 0, I_VCOMISH },
+        { "vcvtdq2ph", 9, TOKEN_INSN, 0, 0, I_VCVTDQ2PH },
+        { "vcvtpd2ph", 9, TOKEN_INSN, 0, 0, I_VCVTPD2PH },
+        { "vcvtph2dq", 9, TOKEN_INSN, 0, 0, I_VCVTPH2DQ },
+        { "vcvtph2pd", 9, TOKEN_INSN, 0, 0, I_VCVTPH2PD },
+        { "vcvtph2psx", 10, TOKEN_INSN, 0, 0, I_VCVTPH2PSX },
+        { "vcvtph2qq", 9, TOKEN_INSN, 0, 0, I_VCVTPH2QQ },
+        { "vcvtph2udq", 10, TOKEN_INSN, 0, 0, I_VCVTPH2UDQ },
+        { "vcvtph2uqq", 10, TOKEN_INSN, 0, 0, I_VCVTPH2UQQ },
+        { "vcvtph2uw", 9, TOKEN_INSN, 0, 0, I_VCVTPH2UW },
+        { "vcvtph2w", 8, TOKEN_INSN, 0, 0, I_VCVTPH2W },
+        { "vcvtqq2ph", 9, TOKEN_INSN, 0, 0, I_VCVTQQ2PH },
+        { "vcvtsd2sh", 9, TOKEN_INSN, 0, 0, I_VCVTSD2SH },
+        { "vcvtsh2sd", 9, TOKEN_INSN, 0, 0, I_VCVTSH2SD },
+        { "vcvtsh2si", 9, TOKEN_INSN, 0, 0, I_VCVTSH2SI },
+        { "vcvtsh2ss", 9, TOKEN_INSN, 0, 0, I_VCVTSH2SS },
+        { "vcvtsh2usi", 10, TOKEN_INSN, 0, 0, I_VCVTSH2USI },
+        { "vcvtsi2sh", 9, TOKEN_INSN, 0, 0, I_VCVTSI2SH },
+        { "vcvtss2sh", 9, TOKEN_INSN, 0, 0, I_VCVTSS2SH },
+        { "vcvttph2dq", 10, TOKEN_INSN, 0, 0, I_VCVTTPH2DQ },
+        { "vcvttph2qq", 10, TOKEN_INSN, 0, 0, I_VCVTTPH2QQ },
+        { "vcvttph2udq", 11, TOKEN_INSN, 0, 0, I_VCVTTPH2UDQ },
+        { "vcvttph2uqq", 11, TOKEN_INSN, 0, 0, I_VCVTTPH2UQQ },
+        { "vcvttph2uw", 10, TOKEN_INSN, 0, 0, I_VCVTTPH2UW },
+        { "vcvttph2w", 9, TOKEN_INSN, 0, 0, I_VCVTTPH2W },
+        { "vcvttsh2si", 10, TOKEN_INSN, 0, 0, I_VCVTTSH2SI },
+        { "vcvttsh2usi", 11, TOKEN_INSN, 0, 0, I_VCVTTSH2USI },
+        { "vcvtudq2ph", 10, TOKEN_INSN, 0, 0, I_VCVTUDQ2PH },
+        { "vcvtuqq2ph", 10, TOKEN_INSN, 0, 0, I_VCVTUQQ2PH },
+        { "vcvtusi2sh", 10, TOKEN_INSN, 0, 0, I_VCVTUSI2SH },
+        { "vcvtuw2ph", 9, TOKEN_INSN, 0, 0, I_VCVTUW2PH },
+        { "vcvtw2ph", 8, TOKEN_INSN, 0, 0, I_VCVTW2PH },
+        { "vdivph", 6, TOKEN_INSN, 0, 0, I_VDIVPH },
+        { "vdivsh", 6, TOKEN_INSN, 0, 0, I_VDIVSH },
+        { "vfcmaddcph", 10, TOKEN_INSN, 0, 0, I_VFCMADDCPH },
+        { "vfmaddcph", 9, TOKEN_INSN, 0, 0, I_VFMADDCPH },
+        { "vfcmaddcsh", 10, TOKEN_INSN, 0, 0, I_VFCMADDCSH },
+        { "vfmaddcsh", 9, TOKEN_INSN, 0, 0, I_VFMADDCSH },
+        { "vfcmulcpch", 10, TOKEN_INSN, 0, 0, I_VFCMULCPCH },
+        { "vfmulcpch", 9, TOKEN_INSN, 0, 0, I_VFMULCPCH },
+        { "vfcmulcsh", 9, TOKEN_INSN, 0, 0, I_VFCMULCSH },
+        { "vfmulcsh", 8, TOKEN_INSN, 0, 0, I_VFMULCSH },
+        { "vfmaddsub132ph", 14, TOKEN_INSN, 0, 0, I_VFMADDSUB132PH },
+        { "vfmaddsub213ph", 14, TOKEN_INSN, 0, 0, I_VFMADDSUB213PH },
+        { "vfmaddsub231ph", 14, TOKEN_INSN, 0, 0, I_VFMADDSUB231PH },
+        { "vfmsubadd132ph", 14, TOKEN_INSN, 0, 0, I_VFMSUBADD132PH },
+        { "vfmsubadd213ph", 14, TOKEN_INSN, 0, 0, I_VFMSUBADD213PH },
+        { "vfmsubadd231ph", 14, TOKEN_INSN, 0, 0, I_VFMSUBADD231PH },
+        { "vpmadd132ph", 11, TOKEN_INSN, 0, 0, I_VPMADD132PH },
+        { "vpmadd213ph", 11, TOKEN_INSN, 0, 0, I_VPMADD213PH },
+        { "vpmadd231ph", 11, TOKEN_INSN, 0, 0, I_VPMADD231PH },
+        { "vfmadd132ph", 11, TOKEN_INSN, 0, 0, I_VFMADD132PH },
+        { "vfmadd213ph", 11, TOKEN_INSN, 0, 0, I_VFMADD213PH },
+        { "vfmadd231ph", 11, TOKEN_INSN, 0, 0, I_VFMADD231PH },
+        { "vpmadd132sh", 11, TOKEN_INSN, 0, 0, I_VPMADD132SH },
+        { "vpmadd213sh", 11, TOKEN_INSN, 0, 0, I_VPMADD213SH },
+        { "vpmadd231sh", 11, TOKEN_INSN, 0, 0, I_VPMADD231SH },
+        { "vpnmadd132sh", 12, TOKEN_INSN, 0, 0, I_VPNMADD132SH },
+        { "vpnmadd213sh", 12, TOKEN_INSN, 0, 0, I_VPNMADD213SH },
+        { "vpnmadd231sh", 12, TOKEN_INSN, 0, 0, I_VPNMADD231SH },
+        { "vpmsub132ph", 11, TOKEN_INSN, 0, 0, I_VPMSUB132PH },
+        { "vpmsub213ph", 11, TOKEN_INSN, 0, 0, I_VPMSUB213PH },
+        { "vpmsub231ph", 11, TOKEN_INSN, 0, 0, I_VPMSUB231PH },
+        { "vfmsub132ph", 11, TOKEN_INSN, 0, 0, I_VFMSUB132PH },
+        { "vfmsub213ph", 11, TOKEN_INSN, 0, 0, I_VFMSUB213PH },
+        { "vfmsub231ph", 11, TOKEN_INSN, 0, 0, I_VFMSUB231PH },
+        { "vpmsub132sh", 11, TOKEN_INSN, 0, 0, I_VPMSUB132SH },
+        { "vpmsub213sh", 11, TOKEN_INSN, 0, 0, I_VPMSUB213SH },
+        { "vpmsub231sh", 11, TOKEN_INSN, 0, 0, I_VPMSUB231SH },
+        { "vpnmsub132sh", 12, TOKEN_INSN, 0, 0, I_VPNMSUB132SH },
+        { "vpnmsub213sh", 12, TOKEN_INSN, 0, 0, I_VPNMSUB213SH },
+        { "vpnmsub231sh", 12, TOKEN_INSN, 0, 0, I_VPNMSUB231SH },
+        { "vfpclassph", 10, TOKEN_INSN, 0, 0, I_VFPCLASSPH },
+        { "vfpclasssh", 10, TOKEN_INSN, 0, 0, I_VFPCLASSSH },
+        { "vgetexpph", 9, TOKEN_INSN, 0, 0, I_VGETEXPPH },
+        { "vgetexpsh", 9, TOKEN_INSN, 0, 0, I_VGETEXPSH },
+        { "vgetmantph", 10, TOKEN_INSN, 0, 0, I_VGETMANTPH },
+        { "vgetmantsh", 10, TOKEN_INSN, 0, 0, I_VGETMANTSH },
+        { "vgetmaxph", 9, TOKEN_INSN, 0, 0, I_VGETMAXPH },
+        { "vgetmaxsh", 9, TOKEN_INSN, 0, 0, I_VGETMAXSH },
+        { "vgetminph", 9, TOKEN_INSN, 0, 0, I_VGETMINPH },
+        { "vgetminsh", 9, TOKEN_INSN, 0, 0, I_VGETMINSH },
+        { "vmovsh", 6, TOKEN_INSN, 0, 0, I_VMOVSH },
+        { "vmovw", 5, TOKEN_INSN, 0, 0, I_VMOVW },
+        { "vmulph", 6, TOKEN_INSN, 0, 0, I_VMULPH },
+        { "vmulsh", 6, TOKEN_INSN, 0, 0, I_VMULSH },
+        { "vrcpph", 6, TOKEN_INSN, 0, 0, I_VRCPPH },
+        { "vrcpsh", 6, TOKEN_INSN, 0, 0, I_VRCPSH },
+        { "vreduceph", 9, TOKEN_INSN, 0, 0, I_VREDUCEPH },
+        { "vreducesh", 9, TOKEN_INSN, 0, 0, I_VREDUCESH },
+        { "vendscaleph", 11, TOKEN_INSN, 0, 0, I_VENDSCALEPH },
+        { "vendscalesh", 11, TOKEN_INSN, 0, 0, I_VENDSCALESH },
+        { "vrsqrtph", 8, TOKEN_INSN, 0, 0, I_VRSQRTPH },
+        { "vrsqrtsh", 8, TOKEN_INSN, 0, 0, I_VRSQRTSH },
+        { "vscalefph", 9, TOKEN_INSN, 0, 0, I_VSCALEFPH },
+        { "vscalefsh", 9, TOKEN_INSN, 0, 0, I_VSCALEFSH },
+        { "vsqrtph", 7, TOKEN_INSN, 0, 0, I_VSQRTPH },
+        { "vsqrtsh", 7, TOKEN_INSN, 0, 0, I_VSQRTSH },
+        { "vsubph", 6, TOKEN_INSN, 0, 0, I_VSUBPH },
+        { "vsubsh", 6, TOKEN_INSN, 0, 0, I_VSUBSH },
+        { "vucomish", 8, TOKEN_INSN, 0, 0, I_VUCOMISH },
+        { "aadd", 4, TOKEN_INSN, 0, 0, I_AADD },
+        { "aand", 4, TOKEN_INSN, 0, 0, I_AAND },
+        { "axor", 4, TOKEN_INSN, 0, 0, I_AXOR },
+        { "clui", 4, TOKEN_INSN, 0, 0, I_CLUI },
+        { "senduipi", 8, TOKEN_INSN, 0, 0, I_SENDUIPI },
+        { "stui", 4, TOKEN_INSN, 0, 0, I_STUI },
+        { "testui", 6, TOKEN_INSN, 0, 0, I_TESTUI },
+        { "uiret", 5, TOKEN_INSN, 0, 0, I_UIRET },
+        { "cmpaxadd", 8, TOKEN_INSN, 0, 0, I_CMPAXADD },
+        { "cmpaexadd", 9, TOKEN_INSN, 0, 0, I_CMPAEXADD },
+        { "cmpbxadd", 8, TOKEN_INSN, 0, 0, I_CMPBXADD },
+        { "cmpbexadd", 9, TOKEN_INSN, 0, 0, I_CMPBEXADD },
+        { "cmpcxadd", 8, TOKEN_INSN, 0, 0, I_CMPCXADD },
+        { "cmpexadd", 8, TOKEN_INSN, 0, 0, I_CMPEXADD },
+        { "cmpgxadd", 8, TOKEN_INSN, 0, 0, I_CMPGXADD },
+        { "cmpgexadd", 9, TOKEN_INSN, 0, 0, I_CMPGEXADD },
+        { "cmplxadd", 8, TOKEN_INSN, 0, 0, I_CMPLXADD },
+        { "cmplexadd", 9, TOKEN_INSN, 0, 0, I_CMPLEXADD },
+        { "cmpnaxadd", 9, TOKEN_INSN, 0, 0, I_CMPNAXADD },
+        { "cmpnaexadd", 10, TOKEN_INSN, 0, 0, I_CMPNAEXADD },
+        { "cmpnbxadd", 9, TOKEN_INSN, 0, 0, I_CMPNBXADD },
+        { "cmpnbexadd", 10, TOKEN_INSN, 0, 0, I_CMPNBEXADD },
+        { "cmpncxadd", 9, TOKEN_INSN, 0, 0, I_CMPNCXADD },
+        { "cmpnexadd", 9, TOKEN_INSN, 0, 0, I_CMPNEXADD },
+        { "cmpngxadd", 9, TOKEN_INSN, 0, 0, I_CMPNGXADD },
+        { "cmpngexadd", 10, TOKEN_INSN, 0, 0, I_CMPNGEXADD },
+        { "cmpnlxadd", 9, TOKEN_INSN, 0, 0, I_CMPNLXADD },
+        { "cmpnlexadd", 10, TOKEN_INSN, 0, 0, I_CMPNLEXADD },
+        { "cmpnoxadd", 9, TOKEN_INSN, 0, 0, I_CMPNOXADD },
+        { "cmpnpxadd", 9, TOKEN_INSN, 0, 0, I_CMPNPXADD },
+        { "cmpnsxadd", 9, TOKEN_INSN, 0, 0, I_CMPNSXADD },
+        { "cmpnzxadd", 9, TOKEN_INSN, 0, 0, I_CMPNZXADD },
+        { "cmpoxadd", 8, TOKEN_INSN, 0, 0, I_CMPOXADD },
+        { "cmppxadd", 8, TOKEN_INSN, 0, 0, I_CMPPXADD },
+        { "cmppexadd", 9, TOKEN_INSN, 0, 0, I_CMPPEXADD },
+        { "cmppoxadd", 9, TOKEN_INSN, 0, 0, I_CMPPOXADD },
+        { "cmpsxadd", 8, TOKEN_INSN, 0, 0, I_CMPSXADD },
+        { "cmpzxadd", 8, TOKEN_INSN, 0, 0, I_CMPZXADD },
+        { "erets", 5, TOKEN_INSN, 0, 0, I_ERETS },
+        { "eretu", 5, TOKEN_INSN, 0, 0, I_ERETU },
+        { "lkgs", 4, TOKEN_INSN, 0, 0, I_LKGS },
+        { "wrmsrns", 7, TOKEN_INSN, 0, 0, I_WRMSRNS },
+        { "rdmsrlist", 9, TOKEN_INSN, 0, 0, I_RDMSRLIST },
+        { "wrmsrlist", 9, TOKEN_INSN, 0, 0, I_WRMSRLIST },
+        { "hreset", 6, TOKEN_INSN, 0, 0, I_HRESET },
+        { "hint_nop0", 9, TOKEN_INSN, 0, 0, I_HINT_NOP0 },
+        { "hint_nop1", 9, TOKEN_INSN, 0, 0, I_HINT_NOP1 },
+        { "hint_nop2", 9, TOKEN_INSN, 0, 0, I_HINT_NOP2 },
+        { "hint_nop3", 9, TOKEN_INSN, 0, 0, I_HINT_NOP3 },
+        { "hint_nop4", 9, TOKEN_INSN, 0, 0, I_HINT_NOP4 },
+        { "hint_nop5", 9, TOKEN_INSN, 0, 0, I_HINT_NOP5 },
+        { "hint_nop6", 9, TOKEN_INSN, 0, 0, I_HINT_NOP6 },
+        { "hint_nop7", 9, TOKEN_INSN, 0, 0, I_HINT_NOP7 },
+        { "hint_nop8", 9, TOKEN_INSN, 0, 0, I_HINT_NOP8 },
+        { "hint_nop9", 9, TOKEN_INSN, 0, 0, I_HINT_NOP9 },
+        { "hint_nop10", 10, TOKEN_INSN, 0, 0, I_HINT_NOP10 },
+        { "hint_nop11", 10, TOKEN_INSN, 0, 0, I_HINT_NOP11 },
+        { "hint_nop12", 10, TOKEN_INSN, 0, 0, I_HINT_NOP12 },
+        { "hint_nop13", 10, TOKEN_INSN, 0, 0, I_HINT_NOP13 },
+        { "hint_nop14", 10, TOKEN_INSN, 0, 0, I_HINT_NOP14 },
+        { "hint_nop15", 10, TOKEN_INSN, 0, 0, I_HINT_NOP15 },
+        { "hint_nop16", 10, TOKEN_INSN, 0, 0, I_HINT_NOP16 },
+        { "hint_nop17", 10, TOKEN_INSN, 0, 0, I_HINT_NOP17 },
+        { "hint_nop18", 10, TOKEN_INSN, 0, 0, I_HINT_NOP18 },
+        { "hint_nop19", 10, TOKEN_INSN, 0, 0, I_HINT_NOP19 },
+        { "hint_nop20", 10, TOKEN_INSN, 0, 0, I_HINT_NOP20 },
+        { "hint_nop21", 10, TOKEN_INSN, 0, 0, I_HINT_NOP21 },
+        { "hint_nop22", 10, TOKEN_INSN, 0, 0, I_HINT_NOP22 },
+        { "hint_nop23", 10, TOKEN_INSN, 0, 0, I_HINT_NOP23 },
+        { "hint_nop24", 10, TOKEN_INSN, 0, 0, I_HINT_NOP24 },
+        { "hint_nop25", 10, TOKEN_INSN, 0, 0, I_HINT_NOP25 },
+        { "hint_nop26", 10, TOKEN_INSN, 0, 0, I_HINT_NOP26 },
+        { "hint_nop27", 10, TOKEN_INSN, 0, 0, I_HINT_NOP27 },
+        { "hint_nop28", 10, TOKEN_INSN, 0, 0, I_HINT_NOP28 },
+        { "hint_nop29", 10, TOKEN_INSN, 0, 0, I_HINT_NOP29 },
+        { "hint_nop30", 10, TOKEN_INSN, 0, 0, I_HINT_NOP30 },
+        { "hint_nop31", 10, TOKEN_INSN, 0, 0, I_HINT_NOP31 },
+        { "hint_nop32", 10, TOKEN_INSN, 0, 0, I_HINT_NOP32 },
+        { "hint_nop33", 10, TOKEN_INSN, 0, 0, I_HINT_NOP33 },
+        { "hint_nop34", 10, TOKEN_INSN, 0, 0, I_HINT_NOP34 },
+        { "hint_nop35", 10, TOKEN_INSN, 0, 0, I_HINT_NOP35 },
+        { "hint_nop36", 10, TOKEN_INSN, 0, 0, I_HINT_NOP36 },
+        { "hint_nop37", 10, TOKEN_INSN, 0, 0, I_HINT_NOP37 },
+        { "hint_nop38", 10, TOKEN_INSN, 0, 0, I_HINT_NOP38 },
+        { "hint_nop39", 10, TOKEN_INSN, 0, 0, I_HINT_NOP39 },
+        { "hint_nop40", 10, TOKEN_INSN, 0, 0, I_HINT_NOP40 },
+        { "hint_nop41", 10, TOKEN_INSN, 0, 0, I_HINT_NOP41 },
+        { "hint_nop42", 10, TOKEN_INSN, 0, 0, I_HINT_NOP42 },
+        { "hint_nop43", 10, TOKEN_INSN, 0, 0, I_HINT_NOP43 },
+        { "hint_nop44", 10, TOKEN_INSN, 0, 0, I_HINT_NOP44 },
+        { "hint_nop45", 10, TOKEN_INSN, 0, 0, I_HINT_NOP45 },
+        { "hint_nop46", 10, TOKEN_INSN, 0, 0, I_HINT_NOP46 },
+        { "hint_nop47", 10, TOKEN_INSN, 0, 0, I_HINT_NOP47 },
+        { "hint_nop48", 10, TOKEN_INSN, 0, 0, I_HINT_NOP48 },
+        { "hint_nop49", 10, TOKEN_INSN, 0, 0, I_HINT_NOP49 },
+        { "hint_nop50", 10, TOKEN_INSN, 0, 0, I_HINT_NOP50 },
+        { "hint_nop51", 10, TOKEN_INSN, 0, 0, I_HINT_NOP51 },
+        { "hint_nop52", 10, TOKEN_INSN, 0, 0, I_HINT_NOP52 },
+        { "hint_nop53", 10, TOKEN_INSN, 0, 0, I_HINT_NOP53 },
+        { "hint_nop54", 10, TOKEN_INSN, 0, 0, I_HINT_NOP54 },
+        { "hint_nop55", 10, TOKEN_INSN, 0, 0, I_HINT_NOP55 },
+        { "hint_nop56", 10, TOKEN_INSN, 0, 0, I_HINT_NOP56 },
+        { "hint_nop57", 10, TOKEN_INSN, 0, 0, I_HINT_NOP57 },
+        { "hint_nop58", 10, TOKEN_INSN, 0, 0, I_HINT_NOP58 },
+        { "hint_nop59", 10, TOKEN_INSN, 0, 0, I_HINT_NOP59 },
+        { "hint_nop60", 10, TOKEN_INSN, 0, 0, I_HINT_NOP60 },
+        { "hint_nop61", 10, TOKEN_INSN, 0, 0, I_HINT_NOP61 },
+        { "hint_nop62", 10, TOKEN_INSN, 0, 0, I_HINT_NOP62 },
+        { "hint_nop63", 10, TOKEN_INSN, 0, 0, I_HINT_NOP63 },
+        { "al", 2, TOKEN_REG, 0, 0, R_AL },
+        { "ah", 2, TOKEN_REG, 0, 0, R_AH },
+        { "ax", 2, TOKEN_REG, 0, 0, R_AX },
+        { "eax", 3, TOKEN_REG, 0, 0, R_EAX },
+        { "rax", 3, TOKEN_REG, 0, 0, R_RAX },
+        { "bl", 2, TOKEN_REG, 0, 0, R_BL },
+        { "bh", 2, TOKEN_REG, 0, 0, R_BH },
+        { "bx", 2, TOKEN_REG, 0, 0, R_BX },
+        { "ebx", 3, TOKEN_REG, 0, 0, R_EBX },
+        { "rbx", 3, TOKEN_REG, 0, 0, R_RBX },
+        { "cl", 2, TOKEN_REG, 0, 0, R_CL },
+        { "ch", 2, TOKEN_REG, 0, 0, R_CH },
+        { "cx", 2, TOKEN_REG, 0, 0, R_CX },
+        { "ecx", 3, TOKEN_REG, 0, 0, R_ECX },
+        { "rcx", 3, TOKEN_REG, 0, 0, R_RCX },
+        { "dl", 2, TOKEN_REG, 0, 0, R_DL },
+        { "dh", 2, TOKEN_REG, 0, 0, R_DH },
+        { "dx", 2, TOKEN_REG, 0, 0, R_DX },
+        { "edx", 3, TOKEN_REG, 0, 0, R_EDX },
+        { "rdx", 3, TOKEN_REG, 0, 0, R_RDX },
+        { "spl", 3, TOKEN_REG, 0, 0, R_SPL },
+        { "sp", 2, TOKEN_REG, 0, 0, R_SP },
+        { "esp", 3, TOKEN_REG, 0, 0, R_ESP },
+        { "rsp", 3, TOKEN_REG, 0, 0, R_RSP },
+        { "bpl", 3, TOKEN_REG, 0, 0, R_BPL },
+        { "bp", 2, TOKEN_REG, 0, 0, R_BP },
+        { "ebp", 3, TOKEN_REG, 0, 0, R_EBP },
+        { "rbp", 3, TOKEN_REG, 0, 0, R_RBP },
+        { "sil", 3, TOKEN_REG, 0, 0, R_SIL },
+        { "si", 2, TOKEN_REG, 0, 0, R_SI },
+        { "esi", 3, TOKEN_REG, 0, 0, R_ESI },
+        { "rsi", 3, TOKEN_REG, 0, 0, R_RSI },
+        { "dil", 3, TOKEN_REG, 0, 0, R_DIL },
+        { "di", 2, TOKEN_REG, 0, 0, R_DI },
+        { "edi", 3, TOKEN_REG, 0, 0, R_EDI },
+        { "rdi", 3, TOKEN_REG, 0, 0, R_RDI },
+        { "r8b", 3, TOKEN_REG, 0, 0, R_R8B },
+        { "r9b", 3, TOKEN_REG, 0, 0, R_R9B },
+        { "r10b", 4, TOKEN_REG, 0, 0, R_R10B },
+        { "r11b", 4, TOKEN_REG, 0, 0, R_R11B },
+        { "r12b", 4, TOKEN_REG, 0, 0, R_R12B },
+        { "r13b", 4, TOKEN_REG, 0, 0, R_R13B },
+        { "r14b", 4, TOKEN_REG, 0, 0, R_R14B },
+        { "r15b", 4, TOKEN_REG, 0, 0, R_R15B },
+        { "r8w", 3, TOKEN_REG, 0, 0, R_R8W },
+        { "r9w", 3, TOKEN_REG, 0, 0, R_R9W },
+        { "r10w", 4, TOKEN_REG, 0, 0, R_R10W },
+        { "r11w", 4, TOKEN_REG, 0, 0, R_R11W },
+        { "r12w", 4, TOKEN_REG, 0, 0, R_R12W },
+        { "r13w", 4, TOKEN_REG, 0, 0, R_R13W },
+        { "r14w", 4, TOKEN_REG, 0, 0, R_R14W },
+        { "r15w", 4, TOKEN_REG, 0, 0, R_R15W },
+        { "r8d", 3, TOKEN_REG, 0, 0, R_R8D },
+        { "r9d", 3, TOKEN_REG, 0, 0, R_R9D },
+        { "r10d", 4, TOKEN_REG, 0, 0, R_R10D },
+        { "r11d", 4, TOKEN_REG, 0, 0, R_R11D },
+        { "r12d", 4, TOKEN_REG, 0, 0, R_R12D },
+        { "r13d", 4, TOKEN_REG, 0, 0, R_R13D },
+        { "r14d", 4, TOKEN_REG, 0, 0, R_R14D },
+        { "r15d", 4, TOKEN_REG, 0, 0, R_R15D },
+        { "r8", 2, TOKEN_REG, 0, 0, R_R8 },
+        { "r9", 2, TOKEN_REG, 0, 0, R_R9 },
+        { "r10", 3, TOKEN_REG, 0, 0, R_R10 },
+        { "r11", 3, TOKEN_REG, 0, 0, R_R11 },
+        { "r12", 3, TOKEN_REG, 0, 0, R_R12 },
+        { "r13", 3, TOKEN_REG, 0, 0, R_R13 },
+        { "r14", 3, TOKEN_REG, 0, 0, R_R14 },
+        { "r15", 3, TOKEN_REG, 0, 0, R_R15 },
+        { "es", 2, TOKEN_REG, 0, 0, R_ES },
+        { "cs", 2, TOKEN_REG, 0, 0, R_CS },
+        { "ss", 2, TOKEN_REG, 0, 0, R_SS },
+        { "ds", 2, TOKEN_REG, 0, 0, R_DS },
+        { "fs", 2, TOKEN_REG, 0, 0, R_FS },
+        { "gs", 2, TOKEN_REG, 0, 0, R_GS },
+        { "segr6", 5, TOKEN_REG, 0, 0, R_SEGR6 },
+        { "segr7", 5, TOKEN_REG, 0, 0, R_SEGR7 },
+        { "cr0", 3, TOKEN_REG, 0, 0, R_CR0 },
+        { "cr1", 3, TOKEN_REG, 0, 0, R_CR1 },
+        { "cr2", 3, TOKEN_REG, 0, 0, R_CR2 },
+        { "cr3", 3, TOKEN_REG, 0, 0, R_CR3 },
+        { "cr4", 3, TOKEN_REG, 0, 0, R_CR4 },
+        { "cr5", 3, TOKEN_REG, 0, 0, R_CR5 },
+        { "cr6", 3, TOKEN_REG, 0, 0, R_CR6 },
+        { "cr7", 3, TOKEN_REG, 0, 0, R_CR7 },
+        { "cr8", 3, TOKEN_REG, 0, 0, R_CR8 },
+        { "cr9", 3, TOKEN_REG, 0, 0, R_CR9 },
+        { "cr10", 4, TOKEN_REG, 0, 0, R_CR10 },
+        { "cr11", 4, TOKEN_REG, 0, 0, R_CR11 },
+        { "cr12", 4, TOKEN_REG, 0, 0, R_CR12 },
+        { "cr13", 4, TOKEN_REG, 0, 0, R_CR13 },
+        { "cr14", 4, TOKEN_REG, 0, 0, R_CR14 },
+        { "cr15", 4, TOKEN_REG, 0, 0, R_CR15 },
+        { "dr0", 3, TOKEN_REG, 0, 0, R_DR0 },
+        { "dr1", 3, TOKEN_REG, 0, 0, R_DR1 },
+        { "dr2", 3, TOKEN_REG, 0, 0, R_DR2 },
+        { "dr3", 3, TOKEN_REG, 0, 0, R_DR3 },
+        { "dr4", 3, TOKEN_REG, 0, 0, R_DR4 },
+        { "dr5", 3, TOKEN_REG, 0, 0, R_DR5 },
+        { "dr6", 3, TOKEN_REG, 0, 0, R_DR6 },
+        { "dr7", 3, TOKEN_REG, 0, 0, R_DR7 },
+        { "dr8", 3, TOKEN_REG, 0, 0, R_DR8 },
+        { "dr9", 3, TOKEN_REG, 0, 0, R_DR9 },
+        { "dr10", 4, TOKEN_REG, 0, 0, R_DR10 },
+        { "dr11", 4, TOKEN_REG, 0, 0, R_DR11 },
+        { "dr12", 4, TOKEN_REG, 0, 0, R_DR12 },
+        { "dr13", 4, TOKEN_REG, 0, 0, R_DR13 },
+        { "dr14", 4, TOKEN_REG, 0, 0, R_DR14 },
+        { "dr15", 4, TOKEN_REG, 0, 0, R_DR15 },
+        { "tr0", 3, TOKEN_REG, 0, 0, R_TR0 },
+        { "tr1", 3, TOKEN_REG, 0, 0, R_TR1 },
+        { "tr2", 3, TOKEN_REG, 0, 0, R_TR2 },
+        { "tr3", 3, TOKEN_REG, 0, 0, R_TR3 },
+        { "tr4", 3, TOKEN_REG, 0, 0, R_TR4 },
+        { "tr5", 3, TOKEN_REG, 0, 0, R_TR5 },
+        { "tr6", 3, TOKEN_REG, 0, 0, R_TR6 },
+        { "tr7", 3, TOKEN_REG, 0, 0, R_TR7 },
+        { "st0", 3, TOKEN_REG, 0, 0, R_ST0 },
+        { "st1", 3, TOKEN_REG, 0, 0, R_ST1 },
+        { "st2", 3, TOKEN_REG, 0, 0, R_ST2 },
+        { "st3", 3, TOKEN_REG, 0, 0, R_ST3 },
+        { "st4", 3, TOKEN_REG, 0, 0, R_ST4 },
+        { "st5", 3, TOKEN_REG, 0, 0, R_ST5 },
+        { "st6", 3, TOKEN_REG, 0, 0, R_ST6 },
+        { "st7", 3, TOKEN_REG, 0, 0, R_ST7 },
+        { "mm0", 3, TOKEN_REG, 0, 0, R_MM0 },
+        { "mm1", 3, TOKEN_REG, 0, 0, R_MM1 },
+        { "mm2", 3, TOKEN_REG, 0, 0, R_MM2 },
+        { "mm3", 3, TOKEN_REG, 0, 0, R_MM3 },
+        { "mm4", 3, TOKEN_REG, 0, 0, R_MM4 },
+        { "mm5", 3, TOKEN_REG, 0, 0, R_MM5 },
+        { "mm6", 3, TOKEN_REG, 0, 0, R_MM6 },
+        { "mm7", 3, TOKEN_REG, 0, 0, R_MM7 },
+        { "xmm0", 4, TOKEN_REG, 0, 0, R_XMM0 },
+        { "xmm1", 4, TOKEN_REG, 0, 0, R_XMM1 },
+        { "xmm2", 4, TOKEN_REG, 0, 0, R_XMM2 },
+        { "xmm3", 4, TOKEN_REG, 0, 0, R_XMM3 },
+        { "xmm4", 4, TOKEN_REG, 0, 0, R_XMM4 },
+        { "xmm5", 4, TOKEN_REG, 0, 0, R_XMM5 },
+        { "xmm6", 4, TOKEN_REG, 0, 0, R_XMM6 },
+        { "xmm7", 4, TOKEN_REG, 0, 0, R_XMM7 },
+        { "xmm8", 4, TOKEN_REG, 0, 0, R_XMM8 },
+        { "xmm9", 4, TOKEN_REG, 0, 0, R_XMM9 },
+        { "xmm10", 5, TOKEN_REG, 0, 0, R_XMM10 },
+        { "xmm11", 5, TOKEN_REG, 0, 0, R_XMM11 },
+        { "xmm12", 5, TOKEN_REG, 0, 0, R_XMM12 },
+        { "xmm13", 5, TOKEN_REG, 0, 0, R_XMM13 },
+        { "xmm14", 5, TOKEN_REG, 0, 0, R_XMM14 },
+        { "xmm15", 5, TOKEN_REG, 0, 0, R_XMM15 },
+        { "xmm16", 5, TOKEN_REG, 0, 0, R_XMM16 },
+        { "xmm17", 5, TOKEN_REG, 0, 0, R_XMM17 },
+        { "xmm18", 5, TOKEN_REG, 0, 0, R_XMM18 },
+        { "xmm19", 5, TOKEN_REG, 0, 0, R_XMM19 },
+        { "xmm20", 5, TOKEN_REG, 0, 0, R_XMM20 },
+        { "xmm21", 5, TOKEN_REG, 0, 0, R_XMM21 },
+        { "xmm22", 5, TOKEN_REG, 0, 0, R_XMM22 },
+        { "xmm23", 5, TOKEN_REG, 0, 0, R_XMM23 },
+        { "xmm24", 5, TOKEN_REG, 0, 0, R_XMM24 },
+        { "xmm25", 5, TOKEN_REG, 0, 0, R_XMM25 },
+        { "xmm26", 5, TOKEN_REG, 0, 0, R_XMM26 },
+        { "xmm27", 5, TOKEN_REG, 0, 0, R_XMM27 },
+        { "xmm28", 5, TOKEN_REG, 0, 0, R_XMM28 },
+        { "xmm29", 5, TOKEN_REG, 0, 0, R_XMM29 },
+        { "xmm30", 5, TOKEN_REG, 0, 0, R_XMM30 },
+        { "xmm31", 5, TOKEN_REG, 0, 0, R_XMM31 },
+        { "ymm0", 4, TOKEN_REG, 0, 0, R_YMM0 },
+        { "ymm1", 4, TOKEN_REG, 0, 0, R_YMM1 },
+        { "ymm2", 4, TOKEN_REG, 0, 0, R_YMM2 },
+        { "ymm3", 4, TOKEN_REG, 0, 0, R_YMM3 },
+        { "ymm4", 4, TOKEN_REG, 0, 0, R_YMM4 },
+        { "ymm5", 4, TOKEN_REG, 0, 0, R_YMM5 },
+        { "ymm6", 4, TOKEN_REG, 0, 0, R_YMM6 },
+        { "ymm7", 4, TOKEN_REG, 0, 0, R_YMM7 },
+        { "ymm8", 4, TOKEN_REG, 0, 0, R_YMM8 },
+        { "ymm9", 4, TOKEN_REG, 0, 0, R_YMM9 },
+        { "ymm10", 5, TOKEN_REG, 0, 0, R_YMM10 },
+        { "ymm11", 5, TOKEN_REG, 0, 0, R_YMM11 },
+        { "ymm12", 5, TOKEN_REG, 0, 0, R_YMM12 },
+        { "ymm13", 5, TOKEN_REG, 0, 0, R_YMM13 },
+        { "ymm14", 5, TOKEN_REG, 0, 0, R_YMM14 },
+        { "ymm15", 5, TOKEN_REG, 0, 0, R_YMM15 },
+        { "ymm16", 5, TOKEN_REG, 0, 0, R_YMM16 },
+        { "ymm17", 5, TOKEN_REG, 0, 0, R_YMM17 },
+        { "ymm18", 5, TOKEN_REG, 0, 0, R_YMM18 },
+        { "ymm19", 5, TOKEN_REG, 0, 0, R_YMM19 },
+        { "ymm20", 5, TOKEN_REG, 0, 0, R_YMM20 },
+        { "ymm21", 5, TOKEN_REG, 0, 0, R_YMM21 },
+        { "ymm22", 5, TOKEN_REG, 0, 0, R_YMM22 },
+        { "ymm23", 5, TOKEN_REG, 0, 0, R_YMM23 },
+        { "ymm24", 5, TOKEN_REG, 0, 0, R_YMM24 },
+        { "ymm25", 5, TOKEN_REG, 0, 0, R_YMM25 },
+        { "ymm26", 5, TOKEN_REG, 0, 0, R_YMM26 },
+        { "ymm27", 5, TOKEN_REG, 0, 0, R_YMM27 },
+        { "ymm28", 5, TOKEN_REG, 0, 0, R_YMM28 },
+        { "ymm29", 5, TOKEN_REG, 0, 0, R_YMM29 },
+        { "ymm30", 5, TOKEN_REG, 0, 0, R_YMM30 },
+        { "ymm31", 5, TOKEN_REG, 0, 0, R_YMM31 },
+        { "zmm0", 4, TOKEN_REG, 0, 0, R_ZMM0 },
+        { "zmm1", 4, TOKEN_REG, 0, 0, R_ZMM1 },
+        { "zmm2", 4, TOKEN_REG, 0, 0, R_ZMM2 },
+        { "zmm3", 4, TOKEN_REG, 0, 0, R_ZMM3 },
+        { "zmm4", 4, TOKEN_REG, 0, 0, R_ZMM4 },
+        { "zmm5", 4, TOKEN_REG, 0, 0, R_ZMM5 },
+        { "zmm6", 4, TOKEN_REG, 0, 0, R_ZMM6 },
+        { "zmm7", 4, TOKEN_REG, 0, 0, R_ZMM7 },
+        { "zmm8", 4, TOKEN_REG, 0, 0, R_ZMM8 },
+        { "zmm9", 4, TOKEN_REG, 0, 0, R_ZMM9 },
+        { "zmm10", 5, TOKEN_REG, 0, 0, R_ZMM10 },
+        { "zmm11", 5, TOKEN_REG, 0, 0, R_ZMM11 },
+        { "zmm12", 5, TOKEN_REG, 0, 0, R_ZMM12 },
+        { "zmm13", 5, TOKEN_REG, 0, 0, R_ZMM13 },
+        { "zmm14", 5, TOKEN_REG, 0, 0, R_ZMM14 },
+        { "zmm15", 5, TOKEN_REG, 0, 0, R_ZMM15 },
+        { "zmm16", 5, TOKEN_REG, 0, 0, R_ZMM16 },
+        { "zmm17", 5, TOKEN_REG, 0, 0, R_ZMM17 },
+        { "zmm18", 5, TOKEN_REG, 0, 0, R_ZMM18 },
+        { "zmm19", 5, TOKEN_REG, 0, 0, R_ZMM19 },
+        { "zmm20", 5, TOKEN_REG, 0, 0, R_ZMM20 },
+        { "zmm21", 5, TOKEN_REG, 0, 0, R_ZMM21 },
+        { "zmm22", 5, TOKEN_REG, 0, 0, R_ZMM22 },
+        { "zmm23", 5, TOKEN_REG, 0, 0, R_ZMM23 },
+        { "zmm24", 5, TOKEN_REG, 0, 0, R_ZMM24 },
+        { "zmm25", 5, TOKEN_REG, 0, 0, R_ZMM25 },
+        { "zmm26", 5, TOKEN_REG, 0, 0, R_ZMM26 },
+        { "zmm27", 5, TOKEN_REG, 0, 0, R_ZMM27 },
+        { "zmm28", 5, TOKEN_REG, 0, 0, R_ZMM28 },
+        { "zmm29", 5, TOKEN_REG, 0, 0, R_ZMM29 },
+        { "zmm30", 5, TOKEN_REG, 0, 0, R_ZMM30 },
+        { "zmm31", 5, TOKEN_REG, 0, 0, R_ZMM31 },
+        { "tmm0", 4, TOKEN_REG, 0, 0, R_TMM0 },
+        { "tmm1", 4, TOKEN_REG, 0, 0, R_TMM1 },
+        { "tmm2", 4, TOKEN_REG, 0, 0, R_TMM2 },
+        { "tmm3", 4, TOKEN_REG, 0, 0, R_TMM3 },
+        { "tmm4", 4, TOKEN_REG, 0, 0, R_TMM4 },
+        { "tmm5", 4, TOKEN_REG, 0, 0, R_TMM5 },
+        { "tmm6", 4, TOKEN_REG, 0, 0, R_TMM6 },
+        { "tmm7", 4, TOKEN_REG, 0, 0, R_TMM7 },
+        { "k0", 2, TOKEN_REG, 0, 0, R_K0 },
+        { "k1", 2, TOKEN_REG, 0, TFLAG_BRC_OPT, R_K1 },
+        { "k2", 2, TOKEN_REG, 0, TFLAG_BRC_OPT, R_K2 },
+        { "k3", 2, TOKEN_REG, 0, TFLAG_BRC_OPT, R_K3 },
+        { "k4", 2, TOKEN_REG, 0, TFLAG_BRC_OPT, R_K4 },
+        { "k5", 2, TOKEN_REG, 0, TFLAG_BRC_OPT, R_K5 },
+        { "k6", 2, TOKEN_REG, 0, TFLAG_BRC_OPT, R_K6 },
+        { "k7", 2, TOKEN_REG, 0, TFLAG_BRC_OPT, R_K7 },
+        { "bnd0", 4, TOKEN_REG, 0, 0, R_BND0 },
+        { "bnd1", 4, TOKEN_REG, 0, 0, R_BND1 },
+        { "bnd2", 4, TOKEN_REG, 0, 0, R_BND2 },
+        { "bnd3", 4, TOKEN_REG, 0, 0, R_BND3 },
+        { "?", 1, TOKEN_QMARK, 0, 0, 0 },
+        { "a16", 3, TOKEN_PREFIX, PPS_ASIZE, 0, P_A16 },
+        { "a32", 3, TOKEN_PREFIX, PPS_ASIZE, 0, P_A32 },
+        { "a64", 3, TOKEN_PREFIX, PPS_ASIZE, 0, P_A64 },
+        { "asp", 3, TOKEN_PREFIX, PPS_ASIZE, 0, P_ASP },
+        { "lock", 4, TOKEN_PREFIX, PPS_LOCK, 0, P_LOCK },
+        { "o16", 3, TOKEN_PREFIX, PPS_OSIZE, 0, P_O16 },
+        { "o32", 3, TOKEN_PREFIX, PPS_OSIZE, 0, P_O32 },
+        { "o64", 3, TOKEN_PREFIX, PPS_OSIZE, 0, P_O64 },
+        { "osp", 3, TOKEN_PREFIX, PPS_OSIZE, 0, P_OSP },
+        { "rep", 3, TOKEN_PREFIX, PPS_REP, 0, P_REP },
+        { "repe", 4, TOKEN_PREFIX, PPS_REP, 0, P_REPE },
+        { "repne", 5, TOKEN_PREFIX, PPS_REP, 0, P_REPNE },
+        { "repnz", 5, TOKEN_PREFIX, PPS_REP, 0, P_REPNZ },
+        { "repz", 4, TOKEN_PREFIX, PPS_REP, 0, P_REPZ },
+        { "xacquire", 8, TOKEN_PREFIX, PPS_REP, 0, P_XACQUIRE },
+        { "xrelease", 8, TOKEN_PREFIX, PPS_REP, 0, P_XRELEASE },
+        { "bnd", 3, TOKEN_PREFIX, PPS_REP, 0, P_BND },
+        { "nobnd", 5, TOKEN_PREFIX, PPS_REP, 0, P_NOBND },
+        { "times", 5, TOKEN_PREFIX, PPS_TIMES, 0, P_TIMES },
+        { "wait", 4, TOKEN_PREFIX, PPS_WAIT, 0, P_WAIT },
+        { "rex", 3, TOKEN_PREFIX, PPS_REX, TFLAG_BRC, P_REX },
+        { "evex", 4, TOKEN_PREFIX, PPS_REX, TFLAG_BRC, P_EVEX },
+        { "vex", 3, TOKEN_PREFIX, PPS_REX, TFLAG_BRC, P_VEX },
+        { "vex3", 4, TOKEN_PREFIX, PPS_REX, TFLAG_BRC, P_VEX3 },
+        { "vex2", 4, TOKEN_PREFIX, PPS_REX, TFLAG_BRC, P_VEX2 },
+        { "byte", 4, TOKEN_SIZE, SIZE_BYTE, 0, S_BYTE },
+        { "word", 4, TOKEN_SIZE, SIZE_WORD, 0, S_WORD },
+        { "dword", 5, TOKEN_SIZE, SIZE_DWORD, 0, S_DWORD },
+        { "qword", 5, TOKEN_SIZE, SIZE_QWORD, 0, S_QWORD },
+        { "tword", 5, TOKEN_SIZE, SIZE_TWORD, 0, S_TWORD },
+        { "oword", 5, TOKEN_SIZE, SIZE_OWORD, 0, S_OWORD },
+        { "yword", 5, TOKEN_SIZE, SIZE_YWORD, 0, S_YWORD },
+        { "zword", 5, TOKEN_SIZE, SIZE_ZWORD, 0, S_ZWORD },
+        { "abs", 3, TOKEN_SPECIAL, 0, 0, S_ABS },
+        { "far", 3, TOKEN_SPECIAL, 0, 0, S_FAR },
+        { "long", 4, TOKEN_SPECIAL, 0, 0, S_LONG },
+        { "near", 4, TOKEN_SPECIAL, 0, 0, S_NEAR },
+        { "nosplit", 7, TOKEN_SPECIAL, 0, 0, S_NOSPLIT },
+        { "rel", 3, TOKEN_SPECIAL, 0, 0, S_REL },
+        { "short", 5, TOKEN_SPECIAL, 0, 0, S_SHORT },
+        { "strict", 6, TOKEN_SPECIAL, 0, 0, S_STRICT },
+        { "to", 2, TOKEN_SPECIAL, 0, 0, S_TO },
+        { "ptr", 3, TOKEN_ID, 0, TFLAG_WARN, 0 },
+        { "dup", 3, TOKEN_ID, 0, TFLAG_DUP, 0 },
+        { "__?infinity?__", 14, TOKEN_FLOAT, 0, 0, 0 },
+        { "__?nan?__", 9, TOKEN_FLOAT, 0, 0, 0 },
+        { "__?qnan?__", 10, TOKEN_FLOAT, 0, 0, 0 },
+        { "__?snan?__", 10, TOKEN_FLOAT, 0, 0, 0 },
+        { "__?float8?__", 12, TOKEN_FLOATIZE, 0, 0, FLOAT_8 },
+        { "__?float16?__", 13, TOKEN_FLOATIZE, 0, 0, FLOAT_16 },
+        { "__?float32?__", 13, TOKEN_FLOATIZE, 0, 0, FLOAT_32 },
+        { "__?float64?__", 13, TOKEN_FLOATIZE, 0, 0, FLOAT_64 },
+        { "__?float80m?__", 14, TOKEN_FLOATIZE, 0, 0, FLOAT_80M },
+        { "__?float80e?__", 14, TOKEN_FLOATIZE, 0, 0, FLOAT_80E },
+        { "__?float128l?__", 15, TOKEN_FLOATIZE, 0, 0, FLOAT_128L },
+        { "__?float128h?__", 15, TOKEN_FLOATIZE, 0, 0, FLOAT_128H },
+        { "__?bfloat16?__", 14, TOKEN_FLOATIZE, 0, 0, FLOAT_B16 },
+        { "__?utf16?__", 11, TOKEN_STRFUNC, 0, 0, STRFUNC_UTF16 },
+        { "__?utf16le?__", 13, TOKEN_STRFUNC, 0, 0, STRFUNC_UTF16LE },
+        { "__?utf16be?__", 13, TOKEN_STRFUNC, 0, 0, STRFUNC_UTF16BE },
+        { "__?utf32?__", 11, TOKEN_STRFUNC, 0, 0, STRFUNC_UTF32 },
+        { "__?utf32le?__", 13, TOKEN_STRFUNC, 0, 0, STRFUNC_UTF32LE },
+        { "__?utf32be?__", 13, TOKEN_STRFUNC, 0, 0, STRFUNC_UTF32BE },
+        { "__?ilog2e?__", 12, TOKEN_IFUNC, 0, 0, IFUNC_ILOG2E },
+        { "__?ilog2w?__", 12, TOKEN_IFUNC, 0, 0, IFUNC_ILOG2W },
+        { "__?ilog2f?__", 12, TOKEN_IFUNC, 0, 0, IFUNC_ILOG2F },
+        { "__?ilog2c?__", 12, TOKEN_IFUNC, 0, 0, IFUNC_ILOG2C },
+        { "seg", 3, TOKEN_SEG, 0, 0, 0 },
+        { "wrt", 3, TOKEN_WRT, 0, 0, 0 },
+        { "__?masm_ptr?__", 14, TOKEN_MASM_PTR, 0, 0, 0 },
+        { "__?masm_flat?__", 15, TOKEN_MASM_FLAT, 0, 0, 0 },
+        { "1to2", 4, TOKEN_DECORATOR, 0, TFLAG_BRC | TFLAG_BRDCAST , BRC_1TO2 },
+        { "1to4", 4, TOKEN_DECORATOR, 0, TFLAG_BRC | TFLAG_BRDCAST , BRC_1TO4 },
+        { "1to8", 4, TOKEN_DECORATOR, 0, TFLAG_BRC | TFLAG_BRDCAST , BRC_1TO8 },
+        { "1to16", 5, TOKEN_DECORATOR, 0, TFLAG_BRC | TFLAG_BRDCAST , BRC_1TO16 },
+        { "1to32", 5, TOKEN_DECORATOR, 0, TFLAG_BRC | TFLAG_BRDCAST , BRC_1TO32 },
+        { "rn-sae", 6, TOKEN_DECORATOR, 0, TFLAG_BRC, BRC_RN },
+        { "rd-sae", 6, TOKEN_DECORATOR, 0, TFLAG_BRC, BRC_RD },
+        { "ru-sae", 6, TOKEN_DECORATOR, 0, TFLAG_BRC, BRC_RU },
+        { "rz-sae", 6, TOKEN_DECORATOR, 0, TFLAG_BRC, BRC_RZ },
+        { "sae", 3, TOKEN_DECORATOR, 0, TFLAG_BRC, BRC_SAE },
+        { "z", 1, TOKEN_DECORATOR, 0, TFLAG_BRC, BRC_Z },
+        { ">>", 2, TOKEN_SHR, 0, 0, 0 },
+        { ">>>", 3, TOKEN_SAR, 0, 0, 0 },
+        { "<<", 2, TOKEN_SHL, 0, 0, 0 },
+        { "<<<", 3, TOKEN_SHL, 0, 0, 0 },
+        { "//", 2, TOKEN_SDIV, 0, 0, 0 },
+        { "%%", 2, TOKEN_SMOD, 0, 0, 0 },
+        { "==", 2, TOKEN_EQ, 0, 0, 0 },
+        { "!=", 2, TOKEN_NE, 0, 0, 0 },
+        { "<>", 2, TOKEN_NE, 0, 0, 0 },
+        { "<=", 2, TOKEN_LE, 0, 0, 0 },
+        { ">=", 2, TOKEN_GE, 0, 0, 0 },
+        { "<=>", 3, TOKEN_LEG, 0, 0, 0 },
+        { "&&", 2, TOKEN_DBL_AND, 0, 0, 0 },
+        { "||", 2, TOKEN_DBL_OR, 0, 0, 0 },
+        { "^^", 2, TOKEN_DBL_XOR, 0, 0, 0 },
+    };
+    uint32_t k1, k2;
+    uint16_t ix;
+    const struct tokendata *data;
+    char lcbuf18;
+    const char *p = token;
+    char c, *q = lcbuf;
+    size_t len = 0;
+    uint64_t crc = UINT64_C(0x076259c3e291c26c);
+
+    while ((c = *p++)) {
+        if (++len > 17)
+            goto notfound;
+        *q++ = c = nasm_tolower(c);
+        crc = crc64_byte(crc, c);
+    };
+
+    k1 = ((uint32_t)crc & 0x3ffe) + 0;
+    k2 = ((uint32_t)(crc >> 32) & 0x3ffe) + 1;
+
+    ix = hashdatak1 + hashdatak2;
+    if (ix >= 2605)
+        goto notfound;
+
+    data = &tokendataix;
+    if (data->len != len)
+        goto notfound;
+    if (memcmp(data->string, lcbuf, len))
+        goto notfound;
+
+    tv->t_integer = data->num;
+    tv->t_inttwo  = data->aux;
+    tv->t_flag    = data->tokflag;
+    return tv->t_type = data->tokentype;
+
+notfound:
+    tv->t_integer = 0;
+    tv->t_inttwo  = 0;
+    tv->t_flag    = 0;
+    return tv->t_type = TOKEN_ID;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/asm/tokhash.pl Added

@@ -0,0 +1,282 @@
+#!/usr/bin/perl
+## --------------------------------------------------------------------------
+##
+##   Copyright 1996-2020 The NASM Authors - All Rights Reserved
+##   See the file AUTHORS included with the NASM distribution for
+##   the specific copyright holders.
+##
+##   Redistribution and use in source and binary forms, with or without
+##   modification, are permitted provided that the following
+##   conditions are met:
+##
+##   * Redistributions of source code must retain the above copyright
+##     notice, this list of conditions and the following disclaimer.
+##   * Redistributions in binary form must reproduce the above
+##     copyright notice, this list of conditions and the following
+##     disclaimer in the documentation and/or other materials provided
+##     with the distribution.
+##
+##     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+##     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+##     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+##     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+##     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+##     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+##     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+##     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+##     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+##     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+##     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+##     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+##     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+##
+## --------------------------------------------------------------------------
+
+#
+# Generate a perfect hash for token parsing
+#
+# Usage: tokenhash.pl insns.dat regs.dat tokens.dat
+#
+
+require 'phash.ph';
+
+my($output, $insnsn_c, $regs_dat, $tokens_dat) = @ARGV;
+
+%tokens = ();
+@tokendata = ();
+
+#
+# List of condition codes
+#
+@conditions = ('a', 'ae', 'b', 'be', 'c', 'e', 'g', 'ge', 'l', 'le',
+	       'na', 'nae', 'nb', 'nbe', 'nc', 'ne', 'ng', 'nge', 'nl',
+	       'nle', 'no', 'np', 'ns', 'nz', 'o', 'p', 'pe', 'po', 's', 'z');
+
+#
+# Read insnsn.c
+#
+open(ID, '<', $insnsn_c) or die "$0: cannot open $insnsn_c: $!\n";
+while (defined($line = <ID>)) {
+    next unless ($line =~ /^\s*\"(\?\@a-z0-9_+)\"/);
+
+    my $token = $1;
+    next if (defined($tokens{$token}));	# This should never happen
+
+    $tokens{$token} = scalar @tokendata;
+    push(@tokendata, "\"${token}\", ".length($token).
+	 ", TOKEN_INSN, 0, 0, I_\U${token}");
+}
+close(ID);
+
+#
+# Read regs.dat
+#
+open(RD, '<', $regs_dat) or die "$0: cannot open $regs_dat: $!\n";
+while (defined($line = <RD>)) {
+    if ($line =~ /^(\?\@a-z0-9_-+)\s*\S+\s*\S+\s*0-9+\s*(\S*)/) {
+	$reg = $1;
+	$reg_flag = $2;
+
+	if ($reg =~ /^(.*^0-9)(0-9+)\-(0-9+)(|^0-9.*)$/) {
+	    $nregs = $3-$2+1;
+	    $reg = $1.$2.$4;
+	    $reg_nr = $2;
+	    $reg_prefix = $1;
+	    $reg_suffix = $4;
+	} else {
+	    $nregs = 1;
+	    undef $reg_prefix;
+	    undef $reg_suffix;
+	}
+
+	while ($nregs--) {
+	    if (defined($tokens{$reg})) {
+		die "Duplicate definition: $reg\n";
+	    }
+	    $tokens{$reg} = scalar @tokendata;
+	    $reg_flag = '0' if ($reg_flag eq '');
+	    push(@tokendata, "\"${reg}\", ".length($reg).", TOKEN_REG, 0, ${reg_flag}, R_\U${reg}\E");
+
+	    if (defined($reg_prefix)) {
+		$reg_nr++;
+		$reg = sprintf("%s%u%s", $reg_prefix, $reg_nr, $reg_suffix);
+	    } else {
+		# Not a dashed sequence
+		die if ($nregs);
+	    }
+	}
+    }
+}
+close(RD);
+
+#
+# Read tokens.dat
+#
+open(TD, '<', $tokens_dat) or die "$0: cannot open $tokens_dat: $!\n";
+while (defined($line = <TD>)) {
+    $line =~ s/\s*(|\#.*)$//;
+    if ($line =~ /^\%\s+(.*)$/) {
+	$pattern = $1;
+    } elsif ($line =~ /^(\S+)/) {
+	$token = $1;
+
+	if (defined($tokens{$token})) {
+	    die "Duplicate definition: $token\n";
+	}
+	$tokens{$token} = scalar @tokendata;
+
+	$data = $pattern;
+	if ($data =~ /^(.*)\{(.*)\}(.*)$/) {
+	    my $head = $1, $tail = $3;
+	    my $px = $2;
+
+	    $px =~ s/\?/\\?/g;
+	    $px =~ s/\*/(.*)/g;
+	    if ($token =~ /$px/i) {
+		$data = $head."\U$1".$tail;
+	    } else {
+		die "$0: token $token doesn't match $px\n";
+	    }
+	}
+
+	$data =~ s/\*/\U$token/g;
+	$data =~ s/\?//g;
+
+	push(@tokendata, "\"$token\", ".length($token).", $data");
+    }
+}
+close(TD);
+
+$max_len = 0;
+foreach $token (keys(%tokens)) {
+    if (length($token) > $max_len) {
+	$max_len = length($token);
+    }
+}
+
+if ($output eq 'h') {
+    #
+    # tokens.h
+    #
+
+    print "/*\n";
+    print " * This file is generated from insns.dat, regs.dat and token.dat\n";
+    print " * by tokhash.pl; do not edit.\n";
+    print " */\n";
+    print "\n";
+
+    print "#ifndef NASM_TOKENS_H\n";
+    print "#define NASM_TOKENS_H\n";
+    print "\n";
+    print "#define MAX_KEYWORD $max_len /* length of longest keyword */\n";
+    print "\n";
+    print "#endif /* NASM_TOKENS_H */\n";
+} elsif ($output eq 'c') {
+    #
+    # tokhash.c
+    #
+
+    @hashinfo = gen_perfect_hash(\%tokens);
+    if (!@hashinfo) {
+	die "$0: no hash found\n";
+    }
+
+    # Paranoia...
+    verify_hash_table(\%tokens, \@hashinfo);
+
+    ($n, $sv, $g) = @hashinfo;
+    die if ($n & ($n-1));
+    $n <<= 1;
+
+    print "/*\n";
+    print " * This file is generated from insns.dat, regs.dat and token.dat\n";
+    print " * by tokhash.pl; do not edit.\n";
+    print " */\n";
+    print "\n";
+
+    print "#include \"compiler.h\"\n";
+    print "#include \"nasm.h\"\n";
+    print "#include \"hashtbl.h\"\n";
+    print "#include \"insns.h\"\n";
+    print "#include \"stdscan.h\"\n";
+    print "\n";
+
+    # These somewhat odd sizes and ordering thereof are due to the
+    # relative ranges of the types; this makes it fit in 16 bytes on
+    # 64-bit machines and 12 bytes on 32-bit machines.
+    print "struct tokendata {\n";
+    print "    const char *string;\n";
+    print "    uint16_t len;\n";
+    print "    int16_t tokentype;\n";
+    print "    int16_t aux;\n";
+    print "    uint16_t tokflag;\n";
+    print "    int32_t num;\n";
+    print "};\n";
+    print "\n";
+
+    print "int nasm_token_hash(const char *token, struct tokenval *tv)\n";
+    print "{\n";
+
+    # Put a large value in unused slots.  This makes it extremely unlikely
+    # that any combination that involves unused slot will pass the range test.
+    # This speeds up rejection of unrecognized tokens, i.e. identifiers.
+    print "#define INVALID_HASH_ENTRY (65535/3)\n";
+
+    printf "    static const int16_t hashdata%d = {\n", $n;
+    for ($i = 0; $i < $n; $i++) {
+	my $h = ${$g}$i;
+	print "        ", defined($h) ? $h : 'INVALID_HASH_ENTRY', ",\n";
+    }
+    print "    };\n";
+
+    printf "    static const struct tokendata tokendata%d = {\n",
+	scalar(@tokendata);
+    foreach $d (@tokendata) {
+	print "        { ", $d, " },\n";
+    }
+    print  "    };\n";
+
+    print  "    uint32_t k1, k2;\n";
+    # For correct overflow behavior, "ix" should be unsigned of the same
+    # width as the hash arrays.
+    print  "    uint16_t ix;\n";
+    print  "    const struct tokendata *data;\n";
+    printf "    char lcbuf%d;\n", $max_len+1;
+    print  "    const char *p = token;\n";
+    print  "    char c, *q = lcbuf;\n";
+    print  "    size_t len = 0;\n";
+    printf "    uint64_t crc = UINT64_C(0x%08x%08x);\n", $$sv0, $$sv1;
+    print  "\n";
+    print  "    while ((c = *p++)) {\n";
+    printf "        if (++len > %d)\n", $max_len;
+    print  "            goto notfound;\n";
+    print  "        *q++ = c = nasm_tolower(c);\n";
+    print  "        crc = crc64_byte(crc, c);\n";
+    print  "    };\n";
+    print  "\n";
+    printf "    k1 = ((uint32_t)crc & 0x%x) + 0;\n", $n-2;
+    printf "    k2 = ((uint32_t)(crc >> 32) & 0x%x) + 1;\n", $n-2;
+    print  "\n";
+    printf "    ix = hashdatak1 + hashdatak2;\n",
+	$n-2, $n-2;
+    printf "    if (ix >= %d)\n", scalar(@tokendata);
+    print  "        goto notfound;\n";
+    print  "\n";
+    print  "    data = &tokendataix;\n";
+    print  "    if (data->len != len)\n";
+    print  "        goto notfound;\n";
+    print  "    if (memcmp(data->string, lcbuf, len))\n";
+    print  "        goto notfound;\n";
+    print  "\n";
+    print  "    tv->t_integer = data->num;\n";
+    print  "    tv->t_inttwo  = data->aux;\n";
+    print  "    tv->t_flag    = data->tokflag;\n";
+    print  "    return tv->t_type = data->tokentype;\n";
+    print  "\n";
+    print  "notfound:\n";
+    print  "    tv->t_integer = 0;\n";
+    print  "    tv->t_inttwo  = 0;\n";
+    print  "    tv->t_flag    = 0;\n";
+    print  "    return tv->t_type = TOKEN_ID;\n";
+    print  "}\n";
+}

_service:tar_scm:nasm-2.16.03.tar.xz/asm/warnings.c Added

_service:tar_scm:nasm-2.16.03.tar.xz/asm/warnings.pl Added

@@ -0,0 +1,312 @@
+#!/usr/bin/perl
+
+use strict;
+use Fcntl qw(:seek);
+use File::Find;
+use File::Basename;
+
+my @warnings = ();
+my %aliases  = ();
+my %prefixes = ();
+my $err = 0;
+my $nwarn = 0;
+
+sub quote_for_c(@) {
+    my $s = join('', @_);
+
+    $s =~ s/(\"\'\\)/\\$1/g;
+    return $s;
+}
+
+# Remove a subset of nasmdoc markup
+sub remove_markup(@) {
+    my $s = join('', @_);
+
+    $s =~ s/\\\w+(?:\{((?:^\}|\\\})*)\})/$1/g;
+    $s =~ s/\\(\W)/$1/g;
+    return $s;
+}
+
+sub add_alias($$) {
+    my($a, $this) = @_;
+    my @comp = split(/-/, $a);
+
+    $aliases{$a} = $this;
+
+    # All names are prefixes in their own right, although we only
+    # list the ones that are either prefixes of "proper names" or
+    # the complete alias name.
+    for (my $i = ($a eq $this->{name}) ? 0 : $#comp; $i <= $#comp; $i++) {
+	my $prefix = join('-', @comp0..$i);
+	$prefixes{$prefix} =  unless defined($prefixes{$prefix});
+	push(@{$prefixes{$prefix}}, $a);
+    }
+}
+
+sub find_warnings {
+    my $infile = $_;
+
+    return unless (basename($infile) =~ /^\w.*\.ch$/i);
+    open(my $in, '<', $infile)
+	or die "$0: cannot open input file $infile: $!\n";
+
+    my $in_comment = 0;
+    my $nline = 0;
+    my $this;
+    my @doc;
+
+    while (defined(my $l = <$in>)) {
+	$nline++;
+	chomp $l;
+
+	if (!$in_comment) {
+	    $l =~ s/^.*?\/\*.*?\*\///g; # Remove single-line comments
+
+	    if ($l =~ /^.*?(\/\*.*)$/) {
+		# Begin block comment
+		$l = $1;
+		$in_comment = 1;
+	    }
+	}
+
+	if ($in_comment) {
+	    if ($l =~ /\*\//) {
+		# End block comment
+		$in_comment = 0;
+		undef $this;
+	    } elsif ($l =~ /^\s*\/?\*\!(\-|\=|\s*)(.*?)\s*$/) {
+		my $opr = $1;
+		my $str = $2;
+
+		if ($opr eq '' && $str eq '') {
+		    next;
+		} elsif ((!defined($this) || ($opr eq '')) &&
+			 ($str =~ /^(\w\-+)\s+\(\w+)\\s(.*\S)\s*$/)) {
+		    my $name = $1;
+		    my $def = $2;
+		    my $help = $3;
+
+		    my $cname = uc($name);
+		    $cname =~ s/^A-Z0-9_+/_/g;
+
+		    $this = {name => $name, cname => $cname,
+			     def => $def, help => $help,
+			     doc => , file => $infile, line => $nline};
+
+		    if (defined(my $that = $aliases{$name})) {
+			# Duplicate definition?!
+			printf STDERR "%s:%s: warning %s previously defined at %s:%s\n",
+			    $infile, $nline, $name, $that->{file}, $that->{line};
+		    } else {
+			push(@warnings, $this);
+			# Every warning name is also a valid warning alias
+			add_alias($name, $this);
+			$nwarn++;
+		    }
+		} elsif ($opr eq '=') {
+		    # Alias names for warnings
+		    for my $a (split(/,+/, $str)) {
+			add_alias($a, $this);
+		    }
+		} elsif ($opr =~ /^\-\s/) {
+		    push(@{$this->{doc}}, "$str\n");
+		} else {
+		    print STDERR "$infile:$nline: malformed warning definition\n";
+		    print STDERR "    $l\n";
+		    $err++;
+		}
+	    } else {
+		undef $this;
+	    }
+	}
+    }
+    close($in);
+}
+
+my($what, $outfile, @indirs) = @ARGV;
+
+if (!defined($outfile)) {
+    die "$0: usage: c|h|doc outfile indir...\n";
+}
+
+find({ wanted => \&find_warnings, no_chdir => 1, follow => 1 }, @indirs);
+
+exit(1) if ($err);
+
+my %sort_special = ( 'other' => 1, 'all' => 2 );
+sub sort_warnings {
+    my $an = $a->{name};
+    my $bn = $b->{name};
+    return ($sort_special{$an} <=> $sort_special{$bn}) || ($an cmp $bn);
+}
+
+@warnings = sort sort_warnings @warnings;
+my @warn_noall = @warnings;
+pop @warn_noall if ($warn_noall$#warn_noall->{name} eq 'all');
+
+my $outdata;
+open(my $out, '>', \$outdata)
+    or die "$0: cannot create memory file: $!\n";
+
+if ($what eq 'c') {
+    print $out "#include \"error.h\"\n\n";
+    printf $out "const char * const warning_name%d = {\n",
+	$#warnings + 2;
+    print $out "\tNULL";
+    foreach my $warn (@warnings) {
+	print $out ",\n\t\"", $warn->{name}, "\"";
+    }
+    print $out "\n};\n\n";
+    printf $out "const struct warning_alias warning_alias%d = {",
+	scalar(keys %aliases);
+    my $sep = '';
+    foreach my $alias (sort { $a cmp $b } keys(%aliases)) {
+	printf $out "%s\n\t{ %-27s WARN_IDX_%s }",
+	    $sep, "\"$alias\",", $aliases{$alias}->{cname};
+	$sep = ',';
+    }
+    print $out "\n};\n\n";
+
+    printf $out "const char * const warning_help%d = {\n",
+	$#warnings + 2;
+    print $out "\tNULL";
+    foreach my $warn (@warnings) {
+	my $help = quote_for_c(remove_markup($warn->{help}));
+	print $out ",\n\t\"", $help, "\"";
+    }
+    print $out "\n};\n\n";
+    printf $out "const uint8_t warning_default%d = {\n",
+	$#warn_noall + 2;
+    print $out "\tWARN_INIT_ON"; # for entry 0
+    foreach my $warn (@warn_noall) {
+	print $out ",\n\tWARN_INIT_", uc($warn->{def});
+    }
+    print $out "\n};\n\n";
+    printf $out "uint8_t warning_state%d;\t/* Current state */\n",
+	$#warn_noall + 2;
+} elsif ($what eq 'h') {
+    my $filename = basename($outfile);
+    my $guard = $filename;
+    $guard =~ s/^A-Za-z0-9_+/_/g;
+    $guard = "NASM_\U$guard";
+
+    print $out "#ifndef $guard\n";
+    print $out "#define $guard\n";
+    print $out "\n";
+    print $out "#ifndef WARN_SHR\n";
+    print $out "# error \"$filename should only be included from within error.h\"\n";
+    print $out "#endif\n\n";
+    print $out "enum warn_index {\n";
+    printf $out "\tWARN_IDX_%-23s = %3d, /* not suppressible */\n", 'NONE', 0;
+    my $n = 1;
+    foreach my $warn (@warnings) {
+	printf $out "\tWARN_IDX_%-23s = %3d%s /* %s */\n",
+	    $warn->{cname}, $n,
+	    ($n == $#warnings + 1) ? " " : ",",
+	    $warn->{help};
+	$n++;
+    }
+    print $out "};\n\n";
+
+    print $out "enum warn_const {\n";
+    printf $out "\tWARN_%-27s = %3d << WARN_SHR", 'NONE', 0;
+    $n = 1;
+    foreach my $warn (@warn_noall) {
+	printf $out ",\n\tWARN_%-27s = %3d << WARN_SHR", $warn->{cname}, $n++;
+    }
+    print $out "\n};\n\n";
+
+    print $out "struct warning_alias {\n";
+    print $out "\tconst char *name;\n";
+    print $out "\tenum warn_index warning;\n";
+    print $out "};\n\n";
+    printf $out "#define NUM_WARNING_ALIAS %d\n", scalar(keys %aliases);
+
+    printf $out "extern const char * const warning_name%d;\n",
+	$#warnings + 2;
+    printf $out "extern const char * const warning_help%d;\n",
+	$#warnings + 2;
+    print $out "extern const struct warning_alias warning_aliasNUM_WARNING_ALIAS;\n";
+    printf $out "extern const uint8_t warning_default%d;\n",
+	$#warn_noall + 2;
+    printf $out "extern uint8_t warning_state%d;\n",
+	$#warn_noall + 2;
+    print $out "\n#endif /* $guard */\n";
+} elsif ($what eq 'doc') {
+    my %whatdef = ( 'on' => 'Enabled',
+		    'off' => 'Disabled',
+		    'err' => 'Enabled and promoted to error' );
+
+    my @indexinfo = ();
+    my @outtxt    = ();
+
+    foreach my $pfx (sort { $a cmp $b } keys(%prefixes)) {
+	my $warn = $aliases{$pfx};
+	my @doc;
+
+	if (!defined($warn)) {
+	    my @plist = sort { $a cmp $b } @{$prefixes{$pfx}};
+	    next if ( $#plist < 1 );
+
+	    @doc = ("all \\c{$pfx-} warnings\n\n",
+		    "\\> \\c{$pfx} is a group alias for all warning classes\n",
+		    "prefixed by \\c{$pfx-}; currently\n");
+	    # Just commas is bad grammar to be sure, but it is more
+	    # legible than the alternative.
+	    push(@doc, join(scalar(@plist) < 3 ? ' and ' : ', ',
+			    map { "\\c{$_}" } @plist).".\n");
+	} elsif ($pfx ne $warn->{name}) {
+	    my $awarn = $aliases{$warn->{name}};
+	    @doc = ($awarn->{help}."\n\n",
+		    "\\> \\c{$pfx} is a backwards compatibility alias for \\c{".
+		    $warn->{name}."}.\n");
+	} else {
+	    my $docdef = $whatdef{$warn->{def}};
+
+	    @doc = ($warn->{help}."\n\n",
+		    "\\> \\c{".$warn->{name}."} ");
+
+	    my $newpara = 0;
+	    foreach my $l (@{$warn->{doc}}) {
+		if ($l =~ /^\s*$/) {
+		    $newpara = 1;
+		} else {
+		    if ($newpara && $l !~ /^\\c\s+/) {
+			$l = '\> ' . $l;
+		    }
+		    $newpara = 0;
+		}
+		push(@doc, $l);
+	    }
+	    if (defined($docdef)) {
+		push(@doc, "\n", "\\> $docdef by default.\n");
+	    }
+	}
+
+	push(@indexinfo, "\\IR{w-$pfx} warning class, \\c{$pfx}\n");
+	push(@outtxt, "\\b \\I{w-$pfx} \\c{$pfx}: ", @doc, "\n");
+    }
+
+    print $out "\n", @indexinfo, "\n", @outtxt;
+}
+
+close($out);
+
+# Write data to file if and only if it has changed
+# For some systems, even if we don't write, opening for append
+# apparently touches the timestamp, so we need to read and write
+# as separate operations.
+if (open(my $out, '<', $outfile)) {
+    my $datalen = length($outdata);
+    my $oldlen = read($out, my $oldoutdata, $datalen+1);
+    close($out);
+    exit 0 if (defined($oldlen) && $oldlen == $datalen &&
+	       ($oldoutdata eq $outdata));
+}
+
+# Data changed, must rewrite
+open(my $out, '>', $outfile)
+    or die "$0: cannot open output file $outfile: $!\n";
+
+print $out $outdata;
+close($out);

_service:tar_scm:nasm-2.16.03.tar.xz/asm/warnings.time Added

_service:tar_scm:nasm-2.16.03.tar.xz/asm/warnings_c.h Added

@@ -0,0 +1,277 @@
+#include "error.h"
+
+const char * const warning_name62 = {
+	NULL,
+	"db-empty",
+	"ea-absolute",
+	"ea-dispsize",
+	"float-denorm",
+	"float-overflow",
+	"float-toolong",
+	"float-underflow",
+	"forward",
+	"label-orphan",
+	"label-redef",
+	"label-redef-late",
+	"number-overflow",
+	"obsolete-nop",
+	"obsolete-removed",
+	"obsolete-valid",
+	"phase",
+	"pp-else-elif",
+	"pp-else-else",
+	"pp-empty-braces",
+	"pp-environment",
+	"pp-macro-def-case-single",
+	"pp-macro-def-greedy-single",
+	"pp-macro-def-param-single",
+	"pp-macro-defaults",
+	"pp-macro-params-legacy",
+	"pp-macro-params-multi",
+	"pp-macro-params-single",
+	"pp-macro-redef-multi",
+	"pp-open-braces",
+	"pp-open-brackets",
+	"pp-open-string",
+	"pp-rep-negative",
+	"pp-sel-range",
+	"pp-trailing",
+	"pragma-bad",
+	"pragma-empty",
+	"pragma-na",
+	"pragma-unknown",
+	"prefix-bnd",
+	"prefix-hle",
+	"prefix-lock-error",
+	"prefix-lock-xchg",
+	"prefix-opsize",
+	"prefix-seg",
+	"ptr",
+	"regsize",
+	"reloc-abs-byte",
+	"reloc-abs-dword",
+	"reloc-abs-qword",
+	"reloc-abs-word",
+	"reloc-rel-byte",
+	"reloc-rel-dword",
+	"reloc-rel-qword",
+	"reloc-rel-word",
+	"unknown-warning",
+	"user",
+	"warn-stack-empty",
+	"zeroing",
+	"zext-reloc",
+	"other",
+	"all"
+};
+
+const struct warning_alias warning_alias77 = {
+	{ "all",                      WARN_IDX_ALL },
+	{ "bad-pragma",               WARN_IDX_PRAGMA_BAD },
+	{ "bnd",                      WARN_IDX_PREFIX_BND },
+	{ "db-empty",                 WARN_IDX_DB_EMPTY },
+	{ "ea-absolute",              WARN_IDX_EA_ABSOLUTE },
+	{ "ea-dispsize",              WARN_IDX_EA_DISPSIZE },
+	{ "environment",              WARN_IDX_PP_ENVIRONMENT },
+	{ "float-denorm",             WARN_IDX_FLOAT_DENORM },
+	{ "float-overflow",           WARN_IDX_FLOAT_OVERFLOW },
+	{ "float-toolong",            WARN_IDX_FLOAT_TOOLONG },
+	{ "float-underflow",          WARN_IDX_FLOAT_UNDERFLOW },
+	{ "forward",                  WARN_IDX_FORWARD },
+	{ "hle",                      WARN_IDX_PREFIX_HLE },
+	{ "label-orphan",             WARN_IDX_LABEL_ORPHAN },
+	{ "label-redef",              WARN_IDX_LABEL_REDEF },
+	{ "label-redef-late",         WARN_IDX_LABEL_REDEF_LATE },
+	{ "lock",                     WARN_IDX_PREFIX_LOCK_ERROR },
+	{ "macro-def-case-single",    WARN_IDX_PP_MACRO_DEF_CASE_SINGLE },
+	{ "macro-def-greedy-single",  WARN_IDX_PP_MACRO_DEF_GREEDY_SINGLE },
+	{ "macro-def-param-single",   WARN_IDX_PP_MACRO_DEF_PARAM_SINGLE },
+	{ "macro-defaults",           WARN_IDX_PP_MACRO_DEFAULTS },
+	{ "macro-params-legacy",      WARN_IDX_PP_MACRO_PARAMS_LEGACY },
+	{ "macro-params-multi",       WARN_IDX_PP_MACRO_PARAMS_MULTI },
+	{ "macro-params-single",      WARN_IDX_PP_MACRO_PARAMS_SINGLE },
+	{ "negative-rep",             WARN_IDX_PP_REP_NEGATIVE },
+	{ "not-my-pragma",            WARN_IDX_PRAGMA_NA },
+	{ "number-overflow",          WARN_IDX_NUMBER_OVERFLOW },
+	{ "obsolete-nop",             WARN_IDX_OBSOLETE_NOP },
+	{ "obsolete-removed",         WARN_IDX_OBSOLETE_REMOVED },
+	{ "obsolete-valid",           WARN_IDX_OBSOLETE_VALID },
+	{ "orphan-labels",            WARN_IDX_LABEL_ORPHAN },
+	{ "other",                    WARN_IDX_OTHER },
+	{ "phase",                    WARN_IDX_PHASE },
+	{ "pp-else-elif",             WARN_IDX_PP_ELSE_ELIF },
+	{ "pp-else-else",             WARN_IDX_PP_ELSE_ELSE },
+	{ "pp-empty-braces",          WARN_IDX_PP_EMPTY_BRACES },
+	{ "pp-environment",           WARN_IDX_PP_ENVIRONMENT },
+	{ "pp-macro-def-case-single", WARN_IDX_PP_MACRO_DEF_CASE_SINGLE },
+	{ "pp-macro-def-greedy-single", WARN_IDX_PP_MACRO_DEF_GREEDY_SINGLE },
+	{ "pp-macro-def-param-single", WARN_IDX_PP_MACRO_DEF_PARAM_SINGLE },
+	{ "pp-macro-defaults",        WARN_IDX_PP_MACRO_DEFAULTS },
+	{ "pp-macro-params-legacy",   WARN_IDX_PP_MACRO_PARAMS_LEGACY },
+	{ "pp-macro-params-multi",    WARN_IDX_PP_MACRO_PARAMS_MULTI },
+	{ "pp-macro-params-single",   WARN_IDX_PP_MACRO_PARAMS_SINGLE },
+	{ "pp-macro-redef-multi",     WARN_IDX_PP_MACRO_REDEF_MULTI },
+	{ "pp-open-braces",           WARN_IDX_PP_OPEN_BRACES },
+	{ "pp-open-brackets",         WARN_IDX_PP_OPEN_BRACKETS },
+	{ "pp-open-string",           WARN_IDX_PP_OPEN_STRING },
+	{ "pp-rep-negative",          WARN_IDX_PP_REP_NEGATIVE },
+	{ "pp-sel-range",             WARN_IDX_PP_SEL_RANGE },
+	{ "pp-trailing",              WARN_IDX_PP_TRAILING },
+	{ "pragma-bad",               WARN_IDX_PRAGMA_BAD },
+	{ "pragma-empty",             WARN_IDX_PRAGMA_EMPTY },
+	{ "pragma-na",                WARN_IDX_PRAGMA_NA },
+	{ "pragma-unknown",           WARN_IDX_PRAGMA_UNKNOWN },
+	{ "prefix-bnd",               WARN_IDX_PREFIX_BND },
+	{ "prefix-hle",               WARN_IDX_PREFIX_HLE },
+	{ "prefix-lock-error",        WARN_IDX_PREFIX_LOCK_ERROR },
+	{ "prefix-lock-xchg",         WARN_IDX_PREFIX_LOCK_XCHG },
+	{ "prefix-opsize",            WARN_IDX_PREFIX_OPSIZE },
+	{ "prefix-seg",               WARN_IDX_PREFIX_SEG },
+	{ "ptr",                      WARN_IDX_PTR },
+	{ "regsize",                  WARN_IDX_REGSIZE },
+	{ "reloc-abs-byte",           WARN_IDX_RELOC_ABS_BYTE },
+	{ "reloc-abs-dword",          WARN_IDX_RELOC_ABS_DWORD },
+	{ "reloc-abs-qword",          WARN_IDX_RELOC_ABS_QWORD },
+	{ "reloc-abs-word",           WARN_IDX_RELOC_ABS_WORD },
+	{ "reloc-rel-byte",           WARN_IDX_RELOC_REL_BYTE },
+	{ "reloc-rel-dword",          WARN_IDX_RELOC_REL_DWORD },
+	{ "reloc-rel-qword",          WARN_IDX_RELOC_REL_QWORD },
+	{ "reloc-rel-word",           WARN_IDX_RELOC_REL_WORD },
+	{ "unknown-pragma",           WARN_IDX_PRAGMA_UNKNOWN },
+	{ "unknown-warning",          WARN_IDX_UNKNOWN_WARNING },
+	{ "user",                     WARN_IDX_USER },
+	{ "warn-stack-empty",         WARN_IDX_WARN_STACK_EMPTY },
+	{ "zeroing",                  WARN_IDX_ZEROING },
+	{ "zext-reloc",               WARN_IDX_ZEXT_RELOC }
+};
+
+const char * const warning_help62 = {
+	NULL,
+	"no operand for data declaration",
+	"absolute address cannot be RIP-relative",
+	"displacement size ignored on absolute address",
+	"floating point denormal",
+	"floating point overflow",
+	"too many digits in floating-point number",
+	"floating point underflow",
+	"forward reference may have unpredictable results",
+	"labels alone on lines without trailing :",
+	"label redefined to an identical value",
+	"label (re)defined during code generation",
+	"numeric constant does not fit",
+	"instruction obsolete and is a noop on the target CPU",
+	"instruction obsolete and removed on the target CPU",
+	"instruction obsolete but valid on the target CPU",
+	"phase error during stabilization",
+	"%elif after %else",
+	"%else after %else",
+	"empty %{} construct",
+	"nonexistent environment variable",
+	"single-line macro defined both case sensitive and insensitive",
+	"single-line macro",
+	"single-line macro defined with and without parameters",
+	"macros with more default than optional parameters",
+	"improperly calling multi-line macro for legacy support",
+	"multi-line macro calls with wrong parameter count",
+	"single-line macro calls with wrong parameter count",
+	"redefining multi-line macro",
+	"unterminated %{...}",
+	"unterminated %...",
+	"unterminated string",
+	"regative %rep count",
+	"%sel() argument out of range",
+	"trailing garbage ignored",
+	"malformed %pragma",
+	"empty %pragma directive",
+	"%pragma not applicable to this compilation",
+	"unknown %pragma facility or directive",
+	"invalid BND prefix",
+	"invalid HLE prefix",
+	"LOCK prefix on unlockable instruction",
+	"superfluous LOCK prefix on XCHG instruction",
+	"invalid operand size prefix",
+	"segment prefix ignored in 64-bit mode",
+	"non-NASM keyword used in other assemblers",
+	"register size specification ignored",
+	"8-bit absolute section-crossing relocation",
+	"32-bit absolute section-crossing relocation",
+	"64-bit absolute section-crossing relocation",
+	"16-bit absolute section-crossing relocation",
+	"8-bit relative section-crossing relocation",
+	"32-bit relative section-crossing relocation",
+	"64-bit relative section-crossing relocation",
+	"16-bit relative section-crossing relocation",
+	"unknown warning in -W/-w or warning directive",
+	"%warning directives",
+	"warning stack empty",
+	"RESx in initialized section becomes zero",
+	"relocation zero-extended to match output format",
+	"any warning not specifically mentioned above",
+	"all possible warnings"
+};
+
+const uint8_t warning_default61 = {
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_OFF,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_OFF,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_OFF,
+	WARN_INIT_ERR,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_OFF,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ERR,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_OFF,
+	WARN_INIT_OFF,
+	WARN_INIT_OFF,
+	WARN_INIT_OFF,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_OFF,
+	WARN_INIT_OFF,
+	WARN_INIT_OFF,
+	WARN_INIT_OFF,
+	WARN_INIT_OFF,
+	WARN_INIT_OFF,
+	WARN_INIT_OFF,
+	WARN_INIT_OFF,
+	WARN_INIT_OFF,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON,
+	WARN_INIT_ON
+};
+
+uint8_t warning_state61;	/* Current state */

_service:tar_scm:nasm-2.16.03.tar.xz/asm/warnings_c.h.time Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/aclocal.m4 Added

@@ -0,0 +1,47 @@
+# generated automatically by aclocal 1.16.5 -*- Autoconf -*-
+
+# Copyright (C) 1996-2021 Free Software Foundation, Inc.
+
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+m4_ifndef(AC_CONFIG_MACRO_DIRS, m4_defun(_AM_CONFIG_MACRO_DIRS, )m4_defun(AC_CONFIG_MACRO_DIRS, _AM_CONFIG_MACRO_DIRS($@)))
+m4_include(autoconf/m4/pa_add_cflags.m4)
+m4_include(autoconf/m4/pa_add_cppflags.m4)
+m4_include(autoconf/m4/pa_add_flags.m4)
+m4_include(autoconf/m4/pa_add_headers.m4)
+m4_include(autoconf/m4/pa_add_langflags.m4)
+m4_include(autoconf/m4/pa_add_ldflags.m4)
+m4_include(autoconf/m4/pa_arg_bool.m4)
+m4_include(autoconf/m4/pa_arg_disabled.m4)
+m4_include(autoconf/m4/pa_arg_enabled.m4)
+m4_include(autoconf/m4/pa_attribute_syntax.m4)
+m4_include(autoconf/m4/pa_build_ifelse.m4)
+m4_include(autoconf/m4/pa_c_typeof.m4)
+m4_include(autoconf/m4/pa_check_bad_stdc_inline.m4)
+m4_include(autoconf/m4/pa_common_attributes.m4)
+m4_include(autoconf/m4/pa_cross_compile.m4)
+m4_include(autoconf/m4/pa_endian.m4)
+m4_include(autoconf/m4/pa_flags_langlist.m4)
+m4_include(autoconf/m4/pa_func_attribute.m4)
+m4_include(autoconf/m4/pa_func_attribute_error.m4)
+m4_include(autoconf/m4/pa_func_snprintf.m4)
+m4_include(autoconf/m4/pa_func_vsnprintf.m4)
+m4_include(autoconf/m4/pa_have_func.m4)
+m4_include(autoconf/m4/pa_lang_foreach.m4)
+m4_include(autoconf/m4/pa_lang_seen_list.m4)
+m4_include(autoconf/m4/pa_libext.m4)
+m4_include(autoconf/m4/pa_option_debug.m4)
+m4_include(autoconf/m4/pa_option_gc.m4)
+m4_include(autoconf/m4/pa_option_lto.m4)
+m4_include(autoconf/m4/pa_option_profiling.m4)
+m4_include(autoconf/m4/pa_option_sanitizer.m4)
+m4_include(autoconf/m4/pa_prog_cc.m4)
+m4_include(autoconf/m4/pa_sym.m4)
+m4_include(autoconf/m4/pa_variadic_macros.m4)

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/attribute.h Added

@@ -0,0 +1,38 @@
+/*
+ * Define a macro for compiler attributes. Use either gcc
+ * syntax if __GNUC__ is defined, or try to look for the
+ * modern standard x attributes.
+ *
+ * Unfortunately x doesn't always work when it comes to
+ * GNUC-specific attributes, and some compilers support GCC
+ * syntax without __attribute__ just to be confusing.
+ * Therefore, this also needs an autoconf module to test
+ * the validity.
+ *
+ * Use #ifdef and not defined() here; some compilers do the wrong
+ * thing in the latter case.
+ */
+
+#ifndef ATTRIBUTE
+# define MODERN_ATTRIBUTE(x) x
+# ifndef __GNUC__
+#  ifdef __cplusplus
+#   ifdef __has_cpp_attribute
+#    define ATTRIBUTE(x) MODERN_ATTRIBUTE(x)
+#   endif
+#  endif
+#  ifndef ATTRIBUTE
+#   ifdef __has_c_attribute
+#    define ATTRIBUTE(x) MODERN_ATTRIBUTE(x)
+#   endif
+#  endif
+#  ifndef ATTRIBUTE
+#   ifdef __has_attribute
+#    define ATTRIBUTE(x) MODERN_ATTRIBUTE(x)
+#   endif
+#  endif
+# endif
+# ifndef ATTRIBUTE
+#  define ATTRIBUTE(x) __attribute__((x))
+# endif
+#endif

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/clean.sh Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/helpers Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/helpers/compile Added

@@ -0,0 +1,348 @@
+#! /bin/sh
+# Wrapper for compilers which do not understand '-c -o'.
+
+scriptversion=2018-03-07.03; # UTC
+
+# Copyright (C) 1999-2018 Free Software Foundation, Inc.
+# Written by Tom Tromey <tromey@cygnus.com>.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <https://www.gnu.org/licenses/>.
+
+# As a special exception to the GNU General Public License, if you
+# distribute this file as part of a program that contains a
+# configuration script generated by Autoconf, you may include it under
+# the same distribution terms that you use for the rest of that program.
+
+# This file is maintained in Automake, please report
+# bugs to <bug-automake@gnu.org> or send patches to
+# <automake-patches@gnu.org>.
+
+nl='
+'
+
+# We need space, tab and new line, in precisely that order.  Quoting is
+# there to prevent tools from complaining about whitespace usage.
+IFS=" ""	$nl"
+
+file_conv=
+
+# func_file_conv build_file lazy
+# Convert a $build file to $host form and store it in $file
+# Currently only supports Windows hosts. If the determined conversion
+# type is listed in (the comma separated) LAZY, no conversion will
+# take place.
+func_file_conv ()
+{
+  file=$1
+  case $file in
+    / | /!/*) # absolute file, and not a UNC file
+      if test -z "$file_conv"; then
+	# lazily determine how to convert abs files
+	case `uname -s` in
+	  MINGW*)
+	    file_conv=mingw
+	    ;;
+	  CYGWIN*)
+	    file_conv=cygwin
+	    ;;
+	  *)
+	    file_conv=wine
+	    ;;
+	esac
+      fi
+      case $file_conv/,$2, in
+	*,$file_conv,*)
+	  ;;
+	mingw/*)
+	  file=`cmd //C echo "$file " | sed -e 's/"$.*$ " *$/\1/'`
+	  ;;
+	cygwin/*)
+	  file=`cygpath -m "$file" || echo "$file"`
+	  ;;
+	wine/*)
+	  file=`winepath -w "$file" || echo "$file"`
+	  ;;
+      esac
+      ;;
+  esac
+}
+
+# func_cl_dashL linkdir
+# Make cl look for libraries in LINKDIR
+func_cl_dashL ()
+{
+  func_file_conv "$1"
+  if test -z "$lib_path"; then
+    lib_path=$file
+  else
+    lib_path="$lib_path;$file"
+  fi
+  linker_opts="$linker_opts -LIBPATH:$file"
+}
+
+# func_cl_dashl library
+# Do a library search-path lookup for cl
+func_cl_dashl ()
+{
+  lib=$1
+  found=no
+  save_IFS=$IFS
+  IFS=';'
+  for dir in $lib_path $LIB
+  do
+    IFS=$save_IFS
+    if $shared && test -f "$dir/$lib.dll.lib"; then
+      found=yes
+      lib=$dir/$lib.dll.lib
+      break
+    fi
+    if test -f "$dir/$lib.lib"; then
+      found=yes
+      lib=$dir/$lib.lib
+      break
+    fi
+    if test -f "$dir/lib$lib.a"; then
+      found=yes
+      lib=$dir/lib$lib.a
+      break
+    fi
+  done
+  IFS=$save_IFS
+
+  if test "$found" != yes; then
+    lib=$lib.lib
+  fi
+}
+
+# func_cl_wrapper cl arg...
+# Adjust compile command to suit cl
+func_cl_wrapper ()
+{
+  # Assume a capable shell
+  lib_path=
+  shared=:
+  linker_opts=
+  for arg
+  do
+    if test -n "$eat"; then
+      eat=
+    else
+      case $1 in
+	-o)
+	  # configure might choose to run compile as 'compile cc -o foo foo.c'.
+	  eat=1
+	  case $2 in
+	    *.o | *.oObBjJ)
+	      func_file_conv "$2"
+	      set x "$@" -Fo"$file"
+	      shift
+	      ;;
+	    *)
+	      func_file_conv "$2"
+	      set x "$@" -Fe"$file"
+	      shift
+	      ;;
+	  esac
+	  ;;
+	-I)
+	  eat=1
+	  func_file_conv "$2" mingw
+	  set x "$@" -I"$file"
+	  shift
+	  ;;
+	-I*)
+	  func_file_conv "${1#-I}" mingw
+	  set x "$@" -I"$file"
+	  shift
+	  ;;
+	-l)
+	  eat=1
+	  func_cl_dashl "$2"
+	  set x "$@" "$lib"
+	  shift
+	  ;;
+	-l*)
+	  func_cl_dashl "${1#-l}"
+	  set x "$@" "$lib"
+	  shift
+	  ;;
+	-L)
+	  eat=1
+	  func_cl_dashL "$2"
+	  ;;
+	-L*)
+	  func_cl_dashL "${1#-L}"
+	  ;;
+	-static)
+	  shared=false
+	  ;;
+	-Wl,*)
+	  arg=${1#-Wl,}
+	  save_ifs="$IFS"; IFS=','
+	  for flag in $arg; do
+	    IFS="$save_ifs"
+	    linker_opts="$linker_opts $flag"
+	  done
+	  IFS="$save_ifs"
+	  ;;
+	-Xlinker)
+	  eat=1
+	  linker_opts="$linker_opts $2"
+	  ;;
+	-*)
+	  set x "$@" "$1"
+	  shift
+	  ;;
+	*.cc | *.CC | *.cxx | *.CXX | *.cC++)
+	  func_file_conv "$1"
+	  set x "$@" -Tp"$file"
+	  shift
+	  ;;
+	*.c | *.cpp | *.CPP | *.lib | *.LIB | *.Lib | *.OBJ | *.obj | *.oO)
+	  func_file_conv "$1" mingw
+	  set x "$@" "$file"
+	  shift
+	  ;;
+	*)
+	  set x "$@" "$1"
+	  shift
+	  ;;
+      esac
+    fi
+    shift
+  done
+  if test -n "$linker_opts"; then
+    linker_opts="-link$linker_opts"
+  fi
+  exec "$@" $linker_opts
+  exit 1
+}
+
+eat=
+
+case $1 in
+  '')
+     echo "$0: No command.  Try '$0 --help' for more information." 1>&2
+     exit 1;
+     ;;
+  -h | --h*)
+    cat <<\EOF
+Usage: compile --help --version PROGRAM ARGS
+
+Wrapper for compilers which do not understand '-c -o'.
+Remove '-o dest.o' from ARGS, run PROGRAM with the remaining
+arguments, and rename the output as expected.
+
+If you are trying to build a whole package this is not the
+right script to run: please start by reading the file 'INSTALL'.
+
+Report bugs to <bug-automake@gnu.org>.
+EOF
+    exit $?
+    ;;
+  -v | --v*)
+    echo "compile $scriptversion"
+    exit $?
+    ;;
+  cl | */\\cl | cl.exe | */\\cl.exe | \
+  icl | */\\icl | icl.exe | */\\icl.exe )
+    func_cl_wrapper "$@"      # Doesn't return...
+    ;;
+esac
+
+ofile=
+cfile=
+
+for arg
+do
+  if test -n "$eat"; then
+    eat=
+  else
+    case $1 in
+      -o)
+	# configure might choose to run compile as 'compile cc -o foo foo.c'.
+	# So we strip '-o arg' only if arg is an object.
+	eat=1
+	case $2 in
+	  *.o | *.obj)
+	    ofile=$2
+	    ;;
+	  *)
+	    set x "$@" -o "$2"
+	    shift
+	    ;;
+	esac
+	;;
+      *.c)
+	cfile=$1
+	set x "$@" "$1"
+	shift
+	;;
+      *)
+	set x "$@" "$1"
+	shift
+	;;
+    esac
+  fi
+  shift
+done
+
+if test -z "$ofile" || test -z "$cfile"; then
+  # If no '-o' option was seen then we might have been invoked from a
+  # pattern rule where we don't need one.  That is ok -- this is a
+  # normal compilation that the losing compiler can handle.  If no
+  # '.c' file was seen then we are probably linking.  That is also
+  # ok.
+  exec "$@"
+fi
+
+# Name of file we expect compiler to create.
+cofile=`echo "$cfile" | sed 's|^.*\\/||; s|^a-zA-Z:||; s/\.c$/.o/'`
+
+# Create the lock directory.
+# Note: use '/\\:.-' here to ensure that we don't use the same name
+# that we are using for the .o file.  Also, base the name on the expected
+# object file name, since that is what matters with a parallel build.
+lockdir=`echo "$cofile" | sed -e 's|/\\:.-|_|g'`.d
+while true; do
+  if mkdir "$lockdir" >/dev/null 2>&1; then
+    break
+  fi
+  sleep 1
+done
+# FIXME: race condition here if user kills between mkdir and trap.
+trap "rmdir '$lockdir'; exit 1" 1 2 15
+
+# Run the compile.
+"$@"
+ret=$?
+
+if test -f "$cofile"; then
+  test "$cofile" = "$ofile" || mv "$cofile" "$ofile"
+elif test -f "${cofile}bj"; then
+  test "${cofile}bj" = "$ofile" || mv "${cofile}bj" "$ofile"
+fi
+
+rmdir "$lockdir"
+exit $ret
+
+# Local Variables:
+# mode: shell-script
+# sh-indentation: 2
+# eval: (add-hook 'before-save-hook 'time-stamp)
+# time-stamp-start: "scriptversion="
+# time-stamp-format: "%:y-%02m-%02d.%02H"
+# time-stamp-time-zone: "UTC0"
+# time-stamp-end: "; # UTC"
+# End:

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/helpers/config.guess Added

@@ -0,0 +1,1768 @@
+#!/usr/bin/sh
+# Attempt to guess a canonical system name.
+#   Copyright 1992-2022 Free Software Foundation, Inc.
+
+# shellcheck disable=SC2006,SC2268 # see below for rationale
+
+timestamp='2022-05-25'
+
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <https://www.gnu.org/licenses/>.
+#
+# As a special exception to the GNU General Public License, if you
+# distribute this file as part of a program that contains a
+# configuration script generated by Autoconf, you may include it under
+# the same distribution terms that you use for the rest of that
+# program.  This Exception is an additional permission under section 7
+# of the GNU General Public License, version 3 ("GPLv3").
+#
+# Originally written by Per Bothner; maintained since 2000 by Ben Elliston.
+#
+# You can get the latest version of this script from:
+# https://git.savannah.gnu.org/cgit/config.git/plain/config.guess
+#
+# Please send patches to <config-patches@gnu.org>.
+
+
+# The "shellcheck disable" line above the timestamp inhibits complaints
+# about features and limitations of the classic Bourne shell that were
+# superseded or lifted in POSIX.  However, this script identifies a wide
+# variety of pre-POSIX systems that do not have POSIX shells at all, and
+# even some reasonably current systems (Solaris 10 as case-in-point) still
+# have a pre-POSIX /bin/sh.
+
+
+me=`echo "$0" | sed -e 's,.*/,,'`
+
+usage="\
+Usage: $0 OPTION
+
+Output the configuration name of the system \`$me' is run on.
+
+Options:
+  -h, --help         print this help, then exit
+  -t, --time-stamp   print date of last modification, then exit
+  -v, --version      print version number, then exit
+
+Report bugs and patches to <config-patches@gnu.org>."
+
+version="\
+GNU config.guess ($timestamp)
+
+Originally written by Per Bothner.
+Copyright 1992-2022 Free Software Foundation, Inc.
+
+This is free software; see the source for copying conditions.  There is NO
+warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE."
+
+help="
+Try \`$me --help' for more information."
+
+# Parse command line
+while test $# -gt 0 ; do
+  case $1 in
+    --time-stamp | --time* | -t )
+       echo "$timestamp" ; exit ;;
+    --version | -v )
+       echo "$version" ; exit ;;
+    --help | --h* | -h )
+       echo "$usage"; exit ;;
+    -- )     # Stop option processing
+       shift; break ;;
+    - )	# Use stdin as input.
+       break ;;
+    -* )
+       echo "$me: invalid option $1$help" >&2
+       exit 1 ;;
+    * )
+       break ;;
+  esac
+done
+
+if test $# != 0; then
+  echo "$me: too many arguments$help" >&2
+  exit 1
+fi
+
+# Just in case it came from the environment.
+GUESS=
+
+# CC_FOR_BUILD -- compiler used by this script. Note that the use of a
+# compiler to aid in system detection is discouraged as it requires
+# temporary files to be created and, as you can see below, it is a
+# headache to deal with in a portable fashion.
+
+# Historically, `CC_FOR_BUILD' used to be named `HOST_CC'. We still
+# use `HOST_CC' if defined, but it is deprecated.
+
+# Portable tmp directory creation inspired by the Autoconf team.
+
+tmp=
+# shellcheck disable=SC2172
+trap 'test -z "$tmp" || rm -fr "$tmp"' 0 1 2 13 15
+
+set_cc_for_build() {
+    # prevent multiple calls if $tmp is already set
+    test "$tmp" && return 0
+    : "${TMPDIR=/tmp}"
+    # shellcheck disable=SC2039,SC3028
+    { tmp=`(umask 077 && mktemp -d "$TMPDIR/cgXXXXXX") 2>/dev/null` && test -n "$tmp" && test -d "$tmp" ; } ||
+	{ test -n "$RANDOM" && tmp=$TMPDIR/cg$$-$RANDOM && (umask 077 && mkdir "$tmp" 2>/dev/null) ; } ||
+	{ tmp=$TMPDIR/cg-$$ && (umask 077 && mkdir "$tmp" 2>/dev/null) && echo "Warning: creating insecure temp directory" >&2 ; } ||
+	{ echo "$me: cannot create a temporary directory in $TMPDIR" >&2 ; exit 1 ; }
+    dummy=$tmp/dummy
+    case ${CC_FOR_BUILD-},${HOST_CC-},${CC-} in
+	,,)    echo "int x;" > "$dummy.c"
+	       for driver in cc gcc c89 c99 ; do
+		   if ($driver -c -o "$dummy.o" "$dummy.c") >/dev/null 2>&1 ; then
+		       CC_FOR_BUILD=$driver
+		       break
+		   fi
+	       done
+	       if test x"$CC_FOR_BUILD" = x ; then
+		   CC_FOR_BUILD=no_compiler_found
+	       fi
+	       ;;
+	,,*)   CC_FOR_BUILD=$CC ;;
+	,*,*)  CC_FOR_BUILD=$HOST_CC ;;
+    esac
+}
+
+# This is needed to find uname on a Pyramid OSx when run in the BSD universe.
+# (ghazi@noc.rutgers.edu 1994-08-24)
+if test -f /.attbin/uname ; then
+	PATH=$PATH:/.attbin ; export PATH
+fi
+
+UNAME_MACHINE=`(uname -m) 2>/dev/null` || UNAME_MACHINE=unknown
+UNAME_RELEASE=`(uname -r) 2>/dev/null` || UNAME_RELEASE=unknown
+UNAME_SYSTEM=`(uname -s) 2>/dev/null` || UNAME_SYSTEM=unknown
+UNAME_VERSION=`(uname -v) 2>/dev/null` || UNAME_VERSION=unknown
+
+case $UNAME_SYSTEM in
+Linux|GNU|GNU/*)
+	LIBC=unknown
+
+	set_cc_for_build
+	cat <<-EOF > "$dummy.c"
+	#include <features.h>
+	#if defined(__UCLIBC__)
+	LIBC=uclibc
+	#elif defined(__dietlibc__)
+	LIBC=dietlibc
+	#elif defined(__GLIBC__)
+	LIBC=gnu
+	#else
+	#include <stdarg.h>
+	/* First heuristic to detect musl libc.  */
+	#ifdef __DEFINED_va_list
+	LIBC=musl
+	#endif
+	#endif
+	EOF
+	cc_set_libc=`$CC_FOR_BUILD -E "$dummy.c" 2>/dev/null | grep '^LIBC' | sed 's, ,,g'`
+	eval "$cc_set_libc"
+
+	# Second heuristic to detect musl libc.
+	if  "$LIBC" = unknown  &&
+	   command -v ldd >/dev/null &&
+	   ldd --version 2>&1 | grep -q ^musl; then
+		LIBC=musl
+	fi
+
+	# If the system lacks a compiler, then just pick glibc.
+	# We could probably try harder.
+	if  "$LIBC" = unknown ; then
+		LIBC=gnu
+	fi
+	;;
+esac
+
+# Note: order is significant - the case branches are not exclusive.
+
+case $UNAME_MACHINE:$UNAME_SYSTEM:$UNAME_RELEASE:$UNAME_VERSION in
+    *:NetBSD:*:*)
+	# NetBSD (nbsd) targets should (where applicable) match one or
+	# more of the tuples: *-*-netbsdelf*, *-*-netbsdaout*,
+	# *-*-netbsdecoff* and *-*-netbsd*.  For targets that recently
+	# switched to ELF, *-*-netbsd* would select the old
+	# object file format.  This provides both forward
+	# compatibility and a consistent mechanism for selecting the
+	# object file format.
+	#
+	# Note: NetBSD doesn't particularly care about the vendor
+	# portion of the name.  We always set it to "unknown".
+	UNAME_MACHINE_ARCH=`(uname -p 2>/dev/null || \
+	    /sbin/sysctl -n hw.machine_arch 2>/dev/null || \
+	    /usr/sbin/sysctl -n hw.machine_arch 2>/dev/null || \
+	    echo unknown)`
+	case $UNAME_MACHINE_ARCH in
+	    aarch64eb) machine=aarch64_be-unknown ;;
+	    armeb) machine=armeb-unknown ;;
+	    arm*) machine=arm-unknown ;;
+	    sh3el) machine=shl-unknown ;;
+	    sh3eb) machine=sh-unknown ;;
+	    sh5el) machine=sh5le-unknown ;;
+	    earmv*)
+		arch=`echo "$UNAME_MACHINE_ARCH" | sed -e 's,^e$armv0-9$.*$,\1,'`
+		endian=`echo "$UNAME_MACHINE_ARCH" | sed -ne 's,^.*$eb$$,\1,p'`
+		machine=${arch}${endian}-unknown
+		;;
+	    *) machine=$UNAME_MACHINE_ARCH-unknown ;;
+	esac
+	# The Operating System including object format, if it has switched
+	# to ELF recently (or will in the future) and ABI.
+	case $UNAME_MACHINE_ARCH in
+	    earm*)
+		os=netbsdelf
+		;;
+	    arm*|i386|m68k|ns32k|sh3*|sparc|vax)
+		set_cc_for_build
+		if echo __ELF__ | $CC_FOR_BUILD -E - 2>/dev/null \
+			| grep -q __ELF__
+		then
+		    # Once all utilities can be ECOFF (netbsdecoff) or a.out (netbsdaout).
+		    # Return netbsd for either.  FIX?
+		    os=netbsd
+		else
+		    os=netbsdelf
+		fi
+		;;
+	    *)
+		os=netbsd
+		;;
+	esac
+	# Determine ABI tags.
+	case $UNAME_MACHINE_ARCH in
+	    earm*)
+		expr='s/^earmv0-9/-eabi/;s/eb$//'
+		abi=`echo "$UNAME_MACHINE_ARCH" | sed -e "$expr"`
+		;;
+	esac
+	# The OS release
+	# Debian GNU/NetBSD machines have a different userland, and
+	# thus, need a distinct triplet. However, they do not need
+	# kernel version information, so it can be replaced with a
+	# suitable tag, in the style of linux-gnu.
+	case $UNAME_VERSION in
+	    Debian*)
+		release='-gnu'
+		;;
+	    *)
+		release=`echo "$UNAME_RELEASE" | sed -e 's/-_.*//' | cut -d. -f1,2`
+		;;
+	esac
+	# Since CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM:
+	# contains redundant information, the shorter form:
+	# CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM is used.
+	GUESS=$machine-${os}${release}${abi-}
+	;;
+    *:Bitrig:*:*)
+	UNAME_MACHINE_ARCH=`arch | sed 's/Bitrig.//'`
+	GUESS=$UNAME_MACHINE_ARCH-unknown-bitrig$UNAME_RELEASE
+	;;
+    *:OpenBSD:*:*)
+	UNAME_MACHINE_ARCH=`arch | sed 's/OpenBSD.//'`
+	GUESS=$UNAME_MACHINE_ARCH-unknown-openbsd$UNAME_RELEASE
+	;;
+    *:SecBSD:*:*)
+	UNAME_MACHINE_ARCH=`arch | sed 's/SecBSD.//'`
+	GUESS=$UNAME_MACHINE_ARCH-unknown-secbsd$UNAME_RELEASE
+	;;
+    *:LibertyBSD:*:*)
+	UNAME_MACHINE_ARCH=`arch | sed 's/^.*BSD\.//'`
+	GUESS=$UNAME_MACHINE_ARCH-unknown-libertybsd$UNAME_RELEASE
+	;;
+    *:MidnightBSD:*:*)
+	GUESS=$UNAME_MACHINE-unknown-midnightbsd$UNAME_RELEASE
+	;;
+    *:ekkoBSD:*:*)
+	GUESS=$UNAME_MACHINE-unknown-ekkobsd$UNAME_RELEASE
+	;;
+    *:SolidBSD:*:*)
+	GUESS=$UNAME_MACHINE-unknown-solidbsd$UNAME_RELEASE
+	;;
+    *:OS108:*:*)
+	GUESS=$UNAME_MACHINE-unknown-os108_$UNAME_RELEASE
+	;;
+    macppc:MirBSD:*:*)
+	GUESS=powerpc-unknown-mirbsd$UNAME_RELEASE
+	;;
+    *:MirBSD:*:*)
+	GUESS=$UNAME_MACHINE-unknown-mirbsd$UNAME_RELEASE
+	;;
+    *:Sortix:*:*)
+	GUESS=$UNAME_MACHINE-unknown-sortix
+	;;
+    *:Twizzler:*:*)
+	GUESS=$UNAME_MACHINE-unknown-twizzler
+	;;
+    *:Redox:*:*)
+	GUESS=$UNAME_MACHINE-unknown-redox
+	;;
+    mips:OSF1:*.*)
+	GUESS=mips-dec-osf1
+	;;
+    alpha:OSF1:*:*)
+	# Reset EXIT trap before exiting to avoid spurious non-zero exit code.
+	trap '' 0
+	case $UNAME_RELEASE in
+	*4.0)
+		UNAME_RELEASE=`/usr/sbin/sizer -v | awk '{print $3}'`
+		;;
+	*5.*)
+		UNAME_RELEASE=`/usr/sbin/sizer -v | awk '{print $4}'`
+		;;
+	esac
+	# According to Compaq, /usr/sbin/psrinfo has been available on
+	# OSF/1 and Tru64 systems produced since 1995.  I hope that
+	# covers most systems running today.  This code pipes the CPU
+	# types through head -n 1, so we only detect the type of CPU 0.
+	ALPHA_CPU_TYPE=`/usr/sbin/psrinfo -v | sed -n -e 's/^  The alpha $.*$ processor.*$/\1/p' | head -n 1`
+	case $ALPHA_CPU_TYPE in
+	    "EV4 (21064)")
+		UNAME_MACHINE=alpha ;;
+	    "EV4.5 (21064)")
+		UNAME_MACHINE=alpha ;;
+	    "LCA4 (21066/21068)")
+		UNAME_MACHINE=alpha ;;
+	    "EV5 (21164)")
+		UNAME_MACHINE=alphaev5 ;;
+	    "EV5.6 (21164A)")
+		UNAME_MACHINE=alphaev56 ;;
+	    "EV5.6 (21164PC)")
+		UNAME_MACHINE=alphapca56 ;;
+	    "EV5.7 (21164PC)")
+		UNAME_MACHINE=alphapca57 ;;
+	    "EV6 (21264)")
+		UNAME_MACHINE=alphaev6 ;;
+	    "EV6.7 (21264A)")
+		UNAME_MACHINE=alphaev67 ;;
+	    "EV6.8CB (21264C)")
+		UNAME_MACHINE=alphaev68 ;;
+	    "EV6.8AL (21264B)")
+		UNAME_MACHINE=alphaev68 ;;
+	    "EV6.8CX (21264D)")
+		UNAME_MACHINE=alphaev68 ;;
+	    "EV6.9A (21264/EV69A)")
+		UNAME_MACHINE=alphaev69 ;;
+	    "EV7 (21364)")
+		UNAME_MACHINE=alphaev7 ;;
+	    "EV7.9 (21364A)")
+		UNAME_MACHINE=alphaev79 ;;
+	esac
+	# A Pn.n version is a patched version.
+	# A Vn.n version is a released version.
+	# A Tn.n version is a released field test version.
+	# A Xn.n version is an unreleased experimental baselevel.
+	# 1.2 uses "1.2" for uname -r.
+	OSF_REL=`echo "$UNAME_RELEASE" | sed -e 's/^PVTX//' | tr ABCDEFGHIJKLMNOPQRSTUVWXYZ abcdefghijklmnopqrstuvwxyz`
+	GUESS=$UNAME_MACHINE-dec-osf$OSF_REL
+	;;
+    Amiga*:UNIX_System_V:4.0:*)
+	GUESS=m68k-unknown-sysv4
+	;;
+    *:AamigaOoSs:*:*)
+	GUESS=$UNAME_MACHINE-unknown-amigaos
+	;;
+    *:MmorphOoSs:*:*)
+	GUESS=$UNAME_MACHINE-unknown-morphos
+	;;
+    *:OS/390:*:*)
+	GUESS=i370-ibm-openedition
+	;;
+    *:z/VM:*:*)
+	GUESS=s390-ibm-zvmoe
+	;;
+    *:OS400:*:*)
+	GUESS=powerpc-ibm-os400
+	;;
+    arm:RISC*:1.012*:*|arm:riscix:1.012*:*)
+	GUESS=arm-acorn-riscix$UNAME_RELEASE
+	;;
+    arm*:riscos:*:*|arm*:RISCOS:*:*)
+	GUESS=arm-unknown-riscos
+	;;
+    SR2?01:HI-UX/MPP:*:* | SR8000:HI-UX/MPP:*:*)
+	GUESS=hppa1.1-hitachi-hiuxmpp
+	;;
+    Pyramid*:OSx*:*:* | MIS*:OSx*:*:* | MIS*:SMP_DC-OSx*:*:*)
+	# akee@wpdis03.wpafb.af.mil (Earle F. Ake) contributed MIS and NILE.
+	case `(/bin/universe) 2>/dev/null` in
+	    att) GUESS=pyramid-pyramid-sysv3 ;;
+	    *)   GUESS=pyramid-pyramid-bsd   ;;
+	esac
+	;;
+    NILE*:*:*:dcosx)
+	GUESS=pyramid-pyramid-svr4
+	;;
+    DRS?6000:unix:4.0:6*)
+	GUESS=sparc-icl-nx6
+	;;
+    DRS?6000:UNIX_SV:4.2*:7* | DRS?6000:isis:4.2*:7*)
+	case `/usr/bin/uname -p` in
+	    sparc) GUESS=sparc-icl-nx7 ;;
+	esac
+	;;
+    s390x:SunOS:*:*)
+	SUN_REL=`echo "$UNAME_RELEASE" | sed -e 's/^.*//'`
+	GUESS=$UNAME_MACHINE-ibm-solaris2$SUN_REL
+	;;
+    sun4H:SunOS:5.*:*)
+	SUN_REL=`echo "$UNAME_RELEASE" | sed -e 's/^.*//'`
+	GUESS=sparc-hal-solaris2$SUN_REL
+	;;
+    sun4*:SunOS:5.*:* | tadpole*:SunOS:5.*:*)
+	SUN_REL=`echo "$UNAME_RELEASE" | sed -e 's/^.*//'`
+	GUESS=sparc-sun-solaris2$SUN_REL
+	;;
+    i86pc:AuroraUX:5.*:* | i86xen:AuroraUX:5.*:*)
+	GUESS=i386-pc-auroraux$UNAME_RELEASE
+	;;
+    i86pc:SunOS:5.*:* | i86xen:SunOS:5.*:*)
+	set_cc_for_build
+	SUN_ARCH=i386
+	# If there is a compiler, see if it is configured for 64-bit objects.
+	# Note that the Sun cc does not turn __LP64__ into 1 like gcc does.
+	# This test works for both compilers.
+	if test "$CC_FOR_BUILD" != no_compiler_found; then
+	    if (echo '#ifdef __amd64'; echo IS_64BIT_ARCH; echo '#endif') | \
+		(CCOPTS="" $CC_FOR_BUILD -m64 -E - 2>/dev/null) | \
+		grep IS_64BIT_ARCH >/dev/null
+	    then
+		SUN_ARCH=x86_64
+	    fi
+	fi
+	SUN_REL=`echo "$UNAME_RELEASE" | sed -e 's/^.*//'`
+	GUESS=$SUN_ARCH-pc-solaris2$SUN_REL
+	;;
+    sun4*:SunOS:6*:*)
+	# According to config.sub, this is the proper way to canonicalize
+	# SunOS6.  Hard to guess exactly what SunOS6 will be like, but
+	# it's likely to be more like Solaris than SunOS4.
+	SUN_REL=`echo "$UNAME_RELEASE" | sed -e 's/^.*//'`
+	GUESS=sparc-sun-solaris3$SUN_REL
+	;;
+    sun4*:SunOS:*:*)
+	case `/usr/bin/arch -k` in
+	    Series*|S4*)
+		UNAME_RELEASE=`uname -v`
+		;;
+	esac
+	# Japanese Language versions have a version number like `4.1.3-JL'.
+	SUN_REL=`echo "$UNAME_RELEASE" | sed -e 's/-/_/'`
+	GUESS=sparc-sun-sunos$SUN_REL
+	;;
+    sun3*:SunOS:*:*)
+	GUESS=m68k-sun-sunos$UNAME_RELEASE
+	;;
+    sun*:*:4.2BSD:*)
+	UNAME_RELEASE=`(sed 1q /etc/motd | awk '{print substr($5,1,3)}') 2>/dev/null`
+	test "x$UNAME_RELEASE" = x && UNAME_RELEASE=3
+	case `/bin/arch` in
+	    sun3)
+		GUESS=m68k-sun-sunos$UNAME_RELEASE
+		;;
+	    sun4)
+		GUESS=sparc-sun-sunos$UNAME_RELEASE
+		;;
+	esac
+	;;
+    aushp:SunOS:*:*)
+	GUESS=sparc-auspex-sunos$UNAME_RELEASE
+	;;
+    # The situation for MiNT is a little confusing.  The machine name
+    # can be virtually everything (everything which is not
+    # "atarist" or "atariste" at least should have a processor
+    # > m68000).  The system name ranges from "MiNT" over "FreeMiNT"
+    # to the lowercase version "mint" (or "freemint").  Finally
+    # the system name "TOS" denotes a system which is actually not
+    # MiNT.  But MiNT is downward compatible to TOS, so this should
+    # be no problem.
+    atariste:*MiNT:*:* | atariste:*mint:*:* | atariste:*TOS:*:*)
+	GUESS=m68k-atari-mint$UNAME_RELEASE
+	;;
+    atari*:*MiNT:*:* | atari*:*mint:*:* | atariste:*TOS:*:*)
+	GUESS=m68k-atari-mint$UNAME_RELEASE
+	;;
+    *falcon*:*MiNT:*:* | *falcon*:*mint:*:* | *falcon*:*TOS:*:*)
+	GUESS=m68k-atari-mint$UNAME_RELEASE
+	;;
+    milan*:*MiNT:*:* | milan*:*mint:*:* | *milan*:*TOS:*:*)
+	GUESS=m68k-milan-mint$UNAME_RELEASE
+	;;
+    hades*:*MiNT:*:* | hades*:*mint:*:* | *hades*:*TOS:*:*)
+	GUESS=m68k-hades-mint$UNAME_RELEASE
+	;;
+    *:*MiNT:*:* | *:*mint:*:* | *:*TOS:*:*)
+	GUESS=m68k-unknown-mint$UNAME_RELEASE
+	;;
+    m68k:machten:*:*)
+	GUESS=m68k-apple-machten$UNAME_RELEASE
+	;;
+    powerpc:machten:*:*)
+	GUESS=powerpc-apple-machten$UNAME_RELEASE
+	;;
+    RISC*:Mach:*:*)
+	GUESS=mips-dec-mach_bsd4.3
+	;;
+    RISC*:ULTRIX:*:*)
+	GUESS=mips-dec-ultrix$UNAME_RELEASE
+	;;
+    VAX*:ULTRIX*:*:*)
+	GUESS=vax-dec-ultrix$UNAME_RELEASE
+	;;
+    2020:CLIX:*:* | 2430:CLIX:*:*)
+	GUESS=clipper-intergraph-clix$UNAME_RELEASE
+	;;
+    mips:*:*:UMIPS | mips:*:*:RISCos)
+	set_cc_for_build
+	sed 's/^	//' << EOF > "$dummy.c"
+#ifdef __cplusplus
+#include <stdio.h>  /* for printf() prototype */
+	int main (int argc, char *argv) {
+#else
+	int main (argc, argv) int argc; char *argv; {
+#endif
+	#if defined (host_mips) && defined (MIPSEB)
+	#if defined (SYSTYPE_SYSV)
+	  printf ("mips-mips-riscos%ssysv\\n", argv1); exit (0);
+	#endif
+	#if defined (SYSTYPE_SVR4)
+	  printf ("mips-mips-riscos%ssvr4\\n", argv1); exit (0);
+	#endif
+	#if defined (SYSTYPE_BSD43) || defined(SYSTYPE_BSD)
+	  printf ("mips-mips-riscos%sbsd\\n", argv1); exit (0);
+	#endif
+	#endif
+	  exit (-1);
+	}
+EOF
+	$CC_FOR_BUILD -o "$dummy" "$dummy.c" &&
+	  dummyarg=`echo "$UNAME_RELEASE" | sed -n 's/$0-9*$.*/\1/p'` &&
+	  SYSTEM_NAME=`"$dummy" "$dummyarg"` &&
+	    { echo "$SYSTEM_NAME"; exit; }
+	GUESS=mips-mips-riscos$UNAME_RELEASE
+	;;
+    Motorola:PowerMAX_OS:*:*)
+	GUESS=powerpc-motorola-powermax
+	;;
+    Motorola:*:4.3:PL8-*)
+	GUESS=powerpc-harris-powermax
+	;;
+    Night_Hawk:*:*:PowerMAX_OS | Synergy:PowerMAX_OS:*:*)
+	GUESS=powerpc-harris-powermax
+	;;
+    Night_Hawk:Power_UNIX:*:*)
+	GUESS=powerpc-harris-powerunix
+	;;
+    m88k:CX/UX:7*:*)
+	GUESS=m88k-harris-cxux7
+	;;
+    m88k:*:4*:R4*)
+	GUESS=m88k-motorola-sysv4
+	;;
+    m88k:*:3*:R3*)
+	GUESS=m88k-motorola-sysv3
+	;;
+    AViiON:dgux:*:*)
+	# DG/UX returns AViiON for all architectures
+	UNAME_PROCESSOR=`/usr/bin/uname -p`
+	if test "$UNAME_PROCESSOR" = mc88100 || test "$UNAME_PROCESSOR" = mc88110
+	then
+	    if test "$TARGET_BINARY_INTERFACE"x = m88kdguxelfx || \
+	       test "$TARGET_BINARY_INTERFACE"x = x
+	    then
+		GUESS=m88k-dg-dgux$UNAME_RELEASE
+	    else
+		GUESS=m88k-dg-dguxbcs$UNAME_RELEASE
+	    fi
+	else
+	    GUESS=i586-dg-dgux$UNAME_RELEASE
+	fi
+	;;
+    M88*:DolphinOS:*:*)	# DolphinOS (SVR3)
+	GUESS=m88k-dolphin-sysv3
+	;;
+    M88*:*:R3*:*)
+	# Delta 88k system running SVR3
+	GUESS=m88k-motorola-sysv3
+	;;
+    XD88*:*:*:*) # Tektronix XD88 system running UTekV (SVR3)
+	GUESS=m88k-tektronix-sysv3
+	;;
+    Tek430-90-9:UTek:*:*) # Tektronix 4300 system running UTek (BSD)
+	GUESS=m68k-tektronix-bsd
+	;;
+    *:IRIX*:*:*)
+	IRIX_REL=`echo "$UNAME_RELEASE" | sed -e 's/-/_/g'`
+	GUESS=mips-sgi-irix$IRIX_REL
+	;;
+    ????????:AIX?:12.1:2)   # AIX 2.2.1 or AIX 2.1.1 is RT/PC AIX.
+	GUESS=romp-ibm-aix    # uname -m gives an 8 hex-code CPU id
+	;;                    # Note that: echo "'`uname -s`'" gives 'AIX '
+    i*86:AIX:*:*)
+	GUESS=i386-ibm-aix
+	;;
+    ia64:AIX:*:*)
+	if test -x /usr/bin/oslevel ; then
+		IBM_REV=`/usr/bin/oslevel`
+	else
+		IBM_REV=$UNAME_VERSION.$UNAME_RELEASE
+	fi
+	GUESS=$UNAME_MACHINE-ibm-aix$IBM_REV
+	;;
+    *:AIX:2:3)
+	if grep bos325 /usr/include/stdio.h >/dev/null 2>&1; then
+		set_cc_for_build
+		sed 's/^		//' << EOF > "$dummy.c"
+		#include <sys/systemcfg.h>
+
+		main()
+			{
+			if (!__power_pc())
+				exit(1);
+			puts("powerpc-ibm-aix3.2.5");
+			exit(0);
+			}
+EOF
+		if $CC_FOR_BUILD -o "$dummy" "$dummy.c" && SYSTEM_NAME=`"$dummy"`
+		then
+			GUESS=$SYSTEM_NAME
+		else
+			GUESS=rs6000-ibm-aix3.2.5
+		fi
+	elif grep bos324 /usr/include/stdio.h >/dev/null 2>&1; then
+		GUESS=rs6000-ibm-aix3.2.4
+	else
+		GUESS=rs6000-ibm-aix3.2
+	fi
+	;;
+    *:AIX:*:4567)
+	IBM_CPU_ID=`/usr/sbin/lsdev -C -c processor -S available | sed 1q | awk '{ print $1 }'`
+	if /usr/sbin/lsattr -El "$IBM_CPU_ID" | grep ' POWER' >/dev/null 2>&1; then
+		IBM_ARCH=rs6000
+	else
+		IBM_ARCH=powerpc
+	fi
+	if test -x /usr/bin/lslpp ; then
+		IBM_REV=`/usr/bin/lslpp -Lqc bos.rte.libc | \
+			   awk -F: '{ print $3 }' | sed s/0-9*$/0/`
+	else
+		IBM_REV=$UNAME_VERSION.$UNAME_RELEASE
+	fi
+	GUESS=$IBM_ARCH-ibm-aix$IBM_REV
+	;;
+    *:AIX:*:*)
+	GUESS=rs6000-ibm-aix
+	;;
+    ibmrt:4.4BSD:*|romp-ibm:4.4BSD:*)
+	GUESS=romp-ibm-bsd4.4
+	;;
+    ibmrt:*BSD:*|romp-ibm:BSD:*)            # covers RT/PC BSD and
+	GUESS=romp-ibm-bsd$UNAME_RELEASE    # 4.3 with uname added to
+	;;                                  # report: romp-ibm BSD 4.3
+    *:BOSX:*:*)
+	GUESS=rs6000-bull-bosx
+	;;
+    DPX/2?00:B.O.S.:*:*)
+	GUESS=m68k-bull-sysv3
+	;;
+    9000/34??:4.3bsd:1.*:*)
+	GUESS=m68k-hp-bsd
+	;;
+    hp300:4.4BSD:*:* | 9000/34??:4.3bsd:2.*:*)
+	GUESS=m68k-hp-bsd4.4
+	;;
+    9000/34678??:HP-UX:*:*)
+	HPUX_REV=`echo "$UNAME_RELEASE" | sed -e 's/^.*.0B*//'`
+	case $UNAME_MACHINE in
+	    9000/31?)            HP_ARCH=m68000 ;;
+	    9000/34??)         HP_ARCH=m68k ;;
+	    9000/6780-90-9)
+		if test -x /usr/bin/getconf; then
+		    sc_cpu_version=`/usr/bin/getconf SC_CPU_VERSION 2>/dev/null`
+		    sc_kernel_bits=`/usr/bin/getconf SC_KERNEL_BITS 2>/dev/null`
+		    case $sc_cpu_version in
+		      523) HP_ARCH=hppa1.0 ;; # CPU_PA_RISC1_0
+		      528) HP_ARCH=hppa1.1 ;; # CPU_PA_RISC1_1
+		      532)                      # CPU_PA_RISC2_0
+			case $sc_kernel_bits in
+			  32) HP_ARCH=hppa2.0n ;;
+			  64) HP_ARCH=hppa2.0w ;;
+			  '') HP_ARCH=hppa2.0 ;;   # HP-UX 10.20
+			esac ;;
+		    esac
+		fi
+		if test "$HP_ARCH" = ""; then
+		    set_cc_for_build
+		    sed 's/^		//' << EOF > "$dummy.c"
+
+		#define _HPUX_SOURCE
+		#include <stdlib.h>
+		#include <unistd.h>
+
+		int main ()
+		{
+		#if defined(_SC_KERNEL_BITS)
+		    long bits = sysconf(_SC_KERNEL_BITS);
+		#endif
+		    long cpu  = sysconf (_SC_CPU_VERSION);
+
+		    switch (cpu)
+			{
+			case CPU_PA_RISC1_0: puts ("hppa1.0"); break;
+			case CPU_PA_RISC1_1: puts ("hppa1.1"); break;
+			case CPU_PA_RISC2_0:
+		#if defined(_SC_KERNEL_BITS)
+			    switch (bits)
+				{
+				case 64: puts ("hppa2.0w"); break;
+				case 32: puts ("hppa2.0n"); break;
+				default: puts ("hppa2.0"); break;
+				} break;
+		#else  /* !defined(_SC_KERNEL_BITS) */
+			    puts ("hppa2.0"); break;
+		#endif
+			default: puts ("hppa1.0"); break;
+			}
+		    exit (0);
+		}
+EOF
+		    (CCOPTS="" $CC_FOR_BUILD -o "$dummy" "$dummy.c" 2>/dev/null) && HP_ARCH=`"$dummy"`
+		    test -z "$HP_ARCH" && HP_ARCH=hppa
+		fi ;;
+	esac
+	if test "$HP_ARCH" = hppa2.0w
+	then
+	    set_cc_for_build
+
+	    # hppa2.0w-hp-hpux* has a 64-bit kernel and a compiler generating
+	    # 32-bit code.  hppa64-hp-hpux* has the same kernel and a compiler
+	    # generating 64-bit code.  GNU and HP use different nomenclature:
+	    #
+	    # $ CC_FOR_BUILD=cc ./config.guess
+	    # => hppa2.0w-hp-hpux11.23
+	    # $ CC_FOR_BUILD="cc +DA2.0w" ./config.guess
+	    # => hppa64-hp-hpux11.23
+
+	    if echo __LP64__ | (CCOPTS="" $CC_FOR_BUILD -E - 2>/dev/null) |
+		grep -q __LP64__
+	    then
+		HP_ARCH=hppa2.0w
+	    else
+		HP_ARCH=hppa64
+	    fi
+	fi
+	GUESS=$HP_ARCH-hp-hpux$HPUX_REV
+	;;
+    ia64:HP-UX:*:*)
+	HPUX_REV=`echo "$UNAME_RELEASE" | sed -e 's/^.*.0B*//'`
+	GUESS=ia64-hp-hpux$HPUX_REV
+	;;
+    3050*:HI-UX:*:*)
+	set_cc_for_build
+	sed 's/^	//' << EOF > "$dummy.c"
+	#include <unistd.h>
+	int
+	main ()
+	{
+	  long cpu = sysconf (_SC_CPU_VERSION);
+	  /* The order matters, because CPU_IS_HP_MC68K erroneously returns
+	     true for CPU_PA_RISC1_0.  CPU_IS_PA_RISC returns correct
+	     results, however.  */
+	  if (CPU_IS_PA_RISC (cpu))
+	    {
+	      switch (cpu)
+		{
+		  case CPU_PA_RISC1_0: puts ("hppa1.0-hitachi-hiuxwe2"); break;
+		  case CPU_PA_RISC1_1: puts ("hppa1.1-hitachi-hiuxwe2"); break;
+		  case CPU_PA_RISC2_0: puts ("hppa2.0-hitachi-hiuxwe2"); break;
+		  default: puts ("hppa-hitachi-hiuxwe2"); break;
+		}
+	    }
+	  else if (CPU_IS_HP_MC68K (cpu))
+	    puts ("m68k-hitachi-hiuxwe2");
+	  else puts ("unknown-hitachi-hiuxwe2");
+	  exit (0);
+	}
+EOF
+	$CC_FOR_BUILD -o "$dummy" "$dummy.c" && SYSTEM_NAME=`"$dummy"` &&
+		{ echo "$SYSTEM_NAME"; exit; }
+	GUESS=unknown-hitachi-hiuxwe2
+	;;
+    9000/7??:4.3bsd:*:* | 9000/8?79:4.3bsd:*:*)
+	GUESS=hppa1.1-hp-bsd
+	;;
+    9000/8??:4.3bsd:*:*)
+	GUESS=hppa1.0-hp-bsd
+	;;
+    *9??*:MPE/iX:*:* | *3000*:MPE/iX:*:*)
+	GUESS=hppa1.0-hp-mpeix
+	;;
+    hp7??:OSF1:*:* | hp8?79:OSF1:*:*)
+	GUESS=hppa1.1-hp-osf
+	;;
+    hp8??:OSF1:*:*)
+	GUESS=hppa1.0-hp-osf
+	;;
+    i*86:OSF1:*:*)
+	if test -x /usr/sbin/sysversion ; then
+	    GUESS=$UNAME_MACHINE-unknown-osf1mk
+	else
+	    GUESS=$UNAME_MACHINE-unknown-osf1
+	fi
+	;;
+    parisc*:Lites*:*:*)
+	GUESS=hppa1.1-hp-lites
+	;;
+    C1*:ConvexOS:*:* | convex:ConvexOS:C1*:*)
+	GUESS=c1-convex-bsd
+	;;
+    C2*:ConvexOS:*:* | convex:ConvexOS:C2*:*)
+	if getsysinfo -f scalar_acc
+	then echo c32-convex-bsd
+	else echo c2-convex-bsd
+	fi
+	exit ;;
+    C34*:ConvexOS:*:* | convex:ConvexOS:C34*:*)
+	GUESS=c34-convex-bsd
+	;;
+    C38*:ConvexOS:*:* | convex:ConvexOS:C38*:*)
+	GUESS=c38-convex-bsd
+	;;
+    C4*:ConvexOS:*:* | convex:ConvexOS:C4*:*)
+	GUESS=c4-convex-bsd
+	;;
+    CRAY*Y-MP:*:*:*)
+	CRAY_REL=`echo "$UNAME_RELEASE" | sed -e 's/\.^.*$/.X/'`
+	GUESS=ymp-cray-unicos$CRAY_REL
+	;;
+    CRAY*A-Z90:*:*:*)
+	echo "$UNAME_MACHINE"-cray-unicos"$UNAME_RELEASE" \
+	| sed -e 's/CRAY.*$A-Z90$/\1/' \
+	      -e y/ABCDEFGHIJKLMNOPQRSTUVWXYZ/abcdefghijklmnopqrstuvwxyz/ \
+	      -e 's/\.^.*$/.X/'
+	exit ;;
+    CRAY*TS:*:*:*)
+	CRAY_REL=`echo "$UNAME_RELEASE" | sed -e 's/\.^.*$/.X/'`
+	GUESS=t90-cray-unicos$CRAY_REL
+	;;
+    CRAY*T3E:*:*:*)
+	CRAY_REL=`echo "$UNAME_RELEASE" | sed -e 's/\.^.*$/.X/'`
+	GUESS=alphaev5-cray-unicosmk$CRAY_REL
+	;;
+    CRAY*SV1:*:*:*)
+	CRAY_REL=`echo "$UNAME_RELEASE" | sed -e 's/\.^.*$/.X/'`
+	GUESS=sv1-cray-unicos$CRAY_REL
+	;;
+    *:UNICOS/mp:*:*)
+	CRAY_REL=`echo "$UNAME_RELEASE" | sed -e 's/\.^.*$/.X/'`
+	GUESS=craynv-cray-unicosmp$CRAY_REL
+	;;
+    F3001:UNIX_System_V:*:* | F700:UNIX_System_V:*:*)
+	FUJITSU_PROC=`uname -m | tr ABCDEFGHIJKLMNOPQRSTUVWXYZ abcdefghijklmnopqrstuvwxyz`
+	FUJITSU_SYS=`uname -p | tr ABCDEFGHIJKLMNOPQRSTUVWXYZ abcdefghijklmnopqrstuvwxyz | sed -e 's/\///'`
+	FUJITSU_REL=`echo "$UNAME_RELEASE" | sed -e 's/ /_/'`
+	GUESS=${FUJITSU_PROC}-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}
+	;;
+    5000:UNIX_System_V:4.*:*)
+	FUJITSU_SYS=`uname -p | tr ABCDEFGHIJKLMNOPQRSTUVWXYZ abcdefghijklmnopqrstuvwxyz | sed -e 's/\///'`
+	FUJITSU_REL=`echo "$UNAME_RELEASE" | tr ABCDEFGHIJKLMNOPQRSTUVWXYZ abcdefghijklmnopqrstuvwxyz | sed -e 's/ /_/'`
+	GUESS=sparc-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}
+	;;
+    i*86:BSD/386:*:* | i*86:BSD/OS:*:* | *:Ascend\ Embedded/OS:*:*)
+	GUESS=$UNAME_MACHINE-pc-bsdi$UNAME_RELEASE
+	;;
+    sparc*:BSD/OS:*:*)
+	GUESS=sparc-unknown-bsdi$UNAME_RELEASE
+	;;
+    *:BSD/OS:*:*)
+	GUESS=$UNAME_MACHINE-unknown-bsdi$UNAME_RELEASE
+	;;
+    arm:FreeBSD:*:*)
+	UNAME_PROCESSOR=`uname -p`
+	set_cc_for_build
+	if echo __ARM_PCS_VFP | $CC_FOR_BUILD -E - 2>/dev/null \
+	    | grep -q __ARM_PCS_VFP
+	then
+	    FREEBSD_REL=`echo "$UNAME_RELEASE" | sed -e 's/-(.*//'`
+	    GUESS=$UNAME_PROCESSOR-unknown-freebsd$FREEBSD_REL-gnueabi
+	else
+	    FREEBSD_REL=`echo "$UNAME_RELEASE" | sed -e 's/-(.*//'`
+	    GUESS=$UNAME_PROCESSOR-unknown-freebsd$FREEBSD_REL-gnueabihf
+	fi
+	;;
+    *:FreeBSD:*:*)
+	UNAME_PROCESSOR=`/usr/bin/uname -p`
+	case $UNAME_PROCESSOR in
+	    amd64)
+		UNAME_PROCESSOR=x86_64 ;;
+	    i386)
+		UNAME_PROCESSOR=i586 ;;
+	esac
+	FREEBSD_REL=`echo "$UNAME_RELEASE" | sed -e 's/-(.*//'`
+	GUESS=$UNAME_PROCESSOR-unknown-freebsd$FREEBSD_REL
+	;;
+    i*:CYGWIN*:*)
+	GUESS=$UNAME_MACHINE-pc-cygwin
+	;;
+    *:MINGW64*:*)
+	GUESS=$UNAME_MACHINE-pc-mingw64
+	;;
+    *:MINGW*:*)
+	GUESS=$UNAME_MACHINE-pc-mingw32
+	;;
+    *:MSYS*:*)
+	GUESS=$UNAME_MACHINE-pc-msys
+	;;
+    i*:PW*:*)
+	GUESS=$UNAME_MACHINE-pc-pw32
+	;;
+    *:SerenityOS:*:*)
+        GUESS=$UNAME_MACHINE-pc-serenity
+        ;;
+    *:Interix*:*)
+	case $UNAME_MACHINE in
+	    x86)
+		GUESS=i586-pc-interix$UNAME_RELEASE
+		;;
+	    authenticamd | genuineintel | EM64T)
+		GUESS=x86_64-unknown-interix$UNAME_RELEASE
+		;;
+	    IA64)
+		GUESS=ia64-unknown-interix$UNAME_RELEASE
+		;;
+	esac ;;
+    i*:UWIN*:*)
+	GUESS=$UNAME_MACHINE-pc-uwin
+	;;
+    amd64:CYGWIN*:*:* | x86_64:CYGWIN*:*:*)
+	GUESS=x86_64-pc-cygwin
+	;;
+    prep*:SunOS:5.*:*)
+	SUN_REL=`echo "$UNAME_RELEASE" | sed -e 's/^.*//'`
+	GUESS=powerpcle-unknown-solaris2$SUN_REL
+	;;
+    *:GNU:*:*)
+	# the GNU system
+	GNU_ARCH=`echo "$UNAME_MACHINE" | sed -e 's,-/.*$,,'`
+	GNU_REL=`echo "$UNAME_RELEASE" | sed -e 's,/.*$,,'`
+	GUESS=$GNU_ARCH-unknown-$LIBC$GNU_REL
+	;;
+    *:GNU/*:*:*)
+	# other systems with GNU libc and userland
+	GNU_SYS=`echo "$UNAME_SYSTEM" | sed 's,^^/*/,,' | tr ":upper:" ":lower:"`
+	GNU_REL=`echo "$UNAME_RELEASE" | sed -e 's/-(.*//'`
+	GUESS=$UNAME_MACHINE-unknown-$GNU_SYS$GNU_REL-$LIBC
+	;;
+    *:Minix:*:*)
+	GUESS=$UNAME_MACHINE-unknown-minix
+	;;
+    aarch64:Linux:*:*)
+	GUESS=$UNAME_MACHINE-unknown-linux-$LIBC
+	;;
+    aarch64_be:Linux:*:*)
+	UNAME_MACHINE=aarch64_be
+	GUESS=$UNAME_MACHINE-unknown-linux-$LIBC
+	;;
+    alpha:Linux:*:*)
+	case `sed -n '/^cpu model/s/^.*: $.*$/\1/p' /proc/cpuinfo 2>/dev/null` in
+	  EV5)   UNAME_MACHINE=alphaev5 ;;
+	  EV56)  UNAME_MACHINE=alphaev56 ;;
+	  PCA56) UNAME_MACHINE=alphapca56 ;;
+	  PCA57) UNAME_MACHINE=alphapca56 ;;
+	  EV6)   UNAME_MACHINE=alphaev6 ;;
+	  EV67)  UNAME_MACHINE=alphaev67 ;;
+	  EV68*) UNAME_MACHINE=alphaev68 ;;
+	esac
+	objdump --private-headers /bin/sh | grep -q ld.so.1
+	if test "$?" = 0 ; then LIBC=gnulibc1 ; fi
+	GUESS=$UNAME_MACHINE-unknown-linux-$LIBC
+	;;
+    arc:Linux:*:* | arceb:Linux:*:* | arc32:Linux:*:* | arc64:Linux:*:*)
+	GUESS=$UNAME_MACHINE-unknown-linux-$LIBC
+	;;
+    arm*:Linux:*:*)
+	set_cc_for_build
+	if echo __ARM_EABI__ | $CC_FOR_BUILD -E - 2>/dev/null \
+	    | grep -q __ARM_EABI__
+	then
+	    GUESS=$UNAME_MACHINE-unknown-linux-$LIBC
+	else
+	    if echo __ARM_PCS_VFP | $CC_FOR_BUILD -E - 2>/dev/null \
+		| grep -q __ARM_PCS_VFP
+	    then
+		GUESS=$UNAME_MACHINE-unknown-linux-${LIBC}eabi
+	    else
+		GUESS=$UNAME_MACHINE-unknown-linux-${LIBC}eabihf
+	    fi
+	fi
+	;;
+    avr32*:Linux:*:*)
+	GUESS=$UNAME_MACHINE-unknown-linux-$LIBC
+	;;
+    cris:Linux:*:*)
+	GUESS=$UNAME_MACHINE-axis-linux-$LIBC
+	;;
+    crisv32:Linux:*:*)
+	GUESS=$UNAME_MACHINE-axis-linux-$LIBC
+	;;
+    e2k:Linux:*:*)
+	GUESS=$UNAME_MACHINE-unknown-linux-$LIBC
+	;;
+    frv:Linux:*:*)
+	GUESS=$UNAME_MACHINE-unknown-linux-$LIBC
+	;;
+    hexagon:Linux:*:*)
+	GUESS=$UNAME_MACHINE-unknown-linux-$LIBC
+	;;
+    i*86:Linux:*:*)
+	GUESS=$UNAME_MACHINE-pc-linux-$LIBC
+	;;
+    ia64:Linux:*:*)
+	GUESS=$UNAME_MACHINE-unknown-linux-$LIBC
+	;;
+    k1om:Linux:*:*)
+	GUESS=$UNAME_MACHINE-unknown-linux-$LIBC
+	;;
+    loongarch32:Linux:*:* | loongarch64:Linux:*:* | loongarchx32:Linux:*:*)
+	GUESS=$UNAME_MACHINE-unknown-linux-$LIBC
+	;;
+    m32r*:Linux:*:*)
+	GUESS=$UNAME_MACHINE-unknown-linux-$LIBC
+	;;
+    m68*:Linux:*:*)
+	GUESS=$UNAME_MACHINE-unknown-linux-$LIBC
+	;;
+    mips:Linux:*:* | mips64:Linux:*:*)
+	set_cc_for_build
+	IS_GLIBC=0
+	test x"${LIBC}" = xgnu && IS_GLIBC=1
+	sed 's/^	//' << EOF > "$dummy.c"
+	#undef CPU
+	#undef mips
+	#undef mipsel
+	#undef mips64
+	#undef mips64el
+	#if ${IS_GLIBC} && defined(_ABI64)
+	LIBCABI=gnuabi64
+	#else
+	#if ${IS_GLIBC} && defined(_ABIN32)
+	LIBCABI=gnuabin32
+	#else
+	LIBCABI=${LIBC}
+	#endif
+	#endif
+
+	#if ${IS_GLIBC} && defined(__mips64) && defined(__mips_isa_rev) && __mips_isa_rev>=6
+	CPU=mipsisa64r6
+	#else
+	#if ${IS_GLIBC} && !defined(__mips64) && defined(__mips_isa_rev) && __mips_isa_rev>=6
+	CPU=mipsisa32r6
+	#else
+	#if defined(__mips64)
+	CPU=mips64
+	#else
+	CPU=mips
+	#endif
+	#endif
+	#endif
+
+	#if defined(__MIPSEL__) || defined(__MIPSEL) || defined(_MIPSEL) || defined(MIPSEL)
+	MIPS_ENDIAN=el
+	#else
+	#if defined(__MIPSEB__) || defined(__MIPSEB) || defined(_MIPSEB) || defined(MIPSEB)
+	MIPS_ENDIAN=
+	#else
+	MIPS_ENDIAN=
+	#endif
+	#endif
+EOF
+	cc_set_vars=`$CC_FOR_BUILD -E "$dummy.c" 2>/dev/null | grep '^CPU\|^MIPS_ENDIAN\|^LIBCABI'`
+	eval "$cc_set_vars"
+	test "x$CPU" != x && { echo "$CPU${MIPS_ENDIAN}-unknown-linux-$LIBCABI"; exit; }
+	;;
+    mips64el:Linux:*:*)
+	GUESS=$UNAME_MACHINE-unknown-linux-$LIBC
+	;;
+    openrisc*:Linux:*:*)
+	GUESS=or1k-unknown-linux-$LIBC
+	;;
+    or32:Linux:*:* | or1k*:Linux:*:*)
+	GUESS=$UNAME_MACHINE-unknown-linux-$LIBC
+	;;
+    padre:Linux:*:*)
+	GUESS=sparc-unknown-linux-$LIBC
+	;;
+    parisc64:Linux:*:* | hppa64:Linux:*:*)
+	GUESS=hppa64-unknown-linux-$LIBC
+	;;
+    parisc:Linux:*:* | hppa:Linux:*:*)
+	# Look for CPU level
+	case `grep '^cpu^a-z*:' /proc/cpuinfo 2>/dev/null | cut -d' ' -f2` in
+	  PA7*) GUESS=hppa1.1-unknown-linux-$LIBC ;;
+	  PA8*) GUESS=hppa2.0-unknown-linux-$LIBC ;;
+	  *)    GUESS=hppa-unknown-linux-$LIBC ;;
+	esac
+	;;
+    ppc64:Linux:*:*)
+	GUESS=powerpc64-unknown-linux-$LIBC
+	;;
+    ppc:Linux:*:*)
+	GUESS=powerpc-unknown-linux-$LIBC
+	;;
+    ppc64le:Linux:*:*)
+	GUESS=powerpc64le-unknown-linux-$LIBC
+	;;
+    ppcle:Linux:*:*)
+	GUESS=powerpcle-unknown-linux-$LIBC
+	;;
+    riscv32:Linux:*:* | riscv32be:Linux:*:* | riscv64:Linux:*:* | riscv64be:Linux:*:*)
+	GUESS=$UNAME_MACHINE-unknown-linux-$LIBC
+	;;
+    s390:Linux:*:* | s390x:Linux:*:*)
+	GUESS=$UNAME_MACHINE-ibm-linux-$LIBC
+	;;
+    sh64*:Linux:*:*)
+	GUESS=$UNAME_MACHINE-unknown-linux-$LIBC
+	;;
+    sh*:Linux:*:*)
+	GUESS=$UNAME_MACHINE-unknown-linux-$LIBC
+	;;
+    sparc:Linux:*:* | sparc64:Linux:*:*)
+	GUESS=$UNAME_MACHINE-unknown-linux-$LIBC
+	;;
+    tile*:Linux:*:*)
+	GUESS=$UNAME_MACHINE-unknown-linux-$LIBC
+	;;
+    vax:Linux:*:*)
+	GUESS=$UNAME_MACHINE-dec-linux-$LIBC
+	;;
+    x86_64:Linux:*:*)
+	set_cc_for_build
+	CPU=$UNAME_MACHINE
+	LIBCABI=$LIBC
+	if test "$CC_FOR_BUILD" != no_compiler_found; then
+	    ABI=64
+	    sed 's/^	    //' << EOF > "$dummy.c"
+	    #ifdef __i386__
+	    ABI=x86
+	    #else
+	    #ifdef __ILP32__
+	    ABI=x32
+	    #endif
+	    #endif
+EOF
+	    cc_set_abi=`$CC_FOR_BUILD -E "$dummy.c" 2>/dev/null | grep '^ABI' | sed 's, ,,g'`
+	    eval "$cc_set_abi"
+	    case $ABI in
+		x86) CPU=i686 ;;
+		x32) LIBCABI=${LIBC}x32 ;;
+	    esac
+	fi
+	GUESS=$CPU-pc-linux-$LIBCABI
+	;;
+    xtensa*:Linux:*:*)
+	GUESS=$UNAME_MACHINE-unknown-linux-$LIBC
+	;;
+    i*86:DYNIX/ptx:4*:*)
+	# ptx 4.0 does uname -s correctly, with DYNIX/ptx in there.
+	# earlier versions are messed up and put the nodename in both
+	# sysname and nodename.
+	GUESS=i386-sequent-sysv4
+	;;
+    i*86:UNIX_SV:4.2MP:2.*)
+	# Unixware is an offshoot of SVR4, but it has its own version
+	# number series starting with 2...
+	# I am not positive that other SVR4 systems won't match this,
+	# I just have to hope.  -- rms.
+	# Use sysv4.2uw... so that sysv4* matches it.
+	GUESS=$UNAME_MACHINE-pc-sysv4.2uw$UNAME_VERSION
+	;;
+    i*86:OS/2:*:*)
+	# If we were able to find `uname', then EMX Unix compatibility
+	# is probably installed.
+	GUESS=$UNAME_MACHINE-pc-os2-emx
+	;;
+    i*86:XTS-300:*:STOP)
+	GUESS=$UNAME_MACHINE-unknown-stop
+	;;
+    i*86:atheos:*:*)
+	GUESS=$UNAME_MACHINE-unknown-atheos
+	;;
+    i*86:syllable:*:*)
+	GUESS=$UNAME_MACHINE-pc-syllable
+	;;
+    i*86:LynxOS:2.*:* | i*86:LynxOS:3.01*:* | i*86:LynxOS:4.02*:*)
+	GUESS=i386-unknown-lynxos$UNAME_RELEASE
+	;;
+    i*86:*DOS:*:*)
+	GUESS=$UNAME_MACHINE-pc-msdosdjgpp
+	;;
+    i*86:*:4.*:*)
+	UNAME_REL=`echo "$UNAME_RELEASE" | sed 's/\/MP$//'`
+	if grep Novell /usr/include/link.h >/dev/null 2>/dev/null; then
+		GUESS=$UNAME_MACHINE-univel-sysv$UNAME_REL
+	else
+		GUESS=$UNAME_MACHINE-pc-sysv$UNAME_REL
+	fi
+	;;
+    i*86:*:5:678*)
+	# UnixWare 7.x, OpenUNIX and OpenServer 6.
+	case `/bin/uname -X | grep "^Machine"` in
+	    *486*)	     UNAME_MACHINE=i486 ;;
+	    *Pentium)	     UNAME_MACHINE=i586 ;;
+	    *Pent*|*Celeron) UNAME_MACHINE=i686 ;;
+	esac
+	GUESS=$UNAME_MACHINE-unknown-sysv${UNAME_RELEASE}${UNAME_SYSTEM}${UNAME_VERSION}
+	;;
+    i*86:*:3.2:*)
+	if test -f /usr/options/cb.name; then
+		UNAME_REL=`sed -n 's/.*Version //p' </usr/options/cb.name`
+		GUESS=$UNAME_MACHINE-pc-isc$UNAME_REL
+	elif /bin/uname -X 2>/dev/null >/dev/null ; then
+		UNAME_REL=`(/bin/uname -X|grep Release|sed -e 's/.*= //')`
+		(/bin/uname -X|grep i80486 >/dev/null) && UNAME_MACHINE=i486
+		(/bin/uname -X|grep '^Machine.*Pentium' >/dev/null) \
+			&& UNAME_MACHINE=i586
+		(/bin/uname -X|grep '^Machine.*Pent *II' >/dev/null) \
+			&& UNAME_MACHINE=i686
+		(/bin/uname -X|grep '^Machine.*Pentium Pro' >/dev/null) \
+			&& UNAME_MACHINE=i686
+		GUESS=$UNAME_MACHINE-pc-sco$UNAME_REL
+	else
+		GUESS=$UNAME_MACHINE-pc-sysv32
+	fi
+	;;
+    pc:*:*:*)
+	# Left here for compatibility:
+	# uname -m prints for DJGPP always 'pc', but it prints nothing about
+	# the processor, so we play safe by assuming i586.
+	# Note: whatever this is, it MUST be the same as what config.sub
+	# prints for the "djgpp" host, or else GDB configure will decide that
+	# this is a cross-build.
+	GUESS=i586-pc-msdosdjgpp
+	;;
+    Intel:Mach:3*:*)
+	GUESS=i386-pc-mach3
+	;;
+    paragon:*:*:*)
+	GUESS=i860-intel-osf1
+	;;
+    i860:*:4.*:*) # i860-SVR4
+	if grep Stardent /usr/include/sys/uadmin.h >/dev/null 2>&1 ; then
+	  GUESS=i860-stardent-sysv$UNAME_RELEASE    # Stardent Vistra i860-SVR4
+	else # Add other i860-SVR4 vendors below as they are discovered.
+	  GUESS=i860-unknown-sysv$UNAME_RELEASE     # Unknown i860-SVR4
+	fi
+	;;
+    mini*:CTIX:SYS*5:*)
+	# "miniframe"
+	GUESS=m68010-convergent-sysv
+	;;
+    mc68k:UNIX:SYSTEM5:3.51m)
+	GUESS=m68k-convergent-sysv
+	;;
+    M680?0:D-NIX:5.3:*)
+	GUESS=m68k-diab-dnix
+	;;
+    M68*:*:R3V5678*:*)
+	test -r /sysV68 && { echo 'm68k-motorola-sysv'; exit; } ;;
+    3345??:*:4.0:3.0 | 334??A:*:4.0:3.0 | 334??,*:*:4.0:3.0 | 334??/*:*:4.0:3.0 | 4400:*:4.0:3.0 | 4850:*:4.0:3.0 | SKA40:*:4.0:3.0 | SDS2:*:4.0:3.0 | SHG2:*:4.0:3.0 | S7501*:*:4.0:3.0)
+	OS_REL=''
+	test -r /etc/.relid \
+	&& OS_REL=.`sed -n 's/^ * ^ * $0-90-9$.*/\1/p' < /etc/.relid`
+	/bin/uname -p 2>/dev/null | grep 86 >/dev/null \
+	  && { echo i486-ncr-sysv4.3"$OS_REL"; exit; }
+	/bin/uname -p 2>/dev/null | /bin/grep entium >/dev/null \
+	  && { echo i586-ncr-sysv4.3"$OS_REL"; exit; } ;;
+    334??:*:4.0:* | 334??,*:*:4.0:*)
+	/bin/uname -p 2>/dev/null | grep 86 >/dev/null \
+	  && { echo i486-ncr-sysv4; exit; } ;;
+    NCR*:*:4.2:* | MPRAS*:*:4.2:*)
+	OS_REL='.3'
+	test -r /etc/.relid \
+	    && OS_REL=.`sed -n 's/^ * ^ * $0-90-9$.*/\1/p' < /etc/.relid`
+	/bin/uname -p 2>/dev/null | grep 86 >/dev/null \
+	    && { echo i486-ncr-sysv4.3"$OS_REL"; exit; }
+	/bin/uname -p 2>/dev/null | /bin/grep entium >/dev/null \
+	    && { echo i586-ncr-sysv4.3"$OS_REL"; exit; }
+	/bin/uname -p 2>/dev/null | /bin/grep pteron >/dev/null \
+	    && { echo i586-ncr-sysv4.3"$OS_REL"; exit; } ;;
+    m68*:LynxOS:2.*:* | m68*:LynxOS:3.0*:*)
+	GUESS=m68k-unknown-lynxos$UNAME_RELEASE
+	;;
+    mc68030:UNIX_System_V:4.*:*)
+	GUESS=m68k-atari-sysv4
+	;;
+    TSUNAMI:LynxOS:2.*:*)
+	GUESS=sparc-unknown-lynxos$UNAME_RELEASE
+	;;
+    rs6000:LynxOS:2.*:*)
+	GUESS=rs6000-unknown-lynxos$UNAME_RELEASE
+	;;
+    PowerPC:LynxOS:2.*:* | PowerPC:LynxOS:3.01*:* | PowerPC:LynxOS:4.02*:*)
+	GUESS=powerpc-unknown-lynxos$UNAME_RELEASE
+	;;
+    SMBES:UNIX_SV:*:*)
+	GUESS=mips-dde-sysv$UNAME_RELEASE
+	;;
+    RM*:ReliantUNIX-*:*:*)
+	GUESS=mips-sni-sysv4
+	;;
+    RM*:SINIX-*:*:*)
+	GUESS=mips-sni-sysv4
+	;;
+    *:SINIX-*:*:*)
+	if uname -p 2>/dev/null >/dev/null ; then
+		UNAME_MACHINE=`(uname -p) 2>/dev/null`
+		GUESS=$UNAME_MACHINE-sni-sysv4
+	else
+		GUESS=ns32k-sni-sysv
+	fi
+	;;
+    PENTIUM:*:4.0*:*)	# Unisys `ClearPath HMP IX 4000' SVR4/MP effort
+			# says <Richard.M.Bartel@ccMail.Census.GOV>
+	GUESS=i586-unisys-sysv4
+	;;
+    *:UNIX_System_V:4*:FTX*)
+	# From Gerald Hewes <hewes@openmarket.com>.
+	# How about differentiating between stratus architectures? -djm
+	GUESS=hppa1.1-stratus-sysv4
+	;;
+    *:*:*:FTX*)
+	# From seanf@swdc.stratus.com.
+	GUESS=i860-stratus-sysv4
+	;;
+    i*86:VOS:*:*)
+	# From Paul.Green@stratus.com.
+	GUESS=$UNAME_MACHINE-stratus-vos
+	;;
+    *:VOS:*:*)
+	# From Paul.Green@stratus.com.
+	GUESS=hppa1.1-stratus-vos
+	;;
+    mc68*:A/UX:*:*)
+	GUESS=m68k-apple-aux$UNAME_RELEASE
+	;;
+    news*:NEWS-OS:6*:*)
+	GUESS=mips-sony-newsos6
+	;;
+    R34000:*System_V*:*:* | R4000:UNIX_SYSV:*:* | R*000:UNIX_SV:*:*)
+	if test -d /usr/nec; then
+		GUESS=mips-nec-sysv$UNAME_RELEASE
+	else
+		GUESS=mips-unknown-sysv$UNAME_RELEASE
+	fi
+	;;
+    BeBox:BeOS:*:*)	# BeOS running on hardware made by Be, PPC only.
+	GUESS=powerpc-be-beos
+	;;
+    BeMac:BeOS:*:*)	# BeOS running on Mac or Mac clone, PPC only.
+	GUESS=powerpc-apple-beos
+	;;
+    BePC:BeOS:*:*)	# BeOS running on Intel PC compatible.
+	GUESS=i586-pc-beos
+	;;
+    BePC:Haiku:*:*)	# Haiku running on Intel PC compatible.
+	GUESS=i586-pc-haiku
+	;;
+    ppc:Haiku:*:*)	# Haiku running on Apple PowerPC
+	GUESS=powerpc-apple-haiku
+	;;
+    *:Haiku:*:*)	# Haiku modern gcc (not bound by BeOS compat)
+	GUESS=$UNAME_MACHINE-unknown-haiku
+	;;
+    SX-4:SUPER-UX:*:*)
+	GUESS=sx4-nec-superux$UNAME_RELEASE
+	;;
+    SX-5:SUPER-UX:*:*)
+	GUESS=sx5-nec-superux$UNAME_RELEASE
+	;;
+    SX-6:SUPER-UX:*:*)
+	GUESS=sx6-nec-superux$UNAME_RELEASE
+	;;
+    SX-7:SUPER-UX:*:*)
+	GUESS=sx7-nec-superux$UNAME_RELEASE
+	;;
+    SX-8:SUPER-UX:*:*)
+	GUESS=sx8-nec-superux$UNAME_RELEASE
+	;;
+    SX-8R:SUPER-UX:*:*)
+	GUESS=sx8r-nec-superux$UNAME_RELEASE
+	;;
+    SX-ACE:SUPER-UX:*:*)
+	GUESS=sxace-nec-superux$UNAME_RELEASE
+	;;
+    Power*:Rhapsody:*:*)
+	GUESS=powerpc-apple-rhapsody$UNAME_RELEASE
+	;;
+    *:Rhapsody:*:*)
+	GUESS=$UNAME_MACHINE-apple-rhapsody$UNAME_RELEASE
+	;;
+    arm64:Darwin:*:*)
+	GUESS=aarch64-apple-darwin$UNAME_RELEASE
+	;;
+    *:Darwin:*:*)
+	UNAME_PROCESSOR=`uname -p`
+	case $UNAME_PROCESSOR in
+	    unknown) UNAME_PROCESSOR=powerpc ;;
+	esac
+	if command -v xcode-select > /dev/null 2> /dev/null && \
+		! xcode-select --print-path > /dev/null 2> /dev/null ; then
+	    # Avoid executing cc if there is no toolchain installed as
+	    # cc will be a stub that puts up a graphical alert
+	    # prompting the user to install developer tools.
+	    CC_FOR_BUILD=no_compiler_found
+	else
+	    set_cc_for_build
+	fi
+	if test "$CC_FOR_BUILD" != no_compiler_found; then
+	    if (echo '#ifdef __LP64__'; echo IS_64BIT_ARCH; echo '#endif') | \
+		   (CCOPTS="" $CC_FOR_BUILD -E - 2>/dev/null) | \
+		   grep IS_64BIT_ARCH >/dev/null
+	    then
+		case $UNAME_PROCESSOR in
+		    i386) UNAME_PROCESSOR=x86_64 ;;
+		    powerpc) UNAME_PROCESSOR=powerpc64 ;;
+		esac
+	    fi
+	    # On 10.4-10.6 one might compile for PowerPC via gcc -arch ppc
+	    if (echo '#ifdef __POWERPC__'; echo IS_PPC; echo '#endif') | \
+		   (CCOPTS="" $CC_FOR_BUILD -E - 2>/dev/null) | \
+		   grep IS_PPC >/dev/null
+	    then
+		UNAME_PROCESSOR=powerpc
+	    fi
+	elif test "$UNAME_PROCESSOR" = i386 ; then
+	    # uname -m returns i386 or x86_64
+	    UNAME_PROCESSOR=$UNAME_MACHINE
+	fi
+	GUESS=$UNAME_PROCESSOR-apple-darwin$UNAME_RELEASE
+	;;
+    *:procnto*:*:* | *:QNX:0123456789*:*)
+	UNAME_PROCESSOR=`uname -p`
+	if test "$UNAME_PROCESSOR" = x86; then
+		UNAME_PROCESSOR=i386
+		UNAME_MACHINE=pc
+	fi
+	GUESS=$UNAME_PROCESSOR-$UNAME_MACHINE-nto-qnx$UNAME_RELEASE
+	;;
+    *:QNX:*:4*)
+	GUESS=i386-pc-qnx
+	;;
+    NEO-*:NONSTOP_KERNEL:*:*)
+	GUESS=neo-tandem-nsk$UNAME_RELEASE
+	;;
+    NSE-*:NONSTOP_KERNEL:*:*)
+	GUESS=nse-tandem-nsk$UNAME_RELEASE
+	;;
+    NSR-*:NONSTOP_KERNEL:*:*)
+	GUESS=nsr-tandem-nsk$UNAME_RELEASE
+	;;
+    NSV-*:NONSTOP_KERNEL:*:*)
+	GUESS=nsv-tandem-nsk$UNAME_RELEASE
+	;;
+    NSX-*:NONSTOP_KERNEL:*:*)
+	GUESS=nsx-tandem-nsk$UNAME_RELEASE
+	;;
+    *:NonStop-UX:*:*)
+	GUESS=mips-compaq-nonstopux
+	;;
+    BS2000:POSIX*:*:*)
+	GUESS=bs2000-siemens-sysv
+	;;
+    DS/*:UNIX_System_V:*:*)
+	GUESS=$UNAME_MACHINE-$UNAME_SYSTEM-$UNAME_RELEASE
+	;;
+    *:Plan9:*:*)
+	# "uname -m" is not consistent, so use $cputype instead. 386
+	# is converted to i386 for consistency with other x86
+	# operating systems.
+	if test "${cputype-}" = 386; then
+	    UNAME_MACHINE=i386
+	elif test "x${cputype-}" != x; then
+	    UNAME_MACHINE=$cputype
+	fi
+	GUESS=$UNAME_MACHINE-unknown-plan9
+	;;
+    *:TOPS-10:*:*)
+	GUESS=pdp10-unknown-tops10
+	;;
+    *:TENEX:*:*)
+	GUESS=pdp10-unknown-tenex
+	;;
+    KS10:TOPS-20:*:* | KL10:TOPS-20:*:* | TYPE4:TOPS-20:*:*)
+	GUESS=pdp10-dec-tops20
+	;;
+    XKL-1:TOPS-20:*:* | TYPE5:TOPS-20:*:*)
+	GUESS=pdp10-xkl-tops20
+	;;
+    *:TOPS-20:*:*)
+	GUESS=pdp10-unknown-tops20
+	;;
+    *:ITS:*:*)
+	GUESS=pdp10-unknown-its
+	;;
+    SEI:*:*:SEIUX)
+	GUESS=mips-sei-seiux$UNAME_RELEASE
+	;;
+    *:DragonFly:*:*)
+	DRAGONFLY_REL=`echo "$UNAME_RELEASE" | sed -e 's/-(.*//'`
+	GUESS=$UNAME_MACHINE-unknown-dragonfly$DRAGONFLY_REL
+	;;
+    *:*VMS:*:*)
+	UNAME_MACHINE=`(uname -p) 2>/dev/null`
+	case $UNAME_MACHINE in
+	    A*) GUESS=alpha-dec-vms ;;
+	    I*) GUESS=ia64-dec-vms ;;
+	    V*) GUESS=vax-dec-vms ;;
+	esac ;;
+    *:XENIX:*:SysV)
+	GUESS=i386-pc-xenix
+	;;
+    i*86:skyos:*:*)
+	SKYOS_REL=`echo "$UNAME_RELEASE" | sed -e 's/ .*$//'`
+	GUESS=$UNAME_MACHINE-pc-skyos$SKYOS_REL
+	;;
+    i*86:rdos:*:*)
+	GUESS=$UNAME_MACHINE-pc-rdos
+	;;
+    i*86:Fiwix:*:*)
+	GUESS=$UNAME_MACHINE-pc-fiwix
+	;;
+    *:AROS:*:*)
+	GUESS=$UNAME_MACHINE-unknown-aros
+	;;
+    x86_64:VMkernel:*:*)
+	GUESS=$UNAME_MACHINE-unknown-esx
+	;;
+    amd64:Isilon\ OneFS:*:*)
+	GUESS=x86_64-unknown-onefs
+	;;
+    *:Unleashed:*:*)
+	GUESS=$UNAME_MACHINE-unknown-unleashed$UNAME_RELEASE
+	;;
+esac
+
+# Do we have a guess based on uname results?
+if test "x$GUESS" != x; then
+    echo "$GUESS"
+    exit
+fi
+
+# No uname command or uname output not recognized.
+set_cc_for_build
+cat > "$dummy.c" <<EOF
+#ifdef _SEQUENT_
+#include <sys/types.h>
+#include <sys/utsname.h>
+#endif
+#if defined(ultrix) || defined(_ultrix) || defined(__ultrix) || defined(__ultrix__)
+#if defined (vax) || defined (__vax) || defined (__vax__) || defined(mips) || defined(__mips) || defined(__mips__) || defined(MIPS) || defined(__MIPS__)
+#include <signal.h>
+#if defined(_SIZE_T_) || defined(SIGLOST)
+#include <sys/utsname.h>
+#endif
+#endif
+#endif
+main ()
+{
+#if defined (sony)
+#if defined (MIPSEB)
+  /* BFD wants "bsd" instead of "newsos".  Perhaps BFD should be changed,
+     I don't know....  */
+  printf ("mips-sony-bsd\n"); exit (0);
+#else
+#include <sys/param.h>
+  printf ("m68k-sony-newsos%s\n",
+#ifdef NEWSOS4
+  "4"
+#else
+  ""
+#endif
+  ); exit (0);
+#endif
+#endif
+
+#if defined (NeXT)
+#if !defined (__ARCHITECTURE__)
+#define __ARCHITECTURE__ "m68k"
+#endif
+  int version;
+  version=`(hostinfo | sed -n 's/.*NeXT Mach $0-9*$.*/\1/p') 2>/dev/null`;
+  if (version < 4)
+    printf ("%s-next-nextstep%d\n", __ARCHITECTURE__, version);
+  else
+    printf ("%s-next-openstep%d\n", __ARCHITECTURE__, version);
+  exit (0);
+#endif
+
+#if defined (MULTIMAX) || defined (n16)
+#if defined (UMAXV)
+  printf ("ns32k-encore-sysv\n"); exit (0);
+#else
+#if defined (CMU)
+  printf ("ns32k-encore-mach\n"); exit (0);
+#else
+  printf ("ns32k-encore-bsd\n"); exit (0);
+#endif
+#endif
+#endif
+
+#if defined (__386BSD__)
+  printf ("i386-pc-bsd\n"); exit (0);
+#endif
+
+#if defined (sequent)
+#if defined (i386)
+  printf ("i386-sequent-dynix\n"); exit (0);
+#endif
+#if defined (ns32000)
+  printf ("ns32k-sequent-dynix\n"); exit (0);
+#endif
+#endif
+
+#if defined (_SEQUENT_)
+  struct utsname un;
+
+  uname(&un);
+  if (strncmp(un.version, "V2", 2) == 0) {
+    printf ("i386-sequent-ptx2\n"); exit (0);
+  }
+  if (strncmp(un.version, "V1", 2) == 0) { /* XXX is V1 correct? */
+    printf ("i386-sequent-ptx1\n"); exit (0);
+  }
+  printf ("i386-sequent-ptx\n"); exit (0);
+#endif
+
+#if defined (vax)
+#if !defined (ultrix)
+#include <sys/param.h>
+#if defined (BSD)
+#if BSD == 43
+  printf ("vax-dec-bsd4.3\n"); exit (0);
+#else
+#if BSD == 199006
+  printf ("vax-dec-bsd4.3reno\n"); exit (0);
+#else
+  printf ("vax-dec-bsd\n"); exit (0);
+#endif
+#endif
+#else
+  printf ("vax-dec-bsd\n"); exit (0);
+#endif
+#else
+#if defined(_SIZE_T_) || defined(SIGLOST)
+  struct utsname un;
+  uname (&un);
+  printf ("vax-dec-ultrix%s\n", un.release); exit (0);
+#else
+  printf ("vax-dec-ultrix\n"); exit (0);
+#endif
+#endif
+#endif
+#if defined(ultrix) || defined(_ultrix) || defined(__ultrix) || defined(__ultrix__)
+#if defined(mips) || defined(__mips) || defined(__mips__) || defined(MIPS) || defined(__MIPS__)
+#if defined(_SIZE_T_) || defined(SIGLOST)
+  struct utsname *un;
+  uname (&un);
+  printf ("mips-dec-ultrix%s\n", un.release); exit (0);
+#else
+  printf ("mips-dec-ultrix\n"); exit (0);
+#endif
+#endif
+#endif
+
+#if defined (alliant) && defined (i860)
+  printf ("i860-alliant-bsd\n"); exit (0);
+#endif
+
+  exit (1);
+}
+EOF
+
+$CC_FOR_BUILD -o "$dummy" "$dummy.c" 2>/dev/null && SYSTEM_NAME=`"$dummy"` &&
+	{ echo "$SYSTEM_NAME"; exit; }
+
+# Apollos put the system type in the environment.
+test -d /usr/apollo && { echo "$ISP-apollo-$SYSTYPE"; exit; }
+
+echo "$0: unable to guess system type" >&2
+
+case $UNAME_MACHINE:$UNAME_SYSTEM in
+    mips:Linux | mips64:Linux)
+	# If we got here on MIPS GNU/Linux, output extra information.
+	cat >&2 <<EOF
+
+NOTE: MIPS GNU/Linux systems require a C compiler to fully recognize
+the system type. Please install a C compiler and try again.
+EOF
+	;;
+esac
+
+cat >&2 <<EOF
+
+This script (version $timestamp), has failed to recognize the
+operating system you are using. If your script is old, overwrite *all*
+copies of config.guess and config.sub with the latest versions from:
+
+  https://git.savannah.gnu.org/cgit/config.git/plain/config.guess
+and
+  https://git.savannah.gnu.org/cgit/config.git/plain/config.sub
+EOF
+
+our_year=`echo $timestamp | sed 's,-.*,,'`
+thisyear=`date +%Y`
+# shellcheck disable=SC2003
+script_age=`expr "$thisyear" - "$our_year"`
+if test "$script_age" -lt 3 ; then
+   cat >&2 <<EOF
+
+If $0 has already been updated, send the following data and any
+information you think might be pertinent to config-patches@gnu.org to
+provide the necessary information to handle your system.
+
+config.guess timestamp = $timestamp
+
+uname -m = `(uname -m) 2>/dev/null || echo unknown`
+uname -r = `(uname -r) 2>/dev/null || echo unknown`
+uname -s = `(uname -s) 2>/dev/null || echo unknown`
+uname -v = `(uname -v) 2>/dev/null || echo unknown`
+
+/usr/bin/uname -p = `(/usr/bin/uname -p) 2>/dev/null`
+/bin/uname -X     = `(/bin/uname -X) 2>/dev/null`
+
+hostinfo               = `(hostinfo) 2>/dev/null`
+/bin/universe          = `(/bin/universe) 2>/dev/null`
+/usr/bin/arch -k       = `(/usr/bin/arch -k) 2>/dev/null`
+/bin/arch              = `(/bin/arch) 2>/dev/null`
+/usr/bin/oslevel       = `(/usr/bin/oslevel) 2>/dev/null`
+/usr/convex/getsysinfo = `(/usr/convex/getsysinfo) 2>/dev/null`
+
+UNAME_MACHINE = "$UNAME_MACHINE"
+UNAME_RELEASE = "$UNAME_RELEASE"
+UNAME_SYSTEM  = "$UNAME_SYSTEM"
+UNAME_VERSION = "$UNAME_VERSION"
+EOF
+fi
+
+exit 1
+
+# Local variables:
+# eval: (add-hook 'before-save-hook 'time-stamp)
+# time-stamp-start: "timestamp='"
+# time-stamp-format: "%:y-%02m-%02d"
+# time-stamp-end: "'"
+# End:

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/helpers/config.sub Added

@@ -0,0 +1,1890 @@
+#!/usr/bin/sh
+# Configuration validation subroutine script.
+#   Copyright 1992-2022 Free Software Foundation, Inc.
+
+# shellcheck disable=SC2006,SC2268 # see below for rationale
+
+timestamp='2022-01-03'
+
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <https://www.gnu.org/licenses/>.
+#
+# As a special exception to the GNU General Public License, if you
+# distribute this file as part of a program that contains a
+# configuration script generated by Autoconf, you may include it under
+# the same distribution terms that you use for the rest of that
+# program.  This Exception is an additional permission under section 7
+# of the GNU General Public License, version 3 ("GPLv3").
+
+
+# Please send patches to <config-patches@gnu.org>.
+#
+# Configuration subroutine to validate and canonicalize a configuration type.
+# Supply the specified configuration type as an argument.
+# If it is invalid, we print an error message on stderr and exit with code 1.
+# Otherwise, we print the canonical config type on stdout and succeed.
+
+# You can get the latest version of this script from:
+# https://git.savannah.gnu.org/cgit/config.git/plain/config.sub
+
+# This file is supposed to be the same for all GNU packages
+# and recognize all the CPU types, system types and aliases
+# that are meaningful with *any* GNU software.
+# Each package is responsible for reporting which valid configurations
+# it does not support.  The user should be able to distinguish
+# a failure to support a valid configuration from a meaningless
+# configuration.
+
+# The goal of this file is to map all the various variations of a given
+# machine specification into a single specification in the form:
+#	CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM
+# or in some cases, the newer four-part form:
+#	CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM
+# It is wrong to echo any other type of specification.
+
+# The "shellcheck disable" line above the timestamp inhibits complaints
+# about features and limitations of the classic Bourne shell that were
+# superseded or lifted in POSIX.  However, this script identifies a wide
+# variety of pre-POSIX systems that do not have POSIX shells at all, and
+# even some reasonably current systems (Solaris 10 as case-in-point) still
+# have a pre-POSIX /bin/sh.
+
+me=`echo "$0" | sed -e 's,.*/,,'`
+
+usage="\
+Usage: $0 OPTION CPU-MFR-OPSYS or ALIAS
+
+Canonicalize a configuration name.
+
+Options:
+  -h, --help         print this help, then exit
+  -t, --time-stamp   print date of last modification, then exit
+  -v, --version      print version number, then exit
+
+Report bugs and patches to <config-patches@gnu.org>."
+
+version="\
+GNU config.sub ($timestamp)
+
+Copyright 1992-2022 Free Software Foundation, Inc.
+
+This is free software; see the source for copying conditions.  There is NO
+warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE."
+
+help="
+Try \`$me --help' for more information."
+
+# Parse command line
+while test $# -gt 0 ; do
+  case $1 in
+    --time-stamp | --time* | -t )
+       echo "$timestamp" ; exit ;;
+    --version | -v )
+       echo "$version" ; exit ;;
+    --help | --h* | -h )
+       echo "$usage"; exit ;;
+    -- )     # Stop option processing
+       shift; break ;;
+    - )	# Use stdin as input.
+       break ;;
+    -* )
+       echo "$me: invalid option $1$help" >&2
+       exit 1 ;;
+
+    *local*)
+       # First pass through any local machine types.
+       echo "$1"
+       exit ;;
+
+    * )
+       break ;;
+  esac
+done
+
+case $# in
+ 0) echo "$me: missing argument$help" >&2
+    exit 1;;
+ 1) ;;
+ *) echo "$me: too many arguments$help" >&2
+    exit 1;;
+esac
+
+# Split fields of configuration type
+# shellcheck disable=SC2162
+saved_IFS=$IFS
+IFS="-" read field1 field2 field3 field4 <<EOF
+$1
+EOF
+IFS=$saved_IFS
+
+# Separate into logical components for further validation
+case $1 in
+	*-*-*-*-*)
+		echo Invalid configuration \`"$1"\': more than four components >&2
+		exit 1
+		;;
+	*-*-*-*)
+		basic_machine=$field1-$field2
+		basic_os=$field3-$field4
+		;;
+	*-*-*)
+		# Ambiguous whether COMPANY is present, or skipped and KERNEL-OS is two
+		# parts
+		maybe_os=$field2-$field3
+		case $maybe_os in
+			nto-qnx* | linux-* | uclinux-uclibc* \
+			| uclinux-gnu* | kfreebsd*-gnu* | knetbsd*-gnu* | netbsd*-gnu* \
+			| netbsd*-eabi* | kopensolaris*-gnu* | cloudabi*-eabi* \
+			| storm-chaos* | os2-emx* | rtmk-nova*)
+				basic_machine=$field1
+				basic_os=$maybe_os
+				;;
+			android-linux)
+				basic_machine=$field1-unknown
+				basic_os=linux-android
+				;;
+			*)
+				basic_machine=$field1-$field2
+				basic_os=$field3
+				;;
+		esac
+		;;
+	*-*)
+		# A lone config we happen to match not fitting any pattern
+		case $field1-$field2 in
+			decstation-3100)
+				basic_machine=mips-dec
+				basic_os=
+				;;
+			*-*)
+				# Second component is usually, but not always the OS
+				case $field2 in
+					# Prevent following clause from handling this valid os
+					sun*os*)
+						basic_machine=$field1
+						basic_os=$field2
+						;;
+					zephyr*)
+						basic_machine=$field1-unknown
+						basic_os=$field2
+						;;
+					# Manufacturers
+					dec* | mips* | sequent* | encore* | pc533* | sgi* | sony* \
+					| att* | 7300* | 3300* | delta* | motorola* | sun234* \
+					| unicom* | ibm* | next | hp | isi* | apollo | altos* \
+					| convergent* | ncr* | news | 32* | 3600* | 3100* \
+					| hitachi* | c123* | convex* | sun | crds | omron* | dg \
+					| ultra | tti* | harris | dolphin | highlevel | gould \
+					| cbm | ns | masscomp | apple | axis | knuth | cray \
+					| microblaze* | sim | cisco \
+					| oki | wec | wrs | winbond)
+						basic_machine=$field1-$field2
+						basic_os=
+						;;
+					*)
+						basic_machine=$field1
+						basic_os=$field2
+						;;
+				esac
+			;;
+		esac
+		;;
+	*)
+		# Convert single-component short-hands not valid as part of
+		# multi-component configurations.
+		case $field1 in
+			386bsd)
+				basic_machine=i386-pc
+				basic_os=bsd
+				;;
+			a29khif)
+				basic_machine=a29k-amd
+				basic_os=udi
+				;;
+			adobe68k)
+				basic_machine=m68010-adobe
+				basic_os=scout
+				;;
+			alliant)
+				basic_machine=fx80-alliant
+				basic_os=
+				;;
+			altos | altos3068)
+				basic_machine=m68k-altos
+				basic_os=
+				;;
+			am29k)
+				basic_machine=a29k-none
+				basic_os=bsd
+				;;
+			amdahl)
+				basic_machine=580-amdahl
+				basic_os=sysv
+				;;
+			amiga)
+				basic_machine=m68k-unknown
+				basic_os=
+				;;
+			amigaos | amigados)
+				basic_machine=m68k-unknown
+				basic_os=amigaos
+				;;
+			amigaunix | amix)
+				basic_machine=m68k-unknown
+				basic_os=sysv4
+				;;
+			apollo68)
+				basic_machine=m68k-apollo
+				basic_os=sysv
+				;;
+			apollo68bsd)
+				basic_machine=m68k-apollo
+				basic_os=bsd
+				;;
+			aros)
+				basic_machine=i386-pc
+				basic_os=aros
+				;;
+			aux)
+				basic_machine=m68k-apple
+				basic_os=aux
+				;;
+			balance)
+				basic_machine=ns32k-sequent
+				basic_os=dynix
+				;;
+			blackfin)
+				basic_machine=bfin-unknown
+				basic_os=linux
+				;;
+			cegcc)
+				basic_machine=arm-unknown
+				basic_os=cegcc
+				;;
+			convex-c1)
+				basic_machine=c1-convex
+				basic_os=bsd
+				;;
+			convex-c2)
+				basic_machine=c2-convex
+				basic_os=bsd
+				;;
+			convex-c32)
+				basic_machine=c32-convex
+				basic_os=bsd
+				;;
+			convex-c34)
+				basic_machine=c34-convex
+				basic_os=bsd
+				;;
+			convex-c38)
+				basic_machine=c38-convex
+				basic_os=bsd
+				;;
+			cray)
+				basic_machine=j90-cray
+				basic_os=unicos
+				;;
+			crds | unos)
+				basic_machine=m68k-crds
+				basic_os=
+				;;
+			da30)
+				basic_machine=m68k-da30
+				basic_os=
+				;;
+			decstation | pmax | pmin | dec3100 | decstatn)
+				basic_machine=mips-dec
+				basic_os=
+				;;
+			delta88)
+				basic_machine=m88k-motorola
+				basic_os=sysv3
+				;;
+			dicos)
+				basic_machine=i686-pc
+				basic_os=dicos
+				;;
+			djgpp)
+				basic_machine=i586-pc
+				basic_os=msdosdjgpp
+				;;
+			ebmon29k)
+				basic_machine=a29k-amd
+				basic_os=ebmon
+				;;
+			es1800 | OSE68k | ose68k | ose | OSE)
+				basic_machine=m68k-ericsson
+				basic_os=ose
+				;;
+			gmicro)
+				basic_machine=tron-gmicro
+				basic_os=sysv
+				;;
+			go32)
+				basic_machine=i386-pc
+				basic_os=go32
+				;;
+			h8300hms)
+				basic_machine=h8300-hitachi
+				basic_os=hms
+				;;
+			h8300xray)
+				basic_machine=h8300-hitachi
+				basic_os=xray
+				;;
+			h8500hms)
+				basic_machine=h8500-hitachi
+				basic_os=hms
+				;;
+			harris)
+				basic_machine=m88k-harris
+				basic_os=sysv3
+				;;
+			hp300 | hp300hpux)
+				basic_machine=m68k-hp
+				basic_os=hpux
+				;;
+			hp300bsd)
+				basic_machine=m68k-hp
+				basic_os=bsd
+				;;
+			hppaosf)
+				basic_machine=hppa1.1-hp
+				basic_os=osf
+				;;
+			hppro)
+				basic_machine=hppa1.1-hp
+				basic_os=proelf
+				;;
+			i386mach)
+				basic_machine=i386-mach
+				basic_os=mach
+				;;
+			isi68 | isi)
+				basic_machine=m68k-isi
+				basic_os=sysv
+				;;
+			m68knommu)
+				basic_machine=m68k-unknown
+				basic_os=linux
+				;;
+			magnum | m3230)
+				basic_machine=mips-mips
+				basic_os=sysv
+				;;
+			merlin)
+				basic_machine=ns32k-utek
+				basic_os=sysv
+				;;
+			mingw64)
+				basic_machine=x86_64-pc
+				basic_os=mingw64
+				;;
+			mingw32)
+				basic_machine=i686-pc
+				basic_os=mingw32
+				;;
+			mingw32ce)
+				basic_machine=arm-unknown
+				basic_os=mingw32ce
+				;;
+			monitor)
+				basic_machine=m68k-rom68k
+				basic_os=coff
+				;;
+			morphos)
+				basic_machine=powerpc-unknown
+				basic_os=morphos
+				;;
+			moxiebox)
+				basic_machine=moxie-unknown
+				basic_os=moxiebox
+				;;
+			msdos)
+				basic_machine=i386-pc
+				basic_os=msdos
+				;;
+			msys)
+				basic_machine=i686-pc
+				basic_os=msys
+				;;
+			mvs)
+				basic_machine=i370-ibm
+				basic_os=mvs
+				;;
+			nacl)
+				basic_machine=le32-unknown
+				basic_os=nacl
+				;;
+			ncr3000)
+				basic_machine=i486-ncr
+				basic_os=sysv4
+				;;
+			netbsd386)
+				basic_machine=i386-pc
+				basic_os=netbsd
+				;;
+			netwinder)
+				basic_machine=armv4l-rebel
+				basic_os=linux
+				;;
+			news | news700 | news800 | news900)
+				basic_machine=m68k-sony
+				basic_os=newsos
+				;;
+			news1000)
+				basic_machine=m68030-sony
+				basic_os=newsos
+				;;
+			necv70)
+				basic_machine=v70-nec
+				basic_os=sysv
+				;;
+			nh3000)
+				basic_machine=m68k-harris
+				basic_os=cxux
+				;;
+			nh45000)
+				basic_machine=m88k-harris
+				basic_os=cxux
+				;;
+			nindy960)
+				basic_machine=i960-intel
+				basic_os=nindy
+				;;
+			mon960)
+				basic_machine=i960-intel
+				basic_os=mon960
+				;;
+			nonstopux)
+				basic_machine=mips-compaq
+				basic_os=nonstopux
+				;;
+			os400)
+				basic_machine=powerpc-ibm
+				basic_os=os400
+				;;
+			OSE68000 | ose68000)
+				basic_machine=m68000-ericsson
+				basic_os=ose
+				;;
+			os68k)
+				basic_machine=m68k-none
+				basic_os=os68k
+				;;
+			paragon)
+				basic_machine=i860-intel
+				basic_os=osf
+				;;
+			parisc)
+				basic_machine=hppa-unknown
+				basic_os=linux
+				;;
+			psp)
+				basic_machine=mipsallegrexel-sony
+				basic_os=psp
+				;;
+			pw32)
+				basic_machine=i586-unknown
+				basic_os=pw32
+				;;
+			rdos | rdos64)
+				basic_machine=x86_64-pc
+				basic_os=rdos
+				;;
+			rdos32)
+				basic_machine=i386-pc
+				basic_os=rdos
+				;;
+			rom68k)
+				basic_machine=m68k-rom68k
+				basic_os=coff
+				;;
+			sa29200)
+				basic_machine=a29k-amd
+				basic_os=udi
+				;;
+			sei)
+				basic_machine=mips-sei
+				basic_os=seiux
+				;;
+			sequent)
+				basic_machine=i386-sequent
+				basic_os=
+				;;
+			sps7)
+				basic_machine=m68k-bull
+				basic_os=sysv2
+				;;
+			st2000)
+				basic_machine=m68k-tandem
+				basic_os=
+				;;
+			stratus)
+				basic_machine=i860-stratus
+				basic_os=sysv4
+				;;
+			sun2)
+				basic_machine=m68000-sun
+				basic_os=
+				;;
+			sun2os3)
+				basic_machine=m68000-sun
+				basic_os=sunos3
+				;;
+			sun2os4)
+				basic_machine=m68000-sun
+				basic_os=sunos4
+				;;
+			sun3)
+				basic_machine=m68k-sun
+				basic_os=
+				;;
+			sun3os3)
+				basic_machine=m68k-sun
+				basic_os=sunos3
+				;;
+			sun3os4)
+				basic_machine=m68k-sun
+				basic_os=sunos4
+				;;
+			sun4)
+				basic_machine=sparc-sun
+				basic_os=
+				;;
+			sun4os3)
+				basic_machine=sparc-sun
+				basic_os=sunos3
+				;;
+			sun4os4)
+				basic_machine=sparc-sun
+				basic_os=sunos4
+				;;
+			sun4sol2)
+				basic_machine=sparc-sun
+				basic_os=solaris2
+				;;
+			sun386 | sun386i | roadrunner)
+				basic_machine=i386-sun
+				basic_os=
+				;;
+			sv1)
+				basic_machine=sv1-cray
+				basic_os=unicos
+				;;
+			symmetry)
+				basic_machine=i386-sequent
+				basic_os=dynix
+				;;
+			t3e)
+				basic_machine=alphaev5-cray
+				basic_os=unicos
+				;;
+			t90)
+				basic_machine=t90-cray
+				basic_os=unicos
+				;;
+			toad1)
+				basic_machine=pdp10-xkl
+				basic_os=tops20
+				;;
+			tpf)
+				basic_machine=s390x-ibm
+				basic_os=tpf
+				;;
+			udi29k)
+				basic_machine=a29k-amd
+				basic_os=udi
+				;;
+			ultra3)
+				basic_machine=a29k-nyu
+				basic_os=sym1
+				;;
+			v810 | necv810)
+				basic_machine=v810-nec
+				basic_os=none
+				;;
+			vaxv)
+				basic_machine=vax-dec
+				basic_os=sysv
+				;;
+			vms)
+				basic_machine=vax-dec
+				basic_os=vms
+				;;
+			vsta)
+				basic_machine=i386-pc
+				basic_os=vsta
+				;;
+			vxworks960)
+				basic_machine=i960-wrs
+				basic_os=vxworks
+				;;
+			vxworks68)
+				basic_machine=m68k-wrs
+				basic_os=vxworks
+				;;
+			vxworks29k)
+				basic_machine=a29k-wrs
+				basic_os=vxworks
+				;;
+			xbox)
+				basic_machine=i686-pc
+				basic_os=mingw32
+				;;
+			ymp)
+				basic_machine=ymp-cray
+				basic_os=unicos
+				;;
+			*)
+				basic_machine=$1
+				basic_os=
+				;;
+		esac
+		;;
+esac
+
+# Decode 1-component or ad-hoc basic machines
+case $basic_machine in
+	# Here we handle the default manufacturer of certain CPU types.  It is in
+	# some cases the only manufacturer, in others, it is the most popular.
+	w89k)
+		cpu=hppa1.1
+		vendor=winbond
+		;;
+	op50n)
+		cpu=hppa1.1
+		vendor=oki
+		;;
+	op60c)
+		cpu=hppa1.1
+		vendor=oki
+		;;
+	ibm*)
+		cpu=i370
+		vendor=ibm
+		;;
+	orion105)
+		cpu=clipper
+		vendor=highlevel
+		;;
+	mac | mpw | mac-mpw)
+		cpu=m68k
+		vendor=apple
+		;;
+	pmac | pmac-mpw)
+		cpu=powerpc
+		vendor=apple
+		;;
+
+	# Recognize the various machine names and aliases which stand
+	# for a CPU type and a company and sometimes even an OS.
+	3b1 | 7300 | 7300-att | att-7300 | pc7300 | safari | unixpc)
+		cpu=m68000
+		vendor=att
+		;;
+	3b*)
+		cpu=we32k
+		vendor=att
+		;;
+	bluegene*)
+		cpu=powerpc
+		vendor=ibm
+		basic_os=cnk
+		;;
+	decsystem10* | dec10*)
+		cpu=pdp10
+		vendor=dec
+		basic_os=tops10
+		;;
+	decsystem20* | dec20*)
+		cpu=pdp10
+		vendor=dec
+		basic_os=tops20
+		;;
+	delta | 3300 | motorola-3300 | motorola-delta \
+	      | 3300-motorola | delta-motorola)
+		cpu=m68k
+		vendor=motorola
+		;;
+	dpx2*)
+		cpu=m68k
+		vendor=bull
+		basic_os=sysv3
+		;;
+	encore | umax | mmax)
+		cpu=ns32k
+		vendor=encore
+		;;
+	elxsi)
+		cpu=elxsi
+		vendor=elxsi
+		basic_os=${basic_os:-bsd}
+		;;
+	fx2800)
+		cpu=i860
+		vendor=alliant
+		;;
+	genix)
+		cpu=ns32k
+		vendor=ns
+		;;
+	h3050r* | hiux*)
+		cpu=hppa1.1
+		vendor=hitachi
+		basic_os=hiuxwe2
+		;;
+	hp3k90-90-9 | hp90-90-9)
+		cpu=hppa1.0
+		vendor=hp
+		;;
+	hp9k20-90-9 | hp9k310-9)
+		cpu=m68000
+		vendor=hp
+		;;
+	hp9k32-90-9)
+		cpu=m68k
+		vendor=hp
+		;;
+	hp9k60-90-9 | hp60-90-9)
+		cpu=hppa1.0
+		vendor=hp
+		;;
+	hp9k70-790-9 | hp70-790-9)
+		cpu=hppa1.1
+		vendor=hp
+		;;
+	hp9k780-9 | hp780-9)
+		# FIXME: really hppa2.0-hp
+		cpu=hppa1.1
+		vendor=hp
+		;;
+	hp9k8671 | hp8671 | hp9k8024 | hp8024 | hp9k8789 | hp8789 | hp9k893 | hp893)
+		# FIXME: really hppa2.0-hp
+		cpu=hppa1.1
+		vendor=hp
+		;;
+	hp9k80-913679 | hp80-913679)
+		cpu=hppa1.1
+		vendor=hp
+		;;
+	hp9k80-90-9 | hp80-90-9)
+		cpu=hppa1.0
+		vendor=hp
+		;;
+	i*86v32)
+		cpu=`echo "$1" | sed -e 's/86.*/86/'`
+		vendor=pc
+		basic_os=sysv32
+		;;
+	i*86v4*)
+		cpu=`echo "$1" | sed -e 's/86.*/86/'`
+		vendor=pc
+		basic_os=sysv4
+		;;
+	i*86v)
+		cpu=`echo "$1" | sed -e 's/86.*/86/'`
+		vendor=pc
+		basic_os=sysv
+		;;
+	i*86sol2)
+		cpu=`echo "$1" | sed -e 's/86.*/86/'`
+		vendor=pc
+		basic_os=solaris2
+		;;
+	j90 | j90-cray)
+		cpu=j90
+		vendor=cray
+		basic_os=${basic_os:-unicos}
+		;;
+	iris | iris4d)
+		cpu=mips
+		vendor=sgi
+		case $basic_os in
+		    irix*)
+			;;
+		    *)
+			basic_os=irix4
+			;;
+		esac
+		;;
+	miniframe)
+		cpu=m68000
+		vendor=convergent
+		;;
+	*mint | mint0-9* | *MiNT | *MiNT0-9*)
+		cpu=m68k
+		vendor=atari
+		basic_os=mint
+		;;
+	news-3600 | risc-news)
+		cpu=mips
+		vendor=sony
+		basic_os=newsos
+		;;
+	next | m*-next)
+		cpu=m68k
+		vendor=next
+		case $basic_os in
+		    openstep*)
+		        ;;
+		    nextstep*)
+			;;
+		    ns2*)
+		      basic_os=nextstep2
+			;;
+		    *)
+		      basic_os=nextstep3
+			;;
+		esac
+		;;
+	np1)
+		cpu=np1
+		vendor=gould
+		;;
+	op50n-* | op60c-*)
+		cpu=hppa1.1
+		vendor=oki
+		basic_os=proelf
+		;;
+	pa-hitachi)
+		cpu=hppa1.1
+		vendor=hitachi
+		basic_os=hiuxwe2
+		;;
+	pbd)
+		cpu=sparc
+		vendor=tti
+		;;
+	pbb)
+		cpu=m68k
+		vendor=tti
+		;;
+	pc532)
+		cpu=ns32k
+		vendor=pc532
+		;;
+	pn)
+		cpu=pn
+		vendor=gould
+		;;
+	power)
+		cpu=power
+		vendor=ibm
+		;;
+	ps2)
+		cpu=i386
+		vendor=ibm
+		;;
+	rm4600)
+		cpu=mips
+		vendor=siemens
+		;;
+	rtpc | rtpc-*)
+		cpu=romp
+		vendor=ibm
+		;;
+	sde)
+		cpu=mipsisa32
+		vendor=sde
+		basic_os=${basic_os:-elf}
+		;;
+	simso-wrs)
+		cpu=sparclite
+		vendor=wrs
+		basic_os=vxworks
+		;;
+	tower | tower-32)
+		cpu=m68k
+		vendor=ncr
+		;;
+	vpp*|vx|vx-*)
+		cpu=f301
+		vendor=fujitsu
+		;;
+	w65)
+		cpu=w65
+		vendor=wdc
+		;;
+	w89k-*)
+		cpu=hppa1.1
+		vendor=winbond
+		basic_os=proelf
+		;;
+	none)
+		cpu=none
+		vendor=none
+		;;
+	leon|leon3-9)
+		cpu=sparc
+		vendor=$basic_machine
+		;;
+	leon-*|leon3-9-*)
+		cpu=sparc
+		vendor=`echo "$basic_machine" | sed 's/-.*//'`
+		;;
+
+	*-*)
+		# shellcheck disable=SC2162
+		saved_IFS=$IFS
+		IFS="-" read cpu vendor <<EOF
+$basic_machine
+EOF
+		IFS=$saved_IFS
+		;;
+	# We use `pc' rather than `unknown'
+	# because (1) that's what they normally are, and
+	# (2) the word "unknown" tends to confuse beginning users.
+	i*86 | x86_64)
+		cpu=$basic_machine
+		vendor=pc
+		;;
+	# These rules are duplicated from below for sake of the special case above;
+	# i.e. things that normalized to x86 arches should also default to "pc"
+	pc98)
+		cpu=i386
+		vendor=pc
+		;;
+	x64 | amd64)
+		cpu=x86_64
+		vendor=pc
+		;;
+	# Recognize the basic CPU types without company name.
+	*)
+		cpu=$basic_machine
+		vendor=unknown
+		;;
+esac
+
+unset -v basic_machine
+
+# Decode basic machines in the full and proper CPU-Company form.
+case $cpu-$vendor in
+	# Here we handle the default manufacturer of certain CPU types in canonical form. It is in
+	# some cases the only manufacturer, in others, it is the most popular.
+	craynv-unknown)
+		vendor=cray
+		basic_os=${basic_os:-unicosmp}
+		;;
+	c90-unknown | c90-cray)
+		vendor=cray
+		basic_os=${Basic_os:-unicos}
+		;;
+	fx80-unknown)
+		vendor=alliant
+		;;
+	romp-unknown)
+		vendor=ibm
+		;;
+	mmix-unknown)
+		vendor=knuth
+		;;
+	microblaze-unknown | microblazeel-unknown)
+		vendor=xilinx
+		;;
+	rs6000-unknown)
+		vendor=ibm
+		;;
+	vax-unknown)
+		vendor=dec
+		;;
+	pdp11-unknown)
+		vendor=dec
+		;;
+	we32k-unknown)
+		vendor=att
+		;;
+	cydra-unknown)
+		vendor=cydrome
+		;;
+	i370-ibm*)
+		vendor=ibm
+		;;
+	orion-unknown)
+		vendor=highlevel
+		;;
+	xps-unknown | xps100-unknown)
+		cpu=xps100
+		vendor=honeywell
+		;;
+
+	# Here we normalize CPU types with a missing or matching vendor
+	armh-unknown | armh-alt)
+		cpu=armv7l
+		vendor=alt
+		basic_os=${basic_os:-linux-gnueabihf}
+		;;
+	dpx20-unknown | dpx20-bull)
+		cpu=rs6000
+		vendor=bull
+		basic_os=${basic_os:-bosx}
+		;;
+
+	# Here we normalize CPU types irrespective of the vendor
+	amd64-*)
+		cpu=x86_64
+		;;
+	blackfin-*)
+		cpu=bfin
+		basic_os=linux
+		;;
+	c54x-*)
+		cpu=tic54x
+		;;
+	c55x-*)
+		cpu=tic55x
+		;;
+	c6x-*)
+		cpu=tic6x
+		;;
+	e500v12-*)
+		cpu=powerpc
+		basic_os=${basic_os}"spe"
+		;;
+	mips3*-*)
+		cpu=mips64
+		;;
+	ms1-*)
+		cpu=mt
+		;;
+	m68knommu-*)
+		cpu=m68k
+		basic_os=linux
+		;;
+	m9s12z-* | m68hcs12z-* | hcs12z-* | s12z-*)
+		cpu=s12z
+		;;
+	openrisc-*)
+		cpu=or32
+		;;
+	parisc-*)
+		cpu=hppa
+		basic_os=linux
+		;;
+	pentium-* | p5-* | k5-* | k6-* | nexgen-* | viac3-*)
+		cpu=i586
+		;;
+	pentiumpro-* | p6-* | 6x86-* | athlon-* | athalon_*-*)
+		cpu=i686
+		;;
+	pentiumii-* | pentium2-* | pentiumiii-* | pentium3-*)
+		cpu=i686
+		;;
+	pentium4-*)
+		cpu=i786
+		;;
+	pc98-*)
+		cpu=i386
+		;;
+	ppc-* | ppcbe-*)
+		cpu=powerpc
+		;;
+	ppcle-* | powerpclittle-*)
+		cpu=powerpcle
+		;;
+	ppc64-*)
+		cpu=powerpc64
+		;;
+	ppc64le-* | powerpc64little-*)
+		cpu=powerpc64le
+		;;
+	sb1-*)
+		cpu=mipsisa64sb1
+		;;
+	sb1el-*)
+		cpu=mipsisa64sb1el
+		;;
+	sh5elb-*)
+		cpu=`echo "$cpu" | sed 's/^$sh.$e$.$$/\1\2e/'`
+		;;
+	spur-*)
+		cpu=spur
+		;;
+	strongarm-* | thumb-*)
+		cpu=arm
+		;;
+	tx39-*)
+		cpu=mipstx39
+		;;
+	tx39el-*)
+		cpu=mipstx39el
+		;;
+	x64-*)
+		cpu=x86_64
+		;;
+	xscale-* | xscaleebl-*)
+		cpu=`echo "$cpu" | sed 's/^xscale/arm/'`
+		;;
+	arm64-* | aarch64le-*)
+		cpu=aarch64
+		;;
+
+	# Recognize the canonical CPU Types that limit and/or modify the
+	# company names they are paired with.
+	cr16-*)
+		basic_os=${basic_os:-elf}
+		;;
+	crisv32-* | etraxfs*-*)
+		cpu=crisv32
+		vendor=axis
+		;;
+	cris-* | etrax*-*)
+		cpu=cris
+		vendor=axis
+		;;
+	crx-*)
+		basic_os=${basic_os:-elf}
+		;;
+	neo-tandem)
+		cpu=neo
+		vendor=tandem
+		;;
+	nse-tandem)
+		cpu=nse
+		vendor=tandem
+		;;
+	nsr-tandem)
+		cpu=nsr
+		vendor=tandem
+		;;
+	nsv-tandem)
+		cpu=nsv
+		vendor=tandem
+		;;
+	nsx-tandem)
+		cpu=nsx
+		vendor=tandem
+		;;
+	mipsallegrexel-sony)
+		cpu=mipsallegrexel
+		vendor=sony
+		;;
+	tile*-*)
+		basic_os=${basic_os:-linux-gnu}
+		;;
+
+	*)
+		# Recognize the canonical CPU types that are allowed with any
+		# company name.
+		case $cpu in
+			1750a | 580 \
+			| a29k \
+			| aarch64 | aarch64_be \
+			| abacus \
+			| alpha | alphaev4-8 | alphaev56 | alphaev678 \
+			| alpha64 | alpha64ev4-8 | alpha64ev56 | alpha64ev678 \
+			| alphapca567 | alpha64pca567 \
+			| am33_2.0 \
+			| amdgcn \
+			| arc | arceb | arc32 | arc64 \
+			| arm | armlbe | armelb | armv* \
+			| avr | avr32 \
+			| asmjs \
+			| ba \
+			| be32 | be64 \
+			| bfin | bpf | bs2000 \
+			| c123* | c30 | cjt90 | c4x \
+			| c8051 | clipper | craynv | csky | cydra \
+			| d10v | d30v | dlx | dsp16xx \
+			| e2k | elxsi | epiphany \
+			| f3001 | f700 | fido | fr30 | frv | ft32 | fx80 \
+			| h8300 | h8500 \
+			| hppa | hppa1.01 | hppa2.0 | hppa2.0nw | hppa64 \
+			| hexagon \
+			| i370 | i*86 | i860 | i960 | ia16 | ia64 \
+			| ip2k | iq2000 \
+			| k1om \
+			| le32 | le64 \
+			| lm32 \
+			| loongarch32 | loongarch64 | loongarchx32 \
+			| m32c | m32r | m32rle \
+			| m5200 | m68000 | m6800123460 | m68360 | m683?2 | m68k \
+			| m6811 | m68hc11 | m6812 | m68hc12 | m68hcs12x \
+			| m88110 | m88k | maxq | mb | mcore | mep | metag \
+			| microblaze | microblazeel \
+			| mips | mipsbe | mipseb | mipsel | mipsle \
+			| mips16 \
+			| mips64 | mips64eb | mips64el \
+			| mips64octeon | mips64octeonel \
+			| mips64orion | mips64orionel \
+			| mips64r5900 | mips64r5900el \
+			| mips64vr | mips64vrel \
+			| mips64vr4100 | mips64vr4100el \
+			| mips64vr4300 | mips64vr4300el \
+			| mips64vr5000 | mips64vr5000el \
+			| mips64vr5900 | mips64vr5900el \
+			| mipsisa32 | mipsisa32el \
+			| mipsisa32r2 | mipsisa32r2el \
+			| mipsisa32r3 | mipsisa32r3el \
+			| mipsisa32r5 | mipsisa32r5el \
+			| mipsisa32r6 | mipsisa32r6el \
+			| mipsisa64 | mipsisa64el \
+			| mipsisa64r2 | mipsisa64r2el \
+			| mipsisa64r3 | mipsisa64r3el \
+			| mipsisa64r5 | mipsisa64r5el \
+			| mipsisa64r6 | mipsisa64r6el \
+			| mipsisa64sb1 | mipsisa64sb1el \
+			| mipsisa64sr71k | mipsisa64sr71kel \
+			| mipsr5900 | mipsr5900el \
+			| mipstx39 | mipstx39el \
+			| mmix \
+			| mn10200 | mn10300 \
+			| moxie \
+			| mt \
+			| msp430 \
+			| nds32 | nds32le | nds32be \
+			| nfp \
+			| nios | nios2 | nios2eb | nios2el \
+			| none | np1 | ns16k | ns32k | nvptx \
+			| open8 \
+			| or1k* \
+			| or32 \
+			| orion \
+			| picochip \
+			| pdp10 | pdp11 | pj | pjl | pn | power \
+			| powerpc | powerpc64 | powerpc64le | powerpcle | powerpcspe \
+			| pru \
+			| pyramid \
+			| riscv | riscv32 | riscv32be | riscv64 | riscv64be \
+			| rl78 | romp | rs6000 | rx \
+			| s390 | s390x \
+			| score \
+			| sh | shl \
+			| sh1234 | sh24a | sh24aelb | sh23e | shelb | shlbe \
+			| sh1234elb |  sh12345lbe | sh23ele | sh64 | sh64le \
+			| sparc | sparc64 | sparc64b | sparc64v | sparc86x | sparclet \
+			| sparclite \
+			| sparcv8 | sparcv9 | sparcv9b | sparcv9v | sv1 | sx* \
+			| spu \
+			| tahoe \
+			| thumbv7* \
+			| tic30 | tic4x | tic54x | tic55x | tic6x | tic80 \
+			| tron \
+			| ubicom32 \
+			| v70 | v850 | v850e | v850e1 | v850es | v850e2 | v850e2v3 \
+			| vax \
+			| visium \
+			| w65 \
+			| wasm32 | wasm64 \
+			| we32k \
+			| x86 | x86_64 | xc16x | xgate | xps100 \
+			| xstormy16 | xtensa* \
+			| ymp \
+			| z8k | z80)
+				;;
+
+			*)
+				echo Invalid configuration \`"$1"\': machine \`"$cpu-$vendor"\' not recognized 1>&2
+				exit 1
+				;;
+		esac
+		;;
+esac
+
+# Here we canonicalize certain aliases for manufacturers.
+case $vendor in
+	digital*)
+		vendor=dec
+		;;
+	commodore*)
+		vendor=cbm
+		;;
+	*)
+		;;
+esac
+
+# Decode manufacturer-specific aliases for certain operating systems.
+
+if test x$basic_os != x
+then
+
+# First recognize some ad-hoc cases, or perhaps split kernel-os, or else just
+# set os.
+case $basic_os in
+	gnu/linux*)
+		kernel=linux
+		os=`echo "$basic_os" | sed -e 's|gnu/linux|gnu|'`
+		;;
+	os2-emx)
+		kernel=os2
+		os=`echo "$basic_os" | sed -e 's|os2-emx|emx|'`
+		;;
+	nto-qnx*)
+		kernel=nto
+		os=`echo "$basic_os" | sed -e 's|nto-qnx|qnx|'`
+		;;
+	*-*)
+		# shellcheck disable=SC2162
+		saved_IFS=$IFS
+		IFS="-" read kernel os <<EOF
+$basic_os
+EOF
+		IFS=$saved_IFS
+		;;
+	# Default OS when just kernel was specified
+	nto*)
+		kernel=nto
+		os=`echo "$basic_os" | sed -e 's|nto|qnx|'`
+		;;
+	linux*)
+		kernel=linux
+		os=`echo "$basic_os" | sed -e 's|linux|gnu|'`
+		;;
+	*)
+		kernel=
+		os=$basic_os
+		;;
+esac
+
+# Now, normalize the OS (knowing we just have one component, it's not a kernel,
+# etc.)
+case $os in
+	# First match some system type aliases that might get confused
+	# with valid system types.
+	# solaris* is a basic system type, with this one exception.
+	auroraux)
+		os=auroraux
+		;;
+	bluegene*)
+		os=cnk
+		;;
+	solaris1 | solaris1.*)
+		os=`echo "$os" | sed -e 's|solaris1|sunos4|'`
+		;;
+	solaris)
+		os=solaris2
+		;;
+	unixware*)
+		os=sysv4.2uw
+		;;
+	# es1800 is here to avoid being matched by es* (a different OS)
+	es1800*)
+		os=ose
+		;;
+	# Some version numbers need modification
+	chorusos*)
+		os=chorusos
+		;;
+	isc)
+		os=isc2.2
+		;;
+	sco6)
+		os=sco5v6
+		;;
+	sco5)
+		os=sco3.2v5
+		;;
+	sco4)
+		os=sco3.2v4
+		;;
+	sco3.2.4-9*)
+		os=`echo "$os" | sed -e 's/sco3.2./sco3.2v/'`
+		;;
+	sco*v* | scout)
+		# Don't match below
+		;;
+	sco*)
+		os=sco3.2v2
+		;;
+	psos*)
+		os=psos
+		;;
+	qnx*)
+		os=qnx
+		;;
+	hiux*)
+		os=hiuxwe2
+		;;
+	lynx*178)
+		os=lynxos178
+		;;
+	lynx*5)
+		os=lynxos5
+		;;
+	lynxos*)
+		# don't get caught up in next wildcard
+		;;
+	lynx*)
+		os=lynxos
+		;;
+	mac0-9*)
+		os=`echo "$os" | sed -e 's|mac|macos|'`
+		;;
+	opened*)
+		os=openedition
+		;;
+	os400*)
+		os=os400
+		;;
+	sunos5*)
+		os=`echo "$os" | sed -e 's|sunos5|solaris2|'`
+		;;
+	sunos6*)
+		os=`echo "$os" | sed -e 's|sunos6|solaris3|'`
+		;;
+	wince*)
+		os=wince
+		;;
+	utek*)
+		os=bsd
+		;;
+	dynix*)
+		os=bsd
+		;;
+	acis*)
+		os=aos
+		;;
+	atheos*)
+		os=atheos
+		;;
+	syllable*)
+		os=syllable
+		;;
+	386bsd)
+		os=bsd
+		;;
+	ctix* | uts*)
+		os=sysv
+		;;
+	nova*)
+		os=rtmk-nova
+		;;
+	ns2)
+		os=nextstep2
+		;;
+	# Preserve the version number of sinix5.
+	sinix5.*)
+		os=`echo "$os" | sed -e 's|sinix|sysv|'`
+		;;
+	sinix*)
+		os=sysv4
+		;;
+	tpf*)
+		os=tpf
+		;;
+	triton*)
+		os=sysv3
+		;;
+	oss*)
+		os=sysv3
+		;;
+	svr4*)
+		os=sysv4
+		;;
+	svr3)
+		os=sysv3
+		;;
+	sysvr4)
+		os=sysv4
+		;;
+	ose*)
+		os=ose
+		;;
+	*mint | mint0-9* | *MiNT | MiNT0-9*)
+		os=mint
+		;;
+	dicos*)
+		os=dicos
+		;;
+	pikeos*)
+		# Until real need of OS specific support for
+		# particular features comes up, bare metal
+		# configurations are quite functional.
+		case $cpu in
+		    arm*)
+			os=eabi
+			;;
+		    *)
+			os=elf
+			;;
+		esac
+		;;
+	*)
+		# No normalization, but not necessarily accepted, that comes below.
+		;;
+esac
+
+else
+
+# Here we handle the default operating systems that come with various machines.
+# The value should be what the vendor currently ships out the door with their
+# machine or put another way, the most popular os provided with the machine.
+
+# Note that if you're going to try to match "-MANUFACTURER" here (say,
+# "-sun"), then you have to tell the case statement up towards the top
+# that MANUFACTURER isn't an operating system.  Otherwise, code above
+# will signal an error saying that MANUFACTURER isn't an operating
+# system, and we'll never get to this point.
+
+kernel=
+case $cpu-$vendor in
+	score-*)
+		os=elf
+		;;
+	spu-*)
+		os=elf
+		;;
+	*-acorn)
+		os=riscix1.2
+		;;
+	arm*-rebel)
+		kernel=linux
+		os=gnu
+		;;
+	arm*-semi)
+		os=aout
+		;;
+	c4x-* | tic4x-*)
+		os=coff
+		;;
+	c8051-*)
+		os=elf
+		;;
+	clipper-intergraph)
+		os=clix
+		;;
+	hexagon-*)
+		os=elf
+		;;
+	tic54x-*)
+		os=coff
+		;;
+	tic55x-*)
+		os=coff
+		;;
+	tic6x-*)
+		os=coff
+		;;
+	# This must come before the *-dec entry.
+	pdp10-*)
+		os=tops20
+		;;
+	pdp11-*)
+		os=none
+		;;
+	*-dec | vax-*)
+		os=ultrix4.2
+		;;
+	m68*-apollo)
+		os=domain
+		;;
+	i386-sun)
+		os=sunos4.0.2
+		;;
+	m68000-sun)
+		os=sunos3
+		;;
+	m68*-cisco)
+		os=aout
+		;;
+	mep-*)
+		os=elf
+		;;
+	mips*-cisco)
+		os=elf
+		;;
+	mips*-*)
+		os=elf
+		;;
+	or32-*)
+		os=coff
+		;;
+	*-tti)	# must be before sparc entry or we get the wrong os.
+		os=sysv3
+		;;
+	sparc-* | *-sun)
+		os=sunos4.1.1
+		;;
+	pru-*)
+		os=elf
+		;;
+	*-be)
+		os=beos
+		;;
+	*-ibm)
+		os=aix
+		;;
+	*-knuth)
+		os=mmixware
+		;;
+	*-wec)
+		os=proelf
+		;;
+	*-winbond)
+		os=proelf
+		;;
+	*-oki)
+		os=proelf
+		;;
+	*-hp)
+		os=hpux
+		;;
+	*-hitachi)
+		os=hiux
+		;;
+	i860-* | *-att | *-ncr | *-altos | *-motorola | *-convergent)
+		os=sysv
+		;;
+	*-cbm)
+		os=amigaos
+		;;
+	*-dg)
+		os=dgux
+		;;
+	*-dolphin)
+		os=sysv3
+		;;
+	m68k-ccur)
+		os=rtu
+		;;
+	m88k-omron*)
+		os=luna
+		;;
+	*-next)
+		os=nextstep
+		;;
+	*-sequent)
+		os=ptx
+		;;
+	*-crds)
+		os=unos
+		;;
+	*-ns)
+		os=genix
+		;;
+	i370-*)
+		os=mvs
+		;;
+	*-gould)
+		os=sysv
+		;;
+	*-highlevel)
+		os=bsd
+		;;
+	*-encore)
+		os=bsd
+		;;
+	*-sgi)
+		os=irix
+		;;
+	*-siemens)
+		os=sysv4
+		;;
+	*-masscomp)
+		os=rtu
+		;;
+	f3001-fujitsu | f700-fujitsu)
+		os=uxpv
+		;;
+	*-rom68k)
+		os=coff
+		;;
+	*-*bug)
+		os=coff
+		;;
+	*-apple)
+		os=macos
+		;;
+	*-atari*)
+		os=mint
+		;;
+	*-wrs)
+		os=vxworks
+		;;
+	*)
+		os=none
+		;;
+esac
+
+fi
+
+# Now, validate our (potentially fixed-up) OS.
+case $os in
+	# Sometimes we do "kernel-libc", so those need to count as OSes.
+	musl* | newlib* | relibc* | uclibc*)
+		;;
+	# Likewise for "kernel-abi"
+	eabi* | gnueabi*)
+		;;
+	# VxWorks passes extra cpu info in the 4th filed.
+	simlinux | simwindows | spe)
+		;;
+	# Now accept the basic system types.
+	# The portable systems comes first.
+	# Each alternative MUST end in a * to match a version number.
+	gnu* | android* | bsd* | mach* | minix* | genix* | ultrix* | irix* \
+	     | *vms* | esix* | aix* | cnk* | sunos | sunos34* \
+	     | hpux* | unos* | osf* | luna* | dgux* | auroraux* | solaris* \
+	     | sym* |  plan9* | psp* | sim* | xray* | os68k* | v88r* \
+	     | hiux* | abug | nacl* | netware* | windows* \
+	     | os9* | macos* | osx* | ios* \
+	     | mpw* | magic* | mmixware* | mon960* | lnews* \
+	     | amigaos* | amigados* | msdos* | newsos* | unicos* | aof* \
+	     | aos* | aros* | cloudabi* | sortix* | twizzler* \
+	     | nindy* | vxsim* | vxworks* | ebmon* | hms* | mvs* \
+	     | clix* | riscos* | uniplus* | iris* | isc* | rtu* | xenix* \
+	     | mirbsd* | netbsd* | dicos* | openedition* | ose* \
+	     | bitrig* | openbsd* | secbsd* | solidbsd* | libertybsd* | os108* \
+	     | ekkobsd* | freebsd* | riscix* | lynxos* | os400* \
+	     | bosx* | nextstep* | cxux* | aout* | elf* | oabi* \
+	     | ptx* | coff* | ecoff* | winnt* | domain* | vsta* \
+	     | udi* | lites* | ieee* | go32* | aux* | hcos* \
+	     | chorusrdb* | cegcc* | glidix* | serenity* \
+	     | cygwin* | msys* | pe* | moss* | proelf* | rtems* \
+	     | midipix* | mingw32* | mingw64* | mint* \
+	     | uxpv* | beos* | mpeix* | udk* | moxiebox* \
+	     | interix* | uwin* | mks* | rhapsody* | darwin* \
+	     | openstep* | oskit* | conix* | pw32* | nonstopux* \
+	     | storm-chaos* | tops10* | tenex* | tops20* | its* \
+	     | os2* | vos* | palmos* | uclinux* | nucleus* | morphos* \
+	     | scout* | superux* | sysv* | rtmk* | tpf* | windiss* \
+	     | powermax* | dnix* | nx6 | nx7 | sei* | dragonfly* \
+	     | skyos* | haiku* | rdos* | toppers* | drops* | es* \
+	     | onefs* | tirtos* | phoenix* | fuchsia* | redox* | bme* \
+	     | midnightbsd* | amdhsa* | unleashed* | emscripten* | wasi* \
+	     | nsk* | powerunix* | genode* | zvmoe* | qnx* | emx* | zephyr* \
+	     | fiwix* )
+		;;
+	# This one is extra strict with allowed versions
+	sco3.2v2 | sco3.2v4-9* | sco5v6*)
+		# Don't forget version if it is 3.2v4 or newer.
+		;;
+	none)
+		;;
+	*)
+		echo Invalid configuration \`"$1"\': OS \`"$os"\' not recognized 1>&2
+		exit 1
+		;;
+esac
+
+# As a final step for OS-related things, validate the OS-kernel combination
+# (given a valid OS), if there is a kernel.
+case $kernel-$os in
+	linux-gnu* | linux-dietlibc* | linux-android* | linux-newlib* \
+		   | linux-musl* | linux-relibc* | linux-uclibc* )
+		;;
+	uclinux-uclibc* )
+		;;
+	-dietlibc* | -newlib* | -musl* | -relibc* | -uclibc* )
+		# These are just libc implementations, not actual OSes, and thus
+		# require a kernel.
+		echo "Invalid configuration \`$1': libc \`$os' needs explicit kernel." 1>&2
+		exit 1
+		;;
+	kfreebsd*-gnu* | kopensolaris*-gnu*)
+		;;
+	vxworks-simlinux | vxworks-simwindows | vxworks-spe)
+		;;
+	nto-qnx*)
+		;;
+	os2-emx)
+		;;
+	*-eabi* | *-gnueabi*)
+		;;
+	-*)
+		# Blank kernel with real OS is always fine.
+		;;
+	*-*)
+		echo "Invalid configuration \`$1': Kernel \`$kernel' not known to work with OS \`$os'." 1>&2
+		exit 1
+		;;
+esac
+
+# Here we handle the case where we know the os, and the CPU type, but not the
+# manufacturer.  We pick the logical manufacturer.
+case $vendor in
+	unknown)
+		case $cpu-$os in
+			*-riscix*)
+				vendor=acorn
+				;;
+			*-sunos*)
+				vendor=sun
+				;;
+			*-cnk* | *-aix*)
+				vendor=ibm
+				;;
+			*-beos*)
+				vendor=be
+				;;
+			*-hpux*)
+				vendor=hp
+				;;
+			*-mpeix*)
+				vendor=hp
+				;;
+			*-hiux*)
+				vendor=hitachi
+				;;
+			*-unos*)
+				vendor=crds
+				;;
+			*-dgux*)
+				vendor=dg
+				;;
+			*-luna*)
+				vendor=omron
+				;;
+			*-genix*)
+				vendor=ns
+				;;
+			*-clix*)
+				vendor=intergraph
+				;;
+			*-mvs* | *-opened*)
+				vendor=ibm
+				;;
+			*-os400*)
+				vendor=ibm
+				;;
+			s390-* | s390x-*)
+				vendor=ibm
+				;;
+			*-ptx*)
+				vendor=sequent
+				;;
+			*-tpf*)
+				vendor=ibm
+				;;
+			*-vxsim* | *-vxworks* | *-windiss*)
+				vendor=wrs
+				;;
+			*-aux*)
+				vendor=apple
+				;;
+			*-hms*)
+				vendor=hitachi
+				;;
+			*-mpw* | *-macos*)
+				vendor=apple
+				;;
+			*-*mint | *-mint0-9* | *-*MiNT | *-MiNT0-9*)
+				vendor=atari
+				;;
+			*-vos*)
+				vendor=stratus
+				;;
+		esac
+		;;
+esac
+
+echo "$cpu-$vendor-${kernel:+$kernel-}$os"
+exit
+
+# Local variables:
+# eval: (add-hook 'before-save-hook 'time-stamp)
+# time-stamp-start: "timestamp='"
+# time-stamp-format: "%:y-%02m-%02d"
+# time-stamp-end: "'"
+# End:

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/helpers/install-sh Added

@@ -0,0 +1,541 @@
+#!/bin/sh
+# install - install a program, script, or datafile
+
+scriptversion=2020-11-14.01; # UTC
+
+# This originates from X11R5 (mit/util/scripts/install.sh), which was
+# later released in X11R6 (xc/config/util/install.sh) with the
+# following copyright and license.
+#
+# Copyright (C) 1994 X Consortium
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to
+# deal in the Software without restriction, including without limitation the
+# rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+# sell copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+# X CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
+# AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNEC-
+# TION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+#
+# Except as contained in this notice, the name of the X Consortium shall not
+# be used in advertising or otherwise to promote the sale, use or other deal-
+# ings in this Software without prior written authorization from the X Consor-
+# tium.
+#
+#
+# FSF changes to this file are in the public domain.
+#
+# Calling this script install-sh is preferred over install.sh, to prevent
+# 'make' implicit rules from creating a file called install from it
+# when there is no Makefile.
+#
+# This script is compatible with the BSD install script, but was written
+# from scratch.
+
+tab='	'
+nl='
+'
+IFS=" $tab$nl"
+
+# Set DOITPROG to "echo" to test this script.
+
+doit=${DOITPROG-}
+doit_exec=${doit:-exec}
+
+# Put in absolute file names if you don't have them in your path;
+# or use environment vars.
+
+chgrpprog=${CHGRPPROG-chgrp}
+chmodprog=${CHMODPROG-chmod}
+chownprog=${CHOWNPROG-chown}
+cmpprog=${CMPPROG-cmp}
+cpprog=${CPPROG-cp}
+mkdirprog=${MKDIRPROG-mkdir}
+mvprog=${MVPROG-mv}
+rmprog=${RMPROG-rm}
+stripprog=${STRIPPROG-strip}
+
+posix_mkdir=
+
+# Desired mode of installed file.
+mode=0755
+
+# Create dirs (including intermediate dirs) using mode 755.
+# This is like GNU 'install' as of coreutils 8.32 (2020).
+mkdir_umask=22
+
+backupsuffix=
+chgrpcmd=
+chmodcmd=$chmodprog
+chowncmd=
+mvcmd=$mvprog
+rmcmd="$rmprog -f"
+stripcmd=
+
+src=
+dst=
+dir_arg=
+dst_arg=
+
+copy_on_change=false
+is_target_a_directory=possibly
+
+usage="\
+Usage: $0 OPTION... -T SRCFILE DSTFILE
+   or: $0 OPTION... SRCFILES... DIRECTORY
+   or: $0 OPTION... -t DIRECTORY SRCFILES...
+   or: $0 OPTION... -d DIRECTORIES...
+
+In the 1st form, copy SRCFILE to DSTFILE.
+In the 2nd and 3rd, copy all SRCFILES to DIRECTORY.
+In the 4th, create DIRECTORIES.
+
+Options:
+     --help     display this help and exit.
+     --version  display version info and exit.
+
+  -c            (ignored)
+  -C            install only if different (preserve data modification time)
+  -d            create directories instead of installing files.
+  -g GROUP      $chgrpprog installed files to GROUP.
+  -m MODE       $chmodprog installed files to MODE.
+  -o USER       $chownprog installed files to USER.
+  -p            pass -p to $cpprog.
+  -s            $stripprog installed files.
+  -S SUFFIX     attempt to back up existing files, with suffix SUFFIX.
+  -t DIRECTORY  install into DIRECTORY.
+  -T            report an error if DSTFILE is a directory.
+
+Environment variables override the default commands:
+  CHGRPPROG CHMODPROG CHOWNPROG CMPPROG CPPROG MKDIRPROG MVPROG
+  RMPROG STRIPPROG
+
+By default, rm is invoked with -f; when overridden with RMPROG,
+it's up to you to specify -f if you want it.
+
+If -S is not specified, no backups are attempted.
+
+Email bug reports to bug-automake@gnu.org.
+Automake home page: https://www.gnu.org/software/automake/
+"
+
+while test $# -ne 0; do
+  case $1 in
+    -c) ;;
+
+    -C) copy_on_change=true;;
+
+    -d) dir_arg=true;;
+
+    -g) chgrpcmd="$chgrpprog $2"
+        shift;;
+
+    --help) echo "$usage"; exit $?;;
+
+    -m) mode=$2
+        case $mode in
+          *' '* | *"$tab"* | *"$nl"* | *'*'* | *'?'* | *''*)
+            echo "$0: invalid mode: $mode" >&2
+            exit 1;;
+        esac
+        shift;;
+
+    -o) chowncmd="$chownprog $2"
+        shift;;
+
+    -p) cpprog="$cpprog -p";;
+
+    -s) stripcmd=$stripprog;;
+
+    -S) backupsuffix="$2"
+        shift;;
+
+    -t)
+        is_target_a_directory=always
+        dst_arg=$2
+        # Protect names problematic for 'test' and other utilities.
+        case $dst_arg in
+          -* | =!) dst_arg=./$dst_arg;;
+        esac
+        shift;;
+
+    -T) is_target_a_directory=never;;
+
+    --version) echo "$0 $scriptversion"; exit $?;;
+
+    --) shift
+        break;;
+
+    -*) echo "$0: invalid option: $1" >&2
+        exit 1;;
+
+    *)  break;;
+  esac
+  shift
+done
+
+# We allow the use of options -d and -T together, by making -d
+# take the precedence; this is for compatibility with GNU install.
+
+if test -n "$dir_arg"; then
+  if test -n "$dst_arg"; then
+    echo "$0: target directory not allowed when installing a directory." >&2
+    exit 1
+  fi
+fi
+
+if test $# -ne 0 && test -z "$dir_arg$dst_arg"; then
+  # When -d is used, all remaining arguments are directories to create.
+  # When -t is used, the destination is already specified.
+  # Otherwise, the last argument is the destination.  Remove it from $@.
+  for arg
+  do
+    if test -n "$dst_arg"; then
+      # $@ is not empty: it contains at least $arg.
+      set fnord "$@" "$dst_arg"
+      shift # fnord
+    fi
+    shift # arg
+    dst_arg=$arg
+    # Protect names problematic for 'test' and other utilities.
+    case $dst_arg in
+      -* | =!) dst_arg=./$dst_arg;;
+    esac
+  done
+fi
+
+if test $# -eq 0; then
+  if test -z "$dir_arg"; then
+    echo "$0: no input file specified." >&2
+    exit 1
+  fi
+  # It's OK to call 'install-sh -d' without argument.
+  # This can happen when creating conditional directories.
+  exit 0
+fi
+
+if test -z "$dir_arg"; then
+  if test $# -gt 1 || test "$is_target_a_directory" = always; then
+    if test ! -d "$dst_arg"; then
+      echo "$0: $dst_arg: Is not a directory." >&2
+      exit 1
+    fi
+  fi
+fi
+
+if test -z "$dir_arg"; then
+  do_exit='(exit $ret); exit $ret'
+  trap "ret=129; $do_exit" 1
+  trap "ret=130; $do_exit" 2
+  trap "ret=141; $do_exit" 13
+  trap "ret=143; $do_exit" 15
+
+  # Set umask so as not to create temps with too-generous modes.
+  # However, 'strip' requires both read and write access to temps.
+  case $mode in
+    # Optimize common cases.
+    *644) cp_umask=133;;
+    *755) cp_umask=22;;
+
+    *0-7)
+      if test -z "$stripcmd"; then
+        u_plus_rw=
+      else
+        u_plus_rw='% 200'
+      fi
+      cp_umask=`expr '(' 777 - $mode % 1000 ')' $u_plus_rw`;;
+    *)
+      if test -z "$stripcmd"; then
+        u_plus_rw=
+      else
+        u_plus_rw=,u+rw
+      fi
+      cp_umask=$mode$u_plus_rw;;
+  esac
+fi
+
+for src
+do
+  # Protect names problematic for 'test' and other utilities.
+  case $src in
+    -* | =!) src=./$src;;
+  esac
+
+  if test -n "$dir_arg"; then
+    dst=$src
+    dstdir=$dst
+    test -d "$dstdir"
+    dstdir_status=$?
+    # Don't chown directories that already exist.
+    if test $dstdir_status = 0; then
+      chowncmd=""
+    fi
+  else
+
+    # Waiting for this to be detected by the "$cpprog $src $dsttmp" command
+    # might cause directories to be created, which would be especially bad
+    # if $src (and thus $dsttmp) contains '*'.
+    if test ! -f "$src" && test ! -d "$src"; then
+      echo "$0: $src does not exist." >&2
+      exit 1
+    fi
+
+    if test -z "$dst_arg"; then
+      echo "$0: no destination specified." >&2
+      exit 1
+    fi
+    dst=$dst_arg
+
+    # If destination is a directory, append the input filename.
+    if test -d "$dst"; then
+      if test "$is_target_a_directory" = never; then
+        echo "$0: $dst_arg: Is a directory" >&2
+        exit 1
+      fi
+      dstdir=$dst
+      dstbase=`basename "$src"`
+      case $dst in
+	*/) dst=$dst$dstbase;;
+	*)  dst=$dst/$dstbase;;
+      esac
+      dstdir_status=0
+    else
+      dstdir=`dirname "$dst"`
+      test -d "$dstdir"
+      dstdir_status=$?
+    fi
+  fi
+
+  case $dstdir in
+    */) dstdirslash=$dstdir;;
+    *)  dstdirslash=$dstdir/;;
+  esac
+
+  obsolete_mkdir_used=false
+
+  if test $dstdir_status != 0; then
+    case $posix_mkdir in
+      '')
+        # With -d, create the new directory with the user-specified mode.
+        # Otherwise, rely on $mkdir_umask.
+        if test -n "$dir_arg"; then
+          mkdir_mode=-m$mode
+        else
+          mkdir_mode=
+        fi
+
+        posix_mkdir=false
+	# The $RANDOM variable is not portable (e.g., dash).  Use it
+	# here however when possible just to lower collision chance.
+	tmpdir=${TMPDIR-/tmp}/ins$RANDOM-$$
+
+	trap '
+	  ret=$?
+	  rmdir "$tmpdir/a/b" "$tmpdir/a" "$tmpdir" 2>/dev/null
+	  exit $ret
+	' 0
+
+	# Because "mkdir -p" follows existing symlinks and we likely work
+	# directly in world-writeable /tmp, make sure that the '$tmpdir'
+	# directory is successfully created first before we actually test
+	# 'mkdir -p'.
+	if (umask $mkdir_umask &&
+	    $mkdirprog $mkdir_mode "$tmpdir" &&
+	    exec $mkdirprog $mkdir_mode -p -- "$tmpdir/a/b") >/dev/null 2>&1
+	then
+	  if test -z "$dir_arg" || {
+	       # Check for POSIX incompatibilities with -m.
+	       # HP-UX 11.23 and IRIX 6.5 mkdir -m -p sets group- or
+	       # other-writable bit of parent directory when it shouldn't.
+	       # FreeBSD 6.1 mkdir -m -p sets mode of existing directory.
+	       test_tmpdir="$tmpdir/a"
+	       ls_ld_tmpdir=`ls -ld "$test_tmpdir"`
+	       case $ls_ld_tmpdir in
+		 d????-?r-*) different_mode=700;;
+		 d????-?--*) different_mode=755;;
+		 *) false;;
+	       esac &&
+	       $mkdirprog -m$different_mode -p -- "$test_tmpdir" && {
+		 ls_ld_tmpdir_1=`ls -ld "$test_tmpdir"`
+		 test "$ls_ld_tmpdir" = "$ls_ld_tmpdir_1"
+	       }
+	     }
+	  then posix_mkdir=:
+	  fi
+	  rmdir "$tmpdir/a/b" "$tmpdir/a" "$tmpdir"
+	else
+	  # Remove any dirs left behind by ancient mkdir implementations.
+	  rmdir ./$mkdir_mode ./-p ./-- "$tmpdir" 2>/dev/null
+	fi
+	trap '' 0;;
+    esac
+
+    if
+      $posix_mkdir && (
+        umask $mkdir_umask &&
+        $doit_exec $mkdirprog $mkdir_mode -p -- "$dstdir"
+      )
+    then :
+    else
+
+      # mkdir does not conform to POSIX,
+      # or it failed possibly due to a race condition.  Create the
+      # directory the slow way, step by step, checking for races as we go.
+
+      case $dstdir in
+        /*) prefix='/';;
+        -=!*) prefix='./';;
+        *)  prefix='';;
+      esac
+
+      oIFS=$IFS
+      IFS=/
+      set -f
+      set fnord $dstdir
+      shift
+      set +f
+      IFS=$oIFS
+
+      prefixes=
+
+      for d
+      do
+        test X"$d" = X && continue
+
+        prefix=$prefix$d
+        if test -d "$prefix"; then
+          prefixes=
+        else
+          if $posix_mkdir; then
+            (umask $mkdir_umask &&
+             $doit_exec $mkdirprog $mkdir_mode -p -- "$dstdir") && break
+            # Don't fail if two instances are running concurrently.
+            test -d "$prefix" || exit 1
+          else
+            case $prefix in
+              *\'*) qprefix=`echo "$prefix" | sed "s/'/'\\\\\\\\''/g"`;;
+              *) qprefix=$prefix;;
+            esac
+            prefixes="$prefixes '$qprefix'"
+          fi
+        fi
+        prefix=$prefix/
+      done
+
+      if test -n "$prefixes"; then
+        # Don't fail if two instances are running concurrently.
+        (umask $mkdir_umask &&
+         eval "\$doit_exec \$mkdirprog $prefixes") ||
+          test -d "$dstdir" || exit 1
+        obsolete_mkdir_used=true
+      fi
+    fi
+  fi
+
+  if test -n "$dir_arg"; then
+    { test -z "$chowncmd" || $doit $chowncmd "$dst"; } &&
+    { test -z "$chgrpcmd" || $doit $chgrpcmd "$dst"; } &&
+    { test "$obsolete_mkdir_used$chowncmd$chgrpcmd" = false ||
+      test -z "$chmodcmd" || $doit $chmodcmd $mode "$dst"; } || exit 1
+  else
+
+    # Make a couple of temp file names in the proper directory.
+    dsttmp=${dstdirslash}_inst.$$_
+    rmtmp=${dstdirslash}_rm.$$_
+
+    # Trap to clean up those temp files at exit.
+    trap 'ret=$?; rm -f "$dsttmp" "$rmtmp" && exit $ret' 0
+
+    # Copy the file name to the temp name.
+    (umask $cp_umask &&
+     { test -z "$stripcmd" || {
+	 # Create $dsttmp read-write so that cp doesn't create it read-only,
+	 # which would cause strip to fail.
+	 if test -z "$doit"; then
+	   : >"$dsttmp" # No need to fork-exec 'touch'.
+	 else
+	   $doit touch "$dsttmp"
+	 fi
+       }
+     } &&
+     $doit_exec $cpprog "$src" "$dsttmp") &&
+
+    # and set any options; do chmod last to preserve setuid bits.
+    #
+    # If any of these fail, we abort the whole thing.  If we want to
+    # ignore errors from any of these, just make sure not to ignore
+    # errors from the above "$doit $cpprog $src $dsttmp" command.
+    #
+    { test -z "$chowncmd" || $doit $chowncmd "$dsttmp"; } &&
+    { test -z "$chgrpcmd" || $doit $chgrpcmd "$dsttmp"; } &&
+    { test -z "$stripcmd" || $doit $stripcmd "$dsttmp"; } &&
+    { test -z "$chmodcmd" || $doit $chmodcmd $mode "$dsttmp"; } &&
+
+    # If -C, don't bother to copy if it wouldn't change the file.
+    if $copy_on_change &&
+       old=`LC_ALL=C ls -dlL "$dst"     2>/dev/null` &&
+       new=`LC_ALL=C ls -dlL "$dsttmp"  2>/dev/null` &&
+       set -f &&
+       set X $old && old=:$2:$4:$5:$6 &&
+       set X $new && new=:$2:$4:$5:$6 &&
+       set +f &&
+       test "$old" = "$new" &&
+       $cmpprog "$dst" "$dsttmp" >/dev/null 2>&1
+    then
+      rm -f "$dsttmp"
+    else
+      # If $backupsuffix is set, and the file being installed
+      # already exists, attempt a backup.  Don't worry if it fails,
+      # e.g., if mv doesn't support -f.
+      if test -n "$backupsuffix" && test -f "$dst"; then
+        $doit $mvcmd -f "$dst" "$dst$backupsuffix" 2>/dev/null
+      fi
+
+      # Rename the file to the real destination.
+      $doit $mvcmd -f "$dsttmp" "$dst" 2>/dev/null ||
+
+      # The rename failed, perhaps because mv can't rename something else
+      # to itself, or perhaps because mv is so ancient that it does not
+      # support -f.
+      {
+        # Now remove or move aside any old file at destination location.
+        # We try this two ways since rm can't unlink itself on some
+        # systems and the destination file might be busy for other
+        # reasons.  In this case, the final cleanup might fail but the new
+        # file should still install successfully.
+        {
+          test ! -f "$dst" ||
+          $doit $rmcmd "$dst" 2>/dev/null ||
+          { $doit $mvcmd -f "$dst" "$rmtmp" 2>/dev/null &&
+            { $doit $rmcmd "$rmtmp" 2>/dev/null; :; }
+          } ||
+          { echo "$0: cannot unlink or rename $dst" >&2
+            (exit 1); exit 1
+          }
+        } &&
+
+        # Now rename the file to the real destination.
+        $doit $mvcmd "$dsttmp" "$dst"
+      }
+    fi || exit 1
+
+    trap '' 0
+  fi
+done
+
+# Local variables:
+# eval: (add-hook 'before-save-hook 'time-stamp)
+# time-stamp-start: "scriptversion="
+# time-stamp-format: "%:y-%02m-%02d.%02H"
+# time-stamp-time-zone: "UTC0"
+# time-stamp-end: "; # UTC"
+# End:

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_add_cflags.m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_add_cppflags.m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_add_flags.m4 Added

@@ -0,0 +1,39 @@
+dnl --------------------------------------------------------------------------
+dnl PA_ADD_FLAGS(flagvar, flags)
+dnl
+dnl  Add flags to the variable flagvar if and only if it is accepted
+dnl  by all languages affected by flagvar, if those languages have
+dnl  been previously seen in the script.
+dnl --------------------------------------------------------------------------
+AC_DEFUN(PA_ADD_FLAGS,
+
+  AS_VAR_PUSHDEF(old, _$0_$1_orig)
+  AS_VAR_PUSHDEF(ok, _$0_$1_ok)
+  AS_VAR_PUSHDEF(flags, $1)
+
+  AS_VAR_COPY(old, flags)
+  AS_VAR_SET(flags, "$flags $2")
+  AS_VAR_SET(ok, yes)
+
+  PA_LANG_FOREACH(PA_FLAGS_LANGLIST($1),
+    AS_VAR_IF(ok, yes,
+     AC_MSG_CHECKING(if $_AC_CC accepts $2)
+      PA_BUILD_IFELSE(,
+      AC_MSG_RESULT(yes),
+      AC_MSG_RESULT(no)
+       AS_VAR_SET(ok, no)))
+     )
+
+ AS_VAR_IF(ok, yes,
+  m4_ifnblank($3,AS_VAR_SET(flags, "$old $3"))
+   m4_foreach_w(_pa_add_flags_flag, m4_ifblank($3,$2,$3),
+   AC_DEFINE(PA_SYM($1__pa_add_flags_flag), 1,
+    Define to 1 if compiled with the _pa_add_flags_flag compiler flag))
+   $4,
+  AS_VAR_SET(flags, "$old")
+   $5)
+
+  AS_VAR_POPDEF(flags)
+  AS_VAR_POPDEF(ok)
+  AS_VAR_POPDEF(old)
+)

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_add_headers.m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_add_langflags.m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_add_ldflags.m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_arg_bool.m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_arg_disabled.m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_arg_enabled.m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_attribute_syntax.m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_build_ifelse.m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_c_typeof.m4 Added

@@ -0,0 +1,32 @@
+dnl --------------------------------------------------------------------------
+dnl PA_C_TYPEOF
+dnl
+dnl Find if typeof() exists, or an equivalent (__typeof__, decltype,
+dnl __decltype__)
+dnl --------------------------------------------------------------------------
+AC_DEFUN(PA_C_TYPEOF,
+AC_CACHE_CHECK(if $CC supports typeof, pa_cv_typeof,
+ pa_cv_typeof=no
+ for pa_typeof_try in typeof __typeof __typeof__ decltype __decltype __decltype__ _Decltype
+ do
+  AS_IF(test $pa_cv_typeof = no,
+        AC_COMPILE_IFELSE(AC_LANG_SOURCE(
+AC_INCLUDES_DEFAULT
+int testme(int x);
+int testme(int x)
+{
+    $pa_typeof_try(x) y = x*x;
+    return y;
+}
+),
+ pa_cv_typeof=$pa_typeof_try))
+ done
+ )
+ AS_IF(test $pa_cv_typeof = no,
+       ,
+       AC_DEFINE(HAVE_TYPEOF, 1,
+	 Define to 1 if you have some version of the typeof operator.)
+	AS_IF(test $pa_cv_typeof = typeof,
+	      ,
+	      AC_DEFINE_UNQUOTED(typeof, $pa_cv_typeof,
+	        Define if your typeof operator is not named `typeof'.))))

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_check_bad_stdc_inline.m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_common_attributes.m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_cross_compile.m4 Added

@@ -0,0 +1,41 @@
+dnl --------------------------------------------------------------------------
+dnl  PA_CROSS_COMPILE
+dnl
+dnl Get the canonical name for the build and host (runtime) systems;
+dnl then figure out if this is cross-compilation. Specifically, this
+dnl disables invoking WINE on non-Windows systems which are configured
+dnl to run WINE automatically.
+dnl
+dnl Use PA_CROSS_COMPILE_TOOL if the target system (output of a code-
+dnl generation tool) is applicable.
+dnl
+dnl This doesn't explicitly print any messages as that is automatically
+dnl done elsewhere.
+dnl --------------------------------------------------------------------------
+AC_DEFUN_ONCE(PA_CROSS_COMPILE,
+
+ AC_BEFORE($0, AC_LANG_COMPILER)
+ AC_BEFORE($0, AC_LANG)
+ AC_BEFORE($0, AC_PROG_CC)
+ AC_BEFORE($0, AC_PROG_CPP)
+ AC_BEFORE($0, AC_PROG_CXX)
+ AC_BEFORE($0, AC_PROG_CXXCPP)
+ AC_BEFORE($0, AC_PROG_OBJC)
+ AC_BEFORE($0, AC_PROG_OBJCPP)
+ AC_BEFORE($0, AC_PROG_OBJCXX)
+ AC_BEFORE($0, AC_PROG_OBJCXXCPP)
+ AC_BEFORE($0, AC_PROG_F77)
+ AC_BEFORE($0, AC_PROG_FC)
+ AC_BEFORE($0, AC_PROG_GO)
+
+ # Disable WINE
+ WINELOADER=/dev/null
+ export WINELOADER
+ WINESERVER=/dev/null
+ export WINESERVER
+ WINEPREFIX=/dev/null
+ export WINEPREFIX
+
+ AC_CANONICAL_BUILD
+ AC_CANONICAL_HOST
+)

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_endian.m4 Added

@@ -0,0 +1,32 @@
+dnl --------------------------------------------------------------------------
+dnl PA_ENDIAN
+dnl
+dnl Test for a bunch of variants of endian tests and byteorder functions.
+dnl --------------------------------------------------------------------------
+AC_DEFUN(PA_ENDIAN,
+AC_C_BIGENDIAN(AC_DEFINE(WORDS_BIGENDIAN),AC_DEFINE(WORDS_LITTLEENDIAN),,)
+AH_TEMPLATE(WORDS_BIGENDIAN,
+Define to 1 if your processor stores words with the most significant
+byte first (like Motorola and SPARC, unlike Intel and VAX).)
+AH_TEMPLATE(WORDS_LITTLEENDIAN,
+Define to 1 if your processor stores words with the least significant
+byte first (like Intel and VAX, unlike Motorola and SPARC).)
+PA_ADD_HEADERS(endian.h sys/endian.h machine/endian.h)
+PA_HAVE_FUNC(cpu_to_le16, (0))
+PA_HAVE_FUNC(cpu_to_le32, (0))
+PA_HAVE_FUNC(cpu_to_le64, (0))
+PA_HAVE_FUNC(__cpu_to_le16, (0))
+PA_HAVE_FUNC(__cpu_to_le32, (0))
+PA_HAVE_FUNC(__cpu_to_le64, (0))
+PA_HAVE_FUNC(htole16, (0))
+PA_HAVE_FUNC(htole32, (0))
+PA_HAVE_FUNC(htole64, (0))
+PA_HAVE_FUNC(__bswap_16, (0))
+PA_HAVE_FUNC(__bswap_32, (0))
+PA_HAVE_FUNC(__bswap_64, (0))
+PA_HAVE_FUNC(__builtin_bswap16, (0))
+PA_HAVE_FUNC(__builtin_bswap32, (0))
+PA_HAVE_FUNC(__builtin_bswap64, (0))
+PA_HAVE_FUNC(_byteswap_ushort, (0))
+PA_HAVE_FUNC(_byteswap_ulong, (0))
+PA_HAVE_FUNC(_byteswap_uint64, (0)))

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_flags_langlist.m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_func_attribute.m4 Added

@@ -0,0 +1,93 @@
+dnl --------------------------------------------------------------------------
+dnl PA_FUNC_ATTRIBUTE(attribute_name)
+dnl
+dnl See if this compiler supports the equivalent of a specific gcc
+dnl attribute on a function, using the __attribute__(()) syntax.
+dnl All arguments except the attribute name are optional.
+dnl
+dnl PA_FUNC_ATTRIBUTE(attribute, attribute_opts, return_type,
+dnl                   prototype_args, call_args, altname)
+dnl
+dnl This tests the attribute both on a function pointer and on a
+dnl direct function, as some gcc and others? versions have problems
+dnl with attributes on function pointers, and we might as well check both.
+dnl --------------------------------------------------------------------------
+AC_DEFUN(_PA_FUNC_ATTRIBUTE,
+m4_define(_pa_faa,ifelse($2,,,($2)))
+ m4_define(_pa_fam,ifelse($2,,,(m4_join(,,m4_for(_pa_n,1,m4_count($2),1,m4_quote(x_pa_n),)))))
+ m4_define(_pa_suf,ifelse($2,,,m4_count($2)))
+ m4_define(_pa_mac,ifelse($6,,$1_func_pa_suf,$6))
+ AC_MSG_CHECKING(if $CC supports the $1_pa_faa function attribute)
+ AC_COMPILE_IFELSE(AC_LANG_SOURCE(
+AC_INCLUDES_DEFAULT
+PA_ATTRIBUTE_SYNTAX
+
+extern ifelse($3,,void *,$3) ATTRIBUTE($1_pa_faa)
+  bar(ifelse($4,,int,$4));
+ifelse($3,,void *,$3) foo(void);
+ifelse($3,,void *,$3) foo(void)
+{
+	ifelse($3,void,,return)
+		bar(ifelse($5,,1,$5));
+}
+ ),
+ AC_MSG_RESULT(yes)
+  AC_DEFINE(PA_SYM(HAVE_FUNC_ATTRIBUTE,_pa_suf,_$1), 1,
+    Define to 1 if your compiler supports the $1 function attribute),
+ AC_MSG_RESULT(no))
+ AH_BOTTOM(m4_quote(m4_join(,
+ #ifndef ,_pa_mac,
+# ifdef ,PA_SYM(HAVE_FUNC_ATTRIBUTE,_pa_suf,_$1),
+#  define ,_pa_mac,m4_quote(_pa_fam), ATTRIBUTE($1,m4_quote(_pa_fam),)
+# else
+#  define ,_pa_mac,m4_quote(_pa_fam),
+# endif
+#endif)))
+)
+
+AC_DEFUN(_PA_FUNC_PTR_ATTRIBUTE,
+m4_define(_pa_faa,ifelse($2,,,($2)))
+ m4_define(_pa_fam,ifelse($2,,,(m4_join(,,m4_for(_pa_n,1,m4_count($2),1,m4_quote(x_pa_n),)))))
+ m4_define(_pa_suf,ifelse($2,,,m4_count($2)))
+ m4_define(_pa_mac,ifelse($6,,$1_func_pa_suf,$6)_ptr)
+ AC_MSG_CHECKING(if $CC supports the $1_pa_faa function attribute on pointers)
+ AC_COMPILE_IFELSE(AC_LANG_SOURCE(
+AC_INCLUDES_DEFAULT
+PA_ATTRIBUTE_SYNTAX
+
+extern ifelse($3,,void *,$3) ATTRIBUTE($1_pa_faa)
+  (*bar1)(ifelse($4,,int,$4));
+ifelse($3,,void *,$3) foo1(void);
+ifelse($3,,void *,$3) foo1(void)
+{
+	ifelse($3,void,,return)
+		bar1(ifelse($5,,1,$5));
+}
+
+typedef ifelse($3,,void *,$3) ATTRIBUTE($1_pa_faa)
+  (*bar_t)(ifelse($4,,int,$4));
+extern bar_t bar2;
+ifelse($3,,void *,$3) foo2(void);
+ifelse($3,,void *,$3) foo2(void)
+{
+	ifelse($3,void,,return)
+		bar2(ifelse($5,,1,$5));
+}
+ ),
+ AC_MSG_RESULT(yes)
+  AC_DEFINE(PA_SYM(HAVE_FUNC_PTR_ATTRIBUTE,_pa_suf,_$1), 1,
+    Define to 1 if your compiler supports the $1 attribute on function pointers),
+ AC_MSG_RESULT(no))
+ AH_BOTTOM(m4_quote(m4_join(,
+ #ifndef ,_pa_mac,
+# ifdef ,PA_SYM(HAVE_FUNC_PTR_ATTRIBUTE,_pa_suf,_$1),
+#  define ,_pa_mac,m4_quote(_pa_fam), ATTRIBUTE($1,m4_quote(_pa_fam),)
+# else
+#  define ,_pa_mac,m4_quote(_pa_fam),
+# endif
+#endif)))
+)
+
+AC_DEFUN(PA_FUNC_ATTRIBUTE,
+_PA_FUNC_ATTRIBUTE($1,$2,$3,$4,$5,$6)
+ _PA_FUNC_PTR_ATTRIBUTE($1,$2,$3,$4,$5,$6))

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_func_attribute_error.m4 Added

@@ -0,0 +1,31 @@
+dnl --------------------------------------------------------------------------
+dnl PA_FUNC_ATTRIBUTE_ERROR
+dnl
+dnl See if this compiler supports __attribute__((error("foo"))) *and*
+dnl does *not* error if the erroneous call is unreachable.
+dnl
+dnl The generic version of this doesn't work as it makes the compiler
+dnl throw an error by design.
+dnl
+dnl This doesn't use a function pointer because there is no need:
+dnl the error function will never be a function pointer.
+dnl --------------------------------------------------------------------------
+AC_DEFUN(PA_FUNC_ATTRIBUTE_ERROR,
+AC_MSG_CHECKING(if $CC supports the error function attribute)
+ AC_COMPILE_IFELSE(AC_LANG_SOURCE(
+AC_INCLUDES_DEFAULT
+PA_ATTRIBUTE_SYNTAX
+
+extern ATTRIBUTE(error("message")) void barf(void);
+void foo(void);
+void foo(void)
+{
+	if (0)
+		barf();
+}
+ ),
+ AC_MSG_RESULT(yes)
+  AC_DEFINE(HAVE_FUNC_ATTRIBUTE_ERROR, 1,
+ Define to 1 if your compiler supports the error attribute on functions),
+ AC_MSG_RESULT(no))
+)

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_func_snprintf.m4 Added

@@ -0,0 +1,39 @@
+dnl --------------------------------------------------------------------------
+dnl PA_FUNC_SNPRINTF
+dnl
+dnl See if we have _snprintf(), using the proper prototypes in case
+dnl it is a builtin of some kind.
+dnl --------------------------------------------------------------------------
+AC_DEFUN(PA_FUNC_SNPRINTF,
+AC_CACHE_CHECK(for sprintf, pa_cv_func_snprintf,
+ pa_cv_func_snprintf=no
+  for pa_try_func_snprintf in snprintf _snprintf
+  do
+  AS_IF(test $pa_cv_func_snprintf = no,
+        AC_LINK_IFELSE(AC_LANG_SOURCE(
+AC_INCLUDES_DEFAULT
+const char *snprintf_test(int x);
+const char *snprintf_test(int x)
+{
+    static char buf256;
+    size_t sz;
+    sz = $pa_try_func_snprintf(buf, sizeof buf, "Hello = %d", x);
+    return (sz < sizeof buf) ? buf : NULL;
+}
+
+int main(void) {
+    puts(snprintf_test(33));
+    return 0;
+}
+),
+ pa_cv_func_snprintf=$pa_try_func_snprintf))
+ done
+ )
+ AS_IF(test $pa_cv_func_snprintf = no,
+       ,
+       AC_DEFINE(HAVE_SNPRINTF, 1,
+         Define to 1 if you have some version of the snprintf function.)
+	 AS_IF(test $pa_cv_func_snprintf = snprintf,
+	       ,
+	       AC_DEFINE_UNQUOTED(snprintf, $pa_cv_func_snprintf,
+	         Define if your snprintf function is not named snprintf.))))

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_func_vsnprintf.m4 Added

@@ -0,0 +1,50 @@
+dnl --------------------------------------------------------------------------
+dnl PA_FUNC_VSNPRINTF
+dnl
+dnl See if we have _vsnprintf(), using the proper prototypes in case
+dnl it is a builtin of some kind.
+dnl --------------------------------------------------------------------------
+AC_DEFUN(PA_FUNC_VSNPRINTF,
+AC_CACHE_CHECK(for vsnprintf, pa_cv_func_vsnprintf,
+ pa_cv_func_vsnprintf=no
+  for pa_try_func_vsnprintf in vsnprintf _vsnprintf
+  do
+  AS_IF(test $pa_cv_func_vsnprintf = no,
+        AC_LINK_IFELSE(AC_LANG_SOURCE(
+AC_INCLUDES_DEFAULT
+const char *vsnprintf_test(const char *fmt, va_list va);
+const char *vsnprintf_test(const char *fmt, va_list va)
+{
+    static char buf256;
+    size_t sz;
+    sz = $pa_try_func_vsnprintf(buf, sizeof buf, fmt, va);
+    return (sz < sizeof buf) ? buf : NULL;
+}
+
+const char *vsnprintf_caller(const char *fmt, ...);
+const char *vsnprintf_caller(const char *fmt, ...)
+{
+    const char *what;
+    va_list va;
+    va_start(va, fmt);
+    what = vsnprintf_test(fmt, va);
+    va_end(va);
+    return what;
+}
+
+int main(void) {
+    puts(vsnprintf_caller("Hello = %d", 33));
+    return 0;
+}
+),
+ pa_cv_func_vsnprintf=$pa_try_func_vsnprintf))
+ done
+ )
+ AS_IF(test $pa_cv_func_vsnprintf = no,
+       ,
+       AC_DEFINE(HAVE_VSNPRINTF, 1,
+         Define to 1 if you have some version of the vsnprintf function.)
+	 AS_IF(test $pa_cv_func_vsnprintf = vsnprintf,
+	       ,
+	       AC_DEFINE_UNQUOTED(vsnprintf, $pa_cv_func_vsnprintf,
+	         Define if your vsnprintf function is not named vsnprintf.))))

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_have_func.m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_lang_foreach.m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_lang_seen_list.m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_libext.m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_option_debug.m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_option_gc.m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_option_lto.m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_option_profiling.m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_option_sanitizer.m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_prog_cc.m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_sym.m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/m4/pa_variadic_macros.m4 Added

_service:tar_scm:nasm-2.16.03.tar.xz/autoconf/unconfig.pl Added

_service:tar_scm:nasm-2.16.03.tar.xz/autogen.sh Added

@@ -0,0 +1,83 @@
+#!/bin/sh -x
+#
+# Run this script to regenerate autoconf files
+#
+recheck=false
+for arg; do
+    case x"$arg" in
+	x--recheck)
+	    recheck=true
+	    config=$(sh config.status --config 2>/dev/null)
+	    ;;
+	x--clearenv)
+	    unset AUTOCONF AUTOMAKE ACLOCAL AUTOHEADER ACLOCAL_PATH
+	    ;;
+	*)
+	    echo "$0: unknown option: $arg" 1>&2
+	    ;;
+    esac
+done
+
+# This allows for overriding the default autoconf programs
+AUTOCONF="${AUTOCONF:-${AUTOTOOLS_PREFIX}autoconf}"
+AUTOMAKE="${AUTOMAKE:-${AUTOTOOLS_PREFIX}automake}"
+ACLOCAL="${ACLOCAL:-${AUTOTOOLS_PREFIX}aclocal}"
+AUTOHEADER="${AUTOHEADER:-${AUTOTOOLS_PREFIX}autoheader}"
+
+mkdir -p autoconf autoconf/helpers config
+autolib="`"$AUTOMAKE" --print-libdir`"
+if test ! x"$autolib" = x; then
+    for prg in install-sh compile config.guess config.sub; do
+	# Update autoconf helpers if and only if newer ones are available
+	if test -f "$autolib"/"$prg" && \
+		( set -e ; \
+		  test -f autoconf/helpers/"$prg" && sed -n \
+		    -e 's/^scriptver=/scriptversion=/' \
+		    -e 's/^timestamp=/scriptversion=/' \
+		    -e 's/^scriptversion='\''"?$^'\''"*$.*$/\1/p' \
+			  "$autolib"/"$prg" autoconf/helpers/"$prg" | \
+			  sort -c 2>/dev/null ; \
+		  test $? -ne 0 )
+	then
+	    cp -f "$autolib"/"$prg" autoconf/helpers
+	fi
+    done
+fi
+mv -f autoconf/aclocal.m4 autoconf/aclocal.m4.old
+mkdir -p autoconf/m4.old autoconf/m4
+mv -f autoconf/m4/*.m4 autoconf/m4.old/ 2>/dev/null || true
+ACLOCAL_PATH="${ACLOCAL_PATH}${ACLOCAL_PATH:+:}`pwd`/autoconf/m4.old"
+export ACLOCAL_PATH
+"$ACLOCAL" --install --output=autoconf/aclocal.m4 -I autoconf/m4
+if test ! -f autoconf/aclocal.m4; then
+    # aclocal failed, revert to previous files
+    mv -f autoconf/m4.old/*.m4 autoconf/m4/
+    mv -f autoconf/aclocal.m4.old autoconf/aclocal.m4
+    exit 1
+fi
+rm -rf autoconf/*m4.old
+"$AUTOHEADER" -B autoconf
+"$AUTOCONF" -B autoconf
+(
+    echo '#!/bin/sh'
+    "$AUTOCONF" -B autoconf \
+		-t AC_CONFIG_HEADERS:'rm -f $*' \
+		-t AC_CONFIG_FILES:'rm -f $*'
+    echo 'rm -f config.log config.status'
+    echo 'rm -rf autom4te.cache'
+) > autoconf/clean.sh
+chmod +x autoconf/clean.sh
+sh autoconf/clean.sh
+
+rm -f configure~ || true
+
+# Try to regenerate unconfig.h if Perl is available and unconfig.pl
+# is present in the autoconf directory.
+if  -n "$(which perl)" -a -f autoconf/unconfig.pl ; then
+    perl autoconf/unconfig.pl . config/config.h.in config/unconfig.h
+fi
+
+if $recheck; then
+    # This bizarre statement has to do with how config.status quotes its output
+    echo exec sh configure $config | sh -
+fi

_service:tar_scm:nasm-2.16.03.tar.xz/common Added

_service:tar_scm:nasm-2.16.03.tar.xz/common/common.c Added

@@ -0,0 +1,65 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2021 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * common.c - code common to nasm and ndisasm
+ */
+
+#include "compiler.h"
+#include "nasm.h"
+#include "nasmlib.h"
+#include "insns.h"
+
+/*
+ * The current bit size of the CPU
+ */
+int globalbits = 0;
+/*
+ * Common list of prefix names; ideally should be auto-generated
+ * from tokens.dat. This MUST match the enum in include/nasm.h.
+ */
+const char *prefix_name(int token)
+{
+    static const char *prefix_names = {
+        "a16", "a32", "a64", "asp", "lock", "o16", "o32", "o64", "osp",
+        "rep", "repe", "repne", "repnz", "repz", "times", "wait",
+        "xacquire", "xrelease", "bnd", "nobnd", "{rex}", "{evex}", "{vex}",
+        "{vex3}", "{vex2}"
+    };
+    unsigned int prefix = token-PREFIX_ENUM_START;
+
+    if (prefix >= ARRAY_SIZE(prefix_names))
+	return NULL;
+
+    return prefix_namesprefix;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/config Added

_service:tar_scm:nasm-2.16.03.tar.xz/config/config.h.in Added

@@ -0,0 +1,912 @@
+/* config/config.h.in.  Generated from configure.ac by autoheader.  */
+
+/* Define to 1 to call abort() on panics (internal errors), for debugging. */
+#undef ABORT_ON_PANIC
+
+/* Define if building universal (internal helper macro) */
+#undef AC_APPLE_UNIVERSAL_BUILD
+
+/* Define to 1 if compiled with the -fdata-sections compiler flag */
+#undef CFLAGS_FDATA_SECTIONS
+
+/* Define to 1 if compiled with the -ffat-lto-objects compiler flag */
+#undef CFLAGS_FFAT_LTO_OBJECTS
+
+/* Define to 1 if compiled with the -ffunction-sections compiler flag */
+#undef CFLAGS_FFUNCTION_SECTIONS
+
+/* Define to 1 if compiled with the -fgnu89-inline compiler flag */
+#undef CFLAGS_FGNU89_INLINE
+
+/* Define to 1 if compiled with the -flto compiler flag */
+#undef CFLAGS_FLTO
+
+/* Define to 1 if compiled with the -flto=auto compiler flag */
+#undef CFLAGS_FLTO_AUTO
+
+/* Define to 1 if compiled with the -fno-common compiler flag */
+#undef CFLAGS_FNO_COMMON
+
+/* Define to 1 if compiled with the -fno-omit-frame-pointer compiler flag */
+#undef CFLAGS_FNO_OMIT_FRAME_POINTER
+
+/* Define to 1 if compiled with the -fsanitize=address compiler flag */
+#undef CFLAGS_FSANITIZE_ADDRESS
+
+/* Define to 1 if compiled with the -fsanitize=undefined compiler flag */
+#undef CFLAGS_FSANITIZE_UNDEFINED
+
+/* Define to 1 if compiled with the -ftrivial-auto-var-init=zero compiler flag
+   */
+#undef CFLAGS_FTRIVIAL_AUTO_VAR_INIT_ZERO
+
+/* Define to 1 if compiled with the -fvisibility=hidden compiler flag */
+#undef CFLAGS_FVISIBILITY_HIDDEN
+
+/* Define to 1 if compiled with the -fwrapv compiler flag */
+#undef CFLAGS_FWRAPV
+
+/* Define to 1 if compiled with the -g3 compiler flag */
+#undef CFLAGS_G3
+
+/* Define to 1 if compiled with the -ggdb3 compiler flag */
+#undef CFLAGS_GGDB3
+
+/* Define to 1 if compiled with the -O0 compiler flag */
+#undef CFLAGS_O0
+
+/* Define to 1 if compiled with the -Og compiler flag */
+#undef CFLAGS_OG
+
+/* Define to 1 if compiled with the -pedantic compiler flag */
+#undef CFLAGS_PEDANTIC
+
+/* Define to 1 if compiled with the -pg compiler flag */
+#undef CFLAGS_PG
+
+/* Define to 1 if compiled with the -U__STRICT_ANSI__ compiler flag */
+#undef CFLAGS_U_STRICT_ANSI
+
+/* Define to 1 if compiled with the -W compiler flag */
+#undef CFLAGS_W
+
+/* Define to 1 if compiled with the -Wall compiler flag */
+#undef CFLAGS_WALL
+
+/* Define to 1 if compiled with the -Werror compiler flag */
+#undef CFLAGS_WERROR
+
+/* Define to 1 if compiled with the -Werror=comment compiler flag */
+#undef CFLAGS_WERROR_COMMENT
+
+/* Define to 1 if compiled with the -Werror=implicit compiler flag */
+#undef CFLAGS_WERROR_IMPLICIT
+
+/* Define to 1 if compiled with the -Werror=missing-braces compiler flag */
+#undef CFLAGS_WERROR_MISSING_BRACES
+
+/* Define to 1 if compiled with the -Werror=missing-declarations compiler flag
+   */
+#undef CFLAGS_WERROR_MISSING_DECLARATIONS
+
+/* Define to 1 if compiled with the -Werror=missing-prototypes compiler flag
+   */
+#undef CFLAGS_WERROR_MISSING_PROTOTYPES
+
+/* Define to 1 if compiled with the -Werror=pointer-arith compiler flag */
+#undef CFLAGS_WERROR_POINTER_ARITH
+
+/* Define to 1 if compiled with the -Werror=return-type compiler flag */
+#undef CFLAGS_WERROR_RETURN_TYPE
+
+/* Define to 1 if compiled with the -Werror=strict-prototypes compiler flag */
+#undef CFLAGS_WERROR_STRICT_PROTOTYPES
+
+/* Define to 1 if compiled with the -Werror=trigraphs compiler flag */
+#undef CFLAGS_WERROR_TRIGRAPHS
+
+/* Define to 1 if compiled with the -Werror=unknown-warning-option compiler
+   flag */
+#undef CFLAGS_WERROR_UNKNOWN_WARNING_OPTION
+
+/* Define to 1 if compiled with the -Werror=vla compiler flag */
+#undef CFLAGS_WERROR_VLA
+
+/* Define to 1 if compiled with the -Wno-long-long compiler flag */
+#undef CFLAGS_WNO_LONG_LONG
+
+/* Define to 1 if compiled with the -Wno-pedantic-ms-format compiler flag */
+#undef CFLAGS_WNO_PEDANTIC_MS_FORMAT
+
+/* Define to 1 if compiled with the -Wno-shift-negative-value compiler flag */
+#undef CFLAGS_WNO_SHIFT_NEGATIVE_VALUE
+
+/* Define to 1 if compiled with the -Wno-stringop-truncation compiler flag */
+#undef CFLAGS_WNO_STRINGOP_TRUNCATION
+
+/* Define to 1 if compiled with the -Wno-variadic-macros compiler flag */
+#undef CFLAGS_WNO_VARIADIC_MACROS
+
+/* Define to 1 if compiled with the -Wsuggest-attribute=cold compiler flag */
+#undef CFLAGS_WSUGGEST_ATTRIBUTE_COLD
+
+/* Define to 1 if compiled with the -Wsuggest-attribute=const compiler flag */
+#undef CFLAGS_WSUGGEST_ATTRIBUTE_CONST
+
+/* Define to 1 if compiled with the -Wsuggest-attribute=format compiler flag
+   */
+#undef CFLAGS_WSUGGEST_ATTRIBUTE_FORMAT
+
+/* Define to 1 if compiled with the -Wsuggest-attribute=malloc compiler flag
+   */
+#undef CFLAGS_WSUGGEST_ATTRIBUTE_MALLOC
+
+/* Define to 1 if compiled with the -Wsuggest-attribute=noreturn compiler flag
+   */
+#undef CFLAGS_WSUGGEST_ATTRIBUTE_NORETURN
+
+/* Define to 1 if compiled with the -Wsuggest-attribute=pure compiler flag */
+#undef CFLAGS_WSUGGEST_ATTRIBUTE_PURE
+
+/* Define to 1 if compiled with the -std=c11 compiler flag */
+#undef CPPFLAGS_STD_C11
+
+/* Define to 1 if compiled with the -std=c17 compiler flag */
+#undef CPPFLAGS_STD_C17
+
+/* Define to 1 if compiled with the -std=c99 compiler flag */
+#undef CPPFLAGS_STD_C99
+
+/* Define to 1 if compiled with the -Werror=attributes compiler flag */
+#undef CPPFLAGS_WERROR_ATTRIBUTES
+
+/* Define to 1 if you have the `access' function. */
+#undef HAVE_ACCESS
+
+/* Define to 1 if you have the `canonicalize_file_name' function. */
+#undef HAVE_CANONICALIZE_FILE_NAME
+
+/* Define to 1 if you have the `cpu_to_le16' intrinsic function. */
+#undef HAVE_CPU_TO_LE16
+
+/* Define to 1 if you have the `cpu_to_le32' intrinsic function. */
+#undef HAVE_CPU_TO_LE32
+
+/* Define to 1 if you have the `cpu_to_le64' intrinsic function. */
+#undef HAVE_CPU_TO_LE64
+
+/* Define to 1 if you have the declaration of `strcasecmp', and to 0 if you
+   don't. */
+#undef HAVE_DECL_STRCASECMP
+
+/* Define to 1 if you have the declaration of `stricmp', and to 0 if you
+   don't. */
+#undef HAVE_DECL_STRICMP
+
+/* Define to 1 if you have the declaration of `strlcpy', and to 0 if you
+   don't. */
+#undef HAVE_DECL_STRLCPY
+
+/* Define to 1 if you have the declaration of `strncasecmp', and to 0 if you
+   don't. */
+#undef HAVE_DECL_STRNCASECMP
+
+/* Define to 1 if you have the declaration of `strnicmp', and to 0 if you
+   don't. */
+#undef HAVE_DECL_STRNICMP
+
+/* Define to 1 if you have the declaration of `strnlen', and to 0 if you
+   don't. */
+#undef HAVE_DECL_STRNLEN
+
+/* Define to 1 if you have the declaration of `strrchrnul', and to 0 if you
+   don't. */
+#undef HAVE_DECL_STRRCHRNUL
+
+/* Define to 1 if you have the declaration of `strsep', and to 0 if you don't.
+   */
+#undef HAVE_DECL_STRSEP
+
+/* Define to 1 if you have the <endian.h> header file. */
+#undef HAVE_ENDIAN_H
+
+/* Define to 1 if you have the `faccessat' function. */
+#undef HAVE_FACCESSAT
+
+/* Define to 1 if you have the <fcntl.h> header file. */
+#undef HAVE_FCNTL_H
+
+/* Define to 1 if you have the `fileno' function. */
+#undef HAVE_FILENO
+
+/* Define to 1 if fseeko (and presumably ftello) exists and is declared. */
+#undef HAVE_FSEEKO
+
+/* Define to 1 if you have the `fstat' function. */
+#undef HAVE_FSTAT
+
+/* Define to 1 if you have the `ftruncate' function. */
+#undef HAVE_FTRUNCATE
+
+/* Define to 1 if your compiler supports the alloc_size function attribute */
+#undef HAVE_FUNC_ATTRIBUTE1_ALLOC_SIZE
+
+/* Define to 1 if your compiler supports the alloc_size function attribute */
+#undef HAVE_FUNC_ATTRIBUTE2_ALLOC_SIZE
+
+/* Define to 1 if your compiler supports the format function attribute */
+#undef HAVE_FUNC_ATTRIBUTE3_FORMAT
+
+/* Define to 1 if your compiler supports the cold function attribute */
+#undef HAVE_FUNC_ATTRIBUTE_COLD
+
+/* Define to 1 if your compiler supports the const function attribute */
+#undef HAVE_FUNC_ATTRIBUTE_CONST
+
+/* Define to 1 if your compiler supports the error attribute on functions */
+#undef HAVE_FUNC_ATTRIBUTE_ERROR
+
+/* Define to 1 if your compiler supports the malloc function attribute */
+#undef HAVE_FUNC_ATTRIBUTE_MALLOC
+
+/* Define to 1 if your compiler supports the noreturn function attribute */
+#undef HAVE_FUNC_ATTRIBUTE_NORETURN
+
+/* Define to 1 if your compiler supports the pure function attribute */
+#undef HAVE_FUNC_ATTRIBUTE_PURE
+
+/* Define to 1 if your compiler supports the returns_nonnull function
+   attribute */
+#undef HAVE_FUNC_ATTRIBUTE_RETURNS_NONNULL
+
+/* Define to 1 if your compiler supports the sentinel function attribute */
+#undef HAVE_FUNC_ATTRIBUTE_SENTINEL
+
+/* Define to 1 if your compiler supports the unused function attribute */
+#undef HAVE_FUNC_ATTRIBUTE_UNUSED
+
+/* Define to 1 if your compiler supports the alloc_size attribute on function
+   pointers */
+#undef HAVE_FUNC_PTR_ATTRIBUTE1_ALLOC_SIZE
+
+/* Define to 1 if your compiler supports the alloc_size attribute on function
+   pointers */
+#undef HAVE_FUNC_PTR_ATTRIBUTE2_ALLOC_SIZE
+
+/* Define to 1 if your compiler supports the format attribute on function
+   pointers */
+#undef HAVE_FUNC_PTR_ATTRIBUTE3_FORMAT
+
+/* Define to 1 if your compiler supports the cold attribute on function
+   pointers */
+#undef HAVE_FUNC_PTR_ATTRIBUTE_COLD
+
+/* Define to 1 if your compiler supports the const attribute on function
+   pointers */
+#undef HAVE_FUNC_PTR_ATTRIBUTE_CONST
+
+/* Define to 1 if your compiler supports the malloc attribute on function
+   pointers */
+#undef HAVE_FUNC_PTR_ATTRIBUTE_MALLOC
+
+/* Define to 1 if your compiler supports the noreturn attribute on function
+   pointers */
+#undef HAVE_FUNC_PTR_ATTRIBUTE_NORETURN
+
+/* Define to 1 if your compiler supports the pure attribute on function
+   pointers */
+#undef HAVE_FUNC_PTR_ATTRIBUTE_PURE
+
+/* Define to 1 if your compiler supports the returns_nonnull attribute on
+   function pointers */
+#undef HAVE_FUNC_PTR_ATTRIBUTE_RETURNS_NONNULL
+
+/* Define to 1 if your compiler supports the sentinel attribute on function
+   pointers */
+#undef HAVE_FUNC_PTR_ATTRIBUTE_SENTINEL
+
+/* Define to 1 if your compiler supports the unused attribute on function
+   pointers */
+#undef HAVE_FUNC_PTR_ATTRIBUTE_UNUSED
+
+/* Define to 1 if you have the `getgid' function. */
+#undef HAVE_GETGID
+
+/* Define to 1 if you have the `getpagesize' function. */
+#undef HAVE_GETPAGESIZE
+
+/* Define to 1 if you have the `getrlimit' function. */
+#undef HAVE_GETRLIMIT
+
+/* Define to 1 if you have the `getuid' function. */
+#undef HAVE_GETUID
+
+/* Define to 1 if you have the `htole16' intrinsic function. */
+#undef HAVE_HTOLE16
+
+/* Define to 1 if you have the `htole32' intrinsic function. */
+#undef HAVE_HTOLE32
+
+/* Define to 1 if you have the `htole64' intrinsic function. */
+#undef HAVE_HTOLE64
+
+/* Define to 1 if you have the <intrin.h> header file. */
+#undef HAVE_INTRIN_H
+
+/* Define to 1 if you have the <inttypes.h> header file. */
+#undef HAVE_INTTYPES_H
+
+/* Define to 1 if you have the <io.h> header file. */
+#undef HAVE_IO_H
+
+/* Define to 1 if you have the `isascii' function. */
+#undef HAVE_ISASCII
+
+/* Define to 1 if you have the `iscntrl' function. */
+#undef HAVE_ISCNTRL
+
+/* Define to 1 if you have the <machine/endian.h> header file. */
+#undef HAVE_MACHINE_ENDIAN_H
+
+/* Define to 1 if you have the `mempcpy' function. */
+#undef HAVE_MEMPCPY
+
+/* Define to 1 if you have the `mempset' function. */
+#undef HAVE_MEMPSET
+
+/* Define to 1 if you have the <minix/config.h> header file. */
+#undef HAVE_MINIX_CONFIG_H
+
+/* Define to 1 if you have a working `mmap' system call. */
+#undef HAVE_MMAP
+
+/* Define to 1 if you have the `pathconf' function. */
+#undef HAVE_PATHCONF
+
+/* Define to 1 if you have the `realpath' function. */
+#undef HAVE_REALPATH
+
+/* Define to 1 if you have some version of the snprintf function. */
+#undef HAVE_SNPRINTF
+
+/* Define to 1 if you have the `stat' function. */
+#undef HAVE_STAT
+
+/* Define to 1 if you have the <stdarg.h> header file. */
+#undef HAVE_STDARG_H
+
+/* Define to 1 if stdbool.h conforms to C99. */
+#undef HAVE_STDBOOL_H
+
+/* Define to 1 if your compiler supports C99 extern inline */
+#undef HAVE_STDC_INLINE
+
+/* Define to 1 if you have the <stdint.h> header file. */
+#undef HAVE_STDINT_H
+
+/* Define to 1 if you have the <stdio.h> header file. */
+#undef HAVE_STDIO_H
+
+/* Define to 1 if you have the <stdlib.h> header file. */
+#undef HAVE_STDLIB_H
+
+/* Define to 1 if you have the <stdnoreturn.h> header file. */
+#undef HAVE_STDNORETURN_H
+
+/* Define to 1 if you have the `strcasecmp' function. */
+#undef HAVE_STRCASECMP
+
+/* Define to 1 if you have the `stricmp' function. */
+#undef HAVE_STRICMP
+
+/* Define to 1 if you have the <strings.h> header file. */
+#undef HAVE_STRINGS_H
+
+/* Define to 1 if you have the <string.h> header file. */
+#undef HAVE_STRING_H
+
+/* Define to 1 if you have the `strlcpy' function. */
+#undef HAVE_STRLCPY
+
+/* Define to 1 if you have the `strncasecmp' function. */
+#undef HAVE_STRNCASECMP
+
+/* Define to 1 if you have the `strnicmp' function. */
+#undef HAVE_STRNICMP
+
+/* Define to 1 if you have the `strnlen' function. */
+#undef HAVE_STRNLEN
+
+/* Define to 1 if you have the `strrchrnul' function. */
+#undef HAVE_STRRCHRNUL
+
+/* Define to 1 if you have the `strsep' function. */
+#undef HAVE_STRSEP
+
+/* Define to 1 if the system has the type `struct stat'. */
+#undef HAVE_STRUCT_STAT
+
+/* Define to 1 if the system has the type `struct _stati64'. */
+#undef HAVE_STRUCT__STATI64
+
+/* Define to 1 if you have the `sysconf' function. */
+#undef HAVE_SYSCONF
+
+/* Define to 1 if you have the <sys/endian.h> header file. */
+#undef HAVE_SYS_ENDIAN_H
+
+/* Define to 1 if you have the <sys/mman.h> header file. */
+#undef HAVE_SYS_MMAN_H
+
+/* Define to 1 if you have the <sys/param.h> header file. */
+#undef HAVE_SYS_PARAM_H
+
+/* Define to 1 if you have the <sys/resource.h> header file. */
+#undef HAVE_SYS_RESOURCE_H
+
+/* Define to 1 if you have the <sys/stat.h> header file. */
+#undef HAVE_SYS_STAT_H
+
+/* Define to 1 if you have the <sys/types.h> header file. */
+#undef HAVE_SYS_TYPES_H
+
+/* Define to 1 if you have the `S_ISREG' function. */
+#undef HAVE_S_ISREG
+
+/* Define to 1 if you have some version of the typeof operator. */
+#undef HAVE_TYPEOF
+
+/* Define to 1 if the system has the type `uintptr_t'. */
+#undef HAVE_UINTPTR_T
+
+/* Define to 1 if you have the <unistd.h> header file. */
+#undef HAVE_UNISTD_H
+
+/* define to 1 if your compiler supports C99 __VA_ARGS__ variadic macros. */
+#undef HAVE_VARIADIC_MACROS
+
+/* Define to 1 if you have some version of the vsnprintf function. */
+#undef HAVE_VSNPRINTF
+
+/* Define to 1 if you have the <wchar.h> header file. */
+#undef HAVE_WCHAR_H
+
+/* Define to 1 if you have the `_access' function. */
+#undef HAVE__ACCESS
+
+/* Define to 1 if you have the `_BitScanReverse' intrinsic function. */
+#undef HAVE__BITSCANREVERSE
+
+/* Define to 1 if you have the `_BitScanReverse64' intrinsic function. */
+#undef HAVE__BITSCANREVERSE64
+
+/* Define to 1 if the system has the type `_Bool'. */
+#undef HAVE__BOOL
+
+/* Define to 1 if you have the `_byteswap_uint64' intrinsic function. */
+#undef HAVE__BYTESWAP_UINT64
+
+/* Define to 1 if you have the `_byteswap_ulong' intrinsic function. */
+#undef HAVE__BYTESWAP_ULONG
+
+/* Define to 1 if you have the `_byteswap_ushort' intrinsic function. */
+#undef HAVE__BYTESWAP_USHORT
+
+/* Define to 1 if you have the `_chsize' function. */
+#undef HAVE__CHSIZE
+
+/* Define to 1 if you have the `_chsize_s' function. */
+#undef HAVE__CHSIZE_S
+
+/* Define to 1 if you have the `_fileno' function. */
+#undef HAVE__FILENO
+
+/* Define to 1 if you have the `_fseeki64' function. */
+#undef HAVE__FSEEKI64
+
+/* Define to 1 if you have the `_fstati64' function. */
+#undef HAVE__FSTATI64
+
+/* Define to 1 if you have the `_fullpath' function. */
+#undef HAVE__FULLPATH
+
+/* Define to 1 if you have the `_stati64' function. */
+#undef HAVE__STATI64
+
+/* Define to 1 if you have the `__bswap_16' intrinsic function. */
+#undef HAVE___BSWAP_16
+
+/* Define to 1 if you have the `__bswap_32' intrinsic function. */
+#undef HAVE___BSWAP_32
+
+/* Define to 1 if you have the `__bswap_64' intrinsic function. */
+#undef HAVE___BSWAP_64
+
+/* Define to 1 if you have the `__builtin_bswap16' intrinsic function. */
+#undef HAVE___BUILTIN_BSWAP16
+
+/* Define to 1 if you have the `__builtin_bswap32' intrinsic function. */
+#undef HAVE___BUILTIN_BSWAP32
+
+/* Define to 1 if you have the `__builtin_bswap64' intrinsic function. */
+#undef HAVE___BUILTIN_BSWAP64
+
+/* Define to 1 if you have the `__builtin_choose_expr' intrinsic function. */
+#undef HAVE___BUILTIN_CHOOSE_EXPR
+
+/* Define to 1 if you have the `__builtin_clz' intrinsic function. */
+#undef HAVE___BUILTIN_CLZ
+
+/* Define to 1 if you have the `__builtin_clzl' intrinsic function. */
+#undef HAVE___BUILTIN_CLZL
+
+/* Define to 1 if you have the `__builtin_clzll' intrinsic function. */
+#undef HAVE___BUILTIN_CLZLL
+
+/* Define to 1 if you have the `__builtin_constant_p' intrinsic function. */
+#undef HAVE___BUILTIN_CONSTANT_P
+
+/* Define to 1 if you have the `__builtin_expect' intrinsic function. */
+#undef HAVE___BUILTIN_EXPECT
+
+/* Define to 1 if you have the `__cpu_to_le16' intrinsic function. */
+#undef HAVE___CPU_TO_LE16
+
+/* Define to 1 if you have the `__cpu_to_le32' intrinsic function. */
+#undef HAVE___CPU_TO_LE32
+
+/* Define to 1 if you have the `__cpu_to_le64' intrinsic function. */
+#undef HAVE___CPU_TO_LE64
+
+/* Define to 1 if compiled with the -Wl */
+#undef LDFLAGS_WL_AS_NEEDED
+
+/* Define to 1 if compiled with the -Wl */
+#undef LDFLAGS_WL_GC_SECTIONS
+
+/* Define to the address where bug reports for this package should be sent. */
+#undef PACKAGE_BUGREPORT
+
+/* Define to the full name of this package. */
+#undef PACKAGE_NAME
+
+/* Define to the full name and version of this package. */
+#undef PACKAGE_STRING
+
+/* Define to the one symbol short name of this package. */
+#undef PACKAGE_TARNAME
+
+/* Define to the home page for this package. */
+#undef PACKAGE_URL
+
+/* Define to the version of this package. */
+#undef PACKAGE_VERSION
+
+/* Define to 1 if all of the C90 standard headers exist (not just the ones
+   required in a freestanding environment). This macro is provided for
+   backward compatibility; new code need not use it. */
+#undef STDC_HEADERS
+
+/* Enable extensions on AIX 3, Interix.  */
+#ifndef _ALL_SOURCE
+# undef _ALL_SOURCE
+#endif
+/* Enable general extensions on macOS.  */
+#ifndef _DARWIN_C_SOURCE
+# undef _DARWIN_C_SOURCE
+#endif
+/* Enable general extensions on Solaris.  */
+#ifndef __EXTENSIONS__
+# undef __EXTENSIONS__
+#endif
+/* Enable GNU extensions on systems that have them.  */
+#ifndef _GNU_SOURCE
+# undef _GNU_SOURCE
+#endif
+/* Enable X/Open compliant socket functions that do not require linking
+   with -lxnet on HP-UX 11.11.  */
+#ifndef _HPUX_ALT_XOPEN_SOCKET_API
+# undef _HPUX_ALT_XOPEN_SOCKET_API
+#endif
+/* Identify the host operating system as Minix.
+   This macro does not affect the system headers' behavior.
+   A future release of Autoconf may stop defining this macro.  */
+#ifndef _MINIX
+# undef _MINIX
+#endif
+/* Enable general extensions on NetBSD.
+   Enable NetBSD compatibility extensions on Minix.  */
+#ifndef _NETBSD_SOURCE
+# undef _NETBSD_SOURCE
+#endif
+/* Enable OpenBSD compatibility extensions on NetBSD.
+   Oddly enough, this does nothing on OpenBSD.  */
+#ifndef _OPENBSD_SOURCE
+# undef _OPENBSD_SOURCE
+#endif
+/* Define to 1 if needed for POSIX-compatible behavior.  */
+#ifndef _POSIX_SOURCE
+# undef _POSIX_SOURCE
+#endif
+/* Define to 2 if needed for POSIX-compatible behavior.  */
+#ifndef _POSIX_1_SOURCE
+# undef _POSIX_1_SOURCE
+#endif
+/* Enable POSIX-compatible threading on Solaris.  */
+#ifndef _POSIX_PTHREAD_SEMANTICS
+# undef _POSIX_PTHREAD_SEMANTICS
+#endif
+/* Enable extensions specified by ISO/IEC TS 18661-5:2014.  */
+#ifndef __STDC_WANT_IEC_60559_ATTRIBS_EXT__
+# undef __STDC_WANT_IEC_60559_ATTRIBS_EXT__
+#endif
+/* Enable extensions specified by ISO/IEC TS 18661-1:2014.  */
+#ifndef __STDC_WANT_IEC_60559_BFP_EXT__
+# undef __STDC_WANT_IEC_60559_BFP_EXT__
+#endif
+/* Enable extensions specified by ISO/IEC TS 18661-2:2015.  */
+#ifndef __STDC_WANT_IEC_60559_DFP_EXT__
+# undef __STDC_WANT_IEC_60559_DFP_EXT__
+#endif
+/* Enable extensions specified by ISO/IEC TS 18661-4:2015.  */
+#ifndef __STDC_WANT_IEC_60559_FUNCS_EXT__
+# undef __STDC_WANT_IEC_60559_FUNCS_EXT__
+#endif
+/* Enable extensions specified by ISO/IEC TS 18661-3:2015.  */
+#ifndef __STDC_WANT_IEC_60559_TYPES_EXT__
+# undef __STDC_WANT_IEC_60559_TYPES_EXT__
+#endif
+/* Enable extensions specified by ISO/IEC TR 24731-2:2010.  */
+#ifndef __STDC_WANT_LIB_EXT2__
+# undef __STDC_WANT_LIB_EXT2__
+#endif
+/* Enable extensions specified by ISO/IEC 24747:2009.  */
+#ifndef __STDC_WANT_MATH_SPEC_FUNCS__
+# undef __STDC_WANT_MATH_SPEC_FUNCS__
+#endif
+/* Enable extensions on HP NonStop.  */
+#ifndef _TANDEM_SOURCE
+# undef _TANDEM_SOURCE
+#endif
+/* Enable X/Open extensions.  Define to 500 only if necessary
+   to make mbstate_t available.  */
+#ifndef _XOPEN_SOURCE
+# undef _XOPEN_SOURCE
+#endif
+
+
+/* Define to 1 if your processor stores words with the most significant byte
+   first (like Motorola and SPARC, unlike Intel and VAX). */
+#undef WORDS_BIGENDIAN
+
+/* Define to 1 if your processor stores words with the least significant byte
+   first (like Intel and VAX, unlike Motorola and SPARC). */
+#undef WORDS_LITTLEENDIAN
+
+/* Number of bits in a file offset, on hosts where this is settable. */
+#undef _FILE_OFFSET_BITS
+
+/* Define to 1 to make fseeko visible on some hosts (e.g. glibc 2.2). */
+#undef _LARGEFILE_SOURCE
+
+/* Define for large files, on AIX-style hosts. */
+#undef _LARGE_FILES
+
+/* Define to empty if `const' does not conform to ANSI C. */
+#undef const
+
+/* Define to `__inline__' or `__inline' if that's what the C compiler
+   calls it, or to nothing if 'inline' is not supported under any name.  */
+#ifndef __cplusplus
+#undef inline
+#endif
+
+/* Define to the equivalent of the C99 'restrict' keyword, or to
+   nothing if this is not supported.  Do not define if restrict is
+   supported only directly.  */
+#undef restrict
+/* Work around a bug in older versions of Sun C++, which did not
+   #define __restrict__ or support _Restrict or __restrict__
+   even though the corresponding Sun C compiler ended up with
+   "#define restrict _Restrict" or "#define restrict __restrict__"
+   in the previous line.  This workaround can be removed once
+   we assume Oracle Developer Studio 12.5 (2016) or later.  */
+#if defined __SUNPRO_CC && !defined __RESTRICT && !defined __restrict__
+# define _Restrict
+# define __restrict__
+#endif
+
+/* Define to `unsigned int' if <sys/types.h> does not define. */
+#undef size_t
+
+/* Define if your snprintf function is not named snprintf. */
+#undef snprintf
+
+/* Define if your typeof operator is not named `typeof'. */
+#undef typeof
+
+/* Define to the type of an unsigned integer type wide enough to hold a
+   pointer, if such a type exists, and if the system does not define it. */
+#undef uintptr_t
+
+/* Define if your vsnprintf function is not named vsnprintf. */
+#undef vsnprintf
+
+
+/* Begin unconfig.h */
+
+#ifndef alloc_size_func2
+# ifdef HAVE_FUNC_ATTRIBUTE2_ALLOC_SIZE
+#  define alloc_size_func2(x1,x2) ATTRIBUTE(alloc_size(x1,x2))
+# else
+#  define alloc_size_func2(x1,x2)
+# endif
+#endif
+
+#ifndef alloc_size_func2_ptr
+# ifdef HAVE_FUNC_PTR_ATTRIBUTE2_ALLOC_SIZE
+#  define alloc_size_func2_ptr(x1,x2) ATTRIBUTE(alloc_size(x1,x2))
+# else
+#  define alloc_size_func2_ptr(x1,x2)
+# endif
+#endif
+
+#ifndef end_with_null
+# ifdef HAVE_FUNC_ATTRIBUTE_SENTINEL
+#  define end_with_null ATTRIBUTE(sentinel)
+# else
+#  define end_with_null
+# endif
+#endif
+
+#ifndef end_with_null_ptr
+# ifdef HAVE_FUNC_PTR_ATTRIBUTE_SENTINEL
+#  define end_with_null_ptr ATTRIBUTE(sentinel)
+# else
+#  define end_with_null_ptr
+# endif
+#endif
+
+#ifndef format_func3
+# ifdef HAVE_FUNC_ATTRIBUTE3_FORMAT
+#  define format_func3(x1,x2,x3) ATTRIBUTE(format(x1,x2,x3))
+# else
+#  define format_func3(x1,x2,x3)
+# endif
+#endif
+
+#ifndef format_func3_ptr
+# ifdef HAVE_FUNC_PTR_ATTRIBUTE3_FORMAT
+#  define format_func3_ptr(x1,x2,x3) ATTRIBUTE(format(x1,x2,x3))
+# else
+#  define format_func3_ptr(x1,x2,x3)
+# endif
+#endif
+
+#ifndef const_func
+# ifdef HAVE_FUNC_ATTRIBUTE_CONST
+#  define const_func ATTRIBUTE(const)
+# else
+#  define const_func
+# endif
+#endif
+
+#ifndef const_func_ptr
+# ifdef HAVE_FUNC_PTR_ATTRIBUTE_CONST
+#  define const_func_ptr ATTRIBUTE(const)
+# else
+#  define const_func_ptr
+# endif
+#endif
+
+#ifndef pure_func
+# ifdef HAVE_FUNC_ATTRIBUTE_PURE
+#  define pure_func ATTRIBUTE(pure)
+# else
+#  define pure_func
+# endif
+#endif
+
+#ifndef pure_func_ptr
+# ifdef HAVE_FUNC_PTR_ATTRIBUTE_PURE
+#  define pure_func_ptr ATTRIBUTE(pure)
+# else
+#  define pure_func_ptr
+# endif
+#endif
+
+#ifndef noreturn_func
+# ifdef HAVE_FUNC_ATTRIBUTE_NORETURN
+#  define noreturn_func ATTRIBUTE(noreturn)
+# else
+#  define noreturn_func
+# endif
+#endif
+
+#ifndef unlikely_func
+# ifdef HAVE_FUNC_ATTRIBUTE_COLD
+#  define unlikely_func ATTRIBUTE(cold)
+# else
+#  define unlikely_func
+# endif
+#endif
+
+#ifndef unlikely_func_ptr
+# ifdef HAVE_FUNC_PTR_ATTRIBUTE_COLD
+#  define unlikely_func_ptr ATTRIBUTE(cold)
+# else
+#  define unlikely_func_ptr
+# endif
+#endif
+
+#ifndef unused_func
+# ifdef HAVE_FUNC_ATTRIBUTE_UNUSED
+#  define unused_func ATTRIBUTE(unused)
+# else
+#  define unused_func
+# endif
+#endif
+
+#ifndef unused_func_ptr
+# ifdef HAVE_FUNC_PTR_ATTRIBUTE_UNUSED
+#  define unused_func_ptr ATTRIBUTE(unused)
+# else
+#  define unused_func_ptr
+# endif
+#endif
+
+#ifndef noreturn_func_ptr
+# ifdef HAVE_FUNC_PTR_ATTRIBUTE_NORETURN
+#  define noreturn_func_ptr ATTRIBUTE(noreturn)
+# else
+#  define noreturn_func_ptr
+# endif
+#endif
+
+#ifndef never_null
+# ifdef HAVE_FUNC_ATTRIBUTE_RETURNS_NONNULL
+#  define never_null ATTRIBUTE(returns_nonnull)
+# else
+#  define never_null
+# endif
+#endif
+
+#ifndef never_null_ptr
+# ifdef HAVE_FUNC_PTR_ATTRIBUTE_RETURNS_NONNULL
+#  define never_null_ptr ATTRIBUTE(returns_nonnull)
+# else
+#  define never_null_ptr
+# endif
+#endif
+
+#ifndef malloc_func
+# ifdef HAVE_FUNC_ATTRIBUTE_MALLOC
+#  define malloc_func ATTRIBUTE(malloc)
+# else
+#  define malloc_func
+# endif
+#endif
+
+#ifndef malloc_func_ptr
+# ifdef HAVE_FUNC_PTR_ATTRIBUTE_MALLOC
+#  define malloc_func_ptr ATTRIBUTE(malloc)
+# else
+#  define malloc_func_ptr
+# endif
+#endif
+
+#ifndef alloc_size_func1
+# ifdef HAVE_FUNC_ATTRIBUTE1_ALLOC_SIZE
+#  define alloc_size_func1(x1) ATTRIBUTE(alloc_size(x1))
+# else
+#  define alloc_size_func1(x1)
+# endif
+#endif
+
+#ifndef alloc_size_func1_ptr
+# ifdef HAVE_FUNC_PTR_ATTRIBUTE1_ALLOC_SIZE
+#  define alloc_size_func1_ptr(x1) ATTRIBUTE(alloc_size(x1))
+# else
+#  define alloc_size_func1_ptr(x1)
+# endif
+#endif

_service:tar_scm:nasm-2.16.03.tar.xz/config/msvc.h Added

@@ -0,0 +1,196 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 2016 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * config/msvc.h
+ *
+ * Compiler definitions for Microsoft Visual C++;
+ * instead of unconfig.h.  See config.h.in for the
+ * variables which can be defined here.
+ *
+ * MSDN seems to have information back to Visual Studio 2003, so aim
+ * for compatibility that far back.
+ *
+ * Relevant _MSC_VER values:
+ * 1310 - Visual Studio 2003
+ * 1400 - Visual Studio 2005
+ * 1500 - Visual Studio 2008
+ * 1600 - Visual Studio 2010
+ * 1700 - Visual Studio 2012
+ * 1800 - Visual Studio 2013
+ * 1900 - Visual Studio 2015
+ * 1910 - Visual Studio 2017
+ */
+
+#ifndef NASM_CONFIG_MSVC_H
+#define NASM_CONFIG_MSVC_H
+
+/* Define to 1 if you have the <fcntl.h> header file. */
+#define HAVE_FCNTL_H 1
+
+/* Define to 1 if you have the <inttypes.h> header file. */
+#if _MSC_VER >= 1800
+# define HAVE_INTTYPES_H 1
+#endif
+
+/* Define to 1 if you have the <io.h> header file. */
+#define HAVE_IO_H 1
+
+/* Define to 1 if you have the <stdlib.h> header file. */
+#define HAVE_STDLIB_H 1
+
+/* Define to 1 if you have the <string.h> header file. */
+#define HAVE_STRING_H 1
+
+/* Define to 1 if you have the <sys/stat.h> header file. */
+#define HAVE_SYS_STAT_H 1
+
+/* Define to 1 if you have the <sys/types.h> header file. */
+#define HAVE_SYS_TYPES_H 1
+
+/* Define to 1 if you have the `access' function. */
+#define HAVE_ACCESS 1
+#if _MSC_VER < 1400
+# define access _access
+#endif
+
+/* Define to 1 if you have the `fileno' function. */
+#define HAVE_FILENO 1
+#if _MSC_VER < 1400
+# define fileno _fileno
+#endif
+
+/* Define to 1 if you have the `snprintf' function. */
+#define HAVE_SNPRINTF 1
+#if _MSC_VER < 1900
+# define snprintf _snprintf
+#endif
+
+/* Define to 1 if you have the `_chsize' function. */
+#define HAVE__CHSIZE 1
+
+/* Define to 1 if you have the `_chsize_s' function. */
+#if _MSC_VER >= 1400
+# define HAVE__CHSIZE_S 1
+#endif
+
+/* Define to 1 if you have the `_filelengthi64' function. */
+#define HAVE__FILELENGTHI64 1
+
+/* Define to 1 if you have the `_fseeki64' function. */
+#define HAVE__FSEEKI64 1
+
+/* Define to 1 if you have the `_fullpath' function. */
+#define HAVE__FULLPATH 1
+
+/* Define to 1 if the system has the type `struct _stati64'. */
+#define HAVE_STRUCT__STATI64
+
+/* Define to 1 if you have the `_stati64' function. */
+#define HAVE__STATI64 1
+
+/* Define to 1 if you have the `_fstati64' function. */
+#define HAVE__FSTATI64 1
+
+/* Define to 1 if stdbool.h conforms to C99. */
+#if _MSC_VER >= 1800
+# define HAVE_STDBOOL_H 1
+#endif
+
+/* Define to 1 if you have the `stricmp' function. */
+#define HAVE_STRICMP 1
+/* Define to 1 if you have the declaration of `stricmp', and to 0 if you
+   don't. */
+#define HAVE_DECL_STRICMP 1
+#if _MSC_VER < 1400
+# define stricmp _stricmp
+#endif
+
+/* Define to 1 if you have the `strnicmp' function. */
+#define HAVE_STRNICMP 1
+/* Define to 1 if you have the declaration of `strnicmp', and to 0 if you
+   don't. */
+#define HAVE_DECL_STRNICMP 1
+#if _MSC_VER < 1400
+# define strnicmp _strnicmp
+#endif
+
+#if _MSC_VER >= 1400
+/* Define to 1 if you have the `strnlen' function. */
+# define HAVE_STRNLEN 1
+/* Define to 1 if you have the declaration of `strnlen', and to 0 if you
+   don't. */
+# define HAVE_DECL_STRNLEN 1
+#endif
+
+/* Define to 1 if the system has the type `uintptr_t'. */
+#if _MSC_VER >= 1900
+# define HAVE_UINTPTR_T 1
+#else
+/* Define to the type of an unsigned integer type wide enough to hold a
+   pointer, if such a type exists, and if the system does not define it. */
+# define uintptr_t size_t
+#endif
+
+/* Define to 1 if you have the `vsnprintf' function. */
+#define HAVE_VSNPRINTF 1
+#if _MSC_VER < 1400
+# define vsnprint _vsnprintf
+#endif
+
+/* Define to 1 if the system has the type `_Bool'. */
+#if _MSC_VER >= 1900
+# define HAVE__BOOL 1
+#endif
+
+/* Define to 1 if you have the ANSI C header files. */
+#define STDC_HEADERS 1
+
+/* Define to 1 if your processor stores words with the least significant byte
+   first (like Intel and VAX, unlike Motorola and SPARC). */
+#define WORDS_LITTLEENDIAN 1
+
+/* Define to `__inline__' or `__inline' if that's what the C compiler
+   calls it, or to nothing if 'inline' is not supported under any name.  */
+#define inline __inline
+
+/* Define to the equivalent of the C99 'restrict' keyword, or to
+   nothing if this is not supported.  Do not define if restrict is
+   supported directly.  */
+#if _MSC_VER >= 1700
+#define restrict __restrict
+#else
+#define restrict
+#endif
+
+#endif /* NASM_CONFIG_MSVC_H */

_service:tar_scm:nasm-2.16.03.tar.xz/config/unconfig.h Added

@@ -0,0 +1,182 @@
+/* config/unconfig.h: autogenerated by tools/unconfig.pl */
+
+#ifndef CONFIG_UNCONFIG_H
+#define CONFIG_UNCONFIG_H
+
+#ifndef alloc_size_func2
+# ifdef HAVE_FUNC_ATTRIBUTE2_ALLOC_SIZE
+#  define alloc_size_func2(x1,x2) ATTRIBUTE(alloc_size(x1,x2))
+# else
+#  define alloc_size_func2(x1,x2)
+# endif
+#endif
+
+#ifndef alloc_size_func2_ptr
+# ifdef HAVE_FUNC_PTR_ATTRIBUTE2_ALLOC_SIZE
+#  define alloc_size_func2_ptr(x1,x2) ATTRIBUTE(alloc_size(x1,x2))
+# else
+#  define alloc_size_func2_ptr(x1,x2)
+# endif
+#endif
+
+#ifndef end_with_null
+# ifdef HAVE_FUNC_ATTRIBUTE_SENTINEL
+#  define end_with_null ATTRIBUTE(sentinel)
+# else
+#  define end_with_null
+# endif
+#endif
+
+#ifndef end_with_null_ptr
+# ifdef HAVE_FUNC_PTR_ATTRIBUTE_SENTINEL
+#  define end_with_null_ptr ATTRIBUTE(sentinel)
+# else
+#  define end_with_null_ptr
+# endif
+#endif
+
+#ifndef format_func3
+# ifdef HAVE_FUNC_ATTRIBUTE3_FORMAT
+#  define format_func3(x1,x2,x3) ATTRIBUTE(format(x1,x2,x3))
+# else
+#  define format_func3(x1,x2,x3)
+# endif
+#endif
+
+#ifndef format_func3_ptr
+# ifdef HAVE_FUNC_PTR_ATTRIBUTE3_FORMAT
+#  define format_func3_ptr(x1,x2,x3) ATTRIBUTE(format(x1,x2,x3))
+# else
+#  define format_func3_ptr(x1,x2,x3)
+# endif
+#endif
+
+#ifndef const_func
+# ifdef HAVE_FUNC_ATTRIBUTE_CONST
+#  define const_func ATTRIBUTE(const)
+# else
+#  define const_func
+# endif
+#endif
+
+#ifndef const_func_ptr
+# ifdef HAVE_FUNC_PTR_ATTRIBUTE_CONST
+#  define const_func_ptr ATTRIBUTE(const)
+# else
+#  define const_func_ptr
+# endif
+#endif
+
+#ifndef pure_func
+# ifdef HAVE_FUNC_ATTRIBUTE_PURE
+#  define pure_func ATTRIBUTE(pure)
+# else
+#  define pure_func
+# endif
+#endif
+
+#ifndef pure_func_ptr
+# ifdef HAVE_FUNC_PTR_ATTRIBUTE_PURE
+#  define pure_func_ptr ATTRIBUTE(pure)
+# else
+#  define pure_func_ptr
+# endif
+#endif
+
+#ifndef noreturn_func
+# ifdef HAVE_FUNC_ATTRIBUTE_NORETURN
+#  define noreturn_func ATTRIBUTE(noreturn)
+# else
+#  define noreturn_func
+# endif
+#endif
+
+#ifndef unlikely_func
+# ifdef HAVE_FUNC_ATTRIBUTE_COLD
+#  define unlikely_func ATTRIBUTE(cold)
+# else
+#  define unlikely_func
+# endif
+#endif
+
+#ifndef unlikely_func_ptr
+# ifdef HAVE_FUNC_PTR_ATTRIBUTE_COLD
+#  define unlikely_func_ptr ATTRIBUTE(cold)
+# else
+#  define unlikely_func_ptr
+# endif
+#endif
+
+#ifndef unused_func
+# ifdef HAVE_FUNC_ATTRIBUTE_UNUSED
+#  define unused_func ATTRIBUTE(unused)
+# else
+#  define unused_func
+# endif
+#endif
+
+#ifndef unused_func_ptr
+# ifdef HAVE_FUNC_PTR_ATTRIBUTE_UNUSED
+#  define unused_func_ptr ATTRIBUTE(unused)
+# else
+#  define unused_func_ptr
+# endif
+#endif
+
+#ifndef noreturn_func_ptr
+# ifdef HAVE_FUNC_PTR_ATTRIBUTE_NORETURN
+#  define noreturn_func_ptr ATTRIBUTE(noreturn)
+# else
+#  define noreturn_func_ptr
+# endif
+#endif
+
+#ifndef never_null
+# ifdef HAVE_FUNC_ATTRIBUTE_RETURNS_NONNULL
+#  define never_null ATTRIBUTE(returns_nonnull)
+# else
+#  define never_null
+# endif
+#endif
+
+#ifndef never_null_ptr
+# ifdef HAVE_FUNC_PTR_ATTRIBUTE_RETURNS_NONNULL
+#  define never_null_ptr ATTRIBUTE(returns_nonnull)
+# else
+#  define never_null_ptr
+# endif
+#endif
+
+#ifndef malloc_func
+# ifdef HAVE_FUNC_ATTRIBUTE_MALLOC
+#  define malloc_func ATTRIBUTE(malloc)
+# else
+#  define malloc_func
+# endif
+#endif
+
+#ifndef malloc_func_ptr
+# ifdef HAVE_FUNC_PTR_ATTRIBUTE_MALLOC
+#  define malloc_func_ptr ATTRIBUTE(malloc)
+# else
+#  define malloc_func_ptr
+# endif
+#endif
+
+#ifndef alloc_size_func1
+# ifdef HAVE_FUNC_ATTRIBUTE1_ALLOC_SIZE
+#  define alloc_size_func1(x1) ATTRIBUTE(alloc_size(x1))
+# else
+#  define alloc_size_func1(x1)
+# endif
+#endif
+
+#ifndef alloc_size_func1_ptr
+# ifdef HAVE_FUNC_PTR_ATTRIBUTE1_ALLOC_SIZE
+#  define alloc_size_func1_ptr(x1) ATTRIBUTE(alloc_size(x1))
+# else
+#  define alloc_size_func1_ptr(x1)
+# endif
+#endif
+
+#endif /* CONFIG_UNCONFIG_H */

_service:tar_scm:nasm-2.16.03.tar.xz/config/unknown.h Added

@@ -0,0 +1,51 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 2016 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * config/unknown.h
+ *
+ * Compiler definitions for an unknown compiler.  Assume the worst.
+ */
+
+#ifndef NASM_CONFIG_UNKNOWN_H
+#define NASM_CONFIG_UNKNOWN_H
+
+/* Assume these don't exist */
+#ifndef inline
+# define inline
+#endif
+#ifndef restrict
+# define restrict
+#endif
+
+#endif /* NASM_CONFIG_UNKNOWN_H */

_service:tar_scm:nasm-2.16.03.tar.xz/config/watcom.h Added

@@ -0,0 +1,105 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 2016 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * config/watcom.h
+ *
+ * Compiler definitions for OpenWatcom instead of config.h.in.
+ *  See config.h.in for the variables which can be defined here.
+ *
+ * This was taken from openwcom.mak and needs to be actually validated.
+ */
+
+#ifndef NASM_CONFIG_WATCOM_H
+#define NASM_CONFIG_WATCOM_H
+
+#define HAVE_DECL_STRCASECMP 1
+#define HAVE_DECL_STRICMP 1
+#define HAVE_DECL_STRLCPY 1
+#define HAVE_DECL_STRNCASECMP 1
+#define HAVE_DECL_STRNICMP 1
+#ifndef __LINUX__
+#define HAVE_IO_H 1
+#endif
+#define HAVE_LIMITS_H 1
+#define HAVE_MEMORY_H 1
+#define HAVE_SNPRINTF 1
+#if (__WATCOMC__ >= 1230)
+#undef HAVE__BOOL /* need stdbool.h */
+#define HAVE_STDBOOL_H 1
+#define HAVE_INTTYPES_H 1
+#define HAVE_STDINT_H 1
+#define HAVE_UINTPTR_T 1
+#endif
+#define HAVE_STDLIB_H 1
+#define HAVE_STRCSPN 1
+#define HAVE_STRICMP 1
+#define HAVE_STRNICMP 1
+#define HAVE_STRSPN 1
+#define HAVE_STRING_H 1
+#if (__WATCOMC__ >= 1240)
+#define HAVE_STRCASECMP 1
+#define HAVE_STRNCASECMP 1
+#define HAVE_STRLCPY 1
+#define HAVE_STRINGS_H 1
+#endif
+#define HAVE_SYS_STAT_H 1
+#define HAVE_SYS_TYPES_H 1
+#define HAVE_FCNTL_H 1
+#define HAVE_UNISTD_H 1
+#define HAVE_VSNPRINTF 1
+#define STDC_HEADERS 1
+
+#define HAVE__FULLPATH 1
+#define HAVE_ACCESS
+#define HAVE_STRUCT_STAT
+#define HAVE_STAT
+#define HAVE_FSTAT
+#define HAVE_FILENO
+#ifdef __LINUX__
+#define HAVE_FTRUNCATE
+#else
+#define HAVE_CHSIZE
+#define HAVE__CHSIZE
+#endif
+#define HAVE_ISASCII
+#define HAVE_ISCNTRL
+
+#if (__WATCOMC__ >= 1250)
+#define restrict __restrict
+#else
+#define restrict
+#endif
+#define inline __inline
+
+#endif /* NASM_CONFIG_WATCOM_H */

_service:tar_scm:nasm-2.16.03.tar.xz/configure Added

@@ -0,0 +1,13606 @@
+#! /bin/sh
+# Guess values for system-dependent variables and create Makefiles.
+# Generated by GNU Autoconf 2.71.
+#
+#
+# Copyright (C) 1992-1996, 1998-2017, 2020-2021 Free Software Foundation,
+# Inc.
+#
+#
+# This configure script is free software; the Free Software Foundation
+# gives unlimited permission to copy, distribute and modify it.
+## -------------------- ##
+## M4sh Initialization. ##
+## -------------------- ##
+
+# Be more Bourne compatible
+DUALCASE=1; export DUALCASE # for MKS sh
+as_nop=:
+if test ${ZSH_VERSION+y} && (emulate sh) >/dev/null 2>&1
+then :
+  emulate sh
+  NULLCMD=:
+  # Pre-4.2 versions of Zsh do word splitting on ${1+"$@"}, which
+  # is contrary to our usage.  Disable this feature.
+  alias -g '${1+"$@"}'='"$@"'
+  setopt NO_GLOB_SUBST
+else $as_nop
+  case `(set -o) 2>/dev/null` in #(
+  *posix*) :
+    set -o posix ;; #(
+  *) :
+     ;;
+esac
+fi
+
+
+
+# Reset variables that may have inherited troublesome values from
+# the environment.
+
+# IFS needs to be set, to space, tab, and newline, in precisely that order.
+# (If _AS_PATH_WALK were called with IFS unset, it would have the
+# side effect of setting IFS to empty, thus disabling word splitting.)
+# Quoting is to prevent editors from complaining about space-tab.
+as_nl='
+'
+export as_nl
+IFS=" ""	$as_nl"
+
+PS1='$ '
+PS2='> '
+PS4='+ '
+
+# Ensure predictable behavior from utilities with locale-dependent output.
+LC_ALL=C
+export LC_ALL
+LANGUAGE=C
+export LANGUAGE
+
+# We cannot yet rely on "unset" to work, but we need these variables
+# to be unset--not just set to an empty or harmless value--now, to
+# avoid bugs in old shells (e.g. pre-3.0 UWIN ksh).  This construct
+# also avoids known problems related to "unset" and subshell syntax
+# in other old shells (e.g. bash 2.01 and pdksh 5.2.14).
+for as_var in BASH_ENV ENV MAIL MAILPATH CDPATH
+do eval test \${$as_var+y} \
+  && ( (unset $as_var) || exit 1) >/dev/null 2>&1 && unset $as_var || :
+done
+
+# Ensure that fds 0, 1, and 2 are open.
+if (exec 3>&0) 2>/dev/null; then :; else exec 0</dev/null; fi
+if (exec 3>&1) 2>/dev/null; then :; else exec 1>/dev/null; fi
+if (exec 3>&2)            ; then :; else exec 2>/dev/null; fi
+
+# The user is always right.
+if ${PATH_SEPARATOR+false} :; then
+  PATH_SEPARATOR=:
+  (PATH='/bin;/bin'; FPATH=$PATH; sh -c :) >/dev/null 2>&1 && {
+    (PATH='/bin:/bin'; FPATH=$PATH; sh -c :) >/dev/null 2>&1 ||
+      PATH_SEPARATOR=';'
+  }
+fi
+
+
+# Find who we are.  Look in the path if we contain no directory separator.
+as_myself=
+case $0 in #((
+  *\\/* ) as_myself=$0 ;;
+  *) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    test -r "$as_dir$0" && as_myself=$as_dir$0 && break
+  done
+IFS=$as_save_IFS
+
+     ;;
+esac
+# We did not find ourselves, most probably we were run as `sh COMMAND'
+# in which case we are not to be found in the path.
+if test "x$as_myself" = x; then
+  as_myself=$0
+fi
+if test ! -f "$as_myself"; then
+  printf "%s\n" "$as_myself: error: cannot find myself; rerun with an absolute file name" >&2
+  exit 1
+fi
+
+
+# Use a proper internal environment variable to ensure we don't fall
+  # into an infinite loop, continuously re-executing ourselves.
+  if test x"${_as_can_reexec}" != xno && test "x$CONFIG_SHELL" != x; then
+    _as_can_reexec=no; export _as_can_reexec;
+    # We cannot yet assume a decent shell, so we have to provide a
+# neutralization value for shells without unset; and this also
+# works around shells that cannot unset nonexistent variables.
+# Preserve -v and -x to the replacement shell.
+BASH_ENV=/dev/null
+ENV=/dev/null
+(unset BASH_ENV) >/dev/null 2>&1 && unset BASH_ENV ENV
+case $- in # ((((
+  *v*x* | *x*v* ) as_opts=-vx ;;
+  *v* ) as_opts=-v ;;
+  *x* ) as_opts=-x ;;
+  * ) as_opts= ;;
+esac
+exec $CONFIG_SHELL $as_opts "$as_myself" ${1+"$@"}
+# Admittedly, this is quite paranoid, since all the known shells bail
+# out after a failed `exec'.
+printf "%s\n" "$0: could not re-execute with $CONFIG_SHELL" >&2
+exit 255
+  fi
+  # We don't want this to propagate to other subprocesses.
+          { _as_can_reexec=; unset _as_can_reexec;}
+if test "x$CONFIG_SHELL" = x; then
+  as_bourne_compatible="as_nop=:
+if test \${ZSH_VERSION+y} && (emulate sh) >/dev/null 2>&1
+then :
+  emulate sh
+  NULLCMD=:
+  # Pre-4.2 versions of Zsh do word splitting on \${1+\"\$@\"}, which
+  # is contrary to our usage.  Disable this feature.
+  alias -g '\${1+\"\$@\"}'='\"\$@\"'
+  setopt NO_GLOB_SUBST
+else \$as_nop
+  case \`(set -o) 2>/dev/null\` in #(
+  *posix*) :
+    set -o posix ;; #(
+  *) :
+     ;;
+esac
+fi
+"
+  as_required="as_fn_return () { (exit \$1); }
+as_fn_success () { as_fn_return 0; }
+as_fn_failure () { as_fn_return 1; }
+as_fn_ret_success () { return 0; }
+as_fn_ret_failure () { return 1; }
+
+exitcode=0
+as_fn_success || { exitcode=1; echo as_fn_success failed.; }
+as_fn_failure && { exitcode=1; echo as_fn_failure succeeded.; }
+as_fn_ret_success || { exitcode=1; echo as_fn_ret_success failed.; }
+as_fn_ret_failure && { exitcode=1; echo as_fn_ret_failure succeeded.; }
+if ( set x; as_fn_ret_success y && test x = \"\$1\" )
+then :
+
+else \$as_nop
+  exitcode=1; echo positional parameters were not saved.
+fi
+test x\$exitcode = x0 || exit 1
+blah=\$(echo \$(echo blah))
+test x\"\$blah\" = xblah || exit 1
+test -x / || exit 1"
+  as_suggested="  as_lineno_1=";as_suggested=$as_suggested$LINENO;as_suggested=$as_suggested" as_lineno_1a=\$LINENO
+  as_lineno_2=";as_suggested=$as_suggested$LINENO;as_suggested=$as_suggested" as_lineno_2a=\$LINENO
+  eval 'test \"x\$as_lineno_1'\$as_run'\" != \"x\$as_lineno_2'\$as_run'\" &&
+  test \"x\`expr \$as_lineno_1'\$as_run' + 1\`\" = \"x\$as_lineno_2'\$as_run'\"' || exit 1"
+  if (eval "$as_required") 2>/dev/null
+then :
+  as_have_required=yes
+else $as_nop
+  as_have_required=no
+fi
+  if test x$as_have_required = xyes && (eval "$as_suggested") 2>/dev/null
+then :
+
+else $as_nop
+  as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+as_found=false
+for as_dir in /bin$PATH_SEPARATOR/usr/bin$PATH_SEPARATOR$PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+  as_found=:
+  case $as_dir in #(
+	 /*)
+	   for as_base in sh bash ksh sh5; do
+	     # Try only shells that exist, to save several forks.
+	     as_shell=$as_dir$as_base
+	     if { test -f "$as_shell" || test -f "$as_shell.exe"; } &&
+		    as_run=a "$as_shell" -c "$as_bourne_compatible""$as_required" 2>/dev/null
+then :
+  CONFIG_SHELL=$as_shell as_have_required=yes
+		   if as_run=a "$as_shell" -c "$as_bourne_compatible""$as_suggested" 2>/dev/null
+then :
+  break 2
+fi
+fi
+	   done;;
+       esac
+  as_found=false
+done
+IFS=$as_save_IFS
+if $as_found
+then :
+
+else $as_nop
+  if { test -f "$SHELL" || test -f "$SHELL.exe"; } &&
+	      as_run=a "$SHELL" -c "$as_bourne_compatible""$as_required" 2>/dev/null
+then :
+  CONFIG_SHELL=$SHELL as_have_required=yes
+fi
+fi
+
+
+      if test "x$CONFIG_SHELL" != x
+then :
+  export CONFIG_SHELL
+             # We cannot yet assume a decent shell, so we have to provide a
+# neutralization value for shells without unset; and this also
+# works around shells that cannot unset nonexistent variables.
+# Preserve -v and -x to the replacement shell.
+BASH_ENV=/dev/null
+ENV=/dev/null
+(unset BASH_ENV) >/dev/null 2>&1 && unset BASH_ENV ENV
+case $- in # ((((
+  *v*x* | *x*v* ) as_opts=-vx ;;
+  *v* ) as_opts=-v ;;
+  *x* ) as_opts=-x ;;
+  * ) as_opts= ;;
+esac
+exec $CONFIG_SHELL $as_opts "$as_myself" ${1+"$@"}
+# Admittedly, this is quite paranoid, since all the known shells bail
+# out after a failed `exec'.
+printf "%s\n" "$0: could not re-execute with $CONFIG_SHELL" >&2
+exit 255
+fi
+
+    if test x$as_have_required = xno
+then :
+  printf "%s\n" "$0: This script requires a shell more modern than all"
+  printf "%s\n" "$0: the shells that I found on your system."
+  if test ${ZSH_VERSION+y} ; then
+    printf "%s\n" "$0: In particular, zsh $ZSH_VERSION has bugs and should"
+    printf "%s\n" "$0: be upgraded to zsh 4.3.4 or later."
+  else
+    printf "%s\n" "$0: Please tell bug-autoconf@gnu.org about your system,
+$0: including any error possibly output before this
+$0: message. Then install a modern shell, or manually run
+$0: the script under such a shell if you do have one."
+  fi
+  exit 1
+fi
+fi
+fi
+SHELL=${CONFIG_SHELL-/bin/sh}
+export SHELL
+# Unset more variables known to interfere with behavior of common tools.
+CLICOLOR_FORCE= GREP_OPTIONS=
+unset CLICOLOR_FORCE GREP_OPTIONS
+
+## --------------------- ##
+## M4sh Shell Functions. ##
+## --------------------- ##
+# as_fn_unset VAR
+# ---------------
+# Portably unset VAR.
+as_fn_unset ()
+{
+  { eval $1=; unset $1;}
+}
+as_unset=as_fn_unset
+
+
+# as_fn_set_status STATUS
+# -----------------------
+# Set $? to STATUS, without forking.
+as_fn_set_status ()
+{
+  return $1
+} # as_fn_set_status
+
+# as_fn_exit STATUS
+# -----------------
+# Exit the shell with STATUS, even in a "trap 0" or "set -e" context.
+as_fn_exit ()
+{
+  set +e
+  as_fn_set_status $1
+  exit $1
+} # as_fn_exit
+# as_fn_nop
+# ---------
+# Do nothing but, unlike ":", preserve the value of $?.
+as_fn_nop ()
+{
+  return $?
+}
+as_nop=as_fn_nop
+
+# as_fn_mkdir_p
+# -------------
+# Create "$as_dir" as a directory, including parents if necessary.
+as_fn_mkdir_p ()
+{
+
+  case $as_dir in #(
+  -*) as_dir=./$as_dir;;
+  esac
+  test -d "$as_dir" || eval $as_mkdir_p || {
+    as_dirs=
+    while :; do
+      case $as_dir in #(
+      *\'*) as_qdir=`printf "%s\n" "$as_dir" | sed "s/'/'\\\\\\\\''/g"`;; #'(
+      *) as_qdir=$as_dir;;
+      esac
+      as_dirs="'$as_qdir' $as_dirs"
+      as_dir=`$as_dirname -- "$as_dir" ||
+$as_expr X"$as_dir" : 'X$.*^/$//*^/^/*/*$' \| \
+	 X"$as_dir" : 'X$//$^/' \| \
+	 X"$as_dir" : 'X$//$$' \| \
+	 X"$as_dir" : 'X$/$' \| . 2>/dev/null ||
+printf "%s\n" X"$as_dir" |
+    sed '/^X$.*^/$\/\/*^/^/*\/*$/{
+	    s//\1/
+	    q
+	  }
+	  /^X$\/\/$^/.*/{
+	    s//\1/
+	    q
+	  }
+	  /^X$\/\/$$/{
+	    s//\1/
+	    q
+	  }
+	  /^X$\/$.*/{
+	    s//\1/
+	    q
+	  }
+	  s/.*/./; q'`
+      test -d "$as_dir" && break
+    done
+    test -z "$as_dirs" || eval "mkdir $as_dirs"
+  } || test -d "$as_dir" || as_fn_error $? "cannot create directory $as_dir"
+
+
+} # as_fn_mkdir_p
+
+# as_fn_executable_p FILE
+# -----------------------
+# Test if FILE is an executable regular file.
+as_fn_executable_p ()
+{
+  test -f "$1" && test -x "$1"
+} # as_fn_executable_p
+# as_fn_append VAR VALUE
+# ----------------------
+# Append the text in VALUE to the end of the definition contained in VAR. Take
+# advantage of any shell optimizations that allow amortized linear growth over
+# repeated appends, instead of the typical quadratic growth present in naive
+# implementations.
+if (eval "as_var=1; as_var+=2; test x\$as_var = x12") 2>/dev/null
+then :
+  eval 'as_fn_append ()
+  {
+    eval $1+=\$2
+  }'
+else $as_nop
+  as_fn_append ()
+  {
+    eval $1=\$$1\$2
+  }
+fi # as_fn_append
+
+# as_fn_arith ARG...
+# ------------------
+# Perform arithmetic evaluation on the ARGs, and store the result in the
+# global $as_val. Take advantage of shells that can avoid forks. The arguments
+# must be portable across $(()) and expr.
+if (eval "test \$(( 1 + 1 )) = 2") 2>/dev/null
+then :
+  eval 'as_fn_arith ()
+  {
+    as_val=$(( $* ))
+  }'
+else $as_nop
+  as_fn_arith ()
+  {
+    as_val=`expr "$@" || test $? -eq 1`
+  }
+fi # as_fn_arith
+
+# as_fn_nop
+# ---------
+# Do nothing but, unlike ":", preserve the value of $?.
+as_fn_nop ()
+{
+  return $?
+}
+as_nop=as_fn_nop
+
+# as_fn_error STATUS ERROR LINENO LOG_FD
+# ----------------------------------------
+# Output "`basename $0`: error: ERROR" to stderr. If LINENO and LOG_FD are
+# provided, also output the error to LOG_FD, referencing LINENO. Then exit the
+# script with STATUS, using 1 if that was 0.
+as_fn_error ()
+{
+  as_status=$1; test $as_status -eq 0 && as_status=1
+  if test "$4"; then
+    as_lineno=${as_lineno-"$3"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: $2" >&$4
+  fi
+  printf "%s\n" "$as_me: error: $2" >&2
+  as_fn_exit $as_status
+} # as_fn_error
+
+if expr a : '$a$' >/dev/null 2>&1 &&
+   test "X`expr 00001 : '.*$...$'`" = X001; then
+  as_expr=expr
+else
+  as_expr=false
+fi
+
+if (basename -- /) >/dev/null 2>&1 && test "X`basename -- / 2>&1`" = "X/"; then
+  as_basename=basename
+else
+  as_basename=false
+fi
+
+if (as_dir=`dirname -- /` && test "X$as_dir" = X/) >/dev/null 2>&1; then
+  as_dirname=dirname
+else
+  as_dirname=false
+fi
+
+as_me=`$as_basename -- "$0" ||
+$as_expr X/"$0" : '.*/$^/^/*$/*$' \| \
+	 X"$0" : 'X$//$$' \| \
+	 X"$0" : 'X$/$' \| . 2>/dev/null ||
+printf "%s\n" X/"$0" |
+    sed '/^.*\/$^/^/*$\/*$/{
+	    s//\1/
+	    q
+	  }
+	  /^X\/$\/\/$$/{
+	    s//\1/
+	    q
+	  }
+	  /^X\/$\/$.*/{
+	    s//\1/
+	    q
+	  }
+	  s/.*/./; q'`
+
+# Avoid depending upon Character Ranges.
+as_cr_letters='abcdefghijklmnopqrstuvwxyz'
+as_cr_LETTERS='ABCDEFGHIJKLMNOPQRSTUVWXYZ'
+as_cr_Letters=$as_cr_letters$as_cr_LETTERS
+as_cr_digits='0123456789'
+as_cr_alnum=$as_cr_Letters$as_cr_digits
+
+
+  as_lineno_1=$LINENO as_lineno_1a=$LINENO
+  as_lineno_2=$LINENO as_lineno_2a=$LINENO
+  eval 'test "x$as_lineno_1'$as_run'" != "x$as_lineno_2'$as_run'" &&
+  test "x`expr $as_lineno_1'$as_run' + 1`" = "x$as_lineno_2'$as_run'"' || {
+  # Blame Lee E. McMahon (1931-1989) for sed's syntax.  :-)
+  sed -n '
+    p
+    /$LINENO/=
+  ' <$as_myself |
+    sed '
+      s/$LINENO.*/&-/
+      t lineno
+      b
+      :lineno
+      N
+      :loop
+      s/$LINENO$^'$as_cr_alnum'_.*\n$$.*$/\2\1\2/
+      t loop
+      s/-\n.*//
+    ' >$as_me.lineno &&
+  chmod +x "$as_me.lineno" ||
+    { printf "%s\n" "$as_me: error: cannot create $as_me.lineno; rerun with a POSIX shell" >&2; as_fn_exit 1; }
+
+  # If we had to re-execute with $CONFIG_SHELL, we're ensured to have
+  # already done that, so ensure we don't try to do so again and fall
+  # in an infinite loop.  This has already happened in practice.
+  _as_can_reexec=no; export _as_can_reexec
+  # Don't try to exec as it changes $0, causing all sort of problems
+  # (the dirname of $0 is not the place where we might find the
+  # original and so on.  Autoconf is especially sensitive to this).
+  . "./$as_me.lineno"
+  # Exit status is that of the last command.
+  exit
+}
+
+
+# Determine whether it's possible to make 'echo' print without a newline.
+# These variables are no longer used directly by Autoconf, but are AC_SUBSTed
+# for compatibility with existing Makefiles.
+ECHO_C= ECHO_N= ECHO_T=
+case `echo -n x` in #(((((
+-n*)
+  case `echo 'xy\c'` in
+  *c*) ECHO_T='	';;	# ECHO_T is single tab character.
+  xy)  ECHO_C='\c';;
+  *)   echo `echo ksh88 bug on AIX 6.1` > /dev/null
+       ECHO_T='	';;
+  esac;;
+*)
+  ECHO_N='-n';;
+esac
+
+# For backward compatibility with old third-party macros, we provide
+# the shell variables $as_echo and $as_echo_n.  New code should use
+# AS_ECHO("message") and AS_ECHO_N("message"), respectively.
+as_echo='printf %s\n'
+as_echo_n='printf %s'
+
+
+rm -f conf$$ conf$$.exe conf$$.file
+if test -d conf$$.dir; then
+  rm -f conf$$.dir/conf$$.file
+else
+  rm -f conf$$.dir
+  mkdir conf$$.dir 2>/dev/null
+fi
+if (echo >conf$$.file) 2>/dev/null; then
+  if ln -s conf$$.file conf$$ 2>/dev/null; then
+    as_ln_s='ln -s'
+    # ... but there are two gotchas:
+    # 1) On MSYS, both `ln -s file dir' and `ln file dir' fail.
+    # 2) DJGPP < 2.04 has no symlinks; `ln -s' creates a wrapper executable.
+    # In both cases, we have to default to `cp -pR'.
+    ln -s conf$$.file conf$$.dir 2>/dev/null && test ! -f conf$$.exe ||
+      as_ln_s='cp -pR'
+  elif ln conf$$.file conf$$ 2>/dev/null; then
+    as_ln_s=ln
+  else
+    as_ln_s='cp -pR'
+  fi
+else
+  as_ln_s='cp -pR'
+fi
+rm -f conf$$ conf$$.exe conf$$.dir/conf$$.file conf$$.file
+rmdir conf$$.dir 2>/dev/null
+
+if mkdir -p . 2>/dev/null; then
+  as_mkdir_p='mkdir -p "$as_dir"'
+else
+  test -d ./-p && rmdir ./-p
+  as_mkdir_p=false
+fi
+
+as_test_x='test -x'
+as_executable_p=as_fn_executable_p
+
+# Sed expression to map a string onto a valid CPP name.
+as_tr_cpp="eval sed 'y%*$as_cr_letters%P$as_cr_LETTERS%;s%^_$as_cr_alnum%_%g'"
+
+# Sed expression to map a string onto a valid variable name.
+as_tr_sh="eval sed 'y%*+%pp%;s%^_$as_cr_alnum%_%g'"
+
+
+test -n "$DJDIR" || exec 7<&0 </dev/null
+exec 6>&1
+
+# Name of the host.
+# hostname on some systems (SVR3.2, old GNU/Linux) returns a bogus exit status,
+# so uname gets run too.
+ac_hostname=`(hostname || uname -n) 2>/dev/null | sed 1q`
+
+#
+# Initializations.
+#
+ac_default_prefix=/usr/local
+ac_clean_files=
+ac_config_libobj_dir=.
+LIBOBJS=
+cross_compiling=no
+subdirs=
+MFLAGS=
+MAKEFLAGS=
+
+# Identity of this package.
+PACKAGE_NAME=''
+PACKAGE_TARNAME=''
+PACKAGE_VERSION=''
+PACKAGE_STRING=''
+PACKAGE_BUGREPORT=''
+PACKAGE_URL=''
+
+ac_unique_file="config/config.h.in"
+# Factoring default headers for most tests.
+ac_includes_default="\
+#include <stddef.h>
+#ifdef HAVE_STDIO_H
+# include <stdio.h>
+#endif
+#ifdef HAVE_STDLIB_H
+# include <stdlib.h>
+#endif
+#ifdef HAVE_STRING_H
+# include <string.h>
+#endif
+#ifdef HAVE_INTTYPES_H
+# include <inttypes.h>
+#endif
+#ifdef HAVE_STDINT_H
+# include <stdint.h>
+#endif
+#ifdef HAVE_STRINGS_H
+# include <strings.h>
+#endif
+#ifdef HAVE_SYS_TYPES_H
+# include <sys/types.h>
+#endif
+#ifdef HAVE_SYS_STAT_H
+# include <sys/stat.h>
+#endif
+#ifdef HAVE_UNISTD_H
+# include <unistd.h>
+#endif"
+
+ac_header_c_list=
+ac_func_c_list=
+ac_subst_vars='LTLIBOBJS
+LIBOBJS
+CC_RANLIB
+CC_AR
+PDFOPT
+MANIFEST
+WINDRES
+STRIP
+RANLIB
+AR
+NSIS
+MAKENSIS
+MAKENSIS_PLAIN
+MAKENSIS_TOOL
+XZFILES
+MANPAGES
+XZ
+XMLTO
+ASCIIDOC
+NROFF
+MKDIR_P
+INSTALL_DATA
+INSTALL_SCRIPT
+INSTALL_PROGRAM
+SET_MAKE
+LN_S
+LIBEXT
+OBJEXT
+EXEEXT
+ac_ct_CC
+CPPFLAGS
+LDFLAGS
+CFLAGS
+CC
+host_os
+host_vendor
+host_cpu
+host
+build_os
+build_vendor
+build_cpu
+build
+ac_prefix_program
+target_alias
+host_alias
+build_alias
+LIBS
+ECHO_T
+ECHO_N
+ECHO_C
+DEFS
+mandir
+localedir
+libdir
+psdir
+pdfdir
+dvidir
+htmldir
+infodir
+docdir
+oldincludedir
+includedir
+runstatedir
+localstatedir
+sharedstatedir
+sysconfdir
+datadir
+datarootdir
+libexecdir
+sbindir
+bindir
+program_transform_name
+prefix
+exec_prefix
+PACKAGE_URL
+PACKAGE_BUGREPORT
+PACKAGE_STRING
+PACKAGE_VERSION
+PACKAGE_TARNAME
+PACKAGE_NAME
+PATH_SEPARATOR
+SHELL'
+ac_subst_files=''
+ac_user_opts='
+enable_option_checking
+enable_gdb
+enable_debug
+enable_profiling
+enable_largefile
+enable_panic_abort
+with_nsis
+enable_pdf_compression
+enable_gc
+enable_lto
+enable_sanitizer
+enable_pedantic
+enable_werror
+enable_suggestions
+'
+      ac_precious_vars='build_alias
+host_alias
+target_alias
+CC
+CFLAGS
+LDFLAGS
+LIBS
+CPPFLAGS'
+
+
+# Initialize some variables set by options.
+ac_init_help=
+ac_init_version=false
+ac_unrecognized_opts=
+ac_unrecognized_sep=
+# The variables have the same names as the options, with
+# dashes changed to underlines.
+cache_file=/dev/null
+exec_prefix=NONE
+no_create=
+no_recursion=
+prefix=NONE
+program_prefix=NONE
+program_suffix=NONE
+program_transform_name=s,x,x,
+silent=
+site=
+srcdir=
+verbose=
+x_includes=NONE
+x_libraries=NONE
+
+# Installation directory options.
+# These are left unexpanded so users can "make install exec_prefix=/foo"
+# and all the variables that are supposed to be based on exec_prefix
+# by default will actually change.
+# Use braces instead of parens because sh, perl, etc. also accept them.
+# (The list follows the same order as the GNU Coding Standards.)
+bindir='${exec_prefix}/bin'
+sbindir='${exec_prefix}/sbin'
+libexecdir='${exec_prefix}/libexec'
+datarootdir='${prefix}/share'
+datadir='${datarootdir}'
+sysconfdir='${prefix}/etc'
+sharedstatedir='${prefix}/com'
+localstatedir='${prefix}/var'
+runstatedir='${localstatedir}/run'
+includedir='${prefix}/include'
+oldincludedir='/usr/include'
+docdir='${datarootdir}/doc/${PACKAGE}'
+infodir='${datarootdir}/info'
+htmldir='${docdir}'
+dvidir='${docdir}'
+pdfdir='${docdir}'
+psdir='${docdir}'
+libdir='${exec_prefix}/lib'
+localedir='${datarootdir}/locale'
+mandir='${datarootdir}/man'
+
+ac_prev=
+ac_dashdash=
+for ac_option
+do
+  # If the previous option needs an argument, assign it.
+  if test -n "$ac_prev"; then
+    eval $ac_prev=\$ac_option
+    ac_prev=
+    continue
+  fi
+
+  case $ac_option in
+  *=?*) ac_optarg=`expr "X$ac_option" : '^=*=$.*$'` ;;
+  *=)   ac_optarg= ;;
+  *)    ac_optarg=yes ;;
+  esac
+
+  case $ac_dashdash$ac_option in
+  --)
+    ac_dashdash=yes ;;
+
+  -bindir | --bindir | --bindi | --bind | --bin | --bi)
+    ac_prev=bindir ;;
+  -bindir=* | --bindir=* | --bindi=* | --bind=* | --bin=* | --bi=*)
+    bindir=$ac_optarg ;;
+
+  -build | --build | --buil | --bui | --bu)
+    ac_prev=build_alias ;;
+  -build=* | --build=* | --buil=* | --bui=* | --bu=*)
+    build_alias=$ac_optarg ;;
+
+  -cache-file | --cache-file | --cache-fil | --cache-fi \
+  | --cache-f | --cache- | --cache | --cach | --cac | --ca | --c)
+    ac_prev=cache_file ;;
+  -cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \
+  | --cache-f=* | --cache-=* | --cache=* | --cach=* | --cac=* | --ca=* | --c=*)
+    cache_file=$ac_optarg ;;
+
+  --config-cache | -C)
+    cache_file=config.cache ;;
+
+  -datadir | --datadir | --datadi | --datad)
+    ac_prev=datadir ;;
+  -datadir=* | --datadir=* | --datadi=* | --datad=*)
+    datadir=$ac_optarg ;;
+
+  -datarootdir | --datarootdir | --datarootdi | --datarootd | --dataroot \
+  | --dataroo | --dataro | --datar)
+    ac_prev=datarootdir ;;
+  -datarootdir=* | --datarootdir=* | --datarootdi=* | --datarootd=* \
+  | --dataroot=* | --dataroo=* | --dataro=* | --datar=*)
+    datarootdir=$ac_optarg ;;
+
+  -disable-* | --disable-*)
+    ac_useropt=`expr "x$ac_option" : 'x-*disable-$.*$'`
+    # Reject names that are not valid shell variable names.
+    expr "x$ac_useropt" : ".*^-+._$as_cr_alnum" >/dev/null &&
+      as_fn_error $? "invalid feature name: \`$ac_useropt'"
+    ac_useropt_orig=$ac_useropt
+    ac_useropt=`printf "%s\n" "$ac_useropt" | sed 's/-+./_/g'`
+    case $ac_user_opts in
+      *"
+"enable_$ac_useropt"
+"*) ;;
+      *) ac_unrecognized_opts="$ac_unrecognized_opts$ac_unrecognized_sep--disable-$ac_useropt_orig"
+	 ac_unrecognized_sep=', ';;
+    esac
+    eval enable_$ac_useropt=no ;;
+
+  -docdir | --docdir | --docdi | --doc | --do)
+    ac_prev=docdir ;;
+  -docdir=* | --docdir=* | --docdi=* | --doc=* | --do=*)
+    docdir=$ac_optarg ;;
+
+  -dvidir | --dvidir | --dvidi | --dvid | --dvi | --dv)
+    ac_prev=dvidir ;;
+  -dvidir=* | --dvidir=* | --dvidi=* | --dvid=* | --dvi=* | --dv=*)
+    dvidir=$ac_optarg ;;
+
+  -enable-* | --enable-*)
+    ac_useropt=`expr "x$ac_option" : 'x-*enable-$^=*$'`
+    # Reject names that are not valid shell variable names.
+    expr "x$ac_useropt" : ".*^-+._$as_cr_alnum" >/dev/null &&
+      as_fn_error $? "invalid feature name: \`$ac_useropt'"
+    ac_useropt_orig=$ac_useropt
+    ac_useropt=`printf "%s\n" "$ac_useropt" | sed 's/-+./_/g'`
+    case $ac_user_opts in
+      *"
+"enable_$ac_useropt"
+"*) ;;
+      *) ac_unrecognized_opts="$ac_unrecognized_opts$ac_unrecognized_sep--enable-$ac_useropt_orig"
+	 ac_unrecognized_sep=', ';;
+    esac
+    eval enable_$ac_useropt=\$ac_optarg ;;
+
+  -exec-prefix | --exec_prefix | --exec-prefix | --exec-prefi \
+  | --exec-pref | --exec-pre | --exec-pr | --exec-p | --exec- \
+  | --exec | --exe | --ex)
+    ac_prev=exec_prefix ;;
+  -exec-prefix=* | --exec_prefix=* | --exec-prefix=* | --exec-prefi=* \
+  | --exec-pref=* | --exec-pre=* | --exec-pr=* | --exec-p=* | --exec-=* \
+  | --exec=* | --exe=* | --ex=*)
+    exec_prefix=$ac_optarg ;;
+
+  -gas | --gas | --ga | --g)
+    # Obsolete; use --with-gas.
+    with_gas=yes ;;
+
+  -help | --help | --hel | --he | -h)
+    ac_init_help=long ;;
+  -help=r* | --help=r* | --hel=r* | --he=r* | -hr*)
+    ac_init_help=recursive ;;
+  -help=s* | --help=s* | --hel=s* | --he=s* | -hs*)
+    ac_init_help=short ;;
+
+  -host | --host | --hos | --ho)
+    ac_prev=host_alias ;;
+  -host=* | --host=* | --hos=* | --ho=*)
+    host_alias=$ac_optarg ;;
+
+  -htmldir | --htmldir | --htmldi | --htmld | --html | --htm | --ht)
+    ac_prev=htmldir ;;
+  -htmldir=* | --htmldir=* | --htmldi=* | --htmld=* | --html=* | --htm=* \
+  | --ht=*)
+    htmldir=$ac_optarg ;;
+
+  -includedir | --includedir | --includedi | --included | --include \
+  | --includ | --inclu | --incl | --inc)
+    ac_prev=includedir ;;
+  -includedir=* | --includedir=* | --includedi=* | --included=* | --include=* \
+  | --includ=* | --inclu=* | --incl=* | --inc=*)
+    includedir=$ac_optarg ;;
+
+  -infodir | --infodir | --infodi | --infod | --info | --inf)
+    ac_prev=infodir ;;
+  -infodir=* | --infodir=* | --infodi=* | --infod=* | --info=* | --inf=*)
+    infodir=$ac_optarg ;;
+
+  -libdir | --libdir | --libdi | --libd)
+    ac_prev=libdir ;;
+  -libdir=* | --libdir=* | --libdi=* | --libd=*)
+    libdir=$ac_optarg ;;
+
+  -libexecdir | --libexecdir | --libexecdi | --libexecd | --libexec \
+  | --libexe | --libex | --libe)
+    ac_prev=libexecdir ;;
+  -libexecdir=* | --libexecdir=* | --libexecdi=* | --libexecd=* | --libexec=* \
+  | --libexe=* | --libex=* | --libe=*)
+    libexecdir=$ac_optarg ;;
+
+  -localedir | --localedir | --localedi | --localed | --locale)
+    ac_prev=localedir ;;
+  -localedir=* | --localedir=* | --localedi=* | --localed=* | --locale=*)
+    localedir=$ac_optarg ;;
+
+  -localstatedir | --localstatedir | --localstatedi | --localstated \
+  | --localstate | --localstat | --localsta | --localst | --locals)
+    ac_prev=localstatedir ;;
+  -localstatedir=* | --localstatedir=* | --localstatedi=* | --localstated=* \
+  | --localstate=* | --localstat=* | --localsta=* | --localst=* | --locals=*)
+    localstatedir=$ac_optarg ;;
+
+  -mandir | --mandir | --mandi | --mand | --man | --ma | --m)
+    ac_prev=mandir ;;
+  -mandir=* | --mandir=* | --mandi=* | --mand=* | --man=* | --ma=* | --m=*)
+    mandir=$ac_optarg ;;
+
+  -nfp | --nfp | --nf)
+    # Obsolete; use --without-fp.
+    with_fp=no ;;
+
+  -no-create | --no-create | --no-creat | --no-crea | --no-cre \
+  | --no-cr | --no-c | -n)
+    no_create=yes ;;
+
+  -no-recursion | --no-recursion | --no-recursio | --no-recursi \
+  | --no-recurs | --no-recur | --no-recu | --no-rec | --no-re | --no-r)
+    no_recursion=yes ;;
+
+  -oldincludedir | --oldincludedir | --oldincludedi | --oldincluded \
+  | --oldinclude | --oldinclud | --oldinclu | --oldincl | --oldinc \
+  | --oldin | --oldi | --old | --ol | --o)
+    ac_prev=oldincludedir ;;
+  -oldincludedir=* | --oldincludedir=* | --oldincludedi=* | --oldincluded=* \
+  | --oldinclude=* | --oldinclud=* | --oldinclu=* | --oldincl=* | --oldinc=* \
+  | --oldin=* | --oldi=* | --old=* | --ol=* | --o=*)
+    oldincludedir=$ac_optarg ;;
+
+  -prefix | --prefix | --prefi | --pref | --pre | --pr | --p)
+    ac_prev=prefix ;;
+  -prefix=* | --prefix=* | --prefi=* | --pref=* | --pre=* | --pr=* | --p=*)
+    prefix=$ac_optarg ;;
+
+  -program-prefix | --program-prefix | --program-prefi | --program-pref \
+  | --program-pre | --program-pr | --program-p)
+    ac_prev=program_prefix ;;
+  -program-prefix=* | --program-prefix=* | --program-prefi=* \
+  | --program-pref=* | --program-pre=* | --program-pr=* | --program-p=*)
+    program_prefix=$ac_optarg ;;
+
+  -program-suffix | --program-suffix | --program-suffi | --program-suff \
+  | --program-suf | --program-su | --program-s)
+    ac_prev=program_suffix ;;
+  -program-suffix=* | --program-suffix=* | --program-suffi=* \
+  | --program-suff=* | --program-suf=* | --program-su=* | --program-s=*)
+    program_suffix=$ac_optarg ;;
+
+  -program-transform-name | --program-transform-name \
+  | --program-transform-nam | --program-transform-na \
+  | --program-transform-n | --program-transform- \
+  | --program-transform | --program-transfor \
+  | --program-transfo | --program-transf \
+  | --program-trans | --program-tran \
+  | --progr-tra | --program-tr | --program-t)
+    ac_prev=program_transform_name ;;
+  -program-transform-name=* | --program-transform-name=* \
+  | --program-transform-nam=* | --program-transform-na=* \
+  | --program-transform-n=* | --program-transform-=* \
+  | --program-transform=* | --program-transfor=* \
+  | --program-transfo=* | --program-transf=* \
+  | --program-trans=* | --program-tran=* \
+  | --progr-tra=* | --program-tr=* | --program-t=*)
+    program_transform_name=$ac_optarg ;;
+
+  -pdfdir | --pdfdir | --pdfdi | --pdfd | --pdf | --pd)
+    ac_prev=pdfdir ;;
+  -pdfdir=* | --pdfdir=* | --pdfdi=* | --pdfd=* | --pdf=* | --pd=*)
+    pdfdir=$ac_optarg ;;
+
+  -psdir | --psdir | --psdi | --psd | --ps)
+    ac_prev=psdir ;;
+  -psdir=* | --psdir=* | --psdi=* | --psd=* | --ps=*)
+    psdir=$ac_optarg ;;
+
+  -q | -quiet | --quiet | --quie | --qui | --qu | --q \
+  | -silent | --silent | --silen | --sile | --sil)
+    silent=yes ;;
+
+  -runstatedir | --runstatedir | --runstatedi | --runstated \
+  | --runstate | --runstat | --runsta | --runst | --runs \
+  | --run | --ru | --r)
+    ac_prev=runstatedir ;;
+  -runstatedir=* | --runstatedir=* | --runstatedi=* | --runstated=* \
+  | --runstate=* | --runstat=* | --runsta=* | --runst=* | --runs=* \
+  | --run=* | --ru=* | --r=*)
+    runstatedir=$ac_optarg ;;
+
+  -sbindir | --sbindir | --sbindi | --sbind | --sbin | --sbi | --sb)
+    ac_prev=sbindir ;;
+  -sbindir=* | --sbindir=* | --sbindi=* | --sbind=* | --sbin=* \
+  | --sbi=* | --sb=*)
+    sbindir=$ac_optarg ;;
+
+  -sharedstatedir | --sharedstatedir | --sharedstatedi \
+  | --sharedstated | --sharedstate | --sharedstat | --sharedsta \
+  | --sharedst | --shareds | --shared | --share | --shar \
+  | --sha | --sh)
+    ac_prev=sharedstatedir ;;
+  -sharedstatedir=* | --sharedstatedir=* | --sharedstatedi=* \
+  | --sharedstated=* | --sharedstate=* | --sharedstat=* | --sharedsta=* \
+  | --sharedst=* | --shareds=* | --shared=* | --share=* | --shar=* \
+  | --sha=* | --sh=*)
+    sharedstatedir=$ac_optarg ;;
+
+  -site | --site | --sit)
+    ac_prev=site ;;
+  -site=* | --site=* | --sit=*)
+    site=$ac_optarg ;;
+
+  -srcdir | --srcdir | --srcdi | --srcd | --src | --sr)
+    ac_prev=srcdir ;;
+  -srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*)
+    srcdir=$ac_optarg ;;
+
+  -sysconfdir | --sysconfdir | --sysconfdi | --sysconfd | --sysconf \
+  | --syscon | --sysco | --sysc | --sys | --sy)
+    ac_prev=sysconfdir ;;
+  -sysconfdir=* | --sysconfdir=* | --sysconfdi=* | --sysconfd=* | --sysconf=* \
+  | --syscon=* | --sysco=* | --sysc=* | --sys=* | --sy=*)
+    sysconfdir=$ac_optarg ;;
+
+  -target | --target | --targe | --targ | --tar | --ta | --t)
+    ac_prev=target_alias ;;
+  -target=* | --target=* | --targe=* | --targ=* | --tar=* | --ta=* | --t=*)
+    target_alias=$ac_optarg ;;
+
+  -v | -verbose | --verbose | --verbos | --verbo | --verb)
+    verbose=yes ;;
+
+  -version | --version | --versio | --versi | --vers | -V)
+    ac_init_version=: ;;
+
+  -with-* | --with-*)
+    ac_useropt=`expr "x$ac_option" : 'x-*with-$^=*$'`
+    # Reject names that are not valid shell variable names.
+    expr "x$ac_useropt" : ".*^-+._$as_cr_alnum" >/dev/null &&
+      as_fn_error $? "invalid package name: \`$ac_useropt'"
+    ac_useropt_orig=$ac_useropt
+    ac_useropt=`printf "%s\n" "$ac_useropt" | sed 's/-+./_/g'`
+    case $ac_user_opts in
+      *"
+"with_$ac_useropt"
+"*) ;;
+      *) ac_unrecognized_opts="$ac_unrecognized_opts$ac_unrecognized_sep--with-$ac_useropt_orig"
+	 ac_unrecognized_sep=', ';;
+    esac
+    eval with_$ac_useropt=\$ac_optarg ;;
+
+  -without-* | --without-*)
+    ac_useropt=`expr "x$ac_option" : 'x-*without-$.*$'`
+    # Reject names that are not valid shell variable names.
+    expr "x$ac_useropt" : ".*^-+._$as_cr_alnum" >/dev/null &&
+      as_fn_error $? "invalid package name: \`$ac_useropt'"
+    ac_useropt_orig=$ac_useropt
+    ac_useropt=`printf "%s\n" "$ac_useropt" | sed 's/-+./_/g'`
+    case $ac_user_opts in
+      *"
+"with_$ac_useropt"
+"*) ;;
+      *) ac_unrecognized_opts="$ac_unrecognized_opts$ac_unrecognized_sep--without-$ac_useropt_orig"
+	 ac_unrecognized_sep=', ';;
+    esac
+    eval with_$ac_useropt=no ;;
+
+  --x)
+    # Obsolete; use --with-x.
+    with_x=yes ;;
+
+  -x-includes | --x-includes | --x-include | --x-includ | --x-inclu \
+  | --x-incl | --x-inc | --x-in | --x-i)
+    ac_prev=x_includes ;;
+  -x-includes=* | --x-includes=* | --x-include=* | --x-includ=* | --x-inclu=* \
+  | --x-incl=* | --x-inc=* | --x-in=* | --x-i=*)
+    x_includes=$ac_optarg ;;
+
+  -x-libraries | --x-libraries | --x-librarie | --x-librari \
+  | --x-librar | --x-libra | --x-libr | --x-lib | --x-li | --x-l)
+    ac_prev=x_libraries ;;
+  -x-libraries=* | --x-libraries=* | --x-librarie=* | --x-librari=* \
+  | --x-librar=* | --x-libra=* | --x-libr=* | --x-lib=* | --x-li=* | --x-l=*)
+    x_libraries=$ac_optarg ;;
+
+  -*) as_fn_error $? "unrecognized option: \`$ac_option'
+Try \`$0 --help' for more information"
+    ;;
+
+  *=*)
+    ac_envvar=`expr "x$ac_option" : 'x$^=*$='`
+    # Reject names that are not valid shell variable names.
+    case $ac_envvar in #(
+      '' | 0-9* | *!_$as_cr_alnum* )
+      as_fn_error $? "invalid variable name: \`$ac_envvar'" ;;
+    esac
+    eval $ac_envvar=\$ac_optarg
+    export $ac_envvar ;;
+
+  *)
+    # FIXME: should be removed in autoconf 3.0.
+    printf "%s\n" "$as_me: WARNING: you should use --build, --host, --target" >&2
+    expr "x$ac_option" : ".*^-._$as_cr_alnum" >/dev/null &&
+      printf "%s\n" "$as_me: WARNING: invalid host type: $ac_option" >&2
+    : "${build_alias=$ac_option} ${host_alias=$ac_option} ${target_alias=$ac_option}"
+    ;;
+
+  esac
+done
+
+if test -n "$ac_prev"; then
+  ac_option=--`echo $ac_prev | sed 's/_/-/g'`
+  as_fn_error $? "missing argument to $ac_option"
+fi
+
+if test -n "$ac_unrecognized_opts"; then
+  case $enable_option_checking in
+    no) ;;
+    fatal) as_fn_error $? "unrecognized options: $ac_unrecognized_opts" ;;
+    *)     printf "%s\n" "$as_me: WARNING: unrecognized options: $ac_unrecognized_opts" >&2 ;;
+  esac
+fi
+
+# Check all directory arguments for consistency.
+for ac_var in	exec_prefix prefix bindir sbindir libexecdir datarootdir \
+		datadir sysconfdir sharedstatedir localstatedir includedir \
+		oldincludedir docdir infodir htmldir dvidir pdfdir psdir \
+		libdir localedir mandir runstatedir
+do
+  eval ac_val=\$$ac_var
+  # Remove trailing slashes.
+  case $ac_val in
+    */ )
+      ac_val=`expr "X$ac_val" : 'X$.*^/$' \| "X$ac_val" : 'X$.*$'`
+      eval $ac_var=\$ac_val;;
+  esac
+  # Be sure to have absolute directory names.
+  case $ac_val in
+    \\/$* | ?:\\/* )  continue;;
+    NONE | '' ) case $ac_var in *prefix ) continue;; esac;;
+  esac
+  as_fn_error $? "expected an absolute directory name for --$ac_var: $ac_val"
+done
+
+# There might be people who depend on the old broken behavior: `$host'
+# used to hold the argument of --host etc.
+# FIXME: To remove some day.
+build=$build_alias
+host=$host_alias
+target=$target_alias
+
+# FIXME: To remove some day.
+if test "x$host_alias" != x; then
+  if test "x$build_alias" = x; then
+    cross_compiling=maybe
+  elif test "x$build_alias" != "x$host_alias"; then
+    cross_compiling=yes
+  fi
+fi
+
+ac_tool_prefix=
+test -n "$host_alias" && ac_tool_prefix=$host_alias-
+
+test "$silent" = yes && exec 6>/dev/null
+
+
+ac_pwd=`pwd` && test -n "$ac_pwd" &&
+ac_ls_di=`ls -di .` &&
+ac_pwd_ls_di=`cd "$ac_pwd" && ls -di .` ||
+  as_fn_error $? "working directory cannot be determined"
+test "X$ac_ls_di" = "X$ac_pwd_ls_di" ||
+  as_fn_error $? "pwd does not report name of working directory"
+
+
+# Find the source files, if location was not specified.
+if test -z "$srcdir"; then
+  ac_srcdir_defaulted=yes
+  # Try the directory containing this script, then the parent directory.
+  ac_confdir=`$as_dirname -- "$as_myself" ||
+$as_expr X"$as_myself" : 'X$.*^/$//*^/^/*/*$' \| \
+	 X"$as_myself" : 'X$//$^/' \| \
+	 X"$as_myself" : 'X$//$$' \| \
+	 X"$as_myself" : 'X$/$' \| . 2>/dev/null ||
+printf "%s\n" X"$as_myself" |
+    sed '/^X$.*^/$\/\/*^/^/*\/*$/{
+	    s//\1/
+	    q
+	  }
+	  /^X$\/\/$^/.*/{
+	    s//\1/
+	    q
+	  }
+	  /^X$\/\/$$/{
+	    s//\1/
+	    q
+	  }
+	  /^X$\/$.*/{
+	    s//\1/
+	    q
+	  }
+	  s/.*/./; q'`
+  srcdir=$ac_confdir
+  if test ! -r "$srcdir/$ac_unique_file"; then
+    srcdir=..
+  fi
+else
+  ac_srcdir_defaulted=no
+fi
+if test ! -r "$srcdir/$ac_unique_file"; then
+  test "$ac_srcdir_defaulted" = yes && srcdir="$ac_confdir or .."
+  as_fn_error $? "cannot find sources ($ac_unique_file) in $srcdir"
+fi
+ac_msg="sources are in $srcdir, but \`cd $srcdir' does not work"
+ac_abs_confdir=`(
+	cd "$srcdir" && test -r "./$ac_unique_file" || as_fn_error $? "$ac_msg"
+	pwd)`
+# When building in place, set srcdir=.
+if test "$ac_abs_confdir" = "$ac_pwd"; then
+  srcdir=.
+fi
+# Remove unnecessary trailing slashes from srcdir.
+# Double slashes in file names in object file debugging info
+# mess up M-x gdb in Emacs.
+case $srcdir in
+*/) srcdir=`expr "X$srcdir" : 'X$.*^/$' \| "X$srcdir" : 'X$.*$'`;;
+esac
+for ac_var in $ac_precious_vars; do
+  eval ac_env_${ac_var}_set=\${${ac_var}+set}
+  eval ac_env_${ac_var}_value=\$${ac_var}
+  eval ac_cv_env_${ac_var}_set=\${${ac_var}+set}
+  eval ac_cv_env_${ac_var}_value=\$${ac_var}
+done
+
+#
+# Report the --help message.
+#
+if test "$ac_init_help" = "long"; then
+  # Omit some internal or obsolete options to make the list less imposing.
+  # This message is too long to be a string in the A/UX 3.1 sh.
+  cat <<_ACEOF
+\`configure' configures this package to adapt to many kinds of systems.
+
+Usage: $0 OPTION... VAR=VALUE...
+
+To assign environment variables (e.g., CC, CFLAGS...), specify them as
+VAR=VALUE.  See below for descriptions of some of the useful variables.
+
+Defaults for the options are specified in brackets.
+
+Configuration:
+  -h, --help              display this help and exit
+      --help=short        display options specific to this package
+      --help=recursive    display the short help of all the included packages
+  -V, --version           display version information and exit
+  -q, --quiet, --silent   do not print \`checking ...' messages
+      --cache-file=FILE   cache test results in FILE disabled
+  -C, --config-cache      alias for \`--cache-file=config.cache'
+  -n, --no-create         do not create output files
+      --srcdir=DIR        find the sources in DIR configure dir or \`..'
+
+Installation directories:
+  --prefix=PREFIX         install architecture-independent files in PREFIX
+                          $ac_default_prefix
+  --exec-prefix=EPREFIX   install architecture-dependent files in EPREFIX
+                          PREFIX
+
+By default, \`make install' will install all the files in
+\`$ac_default_prefix/bin', \`$ac_default_prefix/lib' etc.  You can specify
+an installation prefix other than \`$ac_default_prefix' using \`--prefix',
+for instance \`--prefix=\$HOME'.
+
+For better control, use the options below.
+
+Fine tuning of the installation directories:
+  --bindir=DIR            user executables EPREFIX/bin
+  --sbindir=DIR           system admin executables EPREFIX/sbin
+  --libexecdir=DIR        program executables EPREFIX/libexec
+  --sysconfdir=DIR        read-only single-machine data PREFIX/etc
+  --sharedstatedir=DIR    modifiable architecture-independent data PREFIX/com
+  --localstatedir=DIR     modifiable single-machine data PREFIX/var
+  --runstatedir=DIR       modifiable per-process data LOCALSTATEDIR/run
+  --libdir=DIR            object code libraries EPREFIX/lib
+  --includedir=DIR        C header files PREFIX/include
+  --oldincludedir=DIR     C header files for non-gcc /usr/include
+  --datarootdir=DIR       read-only arch.-independent data root PREFIX/share
+  --datadir=DIR           read-only architecture-independent data DATAROOTDIR
+  --infodir=DIR           info documentation DATAROOTDIR/info
+  --localedir=DIR         locale-dependent data DATAROOTDIR/locale
+  --mandir=DIR            man documentation DATAROOTDIR/man
+  --docdir=DIR            documentation root DATAROOTDIR/doc/PACKAGE
+  --htmldir=DIR           html documentation DOCDIR
+  --dvidir=DIR            dvi documentation DOCDIR
+  --pdfdir=DIR            pdf documentation DOCDIR
+  --psdir=DIR             ps documentation DOCDIR
+_ACEOF
+
+  cat <<\_ACEOF
+
+System types:
+  --build=BUILD     configure for building on BUILD guessed
+  --host=HOST       cross-compile to build programs to run on HOST BUILD
+_ACEOF
+fi
+
+if test -n "$ac_init_help"; then
+
+  cat <<\_ACEOF
+
+Optional Features:
+  --disable-option-checking  ignore unrecognized --enable/--with options
+  --disable-FEATURE       do not include FEATURE (same as --enable-FEATURE=no)
+  --enable-FEATURE=ARG  include FEATURE ARG=yes
+  --disable-gdb           disable gdb debug extensions
+  --enable-debug          optimize for debugging
+  --enable-profiling      compile with profiling (-pg option)
+  --disable-largefile     omit support for large files
+  --enable-panic-abort    call abort() on panic to trap in the debugger
+  --disable-pdf-compression
+                          generate an uncompressed documentation PDF
+  --disable-gc            do not compile with dead code garbage collection
+                          support
+  --enable-lto            Try to enable link-time optimization for this
+                          compiler
+  --enable-sanitizer      compile with sanitizers enabled
+  --disable-pedantic      disable some extra paranoid compiler warnings
+  --enable-werror         compile with -Werror to error out on any warning
+  --enable-suggestions    compile with compiler suggestion warnings enabled
+
+Optional Packages:
+  --with-PACKAGE=ARG    use PACKAGE ARG=yes
+  --without-PACKAGE       do not use PACKAGE (same as --with-PACKAGE=no)
+  --with-nsis=makensis  build an install .exe using NSIS on Windows hosts
+
+Some influential environment variables:
+  CC          C compiler command
+  CFLAGS      C compiler flags
+  LDFLAGS     linker flags, e.g. -L<lib dir> if you have libraries in a
+              nonstandard directory <lib dir>
+  LIBS        libraries to pass to the linker, e.g. -l<library>
+  CPPFLAGS    (Objective) C/C++ preprocessor flags, e.g. -I<include dir> if
+              you have headers in a nonstandard directory <include dir>
+
+Use these variables to override the choices made by `configure' or to help
+it to find libraries and programs with nonstandard names/locations.
+
+Report bugs to the package provider.
+_ACEOF
+ac_status=$?
+fi
+
+if test "$ac_init_help" = "recursive"; then
+  # If there are subdirs, report their specific --help.
+  for ac_dir in : $ac_subdirs_all; do test "x$ac_dir" = x: && continue
+    test -d "$ac_dir" ||
+      { cd "$srcdir" && ac_pwd=`pwd` && srcdir=. && test -d "$ac_dir"; } ||
+      continue
+    ac_builddir=.
+
+case "$ac_dir" in
+.) ac_dir_suffix= ac_top_builddir_sub=. ac_top_build_prefix= ;;
+*)
+  ac_dir_suffix=/`printf "%s\n" "$ac_dir" | sed 's|^\.\\/||'`
+  # A ".." for each directory in $ac_dir_suffix.
+  ac_top_builddir_sub=`printf "%s\n" "$ac_dir_suffix" | sed 's|/^\\/*|/..|g;s|/||'`
+  case $ac_top_builddir_sub in
+  "") ac_top_builddir_sub=. ac_top_build_prefix= ;;
+  *)  ac_top_build_prefix=$ac_top_builddir_sub/ ;;
+  esac ;;
+esac
+ac_abs_top_builddir=$ac_pwd
+ac_abs_builddir=$ac_pwd$ac_dir_suffix
+# for backward compatibility:
+ac_top_builddir=$ac_top_build_prefix
+
+case $srcdir in
+  .)  # We are building in place.
+    ac_srcdir=.
+    ac_top_srcdir=$ac_top_builddir_sub
+    ac_abs_top_srcdir=$ac_pwd ;;
+  \\/* | ?:\\/* )  # Absolute name.
+    ac_srcdir=$srcdir$ac_dir_suffix;
+    ac_top_srcdir=$srcdir
+    ac_abs_top_srcdir=$srcdir ;;
+  *) # Relative name.
+    ac_srcdir=$ac_top_build_prefix$srcdir$ac_dir_suffix
+    ac_top_srcdir=$ac_top_build_prefix$srcdir
+    ac_abs_top_srcdir=$ac_pwd/$srcdir ;;
+esac
+ac_abs_srcdir=$ac_abs_top_srcdir$ac_dir_suffix
+
+    cd "$ac_dir" || { ac_status=$?; continue; }
+    # Check for configure.gnu first; this name is used for a wrapper for
+    # Metaconfig's "Configure" on case-insensitive file systems.
+    if test -f "$ac_srcdir/configure.gnu"; then
+      echo &&
+      $SHELL "$ac_srcdir/configure.gnu" --help=recursive
+    elif test -f "$ac_srcdir/configure"; then
+      echo &&
+      $SHELL "$ac_srcdir/configure" --help=recursive
+    else
+      printf "%s\n" "$as_me: WARNING: no configuration information is in $ac_dir" >&2
+    fi || ac_status=$?
+    cd "$ac_pwd" || { ac_status=$?; break; }
+  done
+fi
+
+test -n "$ac_init_help" && exit $ac_status
+if $ac_init_version; then
+  cat <<\_ACEOF
+configure
+generated by GNU Autoconf 2.71
+
+Copyright (C) 2021 Free Software Foundation, Inc.
+This configure script is free software; the Free Software Foundation
+gives unlimited permission to copy, distribute and modify it.
+_ACEOF
+  exit
+fi
+
+## ------------------------ ##
+## Autoconf initialization. ##
+## ------------------------ ##
+
+# ac_fn_c_try_compile LINENO
+# --------------------------
+# Try to compile conftest.$ac_ext, and return whether this succeeded.
+ac_fn_c_try_compile ()
+{
+  as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
+  rm -f conftest.$ac_objext conftest.beam
+  if { { ac_try="$ac_compile"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\""
+printf "%s\n" "$ac_try_echo"; } >&5
+  (eval "$ac_compile") 2>conftest.err
+  ac_status=$?
+  if test -s conftest.err; then
+    grep -v '^ *+' conftest.err >conftest.er1
+    cat conftest.er1 >&5
+    mv -f conftest.er1 conftest.err
+  fi
+  printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+  test $ac_status = 0; } && {
+	 test -z "$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest.$ac_objext
+then :
+  ac_retval=0
+else $as_nop
+  printf "%s\n" "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+	ac_retval=1
+fi
+  eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno
+  as_fn_set_status $ac_retval
+
+} # ac_fn_c_try_compile
+
+# ac_fn_c_check_header_compile LINENO HEADER VAR INCLUDES
+# -------------------------------------------------------
+# Tests whether HEADER exists and can be compiled using the include files in
+# INCLUDES, setting the cache variable VAR accordingly.
+ac_fn_c_check_header_compile ()
+{
+  as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $2" >&5
+printf %s "checking for $2... " >&6; }
+if eval test \${$3+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+$4
+#include <$2>
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  eval "$3=yes"
+else $as_nop
+  eval "$3=no"
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+fi
+eval ac_res=\$$3
+	       { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5
+printf "%s\n" "$ac_res" >&6; }
+  eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno
+
+} # ac_fn_c_check_header_compile
+
+# ac_fn_c_try_link LINENO
+# -----------------------
+# Try to link conftest.$ac_ext, and return whether this succeeded.
+ac_fn_c_try_link ()
+{
+  as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
+  rm -f conftest.$ac_objext conftest.beam conftest$ac_exeext
+  if { { ac_try="$ac_link"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\""
+printf "%s\n" "$ac_try_echo"; } >&5
+  (eval "$ac_link") 2>conftest.err
+  ac_status=$?
+  if test -s conftest.err; then
+    grep -v '^ *+' conftest.err >conftest.er1
+    cat conftest.er1 >&5
+    mv -f conftest.er1 conftest.err
+  fi
+  printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+  test $ac_status = 0; } && {
+	 test -z "$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest$ac_exeext && {
+	 test "$cross_compiling" = yes ||
+	 test -x conftest$ac_exeext
+       }
+then :
+  ac_retval=0
+else $as_nop
+  printf "%s\n" "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+	ac_retval=1
+fi
+  # Delete the IPA/IPO (Inter Procedural Analysis/Optimization) information
+  # created by the PGI compiler (conftest_ipa8_conftest.oo), as it would
+  # interfere with the next link command; also delete a directory that is
+  # left behind by Apple's compiler.  We do this before executing the actions.
+  rm -rf conftest.dSYM conftest_ipa8_conftest.oo
+  eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno
+  as_fn_set_status $ac_retval
+
+} # ac_fn_c_try_link
+
+# ac_fn_c_check_type LINENO TYPE VAR INCLUDES
+# -------------------------------------------
+# Tests whether TYPE exists after having included INCLUDES, setting cache
+# variable VAR accordingly.
+ac_fn_c_check_type ()
+{
+  as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $2" >&5
+printf %s "checking for $2... " >&6; }
+if eval test \${$3+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  eval "$3=no"
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+$4
+int
+main (void)
+{
+if (sizeof ($2))
+	 return 0;
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+$4
+int
+main (void)
+{
+if (sizeof (($2)))
+	    return 0;
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+
+else $as_nop
+  eval "$3=yes"
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+fi
+eval ac_res=\$$3
+	       { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5
+printf "%s\n" "$ac_res" >&6; }
+  eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno
+
+} # ac_fn_c_check_type
+
+# ac_fn_c_check_func LINENO FUNC VAR
+# ----------------------------------
+# Tests whether FUNC exists, setting the cache variable VAR accordingly
+ac_fn_c_check_func ()
+{
+  as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $2" >&5
+printf %s "checking for $2... " >&6; }
+if eval test \${$3+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+/* Define $2 to an innocuous variant, in case <limits.h> declares $2.
+   For example, HP-UX 11i <limits.h> declares gettimeofday.  */
+#define $2 innocuous_$2
+
+/* System header to define __stub macros and hopefully few prototypes,
+   which can conflict with char $2 (); below.  */
+
+#include <limits.h>
+#undef $2
+
+/* Override any GCC internal prototype to avoid an error.
+   Use char because int might match the return type of a GCC
+   builtin and then its argument prototype would still apply.  */
+#ifdef __cplusplus
+extern "C"
+#endif
+char $2 ();
+/* The GNU C library defines this for functions which it implements
+    to always fail with ENOSYS.  Some functions are actually named
+    something starting with __ and the normal name is an alias.  */
+#if defined __stub_$2 || defined __stub___$2
+choke me
+#endif
+
+int
+main (void)
+{
+return $2 ();
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  eval "$3=yes"
+else $as_nop
+  eval "$3=no"
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+eval ac_res=\$$3
+	       { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5
+printf "%s\n" "$ac_res" >&6; }
+  eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno
+
+} # ac_fn_c_check_func
+
+# ac_fn_c_try_run LINENO
+# ----------------------
+# Try to run conftest.$ac_ext, and return whether this succeeded. Assumes that
+# executables *can* be run.
+ac_fn_c_try_run ()
+{
+  as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
+  if { { ac_try="$ac_link"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\""
+printf "%s\n" "$ac_try_echo"; } >&5
+  (eval "$ac_link") 2>&5
+  ac_status=$?
+  printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+  test $ac_status = 0; } && { ac_try='./conftest$ac_exeext'
+  { { case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\""
+printf "%s\n" "$ac_try_echo"; } >&5
+  (eval "$ac_try") 2>&5
+  ac_status=$?
+  printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+  test $ac_status = 0; }; }
+then :
+  ac_retval=0
+else $as_nop
+  printf "%s\n" "$as_me: program exited with status $ac_status" >&5
+       printf "%s\n" "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+       ac_retval=$ac_status
+fi
+  rm -rf conftest.dSYM conftest_ipa8_conftest.oo
+  eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno
+  as_fn_set_status $ac_retval
+
+} # ac_fn_c_try_run
+
+# ac_fn_check_decl LINENO SYMBOL VAR INCLUDES EXTRA-OPTIONS FLAG-VAR
+# ------------------------------------------------------------------
+# Tests whether SYMBOL is declared in INCLUDES, setting cache variable VAR
+# accordingly. Pass EXTRA-OPTIONS to the compiler, using FLAG-VAR.
+ac_fn_check_decl ()
+{
+  as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
+  as_decl_name=`echo $2|sed 's/ *(.*//'`
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether $as_decl_name is declared" >&5
+printf %s "checking whether $as_decl_name is declared... " >&6; }
+if eval test \${$3+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  as_decl_use=`echo $2|sed -e 's/(/((/' -e 's/)/) 0&/' -e 's/,/) 0& (/g'`
+  eval ac_save_FLAGS=\$$6
+  as_fn_append $6 " $5"
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+$4
+int
+main (void)
+{
+#ifndef $as_decl_name
+#ifdef __cplusplus
+  (void) $as_decl_use;
+#else
+  (void) $as_decl_name;
+#endif
+#endif
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  eval "$3=yes"
+else $as_nop
+  eval "$3=no"
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+  eval $6=\$ac_save_FLAGS
+
+fi
+eval ac_res=\$$3
+	       { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5
+printf "%s\n" "$ac_res" >&6; }
+  eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno
+
+} # ac_fn_check_decl
+ac_configure_args_raw=
+for ac_arg
+do
+  case $ac_arg in
+  *\'*)
+    ac_arg=`printf "%s\n" "$ac_arg" | sed "s/'/'\\\\\\\\''/g"` ;;
+  esac
+  as_fn_append ac_configure_args_raw " '$ac_arg'"
+done
+
+case $ac_configure_args_raw in
+  *$as_nl*)
+    ac_safe_unquote= ;;
+  *)
+    ac_unsafe_z='|&;<>()$`\\"*? ''	' # This string ends in space, tab.
+    ac_unsafe_a="$ac_unsafe_z#~"
+    ac_safe_unquote="s/ '\$^$ac_unsafe_a^$ac_unsafe_z*\$'/ \\1/g"
+    ac_configure_args_raw=`      printf "%s\n" "$ac_configure_args_raw" | sed "$ac_safe_unquote"`;;
+esac
+
+cat >config.log <<_ACEOF
+This file contains any messages produced by compilers while
+running configure, to aid debugging if configure makes a mistake.
+
+It was created by $as_me, which was
+generated by GNU Autoconf 2.71.  Invocation command line was
+
+  $ $0$ac_configure_args_raw
+
+_ACEOF
+exec 5>>config.log
+{
+cat <<_ASUNAME
+## --------- ##
+## Platform. ##
+## --------- ##
+
+hostname = `(hostname || uname -n) 2>/dev/null | sed 1q`
+uname -m = `(uname -m) 2>/dev/null || echo unknown`
+uname -r = `(uname -r) 2>/dev/null || echo unknown`
+uname -s = `(uname -s) 2>/dev/null || echo unknown`
+uname -v = `(uname -v) 2>/dev/null || echo unknown`
+
+/usr/bin/uname -p = `(/usr/bin/uname -p) 2>/dev/null || echo unknown`
+/bin/uname -X     = `(/bin/uname -X) 2>/dev/null     || echo unknown`
+
+/bin/arch              = `(/bin/arch) 2>/dev/null              || echo unknown`
+/usr/bin/arch -k       = `(/usr/bin/arch -k) 2>/dev/null       || echo unknown`
+/usr/convex/getsysinfo = `(/usr/convex/getsysinfo) 2>/dev/null || echo unknown`
+/usr/bin/hostinfo      = `(/usr/bin/hostinfo) 2>/dev/null      || echo unknown`
+/bin/machine           = `(/bin/machine) 2>/dev/null           || echo unknown`
+/usr/bin/oslevel       = `(/usr/bin/oslevel) 2>/dev/null       || echo unknown`
+/bin/universe          = `(/bin/universe) 2>/dev/null          || echo unknown`
+
+_ASUNAME
+
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    printf "%s\n" "PATH: $as_dir"
+  done
+IFS=$as_save_IFS
+
+} >&5
+
+cat >&5 <<_ACEOF
+
+
+## ----------- ##
+## Core tests. ##
+## ----------- ##
+
+_ACEOF
+
+
+# Keep a trace of the command line.
+# Strip out --no-create and --no-recursion so they do not pile up.
+# Strip out --silent because we don't want to record it for future runs.
+# Also quote any args containing shell meta-characters.
+# Make two passes to allow for proper duplicate-argument suppression.
+ac_configure_args=
+ac_configure_args0=
+ac_configure_args1=
+ac_must_keep_next=false
+for ac_pass in 1 2
+do
+  for ac_arg
+  do
+    case $ac_arg in
+    -no-create | --no-c* | -n | -no-recursion | --no-r*) continue ;;
+    -q | -quiet | --quiet | --quie | --qui | --qu | --q \
+    | -silent | --silent | --silen | --sile | --sil)
+      continue ;;
+    *\'*)
+      ac_arg=`printf "%s\n" "$ac_arg" | sed "s/'/'\\\\\\\\''/g"` ;;
+    esac
+    case $ac_pass in
+    1) as_fn_append ac_configure_args0 " '$ac_arg'" ;;
+    2)
+      as_fn_append ac_configure_args1 " '$ac_arg'"
+      if test $ac_must_keep_next = true; then
+	ac_must_keep_next=false # Got value, back to normal.
+      else
+	case $ac_arg in
+	  *=* | --config-cache | -C | -disable-* | --disable-* \
+	  | -enable-* | --enable-* | -gas | --g* | -nfp | --nf* \
+	  | -q | -quiet | --q* | -silent | --sil* | -v | -verb* \
+	  | -with-* | --with-* | -without-* | --without-* | --x)
+	    case "$ac_configure_args0 " in
+	      "$ac_configure_args1"*" '$ac_arg' "* ) continue ;;
+	    esac
+	    ;;
+	  -* ) ac_must_keep_next=true ;;
+	esac
+      fi
+      as_fn_append ac_configure_args " '$ac_arg'"
+      ;;
+    esac
+  done
+done
+{ ac_configure_args0=; unset ac_configure_args0;}
+{ ac_configure_args1=; unset ac_configure_args1;}
+
+# When interrupted or exit'd, cleanup temporary files, and complete
+# config.log.  We remove comments because anyway the quotes in there
+# would cause problems or look ugly.
+# WARNING: Use '\'' to represent an apostrophe within the trap.
+# WARNING: Do not start the trap code with a newline, due to a FreeBSD 4.0 bug.
+trap 'exit_status=$?
+  # Sanitize IFS.
+  IFS=" ""	$as_nl"
+  # Save into config.log some information that might help in debugging.
+  {
+    echo
+
+    printf "%s\n" "## ---------------- ##
+## Cache variables. ##
+## ---------------- ##"
+    echo
+    # The following way of writing the cache mishandles newlines in values,
+(
+  for ac_var in `(set) 2>&1 | sed -n '\''s/^$a-zA-Z_a-zA-Z0-9_*$=.*/\1/p'\''`; do
+    eval ac_val=\$$ac_var
+    case $ac_val in #(
+    *${as_nl}*)
+      case $ac_var in #(
+      *_cv_*) { printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: cache variable $ac_var contains a newline" >&5
+printf "%s\n" "$as_me: WARNING: cache variable $ac_var contains a newline" >&2;} ;;
+      esac
+      case $ac_var in #(
+      _ | IFS | as_nl) ;; #(
+      BASH_ARGV | BASH_SOURCE) eval $ac_var= ;; #(
+      *) { eval $ac_var=; unset $ac_var;} ;;
+      esac ;;
+    esac
+  done
+  (set) 2>&1 |
+    case $as_nl`(ac_space='\'' '\''; set) 2>&1` in #(
+    *${as_nl}ac_space=\ *)
+      sed -n \
+	"s/'\''/'\''\\\\'\'''\''/g;
+	  s/^\$_$as_cr_alnum*_cv__$as_cr_alnum*\$=\$.*\$/\\1='\''\\2'\''/p"
+      ;; #(
+    *)
+      sed -n "/^_$as_cr_alnum*_cv__$as_cr_alnum*=/p"
+      ;;
+    esac |
+    sort
+)
+    echo
+
+    printf "%s\n" "## ----------------- ##
+## Output variables. ##
+## ----------------- ##"
+    echo
+    for ac_var in $ac_subst_vars
+    do
+      eval ac_val=\$$ac_var
+      case $ac_val in
+      *\'\''*) ac_val=`printf "%s\n" "$ac_val" | sed "s/'\''/'\''\\\\\\\\'\'''\''/g"`;;
+      esac
+      printf "%s\n" "$ac_var='\''$ac_val'\''"
+    done | sort
+    echo
+
+    if test -n "$ac_subst_files"; then
+      printf "%s\n" "## ------------------- ##
+## File substitutions. ##
+## ------------------- ##"
+      echo
+      for ac_var in $ac_subst_files
+      do
+	eval ac_val=\$$ac_var
+	case $ac_val in
+	*\'\''*) ac_val=`printf "%s\n" "$ac_val" | sed "s/'\''/'\''\\\\\\\\'\'''\''/g"`;;
+	esac
+	printf "%s\n" "$ac_var='\''$ac_val'\''"
+      done | sort
+      echo
+    fi
+
+    if test -s confdefs.h; then
+      printf "%s\n" "## ----------- ##
+## confdefs.h. ##
+## ----------- ##"
+      echo
+      cat confdefs.h
+      echo
+    fi
+    test "$ac_signal" != 0 &&
+      printf "%s\n" "$as_me: caught signal $ac_signal"
+    printf "%s\n" "$as_me: exit $exit_status"
+  } >&5
+  rm -f core *.core core.conftest.* &&
+    rm -f -r conftest* confdefs* conf$$* $ac_clean_files &&
+    exit $exit_status
+' 0
+for ac_signal in 1 2 13 15; do
+  trap 'ac_signal='$ac_signal'; as_fn_exit 1' $ac_signal
+done
+ac_signal=0
+
+# confdefs.h avoids OS command line length limits that DEFS can exceed.
+rm -f -r conftest* confdefs.h
+
+printf "%s\n" "/* confdefs.h */" > confdefs.h
+
+# Predefined preprocessor variables.
+
+printf "%s\n" "#define PACKAGE_NAME \"$PACKAGE_NAME\"" >>confdefs.h
+
+printf "%s\n" "#define PACKAGE_TARNAME \"$PACKAGE_TARNAME\"" >>confdefs.h
+
+printf "%s\n" "#define PACKAGE_VERSION \"$PACKAGE_VERSION\"" >>confdefs.h
+
+printf "%s\n" "#define PACKAGE_STRING \"$PACKAGE_STRING\"" >>confdefs.h
+
+printf "%s\n" "#define PACKAGE_BUGREPORT \"$PACKAGE_BUGREPORT\"" >>confdefs.h
+
+printf "%s\n" "#define PACKAGE_URL \"$PACKAGE_URL\"" >>confdefs.h
+
+
+# Let the site file select an alternate cache file if it wants to.
+# Prefer an explicitly selected file to automatically selected ones.
+if test -n "$CONFIG_SITE"; then
+  ac_site_files="$CONFIG_SITE"
+elif test "x$prefix" != xNONE; then
+  ac_site_files="$prefix/share/config.site $prefix/etc/config.site"
+else
+  ac_site_files="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site"
+fi
+
+for ac_site_file in $ac_site_files
+do
+  case $ac_site_file in #(
+  */*) :
+     ;; #(
+  *) :
+    ac_site_file=./$ac_site_file ;;
+esac
+  if test -f "$ac_site_file" && test -r "$ac_site_file"; then
+    { printf "%s\n" "$as_me:${as_lineno-$LINENO}: loading site script $ac_site_file" >&5
+printf "%s\n" "$as_me: loading site script $ac_site_file" >&6;}
+    sed 's/^/| /' "$ac_site_file" >&5
+    . "$ac_site_file" \
+      || { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
+as_fn_error $? "failed to load site script $ac_site_file
+See \`config.log' for more details" "$LINENO" 5; }
+  fi
+done
+
+if test -r "$cache_file"; then
+  # Some versions of bash will fail to source /dev/null (special files
+  # actually), so we avoid doing that.  DJGPP emulates it as a regular file.
+  if test /dev/null != "$cache_file" && test -f "$cache_file"; then
+    { printf "%s\n" "$as_me:${as_lineno-$LINENO}: loading cache $cache_file" >&5
+printf "%s\n" "$as_me: loading cache $cache_file" >&6;}
+    case $cache_file in
+      \\/* | ?:\\/* ) . "$cache_file";;
+      *)                      . "./$cache_file";;
+    esac
+  fi
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: creating cache $cache_file" >&5
+printf "%s\n" "$as_me: creating cache $cache_file" >&6;}
+  >$cache_file
+fi
+
+# Test code for whether the C compiler supports C89 (global declarations)
+ac_c_conftest_c89_globals='
+/* Does the compiler advertise C89 conformance?
+   Do not test the value of __STDC__, because some compilers set it to 0
+   while being otherwise adequately conformant. */
+#if !defined __STDC__
+# error "Compiler does not advertise C89 conformance"
+#endif
+
+#include <stddef.h>
+#include <stdarg.h>
+struct stat;
+/* Most of the following tests are stolen from RCS 5.7 src/conf.sh.  */
+struct buf { int x; };
+struct buf * (*rcsopen) (struct buf *, struct stat *, int);
+static char *e (p, i)
+     char **p;
+     int i;
+{
+  return pi;
+}
+static char *f (char * (*g) (char **, int), char **p, ...)
+{
+  char *s;
+  va_list v;
+  va_start (v,p);
+  s = g (p, va_arg (v,int));
+  va_end (v);
+  return s;
+}
+
+/* OSF 4.0 Compaq cc is some sort of almost-ANSI by default.  It has
+   function prototypes and stuff, but not \xHH hex character constants.
+   These do not provoke an error unfortunately, instead are silently treated
+   as an "x".  The following induces an error, until -std is added to get
+   proper ANSI mode.  Curiously \x00 != x always comes out true, for an
+   array size at least.  It is necessary to write \x00 == 0 to get something
+   that is true only with -std.  */
+int osf4_cc_array '\''\x00'\'' == 0 ? 1 : -1;
+
+/* IBM C 6 for AIX is almost-ANSI by default, but it replaces macro parameters
+   inside strings and character constants.  */
+#define FOO(x) '\''x'\''
+int xlc6_cc_arrayFOO(a) == '\''x'\'' ? 1 : -1;
+
+int test (int i, double x);
+struct s1 {int (*f) (int a);};
+struct s2 {int (*f) (double a);};
+int pairnames (int, char **, int *(*)(struct buf *, struct stat *, int),
+               int, int);'
+
+# Test code for whether the C compiler supports C89 (body of main).
+ac_c_conftest_c89_main='
+ok |= (argc == 0 || f (e, argv, 0) != argv0 || f (e, argv, 1) != argv1);
+'
+
+# Test code for whether the C compiler supports C99 (global declarations)
+ac_c_conftest_c99_globals='
+// Does the compiler advertise C99 conformance?
+#if !defined __STDC_VERSION__ || __STDC_VERSION__ < 199901L
+# error "Compiler does not advertise C99 conformance"
+#endif
+
+#include <stdbool.h>
+extern int puts (const char *);
+extern int printf (const char *, ...);
+extern int dprintf (int, const char *, ...);
+extern void *malloc (size_t);
+
+// Check varargs macros.  These examples are taken from C99 6.10.3.5.
+// dprintf is used instead of fprintf to avoid needing to declare
+// FILE and stderr.
+#define debug(...) dprintf (2, __VA_ARGS__)
+#define showlist(...) puts (#__VA_ARGS__)
+#define report(test,...) ((test) ? puts (#test) : printf (__VA_ARGS__))
+static void
+test_varargs_macros (void)
+{
+  int x = 1234;
+  int y = 5678;
+  debug ("Flag");
+  debug ("X = %d\n", x);
+  showlist (The first, second, and third items.);
+  report (x>y, "x is %d but y is %d", x, y);
+}
+
+// Check long long types.
+#define BIG64 18446744073709551615ull
+#define BIG32 4294967295ul
+#define BIG_OK (BIG64 / BIG32 == 4294967297ull && BIG64 % BIG32 == 0)
+#if !BIG_OK
+  #error "your preprocessor is broken"
+#endif
+#if BIG_OK
+#else
+  #error "your preprocessor is broken"
+#endif
+static long long int bignum = -9223372036854775807LL;
+static unsigned long long int ubignum = BIG64;
+
+struct incomplete_array
+{
+  int datasize;
+  double data;
+};
+
+struct named_init {
+  int number;
+  const wchar_t *name;
+  double average;
+};
+
+typedef const char *ccp;
+
+static inline int
+test_restrict (ccp restrict text)
+{
+  // See if C++-style comments work.
+  // Iterate through items via the restricted pointer.
+  // Also check for declarations in for loops.
+  for (unsigned int i = 0; *(text+i) != '\''\0'\''; ++i)
+    continue;
+  return 0;
+}
+
+// Check varargs and va_copy.
+static bool
+test_varargs (const char *format, ...)
+{
+  va_list args;
+  va_start (args, format);
+  va_list args_copy;
+  va_copy (args_copy, args);
+
+  const char *str = "";
+  int number = 0;
+  float fnumber = 0;
+
+  while (*format)
+    {
+      switch (*format++)
+	{
+	case '\''s'\'': // string
+	  str = va_arg (args_copy, const char *);
+	  break;
+	case '\''d'\'': // int
+	  number = va_arg (args_copy, int);
+	  break;
+	case '\''f'\'': // float
+	  fnumber = va_arg (args_copy, double);
+	  break;
+	default:
+	  break;
+	}
+    }
+  va_end (args_copy);
+  va_end (args);
+
+  return *str && number && fnumber;
+}
+'
+
+# Test code for whether the C compiler supports C99 (body of main).
+ac_c_conftest_c99_main='
+  // Check bool.
+  _Bool success = false;
+  success |= (argc != 0);
+
+  // Check restrict.
+  if (test_restrict ("String literal") == 0)
+    success = true;
+  char *restrict newvar = "Another string";
+
+  // Check varargs.
+  success &= test_varargs ("s, d'\'' f .", "string", 65, 34.234);
+  test_varargs_macros ();
+
+  // Check flexible array members.
+  struct incomplete_array *ia =
+    malloc (sizeof (struct incomplete_array) + (sizeof (double) * 10));
+  ia->datasize = 10;
+  for (int i = 0; i < ia->datasize; ++i)
+    ia->datai = i * 1.234;
+
+  // Check named initializers.
+  struct named_init ni = {
+    .number = 34,
+    .name = L"Test wide string",
+    .average = 543.34343,
+  };
+
+  ni.number = 58;
+
+  int dynamic_arrayni.number;
+  dynamic_array0 = argv00;
+  dynamic_arrayni.number - 1 = 543;
+
+  // work around unused variable warnings
+  ok |= (!success || bignum == 0LL || ubignum == 0uLL || newvar0 == '\''x'\''
+	 || dynamic_arrayni.number - 1 != 543);
+'
+
+# Test code for whether the C compiler supports C11 (global declarations)
+ac_c_conftest_c11_globals='
+// Does the compiler advertise C11 conformance?
+#if !defined __STDC_VERSION__ || __STDC_VERSION__ < 201112L
+# error "Compiler does not advertise C11 conformance"
+#endif
+
+// Check _Alignas.
+char _Alignas (double) aligned_as_double;
+char _Alignas (0) no_special_alignment;
+extern char aligned_as_int;
+char _Alignas (0) _Alignas (int) aligned_as_int;
+
+// Check _Alignof.
+enum
+{
+  int_alignment = _Alignof (int),
+  int_array_alignment = _Alignof (int100),
+  char_alignment = _Alignof (char)
+};
+_Static_assert (0 < -_Alignof (int), "_Alignof is signed");
+
+// Check _Noreturn.
+int _Noreturn does_not_return (void) { for (;;) continue; }
+
+// Check _Static_assert.
+struct test_static_assert
+{
+  int x;
+  _Static_assert (sizeof (int) <= sizeof (long int),
+                  "_Static_assert does not work in struct");
+  long int y;
+};
+
+// Check UTF-8 literals.
+#define u8 syntax error!
+char const utf8_literal = u8"happens to be ASCII" "another string";
+
+// Check duplicate typedefs.
+typedef long *long_ptr;
+typedef long int *long_ptr;
+typedef long_ptr long_ptr;
+
+// Anonymous structures and unions -- taken from C11 6.7.2.1 Example 1.
+struct anonymous
+{
+  union {
+    struct { int i; int j; };
+    struct { int k; long int l; } w;
+  };
+  int m;
+} v1;
+'
+
+# Test code for whether the C compiler supports C11 (body of main).
+ac_c_conftest_c11_main='
+  _Static_assert ((offsetof (struct anonymous, i)
+		   == offsetof (struct anonymous, w.k)),
+		  "Anonymous union alignment botch");
+  v1.i = 2;
+  v1.w.k = 5;
+  ok |= v1.i != 5;
+'
+
+# Test code for whether the C compiler supports C11 (complete).
+ac_c_conftest_c11_program="${ac_c_conftest_c89_globals}
+${ac_c_conftest_c99_globals}
+${ac_c_conftest_c11_globals}
+
+int
+main (int argc, char **argv)
+{
+  int ok = 0;
+  ${ac_c_conftest_c89_main}
+  ${ac_c_conftest_c99_main}
+  ${ac_c_conftest_c11_main}
+  return ok;
+}
+"
+
+# Test code for whether the C compiler supports C99 (complete).
+ac_c_conftest_c99_program="${ac_c_conftest_c89_globals}
+${ac_c_conftest_c99_globals}
+
+int
+main (int argc, char **argv)
+{
+  int ok = 0;
+  ${ac_c_conftest_c89_main}
+  ${ac_c_conftest_c99_main}
+  return ok;
+}
+"
+
+# Test code for whether the C compiler supports C89 (complete).
+ac_c_conftest_c89_program="${ac_c_conftest_c89_globals}
+
+int
+main (int argc, char **argv)
+{
+  int ok = 0;
+  ${ac_c_conftest_c89_main}
+  return ok;
+}
+"
+
+as_fn_append ac_header_c_list " stdio.h stdio_h HAVE_STDIO_H"
+as_fn_append ac_header_c_list " stdlib.h stdlib_h HAVE_STDLIB_H"
+as_fn_append ac_header_c_list " string.h string_h HAVE_STRING_H"
+as_fn_append ac_header_c_list " inttypes.h inttypes_h HAVE_INTTYPES_H"
+as_fn_append ac_header_c_list " stdint.h stdint_h HAVE_STDINT_H"
+as_fn_append ac_header_c_list " strings.h strings_h HAVE_STRINGS_H"
+as_fn_append ac_header_c_list " sys/stat.h sys_stat_h HAVE_SYS_STAT_H"
+as_fn_append ac_header_c_list " sys/types.h sys_types_h HAVE_SYS_TYPES_H"
+as_fn_append ac_header_c_list " unistd.h unistd_h HAVE_UNISTD_H"
+as_fn_append ac_header_c_list " wchar.h wchar_h HAVE_WCHAR_H"
+as_fn_append ac_header_c_list " minix/config.h minix_config_h HAVE_MINIX_CONFIG_H"
+as_fn_append ac_header_c_list " sys/param.h sys_param_h HAVE_SYS_PARAM_H"
+as_fn_append ac_func_c_list " getpagesize HAVE_GETPAGESIZE"
+
+# Auxiliary files required by this configure script.
+ac_aux_files="install-sh config.guess config.sub"
+
+# Locations in which to look for auxiliary files.
+ac_aux_dir_candidates="${srcdir}/autoconf/helpers"
+
+# Search for a directory containing all of the required auxiliary files,
+# $ac_aux_files, from the $PATH-style list $ac_aux_dir_candidates.
+# If we don't find one directory that contains all the files we need,
+# we report the set of missing files from the *first* directory in
+# $ac_aux_dir_candidates and give up.
+ac_missing_aux_files=""
+ac_first_candidate=:
+printf "%s\n" "$as_me:${as_lineno-$LINENO}: looking for aux files: $ac_aux_files" >&5
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+as_found=false
+for as_dir in $ac_aux_dir_candidates
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+  as_found=:
+
+  printf "%s\n" "$as_me:${as_lineno-$LINENO}:  trying $as_dir" >&5
+  ac_aux_dir_found=yes
+  ac_install_sh=
+  for ac_aux in $ac_aux_files
+  do
+    # As a special case, if "install-sh" is required, that requirement
+    # can be satisfied by any of "install-sh", "install.sh", or "shtool",
+    # and $ac_install_sh is set appropriately for whichever one is found.
+    if test x"$ac_aux" = x"install-sh"
+    then
+      if test -f "${as_dir}install-sh"; then
+        printf "%s\n" "$as_me:${as_lineno-$LINENO}:   ${as_dir}install-sh found" >&5
+        ac_install_sh="${as_dir}install-sh -c"
+      elif test -f "${as_dir}install.sh"; then
+        printf "%s\n" "$as_me:${as_lineno-$LINENO}:   ${as_dir}install.sh found" >&5
+        ac_install_sh="${as_dir}install.sh -c"
+      elif test -f "${as_dir}shtool"; then
+        printf "%s\n" "$as_me:${as_lineno-$LINENO}:   ${as_dir}shtool found" >&5
+        ac_install_sh="${as_dir}shtool install -c"
+      else
+        ac_aux_dir_found=no
+        if $ac_first_candidate; then
+          ac_missing_aux_files="${ac_missing_aux_files} install-sh"
+        else
+          break
+        fi
+      fi
+    else
+      if test -f "${as_dir}${ac_aux}"; then
+        printf "%s\n" "$as_me:${as_lineno-$LINENO}:   ${as_dir}${ac_aux} found" >&5
+      else
+        ac_aux_dir_found=no
+        if $ac_first_candidate; then
+          ac_missing_aux_files="${ac_missing_aux_files} ${ac_aux}"
+        else
+          break
+        fi
+      fi
+    fi
+  done
+  if test "$ac_aux_dir_found" = yes; then
+    ac_aux_dir="$as_dir"
+    break
+  fi
+  ac_first_candidate=false
+
+  as_found=false
+done
+IFS=$as_save_IFS
+if $as_found
+then :
+
+else $as_nop
+  as_fn_error $? "cannot find required auxiliary files:$ac_missing_aux_files" "$LINENO" 5
+fi
+
+
+# These three variables are undocumented and unsupported,
+# and are intended to be withdrawn in a future Autoconf release.
+# They can cause serious problems if a builder's source tree is in a directory
+# whose full name contains unusual characters.
+if test -f "${ac_aux_dir}config.guess"; then
+  ac_config_guess="$SHELL ${ac_aux_dir}config.guess"
+fi
+if test -f "${ac_aux_dir}config.sub"; then
+  ac_config_sub="$SHELL ${ac_aux_dir}config.sub"
+fi
+if test -f "$ac_aux_dir/configure"; then
+  ac_configure="$SHELL ${ac_aux_dir}configure"
+fi
+
+# Check that the precious variables saved in the cache have kept the same
+# value.
+ac_cache_corrupted=false
+for ac_var in $ac_precious_vars; do
+  eval ac_old_set=\$ac_cv_env_${ac_var}_set
+  eval ac_new_set=\$ac_env_${ac_var}_set
+  eval ac_old_val=\$ac_cv_env_${ac_var}_value
+  eval ac_new_val=\$ac_env_${ac_var}_value
+  case $ac_old_set,$ac_new_set in
+    set,)
+      { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: \`$ac_var' was set to \`$ac_old_val' in the previous run" >&5
+printf "%s\n" "$as_me: error: \`$ac_var' was set to \`$ac_old_val' in the previous run" >&2;}
+      ac_cache_corrupted=: ;;
+    ,set)
+      { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: \`$ac_var' was not set in the previous run" >&5
+printf "%s\n" "$as_me: error: \`$ac_var' was not set in the previous run" >&2;}
+      ac_cache_corrupted=: ;;
+    ,);;
+    *)
+      if test "x$ac_old_val" != "x$ac_new_val"; then
+	# differences in whitespace do not lead to failure.
+	ac_old_val_w=`echo x $ac_old_val`
+	ac_new_val_w=`echo x $ac_new_val`
+	if test "$ac_old_val_w" != "$ac_new_val_w"; then
+	  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: \`$ac_var' has changed since the previous run:" >&5
+printf "%s\n" "$as_me: error: \`$ac_var' has changed since the previous run:" >&2;}
+	  ac_cache_corrupted=:
+	else
+	  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: warning: ignoring whitespace changes in \`$ac_var' since the previous run:" >&5
+printf "%s\n" "$as_me: warning: ignoring whitespace changes in \`$ac_var' since the previous run:" >&2;}
+	  eval $ac_var=\$ac_old_val
+	fi
+	{ printf "%s\n" "$as_me:${as_lineno-$LINENO}:   former value:  \`$ac_old_val'" >&5
+printf "%s\n" "$as_me:   former value:  \`$ac_old_val'" >&2;}
+	{ printf "%s\n" "$as_me:${as_lineno-$LINENO}:   current value: \`$ac_new_val'" >&5
+printf "%s\n" "$as_me:   current value: \`$ac_new_val'" >&2;}
+      fi;;
+  esac
+  # Pass precious variables to config.status.
+  if test "$ac_new_set" = set; then
+    case $ac_new_val in
+    *\'*) ac_arg=$ac_var=`printf "%s\n" "$ac_new_val" | sed "s/'/'\\\\\\\\''/g"` ;;
+    *) ac_arg=$ac_var=$ac_new_val ;;
+    esac
+    case " $ac_configure_args " in
+      *" '$ac_arg' "*) ;; # Avoid dups.  Use of quotes ensures accuracy.
+      *) as_fn_append ac_configure_args " '$ac_arg'" ;;
+    esac
+  fi
+done
+if $ac_cache_corrupted; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: changes in the environment can compromise the build" >&5
+printf "%s\n" "$as_me: error: changes in the environment can compromise the build" >&2;}
+  as_fn_error $? "run \`${MAKE-make} distclean' and/or \`rm $cache_file'
+	    and start over" "$LINENO" 5
+fi
+## -------------------- ##
+## Main body of script. ##
+## -------------------- ##
+
+ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+
+ac_config_headers="$ac_config_headers config/config.h"
+
+if test "x$prefix" = xNONE; then
+  printf %s "checking for prefix by " >&6
+  # Extract the first word of "nasm", so it can be a program name with args.
+set dummy nasm; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_path_ac_prefix_program+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  case $ac_prefix_program in
+  \\/* | ?:\\/*)
+  ac_cv_path_ac_prefix_program="$ac_prefix_program" # Let the user override the test with a path.
+  ;;
+  *)
+  as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    ac_cv_path_ac_prefix_program="$as_dir$ac_word$ac_exec_ext"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+  ;;
+esac
+fi
+ac_prefix_program=$ac_cv_path_ac_prefix_program
+if test -n "$ac_prefix_program"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_prefix_program" >&5
+printf "%s\n" "$ac_prefix_program" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+
+  if test -n "$ac_prefix_program"; then
+    prefix=`$as_dirname -- "$ac_prefix_program" ||
+$as_expr X"$ac_prefix_program" : 'X$.*^/$//*^/^/*/*$' \| \
+	 X"$ac_prefix_program" : 'X$//$^/' \| \
+	 X"$ac_prefix_program" : 'X$//$$' \| \
+	 X"$ac_prefix_program" : 'X$/$' \| . 2>/dev/null ||
+printf "%s\n" X"$ac_prefix_program" |
+    sed '/^X$.*^/$\/\/*^/^/*\/*$/{
+	    s//\1/
+	    q
+	  }
+	  /^X$\/\/$^/.*/{
+	    s//\1/
+	    q
+	  }
+	  /^X$\/\/$$/{
+	    s//\1/
+	    q
+	  }
+	  /^X$\/$.*/{
+	    s//\1/
+	    q
+	  }
+	  s/.*/./; q'`
+    prefix=`$as_dirname -- "$prefix" ||
+$as_expr X"$prefix" : 'X$.*^/$//*^/^/*/*$' \| \
+	 X"$prefix" : 'X$//$^/' \| \
+	 X"$prefix" : 'X$//$$' \| \
+	 X"$prefix" : 'X$/$' \| . 2>/dev/null ||
+printf "%s\n" X"$prefix" |
+    sed '/^X$.*^/$\/\/*^/^/*\/*$/{
+	    s//\1/
+	    q
+	  }
+	  /^X$\/\/$^/.*/{
+	    s//\1/
+	    q
+	  }
+	  /^X$\/\/$$/{
+	    s//\1/
+	    q
+	  }
+	  /^X$\/$.*/{
+	    s//\1/
+	    q
+	  }
+	  s/.*/./; q'`
+  fi
+fi
+
+
+
+
+
+
+
+
+  # Make sure we can run config.sub.
+$SHELL "${ac_aux_dir}config.sub" sun4 >/dev/null 2>&1 ||
+  as_fn_error $? "cannot run $SHELL ${ac_aux_dir}config.sub" "$LINENO" 5
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking build system type" >&5
+printf %s "checking build system type... " >&6; }
+if test ${ac_cv_build+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  ac_build_alias=$build_alias
+test "x$ac_build_alias" = x &&
+  ac_build_alias=`$SHELL "${ac_aux_dir}config.guess"`
+test "x$ac_build_alias" = x &&
+  as_fn_error $? "cannot guess build type; you must specify one" "$LINENO" 5
+ac_cv_build=`$SHELL "${ac_aux_dir}config.sub" $ac_build_alias` ||
+  as_fn_error $? "$SHELL ${ac_aux_dir}config.sub $ac_build_alias failed" "$LINENO" 5
+
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_build" >&5
+printf "%s\n" "$ac_cv_build" >&6; }
+case $ac_cv_build in
+*-*-*) ;;
+*) as_fn_error $? "invalid value of canonical build" "$LINENO" 5;;
+esac
+build=$ac_cv_build
+ac_save_IFS=$IFS; IFS='-'
+set x $ac_cv_build
+shift
+build_cpu=$1
+build_vendor=$2
+shift; shift
+# Remember, the first character of IFS is used to create $*,
+# except with old shells:
+build_os=$*
+IFS=$ac_save_IFS
+case $build_os in *\ *) build_os=`echo "$build_os" | sed 's/ /-/g'`;; esac
+
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking host system type" >&5
+printf %s "checking host system type... " >&6; }
+if test ${ac_cv_host+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test "x$host_alias" = x; then
+  ac_cv_host=$ac_cv_build
+else
+  ac_cv_host=`$SHELL "${ac_aux_dir}config.sub" $host_alias` ||
+    as_fn_error $? "$SHELL ${ac_aux_dir}config.sub $host_alias failed" "$LINENO" 5
+fi
+
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_host" >&5
+printf "%s\n" "$ac_cv_host" >&6; }
+case $ac_cv_host in
+*-*-*) ;;
+*) as_fn_error $? "invalid value of canonical host" "$LINENO" 5;;
+esac
+host=$ac_cv_host
+ac_save_IFS=$IFS; IFS='-'
+set x $ac_cv_host
+shift
+host_cpu=$1
+host_vendor=$2
+shift; shift
+# Remember, the first character of IFS is used to create $*,
+# except with old shells:
+host_os=$*
+IFS=$ac_save_IFS
+case $host_os in *\ *) host_os=`echo "$host_os" | sed 's/ /-/g'`;; esac
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ # Disable WINE
+ WINELOADER=/dev/null
+ export WINELOADER
+ WINESERVER=/dev/null
+ export WINESERVER
+ WINEPREFIX=/dev/null
+ export WINEPREFIX
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test -n "$ac_tool_prefix"; then
+  # Extract the first word of "${ac_tool_prefix}gcc", so it can be a program name with args.
+set dummy ${ac_tool_prefix}gcc; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_prog_CC+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test -n "$CC"; then
+  ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    ac_cv_prog_CC="${ac_tool_prefix}gcc"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+CC=$ac_cv_prog_CC
+if test -n "$CC"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $CC" >&5
+printf "%s\n" "$CC" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+
+fi
+if test -z "$ac_cv_prog_CC"; then
+  ac_ct_CC=$CC
+  # Extract the first word of "gcc", so it can be a program name with args.
+set dummy gcc; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_prog_ac_ct_CC+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test -n "$ac_ct_CC"; then
+  ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    ac_cv_prog_ac_ct_CC="gcc"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+ac_ct_CC=$ac_cv_prog_ac_ct_CC
+if test -n "$ac_ct_CC"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_ct_CC" >&5
+printf "%s\n" "$ac_ct_CC" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+  if test "x$ac_ct_CC" = x; then
+    CC=""
+  else
+    case $cross_compiling:$ac_tool_warned in
+yes:)
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
+printf "%s\n" "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
+ac_tool_warned=yes ;;
+esac
+    CC=$ac_ct_CC
+  fi
+else
+  CC="$ac_cv_prog_CC"
+fi
+
+if test -z "$CC"; then
+          if test -n "$ac_tool_prefix"; then
+    # Extract the first word of "${ac_tool_prefix}cc", so it can be a program name with args.
+set dummy ${ac_tool_prefix}cc; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_prog_CC+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test -n "$CC"; then
+  ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    ac_cv_prog_CC="${ac_tool_prefix}cc"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+CC=$ac_cv_prog_CC
+if test -n "$CC"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $CC" >&5
+printf "%s\n" "$CC" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+
+  fi
+fi
+if test -z "$CC"; then
+  # Extract the first word of "cc", so it can be a program name with args.
+set dummy cc; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_prog_CC+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test -n "$CC"; then
+  ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+  ac_prog_rejected=no
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    if test "$as_dir$ac_word$ac_exec_ext" = "/usr/ucb/cc"; then
+       ac_prog_rejected=yes
+       continue
+     fi
+    ac_cv_prog_CC="cc"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+if test $ac_prog_rejected = yes; then
+  # We found a bogon in the path, so make sure we never use it.
+  set dummy $ac_cv_prog_CC
+  shift
+  if test $# != 0; then
+    # We chose a different compiler from the bogus one.
+    # However, it has the same basename, so the bogon will be chosen
+    # first if we set CC to just the basename; use the full file name.
+    shift
+    ac_cv_prog_CC="$as_dir$ac_word${1+' '}$@"
+  fi
+fi
+fi
+fi
+CC=$ac_cv_prog_CC
+if test -n "$CC"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $CC" >&5
+printf "%s\n" "$CC" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+
+fi
+if test -z "$CC"; then
+  if test -n "$ac_tool_prefix"; then
+  for ac_prog in cl.exe
+  do
+    # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args.
+set dummy $ac_tool_prefix$ac_prog; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_prog_CC+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test -n "$CC"; then
+  ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    ac_cv_prog_CC="$ac_tool_prefix$ac_prog"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+CC=$ac_cv_prog_CC
+if test -n "$CC"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $CC" >&5
+printf "%s\n" "$CC" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+
+    test -n "$CC" && break
+  done
+fi
+if test -z "$CC"; then
+  ac_ct_CC=$CC
+  for ac_prog in cl.exe
+do
+  # Extract the first word of "$ac_prog", so it can be a program name with args.
+set dummy $ac_prog; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_prog_ac_ct_CC+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test -n "$ac_ct_CC"; then
+  ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    ac_cv_prog_ac_ct_CC="$ac_prog"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+ac_ct_CC=$ac_cv_prog_ac_ct_CC
+if test -n "$ac_ct_CC"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_ct_CC" >&5
+printf "%s\n" "$ac_ct_CC" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+
+  test -n "$ac_ct_CC" && break
+done
+
+  if test "x$ac_ct_CC" = x; then
+    CC=""
+  else
+    case $cross_compiling:$ac_tool_warned in
+yes:)
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
+printf "%s\n" "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
+ac_tool_warned=yes ;;
+esac
+    CC=$ac_ct_CC
+  fi
+fi
+
+fi
+if test -z "$CC"; then
+  if test -n "$ac_tool_prefix"; then
+  # Extract the first word of "${ac_tool_prefix}clang", so it can be a program name with args.
+set dummy ${ac_tool_prefix}clang; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_prog_CC+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test -n "$CC"; then
+  ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    ac_cv_prog_CC="${ac_tool_prefix}clang"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+CC=$ac_cv_prog_CC
+if test -n "$CC"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $CC" >&5
+printf "%s\n" "$CC" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+
+fi
+if test -z "$ac_cv_prog_CC"; then
+  ac_ct_CC=$CC
+  # Extract the first word of "clang", so it can be a program name with args.
+set dummy clang; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_prog_ac_ct_CC+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test -n "$ac_ct_CC"; then
+  ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    ac_cv_prog_ac_ct_CC="clang"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+ac_ct_CC=$ac_cv_prog_ac_ct_CC
+if test -n "$ac_ct_CC"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_ct_CC" >&5
+printf "%s\n" "$ac_ct_CC" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+  if test "x$ac_ct_CC" = x; then
+    CC=""
+  else
+    case $cross_compiling:$ac_tool_warned in
+yes:)
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
+printf "%s\n" "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
+ac_tool_warned=yes ;;
+esac
+    CC=$ac_ct_CC
+  fi
+else
+  CC="$ac_cv_prog_CC"
+fi
+
+fi
+
+
+test -z "$CC" && { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
+as_fn_error $? "no acceptable C compiler found in \$PATH
+See \`config.log' for more details" "$LINENO" 5; }
+
+# Provide some information about the compiler.
+printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for C compiler version" >&5
+set X $ac_compile
+ac_compiler=$2
+for ac_option in --version -v -V -qversion -version; do
+  { { ac_try="$ac_compiler $ac_option >&5"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\""
+printf "%s\n" "$ac_try_echo"; } >&5
+  (eval "$ac_compiler $ac_option >&5") 2>conftest.err
+  ac_status=$?
+  if test -s conftest.err; then
+    sed '10a\
+... rest of stderr output deleted ...
+         10q' conftest.err >conftest.er1
+    cat conftest.er1 >&5
+  fi
+  rm -f conftest.er1 conftest.err
+  printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+  test $ac_status = 0; }
+done
+
+cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+int
+main (void)
+{
+
+  ;
+  return 0;
+}
+_ACEOF
+ac_clean_files_save=$ac_clean_files
+ac_clean_files="$ac_clean_files a.out a.out.dSYM a.exe b.out"
+# Try to create an executable without -o first, disregard a.out.
+# It will help us diagnose broken compilers, and finding out an intuition
+# of exeext.
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether the C compiler works" >&5
+printf %s "checking whether the C compiler works... " >&6; }
+ac_link_default=`printf "%s\n" "$ac_link" | sed 's/ -o *conftest^ *//'`
+
+# The possible output files:
+ac_files="a.out conftest.exe conftest a.exe a_out.exe b.out conftest.*"
+
+ac_rmfiles=
+for ac_file in $ac_files
+do
+  case $ac_file in
+    *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.dSYM | *.o | *.obj ) ;;
+    * ) ac_rmfiles="$ac_rmfiles $ac_file";;
+  esac
+done
+rm -f $ac_rmfiles
+
+if { { ac_try="$ac_link_default"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\""
+printf "%s\n" "$ac_try_echo"; } >&5
+  (eval "$ac_link_default") 2>&5
+  ac_status=$?
+  printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+  test $ac_status = 0; }
+then :
+  # Autoconf-2.13 could set the ac_cv_exeext variable to `no'.
+# So ignore a value of `no', otherwise this would lead to `EXEEXT = no'
+# in a Makefile.  We should not override ac_cv_exeext if it was cached,
+# so that the user can short-circuit this test for compilers unknown to
+# Autoconf.
+for ac_file in $ac_files ''
+do
+  test -f "$ac_file" || continue
+  case $ac_file in
+    *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.dSYM | *.o | *.obj )
+	;;
+    ab.out )
+	# We found the default executable, but exeext='' is most
+	# certainly right.
+	break;;
+    *.* )
+	if test ${ac_cv_exeext+y} && test "$ac_cv_exeext" != no;
+	then :; else
+	   ac_cv_exeext=`expr "$ac_file" : '^.*$\..*$'`
+	fi
+	# We set ac_cv_exeext here because the later test for it is not
+	# safe: cross compilers may not add the suffix if given an `-o'
+	# argument, so we may need to know it at that point already.
+	# Even if this section looks crufty: it has the advantage of
+	# actually working.
+	break;;
+    * )
+	break;;
+  esac
+done
+test "$ac_cv_exeext" = no && ac_cv_exeext=
+
+else $as_nop
+  ac_file=''
+fi
+if test -z "$ac_file"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+printf "%s\n" "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+{ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
+as_fn_error 77 "C compiler cannot create executables
+See \`config.log' for more details" "$LINENO" 5; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for C compiler default output file name" >&5
+printf %s "checking for C compiler default output file name... " >&6; }
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_file" >&5
+printf "%s\n" "$ac_file" >&6; }
+ac_exeext=$ac_cv_exeext
+
+rm -f -r a.out a.out.dSYM a.exe conftest$ac_cv_exeext b.out
+ac_clean_files=$ac_clean_files_save
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for suffix of executables" >&5
+printf %s "checking for suffix of executables... " >&6; }
+if { { ac_try="$ac_link"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\""
+printf "%s\n" "$ac_try_echo"; } >&5
+  (eval "$ac_link") 2>&5
+  ac_status=$?
+  printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+  test $ac_status = 0; }
+then :
+  # If both `conftest.exe' and `conftest' are `present' (well, observable)
+# catch `conftest.exe'.  For instance with Cygwin, `ls conftest' will
+# work properly (i.e., refer to `conftest.exe'), while it won't with
+# `rm'.
+for ac_file in conftest.exe conftest conftest.*; do
+  test -f "$ac_file" || continue
+  case $ac_file in
+    *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.dSYM | *.o | *.obj ) ;;
+    *.* ) ac_cv_exeext=`expr "$ac_file" : '^.*$\..*$'`
+	  break;;
+    * ) break;;
+  esac
+done
+else $as_nop
+  { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
+as_fn_error $? "cannot compute suffix of executables: cannot compile and link
+See \`config.log' for more details" "$LINENO" 5; }
+fi
+rm -f conftest conftest$ac_cv_exeext
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_exeext" >&5
+printf "%s\n" "$ac_cv_exeext" >&6; }
+
+rm -f conftest.$ac_ext
+EXEEXT=$ac_cv_exeext
+ac_exeext=$EXEEXT
+cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+ac_clean_files="$ac_clean_files conftest.out"
+# Check that the compiler produces executables we can run.  If not, either
+# the compiler is broken, or we cross compile.
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether we are cross compiling" >&5
+printf %s "checking whether we are cross compiling... " >&6; }
+if test "$cross_compiling" != yes; then
+  { { ac_try="$ac_link"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\""
+printf "%s\n" "$ac_try_echo"; } >&5
+  (eval "$ac_link") 2>&5
+  ac_status=$?
+  printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+  test $ac_status = 0; }
+  if { ac_try='./conftest$ac_cv_exeext'
+  { { case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\""
+printf "%s\n" "$ac_try_echo"; } >&5
+  (eval "$ac_try") 2>&5
+  ac_status=$?
+  printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+  test $ac_status = 0; }; }; then
+    cross_compiling=no
+  else
+    if test "$cross_compiling" = maybe; then
+	cross_compiling=yes
+    else
+	{ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
+as_fn_error 77 "cannot run C compiled programs.
+If you meant to cross compile, use \`--host'.
+See \`config.log' for more details" "$LINENO" 5; }
+    fi
+  fi
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $cross_compiling" >&5
+printf "%s\n" "$cross_compiling" >&6; }
+
+rm -f conftest.$ac_ext conftest$ac_cv_exeext conftest.out
+ac_clean_files=$ac_clean_files_save
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for suffix of object files" >&5
+printf %s "checking for suffix of object files... " >&6; }
+if test ${ac_cv_objext+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+int
+main (void)
+{
+
+  ;
+  return 0;
+}
+_ACEOF
+rm -f conftest.o conftest.obj
+if { { ac_try="$ac_compile"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\""
+printf "%s\n" "$ac_try_echo"; } >&5
+  (eval "$ac_compile") 2>&5
+  ac_status=$?
+  printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+  test $ac_status = 0; }
+then :
+  for ac_file in conftest.o conftest.obj conftest.*; do
+  test -f "$ac_file" || continue;
+  case $ac_file in
+    *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.dSYM ) ;;
+    *) ac_cv_objext=`expr "$ac_file" : '.*\.$.*$'`
+       break;;
+  esac
+done
+else $as_nop
+  printf "%s\n" "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+{ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
+as_fn_error $? "cannot compute suffix of object files: cannot compile
+See \`config.log' for more details" "$LINENO" 5; }
+fi
+rm -f conftest.$ac_cv_objext conftest.$ac_ext
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_objext" >&5
+printf "%s\n" "$ac_cv_objext" >&6; }
+OBJEXT=$ac_cv_objext
+ac_objext=$OBJEXT
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether the compiler supports GNU C" >&5
+printf %s "checking whether the compiler supports GNU C... " >&6; }
+if test ${ac_cv_c_compiler_gnu+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+int
+main (void)
+{
+#ifndef __GNUC__
+       choke me
+#endif
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  ac_compiler_gnu=yes
+else $as_nop
+  ac_compiler_gnu=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+ac_cv_c_compiler_gnu=$ac_compiler_gnu
+
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_c_compiler_gnu" >&5
+printf "%s\n" "$ac_cv_c_compiler_gnu" >&6; }
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+if test $ac_compiler_gnu = yes; then
+  GCC=yes
+else
+  GCC=
+fi
+ac_test_CFLAGS=${CFLAGS+y}
+ac_save_CFLAGS=$CFLAGS
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether $CC accepts -g" >&5
+printf %s "checking whether $CC accepts -g... " >&6; }
+if test ${ac_cv_prog_cc_g+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  ac_save_c_werror_flag=$ac_c_werror_flag
+   ac_c_werror_flag=yes
+   ac_cv_prog_cc_g=no
+   CFLAGS="-g"
+   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+int
+main (void)
+{
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  ac_cv_prog_cc_g=yes
+else $as_nop
+  CFLAGS=""
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+int
+main (void)
+{
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+
+else $as_nop
+  ac_c_werror_flag=$ac_save_c_werror_flag
+	 CFLAGS="-g"
+	 cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+int
+main (void)
+{
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  ac_cv_prog_cc_g=yes
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+   ac_c_werror_flag=$ac_save_c_werror_flag
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cc_g" >&5
+printf "%s\n" "$ac_cv_prog_cc_g" >&6; }
+if test $ac_test_CFLAGS; then
+  CFLAGS=$ac_save_CFLAGS
+elif test $ac_cv_prog_cc_g = yes; then
+  if test "$GCC" = yes; then
+    CFLAGS="-g -O2"
+  else
+    CFLAGS="-g"
+  fi
+else
+  if test "$GCC" = yes; then
+    CFLAGS="-O2"
+  else
+    CFLAGS=
+  fi
+fi
+ac_prog_cc_stdc=no
+if test x$ac_prog_cc_stdc = xno
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $CC option to enable C11 features" >&5
+printf %s "checking for $CC option to enable C11 features... " >&6; }
+if test ${ac_cv_prog_cc_c11+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  ac_cv_prog_cc_c11=no
+ac_save_CC=$CC
+cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+$ac_c_conftest_c11_program
+_ACEOF
+for ac_arg in '' -std=gnu11
+do
+  CC="$ac_save_CC $ac_arg"
+  if ac_fn_c_try_compile "$LINENO"
+then :
+  ac_cv_prog_cc_c11=$ac_arg
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam
+  test "x$ac_cv_prog_cc_c11" != "xno" && break
+done
+rm -f conftest.$ac_ext
+CC=$ac_save_CC
+fi
+
+if test "x$ac_cv_prog_cc_c11" = xno
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: unsupported" >&5
+printf "%s\n" "unsupported" >&6; }
+else $as_nop
+  if test "x$ac_cv_prog_cc_c11" = x
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: none needed" >&5
+printf "%s\n" "none needed" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cc_c11" >&5
+printf "%s\n" "$ac_cv_prog_cc_c11" >&6; }
+     CC="$CC $ac_cv_prog_cc_c11"
+fi
+  ac_cv_prog_cc_stdc=$ac_cv_prog_cc_c11
+  ac_prog_cc_stdc=c11
+fi
+fi
+if test x$ac_prog_cc_stdc = xno
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $CC option to enable C99 features" >&5
+printf %s "checking for $CC option to enable C99 features... " >&6; }
+if test ${ac_cv_prog_cc_c99+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  ac_cv_prog_cc_c99=no
+ac_save_CC=$CC
+cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+$ac_c_conftest_c99_program
+_ACEOF
+for ac_arg in '' -std=gnu99 -std=c99 -c99 -qlanglvl=extc1x -qlanglvl=extc99 -AC99 -D_STDC_C99=
+do
+  CC="$ac_save_CC $ac_arg"
+  if ac_fn_c_try_compile "$LINENO"
+then :
+  ac_cv_prog_cc_c99=$ac_arg
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam
+  test "x$ac_cv_prog_cc_c99" != "xno" && break
+done
+rm -f conftest.$ac_ext
+CC=$ac_save_CC
+fi
+
+if test "x$ac_cv_prog_cc_c99" = xno
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: unsupported" >&5
+printf "%s\n" "unsupported" >&6; }
+else $as_nop
+  if test "x$ac_cv_prog_cc_c99" = x
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: none needed" >&5
+printf "%s\n" "none needed" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cc_c99" >&5
+printf "%s\n" "$ac_cv_prog_cc_c99" >&6; }
+     CC="$CC $ac_cv_prog_cc_c99"
+fi
+  ac_cv_prog_cc_stdc=$ac_cv_prog_cc_c99
+  ac_prog_cc_stdc=c99
+fi
+fi
+if test x$ac_prog_cc_stdc = xno
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $CC option to enable C89 features" >&5
+printf %s "checking for $CC option to enable C89 features... " >&6; }
+if test ${ac_cv_prog_cc_c89+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  ac_cv_prog_cc_c89=no
+ac_save_CC=$CC
+cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+$ac_c_conftest_c89_program
+_ACEOF
+for ac_arg in '' -qlanglvl=extc89 -qlanglvl=ansi -std -Ae "-Aa -D_HPUX_SOURCE" "-Xc -D__EXTENSIONS__"
+do
+  CC="$ac_save_CC $ac_arg"
+  if ac_fn_c_try_compile "$LINENO"
+then :
+  ac_cv_prog_cc_c89=$ac_arg
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam
+  test "x$ac_cv_prog_cc_c89" != "xno" && break
+done
+rm -f conftest.$ac_ext
+CC=$ac_save_CC
+fi
+
+if test "x$ac_cv_prog_cc_c89" = xno
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: unsupported" >&5
+printf "%s\n" "unsupported" >&6; }
+else $as_nop
+  if test "x$ac_cv_prog_cc_c89" = x
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: none needed" >&5
+printf "%s\n" "none needed" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cc_c89" >&5
+printf "%s\n" "$ac_cv_prog_cc_c89" >&6; }
+     CC="$CC $ac_cv_prog_cc_c89"
+fi
+  ac_cv_prog_cc_stdc=$ac_cv_prog_cc_c89
+  ac_prog_cc_stdc=c89
+fi
+fi
+
+ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+ if test x$ac_cv_prog != xno
+then :
+  ac_includes_default="$ac_includes_default
+#ifndef __cplusplus
+extern int main(void);
+#endif"
+fi
+
+ac_header= ac_cache=
+for ac_item in $ac_header_c_list
+do
+  if test $ac_cache; then
+    ac_fn_c_check_header_compile "$LINENO" $ac_header ac_cv_header_$ac_cache "$ac_includes_default"
+    if eval test \"x\$ac_cv_header_$ac_cache\" = xyes; then
+      printf "%s\n" "#define $ac_item 1" >> confdefs.h
+    fi
+    ac_header= ac_cache=
+  elif test $ac_header; then
+    ac_cache=$ac_item
+  else
+    ac_header=$ac_item
+  fi
+done
+
+
+
+
+
+
+
+
+if test $ac_cv_header_stdlib_h = yes && test $ac_cv_header_string_h = yes
+then :
+
+printf "%s\n" "#define STDC_HEADERS 1" >>confdefs.h
+
+fi
+
+
+
+
+
+
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether it is safe to define __EXTENSIONS__" >&5
+printf %s "checking whether it is safe to define __EXTENSIONS__... " >&6; }
+if test ${ac_cv_safe_to_define___extensions__+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+#         define __EXTENSIONS__ 1
+          $ac_includes_default
+int
+main (void)
+{
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  ac_cv_safe_to_define___extensions__=yes
+else $as_nop
+  ac_cv_safe_to_define___extensions__=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_safe_to_define___extensions__" >&5
+printf "%s\n" "$ac_cv_safe_to_define___extensions__" >&6; }
+
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether _XOPEN_SOURCE should be defined" >&5
+printf %s "checking whether _XOPEN_SOURCE should be defined... " >&6; }
+if test ${ac_cv_should_define__xopen_source+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  ac_cv_should_define__xopen_source=no
+    if test $ac_cv_header_wchar_h = yes
+then :
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+          #include <wchar.h>
+          mbstate_t x;
+int
+main (void)
+{
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+
+else $as_nop
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+            #define _XOPEN_SOURCE 500
+            #include <wchar.h>
+            mbstate_t x;
+int
+main (void)
+{
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  ac_cv_should_define__xopen_source=yes
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+fi
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_should_define__xopen_source" >&5
+printf "%s\n" "$ac_cv_should_define__xopen_source" >&6; }
+
+  printf "%s\n" "#define _ALL_SOURCE 1" >>confdefs.h
+
+  printf "%s\n" "#define _DARWIN_C_SOURCE 1" >>confdefs.h
+
+  printf "%s\n" "#define _GNU_SOURCE 1" >>confdefs.h
+
+  printf "%s\n" "#define _HPUX_ALT_XOPEN_SOCKET_API 1" >>confdefs.h
+
+  printf "%s\n" "#define _NETBSD_SOURCE 1" >>confdefs.h
+
+  printf "%s\n" "#define _OPENBSD_SOURCE 1" >>confdefs.h
+
+  printf "%s\n" "#define _POSIX_PTHREAD_SEMANTICS 1" >>confdefs.h
+
+  printf "%s\n" "#define __STDC_WANT_IEC_60559_ATTRIBS_EXT__ 1" >>confdefs.h
+
+  printf "%s\n" "#define __STDC_WANT_IEC_60559_BFP_EXT__ 1" >>confdefs.h
+
+  printf "%s\n" "#define __STDC_WANT_IEC_60559_DFP_EXT__ 1" >>confdefs.h
+
+  printf "%s\n" "#define __STDC_WANT_IEC_60559_FUNCS_EXT__ 1" >>confdefs.h
+
+  printf "%s\n" "#define __STDC_WANT_IEC_60559_TYPES_EXT__ 1" >>confdefs.h
+
+  printf "%s\n" "#define __STDC_WANT_LIB_EXT2__ 1" >>confdefs.h
+
+  printf "%s\n" "#define __STDC_WANT_MATH_SPEC_FUNCS__ 1" >>confdefs.h
+
+  printf "%s\n" "#define _TANDEM_SOURCE 1" >>confdefs.h
+
+  if test $ac_cv_header_minix_config_h = yes
+then :
+  MINIX=yes
+    printf "%s\n" "#define _MINIX 1" >>confdefs.h
+
+    printf "%s\n" "#define _POSIX_SOURCE 1" >>confdefs.h
+
+    printf "%s\n" "#define _POSIX_1_SOURCE 2" >>confdefs.h
+
+else $as_nop
+  MINIX=
+fi
+  if test $ac_cv_safe_to_define___extensions__ = yes
+then :
+  printf "%s\n" "#define __EXTENSIONS__ 1" >>confdefs.h
+
+fi
+  if test $ac_cv_should_define__xopen_source = yes
+then :
+  printf "%s\n" "#define _XOPEN_SOURCE 500" >>confdefs.h
+
+fi
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CPPFLAGS_orig=$CPPFLAGS
+  CPPFLAGS="$CPPFLAGS -std=c17"
+  _PA_ADD_FLAGS_CPPFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CPPFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -std=c17" >&5
+printf %s "checking if $CC accepts -std=c17... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CPPFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CPPFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CPPFLAGS_STD_C17 1" >>confdefs.h
+
+
+else $as_nop
+  CPPFLAGS="$_PA_ADD_FLAGS_CPPFLAGS_orig"
+
+
+
+
+
+  _PA_ADD_FLAGS_CPPFLAGS_orig=$CPPFLAGS
+  CPPFLAGS="$CPPFLAGS -std=c11"
+  _PA_ADD_FLAGS_CPPFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CPPFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -std=c11" >&5
+printf %s "checking if $CC accepts -std=c11... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CPPFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CPPFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CPPFLAGS_STD_C11 1" >>confdefs.h
+
+
+else $as_nop
+  CPPFLAGS="$_PA_ADD_FLAGS_CPPFLAGS_orig"
+
+
+
+
+
+  _PA_ADD_FLAGS_CPPFLAGS_orig=$CPPFLAGS
+  CPPFLAGS="$CPPFLAGS -std=c99"
+  _PA_ADD_FLAGS_CPPFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CPPFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -std=c99" >&5
+printf %s "checking if $CC accepts -std=c99... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CPPFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CPPFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CPPFLAGS_STD_C99 1" >>confdefs.h
+
+
+else $as_nop
+  CPPFLAGS="$_PA_ADD_FLAGS_CPPFLAGS_orig"
+
+fi
+
+
+
+
+
+fi
+
+
+
+
+
+fi
+
+
+
+
+
+
+
+
+ # Check whether --enable-gdb was given.
+if test ${enable_gdb+y}
+then :
+  enableval=$enable_gdb; pa_arg_bool_enableval="$enableval"
+else $as_nop
+  pa_arg_bool_enableval="yes"
+fi
+
+
+ if test x"$pa_arg_bool_enableval" != xno
+then :
+  _pa_flag_found=no
+ if test $_pa_flag_found = no
+then :
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -ggdb3"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -ggdb3" >&5
+printf %s "checking if $CC accepts -ggdb3... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_GGDB3 1" >>confdefs.h
+
+   _pa_flag_found=yes
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+fi
+  if test $_pa_flag_found = no
+then :
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -g3"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -g3" >&5
+printf %s "checking if $CC accepts -g3... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_G3 1" >>confdefs.h
+
+   _pa_flag_found=yes
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+fi
+
+
+else $as_nop
+  _pa_flag_found=no
+ if test $_pa_flag_found = no
+then :
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -g3"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -g3" >&5
+printf %s "checking if $CC accepts -g3... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_G3 1" >>confdefs.h
+
+   _pa_flag_found=yes
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+fi
+
+
+fi
+
+
+
+ # Check whether --enable-debug was given.
+if test ${enable_debug+y}
+then :
+  enableval=$enable_debug; pa_arg_bool_enableval="$enableval"
+else $as_nop
+  pa_arg_bool_enableval="no"
+fi
+
+
+ if test x"$pa_arg_bool_enableval" != xno
+then :
+  _pa_flag_found=no
+ if test $_pa_flag_found = no
+then :
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -Og"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Og" >&5
+printf %s "checking if $CC accepts -Og... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_OG 1" >>confdefs.h
+
+   _pa_flag_found=yes
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+fi
+  if test $_pa_flag_found = no
+then :
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -O0"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -O0" >&5
+printf %s "checking if $CC accepts -O0... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_O0 1" >>confdefs.h
+
+   _pa_flag_found=yes
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+fi
+
+
+
+fi
+
+
+
+ # Check whether --enable-profiling was given.
+if test ${enable_profiling+y}
+then :
+  enableval=$enable_profiling; pa_arg_bool_enableval="$enableval"
+else $as_nop
+  pa_arg_bool_enableval="no"
+fi
+
+
+ if test x"$pa_arg_bool_enableval" != xno
+then :
+  _pa_flag_found=no
+ if test $_pa_flag_found = no
+then :
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -pg"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -pg" >&5
+printf %s "checking if $CC accepts -pg... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_PG 1" >>confdefs.h
+
+   _pa_flag_found=yes
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+fi
+
+
+fi
+
+
+# Check whether --enable-largefile was given.
+if test ${enable_largefile+y}
+then :
+  enableval=$enable_largefile;
+fi
+
+if test "$enable_largefile" != no; then
+
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for special C compiler options needed for large files" >&5
+printf %s "checking for special C compiler options needed for large files... " >&6; }
+if test ${ac_cv_sys_largefile_CC+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  ac_cv_sys_largefile_CC=no
+     if test "$GCC" != yes; then
+       ac_save_CC=$CC
+       while :; do
+	 # IRIX 6.2 and later do not support large files by default,
+	 # so use the C compiler's -n32 option if that helps.
+	 cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <sys/types.h>
+ /* Check that off_t can represent 2**63 - 1 correctly.
+    We can't simply define LARGE_OFF_T to be 9223372036854775807,
+    since some C++ compilers masquerading as C compilers
+    incorrectly reject 9223372036854775807.  */
+#define LARGE_OFF_T (((off_t) 1 << 31 << 31) - 1 + ((off_t) 1 << 31 << 31))
+  int off_t_is_large(LARGE_OFF_T % 2147483629 == 721
+		       && LARGE_OFF_T % 2147483647 == 1)
+		      ? 1 : -1;
+int
+main (void)
+{
+
+  ;
+  return 0;
+}
+_ACEOF
+	 if ac_fn_c_try_compile "$LINENO"
+then :
+  break
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam
+	 CC="$CC -n32"
+	 if ac_fn_c_try_compile "$LINENO"
+then :
+  ac_cv_sys_largefile_CC=' -n32'; break
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam
+	 break
+       done
+       CC=$ac_save_CC
+       rm -f conftest.$ac_ext
+    fi
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_sys_largefile_CC" >&5
+printf "%s\n" "$ac_cv_sys_largefile_CC" >&6; }
+  if test "$ac_cv_sys_largefile_CC" != no; then
+    CC=$CC$ac_cv_sys_largefile_CC
+  fi
+
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for _FILE_OFFSET_BITS value needed for large files" >&5
+printf %s "checking for _FILE_OFFSET_BITS value needed for large files... " >&6; }
+if test ${ac_cv_sys_file_offset_bits+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  while :; do
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <sys/types.h>
+ /* Check that off_t can represent 2**63 - 1 correctly.
+    We can't simply define LARGE_OFF_T to be 9223372036854775807,
+    since some C++ compilers masquerading as C compilers
+    incorrectly reject 9223372036854775807.  */
+#define LARGE_OFF_T (((off_t) 1 << 31 << 31) - 1 + ((off_t) 1 << 31 << 31))
+  int off_t_is_large(LARGE_OFF_T % 2147483629 == 721
+		       && LARGE_OFF_T % 2147483647 == 1)
+		      ? 1 : -1;
+int
+main (void)
+{
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  ac_cv_sys_file_offset_bits=no; break
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#define _FILE_OFFSET_BITS 64
+#include <sys/types.h>
+ /* Check that off_t can represent 2**63 - 1 correctly.
+    We can't simply define LARGE_OFF_T to be 9223372036854775807,
+    since some C++ compilers masquerading as C compilers
+    incorrectly reject 9223372036854775807.  */
+#define LARGE_OFF_T (((off_t) 1 << 31 << 31) - 1 + ((off_t) 1 << 31 << 31))
+  int off_t_is_large(LARGE_OFF_T % 2147483629 == 721
+		       && LARGE_OFF_T % 2147483647 == 1)
+		      ? 1 : -1;
+int
+main (void)
+{
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  ac_cv_sys_file_offset_bits=64; break
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+  ac_cv_sys_file_offset_bits=unknown
+  break
+done
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_sys_file_offset_bits" >&5
+printf "%s\n" "$ac_cv_sys_file_offset_bits" >&6; }
+case $ac_cv_sys_file_offset_bits in #(
+  no | unknown) ;;
+  *)
+printf "%s\n" "#define _FILE_OFFSET_BITS $ac_cv_sys_file_offset_bits" >>confdefs.h
+;;
+esac
+rm -rf conftest*
+  if test $ac_cv_sys_file_offset_bits = unknown; then
+    { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for _LARGE_FILES value needed for large files" >&5
+printf %s "checking for _LARGE_FILES value needed for large files... " >&6; }
+if test ${ac_cv_sys_large_files+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  while :; do
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <sys/types.h>
+ /* Check that off_t can represent 2**63 - 1 correctly.
+    We can't simply define LARGE_OFF_T to be 9223372036854775807,
+    since some C++ compilers masquerading as C compilers
+    incorrectly reject 9223372036854775807.  */
+#define LARGE_OFF_T (((off_t) 1 << 31 << 31) - 1 + ((off_t) 1 << 31 << 31))
+  int off_t_is_large(LARGE_OFF_T % 2147483629 == 721
+		       && LARGE_OFF_T % 2147483647 == 1)
+		      ? 1 : -1;
+int
+main (void)
+{
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  ac_cv_sys_large_files=no; break
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#define _LARGE_FILES 1
+#include <sys/types.h>
+ /* Check that off_t can represent 2**63 - 1 correctly.
+    We can't simply define LARGE_OFF_T to be 9223372036854775807,
+    since some C++ compilers masquerading as C compilers
+    incorrectly reject 9223372036854775807.  */
+#define LARGE_OFF_T (((off_t) 1 << 31 << 31) - 1 + ((off_t) 1 << 31 << 31))
+  int off_t_is_large(LARGE_OFF_T % 2147483629 == 721
+		       && LARGE_OFF_T % 2147483647 == 1)
+		      ? 1 : -1;
+int
+main (void)
+{
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  ac_cv_sys_large_files=1; break
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+  ac_cv_sys_large_files=unknown
+  break
+done
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_sys_large_files" >&5
+printf "%s\n" "$ac_cv_sys_large_files" >&6; }
+case $ac_cv_sys_large_files in #(
+  no | unknown) ;;
+  *)
+printf "%s\n" "#define _LARGE_FILES $ac_cv_sys_large_files" >>confdefs.h
+;;
+esac
+rm -rf conftest*
+  fi
+fi
+
+
+
+
+ # Check whether --enable-panic-abort was given.
+if test ${enable_panic_abort+y}
+then :
+  enableval=$enable_panic_abort; pa_arg_bool_enableval="$enableval"
+else $as_nop
+  pa_arg_bool_enableval="no"
+fi
+
+
+ if test x"$pa_arg_bool_enableval" != xno
+then :
+  printf "%s\n" "#define ABORT_ON_PANIC 1" >>confdefs.h
+
+fi
+
+
+
+ac_fn_c_check_type "$LINENO" "size_t" "ac_cv_type_size_t" "$ac_includes_default"
+if test "x$ac_cv_type_size_t" = xyes
+then :
+
+else $as_nop
+
+printf "%s\n" "#define size_t unsigned int" >>confdefs.h
+
+fi
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -Werror=unknown-warning-option"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Werror=unknown-warning-option" >&5
+printf %s "checking if $CC accepts -Werror=unknown-warning-option... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_WERROR_UNKNOWN_WARNING_OPTION 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -fwrapv"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -fwrapv" >&5
+printf %s "checking if $CC accepts -fwrapv... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_FWRAPV 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -ftrivial-auto-var-init=zero"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -ftrivial-auto-var-init=zero" >&5
+printf %s "checking if $CC accepts -ftrivial-auto-var-init=zero... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_FTRIVIAL_AUTO_VAR_INIT_ZERO 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -U__STRICT_ANSI__"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -U__STRICT_ANSI__" >&5
+printf %s "checking if $CC accepts -U__STRICT_ANSI__... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_U_STRICT_ANSI 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -fno-common"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -fno-common" >&5
+printf %s "checking if $CC accepts -fno-common... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_FNO_COMMON 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for suffix of library files" >&5
+printf %s "checking for suffix of library files... " >&6; }
+if test x"$LIBEXT" = x; then
+  case "$OBJEXT" in
+    obj)
+      LIBEXT=lib
+      ;;
+    *)
+      LIBEXT=a
+      ;;
+  esac
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $LIBEXT" >&5
+printf "%s\n" "$LIBEXT" >&6; }
+
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether ln -s works" >&5
+printf %s "checking whether ln -s works... " >&6; }
+LN_S=$as_ln_s
+if test "$LN_S" = "ln -s"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no, using $LN_S" >&5
+printf "%s\n" "no, using $LN_S" >&6; }
+fi
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether ${MAKE-make} sets \$(MAKE)" >&5
+printf %s "checking whether ${MAKE-make} sets \$(MAKE)... " >&6; }
+set x ${MAKE-make}
+ac_make=`printf "%s\n" "$2" | sed 's/+/p/g; s/^a-zA-Z0-9_/_/g'`
+if eval test \${ac_cv_prog_make_${ac_make}_set+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  cat >conftest.make <<\_ACEOF
+SHELL = /bin/sh
+all:
+	@echo '@@@%%%=$(MAKE)=@@@%%%'
+_ACEOF
+# GNU make sometimes prints "make1: Entering ...", which would confuse us.
+case `${MAKE-make} -f conftest.make 2>/dev/null` in
+  *@@@%%%=?*=@@@%%%*)
+    eval ac_cv_prog_make_${ac_make}_set=yes;;
+  *)
+    eval ac_cv_prog_make_${ac_make}_set=no;;
+esac
+rm -f conftest.make
+fi
+if eval test \$ac_cv_prog_make_${ac_make}_set = yes; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+  SET_MAKE=
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+  SET_MAKE="MAKE=${MAKE-make}"
+fi
+
+
+  # Find a good install program.  We prefer a C program (faster),
+# so one script is as good as another.  But avoid the broken or
+# incompatible versions:
+# SysV /etc/install, /usr/sbin/install
+# SunOS /usr/etc/install
+# IRIX /sbin/install
+# AIX /bin/install
+# AmigaOS /C/install, which installs bootblocks on floppy discs
+# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
+# AFS /usr/afsws/bin/install, which mishandles nonexistent args
+# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
+# OS/2's system install, which has a completely different semantic
+# ./install, which can be erroneously created by make from ./install.sh.
+# Reject install programs that cannot install multiple files.
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for a BSD-compatible install" >&5
+printf %s "checking for a BSD-compatible install... " >&6; }
+if test -z "$INSTALL"; then
+if test ${ac_cv_path_install+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    # Account for fact that we put trailing slashes in our PATH walk.
+case $as_dir in #((
+  ./ | /cC/* | \
+  /etc/* | /usr/sbin/* | /usr/etc/* | /sbin/* | /usr/afsws/bin/* | \
+  ?:\\/os2\\/install\\/* | ?:\\/OS2\\/INSTALL\\/* | \
+  /usr/ucb/* ) ;;
+  *)
+    # OSF1 and SCO ODT 3.0 have their own names for install.
+    # Don't use installbsd from OSF since it installs stuff as root
+    # by default.
+    for ac_prog in ginstall scoinst install; do
+      for ac_exec_ext in '' $ac_executable_extensions; do
+	if as_fn_executable_p "$as_dir$ac_prog$ac_exec_ext"; then
+	  if test $ac_prog = install &&
+	    grep dspmsg "$as_dir$ac_prog$ac_exec_ext" >/dev/null 2>&1; then
+	    # AIX install.  It has an incompatible calling convention.
+	    :
+	  elif test $ac_prog = install &&
+	    grep pwplus "$as_dir$ac_prog$ac_exec_ext" >/dev/null 2>&1; then
+	    # program-specific install script used by HP pwplus--don't use.
+	    :
+	  else
+	    rm -rf conftest.one conftest.two conftest.dir
+	    echo one > conftest.one
+	    echo two > conftest.two
+	    mkdir conftest.dir
+	    if "$as_dir$ac_prog$ac_exec_ext" -c conftest.one conftest.two "`pwd`/conftest.dir/" &&
+	      test -s conftest.one && test -s conftest.two &&
+	      test -s conftest.dir/conftest.one &&
+	      test -s conftest.dir/conftest.two
+	    then
+	      ac_cv_path_install="$as_dir$ac_prog$ac_exec_ext -c"
+	      break 3
+	    fi
+	  fi
+	fi
+      done
+    done
+    ;;
+esac
+
+  done
+IFS=$as_save_IFS
+
+rm -rf conftest.one conftest.two conftest.dir
+
+fi
+  if test ${ac_cv_path_install+y}; then
+    INSTALL=$ac_cv_path_install
+  else
+    # As a last resort, use the slow shell script.  Don't cache a
+    # value for INSTALL within a source directory, because that will
+    # break other packages using the cache if that directory is
+    # removed, or if the value is a relative name.
+    INSTALL=$ac_install_sh
+  fi
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $INSTALL" >&5
+printf "%s\n" "$INSTALL" >&6; }
+
+# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
+# It thinks the first close brace ends the variable substitution.
+test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}'
+
+test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL}'
+
+test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
+
+
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for a race-free mkdir -p" >&5
+printf %s "checking for a race-free mkdir -p... " >&6; }
+if test -z "$MKDIR_P"; then
+  if test ${ac_cv_path_mkdir+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH$PATH_SEPARATOR/opt/sfw/bin
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_prog in mkdir gmkdir; do
+	 for ac_exec_ext in '' $ac_executable_extensions; do
+	   as_fn_executable_p "$as_dir$ac_prog$ac_exec_ext" || continue
+	   case `"$as_dir$ac_prog$ac_exec_ext" --version 2>&1` in #(
+	     'mkdir ('*'coreutils) '* | \
+	     'BusyBox '* | \
+	     'mkdir (fileutils) '4.1*)
+	       ac_cv_path_mkdir=$as_dir$ac_prog$ac_exec_ext
+	       break 3;;
+	   esac
+	 done
+       done
+  done
+IFS=$as_save_IFS
+
+fi
+
+  test -d ./--version && rmdir ./--version
+  if test ${ac_cv_path_mkdir+y}; then
+    MKDIR_P="$ac_cv_path_mkdir -p"
+  else
+    # As a last resort, use the slow shell script.  Don't cache a
+    # value for MKDIR_P within a source directory, because that will
+    # break other packages using the cache if that directory is
+    # removed, or if the value is a relative name.
+    MKDIR_P="$ac_install_sh -d"
+  fi
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $MKDIR_P" >&5
+printf "%s\n" "$MKDIR_P" >&6; }
+
+
+for ac_prog in nroff
+do
+  # Extract the first word of "$ac_prog", so it can be a program name with args.
+set dummy $ac_prog; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_prog_NROFF+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test -n "$NROFF"; then
+  ac_cv_prog_NROFF="$NROFF" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    ac_cv_prog_NROFF="$ac_prog"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+NROFF=$ac_cv_prog_NROFF
+if test -n "$NROFF"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $NROFF" >&5
+printf "%s\n" "$NROFF" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+
+  test -n "$NROFF" && break
+done
+test -n "$NROFF" || NROFF="false"
+
+for ac_prog in asciidoc
+do
+  # Extract the first word of "$ac_prog", so it can be a program name with args.
+set dummy $ac_prog; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_prog_ASCIIDOC+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test -n "$ASCIIDOC"; then
+  ac_cv_prog_ASCIIDOC="$ASCIIDOC" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    ac_cv_prog_ASCIIDOC="$ac_prog"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+ASCIIDOC=$ac_cv_prog_ASCIIDOC
+if test -n "$ASCIIDOC"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ASCIIDOC" >&5
+printf "%s\n" "$ASCIIDOC" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+
+  test -n "$ASCIIDOC" && break
+done
+test -n "$ASCIIDOC" || ASCIIDOC="false"
+
+for ac_prog in xmlto
+do
+  # Extract the first word of "$ac_prog", so it can be a program name with args.
+set dummy $ac_prog; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_prog_XMLTO+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test -n "$XMLTO"; then
+  ac_cv_prog_XMLTO="$XMLTO" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    ac_cv_prog_XMLTO="$ac_prog"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+XMLTO=$ac_cv_prog_XMLTO
+if test -n "$XMLTO"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $XMLTO" >&5
+printf "%s\n" "$XMLTO" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+
+  test -n "$XMLTO" && break
+done
+test -n "$XMLTO" || XMLTO="false"
+
+for ac_prog in xz
+do
+  # Extract the first word of "$ac_prog", so it can be a program name with args.
+set dummy $ac_prog; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_prog_XZ+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test -n "$XZ"; then
+  ac_cv_prog_XZ="$XZ" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    ac_cv_prog_XZ="$ac_prog"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+XZ=$ac_cv_prog_XZ
+if test -n "$XZ"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $XZ" >&5
+printf "%s\n" "$XZ" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+
+  test -n "$XZ" && break
+done
+test -n "$XZ" || XZ="false"
+
+
+MANPAGES=manpages
+if test x$ASCIIDOC = xfalse
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: No asciidoc package found, cannot build man pages" >&5
+printf "%s\n" "$as_me: WARNING: No asciidoc package found, cannot build man pages" >&2;}
+   MANPAGES=''
+
+fi
+if test x"$XMLTO" = xfalse
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: No xmlto package found, cannot build man pages" >&5
+printf "%s\n" "$as_me: WARNING: No xmlto package found, cannot build man pages" >&2;}
+   MANPAGES=''
+
+fi
+
+
+if test x"$XZ" = xfalse
+then :
+
+else $as_nop
+  XZFILES=xzfiles
+fi
+
+
+
+# Check whether --with-nsis was given.
+if test ${with_nsis+y}
+then :
+  withval=$with_nsis;
+else $as_nop
+  with_nsis=yes
+fi
+
+if test x"$MAKENSIS" = x
+then :
+
+else $as_nop
+  if test x"$with_nsis" = xno
+then :
+
+             with_nsis="$MAKENSIS"
+fi
+fi
+
+MAKENSIS=false
+
+case $host in #(
+  *-win* | *-mingw*) :
+    if test x"$with_nsis" = xno
+then :
+
+else $as_nop
+  NSIS=nsis
+	  if test x"$with_nsis" = xyes
+then :
+  if test -n "$ac_tool_prefix"; then
+  # Extract the first word of "${ac_tool_prefix}makensis", so it can be a program name with args.
+set dummy ${ac_tool_prefix}makensis; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_prog_MAKENSIS_TOOL+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test -n "$MAKENSIS_TOOL"; then
+  ac_cv_prog_MAKENSIS_TOOL="$MAKENSIS_TOOL" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    ac_cv_prog_MAKENSIS_TOOL="${ac_tool_prefix}makensis"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+MAKENSIS_TOOL=$ac_cv_prog_MAKENSIS_TOOL
+if test -n "$MAKENSIS_TOOL"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $MAKENSIS_TOOL" >&5
+printf "%s\n" "$MAKENSIS_TOOL" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+
+fi
+if test -z "$ac_cv_prog_MAKENSIS_TOOL"; then
+  ac_ct_MAKENSIS_TOOL=$MAKENSIS_TOOL
+  # Extract the first word of "makensis", so it can be a program name with args.
+set dummy makensis; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_prog_ac_ct_MAKENSIS_TOOL+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test -n "$ac_ct_MAKENSIS_TOOL"; then
+  ac_cv_prog_ac_ct_MAKENSIS_TOOL="$ac_ct_MAKENSIS_TOOL" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    ac_cv_prog_ac_ct_MAKENSIS_TOOL="makensis"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+ac_ct_MAKENSIS_TOOL=$ac_cv_prog_ac_ct_MAKENSIS_TOOL
+if test -n "$ac_ct_MAKENSIS_TOOL"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_ct_MAKENSIS_TOOL" >&5
+printf "%s\n" "$ac_ct_MAKENSIS_TOOL" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+  if test "x$ac_ct_MAKENSIS_TOOL" = x; then
+    MAKENSIS_TOOL="false"
+  else
+    case $cross_compiling:$ac_tool_warned in
+yes:)
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
+printf "%s\n" "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
+ac_tool_warned=yes ;;
+esac
+    MAKENSIS_TOOL=$ac_ct_MAKENSIS_TOOL
+  fi
+else
+  MAKENSIS_TOOL="$ac_cv_prog_MAKENSIS_TOOL"
+fi
+
+	   MAKENSIS="$MAKENSIS_TOOL"
+	   if test x"$MAKENSIS" = xfalse
+then :
+  for ac_prog in makensis
+do
+  # Extract the first word of "$ac_prog", so it can be a program name with args.
+set dummy $ac_prog; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_prog_MAKENSIS_PLAIN+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test -n "$MAKENSIS_PLAIN"; then
+  ac_cv_prog_MAKENSIS_PLAIN="$MAKENSIS_PLAIN" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    ac_cv_prog_MAKENSIS_PLAIN="$ac_prog"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+MAKENSIS_PLAIN=$ac_cv_prog_MAKENSIS_PLAIN
+if test -n "$MAKENSIS_PLAIN"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $MAKENSIS_PLAIN" >&5
+printf "%s\n" "$MAKENSIS_PLAIN" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+
+  test -n "$MAKENSIS_PLAIN" && break
+done
+test -n "$MAKENSIS_PLAIN" || MAKENSIS_PLAIN="false"
+
+	         MAKENSIS="$MAKENSIS_PLAIN"
+fi
+	   if test x"$MAKENSIS" = xfalse
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: no makensis found, cannot build installer" >&5
+printf "%s\n" "$as_me: WARNING: no makensis found, cannot build installer" >&2;}
+	          NSIS=''
+fi
+else $as_nop
+  MAKENSIS="$with_nsis"
+fi
+fi ;; #(
+  *) :
+     ;;
+esac
+
+
+
+if test -n "$ac_tool_prefix"; then
+  # Extract the first word of "${ac_tool_prefix}ar", so it can be a program name with args.
+set dummy ${ac_tool_prefix}ar; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_prog_AR+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test -n "$AR"; then
+  ac_cv_prog_AR="$AR" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    ac_cv_prog_AR="${ac_tool_prefix}ar"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+AR=$ac_cv_prog_AR
+if test -n "$AR"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $AR" >&5
+printf "%s\n" "$AR" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+
+fi
+if test -z "$ac_cv_prog_AR"; then
+  ac_ct_AR=$AR
+  # Extract the first word of "ar", so it can be a program name with args.
+set dummy ar; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_prog_ac_ct_AR+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test -n "$ac_ct_AR"; then
+  ac_cv_prog_ac_ct_AR="$ac_ct_AR" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    ac_cv_prog_ac_ct_AR="ar"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+ac_ct_AR=$ac_cv_prog_ac_ct_AR
+if test -n "$ac_ct_AR"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_ct_AR" >&5
+printf "%s\n" "$ac_ct_AR" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+  if test "x$ac_ct_AR" = x; then
+    AR=""
+  else
+    case $cross_compiling:$ac_tool_warned in
+yes:)
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
+printf "%s\n" "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
+ac_tool_warned=yes ;;
+esac
+    AR=$ac_ct_AR
+  fi
+else
+  AR="$ac_cv_prog_AR"
+fi
+
+if test -n "$ac_tool_prefix"; then
+  # Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args.
+set dummy ${ac_tool_prefix}ranlib; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_prog_RANLIB+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test -n "$RANLIB"; then
+  ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    ac_cv_prog_RANLIB="${ac_tool_prefix}ranlib"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+RANLIB=$ac_cv_prog_RANLIB
+if test -n "$RANLIB"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $RANLIB" >&5
+printf "%s\n" "$RANLIB" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+
+fi
+if test -z "$ac_cv_prog_RANLIB"; then
+  ac_ct_RANLIB=$RANLIB
+  # Extract the first word of "ranlib", so it can be a program name with args.
+set dummy ranlib; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_prog_ac_ct_RANLIB+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test -n "$ac_ct_RANLIB"; then
+  ac_cv_prog_ac_ct_RANLIB="$ac_ct_RANLIB" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    ac_cv_prog_ac_ct_RANLIB="ranlib"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+ac_ct_RANLIB=$ac_cv_prog_ac_ct_RANLIB
+if test -n "$ac_ct_RANLIB"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_ct_RANLIB" >&5
+printf "%s\n" "$ac_ct_RANLIB" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+  if test "x$ac_ct_RANLIB" = x; then
+    RANLIB=":"
+  else
+    case $cross_compiling:$ac_tool_warned in
+yes:)
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
+printf "%s\n" "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
+ac_tool_warned=yes ;;
+esac
+    RANLIB=$ac_ct_RANLIB
+  fi
+else
+  RANLIB="$ac_cv_prog_RANLIB"
+fi
+
+if test -n "$ac_tool_prefix"; then
+  # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args.
+set dummy ${ac_tool_prefix}strip; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_prog_STRIP+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test -n "$STRIP"; then
+  ac_cv_prog_STRIP="$STRIP" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    ac_cv_prog_STRIP="${ac_tool_prefix}strip"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+STRIP=$ac_cv_prog_STRIP
+if test -n "$STRIP"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $STRIP" >&5
+printf "%s\n" "$STRIP" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+
+fi
+if test -z "$ac_cv_prog_STRIP"; then
+  ac_ct_STRIP=$STRIP
+  # Extract the first word of "strip", so it can be a program name with args.
+set dummy strip; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_prog_ac_ct_STRIP+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test -n "$ac_ct_STRIP"; then
+  ac_cv_prog_ac_ct_STRIP="$ac_ct_STRIP" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    ac_cv_prog_ac_ct_STRIP="strip"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+ac_ct_STRIP=$ac_cv_prog_ac_ct_STRIP
+if test -n "$ac_ct_STRIP"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_ct_STRIP" >&5
+printf "%s\n" "$ac_ct_STRIP" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+  if test "x$ac_ct_STRIP" = x; then
+    STRIP=""
+  else
+    case $cross_compiling:$ac_tool_warned in
+yes:)
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
+printf "%s\n" "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
+ac_tool_warned=yes ;;
+esac
+    STRIP=$ac_ct_STRIP
+  fi
+else
+  STRIP="$ac_cv_prog_STRIP"
+fi
+
+
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for an ANSI C-conforming const" >&5
+printf %s "checking for an ANSI C-conforming const... " >&6; }
+if test ${ac_cv_c_const+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+int
+main (void)
+{
+
+#ifndef __cplusplus
+  /* Ultrix mips cc rejects this sort of thing.  */
+  typedef int charset2;
+  const charset cs = { 0, 0 };
+  /* SunOS 4.1.1 cc rejects this.  */
+  char const *const *pcpcc;
+  char **ppc;
+  /* NEC SVR4.0.2 mips cc rejects this.  */
+  struct point {int x, y;};
+  static struct point const zero = {0,0};
+  /* IBM XL C 1.02.0.0 rejects this.
+     It does not let you subtract one const X* pointer from another in
+     an arm of an if-expression whose if-part is not a constant
+     expression */
+  const char *g = "string";
+  pcpcc = &g + (g ? g-g : 0);
+  /* HPUX 7.0 cc rejects these. */
+  ++pcpcc;
+  ppc = (char**) pcpcc;
+  pcpcc = (char const *const *) ppc;
+  { /* SCO 3.2v4 cc rejects this sort of thing.  */
+    char tx;
+    char *t = &tx;
+    char const *s = 0 ? (char *) 0 : (char const *) 0;
+
+    *t++ = 0;
+    if (s) return 0;
+  }
+  { /* Someone thinks the Sun supposedly-ANSI compiler will reject this.  */
+    int x = {25, 17};
+    const int *foo = &x0;
+    ++foo;
+  }
+  { /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */
+    typedef const int *iptr;
+    iptr p = 0;
+    ++p;
+  }
+  { /* IBM XL C 1.02.0.0 rejects this sort of thing, saying
+       "k.c", line 2.27: 1506-025 (S) Operand must be a modifiable lvalue. */
+    struct s { int j; const int *ap3; } bx;
+    struct s *b = &bx; b->j = 5;
+  }
+  { /* ULTRIX-32 V3.1 (Rev 9) vcc rejects this */
+    const int foo = 10;
+    if (!foo) return 0;
+  }
+  return !cs0 && !zero.x;
+#endif
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  ac_cv_c_const=yes
+else $as_nop
+  ac_cv_c_const=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_c_const" >&5
+printf "%s\n" "$ac_cv_c_const" >&6; }
+if test $ac_cv_c_const = no; then
+
+printf "%s\n" "#define const /**/" >>confdefs.h
+
+fi
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for inline" >&5
+printf %s "checking for inline... " >&6; }
+if test ${ac_cv_c_inline+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  ac_cv_c_inline=no
+for ac_kw in inline __inline__ __inline; do
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#ifndef __cplusplus
+typedef int foo_t;
+static $ac_kw foo_t static_foo (void) {return 0; }
+$ac_kw foo_t foo (void) {return 0; }
+#endif
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  ac_cv_c_inline=$ac_kw
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+  test "$ac_cv_c_inline" != no && break
+done
+
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_c_inline" >&5
+printf "%s\n" "$ac_cv_c_inline" >&6; }
+
+case $ac_cv_c_inline in
+  inline | yes) ;;
+  *)
+    case $ac_cv_c_inline in
+      no) ac_val=;;
+      *) ac_val=$ac_cv_c_inline;;
+    esac
+    cat >>confdefs.h <<_ACEOF
+#ifndef __cplusplus
+#define inline $ac_val
+#endif
+_ACEOF
+    ;;
+esac
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for C/C++ restrict keyword" >&5
+printf %s "checking for C/C++ restrict keyword... " >&6; }
+if test ${ac_cv_c_restrict+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  ac_cv_c_restrict=no
+   # Put '__restrict__' first, to avoid problems with glibc and non-GCC; see:
+   # https://lists.gnu.org/archive/html/bug-autoconf/2016-02/msg00006.html
+   # Put 'restrict' last, because C++ lacks it.
+   for ac_kw in __restrict__ __restrict _Restrict restrict; do
+     cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+typedef int *int_ptr;
+	   int foo (int_ptr $ac_kw ip) { return ip0; }
+	   int bar (int $ac_kw); /* Catch GCC bug 14050.  */
+	   int bar (int ip$ac_kw) { return ip0; }
+
+int
+main (void)
+{
+int s1;
+	   int *$ac_kw t = s;
+	   t0 = 0;
+	   return foo (t) + bar (t);
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  ac_cv_c_restrict=$ac_kw
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+     test "$ac_cv_c_restrict" != no && break
+   done
+
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_c_restrict" >&5
+printf "%s\n" "$ac_cv_c_restrict" >&6; }
+
+ case $ac_cv_c_restrict in
+   restrict) ;;
+   no) printf "%s\n" "#define restrict /**/" >>confdefs.h
+ ;;
+   *)  printf "%s\n" "#define restrict $ac_cv_c_restrict" >>confdefs.h
+ ;;
+ esac
+
+
+
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports variadic macros" >&5
+printf %s "checking if $CC supports variadic macros... " >&6; }
+if test ${pa_cv_variadic_macros+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+#define myprintf(f, ...) printf(f, __VA_ARGS__)
+int main(void)
+{
+	myprintf("%s", "Hello, World!\n");
+	return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  pa_cv_variadic_macros=yes
+else $as_nop
+  pa_cv_variadic_macros=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $pa_cv_variadic_macros" >&5
+printf "%s\n" "$pa_cv_variadic_macros" >&6; }
+	if test "x$pa_cv_variadic_macros" = xyes
+then :
+
+printf "%s\n" "#define HAVE_VARIADIC_MACROS 1" >>confdefs.h
+
+fi
+
+
+case $host in #(
+  *-win* | *-mingw*) :
+    if test -n "$ac_tool_prefix"; then
+  # Extract the first word of "${ac_tool_prefix}windres", so it can be a program name with args.
+set dummy ${ac_tool_prefix}windres; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_prog_WINDRES+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test -n "$WINDRES"; then
+  ac_cv_prog_WINDRES="$WINDRES" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    ac_cv_prog_WINDRES="${ac_tool_prefix}windres"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+WINDRES=$ac_cv_prog_WINDRES
+if test -n "$WINDRES"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $WINDRES" >&5
+printf "%s\n" "$WINDRES" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+
+fi
+if test -z "$ac_cv_prog_WINDRES"; then
+  ac_ct_WINDRES=$WINDRES
+  # Extract the first word of "windres", so it can be a program name with args.
+set dummy windres; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_prog_ac_ct_WINDRES+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test -n "$ac_ct_WINDRES"; then
+  ac_cv_prog_ac_ct_WINDRES="$ac_ct_WINDRES" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    ac_cv_prog_ac_ct_WINDRES="windres"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+ac_ct_WINDRES=$ac_cv_prog_ac_ct_WINDRES
+if test -n "$ac_ct_WINDRES"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_ct_WINDRES" >&5
+printf "%s\n" "$ac_ct_WINDRES" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+  if test "x$ac_ct_WINDRES" = x; then
+    WINDRES="false"
+  else
+    case $cross_compiling:$ac_tool_warned in
+yes:)
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
+printf "%s\n" "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
+ac_tool_warned=yes ;;
+esac
+    WINDRES=$ac_ct_WINDRES
+  fi
+else
+  WINDRES="$ac_cv_prog_WINDRES"
+fi
+
+	 if test x"$WINDRES" != xfalse
+then :
+  MANIFEST='win/manifest.$(O)'
+
+fi ;; #(
+  *) :
+     ;;
+esac
+
+       for ac_header in string.h
+do :
+  ac_fn_c_check_header_compile "$LINENO" "string.h" "ac_cv_header_string_h" "$ac_includes_default"
+if test "x$ac_cv_header_string_h" = xyes
+then :
+  printf "%s\n" "#define HAVE_STRING_H 1" >>confdefs.h
+ ac_includes_default="$ac_includes_default
+#include <string.h>"
+
+fi
+
+done
+
+       for ac_header in stdarg.h
+do :
+  ac_fn_c_check_header_compile "$LINENO" "stdarg.h" "ac_cv_header_stdarg_h" "$ac_includes_default"
+if test "x$ac_cv_header_stdarg_h" = xyes
+then :
+  printf "%s\n" "#define HAVE_STDARG_H 1" >>confdefs.h
+ ac_includes_default="$ac_includes_default
+#include <stdarg.h>"
+
+fi
+
+done
+
+       for ac_header in inttypes.h
+do :
+  ac_fn_c_check_header_compile "$LINENO" "inttypes.h" "ac_cv_header_inttypes_h" "$ac_includes_default"
+if test "x$ac_cv_header_inttypes_h" = xyes
+then :
+  printf "%s\n" "#define HAVE_INTTYPES_H 1" >>confdefs.h
+ ac_includes_default="$ac_includes_default
+#include <inttypes.h>"
+
+fi
+
+done
+
+ac_fn_c_check_header_compile "$LINENO" "strings.h" "ac_cv_header_strings_h" "$ac_includes_default"
+if test "x$ac_cv_header_strings_h" = xyes
+then :
+  printf "%s\n" "#define HAVE_STRINGS_H 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_type "$LINENO" "_Bool" "ac_cv_type__Bool" "$ac_includes_default"
+if test "x$ac_cv_type__Bool" = xyes
+then :
+
+printf "%s\n" "#define HAVE__BOOL 1" >>confdefs.h
+
+
+fi
+
+   { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for stdbool.h that conforms to C99" >&5
+printf %s "checking for stdbool.h that conforms to C99... " >&6; }
+if test ${ac_cv_header_stdbool_h+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdbool.h>
+
+             #ifndef __bool_true_false_are_defined
+               #error "__bool_true_false_are_defined is not defined"
+             #endif
+             char a__bool_true_false_are_defined == 1 ? 1 : -1;
+
+             /* Regardless of whether this is C++ or "_Bool" is a
+                valid type name, "true" and "false" should be usable
+                in #if expressions and integer constant expressions,
+                and "bool" should be a valid type name.  */
+
+             #if !true
+               #error "'true' is not true"
+             #endif
+             #if true != 1
+               #error "'true' is not equal to 1"
+             #endif
+             char btrue == 1 ? 1 : -1;
+             char ctrue;
+
+             #if false
+               #error "'false' is not false"
+             #endif
+             #if false != 0
+               #error "'false' is not equal to 0"
+             #endif
+             char dfalse == 0 ? 1 : -1;
+
+             enum { e = false, f = true, g = false * true, h = true * 256 };
+
+             char i(bool) 0.5 == true ? 1 : -1;
+             char j(bool) 0.0 == false ? 1 : -1;
+             char ksizeof (bool) > 0 ? 1 : -1;
+
+             struct sb { bool s: 1; bool t; } s;
+             char lsizeof s.t > 0 ? 1 : -1;
+
+             /* The following fails for
+                HP aC++/ANSI C B3910B A.05.55 Dec 04 2003. */
+             bool mh;
+             char nsizeof m == h * sizeof m0 ? 1 : -1;
+             char o-1 - (bool) 0 < 0 ? 1 : -1;
+             /* Catch a bug in an HP-UX C compiler.  See
+         https://gcc.gnu.org/ml/gcc-patches/2003-12/msg02303.html
+         https://lists.gnu.org/archive/html/bug-coreutils/2005-11/msg00161.html
+              */
+             bool p = true;
+             bool *pp = &p;
+
+             /* C 1999 specifies that bool, true, and false are to be
+                macros, but C++ 2011 and later overrule this.  */
+             #if __cplusplus < 201103
+              #ifndef bool
+               #error "bool is not defined"
+              #endif
+              #ifndef false
+               #error "false is not defined"
+              #endif
+              #ifndef true
+               #error "true is not defined"
+              #endif
+             #endif
+
+             /* If _Bool is available, repeat with it all the tests
+                above that used bool.  */
+             #ifdef HAVE__BOOL
+               struct sB { _Bool s: 1; _Bool t; } t;
+
+               char q(_Bool) 0.5 == true ? 1 : -1;
+               char r(_Bool) 0.0 == false ? 1 : -1;
+               char usizeof (_Bool) > 0 ? 1 : -1;
+               char vsizeof t.t > 0 ? 1 : -1;
+
+               _Bool wh;
+               char xsizeof m == h * sizeof m0 ? 1 : -1;
+               char y-1 - (_Bool) 0 < 0 ? 1 : -1;
+               _Bool z = true;
+               _Bool *pz = &p;
+             #endif
+
+int
+main (void)
+{
+
+             bool ps = &s;
+             *pp |= p;
+             *pp |= ! p;
+
+             #ifdef HAVE__BOOL
+               _Bool pt = &t;
+               *pz |= z;
+               *pz |= ! z;
+             #endif
+
+             /* Refer to every declared value, so they cannot be
+                discarded as unused.  */
+             return (!a + !b + !c + !d + !e + !f + !g + !h + !i + !j + !k
+                     + !l + !m + !n + !o + !p + !pp + !ps
+             #ifdef HAVE__BOOL
+                     + !q + !r + !u + !v + !w + !x + !y + !z + !pt
+             #endif
+                    );
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  ac_cv_header_stdbool_h=yes
+else $as_nop
+  ac_cv_header_stdbool_h=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_header_stdbool_h" >&5
+printf "%s\n" "$ac_cv_header_stdbool_h" >&6; }
+
+if test $ac_cv_header_stdbool_h = yes; then
+
+printf "%s\n" "#define HAVE_STDBOOL_H 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_header_compile "$LINENO" "stdnoreturn.h" "ac_cv_header_stdnoreturn_h" "$ac_includes_default"
+if test "x$ac_cv_header_stdnoreturn_h" = xyes
+then :
+  printf "%s\n" "#define HAVE_STDNORETURN_H 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_header_compile "$LINENO" "io.h" "ac_cv_header_io_h" "$ac_includes_default"
+if test "x$ac_cv_header_io_h" = xyes
+then :
+  printf "%s\n" "#define HAVE_IO_H 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_header_compile "$LINENO" "fcntl.h" "ac_cv_header_fcntl_h" "$ac_includes_default"
+if test "x$ac_cv_header_fcntl_h" = xyes
+then :
+  printf "%s\n" "#define HAVE_FCNTL_H 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_header_compile "$LINENO" "unistd.h" "ac_cv_header_unistd_h" "$ac_includes_default"
+if test "x$ac_cv_header_unistd_h" = xyes
+then :
+  printf "%s\n" "#define HAVE_UNISTD_H 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_header_compile "$LINENO" "sys/mman.h" "ac_cv_header_sys_mman_h" "$ac_includes_default"
+if test "x$ac_cv_header_sys_mman_h" = xyes
+then :
+  printf "%s\n" "#define HAVE_SYS_MMAN_H 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_header_compile "$LINENO" "sys/types.h" "ac_cv_header_sys_types_h" "$ac_includes_default"
+if test "x$ac_cv_header_sys_types_h" = xyes
+then :
+  printf "%s\n" "#define HAVE_SYS_TYPES_H 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_header_compile "$LINENO" "sys/stat.h" "ac_cv_header_sys_stat_h" "$ac_includes_default"
+if test "x$ac_cv_header_sys_stat_h" = xyes
+then :
+  printf "%s\n" "#define HAVE_SYS_STAT_H 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_header_compile "$LINENO" "sys/resource.h" "ac_cv_header_sys_resource_h" "$ac_includes_default"
+if test "x$ac_cv_header_sys_resource_h" = xyes
+then :
+  printf "%s\n" "#define HAVE_SYS_RESOURCE_H 1" >>confdefs.h
+
+fi
+
+
+ac_fn_c_check_func "$LINENO" "strcasecmp" "ac_cv_func_strcasecmp"
+if test "x$ac_cv_func_strcasecmp" = xyes
+then :
+  printf "%s\n" "#define HAVE_STRCASECMP 1" >>confdefs.h
+
+fi
+ac_fn_c_check_func "$LINENO" "stricmp" "ac_cv_func_stricmp"
+if test "x$ac_cv_func_stricmp" = xyes
+then :
+  printf "%s\n" "#define HAVE_STRICMP 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_func "$LINENO" "strncasecmp" "ac_cv_func_strncasecmp"
+if test "x$ac_cv_func_strncasecmp" = xyes
+then :
+  printf "%s\n" "#define HAVE_STRNCASECMP 1" >>confdefs.h
+
+fi
+ac_fn_c_check_func "$LINENO" "strnicmp" "ac_cv_func_strnicmp"
+if test "x$ac_cv_func_strnicmp" = xyes
+then :
+  printf "%s\n" "#define HAVE_STRNICMP 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_func "$LINENO" "strsep" "ac_cv_func_strsep"
+if test "x$ac_cv_func_strsep" = xyes
+then :
+  printf "%s\n" "#define HAVE_STRSEP 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_func "$LINENO" "strnlen" "ac_cv_func_strnlen"
+if test "x$ac_cv_func_strnlen" = xyes
+then :
+  printf "%s\n" "#define HAVE_STRNLEN 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_func "$LINENO" "strrchrnul" "ac_cv_func_strrchrnul"
+if test "x$ac_cv_func_strrchrnul" = xyes
+then :
+  printf "%s\n" "#define HAVE_STRRCHRNUL 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_func "$LINENO" "iscntrl" "ac_cv_func_iscntrl"
+if test "x$ac_cv_func_iscntrl" = xyes
+then :
+  printf "%s\n" "#define HAVE_ISCNTRL 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_func "$LINENO" "isascii" "ac_cv_func_isascii"
+if test "x$ac_cv_func_isascii" = xyes
+then :
+  printf "%s\n" "#define HAVE_ISASCII 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_func "$LINENO" "mempcpy" "ac_cv_func_mempcpy"
+if test "x$ac_cv_func_mempcpy" = xyes
+then :
+  printf "%s\n" "#define HAVE_MEMPCPY 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_func "$LINENO" "mempset" "ac_cv_func_mempset"
+if test "x$ac_cv_func_mempset" = xyes
+then :
+  printf "%s\n" "#define HAVE_MEMPSET 1" >>confdefs.h
+
+fi
+
+
+ac_fn_c_check_func "$LINENO" "getuid" "ac_cv_func_getuid"
+if test "x$ac_cv_func_getuid" = xyes
+then :
+  printf "%s\n" "#define HAVE_GETUID 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_func "$LINENO" "getgid" "ac_cv_func_getgid"
+if test "x$ac_cv_func_getgid" = xyes
+then :
+  printf "%s\n" "#define HAVE_GETGID 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_func "$LINENO" "getrlimit" "ac_cv_func_getrlimit"
+if test "x$ac_cv_func_getrlimit" = xyes
+then :
+  printf "%s\n" "#define HAVE_GETRLIMIT 1" >>confdefs.h
+
+fi
+
+
+ac_fn_c_check_func "$LINENO" "realpath" "ac_cv_func_realpath"
+if test "x$ac_cv_func_realpath" = xyes
+then :
+  printf "%s\n" "#define HAVE_REALPATH 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_func "$LINENO" "canonicalize_file_name" "ac_cv_func_canonicalize_file_name"
+if test "x$ac_cv_func_canonicalize_file_name" = xyes
+then :
+  printf "%s\n" "#define HAVE_CANONICALIZE_FILE_NAME 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_func "$LINENO" "_fullpath" "ac_cv_func__fullpath"
+if test "x$ac_cv_func__fullpath" = xyes
+then :
+  printf "%s\n" "#define HAVE__FULLPATH 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_func "$LINENO" "pathconf" "ac_cv_func_pathconf"
+if test "x$ac_cv_func_pathconf" = xyes
+then :
+  printf "%s\n" "#define HAVE_PATHCONF 1" >>confdefs.h
+
+fi
+
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for _LARGEFILE_SOURCE value needed for large files" >&5
+printf %s "checking for _LARGEFILE_SOURCE value needed for large files... " >&6; }
+if test ${ac_cv_sys_largefile_source+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  while :; do
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <sys/types.h> /* for off_t */
+     #include <stdio.h>
+int
+main (void)
+{
+int (*fp) (FILE *, off_t, int) = fseeko;
+     return fseeko (stdin, 0, 0) && fp (stdin, 0, 0);
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  ac_cv_sys_largefile_source=no; break
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#define _LARGEFILE_SOURCE 1
+#include <sys/types.h> /* for off_t */
+     #include <stdio.h>
+int
+main (void)
+{
+int (*fp) (FILE *, off_t, int) = fseeko;
+     return fseeko (stdin, 0, 0) && fp (stdin, 0, 0);
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  ac_cv_sys_largefile_source=1; break
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+  ac_cv_sys_largefile_source=unknown
+  break
+done
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_sys_largefile_source" >&5
+printf "%s\n" "$ac_cv_sys_largefile_source" >&6; }
+case $ac_cv_sys_largefile_source in #(
+  no | unknown) ;;
+  *)
+printf "%s\n" "#define _LARGEFILE_SOURCE $ac_cv_sys_largefile_source" >>confdefs.h
+;;
+esac
+rm -rf conftest*
+
+# We used to try defining _XOPEN_SOURCE=500 too, to work around a bug
+# in glibc 2.1.3, but that breaks too many other things.
+# If you want fseeko and ftello with glibc, upgrade to a fixed glibc.
+if test $ac_cv_sys_largefile_source != unknown; then
+
+printf "%s\n" "#define HAVE_FSEEKO 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_func "$LINENO" "_fseeki64" "ac_cv_func__fseeki64"
+if test "x$ac_cv_func__fseeki64" = xyes
+then :
+  printf "%s\n" "#define HAVE__FSEEKI64 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_func "$LINENO" "ftruncate" "ac_cv_func_ftruncate"
+if test "x$ac_cv_func_ftruncate" = xyes
+then :
+  printf "%s\n" "#define HAVE_FTRUNCATE 1" >>confdefs.h
+
+fi
+ac_fn_c_check_func "$LINENO" "_chsize" "ac_cv_func__chsize"
+if test "x$ac_cv_func__chsize" = xyes
+then :
+  printf "%s\n" "#define HAVE__CHSIZE 1" >>confdefs.h
+
+fi
+ac_fn_c_check_func "$LINENO" "_chsize_s" "ac_cv_func__chsize_s"
+if test "x$ac_cv_func__chsize_s" = xyes
+then :
+  printf "%s\n" "#define HAVE__CHSIZE_S 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_func "$LINENO" "fileno" "ac_cv_func_fileno"
+if test "x$ac_cv_func_fileno" = xyes
+then :
+  printf "%s\n" "#define HAVE_FILENO 1" >>confdefs.h
+
+fi
+ac_fn_c_check_func "$LINENO" "_fileno" "ac_cv_func__fileno"
+if test "x$ac_cv_func__fileno" = xyes
+then :
+  printf "%s\n" "#define HAVE__FILENO 1" >>confdefs.h
+
+fi
+
+
+
+ac_func=
+for ac_item in $ac_func_c_list
+do
+  if test $ac_func; then
+    ac_fn_c_check_func "$LINENO" $ac_func ac_cv_func_$ac_func
+    if eval test \"x\$ac_cv_func_$ac_func\" = xyes; then
+      echo "#define $ac_item 1" >> confdefs.h
+    fi
+    ac_func=
+  else
+    ac_func=$ac_item
+  fi
+done
+
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for working mmap" >&5
+printf %s "checking for working mmap... " >&6; }
+if test ${ac_cv_func_mmap_fixed_mapped+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test "$cross_compiling" = yes
+then :
+  case "$host_os" in # ((
+			  # Guess yes on platforms where we know the result.
+		  linux*) ac_cv_func_mmap_fixed_mapped=yes ;;
+			  # If we don't know, assume the worst.
+		  *)      ac_cv_func_mmap_fixed_mapped=no ;;
+		esac
+else $as_nop
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+$ac_includes_default
+/* malloc might have been renamed as rpl_malloc. */
+#undef malloc
+
+/* Thanks to Mike Haertel and Jim Avera for this test.
+   Here is a matrix of mmap possibilities:
+	mmap private not fixed
+	mmap private fixed at somewhere currently unmapped
+	mmap private fixed at somewhere already mapped
+	mmap shared not fixed
+	mmap shared fixed at somewhere currently unmapped
+	mmap shared fixed at somewhere already mapped
+   For private mappings, we should verify that changes cannot be read()
+   back from the file, nor mmap's back from the file at a different
+   address.  (There have been systems where private was not correctly
+   implemented like the infamous i386 svr4.0, and systems where the
+   VM page cache was not coherent with the file system buffer cache
+   like early versions of FreeBSD and possibly contemporary NetBSD.)
+   For shared mappings, we should conversely verify that changes get
+   propagated back to all the places they're supposed to be.
+
+   Grep wants private fixed already mapped.
+   The main things grep needs to know about mmap are:
+   * does it exist and is it safe to write into the mmap'd area
+   * how to use it (BSD variants)  */
+
+#include <fcntl.h>
+#include <sys/mman.h>
+
+/* This mess was copied from the GNU getpagesize.h.  */
+#ifndef HAVE_GETPAGESIZE
+# ifdef _SC_PAGESIZE
+#  define getpagesize() sysconf(_SC_PAGESIZE)
+# else /* no _SC_PAGESIZE */
+#  ifdef HAVE_SYS_PARAM_H
+#   include <sys/param.h>
+#   ifdef EXEC_PAGESIZE
+#    define getpagesize() EXEC_PAGESIZE
+#   else /* no EXEC_PAGESIZE */
+#    ifdef NBPG
+#     define getpagesize() NBPG * CLSIZE
+#     ifndef CLSIZE
+#      define CLSIZE 1
+#     endif /* no CLSIZE */
+#    else /* no NBPG */
+#     ifdef NBPC
+#      define getpagesize() NBPC
+#     else /* no NBPC */
+#      ifdef PAGESIZE
+#       define getpagesize() PAGESIZE
+#      endif /* PAGESIZE */
+#     endif /* no NBPC */
+#    endif /* no NBPG */
+#   endif /* no EXEC_PAGESIZE */
+#  else /* no HAVE_SYS_PARAM_H */
+#   define getpagesize() 8192	/* punt totally */
+#  endif /* no HAVE_SYS_PARAM_H */
+# endif /* no _SC_PAGESIZE */
+
+#endif /* no HAVE_GETPAGESIZE */
+
+int
+main (void)
+{
+  char *data, *data2, *data3;
+  const char *cdata2;
+  int i, pagesize;
+  int fd, fd2;
+
+  pagesize = getpagesize ();
+
+  /* First, make a file with some known garbage in it. */
+  data = (char *) malloc (pagesize);
+  if (!data)
+    return 1;
+  for (i = 0; i < pagesize; ++i)
+    *(data + i) = rand ();
+  umask (0);
+  fd = creat ("conftest.mmap", 0600);
+  if (fd < 0)
+    return 2;
+  if (write (fd, data, pagesize) != pagesize)
+    return 3;
+  close (fd);
+
+  /* Next, check that the tail of a page is zero-filled.  File must have
+     non-zero length, otherwise we risk SIGBUS for entire page.  */
+  fd2 = open ("conftest.txt", O_RDWR | O_CREAT | O_TRUNC, 0600);
+  if (fd2 < 0)
+    return 4;
+  cdata2 = "";
+  if (write (fd2, cdata2, 1) != 1)
+    return 5;
+  data2 = (char *) mmap (0, pagesize, PROT_READ | PROT_WRITE, MAP_SHARED, fd2, 0L);
+  if (data2 == MAP_FAILED)
+    return 6;
+  for (i = 0; i < pagesize; ++i)
+    if (*(data2 + i))
+      return 7;
+  close (fd2);
+  if (munmap (data2, pagesize))
+    return 8;
+
+  /* Next, try to mmap the file at a fixed address which already has
+     something else allocated at it.  If we can, also make sure that
+     we see the same garbage.  */
+  fd = open ("conftest.mmap", O_RDWR);
+  if (fd < 0)
+    return 9;
+  if (data2 != mmap (data2, pagesize, PROT_READ | PROT_WRITE,
+		     MAP_PRIVATE | MAP_FIXED, fd, 0L))
+    return 10;
+  for (i = 0; i < pagesize; ++i)
+    if (*(data + i) != *(data2 + i))
+      return 11;
+
+  /* Finally, make sure that changes to the mapped area do not
+     percolate back to the file as seen by read().  (This is a bug on
+     some variants of i386 svr4.0.)  */
+  for (i = 0; i < pagesize; ++i)
+    *(data2 + i) = *(data2 + i) + 1;
+  data3 = (char *) malloc (pagesize);
+  if (!data3)
+    return 12;
+  if (read (fd, data3, pagesize) != pagesize)
+    return 13;
+  for (i = 0; i < pagesize; ++i)
+    if (*(data + i) != *(data3 + i))
+      return 14;
+  close (fd);
+  free (data);
+  free (data3);
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_run "$LINENO"
+then :
+  ac_cv_func_mmap_fixed_mapped=yes
+else $as_nop
+  ac_cv_func_mmap_fixed_mapped=no
+fi
+rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \
+  conftest.$ac_objext conftest.beam conftest.$ac_ext
+fi
+
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_func_mmap_fixed_mapped" >&5
+printf "%s\n" "$ac_cv_func_mmap_fixed_mapped" >&6; }
+if test $ac_cv_func_mmap_fixed_mapped = yes; then
+
+printf "%s\n" "#define HAVE_MMAP 1" >>confdefs.h
+
+fi
+rm -f conftest.mmap conftest.txt
+
+ac_fn_c_check_func "$LINENO" "getpagesize" "ac_cv_func_getpagesize"
+if test "x$ac_cv_func_getpagesize" = xyes
+then :
+  printf "%s\n" "#define HAVE_GETPAGESIZE 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_func "$LINENO" "sysconf" "ac_cv_func_sysconf"
+if test "x$ac_cv_func_sysconf" = xyes
+then :
+  printf "%s\n" "#define HAVE_SYSCONF 1" >>confdefs.h
+
+fi
+
+
+ac_fn_c_check_func "$LINENO" "access" "ac_cv_func_access"
+if test "x$ac_cv_func_access" = xyes
+then :
+  printf "%s\n" "#define HAVE_ACCESS 1" >>confdefs.h
+
+fi
+ac_fn_c_check_func "$LINENO" "_access" "ac_cv_func__access"
+if test "x$ac_cv_func__access" = xyes
+then :
+  printf "%s\n" "#define HAVE__ACCESS 1" >>confdefs.h
+
+fi
+ac_fn_c_check_func "$LINENO" "faccessat" "ac_cv_func_faccessat"
+if test "x$ac_cv_func_faccessat" = xyes
+then :
+  printf "%s\n" "#define HAVE_FACCESSAT 1" >>confdefs.h
+
+fi
+
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for __builtin_expect" >&5
+printf %s "checking for __builtin_expect... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)__builtin_expect(1,1);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE___BUILTIN_EXPECT 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+
+       for ac_header in intrin.h
+do :
+  ac_fn_c_check_header_compile "$LINENO" "intrin.h" "ac_cv_header_intrin_h" "$ac_includes_default"
+if test "x$ac_cv_header_intrin_h" = xyes
+then :
+  printf "%s\n" "#define HAVE_INTRIN_H 1" >>confdefs.h
+ ac_includes_default="$ac_includes_default
+#include <intrin.h>"
+
+fi
+
+done
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for __builtin_clz" >&5
+printf %s "checking for __builtin_clz... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)__builtin_clz(0U);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE___BUILTIN_CLZ 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for __builtin_clzl" >&5
+printf %s "checking for __builtin_clzl... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)__builtin_clzl(0UL);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE___BUILTIN_CLZL 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for __builtin_clzll" >&5
+printf %s "checking for __builtin_clzll... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)__builtin_clzll(0ULL);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE___BUILTIN_CLZLL 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for _BitScanReverse" >&5
+printf %s "checking for _BitScanReverse... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)_BitScanReverse(0);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE__BITSCANREVERSE 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for _BitScanReverse64" >&5
+printf %s "checking for _BitScanReverse64... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)_BitScanReverse64(0);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE__BITSCANREVERSE64 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for sprintf" >&5
+printf %s "checking for sprintf... " >&6; }
+if test ${pa_cv_func_snprintf+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  pa_cv_func_snprintf=no
+  for pa_try_func_snprintf in snprintf _snprintf
+  do
+  if test $pa_cv_func_snprintf = no
+then :
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+const char *snprintf_test(int x);
+const char *snprintf_test(int x)
+{
+    static char buf256;
+    size_t sz;
+    sz = $pa_try_func_snprintf(buf, sizeof buf, "Hello = %d", x);
+    return (sz < sizeof buf) ? buf : NULL;
+}
+
+int main(void) {
+    puts(snprintf_test(33));
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  pa_cv_func_snprintf=$pa_try_func_snprintf
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+ done
+
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $pa_cv_func_snprintf" >&5
+printf "%s\n" "$pa_cv_func_snprintf" >&6; }
+ if test $pa_cv_func_snprintf = no
+then :
+
+else $as_nop
+
+printf "%s\n" "#define HAVE_SNPRINTF 1" >>confdefs.h
+
+	 if test $pa_cv_func_snprintf = snprintf
+then :
+
+else $as_nop
+
+printf "%s\n" "#define snprintf $pa_cv_func_snprintf" >>confdefs.h
+
+fi
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for vsnprintf" >&5
+printf %s "checking for vsnprintf... " >&6; }
+if test ${pa_cv_func_vsnprintf+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  pa_cv_func_vsnprintf=no
+  for pa_try_func_vsnprintf in vsnprintf _vsnprintf
+  do
+  if test $pa_cv_func_vsnprintf = no
+then :
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+const char *vsnprintf_test(const char *fmt, va_list va);
+const char *vsnprintf_test(const char *fmt, va_list va)
+{
+    static char buf256;
+    size_t sz;
+    sz = $pa_try_func_vsnprintf(buf, sizeof buf, fmt, va);
+    return (sz < sizeof buf) ? buf : NULL;
+}
+
+const char *vsnprintf_caller(const char *fmt, ...);
+const char *vsnprintf_caller(const char *fmt, ...)
+{
+    const char *what;
+    va_list va;
+    va_start(va, fmt);
+    what = vsnprintf_test(fmt, va);
+    va_end(va);
+    return what;
+}
+
+int main(void) {
+    puts(vsnprintf_caller("Hello = %d", 33));
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  pa_cv_func_vsnprintf=$pa_try_func_vsnprintf
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+ done
+
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $pa_cv_func_vsnprintf" >&5
+printf "%s\n" "$pa_cv_func_vsnprintf" >&6; }
+ if test $pa_cv_func_vsnprintf = no
+then :
+
+else $as_nop
+
+printf "%s\n" "#define HAVE_VSNPRINTF 1" >>confdefs.h
+
+	 if test $pa_cv_func_vsnprintf = vsnprintf
+then :
+
+else $as_nop
+
+printf "%s\n" "#define vsnprintf $pa_cv_func_vsnprintf" >>confdefs.h
+
+fi
+fi
+ac_fn_c_check_func "$LINENO" "strlcpy" "ac_cv_func_strlcpy"
+if test "x$ac_cv_func_strlcpy" = xyes
+then :
+  printf "%s\n" "#define HAVE_STRLCPY 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_func "$LINENO" "strrchrnul" "ac_cv_func_strrchrnul"
+if test "x$ac_cv_func_strrchrnul" = xyes
+then :
+  printf "%s\n" "#define HAVE_STRRCHRNUL 1" >>confdefs.h
+
+fi
+
+
+ac_fn_c_check_type "$LINENO" "struct _stati64" "ac_cv_type_struct__stati64" "$ac_includes_default"
+if test "x$ac_cv_type_struct__stati64" = xyes
+then :
+
+printf "%s\n" "#define HAVE_STRUCT__STATI64 1" >>confdefs.h
+
+
+fi
+
+ac_fn_c_check_type "$LINENO" "struct stat" "ac_cv_type_struct_stat" "$ac_includes_default"
+if test "x$ac_cv_type_struct_stat" = xyes
+then :
+
+printf "%s\n" "#define HAVE_STRUCT_STAT 1" >>confdefs.h
+
+
+fi
+
+ac_fn_c_check_func "$LINENO" "stat" "ac_cv_func_stat"
+if test "x$ac_cv_func_stat" = xyes
+then :
+  printf "%s\n" "#define HAVE_STAT 1" >>confdefs.h
+
+fi
+ac_fn_c_check_func "$LINENO" "_stati64" "ac_cv_func__stati64"
+if test "x$ac_cv_func__stati64" = xyes
+then :
+  printf "%s\n" "#define HAVE__STATI64 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_func "$LINENO" "fstat" "ac_cv_func_fstat"
+if test "x$ac_cv_func_fstat" = xyes
+then :
+  printf "%s\n" "#define HAVE_FSTAT 1" >>confdefs.h
+
+fi
+ac_fn_c_check_func "$LINENO" "_fstati64" "ac_cv_func__fstati64"
+if test "x$ac_cv_func__fstati64" = xyes
+then :
+  printf "%s\n" "#define HAVE__FSTATI64 1" >>confdefs.h
+
+fi
+
+ac_fn_c_check_func "$LINENO" "S_ISREG" "ac_cv_func_S_ISREG"
+if test "x$ac_cv_func_S_ISREG" = xyes
+then :
+  printf "%s\n" "#define HAVE_S_ISREG 1" >>confdefs.h
+
+fi
+
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $CC options needed to detect all undeclared functions" >&5
+printf %s "checking for $CC options needed to detect all undeclared functions... " >&6; }
+if test ${ac_cv_c_undeclared_builtin_options+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  ac_save_CFLAGS=$CFLAGS
+   ac_cv_c_undeclared_builtin_options='cannot detect'
+   for ac_arg in '' -fno-builtin; do
+     CFLAGS="$ac_save_CFLAGS $ac_arg"
+     # This test program should *not* compile successfully.
+     cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+int
+main (void)
+{
+(void) strchr;
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+
+else $as_nop
+  # This test program should compile successfully.
+        # No library function is consistently available on
+        # freestanding implementations, so test against a dummy
+        # declaration.  Include always-available headers on the
+        # off chance that they somehow elicit warnings.
+        cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <float.h>
+#include <limits.h>
+#include <stdarg.h>
+#include <stddef.h>
+extern void ac_decl (int, char *);
+
+int
+main (void)
+{
+(void) ac_decl (0, (char *) 0);
+  (void) ac_decl;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  if test x"$ac_arg" = x
+then :
+  ac_cv_c_undeclared_builtin_options='none needed'
+else $as_nop
+  ac_cv_c_undeclared_builtin_options=$ac_arg
+fi
+          break
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+    done
+    CFLAGS=$ac_save_CFLAGS
+
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_c_undeclared_builtin_options" >&5
+printf "%s\n" "$ac_cv_c_undeclared_builtin_options" >&6; }
+  case $ac_cv_c_undeclared_builtin_options in #(
+  'cannot detect') :
+    { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
+as_fn_error $? "cannot make $CC report undeclared builtins
+See \`config.log' for more details" "$LINENO" 5; } ;; #(
+  'none needed') :
+    ac_c_undeclared_builtin_options='' ;; #(
+  *) :
+    ac_c_undeclared_builtin_options=$ac_cv_c_undeclared_builtin_options ;;
+esac
+
+ac_fn_check_decl "$LINENO" "strcasecmp" "ac_cv_have_decl_strcasecmp" "$ac_includes_default" "$ac_c_undeclared_builtin_options" "CFLAGS"
+if test "x$ac_cv_have_decl_strcasecmp" = xyes
+then :
+  ac_have_decl=1
+else $as_nop
+  ac_have_decl=0
+fi
+printf "%s\n" "#define HAVE_DECL_STRCASECMP $ac_have_decl" >>confdefs.h
+
+ac_fn_check_decl "$LINENO" "stricmp" "ac_cv_have_decl_stricmp" "$ac_includes_default" "$ac_c_undeclared_builtin_options" "CFLAGS"
+if test "x$ac_cv_have_decl_stricmp" = xyes
+then :
+  ac_have_decl=1
+else $as_nop
+  ac_have_decl=0
+fi
+printf "%s\n" "#define HAVE_DECL_STRICMP $ac_have_decl" >>confdefs.h
+
+ac_fn_check_decl "$LINENO" "strncasecmp" "ac_cv_have_decl_strncasecmp" "$ac_includes_default" "$ac_c_undeclared_builtin_options" "CFLAGS"
+if test "x$ac_cv_have_decl_strncasecmp" = xyes
+then :
+  ac_have_decl=1
+else $as_nop
+  ac_have_decl=0
+fi
+printf "%s\n" "#define HAVE_DECL_STRNCASECMP $ac_have_decl" >>confdefs.h
+
+ac_fn_check_decl "$LINENO" "strnicmp" "ac_cv_have_decl_strnicmp" "$ac_includes_default" "$ac_c_undeclared_builtin_options" "CFLAGS"
+if test "x$ac_cv_have_decl_strnicmp" = xyes
+then :
+  ac_have_decl=1
+else $as_nop
+  ac_have_decl=0
+fi
+printf "%s\n" "#define HAVE_DECL_STRNICMP $ac_have_decl" >>confdefs.h
+
+ac_fn_check_decl "$LINENO" "strsep" "ac_cv_have_decl_strsep" "$ac_includes_default" "$ac_c_undeclared_builtin_options" "CFLAGS"
+if test "x$ac_cv_have_decl_strsep" = xyes
+then :
+  ac_have_decl=1
+else $as_nop
+  ac_have_decl=0
+fi
+printf "%s\n" "#define HAVE_DECL_STRSEP $ac_have_decl" >>confdefs.h
+
+ac_fn_check_decl "$LINENO" "strlcpy" "ac_cv_have_decl_strlcpy" "$ac_includes_default" "$ac_c_undeclared_builtin_options" "CFLAGS"
+if test "x$ac_cv_have_decl_strlcpy" = xyes
+then :
+  ac_have_decl=1
+else $as_nop
+  ac_have_decl=0
+fi
+printf "%s\n" "#define HAVE_DECL_STRLCPY $ac_have_decl" >>confdefs.h
+
+ac_fn_check_decl "$LINENO" "strnlen" "ac_cv_have_decl_strnlen" "$ac_includes_default" "$ac_c_undeclared_builtin_options" "CFLAGS"
+if test "x$ac_cv_have_decl_strnlen" = xyes
+then :
+  ac_have_decl=1
+else $as_nop
+  ac_have_decl=0
+fi
+printf "%s\n" "#define HAVE_DECL_STRNLEN $ac_have_decl" >>confdefs.h
+
+ac_fn_check_decl "$LINENO" "strrchrnul" "ac_cv_have_decl_strrchrnul" "$ac_includes_default" "$ac_c_undeclared_builtin_options" "CFLAGS"
+if test "x$ac_cv_have_decl_strrchrnul" = xyes
+then :
+  ac_have_decl=1
+else $as_nop
+  ac_have_decl=0
+fi
+printf "%s\n" "#define HAVE_DECL_STRRCHRNUL $ac_have_decl" >>confdefs.h
+
+
+
+  ac_fn_c_check_type "$LINENO" "uintptr_t" "ac_cv_type_uintptr_t" "$ac_includes_default"
+if test "x$ac_cv_type_uintptr_t" = xyes
+then :
+
+printf "%s\n" "#define HAVE_UINTPTR_T 1" >>confdefs.h
+
+else $as_nop
+  for ac_type in 'unsigned int' 'unsigned long int' \
+	'unsigned long long int'; do
+       cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+$ac_includes_default
+int
+main (void)
+{
+static int test_array 1 - 2 * !(sizeof (void *) <= sizeof ($ac_type));
+test_array 0 = 0;
+return test_array 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+
+printf "%s\n" "#define uintptr_t $ac_type" >>confdefs.h
+
+	  ac_type=
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+       test -z "$ac_type" && break
+     done
+fi
+
+
+
+
+
+ # Check whether --enable-pdf-compression was given.
+if test ${enable_pdf_compression+y}
+then :
+  enableval=$enable_pdf_compression; pa_arg_bool_enableval="$enableval"
+else $as_nop
+  pa_arg_bool_enableval="yes"
+fi
+
+
+ if test x"$pa_arg_bool_enableval" != xno
+then :
+
+else $as_nop
+  PDFOPT='-nocompress'
+fi
+
+
+
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether byte ordering is bigendian" >&5
+printf %s "checking whether byte ordering is bigendian... " >&6; }
+if test ${ac_cv_c_bigendian+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  ac_cv_c_bigendian=unknown
+    # See if we're dealing with a universal compiler.
+    cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#ifndef __APPLE_CC__
+	       not a universal capable compiler
+	     #endif
+	     typedef int dummy;
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+
+	# Check for potential -arch flags.  It is not universal unless
+	# there are at least two -arch flags with different values.
+	ac_arch=
+	ac_prev=
+	for ac_word in $CC $CFLAGS $CPPFLAGS $LDFLAGS; do
+	 if test -n "$ac_prev"; then
+	   case $ac_word in
+	     i?86 | x86_64 | ppc | ppc64)
+	       if test -z "$ac_arch" || test "$ac_arch" = "$ac_word"; then
+		 ac_arch=$ac_word
+	       else
+		 ac_cv_c_bigendian=universal
+		 break
+	       fi
+	       ;;
+	   esac
+	   ac_prev=
+	 elif test "x$ac_word" = "x-arch"; then
+	   ac_prev=arch
+	 fi
+       done
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+    if test $ac_cv_c_bigendian = unknown; then
+      # See if sys/param.h defines the BYTE_ORDER macro.
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <sys/types.h>
+	     #include <sys/param.h>
+
+int
+main (void)
+{
+#if ! (defined BYTE_ORDER && defined BIG_ENDIAN \
+		     && defined LITTLE_ENDIAN && BYTE_ORDER && BIG_ENDIAN \
+		     && LITTLE_ENDIAN)
+	      bogus endian macros
+	     #endif
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  # It does; now see whether it defined to BIG_ENDIAN or not.
+	 cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <sys/types.h>
+		#include <sys/param.h>
+
+int
+main (void)
+{
+#if BYTE_ORDER != BIG_ENDIAN
+		 not big endian
+		#endif
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  ac_cv_c_bigendian=yes
+else $as_nop
+  ac_cv_c_bigendian=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+    fi
+    if test $ac_cv_c_bigendian = unknown; then
+      # See if <limits.h> defines _LITTLE_ENDIAN or _BIG_ENDIAN (e.g., Solaris).
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <limits.h>
+
+int
+main (void)
+{
+#if ! (defined _LITTLE_ENDIAN || defined _BIG_ENDIAN)
+	      bogus endian macros
+	     #endif
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  # It does; now see whether it defined to _BIG_ENDIAN or not.
+	 cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <limits.h>
+
+int
+main (void)
+{
+#ifndef _BIG_ENDIAN
+		 not big endian
+		#endif
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  ac_cv_c_bigendian=yes
+else $as_nop
+  ac_cv_c_bigendian=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+    fi
+    if test $ac_cv_c_bigendian = unknown; then
+      # Compile a test program.
+      if test "$cross_compiling" = yes
+then :
+  # Try to guess by grepping values from an object file.
+	 cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+unsigned short int ascii_mm =
+		  { 0x4249, 0x4765, 0x6E44, 0x6961, 0x6E53, 0x7953, 0 };
+		unsigned short int ascii_ii =
+		  { 0x694C, 0x5454, 0x656C, 0x6E45, 0x6944, 0x6E61, 0 };
+		int use_ascii (int i) {
+		  return ascii_mmi + ascii_iii;
+		}
+		unsigned short int ebcdic_ii =
+		  { 0x89D3, 0xE3E3, 0x8593, 0x95C5, 0x89C4, 0x9581, 0 };
+		unsigned short int ebcdic_mm =
+		  { 0xC2C9, 0xC785, 0x95C4, 0x8981, 0x95E2, 0xA8E2, 0 };
+		int use_ebcdic (int i) {
+		  return ebcdic_mmi + ebcdic_iii;
+		}
+		extern int foo;
+
+int
+main (void)
+{
+return use_ascii (foo) == use_ebcdic (foo);
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  if grep BIGenDianSyS conftest.$ac_objext >/dev/null; then
+	      ac_cv_c_bigendian=yes
+	    fi
+	    if grep LiTTleEnDian conftest.$ac_objext >/dev/null ; then
+	      if test "$ac_cv_c_bigendian" = unknown; then
+		ac_cv_c_bigendian=no
+	      else
+		# finding both strings is unlikely to happen, but who knows?
+		ac_cv_c_bigendian=unknown
+	      fi
+	    fi
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+else $as_nop
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+$ac_includes_default
+int
+main (void)
+{
+
+	     /* Are we little or big endian?  From Harbison&Steele.  */
+	     union
+	     {
+	       long int l;
+	       char csizeof (long int);
+	     } u;
+	     u.l = 1;
+	     return u.csizeof (long int) - 1 == 1;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_run "$LINENO"
+then :
+  ac_cv_c_bigendian=no
+else $as_nop
+  ac_cv_c_bigendian=yes
+fi
+rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \
+  conftest.$ac_objext conftest.beam conftest.$ac_ext
+fi
+
+    fi
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_c_bigendian" >&5
+printf "%s\n" "$ac_cv_c_bigendian" >&6; }
+ case $ac_cv_c_bigendian in #(
+   yes)
+     printf "%s\n" "#define WORDS_BIGENDIAN 1" >>confdefs.h
+;; #(
+   no)
+     printf "%s\n" "#define WORDS_LITTLEENDIAN 1" >>confdefs.h
+ ;; #(
+   universal)
+
+printf "%s\n" "#define AC_APPLE_UNIVERSAL_BUILD 1" >>confdefs.h
+
+     ;; #(
+   *)
+     as_fn_error $? "unknown endianness
+ presetting ac_cv_c_bigendian=no (or yes) will help" "$LINENO" 5 ;;
+ esac
+
+
+
+       for ac_header in endian.h
+do :
+  ac_fn_c_check_header_compile "$LINENO" "endian.h" "ac_cv_header_endian_h" "$ac_includes_default"
+if test "x$ac_cv_header_endian_h" = xyes
+then :
+  printf "%s\n" "#define HAVE_ENDIAN_H 1" >>confdefs.h
+ ac_includes_default="$ac_includes_default
+#include <endian.h>"
+
+fi
+
+done
+       for ac_header in sys/endian.h
+do :
+  ac_fn_c_check_header_compile "$LINENO" "sys/endian.h" "ac_cv_header_sys_endian_h" "$ac_includes_default"
+if test "x$ac_cv_header_sys_endian_h" = xyes
+then :
+  printf "%s\n" "#define HAVE_SYS_ENDIAN_H 1" >>confdefs.h
+ ac_includes_default="$ac_includes_default
+#include <sys/endian.h>"
+
+fi
+
+done
+       for ac_header in machine/endian.h
+do :
+  ac_fn_c_check_header_compile "$LINENO" "machine/endian.h" "ac_cv_header_machine_endian_h" "$ac_includes_default"
+if test "x$ac_cv_header_machine_endian_h" = xyes
+then :
+  printf "%s\n" "#define HAVE_MACHINE_ENDIAN_H 1" >>confdefs.h
+ ac_includes_default="$ac_includes_default
+#include <machine/endian.h>"
+
+fi
+
+done
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for cpu_to_le16" >&5
+printf %s "checking for cpu_to_le16... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)cpu_to_le16(0);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_CPU_TO_LE16 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for cpu_to_le32" >&5
+printf %s "checking for cpu_to_le32... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)cpu_to_le32(0);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_CPU_TO_LE32 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for cpu_to_le64" >&5
+printf %s "checking for cpu_to_le64... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)cpu_to_le64(0);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_CPU_TO_LE64 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for __cpu_to_le16" >&5
+printf %s "checking for __cpu_to_le16... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)__cpu_to_le16(0);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE___CPU_TO_LE16 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for __cpu_to_le32" >&5
+printf %s "checking for __cpu_to_le32... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)__cpu_to_le32(0);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE___CPU_TO_LE32 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for __cpu_to_le64" >&5
+printf %s "checking for __cpu_to_le64... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)__cpu_to_le64(0);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE___CPU_TO_LE64 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for htole16" >&5
+printf %s "checking for htole16... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)htole16(0);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_HTOLE16 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for htole32" >&5
+printf %s "checking for htole32... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)htole32(0);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_HTOLE32 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for htole64" >&5
+printf %s "checking for htole64... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)htole64(0);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_HTOLE64 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for __bswap_16" >&5
+printf %s "checking for __bswap_16... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)__bswap_16(0);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE___BSWAP_16 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for __bswap_32" >&5
+printf %s "checking for __bswap_32... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)__bswap_32(0);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE___BSWAP_32 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for __bswap_64" >&5
+printf %s "checking for __bswap_64... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)__bswap_64(0);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE___BSWAP_64 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for __builtin_bswap16" >&5
+printf %s "checking for __builtin_bswap16... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)__builtin_bswap16(0);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE___BUILTIN_BSWAP16 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for __builtin_bswap32" >&5
+printf %s "checking for __builtin_bswap32... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)__builtin_bswap32(0);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE___BUILTIN_BSWAP32 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for __builtin_bswap64" >&5
+printf %s "checking for __builtin_bswap64... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)__builtin_bswap64(0);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE___BUILTIN_BSWAP64 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for _byteswap_ushort" >&5
+printf %s "checking for _byteswap_ushort... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)_byteswap_ushort(0);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE__BYTESWAP_USHORT 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for _byteswap_ulong" >&5
+printf %s "checking for _byteswap_ulong... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)_byteswap_ulong(0);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE__BYTESWAP_ULONG 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for _byteswap_uint64" >&5
+printf %s "checking for _byteswap_uint64... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)_byteswap_uint64(0);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE__BYTESWAP_UINT64 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for __builtin_constant_p" >&5
+printf %s "checking for __builtin_constant_p... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)__builtin_constant_p(0);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE___BUILTIN_CONSTANT_P 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for __builtin_choose_expr" >&5
+printf %s "checking for __builtin_choose_expr... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int main(void) {
+    (void)__builtin_choose_expr(0,1,2);
+    return 0;
+}
+
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE___BUILTIN_CHOOSE_EXPR 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CPPFLAGS_orig=$CPPFLAGS
+  CPPFLAGS="$CPPFLAGS -Werror=attributes"
+  _PA_ADD_FLAGS_CPPFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CPPFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Werror=attributes" >&5
+printf %s "checking if $CC accepts -Werror=attributes... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CPPFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CPPFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CPPFLAGS_WERROR_ATTRIBUTES 1" >>confdefs.h
+
+
+else $as_nop
+  CPPFLAGS="$_PA_ADD_FLAGS_CPPFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports the noreturn function attribute" >&5
+printf %s "checking if $CC supports the noreturn function attribute... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+#include "autoconf/attribute.h"
+
+
+extern void * ATTRIBUTE(noreturn)
+  bar(int);
+void * foo(void);
+void * foo(void)
+{
+	return
+		bar(1);
+}
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_FUNC_ATTRIBUTE_NORETURN 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+
+
+
+
+
+
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports the noreturn function attribute on pointers" >&5
+printf %s "checking if $CC supports the noreturn function attribute on pointers... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+#include "autoconf/attribute.h"
+
+
+extern void * ATTRIBUTE(noreturn)
+  (*bar1)(int);
+void * foo1(void);
+void * foo1(void)
+{
+	return
+		bar1(1);
+}
+
+typedef void * ATTRIBUTE(noreturn)
+  (*bar_t)(int);
+extern bar_t bar2;
+void * foo2(void);
+void * foo2(void)
+{
+	return
+		bar2(1);
+}
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_FUNC_PTR_ATTRIBUTE_NORETURN 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+
+
+
+
+
+
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports the returns_nonnull function attribute" >&5
+printf %s "checking if $CC supports the returns_nonnull function attribute... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+#include "autoconf/attribute.h"
+
+
+extern void * ATTRIBUTE(returns_nonnull)
+  bar(int);
+void * foo(void);
+void * foo(void)
+{
+	return
+		bar(1);
+}
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_FUNC_ATTRIBUTE_RETURNS_NONNULL 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+
+
+
+
+
+
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports the returns_nonnull function attribute on pointers" >&5
+printf %s "checking if $CC supports the returns_nonnull function attribute on pointers... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+#include "autoconf/attribute.h"
+
+
+extern void * ATTRIBUTE(returns_nonnull)
+  (*bar1)(int);
+void * foo1(void);
+void * foo1(void)
+{
+	return
+		bar1(1);
+}
+
+typedef void * ATTRIBUTE(returns_nonnull)
+  (*bar_t)(int);
+extern bar_t bar2;
+void * foo2(void);
+void * foo2(void)
+{
+	return
+		bar2(1);
+}
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_FUNC_PTR_ATTRIBUTE_RETURNS_NONNULL 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+
+
+
+
+
+
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports the malloc function attribute" >&5
+printf %s "checking if $CC supports the malloc function attribute... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+#include "autoconf/attribute.h"
+
+
+extern void * ATTRIBUTE(malloc)
+  bar(int);
+void * foo(void);
+void * foo(void)
+{
+	return
+		bar(1);
+}
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_FUNC_ATTRIBUTE_MALLOC 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+
+
+
+
+
+
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports the malloc function attribute on pointers" >&5
+printf %s "checking if $CC supports the malloc function attribute on pointers... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+#include "autoconf/attribute.h"
+
+
+extern void * ATTRIBUTE(malloc)
+  (*bar1)(int);
+void * foo1(void);
+void * foo1(void)
+{
+	return
+		bar1(1);
+}
+
+typedef void * ATTRIBUTE(malloc)
+  (*bar_t)(int);
+extern bar_t bar2;
+void * foo2(void);
+void * foo2(void)
+{
+	return
+		bar2(1);
+}
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_FUNC_PTR_ATTRIBUTE_MALLOC 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+
+
+
+
+
+
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports the alloc_size(1) function attribute" >&5
+printf %s "checking if $CC supports the alloc_size(1) function attribute... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+#include "autoconf/attribute.h"
+
+
+extern void * ATTRIBUTE(alloc_size(1))
+  bar(int);
+void * foo(void);
+void * foo(void)
+{
+	return
+		bar(80);
+}
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_FUNC_ATTRIBUTE1_ALLOC_SIZE 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+
+
+
+
+
+
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports the alloc_size(1) function attribute on pointers" >&5
+printf %s "checking if $CC supports the alloc_size(1) function attribute on pointers... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+#include "autoconf/attribute.h"
+
+
+extern void * ATTRIBUTE(alloc_size(1))
+  (*bar1)(int);
+void * foo1(void);
+void * foo1(void)
+{
+	return
+		bar1(80);
+}
+
+typedef void * ATTRIBUTE(alloc_size(1))
+  (*bar_t)(int);
+extern bar_t bar2;
+void * foo2(void);
+void * foo2(void)
+{
+	return
+		bar2(80);
+}
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_FUNC_PTR_ATTRIBUTE1_ALLOC_SIZE 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+
+
+
+
+
+
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports the alloc_size(1,2) function attribute" >&5
+printf %s "checking if $CC supports the alloc_size(1,2) function attribute... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+#include "autoconf/attribute.h"
+
+
+extern void * ATTRIBUTE(alloc_size(1,2))
+  bar(int,int);
+void * foo(void);
+void * foo(void)
+{
+	return
+		bar(20,40);
+}
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_FUNC_ATTRIBUTE2_ALLOC_SIZE 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+
+
+
+
+
+
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports the alloc_size(1,2) function attribute on pointers" >&5
+printf %s "checking if $CC supports the alloc_size(1,2) function attribute on pointers... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+#include "autoconf/attribute.h"
+
+
+extern void * ATTRIBUTE(alloc_size(1,2))
+  (*bar1)(int,int);
+void * foo1(void);
+void * foo1(void)
+{
+	return
+		bar1(20,40);
+}
+
+typedef void * ATTRIBUTE(alloc_size(1,2))
+  (*bar_t)(int,int);
+extern bar_t bar2;
+void * foo2(void);
+void * foo2(void)
+{
+	return
+		bar2(20,40);
+}
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_FUNC_PTR_ATTRIBUTE2_ALLOC_SIZE 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+
+
+
+
+
+
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports the sentinel function attribute" >&5
+printf %s "checking if $CC supports the sentinel function attribute... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+#include "autoconf/attribute.h"
+
+
+extern void * ATTRIBUTE(sentinel)
+  bar(const char *, ...);
+void * foo(void);
+void * foo(void)
+{
+	return
+		bar("a","b",NULL);
+}
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_FUNC_ATTRIBUTE_SENTINEL 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+
+
+
+
+
+
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports the sentinel function attribute on pointers" >&5
+printf %s "checking if $CC supports the sentinel function attribute on pointers... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+#include "autoconf/attribute.h"
+
+
+extern void * ATTRIBUTE(sentinel)
+  (*bar1)(const char *, ...);
+void * foo1(void);
+void * foo1(void)
+{
+	return
+		bar1("a","b",NULL);
+}
+
+typedef void * ATTRIBUTE(sentinel)
+  (*bar_t)(const char *, ...);
+extern bar_t bar2;
+void * foo2(void);
+void * foo2(void)
+{
+	return
+		bar2("a","b",NULL);
+}
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_FUNC_PTR_ATTRIBUTE_SENTINEL 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+
+
+
+
+
+
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports the format(printf,1,2) function attribute" >&5
+printf %s "checking if $CC supports the format(printf,1,2) function attribute... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+#include "autoconf/attribute.h"
+
+
+extern int ATTRIBUTE(format(printf,1,2))
+  bar(const char *, ...);
+int foo(void);
+int foo(void)
+{
+	return
+		bar("%d",1);
+}
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_FUNC_ATTRIBUTE3_FORMAT 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+
+
+
+
+
+
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports the format(printf,1,2) function attribute on pointers" >&5
+printf %s "checking if $CC supports the format(printf,1,2) function attribute on pointers... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+#include "autoconf/attribute.h"
+
+
+extern int ATTRIBUTE(format(printf,1,2))
+  (*bar1)(const char *, ...);
+int foo1(void);
+int foo1(void)
+{
+	return
+		bar1("%d",1);
+}
+
+typedef int ATTRIBUTE(format(printf,1,2))
+  (*bar_t)(const char *, ...);
+extern bar_t bar2;
+int foo2(void);
+int foo2(void)
+{
+	return
+		bar2("%d",1);
+}
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_FUNC_PTR_ATTRIBUTE3_FORMAT 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+
+
+
+
+
+
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports the const function attribute" >&5
+printf %s "checking if $CC supports the const function attribute... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+#include "autoconf/attribute.h"
+
+
+extern void * ATTRIBUTE(const)
+  bar(int);
+void * foo(void);
+void * foo(void)
+{
+	return
+		bar(1);
+}
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_FUNC_ATTRIBUTE_CONST 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+
+
+
+
+
+
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports the const function attribute on pointers" >&5
+printf %s "checking if $CC supports the const function attribute on pointers... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+#include "autoconf/attribute.h"
+
+
+extern void * ATTRIBUTE(const)
+  (*bar1)(int);
+void * foo1(void);
+void * foo1(void)
+{
+	return
+		bar1(1);
+}
+
+typedef void * ATTRIBUTE(const)
+  (*bar_t)(int);
+extern bar_t bar2;
+void * foo2(void);
+void * foo2(void)
+{
+	return
+		bar2(1);
+}
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_FUNC_PTR_ATTRIBUTE_CONST 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+
+
+
+
+
+
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports the pure function attribute" >&5
+printf %s "checking if $CC supports the pure function attribute... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+#include "autoconf/attribute.h"
+
+
+extern void * ATTRIBUTE(pure)
+  bar(int);
+void * foo(void);
+void * foo(void)
+{
+	return
+		bar(1);
+}
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_FUNC_ATTRIBUTE_PURE 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+
+
+
+
+
+
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports the pure function attribute on pointers" >&5
+printf %s "checking if $CC supports the pure function attribute on pointers... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+#include "autoconf/attribute.h"
+
+
+extern void * ATTRIBUTE(pure)
+  (*bar1)(int);
+void * foo1(void);
+void * foo1(void)
+{
+	return
+		bar1(1);
+}
+
+typedef void * ATTRIBUTE(pure)
+  (*bar_t)(int);
+extern bar_t bar2;
+void * foo2(void);
+void * foo2(void)
+{
+	return
+		bar2(1);
+}
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_FUNC_PTR_ATTRIBUTE_PURE 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+
+
+
+
+
+
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports the cold function attribute" >&5
+printf %s "checking if $CC supports the cold function attribute... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+#include "autoconf/attribute.h"
+
+
+extern void * ATTRIBUTE(cold)
+  bar(int);
+void * foo(void);
+void * foo(void)
+{
+	return
+		bar(1);
+}
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_FUNC_ATTRIBUTE_COLD 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+
+
+
+
+
+
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports the cold function attribute on pointers" >&5
+printf %s "checking if $CC supports the cold function attribute on pointers... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+#include "autoconf/attribute.h"
+
+
+extern void * ATTRIBUTE(cold)
+  (*bar1)(int);
+void * foo1(void);
+void * foo1(void)
+{
+	return
+		bar1(1);
+}
+
+typedef void * ATTRIBUTE(cold)
+  (*bar_t)(int);
+extern bar_t bar2;
+void * foo2(void);
+void * foo2(void)
+{
+	return
+		bar2(1);
+}
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_FUNC_PTR_ATTRIBUTE_COLD 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+
+
+
+
+
+
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports the unused function attribute" >&5
+printf %s "checking if $CC supports the unused function attribute... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+#include "autoconf/attribute.h"
+
+
+extern void * ATTRIBUTE(unused)
+  bar(int);
+void * foo(void);
+void * foo(void)
+{
+	return
+		bar(1);
+}
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_FUNC_ATTRIBUTE_UNUSED 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+
+
+
+
+
+
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports the unused function attribute on pointers" >&5
+printf %s "checking if $CC supports the unused function attribute on pointers... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+#include "autoconf/attribute.h"
+
+
+extern void * ATTRIBUTE(unused)
+  (*bar1)(int);
+void * foo1(void);
+void * foo1(void)
+{
+	return
+		bar1(1);
+}
+
+typedef void * ATTRIBUTE(unused)
+  (*bar_t)(int);
+extern bar_t bar2;
+void * foo2(void);
+void * foo2(void)
+{
+	return
+		bar2(1);
+}
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_FUNC_PTR_ATTRIBUTE_UNUSED 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+
+
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports the error function attribute" >&5
+printf %s "checking if $CC supports the error function attribute... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+#include "autoconf/attribute.h"
+
+
+extern ATTRIBUTE(error("message")) void barf(void);
+void foo(void);
+void foo(void)
+{
+	if (0)
+		barf();
+}
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_FUNC_ATTRIBUTE_ERROR 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+
+
+
+
+ # Check whether --enable-gc was given.
+if test ${enable_gc+y}
+then :
+  enableval=$enable_gc; pa_arg_bool_enableval="$enableval"
+else $as_nop
+  pa_arg_bool_enableval="yes"
+fi
+
+
+ if test x"$pa_arg_bool_enableval" != xno
+then :
+
+
+
+
+
+  _PA_ADD_FLAGS_LDFLAGS_orig=$LDFLAGS
+  LDFLAGS="$LDFLAGS -Wl,--as-needed"
+  _PA_ADD_FLAGS_LDFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_LDFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Wl,--as-needed" >&5
+printf %s "checking if $CC accepts -Wl,--as-needed... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_LDFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_LDFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define LDFLAGS_WL_AS_NEEDED 1" >>confdefs.h
+
+
+else $as_nop
+  LDFLAGS="$_PA_ADD_FLAGS_LDFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -ffunction-sections"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -ffunction-sections" >&5
+printf %s "checking if $CC accepts -ffunction-sections... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_FFUNCTION_SECTIONS 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -fdata-sections"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -fdata-sections" >&5
+printf %s "checking if $CC accepts -fdata-sections... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_FDATA_SECTIONS 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_LDFLAGS_orig=$LDFLAGS
+  LDFLAGS="$LDFLAGS -Wl,--gc-sections"
+  _PA_ADD_FLAGS_LDFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_LDFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Wl,--gc-sections" >&5
+printf %s "checking if $CC accepts -Wl,--gc-sections... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_LDFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_LDFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define LDFLAGS_WL_GC_SECTIONS 1" >>confdefs.h
+
+
+else $as_nop
+  LDFLAGS="$_PA_ADD_FLAGS_LDFLAGS_orig"
+
+fi
+
+
+
+
+
+fi
+
+
+
+
+ # Check whether --enable-lto was given.
+if test ${enable_lto+y}
+then :
+  enableval=$enable_lto; pa_arg_bool_enableval="$enableval"
+else $as_nop
+  pa_arg_bool_enableval="no"
+fi
+
+
+ if test x"$pa_arg_bool_enableval" != xno
+then :
+  _pa_flag_found=no
+ if test $_pa_flag_found = no
+then :
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -flto=auto"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -flto=auto" >&5
+printf %s "checking if $CC accepts -flto=auto... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_FLTO_AUTO 1" >>confdefs.h
+
+   _pa_flag_found=yes
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+fi
+  if test $_pa_flag_found = no
+then :
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -flto"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -flto" >&5
+printf %s "checking if $CC accepts -flto... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_FLTO 1" >>confdefs.h
+
+   _pa_flag_found=yes
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+fi
+
+
+_pa_flag_found=no
+ if test $_pa_flag_found = no
+then :
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -ffat-lto-objects"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -ffat-lto-objects" >&5
+printf %s "checking if $CC accepts -ffat-lto-objects... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_FFAT_LTO_OBJECTS 1" >>confdefs.h
+
+   _pa_flag_found=yes
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+fi
+
+
+   ccbase=`echo "$CC" | awk '{ print ; }'`
+   for ac_prog in ${ccbase}-ar
+do
+  # Extract the first word of "$ac_prog", so it can be a program name with args.
+set dummy $ac_prog; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_prog_CC_AR+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test -n "$CC_AR"; then
+  ac_cv_prog_CC_AR="$CC_AR" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    ac_cv_prog_CC_AR="$ac_prog"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+CC_AR=$ac_cv_prog_CC_AR
+if test -n "$CC_AR"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $CC_AR" >&5
+printf "%s\n" "$CC_AR" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+
+  test -n "$CC_AR" && break
+done
+test -n "$CC_AR" || CC_AR="$ac_cv_prog_AR"
+
+   AR="$CC_AR"
+   for ac_prog in ${ccbase}-ranlib
+do
+  # Extract the first word of "$ac_prog", so it can be a program name with args.
+set dummy $ac_prog; ac_word=$2
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+printf %s "checking for $ac_word... " >&6; }
+if test ${ac_cv_prog_CC_RANLIB+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  if test -n "$CC_RANLIB"; then
+  ac_cv_prog_CC_RANLIB="$CC_RANLIB" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then
+    ac_cv_prog_CC_RANLIB="$ac_prog"
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+CC_RANLIB=$ac_cv_prog_CC_RANLIB
+if test -n "$CC_RANLIB"; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $CC_RANLIB" >&5
+printf "%s\n" "$CC_RANLIB" >&6; }
+else
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+fi
+
+
+  test -n "$CC_RANLIB" && break
+done
+test -n "$CC_RANLIB" || CC_RANLIB="$ac_cv_prog_RANLIB"
+
+   RANLIB="$CC_RANLIB"
+fi
+
+
+
+
+ # Check whether --enable-sanitizer was given.
+if test ${enable_sanitizer+y}
+then :
+  enableval=$enable_sanitizer; pa_arg_bool_enableval="$enableval"
+else $as_nop
+  pa_arg_bool_enableval="no"
+fi
+
+
+ if test x"$pa_arg_bool_enableval" != xno
+then :
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -fno-omit-frame-pointer"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -fno-omit-frame-pointer" >&5
+printf %s "checking if $CC accepts -fno-omit-frame-pointer... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_FNO_OMIT_FRAME_POINTER 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -fsanitize=address"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -fsanitize=address" >&5
+printf %s "checking if $CC accepts -fsanitize=address... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_FSANITIZE_ADDRESS 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -fsanitize=undefined"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -fsanitize=undefined" >&5
+printf %s "checking if $CC accepts -fsanitize=undefined... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_FSANITIZE_UNDEFINED 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+fi
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -fvisibility=hidden"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -fvisibility=hidden" >&5
+printf %s "checking if $CC accepts -fvisibility=hidden... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_FVISIBILITY_HIDDEN 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -Wall"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Wall" >&5
+printf %s "checking if $CC accepts -Wall... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_WALL 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+ # Check whether --enable-pedantic was given.
+if test ${enable_pedantic+y}
+then :
+  enableval=$enable_pedantic; pa_arg_bool_enableval="$enableval"
+else $as_nop
+  pa_arg_bool_enableval="yes"
+fi
+
+
+ if test x"$pa_arg_bool_enableval" != xno
+then :
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -W"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -W" >&5
+printf %s "checking if $CC accepts -W... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_W 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -pedantic"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -pedantic" >&5
+printf %s "checking if $CC accepts -pedantic... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_PEDANTIC 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+fi
+
+
+
+ # Check whether --enable-werror was given.
+if test ${enable_werror+y}
+then :
+  enableval=$enable_werror; pa_arg_bool_enableval="$enableval"
+else $as_nop
+  pa_arg_bool_enableval="no"
+fi
+
+
+ if test x"$pa_arg_bool_enableval" != xno
+then :
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -Werror"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Werror" >&5
+printf %s "checking if $CC accepts -Werror... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_WERROR 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+else $as_nop
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -Werror=implicit"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Werror=implicit" >&5
+printf %s "checking if $CC accepts -Werror=implicit... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_WERROR_IMPLICIT 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -Werror=missing-braces"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Werror=missing-braces" >&5
+printf %s "checking if $CC accepts -Werror=missing-braces... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_WERROR_MISSING_BRACES 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -Werror=return-type"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Werror=return-type" >&5
+printf %s "checking if $CC accepts -Werror=return-type... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_WERROR_RETURN_TYPE 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -Werror=trigraphs"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Werror=trigraphs" >&5
+printf %s "checking if $CC accepts -Werror=trigraphs... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_WERROR_TRIGRAPHS 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -Werror=pointer-arith"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Werror=pointer-arith" >&5
+printf %s "checking if $CC accepts -Werror=pointer-arith... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_WERROR_POINTER_ARITH 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -Werror=strict-prototypes"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Werror=strict-prototypes" >&5
+printf %s "checking if $CC accepts -Werror=strict-prototypes... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_WERROR_STRICT_PROTOTYPES 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -Werror=missing-prototypes"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Werror=missing-prototypes" >&5
+printf %s "checking if $CC accepts -Werror=missing-prototypes... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_WERROR_MISSING_PROTOTYPES 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -Werror=missing-declarations"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Werror=missing-declarations" >&5
+printf %s "checking if $CC accepts -Werror=missing-declarations... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_WERROR_MISSING_DECLARATIONS 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -Werror=comment"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Werror=comment" >&5
+printf %s "checking if $CC accepts -Werror=comment... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_WERROR_COMMENT 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -Werror=vla"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Werror=vla" >&5
+printf %s "checking if $CC accepts -Werror=vla... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_WERROR_VLA 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+fi
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -Wvariadic-macros"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Wvariadic-macros" >&5
+printf %s "checking if $CC accepts -Wvariadic-macros... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig -Wno-variadic-macros"
+
+printf "%s\n" "#define CFLAGS_WNO_VARIADIC_MACROS 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -Wpedantic-ms-format"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Wpedantic-ms-format" >&5
+printf %s "checking if $CC accepts -Wpedantic-ms-format... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig -Wno-pedantic-ms-format"
+
+printf "%s\n" "#define CFLAGS_WNO_PEDANTIC_MS_FORMAT 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -Wlong-long"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Wlong-long" >&5
+printf %s "checking if $CC accepts -Wlong-long... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig -Wno-long-long"
+
+printf "%s\n" "#define CFLAGS_WNO_LONG_LONG 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -Wstringop-truncation"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Wstringop-truncation" >&5
+printf %s "checking if $CC accepts -Wstringop-truncation... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig -Wno-stringop-truncation"
+
+printf "%s\n" "#define CFLAGS_WNO_STRINGOP_TRUNCATION 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -Wshift-negative-value"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Wshift-negative-value" >&5
+printf %s "checking if $CC accepts -Wshift-negative-value... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig -Wno-shift-negative-value"
+
+printf "%s\n" "#define CFLAGS_WNO_SHIFT_NEGATIVE_VALUE 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+ # Check whether --enable-suggestions was given.
+if test ${enable_suggestions+y}
+then :
+  enableval=$enable_suggestions; pa_arg_bool_enableval="$enableval"
+else $as_nop
+  pa_arg_bool_enableval="no"
+fi
+
+
+ if test x"$pa_arg_bool_enableval" != xno
+then :
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -Wsuggest-attribute=pure"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Wsuggest-attribute=pure" >&5
+printf %s "checking if $CC accepts -Wsuggest-attribute=pure... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_WSUGGEST_ATTRIBUTE_PURE 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -Wsuggest-attribute=const"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Wsuggest-attribute=const" >&5
+printf %s "checking if $CC accepts -Wsuggest-attribute=const... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_WSUGGEST_ATTRIBUTE_CONST 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -Wsuggest-attribute=noreturn"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Wsuggest-attribute=noreturn" >&5
+printf %s "checking if $CC accepts -Wsuggest-attribute=noreturn... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_WSUGGEST_ATTRIBUTE_NORETURN 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -Wsuggest-attribute=format"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Wsuggest-attribute=format" >&5
+printf %s "checking if $CC accepts -Wsuggest-attribute=format... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_WSUGGEST_ATTRIBUTE_FORMAT 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -Wsuggest-attribute=cold"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Wsuggest-attribute=cold" >&5
+printf %s "checking if $CC accepts -Wsuggest-attribute=cold... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_WSUGGEST_ATTRIBUTE_COLD 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -Wsuggest-attribute=malloc"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -Wsuggest-attribute=malloc" >&5
+printf %s "checking if $CC accepts -Wsuggest-attribute=malloc... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_WSUGGEST_ATTRIBUTE_MALLOC 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+fi
+
+
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports C99 external inlines" >&5
+printf %s "checking if $CC supports C99 external inlines... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+
+/* Don't mistake GNU inlines for c99 */
+#if defined(__GNUC__) && !defined(__GNUC_STDC_INLINE__)
+# error "Using gnu inline standard"
+#endif
+
+inline int foo(int x)
+{
+	return x+1;
+}
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+printf "%s\n" "#define HAVE_STDC_INLINE 1" >>confdefs.h
+
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+
+
+
+
+
+  _PA_ADD_FLAGS_CFLAGS_orig=$CFLAGS
+  CFLAGS="$CFLAGS -fgnu89-inline"
+  _PA_ADD_FLAGS_CFLAGS_ok=yes
+
+  ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC accepts -fgnu89-inline" >&5
+printf %s "checking if $CC accepts -fgnu89-inline... " >&6; }
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <stdio.h>
+int
+main (void)
+{
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+else $as_nop
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+       _PA_ADD_FLAGS_CFLAGS_ok=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+fi
+     ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ if test "x$_PA_ADD_FLAGS_CFLAGS_ok" = xyes
+then :
+
+
+printf "%s\n" "#define CFLAGS_FGNU89_INLINE 1" >>confdefs.h
+
+
+else $as_nop
+  CFLAGS="$_PA_ADD_FLAGS_CFLAGS_orig"
+
+fi
+
+
+
+
+
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if $CC supports typeof" >&5
+printf %s "checking if $CC supports typeof... " >&6; }
+if test ${pa_cv_typeof+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  pa_cv_typeof=no
+ for pa_typeof_try in typeof __typeof __typeof__ decltype __decltype __decltype__ _Decltype
+ do
+  if test $pa_cv_typeof = no
+then :
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+$ac_includes_default
+int testme(int x);
+int testme(int x)
+{
+    $pa_typeof_try(x) y = x*x;
+    return y;
+}
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"
+then :
+  pa_cv_typeof=$pa_typeof_try
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+fi
+ done
+
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $pa_cv_typeof" >&5
+printf "%s\n" "$pa_cv_typeof" >&6; }
+ if test $pa_cv_typeof = no
+then :
+
+else $as_nop
+
+printf "%s\n" "#define HAVE_TYPEOF 1" >>confdefs.h
+
+	if test $pa_cv_typeof = typeof
+then :
+
+else $as_nop
+
+printf "%s\n" "#define typeof $pa_cv_typeof" >>confdefs.h
+
+fi
+fi
+
+ac_config_files="$ac_config_files Makefile doc/Makefile"
+
+cat >confcache <<\_ACEOF
+# This file is a shell script that caches the results of configure
+# tests run on this system so they can be shared between configure
+# scripts and configure runs, see configure's option --config-cache.
+# It is not useful on other systems.  If it contains results you don't
+# want to keep, you may remove or edit it.
+#
+# config.status only pays attention to the cache file if you give it
+# the --recheck option to rerun configure.
+#
+# `ac_cv_env_foo' variables (set or unset) will be overridden when
+# loading this file, other *unset* `ac_cv_foo' will be assigned the
+# following values.
+
+_ACEOF
+
+# The following way of writing the cache mishandles newlines in values,
+# but we know of no workaround that is simple, portable, and efficient.
+# So, we kill variables containing newlines.
+# Ultrix sh set writes to stderr and can't be redirected directly,
+# and sets the high bit in the cache file unless we assign to the vars.
+(
+  for ac_var in `(set) 2>&1 | sed -n 's/^$a-zA-Z_a-zA-Z0-9_*$=.*/\1/p'`; do
+    eval ac_val=\$$ac_var
+    case $ac_val in #(
+    *${as_nl}*)
+      case $ac_var in #(
+      *_cv_*) { printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: cache variable $ac_var contains a newline" >&5
+printf "%s\n" "$as_me: WARNING: cache variable $ac_var contains a newline" >&2;} ;;
+      esac
+      case $ac_var in #(
+      _ | IFS | as_nl) ;; #(
+      BASH_ARGV | BASH_SOURCE) eval $ac_var= ;; #(
+      *) { eval $ac_var=; unset $ac_var;} ;;
+      esac ;;
+    esac
+  done
+
+  (set) 2>&1 |
+    case $as_nl`(ac_space=' '; set) 2>&1` in #(
+    *${as_nl}ac_space=\ *)
+      # `set' does not quote correctly, so add quotes: double-quote
+      # substitution turns \\\\ into \\, and sed turns \\ into \.
+      sed -n \
+	"s/'/'\\\\''/g;
+	  s/^\$_$as_cr_alnum*_cv__$as_cr_alnum*\$=\$.*\$/\\1='\\2'/p"
+      ;; #(
+    *)
+      # `set' quotes correctly as required by POSIX, so do not add quotes.
+      sed -n "/^_$as_cr_alnum*_cv__$as_cr_alnum*=/p"
+      ;;
+    esac |
+    sort
+) |
+  sed '
+     /^ac_cv_env_/b end
+     t clear
+     :clear
+     s/^$^=*$=$.*{}.*$$/test ${\1+y} || &/
+     t end
+     s/^$^=*$=$.*$$/\1=${\1=\2}/
+     :end' >>confcache
+if diff "$cache_file" confcache >/dev/null 2>&1; then :; else
+  if test -w "$cache_file"; then
+    if test "x$cache_file" != "x/dev/null"; then
+      { printf "%s\n" "$as_me:${as_lineno-$LINENO}: updating cache $cache_file" >&5
+printf "%s\n" "$as_me: updating cache $cache_file" >&6;}
+      if test ! -f "$cache_file" || test -h "$cache_file"; then
+	cat confcache >"$cache_file"
+      else
+        case $cache_file in #(
+        */* | ?:*)
+	  mv -f confcache "$cache_file"$$ &&
+	  mv -f "$cache_file"$$ "$cache_file" ;; #(
+        *)
+	  mv -f confcache "$cache_file" ;;
+	esac
+      fi
+    fi
+  else
+    { printf "%s\n" "$as_me:${as_lineno-$LINENO}: not updating unwritable cache $cache_file" >&5
+printf "%s\n" "$as_me: not updating unwritable cache $cache_file" >&6;}
+  fi
+fi
+rm -f confcache
+
+test "x$prefix" = xNONE && prefix=$ac_default_prefix
+# Let make expand exec_prefix.
+test "x$exec_prefix" = xNONE && exec_prefix='${prefix}'
+
+DEFS=-DHAVE_CONFIG_H
+
+ac_libobjs=
+ac_ltlibobjs=
+U=
+for ac_i in : $LIBOBJS; do test "x$ac_i" = x: && continue
+  # 1. Remove the extension, and $U if already installed.
+  ac_script='s/\$U\././;s/\.o$//;s/\.obj$//'
+  ac_i=`printf "%s\n" "$ac_i" | sed "$ac_script"`
+  # 2. Prepend LIBOBJDIR.  When used with automake>=1.10 LIBOBJDIR
+  #    will be set to the directory where LIBOBJS objects are built.
+  as_fn_append ac_libobjs " \${LIBOBJDIR}$ac_i\$U.$ac_objext"
+  as_fn_append ac_ltlibobjs " \${LIBOBJDIR}$ac_i"'$U.lo'
+done
+LIBOBJS=$ac_libobjs
+
+LTLIBOBJS=$ac_ltlibobjs
+
+
+
+
+: "${CONFIG_STATUS=./config.status}"
+ac_write_fail=0
+ac_clean_files_save=$ac_clean_files
+ac_clean_files="$ac_clean_files $CONFIG_STATUS"
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: creating $CONFIG_STATUS" >&5
+printf "%s\n" "$as_me: creating $CONFIG_STATUS" >&6;}
+as_write_fail=0
+cat >$CONFIG_STATUS <<_ASEOF || as_write_fail=1
+#! $SHELL
+# Generated by $as_me.
+# Run this file to recreate the current configuration.
+# Compiler output produced by configure, useful for debugging
+# configure, is in config.log if it exists.
+
+debug=false
+ac_cs_recheck=false
+ac_cs_silent=false
+
+SHELL=\${CONFIG_SHELL-$SHELL}
+export SHELL
+_ASEOF
+cat >>$CONFIG_STATUS <<\_ASEOF || as_write_fail=1
+## -------------------- ##
+## M4sh Initialization. ##
+## -------------------- ##
+
+# Be more Bourne compatible
+DUALCASE=1; export DUALCASE # for MKS sh
+as_nop=:
+if test ${ZSH_VERSION+y} && (emulate sh) >/dev/null 2>&1
+then :
+  emulate sh
+  NULLCMD=:
+  # Pre-4.2 versions of Zsh do word splitting on ${1+"$@"}, which
+  # is contrary to our usage.  Disable this feature.
+  alias -g '${1+"$@"}'='"$@"'
+  setopt NO_GLOB_SUBST
+else $as_nop
+  case `(set -o) 2>/dev/null` in #(
+  *posix*) :
+    set -o posix ;; #(
+  *) :
+     ;;
+esac
+fi
+
+
+
+# Reset variables that may have inherited troublesome values from
+# the environment.
+
+# IFS needs to be set, to space, tab, and newline, in precisely that order.
+# (If _AS_PATH_WALK were called with IFS unset, it would have the
+# side effect of setting IFS to empty, thus disabling word splitting.)
+# Quoting is to prevent editors from complaining about space-tab.
+as_nl='
+'
+export as_nl
+IFS=" ""	$as_nl"
+
+PS1='$ '
+PS2='> '
+PS4='+ '
+
+# Ensure predictable behavior from utilities with locale-dependent output.
+LC_ALL=C
+export LC_ALL
+LANGUAGE=C
+export LANGUAGE
+
+# We cannot yet rely on "unset" to work, but we need these variables
+# to be unset--not just set to an empty or harmless value--now, to
+# avoid bugs in old shells (e.g. pre-3.0 UWIN ksh).  This construct
+# also avoids known problems related to "unset" and subshell syntax
+# in other old shells (e.g. bash 2.01 and pdksh 5.2.14).
+for as_var in BASH_ENV ENV MAIL MAILPATH CDPATH
+do eval test \${$as_var+y} \
+  && ( (unset $as_var) || exit 1) >/dev/null 2>&1 && unset $as_var || :
+done
+
+# Ensure that fds 0, 1, and 2 are open.
+if (exec 3>&0) 2>/dev/null; then :; else exec 0</dev/null; fi
+if (exec 3>&1) 2>/dev/null; then :; else exec 1>/dev/null; fi
+if (exec 3>&2)            ; then :; else exec 2>/dev/null; fi
+
+# The user is always right.
+if ${PATH_SEPARATOR+false} :; then
+  PATH_SEPARATOR=:
+  (PATH='/bin;/bin'; FPATH=$PATH; sh -c :) >/dev/null 2>&1 && {
+    (PATH='/bin:/bin'; FPATH=$PATH; sh -c :) >/dev/null 2>&1 ||
+      PATH_SEPARATOR=';'
+  }
+fi
+
+
+# Find who we are.  Look in the path if we contain no directory separator.
+as_myself=
+case $0 in #((
+  *\\/* ) as_myself=$0 ;;
+  *) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  case $as_dir in #(((
+    '') as_dir=./ ;;
+    */) ;;
+    *) as_dir=$as_dir/ ;;
+  esac
+    test -r "$as_dir$0" && as_myself=$as_dir$0 && break
+  done
+IFS=$as_save_IFS
+
+     ;;
+esac
+# We did not find ourselves, most probably we were run as `sh COMMAND'
+# in which case we are not to be found in the path.
+if test "x$as_myself" = x; then
+  as_myself=$0
+fi
+if test ! -f "$as_myself"; then
+  printf "%s\n" "$as_myself: error: cannot find myself; rerun with an absolute file name" >&2
+  exit 1
+fi
+
+
+
+# as_fn_error STATUS ERROR LINENO LOG_FD
+# ----------------------------------------
+# Output "`basename $0`: error: ERROR" to stderr. If LINENO and LOG_FD are
+# provided, also output the error to LOG_FD, referencing LINENO. Then exit the
+# script with STATUS, using 1 if that was 0.
+as_fn_error ()
+{
+  as_status=$1; test $as_status -eq 0 && as_status=1
+  if test "$4"; then
+    as_lineno=${as_lineno-"$3"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
+    printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: $2" >&$4
+  fi
+  printf "%s\n" "$as_me: error: $2" >&2
+  as_fn_exit $as_status
+} # as_fn_error
+
+
+
+# as_fn_set_status STATUS
+# -----------------------
+# Set $? to STATUS, without forking.
+as_fn_set_status ()
+{
+  return $1
+} # as_fn_set_status
+
+# as_fn_exit STATUS
+# -----------------
+# Exit the shell with STATUS, even in a "trap 0" or "set -e" context.
+as_fn_exit ()
+{
+  set +e
+  as_fn_set_status $1
+  exit $1
+} # as_fn_exit
+
+# as_fn_unset VAR
+# ---------------
+# Portably unset VAR.
+as_fn_unset ()
+{
+  { eval $1=; unset $1;}
+}
+as_unset=as_fn_unset
+
+# as_fn_append VAR VALUE
+# ----------------------
+# Append the text in VALUE to the end of the definition contained in VAR. Take
+# advantage of any shell optimizations that allow amortized linear growth over
+# repeated appends, instead of the typical quadratic growth present in naive
+# implementations.
+if (eval "as_var=1; as_var+=2; test x\$as_var = x12") 2>/dev/null
+then :
+  eval 'as_fn_append ()
+  {
+    eval $1+=\$2
+  }'
+else $as_nop
+  as_fn_append ()
+  {
+    eval $1=\$$1\$2
+  }
+fi # as_fn_append
+
+# as_fn_arith ARG...
+# ------------------
+# Perform arithmetic evaluation on the ARGs, and store the result in the
+# global $as_val. Take advantage of shells that can avoid forks. The arguments
+# must be portable across $(()) and expr.
+if (eval "test \$(( 1 + 1 )) = 2") 2>/dev/null
+then :
+  eval 'as_fn_arith ()
+  {
+    as_val=$(( $* ))
+  }'
+else $as_nop
+  as_fn_arith ()
+  {
+    as_val=`expr "$@" || test $? -eq 1`
+  }
+fi # as_fn_arith
+
+
+if expr a : '$a$' >/dev/null 2>&1 &&
+   test "X`expr 00001 : '.*$...$'`" = X001; then
+  as_expr=expr
+else
+  as_expr=false
+fi
+
+if (basename -- /) >/dev/null 2>&1 && test "X`basename -- / 2>&1`" = "X/"; then
+  as_basename=basename
+else
+  as_basename=false
+fi
+
+if (as_dir=`dirname -- /` && test "X$as_dir" = X/) >/dev/null 2>&1; then
+  as_dirname=dirname
+else
+  as_dirname=false
+fi
+
+as_me=`$as_basename -- "$0" ||
+$as_expr X/"$0" : '.*/$^/^/*$/*$' \| \
+	 X"$0" : 'X$//$$' \| \
+	 X"$0" : 'X$/$' \| . 2>/dev/null ||
+printf "%s\n" X/"$0" |
+    sed '/^.*\/$^/^/*$\/*$/{
+	    s//\1/
+	    q
+	  }
+	  /^X\/$\/\/$$/{
+	    s//\1/
+	    q
+	  }
+	  /^X\/$\/$.*/{
+	    s//\1/
+	    q
+	  }
+	  s/.*/./; q'`
+
+# Avoid depending upon Character Ranges.
+as_cr_letters='abcdefghijklmnopqrstuvwxyz'
+as_cr_LETTERS='ABCDEFGHIJKLMNOPQRSTUVWXYZ'
+as_cr_Letters=$as_cr_letters$as_cr_LETTERS
+as_cr_digits='0123456789'
+as_cr_alnum=$as_cr_Letters$as_cr_digits
+
+
+# Determine whether it's possible to make 'echo' print without a newline.
+# These variables are no longer used directly by Autoconf, but are AC_SUBSTed
+# for compatibility with existing Makefiles.
+ECHO_C= ECHO_N= ECHO_T=
+case `echo -n x` in #(((((
+-n*)
+  case `echo 'xy\c'` in
+  *c*) ECHO_T='	';;	# ECHO_T is single tab character.
+  xy)  ECHO_C='\c';;
+  *)   echo `echo ksh88 bug on AIX 6.1` > /dev/null
+       ECHO_T='	';;
+  esac;;
+*)
+  ECHO_N='-n';;
+esac
+
+# For backward compatibility with old third-party macros, we provide
+# the shell variables $as_echo and $as_echo_n.  New code should use
+# AS_ECHO("message") and AS_ECHO_N("message"), respectively.
+as_echo='printf %s\n'
+as_echo_n='printf %s'
+
+rm -f conf$$ conf$$.exe conf$$.file
+if test -d conf$$.dir; then
+  rm -f conf$$.dir/conf$$.file
+else
+  rm -f conf$$.dir
+  mkdir conf$$.dir 2>/dev/null
+fi
+if (echo >conf$$.file) 2>/dev/null; then
+  if ln -s conf$$.file conf$$ 2>/dev/null; then
+    as_ln_s='ln -s'
+    # ... but there are two gotchas:
+    # 1) On MSYS, both `ln -s file dir' and `ln file dir' fail.
+    # 2) DJGPP < 2.04 has no symlinks; `ln -s' creates a wrapper executable.
+    # In both cases, we have to default to `cp -pR'.
+    ln -s conf$$.file conf$$.dir 2>/dev/null && test ! -f conf$$.exe ||
+      as_ln_s='cp -pR'
+  elif ln conf$$.file conf$$ 2>/dev/null; then
+    as_ln_s=ln
+  else
+    as_ln_s='cp -pR'
+  fi
+else
+  as_ln_s='cp -pR'
+fi
+rm -f conf$$ conf$$.exe conf$$.dir/conf$$.file conf$$.file
+rmdir conf$$.dir 2>/dev/null
+
+
+# as_fn_mkdir_p
+# -------------
+# Create "$as_dir" as a directory, including parents if necessary.
+as_fn_mkdir_p ()
+{
+
+  case $as_dir in #(
+  -*) as_dir=./$as_dir;;
+  esac
+  test -d "$as_dir" || eval $as_mkdir_p || {
+    as_dirs=
+    while :; do
+      case $as_dir in #(
+      *\'*) as_qdir=`printf "%s\n" "$as_dir" | sed "s/'/'\\\\\\\\''/g"`;; #'(
+      *) as_qdir=$as_dir;;
+      esac
+      as_dirs="'$as_qdir' $as_dirs"
+      as_dir=`$as_dirname -- "$as_dir" ||
+$as_expr X"$as_dir" : 'X$.*^/$//*^/^/*/*$' \| \
+	 X"$as_dir" : 'X$//$^/' \| \
+	 X"$as_dir" : 'X$//$$' \| \
+	 X"$as_dir" : 'X$/$' \| . 2>/dev/null ||
+printf "%s\n" X"$as_dir" |
+    sed '/^X$.*^/$\/\/*^/^/*\/*$/{
+	    s//\1/
+	    q
+	  }
+	  /^X$\/\/$^/.*/{
+	    s//\1/
+	    q
+	  }
+	  /^X$\/\/$$/{
+	    s//\1/
+	    q
+	  }
+	  /^X$\/$.*/{
+	    s//\1/
+	    q
+	  }
+	  s/.*/./; q'`
+      test -d "$as_dir" && break
+    done
+    test -z "$as_dirs" || eval "mkdir $as_dirs"
+  } || test -d "$as_dir" || as_fn_error $? "cannot create directory $as_dir"
+
+
+} # as_fn_mkdir_p
+if mkdir -p . 2>/dev/null; then
+  as_mkdir_p='mkdir -p "$as_dir"'
+else
+  test -d ./-p && rmdir ./-p
+  as_mkdir_p=false
+fi
+
+
+# as_fn_executable_p FILE
+# -----------------------
+# Test if FILE is an executable regular file.
+as_fn_executable_p ()
+{
+  test -f "$1" && test -x "$1"
+} # as_fn_executable_p
+as_test_x='test -x'
+as_executable_p=as_fn_executable_p
+
+# Sed expression to map a string onto a valid CPP name.
+as_tr_cpp="eval sed 'y%*$as_cr_letters%P$as_cr_LETTERS%;s%^_$as_cr_alnum%_%g'"
+
+# Sed expression to map a string onto a valid variable name.
+as_tr_sh="eval sed 'y%*+%pp%;s%^_$as_cr_alnum%_%g'"
+
+
+exec 6>&1
+## ----------------------------------- ##
+## Main body of $CONFIG_STATUS script. ##
+## ----------------------------------- ##
+_ASEOF
+test $as_write_fail = 0 && chmod +x $CONFIG_STATUS || ac_write_fail=1
+
+cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
+# Save the log message, to keep $0 and so on meaningful, and to
+# report actual input values of CONFIG_FILES etc. instead of their
+# values after options handling.
+ac_log="
+This file was extended by $as_me, which was
+generated by GNU Autoconf 2.71.  Invocation command line was
+
+  CONFIG_FILES    = $CONFIG_FILES
+  CONFIG_HEADERS  = $CONFIG_HEADERS
+  CONFIG_LINKS    = $CONFIG_LINKS
+  CONFIG_COMMANDS = $CONFIG_COMMANDS
+  $ $0 $@
+
+on `(hostname || uname -n) 2>/dev/null | sed 1q`
+"
+
+_ACEOF
+
+case $ac_config_files in *"
+"*) set x $ac_config_files; shift; ac_config_files=$*;;
+esac
+
+case $ac_config_headers in *"
+"*) set x $ac_config_headers; shift; ac_config_headers=$*;;
+esac
+
+
+cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
+# Files that config.status was made for.
+config_files="$ac_config_files"
+config_headers="$ac_config_headers"
+
+_ACEOF
+
+cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
+ac_cs_usage="\
+\`$as_me' instantiates files and other configuration actions
+from templates according to the current configuration.  Unless the files
+and actions are specified as TAGs, all are instantiated by default.
+
+Usage: $0 OPTION... TAG...
+
+  -h, --help       print this help, then exit
+  -V, --version    print version number and configuration settings, then exit
+      --config     print configuration, then exit
+  -q, --quiet, --silent
+                   do not print progress messages
+  -d, --debug      don't remove temporary files
+      --recheck    update $as_me by reconfiguring in the same conditions
+      --file=FILE:TEMPLATE
+                   instantiate the configuration file FILE
+      --header=FILE:TEMPLATE
+                   instantiate the configuration header FILE
+
+Configuration files:
+$config_files
+
+Configuration headers:
+$config_headers
+
+Report bugs to the package provider."
+
+_ACEOF
+ac_cs_config=`printf "%s\n" "$ac_configure_args" | sed "$ac_safe_unquote"`
+ac_cs_config_escaped=`printf "%s\n" "$ac_cs_config" | sed "s/^ //; s/'/'\\\\\\\\''/g"`
+cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
+ac_cs_config='$ac_cs_config_escaped'
+ac_cs_version="\\
+config.status
+configured by $0, generated by GNU Autoconf 2.71,
+  with options \\"\$ac_cs_config\\"
+
+Copyright (C) 2021 Free Software Foundation, Inc.
+This config.status script is free software; the Free Software Foundation
+gives unlimited permission to copy, distribute and modify it."
+
+ac_pwd='$ac_pwd'
+srcdir='$srcdir'
+INSTALL='$INSTALL'
+MKDIR_P='$MKDIR_P'
+test -n "\$AWK" || AWK=awk
+_ACEOF
+
+cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
+# The default lists apply if the user does not specify any file.
+ac_need_defaults=:
+while test $# != 0
+do
+  case $1 in
+  --*=?*)
+    ac_option=`expr "X$1" : 'X$^=*$='`
+    ac_optarg=`expr "X$1" : 'X^=*=$.*$'`
+    ac_shift=:
+    ;;
+  --*=)
+    ac_option=`expr "X$1" : 'X$^=*$='`
+    ac_optarg=
+    ac_shift=:
+    ;;
+  *)
+    ac_option=$1
+    ac_optarg=$2
+    ac_shift=shift
+    ;;
+  esac
+
+  case $ac_option in
+  # Handling of the options.
+  -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r)
+    ac_cs_recheck=: ;;
+  --version | --versio | --versi | --vers | --ver | --ve | --v | -V )
+    printf "%s\n" "$ac_cs_version"; exit ;;
+  --config | --confi | --conf | --con | --co | --c )
+    printf "%s\n" "$ac_cs_config"; exit ;;
+  --debug | --debu | --deb | --de | --d | -d )
+    debug=: ;;
+  --file | --fil | --fi | --f )
+    $ac_shift
+    case $ac_optarg in
+    *\'*) ac_optarg=`printf "%s\n" "$ac_optarg" | sed "s/'/'\\\\\\\\''/g"` ;;
+    '') as_fn_error $? "missing file argument" ;;
+    esac
+    as_fn_append CONFIG_FILES " '$ac_optarg'"
+    ac_need_defaults=false;;
+  --header | --heade | --head | --hea )
+    $ac_shift
+    case $ac_optarg in
+    *\'*) ac_optarg=`printf "%s\n" "$ac_optarg" | sed "s/'/'\\\\\\\\''/g"` ;;
+    esac
+    as_fn_append CONFIG_HEADERS " '$ac_optarg'"
+    ac_need_defaults=false;;
+  --he | --h)
+    # Conflict between --help and --header
+    as_fn_error $? "ambiguous option: \`$1'
+Try \`$0 --help' for more information.";;
+  --help | --hel | -h )
+    printf "%s\n" "$ac_cs_usage"; exit ;;
+  -q | -quiet | --quiet | --quie | --qui | --qu | --q \
+  | -silent | --silent | --silen | --sile | --sil | --si | --s)
+    ac_cs_silent=: ;;
+
+  # This is an error.
+  -*) as_fn_error $? "unrecognized option: \`$1'
+Try \`$0 --help' for more information." ;;
+
+  *) as_fn_append ac_config_targets " $1"
+     ac_need_defaults=false ;;
+
+  esac
+  shift
+done
+
+ac_configure_extra_args=
+
+if $ac_cs_silent; then
+  exec 6>/dev/null
+  ac_configure_extra_args="$ac_configure_extra_args --silent"
+fi
+
+_ACEOF
+cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
+if \$ac_cs_recheck; then
+  set X $SHELL '$0' $ac_configure_args \$ac_configure_extra_args --no-create --no-recursion
+  shift
+  \printf "%s\n" "running CONFIG_SHELL=$SHELL \$*" >&6
+  CONFIG_SHELL='$SHELL'
+  export CONFIG_SHELL
+  exec "\$@"
+fi
+
+_ACEOF
+cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
+exec 5>>config.log
+{
+  echo
+  sed 'h;s/./-/g;s/^.../## /;s/...$/ ##/;p;x;p;x' <<_ASBOX
+## Running $as_me. ##
+_ASBOX
+  printf "%s\n" "$ac_log"
+} >&5
+
+_ACEOF
+cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
+_ACEOF
+
+cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
+
+# Handling of arguments.
+for ac_config_target in $ac_config_targets
+do
+  case $ac_config_target in
+    "config/config.h") CONFIG_HEADERS="$CONFIG_HEADERS config/config.h" ;;
+    "Makefile") CONFIG_FILES="$CONFIG_FILES Makefile" ;;
+    "doc/Makefile") CONFIG_FILES="$CONFIG_FILES doc/Makefile" ;;
+
+  *) as_fn_error $? "invalid argument: \`$ac_config_target'" "$LINENO" 5;;
+  esac
+done
+
+
+# If the user did not use the arguments to specify the items to instantiate,
+# then the envvar interface is used.  Set only those that are not.
+# We use the long form for the default assignment because of an extremely
+# bizarre bug on SunOS 4.1.3.
+if $ac_need_defaults; then
+  test ${CONFIG_FILES+y} || CONFIG_FILES=$config_files
+  test ${CONFIG_HEADERS+y} || CONFIG_HEADERS=$config_headers
+fi
+
+# Have a temporary directory for convenience.  Make it in the build tree
+# simply because there is no reason against having it here, and in addition,
+# creating and moving files from /tmp can sometimes cause problems.
+# Hook for its removal unless debugging.
+# Note that there is a small window in which the directory will not be cleaned:
+# after its creation but before its name has been assigned to `$tmp'.
+$debug ||
+{
+  tmp= ac_tmp=
+  trap 'exit_status=$?
+  : "${ac_tmp:=$tmp}"
+  { test ! -d "$ac_tmp" || rm -fr "$ac_tmp"; } && exit $exit_status
+' 0
+  trap 'as_fn_exit 1' 1 2 13 15
+}
+# Create a (secure) tmp directory for tmp files.
+
+{
+  tmp=`(umask 077 && mktemp -d "./confXXXXXX") 2>/dev/null` &&
+  test -d "$tmp"
+}  ||
+{
+  tmp=./conf$$-$RANDOM
+  (umask 077 && mkdir "$tmp")
+} || as_fn_error $? "cannot create a temporary directory in ." "$LINENO" 5
+ac_tmp=$tmp
+
+# Set up the scripts for CONFIG_FILES section.
+# No need to generate them if there are no CONFIG_FILES.
+# This happens for instance with `./config.status config.h'.
+if test -n "$CONFIG_FILES"; then
+
+
+ac_cr=`echo X | tr X '\015'`
+# On cygwin, bash can eat \r inside `` if the user requested igncr.
+# But we know of no other shell where ac_cr would be empty at this
+# point, so we can use a bashism as a fallback.
+if test "x$ac_cr" = x; then
+  eval ac_cr=\$\'\\r\'
+fi
+ac_cs_awk_cr=`$AWK 'BEGIN { print "a\rb" }' </dev/null 2>/dev/null`
+if test "$ac_cs_awk_cr" = "a${ac_cr}b"; then
+  ac_cs_awk_cr='\\r'
+else
+  ac_cs_awk_cr=$ac_cr
+fi
+
+echo 'BEGIN {' >"$ac_tmp/subs1.awk" &&
+_ACEOF
+
+
+{
+  echo "cat >conf$$subs.awk <<_ACEOF" &&
+  echo "$ac_subst_vars" | sed 's/.*/&!$&$ac_delim/' &&
+  echo "_ACEOF"
+} >conf$$subs.sh ||
+  as_fn_error $? "could not make $CONFIG_STATUS" "$LINENO" 5
+ac_delim_num=`echo "$ac_subst_vars" | grep -c '^'`
+ac_delim='%!_!# '
+for ac_last_try in false false false false false :; do
+  . ./conf$$subs.sh ||
+    as_fn_error $? "could not make $CONFIG_STATUS" "$LINENO" 5
+
+  ac_delim_n=`sed -n "s/.*$ac_delim\$/X/p" conf$$subs.awk | grep -c X`
+  if test $ac_delim_n = $ac_delim_num; then
+    break
+  elif $ac_last_try; then
+    as_fn_error $? "could not make $CONFIG_STATUS" "$LINENO" 5
+  else
+    ac_delim="$ac_delim!$ac_delim _$ac_delim!! "
+  fi
+done
+rm -f conf$$subs.sh
+
+cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
+cat >>"\$ac_tmp/subs1.awk" <<\\_ACAWK &&
+_ACEOF
+sed -n '
+h
+s/^/S"/; s/!.*/"=/
+p
+g
+s/^^!*!//
+:repl
+t repl
+s/'"$ac_delim"'$//
+t delim
+:nl
+h
+s/$.\{148\}$..*/\1/
+t more1
+s/"\\/\\&/g; s/^/"/; s/$/\\n"\\/
+p
+n
+b repl
+:more1
+s/"\\/\\&/g; s/^/"/; s/$/"\\/
+p
+g
+s/.\{148\}//
+t nl
+:delim
+h
+s/$.\{148\}$..*/\1/
+t more2
+s/"\\/\\&/g; s/^/"/; s/$/"/
+p
+b
+:more2
+s/"\\/\\&/g; s/^/"/; s/$/"\\/
+p
+g
+s/.\{148\}//
+t delim
+' <conf$$subs.awk | sed '
+/^^""/{
+  N
+  s/\n//
+}
+' >>$CONFIG_STATUS || ac_write_fail=1
+rm -f conf$$subs.awk
+cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
+_ACAWK
+cat >>"\$ac_tmp/subs1.awk" <<_ACAWK &&
+  for (key in S) S_is_setkey = 1
+  FS = "&#x7;"
+
+}
+{
+  line = $ 0
+  nfields = split(line, field, "@")
+  substed = 0
+  len = length(field1)
+  for (i = 2; i < nfields; i++) {
+    key = fieldi
+    keylen = length(key)
+    if (S_is_setkey) {
+      value = Skey
+      line = substr(line, 1, len) "" value "" substr(line, len + keylen + 3)
+      len += length(value) + length(field++i)
+      substed = 1
+    } else
+      len += 1 + keylen
+  }
+
+  print line
+}
+
+_ACAWK
+_ACEOF
+cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
+if sed "s/$ac_cr//" < /dev/null > /dev/null 2>&1; then
+  sed "s/$ac_cr\$//; s/$ac_cr/$ac_cs_awk_cr/g"
+else
+  cat
+fi < "$ac_tmp/subs1.awk" > "$ac_tmp/subs.awk" \
+  || as_fn_error $? "could not setup config files machinery" "$LINENO" 5
+_ACEOF
+
+# VPATH may cause trouble with some makes, so we remove sole $(srcdir),
+# ${srcdir} and @srcdir@ entries from VPATH if srcdir is ".", strip leading and
+# trailing colons and then remove the whole line if VPATH becomes empty
+# (actually we leave an empty line to preserve line numbers).
+if test "x$srcdir" = x.; then
+  ac_vpsub='/^	 *VPATH	 *=	 */{
+h
+s///
+s/^/:/
+s/	 *$/:/
+s/:\$(srcdir):/:/g
+s/:\${srcdir}:/:/g
+s/:@srcdir@:/:/g
+s/^:*//
+s/:*$//
+x
+s/$=	 *$.*/\1/
+G
+s/\n//
+s/^^=*=	 *$//
+}'
+fi
+
+cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
+fi # test -n "$CONFIG_FILES"
+
+# Set up the scripts for CONFIG_HEADERS section.
+# No need to generate them if there are no CONFIG_HEADERS.
+# This happens for instance with `./config.status Makefile'.
+if test -n "$CONFIG_HEADERS"; then
+cat >"$ac_tmp/defines.awk" <<\_ACAWK ||
+BEGIN {
+_ACEOF
+
+# Transform confdefs.h into an awk script `defines.awk', embedded as
+# here-document in config.status, that substitutes the proper values into
+# config.h.in to produce config.h.
+
+# Create a delimiter string that does not exist in confdefs.h, to ease
+# handling of long lines.
+ac_delim='%!_!# '
+for ac_last_try in false false :; do
+  ac_tt=`sed -n "/$ac_delim/p" confdefs.h`
+  if test -z "$ac_tt"; then
+    break
+  elif $ac_last_try; then
+    as_fn_error $? "could not make $CONFIG_HEADERS" "$LINENO" 5
+  else
+    ac_delim="$ac_delim!$ac_delim _$ac_delim!! "
+  fi
+done
+
+# For the awk script, D is an array of macro values keyed by name,
+# likewise P contains macro parameters if any.  Preserve backslash
+# newline sequences.
+
+ac_word_re=_$as_cr_Letters_$as_cr_alnum*
+sed -n '
+s/.\{148\}/&'"$ac_delim"'/g
+t rset
+:rset
+s/^	 *#	 *define	 	 */ /
+t def
+d
+:def
+s/\\$//
+t bsnl
+s/"\\/\\&/g
+s/^ $'"$ac_word_re"'$$(^()*)$	 *$.*$/P"\1"="\2"\
+D"\1"=" \3"/p
+s/^ $'"$ac_word_re"'$	 *$.*$/D"\1"=" \2"/p
+d
+:bsnl
+s/"\\/\\&/g
+s/^ $'"$ac_word_re"'$$(^()*)$	 *$.*$/P"\1"="\2"\
+D"\1"=" \3\\\\\\n"\\/p
+t cont
+s/^ $'"$ac_word_re"'$	 *$.*$/D"\1"=" \2\\\\\\n"\\/p
+t cont
+d
+:cont
+n
+s/.\{148\}/&'"$ac_delim"'/g
+t clear
+:clear
+s/\\$//
+t bsnlc
+s/"\\/\\&/g; s/^/"/; s/$/"/p
+d
+:bsnlc
+s/"\\/\\&/g; s/^/"/; s/$/\\\\\\n"\\/p
+b cont
+' <confdefs.h | sed '
+s/'"$ac_delim"'/"\\\
+"/g' >>$CONFIG_STATUS || ac_write_fail=1
+
+cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
+  for (key in D) D_is_setkey = 1
+  FS = "&#x7;"
+}
+/^\t *#\t *(define|undef)\t +$ac_word_re(\t (|\$)/ {
+  line = \$ 0
+  split(line, arg, " ")
+  if (arg1 == "#") {
+    defundef = arg2
+    mac1 = arg3
+  } else {
+    defundef = substr(arg1, 2)
+    mac1 = arg2
+  }
+  split(mac1, mac2, "(") #)
+  macro = mac21
+  prefix = substr(line, 1, index(line, defundef) - 1)
+  if (D_is_setmacro) {
+    # Preserve the white space surrounding the "#".
+    print prefix "define", macro Pmacro Dmacro
+    next
+  } else {
+    # Replace #undef with comments.  This is necessary, for example,
+    # in the case of _POSIX_SOURCE, which is predefined and required
+    # on some systems where configure will not decide to define it.
+    if (defundef == "undef") {
+      print "/*", prefix defundef, macro, "*/"
+      next
+    }
+  }
+}
+{ print }
+_ACAWK
+_ACEOF
+cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
+  as_fn_error $? "could not setup config headers machinery" "$LINENO" 5
+fi # test -n "$CONFIG_HEADERS"
+
+
+eval set X "  :F $CONFIG_FILES  :H $CONFIG_HEADERS    "
+shift
+for ac_tag
+do
+  case $ac_tag in
+  :FHLC) ac_mode=$ac_tag; continue;;
+  esac
+  case $ac_mode$ac_tag in
+  :FHL*:*);;
+  :L* | :C*:*) as_fn_error $? "invalid tag \`$ac_tag'" "$LINENO" 5;;
+  :FH-) ac_tag=-:-;;
+  :FH*) ac_tag=$ac_tag:$ac_tag.in;;
+  esac
+  ac_save_IFS=$IFS
+  IFS=:
+  set x $ac_tag
+  IFS=$ac_save_IFS
+  shift
+  ac_file=$1
+  shift
+
+  case $ac_mode in
+  :L) ac_source=$1;;
+  :FH)
+    ac_file_inputs=
+    for ac_f
+    do
+      case $ac_f in
+      -) ac_f="$ac_tmp/stdin";;
+      *) # Look for the file first in the build tree, then in the source tree
+	 # (if the path is not absolute).  The absolute path cannot be DOS-style,
+	 # because $ac_f cannot contain `:'.
+	 test -f "$ac_f" ||
+	   case $ac_f in
+	   \\/$*) false;;
+	   *) test -f "$srcdir/$ac_f" && ac_f="$srcdir/$ac_f";;
+	   esac ||
+	   as_fn_error 1 "cannot find input file: \`$ac_f'" "$LINENO" 5;;
+      esac
+      case $ac_f in *\'*) ac_f=`printf "%s\n" "$ac_f" | sed "s/'/'\\\\\\\\''/g"`;; esac
+      as_fn_append ac_file_inputs " '$ac_f'"
+    done
+
+    # Let's still pretend it is `configure' which instantiates (i.e., don't
+    # use $as_me), people would be surprised to read:
+    #    /* config.h.  Generated by config.status.  */
+    configure_input='Generated from '`
+	  printf "%s\n" "$*" | sed 's|^^:*/||;s|:^:*/|, |g'
+	`' by configure.'
+    if test x"$ac_file" != x-; then
+      configure_input="$ac_file.  $configure_input"
+      { printf "%s\n" "$as_me:${as_lineno-$LINENO}: creating $ac_file" >&5
+printf "%s\n" "$as_me: creating $ac_file" >&6;}
+    fi
+    # Neutralize special characters interpreted by sed in replacement strings.
+    case $configure_input in #(
+    *\&* | *\|* | *\\* )
+       ac_sed_conf_input=`printf "%s\n" "$configure_input" |
+       sed 's/\\\\&|/\\\\&/g'`;; #(
+    *) ac_sed_conf_input=$configure_input;;
+    esac
+
+    case $ac_tag in
+    *:-:* | *:-) cat >"$ac_tmp/stdin" \
+      || as_fn_error $? "could not create $ac_file" "$LINENO" 5 ;;
+    esac
+    ;;
+  esac
+
+  ac_dir=`$as_dirname -- "$ac_file" ||
+$as_expr X"$ac_file" : 'X$.*^/$//*^/^/*/*$' \| \
+	 X"$ac_file" : 'X$//$^/' \| \
+	 X"$ac_file" : 'X$//$$' \| \
+	 X"$ac_file" : 'X$/$' \| . 2>/dev/null ||
+printf "%s\n" X"$ac_file" |
+    sed '/^X$.*^/$\/\/*^/^/*\/*$/{
+	    s//\1/
+	    q
+	  }
+	  /^X$\/\/$^/.*/{
+	    s//\1/
+	    q
+	  }
+	  /^X$\/\/$$/{
+	    s//\1/
+	    q
+	  }
+	  /^X$\/$.*/{
+	    s//\1/
+	    q
+	  }
+	  s/.*/./; q'`
+  as_dir="$ac_dir"; as_fn_mkdir_p
+  ac_builddir=.
+
+case "$ac_dir" in
+.) ac_dir_suffix= ac_top_builddir_sub=. ac_top_build_prefix= ;;
+*)
+  ac_dir_suffix=/`printf "%s\n" "$ac_dir" | sed 's|^\.\\/||'`
+  # A ".." for each directory in $ac_dir_suffix.
+  ac_top_builddir_sub=`printf "%s\n" "$ac_dir_suffix" | sed 's|/^\\/*|/..|g;s|/||'`
+  case $ac_top_builddir_sub in
+  "") ac_top_builddir_sub=. ac_top_build_prefix= ;;
+  *)  ac_top_build_prefix=$ac_top_builddir_sub/ ;;
+  esac ;;
+esac
+ac_abs_top_builddir=$ac_pwd
+ac_abs_builddir=$ac_pwd$ac_dir_suffix
+# for backward compatibility:
+ac_top_builddir=$ac_top_build_prefix
+
+case $srcdir in
+  .)  # We are building in place.
+    ac_srcdir=.
+    ac_top_srcdir=$ac_top_builddir_sub
+    ac_abs_top_srcdir=$ac_pwd ;;
+  \\/* | ?:\\/* )  # Absolute name.
+    ac_srcdir=$srcdir$ac_dir_suffix;
+    ac_top_srcdir=$srcdir
+    ac_abs_top_srcdir=$srcdir ;;
+  *) # Relative name.
+    ac_srcdir=$ac_top_build_prefix$srcdir$ac_dir_suffix
+    ac_top_srcdir=$ac_top_build_prefix$srcdir
+    ac_abs_top_srcdir=$ac_pwd/$srcdir ;;
+esac
+ac_abs_srcdir=$ac_abs_top_srcdir$ac_dir_suffix
+
+
+  case $ac_mode in
+  :F)
+  #
+  # CONFIG_FILE
+  #
+
+  case $INSTALL in
+  \\/$* | ?:\\/* ) ac_INSTALL=$INSTALL ;;
+  *) ac_INSTALL=$ac_top_build_prefix$INSTALL ;;
+  esac
+  ac_MKDIR_P=$MKDIR_P
+  case $MKDIR_P in
+  \\/$* | ?:\\/* ) ;;
+  */*) ac_MKDIR_P=$ac_top_build_prefix$MKDIR_P ;;
+  esac
+_ACEOF
+
+cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
+# If the template does not know about datarootdir, expand it.
+# FIXME: This hack should be removed a few years after 2.60.
+ac_datarootdir_hack=; ac_datarootdir_seen=
+ac_sed_dataroot='
+/datarootdir/ {
+  p
+  q
+}
+/@datadir@/p
+/@docdir@/p
+/@infodir@/p
+/@localedir@/p
+/@mandir@/p'
+case `eval "sed -n \"\$ac_sed_dataroot\" $ac_file_inputs"` in
+*datarootdir*) ac_datarootdir_seen=yes;;
+*@datadir@*|*@docdir@*|*@infodir@*|*@localedir@*|*@mandir@*)
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: $ac_file_inputs seems to ignore the --datarootdir setting" >&5
+printf "%s\n" "$as_me: WARNING: $ac_file_inputs seems to ignore the --datarootdir setting" >&2;}
+_ACEOF
+cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
+  ac_datarootdir_hack='
+  s&@datadir@&$datadir&g
+  s&@docdir@&$docdir&g
+  s&@infodir@&$infodir&g
+  s&@localedir@&$localedir&g
+  s&@mandir@&$mandir&g
+  s&\\\${datarootdir}&$datarootdir&g' ;;
+esac
+_ACEOF
+
+# Neutralize VPATH when `$srcdir' = `.'.
+# Shell code in configure.ac might set extrasub.
+# FIXME: do we really want to maintain this feature?
+cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
+ac_sed_extra="$ac_vpsub
+$extrasub
+_ACEOF
+cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
+:t
+/@a-zA-Z_a-zA-Z_0-9*@/!b
+s|@configure_input@|$ac_sed_conf_input|;t t
+s&@top_builddir@&$ac_top_builddir_sub&;t t
+s&@top_build_prefix@&$ac_top_build_prefix&;t t
+s&@srcdir@&$ac_srcdir&;t t
+s&@abs_srcdir@&$ac_abs_srcdir&;t t
+s&@top_srcdir@&$ac_top_srcdir&;t t
+s&@abs_top_srcdir@&$ac_abs_top_srcdir&;t t
+s&@builddir@&$ac_builddir&;t t
+s&@abs_builddir@&$ac_abs_builddir&;t t
+s&@abs_top_builddir@&$ac_abs_top_builddir&;t t
+s&@INSTALL@&$ac_INSTALL&;t t
+s&@MKDIR_P@&$ac_MKDIR_P&;t t
+$ac_datarootdir_hack
+"
+eval sed \"\$ac_sed_extra\" "$ac_file_inputs" | $AWK -f "$ac_tmp/subs.awk" \
+  >$ac_tmp/out || as_fn_error $? "could not create $ac_file" "$LINENO" 5
+
+test -z "$ac_datarootdir_hack$ac_datarootdir_seen" &&
+  { ac_out=`sed -n '/\${datarootdir}/p' "$ac_tmp/out"`; test -n "$ac_out"; } &&
+  { ac_out=`sed -n '/^	 *datarootdir	 *:*=/p' \
+      "$ac_tmp/out"`; test -z "$ac_out"; } &&
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: $ac_file contains a reference to the variable \`datarootdir'
+which seems to be undefined.  Please make sure it is defined" >&5
+printf "%s\n" "$as_me: WARNING: $ac_file contains a reference to the variable \`datarootdir'
+which seems to be undefined.  Please make sure it is defined" >&2;}
+
+  rm -f "$ac_tmp/stdin"
+  case $ac_file in
+  -) cat "$ac_tmp/out" && rm -f "$ac_tmp/out";;
+  *) rm -f "$ac_file" && mv "$ac_tmp/out" "$ac_file";;
+  esac \
+  || as_fn_error $? "could not create $ac_file" "$LINENO" 5
+ ;;
+  :H)
+  #
+  # CONFIG_HEADER
+  #
+  if test x"$ac_file" != x-; then
+    {
+      printf "%s\n" "/* $configure_input  */" >&1 \
+      && eval '$AWK -f "$ac_tmp/defines.awk"' "$ac_file_inputs"
+    } >"$ac_tmp/config.h" \
+      || as_fn_error $? "could not create $ac_file" "$LINENO" 5
+    if diff "$ac_file" "$ac_tmp/config.h" >/dev/null 2>&1; then
+      { printf "%s\n" "$as_me:${as_lineno-$LINENO}: $ac_file is unchanged" >&5
+printf "%s\n" "$as_me: $ac_file is unchanged" >&6;}
+    else
+      rm -f "$ac_file"
+      mv "$ac_tmp/config.h" "$ac_file" \
+	|| as_fn_error $? "could not create $ac_file" "$LINENO" 5
+    fi
+  else
+    printf "%s\n" "/* $configure_input  */" >&1 \
+      && eval '$AWK -f "$ac_tmp/defines.awk"' "$ac_file_inputs" \
+      || as_fn_error $? "could not create -" "$LINENO" 5
+  fi
+ ;;
+
+
+  esac
+
+done # for ac_tag
+
+
+as_fn_exit 0
+_ACEOF
+ac_clean_files=$ac_clean_files_save
+
+test $ac_write_fail = 0 ||
+  as_fn_error $? "write failure creating $CONFIG_STATUS" "$LINENO" 5
+
+
+# configure is writing to config.log, and then calls config.status.
+# config.status does its own redirection, appending to config.log.
+# Unfortunately, on DOS this fails, as config.log is still kept open
+# by configure, so config.status won't be able to write to it; its
+# output is simply discarded.  So we exec the FD to /dev/null,
+# effectively closing config.log, so it can be properly (re)opened and
+# appended to by config.status.  When coming back to configure, we
+# need to make the FD available again.
+if test "$no_create" != yes; then
+  ac_cs_success=:
+  ac_config_status_args=
+  test "$silent" = yes &&
+    ac_config_status_args="$ac_config_status_args --quiet"
+  exec 5>/dev/null
+  $SHELL $CONFIG_STATUS $ac_config_status_args || ac_cs_success=false
+  exec 5>>config.log
+  # Use ||, not &&, to avoid exiting from the if with $? = 1, which
+  # would make configure fail if this is the last instruction.
+  $ac_cs_success || as_fn_exit 1
+fi
+if test -n "$ac_unrecognized_opts" && test "$enable_option_checking" != no; then
+  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: unrecognized options: $ac_unrecognized_opts" >&5
+printf "%s\n" "$as_me: WARNING: unrecognized options: $ac_unrecognized_opts" >&2;}
+fi
+
+

_service:tar_scm:nasm-2.16.03.tar.xz/configure.ac Added

@@ -0,0 +1,349 @@
+dnl Process this file with autoconf 2.71 or later to produce
+dnl a configure script.
+AC_PREREQ(2.71)
+AC_INIT
+AC_CONFIG_SRCDIR(config/config.h.in)
+AC_CONFIG_HEADERS(config/config.h)
+AC_PREFIX_PROGRAM(nasm)
+AC_CONFIG_AUX_DIR(autoconf/helpers)
+
+dnl Mark where in config.h.in macros auto-generated by the configuration
+dnl start; this is used to generate config/unconfig.h.
+AH_BOTTOM(
+/* Begin unconfig.h */)
+
+dnl This prevents us from running Wine and thinking we are not
+dnl cross-compiling when in fact we are; running Wine here is at
+dnl the best very slow and doesn't buy us a single thing at all.
+PA_CROSS_COMPILE
+
+dnl Enable any available C extensions
+PA_PROG_CC
+AC_USE_SYSTEM_EXTENSIONS
+PA_ADD_CPPFLAGS(-std=c17, , ,
+PA_ADD_CPPFLAGS(-std=c11, , ,
+ PA_ADD_CPPFLAGS(-std=c99)))
+
+dnl Options for debugging and profiling
+PA_OPTION_DEBUG
+PA_OPTION_PROFILING
+
+dnl Large files
+AC_SYS_LARGEFILE
+
+dnl Abort on panic
+PA_ARG_ENABLED(panic-abort,
+ call abort() on panic to trap in the debugger,
+ AC_DEFINE(ABORT_ON_PANIC))
+AH_TEMPLATE(ABORT_ON_PANIC,
+Define to 1 to call abort() on panics (internal errors), for debugging.)
+
+dnl Checks for typedefs, structures, and compiler characteristics.
+AC_TYPE_SIZE_T
+
+dnl LLVM doesn't error out on invalid -W options unless this option is
+dnl specified first.  Enable this so this script can actually discover
+dnl which -W options are possible for this compiler.
+PA_ADD_CFLAGS(-Werror=unknown-warning-option)
+
+dnl Force gcc and gcc-compatible compilers treat signed integers
+dnl as 2's complement
+PA_ADD_CFLAGS(-fwrapv)
+
+dnl Force clang to behave in a predictable manner, in order to make bugs
+dnl possible to track down. gcc appears to have this behavior by default.
+PA_ADD_CFLAGS(-ftrivial-auto-var-init=zero)
+
+dnl Some environments abuse __STRICT_ANSI__ to disable some
+dnl function declarations
+PA_ADD_CFLAGS(-U__STRICT_ANSI__)
+
+dnl Don't put things in common if we can avoid it.  We don't want to
+dnl assume all compilers support common, and this will help find those
+dnl problems.  This also works around an OSX linker problem.
+PA_ADD_CFLAGS(-fno-common)
+
+dnl Check for library extension
+PA_LIBEXT
+
+dnl Look for programs...
+AC_PROG_LN_S
+AC_PROG_MAKE_SET
+AC_PROG_INSTALL
+AC_PROG_MKDIR_P
+
+AC_CHECK_PROGS(NROFF,    nroff,    false)
+AC_CHECK_PROGS(ASCIIDOC, asciidoc, false)
+AC_CHECK_PROGS(XMLTO,    xmlto,    false)
+AC_CHECK_PROGS(XZ,       xz,       false)
+
+dnl Check for progs needed for manpage generation
+MANPAGES=manpages
+AS_IF(test x$ASCIIDOC = xfalse,
+  AC_MSG_WARN(No asciidoc package found, cannot build man pages)
+   MANPAGES=''
+)
+AS_IF(test x"$XMLTO" = xfalse,
+  AC_MSG_WARN(No xmlto package found, cannot build man pages)
+   MANPAGES=''
+)
+AC_SUBST(MANPAGES)
+
+dnl Don't create .pdf.xz if there is no xz
+AS_IF(test x"$XZ" = xfalse,
+  ,
+  XZFILES=xzfiles)
+AC_SUBST(XZFILES)
+
+dnl Can't create NSIS package if there is no makensis
+dnl ... but it only applies to a Windows target ...
+dnl Note: AC_CHECK_TOOLS is supposed to check for the "plain"
+dnl version of the program name, but it doesn't seem to.
+AC_ARG_WITH(nsis,
+AS_HELP_STRING(--with-nsis=makensis,
+ build an install .exe using NSIS on Windows hosts),
+ , with_nsis=yes)
+AS_IF(test x"$MAKENSIS" = x, ,
+      AS_IF(test x"$with_nsis" = xno, 
+             with_nsis="$MAKENSIS"))
+
+MAKENSIS=false
+
+AS_CASE($host,
+	*-win* | *-mingw*,
+	AS_IF(test x"$with_nsis" = xno, ,
+	 NSIS=nsis
+	  AS_IF(test x"$with_nsis" = xyes,
+	  AC_CHECK_TOOL(MAKENSIS_TOOL, makensis, false)
+	   MAKENSIS="$MAKENSIS_TOOL"
+	   AS_IF(test x"$MAKENSIS" = xfalse,
+	       AC_CHECK_PROGS(MAKENSIS_PLAIN, makensis, false)
+	         MAKENSIS="$MAKENSIS_PLAIN")
+	   AS_IF(test x"$MAKENSIS" = xfalse,
+	         AC_MSG_WARN(no makensis found, cannot build installer)
+	          NSIS=''),
+	  MAKENSIS="$with_nsis")))
+AC_SUBST(MAKENSIS)
+AC_SUBST(NSIS)
+
+dnl Check for host compiler tools
+AC_CHECK_TOOL(AR, ar)
+AC_CHECK_TOOL(RANLIB, ranlib, :)
+AC_CHECK_TOOL(STRIP, strip)
+
+dnl
+dnl NOTE: the tests for header files and library functions use constructs
+dnl that create warnings on modern compilers, due to lack of prototypes,
+dnl etc. Therefore, do not add the -Werror options before this.
+dnl
+
+dnl Tests which may trigger warnings on some compilers
+AC_C_CONST
+AC_C_INLINE
+AC_C_RESTRICT
+
+dnl Checks for header files.
+AC_CHECK_INCLUDES_DEFAULT
+
+dnl Check for variadic macro support
+PA_VARIADIC_MACROS
+
+dnl Handle Windows embedded manifests
+AS_CASE($host,
+	*-win* | *-mingw*,
+	AC_CHECK_TOOL(WINDRES, windres, false)
+	 AS_IF(test x"$WINDRES" != xfalse,
+	 AC_SUBST(MANIFEST, 'win/manifest.$(O)')))
+
+PA_ADD_HEADERS(string.h)
+PA_ADD_HEADERS(stdarg.h)
+PA_ADD_HEADERS(inttypes.h)
+AC_CHECK_HEADERS(strings.h)
+AC_HEADER_STDBOOL
+AC_CHECK_HEADERS(stdnoreturn.h)
+AC_CHECK_HEADERS(io.h)
+AC_CHECK_HEADERS(fcntl.h)
+AC_CHECK_HEADERS(unistd.h)
+AC_CHECK_HEADERS(sys/mman.h)
+AC_CHECK_HEADERS(sys/types.h)
+AC_CHECK_HEADERS(sys/stat.h)
+AC_CHECK_HEADERS(sys/resource.h)
+
+dnl Checks for library functions.
+AC_CHECK_FUNCS(strcasecmp stricmp)
+AC_CHECK_FUNCS(strncasecmp strnicmp)
+AC_CHECK_FUNCS(strsep)
+AC_CHECK_FUNCS(strnlen)
+AC_CHECK_FUNCS(strrchrnul)
+AC_CHECK_FUNCS(iscntrl)
+AC_CHECK_FUNCS(isascii)
+AC_CHECK_FUNCS(mempcpy)
+AC_CHECK_FUNCS(mempset)
+
+AC_CHECK_FUNCS(getuid)
+AC_CHECK_FUNCS(getgid)
+AC_CHECK_FUNCS(getrlimit)
+
+AC_CHECK_FUNCS(realpath)
+AC_CHECK_FUNCS(canonicalize_file_name)
+AC_CHECK_FUNCS(_fullpath)
+AC_CHECK_FUNCS(pathconf)
+
+AC_FUNC_FSEEKO
+AC_CHECK_FUNCS(_fseeki64)
+AC_CHECK_FUNCS(ftruncate _chsize _chsize_s)
+AC_CHECK_FUNCS(fileno _fileno)
+
+AC_FUNC_MMAP
+AC_CHECK_FUNCS(getpagesize)
+AC_CHECK_FUNCS(sysconf)
+
+AC_CHECK_FUNCS(access _access faccessat)
+
+PA_HAVE_FUNC(__builtin_expect, (1,1))
+
+dnl ilog2() building blocks
+PA_ADD_HEADERS(intrin.h)
+PA_HAVE_FUNC(__builtin_clz, (0U))
+PA_HAVE_FUNC(__builtin_clzl, (0UL))
+PA_HAVE_FUNC(__builtin_clzll, (0ULL))
+PA_HAVE_FUNC(_BitScanReverse, (0))
+PA_HAVE_FUNC(_BitScanReverse64, (0))
+
+PA_FUNC_SNPRINTF
+PA_FUNC_VSNPRINTF
+AC_CHECK_FUNCS(strlcpy)
+AC_CHECK_FUNCS(strrchrnul)
+
+dnl These types are POSIX-specific, and Windows does it differently...
+AC_CHECK_TYPES(struct _stati64)
+AC_CHECK_TYPES(struct stat)
+AC_CHECK_FUNCS(stat _stati64)
+AC_CHECK_FUNCS(fstat _fstati64)
+AC_CHECK_FUNCS(S_ISREG)
+
+dnl Check for functions that might not be declared in the headers for
+dnl various idiotic reasons (mostly because of library authors
+dnl abusing the meaning of __STRICT_ANSI__)
+AC_CHECK_DECLS(strcasecmp)
+AC_CHECK_DECLS(stricmp)
+AC_CHECK_DECLS(strncasecmp)
+AC_CHECK_DECLS(strnicmp)
+AC_CHECK_DECLS(strsep)
+AC_CHECK_DECLS(strlcpy)
+AC_CHECK_DECLS(strnlen)
+AC_CHECK_DECLS(strrchrnul)
+
+dnl Check for missing types
+AC_TYPE_UINTPTR_T
+
+dnl Documentation: should we generate an uncompressed PDF?  It is
+dnl about twice as big, but it can be externally compressed (e.g. with xz)
+dnl and becomes significantly smaller than the original.
+PA_ARG_DISABLED(pdf-compression,
+  generate an uncompressed documentation PDF,
+  PDFOPT='-nocompress')
+AC_SUBST(PDFOPT)
+
+dnl
+dnl Look for byte-swapping support...
+dnl
+PA_ENDIAN
+
+dnl
+dnl Some rather useful gcc extensions...
+dnl
+PA_HAVE_FUNC(__builtin_constant_p, (0))
+PA_HAVE_FUNC(__builtin_choose_expr, (0,1,2))
+
+dnl
+dnl Check for supported gcc attributes; some compilers (e.g. Sun CC)
+dnl support these, but don't define __GNUC__ as they don't support
+dnl some other features of gcc.
+dnl
+PA_COMMON_ATTRIBUTES
+
+dnl
+dnl support function sections (if available)
+dnl
+PA_OPTION_GC
+
+dnl
+dnl support LTO
+dnl
+PA_OPTION_LTO
+
+dnl
+dnl support sanitizers (if available)
+dnl
+PA_OPTION_SANITIZER
+
+dnl
+dnl Don't make symbols visible, there is no point and it just
+dnl makes the code slower. This mainly affects ELF.
+dnl
+PA_ADD_CFLAGS(-fvisibility=hidden)
+
+dnl
+dnl If we have gcc, add appropriate code cleanliness options.  Do this
+dnl here at the end, because configure relies on being able to use
+dnl some very, very old C constructs.
+dnl
+PA_ADD_CFLAGS(-Wall)
+PA_ARG_DISABLED(pedantic,
+disable some extra paranoid compiler warnings,
+,
+PA_ADD_CFLAGS(-W)
+PA_ADD_CFLAGS(-pedantic)
+)
+dnl Want to turn this on at some point...
+dnl PA_ADD_CFLAGS(-Wwrite-strings)
+PA_ARG_ENABLED(werror,
+ compile with -Werror to error out on any warning,
+ PA_ADD_CFLAGS(-Werror),
+ PA_ADD_CFLAGS(-Werror=implicit)
+  PA_ADD_CFLAGS(-Werror=missing-braces)
+  PA_ADD_CFLAGS(-Werror=return-type)
+  PA_ADD_CFLAGS(-Werror=trigraphs)
+  PA_ADD_CFLAGS(-Werror=pointer-arith)
+  PA_ADD_CFLAGS(-Werror=strict-prototypes)
+  PA_ADD_CFLAGS(-Werror=missing-prototypes)
+  PA_ADD_CFLAGS(-Werror=missing-declarations)
+  PA_ADD_CFLAGS(-Werror=comment)
+  PA_ADD_CFLAGS(-Werror=vla)
+)
+
+dnl Variadic macros are used in this code, but only under explicit guard
+PA_ADD_CFLAGS(-Wvariadic-macros,-Wno-variadic-macros)
+dnl Suppress format warning on Windows targets due to their <inttypes.h>
+PA_ADD_CFLAGS(-Wpedantic-ms-format,-Wno-pedantic-ms-format)
+PA_ADD_CFLAGS(-Wlong-long,-Wno-long-long)
+dnl This is needed because we intentionally expect strncpy() to fill
+dnl in a zero-padded (not zero-terminated) buffer in several backends
+PA_ADD_CFLAGS(-Wstringop-truncation,-Wno-stringop-truncation)
+dnl This is needed because we assume 2's-completement signed arithmetic;
+dnl on compilers with gcc-like command line syntax we pass the -fwrapv
+dnl option for exactly that reason.
+PA_ADD_CFLAGS(-Wshift-negative-value,-Wno-shift-negative-value)
+
+dnl Warnings that are probabilistic based on the compiler version, and
+dnl only should be used specifically when looking for opportunities to
+dnl address or optimize these cases.
+PA_ARG_ENABLED(suggestions,
+ compile with compiler suggestion warnings enabled,
+ PA_ADD_CFLAGS(-Wsuggest-attribute=pure)
+  PA_ADD_CFLAGS(-Wsuggest-attribute=const)
+  PA_ADD_CFLAGS(-Wsuggest-attribute=noreturn)
+  PA_ADD_CFLAGS(-Wsuggest-attribute=format)
+  PA_ADD_CFLAGS(-Wsuggest-attribute=cold)
+  PA_ADD_CFLAGS(-Wsuggest-attribute=malloc))
+
+dnl
+dnl Test compiler features. On some compilers, this can be affected
+dnl by -Werror options, so run this *after* those options are added.
+dnl
+PA_CHECK_BAD_STDC_INLINE
+PA_C_TYPEOF
+
+AC_CONFIG_FILES(Makefile doc/Makefile)
+AC_OUTPUT

_service:tar_scm:nasm-2.16.03.tar.xz/contrib Added

_service:tar_scm:nasm-2.16.03.tar.xz/contrib/MSVC6.txt Added

_service:tar_scm:nasm-2.16.03.tar.xz/contrib/VSrules Added

_service:tar_scm:nasm-2.16.03.tar.xz/contrib/VSrules/nasm.README Added

_service:tar_scm:nasm-2.16.03.tar.xz/contrib/VSrules/nasm.rules Added

@@ -0,0 +1,79 @@
+<?xml version="1.0" encoding="utf-8"?>
+<VisualStudioToolFile
+	Name="Netwide Macro Assembler"
+	Version="8.00"
+	>
+	<Rules>
+		<CustomBuildRule
+			Name="NASM"
+			DisplayName="Netwide Macro Assembler"
+			CommandLine="nasm.exe -f win32 -Xvc AllOptions AdditionalOptions Inputs"
+			Outputs="$ObjectFileName"
+			FileExtensions="*.asm"
+			ExecutionDescription="Assembling..."
+			>
+			<Properties>
+				<StringProperty
+					Name="ObjectFileName"
+					DisplayName="Object File Name"
+					PropertyPageName="Object File"
+					Description="Specifies the name of the output object file.     (-o file)"
+					HelpURL="http://www.nasm.us/doc/"
+					Switch="-o &quot;value&quot;"
+					DefaultValue="$(IntDir)\$(InputName).obj"
+				/>
+				<StringProperty
+					Name="PreprocessorDefinitions"
+					DisplayName="Preprocessor Definitions"
+					Description="Defines a text macro with the given name.     (-Dsymbol)"
+					HelpURL="http://www.nasm.us/doc/"
+					Switch="-Dvalue"
+					Delimited="false"
+					Inheritable="true"
+				/>
+				<StringProperty
+					Name="UndefinePreprocessorDefinitions"
+					DisplayName="Undefine Preprocessor Definitions"
+					Description="Undefines a text macro with the given name.     (-Usymbol)"
+					HelpURL="http://www.nasm.us/doc/"
+					Switch="-Uvalue"
+					Delimited="false"
+					Inheritable="true"
+				/>
+				<StringProperty
+					Name="AssembledCodeListingFile"
+					DisplayName="Assembled Code Listing File"
+					PropertyPageName="Listing File"
+					Description="Generates an assembled code listing file.     (-l file)"
+					HelpURL="http://www.nasm.us/doc/"
+					Switch="-l &quot;value&quot;"
+				/>
+				<StringProperty
+					Name="IncludePaths"
+					DisplayName="Include Paths"
+					Description="Sets path for include file.     (-Ipath)"
+					HelpURL="http://www.nasm.us/doc/"
+					Switch="-Ivalue"
+					Delimited="false"
+					Inheritable="true"
+				/>
+				<BooleanProperty
+					Name="TreatWarningsAsErrors"
+					DisplayName="Treat Warnings As Errors"
+					Description="Returns an error code if warnings are generated.     (-Werror)"
+					HelpURL="http://www.nasm.us/doc/"
+					Switch="-Werror"
+				/>
+				<BooleanProperty
+					Name="GenerateDebugInformation"
+					DisplayName="Generate Debug Information"
+					Description="Generates Debug Information.     (-g)"
+					HelpURL="http://www.nasm.us/doc/"
+					Switch="-g"
+					DefaultValue="true"
+				/>
+				
+			</Properties>
+		</CustomBuildRule>
+	</Rules>
+</VisualStudioToolFile>

_service:tar_scm:nasm-2.16.03.tar.xz/disasm Added

_service:tar_scm:nasm-2.16.03.tar.xz/disasm/disasm.c Added

@@ -0,0 +1,1762 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2022 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * disasm.c   where all the _work_ gets done in the Netwide Disassembler
+ */
+
+#include "compiler.h"
+
+
+#include "nasm.h"
+#include "disasm.h"
+#include "sync.h"
+#include "insns.h"
+#include "tables.h"
+#include "regdis.h"
+#include "disp8.h"
+
+#define fetch_safe(_start, _ptr, _size, _need, _op)         \
+    do {                                                    \
+        if (((_ptr) - (_start)) >= ((_size) - (_need)))     \
+            _op;                                            \
+    } while (0)
+
+#define fetch_or_return(_start, _ptr, _size, _need)         \
+    fetch_safe(_start, _ptr, _size, _need, return 0)
+
+/*
+ * Flags that go into the `segment' field of `insn' structures
+ * during disassembly.
+ */
+#define SEG_RELATIVE    1
+#define SEG_32BIT       2
+#define SEG_RMREG       4
+#define SEG_DISP8       8
+#define SEG_DISP16     16
+#define SEG_DISP32     32
+#define SEG_NODISP     64
+#define SEG_SIGNED    128
+#define SEG_64BIT     256
+
+/*
+ * Prefix information
+ */
+struct prefix_info {
+    uint8_t osize;      /* Operand size */
+    uint8_t asize;      /* Address size */
+    uint8_t osp;        /* Operand size prefix present */
+    uint8_t asp;        /* Address size prefix present */
+    uint8_t rep;        /* Rep prefix present */
+    uint8_t seg;        /* Segment override prefix present */
+    uint8_t wait;       /* WAIT "prefix" present */
+    uint8_t lock;       /* Lock prefix present */
+    uint8_t vex3;     /* VEX prefix present */
+    uint8_t vex_c;      /* VEX "class" (VEX, XOP, ...) */
+    uint8_t vex_m;      /* VEX.M field */
+    uint8_t vex_v;
+    uint8_t vex_lp;     /* VEX.LP fields */
+    uint32_t rex;       /* REX prefix present */
+    uint8_t evex3;    /* EVEX prefix present */
+};
+
+#define getu8(x) (*(uint8_t *)(x))
+#if X86_MEMORY
+/* Littleendian CPU which can handle unaligned references */
+#define getu16(x) (*(uint16_t *)(x))
+#define getu32(x) (*(uint32_t *)(x))
+#define getu64(x) (*(uint64_t *)(x))
+#else
+static uint16_t getu16(uint8_t *data)
+{
+    return (uint16_t)data0 + ((uint16_t)data1 << 8);
+}
+static uint32_t getu32(uint8_t *data)
+{
+    return (uint32_t)getu16(data) + ((uint32_t)getu16(data+2) << 16);
+}
+static uint64_t getu64(uint8_t *data)
+{
+    return (uint64_t)getu32(data) + ((uint64_t)getu32(data+4) << 32);
+}
+#endif
+
+#define gets8(x) ((int8_t)getu8(x))
+#define gets16(x) ((int16_t)getu16(x))
+#define gets32(x) ((int32_t)getu32(x))
+#define gets64(x) ((int64_t)getu64(x))
+
+/* Important: regval must already have been adjusted for rex extensions */
+static enum reg_enum whichreg(opflags_t regflags, int regval, int rex)
+{
+    size_t i;
+
+    static const struct {
+        opflags_t       flags;
+        enum reg_enum   reg;
+    } specific_registers = {
+        {REG_AL,  R_AL},
+        {REG_AX,  R_AX},
+        {REG_EAX, R_EAX},
+        {REG_RAX, R_RAX},
+        {REG_DL,  R_DL},
+        {REG_DX,  R_DX},
+        {REG_EDX, R_EDX},
+        {REG_RDX, R_RDX},
+        {REG_CL,  R_CL},
+        {REG_CX,  R_CX},
+        {REG_ECX, R_ECX},
+        {REG_RCX, R_RCX},
+        {FPU0,    R_ST0},
+        {XMM0,    R_XMM0},
+        {YMM0,    R_YMM0},
+        {ZMM0,    R_ZMM0},
+        {REG_ES,  R_ES},
+        {REG_CS,  R_CS},
+        {REG_SS,  R_SS},
+        {REG_DS,  R_DS},
+        {REG_FS,  R_FS},
+        {REG_GS,  R_GS},
+        {OPMASK0, R_K0},
+    };
+
+    if (!(regflags & (REGISTER|REGMEM)))
+        return 0;        /* Registers not permissible?! */
+
+    regflags |= REGISTER;
+
+    for (i = 0; i < ARRAY_SIZE(specific_registers); i++)
+        if (!(specific_registersi.flags & ~regflags))
+            return specific_registersi.reg;
+
+    /* All the entries below look up regval in an 16-entry array */
+    if (regval < 0 || regval > (rex & REX_EV ? 31 : 15))
+        return 0;
+
+#define GET_REGISTER(__array, __index)                      \
+    ((size_t)(__index) < (size_t)ARRAY_SIZE(__array) ? __array(__index) : 0)
+
+    if (!(REG8 & ~regflags)) {
+        if (rex & (REX_P|REX_NH))
+            return GET_REGISTER(nasm_rd_reg8_rex, regval);
+        else
+            return GET_REGISTER(nasm_rd_reg8, regval);
+    }
+    if (!(REG16 & ~regflags))
+        return GET_REGISTER(nasm_rd_reg16, regval);
+    if (!(REG32 & ~regflags))
+        return GET_REGISTER(nasm_rd_reg32, regval);
+    if (!(REG64 & ~regflags))
+        return GET_REGISTER(nasm_rd_reg64, regval);
+    if (!(REG_SREG & ~regflags))
+        return GET_REGISTER(nasm_rd_sreg, regval & 7); /* Ignore REX */
+    if (!(REG_CREG & ~regflags))
+        return GET_REGISTER(nasm_rd_creg, regval);
+    if (!(REG_DREG & ~regflags))
+        return GET_REGISTER(nasm_rd_dreg, regval);
+    if (!(REG_TREG & ~regflags)) {
+        if (regval > 7)
+            return 0;        /* TR registers are ill-defined with rex */
+        return GET_REGISTER(nasm_rd_treg, regval);
+    }
+    if (!(FPUREG & ~regflags))
+        return GET_REGISTER(nasm_rd_fpureg, regval & 7); /* Ignore REX */
+    if (!(MMXREG & ~regflags))
+        return GET_REGISTER(nasm_rd_mmxreg, regval & 7); /* Ignore REX */
+    if (!(XMMREG & ~regflags))
+        return GET_REGISTER(nasm_rd_xmmreg, regval);
+    if (!(YMMREG & ~regflags))
+        return GET_REGISTER(nasm_rd_ymmreg, regval);
+    if (!(ZMMREG & ~regflags))
+        return GET_REGISTER(nasm_rd_zmmreg, regval);
+    if (!(OPMASKREG & ~regflags))
+        return GET_REGISTER(nasm_rd_opmaskreg, regval);
+    if (!(BNDREG & ~regflags))
+        return GET_REGISTER(nasm_rd_bndreg, regval);
+    if (!(TMMREG & ~regflags))
+        return GET_REGISTER(nasm_rd_tmmreg, regval);
+
+#undef GET_REGISTER
+    return 0;
+}
+
+static uint32_t append_evex_reg_deco(char *buf, uint32_t num,
+                                    decoflags_t deco, uint8_t *evex)
+{
+    const char * const er_names = {"rn-sae", "rd-sae", "ru-sae", "rz-sae"};
+    uint32_t num_chars = 0;
+
+    if ((deco & MASK) && (evex2 & EVEX_P2AAA)) {
+        enum reg_enum opmasknum = nasm_rd_opmaskregevex2 & EVEX_P2AAA;
+        const char * regname = nasm_reg_namesopmasknum - EXPR_REG_START;
+
+        num_chars += snprintf(buf + num_chars, num - num_chars,
+                              "{%s}", regname);
+
+        if ((deco & Z) && (evex2 & EVEX_P2Z)) {
+            num_chars += snprintf(buf + num_chars, num - num_chars,
+                                  "{z}");
+        }
+    }
+
+    if (evex2 & EVEX_P2B) {
+        if (deco & ER) {
+            uint8_t er_type = (evex2 & EVEX_P2LL) >> 5;
+            num_chars += snprintf(buf + num_chars, num - num_chars,
+                                  ",{%s}", er_nameser_type);
+        } else if (deco & SAE) {
+            num_chars += snprintf(buf + num_chars, num - num_chars,
+                                  ",{sae}");
+        }
+    }
+
+    return num_chars;
+}
+
+static uint32_t append_evex_mem_deco(char *buf, uint32_t num, opflags_t type,
+                                     decoflags_t deco, uint8_t *evex)
+{
+    uint32_t num_chars = 0;
+
+    if ((evex2 & EVEX_P2B) && (deco & BRDCAST_MASK)) {
+        decoflags_t deco_brsize = deco & BRSIZE_MASK;
+        opflags_t template_opsize = brsize_to_size(deco_brsize);
+        unsigned int br_num = (type & SIZE_MASK) / BITS128 *
+            BITS64 / template_opsize * 2;
+
+        num_chars += snprintf(buf + num_chars, num - num_chars,
+                              "{1to%d}", br_num);
+    }
+
+    if ((deco & MASK) && (evex2 & EVEX_P2AAA)) {
+        enum reg_enum opmasknum = nasm_rd_opmaskregevex2 & EVEX_P2AAA;
+        const char * regname = nasm_reg_namesopmasknum - EXPR_REG_START;
+
+        num_chars += snprintf(buf + num_chars, num - num_chars,
+                              "{%s}", regname);
+
+        if ((deco & Z) && (evex2 & EVEX_P2Z)) {
+            num_chars += snprintf(buf + num_chars, num - num_chars,
+                                  "{z}");
+        }
+    }
+
+
+    return num_chars;
+}
+
+/*
+ * Process an effective address (ModRM) specification.
+ */
+static uint8_t *do_ea(uint8_t *data, int modrm, int asize,
+                      int segsize, enum ea_type type,
+                      operand *op, insn *ins)
+{
+    int mod, rm, scale, index, base;
+    int rex;
+    uint8_t *evex;
+    uint8_t sib = 0;
+    bool is_evex = !!(ins->rex & REX_EV);
+
+    mod = (modrm >> 6) & 03;
+    rm = modrm & 07;
+
+    if (mod != 3 && asize != 16 && rm == 4)
+        sib = *data++;
+
+    rex  = ins->rex;
+    evex = ins->evex_p;
+
+    if (mod == 3) {             /* pure register version */
+        op->basereg = rm+(rex & REX_B ? 8 : 0);
+        op->segment |= SEG_RMREG;
+        if (is_evex && segsize == 64) {
+            op->basereg += (evex0 & EVEX_P0X ? 0 : 16);
+        }
+        return data;
+    }
+
+    op->disp_size = 0;
+    op->eaflags = 0;
+
+    if (asize == 16) {
+        /*
+         * <mod> specifies the displacement size (none, byte or
+         * word), and <rm> specifies the register combination.
+         * Exception: mod=0,rm=6 does not specify BP as one might
+         * expect, but instead specifies disp16.
+         */
+
+        if (type != EA_SCALAR)
+            return NULL;
+
+        op->indexreg = op->basereg = -1;
+        op->scale = 1;          /* always, in 16 bits */
+        switch (rm) {
+        case 0:
+            op->basereg = R_BX;
+            op->indexreg = R_SI;
+            break;
+        case 1:
+            op->basereg = R_BX;
+            op->indexreg = R_DI;
+            break;
+        case 2:
+            op->basereg = R_BP;
+            op->indexreg = R_SI;
+            break;
+        case 3:
+            op->basereg = R_BP;
+            op->indexreg = R_DI;
+            break;
+        case 4:
+            op->basereg = R_SI;
+            break;
+        case 5:
+            op->basereg = R_DI;
+            break;
+        case 6:
+            op->basereg = R_BP;
+            break;
+        case 7:
+            op->basereg = R_BX;
+            break;
+        }
+        if (rm == 6 && mod == 0) {      /* special case */
+            op->basereg = -1;
+            if (segsize != 16)
+                op->disp_size = 16;
+            mod = 2;            /* fake disp16 */
+        }
+        switch (mod) {
+        case 0:
+            op->segment |= SEG_NODISP;
+            break;
+        case 1:
+            op->segment |= SEG_DISP8;
+            if (ins->evex_tuple != 0) {
+                op->offset = gets8(data) * get_disp8N(ins);
+            } else {
+                op->offset = gets8(data);
+            }
+            data++;
+            break;
+        case 2:
+            op->segment |= SEG_DISP16;
+            op->offset = *data++;
+            op->offset |= ((unsigned)*data++) << 8;
+            break;
+        }
+        return data;
+    } else {
+        /*
+         * Once again, <mod> specifies displacement size (this time
+         * none, byte or *dword*), while <rm> specifies the base
+         * register. Again, EBP is missing, replaced by a pure
+         * disp32 (this time that's mod=0,rm=*5*) in 32-bit mode,
+         * and RIP-relative addressing in 64-bit mode.
+         *
+         * However, rm=4
+         * indicates not a single base register, but instead the
+         * presence of a SIB byte...
+         */
+        int a64 = asize == 64;
+
+        op->indexreg = -1;
+
+        if (a64)
+            op->basereg = nasm_rd_reg64rm | ((rex & REX_B) ? 8 : 0);
+        else
+            op->basereg = nasm_rd_reg32rm | ((rex & REX_B) ? 8 : 0);
+
+        if (rm == 5 && mod == 0) {
+            if (segsize == 64) {
+                op->eaflags |= EAF_REL;
+                op->segment |= SEG_RELATIVE;
+            }
+
+            if (asize != 64)
+                op->disp_size = asize;
+
+            op->basereg = -1;
+            mod = 2;            /* fake disp32 */
+        }
+
+
+        if (rm == 4) {          /* process SIB */
+            uint8_t vsib_hi = 0;
+            scale = (sib >> 6) & 03;
+            index = (sib >> 3) & 07;
+            base = sib & 07;
+
+            op->scale = 1 << scale;
+
+            if (segsize == 64) {
+                vsib_hi = (rex & REX_X ? 8 : 0) |
+                          (evex2 & EVEX_P2VP ? 0 : 16);
+            }
+
+            if (type == EA_XMMVSIB)
+                op->indexreg = nasm_rd_xmmregindex | vsib_hi;
+            else if (type == EA_YMMVSIB)
+                op->indexreg = nasm_rd_ymmregindex | vsib_hi;
+            else if (type == EA_ZMMVSIB)
+                op->indexreg = nasm_rd_zmmregindex | vsib_hi;
+            else if (index == 4 && !(rex & REX_X))
+                op->indexreg = -1; /* ESP/RSP cannot be an index */
+            else if (a64)
+                op->indexreg = nasm_rd_reg64index | ((rex & REX_X) ? 8 : 0);
+            else
+                op->indexreg = nasm_rd_reg32index | ((rex & REX_X) ? 8 : 0);
+
+            if (base == 5 && mod == 0) {
+                op->basereg = -1;
+                mod = 2;    /* Fake disp32 */
+            } else if (a64)
+                op->basereg = nasm_rd_reg64base | ((rex & REX_B) ? 8 : 0);
+            else
+                op->basereg = nasm_rd_reg32base | ((rex & REX_B) ? 8 : 0);
+
+            if (segsize == 16)
+                op->disp_size = 32;
+        } else if (type != EA_SCALAR) {
+            /* Can't have VSIB without SIB */
+            return NULL;
+        }
+
+        switch (mod) {
+        case 0:
+            op->segment |= SEG_NODISP;
+            break;
+        case 1:
+            op->segment |= SEG_DISP8;
+            if (ins->evex_tuple != 0) {
+                op->offset = gets8(data) * get_disp8N(ins);
+            } else {
+                op->offset = gets8(data);
+            }
+            data++;
+            break;
+        case 2:
+            op->segment |= SEG_DISP32;
+            op->offset = gets32(data);
+            data += 4;
+            break;
+        }
+        return data;
+    }
+}
+
+/*
+ * Determine whether the instruction template in t corresponds to the data
+ * stream in data. Return the number of bytes matched if so.
+ */
+#define case4(x) case (x): case (x)+1: case (x)+2: case (x)+3
+
+static int matches(const struct itemplate *t, uint8_t *data,
+                   const struct prefix_info *prefix, int segsize, insn *ins)
+{
+    uint8_t *r = (uint8_t *)(t->code);
+    uint8_t *origdata = data;
+    bool a_used = false, o_used = false;
+    enum prefixes drep = 0;
+    enum prefixes dwait = 0;
+    uint8_t lock = prefix->lock;
+    int osize = prefix->osize;
+    int asize = prefix->asize;
+    int i, c;
+    int op1, op2;
+    struct operand *opx, *opy;
+    uint8_t opex = 0;
+    bool vex_ok = false;
+    int regmask = (segsize == 64) ? 15 : 7;
+    enum ea_type eat = EA_SCALAR;
+
+    for (i = 0; i < MAX_OPERANDS; i++) {
+        ins->oprsi.segment = ins->oprsi.disp_size =
+            (segsize == 64 ? SEG_64BIT : segsize == 32 ? SEG_32BIT : 0);
+    }
+    ins->evex_tuple = 0;
+    ins->rex = prefix->rex;
+    memset(ins->prefixes, 0, sizeof ins->prefixes);
+
+    if (itemp_has(t, (segsize == 64 ? IF_NOLONG : IF_LONG)))
+        return 0;
+
+    if (prefix->rep == 0xF2)
+        drep = (itemp_has(t, IF_BND) ? P_BND : P_REPNE);
+    else if (prefix->rep == 0xF3)
+        drep = P_REP;
+
+    dwait = prefix->wait ? P_WAIT : 0;
+
+    while ((c = *r++) != 0) {
+        op1 = (c & 3) + ((opex & 1) << 2);
+        op2 = ((c >> 3) & 3) + ((opex & 2) << 1);
+        opx = &ins->oprsop1;
+        opy = &ins->oprsop2;
+        opex = 0;
+
+        switch (c) {
+        case 01:
+        case 02:
+        case 03:
+        case 04:
+            while (c--)
+                if (*r++ != *data++)
+                    return 0;
+            break;
+
+        case 05:
+        case 06:
+        case 07:
+            opex = c;
+            break;
+
+        case4(010):
+        {
+            int t = *r++, d = *data++;
+            if (d < t || d > t + 7)
+                return 0;
+            else {
+                opx->basereg = (d-t)+
+                    (ins->rex & REX_B ? 8 : 0);
+                opx->segment |= SEG_RMREG;
+            }
+            break;
+        }
+
+        case4(014):
+            /* this is an separate index reg position of MIB operand (ICC) */
+            /* Disassembler uses NASM's split EA form only                 */
+            break;
+
+        case4(0274):
+            opx->offset = (int8_t)*data++;
+            opx->segment |= SEG_SIGNED;
+            break;
+
+        case4(020):
+            opx->offset = *data++;
+            break;
+
+        case4(024):
+            opx->offset = *data++;
+            break;
+
+        case4(030):
+            opx->offset = getu16(data);
+            data += 2;
+            break;
+
+        case4(034):
+            if (osize == 32) {
+                opx->offset = getu32(data);
+                data += 4;
+            } else {
+                opx->offset = getu16(data);
+                data += 2;
+            }
+            if (segsize != asize)
+                opx->disp_size = asize;
+            break;
+
+        case4(040):
+            opx->offset = getu32(data);
+            data += 4;
+            break;
+
+        case4(0254):
+            opx->offset = gets32(data);
+            data += 4;
+            break;
+
+        case4(044):
+            switch (asize) {
+            case 16:
+                opx->offset = getu16(data);
+                data += 2;
+                if (segsize != 16)
+                    opx->disp_size = 16;
+                break;
+            case 32:
+                opx->offset = getu32(data);
+                data += 4;
+                if (segsize == 16)
+                    opx->disp_size = 32;
+                break;
+            case 64:
+                opx->offset = getu64(data);
+                opx->disp_size = 64;
+                data += 8;
+                break;
+            }
+            break;
+
+        case4(050):
+            opx->offset = gets8(data++);
+            opx->segment |= SEG_RELATIVE;
+            break;
+
+        case4(054):
+            opx->offset = getu64(data);
+            data += 8;
+            break;
+
+        case4(060):
+            opx->offset = gets16(data);
+            data += 2;
+            opx->segment |= SEG_RELATIVE;
+            opx->segment &= ~SEG_32BIT;
+            break;
+
+        case4(064):  /* rel */
+            opx->segment |= SEG_RELATIVE;
+            /* In long mode rel is always 32 bits, sign extended. */
+            if (segsize == 64 || osize == 32) {
+                opx->offset = gets32(data);
+                data += 4;
+                if (segsize != 64)
+                    opx->segment |= SEG_32BIT;
+                opx->type = (opx->type & ~SIZE_MASK)
+                    | (segsize == 64 ? BITS64 : BITS32);
+            } else {
+                opx->offset = gets16(data);
+                data += 2;
+                opx->segment &= ~SEG_32BIT;
+                opx->type = (opx->type & ~SIZE_MASK) | BITS16;
+            }
+            break;
+
+        case4(070):
+            opx->offset = gets32(data);
+            data += 4;
+            opx->segment |= SEG_32BIT | SEG_RELATIVE;
+            break;
+
+        case4(0100):
+        case4(0110):
+        case4(0120):
+        case4(0130):
+        {
+            int modrm = *data++;
+            opx->segment |= SEG_RMREG;
+            data = do_ea(data, modrm, asize, segsize, eat, opy, ins);
+            if (!data)
+                return 0;
+            opx->basereg = ((modrm >> 3) & 7) + (ins->rex & REX_R ? 8 : 0);
+            if ((ins->rex & REX_EV) && (segsize == 64))
+                opx->basereg += (ins->evex_p0 & EVEX_P0RP ? 0 : 16);
+            break;
+        }
+
+        case 0171:
+        {
+            uint8_t t = *r++;
+            uint8_t d = *data++;
+            if ((d ^ t) & ~070) {
+                return 0;
+            } else {
+                op2 = (op2 & ~3) | ((t >> 3) & 3);
+                opy = &ins->oprsop2;
+                opy->basereg = ((d >> 3) & 7) +
+                    (ins->rex & REX_R ? 8 : 0);
+                opy->segment |= SEG_RMREG;
+            }
+            break;
+        }
+
+        case 0172:
+            {
+                uint8_t ximm = *data++;
+                c = *r++;
+                ins->oprsc >> 3.basereg = (ximm >> 4) & regmask;
+                ins->oprsc >> 3.segment |= SEG_RMREG;
+                ins->oprsc & 7.offset = ximm & 15;
+            }
+            break;
+
+        case 0173:
+            {
+                uint8_t ximm = *data++;
+                c = *r++;
+
+                if ((c ^ ximm) & 15)
+                    return 0;
+
+                ins->oprsc >> 4.basereg = (ximm >> 4) & regmask;
+                ins->oprsc >> 4.segment |= SEG_RMREG;
+            }
+            break;
+
+        case4(0174):
+            {
+                uint8_t ximm = *data++;
+
+                opx->basereg = (ximm >> 4) & regmask;
+                opx->segment |= SEG_RMREG;
+            }
+            break;
+
+        case4(0200):
+        case4(0204):
+        case4(0210):
+        case4(0214):
+        case4(0220):
+        case4(0224):
+        case4(0230):
+        case4(0234):
+        {
+            int modrm = *data++;
+            if (((modrm >> 3) & 07) != (c & 07))
+                return 0;   /* spare field doesn't match up */
+            data = do_ea(data, modrm, asize, segsize, eat, opy, ins);
+            if (!data)
+                return 0;
+            break;
+        }
+
+        case4(0240):
+        case 0250:
+        {
+            uint8_t evexm   = *r++;
+            uint8_t evexwlp = *r++;
+            uint8_t modrm, valid_mask;
+            ins->evex_tuple = *r++ - 0300;
+            modrm = *(origdata + 1);
+
+            ins->rex |= REX_EV;
+            if ((prefix->rex & (REX_EV|REX_V|REX_P)) != REX_EV)
+                return 0;
+
+            if ((evexm & 0x1f) != prefix->vex_m)
+                return 0;
+
+            switch (evexwlp & 060) {
+            case 000:
+                if (prefix->rex & REX_W)
+                    return 0;
+                break;
+            case 020:
+                if (!(prefix->rex & REX_W))
+                    return 0;
+                ins->rex |= REX_W;
+                break;
+            case 040:        /* VEX.W is a don't care */
+                ins->rex &= ~REX_W;
+                break;
+            case 060:
+                break;
+            }
+
+            /* If EVEX.b is set with reg-reg op,
+             * EVEX.L'L contains embedded rounding control info
+             */
+            if ((prefix->evex2 & EVEX_P2B) && ((modrm >> 6) == 3)) {
+                valid_mask = 0x3;   /* prefix only */
+            } else {
+                valid_mask = 0xf;   /* vector length and prefix */
+            }
+            if ((evexwlp ^ prefix->vex_lp) & valid_mask)
+                return 0;
+
+            if (c == 0250) {
+                if ((prefix->vex_v != 0) ||
+                    (!(prefix->evex2 & EVEX_P2VP) &&
+                     ((eat < EA_XMMVSIB) || (eat > EA_ZMMVSIB))))
+                    return 0;
+            } else {
+                opx->segment |= SEG_RMREG;
+                opx->basereg = ((~prefix->evex2 & EVEX_P2VP) << (4 - 3) ) |
+                                prefix->vex_v;
+            }
+            vex_ok = true;
+            memcpy(ins->evex_p, prefix->evex, 3);
+            break;
+        }
+
+        case4(0260):
+        case 0270:
+        {
+            int vexm   = *r++;
+            int vexwlp = *r++;
+
+            ins->rex |= REX_V;
+            if ((prefix->rex & (REX_V|REX_P)) != REX_V)
+                return 0;
+
+            if ((vexm & 0x1f) != prefix->vex_m)
+                return 0;
+
+            switch (vexwlp & 060) {
+            case 000:
+                if (prefix->rex & REX_W)
+                    return 0;
+                break;
+            case 020:
+                if (!(prefix->rex & REX_W))
+                    return 0;
+                ins->rex &= ~REX_W;
+                break;
+            case 040:        /* VEX.W is a don't care */
+                ins->rex &= ~REX_W;
+                break;
+            case 060:
+                break;
+            }
+
+            /* The 010 bit of vexwlp is set if VEX.L is ignored */
+            if ((vexwlp ^ prefix->vex_lp) & ((vexwlp & 010) ? 03 : 07))
+                return 0;
+
+            if (c == 0270) {
+                if (prefix->vex_v != 0)
+                    return 0;
+            } else {
+                opx->segment |= SEG_RMREG;
+                opx->basereg = prefix->vex_v;
+            }
+            vex_ok = true;
+            break;
+        }
+
+        case 0271:
+            if (prefix->rep == 0xF3)
+                drep = P_XRELEASE;
+            break;
+
+        case 0272:
+            if (prefix->rep == 0xF2)
+                drep = P_XACQUIRE;
+            else if (prefix->rep == 0xF3)
+                drep = P_XRELEASE;
+            break;
+
+        case 0273:
+            if (prefix->lock == 0xF0) {
+                if (prefix->rep == 0xF2)
+                    drep = P_XACQUIRE;
+                else if (prefix->rep == 0xF3)
+                    drep = P_XRELEASE;
+            }
+            break;
+
+        case 0310:
+            if (asize != 16)
+                return 0;
+            else
+                a_used = true;
+            break;
+
+        case 0311:
+            if (asize != 32)
+                return 0;
+            else
+                a_used = true;
+            break;
+
+        case 0312:
+            if (asize != segsize)
+                return 0;
+            else
+                a_used = true;
+            break;
+
+        case 0313:
+            if (asize != 64)
+                return 0;
+            else
+                a_used = true;
+            break;
+
+        case 0314:
+            if (prefix->rex & REX_B)
+                return 0;
+            break;
+
+        case 0315:
+            if (prefix->rex & REX_X)
+                return 0;
+            break;
+
+        case 0316:
+            if (prefix->rex & REX_R)
+                return 0;
+            break;
+
+        case 0317:
+            if (prefix->rex & REX_W)
+                return 0;
+            break;
+
+        case 0320:
+            if (osize != 16)
+                return 0;
+            else
+                o_used = true;
+            break;
+
+        case 0321:
+            if (osize != 32)
+                return 0;
+            else
+                o_used = true;
+            break;
+
+        case 0322:
+            if (osize != (segsize == 16 ? 16 : 32))
+                return 0;
+            else
+                o_used = true;
+            break;
+
+        case 0323:
+            ins->rex |= REX_W;    /* 64-bit only instruction */
+            osize = 64;
+            o_used = true;
+            break;
+
+        case 0324:
+            if (osize != 64)
+                return 0;
+            o_used = true;
+            break;
+
+        case 0325:
+            ins->rex |= REX_NH;
+            break;
+
+        case 0326:
+            if (prefix->rep == 0xF3)
+                return 0;
+            break;
+
+        case 0331:
+            if (prefix->rep)
+                return 0;
+            break;
+
+        case 0332:
+            if (prefix->rep != 0xF2)
+                return 0;
+            drep = 0;
+            break;
+
+        case 0333:
+            if (prefix->rep != 0xF3)
+                return 0;
+            drep = 0;
+            break;
+
+        case 0334:
+            if (lock) {
+                ins->rex |= REX_R;
+                lock = 0;
+            }
+            break;
+
+        case 0335:
+            if (drep == P_REP)
+                drep = P_REPE;
+            break;
+
+        case 0336:
+        case 0337:
+            break;
+
+        case 0340:
+            return 0;
+
+        case 0341:
+            if (prefix->wait != 0x9B)
+                return 0;
+            dwait = 0;
+            break;
+
+        case 0360:
+            if (prefix->osp || prefix->rep)
+                return 0;
+            break;
+
+        case 0361:
+            if (!prefix->osp || prefix->rep)
+                return 0;
+            o_used = true;
+            break;
+
+        case 0364:
+            if (prefix->osp)
+                return 0;
+            break;
+
+        case 0365:
+            if (prefix->asp)
+                return 0;
+            break;
+
+        case 0366:
+            if (!prefix->osp)
+                return 0;
+            o_used = true;
+            break;
+
+        case 0367:
+            if (!prefix->asp)
+                return 0;
+            a_used = true;
+            break;
+
+        case 0370:
+        case 0371:
+            break;
+
+        case 0374:
+            eat = EA_XMMVSIB;
+            break;
+
+        case 0375:
+            eat = EA_YMMVSIB;
+            break;
+
+        case 0376:
+            eat = EA_ZMMVSIB;
+            break;
+
+        default:
+            return 0;    /* Unknown code */
+        }
+    }
+
+    if (!vex_ok && (ins->rex & (REX_V | REX_EV)))
+        return 0;
+
+    /* REX cannot be combined with VEX */
+    if ((ins->rex & REX_V) && (prefix->rex & REX_P))
+        return 0;
+
+    /*
+     * Check for unused rep or a/o prefixes.
+     */
+    for (i = 0; i < t->operands; i++) {
+        if (ins->oprsi.segment != SEG_RMREG)
+            a_used = true;
+    }
+
+    if (lock) {
+        if (ins->prefixesPPS_LOCK)
+            return 0;
+        ins->prefixesPPS_LOCK = P_LOCK;
+    }
+    if (drep) {
+        if (ins->prefixesPPS_REP)
+            return 0;
+        ins->prefixesPPS_REP = drep;
+    }
+    ins->prefixesPPS_WAIT = dwait;
+    if (!o_used) {
+        if (osize != ((segsize == 16) ? 16 : 32)) {
+            enum prefixes pfx = 0;
+
+            switch (osize) {
+            case 16:
+                pfx = P_O16;
+                break;
+            case 32:
+                pfx = P_O32;
+                break;
+            case 64:
+                pfx = P_O64;
+                break;
+            }
+
+            if (ins->prefixesPPS_OSIZE)
+                return 0;
+            ins->prefixesPPS_OSIZE = pfx;
+        }
+    }
+    if (!a_used && asize != segsize) {
+        if (ins->prefixesPPS_ASIZE)
+            return 0;
+        ins->prefixesPPS_ASIZE = asize == 16 ? P_A16 : P_A32;
+    }
+
+    /* Fix: check for redundant REX prefixes */
+
+    return data - origdata;
+}
+
+int32_t disasm(uint8_t *data, int32_t data_size, char *output, int outbufsize, int segsize,
+               int64_t offset, int autosync, iflag_t *prefer)
+{
+    const struct itemplate * const *p, * const *best_p;
+    const struct disasm_index *ix;
+    uint8_t *dp;
+    int length, best_length = 0;
+    char *segover;
+    int i, slen, colon, n;
+    uint8_t *origdata;
+    int works;
+    insn tmp_ins, ins;
+    iflag_t goodness, best;
+    int best_pref;
+    struct prefix_info prefix;
+    bool end_prefix;
+    bool is_evex;
+
+    memset(&ins, 0, sizeof ins);
+
+    /*
+     * Scan for prefixes.
+     */
+    memset(&prefix, 0, sizeof prefix);
+    prefix.asize = segsize;
+    prefix.osize = (segsize == 64) ? 32 : segsize;
+    segover = NULL;
+    origdata = data;
+
+    ix = itable;
+
+    end_prefix = false;
+    while (!end_prefix) {
+        switch (*data) {
+        case 0xF2:
+        case 0xF3:
+            fetch_or_return(origdata, data, data_size, 1);
+            prefix.rep = *data++;
+            break;
+
+        case 0x9B:
+            fetch_or_return(origdata, data, data_size, 1);
+            prefix.wait = *data++;
+            break;
+
+        case 0xF0:
+            fetch_or_return(origdata, data, data_size, 1);
+            prefix.lock = *data++;
+            break;
+
+        case 0x2E:
+            fetch_or_return(origdata, data, data_size, 1);
+            segover = "cs", prefix.seg = *data++;
+            break;
+        case 0x36:
+            fetch_or_return(origdata, data, data_size, 1);
+            segover = "ss", prefix.seg = *data++;
+            break;
+        case 0x3E:
+            fetch_or_return(origdata, data, data_size, 1);
+            segover = "ds", prefix.seg = *data++;
+            break;
+        case 0x26:
+            fetch_or_return(origdata, data, data_size, 1);
+            segover = "es", prefix.seg = *data++;
+            break;
+        case 0x64:
+            fetch_or_return(origdata, data, data_size, 1);
+            segover = "fs", prefix.seg = *data++;
+            break;
+        case 0x65:
+            fetch_or_return(origdata, data, data_size, 1);
+            segover = "gs", prefix.seg = *data++;
+            break;
+
+        case 0x66:
+            fetch_or_return(origdata, data, data_size, 1);
+            prefix.osize = (segsize == 16) ? 32 : 16;
+            prefix.osp = *data++;
+            break;
+        case 0x67:
+            fetch_or_return(origdata, data, data_size, 1);
+            prefix.asize = (segsize == 32) ? 16 : 32;
+            prefix.asp = *data++;
+            break;
+
+        case 0xC4:
+        case 0xC5:
+            if (segsize == 64 || (data1 & 0xc0) == 0xc0) {
+                fetch_or_return(origdata, data, data_size, 2);
+                prefix.vex0 = *data++;
+                prefix.vex1 = *data++;
+
+                prefix.rex = REX_V;
+                prefix.vex_c = RV_VEX;
+
+                if (prefix.vex0 == 0xc4) {
+                    fetch_or_return(origdata, data, data_size, 1);
+                    prefix.vex2 = *data++;
+                    prefix.rex |= (~prefix.vex1 >> 5) & 7; /* REX_RXB */
+                    prefix.rex |= (prefix.vex2 >> (7-3)) & REX_W;
+                    prefix.vex_m = prefix.vex1 & 0x1f;
+                    prefix.vex_v = (~prefix.vex2 >> 3) & 15;
+                    prefix.vex_lp = prefix.vex2 & 7;
+                } else {
+                    prefix.rex |= (~prefix.vex1 >> (7-2)) & REX_R;
+                    prefix.vex_m = 1;
+                    prefix.vex_v = (~prefix.vex1 >> 3) & 15;
+                    prefix.vex_lp = prefix.vex1 & 7;
+                }
+
+                ix = itable_vexRV_VEXprefix.vex_mprefix.vex_lp & 3;
+            }
+            end_prefix = true;
+            break;
+
+        case 0x62:
+        {
+            if (segsize == 64 || ((data1 & 0xc0) == 0xc0)) {
+                fetch_or_return(origdata, data, data_size, 4);
+                data++;        /* 62h EVEX prefix */
+                prefix.evex0 = *data++;
+                prefix.evex1 = *data++;
+                prefix.evex2 = *data++;
+
+                prefix.rex    = REX_EV;
+                prefix.vex_c  = RV_EVEX;
+                prefix.rex   |= (~prefix.evex0 >> 5) & 7; /* REX_RXB */
+                prefix.rex   |= (prefix.evex1 >> (7-3)) & REX_W;
+                prefix.vex_m  = prefix.evex0 & EVEX_P0MM;
+                prefix.vex_v  = (~prefix.evex1 & EVEX_P1VVVV) >> 3;
+                prefix.vex_lp = ((prefix.evex2 & EVEX_P2LL) >> (5-2)) |
+                                (prefix.evex1 & EVEX_P1PP);
+
+                ix = itable_vexprefix.vex_cprefix.vex_mprefix.vex_lp & 3;
+            }
+            end_prefix = true;
+            break;
+        }
+
+        case 0x8F:
+            if ((data1 & 030) != 0 &&
+                    (segsize == 64 || (data1 & 0xc0) == 0xc0)) {
+                fetch_or_return(origdata, data, data_size, 3);
+                prefix.vex0 = *data++;
+                prefix.vex1 = *data++;
+                prefix.vex2 = *data++;
+
+                prefix.rex = REX_V;
+                prefix.vex_c = RV_XOP;
+
+                prefix.rex |= (~prefix.vex1 >> 5) & 7; /* REX_RXB */
+                prefix.rex |= (prefix.vex2 >> (7-3)) & REX_W;
+                prefix.vex_m = prefix.vex1 & 0x1f;
+                prefix.vex_v = (~prefix.vex2 >> 3) & 15;
+                prefix.vex_lp = prefix.vex2 & 7;
+
+                ix = itable_vexRV_XOPprefix.vex_mprefix.vex_lp & 3;
+            }
+            end_prefix = true;
+            break;
+
+        case REX_P + 0x0:
+        case REX_P + 0x1:
+        case REX_P + 0x2:
+        case REX_P + 0x3:
+        case REX_P + 0x4:
+        case REX_P + 0x5:
+        case REX_P + 0x6:
+        case REX_P + 0x7:
+        case REX_P + 0x8:
+        case REX_P + 0x9:
+        case REX_P + 0xA:
+        case REX_P + 0xB:
+        case REX_P + 0xC:
+        case REX_P + 0xD:
+        case REX_P + 0xE:
+        case REX_P + 0xF:
+            if (segsize == 64) {
+                fetch_or_return(origdata, data, data_size, 1);
+                prefix.rex = *data++;
+                if (prefix.rex & REX_W)
+                    prefix.osize = 64;
+            }
+            end_prefix = true;
+            break;
+
+        default:
+            end_prefix = true;
+            break;
+        }
+    }
+
+    iflag_set_all(&best); /* Worst possible */
+    best_p = NULL;
+    best_pref = INT_MAX;
+
+    if (!ix)
+        return 0;        /* No instruction table at all... */
+
+    dp = data;
+    fetch_or_return(origdata, dp, data_size, 1);
+    ix += *dp++;
+    while (ix->n == -1) {
+        fetch_or_return(origdata, dp, data_size, 1);
+        ix = (const struct disasm_index *)ix->p + *dp++;
+    }
+
+    p = (const struct itemplate * const *)ix->p;
+    for (n = ix->n; n; n--, p++) {
+        if ((length = matches(*p, data, &prefix, segsize, &tmp_ins))) {
+            works = true;
+            /*
+             * Final check to make sure the types of r/m match up.
+             * XXX: Need to make sure this is actually correct.
+             */
+            for (i = 0; i < (*p)->operands; i++) {
+                if (
+                        /* If it's a mem-only EA but we have a
+                           register, die. */
+                        ((tmp_ins.oprsi.segment & SEG_RMREG) &&
+                         is_class(MEMORY, (*p)->opdi)) ||
+                        /* If it's a reg-only EA but we have a memory
+                           ref, die. */
+                        (!(tmp_ins.oprsi.segment & SEG_RMREG) &&
+                         !(REG_EA & ~(*p)->opdi) &&
+                         !((*p)->opdi & REG_SMASK)) ||
+                        /* Register type mismatch (eg FS vs REG_DESS):
+                           die. */
+                        ((((*p)->opdi & (REGISTER | FPUREG)) ||
+                          (tmp_ins.oprsi.segment & SEG_RMREG)) &&
+                         !whichreg((*p)->opdi,
+                             tmp_ins.oprsi.basereg, tmp_ins.rex))
+                   ) {
+                    works = false;
+                    break;
+                }
+            }
+
+            /*
+             * Note: we always prefer instructions which incorporate
+             * prefixes in the instructions themselves.  This is to allow
+             * e.g. PAUSE to be preferred to REP NOP, and deal with
+             * MMX/SSE instructions where prefixes are used to select
+             * between MMX and SSE register sets or outright opcode
+             * selection.
+             */
+            if (works) {
+                int i, nprefix;
+                goodness = iflag_pfmask(*p);
+                goodness = iflag_xor(&goodness, prefer);
+		nprefix = 0;
+		for (i = 0; i < MAXPREFIX; i++)
+		    if (tmp_ins.prefixesi)
+			nprefix++;
+                if (nprefix < best_pref ||
+		    (nprefix == best_pref &&
+                     iflag_cmp(&goodness, &best) < 0)) {
+                    /* This is the best one found so far */
+                    best = goodness;
+                    best_p = p;
+                    best_pref = nprefix;
+                    best_length = length;
+                    ins = tmp_ins;
+                }
+            }
+        }
+    }
+
+    if (!best_p)
+        return 0;               /* no instruction was matched */
+
+    /* Pick the best match */
+    p = best_p;
+    length = best_length;
+
+    slen = 0;
+
+    /* TODO: snprintf returns the value that the string would have if
+     *      the buffer were long enough, and not the actual length of
+     *      the returned string, so each instance of using the return
+     *      value of snprintf should actually be checked to assure that
+     *      the return value is "sane."  Maybe a macro wrapper could
+     *      be used for that purpose.
+     */
+    for (i = 0; i < MAXPREFIX; i++) {
+        const char *prefix = prefix_name(ins.prefixesi);
+        if (prefix)
+            slen += snprintf(output+slen, outbufsize-slen, "%s ", prefix);
+    }
+
+    i = (*p)->opcode;
+    slen += snprintf(output + slen, outbufsize - slen, "%s",
+                     nasm_insn_namesi);
+
+    colon = false;
+    is_evex = !!(ins.rex & REX_EV);
+    length += data - origdata;  /* fix up for prefixes */
+    for (i = 0; i < (*p)->operands; i++) {
+        opflags_t t = (*p)->opdi;
+        decoflags_t deco = (*p)->decoi;
+        const operand *o = &ins.oprsi;
+        int64_t offs;
+
+        outputslen++ = (colon ? ':' : i == 0 ? ' ' : ',');
+
+        offs = o->offset;
+        if (o->segment & SEG_RELATIVE) {
+            offs += offset + length;
+            /*
+             * sort out wraparound
+             */
+            if (!(o->segment & (SEG_32BIT|SEG_64BIT)))
+                offs &= 0xffff;
+            else if (segsize != 64)
+                offs &= 0xffffffff;
+
+            /*
+             * add sync marker, if autosync is on
+             */
+            if (autosync)
+                add_sync(offs, 0L);
+        }
+
+        if (t & COLON)
+            colon = true;
+        else
+            colon = false;
+
+        if ((t & (REGISTER | FPUREG)) ||
+                (o->segment & SEG_RMREG)) {
+            enum reg_enum reg;
+            reg = whichreg(t, o->basereg, ins.rex);
+            if (t & TO)
+                slen += snprintf(output + slen, outbufsize - slen, "to ");
+            slen += snprintf(output + slen, outbufsize - slen, "%s",
+                    nasm_reg_namesreg-EXPR_REG_START);
+            if (t & REGSET_MASK)
+                slen += snprintf(output + slen, outbufsize - slen, "+%d",
+                                 (int)((t & REGSET_MASK) >> (REGSET_SHIFT-1))-1);
+            if (is_evex && deco)
+                slen += append_evex_reg_deco(output + slen, outbufsize - slen,
+                                             deco, ins.evex_p);
+        } else if (!(UNITY & ~t)) {
+            outputslen++ = '1';
+        } else if (t & IMMEDIATE) {
+            if (t & BITS8) {
+                slen +=
+                    snprintf(output + slen, outbufsize - slen, "byte ");
+                if (o->segment & SEG_SIGNED) {
+                    if (offs < 0) {
+                        offs *= -1;
+                        outputslen++ = '-';
+                    } else
+                        outputslen++ = '+';
+                }
+            } else if (t & BITS16) {
+                slen +=
+                    snprintf(output + slen, outbufsize - slen, "word ");
+            } else if (t & BITS32) {
+                slen +=
+                    snprintf(output + slen, outbufsize - slen, "dword ");
+            } else if (t & BITS64) {
+                slen +=
+                    snprintf(output + slen, outbufsize - slen, "qword ");
+            } else if (t & NEAR) {
+                slen +=
+                    snprintf(output + slen, outbufsize - slen, "near ");
+            } else if (t & SHORT) {
+                slen +=
+                    snprintf(output + slen, outbufsize - slen, "short ");
+            }
+            slen +=
+                snprintf(output + slen, outbufsize - slen, "0x%"PRIx64"",
+                        offs);
+        } else if (!(MEM_OFFS & ~t)) {
+            slen +=
+                snprintf(output + slen, outbufsize - slen,
+                        "%s%s%s0x%"PRIx64"",
+                        (segover ? segover : ""),
+                        (segover ? ":" : ""),
+                        (o->disp_size == 64 ? "qword " :
+                         o->disp_size == 32 ? "dword " :
+                         o->disp_size == 16 ? "word " : ""), offs);
+            segover = NULL;
+        } else if (is_class(REGMEM, t)) {
+            int started = false;
+            if (t & BITS8)
+                slen +=
+                    snprintf(output + slen, outbufsize - slen, "byte ");
+            if (t & BITS16)
+                slen +=
+                    snprintf(output + slen, outbufsize - slen, "word ");
+            if (t & BITS32)
+                slen +=
+                    snprintf(output + slen, outbufsize - slen, "dword ");
+            if (t & BITS64)
+                slen +=
+                    snprintf(output + slen, outbufsize - slen, "qword ");
+            if (t & BITS80)
+                slen +=
+                    snprintf(output + slen, outbufsize - slen, "tword ");
+            if ((ins.evex_p2 & EVEX_P2B) && (deco & BRDCAST_MASK)) {
+                /* when broadcasting, each element size should be used */
+                if (deco & BR_BITS16)
+                    slen +=
+                        snprintf(output + slen, outbufsize - slen, "word ");
+                else if (deco & BR_BITS32)
+                    slen +=
+                        snprintf(output + slen, outbufsize - slen, "dword ");
+                else if (deco & BR_BITS64)
+                    slen +=
+                        snprintf(output + slen, outbufsize - slen, "qword ");
+            } else {
+                if (t & BITS128)
+                    slen +=
+                        snprintf(output + slen, outbufsize - slen, "oword ");
+                if (t & BITS256)
+                    slen +=
+                        snprintf(output + slen, outbufsize - slen, "yword ");
+                if (t & BITS512)
+                    slen +=
+                        snprintf(output + slen, outbufsize - slen, "zword ");
+            }
+            if (t & FAR)
+                slen += snprintf(output + slen, outbufsize - slen, "far ");
+            if (t & NEAR)
+                slen +=
+                    snprintf(output + slen, outbufsize - slen, "near ");
+            outputslen++ = '';
+            if (o->disp_size)
+                slen += snprintf(output + slen, outbufsize - slen, "%s",
+                        (o->disp_size == 64 ? "qword " :
+                         o->disp_size == 32 ? "dword " :
+                         o->disp_size == 16 ? "word " :
+                         ""));
+            if (o->eaflags & EAF_REL)
+                slen += snprintf(output + slen, outbufsize - slen, "rel ");
+            if (segover) {
+                slen +=
+                    snprintf(output + slen, outbufsize - slen, "%s:",
+                            segover);
+                segover = NULL;
+            }
+            if (o->basereg != -1) {
+                slen += snprintf(output + slen, outbufsize - slen, "%s",
+                        nasm_reg_names(o->basereg-EXPR_REG_START));
+                started = true;
+            }
+            if (o->indexreg != -1 && !itemp_has(*best_p, IF_MIB)) {
+                if (started)
+                    outputslen++ = '+';
+                slen += snprintf(output + slen, outbufsize - slen, "%s",
+                        nasm_reg_names(o->indexreg-EXPR_REG_START));
+                if (o->scale > 1)
+                    slen +=
+                        snprintf(output + slen, outbufsize - slen, "*%d",
+                                o->scale);
+                started = true;
+            }
+
+
+            if (o->segment & SEG_DISP8) {
+                if (is_evex) {
+                    const char *prefix;
+                    uint32_t offset = offs;
+                    if ((int32_t)offset < 0) {
+                        prefix = "-";
+                        offset = -offset;
+                    } else {
+                        prefix = "+";
+                    }
+                    slen +=
+                        snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx32"",
+                                prefix, offset);
+                } else {
+                    const char *prefix;
+                    uint8_t offset = offs;
+                    if ((int8_t)offset < 0) {
+                        prefix = "-";
+                        offset = -offset;
+                    } else {
+                        prefix = "+";
+                    }
+                    slen +=
+                        snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx8"",
+                                prefix, offset);
+                }
+            } else if (o->segment & SEG_DISP16) {
+                const char *prefix;
+                uint16_t offset = offs;
+                if ((int16_t)offset < 0 && started) {
+                    offset = -offset;
+                    prefix = "-";
+                } else {
+                    prefix = started ? "+" : "";
+                }
+                slen +=
+                    snprintf(output + slen, outbufsize - slen,
+                            "%s0x%"PRIx16"", prefix, offset);
+            } else if (o->segment & SEG_DISP32) {
+                if (prefix.asize == 64) {
+                    const char *prefix;
+                    uint64_t offset = offs;
+                    if ((int32_t)offs < 0 && started) {
+                        offset = -offset;
+                        prefix = "-";
+                    } else {
+                        prefix = started ? "+" : "";
+                    }
+                    slen +=
+                        snprintf(output + slen, outbufsize - slen,
+                                "%s0x%"PRIx64"", prefix, offset);
+                } else {
+                    const char *prefix;
+                    uint32_t offset = offs;
+                    if ((int32_t) offset < 0 && started) {
+                        offset = -offset;
+                        prefix = "-";
+                    } else {
+                        prefix = started ? "+" : "";
+                    }
+                    slen +=
+                        snprintf(output + slen, outbufsize - slen,
+                                "%s0x%"PRIx32"", prefix, offset);
+                }
+            }
+
+            if (o->indexreg != -1 && itemp_has(*best_p, IF_MIB)) {
+                outputslen++ = ',';
+                slen += snprintf(output + slen, outbufsize - slen, "%s",
+                        nasm_reg_names(o->indexreg-EXPR_REG_START));
+                if (o->scale > 1)
+                    slen +=
+                        snprintf(output + slen, outbufsize - slen, "*%d",
+                                o->scale);
+                started = true;
+            }
+
+            outputslen++ = '';
+
+            if (is_evex && deco)
+                slen += append_evex_mem_deco(output + slen, outbufsize - slen,
+                                             t, deco, ins.evex_p);
+        } else {
+            slen +=
+                snprintf(output + slen, outbufsize - slen, "<operand%d>",
+                        i);
+        }
+    }
+    outputslen = '\0';
+    if (segover) {              /* unused segment override */
+        char *p = output;
+        int count = slen + 1;
+        while (count--)
+            pcount + 3 = pcount;
+        strncpy(output, segover, 2);
+        output2 = ' ';
+    }
+    return length;
+}
+
+/*
+ * This is called when we don't have a complete instruction.  If it
+ * is a standalone *single-byte* prefix show it as such, otherwise
+ * print it as a literal.
+ */
+int32_t eatbyte(uint8_t *data, char *output, int outbufsize, int segsize)
+{
+    uint8_t byte = *data;
+    const char *str = NULL;
+
+    switch (byte) {
+    case 0xF2:
+        str = "repne";
+        break;
+    case 0xF3:
+        str = "rep";
+        break;
+    case 0x9B:
+        str = "wait";
+        break;
+    case 0xF0:
+        str = "lock";
+        break;
+    case 0x2E:
+        str = "cs";
+        break;
+    case 0x36:
+        str = "ss";
+        break;
+    case 0x3E:
+        str = "ds";
+        break;
+    case 0x26:
+        str = "es";
+        break;
+    case 0x64:
+        str = "fs";
+        break;
+    case 0x65:
+        str = "gs";
+        break;
+    case 0x66:
+        str = (segsize == 16) ? "o32" : "o16";
+        break;
+    case 0x67:
+        str = (segsize == 32) ? "a16" : "a32";
+        break;
+    case REX_P + 0x0:
+    case REX_P + 0x1:
+    case REX_P + 0x2:
+    case REX_P + 0x3:
+    case REX_P + 0x4:
+    case REX_P + 0x5:
+    case REX_P + 0x6:
+    case REX_P + 0x7:
+    case REX_P + 0x8:
+    case REX_P + 0x9:
+    case REX_P + 0xA:
+    case REX_P + 0xB:
+    case REX_P + 0xC:
+    case REX_P + 0xD:
+    case REX_P + 0xE:
+    case REX_P + 0xF:
+        if (segsize == 64) {
+            snprintf(output, outbufsize, "rex%s%s%s%s%s",
+                    (byte == REX_P) ? "" : ".",
+                    (byte & REX_W) ? "w" : "",
+                    (byte & REX_R) ? "r" : "",
+                    (byte & REX_X) ? "x" : "",
+                    (byte & REX_B) ? "b" : "");
+            break;
+        }
+        /* else fall through */
+    default:
+        snprintf(output, outbufsize, "db 0x%02x", byte);
+        break;
+    }
+
+    if (str)
+        snprintf(output, outbufsize, "%s", str);
+
+    return 1;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/disasm/disasm.h Added

@@ -0,0 +1,49 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2009 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * disasm.h   header file for disasm.c
+ */
+
+#ifndef NASM_DISASM_H
+#define NASM_DISASM_H
+
+#include "iflag.h"
+
+#define INSN_MAX 32             /* one instruction can't be longer than this */
+
+int32_t disasm(uint8_t *data, int32_t data_size, char *output, int outbufsize, int segsize,
+               int64_t offset, int autosync, iflag_t *prefer);
+int32_t eatbyte(uint8_t *data, char *output, int outbufsize, int segsize);
+
+#endif

_service:tar_scm:nasm-2.16.03.tar.xz/disasm/ndisasm.c Added

@@ -0,0 +1,400 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2009 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * ndisasm.c   the Netwide Disassembler main module
+ */
+
+#include "compiler.h"
+
+#include "nctype.h"
+#include <errno.h>
+
+#include "insns.h"
+#include "nasm.h"
+#include "nasmlib.h"
+#include "error.h"
+#include "ver.h"
+#include "sync.h"
+#include "disasm.h"
+
+#define BPL 8                   /* bytes per line of hex dump */
+
+static const char *help =
+    "usage: ndisasm -a -i -h -r -u -b bits -o origin -s sync...\n"
+    "               -e bytes -k start,bytes -p vendor file\n"
+    "   -a or -i activates auto (intelligent) sync\n"
+    "   -u same as -b 32\n"
+    "   -b 16, -b 32 or -b 64 sets the processor mode\n"
+    "   -h displays this text\n"
+    "   -r or -v displays the version number\n"
+    "   -e skips <bytes> bytes of header\n"
+    "   -k avoids disassembling <bytes> bytes from position <start>\n"
+    "   -p selects the preferred vendor instruction set (intel, amd, cyrix, idt)\n";
+
+static void output_ins(uint64_t, uint8_t *, int, char *);
+static void skip(uint32_t dist, FILE * fp);
+
+void nasm_verror(errflags severity, const char *fmt, va_list val)
+{
+    severity &= ERR_MASK;
+
+    vfprintf(stderr, fmt, val);
+    if (severity >= ERR_FATAL)
+        exit(severity - ERR_FATAL + 1);
+}
+
+fatal_func nasm_verror_critical(errflags severity, const char *fmt, va_list val)
+{
+    nasm_verror(severity, fmt, val);
+    abort();
+}
+
+int main(int argc, char **argv)
+{
+    char bufferINSN_MAX * 2, *p, *ep, *q;
+    char outbuf256;
+    char *pname = *argv;
+    char *filename = NULL;
+    uint32_t nextsync, synclen, initskip = 0L;
+    int lenread;
+    int32_t lendis;
+    bool autosync = false;
+    int bits = 16, b;
+    bool eof = false;
+    iflag_t prefer;
+    bool rn_error;
+    int64_t offset;
+    FILE *fp;
+
+    nasm_ctype_init();
+    iflag_clear_all(&prefer);
+
+    offset = 0;
+    init_sync();
+
+    while (--argc) {
+        char *v, *vv, *p = *++argv;
+        if (*p == '-' && p1) {
+            p++;
+            while (*p)
+                switch (nasm_tolower(*p)) {
+                case 'a':      /* auto or intelligent sync */
+                case 'i':
+                    autosync = true;
+                    p++;
+                    break;
+                case 'h':
+                    fputs(help, stderr);
+                    return 0;
+                case 'r':
+                case 'v':
+                    fprintf(stderr,
+                            "NDISASM version %s compiled on %s\n",
+			    nasm_version, nasm_date);
+                    return 0;
+                case 'u':	/* -u for -b 32, -uu for -b 64 */
+		    if (bits < 64)
+			bits <<= 1;
+                    p++;
+                    break;
+                case 'b':      /* bits */
+                    v = p1 ? p + 1 : --argc ? *++argv : NULL;
+                    if (!v) {
+                        fprintf(stderr, "%s: `-b' requires an argument\n",
+                                pname);
+                        return 1;
+                    }
+		    b = strtoul(v, &ep, 10);
+		    if (*ep || !(bits == 16 || bits == 32 || bits == 64)) {
+                        fprintf(stderr, "%s: argument to `-b' should"
+                                " be 16, 32 or 64\n", pname);
+                    } else {
+			bits = b;
+		    }
+                    p = "";     /* force to next argument */
+                    break;
+                case 'o':      /* origin */
+                    v = p1 ? p + 1 : --argc ? *++argv : NULL;
+                    if (!v) {
+                        fprintf(stderr, "%s: `-o' requires an argument\n",
+                                pname);
+                        return 1;
+                    }
+                    offset = readnum(v, &rn_error);
+                    if (rn_error) {
+                        fprintf(stderr,
+                                "%s: `-o' requires a numeric argument\n",
+                                pname);
+                        return 1;
+                    }
+                    p = "";     /* force to next argument */
+                    break;
+                case 's':      /* sync point */
+                    v = p1 ? p + 1 : --argc ? *++argv : NULL;
+                    if (!v) {
+                        fprintf(stderr, "%s: `-s' requires an argument\n",
+                                pname);
+                        return 1;
+                    }
+                    add_sync(readnum(v, &rn_error), 0L);
+                    if (rn_error) {
+                        fprintf(stderr,
+                                "%s: `-s' requires a numeric argument\n",
+                                pname);
+                        return 1;
+                    }
+                    p = "";     /* force to next argument */
+                    break;
+                case 'e':      /* skip a header */
+                    v = p1 ? p + 1 : --argc ? *++argv : NULL;
+                    if (!v) {
+                        fprintf(stderr, "%s: `-e' requires an argument\n",
+                                pname);
+                        return 1;
+                    }
+                    initskip = readnum(v, &rn_error);
+                    if (rn_error) {
+                        fprintf(stderr,
+                                "%s: `-e' requires a numeric argument\n",
+                                pname);
+                        return 1;
+                    }
+                    p = "";     /* force to next argument */
+                    break;
+                case 'k':      /* skip a region */
+                    v = p1 ? p + 1 : --argc ? *++argv : NULL;
+                    if (!v) {
+                        fprintf(stderr, "%s: `-k' requires an argument\n",
+                                pname);
+                        return 1;
+                    }
+                    vv = strchr(v, ',');
+                    if (!vv) {
+                        fprintf(stderr,
+                                "%s: `-k' requires two numbers separated"
+                                " by a comma\n", pname);
+                        return 1;
+                    }
+                    *vv++ = '\0';
+                    nextsync = readnum(v, &rn_error);
+                    if (rn_error) {
+                        fprintf(stderr,
+                                "%s: `-k' requires numeric arguments\n",
+                                pname);
+                        return 1;
+                    }
+                    synclen = readnum(vv, &rn_error);
+                    if (rn_error) {
+                        fprintf(stderr,
+                                "%s: `-k' requires numeric arguments\n",
+                                pname);
+                        return 1;
+                    }
+                    add_sync(nextsync, synclen);
+                    p = "";     /* force to next argument */
+                    break;
+                case 'p':      /* preferred vendor */
+                    v = p1 ? p + 1 : --argc ? *++argv : NULL;
+                    if (!v) {
+                        fprintf(stderr, "%s: `-p' requires an argument\n",
+                                pname);
+                        return 1;
+                    }
+                    if (!strcmp(v, "intel")) {
+                        iflag_clear_all(&prefer); /* default */
+                    } else if (!strcmp(v, "amd")) {
+                        iflag_clear_all(&prefer);
+                        iflag_set(&prefer, IF_AMD);
+                        iflag_set(&prefer, IF_3DNOW);
+                    } else if (!strcmp(v, "cyrix")) {
+                        iflag_clear_all(&prefer);
+                        iflag_set(&prefer, IF_CYRIX);
+                        iflag_set(&prefer, IF_3DNOW);
+                    } else if (!strcmp(v, "idt") ||
+                               !strcmp(v, "centaur") ||
+                               !strcmp(v, "winchip")) {
+                        iflag_clear_all(&prefer);
+                        iflag_set(&prefer, IF_3DNOW);
+                    } else {
+                        fprintf(stderr,
+                                "%s: unknown vendor `%s' specified with `-p'\n",
+                                pname, v);
+                        return 1;
+                    }
+                    p = "";     /* force to next argument */
+                    break;
+                default:       /*bf */
+                    fprintf(stderr, "%s: unrecognised option `-%c'\n",
+                            pname, *p);
+                    return 1;
+                }
+        } else if (!filename) {
+            filename = p;
+        } else {
+            fprintf(stderr, "%s: more than one filename specified\n",
+                    pname);
+            return 1;
+        }
+    }
+
+    if (!filename) {
+        fprintf(stderr, help, pname);
+        return 0;
+    }
+
+    if (strcmp(filename, "-")) {
+        fp = fopen(filename, "rb");
+        if (!fp) {
+            fprintf(stderr, "%s: unable to open `%s': %s\n",
+                    pname, filename, strerror(errno));
+            return 1;
+        }
+    } else {
+        nasm_set_binary_mode(stdin);
+        fp = stdin;
+    }
+
+    if (initskip > 0)
+        skip(initskip, fp);
+
+    /*
+     * This main loop is really horrible, and wants rewriting with
+     * an axe. It'll stay the way it is for a while though, until I
+     * find the energy...
+     */
+
+    p = q = buffer;
+    nextsync = next_sync(offset, &synclen);
+    do {
+        int32_t to_read = buffer + sizeof(buffer) - p;
+	if ((nextsync || synclen) &&
+	    to_read > nextsync - offset - (p - q))
+            to_read = nextsync - offset - (p - q);
+        if (to_read) {
+            lenread = fread(p, 1, to_read, fp);
+            if (lenread == 0)
+                eof = true;     /* help along systems with bad feof */
+        } else
+            lenread = 0;
+        p += lenread;
+        if ((nextsync || synclen) &&
+	    (uint32_t)offset == nextsync) {
+            if (synclen) {
+                fprintf(stdout, "%08"PRIX64"  skipping 0x%"PRIX32" bytes\n",
+			offset, synclen);
+                offset += synclen;
+                skip(synclen, fp);
+            }
+            p = q = buffer;
+            nextsync = next_sync(offset, &synclen);
+        }
+        while (p > q && (p - q >= INSN_MAX || lenread == 0)) {
+            lendis = disasm((uint8_t *)q, INSN_MAX, outbuf, sizeof(outbuf),
+			    bits, offset, autosync, &prefer);
+            if (!lendis || lendis > (p - q)
+                || ((nextsync || synclen) &&
+		    (uint32_t)lendis > nextsync - offset))
+                lendis = eatbyte((uint8_t *) q, outbuf, sizeof(outbuf), bits);
+            output_ins(offset, (uint8_t *) q, lendis, outbuf);
+            q += lendis;
+            offset += lendis;
+        }
+        if (q >= buffer + INSN_MAX) {
+            uint8_t *r = (uint8_t *) buffer, *s = (uint8_t *) q;
+            int count = p - q;
+            while (count--)
+                *r++ = *s++;
+            p -= (q - buffer);
+            q = buffer;
+        }
+    } while (lenread > 0 || !(eof || feof(fp)));
+
+    if (fp != stdin)
+        fclose(fp);
+
+    return 0;
+}
+
+static void output_ins(uint64_t offset, uint8_t *data,
+                       int datalen, char *insn)
+{
+    int bytes;
+    fprintf(stdout, "%08"PRIX64"  ", offset);
+
+    bytes = 0;
+    while (datalen > 0 && bytes < BPL) {
+        fprintf(stdout, "%02X", *data++);
+        bytes++;
+        datalen--;
+    }
+
+    fprintf(stdout, "%*s%s\n", (BPL + 1 - bytes) * 2, "", insn);
+
+    while (datalen > 0) {
+        fprintf(stdout, "         -");
+        bytes = 0;
+        while (datalen > 0 && bytes < BPL) {
+            fprintf(stdout, "%02X", *data++);
+            bytes++;
+            datalen--;
+        }
+        fprintf(stdout, "\n");
+    }
+}
+
+/*
+ * Skip a certain amount of data in a file, either by seeking if
+ * possible, or if that fails then by reading and discarding.
+ */
+static void skip(uint32_t dist, FILE * fp)
+{
+    char buffer256;           /* should fit on most stacks :-) */
+
+    /*
+     * Got to be careful with fseek: at least one fseek I've tried
+     * doesn't approve of SEEK_CUR. So I'll use SEEK_SET and
+     * ftell... horrible but apparently necessary.
+     */
+    if (fseek(fp, dist + ftell(fp), SEEK_SET)) {
+        while (dist > 0) {
+            uint32_t len = (dist < sizeof(buffer) ?
+                                 dist : sizeof(buffer));
+            if (fread(buffer, 1, len, fp) < len) {
+                perror("fread");
+                exit(1);
+            }
+            dist -= len;
+        }
+    }
+}

_service:tar_scm:nasm-2.16.03.tar.xz/disasm/sync.c Added

@@ -0,0 +1,129 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2009 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * sync.c   the Netwide Disassembler synchronisation processing module
+ */
+
+#include "compiler.h"
+
+
+#include "nasmlib.h"
+#include "sync.h"
+
+#define SYNC_MAX_SHIFT          31
+#define SYNC_MAX_SIZE           (1U << SYNC_MAX_SHIFT)
+
+/* initial # of sync points (*must* be power of two)*/
+#define SYNC_INITIAL_CHUNK      (1U << 12)
+
+/*
+ * This lot manages the current set of sync points by means of a
+ * heap (priority queue) structure.
+ */
+
+static struct Sync {
+    uint64_t pos;
+    uint32_t length;
+} *synx;
+
+static uint32_t max_synx, nsynx;
+
+static inline void swap_sync(uint32_t dst, uint32_t src)
+{
+    struct Sync t = synxdst;
+    synxdst = synxsrc;
+    synxsrc = t;
+}
+
+void init_sync(void)
+{
+    max_synx = SYNC_INITIAL_CHUNK;
+    synx = nasm_malloc((max_synx + 1) * sizeof(*synx));
+    nsynx = 0;
+}
+
+void add_sync(uint64_t pos, uint32_t length)
+{
+    uint32_t i;
+
+    if (nsynx >= max_synx) {
+        if (max_synx >= SYNC_MAX_SIZE) /* too many sync points! */
+            return;
+        max_synx = (max_synx << 1);
+        synx = nasm_realloc(synx, (max_synx + 1) * sizeof(*synx));
+    }
+
+    nsynx++;
+    synxnsynx.pos = pos;
+    synxnsynx.length = length;
+
+    for (i = nsynx; i > 1; i /= 2) {
+        if (synxi / 2.pos > synxi.pos)
+            swap_sync(i / 2, i);
+    }
+}
+
+uint64_t next_sync(uint64_t position, uint32_t *length)
+{
+    while (nsynx > 0 && synx1.pos + synx1.length <= position) {
+        uint32_t i, j;
+
+        swap_sync(nsynx, 1);
+        nsynx--;
+
+        i = 1;
+        while (i * 2 <= nsynx) {
+            j = i * 2;
+            if (synxj.pos < synxi.pos &&
+                (j + 1 > nsynx || synxj + 1.pos > synxj.pos)) {
+                swap_sync(j, i);
+                i = j;
+            } else if (j + 1 <= nsynx && synxj + 1.pos < synxi.pos) {
+                swap_sync(j + 1, i);
+                i = j + 1;
+            } else
+                break;
+        }
+    }
+
+    if (nsynx > 0) {
+        if (length)
+            *length = synx1.length;
+        return synx1.pos;
+    } else {
+        if (length)
+            *length = 0L;
+        return 0;
+    }
+}

_service:tar_scm:nasm-2.16.03.tar.xz/disasm/sync.h Added

@@ -0,0 +1,45 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2009 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/* 
+ * sync.h   header file for sync.c
+ */
+
+#ifndef NASM_SYNC_H
+#define NASM_SYNC_H
+
+void init_sync(void);
+void add_sync(uint64_t position, uint32_t length);
+uint64_t next_sync(uint64_t position, uint32_t *length);
+
+#endif

_service:tar_scm:nasm-2.16.03.tar.xz/doc/Makefile.in Added

@@ -0,0 +1,133 @@
+#
+# UNIX Makefile for NASM documentation
+#
+
+@SET_MAKE@
+
+top_srcdir	= @top_srcdir@
+srcdir		= @srcdir@
+VPATH		= @srcdir@
+prefix		= @prefix@
+exec_prefix	= @exec_prefix@
+bindir		= @bindir@
+mandir		= @mandir@
+docdir		= @docdir@
+htmldir		= @htmldir@
+infodir		= @infodir@
+datarootdir	= @datarootdir@
+
+INSTALL		= @INSTALL@
+INSTALL_PROGRAM	= @INSTALL_PROGRAM@
+INSTALL_DATA	= @INSTALL_DATA@
+
+PERL		= perl -I$(top_srcdir)/perllib -I$(srcdir)
+
+PDFOPT		= @PDFOPT@
+
+MKDIR_P		= @MKDIR_P@
+RM_F		= rm -f
+RM_RF		= rm -rf
+CP_F		= cp -f
+CP_UF		= cp -uf
+
+# Optional tools
+XZ		= @XZ@
+
+# Optional targets
+XZFILES         = @XZFILES@
+
+# Auxiliary files referenced by the HTML files
+HTMLAUX		= nasmdoc.css local.css nasmlogw.png
+
+SRCS		= nasmdoc.src inslist.src changes.src warnings.src version.src
+OUT		= html nasmdoc.txt nasmdoc.pdf $(XZFILES)
+XZOUT           = nasmdoc.pdf.xz
+
+# Don't delete intermediate files
+.SECONDARY:
+
+# Delete files on error
+.DELETE_ON_ERROR:
+
+.SUFFIXES:
+.SUFFIXES: .pfa .ph
+
+.PHONY: all xzfiles html clean spotless install
+
+all: $(OUT)
+
+xzfiles: $(XZOUT)
+
+inslist.src: inslist.pl ../x86/insns.dat
+	$(PERL) $(srcdir)/inslist.pl $(srcdir)/../x86/insns.dat
+
+html: $(HTMLAUX)
+	$(MKDIR_P) html
+	for f in $(HTMLAUX); do $(CP_UF) "$(srcdir)/$$f" html/; done
+	$(MAKE) html/nasmdoc0.html
+
+RDSRC = $(PERL) $(srcdir)/rdsrc.pl -I$(srcdir)/
+
+html/nasmdoc0.html: $(SRCS) rdsrc.pl
+	$(RM_F) html/*.html
+	$(RDSRC) -ohtml html nasmdoc.src
+
+nasmdoc.dip: $(SRCS) rdsrc.pl
+	$(RDSRC) dip nasmdoc.src
+
+nasmdoc.txt: $(SRCS) rdsrc.pl
+	$(RDSRC) txt nasmdoc.src
+
+version.src: $(top_srcdir)/version.pl $(top_srcdir)/version
+	$(PERL) $(top_srcdir)/version.pl docsrc \
+		< $(top_srcdir)/version > version.src
+
+nasmdoc.ps: nasmdoc.dip genps.pl afmmetrics.ph ttfmetrics.ph \
+	pswidth.ph nasmlogo.eps psfonts.ph head.ps
+	$(PERL) $(srcdir)/genps.pl -epsdir "$(srcdir)" \
+		-headps $(srcdir)/head.ps \
+		-fontpath fontpath \
+		-fontmap Fontmap \
+		nasmdoc.dip > nasmdoc.ps
+
+fontpath: nasmdoc.ps
+	@: Generated by side effect
+
+Fontmap: nasmdoc.ps
+	@: Generated by side effect
+
+nasmdoc.pdf: nasmdoc.ps pspdf.pl fontpath
+	$(PERL) $(srcdir)/pspdf.pl \
+		$(PDFOPT) $< $@ fontpath
+
+nasmdoc-raw.pdf: nasmdoc.ps pspdf.pl fontpath
+	$(PERL) $(srcdir)/pspdf.pl -nocompress \
+		$(PDFOPT) $< $@ fontpath
+
+nasmdoc.pdf.xz: nasmdoc-raw.pdf
+	$(RM_F) $@
+	$(XZ) -9e < $< > $@
+
+clean:
+	-$(RM_F) *.rtf *.hpj *.texi *.gid *.ipf *.dip
+	-$(RM_F) *.aux *.cp *.fn *.ky *.pg *.log *.toc *.tp *.vr
+	-$(RM_F) inslist.src version.src fontpath Fontmap
+	-$(RM_F) nasmdoc*.ps nasmdoc-raw.pdf
+
+spotless: clean
+	-$(RM_RF) html info
+	-$(RM_F) *.hlp nasmdoc.txt *.inf *.pdf *.pdf.xz *.dvi
+
+install: all
+	$(MKDIR_P) $(DESTDIR)$(htmldir)
+	$(INSTALL_DATA) html/* $(DESTDIR)$(htmldir)
+	$(MKDIR_P) $(DESTDIR)$(docdir)
+	$(INSTALL_DATA) nasmdoc.pdf nasmdoc.txt $(DESTDIR)$(docdir)
+
+#
+# Dummy rules that changes make behavior
+# (at end to avoid confusing non-GNU makes)
+#
+.SECONDARY:
+
+.DELETE_ON_ERROR:

_service:tar_scm:nasm-2.16.03.tar.xz/doc/README Added

_service:tar_scm:nasm-2.16.03.tar.xz/doc/afmmetrics.ph Added

@@ -0,0 +1,102 @@
+#!/usr/bin/perl
+## --------------------------------------------------------------------------
+##
+##   Copyright 1996-2017 The NASM Authors - All Rights Reserved
+##   See the file AUTHORS included with the NASM distribution for
+##   the specific copyright holders.
+##
+##   Redistribution and use in source and binary forms, with or without
+##   modification, are permitted provided that the following
+##   conditions are met:
+##
+##   * Redistributions of source code must retain the above copyright
+##     notice, this list of conditions and the following disclaimer.
+##   * Redistributions in binary form must reproduce the above
+##     copyright notice, this list of conditions and the following
+##     disclaimer in the documentation and/or other materials provided
+##     with the distribution.
+##
+##     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+##     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+##     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+##     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+##     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+##     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+##     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+##     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+##     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+##     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+##     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+##     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+##     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+##
+## --------------------------------------------------------------------------
+
+#
+# Parse AFM metric file, returns a reference to fontdata
+#
+sub parse_afm_file($$) {
+    my($filename, $filetype) = @_;
+
+    my $fontdata = {
+	widths => {},
+	kern => {}
+    };
+
+    my $charmetrics = 0;
+    my $kerndata = 0;
+    my $charcode, $width, $name;
+
+    my $fontfile = $filename.'.'.$filetype;
+    return undef unless ( -f $fontfile );
+
+    $fontdata->{file} = $fontfile;
+    $fontdata->{type} = $filetype;
+    $fontdata->{scale} = 1000;	# AFM metrics always have scale 1000
+
+    return undef unless (open(my $fh, '<', $filename.'.afm'));
+
+    while ( my $line = <$fh> ) {
+	if ( $line =~ /^\s*FontName\s+(.*)\s*$/i ) {
+	    $fontdata->{'name'} = $1;
+	} elsif ( $line =~ /^\s*StartCharMetrics\b/i ) {
+	    $charmetrics = 1;
+	} elsif ( $line =~ /^\s*EndCharMetrics\b/i ) {
+	    $charmetrics = 0;
+	} elsif ( $line =~ /^\s*StartKernPairs\b/i ) {
+	    $kerndata = 1;
+	} elsif ( $line =~ /^\s*EndKernPairs\b/i ) {
+	    $kerndata = 0;
+	} elsif ( $charmetrics ) {
+	    my @data = split(/\s*;\s*/, $line);
+	    undef $charcode, $width, $name;
+	    foreach my $d ( @data ) {
+		my @dd = split(/\s+/, $d);
+		if ( $dd0 eq 'C' ) {
+		    $charcode = $dd1;
+		} elsif ( $dd0 eq 'WX' ) {
+		    $width = $dd1;
+		} elsif ( $dd0 eq 'W' ) {
+		    $width = $dd2;
+		} elsif ( $dd0 eq 'N' ) {
+		    $name = $dd1;
+		}
+	    }
+	    if ( defined($name) && defined($width) ) {
+		$fontdata->{widths}{$name} = $width;
+	    }
+	} elsif ( $kerndata ) {
+	    my($kpx, $a, $b, $adj) = split(/\s+/, $line);
+	    if ( $kpx eq 'KPX' ) {
+		if (!exists($fontdata->{kern}{$a})) {
+		    $fontdata->{kern}{$a} = {};
+		}
+		$fontdata->{kern}{$a}{$b} = $adj;
+	    }
+	}
+    }
+
+    return $fontdata;
+}
+
+1;

_service:tar_scm:nasm-2.16.03.tar.xz/doc/changes.src Added

@@ -0,0 +1,3115 @@
+\#
+\# NASM revision history in nasmdoc format
+\#
+
+\H{cl-2.xx} NASM 2 Series
+
+The NASM 2 series supports x86-64, and is the production version of NASM
+since 2007.
+
+\S{cl-2.16.02} Version 2.16.03
+
+\e{This is a source build machinery and documentation update
+only. There are no functionality changes.}
+
+\b Fix building from \c{git} in a separate directory from the source.
+
+\b Remove some irrelevant files from the source distribution.
+
+\b Make the documentation stronger that \c{-O0} or \c{-O1} are
+probably not what the user wants. See \k{opt-O}.
+
+\b Fix \c{configure --enable-lto} build option.
+
+\b Update the included RPM \c{.spec} file.
+
+\S{cl-2.16.02} Version 2.16.02
+
+\b Fix building from the source distribution in a separate directory
+from the source.
+
+\b Fix a number of issues when building from source, mostly involving
+\c{configure} or dependency generation.
+
+\> In particular, more aggressively avoid cross-compilation problems
+on Unix/Linux systems automatically invoking WINE. We could end up
+invoking WINE even when we didn't want to, making \c{configure} think
+it was running native when in fact cross-compiling.
+
+\b Hopefully fix compiling with the latest versions of MSVC/nmake.
+
+\b Windows host: add embedded manifest file. Without a manifest,
+Windows applications force a fixed \c{PATH_MAX} limit to any pathname;
+this is unnecessary.
+
+\b Add support VEX-encoded SM4-NI instructions.
+
+\b Add support for VEX-encoded SM3-NI instructions.
+
+\b Add support for VEX-encoded SHA512-NI instructions.
+
+\b \c{PTWRITE} opcode corrected (\c{F3} prefix required.)
+
+\b Disassembler: the SMAP instructions are \c{NP}; notably the
+prefixed versions of \c{CLAC} are \c{ERETU}/\c{ERETS}.
+
+\b Add support for Flexible Return and Exception Delivery (FRED): the
+\c{LKGS}, \c{ERETS} and \c{ERETU} instructions.
+
+\b Fix external references to segments in the \c{obj} (OMF) and
+possibly other output formats.
+
+\b Always support up to 8 characters, i.e. 64 bits, in a
+string-to-numeric conversion.
+
+\b Preprocessor: add \c{%map()} function to expand a macro from a list of
+arguments, see \k{f_map}.
+
+\b Preprocessor: allow the user to specify the desired radix for an
+evaluated parameter. It doesn't make any direct difference, but can be
+nice for debugging or turning into strings. See the \c{=} modifier in
+\k{define}.
+
+\b Update documentation: \c{__USE_}\e{package}\c{__} is now
+\c{__?USE_}\e{package}\c{?__}.
+
+\b Documentation: correct a minor problem in the expression grammar
+for \c{D}\e{x} statements, see \k{db}.
+
+\b Preprocessor: correctly handle empty \c{%rep} blocks.
+
+\b Preprocessor: add options for a base prefix to \c{%num()}, see \k{f_num}.
+
+\b Preprocessor: add a \c{%hex()} function, equivalent to \c{%eval()}
+except that it producess hexadecimal values that are nevertheless
+valid NASM numeric constants, see \k{f_hex}.
+
+\b Preprocessor: fix the parameter number in error messages (should be
+1-based, like \c{%}\e{num} references to multi-line macro arguments.)
+
+\b Documentation: be more clear than the \c{bin} format is simply a
+linker built into NASM. See \k{binfmt}.
+
+\b Adjust the \c{LOCK} prefix warning for \c{XCHG}.
+
+\> \c{LOCK XCHG }\e{reg}\c{,}\e{mem} would issue a warning for being
+unlockable, which is incorrect. In this case the \e{reg}\c{,}\e{mem}
+encoding is simply an alias for the \e{mem}\c{,}\e{reg} encoding. However,
+\c{XCHG} is \e{always} locked, so create a new warning
+(\c{-w+prefix-lock-xchg}) to explicitly flag a user-specified \c{LOCK
+XCHG}; default off. Future versions of NASM may remove the \c{LOCK}
+prefix when optimization is enabled.
+
+\b Fix broken dependency-list generation.
+
+\b Add optional warnings for specific relocation types
+(\c{-w+reloc-*}, see \k{warnings}), default off.
+
+\> Some target environments may have specific restrictions on what
+kinds of relocations are possible or allowed.
+
+\b Error out on certain bad syntax in \c{D}\e{x} statements, such as
+\c{db 1 2}. See \k{db}.
+
+\S{cl-2.16.01} Version 2.16.01
+
+\e{This is a documentation update release only. There are no
+functionality changes.}
+
+\b Fix the creation of the table of contents in the HTML version of
+the documentation.
+
+\S{cl-2.16} Version 2.16
+
+\b Support for the \c{rdf} format has been discontinued and all the
+RDOFF utilities has been removed.
+
+\b The \c{--reproducible} option now leaves the filename field in the
+COFF object format blank. This was always rather useless since it is
+only 18 characters long; as such debug formats have to carry their own
+filename information anyway.
+
+\b Fix handling of MASM-syntax reserved memory (e.g. \c{dw ?}) when
+used in structure definitions.
+
+\b The preprocessor now supports functions, which can be less verbose
+and more convenient than the equivalent code implemented using
+directives. See \k{ppfunc}.
+
+\b Fix the handling of \c{%00} in the preprocessor.
+
+\b Fix incorrect handling of path names affecting error messages,
+dependency generation, and debug format output.
+
+\b Support for the RDOFF output format and the RDOFF tools have been
+removed. The RDOFF tools had already been broken since at least NASM
+2.14. For flat code the ELF output format recommended; for segmented
+code the \c{obj} (OMF) output format.
+
+\b New facility: preprocessor functions. Preprocessor functions, which
+are expanded similarly to single-line macros, can greatly simplify
+code that in the past would have required a lengthy list of directives
+and intermediate macros. See \k{ppfunc}.
+
+\b Single-line macros can now declare parameters (using a \c{&&}
+prefix) that creates a quoted string, but does \e{not} requote an
+already quoted string. See \k{define}.
+
+\b Instruction table updated per public information available as of
+November 2022.
+
+\b All warnings in the preprocessor have now been assigned warning
+classes. See \k{warnings}.
+
+\b Fix the invalid use of \c{RELA}-type relocations instead of
+\c{REL}-type relocations when generating DWARF debug information for
+the \c{elf32} output format.
+
+\b Fix the handling \c{at} in \c{istruc} when the structure contains
+local labels. See \k{istruc}.
+
+\b When assembling with \c{--reproducible}, don't encode the filename
+in the COFF header for the \c{coff}, \c{win32} or \c{win64} output
+formats. The COFF header only has space for an 18-character filename,
+which makes this field rather useless in the first place. Debug output
+data, if enabled, is not affected.
+
+\b Fix incorrect size calculation when using MASM syntax for non-byte
+reservations (e.g. \c{dw ?}.)
+
+\b Allow forcing an instruction in 64-bit mode to have a (possibly
+redundant) REX prefix, using the syntax \i\c{\{rex\}} as a prefix.
+
+\b Add a \c{\{vex\}} prefix to enforce VEX (AVX) encoding of an
+instruction, either using the 2- or 3-byte VEX prefixes.
+
+\b The \c{CPU} directive has been augmented to allow control of
+generation of VEX (AVX) versus EVEX (AVX-512) instruction formats, see
+\k{CPU}.
+
+\b Some recent instructions that previously have been only available
+using EVEX encodings are now also encodable using VEX (AVX)
+encodings. For backwards compatibility these encodings are not enabled
+by default, but can be generated either via an explicit \c{\{vex\}}
+prefix or by specifying either \c{CPU LATEVEX} or \c{CPU NOEVEX}; see
+\k{CPU}.
+
+\b Document the already existing \c{%unimacro} directive. See \k{unmacro}.
+
+\b Fix a code range generation bug in the DWARF debug format
+(incorrect information in the \c{DW_AT_high_pc} field) for the ELF
+output formats. This bug happened to cancel out with a bug in older
+versions of the GNU binutils linker, but breaks with other linkers and
+updated or other linkers that expect the spec to be followed.
+
+\b Fix segment symbols with addends, e.g. \c{jmp _TEXT+10h:0} in
+output formats that support segment relocations, e.g. the \c{obj}
+format.
+
+\b Fix various crashes and hangs on invalid input.
+
+
+\S{cl-2.15.05} Version 2.15.05
+
+\b Fix \c{%ifid $} and \c{%ifid $$} incorrectly being treated as
+true. See \k{iftyp}.
+
+\b Add \c{--reproducible} option to suppress NASM version numbers and
+timestamps in output files. See \k{opt-reproducible}.
+
+\S{cl-2.15.04} Version 2.15.04
+
+\b More sensible handling of the case where one single-line macro
+definition will shadow another. A warning will be issued, but the
+additional definition will be allowed. For the existing error case
+where both a parameterless and parametered macro are created, that
+warning is promoted to an error by default.
+
+\b Add special preprocessor tokens \c{%*?} and \c{%*??} that expand
+like \c{%?} and \c{%??} in single-line macros only. See
+\k{selfref%*?}.
+
+\b Correct the encoding of the \c{ENQCMDS} and \c{TILELOADT1}
+instructions.
+
+\b Fix case where the COFF backend (the \c{coff}, \c{win32} and
+\c{win64} output formats) would add padding bytes in the middle of a
+section if a \c{SECTION}/\c{SEGMENT} directive was provided which
+repeated an \c{ALIGN=} attribute. This neither matched legacy
+behavior, other backends, or user expectations.
+
+\b Fix SSE instructions not being recognized with an explicit memory
+operation size (e.g. \c{movsd qword eax,xmm0}).
+
+\b The \c{-L+} option no longer enables \c{-Lw}, which is mainly
+useful to debug NASM crashes. See \k{opt-L}.
+
+\b Document long-standing hazards in the use of \c{$} in \c{D}\e{x}
+statements, see \k{db}.
+
+\b The NASM-only RDOFF output format backend, which has been broken
+since at least NASM 2.14, has been disabled. The RDOFF tools are
+scheduled to be removed from the NASM distribution in NASM 2.16. If
+you have a concrete use case for RDOFF, please file a NASM bug report
+at \W{https://bugs.nasm.us/}\c{https://bugs.nasm.us/} as soon as
+possible.
+
+\S{cl-2.15.03} Version 2.15.03
+
+\b Add instructions from the Intel Instruction Set Extensions and
+Future Features Programming Reference, June 2020. This includes
+AVX5512 \c{bfloat16}, AVX512 mask intersect, and Intel Advanced Matrix
+Extensions (AMX).
+
+\b Support for \c{bfloat16} floating-point constants. See \k{fltconst}
+and \k{pkg_fp}.
+
+\b Properly display warnings in preprocess-only mode.
+
+\b Fix copy-and-paste of examples from the PDF documentation.
+
+\b Debug information now properly reflect the line numbers of macro
+invocations (unless declared \c{.nolist}).
+
+\b Fix excessive alignment of sections in the
+\c{coff}/\c{win32}/\c{win64} output formats when the user-specified
+alignment is less than the default alignment for the section or
+section type.
+
+\b Fix explicit token pasting (\c{%+}, \k{concat%+}) for the cases
+where one or more parts result from empty token expansion, resulting
+in \c{%+} tokens at the beginning or end, or multiple ones in a row.
+
+\b Fix macro label capture (\c{%00}, \k{percent00}).
+
+\b Much better documentation for the MASM compatibility package,
+\c{%use masm} (see \k{pkg_masm}).
+
+\b Fix \c{LEA} without square brackets, for MASM compatibility.
+
+\b Portability fixes.
+
+\S{cl-2.15.02} Version 2.15.02
+
+\b Fix miscompilation when building with \c{clang}.
+
+\b Add \c{db-empty} warning class, see \k{opt-w}.
+
+\b Fix the dependencies in the MSVC NMAKE makefile (\c{Mkfiles/msvc.mak}).
+
+\b Some documentation improvements and cleanups.
+
+\b Fix the handling of macro parameter ranges (\c{%\{:\}}), including
+with brace-enclosed original arguments.
+
+\S{cl-2.15.01} Version 2.15.01
+
+\b Fix building the documentation from the release archive. For 2.15,
+the user has to do \c{make warnings} manually in the main directory in
+order to be able to build the documentation, which means Perl needs to
+be installed on the system.
+
+\b Add instructions for Intel Control Flow Enforcement Technology (CET).
+
+\S{cl-2.15} Version 2.15
+
+\b The comparison and booleanizing operators can now be used in any
+expression context, not just \c{%if}. See \k{expr}.
+
+\b New operator \c{?} ... \c{:}.  See \k{exptri}.
+
+\b Signed shift operators \c{<<<} and \c{>>>}.  See \k{expshift}.
+
+\b The MASM \c{DUP} syntax for data definitions is now supported, in a
+somewhat enhanced form. See \k{db}.
+
+\b Warn for strange legacy behavior regarding empty arguments in
+multi-line macro expansion, but try to match legacy behavior in most
+cases. Legacy behavior can be disabled with the directive \c{%pragma
+preproc sane_empty_expansion}, see \k{mlmacro} and
+\k{pragma-preproc}.
+
+\b A much more sensible limit to expression evaluation depth. The
+previously defined limit would rarely trigger before NASM died with a
+stack overrun error on most systems. See \k{opt-limit}.
+
+\b The state of warnings can now be saved and restored via the
+\c{WARNING PUSH} and \c{WARNING POP} directives. See
+\k{asmdir-warning}.
+
+\b The \c{sectalign on|off} switch does not affect an explicit directive. See
+\k{sectalign}.
+
+\b Added \c{configure} option to enable building with profiling
+(\c{--enable-profiling}).
+
+\b Attempt to support of long path names, up to 32767 of UTF-16
+characters, on Windows.
+
+\b Fixed 'mismatch in operand sizes' error in the \c{MOVDDUP},
+\c{CMPXCHG8B} and \c{CMPXCHG16B} instructions.
+
+\b Improved error messages in the string transformation routine.
+
+\b Removed obsolete \c{gnu-elf-extensions} warning about 8- and 16-bit
+relocation generation. See \k{elf16}
+
+\b Added group aliases for all prefixed warnings. See \k{opt-w}.
+
+\b Allowed building with MSVC versions older than 1700.
+
+\b Added implicitly sized versions of the \c{K...} instructions, which
+allows the \c{K...} instructions to be specified without a size suffix as
+long as the operands are sized.
+
+\b Added \c{-L} option for additional listing information. See \k{opt-L}.
+
+\b Added some warnings for obsolete instructions for a specified CPU.
+
+\b Deprecated \c{-hf} and \c{-y} options. Use \c{-h} instead.
+
+\b Made DWARF as the default debug format for ELF.
+
+\b Added \c{%pragma list} \e{options...} to set or clear listing options
+(see \c{opt-L}).
+
+\b Allowed immediate syntax for \c{LEA} instruction (ignore operand
+size completely).
+
+\b Added limited functionality MASM compatibility package. See
+\k{pkg_masm}.
+
+\b Add single-line macros aliases using \c{%defalias} or
+\c{%idefalias}. These behave like a kind of "symbolic links" for
+single-line macros. See \k{defalias} and \c{clear}.
+
+\b Added support for stringify, nostrip, evaluating, and greedy
+single-line macro arguments. See \k{define}.
+
+\b Unused single-line macro arguments no longer need to have a
+specified name. See \k{define}.
+
+\b Added conditional comma operator \c{%,}. See \k{cond-comma}.
+
+\b Changed private namespace from \c{__foo__} to \c{__?foo?__}, so a user
+namespace starting from underscore is now clean from symbols. For
+backwards compatibility, the previous names are defined as aliases; see
+\k{defalias}, \k{clear} and \k{stdmac}.
+
+\b Added support of ELF weak symbols and external references. See \k{elfglob}.
+
+\b Changed the behavior of the EXTERN keyword and introduced REQUIRED keyword.
+See \k{required}.
+
+\b Added \c{%ifusable} and \c{%ifusing} directives. See \k{macropkg}.
+
+\b Made various performance improvements and stability fixes in macro
+preprocessor engine.
+
+\b Improved NASM error handling and cleaned up error messages.
+
+\b Many, many bug fixes.
+
+\S{cl-2.14.03} Version 2.14.03
+
+\b Suppress nuisance "\c{label changed during code generation}" messages
+after a real error.
+
+\b Add support for the \c{merge} and \c{strings} attributes on ELF
+sections. See \k{elfsect}.
+
+\b Add support for the \c{note}, \c{preinit_array}, \c{init_array},
+and \c{fini_array} sections type in ELF. See \k{elfsect}.
+
+\b Handle more than 32,633 sections in ELF.
+
+\S{cl-2.14.02} Version 2.14.02
+
+\b Fix crash due to multiple errors or warnings during the code
+generation pass if a list file is specified.
+
+\S{cl-2.14.01} Version 2.14.01
+
+\b Create all system-defined macros before processing command-line
+given preprocessing directives (\c{-p}, \c{-d}, \c{-u}, \c{--pragma},
+\c{--before}).
+
+\b If debugging is enabled, define a \c{__DEBUG_FORMAT__} predefined
+macro.  See \k{dfmtm}.
+
+\b Fix an assert for the case in the \c{obj} format when a \c{SEG}
+operator refers to an \c{EXTERN} symbol declared further down in the
+code.
+
+\b Fix a corner case in the floating-point code where a binary, octal
+or hexadecimal floating-point having at least 32, 11, or 8 mantissa
+digits could produce slightly incorrect results under very specific
+conditions.
+
+\b Support \c{-MD} without a filename, for \c{gcc}
+compatibility. \c{-MF} can be used to set the dependencies output
+filename. See \k{opt-MD}.
+
+\b Fix \c{-E} in combination with \c{-MD}. See \k{opt-E}.
+
+\b Fix missing errors on redefined labels; would cause convergence
+failure instead which is very slow and not easy to debug.
+
+\b Duplicate definitions of the same label \e{with the same value} is now
+explicitly permitted (2.14 would allow it in some circumstances.)
+
+\b Add the option \c{--no-line} to ignore \c{%line} directives in the
+source. See \k{opt-no-line} and \k{line}.
+
+\S{cl-2.14} Version 2.14
+
+\b Changed \c{-I} option semantics by adding a trailing path separator
+   unconditionally.
+
+\b Fixed null dereference in corrupted invalid single line macros.
+
+\b Fixed division by zero which may happen if source code is malformed.
+
+\b Fixed out of bound access in processing of malformed segment override.
+
+\b Fixed out of bound access in certain \c{EQU} parsing.
+
+\b Fixed buffer underflow in float parsing.
+
+\b Added \c{SGX} (Intel Software Guard Extensions) instructions.
+
+\b Added \c{+n} syntax for multiple contiguous registers.
+
+\b Fixed \c{subsections_via_symbols} for \c{macho} object format.
+
+\b Added the \c{--gprefix}, \c{--gpostfix}, \c{--lprefix}, and
+\c{--lpostfix} command line options, to allow command line base symbol
+renaming. See \k{opt-pfix}.
+
+\b Allow label renaming to be specified by \c{%pragma} in addition to
+from the command line.  See \k{mangling}.
+
+\b Supported generic \c{%pragma} namespaces, \c{output} and \c{debug}. See
+\k{pragma}.
+
+\b Added the \c{--pragma} command line option to inject a \c{%pragma}
+directive.  See \k{opt-pragma}.
+
+\b Added the \c{--before} command line option to accept preprocess
+statement before input. See \k{opt-before}.
+
+\b Added \c{AVX512} \c{VBMI2} (Additional Bit Manipulation), \c{VNNI} (Vector
+Neural Network), \c{BITALG} (Bit Algorithm), and \c{GFNI} (Galois Field New
+Instruction) instructions.
+
+\b Added the \c{STATIC} directive for local symbols that should be
+renamed using global-symbol rules. See \k{static}.
+
+\b Allow a symbol to be defined as \c{EXTERN} and then later
+overridden as \c{GLOBAL} or \c{COMMON}. Furthermore, a symbol declared
+\c{EXTERN} and then defined will be treated as \c{GLOBAL}. See \k{extern}.
+
+\b The \c{GLOBAL} directive no longer is required to precede the
+definition of the symbol.
+
+\b Support \c{private_extern} as \c{macho} specific extension to the
+\c{GLOBAL} directive. See \k{macho-pext}.
+
+\b Updated \c{UD0} encoding to match with the specification
+
+\b Added the \c{--limit-X} command line option to set execution
+limits. See \k{opt-limit}.
+
+\b Updated the \c{Codeview} version number to be aligned with \c{MASM}.
+
+\b Added the \c{--keep-all} command line option to preserve output
+files. See \k{opt-keep-all}.
+
+\b Added the \c{--include} command line option, an alias to \c{-P} (\k{opt-p}).
+
+\b Added the \c{--help} command line option as an alias to \c{-h} (\k{syntax}).
+
+\b Added \c{-W}, \c{-D}, and \c{-Q} suffix aliases for \c{RET}
+   instructions so the operand sizes of these instructions can be
+   encoded without using \c{o16}, \c{o32} or \c{o64}.
+
+\S{cl-2.13.03} Version 2.13.03
+
+\b Added AVX and AVX512 \c{VAES*} and \c{VPCLMULQDQ} instructions.
+
+\b Fixed missing dwarf record in x32 ELF output format.
+
+\S{cl-2.13.02} Version 2.13.02
+
+\b Fix false positive in testing of numeric overflows.
+
+\b Fix generation of \c{PEXTRW} instruction.
+
+\b Fix \c{smartalign} package which could trigger an error during
+   optimization if the alignment code expanded too much due to
+   optimization of the previous code.
+
+\b Fix a case where negative value in \c{TIMES} directive causes
+   panic instead of an error.
+
+\b Always finalize \c{.debug_abbrev} section with a null in
+   \c{dwarf} output format.
+
+\b Support \c{debug} flag in section attributes for \c{macho}
+   output format.  See \k{machosect}.
+
+\b Support up to 16 characters in section names for \c{macho}
+   output format.
+
+\b Fix missing update of global \c{BITS} setting if \c{SECTION}
+   directive specified a bit size using output format-specific
+   extensions (e.g. \c{USE32} for the \c{obj} output format.)
+
+\b Fix the incorrect generation of VEX-encoded instruction when static
+   mode decorators are specified on scalar instructions, losing the
+   decorators as they require EVEX encoding.
+
+\b Option \c{-MW} to quote dependency outputs according to Watcom
+   Make conventions instead of POSIX Make conventions.  See \k{opt-MW}.
+
+\b The \c{obj} output format now contains embedded dependency file
+   information, unless disabled with \c{%pragma obj nodepend}.  See
+   \k{objdepend}.
+
+\b Fix generation of dependency lists.
+
+\b Fix a number of null pointer reference and memory allocation errors.
+
+\b Always generate symbol-relative relocations for the \c{macho64}
+   output format; at least some versions of the XCode/LLVM linker fails
+   for section-relative relocations.
+
+\S{cl-2.13.01} Version 2.13.01
+
+\b Fix incorrect output for some types of \c{FAR} or \c{SEG}
+   references in the \c{obj} output format, and possibly other 16-bit
+   output formats.
+
+\b Fix the address in the list file for an instruction containing a
+   \c{TIMES} directive.
+
+\b Fix error with \c{TIMES} used together with an instruction which
+   can vary in size, e.g. \c{JMP}.
+
+\b Fix breakage on some uses of the \c{DZ} pseudo-op.
+
+\S{cl-2.13} Version 2.13
+
+\b Support the official forms of the \c{UD0} and \c{UD1} instructions.
+
+\b Allow self-segment-relative expressions in immediates and
+   displacements, even when combined with an external or otherwise
+   out-of-segment special symbol, e.g.:
+
+\c      extern foo
+\c      mov eax,foo - $ + ebx               ; Now legal
+
+\b Handle a 64-bit origin in NDISASM.
+
+\b NASM can now generate sparse output files for relevant output
+   formats, if the underlying operating system supports them.
+
+\b The \c{macho} object format now supports the \c{subsections_via_symbols}
+   and \c{no_dead_strip} directives, see \k{macho-ssvs}.
+
+\b The \c{macho} object format now supports the \c{no_dead_strip},
+  \c{live_support} and \c{strip_static_syms} section flags, see
+  \k{machosect}.
+
+\b The \c{macho} object format now supports the \c{dwarf} debugging
+  format, as required by newer toolchains.
+
+\b All warnings can now be suppressed if desired; warnings not
+   otherwise part of any warning class are now considered its own
+   warning class called \c{other} (e.g. \c{-w-other}).  Furthermore,
+   warning-as-error can now be controlled on a per warning class
+   basis, using the syntax \c{-w+error=}\e{warning-class} and its
+   equivalent for all other warning control options.  See \k{opt-w}
+   for the command-line options and warning classes and
+   \k{asmdir-warning} for the \c{WARNING} directive.
+
+\b Fix a number of bugs related to AVX-512 decorators.
+
+\b Significant improvements to building NASM with Microsoft Visual
+   Studio via \c{Mkfiles/msvc.mak}.  It is now possible to build the
+   full Windows installer binary as long as the necessary
+   prerequisites are installed; see \c{Mkfiles/README}
+
+\b To build NASM with custom modifications (table changes) or from the
+   git tree now requires Perl 5.8 at the very minimum, quite possibly
+   a higher version (Perl 5.24.1 tested.)  There is no requirement to
+   have Perl on your system at all if all you want to do is build
+   unmodified NASM from source archives.
+
+\b Fix the \c{\{z\}} decorator on AVX-512 \c{VMOVDQ*} instructions.
+
+\b Add new warnings for certain dangerous constructs which never ought
+   to have been allowed.  In particular, the \c{RES}\e{x} family of
+   instructions should have been taking a critical expression all
+   along.
+
+\b Fix the EVEX (AVX-512) versions of the \c{VPBROADCAST}, \c{VPEXTR},
+   and \c{VPINSR} instructions.
+
+\b Support contracted forms of additional instructions.  As a general
+   rule, if an instruction has a non-destructive source immediately
+   after a destination register that isn't used as an input, NASM
+   supports omitting that source register, using the destination
+   register as that value.  This among other things makes it easier to
+   convert SSE code to the equivalent AVX code:
+
+\c      addps xmm1,xmm0                       ; SSE instruction
+\c      vaddps ymm1,ymm1,ymm0                 ; AVX official long form
+\c      vaddps ymm1,ymm0                      ; AVX contracted form
+
+\b Fix Codeview malformed compiler version record.
+
+\b Add the \c{CLWB} and \c{PCOMMIT} instructions.  Note that the
+   \c{PCOMMIT} instruction has been deprecated and will never be
+   included in a shipping product; it is included for completeness
+   only.
+
+\b Add the \c{%pragma} preprocessor directive for soft-error directives.
+
+\b Add the \c{RDPID} instruction.
+
+\S{cl-2.12.02} Version 2.12.02
+
+\b Fix preprocessor errors, especially \c{%error} and \c{%warning},
+   inside \c{%if} statements.
+
+\b Fix relative relocations in 32-bit Mach-O.
+
+\b More Codeview debug format fixes.
+
+\b If the MASM \c{PTR} keyword is encountered, issue a warning.  This is
+   much more likely to indicate a MASM-ism encountered in NASM than it
+   is a valid label.  This warning can be suppressed with \c{-w-ptr},
+   the \c{warning} directive (see \k{opt-w}) or by the macro
+   definition \c{%idefine ptr $%?} (see \k{selfref%?}).
+
+\b When an error or a warning comes from the expansion of a multi-line
+   macro, display the file and line numbers for the expanded macros.
+   Macros defined with \c{.nolist} do not get displayed.
+
+\b Add macros \c{ilog2fw()} and \c{ilog2cw()} to the \c{ifunc} macro
+   package.  See \k{ilog2}.
+
+
+\S{cl-2.12.01} Version 2.12.01
+
+\b Portability fixes for some platforms.
+
+\b Fix error when not specifying a list file.
+
+\b Correct the handling of macro-local labels in the Codeview
+   debugging format.
+
+\b Add \c{CLZERO}, \c{MONITORX} and \c{MWAITX} instructions.
+
+
+\S{cl-2.12} Version 2.12
+
+\b Major fixes to the \c{macho} backend (\k{machofmt}); earlier versions
+   would produce invalid symbols and relocations on a regular basis.
+
+\b Support for thread-local storage in Mach-O.
+
+\b Support for arbitrary sections in Mach-O.
+
+\b Fix wrong negative size treated as a big positive value passed into
+   backend causing NASM to crash.
+
+\b Fix handling of zero-extending unsigned relocations, we have been printing
+   wrong message and forgot to assign segment with predefined value before
+   passing it into output format.
+
+\b Fix potential write of oversized (with size greater than allowed in
+   output format) relative relocations.
+
+\b Portability fixes for building NASM with the LLVM compiler.
+
+\b Add support of Codeview version 8 (\c{cv8}) debug format for
+   \c{win32} and \c{win64} formats in the \c{COFF} backend,
+   see \k{codeview}.
+
+\b Allow 64-bit outputs in 16/32-bit only backends.  Unsigned 64-bit
+   relocations are zero-extended from 32-bits with a warning
+   (suppressible via \c{-w-zext-reloc}); signed 64-bit relocations are
+   an error.
+
+\b Line numbers in list files now correspond to the lines in the source
+   files, instead of simply being sequential.
+
+\b There is now an official 64-bit (x64 a.k.a. x86-64) build for Windows.
+
+
+\S{cl-2.11.09} Version 2.11.09
+
+\b Fix potential stack overwrite in \c{macho32} backend.
+
+\b Fix relocation records in \c{macho64} backend.
+
+\b Fix symbol lookup computation in \c{macho64} backend.
+
+\b Adjust \c{.symtab} and \c{.rela.text} sections alignments to 8 bytes
+   in \c{elf64} backed.
+
+\b Fix section length computation in \c{bin} backend which leaded in incorrect
+   relocation records.
+
+\S{cl-2.11.08} Version 2.11.08
+
+\b Fix section length computation in \c{bin} backend which leaded in incorrect
+   relocation records.
+
+\b Add a warning for numeric preprocessor definitions passed via command
+   line which might have unexpected results otherwise.
+
+\b Add ability to specify a module name record in \c{rdoff} linker with
+   \c{-mn} option.
+
+\b Increase label length capacity up to 256 bytes in \c{rdoff} backend for
+   FreePascal sake, which tends to generate very long labels for procedures.
+
+\b Fix segmentation failure when rip addressing is used in \c{macho64} backend.
+
+\b Fix access on out of memory when handling strings with a single
+   grave. We have sixed similar problem in previous release but not
+   all cases were covered.
+
+\b Fix NULL dereference in disassembled on \c{BND} instruction.
+
+\S{cl-2.11.07} Version 2.11.07
+
+\b Fix 256 bit \c{VMOVNTPS} instruction.
+
+\b Fix \c{-MD} option handling, which was rather broken in previous
+release changing command line api.
+
+\b Fix access to uninitialized space when handling strings with
+a single grave.
+
+\b Fix nil dereference in handling memory reference parsing.
+
+\S{cl-2.11.06} Version 2.11.06
+
+\b Update AVX512 instructions based on the Extension Reference (319433-021 Sept
+2014).
+
+\b Fix the behavior of \c{-MF} and \c{-MD} options (Bugzilla 3392280)
+
+\b Updated Win32 Makefile to fix issue with build
+
+\S{cl-2.11.05} Version 2.11.05
+
+\b Add \c{--v} as an alias for \c{-v} (see \k{opt-v}), for
+command-line compatibility with Yasm.
+
+\b Fix a bug introduced in 2.11.03 whereby certain instructions would
+contain multiple REX prefixes, and thus be corrupt.
+
+\S{cl-2.11.04} Version 2.11.04
+
+\b Removed an invalid error checking code. Sometimes a memref only with
+a displacement can also set an evex flag. For example:
+
+\c       vmovdqu32 0xabcd{k1}, zmm0
+
+\b Fixed a bug in disassembler that EVEX.L'L vector length was not matched
+when EVEX.b was set because it was simply considered as EVEC.RC.
+Separated EVEX.L'L case from EVEX.RC which is ignored in matching.
+
+\S{cl-2.11.03} Version 2.11.03
+
+\b Fix a bug there REX prefixes were missing on instructions inside a
+\c{TIMES} statement.
+
+\S{cl-2.11.02} Version 2.11.02
+
+\b Add the \c{XSAVEC}, \c{XSAVES} and \c{XRSTORS} family instructions.
+
+\b Add the \c{CLFLUSHOPT} instruction.
+
+\S{cl-2.11.01} Version 2.11.01
+
+\b Allow instructions which implicitly uses \c{XMM0} (\c{VBLENDVPD},
+\c{VBLENDVPS}, \c{PBLENDVB} and \c{SHA256RNDS2}) to be specified
+without an explicit \c{xmm0} on the assembly line.  In other words,
+the following two lines produce the same output:
+
+\c      vblendvpd xmm2,xmm1,xmm0      ; Last operand is fixed xmm0
+\c      vblendvpd xmm2,xmm1           ; Implicit xmm0 omitted
+
+\b In the ELF backends, don't crash the assembler if \c{section align}
+is specified without a value.
+
+\S{cl-2.11} Version 2.11
+
+\b Add support for the Intel AVX-512 instruction set:
+
+\b 16 new, 512-bit SIMD registers. Total 32 \c{(ZMM0 ~ ZMM31)}
+
+\b 8 new opmask registers \c{(K0 ~ K7)}. One of 7 registers \c{(K1 ~ K7)} can
+be used as an opmask for conditional execution.
+
+\b A new EVEX encoding prefix. EVEX is based on VEX and provides more
+capabilities: opmasks, broadcasting, embedded rounding and compressed
+displacements.
+
+\c  - opmask
+\c      VDIVPD zmm0{k1}{z}, zmm1, zmm3  ; conditional vector operation
+\c                                      ; using opmask k1.
+\c                                      ; {z} is for zero-masking
+\c  - broadcasting
+\c      VDIVPS zmm4, zmm5, rbx{1to16} ; load single-precision float and
+\c                                      ; replicate it 16 times. 32 * 16 = 512
+\c  - embedded rounding
+\c      VCVTSI2SD xmm6, xmm7, {rz-sae}, rax ; round toward zero. note that it
+\c                                       ; is used as if a separate operand.
+\c                                       ; it comes after the last SIMD operand
+
+\b Add support for \c{ZWORD} (512 bits), \c{DZ} and \c{RESZ}.
+
+\b Add support for the MPX and SHA instruction sets.
+
+\b Better handling of section redefinition.
+
+\b Generate manpages when running \c{'make dist'}.
+
+\b Handle all token chains in mmacro params range.
+
+\b Support split base,index effective address:
+
+\c      mov eax,eax+8,ecx*4   ; eax=base, ecx=index, 4=scale, 8=disp
+
+This is expected to be most useful for the MPX instructions.
+
+\b Support \c{BND} prefix for branch instructions (for MPX).
+
+\b The \c{DEFAULT} directive can now take \c{BND} and \c{NOBND}
+options to indicate whether all relevant branches should be getting
+\c{BND} prefixes.  This is expected to be the normal for use in MPX
+code.
+
+\b Add \c{\{evex\}}, \c{\{vex3\}} and \c{\{vex2\}} instruction
+prefixes to have NASM encode the corresponding instruction, if
+possible, with an EVEX, 3-byte VEX, or 2-byte VEX prefix,
+respectively.
+
+\b Support for section names longer than 8 bytes in Win32/Win64 COFF.
+
+\b The \c{NOSPLIT} directive by itself no longer forces a single
+register to become an index register, unless it has an explicit
+multiplier.
+
+\c      mov eax,nosplit eax       ; eax as base register
+\c      mov eax,nosplit eax*1     ; eax as index register
+
+\S{cl-2.10.09} Version 2.10.09
+
+\b Pregenerate man pages.
+
+\S{cl-2.10.08} Version 2.10.08
+
+\b Fix \c{VMOVNTDQA}, \c{MOVNTDQA} and \c{MOVLPD} instructions.
+
+\b Fix collision for \c{VGATHERQPS}, \c{VPGATHERQD} instructions.
+
+\b Fix \c{VPMOVSXBQ}, \c{VGATHERQPD}, \c{VSPLLW} instructions.
+
+\b Add a bunch of AMD TBM instructions.
+
+\b Fix potential stack overwrite in numbers conversion.
+
+\b Allow byte size in \c{PREFETCHTx} instructions.
+
+\b Make manual pages up to date.
+
+\b Make \c{F3} and \c{F2} SSE prefixes to override \c{66}.
+
+\b Support of AMD SVM instructions in 32 bit mode.
+
+\b Fix near offsets code generation for \c{JMP}, \c{CALL} instrictions
+in long mode.
+
+\b Fix preprocessor parse regression when id is expanding to a whitespace.
+
+\S{cl-2.10.07} Version 2.10.07
+
+\b Fix line continuation parsing being broken in previous version.
+
+\S{cl-2.10.06} Version 2.10.06
+
+\b Always quote the dependency source names when using the automatic
+dependency generation options.
+
+\b If no dependency target name is specified via the \c{-MT} or
+\c{-MQ} options, quote the default output name.
+
+\b Fix assembly of shift operations in \c{CPU 8086} mode.
+
+\b Fix incorrect generation of explicit immediate byte for shift by 1
+under certain circumstances.
+
+\b Fix assembly of the \c{VPCMPGTQ} instruction.
+
+\b Fix RIP-relative relocations in the \c{macho64} backend.
+
+\S{cl-2.10.05} Version 2.10.05
+
+\b Add the \c{CLAC} and \c{STAC} instructions.
+
+\S{cl-2.10.04} Version 2.10.04
+
+\b Add back the inadvertently deleted 256-bit version of the \c{VORPD}
+instruction.
+
+\b Correct disassembly of instructions starting with byte \c{82} hex.
+
+\b Fix corner cases in token pasting, for example:
+
+\c    %define N 1e%++%+ 5
+\c            dd N, 1e+5
+
+\S{cl-2.10.03} Version 2.10.03
+
+\b Correct the assembly of the instruction:
+
+\c XRELEASE MOV absolute,AL
+
+\> Previous versions would incorrectly generate \c{F3 A2} for this
+instruction and issue a warning; correct behavior is to emit \c{F3 88
+05}.
+
+\S{cl-2.10.02} Version 2.10.02
+
+\b Add the \c{ifunc} macro package with integer functions, currently
+only integer logarithms.  See \k{pkg_ifunc}.
+
+\b Add the \c{RDSEED}, \c{ADCX} and \c{ADOX} instructions.
+
+\S{cl-2.10.01} Version 2.10.01
+
+\b Add missing VPMOVMSKB instruction with reg32, ymmreg operands.
+
+\S{cl-2.10} Version 2.10
+
+\b When optimization is enabled, \c{mov r64,imm} now optimizes to the
+  shortest form possible between:
+
+\c      mov r32,imm32                   ;  5 bytes
+\c      mov r64,imm32                   ;  7 bytes
+\c      mov r64,imm64                   ; 10 bytes
+
+\> To force a specific form, use the \c{STRICT} keyword, see \k{strict}.
+
+\b Add support for the Intel AVX2 instruction set.
+
+\b Add support for Bit Manipulation Instructions 1 and 2.
+
+\b Add support for Intel Transactional Synchronization Extensions (TSX).
+
+\b Add support for x32 ELF (32-bit ELF with the CPU in 64-bit mode.)
+   See \k{elffmt}.
+
+\b Add support for bigendian UTF-16 and UTF-32.  See \k{unicode}.
+
+\S{cl-2.09.10} Version 2.09.10
+
+\b Fix up NSIS script to protect uninstaller against registry keys
+   absence or corruption. It brings in a few additional questions
+   to a user during deinstallation procedure but still it is better
+   than unpredictable file removal.
+
+\S{cl-2.09.09} Version 2.09.09
+
+\b Fix initialization of section attributes of \c{bin} output format.
+
+\b Fix \c{mach64} output format bug that crashes NASM due to NULL symbols.
+
+
+\S{cl-2.09.08} Version 2.09.08
+
+\b Fix \c{__OUTPUT_FORMAT__} assignment when output driver alias
+   is used. For example when \c{-f elf} is used \c{__OUTPUT_FORMAT__}
+   must be set to \c{elf}, if \c{-f elf32} is used \c{__OUTPUT_FORMAT__}
+   must be assigned accordingly, i.e. to \c{elf32}. The rule applies to
+   all output driver aliases. See \k{ofmtm}.
+
+
+\S{cl-2.09.07} Version 2.09.07
+
+\b Fix attempts to close same file several times
+   when \c{-a} option is used.
+
+\b Fixes for VEXTRACTF128, VMASKMOVPS encoding.
+
+
+\S{cl-2.09.06} Version 2.09.06
+
+\b Fix missed section attribute initialization in \c{bin} output target.
+
+
+\S{cl-2.09.05} Version 2.09.05
+
+\b Fix arguments encoding for VPEXTRW instruction.
+
+\b Remove invalid form of VPEXTRW instruction.
+
+\b Add \c{VLDDQU} as alias for \c{VLDQQU} to
+   match specification.
+
+
+\S{cl-2.09.04} Version 2.09.04
+
+\b Fix incorrect labels offset for VEX instructions.
+
+\b Eliminate bogus warning on implicit operand size override.
+
+\b \c{%if} term could not handle 64 bit numbers.
+
+\b The COFF backend was limiting relocations number to 16 bits even if
+   in real there were a way more relocations.
+
+
+\S{cl-2.09.03} Version 2.09.03
+
+\b Print \c{%macro} name inside \c{%rep} blocks on error.
+
+\b Fix preprocessor expansion behaviour. It happened sometime
+   too early and sometime simply wrong. Move behaviour back to
+   the origins (down to NASM 2.05.01).
+
+\b Fix uninitialized data dereference on OMF output format.
+
+\b Issue warning on unterminated \c{%{} construct.
+
+\b Fix for documentation typo.
+
+
+\S{cl-2.09.02} Version 2.09.02
+
+\b Fix reversed tokens when \c{%deftok} produces more than one output token.
+
+\b Fix segmentation fault on disassembling some VEX instructions.
+
+\b Missing \c{%endif} did not always cause error.
+
+\b Fix typo in documentation.
+
+\b Compound context local preprocessor single line macro identifiers
+  were not expanded early enough and as result lead to unresolved
+  symbols.
+
+
+\S{cl-2.09.01} Version 2.09.01
+
+\b Fix NULL dereference on missed %deftok second parameter.
+
+\b Fix NULL dereference on invalid %substr parameters.
+
+
+\S{cl-2.09} Version 2.09
+
+\b Fixed assignment the magnitude of \c{%rep} counter. It is limited
+  to 62 bits now.
+
+\b Fixed NULL dereference if argument of \c{%strlen} resolves
+  to whitespace. For example if nonexistent macro parameter is used.
+
+\b \c{%ifenv}, \c{%elifenv}, \c{%ifnenv}, and \c{%elifnenv} directives
+  introduced.  See \k{ifenv}.
+
+\b Fixed NULL dereference if environment variable is missed.
+
+\b Updates of new AVX v7 Intel instructions.
+
+\b \c{PUSH imm32} is now officially documented.
+
+\b Fix for encoding the LFS, LGS and LSS in 64-bit mode.
+
+\b Fixes for compatibility with OpenWatcom compiler and DOS 8.3 file
+  format limitation.
+
+\b Macros parameters range expansion introduced. See \k{mlmacrange}.
+
+\b Backward compatibility on expanging of local single macros restored.
+
+\b 8 bit relocations for \c{elf} and \c{bin} output formats are introduced.
+
+\b Short intersegment jumps are permitted now.
+
+\b An alignment more than 64 bytes are allowed for \c{win32},
+  \c{win64} output formats.
+
+\b \c{SECTALIGN} directive introduced. See \k{sectalign}.
+
+\b \c{nojmp} option introduced in \c{smartalign} package. See
+  \k{pkg_smartalign}.
+
+\b Short aliases \c{win}, \c{elf} and \c{macho} for output formats are
+  introduced.  Each stands for \c{win32}, \c{elf32} and \c{macho32}
+  accordingly.
+
+\b Faster handling of missing directives implemented.
+
+\b Various small improvements in documentation.
+
+\b No hang anymore if unable to open malloc.log file.
+
+\b The environments without vsnprintf function are able to build nasm again.
+
+\b AMD LWP instructions updated.
+
+\b Tighten EA checks. We warn a user if there overflow in EA addressing.
+
+\b Make \c{-Ox} the default optimization level.  For the legacy
+  behavior, specify \c{-O0} explicitly.  See \k{opt-O}.
+
+\b Environment variables read with \c{%!} or tested with \c{%ifenv}
+  can now contain non-identifier characters if surrounded by quotes.
+  See \k{getenv}.
+
+\b Add a new standard macro package \c{%use fp} for floating-point
+  convenience macros.  See \k{pkg_fp}.
+
+
+\S{cl-2.08.02} Version 2.08.02
+
+\b Fix crash under certain circumstances when using the \c{%+} operator.
+
+
+\S{cl-2.08.01} Version 2.08.01
+
+\b Fix the \c{%use} statement, which was broken in 2.08.
+
+
+\S{cl-2.08} Version 2.08
+
+\b A number of enhancements/fixes in macros area.
+
+\b Support for converting strings to tokens.  See \k{deftok}.
+
+\b Fuzzy operand size logic introduced.
+
+\b Fix COFF stack overrun on too long export identifiers.
+
+\b Fix Macho-O alignment bug.
+
+\b Fix crashes with -fwin32 on file with many exports.
+
+\b Fix stack overrun for too long DEBUG id.
+
+\b Fix incorrect sbyte usage in IMUL (hit only if optimization
+  flag passed).
+
+\b Append ending token for \c{.stabs} records in the ELF output format.
+
+\b New NSIS script which uses ModernUI and MultiUser approach.
+
+\b Visual Studio 2008 NASM integration (rules file).
+
+\b Warn a user if a constant is too long (and as result will be stripped).
+
+\b The obsoleted pre-XOP AMD SSE5 instruction set which was never actualized
+  was removed.
+
+\b Fix stack overrun on too long error file name passed from the command line.
+
+\b Bind symbols to the .text section by default (ie in case if SECTION
+  directive was omitted) in the ELF output format.
+
+\b Fix sync points array index wrapping.
+
+\b A few fixes for FMA4 and XOP instruction templates.
+
+\b Add AMD Lightweight Profiling (LWP) instructions.
+
+\b Fix the offset for \c{%arg} in 64-bit mode.
+
+\b An undefined local macro (\c{%$}) no longer matches a global macro
+  with the same name.
+
+\b Fix NULL dereference on too long local labels.
+
+
+\S{cl-2.07} Version 2.07
+
+\b NASM is now under the 2-clause BSD license.  See \k{legal}.
+
+\b Fix the section type for the \c{.strtab} section in the \c{elf64}
+  output format.
+
+\b Fix the handling of \c{COMMON} directives in the \c{obj} output format.
+
+\b New \c{ith} and \c{srec} output formats; these are variants of the
+  \c{bin} output format which output Intel hex and Motorola S-records,
+  respectively.  See \k{ithfmt} and \k{srecfmt}.
+
+\b \c{rdf2ihx} replaced with an enhanced \c{rdf2bin}, which can output
+  binary, COM, Intel hex or Motorola S-records.
+
+\b The Windows installer now puts the NASM directory first in the
+  \c{PATH} of the "NASM Shell".
+
+\b Revert the early expansion behavior of \c{%+} to pre-2.06 behavior:
+  \c{%+} is only expanded late.
+
+\b Yet another Mach-O alignment fix.
+
+\b Don't delete the list file on errors.  Also, include error and
+  warning information in the list file.
+
+\b Support for 64-bit Mach-O output, see \k{machofmt}.
+
+\b Fix assert failure on certain operations that involve strings with
+  high-bit bytes.
+
+
+\S{cl-2.06} Version 2.06
+
+\b This release is dedicated to the memory of Charles A. Crayne, long
+  time NASM developer as well as moderator of \c{comp.lang.asm.x86} and
+  author of the book \e{Serious Assembler}.  We miss you, Chuck.
+
+\b Support for indirect macro expansion (\c{%...}).  See \k{indmacro}.
+
+\b \c{%pop} can now take an argument, see \k{pushpop}.
+
+\b The argument to \c{%use} is no longer macro-expanded.  Use
+  \c{%...} if macro expansion is desired.
+
+\b Support for thread-local storage in ELF32 and ELF64.  See \k{elftls}.
+
+\b Fix crash on \c{%ifmacro} without an argument.
+
+\b Correct the arguments to the \c{POPCNT} instruction.
+
+\b Fix section alignment in the Mach-O format.
+
+\b Update AVX support to version 5 of the Intel specification.
+
+\b Fix the handling of accesses to context-local macros from higher
+  levels in the context stack.
+
+\b Treat \c{WAIT} as a prefix rather than as an instruction, thereby
+  allowing constructs like \c{O16 FSAVE} to work correctly.
+
+\b Support for structures with a non-zero base offset. See \k{struc}.
+
+\b Correctly handle preprocessor token concatenation (see \k{concat})
+   involving floating-point numbers.
+
+\b The \c{PINSR} series of instructions have been corrected and
+   rationalized.
+
+\b Removed AMD SSE5, replaced with the new XOP/FMA4/CVT16 (rev 3.03)
+   spec.
+
+\b The ELF backends no longer automatically generate a \c{.comment} section.
+
+\b Add additional "well-known" ELF sections with default attributes.  See
+   \k{elfsect}.
+
+
+\S{cl-2.05.01} Version 2.05.01
+
+\b Fix the \c{-w}/\c{-W} option parsing, which was broken in NASM 2.05.
+
+
+\S{cl-2.05} Version 2.05
+
+\b Fix redundant REX.W prefix on \c{JMP reg64}.
+
+\b Make the behaviour of \c{-O0} match NASM 0.98 legacy behavior.
+  See \k{opt-O}.
+
+\b \c{-w-user} can be used to suppress the output of \c{%warning} directives.
+  See \k{opt-w}.
+
+\b Fix bug where \c{ALIGN} would issue a full alignment datum instead of
+  zero bytes.
+
+\b Fix offsets in list files.
+
+\b Fix \c{%include} inside multi-line macros or loops.
+
+\b Fix error where NASM would generate a spurious warning on valid
+  optimizations of immediate values.
+
+\b Fix arguments to a number of the \c{CVT} SSE instructions.
+
+\b Fix RIP-relative offsets when the instruction carries an immediate.
+
+\b Massive overhaul of the ELF64 backend for spec compliance.
+
+\b Fix the Geode \c{PFRCPV} and \c{PFRSQRTV} instruction.
+
+\b Fix the SSE 4.2 \c{CRC32} instruction.
+
+
+\S{cl-2.04} Version 2.04
+
+\b Sanitize macro handing in the \c{%error} directive.
+
+\b New \c{%warning} directive to issue user-controlled warnings.
+
+\b \c{%error} directives are now deferred to the final assembly phase.
+
+\b New \c{%fatal} directive to immediately terminate assembly.
+
+\b New \c{%strcat} directive to join quoted strings together.
+
+\b New \c{%use} macro directive to support standard macro directives.  See
+  \k{use}.
+
+\b Excess default parameters to \c{%macro} now issues a warning by default.
+  See \k{mlmacro}.
+
+\b Fix \c{%ifn} and \c{%elifn}.
+
+\b Fix nested \c{%else} clauses.
+
+\b Correct the handling of nested \c{%rep}s.
+
+\b New \c{%unmacro} directive to undeclare a multi-line macro.
+  See \k{unmacro}.
+
+\b Builtin macro \c{__PASS__} which expands to the current assembly pass.
+  See \k{pass_macro}.
+
+\b \c{__utf16__} and \c{__utf32__} operators to generate UTF-16 and UTF-32
+  strings.  See \k{unicode}.
+
+\b Fix bug in case-insensitive matching when compiled on platforms that
+  don't use the \c{configure} script.  Of the official release binaries,
+  that only affected the OS/2 binary.
+
+\b Support for x87 packed BCD constants.  See \k{bcdconst}.
+
+\b Correct the \c{LTR} and \c{SLDT} instructions in 64-bit mode.
+
+\b Fix unnecessary REX.W prefix on indirect jumps in 64-bit mode.
+
+\b Add AVX versions of the AES instructions (\c{VAES}...).
+
+\b Fix the 256-bit FMA instructions.
+
+\b Add 256-bit AVX stores per the latest AVX spec.
+
+\b VIA XCRYPT instructions can now be written either with or without
+  \c{REP}, apparently different versions of the VIA spec wrote them
+  differently.
+
+\b Add missing 64-bit \c{MOVNTI} instruction.
+
+\b Fix the operand size of \c{VMREAD} and \c{VMWRITE}.
+
+\b Numerous bug fixes, especially to the AES, AVX and VTX instructions.
+
+\b The optimizer now always runs until it converges.  It also runs even
+  when disabled, but doesn't optimize.  This allows most forward references
+  to be resolved properly.
+
+\b \c{%push} no longer needs a context identifier; omitting the context
+  identifier results in an anonymous context.
+
+
+\S{cl-2.03.01} Version 2.03.01
+
+\b Fix buffer overflow in the listing module.
+
+\b Fix the handling of hexadecimal escape codes in `...` strings.
+
+\b The Postscript/PDF documentation has been reformatted.
+
+\b The \c{-F} option now implies \c{-g}.
+
+
+\S{cl-2.03} Version 2.03
+
+\b Add support for Intel AVX, CLMUL and FMA instructions,
+including YMM registers.
+
+\b \c{dy}, \c{resy} and \c{yword} for 32-byte operands.
+
+\b Fix some SSE5 instructions.
+
+\b Intel \c{INVEPT}, \c{INVVPID} and \c{MOVBE} instructions.
+
+\b Fix checking for critical expressions when the optimizer is enabled.
+
+\b Support the DWARF debugging format for ELF targets.
+
+\b Fix optimizations of signed bytes.
+
+\b Fix operation on bigendian machines.
+
+\b Fix buffer overflow in the preprocessor.
+
+\b \c{SAFESEH} support for Win32, \c{IMAGEREL} for Win64 (SEH).
+
+\b \c{%?} and \c{%??} to refer to the name of a macro itself.  In particular,
+\c{%idefine keyword $%?} can be used to make a keyword "disappear".
+
+\b New options for dependency generation: \c{-MD}, \c{-MF},
+\c{-MP}, \c{-MT}, \c{-MQ}.
+
+\b New preprocessor directives \c{%pathsearch} and \c{%depend}; INCBIN
+reimplemented as a macro.
+
+\b \c{%include} now resolves macros in a sane manner.
+
+\b \c{%substr} can now be used to get other than one-character substrings.
+
+\b New type of character/string constants, using backquotes (\c{`...`}),
+which support C-style escape sequences.
+
+\b \c{%defstr} and \c{%idefstr} to stringize macro definitions before
+creation.
+
+\b Fix forward references used in \c{EQU} statements.
+
+
+\S{cl-2.02} Version 2.02
+
+\b Additional fixes for MMX operands with explicit \c{qword}, as well as
+  (hopefully) SSE operands with \c{oword}.
+
+\b Fix handling of truncated strings with \c{DO}.
+
+\b Fix segfaults due to memory overwrites when floating-point constants
+  were used.
+
+\b Fix segfaults due to missing include files.
+
+\b Fix OpenWatcom Makefiles for DOS and OS/2.
+
+\b Add autogenerated instruction list back into the documentation.
+
+\b ELF: Fix segfault when generating stabs, and no symbols have been
+  defined.
+
+\b ELF: Experimental support for DWARF debugging information.
+
+\b New compile date and time standard macros.
+
+\b \c{%ifnum} now returns true for negative numbers.
+
+\b New \c{%iftoken} test for a single token.
+
+\b New \c{%ifempty} test for empty expansion.
+
+\b Add support for the \c{XSAVE} instruction group.
+
+\b Makefile for Netware/gcc.
+
+\b Fix issue with some warnings getting emitted way too many times.
+
+\b Autogenerated instruction list added to the documentation.
+
+
+\S{cl-2.01} Version 2.01
+
+\b Fix the handling of MMX registers with explicit \c{qword} tags on
+  memory (broken in 2.00 due to 64-bit changes.)
+
+\b Fix the PREFETCH instructions.
+
+\b Fix the documentation.
+
+\b Fix debugging info when using \c{-f elf}
+(backwards compatibility alias for \c{-f elf32}).
+
+\b Man pages for rdoff tools (from the Debian project.)
+
+\b ELF: handle large numbers of sections.
+
+\b Fix corrupt output when the optimizer runs out of passes.
+
+
+\S{cl-2.00} Version 2.00
+
+\b Added c99 data-type compliance.
+
+\b Added general x86-64 support.
+
+\b Added win64 (x86-64 COFF) output format.
+
+\b Added \c{__BITS__} standard macro.
+
+\b Renamed the \c{elf} output format to \c{elf32} for clarity.
+
+\b Added \c{elf64} and \c{macho} (MacOS X) output formats.
+
+\b Added Numeric constants in \c{dq} directive.
+
+\b Added \c{oword}, \c{do} and \c{reso} pseudo operands.
+
+\b Allow underscores in numbers.
+
+\b Added 8-, 16- and 128-bit floating-point formats.
+
+\b Added binary, octal and hexadecimal floating-point.
+
+\b Correct the generation of floating-point constants.
+
+\b Added floating-point option control.
+
+\b Added Infinity and NaN floating point support.
+
+\b Added ELF Symbol Visibility support.
+
+\b Added setting OSABI value in ELF header directive.
+
+\b Added Generate Makefile Dependencies option.
+
+\b Added Unlimited Optimization Passes option.
+
+\b Added \c{%IFN} and \c{%ELIFN} support.
+
+\b Added Logical Negation Operator.
+
+\b Enhanced Stack Relative Preprocessor Directives.
+
+\b Enhanced ELF Debug Formats.
+
+\b Enhanced Send Errors to a File option.
+
+\b Added SSSE3, SSE4.1, SSE4.2, SSE5 support.
+
+\b Added a large number of additional instructions.
+
+\b Significant performance improvements.
+
+\b \c{-w+warning} and \c{-w-warning} can now be written as -Wwarning and
+ -Wno-warning, respectively.  See \k{opt-w}.
+
+\b Add \c{-w+error} to treat warnings as errors.  See \k{opt-w}.
+
+\b Add \c{-w+all} and \c{-w-all} to enable or disable all suppressible
+ warnings.  See \k{opt-w}.
+
+
+\H{cl-0.98.xx} NASM 0.98 Series
+
+The 0.98 series was the production versions of NASM from 1999 to 2007.
+
+
+\S{cl-0.98.39} Version 0.98.39
+
+\b fix buffer overflow
+
+\b fix outas86's \c{.bss} handling
+
+\b "make spotless" no longer deletes config.h.in.
+
+\b \c{%(el)if(n)idn} insensitivity to string quotes difference (#809300).
+
+\b (nasm.c)\c{__OUTPUT_FORMAT__} changed to string value instead of symbol.
+
+\S{cl-0.98.38} Version 0.98.38
+
+
+\b Add Makefile for 16-bit DOS binaries under OpenWatcom, and modify
+  \c{mkdep.pl} to be able to generate completely pathless dependencies, as
+  required by OpenWatcom wmake (it supports path searches, but not
+  explicit paths.)
+
+\b Fix the \c{STR} instruction.
+
+\b Fix the ELF output format, which was broken under certain
+  circumstances due to the addition of stabs support.
+
+\b Quick-fix Borland format debug-info for \c{-f obj}
+
+\b Fix for \c{%rep} with no arguments (#560568)
+
+\b Fix concatenation of preprocessor function call (#794686)
+
+\b Fix long label causes coredump (#677841)
+
+\b Use autoheader as well as autoconf to keep configure from generating
+  ridiculously long command lines.
+
+\b Make sure that all of the formats which support debugging output
+  actually will suppress debugging output when \c{-g} not specified.
+
+\S{cl-0.98.37} Version 0.98.37
+
+
+\b Paths given in \c{-I} switch searched for \c{incbin}-ed as
+  well as \c{%include}-ed files.
+
+\b Added stabs debugging for the ELF output format, patch from
+  Martin Wawro.
+
+\b Fix \c{output/outbin.c} to allow origin > 80000000h.
+
+\b Make \c{-U} switch work.
+
+\b Fix the use of relative offsets with explicit prefixes, e.g.
+\c{a32 loop foo}.
+
+\b Remove \c{backslash()}.
+
+\b Fix the \c{SMSW} and \c{SLDT} instructions.
+
+\b \c{-O2} and \c{-O3} are no longer aliases for \c{-O10} and \c{-O15}.
+If you mean the latter, please say so! :)
+
+\S{cl-0.98.36} Version 0.98.36
+
+
+\b Update rdoff - librarian/archiver - common rec - docs!
+
+\b Fix signed/unsigned problems.
+
+\b Fix \c{JMP FAR label} and \c{CALL FAR label}.
+
+\b Add new multisection support - map files - fix align bug
+
+\b Fix sysexit, movhps/movlps reg,reg bugs in insns.dat
+
+\b \c{Q} or \c{O} suffixes indicate octal
+
+\b Support Prescott new instructions (PNI).
+
+\b Cyrix \c{XSTORE} instruction.
+
+
+\S{cl-0.98.35} Version 0.98.35
+
+\b Fix build failure on 16-bit DOS (Makefile.bc3 workaround for compiler bug.)
+
+\b Fix dependencies and compiler warnings.
+
+\b Add "const" in a number of places.
+
+\b Add -X option to specify error reporting format (use -Xvc to
+  integrate with Microsoft Visual Studio.)
+
+\b Minor changes for code legibility.
+
+\b Drop use of tmpnam() in rdoff (security fix.)
+
+
+\S{cl-0.98.34} Version 0.98.34
+
+\b Correct additional address-size vs. operand-size confusions.
+
+\b Generate dependencies for all Makefiles automatically.
+
+\b Add support for unimplemented (but theoretically available)
+  registers such as tr0 and cr5.  Segment registers 6 and 7 are called
+  segr6 and segr7 for the operations which they can be represented.
+
+\b Correct some disassembler bugs related to redundant address-size prefixes.
+  Some work still remains in this area.
+
+\b Correctly generate an error for things like "SEG eax".
+
+\b Add the JMPE instruction, enabled by "CPU IA64".
+
+\b Correct compilation on newer gcc/glibc platforms.
+
+\b Issue an error on things like "jmp far eax".
+
+
+\S{cl-0.98.33} Version 0.98.33
+
+\b New __NASM_PATCHLEVEL__ and __NASM_VERSION_ID__ standard macros to
+  round out the version-query macros.  version.pl now understands
+  X.YYplWW or X.YY.ZZplWW as a version number, equivalent to
+  X.YY.ZZ.WW (or X.YY.0.WW, as appropriate).
+
+\b New keyword "strict" to disable the optimization of specific
+  operands.
+
+\b Fix the handing of size overrides with JMP instructions
+  (instructions such as "jmp dword foo".)
+
+\b Fix the handling of "ABSOLUTE label", where "label" points into a
+  relocatable segment.
+
+\b Fix OBJ output format with lots of externs.
+
+\b More documentation updates.
+
+\b Add -Ov option to get verbose information about optimizations.
+
+\b Undo a braindead change which broke \c{%elif} directives.
+
+\b Makefile updates.
+
+
+\S{cl-0.98.32} Version 0.98.32
+
+\b Fix NASM crashing when \c{%macro} directives were left unterminated.
+
+\b Lots of documentation updates.
+
+\b Complete rewrite of the PostScript/PDF documentation generator.
+
+\b The MS Visual C++ Makefile was updated and corrected.
+
+\b Recognize .rodata as a standard section name in ELF.
+
+\b Fix some obsolete Perl4-isms in Perl scripts.
+
+\b Fix configure.in to work with autoconf 2.5x.
+
+\b Fix a couple of "make cleaner" misses.
+
+\b Make the normal "./configure && make" work with Cygwin.
+
+
+\S{cl-0.98.31} Version 0.98.31
+
+\b Correctly build in a separate object directory again.
+
+\b Derive all references to the version number from the version file.
+
+\b New standard macros __NASM_SUBMINOR__ and __NASM_VER__ macros.
+
+\b Lots of Makefile updates and bug fixes.
+
+\b New \c{%ifmacro} directive to test for multiline macros.
+
+\b Documentation updates.
+
+\b Fixes for 16-bit OBJ format output.
+
+\b Changed the NASM environment variable to NASMENV.
+
+
+\S{cl-0.98.30} Version 0.98.30
+
+\b Changed doc files a lot: completely removed old READMExx and
+  Wishlist files, incorporating all information in CHANGES and TODO.
+
+\b I waited a long time to rename zoutieee.c to (original) outieee.c
+
+\b moved all output modules to output/ subdirectory.
+
+\b Added 'make strip' target to strip debug info from nasm & ndisasm.
+
+\b Added INSTALL file with installation instructions.
+
+\b Added -v option description to nasm man.
+
+\b Added dist makefile target to produce source distributions.
+
+\b 16-bit support for ELF output format (GNU extension, but useful.)
+
+
+\S{cl-0.98.28} Version 0.98.28
+
+\b Fastcooked this for Debian's Woody release:
+Frank applied the INCBIN bug patch to 0.98.25alt and called
+it 0.98.28 to not confuse poor little apt-get.
+
+
+\S{cl-0.98.26} Version 0.98.26
+
+\b Reorganised files even better from 0.98.25alt
+
+
+\S{cl-0.98.25alt} Version 0.98.25alt
+
+\b Prettified the source tree. Moved files to more reasonable places.
+
+\b Added findleak.pl script to misc/ directory.
+
+\b Attempted to fix doc.
+
+
+\S{cl-0.98.25} Version 0.98.25
+
+\b Line continuation character \c{\\}.
+
+\b Docs inadvertently reverted - "dos packaging".
+
+
+\S{cl-0.98.24p1} Version 0.98.24p1
+
+\b FIXME: Someone, document this please.
+
+
+\S{cl-0.98.24} Version 0.98.24
+
+\b Documentation - Ndisasm doc added to Nasm.doc.
+
+
+\S{cl-0.98.23} Version 0.98.23
+
+\b Attempted to remove rdoff version1
+
+\b Lino Mastrodomenico's patches to preproc.c (%$$ bug?).
+
+
+\S{cl-0.98.22} Version 0.98.22
+
+\b Update rdoff2 - attempt to remove v1.
+
+
+\S{cl-0.98.21} Version 0.98.21
+
+\b Optimization fixes.
+
+
+\S{cl-0.98.20} Version 0.98.20
+
+\b Optimization fixes.
+
+
+\S{cl-0.98.19} Version 0.98.19
+
+\b H. J. Lu's patch back out.
+
+
+\S{cl-0.98.18} Version 0.98.18
+
+\b Added ".rdata" to "-f win32".
+
+
+\S{cl-0.98.17} Version 0.98.17
+
+\b H. J. Lu's "bogus elf" patch. (Red Hat problem?)
+
+
+\S{cl-0.98.16} Version 0.98.16
+
+\b Fix whitespace before "section ..." bug.
+
+
+\S{cl-0.98.15} Version 0.98.15
+
+\b Rdoff changes (?).
+
+\b Fix fixes to memory leaks.
+
+
+\S{cl-0.98.14} Version 0.98.14
+
+\b Fix memory leaks.
+
+
+\S{cl-0.98.13} Version 0.98.13
+
+\b There was no 0.98.13
+
+
+\S{cl-0.98.12} Version 0.98.12
+
+\b Update optimization (new function of "-O1")
+
+\b Changes to test/bintest.asm (?).
+
+
+\S{cl-0.98.11} Version 0.98.11
+
+\b Optimization changes.
+
+\b Ndisasm fixed.
+
+
+\S{cl-0.98.10} Version 0.98.10
+
+\b There was no 0.98.10
+
+
+\S{cl-0.98.09} Version 0.98.09
+
+\b Add multiple sections support to "-f bin".
+
+\b Changed GLOBAL_TEMP_BASE in outelf.c from 6 to 15.
+
+\b Add "-v" as an alias to the "-r" switch.
+
+\b Remove "#ifdef" from Tasm compatibility options.
+
+\b Remove redundant size-overrides on "mov ds, ex", etc.
+
+\b Fixes to SSE2, other insns.dat (?).
+
+\b Enable uppercase "I" and "P" switches.
+
+\b Case insinsitive "seg" and "wrt".
+
+\b Update install.sh (?).
+
+\b Allocate tokens in blocks.
+
+\b Improve "invalid effective address" messages.
+
+
+\S{cl-0.98.08} Version 0.98.08
+
+\b Add "\c{%strlen}" and "\c{%substr}" macro operators
+
+\b Fixed broken c16.mac.
+
+\b Unterminated string error reported.
+
+\b Fixed bugs as per 0.98bf
+
+
+\S{cl-0.98.09b with John Coffman patches released 28-Oct-2001} Version 0.98.09b with John Coffman patches released 28-Oct-2001
+
+Changes from 0.98.07 release to 98.09b as of 28-Oct-2001
+
+\b More closely compatible with 0.98 when -O0 is implied
+or specified.  Not strictly identical, since backward
+branches in range of short offsets are recognized, and signed
+byte values with no explicit size specification will be
+assembled as a single byte.
+
+\b More forgiving with the PUSH instruction.  0.98 requires
+a size to be specified always.  0.98.09b will imply the size
+from the current BITS setting (16 or 32).
+
+\b Changed definition of the optimization flag:
+
+\c    -O0     strict two-pass assembly, JMP and Jcc are
+\c            handled more like 0.98, except that back-
+\c            ward JMPs are short, if possible.
+\c
+\c    -O1     strict two-pass assembly, but forward
+\c            branches are assembled with code guaranteed
+\c            to reach; may produce larger code than
+\c            -O0, but will produce successful assembly
+\c            more often if branch offset sizes are not
+\c            specified.
+\c
+\c    -O2     multi-pass optimization, minimize branch
+\c            offsets; also will minimize signed immed-
+\c            iate bytes, overriding size specification.
+\c
+\c    -O3     like -O2, but more passes taken, if needed
+
+
+\S{cl-0.98.07 released 01/28/01} Version 0.98.07 released 01/28/01
+
+\b      Added Stepane Denis' SSE2 instructions to a *working*
+        version of the code - some earlier versions were based on
+        broken code - sorry 'bout that. version "0.98.07"
+
+\b       Cosmetic modifications to nasm.c, nasm.h,
+        AUTHORS, MODIFIED
+
+
+\S{cl-0.98.06f released 01/18/01} Version 0.98.06f released 01/18/01
+
+
+\b Add "metalbrain"s jecxz bug fix in insns.dat
+
+\b Alter nasmdoc.src to match - version "0.98.06f"
+
+
+\S{cl-0.98.06e released 01/09/01} Version 0.98.06e released 01/09/01
+
+
+\b       Removed the "outforms.h" file - it appears to be
+        someone's old backup of "outform.h". version "0.98.06e"
+
+\b fbk - finally added the fix for the "multiple %includes bug",
+        known since 7/27/99 - reported originally (?) and sent to
+        us by Austin Lunnen - he reports that John Fine had a fix
+        within the day. Here it is...
+
+\b Nelson Rush resigns from the group. Big thanks to Nelson for
+  his leadership and enthusiasm in getting these changes
+  incorporated into Nasm!
+
+\b fbk - list +, list - directives - ineptly implemented, should
+        be re-written or removed, perhaps.
+
+\b Brian Raiter / fbk - "elfso bug" fix - applied to aoutb format
+                       as well - testing might be desirable...
+
+\b James Seter - -postfix, -prefix command line switches.
+
+\b Yuri Zaporozhets - rdoff utility changes.
+
+
+\S{cl-0.98p1} Version 0.98p1
+
+\b GAS-like palign (Panos Minos)
+
+\b FIXME: Someone, fill this in with details
+
+
+\S{cl-0.98bf (bug-fixed)} Version 0.98bf (bug-fixed)
+
+\b Fixed - elf and aoutb bug - shared libraries
+        - multiple "%include" bug in "-f obj"
+        - jcxz, jecxz bug
+        - unrecognized option bug in ndisasm
+
+\S{cl-0.98.03 with John Coffman's changes released 27-Jul-2000} Version 0.98.03 with John Coffman's changes released 27-Jul-2000
+
+\b Added signed byte optimizations for the 0x81/0x83 class
+of instructions: ADC, ADD, AND, CMP, OR, SBB, SUB, XOR:
+when used as 'ADD reg16,imm' or 'ADD reg32,imm.'  Also
+optimization of signed byte form of 'PUSH imm' and 'IMUL
+reg,imm'/'IMUL reg,reg,imm.'  No size specification is needed.
+
+\b Added multi-pass JMP and Jcc offset optimization.  Offsets
+on forward references will preferentially use the short form,
+without the need to code a specific size (short or near) for
+the branch.  Added instructions for 'Jcc label' to use the
+form 'Jnotcc $+3/JMP label', in cases where a short offset
+is out of bounds.  If compiling for a 386 or higher CPU, then
+the 386 form of Jcc will be used instead.
+
+\> This feature is controlled by a new command-line switch: "O",
+(upper case letter O).  "-O0" reverts the assembler to no
+extra optimization passes, "-O1" allows up to 5 extra passes,
+and "-O2"(default), allows up to 10 extra optimization passes.
+
+\b Added a new directive:  'cpu XXX', where XXX is any of:
+8086, 186, 286, 386, 486, 586, pentium, 686, PPro, P2, P3 or
+Katmai.  All are case insensitive.  All instructions will
+be selected only if they apply to the selected cpu or lower.
+Corrected a couple of bugs in cpu-dependence in 'insns.dat'.
+
+\b Added to 'standard.mac', the "use16" and "use32" forms of
+the "bits 16/32" directive. This is nothing new, just conforms
+to a lot of other assemblers. (minor)
+
+\b Changed label allocation from 320/32 (10000 labels @ 200K+)
+to 32/37 (1000 labels); makes running under DOS much easier.
+Since additional label space is allocated dynamically, this
+should have no effect on large programs with lots of labels.
+The 37 is a prime, believed to be better for hashing. (minor)
+
+
+\S{cl-0.98.03} Version 0.98.03
+
+"Integrated patchfile 0.98-0.98.01.  I call this version 0.98.03 for
+historical reasons: 0.98.02 was trashed." --John Coffman
+<johninsd@san.rr.com>, 27-Jul-2000
+
+\b Kendall Bennett's SciTech MGL changes
+
+\b Note that you must define "TASM_COMPAT" at compile-time
+to get the Tasm Ideal Mode compatibility.
+
+\b All changes can be compiled in and out using the TASM_COMPAT macros,
+and when compiled without TASM_COMPAT defined we get the exact same
+binary as the unmodified 0.98 sources.
+
+\b standard.mac, macros.c: Added macros to ignore TASM directives before
+first include
+
+\b nasm.h: Added extern declaration for tasm_compatible_mode
+
+\b nasm.c: Added global variable tasm_compatible_mode
+
+\b Added command line switch for TASM compatible mode (-t)
+
+\b Changed version command line to reflect when compiled with TASM additions
+
+\b Added response file processing to allow all arguments on a single
+line (response file is @resp rather than -@resp for NASM format).
+
+\b labels.c: Changes islocal() macro to support TASM style @@local labels.
+
+\b Added islocalchar() macro to support TASM style @@local labels.
+
+\b parser.c: Added support for TASM style memory references (ie: mov
+DWORD eax,10 rather than the NASM style mov DWORD eax,10).
+
+\b preproc.c: Added new directives, \c{%arg}, \c{%local}, \c{%stacksize} to directives
+table
+
+\b Added support for TASM style directives without a leading % symbol.
+
+\b Integrated a block of changes from Andrew Zabolotny <bit@eltech.ru>:
+
+\b A new keyword \c{%xdefine} and its case-insensitive counterpart \c{%ixdefine}.
+They work almost the same way as \c{%define} and \c{%idefine} but expand
+the definition immediately, not on the invocation. Something like a cross
+between \c{%define} and \c{%assign}. The "x" suffix stands for "eXpand", so
+"xdefine" can be deciphered as "expand-and-define". Thus you can do
+things like this:
+
+\c      %assign ofs     0
+\c
+\c      %macro  arg     1
+\c              %xdefine %1 dword esp+ofs
+\c              %assign ofs ofs+4
+\c      %endmacro
+
+\b Changed the place where the expansion of %$name macros are expanded.
+Now they are converted into ..@ctxnum.name form when detokenizing, so
+there are no quirks as before when using %$name arguments to macros,
+in macros etc. For example:
+
+\c      %macro  abc     1
+\c              %define %1 hello
+\c      %endm
+\c
+\c      abc     %$here
+\c      %$here
+
+\>    Now last line will be expanded into "hello" as expected. This also allows
+    for lots of goodies, a good example are extended "proc" macros included
+    in this archive.
+
+\b Added a check for "cstk" in smacro_defined() before calling get_ctx() -
+    this allows for things like:
+
+\c      %ifdef %$abc
+\c      %endif
+
+\>    to work without warnings even in no context.
+
+\b Added a check for "cstk" in %if*ctx and %elif*ctx directives -
+    this allows to use \c{%ifctx} without excessive warnings. If there is
+    no active context, \c{%ifctx} goes through "false" branch.
+
+\b Removed "user error: " prefix with \c{%error} directive: it just clobbers the
+    output and has absolutely no functionality. Besides, this allows to write
+    macros that does not differ from built-in functions in any way.
+
+\b Added expansion of string that is output by \c{%error} directive. Now you
+    can do things like:
+
+\c      %define hello(x) Hello, x!
+\c
+\c      %define %$name andy
+\c      %error "hello(%$name)"
+
+\> Same happened with \c{%include} directive.
+
+\b Now all directives that expect an identifier will try to expand and
+    concatenate everything without whitespaces in between before usage.
+    For example, with "unfixed" nasm the commands
+
+\c      %define %$abc hello
+\c      %define __%$abc goodbye
+\c      __%$abc
+
+\>    would produce "incorrect" output: last line will expand to
+
+\c      hello goodbyehello
+
+\>    Not quite what you expected, eh? :-) The answer is that preprocessor
+    treats the \c{%define} construct as if it would be
+
+\c      %define __ %$abc goodbye
+
+\>    (note the white space between __ and %$abc). After my "fix" it
+    will "correctly" expand into
+
+\c      goodbye
+
+\>    as expected. Note that I use quotes around words "correct", "incorrect"
+    etc because this is rather a feature not a bug; however current behaviour
+    is more logical (and allows more advanced macro usage :-).
+
+    Same change was applied to:
+        \c{%push},\c{%macro},\c{%imacro},\c{%define},\c{%idefine},\c{%xdefine},\c{%ixdefine},
+        \c{%assign},\c{%iassign},\c{%undef}
+
+\b A new directive WARNING {+|-}warning-id have been added. It works only
+    if the assembly phase is enabled (i.e. it doesn't work with nasm -e).
+
+\b A new warning type: macro-selfref. By default this warning is disabled;
+    when enabled NASM warns when a macro self-references itself; for example
+    the following source:
+
+\c        WARNING macro-selfref
+\c
+\c        %macro          push    1-*
+\c                %rep    %0
+\c                        push    %1
+\c                        %rotate 1
+\c                %endrep
+\c        %endmacro
+\c
+\c                        push    eax,ebx,ecx
+
+\>  will produce a warning, but if we remove the first line we won't see it
+    anymore (which is The Right Thing To Do {tm} IMHO since C preprocessor
+    eats such constructs without warnings at all).
+
+\b Added a "error" routine to preprocessor which always will set ERR_PASS1
+    bit in severity_code. This removes annoying repeated errors on first
+    and second passes from preprocessor.
+
+\b Added the %+ operator in single-line macros for concatenating two
+    identifiers. Usage example:
+
+\c        %define _myfunc _otherfunc
+\c        %define cextern(x) _ %+ x
+\c        cextern (myfunc)
+
+\>    After first expansion, third line will become "_myfunc". After this
+    expansion is performed again so it becomes "_otherunc".
+
+\b Now if preprocessor is in a non-emitting state, no warning or error
+    will be emitted. Example:
+
+\c        %if 1
+\c                mov     eax,ebx
+\c        %else
+\c                put anything you want between these two brackets,
+\c                even macro-parameter references %1 or local
+\c                labels %$zz or macro-local labels %%zz - no
+\c                warning will be emitted.
+\c        %endif
+
+\b Context-local variables on expansion as a last resort are looked up
+    in outer contexts. For example, the following piece:
+
+\c        %push   outer
+\c        %define %$a esp
+\c
+\c                %push   inner
+\c                %$a
+\c                %pop
+\c        %pop
+
+\>    will expand correctly the fourth line to esp; if we'll define another
+    %$a inside the "inner" context, it will take precedence over outer
+    definition. However, this modification has been applied only to
+    expand_smacro and not to smacro_define: as a consequence expansion
+    looks in outer contexts, but \c{%ifdef} won't look in outer contexts.
+
+\>    This behaviour is needed because we don't want nested contexts to
+    act on already defined local macros. Example:
+
+\c        %define %$arg1  esp+4
+\c        test    eax,eax
+\c        if      nz
+\c                mov     eax,%$arg1
+\c        endif
+
+\>    In this example the "if" mmacro enters into the "if" context, so %$arg1
+    is not valid anymore inside "if". Of course it could be worked around
+    by using explicitly %$$arg1 but this is ugly IMHO.
+
+\b Fixed memory leak in \c{%undef}. The origline wasn't freed before
+    exiting on success.
+
+\b Fixed trap in preprocessor when line expanded to empty set of tokens.
+    This happens, for example, in the following case:
+
+\c        #define SOMETHING
+\c        SOMETHING
+
+
+\S{cl-0.98} Version 0.98
+
+All changes since NASM 0.98p3 have been produced by H. Peter Anvin <hpa@zytor.com>.
+
+\b The documentation comment delimiter is \# not #.
+
+\b Allow EQU definitions to refer to external labels; reported by
+  Pedro Gimeno.
+
+\b Re-enable support for RDOFF v1; reported by Pedro Gimeno.
+
+\b Updated License file per OK from Simon and Julian.
+
+
+\S{cl-0.98p9} Version 0.98p9
+
+\b Update documentation (although the instruction set reference will
+  have to wait; I don't want to hold up the 0.98 release for it.)
+
+\b Verified that the NASM implementation of the PEXTRW and PMOVMSKB
+  instructions is correct.  The encoding differs from what the Intel
+  manuals document, but the Pentium III behaviour matches NASM, not
+  the Intel manuals.
+
+\b Fix handling of implicit sizes in PSHUFW and PINSRW, reported by
+  Stefan Hoffmeister.
+
+\b Resurrect the -s option, which was removed when changing the
+  diagnostic output to stdout.
+
+
+\S{cl-0.98p8} Version 0.98p8
+
+\b Fix for "DB" when NASM is running on a bigendian machine.
+
+\b Invoke insns.pl once for each output script, making Makefile.in
+  legal for "make -j".
+
+\b Improve the Unix configure-based makefiles to make package
+  creation easier.
+
+\b Included an RPM .spec file for building RPM (RedHat Package Manager)
+  packages on Linux or Unix systems.
+
+\b Fix Makefile dependency problems.
+
+\b Change src/rdsrc.pl to include sectioning information in info
+  output; required for install-info to work.
+
+\b Updated the RDOFF distribution to version 2 from Jules; minor
+  massaging to make it compile in my environment.
+
+\b Split doc files that can be built by anyone with a Perl interpreter off
+  into a separate archive.
+
+\b "Dress rehearsal" release!
+
+
+\S{cl-0.98p7} Version 0.98p7
+
+\b Fixed opcodes with a third byte-sized immediate argument to not
+  complain if given "byte" on the immediate.
+
+\b Allow \c{%undef} to remove single-line macros with arguments.  This
+  matches the behaviour of #undef in the C preprocessor.
+
+\b Allow -d, -u, -i and -p to be specified as -D, -U, -I and -P for
+  compatibility with most C compilers and preprocessors.  This allows
+  Makefile options to be shared between cc and nasm, for example.
+
+\b Minor cleanups.
+
+\b Went through the list of Katmai instructions and hopefully fixed the
+  (rather few) mistakes in it.
+
+\b (Hopefully) fixed a number of disassembler bugs related to ambiguous
+  instructions (disambiguated by -p) and SSE instructions with REP.
+
+\b Fix for bug reported by Mark Junger: "call dword 0x12345678" should
+  work and may add an OSP (affected CALL, JMP, Jcc).
+
+\b Fix for environments when "stderr" isn't a compile-time constant.
+
+
+\S{cl-0.98p6} Version 0.98p6
+
+
+\b Took officially over coordination of the 0.98 release; so drop
+  the p3.x notation. Skipped p4 and p5 to avoid confusion with John
+  Fine's J4 and J5 releases.
+
+\b Update the documentation; however, it still doesn't include
+  documentation for the various new instructions.  I somehow wonder if
+  it makes sense to have an instruction set reference in the assembler
+  manual when Intel et al have PDF versions of their manuals online.
+
+\b Recognize "idt" or "centaur" for the -p option to ndisasm.
+
+\b Changed error messages back to stderr where they belong, but add an
+  -E option to redirect them elsewhere (the DOS shell cannot redirect
+  stderr.)
+
+\b -M option to generate Makefile dependencies (based on code from Alex
+  Verstak.)
+
+\b \c{%undef} preprocessor directive, and -u option, that undefines a
+  single-line macro.
+
+\b OS/2 Makefile (Mkfiles/Makefile.os2) for Borland under OS/2; from
+  Chuck Crayne.
+
+\b Various minor bugfixes (reported by):
+  - Dangling \c{%s} in preproc.c (Martin Junker)
+
+\b THERE ARE KNOWN BUGS IN SSE AND THE OTHER KATMAI INSTRUCTIONS.  I am
+  on a trip and didn't bring the Katmai instruction reference, so I
+  can't work on them right now.
+
+\b Updated the License file per agreement with Simon and Jules to
+  include a GPL distribution clause.
+
+
+\S{cl-0.98p3.7} Version 0.98p3.7
+
+\b (Hopefully) fixed the canned Makefiles to include the outrdf2 and
+  zoutieee modules.
+
+\b Renamed changes.asm to changed.asm.
+
+
+\S{cl-0.98p3.6} Version 0.98p3.6
+
+\b Fixed a bunch of instructions that were added in 0.98p3.5 which had
+  memory operands, and the address-size prefix was missing from the
+  instruction pattern.
+
+
+\S{cl-0.98p3.5} Version 0.98p3.5
+
+\b Merged in changes from John S. Fine's 0.98-J5 release.  John's based
+  0.98-J5 on my 0.98p3.3 release; this merges the changes.
+
+\b Expanded the instructions flag field to a long so we can fit more
+  flags; mark SSE (KNI) and AMD or Katmai-specific instructions as
+  such.
+
+\b Fix the "PRIV" flag on a bunch of instructions, and create new
+  "PROT" flag for protected-mode-only instructions (orthogonal to if
+  the instruction is privileged!) and new "SMM" flag for SMM-only
+  instructions.
+
+\b Added AMD-only SYSCALL and SYSRET instructions.
+
+\b Make SSE actually work, and add new Katmai MMX instructions.
+
+\b Added a -p (preferred vendor) option to ndisasm so that it can
+  distinguish e.g. Cyrix opcodes also used in SSE.  For example:
+
+\c      ndisasm -p cyrix aliased.bin
+\c      00000000  670F514310        paddsiw mm0,ebx+0x10
+\c      00000005  670F514320        paddsiw mm0,ebx+0x20
+\c      ndisasm -p intel aliased.bin
+\c      00000000  670F514310        sqrtps xmm0,ebx+0x10
+\c      00000005  670F514320        sqrtps xmm0,ebx+0x20
+
+\b Added a bunch of Cyrix-specific instructions.
+
+
+\S{cl-0.98p3.4} Version 0.98p3.4
+
+\b Made at least an attempt to modify all the additional Makefiles (in
+  the Mkfiles directory).  I can't test it, but this was the best I
+  could do.
+
+\b DOS DJGPP+"Opus Make" Makefile from John S. Fine.
+
+\b changes.asm changes from John S. Fine.
+
+
+\S{cl-0.98p3.3} Version 0.98p3.3
+
+\b Patch from Conan Brink to allow nesting of \c{%rep} directives.
+
+\b If we're going to allow INT01 as an alias for INT1/ICEBP (one of
+  Jules 0.98p3 changes), then we should allow INT03 as an alias for INT3
+  as well.
+
+\b Updated changes.asm to include the latest changes.
+
+\b Tried to clean up the <CR>s that had snuck in from a DOS/Windows
+  environment into my Unix environment, and try to make sure than
+  DOS/Windows users get them back.
+
+\b We would silently generate broken tools if insns.dat wasn't sorted
+  properly.  Change insns.pl so that the order doesn't matter.
+
+\b Fix bug in insns.pl (introduced by me) which would cause conditional
+  instructions to have an extra "cc" in disassembly, e.g. "jnz"
+  disassembled as "jccnz".
+
+
+\S{cl-0.98p3.2} Version 0.98p3.2
+
+\b Merged in John S. Fine's changes from his 0.98-J4 prerelease; see
+  http://www.csoft.net/cz/johnfine/
+
+\b Changed previous "spotless" Makefile target (appropriate for distribution)
+  to "distclean", and added "cleaner" target which is same as "clean"
+  except deletes files generated by Perl scripts; "spotless" is union.
+
+\b Removed BASIC programs from distribution.  Get a Perl interpreter
+  instead (see below.)
+
+\b Calling this "pre-release 3.2" rather than "p3-hpa2" because of
+  John's contributions.
+
+\b Actually link in the IEEE output format (zoutieee.c); fix a bunch of
+  compiler warnings in that file.  Note I don't know what IEEE output
+  is supposed to look like, so these changes were made "blind".
+
+
+\S{cl-0.98p3-hpa} Version 0.98p3-hpa
+
+\b Merged nasm098p3.zip with nasm-0.97.tar.gz to create a fully
+  buildable version for Unix systems (Makefile.in updates, etc.)
+
+\b Changed insns.pl to create the instruction tables in nasm.h and
+  names.c, so that a new instruction can be added by adding it *only*
+  to insns.dat.
+
+\b Added the following new instructions: SYSENTER, SYSEXIT, FXSAVE,
+  FXRSTOR, UD1, UD2 (the latter two are two opcodes that Intel
+  guarantee will never be used; one of them is documented as UD2 in
+  Intel documentation, the other one just as "Undefined Opcode" --
+  calling it UD1 seemed to make sense.)
+
+\b MAX_SYMBOL was defined to be 9, but LOADALL286 and LOADALL386 are 10
+  characters long.  Now MAX_SYMBOL is derived from insns.dat.
+
+\b A note on the BASIC programs included: forget them.  insns.bas is
+  already out of date.  Get yourself a Perl interpreter for your
+  platform of choice at
+  \W{http://www.cpan.org/ports/index.html}{http://www.cpan.org/ports/index.html}.
+
+
+\S{cl-0.98p3} Version 0.98 pre-release 3
+
+\b added response file support, improved command line handling, new layout
+help screen
+
+\b fixed limit checking bug, 'OUT byte nn, reg' bug, and a couple of rdoff
+related bugs, updated Wishlist; 0.98 Prerelease 3.
+
+
+\S{cl-0.98p2} Version 0.98 pre-release 2
+
+\b fixed bug in outcoff.c to do with truncating section names longer
+than 8 characters, referencing beyond end of string; 0.98 pre-release 2
+
+
+\S{cl-0.98p1} Version 0.98 pre-release 1
+
+\b Fixed a bug whereby STRUC didn't work at all in RDF.
+
+\b Fixed a problem with group specification in PUBDEFs in OBJ.
+
+\b Improved ease of adding new output formats. Contribution due to
+Fox Cutter.
+
+\b Fixed a bug in relocations in the `bin' format: was showing up when
+a relocatable reference crossed an 8192-byte boundary in any output
+section.
+
+\b Fixed a bug in local labels: local-label lookups were inconsistent
+between passes one and two if an EQU occurred between the definition
+of a global label and the subsequent use of a local label local to
+that global.
+
+\b Fixed a seg-fault in the preprocessor (again) which happened when
+you use a blank line as the first line of a multi-line macro
+definition and then defined a label on the same line as a call to
+that macro.
+
+\b Fixed a stale-pointer bug in the handling of the NASM environment
+variable. Thanks to Thomas McWilliams.
+
+\b ELF had a hard limit on the number of sections which caused
+segfaults when transgressed. Fixed.
+
+\b Added ability for ndisasm to read from stdin by using `-' as the
+filename.
+
+\b ndisasm wasn't outputting the TO keyword. Fixed.
+
+\b Fixed error cascade on bogus expression in \c{%if} - an error in
+evaluation was causing the entire \c{%if} to be discarded, thus creating
+trouble later when the \c{%else} or \c{%endif} was encountered.
+
+\b Forward reference tracking was instruction-granular not operand-
+granular, which was causing 286-specific code to be generated
+needlessly on code of the form `shr word forwardref,1'. Thanks to
+Jim Hague for sending a patch.
+
+\b All messages now appear on stdout, as sending them to stderr serves
+no useful purpose other than to make redirection difficult.
+
+\b Fixed the problem with EQUs pointing to an external symbol - this
+now generates an error message.
+
+\b Allowed multiple size prefixes to an operand, of which only the first
+is taken into account.
+
+\b Incorporated John Fine's changes, including fixes of a large number
+of preprocessor bugs, some small problems in OBJ, and a reworking of
+label handling to define labels before their line is assembled, rather
+than after.
+
+\b Reformatted a lot of the source code to be more readable. Included
+'coding.txt' as a guideline for how to format code for contributors.
+
+\b Stopped nested \c{%reps} causing a panic - they now cause a slightly more
+friendly error message instead.
+
+\b Fixed floating point constant problems (patch by Pedro Gimeno)
+
+\b Fixed the return value of insn_size() not being checked for -1, indicating
+an error.
+
+\b Incorporated 3Dnow! instructions.
+
+\b Fixed the 'mov eax, eax + ebx' bug.
+
+\b Fixed the GLOBAL EQU bug in ELF. Released developers release 3.
+
+\b Incorporated John Fine's command line parsing changes
+
+\b Incorporated David Lindauer's OMF debug support
+
+\b Made changes for LCC 4.0 support (\c{__NASM_CDecl__}, removed register size
+specification warning when sizes agree).
+
+
+\H{cl-0.9x} NASM 0.9 Series
+
+Revisions before 0.98.
+
+
+\S{cl-0.97} Version 0.97 released December 1997
+
+\b This was entirely a bug-fix release to 0.96, which seems to have got
+cursed. Silly me.
+
+\b Fixed stupid mistake in OBJ which caused `MOV EAX,<constant>' to
+fail. Caused by an error in the `MOV EAX,<segment>' support.
+
+\b ndisasm hung at EOF when compiled with lcc on Linux because lcc on
+Linux somehow breaks feof(). ndisasm now does not rely on feof().
+
+\b A heading in the documentation was missing due to a markup error in
+the indexing. Fixed.
+
+\b Fixed failure to update all pointers on realloc() within extended-
+operand code in parser.c. Was causing wrong behaviour and seg faults
+on lines such as `dd 0.0,0.0,0.0,0.0,...'
+
+\b Fixed a subtle preprocessor bug whereby invoking one multi-line
+macro on the first line of the expansion of another, when the second
+had been invoked with a label defined before it, didn't expand the
+inner macro.
+
+\b Added internal.doc back in to the distribution archives - it was
+missing in 0.96 *blush*
+
+\b Fixed bug causing 0.96 to be unable to assemble its own test files,
+specifically objtest.asm. *blush again*
+
+\b Fixed seg-faults and bogus error messages caused by mismatching
+\c{%rep} and \c{%endrep} within multi-line macro definitions.
+
+\b Fixed a problem with buffer overrun in OBJ, which was causing
+corruption at ends of long PUBDEF records.
+
+\b Separated DOS archives into main-program and documentation to reduce
+download size.
+
+
+\S{cl-0.96} Version 0.96 released November 1997
+
+\b Fixed a bug whereby, if `nasm sourcefile' would cause a filename
+collision warning and put output into `nasm.out', then `nasm
+sourcefile -o outputfile' still gave the warning even though the
+`-o' was honoured.
+Fixed name pollution under Digital UNIX: one of its header files
+defined R_SP, which broke the enum in nasm.h.
+
+\b Fixed minor instruction table problems: FUCOM and FUCOMP didn't have
+two-operand forms; NDISASM didn't recognise the longer register
+forms of PUSH and POP (eg FF F3 for PUSH BX); TEST mem,imm32 was
+flagged as undocumented; the 32-bit forms of CMOV had 16-bit operand
+size prefixes; `AAD imm' and `AAM imm' are no longer flagged as
+undocumented because the Intel Architecture reference documents
+them.
+
+\b Fixed a problem with the local-label mechanism, whereby strange
+types of symbol (EQUs, auto-defined OBJ segment base symbols)
+interfered with the `previous global label' value and screwed up
+local labels.
+
+\b Fixed a bug whereby the stub preprocessor didn't communicate with
+the listing file generator, so that the -a and -l options in
+conjunction would produce a useless listing file.
+
+\b Merged `os2' object file format back into `obj', after discovering
+that `obj' _also_ shouldn't have a link pass separator in a module
+containing a non-trivial MODEND. Flat segments are now declared
+using the FLAT attribute. `os2' is no longer a valid object format
+name: use `obj'.
+
+\b Removed the fixed-size temporary storage in the evaluator. Very very
+long expressions (like `mov ax,1+1+1+1+...' for two hundred 1s or
+so) should now no longer crash NASM.
+
+\b Fixed a bug involving segfaults on disassembly of MMX instructions,
+by changing the meaning of one of the operand-type flags in nasm.h.
+This may cause other apparently unrelated MMX problems; it needs to
+be tested thoroughly.
+
+\b Fixed some buffer overrun problems with large OBJ output files.
+Thanks to DJ Delorie for the bug report and fix.
+
+\b Made preprocess-only mode actually listen to the \c{%line} markers as it
+prints them, so that it can report errors more sanely.
+
+\b Re-designed the evaluator to keep more sensible track of expressions
+involving forward references: can now cope with previously-nightmare
+situations such as:
+
+\c   mov ax,foo | bar
+\c   foo equ 1
+\c   bar equ 2
+
+\b Added the ALIGN and ALIGNB standard macros.
+
+\b Added PIC support in ELF: use of WRT to obtain the four extra
+relocation types needed.
+
+\b Added the ability for output file formats to define their own
+extensions to the GLOBAL, COMMON and EXTERN directives.
+
+\b Implemented common-variable alignment, and global-symbol type and
+size declarations, in ELF.
+
+\b Implemented NEAR and FAR keywords for common variables, plus
+far-common element size specification, in OBJ.
+
+\b Added a feature whereby EXTERNs and COMMONs in OBJ can be given a
+default WRT specification (either a segment or a group).
+
+\b Transformed the Unix NASM archive into an auto-configuring package.
+
+\b Added a sanity-check for people applying SEG to things which are
+already segment bases: this previously went unnoticed by the SEG
+processing and caused OBJ-driver panics later.
+
+\b Added the ability, in OBJ format, to deal with `MOV EAX,<segment>'
+type references: OBJ doesn't directly support dword-size segment
+base fixups, but as long as the low two bytes of the constant term
+are zero, a word-size fixup can be generated instead and it will
+work.
+
+\b Added the ability to specify sections' alignment requirements in
+Win32 object files and pure binary files.
+
+\b Added preprocess-time expression evaluation: the \c{%assign} (and
+\c{%iassign}) directive and the bare \c{%if} (and \c{%elif}) conditional. Added
+relational operators to the evaluator, for use only in \c{%if}
+constructs: the standard relationals = < > <= >= <> (and C-like
+synonyms == and !=) plus low-precedence logical operators &&, ^^ and
+||.
+
+\b Added a preprocessor repeat construct: \c{%rep} / \c{%exitrep} / \c{%endrep}.
+
+\b Added the __FILE__ and __LINE__ standard macros.
+
+\b Added a sanity check for number constants being greater than
+0xFFFFFFFF. The warning can be disabled.
+
+\b Added the %0 token whereby a variadic multi-line macro can tell how
+many parameters it's been given in a specific invocation.
+
+\b Added \c{%rotate}, allowing multi-line macro parameters to be cycled.
+
+\b Added the `*' option for the maximum parameter count on multi-line
+macros, allowing them to take arbitrarily many parameters.
+
+\b Added the ability for the user-level forms of EXTERN, GLOBAL and
+COMMON to take more than one argument.
+
+\b Added the IMPORT and EXPORT directives in OBJ format, to deal with
+Windows DLLs.
+
+\b Added some more preprocessor \c{%if} constructs: \c{%ifidn} / \c{%ifidni} (exact
+textual identity), and \c{%ifid} / \c{%ifnum} / \c{%ifstr} (token type testing).
+
+\b Added the ability to distinguish SHL AX,1 (the 8086 version) from
+SHL AX,BYTE 1 (the 286-and-upwards version whose constant happens to
+be 1).
+
+\b Added NetBSD/FreeBSD/OpenBSD's variant of a.out format, complete
+with PIC shared library features.
+
+\b Changed NASM's idiosyncratic handling of FCLEX, FDISI, FENI, FINIT,
+FSAVE, FSTCW, FSTENV, and FSTSW to bring it into line with the
+otherwise accepted standard. The previous behaviour, though it was a
+deliberate feature, was a deliberate feature based on a
+misunderstanding. Apologies for the inconvenience.
+
+\b Improved the flexibility of ABSOLUTE: you can now give it an
+expression rather than being restricted to a constant, and it can
+take relocatable arguments as well.
+
+\b Added the ability for a variable to be declared as EXTERN multiple
+times, and the subsequent definitions are just ignored.
+
+\b We now allow instruction prefixes (CS, DS, LOCK, REPZ etc) to be
+alone on a line (without a following instruction).
+
+\b Improved sanity checks on whether the arguments to EXTERN, GLOBAL
+and COMMON are valid identifiers.
+
+\b Added misc/exebin.mac to allow direct generation of .EXE files by
+hacking up an EXE header using DB and DW; also added test/binexe.asm
+to demonstrate the use of this. Thanks to Yann Guidon for
+contributing the EXE header code.
+
+\b ndisasm forgot to check whether the input file had been successfully
+opened. Now it does. Doh!
+
+\b Added the Cyrix extensions to the MMX instruction set.
+
+\b Added a hinting mechanism to allow EAX+EBX and EBX+EAX to be
+assembled differently. This is important since ESI+EBP and
+EBP+ESI have different default base segment registers.
+
+\b Added support for the PharLap OMF extension for 4096-byte segment
+alignment.
+
+
+\S{cl-0.95 released July 1997} Version 0.95 released July 1997
+
+\b Fixed yet another ELF bug. This one manifested if the user relied on
+the default segment, and attempted to define global symbols without
+first explicitly declaring the target segment.
+
+\b Added makefiles (for NASM and the RDF tools) to build Win32 console
+apps under Symantec C++. Donated by Mark Junker.
+
+\b Added `macros.bas' and `insns.bas', QBasic versions of the Perl
+scripts that convert `standard.mac' to `macros.c' and convert
+`insns.dat' to `insnsa.c' and `insnsd.c'. Also thanks to Mark
+Junker.
+
+\b Changed the diassembled forms of the conditional instructions so
+that JB is now emitted as JC, and other similar changes. Suggested
+list by Ulrich Doewich.
+
+\b Added `@' to the list of valid characters to begin an identifier
+with.
+
+\b Documentary changes, notably the addition of the `Common Problems'
+section in nasm.doc.
+
+\b Fixed a bug relating to 32-bit PC-relative fixups in OBJ.
+
+\b Fixed a bug in perm_copy() in labels.c which was causing exceptions
+in cleanup_labels() on some systems.
+
+\b Positivity sanity check in TIMES argument changed from a warning to
+an error following a further complaint.
+
+\b Changed the acceptable limits on byte and word operands to allow
+things like `~10111001b' to work.
+
+\b Fixed a major problem in the preprocessor which caused seg-faults if
+macro definitions contained blank lines or comment-only lines.
+
+\b Fixed inadequate error checking on the commas separating the
+arguments to `db', `dw' etc.
+
+\b Fixed a crippling bug in the handling of macros with operand counts
+defined with a `+' modifier.
+
+\b Fixed a bug whereby object file formats which stored the input file
+name in the output file (such as OBJ and COFF) weren't doing so
+correctly when the output file name was specified on the command
+line.
+
+\b Removed INC and INCLUDE support for good, since they were
+obsolete anyway.
+
+\b Fixed a bug in OBJ which caused all fixups to be output in 16-bit
+(old-format) FIXUPP records, rather than putting the 32-bit ones in
+FIXUPP32 (new-format) records.
+
+\b Added, tentatively, OS/2 object file support (as a minor variant on
+OBJ).
+
+\b Updates to Fox Cutter's Borland C makefile, Makefile.bc2.
+
+\b Removed a spurious second fclose() on the output file.
+
+\b Added the `-s' command line option to redirect all messages which
+would go to stderr (errors, help text) to stdout instead.
+
+\b Added the `-w' command line option to selectively suppress some
+classes of assembly warning messages.
+
+\b Added the `-p' pre-include and `-d' pre-define command-line options.
+
+\b Added an include file search path: the `-i' command line option.
+
+\b Fixed a silly little preprocessor bug whereby starting a line with a
+`%!' environment-variable reference caused an `unknown directive'
+error.
+
+\b Added the long-awaited listing file support: the `-l' command line
+option.
+
+\b Fixed a problem with OBJ format whereby, in the absence of any
+explicit segment definition, non-global symbols declared in the
+implicit default segment generated spurious EXTDEF records in the
+output.
+
+\b Added the NASM environment variable.
+
+\b From this version forward, Win32 console-mode binaries will be
+included in the DOS distribution in addition to the 16-bit binaries.
+Added Makefile.vc for this purpose.
+
+\b Added `return 0;' to test/objlink.c to prevent compiler warnings.
+
+\b Added the __NASM_MAJOR__ and __NASM_MINOR__ standard defines.
+
+\b Added an alternative memory-reference syntax in which prefixing an
+operand with `&' is equivalent to enclosing it in square brackets,
+at the request of Fox Cutter.
+
+\b Errors in pass two now cause the program to return a non-zero error
+code, which they didn't before.
+
+\b Fixed the single-line macro cycle detection, which didn't work at
+all on macros with no parameters (caused an infinite loop). Also
+changed the behaviour of single-line macro cycle detection to work
+like cpp, so that macros like `extrn' as given in the documentation
+can be implemented.
+
+\b Fixed the implementation of WRT, which was too restrictive in that
+you couldn't do `mov ax,di+abc wrt dgroup' because (di+abc) wasn't
+a relocatable reference.
+
+
+\S{cl-0.94 released April 1997} Version 0.94 released April 1997
+
+
+\b Major item: added the macro processor.
+
+\b Added undocumented instructions SMI, IBTS, XBTS and LOADALL286. Also
+reorganised CMPXCHG instruction into early-486 and Pentium forms.
+Thanks to Thobias Jones for the information.
+
+\b Fixed two more stupid bugs in ELF, which were causing `ld' to
+continue to seg-fault in a lot of non-trivial cases.
+
+\b Fixed a seg-fault in the label manager.
+
+\b Stopped FBLD and FBSTP from _requiring_ the TWORD keyword, which is
+the only option for BCD loads/stores in any case.
+
+\b Ensured FLDCW, FSTCW and FSTSW can cope with the WORD keyword, if
+anyone bothers to provide it. Previously they complained unless no
+keyword at all was present.
+
+\b Some forms of FDIV/FDIVR and FSUB/FSUBR were still inverted: a
+vestige of a bug that I thought had been fixed in 0.92. This was
+fixed, hopefully for good this time...
+
+\b Another minor phase error (insofar as a phase error can _ever_ be
+minor) fixed, this one occurring in code of the form
+
+\c   rol ax,forward_reference
+\c   forward_reference equ 1
+
+\b The number supplied to TIMES is now sanity-checked for positivity,
+and also may be greater than 64K (which previously didn't work on
+16-bit systems).
+
+\b Added Watcom C makefiles, and misc/pmw.bat, donated by Dominik Behr.
+
+\b Added the INCBIN pseudo-opcode.
+
+\b Due to the advent of the preprocessor, the INCLUDE and INC
+directives have become obsolete. They are still supported in this
+version, with a warning, but won't be in the next.
+
+\b Fixed a bug in OBJ format, which caused incorrect object records to
+be output when absolute labels were made global.
+
+\b Updates to RDOFF subdirectory, and changes to outrdf.c.
+
+
+\S{cl-0.93 released January 1997} Version 0.93 released January 1997
+
+This release went out in a great hurry after semi-crippling bugs
+were found in 0.92.
+
+\b Really \e{did} fix the stack overflows this time. *blush*
+
+\b Had problems with EA instruction sizes changing between passes, when
+an offset contained a forward reference and so 4 bytes were
+allocated for the offset in pass one; by pass two the symbol had
+been defined and happened to be a small absolute value, so only 1
+byte got allocated, causing instruction size mismatch between passes
+and hence incorrect address calculations. Fixed.
+
+\b Stupid bug in the revised ELF section generation fixed (associated
+string-table section for .symtab was hard-coded as 7, even when this
+didn't fit with the real section table). Was causing `ld' to
+seg-fault under Linux.
+
+\b Included a new Borland C makefile, Makefile.bc2, donated by Fox
+Cutter <lmb@comtch.iea.com>.
+
+
+\S{cl-0.92 released January 1997} Version 0.92 released January 1997
+
+\b The FDIVP/FDIVRP and FSUBP/FSUBRP pairs had been inverted: this was
+fixed. This also affected the LCC driver.
+
+\b Fixed a bug regarding 32-bit effective addresses of the form
+\c{other_register+ESP}.
+
+\b Documentary changes, notably documentation of the fact that Borland
+Win32 compilers use `obj' rather than `win32' object format.
+
+\b Fixed the COMENT record in OBJ files, which was formatted
+incorrectly.
+
+\b Fixed a bug causing segfaults in large RDF files.
+
+\b OBJ format now strips initial periods from segment and group
+definitions, in order to avoid complications with the local label
+syntax.
+
+\b Fixed a bug in disassembling far calls and jumps in NDISASM.
+
+\b Added support for user-defined sections in COFF and ELF files.
+
+\b Compiled the DOS binaries with a sensible amount of stack, to
+prevent stack overflows on any arithmetic expression containing
+parentheses.
+
+\b Fixed a bug in handling of files that do not terminate in a newline.
+
+
+\S{cl-0.91 released November 1996} Version 0.91 released November 1996
+
+\b Loads of bug fixes.
+
+\b Support for RDF added.
+
+\b Support for DBG debugging format added.
+
+\b Support for 32-bit extensions to Microsoft OBJ format added.
+
+\b Revised for Borland C: some variable names changed, makefile added.
+
+\b LCC support revised to actually work.
+
+\b JMP/CALL NEAR/FAR notation added.
+
+\b `a16', `o16', `a32' and `o32' prefixes added.
+
+\b Range checking on short jumps implemented.
+
+\b MMX instruction support added.
+
+\b Negative floating point constant support added.
+
+\b Memory handling improved to bypass 64K barrier under DOS.
+
+\b \c{$} prefix to force treatment of reserved words as identifiers added.
+
+\b Default-size mechanism for object formats added.
+
+\b Compile-time configurability added.
+
+\b \c{#}, \c{@}, \c{~} and c\{?} are now valid characters in labels.
+
+\b \c{-e} and \c{-k} options in NDISASM added.
+
+
+\S{cl-0.90 released October 1996} Version 0.90 released October 1996
+
+First release version. First support for object file output. Other
+changes from previous version (0.3x) too numerous to document.

_service:tar_scm:nasm-2.16.03.tar.xz/doc/findfont.ph Added

@@ -0,0 +1,182 @@
+#!/usr/bin/perl
+## --------------------------------------------------------------------------
+##
+##   Copyright 1996-2017 The NASM Authors - All Rights Reserved
+##   See the file AUTHORS included with the NASM distribution for
+##   the specific copyright holders.
+##
+##   Redistribution and use in source and binary forms, with or without
+##   modification, are permitted provided that the following
+##   conditions are met:
+##
+##   * Redistributions of source code must retain the above copyright
+##     notice, this list of conditions and the following disclaimer.
+##   * Redistributions in binary form must reproduce the above
+##     copyright notice, this list of conditions and the following
+##     disclaimer in the documentation and/or other materials provided
+##     with the distribution.
+##
+##     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+##     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+##     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+##     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+##     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+##     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+##     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+##     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+##     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+##     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+##     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+##     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+##     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+##
+## --------------------------------------------------------------------------
+
+#
+# Try our best to find a specific PostScipt font in the system.
+# We need to find the font files so we can extract the metrics.
+# Sadly there isn't any reasonable Perl module to do this for us,
+# as far as I can tell.
+#
+
+use strict;
+use File::Spec;
+use File::Find;
+
+require 'afmmetrics.ph';
+require 'ttfmetrics.ph';
+
+my %font_info_hash = ();
+my $fonts_scanned = 0;
+my %prefs = { 'otf' => 1, 'ttf' => 2, 'pfa' => 3, 'pfb' => 4 };
+
+sub add_file_to_font_hash($) {
+    my($filename) = @_;
+
+    return unless ( -f $filename );
+    return unless ( $filename =~ /^(.*)\.(:alnum:+)$/ );
+
+    my $filestem = $1;
+    my $fonttype = $2;
+    my $fontdata;
+
+    if ( $filename =~ /\.(otf|ttf)$/i ) {
+        $fontdata = parse_ttf_file($filename);
+    } elsif ( $filename =~ /\.(pfa|pfb)$/i ) {
+        if ( -f "${filestem}.afm" ) {
+            $fontdata = parse_afm_file($filestem, $fonttype);
+        }
+    }
+
+    return unless (defined($fontdata));
+
+    $fontdata->{filename} = $filename;
+    
+    my $oldinfo = $font_info_hash{$fontdata->{name}};
+
+    if (!defined($oldinfo) ||
+        $prefs{$fontdata->{type}} < $prefs{$oldinfo->{type}}) {
+        $font_info_hash{$fontdata->{name}} = $fontdata;
+    }
+}
+
+my $win32_ok = eval {
+    require Win32::TieRegistry;
+    Win32::TieRegistry->import();
+    1;
+};
+
+# Based on Font::TTF::Win32 by
+# Martin Hosken <http://scripts.sil.org/FontUtils>.
+# LICENSING
+#
+#   Copyright (c) 1998-2014, SIL International (http://www.sil.org)
+#
+#   This module is released under the terms of the Artistic License 2.0.
+#   For details, see the full text of the license in the file LICENSE.
+sub scanfonts_win32() {
+    return unless ($win32_ok);
+
+    my $Reg = $::Registry->Open('', {Access=>'KEY_READ', Delimiter=>'/'});
+    my $fd;
+    foreach my $win ('Windows NT', 'Windows') {
+	$fd = $Reg->{"HKEY_LOCAL_MACHINE/SOFTWARE/Microsoft/$win/CurrentVersion/Fonts"};
+        last if (defined($fd));
+    }
+    return unless (defined($fd));
+
+    foreach my $font (keys(%$fd)) {
+        my($fname, $ftype) = ($font =~ m:^/(.+?)(| $^\($+\))$:);
+        next unless ($ftype =~ / $(TrueType|OpenType)$$/);
+        my $file = File::Spec->rel2abs($fd->{$font}, $ENV{'windir'}.'\\fonts');
+        add_file_to_font_hash($file);
+    }
+}
+
+sub font_search_file {
+    add_file_to_font_hash($_);
+}
+
+sub findfont($) {
+    my($fontname) = @_;
+    my $win32 = eval {
+	require Font::TTF::Win32;
+	Font::TTF::Win32->import();
+	1;
+    };
+    my($file, $psname, $fontdata);
+
+    if (exists($font_info_hash{$fontname})) {
+	return $font_info_hash{$fontname};
+    }
+
+    # Are we on a system that uses fontconfig?
+    # NOTE: use a single string for the command here, or this
+    # script dies horribly on Windows, even though this isn't really
+    # applicable there...
+    if (open(my $fh, '-|',
+	     "fc-match -f \"%{file}\\n%{postscriptname}\\n\" ".
+	     "\" : postscriptname=$fontname\"")) {
+        chomp($file = <$fh>);
+        chomp($psname = <$fh>);
+        close($fh);
+        if ( -f $file ) {
+            if ($psname eq $fontname) {
+                add_file_to_font_hash($file);
+            }
+            if (!exists($font_info_hash{$fontname})) {
+                $font_info_hash{$fontname} = undef;
+            }
+            return $font_info_hash{$fontname};
+        }
+    }
+
+    if (exists($font_info_hash{$fontname})) {
+        return $font_info_hash{$fontname};
+    } elsif ($fonts_scanned >= 1) {
+        return $font_info_hash{$fontname} = undef;
+    }
+
+    scanfonts_win32();
+    $fonts_scanned = 1;
+
+    if (exists($font_info_hash{$fontname})) {
+        return $font_info_hash{$fontname};
+    } elsif ($fonts_scanned >= 2) {
+        return $font_info_hash{$fontname} = undef;
+    }
+
+    # Search a set of possible locations for a file, from a few different
+    # systems...
+    my @dirs = ('fonts', '/usr/share/fonts', '/usr/lib/fonts', '/Library/Fonts');
+    push @dirs, $ENV{'windir'}.'\\fonts' if (defined $ENV{'windir'});
+    push @dirs, $ENV{'HOME'}.'/.fonts', $ENV{'HOME'}.'/Library/Fonts'
+	if (defined $ENV{'HOME'});
+
+    find({wanted => \&font_search_file, follow=>1, no_chdir=>1}, @dirs);
+    $fonts_scanned = 2;
+
+    return $font_info_hash{$fontname};
+}
+
+1;

_service:tar_scm:nasm-2.16.03.tar.xz/doc/genps.pl Added

@@ -0,0 +1,1340 @@
+#!/usr/bin/perl
+## --------------------------------------------------------------------------
+##
+##   Copyright 1996-2020 The NASM Authors - All Rights Reserved
+##   See the file AUTHORS included with the NASM distribution for
+##   the specific copyright holders.
+##
+##   Redistribution and use in source and binary forms, with or without
+##   modification, are permitted provided that the following
+##   conditions are met:
+##
+##   * Redistributions of source code must retain the above copyright
+##     notice, this list of conditions and the following disclaimer.
+##   * Redistributions in binary form must reproduce the above
+##     copyright notice, this list of conditions and the following
+##     disclaimer in the documentation and/or other materials provided
+##     with the distribution.
+##
+##     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+##     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+##     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+##     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+##     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+##     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+##     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+##     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+##     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+##     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+##     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+##     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+##     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+##
+## --------------------------------------------------------------------------
+
+#
+# Format the documentation as PostScript
+#
+
+use File::Spec;
+
+require 'psfonts.ph';		# The fonts we want to use
+require 'pswidth.ph';		# PostScript string width
+require 'findfont.ph';		# Find fonts in the system
+
+sub basename($) {
+    my($path) = @_;
+    my($vol,$dir,$file) = File::Spec->splitpath($path);
+    return $file;
+}
+
+#
+# Document formatting parameters
+#
+%psconf = (
+    pagewidth => 595,    # Page width in PostScript points
+    pageheight => 792,	# Page height in PostScript points
+    lmarg => 72*1.25,	# Left margin in PostScript points
+    rmarg => 72,		# Right margin in PostScript points
+    topmarg => 72,	# Top margin in PostScript points
+    botmarg => 72,	# Bottom margin in PostScript points
+    plmarg => 72*0.25,	# Page number position relative to left margin
+    prmarg => 0,		# Page number position relative to right margin
+    pymarg => 24,	# Page number position relative to bot margin
+    startcopyright => 75, # How much above the bottom margin is the
+    # copyright notice stuff
+    bulladj => 12,	# How much to indent a bullet/indented paragraph
+    tocind => 12,	# TOC indentation per level
+    tocpnz => 24,	# Width of TOC page number only zone
+    tocdots => 8,	# Spacing between TOC dots
+    idxspace => 24,	# Minimum space between index title and pg#
+    idxindent => 24,	# How much to indent a subindex entry
+    idxgutter => 24,	# Space between index columns
+    idxcolumns => 2,	# Number of index columns
+
+    paraskip => 6,		# Space between paragraphs
+    chapstart => 30,		# Space before a chapter heading
+    chapskip => 24,		# Space after a chapter heading
+    tocskip => 6,		# Space between TOC entries
+    );
+
+%psbool = (
+    colorlinks => 0,	# Set links in blue rather than black
+    );
+
+# Known paper sizes
+%papersizes = (
+    'a5'     => 421, 595, # ISO half paper size
+    'b5'     => 501, 709, # ISO small paper size
+    'a4'     => 595, 842, # ISO standard paper size
+    'letter' => 612, 792, # US common paper size
+    'pa4'    => 595, 792, # Compromise ("portable a4")
+    'b4'     => 709,1002, # ISO intermediate paper size
+    'legal'  => 612,1008, # US intermediate paper size
+    'a3'     => 842,1190, # ISO double paper size
+    '11x17'  => 792,1224, # US double paper size
+    );
+
+# Canned header file
+$headps = 'head.ps';
+
+# Directories
+$fontsdir = 'fonts';
+$epsdir   = File::Spec->curdir();
+
+#
+# Parse the command line
+#
+undef $input, $fontpath, $fontmap;
+while ( $arg = shift(@ARGV) ) {
+    if ( $arg =~ /^\-(|no\-)(.*)$/ ) {
+	$parm = $2;
+	$true = ($1 eq '') ? 1 : 0;
+	if ( $true && defined($papersizes{$parm}) ) {
+	    $psconf{pagewidth}  = $papersizes{$parm}->0;
+	    $psconf{pageheight} = $papersizes{$parm}->1;
+	} elsif ( defined($psbool{$parm}) ) {
+	    $psbool{$parm} = $true;
+	} elsif ( $true && defined($psconf{$parm}) ) {
+	    $psconf{$parm} = shift(@ARGV);
+	} elsif ( $true && $parm =~ /^(title|subtitle|year|author|license)$/ ) {
+	    $metadata{$parm} = shift(@ARGV);
+	} elsif ( $true && $parm eq 'fontsdir' ) {
+	    $fontsdir = shift(@ARGV);
+	} elsif ( $true && $parm eq 'epsdir' ) {
+	    $epsdir = shift(@ARGV);
+	} elsif ( $true && $parm eq 'headps' ) {
+	    $headps = shift(@ARGV);
+	} elsif ( $true && $parm eq 'fontpath' ) {
+	    $fontpath = shift(@ARGV);
+	} elsif ( $true && $parm eq 'fontmap' ) {
+	    $fontmap = shift(@ARGV);
+	} else {
+	    die "$0: Unknown option: $arg\n";
+	}
+    } else {
+	$input = $arg;
+    }
+}
+
+# Generate a PostScript string
+sub ps_string($) {
+    my ($s) = @_;
+    my ($i,$c);
+    my ($o) = '(';
+    my ($l) = length($s);
+    for ( $i = 0 ; $i < $l ; $i++ ) {
+	$c = substr($s,$i,1);
+	if ( ord($c) < 32 || ord($c) > 126 ) {
+	    $o .= sprintf("\\%03o", ord($c));
+	} elsif ( $c eq '(' || $c eq ')' || $c eq "\\" ) {
+	    $o .= "\\".$c;
+	} else {
+	    $o .= $c;
+	}
+    }
+    return $o.')';
+}
+
+# Configure post-paragraph skips for each kind of paragraph
+# (subject to modification above)
+%skiparray = ('chap' => $psconf{chapskip},
+	      'appn' => $psconf{chapstart},
+	      'head' => $psconf{paraskip},
+	      'subh' => $psconf{paraskip},
+	      'norm' => $psconf{paraskip},
+	      'bull' => $psconf{paraskip},
+	      'indt' => $psconf{paraskip},
+	      'bquo' => $psconf{paraskip},
+	      'code' => $psconf{paraskip},
+	      'toc0' => $psconf{tocskip},
+	      'toc1' => $psconf{tocskip},
+	      'toc2' => $psconf{tocskip}
+    );
+
+# Read the font metrics files, and update @AllFonts
+# Get the list of fonts used
+%ps_all_fonts = ();
+%ps_font_subst = ();
+foreach my $fset ( @AllFonts ) {
+    foreach my $font ( @{$fset->{fonts}} ) {
+	my $fdata;
+	my @flist = @{$font->1};
+	my $fname;
+	while (defined($fname = shift(@flist))) {
+	    $fdata = findfont($fname);
+	    last if (defined($fdata));
+	}
+	if (!defined($fdata)) {
+	    die "$infile: no font found of: ".
+		join(', ', @{$font->1}), "\n".
+		"Install one of these fonts or update psfonts.ph\n";
+	}
+	$ps_all_fonts{$fname} = $fdata;
+	$font->1 = $fdata;
+    }
+}
+
+# Create a font path. At least some versions of Ghostscript
+# don't seem to get it right any other way.
+if (defined($fontpath)) {
+    my %fontdirs = ();
+    foreach my $fname (sort keys(%ps_all_fonts)) {
+	my $fdata = $ps_all_fonts{$fname};
+	if (defined($fdata->{filename})) {
+	    my($vol,$dir,$basename) =
+		File::Spec->splitpath(File::Spec->rel2abs($fdata->{filename}));
+	    $dir = File::Spec->catpath($vol, $dir, '');
+	    $fontdirs{$dir}++;
+	}
+    }
+    open(my $fp, '>', $fontpath) or die "$0: $fontpath: $!\n";
+    foreach $d (sort(keys(%fontdirs))) {
+	print $fp $d, "\n";
+    }
+    close($fp);
+}
+
+# Create a Fontmap. At least some versions of Ghostscript
+# don't seem to get it right any other way.
+if (defined($fontmap)) {
+    open(my $fm, '>', $fontmap) or die "$0: $fontmap: $!\n";
+    foreach my $fname (sort keys(%ps_all_fonts)) {
+	my $fdata = $ps_all_fonts{$fname};
+	if (defined($fdata->{filename})) {
+	    print $fm '/', $fname, ' ', ps_string($fdata->{filename}), " ;\n";
+	}
+    }
+    close($fp);
+}
+
+# Custom encoding vector.  This is basically the same as
+# ISOLatin1Encoding (a level 2 feature, so we dont want to use it),
+# but with the "naked" accents at \200-\237 moved to the \000-\037
+# range (ASCII control characters), and a few extra characters thrown
+# in.  It is basically a modified Windows 1252 codepage, minus, for
+# now, the euro sign (\200 is reserved for euro.)
+
+@NASMEncoding =
+(
+ undef, undef, undef, undef, undef, undef, undef, undef, undef, undef,
+ undef, undef, undef, undef, undef, undef, 'dotlessi', 'grave',
+ 'acute', 'circumflex', 'tilde', 'macron', 'breve', 'dotaccent',
+ 'dieresis', undef, 'ring', 'cedilla', undef, 'hungarumlaut',
+ 'ogonek', 'caron', 'space', 'exclam', 'quotedbl', 'numbersign',
+ 'dollar', 'percent', 'ampersand', 'quoteright', 'parenleft',
+ 'parenright', 'asterisk', 'plus', 'comma', 'hyphen', 'period',
+ 'slash', 'zero', 'one', 'two', 'three', 'four', 'five', 'six',
+ 'seven', 'eight', 'nine', 'colon', 'semicolon', 'less', 'equal',
+ 'greater', 'question', 'at', 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H',
+ 'I', 'J', 'K', 'L', 'M', 'N', 'O', 'P', 'Q', 'R', 'S', 'T', 'U', 'V',
+ 'W', 'X', 'Y', 'Z', 'bracketleft', 'backslash', 'bracketright',
+ 'asciicircum', 'underscore', 'quoteleft', 'a', 'b', 'c', 'd', 'e',
+ 'f', 'g', 'h', 'i', 'j', 'k', 'l', 'm', 'n', 'o', 'p', 'q', 'r', 's',
+ 't', 'u', 'v', 'w', 'x', 'y', 'z', 'braceleft', 'bar', 'braceright',
+ 'asciitilde', undef, undef, undef, 'quotesinglbase', 'florin',
+ 'quotedblbase', 'ellipsis', 'dagger', 'dbldagger', 'circumflex',
+ 'perthousand', 'Scaron', 'guilsinglleft', 'OE', undef, 'Zcaron',
+ undef, undef, 'grave', 'quotesingle', 'quotedblleft',
+ 'quotedblright', 'bullet', 'endash', 'emdash', 'tilde', 'trademark',
+ 'scaron', 'guilsignlright', 'oe', undef, 'zcaron', 'Ydieresis',
+ 'space', 'exclamdown', 'cent', 'sterling', 'currency', 'yen',
+ 'brokenbar', 'section', 'dieresis', 'copyright', 'ordfeminine',
+ 'guillemotleft', 'logicalnot', 'minus', 'registered', 'macron',
+ 'degree', 'plusminus', 'twosuperior', 'threesuperior', 'acute', 'mu',
+ 'paragraph', 'periodcentered', 'cedilla', 'onesuperior',
+ 'ordmasculine', 'guillemotright', 'onequarter', 'onehalf',
+ 'threequarters', 'questiondown', 'Agrave', 'Aacute', 'Acircumflex',
+ 'Atilde', 'Adieresis', 'Aring', 'AE', 'Ccedilla', 'Egrave', 'Eacute',
+ 'Ecircumflex', 'Edieresis', 'Igrave', 'Iacute', 'Icircumflex',
+ 'Idieresis', 'Eth', 'Ntilde', 'Ograve', 'Oacute', 'Ocircumflex',
+ 'Otilde', 'Odieresis', 'multiply', 'Oslash', 'Ugrave', 'Uacute',
+ 'Ucircumflex', 'Udieresis', 'Yacute', 'Thorn', 'germandbls',
+ 'agrave', 'aacute', 'acircumflex', 'atilde', 'adieresis', 'aring',
+ 'ae', 'ccedilla', 'egrave', 'eacute', 'ecircumflex', 'edieresis',
+ 'igrave', 'iacute', 'icircumflex', 'idieresis', 'eth', 'ntilde',
+ 'ograve', 'oacute', 'ocircumflex', 'otilde', 'odieresis', 'divide',
+ 'oslash', 'ugrave', 'uacute', 'ucircumflex', 'udieresis', 'yacute',
+ 'thorn', 'ydieresis'
+);
+
+# Name-to-byte lookup hash
+%charcode = ();
+for ( $i = 0 ; $i < 256 ; $i++ ) {
+    $charcode{$NASMEncoding$i} = chr($i);
+}
+
+#
+# First, format the stuff coming from the front end into
+# a cleaner representation
+#
+if ( defined($input) ) {
+    open(PARAS, '<', $input) or
+	die "$0: cannot open $input: $!\n";
+} else {
+    # stdin
+    open(PARAS, '<-') or die "$0: $!\n";
+}
+while ( defined($line = <PARAS>) ) {
+    chomp $line;
+    $data = <PARAS>;
+    chomp $data;
+    if ( $line =~ /^meta :(.*)$/ ) {
+	$metakey = $1;
+	$metadata{$metakey} = $data;
+    } elsif ( $line =~ /^indx :(.*)$/ ) {
+	$ixentry = $1;
+	push(@ixentries, $ixentry);
+	$ixterms{$ixentry} = split(/\037/, $data);
+	# Look for commas.  This is easier done on the string
+	# representation, so do it now.
+	if ( $data =~ /^(.*)\,\037sp\037/ ) {
+	    $ixprefix = $1;
+	    $ixprefix =~ s/\037n $//; # Discard possible font change at end
+	    $ixhasprefix{$ixentry} = $ixprefix;
+	    if ( !$ixprefixes{$ixprefix} ) {
+		$ixcommafirst{$ixentry}++;
+	    }
+	    $ixprefixes{$ixprefix}++;
+	} else {
+	    # A complete term can also be used as a prefix
+	    $ixprefixes{$data}++;
+	}
+    } else {
+	push(@ptypes, $line);
+	push(@paras, split(/\037/, $data));
+    }
+}
+close(PARAS);
+
+#
+# Convert an integer to a chosen base
+#
+sub int2base($$) {
+    my($i,$b) = @_;
+    my($s) = '';
+    my($n) = '';
+    my($z) = '0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ';
+    return '0' if ($i == 0);
+    if ( $i < 0 ) { $n = '-'; $i = -$i; }
+    while ( $i ) {
+	$s = substr($z,$i%$b,1) . $s;
+	$i = int($i/$b);
+    }
+    return $n.$s;
+}
+
+#
+# Convert a string to a rendering array
+#
+sub string2array($)
+{
+    my($s) = @_;
+    my(@a) = ();
+
+    $s =~ s/\B\-\-\B/$charcode{'emdash'}/g;
+    $s =~ s/\B\-\B/ $charcode{'endash'} /g;
+
+    while ( $s =~ /^(\s+|\S+)(.*)$/ ) {
+	push(@a, 0,$1);
+	$s = $2;
+    }
+
+    return @a;
+}
+
+#
+# Take a cross-reference name and generate the PostScript name for it.
+#
+# This hack produces a somewhat smaller PDF...
+#%ps_xref_list = ();
+#$ps_xref_next = 0;
+#sub ps_xref($) {
+#    my($s) = @_;
+#    my $q = $ps_xref_list{$s};
+#    return $q if ( defined($ps_xref_list{$s}) );
+#    $q = 'X'.int2base($ps_xref_next++, 52);
+#    $ps_xref_list{$s} = $q;
+#    return $q;
+#}
+
+# Somewhat bigger PDF, but one which obeys # URLs
+sub ps_xref($) {
+    return @_0;
+}
+
+#
+# Flow lines according to a particular font set and width
+#
+# A "font set" is represented as an array containing
+# arrays of pairs: <size>, <metricref>
+#
+# Each line is represented as:
+#  type,first|last,aux,fontset,page,ypos,optional col,
+#   rendering array 
+#
+# A space character may be "squeezed" by up to this much
+# (as a fraction of the normal width of a space.)
+#
+$ps_space_squeeze = 0.00;	# Min space width 100%
+sub ps_flow_lines($$$@) {
+    my($wid, $fontset, $type, @data) = @_;
+    my($fonts) = $$fontset{fonts};
+    my($e);
+    my($w)  = 0;		# Width of current line
+    my($sw) = 0;		# Width of current line due to spaces
+    my(@l)  = ();		# Current line
+    my(@ls) = ();		# Accumulated output lines
+    my(@xd) = ();		# Metadata that goes with subsequent text
+    my $hasmarker = 0;		# Line has -6 marker
+    my $pastmarker = 0;		# -6 marker found
+
+    # If there is a -6 marker anywhere in the paragraph,
+    # *each line* output needs to have a -6 marker
+    foreach $e ( @data ) {
+	$hasmarker = 1 if ( $$e0 == -6 );
+    }
+
+    $w = 0;
+    foreach $e ( @data ) {
+	if ( $$e0 < 0 ) {
+	    # Type is metadata.  Zero width.
+	    if ( $$e0 == -6 ) {
+		$pastmarker = 1;
+	    }
+	    if ( $$e0 == -1 || $$e0 == -6 ) {
+		# -1 (end anchor) or -6 (marker) goes with the preceding
+		# text, otherwise with the subsequent text
+		push(@l, $e);
+	    } else {
+		push(@xd, $e);
+	    }
+	} else {
+	    my $ew = ps_width($$e1, $fontset->{fonts}->$$e01,
+			      \@NASMEncoding) *
+		($fontset->{fonts}->$$e00);
+	    my $sp = $$e1;
+	    $sp =~ tr/^ //d;	# Delete nonspaces
+	    my $esw = ps_width($sp, $fontset->{fonts}->$$e01,
+			       \@NASMEncoding) *
+		($fontset->{fonts}->$$e00);
+
+	    if ( ($w+$ew) - $ps_space_squeeze*($sw+$esw) > $wid ) {
+		# Begin new line
+		# Search backwards for previous space chunk
+		my $lx = scalar(@l)-1;
+		my @rm = ();
+		while ( $lx >= 0 ) {
+		    while ( $lx >= 0 && $l$lx->0 < 0 ) {
+			# Skip metadata
+			$pastmarker = 0 if ( $l$lx->0 == -6 );
+			$lx--;
+		    };
+		    if ( $lx >= 0 ) {
+			if ( $l$lx->1 eq ' ' ) {
+			    splice(@l, $lx, 1);
+			    @rm = splice(@l, $lx);
+			    last; # Found place to break
+			} else {
+			    $lx--;
+			}
+		    }
+		}
+
+		# Now @l contains the stuff to remain on the old line
+		# If we broke the line inside a link, then split the link
+		# into two.
+		my $lkref = undef;
+		foreach my $lc ( @l ) {
+		    if ( $$lc0 == -2 || $$lc0 == -3 || $lc0 == -7 ) {
+			$lkref = $lc;
+		    } elsif ( $$lc0 == -1 ) {
+			undef $lkref;
+		    }
+		}
+
+		if ( defined($lkref) ) {
+		    push(@l, -1,undef); # Terminate old reference
+		    unshift(@rm, $lkref); # Duplicate reference on new line
+		}
+
+		if ( $hasmarker ) {
+		    if ( $pastmarker ) {
+			unshift(@rm,-6,undef); # New line starts with marker
+		    } else {
+			push(@l,-6,undef); # Old line ends with marker
+		    }
+		}
+
+		push(@ls, $type,0,undef,$fontset,0,0,@l);
+		@l = @rm;
+
+		$w = $sw = 0;
+		# Compute the width of the remainder array
+		for my $le ( @l ) {
+		    if ( $$le0 >= 0 ) {
+			my $xew = ps_width($$le1,
+					   $fontset->{fonts}->$$le01,
+					   \@NASMEncoding) *
+			    ($fontset->{fonts}->$$le00);
+			my $xsp = $$le1;
+			$xsp =~ tr/^ //d;	# Delete nonspaces
+			my $xsw = ps_width($xsp,
+					   $fontset->{fonts}->$$le01,
+					   \@NASMEncoding) *
+			    ($fontset->{fonts}->$$le00);
+			$w += $xew;  $sw += $xsw;
+		    }
+		}
+	    }
+	    push(@l, @xd);	# Accumulated metadata
+	    @xd = ();
+	    if ( $$e1 ne '' ) {
+		push(@l, $e);
+		$w += $ew; $sw += $esw;
+	    }
+	}
+    }
+    push(@l,@xd);
+    if ( scalar(@l) ) {
+	push(@ls, $type,0,undef,$fontset,0,0,@l);	# Final line
+    }
+
+    # Mark the first line as first and the last line as last
+    if ( scalar(@ls) ) {
+	$ls0->0->1 |= 1;	   # First in para
+	$ls-1->0->1 |= 2;    # Last in para
+    }
+    return @ls;
+}
+
+#
+# Once we have broken things into lines, having multiple chunks
+# with the same font index is no longer meaningful.  Merge
+# adjacent chunks to keep down the size of the whole file.
+#
+sub ps_merge_chunks(@) {
+    my(@ci) = @_;
+    my($c, $lc);
+    my(@co, $eco);
+
+    undef $lc;
+    @co = ();
+    $eco = -1;			# Index of the last entry in @co
+    foreach $c ( @ci ) {
+	if ( defined($lc) && $$c0 == $lc && $$c0 >= 0 ) {
+	    $co$eco->1 .= $$c1;
+	} else {
+	    push(@co, $c);  $eco++;
+	    $lc = $$c0;
+	}
+    }
+    return @co;
+}
+
+#
+# Convert paragraphs to rendering arrays.  Each
+# element in the array contains (font, string),
+# where font can be one of:
+# -1 end link
+# -2 begin crossref
+# -3 begin weblink
+# -4 index item anchor
+# -5 crossref anchor
+# -6 left/right marker (used in the index)
+# -7 page link (used in the index)
+#  0 normal
+#  1 empatic (italic)
+#  2 code (fixed spacing)
+#
+
+sub mkparaarray($@) {
+    my($ptype, @chunks) = @_;
+
+    my @para = ();
+    my $in_e = 0;
+    my $chunk;
+
+    if ( $ptype =~ /^code/ ) {
+	foreach $chunk ( @chunks ) {
+	    push(@para, 2, $chunk);
+	}
+    } else {
+	foreach $chunk ( @chunks ) {
+	    my $type = substr($chunk,0,2);
+	    my $text = substr($chunk,2);
+
+	    if ( $type eq 'sp' ) {
+		push(@para, $in_e?1:0, ' ');
+	    } elsif ( $type eq 'da' ) {
+		push(@para, $in_e?1:0, $charcode{'endash'});
+	    } elsif ( $type eq 'n ' ) {
+		push(@para, 0, $text);
+		$in_e = 0;
+	    } elsif ( $type =~ '^e' ) {
+		push(@para, 1, $text);
+		$in_e = ($type eq 'es' || $type eq 'e ');
+	    } elsif ( $type eq 'c ' ) {
+		push(@para, 2, $text);
+		$in_e = 0;
+	    } elsif ( $type eq 'x ' ) {
+		push(@para, -2, ps_xref($text));
+	    } elsif ( $type eq 'xe' ) {
+		push(@para, -1, undef);
+	    } elsif ( $type eq 'wc' || $type eq 'w ' ) {
+		$text =~ /\<(.*)\>(.*)$/;
+		my $link = $1; $text = $2;
+		push(@para, -3, $link);
+		push(@para, ($type eq 'wc') ? 2:0, $text);
+		push(@para, -1, undef);
+		$in_e = 0;
+	    } elsif ( $type eq 'i ' ) {
+		push(@para, -4, $text);
+	    } else {
+		die "Unexpected paragraph chunk: $chunk";
+	    }
+	}
+    }
+    return @para;
+}
+
+$npara = scalar(@paras);
+for ( $i = 0 ; $i < $npara ; $i++ ) {
+    $paras$i = mkparaarray($ptypes$i, @{$paras$i});
+}
+
+#
+# This converts a rendering array to a simple string
+#
+sub ps_arraytostr(@) {
+    my $s = '';
+    my $c;
+    foreach $c ( @_ ) {
+	$s .= $$c1 if ( $$c0 >= 0 );
+    }
+    return $s;
+}
+
+#
+# This generates a duplicate of a paragraph
+#
+sub ps_dup_para(@) {
+    my(@i) = @_;
+    my(@o) = ();
+    my($c);
+
+    foreach $c ( @i ) {
+	my @cc = @{$c};
+	push(@o, @cc);
+    }
+    return @o;
+}
+
+#
+# This generates a duplicate of a paragraph, stripping anchor
+# tags (-4 and -5)
+#
+sub ps_dup_para_noanchor(@) {
+    my(@i) = @_;
+    my(@o) = ();
+    my($c);
+
+    foreach $c ( @i ) {
+	my @cc = @{$c};
+	push(@o, @cc) unless ( $cc0 == -4 || $cc0 == -5 );
+    }
+    return @o;
+}
+
+#
+# Scan for header paragraphs and fix up their contents;
+# also generate table of contents and PDF bookmarks.
+#
+@tocparas = (-5, 'contents', 0,'Contents');
+@tocptypes = ('chap');
+@bookmarks = ('title', 0, 'Title', 'contents', 0, 'Contents');
+%bookref = ();
+for ( $i = 0 ; $i < $npara ; $i++ ) {
+    my $xtype = $ptypes$i;
+    my $ptype = substr($xtype,0,4);
+    my $str;
+    my $book;
+
+    if ( $ptype eq 'chap' || $ptype eq 'appn' ) {
+	unless ( $xtype =~ /^\S+ (\S+) :(.*)$/ ) {
+	    die "Bad para";
+	}
+	my $secn = $1;
+	my $sech = $2;
+	my $xref = ps_xref($sech);
+	my $chap = ($ptype eq 'chap')?'Chapter':'Appendix';
+
+	$book = $xref, 0, ps_arraytostr(@{$paras$i});
+	push(@bookmarks, $book);
+	$bookref{$secn} = $book;
+
+	push(@tocparas, ps_dup_para_noanchor(@{$paras$i}));
+	push(@tocptypes, 'toc0'.' :'.$sech.':'.$chap.' '.$secn.':');
+
+	unshift(@{$paras$i},
+		-5, $xref, 0,$chap.' '.$secn.':', 0, ' ');
+    } elsif ( $ptype eq 'head' || $ptype eq 'subh' ) {
+	unless ( $xtype =~ /^\S+ (\S+) :(.*)$/ ) {
+	    die "Bad para";
+	}
+	my $secn = $1;
+	my $sech = $2;
+	my $xref = ps_xref($sech);
+	my $pref;
+	$pref = $secn; $pref =~ s/\.^\.+$//; # Find parent node
+
+	$book = $xref, 0, ps_arraytostr(@{$paras$i});
+	push(@bookmarks, $book);
+	$bookref{$secn} = $book;
+	$bookref{$pref}->1--;	# Adjust count for parent node
+
+	push(@tocparas, ps_dup_para_noanchor(@{$paras$i}));
+	push(@tocptypes,
+	     (($ptype eq 'subh') ? 'toc2':'toc1').' :'.$sech.':'.$secn);
+
+	unshift(@{$paras$i}, -5, $xref);
+    }
+}
+
+#
+# Add TOC to beginning of paragraph list
+#
+unshift(@paras,  @tocparas);  undef @tocparas;
+unshift(@ptypes, @tocptypes); undef @tocptypes;
+
+#
+# Add copyright notice to the beginning
+#
+@copyright_page =
+(0, $charcode{'copyright'},
+  0, ' ', 0, $metadata{'year'},
+  0, ' ', string2array($metadata{'author'}),
+  0, ' ', string2array($metadata{'copyright_tail'}),
+ string2array($metadata{'license'}),
+ string2array($metadata{'auxinfo'}));
+
+unshift(@paras, @copyright_page);
+unshift(@ptypes, ('norm') x scalar(@copyright_page));
+
+$npara = scalar(@paras);
+
+#
+# No lines generated, yet.
+#
+@pslines    = ();
+
+#
+# Line Auxiliary Information Types
+#
+$AuxStr	    = 1;		# String
+$AuxPage    = 2;		# Page number (from xref)
+$AuxPageStr = 3;		# Page number as a PostScript string
+$AuxXRef    = 4;		# Cross reference as a name
+$AuxNum     = 5;		# Number
+
+#
+# Break or convert paragraphs into lines, and push them
+# onto the @pslines array.
+#
+sub ps_break_lines($$) {
+    my ($paras,$ptypes) = @_;
+
+    my $linewidth  = $psconf{pagewidth}-$psconf{lmarg}-$psconf{rmarg};
+    my $bullwidth  = $linewidth-$psconf{bulladj};
+    my $indxwidth  = ($linewidth-$psconf{idxgutter})/$psconf{idxcolumns}
+                     -$psconf{idxspace};
+
+    my $npara = scalar(@{$paras});
+    my $i;
+
+    for ( $i = 0 ; $i < $npara ; $i++ ) {
+	my $xtype = $ptypes->$i;
+	my $ptype = substr($xtype,0,4);
+	my @data = @{$paras->$i};
+	my @ls = ();
+	if ( $ptype eq 'code' ) {
+	    my $p;
+	    # Code paragraph; each chunk is a line
+	    foreach $p ( @data ) {
+		push(@ls, $ptype,0,undef,\%CodeFont,0,0,$p);
+	    }
+	    $ls0->0->1 |= 1;	     # First in para
+	    $ls-1->0->1 |= 2;      # Last in para
+	} elsif ( $ptype eq 'chap' || $ptype eq 'appn' ) {
+	    # Chapters are flowed normally, but in an unusual font
+	    @ls = ps_flow_lines($linewidth, \%ChapFont, $ptype, @data);
+	} elsif ( $ptype eq 'head' || $ptype eq 'subh' ) {
+	    unless ( $xtype =~ /^\S+ (\S+) :(.*)$/ ) {
+		die "Bad para";
+	    }
+	    my $secn = $1;
+	    my $sech = $2;
+	    my $font = ($ptype eq 'head') ? \%HeadFont : \%SubhFont;
+	    @ls = ps_flow_lines($linewidth, $font, $ptype, @data);
+	    # We need the heading number as auxilary data
+	    $ls0->0->2 = $AuxStr,$secn;
+	} elsif ( $ptype eq 'norm' ) {
+	    @ls = ps_flow_lines($linewidth, \%BodyFont, $ptype, @data);
+	} elsif ( $ptype =~ /^(bull|indt)$/ ) {
+	    @ls = ps_flow_lines($bullwidth, \%BodyFont, $ptype, @data);
+	} elsif ( $ptypq eq 'bquo' ) {
+	    @ls = ps_flow_lines($bullwidth, \%BquoFont, $ptype, @data);
+	} elsif ( $ptype =~ /^toc/ ) {
+	    unless ( $xtype =~/^\S+ :(^:*):(.*)$/ ) {
+		die "Bad para";
+	    }
+	    my $xref = $1;
+	    my $refname = $2.' ';
+	    my $ntoc = substr($ptype,3,1)+0;
+	    my $refwidth = ps_width($refname, $BodyFont{fonts}->01,
+				    \@NASMEncoding) *
+		($BodyFont{fonts}->00);
+
+	    @ls = ps_flow_lines($linewidth-$ntoc*$psconf{tocind}-
+				$psconf{tocpnz}-$refwidth,
+				\%BodyFont, $ptype, @data);
+
+	    # Auxiliary data: for the first line, the cross reference symbol
+	    # and the reference name; for all lines but the first, the
+	    # reference width; and for the last line, the page number
+	    # as a string.
+	    my $nl = scalar(@ls);
+	    $ls0->0->2 = $AuxStr,$refname, $AuxXRef,$xref;
+	    for ( $j = 1 ; $j < $nl ; $j++ ) {
+		$ls$j->0->2 = $AuxNum,$refwidth;
+	    }
+	    push(@{$ls$nl-1->0->2}, $AuxPageStr,$xref);
+	} elsif ( $ptype =~ /^idx/ ) {
+	    my $lvl = substr($ptype,3,1)+0;
+
+	    @ls = ps_flow_lines($indxwidth-$lvl*$psconf{idxindent},
+				\%BodyFont, $ptype, @data);
+	} else {
+	    die "Unknown para type: $ptype";
+	}
+	# Merge adjacent identical chunks
+	foreach $l ( @ls ) {
+	    @{$$l1} = ps_merge_chunks(@{$$l1});
+	}
+	push(@pslines,@ls);
+    }
+}
+
+# Break the main body text into lines.
+ps_break_lines(\@paras, \@ptypes);
+
+#
+# Break lines in to pages
+#
+
+# Where to start on page 2, the copyright page
+$curpage = 2;			# Start on page 2
+$curypos = $psconf{pageheight}-$psconf{topmarg}-$psconf{botmarg}-
+    $psconf{startcopyright};
+undef $columnstart;		# Not outputting columnar text
+undef $curcolumn;		# Current column
+$nlines = scalar(@pslines);
+
+#
+# This formats lines inside the global @pslines array into pages,
+# updating the page and y-coordinate entries.  Start at the
+# $startline position in @pslines and go to but not including
+# $endline.  The global variables $curpage, $curypos, $columnstart
+# and $curcolumn are updated appropriately.
+#
+sub ps_break_pages($$) {
+    my($startline, $endline) = @_;
+
+    # Paragraph types which should never be broken
+    my $nobreakregexp = "^(chap|appn|head|subh|toc.|idx.)\$";
+    # Paragraph types which are heading (meaning they should not be broken
+    # immediately after)
+    my $nobreakafter = "^(chap|appn|head|subh)\$";
+    # Paragraph types which should never be broken *before*, unless
+    # the previous paragraph has the same type
+    my $nobreakbefore = "^idx1-9\$";
+    # Paragraph types which are set in columnar format
+    my $columnregexp = "^idx.\$";
+
+    my $upageheight = $psconf{pageheight}-$psconf{topmarg}-$psconf{botmarg};
+
+    my $i;
+
+    for ( $i = $startline ; $i < $endline ; $i++ ) {
+	my $linfo = $pslines$i->0;
+	if ( ($$linfo0 eq 'chap' || $$linfo0 eq 'appn' )
+	     && ($$linfo1 & 1) ) {
+	    # First line of a new chapter heading.  Start a new page.
+	    undef $columnstart;
+	    $curpage++ if ( $curypos > 0 || defined($columnstart) );
+	    # Always start on an odd page
+	    $curpage |= 1;
+	    $curypos = $chapstart;
+	} elsif ( defined($columnstart) && $$linfo0 !~ /$columnregexp/o ) {
+	    undef $columnstart;
+	    $curpage++;
+	    $curypos = 0;
+	}
+
+	if ( $$linfo0 =~ /$columnregexp/o && !defined($columnstart) ) {
+	    $columnstart = $curypos;
+	    $curcolumn = 0;
+	}
+
+	# Adjust position by the appropriate leading
+	$curypos += $$linfo3->{leading};
+
+	# Record the page and y-position
+	$$linfo4 = $curpage;
+	$$linfo5 = $curypos;
+	$$linfo6 = $curcolumn if ( defined($columnstart) );
+
+	if ( $curypos > $upageheight ) {
+	    # We need to break the page before this line.
+	    my $broken = 0;		# No place found yet
+	    while ( !$broken && $pslines$i->0->4 == $curpage ) {
+		my $linfo = $pslines$i->0;
+		my $pinfo = $pslines$i-1->0;
+
+		if ( $$linfo1 == 2 ) {
+		    # This would be an orphan, don't break.
+		} elsif ( $$linfo1 & 1 ) {
+		    # Sole line or start of paragraph.  Break unless
+		    # the previous line was part of a heading or a comma
+		    # index entry.
+		    $broken = $$pinfo0 !~ /$nobreakafter/o &&
+			($$linfo0 !~ /$nobreakbefore/o ||
+			 $$linfo0 eq $$pinfo0);
+		} else {
+		    # Middle of paragraph.  Break unless we're in a
+		    # no-break paragraph, or the previous line would
+		    # end up being a widow.
+		    $broken = $$linfo0 !~ /$nobreakregexp/o &&
+			$$pinfo1 != 1;
+		}
+		$i--;
+	    }
+	    die "Nowhere to break page $curpage\n" if ( !$broken );
+	    # Now $i should point to line immediately before the break, i.e.
+	    # the next paragraph should be the first on the new page
+	    if ( defined($columnstart) &&
+		 ++$curcolumn < $psconf{idxcolumns} ) {
+		# We're actually breaking text into columns, not pages
+		$curypos = $columnstart;
+	    } else {
+		undef $columnstart;
+		$curpage++;
+		$curypos = 0;
+	    }
+	    next;
+	}
+
+	# Add end of paragraph skip
+	if ( $$linfo1 & 2 ) {
+	    $curypos += $skiparray{$$linfo0};
+	}
+    }
+}
+
+ps_break_pages(0,$nlines);	# Break the main text body into pages
+
+#
+# Find the page number of all the indices
+#
+%ps_xref_page   = ();		# Crossref anchor pages
+%ps_index_pages = ();		# Index item pages
+$nlines = scalar(@pslines);
+for ( $i = 0 ; $i < $nlines ; $i++ ) {
+    my $linfo = $pslines$i->0;
+    foreach my $c ( @{$pslines$i->1} ) {
+	if ( $$c0 == -4 ) {
+	    if ( !defined($ps_index_pages{$$c1}) ) {
+		$ps_index_pages{$$c1} = ;
+	    } elsif ( $ps_index_pages{$$c1}->-1 eq $$linfo4 ) {
+		# Pages are emitted in order; if this is a duplicated
+		# entry it will be the last one
+		next;		# Duplicate
+	    }
+	    push(@{$ps_index_pages{$$c1}}, $$linfo4);
+	} elsif ( $$c0 == -5 ) {
+	    $ps_xref_page{$$c1} = $$linfo4;
+	}
+    }
+}
+
+#
+# Emit index paragraphs
+#
+$startofindex = scalar(@pslines);
+@ixparas = (-5,'index',0,'Index');
+@ixptypes = ('chap');
+
+foreach $k ( @ixentries ) {
+    my $n,$i;
+    my $ixptype = 'idx0';
+    my $prefix = $ixhasprefix{$k};
+    my @ixpara = mkparaarray($ixptype,@{$ixterms{$k}});
+    my $commapos = undef;
+
+    if ( defined($prefix) && $ixprefixes{$prefix} > 1 ) {
+	# This entry has a "hanging comma"
+	for ( $i = 0 ; $i < scalar(@ixpara)-1 ; $i++ ) {
+	    if ( substr($ixpara$i->1,-1,1) eq ',' &&
+		 $ixpara$i+1->1 eq ' ' ) {
+		$commapos = $i;
+		last;
+	    }
+	}
+    }
+    if ( defined($commapos) ) {
+	if ( $ixcommafirst{$k} ) {
+	    # This is the first entry; generate the
+	    # "hanging comma" entry
+	    my @precomma = splice(@ixpara,0,$commapos);
+	    if ( $ixpara0->1 eq ',' ) {
+		shift(@ixpara);	# Discard lone comma
+	    } else {
+		# Discard attached comma
+		$ixpara0->1 =~ s/\,$//;
+		push(@precomma,shift(@ixpara));
+	    }
+	    push(@precomma, -6,undef);
+	    push(@ixparas, @precomma);
+	    push(@ixptypes, $ixptype);
+	    shift(@ixpara);	# Remove space
+	} else {
+	    splice(@ixpara,0,$commapos+2);
+	}
+	$ixptype = 'idx1';
+    }
+
+    push(@ixpara, -6,undef);	# Left/right marker
+    $i = 1;  $n = scalar(@{$ps_index_pages{$k}});
+    foreach $p ( @{$ps_index_pages{$k}} ) {
+	if ( $i++ == $n ) {
+	    push(@ixpara,-7,$p,0,"$p",-1,undef);
+	} else {
+	    push(@ixpara,-7,$p,0,"$p,",-1,undef,0,' ');
+	}
+    }
+
+    push(@ixparas, @ixpara);
+    push(@ixptypes, $ixptype);
+}
+
+#
+# Flow index paragraphs into lines
+#
+ps_break_lines(\@ixparas, \@ixptypes);
+
+#
+# Format index into pages
+#
+$nlines = scalar(@pslines);
+ps_break_pages($startofindex, $nlines);
+
+#
+# Push index onto bookmark list
+#
+push(@bookmarks, 'index', 0, 'Index');
+
+@all_fonts_lst = sort(keys(%ps_all_fonts));
+$all_fonts_str = join(' ', @all_fonts_lst);
+@need_fonts_lst = ();
+foreach my $f (@all_fonts_lst) {
+    push(@need_fonts_lst, $f); # unless (defined($ps_all_fonts{$f}->{file}));
+}
+$need_fonts_str = join(' ', @need_fonts_lst);
+
+# Emit the PostScript DSC header
+print "%!PS-Adobe-3.0\n";
+print "%%Pages: $curpage\n";
+print "%%BoundingBox: 0 0 ", $psconf{pagewidth}, ' ', $psconf{pageheight}, "\n";
+print "%%Creator: ", basename($0), "\n";
+print "%%DocumentData: Clean7Bit\n";
+print "%%DocumentFonts: $all_fonts_str\n";
+print "%%DocumentNeededFonts: $need_fonts_str\n";
+print "%%Orientation: Portrait\n";
+print "%%PageOrder: Ascend\n";
+print "%%EndComments\n";
+print "%%BeginProlog\n";
+
+# Emit the configurables as PostScript tokens
+foreach $c ( keys(%psconf) ) {
+    print "/$c ", $psconf{$c}, " def\n";
+}
+foreach $c ( keys(%psbool) ) {
+    print "/$c ", ($psbool{$c}?'true':'false'), " def\n";
+}
+
+# Embed font data, if applicable
+#foreach my $f (@all_fonts_lst) {
+#    my $fontfile = $all_ps_fonts{$f}->{file};
+#    if (defined($fontfile)) {
+#	if (open(my $fh, '<', $fontfile)) {
+#	    print vector <$fh>;
+#	    close($fh);
+#	}
+#    }
+#}
+
+# Emit custom encoding vector
+$zstr = '/NASMEncoding  ';
+foreach $c ( @NASMEncoding ) {
+    my $z = '/'.(defined($c)?$c:'.notdef ').' ';
+    if ( length($zstr)+length($z) > 72 ) {
+	print $zstr,"\n";
+	$zstr = ' ';
+    }
+    $zstr .= $z;
+}
+print $zstr, " def\n";
+
+# Font recoding routine
+# newname fontname --
+print "/nasmenc {\n";
+print "  findfont dup length dict begin\n";
+print "    { 1 index /FID ne {def}{pop pop} ifelse } forall\n";
+print "    /Encoding NASMEncoding def\n";
+print "    currentdict\n";
+print "  end\n";
+print "  definefont pop\n";
+print "} def\n";
+
+# Emit fontset definitions
+foreach $font ( sort(keys(%ps_all_fonts)) ) {
+    print '/',$font,'-NASM /',$font," nasmenc\n";
+}
+
+foreach $fset ( @AllFonts ) {
+    my $i = 0;
+    my @zfonts = ();
+    foreach $font ( @{$fset->{fonts}} ) {
+	print '/', $fset->{name}, $i, ' ',
+	'/', $font->1->{name}, '-NASM findfont ',
+	$font->0, " scalefont def\n";
+	push(@zfonts, $fset->{name}.$i);
+	$i++;
+    }
+    print '/', $fset->{name}, ' ', join(' ',@zfonts), " def\n";
+}
+
+# This is used by the bullet-paragraph PostScript methods
+print "/bullet ",ps_string($charcode{'bullet'})," def\n";
+
+# Emit the canned PostScript prologue
+open(PSHEAD, '<', $headps)
+    or die "$0: cannot open: $headps: $!\n";
+while ( defined($line = <PSHEAD>) ) {
+    print $line;
+}
+close(PSHEAD);
+print "%%EndProlog\n";
+
+# Generate PDF bookmarks
+print "%%BeginSetup\n";
+foreach $b ( @bookmarks ) {
+    print '/Title ', ps_string($b->2), "\n";
+    print '/Count ', $b->1, ' ' if ( $b->1 );
+    print '/Dest /',$b->0," /OUT pdfmark\n";
+}
+
+# Ask the PostScript interpreter for the proper size media
+print "setpagesize\n";
+print "%%EndSetup\n";
+
+# Start a PostScript page
+sub ps_start_page() {
+    $ps_page++;
+    print "%%Page: $ps_page $ps_page\n";
+    print "%%BeginPageSetup\n";
+    print "save\n";
+    print "%%EndPageSetup\n";
+    print '/', $ps_page, " pa\n";
+}
+
+# End a PostScript page
+sub ps_end_page($) {
+    my($pn) = @_;
+    if ( $pn ) {
+	print "($ps_page)", (($ps_page & 1) ? 'pageodd' : 'pageeven'), "\n";
+    }
+    print "restore showpage\n";
+}
+
+$ps_page = 0;
+
+# Title page
+ps_start_page();
+$title = $metadata{'title'} || '';
+$title =~ s/ \- / $charcode{'endash'} /;
+
+$subtitle = $metadata{'subtitle'} || '';
+$subtitle =~ s/ \- / $charcode{'endash'} /;
+
+# Print title
+print "/ti ", ps_string($title), " def\n";
+print "/sti ", ps_string($subtitle), " def\n";
+print "lmarg pageheight 2 mul 3 div moveto\n";
+print "tfont0 setfont\n";
+print "/title linkdest ti show\n";
+print "lmarg pageheight 2 mul 3 div 10 sub moveto\n";
+print "0 setlinecap 3 setlinewidth\n";
+print "pagewidth lmarg sub rmarg sub 0 rlineto currentpoint stroke moveto\n";
+print "hfont1 setfont sti stringwidth pop neg ",
+    -$HeadFont{leading}, " rmoveto\n";
+print "sti show\n";
+
+# Print logo, if there is one
+# FIX: To be 100% correct, this should look for DocumentNeeded*
+# and DocumentFonts in the header of the EPSF and add those to the
+# global header.
+if ( defined($metadata{epslogo}) &&
+     open(EPS, '<', File::Spec->catfile($epsdir, $metadata{epslogo})) ) {
+    my @eps = ();
+    my ($bbllx,$bblly,$bburx,$bbury) = (undef,undef,undef,undef);
+    my $line;
+    my $scale = 1;
+    my $maxwidth = $psconf{pagewidth}-$psconf{lmarg}-$psconf{rmarg};
+    my $maxheight = $psconf{pageheight}/3-40;
+    my $width, $height;
+    my $x, $y;
+
+    while ( defined($line = <EPS>) ) {
+	last if ( $line =~ /^%%EOF/ );
+	if ( !defined($bbllx) &&
+	     $line =~ /^\%\%BoundingBox\:\s*(0-9\.+)\s+(0-9\.+)\s+(0-9\.+)\s+(0-9\.+)/i ) {
+	    $bbllx = $1+0; $bblly = $2+0;
+	    $bburx = $3+0; $bbury = $4+0;
+	}
+	push(@eps,$line);
+    }
+    close(EPS);
+
+    if ( defined($bbllx) ) {
+	$width = $bburx-$bbllx;
+	$height = $bbury-$bblly;
+
+	if ( $width > $maxwidth ) {
+	    $scale = $maxwidth/$width;
+	}
+	if ( $height*$scale > $maxheight ) {
+	    $scale = $maxheight/$height;
+	}
+
+	$x = ($psconf{pagewidth}-$width*$scale)/2;
+	$y = ($psconf{pageheight}-$height*$scale)/2;
+
+	if ( defined($metadata{logoxadj}) ) {
+	    $x += $metadata{logoxadj};
+	}
+	if ( defined($metadata{logoyadj}) ) {
+	    $y += $metadata{logoyadj};
+	}
+
+	print "BeginEPSF\n";
+	print $x, ' ', $y, " translate\n";
+	print $scale, " dup scale\n" unless ( $scale == 1 );
+	print -$bbllx, ' ', -$bblly, " translate\n";
+	print "$bbllx $bblly moveto\n";
+	print "$bburx $bblly lineto\n";
+	print "$bburx $bbury lineto\n";
+	print "$bbllx $bbury lineto\n";
+	print "$bbllx $bblly lineto clip newpath\n";
+	print "%%BeginDocument: ",ps_string($metadata{epslogo}),"\n";
+	print @eps;
+	print "%%EndDocument\n";
+	print "EndEPSF\n";
+    }
+}
+ps_end_page(0);
+
+# Emit the rest of the document (page 2 and on)
+$curpage = 2;
+ps_start_page();
+foreach $line ( @pslines ) {
+    my $linfo = $line->0;
+
+    while ( $$linfo4 > $curpage ) {
+        ps_end_page($curpage > 2);
+        ps_start_page();
+        $curpage++;
+    }
+
+    print '';
+    my $curfont = 0;
+    foreach my $c ( @{$line->1} ) {
+        if ( $$c0 >= 0 ) {
+	    if ( $curfont != $$c0 ) {
+		print ($curfont = $$c0);
+	    }
+	    print ps_string($$c1);
+	} elsif ( $$c0 == -1 ) {
+	    print '{el}';	# End link
+	} elsif ( $$c0 == -2 ) {
+	    print '{/',$$c1,' xl}'; # xref link
+	} elsif ( $$c0 == -3 ) {
+	    print '{',ps_string($$c1),'wl}'; # web link
+	} elsif ( $$c0 == -4 ) {
+	    # Index anchor -- ignore
+	} elsif ( $$c0 == -5 ) {
+	    print '{/',$$c1,' xa}'; #xref anchor
+	} elsif ( $$c0 == -6 ) {
+	    print '';		# Start a new array
+	    $curfont = 0;
+	} elsif ( $$c0 == -7 ) {
+	    print '{/',$$c1,' pl}'; # page link
+	} else {
+	    die "Unknown annotation";
+	}
+    }
+    print '';
+    if ( defined($$linfo2) ) {
+	foreach my $x ( @{$$linfo2} ) {
+	    if ( $$x0 == $AuxStr ) {
+		print ps_string($$x1);
+	    } elsif ( $$x0 == $AuxPage ) {
+		print $ps_xref_page{$$x1},' ';
+	    } elsif ( $$x0 == $AuxPageStr ) {
+		print ps_string($ps_xref_page{$$x1});
+	    } elsif ( $$x0 == $AuxXRef ) {
+		print '/',ps_xref($$x1),' ';
+	    } elsif ( $$x0 == $AuxNum ) {
+		print $$x1,' ';
+	    } else {
+		die "Unknown auxiliary data type";
+	    }
+	}
+    }
+    print ($psconf{pageheight}-$psconf{topmarg}-$$linfo5);
+    print ' ', $$linfo6 if ( defined($$linfo6) );
+    print ' ', $$linfo0.$$linfo1, "\n";
+}
+
+ps_end_page(1);
+print "%%EOF\n";

_service:tar_scm:nasm-2.16.03.tar.xz/doc/head.ps Added

@@ -0,0 +1,401 @@
+%
+% PostScript header for NASM documentation
+%
+
+% Avoid barfing on old PS implementations
+/pdfmark where
+{pop} {userdict /pdfmark /cleartomark load put} ifelse
+/setpagedevice where
+{pop} {userdict /setpagedevice /pop load put} ifelse
+
+% Useful definition
+/space 32 def
+
+%
+% This asks the PostScript interpreter for the proper size paper
+%
+/setpagesize {
+  1 dict dup /PageSize pagewidth pageheight put setpagedevice
+} def
+
+%
+% Code to handle links
+%
+/min { 2 copy gt { exch } if pop } def
+/max { 2 copy lt { exch } if pop } def
+
+/lkbegun 0 def
+/lktype null def
+/lkury 0 def
+/lkurx 0 def
+/lklly 0 def
+/lkllx 0 def
+/lkxmarg 1 def	% Extra space for link in x dir
+/lkymarg 1 def	% Extra space for link in y dir
+/lktarget () def
+
+% target type --
+/linkbegin {
+  userdict begin
+    /lkbegun 1 def
+    /lktype exch def
+    /lktarget exch def
+    colorlinks { 0 0 0.4 setrgbcolor } if
+  end
+} def
+
+% target --
+/linkbegindest {
+  /Dest linkbegin
+} def
+
+% uristring --
+/linkbeginuri {
+  /URI linkbegin
+} def
+
+% pageno --
+/linkbeginpage {
+  /Page linkbegin
+} def
+
+% string spacepadding --
+/linkshow {
+  userdict begin
+    /lspad exch def /lss exch def
+    lkbegun 0 ne {
+      gsave lss true charpath flattenpath pathbbox grestore
+      lkbegun 1 eq {
+        /lkury exch def
+        lss spacecount lspad mul add /lkurx exch def
+        /lklly exch def
+        /lkllx exch def
+        /lkbegun 2 def
+      } {
+        lkury max /lkury exch def
+        lss spacecount lspad mul add lkurx max /lkurx exch def
+        lklly min /lklly exch def
+        lkllx min /lkllx exch def
+      } ifelse
+    } if
+    lspad 0 space lss widthshow
+  end
+} def
+
+% --
+/linkend {
+  userdict begin
+     lktype /URI eq {
+        /Action 2 dict dup /Subtype /URI put dup /URI lktarget put
+      } {
+	/Dest lktarget
+      } ifelse
+      /Border 0 0 0
+      /Rect  lkllx lkxmarg sub
+              lklly lkymarg sub
+              lkurx lkxmarg add
+              lkury lkymarg add 
+      /Subtype /Link
+      /ANN pdfmark
+    /lkbegun 0 def
+    colorlinks { 0 setgray } if
+  end
+} def
+
+% targetname --
+/linkdest {
+   /Dest 3 -1 roll
+    /View  /XYZ currentpoint null 
+    /DEST pdfmark
+} def
+
+% A "fontset" is an array of fonts; a "stream" is an array of strings
+% and numbers or procedures:
+%  0 (Foo) ( ) (mani) ( ) 1 (padme) 0 ( ) (hum.) 
+% A number choses a font from the current fontset.
+% A procedure is invoked as-is when printing the stream.
+%
+% When printing justified, an equal amount of space is added in
+% between each string.
+
+% string -- spacecount
+% Count space characters in a string
+/spacecount {
+  0 exch {
+    space eq { 1 add } if
+  } forall
+} def
+
+% stream fontset -- spacecount width
+% Get the width of a stream in the given fontset, and the
+% number of space characters in the stream
+/streamwidth {
+  gsave
+    6 dict begin
+      /f exch def
+      /w 0 def
+      /s 0 def
+      f 0 get setfont
+      /integertype {
+        f exch get setfont
+      } def
+      /stringtype {
+        dup stringwidth pop w add /w exch def
+        spacecount s add /s exch def
+      } def
+      /arraytype { pop } def
+      % The input stream is on the top of the stack now
+      {
+        dup type exec
+      } forall
+      s w
+    end
+  grestore
+} def
+
+% stream fontset spacer --
+% Show the stream in the given fontset, but add a certain amount
+% of space to each space character
+/showstreamspc {
+  5 dict begin
+    /spc exch def
+    /f exch def
+    f 0 get setfont
+    /integertype {
+      f exch get setfont
+    } def
+    /stringtype {
+      spc linkshow
+    } def
+    /arraytype {
+      exec
+    } def
+    % Now stream is on the top of the stack
+    {
+      dup type exec
+    } forall
+  end
+} def
+
+% stream fontset --
+% Show the stream in the given fontset, with no extra spacing
+/showstream {
+  0 showstreamspc
+} def
+
+% stream fontset totalspace --
+% Show the stream justified to fit into a certain number of pixels
+/showstreamjust {
+  userdict begin
+    /ts exch def /fs exch def /st exch def
+      st fs
+        st fs streamwidth ts exch sub exch
+	dup 0 gt { div } { pop } ifelse
+      showstreamspc
+    end
+} def
+
+/bullmarg lmarg bulladj add def
+/lwidth pagewidth lmarg sub rmarg sub def
+/bwidth lwidth bulladj sub def
+
+%
+% The various paragraph types
+% The number at the end indicates start (1) of para, end (2) of para
+%
+/chapline {
+	currentpoint exch pop 10 sub lmarg exch moveto
+	0 setlinecap 3 setlinewidth
+	lwidth 0 rlineto stroke
+} def
+
+/chap0 { lmarg exch moveto cfont lwidth showstreamjust } def
+/chap1 { lmarg exch moveto cfont lwidth showstreamjust } def
+/chap2 { lmarg exch moveto cfont showstream chapline } def
+/chap3 { lmarg exch moveto cfont showstream chapline } def
+
+/appn0 {chap0} def
+/appn1 {chap1} def
+/appn2 {chap2} def
+/appn3 {chap3} def
+
+% lbl ypos fontset -- ypos
+/headlbl {
+  3 -1 roll exch (  ) exch % ypos strm fontset
+  2 copy % ypos strm fontset strm fontset
+  streamwidth % ypos strm fontset spccount width
+  lmarg exch sub % ypos strm fontset spccount xpos
+  4 index % ypos strm fontset spccount xpos ypos
+  moveto % ypos strm fontset spccount
+  pop % ypos strm fontset spccount
+  showstream % ypos
+} def
+
+/head0 { lmarg exch moveto hfont lwidth showstreamjust } def
+/head1 { hfont headlbl lmarg exch moveto hfont lwidth showstreamjust } def
+/head2 { lmarg exch moveto hfont showstream } def
+/head3 { hfont headlbl lmarg exch moveto hfont showstream } def
+
+/subh0 { lmarg exch moveto sfont lwidth showstreamjust } def
+/subh1 { sfont headlbl lmarg exch moveto sfont lwidth showstreamjust } def
+/subh2 { lmarg exch moveto sfont showstream } def
+/subh3 { sfont headlbl lmarg exch moveto sfont showstream } def
+
+/norm0 { lmarg exch moveto bfont lwidth showstreamjust } def
+/norm1 { lmarg exch moveto bfont lwidth showstreamjust } def
+/norm2 { lmarg exch moveto bfont showstream } def
+/norm3 { lmarg exch moveto bfont showstream } def
+
+/code0 { lmarg exch moveto xfont showstream } def
+/code1 { lmarg exch moveto xfont showstream } def
+/code2 { lmarg exch moveto xfont showstream } def
+/code3 { lmarg exch moveto xfont showstream } def
+
+/bull0 { bullmarg exch moveto bfont bwidth showstreamjust } def
+/bull1 { dup lmarg exch moveto bullet bfont showstream
+	 bullmarg exch moveto bfont bwidth showstreamjust } def
+/bull2 { bullmarg exch moveto bfont showstream } def
+/bull3 { dup lmarg exch moveto bullet bfont showstream
+	 bullmarg exch moveto bfont showstream } def
+
+/indt0 { bullmarg exch moveto bfont bwidth showstreamjust } def
+/indt1 { bullmarg exch moveto bfont bwidth showstreamjust } def
+/indt2 { bullmarg exch moveto bfont showstream } def
+/indt3 { bullmarg exch moveto bfont showstream } def
+
+/bquo0 { bullmarg exch moveto qfont bwidth showstreamjust } def
+/bquo1 { bullmarg exch moveto qfont bwidth showstreamjust } def
+/bquo2 { bullmarg exch moveto qfont showstream } def
+/bquo3 { bullmarg exch moveto qfont showstream } def
+
+/tocw0 lwidth tocpnz sub def
+/tocw1 tocw0 tocind sub def
+/tocw2 tocw1 tocind sub def
+
+/tocx0 lmarg def
+/tocx1 tocx0 tocind add def
+/tocx2 tocx1 tocind add def
+
+/tocpn {
+  bfont0 setfont
+  3 dict begin
+    /s exch def
+    /x s stringwidth pop pagewidth rmarg sub exch sub def
+    currentpoint /y exch def
+    lmarg sub tocdots div ceiling tocdots mul lmarg add
+    tocdots x {
+      y moveto (.) 0 linkshow
+    } for
+    x y moveto s 0 linkshow
+  end
+  linkend
+} def
+
+/toc00 { tocx0 exch moveto 0 rmoveto bfont showstream } def
+/toc01 { tocx0 exch moveto
+	 linkbegindest bfont0 setfont 0 linkshow bfont showstream } def
+/toc02 { tocx0 exch moveto 3 1 roll
+	 0 rmoveto bfont showstream tocpn } def
+/toc03 { tocx0 exch moveto 4 1 roll
+	 linkbegindest bfont0 setfont 0 linkshow bfont showstream tocpn } def
+
+/toc10 { tocx1 exch moveto 0 rmoveto bfont showstream } def
+/toc11 { tocx1 exch moveto
+	 linkbegindest bfont0 setfont 0 linkshow bfont showstream } def
+/toc12 { tocx1 exch moveto 3 1 roll
+	 0 rmoveto bfont showstream tocpn } def
+/toc13 { tocx1 exch moveto 4 1 roll
+	 linkbegindest bfont0 setfont 0 linkshow bfont showstream tocpn } def
+
+/toc20 { tocx2 exch moveto 0 rmoveto bfont showstream } def
+/toc21 { tocx2 exch moveto
+	 linkbegindest bfont0 setfont 0 linkshow bfont showstream } def
+/toc22 { tocx2 exch moveto 3 1 roll
+	 0 rmoveto bfont showstream tocpn } def
+/toc23 { tocx2 exch moveto 4 1 roll
+	 linkbegindest bfont0 setfont 0 linkshow bfont showstream tocpn } def
+
+% Spacing between index columns
+/indexcolumn pagewidth lmarg sub rmarg sub idxgutter add idxcolumns div def
+% Width of an individual index column
+/indexcolwid indexcolumn idxgutter sub def
+
+/idx03 {
+  2 dict begin
+    indexcolumn mul lmarg add
+    /x exch def /y exch def x y moveto
+    exch bfont showstream
+    dup bfont streamwidth
+    x indexcolwid add exch sub exch pop y moveto
+    bfont showstream
+  end
+} def
+/idx00 {idx03} def
+/idx01 {idx03} def
+/idx02 {idx03} def
+
+/idx13 {
+  2 dict begin
+    indexcolumn mul lmarg add idxindent add
+    /x exch def /y exch def x y moveto
+    exch bfont showstream
+    dup bfont streamwidth
+    x indexcolwid idxindent sub add exch sub exch pop y moveto
+    bfont showstream
+  end
+} def
+/idx10 {idx13} def
+/idx11 {idx13} def
+/idx12 {idx13} def
+
+%
+% Page numbers
+%
+/pagey botmarg pymarg sub def
+/pagel lmarg plmarg sub def
+/pager pagewidth rmarg sub prmarg add def
+
+/pageeven { pagel pagey moveto bfont1 setfont show } def
+/pageodd  { bfont1 setfont dup stringwidth pop pager exch sub
+	    pagey moveto show } def
+
+%
+% Functions invoked during parsing
+%
+/xa { linkdest } def
+/pa { 0 pageheight moveto linkdest } def
+/xl { linkbegindest } def
+/wl { linkbeginuri } def
+/pl { linkbeginpage } def
+/el { linkend } def
+
+%
+% PDF viewer options
+%
+/PageMode /UseOutlines /DOCVIEW pdfmark	% Display bookmarks
+
+%
+% Functions to include EPS
+%
+/BeginEPSF {
+  /Before_EPSF_State save def
+  /dict_count countdictstack def
+  /op_count count 1 sub def
+  userdict begin
+  /showpage {} def
+  0 setgray 0 setlinecap
+  1 setlinewidth 0 setlinejoin
+  10 setmiterlimit   0 setdash newpath
+  /languagelevel where
+  {
+    pop languagelevel
+    1 ne {
+      false setstrokeadjust false setoverprint
+    } if
+  } if
+} bind def
+/EndEPSF {
+  count op_count sub {pop} repeat
+  countdictstack dict_count sub {end} repeat
+  Before_EPSF_State restore
+} bind def

_service:tar_scm:nasm-2.16.03.tar.xz/doc/inslist.pl Added

@@ -0,0 +1,108 @@
+#!/usr/bin/perl
+## --------------------------------------------------------------------------
+##   
+##   Copyright 1996-2017 The NASM Authors - All Rights Reserved
+##   See the file AUTHORS included with the NASM distribution for
+##   the specific copyright holders.
+##
+##   Redistribution and use in source and binary forms, with or without
+##   modification, are permitted provided that the following
+##   conditions are met:
+##
+##   * Redistributions of source code must retain the above copyright
+##     notice, this list of conditions and the following disclaimer.
+##   * Redistributions in binary form must reproduce the above
+##     copyright notice, this list of conditions and the following
+##     disclaimer in the documentation and/or other materials provided
+##     with the distribution.
+##     
+##     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+##     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+##     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+##     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+##     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+##     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+##     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+##     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+##     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+##     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+##     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+##     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+##     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+##
+## --------------------------------------------------------------------------
+
+#
+# inslist.pl   produce inslist.src
+#
+
+print STDERR "Reading insns.dat...\n";
+
+@args   = ();
+undef $output;
+foreach $arg ( @ARGV ) {
+    if ( $arg =~ /^\-/ ) {
+	if  ( $arg =~ /^\-(adins)$/ ) {
+	    $output = $1;
+	} else {
+	    die "$0: Unknown option: ${arg}\n";
+	}
+    } else {
+	push (@args, $arg);
+    }
+}
+
+$fname = "../insns.dat" unless $fname = $args0;
+open (F, '<', $fname) || die "unable to open $fname";
+print STDERR "Writing inslist.src...\n";
+open S, '>', 'inslist.src';
+$line = 0;
+$insns = 0;
+while (<F>) {
+  $line++;
+  next if (/^\s*$/);		# blank lines
+  if ( /^\s*;/ )		# comments
+  {
+    if ( /^\s*;\#\s*(.+)/ )	# section subheader
+    {
+      print S "\n\\S{} $1\n\n";
+    }
+    next;
+  }
+  chomp;
+  unless (/^\s*(\S+)\s+(\S+)\s+(\S+|\.*\)\s+(\S+)\s*$/) {
+      warn "line $line does not contain four fields\n";
+      next;
+  }
+  my @entry = ($1, $2, $3, $4);
+
+  $entry1 =~ s/ignore//;
+  $entry1 =~ s/void//;
+
+  my @flags = split(/,/, $entry3);
+  my @nflags;
+  undef $isavx512;
+  undef @avx512fl;
+  for my $fl (@flags) {
+      next if ($fl =~ /^(ignore|SB|SM|SM2|SQ|AR2|FUTURE)$/);
+
+      if ($fl =~ /^AVX512(.*)$/) {
+	  $isavx512 = 1;
+	  push(@avx512fl, $1) unless ($1 eq '');
+      } else {
+	  push(@nflags,$fl);
+      }
+  }
+
+  if ($isavx512) {
+      unshift(@nflags, "AVX512".join('/', @avx512fl));
+  }
+
+  printf S "\\c %-16s %-24s %s\n",$entry0,$entry1, join(',', @nflags);
+  $insns++;
+}
+print S "\n";
+close S;
+close F;
+printf STDERR "Done: %d instructions\n", $insns;
+

_service:tar_scm:nasm-2.16.03.tar.xz/doc/internal.doc Added

@@ -0,0 +1,290 @@
+Internals of the Netwide Assembler
+==================================
+
+The Netwide Assembler is intended to be a modular, re-usable x86
+assembler, which can be embedded in other programs, for example as
+the back end to a compiler.
+
+The assembler is composed of modules. The interfaces between them
+look like:
+
+		  +--- preproc.c ----+
+		  |		     |
+		  +---- parser.c ----+
+		  |	   |         |
+		  |     float.c      |
+		  |		     |
+		  +--- assemble.c ---+
+		  |        |         |
+	nasm.c ---+     insnsa.c     +--- nasmlib.c
+		  |		     |
+		  +--- listing.c ----+
+		  |		     |
+		  +---- labels.c ----+
+		  |		     |
+		  +--- outform.c ----+
+		  |		     |
+		  +----- *out.c -----+
+
+In other words, each of `preproc.c', `parser.c', `assemble.c',
+`labels.c', `listing.c', `outform.c' and each of the output format
+modules `*out.c' are independent modules, which do not directly
+inter-communicate except through the main program.
+
+The Netwide *Disassembler* is not intended to be particularly
+portable or reusable or anything, however. So I won't bother
+documenting it here. :-)
+
+nasmlib.c
+---------
+
+This is a library module; it contains simple library routines which
+may be referenced by all other modules. Among these are a set of
+wrappers around the standard `malloc' routines, which will report a
+fatal error if they run out of memory, rather than returning NULL.
+
+preproc.c
+---------
+
+This contains a macro preprocessor, which takes a file name as input
+and returns a sequence of preprocessed source lines. The only symbol
+exported from the module is `nasmpp', which is a data structure of
+type `Preproc', declared in nasm.h. This structure contains pointers
+to all the functions designed to be callable from outside the
+module.
+
+parser.c
+--------
+
+This contains a source-line parser. It parses `canonical' assembly
+source lines, containing some combination of the `label', `opcode',
+`operand' and `comment' fields: it does not process directives or
+macros. It exports two functions: `parse_line' and `cleanup_insn'.
+
+`parse_line' is the main parser function: you pass it a source line
+in ASCII text form, and it returns you an `insn' structure
+containing all the details of the instruction on that line. The
+parameters it requires are:
+
+- The location (segment, offset) where the instruction on this line
+  will eventually be placed. This is necessary in order to evaluate
+  expressions containing the Here token, `$'.
+
+- A function which can be called to retrieve the value of any
+  symbols the source line references.
+
+- Which pass the assembler is on: an undefined symbol only causes an
+  error condition on pass two.
+
+- The source line to be parsed.
+
+- A structure to fill with the results of the parse.
+
+- A function which can be called to report errors.
+
+Some instructions (DB, DW, DD for example) can require an arbitrary
+amount of storage, and so some of the members of the resulting
+`insn' structure will be dynamically allocated. The other function
+exported by `parser.c' is `cleanup_insn', which can be called to
+deallocate any dynamic storage associated with the results of a
+parse.
+
+names.c
+-------
+
+This doesn't count as a module - it defines a few arrays which are
+shared between NASM and NDISASM, so it's a separate file which is
+#included by both parser.c and disasm.c.
+
+float.c
+-------
+
+This is essentially a library module: it exports one function,
+`float_const', which converts an ASCII representation of a
+floating-point number into an x86-compatible binary representation,
+without using any built-in floating-point arithmetic (so it will run
+on any platform, portably). It calls nothing, and is called only by
+`parser.c'. Note that the function `float_const' must be passed an
+error reporting routine.
+
+assemble.c
+----------
+
+This module contains the code generator: it translates `insn'
+structures as returned from the parser module into actual generated
+code which can be placed in an output file. It exports two
+functions, `assemble' and `insn_size'.
+
+`insn_size' is designed to be called on pass one of assembly: it
+takes an `insn' structure as input, and returns the amount of space
+that would be taken up if the instruction described in the structure
+were to be converted to real machine code. `insn_size' also requires
+to be told the location (as a segment/offset pair) where the
+instruction would be assembled, the mode of assembly (16/32 bit
+default), and a function it can call to report errors.
+
+`assemble' is designed to be called on pass two: it takes all the
+parameters that `insn_size' does, but has an extra parameter which
+is an output driver. `assemble' actually converts the input
+instruction into machine code, and outputs the machine code by means
+of calling the `output' function of the driver.
+
+insnsa.c
+--------
+
+This is another library module: it exports one very big array of
+instruction translations. It is generated automatically from the
+insns.dat file by the insns.pl script.
+
+labels.c
+--------
+
+This module contains a label manager. It exports six functions:
+
+`init_labels' should be called before any other function in the
+module. `cleanup_labels' may be called after all other use of the
+module has finished, to deallocate storage.
+
+`define_label' is called to define new labels: you pass it the name
+of the label to be defined, and the (segment,offset) pair giving the
+value of the label. It is also passed an error-reporting function,
+and an output driver structure (so that it can call the output
+driver's label-definition function). `define_label' mentally
+prepends the name of the most recently defined non-local label to
+any label beginning with a period.
+
+`define_label_stub' is designed to be called in pass two, once all
+the labels have already been defined: it does nothing except to
+update the "most-recently-defined-non-local-label" status, so that
+references to local labels in pass two will work correctly.
+
+`declare_as_global' is used to declare that a label should be
+global. It must be called _before_ the label in question is defined.
+
+Finally, `lookup_label' attempts to translate a label name into a
+(segment,offset) pair. It returns non-zero on success.
+
+The label manager module is (theoretically :) restartable: after
+calling `cleanup_labels', you can call `init_labels' again, and
+start a new assembly with a new set of symbols.
+
+listing.c
+---------
+
+This file contains the listing file generator. The interface to the
+module is through the one symbol it exports, `nasmlist', which is a
+structure containing six function pointers. The calling semantics of
+these functions isn't terribly well thought out, as yet, but it
+works (just about) so it's going to get left alone for now...
+
+outform.c
+---------
+
+This small module contains a set of routines to manage a list of
+output formats, and select one given a keyword. It contains three
+small routines: `ofmt_register' which registers an output driver as
+part of the managed list, `ofmt_list' which lists the available
+drivers on stdout, and `ofmt_find' which tries to find the driver
+corresponding to a given name.
+
+The output modules
+------------------
+
+Each of the output modules, `outbin.o', `outelf.o' and so on,
+exports only one symbol, which is an output driver data structure
+containing pointers to all the functions needed to produce output
+files of the appropriate type.
+
+The exception to this is `outcoff.o', which exports _two_ output
+driver structures, since COFF and Win32 object file formats are very
+similar and most of the code is shared between them.
+
+nasm.c
+------
+
+This is the main program: it calls all the functions in the above
+modules, and puts them together to form a working assembler. We
+hope. :-)
+
+Segment Mechanism
+-----------------
+
+In NASM, the term `segment' is used to separate the different
+sections/segments/groups of which an object file is composed.
+Essentially, every address NASM is capable of understanding is
+expressed as an offset from the beginning of some segment.
+
+The defining property of a segment is that if two symbols are
+declared in the same segment, then the distance between them is
+fixed at assembly time. Hence every externally-declared variable
+must be declared in its own segment, since none of the locations of
+these are known, and so no distances may be computed at assembly
+time.
+
+The special segment value NO_SEG (-1) is used to denote an absolute
+value, e.g. a constant whose value does not depend on relocation,
+such as the _size_ of a data object.
+
+Apart from NO_SEG, segment indices all have their least significant
+bit clear, if they refer to actual in-memory segments. For each
+segment of this type, there is an auxiliary segment value, defined
+to be the same number but with the LSB set, which denotes the
+segment-base value of that segment, for object formats which support
+it (Microsoft .OBJ, for example).
+
+Hence, if `textsym' is declared in a code segment with index 2, then
+referencing `SEG textsym' would return zero offset from
+segment-index 3. Or, in object formats which don't understand such
+references, it would return an error instead.
+
+The next twist is SEG_ABS. Some symbols may be declared with a
+segment value of SEG_ABS plus a 16-bit constant: this indicates that
+they are far-absolute symbols, such as the BIOS keyboard buffer
+under MS-DOS, which always resides at 0040h:001Eh. Far-absolutes are
+handled with care in the parser, since they are supposed to evaluate
+simply to their offset part within expressions, but applying SEG to
+one should yield its segment part. A far-absolute should never find
+its way _out_ of the parser, unless it is enclosed in a WRT clause,
+in which case Microsoft 16-bit object formats will want to know
+about it.
+
+Porting Issues
+--------------
+
+We have tried to write NASM in portable ANSI C: we do not assume
+little-endianness or any hardware characteristics (in order that
+NASM should work as a cross-assembler for x86 platforms, even when
+run on other, stranger machines).
+
+Assumptions we _have_ made are:
+
+- We assume that `short' is at least 16 bits, and `long' at least
+  32. This really _shouldn't_ be a problem, since Kernighan and
+  Ritchie tell us we are entitled to do so.
+
+- We rely on having more than 6 characters of significance on
+  externally linked symbols in the NASM sources. This may get fixed
+  at some point. We haven't yet come across a linker brain-dead
+  enough to get it wrong anyway.
+
+- We assume that `fopen' using the mode "wb" can be used to write
+  binary data files. This may be wrong on systems like VMS, with a
+  strange file system. Though why you'd want to run NASM on VMS is
+  beyond me anyway.
+
+That's it. Subject to those caveats, NASM should be completely
+portable. If not, we _really_ want to know about it.
+
+Porting Non-Issues
+------------------
+
+The following is _not_ a portability problem, although it looks like
+one.
+
+- When compiling with some versions of DJGPP, you may get errors
+  such as `warning: ANSI C forbids braced-groups within
+  expressions'. This isn't NASM's fault - the problem seems to be
+  that DJGPP's definitions of the <ctype.h> macros include a
+  GNU-specific C extension. So when compiling using -ansi and
+  -pedantic, DJGPP complains about its own header files. It isn't a
+  problem anyway, since it still generates correct code.

_service:tar_scm:nasm-2.16.03.tar.xz/doc/local.css Changed

_service:tar_scm:nasm-2.16.03.tar.xz/doc/nasmdoc.css Added

@@ -0,0 +1,170 @@
+body {
+    font-family: "source sans pro", "clear sans", "liberation sans",
+    "arial", "sans-serif";
+    background: white;
+}
+div.title {
+    text-align: center;
+    font-weight: bold;
+    margin: 0.67em 0;
+}
+h1 {
+    font-size: 2em;
+    margin: 0;
+}
+span.subtitle {
+    font-size: 1.25em;
+    font-style: italic;
+}
+code, pre {
+    font-family: "source code pro", "liberation mono", "monospace";
+    font-size: 80%;
+}
+pre, blockquote {
+    margin-left: 4em;
+    margin-right: 4em;
+}
+code {
+    display: inline;
+    white-space: nowrap;
+}
+a {
+    text-decoration: none;
+}
+div.toc {
+    padding-left: 0;
+    font-size: 195%;
+}
+div.toc li {
+    list-style-type: none;
+    padding-left: 0;
+}
+div.toc ol {
+    padding-left: 2em;
+    font-size: 80%;
+}
+li.toc1 {
+    padding-top: 0.7em;
+}
+li.toc2 {
+    padding-top: 0.3em;
+}
+.index li {
+    list-style-type: none;
+    display: flex;
+    flex-direction: row;
+    justify-content: space-between;
+}
+.index .term {
+    display: inline-block;
+    text-align: left;
+    vertical-align: top;
+    flex: 3 3 0;
+}
+.index .ref {
+    width: 30%;
+    display: inline-block;
+    text-align: right;
+    vertical-align: top;
+    flex: 1 1 0;
+}
+/* This is overridden for @media screen */
+ul.navbar {
+    display: none;
+}
+@media print {
+    a {
+	color: inherit;
+    }
+}
+@media screen {
+    div.contents {
+	-webkit-column-gap: 4em;
+	-webkit-column-rule: 1px dotted black;
+	-moz-column-gap: 4em;
+	-moz-column-rule: 1px dotted black;
+	column-gap: 4em;
+	column-rule: 1px dotted black;
+    }
+}
+@media only screen and (min-width: 90em) {
+    /* For a very wide screen, go to a columnar layout */
+    div.contents {
+	-webkit-column-count: 2;
+	-moz-column-count: 2;
+	column-count: 2;
+    }
+}
+@media only screen and (min-width: 135em) {
+    div.contents {
+	-webkit-column-count: 3;
+	-moz-column-count: 3;
+	column-count: 3;
+    }
+}
+@media screen {
+    /* Setting an explicit margin to keep the navbar from moving */
+    body {
+	padding: 0;
+	margin: 8px;
+    }
+
+    /* Link styles */
+    a:link {
+	color: #33c;
+    }
+    a:visited {
+	color: #338;
+    }
+    a:hover {
+	background: #ccc;
+    }
+    a:active {
+	color: #f33;
+	background: #ccc;
+    }
+
+    /* Trick to avoid the navbar hiding the the target of an # link */
+    :target {
+	margin-top: -10vh;
+	padding-top: 10vh;
+	background: #ffa;	/* Highlight the jump target */
+	background-clip: content-box;
+    }
+
+    ul.navbar {
+	display: block;
+	position: sticky;
+	top: 8px;
+	width: 100%;
+	margin: 0;
+	padding: 0;
+	overflow: hidden;
+	white-space: nowrap;
+	list-style-type: none;
+	background: #336 url("nasmlogw.png") no-repeat right center;
+	background-size: contain;
+    }
+
+    ul.navbar li {
+	float: left;
+    }
+    ul.navbar li.last {
+	border-right: none;
+    }
+    ul.navbar a {
+	border-right: 1px solid #bbb;
+	display: block;
+	color: white;
+	text-align: center;
+	padding: 1em 1.5em;
+	text-decoration: none;
+    }
+    ul.navbar a:hover {
+	background-color: #448;
+    }
+
+    .index li:hover {
+	background: #eef;
+    }
+}

_service:tar_scm:nasm-2.16.03.tar.xz/doc/nasmdoc.src Added

@@ -0,0 +1,9466 @@
+\# --------------------------------------------------------------------------
+\#
+\#   Copyright 1996-2024 The NASM Authors - All Rights Reserved
+\M{year}{1996-2024}
+\#   See the file AUTHORS included with the NASM distribution for
+\#   the specific copyright holders.
+\#
+\#   Redistribution and use in source and binary forms, with or without
+\#   modification, are permitted provided that the following
+\#   conditions are met:
+\#
+\#   * Redistributions of source code must retain the above copyright
+\#     notice, this list of conditions and the following disclaimer.
+\#   * Redistributions in binary form must reproduce the above
+\#     copyright notice, this list of conditions and the following
+\#     disclaimer in the documentation and/or other materials provided
+\#     with the distribution.
+\#
+\#     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+\#     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+\#     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+\#     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+\#     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+\#     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+\#     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+\#     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+\#     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+\#     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+\#     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+\#     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+\#     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+\#
+\# --------------------------------------------------------------------------
+\#
+\# Source code to NASM documentation
+\#
+
+\M{category}{Programming}
+\M{title}{NASM - The Netwide Assembler}
+\M{author}{The NASM Development Team}
+\M{copyright_tail}{-- All Rights Reserved}
+\M{license}{This document is redistributable under the license given in the section "License".}
+\M{summary}{This file documents NASM, the Netwide Assembler: an
+assembler targeting the Intel x86 series of processors, with portable
+source.}
+\M{infoname}{NASM}
+\M{infofile}{nasm}
+\M{infotitle}{The Netwide Assembler for x86}
+\M{epslogo}{nasmlogo.eps}
+\M{logoyadj}{-72}
+
+\& version.src
+
+\IR{-D} \c{-D} option
+\IR{-E} \c{-E} option
+\IR{-F} \c{-F} option
+\IR{-I} \c{-I} option
+\IR{-L} \c{-L} option
+\IR{-M} \c{-M} option
+\IR{-MD} \c{-MD} option
+\IR{-MF} \c{-MF} option
+\IR{-MG} \c{-MG} option
+\IR{-MP} \c{-MP} option
+\IR{-MQ} \c{-MQ} option
+\IR{-MT} \c{-MT} option
+\IR{-MW} \c{-MW} option
+\IR{-O} \c{-O} option
+\IR{-P} \c{-P} option
+\IR{-U} \c{-U} option
+\IR{-X} \c{-X} option
+\IR{-a} \c{-a} option
+\IR{-d} \c{-d} option
+\IR{-e} \c{-e} option
+\IR{-f} \c{-f} option
+\IR{-g} \c{-g} option
+\IR{-i} \c{-i} option
+\IR{-l} \c{-l} option
+\IR{-o} \c{-o} option
+\IR{-p} \c{-p} option
+\IR{-s} \c{-s} option
+\IR{-u} \c{-u} option
+\IR{-v} \c{-v} option
+\IR{-W} \c{-W} option
+\IR{-Werror} \c{-Werror} option
+\IR{-Wno-error} \c{-Wno-error} option
+\IR{-w} \c{-w} option
+\IR{-Z} \c{-Z} option
+\IR{!=} \c{!=} operator
+\IR{$, here} \c{$}, current address
+\IR{$, here} here token
+\IR{$, prefix} \c{$}, prefix
+\IR{$$} \c{$$} token
+\IR{%} \c{%} operator
+\IR{%db} \c{%} prefix to \c{DB} lists
+\IR{%%} \c{%%} operator
+\IR{%+1} \c{%+1} and \c{%-1} syntax
+\IA{%-1}{%+1}
+\IR{%0} \c{%0} parameter count
+\IR{&} \c{&} operator
+\IR{&&} \c{&&} operator
+\IR{*} \c{*} operator
+\IR{..@} \c{..@} symbol prefix
+\IR{/} \c{/} operator
+\IR{//} \c{//} operator
+\IR{<} \c{<} operator
+\IR{<<} \c{<<} operator
+\IR{<<<} \c{<<<} operator
+\IR{<=>} \c{<=>} operator
+\IR{<=} \c{<=} operator
+\IR{<>} \c{<>} operator
+\IR{<=>} \c{<=>} operator
+\IR{=} \c{=} operator
+\IR{==} \c{==} operator
+\IR{>} \c{>} operator
+\IR{>=} \c{>=} operator
+\IR{>>} \c{>>} operator
+\IR{>>>} \c{>>>} operator
+\IR{?db} \c{?}, data syntax
+\IR{?op} \c{?}, operator
+\IR{^} \c{^} operator
+\IR{^^} \c{^^} operator
+\IR{|} \c{|} operator
+\IR{||} \c{||} operator
+\IR{%$} \c{%$} and \c{%$$} prefixes
+\IA{%$$}{%$}
+\IR{+ opaddition} \c{+} operator, binary
+\IR{+ opunary} \c{+} operator, unary
+\IR{+ modifier} \c{+} modifier
+\IR{- opsubtraction} \c{-} operator, binary
+\IR{- opunary} \c{-} operator, unary
+\IR{! opunary} \c{!} operator
+\IA{~}{~ opunary}
+\IR{~ opunary} \c{~} operator
+\IA{A16}{a16}
+\IA{A32}{a32}
+\IA{A64}{a64}
+\IA{O16}{o16}
+\IA{O32}{o32}
+\IA{O64}{o64}
+\IR{alignment, in bin sections} alignment, in \c{bin} sections
+\IR{alignment, in elf sections} alignment, in ELF sections
+\IR{alignment, in win32 sections} alignment, in \c{win32} sections
+\IR{alignment, of elf common variables} alignment, of ELF common
+variables
+\IR{alignment, in obj sections} alignment, in \c{obj} sections
+\IR{a.out, bsd version} \c{a.out}, BSD version
+\IR{a.out, linux version} \c{a.out}, Linux version
+\IR{bin} \c{bin} output format
+\IR{bitwise and} bitwise AND
+\IR{bitwise or} bitwise OR
+\IR{bitwise xor} bitwise XOR
+\IR{block ifs} block IFs
+\IR{borland pascal} Borland, Pascal
+\IR{borland's win32 compilers} Borland, Win32 compilers
+\IR{braces, after % sign} braces, after \c{%} sign
+\IR{bsd} BSD
+\IR{c calling convention} C calling convention
+\IR{c symbol names} C symbol names
+\IA{critical expressions}{critical expression}
+\IA{command-line}{command line}
+\IA{comments}{comment}
+\IR{ccomment} comment, ending in \c{\\}
+\IA{case sensitivity}{case sensitive}
+\IA{case-sensitive}{case sensitive}
+\IA{case-insensitive}{case sensitive}
+\IA{character constants}{character constant}
+\IR{codeview debugging format} CodeView debugging format
+\IR{continuation line} continuation line
+\IR{continuation line} preprocessor, continuation line
+\IR{common object file format} Common Object File Format
+\IR{common variables, alignment in elf} common variables, alignment in ELF
+\IR{common, elf extensions to} \c{COMMON}, ELF extensions to
+\IR{common, obj extensions to} \c{COMMON}, \c{obj} extensions to
+\IR{declaring structure} declaring structures
+\IR{default-wrt mechanism} default-\c{WRT} mechanism
+\IR{devpac} DevPac
+\IR{djgpp} DJGPP
+\IR{dll symbols, exporting} DLL symbols, exporting
+\IR{dll symbols, importing} DLL symbols, importing
+\IR{dos} DOS
+\IA{effective addresses}{effective address}
+\IA{effective-address}{effective address}
+\IR{elf} ELF
+\IR{elf, 16-bit code} ELF, 16-bit code
+\IR{elf, debug formats} ELF, debug formats
+\IR{elf shared library} ELF, shared libraries
+\IR{elf32} \c{elf32}
+\IR{elf64} \c{elf64}
+\IR{elfx32} \c{elfx32}
+\IR{executable and linkable format} Executable and Linkable Format
+\IR{extern, elf extensions to} \c{EXTERN}, \c{elf} extensions to
+\IR{extern, obj extensions to} \c{EXTERN}, \c{obj} extensions to
+\IR{floating-point, constants} floating-point, constants
+\IR{floating-point, packed bcd constants} floating-point, packed BCD constants
+\IR{freebsd} FreeBSD
+\IR{freelink} FreeLink
+\IR{functions, c calling convention} functions, C calling convention
+\IR{functions, pascal calling convention} functions, \c{PASCAL} calling convention
+\IR{global, aoutb extensions to} \c{GLOBAL}, \c{aoutb} extensions to
+\IR{global, elf extensions to} \c{GLOBAL}, ELF extensions to
+\IR{global, rdf extensions to} \c{GLOBAL}, \c{rdf} extensions to
+\IR{got} GOT
+\IR{got relocations} \c{GOT} relocations
+\IR{gotoff relocation} \c{GOTOFF} relocations
+\IR{gotpc relocation} \c{GOTPC} relocations
+\IR{intel number formats} Intel number formats
+\IR{linux, elf} Linux, ELF
+\IR{linux, a.out} Linux, \c{a.out}
+\IR{linux, as86} Linux, \c{as86}
+\IR{mach object file format} Mach, object file format
+\IA{mach-o}{macho}
+\IR{mach-o} Mach-O, object file format
+\IR{macho32} \c{macho32}
+\IR{macho64} \c{macho64}
+\IR{macos x} MacOS X
+\IR{masm} MASM
+\IR{masmdb} MASM, \c{DB} syntax
+\IA{memory reference}{memory references}
+\IR{minix} Minix
+\IA{misc directory}{misc subdirectory}
+\IR{misc subdirectory} \c{misc} subdirectory
+\IR{microsoft omf} Microsoft OMF
+\IR{ms-dos} MS-DOS
+\IR{ms-dos device drivers} MS-DOS device drivers
+\IR{multipush} \c{multipush} macro
+\IR{nan} NaN
+\IR{nasm version} NASM version
+\IR{nasm version history} NASM version, history
+\IR{nasm version macros} NASM version, macros
+\IR{nasm version id} NASM version, ID macro
+\IR{nasm version string} NASM version, string macro
+\IR{arithmetic negation} negation, arithmetic
+\IR{bitwise negation} negation, bitwise
+\IR{boolean negation} negation, boolean
+\IR{boolean and} boolean, AND
+\IR{boolean or} boolean, OR
+\IR{boolean xor} boolean, XOR
+\IR{netbsd} NetBSD
+\IR{nsis} NSIS
+\IR{nullsoft scriptable installer} Nullsoft Scriptable Installer
+\IA{.OBJ}{.obj}
+\IR{omf} OMF
+\IR{openbsd} OpenBSD
+\IR{operating system} operating system
+\IR{os/2} OS/2
+\IR{pascal calling convention} Pascal calling convention
+\IR{pic} PIC
+\IR{pharlap} PharLap
+\IR{plt} PLT
+\IR{plt} \c{PLT} relocations
+\IA{pre-defining macros}{pre-define}
+\IR{preprocessor conditionals} preprocessor, conditionals
+\IR{preprocessor expansions} preprocessor, expansions
+\IR{preprocessor expressions} preprocessor, expressions
+\IR{preprocessor loops} preprocessor, loops
+\IR{preprocessor variables} preprocessor, variables
+\IR{preprocessor variables} variables, preprocessor
+\IA{comments}{comment}
+\IR{relocations, pic-specific} relocations, PIC-specific
+\IA{repeating}{repeating code}
+\IR{section alignment, in elf} section alignment, in ELF
+\IR{section alignment, in bin} section alignment, in \c{bin}
+\IR{section alignment, in obj} section alignment, in \c{obj}
+\IR{section alignment, in win32} section alignment, in \c{win32}
+\IR{section, elf extensions to} \c{SECTION}, ELF extensions to
+\IR{section, macho extensions to} \c{SECTION}, \c{macho} extensions to
+\IR{section, windows extensions to} \c{SECTION}, Windows extensions to
+\IR{segment alignment, in bin} segment alignment, in \c{bin}
+\IR{segment alignment, in obj} segment alignment, in \c{obj}
+\IR{segment, obj extensions to} \c{SEGMENT}, \c{obj} extensions to
+\IR{segment names, borland pascal} segment names, Borland Pascal
+\IR{shift command} \c{shift} command
+\IA{string constant}{string constants}
+\IR{string constants} string, constants
+\IR{string length} string, length
+\IR{string manipulation in macros} string, manipulation in macros
+\IR{align, smart} \c{ALIGN}, smart
+\IA{sectalign}{sectalign}
+\IR{solaris x86} Solaris x86
+\IA{standard section names}{standardized section names}
+\IR{symbols, exporting from dlls} symbols, exporting from DLLs
+\IR{symbols, importing from dlls} symbols, importing from DLLs
+\IR{test subdirectory} \c{test} subdirectory
+\IR{thread local storage in elf} thread local storage, in ELF
+\IR{thread local storage in mach-o} thread local storage, in \c{macho}
+\IR{tlink} \c{TLINK}
+\IR{unconditionally importing symbols} importing symbols, unconditionally
+\IR{underscore, in c symbols} underscore, in C symbols
+\IA{uninitialized storage}{storage, uninitialized}
+\IR{unicode} Unicode
+\IR{unix} Unix
+\IR{utf-8} UTF-8
+\IR{utf-16} UTF-16
+\IR{utf-32} UTF-32
+\IA{sco unix}{unix, sco}
+\IR{unix, sco} Unix, SCO
+\IA{unix system v}{unix, system v}
+\IR{unix, system v} Unix, System V
+\IR{unixware} UnixWare
+\IR{val} VAL
+\IA{version number of nasm}{nasm, version}
+\IR{visual c++} Visual C++
+\IR{win32} Win32
+\IR{win64} Win64
+\IR{windows} Windows
+\IR{windows debugging formats} Windows, debugging formats
+\# \IC{program entry point}{entry point, program}
+\# \IC{program entry point}{start point, program}
+\# \IC{MS-DOS device drivers}{device drivers, MS-DOS}
+\# \IC{16-bit mode, versus 32-bit mode}{32-bit mode, versus 16-bit mode}
+\# \IC{c symbol names}{symbol names, in C}
+
+
+\C{intro} Introduction
+
+\H{whatsnasm} What Is NASM?
+
+The Netwide Assembler, NASM, is an 80x86 and x86-64 assembler designed
+for portability and modularity. It supports a range of object file
+formats, including Linux and *BSD \c{a.out}, ELF, Mach-O, 16-bit and
+32-bit \c{.obj} (OMF) format, COFF (including its Win32 and Win64
+variants.) It can also output plain binary files, Intel hex and
+Motorola S-Record formats. Its syntax is designed to be simple and
+easy to understand, similar to the syntax in the Intel Software
+Developer Manual with minimal complexity. It supports all currently
+known x86 architectural extensions, and has strong support for macros.
+
+\S{legal} \i{License}
+
+NASM is under the so-called 2-clause BSD license, also
+known as the simplified BSD license:
+
+Copyright \m{year} the NASM Authors - All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are
+met:
+
+\b Redistributions of source code must retain the above copyright
+notice, this list of conditions and the following disclaimer.
+
+\b Redistributions in binary form must reproduce the above copyright
+notice, this list of conditions and the following disclaimer in the
+documentation and/or other materials provided with the distribution.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+\C{running} Running NASM
+
+\H{syntax} NASM \i{Command-Line} Syntax
+
+To assemble a file, you issue a command of the form
+
+\c nasm -f <format> <filename> -o <output>
+
+For example,
+
+\c nasm -f elf myfile.asm
+
+will assemble \c{myfile.asm} into an ELF object file \c{myfile.o}. And
+
+\c nasm -f bin myfile.asm -o myfile.com
+
+will assemble \c{myfile.asm} into a raw binary file \c{myfile.com}.
+
+To produce a listing file, with the hex codes output from NASM
+displayed on the left of the original sources, use the \c{-l} option
+to give a listing file name, for example:
+
+\c nasm -f coff myfile.asm -l myfile.lst
+
+To get further usage instructions from NASM, try typing
+
+\c nasm -h
+
+The option \c{--help} is an alias for the \c{-h} option.
+
+If you use Linux but aren't sure whether your system is \c{a.out}
+or ELF, type
+
+\c file nasm
+
+(in the directory in which you put the NASM binary when you
+installed it). If it says something like
+
+\c nasm: ELF 32-bit LSB executable i386 (386 and up) Version 1
+
+then your system is \c{ELF}, and you should use the option \c{-f elf}
+when you want NASM to produce Linux object files. If it says
+
+\c nasm: Linux/i386 demand-paged executable (QMAGIC)
+
+or something similar, your system is \c{a.out}, and you should use
+\c{-f aout} instead (Linux \c{a.out} systems have long been obsolete,
+and are rare these days.)
+
+Like Unix compilers and assemblers, NASM is silent unless it
+goes wrong: you won't see any output at all, unless it gives error
+messages.
+
+
+\S{opt-o} The \i\c{-o} Option: Output File Name
+
+NASM will normally choose the name of your output file for you;
+precisely how it does this is dependent on the object file format.
+For Microsoft object file formats (\c{obj}, \c{win32} and \c{win64}),
+it will remove the \c{.asm} \i{extension} (or whatever extension you
+like to use - NASM doesn't care) from your source file name and
+substitute \c{.obj}. For Unix object file formats (\c{aout}, \c{as86},
+\c{coff}, \c{elf32}, \c{elf64}, \c{elfx32}, \c{ieee}, \c{macho32} and
+\c{macho64}) it will substitute \c{.o}. For \c{dbg}, \c{ith}
+and \c{srec}, it will use \c{.dbg}, \c{.ith} and \c{.srec},
+respectively, and for the \c{bin} format it will simply remove the
+extension, so that \c{myfile.asm} produces the output file \c{myfile}.
+
+If the output file already exists, NASM will overwrite it, unless it
+has the same name as the input file, in which case it will give a
+warning and use \i\c{nasm.out} as the output file name instead.
+
+For situations in which this behaviour is unacceptable, NASM
+provides the \c{-o} command-line option, which allows you to specify
+your desired output file name. You invoke \c{-o} by following it
+with the name you wish for the output file, either with or without
+an intervening space. For example:
+
+\c nasm -f bin program.asm -o program.com
+\c nasm -f bin driver.asm -odriver.sys
+
+Note that this is a small o, and is different from a capital O , which
+is used to specify the number of optimization passes required. See \k{opt-O}.
+
+
+\S{opt-f} The \i\c{-f} Option: \i{Output File Format}
+
+If you do not supply the \c{-f} option to NASM, it will choose an
+output file format for you itself. In the distribution versions of
+NASM, the default is always \i\c{bin}; if you've compiled your own
+copy of NASM, you can redefine \i\c{OF_DEFAULT} at compile time and
+choose what you want the default to be.
+
+Like \c{-o}, the intervening space between \c{-f} and the output
+file format is optional; so \c{-f elf} and \c{-felf} are both valid.
+
+A complete list of the available output file formats can be given by
+issuing the command \i\c{nasm -h}.
+
+
+\S{opt-l} The \i\c{-l} Option: Generating a \i{Listing File}
+
+If you supply the \c{-l} option to NASM, followed (with the usual
+optional space) by a file name, NASM will generate a
+\i{source-listing file} for you, in which addresses and generated
+code are listed on the left, and the actual source code, with
+expansions of multi-line macros (except those which specifically
+request no expansion in source listings: see \k{nolist}) on the
+right. For example:
+
+\c nasm -f elf myfile.asm -l myfile.lst
+
+If a list file is selected, you may turn off listing for a
+section of your source with \c{list -}, and turn it back on
+with \c{list +}, (the default, obviously). There is no "user
+form" (without the brackets). This can be used to list only
+sections of interest, avoiding excessively long listings.
+
+\S{opt-L} The \i\c{-L} Option: Additional or Modified Listing Info
+
+Use this option to specify listing output details.
+
+Supported options are:
+
+\b \c{-Lb} show builtin macro packages (standard and \c{%use})
+
+\b \c{-Ld} show byte and repeat counts in decimal, not hex
+
+\b \c{-Le} show the preprocessed input
+
+\b \c{-Lf} ignore \c{.nolist} and force listing output
+
+\b \c{-Lm} show multi-line macro calls with expanded parameters
+
+\b \c{-Lp} output a list file in every pass, in case of errors
+
+\b \c{-Ls} show all single-line macro definitions
+
+\b \c{-Lw} flush the output after every line (very slow, mainly useful
+to debug NASM crashes)
+
+\b \c{-L+} enable \e{all} listing options except \c{-Lw} (very verbose)
+
+These options can be enabled or disabled at runtime using the
+\c{%pragma list options} directive:
+
+\c %pragma list options +|-flags...
+
+For example, to turn on the \c{d} and \c{m} flags but disable the
+\c{s} flag:
+
+\c %pragma list options +dm -s
+
+For forward compatility reasons, an undefined flag will be
+ignored. Thus, a new flag introduced in a newer version of NASM can be
+specified without breaking older versions. Listing flags will always
+be a single alphanumeric character and are case sensitive.
+
+\S{opt-M} The \i\c{-M} Option: Generate \i{Makefile Dependencies}
+
+This option can be used to generate makefile dependencies on stdout.
+This can be redirected to a file for further processing. For example:
+
+\c nasm -M myfile.asm > myfile.dep
+
+
+\S{opt-MG} The \i\c{-MG} Option: Generate \i{Makefile Dependencies}
+
+This option can be used to generate makefile dependencies on stdout.
+This differs from the \c{-M} option in that if a nonexisting file is
+encountered, it is assumed to be a generated file and is added to the
+dependency list without a prefix.
+
+
+\S{opt-MF} The \i\c\{-MF} Option: Set Makefile Dependency File
+
+This option can be used with the \c{-M} or \c{-MG} options to send the
+output to a file, rather than to stdout.  For example:
+
+\c nasm -M -MF myfile.dep myfile.asm
+
+
+\S{opt-MD} The \i\c{-MD} Option: Assemble and Generate Dependencies
+
+The \c{-MD} option acts as the combination of the \c{-M} and \c{-MF}
+options (i.e. a filename has to be specified.)  However, unlike the
+\c{-M} or \c{-MG} options, \c{-MD} does \e{not} inhibit the normal
+operation of the assembler.  Use this to automatically generate
+updated dependencies with every assembly session.  For example:
+
+\c nasm -f elf -o myfile.o -MD myfile.dep myfile.asm
+
+If the argument after \c{-MD} is an option rather than a filename,
+then the output filename is the first applicable one of:
+
+\b the filename set in the \c{-MF} option;
+
+\b the output filename from the \c{-o} option with \c{.d} appended;
+
+\b the input filename with the extension set to \c{.d}.
+
+
+\S{opt-MT} The \i\c{-MT} Option: Dependency Target Name
+
+The \c{-MT} option can be used to override the default name of the
+dependency target.  This is normally the same as the output filename,
+specified by the \c{-o} option.
+
+
+\S{opt-MQ} The \i\c{-MQ} Option: Dependency Target Name (Quoted)
+
+The \c{-MQ} option acts as the \c{-MT} option, except it tries to
+quote characters that have special meaning in Makefile syntax.  This
+is not foolproof, as not all characters with special meaning are
+quotable in \c{make}.  The default output (if no \c{-MT} or \c{-MQ} option
+is specified) is automatically quoted.
+
+
+\S{opt-MP} The \i\c{-MP} Option: Emit Phony Makefile Targets
+
+When used with any of the dependency generation options, the \c{-MP}
+option causes NASM to emit a phony target without dependencies for
+each header file.  This prevents \c{make} from complaining if a header
+file has been removed.
+
+
+\S{opt-MW} The \i\c{-MW} Option: Watcom \c{make} quoting style
+
+This option causes NASM to attempt to quote dependencies according to
+Watcom \c{make} conventions rather than POSIX \c{make} conventions (also used
+by most other \c{make} variants.)  This quotes \c{#} as \c{$#} rather than
+\c{\\#}, uses \c{&} rather than \c{\\} for continuation lines, and
+encloses filenames containing whitespace in double quotes.
+
+
+\S{opt-F} The \i\c{-F} Option: \i{Debug Information Format}
+
+This option is used to select the format of the debug information
+emitted into the output file, to be used by a debugger (or \e{will}
+be). Prior to version 2.03.01, the use of this switch did \e{not} enable
+output of the selected debug info format.  Use \c{-g}, see \k{opt-g},
+to enable output.  Versions 2.03.01 and later automatically enable \c{-g}
+if \c{-F} is specified.
+
+A complete list of the available debug file formats for an output
+format can be seen by issuing the command \c{nasm -h}.  Not
+all output formats currently support debugging output.
+
+This should not be confused with the \c{-f dbg} output format option,
+see \k{dbgfmt}.
+
+
+\S{opt-g} The \i\c{-g} Option: Enabling \i{Debug Information}.
+
+This option can be used to generate debugging information in the specified
+format. See \k{opt-F}. Using \c{-g} without \c{-F} results in emitting
+debug info in the default format, if any, for the selected output format.
+If no debug information is currently implemented in the selected output
+format, \c{-g} is \e{silently ignored}.
+
+
+\S{opt-X} The \i\c{-X} Option: Selecting an \i{Error Reporting Format}
+
+This option can be used to select an error reporting format for any
+error messages that might be produced by NASM.
+
+Currently, two error reporting formats may be selected.  They are
+the \c{-Xvc} option and the \c{-Xgnu} option.  The GNU format is
+the default and looks like this:
+
+\c filename.asm:65: error: specific error message
+
+where \c{filename.asm} is the name of the source file in which the
+error was detected, \c{65} is the source file line number on which
+the error was detected, \c{error} is the severity of the error (this
+could be \c{warning}), and \c{specific error message} is a more
+detailed text message which should help pinpoint the exact problem.
+
+The other format, specified by \c{-Xvc} is the style used by Microsoft
+Visual C++ and some other programs.  It looks like this:
+
+\c filename.asm(65) : error: specific error message
+
+where the only difference is that the line number is in parentheses
+instead of being delimited by colons.
+
+See also the \c{Visual C++} output format, \k{win32fmt}.
+
+\S{opt-Z} The \i\c{-Z} Option: Send Errors to a File
+
+Under \I{DOS}\c{MS-DOS} it can be difficult (though there are ways) to
+redirect the standard-error output of a program to a file. Since
+NASM usually produces its warning and \i{error messages} on
+\i\c{stderr}, this can make it hard to capture the errors if (for
+example) you want to load them into an editor.
+
+NASM therefore provides the \c{-Z} option, taking a filename argument
+which causes errors to be sent to the specified files rather than
+standard error. Therefore you can \I{redirecting errors}redirect
+the errors into a file by typing
+
+\c nasm -Z myfile.err -f obj myfile.asm
+
+In earlier versions of NASM, this option was called \c{-E}, but it was
+changed since \c{-E} is an option conventionally used for
+preprocessing only, with disastrous results.  See \k{opt-E}.
+
+\S{opt-s} The \i\c{-s} Option: Send Errors to \i\c{stdout}
+
+The \c{-s} option redirects \i{error messages} to \c{stdout} rather
+than \c{stderr}, so it can be redirected under \I{DOS}\c{MS-DOS}. To
+assemble the file \c{myfile.asm} and pipe its output to the \c{more}
+program, you can type:
+
+\c nasm -s -f obj myfile.asm | more
+
+See also the \c{-Z} option, \k{opt-Z}.
+
+
+\S{opt-i} The \i\c{-i}\I\c{-I} Option: Include File Search Directories
+
+When NASM sees the \i\c{%include} or \i\c{%pathsearch} directive in a
+source file (see \k{include}, \k{pathsearch} or \k{incbin}), it will
+search for the given file not only in the current directory, but also
+in any directories specified on the command line by the use of the
+\c{-i} option. Therefore you can include files from a \i{macro
+library}, for example, by typing
+
+\c nasm -ic:\macrolib\ -f obj myfile.asm
+
+(As usual, a space between \c{-i} and the path name is allowed, and
+optional).
+
+Prior NASM 2.14 a path provided in the option has been considered as
+a verbatim copy and providing a path separator been up to a caller.
+One could implicitly concatenate a search path together with a filename.
+Still this was rather a trick than something useful. Now the trailing
+path separator is made to always present, thus \c{-ifoo} will be
+considered as the \c{-ifoo/} directory.
+
+If you want to define a \e{standard} \i{include search path},
+similar to \c{/usr/include} on Unix systems, you should place one or
+more \c{-i} directives in the \c{NASMENV} environment variable (see
+\k{nasmenv}).
+
+For Makefile compatibility with many C compilers, this option can also
+be specified as \c{-I}.
+
+
+\S{opt-p} The \i\c{-p}\I\c{-P} Option: \I{pre-including files}Pre-Include a File
+
+\I\c{%include}NASM allows you to specify files to be
+\e{pre-included} into your source file, by the use of the \c{-p}
+option. So running
+
+\c nasm myfile.asm -p myinc.inc
+
+is equivalent to running \c{nasm myfile.asm} and placing the
+directive \c{%include "myinc.inc"} at the start of the file.
+
+\c{--include} option is also accepted.
+
+For consistency with the \c{-I}, \c{-D} and \c{-U} options, this
+option can also be specified as \c{-P}.
+
+
+
+\S{opt-d} The \i\c{-d}\I\c{-D} Option: \I{pre-defining macros}Pre-Define a Macro
+
+\I\c{%define}Just as the \c{-p} option gives an alternative to placing
+\c{%include} directives at the start of a source file, the \c{-d}
+option gives an alternative to placing a \c{%define} directive. You
+could code
+
+\c nasm myfile.asm -dFOO=100
+
+as an alternative to placing the directive
+
+\c %define FOO 100
+
+at the start of the file. You can miss off the macro value, as well:
+the option \c{-dFOO} is equivalent to coding \c{%define FOO}. This
+form of the directive may be useful for selecting \i{assembly-time
+options} which are then tested using \c{%ifdef}, for example
+\c{-dDEBUG}.
+
+For Makefile compatibility with many C compilers, this option can also
+be specified as \c{-D}.
+
+
+\S{opt-u} The \i\c{-u}\I\c{-U} Option: \I{Undefining macros}Undefine a Macro
+
+\I\c{%undef}The \c{-u} option undefines a macro that would otherwise
+have been pre-defined, either automatically or by a \c{-p} or \c{-d}
+option specified earlier on the command lines.
+
+For example, the following command line:
+
+\c nasm myfile.asm -dFOO=100 -uFOO
+
+would result in \c{FOO} \e{not} being a predefined macro in the
+program. This is useful to override options specified at a different
+point in a Makefile.
+
+For Makefile compatibility with many C compilers, this option can also
+be specified as \c{-U}.
+
+
+\S{opt-E} The \i\c{-E}\I{-e} Option: Preprocess Only
+
+NASM allows the \i{preprocessor} to be run on its own, up to a
+point. Using the \c{-E} option (which requires no arguments) will
+cause NASM to preprocess its input file, expand all the macro
+references, remove all the comments and preprocessor directives, and
+print the resulting file on standard output (or save it to a file,
+if the \c{-o} option is also used).
+
+This option cannot be applied to programs which require the
+preprocessor to evaluate \I{preprocessor expressions}\i{expressions}
+which depend on the values of symbols: so code such as
+
+\c %assign tablesize ($-tablestart)
+
+will cause an error in \i{preprocess-only mode}.
+
+For compatibility with older version of NASM, this option can also be
+written \c{-e}.  \c{-E} in older versions of NASM was the equivalent
+of the current \c{-Z} option, \k{opt-Z}.
+
+\S{opt-a} The \i\c{-a} Option: Suppress Preprocessing
+
+If NASM is being used as the back end to a compiler, it might be
+desirable to \I{suppressing preprocessing}suppress preprocessing
+completely and assume the compiler has already done it, to save time
+and increase compilation speeds. The \c{-a} option, requiring no
+argument, instructs NASM to replace its powerful \i{preprocessor}
+with a \i{stub preprocessor} which does nothing.
+
+
+\S{opt-O} The \i\c{-O} Option: \i{Multipass Optimization}
+
+Using the \c{-O} option, you can tell NASM to carry out different
+levels of optimization. Multiple flags can be specified after the
+\c{-O} options, some of which can be combined in a single option,
+e.g. \c{-Oxv}.
+
+\b \c{-O0}: No optimization. All operands take their long forms,
+        if a short form is not specified, except conditional jumps.
+        This is intended to match NASM 0.98 behavior.
+
+\b \c{-O1}: Minimal optimization. As above, but immediate operands
+        which will fit in a signed byte are optimized,
+        unless the long form is specified.  Conditional jumps default
+        to the long form unless otherwise specified.
+
+\b \c{-Ox} (where \c{x} is the actual letter \c{x}): Multipass optimization.
+        Minimize branch offsets and signed immediate bytes,
+        overriding size specification unless the \c{strict} keyword
+        has been used (see \k{strict}).  For compatibility with earlier
+        releases, the letter \c{x} may also be any number greater than
+        one. This number has no effect on the actual number of passes.
+
+\b \c{-Ov}: At the end of assembly, print the number of passes
+        actually executed.
+
+The \c{-Ox} mode is recommended for most uses, and is the default
+since NASM 2.09. \e{Any other mode will generate worse quality
+output.} Use \c{-O0} or \c{-O1} only if you need the finer
+programmer-level control of output and \c{strict} is not suitable for
+your use case.
+
+Note that this is a capital \c{O}, and is different from a small \c{o}, which
+is used to specify the output file name. See \k{opt-o}.
+
+
+\S{opt-t} The \i\c{-t} Option: \i{TASM} Compatibility Mode
+
+NASM includes a limited form of compatibility with Borland's TASM.
+When NASM's \c{-t} option is used, the following changes are made:
+
+\b local labels may be prefixed with \c{@@} instead of \c{.}
+
+\b size override is supported within brackets. In TASM compatible mode,
+a size override inside square brackets changes the size of the operand,
+and not the address type of the operand as it does in NASM syntax. E.g.
+\c{mov eax,DWORD val} is valid syntax in TASM compatibility mode.
+Note that you lose the ability to override the default address type for
+the instruction.
+
+\b unprefixed forms of some directives supported (\c{arg}, \c{elif},
+\c{else}, \c{endif}, \c{if}, \c{ifdef}, \c{ifdifi}, \c{ifndef},
+\c{include}, \c{local})
+
+\S{opt-w} The \i\c{-w} and \i\c{-W} Options: Enable or Disable Assembly \i{Warnings}
+
+NASM can observe many conditions during the course of assembly which
+are worth mentioning to the user, but not a sufficiently severe
+error to justify NASM refusing to generate an output file. These
+conditions are reported like errors, but come up with the word
+`warning' before the message. Warnings do not prevent NASM from
+generating an output file and returning a success status to the
+operating system.
+
+Some conditions are even less severe than that: they are only
+sometimes worth mentioning to the user. Therefore NASM supports the
+\c{-w} command-line option, which enables or disables certain
+classes of assembly warning. Such warning classes are described by a
+name, for example \c{label-orphan}; you can enable warnings of
+this class by the command-line option \c{-w+label-orphan} and
+disable it by \c{-w-label-orphan}.
+
+Since version 2.15, NASM has group aliases for all prefixed warnings,
+so they can be used to enable or disable all warnings in the group.
+For example, -w+float enables all warnings with names starting with float-*.
+
+Since version 2.00, NASM has also supported the \c{gcc}-like syntax
+\c{-Wwarning-class} and \c{-Wno-warning-class} instead of
+\c{-w+warning-class} and \c{-w-warning-class}, respectively; both
+syntaxes work identically.
+
+The option \c{-w+error} or \i\c{-Werror} can be used to treat warnings
+as errors.  This can be controlled on a per warning class basis
+(\c{-w+error=}\e{warning-class} or \c{-Werror=}\e{warning-class});
+if no \e{warning-class} is specified NASM treats it as
+\c{-w+error=all}; the same applies to \c{-w-error} or
+\i\c{-Wno-error},
+of course.
+
+In addition, you can control warnings in the source code itself, using
+the \i\c{WARNING} directive.  See \k{asmdir-warning}.
+
+See \k{warnings} for the complete list of warning classes.
+
+\S{opt-v} The \i\c{-v} Option: Display \i{Version} Info
+
+Typing \c{NASM -v} will display the version of NASM which you are using,
+and the date on which it was compiled.
+
+You will need the version number if you report a bug.
+
+For command-line compatibility with Yasm, the form \i\c{--v} is also
+accepted for this option starting in NASM version 2.11.05.
+
+
+\S{opt-pfix} The \i\c{--(g|l)prefix}, \i\c{--(g|l)postfix} Options.
+
+The \c{--(g)prefix} options prepend the given argument
+to all \c{extern}, \c{common}, \c{static}, and \c{global} symbols, and the
+\c{--lprefix} option prepends to all other symbols. Similarly,
+\c{--(g)postfix} and \c{--lpostfix} options append
+the argument in the exactly same way as the \c{--xxprefix} options does.
+
+Running this:
+
+\c nasm -f macho --gprefix _
+
+is equivalent to place the directive with \c{%pragma macho gprefix _}
+at the start of the file (\k{mangling}). It will prepend the underscore
+to all global and external variables, as C requires it in some, but not all,
+system calling conventions.
+
+\S{opt-pragma} The \i\c{--pragma} Option
+
+NASM accepts an argument as \c{%pragma} option, which is like placing
+a \c{%pragma} preprocess statement at the beginning of the source.
+Running this:
+
+\c nasm -f macho --pragma "macho gprefix _"
+
+is equivalent to the example in \k{opt-pfix}. See \k{pragma}.
+
+
+\S{opt-before} The \i\c{--before} Option
+
+A preprocess statement can be accepted with this option. The example
+shown in \k{opt-pragma} is the same as running this:
+
+\c nasm -f macho --before "%pragma macho gprefix _"
+
+
+\S{opt-limit} The \i\c{--limit-X} Option
+
+This option allows user to setup various maximum values after which
+NASM will terminate with a fatal error rather than consume arbitrary
+amount of compute time. Each limit can be set to a positive number or
+\c{unlimited}.
+
+\b\c{--limit-passes}: Number of maximum allowed passes. Default is
+\c{unlimited}.
+
+\b\c{--limit-stalled-passes}: Maximum number of allowed unfinished
+passes. Default is 1000.
+
+\b\c{--limit-macro-levels}: Define maximum depth of macro expansion
+(in preprocess). Default is 10000
+
+\b\c{--limit-macro-tokens}: Maximum number of tokens processed during
+single-line macro expansion. Default is 10000000.
+
+\b\c{--limit-mmacros}: Maximum number of multi-line macros processed
+before returning to the top-level input. Default is 100000.
+
+\b\c{--limit-rep}: Maximum number of allowed preprocessor loop, defined
+under \c{%rep}. Default is 1000000.
+
+\b\c{--limit-eval}: This number sets the boundary condition of allowed
+expression length. Default is 8192 on most systems.
+
+\b\c{--limit-lines}: Total number of source lines allowed to be
+processed. Default is 2000000000.
+
+For example, set the maximum line count to 1000:
+
+\c nasm --limit-lines 1000
+
+Limits can also be set via the directive \c{%pragma limit}, for
+example:
+
+\c %pragma limit lines 1000
+
+
+\S{opt-keep-all} The \i\c{--keep-all} Option
+
+This option prevents NASM from deleting any output files even if an
+error happens.
+
+\S{opt-no-line} The \i\c{--no-line} Option
+
+If this option is given, all \i\c{%line} directives in the source code
+are ignored. This can be useful for debugging already preprocessed
+code. See \k{line}.
+
+\S{opt-reproducible} The \i\c{--reproducible} Option
+
+If this option is given, NASM will not emit information that is
+inherently dependent on the NASM version or different from run to run
+(such as timestamps) into the output file.
+
+
+\S{nasmenv} The \i\c{NASMENV} \i{Environment} Variable
+
+If you define an environment variable called \c{NASMENV}, the program
+will interpret it as a list of extra command-line options, which are
+processed before the real command line. You can use this to define
+standard search directories for include files, by putting \c{-i}
+options in the \c{NASMENV} variable.
+
+The value of the variable is split up at white space, so that the
+value \c{-s -ic:\\nasmlib\\} will be treated as two separate options.
+However, that means that the value \c{-dNAME="my name"} won't do
+what you might want, because it will be split at the space and the
+NASM command-line processing will get confused by the two
+nonsensical words \c{-dNAME="my} and \c{name"}.
+
+To get round this, NASM provides a feature whereby, if you begin the
+\c{NASMENV} environment variable with some character that isn't a minus
+sign, then NASM will treat this character as the \i{separator
+character} for options. So setting the \c{NASMENV} variable to the
+value \c{!-s!-ic:\\nasmlib\\} is equivalent to setting it to \c{-s
+-ic:\\nasmlib\\}, but \c{!-dNAME="my name"} will work.
+
+This environment variable was previously called \c{NASM}. This was
+changed with version 0.98.31.
+
+
+\H{qstart} \i{Quick Start} for \i{MASM} Users
+
+If you're used to writing programs with MASM, or with \i{TASM} in
+MASM-compatible (non-Ideal) mode, or with \i\c{a86}, this section
+attempts to outline the major differences between MASM's syntax and
+NASM's. If you're not already used to MASM, it's probably worth
+skipping this section.
+
+
+\S{qscs} NASM Is \I{case sensitivity}Case-Sensitive
+
+One simple difference is that NASM is case-sensitive. It makes a
+difference whether you call your label \c{foo}, \c{Foo} or \c{FOO}.
+If you're assembling to \c{DOS} or \c{OS/2} \c{.OBJ} files, you can
+invoke the \i\c{UPPERCASE} directive (documented in \k{objfmt}) to
+ensure that all symbols exported to other code modules are forced
+to be upper case; but even then, \e{within} a single module, NASM
+will distinguish between labels differing only in case.
+
+
+\S{qsbrackets} NASM Requires \i{Square Brackets} For \i{Memory References}
+
+NASM was designed with simplicity of syntax in mind. One of the
+\i{design goals} of NASM is that it should be possible, as far as is
+practical, for the user to look at a single line of NASM code
+and tell what opcode is generated by it. You can't do this in MASM:
+if you declare, for example,
+
+\c foo     equ     1
+\c bar     dw      2
+
+then the two lines of code
+
+\c         mov     ax,foo
+\c         mov     ax,bar
+
+generate completely different opcodes, despite having
+identical-looking syntaxes.
+
+NASM avoids this undesirable situation by having a much simpler
+syntax for memory references. The rule is simply that any access to
+the \e{contents} of a memory location requires square brackets
+around the address, and any access to the \e{address} of a variable
+doesn't. So an instruction of the form \c{mov ax,foo} will
+\e{always} refer to a compile-time constant, whether it's an \c{EQU}
+or the address of a variable; and to access the \e{contents} of the
+variable \c{bar}, you must code \c{mov ax,bar}.
+
+This also means that NASM has no need for MASM's \i\c{OFFSET}
+keyword, since the MASM code \c{mov ax,offset bar} means exactly the
+same thing as NASM's \c{mov ax,bar}. If you're trying to get
+large amounts of MASM code to assemble sensibly under NASM, you
+can always code \c{%idefine offset} to make the preprocessor treat
+the \c{OFFSET} keyword as a no-op.
+
+This issue is even more confusing in \i\c{a86}, where declaring a
+label with a trailing colon defines it to be a `label' as opposed to
+a `variable' and causes \c{a86} to adopt NASM-style semantics; so in
+\c{a86}, \c{mov ax,var} has different behaviour depending on whether
+\c{var} was declared as \c{var: dw 0} (a label) or \c{var dw 0} (a
+word-size variable). NASM is very simple by comparison:
+\e{everything} is a label.
+
+NASM, in the interests of simplicity, also does not support the
+\i{hybrid syntaxes} supported by MASM and its clones, such as
+\c{mov ax,tablebx}, where a memory reference is denoted by one
+portion outside square brackets and another portion inside. The
+correct syntax for the above is \c{mov ax,table+bx}. Likewise,
+\c{mov ax,es:di} is wrong and \c{mov ax,es:di} is right.
+
+
+\S{qstypes} NASM Doesn't Store \i{Variable Types}
+
+NASM, by design, chooses not to remember the types of variables you
+declare. Whereas MASM will remember, on seeing \c{var dw 0}, that
+you declared \c{var} as a word-size variable, and will then be able
+to fill in the \i{ambiguity} in the size of the instruction \c{mov
+var,2}, NASM will deliberately remember nothing about the symbol
+\c{var} except where it begins, and so you must explicitly code
+\c{mov word var,2}.
+
+For this reason, NASM doesn't support the \c{LODS}, \c{MOVS},
+\c{STOS}, \c{SCAS}, \c{CMPS}, \c{INS}, or \c{OUTS} instructions,
+but only supports the forms such as \c{LODSB}, \c{MOVSW}, and
+\c{SCASD}, which explicitly specify the size of the components of
+the strings being manipulated.
+
+
+\S{qsassume} NASM Doesn't \i\c{ASSUME}
+
+As part of NASM's drive for simplicity, it also does not support the
+\c{ASSUME} directive. NASM will not keep track of what values you
+choose to put in your segment registers, and will never
+\e{automatically} generate a \i{segment override} prefix.
+
+
+\S{qsmodel} NASM Doesn't Support \i{Memory Models}
+
+NASM also does not have any directives to support different 16-bit
+memory models. The programmer has to keep track of which functions
+are supposed to be called with a \i{far call} and which with a
+\i{near call}, and is responsible for putting the correct form of
+\c{RET} instruction (\c{RETN} or \c{RETF}; NASM accepts \c{RET}
+itself as an alternate form for \c{RETN}); in addition, the
+programmer is responsible for coding CALL FAR instructions where
+necessary when calling \e{external} functions, and must also keep
+track of which external variable definitions are far and which are
+near.
+
+
+\S{qsfpu} \i{Floating-Point} Differences
+
+NASM uses different names to refer to floating-point registers from
+MASM: where MASM would call them \c{ST(0)}, \c{ST(1)} and so on, and
+\i\c{a86} would call them simply \c{0}, \c{1} and so on, NASM
+chooses to call them \c{st0}, \c{st1} etc.
+
+As of version 0.96, NASM now treats the instructions with
+\i{`nowait'} forms in the same way as MASM-compatible assemblers.
+The idiosyncratic treatment employed by 0.95 and earlier was based
+on a misunderstanding by the authors.
+
+
+\S{qsother} Other Differences
+
+For historical reasons, NASM uses the keyword \i\c{TWORD} where MASM
+and compatible assemblers use \i\c{TBYTE}.
+
+Historically, NASM does not declare \i{uninitialized storage} in the
+same way as MASM: where a MASM programmer might use \c{stack db 64 dup
+(?)}, NASM requires \c{stack resb 64}, intended to be read as `reserve
+64 bytes'. For a limited amount of compatibility, since NASM treats
+\c{?} as a valid character in symbol names, you can code \c{? equ 0}
+and then writing \c{dw ?} will at least do something vaguely useful.
+
+As of NASM 2.15, the MASM syntax is also supported.
+
+In addition to all of this, macros and directives work completely
+differently to MASM. See \k{preproc} and \k{directive} for further
+details.
+
+\S{masm-compat} MASM compatibility package
+
+See \k{pkg_masm}.
+
+
+\C{lang} The NASM Language
+
+\H{syntax} Layout of a NASM Source Line
+
+Like most assemblers, each NASM source line contains (unless it
+is a macro, a preprocessor directive or an assembler directive: see
+\k{preproc} and \k{directive}) some combination of the four fields
+
+\c label:    instruction operands        ; comment
+
+As usual, most of these fields are optional; the presence or absence
+of any combination of a label, an instruction and a \i{comment} is
+allowed.  Of course, the operand field is either required or forbidden
+by the presence and nature of the instruction field.
+
+NASM uses backslash (\\) as the line continuation character; if a line
+ends with backslash, the next line is considered to be a part of the
+backslash-ended line.
+
+NASM places no restrictions on white space within a line: labels may
+have white space before them, or instructions may have no space
+before them, or anything. The \i{colon} after a label is also
+optional. (Note that this means that if you intend to code \c{lodsb}
+alone on a line, and type \c{lodab} by accident, then that's still a
+valid source line which does nothing but define a label. Running
+NASM with the command-line option
+\I{label-orphan}\c{-w+orphan-labels} will cause it to warn you if
+you define a label alone on a line without a \i{trailing colon}.)
+
+\i{Valid characters} in labels are letters, numbers, \c{_}, \c{$},
+\c{#}, \c{@}, \c{~}, \c{.}, and \c{?}. The only characters which may
+be used as the \e{first} character of an identifier are letters,
+\c{.} (with special meaning: see \k{locallab}), \c{_} and \c{?}.
+An identifier may also be prefixed with a \I{$, prefix}\c{$} to
+indicate that it is intended to be read as an identifier and not a
+reserved word; thus, if some other module you are linking with
+defines a symbol called \c{eax}, you can refer to \c{$eax} in NASM
+code to distinguish the symbol from the register. Maximum length of
+an identifier is 4095 characters.
+
+The instruction field may contain any machine instruction: Pentium and
+P6 instructions, FPU instructions, MMX instructions and even
+undocumented instructions are all supported. The instruction may be
+prefixed by \c{LOCK}, \c{REP}, \c{REPE}/\c{REPZ}, \c{REPNE}/\c{REPNZ},
+\c{XACQUIRE}/\c{XRELEASE} or \c{BND}/\c{NOBND}, in the usual
+way. Explicit \I{address-size prefixes}address-size and
+\i{operand-size prefixes} \i\c{A16}, \i\c{A32}, \i\c{A64}, \i\c{O16}
+and \i\c{O32}, \i\c{O64} are provided - one example of their use is
+given in \k{mixsize}. You can also use the name of a \I{segment
+override}segment register as an instruction prefix: coding \c{es mov
+bx,ax} is equivalent to coding \c{mov es:bx,ax}. We recommend the
+latter syntax, since it is consistent with other syntactic features of
+the language, but for instructions such as \c{LODSB}, which has no
+operands and yet can require a segment override, there is no clean
+syntactic way to proceed apart from \c{es lodsb}.
+
+An instruction is not required to use a prefix: prefixes such as
+\c{CS}, \c{A32}, \c{LOCK} or \c{REPE} can appear on a line by
+themselves, and NASM will just generate the prefix bytes.
+
+In addition to actual machine instructions, NASM also supports a
+number of pseudo-instructions, described in \k{pseudop}.
+
+Instruction \i{operands} may take a number of forms: they can be
+registers, described simply by the register name (e.g. \c{ax},
+\c{bp}, \c{ebx}, \c{cr0}: NASM does not use the \c{gas}-style
+syntax in which register names must be prefixed by a \c{%} sign), or
+they can be \i{effective addresses} (see \k{effaddr}), constants
+(\k{const}) or expressions (\k{expr}).
+
+For x87 \i{floating-point} instructions, NASM accepts a wide range of
+syntaxes: you can use two-operand forms like MASM supports, or you
+can use NASM's native single-operand forms in most cases.
+\# Details of
+\# all forms of each supported instruction are given in
+\# \k{iref}.
+For example, you can code:
+
+\c         fadd    st1             ; this sets st0 := st0 + st1
+\c         fadd    st0,st1         ; so does this
+\c
+\c         fadd    st1,st0         ; this sets st1 := st1 + st0
+\c         fadd    to st1          ; so does this
+
+Almost any x87 floating-point instruction that references memory must
+use one of the prefixes \i\c{DWORD}, \i\c{QWORD} or \i\c{TWORD} to
+indicate what size of \i{memory operand} it refers to.
+
+
+\H{pseudop} \i{Pseudo-Instructions}
+
+Pseudo-instructions are things which, though not real x86 machine
+instructions, are used in the instruction field anyway because that's
+the most convenient place to put them. The current pseudo-instructions
+are \i\c{DB}, \i\c{DW}, \i\c{DD}, \i\c{DQ}, \i\c{DT}, \i\c{DO},
+\i\c{DY} and \i\c\{DZ}; their \I{storage,
+uninitialized}\i{uninitialized} counterparts \i\c{RESB}, \i\c{RESW},
+\i\c{RESD}, \i\c{RESQ}, \i\c{REST}, \i\c{RESO}, \i\c{RESY} and
+\i\c\{RESZ}; the \i\c{INCBIN} command, the \i\c{EQU} command, and the
+\i\c{TIMES} prefix.
+
+In this documentation, the notation "\c{D}\e{x}" and "\c{RES}\e{x}" is
+used to indicate all the \c{DB} and \c{RESB} type directives,
+respectively.
+
+
+\S{db} \c{D}\e{x}: Declaring Initialized Data
+
+\i\c{DB}, \i\c{DW}, \i\c{DD}, \i\c{DQ}, \i\c{DT}, \i\c{DO}, \i\c{DY}
+and \i\c{DZ} (collectively "\c{D}\e{x}" in this documentation) are used,
+much as in MASM, to declare initialized data in the output file. They
+can be invoked in a wide range of ways:
+\I{floating-point}\I{character constant}\I{string constant}
+
+\c       db    0x55                ; just the byte 0x55
+\c       db    0x55,0x56,0x57      ; three bytes in succession
+\c       db    'a',0x55            ; character constants are OK
+\c       db    'hello',13,10,'$'   ; so are string constants
+\c       dw    0x1234              ; 0x34 0x12
+\c       dw    'a'                 ; 0x61 0x00 (it's just a number)
+\c       dw    'ab'                ; 0x61 0x62 (character constant)
+\c       dw    'abc'               ; 0x61 0x62 0x63 0x00 (string)
+\c       dd    0x12345678          ; 0x78 0x56 0x34 0x12
+\c       dd    1.234567e20         ; floating-point constant
+\c       dq    0x123456789abcdef0  ; eight byte constant
+\c       dq    1.234567e20         ; double-precision float
+\c       dt    1.234567e20         ; extended-precision float
+
+\c{DT}, \c{DO}, \c{DY} and \c{DZ} do not accept integer
+\i{numeric constants} as operands.
+
+\I{masmdb} Starting in NASM 2.15, a the following \i{MASM}-like features
+have been implemented:
+
+\b A \I{?db}\c{?} argument to declare \i{uninitialized storage}:
+
+\c       db    ?                   ; uninitialized
+
+\b A superset of the \i\c{DUP} syntax. The NASM version of this has
+the following syntax specification; capital letters indicate literal
+keywords:
+
+\c      dx      := DB | DW | DD | DQ | DT | DO | DY | DZ
+\c      type    := BYTE | WORD | DWORD | QWORD | TWORD | OWORD | YWORD | ZWORD
+\c      atom    := expression | string | float | '?'
+\c      parlist := '(' value ',' value ... ')'
+\c      duplist := expression DUP type '%' parlist
+\c      list    := duplist | '%' parlist | type '%' parlist
+\c      value   := type atom | list
+\c
+\c      stmt    := dx value ',' value ...
+
+\> Note that a \e{list} needs to be prefixed with a \I{%db}\c{%} sign unless
+prefixed by either \c{DUP} or a \e{type} in order to avoid confusing it with
+a parenthesis starting an expression. The following expressions are all
+valid:
+
+\c        db 33
+\c        db (44)		; Integer expression
+\c      ; db (44,55)		; Invalid - error
+\c        db %(44,55)
+\c        db %('XX','YY')
+\c        db ('AA')		; Integer expression - outputs single byte
+\c        db %('BB')		; List, containing a string
+\c        db ?
+\c        db 6 dup (33)
+\c        db 6 dup (33, 34)
+\c        db 6 dup (33, 34), 35
+\c        db 7 dup (99)
+\c        db 7 dup dword (?, word ?, ?)
+\c        dw byte (?,44)
+\c        dw 3 dup (0xcc, 4 dup byte ('PQR'), ?), 0xabcd
+\c        dd 16 dup (0xaaaa, ?, 0xbbbbbb)
+\c        dd 64 dup (?)
+
+\I{baddb} The use of \c{$} (current address) in a \c{D}\e{x} statement is
+undefined in the current version of NASM, \e{except in the following
+cases}:
+
+\b For the first expression in the statement, either a \c{DUP} or a data
+item.
+
+\b An expression of the form "\e{value}\c{ - $}", which is converted
+to a self-relative relocation.
+
+Future versions of NASM is likely to produce a different result or
+issue an error this case.
+
+There is no such restriction on using \c{$$} or section-relative
+symbols.
+
+\S{resb} \c{RESB} and Friends: Declaring \i{Uninitialized} Data
+
+\i\c{RESB}, \i\c{RESW}, \i\c{RESD}, \i\c{RESQ}, \i\c{REST},
+\i\c{RESO}, \i\c{RESY} and \i\c\{RESZ} are designed to be used in the
+BSS section of a module: they declare \e{uninitialized} storage
+space. Each takes a single operand, which is the number of bytes,
+words, doublewords or whatever to reserve. The operand to a
+\c{RESB}-type pseudo-instruction \e{would} be a \i\e{critical
+expression} (see \k{crit}), except that for legacy compatibility
+reasons forward references are permitted, however \e{the code will be
+extremely fragile and this should be considered a severe programming
+error.} A warning will be issued; code generating this warning should
+be remedied as quickly as possible (see the \c{forward} class in
+\k{warnings}.)
+
+For example:
+
+\c buffer:         resb    64              ; reserve 64 bytes
+\c wordvar:        resw    1               ; reserve a word
+\c realarray       resq    10              ; array of ten reals
+\c ymmval:         resy    1               ; one YMM register
+\c zmmvals:        resz    32              ; 32 ZMM registers
+
+\I{masmdb} Since NASM 2.15, the MASM syntax of using \I{?db}\c{?}
+and \i\c{DUP} in the \c{D}\e{x} directives is also supported. Thus,
+the above example could also be written:
+
+\c buffer:         db      64 dup (?)      ; reserve 64 bytes
+\c wordvar:        dw      ?               ; reserve a word
+\c realarray       dq      10 dup (?)      ; array of ten reals
+\c ymmval:         dy      ?               ; one YMM register
+\c zmmvals:        dz      32 dup (?)      ; 32 ZMM registers
+
+
+\S{incbin} \i\c{INCBIN}: Including External \i{Binary Files}
+
+\c{INCBIN} includes binary file data verbatim into the output
+file. This can be handy for (for example) including \i{graphics} and
+\i{sound} data directly into a game executable file. It can be called
+in one of these three ways:
+
+\c     incbin  "file.dat"             ; include the whole file
+\c     incbin  "file.dat",1024        ; skip the first 1024 bytes
+\c     incbin  "file.dat",1024,512    ; skip the first 1024, and
+\c                                    ; actually include at most 512
+
+\c{INCBIN} is both a directive and a standard macro; the standard
+macro version searches for the file in the include file search path
+and adds the file to the dependency lists.  This macro can be
+overridden if desired.
+
+
+\S{equ} \i\c{EQU}: Defining Constants
+
+\c{EQU} defines a symbol to a given constant value: when \c{EQU} is
+used, the source line must contain a label. The action of \c{EQU} is
+to define the given label name to the value of its (only) operand.
+This definition is absolute, and cannot change later. So, for
+example,
+
+\c message         db      'hello, world'
+\c msglen          equ     $-message
+
+defines \c{msglen} to be the constant 12. \c{msglen} may not then be
+redefined later. This is not a \i{preprocessor} definition either:
+the value of \c{msglen} is evaluated \e{once}, using the value of
+\c{$} (see \k{expr} for an explanation of \c{$}) at the point of
+definition, rather than being evaluated wherever it is referenced
+and using the value of \c{$} at the point of reference.
+
+
+\S{times} \i\c{TIMES}: \i{Repeating} Instructions or Data
+
+The \c{TIMES} prefix causes the instruction to be assembled multiple
+times. This is partly present as NASM's equivalent of the \i\c{DUP}
+syntax supported by \i{MASM}-compatible assemblers, in that you can
+code
+
+\c zerobuf:        times 64 db 0
+
+or similar things; but \c{TIMES} is more versatile than that. The
+argument to \c{TIMES} is not just a numeric constant, but a numeric
+\e{expression}, so you can do things like
+
+\c buffer: db      'hello, world'
+\c         times 64-$+buffer db ' '
+
+which will store exactly enough spaces to make the total length of
+\c{buffer} up to 64. Finally, \c{TIMES} can be applied to ordinary
+instructions, so you can code trivial \i{unrolled loops} in it:
+
+\c         times 100 movsb
+
+Note that there is no effective difference between \c{times 100 resb
+1} and \c{resb 100}, except that the latter will be assembled about
+100 times faster due to the internal structure of the assembler.
+
+The operand to \c{TIMES} is a critical expression (\k{crit}).
+
+Note also that \c{TIMES} can't be applied to \i{macros}: the reason
+for this is that \c{TIMES} is processed after the macro phase, which
+allows the argument to \c{TIMES} to contain expressions such as
+\c{64-$+buffer} as above. To repeat more than one line of code, or a
+complex macro, use the preprocessor \i\c{%rep} directive.
+
+
+\H{effaddr} Effective Addresses
+
+An \i{effective address} is any operand to an instruction which
+\I{memory reference}references memory. Effective addresses, in NASM,
+have a very simple syntax: they consist of an expression evaluating
+to the desired address, enclosed in \i{square brackets}. For
+example:
+
+\c wordvar dw      123
+\c         mov     ax,wordvar
+\c         mov     ax,wordvar+1
+\c         mov     ax,es:wordvar+bx
+
+Anything not conforming to this simple system is not a valid memory
+reference in NASM, for example \c{es:wordvarbx}.
+
+More complicated effective addresses, such as those involving more
+than one register, work in exactly the same way:
+
+\c         mov     eax,ebx*2+ecx+offset
+\c         mov     ax,bp+di+8
+
+NASM is capable of doing \i{algebra} on these effective addresses,
+so that things which don't necessarily \e{look} legal are perfectly
+all right:
+
+\c     mov     eax,ebx*5             ; assembles as ebx*4+ebx
+\c     mov     eax,label1*2-label2   ; ie label1+(label1-label2)
+
+Some forms of effective address have more than one assembled form;
+in most such cases NASM will generate the smallest form it can. For
+example, there are distinct assembled forms for the 32-bit effective
+addresses \c{eax*2+0} and \c{eax+eax}, and NASM will generally
+generate the latter on the grounds that the former requires four
+bytes to store a zero offset.
+
+NASM has a hinting mechanism which will cause \c{eax+ebx} and
+\c{ebx+eax} to generate different opcodes; this is occasionally
+useful because \c{esi+ebp} and \c{ebp+esi} have different
+default segment registers.
+
+However, you can force NASM to generate an effective address in a
+particular form by the use of the keywords \c{BYTE}, \c{WORD},
+\c{DWORD} and \c{NOSPLIT}. If you need \c{eax+3} to be assembled
+using a double-word offset field instead of the one byte NASM will
+normally generate, you can code \c{dword eax+3}. Similarly, you
+can force NASM to use a byte offset for a small value which it
+hasn't seen on the first pass (see \k{crit} for an example of such a
+code fragment) by using \c{byte eax+offset}. As special cases,
+\c{byte eax} will code \c{eax+0} with a byte offset of zero, and
+\c{dword eax} will code it with a double-word offset of zero. The
+normal form, \c{eax}, will be coded with no offset field.
+
+The form described in the previous paragraph is also useful if you
+are trying to access data in a 32-bit segment from within 16 bit code.
+For more information on this see the section on mixed-size addressing
+(\k{mixaddr}). In particular, if you need to access data with a known
+offset that is larger than will fit in a 16-bit value, if you don't
+specify that it is a dword offset, nasm will cause the high word of
+the offset to be lost.
+
+Similarly, NASM will split \c{eax*2} into \c{eax+eax} because
+that allows the offset field to be absent and space to be saved; in
+fact, it will also split \c{eax*2+offset} into
+\c{eax+eax+offset}. You can combat this behaviour by the use of
+the \c{NOSPLIT} keyword: \c{nosplit eax*2} will force
+\c{eax*2+0} to be generated literally. \c{nosplit eax*1} also has the
+same effect. In another way, a split EA form \c{0, eax*2} can be used, too.
+However, \c{NOSPLIT} in \c{nosplit eax+eax} will be ignored because user's
+intention here is considered as \c{eax+eax}.
+
+In 64-bit mode, NASM will by default generate absolute addresses.  The
+\i\c{REL} keyword makes it produce \c{RIP}-relative addresses. Since
+this is frequently the normally desired behaviour, see the \c{DEFAULT}
+directive (\k{default}). The keyword \i\c{ABS} overrides \i\c{REL}.
+
+A new form of split effective address syntax is also supported. This is
+mainly intended for mib operands as used by MPX instructions, but can
+be used for any memory reference. The basic concept of this form is
+splitting base and index.
+
+\c      mov eax,ebx+8,ecx*4   ; ebx=base, ecx=index, 4=scale, 8=disp
+
+For mib operands, there are several ways of writing effective address depending
+on the tools. NASM supports all currently possible ways of mib syntax:
+
+\c      ; bndstx
+\c      ; next 5 lines are parsed same
+\c      ; base=rax, index=rbx, scale=1, displacement=3
+\c      bndstx rax+0x3,rbx, bnd0      ; NASM - split EA
+\c      bndstx rbx*1+rax+0x3, bnd0    ; GAS - '*1' indecates an index reg
+\c      bndstx rax+rbx+3, bnd0        ; GAS - without hints
+\c      bndstx rax+0x3, bnd0, rbx     ; ICC-1
+\c      bndstx rax+0x3, rbx, bnd0     ; ICC-2
+
+When broadcasting decorator is used, the opsize keyword should match
+the size of each element.
+
+\c      VDIVPS zmm4, zmm5, dword rbx{1to16}   ; single-precision float
+\c      VDIVPS zmm4, zmm5, zword rbx          ; packed 512 bit memory
+
+
+\H{const} \i{Constants}
+
+NASM understands four different types of constant: numeric,
+character, string and floating-point.
+
+
+\S{numconst} \i{Numeric Constants}
+
+A numeric constant is simply a number. NASM allows you to specify
+numbers in a variety of number bases, in a variety of ways: you can
+suffix \c{H} or \c{X}, \c{D} or \c{T}, \c{Q} or \c{O}, and \c{B} or
+\c{Y} for \i{hexadecimal}, \i{decimal}, \i{octal} and \i{binary}
+respectively, or you can prefix \c{0x}, for hexadecimal in the style
+of C, or you can prefix \c{$} for hexadecimal in the style of Borland
+Pascal or Motorola Assemblers. Note, though, that the \I{$,
+prefix}\c{$} prefix does double duty as a prefix on identifiers (see
+\k{syntax}), so a hex number prefixed with a \c{$} sign must have a
+digit after the \c{$} rather than a letter.  In addition, current
+versions of NASM accept the prefix \c{0h} for hexadecimal, \c{0d} or
+\c{0t} for decimal, \c{0o} or \c{0q} for octal, and \c{0b} or \c{0y}
+for binary.  Please note that unlike C, a \c{0} prefix by itself does
+\e{not} imply an octal constant!
+
+Numeric constants can have underscores (\c{_}) interspersed to break
+up long strings.
+
+Some examples (all producing exactly the same code):
+
+\c         mov     ax,200          ; decimal
+\c         mov     ax,0200         ; still decimal
+\c         mov     ax,0200d        ; explicitly decimal
+\c         mov     ax,0d200        ; also decimal
+\c         mov     ax,0c8h         ; hex
+\c         mov     ax,$0c8         ; hex again: the 0 is required
+\c         mov     ax,0xc8         ; hex yet again
+\c         mov     ax,0hc8         ; still hex
+\c         mov     ax,310q         ; octal
+\c         mov     ax,310o         ; octal again
+\c         mov     ax,0o310        ; octal yet again
+\c         mov     ax,0q310        ; octal yet again
+\c         mov     ax,11001000b    ; binary
+\c         mov     ax,1100_1000b   ; same binary constant
+\c         mov     ax,1100_1000y   ; same binary constant once more
+\c         mov     ax,0b1100_1000  ; same binary constant yet again
+\c         mov     ax,0y1100_1000  ; same binary constant yet again
+
+\S{strings} \I{string}\I{string constants}\i{Character Strings}
+
+A character string consists of up to eight characters enclosed in
+either single quotes (\c{'...'}), double quotes (\c{"..."}) or
+backquotes (\c{`...`}).  Single or double quotes are equivalent to
+NASM (except of course that surrounding the constant with single
+quotes allows double quotes to appear within it and vice versa); the
+contents of those are represented verbatim.  Strings enclosed in
+backquotes support C-style \c{\\}-escapes for special characters.
+
+
+The following \i{escape sequences} are recognized by backquoted strings:
+
+\c       \'          single quote (')
+\c       \"          double quote (")
+\c       \`          backquote (`)
+\c       \\\          backslash (\)
+\c       \?          question mark (?)
+\c       \a          BEL (ASCII 7)
+\c       \b          BS  (ASCII 8)
+\c       \t          TAB (ASCII 9)
+\c       \n          LF  (ASCII 10)
+\c       \v          VT  (ASCII 11)
+\c       \f          FF  (ASCII 12)
+\c       \r          CR  (ASCII 13)
+\c       \e          ESC (ASCII 27)
+\c       \377        Up to 3 octal digits - literal byte
+\c       \xFF        Up to 2 hexadecimal digits - literal byte
+\c       \u1234      4 hexadecimal digits - Unicode character
+\c       \U12345678  8 hexadecimal digits - Unicode character
+
+All other escape sequences are reserved.  Note that \c{\\0}, meaning a
+\c{NUL} character (ASCII 0), is a special case of the octal escape
+sequence.
+
+\i{Unicode} characters specified with \c{\\u} or \c{\\U} are converted to
+\i{UTF-8}.  For example, the following lines are all equivalent:
+
+\c       db `\u263a`            ; UTF-8 smiley face
+\c       db `\xe2\x98\xba`      ; UTF-8 smiley face
+\c       db 0E2h, 098h, 0BAh    ; UTF-8 smiley face
+
+
+\S{chrconst} \i{Character Constants}
+
+A character constant consists of a string up to eight bytes long, used
+in an expression context.  It is treated as if it was an integer.
+
+A character constant with more than one byte will be arranged
+with \i{little-endian} order in mind: if you code
+
+\c           mov eax,'abcd'
+
+then the constant generated is not \c{0x61626364}, but
+\c{0x64636261}, so that if you were then to store the value into
+memory, it would read \c{abcd} rather than \c{dcba}. This is also
+the sense of character constants understood by the Pentium's
+\i\c{CPUID} instruction.
+
+
+\S{strconst} \i{String Constants}
+
+String constants are character strings used in the context of some
+pseudo-instructions, namely the
+\I\c{DW}\I\c{DD}\I\c{DQ}\I\c{DT}\I\c{DO}\I\c{DY}\i\c{DB} family and
+\i\c{INCBIN} (where it represents a filename.)  They are also used in
+certain preprocessor directives.
+
+A string constant looks like a character constant, only longer. It
+is treated as a concatenation of maximum-size character constants
+for the conditions. So the following are equivalent:
+
+\c       db    'hello'               ; string constant
+\c       db    'h','e','l','l','o'   ; equivalent character constants
+
+And the following are also equivalent:
+
+\c       dd    'ninechars'           ; doubleword string constant
+\c       dd    'nine','char','s'     ; becomes three doublewords
+\c       db    'ninechars',0,0,0     ; and really looks like this
+
+Note that when used in a string-supporting context, quoted strings are
+treated as a string constants even if they are short enough to be a
+character constant, because otherwise \c{db 'ab'} would have the same
+effect as \c{db 'a'}, which would be silly. Similarly, three-character
+or four-character constants are treated as strings when they are
+operands to \c{DW}, and so forth.
+
+\S{unicode} \I{UTF-16}\I{UTF-32}\i{Unicode} Strings
+
+The special operators \i\c{__?utf16?__}, \i\c{__?utf16le?__},
+\i\c{__?utf16be?__}, \i\c{__?utf32?__}, \i\c{__?utf32le?__} and
+\i\c{__?utf32be?__} allows definition of Unicode strings.  They take a
+string in UTF-8 format and converts it to UTF-16 or UTF-32,
+respectively.  Unless the \c{be} forms are specified, the output is
+littleendian.
+
+For example:
+
+\c %define u(x) __?utf16?__(x)
+\c %define w(x) __?utf32?__(x)
+\c
+\c       dw u('C:\WINDOWS'), 0       ; Pathname in UTF-16
+\c       dd w(`A + B = \u206a`), 0   ; String in UTF-32
+
+The UTF operators can be applied either to strings passed to the
+\c{DB} family instructions, or to character constants in an expression
+context.
+
+\S{fltconst} \I{floating-point, constants}Floating-Point Constants
+
+\i{Floating-point} constants are acceptable only as arguments to
+\i\c{DB}, \i\c{DW}, \i\c{DD}, \i\c{DQ}, \i\c{DT}, and \i\c{DO}, or as
+arguments to the special operators \i\c{__?float8?__},
+\i\c{__?float16?__}, \i\c{__?bfloat16?__}, \i\c{__?float32?__},
+\i\c{__?float64?__}, \i\c{__?float80m?__}, \i\c{__?float80e?__},
+\i\c{__?float128l?__}, and \i\c{__?float128h?__}. See also \k{pkg_fp}.
+
+Floating-point constants are expressed in the traditional form:
+digits, then a period, then optionally more digits, then optionally an
+\c{E} followed by an exponent. The period is mandatory, so that NASM
+can distinguish between \c{dd 1}, which declares an integer constant,
+and \c{dd 1.0} which declares a floating-point constant.
+
+NASM also support C99-style hexadecimal floating-point: \c{0x},
+hexadecimal digits, period, optionally more hexadeximal digits, then
+optionally a \c{P} followed by a \e{binary} (not hexadecimal) exponent
+in decimal notation.  As an extension, NASM additionally supports the
+\c{0h} and \c{$} prefixes for hexadecimal, as well binary and octal
+floating-point, using the \c{0b} or \c{0y} and \c{0o} or \c{0q}
+prefixes, respectively.
+
+Underscores to break up groups of digits are permitted in
+floating-point constants as well.
+
+Some examples:
+
+\c       db    -0.2                    ; "Quarter precision"
+\c       dw    -0.5                    ; IEEE 754r/SSE5 half precision
+\c       dd    1.2                     ; an easy one
+\c       dd    1.222_222_222           ; underscores are permitted
+\c       dd    0x1p+2                  ; 1.0x2^2 = 4.0
+\c       dq    0x1p+32                 ; 1.0x2^32 = 4 294 967 296.0
+\c       dq    1.e10                   ; 10 000 000 000.0
+\c       dq    1.e+10                  ; synonymous with 1.e10
+\c       dq    1.e-10                  ; 0.000 000 000 1
+\c       dt    3.141592653589793238462 ; pi
+\c       do    1.e+4000                ; IEEE 754r quad precision
+
+The 8-bit "quarter-precision" floating-point format is
+sign:exponent:mantissa = 1:4:3 with an exponent bias of 7.  This
+appears to be the most frequently used 8-bit floating-point format,
+although it is not covered by any formal standard.  This is sometimes
+called a "\i{minifloat}."
+
+The \i\c{bfloat16} format is effectively a compressed version of the
+32-bit single precision format, with a reduced mantissa. It is
+effectively the same as truncating the 32-bit format to the upper 16
+bits, except for rounding. There is no \c{D}\e{x} directive that
+corresponds to \c{bfloat16} as it obviously has the same size as the
+IEEE standard 16-bit half precision format, see however \k{pkg_fp}.
+
+The special operators are used to produce floating-point numbers in
+other contexts.  They produce the binary representation of a specific
+floating-point number as an integer, and can use anywhere integer
+constants are used in an expression.  \c{__?float80m?__} and
+\c{__?float80e?__} produce the 64-bit mantissa and 16-bit exponent of an
+80-bit floating-point number, and \c{__?float128l?__} and
+\c{__?float128h?__} produce the lower and upper 64-bit halves of a 128-bit
+floating-point number, respectively.
+
+For example:
+
+\c       mov    rax,__?float64?__(3.141592653589793238462)
+
+... would assign the binary representation of pi as a 64-bit floating
+point number into \c{RAX}.  This is exactly equivalent to:
+
+\c       mov    rax,0x400921fb54442d18
+
+NASM cannot do compile-time arithmetic on floating-point constants.
+This is because NASM is designed to be portable - although it always
+generates code to run on x86 processors, the assembler itself can
+run on any system with an ANSI C compiler. Therefore, the assembler
+cannot guarantee the presence of a floating-point unit capable of
+handling the \i{Intel number formats}, and so for NASM to be able to
+do floating arithmetic it would have to include its own complete set
+of floating-point routines, which would significantly increase the
+size of the assembler for very little benefit.
+
+The special tokens \i\c{__?Infinity?__}, \i\c{__?QNaN?__} (or
+\i\c{__?NaN?__}) and \i\c{__?SNaN?__} can be used to generate
+\I{infinity}infinities, quiet \i{NaN}s, and signalling NaNs,
+respectively.  These are normally used as macros:
+
+\c %define Inf __?Infinity?__
+\c %define NaN __?QNaN?__
+\c
+\c       dq    +1.5, -Inf, NaN         ; Double-precision constants
+
+The \c{%use fp} standard macro package contains a set of convenience
+macros.  See \k{pkg_fp}.
+
+\S{bcdconst} \I{floating-point, packed BCD constants}Packed BCD Constants
+
+x87-style packed BCD constants can be used in the same contexts as
+80-bit floating-point numbers.  They are suffixed with \c{p} or
+prefixed with \c{0p}, and can include up to 18 decimal digits.
+
+As with other numeric constants, underscores can be used to separate
+digits.
+
+For example:
+
+\c       dt 12_345_678_901_245_678p
+\c       dt -12_345_678_901_245_678p
+\c       dt +0p33
+\c       dt 33p
+
+
+\H{expr} \i{Expressions}
+
+Expressions in NASM are similar in syntax to those in C.  Expressions
+are evaluated as 64-bit integers which are then adjusted to the
+appropriate size.
+
+NASM supports two special tokens in expressions, allowing
+calculations to involve the current assembly position: the
+\I{$, here}\c{$} and \i\c{$$} tokens. \c{$} evaluates to the assembly
+position at the beginning of the line containing the expression; so
+you can code an \i{infinite loop} using \c{JMP $}. \c{$$} evaluates
+to the beginning of the current section; so you can tell how far
+into the section you are by using \c{($-$$)}.
+
+The arithmetic \i{operators} provided by NASM are listed here, in
+increasing order of \i{precedence}.
+
+A \e{boolean} value is true if nonzero and false if zero. The
+operators which return a boolean value always return 1 for true and 0
+for false.
+
+
+\S{exptri} \I{?op}\c{?} ... \c{:}: Conditional Operator
+
+The syntax of this operator, similar to the C conditional operator, is:
+
+\e{boolean} \c{?} \e{trueval} \c{:} \e{falseval}
+
+This operator evaluates to \e{trueval} if \e{boolean} is true,
+otherwise to \e{falseval}.
+
+Note that NASM allows \c{?} characters in symbol names. Therefore, it
+is highly advisable to always put spaces around the \c{?} and \c{:}
+characters.
+
+
+\S{expbor}: \i\c{||}: \i{Boolean OR} Operator
+
+The \c{||} operator gives a boolean OR: it evaluates to 1 if both sides of
+the expression are nonzero, otherwise 0.
+
+
+\S{expbxor}: \i\c{^^}: \i{Boolean XOR} Operator
+
+The \c{^^} operator gives a boolean XOR: it evaluates to 1 if any one side of
+the expression is nonzero, otherwise 0.
+
+
+\S{expband}: \i\c{&&}: \i{Boolean AND} Operator
+
+The \c{&&} operator gives a boolean AND: it evaluates to 1 if both sides of
+the expression is nonzero, otherwise 0.
+
+
+\S{exprel}: \i{Comparison Operators}
+
+NASM supports the following comparison operators:
+
+\b \i\c{=} or \i\c{==} compare for equality.
+
+\b \i\c{!=} or \i\c{<>} compare for inequality.
+
+\b \i\c{<} compares signed less than.
+
+\b \i\c{<=} compares signed less than or equal.
+
+\b \i\c{>} compares signed greater than.
+
+\b \i\c{>=} compares signed greater than or equal.
+
+These operators evaluate to 0 for false or 1 for true.
+
+\b \i{<=>} does a signed comparison, and evaluates to -1 for less
+than, 0 for equal, and 1 for greater than.
+
+At this time, NASM does not provide unsigned comparison operators.
+
+
+\S{expor} \i\c{|}: \i{Bitwise OR} Operator
+
+The \c{|} operator gives a bitwise OR, exactly as performed by the
+\c{OR} machine instruction.
+
+
+\S{expxor} \i\c{^}: \i{Bitwise XOR} Operator
+
+\c{^} provides the bitwise XOR operation.
+
+
+\S{expand} \i\c{&}: \i{Bitwise AND} Operator
+
+\c{&} provides the bitwise AND operation.
+
+
+\S{expshift} \i{Bit Shift} Operators
+
+\i\c{<<} gives a bit-shift to the left, just as it does in C. So
+\c{5<<3} evaluates to 5 times 8, or 40. \i\c{>>} gives an \I{unsigned,
+bit shift}\e{unsigned} (logical) bit-shift to the right; the bits
+shifted in from the left are set to zero.
+
+\i\c{<<<} gives a bit-shift to the left, exactly equivalent to the
+\c{<<} operator; it is included for completeness. \i\c{>>>} gives an
+\I{signed, bit shift}\e{signed} (arithmetic) bit-shift to the right;
+the bits shifted in from the left are filled with copies of the most
+significant (sign) bit.
+
+
+\S{expplmi} \I{+ opaddition}\c{+} and \I{- opsubtraction}\c{-}:
+\i{Addition} and \i{Subtraction} Operators
+
+The \c{+} and \c{-} operators do perfectly ordinary addition and
+subtraction.
+
+
+\S{expmul} \i{Multiplication}, \i{Division} and \i{Modulo}
+
+\i\c{*} is the multiplication operator.
+
+\i\c{/} and \i\c{//} are both division operators: \c{/} is
+\I{division, unsigned}\I{unsigned, division}unsigned division and \c{//} is
+\I{division, signed}\I{signed, division}signed division.
+
+Similarly, \i\c{%} and \i\c{%%} provide \I{modulo,
+unsigned}\I{unsigned, modulo}unsigned and \I{modulo, signed}\I{signed,
+modulo}signed modulo operators respectively.
+
+Since the \c{%} character is used extensively by the macro
+\i{preprocessor}, you should ensure that both the signed and unsigned
+modulo operators are followed by white space wherever they appear.
+
+NASM, like ANSI C, provides no guarantees about the sensible
+operation of the signed modulo operator. On most systems it will match
+the signed division operator, such that:
+
+\c      b * (a // b) + (a %% b) = a       (b != 0)
+
+
+\S{expmul} \I{operators, unary}\i{Unary Operators}
+
+The highest-priority operators in NASM's expression grammar are those
+which only apply to one argument.  These are:
+
+\b \I{- opunary}\c{-} \I{arithmetic negation}negates (\i{2's complement}) its
+operand.
+
+\b \I{+ opunary}\c{+} does nothing; it's provided for symmetry with \c{-}.
+
+\b \I{~ opunary}\c{~} computes the \I{negation, bitwise}\i{bitwise
+negation} (\i{1's complement}) of its operand.
+
+\b \I{! opunary}\c{!} is the \I{negation, boolean}\i{boolean negation}
+operator. It evaluates to 1 if the argument is 0, otherwise 0.
+
+\b \c{SEG} provides the \i{segment address} of its operand (explained in
+more detail in \k{segwrt}).
+
+\b A set of additional operators with leading and trailing double
+underscores are used to implement the \c{integer functions} of the
+\c{ifunc} macro package, see \k{pkg_ifunc}.
+
+
+\H{segwrt} \i\c{SEG} and \i\c{WRT}
+
+When writing large 16-bit programs, which must be split into
+multiple \i{segments}, it is often necessary to be able to refer to
+the \I{segment address}segment part of the address of a symbol. NASM
+supports the \c{SEG} operator to perform this function.
+
+The \c{SEG} operator evaluates to the \i\e{preferred} segment base of a
+symbol, defined as the segment base relative to which the offset of
+the symbol makes sense. So the code
+
+\c         mov     ax,seg symbol
+\c         mov     es,ax
+\c         mov     bx,symbol
+
+will load \c{ES:BX} with a valid pointer to the symbol \c{symbol}.
+
+Things can be more complex than this: since 16-bit segments and
+\i{groups} may \I{overlapping segments}overlap, you might occasionally
+want to refer to some symbol using a different segment base from the
+preferred one. NASM lets you do this, by the use of the \c{WRT}
+(With Reference To) keyword. So you can do things like
+
+\c         mov     ax,weird_seg        ; weird_seg is a segment base
+\c         mov     es,ax
+\c         mov     bx,symbol wrt weird_seg
+
+to load \c{ES:BX} with a different, but functionally equivalent,
+pointer to the symbol \c{symbol}.
+
+NASM supports far (inter-segment) calls and jumps by means of the
+syntax \c{call segment:offset}, where \c{segment} and \c{offset}
+both represent immediate values. So to call a far procedure, you
+could code either of
+
+\c         call    (seg procedure):procedure
+\c         call    weird_seg:(procedure wrt weird_seg)
+
+(The parentheses are included for clarity, to show the intended
+parsing of the above instructions. They are not necessary in
+practice.)
+
+NASM supports the syntax \I\c{CALL FAR}\c{call far procedure} as a
+synonym for the first of the above usages. \c{JMP} works identically
+to \c{CALL} in these examples.
+
+To declare a \i{far pointer} to a data item in a data segment, you
+must code
+
+\c         dw      symbol, seg symbol
+
+NASM supports no convenient synonym for this, though you can always
+invent one using the macro processor.
+
+
+\H{strict} \i\c{STRICT}: Inhibiting Optimization
+
+When assembling with the optimizer set to level 2 or higher (see
+\k{opt-O}), NASM will use size specifiers (\c{BYTE}, \c{WORD},
+\c{DWORD}, \c{QWORD}, \c{TWORD}, \c{OWORD}, \c{YWORD} or \c{ZWORD}),
+but will give them the smallest possible size. The keyword \c{STRICT}
+can be used to inhibit optimization and force a particular operand to
+be emitted in the specified size. For example, with the optimizer on,
+and in \c{BITS 16} mode,
+
+\c         push dword 33
+
+is encoded in three bytes \c{66 6A 21}, whereas
+
+\c         push strict dword 33
+
+is encoded in six bytes, with a full dword immediate operand \c{66 68
+21 00 00 00}.
+
+With the optimizer off, the same code (six bytes) is generated whether
+the \c{STRICT} keyword was used or not.
+
+
+\H{crit} \i{Critical Expressions}
+
+Although NASM has an optional multi-pass optimizer, there are some
+expressions which must be resolvable on the first pass. These are
+called \e{Critical Expressions}.
+
+The first pass is used to determine the size of all the assembled
+code and data, so that the second pass, when generating all the
+code, knows all the symbol addresses the code refers to. So one
+thing NASM can't handle is code whose size depends on the value of a
+symbol declared after the code in question. For example,
+
+\c         times (label-$) db 0
+\c label:  db      'Where am I?'
+
+The argument to \i\c{TIMES} in this case could equally legally
+evaluate to anything at all; NASM will reject this example because
+it cannot tell the size of the \c{TIMES} line when it first sees it.
+It will just as firmly reject the slightly \I{paradox}paradoxical
+code
+
+\c         times (label-$+1) db 0
+\c label:  db      'NOW where am I?'
+
+in which \e{any} value for the \c{TIMES} argument is by definition
+wrong!
+
+NASM rejects these examples by means of a concept called a
+\e{critical expression}, which is defined to be an expression whose
+value is required to be computable in the first pass, and which must
+therefore depend only on symbols defined before it. The argument to
+the \c{TIMES} prefix is a critical expression.
+
+\H{locallab} \i{Local Labels}
+
+NASM gives special treatment to symbols beginning with a \i{period}.
+A label beginning with a single period is treated as a \e{local}
+label, which means that it is associated with the previous non-local
+label. So, for example:
+
+\c label1  ; some code
+\c
+\c .loop
+\c         ; some more code
+\c
+\c         jne     .loop
+\c         ret
+\c
+\c label2  ; some code
+\c
+\c .loop
+\c         ; some more code
+\c
+\c         jne     .loop
+\c         ret
+
+In the above code fragment, each \c{JNE} instruction jumps to the
+line immediately before it, because the two definitions of \c{.loop}
+are kept separate by virtue of each being associated with the
+previous non-local label.
+
+This form of local label handling is borrowed from the old Amiga
+assembler \i{DevPac}; however, NASM goes one step further, in
+allowing access to local labels from other parts of the code. This
+is achieved by means of \e{defining} a local label in terms of the
+previous non-local label: the first definition of \c{.loop} above is
+really defining a symbol called \c{label1.loop}, and the second
+defines a symbol called \c{label2.loop}. So, if you really needed
+to, you could write
+
+\c label3  ; some more code
+\c         ; and some more
+\c
+\c         jmp label1.loop
+
+Sometimes it is useful - in a macro, for instance - to be able to
+define a label which can be referenced from anywhere but which
+doesn't interfere with the normal local-label mechanism. Such a
+label can't be non-local because it would interfere with subsequent
+definitions of, and references to, local labels; and it can't be
+local because the macro that defined it wouldn't know the label's
+full name. NASM therefore introduces a third type of label, which is
+probably only useful in macro definitions: if a label begins with
+the \I{label prefix}special prefix \i\c{..@}, then it does nothing
+to the local label mechanism. So you could code
+
+\c label1:                         ; a non-local label
+\c .local:                         ; this is really label1.local
+\c ..@foo:                         ; this is a special symbol
+\c label2:                         ; another non-local label
+\c .local:                         ; this is really label2.local
+\c
+\c         jmp     ..@foo          ; this will jump three lines up
+
+NASM has the capacity to define other special symbols beginning with
+a double period: for example, \c{..start} is used to specify the
+entry point in the \c{obj} output format (see \k{dotdotstart}),
+\c{..imagebase} is used to find out the offset from a base address
+of the current image in the \c{win64} output format (see \k{win64pic}).
+So just keep in mind that symbols beginning with a double period are
+special.
+
+
+\C{preproc} The NASM \i{Preprocessor}
+
+NASM contains a powerful \i{macro processor}, which supports
+conditional assembly, multi-level file inclusion, two forms of macro
+(single-line and multi-line), and a `context stack' mechanism for
+extra macro power. Preprocessor directives all begin with a \c{%}
+sign. As a result, some care needs to be taken when using the \c{%}
+arithmetic operator to avoid it being confused with a preprocessor
+directive; it is recommended that it always be surrounded by
+whitespace.
+
+The NASM preprocessor borrows concepts from both the C preprocessor
+and the macro facilities of many other assemblers.
+
+\H{pcsteps} \i{Preprocessor Expansions}
+
+The input to the preprocessor is expanded in the following ways in the
+order specified here.
+
+\S{pcbackslash} \i{Continuation Line} Collapsing
+
+The preprocessor first collapses all lines which end with a backslash
+(\c{\\}) character into a single line.  Thus:
+
+\c %define THIS_VERY_LONG_MACRO_NAME_IS_DEFINED_TO \\
+\c         THIS_VALUE
+
+will work like a single-line macro without the backslash-newline
+sequence.
+
+\IR{comment removal} comment, removal
+\IR{comment removal} preprocessor, comment removal
+
+\S{pccomment} \i{Comment Removal}
+
+After concatenation, comments are removed.
+\I{comment, syntax}\i{Comments}
+begin with the character \c{;} unless contained
+inside a quoted string or a handful of other special contexts.
+
+\I{ccomment}Note that this is applied \e{after} \i{continuation lines}
+are collapsed. This means that
+
+\c       add al,'\\'	 ; Add the ASCII code for \\
+\c	 mov ecx,al	; Save the character
+
+will probably not do what you expect, as the second line will be
+considered part of the preceeding comment. Although this behavior is
+sometimes confusing, it is both the behavior of NASM since the very
+first version as well as the behavior of the C preprocessor.
+
+
+\S{pcline}\i\c{%line} directives
+
+In this step, \i\c{%line} directives are processed. See \k{line}.
+
+
+\S{pccond}\I{preprocessor conditionals}\I{preprocessor loops}
+Conditionals, Loops and \i{Multi-Line Macro} Definitions
+
+In this step, the following \i{preprocessor directives} are processed:
+
+\b \i{Multi-line macro} definitions, specified by the \i\c{%macro} and
+\i\c{%imacro} directives. The body of a multi-line macro is stored and
+is not further expanded at this time. See \k{mlmacro}.
+
+\b \i{Conditional assembly}, specified by the \i\c{%if} family of preprocessor
+directives. Disabled part of the source code are discarded and are not
+futher expanded. See \k{condasm}.
+
+\b \i{Preprocessor loops}, specified by the \i\c{%rep} preprocessor
+directive. A preprocessor loop is very similar to a multi-line macro
+and as such the body is stored and is not futher expanded at this
+time. See \k{rep}.
+
+These constructs are required to be balanced, so that the ending of a
+block can be detected, but no further processing is done at this time;
+stored blocks will be inserted at this step when they are expanded
+(see below.)
+
+It is specific to each directive to what extent \i{inline expansions}
+and \i{detokenization} are performed for the arguments of the
+directives.
+
+
+\S{pcdirect} \i{Directives} processing
+
+Remaining preprocessor \i{directives} are processed. It is specific
+to each directive to what extend the above expansions or the ones
+specified in \k{pcfinal} are performed on their arguments.
+
+It is specific to each directive to what extent \i{inline expansions}
+and \i{detokenization} are performed for the arguments of the
+directives.
+
+
+\S{pcsmacro} \i{Inline expansions} and other \I{preprocessor directives}directives
+
+In this step, the following expansions are performed on each line:
+
+\b \i{Single-line macros} are expanded. See \k{slmacro}.
+
+\b \i{Preprocessor functions} are expanded. See \k{ppfunc}.
+
+\b If this line is the result of \i{multi-line macro} expansions (see
+below), the parameters to that macro are expanded at this time. See
+\k{mlmacro}.
+
+\b \i{Macro indirection}, using the \i\c{%} construct, is expanded. See
+\k{indmacro}.
+
+\b Token \i{concatenation} using either the \i\c{%+} operator (see
+\k{concat%+}) or implicitly (see \k{indmacro} and \k{concat}.)
+
+\b \i{Macro-local labels} are converted into unique strings, see
+\k{maclocal}.
+
+
+\S{pcmmacro} \i{Multi-Line Macro Expansion}
+
+In this step, \i{multi-line macros} are expanded into new lines of
+source, like the typical macro feature of many other assemblers. See
+\k{mlmacro}.
+
+After expansion, the newly injected lines of source are processed
+starting with the step defined in \k{pccond}.
+
+
+\S{pcfinal} \i{Detokenization}
+
+In this step, the final line of source code is produced. It performs
+the following operations:
+
+\b Environment variables specified using the \i\c{%!} construct are
+expanded. See \k{ctxlocal}.
+
+\b \i{Context-local labels} are expanded into unique strings. See
+\k{ctxlocal}.
+
+\b All tokens are converted to their text representation. Unlike the C
+preprocessor, the NASM preprocessor does not insert whitespace between
+adjacent tokens unless present in the source code. See \k{concat}.
+
+The resulting line of text either is sent to the assembler, or, if
+running in preprocessor-only mode, to the output file (see \k{opt-E});
+if necessary prefixed by a newly inserted \i\c{%line} directive.
+
+
+\H{slmacro} \i{Single-Line Macros}
+
+Single-line macros are expanded inline, much like macros in the C
+preprocessor.
+
+\S{define} The Normal Way: \I\c{%idefine}\i\c{%define}
+
+Single-line macros are defined using the \c{%define} preprocessor
+directive. The definitions work in a similar way to C; so you can do
+things like
+
+\c %define ctrl    0x1F &
+\c %define param(a,b) ((a)+(a)*(b))
+\c
+\c         mov     byte param(2,ebx), ctrl 'D'
+
+which will expand to
+
+\c         mov     byte (2)+(2)*(ebx), 0x1F & 'D'
+
+When the expansion of a single-line macro contains tokens which
+invoke another macro, the expansion is performed at invocation time,
+not at definition time. Thus the code
+
+\c %define a(x)    1+b(x)
+\c %define b(x)    2*x
+\c
+\c         mov     ax,a(8)
+
+will evaluate in the expected way to \c{mov ax,1+2*8}, even though
+the macro \c{b} wasn't defined at the time of definition of \c{a}.
+
+Note that single-line macro argument list cannot be preceded by whitespace.
+Otherwise it will be treated as an expansion. For example:
+
+\c    %define foo (a,b)               ; no arguments, (a,b) is the expansion
+\c    %define bar(a,b)                ; two arguments, empty expansion
+
+
+Macros defined with \c{%define} are \i{case sensitive}: after
+\c{%define foo bar}, only \c{foo} will expand to \c{bar}: \c{Foo} or
+\c{FOO} will not. By using \c{%idefine} instead of \c{%define} (the
+`i' stands for `insensitive') you can define all the case variants
+of a macro at once, so that \c{%idefine foo bar} would cause
+\c{foo}, \c{Foo}, \c{FOO}, \c{fOO} and so on all to expand to
+\c{bar}.
+
+There is a mechanism which detects when a macro call has occurred as
+a result of a previous expansion of the same macro, to guard against
+\i{circular references} and infinite loops. If this happens, the
+preprocessor will only expand the first occurrence of the macro.
+Hence, if you code
+
+\c %define a(x)    1+a(x)
+\c
+\c         mov     ax,a(3)
+
+the macro \c{a(3)} will expand once, becoming \c{1+a(3)}, and will
+then expand no further. This behaviour can be useful: see \k{32c}
+for an example of its use.
+
+You can \I{overloading, single-line macros}overload single-line
+macros: if you write
+
+\c %define foo(x)   1+x
+\c %define foo(x,y) 1+x*y
+
+the preprocessor will be able to handle both types of macro call,
+by counting the parameters you pass; so \c{foo(3)} will become
+\c{1+3} whereas \c{foo(ebx,2)} will become \c{1+ebx*2}. However, if
+you define
+
+\c %define foo bar
+
+then no other definition of \c{foo} will be accepted: a macro with
+no parameters prohibits the definition of the same name as a macro
+\e{with} parameters, and vice versa.
+
+This doesn't prevent single-line macros being \e{redefined}: you can
+perfectly well define a macro with
+
+\c %define foo bar
+
+and then re-define it later in the same source file with
+
+\c %define foo baz
+
+Then everywhere the macro \c{foo} is invoked, it will be expanded
+according to the most recent definition. This is particularly useful
+when defining single-line macros with \c{%assign} (see \k{assign}).
+
+The following additional features were added in NASM 2.15:
+
+It is possible to define an empty string instead of an argument name
+if the argument is never used. For example:
+
+\c    %define ereg(foo,) e %+ foo
+\c      mov eax,ereg(dx,cx)
+
+A single pair of parentheses is a subcase of a single, unused argument:
+
+\c    %define myreg() eax
+\c	mov edx,myreg()
+
+This is similar to the behavior of the C preprocessor.
+
+\b If declared with an \c{=}, NASM will expand the argument and then
+evaluate it as a numeric expression. The name of the argument may
+optionally be followed by \c{/} followed by a numeric radix character
+(\c{b}, \c{y}, \c{o}, \c{q}, \c{d}, \c{t}, \c{h} or \c{x}) and/or the
+letters \c{u} (unsigned) or \c{s} (signed), in which the number is
+formatted accordingly, with a radix prefix if a radix letter is
+specified. For the case of hexadecimal, if the radix letter is in
+upper case, alphabetic hex digits will be in upper case.
+
+\b If declared with an \c{&}, NASM will expand the argument and then
+turn into a quoted string; if the argument already \e{is} a quoted
+string, it will be quoted again.
+
+\b If declared with \c{&&}, NASM will expand the argument and then
+turn it into a quoted string, but if the argument already is a quoted
+string, it will \e{not} be re-quoted.
+
+\b If declared with a \c{+}, it is a greedy or variadic parameter; it
+will include any subsequent commas and parameters.
+
+\b If declared with an \c{!}, NASM will not strip whitespace and
+braces (potentially useful in conjunction with \c{&} or \c{&&}.)
+
+For example:
+
+\c     %define xyzzy(=expr,&val,=hex/x) expr, str, hex
+\c     %define plugh(x) xyzzy(x,x,x)
+\c     db plugh(13+5), `\0` ; Expands to: db 18, "13+5", 0x12, `\0`
+
+You can \i{pre-define} single-line macros using the `-d' option on
+the NASM command line: see \k{opt-d}.
+
+
+\S{xdefine} Resolving \c{%define}: \I\c{%ixdefine}\i\c{%xdefine}
+
+To have a reference to an embedded single-line macro resolved at the
+time that the embedding macro is \e{defined}, as opposed to when the
+embedding macro is \e{expanded}, you need a different mechanism to the
+one offered by \c{%define}. The solution is to use \c{%xdefine}, or
+it's \I{case sensitive}case-insensitive counterpart \c{%ixdefine}.
+
+Suppose you have the following code:
+
+\c %define  isTrue  1
+\c %define  isFalse isTrue
+\c %define  isTrue  0
+\c
+\c val1:    db      isFalse
+\c
+\c %define  isTrue  1
+\c
+\c val2:    db      isFalse
+
+In this case, \c{val1} is equal to 0, and \c{val2} is equal to 1.
+This is because, when a single-line macro is defined using
+\c{%define}, it is expanded only when it is called. As \c{isFalse}
+expands to \c{isTrue}, the expansion will be the current value of
+\c{isTrue}. The first time it is called that is 0, and the second
+time it is 1.
+
+If you wanted \c{isFalse} to expand to the value assigned to the
+embedded macro \c{isTrue} at the time that \c{isFalse} was defined,
+you need to change the above code to use \c{%xdefine}.
+
+\c %xdefine isTrue  1
+\c %xdefine isFalse isTrue
+\c %xdefine isTrue  0
+\c
+\c val1:    db      isFalse
+\c
+\c %xdefine isTrue  1
+\c
+\c val2:    db      isFalse
+
+Now, each time that \c{isFalse} is called, it expands to 1,
+as that is what the embedded macro \c{isTrue} expanded to at
+the time that \c{isFalse} was defined.
+
+\c{%xdefine} and \c{%ixdefine} supports argument expansion exactly the
+same way that \c{%define} and \c{%idefine} does.
+
+
+\S{indmacro} \i{Macro Indirection}: \I\c{%}\c{%...}
+
+The \c{%...} construct can be used to expand macros in contexts
+where macro expansion would otherwise not occur, including in the
+names other macros.  For example, if you have a set of macros named
+\c{Foo16}, \c{Foo32} and \c{Foo64}, you could write:
+
+\c	mov ax,Foo%__?BITS?__	; The Foo value
+
+to use the builtin macro \c{__?BITS?__} (see \k{bitsm}) to automatically
+select between them.  Similarly, the two statements:
+
+\c %xdefine Bar		Quux	; Expands due to %xdefine
+\c %define  Bar		%Quux	; Expands due to %...
+
+have, in fact, exactly the same effect.
+
+\c{%...} concatenates to adjacent tokens in the same way that
+multi-line macro parameters do, see \k{concat} for details.
+
+
+\S{concat%+} Concatenating Single Line Macro Tokens: \i\c{%+}
+
+Individual tokens in single line macros can be concatenated, to produce
+longer tokens for later processing. This can be useful if there are
+several similar macros that perform similar functions.
+
+Please note that a space is required after \c{%+}, in order to
+disambiguate it from the syntax \c{%+1} used in multiline macros.
+
+As an example, consider the following:
+
+\c %define BDASTART 400h                ; Start of BIOS data area
+
+\c struc   tBIOSDA                      ; its structure
+\c         .COM1addr       RESW    1
+\c         .COM2addr       RESW    1
+\c         ; ..and so on
+\c endstruc
+
+Now, if we need to access the elements of tBIOSDA in different places,
+we can end up with:
+
+\c         mov     ax,BDASTART + tBIOSDA.COM1addr
+\c         mov     bx,BDASTART + tBIOSDA.COM2addr
+
+This will become pretty ugly (and tedious) if used in many places, and
+can be reduced in size significantly by using the following macro:
+
+\c ; Macro to access BIOS variables by their names (from tBDA):
+
+\c %define BDA(x)  BDASTART + tBIOSDA. %+ x
+
+Now the above code can be written as:
+
+\c         mov     ax,BDA(COM1addr)
+\c         mov     bx,BDA(COM2addr)
+
+Using this feature, we can simplify references to a lot of macros (and,
+in turn, reduce typing errors).
+
+
+\S{selfref%?} The Macro Name Itself: \i\c{%?} and \i\c{%??}
+
+The special symbols \c{%?} and \c{%??} can be used to reference the
+macro name itself inside a macro expansion, this is supported for both
+single-and multi-line macros.  \c{%?} refers to the macro name as
+\e{invoked}, whereas \c{%??} refers to the macro name as
+\e{declared}.  The two are always the same for case-sensitive
+macros, but for case-insensitive macros, they can differ.
+
+For example:
+
+\c %imacro Foo 0
+\c         mov %?,%??
+\c %endmacro
+\c
+\c         foo
+\c         FOO
+
+will expand to:
+
+\c         mov foo,Foo
+\c         mov FOO,Foo
+
+These tokens can be used for single-line macros \e{if defined outside
+any multi-line macros.} See below.
+
+\S{selfref%*?} The Single-Line Macro Name: \i\c{%*?} and \i\c{%*??}
+
+If the tokens \c{%?} and \c{%??} are used inside a multi-line macro,
+they are expanded before any directives are processed. As a result,
+
+\c %imacro Foo 0
+\c       %idefine Bar _%?
+\c       mov BAR,bAr
+\c %endmacro
+\c
+\c       foo
+\c       mov eax,bar
+
+will expand to:
+
+\c       mov _foo,_foo
+\c       mov eax,_foo
+
+which may or may not be what you expected. The tokens \c{%*?} and
+\c{%*??} behave like \c{%?} and \c{%??} but are only expanded inside
+single-line macros. Thus:
+
+\c %imacro Foo 0
+\c       %idefine Bar _%*?
+\c       mov BAR,bAr
+\c %endmacro
+\c
+\c       foo
+\c       mov eax,bar
+
+will expand to:
+
+\c       mov _BAR,_bAr
+\c       mov eax,_bar
+
+The \c{%*?} can be used to make a keyword "disappear", for example in
+case a new instruction has been used as a label in older code.  For
+example:
+
+\c %idefine pause $%*?                 ; Hide the PAUSE instruction
+
+\c{%*?} and \c{%*??} were introduced in NASM 2.15.04.
+
+\S{undef} Undefining Single-Line Macros: \i\c{%undef}
+
+Single-line macros can be removed with the \c{%undef} directive.  For
+example, the following sequence:
+
+\c %define foo bar
+\c %undef  foo
+\c
+\c         mov     eax, foo
+
+will expand to the instruction \c{mov eax, foo}, since after
+\c{%undef} the macro \c{foo} is no longer defined.
+
+Macros that would otherwise be pre-defined can be undefined on the
+command-line using the `-u' option on the NASM command line: see
+\k{opt-u}.
+
+
+\S{assign} \i{Preprocessor Variables}: \i\c{%assign}
+
+An alternative way to define single-line macros is by means of the
+\c{%assign} command (and its \I{case sensitive}case-insensitive
+counterpart \i\c{%iassign}, which differs from \c{%assign} in
+exactly the same way that \c{%idefine} differs from \c{%define}).
+
+\c{%assign} is used to define single-line macros which take no
+parameters and have a numeric value. This value can be specified in
+the form of an expression, and it will be evaluated once, when the
+\c{%assign} directive is processed.
+
+Like \c{%define}, macros defined using \c{%assign} can be re-defined
+later, so you can do things like
+
+\c %assign i i+1
+
+to increment the numeric value of a macro.
+
+\c{%assign} is useful for controlling the termination of \c{%rep}
+preprocessor loops: see \k{rep} for an example of this. Another
+use for \c{%assign} is given in \k{16c} and \k{32c}.
+
+The expression passed to \c{%assign} is a \i{critical expression}
+(see \k{crit}), and must also evaluate to a pure number (rather than
+a relocatable reference such as a code or data address, or anything
+involving a register).
+
+See also the \i\c{%eval()} preprocessor function, \k{f_eval}.
+
+
+\S{defstr} Defining Strings: \I\c{%idefstr}\i\c{%defstr}
+
+\c{%defstr}, and its case-insensitive counterpart \c{%idefstr}, define
+or redefine a single-line macro without parameters but converts the
+entire right-hand side, after macro expansion, to a quoted string
+before definition.
+
+For example:
+
+\c %defstr test TEST
+
+is equivalent to
+
+\c %define test 'TEST'
+
+This can be used, for example, with the \c{%!} construct (see
+\k{getenv}):
+
+\c %defstr PATH %!PATH          ; The operating system PATH variable
+
+See also the \i\c{%str()} preprocessor function, \k{f_str}.
+
+
+\S{deftok} Defining Tokens: \I\c{%ideftok}\i\c{%deftok}
+
+\c{%deftok}, and its case-insensitive counterpart \c{%ideftok}, define
+or redefine a single-line macro without parameters but converts the
+second parameter, after string conversion, to a sequence of tokens.
+
+For example:
+
+\c %deftok test 'TEST'
+
+is equivalent to
+
+\c %define test TEST
+
+See also the \i\c{%tok()} preprocessor function, \k{f_tok}.
+
+
+\S{defalias} Defining Aliases: \I\c{%idefalias}\i\c{%defalias}
+
+\c{%defalias}, and its case-insensitive counterpart \c{%idefalias}, define an
+alias to a macro, i.e. equivalent of a symbolic link.
+
+When used with various macro defining and undefining directives, it
+affects the aliased macro. This functionality is intended for being
+able to rename macros while retaining the legacy names.
+
+When an alias is defined, but the aliased macro is then undefined, the
+aliases can legitimately point to nonexistent macros.
+
+The alias can be undefined using the \c{%undefalias} directive.  \e{All}
+aliases can be undefined using the \c{%clear defalias} directive. This
+includes backwards compatibility aliases defined by NASM itself.
+
+To disable aliases without undefining them, use the \c{%aliases off}
+directive.
+
+To check whether an alias is defined, regardless of the existence of
+the aliased macro, use \c{%ifdefalias}.
+
+For example:
+
+\c %defalias OLD NEW
+\c    ; OLD and NEW both undefined
+\c %define NEW 123
+\c    ; OLD and NEW both 123
+\c %undef OLD
+\c    ; OLD and NEW both undefined
+\c %define OLD 456
+\c    ; OLD and NEW both 456
+\c %undefalias OLD
+\c    ; OLD undefined, NEW defined to 456
+
+\S{cond-comma} \i{Conditional Comma Operator}: \i\c{%,}
+
+As of version 2.15, NASM has a conditional comma operator \c{%,} that
+expands to a comma \e{unless} followed by a null expansion, which
+allows suppressing the comma before an empty argument. This is
+especially useful with greedy single-line macros.
+
+For example, all the expressions below are valid:
+
+\c %define greedy(a,b,c+) a + 66 %, b * 3 %, c
+\c
+\c        db greedy(1,2)          ; db 1 + 66, 2 * 3
+\c        db greedy(1,2,3)        ; db 1 + 66, 2 * 3, 3
+\c        db greedy(1,2,3,4)      ; db 1 + 66, 2 * 3, 3, 4
+\c        db greedy(1,2,3,4,5)    ; db 1 + 66, 2 * 3, 3, 4, 5
+
+
+\H{strlen} \i{String Manipulation in Macros}
+
+It's often useful to be able to handle strings in macros. NASM
+supports a few simple string handling macro operators from which
+more complex operations can be constructed.
+
+All the string operators define or redefine a value (either a string
+or a numeric value) to a single-line macro.  When producing a string
+value, it may change the style of quoting of the input string or
+strings, and possibly use \c{\\}-escapes inside \c{`}-quoted strings.
+
+These directives are also available as \i{preprocessor functions}, see
+\k{ppfunc}.
+
+\S{strcat} \i{Concatenating Strings}: \i\c{%strcat}
+
+The \c{%strcat} operator concatenates quoted strings and assign them to
+a single-line macro.
+
+For example:
+
+\c %strcat alpha "Alpha: ", '12" screen'
+
+... would assign the value \c{'Alpha: 12" screen'} to \c{alpha}.
+Similarly:
+
+\c %strcat beta '"foo"\', "'bar'"
+
+... would assign the value \c{`"foo"\\\\'bar'`} to \c{beta}.
+
+The use of commas to separate strings is permitted but optional.
+
+The corresponding preprocessor function is \c{%strcat()}, see
+\k{f_strcat}.
+
+
+\S{strlen} \i{String Length}: \i\c{%strlen}
+
+The \c{%strlen} operator assigns the length of a string to a macro.
+For example:
+
+\c %strlen charcnt 'my string'
+
+In this example, \c{charcnt} would receive the value 9, just as
+if an \c{%assign} had been used. In this example, \c{'my string'}
+was a literal string but it could also have been a single-line
+macro that expands to a string, as in the following example:
+
+\c %define sometext 'my string'
+\c %strlen charcnt sometext
+
+As in the first case, this would result in \c{charcnt} being
+assigned the value of 9.
+
+The corresponding preprocessor function is \c{%strlen()}, see
+\k{f_strlen}.
+
+
+\S{substr} \i{Extracting Substrings}: \i\c{%substr}
+
+Individual letters or substrings in strings can be extracted using the
+\c{%substr} operator.  An example of its use is probably more useful
+than the description:
+
+\c %substr mychar 'xyzw' 1       ; equivalent to %define mychar 'x'
+\c %substr mychar 'xyzw' 2       ; equivalent to %define mychar 'y'
+\c %substr mychar 'xyzw' 3       ; equivalent to %define mychar 'z'
+\c %substr mychar 'xyzw' 2,2     ; equivalent to %define mychar 'yz'
+\c %substr mychar 'xyzw' 2,-1    ; equivalent to %define mychar 'yzw'
+\c %substr mychar 'xyzw' 2,-2    ; equivalent to %define mychar 'yz'
+
+As with \c{%strlen} (see \k{strlen}), the first parameter is the
+single-line macro to be created and the second is the string. The
+third parameter specifies the first character to be selected, and the
+optional fourth parameter preceded by comma) is the length.  Note
+that the first index is 1, not 0 and the last index is equal to the
+value that \c{%strlen} would assign given the same string. Index
+values out of range result in an empty string.  A negative length
+means "until N-1 characters before the end of string", i.e. \c{-1}
+means until end of string, \c{-2} until one character before, etc.
+
+The corresponding preprocessor function is \c{%substr()}, see
+\k{f_substr}, however please note that the default value for the
+length parameter, if omitted, is \c{-1} rather than \c{1} for
+\c{%substr()}.
+
+
+\H{ppfunc} \i{Preprocessor Functions}
+
+Preprocessor functions are, fundamentally, a kind of built-in
+single-line macros. They expand to a string depending on its
+arguments, and can be used in any context where single-line macro
+expansion would be performed. Preprocessor functions were introduced
+in NASM 2.16.
+
+\S{f_abs} \i\c{%abs()} Function
+
+The \c{%abs()} function evaluates its first argument as an expression,
+and then emits the absolute value. This will always be emitted as a
+single token containing a decimal number; no minus sign will be
+emitted even if the input value is the maximum negative number.
+
+\S{f_cond} \i\c{%cond()} Function
+
+The \c{%cond()} function evaluates its first argument as an
+expression, then expands to its second argument if true (nonzero), and
+the third, if present, if false (zero). This is in effect a specialized
+version of the \i\c{%sel()} function; \c{%cond(x,y,z)} is equivalent
+to \c{%sel(2-!(x),y,z)}.
+
+\c %define a 1
+\c %xdefine astr %cond(a,"true","false") ; %define astr "true"
+
+The argument not selected is never expanded.
+
+
+\S{f_count} \i\c{%count()} Function
+
+The \c{%count()} function expands to the number of argments passed to
+the macro. Note that just as for single-line macros, \c{%count()}
+treats an empty argument list as a single empty argument.
+
+\c %xdefine empty %count()        ; %define empty 1
+\c %xdefine one   %count(1)	  ; %define one 1
+\c %xdefine two   %count(5,q)	  ; %define two 2
+\c %define  list  a,b,46
+\c %xdefine lc1   %count(list)	  ; %define lc 1 (just one argument)
+\c %xdefine lc2   %count(%list) ; %define lc 3 (indirection expands)
+
+
+\S{f_eval} \i\c{%eval()} Function
+
+The \c{%eval()} function evaluates its argument as a numeric
+expression and expands to the result as an integer constant in much
+the same way the \i\c{%assign} directive would, see \k{assign}. Unlike
+\c{%assign}, \c{%eval()} supports more than one argument; if more than
+one argument is specified, it is expanded to a comma-separated list of
+values.
+
+\c %assign a    2
+\c %assign b    3
+\c %defstr what %eval(a+b,a*b)	; equivalent to %define what "5,6"
+
+The expressions passed to \c{%eval()} are \i{critical expressions},
+see \k{crit}.
+
+
+\S{f_hex} \i\c{%hex()} Function
+
+Equivalent to \i\c\{%eval()}, except that the results generated are
+given as unsigned hexadecimal, with a \c{0x} prefix.
+
+
+\S{f_is} \i\c{%is()} Family Functions
+
+Each \i\c{%if} family directive (see \k{condasm}) has an equivalent
+\c{%is()} family function, that expands to \c{1} if the equivalent
+\c{%if} directive would process as true, and \c{0} if the equivalent
+\c{%if} directive would process as false.
+
+\c ; Instead of !%isidn() could have used %isnidn()
+\c %if %isdef(foo) && !%isidn(foo,bar)
+\c       db "foo is defined, but not as 'bar'"
+\c %endif
+
+Note that, being functions, the arguments (before expansion) will
+always need to have balanced parentheses so that the end of the
+argument list can be defined. This means that the syntax of
+e.g. \c{%istoken()} and \c{%isidn()} is somewhat stricter than their
+corresponding \c{%if} directives; it may be necessary to escape the
+argument to the conditional using \c{\{\}}:
+
+\c ; Instead of !%isidn() could have used %isnidn()
+\c %if %isdef(foo) && !%isidn({foo,)})
+\c       db "foo is defined, but not as ')'"
+\c %endif
+
+
+\S{f_map} \i\c{%map()} Function
+
+The \c{%map()} function takes as its first parameter the name of a
+single-line macro, followed by up to two optional colon-separated
+subparameters:
+
+\b The first subparameter, if present, should be a list of macro
+parameters enclosed in parentheses. Note that \c{()} represents a
+one-argument list containing an empty parameter; omit the parentheses
+to specify no parameters.
+
+\b The second subparameter, if present, represent the number of
+group size for additional parameters to the macro (default 1).
+
+Further parameters, if any, are then passed as additional parameters to the
+given macro for expansion, in sets given by the specified group size,
+and the results turned into a comma-separated list. If no additional
+parameters are given, \c{%map()} expands to nothing.
+
+For example:
+
+\c %define alpha(&x)     x
+\c %define alpha(&x,y)	 y dup (x)
+\c %define alpha(s,&x,y) y dup (x,s)
+\c ; 0 fixed + 1 grouped parameters per call, calls alpha(&x)
+\c       db %map(alpha,foo,bar,baz,quux)
+\c ; 0 fixed + 2 grouped parameters per call, calls alpha(&x,y)
+\c	 db %map(alpha::2,foo,bar,baz,quux)
+\c ; 1 fixed + 2 grouped parameters per call, calls alpha(s,&x,y)
+\c       db %map(alpha:("!"):2,foo,bar,baz,quux)
+
+... expands to:
+
+\c       db 'foo','bar','baz','quux'
+\c       db bar dup ('foo'),quux dup ('baz')
+\c       db bar dup ('foo',"!"),quux dup ('baz',"!")
+
+As a more complex example, a macro that joins quoted strings together
+with a user-specified delimiter string:
+
+\c %define join(sep)        ''      ; handle the case of zero strings
+\c %define _join(sep,str)   sep,str ; helper macro
+\c %define join(sep,s1,sn+) %strcat(s1, %map(_join:(sep) %, sn))
+\c
+\c       db join(':')
+\c       db join(':','a')
+\c       db join(':','a','b')
+\c       db join(':','a','b','c')
+\c       db join(':','a','b','c','d')
+
+... expands to:
+
+\c       db ''
+\c       db 'a'
+\c       db 'a:b'
+\c       db 'a:b:c'
+\c       db 'a:b:c:d'
+
+
+\S{f_num} \i\c{%num()} Function
+
+The \c{%num()} function evaluates its arguments as expressions, and
+then produces a quoted string encoding the first argument as an
+\e{unsigned} 64-bit integer.
+
+The second argument is the desired number of digits (max 255, default
+-1).
+
+The third argument is the encoding base (from 2 to 64, default 10); if
+the base is given as -2, -8, -10, or -16, then \c{0b}, \c{0q}, \c{0d}
+or \c{0x} is prepended, respectively; all other negative values are
+disallowed.
+
+Only the first argument is required.
+
+If the number of digits is negative, NASM will add additional digits
+if needed; if positive the string is truncated to the number of digits
+specified. 0 is treated as -1, except that the input number 0
+always generates an empty string (thus, the first digit will never be
+zero), even if the base given is negative.
+
+The full 64-symbol set used is, in order:
+
+\c 0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ@_
+
+If a \e{signed} number needs to be converted to a string, use
+\c{%abs()}, \c{%cond()}, and \c{%strcat()} to format the signed number
+string to your specific output requirements.
+
+\S{f_sel} \i\c{%sel()} Function
+
+The \c{%sel()} function evaluates its first argument as an
+expression, then expands to its second argument if 1, the third
+argument if 2, and so on. If the value is less than 1 or larger than
+the number of arguments minus one, then the \c{%sel()} function
+expands to nothing.
+
+\c %define b 2
+\c %xdefine bstr %sel(b,"one","two","three") ; %define bstr "two"
+
+The arguments not selected are never expanded.
+
+
+\S{f_str} \i\c\{%str()} Function
+
+The \c{%str()} function converts its argument, including any commas,
+to a quoted string, similar to the way the \i\c{%defstr} directive
+would, see \k{defstr}.
+
+Being a function, the argument will need to have balanced parentheses
+or be escaped using \c{\{\}}.
+
+\c ; The following lines are all equivalent
+\c %define  test 'TEST'
+\c %defstr  test TEST
+\c %xdefine test %str(TEST)
+
+
+\S{f_strcat} \i\c\{%strcat()} Function
+
+The \c{%strcat()} function concatenates a list of quoted strings, in
+the same way the \i\c{%strcat} directive would, see \k{strcat}.
+
+\c ; The following lines are all equivalent
+\c %define  alpha 'Alpha: 12" screen'
+\c %strcat  alpha "Alpha: ", '12" screen'
+\c %xdefine alpha %strcat("Alpha: ", '12" screen')
+
+
+\S{f_strlen} \i\c{%strlen()} Function
+
+The \c{%strlen()} function expands to the length of a quoted string,
+in the same way the \i\c{%strlen} directive would, see \k{strlen}.
+
+\c ; The following lines are all equivalent
+\c %define  charcnt 9
+\c %strlen  charcnt 'my string'
+\c %xdefine charcnt %strlen('my string')
+
+
+\S{f_substr} \i\c\{%substr()} Function
+
+The \c{%substr()} function extracts a substring of a quoted string, in
+the same way the \i\c{%substr} directive would, see \k{substr}. Note
+that unlike the \c{%substr} directive, commas are required between all
+parameters, is required after the string argument, and that the
+default for the length argument, if omitted, is \c{-1} (i.e. the
+remainder of the string) rather than \c{1}.
+
+\c ; The following lines are all equivalent
+\c %define  mychar 'yzw'
+\c %substr  mychar 'xyzw' 2,-1
+\c %xdefine mychar %substr('xyzw',2,3)
+\c %xdefine mychar %substr('xyzw',2,-1)
+\c %xdefine mychar %substr('xyzw',2)
+
+
+\S{f_tok} \i\c{%tok()} function
+
+The \c{%tok()} function converts a quoted string into a sequence of
+tokens, in the same way the \i\c{%deftok} directive would, see
+\k{deftok}.
+
+\c ; The following lines are all equivalent
+\c %define test TEST
+\c %deftok test 'TEST'
+\c %define test %tok('TEST')
+
+
+\H{mlmacro} \i{Multi-Line Macros}: \I\c{%imacro}\i\c{%macro}
+
+Multi-line macros much like the type of macro seen in MASM
+and TASM, and expand to a new set of lines of source code.
+A multi-line macro definition in NASM looks something like
+this.
+
+\c %macro  prologue 1
+\c
+\c         push    ebp
+\c         mov     ebp,esp
+\c         sub     esp,%1
+\c
+\c %endmacro
+
+This defines a C-like function prologue as a macro: so you would
+invoke the macro with a call such as:
+
+\c myfunc:   prologue 12
+
+which would expand to the three lines of code
+
+\c myfunc: push    ebp
+\c         mov     ebp,esp
+\c         sub     esp,12
+
+The number \c{1} after the macro name in the \c{%macro} line defines
+the number of parameters the macro \c{prologue} expects to receive.
+The use of \c{%1} inside the macro definition refers to the first
+parameter to the macro call. With a macro taking more than one
+parameter, subsequent parameters would be referred to as \c{%2},
+\c{%3} and so on.
+
+Multi-line macros, like single-line macros, are \i{case-sensitive},
+unless you define them using the alternative directive \c{%imacro}.
+
+If you need to pass a comma as \e{part} of a parameter to a
+multi-line macro, you can do that by enclosing the entire parameter
+in \I{braces, around macro parameters}braces. So you could code
+things like:
+
+\c %macro  silly 2
+\c
+\c     %2: db      %1
+\c
+\c %endmacro
+\c
+\c         silly 'a', letter_a             ; letter_a:  db 'a'
+\c         silly 'ab', string_ab           ; string_ab: db 'ab'
+\c         silly {13,10}, crlf             ; crlf:      db 13,10
+
+The behavior with regards to empty arguments at the end of multi-line
+macros before NASM 2.15 was often very strange. For backwards
+compatibility, NASM attempts to recognize cases where the legacy
+behavior would give unexpected results, and issues a warning, but
+largely tries to match the legacy behavior. This can be disabled with
+the \c{%pragma} (see \k{pragma-preproc}):
+
+\c %pragma preproc sane_empty_expansion
+
+
+\S{mlmacover} Overloading Multi-Line Macros\I{overloading, multi-line macros}
+
+As with single-line macros, multi-line macros can be overloaded by
+defining the same macro name several times with different numbers of
+parameters. This time, no exception is made for macros with no
+parameters at all. So you could define
+
+\c %macro  prologue 0
+\c
+\c         push    ebp
+\c         mov     ebp,esp
+\c
+\c %endmacro
+
+to define an alternative form of the function prologue which
+allocates no local stack space.
+
+Sometimes, however, you might want to `overload' a machine
+instruction; for example, you might want to define
+
+\c %macro  push 2
+\c
+\c         push    %1
+\c         push    %2
+\c
+\c %endmacro
+
+so that you could code
+
+\c         push    ebx             ; this line is not a macro call
+\c         push    eax,ecx         ; but this one is
+
+Ordinarily, NASM will give a warning for the first of the above two
+lines, since \c{push} is now defined to be a macro, and is being
+invoked with a number of parameters for which no definition has been
+given. The correct code will still be generated, but the assembler
+will give a warning. This warning can be disabled by the use of the
+\c{-w-macro-params} command-line option (see \k{opt-w}).
+
+
+\S{maclocal} \i{Macro-Local Labels}
+
+NASM allows you to define labels within a multi-line macro
+definition in such a way as to make them local to the macro call: so
+calling the same macro multiple times will use a different label
+each time. You do this by prefixing \i\c{%%} to the label name. So
+you can invent an instruction which executes a \c{RET} if the \c{Z}
+flag is set by doing this:
+
+\c %macro  retz 0
+\c
+\c         jnz     %%skip
+\c         ret
+\c     %%skip:
+\c
+\c %endmacro
+
+You can call this macro as many times as you want, and every time
+you call it NASM will make up a different `real' name to substitute
+for the label \c{%%skip}. The names NASM invents are of the form
+\c{..@2345.skip}, where the number 2345 changes with every macro
+call. The \i\c{..@} prefix prevents macro-local labels from
+interfering with the local label mechanism, as described in
+\k{locallab}. You should avoid defining your own labels in this form
+(the \c{..@} prefix, then a number, then another period) in case
+they interfere with macro-local labels.
+
+These labels are really macro-local \e{tokens}, and can be used for
+other purposes where a token unique to each macro invocation is
+desired, e.g. to name single-line macros without using the context
+feature (\k{ctxlocal}).
+
+
+\S{mlmacgre} \i{Greedy Macro Parameters}
+
+Occasionally it is useful to define a macro which lumps its entire
+command line into one parameter definition, possibly after
+extracting one or two smaller parameters from the front. An example
+might be a macro to write a text string to a file in MS-DOS, where
+you might want to be able to write
+
+\c         writefile filehandle,"hello, world",13,10
+
+NASM allows you to define the last parameter of a macro to be
+\e{greedy}, meaning that if you invoke the macro with more
+parameters than it expects, all the spare parameters get lumped into
+the last defined one along with the separating commas. So if you
+code:
+
+\c %macro  writefile 2+
+\c
+\c         jmp     %%endstr
+\c   %%str:        db      %2
+\c   %%endstr:
+\c         mov     dx,%%str
+\c         mov     cx,%%endstr-%%str
+\c         mov     bx,%1
+\c         mov     ah,0x40
+\c         int     0x21
+\c
+\c %endmacro
+
+then the example call to \c{writefile} above will work as expected:
+the text before the first comma, \c{filehandle}, is used as the
+first macro parameter and expanded when \c{%1} is referred to, and
+all the subsequent text is lumped into \c{%2} and placed after the
+\c{db}.
+
+The greedy nature of the macro is indicated to NASM by the use of
+the \I{+ modifier}\c{+} sign after the parameter count on the
+\c{%macro} line.
+
+If you define a greedy macro, you are effectively telling NASM how
+it should expand the macro given \e{any} number of parameters from
+the actual number specified up to infinity; in this case, for
+example, NASM now knows what to do when it sees a call to
+\c{writefile} with 2, 3, 4 or more parameters. NASM will take this
+into account when overloading macros, and will not allow you to
+define another form of \c{writefile} taking 4 parameters (for
+example).
+
+Of course, the above macro could have been implemented as a
+non-greedy macro, in which case the call to it would have had to
+look like
+
+\c           writefile filehandle, {"hello, world",13,10}
+
+NASM provides both mechanisms for putting \i{commas in macro
+parameters}, and you choose which one you prefer for each macro
+definition.
+
+See \k{sectmac} for a better way to write the above macro.
+
+\S{mlmacrange} \i{Macro Parameters Range}
+
+NASM allows you to expand parameters via special construction \c{%\{x:y\}}
+where \c{x} is the first parameter index and \c{y} is the last. Any index can
+be either negative or positive but must never be zero.
+
+For example
+
+\c %macro mpar 1-*
+\c      db %{3:5}
+\c %endmacro
+\c
+\c mpar 1,2,3,4,5,6
+
+expands to \c{3,4,5} range.
+
+Even more, the parameters can be reversed so that
+
+\c %macro mpar 1-*
+\c      db %{5:3}
+\c %endmacro
+\c
+\c mpar 1,2,3,4,5,6
+
+expands to \c{5,4,3} range.
+
+But even this is not the last. The parameters can be addressed via negative
+indices so NASM will count them reversed. The ones who know Python may see
+the analogue here.
+
+\c %macro mpar 1-*
+\c      db %{-1:-3}
+\c %endmacro
+\c
+\c mpar 1,2,3,4,5,6
+
+expands to \c{6,5,4} range.
+
+Note that NASM uses \i{comma} to separate parameters being expanded.
+
+By the way, here is a trick - you might use the index \c{%{-1:-1}}
+which gives you the \i{last} argument passed to a macro.
+
+\S{mlmacdef} \i{Default Macro Parameters}
+
+NASM also allows you to define a multi-line macro with a \e{range}
+of allowable parameter counts. If you do this, you can specify
+defaults for \i{omitted parameters}. So, for example:
+
+\c %macro  die 0-1 "Painful program death has occurred."
+\c
+\c         writefile 2,%1
+\c         mov     ax,0x4c01
+\c         int     0x21
+\c
+\c %endmacro
+
+This macro (which makes use of the \c{writefile} macro defined in
+\k{mlmacgre}) can be called with an explicit error message, which it
+will display on the error output stream before exiting, or it can be
+called with no parameters, in which case it will use the default
+error message supplied in the macro definition.
+
+In general, you supply a minimum and maximum number of parameters
+for a macro of this type; the minimum number of parameters are then
+required in the macro call, and then you provide defaults for the
+optional ones. So if a macro definition began with the line
+
+\c %macro foobar 1-3 eax,ebx+2
+
+then it could be called with between one and three parameters, and
+\c{%1} would always be taken from the macro call. \c{%2}, if not
+specified by the macro call, would default to \c{eax}, and \c{%3} if
+not specified would default to \c{ebx+2}.
+
+You can provide extra information to a macro by providing
+too many default parameters:
+
+\c %macro quux 1 something
+
+This will trigger a warning by default; see \k{opt-w} for
+more information.
+When \c{quux} is invoked, it receives not one but two parameters.
+\c{something} can be referred to as \c{%2}. The difference
+between passing \c{something} this way and writing \c{something}
+in the macro body is that with this way \c{something} is evaluated
+when the macro is defined, not when it is expanded.
+
+You may omit parameter defaults from the macro definition, in which
+case the parameter default is taken to be blank. This can be useful
+for macros which can take a variable number of parameters, since the
+\i\c{%0} token (see \k{percent0}) allows you to determine how many
+parameters were really passed to the macro call.
+
+This defaulting mechanism can be combined with the greedy-parameter
+mechanism; so the \c{die} macro above could be made more powerful,
+and more useful, by changing the first line of the definition to
+
+\c %macro die 0-1+ "Painful program death has occurred.",13,10
+
+The maximum parameter count can be infinite, denoted by \c{*}. In
+this case, of course, it is impossible to provide a \e{full} set of
+default parameters. Examples of this usage are shown in \k{rotate}.
+
+
+\S{percent0} \i\c{%0}: \I{counting macro parameters}Macro Parameter Counter
+
+The parameter reference \c{%0} will return a numeric constant giving the
+number of parameters received, that is, if \c{%0} is n then \c{%}n is the
+last parameter. \c{%0} is mostly useful for macros that can take a variable
+number of parameters. It can be used as an argument to \c{%rep}
+(see \k{rep}) in order to iterate through all the parameters of a macro.
+Examples are given in \k{rotate}.
+
+
+\S{percent00} \i\c{%00}: \I{label preceding macro}Label Preceding Macro
+
+\c{%00} will return the label preceding the macro invocation, if any. The
+label must be on the same line as the macro invocation, may be a local label
+(see \k{locallab}), and need not end in a colon.
+
+If \c{%00} is present anywhere in the macro body, the label itself
+will not be emitted by NASM. You can, of course, put \c{%00:}
+explicitly at the beginning of your macro.
+
+
+\S{rotate} \i\c{%rotate}: \i{Rotating Macro Parameters}
+
+Unix shell programmers will be familiar with the \I{shift
+command}\c{shift} shell command, which allows the arguments passed
+to a shell script (referenced as \c{$1}, \c{$2} and so on) to be
+moved left by one place, so that the argument previously referenced
+as \c{$2} becomes available as \c{$1}, and the argument previously
+referenced as \c{$1} is no longer available at all.
+
+NASM provides a similar mechanism, in the form of \c{%rotate}. As
+its name suggests, it differs from the Unix \c{shift} in that no
+parameters are lost: parameters rotated off the left end of the
+argument list reappear on the right, and vice versa.
+
+\c{%rotate} is invoked with a single numeric argument (which may be
+an expression). The macro parameters are rotated to the left by that
+many places. If the argument to \c{%rotate} is negative, the macro
+parameters are rotated to the right.
+
+\I{iterating over macro parameters}So a pair of macros to save and
+restore a set of registers might work as follows:
+
+\c %macro  multipush 1-*
+\c
+\c   %rep  %0
+\c         push    %1
+\c   %rotate 1
+\c   %endrep
+\c
+\c %endmacro
+
+This macro invokes the \c{PUSH} instruction on each of its arguments
+in turn, from left to right. It begins by pushing its first
+argument, \c{%1}, then invokes \c{%rotate} to move all the arguments
+one place to the left, so that the original second argument is now
+available as \c{%1}. Repeating this procedure as many times as there
+were arguments (achieved by supplying \c{%0} as the argument to
+\c{%rep}) causes each argument in turn to be pushed.
+
+Note also the use of \c{*} as the maximum parameter count,
+indicating that there is no upper limit on the number of parameters
+you may supply to the \i\c{multipush} macro.
+
+It would be convenient, when using this macro, to have a \c{POP}
+equivalent, which \e{didn't} require the arguments to be given in
+reverse order. Ideally, you would write the \c{multipush} macro
+call, then cut-and-paste the line to where the pop needed to be
+done, and change the name of the called macro to \c{multipop}, and
+the macro would take care of popping the registers in the opposite
+order from the one in which they were pushed.
+
+This can be done by the following definition:
+
+\c %macro  multipop 1-*
+\c
+\c   %rep %0
+\c   %rotate -1
+\c         pop     %1
+\c   %endrep
+\c
+\c %endmacro
+
+This macro begins by rotating its arguments one place to the
+\e{right}, so that the original \e{last} argument appears as \c{%1}.
+This is then popped, and the arguments are rotated right again, so
+the second-to-last argument becomes \c{%1}. Thus the arguments are
+iterated through in reverse order.
+
+
+\S{concat} \i{Concatenating Macro Parameters}
+
+NASM can concatenate macro parameters and macro indirection constructs
+on to other text surrounding them. This allows you to declare a family
+of symbols, for example, in a macro definition. If, for example, you
+wanted to generate a table of key codes along with offsets into the
+table, you could code something like
+
+\c %macro keytab_entry 2
+\c
+\c     keypos%1    equ     $-keytab
+\c                 db      %2
+\c
+\c %endmacro
+\c
+\c keytab:
+\c           keytab_entry F1,128+1
+\c           keytab_entry F2,128+2
+\c           keytab_entry Return,13
+
+which would expand to
+
+\c keytab:
+\c keyposF1        equ     $-keytab
+\c                 db     128+1
+\c keyposF2        equ     $-keytab
+\c                 db      128+2
+\c keyposReturn    equ     $-keytab
+\c                 db      13
+
+You can just as easily concatenate text on to the other end of a
+macro parameter, by writing \c{%1foo}.
+
+If you need to append a \e{digit} to a macro parameter, for example
+defining labels \c{foo1} and \c{foo2} when passed the parameter
+\c{foo}, you can't code \c{%11} because that would be taken as the
+eleventh macro parameter. Instead, you must code
+\I{braces, after % sign}\c{%\{1\}1}, which will separate the first
+\c{1} (giving the number of the macro parameter) from the second
+(literal text to be concatenated to the parameter).
+
+This concatenation can also be applied to other preprocessor in-line
+objects, such as macro-local labels (\k{maclocal}) and context-local
+labels (\k{ctxlocal}). In all cases, ambiguities in syntax can be
+resolved by enclosing everything after the \c{%} sign and before the
+literal text in braces: so \c{%\{%foo\}bar} concatenates the text
+\c{bar} to the end of the real name of the macro-local label
+\c{%%foo}. (This is unnecessary, since the form NASM uses for the
+real names of macro-local labels means that the two usages
+\c{%\{%foo\}bar} and \c{%%foobar} would both expand to the same
+thing anyway; nevertheless, the capability is there.)
+
+The single-line macro indirection construct, \c{%...}
+(\k{indmacro}), behaves the same way as macro parameters for the
+purpose of concatenation.
+
+See also the \c{%+} operator, \k{concat%+}.
+
+
+\S{mlmaccc} \i{Condition Codes as Macro Parameters}
+
+NASM can give special treatment to a macro parameter which contains
+a condition code. For a start, you can refer to the macro parameter
+\c{%1} by means of the alternative syntax \i\c{%+1}, which informs
+NASM that this macro parameter is supposed to contain a condition
+code, and will cause the preprocessor to report an error message if
+the macro is called with a parameter which is \e{not} a valid
+condition code.
+
+Far more usefully, though, you can refer to the macro parameter by
+means of \i\c{%-1}, which NASM will expand as the \e{inverse}
+condition code. So the \c{retz} macro defined in \k{maclocal} can be
+replaced by a general \i{conditional-return macro} like this:
+
+\c %macro  retc 1
+\c
+\c         j%-1    %%skip
+\c         ret
+\c   %%skip:
+\c
+\c %endmacro
+
+This macro can now be invoked using calls like \c{retc ne}, which
+will cause the conditional-jump instruction in the macro expansion
+to come out as \c{JE}, or \c{retc po} which will make the jump a
+\c{JPE}.
+
+The \c{%+1} macro-parameter reference is quite happy to interpret
+the arguments \c{CXZ} and \c{ECXZ} as valid condition codes;
+however, \c{%-1} will report an error if passed either of these,
+because no inverse condition code exists.
+
+
+\S{nolist} \i{Disabling Listing Expansion}\I\c{.nolist}
+
+When NASM is generating a listing file from your program, it will
+generally expand multi-line macros by means of writing the macro
+call and then listing each line of the expansion. This allows you to
+see which instructions in the macro expansion are generating what
+code; however, for some macros this clutters the listing up
+unnecessarily.
+
+NASM therefore provides the \c{.nolist} qualifier, which you can
+include in a macro definition to inhibit the expansion of the macro
+in the listing file. The \c{.nolist} qualifier comes directly after
+the number of parameters, like this:
+
+\c %macro foo 1.nolist
+
+Or like this:
+
+\c %macro bar 1-5+.nolist a,b,c,d,e,f,g,h
+
+\S{unmacro} Undefining Multi-Line Macros: \I\c{%unimacro}\i\c{%unmacro}
+
+Multi-line macros can be removed with the \c{%unmacro} directive.
+Unlike the \c{%undef} directive, however, \c{%unmacro} takes an
+argument specification, and will only remove \i{exact matches} with
+that argument specification.
+
+For example:
+
+\c %macro foo 1-3
+\c         ; Do something
+\c %endmacro
+\c %unmacro foo 1-3
+
+removes the previously defined macro \c{foo}, but
+
+\c %macro bar 1-3
+\c         ; Do something
+\c %endmacro
+\c %unmacro bar 1
+
+does \e{not} remove the macro \c{bar}, since the argument
+specification does not match exactly.
+
+A case-insensitive macro needs to be removed with the \c{%unimacro}
+directive.
+
+\H{condasm} \i{Conditional Assembly}\I\c{%if}
+
+Similarly to the C preprocessor, NASM allows sections of a source
+file to be assembled only if certain conditions are met. The general
+syntax of this feature looks like this:
+
+\c %if<condition>
+\c     ; some code which only appears if <condition> is met
+\c %elif<condition2>
+\c     ; only appears if <condition> is not met but <condition2> is
+\c %else
+\c     ; this appears if neither <condition> nor <condition2> was met
+\c %endif
+
+The inverse forms \i\c{%ifn} and \i\c{%elifn} are also supported.
+
+The \i\c{%else} clause is optional, as is the \i\c{%elif} clause.
+You can have more than one \c{%elif} clause as well.
+
+There are a number of variants of the \c{%if} directive.  Each has its
+corresponding \c{%elif}, \c{%ifn}, and \c{%elifn} directives; for
+example, the equivalents to the \c{%ifdef} directive are \c{%elifdef},
+\c{%ifndef}, and \c{%elifndef}.
+
+\S{ifdef} \i\c{%ifdef}: Testing Single-Line Macro Existence\I{testing,
+single-line macro existence}
+
+Beginning a conditional-assembly block with the line \c{%ifdef
+MACRO} will assemble the subsequent code if, and only if, a
+single-line macro called \c{MACRO} is defined. If not, then the
+\c{%elif} and \c{%else} blocks (if any) will be processed instead.
+
+For example, when debugging a program, you might want to write code
+such as
+
+\c           ; perform some function
+\c %ifdef DEBUG
+\c           writefile 2,"Function performed successfully",13,10
+\c %endif
+\c           ; go and do something else
+
+Then you could use the command-line option \c{-dDEBUG} to create a
+version of the program which produced debugging messages, and remove
+the option to generate the final release version of the program.
+
+You can test for a macro \e{not} being defined by using
+\i\c{%ifndef} instead of \c{%ifdef}. You can also test for macro
+definitions in \c{%elif} blocks by using \i\c{%elifdef} and
+\i\c{%elifndef}.
+
+
+\S{ifmacro} \i\c{%ifmacro}: Testing Multi-Line Macro
+Existence\I{testing, multi-line macro existence}
+
+The \c{%ifmacro} directive operates in the same way as the \c{%ifdef}
+directive, except that it checks for the existence of a multi-line macro.
+
+For example, you may be working with a large project and not have control
+over the macros in a library. You may want to create a macro with one
+name if it doesn't already exist, and another name if one with that name
+does exist.
+
+The \c{%ifmacro} is considered true if defining a macro with the given name
+and number of arguments would cause a definitions conflict. For example:
+
+\c %ifmacro MyMacro 1-3
+\c
+\c      %error "MyMacro 1-3" causes a conflict with an existing macro.
+\c
+\c %else
+\c
+\c      %macro MyMacro 1-3
+\c
+\c              ; insert code to define the macro
+\c
+\c      %endmacro
+\c
+\c %endif
+
+This will create the macro "MyMacro 1-3" if no macro already exists which
+would conflict with it, and emits a warning if there would be a definition
+conflict.
+
+You can test for the macro not existing by using the \i\c{%ifnmacro} instead
+of \c{%ifmacro}. Additional tests can be performed in \c{%elif} blocks by using
+\i\c{%elifmacro} and \i\c{%elifnmacro}.
+
+
+\S{ifctx} \i\c{%ifctx}: Testing the Context Stack\I{testing, context
+stack}
+
+The conditional-assembly construct \c{%ifctx} will cause the
+subsequent code to be assembled if and only if the top context on
+the preprocessor's context stack has the same name as one of the arguments.
+As with \c{%ifdef}, the inverse and \c{%elif} forms \i\c{%ifnctx},
+\i\c{%elifctx} and \i\c{%elifnctx} are also supported.
+
+For more details of the context stack, see \k{ctxstack}. For a
+sample use of \c{%ifctx}, see \k{blockif}.
+
+
+\S{if} \i\c{%if}: Testing Arbitrary Numeric Expressions\I{testing,
+arbitrary numeric expressions}
+
+The conditional-assembly construct \c{%if expr} will cause the
+subsequent code to be assembled if and only if the value of the
+numeric expression \c{expr} is non-zero. An example of the use of
+this feature is in deciding when to break out of a \c{%rep}
+preprocessor loop: see \k{rep} for a detailed example.
+
+The expression given to \c{%if}, and its counterpart \i\c{%elif}, is
+a critical expression (see \k{crit}).
+
+
+Like other \c{%if} constructs, \c{%if} has a counterpart
+\i\c{%elif}, and negative forms \i\c{%ifn} and \i\c{%elifn}.
+
+\S{ifidn} \i\c{%ifidn} and \i\c{%ifidni}: Testing Exact Text
+Identity\I{testing, exact text identity}
+
+The construct \c{%ifidn text1,text2} will cause the subsequent code
+to be assembled if and only if \c{text1} and \c{text2}, after
+expanding single-line macros, are identical pieces of text.
+Differences in white space are not counted.
+
+\c{%ifidni} is similar to \c{%ifidn}, but is \i{case-insensitive}.
+
+For example, the following macro pushes a register or number on the
+stack, and allows you to treat \c{IP} as a real register:
+
+\c %macro  pushparam 1
+\c
+\c   %ifidni %1,ip
+\c         call    %%label
+\c   %%label:
+\c   %else
+\c         push    %1
+\c   %endif
+\c
+\c %endmacro
+
+Like other \c{%if} constructs, \c{%ifidn} has a counterpart
+\i\c{%elifidn}, and negative forms \i\c{%ifnidn} and \i\c{%elifnidn}.
+Similarly, \c{%ifidni} has counterparts \i\c{%elifidni},
+\i\c{%ifnidni} and \i\c{%elifnidni}.
+
+\S{iftyp} \i\c{%ifid}, \i\c{%ifnum}, \i\c{%ifstr}: Testing Token
+Types\I{testing, token types}
+
+Some macros will want to perform different tasks depending on
+whether they are passed a number, a string, or an identifier. For
+example, a string output macro might want to be able to cope with
+being passed either a string constant or a pointer to an existing
+string.
+
+The conditional assembly construct \c{%ifid}, taking one parameter
+(which may be blank), assembles the subsequent code if and only if
+\e{the first token} in the parameter exists and is an
+identifier. \c{$} and \c{$$} are \e{not} considered identifiers by
+\c{%ifid}.
+
+\c{%ifnum} works similarly, but tests for the token being an integer
+numeric constant (not an expression!) possibly preceded by \c{+} or
+\c{-}; \c{%ifstr} tests for it being a quoted string.
+
+For example, the \c{writefile} macro defined in \k{mlmacgre} can be
+extended to take advantage of \c{%ifstr} in the following fashion:
+
+\c %macro writefile 2-3+
+\c
+\c   %ifstr %2
+\c         jmp     %%endstr
+\c     %if %0 = 3
+\c       %%str:    db      %2,%3
+\c     %else
+\c       %%str:    db      %2
+\c     %endif
+\c       %%endstr: mov     dx,%%str
+\c                 mov     cx,%%endstr-%%str
+\c   %else
+\c                 mov     dx,%2
+\c                 mov     cx,%3
+\c   %endif
+\c                 mov     bx,%1
+\c                 mov     ah,0x40
+\c                 int     0x21
+\c
+\c %endmacro
+
+Then the \c{writefile} macro can cope with being called in either of
+the following two ways:
+
+\c         writefile file, strpointer, length
+\c         writefile file, "hello", 13, 10
+
+In the first, \c{strpointer} is used as the address of an
+already-declared string, and \c{length} is used as its length; in
+the second, a string is given to the macro, which therefore declares
+it itself and works out the address and length for itself.
+
+Note the use of \c{%if} inside the \c{%ifstr}: this is to detect
+whether the macro was passed two arguments (so the string would be a
+single string constant, and \c{db %2} would be adequate) or more (in
+which case, all but the first two would be lumped together into
+\c{%3}, and \c{db %2,%3} would be required).
+
+The usual \I\c{%elifid}\I\c{%elifnum}\I\c{%elifstr}\c{%elif}...,
+\I\c{%ifnid}\I\c{%ifnnum}\I\c{%ifnstr}\c{%ifn}..., and
+\I\c{%elifnid}\I\c{%elifnnum}\I\c{%elifnstr}\c{%elifn}... versions
+exist for each of \c{%ifid}, \c{%ifnum} and \c{%ifstr}.
+
+\S{iftoken} \i\c{%iftoken}: Test for a Single Token
+
+Some macros will want to do different things depending on if it is
+passed a single token (e.g. paste it to something else using \c{%+})
+versus a multi-token sequence.
+
+The conditional assembly construct \c{%iftoken} assembles the
+subsequent code if and only if the expanded parameters consist of
+exactly one token, possibly surrounded by whitespace.
+
+For example:
+
+\c %iftoken 1
+
+will assemble the subsequent code, but
+
+\c %iftoken -1
+
+will not, since \c{-1} contains two tokens: the unary minus operator
+\c{-}, and the number \c{1}.
+
+The usual \i\c{%eliftoken}, \i\c\{%ifntoken}, and \i\c{%elifntoken}
+variants are also provided.
+
+\S{ifempty} \i\c{%ifempty}: Test for Empty Expansion
+
+The conditional assembly construct \c{%ifempty} assembles the
+subsequent code if and only if the expanded parameters do not contain
+any tokens at all, whitespace excepted.
+
+The usual \i\c{%elifempty}, \i\c\{%ifnempty}, and \i\c{%elifnempty}
+variants are also provided.
+
+\S{ifenv} \i\c{%ifenv}: Test If Environment Variable Exists
+
+The conditional assembly construct \c{%ifenv} assembles the
+subsequent code if and only if the environment variable referenced by
+the \c{%!}\e{variable} directive exists.
+
+The usual \i\c{%elifenv}, \i\c\{%ifnenv}, and \i\c{%elifnenv}
+variants are also provided.
+
+Just as for \c{%!}\e{variable} the argument should be written as a
+string if it contains characters that would not be legal in an
+identifier.  See \k{getenv}.
+
+\H{rep} \i{Preprocessor Loops}\I{repeating code}: \i\c{%rep}
+
+NASM's \c{TIMES} prefix, though useful, cannot be used to invoke a
+multi-line macro multiple times, because it is processed by NASM
+after macros have already been expanded. Therefore NASM provides
+another form of loop, this time at the preprocessor level: \c{%rep}.
+
+The directives \c{%rep} and \i\c{%endrep} (\c{%rep} takes a numeric
+argument, which can be an expression; \c{%endrep} takes no
+arguments) can be used to enclose a chunk of code, which is then
+replicated as many times as specified by the preprocessor:
+
+\c %assign i 0
+\c %rep    64
+\c         inc     word table+2*i
+\c %assign i i+1
+\c %endrep
+
+This will generate a sequence of 64 \c{INC} instructions,
+incrementing every word of memory from \c{table} to
+\c{table+126}.
+
+For more complex termination conditions, or to break out of a repeat
+loop part way along, you can use the \i\c{%exitrep} directive to
+terminate the loop, like this:
+
+\c fibonacci:
+\c %assign i 0
+\c %assign j 1
+\c %rep 100
+\c %if j > 65535
+\c     %exitrep
+\c %endif
+\c         dw j
+\c %assign k j+i
+\c %assign i j
+\c %assign j k
+\c %endrep
+\c
+\c fib_number equ ($-fibonacci)/2
+
+This produces a list of all the Fibonacci numbers that will fit in
+16 bits. Note that a maximum repeat count must still be given to
+\c{%rep}. This is to prevent the possibility of NASM getting into an
+infinite loop in the preprocessor, which (on multitasking or
+multi-user systems) would typically cause all the system memory to
+be gradually used up and other applications to start crashing.
+
+Note the maximum repeat count is limited to the value specified by the
+\c{--limit-rep} option or \c{%pragma limit rep}, see \k{opt-limit}.
+
+
+\H{files} Source Files and Dependencies
+
+These commands allow you to split your sources into multiple files.
+
+\S{include} \i\c{%include}: \i{Including Other Files}
+
+Using, once again, a very similar syntax to the C preprocessor,
+NASM's preprocessor lets you include other source files into your
+code. This is done by the use of the \i\c{%include} directive:
+
+\c %include "macros.mac"
+
+will include the contents of the file \c{macros.mac} into the source
+file containing the \c{%include} directive.
+
+Include files are \I{searching for include files}searched for in the
+current directory (the directory you're in when you run NASM, as
+opposed to the location of the NASM executable or the location of
+the source file), plus any directories specified on the NASM command
+line using the \c{-i} option.
+
+The standard C idiom for preventing a file being included more than
+once is just as applicable in NASM: if the file \c{macros.mac} has
+the form
+
+\c %ifndef MACROS_MAC
+\c     %define MACROS_MAC
+\c     ; now define some macros
+\c %endif
+
+then including the file more than once will not cause errors,
+because the second time the file is included nothing will happen
+because the macro \c{MACROS_MAC} will already be defined.
+
+You can force a file to be included even if there is no \c{%include}
+directive that explicitly includes it, by using the \i\c{-p} option
+on the NASM command line (see \k{opt-p}).
+
+
+\S{pathsearch} \i\c{%pathsearch}: Search the Include Path
+
+The \c{%pathsearch} directive takes a single-line macro name and a
+filename, and declare or redefines the specified single-line macro to
+be the include-path-resolved version of the filename, if the file
+exists (otherwise, it is passed unchanged.)
+
+For example,
+
+\c %pathsearch MyFoo "foo.bin"
+
+... with \c{-Ibins/} in the include path may end up defining the macro
+\c{MyFoo} to be \c{"bins/foo.bin"}.
+
+
+\S{depend} \i\c{%depend}: Add Dependent Files
+
+The \c{%depend} directive takes a filename and adds it to the list of
+files to be emitted as dependency generation when the \c{-M} options
+and its relatives (see \k{opt-M}) are used.  It produces no output.
+
+This is generally used in conjunction with \c{%pathsearch}.  For
+example, a simplified version of the standard macro wrapper for the
+\c{INCBIN} directive looks like:
+
+\c %imacro incbin 1-2+ 0
+\c %pathsearch dep %1
+\c %depend dep
+\c         incbin dep,%2
+\c %endmacro
+
+This first resolves the location of the file into the macro \c{dep},
+then adds it to the dependency lists, and finally issues the
+assembler-level \c{INCBIN} directive.
+
+
+\S{use} \i\c{%use}: Include Standard Macro Package
+
+The \c{%use} directive is similar to \c{%include}, but rather than
+including the contents of a file, it includes a named standard macro
+package.  The standard macro packages are part of NASM, and are
+described in \k{macropkg}.
+
+Unlike the \c{%include} directive, package names for the \c{%use}
+directive do not require quotes, but quotes are permitted.  In NASM
+2.04 and 2.05 the unquoted form would be macro-expanded; this is no
+longer true.  Thus, the following lines are equivalent:
+
+\c %use altreg
+\c %use 'altreg'
+
+Standard macro packages are protected from multiple inclusion.  When a
+standard macro package is used, a testable single-line macro of the
+form \c{__?USE_}\e{package}\c{?__} is also defined, see \k{use_def}.
+
+\H{ctxstack} The \i{Context Stack}
+
+Having labels that are local to a macro definition is sometimes not
+quite powerful enough: sometimes you want to be able to share labels
+between several macro calls. An example might be a \c{REPEAT} ...
+\c{UNTIL} loop, in which the expansion of the \c{REPEAT} macro
+would need to be able to refer to a label which the \c{UNTIL} macro
+had defined. However, for such a macro you would also want to be
+able to nest these loops.
+
+NASM provides this level of power by means of a \e{context stack}.
+The preprocessor maintains a stack of \e{contexts}, each of which is
+characterized by a name. You add a new context to the stack using
+the \i\c{%push} directive, and remove one using \i\c{%pop}. You can
+define labels that are local to a particular context on the stack.
+
+
+\S{pushpop} \i\c{%push} and \i\c{%pop}: \I{creating
+contexts}\I{removing contexts}Creating and Removing Contexts
+
+The \c{%push} directive is used to create a new context and place it
+on the top of the context stack. \c{%push} takes an optional argument,
+which is the name of the context. For example:
+
+\c %push    foobar
+
+This pushes a new context called \c{foobar} on the stack. You can have
+several contexts on the stack with the same name: they can still be
+distinguished.  If no name is given, the context is unnamed (this is
+normally used when both the \c{%push} and the \c{%pop} are inside a
+single macro definition.)
+
+The directive \c{%pop}, taking one optional argument, removes the top
+context from the context stack and destroys it, along with any
+labels associated with it.  If an argument is given, it must match the
+name of the current context, otherwise it will issue an error.
+
+
+\S{ctxlocal} \i{Context-Local Labels}
+
+Just as the usage \c{%%foo} defines a label which is local to the
+particular macro call in which it is used, the usage \I{%$}\c{%$foo}
+is used to define a label which is local to the context on the top
+of the context stack. So the \c{REPEAT} and \c{UNTIL} example given
+above could be implemented by means of:
+
+\c %macro repeat 0
+\c
+\c     %push   repeat
+\c     %$begin:
+\c
+\c %endmacro
+\c
+\c %macro until 1
+\c
+\c         j%-1    %$begin
+\c     %pop
+\c
+\c %endmacro
+
+and invoked by means of, for example,
+
+\c         mov     cx,string
+\c         repeat
+\c         add     cx,3
+\c         scasb
+\c         until   e
+
+which would scan every fourth byte of a string in search of the byte
+in \c{AL}.
+
+If you need to define, or access, labels local to the context
+\e{below} the top one on the stack, you can use \I{%$$}\c{%$$foo}, or
+\c{%$$$foo} for the context below that, and so on.
+
+
+\S{ctxdefine} \i{Context-Local Single-Line Macros}
+
+NASM also allows you to define single-line macros which are local to
+a particular context, in just the same way:
+
+\c %define %$localmac 3
+
+will define the single-line macro \c{%$localmac} to be local to the
+top context on the stack. Of course, after a subsequent \c{%push},
+it can then still be accessed by the name \c{%$$localmac}.
+
+
+\S{ctxfallthrough} \i{Context Fall-Through Lookup} \e{(deprecated)}
+
+Context fall-through lookup (automatic searching of outer contexts)
+is a feature that was added in NASM version 0.98.03. Unfortunately,
+this feature is unintuitive and can result in buggy code that would
+have otherwise been prevented by NASM's error reporting. As a result,
+this feature has been \e{deprecated}. NASM version 2.09 will issue a
+warning when usage of this \e{deprecated} feature is detected. Starting
+with NASM version 2.10, usage of this \e{deprecated} feature will simply
+result in an \e{expression syntax error}.
+
+An example usage of this \e{deprecated} feature follows:
+
+\c %macro ctxthru 0
+\c %push ctx1
+\c     %assign %$external 1
+\c         %push ctx2
+\c             %assign %$internal 1
+\c             mov eax, %$external
+\c             mov eax, %$internal
+\c         %pop
+\c %pop
+\c %endmacro
+
+As demonstrated, \c{%$external} is being defined in the \c{ctx1}
+context and referenced within the \c{ctx2} context. With context
+fall-through lookup, referencing an undefined context-local macro
+like this implicitly searches through all outer contexts until a match
+is made or isn't found in any context. As a result, \c{%$external}
+referenced within the \c{ctx2} context would implicitly use \c{%$external}
+as defined in \c{ctx1}. Most people would expect NASM to issue an error in
+this situation because \c{%$external} was never defined within \c{ctx2} and also
+isn't qualified with the proper context depth, \c{%$$external}.
+
+Here is a revision of the above example with proper context depth:
+
+\c %macro ctxthru 0
+\c %push ctx1
+\c     %assign %$external 1
+\c         %push ctx2
+\c             %assign %$internal 1
+\c             mov eax, %$$external
+\c             mov eax, %$internal
+\c         %pop
+\c %pop
+\c %endmacro
+
+As demonstrated, \c{%$external} is still being defined in the \c{ctx1}
+context and referenced within the \c{ctx2} context. However, the
+reference to \c{%$external} within \c{ctx2} has been fully qualified with
+the proper context depth, \c{%$$external}, and thus is no longer ambiguous,
+unintuitive or erroneous.
+
+
+\S{ctxrepl} \i\c{%repl}: \I{renaming contexts}Renaming a Context
+
+If you need to change the name of the top context on the stack (in
+order, for example, to have it respond differently to \c{%ifctx}),
+you can execute a \c{%pop} followed by a \c{%push}; but this will
+have the side effect of destroying all context-local labels and
+macros associated with the context that was just popped.
+
+NASM provides the directive \c{%repl}, which \e{replaces} a context
+with a different name, without touching the associated macros and
+labels. So you could replace the destructive code
+
+\c %pop
+\c %push   newname
+
+with the non-destructive version \c{%repl newname}.
+
+
+\S{blockif} Example Use of the \i{Context Stack}: \i{Block IFs}
+
+This example makes use of almost all the context-stack features,
+including the conditional-assembly construct \i\c{%ifctx}, to
+implement a block IF statement as a set of macros.
+
+\c %macro if 1
+\c
+\c     %push if
+\c     j%-1  %$ifnot
+\c
+\c %endmacro
+\c
+\c %macro else 0
+\c
+\c   %ifctx if
+\c         %repl   else
+\c         jmp     %$ifend
+\c         %$ifnot:
+\c   %else
+\c         %error  "expected `if' before `else'"
+\c   %endif
+\c
+\c %endmacro
+\c
+\c %macro endif 0
+\c
+\c   %ifctx if
+\c         %$ifnot:
+\c         %pop
+\c   %elifctx      else
+\c         %$ifend:
+\c         %pop
+\c   %else
+\c         %error  "expected `if' or `else' before `endif'"
+\c   %endif
+\c
+\c %endmacro
+
+This code is more robust than the \c{REPEAT} and \c{UNTIL} macros
+given in \k{ctxlocal}, because it uses conditional assembly to check
+that the macros are issued in the right order (for example, not
+calling \c{endif} before \c{if}) and issues a \c{%error} if they're
+not.
+
+In addition, the \c{endif} macro has to be able to cope with the two
+distinct cases of either directly following an \c{if}, or following
+an \c{else}. It achieves this, again, by using conditional assembly
+to do different things depending on whether the context on top of
+the stack is \c{if} or \c{else}.
+
+The \c{else} macro has to preserve the context on the stack, in
+order to have the \c{%$ifnot} referred to by the \c{if} macro be the
+same as the one defined by the \c{endif} macro, but has to change
+the context's name so that \c{endif} will know there was an
+intervening \c{else}. It does this by the use of \c{%repl}.
+
+A sample usage of these macros might look like:
+
+\c         cmp     ax,bx
+\c
+\c         if ae
+\c                cmp     bx,cx
+\c
+\c                if ae
+\c                        mov     ax,cx
+\c                else
+\c                        mov     ax,bx
+\c                endif
+\c
+\c         else
+\c                cmp     ax,cx
+\c
+\c                if ae
+\c                        mov     ax,cx
+\c                endif
+\c
+\c         endif
+
+The block-\c{IF} macros handle nesting quite happily, by means of
+pushing another context, describing the inner \c{if}, on top of the
+one describing the outer \c{if}; thus \c{else} and \c{endif} always
+refer to the last unmatched \c{if} or \c{else}.
+
+
+\H{stackrel} \i{Stack Relative Preprocessor Directives}
+
+The following preprocessor directives provide a way to use
+labels to refer to local variables allocated on the stack.
+
+\b\c{%arg}  (see \k{arg})
+
+\b\c{%stacksize}  (see \k{stacksize})
+
+\b\c{%local}  (see \k{local})
+
+
+\S{arg} \i\c{%arg} Directive
+
+The \c{%arg} directive is used to simplify the handling of
+parameters passed on the stack. Stack based parameter passing
+is used by many high level languages, including C, C++ and Pascal.
+
+While NASM has macros which attempt to duplicate this
+functionality (see \k{16cmacro}), the syntax is not particularly
+convenient to use and is not TASM compatible. Here is an example
+which shows the use of \c{%arg} without any external macros:
+
+\c some_function:
+\c
+\c     %push     mycontext        ; save the current context
+\c     %stacksize large           ; tell NASM to use bp
+\c     %arg      i:word, j_ptr:word
+\c
+\c         mov     ax,i
+\c         mov     bx,j_ptr
+\c         add     ax,bx
+\c         ret
+\c
+\c     %pop                       ; restore original context
+
+This is similar to the procedure defined in \k{16cmacro} and adds
+the value in i to the value pointed to by j_ptr and returns the
+sum in the ax register. See \k{pushpop} for an explanation of
+\c{push} and \c{pop} and the use of context stacks.
+
+
+\S{stacksize} \i\c{%stacksize} Directive
+
+The \c{%stacksize} directive is used in conjunction with the
+\c{%arg} (see \k{arg}) and the \c{%local} (see \k{local}) directives.
+It tells NASM the default size to use for subsequent \c{%arg} and
+\c{%local} directives. The \c{%stacksize} directive takes one
+required argument which is one of \c{flat}, \c{flat64}, \c{large} or \c{small}.
+
+\c %stacksize flat
+
+This form causes NASM to use stack-based parameter addressing
+relative to \c{ebp} and it assumes that a near form of call was used
+to get to this label (i.e. that \c{eip} is on the stack).
+
+\c %stacksize flat64
+
+This form causes NASM to use stack-based parameter addressing
+relative to \c{rbp} and it assumes that a near form of call was used
+to get to this label (i.e. that \c{rip} is on the stack).
+
+\c %stacksize large
+
+This form uses \c{bp} to do stack-based parameter addressing and
+assumes that a far form of call was used to get to this address
+(i.e. that \c{ip} and \c{cs} are on the stack).
+
+\c %stacksize small
+
+This form also uses \c{bp} to address stack parameters, but it is
+different from \c{large} because it also assumes that the old value
+of bp is pushed onto the stack (i.e. it expects an \c{ENTER}
+instruction). In other words, it expects that \c{bp}, \c{ip} and
+\c{cs} are on the top of the stack, underneath any local space which
+may have been allocated by \c{ENTER}. This form is probably most
+useful when used in combination with the \c{%local} directive
+(see \k{local}).
+
+
+\S{local} \i\c{%local} Directive
+
+The \c{%local} directive is used to simplify the use of local
+temporary stack variables allocated in a stack frame. Automatic
+local variables in C are an example of this kind of variable. The
+\c{%local} directive is most useful when used with the \c{%stacksize}
+(see \k{stacksize} and is also compatible with the \c{%arg} directive
+(see \k{arg}). It allows simplified reference to variables on the
+stack which have been allocated typically by using the \c{ENTER}
+instruction.
+\# (see \k{insENTER} for a description of that instruction).
+An example of its use is the following:
+
+\c silly_swap:
+\c
+\c     %push mycontext             ; save the current context
+\c     %stacksize small            ; tell NASM to use bp
+\c     %assign %$localsize 0       ; see text for explanation
+\c     %local old_ax:word, old_dx:word
+\c
+\c         enter   %$localsize,0   ; see text for explanation
+\c         mov     old_ax,ax     ; swap ax & bx
+\c         mov     old_dx,dx     ; and swap dx & cx
+\c         mov     ax,bx
+\c         mov     dx,cx
+\c         mov     bx,old_ax
+\c         mov     cx,old_dx
+\c         leave                   ; restore old bp
+\c         ret                     ;
+\c
+\c     %pop                        ; restore original context
+
+The \c{%$localsize} variable is used internally by the
+\c{%local} directive and \e{must} be defined within the
+current context before the \c{%local} directive may be used.
+Failure to do so will result in one expression syntax error for
+each \c{%local} variable declared. It then may be used in
+the construction of an appropriately sized ENTER instruction
+as shown in the example.
+
+
+\H{pperror} Reporting \i{User-Defined Errors}: \i\c{%error}, \i\c{%warning}, \i\c{%fatal}
+
+The preprocessor directive \c{%error} will cause NASM to report an
+error if it occurs in assembled code. So if other users are going to
+try to assemble your source files, you can ensure that they define the
+right macros by means of code like this:
+
+\c %ifdef F1
+\c     ; do some setup
+\c %elifdef F2
+\c     ; do some different setup
+\c %else
+\c     %error "Neither F1 nor F2 was defined."
+\c %endif
+
+Then any user who fails to understand the way your code is supposed
+to be assembled will be quickly warned of their mistake, rather than
+having to wait until the program crashes on being run and then not
+knowing what went wrong.
+
+Similarly, \c{%warning} issues a warning, but allows assembly to continue:
+
+\c %ifdef F1
+\c     ; do some setup
+\c %elifdef F2
+\c     ; do some different setup
+\c %else
+\c     %warning "Neither F1 nor F2 was defined, assuming F1."
+\c     %define F1
+\c %endif
+
+\c{%error} and \c{%warning} are issued only on the final assembly
+pass.  This makes them safe to use in conjunction with tests that
+depend on symbol values.
+
+\c{%fatal} terminates assembly immediately, regardless of pass.  This
+is useful when there is no point in continuing the assembly further,
+and doing so is likely just going to cause a spew of confusing error
+messages.
+
+It is optional for the message string after \c{%error}, \c{%warning}
+or \c{%fatal} to be quoted.  If it is \e{not}, then single-line macros
+are expanded in it, which can be used to display more information to
+the user.  For example:
+
+\c %if foo > 64
+\c     %assign foo_over foo-64
+\c     %error foo is foo_over bytes too large
+\c %endif
+
+
+\H{pragma} \i\c{%pragma}: Setting Options
+
+The \c{%pragma} directive controls a number of options in
+NASM. Pragmas are intended to remain backwards compatible, and
+therefore an unknown \c{%pragma} directive is not an error.
+
+The various pragmas are documented with the options they affect.
+
+The general structure of a NASM pragma is:
+
+\c{%pragma} \e{namespace} \e{directive} \e{arguments...}
+
+Currently defined namespaces are:
+
+\b \c{ignore}: this \c{%pragma} is unconditionally ignored.
+
+\b \c{preproc}: preprocessor, see \k{pragma-preproc}.
+
+\b \c{limit}: resource limits, see \k{opt-limit}.
+
+\b \c{asm}: the parser and assembler proper. Currently no such pragmas
+are defined.
+
+\b \c{list}: listing options, see \k{opt-L}.
+
+\b \c{file}: general file handling options. Currently no such pragmas
+are defined.
+
+\b \c{input}: input file handling options. Currently no such pragmas
+are defined.
+
+\b \c{output}: output format options.
+
+\b \c{debug}: debug format options.
+
+In addition, the name of any output or debug format, and sometimes
+groups thereof, also constitute \c{%pragma} namespaces. The namespaces
+\c{output} and \c{debug} simply refer to \e{any} output or debug
+format, respectively.
+
+For example, to prepend an underscore to global symbols regardless of
+the output format (see \k{mangling}):
+
+\c %pragma output gprefix _
+
+... whereas to prepend an underscore to global symbols only when the
+output is either \c{win32} or \c{win64}:
+
+\c %pragma win gprefix _
+
+
+\S{pragma-preproc} Preprocessor Pragmas
+
+The only preprocessor \c{%pragma} defined in NASM 2.15 is:
+
+\b \c{%pragma preproc sane_empty_expansion}: disables legacy
+compatibility handling of braceless empty arguments to multi-line
+macros. See \k{mlmacro} and \k{opt-w}.
+
+
+\H{otherpreproc} \i{Other Preprocessor Directives}
+
+\S{line} \i\c{%line} Directive
+
+The \c{%line} directive is used to notify NASM that the input line
+corresponds to a specific line number in another file.  Typically
+this other file would be an original source file, with the current
+NASM input being the output of a pre-processor.  The \c{%line}
+directive allows NASM to output messages which indicate the line
+number of the original source file, instead of the file that is being
+read by NASM.
+
+This preprocessor directive is not generally used directly by
+programmers, but may be of interest to preprocessor authors.  The
+usage of the \c{%line} preprocessor directive is as follows:
+
+\c %line nnn+mmm filename
+
+In this directive, \c{nnn} identifies the line of the original source
+file which this line corresponds to.  \c{mmm} is an optional parameter
+which specifies a line increment value; each line of the input file
+read in is considered to correspond to \c{mmm} lines of the original
+source file.  Finally, \c{filename} is an optional parameter which
+specifies the file name of the original source file. It may be a
+quoted string, in which case any additional argument after the quoted
+string will be ignored.
+
+After reading a \c{%line} preprocessor directive, NASM will report
+all file name and line numbers relative to the values specified
+therein.
+
+If the command line option \i\c{--no-line} is given, all \c{%line}
+directives are ignored. This may be useful for debugging preprocessed
+code. See \k{opt-no-line}.
+
+Starting in NASM 2.15, \c{%line} directives are processed before any
+other processing takes place.
+
+For compatibility with the output from some other preprocessors,
+including many C preprocessors, a \c{#} character followed by
+whitespace \e{at the very beginning of a line} is also treated as a
+\c{%line} directive, except that double quotes surrounding the
+filename are treated like NASM backquotes, with \c{\\}-escaped
+sequences decoded.
+
+\# This isn't a directive, it should be moved elsewhere...
+\S{getenv} \i\c{%!}\e{variable}: Read an Environment Variable.
+
+The \c{%!}\e{variable} directive makes it possible to read the value of an
+environment variable at assembly time. This could, for example, be used
+to store the contents of an environment variable into a string, which
+could be used at some other point in your code.
+
+For example, suppose that you have an environment variable \c{FOO},
+and you want the contents of \c{FOO} to be embedded in your program as
+a quoted string. You could do that as follows:
+
+\c %defstr FOO          %!FOO
+
+See \k{defstr} for notes on the \c{%defstr} directive.
+
+If the name of the environment variable contains non-identifier
+characters, you can use string quotes to surround the name of the
+variable, for example:
+
+\c %defstr C_colon      %!'C:'
+
+
+\S{clear} \i\c\{%clear}: Clear All Macro Definitions
+
+The directive \c{%clear} clears all definitions of a certain type,
+\e{including the ones defined by NASM itself.} This can be useful when
+preprocessing non-NASM code, or to drop backwards compatibility
+aliases.
+
+The syntax is:
+
+\c    %clear global|context type...
+
+... where \c{context} indicates that this applies to context-local
+macros only; the default is \c{global}.
+
+\c{type} can be one or more of:
+
+\b \c{define}   single-line macros
+
+\b \c{defalias} single-line macro aliases (useful to remove backwards
+compatibility aliases)
+
+\b \c{alldefine} same as \c{define defalias}
+
+\b \c{macro}     multi-line macros
+
+\b \c{all}       same as \c{alldefine macro} (default)
+
+In NASM 2.14 and earlier, only the single syntax \c{%clear} was
+supported, which is equivalent to \c{%clear global all}.
+
+
+
+
+\C{stdmac} \i{Standard Macros}
+
+NASM defines a set of standard macros, which are already defined when
+it starts to process any source file. If you really need a program to
+be assembled with no pre-defined macros, you can use the \i\c{%clear}
+directive to empty the preprocessor of everything but context-local
+preprocessor variables and single-line macros, see \k{clear}.
+
+Most \i{user-level directives} (see \k{directive}) are implemented as
+macros which invoke primitive directives; these are described in
+\k{directive}. The rest of the standard macro set is described here.
+
+For compatibility with NASM versions before NASM 2.15, most standard
+macros of the form \c{__?foo?__} have aliases of form \c{__foo__} (see
+\k{defalias}). These can be removed with the directive \c{%clear
+defalias}.
+
+
+\H{stdmacver} \i{NASM Version Macros}
+
+The single-line macros \i\c{__?NASM_MAJOR?__}, \i\c{__?NASM_MINOR?__},
+\i\c{__?NASM_SUBMINOR?__} and \i\c{__?NASM_PATCHLEVEL?__} expand to the
+major, minor, subminor and patch level parts of the \i{version
+number of NASM} being used. So, under NASM 0.98.32p1 for
+example, \c{__?NASM_MAJOR?__} would be defined to be 0, \c{__?NASM_MINOR?__}
+would be defined as 98, \c{__?NASM_SUBMINOR?__} would be defined to 32,
+and \c{__?NASM_PATCHLEVEL?__} would be defined as 1.
+
+Additionally, the macro \i\c{__?NASM_SNAPSHOT?__} is defined for
+automatically generated snapshot releases \e{only}.
+
+
+\S{stdmacverid} \i\c{__?NASM_VERSION_ID?__}: \i{NASM Version ID}
+
+The single-line macro \c{__?NASM_VERSION_ID?__} expands to a dword integer
+representing the full version number of the version of nasm being used.
+The value is the equivalent to \c{__?NASM_MAJOR?__}, \c{__?NASM_MINOR?__},
+\c{__?NASM_SUBMINOR?__} and \c{__?NASM_PATCHLEVEL?__} concatenated to
+produce a single doubleword. Hence, for 0.98.32p1, the returned number
+would be equivalent to:
+
+\c         dd      0x00622001
+
+or
+
+\c         db      1,32,98,0
+
+Note that the above lines are generate exactly the same code, the second
+line is used just to give an indication of the order that the separate
+values will be present in memory.
+
+
+\S{stdmacverstr} \i\c{__?NASM_VER?__}: \i{NASM Version String}
+
+The single-line macro \c{__?NASM_VER?__} expands to a string which defines
+the version number of nasm being used. So, under NASM 0.98.32 for example,
+
+\c         db      __?NASM_VER?__
+
+would expand to
+
+\c         db      "0.98.32"
+
+
+\H{fileline} \i\c{__?FILE?__} and \i\c{__?LINE?__}: File Name and Line Number
+
+Like the C preprocessor, NASM allows the user to find out the file
+name and line number containing the current instruction. The macro
+\c{__?FILE?__} expands to a string constant giving the name of the
+current input file (which may change through the course of assembly
+if \c{%include} directives are used), and \c{__?LINE?__} expands to a
+numeric constant giving the current line number in the input file.
+
+These macros could be used, for example, to communicate debugging
+information to a macro, since invoking \c{__?LINE?__} inside a macro
+definition (either single-line or multi-line) will return the line
+number of the macro \e{call}, rather than \e{definition}. So to
+determine where in a piece of code a crash is occurring, for
+example, one could write a routine \c{stillhere}, which is passed a
+line number in \c{EAX} and outputs something like \c{line 155: still
+here}. You could then write a macro:
+
+\c %macro  notdeadyet 0
+\c
+\c         push    eax
+\c         mov     eax,__?LINE?__
+\c         call    stillhere
+\c         pop     eax
+\c
+\c %endmacro
+
+and then pepper your code with calls to \c{notdeadyet} until you
+find the crash point.
+
+
+\H{bitsm} \i\c{__?BITS?__}: Current Code Generation Mode
+
+The \c{__?BITS?__} standard macro is updated every time that the BITS mode is
+set using the \c{BITS XX} or \c{BITS XX} directive, where XX is a valid mode
+number of 16, 32 or 64. \c{__?BITS?__} receives the specified mode number and
+makes it globally available. This can be very useful for those who utilize
+mode-dependent macros.
+
+\H{ofmtm} \i\c{__?OUTPUT_FORMAT?__}: Current Output Format
+
+The \c{__?OUTPUT_FORMAT?__} standard macro holds the current output
+format name, as given by the \c{-f} option or NASM's default. Type
+\c{nasm -h} for a list.
+
+\c %ifidn __?OUTPUT_FORMAT?__, win32
+\c  %define NEWLINE 13, 10
+\c %elifidn __?OUTPUT_FORMAT?__, elf32
+\c  %define NEWLINE 10
+\c %endif
+
+\H{dfmtm} \i\c{__?DEBUG_FORMAT?__}: Current Debug Format
+
+If debugging information generation is enabled, The
+\c{__?DEBUG_FORMAT?__} standard macro holds the current debug format
+name as specified by the \c{-F} or \c{-g} option or the output format
+default. Type \c{nasm -f} \e{output} \c{y} for a list.
+
+\c{__?DEBUG_FORMAT?__} is not defined if debugging is not enabled, or if
+the debug format specified is \c{null}.
+
+\H{datetime} Assembly Date and Time Macros
+
+NASM provides a variety of macros that represent the timestamp of the
+assembly session.
+
+\b The \i\c{__?DATE?__} and \i\c{__?TIME?__} macros give the assembly date and
+time as strings, in ISO 8601 format (\c{"YYYY-MM-DD"} and \c{"HH:MM:SS"},
+respectively.)
+
+\b The \i\c{__?DATE_NUM?__} and \i\c{__?TIME_NUM?__} macros give the assembly
+date and time in numeric form; in the format \c{YYYYMMDD} and
+\c{HHMMSS} respectively.
+
+\b The \i\c{__?UTC_DATE?__} and \i\c{__?UTC_TIME?__} macros give the assembly
+date and time in universal time (UTC) as strings, in ISO 8601 format
+(\c{"YYYY-MM-DD"} and \c{"HH:MM:SS"}, respectively.)  If the host
+platform doesn't provide UTC time, these macros are undefined.
+
+\b The \i\c{__?UTC_DATE_NUM?__} and \i\c{__?UTC_TIME_NUM?__} macros give the
+assembly date and time universal time (UTC) in numeric form; in the
+format \c{YYYYMMDD} and \c{HHMMSS} respectively.  If the
+host platform doesn't provide UTC time, these macros are
+undefined.
+
+\b The \c{__?POSIX_TIME?__} macro is defined as a number containing the
+number of seconds since the POSIX epoch, 1 January 1970 00:00:00 UTC;
+excluding any leap seconds.  This is computed using UTC time if
+available on the host platform, otherwise it is computed using the
+local time as if it was UTC.
+
+All instances of time and date macros in the same assembly session
+produce consistent output.  For example, in an assembly session
+started at 42 seconds after midnight on January 1, 2010 in Moscow
+(timezone UTC+3) these macros would have the following values,
+assuming, of course, a properly configured environment with a correct
+clock:
+
+\c       __?DATE?__             "2010-01-01"
+\c       __?TIME?__             "00:00:42"
+\c       __?DATE_NUM?__         20100101
+\c       __?TIME_NUM?__         000042
+\c       __?UTC_DATE?__         "2009-12-31"
+\c       __?UTC_TIME?__         "21:00:42"
+\c       __?UTC_DATE_NUM?__     20091231
+\c       __?UTC_TIME_NUM?__     210042
+\c       __?POSIX_TIME?__       1262293242
+
+
+\H{use_def} \I\c{__?USE_*?__}\c{__?USE_}\e{package}\c{?__}: Package
+Include Test
+
+When a standard macro package (see \k{macropkg}) is included with the
+\c{%use} directive (see \k{use}), a single-line macro of the form
+\c{__?USE_}\e{package}\c{?__} is automatically defined.  This allows
+testing if a particular package is invoked or not.
+
+For example, if the \c{altreg} package is included (see
+\k{pkg_altreg}), then the macro \c{__?USE_ALTREG?__} is defined.
+
+
+\H{pass_macro} \i\c{__?PASS?__}: Assembly Pass
+
+The macro \c{__?PASS?__} is defined to be \c{1} on preparatory passes,
+and \c{2} on the final pass.  In preprocess-only mode, it is set to
+\c{3}, and when running only to generate dependencies (due to the
+\c{-M} or \c{-MG} option, see \k{opt-M}) it is set to \c{0}.
+
+\e{Avoid using this macro if at all possible.  It is tremendously easy
+to generate very strange errors by misusing it, and the semantics may
+change in future versions of NASM.}
+
+
+\H{strucs} \i{Structure Data Types}
+
+\S{struc} \i\c{STRUC} and \i\c{ENDSTRUC}: \i{Declaring Structure} Data Types
+
+The core of NASM contains no intrinsic means of defining data
+structures; instead, the preprocessor is sufficiently powerful that
+data structures can be implemented as a set of macros. The macros
+\c{STRUC} and \c{ENDSTRUC} are used to define a structure data type.
+
+\c{STRUC} takes one or two parameters. The first parameter is the name
+of the data type. The second, optional parameter is the base offset of
+the structure. The name of the data type is defined as a symbol with
+the value of the base offset, and the name of the data type with the
+suffix \c{_size} appended to it is defined as an \c{EQU} giving the
+size of the structure. Once \c{STRUC} has been issued, you are
+defining the structure, and should define fields using the \c{RESB}
+family of pseudo-instructions, and then invoke \c{ENDSTRUC} to finish
+the definition.
+
+For example, to define a structure called \c{mytype} containing a
+longword, a word, a byte and a string of bytes, you might code
+
+\c struc   mytype
+\c
+\c   mt_long:      resd    1
+\c   mt_word:      resw    1
+\c   mt_byte:      resb    1
+\c   mt_str:       resb    32
+\c
+\c endstruc
+
+The above code defines six symbols: \c{mt_long} as 0 (the offset
+from the beginning of a \c{mytype} structure to the longword field),
+\c{mt_word} as 4, \c{mt_byte} as 6, \c{mt_str} as 7, \c{mytype_size}
+as 39, and \c{mytype} itself as zero.
+
+The reason why the structure type name is defined at zero by default
+is a side effect of allowing structures to work with the local label
+mechanism: if your structure members tend to have the same names in
+more than one structure, you can define the above structure like this:
+
+\c struc mytype
+\c
+\c   .long:        resd    1
+\c   .word:        resw    1
+\c   .byte:        resb    1
+\c   .str:         resb    32
+\c
+\c endstruc
+
+This defines the offsets to the structure fields as \c{mytype.long},
+\c{mytype.word}, \c{mytype.byte} and \c{mytype.str}.
+
+NASM, since it has no \e{intrinsic} structure support, does not
+support any form of period notation to refer to the elements of a
+structure once you have one (except the above local-label notation),
+so code such as \c{mov ax,mystruc.mt_word} is not valid.
+\c{mt_word} is a constant just like any other constant, so the
+correct syntax is \c{mov ax,mystruc+mt_word} or \c{mov
+ax,mystruc+mytype.word}.
+
+Sometimes you only have the address of the structure displaced by an
+offset. For example, consider this standard stack frame setup:
+
+\c push ebp
+\c mov ebp, esp
+\c sub esp, 40
+
+In this case, you could access an element by subtracting the offset:
+
+\c mov ebp - 40 + mytype.word, ax
+
+However, if you do not want to repeat this offset, you can use -40 as
+a base offset:
+
+\c struc mytype, -40
+
+And access an element this way:
+
+\c mov ebp + mytype.word, ax
+
+
+\S{istruc} \i\c{ISTRUC}, \i\c{AT} and \i\c{IEND}: Declaring
+\i{Instances of Structures}
+
+Having defined a structure type, the next thing you typically want
+to do is to declare instances of that structure in your data
+segment. NASM provides an easy way to do this in the \c{ISTRUC}
+mechanism. To declare a structure of type \c{mytype} in a program,
+you code something like this:
+
+\c mystruc:
+\c     istruc mytype
+\c
+\c         at mt_long, dd      123456
+\c         at mt_word, dw      1024
+\c         at mt_byte, db      'x'
+\c         at mt_str,  db      'hello, world', 13, 10, 0
+\c
+\c     iend
+
+The function of the \c{AT} macro is to make use of the \c{TIMES}
+prefix to advance the assembly position to the correct point for the
+specified structure field, and then to declare the specified data.
+Therefore the structure fields must be declared in the same order as
+they were specified in the structure definition.
+
+If the data to go in a structure field requires more than one source
+line to specify, the remaining source lines can easily come after
+the \c{AT} line. For example:
+
+\c         at mt_str,  db      123,134,145,156,167,178,189
+\c                     db      190,100,0
+
+Depending on personal taste, you can also omit the code part of the
+\c{AT} line completely, and start the structure field on the next
+line:
+
+\c         at mt_str
+\c                 db      'hello, world'
+\c                 db      13,10,0
+
+\H{alignment} \i{Alignment} Control
+
+\S{align} \i\c{ALIGN} and \i\c{ALIGNB}: Code and Data Alignment
+
+The \c{ALIGN} and \c{ALIGNB} macros provides a convenient way to
+align code or data on a word, longword, paragraph or other boundary.
+(Some assemblers call this directive \i\c{EVEN}.) The syntax of the
+\c{ALIGN} and \c{ALIGNB} macros is
+
+\c         align   4               ; align on 4-byte boundary
+\c         align   16              ; align on 16-byte boundary
+\c         align   8,db 0          ; pad with 0s rather than NOPs
+\c         align   4,resb 1        ; align to 4 in the BSS
+\c         alignb  4               ; equivalent to previous line
+
+Both macros require their first argument to be a power of two; they
+both compute the number of additional bytes required to bring the
+length of the current section up to a multiple of that power of two,
+and then apply the \c{TIMES} prefix to their second argument to
+perform the alignment.
+
+If the second argument is not specified, the default for \c{ALIGN}
+is \c{NOP}, and the default for \c{ALIGNB} is \c{RESB 1}. So if the
+second argument is specified, the two macros are equivalent.
+Normally, you can just use \c{ALIGN} in code and data sections and
+\c{ALIGNB} in BSS sections, and never need the second argument
+except for special purposes.
+
+\c{ALIGN} and \c{ALIGNB}, being simple macros, perform no error
+checking: they cannot warn you if their first argument fails to be a
+power of two, or if their second argument generates more than one
+byte of code. In each of these cases they will silently do the wrong
+thing.
+
+\c{ALIGNB} (or \c{ALIGN} with a second argument of \c{RESB 1}) can
+be used within structure definitions:
+
+\c struc mytype2
+\c
+\c   mt_byte:
+\c         resb 1
+\c         alignb 2
+\c   mt_word:
+\c         resw 1
+\c         alignb 4
+\c   mt_long:
+\c         resd 1
+\c   mt_str:
+\c         resb 32
+\c
+\c endstruc
+
+This will ensure that the structure members are sensibly aligned
+relative to the base of the structure.
+
+A final caveat: \c{ALIGN} and \c{ALIGNB} work relative to the
+beginning of the \e{section}, not the beginning of the address space
+in the final executable. Aligning to a 16-byte boundary when the
+section you're in is only guaranteed to be aligned to a 4-byte
+boundary, for example, is a waste of effort. Again, NASM does not
+check that the section's alignment characteristics are sensible for
+the use of \c{ALIGN} or \c{ALIGNB}.
+
+Both \c{ALIGN} and \c{ALIGNB} do call \c{SECTALIGN} macro implicitly.
+See \k{sectalign} for details.
+
+See also the \c{smartalign} standard macro package, \k{pkg_smartalign}.
+
+
+\S{sectalign} \i\c{SECTALIGN}: Section Alignment
+
+The \c{SECTALIGN} macros provides a way to modify alignment attribute
+of output file section. Unlike the \c{align=} attribute (which is allowed
+at section definition only) the \c{SECTALIGN} macro may be used at any time.
+
+For example the directive
+
+\c SECTALIGN 16
+
+sets the section alignment requirements to 16 bytes. Once increased it can
+not be decreased, the magnitude may grow only.
+
+Note that \c{ALIGN} (see \k{align}) calls the \c{SECTALIGN} macro implicitly
+so the active section alignment requirements may be updated. This is by default
+behaviour, if for some reason you want the \c{ALIGN} do not call \c{SECTALIGN}
+at all use the directive
+
+\c SECTALIGN OFF
+
+It is still possible to turn in on again by
+
+\c SECTALIGN ON
+
+Note that \c{SECTALIGN <ON|OFF>} affects only the \c{ALIGN}/\c{ALIGNB} directives,
+not an explicit \c{SECTALIGN} directive.
+
+
+\C{macropkg} \i{Standard Macro Packages}
+
+The \i\c{%use} directive (see \k{use}) includes one of the standard
+macro packages included with the NASM distribution and compiled into
+the NASM binary.  It operates like the \c{%include} directive (see
+\k{include}), but the included contents is provided by NASM itself.
+
+The names of standard macro packages are case insensitive and can be
+quoted or not.
+
+As of version 2.15, NASM has \c{%ifusable} and \c{%ifusing} directives to help
+the user understand whether an individual package available in this version of
+NASM (\c{%ifusable}) or a particular package already loaded (\c{%ifusing}).
+
+
+\H{pkg_altreg} \i\c{altreg}: \i{Alternate Register Names}
+
+The \c{altreg} standard macro package provides alternate register
+names.  It provides numeric register names for all registers (not just
+\c{R8}-\c{R15}), the Intel-defined aliases \c{R8L}-\c{R15L} for the
+low bytes of register (as opposed to the NASM/AMD standard names
+\c{R8B}-\c{R15B}), and the names \c{R0H}-\c{R3H} (by analogy with
+\c{R0L}-\c{R3L}) for \c{AH}, \c{CH}, \c{DH}, and \c{BH}.
+
+Example use:
+
+\c %use altreg
+\c
+\c proc:
+\c       mov r0l,r3h                    ; mov al,bh
+\c       ret
+
+See also \k{reg64}.
+
+
+\H{pkg_smartalign} \i\c{smartalign}\I{align, smart}: Smart \c{ALIGN} Macro
+
+The \c{smartalign} standard macro package provides for an \i\c{ALIGN}
+macro which is more powerful than the default (and
+backwards-compatible) one (see \k{align}).  When the \c{smartalign}
+package is enabled, when \c{ALIGN} is used without a second argument,
+NASM will generate a sequence of instructions more efficient than a
+series of \c{NOP}.  Furthermore, if the padding exceeds a specific
+threshold, then NASM will generate a jump over the entire padding
+sequence.
+
+The specific instructions generated can be controlled with the
+new \i\c{ALIGNMODE} macro.  This macro takes two parameters: one mode,
+and an optional jump threshold override. If (for any reason) you need
+to turn off the jump completely just set jump threshold value to -1
+(or set it to \c{nojmp}). The following modes are possible:
+
+\b \c{generic}: Works on all x86 CPUs and should have reasonable
+performance.  The default jump threshold is 8.  This is the
+default.
+
+\b \c{nop}: Pad out with \c{NOP} instructions.  The only difference
+compared to the standard \c{ALIGN} macro is that NASM can still jump
+over a large padding area.  The default jump threshold is 16.
+
+\b \c{k7}: Optimize for the AMD K7 (Athlon/Althon XP).  These
+instructions should still work on all x86 CPUs.  The default jump
+threshold is 16.
+
+\b \c{k8}: Optimize for the AMD K8 (Opteron/Althon 64).  These
+instructions should still work on all x86 CPUs.  The default jump
+threshold is 16.
+
+\b \c{p6}: Optimize for Intel CPUs.  This uses the long \c{NOP}
+instructions first introduced in Pentium Pro.  This is incompatible
+with all CPUs of family 5 or lower, as well as some VIA CPUs and
+several virtualization solutions.  The default jump threshold is 16.
+
+The macro \i\c{__?ALIGNMODE?__} is defined to contain the current
+alignment mode.  A number of other macros beginning with \c{__?ALIGN_}
+are used internally by this macro package.
+
+
+\H{pkg_fp} \i\c\{fp}: Floating-point macros
+
+This packages contains the following floating-point convenience macros:
+
+\c %define Inf             __?Infinity?__
+\c %define NaN             __?QNaN?__
+\c %define QNaN            __?QNaN?__
+\c %define SNaN            __?SNaN?__
+\c
+\c %define float8(x)       __?float8?__(x)
+\c %define float16(x)      __?float16?__(x)
+\c %define bfloat16(x)     __?bfloat16?__(x)
+\c %define float32(x)      __?float32?__(x)
+\c %define float64(x)      __?float64?__(x)
+\c %define float80m(x)     __?float80m?__(x)
+\c %define float80e(x)     __?float80e?__(x)
+\c %define float128l(x)    __?float128l?__(x)
+\c %define float128h(x)    __?float128h?__(x)
+
+It also defines the a multi-line macro \i\c{bf16} that can be used
+in a similar way to the \c{D}\e{x} directives for the other
+floating-point numbers:
+
+\c      bf16 -3.1415, NaN, 2000.0, +Inf
+
+
+\H{pkg_ifunc} \i\c{ifunc}: \i{Integer functions}
+
+This package contains a set of macros which implement integer
+functions.  These are actually implemented as special operators, but
+are most conveniently accessed via this macro package.
+
+The macros provided are:
+
+\S{ilog2} \i{Integer logarithms}
+
+These functions calculate the integer logarithm base 2 of their
+argument, considered as an unsigned integer.  The only differences
+between the functions is their respective behavior if the argument
+provided is not a power of two.
+
+The function \i\c{ilog2e()} (alias \i\c{ilog2()}) generates an error if
+the argument is not a power of two.
+
+The function \i\c{ilog2f()} rounds the argument down to the nearest
+power of two; if the argument is zero it returns zero.
+
+The function \i\c{ilog2c()} rounds the argument up to the nearest
+power of two.
+
+The functions \i\c{ilog2fw()} (alias \i\c{ilog2w()}) and
+\i\c{ilog2cw()} generate a warning if the argument is not a power of
+two, but otherwise behaves like \c{ilog2f()} and \c{ilog2c()},
+respectively.
+
+\H{pkg_masm} \i\c{masm}: \i{MASM compatibility}
+
+Since version 2.15, NASM has a MASM compatibility package with minimal
+functionality, as intended to be used primarily with machine-generated code.
+It does not include any "programmer-friendly" shortcuts, nor does it in any way
+support ASSUME, symbol typing, or MASM-style structures.
+
+To enable the package, use the directive:
+
+\c{%use masm}
+
+Currently, the MASM compatibility package emulates:
+
+\b The \c{FLAT} and \c{OFFSET} keywords are recognized and ignored.
+
+\b The \c{PTR} keyword signifies a memory reference, as if the
+argument had been put in square brackets:
+
+\c      mov eax,foo               ; memory reference
+\c      mov eax,dword ptr foo       ; memory reference
+\c      mov eax,dowrd ptr flat:foo  ; memory reference
+\c      mov eax,offset foo          ; address
+\c      mov eax,foo                 ; address (ambiguous syntax in MASM)
+
+\b The \c{SEGMENT} ... \c{ENDS} syntax:
+
+\c    segname SEGMENT
+\c        ...
+\c    segname ENDS
+
+\b The \c{PROC} ... \c{ENDP} syntax:
+
+\c    procname PROC FAR
+\c         ...
+\c    procname ENDP
+
+\> \c{PROC} will also define \c{RET} as a macro expanding to either
+\c{RETF} if \c{FAR} is specified and \c{RETN} otherwise. Any keyword
+after \c{PROC} other than \c{FAR} is ignored.
+
+\b The \c{TBYTE} keyword as an alias for \c{TWORD} (see \k{qsother}).
+
+\b The \c{END} directive is ignored.
+
+\b In 64-bit mode relative addressing is the default (\c{DEFAULT REL},
+see \k{REL & ABS}).
+
+In addition, NASM now natively supports, regardless of whether this
+package is used or not:
+
+\b \c{?} and \c{DUP} syntax for the \c{DB} etc data declaration
+directives (see \k{db}).
+
+\b \c{displacementbase+index} syntax for memory operations, instead
+of \c{base+index+displacement}.
+
+\b \c{seg:addr} instead of \c{seg:addr} syntax.
+
+\b A pure offset can be given to \c{LEA} without square brackets:
+
+\c      lea rax,foo               ; standard syntax
+\c      lea rax,foo                 ; also accepted
+
+\C{directive} \i{Assembler Directives}
+
+NASM, though it attempts to avoid the bureaucracy of assemblers like
+MASM and TASM, is nevertheless forced to support a \e{few}
+directives. These are described in this chapter.
+
+NASM's directives come in two types: \I{user-level
+directives}\e{user-level} directives and \I{primitive
+directives}\e{primitive} directives. Typically, each directive has a
+user-level form and a primitive form. In almost all cases, we
+recommend that users use the user-level forms of the directives,
+which are implemented as macros which call the primitive forms.
+
+Primitive directives are enclosed in square brackets; user-level
+directives are not.
+
+In addition to the universal directives described in this chapter,
+each object file format can optionally supply extra directives in
+order to control particular features of that file format. These
+\I{format-specific directives}\e{format-specific} directives are
+documented along with the formats that implement them, in \k{outfmt}.
+
+
+\H{bits} \i\c{BITS}: Target \i{Processor Mode}
+
+The \c{BITS} directive specifies whether NASM should generate code
+\I{16-bit mode, versus 32-bit mode}designed to run on a processor
+operating in 16-bit mode, 32-bit mode or 64-bit mode. The syntax is
+\c{BITS XX}, where XX is 16, 32 or 64.
+
+In most cases, you should not need to use \c{BITS} explicitly. The
+\c{aout}, \c{coff}, \c{elf*}, \c{macho}, \c{win32} and \c{win64}
+object formats, which are designed for use in 32-bit or 64-bit
+operating systems, all cause NASM to select 32-bit or 64-bit mode,
+respectively, by default. The \c{obj} object format allows you
+to specify each segment you define as either \c{USE16} or \c{USE32},
+and NASM will set its operating mode accordingly, so the use of the
+\c{BITS} directive is once again unnecessary.
+
+The most likely reason for using the \c{BITS} directive is to write
+32-bit or 64-bit code in a flat binary file; this is because the \c{bin}
+output format defaults to 16-bit mode in anticipation of it being
+used most frequently to write DOS \c{.COM} programs, DOS \c{.SYS}
+device drivers and boot loader software.
+
+The \c{BITS} directive can also be used to generate code for a
+different mode than the standard one for the output format.
+
+You do \e{not} need to specify \c{BITS 32} merely in order to use
+32-bit instructions in a 16-bit DOS program; if you do, the
+assembler will generate incorrect code because it will be writing
+code targeted at a 32-bit platform, to be run on a 16-bit one.
+
+When NASM is in \c{BITS 16} mode, instructions which use 32-bit
+data are prefixed with an 0x66 byte, and those referring to 32-bit
+addresses have an 0x67 prefix. In \c{BITS 32} mode, the reverse is
+true: 32-bit instructions require no prefixes, whereas instructions
+using 16-bit data need an 0x66 and those working on 16-bit addresses
+need an 0x67.
+
+When NASM is in \c{BITS 64} mode, most instructions operate the same
+as they do for \c{BITS 32} mode. However, there are 8 more general and
+SSE registers, and 16-bit addressing is no longer supported.
+
+The default address size is 64 bits; 32-bit addressing can be selected
+with the 0x67 prefix.  The default operand size is still 32 bits,
+however, and the 0x66 prefix selects 16-bit operand size.  The \c{REX}
+prefix is used both to select 64-bit operand size, and to access the
+new registers. NASM automatically inserts REX prefixes when
+necessary.
+
+When the \c{REX} prefix is used, the processor does not know how to
+address the AH, BH, CH or DH (high 8-bit legacy) registers. Instead,
+it is possible to access the the low 8-bits of the SP, BP SI and DI
+registers as SPL, BPL, SIL and DIL, respectively; but only when the
+REX prefix is used.
+
+The \c{BITS} directive has an exactly equivalent primitive form,
+\c{BITS 16}, \c{BITS 32} and \c{BITS 64}. The user-level form is
+a macro which has no function other than to call the primitive form.
+
+Note that the space is necessary, e.g. \c{BITS32} will \e{not} work!
+
+\S{USE16 & USE32} \i\c{USE16} & \i\c{USE32}: Aliases for BITS
+
+The `\c{USE16}' and `\c{USE32}' directives can be used in place of
+`\c{BITS 16}' and `\c{BITS 32}', for compatibility with other assemblers.
+
+
+\H{default} \i\c{DEFAULT}: Change the assembler defaults
+
+The \c{DEFAULT} directive changes the assembler defaults.  Normally,
+NASM defaults to a mode where the programmer is expected to explicitly
+specify most features directly.  However, this is occasionally
+obnoxious, as the explicit form is pretty much the only one one wishes
+to use.
+
+Currently, \c{DEFAULT} can set \c{REL} & \c{ABS} and \c{BND} & \c{NOBND}.
+
+\S{REL & ABS} \i\c{REL} & \i\c{ABS}: RIP-relative addressing
+
+This sets whether registerless instructions in 64-bit mode are \c{RIP}-relative
+or not. By default, they are absolute unless overridden with the \i\c{REL}
+specifier (see \k{effaddr}).  However, if \c{DEFAULT REL} is
+specified, \c{REL} is default, unless overridden with the \c{ABS}
+specifier, \e{except when used with an FS or GS segment override}.
+
+The special handling of \c{FS} and \c{GS} overrides are due to the
+fact that these registers are generally used as thread pointers or
+other special functions in 64-bit mode, and generating
+\c{RIP}-relative addresses would be extremely confusing.
+
+\c{DEFAULT REL} is disabled with \c{DEFAULT ABS}.
+
+\S{BND & NOBND} \i\c{BND} & \i\c{NOBND}: \c{BND} prefix
+
+If \c{DEFAULT BND} is set, all bnd-prefix available instructions following
+this directive are prefixed with bnd. To override it, \c{NOBND} prefix can
+be used.
+
+\c  DEFAULT BND
+\c      call foo            ; BND will be prefixed
+\c      nobnd call foo      ; BND will NOT be prefixed
+
+\c{DEFAULT NOBND} can disable \c{DEFAULT BND} and then \c{BND} prefix will be
+added only when explicitly specified in code.
+
+\c{DEFAULT BND} is expected to be the normal configuration for writing
+MPX-enabled code.
+
+\H{section} \i\c{SECTION} or \i\c{SEGMENT}: Changing and \i{Defining
+Sections}
+
+\I{changing sections}\I{switching between sections}The \c{SECTION}
+directive (\c{SEGMENT} is an exactly equivalent synonym) changes
+which section of the output file the code you write will be
+assembled into. In some object file formats, the number and names of
+sections are fixed; in others, the user may make up as many as they
+wish. Hence \c{SECTION} may sometimes give an error message, or may
+define a new section, if you try to switch to a section that does
+not (yet) exist.
+
+The Unix object formats, and the \c{bin} object format (but see
+\k{multisec}), all support
+the \i{standardized section names} \c{.text}, \c{.data} and \c{.bss}
+for the code, data and uninitialized-data sections. The \c{obj}
+format, by contrast, does not recognize these section names as being
+special, and indeed will strip off the leading period of any section
+name that has one.
+
+
+\S{sectmac} The \i\c{__?SECT?__} Macro
+
+The \c{SECTION} directive is unusual in that its user-level form
+functions differently from its primitive form. The primitive form,
+\c{SECTION xyz}, simply switches the current target section to the
+one given. The user-level form, \c{SECTION xyz}, however, first
+defines the single-line macro \c{__?SECT?__} to be the primitive
+\c{SECTION} directive which it is about to issue, and then issues
+it. So the user-level directive
+
+\c         SECTION .text
+
+expands to the two lines
+
+\c %define __?SECT?__        SECTION .text
+\c         SECTION .text
+
+Users may find it useful to make use of this in their own macros.
+For example, the \c{writefile} macro defined in \k{mlmacgre} can be
+usefully rewritten in the following more sophisticated form:
+
+\c %macro  writefile 2+
+\c
+\c         section .data
+\c
+\c   %%str:        db      %2
+\c   %%endstr:
+\c
+\c         __?SECT?__
+\c
+\c         mov     dx,%%str
+\c         mov     cx,%%endstr-%%str
+\c         mov     bx,%1
+\c         mov     ah,0x40
+\c         int     0x21
+\c
+\c %endmacro
+
+This form of the macro, once passed a string to output, first
+switches temporarily to the data section of the file, using the
+primitive form of the \c{SECTION} directive so as not to modify
+\c{__?SECT?__}. It then declares its string in the data section, and
+then invokes \c{__?SECT?__} to switch back to \e{whichever} section
+the user was previously working in. It thus avoids the need, in the
+previous version of the macro, to include a \c{JMP} instruction to
+jump over the data, and also does not fail if, in a complicated
+\c{OBJ} format module, the user could potentially be assembling the
+code in any of several separate code sections.
+
+
+\H{absolute} \i\c{ABSOLUTE}: Defining Absolute Labels
+
+The \c{ABSOLUTE} directive can be thought of as an alternative form
+of \c{SECTION}: it causes the subsequent code to be directed at no
+physical section, but at the hypothetical section starting at the
+given absolute address. The only instructions you can use in this
+mode are the \c{RESB} family.
+
+\c{ABSOLUTE} is used as follows:
+
+\c absolute 0x1A
+\c
+\c     kbuf_chr    resw    1
+\c     kbuf_free   resw    1
+\c     kbuf        resw    16
+
+This example describes a section of the PC BIOS data area, at
+segment address 0x40: the above code defines \c{kbuf_chr} to be
+0x1A, \c{kbuf_free} to be 0x1C, and \c{kbuf} to be 0x1E.
+
+The user-level form of \c{ABSOLUTE}, like that of \c{SECTION},
+redefines the \i\c{__?SECT?__} macro when it is invoked.
+
+\i\c{STRUC} and \i\c{ENDSTRUC} are defined as macros which use
+\c{ABSOLUTE} (and also \c{__?SECT?__}).
+
+\c{ABSOLUTE} doesn't have to take an absolute constant as an
+argument: it can take an expression (actually, a \i{critical
+expression}: see \k{crit}) and it can be a value in a segment. For
+example, a TSR can re-use its setup code as run-time BSS like this:
+
+\c         org     100h               ; it's a .COM program
+\c
+\c         jmp     setup              ; setup code comes last
+\c
+\c         ; the resident part of the TSR goes here
+\c setup:
+\c         ; now write the code that installs the TSR here
+\c
+\c absolute setup
+\c
+\c runtimevar1     resw    1
+\c runtimevar2     resd    20
+\c
+\c tsr_end:
+
+This defines some variables `on top of' the setup code, so that
+after the setup has finished running, the space it took up can be
+re-used as data storage for the running TSR. The symbol `tsr_end'
+can be used to calculate the total size of the part of the TSR that
+needs to be made resident.
+
+
+\H{extern} \i\c{EXTERN}: \i{Importing Symbols} from Other Modules
+
+\c{EXTERN} is similar to the MASM directive \c{EXTRN} and the C
+keyword \c{extern}: it is used to declare a symbol which is not
+defined anywhere in the module being assembled, but is assumed to be
+defined in some other module and needs to be referred to by this
+one. Not every object-file format can support external variables:
+the \c{bin} format cannot.
+
+The \c{EXTERN} directive takes as many arguments as you like. Each
+argument is the name of a symbol:
+
+\c extern  _printf
+\c extern  _sscanf,_fscanf
+
+Some object-file formats provide extra features to the \c{EXTERN}
+directive. In all cases, the extra features are used by suffixing a
+colon to the symbol name followed by object-format specific text.
+For example, the \c{obj} format allows you to declare that the
+default segment base of an external should be the group \c{dgroup}
+by means of the directive
+
+\c extern  _variable:wrt dgroup
+
+The primitive form of \c{EXTERN} differs from the user-level form
+only in that it can take only one argument at a time: the support
+for multiple arguments is implemented at the preprocessor level.
+
+You can declare the same variable as \c{EXTERN} more than once: NASM
+will quietly ignore the second and later redeclarations.
+
+If a variable is declared both \c{GLOBAL} and \c{EXTERN}, or if it is
+declared as \c{EXTERN} and then defined, it will be treated as
+\c{GLOBAL}. If a variable is declared both as \c{COMMON} and
+\c{EXTERN}, it will be treated as \c{COMMON}.
+
+
+\H{required} \i\c{REQUIRED}: \i{Unconditionally Importing Symbols} from Other Modules
+
+The \c{REQUIRED} keyword is similar to \c{EXTERN} one. The difference
+is that the \c{EXTERN} keyword as of version 2.15 does not generate
+unknown symbols as that prevents using common header files, as it
+might cause the linker to pull in a bunch of unnecessary modules.
+
+If the old behavior is required, use \c{REQUIRED} keyword instead.
+
+
+\H{global} \i\c{GLOBAL}: \i{Exporting Symbols} to Other Modules
+
+\c{GLOBAL} is the other end of \c{EXTERN}: if one module declares a
+symbol as \c{EXTERN} and refers to it, then in order to prevent
+linker errors, some other module must actually \e{define} the
+symbol and declare it as \c{GLOBAL}. Some assemblers use the name
+\i\c{PUBLIC} for this purpose.
+
+\c{GLOBAL} uses the same syntax as \c{EXTERN}, except that it must
+refer to symbols which \e{are} defined in the same module as the
+\c{GLOBAL} directive. For example:
+
+\c global _main
+\c _main:
+\c         ; some code
+
+\c{GLOBAL}, like \c{EXTERN}, allows object formats to define private
+extensions by means of a colon. The ELF object format, for example,
+lets you specify whether global data items are functions or data:
+
+\c global  hashlookup:function, hashtable:data
+
+Like \c{EXTERN}, the primitive form of \c{GLOBAL} differs from the
+user-level form only in that it can take only one argument at a
+time.
+
+
+\H{common} \i\c{COMMON}: Defining Common Data Areas
+
+The \c{COMMON} directive is used to declare \i\e{common variables}.
+A common variable is much like a global variable declared in the
+uninitialized data section, so that
+
+\c common  intvar  4
+
+is similar in function to
+
+\c global  intvar
+\c section .bss
+\c
+\c intvar  resd    1
+
+The difference is that if more than one module defines the same
+common variable, then at link time those variables will be
+\e{merged}, and references to \c{intvar} in all modules will point
+at the same piece of memory.
+
+Like \c{GLOBAL} and \c{EXTERN}, \c{COMMON} supports object-format
+specific extensions. For example, the \c{obj} format allows common
+variables to be NEAR or FAR, and the ELF format allows you to specify
+the alignment requirements of a common variable:
+
+\c common  commvar  4:near  ; works in OBJ
+\c common  intarray 100:4   ; works in ELF: 4 byte aligned
+
+Once again, like \c{EXTERN} and \c{GLOBAL}, the primitive form of
+\c{COMMON} differs from the user-level form only in that it can take
+only one argument at a time.
+
+\H{static} \i\c{STATIC}: Local Symbols within Modules
+
+Opposite to \c{EXTERN} and \c{GLOBAL}, \c{STATIC} is local symbol, but
+should be named according to the global mangling rules (named by
+analogy with the C keyword \c{static} as applied to functions or
+global variables).
+
+\c static foo
+\c foo:
+\c          ; codes
+
+Unlike \c{GLOBAL}, \c{STATIC} does not allow object formats to accept
+private extensions mentioned in \k{global}.
+
+\H{mangling} \i\c{(G|L)PREFIX}, \i\c{(G|L)POSTFIX}: Mangling Symbols
+
+\c{PREFIX}, \c{GPREFIX}, \c{LPREFIX}, \c{POSTFIX}, \c{GPOSTFIX}, and
+\c{LPOSTFIX} directives can prepend or append a string to a certain
+type of symbols, normally to fit specific ABI conventions
+
+\b\c{PREFIX}|\c{GPREFIX}: Prepend the argument to all \c{EXTERN},
+\c{COMMON}, \c{STATIC}, and \c{GLOBAL} symbols.
+
+\b\c{LPREFIX}: Prepend the argument to all other symbols
+such as local labels and backend defined symbols.
+
+\b\c{POSTFIX}|\c{GPOSTFIX}: Append the argument to all \c{EXTERN},
+\c{COMMON}, \c{STATIC}, and \c{GLOBAL} symbols.
+
+\b\c{LPOSTFIX}: Append the argument to all other symbols
+such as local labels and backend defined symbols.
+
+These are macros implemented as pragmas, and using \c{%pragma} syntax
+can be restricted to specific backends (see \k{pragma}):
+
+\c %pragma macho lprefix L_
+
+Command line options are also available. See also \k{opt-pfix}.
+
+One example which supports many ABIs:
+
+\c ; The most common conventions
+\c %pragma output gprefix _
+\c %pragma output lprefix L_
+\c ; ELF uses a different convention
+\c %pragma elf    gprefix			; empty
+\c %pragma elf    lprefix .L
+
+Some toolchains is aware of a particular prefix for its own
+optimization options, such as dead code elimination. For instance, the
+Mach-O binary format has a linker convention that uses a simplistic
+naming scheme to chunk up sections into smaller subsections, each of
+which may be eliminated. When the \c{subsections_via_symbols}
+directive (\k{macho-ssvs}) is declared, each symbol is the start of a
+separate block. The subsection is, then, defined to include sections
+before the one that starts with a 'L'. \c{LPREFIX} is useful here to
+mark all local symbols with the 'L' prefix to be excluded to the meta
+section.  It converts local symbols compatible with the particular
+toolchain.  Note that local symbols declared with \c{STATIC}
+(\k{static}) are excluded from the symbol mangling and also not marked
+as global.
+
+
+\H{CPU} \i\c{CPU}: Defining CPU Dependencies
+
+The \i\c{CPU} directive restricts assembly to those instructions which
+are available on the specified CPU. At the moment, it is primarily
+used to enforce unavailable \e{encodings} of instructions, such as
+5-byte jumps on the 8080.
+
+(If someone would volunteer to work through the database and add
+proper annotations to each instruction, this could be greatly
+improved. Please contact the developers to volunteer, see \k{contact}.)
+
+Current CPU keywords are:
+
+\b\c{CPU 8086}        - Assemble only 8086 instruction set
+
+\b\c{CPU 186}         - Assemble instructions up to the 80186 instruction set
+
+\b\c{CPU 286}         - Assemble instructions up to the 286 instruction set
+
+\b\c{CPU 386}         - Assemble instructions up to the 386 instruction set
+
+\b\c{CPU 486}         - 486 instruction set
+
+\b\c{CPU 586}         - Pentium instruction set
+
+\b\c{CPU PENTIUM}     - Same as 586
+
+\b\c{CPU 686}         - P6 instruction set
+
+\b\c{CPU PPRO}        - Same as 686
+
+\b\c{CPU P2}          - Same as 686
+
+\b\c{CPU P3}          - Pentium III (Katmai) instruction sets
+
+\b\c{CPU KATMAI}      - Same as P3
+
+\b\c{CPU P4}          - Pentium 4 (Willamette) instruction set
+
+\b\c{CPU WILLAMETTE}  - Same as P4
+
+\b\c{CPU PRESCOTT}    - Prescott instruction set
+
+\b\c{CPU X64}         - x86-64 (x64/AMD64/Intel 64) instruction set
+
+\b\c{CPU IA64}        - IA64 CPU (in x86 mode) instruction set
+
+\b\c{CPU DEFAULT}     - All available instructions
+
+\b\c{CPU ALL}	      - All available instructions \e{and flags}
+
+All options are case insensitive.
+
+In addition, optional flags can be specified to modify the instruction
+selections. These can be combined with a CPU declaration or specified
+alone. They can be prefixed by \c{+} (add flag, default), \c{-}
+(remove flag) or \c{*} (set flag to default); these prefixes are
+"sticky", so:
+
+\c      cpu -foo,bar
+
+means remove both the \c{foo} and \c{bar} options.
+
+If prefixed with \c{no}, it inverts the meaning of the flag, but this
+is not sticky, so:
+
+\c      cpu nofoo,bar
+
+means remove the \c{foo} flag but add the \c{bar} flag.
+
+Currently available flags are:
+
+\b\c{EVEX} - Enable generation of EVEX (AVX-512) encoded instructions
+without an explicit \c{\{evex\}} prefix. Default on.
+
+\b\c\{VEX} - Enable generation of VEX (AVX) or XOP encoded
+instructions without an explict \c{\{vex\}} prefix. Default on.
+
+\b\c{LATEVEX} - Enable generation of VEX (AVX) encoding of
+instructions where the VEX instructions forms were introduced
+\e{after} the corresponding EVEX (AVX-512) instruction forms without
+requiring an explicit \c{\{vex\}} prefix. This is implicit if the
+\c{EVEX} flag is disabled and the \c{VEX} flag is enabled. Default
+off.
+
+
+\H{FLOAT} \i\c{FLOAT}: Handling of \I{floating-point, constants}floating-point constants
+
+By default, floating-point constants are rounded to nearest, and IEEE
+denormals are supported.  The following options can be set to alter
+this behaviour:
+
+\b\c{FLOAT DAZ}       - Flush denormals to zero
+
+\b\c{FLOAT NODAZ}     - Do not flush denormals to zero (default)
+
+\b\c{FLOAT NEAR}      - Round to nearest (default)
+
+\b\c{FLOAT UP}        - Round up (toward +Infinity)
+
+\b\c{FLOAT DOWN}      - Round down (toward -Infinity)
+
+\b\c{FLOAT ZERO}      - Round toward zero
+
+\b\c{FLOAT DEFAULT}   - Restore default settings
+
+The standard macros \i\c{__?FLOAT_DAZ?__}, \i\c{__?FLOAT_ROUND?__}, and
+\i\c{__?FLOAT?__} contain the current state, as long as the programmer
+has avoided the use of the brackeded primitive form, (\c{FLOAT}).
+
+\c{__?FLOAT?__} contains the full set of floating-point settings; this
+value can be saved away and invoked later to restore the setting.
+
+
+\H{asmdir-warning} \i\c{WARNING}: Enable or disable warnings
+
+The \c{WARNING} directive can be used to enable or disable classes
+of warnings in the same way as the \c{-w} option, see \k{warnings} for
+more details about warning classes.
+
+\b \c{warning +}\e{warning-class}\c{} enables warnings for
+   \e{warning-class}.
+
+\b \c{warning -}\e{warning-class}\c{} disables warnings for
+   \e{warning-class}.
+
+\b \c{warning *}\e{warning-class}\c{} restores \e{warning-class} to
+   the original value, either the default value or as specified on the
+   command line.
+
+\b \c{warning push} saves the current warning state on a stack.
+
+\b \c{warning pop} restores the current warning state from the stack.
+
+The \c{WARNING} directive also accepts the \c{all}, \c{error} and
+\c{error=}\e{warning-class} specifiers, see \k{opt-w}.
+
+No "user form" (without the brackets) currently exists.
+
+
+\C{outfmt} \i{Output Formats}
+
+NASM is a portable assembler, designed to be able to compile on any
+ANSI C-supporting platform and produce output to run on a variety of
+Intel x86 operating systems. For this reason, it has a large number
+of available output formats, selected using the \i\c{-f} option on
+the NASM \i{command line}. Each of these formats, along with its
+extensions to the base NASM syntax, is detailed in this chapter.
+
+As stated in \k{opt-o}, NASM chooses a \i{default name} for your
+output file based on the input file name and the chosen output
+format. This will be generated by removing the \i{extension}
+(\c{.asm}, \c{.s}, or whatever you like to use) from the input file
+name, and substituting an extension defined by the output format.
+The extensions are given with each format below.
+
+
+\H{binfmt} \i\c{bin}: \i{Flat-Form Binary}\I{pure binary} Output
+
+The \c{bin} format does not produce object files: it generates
+nothing in the output file except the code you wrote. Such `pure
+binary' files are used by \i{MS-DOS}: \i\c{.COM} executables and
+\i\c{.SYS} device drivers are pure binary files. Pure binary output
+is also useful for \i{operating system} and \i{boot loader}
+development.
+
+The \c{bin} format supports \i{multiple section names}. For details of
+how NASM handles sections in the \c{bin} format, see \k{multisec}.
+
+Using the \c{bin} format puts NASM by default into 16-bit mode (see
+\k{bits}). In order to use \c{bin} to write 32-bit or 64-bit code,
+such as an OS kernel, you need to explicitly issue the \I\c{BITS}\c{BITS 32}
+or \I\c{BITS}\c{BITS 64} directive.
+
+\c{bin} has no default output file name extension: instead, it
+leaves your file name as it is once the original extension has been
+removed. Thus, the default is for NASM to assemble \c{binprog.asm}
+into a binary file called \c{binprog}.
+
+It is extremely important to understand that the binary output format
+is simply nothing other than \e{a linker built into the NASM
+executable.} As such, NASM behaves just as it does when producing any
+other output format: notably the list file reflects the code output
+\e{before} relocation, and the addresses in the list file are
+addresses relative to the start of the current output section.
+
+
+\S{org} \i\c{ORG}: Binary File \i{Program Origin}
+
+The \c{bin} format provides an additional directive to the list
+given in \k{directive}: \c{ORG}. The function of the \c{ORG}
+directive is to specify the origin address which NASM will assume
+the program begins at when it is loaded into memory.
+
+For example, the following code will generate the longword
+\c{0x00000104}:
+
+\c         org     0x100
+\c         dd      label
+\c label:
+
+Unlike the \c{ORG} directive provided by MASM-compatible assemblers,
+which allows you to jump around in the object file and overwrite
+code you have already generated, NASM's \c{ORG} does exactly what
+the directive says: \e{origin}. Its sole function is to specify one
+offset which is added to all internal address references within the
+section; it does not permit any of the trickery that MASM's version
+does. See \k{proborg} for further comments.
+
+
+\S{binseg} \c{bin} Extensions to the \c{SECTION}
+Directive\I{\c{SECTION}, \c{bin} extensions to}
+
+The \c{bin} output format extends the \c{SECTION} (or \c{SEGMENT})
+directive to allow you to specify the alignment requirements of
+segments. This is done by appending the \i\c{ALIGN} qualifier to the
+end of the section-definition line. For example,
+
+\c section .data   align=16
+
+switches to the section \c{.data} and also specifies that it must be
+aligned on a 16-byte boundary.
+
+The parameter to \c{ALIGN} specifies how many low bits of the
+section start address must be forced to zero. The alignment value
+given may be any power of two.\I{section alignment, in
+bin}\I{segment alignment, in bin}\I{alignment, in bin sections}
+
+
+\S{multisec} \i{Multisection}\I{bin, multisection} Support for the \c{bin} Format
+
+The \c{bin} format allows the use of multiple sections, of arbitrary names,
+besides the "known" \c{.text}, \c{.data}, and \c{.bss} names.
+
+\b Sections may be designated \i\c{progbits} or \i\c{nobits}. Default
+is \c{progbits} (except \c{.bss}, which defaults to \c{nobits},
+of course).
+
+\b Sections can be aligned at a specified boundary following the previous
+section with \c{align=}, or at an arbitrary byte-granular position with
+\i\c{start=}.
+
+\b Sections can be given a virtual start address, which will be used
+for the calculation of all memory references within that section
+with \i\c{vstart=}.
+
+\b Sections can be ordered using \i\c{follows=}\c{<section>} or
+\i\c{vfollows=}\c{<section>} as an alternative to specifying an explicit
+start address.
+
+\b Arguments to \c{org}, \c{start}, \c{vstart}, and \c{align=} are
+critical expressions. See \k{crit}. E.g. \c{align=(1 << ALIGN_SHIFT)}
+- \c{ALIGN_SHIFT} must be defined before it is used here.
+
+\b Any code which comes before an explicit \c{SECTION} directive
+is directed by default into the \c{.text} section.
+
+\b If an \c{ORG} statement is not given, \c{ORG 0} is used
+by default.
+
+\b The \c{.bss} section will be placed after the last \c{progbits}
+section, unless \c{start=}, \c{vstart=}, \c{follows=}, or \c{vfollows=}
+has been specified.
+
+\b All sections are aligned on dword boundaries, unless a different
+alignment has been specified.
+
+\b Sections may not overlap.
+
+\b NASM creates the \c{section.<secname>.start} for each section,
+which may be used in your code.
+
+\S{map}\i{Map Files}
+
+Map files can be generated in \c{-f bin} format by means of the \c{map}
+option. Map types of \c{all} (default), \c{brief}, \c{sections}, \c{segments},
+or \c{symbols} may be specified. Output may be directed to \c{stdout}
+(default), \c{stderr}, or a specified file. E.g.
+\c{map symbols myfile.map}. No "user form" exists, the square
+brackets must be used.
+
+
+\H{ithfmt} \i\c{ith}: \i{Intel Hex} Output
+
+The \c{ith} file format produces Intel hex-format files.  Just as the
+\c{bin} format, this is a flat memory image format with no support for
+further relocation or linking.  It is usually used with ROM
+programmers and similar utilities.
+
+From a programmer point of view, this behaves identically to the
+\c{.bin} format; the only difference is the encoding of the
+output. All extensions supported by the \c{bin} file format is also
+supported by the \c{ith} file format.
+
+\c{ith} provides a default output file-name extension of \c{.ith}.
+
+
+\H{srecfmt} \i\c{srec}: \i{Motorola S-Records} Output
+
+The \c{srec} file format produces Motorola S-records files.  Just as the
+\c{bin} format, this is a flat memory image format with no support for
+relocation or linking.  It is usually used with ROM programmers and
+similar utilities.
+
+From a programmer point of view, this behaves identically to the
+\c{.bin} format; the only difference is the encoding of the
+output. All extensions supported by the \c{bin} file format is also
+supported by the \c{srec} file format.
+
+\c{srec} provides a default output file-name extension of \c{.srec}.
+
+
+\H{objfmt} \i\c{obj}: \i{Microsoft OMF}\I{OMF} Object Files
+
+The \c{obj} file format (NASM calls it \c{obj} rather than \c{omf}
+for historical reasons) is the one produced by \i{MASM} and
+\i{TASM}, which is typically fed to 16-bit DOS linkers to produce
+\i\c{.EXE} files. It is also the format used by \i{OS/2}.
+
+\c{obj} provides a default output file-name extension of \c{.obj}.
+
+\c{obj} is not exclusively a 16-bit format, though: NASM has full
+support for the 32-bit extensions to the format. In particular,
+32-bit \c{obj} format files are used by \i{Borland's Win32
+compilers}, instead of using Microsoft's newer \i\c{win32} object
+file format.
+
+The \c{obj} format does not define any special segment names: you
+can call your segments anything you like. Typical names for segments
+in \c{obj} format files are \c{CODE}, \c{DATA} and \c{BSS}.
+
+If your source file contains code before specifying an explicit
+\c{SEGMENT} directive, then NASM will invent its own segment called
+\i\c{__NASMDEFSEG} for you.
+
+When you define a segment in an \c{obj} file, NASM defines the
+segment name as a symbol as well, so that you can access the segment
+address of the segment. So, for example:
+
+\c segment data
+\c
+\c dvar:   dw      1234
+\c
+\c segment code
+\c
+\c function:
+\c         mov     ax,data         ; get segment address of data
+\c         mov     ds,ax           ; and move it into DS
+\c         inc     word dvar     ; now this reference will work
+\c         ret
+
+The \c{obj} format also enables the use of the \i\c{SEG} and
+\i\c{WRT} operators, so that you can write code which does things
+like
+
+\c extern  foo
+\c
+\c       mov   ax,seg foo            ; get preferred segment of foo
+\c       mov   ds,ax
+\c       mov   ax,data               ; a different segment
+\c       mov   es,ax
+\c       mov   ax,ds:foo           ; this accesses `foo'
+\c       mov   es:foo wrt data,bx  ; so does this
+
+
+\S{objseg} \c{obj} Extensions to the \c{SEGMENT}
+Directive\I{SEGMENT, obj extensions to}
+
+The \c{obj} output format extends the \c{SEGMENT} (or \c{SECTION})
+directive to allow you to specify various properties of the segment
+you are defining. This is done by appending extra qualifiers to the
+end of the segment-definition line. For example,
+
+\c segment code private align=16
+
+defines the segment \c{code}, but also declares it to be a private
+segment, and requires that the portion of it described in this code
+module must be aligned on a 16-byte boundary.
+
+The available qualifiers are:
+
+\b \i\c{PRIVATE}, \i\c{PUBLIC}, \i\c{COMMON} and \i\c{STACK} specify
+the combination characteristics of the segment. \c{PRIVATE} segments
+do not get combined with any others by the linker; \c{PUBLIC} and
+\c{STACK} segments get concatenated together at link time; and
+\c{COMMON} segments all get overlaid on top of each other rather
+than stuck end-to-end.
+
+\b \i\c{ALIGN} is used, as shown above, to specify how many low bits
+of the segment start address must be forced to zero. The alignment
+value given may be any power of two from 1 to 4096; in reality, the
+only values supported are 1, 2, 4, 16, 256 and 4096, so if 8 is
+specified it will be rounded up to 16, and 32, 64 and 128 will all
+be rounded up to 256, and so on. Note that alignment to 4096-byte
+boundaries is a \i{PharLap} extension to the format and may not be
+supported by all linkers.\I{section alignment, in OBJ}\I{segment
+alignment, in OBJ}\I{alignment, in OBJ sections}
+
+\b \i\c{CLASS} can be used to specify the segment class; this feature
+indicates to the linker that segments of the same class should be
+placed near each other in the output file. The class name can be any
+word, e.g. \c{CLASS=CODE}.
+
+\b \i\c{OVERLAY}, like \c{CLASS}, is specified with an arbitrary word
+as an argument, and provides overlay information to an
+overlay-capable linker.
+
+\b Segments can be declared as \i\c{USE16} or \i\c{USE32}, which has
+the effect of recording the choice in the object file and also
+ensuring that NASM's default assembly mode when assembling in that
+segment is 16-bit or 32-bit respectively.
+
+\b When writing \i{OS/2} object files, you should declare 32-bit
+segments as \i\c{FLAT}, which causes the default segment base for
+anything in the segment to be the special group \c{FLAT}, and also
+defines the group if it is not already defined.
+
+\b The \c{obj} file format also allows segments to be declared as
+having a pre-defined absolute segment address, although no linkers
+are currently known to make sensible use of this feature;
+nevertheless, NASM allows you to declare a segment such as
+\c{SEGMENT SCREEN ABSOLUTE=0xB800} if you need to. The \i\c{ABSOLUTE}
+and \c{ALIGN} keywords are mutually exclusive.
+
+NASM's default segment attributes are \c{PUBLIC}, \c{ALIGN=1}, no
+class, no overlay, and \c{USE16}.
+
+
+\S{group} \i\c{GROUP}: Defining Groups of Segments\I{segments, groups of}
+
+The \c{obj} format also allows segments to be grouped, so that a
+single segment register can be used to refer to all the segments in
+a group. NASM therefore supplies the \c{GROUP} directive, whereby
+you can code
+
+\c segment data
+\c
+\c         ; some data
+\c
+\c segment bss
+\c
+\c         ; some uninitialized data
+\c
+\c group dgroup data bss
+
+which will define a group called \c{dgroup} to contain the segments
+\c{data} and \c{bss}. Like \c{SEGMENT}, \c{GROUP} causes the group
+name to be defined as a symbol, so that you can refer to a variable
+\c{var} in the \c{data} segment as \c{var wrt data} or as \c{var wrt
+dgroup}, depending on which segment value is currently in your
+segment register.
+
+If you just refer to \c{var}, however, and \c{var} is declared in a
+segment which is part of a group, then NASM will default to giving
+you the offset of \c{var} from the beginning of the \e{group}, not
+the \e{segment}. Therefore \c{SEG var}, also, will return the group
+base rather than the segment base.
+
+NASM will allow a segment to be part of more than one group, but
+will generate a warning if you do this. Variables declared in a
+segment which is part of more than one group will default to being
+relative to the first group that was defined to contain the segment.
+
+A group does not have to contain any segments; you can still make
+\c{WRT} references to a group which does not contain the variable
+you are referring to. OS/2, for example, defines the special group
+\c{FLAT} with no segments in it.
+
+
+\S{uppercase} \i\c{UPPERCASE}: Disabling Case Sensitivity in Output
+
+Although NASM itself is \i{case sensitive}, some OMF linkers are
+not; therefore it can be useful for NASM to output single-case
+object files. The \c{UPPERCASE} format-specific directive causes all
+segment, group and symbol names that are written to the object file
+to be forced to upper case just before being written. Within a
+source file, NASM is still case-sensitive; but the object file can
+be written entirely in upper case if desired.
+
+\c{UPPERCASE} is used alone on a line; it requires no parameters.
+
+
+\S{import} \i\c{IMPORT}: Importing DLL Symbols\I{DLL symbols,
+importing}\I{symbols, importing from DLLs}
+
+The \c{IMPORT} format-specific directive defines a symbol to be
+imported from a DLL, for use if you are writing a DLL's \i{import
+library} in NASM. You still need to declare the symbol as \c{EXTERN}
+as well as using the \c{IMPORT} directive.
+
+The \c{IMPORT} directive takes two required parameters, separated by
+white space, which are (respectively) the name of the symbol you
+wish to import and the name of the library you wish to import it
+from. For example:
+
+\c     import  WSAStartup wsock32.dll
+
+A third optional parameter gives the name by which the symbol is
+known in the library you are importing it from, in case this is not
+the same as the name you wish the symbol to be known by to your code
+once you have imported it. For example:
+
+\c     import  asyncsel wsock32.dll WSAAsyncSelect
+
+
+\S{export} \i\c{EXPORT}: Exporting DLL Symbols\I{DLL symbols,
+exporting}\I{symbols, exporting from DLLs}
+
+The \c{EXPORT} format-specific directive defines a global symbol to
+be exported as a DLL symbol, for use if you are writing a DLL in
+NASM. You still need to declare the symbol as \c{GLOBAL} as well as
+using the \c{EXPORT} directive.
+
+\c{EXPORT} takes one required parameter, which is the name of the
+symbol you wish to export, as it was defined in your source file. An
+optional second parameter (separated by white space from the first)
+gives the \e{external} name of the symbol: the name by which you
+wish the symbol to be known to programs using the DLL. If this name
+is the same as the internal name, you may leave the second parameter
+off.
+
+Further parameters can be given to define attributes of the exported
+symbol. These parameters, like the second, are separated by white
+space. If further parameters are given, the external name must also
+be specified, even if it is the same as the internal name. The
+available attributes are:
+
+\b \c{resident} indicates that the exported name is to be kept
+resident by the system loader. This is an optimization for
+frequently used symbols imported by name.
+
+\b \c{nodata} indicates that the exported symbol is a function which
+does not make use of any initialized data.
+
+\b \c{parm=NNN}, where \c{NNN} is an integer, sets the number of
+parameter words for the case in which the symbol is a call gate
+between 32-bit and 16-bit segments.
+
+\b An attribute which is just a number indicates that the symbol
+should be exported with an identifying number (ordinal), and gives
+the desired number.
+
+For example:
+
+\c     export  myfunc
+\c     export  myfunc TheRealMoreFormalLookingFunctionName
+\c     export  myfunc myfunc 1234  ; export by ordinal
+\c     export  myfunc myfunc resident parm=23 nodata
+
+
+\S{dotdotstart} \i\c{..start}: Defining the \i{Program Entry
+Point}
+
+\c{OMF} linkers require exactly one of the object files being linked to
+define the program entry point, where execution will begin when the
+program is run. If the object file that defines the entry point is
+assembled using NASM, you specify the entry point by declaring the
+special symbol \c{..start} at the point where you wish execution to
+begin.
+
+
+\S{objextern} \c{obj} Extensions to the \c{EXTERN}
+Directive\I{EXTERN, obj extensions to}
+
+If you declare an external symbol with the directive
+
+\c     extern  foo
+
+then references such as \c{mov ax,foo} will give you the offset of
+\c{foo} from its preferred segment base (as specified in whichever
+module \c{foo} is actually defined in). So to access the contents of
+\c{foo} you will usually need to do something like
+
+\c         mov     ax,seg foo      ; get preferred segment base
+\c         mov     es,ax           ; move it into ES
+\c         mov     ax,es:foo     ; and use offset `foo' from it
+
+This is a little unwieldy, particularly if you know that an external
+is going to be accessible from a given segment or group, say
+\c{dgroup}. So if \c{DS} already contained \c{dgroup}, you could
+simply code
+
+\c         mov     ax,foo wrt dgroup
+
+However, having to type this every time you want to access \c{foo}
+can be a pain; so NASM allows you to declare \c{foo} in the
+alternative form
+
+\c     extern  foo:wrt dgroup
+
+This form causes NASM to pretend that the preferred segment base of
+\c{foo} is in fact \c{dgroup}; so the expression \c{seg foo} will
+now return \c{dgroup}, and the expression \c{foo} is equivalent to
+\c{foo wrt dgroup}.
+
+This \I{default-WRT mechanism}default-\c{WRT} mechanism can be used
+to make externals appear to be relative to any group or segment in
+your program. It can also be applied to common variables: see
+\k{objcommon}.
+
+
+\S{objcommon} \c{obj} Extensions to the \c{COMMON}
+Directive\I{COMMON, obj extensions to}
+
+The \c{obj} format allows common variables to be either near\I{near
+common variables} or far\I{far common variables}; NASM allows you to
+specify which your variables should be by the use of the syntax
+
+\c common  nearvar 2:near   ; `nearvar' is a near common
+\c common  farvar  10:far   ; and `farvar' is far
+
+Far common variables may be greater in size than 64Kb, and so the
+OMF specification says that they are declared as a number of
+\e{elements} of a given size. So a 10-byte far common variable could
+be declared as ten one-byte elements, five two-byte elements, two
+five-byte elements or one ten-byte element.
+
+Some \c{OMF} linkers require the \I{element size, in common
+variables}\I{common variables, element size}element size, as well as
+the variable size, to match when resolving common variables declared
+in more than one module. Therefore NASM must allow you to specify
+the element size on your far common variables. This is done by the
+following syntax:
+
+\c common  c_5by2  10:far 5        ; two five-byte elements
+\c common  c_2by5  10:far 2        ; five two-byte elements
+
+If no element size is specified, the default is 1. Also, the \c{FAR}
+keyword is not required when an element size is specified, since
+only far commons may have element sizes at all. So the above
+declarations could equivalently be
+
+\c common  c_5by2  10:5            ; two five-byte elements
+\c common  c_2by5  10:2            ; five two-byte elements
+
+In addition to these extensions, the \c{COMMON} directive in \c{obj}
+also supports default-\c{WRT} specification like \c{EXTERN} does
+(explained in \k{objextern}). So you can also declare things like
+
+\c common  foo     10:wrt dgroup
+\c common  bar     16:far 2:wrt data
+\c common  baz     24:wrt data:6
+
+
+\S{objdepend} Embedded File Dependency Information
+
+Since NASM 2.13.02, \c{obj} files contain embedded dependency file
+information.  To suppress the generation of dependencies, use
+
+\c %pragma obj nodepend
+
+
+\H{win32fmt} \i\c{win32}: Microsoft Win32 Object Files
+
+The \c{win32} output format generates Microsoft Win32 object files,
+suitable for passing to Microsoft linkers such as \i{Visual C++}.
+Note that Borland Win32 compilers do not use this format, but use
+\c{obj} instead (see \k{objfmt}).
+
+\c{win32} provides a default output file-name extension of \c{.obj}.
+
+Note that although Microsoft say that Win32 object files follow the
+\c{COFF} (Common Object File Format) standard, the object files produced
+by Microsoft Win32 compilers are not compatible with COFF linkers
+such as DJGPP's, and vice versa. This is due to a difference of
+opinion over the precise semantics of PC-relative relocations. To
+produce COFF files suitable for DJGPP, use NASM's \c{coff} output
+format; conversely, the \c{coff} format does not produce object
+files that Win32 linkers can generate correct output from.
+
+
+\S{win32sect} \c{win32} Extensions to the \c{SECTION}
+Directive\I{SECTION, Windows extensions to}
+
+Like the \c{obj} format, \c{win32} allows you to specify additional
+information on the \c{SECTION} directive line, to control the type
+and properties of sections you declare. Section types and properties
+are generated automatically by NASM for the \i{standard section names}
+\c{.text}, \c{.data} and \c{.bss}, but may still be overridden by
+these qualifiers.
+
+The available qualifiers are:
+
+\b \c{code}, or equivalently \c{text}, defines the section to be a
+code section. This marks the section as readable and executable, but
+not writable, and also indicates to the linker that the type of the
+section is code.
+
+\b \c{data} and \c{bss} define the section to be a data section,
+analogously to \c{code}. Data sections are marked as readable and
+writable, but not executable. \c{data} declares an initialized data
+section, whereas \c{bss} declares an uninitialized data section.
+
+\b \c{rdata} declares an initialized data section that is readable
+but not writable. Microsoft compilers use this section to place
+constants in it.
+
+\b \c{info} defines the section to be an \i{informational section},
+which is not included in the executable file by the linker, but may
+(for example) pass information \e{to} the linker. For example,
+declaring an \c{info}-type section called \i\c{.drectve} causes the
+linker to interpret the contents of the section as command-line
+options.
+
+\b \c{align=}, used with a trailing number as in \c{obj}, gives the
+\I{section alignment, in win32}\I{alignment, in win32
+sections}alignment requirements of the section. The maximum you may
+specify is 64: the Win32 object file format contains no means to
+request a greater section alignment than this. If alignment is not
+explicitly specified, the defaults are 16-byte alignment for code
+sections, 8-byte alignment for rdata sections and 4-byte alignment
+for data (and BSS) sections.
+Informational sections get a default alignment of 1 byte (no
+alignment), though the value does not matter.
+
+\b \I{comdat, win32 attribute}\c{comdat=}, followed by a number
+("selection"), colon (acting as a separator) and a name,
+marks the section as a \I{COMDAT section, in win32}"COMDAT section".
+It allows Microsoft linkers to perform function-level linking,
+to deal with multiply defined symbols, to eliminate dead code/data.
+The "selection" number should be one of the
+\c{IMAGE_COMDAT_SELECT_*} constants from
+\W{https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src/Debug/pe-format.md#comdat-sections-object-only}\c{COFF format specification};
+this value controls if the linker allows multiply defined symbols
+and how it handles them.
+The name is the \I{COMDAT symbol, in win32}"COMDAT symbol"
+- basically a new name for the section. So even though you have one
+section given by the main name (e.g. \c{.text}), it can actually
+consist of hundreds of COMDAT sections having their own name
+(and alignment).
+When the "selection" is IMAGE_COMDAT_SELECT_ASSOCIATIVE (5),
+the following name is the "COMDAT symbol" of the associated COMDAT
+section; this way you can link a piece of code or data only when
+another piece of code or data gets actually linked.
+
+\> So, when linking a NASM-compiled file with some C code,
+the source may be structured as follows.
+Note that the default \c{.text} section in handled in a special
+way and it doesn't work well with \c{comdat}; you may want to append
+a \c{$} character and an arbitrary suffix to the section name.
+It will get linked into the \c{.text} section anyway - see the info on
+\W{https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src/Debug/pe-format.md#grouped-sections-object-only}\c{Grouped Sections}.
+
+\c    section .text$1 align=16 comdat=1:FirstFnc
+\c       ...                                        ; Code linked only if referenced from C
+\c
+\c    section .text$1 align=16 comdat=1:SecondFnc
+\c       ...                                        ; Code linked only if referenced from C
+\c
+\c    section .rdata align=32 comdat=5:FirstFnc
+\c       ...                                        ; Data linked only if the related code (FirstFnc) is linked
+\c
+
+The defaults assumed by NASM if you do not specify the above
+qualifiers are:
+
+\c section .text    code  align=16
+\c section .data    data  align=4
+\c section .rdata   rdata align=8
+\c section .bss     bss   align=4
+
+The \c{win64} format also adds:
+
+\c section .pdata   rdata align=4
+\c section .xdata   rdata align=8
+
+Any other section name is treated by default like \c{.text}.
+
+\S{win32safeseh} \c{win32}: Safe Structured Exception Handling
+
+Among other improvements in Windows XP SP2 and Windows Server 2003
+Microsoft has introduced concept of "safe structured exception
+handling." General idea is to collect handlers' entry points in
+designated read-only table and have alleged entry point verified
+against this table prior exception control is passed to the handler. In
+order for an executable module to be equipped with such "safe exception
+handler table," all object modules on linker command line has to comply
+with certain criteria. If one single module among them does not, then
+the table in question is omitted and above mentioned run-time checks
+will not be performed for application in question. Table omission is by
+default silent and therefore can be easily overlooked. One can instruct
+linker to refuse to produce binary without such table by passing
+\c{/safeseh} command line option.
+
+Without regard to this run-time check merits it's natural to expect
+NASM to be capable of generating modules suitable for \c{/safeseh}
+linking. From developer's viewpoint the problem is two-fold:
+
+\b how to adapt modules not deploying exception handlers of their own;
+
+\b how to adapt/develop modules utilizing custom exception handling;
+
+Former can be easily achieved with any NASM version by adding following
+line to source code:
+
+\c $@feat.00 equ 1
+
+As of version 2.03 NASM adds this absolute symbol automatically. If
+it's not already present to be precise. I.e. if for whatever reason
+developer would choose to assign another value in source file, it would
+still be perfectly possible.
+
+Registering custom exception handler on the other hand requires certain
+"magic." As of version 2.03 additional directive is implemented,
+\c{safeseh}, which instructs the assembler to produce appropriately
+formatted input data for above mentioned "safe exception handler
+table." Its typical use would be:
+
+\c section .text
+\c extern  _MessageBoxA@16
+\c %if     __?NASM_VERSION_ID?__ >= 0x02030000
+\c safeseh handler         ; register handler as "safe handler"
+\c %endif
+\c handler:
+\c         push    DWORD 1 ; MB_OKCANCEL
+\c         push    DWORD caption
+\c         push    DWORD text
+\c         push    DWORD 0
+\c         call    _MessageBoxA@16
+\c         sub     eax,1   ; incidentally suits as return value
+\c                         ; for exception handler
+\c         ret
+\c global  _main
+\c _main:
+\c         push    DWORD handler
+\c         push    DWORD fs:0
+\c         mov     DWORD fs:0,esp ; engage exception handler
+\c         xor     eax,eax
+\c         mov     eax,DWORDeax   ; cause exception
+\c         pop     DWORD fs:0     ; disengage exception handler
+\c         add     esp,4
+\c         ret
+\c text:   db      'OK to rethrow, CANCEL to generate core dump',0
+\c caption:db      'SEGV',0
+\c
+\c section .drectve info
+\c         db      '/defaultlib:user32.lib /defaultlib:msvcrt.lib '
+
+As you might imagine, it's perfectly possible to produce .exe binary
+with "safe exception handler table" and yet engage unregistered
+exception handler. Indeed, handler is engaged by simply manipulating
+\c{fs:0} location at run-time, something linker has no power over,
+run-time that is. It should be explicitly mentioned that such failure
+to register handler's entry point with \c{safeseh} directive has
+undesired side effect at run-time. If exception is raised and
+unregistered handler is to be executed, the application is abruptly
+terminated without any notification whatsoever. One can argue that
+system could  at least have logged some kind "non-safe exception
+handler in x.exe at address n" message in event log, but no, literally
+no notification is provided and user is left with no clue on what
+caused application failure.
+
+Finally, all mentions of linker in this paragraph refer to Microsoft
+linker version 7.x and later. Presence of \c{@feat.00} symbol and input
+data for "safe exception handler table" causes no backward
+incompatibilities and "safeseh" modules generated by NASM 2.03 and
+later can still be linked by earlier versions or non-Microsoft linkers.
+
+\S{codeview} Debugging formats for Windows
+\I{Windows debugging formats}
+
+The \c{win32} and \c{win64} formats support the Microsoft \i{CodeView
+debugging format}.  Currently CodeView version 8 format is supported
+(\i\c{cv8}), but newer versions of the CodeView debugger should be
+able to handle this format as well.
+
+
+\H{win64fmt} \i\c{win64}: Microsoft Win64 Object Files
+
+The \c{win64} output format generates Microsoft Win64 object files,
+which is nearly 100% identical to the \c{win32} object format (\k{win32fmt})
+with the exception that it is meant to target 64-bit code and the x86-64
+platform altogether. This object file is used exactly the same as the \c{win32}
+object format (\k{win32fmt}), in NASM, with regard to this exception.
+
+\S{win64pic} \c{win64}: Writing Position-Independent Code
+
+While \c{REL} takes good care of RIP-relative addressing, there is one
+aspect that is easy to overlook for a Win64 programmer: indirect
+references. Consider a switch dispatch table:
+
+\c         jmp     qword dsptch+rax*8
+\c         ...
+\c dsptch: dq      case0
+\c         dq      case1
+\c         ...
+
+Even a novice Win64 assembler programmer will soon realize that the code
+is not 64-bit savvy. Most notably linker will refuse to link it with
+
+\c 'ADDR32' relocation to '.text' invalid without /LARGEADDRESSAWARE:NO
+
+So she will have to split jmp instruction as following:
+
+\c         lea     rbx,rel dsptch
+\c         jmp     qword rbx+rax*8
+
+What happens behind the scene is that effective address in \c{lea} is
+encoded relative to instruction pointer, or in perfectly
+position-independent manner. But this is only part of the problem!
+Trouble is that in .dll context \c{caseN} relocations will make their
+way to the final module and might have to be adjusted at .dll load
+time. To be specific when it can't be loaded at preferred address. And
+when this occurs, pages with such relocations will be rendered private
+to current process, which kind of undermines the idea of sharing .dll.
+But no worry, it's trivial to fix:
+
+\c         lea     rbx,rel dsptch
+\c         add     rbx,rbx+rax*8
+\c         jmp     rbx
+\c         ...
+\c dsptch: dq      case0-dsptch
+\c         dq      case1-dsptch
+\c         ...
+
+NASM version 2.03 and later provides another alternative, \c{wrt
+..imagebase} operator, which returns offset from base address of the
+current image, be it .exe or .dll module, therefore the name. For those
+acquainted with PE-COFF format base address denotes start of
+\c{IMAGE_DOS_HEADER} structure. Here is how to implement switch with
+these image-relative references:
+
+\c         lea     rbx,rel dsptch
+\c         mov     eax,rbx+rax*4
+\c         sub     rbx,dsptch wrt ..imagebase
+\c         add     rbx,rax
+\c         jmp     rbx
+\c         ...
+\c dsptch: dd      case0 wrt ..imagebase
+\c         dd      case1 wrt ..imagebase
+
+One can argue that the operator is redundant. Indeed,  snippet before
+last works just fine with any NASM version and is not even Windows
+specific... The real reason for implementing \c{wrt ..imagebase} will
+become apparent in next paragraph.
+
+It should be noted that \c{wrt ..imagebase} is defined as 32-bit
+operand only:
+
+\c         dd      label wrt ..imagebase           ; ok
+\c         dq      label wrt ..imagebase           ; bad
+\c         mov     eax,label wrt ..imagebase       ; ok
+\c         mov     rax,label wrt ..imagebase       ; bad
+
+\S{win64seh} \c{win64}: Structured Exception Handling
+
+Structured exception handing in Win64 is completely different matter
+from Win32. Upon exception program counter value is noted, and
+linker-generated table comprising start and end addresses of all the
+functions in given executable module is traversed and compared to the
+saved program counter. Thus so called \c{UNWIND_INFO} structure is
+identified. If it's not found, then offending subroutine is assumed to
+be "leaf" and just mentioned lookup procedure is attempted for its
+caller. In Win64 leaf function is such function that does not call any
+other function \e{nor} modifies any Win64 non-volatile registers,
+including stack pointer. The latter ensures that it's possible to
+identify leaf function's caller by simply pulling the value from the
+top of the stack.
+
+While majority of subroutines written in assembler are not calling any
+other function, requirement for non-volatile registers' immutability
+leaves developer with not more than 7 registers and no stack frame,
+which is not necessarily what she counted with. Customarily one would
+meet the requirement by saving non-volatile registers on stack and
+restoring them upon return, so what can go wrong? If and only if an
+exception is raised at run-time and no \c{UNWIND_INFO} structure is
+associated with such "leaf" function, the stack unwind procedure will
+expect to find caller's return address on the top of stack immediately
+followed by its frame. Given that developer pushed caller's
+non-volatile registers on stack, would the value on top point at some
+code segment or even addressable space? Well, developer can attempt
+copying caller's return address to the top of stack and this would
+actually work in some very specific circumstances. But unless developer
+can guarantee that these circumstances are always met, it's more
+appropriate to assume worst case scenario, i.e. stack unwind procedure
+going berserk. Relevant question is what happens then? Application is
+abruptly terminated without any notification whatsoever. Just like in
+Win32 case, one can argue that system could at least have logged
+"unwind procedure went berserk in x.exe at address n" in event log, but
+no, no trace of failure is left.
+
+Now, when we understand significance of the \c{UNWIND_INFO} structure,
+let's discuss what's in it and/or how it's processed. First of all it
+is checked for presence of reference to custom language-specific
+exception handler. If there is one, then it's invoked. Depending on the
+return value, execution flow is resumed (exception is said to be
+"handled"), \e{or} rest of \c{UNWIND_INFO} structure is processed as
+following. Beside optional reference to custom handler, it carries
+information about current callee's stack frame and where non-volatile
+registers are saved. Information is detailed enough to be able to
+reconstruct contents of caller's non-volatile registers upon call to
+current callee. And so caller's context is reconstructed, and then
+unwind procedure is repeated, i.e. another \c{UNWIND_INFO} structure is
+associated, this time, with caller's instruction pointer, which is then
+checked for presence of reference to language-specific handler, etc.
+The procedure is recursively repeated till exception is handled. As
+last resort system "handles" it by generating memory core dump and
+terminating the application.
+
+As for the moment of this writing NASM unfortunately does not
+facilitate generation of above mentioned detailed information about
+stack frame layout. But as of version 2.03 it implements building
+blocks for generating structures involved in stack unwinding. As
+simplest example, here is how to deploy custom exception handler for
+leaf function:
+
+\c default rel
+\c section .text
+\c extern  MessageBoxA
+\c handler:
+\c         sub     rsp,40
+\c         mov     rcx,0
+\c         lea     rdx,text
+\c         lea     r8,caption
+\c         mov     r9,1    ; MB_OKCANCEL
+\c         call    MessageBoxA
+\c         sub     eax,1   ; incidentally suits as return value
+\c                         ; for exception handler
+\c         add     rsp,40
+\c         ret
+\c global  main
+\c main:
+\c         xor     rax,rax
+\c         mov     rax,QWORDrax  ; cause exception
+\c         ret
+\c main_end:
+\c text:   db      'OK to rethrow, CANCEL to generate core dump',0
+\c caption:db      'SEGV',0
+\c
+\c section .pdata  rdata align=4
+\c         dd      main wrt ..imagebase
+\c         dd      main_end wrt ..imagebase
+\c         dd      xmain wrt ..imagebase
+\c section .xdata  rdata align=8
+\c xmain:  db      9,0,0,0
+\c         dd      handler wrt ..imagebase
+\c section .drectve info
+\c         db      '/defaultlib:user32.lib /defaultlib:msvcrt.lib '
+
+What you see in \c{.pdata} section is element of the "table comprising
+start and end addresses of function" along with reference to associated
+\c{UNWIND_INFO} structure. And what you see in \c{.xdata} section is
+\c{UNWIND_INFO} structure describing function with no frame, but with
+designated exception handler. References are \e{required} to be
+image-relative (which is the real reason for implementing \c{wrt
+..imagebase} operator). It should be noted that \c{rdata align=n}, as
+well as \c{wrt ..imagebase}, are optional in these two segments'
+contexts, i.e. can be omitted. Latter means that \e{all} 32-bit
+references, not only above listed required ones, placed into these two
+segments turn out image-relative. Why is it important to understand?
+Developer is allowed to append handler-specific data to \c{UNWIND_INFO}
+structure, and if she adds a 32-bit reference, then she will have
+to remember to adjust its value to obtain the real pointer.
+
+As already mentioned, in Win64 terms leaf function is one that does not
+call any other function \e{nor} modifies any non-volatile register,
+including stack pointer. But it's not uncommon that assembler
+programmer plans to utilize every single register and sometimes even
+have variable stack frame. Is there anything one can do with bare
+building blocks? I.e. besides manually composing fully-fledged
+\c{UNWIND_INFO} structure, which would surely be considered
+error-prone? Yes, there is. Recall that exception handler is called
+first, before stack layout is analyzed. As it turned out, it's
+perfectly possible to manipulate current callee's context in custom
+handler in manner that permits further stack unwinding. General idea is
+that handler would not actually "handle" the exception, but instead
+restore callee's context, as it was at its entry point and thus mimic
+leaf function. In other words, handler would simply undertake part of
+unwinding procedure. Consider following example:
+
+\c function:
+\c         mov     rax,rsp         ; copy rsp to volatile register
+\c         push    r15             ; save non-volatile registers
+\c         push    rbx
+\c         push    rbp
+\c         mov     r11,rsp         ; prepare variable stack frame
+\c         sub     r11,rcx
+\c         and     r11,-64
+\c         mov     QWORDr11,rax  ; check for exceptions
+\c         mov     rsp,r11         ; allocate stack frame
+\c         mov     QWORDrsp,rax  ; save original rsp value
+\c magic_point:
+\c         ...
+\c         mov     r11,QWORDrsp  ; pull original rsp value
+\c         mov     rbp,QWORDr11-24
+\c         mov     rbx,QWORDr11-16
+\c         mov     r15,QWORDr11-8
+\c         mov     rsp,r11         ; destroy frame
+\c         ret
+
+The keyword is that up to \c{magic_point} original \c{rsp} value
+remains in chosen volatile register and no non-volatile register,
+except for \c{rsp}, is modified. While past \c{magic_point} \c{rsp}
+remains constant till the very end of the \c{function}. In this case
+custom language-specific exception handler would look like this:
+
+\c EXCEPTION_DISPOSITION handler (EXCEPTION_RECORD *rec,ULONG64 frame,
+\c         CONTEXT *context,DISPATCHER_CONTEXT *disp)
+\c {   ULONG64 *rsp;
+\c     if (context->Rip<(ULONG64)magic_point)
+\c         rsp = (ULONG64 *)context->Rax;
+\c     else
+\c     {   rsp = ((ULONG64 **)context->Rsp)0;
+\c         context->Rbp = rsp-3;
+\c         context->Rbx = rsp-2;
+\c         context->R15 = rsp-1;
+\c     }
+\c     context->Rsp = (ULONG64)rsp;
+\c
+\c     memcpy (disp->ContextRecord,context,sizeof(CONTEXT));
+\c     RtlVirtualUnwind(UNW_FLAG_NHANDLER,disp->ImageBase,
+\c         dips->ControlPc,disp->FunctionEntry,disp->ContextRecord,
+\c         &disp->HandlerData,&disp->EstablisherFrame,NULL);
+\c     return ExceptionContinueSearch;
+\c }
+
+As custom handler mimics leaf function, corresponding \c{UNWIND_INFO}
+structure does not have to contain any information about stack frame
+and its layout.
+
+\H{cofffmt} \i\c{coff}: \i{Common Object File Format}
+
+The \c{coff} output type produces \c{COFF} object files suitable for
+linking with the \i{DJGPP} linker.
+
+\c{coff} provides a default output file-name extension of \c{.o}.
+
+The \c{coff} format supports the same extensions to the \c{SECTION}
+directive as \c{win32} does, except that the \c{align} qualifier and
+the \c{info} section type are not supported.
+
+\H{machofmt} \I{Mach-O}\i\c{macho32} and \i\c{macho64}: \i{Mach Object File Format}
+
+The \c{macho32} and \c{macho64} output formts produces Mach-O
+object files suitable for linking with the \i{MacOS X} linker.
+\i\c{macho} is a synonym for \c{macho32}.
+
+\c{macho} provides a default output file-name extension of \c{.o}.
+
+\S{machosect} \c{macho} extensions to the \c{SECTION} Directive
+\I{SECTION, macho extensions to}
+
+The \c{macho} output format specifies section names in the format
+"\e{segment}\c{,}\e{section}".  No spaces are allowed around the
+comma.  The following flags can also be specified:
+
+\b \c{data} - this section contains initialized data items
+
+\b \c{code} - this section contains code exclusively
+
+\b \c{mixed} - this section contains both code and data
+
+\b \c{bss} - this section is uninitialized and filled with zero
+
+\b \c{zerofill} - same as \c{bss}
+
+\b \c{no_dead_strip} - inhibit dead code stripping for this section
+
+\b \c{live_support} - set the live support flag for this section
+
+\b \c{strip_static_syms} - strip static symbols for this section
+
+\b \c{debug} - this section contains debugging information
+
+\b \c{align=}\e{alignment} - specify section alignment
+
+The default is \c{data}, unless the section name is \c{__text} or
+\c{__bss} in which case the default is \c{text} or \c{bss},
+respectively.
+
+For compatibility with other Unix platforms, the following standard
+names are also supported:
+
+\c .text    = __TEXT,__text  text
+\c .rodata  = __DATA,__const data
+\c .data    = __DATA,__data  data
+\c .bss     = __DATA,__bss   bss
+
+If the \c{.rodata} section contains no relocations, it is instead put
+into the \c{__TEXT,__const} section unless this section has already
+been specified explicitly.  However, it is probably better to specify
+\c{__TEXT,__const} and \c{__DATA,__const} explicitly as appropriate.
+
+\S{machotls} \i{Thread Local Storage in Mach-O}\I{TLS}: \c{macho} special
+symbols and \i\c{WRT}
+
+Mach-O defines the following special symbols that can be used on the
+right-hand side of the \c{WRT} operator:
+
+\b \c{..tlvp} is used to specify access to thread-local storage.
+
+\b \c{..gotpcrel} is used to specify references to the Global Offset
+   Table.  The GOT is supported in the \c{macho64} format only.
+
+\S{macho-ssvs} \c{macho} specific directive \i\c{subsections_via_symbols}
+
+The directive \c{subsections_via_symbols} sets the
+\c{MH_SUBSECTIONS_VIA_SYMBOLS} flag in the Mach-O header, that effectively
+separates a block (or a subsection) based on a symbol. It is often used
+for eliminating dead codes by a linker.
+
+This directive takes no arguments.
+
+This is a macro implemented as a \c{%pragma}.  It can also be
+specified in its \c{%pragma} form, in which case it will not affect
+non-Mach-O builds of the same source code:
+
+\c      %pragma macho subsections_via_symbols
+
+\S{macho-ssvs} \c{macho} specific directive \i\c{no_dead_strip}
+
+The directive \c{no_dead_strip} sets the Mach-O \c{SH_NO_DEAD_STRIP}
+section flag on the section containing a a specific symbol.  This
+directive takes a list of symbols as its arguments.
+
+This is a macro implemented as a \c{%pragma}.  It can also be
+specified in its \c{%pragma} form, in which case it will not affect
+non-Mach-O builds of the same source code:
+
+\c      %pragma macho no_dead_strip symbol...
+
+\S{macho-pext} \c{macho} specific extensions to the \c{GLOBAL}
+Directive: \i\c{private_extern}
+
+The directive extension to \c{GLOBAL} marks the symbol with limited
+global scope. For example, you can specify the global symbol with
+this extension:
+
+\c global foo:private_extern
+\c foo:
+\c          ; codes
+
+Using with static linker will clear the private extern attribute.
+But linker option like \c{-keep_private_externs} can avoid it.
+
+\H{elffmt} \i\c{elf32}, \i\c{elf64}, \i\c{elfx32}: \I{ELF}\I{linux, elf}\i{Executable and Linkable
+Format} Object Files
+
+The \c{elf32}, \c{elf64} and \c{elfx32} output formats generate
+\c{ELF32 and ELF64} (Executable and Linkable Format) object files, as
+used by Linux as well as \i{Unix System V}, including \i{Solaris x86},
+\i{UnixWare} and \i{SCO Unix}. ELF provides a default output
+file-name extension of \c{.o}. \c{elf} is a synonym for \c{elf32}.
+
+The \c{elfx32} format is used for the \i{x32} ABI, which is a 32-bit
+ABI with the CPU in 64-bit mode.
+
+\S{abisect} ELF specific directive \i\c{osabi}
+
+The ELF header specifies the application binary interface for the
+target operating system (OSABI).  This field can be set by using the
+\c{osabi} directive with the numeric value (0-255) of the target
+system. If this directive is not used, the default value will be "UNIX
+System V ABI" (0) which will work on most systems which support ELF.
+
+\S{elfsect} ELF extensions to the \c{SECTION} Directive
+\I{SECTION, ELF extensions to}
+
+Like the \c{obj} format, \c{elf} allows you to specify additional
+information on the \c{SECTION} directive line, to control the type
+and properties of sections you declare. Section types and properties
+are generated automatically by NASM for the \i{standard section
+names}, but may still be
+overridden by these qualifiers.
+
+The available qualifiers are:
+
+\b \i\c{alloc} defines the section to be one which is loaded into
+memory when the program is run. \i\c{noalloc} defines it to be one
+which is not, such as an informational or comment section.
+
+\b \i\c{exec} defines the section to be one which should have execute
+permission when the program is run. \i\c{noexec} defines it as one
+which should not.
+
+\b \i\c{write} defines the section to be one which should be writable
+when the program is run. \i\c{nowrite} defines it as one which should
+not.
+
+\b \i\c{progbits} defines the section to be one with explicit contents
+stored in the object file: an ordinary code or data section, for
+example.
+
+\b \i\c{nobits} defines the section to be one with no explicit
+contents given, such as a BSS section.
+
+\b \i\c{note} indicates that this section contains ELF notes. The
+content of ELF notes are specified using normal assembly instructions;
+it is up to the programmer to ensure these are valid ELF notes.
+
+\b \i\c{preinit_array} indicates that this section contains function
+addresses to be called before any other initialization has happened.
+
+\b \i\c{init_array} indicates that this section contains function
+addresses to be called during initialization.
+
+\b \i\c{fini_array} indicates that this section contains function
+pointers to be called during termination.
+
+\b \I{align, ELF attribute}\c{align=}, used with a trailing number as in \c{obj}, gives the
+\I{section alignment, in elf}\I{alignment, in elf sections}alignment
+requirements of the section.
+
+\b \c{byte}, \c{word}, \c{dword}, \c{qword}, \c{tword}, \c{oword},
+\c{yword}, or \c{zword} with an optional \c{*}\i{multiplier} specify
+the fundamental data item size for a section which contains either
+fixed-sized data structures or strings; it also sets a default
+alignment. This is generally used with the \c{strings} and \c{merge}
+attributes (see below.) For example \c{byte*4} defines a unit size of
+4 bytes, with a default alignment of 1; \c{dword} also defines a unit
+size of 4 bytes, but with a default alignment of 4. The \c{align=}
+attribute, if specified, overrides this default alignment.
+
+\b \I{pointer, ELF attribute}\c{pointer} is equivalent to \c{dword}
+for \c{elf32} or \c{elfx32}, and \c{qword} for \c{elf64}.
+
+\b \I{strings, ELF attribute}\c{strings} indicate that this section
+contains exclusively null-terminated strings. By default these are
+assumed to be byte strings, but a size specifier can be used to
+override that.
+
+\b \i\c{merge} indicates that duplicate data elements in this section
+should be merged with data elements from other object files. Data
+elements can be either fixed-sized objects or null-terminatedstrings
+(with the \c{strings} attribute.) A size specifier is required unless
+\c{strings} is specified, in which case the size defaults to \c{byte}.
+
+\b \i\c{tls} defines the section to be one which contains
+thread local variables.
+
+The defaults assumed by NASM if you do not specify the above
+qualifiers are:
+
+\I\c{.text} \I\c{.rodata} \I\c{.lrodata} \I\c{.data} \I\c{.ldata}
+\I\c{.bss} \I\c{.lbss} \I\c{.tdata} \I\c{.tbss} \I\c\{.comment}
+
+\c section .text          progbits      alloc   exec    nowrite  align=16
+\c section .rodata        progbits      alloc   noexec  nowrite  align=4
+\c section .lrodata       progbits      alloc   noexec  nowrite  align=4
+\c section .data          progbits      alloc   noexec  write    align=4
+\c section .ldata         progbits      alloc   noexec  write    align=4
+\c section .bss           nobits        alloc   noexec  write    align=4
+\c section .lbss          nobits        alloc   noexec  write    align=4
+\c section .tdata         progbits      alloc   noexec  write    align=4   tls
+\c section .tbss          nobits        alloc   noexec  write    align=4   tls
+\c section .comment       progbits      noalloc noexec  nowrite  align=1
+\c section .preinit_array preinit_array alloc   noexec  nowrite  pointer
+\c section .init_array    init_array    alloc   noexec  nowrite  pointer
+\c section .fini_array    fini_array    alloc   noexec  nowrite  pointer
+\c section .note          note          noalloc noexec  nowrite  align=4
+\c section other          progbits      alloc   noexec  nowrite  align=1
+
+(Any section name other than those in the above table
+ is treated by default like \c{other} in the above table.
+ Please note that section names are case sensitive.)
+
+
+\S{elfwrt} \i{Position-Independent Code}\I{PIC}: ELF Special
+Symbols and \i\c{WRT}
+
+Since \c{ELF} does not support segment-base references, the \c{WRT}
+operator is not used for its normal purpose; therefore NASM's
+\c{elf} output format makes use of \c{WRT} for a different purpose,
+namely the PIC-specific \I{relocations, PIC-specific}relocation
+types.
+
+\c{elf} defines five special symbols which you can use as the
+right-hand side of the \c{WRT} operator to obtain PIC relocation
+types. They are \i\c{..gotpc}, \i\c{..gotoff}, \i\c{..got},
+\i\c{..plt} and \i\c{..sym}. Their functions are summarized here:
+
+\b Referring to the symbol marking the global offset table base
+using \c{wrt ..gotpc} will end up giving the distance from the
+beginning of the current section to the global offset table.
+(\i\c{_GLOBAL_OFFSET_TABLE_} is the standard symbol name used to
+refer to the \i{GOT}.) So you would then need to add \i\c{$$} to the
+result to get the real address of the GOT.
+
+\b Referring to a location in one of your own sections using \c{wrt
+..gotoff} will give the distance from the beginning of the GOT to
+the specified location, so that adding on the address of the GOT
+would give the real address of the location you wanted.
+
+\b Referring to an external or global symbol using \c{wrt ..got}
+causes the linker to build an entry \e{in} the GOT containing the
+address of the symbol, and the reference gives the distance from the
+beginning of the GOT to the entry; so you can add on the address of
+the GOT, load from the resulting address, and end up with the
+address of the symbol.
+
+\b Referring to a procedure name using \c{wrt ..plt} causes the
+linker to build a \i{procedure linkage table} entry for the symbol,
+and the reference gives the address of the \i{PLT} entry. You can
+only use this in contexts which would generate a PC-relative
+relocation normally (i.e. as the destination for \c{CALL} or
+\c{JMP}), since ELF contains no relocation type to refer to PLT
+entries absolutely.
+
+\b Referring to a symbol name using \c{wrt ..sym} causes NASM to
+write an ordinary relocation, but instead of making the relocation
+relative to the start of the section and then adding on the offset
+to the symbol, it will write a relocation record aimed directly at
+the symbol in question. The distinction is a necessary one due to a
+peculiarity of the dynamic linker.
+
+A fuller explanation of how to use these relocation types to write
+shared libraries entirely in NASM is given in \k{picdll}.
+
+\S{elftls} \i{Thread Local Storage in ELF}\I{TLS}: \c{elf} Special
+Symbols and \i\c{WRT}
+
+\b In ELF32 mode, referring to an external or global symbol using
+\c{wrt ..tlsie} \I\c{..tlsie}
+causes the linker to build an entry \e{in} the GOT containing the
+offset of the symbol within the TLS block, so you can access the value
+of the symbol with code such as:
+
+\c	  mov  eax,tid wrt ..tlsie
+\c	  mov  gs:eax,ebx
+
+
+\b In ELF64 or ELFx32 mode, referring to an external or global symbol using
+\c{wrt ..gottpoff} \I\c{..gottpoff}
+causes the linker to build an entry \e{in} the GOT containing the
+offset of the symbol within the TLS block, so you can access the value
+of the symbol with code such as:
+
+\c	  mov	rax,rel tid wrt ..gottpoff
+\c	  mov	rcx,fs:rax
+
+
+\S{elfglob} \c{elf} Extensions to the \c{GLOBAL} Directive\I{GLOBAL,
+elf extensions to}\I{GLOBAL, aoutb extensions to}
+
+\c{ELF} object files can contain more information about a global
+symbol than just its address: they can contain the \I{symbols,
+specifying sizes}\I{size, of symbols}size of the symbol and its
+\I{symbols, specifying types}\I{type, of symbols}type as well. These
+are not merely debugger conveniences, but are actually necessary when
+the program being written is a \I{elf shared library}shared
+library. NASM therefore supports some extensions to the \c{GLOBAL}
+directive, allowing you to specify these features.
+
+You can specify whether a global variable is a function or a data
+object by suffixing the name with a colon and the word
+\i\c{function} or \i\c{data}. (\i\c{object} is a synonym for
+\c{data}.) For example:
+
+\c global   hashlookup:function, hashtable:data
+
+exports the global symbol \c{hashlookup} as a function and
+\c{hashtable} as a data object.
+
+Optionally, you can control the ELF visibility of the symbol.  Just
+add one of the visibility keywords: \i\c{default}, \i\c{internal},
+\i\c{hidden}, or \i\c{protected}.  The default is \i\c{default} of
+course.  For example, to make \c{hashlookup} hidden:
+
+\c global   hashlookup:function hidden
+
+Since version 2.15, it is possible to specify symbols binding. The keywords
+are: \i\c{weak} to generate weak symbol or \i\c{strong}. The default is \i\c{strong}.
+
+You can also specify the size of the data associated with the
+symbol, as a numeric expression (which may involve labels, and even
+forward references) after the type specifier. Like this:
+
+\c global  hashtable:data (hashtable.end - hashtable)
+\c
+\c hashtable:
+\c         db this,that,theother  ; some data here
+\c .end:
+
+This makes NASM automatically calculate the length of the table and
+place that information into the \c{ELF} symbol table.
+
+Declaring the type and size of global symbols is necessary when
+writing shared library code. For more information, see
+\k{picglobal}.
+
+
+\S{elfextrn} \c{elf} Extensions to the \c{EXTERN} Directive\I{EXTERN,
+elf extensions to}\I{EXTERN, elf extensions to}
+
+Since version 2.15 it is possible to specify keyword \i\c{weak} to generate weak external
+reference. Example:
+
+\c extern weak_ref:weak
+
+
+\S{elfcomm} \c{elf} Extensions to the \c{COMMON} Directive
+\I{COMMON, elf extensions to}
+
+\c{ELF} also allows you to specify alignment requirements \I{common
+variables, alignment in elf}\I{alignment, of elf common variables}on
+common variables. This is done by putting a number (which must be a
+power of two) after the name and size of the common variable,
+separated (as usual) by a colon. For example, an array of
+doublewords would benefit from 4-byte alignment:
+
+\c common  dwordarray 128:4
+
+This declares the total size of the array to be 128 bytes, and
+requires that it be aligned on a 4-byte boundary.
+
+
+\S{elf16} 16-bit code and ELF
+\I{ELF, 16-bit code}
+
+Older versions of the \c{ELF32} specification did not provide
+relocations for 8- and 16-bit values. It is now part of the formal
+specification, and any new enough linker should support them.
+
+ELF has currently no support for segmented programming.
+
+\S{elfdbg} Debug formats and ELF
+\I{ELF, debug formats}
+
+ELF provides debug information in \c{STABS} and \c{DWARF} formats.
+Line number information is generated for all executable sections, but please
+note that only the ".text" section is executable by default.
+
+\H{aoutfmt} \i\c{aout}: Linux \I{a.out, Linux version}\I{linux, a.out}\c{a.out} Object Files
+
+The \c{aout} format generates \c{a.out} object files, in the form used
+by early Linux systems (current Linux systems use ELF, see
+\k{elffmt}.) These differ from other \c{a.out} object files in that
+the magic number in the first four bytes of the file is
+different; also, some implementations of \c{a.out}, for example
+NetBSD's, support position-independent code, which Linux's
+implementation does not.
+
+\c{a.out} provides a default output file-name extension of \c{.o}.
+
+\c{a.out} is a very simple object format. It supports no special
+directives, no special symbols, no use of \c{SEG} or \c{WRT}, and no
+extensions to any standard directives. It supports only the three
+\i{standard section names} \i\c{.text}, \i\c{.data} and \i\c{.bss}.
+
+
+\H{aoutfmt} \i\c{aoutb}: \i{NetBSD}/\i{FreeBSD}/\i{OpenBSD}
+\I{a.out, BSD version}\c{a.out} Object Files
+
+The \c{aoutb} format generates \c{a.out} object files, in the form
+used by the various free \c{BSD Unix} clones, \c{NetBSD}, \c{FreeBSD}
+and \c{OpenBSD}. For simple object files, this object format is exactly
+the same as \c{aout} except for the magic number in the first four bytes
+of the file. However, the \c{aoutb} format supports
+\I{PIC}\i{position-independent code} in the same way as the \c{elf}
+format, so you can use it to write \c{BSD} \i{shared libraries}.
+
+\c{aoutb} provides a default output file-name extension of \c{.o}.
+
+\c{aoutb} supports no special directives, no special symbols, and
+only the three \i{standard section names} \i\c{.text}, \i\c{.data}
+and \i\c{.bss}. However, it also supports the same use of \i\c{WRT} as
+\c{elf} does, to provide position-independent code relocation types.
+See \k{elfwrt} for full documentation of this feature.
+
+\c{aoutb} also supports the same extensions to the \c{GLOBAL}
+directive as \c{elf} does: see \k{elfglob} for documentation of
+this.
+
+
+\H{as86fmt} \c{as86}: \i{Minix}/Linux\I{linux, as86} \i\c{as86} Object Files
+
+The Minix/Linux 16-bit assembler \c{as86} has its own non-standard
+object file format. Although its companion linker \i\c{ld86} produces
+something close to ordinary \c{a.out} binaries as output, the object
+file format used to communicate between \c{as86} and \c{ld86} is not
+itself \c{a.out}.
+
+NASM supports this format, just in case it is useful, as \c{as86}.
+\c{as86} provides a default output file-name extension of \c{.o}.
+
+\c{as86} is a very simple object format (from the NASM user's point
+of view). It supports no special directives, no use of \c{SEG} or \c{WRT},
+and no extensions to any standard directives. It supports only the three
+\i{standard section names} \i\c{.text}, \i\c{.data} and \i\c{.bss}.  The
+only special symbol supported is \c{..start}.
+
+
+\H{dbgfmt} \i\c{dbg}: Debugging Format
+
+The \c{dbg} format does not output an object file as such; instead,
+it outputs a text file which contains a complete list of all the
+transactions between the main body of NASM and the output-format
+back end module. It is primarily intended to aid people who want to
+write their own output drivers, so that they can get a clearer idea
+of the various requests the main program makes of the output driver,
+and in what order they happen.
+
+For simple files, one can easily use the \c{dbg} format like this:
+
+\c nasm -f dbg filename.asm
+
+which will generate a diagnostic file called \c{filename.dbg}.
+However, this will not work well on files which were designed for a
+different object format, because each object format defines its own
+macros (usually user-level forms of directives), and those macros
+will not be defined in the \c{dbg} format. Therefore it can be
+useful to run NASM twice, in order to do the preprocessing with the
+native object format selected:
+
+\c nasm -e -f elf32 -o elfprog.i elfprog.asm
+\c nasm -a -f dbg elfprog.i
+
+This preprocesses \c{elfprog.asm} into \c{elfprog.i}, keeping the
+\c{elf32} object format selected in order to make sure ELF special
+directives are converted into primitive form correctly. Then the
+preprocessed source is fed through the \c{dbg} format to generate the
+final diagnostic output.
+
+This workaround will still typically not work for programs intended
+for \c{obj} format, because the \c{obj} \c{SEGMENT} and \c{GROUP}
+directives have side effects of defining the segment and group names
+as symbols; \c{dbg} will not do this, so the program will not
+assemble. You will have to work around that by defining the symbols
+yourself (using \c{EXTERN}, for example) if you really need to get a
+\c{dbg} trace of an \c{obj}-specific source file.
+
+\c{dbg} accepts any section name and any directives at all, and logs
+them all to its output file.
+
+\c{dbg} accepts and logs any \c{%pragma}, but the specific
+\c{%pragma}:
+
+\c      %pragma dbg maxdump <size>
+
+where \c{<size>} is either a number or \c{unlimited}, can be used to
+control the maximum size for dumping the full contents of a
+\c{rawdata} output object.
+
+
+\C{16bit} Writing 16-bit Code (DOS, Windows 3/3.1)
+
+This chapter attempts to cover some of the common issues encountered
+when writing 16-bit code to run under \c{MS-DOS} or \c{Windows 3.x}. It
+covers how to link programs to produce \c{.EXE} or \c{.COM} files,
+how to write \c{.SYS} device drivers, and how to interface assembly
+language code with 16-bit C compilers and with Borland Pascal.
+
+
+\H{exefiles} Producing \i\c{.EXE} Files
+
+Any large program written under DOS needs to be built as a \c{.EXE}
+file: only \c{.EXE} files have the necessary internal structure
+required to span more than one 64K segment. \i{Windows} programs,
+also, have to be built as \c{.EXE} files, since Windows does not
+support the \c{.COM} format.
+
+In general, you generate \c{.EXE} files by using the \c{obj} output
+format to produce one or more \i\c{.obj} files, and then linking
+them together using a linker. However, NASM also supports the direct
+generation of simple DOS \c{.EXE} files using the \c{bin} output
+format (by using \c{DB} and \c{DW} to construct the \c{.EXE} file
+header), and a macro package is supplied to do this. Thanks to
+Yann Guidon for contributing the code for this.
+
+NASM may also support \c{.EXE} natively as another output format in
+future releases.
+
+
+\S{objexe} Using the \c{obj} Format To Generate \c{.EXE} Files
+
+This section describes the usual method of generating \c{.EXE} files
+by linking \c{.OBJ} files together.
+
+Most 16-bit programming language packages come with a suitable
+linker; if you have none of these, there is a free linker called
+\i{VAL}\I{linker, free}, available in \c{LZH} archive format from
+\W{ftp://x2ftp.oulu.fi/pub/msdos/programming/lang/}\i\c{x2ftp.oulu.fi}.
+An LZH archiver can be found at
+\W{ftp://ftp.simtel.net/pub/simtelnet/msdos/arcers}\i\c{ftp.simtel.net}.
+There is another `free' linker (though this one doesn't come with
+sources) called \i{FREELINK}, available from
+\W{http://www.pcorner.com/tpc/old/3-101.html}\i\c{www.pcorner.com}.
+A third, \i\c{djlink}, written by DJ Delorie, is available at
+\W{http://www.delorie.com/djgpp/16bit/djlink/}\i\c{www.delorie.com}.
+A fourth linker, \i\c{ALINK}, written by Anthony A.J. Williams, is
+available at \W{http://alink.sourceforge.net}\i\c{alink.sourceforge.net}.
+
+When linking several \c{.OBJ} files into a \c{.EXE} file, you should
+ensure that exactly one of them has a start point defined (using the
+\I{program entry point}\i\c{..start} special symbol defined by the
+\c{obj} format: see \k{dotdotstart}). If no module defines a start
+point, the linker will not know what value to give the entry-point
+field in the output file header; if more than one defines a start
+point, the linker will not know \e{which} value to use.
+
+An example of a NASM source file which can be assembled to a
+\c{.OBJ} file and linked on its own to a \c{.EXE} is given here. It
+demonstrates the basic principles of defining a stack, initialising
+the segment registers, and declaring a start point. This file is
+also provided in the \I{test subdirectory}\c{test} subdirectory of
+the NASM archives, under the name \c{objexe.asm}.
+
+\c segment code
+\c
+\c ..start:
+\c         mov     ax,data
+\c         mov     ds,ax
+\c         mov     ax,stack
+\c         mov     ss,ax
+\c         mov     sp,stacktop
+
+This initial piece of code sets up \c{DS} to point to the data
+segment, and initializes \c{SS} and \c{SP} to point to the top of
+the provided stack. Notice that interrupts are implicitly disabled
+for one instruction after a move into \c{SS}, precisely for this
+situation, so that there's no chance of an interrupt occurring
+between the loads of \c{SS} and \c{SP} and not having a stack to
+execute on.
+
+Note also that the special symbol \c{..start} is defined at the
+beginning of this code, which means that will be the entry point
+into the resulting executable file.
+
+\c         mov     dx,hello
+\c         mov     ah,9
+\c         int     0x21
+
+The above is the main program: load \c{DS:DX} with a pointer to the
+greeting message (\c{hello} is implicitly relative to the segment
+\c{data}, which was loaded into \c{DS} in the setup code, so the
+full pointer is valid), and call the DOS print-string function.
+
+\c         mov     ax,0x4c00
+\c         int     0x21
+
+This terminates the program using another DOS system call.
+
+\c segment data
+\c
+\c hello:  db      'hello, world', 13, 10, '$'
+
+The data segment contains the string we want to display.
+
+\c segment stack stack
+\c         resb 64
+\c stacktop:
+
+The above code declares a stack segment containing 64 bytes of
+uninitialized stack space, and points \c{stacktop} at the top of it.
+The directive \c{segment stack stack} defines a segment \e{called}
+\c{stack}, and also of \e{type} \c{STACK}. The latter is not
+necessary to the correct running of the program, but linkers are
+likely to issue warnings or errors if your program has no segment of
+type \c{STACK}.
+
+The above file, when assembled into a \c{.OBJ} file, will link on
+its own to a valid \c{.EXE} file, which when run will print `hello,
+world' and then exit.
+
+
+\S{binexe} Using the \c{bin} Format To Generate \c{.EXE} Files
+
+The \c{.EXE} file format is simple enough that it's possible to
+build a \c{.EXE} file by writing a pure-binary program and sticking
+a 32-byte header on the front. This header is simple enough that it
+can be generated using \c{DB} and \c{DW} commands by NASM itself, so
+that you can use the \c{bin} output format to directly generate
+\c{.EXE} files.
+
+Included in the NASM archives, in the \I{misc subdirectory}\c{misc}
+subdirectory, is a file \i\c{exebin.mac} of macros. It defines three
+macros: \i\c{EXE_begin}, \i\c{EXE_stack} and \i\c{EXE_end}.
+
+To produce a \c{.EXE} file using this method, you should start by
+using \c{%include} to load the \c{exebin.mac} macro package into
+your source file. You should then issue the \c{EXE_begin} macro call
+(which takes no arguments) to generate the file header data. Then
+write code as normal for the \c{bin} format - you can use all three
+standard sections \c{.text}, \c{.data} and \c{.bss}. At the end of
+the file you should call the \c{EXE_end} macro (again, no arguments),
+which defines some symbols to mark section sizes, and these symbols
+are referred to in the header code generated by \c{EXE_begin}.
+
+In this model, the code you end up writing starts at \c{0x100}, just
+like a \c{.COM} file - in fact, if you strip off the 32-byte header
+from the resulting \c{.EXE} file, you will have a valid \c{.COM}
+program. All the segment bases are the same, so you are limited to a
+64K program, again just like a \c{.COM} file. Note that an \c{ORG}
+directive is issued by the \c{EXE_begin} macro, so you should not
+explicitly issue one of your own.
+
+You can't directly refer to your segment base value, unfortunately,
+since this would require a relocation in the header, and things
+would get a lot more complicated. So you should get your segment
+base by copying it out of \c{CS} instead.
+
+On entry to your \c{.EXE} file, \c{SS:SP} are already set up to
+point to the top of a 2Kb stack. You can adjust the default stack
+size of 2Kb by calling the \c{EXE_stack} macro. For example, to
+change the stack size of your program to 64 bytes, you would call
+\c{EXE_stack 64}.
+
+A sample program which generates a \c{.EXE} file in this way is
+given in the \c{test} subdirectory of the NASM archive, as
+\c{binexe.asm}.
+
+
+\H{comfiles} Producing \i\c{.COM} Files
+
+While large DOS programs must be written as \c{.EXE} files, small
+ones are often better written as \c{.COM} files. \c{.COM} files are
+pure binary, and therefore most easily produced using the \c{bin}
+output format.
+
+
+\S{combinfmt} Using the \c{bin} Format To Generate \c{.COM} Files
+
+\c{.COM} files expect to be loaded at offset \c{100h} into their
+segment (though the segment may change). Execution then begins at
+\I\c{ORG}\c{100h}, i.e. right at the start of the program. So to
+write a \c{.COM} program, you would create a source file looking
+like
+
+\c         org 100h
+\c
+\c section .text
+\c
+\c start:
+\c         ; put your code here
+\c
+\c section .data
+\c
+\c         ; put data items here
+\c
+\c section .bss
+\c
+\c         ; put uninitialized data here
+
+The \c{bin} format puts the \c{.text} section first in the file, so
+you can declare data or BSS items before beginning to write code if
+you want to and the code will still end up at the front of the file
+where it belongs.
+
+The BSS (uninitialized data) section does not take up space in the
+\c{.COM} file itself: instead, addresses of BSS items are resolved
+to point at space beyond the end of the file, on the grounds that
+this will be free memory when the program is run. Therefore you
+should not rely on your BSS being initialized to all zeros when you
+run.
+
+To assemble the above program, you should use a command line like
+
+\c nasm myprog.asm -fbin -o myprog.com
+
+The \c{bin} format would produce a file called \c{myprog} if no
+explicit output file name were specified, so you have to override it
+and give the desired file name.
+
+
+\S{comobjfmt} Using the \c{obj} Format To Generate \c{.COM} Files
+
+If you are writing a \c{.COM} program as more than one module, you
+may wish to assemble several \c{.OBJ} files and link them together
+into a \c{.COM} program. You can do this, provided you have a linker
+capable of outputting \c{.COM} files directly (\i{TLINK} does this),
+or alternatively a converter program such as \i\c{EXE2BIN} to
+transform the \c{.EXE} file output from the linker into a \c{.COM}
+file.
+
+If you do this, you need to take care of several things:
+
+\b The first object file containing code should start its code
+segment with a line like \c{RESB 100h}. This is to ensure that the
+code begins at offset \c{100h} relative to the beginning of the code
+segment, so that the linker or converter program does not have to
+adjust address references within the file when generating the
+\c{.COM} file. Other assemblers use an \i\c{ORG} directive for this
+purpose, but \c{ORG} in NASM is a format-specific directive to the
+\c{bin} output format, and does not mean the same thing as it does
+in MASM-compatible assemblers.
+
+\b You don't need to define a stack segment.
+
+\b All your segments should be in the same group, so that every time
+your code or data references a symbol offset, all offsets are
+relative to the same segment base. This is because, when a \c{.COM}
+file is loaded, all the segment registers contain the same value.
+
+
+\H{sysfiles} Producing \i\c{.SYS} Files
+
+\i{MS-DOS device drivers} - \c{.SYS} files - are pure binary files,
+similar to \c{.COM} files, except that they start at origin zero
+rather than \c{100h}. Therefore, if you are writing a device driver
+using the \c{bin} format, you do not need the \c{ORG} directive,
+since the default origin for \c{bin} is zero. Similarly, if you are
+using \c{obj}, you do not need the \c{RESB 100h} at the start of
+your code segment.
+
+\c{.SYS} files start with a header structure, containing pointers to
+the various routines inside the driver which do the work. This
+structure should be defined at the start of the code segment, even
+though it is not actually code.
+
+For more information on the format of \c{.SYS} files, and the data
+which has to go in the header structure, a list of books is given in
+the Frequently Asked Questions list for the newsgroup
+\W{news:comp.os.msdos.programmer}\i\c{comp.os.msdos.programmer}.
+
+
+\H{16c} Interfacing to 16-bit C Programs
+
+This section covers the basics of writing assembly routines that
+call, or are called from, C programs. To do this, you would
+typically write an assembly module as a \c{.OBJ} file, and link it
+with your C modules to produce a \i{mixed-language program}.
+
+
+\S{16cunder} External Symbol Names
+
+\I{C symbol names}\I{underscore, in C symbols}C compilers have the
+convention that the names of all global symbols (functions or data)
+they define are formed by prefixing an underscore to the name as it
+appears in the C program. So, for example, the function a C
+programmer thinks of as \c{printf} appears to an assembly language
+programmer as \c{_printf}. This means that in your assembly
+programs, you can define symbols without a leading underscore, and
+not have to worry about name clashes with C symbols.
+
+If you find the underscores inconvenient, you can define macros to
+replace the \c{GLOBAL} and \c{EXTERN} directives as follows:
+
+\c %macro  cglobal 1
+\c
+\c   global  _%1
+\c   %define %1 _%1
+\c
+\c %endmacro
+\c
+\c %macro  cextern 1
+\c
+\c   extern  _%1
+\c   %define %1 _%1
+\c
+\c %endmacro
+
+(These forms of the macros only take one argument at a time; a
+\c{%rep} construct could solve this.)
+
+If you then declare an external like this:
+
+\c cextern printf
+
+then the macro will expand it as
+
+\c extern  _printf
+\c %define printf _printf
+
+Thereafter, you can reference \c{printf} as if it was a symbol, and
+the preprocessor will put the leading underscore on where necessary.
+
+The \c{cglobal} macro works similarly. You must use \c{cglobal}
+before defining the symbol in question, but you would have had to do
+that anyway if you used \c{GLOBAL}.
+
+Also see \k{opt-pfix}.
+
+\S{16cmodels} \i{Memory Models}
+
+NASM contains no mechanism to support the various C memory models
+directly; you have to keep track yourself of which one you are
+writing for. This means you have to keep track of the following
+things:
+
+\b In models using a single code segment (tiny, small and compact),
+functions are near. This means that function pointers, when stored
+in data segments or pushed on the stack as function arguments, are
+16 bits long and contain only an offset field (the \c{CS} register
+never changes its value, and always gives the segment part of the
+full function address), and that functions are called using ordinary
+near \c{CALL} instructions and return using \c{RETN} (which, in
+NASM, is synonymous with \c{RET} anyway). This means both that you
+should write your own routines to return with \c{RETN}, and that you
+should call external C routines with near \c{CALL} instructions.
+
+\b In models using more than one code segment (medium, large and
+huge), functions are far. This means that function pointers are 32
+bits long (consisting of a 16-bit offset followed by a 16-bit
+segment), and that functions are called using \c{CALL FAR} (or
+\c{CALL seg:offset}) and return using \c{RETF}. Again, you should
+therefore write your own routines to return with \c{RETF} and use
+\c{CALL FAR} to call external routines.
+
+\b In models using a single data segment (tiny, small and medium),
+data pointers are 16 bits long, containing only an offset field (the
+\c{DS} register doesn't change its value, and always gives the
+segment part of the full data item address).
+
+\b In models using more than one data segment (compact, large and
+huge), data pointers are 32 bits long, consisting of a 16-bit offset
+followed by a 16-bit segment. You should still be careful not to
+modify \c{DS} in your routines without restoring it afterwards, but
+\c{ES} is free for you to use to access the contents of 32-bit data
+pointers you are passed.
+
+\b The huge memory model allows single data items to exceed 64K in
+size. In all other memory models, you can access the whole of a data
+item just by doing arithmetic on the offset field of the pointer you
+are given, whether a segment field is present or not; in huge model,
+you have to be more careful of your pointer arithmetic.
+
+\b In most memory models, there is a \e{default} data segment, whose
+segment address is kept in \c{DS} throughout the program. This data
+segment is typically the same segment as the stack, kept in \c{SS},
+so that functions' local variables (which are stored on the stack)
+and global data items can both be accessed easily without changing
+\c{DS}. Particularly large data items are typically stored in other
+segments. However, some memory models (though not the standard
+ones, usually) allow the assumption that \c{SS} and \c{DS} hold the
+same value to be removed. Be careful about functions' local
+variables in this latter case.
+
+In models with a single code segment, the segment is called
+\i\c{_TEXT}, so your code segment must also go by this name in order
+to be linked into the same place as the main code segment. In models
+with a single data segment, or with a default data segment, it is
+called \i\c{_DATA}.
+
+
+\S{16cfunc} Function Definitions and Function Calls
+
+\I{functions, C calling convention}The \i{C calling convention} in
+16-bit programs is as follows. In the following description, the
+words \e{caller} and \e{callee} are used to denote the function
+doing the calling and the function which gets called.
+
+\b The caller pushes the function's parameters on the stack, one
+after another, in reverse order (right to left, so that the first
+argument specified to the function is pushed last).
+
+\b The caller then executes a \c{CALL} instruction to pass control
+to the callee. This \c{CALL} is either near or far depending on the
+memory model.
+
+\b The callee receives control, and typically (although this is not
+actually necessary, in functions which do not need to access their
+parameters) starts by saving the value of \c{SP} in \c{BP} so as to
+be able to use \c{BP} as a base pointer to find its parameters on
+the stack. However, the caller was probably doing this too, so part
+of the calling convention states that \c{BP} must be preserved by
+any C function. Hence the callee, if it is going to set up \c{BP} as
+a \i\e{frame pointer}, must push the previous value first.
+
+\b The callee may then access its parameters relative to \c{BP}.
+The word at \c{BP} holds the previous value of \c{BP} as it was
+pushed; the next word, at \c{BP+2}, holds the offset part of the
+return address, pushed implicitly by \c{CALL}. In a small-model
+(near) function, the parameters start after that, at \c{BP+4}; in
+a large-model (far) function, the segment part of the return address
+lives at \c{BP+4}, and the parameters begin at \c{BP+6}. The
+leftmost parameter of the function, since it was pushed last, is
+accessible at this offset from \c{BP}; the others follow, at
+successively greater offsets. Thus, in a function such as \c{printf}
+which takes a variable number of parameters, the pushing of the
+parameters in reverse order means that the function knows where to
+find its first parameter, which tells it the number and type of the
+remaining ones.
+
+\b The callee may also wish to decrease \c{SP} further, so as to
+allocate space on the stack for local variables, which will then be
+accessible at negative offsets from \c{BP}.
+
+\b The callee, if it wishes to return a value to the caller, should
+leave the value in \c{AL}, \c{AX} or \c{DX:AX} depending on the size
+of the value. Floating-point results are sometimes (depending on the
+compiler) returned in \c{ST0}.
+
+\b Once the callee has finished processing, it restores \c{SP} from
+\c{BP} if it had allocated local stack space, then pops the previous
+value of \c{BP}, and returns via \c{RETN} or \c{RETF} depending on
+memory model.
+
+\b When the caller regains control from the callee, the function
+parameters are still on the stack, so it typically adds an immediate
+constant to \c{SP} to remove them (instead of executing a number of
+slow \c{POP} instructions). Thus, if a function is accidentally
+called with the wrong number of parameters due to a prototype
+mismatch, the stack will still be returned to a sensible state since
+the caller, which \e{knows} how many parameters it pushed, does the
+removing.
+
+It is instructive to compare this calling convention with that for
+Pascal programs (described in \k{16bpfunc}). Pascal has a simpler
+convention, since no functions have variable numbers of parameters.
+Therefore the callee knows how many parameters it should have been
+passed, and is able to deallocate them from the stack itself by
+passing an immediate argument to the \c{RET} or \c{RETF}
+instruction, so the caller does not have to do it. Also, the
+parameters are pushed in left-to-right order, not right-to-left,
+which means that a compiler can give better guarantees about
+sequence points without performance suffering.
+
+Thus, you would define a function in C style in the following way.
+The following example is for small model:
+
+\c global  _myfunc
+\c
+\c _myfunc:
+\c         push    bp
+\c         mov     bp,sp
+\c         sub     sp,0x40         ; 64 bytes of local stack space
+\c         mov     bx,bp+4       ; first parameter to function
+\c
+\c         ; some more code
+\c
+\c         mov     sp,bp           ; undo "sub sp,0x40" above
+\c         pop     bp
+\c         ret
+
+For a large-model function, you would replace \c{RET} by \c{RETF},
+and look for the first parameter at \c{BP+6} instead of
+\c{BP+4}. Of course, if one of the parameters is a pointer, then
+the offsets of \e{subsequent} parameters will change depending on
+the memory model as well: far pointers take up four bytes on the
+stack when passed as a parameter, whereas near pointers take up two.
+
+At the other end of the process, to call a C function from your
+assembly code, you would do something like this:
+
+\c extern  _printf
+\c
+\c       ; and then, further down...
+\c
+\c       push    word myint        ; one of my integer variables
+\c       push    word mystring       ; pointer into my data segment
+\c       call    _printf
+\c       add     sp,byte 4           ; `byte' saves space
+\c
+\c       ; then those data items...
+\c
+\c segment _DATA
+\c
+\c myint         dw    1234
+\c mystring      db    'This number -> %d <- should be 1234',10,0
+
+This piece of code is the small-model assembly equivalent of the C
+code
+
+\c     int myint = 1234;
+\c     printf("This number -> %d <- should be 1234\n", myint);
+
+In large model, the function-call code might look more like this. In
+this example, it is assumed that \c{DS} already holds the segment
+base of the segment \c{_DATA}. If not, you would have to initialize
+it first.
+
+\c       push    word myint
+\c       push    word seg mystring   ; Now push the segment, and...
+\c       push    word mystring       ; ... offset of "mystring"
+\c       call    far _printf
+\c       add    sp,byte 6
+
+The integer value still takes up one word on the stack, since large
+model does not affect the size of the \c{int} data type. The first
+argument (pushed last) to \c{printf}, however, is a data pointer,
+and therefore has to contain a segment and offset part. The segment
+should be stored second in memory, and therefore must be pushed
+first. (Of course, \c{PUSH DS} would have been a shorter instruction
+than \c{PUSH WORD SEG mystring}, if \c{DS} was set up as the above
+example assumed.) Then the actual call becomes a far call, since
+functions expect far calls in large model; and \c{SP} has to be
+increased by 6 rather than 4 afterwards to make up for the extra
+word of parameters.
+
+
+\S{16cdata} Accessing Data Items
+
+To get at the contents of C variables, or to declare variables which
+C can access, you need only declare the names as \c{GLOBAL} or
+\c{EXTERN}. (Again, the names require leading underscores, as stated
+in \k{16cunder}.) Thus, a C variable declared as \c{int i} can be
+accessed from assembler as
+
+\c extern _i
+\c
+\c         mov ax,_i
+
+And to declare your own integer variable which C programs can access
+as \c{extern int j}, you do this (making sure you are assembling in
+the \c{_DATA} segment, if necessary):
+
+\c global  _j
+\c
+\c _j      dw      0
+
+To access a C array, you need to know the size of the components of
+the array. For example, \c{int} variables are two bytes long, so if
+a C program declares an array as \c{int a10}, you can access
+\c{a3} by coding \c{mov ax,_a+6}. (The byte offset 6 is obtained
+by multiplying the desired array index, 3, by the size of the array
+element, 2.) The sizes of the C base types in 16-bit compilers are:
+1 for \c{char}, 2 for \c{short} and \c{int}, 4 for \c{long} and
+\c{float}, and 8 for \c{double}.
+
+To access a C \i{data structure}, you need to know the offset from
+the base of the structure to the field you are interested in. You
+can either do this by converting the C structure definition into a
+NASM structure definition (using \i\c{STRUC}), or by calculating the
+one offset and using just that.
+
+To do either of these, you should read your C compiler's manual to
+find out how it organizes data structures. NASM gives no special
+alignment to structure members in its own \c{STRUC} macro, so you
+have to specify alignment yourself if the C compiler generates it.
+Typically, you might find that a structure like
+
+\c struct {
+\c     char c;
+\c     int i;
+\c } foo;
+
+might be four bytes long rather than three, since the \c{int} field
+would be aligned to a two-byte boundary. However, this sort of
+feature tends to be a configurable option in the C compiler, either
+using command-line options or \c{#pragma} lines, so you have to find
+out how your own compiler does it.
+
+
+\S{16cmacro} \i\c{c16.mac}: Helper Macros for the 16-bit C Interface
+
+Included in the NASM archives, in the \I{misc subdirectory}\c{misc}
+directory, is a file \c{c16.mac} of macros. It defines three macros:
+\i\c{proc}, \i\c{arg} and \i\c{endproc}. These are intended to be
+used for C-style procedure definitions, and they automate a lot of
+the work involved in keeping track of the calling convention.
+
+(An alternative, TASM compatible form of \c{arg} is also now built
+into NASM's preprocessor. See \k{stackrel} for details.)
+
+An example of an assembly function using the macro set is given
+here:
+
+\c proc    _nearproc
+\c
+\c %$i     arg
+\c %$j     arg
+\c         mov     ax,bp + %$i
+\c         mov     bx,bp + %$j
+\c         add     ax,bx
+\c
+\c endproc
+
+This defines \c{_nearproc} to be a procedure taking two arguments,
+the first (\c{i}) an integer and the second (\c{j}) a pointer to an
+integer. It returns \c{i + *j}.
+
+Note that the \c{arg} macro has an \c{EQU} as the first line of its
+expansion, and since the label before the macro call gets prepended
+to the first line of the expanded macro, the \c{EQU} works, defining
+\c{%$i} to be an offset from \c{BP}. A context-local variable is
+used, local to the context pushed by the \c{proc} macro and popped
+by the \c{endproc} macro, so that the same argument name can be used
+in later procedures. Of course, you don't \e{have} to do that.
+
+The macro set produces code for near functions (tiny, small and
+compact-model code) by default. You can have it generate far
+functions (medium, large and huge-model code) by means of coding
+\I\c{FARCODE}\c{%define FARCODE}. This changes the kind of return
+instruction generated by \c{endproc}, and also changes the starting
+point for the argument offsets. The macro set contains no intrinsic
+dependency on whether data pointers are far or not.
+
+\c{arg} can take an optional parameter, giving the size of the
+argument. If no size is given, 2 is assumed, since it is likely that
+many function parameters will be of type \c{int}.
+
+The large-model equivalent of the above function would look like this:
+
+\c %define FARCODE
+\c
+\c proc    _farproc
+\c
+\c %$i     arg
+\c %$j     arg     4
+\c         mov     ax,bp + %$i
+\c         mov     bx,bp + %$j
+\c         mov     es,bp + %$j + 2
+\c         add     ax,bx
+\c
+\c endproc
+
+This makes use of the argument to the \c{arg} macro to define a
+parameter of size 4, because \c{j} is now a far pointer. When we
+load from \c{j}, we must load a segment and an offset.
+
+
+\H{16bp} Interfacing to \i{Borland Pascal} Programs
+
+Interfacing to Borland Pascal programs is similar in concept to
+interfacing to 16-bit C programs. The differences are:
+
+\b The leading underscore required for interfacing to C programs is
+not required for Pascal.
+
+\b The memory model is always large: functions are far, data
+pointers are far, and no data item can be more than 64K long.
+(Actually, some functions are near, but only those functions that
+are local to a Pascal unit and never called from outside it. All
+assembly functions that Pascal calls, and all Pascal functions that
+assembly routines are able to call, are far.) However, all static
+data declared in a Pascal program goes into the default data
+segment, which is the one whose segment address will be in \c{DS}
+when control is passed to your assembly code. The only things that
+do not live in the default data segment are local variables (they
+live in the stack segment) and dynamically allocated variables. All
+data \e{pointers}, however, are far.
+
+\b The function calling convention is different - described below.
+
+\b Some data types, such as strings, are stored differently.
+
+\b There are restrictions on the segment names you are allowed to
+use - Borland Pascal will ignore code or data declared in a segment
+it doesn't like the name of. The restrictions are described below.
+
+
+\S{16bpfunc} The Pascal Calling Convention
+
+\I{functions, Pascal calling convention}\I{Pascal calling
+convention}The 16-bit Pascal calling convention is as follows. In
+the following description, the words \e{caller} and \e{callee} are
+used to denote the function doing the calling and the function which
+gets called.
+
+\b The caller pushes the function's parameters on the stack, one
+after another, in normal order (left to right, so that the first
+argument specified to the function is pushed first).
+
+\b The caller then executes a far \c{CALL} instruction to pass
+control to the callee.
+
+\b The callee receives control, and typically (although this is not
+actually necessary, in functions which do not need to access their
+parameters) starts by saving the value of \c{SP} in \c{BP} so as to
+be able to use \c{BP} as a base pointer to find its parameters on
+the stack. However, the caller was probably doing this too, so part
+of the calling convention states that \c{BP} must be preserved by
+any function. Hence the callee, if it is going to set up \c{BP} as a
+\i{frame pointer}, must push the previous value first.
+
+\b The callee may then access its parameters relative to \c{BP}.
+The word at \c{BP} holds the previous value of \c{BP} as it was
+pushed. The next word, at \c{BP+2}, holds the offset part of the
+return address, and the next one at \c{BP+4} the segment part. The
+parameters begin at \c{BP+6}. The rightmost parameter of the
+function, since it was pushed last, is accessible at this offset
+from \c{BP}; the others follow, at successively greater offsets.
+
+\b The callee may also wish to decrease \c{SP} further, so as to
+allocate space on the stack for local variables, which will then be
+accessible at negative offsets from \c{BP}.
+
+\b The callee, if it wishes to return a value to the caller, should
+leave the value in \c{AL}, \c{AX} or \c{DX:AX} depending on the size
+of the value. Floating-point results are returned in \c{ST0}.
+Results of type \c{Real} (Borland's own custom floating-point data
+type, not handled directly by the FPU) are returned in \c{DX:BX:AX}.
+To return a result of type \c{String}, the caller pushes a pointer
+to a temporary string before pushing the parameters, and the callee
+places the returned string value at that location. The pointer is
+not a parameter, and should not be removed from the stack by the
+\c{RETF} instruction.
+
+\b Once the callee has finished processing, it restores \c{SP} from
+\c{BP} if it had allocated local stack space, then pops the previous
+value of \c{BP}, and returns via \c{RETF}. It uses the form of
+\c{RETF} with an immediate parameter, giving the number of bytes
+taken up by the parameters on the stack. This causes the parameters
+to be removed from the stack as a side effect of the return
+instruction.
+
+\b When the caller regains control from the callee, the function
+parameters have already been removed from the stack, so it needs to
+do nothing further.
+
+Thus, you would define a function in Pascal style, taking two
+\c{Integer}-type parameters, in the following way:
+
+\c global  myfunc
+\c
+\c myfunc: push    bp
+\c         mov     bp,sp
+\c         sub     sp,0x40         ; 64 bytes of local stack space
+\c         mov     bx,bp+8       ; first parameter to function
+\c         mov     bx,bp+6       ; second parameter to function
+\c
+\c         ; some more code
+\c
+\c         mov     sp,bp           ; undo "sub sp,0x40" above
+\c         pop     bp
+\c         retf    4               ; total size of params is 4
+
+At the other end of the process, to call a Pascal function from your
+assembly code, you would do something like this:
+
+\c extern  SomeFunc
+\c
+\c        ; and then, further down...
+\c
+\c        push   word seg mystring   ; Now push the segment, and...
+\c        push   word mystring       ; ... offset of "mystring"
+\c        push   word myint        ; one of my variables
+\c        call   far SomeFunc
+
+This is equivalent to the Pascal code
+
+\c procedure SomeFunc(String: PChar; Int: Integer);
+\c     SomeFunc(@mystring, myint);
+
+
+\S{16bpseg} Borland Pascal \I{segment names, Borland Pascal}Segment
+Name Restrictions
+
+Since Borland Pascal's internal unit file format is completely
+different from \c{OBJ}, it only makes a very sketchy job of actually
+reading and understanding the various information contained in a
+real \c{OBJ} file when it links that in. Therefore an object file
+intended to be linked to a Pascal program must obey a number of
+restrictions:
+
+\b Procedures and functions must be in a segment whose name is
+either \c{CODE}, \c{CSEG}, or something ending in \c{_TEXT}.
+
+\b initialized data must be in a segment whose name is either
+\c{CONST} or something ending in \c{_DATA}.
+
+\b Uninitialized data must be in a segment whose name is either
+\c{DATA}, \c{DSEG}, or something ending in \c{_BSS}.
+
+\b Any other segments in the object file are completely ignored.
+\c{GROUP} directives and segment attributes are also ignored.
+
+
+\S{16bpmacro} Using \i\c{c16.mac} With Pascal Programs
+
+The \c{c16.mac} macro package, described in \k{16cmacro}, can also
+be used to simplify writing functions to be called from Pascal
+programs, if you code \I\c{PASCAL}\c{%define PASCAL}. This
+definition ensures that functions are far (it implies
+\i\c{FARCODE}), and also causes procedure return instructions to be
+generated with an operand.
+
+Defining \c{PASCAL} does not change the code which calculates the
+argument offsets; you must declare your function's arguments in
+reverse order. For example:
+
+\c %define PASCAL
+\c
+\c proc    _pascalproc
+\c
+\c %$j     arg 4
+\c %$i     arg
+\c         mov     ax,bp + %$i
+\c         mov     bx,bp + %$j
+\c         mov     es,bp + %$j + 2
+\c         add     ax,bx
+\c
+\c endproc
+
+This defines the same routine, conceptually, as the example in
+\k{16cmacro}: it defines a function taking two arguments, an integer
+and a pointer to an integer, which returns the sum of the integer
+and the contents of the pointer. The only difference between this
+code and the large-model C version is that \c{PASCAL} is defined
+instead of \c{FARCODE}, and that the arguments are declared in
+reverse order.
+
+
+\C{32bit} Writing 32-bit Code (Unix, Win32, DJGPP)
+
+This chapter attempts to cover some of the common issues involved
+when writing 32-bit code, to run under \i{Win32} or Unix, or to be
+linked with C code generated by a Unix-style C compiler such as
+\i{DJGPP}. It covers how to write assembly code to interface with
+32-bit C routines, and how to write position-independent code for
+shared libraries.
+
+Almost all 32-bit code, and in particular all code running under
+\c{Win32}, \c{DJGPP} or any of the PC Unix variants, runs in \I{flat
+memory model}\e{flat} memory model. This means that the segment registers
+and paging have already been set up to give you the same 32-bit 4Gb
+address space no matter what segment you work relative to, and that
+you should ignore all segment registers completely. When writing
+flat-model application code, you never need to use a segment
+override or modify any segment register, and the code-section
+addresses you pass to \c{CALL} and \c{JMP} live in the same address
+space as the data-section addresses you access your variables by and
+the stack-section addresses you access local variables and procedure
+parameters by. Every address is 32 bits long and contains only an
+offset part.
+
+
+\H{32c} Interfacing to 32-bit C Programs
+
+A lot of the discussion in \k{16c}, about interfacing to 16-bit C
+programs, still applies when working in 32 bits. The absence of
+memory models or segmentation worries simplifies things a lot.
+
+
+\S{32cunder} External Symbol Names
+
+Most 32-bit C compilers share the convention used by 16-bit
+compilers, that the names of all global symbols (functions or data)
+they define are formed by prefixing an underscore to the name as it
+appears in the C program. However, not all of them do: the \c{ELF}
+specification states that C symbols do \e{not} have a leading
+underscore on their assembly-language names.
+
+The older Linux \c{a.out} C compiler, all \c{Win32} compilers,
+\c{DJGPP}, and \c{NetBSD} and \c{FreeBSD}, all use the leading
+underscore; for these compilers, the macros \c{cextern} and
+\c{cglobal}, as given in \k{16cunder}, will still work. For \c{ELF},
+though, the leading underscore should not be used.
+
+See also \k{opt-pfix}.
+
+\S{32cfunc} Function Definitions and Function Calls
+
+\I{functions, C calling convention}The \i{C calling convention}
+in 32-bit programs is as follows. In the following description,
+the words \e{caller} and \e{callee} are used to denote
+the function doing the calling and the function which gets called.
+
+\b The caller pushes the function's parameters on the stack, one
+after another, in reverse order (right to left, so that the first
+argument specified to the function is pushed last).
+
+\b The caller then executes a near \c{CALL} instruction to pass
+control to the callee.
+
+\b The callee receives control, and typically (although this is not
+actually necessary, in functions which do not need to access their
+parameters) starts by saving the value of \c{ESP} in \c{EBP} so as
+to be able to use \c{EBP} as a base pointer to find its parameters
+on the stack. However, the caller was probably doing this too, so
+part of the calling convention states that \c{EBP} must be preserved
+by any C function. Hence the callee, if it is going to set up
+\c{EBP} as a \i{frame pointer}, must push the previous value first.
+
+\b The callee may then access its parameters relative to \c{EBP}.
+The doubleword at \c{EBP} holds the previous value of \c{EBP} as
+it was pushed; the next doubleword, at \c{EBP+4}, holds the return
+address, pushed implicitly by \c{CALL}. The parameters start after
+that, at \c{EBP+8}. The leftmost parameter of the function, since
+it was pushed last, is accessible at this offset from \c{EBP}; the
+others follow, at successively greater offsets. Thus, in a function
+such as \c{printf} which takes a variable number of parameters, the
+pushing of the parameters in reverse order means that the function
+knows where to find its first parameter, which tells it the number
+and type of the remaining ones.
+
+\b The callee may also wish to decrease \c{ESP} further, so as to
+allocate space on the stack for local variables, which will then be
+accessible at negative offsets from \c{EBP}.
+
+\b The callee, if it wishes to return a value to the caller, should
+leave the value in \c{AL}, \c{AX} or \c{EAX} depending on the size
+of the value. Floating-point results are typically returned in
+\c{ST0}.
+
+\b Once the callee has finished processing, it restores \c{ESP} from
+\c{EBP} if it had allocated local stack space, then pops the previous
+value of \c{EBP}, and returns via \c{RET} (equivalently, \c{RETN}).
+
+\b When the caller regains control from the callee, the function
+parameters are still on the stack, so it typically adds an immediate
+constant to \c{ESP} to remove them (instead of executing a number of
+slow \c{POP} instructions). Thus, if a function is accidentally
+called with the wrong number of parameters due to a prototype
+mismatch, the stack will still be returned to a sensible state since
+the caller, which \e{knows} how many parameters it pushed, does the
+removing.
+
+There is an alternative calling convention used by Win32 programs
+for Windows API calls, and also for functions called \e{by} the
+Windows API such as window procedures: they follow what Microsoft
+calls the \c{__stdcall} convention. This is slightly closer to the
+Pascal convention, in that the callee clears the stack by passing a
+parameter to the \c{RET} instruction. However, the parameters are
+still pushed in right-to-left order.
+
+Thus, you would define a function in C style in the following way:
+
+\c global  _myfunc
+\c
+\c _myfunc:
+\c         push    ebp
+\c         mov     ebp,esp
+\c         sub     esp,0x40        ; 64 bytes of local stack space
+\c         mov     ebx,ebp+8     ; first parameter to function
+\c
+\c         ; some more code
+\c
+\c         leave                   ; mov esp,ebp / pop ebp
+\c         ret
+
+At the other end of the process, to call a C function from your
+assembly code, you would do something like this:
+
+\c extern  _printf
+\c
+\c         ; and then, further down...
+\c
+\c         push    dword myint   ; one of my integer variables
+\c         push    dword mystring  ; pointer into my data segment
+\c         call    _printf
+\c         add     esp,byte 8      ; `byte' saves space
+\c
+\c         ; then those data items...
+\c
+\c segment _DATA
+\c
+\c myint       dd   1234
+\c mystring    db   'This number -> %d <- should be 1234',10,0
+
+This piece of code is the assembly equivalent of the C code
+
+\c     int myint = 1234;
+\c     printf("This number -> %d <- should be 1234\n", myint);
+
+
+\S{32cdata} Accessing Data Items
+
+To get at the contents of C variables, or to declare variables which
+C can access, you need only declare the names as \c{GLOBAL} or
+\c{EXTERN}. (Again, the names require leading underscores, as stated
+in \k{32cunder}.) Thus, a C variable declared as \c{int i} can be
+accessed from assembler as
+
+\c           extern _i
+\c           mov eax,_i
+
+And to declare your own integer variable which C programs can access
+as \c{extern int j}, you do this (making sure you are assembling in
+the \c{_DATA} segment, if necessary):
+
+\c           global _j
+\c _j        dd 0
+
+To access a C array, you need to know the size of the components of
+the array. For example, \c{int} variables are four bytes long, so if
+a C program declares an array as \c{int a10}, you can access
+\c{a3} by coding \c{mov ax,_a+12}. (The byte offset 12 is obtained
+by multiplying the desired array index, 3, by the size of the array
+element, 4.) The sizes of the C base types in 32-bit compilers are:
+1 for \c{char}, 2 for \c{short}, 4 for \c{int}, \c{long} and
+\c{float}, and 8 for \c{double}. Pointers, being 32-bit addresses,
+are also 4 bytes long.
+
+To access a C \i{data structure}, you need to know the offset from
+the base of the structure to the field you are interested in. You
+can either do this by converting the C structure definition into a
+NASM structure definition (using \c{STRUC}), or by calculating the
+one offset and using just that.
+
+To do either of these, you should read your C compiler's manual to
+find out how it organizes data structures. NASM gives no special
+alignment to structure members in its own \i\c{STRUC} macro, so you
+have to specify alignment yourself if the C compiler generates it.
+Typically, you might find that a structure like
+
+\c struct {
+\c     char c;
+\c     int i;
+\c } foo;
+
+might be eight bytes long rather than five, since the \c{int} field
+would be aligned to a four-byte boundary. However, this sort of
+feature is sometimes a configurable option in the C compiler, either
+using command-line options or \c{#pragma} lines, so you have to find
+out how your own compiler does it.
+
+
+\S{32cmacro} \i\c{c32.mac}: Helper Macros for the 32-bit C Interface
+
+Included in the NASM archives, in the \I{misc directory}\c{misc}
+directory, is a file \c{c32.mac} of macros. It defines three macros:
+\i\c{proc}, \i\c{arg} and \i\c{endproc}. These are intended to be
+used for C-style procedure definitions, and they automate a lot of
+the work involved in keeping track of the calling convention.
+
+An example of an assembly function using the macro set is given
+here:
+
+\c proc    _proc32
+\c
+\c %$i     arg
+\c %$j     arg
+\c         mov     eax,ebp + %$i
+\c         mov     ebx,ebp + %$j
+\c         add     eax,ebx
+\c
+\c endproc
+
+This defines \c{_proc32} to be a procedure taking two arguments, the
+first (\c{i}) an integer and the second (\c{j}) a pointer to an
+integer. It returns \c{i + *j}.
+
+Note that the \c{arg} macro has an \c{EQU} as the first line of its
+expansion, and since the label before the macro call gets prepended
+to the first line of the expanded macro, the \c{EQU} works, defining
+\c{%$i} to be an offset from \c{BP}. A context-local variable is
+used, local to the context pushed by the \c{proc} macro and popped
+by the \c{endproc} macro, so that the same argument name can be used
+in later procedures. Of course, you don't \e{have} to do that.
+
+\c{arg} can take an optional parameter, giving the size of the
+argument. If no size is given, 4 is assumed, since it is likely that
+many function parameters will be of type \c{int} or pointers.
+
+
+\H{picdll} Writing NetBSD/FreeBSD/OpenBSD and Linux/ELF \i{Shared
+Libraries}
+
+\c{ELF} replaced the older \c{a.out} object file format under Linux
+because it contains support for \i{position-independent code}
+(\i{PIC}), which makes writing shared libraries much easier. NASM
+supports the \c{ELF} position-independent code features, so you can
+write Linux \c{ELF} shared libraries in NASM.
+
+\i{NetBSD}, and its close cousins \i{FreeBSD} and \i{OpenBSD}, take
+a different approach by hacking PIC support into the \c{a.out}
+format. NASM supports this as the \i\c{aoutb} output format, so you
+can write \i{BSD} shared libraries in NASM too.
+
+The operating system loads a PIC shared library by memory-mapping
+the library file at an arbitrarily chosen point in the address space
+of the running process. The contents of the library's code section
+must therefore not depend on where it is loaded in memory.
+
+Therefore, you cannot get at your variables by writing code like
+this:
+
+\c         mov     eax,myvar             ; WRONG
+
+Instead, the linker provides an area of memory called the
+\i\e{global offset table}, or \i{GOT}; the GOT is situated at a
+constant distance from your library's code, so if you can find out
+where your library is loaded (which is typically done using a
+\c{CALL} and \c{POP} combination), you can obtain the address of the
+GOT, and you can then load the addresses of your variables out of
+linker-generated entries in the GOT.
+
+The \e{data} section of a PIC shared library does not have these
+restrictions: since the data section is writable, it has to be
+copied into memory anyway rather than just paged in from the library
+file, so as long as it's being copied it can be relocated too. So
+you can put ordinary types of relocation in the data section without
+too much worry (but see \k{picglobal} for a caveat).
+
+
+\S{picgot} Obtaining the Address of the GOT
+
+Each code module in your shared library should define the GOT as an
+external symbol:
+
+\c extern  _GLOBAL_OFFSET_TABLE_   ; in ELF
+\c extern  __GLOBAL_OFFSET_TABLE_  ; in BSD a.out
+
+At the beginning of any function in your shared library which plans
+to access your data or BSS sections, you must first calculate the
+address of the GOT. This is typically done by writing the function
+in this form:
+
+\c func:   push    ebp
+\c         mov     ebp,esp
+\c         push    ebx
+\c         call    .get_GOT
+\c .get_GOT:
+\c         pop     ebx
+\c         add     ebx,_GLOBAL_OFFSET_TABLE_+$$-.get_GOT wrt ..gotpc
+\c
+\c         ; the function body comes here
+\c
+\c         mov     ebx,ebp-4
+\c         mov     esp,ebp
+\c         pop     ebp
+\c         ret
+
+(For BSD, again, the symbol \c{_GLOBAL_OFFSET_TABLE} requires a
+second leading underscore.)
+
+The first two lines of this function are simply the standard C
+prologue to set up a stack frame, and the last three lines are
+standard C function epilogue. The third line, and the fourth to last
+line, save and restore the \c{EBX} register, because PIC shared
+libraries use this register to store the address of the GOT.
+
+The interesting bit is the \c{CALL} instruction and the following
+two lines. The \c{CALL} and \c{POP} combination obtains the address
+of the label \c{.get_GOT}, without having to know in advance where
+the program was loaded (since the \c{CALL} instruction is encoded
+relative to the current position). The \c{ADD} instruction makes use
+of one of the special PIC relocation types: \i{GOTPC relocation}.
+With the \i\c{WRT ..gotpc} qualifier specified, the symbol
+referenced (here \c{_GLOBAL_OFFSET_TABLE_}, the special symbol
+assigned to the GOT) is given as an offset from the beginning of the
+section. (Actually, \c{ELF} encodes it as the offset from the operand
+field of the \c{ADD} instruction, but NASM simplifies this
+deliberately, so you do things the same way for both \c{ELF} and
+\c{BSD}.) So the instruction then \e{adds} the beginning of the section,
+to get the real address of the GOT, and subtracts the value of
+\c{.get_GOT} which it knows is in \c{EBX}. Therefore, by the time
+that instruction has finished, \c{EBX} contains the address of the GOT.
+
+If you didn't follow that, don't worry: it's never necessary to
+obtain the address of the GOT by any other means, so you can put
+those three instructions into a macro and safely ignore them:
+
+\c %macro  get_GOT 0
+\c
+\c         call    %%getgot
+\c   %%getgot:
+\c         pop     ebx
+\c         add     ebx,_GLOBAL_OFFSET_TABLE_+$$-%%getgot wrt ..gotpc
+\c
+\c %endmacro
+
+\S{piclocal} Finding Your Local Data Items
+
+Having got the GOT, you can then use it to obtain the addresses of
+your data items. Most variables will reside in the sections you have
+declared; they can be accessed using the \I{GOTOFF
+relocation}\c{..gotoff} special \I\c{WRT ..gotoff}\c{WRT} type. The
+way this works is like this:
+
+\c         lea     eax,ebx+myvar wrt ..gotoff
+
+The expression \c{myvar wrt ..gotoff} is calculated, when the shared
+library is linked, to be the offset to the local variable \c{myvar}
+from the beginning of the GOT. Therefore, adding it to \c{EBX} as
+above will place the real address of \c{myvar} in \c{EAX}.
+
+If you declare variables as \c{GLOBAL} without specifying a size for
+them, they are shared between code modules in the library, but do
+not get exported from the library to the program that loaded it.
+They will still be in your ordinary data and BSS sections, so you
+can access them in the same way as local variables, using the above
+\c{..gotoff} mechanism.
+
+Note that due to a peculiarity of the way BSD \c{a.out} format
+handles this relocation type, there must be at least one non-local
+symbol in the same section as the address you're trying to access.
+
+
+\S{picextern} Finding External and Common Data Items
+
+If your library needs to get at an external variable (external to
+the \e{library}, not just to one of the modules within it), you must
+use the \I{GOT relocations}\I\c{WRT ..got}\c{..got} type to get at
+it. The \c{..got} type, instead of giving you the offset from the
+GOT base to the variable, gives you the offset from the GOT base to
+a GOT \e{entry} containing the address of the variable. The linker
+will set up this GOT entry when it builds the library, and the
+dynamic linker will place the correct address in it at load time. So
+to obtain the address of an external variable \c{extvar} in \c{EAX},
+you would code
+
+\c         mov     eax,ebx+extvar wrt ..got
+
+This loads the address of \c{extvar} out of an entry in the GOT. The
+linker, when it builds the shared library, collects together every
+relocation of type \c{..got}, and builds the GOT so as to ensure it
+has every necessary entry present.
+
+Common variables must also be accessed in this way.
+
+
+\S{picglobal} Exporting Symbols to the Library User
+
+If you want to export symbols to the user of the library, you have
+to declare whether they are functions or data, and if they are data,
+you have to give the size of the data item. This is because the
+dynamic linker has to build \I{PLT}\i{procedure linkage table}
+entries for any exported functions, and also moves exported data
+items away from the library's data section in which they were
+declared.
+
+So to export a function to users of the library, you must use
+
+\c global  func:function           ; declare it as a function
+\c
+\c func:   push    ebp
+\c
+\c         ; etc.
+
+And to export a data item such as an array, you would have to code
+
+\c global  array:data array.end-array      ; give the size too
+\c
+\c array:  resd    128
+\c .end:
+
+Be careful: If you export a variable to the library user, by
+declaring it as \c{GLOBAL} and supplying a size, the variable will
+end up living in the data section of the main program, rather than
+in your library's data section, where you declared it. So you will
+have to access your own global variable with the \c{..got} mechanism
+rather than \c{..gotoff}, as if it were external (which,
+effectively, it has become).
+
+Equally, if you need to store the address of an exported global in
+one of your data sections, you can't do it by means of the standard
+sort of code:
+
+\c dataptr:        dd      global_data_item        ; WRONG
+
+NASM will interpret this code as an ordinary relocation, in which
+\c{global_data_item} is merely an offset from the beginning of the
+\c{.data} section (or whatever); so this reference will end up
+pointing at your data section instead of at the exported global
+which resides elsewhere.
+
+Instead of the above code, then, you must write
+
+\c dataptr:        dd      global_data_item wrt ..sym
+
+which makes use of the special \c{WRT} type \I\c{WRT ..sym}\c{..sym}
+to instruct NASM to search the symbol table for a particular symbol
+at that address, rather than just relocating by section base.
+
+Either method will work for functions: referring to one of your
+functions by means of
+
+\c funcptr:        dd      my_function
+
+will give the user the address of the code you wrote, whereas
+
+\c funcptr:        dd      my_function wrt ..sym
+
+will give the address of the procedure linkage table for the
+function, which is where the calling program will \e{believe} the
+function lives. Either address is a valid way to call the function.
+
+
+\S{picproc} Calling Procedures Outside the Library
+
+Calling procedures outside your shared library has to be done by
+means of a \i\e{procedure linkage table}, or \i{PLT}. The PLT is
+placed at a known offset from where the library is loaded, so the
+library code can make calls to the PLT in a position-independent
+way. Within the PLT there is code to jump to offsets contained in
+the GOT, so function calls to other shared libraries or to routines
+in the main program can be transparently passed off to their real
+destinations.
+
+To call an external routine, you must use another special PIC
+relocation type, \I{PLT relocations}\i\c{WRT ..plt}. This is much
+easier than the GOT-based ones: you simply replace calls such as
+\c{CALL printf} with the PLT-relative version \c{CALL printf WRT
+..plt}.
+
+
+\S{link} Generating the Library File
+
+Having written some code modules and assembled them to \c{.o} files,
+you then generate your shared library with a command such as
+
+\c ld -shared -o library.so module1.o module2.o       # for ELF
+\c ld -Bshareable -o library.so module1.o module2.o   # for BSD
+
+For ELF, if your shared library is going to reside in system
+directories such as \c{/usr/lib} or \c{/lib}, it is usually worth
+using the \i\c{-soname} flag to the linker, to store the final
+library file name, with a version number, into the library:
+
+\c ld -shared -soname library.so.1 -o library.so.1.2 *.o
+
+You would then copy \c{library.so.1.2} into the library directory,
+and create \c{library.so.1} as a symbolic link to it.
+
+
+\C{mixsize} Mixing 16- and 32-bit Code
+
+This chapter tries to cover some of the issues, largely related to
+unusual forms of addressing and jump instructions, encountered when
+writing operating system code such as protected-mode initialization
+routines, which require code that operates in mixed segment sizes,
+such as code in a 16-bit segment trying to modify data in a 32-bit
+one, or jumps between different-size segments.
+
+
+\H{mixjump} Mixed-Size Jumps\I{jumps, mixed-size}
+
+\I{operating system, writing}\I{writing operating systems}The most
+common form of \i{mixed-size instruction} is the one used when
+writing a 32-bit OS: having done your setup in 16-bit mode, such as
+loading the kernel, you then have to boot it by switching into
+protected mode and jumping to the 32-bit kernel start address. In a
+fully 32-bit OS, this tends to be the \e{only} mixed-size
+instruction you need, since everything before it can be done in pure
+16-bit code, and everything after it can be pure 32-bit.
+
+This jump must specify a 48-bit far address, since the target
+segment is a 32-bit one. However, it must be assembled in a 16-bit
+segment, so just coding, for example,
+
+\c         jmp     0x1234:0x56789ABC       ; wrong!
+
+will not work, since the offset part of the address will be
+truncated to \c{0x9ABC} and the jump will be an ordinary 16-bit far
+one.
+
+The Linux kernel setup code gets round the inability of \c{as86} to
+generate the required instruction by coding it manually, using
+\c{DB} instructions. NASM can go one better than that, by actually
+generating the right instruction itself. Here's how to do it right:
+
+\c         jmp     dword 0x1234:0x56789ABC         ; right
+
+\I\c{JMP DWORD}The \c{DWORD} prefix (strictly speaking, it should
+come \e{after} the colon, since it is declaring the \e{offset} field
+to be a doubleword; but NASM will accept either form, since both are
+unambiguous) forces the offset part to be treated as far, in the
+assumption that you are deliberately writing a jump from a 16-bit
+segment to a 32-bit one.
+
+You can do the reverse operation, jumping from a 32-bit segment to a
+16-bit one, by means of the \c{WORD} prefix:
+
+\c         jmp     word 0x8765:0x4321      ; 32 to 16 bit
+
+If the \c{WORD} prefix is specified in 16-bit mode, or the \c{DWORD}
+prefix in 32-bit mode, they will be ignored, since each is
+explicitly forcing NASM into a mode it was in anyway.
+
+
+\H{mixaddr} Addressing Between Different-Size Segments\I{addressing,
+mixed-size}\I{mixed-size addressing}
+
+If your OS is mixed 16 and 32-bit, or if you are writing a DOS
+extender, you are likely to have to deal with some 16-bit segments
+and some 32-bit ones. At some point, you will probably end up
+writing code in a 16-bit segment which has to access data in a
+32-bit segment, or vice versa.
+
+If the data you are trying to access in a 32-bit segment lies within
+the first 64K of the segment, you may be able to get away with using
+an ordinary 16-bit addressing operation for the purpose; but sooner
+or later, you will want to do 32-bit addressing from 16-bit mode.
+
+The easiest way to do this is to make sure you use a register for
+the address, since any effective address containing a 32-bit
+register is forced to be a 32-bit address. So you can do
+
+\c         mov     eax,offset_into_32_bit_segment_specified_by_fs
+\c         mov     dword fs:eax,0x11223344
+
+This is fine, but slightly cumbersome (since it wastes an
+instruction and a register) if you already know the precise offset
+you are aiming at. The x86 architecture does allow 32-bit effective
+addresses to specify nothing but a 4-byte offset, so why shouldn't
+NASM be able to generate the best instruction for the purpose?
+
+It can. As in \k{mixjump}, you need only prefix the address with the
+\c{DWORD} keyword, and it will be forced to be a 32-bit address:
+
+\c         mov     dword fs:dword my_offset,0x11223344
+
+Also as in \k{mixjump}, NASM is not fussy about whether the
+\c{DWORD} prefix comes before or after the segment override, so
+arguably a nicer-looking way to code the above instruction is
+
+\c         mov     dword dword fs:my_offset,0x11223344
+
+Don't confuse the \c{DWORD} prefix \e{outside} the square brackets,
+which controls the size of the data stored at the address, with the
+one \c{inside} the square brackets which controls the length of the
+address itself. The two can quite easily be different:
+
+\c         mov     word dword 0x12345678,0x9ABC
+
+This moves 16 bits of data to an address specified by a 32-bit
+offset.
+
+You can also specify \c{WORD} or \c{DWORD} prefixes along with the
+\c{FAR} prefix to indirect far jumps or calls. For example:
+
+\c         call    dword far fs:word 0x4321
+
+This instruction contains an address specified by a 16-bit offset;
+it loads a 48-bit far pointer from that (16-bit segment and 32-bit
+offset), and calls that address.
+
+
+\H{mixother} Other Mixed-Size Instructions
+
+The other way you might want to access data might be using the
+string instructions (\c{LODSx}, \c{STOSx} and so on) or the
+\c{XLATB} instruction. These instructions, since they take no
+parameters, might seem to have no easy way to make them perform
+32-bit addressing when assembled in a 16-bit segment.
+
+This is the purpose of NASM's \i\c{a16}, \i\c{a32} and \i\c{a64} prefixes. If
+you are coding \c{LODSB} in a 16-bit segment but it is supposed to
+be accessing a string in a 32-bit segment, you should load the
+desired address into \c{ESI} and then code
+
+\c         a32     lodsb
+
+The prefix forces the addressing size to 32 bits, meaning that
+\c{LODSB} loads from \c{DS:ESI} instead of \c{DS:SI}. To access
+a string in a 16-bit segment when coding in a 32-bit one, the
+corresponding \c{a16} prefix can be used.
+
+The \c{a16}, \c{a32} and \c{a64} prefixes can be applied to any instruction
+in NASM's instruction table, but most of them can generate all the
+useful forms without them. The prefixes are necessary only for
+instructions with implicit addressing:
+\# \c{CMPSx} (\k{insCMPSB}),
+\# \c{SCASx} (\k{insSCASB}), \c{LODSx} (\k{insLODSB}), \c{STOSx}
+\# (\k{insSTOSB}), \c{MOVSx} (\k{insMOVSB}), \c{INSx} (\k{insINSB}),
+\# \c{OUTSx} (\k{insOUTSB}), and \c{XLATB} (\k{insXLATB}).
+\c{CMPSx}, \c{SCASx}, \c{LODSx}, \c{STOSx}, \c{MOVSx}, \c{INSx},
+\c{OUTSx}, and \c{XLATB}.
+Also, the
+various push and pop instructions (\c{PUSHA} and \c{POPF} as well as
+the more usual \c{PUSH} and \c{POP}) can accept \c{a16}, \c{a32} or \c{a64}
+prefixes to force a particular one of \c{SP}, \c{ESP} or \c{RSP} to be used
+as a stack pointer, in case the stack segment in use is a different
+size from the code segment.
+
+\c{PUSH} and \c{POP}, when applied to segment registers in 32-bit
+mode, also have the slightly odd behaviour that they push and pop 4
+bytes at a time, of which the top two are ignored and the bottom two
+give the value of the segment register being manipulated. To force
+the 16-bit behaviour of segment-register push and pop instructions,
+you can use the operand-size prefix \i\c{o16}:
+
+\c         o16 push    ss
+\c         o16 push    ds
+
+This code saves a doubleword of stack space by fitting two segment
+registers into the space which would normally be consumed by pushing
+one.
+
+(You can also use the \i\c{o32} prefix to force the 32-bit behaviour
+when in 16-bit mode, but this seems less useful.)
+
+
+\C{64bit} Writing 64-bit Code (Unix, Win64)
+
+This chapter attempts to cover some of the common issues involved when
+writing 64-bit code, to run under \i{Win64} or Unix.  It covers how to
+write assembly code to interface with 64-bit C routines, and how to
+write position-independent code for shared libraries.
+
+All 64-bit code uses a flat memory model, since segmentation is not
+available in 64-bit mode.  The one exception is the \c{FS} and \c{GS}
+registers, which still add their bases.
+
+Position independence in 64-bit mode is significantly simpler, since
+the processor supports \c{RIP}-relative addressing directly; see the
+\c{REL} keyword (\k{effaddr}).  On most 64-bit platforms, it is
+probably desirable to make that the default, using the directive
+\c{DEFAULT REL} (\k{default}).
+
+64-bit programming is relatively similar to 32-bit programming, but
+of course pointers are 64 bits long; additionally, all existing
+platforms pass arguments in registers rather than on the stack.
+Furthermore, 64-bit platforms use SSE2 by default for floating point.
+Please see the ABI documentation for your platform.
+
+64-bit platforms differ in the sizes of the C/C++ fundamental
+datatypes, not just from 32-bit platforms but from each other.  If a
+specific size data type is desired, it is probably best to use the
+types defined in the standard C header \c{<inttypes.h>}.
+
+All known 64-bit platforms except some embedded platforms require that
+the stack is 16-byte aligned at the entry to a function.  In order to
+enforce that, the stack pointer (\c{RSP}) needs to be aligned on an
+\c{odd} multiple of 8 bytes before the \c{CALL} instruction.
+
+In 64-bit mode, the default instruction size is still 32 bits.  When
+loading a value into a 32-bit register (but not an 8- or 16-bit
+register), the upper 32 bits of the corresponding 64-bit register are
+set to zero.
+
+\H{reg64} Register Names in 64-bit Mode
+
+NASM uses the following names for general-purpose registers in 64-bit
+mode, for 8-, 16-, 32- and 64-bit references, respectively:
+
+\c      AL/AH, CL/CH, DL/DH, BL/BH, SPL, BPL, SIL, DIL, R8B-R15B
+\c      AX, CX, DX, BX, SP, BP, SI, DI, R8W-R15W
+\c      EAX, ECX, EDX, EBX, ESP, EBP, ESI, EDI, R8D-R15D
+\c      RAX, RCX, RDX, RBX, RSP, RBP, RSI, RDI, R8-R15
+
+This is consistent with the AMD documentation and most other
+assemblers.  The Intel documentation, however, uses the names
+\c{R8L-R15L} for 8-bit references to the higher registers.  It is
+possible to use those names by definiting them as macros; similarly,
+if one wants to use numeric names for the low 8 registers, define them
+as macros.  The standard macro package \c{altreg} (see \k{pkg_altreg})
+can be used for this purpose.
+
+\H{id64} Immediates and Displacements in 64-bit Mode
+
+In 64-bit mode, immediates and displacements are generally only 32
+bits wide.  NASM will therefore truncate most displacements and
+immediates to 32 bits.
+
+The only instruction which takes a full \i{64-bit immediate} is:
+
+\c      MOV reg64,imm64
+
+NASM will produce this instruction whenever the programmer uses
+\c{MOV} with an immediate into a 64-bit register.  If this is not
+desirable, simply specify the equivalent 32-bit register, which will
+be automatically zero-extended by the processor, or specify the
+immediate as \c{DWORD}:
+
+\c      mov rax,foo             ; 64-bit immediate
+\c      mov rax,qword foo       ; (identical)
+\c      mov eax,foo             ; 32-bit immediate, zero-extended
+\c      mov rax,dword foo       ; 32-bit immediate, sign-extended
+
+The length of these instructions are 10, 5 and 7 bytes, respectively.
+
+If optimization is enabled and NASM can determine at assembly time
+that a shorter instruction will suffice, the shorter instruction will
+be emitted unless of course \c{STRICT QWORD} or \c{STRICT DWORD} is
+specified (see \k{strict}):
+
+\c      mov rax,1		; Assembles as "mov eax,1" (5 bytes)
+\c      mov rax,strict qword 1  ; Full 10-byte instruction
+\c	mov rax,strict dword 1	; 7-byte instruction
+\c      mov rax,symbol          ; 10 bytes, not known at assembly time
+\c      lea rax,rel symbol    ; 7 bytes, usually preferred by the ABI
+
+Note that \c{lea rax,rel symbol} is position-independent, whereas
+\c{mov rax,symbol} is not.  Most ABIs prefer or even require
+position-independent code in 64-bit mode.  However, the \c{MOV}
+instruction is able to reference a symbol anywhere in the 64-bit
+address space, whereas \c{LEA} is only able to access a symbol within
+within 2 GB of the instruction itself (see below.)
+
+The only instructions which take a full \I{64-bit displacement}64-bit
+\e{displacement} is loading or storing, using \c{MOV}, \c{AL}, \c{AX},
+\c{EAX} or \c{RAX} (but no other registers) to an absolute 64-bit address.
+Since this is a relatively rarely used instruction (64-bit code generally uses
+relative addressing), the programmer has to explicitly declare the
+displacement size as \c{ABS QWORD}:
+
+\c      default abs
+\c
+\c      mov eax,foo           ; 32-bit absolute disp, sign-extended
+\c      mov eax,a32 foo       ; 32-bit absolute disp, zero-extended
+\c      mov eax,qword foo     ; 64-bit absolute disp
+\c
+\c      default rel
+\c
+\c      mov eax,foo           ; 32-bit relative disp
+\c      mov eax,a32 foo       ; d:o, address truncated to 32 bits(!)
+\c      mov eax,qword foo     ; error
+\c      mov eax,abs qword foo ; 64-bit absolute disp
+
+A sign-extended absolute displacement can access from -2 GB to +2 GB;
+a zero-extended absolute displacement can access from 0 to 4 GB.
+
+\H{unix64} Interfacing to 64-bit C Programs (Unix)
+
+On Unix, the 64-bit ABI as well as the x32 ABI (32-bit ABI with the
+CPU in 64-bit mode) is defined by the documents at:
+
+\W{http://www.nasm.us/abi/unix64}\c{http://www.nasm.us/abi/unix64}
+
+Although written for AT&T-syntax assembly, the concepts apply equally
+well for NASM-style assembly.  What follows is a simplified summary.
+
+The first six integer arguments (from the left) are passed in \c{RDI},
+\c{RSI}, \c{RDX}, \c{RCX}, \c{R8}, and \c{R9}, in that order.
+Additional integer arguments are passed on the stack.  These
+registers, plus \c{RAX}, \c{R10} and \c{R11} are destroyed by function
+calls, and thus are available for use by the function without saving.
+
+Integer return values are passed in \c{RAX} and \c{RDX}, in that order.
+
+Floating point is done using SSE registers, except for \c{long
+double}, which is 80 bits (\c{TWORD}) on most platforms (Android is
+one exception; there \c{long double} is 64 bits and treated the same
+as \c{double}.)  Floating-point arguments are passed in \c{XMM0} to
+\c{XMM7}; return is \c{XMM0} and \c{XMM1}.  \c{long double} are passed
+on the stack, and returned in \c{ST0} and \c{ST1}.
+
+All SSE and x87 registers are destroyed by function calls.
+
+On 64-bit Unix, \c{long} is 64 bits.
+
+Integer and SSE register arguments are counted separately, so for the case of
+
+\c      void foo(long a, double b, int c)
+
+\c{a} is passed in \c{RDI}, \c{b} in \c{XMM0}, and \c{c} in \c{ESI}.
+
+\H{win64} Interfacing to 64-bit C Programs (Win64)
+
+The Win64 ABI is described by the document at:
+
+\W{http://www.nasm.us/abi/win64}\c{http://www.nasm.us/abi/win64}
+
+What follows is a simplified summary.
+
+The first four integer arguments are passed in \c{RCX}, \c{RDX},
+\c{R8} and \c{R9}, in that order.  Additional integer arguments are
+passed on the stack.  These registers, plus \c{RAX}, \c{R10} and
+\c{R11} are destroyed by function calls, and thus are available for
+use by the function without saving.
+
+Integer return values are passed in \c{RAX} only.
+
+Floating point is done using SSE registers, except for \c{long
+double}.  Floating-point arguments are passed in \c{XMM0} to \c{XMM3};
+return is \c{XMM0} only.
+
+On Win64, \c{long} is 32 bits; \c{long long} or \c{_int64} is 64 bits.
+
+Integer and SSE register arguments are counted together, so for the case of
+
+\c      void foo(long long a, double b, int c)
+
+\c{a} is passed in \c{RCX}, \c{b} in \c{XMM1}, and \c{c} in \c{R8D}.
+
+\C{trouble} Troubleshooting
+
+This chapter describes some of the common problems that users have
+been known to encounter with NASM, and answers them.  If you think you
+have found a bug in NASM, please see \k{bugs}.
+
+
+\H{problems} Common Problems
+
+\S{inefficient} NASM Generates \i{Inefficient Code}
+
+We sometimes get `bug' reports about NASM generating inefficient, or
+even `wrong', code on instructions such as \c{ADD ESP,8}. This is a
+deliberate design feature, connected to predictability of output:
+NASM, on seeing \c{ADD ESP,8}, will generate the form of the
+instruction which leaves room for a 32-bit offset. You need to code
+\I\c{BYTE}\c{ADD ESP,BYTE 8} if you want the space-efficient form of
+the instruction. This isn't a bug, it's user error: if you prefer to
+have NASM produce the more efficient code automatically enable
+optimization with the \c{-O} option (see \k{opt-O}).
+
+
+\S{jmprange} My Jumps are Out of Range\I{out of range, jumps}
+
+Similarly, people complain that when they issue \i{conditional
+jumps} (which are \c{SHORT} by default) that try to jump too far,
+NASM reports `short jump out of range' instead of making the jumps
+longer.
+
+This, again, is partly a predictability issue, but in fact has a
+more practical reason as well. NASM has no means of being told what
+type of processor the code it is generating will be run on; so it
+cannot decide for itself that it should generate \i\c{Jcc NEAR} type
+instructions, because it doesn't know that it's working for a 386 or
+above. Alternatively, it could replace the out-of-range short
+\c{JNE} instruction with a very short \c{JE} instruction that jumps
+over a \c{JMP NEAR}; this is a sensible solution for processors
+below a 386, but hardly efficient on processors which have good
+branch prediction \e{and} could have used \c{JNE NEAR} instead. So,
+once again, it's up to the user, not the assembler, to decide what
+instructions should be generated. See \k{opt-O}.
+
+
+\S{proborg} \i\c{ORG} Doesn't Work
+
+People writing \i{boot sector} programs in the \c{bin} format often
+complain that \c{ORG} doesn't work the way they'd like: in order to
+place the \c{0xAA55} signature word at the end of a 512-byte boot
+sector, people who are used to MASM tend to code
+
+\c         ORG 0
+\c
+\c         ; some boot sector code
+\c
+\c         ORG 510
+\c         DW 0xAA55
+
+This is not the intended use of the \c{ORG} directive in NASM, and
+will not work. The correct way to solve this problem in NASM is to
+use the \i\c{TIMES} directive, like this:
+
+\c         ORG 0
+\c
+\c         ; some boot sector code
+\c
+\c         TIMES 510-($-$$) DB 0
+\c         DW 0xAA55
+
+The \c{TIMES} directive will insert exactly enough zero bytes into
+the output to move the assembly point up to 510. This method also
+has the advantage that if you accidentally fill your boot sector too
+full, NASM will catch the problem at assembly time and report it, so
+you won't end up with a boot sector that you have to disassemble to
+find out what's wrong with it.
+
+
+\S{probtimes} \i\c{TIMES} Doesn't Work
+
+The other common problem with the above code is people who write the
+\c{TIMES} line as
+
+\c         TIMES 510-$ DB 0
+
+by reasoning that \c{$} should be a pure number, just like 510, so
+the difference between them is also a pure number and can happily be
+fed to \c{TIMES}.
+
+NASM is a \e{modular} assembler: the various component parts are
+designed to be easily separable for re-use, so they don't exchange
+information unnecessarily. In consequence, the \c{bin} output
+format, even though it has been told by the \c{ORG} directive that
+the \c{.text} section should start at 0, does not pass that
+information back to the expression evaluator. So from the
+evaluator's point of view, \c{$} isn't a pure number: it's an offset
+from a section base. Therefore the difference between \c{$} and 510
+is also not a pure number, but involves a section base. Values
+involving section bases cannot be passed as arguments to \c{TIMES}.
+
+The solution, as in the previous section, is to code the \c{TIMES}
+line in the form
+
+\c         TIMES 510-($-$$) DB 0
+
+in which \c{$} and \c{$$} are offsets from the same section base,
+and so their difference is a pure number. This will solve the
+problem and generate sensible code.
+
+\A{warnings} \I{warning class}\I{warning classes, list}\i{List of Warning Classes}
+
+These are the warning classes currently defined by NASM for the
+purpose of enabling, disabling and promoting to error. See \k{opt-w}
+and \k{asmdir-warning}.
+
+\& warnings.src
+
+\A{ndisasm} \i{Ndisasm}
+
+                  The Netwide Disassembler, NDISASM
+
+\H{ndisintro} Introduction
+
+
+The Netwide Disassembler is a small companion program to the Netwide
+Assembler, NASM. It seemed a shame to have an x86 assembler,
+complete with a full instruction table, and not make as much use of
+it as possible, so here's a disassembler which shares the
+instruction table (and some other bits of code) with NASM.
+
+The Netwide Disassembler does nothing except to produce
+disassemblies of \e{binary} source files. NDISASM does not have any
+understanding of object file formats, like \c{objdump}, and it will
+not understand \c{DOS .EXE} files like \c{debug} will. It just
+disassembles.
+
+
+\H{ndisrun} Running NDISASM
+
+To disassemble a file, you will typically use a command of the form
+
+\c        ndisasm -b {16|32|64} filename
+
+NDISASM can disassemble 16-, 32- or 64-bit code equally easily,
+provided of course that you remember to specify which it is to work
+with. If no \i\c{-b} switch is present, NDISASM works in 16-bit mode
+by default. The \i\c{-u} switch (for USE32) also invokes 32-bit mode.
+
+Two more command line options are \i\c{-r} which reports the version
+number of NDISASM you are running, and \i\c{-h} which gives a short
+summary of command line options.
+
+
+\S{ndiscom} Specifying the Input Origin
+
+To disassemble a \c{DOS .COM} file correctly, a disassembler must assume
+that the first instruction in the file is loaded at address \c{0x100},
+rather than at zero. NDISASM, which assumes by default that any file
+you give it is loaded at zero, will therefore need to be informed of
+this.
+
+The \i\c{-o} option allows you to declare a different origin for the
+file you are disassembling. Its argument may be expressed in any of
+the NASM numeric formats: decimal by default, if it begins with `\c{$}'
+or `\c{0x}' or ends in `\c{H}' it's \c{hex}, if it ends in `\c{Q}' it's
+\c{octal}, and if it ends in `\c{B}' it's \c{binary}.
+
+Hence, to disassemble a \c{.COM} file:
+
+\c        ndisasm -o100h filename.com
+
+will do the trick.
+
+
+\S{ndissync} Code Following Data: Synchronization
+
+Suppose you are disassembling a file which contains some data which
+isn't machine code, and \e{then} contains some machine code. NDISASM
+will faithfully plough through the data section, producing machine
+instructions wherever it can (although most of them will look
+bizarre, and some may have unusual prefixes, e.g. `\c{FS OR AX,0x240A}'),
+and generating `DB' instructions ever so often if it's totally stumped.
+Then it will reach the code section.
+
+Supposing NDISASM has just finished generating a strange machine
+instruction from part of the data section, and its file position is
+now one byte \e{before} the beginning of the code section. It's
+entirely possible that another spurious instruction will get
+generated, starting with the final byte of the data section, and
+then the correct first instruction in the code section will not be
+seen because the starting point skipped over it. This isn't really
+ideal.
+
+To avoid this, you can specify a `\i{synchronization}' point, or indeed
+as many synchronization points as you like (although NDISASM can
+only handle 2147483647 sync points internally). The definition of a sync
+point is this: NDISASM guarantees to hit sync points exactly during
+disassembly. If it is thinking about generating an instruction which
+would cause it to jump over a sync point, it will discard that
+instruction and output a `\c{db}' instead. So it \e{will} start
+disassembly exactly from the sync point, and so you \e{will} see all
+the instructions in your code section.
+
+Sync points are specified using the \i\c{-s} option: they are measured
+in terms of the program origin, not the file position. So if you
+want to synchronize after 32 bytes of a \c{.COM} file, you would have to
+do
+
+\c        ndisasm -o100h -s120h file.com
+
+rather than
+
+\c        ndisasm -o100h -s20h file.com
+
+As stated above, you can specify multiple sync markers if you need
+to, just by repeating the \c{-s} option.
+
+
+\S{ndisisync} Mixed Code and Data: Automatic (Intelligent) Synchronization
+\I\c{auto-sync}
+
+Suppose you are disassembling the boot sector of a \c{DOS} floppy (maybe
+it has a virus, and you need to understand the virus so that you
+know what kinds of damage it might have done you). Typically, this
+will contain a \c{JMP} instruction, then some data, then the rest of the
+code. So there is a very good chance of NDISASM being \e{misaligned}
+when the data ends and the code begins. Hence a sync point is
+needed.
+
+On the other hand, why should you have to specify the sync point
+manually? What you'd do in order to find where the sync point would
+be, surely, would be to read the \c{JMP} instruction, and then to use
+its target address as a sync point. So can NDISASM do that for you?
+
+The answer, of course, is yes: using either of the synonymous
+switches \i\c{-a} (for automatic sync) or \i\c{-i} (for intelligent
+sync) will enable \c{auto-sync} mode. Auto-sync mode automatically
+generates a sync point for any forward-referring PC-relative jump or
+call instruction that NDISASM encounters. (Since NDISASM is one-pass,
+if it encounters a PC-relative jump whose target has already been
+processed, there isn't much it can do about it...)
+
+Only PC-relative jumps are processed, since an absolute jump is
+either through a register (in which case NDISASM doesn't know what
+the register contains) or involves a segment address (in which case
+the target code isn't in the same segment that NDISASM is working
+in, and so the sync point can't be placed anywhere useful).
+
+For some kinds of file, this mechanism will automatically put sync
+points in all the right places, and save you from having to place
+any sync points manually. However, it should be stressed that
+auto-sync mode is \e{not} guaranteed to catch all the sync points, and
+you may still have to place some manually.
+
+Auto-sync mode doesn't prevent you from declaring manual sync
+points: it just adds automatically generated ones to the ones you
+provide. It's perfectly feasible to specify \c{-i} \e{and} some \c{-s}
+options.
+
+Another caveat with auto-sync mode is that if, by some unpleasant
+fluke, something in your data section should disassemble to a
+PC-relative call or jump instruction, NDISASM may obediently place a
+sync point in a totally random place, for example in the middle of
+one of the instructions in your code section. So you may end up with
+a wrong disassembly even if you use auto-sync. Again, there isn't
+much I can do about this. If you have problems, you'll have to use
+manual sync points, or use the \c{-k} option (documented below) to
+suppress disassembly of the data area.
+
+
+\S{ndisother} Other Options
+
+The \i\c{-e} option skips a header on the file, by ignoring the first N
+bytes. This means that the header is \e{not} counted towards the
+disassembly offset: if you give \c{-e10 -o10}, disassembly will start
+at byte 10 in the file, and this will be given offset 10, not 20.
+
+The \i\c{-k} option is provided with two comma-separated numeric
+arguments, the first of which is an assembly offset and the second
+is a number of bytes to skip. This \e{will} count the skipped bytes
+towards the assembly offset: its use is to suppress disassembly of a
+data section which wouldn't contain anything you wanted to see
+anyway.
+
+
+\A{changelog} \i{NASM Version History}
+
+\& changes.src
+
+\A{source} Building NASM from Source
+
+The source code for NASM is available from our website,
+\W{http://www.nasm.us/}{http://wwww.nasm.us/}, see \k{website}.
+
+\H{tarball} Building from a Source Archive
+
+The source archives available on the web site should be capable of
+building on a number of platforms.  This is the recommended method for
+building NASM to support platforms for which executables are not
+available.
+
+On a system which has Unix shell (\c{sh}), run:
+
+\c      sh configure
+\c      make everything
+
+A number of options can be passed to \c{configure}; see
+\c{sh configure --help}.
+
+A set of Makefiles for some other environments are also available;
+please see the file \c{Mkfiles/README}.
+
+To build the installer for the Windows platform, you will need the
+\i\e{Nullsoft Scriptable Installer}, \i{NSIS}, installed.
+
+To build the documentation, you will need a set of additional tools.
+The documentation is not likely to be able to build on non-Unix
+systems.
+
+\H{git} Building from the \i\c{git} Repository
+
+The NASM development tree is kept in a source code repository using
+the \c{git} distributed source control system.  The link is available
+on the website.  This is recommended only to participate in the
+development of NASM or to assist with testing the development code.
+
+To build NASM from the \c{git} repository you will need a Perl
+interpreter and, if building on a Unix system, GNU autoconf installed
+on your system.
+
+To build on a Unix system, run:
+
+\c      sh autogen.sh
+
+to create the \c{configure} script and then build as listed above.
+
+\H{builddoc} Building the documentation
+
+To build the documentation, you will need a Perl interpreter, a
+Postscript to PDF converter such as Ghostscript, and suitable fonts
+installed on your system. The recommended (and default) fonts are
+Adobe's Source Sans and Source Code fonts, which are freely available
+under the SIL Open Font License.
+
+\A{contact} Contact Information
+
+\H{website} Website
+
+NASM has a \i{website} at
+\W{http://www.nasm.us/}\c{http://www.nasm.us/}.
+
+\i{New releases}, \i{release candidates}, and \I{snapshots, daily
+development}\i{daily development snapshots} of NASM are available from
+the official web site in source form as well as binaries for a number
+of common platforms.
+
+\S{forums} User Forums
+
+Users of NASM may find the Forums on the website useful.  These are,
+however, not frequented much by the developers of NASM, so they are
+not suitable for reporting bugs.
+
+\S{develcom} Development Community
+
+The development of NASM is coordinated primarily though the
+\i\c{nasm-devel} mailing list.  If you wish to participate in
+development of NASM, please join this mailing list.  Subscription
+links and archives of past posts are available on the website.
+
+\H{bugs} \i{Reporting Bugs}\I{bugs}
+
+To report bugs in NASM, please use the \i{bug tracker} at
+\W{http://www.nasm.us/}\c{http://www.nasm.us/} (click on "Bug
+Tracker"), or if that fails then through one of the contacts in
+\k{website}.
+
+Please read \k{qstart} first, and don't report the bug if it's
+listed in there as a deliberate feature. (If you think the feature
+is badly thought out, feel free to send us reasons why you think it
+should be changed, but don't just send us mail saying `This is a
+bug' if the documentation says we did it on purpose.) Then read
+\k{problems}, and don't bother reporting the bug if it's listed
+there.
+
+If you do report a bug, \e{please} make sure your bug report includes
+the following information:
+
+\b What operating system you're running NASM under.  Linux,
+FreeBSD, NetBSD, MacOS X, Win16, Win32, Win64, MS-DOS, OS/2, VMS,
+whatever.
+
+\b If you compiled your own executable from a source archive, compiled
+your own executable from \c{git}, used the standard distribution
+binaries from the website, or got an executable from somewhere else
+(e.g. a Linux distribution.) If you were using a locally built
+executable, try to reproduce the problem using one of the standard
+binaries, as this will make it easier for us to reproduce your problem
+prior to fixing it.
+
+\b Which version of NASM you're using, and exactly how you invoked
+it. Give us the precise command line, and the contents of the
+\c{NASMENV} environment variable if any.
+
+\b Which versions of any supplementary programs you're using, and
+how you invoked them. If the problem only becomes visible at link
+time, tell us what linker you're using, what version of it you've
+got, and the exact linker command line. If the problem involves
+linking against object files generated by a compiler, tell us what
+compiler, what version, and what command line or options you used.
+(If you're compiling in an IDE, please try to reproduce the problem
+with the command-line version of the compiler.)
+
+\b If at all possible, send us a NASM source file which exhibits the
+problem. If this causes copyright problems (e.g. you can only
+reproduce the bug in restricted-distribution code) then bear in mind
+the following two points: firstly, we guarantee that any source code
+sent to us for the purposes of debugging NASM will be used \e{only}
+for the purposes of debugging NASM, and that we will delete all our
+copies of it as soon as we have found and fixed the bug or bugs in
+question; and secondly, we would prefer \e{not} to be mailed large
+chunks of code anyway. The smaller the file, the better. A
+three-line sample file that does nothing useful \e{except}
+demonstrate the problem is much easier to work with than a
+fully fledged ten-thousand-line program. (Of course, some errors
+\e{do} only crop up in large files, so this may not be possible.)
+
+\b A description of what the problem actually \e{is}. `It doesn't
+work' is \e{not} a helpful description! Please describe exactly what
+is happening that shouldn't be, or what isn't happening that should.
+Examples might be: `NASM generates an error message saying Line 3
+for an error that's actually on Line 5'; `NASM generates an error
+message that I believe it shouldn't be generating at all'; `NASM
+fails to generate an error message that I believe it \e{should} be
+generating'; `the object file produced from this source code crashes
+my linker'; `the ninth byte of the output file is 66 and I think it
+should be 77 instead'.
+
+\b If you believe the output file from NASM to be faulty, send it to
+us. That allows us to determine whether our own copy of NASM
+generates the same file, or whether the problem is related to
+portability issues between our development platforms and yours. We
+can handle binary files mailed to us as MIME attachments, uuencoded,
+and even BinHex. Alternatively, we may be able to provide an FTP
+site you can upload the suspect files to; but mailing them is easier
+for us.
+
+\b Any other information or data files that might be helpful. If,
+for example, the problem involves NASM failing to generate an object
+file while TASM can generate an equivalent file without trouble,
+then send us \e{both} object files, so we can see what TASM is doing
+differently from us.
+
+\A{inslist} \i{Instruction List}
+
+\H{inslistintro} Introduction
+
+The following sections show the instructions which NASM currently supports. For each
+instruction, there is a separate entry for each supported addressing mode. The third
+column shows the processor type in which the instruction was introduced and,
+ when appropriate, one or more usage flags.
+
+\& inslist.src

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+167.531 c 167.434 166.543 167.891 165.91 168.809 165.625 c 169.723 
+165.336 170.887 165.066 172.301 164.805 c 174.34 164.547 176.273 
+164.219 178.105 163.832 c 179.938 163.441 181.547 162.805 182.934 
+161.922 c 184.316 161.035 185.43 159.855 186.266 158.371 c 187.102 
+156.89 187.52 154.93 187.52 152.488 c h
+187.52 152.488 m f
+250.336 140.832 m 250.152 140.492 249.723 140.324 249.047 140.324 c 
+240.449 140.324 l 239.77 140.324 239.312 140.469 239.078 140.754 c 
+238.844 141.039 238.727 141.445 238.727 141.965 c 238.727 162.527 l 
+238.727 164.922 238.363 166.512 237.633 167.293 c 236.902 168.078 
+235.809 168.465 234.352 168.465 c 233.414 168.465 232.266 168.219 
+230.91 167.723 c 229.555 167.23 228.383 166.719 227.391 166.199 c 
+227.391 141.965 l 227.391 141.551 227.301 141.172 227.117 140.832 c 
+226.938 140.492 226.48 140.324 225.75 140.324 c 217.152 140.324 l 
+216.523 140.324 216.098 140.469 215.863 140.754 c 215.629 141.039 
+215.512 141.445 215.512 141.965 c 215.512 162.762 l 215.512 164.949 
+215.16 166.445 214.449 167.254 c 213.738 168.062 212.676 168.469 
+211.262 168.469 c 210.312 168.469 209.172 168.234 207.836 167.765 c 
+206.496 167.293 205.277 166.773 204.176 166.199 c 204.176 141.969 l 
+204.176 141.551 204.07 141.176 203.863 140.832 c 203.656 140.496 
+203.191 140.328 202.465 140.328 c 193.926 140.328 l 193.301 140.328 
+192.875 140.469 192.641 140.758 c 192.406 141.039 192.297 141.449 
+192.297 141.969 c 192.297 177.144 l 192.297 177.664 192.406 178.082 
+192.641 178.394 c 192.875 178.707 193.301 178.867 193.926 178.867 c 
+202.465 178.867 l 203.191 178.867 203.656 178.68 203.863 178.316 c 
+204.07 177.953 204.176 177.562 204.176 177.144 c 204.176 175.348 l 
+204.332 175.269 l 206 176.621 207.824 177.68 209.801 178.433 c 211.781 
+179.187 213.789 179.566 215.824 179.566 c 218.168 179.566 220.223 
+179.14 221.996 178.277 c 223.766 177.418 225.074 176.074 225.906 174.25 
+c 227.73 175.762 229.801 177.027 232.117 178.043 c 234.438 179.058 
+236.77 179.566 239.113 179.566 c 241.879 179.566 244.027 179.109 
+245.562 178.199 c 247.102 177.285 248.25 176.101 249.004 174.644 c 
+249.758 173.183 250.215 171.543 250.371 169.719 c 250.527 167.894 
+250.605 166.07 250.605 164.246 c 250.605 141.965 l 250.609 141.547 
+250.52 141.172 250.336 140.832 c h
+250.336 140.832 m f
+Q Q
+showpage
+%%Trailer
+count op_count sub {pop} repeat
+countdictstack dict_count sub {end} repeat
+cairo_eps_state restore
+%%EOF

_service:tar_scm:nasm-2.16.03.tar.xz/doc/nasmlogw.png Changed

_service:tar_scm:nasm-2.16.03.tar.xz/doc/opt_var.txt Added

@@ -0,0 +1,116 @@
+                     NASM Optimizer Usage of
+              Certain Variables to Control Assembly
+
+                  prepared by:  John R Coffman
+                       date:  07-Mar-2005
+
+
+GLOBAL variables:
+        optimizing     optimization meta data (with level and flag info)
+        .level         -1 flags nasm 0.98 compatible operation;
+                            offsets usually are explicit (short/near)
+                            no optimization passes
+                        0 flags non-optimized assembly; forward
+                            references generate long offsets; always
+                            assembles
+                            no optimization passes
+                        2 or more specifies optimization passes.  5 is
+                            the actual recommended minimum setting
+                            optimization passes (2 or more, plus
+                            passes 1 and 2 will be required)
+        .flag           0 allow all optimizations
+                        1 disallow jump match optimization
+
+        pass0           0 flags an optimizer pass (multiple passes)
+                        1 flags pass1 (define labels)
+                        2 flags pass2 (spit out code)
+
+
+LOCAL variables:        local to 'assemble_file' (nasm.c)
+
+        pass_max        2 for non-optimized assembly
+                        4 or more for optimized assembly
+
+        pass            index of the FOR loop (1..pass_max)
+                        with optimized assembly, this variable is
+                            advanced to 'pass_max - 1' in the logic
+                            at the end of the loop to terminate
+                            an optimized assembly before all passes
+                            are used; i.e., when convergence has 
+                            occurred
+                
+
+        pass1           flag for making parts of the assembler do
+                            pass 1 behaviors on optimizer passes
+
+        pass2           flag for making parts of the assembler do
+                            pass 2 behaviors on optimizer passes
+
+        pass_cnt        benign counter for counting the actual
+                            number of passes taken.  Since 'pass'
+                            may be jerked upward early on optimized
+                            assembly, it does not accurately reflect
+                            the number of passes taken.
+                        always ends at 2 for non-optimized assembly
+
+
+
+        How the variables sequence:
+
+
+NON-OPTIMIZED assembly:
+
+                
+        pass0           1  2        all indicate, pass 1 and pass 2
+        pass1           1  2
+        pass2           1  2
+
+        pass            1  2
+   ----------------------------------------
+
+        pass_max        pre-set to 2
+        pass_cnt        ends at 2
+
+
+OPTIMIZED assembly:
+
+        optimizing      set to 2 or greater
+
+        pass0           0  0  0  0  0 ... 0  0  1  2
+        pass1           1  1  1  1  1 ... 1  1  1  2
+        pass2           1  2  2  2  2 ... 2  2  2  2
+
+        pass            1  2  3  4  5 ... 7  8  9  12
+
+        pass_max        pre-set to, say, 12
+        pass_cnt        ends at 10 for this assembly
+
+>From pass_cnt, the reported number of passes will be 1+8+1, meaning 
+8 optimization passes, plus pass 1, plus pass 2.
+
+Subroutines may check 'pass0' to see if an optimizer pass is in
+progress (pass0==0).  Many have arguments to tell what pass is in
+progress.  But these variables are passed in as 'pass1' or 'pass2'.
+
+>From the sequences above, 'pass' bears no relation to the desired
+pass 1 or pass 2 behavior of the assembler.  'pass1' is used to tell
+parts of the assembler, on multiple occasions, that pass 1 is in
+progress, and only once that pass 2 is being performed.  Other parts
+of the assembler need to be told only once that pass 1 is being
+performed, but may be told multiple times that pass 2 is being done.
+
+For instance, the preprocessor reset operation looks at pass1, and it
+thinks many pass 1 resets are being done, but only one pass 2 reset
+is done.  Also, certain errors are non-fatal on pass 1, but fatal on
+pass 2; hence, they are tied to the 'pass1' variable to determine the
+assembler pass number.
+
+Further, segment definitions look at the 'pass2' variable, since they
+do some initialization on pass 1, but are pretty much no-ops on pass
+2.  Hence, they should see pass 1 only once, but may see pass 2
+multiple times.
+
+
+ 
+end
+

_service:tar_scm:nasm-2.16.03.tar.xz/doc/psfonts.ph Added

@@ -0,0 +1,97 @@
+#!/usr/bin/perl
+#
+# Font metrics for the PS code generator
+#
+
+# Font substitution lists, in order of preference
+
+# Note: for some reason the Source Pro fonts use -It rather than
+# -Italic for the PostScript name of the OTF font, but some systems
+# have been said to want it the other way, maybe because they have the
+# TTF format installed?
+#
+# Thus, support various aliases in combination.
+
+sub font {
+    my($fonts, @mods) = @_;
+    my @f = map { $_.'-' } @$fonts;
+
+    foreach my $m (@mods) {
+	@f = map { my $ff = $_; map { $ff.$_ } @$m } @f;
+    }
+
+    return map { /^(.*?)-*$/; $1 } @f;
+}
+
+my $text    = 'SourceSans', 'SourceSans3',
+	       'SourceSansPro', 'SourceSansPro3',
+	       'LiberationSans', 'Arial', 'Helvetica';
+my $code    = 'SourceCodePro', 'LiberationMono', 'Courier';
+my $regular = 'Regular', '';
+my $italic  = 'Italic', 'It';
+my $bold    = 'Bold';
+my $semi    = 'Semibold', 'Bold';
+
+my @TText = font($text, $bold);
+my @TItal = font($text, $bold, $italic);
+my @TCode = font($code, $bold);
+my @HText = font($text, $semi);
+my @HItal = font($text, $semi, $italic);
+my @HCode = font($code, $semi);
+my @BText = font($text, $regular);
+my @BItal = font($text, $italic);
+my @BCode = font($code, $regular);
+my @QText = font($text, $italic);
+my @QBold = font($text, $bold, $italic);
+my @QCode = font($code, $regular);
+my @XCode = font($code, $regular);
+
+# The fonts we want to use for various things
+# The order is: <normal> <emphatic> <code>
+
+my $lf = 1.2;			# Leading scale factor
+my $cf = 0.8;			# Code size scale factor
+
+my $st = 20;
+%TitlFont = (name => 'tfont',
+	     leading => $st*$lf,
+	     fonts => $st, \@TText, $st, \@TItal, $st*$cf, \@TCode);
+
+my $sc = 18;
+%ChapFont = (name => 'cfont',
+	     leading => $sc*$lf,
+	     fonts => $sc, \@HText, $sc, \@HItal, $sc*$cf, \@HCode);
+
+my $sh = 14;
+%HeadFont = (name => 'hfont',
+		leading => $sh*$lf,
+		fonts => $sh, \@HText, $sh, \@HItal, $sh*$cf, \@HCode);
+
+my $ss = 12;
+%SubhFont = (name => 'sfont',
+	     leading => $ss*$lf,
+	     fonts => $ss, \@HText, $ss, \@HItal, $ss*$cf, \@HCode);
+
+my $sb = 10;
+%BodyFont = (name => 'bfont',
+	     leading => $sb*$lf,
+	     fonts => $sb, \@BText, $sb, \@BItal, $sb*$cf, \@BCode);
+
+my $sq = 9;
+%BquoFont = (name => 'qfont',
+	     leading => $sq*$lf,
+	     fonts => $sq, \@QText, $sq, \@QBold, $sq*$cf, \@QCode);
+
+my $sx = $sb*$cf;
+%CodeFont = (name => 'xfont',
+	     leading => $sx*$lf,
+	     fonts => $sx, \@XCode, $sx, \@XCode, $sx, \@XCode);
+
+#
+# List of all fontsets; used to compute the list of fonts needed
+#
+@AllFonts = ( \%TitlFont, \%ChapFont, \%HeadFont, \%SubhFont, \%BodyFont,
+    \%BquoFont, \%CodeFont );
+
+# OK
+1;

_service:tar_scm:nasm-2.16.03.tar.xz/doc/pspdf.pl Added

@@ -0,0 +1,136 @@
+#!/usr/bin/perl
+#
+# Wrapper around a variety of programs that can do PS -> PDF conversion
+#
+
+use strict;
+use File::Spec;
+
+my $compress = 1;
+
+my $win32_ok = eval {
+    require Win32::TieRegistry;
+    Win32::TieRegistry->import();
+    1;
+};
+
+while ($ARGV0 =~ /^-(.*)$/) {
+    my $opt = $1;
+    shift @ARGV;
+
+    if ($opt eq 'nocompress') {
+        $compress = 0;
+    }
+}
+
+# Ghostscript executable name.  "gs" on Unix-based systems.
+my $gs = 'gs';
+
+my ($in, $out, $fontpath) = @ARGV;
+
+if (!defined($out)) {
+    die "Usage: $0 -nocompress infile outfile fontpath\n";
+}
+
+# If Win32, help GhostScript out with some defaults
+sub win32_gs_help() {
+    return if (!$win32_ok);
+
+    use Sort::Versions;
+    use sort 'stable';
+
+    my $Reg = $::Registry->Open('', {Access => 'KEY_READ', Delimiter => '/'});
+    my $dir;
+    my @gs;
+
+    foreach my $k1 ('HKEY_CURRENT_USER/Software/',
+                    'HKEY_LOCAL_MACHINE/SOFTWARE/') {
+        foreach my $k2 ('Artifex/', '') {
+            foreach my $k3 ('GPL Ghostscript/', 'AFPL Ghostscript/',
+                            'Ghostscript/') {
+                my $r = $Reg->{$k1.$k2.$k3};
+                if (ref($r) eq 'Win32::TieRegistry') {
+                    foreach my $k (keys(%$r)) {
+                        my $rk = $r->{$k};
+                        if (ref($rk) eq 'Win32::TieRegistry' &&
+                            defined($rk->{'/GS_LIB'})) {
+                            push @gs, $rk;
+                        }
+                    }
+                }
+            }
+        }
+    }
+
+    @gs = sort {
+        my($av) = $a->Path =~ m:^.*/(^/+)/$:;
+        my($bv) = $b->Path =~ m:^.*/(^/+)/$:;
+        versioncmp($av, $bv);
+    } @gs;
+
+    return unless (scalar(@gs));
+
+    $ENV{'PATH'} .= ';' . $gs0->{'/GS_LIB'};
+    $ENV{'GS_FONTPATH'} .= (defined($ENV{'GS_FONTPATH'}) ? ';' : '')
+        . $ENV{'windir'}.'\\fonts';
+
+    my $gsp = undef;
+    foreach my $p (split(/\;/, $gs0->{'/GS_LIB'})) {
+	foreach my $exe ('gswin64c.exe', 'gswin32c.exe', 'gs.exe') {
+	    last if (defined($gsp));
+	    my $e = File::Spec->catpath($p, $exe);
+	    $gsp = $e if (-f $e && -x _);
+	}
+    }
+
+    $gs = $gsp if (defined($gsp));
+}
+
+# Remove output file
+unlink($out);
+
+# 1. Acrobat distiller
+my $r = system('acrodist', '-n', '-q', '--nosecurity', '-o', $out, $in);
+exit 0 if ( !$r && -f $out );
+
+# 2. ps2pdf (from Ghostscript)
+#
+# GhostScript uses # rather than = to separate options and values on Windows,
+# it seems.  Similarly it uses ; in path lists rather than :.
+# Call gs directly rather than ps2pdf, because -dSAFER
+# breaks font discovery on some systems, apparently.
+win32_gs_help();
+my $o = $win32_ok ? '#' : '=';
+my $p = $win32_ok ? ';' : ':';
+my $fpopt;
+if (defined($fontpath)) {
+    my @fplist = ();
+    open(my $fp, '<', $fontpath) or die "$0: $fontpath: $!\n";
+    while (my $fpe = <$fp>) {
+	chomp $fpe;
+	push(@fplist, $fpe);
+    }
+    close($fp);
+    $fpopt = "-sFONTPATH${o}" . join($p, @fplist);
+}
+
+my $r = system($gs, "-dCompatibilityLevel${o}1.3",
+	       "-I".File::Spec->curdir(),
+	       "-P-", "-dNOPAUSE", "-dBATCH", "-sDEVICE${o}pdfwrite",
+	       "-sstdout${o}%stderr", "-sOutputFile${o}${out}",
+	       "-dOptimize${o}true",
+	       "-dEmbedAllFonts${o}true", "-dSubsetFonts${o}true",
+	       "-dMaxSubsetPct${o}100",
+	       $fpopt,
+               "-dCompressPages${o}" . ($compress ? 'true' : 'false'),
+               "-dUseFlateCompression${o}true",
+	       "-f", $in);
+exit 0 if ( !$r && -f $out );
+
+# 3. pstopdf (BSD/MacOS X utility)
+my $r = system('pstopdf', $in, '-o', $out);
+exit 0 if ( !$r && -f $out );
+
+# Otherwise, fail
+unlink($out);
+exit 1;

_service:tar_scm:nasm-2.16.03.tar.xz/doc/pswidth.ph Added

_service:tar_scm:nasm-2.16.03.tar.xz/doc/rdsrc.pl Added

@@ -0,0 +1,1172 @@
+#!/usr/bin/perl
+## --------------------------------------------------------------------------
+##
+##   Copyright 1996-2018 The NASM Authors - All Rights Reserved
+##   See the file AUTHORS included with the NASM distribution for
+##   the specific copyright holders.
+##
+##   Redistribution and use in source and binary forms, with or without
+##   modification, are permitted provided that the following
+##   conditions are met:
+##
+##   * Redistributions of source code must retain the above copyright
+##     notice, this list of conditions and the following disclaimer.
+##   * Redistributions in binary form must reproduce the above
+##     copyright notice, this list of conditions and the following
+##     disclaimer in the documentation and/or other materials provided
+##     with the distribution.
+##
+##     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+##     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+##     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+##     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+##     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+##     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+##     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+##     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+##     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+##     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+##     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+##     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+##     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+##
+## --------------------------------------------------------------------------
+
+
+# Read the source-form of the NASM manual and generate the various
+# output forms.
+
+# TODO:
+#
+# Ellipsis support would be nice.
+
+# Source-form features:
+# ---------------------
+#
+# Bullet \b
+#   Bullets the paragraph. Rest of paragraph is indented to cope. In
+#   HTML, consecutive groups of bulleted paragraphs become unordered
+#   lists.
+#
+# Indent \>
+#   Indents the paragraph equvalently to a bulleted paragraph.  In HTML,
+#   an indented paragraph following a bulleted paragraph is included in the
+#   same list item.
+#
+# Blockquote \q
+#   Marks the paragraph as a block quote.
+#
+# Emphasis \e{foobar}
+#   produces `_foobar_' in text and italics in HTML, PS, RTF
+#
+# Inline code \c{foobar}
+#   produces ``foobar'' in text, and fixed-pitch font in HTML, PS, RTF
+#
+# Display code
+# \c  line one
+# \c   line two
+#   produces fixed-pitch font where appropriate, and doesn't break
+#   pages except sufficiently far into the middle of a display.
+#
+# Chapter, header and subheader
+# \C{intro} Introduction
+# \H{whatsnasm} What is NASM?
+# \S{free} NASM Is Free
+#   dealt with as appropriate. Chapters begin on new sides, possibly
+#   even new _pages_. (Sub)?headers are good places to begin new
+#   pages. Just _after_ a (sub)?header isn't.
+#   The keywords can be substituted with \K and \k.
+#
+# Keyword \K{cintro} \k{cintro}
+#   Expands to `Chapter 1', `Section 1.1', `Section 1.1.1'. \K has an
+#   initial capital whereas \k doesn't. In HTML, will produce
+#   hyperlinks.
+#
+# Web link \W{http://foobar/}{text} or \W{mailto:me@here}\c{me@here}
+#   the \W prefix is ignored except in HTML; in HTML the last part
+#   becomes a hyperlink to the first part.
+#
+# Literals \{ \} \\
+#   In case it's necessary, they expand to the real versions.
+#
+# Nonbreaking hyphen \-
+#   Need more be said?
+#
+# Source comment \#
+#   Causes everything after it on the line to be ignored by the
+#   source-form processor.
+#
+# Indexable word \i{foobar} (or \i\e{foobar} or \i\c{foobar}, equally)
+#   makes word appear in index, referenced to that point
+#   \i\c comes up in code style even in the index; \i\e doesn't come
+#   up in emphasised style.
+#
+# Indexable non-displayed word \I{foobar} or \I\c{foobar}
+#   just as \i{foobar} except that nothing is displayed for it
+#
+# Index rewrite
+# \IR{foobar} \c{foobar} operator, uses of
+#   tidies up the appearance in the index of something the \i or \I
+#   operator was applied to
+#
+# Index alias
+# \IA{foobar}{bazquux}
+#   aliases one index tag (as might be supplied to \i or \I) to
+#   another, so that \I{foobar} has the effect of \I{bazquux}, and
+#   \i{foobar} has the effect of \I{bazquux}foobar
+#
+# Metadata/macros
+# \M{key}{something}
+#   defines document metadata, such as authorship, title and copyright;
+#   different output formats use this differently.
+# \m{key}
+#   insert the {something} string associated with metadata {key}
+#
+# Include subfile
+# \&{filename}
+#  Includes filename. Recursion is allowed.
+#
+
+use File::Spec;
+
+@include_path = ();
+$out_path = File::Spec->curdir();
+
+while ($ARGV0 =~ /^-/) {
+    my $opt = shift @ARGV;
+    if ($opt eq '-d') {
+	$diag = 1;
+    } elsif ($opt =~ /^\-Ii(.*)$/) {
+	push(@include_path, $1);
+    } elsif ($opt =~ /^\-Oo(.*)$/) {
+	$out_path = $1;
+    }
+}
+
+$out_format = shift(@ARGV);
+@files = @ARGV;
+@files = ('-') unless(scalar(@files));
+
+$| = 1;
+
+$tstruct_previtem = $node = "Top";
+$nodes = ($node);
+$tstruct_level{$tstruct_previtem} = 0;
+$tstruct_last$tstruct_level{$tstruct_previtem} = $tstruct_previtem;
+$MAXLEVEL = 10;  # really 3, but play safe ;-)
+
+# Read the file; pass a paragraph at a time to the paragraph processor.
+print "Reading input...";
+$pname = ;
+@pnames = @pflags = ();
+$para = undef;
+foreach $file (@files) {
+  &include($file);
+}
+&got_para($para);
+print "done.\n";
+
+# Now we've read in the entire document and we know what all the
+# heading keywords refer to. Go through and fix up the \k references.
+print "Fixing up cross-references...";
+&fixup_xrefs;
+print "done.\n";
+
+# Sort the index tags, according to the slightly odd order I've decided on.
+print "Sorting index tags...";
+&indexsort;
+print "done.\n";
+
+# Make output directory if necessary
+mkdir($out_path);
+
+if ($diag) {
+  print "Writing index-diagnostic file...";
+  &indexdiag;
+  print "done.\n";
+}
+
+# OK. Write out the various output files.
+if ($out_format eq 'txt') {
+    print "Producing text output: ";
+    &write_txt;
+    print "done.\n";
+} elsif ($out_format eq 'html') {
+    print "Producing HTML output: ";
+    &write_html;
+    print "done.\n";
+} elsif ($out_format eq 'dip') {
+    print "Producing Documentation Intermediate Paragraphs: ";
+    &write_dip;
+    print "done.\n";
+} else {
+    die "$0: unknown output format: $out_format\n";
+}
+
+sub untabify($) {
+  my($s) = @_;
+  my $o = '';
+  my($c, $i, $p);
+
+  $p = 0;
+  for ($i = 0; $i < length($s); $i++) {
+    $c = substr($s, $i, 1);
+    if ($c eq "\t") {
+      do {
+	$o .= ' ';
+	$p++;
+      } while ($p & 7);
+    } else {
+      $o .= $c;
+      $p++;
+    }
+  }
+  return $o;
+}
+sub read_line {
+  local $_ = shift;
+  $_ = &untabify($_);
+  if (/\\& (\S+)/) {
+     &include($1);
+  } else {
+     &get_para($_);
+  }
+}
+sub get_para($_) {
+  chomp;
+  if (!/\S/ || /^\$IA|IR|M)/) { # special case: \IA \IR \M imply new-paragraph
+    &got_para($para);
+    $para = undef;
+  }
+  if (/\S/) {
+    s/(^|^\$\\#.*$/\1/; # strip comments
+    $para .= " " . $_;
+  }
+}
+sub include {
+  my $name = shift;
+  my $F;
+
+  if ($name eq '-') {
+    open($F, '<-');		# stdin
+  } else {
+    my $found = 0;
+    foreach my $idir ( File::Spec->curdir, @include_path ) {
+	my $fpath = File::Spec->catfile($idir, $name);
+      if (open($F, '<', $fpath)) {
+	$found = 1;
+	last;
+      }
+    }
+    die "Cannot open $name: $!\n" unless ($found);
+  }
+  while (defined($_ = <$F>)) {
+     &read_line($_);
+  }
+  close($F);
+}
+sub got_para {
+  local ($_) = @_;
+  my $pflags = "", $i, $w, $l, $t;
+  my $para = ;
+
+  return if !/\S/;
+
+  # Replace metadata macros
+  while (/^(.*)\\m\{(^\}*)\}(.*)$/) {
+      if (defined($metadata{$2})) {
+	  $_ = $1.$metadata{$2}.$3;
+      } else {
+	  $_ = $1.$2.$3;
+      }
+  }
+
+  # Strip off _leading_ spaces, then determine type of paragraph.
+  s/^\s*//;
+  $irewrite = undef;
+  if (/^\\c^{/) {
+    # A code paragraph. The paragraph-array will contain the simple
+    # strings which form each line of the paragraph.
+    $pflags = "code";
+    while (/^\\c ((^\\|\\^c)*)(.*)$/) {
+      $l = $1;
+      $_ = $3;
+      $l =~ s/\\\{/\{/g;
+      $l =~ s/\\\}/}/g;
+      $l =~ s/\\\\/\\/g;
+      push @$para, $l;
+    }
+    $_ = ''; # suppress word-by-word code
+  } elsif (/^\\C/) {
+    # A chapter heading. Define the keyword and allocate a chapter
+    # number.
+    $cnum++;
+    $hnum = 0;
+    $snum = 0;
+    $xref = "chapter-$cnum";
+    $pflags = "chap $cnum :$xref";
+    die "badly formatted chapter heading: $_\n" if !/^\\C\{(^\}*)\}\s*(.*)$/;
+    $refs{$1} = "chapter $cnum";
+    $node = "Chapter $cnum";
+    &add_item($node, 1, $para);
+    $xrefnodes{$node} = $xref; $nodexrefs{$xref} = $node;
+    $xrefs{$1} = $xref;
+    $_ = $2;
+    # the standard word-by-word code will happen next
+  } elsif (/^\\A/) {
+    # An appendix heading. Define the keyword and allocate an appendix
+    # letter.
+    $cnum++;
+    $cnum = 'A' if $cnum =~ /0-9+/;
+    $hnum = 0;
+    $snum = 0;
+    $xref = "appendix-$cnum";
+    $pflags = "appn $cnum :$xref";
+    die "badly formatted appendix heading: $_\n" if !/^\\A\{(^\}*)}\s*(.*)$/;
+    $refs{$1} = "appendix $cnum";
+    $node = "Appendix $cnum";
+    &add_item($node, 1, $para);
+    $xrefnodes{$node} = $xref; $nodexrefs{$xref} = $node;
+    $xrefs{$1} = $xref;
+    $_ = $2;
+    # the standard word-by-word code will happen next
+  } elsif (/^\\H/) {
+    # A major heading. Define the keyword and allocate a section number.
+    $hnum++;
+    $snum = 0;
+    $xref = "section-$cnum.$hnum";
+    $pflags = "head $cnum.$hnum :$xref";
+    die "badly formatted heading: $_\n" if !/^\\HP\{(^\}*)\}\s*(.*)$/;
+    $refs{$1} = "section $cnum.$hnum";
+    $node = "Section $cnum.$hnum";
+    &add_item($node, 2, $para);
+    $xrefnodes{$node} = $xref; $nodexrefs{$xref} = $node;
+    $xrefs{$1} = $xref;
+    $_ = $2;
+    # the standard word-by-word code will happen next
+  } elsif (/^\\S/) {
+    # A sub-heading. Define the keyword and allocate a section number.
+    $snum++;
+    $xref = "section-$cnum.$hnum.$snum";
+    $pflags = "subh $cnum.$hnum.$snum :$xref";
+    die "badly formatted subheading: $_\n" if !/^\\S\{(^\}*)\}\s*(.*)$/;
+    $refs{$1} = "section $cnum.$hnum.$snum";
+    $node = "Section $cnum.$hnum.$snum";
+    &add_item($node, 3, $para);
+    $xrefnodes{$node} = $xref; $nodexrefs{$xref} = $node;
+    $xrefs{$1} = $xref;
+    $_ = $2;
+    # the standard word-by-word code will happen next
+  } elsif (/^\\IR/) {
+    # An index-rewrite.
+    die "badly formatted index rewrite: $_\n" if !/^\\IR\{(^\}*)\}\s*(.*)$/;
+    $irewrite = $1;
+    $_ = $2;
+    # the standard word-by-word code will happen next
+  } elsif (/^\\IA/) {
+    # An index-alias.
+    die "badly formatted index alias: $_\n" if !/^\\IA\{(^\}*)}\{(^\}*)\}\s*$/;
+    $idxalias{$1} = $2;
+    return; # avoid word-by-word code
+  } elsif (/^\\M/) {
+    # Metadata
+    die "badly formed metadata: $_\n" if !/^\\M\{(^\}*)}\{(^\}*)\}\s*$/;
+    $metadata{$1} = $2;
+    return; # avoid word-by-word code
+  } elsif (/^\\(b\>q)/) {
+    # An indented paragraph of some sort. Strip off the initial \b and let the
+      # word-by-word code take care of the rest.
+      my %ipar = (
+	  'b' => 'bull',
+	  '>' => 'indt',
+	  'q' => 'bquo',
+	  );
+    $pflags = $ipar{$1};
+    s/^\\b\>q\s*//;
+  } else {
+    # A normal paragraph. Just set $pflags: the word-by-word code does
+    # the rest.
+    $pflags = "norm";
+  }
+
+  # The word-by-word code: unless @$para is already defined (which it
+  # will be in the case of a code paragraph), split the paragraph up
+  # into words and push each on @$para.
+  #
+  # Each thing pushed on @$para should have a two-character type
+  # code followed by the text.
+  #
+  # Type codes are:
+  # "n " for normal
+  # "da" for an en dash
+  # "dm" for an em desh
+  # "es" for first emphasised word in emphasised bit
+  # "e " for emphasised in mid-emphasised-bit
+  # "ee" for last emphasised word in emphasised bit
+  # "eo" for single (only) emphasised word
+  # "c " for code
+  # "k " for cross-ref
+  # "kK" for capitalised cross-ref
+  # "w " for Web link
+  # "wc" for code-type Web link
+  # "x " for beginning of resolved cross-ref; generates no visible output,
+  #      and the text is the cross-reference code
+  # "xe" for end of resolved cross-ref; text is same as for "x ".
+  # "i " for point to be indexed: the text is the internal index into the
+  #      index-items arrays
+  # "sp" for space
+  while (/\S/) {
+    s/^\s*//, push @$para, "sp" if /^\s/;
+    $indexing = $qindex = 0;
+    if (/^(\\iI)?\\c/) {
+      $qindex = 1 if $1 eq "\\I";
+      $indexing = 1, s/^\\iI// if $1;
+      s/^\\c//;
+      die "badly formatted \\c: \\c$_\n" if !/\{((^\\}|\\.)*)\}(.*)$/;
+      $w = $1;
+      $_ = $3;
+      $w =~ s/\\\{/\{/g;
+      $w =~ s/\\\}/\}/g;
+      $w =~ s/\\-/-/g;
+      $w =~ s/\\\\/\\/g;
+      push(@$para, addidx($node, $w, "c $w")) if ($indexing);
+      push(@$para, "c $w") if (!$qindex);
+    } elsif (/^\\iIe/) {
+      /^(\\iI)?(\\e)?/;
+      $emph = 0;
+      $qindex = 1 if $1 eq "\\I";
+      $indexing = 1, $type = "\\i" if $1;
+      $emph = 1, $type = "\\e" if $2;
+      s/^(\\iI)?(\\e?)//;
+      die "badly formatted $type: $type$_\n" if !/\{((^\\}|\\.)*)\}(.*)$/;
+      $w = $1;
+      $_ = $3;
+      $w =~ s/\\\{/\{/g;
+      $w =~ s/\\\}/\}/g;
+      $w =~ s/\\-/-/g;
+      $w =~ s/\\\\/\\/g;
+      $t = $emph ? "es" : "n ";
+      @ientry = ();
+      @pentry = ();
+      foreach $i (split /\s+/,$w) {  # \e and \i can be multiple words
+        push @pentry, "$t$i","sp";
+	($ii=$i) =~ tr/A-Z/a-z/, push @ientry,"n $ii","sp";
+	$t = $emph ? "e " : "n ";
+      }
+      if ($indexing) {
+	  $w =~ tr/A-Z/a-z/;
+	  pop @ientry;		# remove final space
+	  push(@$para, addidx($node, $w, @ientry));
+      }
+      if (!$qindex) {
+	  pop @pentry;		# remove final space
+	  if (substr($pentry-1,0,2) eq 'es') {
+	      substr($pentry-1,0,2) = 'eo';
+	  } elsif ($emph) {
+	      substr($pentry-1,0,2) = 'ee';
+	  }
+	  push(@$para, @pentry);
+      }
+    } elsif (/^\\kK/) {
+      $t = "k ";
+      $t = "kK" if /^\\K/;
+      s/^\\kK//;
+      die "badly formatted \\k: \\k$_\n" if !/\{(^\}*)\}(.*)$/;
+      $_ = $2;
+      push @$para,"$t$1";
+    } elsif (/^\\W/) {
+      s/^\\W//;
+      die "badly formatted \\W: \\W$_\n"
+          if !/\{(^\}*)\}(\\i)?(\\c)?\{((^\\}|\\.)*)\}(.*)$/;
+      $l = $1;
+      $w = $4;
+      $_ = $6;
+      $t = "w ";
+      $t = "wc" if $3 eq "\\c";
+      $indexing = 1 if $2;
+      $w =~ s/\\\{/\{/g;
+      $w =~ s/\\\}/\}/g;
+      $w =~ s/\\-/-/g;
+      $w =~ s/\\\\/\\/g;
+      push(@$para, addidx($node, $w, "c $w")) if $indexing;
+      push(@$para, "$t<$l>$w");
+    } else {
+      die "what the hell? $_\n" if !/^((^\s\\\-|\\\\{}\-)*-?)(.*)$/;
+      die "painful death! $_\n" if !length $1;
+      $w = $1;
+      $_ = $3;
+      $w =~ s/\\\{/\{/g;
+      $w =~ s/\\\}/\}/g;
+      $w =~ s/\\-/-/g;
+      $w =~ s/\\\\/\\/g;
+      if ($w eq '--') {
+	  push @$para, 'dm';
+      } elsif ($w eq '-') {
+        push @$para, 'da';
+      } else {
+        push @$para,"n $w";
+      }
+    }
+  }
+  if ($irewrite ne undef) {
+    addidx(undef, $irewrite, @$para);
+  } else {
+    push @pnames, $para;
+    push @pflags, $pflags;
+  }
+}
+
+sub addidx($$@) {
+  my($node, $text, @ientry) = @_;
+  $text = $idxalias{$text} || $text;
+  if (!exists($idxmap{$text})) {
+      $idxmap{$text} = @ientry;
+      $idxdup{$text} = $text;
+  } elsif (!defined($node)) {
+      my $dummy = sprintf('%s    #%05d', $text, $#{$idxdup{$text}} + 2);
+      $idxmap{$dummy} = @ientry;
+      push(@{$idxdup{$text}}, $dummy);
+  }
+
+  return undef if (!defined($node));
+
+  return map { $idxnodes{$node,$_} = 1; "i $_" } @{$idxdup{$text}};
+}
+
+sub indexsort {
+  my $iitem, $ientry, $i, $piitem, $pcval, $cval, $clrcval;
+
+  @itags = map { # get back the original data as the 1st elt of each list
+      $_->0
+  } sort { # compare auxiliary (non-first) elements of lists
+      my $d = 0;
+      for (my $i = 1; defined($a->$i) || defined($b->$i); $i++) {
+	  $d = $a->$i cmp $b->$i;
+	  last if ($d);
+      }
+      $d
+  } map { # transform array into list of 3-element lists
+      my $ientry = $idxmap{$_};
+      my $b = lc(join(' ', map { substr($_,2) } @$ientry));
+      $b =~ s/((){}+|\B,)//g;
+      $b =~ s/\s+/ /g;
+      my $a = $b;
+      $a =~ s/(:alpha:)/Z$1/g;
+      # From this point on A-Z means an already classed character
+	  # Try to sort numbers in numerical order (e.g. 8 before 16)
+      while ($a =~ /^(|.*?^A-Z)(\d+)(\.\d+)?(.*)$/) {
+	  my $p = $1; my $s = $4;
+	  my $nn = ('0' x (24 - length($2))) . $2 . $3;
+	  $nn =~ s/(.)/D$1/g;
+	  $a = $p . $nn . $s;
+      }
+      $a =~ s/(^A-Z\s)/A$1/g;
+      my $c = join(' ', map { substr($_,0,2) } @$ientry);
+      my $v = $_, $a, $b, $_, $c;
+      $v
+  } keys %idxmap;
+
+  # Having done that, check for comma-hood.
+  $cval = 0;
+  foreach $iitem (@itags) {
+    $ientry = $idxmap{$iitem};
+    $clrcval = 1;
+    $pcval = $cval;
+    FL:for ($i=0; $i <= $#$ientry; $i++) {
+      if ($$ientry$i =~ /^(n .*,)(.*)/) {
+        $$ientry$i = $1;
+	splice @$ientry,$i+1,0,"n $2" if length $2;
+	$commapos{$iitem} = $i+1;
+	$cval = join("\002", @$ientry0..$i);
+	$clrcval = 0;
+	last FL;
+      }
+    }
+    $cval = undef if $clrcval;
+    $commanext{$iitem} = $commaafter{$piitem} = 1
+      if $cval and ($cval eq $pcval);
+    $piitem = $iitem;
+  }
+}
+
+sub indexdiag {
+  my $iitem,$ientry,$w,$ww,$foo,$node;
+  open INDEXDIAG, '>', File::Spec->catfile($out_path, 'index.diag');
+  foreach $iitem (@itags) {
+    $ientry = $idxmap{$iitem};
+    print INDEXDIAG "<$iitem> ";
+    foreach $w (@$ientry) {
+      $ww = &word_txt($w);
+      print INDEXDIAG $ww unless $ww eq "\001";
+    }
+    print INDEXDIAG ":";
+    $foo = " ";
+    foreach $node (@nodes) {
+      (print INDEXDIAG $foo,$node), $foo = ", " if $idxnodes{$node,$iitem};
+    }
+    print INDEXDIAG "\n";
+  }
+  close INDEXDIAG;
+}
+
+sub fixup_xrefs {
+  my $pname, $p, $i, $j, $k, $caps, @repl;
+
+  for ($p=0; $p<=$#pnames; $p++) {
+    next if $pflags$p eq "code";
+    $pname = $pnames$p;
+    for ($i=$#$pname; $i >= 0; $i--) {
+	$k = $$pname$i;
+      if ($k =~ /^k/) {
+        $caps = ($k =~ /^kK/);
+	$k = substr($k,2);
+        $repl = $refs{$k};
+	die "undefined keyword `$k'\n" unless $repl;
+	substr($repl,0,1) =~ tr/a-z/A-Z/ if $caps;
+	@repl = ();
+	push @repl,"x $xrefs{$k}";
+	foreach $j (split /\s+/,$repl) {
+	  push @repl,"n $j";
+	  push @repl,"sp";
+	}
+	pop @repl; # remove final space
+	push @repl,"xe$xrefs{$k}";
+	splice @$pname,$i,1,@repl;
+      }
+    }
+  }
+}
+
+sub write_txt {
+  # This is called from the top level, so I won't bother using
+  # my or local.
+
+  # Open file.
+  print "writing file...";
+  open TEXT, '>', File::Spec->catfile($out_path, 'nasmdoc.txt');
+  select TEXT;
+
+  # Preamble.
+  $title = $metadata{'title'};
+  $spaces = ' ' x ((75-(length $title))/2);
+  ($underscore = $title) =~ s/./=/g;
+  print "$spaces$title\n$spaces$underscore\n";
+
+  for ($para = 0; $para <= $#pnames; $para++) {
+    $pname = $pnames$para;
+    $pflags = $pflags$para;
+    $ptype = substr($pflags,0,4);
+
+    print "\n"; # always one of these before a new paragraph
+
+    if ($ptype eq "chap") {
+      # Chapter heading. "Chapter N: Title" followed by a line of
+      # minus signs.
+      $pflags =~ /chap (.*) :(.*)/;
+      $title = "Chapter $1: ";
+      foreach $i (@$pname) {
+        $ww = &word_txt($i);
+        $title .= $ww unless $ww eq "\001";
+      }
+      print "$title\n";
+      $title =~ s/./-/g;
+      print "$title\n";
+    } elsif ($ptype eq "appn") {
+      # Appendix heading. "Appendix N: Title" followed by a line of
+      # minus signs.
+      $pflags =~ /appn (.*) :(.*)/;
+      $title = "Appendix $1: ";
+      foreach $i (@$pname) {
+        $ww = &word_txt($i);
+        $title .= $ww unless $ww eq "\001";
+      }
+      print "$title\n";
+      $title =~ s/./-/g;
+      print "$title\n";
+    } elsif ($ptype eq "head" || $ptype eq "subh") {
+      # Heading or subheading. Just a number and some text.
+      $pflags =~ /.... (.*) :(.*)/;
+      $title = sprintf "%6s ", $1;
+      foreach $i (@$pname) {
+        $ww = &word_txt($i);
+        $title .= $ww unless $ww eq "\001";
+      }
+      print "$title\n";
+    } elsif ($ptype eq "code") {
+	# Code paragraph. Emit each line with a seven character indent.
+	my $maxlen = 80;
+	foreach $i (@$pname) {
+	    warn "code line longer than $maxlen chars: $i\n"
+		if ( length($i) > $maxlen );
+	    print ' 'x7, $i, "\n";
+	}
+    } elsif ($ptype =~ /^(norm|bull|indt|bquo)$/) {
+      # Ordinary paragraph, optionally indented. We wrap, with ragged
+      # 75-char right margin and either 7 or 11 char left margin
+      # depending on bullets.
+      if ($ptype ne 'norm') {
+	  $line = ' 'x7 . (($ptype eq 'bull') ? '(*) ' : '    ');
+	  $next = ' 'x11;
+      } else {
+        $line = $next = ' 'x7;
+      }
+      @a = @$pname;
+      $wd = $wprev = '';
+      do {
+        do { $w = &word_txt(shift @a) } while $w eq "\001"; # nasty hack
+	$wd .= $wprev;
+	if ($wprev =~ /-$/ || $w eq ' ' || $w eq '' || $w eq undef) {
+	  if (length ($line . $wd) > 75) {
+	    $line =~ s/\s*$//; # trim trailing spaces
+	    print "$line\n";
+	    $line = $next;
+	    $wd =~ s/^\s*//; # trim leading spaces
+	  }
+	  $line .= $wd;
+	  $wd = '';
+	}
+	$wprev = $w;
+      } while ($w ne '' && $w ne undef);
+      if ($line =~ /\S/) {
+	$line =~ s/\s*$//; # trim trailing spaces
+	print "$line\n";
+      }
+    }
+  }
+
+  # Close file.
+  select STDOUT;
+  close TEXT;
+}
+
+sub word_txt {
+  my ($w) = @_;
+  my $wtype, $wmajt;
+
+  return undef if $w eq '' || $w eq undef;
+  $wtype = substr($w,0,2);
+  $wmajt = substr($wtype,0,1);
+  $w = substr($w,2);
+  $w =~ s/<.*>// if $wmajt eq "w"; # remove web links
+  if ($wmajt eq "n" || $wtype eq "e " || $wtype eq "w ") {
+    return $w;
+  } elsif ($wtype eq "sp") {
+    return ' ';
+  } elsif ($wtype eq 'da' || $wtype eq 'dm') {
+    return '-';
+  } elsif ($wmajt eq "c" || $wtype eq "wc") {
+    return "`${w}'";
+  } elsif ($wtype eq "es") {
+    return "_${w}";
+  } elsif ($wtype eq "ee") {
+    return "${w}_";
+  } elsif ($wtype eq "eo") {
+    return "_${w}_";
+  } elsif ($wmajt eq "x" || $wmajt eq "i") {
+    return "\001";
+  } else {
+    die "panic in word_txt: $wtype$w\n";
+  }
+}
+
+sub html_filename($) {
+    my($node) = @_;
+
+    (my $number = lc($xrefnodes{$node})) =~ s/.*-//;
+    my $fname="nasmdocx.html";
+    substr($fname,8 - length $number, length $number) = $number;
+    return $fname;
+}
+
+sub write_html {
+  # This is called from the top level, so I won't bother using
+  # my or local.
+
+  # Write contents file. Just the preamble, then a menu of links to the
+  # separate chapter files and the nodes therein.
+  print "writing contents file...";
+  open TEXT, '>', File::Spec->catfile($out_path, 'nasmdoc0.html');
+  select TEXT;
+  undef $html_nav_last;
+  $html_nav_next = $tstruct_next{'Top'};
+  &html_preamble(0);
+  print "<p>This manual documents NASM, the Netwide Assembler: an assembler\n";
+  print "targeting the Intel x86 series of processors, with portable source.\n</p>";
+  print "<div class=\"toc\">\n";
+  $level = 0;
+  for ($node = $tstruct_next{'Top'}; $node; $node = $tstruct_next{$node}) {
+      my $lastlevel = $level;
+      while ($tstruct_level{$node} < $level) {
+	  print "</li>\n</ol>\n";
+	  $level--;
+      }
+      while ($tstruct_level{$node} > $level) {
+	  print "<ol class=\"toc", ++$level, "\">\n";
+      }
+      if ($lastlevel >= $level) {
+	  print "</li>\n";
+      }
+      $level = $tstruct_level{$node};
+      if ($level == 1) {
+	  $link = $fname = html_filename($node);
+      } else {
+	  # Use the preceding filename plus a marker point.
+	  $link = $fname . "#$xrefnodes{$node}";
+      }
+      $pname = $tstruct_pname{$node};
+      $title = plist_to_html(@$pname);
+      print "<li class=\"toc${level}\">\n";
+      print "<span class=\"node\">$node: </span><a href=\"$link\">$title</a>\n";
+  }
+  while ($level--) {
+      print "</li>\n</ol>\n";
+  }
+  print "</div>\n";
+  print "</body>\n";
+  print "</html>\n";
+  select STDOUT;
+  close TEXT;
+
+  # Open a null file, to ensure output (eg random &html_jumppoints calls)
+  # goes _somewhere_.
+  print "writing chapter files...";
+  open TEXT, '>', File::Spec->devnull();
+  select TEXT;
+  undef $html_nav_last;
+  undef $html_nav_next;
+
+  $in_list = 0;
+  $in_bquo = 0;
+  $in_code = 0;
+
+  for ($para = 0; $para <= $#pnames; $para++) {
+    $pname = $pnames$para;
+    $pflags = $pflags$para;
+    $ptype = substr($pflags,0,4);
+
+    $in_code = 0, print "</pre>\n" if ($in_code && $ptype ne 'code');
+    $in_list = 0, print "</li>\n</ul>\n" if ($in_list && $ptype !~ /^(bull|indt|code)$/);
+    $in_bquo = 0, print "</blockquote>\n" if ($in_bquo && $ptype ne 'bquo');
+
+    $endtag = '';
+
+    if ($ptype eq "chap") {
+      # Chapter heading. Begin a new file.
+      $pflags =~ /chap (.*) :(.*)/;
+      $title = "Chapter $1: ";
+      $xref = $2;
+      &html_postamble; select STDOUT; close TEXT;
+      $html_nav_last = $chapternode;
+      $chapternode = $nodexrefs{$xref};
+      $html_nav_next = $tstruct_mnext{$chapternode};
+      open(TEXT, '>', File::Spec->catfile($out_path, html_filename($chapternode)));
+      select TEXT;
+      &html_preamble(1);
+      foreach $i (@$pname) {
+        $ww = &word_html($i);
+        $title .= $ww unless $ww eq "\001";
+      }
+      $h = "<h2 id=\"$xref\">$title</h2>\n";
+      print $h; print FULL $h;
+    } elsif ($ptype eq "appn") {
+      # Appendix heading. Begin a new file.
+      $pflags =~ /appn (.*) :(.*)/;
+      $title = "Appendix $1: ";
+      $xref = $2;
+      &html_postamble; select STDOUT; close TEXT;
+      $html_nav_last = $chapternode;
+      $chapternode = $nodexrefs{$xref};
+      $html_nav_next = $tstruct_mnext{$chapternode};
+      open(TEXT, '>', File::Spec->catfile($out_path, html_filename($chapternode)));
+      select TEXT;
+      &html_preamble(1);
+      foreach $i (@$pname) {
+        $ww = &word_html($i);
+        $title .= $ww unless $ww eq "\001";
+      }
+      print "<h2 id=\"$xref\">$title</h2>\n";
+    } elsif ($ptype eq "head" || $ptype eq "subh") {
+      # Heading or subheading.
+      $pflags =~ /.... (.*) :(.*)/;
+      $hdr = ($ptype eq "subh" ? "h4" : "h3");
+      $title = $1 . " ";
+      $xref = $2;
+      foreach $i (@$pname) {
+        $ww = &word_html($i);
+        $title .= $ww unless $ww eq "\001";
+      }
+      print "<$hdr id=\"$xref\">$title</$hdr>\n";
+    } elsif ($ptype eq "code") {
+	# Code paragraph.
+	$in_code = 1, print "<pre>" unless $in_code;
+	print "\n";
+	foreach $i (@$pname) {
+	    $w = $i;
+	    $w =~ s/&/&amp;/g;
+	    $w =~ s/</&lt;/g;
+	    $w =~ s/>/&gt;/g;
+	    print $w, "\n";
+	}
+    } elsif ($ptype =~ /^(norm|bull|indt|bquo)$/) {
+      # Ordinary paragraph, optionally indented.
+	if ($ptype eq 'bull') {
+	    if (!$in_list) {
+		$in_list = 1;
+		print "<ul>\n";
+	    } else {
+		print "</li>\n";
+	    }
+	    print "<li>\n";
+	    $line = '<p>';
+	    $endtag = '</p>';
+      } elsif ($ptype eq 'indt') {
+	  if (!$in_list) {
+	      $in_list = 1;
+	      print "<ul>\n";
+	      print "<li class=\"indt\">\n"; # This is such a hack
+	  }
+	  $line = '<p>';
+	  $endtag = '</p>';
+      } elsif ($ptype eq 'bquo') {
+	  $in_bquo = 1, print "<blockquote>\n" unless $in_bquo;
+	  $line = '<p>';
+	  $endtag = '</p>';
+      } else {
+        $line = '<p>';
+        $endtag = '</p>';
+      }
+      @a = @$pname;
+      $wd = $wprev = '';
+      do {
+        do { $w = &word_html(shift @a) } while $w eq "\001"; # nasty hack
+	$wd .= $wprev;
+	if ($w eq ' ' || $w eq '' || $w eq undef) {
+	  if (length ($line . $wd) > 75) {
+	    $line =~ s/\s*$//; # trim trailing spaces
+	    print "$line\n";
+	    $line = '';
+	    $wd =~ s/^\s*//; # trim leading spaces
+	  }
+	  $line .= $wd;
+	  $wd = '';
+	}
+	$wprev = $w;
+      } while ($w ne '' && $w ne undef);
+      if ($line =~ /\S/) {
+	$line =~ s/\s*$//; # trim trailing spaces
+	print $line;
+      }
+      print $endtag, "\n";
+    }
+  }
+
+  # Close whichever file was open.
+  print "</pre>\n" if ($in_code);
+  print "</li>\n</ul>\n" if ($in_list);
+  print "</blockquote>\n" if ($in_bquo);
+  &html_postamble; select STDOUT; close TEXT;
+
+  print "\n   writing index file...";
+  open TEXT, '>', File::Spec->catfile($out_path, 'nasmdoci.html');
+  select TEXT;
+  &html_preamble(0);
+  print "<h2 class=\"index\">Index</h2>\n";
+  print "<div class=\"index\">\n";
+  &html_index;
+  print "</div>\n\n</body>\n</html>\n";
+  select STDOUT;
+  close TEXT;
+}
+
+sub html_preamble {
+    print "<?xml version=\"1.0\" encoding=\"UTF-8\" standalone=\"no\" ?>\n";
+    print "<!DOCTYPE html PUBLIC \"-//W3C//DTD XHTML 1.1//EN\" ";
+    print "\"http://www.w3.org/TR/xhtml11/DTD/xhtml11.dtd\">\n";
+    print "<html xmlns=\"http://www.w3.org/1999/xhtml\">\n";
+    print "<head>\n";
+    print "<meta charset=\"UTF-8\" />\n";
+    print "<title>", $metadata{'title'}, "</title>\n";
+    print "<link href=\"nasmdoc.css\" rel=\"stylesheet\" type=\"text/css\" />\n";
+    print "<link href=\"local.css\" rel=\"stylesheet\" type=\"text/css\" />\n";
+    print "</head>\n";
+    print "<body>\n";
+
+    # Navigation bar
+    print "<ul class=\"navbar\">\n";
+    if (defined($html_nav_last)) {
+	my $lastf = html_filename($html_nav_last);
+	print "<li class=\"first\"><a class=\"prev\" href=\"$lastf\">$html_nav_last</a></li>\n";
+    }
+    if (defined($html_nav_next)) {
+	my $nextf = html_filename($html_nav_next);
+	print "<li><a class=\"next\" href=\"$nextf\">$html_nav_next</a></li>\n";
+    }
+    print "<li><a class=\"toc\" href=\"nasmdoc0.html\">Contents</a></li>\n";
+    print "<li class=\"last\"><a class=\"index\" href=\"nasmdoci.html\">Index</a></li>\n";
+    print "</ul>\n";
+
+    print "<div class=\"title\">\n";
+    print "<h1>", $metadata{'title'}, "</h1>\n";
+    print '<span class="subtitle">', $metadata{'subtitle'}, "</span>\n";
+    print "</div>\n";
+    print "<div class=\"contents\"\n>\n";
+}
+
+sub html_postamble {
+    # Common closing tags
+    print "</div>\n</body>\n</html>\n";
+}
+
+sub html_index {
+  my $itag, $a, @ientry, $sep, $w, $wd, $wprev, $line;
+
+  print "<ul>\n";
+
+  $chapternode = '';
+  foreach $itag (@itags) {
+    $ientry = $idxmap{$itag};
+    my @a = ('HDterm', @$ientry, 'HDref');
+    $sep = 0;
+    foreach $node (@nodes) {
+	next if !$idxnodes{$node,$itag};
+	my $xn = $xrefnodes{$node};
+	my $nn = $node;
+
+	# Text like "chapter", "appendix", "section", etc in the index
+	# makes it unnecessarily wide
+	$nn =~ s/^.*\s+//g;	# Remove all but the actual index information
+
+	push @a, 'n ,', 'sp' if $sep;
+	push @a, "x $xn", "n $nn", "xe$xn";
+	$sep = 1;
+    }
+    print "<li>\n";
+    while (defined($w = shift(@a))) {
+	die unless ($w =~ /^HD(.*)$/);
+	print "<div class=\"$1\">\n";
+
+	$line = '';
+	while ($w ne '' && $a0 !~ /^HD/) {
+	    $w = &word_html(shift @a);
+	    next if ($w eq "\001"); # Nasty hack
+
+	    if ($w =~ /^\s*$/ && length($line.$w) > 75) {
+		$line =~ s/\s*$//; # trim trailing spaces
+		print $line, "\n"; $line = '';
+	    }
+	    $line .= $w;
+	}
+	if ($line =~ /\S/) {
+	    $line =~ s/\s*$//; # trim trailing spaces
+	    print $line, "\n"; $line = '';
+	}
+	print "</div>\n";
+    }
+    print "</li>\n";
+  }
+
+  print "</ul>\n";
+}
+
+sub plist_to_html(@) {
+    my $ws = '';
+
+    foreach my $w (@_) {
+	my $ww = word_html($w);
+	next if ($ww eq "\001");
+	$ws .= $ww;
+    }
+
+    return $ws;
+}
+
+sub word_html($) {
+  my ($w) = @_;
+  my $wtype, $wmajt, $pfx, $sfx;
+
+  return undef if $w eq '' || $w eq undef;
+
+  $wtype = substr($w,0,2);
+  $wmajt = substr($wtype,0,1);
+  $w = substr($w,2);
+  $pfx = $sfx = '';
+  $pfx = "<a href=\"$1\">", $sfx = "</a>", $w = $2
+    if $wmajt eq "w" && $w =~ /^<(.*)>(.*)$/;
+  $w =~ s/&/&amp;/g;
+  $w =~ s/</&lt;/g;
+  $w =~ s/>/&gt;/g;
+  if ($wmajt eq "n" || $wtype eq "e " || $wtype eq "w ") {
+    return $pfx . $w . $sfx;
+  } elsif ($wtype eq "sp") {
+    return ' ';
+  } elsif ($wtype eq "da") {
+    return '&ndash;';
+  } elsif ($wtype eq "dm") {
+    return '&mdash;';
+  } elsif ($wmajt eq "c" || $wtype eq "wc") {
+    return $pfx . "<code>${w}</code>" . $sfx;
+  } elsif ($wtype eq "es") {
+    return "<em>${w}";
+  } elsif ($wtype eq "ee") {
+    return "${w}</em>";
+  } elsif ($wtype eq "eo") {
+    return "<em>${w}</em>";
+  } elsif ($wtype eq "x ") {
+    # Magic: we must resolve the cross reference into file and marker
+    # parts, then dispose of the file part if it's us, and dispose of
+    # the marker part if the cross reference describes the top node of
+    # another file.
+    my $node = $nodexrefs{$w}; # find the node we're aiming at
+    my $level = $tstruct_level{$node}; # and its level
+    my $up = $node, $uplev = $level-1;
+    $up = $tstruct_up{$up} while $uplev--; # get top node of containing file
+    my $file = ($up ne $chapternode) ? html_filename($up) : "";
+    my $marker = ($level == 1 and $file) ? "" : "#$w";
+    return "<a href=\"$file$marker\">";
+  } elsif ($wtype eq "xe") {
+    return "</a>";
+  } elsif ($wmajt eq "i") {
+    return "\001";
+  } else {
+    die "panic in word_html: $wtype$w\n";
+  }
+}
+
+# Make tree structures. $tstruct_* is top-level and global.
+sub add_item($$$) {
+  my ($item, $level, $para) = @_;
+  my $i;
+
+  $tstruct_pname{$item} = $para;
+  $tstruct_next{$tstruct_previtem} = $item;
+  $tstruct_prev{$item} = $tstruct_previtem;
+  $tstruct_level{$item} = $level;
+  $tstruct_up{$item} = $tstruct_last$level-1;
+  $tstruct_mnext{$tstruct_last$level} = $item;
+  $tstruct_last$level = $item;
+  for ($i=$level+1; $i<$MAXLEVEL; $i++) { $tstruct_last$i = undef; }
+  $tstruct_previtem = $item;
+  push @nodes, $item;
+}
+
+#
+# This produces documentation intermediate paragraph format; this is
+# basically the digested output of the front end.  Intended for use
+# by future backends, instead of putting it all in the same script.
+#
+sub write_dip {
+  open(PARAS, '>', File::Spec->catfile($out_path, 'nasmdoc.dip'));
+  foreach $k (sort(keys(%metadata))) {
+      print PARAS 'meta :', $k, "\n";
+      print PARAS $metadata{$k},"\n";
+  }
+  for ($para = 0; $para <= $#pnames; $para++) {
+      print PARAS $pflags$para, "\n";
+      print PARAS join("\037", @{$pnames$para}, "\n");
+  }
+  foreach $k (@itags) {
+      print PARAS 'indx :', $k, "\n";
+      print PARAS join("\037", @{$idxmap{$k}}), "\n";
+  }
+  close(PARAS);
+}

_service:tar_scm:nasm-2.16.03.tar.xz/doc/ttfmetrics.ph Added

@@ -0,0 +1,63 @@
+#!/usr/bin/perl
+
+use Font::TTF::Font;
+use Font::TTF::Head;
+use Font::TTF::Hmtx;
+use Font::TTF::Cmap;
+use Font::TTF::Maxp;
+use Font::TTF::PSNames;
+use Font::TTF::Post;
+
+use strict;
+
+sub parse_ttf_file($) {
+    my($filename) = @_;
+
+    my $fontdata = {
+	widths => {},
+	kern => {}
+    };
+
+    my $f = Font::TTF::Font->open($filename);
+
+    return undef if (!defined($f));
+
+    $fontdata->{file} = $filename;
+    $fontdata->{type} = defined($f->{' CFF'}) ? 'otf' : 'ttf';
+
+    $f->{head}->read();
+    $fontdata->{scale} = $f->{head}{unitsPerEm};
+
+    $f->{maxp}->read();
+    my $glyphs = $f->{maxp}{numGlyphs};
+
+    $f->{cmap}->read();
+    $f->{hmtx}->read();
+    $f->{name}->read();
+    $fontdata->{name} = $f->{name}->find_name(6); # PostScript name
+    $f->{post}->read();
+    my $psglyphs = 0;
+    my $psmap = $f->{post}->{VAL};
+    $psmap =  if (!defined($psmap));
+    #printf "Glyphs with PostScript names: %d\n", scalar(@$psmap);
+
+    # Can be done as an array of arrays in case of multiple unicodes to
+    # one glyph...
+    my @unimap = $f->{cmap}->reverse();
+
+    for (my $i = 0; $i < $glyphs; $i++) {
+	my $width = $f->{hmtx}->{advance}$i;
+	my $psname = $psmap->$i;
+	if (!defined($psname)) {
+	    $psname = Font::TTF::PSNames::lookup($unimap$i);
+	}
+	next if (!defined($psname) || ($psname eq '.notdef'));
+	$fontdata->{widths}{$psname} = $f->{hmtx}->{advance}$i;
+    }
+
+    $f->release;
+
+    return $fontdata;
+}
+
+1;

_service:tar_scm:nasm-2.16.03.tar.xz/doc/warnings.src Added

@@ -0,0 +1,793 @@
+
+\IR{w-all} warning class, \c{all}
+\IR{w-bad-pragma} warning class, \c{bad-pragma}
+\IR{w-bnd} warning class, \c{bnd}
+\IR{w-db-empty} warning class, \c{db-empty}
+\IR{w-ea} warning class, \c{ea}
+\IR{w-ea-absolute} warning class, \c{ea-absolute}
+\IR{w-ea-dispsize} warning class, \c{ea-dispsize}
+\IR{w-environment} warning class, \c{environment}
+\IR{w-float} warning class, \c{float}
+\IR{w-float-denorm} warning class, \c{float-denorm}
+\IR{w-float-overflow} warning class, \c{float-overflow}
+\IR{w-float-toolong} warning class, \c{float-toolong}
+\IR{w-float-underflow} warning class, \c{float-underflow}
+\IR{w-forward} warning class, \c{forward}
+\IR{w-hle} warning class, \c{hle}
+\IR{w-label} warning class, \c{label}
+\IR{w-label-orphan} warning class, \c{label-orphan}
+\IR{w-label-redef} warning class, \c{label-redef}
+\IR{w-label-redef-late} warning class, \c{label-redef-late}
+\IR{w-lock} warning class, \c{lock}
+\IR{w-macro-def-case-single} warning class, \c{macro-def-case-single}
+\IR{w-macro-def-greedy-single} warning class, \c{macro-def-greedy-single}
+\IR{w-macro-def-param-single} warning class, \c{macro-def-param-single}
+\IR{w-macro-defaults} warning class, \c{macro-defaults}
+\IR{w-macro-params-legacy} warning class, \c{macro-params-legacy}
+\IR{w-macro-params-multi} warning class, \c{macro-params-multi}
+\IR{w-macro-params-single} warning class, \c{macro-params-single}
+\IR{w-negative-rep} warning class, \c{negative-rep}
+\IR{w-not-my-pragma} warning class, \c{not-my-pragma}
+\IR{w-number-overflow} warning class, \c{number-overflow}
+\IR{w-obsolete} warning class, \c{obsolete}
+\IR{w-obsolete-nop} warning class, \c{obsolete-nop}
+\IR{w-obsolete-removed} warning class, \c{obsolete-removed}
+\IR{w-obsolete-valid} warning class, \c{obsolete-valid}
+\IR{w-orphan-labels} warning class, \c{orphan-labels}
+\IR{w-other} warning class, \c{other}
+\IR{w-phase} warning class, \c{phase}
+\IR{w-pp} warning class, \c{pp}
+\IR{w-pp-else} warning class, \c{pp-else}
+\IR{w-pp-else-elif} warning class, \c{pp-else-elif}
+\IR{w-pp-else-else} warning class, \c{pp-else-else}
+\IR{w-pp-empty-braces} warning class, \c{pp-empty-braces}
+\IR{w-pp-environment} warning class, \c{pp-environment}
+\IR{w-pp-macro} warning class, \c{pp-macro}
+\IR{w-pp-macro-def} warning class, \c{pp-macro-def}
+\IR{w-pp-macro-def-case-single} warning class, \c{pp-macro-def-case-single}
+\IR{w-pp-macro-def-greedy-single} warning class, \c{pp-macro-def-greedy-single}
+\IR{w-pp-macro-def-param-single} warning class, \c{pp-macro-def-param-single}
+\IR{w-pp-macro-defaults} warning class, \c{pp-macro-defaults}
+\IR{w-pp-macro-params} warning class, \c{pp-macro-params}
+\IR{w-pp-macro-params-legacy} warning class, \c{pp-macro-params-legacy}
+\IR{w-pp-macro-params-multi} warning class, \c{pp-macro-params-multi}
+\IR{w-pp-macro-params-single} warning class, \c{pp-macro-params-single}
+\IR{w-pp-macro-redef-multi} warning class, \c{pp-macro-redef-multi}
+\IR{w-pp-open} warning class, \c{pp-open}
+\IR{w-pp-open-braces} warning class, \c{pp-open-braces}
+\IR{w-pp-open-brackets} warning class, \c{pp-open-brackets}
+\IR{w-pp-open-string} warning class, \c{pp-open-string}
+\IR{w-pp-rep-negative} warning class, \c{pp-rep-negative}
+\IR{w-pp-sel-range} warning class, \c{pp-sel-range}
+\IR{w-pp-trailing} warning class, \c{pp-trailing}
+\IR{w-pragma} warning class, \c{pragma}
+\IR{w-pragma-bad} warning class, \c{pragma-bad}
+\IR{w-pragma-empty} warning class, \c{pragma-empty}
+\IR{w-pragma-na} warning class, \c{pragma-na}
+\IR{w-pragma-unknown} warning class, \c{pragma-unknown}
+\IR{w-prefix} warning class, \c{prefix}
+\IR{w-prefix-bnd} warning class, \c{prefix-bnd}
+\IR{w-prefix-hle} warning class, \c{prefix-hle}
+\IR{w-prefix-lock} warning class, \c{prefix-lock}
+\IR{w-prefix-lock-error} warning class, \c{prefix-lock-error}
+\IR{w-prefix-lock-xchg} warning class, \c{prefix-lock-xchg}
+\IR{w-prefix-opsize} warning class, \c{prefix-opsize}
+\IR{w-prefix-seg} warning class, \c{prefix-seg}
+\IR{w-ptr} warning class, \c{ptr}
+\IR{w-regsize} warning class, \c{regsize}
+\IR{w-reloc} warning class, \c{reloc}
+\IR{w-reloc-abs} warning class, \c{reloc-abs}
+\IR{w-reloc-abs-byte} warning class, \c{reloc-abs-byte}
+\IR{w-reloc-abs-dword} warning class, \c{reloc-abs-dword}
+\IR{w-reloc-abs-qword} warning class, \c{reloc-abs-qword}
+\IR{w-reloc-abs-word} warning class, \c{reloc-abs-word}
+\IR{w-reloc-rel} warning class, \c{reloc-rel}
+\IR{w-reloc-rel-byte} warning class, \c{reloc-rel-byte}
+\IR{w-reloc-rel-dword} warning class, \c{reloc-rel-dword}
+\IR{w-reloc-rel-qword} warning class, \c{reloc-rel-qword}
+\IR{w-reloc-rel-word} warning class, \c{reloc-rel-word}
+\IR{w-unknown-pragma} warning class, \c{unknown-pragma}
+\IR{w-unknown-warning} warning class, \c{unknown-warning}
+\IR{w-user} warning class, \c{user}
+\IR{w-warn-stack-empty} warning class, \c{warn-stack-empty}
+\IR{w-zeroing} warning class, \c{zeroing}
+\IR{w-zext-reloc} warning class, \c{zext-reloc}
+
+\b \I{w-all} \c{all}: all possible warnings
+
+\> \c{all} is an group alias for \e{all} warning classes.  Thus, \c{-w+all}
+enables all available warnings, and \c{-w-all} disables warnings
+entirely (since NASM 2.13).
+
+\b \I{w-bad-pragma} \c{bad-pragma}: malformed \c{%pragma}
+
+\> \c{bad-pragma} is a backwards compatibility alias for \c{pragma-bad}.
+
+\b \I{w-bnd} \c{bnd}: invalid \c{BND} prefix
+
+\> \c{bnd} is a backwards compatibility alias for \c{prefix-bnd}.
+
+\b \I{w-db-empty} \c{db-empty}: no operand for data declaration
+
+\> \c{db-empty} warns about a \c{D}\e{x} declaration
+with no operands, producing no output.
+This is permitted, but often indicative of an error.
+See \k{db}.
+
+\> Enabled by default.
+
+\b \I{w-ea} \c{ea}: all \c{ea-} warnings
+
+\> \c{ea} is a group alias for all warning classes
+prefixed by \c{ea-}; currently
+\c{ea-absolute} and \c{ea-dispsize}.
+
+\b \I{w-ea-absolute} \c{ea-absolute}: absolute address cannot be RIP-relative
+
+\> \c{ea-absolute} warns that an address that is inherently absolute cannot
+be generated with RIP-relative encoding using \c{REL},
+see \k{REL & ABS}.
+
+\> Enabled by default.
+
+\b \I{w-ea-dispsize} \c{ea-dispsize}: displacement size ignored on absolute address
+
+\> \c{ea-dispsize} warns that NASM does not support generating displacements for
+inherently absolute addresses that do not match the address size
+of the instruction.
+
+\> Enabled by default.
+
+\b \I{w-environment} \c{environment}: nonexistent environment variable
+
+\> \c{environment} is a backwards compatibility alias for \c{pp-environment}.
+
+\b \I{w-float} \c{float}: all \c{float-} warnings
+
+\> \c{float} is a group alias for all warning classes
+prefixed by \c{float-}; currently
+\c{float-denorm}, \c{float-overflow}, \c{float-toolong}, \c{float-underflow}.
+
+\b \I{w-float-denorm} \c{float-denorm}: floating point denormal
+
+\> \c{float-denorm} warns about denormal floating point constants.
+
+\> Disabled by default.
+
+\b \I{w-float-overflow} \c{float-overflow}: floating point overflow
+
+\> \c{float-overflow} warns about floating point underflow.
+
+\> Enabled by default.
+
+\b \I{w-float-toolong} \c{float-toolong}: too many digits in floating-point number
+
+\> \c{float-toolong} warns about too many digits in floating-point numbers.
+
+\> Enabled by default.
+
+\b \I{w-float-underflow} \c{float-underflow}: floating point underflow
+
+\> \c{float-underflow} warns about floating point underflow (a nonzero
+constant rounded to zero.)
+
+\> Disabled by default.
+
+\b \I{w-forward} \c{forward}: forward reference may have unpredictable results
+
+\> \c{forward} warns that a forward reference is used which may have
+unpredictable results, notably in a \c{RESB}-type
+pseudo-instruction. These would be \i\e{critical
+expressions} (see \k{crit}) but are permitted in a
+handful of cases for compatibility with older
+versions of NASM. This warning should be treated as a
+severe programming error as the code could break at
+any time for any number of reasons.
+
+\> Enabled by default.
+
+\b \I{w-hle} \c{hle}: invalid HLE prefix
+
+\> \c{hle} is a backwards compatibility alias for \c{prefix-hle}.
+
+\b \I{w-label} \c{label}: all \c{label-} warnings
+
+\> \c{label} is a group alias for all warning classes
+prefixed by \c{label-}; currently
+\c{label-orphan}, \c{label-redef}, \c{label-redef-late}.
+
+\b \I{w-label-orphan} \c{label-orphan}: labels alone on lines without trailing \c{:}
+
+\> \c{label-orphan} warns about source lines which contain no instruction but define
+a label without a trailing colon. This is most likely indicative
+of a typo, but is technically correct NASM syntax (see \k{syntax}.)
+
+\> Enabled by default.
+
+\b \I{w-label-redef} \c{label-redef}: label redefined to an identical value
+
+\> \c{label-redef} warns if a label is defined more than once, but the
+value is identical. It is an unconditional error to
+define the same label more than once to \e{different} values.
+
+\> Disabled by default.
+
+\b \I{w-label-redef-late} \c{label-redef-late}: label (re)defined during code generation
+
+\> \c{label-redef-late} the value of a label changed during the final, code-generation
+pass. This may be the result of strange use of the
+preprocessor. This is very likely to produce incorrect code and
+may end up being an unconditional error in a future
+version of NASM.
+
+\> Enabled and promoted to error by default.
+
+\b \I{w-lock} \c{lock}: \c{LOCK} prefix on unlockable instruction
+
+\> \c{lock} is a backwards compatibility alias for \c{prefix-lock-error}.
+
+\b \I{w-macro-def-case-single} \c{macro-def-case-single}: single-line macro defined both case sensitive and insensitive
+
+\> \c{macro-def-case-single} is a backwards compatibility alias for \c{pp-macro-def-case-single}.
+
+\b \I{w-macro-def-greedy-single} \c{macro-def-greedy-single}: single-line macro
+
+\> \c{macro-def-greedy-single} is a backwards compatibility alias for \c{pp-macro-def-greedy-single}.
+
+\b \I{w-macro-def-param-single} \c{macro-def-param-single}: single-line macro defined with and without parameters
+
+\> \c{macro-def-param-single} is a backwards compatibility alias for \c{pp-macro-def-param-single}.
+
+\b \I{w-macro-defaults} \c{macro-defaults}: macros with more default than optional parameters
+
+\> \c{macro-defaults} is a backwards compatibility alias for \c{pp-macro-defaults}.
+
+\b \I{w-macro-params-legacy} \c{macro-params-legacy}: improperly calling multi-line macro for legacy support
+
+\> \c{macro-params-legacy} is a backwards compatibility alias for \c{pp-macro-params-legacy}.
+
+\b \I{w-macro-params-multi} \c{macro-params-multi}: multi-line macro calls with wrong parameter count
+
+\> \c{macro-params-multi} is a backwards compatibility alias for \c{pp-macro-params-multi}.
+
+\b \I{w-macro-params-single} \c{macro-params-single}: single-line macro calls with wrong parameter count
+
+\> \c{macro-params-single} is a backwards compatibility alias for \c{pp-macro-params-single}.
+
+\b \I{w-negative-rep} \c{negative-rep}: regative \c{%rep} count
+
+\> \c{negative-rep} is a backwards compatibility alias for \c{pp-rep-negative}.
+
+\b \I{w-not-my-pragma} \c{not-my-pragma}: \c{%pragma} not applicable to this compilation
+
+\> \c{not-my-pragma} is a backwards compatibility alias for \c{pragma-na}.
+
+\b \I{w-number-overflow} \c{number-overflow}: numeric constant does not fit
+
+\> \c{number-overflow} covers warnings about numeric constants which
+don't fit in 64 bits.
+
+\> Enabled by default.
+
+\b \I{w-obsolete} \c{obsolete}: all \c{obsolete-} warnings
+
+\> \c{obsolete} is a group alias for all warning classes
+prefixed by \c{obsolete-}; currently
+\c{obsolete-nop}, \c{obsolete-removed}, \c{obsolete-valid}.
+
+\b \I{w-obsolete-nop} \c{obsolete-nop}: instruction obsolete and is a noop on the target CPU
+
+\> \c{obsolete-nop} warns for an instruction which has been removed
+from the architecture, but has been architecturally
+defined to be a noop for future CPUs.
+
+\> Enabled by default.
+
+\b \I{w-obsolete-removed} \c{obsolete-removed}: instruction obsolete and removed on the target CPU
+
+\> \c{obsolete-removed} warns for an instruction which has been removed
+from the architecture, and is no longer included
+in the CPU definition given in the \c{CPU}
+directive, for example \c{POP CS}, the opcode for
+which, \c{0Fh}, instead is an opcode prefix on
+CPUs newer than the first generation 8086.
+
+\> Enabled by default.
+
+\b \I{w-obsolete-valid} \c{obsolete-valid}: instruction obsolete but valid on the target CPU
+
+\> \c{obsolete-valid} warns for an instruction which has been removed
+from the architecture, but is still valid on the
+specific CPU given in the \c{CPU} directive. Code
+using these instructions is most likely not
+forward compatible.
+
+\> Enabled by default.
+
+\b \I{w-orphan-labels} \c{orphan-labels}: labels alone on lines without trailing \c{:}
+
+\> \c{orphan-labels} is a backwards compatibility alias for \c{label-orphan}.
+
+\b \I{w-other} \c{other}: any warning not specifically mentioned above
+
+\> \c{other} specifies any warning not included in any specific warning class.
+
+\> Enabled by default.
+
+\b \I{w-phase} \c{phase}: phase error during stabilization
+
+\> \c{phase} warns about symbols having changed values during
+the second-to-last assembly pass. This is not
+inherently fatal, but may be a source of bugs.
+
+\> Disabled by default.
+
+\b \I{w-pp} \c{pp}: all \c{pp-} warnings
+
+\> \c{pp} is a group alias for all warning classes
+prefixed by \c{pp-}; currently
+\c{pp-else-elif}, \c{pp-else-else}, \c{pp-empty-braces}, \c{pp-environment}, \c{pp-macro-def-case-single}, \c{pp-macro-def-greedy-single}, \c{pp-macro-def-param-single}, \c{pp-macro-defaults}, \c{pp-macro-params-legacy}, \c{pp-macro-params-multi}, \c{pp-macro-params-single}, \c{pp-macro-redef-multi}, \c{pp-open-braces}, \c{pp-open-brackets}, \c{pp-open-string}, \c{pp-rep-negative}, \c{pp-sel-range}, \c{pp-trailing}.
+
+\b \I{w-pp-else} \c{pp-else}: all \c{pp-else-} warnings
+
+\> \c{pp-else} is a group alias for all warning classes
+prefixed by \c{pp-else-}; currently
+\c{pp-else-elif} and \c{pp-else-else}.
+
+\b \I{w-pp-else-elif} \c{pp-else-elif}: \c{%elif} after \c{%else}
+
+\> \c{pp-else-elif} warns that an \c{%elif}-type directive was encountered
+after \c{%else} has already been encounted. As a result, the
+content of the \c{%elif} will never be expanded.
+
+\> Enabled by default.
+
+\b \I{w-pp-else-else} \c{pp-else-else}: \c{%else} after \c{%else}
+
+\> \c{pp-else-else} warns that a second \c{%else} clause was found for
+the same \c{%if} statement. The content of this \c{%else}
+clause will never be expanded.
+
+\> Enabled by default.
+
+\b \I{w-pp-empty-braces} \c{pp-empty-braces}: empty \c{%\{\}} construct
+
+\> \c{pp-empty-braces} warns that an empty \c{%\{\}} was encountered.
+This expands to a single \c{%} character, which
+is normally the \c{%} arithmetic operator.
+
+\> Enabled by default.
+
+\b \I{w-pp-environment} \c{pp-environment}: nonexistent environment variable
+
+\> \c{pp-environment} warns if a nonexistent environment variable
+is accessed using the \c{%!} preprocessor
+construct (see \k{getenv}.)  Such environment
+variables are treated as empty (with this
+warning issued) starting in NASM 2.15;
+earlier versions of NASM would treat this as
+an error.
+
+\> Enabled by default.
+
+\b \I{w-pp-macro} \c{pp-macro}: all \c{pp-macro-} warnings
+
+\> \c{pp-macro} is a group alias for all warning classes
+prefixed by \c{pp-macro-}; currently
+\c{pp-macro-def-case-single}, \c{pp-macro-def-greedy-single}, \c{pp-macro-def-param-single}, \c{pp-macro-defaults}, \c{pp-macro-params-legacy}, \c{pp-macro-params-multi}, \c{pp-macro-params-single}, \c{pp-macro-redef-multi}.
+
+\b \I{w-pp-macro-def} \c{pp-macro-def}: all \c{pp-macro-def-} warnings
+
+\> \c{pp-macro-def} is a group alias for all warning classes
+prefixed by \c{pp-macro-def-}; currently
+\c{pp-macro-def-case-single}, \c{pp-macro-def-greedy-single}, \c{pp-macro-def-param-single}.
+
+\b \I{w-pp-macro-def-case-single} \c{pp-macro-def-case-single}: single-line macro defined both case sensitive and insensitive
+
+\> \c{pp-macro-def-case-single} warns when a single-line macro is defined both case
+sensitive and case insensitive.
+The new macro
+definition will override (shadow) the original one,
+although the original macro is not deleted, and will
+be re-exposed if the new macro is deleted with
+\c{%undef}, or, if the original macro is the case
+insensitive one, the macro call is done with a
+different case.
+
+\> Enabled by default.
+
+\b \I{w-pp-macro-def-greedy-single} \c{pp-macro-def-greedy-single}: single-line macro
+
+\> \c{pp-macro-def-greedy-single} definition shadows greedy macro warns when a
+single-line macro is defined which would match a
+previously existing greedy definition.  The new macro
+definition will override (shadow) the original one,
+although the original macro is not deleted, and will
+be re-exposed if the new macro is deleted with
+\c{%undef}, and will be invoked if called with a
+parameter count that does not match the new definition.
+
+\> Enabled by default.
+
+\b \I{w-pp-macro-def-param-single} \c{pp-macro-def-param-single}: single-line macro defined with and without parameters
+
+\> \c{pp-macro-def-param-single} warns if the same single-line macro is defined with and
+without parameters.
+The new macro
+definition will override (shadow) the original one,
+although the original macro is not deleted, and will
+be re-exposed if the new macro is deleted with
+\c{%undef}.
+
+\> Enabled and promoted to error by default.
+
+\b \I{w-pp-macro-defaults} \c{pp-macro-defaults}: macros with more default than optional parameters
+
+\> \c{pp-macro-defaults} warns when a macro has more default parameters than optional parameters.
+See \k{mlmacdef} for why might want to disable this warning.
+
+\> Enabled by default.
+
+\b \I{w-pp-macro-params} \c{pp-macro-params}: all \c{pp-macro-params-} warnings
+
+\> \c{pp-macro-params} is a group alias for all warning classes
+prefixed by \c{pp-macro-params-}; currently
+\c{pp-macro-params-legacy}, \c{pp-macro-params-multi}, \c{pp-macro-params-single}.
+
+\b \I{w-pp-macro-params-legacy} \c{pp-macro-params-legacy}: improperly calling multi-line macro for legacy support
+
+\> \c{pp-macro-params-legacy} warns about \i{multi-line macros} being invoked
+with the wrong number of parameters, but for bug-compatibility
+with NASM versions older than 2.15, NASM tried to fix up the
+parameters to match the legacy behavior and call the macro anyway.
+This can happen in certain cases where there are empty arguments
+without braces, sometimes as a result of macro expansion.
+
+\> The legacy behavior is quite strange and highly context-dependent,
+and can be disabled with:
+
+\c      %pragma preproc sane_empty_expansion true
+
+\> It is highly recommended to use this option in new code.
+
+\> Enabled by default.
+
+\b \I{w-pp-macro-params-multi} \c{pp-macro-params-multi}: multi-line macro calls with wrong parameter count
+
+\> \c{pp-macro-params-multi} warns about \i{multi-line macros} being invoked
+with the wrong number of parameters. See \k{mlmacover} for an
+example of why you might want to disable this warning.
+
+\> Enabled by default.
+
+\b \I{w-pp-macro-params-single} \c{pp-macro-params-single}: single-line macro calls with wrong parameter count
+
+\> \c{pp-macro-params-single} warns about \i{single-line macros} being invoked
+with the wrong number of parameters.
+
+\> Enabled by default.
+
+\b \I{w-pp-macro-redef-multi} \c{pp-macro-redef-multi}: redefining multi-line macro
+
+\> \c{pp-macro-redef-multi} warns that a multi-line macro is being redefined,
+without first removing the old definition with
+\c{%unmacro}.
+
+\> Enabled by default.
+
+\b \I{w-pp-open} \c{pp-open}: all \c{pp-open-} warnings
+
+\> \c{pp-open} is a group alias for all warning classes
+prefixed by \c{pp-open-}; currently
+\c{pp-open-braces}, \c{pp-open-brackets}, \c{pp-open-string}.
+
+\b \I{w-pp-open-braces} \c{pp-open-braces}: unterminated \c{%\{...\}}
+
+\> \c{pp-open-braces} warns that a preprocessor parameter
+enclosed in braces \c{%\{...\}} lacks the
+terminating \c{\}} character.
+
+\> Enabled by default.
+
+\b \I{w-pp-open-brackets} \c{pp-open-brackets}: unterminated \c{%...}
+
+\> \c{pp-open-brackets} warns that a preprocessor \c{%...} construct
+lacks the terminating \c{} character.
+
+\> Enabled by default.
+
+\b \I{w-pp-open-string} \c{pp-open-string}: unterminated string
+
+\> \c{pp-open-string} warns that a quoted string without a closing quotation
+mark was encountered during preprocessing.
+
+\> Enabled by default.
+
+\b \I{w-pp-rep-negative} \c{pp-rep-negative}: regative \c{%rep} count
+
+\> \c{pp-rep-negative} warns about a negative count given to the \c{%rep}
+preprocessor directive.
+
+\> Enabled by default.
+
+\b \I{w-pp-sel-range} \c{pp-sel-range}: \c{%sel()} argument out of range
+
+\> \c{pp-sel-range} warns that the \c{%sel()} preprocessor function was passed
+a value less than 1 or larger than the number of available
+arguments.
+
+\> Enabled by default.
+
+\b \I{w-pp-trailing} \c{pp-trailing}: trailing garbage ignored
+
+\> \c{pp-trailing} warns that the preprocessor encountered additional text
+where no such text was expected. This can
+sometimes be the result of an incorrectly written expression,
+or arguments that are inadvertently separated.
+
+\> Enabled by default.
+
+\b \I{w-pragma} \c{pragma}: all \c{pragma-} warnings
+
+\> \c{pragma} is a group alias for all warning classes
+prefixed by \c{pragma-}; currently
+\c{pragma-bad}, \c{pragma-empty}, \c{pragma-na}, \c{pragma-unknown}.
+
+\b \I{w-pragma-bad} \c{pragma-bad}: malformed \c{%pragma}
+
+\> \c{pragma-bad} warns about a malformed or otherwise unparsable
+\c{%pragma} directive.
+
+\> Disabled by default.
+
+\b \I{w-pragma-empty} \c{pragma-empty}: empty \c{%pragma} directive
+
+\> \c{pragma-empty} warns about a \c{%pragma} directive containing nothing.
+This is treated identically to \c{%pragma ignore} except
+for this optional warning.
+
+\> Disabled by default.
+
+\b \I{w-pragma-na} \c{pragma-na}: \c{%pragma} not applicable to this compilation
+
+\> \c{pragma-na} warns about a \c{%pragma} directive which is not applicable to
+this particular assembly session.  This is not yet implemented.
+
+\> Disabled by default.
+
+\b \I{w-pragma-unknown} \c{pragma-unknown}: unknown \c{%pragma} facility or directive
+
+\> \c{pragma-unknown} warns about an unknown \c{%pragma} directive.
+This is not yet implemented for most cases.
+
+\> Disabled by default.
+
+\b \I{w-prefix} \c{prefix}: all \c{prefix-} warnings
+
+\> \c{prefix} is a group alias for all warning classes
+prefixed by \c{prefix-}; currently
+\c{prefix-bnd}, \c{prefix-hle}, \c{prefix-lock-error}, \c{prefix-lock-xchg}, \c{prefix-opsize}, \c{prefix-seg}.
+
+\b \I{w-prefix-bnd} \c{prefix-bnd}: invalid \c{BND} prefix
+
+\> \c{prefix-bnd} warns about ineffective use of the \c{BND} prefix when the
+\c{JMP} instruction is converted to the \c{SHORT} form.
+This should be extremely rare since the short \c{JMP} only
+is applicable to jumps inside the same module, but if
+it is legitimate, it may be necessary to use
+\c{bnd jmp dword}.
+
+\> Enabled by default.
+
+\b \I{w-prefix-hle} \c{prefix-hle}: invalid HLE prefix
+
+\> \c{prefix-hle} warns about invalid use of the HLE \c{XACQUIRE} or \c{XRELEASE}
+prefixes.
+
+\> Enabled by default.
+
+\b \I{w-prefix-lock} \c{prefix-lock}: all \c{prefix-lock-} warnings
+
+\> \c{prefix-lock} is a group alias for all warning classes
+prefixed by \c{prefix-lock-}; currently
+\c{prefix-lock-error} and \c{prefix-lock-xchg}.
+
+\b \I{w-prefix-lock-error} \c{prefix-lock-error}: \c{LOCK} prefix on unlockable instruction
+
+\> \c{prefix-lock-error} warns about \c{LOCK} prefixes on unlockable instructions.
+
+\> Enabled by default.
+
+\b \I{w-prefix-lock-xchg} \c{prefix-lock-xchg}: superfluous \c{LOCK} prefix on \c{XCHG} instruction
+
+\> \c{prefix-lock-xchg} warns about a \c{LOCK} prefix added to an \c{XCHG} instruction.
+The \c{XCHG} instruction is \e{always} locking, and so this
+prefix is not necessary; however, NASM will generate it if
+explicitly provided by the user, so this warning indicates that
+suboptimal code is being generated.
+
+\> Enabled by default.
+
+\b \I{w-prefix-opsize} \c{prefix-opsize}: invalid operand size prefix
+
+\> \c{prefix-opsize} warns that an operand prefix (\c{o16}, \c{o32}, \c{o64},
+\c{osp}) invalid for the specified instruction has been specified.
+The operand prefix will be ignored by the assembler.
+
+\> Enabled by default.
+
+\b \I{w-prefix-seg} \c{prefix-seg}: segment prefix ignored in 64-bit mode
+
+\> \c{prefix-seg} warns that an \c{es}, \c{cs}, \c{ss} or \c{ds} segment override
+prefix has no effect in 64-bit mode. The prefix will still be
+generated as requested.
+
+\> Enabled by default.
+
+\b \I{w-ptr} \c{ptr}: non-NASM keyword used in other assemblers
+
+\> \c{ptr} warns about keywords used in other assemblers that
+might indicate a mistake in the source code.
+Currently only the MASM \c{PTR} keyword is
+recognized. If (limited) MASM compatibility is
+desired, the \c{%use masm} macro package is
+available, see \k{pkg_masm}; however, carefully note
+the caveats listed.
+
+\> Enabled by default.
+
+\b \I{w-regsize} \c{regsize}: register size specification ignored
+
+\> \c{regsize} warns about a register with implicit size (such as \c{EAX}, which is always 32 bits)
+been given an explicit size specification which is inconsistent with the size
+of the named register, e.g. \c{WORD EAX}. \c{DWORD EAX} or \c{WORD AX} are
+permitted, and do not trigger this warning. Some registers which \e{do not} imply
+a specific size, such as \c{K0}, may need this specification unless the instruction
+itself implies the instruction size:
+
+\c      KMOVW K0,foo          ; Permitted, KMOVW implies 16 bits
+\c      KMOV  WORD K0,foo     ; Permitted, WORD K0 specifies instruction size
+\c      KMOV  K0,WORD foo     ; Permitted, WORD foo specifies instruction size
+\c      KMOV  K0,foo          ; Not permitted, instruction size ambiguous
+
+\> Enabled by default.
+
+\b \I{w-reloc} \c{reloc}: all \c{reloc-} warnings
+
+\> \c{reloc} is a group alias for all warning classes
+prefixed by \c{reloc-}; currently
+\c{reloc-abs-byte}, \c{reloc-abs-dword}, \c{reloc-abs-qword}, \c{reloc-abs-word}, \c{reloc-rel-byte}, \c{reloc-rel-dword}, \c{reloc-rel-qword}, \c{reloc-rel-word}.
+
+\b \I{w-reloc-abs} \c{reloc-abs}: all \c{reloc-abs-} warnings
+
+\> \c{reloc-abs} is a group alias for all warning classes
+prefixed by \c{reloc-abs-}; currently
+\c{reloc-abs-byte}, \c{reloc-abs-dword}, \c{reloc-abs-qword}, \c{reloc-abs-word}.
+
+\b \I{w-reloc-abs-byte} \c{reloc-abs-byte}: 8-bit absolute section-crossing relocation
+
+\> \c{reloc-abs-byte} warns that an 8-bit absolute relocation that could
+not be resolved at assembly time was generated in
+the output format.
+This is usually normal, but may not be handled by all
+possible target environments
+
+\> Disabled by default.
+
+\b \I{w-reloc-abs-dword} \c{reloc-abs-dword}: 32-bit absolute section-crossing relocation
+
+\> \c{reloc-abs-dword} warns that a 32-bit absolute relocation that could
+not be resolved at assembly time was generated in
+the output format.
+This is usually normal, but may not be handled by all
+possible target environments
+
+\> Disabled by default.
+
+\b \I{w-reloc-abs-qword} \c{reloc-abs-qword}: 64-bit absolute section-crossing relocation
+
+\> \c{reloc-abs-qword} warns that a 64-bit absolute relocation that could
+not be resolved at assembly time was generated in
+the output format.
+This is usually normal, but may not be handled by all
+possible target environments
+
+\> Disabled by default.
+
+\b \I{w-reloc-abs-word} \c{reloc-abs-word}: 16-bit absolute section-crossing relocation
+
+\> \c{reloc-abs-word} warns that a 16-bit absolute relocation that could
+not be resolved at assembly time was generated in
+the output format.
+This is usually normal, but may not be handled by all
+possible target environments
+
+\> Disabled by default.
+
+\b \I{w-reloc-rel} \c{reloc-rel}: all \c{reloc-rel-} warnings
+
+\> \c{reloc-rel} is a group alias for all warning classes
+prefixed by \c{reloc-rel-}; currently
+\c{reloc-rel-byte}, \c{reloc-rel-dword}, \c{reloc-rel-qword}, \c{reloc-rel-word}.
+
+\b \I{w-reloc-rel-byte} \c{reloc-rel-byte}: 8-bit relative section-crossing relocation
+
+\> \c{reloc-rel-byte} warns that an 8-bit relative relocation that could
+not be resolved at assembly time was generated in
+the output format.
+This is usually normal, but may not be handled by all
+possible target environments
+
+\> Disabled by default.
+
+\b \I{w-reloc-rel-dword} \c{reloc-rel-dword}: 32-bit relative section-crossing relocation
+
+\> \c{reloc-rel-dword} warns that a 32-bit relative relocation that could
+not be resolved at assembly time was generated in
+the output format.
+This is usually normal, but may not be handled by all
+possible target environments
+
+\> Disabled by default.
+
+\b \I{w-reloc-rel-qword} \c{reloc-rel-qword}: 64-bit relative section-crossing relocation
+
+\> \c{reloc-rel-qword} warns that an 64-bit relative relocation that could
+not be resolved at assembly time was generated in
+the output format.
+This is usually normal, but may not be handled by all
+possible target environments
+
+\> Disabled by default.
+
+\b \I{w-reloc-rel-word} \c{reloc-rel-word}: 16-bit relative section-crossing relocation
+
+\> \c{reloc-rel-word} warns that a 16-bit relative relocation that could
+not be resolved at assembly time was generated in
+the output format.
+This is usually normal, but may not be handled by all
+possible target environments
+
+\> Disabled by default.
+
+\b \I{w-unknown-pragma} \c{unknown-pragma}: unknown \c{%pragma} facility or directive
+
+\> \c{unknown-pragma} is a backwards compatibility alias for \c{pragma-unknown}.
+
+\b \I{w-unknown-warning} \c{unknown-warning}: unknown warning in \c{-W}/\c{-w} or warning directive
+
+\> \c{unknown-warning} warns about a \c{-w} or \c{-W} option or a \c{WARNING} directive
+that contains an unknown warning name or is otherwise not possible to process.
+
+\> Disabled by default.
+
+\b \I{w-user} \c{user}: \c{%warning} directives
+
+\> \c{user} controls output of \c{%warning} directives (see \k{pperror}).
+
+\> Enabled by default.
+
+\b \I{w-warn-stack-empty} \c{warn-stack-empty}: warning stack empty
+
+\> \c{warn-stack-empty} a \c{WARNING POP} directive was executed when
+the warning stack is empty. This is treated
+as a \c{WARNING *all} directive.
+
+\> Enabled by default.
+
+\b \I{w-zeroing} \c{zeroing}: \c{RES}\e{x} in initialized section becomes zero
+
+\> \c{zeroing} a \c{RES}\e{x} directive was used in a section which contains
+initialized data, and the output format does not support
+this. Instead, this will be replaced with explicit zero
+content, which may produce a large output file.
+
+\> Enabled by default.
+
+\b \I{w-zext-reloc} \c{zext-reloc}: relocation zero-extended to match output format
+
+\> \c{zext-reloc} warns that a relocation has been zero-extended due
+to limitations in the output format.
+
+\> Enabled by default.
+

_service:tar_scm:nasm-2.16.03.tar.xz/doc/warnings.src.time Added

_service:tar_scm:nasm-2.16.03.tar.xz/headers Added

_service:tar_scm:nasm-2.16.03.tar.xz/headers/c Added

@@ -0,0 +1,33 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2010 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+

_service:tar_scm:nasm-2.16.03.tar.xz/headers/doc Added

@@ -0,0 +1,33 @@
+\# --------------------------------------------------------------------------
+\#
+\#   Copyright 1996-2010 The NASM Authors - All Rights Reserved
+\#   See the file AUTHORS included with the NASM distribution for
+\#   the specific copyright holders.
+\#
+\#   Redistribution and use in source and binary forms, with or without
+\#   modification, are permitted provided that the following
+\#   conditions are met:
+\#
+\#   * Redistributions of source code must retain the above copyright
+\#     notice, this list of conditions and the following disclaimer.
+\#   * Redistributions in binary form must reproduce the above
+\#     copyright notice, this list of conditions and the following
+\#     disclaimer in the documentation and/or other materials provided
+\#     with the distribution.
+\#
+\#     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+\#     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+\#     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+\#     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+\#     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+\#     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+\#     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+\#     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+\#     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+\#     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+\#     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+\#     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+\#     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+\#
+\# --------------------------------------------------------------------------
+

_service:tar_scm:nasm-2.16.03.tar.xz/headers/mac Added

@@ -0,0 +1,33 @@
+;; --------------------------------------------------------------------------
+;;
+;;   Copyright 1996-2010 The NASM Authors - All Rights Reserved
+;;   See the file AUTHORS included with the NASM distribution for
+;;   the specific copyright holders.
+;;
+;;   Redistribution and use in source and binary forms, with or without
+;;   modification, are permitted provided that the following
+;;   conditions are met:
+;;
+;;   * Redistributions of source code must retain the above copyright
+;;     notice, this list of conditions and the following disclaimer.
+;;   * Redistributions in binary form must reproduce the above
+;;     copyright notice, this list of conditions and the following
+;;     disclaimer in the documentation and/or other materials provided
+;;     with the distribution.
+;;
+;;     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+;;     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+;;     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+;;     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;;     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+;;     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;;     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+;;     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+;;     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+;;     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+;;     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+;;     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;;     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+;; --------------------------------------------------------------------------
+

_service:tar_scm:nasm-2.16.03.tar.xz/headers/perl Added

@@ -0,0 +1,33 @@
+## --------------------------------------------------------------------------
+##   
+##   Copyright 1996-2010 The NASM Authors - All Rights Reserved
+##   See the file AUTHORS included with the NASM distribution for
+##   the specific copyright holders.
+##
+##   Redistribution and use in source and binary forms, with or without
+##   modification, are permitted provided that the following
+##   conditions are met:
+##
+##   * Redistributions of source code must retain the above copyright
+##     notice, this list of conditions and the following disclaimer.
+##   * Redistributions in binary form must reproduce the above
+##     copyright notice, this list of conditions and the following
+##     disclaimer in the documentation and/or other materials provided
+##     with the distribution.
+##     
+##     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+##     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+##     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+##     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+##     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+##     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+##     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+##     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+##     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+##     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+##     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+##     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+##     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+##
+## --------------------------------------------------------------------------
+

_service:tar_scm:nasm-2.16.03.tar.xz/include Added

_service:tar_scm:nasm-2.16.03.tar.xz/include/bytesex.h Added

@@ -0,0 +1,261 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2017 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * bytesex.h - byte order helper functions
+ *
+ * In this function, be careful about getting X86_MEMORY versus
+ * LITTLE_ENDIAN correct: X86_MEMORY also means we are allowed to
+ * do unaligned memory references, and is probabilistic.
+ */
+
+#ifndef NASM_BYTEORD_H
+#define NASM_BYTEORD_H
+
+#include "compiler.h"
+
+/*
+ * Some handy macros that will probably be of use in more than one
+ * output format: convert integers into little-endian byte packed
+ * format in memory.
+ */
+
+#define WRITECHAR(p,v)                          	\
+    do {                                        	\
+        uint8_t *_wc_p = (uint8_t *)(p);		\
+        *_wc_p++ = (v);                                 \
+        (p) = (void *)_wc_p;                            \
+    } while (0)
+
+#if X86_MEMORY
+
+#define WRITESHORT(p,v)                         	\
+    do {                                        	\
+        uint16_t *_ws_p = (uint16_t *)(p);      	\
+        *_ws_p++ = (v);                           	\
+        (p) = (void *)_ws_p;              		\
+    } while (0)
+
+#define WRITELONG(p,v)                          	\
+    do {                                        	\
+        uint32_t *_wl_p = (uint32_t *)(p);		\
+        *_wl_p++ = (v);                           	\
+        (p) = (void *)_wl_p;              		\
+    } while (0)
+
+#define WRITEDLONG(p,v)                         	\
+    do {                                        	\
+        uint64_t *_wq_p = (uint64_t *)(p);      	\
+        *_wq_p++ = (v);                           	\
+        (p) = (void *)_wq_p;              		\
+    } while (0)
+
+#else /* !X86_MEMORY */
+
+#define WRITESHORT(p,v)                         	\
+    do {                                        	\
+        uint8_t *_ws_p = (uint8_t *)(p);        	\
+        const uint16_t _ws_v = (v);                     \
+        WRITECHAR(_ws_p, _ws_v);                        \
+        WRITECHAR(_ws_p, _ws_v >> 8);                   \
+        (p) = (void *)_ws_p;                            \
+    } while (0)
+
+#define WRITELONG(p,v)                         		\
+    do {                                        	\
+        uint8_t *_wl_p = (uint8_t *)(p);        	\
+        const uint32_t _wl_v = (v);                     \
+        WRITESHORT(_wl_p, _wl_v);                       \
+        WRITESHORT(_wl_p, _wl_v >> 16);                 \
+        (p) = (void *)_wl_p;                            \
+    } while (0)
+
+#define WRITEDLONG(p,v)                         	\
+    do {                                        	\
+        uint8_t *_wq_p = (uint8_t *)(p);        	\
+        const uint64_t _wq_v = (v);                     \
+        WRITELONG(_wq_p, _wq_v);                        \
+        WRITELONG(_wq_p, _wq_v >> 32);                  \
+        (p) = (void *)_wq_p;                            \
+    } while (0)
+
+#endif /* X86_MEMORY */
+
+/*
+ * Endian control functions which work on a single integer
+ */
+#ifdef WORDS_LITTLEENDIAN
+
+#ifndef HAVE_CPU_TO_LE16
+# define cpu_to_le16(v) ((uint16_t)(v))
+#endif
+#ifndef HAVE_CPU_TO_LE32
+# define cpu_to_le32(v) ((uint32_t)(v))
+#endif
+#ifndef HAVE_CPU_TO_LE64
+# define cpu_to_le64(v) ((uint64_t)(v))
+#endif
+
+#elif defined(WORDS_BIGENDIAN)
+
+#ifndef HAVE_CPU_TO_LE16
+static inline uint16_t cpu_to_le16(uint16_t v)
+{
+# ifdef HAVE___CPU_TO_LE16
+    return __cpu_to_le16(v);
+# elif defined(HAVE_HTOLE16)
+    return htole16(v);
+# elif defined(HAVE___BSWAP_16)
+    return __bswap_16(v);
+# elif defined(HAVE___BUILTIN_BSWAP16)
+    return __builtin_bswap16(v);
+# elif defined(HAVE__BYTESWAP_USHORT) && (USHRT_MAX == 0xffffU)
+    return _byteswap_ushort(v);
+# else
+    return (v << 8) | (v >> 8);
+# endif
+}
+#endif
+
+#ifndef HAVE_CPU_TO_LE32
+static inline uint32_t cpu_to_le32(uint32_t v)
+{
+# ifdef HAVE___CPU_TO_LE32
+    return __cpu_to_le32(v);
+# elif defined(HAVE_HTOLE32)
+    return htole32(v);
+# elif defined(HAVE___BSWAP_32)
+    return __bswap_32(v);
+# elif defined(HAVE___BUILTIN_BSWAP32)
+    return __builtin_bswap32(v);
+# elif defined(HAVE__BYTESWAP_ULONG) && (ULONG_MAX == 0xffffffffUL)
+    return _byteswap_ulong(v);
+# else
+    v = ((v << 8) & 0xff00ff00 ) |
+        ((v >> 8) & 0x00ff00ff);
+    return (v << 16) | (v >> 16);
+# endif
+}
+#endif
+
+#ifndef HAVE_CPU_TO_LE64
+static inline uint64_t cpu_to_le64(uint64_t v)
+{
+# ifdef HAVE___CPU_TO_LE64
+    return __cpu_to_le64(v);
+# elif defined(HAVE_HTOLE64)
+    return htole64(v);
+# elif defined(HAVE___BSWAP_64)
+    return __bswap_64(v);
+# elif defined(HAVE___BUILTIN_BSWAP64)
+    return __builtin_bswap64(v);
+# elif defined(HAVE__BYTESWAP_UINT64)
+    return _byteswap_uint64(v);
+# else
+    v = ((v << 8) & 0xff00ff00ff00ff00ull) |
+        ((v >> 8) & 0x00ff00ff00ff00ffull);
+    v = ((v << 16) & 0xffff0000ffff0000ull) |
+        ((v >> 16) & 0x0000ffff0000ffffull);
+    return (v << 32) | (v >> 32);
+# endif
+}
+#endif
+
+#else /* not WORDS_LITTLEENDIAN or WORDS_BIGENDIAN */
+
+static inline uint16_t cpu_to_le16(uint16_t v)
+{
+    union u16 {
+        uint16_t v;
+        uint8_t c2;
+    } x;
+    uint8_t *cp = &x.c;
+
+    WRITESHORT(cp, v);
+    return x.v;
+}
+
+static inline uint32_t cpu_to_le32(uint32_t v)
+{
+    union u32 {
+        uint32_t v;
+        uint8_t c4;
+    } x;
+    uint8_t *cp = &x.c;
+
+    WRITELONG(cp, v);
+    return x.v;
+}
+
+static inline uint64_t cpu_to_le64(uint64_t v)
+{
+    union u64 {
+        uint64_t v;
+        uint8_t c8;
+    } x;
+    uint8_t *cp = &x.c;
+
+    WRITEDLONG(cp, v);
+    return x.v;
+}
+
+#endif
+
+#define WRITEADDR(p,v,s)                        		\
+    do {                                                        \
+	switch (is_constant(s) ? (s) : 0) {                     \
+        case 1:                                                 \
+            WRITECHAR(p,v);                                     \
+            break;                                              \
+        case 2:                                                 \
+            WRITESHORT(p,v);                                    \
+            break;                                              \
+        case 4:                                                 \
+            WRITELONG(p,v);                                     \
+            break;                                              \
+	case 8:                                                 \
+            WRITEDLONG(p,v);                                    \
+            break;                                              \
+        default:                                                \
+        {                                                       \
+            const uint64_t _wa_v = cpu_to_le64(v);              \
+            const size_t _wa_s = (s);                           \
+            uint8_t * const _wa_p = (uint8_t *)(p);             \
+            memcpy(_wa_p, &_wa_v, _wa_s);                       \
+            (p) = (void *)(_wa_p + _wa_s);                      \
+        }                                                       \
+        break;                                                  \
+        }                                                       \
+    } while (0)
+
+#endif /* NASM_BYTESEX_H */

_service:tar_scm:nasm-2.16.03.tar.xz/include/compiler.h Added

@@ -0,0 +1,417 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 2007-2023 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * compiler.h
+ *
+ * Compiler-specific macros for NASM.  Feel free to add support for
+ * other compilers in here.
+ *
+ * This header file should be included before any other header.
+ */
+
+#ifndef NASM_COMPILER_H
+#define NASM_COMPILER_H 1
+
+/*
+ * At least DJGPP and Cygwin have broken header files if __STRICT_ANSI__
+ * is defined.
+ */
+#ifdef __GNUC__
+# undef __STRICT_ANSI__
+#endif
+
+/* On Microsoft platforms we support multibyte character sets in filenames */
+#define _MBCS 1
+
+#include "autoconf/attribute.h"
+
+#ifdef HAVE_CONFIG_H
+# include "config/config.h"
+#else
+# if defined(_MSC_VER) && (_MSC_VER >= 1310)
+#  include "config/msvc.h"
+# elif defined(__WATCOMC__)
+#  include "config/watcom.h"
+# else
+#  include "config/unknown.h"
+# endif
+/* This unconditionally defines some macros we really want */
+# include "config/unconfig.h"
+#endif /* Configuration file */
+
+/* This is required to get the standard <inttypes.h> macros when compiling
+   with a C++ compiler.  This must be defined *before* <inttypes.h> is
+   included, directly or indirectly. */
+#define __STDC_CONSTANT_MACROS	1
+#define __STDC_LIMIT_MACROS	1
+#define __STDC_FORMAT_MACROS	1
+
+#ifdef HAVE_INTTYPES_H
+# include <inttypes.h>
+#else
+# include "nasmint.h"
+#endif
+
+#include <assert.h>
+#include <stddef.h>
+#include <stdarg.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <limits.h>
+#include <errno.h>
+
+#ifdef HAVE_STRINGS_H
+# include <strings.h>
+#endif
+#ifdef HAVE_SYS_TYPES_H
+# include <sys/types.h>
+#endif
+
+#ifdef HAVE_ENDIAN_H
+# include <endian.h>
+#elif defined(HAVE_SYS_ENDIAN_H)
+# include <sys/endian.h>
+#elif defined(HAVE_MACHINE_ENDIAN_H)
+# include <machine/endian.h>
+#endif
+
+/*
+ * If we have BYTE_ORDER defined, or the compiler provides
+ * __BIG_ENDIAN__ or __LITTLE_ENDIAN__, trust it over what autoconf
+ * came up with, especially since autoconf obviously can't figure
+ * things out for a universal compiler.
+ */
+#if defined(__BIG_ENDIAN__) && !defined(__LITTLE_ENDIAN__)
+# undef WORDS_LITTLEENDIAN
+# undef WORDS_BIGENDIAN
+# define WORDS_BIGENDIAN 1
+#elif defined(__LITTLE_ENDIAN__) && !defined(__BIG_ENDIAN__)
+# undef WORDS_LITTLEENDIAN
+# undef WORDS_BIGENDIAN
+# define WORDS_LITTLEENDIAN 1
+#elif defined(BYTE_ORDER) && defined(LITTLE_ENDIAN) && defined(BIG_ENDIAN)
+# undef WORDS_LITTLEENDIAN
+# undef WORDS_BIGENDIAN
+# if BYTE_ORDER == LITTLE_ENDIAN
+#  define WORDS_LITTLEENDIAN 1
+# elif BYTE_ORDER == BIG_ENDIAN
+#  define WORDS_BIGENDIAN 1
+# endif
+#endif
+
+/*
+ * Define this to 1 for faster performance if this is a littleendian
+ * platform *and* it can do arbitrary unaligned memory references.  It
+ * is safe to leave it defined to 0 even if that is true.
+ */
+#if defined(__386__) || defined(__i386__) || defined(__x86_64__) \
+    || defined(_M_IX86) || defined(_M_X64)
+# define X86_MEMORY 1
+# undef WORDS_BIGENDIAN
+# undef WORDS_LITTLEENDIAN
+# define WORDS_LITTLEENDIAN 1
+#else
+# define X86_MEMORY 0
+#endif
+
+/* Some versions of MSVC have these only with underscores in front */
+#ifndef HAVE_SNPRINTF
+# ifdef HAVE__SNPRINTF
+#  define snprintf _snprintf
+# else
+int snprintf(char *, size_t, const char *, ...);
+# endif
+#endif
+
+#ifndef HAVE_VSNPRINTF
+# ifdef HAVE__VSNPRINTF
+#  define vsnprintf _vsnprintf
+# else
+int vsnprintf(char *, size_t, const char *, va_list);
+# endif
+#endif
+
+#if !defined(HAVE_STRLCPY) || !HAVE_DECL_STRLCPY
+size_t strlcpy(char *, const char *, size_t);
+#endif
+
+#if !defined(HAVE_STRCHRNUL) || !HAVE_DECL_STRCHRNUL
+char *strrchrnul(const char *, int);
+#endif
+
+#ifndef __cplusplus		/* C++ has false, true, bool as keywords */
+# ifdef HAVE_STDBOOL_H
+#  include <stdbool.h>
+# elif defined(HAVE__BOOL)
+   typedef _Bool bool;
+#  define false 0
+#  define true 1
+# else
+/* This is sort of dangerous, since casts will behave different than
+   casting to the standard boolean type.  Always use !!, not (bool). */
+typedef enum bool { false, true } bool;
+# endif
+#endif
+
+/* Create a NULL pointer of the same type as the address of
+   the argument, without actually evaluating said argument. */
+#define nullas(p) (0 ? &(p) : NULL)
+
+/* Convert an offsetted NULL pointer dereference to a size_t offset.
+   Technically non-portable as taking the offset from a NULL pointer
+   is undefined behavior, but... */
+#define null_offset(p) ((size_t)((const char *)&(p) - (const char *)NULL))
+
+/* Provide a substitute for offsetof() if we don't have one.  This
+   variant works on most (but not *all*) systems... */
+#ifndef offsetof
+# define offsetof(t,m) null_offset(((t *)NULL)->m)
+#endif
+
+/* If typeof is defined as a macro, assume we have typeof even if
+   HAVE_TYPEOF is not declared (e.g. due to not using autoconf.) */
+#ifdef typeof
+# define HAVE_TYPEOF 1
+#endif
+
+/* This is like offsetof(), but takes an object rather than a type. */
+#ifndef offsetin
+# ifdef HAVE_TYPEOF
+#  define offsetin(p,m) offsetof(typeof(p),m)
+# else
+#  define offsetin(p,m)	null_offset(nullas(p)->m)
+# endif
+#endif
+
+/* The container_of construct: if p is a pointer to member m of
+   container class c, then return a pointer to the container of which
+   *p is a member. */
+#ifndef container_of
+# define container_of(p, c, m) ((c *)((char *)(p) - offsetof(c,m)))
+#endif
+
+/* Some misguided platforms hide the defs for these */
+#if defined(HAVE_STRCASECMP) && !HAVE_DECL_STRCASECMP
+int strcasecmp(const char *, const char *);
+#endif
+
+#if defined(HAVE_STRICMP) && !HAVE_DECL_STRICMP
+int stricmp(const char *, const char *);
+#endif
+
+#if defined(HAVE_STRNCASECMP) && !HAVE_DECL_STRNCASECMP
+int strncasecmp(const char *, const char *, size_t);
+#endif
+
+#if defined(HAVE_STRNICMP) && !HAVE_DECL_STRNICMP
+int strnicmp(const char *, const char *, size_t);
+#endif
+
+#if defined(HAVE_STRSEP) && !HAVE_DECL_STRSEP
+char *strsep(char **, const char *);
+#endif
+
+#if !HAVE_DECL_STRNLEN
+size_t strnlen(const char *s, size_t maxlen);
+#endif
+
+#ifndef HAVE_MEMPCPY
+static inline void *mempcpy(void *dst, const void *src, size_t n)
+{
+    return (char *)memcpy(dst, src, n) + n;
+}
+#endif
+
+#ifndef HAVE_MEMPSET
+static inline void *mempset(void *dst, int c, size_t n)
+{
+    return (char *)memset(dst, c, n) + n;
+}
+#endif
+
+/*
+ * Hack to support external-linkage inline functions
+ */
+#ifndef HAVE_STDC_INLINE
+# ifdef __GNUC__
+#  ifdef __GNUC_STDC_INLINE__
+#   define HAVE_STDC_INLINE
+#  else
+#   define HAVE_GNU_INLINE
+#  endif
+# elif defined(__GNUC_GNU_INLINE__)
+/* Some other compiler implementing only GNU inline semantics? */
+#   define HAVE_GNU_INLINE
+# elif defined(__STDC_VERSION__)
+#  if __STDC_VERSION__ >= 199901L
+#   define HAVE_STDC_INLINE
+#  endif
+# endif
+#endif
+
+#ifdef HAVE_STDC_INLINE
+# define extern_inline inline
+#elif defined(HAVE_GNU_INLINE)
+# define extern_inline extern inline
+# define inline_prototypes
+#else
+# define inline_prototypes
+#endif
+
+/*
+ * Hints to the compiler that a particular branch of code is more or
+ * less likely to be taken.
+ */
+#if HAVE___BUILTIN_EXPECT
+# define likely(x)	__builtin_expect(!!(x), 1)
+# define unlikely(x)	__builtin_expect(!!(x), 0)
+#else
+# define likely(x)	(!!(x))
+# define unlikely(x)	(!!(x))
+#endif
+
+#define safe_alloc     never_null     malloc_func
+#define safe_alloc_ptr never_null_ptr malloc_func_ptr
+
+#define safe_malloc(s)          safe_alloc     alloc_size_func1(s)
+#define safe_malloc2(s1,s2)     safe_alloc     alloc_size_func2(s1,s2)
+#define safe_realloc(s)         never_null     alloc_size_func1(s)
+#define safe_malloc_ptr(s)      safe_alloc_ptr alloc_size_func1_ptr(s)
+#define safe_malloc2_ptr(s1,s2) safe_alloc_ptr alloc_size_func2_ptr(s1,s2)
+#define safe_realloc_ptr(s)     never_null_ptr alloc_size_func1_ptr(s)
+
+/*
+ * How to tell the compiler that a function doesn't return
+ */
+#ifdef HAVE_STDNORETURN_H
+# include <stdnoreturn.h>
+# define no_return noreturn void
+#elif defined(_MSC_VER)
+# define no_return __declspec(noreturn) void
+#else
+# define no_return void noreturn_func
+#endif
+
+/*
+ * A fatal function is both unlikely and no_return
+ */
+#define fatal_func     no_return unlikely_func
+#define fatal_func_ptr no_return unlikely_func_ptr
+
+/*
+ * How to tell the compiler that a function takes a printf-like string
+ */
+#define printf_func(fmt, list)     format_func3(printf,fmt,list)
+#define printf_func_ptr(fmt, list) format_func3_ptr(printf,fmt,list)
+#define vprintf_func(fmt)          format_func3(printf,fmt,0)
+#define vprintf_func_ptr(fmt)      format_func3_ptr(printf,fmt,0)
+
+/* Determine probabilistically if something is a compile-time constant */
+#ifdef HAVE___BUILTIN_CONSTANT_P
+# if defined(__GNUC__) && (__GNUC__ >= 5)
+#  define is_constant(x) __builtin_constant_p((x))
+# else
+#  define is_constant(x) false
+# endif
+#else
+# define is_constant(x) false
+#endif
+
+/*
+ * If we can guarantee that a particular expression is constant, use it,
+ * otherwise use a different version.
+ */
+#if defined(__GNUC__) && (__GNUC__ >= 3)
+# define not_pedantic_start                             \
+    _Pragma("GCC diagnostic push")                      \
+    _Pragma("GCC diagnostic ignored \"-Wpedantic\"")
+# define not_pedantic_end                       \
+    _Pragma("GCC diagnostic pop")
+#else
+# define not_pedantic_start
+# define not_pedantic_end
+#endif
+
+#ifdef HAVE___BUILTIN_CHOOSE_EXPR
+# define if_constant(x,y) __builtin_choose_expr(is_constant(x),(x),(y))
+#else
+# define if_constant(x,y) (y)
+#endif
+
+/*
+ * The autoconf documentation states:
+ *
+ * `va_copy'
+ *    The C99 standard provides `va_copy' for copying `va_list'
+ *    variables.  It may be available in older environments too, though
+ *    possibly as `__va_copy' (e.g., `gcc' in strict pre-C99 mode).
+ *    These can be tested with `#ifdef'.  A fallback to `memcpy (&dst,
+ *    &src, sizeof (va_list))' gives maximum portability.
+ */
+#ifndef va_copy
+# ifdef __va_copy
+#  define va_copy(dst,src) __va_copy(dst,src)
+# else
+#  define va_copy(dst,src) memcpy(&(dst),&(src),sizeof(va_list))
+# endif
+#endif
+
+/*
+ * If SIZE_MAX is not defined, rely on size_t being unsigned
+ */
+#ifndef SIZE_MAX
+# define SIZE_MAX (((size_t)0) - 1)
+#endif
+
+/* Watcom doesn't handle switch statements with 64-bit types, hack around it */
+#ifdef __WATCOMC__
+# define BOGUS_CASE 0x76543210
+
+static inline unsigned int watcom_switch_hack(uint64_t x)
+{
+    if (x > (uint64_t)UINT_MAX)
+        return BOGUS_CASE;
+    else
+        return (unsigned int)x;
+}
+
+# define switch(x) switch(sizeof(x) > sizeof(unsigned int) \
+                          ? watcom_switch_hack(x) : (unsigned int)(x))
+
+/* This is to make sure BOGUS_CASE doesn't conflict with anything real... */
+# define default case BOGUS_CASE: default
+#endif
+
+#endif	/* NASM_COMPILER_H */

_service:tar_scm:nasm-2.16.03.tar.xz/include/dbginfo.h Added

@@ -0,0 +1,115 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 2020 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * dbginfo.h - debugging info structures
+ */
+
+#ifndef NASM_DBGINFO_H
+#define NASM_DBGINFO_H
+
+#include "compiler.h"
+#include "srcfile.h"
+#include "rbtree.h"
+
+struct debug_macro_def;         /* Definition */
+struct debug_macro_inv;         /* Invocation */
+struct debug_macro_addr;        /* Address range */
+
+/*
+ * Definitions structure, one for each non-.nolist macro invoked
+ * anywhere in the program; unique for each macro, even if a macro is
+ * redefined and/or overloaded.
+ */
+struct debug_macro_def {
+    struct debug_macro_def *next; /* List of definitions */
+    const char *name;            /* Macro name */
+    struct src_location where;   /* Start of definition */
+    size_t ninv;                 /* Call count */
+};
+
+/*
+ * Invocation structure. One for each invocation of a non-.nolist macro.
+ */
+struct debug_macro_inv_list {
+    struct debug_macro_inv *l;
+    size_t n;
+};
+
+struct debug_macro_inv {
+    struct debug_macro_inv *next; /* List of same-level invocations */
+    struct debug_macro_inv_list down;
+    struct debug_macro_inv *up;   /* Parent invocation */
+    struct debug_macro_def *def;  /* Macro definition */
+    struct src_location where;    /* Start of invocation */
+    struct {                      /* Address range pointers */
+        struct rbtree *tree;           /* rbtree of address ranges */
+        struct debug_macro_addr *last; /* Quick lookup for latest section */
+    } addr;
+    uint32_t naddr;             /* Number of address ranges */
+    int32_t  lastseg;           /* lastaddr segment number  */
+};
+
+/*
+ * Address range structure. An rbtree containing one address range for each
+ * section which this particular macro has generated code/data/space into.
+ */
+struct debug_macro_addr {
+    struct rbtree tree;          /* rbtree; key = index, must be first */
+    struct debug_macro_addr *up; /* same section in parent invocation */
+    uint64_t start;              /* starting offset */
+    uint64_t len;                /* length of range */
+};
+
+/*
+ * Complete information structure */
+struct debug_macro_info {
+    struct debug_macro_inv_list inv;
+    struct debug_macro_def_list {
+        struct debug_macro_def *l;
+        size_t n;
+    } def;
+};
+
+static inline int32_t debug_macro_seg(const struct debug_macro_addr *dma)
+{
+    return dma->tree.key;
+}
+
+/* Get/create a addr structure for the macro we are emitting for */
+struct debug_macro_addr *debug_macro_get_addr(int32_t seg);
+
+/* The macro we are currently emitting for, if any */
+extern struct debug_macro_inv *debug_current_macro;
+
+#endif /* NASM_DBGINFO_H */

_service:tar_scm:nasm-2.16.03.tar.xz/include/disp8.h Added

@@ -0,0 +1,45 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2013 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * disp8.h   header file for disp8.c
+ */
+
+#ifndef NASM_DISP8_H
+#define NASM_DISP8_H
+
+#include "nasm.h"
+
+uint8_t get_disp8N(insn *ins);
+bool is_disp8n(operand *input, insn *ins, int8_t *compdisp);
+#endif  /* NASM_DISP8_H */

_service:tar_scm:nasm-2.16.03.tar.xz/include/error.h Added

@@ -0,0 +1,183 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2023 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * Error reporting functions for the assembler
+ */
+
+#ifndef NASM_ERROR_H
+#define NASM_ERROR_H 1
+
+#include "compiler.h"
+
+/*
+ * File pointer for error messages
+ */
+extern FILE *error_file;        /* Error file descriptor */
+
+/*
+ * Typedef for the severity field
+ */
+typedef uint32_t errflags;
+
+/*
+ * An error reporting function should look like this.
+ */
+void printf_func(2, 3) nasm_error(errflags severity, const char *fmt, ...);
+void printf_func(1, 2) nasm_listmsg(const char *fmt, ...);
+void printf_func(2, 3) nasm_listmsgf(errflags flags, const char *fmt, ...);
+void printf_func(1, 2) nasm_debug(const char *fmt, ...);
+void printf_func(2, 3) nasm_debugf(errflags flags, const char *fmt, ...);
+void printf_func(1, 2) nasm_info(const char *fmt, ...);
+void printf_func(2, 3) nasm_infof(errflags flags, const char *fmt, ...);
+void printf_func(2, 3) nasm_warn_(errflags flags, const char *fmt, ...);
+void printf_func(1, 2) nasm_nonfatal(const char *fmt, ...);
+void printf_func(2, 3) nasm_nonfatalf(errflags flags, const char *fmt, ...);
+fatal_func printf_func(1, 2) nasm_fatal(const char *fmt, ...);
+fatal_func printf_func(2, 3) nasm_fatalf(errflags flags, const char *fmt, ...);
+fatal_func printf_func(1, 2) nasm_critical(const char *fmt, ...);
+fatal_func printf_func(2, 3) nasm_criticalf(errflags flags, const char *fmt, ...);
+fatal_func printf_func(1, 2) nasm_panic(const char *fmt, ...);
+fatal_func printf_func(2, 3) nasm_panicf(errflags flags, const char *fmt, ...);
+fatal_func nasm_panic_from_macro(const char *file, int line);
+#define panic() nasm_panic_from_macro(__FILE__, __LINE__);
+
+void vprintf_func(2) nasm_verror(errflags severity, const char *fmt, va_list ap);
+fatal_func vprintf_func(2) nasm_verror_critical(errflags severity, const char *fmt, va_list ap);
+
+/*
+ * These are the error severity codes which get passed as the first
+ * argument to an efunc.
+ */
+#define ERR_LISTMSG		0x00000000      /* for the listing file only */
+#define ERR_DEBUG		0x00000001	/* debugging message */
+#define ERR_INFO		0x00000002	/* information for the list file */
+#define ERR_WARNING		0x00000003	/* warn only: no further action */
+#define ERR_NONFATAL		0x00000004	/* terminate assembly after phase */
+#define ERR_FATAL		0x00000005	/* instantly fatal: exit with error */
+#define ERR_CRITICAL		0x00000006      /* fatal, but minimize code before exit */
+#define ERR_PANIC		0x00000007	/* internal error: panic instantly
+						 * and dump core for reference */
+#define ERR_MASK		0x00000007	/* mask off the above codes */
+#define ERR_UNDEAD		0x00000008      /* skip if we already have errors */
+#define ERR_NOFILE		0x00000010	/* don't give source file name/line */
+#define ERR_HERE		0x00000020      /* point to a specific source location */
+#define ERR_USAGE		0x00000040	/* print a usage message */
+#define ERR_PASS2		0x00000100	/* ignore unless on pass_final */
+
+#define ERR_NO_SEVERITY		0x00000200	/* suppress printing severity */
+#define ERR_PP_PRECOND		0x00000400	/* for preprocessor use */
+#define ERR_PP_LISTMACRO	0x00000800	/* from pp_error_list_macros() */
+#define ERR_HOLD		0x00001000      /* this error/warning can be held */
+
+/*
+ * These codes define specific types of suppressible warning.
+ * They are assumed to occupy the most significant bits of the
+ * severity code.
+ */
+#define WARN_SHR		16              /* how far to shift right */
+#define WARN_IDX(x)		(((errflags)(x)) >> WARN_SHR)
+#define WARN_MASK		((~(errflags)0) << WARN_SHR)
+
+/* This is a bitmask */
+#define WARN_ST_ENABLED		1 /* Warning is currently enabled */
+#define WARN_ST_ERROR		2 /* Treat this warning as an error */
+
+/* Possible initial state for warnings */
+#define WARN_INIT_OFF		0
+#define WARN_INIT_ON		WARN_ST_ENABLED
+#define WARN_INIT_ERR		(WARN_ST_ENABLED|WARN_ST_ERROR)
+
+/* Process a warning option or directive */
+bool set_warning_status(const char *value);
+
+/* Warning stack management */
+void push_warnings(void);
+void pop_warnings(void);
+void init_warnings(void);
+void reset_warnings(void);
+
+/*
+ * Tentative error hold for warnings/errors indicated with ERR_HOLD.
+ *
+ * This is a stack; the "hold" argument *must*
+ * match the value returned from nasm_error_hold_push().
+ * If "issue" is true the errors are committed (or promoted to the next
+ * higher stack level), if false then they are discarded.
+ *
+ * Errors stronger than ERR_NONFATAL cannot be held.
+ */
+struct nasm_errhold;
+typedef struct nasm_errhold *errhold;
+errhold nasm_error_hold_push(void);
+void nasm_error_hold_pop(errhold hold, bool issue);
+
+/* Should be included from within error.h only */
+#include "warnings.h"
+
+/* True if a warning is enabled, either as a warning or an error */
+static inline bool warn_active(errflags warn)
+{
+    enum warn_index wa = WARN_IDX(warn);
+    return unlikely(warning_statewa & WARN_ST_ENABLED);
+}
+
+#ifdef HAVE_VARIADIC_MACROS
+
+#define nasm_warn(w, ...) \
+    do { \
+        if (unlikely(warn_active(w))) \
+            nasm_warn_(w, __VA_ARGS__); \
+    } while (0)
+
+#else
+
+#define nasm_warn nasm_warn_
+
+#endif
+
+/* By defining MAX_DEBUG, we can compile out messages entirely */
+#ifndef MAX_DEBUG
+# define MAX_DEBUG (~0U)
+#endif
+
+/* Debug level checks */
+static inline bool debug_level(unsigned int level)
+{
+    extern unsigned int debug_nasm;
+    if (is_constant(level) && level > MAX_DEBUG)
+        return false;
+    return unlikely(level <= debug_nasm);
+}
+
+#endif /* NASM_ERROR_H */

_service:tar_scm:nasm-2.16.03.tar.xz/include/hashtbl.h Added

@@ -0,0 +1,108 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2018 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * hashtbl.h
+ *
+ * Efficient dictionary hash table class.
+ */
+
+#ifndef NASM_HASHTBL_H
+#define NASM_HASHTBL_H
+
+#include "nasmlib.h"
+
+struct hash_node {
+    uint64_t hash;
+    const void *key;
+    size_t keylen;
+    void *data;
+};
+
+struct hash_table {
+    struct hash_node *table;
+    size_t load;
+    size_t size;
+    size_t max_load;
+};
+
+struct hash_insert {
+    struct hash_table *head;
+    struct hash_node *where;
+    struct hash_node node;
+};
+
+struct hash_iterator {
+    const struct hash_table *head;
+    const struct hash_node *next;
+};
+
+uint64_t crc64(uint64_t crc, const char *string);
+uint64_t crc64i(uint64_t crc, const char *string);
+uint64_t crc64b(uint64_t crc, const void *data, size_t len);
+uint64_t crc64ib(uint64_t crc, const void *data, size_t len);
+#define CRC64_INIT UINT64_C(0xffffffffffffffff)
+
+static inline uint64_t crc64_byte(uint64_t crc, uint8_t v)
+{
+    extern const uint64_t crc64_tab256;
+    return crc64_tab(uint8_t)(v ^ crc) ^ (crc >> 8);
+}
+
+uint32_t crc32b(uint32_t crc, const void *data, size_t len);
+
+void **hash_find(struct hash_table *head, const char *string,
+		struct hash_insert *insert);
+void **hash_findb(struct hash_table *head, const void *key, size_t keylen,
+		struct hash_insert *insert);
+void **hash_findi(struct hash_table *head, const char *string,
+		struct hash_insert *insert);
+void **hash_findib(struct hash_table *head, const void *key, size_t keylen,
+                   struct hash_insert *insert);
+void **hash_add(struct hash_insert *insert, const void *key, void *data);
+static inline void hash_iterator_init(const struct hash_table *head,
+                                      struct hash_iterator *iterator)
+{
+    iterator->head = head;
+    iterator->next = head->table;
+}
+const struct hash_node *hash_iterate(struct hash_iterator *iterator);
+
+#define hash_for_each(_head,_it,_np) \
+    for (hash_iterator_init((_head), &(_it)), (_np) = hash_iterate(&(_it)) ; \
+         (_np) ; (_np) = hash_iterate(&(_it)))
+
+void hash_free(struct hash_table *head);
+void hash_free_all(struct hash_table *head, bool free_keys);
+
+#endif /* NASM_HASHTBL_H */

_service:tar_scm:nasm-2.16.03.tar.xz/include/iflag.h Added

@@ -0,0 +1,134 @@
+#ifndef NASM_IFLAG_H
+#define NASM_IFLAG_H
+
+#include "compiler.h"
+#include "ilog2.h"
+
+
+#include "iflaggen.h"
+
+#define IF_GENBIT(bit)          (UINT32_C(1) << ((bit) & 31))
+
+static inline int ifcomp(uint32_t a, uint32_t b)
+{
+    return (a > b) - (a < b);
+}
+
+static inline bool iflag_test(const iflag_t *f, unsigned int bit)
+{
+    return !!(f->fieldbit >> 5 & IF_GENBIT(bit));
+}
+
+static inline void iflag_set(iflag_t *f, unsigned int bit)
+{
+    f->fieldbit >> 5 |= IF_GENBIT(bit);
+}
+
+static inline void iflag_clear(iflag_t *f, unsigned int bit)
+{
+    f->fieldbit >> 5 &= ~IF_GENBIT(bit);
+}
+
+static inline void iflag_clear_all(iflag_t *f)
+{
+     memset(f, 0, sizeof(*f));
+}
+
+static inline void iflag_set_all(iflag_t *f)
+{
+     memset(f, ~0, sizeof(*f));
+}
+
+#define iflag_for_each_field(v) for ((v) = 0; (v) < IF_FIELD_COUNT; (v)++)
+
+static inline int iflag_cmp(const iflag_t *a, const iflag_t *b)
+{
+    int i;
+
+    /* This is intentionally a reverse loop! */
+    for (i = IF_FIELD_COUNT-1; i >= 0; i--) {
+        if (a->fieldi == b->fieldi)
+            continue;
+
+        return ifcomp(a->fieldi, b->fieldi);
+    }
+
+    return 0;
+}
+
+#define IF_GEN_HELPER(name, op)                                         \
+    static inline iflag_t iflag_##name(const iflag_t *a, const iflag_t *b) \
+    {                                                                   \
+        unsigned int i;                                                 \
+        iflag_t res;                                                    \
+                                                                        \
+        iflag_for_each_field(i)                                         \
+            res.fieldi = a->fieldi op b->fieldi;                  \
+                                                                        \
+        return res;                                                     \
+    }
+
+IF_GEN_HELPER(xor, ^)
+
+/* Some helpers which are to work with predefined masks */
+#define IF_SMASK        (IFM_SB|IFM_SW|IFM_SD|IFM_SQ|IFM_SO|IFM_SY|IFM_SZ|IFM_SIZE|IFM_ANYSIZE)
+#define IF_ARMASK       (IFM_AR0|IFM_AR1|IFM_AR2|IFM_AR3|IFM_AR4)
+
+#define _itemp_smask(idx)      (insns_flags(idx).field0 & IF_SMASK)
+#define _itemp_armask(idx)     (insns_flags(idx).field0 & IF_ARMASK)
+#define _itemp_arg(idx)        ((_itemp_armask(idx) >> IF_AR0) - 1)
+
+#define itemp_smask(itemp)      _itemp_smask((itemp)->iflag_idx)
+#define itemp_arg(itemp)        _itemp_arg((itemp)->iflag_idx)
+#define itemp_armask(itemp)     _itemp_armask((itemp)->iflag_idx)
+
+/*
+ * IF_ANY is the highest CPU level by definition
+ */
+#define IF_CPU_LEVEL_MASK      ((IFM_ANY << 1) - 1)
+
+static inline int iflag_cmp_cpu(const iflag_t *a, const iflag_t *b)
+{
+    return ifcomp(a->fieldIF_CPU_FIELD, b->fieldIF_CPU_FIELD);
+}
+
+static inline uint32_t _iflag_cpu_level(const iflag_t *a)
+{
+    return a->fieldIF_CPU_FIELD & IF_CPU_LEVEL_MASK;
+}
+
+static inline int iflag_cmp_cpu_level(const iflag_t *a, const iflag_t *b)
+{
+    return ifcomp(_iflag_cpu_level(a), _iflag_cpu_level(b));
+}
+
+/* Returns true if the CPU level is at least a certain value */
+static inline bool iflag_cpu_level_ok(const iflag_t *a, unsigned int bit)
+{
+    return _iflag_cpu_level(a) >= IF_GENBIT(bit);
+}
+
+static inline void iflag_set_all_features(iflag_t *a)
+{
+    uint32_t *p = &a->fieldIF_FEATURE_FIELD;
+
+    memset(p, -1, IF_FEATURE_NFIELDS * sizeof(uint32_t));
+}
+
+static inline iflag_t _iflag_pfmask(const iflag_t *a)
+{
+    iflag_t r;
+
+    iflag_clear_all(&r);
+
+    if (iflag_test(a, IF_CYRIX))
+        iflag_set(&r, IF_CYRIX);
+    if (iflag_test(a, IF_AMD))
+        iflag_set(&r, IF_AMD);
+
+    return r;
+}
+
+#define iflag_pfmask(itemp)     _iflag_pfmask(&insns_flags(itemp)->iflag_idx)
+
+#endif /* NASM_IFLAG_H */

_service:tar_scm:nasm-2.16.03.tar.xz/include/ilog2.h Added

@@ -0,0 +1,201 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2017 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#ifndef ILOG2_H
+#define ILOG2_H
+
+#include "compiler.h"
+
+#ifdef ILOG2_C                  /* For generating the out-of-line functions */
+# undef extern_inline
+# define extern_inline
+# define inline_prototypes
+#endif
+
+#ifdef inline_prototypes
+extern unsigned int const_func ilog2_32(uint32_t v);
+extern unsigned int const_func ilog2_64(uint64_t v);
+extern unsigned int const_func ilog2_64(uint64_t vv);
+extern int const_func alignlog2_32(uint32_t v);
+extern int const_func alignlog2_64(uint64_t v);
+#endif
+
+#ifdef extern_inline
+
+#define ROUND(v, a, w)                                  \
+    do {                                                \
+        if (v & (((UINT32_C(1) << w) - 1) << w)) {      \
+            a  += w;                                    \
+            v >>= w;                                    \
+        }                                               \
+    } while (0)
+
+
+#if defined(HAVE___BUILTIN_CLZ) && INT_MAX == 2147483647
+
+extern_inline unsigned int const_func ilog2_32(uint32_t v)
+{
+    if (!v)
+        return 0;
+
+    return __builtin_clz(v) ^ 31;
+}
+
+#elif defined(__GNUC__) && defined(__x86_64__)
+
+extern_inline unsigned int const_func ilog2_32(uint32_t v)
+{
+    unsigned int n;
+
+    __asm__("bsrl %1,%0"
+            : "=r" (n)
+            : "rm" (v), "0" (0));
+    return n;
+}
+
+#elif defined(__GNUC__) && defined(__i386__)
+
+extern_inline unsigned int const_func ilog2_32(uint32_t v)
+{
+    unsigned int n;
+
+#ifdef __i686__
+    __asm__("bsrl %1,%0 ; cmovz %2,%0\n"
+            : "=&r" (n)
+            : "rm" (v), "r" (0));
+#else
+    __asm__("bsrl %1,%0 ; jnz 1f ; xorl %0,%0\n"
+            "1:"
+            : "=&r" (n)
+            : "rm" (v));
+#endif
+     return n;
+}
+
+#elif defined(HAVE__BITSCANREVERSE)
+
+extern_inline unsigned int const_func ilog2_32(uint32_t v)
+{
+    unsigned long ix;
+    return _BitScanReverse(&ix, v) ? v : 0;
+}
+
+#else
+
+extern_inline unsigned int const_func ilog2_32(uint32_t v)
+{
+    unsigned int p = 0;
+
+    ROUND(v, p, 16);
+    ROUND(v, p,  8);
+    ROUND(v, p,  4);
+    ROUND(v, p,  2);
+    ROUND(v, p,  1);
+
+    return p;
+}
+
+#endif
+
+#if defined(HAVE__BUILTIN_CLZLL) && LLONG_MAX == 9223372036854775807LL
+
+extern_inline unsigned int const_func ilog2_64(uint64_t v)
+{
+    if (!v)
+        return 0;
+
+    return __builtin_clzll(v) ^ 63;
+}
+
+#elif defined(__GNUC__) && defined(__x86_64__)
+
+extern_inline unsigned int const_func ilog2_64(uint64_t v)
+{
+    uint64_t n;
+
+    __asm__("bsrq %1,%0"
+            : "=r" (n)
+            : "rm" (v), "0" (UINT64_C(0)));
+    return n;
+}
+
+#elif defined(HAVE__BITSCANREVERSE64)
+
+extern_inline unsigned int const_func ilog2_64(uint64_t v)
+{
+    unsigned long ix;
+    return _BitScanReverse64(&ix, v) ? ix : 0;
+}
+
+#else
+
+extern_inline unsigned int const_func ilog2_64(uint64_t vv)
+{
+    unsigned int p = 0;
+    uint32_t v;
+
+    v = vv >> 32;
+    if (v)
+        p += 32;
+    else
+        v = vv;
+
+    return p + ilog2_32(v);
+}
+
+#endif
+
+/*
+ * v == 0 ? 0 : is_power2(x) ? ilog2_X(v) : -1
+ */
+extern_inline int const_func alignlog2_32(uint32_t v)
+{
+    if (unlikely(v & (v-1)))
+        return -1;              /* invalid alignment */
+
+    return ilog2_32(v);
+}
+
+extern_inline int const_func alignlog2_64(uint64_t v)
+{
+    if (unlikely(v & (v-1)))
+        return -1;              /* invalid alignment */
+
+    return ilog2_64(v);
+}
+
+#undef ROUND
+
+#endif /* extern_inline */
+
+#endif /* ILOG2_H */

_service:tar_scm:nasm-2.16.03.tar.xz/include/insns.h Added

@@ -0,0 +1,132 @@
+/* insns.h   header file for insns.c
+ *
+ * The Netwide Assembler is copyright (C) 1996 Simon Tatham and
+ * Julian Hall. All rights reserved. The software is
+ * redistributable under the license given in the file "LICENSE"
+ * distributed in the NASM archive.
+ */
+
+#ifndef NASM_INSNS_H
+#define NASM_INSNS_H
+
+#include "nasm.h"
+#include "tokens.h"
+#include "iflag.h"
+
+/* if changed, ITEMPLATE_END should be also changed accordingly */
+struct itemplate {
+    enum opcode     opcode;             /* the token, passed from "parser.c" */
+    int             operands;           /* number of operands */
+    opflags_t       opdMAX_OPERANDS;  /* bit flags for operand types */
+    decoflags_t     decoMAX_OPERANDS; /* bit flags for operand decorators */
+    const uint8_t   *code;              /* the code it assembles to */
+    uint32_t        iflag_idx;          /* some flags referenced by index */
+};
+
+/* Use this helper to test instruction template flags */
+static inline bool itemp_has(const struct itemplate *itemp, unsigned int bit)
+{
+    return iflag_test(&insns_flagsitemp->iflag_idx, bit);
+}
+
+/* Disassembler table structure */
+
+/*
+ * If n == -1, then p points to another table of 256
+ * struct disasm_index, otherwise p points to a list of n
+ * struct itemplates to consider.
+ */
+struct disasm_index {
+    const void *p;
+    int n;
+};
+
+/* Tables for the assembler and disassembler, respectively */
+extern const struct itemplate * const nasm_instructions;
+extern const struct disasm_index itable256;
+extern const struct disasm_index * const itable_vexNASM_VEX_CLASSES324;
+
+/* Common table for the byte codes */
+extern const uint8_t nasm_bytecodes;
+
+/*
+ * this define is used to signify the end of an itemplate
+ */
+#define ITEMPLATE_END {I_none,0,{0,},{0,},NULL,0}
+
+/*
+ * Pseudo-op tests
+ */
+/* DB-type instruction (DB, DW, ...) */
+static inline bool const_func opcode_is_db(enum opcode opcode)
+{
+    return opcode >= I_DB && opcode < I_RESB;
+}
+
+/* RESB-type instruction (RESB, RESW, ...) */
+static inline bool const_func opcode_is_resb(enum opcode opcode)
+{
+    return opcode >= I_RESB && opcode < I_INCBIN;
+}
+
+/* Width of Dx and RESx instructions */
+
+/*
+ * initialized data bytes length from opcode
+ */
+static inline int const_func db_bytes(enum opcode opcode)
+{
+    switch (opcode) {
+    case I_DB:
+        return 1;
+    case I_DW:
+        return 2;
+    case I_DD:
+        return 4;
+    case I_DQ:
+        return 8;
+    case I_DT:
+        return 10;
+    case I_DO:
+        return 16;
+    case I_DY:
+        return 32;
+    case I_DZ:
+        return 64;
+    case I_none:
+        return -1;
+    default:
+        return 0;
+    }
+}
+
+/*
+ * Uninitialized data bytes length from opcode
+ */
+static inline int const_func resb_bytes(enum opcode opcode)
+{
+    switch (opcode) {
+    case I_RESB:
+        return 1;
+    case I_RESW:
+        return 2;
+    case I_RESD:
+        return 4;
+    case I_RESQ:
+        return 8;
+    case I_REST:
+        return 10;
+    case I_RESO:
+        return 16;
+    case I_RESY:
+        return 32;
+    case I_RESZ:
+        return 64;
+    case I_none:
+        return -1;
+    default:
+        return 0;
+    }
+}
+
+#endif /* NASM_INSNS_H */

_service:tar_scm:nasm-2.16.03.tar.xz/include/labels.h Added

@@ -0,0 +1,79 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2018 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/* 
+ * labels.h  header file for labels.c
+ */
+
+#ifndef LABELS_H
+#define LABELS_H
+
+#include "compiler.h"
+
+enum mangle_index {
+    LM_LPREFIX,                 /* Local variable prefix */
+    LM_LSUFFIX,                 /* Local variable suffix */
+    LM_GPREFIX,                 /* Global variable prefix */
+    LM_GSUFFIX                  /* GLobal variable suffix */
+};
+
+enum label_type {
+    LBL_none = -1,              /* No label */
+    LBL_LOCAL = 0,              /* Must be zero */
+    LBL_STATIC,
+    LBL_GLOBAL,
+    LBL_EXTERN,
+    LBL_REQUIRED,               /* Like extern but emit even if unused */
+    LBL_COMMON,
+    LBL_SPECIAL,                /* Magic symbols like ..start */
+    LBL_BACKEND                 /* Backend-defined symbols like ..got */
+};
+
+enum label_type lookup_label(const char *label, int32_t *segment, int64_t *offset);
+static inline bool is_extern(enum label_type type)
+{
+    return type == LBL_EXTERN || type == LBL_REQUIRED;
+}
+void define_label(const char *label, int32_t segment, int64_t offset,
+                  bool normal);
+void backend_label(const char *label, int32_t segment, int64_t offset);
+bool declare_label(const char *label, enum label_type type,
+                   const char *special);
+void set_label_mangle(enum mangle_index which, const char *what);
+int init_labels(void);
+void cleanup_labels(void);
+const char *local_scope(const char *label);
+
+extern uint64_t global_offset_changed;
+
+#endif /* LABELS_H */

_service:tar_scm:nasm-2.16.03.tar.xz/include/md5.h Added

_service:tar_scm:nasm-2.16.03.tar.xz/include/nasm.h Added

@@ -0,0 +1,1463 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2022 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * nasm.h   main header file for the Netwide Assembler: inter-module interface
+ */
+
+#ifndef NASM_NASM_H
+#define NASM_NASM_H
+
+#include "compiler.h"
+
+#include <time.h>
+
+#include "nasmlib.h"
+#include "nctype.h"
+#include "strlist.h"
+#include "preproc.h"
+#include "insnsi.h"     /* For enum opcode */
+#include "directiv.h"   /* For enum directive */
+#include "labels.h"     /* For enum mangle_index, enum label_type */
+#include "opflags.h"
+#include "regs.h"
+#include "srcfile.h"
+#include "error.h"
+
+/* Program name for error messages etc. */
+extern const char *_progname;
+
+/* Time stamp for the official start of compilation */
+struct compile_time {
+    time_t t;
+    bool have_local, have_gm, have_posix;
+    int64_t posix;
+    struct tm local;
+    struct tm gm;
+};
+extern struct compile_time official_compile_time;
+
+/* POSIX timestamp if and only if we are not a reproducible build */
+extern bool reproducible;
+static inline int64_t posix_timestamp(void)
+{
+    return reproducible ? 0 : official_compile_time.posix;
+}
+
+#define NO_SEG  INT32_C(-1)     /* null segment value */
+#define SEG_ABS 0x40000000L     /* mask for far-absolute segments */
+
+#define IDLEN_MAX 4096
+#define DECOLEN_MAX 32
+
+/*
+ * Name pollution problems: <time.h> on Digital UNIX pulls in some
+ * strange hardware header file which sees fit to define R_SP. We
+ * undefine it here so as not to break the enum below.
+ */
+#ifdef R_SP
+#undef R_SP
+#endif
+
+/*
+ * We must declare the existence of this structure type up here,
+ * since we have to reference it before we define it...
+ */
+struct ofmt;
+
+/*
+ * Values for the `type' parameter to an output function.
+ */
+enum out_type {
+    OUT_RAWDATA,    /* Plain bytes */
+    OUT_RESERVE,    /* Reserved bytes (RESB et al) */
+    OUT_ZERODATA,   /* Initialized data, but all zero */
+    OUT_ADDRESS,    /* An address (symbol value) */
+    OUT_RELADDR,    /* A relative address */
+    OUT_SEGMENT,    /* A segment number */
+
+    /*
+     * These values are used by the legacy backend interface only;
+     * see output/legacy.c for more information.  These should never
+     * be used otherwise.  Once all backends have been migrated to the
+     * new interface they should be removed.
+     */
+    OUT_REL1ADR,
+    OUT_REL2ADR,
+    OUT_REL4ADR,
+    OUT_REL8ADR
+};
+
+enum out_flags {
+    OUT_WRAP     = 0,           /* Undefined signedness (wraps) */
+    OUT_SIGNED   = 1,           /* Value is signed */
+    OUT_UNSIGNED = 2,           /* Value is unsigned */
+    OUT_SIGNMASK = 3            /* Mask for signedness bits */
+};
+
+/*
+ * The data we send down to the backend.
+ * XXX: We still want to push down the base address symbol if
+ * available, and replace the segment numbers with a structure.
+ */
+struct out_data {
+    int64_t offset;             /* Offset within segment */
+    int32_t segment;            /* Segment written to */
+    enum out_type type;         /* See above */
+    enum out_flags flags;       /* See above */
+    int inslen;                 /* Length of instruction */
+    int insoffs;                /* Offset inside instruction */
+    int bits;                   /* Bits mode of compilation */
+    uint64_t size;              /* Size of output */
+    const struct itemplate *itemp; /* Instruction template */
+    const void *data;           /* Data for OUT_RAWDATA */
+    uint64_t toffset;           /* Target address offset for relocation */
+    int32_t tsegment;           /* Target segment for relocation */
+    int32_t twrt;               /* Relocation with respect to */
+    int64_t relbase;            /* Relative base for OUT_RELADDR */
+    struct src_location where;  /* Source file and line */
+};
+
+/*
+ * And a label-definition function. The boolean parameter
+ * `is_norm' states whether the label is a `normal' label (which
+ * should affect the local-label system), or something odder like
+ * an EQU or a segment-base symbol, which shouldn't.
+ */
+typedef void (*ldfunc)(char *label, int32_t segment, int64_t offset,
+                       char *special, bool is_norm);
+
+/*
+ * Token types returned by the scanner, in addition to ordinary
+ * ASCII character values, and zero for end-of-string.
+ */
+enum token_type { /* token types, other than chars */
+
+    /* Token values shared between assembler and preprocessor */
+
+    /* Special codes */
+    TOKEN_INVALID = -1, /* a placeholder value */
+    TOKEN_BLOCK   = -2, /* used for storage management */
+    TOKEN_FREE    = -3, /* free token marker, use to catch leaks */
+    TOKEN_EOS     = 0,  /* end of string */
+
+    /*
+     * Single-character operators. Enumerated here to keep strict
+     * compilers happy, and for documentation.
+     */
+    TOKEN_WHITESPACE = ' ',     /* Preprocessor use */
+    TOKEN_BOOL_NOT   = '!',
+    TOKEN_AND        = '&',
+    TOKEN_OR         = '|',
+    TOKEN_XOR        = '^',
+    TOKEN_NOT        = '~',
+    TOKEN_MULT       = '*',
+    TOKEN_DIV        = '/',
+    TOKEN_MOD        = '%',
+    TOKEN_LPAR       = '(',
+    TOKEN_RPAR       = ')',
+    TOKEN_PLUS       = '+',
+    TOKEN_MINUS      = '-',
+    TOKEN_COMMA      = ',',
+    TOKEN_LBRACE     = '{',
+    TOKEN_RBRACE     = '}',
+    TOKEN_LBRACKET   = '',
+    TOKEN_RBRACKET   = '',
+    TOKEN_QMARK      = '?',
+    TOKEN_EQ         = '=',     /* = or == */
+    TOKEN_GT         = '>',
+    TOKEN_LT         = '<',
+
+    /* Multi-character operators */
+    TOKEN_SHL = 256,    /* << or <<< */
+    TOKEN_SHR,          /* >> */
+    TOKEN_SAR,          /* >>> */
+    TOKEN_SDIV,         /* // */
+    TOKEN_SMOD,         /* %% */
+    TOKEN_GE,           /* >= */
+    TOKEN_LE,           /* <= */
+    TOKEN_NE,           /* <> (!= is same as <>) */
+    TOKEN_LEG,          /* <=> */
+    TOKEN_DBL_AND,      /* && */
+    TOKEN_DBL_OR,       /* || */
+    TOKEN_DBL_XOR,      /* ^^ */
+
+    TOKEN_MAX_OPERATOR,
+
+    TOKEN_NUM,          /* numeric constant */
+    TOKEN_ERRNUM,       /* malformed numeric constant */
+    TOKEN_STR,          /* string constant */
+    TOKEN_ERRSTR,       /* unterminated string constant */
+    TOKEN_ID,           /* identifier */
+    TOKEN_FLOAT,        /* floating-point constant */
+    TOKEN_HERE,         /* $, not '$' because it is not an operator */
+    TOKEN_BASE,         /* $$ */
+
+    /* Token values only used by the assembler */
+    TOKEN_START_ASM,
+
+    TOKEN_SEG,          /* SEG */
+    TOKEN_WRT,          /* WRT */
+    TOKEN_FLOATIZE,     /* __?floatX?__ */
+    TOKEN_STRFUNC,      /* __utf16*__, __utf32*__ */
+    TOKEN_IFUNC,        /* __ilog2*__ */
+    TOKEN_DECORATOR,    /* decorators such as {...} */
+    TOKEN_MASM_PTR,     /* __?masm_ptr?__ for the masm package */
+    TOKEN_MASM_FLAT,    /* __?masm_flat?__ for the masm package */
+    TOKEN_OPMASK,       /* translated token for opmask registers */
+    TOKEN_SIZE,		/* BYTE, WORD, DWORD, QWORD, etc */
+    TOKEN_SPECIAL,      /* REL, FAR, NEAR, STRICT, NOSPLIT, etc */
+    TOKEN_PREFIX,       /* A32, O16, LOCK, REPNZ, TIMES, etc */
+    TOKEN_REG,          /* register name */
+    TOKEN_INSN,         /* instruction name */
+
+    TOKEN_END_ASM,
+
+    /* Token values only used by the preprocessor */
+
+    TOKEN_START_PP = TOKEN_END_ASM,
+
+    TOKEN_OTHER,           /* % sequence without (current) meaning */
+    TOKEN_PREPROC_ID,      /* Preprocessor ID, e.g. %symbol */
+    TOKEN_MMACRO_PARAM,    /* MMacro parameter, e.g. %1 */
+    TOKEN_LOCAL_SYMBOL,    /* Local symbol, e.g. %%symbol */
+    TOKEN_LOCAL_MACRO,     /* Context-local macro, e.g. %$symbol */
+    TOKEN_ENVIRON,         /* %! */
+    TOKEN_INTERNAL_STR,    /* Unquoted string that should remain so */
+    TOKEN_NAKED_STR,       /* Unquoted string that can be re-quoted */
+    TOKEN_PREPROC_Q,       /* %? */
+    TOKEN_PREPROC_QQ,      /* %?? */
+    TOKEN_PREPROC_SQ,      /* %*? */
+    TOKEN_PREPROC_SQQ,     /* %*?? */
+    TOKEN_PASTE,           /* %+ */
+    TOKEN_COND_COMMA,      /* %, */
+    TOKEN_INDIRECT,        /* %... */
+    TOKEN_XDEF_PARAM,      /* Used during %xdefine processing */
+    /* smacro parameters starting here; an arbitrary number. */
+    TOKEN_SMAC_START_PARAMS,    /* MUST BE LAST IN THE LIST!!! */
+    TOKEN_MAX = INT_MAX		/* Keep compiler from reducing the range */
+};
+
+/* Must match the fp_formats array in asm/floats.c */
+enum floatize {
+    FLOAT_8,
+    FLOAT_16,
+    FLOAT_B16,
+    FLOAT_32,
+    FLOAT_64,
+    FLOAT_80M,
+    FLOAT_80E,
+    FLOAT_128L,
+    FLOAT_128H,
+    FLOAT_ERR                   /* Invalid format, MUST BE LAST */
+};
+
+/* Must match the list in string_transform(), in strfunc.c */
+enum strfunc {
+    STRFUNC_UTF16,
+    STRFUNC_UTF16LE,
+    STRFUNC_UTF16BE,
+    STRFUNC_UTF32,
+    STRFUNC_UTF32LE,
+    STRFUNC_UTF32BE
+};
+
+enum ifunc {
+    IFUNC_ILOG2E,
+    IFUNC_ILOG2W,
+    IFUNC_ILOG2F,
+    IFUNC_ILOG2C
+};
+
+size_t string_transform(char *, size_t, char **, enum strfunc);
+
+/*
+ * The expression evaluator must be passed a scanner function; a
+ * standard scanner is provided as part of nasmlib.c. The
+ * preprocessor will use a different one. Scanners, and the
+ * token-value structures they return, look like this.
+ *
+ * The return value from the scanner is always a copy of the
+ * `t_type' field in the structure.
+ */
+struct tokenval {
+    char                *t_charptr;
+    int64_t             t_integer;
+    int64_t             t_inttwo;
+    enum token_type     t_type;
+    int8_t              t_flag;
+    const char		*t_start; /* Pointer to token in input buffer */
+    int			t_len;    /* Length of token in input buffer */
+};
+typedef int (*scanner)(void *private_data, struct tokenval *tv);
+
+struct location {
+    int64_t offset;
+    int32_t segment;
+    int     known;
+};
+extern struct location location;
+
+/*
+ * Expression-evaluator datatype. Expressions, within the
+ * evaluator, are stored as an array of these beasts, terminated by
+ * a record with type==0. Mostly, it's a vector type: each type
+ * denotes some kind of a component, and the value denotes the
+ * multiple of that component present in the expression. The
+ * exception is the WRT type, whose `value' field denotes the
+ * segment to which the expression is relative. These segments will
+ * be segment-base types, i.e. either odd segment values or SEG_ABS
+ * types. So it is still valid to assume that anything with a
+ * `value' field of zero is insignificant.
+ */
+typedef struct {
+    int32_t type;                  /* a register, or EXPR_xxx */
+    int64_t value;                 /* must be >= 32 bits */
+} expr;
+
+/*
+ * Library routines to manipulate expression data types.
+ */
+bool is_reloc(const expr *vect);
+bool is_simple(const expr *vect);
+bool is_really_simple(const expr *vect);
+bool is_unknown(const expr *vect);
+bool is_just_unknown(const expr *vect);
+int64_t reloc_value(const expr *vect);
+int32_t reloc_seg(const expr *vect);
+int32_t reloc_wrt(const expr *vect);
+bool is_self_relative(const expr *vect);
+void dump_expr(const expr *vect);
+
+/*
+ * The evaluator can also return hints about which of two registers
+ * used in an expression should be the base register. See also the
+ * `operand' structure.
+ */
+struct eval_hints {
+    int64_t base;
+    int     type;
+};
+
+/*
+ * The actual expression evaluator function looks like this. When
+ * called, it expects the first token of its expression to already
+ * be in `*tv'; if it is not, set tv->t_type to TOKEN_INVALID and
+ * it will start by calling the scanner.
+ *
+ * If a forward reference happens during evaluation, the evaluator
+ * must set `*fwref' to true if `fwref' is non-NULL.
+ *
+ * `critical' is non-zero if the expression may not contain forward
+ * references. The evaluator will report its own error if this
+ * occurs; if `critical' is 1, the error will be "symbol not
+ * defined before use", whereas if `critical' is 2, the error will
+ * be "symbol undefined".
+ *
+ * If `critical' has bit 8 set (in addition to its main value: 0x101
+ * and 0x102 correspond to 1 and 2) then an extended expression
+ * syntax is recognised, in which relational operators such as =, <
+ * and >= are accepted, as well as low-precedence logical operators
+ * &&, ^^ and ||.
+ *
+ * If `hints' is non-NULL, it gets filled in with some hints as to
+ * the base register in complex effective addresses.
+ */
+#define CRITICAL 0x100
+typedef expr *(*evalfunc)(scanner sc, void *scprivate,
+                          struct tokenval *tv, int *fwref, int critical,
+                          struct eval_hints *hints);
+
+/*
+ * Special values for expr->type.
+ * These come after EXPR_REG_END as defined in regs.h.
+ * Expr types : 0 ~ EXPR_REG_END, EXPR_UNKNOWN, EXPR_...., EXPR_RDSAE,
+ *              EXPR_SEGBASE ~ EXPR_SEGBASE + SEG_ABS, ...
+ */
+#define EXPR_UNKNOWN    (EXPR_REG_END+1) /* forward references */
+#define EXPR_SIMPLE     (EXPR_REG_END+2)
+#define EXPR_WRT        (EXPR_REG_END+3)
+#define EXPR_RDSAE      (EXPR_REG_END+4)
+#define EXPR_SEGBASE    (EXPR_REG_END+5)
+
+/*
+ * preprocessors ought to look like this:
+ */
+
+enum preproc_mode {
+    PP_NORMAL,                  /* Assembly */
+    PP_DEPS,                    /* Dependencies only */
+    PP_PREPROC                  /* Preprocessing only */
+};
+
+enum preproc_opt {
+    PP_TRIVIAL  = 1,            /* Only %line or # directives */
+    PP_NOLINE   = 2,            /* Ignore %line and # directives */
+    PP_TASM     = 4             /* TASM compatibility hacks */
+};
+
+/*
+ * Called once at the very start of assembly.
+ */
+void pp_init(enum preproc_opt opt);
+
+/*
+ * Called at the start of a pass; given a file name, the number
+ * of the pass, an error reporting function, an evaluator
+ * function, and a listing generator to talk to.
+ */
+void pp_reset(const char *file, enum preproc_mode mode,
+              struct strlist *deplist);
+
+/*
+ * Called to fetch a line of preprocessed source. The line
+ * returned has been malloc'ed, and so should be freed after
+ * use.
+ */
+char *pp_getline(void);
+
+/* Called at the end of each pass. */
+void pp_cleanup_pass(void);
+
+/*
+ * Called at the end of the assembly session,
+ * after cleanup_pass() has been called for the
+ * last pass.
+ */
+void pp_cleanup_session(void);
+
+/* Additional macros specific to output format */
+void pp_extra_stdmac(macros_t *macros);
+
+/* Early definitions and undefinitions for macros */
+void pp_pre_define(char *definition);
+void pp_pre_undefine(char *definition);
+
+/* Include file from command line */
+void pp_pre_include(char *fname);
+
+/* Add a command from the command line */
+void pp_pre_command(const char *what, char *str);
+
+/* Include path from command line */
+void pp_include_path(struct strlist *ipath);
+
+/* Unwind the macro stack when printing an error message */
+void pp_error_list_macros(errflags severity);
+
+/* Return true if an error message should be suppressed */
+bool pp_suppress_error(errflags severity);
+
+/* List of dependency files */
+extern struct strlist *depend_list;
+
+/* TASM mode changes some properties */
+extern bool tasm_compatible_mode;
+
+/*
+ * inline function to skip past an identifier; returns the first character past
+ * the identifier if valid, otherwise NULL.
+ */
+static inline char *nasm_skip_identifier(const char *str)
+{
+    const char *p = str;
+
+    if (!nasm_isidstart(*p++)) {
+        p = NULL;
+    } else {
+        while (nasm_isidchar(*p++))
+            ;
+    }
+    return (char *)p;
+}
+
+/*
+ * Data-type flags that get passed to listing-file routines.
+ */
+enum {
+    LIST_READ,
+    LIST_MACRO,
+    LIST_INCLUDE,
+    LIST_INCBIN,
+    LIST_TIMES
+};
+
+/*
+ * -----------------------------------------------------------
+ * Format of the `insn' structure returned from `parser.c' and
+ * passed into `assemble.c'
+ * -----------------------------------------------------------
+ */
+
+/* Verify value to be a valid register */
+static inline bool is_register(int reg)
+{
+    return reg >= EXPR_REG_START && reg < REG_ENUM_LIMIT;
+}
+
+/*
+ * token flags
+ */
+#define TFLAG_BRC       (1 << 0)    /* valid only with braces. {1to8}, {rd-sae}, ...*/
+#define TFLAG_BRC_OPT   (1 << 1)    /* may or may not have braces. opmasks {k1} */
+#define TFLAG_BRC_ANY   (TFLAG_BRC | TFLAG_BRC_OPT)
+#define TFLAG_BRDCAST   (1 << 2)    /* broadcasting decorator */
+#define TFLAG_WARN	(1 << 3)    /* warning only, treat as ID */
+#define TFLAG_DUP	(1 << 4)    /* valid ID but also has context-specific use */
+
+/*
+ * REX flags
+ */
+#define REX_MASK    0x4f    /* Actual REX prefix bits */
+#define REX_B       0x01    /* ModRM r/m extension */
+#define REX_X       0x02    /* SIB index extension */
+#define REX_R       0x04    /* ModRM reg extension */
+#define REX_W       0x08    /* 64-bit operand size */
+#define REX_L       0x20    /* Use LOCK prefix instead of REX.R */
+#define REX_P       0x40    /* REX prefix present/required */
+#define REX_H       0x80    /* High register present, REX forbidden */
+#define REX_V       0x0100  /* Instruction uses VEX/XOP instead of REX */
+#define REX_NH      0x0200  /* Instruction which doesn't use high regs */
+#define REX_EV      0x0400  /* Instruction uses EVEX instead of REX */
+
+/*
+ * EVEX bit field
+ */
+#define EVEX_P0MM       0x0f        /* EVEX P3:0 : Opcode map           */
+#define EVEX_P0RP       0x10        /* EVEX P4 : High-16 reg            */
+#define EVEX_P0X        0x40        /* EVEX P6 : High-16 rm             */
+#define EVEX_P1PP       0x03        /* EVEX P9:8 : Legacy prefix        */
+#define EVEX_P1VVVV     0x78        /* EVEX P14:11 : NDS register       */
+#define EVEX_P1W        0x80        /* EVEX P15 : Osize extension       */
+#define EVEX_P2AAA      0x07        /* EVEX P18:16 : Embedded opmask    */
+#define EVEX_P2VP       0x08        /* EVEX P19 : High-16 NDS reg       */
+#define EVEX_P2B        0x10        /* EVEX P20 : Broadcast / RC / SAE  */
+#define EVEX_P2LL       0x60        /* EVEX P22:21 : Vector length      */
+#define EVEX_P2RC       EVEX_P2LL   /* EVEX P22:21 : Rounding control   */
+#define EVEX_P2Z        0x80        /* EVEX P23 : Zeroing/Merging       */
+
+/*
+ * REX_V "classes" (prefixes which behave like VEX)
+ */
+enum vex_class {
+    RV_VEX      = 0,    /* C4/C5 */
+    RV_XOP      = 1,    /* 8F */
+    RV_EVEX     = 2     /* 62 */
+};
+
+/*
+ * Note that because segment registers may be used as instruction
+ * prefixes, we must ensure the enumerations for prefixes and
+ * register names do not overlap.
+ */
+enum prefixes { /* instruction prefixes */
+    P_none = 0,
+    PREFIX_ENUM_START = REG_ENUM_LIMIT,
+    P_A16 = PREFIX_ENUM_START,
+    P_A32,
+    P_A64,
+    P_ASP,
+    P_LOCK,
+    P_O16,
+    P_O32,
+    P_O64,
+    P_OSP,
+    P_REP,
+    P_REPE,
+    P_REPNE,
+    P_REPNZ,
+    P_REPZ,
+    P_TIMES,
+    P_WAIT,
+    P_XACQUIRE,
+    P_XRELEASE,
+    P_BND,
+    P_NOBND,
+    P_REX,
+    P_EVEX,
+    P_VEX,
+    P_VEX3,
+    P_VEX2,
+    PREFIX_ENUM_LIMIT
+};
+
+enum ea_flags { /* special EA flags */
+    EAF_BYTEOFFS    =   1,  /* force offset part to byte size */
+    EAF_WORDOFFS    =   2,  /* force offset part to dword size */
+    EAF_TIMESTWO    =   4,  /* really do EAX*2 not EAX+EAX */
+    EAF_REL         =   8,  /* IP-relative addressing */
+    EAF_ABS         =  16,  /* non-IP-relative addressing */
+    EAF_FSGS        =  32,  /* fs/gs segment override present */
+    EAF_MIB         =  64,  /* mib operand */
+    EAF_SIB         = 128   /* SIB encoding obligatory */
+};
+
+enum eval_hint { /* values for `hinttype' */
+    EAH_NOHINT   = 0,       /* no hint at all - our discretion */
+    EAH_MAKEBASE = 1,       /* try to make given reg the base */
+    EAH_NOTBASE  = 2,       /* try _not_ to make reg the base */
+    EAH_SUMMED   = 3        /* base and index are summed into index */
+};
+
+typedef struct operand { /* operand to an instruction */
+    opflags_t       type;       /* type of operand */
+    int             disp_size;  /* 0 means default; 16; 32; 64 */
+    enum reg_enum   basereg;
+    enum reg_enum   indexreg;   /* address registers */
+    int             scale;      /* index scale */
+    int             hintbase;
+    enum eval_hint  hinttype;   /* hint as to real base register */
+    int32_t         segment;    /* immediate segment, if needed */
+    int64_t         offset;     /* any immediate number */
+    int32_t         wrt;        /* segment base it's relative to */
+    int             eaflags;    /* special EA flags */
+    int             opflags;    /* see OPFLAG_* defines below */
+    decoflags_t     decoflags;  /* decorator flags such as {...} */
+} operand;
+
+#define OPFLAG_FORWARD      1   /* operand is a forward reference */
+#define OPFLAG_EXTERN       2   /* operand is an external reference */
+#define OPFLAG_UNKNOWN      4   /* operand is an unknown reference
+                                   (always a forward reference also) */
+#define OPFLAG_RELATIVE     8   /* operand is self-relative, e.g. foo - $
+                                   where foo is not in the current segment */
+
+enum extop_type { /* extended operand types */
+    EOT_NOTHING = 0,
+    EOT_EXTOP,          /* Subexpression */
+    EOT_DB_STRING,      /* Byte string */
+    EOT_DB_FLOAT,       /* Floating-pointer number (special byte string) */
+    EOT_DB_STRING_FREE, /* Byte string which should be nasm_free'd*/
+    EOT_DB_NUMBER,      /* Integer */
+    EOT_DB_RESERVE      /* ? */
+};
+
+typedef struct extop { /* extended operand */
+    struct extop    *next;       /* linked list */
+    union {
+        struct {                 /* text or byte string */
+            char    *data;
+            size_t   len;
+        } string;
+        struct {                 /* numeric expression */
+            int64_t  offset;     /* numeric value or address offset */
+            int32_t  segment;    /* address segment */
+            int32_t  wrt;        /* address wrt */
+            bool     relative;   /* self-relative expression */
+        } num;
+        struct extop *subexpr;   /* actual expressions */
+    } val;
+    size_t dup;                  /* duplicated? */
+    enum extop_type type;        /* defined above */
+    int elem;                    /* element size override, if any (bytes) */
+} extop;
+
+enum ea_type {
+    EA_INVALID,     /* Not a valid EA at all */
+    EA_SCALAR,      /* Scalar EA */
+    EA_XMMVSIB,     /* XMM vector EA */
+    EA_YMMVSIB,     /* YMM vector EA */
+    EA_ZMMVSIB      /* ZMM vector EA */
+};
+
+/*
+ * Prefix positions: each type of prefix goes in a specific slot.
+ * This affects the final ordering of the assembled output, which
+ * shouldn't matter to the processor, but if you have stylistic
+ * preferences, you can change this.  REX prefixes are handled
+ * differently for the time being.
+ *
+ * LOCK and REP used to be one slot; this is no longer the case since
+ * the introduction of HLE.
+ */
+enum prefix_pos {
+    PPS_TIMES = -1,     /* TIMES (not a slot, handled separately) */
+    PPS_WAIT  =  0,   	/* WAIT (technically not a prefix!) */
+    PPS_REP,    	/* REP/HLE prefix */
+    PPS_LOCK,   	/* LOCK prefix */
+    PPS_SEG,    	/* Segment override prefix */
+    PPS_OSIZE,  	/* Operand size prefix */
+    PPS_ASIZE,  	/* Address size prefix */
+    PPS_REX,    	/* REX/VEX type */
+    MAXPREFIX   	/* Total number of prefix slots */
+};
+
+/*
+ * Tuple types that are used when determining Disp8*N eligibility
+ * The order must match with a hash %tuple_codes in insns.pl
+ */
+enum ttypes {
+    FV    = 001,
+    HV    = 002,
+    FVM   = 003,
+    T1S8  = 004,
+    T1S16 = 005,
+    T1S   = 006,
+    T1F32 = 007,
+    T1F64 = 010,
+    T2    = 011,
+    T4    = 012,
+    T8    = 013,
+    HVM   = 014,
+    QVM   = 015,
+    OVM   = 016,
+    M128  = 017,
+    DUP   = 020
+};
+
+/* EVEX.L'L : Vector length on vector insns */
+enum vectlens {
+    VL128 = 0,
+    VL256 = 1,
+    VL512 = 2,
+    VLMAX = 3
+};
+
+/* If you need to change this, also change it in insns.pl */
+#define MAX_OPERANDS 5
+
+typedef struct insn { /* an instruction itself */
+    char            *label;                 /* the label defined, or NULL */
+    int             prefixesMAXPREFIX;    /* instruction prefixes, if any */
+    enum opcode     opcode;                 /* the opcode - not just the string */
+    int             operands;               /* how many operands? 0-3 (more if db et al) */
+    int             addr_size;              /* address size */
+    operand         oprsMAX_OPERANDS;     /* the operands, defined as above */
+    extop           *eops;                  /* extended operands */
+    int             eops_float;             /* true if DD and floating */
+    int32_t         times;                  /* repeat count (TIMES prefix) */
+    bool            forw_ref;               /* is there a forward reference? */
+    bool            rex_done;               /* REX prefix emitted? */
+    int             rex;                    /* Special REX Prefix */
+    int             vexreg;                 /* Register encoded in VEX prefix */
+    int             vex_cm;                 /* Class and M field for VEX prefix */
+    int             vex_wlp;                /* W, P and L information for VEX prefix */
+    uint8_t         evex_p3;              /* EVEX.P0: RXB,R',00,mm, P1: W,vvvv,1,pp */
+                                            /* EVEX.P2: z,L'L,b,V',aaa */
+    enum ttypes     evex_tuple;             /* Tuple type for compressed Disp8*N */
+    int             evex_rm;                /* static rounding mode for AVX512 (EVEX) */
+    int8_t          evex_brerop;            /* BR/ER/SAE operand position */
+} insn;
+
+/* Instruction flags type: IF_* flags are defined in insns.h */
+typedef uint64_t iflags_t;
+
+/*
+ * What to return from a directive- or pragma-handling function.
+ * Currently DIRR_OK and DIRR_ERROR are treated the same way;
+ * in both cases the backend is expected to produce the appropriate
+ * error message on its own.
+ *
+ * DIRR_BADPARAM causes a generic error message to be printed.  Note
+ * that it is an error, not a warning, even in the case of pragmas;
+ * don't use it where forward compatibility would be compromised
+ * (instead consider adding a DIRR_WARNPARAM.)
+ */
+enum directive_result {
+    DIRR_UNKNOWN,               /* Directive not handled by backend */
+    DIRR_OK,                    /* Directive processed */
+    DIRR_ERROR,                 /* Directive processed unsuccessfully */
+    DIRR_BADPARAM               /* Print bad argument error message */
+};
+
+/*
+ * A pragma facility: this structure is used to request passing a
+ * parsed pragma directive for a specific facility.  If the handler is
+ * NULL then this pragma facility is recognized but ignored; pragma
+ * processing stops at that point.
+ *
+ * Note that the handler is passed a pointer to the facility structure
+ * as part of the struct pragma.
+ */
+struct pragma;
+typedef enum directive_result (*pragma_handler)(const struct pragma *);
+
+struct pragma_facility {
+    const char *name;
+    pragma_handler handler;
+};
+
+/*
+ * This structure defines how a pragma directive is passed to a
+ * facility.  This structure may be augmented in the future.
+ *
+ * Any facility MAY, but is not required to, add its operations
+ * keywords or a subset thereof into asm/directiv.dat, in which case
+ * the "opcode" field will be set to the corresponding D_ constant
+ * from directiv.h; otherwise it will be D_unknown.
+ */
+struct pragma {
+    const struct pragma_facility *facility;
+    const char *facility_name;  /* Facility name exactly as entered by user */
+    const char *opname;         /* First word after the facility name */
+    const char *tail;           /* Anything after the operation */
+    enum directive opcode;     /* Operation as a D_ directives constant */
+};
+
+/*
+ * These are semi-arbitrary limits to keep the assembler from going
+ * into a black hole on certain kinds of bugs.  They can be overridden
+ * by command-line options or %pragma.
+ */
+enum nasm_limit {
+    LIMIT_PASSES,
+    LIMIT_STALLED,
+    LIMIT_MACRO_LEVELS,
+    LIMIT_MACRO_TOKENS,
+    LIMIT_MMACROS,
+    LIMIT_REP,
+    LIMIT_EVAL,
+    LIMIT_LINES
+};
+#define LIMIT_MAX LIMIT_LINES
+extern int64_t nasm_limitLIMIT_MAX+1;
+extern enum directive_result  nasm_set_limit(const char *, const char *);
+
+/*
+ * The data structure defining an output format driver, and the
+ * interfaces to the functions therein.
+ */
+struct ofmt {
+    /*
+     * This is a short (one-liner) description of the type of
+     * output generated by the driver.
+     */
+    const char *fullname;
+
+    /*
+     * This is a single keyword used to select the driver.
+     */
+    const char *shortname;
+
+    /*
+     * Default output filename extension, or a null string
+     */
+    const char *extension;
+
+    /*
+     * Output format flags.
+     */
+#define OFMT_TEXT		1	/* Text file format */
+#define OFMT_KEEP_ADDR	2	/* Keep addr; no conversion to data */
+
+    unsigned int flags;
+
+    int maxbits;                /* Maximum segment bits supported */
+
+    /*
+     * this is a pointer to the first element of the debug information
+     */
+    const struct dfmt * const *debug_formats;
+
+    /*
+     * the default debugging format if -F is not specified
+     */
+    const struct dfmt *default_dfmt;
+
+    /*
+     * This, if non-NULL, is a NULL-terminated list of `char *'s
+     * pointing to extra standard macros supplied by the object
+     * format (e.g. a sensible initial default value of __?SECT?__,
+     * and user-level equivalents for any format-specific
+     * directives).
+     */
+    macros_t *stdmac;
+
+    /*
+     * This procedure is called at the start of an output session to set
+     * up internal parameters.
+     */
+    void (*init)(void);
+
+    /*
+     * This procedure is called at the start of each pass.
+     */
+    void (*reset)(void);
+
+    /*
+     * This is the modern output function, which gets passed
+     * a struct out_data with much more information.  See the
+     * definition of struct out_data.
+     */
+    void (*output)(const struct out_data *data);
+
+    /*
+     * This procedure is called by assemble() to write actual
+     * generated code or data to the object file. Typically it
+     * doesn't have to actually _write_ it, just store it for
+     * later.
+     *
+     * The `type' argument specifies the type of output data, and
+     * usually the size as well: its contents are described below.
+     *
+     * This is used for backends which have not yet been ported to
+     * the new interface, and should be NULL on ported backends.
+     * To use this entry point, set the output pointer to
+     * nasm_do_legacy_output.
+     */
+    void (*legacy_output)(int32_t segto, const void *data,
+                          enum out_type type, uint64_t size,
+                          int32_t segment, int32_t wrt);
+
+    /*
+     * This procedure is called once for every symbol defined in
+     * the module being assembled. It gives the name and value of
+     * the symbol, in NASM's terms, and indicates whether it has
+     * been declared to be global. Note that the parameter "name",
+     * when passed, will point to a piece of static storage
+     * allocated inside the label manager - it's safe to keep using
+     * that pointer, because the label manager doesn't clean up
+     * until after the output driver has.
+     *
+     * Values of `is_global' are: 0 means the symbol is local; 1
+     * means the symbol is global; 2 means the symbol is common (in
+     * which case `offset' holds the _size_ of the variable).
+     * Anything else is available for the output driver to use
+     * internally.
+     *
+     * This routine explicitly _is_ allowed to call the label
+     * manager to define further symbols, if it wants to, even
+     * though it's been called _from_ the label manager. That much
+     * re-entrancy is guaranteed in the label manager. However, the
+     * label manager will in turn call this routine, so it should
+     * be prepared to be re-entrant itself.
+     *
+     * The `special' parameter contains special information passed
+     * through from the command that defined the label: it may have
+     * been an EXTERN, a COMMON or a GLOBAL. The distinction should
+     * be obvious to the output format from the other parameters.
+     */
+    void (*symdef)(char *name, int32_t segment, int64_t offset,
+                   int is_global, char *special);
+
+    /*
+     * This procedure is called when the source code requests a
+     * segment change. It should return the corresponding segment
+     * _number_ for the name, or NO_SEG if the name is not a valid
+     * segment name.
+     *
+     * It may also be called with NULL, in which case it is to
+     * return the _default_ section number for starting assembly in.
+     *
+     * It is allowed to modify the string it is given a pointer to.
+     *
+     * It is also allowed to specify a default instruction size for
+     * the segment, by setting `*bits' to 16, 32 or 64. Or, if it
+     * doesn't wish to define a default, it can leave `bits' alone.
+     */
+    int32_t (*section)(char *name, int *bits);
+
+    /*
+     * This function is called when a label is defined
+     * in the source code. It is allowed to change the section
+     * number as a result, but not the bits value.
+     * This is *only* called if the symbol defined is at the
+     * current offset, i.e. "foo:" or "foo equ $".
+     * The offset isn't passed; and may not be stable at this point.
+     * The subsection number is a field available for use by the
+     * backend. It is initialized to NO_SEG.
+     *
+     * If "copyoffset" is set by the backend then the offset is
+     * copied from the previous segment, otherwise the new segment
+     * is treated as a new segment the normal way.
+     */
+    int32_t (*herelabel)(const char *name, enum label_type type,
+                         int32_t seg, int32_t *subsection,
+                         bool *copyoffset);
+
+    /*
+     * This procedure is called to modify section alignment,
+     * note there is a trick, the alignment can only increase
+     */
+    void (*sectalign)(int32_t seg, unsigned int value);
+
+    /*
+     * This procedure is called to modify the segment base values
+     * returned from the SEG operator. It is given a segment base
+     * value (i.e. a segment value with the low bit set), and is
+     * required to produce in return a segment value which may be
+     * different. It can map segment bases to absolute numbers by
+     * means of returning SEG_ABS types.
+     *
+     * It should return NO_SEG if the segment base cannot be
+     * determined; the evaluator (which calls this routine) is
+     * responsible for throwing an error condition if that occurs
+     * in pass two or in a critical expression.
+     */
+    int32_t (*segbase)(int32_t segment);
+
+    /*
+     * This procedure is called to allow the output driver to
+     * process its own specific directives. When called, it has the
+     * directive word in `directive' and the parameter string in
+     * `value'.
+     *
+     * The following values are (currently) possible for
+     * directive_result:
+     *
+     * 0 - DIRR_UNKNOWN		- directive not recognized by backend
+     * 1 - DIRR_OK		- directive processed ok
+     * 2 - DIRR_ERROR		- backend printed its own error message
+     * 3 - DIRR_BADPARAM	- print the generic message
+     *				  "invalid parameter to * directive"
+     */
+    enum directive_result
+    (*directive)(enum directive directive, char *value);
+
+    /*
+     * This procedure is called after assembly finishes, to allow
+     * the output driver to clean itself up and free its memory.
+     * Typically, it will also be the point at which the object
+     * file actually gets _written_.
+     *
+     * One thing the cleanup routine should always do is to close
+     * the output file pointer.
+     */
+    void (*cleanup)(void);
+
+    /*
+     * List of pragma facility names that apply to this backend.
+     */
+    const struct pragma_facility *pragmas;
+};
+
+/*
+ * Output format driver alias
+ */
+struct ofmt_alias {
+    const char  *shortname;
+    const struct ofmt *ofmt;
+};
+
+extern const struct ofmt *ofmt;
+extern FILE *ofile;
+
+/*
+ * ------------------------------------------------------------
+ * The data structure defining a debug format driver, and the
+ * interfaces to the functions therein.
+ * ------------------------------------------------------------
+ */
+struct debug_macro_info;
+
+struct dfmt {
+    /*
+     * This is a short (one-liner) description of the type of
+     * output generated by the driver.
+     */
+    const char *fullname;
+
+    /*
+     * This is a single keyword used to select the driver.
+     */
+    const char *shortname;
+
+    /*
+     * init - called initially to set up local pointer to object format.
+     */
+    void (*init)(void);
+
+    /*
+     * linenum - called any time there is output with a change of
+     * line number or file.
+     */
+    void (*linenum)(const char *filename, int32_t linenumber, int32_t segto);
+
+    /*
+     * debug_deflabel - called whenever a label is defined. Parameters
+     * are the same as to 'symdef()' in the output format. This function
+     * is called after the output format version.
+     */
+
+    void (*debug_deflabel)(char *name, int32_t segment, int64_t offset,
+                           int is_global, char *special);
+
+    /*
+     * debug_smacros - called when an smacro is defined or undefined
+     * during the code-generation pass. The definition string contains
+     * the macro name, any arguments, a single space, and the macro
+     * definition; this is what is expected by e.g. DWARF.
+     *
+     * The definition is provided even for an undef.
+     */
+    void (*debug_smacros)(bool define, const char *def);
+
+    /*
+     * debug_include - called when a file is included or the include
+     * is finished during the code-generation pass.  The filename is
+     * kept by the srcfile system and so can be compared for pointer
+     * equality.
+     *
+     * A filename of NULL means builtin (initial or %use) or command
+     * line statements.
+     */
+    void (*debug_include)(bool start, struct src_location outer,
+                          struct src_location inner);
+
+    /*
+     * debug_mmacros - called once at the end with a definition for each
+     * non-.nolist macro that has been invoked at least once in the program,
+     * and the corresponding address ranges. See dbginfo.h.
+     */
+    void (*debug_mmacros)(const struct debug_macro_info *);
+
+    /*
+     * debug_directive - called whenever a DEBUG directive other than 'LINE'
+     * is encountered. 'directive' contains the first parameter to the
+     * DEBUG directive, and params contains the rest. For example,
+     * 'DEBUG VAR _somevar:int' would translate to a call to this
+     * function with 'directive' equal to "VAR" and 'params' equal to
+     * "_somevar:int".
+     */
+    void (*debug_directive)(const char *directive, const char *params);
+
+    /*
+     * typevalue - called whenever the assembler wishes to register a type
+     * for the last defined label.  This routine MUST detect if a type was
+     * already registered and not re-register it.
+     */
+    void (*debug_typevalue)(int32_t type);
+
+    /*
+     * debug_output - called whenever output is required
+     * 'type' is the type of info required, and this is format-specific
+     */
+    void (*debug_output)(int type, void *param);
+
+    /*
+     * cleanup - called after processing of file is complete
+     */
+    void (*cleanup)(void);
+
+    /*
+     * List of pragma facility names that apply to this backend.
+     */
+    const struct pragma_facility *pragmas;
+};
+
+extern const struct dfmt *dfmt;
+
+/*
+ * The type definition macros
+ * for debugging
+ *
+ * low 3 bits: reserved
+ * next 5 bits: type
+ * next 24 bits: number of elements for arrays (0 for labels)
+ */
+
+#define TY_UNKNOWN 0x00
+#define TY_LABEL   0x08
+#define TY_BYTE    0x10
+#define TY_WORD    0x18
+#define TY_DWORD   0x20
+#define TY_FLOAT   0x28
+#define TY_QWORD   0x30
+#define TY_TBYTE   0x38
+#define TY_OWORD   0x40
+#define TY_YWORD   0x48
+#define TY_ZWORD   0x50
+#define TY_COMMON  0xE0
+#define TY_SEG     0xE8
+#define TY_EXTERN  0xF0
+#define TY_EQU     0xF8
+
+#define TYM_TYPE(x)     ((x) & 0xF8)
+#define TYM_ELEMENTS(x) (((x) & 0xFFFFFF00) >> 8)
+
+#define TYS_ELEMENTS(x) ((x) << 8)
+
+/* Sizes corresponding to various tokens */
+enum byte_sizes {
+    SIZE_BYTE	=  1,
+    SIZE_WORD	=  2,
+    SIZE_DWORD	=  4,
+    SIZE_QWORD	=  8,
+    SIZE_TWORD  = 10,
+    SIZE_OWORD  = 16,
+    SIZE_YWORD  = 32,
+    SIZE_ZWORD  = 64
+};
+
+enum special_tokens {
+    SIZE_ENUM_START     = PREFIX_ENUM_LIMIT,
+    S_BYTE              = SIZE_ENUM_START,
+    S_WORD,
+    S_DWORD,
+    S_QWORD,
+    S_TWORD,
+    S_OWORD,
+    S_YWORD,
+    S_ZWORD,
+    SIZE_ENUM_LIMIT,
+
+    SPECIAL_ENUM_START  = SIZE_ENUM_LIMIT,
+    S_ABS		= SPECIAL_ENUM_START,
+    S_FAR,
+    S_LONG,
+    S_NEAR,
+    S_NOSPLIT,
+    S_REL,
+    S_SHORT,
+    S_STRICT,
+    S_TO,
+    SPECIAL_ENUM_LIMIT
+};
+
+enum decorator_tokens {
+    DECORATOR_ENUM_START    = SPECIAL_ENUM_LIMIT,
+    BRC_1TO2                = DECORATOR_ENUM_START,
+    BRC_1TO4,
+    BRC_1TO8,
+    BRC_1TO16,
+    BRC_1TO32,
+    BRC_RN,
+    BRC_RD,
+    BRC_RU,
+    BRC_RZ,
+    BRC_SAE,
+    BRC_Z,
+    DECORATOR_ENUM_LIMIT
+};
+
+/*
+ * AVX512 Decorator (decoflags_t) bits distribution (counted from 0)
+ *  3         2         1
+ * 10987654321098765432109876543210
+ *                |
+ *                | word boundary
+ * ............................1111 opmask
+ * ...........................1.... zeroing / merging
+ * ..........................1..... broadcast
+ * .........................1...... static rounding
+ * ........................1....... SAE
+ * ....................1111........ broadcast element size
+ * .................111............ number of broadcast elements
+ */
+#define OP_GENVAL(val, bits, shift)     (((val) & ((UINT64_C(1) << (bits)) - 1)) << (shift))
+
+/*
+ * Opmask register number
+ * identical to EVEX.aaa
+ *
+ * Bits: 0 - 3
+ */
+#define OPMASK_SHIFT            (0)
+#define OPMASK_BITS             (4)
+#define OPMASK_MASK             OP_GENMASK(OPMASK_BITS, OPMASK_SHIFT)
+#define GEN_OPMASK(bit)         OP_GENBIT(bit, OPMASK_SHIFT)
+#define VAL_OPMASK(val)         OP_GENVAL(val, OPMASK_BITS, OPMASK_SHIFT)
+
+/*
+ * zeroing / merging control available
+ * matching to EVEX.z
+ *
+ * Bits: 4
+ */
+#define Z_SHIFT                 (4)
+#define Z_BITS                  (1)
+#define Z_MASK                  OP_GENMASK(Z_BITS, Z_SHIFT)
+#define GEN_Z(bit)              OP_GENBIT(bit, Z_SHIFT)
+
+/*
+ * broadcast - Whether this operand can be broadcasted
+ *
+ * Bits: 5
+ */
+#define BRDCAST_SHIFT           (5)
+#define BRDCAST_BITS            (1)
+#define BRDCAST_MASK            OP_GENMASK(BRDCAST_BITS, BRDCAST_SHIFT)
+#define GEN_BRDCAST(bit)        OP_GENBIT(bit, BRDCAST_SHIFT)
+
+/*
+ * Whether this instruction can have a static rounding mode.
+ * It goes with the last simd operand because the static rounding mode
+ * decorator is located between the last simd operand and imm8 (if any).
+ *
+ * Bits: 6
+ */
+#define STATICRND_SHIFT         (6)
+#define STATICRND_BITS          (1)
+#define STATICRND_MASK          OP_GENMASK(STATICRND_BITS, STATICRND_SHIFT)
+#define GEN_STATICRND(bit)      OP_GENBIT(bit, STATICRND_SHIFT)
+
+/*
+ * SAE(Suppress all exception) available
+ *
+ * Bits: 7
+ */
+#define SAE_SHIFT               (7)
+#define SAE_BITS                (1)
+#define SAE_MASK                OP_GENMASK(SAE_BITS, SAE_SHIFT)
+#define GEN_SAE(bit)            OP_GENBIT(bit, SAE_SHIFT)
+
+/*
+ * Broadcasting element size.
+ *
+ * Bits: 8 - 11
+ */
+#define BRSIZE_SHIFT            (8)
+#define BRSIZE_BITS             (4)
+#define BRSIZE_MASK             OP_GENMASK(BRSIZE_BITS, BRSIZE_SHIFT)
+#define GEN_BRSIZE(bit)         OP_GENBIT(bit, BRSIZE_SHIFT)
+
+#define BR_BITS8		GEN_BRSIZE(0) /* For potential future use */
+#define BR_BITS16               GEN_BRSIZE(1)
+#define BR_BITS32               GEN_BRSIZE(2)
+#define BR_BITS64               GEN_BRSIZE(3)
+
+/*
+ * Number of broadcasting elements
+ *
+ * Bits: 12 - 14
+ */
+#define BRNUM_SHIFT             (12)
+#define BRNUM_BITS              (3)
+#define BRNUM_MASK              OP_GENMASK(BRNUM_BITS, BRNUM_SHIFT)
+#define VAL_BRNUM(val)          OP_GENVAL(val, BRNUM_BITS, BRNUM_SHIFT)
+
+#define BR_1TO2                 VAL_BRNUM(0)
+#define BR_1TO4                 VAL_BRNUM(1)
+#define BR_1TO8                 VAL_BRNUM(2)
+#define BR_1TO16                VAL_BRNUM(3)
+#define BR_1TO32                VAL_BRNUM(4)
+#define BR_1TO64                VAL_BRNUM(5) /* For potential future use */
+
+#define MASK                    OPMASK_MASK             /* Opmask (k1 ~ 7) can be used */
+#define Z                       Z_MASK
+#define B16                     (BRDCAST_MASK|BR_BITS16) /* {1to32} : broadcast 16b * 32 to zmm(512b) */
+#define B32                     (BRDCAST_MASK|BR_BITS32) /* {1to16} : broadcast 32b * 16 to zmm(512b) */
+#define B64                     (BRDCAST_MASK|BR_BITS64) /* {1to8}  : broadcast 64b *  8 to zmm(512b) */
+#define ER                      STATICRND_MASK          /* ER(Embedded Rounding) == Static rounding mode */
+#define SAE                     SAE_MASK                /* SAE(Suppress All Exception) */
+
+/*
+ * Broadcast flags (BR_BITS*) to sizes (BITS*)
+ */
+static inline opflags_t brsize_to_size(opflags_t brbits)
+{
+    return (brbits & BRSIZE_MASK) << (SIZE_SHIFT - BRSIZE_SHIFT);
+}
+
+/*
+ * Global modes
+ */
+
+/*
+ * flag to disable optimizations selectively
+ * this is useful to turn-off certain optimizations
+ */
+enum optimization_disable_flag {
+    OPTIM_ALL_ENABLED       = 0,
+    OPTIM_DISABLE_JMP_MATCH = 1
+};
+
+struct optimization {
+    int level;
+    int flag;
+};
+
+/*
+ * Various types of compiler passes we may execute.
+ * If these are changed, you need to also change _pass_types
+ * in asm/nasm.c.
+ */
+enum pass_type {
+    PASS_INIT,            /* Initialization, not doing anything yet */
+    PASS_PREPROC,         /* Preprocess-only mode (similar to PASS_FIRST) */
+    PASS_FIRST,           /* The very first pass over the code */
+    PASS_OPT,             /* Optimization pass */
+    PASS_STAB,            /* Stabilization pass (original pass 1) */
+    PASS_FINAL            /* Code generation pass (original pass 2) */
+};
+extern const char * const _pass_types;
+extern enum pass_type _pass_type;
+static inline enum pass_type pass_type(void)
+{
+    return _pass_type;
+}
+static inline const char *pass_type_name(void)
+{
+    return _pass_types_pass_type;
+}
+/* True during initialization, no code read yet */
+static inline bool not_started(void)
+{
+    return pass_type() == PASS_INIT;
+}
+/* True for the initial pass and setup (old "pass2 < 2") */
+static inline bool pass_first(void)
+{
+    return pass_type() <= PASS_FIRST;
+}
+/* At this point we better have stable definitions */
+static inline bool pass_stable(void)
+{
+    return pass_type() >= PASS_STAB;
+}
+/* True for the code generation pass only, (old "pass1 >= 2") */
+static inline bool pass_final(void)
+{
+    return pass_type() >= PASS_FINAL;
+}
+/* True for code generation *or* preprocess-only mode */
+static inline bool pass_final_or_preproc(void)
+{
+    return pass_type() >= PASS_FINAL || pass_type() == PASS_PREPROC;
+}
+
+/*
+ * The actual pass number. 0 is used during initialization, the very
+ * first pass is 1, and then it is simply increasing numbers until we are
+ * done.
+ */
+extern int64_t _passn;           /* Actual pass number */
+static inline int64_t pass_count(void)
+{
+    return _passn;
+}
+
+extern struct optimization optimizing;
+extern int globalbits;          /* 16, 32 or 64-bit mode */
+extern int globalrel;           /* default to relative addressing? */
+extern int globalbnd;           /* default to using bnd prefix? */
+
+extern const char *inname;	/* primary input filename */
+extern const char *outname;     /* output filename */
+
+/*
+ * Switch to a different segment and return the current offset
+ */
+int64_t switch_segment(int32_t segment);
+
+#endif  /* NASM_NASM_H */

_service:tar_scm:nasm-2.16.03.tar.xz/include/nasmint.h Added

@@ -0,0 +1,219 @@
+/*
+ * nasmint.h
+ *
+ * Small ersatz subset of <inttypes.h>, deriving the types from
+ * <limits.h>.
+ *
+ * Important: the preprocessor may truncate numbers too large for it.
+ * Therefore, test the signed types only ... truncation won't generate
+ * a 01111111... bit pattern.
+ */
+
+#ifndef NASM_NASMINT_H
+#define NASM_NASMINT_H
+
+#include <limits.h>
+
+/*** 64-bit type: __int64, long or long long ***/
+
+/* Some old versions of gcc <limits.h> omit LLONG_MAX */
+#ifndef LLONG_MAX
+# ifdef __LONG_LONG_MAX__
+#  define LLONG_MAX __LONG_LONG_MAX__
+# else
+#  define LLONG_MAX 0		/* Assume long long is unusable */
+# endif
+#endif
+
+#ifndef _I64_MAX
+# ifdef _MSC_VER
+#  define _I64_MAX 9223372036854775807
+# else
+#  define _I64_MAX 0
+# endif
+#endif
+
+#if _I64_MAX == 9223372036854775807
+
+/* Windows-based compiler: use __int64 */
+typedef signed __int64		int64_t;
+typedef unsigned __int64	uint64_t;
+#define _scn64			"I64"
+#define _pri64			"I64"
+#define INT64_C(x)		x ## i64
+#define UINT64_C(x)		x ## ui64
+
+#elif LONG_MAX == 9223372036854775807L
+
+/* long is 64 bits */
+typedef signed long		int64_t;
+typedef unsigned long		uint64_t;
+#define _scn64			"l"
+#define _pri64			"l"
+#define INT64_C(x)		x ## L
+#define UINT64_C(x)		x ## UL
+
+#elif LLONG_MAX == 9223372036854775807LL
+
+/* long long is 64 bits */
+typedef signed long long	int64_t;
+typedef unsigned long long	uint64_t;
+#define _scn64			"ll"
+#define _pri64			"ll"
+#define INT64_C(x)		x ## LL
+#define UINT64_C(x)		x ## ULL
+
+#else
+
+#error "Neither long nor long long is 64 bits in size"
+
+#endif
+
+/*** 32-bit type: int or long ***/
+
+#if INT_MAX == 2147483647
+
+/* int is 32 bits */
+typedef signed int		int32_t;
+typedef unsigned int		uint32_t;
+#define _scn32			""
+#define _pri32			""
+#define INT32_C(x)		x
+#define UINT32_C(x)		x ## U
+
+#elif LONG_MAX == 2147483647L
+
+/* long is 32 bits */
+typedef signed long		int32_t;
+typedef unsigned long		uint32_t;
+#define _scn32			"l"
+#define _pri32			"l"
+#define INT32_C(x)		x ## L
+#define UINT32_C(x)		x ## UL
+
+#else
+
+#error "Neither int nor long is 32 bits in size"
+
+#endif
+
+/*** 16-bit size: int or short ***/
+
+#if INT_MAX == 32767
+
+/* int is 16 bits */
+typedef signed int		int16_t;
+typedef unsigned int		uint16_t;
+#define _scn16			""
+#define _pri16			""
+#define INT16_C(x)		x
+#define UINT16_C(x)		x ## U
+
+#elif SHRT_MAX == 32767
+
+/* short is 16 bits */
+typedef signed short		int16_t;
+typedef unsigned short		uint16_t;
+#define _scn16			"h"
+#define _pri16			""
+#define INT16_C(x)		x
+#define UINT16_C(x)		x ## U
+
+#else
+
+#error "Neither short nor int is 16 bits in size"
+
+#endif
+
+/*** 8-bit size: char ***/
+
+#if SCHAR_MAX == 127
+
+/* char is 8 bits */
+typedef signed char		int8_t;
+typedef unsigned char		uint8_t;
+#define _scn8			"hh"
+#define _pri8			""
+#define INT8_C(x)		x
+#define UINT8_C(x)		x ## U
+
+#else
+
+#error "char is not 8 bits in size"
+
+#endif
+
+/* The rest of this is common to all models */
+
+#define PRId8		_pri8  "d"
+#define PRId16		_pri16 "d"
+#define PRId32		_pri32 "d"
+#define PRId64		_pri64 "d"
+
+#define PRIi8		_pri8  "i"
+#define PRIi16		_pri16 "i"
+#define PRIi32		_pri32 "i"
+#define PRIi64		_pri64 "i"
+
+#define PRIo8		_pri8  "o"
+#define PRIo16		_pri16 "o"
+#define PRIo32		_pri32 "o"
+#define PRIo64		_pri64 "o"
+
+#define PRIu8		_pri8  "u"
+#define PRIu16		_pri16 "u"
+#define PRIu32		_pri32 "u"
+#define PRIu64		_pri64 "u"
+
+#define PRIx8		_pri8  "x"
+#define PRIx16		_pri16 "x"
+#define PRIx32		_pri32 "x"
+#define PRIx64		_pri64 "x"
+
+#define PRIX8		_pri8  "X"
+#define PRIX16		_pri16 "X"
+#define PRIX32		_pri32 "X"
+#define PRIX64		_pri64 "X"
+
+#define SCNd8		_scn8  "d"
+#define SCNd16		_scn16 "d"
+#define SCNd32		_scn32 "d"
+#define SCNd64		_scn64 "d"
+
+#define SCNi8		_scn8  "i"
+#define SCNi16		_scn16 "i"
+#define SCNi32		_scn32 "i"
+#define SCNi64		_scn64 "i"
+
+#define SCNo8		_scn8  "o"
+#define SCNo16		_scn16 "o"
+#define SCNo32		_scn32 "o"
+#define SCNo64		_scn64 "o"
+
+#define SCNu8		_scn8  "u"
+#define SCNu16		_scn16 "u"
+#define SCNu32		_scn32 "u"
+#define SCNu64		_scn64 "u"
+
+#define SCNx8		_scn8  "x"
+#define SCNx16		_scn16 "x"
+#define SCNx32		_scn32 "x"
+#define SCNx64		_scn64 "x"
+
+#define INT8_MIN	INT8_C(-128)
+#define INT8_MAX	INT8_C(127)
+#define UINT8_MAX	UINT8_C(255)
+
+#define INT16_MIN	INT16_C(-32768)
+#define INT16_MAX	INT16_C(32767)
+#define UINT16_MAX	UINT16_C(65535)
+
+#define INT32_MIN	INT32_C(-2147483648)
+#define INT32_MAX	INT32_C(2147483647)
+#define UINT32_MAX	UINT32_C(4294967295)
+
+#define INT64_MIN	INT64_C(-9223372036854775808)
+#define INT64_MAX	INT64_C(9223372036854775807)
+#define UINT64_MAX	UINT64_C(18446744073709551615)
+
+#endif /* NASM_NASMINT_H */

_service:tar_scm:nasm-2.16.03.tar.xz/include/nasmlib.h Added

@@ -0,0 +1,498 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2023 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * nasmlib.h    header file for nasmlib.c
+ */
+
+#ifndef NASM_NASMLIB_H
+#define NASM_NASMLIB_H
+
+#include "compiler.h"
+#include "bytesex.h"
+
+/*
+ * Useful construct for private values
+ */
+union intorptr {
+    int64_t i;
+    uint64_t u;
+    size_t s;
+    void *p;
+    const void *cp;
+    uintptr_t up;
+};
+typedef union intorptr intorptr;
+
+/*
+ * Wrappers around malloc, realloc, free and a few more. nasm_malloc
+ * will fatal-error and die rather than return NULL; nasm_realloc will
+ * do likewise, and will also guarantee to work right on being passed
+ * a NULL pointer; nasm_free will do nothing if it is passed a NULL
+ * pointer.
+ */
+void * safe_malloc(1) nasm_malloc(size_t);
+void * safe_malloc(1) nasm_zalloc(size_t);
+void * safe_malloc2(1,2) nasm_calloc(size_t, size_t);
+void * safe_realloc(2) nasm_realloc(void *, size_t);
+void nasm_free(void *);
+char * safe_alloc nasm_strdup(const char *);
+char * safe_alloc nasm_strndup(const char *, size_t);
+char * safe_alloc nasm_strcat(const char *one, const char *two);
+char * safe_alloc end_with_null nasm_strcatn(const char *one, ...);
+
+/*
+ * nasm_vasprintf() are variants of the semi-standard vasprintf()
+ * functions, except that we return the pointer instead of a count.
+ * The size of the string (including the final NUL!) is available
+ * by calling nasm_aprintf_size() afterwards.
+ *
+ * nasm_vaxprintf() are similar, but allocates a user-defined amount
+ * of storage before the string, and returns a pointer to the
+ * allocated buffer. The value of nasm_aprintf_size() does *not* include
+ * this additional storage.
+ */
+char * safe_alloc printf_func(1, 2) nasm_asprintf(const char *fmt, ...);
+char * safe_alloc vprintf_func(1) nasm_vasprintf(const char *fmt, va_list ap);
+void * safe_alloc printf_func(2, 3) nasm_axprintf(size_t extra, const char *fmt, ...);
+void * safe_alloc vprintf_func(2) nasm_vaxprintf(size_t extra, const char *fmt, va_list ap);
+
+/*
+ * nasm_last_string_len() returns the length of the last string allocated
+ * by vasprintf, nasm_strdup, nasm_strcat, or nasm_strcatn.
+ *
+ * nasm_last_string_size() returns the equivalent size including the
+ * final NUL.
+ */
+static inline size_t nasm_last_string_len(void)
+{
+    extern size_t _nasm_last_string_size;
+    return _nasm_last_string_size - 1;
+}
+static inline size_t nasm_last_string_size(void)
+{
+    extern size_t _nasm_last_string_size;
+    return _nasm_last_string_size;
+}
+
+/* Assert the argument is a pointer without evaluating it */
+#define nasm_assert_pointer(p) ((void)sizeof(*(p)))
+
+#define nasm_new(p) ((p) = nasm_zalloc(sizeof(*(p))))
+#define nasm_newn(p,n) ((p) = nasm_calloc((n), sizeof(*(p))))
+/*
+ * This is broken on platforms where there are pointers which don't
+ * match void * in their internal layout.  It unfortunately also
+ * loses any "const" part of the argument, although hopefully the
+ * compiler will warn in that case.
+ */
+#define nasm_delete(p)                          \
+    do {                                        \
+        void **_pp = (void **)&(p);             \
+        nasm_assert_pointer(p);                 \
+        nasm_free(*_pp);                        \
+        *_pp = NULL;                            \
+    } while (0)
+#define nasm_zero(x) (memset(&(x), 0, sizeof(x)))
+#define nasm_zeron(p,n) (memset((p), 0, (n)*sizeof(*(p))))
+
+/*
+ * Wrappers around fread()/fwrite() which fatal-errors on failure.
+ * For fread(), only use this if EOF is supposed to be a fatal error!
+ */
+void nasm_read(void *, size_t, FILE *);
+void nasm_write(const void *, size_t, FILE *);
+
+/*
+ * NASM failure at build time if the argument is false
+ */
+#ifdef static_assert
+# define nasm_static_assert(x) static_assert((x), #x)
+#elif defined(HAVE_FUNC_ATTRIBUTE_ERROR) && defined(__OPTIMIZE__)
+# define nasm_static_assert(x)                                              \
+    do {                                                                    \
+        if (!(x)) {                                                         \
+            extern void __attribute__((error("assertion " #x " failed")))   \
+                _nasm_static_fail(void);                                    \
+            _nasm_static_fail();                                            \
+        }                                                                   \
+    } while (0)
+#else
+/* See http://www.drdobbs.com/compile-time-assertions/184401873 */
+# define nasm_static_assert(x)                                              \
+    do { enum { _static_assert_failed = 1/(!!(x)) }; } while (0)
+#endif
+
+/*
+ * conditional static assert, if we know it is possible to determine
+ * the assert value at compile time. Since if_constant triggers
+ * pedantic warnings on gcc, turn them off explicitly around this code.
+ */
+#ifdef static_assert
+# define nasm_try_static_assert(x)                                          \
+    do {                                                                    \
+        not_pedantic_start                                                  \
+        static_assert(if_constant(x, true), #x);                            \
+        not_pedantic_end                                                    \
+    } while (0)
+#elif defined(HAVE_FUNC_ATTRIBUTE_ERROR) && defined(__OPTIMIZE__)
+# define nasm_try_static_assert(x)                                          \
+    do {                                                                    \
+        if (!if_constant(x, true)) {                                        \
+            extern void __attribute__((error("assertion " #x " failed")))   \
+                _nasm_static_fail(void);                                    \
+            _nasm_static_fail();                                            \
+        }                                                                   \
+    } while (0)
+#else
+# define nasm_try_static_assert(x) ((void)0)
+#endif
+
+/*
+ * NASM assert failure
+ */
+fatal_func nasm_assert_failed(const char *, int, const char *);
+#define nasm_assert(x)                                          \
+    do {                                                        \
+        nasm_try_static_assert(x);                              \
+        if (unlikely(!(x)))                                     \
+            nasm_assert_failed(__FILE__,__LINE__,#x);           \
+    } while (0)
+
+/* Utility function to generate a string for an invalid enum */
+const char *invalid_enum_str(int);
+
+/*
+ * ANSI doesn't guarantee the presence of `stricmp' or
+ * `strcasecmp'.
+ */
+#if defined(HAVE_STRCASECMP)
+#define nasm_stricmp strcasecmp
+#elif defined(HAVE_STRICMP)
+#define nasm_stricmp stricmp
+#else
+int pure_func nasm_stricmp(const char *, const char *);
+#endif
+
+#if defined(HAVE_STRNCASECMP)
+#define nasm_strnicmp strncasecmp
+#elif defined(HAVE_STRNICMP)
+#define nasm_strnicmp strnicmp
+#else
+int pure_func nasm_strnicmp(const char *, const char *, size_t);
+#endif
+
+int pure_func nasm_memicmp(const char *, const char *, size_t);
+
+#if defined(HAVE_STRSEP)
+#define nasm_strsep strsep
+#else
+char *nasm_strsep(char **stringp, const char *delim);
+#endif
+
+#ifndef HAVE_DECL_STRNLEN
+size_t pure_func strnlen(const char *, size_t);
+#endif
+
+/* This returns the numeric value of a given 'digit'; no check for validity */
+static inline unsigned int numvalue(unsigned char c)
+{
+    c |= 0x20;
+    return c >= 'a' ? c - 'a' + 10 : c - '0';
+}
+
+/*
+ * Convert a string into a number, using NASM number rules. Sets
+ * `*error' to true if an error occurs, and false otherwise.
+ */
+int64_t readnum(const char *str, bool *error);
+
+/*
+ * Get the numeric base corresponding to a character
+ */
+static inline unsigned int radix_letter(char c)
+{
+    switch (c) {
+    case 'b': case 'B':
+    case 'y': case 'Y':
+	return 2;		/* Binary */
+    case 'o': case 'O':
+    case 'q': case 'Q':
+	return 8;		/* Octal */
+    case 'h': case 'H':
+    case 'x': case 'X':
+	return 16;		/* Hexadecimal */
+    case 'd': case 'D':
+    case 't': case 'T':
+	return 10;		/* Decimal */
+    default:
+	return 0;		/* Not a known radix letter */
+    }
+}
+
+/*
+ * Convert a character constant into a number. Sets
+ * `*warn' to true if an overflow occurs, and false otherwise.
+ * str points to and length covers the middle of the string,
+ * without the quotes.
+ */
+int64_t readstrnum(char *str, int length, bool *warn);
+
+/*
+ * Produce an unsigned integer string from a number with a specified
+ * base, digits and signedness
+ */
+#define NUMSTR_MAXBASE 64
+int numstr(char *buf, size_t buflen, uint64_t n,
+           int digits, unsigned int base, bool ucase);
+
+/*
+ * seg_alloc: allocate a hitherto unused segment number.
+ */
+int32_t seg_alloc(void);
+
+/*
+ * Add/replace or remove an extension to the end of a filename
+ */
+const char *filename_set_extension(const char *inname, const char *extension);
+
+/*
+ * Utility macros...
+ *
+ * This is a useful #define which I keep meaning to use more often:
+ * the number of elements of a statically defined array.
+ */
+#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)0))
+
+/*
+ * List handling
+ *
+ *  list_for_each - regular iterator over list
+ *  list_for_each_safe - the same but safe against list items removal
+ *  list_last - find the last element in a list
+ *  list_reverse - reverse the order of a list
+ *
+ *  Arguments named with _ + single letter should be temp variables
+ *  of the appropriate pointer type.
+ */
+#define list_for_each(pos, head)                        \
+    for (pos = head; pos; pos = pos->next)
+#define list_for_each_safe(pos, _n, head)                \
+    for (pos = head, _n = (pos ? pos->next : NULL); pos; \
+        pos = _n, _n = (_n ? _n->next : NULL))
+#define list_last(pos, head)                            \
+    for (pos = head; pos && pos->next; pos = pos->next) \
+        ;
+#define list_reverse(head)                              \
+    do {                                                \
+        void *_p, *_n;                                  \
+        if (!head || !head->next)                       \
+            break;                                      \
+        _p = NULL;                                      \
+        while (head) {                                  \
+            _n = head->next;                            \
+            head->next = _p;                            \
+            _p = head;                                  \
+            head = _n;                                  \
+        }                                               \
+        head = _p;                                      \
+    } while (0)
+
+/*
+ * Power of 2 align helpers
+ */
+#undef ALIGN_MASK               /* Some BSD flavors define these in system headers */
+#undef ALIGN
+#define ALIGN_MASK(v, mask)     (((v) + (mask)) & ~(mask))
+#define ALIGN(v, a)             ALIGN_MASK(v, (a) - 1)
+#define IS_ALIGNED(v, a)        (((v) & ((a) - 1)) == 0)
+
+/*
+ * Routines to write littleendian data to a file
+ */
+#define fwriteint8_t(d,f) putc(d,f)
+void fwriteint16_t(uint16_t data, FILE * fp);
+void fwriteint32_t(uint32_t data, FILE * fp);
+void fwriteint64_t(uint64_t data, FILE * fp);
+void fwriteaddr(uint64_t data, int size, FILE * fp);
+
+/*
+ * Binary search routine. Returns index into `array' of an entry
+ * matching `string', or <0 if no match. `array' is taken to
+ * contain `size' elements.
+ *
+ * bsi() is case sensitive, bsii() is case insensitive.
+ */
+int bsi(const char *string, const char **array, int size);
+int bsii(const char *string, const char **array, int size);
+
+/*
+ * Convenient string processing helper routines
+ */
+char *nasm_skip_spaces(const char *p);
+char *nasm_skip_word(const char *p);
+char *nasm_zap_spaces_fwd(char *p);
+char *nasm_zap_spaces_rev(char *p);
+char *nasm_trim_spaces(char *p);
+char *nasm_get_word(char *p, char **tail);
+char *nasm_opt_val(char *p, char **opt, char **val);
+
+/*
+ * Converts a relative pathname rel_path into an absolute path name.
+ *
+ * The buffer returned must be freed by the caller
+ */
+char * safe_alloc nasm_realpath(const char *rel_path);
+
+/*
+ * Path-splitting and merging functions
+ */
+char * safe_alloc nasm_dirname(const char *path);
+char * safe_alloc nasm_basename(const char *path);
+char * safe_alloc nasm_catfile(const char *dir, const char *path);
+
+const char * pure_func prefix_name(int);
+
+/*
+ * Wrappers around fopen()... for future change to a dedicated structure
+ */
+enum file_flags {
+    NF_BINARY   = 0x00000000,   /* Binary file (default) */
+    NF_TEXT     = 0x00000001,   /* Text file */
+    NF_NONFATAL = 0x00000000,   /* Don't die on open failure (default) */
+    NF_FATAL    = 0x00000002,   /* Die on open failure */
+    NF_FORMAP   = 0x00000004,   /* Intended to use nasm_map_file() */
+    NF_IONBF    = 0x00000010,   /* Force unbuffered stdio */
+    NF_IOLBF    = 0x00000020,   /* Force line buffered stdio */
+    NF_IOFBF    = 0000000030    /* Force fully buffered stdio */
+};
+#define NF_BUF_MASK  0x30
+
+FILE *nasm_open_read(const char *filename, enum file_flags flags);
+FILE *nasm_open_write(const char *filename, enum file_flags flags);
+
+void nasm_set_binary_mode(FILE *f);
+
+/* Probe for existence of a file */
+bool nasm_file_exists(const char *filename);
+
+#define ZERO_BUF_SIZE 65536     /* Default value */
+#if defined(BUFSIZ) && (BUFSIZ > ZERO_BUF_SIZE)
+# undef ZERO_BUF_SIZE
+# define ZERO_BUF_SIZE BUFSIZ
+#endif
+extern const uint8_t zero_bufferZERO_BUF_SIZE;
+
+/* Missing fseeko/ftello */
+#ifndef HAVE_FSEEKO
+# undef off_t                   /* Just in case it is a macro */
+# ifdef HAVE__FSEEKI64
+#  define fseeko _fseeki64
+#  define ftello _ftelli64
+#  define off_t  int64_t
+# else
+#  define fseeko fseek
+#  define ftello ftell
+#  define off_t  long
+# endif
+#endif
+
+const void *nasm_map_file(FILE *fp, off_t start, off_t len);
+void nasm_unmap_file(const void *p, size_t len);
+off_t nasm_file_size(FILE *f);
+off_t nasm_file_size_by_path(const char *pathname);
+bool nasm_file_time(time_t *t, const char *pathname);
+void fwritezero(off_t bytes, FILE *fp);
+
+static inline bool const_func overflow_general(int64_t value, int bytes)
+{
+    int sbit;
+    int64_t vmax, vmin;
+
+    if (bytes >= 8)
+        return false;
+
+    sbit = (bytes << 3) - 1;
+    vmax =  ((int64_t)2 << sbit) - 1;
+    vmin = -((int64_t)2 << sbit);
+
+    return value < vmin || value > vmax;
+}
+
+static inline bool const_func overflow_signed(int64_t value, int bytes)
+{
+    int sbit;
+    int64_t vmax, vmin;
+
+    if (bytes >= 8)
+        return false;
+
+    sbit = (bytes << 3) - 1;
+    vmax =  ((int64_t)1 << sbit) - 1;
+    vmin = -((int64_t)1 << sbit);
+
+    return value < vmin || value > vmax;
+}
+
+static inline bool const_func overflow_unsigned(int64_t value, int bytes)
+{
+    int sbit;
+    int64_t vmax, vmin;
+
+    if (bytes >= 8)
+        return false;
+
+    sbit = (bytes << 3) - 1;
+    vmax = ((int64_t)2 << sbit) - 1;
+    vmin = 0;
+
+    return value < vmin || value > vmax;
+}
+
+static inline int64_t const_func signed_bits(int64_t value, int bits)
+{
+    if (bits < 64) {
+        value &= ((int64_t)1 << bits) - 1;
+        if (value & (int64_t)1 << (bits - 1))
+            value |= (int64_t)((uint64_t)-1 << bits);
+    }
+    return value;
+}
+
+/* check if value is power of 2 */
+#define is_power2(v)   ((v) && ((v) & ((v) - 1)) == 0)
+
+/* try to get the system stack size */
+extern size_t nasm_get_stack_size_limit(void);
+
+#endif

_service:tar_scm:nasm-2.16.03.tar.xz/include/nctype.h Added

@@ -0,0 +1,127 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2018 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * ctype-like functions specific to NASM
+ */
+#ifndef NASM_NCTYPE_H
+#define NASM_NCTYPE_H
+
+#include "compiler.h"
+
+void nasm_ctype_init(void);
+
+extern unsigned char nasm_tolower_tab256;
+static inline char nasm_tolower(char x)
+{
+    return nasm_tolower_tab(unsigned char)x;
+}
+
+/*
+ * NASM ctype table
+ */
+enum nasm_ctype {
+    NCT_CTRL       = 0x0001,
+    NCT_SPACE      = 0x0002,
+    NCT_ASCII      = 0x0004,
+    NCT_LOWER      = 0x0008,    /* isalpha(x) && tolower(x) == x */
+    NCT_UPPER      = 0x0010,    /* isalpha(x) && tolower(x) != x */
+    NCT_DIGIT      = 0x0020,
+    NCT_HEX        = 0x0040,
+    NCT_ID         = 0x0080,
+    NCT_IDSTART    = 0x0100,
+    NCT_MINUS      = 0x0200,    /* - */
+    NCT_DOLLAR     = 0x0400,    /* $ */
+    NCT_UNDER      = 0x0800,    /* _ */
+    NCT_QUOTE      = 0x1000     /* " ' ` */
+};
+
+extern uint16_t nasm_ctype_tab256;
+static inline bool nasm_ctype(unsigned char x, enum nasm_ctype mask)
+{
+    return (nasm_ctype_tabx & mask) != 0;
+}
+
+static inline bool nasm_isspace(char x)
+{
+    return nasm_ctype(x, NCT_SPACE);
+}
+
+static inline bool nasm_isalpha(char x)
+{
+    return nasm_ctype(x, NCT_LOWER|NCT_UPPER);
+}
+
+static inline bool nasm_isdigit(char x)
+{
+    return nasm_ctype(x, NCT_DIGIT);
+}
+static inline bool nasm_isalnum(char x)
+{
+    return nasm_ctype(x, NCT_LOWER|NCT_UPPER|NCT_DIGIT);
+}
+static inline bool nasm_isxdigit(char x)
+{
+    return nasm_ctype(x, NCT_HEX);
+}
+static inline bool nasm_isidstart(char x)
+{
+    return nasm_ctype(x, NCT_IDSTART);
+}
+static inline bool nasm_isidchar(char x)
+{
+    return nasm_ctype(x, NCT_ID);
+}
+static inline bool nasm_isbrcchar(char x)
+{
+    return nasm_ctype(x, NCT_ID|NCT_MINUS);
+}
+static inline bool nasm_isnumstart(char x)
+{
+    return nasm_ctype(x, NCT_DIGIT|NCT_DOLLAR);
+}
+static inline bool nasm_isnumchar(char x)
+{
+    return nasm_ctype(x, NCT_DIGIT|NCT_LOWER|NCT_UPPER|NCT_UNDER);
+}
+static inline bool nasm_isquote(char x)
+{
+    return nasm_ctype(x, NCT_QUOTE);
+}
+
+static inline void nasm_ctype_tasm_mode(void)
+{
+    /* No differences at the present moment */
+}
+
+#endif /* NASM_NCTYPE_H */

_service:tar_scm:nasm-2.16.03.tar.xz/include/opflags.h Added

@@ -0,0 +1,301 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2018 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * opflags.h - operand flags
+ */
+
+#ifndef NASM_OPFLAGS_H
+#define NASM_OPFLAGS_H
+
+#include "compiler.h"
+#include "tables.h"     /* for opflags_t and nasm_reg_flags */
+#include "regs.h"
+
+/*
+ * Here we define the operand types. These are implemented as bit
+ * masks, since some are subsets of others; e.g. AX in a MOV
+ * instruction is a special operand type, whereas AX in other
+ * contexts is just another 16-bit register. (Also, consider CL in
+ * shift instructions, DX in OUT, etc.)
+ *
+ * The basic concept here is that
+ *    (class & ~operand) == 0
+ *
+ * if and only if "operand" belongs to class type "class".
+ */
+
+#define OP_GENMASK(bits, shift)         (((UINT64_C(1) << (bits)) - 1) << (shift))
+#define OP_GENBIT(bit, shift)           (UINT64_C(1) << ((shift) + (bit)))
+
+/*
+ * Type of operand: memory reference, register, etc.
+ *
+ * Bits: 0 - 3
+ */
+#define OPTYPE_SHIFT            (0)
+#define OPTYPE_BITS             (4)
+#define OPTYPE_MASK             OP_GENMASK(OPTYPE_BITS, OPTYPE_SHIFT)
+#define GEN_OPTYPE(bit)         OP_GENBIT(bit, OPTYPE_SHIFT)
+
+/*
+ * Modifiers.
+ *
+ * Bits: 4 - 6
+ */
+#define MODIFIER_SHIFT          (4)
+#define MODIFIER_BITS           (3)
+#define MODIFIER_MASK           OP_GENMASK(MODIFIER_BITS, MODIFIER_SHIFT)
+#define GEN_MODIFIER(bit)       OP_GENBIT(bit, MODIFIER_SHIFT)
+
+/*
+ * Register classes.
+ *
+ * Bits: 7 - 17
+ */
+#define REG_CLASS_SHIFT         (7)
+#define REG_CLASS_BITS          (11)
+#define REG_CLASS_MASK          OP_GENMASK(REG_CLASS_BITS, REG_CLASS_SHIFT)
+#define GEN_REG_CLASS(bit)      OP_GENBIT(bit, REG_CLASS_SHIFT)
+
+/*
+ * Subclasses. Depends on type of operand.
+ *
+ * Bits: 18 - 25
+ */
+#define SUBCLASS_SHIFT          (18)
+#define SUBCLASS_BITS           (8)
+#define SUBCLASS_MASK           OP_GENMASK(SUBCLASS_BITS, SUBCLASS_SHIFT)
+#define GEN_SUBCLASS(bit)       OP_GENBIT(bit, SUBCLASS_SHIFT)
+
+/*
+ * Special flags. Context dependent.
+ *
+ * Bits: 26 - 32
+ */
+#define SPECIAL_SHIFT           (26)
+#define SPECIAL_BITS            (7)
+#define SPECIAL_MASK            OP_GENMASK(SPECIAL_BITS, SPECIAL_SHIFT)
+#define GEN_SPECIAL(bit)        OP_GENBIT(bit, SPECIAL_SHIFT)
+
+/*
+ * Sizes of the operands and attributes.
+ *
+ * Bits: 33 - 43
+ */
+#define SIZE_SHIFT              (33)
+#define SIZE_BITS               (11)
+#define SIZE_MASK               OP_GENMASK(SIZE_BITS, SIZE_SHIFT)
+#define GEN_SIZE(bit)           OP_GENBIT(bit, SIZE_SHIFT)
+
+/*
+ * Register set count
+ *
+ * Bits: 44 - 48
+ */
+#define REGSET_SHIFT            (44)
+#define REGSET_BITS             (5)
+#define REGSET_MASK             OP_GENMASK(REGSET_BITS, REGSET_SHIFT)
+#define GEN_REGSET(bit)         OP_GENBIT(bit, REGSET_SHIFT)
+
+/*
+ * Bits distribution (counted from 0)
+ *
+ *    6         5         4         3         2         1
+ * 3210987654321098765432109876543210987654321098765432109876543210
+ *                                 |
+ *                                 | dword bound
+ *
+ * ............................................................1111 optypes
+ * .........................................................111.... modifiers
+ * ..............................................11111111111....... register classes
+ * ......................................11111111.................. subclasses
+ * ...............................1111111.......................... specials
+ * ....................11111111111................................. sizes
+ * ...............11111............................................ regset count
+ */
+
+#define REGISTER                GEN_OPTYPE(0)                   /* register number in 'basereg' */
+#define IMMEDIATE               GEN_OPTYPE(1)
+#define REGMEM                  GEN_OPTYPE(2)                   /* for r/m, ie EA, operands */
+#define MEMORY                  (GEN_OPTYPE(3) | REGMEM)
+
+#define BITS8                   GEN_SIZE(0)                     /*   8 bits (BYTE) */
+#define BITS16                  GEN_SIZE(1)                     /*  16 bits (WORD) */
+#define BITS32                  GEN_SIZE(2)                     /*  32 bits (DWORD) */
+#define BITS64                  GEN_SIZE(3)                     /*  64 bits (QWORD), x64 and FPU only */
+#define BITS80                  GEN_SIZE(4)                     /*  80 bits (TWORD), FPU only */
+#define BITS128                 GEN_SIZE(5)                     /* 128 bits (OWORD) */
+#define BITS256                 GEN_SIZE(6)                     /* 256 bits (YWORD) */
+#define BITS512                 GEN_SIZE(7)                     /* 512 bits (ZWORD) */
+#define FAR                     GEN_SIZE(8)                     /* grotty: this means 16:16 or 16:32, like in CALL/JMP */
+#define NEAR                    GEN_SIZE(9)
+#define SHORT                   GEN_SIZE(10)                    /* and this means what it says :) */
+
+#define TO                      GEN_MODIFIER(0)                 /* reverse effect in FADD, FSUB &c */
+#define COLON                   GEN_MODIFIER(1)                 /* operand is followed by a colon */
+#define STRICT                  GEN_MODIFIER(2)                 /* do not optimize this operand */
+
+#define REG_CLASS_CDT           GEN_REG_CLASS(0)
+#define REG_CLASS_GPR           GEN_REG_CLASS(1)
+#define REG_CLASS_SREG          GEN_REG_CLASS(2)
+#define REG_CLASS_FPUREG        GEN_REG_CLASS(3)
+#define REG_CLASS_RM_MMX        GEN_REG_CLASS(4)
+#define REG_CLASS_RM_XMM        GEN_REG_CLASS(5)
+#define REG_CLASS_RM_YMM        GEN_REG_CLASS(6)
+#define REG_CLASS_RM_ZMM        GEN_REG_CLASS(7)
+#define REG_CLASS_OPMASK        GEN_REG_CLASS(8)
+#define REG_CLASS_BND           GEN_REG_CLASS(9)
+#define REG_CLASS_RM_TMM	GEN_REG_CLASS(10)
+
+static inline bool is_class(opflags_t class, opflags_t op)
+{
+	return !(class & ~op);
+}
+
+static inline bool is_reg_class(opflags_t class, opflags_t reg)
+{
+	if (reg >= EXPR_REG_START && reg <= EXPR_REG_END)
+		return is_class(class, nasm_reg_flagsreg);
+	return false;
+}
+
+#define IS_SREG(reg)                is_reg_class(REG_SREG, (reg))
+#define IS_FSGS(reg)                is_reg_class(REG_FSGS, (reg))
+
+/* Register classes */
+#define REG_EA                  (                                               REGMEM | REGISTER)      /* 'normal' reg, qualifies as EA */
+#define RM_GPR                  (                  REG_CLASS_GPR              | REGMEM)                 /* integer operand */
+#define REG_GPR                 (                  REG_CLASS_GPR              | REGMEM | REGISTER)      /* integer register */
+#define REG8                    (                  REG_CLASS_GPR    | BITS8   | REGMEM | REGISTER)      /*  8-bit GPR  */
+#define REG16                   (                  REG_CLASS_GPR    | BITS16  | REGMEM | REGISTER)      /* 16-bit GPR */
+#define REG32                   (                  REG_CLASS_GPR    | BITS32  | REGMEM | REGISTER)      /* 32-bit GPR */
+#define REG64                   (                  REG_CLASS_GPR    | BITS64  | REGMEM | REGISTER)      /* 64-bit GPR */
+#define FPUREG                  (                  REG_CLASS_FPUREG                    | REGISTER)      /* floating point stack registers */
+#define FPU0                    (GEN_SUBCLASS(1) | REG_CLASS_FPUREG                    | REGISTER)      /* FPU stack register zero */
+#define RM_MMX                  (                  REG_CLASS_RM_MMX           | REGMEM)                 /* MMX operand */
+#define MMXREG                  (                  REG_CLASS_RM_MMX           | REGMEM | REGISTER)      /* MMX register */
+#define RM_XMM                  (                  REG_CLASS_RM_XMM           | REGMEM)                 /* XMM (SSE) operand */
+#define XMMREG                  (                  REG_CLASS_RM_XMM           | REGMEM | REGISTER)      /* XMM (SSE) register */
+#define RM_YMM                  (                  REG_CLASS_RM_YMM           | REGMEM)                 /* YMM (AVX) operand */
+#define YMMREG                  (                  REG_CLASS_RM_YMM           | REGMEM | REGISTER)      /* YMM (AVX) register */
+#define RM_ZMM                  (                  REG_CLASS_RM_ZMM           | REGMEM)                 /* ZMM (AVX512) operand */
+#define ZMMREG                  (                  REG_CLASS_RM_ZMM           | REGMEM | REGISTER)      /* ZMM (AVX512) register */
+#define RM_OPMASK               (                  REG_CLASS_OPMASK           | REGMEM)                 /* Opmask operand */
+#define OPMASKREG               (                  REG_CLASS_OPMASK           | REGMEM | REGISTER)      /* Opmask register */
+#define OPMASK0                 (GEN_SUBCLASS(1) | REG_CLASS_OPMASK           | REGMEM | REGISTER)      /* Opmask register zero (k0) */
+#define RM_K                    RM_OPMASK
+#define KREG                    OPMASKREG
+#define RM_BND                  (                  REG_CLASS_BND              | REGMEM)                 /* Bounds operand */
+#define BNDREG                  (                  REG_CLASS_BND              | REGMEM | REGISTER)      /* Bounds register */
+#define TMMREG                  (                  REG_CLASS_RM_TMM           | REGMEM | REGISTER)      /* TMM (AMX) register */
+#define REG_CDT                 (                  REG_CLASS_CDT    | BITS32           | REGISTER)      /* CRn, DRn and TRn */
+#define REG_CREG                (GEN_SUBCLASS(1) | REG_CLASS_CDT    | BITS32           | REGISTER)      /* CRn */
+#define REG_DREG                (GEN_SUBCLASS(2) | REG_CLASS_CDT    | BITS32           | REGISTER)      /* DRn */
+#define REG_TREG                (GEN_SUBCLASS(3) | REG_CLASS_CDT    | BITS32           | REGISTER)      /* TRn */
+#define REG_SREG                (                  REG_CLASS_SREG   | BITS16           | REGISTER)      /* any segment register */
+
+/* Segment registers */
+#define REG_ES                  (GEN_SUBCLASS(0) | GEN_SUBCLASS(2) | REG_CLASS_SREG | BITS16 | REGISTER)      /* ES */
+#define REG_CS                  (GEN_SUBCLASS(1) | GEN_SUBCLASS(2) | REG_CLASS_SREG | BITS16 | REGISTER)      /* CS */
+#define REG_SS                  (GEN_SUBCLASS(0) | GEN_SUBCLASS(3) | REG_CLASS_SREG | BITS16 | REGISTER)      /* SS */
+#define REG_DS                  (GEN_SUBCLASS(1) | GEN_SUBCLASS(3) | REG_CLASS_SREG | BITS16 | REGISTER)      /* DS */
+#define REG_FS                  (GEN_SUBCLASS(0) | GEN_SUBCLASS(4) | REG_CLASS_SREG | BITS16 | REGISTER)      /* FS */
+#define REG_GS                  (GEN_SUBCLASS(1) | GEN_SUBCLASS(4) | REG_CLASS_SREG | BITS16 | REGISTER)      /* GS */
+#define REG_FSGS                (                  GEN_SUBCLASS(4) | REG_CLASS_SREG | BITS16 | REGISTER)      /* FS or GS */
+#define REG_SEG67               (                  GEN_SUBCLASS(5) | REG_CLASS_SREG | BITS16 | REGISTER)      /* Unimplemented segment registers */
+
+/* Special GPRs */
+#define REG_SMASK               SUBCLASS_MASK                                                                           /* a mask for the following */
+#define REG_ACCUM               (GEN_SUBCLASS(1)                   | REG_CLASS_GPR           | REGMEM | REGISTER)       /* accumulator: AL, AX, EAX, RAX */
+#define REG_AL                  (GEN_SUBCLASS(1)                   | REG_CLASS_GPR | BITS8   | REGMEM | REGISTER)
+#define REG_AX                  (GEN_SUBCLASS(1)                   | REG_CLASS_GPR | BITS16  | REGMEM | REGISTER)
+#define REG_EAX                 (GEN_SUBCLASS(1)                   | REG_CLASS_GPR | BITS32  | REGMEM | REGISTER)
+#define REG_RAX                 (GEN_SUBCLASS(1)                   | REG_CLASS_GPR | BITS64  | REGMEM | REGISTER)
+#define REG_COUNT               (GEN_SUBCLASS(5) | GEN_SUBCLASS(2) | REG_CLASS_GPR           | REGMEM | REGISTER)       /* counter: CL, CX, ECX, RCX */
+#define REG_CL                  (GEN_SUBCLASS(5) | GEN_SUBCLASS(2) | REG_CLASS_GPR | BITS8   | REGMEM | REGISTER)
+#define REG_CX                  (GEN_SUBCLASS(5) | GEN_SUBCLASS(2) | REG_CLASS_GPR | BITS16  | REGMEM | REGISTER)
+#define REG_ECX                 (GEN_SUBCLASS(5) | GEN_SUBCLASS(2) | REG_CLASS_GPR | BITS32  | REGMEM | REGISTER)
+#define REG_RCX                 (GEN_SUBCLASS(5) | GEN_SUBCLASS(2) | REG_CLASS_GPR | BITS64  | REGMEM | REGISTER)
+#define REG_DL                  (GEN_SUBCLASS(5) | GEN_SUBCLASS(3) | REG_CLASS_GPR | BITS8   | REGMEM | REGISTER)       /* data: DL, DX, EDX, RDX */
+#define REG_DX                  (GEN_SUBCLASS(5) | GEN_SUBCLASS(3) | REG_CLASS_GPR | BITS16  | REGMEM | REGISTER)
+#define REG_EDX                 (GEN_SUBCLASS(5) | GEN_SUBCLASS(3) | REG_CLASS_GPR | BITS32  | REGMEM | REGISTER)
+#define REG_RDX                 (GEN_SUBCLASS(5) | GEN_SUBCLASS(3) | REG_CLASS_GPR | BITS64  | REGMEM | REGISTER)
+#define REG_HIGH                (GEN_SUBCLASS(5) | GEN_SUBCLASS(4) | REG_CLASS_GPR | BITS8   | REGMEM | REGISTER)       /* high regs: AH, CH, DH, BH */
+#define REG_NOTACC              GEN_SUBCLASS(5)                                                                         /* non-accumulator register */
+#define REG8NA                  (GEN_SUBCLASS(5)                   | REG_CLASS_GPR | BITS8   | REGMEM | REGISTER)       /*  8-bit non-acc GPR  */
+#define REG16NA                 (GEN_SUBCLASS(5)                   | REG_CLASS_GPR | BITS16  | REGMEM | REGISTER)       /* 16-bit non-acc GPR */
+#define REG32NA                 (GEN_SUBCLASS(5)                   | REG_CLASS_GPR | BITS32  | REGMEM | REGISTER)       /* 32-bit non-acc GPR */
+#define REG64NA                 (GEN_SUBCLASS(5)                   | REG_CLASS_GPR | BITS64  | REGMEM | REGISTER)       /* 64-bit non-acc GPR */
+
+/* special types of EAs */
+#define MEM_OFFS                (GEN_SUBCLASS(1) | MEMORY)      /* simple address offset - absolute! */
+#define IP_REL                  (GEN_SUBCLASS(2) | MEMORY)      /* IP-relative offset */
+#define XMEM                    (GEN_SUBCLASS(3) | MEMORY)      /* 128-bit vector SIB */
+#define YMEM                    (GEN_SUBCLASS(4) | MEMORY)      /* 256-bit vector SIB */
+#define ZMEM                    (GEN_SUBCLASS(5) | MEMORY)      /* 512-bit vector SIB */
+
+/* memory which matches any type of r/m operand */
+#define MEMORY_ANY              (MEMORY | RM_GPR | RM_MMX | RM_XMM_L16 | RM_YMM_L16 | RM_ZMM_L16 | RM_OPMASK | RM_BND)
+
+/* special immediate values */
+#define UNITY                   (GEN_SUBCLASS(0) | IMMEDIATE)   /* operand equals 1 */
+#define SBYTEWORD               (GEN_SUBCLASS(1) | IMMEDIATE)   /* operand is in the range -128..127 mod 2^16 */
+#define SBYTEDWORD              (GEN_SUBCLASS(2) | IMMEDIATE)   /* operand is in the range -128..127 mod 2^32 */
+#define SDWORD                  (GEN_SUBCLASS(3) | IMMEDIATE)   /* operand is in the range -0x80000000..0x7FFFFFFF */
+#define UDWORD                  (GEN_SUBCLASS(4) | IMMEDIATE)   /* operand is in the range 0..0xFFFFFFFF */
+
+/*
+ * Subset of vector registers: register 0 only and registers 0-15.
+ * Avoid conflicts in subclass bitfield with any of special EA types!
+ */
+#define RM_XMM_L16              (GEN_SUBCLASS(6) | RM_XMM)                                              /* XMM r/m operand  0 ~ 15 */
+#define XMM0                    (GEN_SUBCLASS(1) | GEN_SUBCLASS(6) | XMMREG)                            /* XMM register   zero  */
+#define XMM_L16                 (                  GEN_SUBCLASS(6) | XMMREG)                            /* XMM register  0 ~ 15 */
+
+#define RM_YMM_L16              (GEN_SUBCLASS(6) | RM_YMM)                                              /* YMM r/m operand  0 ~ 15 */
+#define YMM0                    (GEN_SUBCLASS(1) | GEN_SUBCLASS(6) | YMMREG)                            /* YMM register   zero  */
+#define YMM_L16                 (                  GEN_SUBCLASS(6) | YMMREG)                            /* YMM register  0 ~ 15 */
+
+#define RM_ZMM_L16              (GEN_SUBCLASS(6) | RM_ZMM)                                              /* ZMM r/m operand  0 ~ 15 */
+#define ZMM0                    (GEN_SUBCLASS(1) | GEN_SUBCLASS(6) | ZMMREG)                            /* ZMM register   zero  */
+#define ZMM_L16                 (                  GEN_SUBCLASS(6) | ZMMREG)                            /* ZMM register  0 ~ 15 */
+
+/* Register set sizes */
+#define RS2                     GEN_REGSET(0)
+#define RS4                     GEN_REGSET(1)
+#define RS8                     GEN_REGSET(2)
+#define RS16                    GEN_REGSET(3)
+#define RS32                    GEN_REGSET(4)
+
+#endif /* NASM_OPFLAGS_H */

_service:tar_scm:nasm-2.16.03.tar.xz/include/perfhash.h Added

@@ -0,0 +1,52 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 2017 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#ifndef PERFHASH_H
+#define PERFHASH_H 1
+
+#include "compiler.h"
+#include "nasmlib.h"            /* For invalid_enum_str() */
+
+struct perfect_hash {
+    uint64_t crcinit;
+    uint32_t hashmask;
+    uint32_t tbllen;
+    int tbloffs;
+    int errval;
+    const int16_t *hashvals;
+    const char * const *strings;
+};
+
+int perfhash_find(const struct perfect_hash *, const char *);
+
+#endif /* PERFHASH_H */

_service:tar_scm:nasm-2.16.03.tar.xz/include/raa.h Added

@@ -0,0 +1,49 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2009 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#ifndef NASM_RAA_H
+#define NASM_RAA_H 1
+
+#include "compiler.h"
+
+struct RAA;
+typedef uint64_t raaindex;
+
+#define raa_init() NULL
+void raa_free(struct RAA *);
+int64_t raa_read(struct RAA *, raaindex);
+void *raa_read_ptr(struct RAA *, raaindex);
+struct RAA * never_null raa_write(struct RAA *r, raaindex posn, int64_t value);
+struct RAA * never_null raa_write_ptr(struct RAA *r, raaindex posn, void *value);
+
+#endif                          /* NASM_RAA_H */

_service:tar_scm:nasm-2.16.03.tar.xz/include/rbtree.h Added

@@ -0,0 +1,108 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2020 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#ifndef NASM_RBTREE_H
+#define NASM_RBTREE_H
+
+#include "compiler.h"
+
+/*
+ * This structure should be embedded in a larger data structure;
+ * the final output from rb_search() can then be converted back
+ * to the larger data structure via container_of().
+ *
+ * An empty tree is simply represented by a NULL pointer.
+ */
+
+/* Note: the values of these flags is significant */
+enum rbtree_node_flags {
+    RBTREE_NODE_BLACK	= 1,  /* Node color is black */
+    RBTREE_NODE_PRED    = 2,  /* Left pointer is an uplink */
+    RBTREE_NODE_SUCC    = 4   /* Right pointer is an uplink */
+};
+
+struct rbtree {
+    uint64_t key;
+    struct rbtree_metadata {
+        struct rbtree *left, *right;
+        enum rbtree_node_flags flags;
+    } m;
+};
+
+/*
+ * Add a node to a tree. Returns the new root pointer.
+ * The key value in the structure needs to be preinitialized;
+ * the rest of the structure should be zero.
+ */
+struct rbtree *rb_insert(struct rbtree *, struct rbtree *);
+
+/*
+ * Find a node in the tree corresponding to the key immediately
+ * <= the passed-in key value.
+ */
+struct rbtree *rb_search(const struct rbtree *, uint64_t);
+
+/*
+ * Find a node in the tree exactly matching the key value.
+ */
+struct rbtree *rb_search_exact(const struct rbtree *, uint64_t);
+
+/*
+ * Return the immediately previous or next node in key order.
+ * Returns NULL if this node is the end of the tree.
+ * These operations are safe for complee (but not partial!)
+ * tree walk-with-destruction in key order.
+ */
+struct rbtree *rb_prev(const struct rbtree *);
+struct rbtree *rb_next(const struct rbtree *);
+
+/*
+ * Return the very first or very last node in key order.
+ */
+struct rbtree *rb_first(const struct rbtree *);
+struct rbtree *rb_last(const struct rbtree *);
+
+/*
+ * Left and right nodes, if real. These operations are
+ * safe for tree destruction, but not for splitting a tree.
+ */
+static inline struct rbtree *rb_left(const struct rbtree *rb)
+{
+    return (rb->m.flags & RBTREE_NODE_PRED) ? NULL : rb->m.left;
+}
+static inline struct rbtree *rb_right(const struct rbtree *rb)
+{
+    return (rb->m.flags & RBTREE_NODE_SUCC) ? NULL : rb->m.right;
+}
+
+#endif /* NASM_RBTREE_H */

_service:tar_scm:nasm-2.16.03.tar.xz/include/rdoff.h Added

@@ -0,0 +1,169 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2017 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * rdoff.h	RDOFF Object File manipulation routines header file
+ */
+
+#ifndef RDOFF_H
+#define RDOFF_H 1
+
+/*
+ * RDOFF definitions. They are used by RDOFF utilities and by NASM's
+ * 'outrdf2.c' output module.
+ */
+
+/* RDOFF format revision (currently used only when printing the version) */
+#define RDOFF2_REVISION		"0.6.1"
+
+/* RDOFF2 file signature */
+#define RDOFF2_SIGNATURE	"RDOFF2"
+
+/* Maximum size of an import/export label (including trailing zero) */
+#define EXIM_LABEL_MAX		256
+
+/* Maximum size of library or module name (including trailing zero) */
+#define MODLIB_NAME_MAX		128
+
+/* Maximum number of segments that we can handle in one file */
+#define RDF_MAXSEGS		64
+
+/* Record types that may present the RDOFF header */
+#define RDFREC_GENERIC		0
+#define RDFREC_RELOC		1
+#define RDFREC_IMPORT		2
+#define RDFREC_GLOBAL		3
+#define RDFREC_DLL		4
+#define RDFREC_BSS		5
+#define RDFREC_SEGRELOC		6
+#define RDFREC_FARIMPORT	7
+#define RDFREC_MODNAME		8
+#define RDFREC_COMMON		10
+
+/*
+ * Generic record - contains the type and length field, plus a 128 byte
+ * array 'data'
+ */
+struct GenericRec {
+    uint8_t type;
+    uint8_t reclen;
+    char data128;
+};
+
+/*
+ * Relocation record
+ */
+struct RelocRec {
+    uint8_t type;                  /* must be 1 */
+    uint8_t reclen;                /* content length */
+    uint8_t segment;               /* only 0 for code, or 1 for data supported,
+                                   but add 64 for relative refs (ie do not require
+                                   reloc @ loadtime, only linkage) */
+    int32_t offset;                /* from start of segment in which reference is loc'd */
+    uint8_t length;                /* 1 2 or 4 bytes */
+    uint16_t refseg;              /* segment to which reference refers to */
+};
+
+/*
+ * Extern/import record
+ */
+struct ImportRec {
+    uint8_t type;                  /* must be 2 */
+    uint8_t reclen;                /* content length */
+    uint8_t flags;                 /* SYM_* flags (see below) */
+    uint16_t segment;             /* segment number allocated to the label for reloc
+                                   records - label is assumed to be at offset zero
+                                   in this segment, so linker must fix up with offset
+                                   of segment and of offset within segment */
+    char labelEXIM_LABEL_MAX; /* zero terminated, should be written to file
+                                   until the zero, but not after it */
+};
+
+/*
+ * Public/export record
+ */
+struct ExportRec {
+    uint8_t type;                  /* must be 3 */
+    uint8_t reclen;                /* content length */
+    uint8_t flags;                 /* SYM_* flags (see below) */
+    uint8_t segment;               /* segment referred to (0/1/2) */
+    int32_t offset;                /* offset within segment */
+    char labelEXIM_LABEL_MAX; /* zero terminated as in import */
+};
+
+/*
+ * DLL record
+ */
+struct DLLRec {
+    uint8_t type;                  /* must be 4 */
+    uint8_t reclen;                /* content length */
+    char libnameMODLIB_NAME_MAX;      /* name of library to link with at load time */
+};
+
+/*
+ * BSS record
+ */
+struct BSSRec {
+    uint8_t type;                  /* must be 5 */
+    uint8_t reclen;                /* content length */
+    int32_t amount;                /* number of bytes BSS to reserve */
+};
+
+/*
+ * Module name record
+ */
+struct ModRec {
+    uint8_t type;                  /* must be 8 */
+    uint8_t reclen;                /* content length */
+    char modnameMODLIB_NAME_MAX;      /* module name */
+};
+
+/*
+ * Common variable record
+ */
+struct CommonRec {
+    uint8_t type;                  /* must be 10 */
+    uint8_t reclen;                /* equals 7+label length */
+    uint16_t segment;             /* segment number */
+    int32_t size;                  /* size of common variable */
+    uint16_t align;               /* alignment (power of two) */
+    char labelEXIM_LABEL_MAX; /* zero terminated as in import */
+};
+
+/* Flags for ExportRec */
+#define SYM_DATA	1
+#define SYM_FUNCTION	2
+#define SYM_GLOBAL	4
+#define SYM_IMPORT	8
+
+#endif                          /* RDOFF_H */

_service:tar_scm:nasm-2.16.03.tar.xz/include/saa.h Added

@@ -0,0 +1,94 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2017 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#ifndef NASM_SAA_H
+#define NASM_SAA_H
+
+#include "compiler.h"
+
+/*
+ * Routines to manage a dynamic sequential-access array, under the
+ * same restriction on maximum mallocable block. This array may be
+ * written to in two ways: a contiguous chunk can be reserved of a
+ * given size with a pointer returned OR single-byte data may be
+ * written. The array can also be read back in the same two ways:
+ * as a series of big byte-data blocks or as a list of structures
+ * of a given size.
+ */
+
+struct SAA {
+    /*
+     * members `end' and `elem_len' are only valid in first link in
+     * list; `rptr' and `rpos' are used for reading
+     */
+    size_t elem_len;            /* Size of each element */
+    size_t blk_len;             /* Size of each allocation block */
+    size_t nblks;               /* Total number of allocated blocks */
+    size_t nblkptrs;            /* Total number of allocation block pointers */
+    size_t length;              /* Total allocated length of the array */
+    size_t datalen;             /* Total data length of the array */
+    char **wblk;                /* Write block pointer */
+    size_t wpos;                /* Write position inside block */
+    size_t wptr;                /* Absolute write position */
+    char **rblk;                /* Read block pointer */
+    size_t rpos;                /* Read position inside block */
+    size_t rptr;                /* Absolute read position */
+    char **blk_ptrs;            /* Pointer to pointer blocks */
+};
+
+struct SAA * never_null saa_init(size_t elem_len);  /* 1 == byte */
+void saa_free(struct SAA *);
+void *saa_wstruct(struct SAA *);        /* return a structure of elem_len */
+void saa_wbytes(struct SAA *, const void *, size_t);    /* write arbitrary bytes */
+size_t saa_wcstring(struct SAA *s, const char *str);     /* write a C string */
+void saa_rewind(struct SAA *);  /* for reading from beginning */
+void *saa_rstruct(struct SAA *);        /* return NULL on EOA */
+const void *saa_rbytes(struct SAA *, size_t *); /* return 0 on EOA */
+void saa_rnbytes(struct SAA *, void *, size_t); /* read a given no. of bytes */
+/* random access */
+void saa_fread(struct SAA *, size_t, void *, size_t);
+void saa_fwrite(struct SAA *, size_t, const void *, size_t);
+
+/* dump to file */
+void saa_fpwrite(struct SAA *, FILE *);
+
+/* Write specific-sized values */
+void saa_write8(struct SAA *s, uint8_t v);
+void saa_write16(struct SAA *s, uint16_t v);
+void saa_write32(struct SAA *s, uint32_t v);
+void saa_write64(struct SAA *s, uint64_t v);
+void saa_wleb128u(struct SAA *, int);   /* write unsigned LEB128 value */
+void saa_wleb128s(struct SAA *, int);   /* write signed LEB128 value */
+void saa_writeaddr(struct SAA *, uint64_t, size_t);
+
+#endif                          /* NASM_SAA_H */

_service:tar_scm:nasm-2.16.03.tar.xz/include/strlist.h Added

@@ -0,0 +1,93 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2020 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * strlist.h - list of unique, ordered strings
+ */
+
+#ifndef NASM_STRLIST_H
+#define NASM_STRLIST_H
+
+#include "compiler.h"
+#include "nasmlib.h"
+#include "hashtbl.h"
+
+struct strlist_entry {
+	struct strlist_entry	*next;
+	size_t			offset;
+	size_t			size;
+	intorptr		pvt;
+	char			str1;
+};
+
+struct strlist {
+	struct hash_table	hash;
+	struct strlist_entry	*head, **tailp;
+	size_t			nstr, size;
+	bool			uniq;
+};
+
+static inline const struct strlist_entry *
+strlist_head(const struct strlist *list)
+{
+	return list ? list->head : NULL;
+}
+static inline struct strlist_entry *strlist_tail(struct strlist *list)
+{
+	if (!list || !list->head)
+		return NULL;
+	return container_of(list->tailp, struct strlist_entry, next);
+}
+static inline size_t strlist_count(const struct strlist *list)
+{
+	return list ? list->nstr : 0;
+}
+static inline size_t strlist_size(const struct strlist *list)
+{
+	return list ? list->size : 0;
+}
+
+struct strlist * safe_alloc strlist_alloc(bool uniq);
+const struct strlist_entry *strlist_add(struct strlist *list, const char *str);
+const struct strlist_entry * printf_func(2, 3)
+	strlist_printf(struct strlist *list, const char *fmt, ...);
+const struct strlist_entry * vprintf_func(2)
+	strlist_vprintf(struct strlist *list, const char *fmt, va_list ap);
+const struct strlist_entry *
+strlist_find(const struct strlist *list, const char *str);
+void * safe_alloc strlist_linearize(const struct strlist *list, char sep);
+void strlist_write(const struct strlist *list, const char *sep, FILE *f);
+void strlist_free(struct strlist **listp);
+#define strlist_for_each(p,h) list_for_each((p), strlist_head(h))
+ 
+#endif /* NASM_STRLIST_H */

_service:tar_scm:nasm-2.16.03.tar.xz/include/tables.h Added

@@ -0,0 +1,77 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2016 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * tables.h
+ *
+ * Declarations for auto-generated tables
+ */
+
+#ifndef NASM_TABLES_H
+#define NASM_TABLES_H
+
+#include "compiler.h"
+#include "insnsi.h"		/* For enum opcode */
+
+/* --- From standard.mac via macros.pl: --- */
+
+/* macros.c */
+extern const unsigned char nasm_stdmac_tasm;
+extern const unsigned char nasm_stdmac_nasm;
+extern const unsigned char nasm_stdmac_version;
+
+struct use_package {
+    const char *package;
+    const unsigned char *macros;
+    int index;
+};
+extern const struct use_package *nasm_find_use_package(const char *);
+extern const int use_package_count;
+
+/* --- From insns.dat via insns.pl: --- */
+
+/* insnsn.c */
+extern const char * const nasm_insn_names;
+
+/* --- From regs.dat via regs.pl: --- */
+
+/* regs.c */
+extern const char * const nasm_reg_names;
+/* regflags.c */
+typedef uint64_t opflags_t;
+typedef uint16_t  decoflags_t;
+extern const opflags_t nasm_reg_flags;
+/* regvals.c */
+extern const int nasm_regvals;
+
+#endif /* NASM_TABLES_H */

_service:tar_scm:nasm-2.16.03.tar.xz/include/ver.h Added

@@ -0,0 +1,55 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2020 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * NASM version strings, defined in ver.c
+ */
+
+#ifndef NASM_VER_H
+#define NASM_VER_H
+
+#include "compiler.h"
+
+extern const char nasm_version;
+extern const char nasm_date;
+extern const char nasm_compile_options;
+
+extern bool reproducible;
+
+extern const char *nasm_comment(void);
+extern size_t nasm_comment_len(void);
+
+extern const char *nasm_signature(void);
+extern size_t nasm_signature_len(void);
+
+#endif /* NASM_VER_H */

_service:tar_scm:nasm-2.16.03.tar.xz/include/warnings.h Added

@@ -0,0 +1,149 @@
+#ifndef NASM_WARNINGS_H
+#define NASM_WARNINGS_H
+
+#ifndef WARN_SHR
+# error "warnings.h should only be included from within error.h"
+#endif
+
+enum warn_index {
+	WARN_IDX_NONE                    =   0, /* not suppressible */
+	WARN_IDX_DB_EMPTY                =   1, /* no operand for data declaration */
+	WARN_IDX_EA_ABSOLUTE             =   2, /* absolute address cannot be RIP-relative */
+	WARN_IDX_EA_DISPSIZE             =   3, /* displacement size ignored on absolute address */
+	WARN_IDX_FLOAT_DENORM            =   4, /* floating point denormal */
+	WARN_IDX_FLOAT_OVERFLOW          =   5, /* floating point overflow */
+	WARN_IDX_FLOAT_TOOLONG           =   6, /* too many digits in floating-point number */
+	WARN_IDX_FLOAT_UNDERFLOW         =   7, /* floating point underflow */
+	WARN_IDX_FORWARD                 =   8, /* forward reference may have unpredictable results */
+	WARN_IDX_LABEL_ORPHAN            =   9, /* labels alone on lines without trailing \c{:} */
+	WARN_IDX_LABEL_REDEF             =  10, /* label redefined to an identical value */
+	WARN_IDX_LABEL_REDEF_LATE        =  11, /* label (re)defined during code generation */
+	WARN_IDX_NUMBER_OVERFLOW         =  12, /* numeric constant does not fit */
+	WARN_IDX_OBSOLETE_NOP            =  13, /* instruction obsolete and is a noop on the target CPU */
+	WARN_IDX_OBSOLETE_REMOVED        =  14, /* instruction obsolete and removed on the target CPU */
+	WARN_IDX_OBSOLETE_VALID          =  15, /* instruction obsolete but valid on the target CPU */
+	WARN_IDX_PHASE                   =  16, /* phase error during stabilization */
+	WARN_IDX_PP_ELSE_ELIF            =  17, /* \c{%elif} after \c{%else} */
+	WARN_IDX_PP_ELSE_ELSE            =  18, /* \c{%else} after \c{%else} */
+	WARN_IDX_PP_EMPTY_BRACES         =  19, /* empty \c{%\{\}} construct */
+	WARN_IDX_PP_ENVIRONMENT          =  20, /* nonexistent environment variable */
+	WARN_IDX_PP_MACRO_DEF_CASE_SINGLE =  21, /* single-line macro defined both case sensitive and insensitive */
+	WARN_IDX_PP_MACRO_DEF_GREEDY_SINGLE =  22, /* single-line macro */
+	WARN_IDX_PP_MACRO_DEF_PARAM_SINGLE =  23, /* single-line macro defined with and without parameters */
+	WARN_IDX_PP_MACRO_DEFAULTS       =  24, /* macros with more default than optional parameters */
+	WARN_IDX_PP_MACRO_PARAMS_LEGACY  =  25, /* improperly calling multi-line macro for legacy support */
+	WARN_IDX_PP_MACRO_PARAMS_MULTI   =  26, /* multi-line macro calls with wrong parameter count */
+	WARN_IDX_PP_MACRO_PARAMS_SINGLE  =  27, /* single-line macro calls with wrong parameter count */
+	WARN_IDX_PP_MACRO_REDEF_MULTI    =  28, /* redefining multi-line macro */
+	WARN_IDX_PP_OPEN_BRACES          =  29, /* unterminated \c{%\{...\}} */
+	WARN_IDX_PP_OPEN_BRACKETS        =  30, /* unterminated \c{%...} */
+	WARN_IDX_PP_OPEN_STRING          =  31, /* unterminated string */
+	WARN_IDX_PP_REP_NEGATIVE         =  32, /* regative \c{%rep} count */
+	WARN_IDX_PP_SEL_RANGE            =  33, /* \c{%sel()} argument out of range */
+	WARN_IDX_PP_TRAILING             =  34, /* trailing garbage ignored */
+	WARN_IDX_PRAGMA_BAD              =  35, /* malformed \c{%pragma} */
+	WARN_IDX_PRAGMA_EMPTY            =  36, /* empty \c{%pragma} directive */
+	WARN_IDX_PRAGMA_NA               =  37, /* \c{%pragma} not applicable to this compilation */
+	WARN_IDX_PRAGMA_UNKNOWN          =  38, /* unknown \c{%pragma} facility or directive */
+	WARN_IDX_PREFIX_BND              =  39, /* invalid \c{BND} prefix */
+	WARN_IDX_PREFIX_HLE              =  40, /* invalid HLE prefix */
+	WARN_IDX_PREFIX_LOCK_ERROR       =  41, /* \c{LOCK} prefix on unlockable instruction */
+	WARN_IDX_PREFIX_LOCK_XCHG        =  42, /* superfluous \c{LOCK} prefix on \c{XCHG} instruction */
+	WARN_IDX_PREFIX_OPSIZE           =  43, /* invalid operand size prefix */
+	WARN_IDX_PREFIX_SEG              =  44, /* segment prefix ignored in 64-bit mode */
+	WARN_IDX_PTR                     =  45, /* non-NASM keyword used in other assemblers */
+	WARN_IDX_REGSIZE                 =  46, /* register size specification ignored */
+	WARN_IDX_RELOC_ABS_BYTE          =  47, /* 8-bit absolute section-crossing relocation */
+	WARN_IDX_RELOC_ABS_DWORD         =  48, /* 32-bit absolute section-crossing relocation */
+	WARN_IDX_RELOC_ABS_QWORD         =  49, /* 64-bit absolute section-crossing relocation */
+	WARN_IDX_RELOC_ABS_WORD          =  50, /* 16-bit absolute section-crossing relocation */
+	WARN_IDX_RELOC_REL_BYTE          =  51, /* 8-bit relative section-crossing relocation */
+	WARN_IDX_RELOC_REL_DWORD         =  52, /* 32-bit relative section-crossing relocation */
+	WARN_IDX_RELOC_REL_QWORD         =  53, /* 64-bit relative section-crossing relocation */
+	WARN_IDX_RELOC_REL_WORD          =  54, /* 16-bit relative section-crossing relocation */
+	WARN_IDX_UNKNOWN_WARNING         =  55, /* unknown warning in \c{-W}/\c{-w} or warning directive */
+	WARN_IDX_USER                    =  56, /* \c{%warning} directives */
+	WARN_IDX_WARN_STACK_EMPTY        =  57, /* warning stack empty */
+	WARN_IDX_ZEROING                 =  58, /* \c{RES}\e{x} in initialized section becomes zero */
+	WARN_IDX_ZEXT_RELOC              =  59, /* relocation zero-extended to match output format */
+	WARN_IDX_OTHER                   =  60, /* any warning not specifically mentioned above */
+	WARN_IDX_ALL                     =  61  /* all possible warnings */
+};
+
+enum warn_const {
+	WARN_NONE                        =   0 << WARN_SHR,
+	WARN_DB_EMPTY                    =   1 << WARN_SHR,
+	WARN_EA_ABSOLUTE                 =   2 << WARN_SHR,
+	WARN_EA_DISPSIZE                 =   3 << WARN_SHR,
+	WARN_FLOAT_DENORM                =   4 << WARN_SHR,
+	WARN_FLOAT_OVERFLOW              =   5 << WARN_SHR,
+	WARN_FLOAT_TOOLONG               =   6 << WARN_SHR,
+	WARN_FLOAT_UNDERFLOW             =   7 << WARN_SHR,
+	WARN_FORWARD                     =   8 << WARN_SHR,
+	WARN_LABEL_ORPHAN                =   9 << WARN_SHR,
+	WARN_LABEL_REDEF                 =  10 << WARN_SHR,
+	WARN_LABEL_REDEF_LATE            =  11 << WARN_SHR,
+	WARN_NUMBER_OVERFLOW             =  12 << WARN_SHR,
+	WARN_OBSOLETE_NOP                =  13 << WARN_SHR,
+	WARN_OBSOLETE_REMOVED            =  14 << WARN_SHR,
+	WARN_OBSOLETE_VALID              =  15 << WARN_SHR,
+	WARN_PHASE                       =  16 << WARN_SHR,
+	WARN_PP_ELSE_ELIF                =  17 << WARN_SHR,
+	WARN_PP_ELSE_ELSE                =  18 << WARN_SHR,
+	WARN_PP_EMPTY_BRACES             =  19 << WARN_SHR,
+	WARN_PP_ENVIRONMENT              =  20 << WARN_SHR,
+	WARN_PP_MACRO_DEF_CASE_SINGLE    =  21 << WARN_SHR,
+	WARN_PP_MACRO_DEF_GREEDY_SINGLE  =  22 << WARN_SHR,
+	WARN_PP_MACRO_DEF_PARAM_SINGLE   =  23 << WARN_SHR,
+	WARN_PP_MACRO_DEFAULTS           =  24 << WARN_SHR,
+	WARN_PP_MACRO_PARAMS_LEGACY      =  25 << WARN_SHR,
+	WARN_PP_MACRO_PARAMS_MULTI       =  26 << WARN_SHR,
+	WARN_PP_MACRO_PARAMS_SINGLE      =  27 << WARN_SHR,
+	WARN_PP_MACRO_REDEF_MULTI        =  28 << WARN_SHR,
+	WARN_PP_OPEN_BRACES              =  29 << WARN_SHR,
+	WARN_PP_OPEN_BRACKETS            =  30 << WARN_SHR,
+	WARN_PP_OPEN_STRING              =  31 << WARN_SHR,
+	WARN_PP_REP_NEGATIVE             =  32 << WARN_SHR,
+	WARN_PP_SEL_RANGE                =  33 << WARN_SHR,
+	WARN_PP_TRAILING                 =  34 << WARN_SHR,
+	WARN_PRAGMA_BAD                  =  35 << WARN_SHR,
+	WARN_PRAGMA_EMPTY                =  36 << WARN_SHR,
+	WARN_PRAGMA_NA                   =  37 << WARN_SHR,
+	WARN_PRAGMA_UNKNOWN              =  38 << WARN_SHR,
+	WARN_PREFIX_BND                  =  39 << WARN_SHR,
+	WARN_PREFIX_HLE                  =  40 << WARN_SHR,
+	WARN_PREFIX_LOCK_ERROR           =  41 << WARN_SHR,
+	WARN_PREFIX_LOCK_XCHG            =  42 << WARN_SHR,
+	WARN_PREFIX_OPSIZE               =  43 << WARN_SHR,
+	WARN_PREFIX_SEG                  =  44 << WARN_SHR,
+	WARN_PTR                         =  45 << WARN_SHR,
+	WARN_REGSIZE                     =  46 << WARN_SHR,
+	WARN_RELOC_ABS_BYTE              =  47 << WARN_SHR,
+	WARN_RELOC_ABS_DWORD             =  48 << WARN_SHR,
+	WARN_RELOC_ABS_QWORD             =  49 << WARN_SHR,
+	WARN_RELOC_ABS_WORD              =  50 << WARN_SHR,
+	WARN_RELOC_REL_BYTE              =  51 << WARN_SHR,
+	WARN_RELOC_REL_DWORD             =  52 << WARN_SHR,
+	WARN_RELOC_REL_QWORD             =  53 << WARN_SHR,
+	WARN_RELOC_REL_WORD              =  54 << WARN_SHR,
+	WARN_UNKNOWN_WARNING             =  55 << WARN_SHR,
+	WARN_USER                        =  56 << WARN_SHR,
+	WARN_WARN_STACK_EMPTY            =  57 << WARN_SHR,
+	WARN_ZEROING                     =  58 << WARN_SHR,
+	WARN_ZEXT_RELOC                  =  59 << WARN_SHR,
+	WARN_OTHER                       =  60 << WARN_SHR
+};
+
+struct warning_alias {
+	const char *name;
+	enum warn_index warning;
+};
+
+#define NUM_WARNING_ALIAS 77
+extern const char * const warning_name62;
+extern const char * const warning_help62;
+extern const struct warning_alias warning_aliasNUM_WARNING_ALIAS;
+extern const uint8_t warning_default61;
+extern uint8_t warning_state61;
+
+#endif /* NASM_WARNINGS_H */

_service:tar_scm:nasm-2.16.03.tar.xz/include/warnings.h.time Added

_service:tar_scm:nasm-2.16.03.tar.xz/macros Added

_service:tar_scm:nasm-2.16.03.tar.xz/macros/altreg.mac Added

@@ -0,0 +1,107 @@
+;; --------------------------------------------------------------------------
+;;   
+;;   Copyright 1996-2009 The NASM Authors - All Rights Reserved
+;;   See the file AUTHORS included with the NASM distribution for
+;;   the specific copyright holders.
+;;
+;;   Redistribution and use in source and binary forms, with or without
+;;   modification, are permitted provided that the following
+;;   conditions are met:
+;;
+;;   * Redistributions of source code must retain the above copyright
+;;     notice, this list of conditions and the following disclaimer.
+;;   * Redistributions in binary form must reproduce the above
+;;     copyright notice, this list of conditions and the following
+;;     disclaimer in the documentation and/or other materials provided
+;;     with the distribution.
+;;     
+;;     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+;;     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+;;     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+;;     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;;     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+;;     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;;     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+;;     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+;;     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+;;     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+;;     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+;;     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;;     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+;; --------------------------------------------------------------------------
+
+;;
+;; altreg.mac
+;;
+;; Alternate register names for 64-bit mode
+;;
+
+USE: altreg
+
+;;
+;; Intel documents R8L-R15L instead of R8B-R15B
+;; (Warning: this may confuse people with an AT&T-style assembly
+;; background, where "r8l" means R8D, etc.)
+;;
+%idefine r8l  r8b
+%idefine r9l  r9b
+%idefine r10l r10b
+%idefine r11l r11b
+%idefine r12l r12b
+%idefine r13l r13b
+%idefine r14l r14b
+%idefine r15l r15b
+
+;;
+;; Numeric register names for the lower 8 registers
+;;
+%idefine r0  rax
+%idefine r1  rcx
+%idefine r2  rdx
+%idefine r3  rbx
+%idefine r4  rsp
+%idefine r5  rbp
+%idefine r6  rsi
+%idefine r7  rdi
+
+%idefine r0d eax
+%idefine r1d ecx
+%idefine r2d edx
+%idefine r3d ebx
+%idefine r4d esp
+%idefine r5d ebp
+%idefine r6d esi
+%idefine r7d edi
+
+%idefine r0w ax
+%idefine r1w cx
+%idefine r2w dx
+%idefine r3w bx
+%idefine r4w sp
+%idefine r5w bp
+%idefine r6w si
+%idefine r7w di
+
+%idefine r0b al
+%idefine r1b cl
+%idefine r2b dl
+%idefine r3b bl
+%idefine r4b spl
+%idefine r5b bpl
+%idefine r6b sil
+%idefine r7b dil
+
+%idefine r0l al
+%idefine r1l cl
+%idefine r2l dl
+%idefine r3l bl
+%idefine r4l spl
+%idefine r5l bpl
+%idefine r6l sil
+%idefine r7l dil
+
+%idefine r0h ah
+%idefine r1h ch
+%idefine r2h dh
+%idefine r3h bh

_service:tar_scm:nasm-2.16.03.tar.xz/macros/fp.mac Added

@@ -0,0 +1,62 @@
+;; --------------------------------------------------------------------------
+;;   
+;;   Copyright 2010-2020 The NASM Authors - All Rights Reserved
+;;   See the file AUTHORS included with the NASM distribution for
+;;   the specific copyright holders.
+;;
+;;   Redistribution and use in source and binary forms, with or without
+;;   modification, are permitted provided that the following
+;;   conditions are met:
+;;
+;;   * Redistributions of source code must retain the above copyright
+;;     notice, this list of conditions and the following disclaimer.
+;;   * Redistributions in binary form must reproduce the above
+;;     copyright notice, this list of conditions and the following
+;;     disclaimer in the documentation and/or other materials provided
+;;     with the distribution.
+;;     
+;;     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+;;     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+;;     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+;;     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;;     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+;;     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;;     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+;;     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+;;     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+;;     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+;;     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+;;     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;;     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+;; --------------------------------------------------------------------------
+
+;;
+;; fp.mac
+;;
+;; Floating-point utility macros
+;;
+
+USE: fp
+
+%define	Inf		__?Infinity?__
+%define NaN		__?QNaN?__
+%define QNaN		__?QNaN?__
+%define SNaN		__?SNaN?__
+
+%define float8(x)	__?float8?__(x)
+%define float16(x)	__?float16?__(x)
+%define bfloat16(x)     __?bfloat16?__(x)
+%define float32(x)	__?float32?__(x)
+%define float64(x)	__?float64?__(x)
+%define float80m(x)	__?float80m?__(x)
+%define float80e(x)	__?float80e?__(x)
+%define float128l(x)	__?float128l?__(x)
+%define float128h(x)	__?float128h?__(x)
+
+%imacro bf16 1-*.nolist
+  %rep %0
+    dw __?bfloat16?__(%1)
+    %rotate 1
+  %endrep
+%endmacro

_service:tar_scm:nasm-2.16.03.tar.xz/macros/ifunc.mac Added

@@ -0,0 +1,48 @@
+;; --------------------------------------------------------------------------
+;;   
+;;   Copyright 2012-2016 The NASM Authors - All Rights Reserved
+;;   See the file AUTHORS included with the NASM distribution for
+;;   the specific copyright holders.
+;;
+;;   Redistribution and use in source and binary forms, with or without
+;;   modification, are permitted provided that the following
+;;   conditions are met:
+;;
+;;   * Redistributions of source code must retain the above copyright
+;;     notice, this list of conditions and the following disclaimer.
+;;   * Redistributions in binary form must reproduce the above
+;;     copyright notice, this list of conditions and the following
+;;     disclaimer in the documentation and/or other materials provided
+;;     with the distribution.
+;;     
+;;     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+;;     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+;;     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+;;     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;;     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+;;     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;;     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+;;     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+;;     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+;;     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+;;     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+;;     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;;     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+;; --------------------------------------------------------------------------
+
+;;
+;; ifunc.mac
+;;
+;; Integer function utility macros
+;;
+
+USE: ifunc
+
+%idefine ilog2(x)	(__?ilog2e?__(x))
+%idefine ilog2e(x)	(__?ilog2e?__(x))
+%idefine ilog2w(x)	(__?ilog2w?__(x))
+%idefine ilog2fw(x)	(__?ilog2w?__(x))
+%idefine ilog2f(x)	(__?ilog2f?__(x))
+%idefine ilog2cw(x)	(__?ilog2w?__(x) * 0 + __?ilog2c?__(x))
+%idefine ilog2c(x)	(__?ilog2c?__(x))

_service:tar_scm:nasm-2.16.03.tar.xz/macros/macros.c Added

@@ -0,0 +1,875 @@
+/*
+ * Do not edit - this file auto-generated by macros.pl from:
+ *   version.mac
+ *   ./macros/altreg.mac
+ *   ./macros/fp.mac
+ *   ./macros/ifunc.mac
+ *   ./macros/masm.mac
+ *   ./macros/smartalign.mac
+ *   ./macros/standard.mac
+ *   ./output/outaout.mac
+ *   ./output/outas86.mac
+ *   ./output/outbin.mac
+ *   ./output/outcoff.mac
+ *   ./output/outdbg.mac
+ *   ./output/outelf.mac
+ *   ./output/outmacho.mac
+ *   ./output/outobj.mac
+ */
+
+#include "tables.h"
+#include "nasmlib.h"
+#include "hashtbl.h"
+#include "outform.h"
+
+#define p_if                     128
+#define p_ifctx                  129
+#define p_ifdef                  130
+#define p_ifdefalias             131
+#define p_ifdifi                 132
+#define p_ifempty                133
+#define p_ifenv                  134
+#define p_ifid                   135
+#define p_ifidn                  136
+#define p_ifidni                 137
+#define p_ifmacro                138
+#define p_ifnum                  139
+#define p_ifstr                  140
+#define p_iftoken                141
+#define p_ifusable               142
+#define p_ifusing                143
+#define p_ifn                    144
+#define p_ifnctx                 145
+#define p_ifndef                 146
+#define p_ifndefalias            147
+#define p_ifndifi                148
+#define p_ifnempty               149
+#define p_ifnenv                 150
+#define p_ifnid                  151
+#define p_ifnidn                 152
+#define p_ifnidni                153
+#define p_ifnmacro               154
+#define p_ifnnum                 155
+#define p_ifnstr                 156
+#define p_ifntoken               157
+#define p_ifnusable              158
+#define p_ifnusing               159
+#define p_elif                   160
+#define p_elifctx                161
+#define p_elifdef                162
+#define p_elifdefalias           163
+#define p_elifdifi               164
+#define p_elifempty              165
+#define p_elifenv                166
+#define p_elifid                 167
+#define p_elifidn                168
+#define p_elifidni               169
+#define p_elifmacro              170
+#define p_elifnum                171
+#define p_elifstr                172
+#define p_eliftoken              173
+#define p_elifusable             174
+#define p_elifusing              175
+#define p_elifn                  176
+#define p_elifnctx               177
+#define p_elifndef               178
+#define p_elifndefalias          179
+#define p_elifndifi              180
+#define p_elifnempty             181
+#define p_elifnenv               182
+#define p_elifnid                183
+#define p_elifnidn               184
+#define p_elifnidni              185
+#define p_elifnmacro             186
+#define p_elifnnum               187
+#define p_elifnstr               188
+#define p_elifntoken             189
+#define p_elifnusable            190
+#define p_elifnusing             191
+#define p_aliases                192
+#define p_arg                    193
+#define p_clear                  194
+#define p_depend                 195
+#define p_else                   196
+#define p_endif                  197
+#define p_endm                   198
+#define p_endmacro               199
+#define p_endrep                 200
+#define p_error                  201
+#define p_exitmacro              202
+#define p_exitrep                203
+#define p_fatal                  204
+#define p_include                205
+#define p_line                   206
+#define p_local                  207
+#define p_null                   208
+#define p_pop                    209
+#define p_pragma                 210
+#define p_push                   211
+#define p_rep                    212
+#define p_repl                   213
+#define p_require                214
+#define p_rotate                 215
+#define p_stacksize              216
+#define p_undef                  217
+#define p_undefalias             218
+#define p_use                    219
+#define p_warning                220
+#define p_assign                 222
+#define p_iassign                223
+#define p_defalias               224
+#define p_idefalias              225
+#define p_define                 226
+#define p_idefine                227
+#define p_defstr                 228
+#define p_idefstr                229
+#define p_deftok                 230
+#define p_ideftok                231
+#define p_macro                  232
+#define p_imacro                 233
+#define p_pathsearch             234
+#define p_ipathsearch            235
+#define p_rmacro                 236
+#define p_irmacro                237
+#define p_strcat                 238
+#define p_istrcat                239
+#define p_strlen                 240
+#define p_istrlen                241
+#define p_substr                 242
+#define p_isubstr                243
+#define p_xdefine                244
+#define p_ixdefine               245
+#define p_unmacro                246
+#define p_unimacro               247
+#define EOL                      127
+
+
+#if 1
+const unsigned char nasm_stdmac_version = {
+    /* From version.mac */
+        /*    0 */ p_define,'_','_','?','N','A','S','M','_','M','A','J','O','R','?','_','_',' ','2',EOL,
+        /*   20 */ p_define,'_','_','?','N','A','S','M','_','M','I','N','O','R','?','_','_',' ','1','6',EOL,
+        /*   41 */ p_define,'_','_','?','N','A','S','M','_','S','U','B','M','I','N','O','R','?','_','_',' ','3',EOL,
+        /*   64 */ p_define,'_','_','?','N','A','S','M','_','P','A','T','C','H','L','E','V','E','L','?','_','_',' ','0',EOL,
+        /*   89 */ p_define,'_','_','?','N','A','S','M','_','V','E','R','S','I','O','N','_','I','D','?','_','_',' ','0','0','2','1','0','0','3','0','0','h',EOL,
+        /*  123 */ p_define,'_','_','?','N','A','S','M','_','V','E','R','?','_','_',' ','\"','2','.','1','6','.','0','3','\"',EOL,
+        /*  149 */ EOL
+};
+#endif
+
+#if 1
+static const unsigned char nasm_usemac_altreg = {
+    /* From ./macros/altreg.mac */
+        /*    0 */ p_define,'_','_','?','U','S','E','_','A','L','T','R','E','G','?','_','_',EOL,
+        /*    0 */ p_defalias,'_','_','U','S','E','_','A','L','T','R','E','G','_','_',' ','_','_','?','U','S','E','A','L','T','R','E','G','?','_','_',EOL,
+        /*   32 */ p_idefine,'r','8','l',' ','r','8','b',EOL,
+        /*   41 */ p_idefine,'r','9','l',' ','r','9','b',EOL,
+        /*   50 */ p_idefine,'r','1','0','l',' ','r','1','0','b',EOL,
+        /*   61 */ p_idefine,'r','1','1','l',' ','r','1','1','b',EOL,
+        /*   72 */ p_idefine,'r','1','2','l',' ','r','1','2','b',EOL,
+        /*   83 */ p_idefine,'r','1','3','l',' ','r','1','3','b',EOL,
+        /*   94 */ p_idefine,'r','1','4','l',' ','r','1','4','b',EOL,
+        /*  105 */ p_idefine,'r','1','5','l',' ','r','1','5','b',EOL,
+        /*  116 */ p_idefine,'r','0',' ','r','a','x',EOL,
+        /*  124 */ p_idefine,'r','1',' ','r','c','x',EOL,
+        /*  132 */ p_idefine,'r','2',' ','r','d','x',EOL,
+        /*  140 */ p_idefine,'r','3',' ','r','b','x',EOL,
+        /*  148 */ p_idefine,'r','4',' ','r','s','p',EOL,
+        /*  156 */ p_idefine,'r','5',' ','r','b','p',EOL,
+        /*  164 */ p_idefine,'r','6',' ','r','s','i',EOL,
+        /*  172 */ p_idefine,'r','7',' ','r','d','i',EOL,
+        /*  180 */ p_idefine,'r','0','d',' ','e','a','x',EOL,
+        /*  189 */ p_idefine,'r','1','d',' ','e','c','x',EOL,
+        /*  198 */ p_idefine,'r','2','d',' ','e','d','x',EOL,
+        /*  207 */ p_idefine,'r','3','d',' ','e','b','x',EOL,
+        /*  216 */ p_idefine,'r','4','d',' ','e','s','p',EOL,
+        /*  225 */ p_idefine,'r','5','d',' ','e','b','p',EOL,
+        /*  234 */ p_idefine,'r','6','d',' ','e','s','i',EOL,
+        /*  243 */ p_idefine,'r','7','d',' ','e','d','i',EOL,
+        /*  252 */ p_idefine,'r','0','w',' ','a','x',EOL,
+        /*  260 */ p_idefine,'r','1','w',' ','c','x',EOL,
+        /*  268 */ p_idefine,'r','2','w',' ','d','x',EOL,
+        /*  276 */ p_idefine,'r','3','w',' ','b','x',EOL,
+        /*  284 */ p_idefine,'r','4','w',' ','s','p',EOL,
+        /*  292 */ p_idefine,'r','5','w',' ','b','p',EOL,
+        /*  300 */ p_idefine,'r','6','w',' ','s','i',EOL,
+        /*  308 */ p_idefine,'r','7','w',' ','d','i',EOL,
+        /*  316 */ p_idefine,'r','0','b',' ','a','l',EOL,
+        /*  324 */ p_idefine,'r','1','b',' ','c','l',EOL,
+        /*  332 */ p_idefine,'r','2','b',' ','d','l',EOL,
+        /*  340 */ p_idefine,'r','3','b',' ','b','l',EOL,
+        /*  348 */ p_idefine,'r','4','b',' ','s','p','l',EOL,
+        /*  357 */ p_idefine,'r','5','b',' ','b','p','l',EOL,
+        /*  366 */ p_idefine,'r','6','b',' ','s','i','l',EOL,
+        /*  375 */ p_idefine,'r','7','b',' ','d','i','l',EOL,
+        /*  384 */ p_idefine,'r','0','l',' ','a','l',EOL,
+        /*  392 */ p_idefine,'r','1','l',' ','c','l',EOL,
+        /*  400 */ p_idefine,'r','2','l',' ','d','l',EOL,
+        /*  408 */ p_idefine,'r','3','l',' ','b','l',EOL,
+        /*  416 */ p_idefine,'r','4','l',' ','s','p','l',EOL,
+        /*  425 */ p_idefine,'r','5','l',' ','b','p','l',EOL,
+        /*  434 */ p_idefine,'r','6','l',' ','s','i','l',EOL,
+        /*  443 */ p_idefine,'r','7','l',' ','d','i','l',EOL,
+        /*  452 */ p_idefine,'r','0','h',' ','a','h',EOL,
+        /*  460 */ p_idefine,'r','1','h',' ','c','h',EOL,
+        /*  468 */ p_idefine,'r','2','h',' ','d','h',EOL,
+        /*  476 */ p_idefine,'r','3','h',' ','b','h',EOL,
+        /*  484 */ EOL
+};
+#endif
+
+#if 1
+static const unsigned char nasm_usemac_fp = {
+    /* From ./macros/fp.mac */
+        /*    0 */ p_define,'_','_','?','U','S','E','_','F','P','?','_','_',EOL,
+        /*    0 */ p_defalias,'_','_','U','S','E','_','F','P','_','_',' ','_','_','?','U','S','E','F','P','?','_','_',EOL,
+        /*   24 */ p_define,'I','n','f',' ','_','_','?','I','n','f','i','n','i','t','y','?','_','_',EOL,
+        /*   44 */ p_define,'N','a','N',' ','_','_','?','Q','N','a','N','?','_','_',EOL,
+        /*   60 */ p_define,'Q','N','a','N',' ','_','_','?','Q','N','a','N','?','_','_',EOL,
+        /*   77 */ p_define,'S','N','a','N',' ','_','_','?','S','N','a','N','?','_','_',EOL,
+        /*   94 */ p_define,'f','l','o','a','t','8','(','x',')',' ','_','_','?','f','l','o','a','t','8','?','_','_','(','x',')',EOL,
+        /*  121 */ p_define,'f','l','o','a','t','1','6','(','x',')',' ','_','_','?','f','l','o','a','t','1','6','?','_','_','(','x',')',EOL,
+        /*  150 */ p_define,'b','f','l','o','a','t','1','6','(','x',')',' ','_','_','?','b','f','l','o','a','t','1','6','?','_','_','(','x',')',EOL,
+        /*  181 */ p_define,'f','l','o','a','t','3','2','(','x',')',' ','_','_','?','f','l','o','a','t','3','2','?','_','_','(','x',')',EOL,
+        /*  210 */ p_define,'f','l','o','a','t','6','4','(','x',')',' ','_','_','?','f','l','o','a','t','6','4','?','_','_','(','x',')',EOL,
+        /*  239 */ p_define,'f','l','o','a','t','8','0','m','(','x',')',' ','_','_','?','f','l','o','a','t','8','0','m','?','_','_','(','x',')',EOL,
+        /*  270 */ p_define,'f','l','o','a','t','8','0','e','(','x',')',' ','_','_','?','f','l','o','a','t','8','0','e','?','_','_','(','x',')',EOL,
+        /*  301 */ p_define,'f','l','o','a','t','1','2','8','l','(','x',')',' ','_','_','?','f','l','o','a','t','1','2','8','l','?','_','_','(','x',')',EOL,
+        /*  334 */ p_define,'f','l','o','a','t','1','2','8','h','(','x',')',' ','_','_','?','f','l','o','a','t','1','2','8','h','?','_','_','(','x',')',EOL,
+        /*  367 */ p_imacro,'b','f','1','6',' ','1','-','*','.','n','o','l','i','s','t',EOL,
+        /*  384 */ p_rep,'%','0',EOL,
+        /*  388 */ 'd','w',' ','_','_','?','b','f','l','o','a','t','1','6','?','_','_','(','%','1',')',EOL,
+        /*  410 */ p_rotate,'1',EOL,
+        /*  413 */ p_endrep,EOL,
+        /*  415 */ p_endmacro,EOL,
+        /*  417 */ EOL
+};
+#endif
+
+#if 1
+static const unsigned char nasm_usemac_ifunc = {
+    /* From ./macros/ifunc.mac */
+        /*    0 */ p_define,'_','_','?','U','S','E','_','I','F','U','N','C','?','_','_',EOL,
+        /*    0 */ p_defalias,'_','_','U','S','E','_','I','F','U','N','C','_','_',' ','_','_','?','U','S','E','I','F','U','N','C','?','_','_',EOL,
+        /*   30 */ p_idefine,'i','l','o','g','2','(','x',')',' ','(','_','_','?','i','l','o','g','2','e','?','_','_','(','x',')',')',EOL,
+        /*   58 */ p_idefine,'i','l','o','g','2','e','(','x',')',' ','(','_','_','?','i','l','o','g','2','e','?','_','_','(','x',')',')',EOL,
+        /*   87 */ p_idefine,'i','l','o','g','2','w','(','x',')',' ','(','_','_','?','i','l','o','g','2','w','?','_','_','(','x',')',')',EOL,
+        /*  116 */ p_idefine,'i','l','o','g','2','f','w','(','x',')',' ','(','_','_','?','i','l','o','g','2','w','?','_','_','(','x',')',')',EOL,
+        /*  146 */ p_idefine,'i','l','o','g','2','f','(','x',')',' ','(','_','_','?','i','l','o','g','2','f','?','_','_','(','x',')',')',EOL,
+        /*  175 */ p_idefine,'i','l','o','g','2','c','w','(','x',')',' ','(','_','_','?','i','l','o','g','2','w','?','_','_','(','x',')',' ','*',' ','0',' ','+',' ','_','_','?','i','l','o','g','2','c','?','_','_','(','x',')',')',EOL,
+        /*  227 */ p_idefine,'i','l','o','g','2','c','(','x',')',' ','(','_','_','?','i','l','o','g','2','c','?','_','_','(','x',')',')',EOL,
+        /*  256 */ EOL
+};
+#endif
+
+#if 1
+static const unsigned char nasm_usemac_masm = {
+    /* From ./macros/masm.mac */
+        /*    0 */ p_define,'_','_','?','U','S','E','_','M','A','S','M','?','_','_',EOL,
+        /*    0 */ p_defalias,'_','_','U','S','E','_','M','A','S','M','_','_',' ','_','_','?','U','S','E','M','A','S','M','?','_','_',EOL,
+        /*   28 */ p_unimacro,'s','e','g','m','e','n','t',' ','1','+',EOL,
+        /*   40 */ p_imacro,'s','e','g','m','e','n','t',' ','0','-','1','+','.','n','o','l','i','s','t',EOL,
+        /*   61 */ p_define,'_','_','?','S','E','C','T','?','_','_',' ','','s','e','g','m','e','n','t',' ','%','0','0',' ','%','1','',EOL,
+        /*   90 */ '_','_','?','S','E','C','T','?','_','_',EOL,
+        /*  101 */ p_endmacro,EOL,
+        /*  103 */ p_imacro,'e','n','d','s',' ','0','+','.','n','o','l','i','s','t',EOL,
+        /*  119 */ p_null,'e','n','d','s',' ','%','0','0',EOL,
+        /*  129 */ p_endmacro,EOL,
+        /*  131 */ p_imacro,'p','r','o','c',' ','0','-','*','.','n','o','l','i','s','t',EOL,
+        /*  148 */ p_rep,'%','0',EOL,
+        /*  152 */ p_ifidni,'%','1',',','f','a','r',EOL,
+        /*  160 */ p_idefine,'r','e','t',' ','r','e','t','f',EOL,
+        /*  170 */ p_else,EOL,
+        /*  172 */ p_idefine,'r','e','t',' ','r','e','t','n',EOL,
+        /*  182 */ p_endif,EOL,
+        /*  184 */ p_rotate,'1',EOL,
+        /*  187 */ p_endrep,EOL,
+        /*  189 */ p_endmacro,EOL,
+        /*  191 */ p_imacro,'e','n','d','p',' ','0','.','n','o','l','i','s','t',EOL,
+        /*  206 */ p_null,'e','n','d','p',' ','%','0','0',EOL,
+        /*  216 */ p_undef,'r','e','t',EOL,
+        /*  221 */ p_endmacro,EOL,
+        /*  223 */ p_idefine,'p','t','r',' ','_','_','?','m','a','s','m','_','p','t','r','?','_','_',EOL,
+        /*  243 */ p_idefine,'f','l','a','t',' ','_','_','?','m','a','s','m','_','f','l','a','t','?','_','_',EOL,
+        /*  265 */ p_idefine,'o','f','f','s','e','t',EOL,
+        /*  273 */ p_imacro,'e','n','d',' ','0','+','.','n','o','l','i','s','t',EOL,
+        /*  288 */ p_endmacro,EOL,
+        /*  290 */ p_idefine,'t','b','y','t','e',' ','t','w','o','r','d',EOL,
+        /*  303 */ 'd','e','f','a','u','l','t',' ','r','e','l',EOL,
+        /*  315 */ EOL
+};
+#endif
+
+#if 1
+static const unsigned char nasm_usemac_smartalign = {
+    /* From ./macros/smartalign.mac */
+        /*    0 */ p_define,'_','_','?','U','S','E','_','S','M','A','R','T','A','L','I','G','N','?','_','_',EOL,
+        /*    0 */ p_defalias,'_','_','U','S','E','_','S','M','A','R','T','A','L','I','G','N','_','_',' ','_','_','?','U','S','E','S','M','A','R','T','A','L','I','G','N','?','_','_',EOL,
+        /*   40 */ p_imacro,'a','l','i','g','n','m','o','d','e',' ','1','-','2','.','n','o','l','i','s','t',EOL,
+        /*   62 */ p_ifidni,'%','1',',','n','o','p',EOL,
+        /*   70 */ p_define,'_','_','?','A','L','I','G','N','_','J','M','P','_','T','H','R','E','S','H','O','L','D','?','_','_',' ','1','6',EOL,
+        /*  100 */ p_define,'_','_','?','A','L','I','G','N','_','1','6','B','I','T','_','1','B','?','_','_',' ','0','x','9','0',EOL,
+        /*  127 */ p_define,'_','_','?','A','L','I','G','N','_','1','6','B','I','T','_','G','R','O','U','P','?','_','_',' ','1',EOL,
+        /*  154 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','1','B','?','_','_',' ','0','x','9','0',EOL,
+        /*  181 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','G','R','O','U','P','?','_','_',' ','1',EOL,
+        /*  208 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','1','B','?','_','_',' ','0','x','9','0',EOL,
+        /*  235 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','G','R','O','U','P','?','_','_',' ','1',EOL,
+        /*  262 */ p_elifidni,'%','1',',','g','e','n','e','r','i','c',EOL,
+        /*  274 */ p_define,'_','_','?','A','L','I','G','N','_','J','M','P','_','T','H','R','E','S','H','O','L','D','?','_','_',' ','8',EOL,
+        /*  303 */ p_define,'_','_','?','A','L','I','G','N','_','1','6','B','I','T','_','1','B','?','_','_',' ','0','x','9','0',EOL,
+        /*  330 */ p_define,'_','_','?','A','L','I','G','N','_','1','6','B','I','T','_','2','B','?','_','_',' ','0','x','8','9',',','0','x','f','6',EOL,
+        /*  362 */ p_define,'_','_','?','A','L','I','G','N','_','1','6','B','I','T','_','3','B','?','_','_',' ','0','x','8','d',',','0','x','7','4',',','0','x','0','0',EOL,
+        /*  399 */ p_define,'_','_','?','A','L','I','G','N','_','1','6','B','I','T','_','4','B','?','_','_',' ','0','x','8','d',',','0','x','b','4',',','0','x','0','0',',','0','x','0','0',EOL,
+        /*  441 */ p_define,'_','_','?','A','L','I','G','N','_','1','6','B','I','T','_','5','B','?','_','_',' ','0','x','8','d',',','0','x','b','4',',','0','x','0','0',',','0','x','0','0',',','0','x','9','0',EOL,
+        /*  488 */ p_define,'_','_','?','A','L','I','G','N','_','1','6','B','I','T','_','6','B','?','_','_',' ','0','x','8','d',',','0','x','b','4',',','0','x','0','0',',','0','x','0','0',',','0','x','8','9',',','0','x','f','f',EOL,
+        /*  540 */ p_define,'_','_','?','A','L','I','G','N','_','1','6','B','I','T','_','7','B','?','_','_',' ','0','x','8','d',',','0','x','b','4',',','0','x','0','0',',','0','x','0','0',',','0','x','8','d',',','0','x','7','d',',','0','x','0','0',EOL,
+        /*  597 */ p_define,'_','_','?','A','L','I','G','N','_','1','6','B','I','T','_','8','B','?','_','_',' ','0','x','8','d',',','0','x','b','4',',','0','x','0','0',',','0','x','0','0',',','0','x','8','d',',','0','x','b','d',',','0','x','0','0',',','0','x','0','0',EOL,
+        /*  659 */ p_define,'_','_','?','A','L','I','G','N','_','1','6','B','I','T','_','G','R','O','U','P','?','_','_',' ','8',EOL,
+        /*  686 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','1','B','?','_','_',' ','0','x','9','0',EOL,
+        /*  713 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','2','B','?','_','_',' ','0','x','8','9',',','0','x','f','6',EOL,
+        /*  745 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','3','B','?','_','_',' ','0','x','8','d',',','0','x','7','6',',','0','x','0','0',EOL,
+        /*  782 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','4','B','?','_','_',' ','0','x','8','d',',','0','x','7','4',',','0','x','2','6',',','0','x','0','0',EOL,
+        /*  824 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','5','B','?','_','_',' ','0','x','9','0',',','0','x','8','d',',','0','x','7','4',',','0','x','2','6',',','0','x','0','0',EOL,
+        /*  871 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','6','B','?','_','_',' ','0','x','8','d',',','0','x','b','6',',','0','x','0','0',',','0','x','0','0',',','0','x','0','0',',','0','x','0','0',EOL,
+        /*  923 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','7','B','?','_','_',' ','0','x','8','d',',','0','x','b','4',',','0','x','2','6',',','0','x','0','0',',','0','x','0','0',',','0','x','0','0',',','0','x','0','0',EOL,
+        /*  980 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','G','R','O','U','P','?','_','_',' ','7',EOL,
+        /* 1007 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','1','B','?','_','_',' ','0','x','9','0',EOL,
+        /* 1034 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','2','B','?','_','_',' ','0','x','6','6',',','0','x','9','0',EOL,
+        /* 1066 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','3','B','?','_','_',' ','0','x','6','6',',','0','x','6','6',',','0','x','9','0',EOL,
+        /* 1103 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','4','B','?','_','_',' ','0','x','6','6',',','0','x','6','6',',','0','x','6','6',',','0','x','9','0',EOL,
+        /* 1145 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','G','R','O','U','P','?','_','_',' ','4',EOL,
+        /* 1172 */ p_elifidni,'%','1',',','k','8',EOL,
+        /* 1179 */ p_define,'_','_','?','A','L','I','G','N','_','J','M','P','_','T','H','R','E','S','H','O','L','D','?','_','_',' ','1','6',EOL,
+        /* 1209 */ p_define,'_','_','?','A','L','I','G','N','_','1','6','B','I','T','_','1','B','?','_','_',' ','0','x','9','0',EOL,
+        /* 1236 */ p_define,'_','_','?','A','L','I','G','N','_','1','6','B','I','T','_','2','B','?','_','_',' ','0','x','6','6',',','0','x','9','0',EOL,
+        /* 1268 */ p_define,'_','_','?','A','L','I','G','N','_','1','6','B','I','T','_','3','B','?','_','_',' ','0','x','6','6',',','0','x','6','6',',','0','x','9','0',EOL,
+        /* 1305 */ p_define,'_','_','?','A','L','I','G','N','_','1','6','B','I','T','_','4','B','?','_','_',' ','0','x','6','6',',','0','x','6','6',',','0','x','6','6',',','0','x','9','0',EOL,
+        /* 1347 */ p_define,'_','_','?','A','L','I','G','N','_','1','6','B','I','T','_','G','R','O','U','P','?','_','_',' ','4',EOL,
+        /* 1374 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','1','B','?','_','_',' ','0','x','9','0',EOL,
+        /* 1401 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','2','B','?','_','_',' ','0','x','6','6',',','0','x','9','0',EOL,
+        /* 1433 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','3','B','?','_','_',' ','0','x','6','6',',','0','x','6','6',',','0','x','9','0',EOL,
+        /* 1470 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','4','B','?','_','_',' ','0','x','6','6',',','0','x','6','6',',','0','x','6','6',',','0','x','9','0',EOL,
+        /* 1512 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','G','R','O','U','P','?','_','_',' ','4',EOL,
+        /* 1539 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','1','B','?','_','_',' ','0','x','9','0',EOL,
+        /* 1566 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','2','B','?','_','_',' ','0','x','6','6',',','0','x','9','0',EOL,
+        /* 1598 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','3','B','?','_','_',' ','0','x','6','6',',','0','x','6','6',',','0','x','9','0',EOL,
+        /* 1635 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','4','B','?','_','_',' ','0','x','6','6',',','0','x','6','6',',','0','x','6','6',',','0','x','9','0',EOL,
+        /* 1677 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','G','R','O','U','P','?','_','_',' ','4',EOL,
+        /* 1704 */ p_elifidni,'%','1',',','k','7',EOL,
+        /* 1711 */ p_define,'_','_','?','A','L','I','G','N','_','J','M','P','_','T','H','R','E','S','H','O','L','D','?','_','_',' ','1','6',EOL,
+        /* 1741 */ p_define,'_','_','?','A','L','I','G','N','_','1','6','B','I','T','_','1','B','?','_','_',' ','0','x','9','0',EOL,
+        /* 1768 */ p_define,'_','_','?','A','L','I','G','N','_','1','6','B','I','T','_','2','B','?','_','_',' ','0','x','6','6',',','0','x','9','0',EOL,
+        /* 1800 */ p_define,'_','_','?','A','L','I','G','N','_','1','6','B','I','T','_','3','B','?','_','_',' ','0','x','6','6',',','0','x','6','6',',','0','x','9','0',EOL,
+        /* 1837 */ p_define,'_','_','?','A','L','I','G','N','_','1','6','B','I','T','_','4','B','?','_','_',' ','0','x','6','6',',','0','x','6','6',',','0','x','6','6',',','0','x','9','0',EOL,
+        /* 1879 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','G','R','O','U','P','?','_','_',' ','4',EOL,
+        /* 1906 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','1','B','?','_','_',' ','0','x','9','0',EOL,
+        /* 1933 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','2','B','?','_','_',' ','0','x','8','b',',','0','x','c','0',EOL,
+        /* 1965 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','3','B','?','_','_',' ','0','x','8','d',',','0','x','0','4',',','0','x','2','0',EOL,
+        /* 2002 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','4','B','?','_','_',' ','0','x','8','d',',','0','x','4','4',',','0','x','2','0',',','0','x','0','0',EOL,
+        /* 2044 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','5','B','?','_','_',' ','0','x','8','d',',','0','x','4','4',',','0','x','2','0',',','0','x','0','0',',','0','x','9','0',EOL,
+        /* 2091 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','6','B','?','_','_',' ','0','x','8','d',',','0','x','8','0',',','0','x','0','0',',','0','x','0','0',',','0','x','0','0',',','0','x','0','0',EOL,
+        /* 2143 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','7','B','?','_','_',' ','0','x','8','d',',','0','x','0','4',',','0','x','0','5',',','0','x','0','0',',','0','x','0','0',',','0','x','0','0',',','0','x','0','0',EOL,
+        /* 2200 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','G','R','O','U','P','?','_','_',' ','7',EOL,
+        /* 2227 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','1','B','?','_','_',' ','0','x','9','0',EOL,
+        /* 2254 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','2','B','?','_','_',' ','0','x','6','6',',','0','x','9','0',EOL,
+        /* 2286 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','3','B','?','_','_',' ','0','x','6','6',',','0','x','6','6',',','0','x','9','0',EOL,
+        /* 2323 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','4','B','?','_','_',' ','0','x','6','6',',','0','x','6','6',',','0','x','6','6',',','0','x','9','0',EOL,
+        /* 2365 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','G','R','O','U','P','?','_','_',' ','4',EOL,
+        /* 2392 */ p_elifidni,'%','1',',','p','6',EOL,
+        /* 2399 */ p_define,'_','_','?','A','L','I','G','N','_','J','M','P','_','T','H','R','E','S','H','O','L','D','?','_','_',' ','1','6',EOL,
+        /* 2429 */ p_define,'_','_','?','A','L','I','G','N','_','1','6','B','I','T','_','1','B','?','_','_',' ','0','x','9','0',EOL,
+        /* 2456 */ p_define,'_','_','?','A','L','I','G','N','_','1','6','B','I','T','_','2','B','?','_','_',' ','0','x','6','6',',','0','x','9','0',EOL,
+        /* 2488 */ p_define,'_','_','?','A','L','I','G','N','_','1','6','B','I','T','_','3','B','?','_','_',' ','0','x','0','f',',','0','x','1','f',',','0','x','0','0',EOL,
+        /* 2525 */ p_define,'_','_','?','A','L','I','G','N','_','1','6','B','I','T','_','4','B','?','_','_',' ','0','x','0','f',',','0','x','1','f',',','0','x','4','0',',','0','x','0','0',EOL,
+        /* 2567 */ p_define,'_','_','?','A','L','I','G','N','_','1','6','B','I','T','_','G','R','O','U','P','?','_','_',' ','4',EOL,
+        /* 2594 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','1','B','?','_','_',' ','0','x','9','0',EOL,
+        /* 2621 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','2','B','?','_','_',' ','0','x','6','6',',','0','x','9','0',EOL,
+        /* 2653 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','3','B','?','_','_',' ','0','x','0','f',',','0','x','1','f',',','0','x','0','0',EOL,
+        /* 2690 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','4','B','?','_','_',' ','0','x','0','f',',','0','x','1','f',',','0','x','4','0',',','0','x','0','0',EOL,
+        /* 2732 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','5','B','?','_','_',' ','0','x','0','f',',','0','x','1','f',',','0','x','4','4',',','0','x','0','0',',','0','x','0','0',EOL,
+        /* 2779 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','6','B','?','_','_',' ','0','x','6','6',',','0','x','0','f',',','0','x','1','f',',','0','x','4','4',',','0','x','0','0',',','0','x','0','0',EOL,
+        /* 2831 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','7','B','?','_','_',' ','0','x','0','f',',','0','x','1','f',',','0','x','8','0',',','0','x','0','0',',','0','x','0','0',',','0','x','0','0',',','0','x','0','0',EOL,
+        /* 2888 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','8','B','?','_','_',' ','0','x','0','f',',','0','x','1','f',',','0','x','8','4',',','0','x','0','0',',','0','x','0','0',',','0','x','0','0',',','0','x','0','0',',','0','x','0','0',EOL,
+        /* 2950 */ p_define,'_','_','?','A','L','I','G','N','_','3','2','B','I','T','_','G','R','O','U','P','?','_','_',' ','8',EOL,
+        /* 2977 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','1','B','?','_','_',' ','0','x','9','0',EOL,
+        /* 3004 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','2','B','?','_','_',' ','0','x','6','6',',','0','x','9','0',EOL,
+        /* 3036 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','3','B','?','_','_',' ','0','x','0','f',',','0','x','1','f',',','0','x','0','0',EOL,
+        /* 3073 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','4','B','?','_','_',' ','0','x','0','f',',','0','x','1','f',',','0','x','4','0',',','0','x','0','0',EOL,
+        /* 3115 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','5','B','?','_','_',' ','0','x','0','f',',','0','x','1','f',',','0','x','4','4',',','0','x','0','0',',','0','x','0','0',EOL,
+        /* 3162 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','6','B','?','_','_',' ','0','x','6','6',',','0','x','0','f',',','0','x','1','f',',','0','x','4','4',',','0','x','0','0',',','0','x','0','0',EOL,
+        /* 3214 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','7','B','?','_','_',' ','0','x','0','f',',','0','x','1','f',',','0','x','8','0',',','0','x','0','0',',','0','x','0','0',',','0','x','0','0',',','0','x','0','0',EOL,
+        /* 3271 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','8','B','?','_','_',' ','0','x','0','f',',','0','x','1','f',',','0','x','8','4',',','0','x','0','0',',','0','x','0','0',',','0','x','0','0',',','0','x','0','0',',','0','x','0','0',EOL,
+        /* 3333 */ p_define,'_','_','?','A','L','I','G','N','_','6','4','B','I','T','_','G','R','O','U','P','?','_','_',' ','8',EOL,
+        /* 3360 */ p_else,EOL,
+        /* 3362 */ p_error,'u','n','k','n','o','w','n',' ','a','l','i','g','n','m','e','n','t',' ','m','o','d','e',':',' ','%','1',EOL,
+        /* 3390 */ p_endif,EOL,
+        /* 3392 */ p_ifnempty,'%','2',EOL,
+        /* 3396 */ p_ifidni,'%','2',',','n','o','j','m','p',EOL,
+        /* 3406 */ p_xdefine,'_','_','?','A','L','I','G','N','_','J','M','P','_','T','H','R','E','S','H','O','L','D','?','_','_',' ','-','1',EOL,
+        /* 3436 */ p_else,EOL,
+        /* 3438 */ p_xdefine,'_','_','?','A','L','I','G','N','_','J','M','P','_','T','H','R','E','S','H','O','L','D','?','_','_',' ','%','2',EOL,
+        /* 3468 */ p_endif,EOL,
+        /* 3470 */ p_endif,EOL,
+        /* 3472 */ p_xdefine,'_','_','?','A','L','I','G','N','M','O','D','E','?','_','_',' ','%','1',',','_','_','?','A','L','I','G','N','_','J','M','P','_','T','H','R','E','S','H','O','L','D','?','_','_',EOL,
+        /* 3518 */ p_endmacro,EOL,
+        /* 3520 */ p_defalias,'_','_','A','L','I','G','N','M','O','D','E','_','_',' ','_','_','?','A','L','I','G','N','M','O','D','E','?','_','_',EOL,
+        /* 3551 */ p_unimacro,'a','l','i','g','n',' ','1','-','2','+','.','n','o','l','i','s','t',EOL,
+        /* 3570 */ p_imacro,'a','l','i','g','n',' ','1','-','2','+','.','n','o','l','i','s','t',EOL,
+        /* 3589 */ 's','e','c','t','a','l','i','g','n',' ','%','1',EOL,
+        /* 3602 */ p_ifnempty,'%','2',EOL,
+        /* 3606 */ 't','i','m','e','s',' ','(','(','(','%','1',')',' ','-',' ','(','(','$','-','$','$',')',' ','%',' ','(','%','1',')',')',')',' ','%',' ','(','%','1',')',')',' ','%','2',EOL,
+        /* 3649 */ p_elif,'_','_','?','P','A','S','S','?','_','_',' ','=','=',' ','0',' ','|','|',' ','_','_','?','P','A','S','S','?','_','_',' ','=','=',' ','3',EOL,
+        /* 3685 */ 't','i','m','e','s',' ','(','(','(','%','1',')',' ','-',' ','(','(','$','-','$','$',')',' ','%',' ','(','%','1',')',')',')',' ','%',' ','(','%','1',')',')',' ','n','o','p',EOL,
+        /* 3729 */ p_else,EOL,
+        /* 3731 */ p_push,EOL,
+        /* 3733 */ p_assign,'%','$','p','a','d',' ','(','(','(','%','1',')',' ','-',' ','(','(','$','-','$','$',')',' ','%',' ','(','%','1',')',')',')',' ','%',' ','(','%','1',')',')',EOL,
+        /* 3774 */ p_if,'_','_','?','A','L','I','G','N','_','J','M','P','_','T','H','R','E','S','H','O','L','D','?','_','_',' ','!','=',' ','-','1',' ','&','&',' ','%','$','p','a','d',' ','>',' ','_','_','?','A','L','I','G','N','_','J','M','P','_','T','H','R','E','S','H','O','L','D','?','_','_',EOL,
+        /* 3844 */ 'j','m','p',' ','%','$','e','n','d',EOL,
+        /* 3854 */ 't','i','m','e','s',' ','(','(','(','%','1',')',' ','-',' ','(','(','$','-','$','$',')',' ','%',' ','(','%','1',')',')',')',' ','%',' ','(','%','1',')',')',' ','n','o','p',EOL,
+        /* 3898 */ p_else,EOL,
+        /* 3900 */ 't','i','m','e','s',' ','(','%','$','p','a','d',' ','/',' ','_','_','?','A','L','I','G','N','_','%','','_','_','?','B','I','T','S','?','_','_','','B','I','T','_','G','R','O','U','P','?','_','_',')',' ','d','b',' ','_','_','?','A','L','I','G','N','_','%','','_','_','?','B','I','T','S','?','_','_','','B','I','T','_','%','','_','_','?','A','L','I','G','N','_','%','','_','_','?','B','I','T','S','?','_','_','','B','I','T','_','G','R','O','U','P','?','_','_','','B','?','_','_',EOL,
+        /* 4022 */ p_assign,'%','$','p','a','d',' ','%','$','p','a','d',' ','%',' ','_','_','?','A','L','I','G','N','_','%','','_','_','?','B','I','T','S','?','_','_','','B','I','T','_','G','R','O','U','P','?','_','_',EOL,
+        /* 4072 */ p_if,'%','$','p','a','d',' ','>',' ','0',EOL,
+        /* 4083 */ 'd','b',' ','_','_','?','A','L','I','G','N','_','%','','_','_','?','B','I','T','S','?','_','_','','B','I','T','_','%','','%','$','p','a','d','','B','?','_','_',EOL,
+        /* 4125 */ p_endif,EOL,
+        /* 4127 */ p_endif,EOL,
+        /* 4129 */ '%','$','e','n','d',':',EOL,
+        /* 4136 */ p_pop,EOL,
+        /* 4138 */ p_endif,EOL,
+        /* 4140 */ p_endmacro,EOL,
+        /* 4142 */ 'a','l','i','g','n','m','o','d','e',' ','g','e','n','e','r','i','c',EOL,
+        /* 4160 */ EOL
+};
+#endif
+
+#if 1
+const unsigned char nasm_stdmac_tasm = {
+    /* From ./macros/standard.mac */
+        /*    0 */ p_idefine,'I','D','E','A','L',EOL,
+        /*    7 */ p_idefine,'J','U','M','P','S',EOL,
+        /*   14 */ p_idefine,'P','3','8','6',EOL,
+        /*   20 */ p_idefine,'P','4','8','6',EOL,
+        /*   26 */ p_idefine,'P','5','8','6',EOL,
+        /*   32 */ p_idefine,'E','N','D',EOL,
+        /*   37 */ EOL
+};
+#endif
+
+#if 1
+const unsigned char nasm_stdmac_nasm = {
+    /* From ./macros/standard.mac */
+        /*    0 */ p_define,'_','_','?','S','E','C','T','?','_','_',EOL,
+        /*   12 */ p_defalias,'_','_','S','E','C','T','_','_',' ','_','_','?','S','E','C','T','?','_','_',EOL,
+        /*   33 */ p_imacro,'s','e','c','t','i','o','n',' ','1','+','.','n','o','l','i','s','t',EOL,
+        /*   52 */ p_define,'_','_','?','S','E','C','T','?','_','_',' ','','s','e','c','t','i','o','n',' ','%','1','',EOL,
+        /*   77 */ '_','_','?','S','E','C','T','?','_','_',EOL,
+        /*   88 */ p_endmacro,EOL,
+        /*   90 */ p_imacro,'s','e','g','m','e','n','t',' ','1','+','.','n','o','l','i','s','t',EOL,
+        /*  109 */ p_define,'_','_','?','S','E','C','T','?','_','_',' ','','s','e','g','m','e','n','t',' ','%','1','',EOL,
+        /*  134 */ '_','_','?','S','E','C','T','?','_','_',EOL,
+        /*  145 */ p_endmacro,EOL,
+        /*  147 */ p_define,'_','_','?','S','E','C','T','A','L','I','G','N','_','A','L','I','G','N','_','U','P','D','A','T','E','S','_','S','E','C','T','I','O','N','?','_','_',' ','1',EOL,
+        /*  188 */ p_imacro,'s','e','c','t','a','l','i','g','n',' ','1','+','.','n','o','l','i','s','t',EOL,
+        /*  209 */ p_ifidni,'%','1',',','o','f','f',EOL,
+        /*  217 */ p_define,'_','_','?','S','E','C','T','A','L','I','G','N','_','A','L','I','G','N','_','U','P','D','A','T','E','S','_','S','E','C','T','I','O','N','?','_','_',' ','0',EOL,
+        /*  258 */ p_elifidni,'%','1',',','o','n',EOL,
+        /*  265 */ p_define,'_','_','?','S','E','C','T','A','L','I','G','N','_','A','L','I','G','N','_','U','P','D','A','T','E','S','_','S','E','C','T','I','O','N','?','_','_',' ','1',EOL,
+        /*  306 */ p_else,EOL,
+        /*  308 */ '','s','e','c','t','a','l','i','g','n',' ','%','1','',EOL,
+        /*  323 */ p_endif,EOL,
+        /*  325 */ p_endmacro,EOL,
+        /*  327 */ p_defalias,'_','_','S','E','C','T','A','L','I','G','N','_','A','L','I','G','N','_','U','P','D','A','T','E','S','_','S','E','C','T','I','O','N','_','_',' ','_','_','?','S','E','C','T','A','L','I','G','N','_','A','L','I','G','N','_','U','P','D','A','T','E','S','_','S','E','C','T','I','O','N','?','_','_',EOL,
+        /*  402 */ p_imacro,'a','b','s','o','l','u','t','e',' ','1','+','.','n','o','l','i','s','t',EOL,
+        /*  422 */ p_define,'_','_','?','S','E','C','T','?','_','_',' ','','a','b','s','o','l','u','t','e',' ','%','1','',EOL,
+        /*  448 */ '_','_','?','S','E','C','T','?','_','_',EOL,
+        /*  459 */ p_endmacro,EOL,
+        /*  461 */ p_imacro,'s','t','r','u','c',' ','1','-','2','.','n','o','l','i','s','t',' ','0',EOL,
+        /*  481 */ p_push,EOL,
+        /*  483 */ p_define,'%','$','s','t','r','u','c','n','a','m','e',' ','%','1',EOL,
+        /*  499 */ '','a','b','s','o','l','u','t','e',' ','%','2','',EOL,
+        /*  513 */ '%','$','s','t','r','u','c','n','a','m','e',':',EOL,
+        /*  526 */ p_endmacro,EOL,
+        /*  528 */ p_imacro,'e','n','d','s','t','r','u','c',' ','0','.','n','o','l','i','s','t',EOL,
+        /*  547 */ '%','{','$','s','t','r','u','c','n','a','m','e','}','_','s','i','z','e',' ','e','q','u',' ','(','$','-','%','$','s','t','r','u','c','n','a','m','e',')',EOL,
+        /*  586 */ p_pop,EOL,
+        /*  588 */ '_','_','?','S','E','C','T','?','_','_',EOL,
+        /*  599 */ p_endmacro,EOL,
+        /*  601 */ p_imacro,'i','s','t','r','u','c',' ','1','.','n','o','l','i','s','t',EOL,
+        /*  618 */ p_push,EOL,
+        /*  620 */ p_define,'%','$','s','t','r','u','c','n','a','m','e',' ','%','1',EOL,
+        /*  636 */ '%','$','s','t','r','u','c','s','t','a','r','t',':',EOL,
+        /*  650 */ p_endmacro,EOL,
+        /*  652 */ p_imacro,'a','t',' ','1','-','2','+','.','n','o','l','i','s','t',EOL,
+        /*  668 */ p_defstr,'%','$','m','e','m','b','e','r',' ','%','1',EOL,
+        /*  681 */ p_substr,'%','$','m','e','m','b','e','r','1',' ','%','$','m','e','m','b','e','r',' ','1',EOL,
+        /*  703 */ p_ifidn,'%','$','m','e','m','b','e','r','1',',',' ','\'','.','\'',EOL,
+        /*  719 */ 't','i','m','e','s',' ','(','%','$','s','t','r','u','c','n','a','m','e','%','1','-','%','$','s','t','r','u','c','n','a','m','e',')','-','(','$','-','%','$','s','t','r','u','c','s','t','a','r','t',')',' ','d','b',' ','0',EOL,
+        /*  775 */ p_else,EOL,
+        /*  777 */ 't','i','m','e','s',' ','(','%','1','-','%','$','s','t','r','u','c','n','a','m','e',')','-','(','$','-','%','$','s','t','r','u','c','s','t','a','r','t',')',' ','d','b',' ','0',EOL,
+        /*  822 */ p_endif,EOL,
+        /*  824 */ '%','2',EOL,
+        /*  827 */ p_endmacro,EOL,
+        /*  829 */ p_imacro,'i','e','n','d',' ','0','.','n','o','l','i','s','t',EOL,
+        /*  844 */ 't','i','m','e','s',' ','%','{','$','s','t','r','u','c','n','a','m','e','}','_','s','i','z','e','-','(','$','-','%','$','s','t','r','u','c','s','t','a','r','t',')',' ','d','b',' ','0',EOL,
+        /*  891 */ p_pop,EOL,
+        /*  893 */ p_endmacro,EOL,
+        /*  895 */ p_imacro,'a','l','i','g','n',' ','1','-','2','+','.','n','o','l','i','s','t',' ','n','o','p',EOL,
+        /*  918 */ p_if,'_','_','?','S','E','C','T','A','L','I','G','N','_','A','L','I','G','N','_','U','P','D','A','T','E','S','_','S','E','C','T','I','O','N','?','_','_',EOL,
+        /*  957 */ 's','e','c','t','a','l','i','g','n',' ','%','1',EOL,
+        /*  970 */ p_endif,EOL,
+        /*  972 */ 't','i','m','e','s',' ','(','(','(','%','1',')',' ','-',' ','(','(','$','-','$','$',')',' ','%',' ','(','%','1',')',')',')',' ','%',' ','(','%','1',')',')',' ','%','2',EOL,
+        /* 1015 */ p_endmacro,EOL,
+        /* 1017 */ p_imacro,'a','l','i','g','n','b',' ','1','-','2','+','.','n','o','l','i','s','t',EOL,
+        /* 1037 */ p_if,'_','_','?','S','E','C','T','A','L','I','G','N','_','A','L','I','G','N','_','U','P','D','A','T','E','S','_','S','E','C','T','I','O','N','?','_','_',EOL,
+        /* 1076 */ 's','e','c','t','a','l','i','g','n',' ','%','1',EOL,
+        /* 1089 */ p_endif,EOL,
+        /* 1091 */ p_ifempty,'%','2',EOL,
+        /* 1095 */ '','w','a','r','n','i','n','g',' ','p','u','s','h','',EOL,
+        /* 1110 */ '','w','a','r','n','i','n','g',' ','-','z','e','r','o','i','n','g','',EOL,
+        /* 1129 */ 'r','e','s','b',' ','(','(','(','%','1',')',' ','-',' ','(','(','$','-','$','$',')',' ','%',' ','(','%','1',')',')',')',' ','%',' ','(','%','1',')',')',EOL,
+        /* 1168 */ '','w','a','r','n','i','n','g',' ','p','o','p','',EOL,
+        /* 1182 */ p_else,EOL,
+        /* 1184 */ 't','i','m','e','s',' ','(','(','(','%','1',')',' ','-',' ','(','(','$','-','$','$',')',' ','%',' ','(','%','1',')',')',')',' ','%',' ','(','%','1',')',')',' ','%','2',EOL,
+        /* 1227 */ p_endif,EOL,
+        /* 1229 */ p_endmacro,EOL,
+        /* 1231 */ p_imacro,'b','i','t','s',' ','1','+','.','n','o','l','i','s','t',EOL,
+        /* 1247 */ '','b','i','t','s',' ','%','1','',EOL,
+        /* 1257 */ p_endmacro,EOL,
+        /* 1259 */ p_imacro,'u','s','e','1','6',' ','0','.','n','o','l','i','s','t',EOL,
+        /* 1275 */ '','b','i','t','s',' ','1','6','',EOL,
+        /* 1285 */ p_endmacro,EOL,
+        /* 1287 */ p_imacro,'u','s','e','3','2',' ','0','.','n','o','l','i','s','t',EOL,
+        /* 1303 */ '','b','i','t','s',' ','3','2','',EOL,
+        /* 1313 */ p_endmacro,EOL,
+        /* 1315 */ p_imacro,'u','s','e','6','4',' ','0','.','n','o','l','i','s','t',EOL,
+        /* 1331 */ '','b','i','t','s',' ','6','4','',EOL,
+        /* 1341 */ p_endmacro,EOL,
+        /* 1343 */ p_imacro,'e','x','t','e','r','n',' ','1','-','*','.','n','o','l','i','s','t',EOL,
+        /* 1362 */ p_rep,'%','0',EOL,
+        /* 1366 */ '','e','x','t','e','r','n',' ','%','1','',EOL,
+        /* 1378 */ p_rotate,'1',EOL,
+        /* 1381 */ p_endrep,EOL,
+        /* 1383 */ p_endmacro,EOL,
+        /* 1385 */ p_imacro,'s','t','a','t','i','c',' ','1','-','*','.','n','o','l','i','s','t',EOL,
+        /* 1404 */ p_rep,'%','0',EOL,
+        /* 1408 */ '','s','t','a','t','i','c',' ','%','1','',EOL,
+        /* 1420 */ p_rotate,'1',EOL,
+        /* 1423 */ p_endrep,EOL,
+        /* 1425 */ p_endmacro,EOL,
+        /* 1427 */ p_imacro,'g','l','o','b','a','l',' ','1','-','*','.','n','o','l','i','s','t',EOL,
+        /* 1446 */ p_rep,'%','0',EOL,
+        /* 1450 */ '','g','l','o','b','a','l',' ','%','1','',EOL,
+        /* 1462 */ p_rotate,'1',EOL,
+        /* 1465 */ p_endrep,EOL,
+        /* 1467 */ p_endmacro,EOL,
+        /* 1469 */ p_imacro,'r','e','q','u','i','r','e','d',' ','1','-','*','.','n','o','l','i','s','t',EOL,
+        /* 1490 */ p_rep,'%','0',EOL,
+        /* 1494 */ '','r','e','q','u','i','r','e','d',' ','%','1','',EOL,
+        /* 1508 */ p_rotate,'1',EOL,
+        /* 1511 */ p_endrep,EOL,
+        /* 1513 */ p_endmacro,EOL,
+        /* 1515 */ p_imacro,'c','o','m','m','o','n',' ','1','-','*','.','n','o','l','i','s','t',EOL,
+        /* 1534 */ p_rep,'%','0',EOL,
+        /* 1538 */ '','c','o','m','m','o','n',' ','%','1','',EOL,
+        /* 1550 */ p_rotate,'1',EOL,
+        /* 1553 */ p_endrep,EOL,
+        /* 1555 */ p_endmacro,EOL,
+        /* 1557 */ p_imacro,'c','p','u',' ','1','+','.','n','o','l','i','s','t',EOL,
+        /* 1572 */ '','c','p','u',' ','%','1','',EOL,
+        /* 1581 */ p_endmacro,EOL,
+        /* 1583 */ p_define,'_','_','?','F','L','O','A','T','_','D','A','Z','?','_','_',' ','n','o','d','a','z',EOL,
+        /* 1606 */ p_define,'_','_','?','F','L','O','A','T','_','R','O','U','N','D','?','_','_',' ','n','e','a','r',EOL,
+        /* 1630 */ p_define,'_','_','?','F','L','O','A','T','?','_','_',' ','_','_','?','F','L','O','A','T','_','D','A','Z','?','_','_',',','_','_','?','F','L','O','A','T','_','R','O','U','N','D','?','_','_',EOL,
+        /* 1677 */ p_defalias,'_','_','F','L','O','A','T','_','D','A','Z','_','_',' ','_','_','?','F','L','O','A','T','_','D','A','Z','?','_','_',EOL,
+        /* 1708 */ p_defalias,'_','_','F','L','O','A','T','_','R','O','U','N','D','_','_',' ','_','_','?','F','L','O','A','T','_','R','O','U','N','D','?','_','_',EOL,
+        /* 1743 */ p_defalias,'_','_','F','L','O','A','T','_','_',' ','_','_','?','F','L','O','A','T','?','_','_',EOL,
+        /* 1766 */ p_imacro,'f','l','o','a','t',' ','1','-','*','.','n','o','l','i','s','t',EOL,
+        /* 1784 */ p_rep,'%','0',EOL,
+        /* 1788 */ '','f','l','o','a','t',' ','%','1','',EOL,
+        /* 1799 */ p_ifidni,'%','1',',','d','a','z',EOL,
+        /* 1807 */ p_define,'_','_','?','F','L','O','A','T','_','D','A','Z','?','_','_',' ','d','a','z',EOL,
+        /* 1828 */ p_elifidni,'%','1',',','n','o','d','a','z',EOL,
+        /* 1838 */ p_define,'_','_','?','F','L','O','A','T','_','D','A','Z','?','_','_',' ','n','o','d','a','z',EOL,
+        /* 1861 */ p_elifidni,'%','1',',','n','e','a','r',EOL,
+        /* 1870 */ p_define,'_','_','?','F','L','O','A','T','_','R','O','U','N','D','?','_','_',' ','n','e','a','r',EOL,
+        /* 1894 */ p_elifidni,'%','1',',','u','p',EOL,
+        /* 1901 */ p_define,'_','_','?','F','L','O','A','T','_','R','O','U','N','D','?','_','_',' ','u','p',EOL,
+        /* 1923 */ p_elifidni,'%','1',',','d','o','w','n',EOL,
+        /* 1932 */ p_define,'_','_','?','F','L','O','A','T','_','R','O','U','N','D','?','_','_',' ','d','o','w','n',EOL,
+        /* 1956 */ p_elifidni,'%','1',',','z','e','r','o',EOL,
+        /* 1965 */ p_define,'_','_','?','F','L','O','A','T','_','R','O','U','N','D','?','_','_',' ','z','e','r','o',EOL,
+        /* 1989 */ p_elifidni,'%','1',',','d','e','f','a','u','l','t',EOL,
+        /* 2001 */ p_define,'_','_','?','F','L','O','A','T','_','D','A','Z','?','_','_',' ','n','o','d','a','z',EOL,
+        /* 2024 */ p_define,'_','_','?','F','L','O','A','T','_','R','O','U','N','D','?','_','_',' ','n','e','a','r',EOL,
+        /* 2048 */ p_endif,EOL,
+        /* 2050 */ p_rotate,'1',EOL,
+        /* 2053 */ p_endrep,EOL,
+        /* 2055 */ p_endmacro,EOL,
+        /* 2057 */ p_imacro,'d','e','f','a','u','l','t',' ','1','+','.','n','o','l','i','s','t',EOL,
+        /* 2076 */ '','d','e','f','a','u','l','t',' ','%','1','',EOL,
+        /* 2089 */ p_endmacro,EOL,
+        /* 2091 */ p_imacro,'u','s','e','r','e','l',' ','0','.','n','o','l','i','s','t',EOL,
+        /* 2108 */ '','d','e','f','a','u','l','t',' ','r','e','l','',EOL,
+        /* 2122 */ p_endmacro,EOL,
+        /* 2124 */ p_imacro,'u','s','e','a','b','s',' ','0','.','n','o','l','i','s','t',EOL,
+        /* 2141 */ '','d','e','f','a','u','l','t',' ','a','b','s','',EOL,
+        /* 2155 */ p_endmacro,EOL,
+        /* 2157 */ p_imacro,'u','s','e','b','n','d',' ','0','.','n','o','l','i','s','t',EOL,
+        /* 2174 */ '','d','e','f','a','u','l','t',' ','b','n','d','',EOL,
+        /* 2188 */ p_endmacro,EOL,
+        /* 2190 */ p_imacro,'u','s','e','n','o','b','n','d',' ','0','.','n','o','l','i','s','t',EOL,
+        /* 2209 */ '','d','e','f','a','u','l','t',' ','n','o','b','n','d','',EOL,
+        /* 2225 */ p_endmacro,EOL,
+        /* 2227 */ p_imacro,'i','n','c','b','i','n',' ','1','-','2','+','.','n','o','l','i','s','t',' ','0',EOL,
+        /* 2249 */ p_push,EOL,
+        /* 2251 */ p_pathsearch,'%','$','d','e','p',' ','%','1',EOL,
+        /* 2261 */ p_depend,'%','$','d','e','p',EOL,
+        /* 2268 */ '%','?',' ','%','$','d','e','p',',','%','2',EOL,
+        /* 2280 */ p_pop,EOL,
+        /* 2282 */ p_endmacro,EOL,
+        /* 2284 */ p_defalias,'_','_','N','A','S','M','_','M','A','J','O','R','_','_',' ','_','_','?','N','A','S','M','_','M','A','J','O','R','?','_','_',EOL,
+        /* 2317 */ p_defalias,'_','_','N','A','S','M','_','M','I','N','O','R','_','_',' ','_','_','?','N','A','S','M','_','M','I','N','O','R','?','_','_',EOL,
+        /* 2350 */ p_defalias,'_','_','N','A','S','M','_','S','U','B','M','I','N','O','R','_','_',' ','_','_','?','N','A','S','M','_','S','U','B','M','I','N','O','R','?','_','_',EOL,
+        /* 2389 */ p_defalias,'_','_','N','A','S','M','_','P','A','T','C','H','L','E','V','E','L','_','_',' ','_','_','?','N','A','S','M','_','P','A','T','C','H','L','E','V','E','L','?','_','_',EOL,
+        /* 2432 */ p_defalias,'_','_','N','A','S','M','_','S','N','A','P','S','H','O','T','_','_',' ','_','_','?','N','A','S','M','_','S','N','A','P','S','H','O','T','?','_','_',EOL,
+        /* 2471 */ p_defalias,'_','_','N','A','S','M','_','V','E','R','S','I','O','N','_','I','D','_','_',' ','_','_','?','N','A','S','M','_','V','E','R','S','I','O','N','_','I','D','?','_','_',EOL,
+        /* 2514 */ p_defalias,'_','_','N','A','S','M','_','V','E','R','_','_',' ','_','_','?','N','A','S','M','_','V','E','R','?','_','_',EOL,
+        /* 2543 */ p_defalias,'_','_','O','U','T','P','U','T','_','F','O','R','M','A','T','_','_',' ','_','_','?','O','U','T','P','U','T','_','F','O','R','M','A','T','?','_','_',EOL,
+        /* 2582 */ p_defalias,'_','_','D','E','B','U','G','_','F','O','R','M','A','T','_','_',' ','_','_','?','D','E','B','U','G','_','F','O','R','M','A','T','?','_','_',EOL,
+        /* 2619 */ p_defalias,'_','_','D','A','T','E','_','_',' ','_','_','?','D','A','T','E','?','_','_',EOL,
+        /* 2640 */ p_defalias,'_','_','D','A','T','E','_','N','U','M','_','_',' ','_','_','?','D','A','T','E','_','N','U','M','?','_','_',EOL,
+        /* 2669 */ p_defalias,'_','_','T','I','M','E','_','_',' ','_','_','?','T','I','M','E','?','_','_',EOL,
+        /* 2690 */ p_defalias,'_','_','T','I','M','E','_','N','U','M','_','_',' ','_','_','?','T','I','M','E','_','N','U','M','?','_','_',EOL,
+        /* 2719 */ p_defalias,'_','_','U','T','C','_','D','A','T','E','_','_',' ','_','_','?','U','T','C','_','D','A','T','E','?','_','_',EOL,
+        /* 2748 */ p_defalias,'_','_','U','T','C','_','D','A','T','E','_','N','U','M','_','_',' ','_','_','?','U','T','C','_','D','A','T','E','_','N','U','M','?','_','_',EOL,
+        /* 2785 */ p_defalias,'_','_','U','T','C','_','T','I','M','E','_','_',' ','_','_','?','U','T','C','_','T','I','M','E','?','_','_',EOL,
+        /* 2814 */ p_defalias,'_','_','U','T','C','_','T','I','M','E','_','N','U','M','_','_',' ','_','_','?','U','T','C','_','T','I','M','E','_','N','U','M','?','_','_',EOL,
+        /* 2851 */ p_defalias,'_','_','P','O','S','I','X','_','T','I','M','E','_','_',' ','_','_','?','P','O','S','I','X','_','T','I','M','E','?','_','_',EOL,
+        /* 2884 */ p_defalias,'_','_','F','I','L','E','_','_',' ','_','_','?','F','I','L','E','?','_','_',EOL,
+        /* 2905 */ p_defalias,'_','_','L','I','N','E','_','_',' ','_','_','?','L','I','N','E','?','_','_',EOL,
+        /* 2926 */ p_defalias,'_','_','B','I','T','S','_','_',' ','_','_','?','B','I','T','S','?','_','_',EOL,
+        /* 2947 */ p_defalias,'_','_','P','T','R','_','_',' ','_','_','?','P','T','R','?','_','_',EOL,
+        /* 2966 */ p_defalias,'_','_','P','A','S','S','_','_',' ','_','_','?','P','A','S','S','?','_','_',EOL,
+        /* 2987 */ p_idefine,'_','_','?','i','n','f','i','n','i','t','y','?','_','_',' ','%','?',EOL,
+        /* 3006 */ p_idefine,'_','_','?','n','a','n','?','_','_',' ','%','?',EOL,
+        /* 3020 */ p_idefine,'_','_','?','q','n','a','n','?','_','_',' ','%','?',EOL,
+        /* 3035 */ p_idefine,'_','_','?','s','n','a','n','?','_','_',' ','%','?',EOL,
+        /* 3050 */ p_idefine,'_','_','?','f','l','o','a','t','8','?','_','_',' ','%','?',EOL,
+        /* 3067 */ p_idefine,'_','_','?','f','l','o','a','t','1','6','?','_','_',' ','%','?',EOL,
+        /* 3085 */ p_idefine,'_','_','?','f','l','o','a','t','3','2','?','_','_',' ','%','?',EOL,
+        /* 3103 */ p_idefine,'_','_','?','f','l','o','a','t','6','4','?','_','_',' ','%','?',EOL,
+        /* 3121 */ p_idefine,'_','_','?','f','l','o','a','t','8','0','m','?','_','_',' ','%','?',EOL,
+        /* 3140 */ p_idefine,'_','_','?','f','l','o','a','t','8','0','e','?','_','_',' ','%','?',EOL,
+        /* 3159 */ p_idefine,'_','_','?','f','l','o','a','t','1','2','8','l','?','_','_',' ','%','?',EOL,
+        /* 3179 */ p_idefine,'_','_','?','f','l','o','a','t','1','2','8','h','?','_','_',' ','%','?',EOL,
+        /* 3199 */ p_idefine,'_','_','?','u','t','f','1','6','?','_','_',' ','%','?',EOL,
+        /* 3215 */ p_idefine,'_','_','?','u','t','f','1','6','l','e','?','_','_',' ','%','?',EOL,
+        /* 3233 */ p_idefine,'_','_','?','u','t','f','1','6','b','e','?','_','_',' ','%','?',EOL,
+        /* 3251 */ p_idefine,'_','_','?','u','t','f','3','2','?','_','_',' ','%','?',EOL,
+        /* 3267 */ p_idefine,'_','_','?','u','t','f','3','2','l','e','?','_','_',' ','%','?',EOL,
+        /* 3285 */ p_idefine,'_','_','?','u','t','f','3','2','b','e','?','_','_',' ','%','?',EOL,
+        /* 3303 */ p_idefine,'_','_','?','i','l','o','g','2','e','?','_','_',' ','%','?',EOL,
+        /* 3320 */ p_idefine,'_','_','?','i','l','o','g','2','w','?','_','_',' ','%','?',EOL,
+        /* 3337 */ p_idefine,'_','_','?','i','l','o','g','2','f','?','_','_',' ','%','?',EOL,
+        /* 3354 */ p_idefine,'_','_','?','i','l','o','g','2','c','?','_','_',' ','%','?',EOL,
+        /* 3371 */ p_idefalias,'_','_','i','n','f','i','n','i','t','y','_','_',' ','_','_','?','i','n','f','i','n','i','t','y','?','_','_',EOL,
+        /* 3400 */ p_idefalias,'_','_','n','a','n','_','_',' ','_','_','?','n','a','n','?','_','_',EOL,
+        /* 3419 */ p_idefalias,'_','_','q','n','a','n','_','_',' ','_','_','?','q','n','a','n','?','_','_',EOL,
+        /* 3440 */ p_idefalias,'_','_','s','n','a','n','_','_',' ','_','_','?','s','n','a','n','?','_','_',EOL,
+        /* 3461 */ p_idefalias,'_','_','f','l','o','a','t','8','_','_',' ','_','_','?','f','l','o','a','t','8','?','_','_',EOL,
+        /* 3486 */ p_idefalias,'_','_','f','l','o','a','t','1','6','_','_',' ','_','_','?','f','l','o','a','t','1','6','?','_','_',EOL,
+        /* 3513 */ p_idefalias,'_','_','f','l','o','a','t','3','2','_','_',' ','_','_','?','f','l','o','a','t','3','2','?','_','_',EOL,
+        /* 3540 */ p_idefalias,'_','_','f','l','o','a','t','6','4','_','_',' ','_','_','?','f','l','o','a','t','6','4','?','_','_',EOL,
+        /* 3567 */ p_idefalias,'_','_','f','l','o','a','t','8','0','m','_','_',' ','_','_','?','f','l','o','a','t','8','0','m','?','_','_',EOL,
+        /* 3596 */ p_idefalias,'_','_','f','l','o','a','t','8','0','e','_','_',' ','_','_','?','f','l','o','a','t','8','0','e','?','_','_',EOL,
+        /* 3625 */ p_idefalias,'_','_','f','l','o','a','t','1','2','8','l','_','_',' ','_','_','?','f','l','o','a','t','1','2','8','l','?','_','_',EOL,
+        /* 3656 */ p_idefalias,'_','_','f','l','o','a','t','1','2','8','h','_','_',' ','_','_','?','f','l','o','a','t','1','2','8','h','?','_','_',EOL,
+        /* 3687 */ p_idefalias,'_','_','u','t','f','1','6','_','_',' ','_','_','?','u','t','f','1','6','?','_','_',EOL,
+        /* 3710 */ p_idefalias,'_','_','u','t','f','1','6','l','e','_','_',' ','_','_','?','u','t','f','1','6','l','e','?','_','_',EOL,
+        /* 3737 */ p_idefalias,'_','_','u','t','f','1','6','b','e','_','_',' ','_','_','?','u','t','f','1','6','b','e','?','_','_',EOL,
+        /* 3764 */ p_idefalias,'_','_','u','t','f','3','2','_','_',' ','_','_','?','u','t','f','3','2','?','_','_',EOL,
+        /* 3787 */ p_idefalias,'_','_','u','t','f','3','2','l','e','_','_',' ','_','_','?','u','t','f','3','2','l','e','?','_','_',EOL,
+        /* 3814 */ p_idefalias,'_','_','u','t','f','3','2','b','e','_','_',' ','_','_','?','u','t','f','3','2','b','e','?','_','_',EOL,
+        /* 3841 */ p_idefalias,'_','_','i','l','o','g','2','e','_','_',' ','_','_','?','i','l','o','g','2','e','?','_','_',EOL,
+        /* 3866 */ p_idefalias,'_','_','i','l','o','g','2','w','_','_',' ','_','_','?','i','l','o','g','2','w','?','_','_',EOL,
+        /* 3891 */ p_idefalias,'_','_','i','l','o','g','2','f','_','_',' ','_','_','?','i','l','o','g','2','f','?','_','_',EOL,
+        /* 3916 */ p_idefalias,'_','_','i','l','o','g','2','c','_','_',' ','_','_','?','i','l','o','g','2','c','?','_','_',EOL,
+        /* 3941 */ EOL
+};
+#endif
+
+#if defined(OF_AOUT) || defined(OF_AOUTB)
+const unsigned char aout_stdmac = {
+    /* From ./output/outaout.mac */
+        /*    0 */ p_define,'_','_','?','S','E','C','T','?','_','_',' ','','s','e','c','t','i','o','n',' ','.','t','e','x','t','',EOL,
+        /*   28 */ p_macro,'_','_','?','N','A','S','M','_','C','D','e','c','l','?','_','_',' ','1',EOL,
+        /*   48 */ p_endmacro,EOL,
+        /*   50 */ EOL
+};
+#endif
+
+#if defined(OF_AS86)
+const unsigned char as86_stdmac = {
+    /* From ./output/outas86.mac */
+        /*    0 */ p_define,'_','_','?','S','E','C','T','?','_','_',' ','','s','e','c','t','i','o','n',' ','.','t','e','x','t','',EOL,
+        /*   28 */ p_macro,'_','_','?','N','A','S','M','_','C','D','e','c','l','?','_','_',' ','1',EOL,
+        /*   48 */ p_endmacro,EOL,
+        /*   50 */ EOL
+};
+#endif
+
+#if defined(OF_BIN)
+const unsigned char bin_stdmac = {
+    /* From ./output/outbin.mac */
+        /*    0 */ p_define,'_','_','?','S','E','C','T','?','_','_',' ','','s','e','c','t','i','o','n',' ','.','t','e','x','t','',EOL,
+        /*   28 */ p_imacro,'o','r','g',' ','1','+','.','n','o','l','i','s','t',EOL,
+        /*   43 */ '','o','r','g',' ','%','1','',EOL,
+        /*   52 */ p_endmacro,EOL,
+        /*   54 */ p_macro,'_','_','?','N','A','S','M','_','C','D','e','c','l','?','_','_',' ','1',EOL,
+        /*   74 */ p_endmacro,EOL,
+        /*   76 */ EOL
+};
+#endif
+
+#if defined(OF_COFF) || defined(OF_WIN32) || defined(OF_WIN64)
+const unsigned char coff_stdmac = {
+    /* From ./output/outcoff.mac */
+        /*    0 */ p_define,'_','_','?','S','E','C','T','?','_','_',' ','','s','e','c','t','i','o','n',' ','.','t','e','x','t','',EOL,
+        /*   28 */ p_macro,'_','_','?','N','A','S','M','_','C','D','e','c','l','?','_','_',' ','1',EOL,
+        /*   48 */ p_endmacro,EOL,
+        /*   50 */ p_imacro,'e','x','p','o','r','t',' ','1','+','.','n','o','l','i','s','t',EOL,
+        /*   68 */ '','e','x','p','o','r','t',' ','%','1','',EOL,
+        /*   80 */ p_endmacro,EOL,
+        /*   82 */ p_imacro,'s','a','f','e','s','e','h',' ','1','.','n','o','l','i','s','t',EOL,
+        /*  100 */ '','s','a','f','e','s','e','h',' ','%','1','',EOL,
+        /*  113 */ p_endmacro,EOL,
+        /*  115 */ EOL
+};
+#endif
+
+#if defined(OF_DBG)
+const unsigned char dbg_stdmac = {
+    /* From ./output/outdbg.mac */
+        /*    0 */ p_define,'_','_','?','S','E','C','T','?','_','_',' ','','s','e','c','t','i','o','n',' ','.','t','e','x','t','',EOL,
+        /*   28 */ p_imacro,'g','r','o','u','p',' ','1','+','.','n','o','l','i','s','t',EOL,
+        /*   45 */ '','g','r','o','u','p',' ','%','1','',EOL,
+        /*   56 */ p_endmacro,EOL,
+        /*   58 */ p_imacro,'u','p','p','e','r','c','a','s','e',' ','0','+','.','n','o','l','i','s','t',EOL,
+        /*   79 */ p_pragma,'d','b','g',' ','u','p','p','e','r','c','a','s','e',' ','%','1',EOL,
+        /*   97 */ p_endmacro,EOL,
+        /*   99 */ p_imacro,'e','x','p','o','r','t',' ','1','+','.','n','o','l','i','s','t',EOL,
+        /*  117 */ p_pragma,'d','b','g',' ','e','x','p','o','r','t',' ','%','1',EOL,
+        /*  132 */ p_endmacro,EOL,
+        /*  134 */ p_imacro,'i','m','p','o','r','t',' ','1','+','.','n','o','l','i','s','t',EOL,
+        /*  152 */ p_pragma,'d','b','g',' ','i','m','p','o','r','t',' ','%','1',EOL,
+        /*  167 */ p_endmacro,EOL,
+        /*  169 */ p_imacro,'o','r','g',' ','1','+','.','n','o','l','i','s','t',EOL,
+        /*  184 */ p_pragma,'d','b','g',' ','o','r','g',' ','%','1',EOL,
+        /*  196 */ p_endmacro,EOL,
+        /*  198 */ p_macro,'_','_','?','N','A','S','M','_','C','D','e','c','l','?','_','_',' ','1',EOL,
+        /*  218 */ p_endmacro,EOL,
+        /*  220 */ EOL
+};
+#endif
+
+#if defined(OF_ELF) || defined(OF_ELF32) || defined(OF_ELF64)
+const unsigned char elf_stdmac = {
+    /* From ./output/outelf.mac */
+        /*    0 */ p_define,'_','_','?','S','E','C','T','?','_','_',' ','','s','e','c','t','i','o','n',' ','.','t','e','x','t','',EOL,
+        /*   28 */ p_macro,'_','_','?','N','A','S','M','_','C','D','e','c','l','?','_','_',' ','1',EOL,
+        /*   48 */ p_define,'$','_','%','1',' ','$','%','1',EOL,
+        /*   58 */ p_endmacro,EOL,
+        /*   60 */ p_imacro,'o','s','a','b','i',' ','1','+','.','n','o','l','i','s','t',EOL,
+        /*   77 */ '','%','?',' ','%','1','',EOL,
+        /*   85 */ p_endmacro,EOL,
+        /*   87 */ EOL
+};
+#endif
+
+#if defined(OF_MACHO) || defined(OF_MACHO32) || defined(OF_MACHO64)
+const unsigned char macho_stdmac = {
+    /* From ./output/outmacho.mac */
+        /*    0 */ p_define,'_','_','?','S','E','C','T','?','_','_',' ','','s','e','c','t','i','o','n',' ','.','t','e','x','t','',EOL,
+        /*   28 */ p_macro,'_','_','?','N','A','S','M','_','C','D','e','c','l','?','_','_',' ','1',EOL,
+        /*   48 */ p_endmacro,EOL,
+        /*   50 */ p_imacro,'s','u','b','s','e','c','t','i','o','n','s','_','v','i','a','_','s','y','m','b','o','l','s',' ','0','.','n','o','l','i','s','t',EOL,
+        /*   84 */ p_pragma,'_','_','?','O','U','T','P','U','T','_','F','O','R','M','A','T','?','_','_',' ','%','?',EOL,
+        /*  108 */ p_endmacro,EOL,
+        /*  110 */ p_imacro,'n','o','_','d','e','a','d','_','s','t','r','i','p',' ','1','-','*','.','n','o','l','i','s','t',EOL,
+        /*  136 */ p_rep,'%','0',EOL,
+        /*  140 */ p_pragma,'_','_','?','O','U','T','P','U','T','_','F','O','R','M','A','T','?','_','_',' ','%','?',' ','%','1',EOL,
+        /*  167 */ p_rotate,'1',EOL,
+        /*  170 */ p_endrep,EOL,
+        /*  172 */ p_endmacro,EOL,
+        /*  174 */ EOL
+};
+#endif
+
+#if defined(OF_OBJ)
+const unsigned char obj_stdmac = {
+    /* From ./output/outobj.mac */
+        /*    0 */ p_define,'_','_','?','S','E','C','T','?','_','_',' ','','s','e','c','t','i','o','n',' ','.','t','e','x','t','',EOL,
+        /*   28 */ p_imacro,'g','r','o','u','p',' ','1','+','.','n','o','l','i','s','t',EOL,
+        /*   45 */ '','g','r','o','u','p',' ','%','1','',EOL,
+        /*   56 */ p_endmacro,EOL,
+        /*   58 */ p_imacro,'u','p','p','e','r','c','a','s','e',' ','0','+','.','n','o','l','i','s','t',EOL,
+        /*   79 */ '','u','p','p','e','r','c','a','s','e',' ','%','1','',EOL,
+        /*   94 */ p_endmacro,EOL,
+        /*   96 */ p_imacro,'e','x','p','o','r','t',' ','1','+','.','n','o','l','i','s','t',EOL,
+        /*  114 */ '','e','x','p','o','r','t',' ','%','1','',EOL,
+        /*  126 */ p_endmacro,EOL,
+        /*  128 */ p_imacro,'i','m','p','o','r','t',' ','1','+','.','n','o','l','i','s','t',EOL,
+        /*  146 */ '','i','m','p','o','r','t',' ','%','1','',EOL,
+        /*  158 */ p_endmacro,EOL,
+        /*  160 */ p_macro,'_','_','?','N','A','S','M','_','C','D','e','c','l','?','_','_',' ','1',EOL,
+        /*  180 */ p_endmacro,EOL,
+        /*  182 */ EOL
+};
+#endif
+const int use_package_count = 5;
+
+const struct use_package *nasm_find_use_package(const char *name)
+{
+    static const struct use_package packages5 = {
+        { "altreg", nasm_usemac_altreg, 0 },
+        { "fp", nasm_usemac_fp, 1 },
+        { "ifunc", nasm_usemac_ifunc, 2 },
+        { "masm", nasm_usemac_masm, 3 },
+        { "smartalign", nasm_usemac_smartalign, 4 },
+    };
+#define INVALID_HASH_ENTRY (65535/3)
+    static const int16_t hashdata16 = {
+        INVALID_HASH_ENTRY,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        2,
+        0,
+        INVALID_HASH_ENTRY,
+        3,
+        0,
+        1,
+        0,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+        4,
+        INVALID_HASH_ENTRY,
+        INVALID_HASH_ENTRY,
+    };
+    uint32_t k1, k2;
+    uint64_t crc;
+    uint16_t ix;
+
+    crc = crc64i(UINT64_C(0x076259c3e291c26c), name);
+    k1 = ((uint32_t)crc & 0xe) + 0;
+    k2 = ((uint32_t)(crc >> 32) & 0xe) + 1;
+
+    ix = hashdatak1 + hashdatak2;
+    if (ix >= 5)
+        return NULL;
+
+    if (nasm_stricmp(packagesix.package, name))
+        return NULL;
+
+    return &packagesix;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/macros/macros.pl Added

@@ -0,0 +1,311 @@
+#!/usr/bin/perl
+## --------------------------------------------------------------------------
+##
+##   Copyright 1996-2009 The NASM Authors - All Rights Reserved
+##   See the file AUTHORS included with the NASM distribution for
+##   the specific copyright holders.
+##
+##   Redistribution and use in source and binary forms, with or without
+##   modification, are permitted provided that the following
+##   conditions are met:
+##
+##   * Redistributions of source code must retain the above copyright
+##     notice, this list of conditions and the following disclaimer.
+##   * Redistributions in binary form must reproduce the above
+##     copyright notice, this list of conditions and the following
+##     disclaimer in the documentation and/or other materials provided
+##     with the distribution.
+##
+##     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+##     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+##     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+##     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+##     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+##     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+##     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+##     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+##     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+##     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+##     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+##     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+##     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+##
+## --------------------------------------------------------------------------
+
+#
+# macros.pl   produce macros.c from standard.mac
+#
+
+require 'phash.ph';
+require 'asm/pptok.ph';
+
+use bytes;
+
+my $fname;
+my $line = 0;
+my $index      = 0;
+my $tasm_count = 0;
+my @pname;
+
+# Default names for various bytes
+for (my $o = 0; $o < 256; $o++) {
+    my $c = chr($o);
+    if ($o < 32 || $o > 126) {
+	$pname$o = sprintf("%d", $o);
+    } elsif ($c =~ /^\'\"\\$/) {
+	$pname$o = "\'\\".$c."\'";
+    } else {
+	$pname$o = "\'".$c."\'";
+    }
+}
+
+#
+# Print out a string as a character array
+#
+sub charcify(@) {
+    my $l = '';
+    my ($c, $o);
+    my $space = 1;
+    my $quote = 0;
+
+    foreach $o (unpack("C*", join('',@_))) {
+	$c = pack("C", $o);
+	if ($quote) {
+	    if ($o == $quote) {
+		$quote = 0;
+	    }
+	} elsif ($c =~ /^\'\"\`$/) {
+	    $quote = $o;
+	} else {
+	    if ($c eq ' ') {
+		next if ($space);
+		$o = 32;
+		$c = ' ';
+		$space = 1;
+	    } elsif ($o < 32 || $o > 126) {
+		$space = 1;	# Implicit space after compacted directive
+	    } else {
+		$space = 0;
+	    }
+	}
+	$l .= $pname$o;
+	$l .= ',';
+    }
+    return $l;
+}
+
+
+#
+# Generate macros.c
+#
+open(OUT, '>', 'macros/macros.c') or die "unable to open macros.c\n";
+
+print OUT "/*\n";
+print OUT " * Do not edit - this file auto-generated by macros.pl from:\n";
+print OUT " *   ", join("\n *   ", @ARGV), "\n";
+print OUT " */\n";
+print OUT "\n";
+print OUT "#include \"tables.h\"\n";
+print OUT "#include \"nasmlib.h\"\n";
+print OUT "#include \"hashtbl.h\"\n";
+print OUT "#include \"outform.h\"\n";
+print OUT "\n";
+
+my $name = undef;
+my $npkg = 0;
+my @pkg_list   = ();
+my %pkg_number = ();
+my $pkg;
+my @out_list   = ();
+my @std_list   = ();
+my $outfmt;
+my $lastname;
+my $z;
+
+my @pptok_list = sort { $pptok_hash{$a} <=> $pptok_hash{$b} } keys %pptok_hash;
+my %pnum;
+
+foreach my $pt (@pptok_list) {
+    my $n = $pptok_hash{$pt};
+    if ($pt !~ /A-Z/ && $n < 256-96) {
+	$n = ($n+128) & 255;
+	(my $et = $pt) =~ s/^\%/p_/;
+	printf OUT "#define %-24s %3d\n", $et, $n;
+	$pnum{$pt} = $n;
+	$pname$n = $et;
+    }
+}
+printf OUT "#define %-24s %3d\n\n", 'EOL', 127;
+
+foreach $args ( @ARGV ) {
+    my @file_list = glob ( $args );
+    foreach $fname ( @file_list ) {
+        open(INPUT,'<', $fname) or die "$0: $fname: $!\n";
+	while (<INPUT>) {
+	    $line++;
+	    chomp;
+	    while (/^(.*)\\$/) {
+		$_ = $1;
+		$_ .= <INPUT>;
+		chomp;
+		$line++;
+	    }
+	    s/^\s*((^\'\"\;|\"^\"*\"|\'^\'*\')*?)\s*(\;.*)?$/$1/;
+	    s/\s+/ /g;
+	    next if ($_ eq '');
+
+	    if (m/^OUT:\s*(\S.*)$/) {
+		undef $pkg;
+		my @out_alias = split(/\s+/, $1);
+		if (defined($name)) {
+		    printf OUT "        /* %4d */ EOL\n", $index++;
+		    print OUT "};\n#endif\n";
+		    undef $name;
+		}
+		$index = 0;
+		print OUT "\n";
+		my $pfx = '#if';
+		foreach my $al (@out_alias) {
+		    print OUT $pfx, " defined(OF_\U${al}\E)";
+		    $pfx = ' ||';
+		}
+		$name = $out_alias0 . '_stdmac';
+		print OUT "\nconst unsigned char ${name} = {\n";
+		print OUT "    /* From $fname */\n";
+		$lastname = $fname;
+	    } elsif (m/^STD:\s*(\S+)$/) {
+		undef $pkg;
+		my $std = $1;
+		if (defined($name)) {
+		    printf OUT "        /* %4d */ EOL\n", $index++;
+		    print OUT "};\n#endif\n";
+		    undef $name;
+		}
+		$index = 0;
+		print OUT "\n#if 1";
+		$name = 'nasm_stdmac_' . $std;
+		print OUT "\nconst unsigned char ${name} = {\n";
+		print OUT "    /* From $fname */\n";
+		$lastname = $fname;
+	    } elsif (m/^USE:\s*(\S+)$/) {
+		$pkg = $1;
+		if (defined($pkg_number{$pkg})) {
+		    die "$0: $fname: duplicate package: $pkg\n";
+		}
+		if (defined($name)) {
+		    printf OUT "        /* %4d */ EOL\n", $index++;
+		    print OUT "};\n#endif\n";
+		    undef $name;
+		}
+		$index = 0;
+		print OUT "\n#if 1";
+		$name = 'nasm_usemac_' . $pkg;
+		print OUT "\nstatic const unsigned char ${name} = {\n";
+		print OUT "    /* From $fname */\n";
+		$lastname = $fname;
+		push(@pkg_list, $pkg);
+		$pkg_number{$pkg} = $npkg++;
+		$z = pack("C", $pnum{'%define'})."__?USE_\U$pkg\E?__";
+		printf OUT "        /* %4d */ %sEOL,\n", $index, charcify($z);
+		$z = pack("C", $pnum{'%defalias'})."__USE_\U$pkg\E__ __?USE\U$pkg\E?__";
+		printf OUT "        /* %4d */ %sEOL,\n", $index, charcify($z);
+		$index += length($z)+1;
+	    } else {
+		my($s1, $s2, $pd, $ws);
+
+		if (!defined($name)) {
+		    die "$0: $fname: macro declarations outside a known block\n";
+		}
+
+		$s1 = $_;
+		$s2 = '';
+		while ($s1 =~ /(\%a-zA-Z_a-zA-Z0-9_*)((\s+)(.*)|)$/) {
+		    $s2 .= "$'";
+		    $pd = $1;
+		    $ws = $3;
+		    $s1 = $4;
+		    if (defined($pnum{$pd})) {
+			$s2 .= pack("C", $pnum{$pd});
+		    } else {
+			$s2 .= $pd.$ws;
+		    }
+		}
+		$s2 .= $s1;
+		if (length($s2) > 0) {
+		    if ($lastname ne $fname) {
+			print OUT "\n    /* From $fname */\n";
+			$lastname = $fname;
+		    }
+		    printf OUT "        /* %4d */ %sEOL,\n",
+			$index, charcify($s2);
+		    $index += length($s2)+1;
+		}
+	    }
+	}
+        close(INPUT);
+    }
+}
+
+if (defined($name)) {
+    printf OUT "        /* %4d */ EOL\n", $index++;
+    print OUT "};\n#endif\n";
+    undef $name;
+}
+
+my @hashinfo = gen_perfect_hash(\%pkg_number);
+if (!@hashinfo) {
+    die "$0: no hash found\n";
+}
+# Paranoia...
+verify_hash_table(\%pkg_number, \@hashinfo);
+my ($n, $sv, $g) = @hashinfo;
+die if ($n & ($n-1));
+$n <<= 1;
+
+printf OUT "const int use_package_count = %d;\n\n", $npkg;
+
+print OUT "const struct use_package *nasm_find_use_package(const char *name)\n";
+print OUT "{\n";
+print OUT "    static const struct use_package packages$npkg = {\n";
+my $ix = 0;
+foreach $pkg (@pkg_list) {
+    printf OUT "        { \"%s\", nasm_usemac_%s, %d },\n",
+	$pkg, $pkg, $ix++;
+}
+print OUT "    };\n";
+
+# Put a large value in unused slots.  This makes it extremely unlikely
+# that any combination that involves unused slot will pass the range test.
+# This speeds up rejection of unrecognized tokens, i.e. identifiers.
+print OUT "#define INVALID_HASH_ENTRY (65535/3)\n";
+
+print OUT "    static const int16_t hashdata$n = {\n";
+for ($i = 0; $i < $n; $i++) {
+    my $h = ${$g}$i;
+    print OUT "        ", defined($h) ? $h : 'INVALID_HASH_ENTRY', ",\n";
+}
+print OUT "    };\n";
+
+print OUT  "    uint32_t k1, k2;\n";
+print OUT  "    uint64_t crc;\n";
+# For correct overflow behavior, "ix" should be unsigned of the same
+# width as the hash arrays.
+print OUT  "    uint16_t ix;\n";
+print OUT  "\n";
+
+printf OUT "    crc = crc64i(UINT64_C(0x%08x%08x), name);\n",
+    $$sv0, $$sv1;
+printf OUT "    k1 = ((uint32_t)crc & 0x%x) + 0;\n", $n-2;
+printf OUT "    k2 = ((uint32_t)(crc >> 32) & 0x%x) + 1;\n", $n-2;
+print  OUT "\n";
+printf OUT "    ix = hashdatak1 + hashdatak2;\n";
+printf OUT "    if (ix >= %d)\n", scalar(@pkg_list);
+print OUT  "        return NULL;\n";
+print OUT  "\n";
+print OUT  "    if (nasm_stricmp(packagesix.package, name))\n";
+print OUT  "        return NULL;\n";
+print OUT  "\n";
+print OUT  "    return &packagesix;\n";
+print OUT  "}\n";
+
+close(OUT);

_service:tar_scm:nasm-2.16.03.tar.xz/macros/masm.mac Added

@@ -0,0 +1,82 @@
+;; --------------------------------------------------------------------------
+;;
+;;   Copyright 2019 The NASM Authors - All Rights Reserved
+;;   See the file AUTHORS included with the NASM distribution for
+;;   the specific copyright holders.
+;;
+;;   Redistribution and use in source and binary forms, with or without
+;;   modification, are permitted provided that the following
+;;   conditions are met:
+;;
+;;   * Redistributions of source code must retain the above copyright
+;;     notice, this list of conditions and the following disclaimer.
+;;   * Redistributions in binary form must reproduce the above
+;;     copyright notice, this list of conditions and the following
+;;     disclaimer in the documentation and/or other materials provided
+;;     with the distribution.
+;;
+;;     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+;;     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+;;     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+;;     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;;     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+;;     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;;     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+;;     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+;;     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+;;     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+;;     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+;;     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;;     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+;; --------------------------------------------------------------------------
+
+;;
+;; masm.mac
+;;
+;; Very limited MASM compatibility package; intended to be used
+;; primarily with machine-generated code. It does not include any
+;; "programmer friendly" shortcuts, nor does it in any way support
+;; ASSUME, symbol typing, or MASM-style structures.
+;;
+
+USE: masm
+
+%unimacro segment 1+
+
+%imacro segment 0-1+.nolist
+  %define __?SECT?__ segment %00 %1
+	__?SECT?__
+%endmacro
+
+%imacro ends 0+.nolist
+  %null ends %00
+%endmacro
+
+%imacro proc 0-*.nolist
+  %rep %0
+    %ifidni %1,far
+      %idefine ret retf
+    %else
+      %idefine ret retn
+    %endif
+    %rotate 1
+  %endrep
+%endmacro
+
+%imacro endp 0.nolist
+  %null endp %00
+  %undef ret
+%endmacro
+
+%idefine ptr __?masm_ptr?__
+%idefine flat __?masm_flat?__	; is %idefine really correct here?
+%idefine offset
+
+%imacro end 0+.nolist
+	; Nothing
+%endmacro
+
+%idefine tbyte tword
+
+	default rel

_service:tar_scm:nasm-2.16.03.tar.xz/macros/smartalign.mac Added

@@ -0,0 +1,191 @@
+;; --------------------------------------------------------------------------
+;;   
+;;   Copyright 1996-2017 The NASM Authors - All Rights Reserved
+;;   See the file AUTHORS included with the NASM distribution for
+;;   the specific copyright holders.
+;;
+;;   Redistribution and use in source and binary forms, with or without
+;;   modification, are permitted provided that the following
+;;   conditions are met:
+;;
+;;   * Redistributions of source code must retain the above copyright
+;;     notice, this list of conditions and the following disclaimer.
+;;   * Redistributions in binary form must reproduce the above
+;;     copyright notice, this list of conditions and the following
+;;     disclaimer in the documentation and/or other materials provided
+;;     with the distribution.
+;;     
+;;     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+;;     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+;;     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+;;     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;;     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+;;     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;;     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+;;     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+;;     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+;;     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+;;     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+;;     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;;     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+;; --------------------------------------------------------------------------
+
+;
+; Smart alignment macros
+;
+USE: smartalign
+
+%imacro alignmode 1-2.nolist
+  %ifidni %1,nop
+    %define __?ALIGN_JMP_THRESHOLD?__ 16
+
+    %define __?ALIGN_16BIT_1B?__ 0x90
+    %define __?ALIGN_16BIT_GROUP?__ 1
+
+    %define __?ALIGN_32BIT_1B?__ 0x90
+    %define __?ALIGN_32BIT_GROUP?__ 1
+
+    %define __?ALIGN_64BIT_1B?__ 0x90
+    %define __?ALIGN_64BIT_GROUP?__ 1
+  %elifidni %1,generic
+    %define __?ALIGN_JMP_THRESHOLD?__ 8
+
+    %define __?ALIGN_16BIT_1B?__ 0x90
+    %define __?ALIGN_16BIT_2B?__ 0x89,0xf6
+    %define __?ALIGN_16BIT_3B?__ 0x8d,0x74,0x00
+    %define __?ALIGN_16BIT_4B?__ 0x8d,0xb4,0x00,0x00
+    %define __?ALIGN_16BIT_5B?__ 0x8d,0xb4,0x00,0x00,0x90
+    %define __?ALIGN_16BIT_6B?__ 0x8d,0xb4,0x00,0x00,0x89,0xff
+    %define __?ALIGN_16BIT_7B?__ 0x8d,0xb4,0x00,0x00,0x8d,0x7d,0x00
+    %define __?ALIGN_16BIT_8B?__ 0x8d,0xb4,0x00,0x00,0x8d,0xbd,0x00,0x00
+    %define __?ALIGN_16BIT_GROUP?__ 8
+
+    %define __?ALIGN_32BIT_1B?__ 0x90
+    %define __?ALIGN_32BIT_2B?__ 0x89,0xf6
+    %define __?ALIGN_32BIT_3B?__ 0x8d,0x76,0x00
+    %define __?ALIGN_32BIT_4B?__ 0x8d,0x74,0x26,0x00
+    %define __?ALIGN_32BIT_5B?__ 0x90,0x8d,0x74,0x26,0x00
+    %define __?ALIGN_32BIT_6B?__ 0x8d,0xb6,0x00,0x00,0x00,0x00
+    %define __?ALIGN_32BIT_7B?__ 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00
+    %define __?ALIGN_32BIT_GROUP?__ 7
+
+    %define __?ALIGN_64BIT_1B?__ 0x90
+    %define __?ALIGN_64BIT_2B?__ 0x66,0x90
+    %define __?ALIGN_64BIT_3B?__ 0x66,0x66,0x90
+    %define __?ALIGN_64BIT_4B?__ 0x66,0x66,0x66,0x90
+    %define __?ALIGN_64BIT_GROUP?__ 4
+  %elifidni %1,k8
+    %define __?ALIGN_JMP_THRESHOLD?__ 16
+
+    %define __?ALIGN_16BIT_1B?__ 0x90
+    %define __?ALIGN_16BIT_2B?__ 0x66,0x90
+    %define __?ALIGN_16BIT_3B?__ 0x66,0x66,0x90
+    %define __?ALIGN_16BIT_4B?__ 0x66,0x66,0x66,0x90
+    %define __?ALIGN_16BIT_GROUP?__ 4
+
+    %define __?ALIGN_32BIT_1B?__ 0x90
+    %define __?ALIGN_32BIT_2B?__ 0x66,0x90
+    %define __?ALIGN_32BIT_3B?__ 0x66,0x66,0x90
+    %define __?ALIGN_32BIT_4B?__ 0x66,0x66,0x66,0x90
+    %define __?ALIGN_32BIT_GROUP?__ 4
+
+    %define __?ALIGN_64BIT_1B?__ 0x90
+    %define __?ALIGN_64BIT_2B?__ 0x66,0x90
+    %define __?ALIGN_64BIT_3B?__ 0x66,0x66,0x90
+    %define __?ALIGN_64BIT_4B?__ 0x66,0x66,0x66,0x90
+    %define __?ALIGN_64BIT_GROUP?__ 4
+  %elifidni %1,k7
+    %define __?ALIGN_JMP_THRESHOLD?__ 16
+
+    %define __?ALIGN_16BIT_1B?__ 0x90
+    %define __?ALIGN_16BIT_2B?__ 0x66,0x90
+    %define __?ALIGN_16BIT_3B?__ 0x66,0x66,0x90
+    %define __?ALIGN_16BIT_4B?__ 0x66,0x66,0x66,0x90
+    %define __?ALIGN_64BIT_GROUP?__ 4
+
+    %define __?ALIGN_32BIT_1B?__ 0x90
+    %define __?ALIGN_32BIT_2B?__ 0x8b,0xc0
+    %define __?ALIGN_32BIT_3B?__ 0x8d,0x04,0x20
+    %define __?ALIGN_32BIT_4B?__ 0x8d,0x44,0x20,0x00
+    %define __?ALIGN_32BIT_5B?__ 0x8d,0x44,0x20,0x00,0x90
+    %define __?ALIGN_32BIT_6B?__ 0x8d,0x80,0x00,0x00,0x00,0x00
+    %define __?ALIGN_32BIT_7B?__ 0x8d,0x04,0x05,0x00,0x00,0x00,0x00
+    %define __?ALIGN_32BIT_GROUP?__ 7
+
+    %define __?ALIGN_64BIT_1B?__ 0x90
+    %define __?ALIGN_64BIT_2B?__ 0x66,0x90
+    %define __?ALIGN_64BIT_3B?__ 0x66,0x66,0x90
+    %define __?ALIGN_64BIT_4B?__ 0x66,0x66,0x66,0x90
+    %define __?ALIGN_64BIT_GROUP?__ 4
+  %elifidni %1,p6
+    %define __?ALIGN_JMP_THRESHOLD?__ 16
+
+    %define __?ALIGN_16BIT_1B?__ 0x90
+    %define __?ALIGN_16BIT_2B?__ 0x66,0x90
+    %define __?ALIGN_16BIT_3B?__ 0x0f,0x1f,0x00
+    %define __?ALIGN_16BIT_4B?__ 0x0f,0x1f,0x40,0x00
+    %define __?ALIGN_16BIT_GROUP?__ 4
+
+    %define __?ALIGN_32BIT_1B?__ 0x90
+    %define __?ALIGN_32BIT_2B?__ 0x66,0x90
+    %define __?ALIGN_32BIT_3B?__ 0x0f,0x1f,0x00
+    %define __?ALIGN_32BIT_4B?__ 0x0f,0x1f,0x40,0x00
+    %define __?ALIGN_32BIT_5B?__ 0x0f,0x1f,0x44,0x00,0x00
+    %define __?ALIGN_32BIT_6B?__ 0x66,0x0f,0x1f,0x44,0x00,0x00
+    %define __?ALIGN_32BIT_7B?__ 0x0f,0x1f,0x80,0x00,0x00,0x00,0x00
+    %define __?ALIGN_32BIT_8B?__ 0x0f,0x1f,0x84,0x00,0x00,0x00,0x00,0x00
+    %define __?ALIGN_32BIT_GROUP?__ 8
+
+    %define __?ALIGN_64BIT_1B?__ 0x90
+    %define __?ALIGN_64BIT_2B?__ 0x66,0x90
+    %define __?ALIGN_64BIT_3B?__ 0x0f,0x1f,0x00
+    %define __?ALIGN_64BIT_4B?__ 0x0f,0x1f,0x40,0x00
+    %define __?ALIGN_64BIT_5B?__ 0x0f,0x1f,0x44,0x00,0x00
+    %define __?ALIGN_64BIT_6B?__ 0x66,0x0f,0x1f,0x44,0x00,0x00
+    %define __?ALIGN_64BIT_7B?__ 0x0f,0x1f,0x80,0x00,0x00,0x00,0x00
+    %define __?ALIGN_64BIT_8B?__ 0x0f,0x1f,0x84,0x00,0x00,0x00,0x00,0x00
+    %define __?ALIGN_64BIT_GROUP?__ 8
+  %else
+    %error unknown alignment mode: %1
+  %endif
+  %ifnempty %2
+    %ifidni %2,nojmp
+      %xdefine __?ALIGN_JMP_THRESHOLD?__ -1
+    %else
+      %xdefine __?ALIGN_JMP_THRESHOLD?__ %2
+    %endif
+  %endif
+  %xdefine __?ALIGNMODE?__ %1,__?ALIGN_JMP_THRESHOLD?__
+%endmacro
+
+%defalias __ALIGNMODE__ __?ALIGNMODE?__
+
+%unimacro align 1-2+.nolist
+%imacro align 1-2+.nolist
+  sectalign %1   ; align a segment as well
+  %ifnempty %2
+    times (((%1) - (($-$$) % (%1))) % (%1)) %2
+  %elif __?PASS?__ == 0 || __?PASS?__ == 3
+    times (((%1) - (($-$$) % (%1))) % (%1)) nop
+  %else
+    %push
+    %assign %$pad (((%1) - (($-$$) % (%1))) % (%1))
+    %if __?ALIGN_JMP_THRESHOLD?__ != -1 && %$pad > __?ALIGN_JMP_THRESHOLD?__
+      jmp %$end
+      ; We can't re-use %$pad here as $ will have changed!
+      times (((%1) - (($-$$) % (%1))) % (%1)) nop
+    %else
+      times (%$pad / __?ALIGN_%__?BITS?__BIT_GROUP?__) \
+        db __?ALIGN_%__?BITS?__BIT_%__?ALIGN_%__?BITS?__BIT_GROUP?__B?__
+      %assign %$pad %$pad % __?ALIGN_%__?BITS?__BIT_GROUP?__
+      %if %$pad > 0
+        db __?ALIGN_%__?BITS?__BIT_%%$padB?__
+      %endif
+    %endif
+%$end:
+    %pop
+  %endif
+%endmacro
+
+	alignmode generic

_service:tar_scm:nasm-2.16.03.tar.xz/macros/standard.mac Added

@@ -0,0 +1,331 @@
+;; --------------------------------------------------------------------------
+;;   
+;;   Copyright 1996-2019 The NASM Authors - All Rights Reserved
+;;   See the file AUTHORS included with the NASM distribution for
+;;   the specific copyright holders.
+;;
+;;   Redistribution and use in source and binary forms, with or without
+;;   modification, are permitted provided that the following
+;;   conditions are met:
+;;
+;;   * Redistributions of source code must retain the above copyright
+;;     notice, this list of conditions and the following disclaimer.
+;;   * Redistributions in binary form must reproduce the above
+;;     copyright notice, this list of conditions and the following
+;;     disclaimer in the documentation and/or other materials provided
+;;     with the distribution.
+;;
+;;     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+;;     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+;;     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+;;     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;;     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+;;     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;;     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+;;     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+;;     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+;;     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+;;     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+;;     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;;     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+;; --------------------------------------------------------------------------
+
+; Standard macro set for NASM -*- nasm -*-
+
+; Macros to make NASM ignore some TASM directives
+STD: tasm
+    %idefine IDEAL
+    %idefine JUMPS
+    %idefine P386
+    %idefine P486
+    %idefine P586
+    %idefine END
+
+; The normal standard macros
+STD: nasm
+
+; Note that although some user-level forms of directives are defined
+; here, not all of them are: the user-level form of a format-specific
+; directive should be defined in the module for that directive.
+
+%define __?SECT?__            ; it ought to be defined, even if as nothing
+%defalias __SECT__ __?SECT?__
+
+%imacro section 1+.nolist
+    %define __?SECT?__ section %1
+    __?SECT?__
+%endmacro
+
+%imacro segment 1+.nolist
+    %define __?SECT?__ segment %1
+    __?SECT?__
+%endmacro
+
+%define __?SECTALIGN_ALIGN_UPDATES_SECTION?__ 1
+%imacro sectalign 1+.nolist
+    %ifidni %1,off
+        %define __?SECTALIGN_ALIGN_UPDATES_SECTION?__ 0
+    %elifidni %1,on
+        %define __?SECTALIGN_ALIGN_UPDATES_SECTION?__ 1
+    %else
+        sectalign %1
+    %endif
+%endmacro
+%defalias __SECTALIGN_ALIGN_UPDATES_SECTION__ __?SECTALIGN_ALIGN_UPDATES_SECTION?__
+
+%imacro absolute 1+.nolist
+    %define __?SECT?__ absolute %1
+    __?SECT?__
+%endmacro
+
+%imacro struc 1-2.nolist 0
+    %push
+        %define %$strucname %1
+        absolute %2
+        %$strucname:        ; allow definition of `.member' to work sanely
+%endmacro
+
+%imacro endstruc 0.nolist
+        %{$strucname}_size equ ($-%$strucname)
+    %pop
+    __?SECT?__
+%endmacro
+
+%imacro istruc 1.nolist
+    %push
+        %define %$strucname %1
+        %$strucstart:
+%endmacro
+
+%imacro at 1-2+.nolist
+    %defstr %$member %1
+    %substr %$member1 %$member 1
+    %ifidn %$member1, '.'
+        times (%$strucname%1-%$strucname)-($-%$strucstart) db 0
+    %else
+        times (%1-%$strucname)-($-%$strucstart) db 0
+    %endif
+    %2
+%endmacro
+
+%imacro iend 0.nolist
+        times %{$strucname}_size-($-%$strucstart) db 0
+    %pop
+%endmacro
+
+%imacro align 1-2+.nolist nop
+    %if __?SECTALIGN_ALIGN_UPDATES_SECTION?__
+        sectalign %1
+    %endif
+    times (((%1) - (($-$$) % (%1))) % (%1)) %2
+%endmacro
+
+%imacro alignb 1-2+.nolist
+    %if __?SECTALIGN_ALIGN_UPDATES_SECTION?__
+        sectalign %1
+    %endif
+    %ifempty %2
+        warning push
+        warning -zeroing
+        resb (((%1) - (($-$$) % (%1))) % (%1))
+        warning pop
+    %else
+        times (((%1) - (($-$$) % (%1))) % (%1)) %2
+    %endif
+%endmacro
+
+%imacro bits 1+.nolist
+    bits %1
+%endmacro
+
+%imacro use16 0.nolist
+    bits 16
+%endmacro
+
+%imacro use32 0.nolist
+    bits 32
+%endmacro
+
+%imacro use64 0.nolist
+    bits 64
+%endmacro
+
+%imacro extern 1-*.nolist
+    %rep %0
+        extern %1
+        %rotate 1
+    %endrep
+%endmacro
+
+%imacro static 1-*.nolist
+    %rep %0
+        static %1
+        %rotate 1
+    %endrep
+%endmacro
+
+%imacro global 1-*.nolist
+    %rep %0
+        global %1
+        %rotate 1
+    %endrep
+%endmacro
+
+%imacro required 1-*.nolist
+    %rep %0
+        required %1
+        %rotate 1
+    %endrep
+%endmacro
+
+%imacro common 1-*.nolist
+    %rep %0
+        common %1
+        %rotate 1
+    %endrep
+%endmacro
+
+%imacro cpu 1+.nolist
+    cpu %1
+%endmacro
+
+%define __?FLOAT_DAZ?__ nodaz
+%define __?FLOAT_ROUND?__ near
+; __?FLOAT?__ contains the whole floating-point configuration so it can
+; be saved and restored
+%define __?FLOAT?__ __?FLOAT_DAZ?__,__?FLOAT_ROUND?__
+
+%defalias __FLOAT_DAZ__ __?FLOAT_DAZ?__
+%defalias __FLOAT_ROUND__ __?FLOAT_ROUND?__
+%defalias __FLOAT__ __?FLOAT?__
+
+%imacro float 1-*.nolist
+    %rep %0
+        float %1
+        %ifidni %1,daz
+            %define __?FLOAT_DAZ?__ daz
+        %elifidni %1,nodaz
+            %define __?FLOAT_DAZ?__ nodaz
+        %elifidni %1,near
+            %define __?FLOAT_ROUND?__ near
+        %elifidni %1,up
+            %define __?FLOAT_ROUND?__ up
+        %elifidni %1,down
+            %define __?FLOAT_ROUND?__ down
+        %elifidni %1,zero
+            %define __?FLOAT_ROUND?__ zero
+        %elifidni %1,default
+            %define __?FLOAT_DAZ?__ nodaz
+            %define __?FLOAT_ROUND?__ near
+        %endif
+        %rotate 1
+    %endrep
+%endmacro
+
+%imacro default 1+.nolist
+    default %1
+%endmacro
+
+%imacro userel 0.nolist
+    default rel
+%endmacro
+%imacro useabs 0.nolist
+    default abs
+%endmacro
+%imacro usebnd 0.nolist
+    default bnd
+%endmacro
+%imacro usenobnd 0.nolist
+    default nobnd
+%endmacro
+
+%imacro incbin 1-2+.nolist 0
+    %push
+        %pathsearch %$dep %1
+        %depend %$dep
+        %? %$dep,%2
+    %pop
+%endmacro
+
+; Compatibility macro aliases
+%defalias __NASM_MAJOR__      __?NASM_MAJOR?__
+%defalias __NASM_MINOR__      __?NASM_MINOR?__
+%defalias __NASM_SUBMINOR__   __?NASM_SUBMINOR?__
+%defalias __NASM_PATCHLEVEL__ __?NASM_PATCHLEVEL?__
+%defalias __NASM_SNAPSHOT__   __?NASM_SNAPSHOT?__
+%defalias __NASM_VERSION_ID__ __?NASM_VERSION_ID?__
+%defalias __NASM_VER__        __?NASM_VER?__
+
+%defalias __OUTPUT_FORMAT__   __?OUTPUT_FORMAT?__
+%defalias __DEBUG_FORMAT__    __?DEBUG_FORMAT?__
+
+%defalias __DATE__            __?DATE?__
+%defalias __DATE_NUM__        __?DATE_NUM?__
+%defalias __TIME__            __?TIME?__
+%defalias __TIME_NUM__        __?TIME_NUM?__
+%defalias __UTC_DATE__        __?UTC_DATE?__
+%defalias __UTC_DATE_NUM__    __?UTC_DATE_NUM?__
+%defalias __UTC_TIME__        __?UTC_TIME?__
+%defalias __UTC_TIME_NUM__    __?UTC_TIME_NUM?__
+%defalias __POSIX_TIME__      __?POSIX_TIME?__
+
+%defalias __FILE__            __?FILE?__
+%defalias __LINE__            __?LINE?__
+%defalias __BITS__            __?BITS?__
+%defalias __PTR__             __?PTR?__
+%defalias __PASS__            __?PASS?__
+
+; Backwards compatibility aliases for tokens. The extra level of indirection here
+; means %aliases on|off will do the right thing for these as well.
+%idefine __?infinity?__ %?
+%idefine __?nan?__ %?
+%idefine __?qnan?__ %?
+%idefine __?snan?__ %?
+
+%idefine __?float8?__ %?
+%idefine __?float16?__ %?
+%idefine __?float32?__ %?
+%idefine __?float64?__ %?
+%idefine __?float80m?__ %?
+%idefine __?float80e?__ %?
+%idefine __?float128l?__ %?
+%idefine __?float128h?__ %?
+
+%idefine __?utf16?__ %?
+%idefine __?utf16le?__ %?
+%idefine __?utf16be?__ %?
+%idefine __?utf32?__ %?
+%idefine __?utf32le?__ %?
+%idefine __?utf32be?__ %?
+
+%idefine __?ilog2e?__ %?
+%idefine __?ilog2w?__ %?
+%idefine __?ilog2f?__ %?
+%idefine __?ilog2c?__ %?
+
+%idefalias __infinity__ __?infinity?__
+%idefalias __nan__ __?nan?__
+%idefalias __qnan__ __?qnan?__
+%idefalias __snan__ __?snan?__
+
+%idefalias __float8__ __?float8?__
+%idefalias __float16__ __?float16?__
+%idefalias __float32__ __?float32?__
+%idefalias __float64__ __?float64?__
+%idefalias __float80m__ __?float80m?__
+%idefalias __float80e__ __?float80e?__
+%idefalias __float128l__ __?float128l?__
+%idefalias __float128h__ __?float128h?__
+
+%idefalias __utf16__ __?utf16?__
+%idefalias __utf16le__ __?utf16le?__
+%idefalias __utf16be__ __?utf16be?__
+%idefalias __utf32__ __?utf32?__
+%idefalias __utf32le__ __?utf32le?__
+%idefalias __utf32be__ __?utf32be?__
+
+%idefalias __ilog2e__ __?ilog2e?__
+%idefalias __ilog2w__ __?ilog2w?__
+%idefalias __ilog2f__ __?ilog2f?__
+%idefalias __ilog2c__ __?ilog2c?__

_service:tar_scm:nasm-2.16.03.tar.xz/misc Added

_service:tar_scm:nasm-2.16.03.tar.xz/misc/Doxyfile Added

@@ -0,0 +1,752 @@
+# Doxyfile 1.2.5
+
+# This file describes the settings to be used by doxygen for a project
+#
+# All text after a hash (#) is considered a comment and will be ignored
+# The format is:
+#       TAG = value value, ...
+# For lists items can also be appended using:
+#       TAG += value value, ...
+# Values that contain spaces should be placed between quotes (" ")
+
+#---------------------------------------------------------------------------
+# General configuration options
+#---------------------------------------------------------------------------
+
+# The PROJECT_NAME tag is a single word (or a sequence of words surrounded 
+# by quotes) that should identify the project. 
+
+PROJECT_NAME           = "NASM - the Netwide Assembler"
+
+# The PROJECT_NUMBER tag can be used to enter a project or revision number. 
+# This could be handy for archiving the generated documentation or 
+# if some version control system is used.
+
+PROJECT_NUMBER         = 0.98
+
+# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) 
+# base path where the generated documentation will be put. 
+# If a relative path is entered, it will be relative to the location 
+# where doxygen was started. If left blank the current directory will be used.
+
+OUTPUT_DIRECTORY       = doxy
+
+# The OUTPUT_LANGUAGE tag is used to specify the language in which all 
+# documentation generated by doxygen is written. Doxygen will use this 
+# information to generate all constant output in the proper language. 
+# The default language is English, other supported languages are: 
+# Dutch, French, Italian, Czech, Swedish, German, Finnish, Japanese, 
+# Korean, Hungarian, Norwegian, Spanish, Romanian, Russian, Croatian, 
+# Polish, Portuguese and Slovene.
+
+OUTPUT_LANGUAGE        = English
+
+# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in 
+# documentation are documented, even if no documentation was available. 
+# Private class members and static file members will be hidden unless 
+# the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES 
+
+EXTRACT_ALL            = YES
+
+# If the EXTRACT_PRIVATE tag is set to YES all private members of a class 
+# will be included in the documentation. 
+
+EXTRACT_PRIVATE        = NO
+
+# If the EXTRACT_STATIC tag is set to YES all static members of a file 
+# will be included in the documentation. 
+
+EXTRACT_STATIC         = YES
+
+# If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all 
+# undocumented members of documented classes, files or namespaces. 
+# If set to NO (the default) these members will be included in the 
+# various overviews, but no documentation section is generated. 
+# This option has no effect if EXTRACT_ALL is enabled. 
+
+HIDE_UNDOC_MEMBERS     = NO
+
+# If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all 
+# undocumented classes that are normally visible in the class hierarchy. 
+# If set to NO (the default) these class will be included in the various 
+# overviews. This option has no effect if EXTRACT_ALL is enabled. 
+
+HIDE_UNDOC_CLASSES     = NO
+
+# If the BRIEF_MEMBER_DESC tag is set to YES (the default) Doxygen will 
+# include brief member descriptions after the members that are listed in 
+# the file and class documentation (similar to JavaDoc). 
+# Set to NO to disable this. 
+
+BRIEF_MEMBER_DESC      = YES
+
+# If the REPEAT_BRIEF tag is set to YES (the default) Doxygen will prepend 
+# the brief description of a member or function before the detailed description. 
+# Note: if both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the 
+# brief descriptions will be completely suppressed. 
+
+REPEAT_BRIEF           = YES
+
+# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then 
+# Doxygen will generate a detailed section even if there is only a brief 
+# description. 
+
+ALWAYS_DETAILED_SEC    = NO
+
+# If the FULL_PATH_NAMES tag is set to YES then Doxygen will prepend the full 
+# path before files name in the file list and in the header files. If set 
+# to NO the shortest path that makes the file name unique will be used. 
+
+FULL_PATH_NAMES        = NO
+
+# If the FULL_PATH_NAMES tag is set to YES then the STRIP_FROM_PATH tag 
+# can be used to strip a user defined part of the path. Stripping is 
+# only done if one of the specified strings matches the left-hand part of 
+# the path. It is allowed to use relative paths in the argument list.
+
+STRIP_FROM_PATH        = 
+
+# The INTERNAL_DOCS tag determines if documentation 
+# that is typed after a \internal command is included. If the tag is set 
+# to NO (the default) then the documentation will be excluded. 
+# Set it to YES to include the internal documentation. 
+
+INTERNAL_DOCS          = NO
+
+# If the CLASS_DIAGRAMS tag is set to YES (the default) Doxygen will 
+# generate a class diagram (in Html and LaTeX) for classes with base or 
+# super classes. Setting the tag to NO turns the diagrams off. 
+
+CLASS_DIAGRAMS         = YES
+
+# If the SOURCE_BROWSER tag is set to YES then a list of source files will 
+# be generated. Documented entities will be cross-referenced with these sources. 
+
+SOURCE_BROWSER         = YES
+
+# Setting the INLINE_SOURCES tag to YES will include the body 
+# of functions and classes directly in the documentation. 
+
+INLINE_SOURCES         = NO
+
+# Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct 
+# doxygen to hide any special comment blocks from generated source code 
+# fragments. Normal C and C++ comments will always remain visible. 
+
+STRIP_CODE_COMMENTS    = YES
+
+# If the CASE_SENSE_NAMES tag is set to NO then Doxygen will only generate 
+# file names in lower case letters. If set to YES upper case letters are also 
+# allowed. This is useful if you have classes or files whose names only differ 
+# in case and if your file system supports case sensitive file names. Windows 
+# users are advised to set this option to NO.
+
+CASE_SENSE_NAMES       = YES
+
+# If the HIDE_SCOPE_NAMES tag is set to NO (the default) then Doxygen 
+# will show members with their full class and namespace scopes in the 
+# documentation. If set to YES the scope will be hidden. 
+
+HIDE_SCOPE_NAMES       = NO
+
+# If the VERBATIM_HEADERS tag is set to YES (the default) then Doxygen 
+# will generate a verbatim copy of the header file for each class for 
+# which an include is specified. Set to NO to disable this. 
+
+VERBATIM_HEADERS       = YES
+
+# If the SHOW_INCLUDE_FILES tag is set to YES (the default) then Doxygen 
+# will put list of the files that are included by a file in the documentation 
+# of that file. 
+
+SHOW_INCLUDE_FILES     = YES
+
+# If the JAVADOC_AUTOBRIEF tag is set to YES then Doxygen 
+# will interpret the first line (until the first dot) of a JavaDoc-style 
+# comment as the brief description. If set to NO, the JavaDoc 
+# comments  will behave just like the Qt-style comments (thus requiring an 
+# explicit @brief command for a brief description. 
+
+JAVADOC_AUTOBRIEF      = NO
+
+# If the INHERIT_DOCS tag is set to YES (the default) then an undocumented 
+# member inherits the documentation from any documented member that it 
+# reimplements. 
+
+INHERIT_DOCS           = YES
+
+# If the INLINE_INFO tag is set to YES (the default) then a tag inline 
+# is inserted in the documentation for inline members. 
+
+INLINE_INFO            = YES
+
+# If the SORT_MEMBER_DOCS tag is set to YES (the default) then doxygen 
+# will sort the (detailed) documentation of file and class members 
+# alphabetically by member name. If set to NO the members will appear in 
+# declaration order. 
+
+SORT_MEMBER_DOCS       = YES
+
+# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC 
+# tag is set to YES, then doxygen will reuse the documentation of the first 
+# member in the group (if any) for the other members of the group. By default 
+# all members of a group must be documented explicitly.
+
+DISTRIBUTE_GROUP_DOC   = NO
+
+# The TAB_SIZE tag can be used to set the number of spaces in a tab. 
+# Doxygen uses this value to replace tabs by spaces in code fragments. 
+
+TAB_SIZE               = 4
+
+# The ENABLE_SECTIONS tag can be used to enable conditional 
+# documentation sections, marked by \if sectionname ... \endif. 
+
+ENABLED_SECTIONS       = 
+
+# The GENERATE_TODOLIST tag can be used to enable (YES) or 
+# disable (NO) the todo list. This list is created by putting \todo 
+# commands in the documentation.
+
+GENERATE_TODOLIST      = YES
+
+# The GENERATE_TESTLIST tag can be used to enable (YES) or 
+# disable (NO) the test list. This list is created by putting \test 
+# commands in the documentation.
+
+GENERATE_TESTLIST      = YES
+
+# This tag can be used to specify a number of aliases that acts 
+# as commands in the documentation. An alias has the form "name=value". 
+# For example adding "sideeffect=\par Side Effects:\n" will allow you to 
+# put the command \sideeffect (or @sideeffect) in the documentation, which 
+# will result in a user defined paragraph with heading "Side Effects:". 
+# You can put \n's in the value part of an alias to insert newlines. 
+
+ALIASES                = 
+
+# The MAX_INITIALIZER_LINES tag determines the maximum number of lines 
+# the initial value of a variable or define consist of for it to appear in 
+# the documentation. If the initializer consists of more lines than specified 
+# here it will be hidden. Use a value of 0 to hide initializers completely. 
+# The appearance of the initializer of individual variables and defines in the 
+# documentation can be controlled using \showinitializer or \hideinitializer 
+# command in the documentation regardless of this setting. 
+
+MAX_INITIALIZER_LINES  = 30
+
+# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C sources 
+# only. Doxygen will then generate output that is more tailored for C. 
+# For instance some of the names that are used will be different. The list 
+# of all members will be omitted, etc. 
+
+OPTIMIZE_OUTPUT_FOR_C  = NO
+
+#---------------------------------------------------------------------------
+# configuration options related to warning and progress messages
+#---------------------------------------------------------------------------
+
+# The QUIET tag can be used to turn on/off the messages that are generated 
+# by doxygen. Possible values are YES and NO. If left blank NO is used. 
+
+QUIET                  = NO
+
+# The WARNINGS tag can be used to turn on/off the warning messages that are 
+# generated by doxygen. Possible values are YES and NO. If left blank 
+# NO is used. 
+
+WARNINGS               = YES
+
+# If WARN_IF_UNDOCUMENTED is set to YES, then doxygen will generate warnings 
+# for undocumented members. If EXTRACT_ALL is set to YES then this flag will 
+# automatically be disabled. 
+
+WARN_IF_UNDOCUMENTED   = YES
+
+# The WARN_FORMAT tag determines the format of the warning messages that 
+# doxygen can produce. The string should contain the $file, $line, and $text 
+# tags, which will be replaced by the file and line number from which the 
+# warning originated and the warning text. 
+
+WARN_FORMAT            = "$file:$line: $text"
+
+# The WARN_LOGFILE tag can be used to specify a file to which warning 
+# and error messages should be written. If left blank the output is written 
+# to stderr. 
+
+WARN_LOGFILE           = 
+
+#---------------------------------------------------------------------------
+# configuration options related to the input files
+#---------------------------------------------------------------------------
+
+# The INPUT tag can be used to specify the files and/or directories that contain 
+# documented source files. You may enter file names like "myfile.cpp" or 
+# directories like "/usr/src/myproject". Separate the files or directories 
+# with spaces. 
+
+INPUT                  = .
+
+# If the value of the INPUT tag contains directories, you can use the 
+# FILE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp 
+# and *.h) to filter out the source-files in the directories. If left 
+# blank all files are included. 
+
+FILE_PATTERNS          =  *.c *.h
+
+# The RECURSIVE tag can be used to turn specify whether or not subdirectories 
+# should be searched for input files as well. Possible values are YES and NO. 
+# If left blank NO is used. 
+
+RECURSIVE              = NO
+
+# The EXCLUDE tag can be used to specify files and/or directories that should 
+# excluded from the INPUT source files. This way you can easily exclude a 
+# subdirectory from a directory tree whose root is specified with the INPUT tag. 
+
+EXCLUDE                = 
+
+# If the value of the INPUT tag contains directories, you can use the 
+# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude 
+# certain files from those directories. 
+
+EXCLUDE_PATTERNS       = 
+
+# The EXAMPLE_PATH tag can be used to specify one or more files or 
+# directories that contain example code fragments that are included (see 
+# the \include command). 
+
+EXAMPLE_PATH           = 
+
+# If the value of the EXAMPLE_PATH tag contains directories, you can use the 
+# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp 
+# and *.h) to filter out the source-files in the directories. If left 
+# blank all files are included. 
+
+EXAMPLE_PATTERNS       = 
+
+# The IMAGE_PATH tag can be used to specify one or more files or 
+# directories that contain image that are included in the documentation (see 
+# the \image command). 
+
+IMAGE_PATH             = 
+
+# The INPUT_FILTER tag can be used to specify a program that doxygen should 
+# invoke to filter for each input file. Doxygen will invoke the filter program 
+# by executing (via popen()) the command <filter> <input-file>, where <filter> 
+# is the value of the INPUT_FILTER tag, and <input-file> is the name of an 
+# input file. Doxygen will then use the output that the filter program writes 
+# to standard output. 
+
+INPUT_FILTER           = 
+
+# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using 
+# INPUT_FILTER) will be used to filter the input files when producing source 
+# files to browse. 
+
+FILTER_SOURCE_FILES    = NO
+
+#---------------------------------------------------------------------------
+# configuration options related to the alphabetical class index
+#---------------------------------------------------------------------------
+
+# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index 
+# of all compounds will be generated. Enable this if the project 
+# contains a lot of classes, structs, unions or interfaces. 
+
+ALPHABETICAL_INDEX     = NO
+
+# If the alphabetical index is enabled (see ALPHABETICAL_INDEX) then 
+# the COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns 
+# in which this list will be split (can be a number in the range 1..20) 
+
+COLS_IN_ALPHA_INDEX    = 5
+
+# In case all classes in a project start with a common prefix, all 
+# classes will be put under the same header in the alphabetical index. 
+# The IGNORE_PREFIX tag can be used to specify one or more prefixes that 
+# should be ignored while generating the index headers. 
+
+IGNORE_PREFIX          = 
+
+#---------------------------------------------------------------------------
+# configuration options related to the HTML output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_HTML tag is set to YES (the default) Doxygen will 
+# generate HTML output. 
+
+GENERATE_HTML          = YES
+
+# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. 
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be 
+# put in front of it. If left blank `html' will be used as the default path. 
+
+HTML_OUTPUT            = html
+
+# The HTML_HEADER tag can be used to specify a personal HTML header for 
+# each generated HTML page. If it is left blank doxygen will generate a 
+# standard header.
+
+HTML_HEADER            = 
+
+# The HTML_FOOTER tag can be used to specify a personal HTML footer for 
+# each generated HTML page. If it is left blank doxygen will generate a 
+# standard footer.
+
+HTML_FOOTER            = 
+
+# The HTML_STYLESHEET tag can be used to specify a user defined cascading 
+# style sheet that is used by each HTML page. It can be used to 
+# fine-tune the look of the HTML output. If the tag is left blank doxygen 
+# will generate a default style sheet 
+
+HTML_STYLESHEET        = 
+
+# If the HTML_ALIGN_MEMBERS tag is set to YES, the members of classes, 
+# files or namespaces will be aligned in HTML using tables. If set to 
+# NO a bullet list will be used. 
+
+HTML_ALIGN_MEMBERS     = YES
+
+# If the GENERATE_HTMLHELP tag is set to YES, additional index files 
+# will be generated that can be used as input for tools like the 
+# Microsoft HTML help workshop to generate a compressed HTML help file (.chm) 
+# of the generated HTML documentation. 
+
+GENERATE_HTMLHELP      = NO
+
+# The DISABLE_INDEX tag can be used to turn on/off the condensed index at 
+# top of each HTML page. The value NO (the default) enables the index and 
+# the value YES disables it. 
+
+DISABLE_INDEX          = NO
+
+# This tag can be used to set the number of enum values (range 1..20) 
+# that doxygen will group on one line in the generated HTML documentation. 
+
+ENUM_VALUES_PER_LINE   = 4
+
+# If the GENERATE_TREEVIEW tag is set to YES, a side panel will be
+# generated containing a tree-like index structure (just like the one that 
+# is generated for HTML Help). For this to work a browser that supports 
+# JavaScript and frames is required (for instance Netscape 4.0+ 
+# or Internet explorer 4.0+). 
+
+GENERATE_TREEVIEW      = YES
+
+# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be 
+# used to set the initial width (in pixels) of the frame in which the tree 
+# is shown. 
+
+TREEVIEW_WIDTH         = 250
+
+#---------------------------------------------------------------------------
+# configuration options related to the LaTeX output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_LATEX tag is set to YES (the default) Doxygen will 
+# generate Latex output. 
+
+GENERATE_LATEX         = YES
+
+# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put. 
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be 
+# put in front of it. If left blank `latex' will be used as the default path. 
+
+LATEX_OUTPUT           = latex
+
+# If the COMPACT_LATEX tag is set to YES Doxygen generates more compact 
+# LaTeX documents. This may be useful for small projects and may help to 
+# save some trees in general. 
+
+COMPACT_LATEX          = NO
+
+# The PAPER_TYPE tag can be used to set the paper type that is used 
+# by the printer. Possible values are: a4, a4wide, letter, legal and 
+# executive. If left blank a4wide will be used. 
+
+PAPER_TYPE             = a4wide
+
+# The EXTRA_PACKAGES tag can be to specify one or more names of LaTeX 
+# packages that should be included in the LaTeX output. 
+
+EXTRA_PACKAGES         = 
+
+# The LATEX_HEADER tag can be used to specify a personal LaTeX header for 
+# the generated latex document. The header should contain everything until 
+# the first chapter. If it is left blank doxygen will generate a 
+# standard header. Notice: only use this tag if you know what you are doing! 
+
+LATEX_HEADER           = 
+
+# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated 
+# is prepared for conversion to pdf (using ps2pdf). The pdf file will 
+# contain links (just like the HTML output) instead of page references 
+# This makes the output suitable for online browsing using a pdf viewer. 
+
+PDF_HYPERLINKS         = NO
+
+# If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of 
+# plain latex in the generated Makefile. Set this option to YES to get a 
+# higher quality PDF documentation. 
+
+USE_PDFLATEX           = NO
+
+# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode. 
+# command to the generated LaTeX files. This will instruct LaTeX to keep 
+# running if errors occur, instead of asking the user for help. 
+# This option is also used when generating formulas in HTML. 
+
+LATEX_BATCHMODE        = NO
+
+#---------------------------------------------------------------------------
+# configuration options related to the RTF output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_RTF tag is set to YES Doxygen will generate RTF output 
+# The RTF output is optimised for Word 97 and may not look very pretty with 
+# other RTF readers or editors.
+
+GENERATE_RTF           = YES
+
+# The RTF_OUTPUT tag is used to specify where the RTF docs will be put. 
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be 
+# put in front of it. If left blank `rtf' will be used as the default path. 
+
+RTF_OUTPUT             = rtf
+
+# If the COMPACT_RTF tag is set to YES Doxygen generates more compact 
+# RTF documents. This may be useful for small projects and may help to 
+# save some trees in general. 
+
+COMPACT_RTF            = NO
+
+# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated 
+# will contain hyperlink fields. The RTF file will 
+# contain links (just like the HTML output) instead of page references. 
+# This makes the output suitable for online browsing using a WORD or other. 
+# programs which support those fields. 
+# Note: wordpad (write) and others do not support links. 
+
+RTF_HYPERLINKS         = NO
+
+# Load stylesheet definitions from file. Syntax is similar to doxygen's 
+# config file, i.e. a series of assignments. You only have to provide 
+# replacements, missing definitions are set to their default value. 
+
+RTF_STYLESHEET_FILE    = 
+
+#---------------------------------------------------------------------------
+# configuration options related to the man page output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_MAN tag is set to YES (the default) Doxygen will 
+# generate man pages 
+
+GENERATE_MAN           = YES
+
+# The MAN_OUTPUT tag is used to specify where the man pages will be put. 
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be 
+# put in front of it. If left blank `man' will be used as the default path. 
+
+MAN_OUTPUT             = man
+
+# The MAN_EXTENSION tag determines the extension that is added to 
+# the generated man pages (default is the subroutine's section .3) 
+
+MAN_EXTENSION          = .3
+
+#---------------------------------------------------------------------------
+# Configuration options related to the preprocessor   
+#---------------------------------------------------------------------------
+
+# If the ENABLE_PREPROCESSING tag is set to YES (the default) Doxygen will 
+# evaluate all C-preprocessor directives found in the sources and include 
+# files. 
+
+ENABLE_PREPROCESSING   = YES
+
+# If the MACRO_EXPANSION tag is set to YES Doxygen will expand all macro 
+# names in the source code. If set to NO (the default) only conditional 
+# compilation will be performed. Macro expansion can be done in a controlled 
+# way by setting EXPAND_ONLY_PREDEF to YES. 
+
+MACRO_EXPANSION        = NO
+
+# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES 
+# then the macro expansion is limited to the macros specified with the 
+# PREDEFINED and EXPAND_AS_PREDEFINED tags. 
+
+EXPAND_ONLY_PREDEF     = NO
+
+# If the SEARCH_INCLUDES tag is set to YES (the default) the includes files 
+# in the INCLUDE_PATH (see below) will be search if a #include is found. 
+
+SEARCH_INCLUDES        = YES
+
+# The INCLUDE_PATH tag can be used to specify one or more directories that 
+# contain include files that are not input files but should be processed by 
+# the preprocessor. 
+
+INCLUDE_PATH           = 
+
+# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard 
+# patterns (like *.h and *.hpp) to filter out the header-files in the 
+# directories. If left blank, the patterns specified with FILE_PATTERNS will 
+# be used. 
+
+INCLUDE_FILE_PATTERNS  = 
+
+# The PREDEFINED tag can be used to specify one or more macro names that 
+# are defined before the preprocessor is started (similar to the -D option of 
+# gcc). The argument of the tag is a list of macros of the form: name 
+# or name=definition (no spaces). If the definition and the = are 
+# omitted =1 is assumed. 
+
+PREDEFINED             = 
+
+# If the MACRO_EXPANSION and EXPAND_PREDEF_ONLY tags are set to YES then 
+# this tag can be used to specify a list of macro names that should be expanded. 
+# The macro definition that is found in the sources will be used. 
+# Use the PREDEFINED tag if you want to use a different macro definition. 
+
+EXPAND_AS_DEFINED      = 
+
+#---------------------------------------------------------------------------
+# Configuration::addtions related to external references   
+#---------------------------------------------------------------------------
+
+# The TAGFILES tag can be used to specify one or more tagfiles. 
+
+TAGFILES               = 
+
+# When a file name is specified after GENERATE_TAGFILE, doxygen will create 
+# a tag file that is based on the input files it reads. 
+
+GENERATE_TAGFILE       = 
+
+# If the ALLEXTERNALS tag is set to YES all external classes will be listed 
+# in the class index. If set to NO only the inherited external classes 
+# will be listed. 
+
+ALLEXTERNALS           = NO
+
+# The PERL_PATH should be the absolute path and name of the perl script 
+# interpreter (i.e. the result of `which perl'). 
+
+PERL_PATH              = /usr/bin/perl
+
+#---------------------------------------------------------------------------
+# Configuration options related to the dot tool   
+#---------------------------------------------------------------------------
+
+# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is 
+# available from the path. This tool is part of Graphviz, a graph visualization 
+# toolkit from AT&T and Lucent Bell Labs. The other options in this section 
+# have no effect if this option is set to NO (the default) 
+
+HAVE_DOT               = NO
+
+# If the CLASS_GRAPH and HAVE_DOT tags are set to YES then doxygen 
+# will generate a graph for each documented class showing the direct and 
+# indirect inheritance relations. Setting this tag to YES will force the 
+# the CLASS_DIAGRAMS tag to NO.
+
+CLASS_GRAPH            = YES
+
+# If the COLLABORATION_GRAPH and HAVE_DOT tags are set to YES then doxygen 
+# will generate a graph for each documented class showing the direct and 
+# indirect implementation dependencies (inheritance, containment, and 
+# class references variables) of the class with other documented classes. 
+
+COLLABORATION_GRAPH    = YES
+
+# If the ENABLE_PREPROCESSING, INCLUDE_GRAPH, and HAVE_DOT tags are set to 
+# YES then doxygen will generate a graph for each documented file showing 
+# the direct and indirect include dependencies of the file with other 
+# documented files. 
+
+INCLUDE_GRAPH          = YES
+
+# If the ENABLE_PREPROCESSING, INCLUDED_BY_GRAPH, and HAVE_DOT tags are set to 
+# YES then doxygen will generate a graph for each documented header file showing 
+# the documented files that directly or indirectly include this file 
+
+INCLUDED_BY_GRAPH      = YES
+
+# If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen 
+# will graphical hierarchy of all classes instead of a textual one. 
+
+GRAPHICAL_HIERARCHY    = YES
+
+# The tag DOT_PATH can be used to specify the path where the dot tool can be 
+# found. If left blank, it is assumed the dot tool can be found on the path. 
+
+DOT_PATH               = 
+
+# The MAX_DOT_GRAPH_WIDTH tag can be used to set the maximum allowed width 
+# (in pixels) of the graphs generated by dot. If a graph becomes larger than 
+# this value, doxygen will try to truncate the graph, so that it fits within 
+# the specified constraint. Beware that most browsers cannot cope with very 
+# large images. 
+
+MAX_DOT_GRAPH_WIDTH    = 1024
+
+# The MAX_DOT_GRAPH_HEIGHT tag can be used to set the maximum allows height 
+# (in pixels) of the graphs generated by dot. If a graph becomes larger than 
+# this value, doxygen will try to truncate the graph, so that it fits within 
+# the specified constraint. Beware that most browsers cannot cope with very 
+# large images. 
+
+MAX_DOT_GRAPH_HEIGHT   = 1024
+
+# If the GENERATE_LEGEND tag is set to YES (the default) Doxygen will 
+# generate a legend page explaining the meaning of the various boxes and 
+# arrows in the dot generated graphs. 
+
+GENERATE_LEGEND        = YES
+
+#---------------------------------------------------------------------------
+# Configuration::addtions related to the search engine   
+#---------------------------------------------------------------------------
+
+# The SEARCHENGINE tag specifies whether or not a search engine should be 
+# used. If set to NO the values of all tags below this one will be ignored. 
+
+SEARCHENGINE           = NO
+
+# The CGI_NAME tag should be the name of the CGI script that 
+# starts the search engine (doxysearch) with the correct parameters. 
+# A script with this name will be generated by doxygen. 
+
+CGI_NAME               = search.cgi
+
+# The CGI_URL tag should be the absolute URL to the directory where the 
+# cgi binaries are located. See the documentation of your http daemon for 
+# details. 
+
+CGI_URL                = 
+
+# The DOC_URL tag should be the absolute URL to the directory where the 
+# documentation is located. If left blank the absolute path to the 
+# documentation, with file:// prepended to it, will be used. 
+
+DOC_URL                = 
+
+# The DOC_ABSPATH tag should be the absolute path to the directory where the 
+# documentation is located. If left blank the directory on the local machine 
+# will be used. 
+
+DOC_ABSPATH            = 
+
+# The BIN_ABSPATH tag must point to the directory where the doxysearch binary 
+# is installed. 
+
+BIN_ABSPATH            = /usr/local/bin/
+
+# The EXT_DOC_PATHS tag can be used to specify one or more paths to 
+# documentation generated for other projects. This allows doxysearch to search 
+# the documentation for these projects as well. 
+
+EXT_DOC_PATHS          =

_service:tar_scm:nasm-2.16.03.tar.xz/misc/README Added

_service:tar_scm:nasm-2.16.03.tar.xz/misc/c16.mac Added

_service:tar_scm:nasm-2.16.03.tar.xz/misc/c32.mac Added

_service:tar_scm:nasm-2.16.03.tar.xz/misc/crcgen.c Added

@@ -0,0 +1,44 @@
+#include <inttypes.h>
+#include <stdio.h>
+
+int main(int argc, char *argv)
+{
+    /* Polynomial in bit-reversed notation */
+    uint64_t poly;
+    uint64_t crctab256, v;
+    int i, j;
+
+    poly = strtoumax(argv1, NULL, 0);
+
+    printf("/* C */\n");
+    printf("static const uint64_t crc64_tab256 = {\n");
+    for (i = 0; i < 256; i++) {
+	v = i;
+	for (j = 0; j < 8; j++)
+	    v = (v >> 1) ^ ((v & 1) ? poly : 0);
+	crctabi = v;
+    }
+
+    for (i = 0; i < 256; i += 2) {
+	printf("    /* %02x */ UINT64_C(0x%016"PRIx64"), "
+	       "UINT64_C(0x%016"PRIx64")%s\n",
+	       i, crctabi, crctabi+1, (i == 254) ? "" : ",");
+    }
+    printf("};\n\n");
+
+    printf("# perl\n");
+    printf("@crc64_tab = (\n");
+    for (i = 0; i < 256; i += 2) {
+	printf("    0x%08"PRIx32", 0x%08"PRIx32", "
+	       "0x%08"PRIx32", 0x%08"PRIx32"%-1s    # %02x\n",
+	       (uint32_t)(crctabi >> 32),
+	       (uint32_t)(crctabi),
+	       (uint32_t)(crctabi+1 >> 32),
+	       (uint32_t)(crctabi+1),
+	       (i == 254) ? "" : ",",
+	       i);
+    }
+    printf(");\n");
+
+    return 0;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/misc/emacstbl.pl Added

@@ -0,0 +1,215 @@
+#!/usr/bin/perl
+#
+# Automatically produce some tables useful for a NASM major mode
+#
+
+use integer;
+use strict;
+use File::Spec;
+
+my($outfile, $srcdir, $objdir) = @ARGV;
+
+if (!defined($outfile)) {
+    die "Usage: $0 outfile srcdir objdir\n";
+}
+
+$srcdir = File::Spec->curdir() unless (defined($srcdir));
+$objdir = $srcdir unless (defined($objdir));
+
+my %tokens = ();
+
+sub xpush($@) {
+    my $ref = shift @_;
+
+    $$ref =  unless (defined($$ref));
+    return push(@$$ref, @_);
+}
+
+# Combine some specific token types
+my %override = ( 'id' => 'special',
+		 'float' => 'function',
+		 'floatize' => 'function',
+		 'strfunc' => 'function',
+		 'ifunc' => 'function',
+		 'insn' => 'instruction',
+		 'reg' => 'register',
+		 'seg' => 'special',
+		 'wrt' => 'special' );
+
+sub read_tokhash_c($) {
+    my($tokhash_c) = @_;
+
+    open(my $th, '<', $tokhash_c)
+	or die "$0:$tokhash_c: $!\n";
+
+    my $l;
+    my $tokendata = 0;
+    while (defined($l = <$th>)) {
+	if ($l =~ /\bstruct tokendata tokendata\/) {
+	    $tokendata = 1;
+	    next;
+	} elsif (!$tokendata) {
+	    next;
+	}
+
+	last if ($l =~ /\}\;/);
+
+	if ($l =~ /^\s*\{\s*\"(.*?)\",.*?,\s*TOKEN_(\w+),.*\}/) {
+	    my $token = $1;
+	    my $type  = lc($2);
+
+	    if ($override{$type}) {
+		$type = $override{$type};
+	    } elsif ($token !~ /^\w/) {
+		$type = 'operator';
+	    } elsif ($token =~ /^__\?masm_.*\?__$/) {
+		next;
+	    }
+	    xpush(\$tokens{$type}, $token);
+	    if ($token =~ /^__\?(.*)\?__$/) {
+		# Also encode the "user" (macro) form without __?...?__
+		xpush(\$tokens{$type}, $1);
+	    }
+	}
+    }
+    close($th);
+}
+
+sub read_pptok_c($) {
+    my($pptok_c) = @_;
+
+    open(my $pt, '<', $pptok_c)
+	or die "$0:$pptok_c: $!\n";
+
+    my $l;
+    my $pp_dir = 0;
+
+    while (defined($l = <$pt>)) {
+	if ($l =~ /\bpp_directives\/) {
+	    $pp_dir = 1;
+	    next;
+	} elsif (!$pp_dir) {
+	    next;
+	}
+
+	last if ($l =~ /\}\;/);
+
+	if ($l =~ /^\s*\"(.*?)\"/) {
+	    xpush(\$tokens{'pp-directive'}, $1);
+	}
+    }
+    close($pt);
+}
+
+sub read_directiv_dat($) {
+    my($directiv_dat) = @_;
+
+    open(my $dd, '<', $directiv_dat)
+	or die "$0:$directiv_dat: $!\n";
+
+    my $l;
+    my $directiv = 0;
+
+    while (defined($l = <$dd>)) {
+	if ($l =~ /^\; ---.*?(pragma)?/) {
+	    $directiv = ($1 ne 'pragma');
+	    next;
+	} elsif (!$directiv) {
+	    next;
+	}
+
+	if ($l =~ /^\s*(\w+)/) {
+	    xpush(\$tokens{'directive'}, $1);
+	}
+    }
+
+    close($dd);
+}
+
+my $version;
+sub read_version($) {
+    my($vfile) = @_;
+    open(my $v, '<', $vfile)
+	or die "$0:$vfile: $!\n";
+
+    $version = <$v>;
+    chomp $version;
+
+    close($v);
+}
+
+sub make_lines($$@) {
+    my $maxline = shift @_;
+    my $indent  = shift @_;
+
+    # The first line isn't explicitly indented and the last line
+    # doesn't end in "\n"; assumed the surrounding formatter wants
+    # do control that
+    my $linepos   = 0;
+    my $linewidth = $maxline - $indent;
+
+    my $line = '';
+    my @lines = ();
+
+    foreach my $w (@_) {
+	my $l = length($w);
+
+	if ($linepos > 0 && $linepos+$l+1 >= $linewidth) {
+	    $line .= "\n" . (' ' x $indent);
+	    push(@lines, $line);
+	    $linepos = 0;
+	    $line = '';
+	}
+	if ($linepos > 0) {
+	    $line .= ' ';
+	    $linepos++;
+	}
+	$line .= $w;
+	$linepos += $l;
+    }
+
+    if ($linepos > 0) {
+	push(@lines, $line);
+    }
+
+    return @lines;
+}
+
+sub quote_for_emacs(@) {
+    return map { s/\\\"\'/\\$1/g; '"'.$_.'"' } @_;
+}
+
+sub write_output($) {
+    my($outfile) = @_;
+
+    open(my $out, '>', $outfile)
+	or die "$0:$outfile: $!\n";
+
+    my($vol,$dir,$file) = File::Spec->splitpath($outfile);
+
+    print $out ";;; ${file} --- lists of NASM assembler tokens\n";
+    print $out ";;;\n";
+    print $out ";;; This file contains list of tokens from the NASM x86\n";
+    print $out ";;; assembler, automatically extracted from NASM ${version}.\n";
+    print $out ";;;\n";
+    print $out ";;; This file is intended to be (require)d from a `nasm-mode\'\n";
+    print $out ";;; major mode definition.\n";
+
+    foreach my $type (sort keys(%tokens)) {
+	print $out "\n(defconst nasm-${type}\n";
+	print $out "  \'(";
+
+	print $out make_lines(78, 4, quote_for_emacs(sort @{$tokens{$type}}));
+	print $out ")\n";
+	print $out "  \"NASM ${version} ${type} tokens for `nasm-mode\'.\")\n";
+    }
+
+    close($out);
+}
+
+read_tokhash_c(File::Spec->catfile($objdir, 'asm', 'tokhash.c'));
+read_pptok_c(File::Spec->catfile($objdir, 'asm', 'pptok.c'));
+read_directiv_dat(File::Spec->catfile($srcdir, 'asm', 'directiv.dat'));
+read_version(File::Spec->catfile($srcdir, 'version'));
+
+write_output($outfile);

_service:tar_scm:nasm-2.16.03.tar.xz/misc/exebin.mac Added

@@ -0,0 +1,57 @@
+; -*- nasm -*-
+; NASM macro file to allow the `bin' output format to generate
+; simple .EXE files by constructing the EXE header by hand.
+; Adapted from a contribution by Yann Guidon <whygee_corp@hol.fr>
+
+%define EXE_stack_size EXE_realstacksize
+
+%macro EXE_begin 0
+	  ORG 0E0h
+	  section .text
+
+header_start:
+	  db 4Dh,5Ah		; EXE file signature
+	  dw EXE_allocsize % 512
+	  dw (EXE_allocsize + 511) / 512
+	  dw 0			; relocation information: none
+	  dw (header_end-header_start)/16 ; header size in paragraphs
+	  dw (EXE_absssize + EXE_realstacksize) / 16 ; min extra mem
+	  dw (EXE_absssize + EXE_realstacksize) / 16 ; max extra mem
+	  dw -10h		; Initial SS (before fixup)
+	  dw EXE_endbss + EXE_realstacksize ; Initial SP (1K DPMI+1K STACK)
+	  dw 0			; (no) Checksum
+	  dw 100h		; Initial IP - start just after the header
+	  dw -10h		; Initial CS (before fixup)
+	  dw 0			; file offset to relocation table: none
+	  dw 0			; (no overlay)
+	  align 16,db 0
+header_end:
+
+EXE_startcode:
+	  section .data
+EXE_startdata:
+	  section .bss
+EXE_startbss:
+%endmacro
+
+%macro EXE_stack 1
+EXE_realstacksize equ %1
+%define EXE_stack_size EXE_bogusstacksize ; defeat EQU in EXE_end
+%endmacro
+
+%macro EXE_end 0
+	  section .text
+EXE_endcode:
+	  section .data
+EXE_enddata:
+	  section .bss
+	  alignb 4
+EXE_endbss:
+
+EXE_acodesize equ (EXE_endcode-EXE_startcode+3) & (~3)
+EXE_datasize equ EXE_enddata-EXE_startdata
+EXE_absssize equ (EXE_endbss-EXE_startbss+3) & (~3)
+EXE_allocsize equ EXE_acodesize + EXE_datasize
+
+EXE_stack_size equ 0x800	; default if nothing else was used
+%endmacro

_service:tar_scm:nasm-2.16.03.tar.xz/misc/exebin2.mac Added

@@ -0,0 +1,114 @@
+; -*- nasm -*-
+
+; NASM macro file to allow the `bin' output format to generate
+
+; simple .EXE files by constructing the EXE header by hand.
+
+; Adapted from a contribution by Yann Guidon <whygee_corp@hol.fr>
+
+
+
+%define EXE_stack_size EXE_realstacksize
+
+
+
+%macro EXE_begin 0
+
+	  ORG 0E0h
+
+	  section .text
+
+
+
+header_start:
+
+	  db 4Dh,5Ah		; EXE file signature
+
+	  dw EXE_allocsize % 512
+
+	  dw (EXE_allocsize + 511) / 512
+
+	  dw 0			; relocation information: none
+
+	  dw (header_end-header_start)/16 ; header size in paragraphs
+
+	  dw (EXE_absssize + EXE_realstacksize) / 16 ; min extra mem
+
+	  dw (EXE_absssize + EXE_realstacksize) / 16 ; max extra mem
+
+	  dw -10h		; Initial SS (before fixup)
+
+	  dw EXE_endbss + EXE_realstacksize ; Initial SP (1K DPMI+1K STACK)
+
+	  dw 0			; (no) Checksum
+
+	  dw 100h		; Initial IP - start just after the header
+
+	  dw -10h		; Initial CS (before fixup)
+
+	  dw 0			; file offset to relocation table: none
+
+	  dw 0			; (no overlay)
+
+	  align 16,db 0
+
+header_end:
+
+
+
+EXE_startcode:
+
+	  section .data
+
+EXE_startdata:
+
+	  section .bss
+
+EXE_startbss:
+
+%endmacro
+
+
+
+%macro EXE_stack 1
+
+EXE_realstacksize equ %1
+
+%define EXE_stack_size EXE_bogusstacksize ; defeat EQU in EXE_end
+
+%endmacro
+
+
+
+%macro EXE_end 0
+
+	  section .text
+
+EXE_endcode:
+
+	  section .data
+
+EXE_enddata:
+
+	  section .bss
+
+	  alignb 4
+
+EXE_endbss:
+
+
+
+EXE_acodesize equ (EXE_endcode-EXE_startcode+3) & (~3)
+
+EXE_datasize equ EXE_enddata-EXE_startdata
+
+EXE_absssize equ (EXE_endbss-EXE_startbss+3) & (~3)
+
+EXE_allocsize equ EXE_acodesize + EXE_datasize
+
+
+
+EXE_stack_size equ 0x800	; default if nothing else was used
+
+%endmacro
+

_service:tar_scm:nasm-2.16.03.tar.xz/misc/fmtinsns.pl Added

_service:tar_scm:nasm-2.16.03.tar.xz/misc/genfma.pl Added

@@ -0,0 +1,63 @@
+#!/usr/bin/perl
+%packed_insns = (
+    'vfmadd'    => 0x98,
+    'vfmaddsub' => 0x96,
+    'vfmsubadd' => 0x97,
+    'vfmsub'    => 0x9a,
+    'vfnmadd'   => 0x9c,
+    'vfnmsub'   => 0x9e
+    );
+
+%scalar_insns = (
+    'vfmadd'    => 0x99,
+    'vfmsub'    => 0x9b,
+    'vfnmadd'   => 0x9d,
+    'vfnmsub'   => 0x9f
+    );
+
+foreach $pi ( sort(keys(%packed_insns)) ) {
+    $op = $packed_insns{$pi};
+    foreach $order ('132', '213', '231') {
+	$xorder = substr($order,1,1).substr($order,0,1).substr($order,2,1);
+	foreach $o ($order, $xorder) {
+	    for ($w = 0; $w < 2; $w++) {
+		$suf = $w  ? 'pd' : 'ps';
+		for ($l = 128; $l <= 256; $l <<= 1) {
+		    $sx  = ($l == 256) ? 'SY' : 'SO';
+		    $mm  = ($l == 256) ? 'ymm' : 'xmm';
+		    printf "%-15s %-31s %-8s%-39s %s\n",
+		    	"\U${pi}${o}${suf}",
+			"${mm}reg,${mm}reg,${mm}rm",
+		    	"rvm:",
+		        sprintf("vex.dds.%d.66.0f38.w%d %02x /r",
+			    $l, $w, $op),
+		    "FMA,FUTURE,${sx}";
+		}
+	    }
+	}
+	$op += 0x10;
+    }
+}
+
+foreach $si ( sort(keys(%scalar_insns)) ) {
+    $op = $scalar_insns{$si};
+    foreach $order ('132', '213', '231') {
+	$xorder = substr($order,1,1).substr($order,0,1).substr($order,2,1);
+	foreach $o ($order, $xorder) {
+	    for ($w = 0; $w < 2; $w++) {
+		$suf = $w ? 'sd' : 'ss';
+		$sx  = $w ? 'SQ' : 'SD';
+		$l  = 128;
+		$mm  = 'xmm';
+		printf "%-15s %-31s %-8s%-39s %s\n",
+		    "\U${si}${o}${suf}",
+		    "${mm}reg,${mm}reg,${mm}rm",
+		    'rvm:',
+		    sprintf("vex.dds.%d.66.0f38.w%d %02x /r",
+			$l, $w, $op),
+		"FMA,FUTURE,${sx}";
+	    }
+	}
+	$op += 0x10;
+    }
+}

_service:tar_scm:nasm-2.16.03.tar.xz/misc/hints.txt Added

_service:tar_scm:nasm-2.16.03.tar.xz/misc/magic Added

_service:tar_scm:nasm-2.16.03.tar.xz/misc/myC32.mac Added

@@ -0,0 +1,121 @@
+; NASM macro set to make interfacing to 32-bit programs easier
+; Also cool little macros to make NASM emulate some MASM things.
+;
+; Originally included in NASM.  Modifications by Peter Johnson, 1999.
+;
+
+%imacro proc 1                  ; begin a procedure definition
+%push proc
+          global %1
+%1:       push  ebp
+          mov   ebp, esp
+%assign %$arg 8
+;%assign %$argnum 0
+%define %$procname %1
+%endmacro
+
+%imacro arg 0-1 4               ; used with the argument name as a label
+%00       equ %$arg
+;%assign %$argnum %$argnum+1
+;.arg%$argnum   equ     %1
+%assign %$arg %1+%$arg
+%endmacro
+
+%imacro endproc 0
+%ifnctx proc
+%error Mismatched `endproc'/`proc'
+%else
+;        mov     esp, ebp
+;        pop     ebp
+%ifdef LEGACY_ENDPROC
+        ret
+%endif
+;__end_%$procname:               ; useful for calculating function size
+;          global %{$procname}_arglen
+;%{$procname}_arglen    equ     %$arg-8
+;%assign %$i 1
+;%rep %$argnum
+;          global %{$procname}_arg%$i
+;%{$procname}_arg%$i    equ     %{$procname}.arg%$i
+;%assign %$i %$i+1
+;%endrep
+%pop
+%endif
+%endmacro
+
+; redefine ret instructions for in-proc cases
+%imacro ret 0-1
+%ifnctx proc
+	ret	%1
+%else
+	mov	esp, ebp
+	pop	ebp
+	ret	%1
+%endif
+%endmacro
+
+%imacro retf 0-1
+%ifnctx proc
+	retf	%1
+%else
+	mov	esp, ebp
+	pop	ebp
+	retf	%1
+%endif
+%endmacro
+
+%imacro retn 0-1
+%ifnctx proc
+	retn	%1
+%else
+	mov	esp, ebp
+	pop	ebp
+	retn	%1
+%endif
+%endmacro
+
+; invoke calls a C function
+; defaults to word (16 bit) size parameters
+%macro invoke 1-*
+%rotate -1
+;%define invoketype word
+%rep (%0-1)
+;       %ifidni %1,dword
+;               %define invoketype dword
+;       %elifidni %1,word
+;               %define invoketype word
+;       %elifidni %1,byte
+;               %define invoketype byte
+;       %else
+        %ifidni %1, cs
+                o16 push %1
+        %elifidni %1, ds
+                o16 push %1
+        %elifidni %1, es
+                o16 push %1
+        %elifidni %1, fs
+                o16 push %1
+        %elifidni %1, gs
+                o16 push %1
+        %elifidni %1, word cs
+                o16 push %1
+        %elifidni %1, word ds
+                o16 push %1
+        %elifidni %1, word es
+                o16 push %1
+        %elifidni %1, word fs
+                o16 push %1
+        %elifidni %1, word gs
+                o16 push %1
+        %else
+                push %1
+        %endif
+;       %endif
+        %rotate -1
+%endrep
+call %1
+%if (%0!=1)
+        add esp, byte %{1}_arglen
+%endif
+%endmacro
+

_service:tar_scm:nasm-2.16.03.tar.xz/misc/nasm.sl Added

@@ -0,0 +1,320 @@
+% This file defines a NASM editor mode for the JED editor.
+% JED's home page is http://space.mit.edu/~davis/jed.html.
+%
+% To install, copy this file into your JED_LIBRARY directory
+% (/usr/local/jed/lib or C:\JED\LIB or whatever), then add the
+% following lines to your .jedrc or jed.rc file:
+%   autoload("nasm_mode", "nasm");
+%   add_mode_for_extension("nasm", "asm");
+% (you can of course replace "asm" with whatever file extension
+% you like to use for your NASM source files).
+
+variable Nasm_Instruction_Indent = 10;
+variable Nasm_Comment_Column = 33;
+variable Nasm_Comment_Space = 1;
+
+variable nasm_kw_2 = strcat("ahalaxbhblbpbtbxchclcscxdbdddhdidldqdsdtdwdxes",
+			    "fsgsinjajbjcjejgjljojpjsjzorsispssto");
+variable nasm_kw_3 = strncat("a16a32aaaaadaamaasadcaddandbsfbsrbtcbtrbtscbw",
+			     "cdqclccldclicmccmpcr0cr2cr3cr4cwddaadasdecdiv",
+			     "dr0dr1dr2dr3dr6dr7eaxebpebxecxediedxequesiesp",
+			     "farfldfsthltincintjaejbejgejlejmpjnajnbjncjne",
+			     "jngjnljnojnpjnsjnzjpejpolarldslealeslfslgslsl",
+			     "lssltrmm0mm1mm2mm3mm4mm5mm6mm7movmulnegnopnot",
+			     "o16o32outpopporrclrcrrepretrolrorrsmsalsarsbb",
+			     "segshlshrsmist0st1st2st3st4st5st6st7stcstdsti",
+			     "strsubtr3tr4tr5tr6tr7wrtxor", 9);
+variable nasm_kw_4 = strncat("arplbytecallcltscwdeemmsfabsfaddfbldfchsfcom",
+			     "fcosfdivfenifildfistfld1fldzfmulfnopfsinfstp",
+			     "fsubftstfxamfxchibtsidivimulinsbinsdinswint1",
+			     "int3intoinvdiretjcxzjnaejnbejngejnlelahflgdt",
+			     "lidtlldtlmswlocklongloopmovdmovqnearpandpopa",
+			     "popfpushpxorreperepzresbresdresqrestreswretf",
+			     "retnsahfsalcsetasetbsetcsetesetgsetlsetosetp",
+			     "setssetzsgdtshldshrdsidtsldtsmswtestumovverr",
+			     "verwwaitwordxaddxbtsxchg", 9);
+variable nasm_kw_5 = strncat("boundbswapcmovacmovbcmovccmovecmovgcmovlcmovo",
+			     "cmovpcmovscmovzcmpsbcmpsdcmpswcpuiddwordenter",
+			     "f2xm1faddpfbstpfclexfcomifcompfdisifdivpfdivr",
+			     "ffreefiaddficomfidivfimulfinitfistpfisubfldcw",
+			     "fldpifmulpfpremfptanfsavefsqrtfstcwfstswfsubp",
+			     "fsubrfucomfyl2xicebpint01iretdiretwjecxzleave",
+			     "lodsblodsdlodswloopeloopzmovsbmovsdmovswmovsx",
+			     "movzxoutsboutsdoutswpaddbpadddpaddwpandnpopad",
+			     "popawpopfdpopfwpslldpsllqpsllwpsradpsrawpsrld",
+			     "psrlqpsrlwpsubbpsubdpsubwpushapushfqwordrdmsr",
+			     "rdpmcrdtscrepnerepnzscasbscasdscaswsetaesetbe",
+			     "setgesetlesetnasetnbsetncsetnesetngsetnlsetno",
+			     "setnpsetnssetnzsetpesetposhortstosbstosdstosw",
+			     "timestwordwrmsrxlatb", 14);
+variable nasm_kw_6 = strncat("cmovaecmovbecmovgecmovlecmovnacmovnbcmovnc",
+			     "cmovnecmovngcmovnlcmovnocmovnpcmovnscmovnz",
+			     "cmovpecmovpofcmovbfcmovefcmovufcomipfcompp",
+			     "fdivrpficompfidivrfisubrfldenvfldl2efldl2t",
+			     "fldlg2fldln2fpatanfprem1frstorfscalefsetpm",
+			     "fstenvfsubrpfucomifucompincbininvlpgloopne",
+			     "loopnzpaddsbpaddswpmulhwpmullwpsubsbpsubsw",
+			     "pushadpushawpushfdpushfwsetnaesetnbesetnge",
+			     "setnlewbinvd", 9);
+variable nasm_kw_7 = strncat("cmovnaecmovnbecmovngecmovnlecmpxchgfcmovbe",
+			     "fcmovnbfcmovnefcmovnufdecstpfincstpfrndint",
+			     "fsincosfucomipfucomppfxtractfyl2xp1loadall",
+			     "paddusbpadduswpcmpeqbpcmpeqdpcmpeqwpcmpgtb",
+			     "pcmpgtdpcmpgtwpmaddwdpsubusbpsubusw", 5);
+variable nasm_kw_8 = "fcmovnbepackssdwpacksswbpackuswb";
+variable nasm_kw_9 = strcat("cmpxchg8bpunpckhbwpunpckhdqpunpckhwdpunpcklbw",
+			    "punpckldqpunpcklwd");
+variable nasm_kw_10 = "cmpxchg486loadall286";
+
+define nasm_indent_line() {
+    variable word, len, e, c;
+
+    e = eolp();
+
+    push_spot();
+    EXIT_BLOCK {
+	pop_spot();
+	if (what_column() <= Nasm_Instruction_Indent)
+	    skip_white();
+    }
+
+    bol_skip_white();
+    c = what_column();
+
+    if (orelse
+       {looking_at_char(';')}
+       {looking_at_char('#')}
+       {looking_at_char('')}) {
+	bol_trim();
+	pop_spot();
+	EXIT_BLOCK {
+	}
+	return;
+    }
+
+    if (looking_at_char('%')) {
+	go_right_1();
+	!if (orelse
+	    {looking_at_char('$')}
+	    {looking_at_char('%')}
+	    {looking_at_char('+')}
+	    {looking_at_char('-')}
+	    {looking_at_char('0')}
+	    {looking_at_char('1')}
+	    {looking_at_char('2')}
+	    {looking_at_char('3')}
+	    {looking_at_char('4')}
+	    {looking_at_char('5')}
+	    {looking_at_char('6')}
+	    {looking_at_char('7')}
+	    {looking_at_char('8')}
+	    {looking_at_char('9')}) {
+	    bol_trim();
+	    pop_spot();
+	    EXIT_BLOCK {
+	    }
+	    return;
+	}
+	go_left_1();
+    }
+
+    push_mark();
+    skip_chars("%$+-");
+    skip_chars("0-9a-zA-Z_.");
+    word = bufsubstr();
+
+    if (orelse
+       {c == 1}
+       {looking_at_char(':')}) {
+	push_spot();
+	bol_trim();
+	pop_spot();
+	len = strlen(word);
+	if (looking_at_char(':')) {
+	    go_right_1();
+	    len++;
+	}
+	trim();
+	if (e or not(eolp())) {
+	    if (len >= Nasm_Instruction_Indent) {
+		pop();
+		whitespace(1);
+	    } else
+		whitespace(Nasm_Instruction_Indent - len);
+	    if (e) {
+		pop_spot();
+		eol();
+		push_spot();
+	    }
+	}
+    } else {
+	bol_trim();
+	whitespace(Nasm_Instruction_Indent);
+    }
+}
+
+define nasm_newline_indent() {
+    push_spot();
+    bol_skip_white();
+    if (eolp())
+	trim();
+    pop_spot();
+    newline();
+    nasm_indent_line();
+}
+
+define nasm_bol_self_ins() {
+    push_spot();
+    bskip_white();
+    bolp();
+    pop_spot();
+
+    call("self_insert_cmd");
+
+    % Grotty: force immediate update of the syntax highlighting.
+    insert_char('.');
+    deln(left(1));
+
+    if (())
+	nasm_indent_line();
+}
+
+define nasm_self_ins_ind() {
+    call("self_insert_cmd");
+
+    % Grotty: force immediate update of the syntax highlighting.
+    insert_char('.');
+    deln(left(1));
+
+    nasm_indent_line();
+}
+
+define nasm_insert_comment() {
+    variable spc;
+
+    bol_skip_white();
+    if (looking_at_char(';')) {
+	bol_trim();
+	go_right(1);
+	skip_white();
+	return;
+    } else if (eolp()) {
+	bol_trim();
+	insert("; ");
+	return;
+    }
+
+    forever {
+	skip_chars("^;\n'\"");
+	if (looking_at_char('\'')) {
+	    go_right_1();
+	    skip_chars("^'\n");
+	    !if (eolp())
+		go_right_1();
+	} else if (looking_at_char('\"')) {
+	    go_right_1();
+	    skip_chars("^\"\n");
+	    !if (eolp())
+		go_right_1();
+	} else if (looking_at_char(';')) {
+	    !if (bolp()) {
+		go_left_1();
+		trim();
+		!if (looking_at_char(';'))
+		    go_right_1();
+	    }
+	    break;
+	} else {
+	    break;
+	}
+    }
+    spc = Nasm_Comment_Column - what_column();
+    if (spc < Nasm_Comment_Space)
+	spc = Nasm_Comment_Space;
+    whitespace(spc);
+    if (eolp()) {
+	insert("; ");
+    } else {
+	go_right_1();
+	skip_white();
+    }
+}
+
+$1 = "NASM";
+create_syntax_table($1);
+
+define_syntax (";", "", '%', $1);
+define_syntax ("(", ")", '(', $1);
+define_syntax ('"', '"', $1);
+define_syntax ('\'', '\'', $1);
+define_syntax ("0-9a-zA-Z_.@#", 'w', $1);
+define_syntax ("-+0-9a-fA-F.xXL", '0', $1);
+define_syntax (",:", ',', $1);
+define_syntax ('%', '#', $1);
+define_syntax ("|^&<>+-*/%~", '+', $1);
+
+set_syntax_flags($1,1);
+
+#ifdef HAS_DFA_SYNTAX
+
+dfa_enable_highlight_cache("nasm.dfa", $1);
+dfa_define_highlight_rule(";.*$", "comment", $1);
+dfa_define_highlight_rule("A-Za-z_\\.\\?A-Za-z0-9_\\.\\?\\$#@~*",
+		      "Knormal", $1);
+dfa_define_highlight_rule("$(A-Za-z_\\.\\?A-Za-z0-9_\\.\\?\\$#@~*)?",
+		      "normal", $1);
+dfa_define_highlight_rule("0-9+(\\.0-9*)?(Ee\\+\\-?0-9*)?",
+		      "number", $1);
+dfa_define_highlight_rule("0-9+QqBb", "number", $1);
+dfa_define_highlight_rule("(0x|\\$0-9A-Fa-f)0-9A-Fa-f*", "number", $1);
+dfa_define_highlight_rule("0-9A-Fa-f+Hh", "number", $1);
+dfa_define_highlight_rule("\"^\"*\"", "string", $1);
+dfa_define_highlight_rule("\"^\"*$", "string", $1);
+dfa_define_highlight_rule("'^'*'", "string", $1);
+dfa_define_highlight_rule("'^'*$", "string", $1);
+dfa_define_highlight_rule("\$\$\\\\,:*", "delimiter", $1);
+dfa_define_highlight_rule("^ \t*#", "PQpreprocess", $1);
+dfa_define_highlight_rule("^ \t*\\%{?^%\\$\\+\\-0-9", "PQpreprocess", $1);
+dfa_define_highlight_rule("^%$", "preprocess", $1);
+dfa_define_highlight_rule("\\|\\^&<>\\+\\-\\*/%~*", "operator", $1);
+dfa_define_highlight_rule("%(%\\$?-?0-9A-Za-z_\\.\\?\\$~@+|{^}*}?)",
+		      "preprocess", $1);
+dfa_define_highlight_rule(" \t*", "normal", $1);
+dfa_define_highlight_rule(".", "normal", $1);
+dfa_build_highlight_table($1);
+#endif
+
+define_keywords_n($1, nasm_kw_2, 2, 0);
+define_keywords_n($1, nasm_kw_3, 3, 0);
+define_keywords_n($1, nasm_kw_4, 4, 0);
+define_keywords_n($1, nasm_kw_5, 5, 0);
+define_keywords_n($1, nasm_kw_6, 6, 0);
+define_keywords_n($1, nasm_kw_7, 7, 0);
+define_keywords_n($1, nasm_kw_8, 8, 0);
+define_keywords_n($1, nasm_kw_9, 9, 0);
+define_keywords_n($1, nasm_kw_10, 10, 0);
+
+define_keywords_n($1, "org", 3, 1);
+define_keywords_n($1, "bitsiend", 4, 1);
+define_keywords_n($1, "aligngroupstruc", 5, 1);
+define_keywords_n($1, "alignbcommonexternglobalistruc", 6, 1);
+define_keywords_n($1, "sectionsegmentlibrary", 7, 1);
+define_keywords_n($1, "absoluteendstruc", 8, 1);
+define_keywords_n($1, "uppercase", 9, 1);
+
+!if (keymap_p ($1)) make_keymap ($1);
+definekey("nasm_bol_self_ins", ";", $1);
+definekey("nasm_bol_self_ins", "#", $1);
+definekey("nasm_bol_self_ins", "%", $1);
+definekey("nasm_bol_self_ins", "", $1);
+definekey("nasm_self_ins_ind", ":", $1);
+definekey("nasm_insert_comment", "^;", $1);
+
+define nasm_mode() {
+    set_mode("NASM", 4);
+    use_keymap ("NASM");
+    use_syntax_table ("NASM");
+    set_buffer_hook ("indent_hook", "nasm_indent_line");
+    set_buffer_hook ("newline_indent_hook", "nasm_newline_indent");
+    runhooks("nasm_mode_hook");
+}

_service:tar_scm:nasm-2.16.03.tar.xz/misc/nasmstab Added

@@ -0,0 +1,296 @@
+#!/usr/bin/perl
+ 
+sub StabLine  ($ $ $ $ $ $) {
+        local ($comment,$n_strx,$type,$other,$desc,$value) = @_;
+        print $comment;
+        print "","dd",$n_strx;
+        print "","db",$type;
+        print "","db",$other;
+        print "","dw",$desc;
+        print "","dd","0" . $value . "h";
+}
+
+sub RStabLine  ($ $ $ $ $) {
+        local ($comment,$offset,$info,$type,$symbol) = @_;
+        print $comment;
+        print "","dd",$offset;
+        print "","db",$type;
+        print "","db",$symbol;
+        print "","dw",$info;
+}
+
+#this sub exists because i've no idea how to print non-ascii numbers in perl
+
+sub OutBin ( $ $ ) {
+        local ($offset, $shnum) = @_;
+        seek(FINAL,$offset,0);
+        if ( $shnum == 2 ) { printf FINAL "\x02" } ;
+        if ( $shnum == 3 ) { printf FINAL "\x03" } ;
+        if ( $shnum == 4 ) { printf FINAL "\x04" } ;
+        if ( $shnum == 5 ) { printf FINAL "\x05" } ;
+        if ( $shnum == 6 ) { printf FINAL "\x06" } ;
+        if ( $shnum == 7 ) { printf FINAL "\x07" } ;
+        if ( $shnum == 8 ) { printf FINAL "\x08" } ;
+        if ( $shnum == 9 ) { printf FINAL "\x09" } ;
+        if ( $shnum == 10 ) { printf FINAL "\x0a" } ;
+        if ( $shnum == 11 ) { printf FINAL "\x0b" } ;
+        if ( $shnum == 12 ) { printf FINAL "\x0c" } ;
+        if ( $shnum == 13 ) { printf FINAL "\x0d" } ;
+        if ( $shnum == 14 ) { printf FINAL "\x0e" } ;
+        if ( $shnum == 15 ) { printf FINAL "\x0f" } ;
+}
+
+sub DispHelp () {
+        $\="\n";
+        print "Usage:";
+        print "\t-f,--input-file";
+        print "\t\tThe input file name (only required option)";
+        print "\t-o,--output-file";
+        print "\t\tThe output file name (if not specified, *.asm becomes *.o";
+        print "\t\tand anything else becomes a.out)";
+        print "\t-l,--list-file";
+        print "\t\tThe listing file's name (default: trailing .asm is
+removed";
+        print "\t\tif there and .lst is appended)";
+        print "\t-s,--second-asm-file";
+        print "\t\tThe second asm file's name (default: trailing .asm is";
+        print "\t\tremoved if there and .nasm is appended)";
+        print "\n";
+        exit ;
+}
+
+if ( $ARGV0 eq "" ) { $ARGV0 = "-h" };
+
+$i = 0;
+$filename = "";
+$outname  = "";
+
+while ( $ARGV$i ne "" ) {
+        $_ = $ARGV$i;
+        if ( m/^-/ ) {
+                if ( m/^-f$/ ) { $filename = $ARGV++$i };
+                if ( m/^-o$/ ) { $outname  = $ARGV++$i };
+                if ( m/^-l$/ ) { $listname = $ARGV++$i };
+                if ( m/^-s$/ ) { $asmname  = $ARGV++$i };
+                if ( m/^-h$/ ) { DispHelp };
+        } elsif ( m/^--\w+/ ) {
+                if ( m/^--input-file$/ )      { $filename = $ARGV++$i };
+                if ( m/^--output-file$/ )     { $outname  = $ARGV++$i };
+                if ( m/^--list-file$/ )       { $listname = $ARGV++$i };
+                if ( m/^--second-asm-file$/ ) { $asmname  = $ARGV++$i };
+                if ( m/^--help/ ) { DispHelp };
+        } elsif ( m/^--$/ ) {
+                while ( $ARGV++$i ) {
+                        $NasmOptions .= " ";
+                        $NasmOptions .= $_;
+                };
+        } else {
+                DispHelp()
+        };
+        $i++;
+};
+
+if ( $filename eq "" ) { DispHelp() };
+
+if ( $outname eq "" ) {
+        $outname = $filename;
+        $outname =~ s/\.asm/.o/;
+        if ( $outname eq $filename ) { $outname = "a.out" };
+};
+
+if ( $listname eq "" ) {
+        $listname = $filename;
+        $listname =~ s/\.asm//;
+        $listname .= ".lst";
+};
+
+if ( $asmname eq "" ) {
+        $asmname = $filename;
+        $asmname =~ s/\.asm//;
+        $asmname .= ".nasm";
+};
+
+$err = `nasm -f elf ${filename} -l ${listname} -o ${outname} `;
+
+if ( $err ) { die "\n$err\n"};
+
+open(LISTFILE,"${listname}") or die "\n $0: Could not reopen list file!\n";
+open(ASMFILE,">${asmname}")  or die "\n $0: Could not open asm file!\n";
+
+select ASMFILE;
+
+open(OLDASM,$filename) or die "\n$0: Cannot open file $filename\n";
+
+while ( $x = <OLDASM> ) {
+        print $x;
+}
+
+@stab = ("n_desc", "value");
+@rel_stab = ("offset");
+$i = 0;
+$current_section = "";
+$has_text = 'FALSE';
+$midst_of_macro = 'FALSE';
+$line_dec = 0 ;
+
+while ( $x = <LISTFILE> ) {
+        if ( $x =~ m/^;*%include/ ) {
+                $x = <LISTFILE>;
+                while ( $x =~ m/\s+\d+\s+\<\d+\>\s+/ ) {
+                        $x = <LISTFILE>;
+                        $line_dec++;
+                }
+        }
+        if ( $current_section eq ".text" ) {
+                if ( $x =~ m/^\s+(\S+)\s+(\S+)\s+(\S+)\s+^<+$/ ) {
+                        $stab$i++ = $1-$line_dec;     #linenum
+                        $stab$i++ = $2;               #offset
+                        $count++;
+                        if ( $3 =~ m/-/ ) {
+                                $x = <LISTFILE>;
+                                $line_dec++;
+                        }
+                        $midst_of_macro = 'FALSE';
+                } elsif ( $x =~ m/^\s+(\S+)\s+(\S+)\s+(\S+)\s+<\d+>/ ) {
+                        if ( $midst_of_macro eq 'TRUE' ) {
+                                $stab$i = $stab$i-2; #same linenum
+                                $line_dec++;
+                        } else {
+                                $stab$i = $1 - ++$line_dec;
+                                $midst_of_macro = 'TRUE';
+                        }
+                        $count++;
+                        $i++;
+                        $stab$i++ = $2;
+                        if ( $3 =~ m/-/ ) {
+                                $x = <LISTFILE>;
+                                $line_dec++;
+                        }
+
+                }
+                $has_text = 'TRUE';
+        } elsif ( $x =~ m/\s+\S+\s+\S+\s+\S+\s+<\d+>/ ) { # is it a macro?
+                $line_dec++;
+        }
+        if ( $x =~ s/(section|segment)\s+(^\s+)/$2/ ) {
+                        $current_section = $2;
+        }
+};
+
+close LISTFILE;
+
+unless ( $has_text eq "TRUE" ) {
+        $err = `nasm -f elf ${asmname} -o ${outname}`;
+        print STDERR $err;
+        exit;
+}
+
+#Write Stab section
+$, = "\t";      #output field separator
+$\ = "\n";      #output record separator
+
+print "section .stab noalloc";
+StabLine(";header",1,0,0,$count+1,length($filename)*2+3);
+StabLine(";so",length($asmname)+2,"064h",0,0,0);
+
+$offset = 12;
+$i = 0;
+$j = 0;
+$rel_stab$j++ = $offset + 8;
+
+while ( $stab$i ) {
+        StabLine(";N_SLINE" . " " . ( ($i+2) / 2 ), 0, "044h", 0,
+                $stab$i++, $stab$i++);
+        $offset += 12;
+        $rel_stab$j++ = $offset + 8;
+}
+
+#Write .rel.stab section
+print "\n\nsection .rel.stab noalloc";
+
+open (READELF,"readelf -s ${outname} |") or die "\n$0: Could not run readelf\n";
+
+while ( $x = <READELF> ) {
+   if ( $x =~ m/\s+(\d+):\s+00000000\s+\d+\s+SECTION\s+\w+\s+\w+\s+1\s+/){ $textsymnum = $1;
+   };
+};
+close READELF;
+
+$i = 0;
+
+while ( $rel_stab$i ne "" ) {
+        RStabLine(";relocation for N_SLINE " . ($i), $rel_stab$i, 0, 1, $textsymnum);
+        $i++;
+} ;
+
+#Write .stabstr section
+
+print "\n\nsection .stabstr noalloc";
+
+print "","db","0";
+print "","db",'"' . $asmname . '"';
+print "","db","0";
+print "","db",'"' . $asmname . '"' ;
+print "","db","0";
+
+close ASMFILE;
+
+$err = `nasm -f elf ${asmname} -o ${outname}`;
+
+if ( $err ) { die "\n$err\n" } ;
+
+open (READELF,"readelf -h -S ${outname} |") or die "\n$0: Could not run readelf\n";
+
+
+while ( $x = <READELF> ) {
+        if ( $x =~ m/Start\s+of\s+section\s+headers:\s+(\d+)\s+/ ) {
+                $shoff = $1;
+        }
+        if ( $x =~ m/Size\s+of\s+section\s+headers:\s+(\d+)\s+/ ) {
+                $shentsize = $1;
+        }
+        if ( $x =~ m/\\s*(\d+)\\s+.rel.stab\s+/ ) {
+                $relnum = $1;
+        }
+        if ( $x =~ m/\\s*(\d+)\\s+.stab\s+/ ) {
+                $stabnum = $1;
+        }
+        if ( $x =~ m/\\s*(\d+)\\s+.stabstr\s+/ ) {
+                $stabstrnum = $1;
+        }
+        if ( $x =~ m/\\s*(\d+)\\s+.symtab\s+/ ) {
+                $symtabnum = $1;
+        }
+}
+close READELF;
+
+sysopen (FINAL,"${outname}",2,0) or die "\n$0: Could not open ${outname}";
+$, = "";        #output field separator
+$\ = "";        #output record separator
+
+#set .rel.stab->type to rel
+OutBin($shoff + ($shentsize * $relnum) + 4,9);
+
+#set .rel.stab->link to .symtab
+OutBin($shoff + ($shentsize * $relnum) + 24,$symtabnum);
+
+#set .rel.stab->info to .stab
+OutBin($shoff + ($shentsize * $relnum) + 28,$stabnum);
+
+#set .rel.stab->entsize to 8
+OutBin($shoff + ($shentsize * $relnum) + 36,8);
+
+#set .stab->link to .stabstr
+OutBin($shoff + ($shentsize * $stabnum) + 24,$stabstrnum);
+
+#set .stab->entsize to 12
+OutBin($shoff + ($shentsize * $stabnum) + 36,12);
+
+#set .stabstr->type to strtab
+OutBin($shoff + ($shentsize * $stabstrnum) + 4,3);
+
+close FINAL;
+
+#Date: 17 Mar 2002 15:51:20 -0800
+#From: kitsred@hotmail.com (kired)
+#Newsgroups: alt.lang.asm

_service:tar_scm:nasm-2.16.03.tar.xz/misc/nasmtok.el Added

@@ -0,0 +1,464 @@
+;;; nasmtok.el --- lists of NASM assembler tokens
+;;;
+;;; This file contains list of tokens from the NASM x86
+;;; assembler, automatically extracted from NASM 2.16.03.
+;;;
+;;; This file is intended to be (require)d from a `nasm-mode'
+;;; major mode definition.
+
+(defconst nasm-decorator
+  '("1to16" "1to2" "1to32" "1to4" "1to8" "rd-sae" "rn-sae" "ru-sae" "rz-sae"
+    "sae" "z")
+  "NASM 2.16.03 decorator tokens for `nasm-mode'.")
+
+(defconst nasm-directive
+  '("absolute" "bits" "common" "cpu" "debug" "default" "export" "extern"
+    "float" "global" "gprefix" "group" "gsuffix" "import" "library" "limit"
+    "list" "lprefix" "lsuffix" "map" "maxdump" "module" "no_dead_strip"
+    "nodepend" "noseclabels" "options" "org" "osabi" "pragma" "prefix"
+    "required" "safeseh" "sectalign" "section" "segment" "static"
+    "subsections_via_symbols" "suffix" "uppercase" "warning")
+  "NASM 2.16.03 directive tokens for `nasm-mode'.")
+
+(defconst nasm-function
+  '("__?bfloat16?__" "__?float128h?__" "__?float128l?__" "__?float16?__"
+    "__?float32?__" "__?float64?__" "__?float80e?__" "__?float80m?__"
+    "__?float8?__" "__?ilog2c?__" "__?ilog2e?__" "__?ilog2f?__"
+    "__?ilog2w?__" "__?infinity?__" "__?nan?__" "__?qnan?__" "__?snan?__"
+    "__?utf16?__" "__?utf16be?__" "__?utf16le?__" "__?utf32?__"
+    "__?utf32be?__" "__?utf32le?__" "bfloat16" "float128h" "float128l"
+    "float16" "float32" "float64" "float8" "float80e" "float80m" "ilog2c"
+    "ilog2e" "ilog2f" "ilog2w" "infinity" "nan" "qnan" "snan" "utf16"
+    "utf16be" "utf16le" "utf32" "utf32be" "utf32le")
+  "NASM 2.16.03 function tokens for `nasm-mode'.")
+
+(defconst nasm-instruction
+  '("aaa" "aad" "aadd" "aam" "aand" "aas" "adc" "adcx" "add" "addpd" "addps"
+    "addsd" "addss" "addsubpd" "addsubps" "adox" "aesdec" "aesdeclast"
+    "aesenc" "aesenclast" "aesimc" "aeskeygenassist" "and" "andn" "andnpd"
+    "andnps" "andpd" "andps" "arpl" "axor" "bb0_reset" "bb1_reset" "bextr"
+    "blcfill" "blci" "blcic" "blcmsk" "blcs" "blendpd" "blendps" "blendvpd"
+    "blendvps" "blsfill" "blsi" "blsic" "blsmsk" "blsr" "bndcl" "bndcn"
+    "bndcu" "bndldx" "bndmk" "bndmov" "bndstx" "bound" "bsf" "bsr" "bswap"
+    "bt" "btc" "btr" "bts" "bzhi" "call" "cbw" "cdq" "cdqe" "clac" "clc"
+    "cld" "cldemote" "clflush" "clflushopt" "clgi" "cli" "clrssbsy" "clts"
+    "clui" "clwb" "clzero" "cmc" "cmova" "cmovae" "cmovb" "cmovbe" "cmovc"
+    "cmove" "cmovg" "cmovge" "cmovl" "cmovle" "cmovna" "cmovnae" "cmovnb"
+    "cmovnbe" "cmovnc" "cmovne" "cmovng" "cmovnge" "cmovnl" "cmovnle"
+    "cmovno" "cmovnp" "cmovns" "cmovnz" "cmovo" "cmovp" "cmovpe" "cmovpo"
+    "cmovs" "cmovz" "cmp" "cmpaexadd" "cmpaxadd" "cmpbexadd" "cmpbxadd"
+    "cmpcxadd" "cmpeqpd" "cmpeqps" "cmpeqsd" "cmpeqss" "cmpexadd" "cmpgexadd"
+    "cmpgxadd" "cmplepd" "cmpleps" "cmplesd" "cmpless" "cmplexadd" "cmpltpd"
+    "cmpltps" "cmpltsd" "cmpltss" "cmplxadd" "cmpnaexadd" "cmpnaxadd"
+    "cmpnbexadd" "cmpnbxadd" "cmpncxadd" "cmpneqpd" "cmpneqps" "cmpneqsd"
+    "cmpneqss" "cmpnexadd" "cmpngexadd" "cmpngxadd" "cmpnlepd" "cmpnleps"
+    "cmpnlesd" "cmpnless" "cmpnlexadd" "cmpnltpd" "cmpnltps" "cmpnltsd"
+    "cmpnltss" "cmpnlxadd" "cmpnoxadd" "cmpnpxadd" "cmpnsxadd" "cmpnzxadd"
+    "cmpordpd" "cmpordps" "cmpordsd" "cmpordss" "cmpoxadd" "cmppd"
+    "cmppexadd" "cmppoxadd" "cmpps" "cmppxadd" "cmpsb" "cmpsd" "cmpsq"
+    "cmpss" "cmpsw" "cmpsxadd" "cmpunordpd" "cmpunordps" "cmpunordsd"
+    "cmpunordss" "cmpxchg" "cmpxchg16b" "cmpxchg486" "cmpxchg8b" "cmpzxadd"
+    "comisd" "comiss" "cpu_read" "cpu_write" "cpuid" "cqo" "crc32" "cvtdq2pd"
+    "cvtdq2ps" "cvtpd2dq" "cvtpd2pi" "cvtpd2ps" "cvtpi2pd" "cvtpi2ps"
+    "cvtps2dq" "cvtps2pd" "cvtps2pi" "cvtsd2si" "cvtsd2ss" "cvtsi2sd"
+    "cvtsi2ss" "cvtss2sd" "cvtss2si" "cvttpd2dq" "cvttpd2pi" "cvttps2dq"
+    "cvttps2pi" "cvttsd2si" "cvttss2si" "cwd" "cwde" "daa" "das" "db" "dd"
+    "dec" "div" "divpd" "divps" "divsd" "divss" "dmint" "do" "dppd" "dpps"
+    "dq" "dt" "dw" "dy" "dz" "emms" "encls" "enclu" "enclv" "endbr32"
+    "endbr64" "enqcmd" "enqcmds" "enter" "equ" "erets" "eretu" "extractps"
+    "extrq" "f2xm1" "fabs" "fadd" "faddp" "fbld" "fbstp" "fchs" "fclex"
+    "fcmovb" "fcmovbe" "fcmove" "fcmovnb" "fcmovnbe" "fcmovne" "fcmovnu"
+    "fcmovu" "fcom" "fcomi" "fcomip" "fcomp" "fcompp" "fcos" "fdecstp"
+    "fdisi" "fdiv" "fdivp" "fdivr" "fdivrp" "femms" "feni" "ffree" "ffreep"
+    "fiadd" "ficom" "ficomp" "fidiv" "fidivr" "fild" "fimul" "fincstp"
+    "finit" "fist" "fistp" "fisttp" "fisub" "fisubr" "fld" "fld1" "fldcw"
+    "fldenv" "fldl2e" "fldl2t" "fldlg2" "fldln2" "fldpi" "fldz" "fmul"
+    "fmulp" "fnclex" "fndisi" "fneni" "fninit" "fnop" "fnsave" "fnstcw"
+    "fnstenv" "fnstsw" "fpatan" "fprem" "fprem1" "fptan" "frndint" "frstor"
+    "fsave" "fscale" "fsetpm" "fsin" "fsincos" "fsqrt" "fst" "fstcw" "fstenv"
+    "fstp" "fstsw" "fsub" "fsubp" "fsubr" "fsubrp" "ftst" "fucom" "fucomi"
+    "fucomip" "fucomp" "fucompp" "fwait" "fxam" "fxch" "fxrstor" "fxrstor64"
+    "fxsave" "fxsave64" "fxtract" "fyl2x" "fyl2xp1" "getsec"
+    "gf2p8affineinvqb" "gf2p8affineqb" "gf2p8mulb" "haddpd" "haddps"
+    "hint_nop0" "hint_nop1" "hint_nop10" "hint_nop11" "hint_nop12"
+    "hint_nop13" "hint_nop14" "hint_nop15" "hint_nop16" "hint_nop17"
+    "hint_nop18" "hint_nop19" "hint_nop2" "hint_nop20" "hint_nop21"
+    "hint_nop22" "hint_nop23" "hint_nop24" "hint_nop25" "hint_nop26"
+    "hint_nop27" "hint_nop28" "hint_nop29" "hint_nop3" "hint_nop30"
+    "hint_nop31" "hint_nop32" "hint_nop33" "hint_nop34" "hint_nop35"
+    "hint_nop36" "hint_nop37" "hint_nop38" "hint_nop39" "hint_nop4"
+    "hint_nop40" "hint_nop41" "hint_nop42" "hint_nop43" "hint_nop44"
+    "hint_nop45" "hint_nop46" "hint_nop47" "hint_nop48" "hint_nop49"
+    "hint_nop5" "hint_nop50" "hint_nop51" "hint_nop52" "hint_nop53"
+    "hint_nop54" "hint_nop55" "hint_nop56" "hint_nop57" "hint_nop58"
+    "hint_nop59" "hint_nop6" "hint_nop60" "hint_nop61" "hint_nop62"
+    "hint_nop63" "hint_nop7" "hint_nop8" "hint_nop9" "hlt" "hreset" "hsubpd"
+    "hsubps" "ibts" "icebp" "idiv" "imul" "in" "inc" "incbin" "incsspd"
+    "incsspq" "insb" "insd" "insertps" "insertq" "insw" "int" "int01" "int03"
+    "int1" "int3" "into" "invd" "invept" "invlpg" "invlpga" "invpcid"
+    "invvpid" "iret" "iretd" "iretq" "iretw" "ja" "jae" "jb" "jbe" "jc"
+    "jcxz" "je" "jecxz" "jg" "jge" "jl" "jle" "jmp" "jmpe" "jna" "jnae" "jnb"
+    "jnbe" "jnc" "jne" "jng" "jnge" "jnl" "jnle" "jno" "jnp" "jns" "jnz" "jo"
+    "jp" "jpe" "jpo" "jrcxz" "js" "jz" "kadd" "kaddb" "kaddd" "kaddq" "kaddw"
+    "kand" "kandb" "kandd" "kandn" "kandnb" "kandnd" "kandnq" "kandnw"
+    "kandq" "kandw" "kmov" "kmovb" "kmovd" "kmovq" "kmovw" "knot" "knotb"
+    "knotd" "knotq" "knotw" "kor" "korb" "kord" "korq" "kortest" "kortestb"
+    "kortestd" "kortestq" "kortestw" "korw" "kshiftl" "kshiftlb" "kshiftld"
+    "kshiftlq" "kshiftlw" "kshiftr" "kshiftrb" "kshiftrd" "kshiftrq"
+    "kshiftrw" "ktest" "ktestb" "ktestd" "ktestq" "ktestw" "kunpck"
+    "kunpckbw" "kunpckdq" "kunpckwd" "kxnor" "kxnorb" "kxnord" "kxnorq"
+    "kxnorw" "kxor" "kxorb" "kxord" "kxorq" "kxorw" "lahf" "lar" "lddqu"
+    "ldmxcsr" "lds" "ldtilecfg" "lea" "leave" "les" "lfence" "lfs" "lgdt"
+    "lgs" "lidt" "lkgs" "lldt" "llwpcb" "lmsw" "loadall" "loadall286" "lodsb"
+    "lodsd" "lodsq" "lodsw" "loop" "loope" "loopne" "loopnz" "loopz" "lsl"
+    "lss" "ltr" "lwpins" "lwpval" "lzcnt" "maskmovdqu" "maskmovq" "maxpd"
+    "maxps" "maxsd" "maxss" "mfence" "minpd" "minps" "minsd" "minss"
+    "monitor" "monitorx" "montmul" "mov" "movapd" "movaps" "movbe" "movd"
+    "movddup" "movdir64b" "movdiri" "movdq2q" "movdqa" "movdqu" "movhlps"
+    "movhpd" "movhps" "movlhps" "movlpd" "movlps" "movmskpd" "movmskps"
+    "movntdq" "movntdqa" "movnti" "movntpd" "movntps" "movntq" "movntsd"
+    "movntss" "movq" "movq2dq" "movsb" "movsd" "movshdup" "movsldup" "movsq"
+    "movss" "movsw" "movsx" "movsxd" "movupd" "movups" "movzx" "mpsadbw"
+    "mul" "mulpd" "mulps" "mulsd" "mulss" "mulx" "mwait" "mwaitx" "neg" "nop"
+    "not" "or" "orpd" "orps" "out" "outsb" "outsd" "outsw" "pabsb" "pabsd"
+    "pabsw" "packssdw" "packsswb" "packusdw" "packuswb" "paddb" "paddd"
+    "paddq" "paddsb" "paddsiw" "paddsw" "paddusb" "paddusw" "paddw" "palignr"
+    "pand" "pandn" "pause" "paveb" "pavgb" "pavgusb" "pavgw" "pblendvb"
+    "pblendw" "pclmulhqhqdq" "pclmulhqlqdq" "pclmullqhqdq" "pclmullqlqdq"
+    "pclmulqdq" "pcmpeqb" "pcmpeqd" "pcmpeqq" "pcmpeqw" "pcmpestri"
+    "pcmpestrm" "pcmpgtb" "pcmpgtd" "pcmpgtq" "pcmpgtw" "pcmpistri"
+    "pcmpistrm" "pcommit" "pconfig" "pdep" "pdistib" "pext" "pextrb" "pextrd"
+    "pextrq" "pextrw" "pf2id" "pf2iw" "pfacc" "pfadd" "pfcmpeq" "pfcmpge"
+    "pfcmpgt" "pfmax" "pfmin" "pfmul" "pfnacc" "pfpnacc" "pfrcp" "pfrcpit1"
+    "pfrcpit2" "pfrcpv" "pfrsqit1" "pfrsqrt" "pfrsqrtv" "pfsub" "pfsubr"
+    "phaddd" "phaddsw" "phaddw" "phminposuw" "phsubd" "phsubsw" "phsubw"
+    "pi2fd" "pi2fw" "pinsrb" "pinsrd" "pinsrq" "pinsrw" "pmachriw"
+    "pmaddubsw" "pmaddwd" "pmagw" "pmaxsb" "pmaxsd" "pmaxsw" "pmaxub"
+    "pmaxud" "pmaxuw" "pminsb" "pminsd" "pminsw" "pminub" "pminud" "pminuw"
+    "pmovmskb" "pmovsxbd" "pmovsxbq" "pmovsxbw" "pmovsxdq" "pmovsxwd"
+    "pmovsxwq" "pmovzxbd" "pmovzxbq" "pmovzxbw" "pmovzxdq" "pmovzxwd"
+    "pmovzxwq" "pmuldq" "pmulhriw" "pmulhrsw" "pmulhrwa" "pmulhrwc" "pmulhuw"
+    "pmulhw" "pmulld" "pmullw" "pmuludq" "pmvgezb" "pmvlzb" "pmvnzb" "pmvzb"
+    "pop" "popa" "popad" "popaw" "popcnt" "popf" "popfd" "popfq" "popfw"
+    "por" "prefetch" "prefetchit0" "prefetchit1" "prefetchnta" "prefetcht0"
+    "prefetcht1" "prefetcht2" "prefetchw" "prefetchwt1" "psadbw" "pshufb"
+    "pshufd" "pshufhw" "pshuflw" "pshufw" "psignb" "psignd" "psignw" "pslld"
+    "pslldq" "psllq" "psllw" "psrad" "psraw" "psrld" "psrldq" "psrlq" "psrlw"
+    "psubb" "psubd" "psubq" "psubsb" "psubsiw" "psubsw" "psubusb" "psubusw"
+    "psubw" "pswapd" "ptest" "ptwrite" "punpckhbw" "punpckhdq" "punpckhqdq"
+    "punpckhwd" "punpcklbw" "punpckldq" "punpcklqdq" "punpcklwd" "push"
+    "pusha" "pushad" "pushaw" "pushf" "pushfd" "pushfq" "pushfw" "pvalidate"
+    "pxor" "rcl" "rcpps" "rcpss" "rcr" "rdfsbase" "rdgsbase" "rdm" "rdmsr"
+    "rdmsrlist" "rdpid" "rdpkru" "rdpmc" "rdrand" "rdseed" "rdshr" "rdsspd"
+    "rdsspq" "rdtsc" "rdtscp" "resb" "resd" "reso" "resq" "rest" "resw"
+    "resy" "resz" "ret" "retd" "retf" "retfd" "retfq" "retfw" "retn" "retnd"
+    "retnq" "retnw" "retq" "retw" "rmpadjust" "rol" "ror" "rorx" "roundpd"
+    "roundps" "roundsd" "roundss" "rsdc" "rsldt" "rsm" "rsqrtps" "rsqrtss"
+    "rstorssp" "rsts" "sahf" "sal" "salc" "sar" "sarx" "saveprevssp" "sbb"
+    "scasb" "scasd" "scasq" "scasw" "senduipi" "serialize" "seta" "setae"
+    "setb" "setbe" "setc" "sete" "setg" "setge" "setl" "setle" "setna"
+    "setnae" "setnb" "setnbe" "setnc" "setne" "setng" "setnge" "setnl"
+    "setnle" "setno" "setnp" "setns" "setnz" "seto" "setp" "setpe" "setpo"
+    "sets" "setssbsy" "setz" "sfence" "sgdt" "sha1msg1" "sha1msg2"
+    "sha1nexte" "sha1rnds4" "sha256msg1" "sha256msg2" "sha256rnds2" "shl"
+    "shld" "shlx" "shr" "shrd" "shrx" "shufpd" "shufps" "sidt" "skinit"
+    "sldt" "slwpcb" "smi" "smint" "smintold" "smsw" "sqrtpd" "sqrtps"
+    "sqrtsd" "sqrtss" "stac" "stc" "std" "stgi" "sti" "stmxcsr" "stosb"
+    "stosd" "stosq" "stosw" "str" "sttilecfg" "stui" "sub" "subpd" "subps"
+    "subsd" "subss" "svdc" "svldt" "svts" "swapgs" "syscall" "sysenter"
+    "sysexit" "sysret" "t1mskc" "tdpbf16ps" "tdpbssd" "tdpbsud" "tdpbusd"
+    "tdpbuud" "test" "testui" "tileloadd" "tileloaddt1" "tilerelease"
+    "tilestored" "tilezero" "tpause" "tzcnt" "tzmsk" "ucomisd" "ucomiss"
+    "ud0" "ud1" "ud2" "ud2a" "ud2b" "uiret" "umonitor" "umov" "umwait"
+    "unpckhpd" "unpckhps" "unpcklpd" "unpcklps" "v4dpwssd" "v4dpwssds"
+    "v4fmaddps" "v4fmaddss" "v4fnmaddps" "v4fnmaddss" "vaddpd" "vaddph"
+    "vaddps" "vaddsd" "vaddsh" "vaddss" "vaddsubpd" "vaddsubps" "vaesdec"
+    "vaesdeclast" "vaesenc" "vaesenclast" "vaesimc" "vaeskeygenassist"
+    "valignd" "valignq" "vandnpd" "vandnps" "vandpd" "vandps" "vbcstnebf16ps"
+    "vbcstnesh2ps" "vblendmpd" "vblendmps" "vblendpd" "vblendps" "vblendvpd"
+    "vblendvps" "vbroadcastf128" "vbroadcastf32x2" "vbroadcastf32x4"
+    "vbroadcastf32x8" "vbroadcastf64x2" "vbroadcastf64x4" "vbroadcasti128"
+    "vbroadcasti32x2" "vbroadcasti32x4" "vbroadcasti32x8" "vbroadcasti64x2"
+    "vbroadcasti64x4" "vbroadcastsd" "vbroadcastss" "vcmpeq_oqpd"
+    "vcmpeq_oqps" "vcmpeq_oqsd" "vcmpeq_oqss" "vcmpeq_ospd" "vcmpeq_osps"
+    "vcmpeq_ossd" "vcmpeq_osss" "vcmpeq_uqpd" "vcmpeq_uqps" "vcmpeq_uqsd"
+    "vcmpeq_uqss" "vcmpeq_uspd" "vcmpeq_usps" "vcmpeq_ussd" "vcmpeq_usss"
+    "vcmpeqpd" "vcmpeqps" "vcmpeqsd" "vcmpeqss" "vcmpfalse_oqpd"
+    "vcmpfalse_oqps" "vcmpfalse_oqsd" "vcmpfalse_oqss" "vcmpfalse_ospd"
+    "vcmpfalse_osps" "vcmpfalse_ossd" "vcmpfalse_osss" "vcmpfalsepd"
+    "vcmpfalseps" "vcmpfalsesd" "vcmpfalsess" "vcmpge_oqpd" "vcmpge_oqps"
+    "vcmpge_oqsd" "vcmpge_oqss" "vcmpge_ospd" "vcmpge_osps" "vcmpge_ossd"
+    "vcmpge_osss" "vcmpgepd" "vcmpgeps" "vcmpgesd" "vcmpgess" "vcmpgt_oqpd"
+    "vcmpgt_oqps" "vcmpgt_oqsd" "vcmpgt_oqss" "vcmpgt_ospd" "vcmpgt_osps"
+    "vcmpgt_ossd" "vcmpgt_osss" "vcmpgtpd" "vcmpgtps" "vcmpgtsd" "vcmpgtss"
+    "vcmple_oqpd" "vcmple_oqps" "vcmple_oqsd" "vcmple_oqss" "vcmple_ospd"
+    "vcmple_osps" "vcmple_ossd" "vcmple_osss" "vcmplepd" "vcmpleps"
+    "vcmplesd" "vcmpless" "vcmplt_oqpd" "vcmplt_oqps" "vcmplt_oqsd"
+    "vcmplt_oqss" "vcmplt_ospd" "vcmplt_osps" "vcmplt_ossd" "vcmplt_osss"
+    "vcmpltpd" "vcmpltps" "vcmpltsd" "vcmpltss" "vcmpneq_oqpd" "vcmpneq_oqps"
+    "vcmpneq_oqsd" "vcmpneq_oqss" "vcmpneq_ospd" "vcmpneq_osps"
+    "vcmpneq_ossd" "vcmpneq_osss" "vcmpneq_uqpd" "vcmpneq_uqps"
+    "vcmpneq_uqsd" "vcmpneq_uqss" "vcmpneq_uspd" "vcmpneq_usps"
+    "vcmpneq_ussd" "vcmpneq_usss" "vcmpneqpd" "vcmpneqps" "vcmpneqsd"
+    "vcmpneqss" "vcmpnge_uqpd" "vcmpnge_uqps" "vcmpnge_uqsd" "vcmpnge_uqss"
+    "vcmpnge_uspd" "vcmpnge_usps" "vcmpnge_ussd" "vcmpnge_usss" "vcmpngepd"
+    "vcmpngeps" "vcmpngesd" "vcmpngess" "vcmpngt_uqpd" "vcmpngt_uqps"
+    "vcmpngt_uqsd" "vcmpngt_uqss" "vcmpngt_uspd" "vcmpngt_usps"
+    "vcmpngt_ussd" "vcmpngt_usss" "vcmpngtpd" "vcmpngtps" "vcmpngtsd"
+    "vcmpngtss" "vcmpnle_uqpd" "vcmpnle_uqps" "vcmpnle_uqsd" "vcmpnle_uqss"
+    "vcmpnle_uspd" "vcmpnle_usps" "vcmpnle_ussd" "vcmpnle_usss" "vcmpnlepd"
+    "vcmpnleps" "vcmpnlesd" "vcmpnless" "vcmpnlt_uqpd" "vcmpnlt_uqps"
+    "vcmpnlt_uqsd" "vcmpnlt_uqss" "vcmpnlt_uspd" "vcmpnlt_usps"
+    "vcmpnlt_ussd" "vcmpnlt_usss" "vcmpnltpd" "vcmpnltps" "vcmpnltsd"
+    "vcmpnltss" "vcmpord_qpd" "vcmpord_qps" "vcmpord_qsd" "vcmpord_qss"
+    "vcmpord_spd" "vcmpord_sps" "vcmpord_ssd" "vcmpord_sss" "vcmpordpd"
+    "vcmpordps" "vcmpordsd" "vcmpordss" "vcmppd" "vcmpph" "vcmpps" "vcmpsd"
+    "vcmpsh" "vcmpss" "vcmptrue_uqpd" "vcmptrue_uqps" "vcmptrue_uqsd"
+    "vcmptrue_uqss" "vcmptrue_uspd" "vcmptrue_usps" "vcmptrue_ussd"
+    "vcmptrue_usss" "vcmptruepd" "vcmptrueps" "vcmptruesd" "vcmptruess"
+    "vcmpunord_qpd" "vcmpunord_qps" "vcmpunord_qsd" "vcmpunord_qss"
+    "vcmpunord_spd" "vcmpunord_sps" "vcmpunord_ssd" "vcmpunord_sss"
+    "vcmpunordpd" "vcmpunordps" "vcmpunordsd" "vcmpunordss" "vcomisd"
+    "vcomish" "vcomiss" "vcompresspd" "vcompressps" "vcvtdq2pd" "vcvtdq2ph"
+    "vcvtdq2ps" "vcvtne2ps2bf16" "vcvtneebf162ps" "vcvtneeph2ps"
+    "vcvtneobf162ps" "vcvtneoph2ps" "vcvtneps2bf16" "vcvtpd2dq" "vcvtpd2ph"
+    "vcvtpd2ps" "vcvtpd2qq" "vcvtpd2udq" "vcvtpd2uqq" "vcvtph2dq" "vcvtph2pd"
+    "vcvtph2ps" "vcvtph2psx" "vcvtph2qq" "vcvtph2udq" "vcvtph2uqq"
+    "vcvtph2uw" "vcvtph2w" "vcvtps2dq" "vcvtps2pd" "vcvtps2ph" "vcvtps2qq"
+    "vcvtps2udq" "vcvtps2uqq" "vcvtqq2pd" "vcvtqq2ph" "vcvtqq2ps" "vcvtsd2sh"
+    "vcvtsd2si" "vcvtsd2ss" "vcvtsd2usi" "vcvtsh2sd" "vcvtsh2si" "vcvtsh2ss"
+    "vcvtsh2usi" "vcvtsi2sd" "vcvtsi2sh" "vcvtsi2ss" "vcvtss2sd" "vcvtss2sh"
+    "vcvtss2si" "vcvtss2usi" "vcvttpd2dq" "vcvttpd2qq" "vcvttpd2udq"
+    "vcvttpd2uqq" "vcvttph2dq" "vcvttph2qq" "vcvttph2udq" "vcvttph2uqq"
+    "vcvttph2uw" "vcvttph2w" "vcvttps2dq" "vcvttps2qq" "vcvttps2udq"
+    "vcvttps2uqq" "vcvttsd2si" "vcvttsd2usi" "vcvttsh2si" "vcvttsh2usi"
+    "vcvttss2si" "vcvttss2usi" "vcvtudq2pd" "vcvtudq2ph" "vcvtudq2ps"
+    "vcvtuqq2pd" "vcvtuqq2ph" "vcvtuqq2ps" "vcvtusi2sd" "vcvtusi2sh"
+    "vcvtusi2ss" "vcvtuw2ph" "vcvtw2ph" "vdbpsadbw" "vdivpd" "vdivph"
+    "vdivps" "vdivsd" "vdivsh" "vdivss" "vdpbf16ps" "vdppd" "vdpps"
+    "vendscaleph" "vendscalesh" "verr" "verw" "vexp2pd" "vexp2ps" "vexpandpd"
+    "vexpandps" "vextractf128" "vextractf32x4" "vextractf32x8"
+    "vextractf64x2" "vextractf64x4" "vextracti128" "vextracti32x4"
+    "vextracti32x8" "vextracti64x2" "vextracti64x4" "vextractps" "vfcmaddcph"
+    "vfcmaddcsh" "vfcmulcpch" "vfcmulcsh" "vfixupimmpd" "vfixupimmps"
+    "vfixupimmsd" "vfixupimmss" "vfmadd123pd" "vfmadd123ps" "vfmadd123sd"
+    "vfmadd123ss" "vfmadd132pd" "vfmadd132ph" "vfmadd132ps" "vfmadd132sd"
+    "vfmadd132ss" "vfmadd213pd" "vfmadd213ph" "vfmadd213ps" "vfmadd213sd"
+    "vfmadd213ss" "vfmadd231pd" "vfmadd231ph" "vfmadd231ps" "vfmadd231sd"
+    "vfmadd231ss" "vfmadd312pd" "vfmadd312ps" "vfmadd312sd" "vfmadd312ss"
+    "vfmadd321pd" "vfmadd321ps" "vfmadd321sd" "vfmadd321ss" "vfmaddcph"
+    "vfmaddcsh" "vfmaddpd" "vfmaddps" "vfmaddsd" "vfmaddss" "vfmaddsub123pd"
+    "vfmaddsub123ps" "vfmaddsub132pd" "vfmaddsub132ph" "vfmaddsub132ps"
+    "vfmaddsub213pd" "vfmaddsub213ph" "vfmaddsub213ps" "vfmaddsub231pd"
+    "vfmaddsub231ph" "vfmaddsub231ps" "vfmaddsub312pd" "vfmaddsub312ps"
+    "vfmaddsub321pd" "vfmaddsub321ps" "vfmaddsubpd" "vfmaddsubps"
+    "vfmsub123pd" "vfmsub123ps" "vfmsub123sd" "vfmsub123ss" "vfmsub132pd"
+    "vfmsub132ph" "vfmsub132ps" "vfmsub132sd" "vfmsub132ss" "vfmsub213pd"
+    "vfmsub213ph" "vfmsub213ps" "vfmsub213sd" "vfmsub213ss" "vfmsub231pd"
+    "vfmsub231ph" "vfmsub231ps" "vfmsub231sd" "vfmsub231ss" "vfmsub312pd"
+    "vfmsub312ps" "vfmsub312sd" "vfmsub312ss" "vfmsub321pd" "vfmsub321ps"
+    "vfmsub321sd" "vfmsub321ss" "vfmsubadd123pd" "vfmsubadd123ps"
+    "vfmsubadd132pd" "vfmsubadd132ph" "vfmsubadd132ps" "vfmsubadd213pd"
+    "vfmsubadd213ph" "vfmsubadd213ps" "vfmsubadd231pd" "vfmsubadd231ph"
+    "vfmsubadd231ps" "vfmsubadd312pd" "vfmsubadd312ps" "vfmsubadd321pd"
+    "vfmsubadd321ps" "vfmsubaddpd" "vfmsubaddps" "vfmsubpd" "vfmsubps"
+    "vfmsubsd" "vfmsubss" "vfmulcpch" "vfmulcsh" "vfnmadd123pd"
+    "vfnmadd123ps" "vfnmadd123sd" "vfnmadd123ss" "vfnmadd132pd"
+    "vfnmadd132ps" "vfnmadd132sd" "vfnmadd132ss" "vfnmadd213pd"
+    "vfnmadd213ps" "vfnmadd213sd" "vfnmadd213ss" "vfnmadd231pd"
+    "vfnmadd231ps" "vfnmadd231sd" "vfnmadd231ss" "vfnmadd312pd"
+    "vfnmadd312ps" "vfnmadd312sd" "vfnmadd312ss" "vfnmadd321pd"
+    "vfnmadd321ps" "vfnmadd321sd" "vfnmadd321ss" "vfnmaddpd" "vfnmaddps"
+    "vfnmaddsd" "vfnmaddss" "vfnmsub123pd" "vfnmsub123ps" "vfnmsub123sd"
+    "vfnmsub123ss" "vfnmsub132pd" "vfnmsub132ps" "vfnmsub132sd"
+    "vfnmsub132ss" "vfnmsub213pd" "vfnmsub213ps" "vfnmsub213sd"
+    "vfnmsub213ss" "vfnmsub231pd" "vfnmsub231ps" "vfnmsub231sd"
+    "vfnmsub231ss" "vfnmsub312pd" "vfnmsub312ps" "vfnmsub312sd"
+    "vfnmsub312ss" "vfnmsub321pd" "vfnmsub321ps" "vfnmsub321sd"
+    "vfnmsub321ss" "vfnmsubpd" "vfnmsubps" "vfnmsubsd" "vfnmsubss"
+    "vfpclasspd" "vfpclassph" "vfpclassps" "vfpclasssd" "vfpclasssh"
+    "vfpclassss" "vfrczpd" "vfrczps" "vfrczsd" "vfrczss" "vgatherdpd"
+    "vgatherdps" "vgatherpf0dpd" "vgatherpf0dps" "vgatherpf0qpd"
+    "vgatherpf0qps" "vgatherpf1dpd" "vgatherpf1dps" "vgatherpf1qpd"
+    "vgatherpf1qps" "vgatherqpd" "vgatherqps" "vgetexppd" "vgetexpph"
+    "vgetexpps" "vgetexpsd" "vgetexpsh" "vgetexpss" "vgetmantpd" "vgetmantph"
+    "vgetmantps" "vgetmantsd" "vgetmantsh" "vgetmantss" "vgetmaxph"
+    "vgetmaxsh" "vgetminph" "vgetminsh" "vgf2p8affineinvqb" "vgf2p8affineqb"
+    "vgf2p8mulb" "vhaddpd" "vhaddps" "vhsubpd" "vhsubps" "vinsertf128"
+    "vinsertf32x4" "vinsertf32x8" "vinsertf64x2" "vinsertf64x4" "vinserti128"
+    "vinserti32x4" "vinserti32x8" "vinserti64x2" "vinserti64x4" "vinsertps"
+    "vlddqu" "vldmxcsr" "vldqqu" "vmaskmovdqu" "vmaskmovpd" "vmaskmovps"
+    "vmaxpd" "vmaxps" "vmaxsd" "vmaxss" "vmcall" "vmclear" "vmfunc" "vmgexit"
+    "vminpd" "vminps" "vminsd" "vminss" "vmlaunch" "vmload" "vmmcall"
+    "vmovapd" "vmovaps" "vmovd" "vmovddup" "vmovdqa" "vmovdqa32" "vmovdqa64"
+    "vmovdqu" "vmovdqu16" "vmovdqu32" "vmovdqu64" "vmovdqu8" "vmovhlps"
+    "vmovhpd" "vmovhps" "vmovlhps" "vmovlpd" "vmovlps" "vmovmskpd"
+    "vmovmskps" "vmovntdq" "vmovntdqa" "vmovntpd" "vmovntps" "vmovntqq"
+    "vmovq" "vmovqqa" "vmovqqu" "vmovsd" "vmovsh" "vmovshdup" "vmovsldup"
+    "vmovss" "vmovupd" "vmovups" "vmovw" "vmpsadbw" "vmptrld" "vmptrst"
+    "vmread" "vmresume" "vmrun" "vmsave" "vmulpd" "vmulph" "vmulps" "vmulsd"
+    "vmulsh" "vmulss" "vmwrite" "vmxoff" "vmxon" "vorpd" "vorps"
+    "vp2intersectd" "vpabsb" "vpabsd" "vpabsq" "vpabsw" "vpackssdw"
+    "vpacksswb" "vpackusdw" "vpackuswb" "vpaddb" "vpaddd" "vpaddq" "vpaddsb"
+    "vpaddsw" "vpaddusb" "vpaddusw" "vpaddw" "vpalignr" "vpand" "vpandd"
+    "vpandn" "vpandnd" "vpandnq" "vpandq" "vpavgb" "vpavgw" "vpblendd"
+    "vpblendmb" "vpblendmd" "vpblendmq" "vpblendmw" "vpblendvb" "vpblendw"
+    "vpbroadcastb" "vpbroadcastd" "vpbroadcastmb2q" "vpbroadcastmw2d"
+    "vpbroadcastq" "vpbroadcastw" "vpclmulhqhqdq" "vpclmulhqlqdq"
+    "vpclmullqhqdq" "vpclmullqlqdq" "vpclmulqdq" "vpcmov" "vpcmpb" "vpcmpd"
+    "vpcmpeqb" "vpcmpeqd" "vpcmpeqq" "vpcmpequb" "vpcmpequd" "vpcmpequq"
+    "vpcmpequw" "vpcmpeqw" "vpcmpestri" "vpcmpestrm" "vpcmpgeb" "vpcmpged"
+    "vpcmpgeq" "vpcmpgeub" "vpcmpgeud" "vpcmpgeuq" "vpcmpgeuw" "vpcmpgew"
+    "vpcmpgtb" "vpcmpgtd" "vpcmpgtq" "vpcmpgtub" "vpcmpgtud" "vpcmpgtuq"
+    "vpcmpgtuw" "vpcmpgtw" "vpcmpistri" "vpcmpistrm" "vpcmpleb" "vpcmpled"
+    "vpcmpleq" "vpcmpleub" "vpcmpleud" "vpcmpleuq" "vpcmpleuw" "vpcmplew"
+    "vpcmpltb" "vpcmpltd" "vpcmpltq" "vpcmpltub" "vpcmpltud" "vpcmpltuq"
+    "vpcmpltuw" "vpcmpltw" "vpcmpneqb" "vpcmpneqd" "vpcmpneqq" "vpcmpnequb"
+    "vpcmpnequd" "vpcmpnequq" "vpcmpnequw" "vpcmpneqw" "vpcmpngtb"
+    "vpcmpngtd" "vpcmpngtq" "vpcmpngtub" "vpcmpngtud" "vpcmpngtuq"
+    "vpcmpngtuw" "vpcmpngtw" "vpcmpnleb" "vpcmpnled" "vpcmpnleq" "vpcmpnleub"
+    "vpcmpnleud" "vpcmpnleuq" "vpcmpnleuw" "vpcmpnlew" "vpcmpnltb"
+    "vpcmpnltd" "vpcmpnltq" "vpcmpnltub" "vpcmpnltud" "vpcmpnltuq"
+    "vpcmpnltuw" "vpcmpnltw" "vpcmpq" "vpcmpub" "vpcmpud" "vpcmpuq" "vpcmpuw"
+    "vpcmpw" "vpcomb" "vpcomd" "vpcompressb" "vpcompressd" "vpcompressq"
+    "vpcompressw" "vpcomq" "vpcomub" "vpcomud" "vpcomuq" "vpcomuw" "vpcomw"
+    "vpconflictd" "vpconflictq" "vpdpbssd" "vpdpbssds" "vpdpbsud" "vpdpbsuds"
+    "vpdpbusd" "vpdpbusds" "vpdpbuud" "vpdpbuuds" "vpdpwssd" "vpdpwssds"
+    "vperm2f128" "vperm2i128" "vpermb" "vpermd" "vpermi2b" "vpermi2d"
+    "vpermi2pd" "vpermi2ps" "vpermi2q" "vpermi2w" "vpermilpd" "vpermilps"
+    "vpermpd" "vpermps" "vpermq" "vpermt2b" "vpermt2d" "vpermt2pd"
+    "vpermt2ps" "vpermt2q" "vpermt2w" "vpermw" "vpexpandb" "vpexpandd"
+    "vpexpandq" "vpexpandw" "vpextrb" "vpextrd" "vpextrq" "vpextrw"
+    "vpgatherdd" "vpgatherdq" "vpgatherqd" "vpgatherqq" "vphaddbd" "vphaddbq"
+    "vphaddbw" "vphaddd" "vphadddq" "vphaddsw" "vphaddubd" "vphaddubq"
+    "vphaddubw" "vphaddudq" "vphadduwd" "vphadduwq" "vphaddw" "vphaddwd"
+    "vphaddwq" "vphminposuw" "vphsubbw" "vphsubd" "vphsubdq" "vphsubsw"
+    "vphsubw" "vphsubwd" "vpinsrb" "vpinsrd" "vpinsrq" "vpinsrw" "vplzcntd"
+    "vplzcntq" "vpmacsdd" "vpmacsdqh" "vpmacsdql" "vpmacssdd" "vpmacssdqh"
+    "vpmacssdql" "vpmacsswd" "vpmacssww" "vpmacswd" "vpmacsww" "vpmadcsswd"
+    "vpmadcswd" "vpmadd132ph" "vpmadd132sh" "vpmadd213ph" "vpmadd213sh"
+    "vpmadd231ph" "vpmadd231sh" "vpmadd52huq" "vpmadd52luq" "vpmaddubsw"
+    "vpmaddwd" "vpmaskmovd" "vpmaskmovq" "vpmaxsb" "vpmaxsd" "vpmaxsq"
+    "vpmaxsw" "vpmaxub" "vpmaxud" "vpmaxuq" "vpmaxuw" "vpminsb" "vpminsd"
+    "vpminsq" "vpminsw" "vpminub" "vpminud" "vpminuq" "vpminuw" "vpmovb2m"
+    "vpmovd2m" "vpmovdb" "vpmovdw" "vpmovm2b" "vpmovm2d" "vpmovm2q"
+    "vpmovm2w" "vpmovmskb" "vpmovq2m" "vpmovqb" "vpmovqd" "vpmovqw"
+    "vpmovsdb" "vpmovsdw" "vpmovsqb" "vpmovsqd" "vpmovsqw" "vpmovswb"
+    "vpmovsxbd" "vpmovsxbq" "vpmovsxbw" "vpmovsxdq" "vpmovsxwd" "vpmovsxwq"
+    "vpmovusdb" "vpmovusdw" "vpmovusqb" "vpmovusqd" "vpmovusqw" "vpmovuswb"
+    "vpmovw2m" "vpmovwb" "vpmovzxbd" "vpmovzxbq" "vpmovzxbw" "vpmovzxdq"
+    "vpmovzxwd" "vpmovzxwq" "vpmsub132ph" "vpmsub132sh" "vpmsub213ph"
+    "vpmsub213sh" "vpmsub231ph" "vpmsub231sh" "vpmuldq" "vpmulhrsw"
+    "vpmulhuw" "vpmulhw" "vpmulld" "vpmullq" "vpmullw" "vpmultishiftqb"
+    "vpmuludq" "vpnmadd132sh" "vpnmadd213sh" "vpnmadd231sh" "vpnmsub132sh"
+    "vpnmsub213sh" "vpnmsub231sh" "vpopcntb" "vpopcntd" "vpopcntq" "vpopcntw"
+    "vpor" "vpord" "vporq" "vpperm" "vprold" "vprolq" "vprolvd" "vprolvq"
+    "vprord" "vprorq" "vprorvd" "vprorvq" "vprotb" "vprotd" "vprotq" "vprotw"
+    "vpsadbw" "vpscatterdd" "vpscatterdq" "vpscatterqd" "vpscatterqq"
+    "vpshab" "vpshad" "vpshaq" "vpshaw" "vpshlb" "vpshld" "vpshldd" "vpshldq"
+    "vpshldvd" "vpshldvq" "vpshldvw" "vpshldw" "vpshlq" "vpshlw" "vpshrdd"
+    "vpshrdq" "vpshrdvd" "vpshrdvq" "vpshrdvw" "vpshrdw" "vpshufb"
+    "vpshufbitqmb" "vpshufd" "vpshufhw" "vpshuflw" "vpsignb" "vpsignd"
+    "vpsignw" "vpslld" "vpslldq" "vpsllq" "vpsllvd" "vpsllvq" "vpsllvw"
+    "vpsllw" "vpsrad" "vpsraq" "vpsravd" "vpsravq" "vpsravw" "vpsraw"
+    "vpsrld" "vpsrldq" "vpsrlq" "vpsrlvd" "vpsrlvq" "vpsrlvw" "vpsrlw"
+    "vpsubb" "vpsubd" "vpsubq" "vpsubsb" "vpsubsw" "vpsubusb" "vpsubusw"
+    "vpsubw" "vpternlogd" "vpternlogq" "vptest" "vptestmb" "vptestmd"
+    "vptestmq" "vptestmw" "vptestnmb" "vptestnmd" "vptestnmq" "vptestnmw"
+    "vpunpckhbw" "vpunpckhdq" "vpunpckhqdq" "vpunpckhwd" "vpunpcklbw"
+    "vpunpckldq" "vpunpcklqdq" "vpunpcklwd" "vpxor" "vpxord" "vpxorq"
+    "vrangepd" "vrangeps" "vrangesd" "vrangess" "vrcp14pd" "vrcp14ps"
+    "vrcp14sd" "vrcp14ss" "vrcp28pd" "vrcp28ps" "vrcp28sd" "vrcp28ss"
+    "vrcpph" "vrcpps" "vrcpsh" "vrcpss" "vreducepd" "vreduceph" "vreduceps"
+    "vreducesd" "vreducesh" "vreducess" "vrndscalepd" "vrndscaleps"
+    "vrndscalesd" "vrndscaless" "vroundpd" "vroundps" "vroundsd" "vroundss"
+    "vrsqrt14pd" "vrsqrt14ps" "vrsqrt14sd" "vrsqrt14ss" "vrsqrt28pd"
+    "vrsqrt28ps" "vrsqrt28sd" "vrsqrt28ss" "vrsqrtph" "vrsqrtps" "vrsqrtsh"
+    "vrsqrtss" "vscalefpd" "vscalefph" "vscalefps" "vscalefsd" "vscalefsh"
+    "vscalefss" "vscatterdpd" "vscatterdps" "vscatterpf0dpd" "vscatterpf0dps"
+    "vscatterpf0qpd" "vscatterpf0qps" "vscatterpf1dpd" "vscatterpf1dps"
+    "vscatterpf1qpd" "vscatterpf1qps" "vscatterqpd" "vscatterqps"
+    "vsha512msg1" "vsha512msg2" "vsha512rnds2" "vshuff32x4" "vshuff64x2"
+    "vshufi32x4" "vshufi64x2" "vshufpd" "vshufps" "vsm3msg1" "vsm3msg2"
+    "vsm3rnds2" "vsm4key4" "vsm4rnds4" "vsqrtpd" "vsqrtph" "vsqrtps"
+    "vsqrtsd" "vsqrtsh" "vsqrtss" "vstmxcsr" "vsubpd" "vsubph" "vsubps"
+    "vsubsd" "vsubsh" "vsubss" "vtestpd" "vtestps" "vucomisd" "vucomish"
+    "vucomiss" "vunpckhpd" "vunpckhps" "vunpcklpd" "vunpcklps" "vxorpd"
+    "vxorps" "vzeroall" "vzeroupper" "wbinvd" "wbnoinvd" "wrfsbase"
+    "wrgsbase" "wrmsr" "wrmsrlist" "wrmsrns" "wrpkru" "wrshr" "wrssd" "wrssq"
+    "wrussd" "wrussq" "xabort" "xadd" "xbegin" "xbts" "xchg" "xcryptcbc"
+    "xcryptcfb" "xcryptctr" "xcryptecb" "xcryptofb" "xend" "xgetbv" "xlat"
+    "xlatb" "xor" "xorpd" "xorps" "xresldtrk" "xrstor" "xrstor64" "xrstors"
+    "xrstors64" "xsave" "xsave64" "xsavec" "xsavec64" "xsaveopt" "xsaveopt64"
+    "xsaves" "xsaves64" "xsetbv" "xsha1" "xsha256" "xstore" "xsusldtrk"
+    "xtest")
+  "NASM 2.16.03 instruction tokens for `nasm-mode'.")
+
+(defconst nasm-operator
+  '("!=" "%%" "&&" "//" "<<" "<<<" "<=" "<=>" "<>" "==" ">=" ">>" ">>>" "?"
+    "^^" "||")
+  "NASM 2.16.03 operator tokens for `nasm-mode'.")
+
+(defconst nasm-pp-directive
+  '("%aliases" "%arg" "%assign" "%clear" "%defalias" "%define" "%defstr"
+    "%deftok" "%depend" "%elif" "%elifctx" "%elifdef" "%elifdefalias"
+    "%elifdifi" "%elifempty" "%elifenv" "%elifid" "%elifidn" "%elifidni"
+    "%elifmacro" "%elifn" "%elifnctx" "%elifndef" "%elifndefalias"
+    "%elifndifi" "%elifnempty" "%elifnenv" "%elifnid" "%elifnidn"
+    "%elifnidni" "%elifnmacro" "%elifnnum" "%elifnstr" "%elifntoken"
+    "%elifnum" "%elifnusable" "%elifnusing" "%elifstr" "%eliftoken"
+    "%elifusable" "%elifusing" "%else" "%endif" "%endm" "%endmacro" "%endrep"
+    "%error" "%exitmacro" "%exitrep" "%fatal" "%iassign" "%idefalias"
+    "%idefine" "%idefstr" "%ideftok" "%if" "%ifctx" "%ifdef" "%ifdefalias"
+    "%ifdifi" "%ifempty" "%ifenv" "%ifid" "%ifidn" "%ifidni" "%ifmacro"
+    "%ifn" "%ifnctx" "%ifndef" "%ifndefalias" "%ifndifi" "%ifnempty"
+    "%ifnenv" "%ifnid" "%ifnidn" "%ifnidni" "%ifnmacro" "%ifnnum" "%ifnstr"
+    "%ifntoken" "%ifnum" "%ifnusable" "%ifnusing" "%ifstr" "%iftoken"
+    "%ifusable" "%ifusing" "%imacro" "%include" "%ipathsearch" "%irmacro"
+    "%istrcat" "%istrlen" "%isubstr" "%ixdefine" "%line" "%local" "%macro"
+    "%null" "%pathsearch" "%pop" "%pragma" "%push" "%rep" "%repl" "%require"
+    "%rmacro" "%rotate" "%stacksize" "%strcat" "%strlen" "%substr" "%undef"
+    "%undefalias" "%unimacro" "%unmacro" "%use" "%warning" "%xdefine")
+  "NASM 2.16.03 pp-directive tokens for `nasm-mode'.")
+
+(defconst nasm-prefix
+  '("a16" "a32" "a64" "asp" "bnd" "evex" "lock" "nobnd" "o16" "o32" "o64"
+    "osp" "rep" "repe" "repne" "repnz" "repz" "rex" "times" "vex" "vex2"
+    "vex3" "wait" "xacquire" "xrelease")
+  "NASM 2.16.03 prefix tokens for `nasm-mode'.")
+
+(defconst nasm-register
+  '("ah" "al" "ax" "bh" "bl" "bnd0" "bnd1" "bnd2" "bnd3" "bp" "bpl" "bx" "ch"
+    "cl" "cr0" "cr1" "cr10" "cr11" "cr12" "cr13" "cr14" "cr15" "cr2" "cr3"
+    "cr4" "cr5" "cr6" "cr7" "cr8" "cr9" "cs" "cx" "dh" "di" "dil" "dl" "dr0"
+    "dr1" "dr10" "dr11" "dr12" "dr13" "dr14" "dr15" "dr2" "dr3" "dr4" "dr5"
+    "dr6" "dr7" "dr8" "dr9" "ds" "dx" "eax" "ebp" "ebx" "ecx" "edi" "edx"
+    "es" "esi" "esp" "fs" "gs" "k0" "k1" "k2" "k3" "k4" "k5" "k6" "k7" "mm0"
+    "mm1" "mm2" "mm3" "mm4" "mm5" "mm6" "mm7" "r10" "r10b" "r10d" "r10w"
+    "r11" "r11b" "r11d" "r11w" "r12" "r12b" "r12d" "r12w" "r13" "r13b" "r13d"
+    "r13w" "r14" "r14b" "r14d" "r14w" "r15" "r15b" "r15d" "r15w" "r8" "r8b"
+    "r8d" "r8w" "r9" "r9b" "r9d" "r9w" "rax" "rbp" "rbx" "rcx" "rdi" "rdx"
+    "rsi" "rsp" "segr6" "segr7" "si" "sil" "sp" "spl" "ss" "st0" "st1" "st2"
+    "st3" "st4" "st5" "st6" "st7" "tmm0" "tmm1" "tmm2" "tmm3" "tmm4" "tmm5"
+    "tmm6" "tmm7" "tr0" "tr1" "tr2" "tr3" "tr4" "tr5" "tr6" "tr7" "xmm0"
+    "xmm1" "xmm10" "xmm11" "xmm12" "xmm13" "xmm14" "xmm15" "xmm16" "xmm17"
+    "xmm18" "xmm19" "xmm2" "xmm20" "xmm21" "xmm22" "xmm23" "xmm24" "xmm25"
+    "xmm26" "xmm27" "xmm28" "xmm29" "xmm3" "xmm30" "xmm31" "xmm4" "xmm5"
+    "xmm6" "xmm7" "xmm8" "xmm9" "ymm0" "ymm1" "ymm10" "ymm11" "ymm12" "ymm13"
+    "ymm14" "ymm15" "ymm16" "ymm17" "ymm18" "ymm19" "ymm2" "ymm20" "ymm21"
+    "ymm22" "ymm23" "ymm24" "ymm25" "ymm26" "ymm27" "ymm28" "ymm29" "ymm3"
+    "ymm30" "ymm31" "ymm4" "ymm5" "ymm6" "ymm7" "ymm8" "ymm9" "zmm0" "zmm1"
+    "zmm10" "zmm11" "zmm12" "zmm13" "zmm14" "zmm15" "zmm16" "zmm17" "zmm18"
+    "zmm19" "zmm2" "zmm20" "zmm21" "zmm22" "zmm23" "zmm24" "zmm25" "zmm26"
+    "zmm27" "zmm28" "zmm29" "zmm3" "zmm30" "zmm31" "zmm4" "zmm5" "zmm6"
+    "zmm7" "zmm8" "zmm9")
+  "NASM 2.16.03 register tokens for `nasm-mode'.")
+
+(defconst nasm-size
+  '("byte" "dword" "oword" "qword" "tword" "word" "yword" "zword")
+  "NASM 2.16.03 size tokens for `nasm-mode'.")
+
+(defconst nasm-special
+  '("abs" "dup" "far" "long" "near" "nosplit" "ptr" "rel" "seg" "short"
+    "strict" "to" "wrt")
+  "NASM 2.16.03 special tokens for `nasm-mode'.")

_service:tar_scm:nasm-2.16.03.tar.xz/misc/omfdump.c Added

@@ -0,0 +1,517 @@
+/*
+ * omfdump.c
+ *
+ * Very simple program to dump the contents of an OMF (OBJ) file
+ *
+ * This assumes a littleendian, unaligned-load-capable host and a
+ * C compiler which handles basic C99.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <inttypes.h>
+#include <ctype.h>
+#include <fcntl.h>
+#include <unistd.h>
+#include <stdbool.h>
+#include <sys/mman.h>
+#include <sys/stat.h>
+
+const char *progname;
+
+static const char *record_types256 =
+{
+    0x80 = "THEADR",
+    0x82 = "LHEADR",
+    0x88 = "COMENT",
+    0x8a = "MODEND16",
+    0x8b = "MODEND32",
+    0x8c = "EXTDEF",
+    0x90 = "PUBDEF16",
+    0x91 = "PUBDEF32",
+    0x94 = "LINNUM16",
+    0x95 = "LINNUM32",
+    0x96 = "LNAMES",
+    0x98 = "SEGDEF16",
+    0x99 = "SEGDEF32",
+    0x9a = "GRPDEF",
+    0x9c = "FIXUPP16",
+    0x9d = "FIXUPP32",
+    0xa0 = "LEDATA16",
+    0xa1 = "LEDATA32",
+    0xa2 = "LIDATA16",
+    0xa3 = "LIDATA32",
+    0xb0 = "COMDEF",
+    0xb2 = "BAKPAT16",
+    0xb3 = "BAKPAT32",
+    0xb4 = "LEXTDEF",
+    0xb6 = "LPUBDEF16",
+    0xb7 = "LPUBDEF32",
+    0xb8 = "LCOMDEF",
+    0xbc = "CEXTDEF",
+    0xc2 = "COMDAT16",
+    0xc3 = "COMDAT32",
+    0xc4 = "LINSYM16",
+    0xc5 = "LINSYM32",
+    0xc6 = "ALIAS",
+    0xc8 = "NBKPAT16",
+    0xc9 = "NBKPAT32",
+    0xca = "LLNAMES",
+    0xcc = "VERNUM",
+    0xce = "VENDEXT",
+    0xf0 = "LIBHDR",
+    0xf1 = "LIBEND",
+};
+
+typedef void (*dump_func)(uint8_t, const uint8_t *, size_t);
+
+/* Ordered collection type */
+struct collection {
+    size_t n;			/* Elements in collection (not including 0) */
+    size_t s;			/* Elements allocated (not including 0) */
+    const void **p;		/* Element pointers */
+};
+
+struct collection c_names, c_lsegs, c_groups, c_extsym;
+
+static void nomem(void)
+{
+    fprintf(stderr, "%s: memory allocation error\n", progname);
+    exit(1);
+}
+
+#define INIT_SIZE 64
+static void add_collection(struct collection *c, const void *p)
+{
+    if (c->n >= c->s) {
+	size_t cs = c->s ? (c->s << 1) : INIT_SIZE;
+	const void **cp = realloc(c->p, cs*sizeof(const void *));
+
+	if (!cp)
+	    nomem();
+
+	c->p = cp;
+	c->s = cs;
+
+	memset(cp + c->n, 0, (cs - c->n)*sizeof(const void *));
+    }
+
+    c->p++c->n = p;
+}
+
+static const void *get_collection(struct collection *c, size_t index)
+{
+    if (index >= c->n)
+	return NULL;
+
+    return c->pindex;
+}
+
+static void hexdump_data(unsigned int offset, const uint8_t *data,
+                         size_t n, size_t field)
+{
+    unsigned int i, j;
+
+    for (i = 0; i < n; i += 16) {
+	printf("   %04x: ", i+offset);
+	for (j = 0; j < 16; j++) {
+            char sep = (j == 7) ? '-' : ' ';
+	    if (i+j < field)
+		printf("%02x%c", datai+j, sep);
+	    else if (i+j < n)
+                printf("xx%c", sep); /* Beyond end of... */
+            else
+		printf("   ");  /* No separator */
+	}
+	printf(" :  ");
+	for (j = 0; j < 16; j++) {
+            if (i+j < n)
+                putchar((i+j >= field) ? 'x' :
+                        isprint(datai+j) ? datai+j : '.');
+	}
+	putchar('\n');
+    }
+}
+
+static void dump_unknown(uint8_t type, const uint8_t *data, size_t n)
+{
+    (void)type;
+    hexdump_data(0, data, n, n);
+}
+
+static void print_dostime(const uint8_t *p)
+{
+    uint16_t da = (p3 << 8) + p2;
+    uint16_t ti = (p1 << 8) + p0;
+
+    printf("%04u-%02u-%02u %02u:%02u:%02u",
+           (da >> 9) + 1980, (da >> 5) & 15, da & 31,
+           (ti >> 11), (ti >> 5) & 63, (ti << 1) & 63);
+}
+
+static void dump_coment_depfile(uint8_t type, const uint8_t *data, size_t n)
+{
+    if (n > 4 && data4 == n-5) {
+        printf("   # ");
+        print_dostime(data);
+        printf("  %.*s\n", n-5, data+5);
+    }
+
+    hexdump_data(2, data, n, n);
+}
+
+static const dump_func dump_coment_class256 = {
+    0xe9 = dump_coment_depfile
+};
+
+static void dump_coment(uint8_t type, const uint8_t *data, size_t n)
+{
+    uint8_t class;
+    static const char *coment_class256 = {
+	0x00 = "Translator",
+	0x01 = "Copyright",
+	0x81 = "Library specifier",
+	0x9c = "MS-DOS version",
+	0x9d = "Memory model",
+	0x9e = "DOSSEG",
+	0x9f = "Library search",
+	0xa0 = "OMF extensions",
+	0xa1 = "New OMF extension",
+	0xa2 = "Link pass separator",
+	0xa3 = "LIBMOD",
+	0xa4 = "EXESTR",
+	0xa6 = "INCERR",
+	0xa7 = "NOPAD",
+	0xa8 = "WKEXT",
+	0xa9 = "LZEXT",
+	0xda = "Comment",
+	0xdb = "Compiler",
+	0xdc = "Date",
+	0xdd = "Timestamp",
+	0xdf = "User",
+        0xe3 = "Type definition",
+        0xe8 = "Filename",
+	0xe9 = "Dependency file",
+	0xff = "Command line"
+    };
+
+    if (n < 2) {
+	hexdump_data(type, data, 2, n);
+	return;
+    }
+
+    type  = data0;
+    class = data1;
+
+    printf("   NP=%d NL=%d UD=%02X %02X %s\n",
+	   (type >> 7) & 1,
+	   (type >> 6) & 1,
+	   type & 0x3f,
+	   class,
+	   coment_classclass ? coment_classclass : "???");
+
+    if (dump_coment_classclass)
+        dump_coment_classclass(class, data+2, n-2);
+    else
+        hexdump_data(2, data+2, n-2, n-2);
+}
+
+/* Parse an index field */
+static uint16_t get_index(const uint8_t **pp)
+{
+    uint8_t c;
+
+    c = *(*pp)++;
+    if (c & 0x80) {
+        return ((c & 0x7f) << 8) + *(*pp)++;
+    } else {
+        return c;
+    }
+}
+
+static uint16_t get_16(const uint8_t **pp)
+{
+    uint16_t v = *(const uint16_t *)(*pp);
+    (*pp) += 2;
+
+    return v;
+}
+
+static uint32_t get_32(const uint8_t **pp)
+{
+    const uint32_t v = *(const uint32_t *)(*pp);
+    (*pp) += 4;
+
+    return v;
+}
+
+/* Returns a name as a C string in a newly allocated buffer */
+char *lname(int index)
+{
+    char *s;
+    const char *p = get_collection(&c_names, index);
+    size_t len;
+
+    if (!p)
+	return NULL;
+
+    len = (uint8_t)p0;
+
+    s = malloc(len+1);
+    if (!s)
+	nomem();
+
+    memcpy(s, p+1, len);
+    slen = '\0';
+
+    return s;
+}
+
+/* LNAMES or LLNAMES */
+static void dump_lnames(uint8_t type, const uint8_t *data, size_t n)
+{
+    const uint8_t *p = data;
+    const uint8_t *end = data + n;
+
+    while (p < end) {
+        size_t l = *p+1;
+        if (l > n) {
+	    add_collection(&c_names, NULL);
+            printf("   # %4u 0x%04x: \"%.*s... <%zu missing bytes>\n",
+                   c_names.n, c_names.n, n-1, p+1, l-n);
+        } else {
+	    add_collection(&c_names, p);
+            printf("   # %4u 0x%04x: \"%.*s\"\n",
+		   c_names.n, c_names.n, l-1, p+1);
+        }
+        hexdump_data(p-data, p, l, n);
+        p += l;
+        n -= l;
+    }
+}
+
+/* SEGDEF16 or SEGDEF32 */
+static void dump_segdef(uint8_t type, const uint8_t *data, size_t n)
+{
+    bool big = type & 1;
+    const uint8_t *p = data;
+    const uint8_t *end = data+n;
+    uint8_t attr;
+    static const char * const alignment8 =
+	{ "ABS", "BYTE", "WORD", "PARA", "PAGE", "DWORD", "LTL", "?ALIGN" };
+    static const char * const combine8 =
+	{ "PRIVATE", "?COMMON", "PUBLIC", "?COMBINE", "?PUBLIC", "STACK", "COMMON", "?PUBLIC" };
+    uint16_t idx;
+    char *s;
+
+    if (p >= end)
+	return;
+
+    attr = *p++;
+
+    printf("   # %s (A%u) %s (C%u) %s%s",
+	   alignment(attr >> 5) & 7, (attr >> 5) & 7,
+	   combine(attr >> 2) & 7, (attr >> 2) & 7,
+	   (attr & 0x02) ? "MAXSIZE " : "",
+	   (attr & 0x01) ? "USE32" : "USE16");
+
+    if (((attr >> 5) & 7) == 0) {
+	/* Absolute segment */
+	if (p+3 > end)
+	    goto dump;
+	printf(" AT %04x:", get_16(&p));
+	printf("%02x", *p++);
+    }
+
+    if (big) {
+	if (p+4 > end)
+	    goto dump;
+	printf(" size 0x%08x", get_32(&p));
+    } else {
+	if (p+2 > end)
+	    goto dump;
+	printf(" size 0x%04x", get_16(&p));
+    }
+
+    idx = get_index(&p);
+    if (p > end)
+	goto dump;
+    s = lname(idx);
+    printf(" name '%s'", s);
+
+    idx = get_index(&p);
+    if (p > end)
+	goto dump;
+    s = lname(idx);
+    printf(" class '%s'", s);
+
+    idx = get_index(&p);
+    if (p > end)
+	goto dump;
+    s = lname(idx);
+    printf(" ovl '%s'", s);
+
+dump:
+    putchar('\n');
+    hexdump_data(0, data, n, n);
+}
+
+/* FIXUPP16 or FIXUPP32 */
+static void dump_fixupp(uint8_t type, const uint8_t *data, size_t n)
+{
+    bool big = type & 1;
+    const uint8_t *p = data;
+    const uint8_t *end = data + n;
+    static const char * const method_base4 =
+        { "SEGDEF", "GRPDEF", "EXTDEF", "frame#" };
+
+    while (p < end) {
+        const uint8_t *start = p;
+        uint8_t op = *p++;
+        uint16_t index;
+        uint32_t disp;
+
+        if (!(op & 0x80)) {
+            /* THREAD record */
+            bool frame = !!(op & 0x40);
+
+            printf("   THREAD %-7s%d%s method %c%d (%s)",
+                   frame ? "frame" : "target", op & 3,
+                   (op & 0x20) ? " +flag5?" : "",
+                   (op & 0x40) ? 'F' : 'T',
+                   op & 3, method_baseop & 3);
+
+            if ((op & 0x50) != 0x50) {
+                printf(" index 0x%04x", get_index(&p));
+            }
+            putchar('\n');
+        } else {
+            /* FIXUP subrecord */
+            uint8_t fix;
+
+            printf("   FIXUP  %s-rel location %2d offset 0x%03x",
+                   (op & 0x40) ? "seg" : "self",
+                   (op & 0x3c) >> 2,
+                   ((op & 3) << 8) + *p++);
+
+            fix = *p++;
+            printf("\n          frame %s%d%s",
+                   (fix & 0x80) ? "thread " : "F",
+                   ((fix & 0x70) >> 4),
+                   ((fix & 0xc0) == 0xc0) ? "?" : "");
+
+            if ((fix & 0xc0) == 0)
+                printf(" datum 0x%04x", get_index(&p));
+
+            printf("\n          target %s%d",
+                   (fix & 0x10) ? "thread " : "method T",
+                   fix & 3);
+
+            if ((fix & 0x10) == 0)
+                printf(" (%s)", method_basefix & 3);
+
+            printf(" datum 0x%04x", get_index(&p));
+
+            if ((fix & 0x08) == 0) {
+                if (big) {
+                    printf(" disp 0x%08x", get_32(&p));
+                } else {
+                    printf(" disp 0x%04x", get_16(&p));
+                }
+            }
+            putchar('\n');
+        }
+        hexdump_data(start-data, start, p-start, n-(start-data));
+    }
+}
+
+static const dump_func dump_type256 =
+{
+    0x88 = dump_coment,
+    0x96 = dump_lnames,
+    0x98 = dump_segdef,
+    0x99 = dump_segdef,
+    0x9c = dump_fixupp,
+    0x9d = dump_fixupp,
+    0xca = dump_lnames,
+};
+
+int dump_omf(int fd)
+{
+    struct stat st;
+    size_t len, n;
+    uint8_t type;
+    const uint8_t *p, *data;
+
+    if (fstat(fd, &st))
+	return -1;
+
+    len = st.st_size;
+
+    data = mmap(NULL, len, PROT_READ, MAP_PRIVATE, fd, 0);
+    if (data == MAP_FAILED)
+	return -1;
+
+    p = data;
+    while (len >= 3) {
+	uint8_t csum;
+	int i;
+
+	type = p0;
+	n = *(uint16_t *)(p+1);
+
+	printf("%02x %-10s %4zd bytes",
+	       type,
+	       record_typestype ? record_typestype : "???",
+	       n);
+
+	if (len < n+3) {
+	    printf("\n  (truncated, only %zd bytes left)\n", len-3);
+	    break;		/* Truncated */
+	}
+
+	p += 3;	      /* Header doesn't count in the length */
+	n--;	      /* Remove checksum byte */
+
+	csum = 0;
+	for (i = -3; i < (int)n; i++)
+	    csum -= pi;
+
+	printf(", checksum %02X", pi);
+	if (csum == pi)
+	    printf(" (valid)\n");
+	else
+	    printf(" (actual = %02X)\n", csum);
+
+	if (dump_typetype)
+	    dump_typetype(type, p, n);
+	else
+	    dump_unknown(type, p, n);
+
+	p   += n+1;
+	len -= (n+4);
+    }
+
+    munmap((void *)data, st.st_size);
+    return 0;
+}
+
+int main(int argc, char *argv)
+{
+    int fd;
+    int i;
+
+    progname = argv0;
+
+    for (i = 1; i < argc; i++) {
+	fd = open(argvi, O_RDONLY);
+	if (fd < 0 || dump_omf(fd)) {
+	    perror(argvi);
+	    return 1;
+	}
+	close(fd);
+    }
+
+    return 0;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/misc/pmw.bat Added

_service:tar_scm:nasm-2.16.03.tar.xz/misc/proc32.ash Added

@@ -0,0 +1,441 @@
+;--------=========xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx=========--------
+;
+;   Copyright (C) 1999 by Andrew Zabolotny
+;   Miscellaneous NASM macros that makes use of new preprocessor features
+;
+;   This library is free software; you can redistribute it and/or
+;   modify it under the terms of the GNU Library General Public
+;   License as published by the Free Software Foundation; either
+;   version 2 of the License, or (at your option) any later version.
+;
+;   This library is distributed in the hope that it will be useful,
+;   but WITHOUT ANY WARRANTY; without even the implied warranty of
+;   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+;   Library General Public License for more details.
+;
+;   You should have received a copy of the GNU Library General Public
+;   License along with this library; if not, write to the Free
+;   Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+;
+;--------=========xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx=========--------
+
+;   The macros in this file provides support for writing 32-bit C-callable
+;   NASM routines. For a short description of every macros see the
+;   corresponding comment before every one. Simple usage example:
+;
+;	proc	sin,1
+;		targ	%$angle
+;		fld	%$angle
+;		fsin
+;	endproc	sin
+
+%ifndef __PROC32_ASH__
+%define __PROC32_ASH__
+
+WARNING -macro-selfref
+
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+; Summary:
+;   Mangle a name to be compatible with the C compiler
+; Arguments:
+;   The name
+; Example:
+;		cname (my_func)
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+%ifdef EXTERNC_UNDERSCORE
+		%define	cname(x) _ %+ x
+%else
+		%define	cname(x) x
+%endif
+
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+; Summary:
+;   Import an external C procedure definition
+; Arguments:
+;   The name of external C procedure
+; Example:
+;		cextern	printf
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+%macro		cextern	1
+		%xdefine %1 cname(%1)
+	%ifidni __OUTPUT_FORMAT__,obj
+		extern	%1:wrt FLAT
+	%else
+		extern	%1
+	%endif
+%endmacro
+
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+; Summary:
+;   Export an C procedure definition
+; Arguments:
+;   The name of C procedure
+; Example:
+;		cglobal	my_printf
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+%macro		cglobal	1
+		%xdefine %1 cname(%1)
+		global	%1
+%endmacro
+
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+; Summary:
+;   Misc macros to deal with PIC shared libraries
+; Comment:
+;   Note that we have a different syntax for working with and without
+;   PIC shared libraries. In a PIC environment we should load first
+;   the address of the variable into a register and then work through
+;   that address, i.e: mov eax,myvar; mov eax,1
+;   In a non-PIC environment we should directly write: mov myvar,1
+; Example:
+;		extvar	myvar
+;		GetGOT
+;	%ifdef PIC
+;		mov	ebx,myvar	; get offset of myvar into ebx
+;	%else
+;		lea	ebx,myvar
+;	%endif
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+%ifdef PIC
+		cextern	_GLOBAL_OFFSET_TABLE_
+	%macro	GetGOT	0
+		%ifdef .$proc.stkofs
+			%assign .$proc.stkofs .$proc.stkofs+4
+		%endif
+		call	%$Get_GOT
+	%$Get_GOT:
+		pop	ebx
+		add	ebx,_GLOBAL_OFFSET_TABLE_ + $$ - %$Get_GOT wrt ..gotpc
+	%endmacro
+	%macro	extvar	1
+		cextern	%1
+		%xdefine %1 ebx+%1 wrt ..got
+	%endmacro
+%else
+	%define	GetGOT
+	%macro	extvar	1
+		cextern	%1
+	%endmacro
+%endif
+
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+; Summary:
+;   Begin a procedure definition
+;   For performance reasons we don't use stack frame pointer EBP,
+;   instead we're using the esp+xx addressing. Because of this
+;   you should be careful when you work with stack pointer.
+;   The push/pop instructions are macros that are defined to
+;   deal correctly with these issues.
+; Arguments:
+;   First argument - the procedure name
+;   Second optional argument - the number of bytes for local variables
+;   The following arguments could specify the registers that should be
+;   pushed at beginning of procedure and popped before exiting
+; Example:
+;   proc	MyTestProc
+;   proc	MyTestProc,4,ebx,esi,edi
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+%macro		proc	1-3+ 0
+		cglobal	%1
+		%push	%1
+		align	16
+%1:
+		%xdefine %$proc.name %1
+	; total size of local arguments
+		%assign %$proc.locsize (%2+3) & 0xFFFC
+	; offset from esp to argument
+		%assign	%$proc.argofs 4+%$proc.locsize
+	; additional offset to args (tracks push/pops)
+		%assign	.$proc.stkofs 0
+	; offset from esp to local arguments
+		%assign %$proc.locofs 0
+	; Now push the registers that we should save
+		%define %$proc.save %3
+	%if %$proc.locsize != 0
+		sub	esp,%$proc.locsize
+	%endif
+		push	%$proc.save
+%endmacro
+
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+; Summary:
+;   Declare an argument passed on stack
+;   This macro defines two additional macros:
+;     first (with the name given by first argument) - esp+xx
+;     second (with a underscore appended to first argument) - esp+xx
+; Arguments:
+;   First argument defines the procedure argument name
+;   Second optional parameter defines the size of the argument
+;   Default value is 4 (a double word)
+; Example:
+;		arg	.my_float
+;		arg	.my_double,8
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+%macro		arg	1-2 4
+	%ifndef %$proc.argofs
+		%error	"`arg' not in a proc context"
+	%else
+	; Trick: temporary undefine .$proc.stkofs so that it won't be expanded
+		%assign	%%. .$proc.stkofs
+		%undef .$proc.stkofs
+		%xdefine %{1}_ esp+%$proc.argofs+.$proc.stkofs
+		%xdefine %1 esp+%$proc.argofs+.$proc.stkofs
+		%assign .$proc.stkofs %%.
+		%assign %$proc.argofs %2+%$proc.argofs
+	%endif
+%endmacro
+
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+; Summary:
+;   Declare an local variable
+;     first (with the name given by first argument) - esp+xx
+;     second (with  a slash prefixing the first argument) - esp+xx
+; Arguments:
+;   First argument defines the procedure argument name
+;   Second optional parameter defines the size of the argument
+;   Default value is 4 (a double word)
+; Example:
+;		loc	.int_value
+;		loc	.double_value,8
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+%macro		loc	1-2 4
+	%ifndef %$proc.locofs
+		%error	"`loc' not in a proc context"
+	%elif %$proc.locofs + %2 > %$proc.locsize
+		%error	"local stack space exceeded"
+	%else
+		%assign	%%. .$proc.stkofs
+		%undef .$proc.stkofs
+		%xdefine %{1}_ esp+%$proc.locofs+.$proc.stkofs
+		%xdefine %1 esp+%$proc.locofs+.$proc.stkofs
+		%assign .$proc.stkofs %%.
+		%assign %$proc.locofs %$proc.locofs+%2
+	%endif
+%endmacro
+
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+; Summary:
+;   Get the type of given size into context-local variable %$type
+; Arguments:
+;   Size of type we want (1,2,4,8 or 10)
+; Example:
+;		type	4	; gives "dword"
+;		type	10	; gives "tword"
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+%macro		type	1
+	%if %1 = 1
+		%define	%$type byte
+	%elif %1 = 2
+		%define	%$type word
+	%elif %1 = 4
+		%define	%$type dword
+	%elif %1 = 8
+		%define	%$type qword
+	%elif %1 = 10
+		%define	%$type tword
+	%else
+		%define %$. %1
+		%error "unknown type for argument size %$."
+	%endif
+%endmacro
+
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+; Summary:
+;   Same as `arg' but prepends "word", "dword" etc (typed arg)
+;     first (with the name given by first argument) - dword esp+xx
+;     second (with  a slash prefixing the first argument) - esp+xx
+; Arguments:
+;   Same as for `arg'
+; Example:
+;		targ	.my_float	; .my_float is now "dword esp+xxx"
+;		targ	.my_double,8	; .my_double is now "qword esp+xxx"
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+%macro		targ	1-2 4
+	%ifndef %$proc.argofs
+		%error	"`targ' not in a proc context"
+	%else
+		arg	%1,%2
+		type	%2
+		%assign	%%. .$proc.stkofs
+		%undef .$proc.stkofs
+		%xdefine %1 %$type %1
+		%assign .$proc.stkofs %%.
+	%endif
+%endmacro
+
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+; Summary:
+;   Same as `loc' but prepends "word", "dword" etc (typed loc)
+;     first (with the name given by first argument) - dword esp+xx
+;     second (with  a slash prefixing the first argument) - esp+xx
+; Arguments:
+;   Same as for `loc'
+; Example:
+;		tloc	int_value
+;		tloc	double_value,8
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+%macro		tloc	1-2 4
+	%ifndef %$proc.locofs
+		%error	"`tloc' not in a proc context"
+	%else
+		loc	%1,%2
+		type	%2
+		%assign	%%. .$proc.stkofs
+		%undef .$proc.stkofs
+		%xdefine %1 %$type %1
+		%assign .$proc.stkofs %%.
+	%endif
+%endmacro
+
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+; Summary:
+;   Finish a procedure
+;   Gives an error if proc/endproc pairs mismatch
+;   Defines an label called __end_(procedure name)
+;   which is useful for calculating function size
+; Arguments:
+;   (optional) The name of procedure
+; Example:
+;   endproc	MyTestProc
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+%push	tmp	; trick: define a dummy context to avoid error in next line
+%macro		endproc	0-1 %$proc.name
+	%ifndef %$proc.argofs
+		%error "`endproc' not in a proc context"
+	%elifnidn %$proc.name,%1
+		%define %$. %1
+		%error "endproc names mismatch: expected `%$proc.name'"
+		%error "but got `%$.' instead"
+	%elif %$proc.locofs < %$proc.locsize
+		%error	"unused local space declared (used %$proc.locofs, requested %$proc.locsize)"
+	%else
+%$exit:
+	; Now pop the registers that we should restore on exit
+		pop	%$proc.save
+		%if %$proc.locsize != 0
+		add	esp,%$proc.locsize
+		%endif
+		ret
+__end_%1:
+		%pop
+	%endif
+%endmacro
+%pop
+
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+; Summary:
+;   A replacement for "push" for use within procedures
+; Arguments:
+;   any number of registers which will be push'ed successively
+; Example:
+;		push	eax,ebx,ecx,edx
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+%macro		push	0-*
+; dummy comment to avoid problems with "push" on the same line with a label
+	%rep	%0
+		push	%1
+		%rotate	1
+		%assign .$proc.stkofs .$proc.stkofs+4
+	%endrep
+%endmacro
+
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+; Summary:
+;   A replacement for "pop" for use within procedures
+; Arguments:
+;   any number of registers which will be pop'ed in reverse order
+; Example:
+;		pop	eax,ebx,ecx,edx
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+%macro		pop	0-*
+; dummy comment to avoid problems with "pop" on the same line with a label
+	%rep	%0
+		%rotate	-1
+		pop	%1
+		%assign .$proc.stkofs .$proc.stkofs-4
+	%endrep
+%endmacro
+
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+; Summary:
+;   Replacements for "pushfd" and "popfd" that takes care of esp
+; Example:
+;		pushfd
+;		popfd
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+%macro		pushfd	0
+		pushfd
+		%assign .$proc.stkofs .$proc.stkofs+4
+%endmacro
+%macro		popfd	0
+		popfd
+		%assign .$proc.stkofs .$proc.stkofs-4
+%endmacro
+
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+; Summary:
+;   Exit from current procedure (optionally on given condition)
+; Arguments:
+;   Either none or a condition code
+; Example:
+;		exit
+;		exit	nz
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+%macro		exit	0-1 mp
+		j%1	near %$exit
+%endmacro
+
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+; Summary:
+;   start an conditional branch
+; Arguments:
+;   A condition code
+;   second (optional) argument - "short" (by default - "near")
+; Example:
+;		if	nz
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+%macro		if	1-2 near
+; dummy comment to avoid problems with "if" on the same line with a label
+		%push	if
+		j%-1	%2 %$elseif
+%endmacro
+
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+; Summary:
+;   define the "else" branch of a conditional statement
+; Arguments:
+;   optionally: "short" if jmp to endif is less than 128 bytes away
+; Example:
+;		else
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+%macro		else	0-1
+	%ifnctx if
+		%error	"`else' without matching `if'"
+	%else
+		jmp	%1 %$endif
+%$elseif:
+		%define	%$elseif_defined
+	%endif
+%endmacro
+
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+; Summary:
+;   Finish am conditional statement
+; Arguments:
+;   none
+; Example:
+;		endif
+;-----======xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx======-----
+%macro		endif	0
+	%ifnctx if
+		%error	"`endif' without matching `if'"
+	%else
+		%ifndef %$elseif_defined
+%$elseif:
+		%endif
+%$endif:
+		%pop
+	%endif
+%endmacro
+
+%endif ; __PROC32_ASH__

_service:tar_scm:nasm-2.16.03.tar.xz/misc/scitech.mac Added

@@ -0,0 +1,1222 @@
+;****************************************************************************
+;*
+;*  ========================================================================
+;*
+;*    The contents of this file are subject to the SciTech MGL Public
+;*    License Version 1.0 (the "License"); you may not use this file
+;*    except in compliance with the License. You may obtain a copy of
+;*    the License at http://www.scitechsoft.com/mgl-license.txt
+;*
+;*    Software distributed under the License is distributed on an
+;*    "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
+;*    implied. See the License for the specific language governing
+;*    rights and limitations under the License.
+;*
+;*    The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
+;*
+;*    The Initial Developer of the Original Code is SciTech Software, Inc.
+;*    All Rights Reserved.
+;*
+;*  ========================================================================
+;*
+;* Language:    NetWide Assembler (NASM) or Turbo Assembler (TASM)
+;* Environment: Any Intel Environment
+;*
+;* Description: Macros to provide memory model independent assembly language
+;*              module for C programming. Supports the large and flat memory
+;*				models.
+;*
+;*		The defines that you should use when assembling modules that
+;*				use this macro package are:
+;*
+;*					__LARGE__	Assemble for 16-bit large model
+;*                  __FLAT__    Assemble for 32-bit FLAT memory model
+;*                  __NOU__		No underscore for all external C labels
+;*					__NOU_VAR__	No underscore for global variables only
+;*
+;*				The default settings are for 16-bit large memory model with
+;*				leading underscores for symbol names.
+;*
+;*				The main intent of the macro file is to enable programmers
+;*				to write _one_ set of source that can be assembled to run
+;*				in either 16 bit real and protected modes or 32 bit
+;*				protected mode without the need to riddle the code with
+;*				'if flatmodel' style conditional assembly (it is still there
+;*				but nicely hidden by a macro layer that enhances the
+;*				readability and understandability of the resulting code).
+;*
+;****************************************************************************
+
+; Include the appropriate version in here depending on the assembler. NASM
+; appears to always try and parse code, even if it is in a non-compiling
+; block of a ifdef expression, and hence crashes if we include the TASM
+; macro package in the same header file. Hence we split the macros up into
+; two separate header files.
+
+ifdef __NASM_MAJOR__
+
+;============================================================================
+; Macro package when compiling with NASM.
+;============================================================================
+
+; Turn off underscores for globals if disabled for all externals
+
+%ifdef	__NOU__
+%define	__NOU_VAR__
+%endif
+
+; Define the __WINDOWS__ symbol if we are compiling for any Windows
+; environment
+
+%ifdef	__WINDOWS16__
+%define	__WINDOWS__			1
+%endif
+%ifdef	__WINDOWS32__
+%define __WINDOWS__			1
+%define __WINDOWS32_386__	1
+%endif
+
+; Macros for accessing 'generic' registers
+
+%ifdef	__FLAT__
+%idefine _ax	eax
+%idefine _bx	ebx
+%idefine _cx	ecx
+%idefine _dx	edx
+%idefine _si	esi
+%idefine _di	edi
+%idefine _bp	ebp
+%idefine _sp	esp
+%idefine _es
+%idefine UCHAR	BYTE		; Size of a character
+%idefine USHORT WORD		; Size of a short
+%idefine UINT	DWORD		; Size of an integer
+%idefine ULONG	DWORD		; Size of a long
+%idefine BOOL	DWORD		; Size of a boolean
+%idefine DPTR	DWORD		; Size of a data pointer
+%idefine FDPTR	FWORD		; Size of a far data pointer
+%idefine NDPTR	DWORD		; Size of a near data pointer
+%idefine CPTR	DWORD		; Size of a code pointer
+%idefine FCPTR	FWORD		; Size of a far code pointer
+%idefine NCPTR	DWORD		; Size of a near code pointer
+%idefine FPTR	NEAR		; Distance for function pointers
+%idefine DUINT	dd			; Declare a integer variable
+%idefine intsize 4
+%idefine flatmodel 1
+%else
+%idefine _ax	ax
+%idefine _bx	bx
+%idefine _cx	cx
+%idefine _dx	dx
+%idefine _si	si
+%idefine _di	di
+%idefine _bp	bp
+%idefine _sp	sp
+%idefine _es	es:
+%idefine UCHAR	BYTE		; Size of a character
+%idefine USHORT WORD		; Size of a short
+%idefine UINT	WORD		; Size of an integer
+%idefine ULONG	DWORD		; Size of a long
+%idefine BOOL	WORD		; Size of a boolean
+%idefine DPTR	DWORD		; Size of a data pointer
+%idefine FDPTR	DWORD		; Size of a far data pointer
+%idefine NDPTR	WORD		; Size of a near data pointer
+%idefine CPTR	DWORD		; Size of a code pointer
+%idefine FCPTR	DWORD		; Size of a far code pointer
+%idefine NCPTR	WORD		; Size of a near code pointer
+%idefine FPTR   FAR			; Distance for function pointers
+%idefine DUINT	dw			; Declare a integer variable
+%idefine intsize 2
+%endif
+%idefine invert ~
+%idefine offset
+%idefine use_nasm
+
+; Convert all jumps to near jumps, since NASM does not so this automatically
+
+%idefine jo		jo near
+%idefine jno	jno near
+%idefine jz		jz near
+%idefine jnz	jnz near
+%idefine je		je near
+%idefine jne	jne near
+%idefine jb		jb	near
+%idefine jbe	jbe	near
+%idefine ja		ja	near
+%idefine jae	jae	near
+%idefine jl		jl	near
+%idefine jle	jle	near
+%idefine jg		jg	near
+%idefine jge	jge	near
+%idefine jc		jc	near
+%idefine jnc	jnc	near
+%idefine js		js	near
+%idefine jns	jns	near
+
+%ifdef	DOUBLE
+%idefine	REAL	QWORD
+%idefine	DREAL	dq
+%else
+%idefine	REAL	DWORD
+%idefine	DREAL	dd
+%endif
+
+; Boolean truth values (same as those in debug.h)
+
+%idefine False		0
+%idefine True		1
+%idefine No			0
+%idefine Yes		1
+
+; Macro to be invoked at the start of all modules to set up segments for
+; later use. Does nothing for NASM.
+
+%imacro header 1
+%endmacro
+
+; Macro to begin a data segment
+
+%imacro begdataseg 1
+%ifdef __GNUC__
+segment .data public class=DATA use32 flat
+%else
+%ifdef flatmodel
+segment _DATA public align=4 class=DATA use32 flat
+%else
+segment _DATA public align=4 class=DATA use16
+%endif
+%endif
+%endmacro
+
+; Macro to end a data segment
+
+%imacro enddataseg 1
+%endmacro
+
+; Macro to begin a code segment
+
+%imacro begcodeseg 1
+%ifdef __GNUC__
+segment .text public class=CODE use32 flat
+%else
+%ifdef flatmodel
+segment _TEXT public align=16 class=CODE use32 flat
+%else
+segment %1_TEXT public align=16 class=CODE use16
+%endif
+%endif
+%endmacro
+
+; Macro to begin a near code segment
+
+%imacro begcodeseg_near 0
+%ifdef __GNUC__
+segment .text public class=CODE use32 flat
+%else
+%ifdef flatmodel
+segment _TEXT public align=16 class=CODE use32 flat
+%else
+segment _TEXT public align=16 class=CODE use16
+%endif
+%endif
+%endmacro
+
+; Macro to end a code segment
+
+%imacro endcodeseg 1
+%endmacro
+
+; Macro to end a near code segment
+
+%imacro endcodeseg_near 0
+%endmacro
+
+; Macro for an extern C symbol. If the C compiler requires leading
+; underscores, then the underscores are added to the symbol names, otherwise
+; they are left off. The symbol name is referenced in the assembler code
+; using the non-underscored symbol name.
+
+%imacro cextern 2
+%ifdef	__NOU_VAR__
+extern %1
+%else
+extern _%1
+%define	%1 _%1
+%endif
+%endmacro
+
+%imacro cexternfunc 2
+%ifdef	__NOU__
+extern %1
+%else
+extern _%1
+%define	%1 _%1
+%endif
+%endmacro
+
+; Macro for a public C symbol. If the C compiler requires leading
+; underscores, then the underscores are added to the symbol names, otherwise
+; they are left off. The symbol name is referenced in the assembler code
+; using the non-underscored symbol name.
+
+%imacro cpublic 1
+%ifdef	__NOU_VAR__
+global %1
+%1:
+%else
+global _%1
+_%1:
+%define	%1 _%1
+%endif
+%endmacro
+
+; Macro for an global C symbol. If the C compiler requires leading
+; underscores, then the underscores are added to the symbol names, otherwise
+; they are left off. The symbol name is referenced in the assembler code
+; using the non-underscored symbol name.
+
+%imacro cglobal 1
+%ifdef	__NOU_VAR__
+global %1
+%else
+global _%1
+%define	%1 _%1
+%endif
+%endmacro
+
+; Macro for an global C function symbol. If the C compiler requires leading
+; underscores, then the underscores are added to the symbol names, otherwise
+; they are left off. The symbol name is referenced in the assembler code
+; using the non-underscored symbol name.
+
+%imacro cglobalfunc 1
+%ifdef	__NOU__
+global %1
+%else
+global _%1
+%define	%1 _%1
+%endif
+%endmacro
+
+; Macro to start a C callable function. This will be a far function for
+; 16-bit code, and a near function for 32-bit code.
+
+%imacro cprocstatic 1
+%push cproc
+%1:
+%ifdef flatmodel
+%stacksize flat
+%define ret	retn
+%else
+%stacksize large
+%define ret	retf
+%endif
+%assign %$localsize 0
+%endmacro
+
+%imacro cprocstart 1
+%push cproc
+	cglobalfunc %1
+%1:
+%ifdef flatmodel
+%stacksize flat
+%define ret	retn
+%else
+%stacksize large
+%define ret	retf
+%endif
+%assign %$localsize 0
+%endmacro
+
+; This macro sets up a procedure to be exported from a 16 bit DLL. Since the
+; calling conventions are always _far _pascal for 16 bit DLL's, we actually
+; rename this routine with an extra underscore with 'C' calling conventions
+; and a small DLL stub will be provided by the high level code to call the
+; assembler routine.
+
+%imacro	cprocstartdll16 1
+%ifdef	__WINDOWS16__
+cprocstart	_%1
+%else
+cprocstart	%1
+%endif
+%endmacro
+
+; Macro to start a C callable near function.
+
+%imacro cprocnear 1
+%push cproc
+	cglobalfunc %1
+%1:
+%define ret	retn
+%ifdef flatmodel
+%stacksize flat
+%else
+%stacksize small
+%endif
+%assign %$localsize 0
+%endmacro
+
+; Macro to start a C callable far function.
+
+%imacro cprocfar 1
+%push cproc
+	cglobalfunc %1
+%1:
+%define ret	retf
+%ifdef flatmodel
+%stacksize flat
+%else
+%stacksize large
+%endif
+%assign %$localsize 0
+%endmacro
+
+; Macro to end a C function
+
+%imacro cprocend 0
+%pop
+%endmacro
+
+; Macros for entering and exiting C callable functions. Note that we must
+; always save and restore the SI and DI registers for C functions, and for
+; 32 bit C functions we also need to save and restore EBX and clear the
+; direction flag.
+
+%imacro enter_c 0
+		push    _bp
+		mov     _bp,_sp
+%ifnidn	%$localsize,0
+		sub		_sp,%$localsize
+%endif
+%ifdef	flatmodel
+		push	ebx
+%endif
+		push	_si
+		push	_di
+%endmacro
+
+%imacro leave_c 0
+		pop		_di
+		pop		_si
+%ifdef	flatmodel
+		pop		ebx
+		cld
+%endif
+%ifnidn %$localsize,0
+		mov     _sp,_bp
+%endif
+		pop     _bp
+%endmacro
+
+%imacro   use_ebx 0
+%ifdef flatmodel
+		push    ebx
+%endif
+%endmacro
+
+%imacro   unuse_ebx 0
+%ifdef flatmodel
+		pop     ebx
+%endif
+%endmacro
+
+; Macros for saving and restoring the value of DS,ES,FS,GS when it is to
+; be used in assembly routines. This evaluates to nothing in the flat memory
+; model, but is saves and restores DS in the large memory model.
+
+%imacro	use_ds 0
+%ifndef flatmodel
+		push	ds
+%endif
+%endmacro
+
+%imacro	unuse_ds 0
+%ifndef flatmodel
+		pop		ds
+%endif
+%endmacro
+
+%imacro	use_es 0
+%ifndef flatmodel
+		push	es
+%endif
+%endmacro
+
+%imacro	unuse_es 0
+%ifndef flatmodel
+		pop		es
+%endif
+%endmacro
+
+; Macros for loading the address of a data pointer into a segment and
+; index register pair. The %imacro explicitly loads DS or ES in the 16 bit
+; memory model, or it simply loads the offset into the register in the flat
+; memory model since DS and ES always point to all addressable memory. You
+; must use the correct _REG (ie: _BX) %imacros for documentation purposes.
+
+%imacro	_lds	2
+%ifdef flatmodel
+		mov     %1,%2
+%else
+		lds		%1,%2
+%endif
+%endmacro
+
+%imacro   _les	2
+%ifdef flatmodel
+		mov     %1,%2
+%else
+		les		%1,%2
+%endif
+%endmacro
+
+; Macros for adding and subtracting a value from registers. Two value are
+; provided, one for 16 bit modes and another for 32 bit modes (the extended
+; register is used in 32 bit modes).
+
+%imacro   _add	3
+%ifdef flatmodel
+		add		e%1, %3
+%else
+		add		%1, %2
+%endif
+%endmacro
+
+%imacro	_sub	3
+%ifdef flatmodel
+		sub		e%1, %3
+%else
+		sub		%1, %2
+%endif
+%endmacro
+
+; Macro to clear the high order word for the 32 bit extended registers.
+; This is used to convert an unsigned 16 bit value to an unsigned 32 bit
+; value, and will evaluate to nothing in 16 bit modes.
+
+%imacro	clrhi	1
+%ifdef	flatmodel
+		movzx	e%1,%1
+%endif
+%endmacro
+
+%imacro	sgnhi	1
+%ifdef	flatmodel
+		movsx	e%1,%1
+%endif
+%endmacro
+
+; Macro to load an extended register with an integer value in either mode
+
+%imacro	loadint	2
+%ifdef flatmodel
+		mov		e%1,%2
+%else
+		xor		e%1,e%1
+		mov     %1,%2
+%endif
+%endmacro
+
+; Macros to load and store integer values with string instructions
+
+%imacro	LODSINT 0
+%ifdef flatmodel
+		lodsd
+%else
+		lodsw
+%endif
+%endmacro
+
+%imacro	STOSINT	0
+%ifdef flatmodel
+		stosd
+%else
+		stosw
+%endif
+%endmacro
+
+; Macros to provide resb, resw, resd compatibility with NASM
+
+%imacro	dclb 1
+times %1 db 0
+%endmacro
+
+%imacro	dclw 1
+times %1 dw 0
+%endmacro
+
+%imacro	dcld 1
+times %1 dd 0
+%endmacro
+
+; macros to declare assembler function stubs for function structures
+
+%imacro	BEGIN_STUBS_DEF	2
+begdataseg  _STUBS
+%ifdef	__NOU_VAR__
+extern %1
+%define	STUBS_START	%1
+%else
+extern _%1
+%define	STUBS_START	_%1
+%endif
+enddataseg  _STUBS
+begcodeseg  _STUBS
+%assign off %2
+%endmacro
+
+%imacro   DECLARE_STUB	1
+%ifdef	__NOU__
+		global %1
+%1:
+%else
+		global _%1
+_%1:
+%endif
+		jmp     DWORD STUBS_START+off
+%assign off off+4
+%endmacro
+
+%imacro DECLARE_STDCALL 2
+%ifdef	STDCALL_MANGLE
+		global _%1@%2
+_%1@%2:
+%else
+%ifdef __GNUC__
+		global _%1
+_%1:
+%else
+		global %1
+%1:
+%endif
+%endif
+		jmp     DWORD STUBS_START+off
+%assign off off+4
+%endmacro
+
+%imacro   END_STUBS_DEF 0
+endcodeseg  _STUBS
+%endmacro
+
+; macros to declare assembler import stubs for binary loadable drivers
+
+%imacro	BEGIN_IMPORTS_DEF	1
+BEGIN_STUBS_DEF	%1,4
+%endmacro
+
+%imacro   DECLARE_IMP	1
+DECLARE_STUB	%1
+%endmacro
+
+%imacro   END_IMPORTS_DEF 0
+END_STUBS_DEF
+%endmacro
+
+else	; __NASM_MAJOR__
+
+;============================================================================
+; Macro package when compiling with TASM.
+;============================================================================
+
+; Turn off underscores for globals if disabled for all externals
+
+ifdef	__NOU__
+__NOU_VAR__			= 1
+endif
+
+; Define the __WINDOWS__ symbol if we are compiling for any Windows
+; environment
+
+ifdef	__WINDOWS16__
+__WINDOWS__		= 1
+endif
+ifdef	__WINDOWS32__
+__WINDOWS__		= 1
+__WINDOWS32_386__	= 1
+endif
+ifdef	__WIN386__
+__WINDOWS__		= 1
+__WINDOWS32_386__	= 1
+endif
+ifdef	__VXD__
+__WINDOWS__		= 1
+__WINDOWS32_386__	= 1
+		MASM
+		.386
+		NO_SEGMENTS	= 1
+		include	vmm.inc			; IGNORE DEPEND
+		include vsegment.inc    ; IGNORE DEPEND
+		IDEAL
+endif
+
+; Macros for accessing 'generic' registers
+
+ifdef   __FLAT__
+		_ax			EQU	eax		; EAX is used for accumulator
+		_bx			EQU	ebx		; EBX is used for accumulator
+		_cx			EQU	ecx		; ECX is used for looping
+		_dx			EQU	edx		; EDX is used for data register
+		_si			EQU	esi		; ESI is the source index register
+		_di			EQU	edi		; EDI is the destination index register
+		_bp			EQU	ebp		; EBP is used for base pointer register
+		_sp			EQU	esp		; ESP is used for stack pointer register
+		_es			EQU			; ES and DS are the same in 32 bit PM
+		typedef UCHAR BYTE		; Size of a character
+		typedef USHORT WORD		; Size of a short
+		typedef UINT DWORD		; Size of an integer
+		typedef ULONG DWORD		; Size of a long
+		typedef BOOL DWORD      ; Size of a boolean
+		typedef DPTR DWORD		; Size of a data pointer
+		typedef FDPTR FWORD		; Size of a far data pointer
+		typedef	NDPTR DWORD		; Size of a near data pointer
+		typedef CPTR DWORD		; Size of a code pointer
+		typedef FCPTR FWORD		; Size of a far code pointer
+		typedef NCPTR DWORD		; Size of a near code pointer
+		typedef	DUINT DWORD		; Declare a integer variable
+		FPTR        EQU NEAR	; Distance for function pointers
+		intsize		=	4		; Size of an integer
+		flatmodel	=	1		; This is a flat memory model
+		P386                    ; Turn on 386 code generation
+		MODEL       FLAT        ; Set up for 32 bit simplified FLAT model
+else
+		_ax			EQU	ax		; AX is used for accumulator
+		_bx			EQU	bx		; BX is used for accumulator
+		_cx			EQU	cx		; CX is used for looping
+		_dx			EQU	dx		; DX is used for data register
+		_si			EQU	si		; SI is the source index register
+		_di			EQU	di		; DI is the destination index register
+		_bp			EQU	bp		; BP is used for base pointer register
+		_sp			EQU	sp		; SP is used for stack pointer register
+		_es			EQU es:		; ES is used for segment override
+		typedef UCHAR BYTE      ; Size of a character
+		typedef USHORT WORD		; Size of a short
+		typedef UINT WORD		; Size of an integer
+		typedef ULONG DWORD		; Size of a long
+		typedef BOOL WORD		; Size of a boolean
+		typedef DPTR DWORD		; Size of a data pointer
+		typedef FDPTR DWORD		; Size of a far data pointer
+		typedef	NDPTR WORD		; Size of a near data pointer
+		typedef CPTR DWORD		; Size of a code pointer
+		typedef FCPTR DWORD		; Size of a far code pointer
+		typedef NCPTR WORD		; Size of a near code pointer
+		typedef	DUINT WORD		; Declare a integer variable
+		FPTR        EQU FAR		; Distance for function pointers
+		intsize		=	2		; Size of an integer
+		P386					; Turn on 386 code generation
+endif
+        invert      EQU not
+
+; Provide a typedef for real floating point numbers
+
+ifdef	DOUBLE
+typedef	REAL	QWORD
+typedef	DREAL	QWORD
+else
+typedef	REAL	DWORD
+typedef	DREAL	DWORD
+endif
+
+; Macros to access the floating point stack registers to convert them
+; from NASM style to TASM style
+
+st0			EQU		st(0)
+st1			EQU		st(1)
+st2			EQU		st(2)
+st3			EQU		st(3)
+st4			EQU		st(4)
+st5			EQU		st(5)
+st6			EQU		st(6)
+st7			EQU		st(7)
+st8			EQU		st(8)
+
+; Boolean truth values (same as those in debug.h)
+
+ifndef	__VXD__
+False		=		0
+True		=		1
+No			=		0
+Yes			=		1
+Yes			=		1
+endif
+
+; Macros for the _DATA data segment. This segment contains initialised data.
+
+MACRO   begdataseg name
+ifdef	__VXD__
+		MASM
+VXD_LOCKED_DATA_SEG
+		IDEAL
+else
+ifdef   flatmodel
+		DATASEG
+else
+SEGMENT _DATA DWORD PUBLIC USE16 'DATA'
+endif
+endif
+ENDM
+
+MACRO   enddataseg name
+ifdef	__VXD__
+		MASM
+VXD_LOCKED_DATA_ENDS
+		IDEAL
+else
+ifndef  flatmodel
+ENDS    _DATA
+endif
+endif
+ENDM
+
+; Macro for the main code segment.
+
+MACRO   begcodeseg name
+ifdef	__VXD__
+		MASM
+VXD_LOCKED_CODE_SEG
+		IDEAL
+else
+ifdef   flatmodel
+		CODESEG
+		ASSUME  CS:FLAT,DS:FLAT,SS:FLAT
+else
+SEGMENT &name&_TEXT PARA PUBLIC USE16 'CODE'
+		ASSUME CS:&name&_TEXT,DS:_DATA
+endif
+endif
+ENDM
+
+; Macro for a near code segment
+
+MACRO   begcodeseg_near
+ifdef   flatmodel
+		CODESEG
+		ASSUME  CS:FLAT,DS:FLAT,SS:FLAT
+else
+SEGMENT _TEXT PARA PUBLIC USE16 'CODE'
+		ASSUME CS:_TEXT,DS:_DATA
+endif
+ENDM
+
+MACRO   endcodeseg name
+ifdef	__VXD__
+		MASM
+VXD_LOCKED_CODE_ENDS
+		IDEAL
+else
+ifndef  flatmodel
+ENDS    &name&_TEXT
+endif
+endif
+ENDM
+
+MACRO   endcodeseg_near
+ifndef  flatmodel
+ENDS    _TEXT
+endif
+ENDM
+
+; Macro to be invoked at the start of all modules to set up segments for
+; later use.
+
+MACRO   header name
+begdataseg name
+enddataseg name
+ENDM
+
+; Macro for an extern C symbol. If the C compiler requires leading
+; underscores, then the underscores are added to the symbol names, otherwise
+; they are left off. The symbol name is referenced in the assembler code
+; using the non-underscored symbol name.
+
+MACRO   cextern	name,size
+ifdef	__NOU_VAR__
+		EXTRN	name:size
+else
+		EXTRN	_&name&:size
+name	EQU		_&name&
+endif
+ENDM
+
+MACRO   cexternfunc	name,size
+ifdef	__NOU__
+		EXTRN	name:size
+else
+		EXTRN	_&name&:size
+name	EQU		_&name&
+endif
+ENDM
+
+MACRO   stdexternfunc	name,args,size
+ifdef	STDCALL_MANGLE
+		EXTRN	_&name&@&num_args&:size
+name	EQU		_&name&@&num_args
+else
+		EXTRN	name:size
+endif
+ENDM
+
+; Macro for a public C symbol. If the C compiler requires leading
+; underscores, then the underscores are added to the symbol names, otherwise
+; they are left off. The symbol name is referenced in the assembler code
+; using the non-underscored symbol name.
+
+MACRO	cpublic name
+ifdef	__NOU_VAR__
+name:
+		PUBLIC	name
+else
+_&name&:
+		PUBLIC	_&name&
+name	EQU		_&name&
+endif
+ENDM
+
+; Macro for an global C symbol. If the C compiler requires leading
+; underscores, then the underscores are added to the symbol names, otherwise
+; they are left off. The symbol name is referenced in the assembler code
+; using the non-underscored symbol name.
+
+MACRO	cglobal name
+ifdef	__NOU_VAR__
+		PUBLIC	name
+else
+		PUBLIC	_&name&
+name	EQU		_&name&
+endif
+ENDM
+
+; Macro for an global C function symbol. If the C compiler requires leading
+; underscores, then the underscores are added to the symbol names, otherwise
+; they are left off. The symbol name is referenced in the assembler code
+; using the non-underscored symbol name.
+
+MACRO	cglobalfunc name
+ifdef	__NOU__
+		PUBLIC	name
+else
+		PUBLIC	_&name&
+name	EQU		_&name&
+endif
+ENDM
+
+; Macro to start a C callable function. This will be a far function for
+; 16-bit code, and a near function for 32-bit code.
+
+MACRO   cprocstatic name	; Set up model independent private proc
+ifdef flatmodel
+PROC	name NEAR
+else
+PROC    name FAR
+endif
+LocalSize	= 0
+ENDM
+
+MACRO   cprocstart name		; Set up model independent proc
+ifdef flatmodel
+ifdef	__NOU__
+PROC	name NEAR
+else
+PROC	_&name& NEAR
+endif
+else
+ifdef	__NOU__
+PROC    name FAR
+else
+PROC    _&name& FAR
+endif
+endif
+LocalSize	= 0
+		cglobalfunc	name
+ENDM
+
+MACRO   cprocnear name		; Set up near proc
+ifdef	__NOU__
+PROC    name NEAR
+else
+PROC    _&name& NEAR
+endif
+LocalSize	= 0
+		cglobalfunc	name
+ENDM
+
+MACRO   cprocfar name           ; Set up far proc
+ifdef	__NOU__
+PROC    name FAR
+else
+PROC    _&name& FAR
+endif
+LocalSize	= 0
+		cglobalfunc	name
+ENDM
+
+MACRO   cprocend	           ; End procedure macro
+ENDP
+ENDM
+
+; This macro sets up a procedure to be exported from a 16 bit DLL. Since the
+; calling conventions are always _far _pascal for 16 bit DLL's, we actually
+; rename this routine with an extra underscore with 'C' calling conventions
+; and a small DLL stub will be provided by the high level code to call the
+; assembler routine.
+
+MACRO   cprocstartdll16 name
+ifdef	__WINDOWS16__
+cprocstart	_&name&
+else
+cprocstart	name
+endif
+ENDM
+
+; Macros for entering and exiting C callable functions. Note that we must
+; always save and restore the SI and DI registers for C functions, and for
+; 32 bit C functions we also need to save and restore EBX and clear the
+; direction flag.
+
+MACRO	save_c_regs
+ifdef	flatmodel
+		push	ebx
+endif
+		push	_si
+		push	_di
+ENDM
+
+MACRO	enter_c
+		push    _bp
+		mov     _bp,_sp
+	IFDIFI	<LocalSize>,<0>
+		sub		_sp,LocalSize
+	ENDIF
+		save_c_regs
+ENDM
+
+MACRO	restore_c_regs
+		pop		_di
+		pop		_si
+ifdef	flatmodel
+		pop		ebx
+endif
+ENDM
+
+MACRO	leave_c
+		restore_c_regs
+		cld
+	IFDIFI	<LocalSize>,<0>
+		mov     _sp,_bp
+	ENDIF
+		pop     _bp
+ENDM
+
+MACRO   use_ebx
+ifdef flatmodel
+		push    ebx
+endif
+ENDM
+
+MACRO   unuse_ebx
+ifdef flatmodel
+		pop     ebx
+endif
+ENDM
+
+; Macros for saving and restoring the value of DS,ES,FS,GS when it is to
+; be used in assembly routines. This evaluates to nothing in the flat memory
+; model, but is saves and restores DS in the large memory model.
+
+MACRO	use_ds
+ifndef flatmodel
+		push	ds
+endif
+ENDM
+
+MACRO	unuse_ds
+ifndef flatmodel
+		pop		ds
+endif
+ENDM
+
+MACRO	use_es
+ifndef flatmodel
+		push	es
+endif
+ENDM
+
+MACRO	unuse_es
+ifndef flatmodel
+		pop		es
+endif
+ENDM
+
+; Macros for loading the address of a data pointer into a segment and
+; index register pair. The macro explicitly loads DS or ES in the 16 bit
+; memory model, or it simply loads the offset into the register in the flat
+; memory model since DS and ES always point to all addressable memory. You
+; must use the correct _REG (ie: _BX) macros for documentation purposes.
+
+MACRO	_lds	reg, addr
+ifdef flatmodel
+		mov     reg,addr
+else
+		lds		reg,addr
+endif
+ENDM
+
+MACRO   _les	reg, addr
+ifdef flatmodel
+		mov     reg,addr
+else
+		les		reg,addr
+endif
+ENDM
+
+; Macros for adding and subtracting a value from registers. Two value are
+; provided, one for 16 bit modes and another for 32 bit modes (the extended
+; register is used in 32 bit modes).
+
+MACRO   _add	reg, val16, val32
+ifdef flatmodel
+		add		e&reg&, val32
+else
+		add		reg, val16
+endif
+ENDM
+
+MACRO	_sub	reg, val16, val32
+ifdef flatmodel
+		sub		e&reg&, val32
+else
+		sub		reg, val16
+endif
+ENDM
+
+; Macro to clear the high order word for the 32 bit extended registers.
+; This is used to convert an unsigned 16 bit value to an unsigned 32 bit
+; value, and will evaluate to nothing in 16 bit modes.
+
+MACRO	clrhi	reg
+ifdef	flatmodel
+		movzx	e&reg&,reg
+endif
+ENDM
+
+MACRO	sgnhi	reg
+ifdef	flatmodel
+		movsx	e&reg&,reg
+endif
+ENDM
+
+; Macro to load an extended register with an integer value in either mode
+
+MACRO	loadint	reg,val
+ifdef flatmodel
+		mov		e&reg&,val
+else
+		xor		e&reg&,e&reg&
+		mov     reg,val
+endif
+ENDM
+
+; Macros to load and store integer values with string instructions
+
+MACRO	LODSINT
+ifdef flatmodel
+		lodsd
+else
+		lodsw
+endif
+ENDM
+
+MACRO	STOSINT
+ifdef flatmodel
+		stosd
+else
+		stosw
+endif
+ENDM
+
+; Macros to provide resb, resw, resd compatibility with NASM
+
+MACRO	dclb	count
+db	count dup (0)
+ENDM
+
+MACRO	dclw	count
+dw	count dup (0)
+ENDM
+
+MACRO	dcld	count
+dd	count dup (0)
+ENDM
+
+; Macros to provide resb, resw, resd compatibility with NASM
+
+MACRO	resb	count
+db	count dup (?)
+ENDM
+
+MACRO	resw	count
+dw	count dup (?)
+ENDM
+
+MACRO	resd	count
+dd	count dup (?)
+ENDM
+
+; Macros to declare assembler stubs for function structures
+
+MACRO	BEGIN_STUBS_DEF	name, firstOffset
+begdataseg  _STUBS
+ifdef	__NOU_VAR__
+		EXTRN	name:DWORD
+STUBS_START	=   name
+else
+		EXTRN	_&name&:DWORD
+name	EQU		_&name&
+STUBS_START	=   _&name
+endif
+enddataseg  _STUBS
+begcodeseg  _STUBS
+off = firstOffset
+ENDM
+
+MACRO   DECLARE_STUB	name
+ifdef	__NOU__
+name:
+		PUBLIC  name
+else
+_&name:
+		PUBLIC  _&name
+endif
+		jmp     DWORD STUBS_START+off
+off = off + 4
+ENDM
+
+MACRO   DECLARE_STDCALL	name,num_args
+ifdef	STDCALL_MANGLE
+_&name&@&num_args&:
+		PUBLIC  _&name&@&num_args&
+else
+name:
+		PUBLIC  name
+endif
+		jmp     DWORD STUBS_START+off
+off = off + 4
+ENDM
+
+MACRO   END_STUBS_DEF
+endcodeseg  _STUBS
+ENDM
+
+MACRO	BEGIN_IMPORTS_DEF	name
+BEGIN_STUBS_DEF	name,4
+ENDM
+
+MACRO   DECLARE_IMP	name
+DECLARE_STUB	name
+ENDM
+
+MACRO   END_IMPORTS_DEF
+END_STUBS_DEF
+ENDM
+
+endif

_service:tar_scm:nasm-2.16.03.tar.xz/misc/xcrcgen.c Added

@@ -0,0 +1,79 @@
+/*
+ * Produce a "generalized CRC" table.  Assumes a platform with
+ * /dev/urandom -- otherwise reimplement get_random_byte().
+ */
+
+#include <errno.h>
+#include <fcntl.h>
+#include <inttypes.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+
+static uint8_t get_random_byte(void)
+{
+    static int fd = -1;
+    uint8_t buf;
+    int rv;
+
+    if (fd < 0)
+	fd = open("/dev/urandom", O_RDONLY);
+
+    do {
+	errno = 0;
+	rv = read(fd, &buf, 1);
+	if (rv < 1 && errno != EAGAIN)
+	    abort();
+    } while (rv < 1);
+
+    return buf;
+}
+
+static void random_permute(uint8_t *buf)
+{
+    int i, j, k;
+    int m;
+
+    for (i = 0; i < 256; i++)
+	bufi = i;
+
+    m = 255;
+    for (i = 255; i > 0; i--) {
+	if (i <= (m >> 1))
+	    m >>= 1;
+	do {
+	    j = get_random_byte() & m;
+	} while (j > i);
+	k = bufi;
+	bufi = bufj;
+	bufj = k;
+    }
+}
+
+static void xcrc_table(uint64_t *buf)
+{
+    uint8_t perm256;
+    int i, j;
+
+    memset(buf, 0, 8*256);	/* Make static checkers happy */
+
+    for (i = 0; i < 8; i++) {
+	random_permute(perm);
+	for (j = 0; j < 256; j++)
+	    bufj = (bufj << 8) | permj;
+    }
+}
+
+int main(void)
+{
+    int i;
+    uint64_t buf256;
+
+    xcrc_table(buf);
+
+    for (i = 0; i < 256; i++) {
+	printf("%016"PRIx64"\n", bufi);
+    }
+
+    return 0;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/nasm.1 Added

@@ -0,0 +1,429 @@
+'\" t
+.\"     Title: nasm
+.\"    Author: FIXME: author see http://www.docbook.org/tdg5/en/html/author
+.\" Generator: DocBook XSL Stylesheets vsnapshot <http://docbook.sf.net/>
+.\"      Date: 04/17/2024
+.\"    Manual: The Netwide Assembler Project
+.\"    Source: NASM
+.\"  Language: English
+.\"
+.TH "NASM" "1" "04/17/2024" "NASM" "The Netwide Assembler Project"
+.\" -----------------------------------------------------------------
+.\" * Define some portability stuff
+.\" -----------------------------------------------------------------
+.\" ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+.\" http://bugs.debian.org/507673
+.\" http://lists.gnu.org/archive/html/groff/2009-02/msg00013.html
+.\" ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\" -----------------------------------------------------------------
+.\" * set default formatting
+.\" -----------------------------------------------------------------
+.\" disable hyphenation
+.nh
+.\" disable justification (adjust text to left margin only)
+.ad l
+.\" -----------------------------------------------------------------
+.\" * MAIN CONTENT STARTS HERE *
+.\" -----------------------------------------------------------------
+.SH "NAME"
+nasm \- the Netwide Assembler, a portable 80x86 assembler
+.SH "SYNOPSIS"
+.sp
+\fBnasm\fR \fB\-@\fR response file \fB\-f\fR format \fB\-o\fR outfile \fB\-l\fR listfile \fIoptions\fR\&... filename
+.SH "DESCRIPTION"
+.sp
+The \fBnasm\fR command assembles the file \fIfilename\fR and directs output to the file \fIoutfile\fR if specified\&. If \fIoutfile\fR is not specified, \fBnasm\fR will derive a default output file name from the name of its input file, usually by appending \(oq\&.o\(cq or \(oq\&.obj\(cq, or by removing all extensions for a raw binary file\&. Failing that, the output file name will be \(oqnasm\&.out\(cq\&.
+.SH "OPTIONS"
+.PP
+\fB\-@\fR \fIfilename\fR
+.RS 4
+Causes
+\fBnasm\fR
+to process options from filename as if they were included on the command line\&.
+.RE
+.PP
+\fB\-a\fR
+.RS 4
+Causes
+\fBnasm\fR
+to assemble the given input file without first applying the macro preprocessor\&.
+.RE
+.PP
+\fB\-D\fR|\fB\-d\fR \fImacro=value\fR
+.RS 4
+Pre\-defines a single\-line macro\&.
+.RE
+.PP
+\fB\-E\fR|\fB\-e\fR
+.RS 4
+Causes
+\fBnasm\fR
+to preprocess the given input file, and write the output to
+\fIstdout\fR
+(or the specified output file name), and not actually assemble anything\&.
+.RE
+.PP
+\fB\-f\fR \fIformat\fR
+.RS 4
+Specifies the output file format\&. To see a list of valid output formats, use the
+\fB\-hf\fR
+option\&.
+.RE
+.PP
+\fB\-F\fR \fIformat\fR
+.RS 4
+Specifies the debug information format\&. To see a list of valid output formats, use the
+\fB\-y\fR
+option (for example
+\fB\-felf \-y\fR)\&.
+.RE
+.PP
+\fB\-g\fR
+.RS 4
+Causes
+\fBnasm\fR
+to generate debug information\&.
+.RE
+.PP
+\fB\-g\fR\fIformat\fR
+.RS 4
+Equivalent to
+\fB\-g \-F\fR\fI format\fR\&.
+.RE
+.PP
+\fB\-h\fR
+.RS 4
+Causes
+\fBnasm\fR
+to exit immediately, after giving a summary of its invocation options\&.
+.RE
+.PP
+\fB\-hf\fR
+.RS 4
+Same as
+\fB\-h\fR
+, but also lists all valid output formats\&.
+.RE
+.PP
+\fB\-I\fR|\fB\-i\fR \fIdirectory\fR
+.RS 4
+Adds a directory to the search path for include files\&. The directory specification must include the trailing slash, as it will be directly prepended to the name of the include file\&.
+.RE
+.PP
+\fB\-l\fR \fIlistfile\fR
+.RS 4
+Causes an assembly listing to be directed to the given file, in which the original source is displayed on the right hand side (plus the source for included files and the expansions of multi\-line macros) and the generated code is shown in hex on the left\&.
+.RE
+.PP
+\fB\-M\fR
+.RS 4
+Causes
+\fBnasm\fR
+to output Makefile\-style dependencies to stdout; normal output is suppressed\&.
+.RE
+.PP
+\fB\-MG\fR \fIfile\fR
+.RS 4
+Same as
+\fB\-M\fR
+but assumes that missing Makefile dependencies are generated and added to dependency list without a prefix\&.
+.RE
+.PP
+\fB\-MF\fR \fIfile\fR
+.RS 4
+Output Makefile\-style dependencies to the specified file\&.
+.RE
+.PP
+\fB\-MD\fR \fIfile\fR
+.RS 4
+Same as a combination of
+\fB\-M\fR
+and
+\fB\-MF\fR
+options\&.
+.RE
+.PP
+\fB\-MT\fR \fIfile\fR
+.RS 4
+Override the default name of the dependency target dependency target name\&. This is normally the same as the output filename, specified by the
+\fB\-o\fR
+option\&.
+.RE
+.PP
+\fB\-MQ\fR \fIfile\fR
+.RS 4
+The same as
+\fB\-MT\fR
+except it tries to quote characters that have special meaning in Makefile syntax\&. This is not foolproof, as not all characters with special meaning are quotable in Make\&.
+.RE
+.PP
+\fB\-MP\fR
+.RS 4
+Emit phony target\&.
+.RE
+.PP
+\fB\-O\fR \fInumber\fR
+.RS 4
+Optimize branch offsets\&.
+.sp
+.RS 4
+.ie n \{\
+\h'-04'\(bu\h'+03'\c
+.\}
+.el \{\
+.sp -1
+.IP \(bu 2.3
+.\}
+\fB\-O0\fR: No optimization
+.RE
+.sp
+.RS 4
+.ie n \{\
+\h'-04'\(bu\h'+03'\c
+.\}
+.el \{\
+.sp -1
+.IP \(bu 2.3
+.\}
+\fB\-O1\fR: Minimal optimization
+.RE
+.sp
+.RS 4
+.ie n \{\
+\h'-04'\(bu\h'+03'\c
+.\}
+.el \{\
+.sp -1
+.IP \(bu 2.3
+.\}
+\fB\-Ox\fR: Multipass optimization (default)
+.RE
+.RE
+.PP
+\fB\-o\fR \fIoutfile\fR
+.RS 4
+Specifies a precise name for the output file, overriding
+\fBnasm\fR\*(Aqs default means of determining it\&.
+.RE
+.PP
+\fB\-P\fR|\fB\-p\fR \fIfile\fR
+.RS 4
+Specifies a file to be pre\-included, before the main source file starts to be processed\&.
+.RE
+.PP
+\fB\-s\fR
+.RS 4
+Causes
+\fBnasm\fR
+to send its error messages and/or help text to stdout instead of stderr\&.
+.RE
+.PP
+\fB\-t\fR
+.RS 4
+Causes
+\fBnasm\fR
+to assemble in SciTech TASM compatible mode\&.
+.RE
+.PP
+\fB\-U\fR|\fB\-u\fR \fImacro\fR
+.RS 4
+Undefines a single\-line macro\&.
+.RE
+.PP
+\fB\-v\fR
+.RS 4
+Causes
+\fBnasm\fR
+to exit immediately, after displaying its version number\&.
+.RE
+.PP
+*\-Wno\-foo\*(Aq
+.RS 4
+Causes
+\fBnasm\fR
+to enable or disable certain classes of warning messages, in gcc\-like style, for example
+\fB\-Wlabel\-orphan\fR
+or
+\fB\-Wno\-orphan\-labels\fR\&.
+.RE
+.PP
+\fB\-w\fR\fI+\-foo\fR
+.RS 4
+Causes
+\fBnasm\fR
+to enable or disable certain classes of warning messages, for example
+\fB\-w+label\-orphan\fR
+or
+\fB\-w\-macro\-params\fR\&.
+.RE
+.PP
+\fB\-X\fR \fIformat\fR
+.RS 4
+Specifies error reporting format (gnu or vc)\&.
+.RE
+.PP
+\fB\-y\fR
+.RS 4
+Causes
+\fBnasm\fR
+to list supported debug formats\&.
+.RE
+.PP
+\fB\-Z\fR \fIfilename\fR
+.RS 4
+Causes
+\fBnasm\fR
+to redirect error messages to
+\fIfilename\fR\&. This option exists to support operating systems on which stderr is not easily redirected\&.
+.RE
+.PP
+\-\-prefix, \-\-postfix
+.RS 4
+Prepend or append (respectively) the given argument to all global or extern variables\&.
+.RE
+.SH "SYNTAX"
+.sp
+This man page does not fully describe the syntax of \fBnasm\fR\*(Aqs assembly language, but does give a summary of the differences from other assemblers\&.
+.sp
+\fIRegisters\fR have no leading \(oq%\(cq sign, unlike \fBgas\fR, and floating\-point stack registers are referred to as \fIst0\fR, \fIst1\fR, and so on\&.
+.sp
+\fIFloating\-point instructions\fR may use either the single\-operand form or the double\&. A \fITO\fR keyword is provided; thus, one could either write
+.sp
+.if n \{\
+.RS 4
+.\}
+.nf
+fadd st0,st1
+fadd st1,st0
+.fi
+.if n \{\
+.RE
+.\}
+.sp
+or one could use the alternative single\-operand forms
+.sp
+.if n \{\
+.RS 4
+.\}
+.nf
+fadd st1
+fadd to st1
+.fi
+.if n \{\
+.RE
+.\}
+.sp
+\fIUninitialised storage\fR is reserved using the \fIRESB\fR, \fIRESW\fR, \fIRESD\fR, \fIRESQ\fR, \fIREST\fR and \fIRESO\fR pseudo\-opcodes, each taking one parameter which gives the number of bytes, words, doublewords, quadwords or ten\-byte words to reserve\&.
+.sp
+\fIRepetition\fR of data items is not done by the \fIDUP\fR keyword as seen in DOS assemblers, but by the use of the \fITIMES\fR prefix, like this:
+.sp
+.if n \{\
+.RS 4
+.\}
+.nf
+message: times 3 db \*(Aqabc\*(Aq
+         times 64\-$+message db 0
+.fi
+.if n \{\
+.RE
+.\}
+.sp
+which defines the string abcabcabc, followed by the right number of zero bytes to make the total length up to 64 bytes\&.
+.sp
+\fISymbol references\fR are always understood to be immediate (i\&.e\&. the address of the symbol), unless square brackets are used, in which case the contents of the memory location are used\&. Thus:
+.sp
+.if n \{\
+.RS 4
+.\}
+.nf
+mov ax,wordvar
+.fi
+.if n \{\
+.RE
+.\}
+.sp
+loads AX with the address of the variable wordvar, whereas
+.sp
+.if n \{\
+.RS 4
+.\}
+.nf
+mov ax,wordvar
+mov ax,wordvar+1
+mov ax,es:wordvar+bx
+.fi
+.if n \{\
+.RE
+.\}
+.sp
+all refer to the \fIcontents\fR of memory locations\&. The syntaxes
+.sp
+.if n \{\
+.RS 4
+.\}
+.nf
+mov ax,es:wordvarbx
+es mov ax,wordvar1
+.fi
+.if n \{\
+.RE
+.\}
+.sp
+are not legal at all, although the use of a segment register name as an instruction prefix is valid, and can be used with instructions such as \fILODSB\fR which can\(cqt be overridden any other way\&.
+.sp
+\fIConstants\fR may be expressed numerically in most formats: a trailing H, Q or B denotes hex, octal or binary respectively, and a leading \(oq0x\(cq or \(oq$\(cq denotes hex as well\&. Leading zeros are not treated specially at all\&. Character constants may be enclosed in single or double quotes; there is no escape character\&. The ordering is little\-endian (reversed), so that the character constant \fI\*(Aqabcd\fR\*(Aq denotes 0x64636261 and not 0x61626364\&.
+.sp
+Local labels begin with a period, and their \(oqlocality\(cq is granted by the assembler prepending the name of the previous non\-local symbol\&. Thus declaring a label \(oq\&.loop\(cq after a label \(oqlabel\(cq has actually defined a symbol called \(oqlabel\&.loop\(cq\&.
+.SH "DIRECTIVES"
+.sp
+\fISECTION\fR \fIname\fR or \fISEGMENT\fR \fIname\fR causes \fBnasm\fR to direct all following code to the named section\&. Section names vary with output file format, although most formats support the names \fI\&.text\fR, \fI\&.data\fR and \fI\&.bss\fR\&. (The exception is the \fIobj\fR format, in which all segments are user\-definable\&.)
+.sp
+\fIABSOLUTE\fR \fIaddress\fR causes \fBnasm\fR to position its notional assembly point at an absolute address: so no code or data may be generated, but you can use \fIRESB\fR, \fIRESW\fR and \fIRESD\fR to move the assembly point further on, and you can define labels\&. So this directive may be used to define data structures\&. When you have finished doing absolute assembly, you must issue another \fISECTION\fR directive to return to normal assembly\&.
+.sp
+\fIBITS\fR \fI16\fR, \fIBITS\fR \fI32\fR or \fIBITS\fR \fI64\fR switches the default processor mode for which \fBnasm\fR is generating code: it is equivalent to \fIUSE16\fR or \fIUSE32\fR in DOS assemblers\&.
+.sp
+\fIEXTERN\fR \fIsymbol\fR and \fIGLOBAL\fR \fIsymbol\fR import and export symbol definitions, respectively, from and to other modules\&. Note that the \fIGLOBAL\fR directive must appear before the definition of the symbol it refers to\&.
+.sp
+\fISTRUC\fR \fIstrucname\fR and \fIENDSTRUC\fR, when used to bracket a number of \fIRESB\fR, \fIRESW\fR or similar instructions, define a data structure\&. In addition to defining the offsets of the structure members, the construct also defines a symbol for the size of the structure, which is simply the structure name with \fIsize\fR tacked on to the end\&.
+.SH "FORMAT\-SPECIFIC DIRECTIVES"
+.sp
+\fIORG\fR \fIaddress\fR is used by the \fIbin\fR flat\-form binary output format, and specifies the address at which the output code will eventually be loaded\&.
+.sp
+\fIGROUP\fR \fIgrpname\fR \fIseg1\fR \fIseg2\fR\&... is used by the obj (Microsoft 16\-bit) output format, and defines segment groups\&. This format also uses \fIUPPERCASE\fR, which directs that all segment, group and symbol names output to the object file should be in uppercase\&. Note that the actual assembly is still case sensitive\&.
+.sp
+\fILIBRARY\fR \fIlibname\fR is used by the \fIrdf\fR output format, and causes a dependency record to be written to the output file which indicates that the program requires a certain library in order to run\&.
+.SH "MACRO PREPROCESSOR"
+.sp
+Single\-line macros are defined using the \fI%define\fR or \fI%idefine\fR commands, in a similar fashion to the C preprocessor\&. They can be overloaded with respect to number of parameters, although defining a macro with no parameters prevents the definition of any macro with the same name taking parameters, and vice versa\&. \fI%define\fR defines macros whose names match case\-sensitively, whereas \fI%idefine\fR defines case\-insensitive macros\&.
+.sp
+Multi\-line macros are defined using \fI%macro\fR and \fI%imacro\fR (the distinction is the same as that between \fI%define\fR and \fI%idefine\fR), whose syntax is as follows
+.sp
+.if n \{\
+.RS 4
+.\}
+.nf
+%macro name minprm\-maxprm+\&.nolist defaults
+        <some lines of macro expansion text>
+%endmacro
+.fi
+.if n \{\
+.RE
+.\}
+.sp
+Again, these macros may be overloaded\&. The trailing plus sign indicates that any parameters after the last one get subsumed, with their separating commas, into the last parameter\&. The \fIdefaults\fR part can be used to specify defaults for unspecified macro parameters after \fIminparam\fR\&. \fI%endm\fR is a valid synonym for \fI%endmacro\fR\&.
+.sp
+To refer to the macro parameters within a macro expansion, you use \fI%1\fR, \fI%2\fR and so on\&. You can also enforce that a macro parameter should contain a condition code by using \fI%+1\fR, and you can invert the condition code by using \fI%\-1\fR\&. You can also define a label specific to a macro invocation by prefixing it with a double \(oq%\(cq sign\&.
+.sp
+Files can be included using the \fI%include\fR directive, which works like C\&.
+.sp
+The preprocessor has a \(oqcontext stack\(cq, which may be used by one macro to store information that a later one will retrieve\&. You can push a context on the stack using \fI%push\fR, remove one using \fI%pop\fR, and change the name of the top context (without disturbing any associated definitions) using \fI%repl\fR\&. Labels and \fI%define\fR macros specific to the top context may be defined by prefixing their names with %$, and things specific to the next context down with %$$, and so on\&.
+.sp
+Conditional assembly is done by means of \fI%ifdef\fR, \fI%ifndef\fR, \fI%else\fR and \fI%endif\fR as in C\&. (Except that \fI%ifdef\fR can accept several putative macro names, and will evaluate TRUE if any of them is defined\&.) In addition, the directives \fI%ifctx\fR and \fI%ifnctx\fR can be used to condition on the name of the top context on the context stack\&. The obvious set of \(oqelse\-if\(cq directives, \fI%elifdef\fR, \fI%elifndef\fR, \fI%elifctx\fR and \fI%elifnctx\fR are also supported\&.
+.SH "BUGS"
+.sp
+Please report bugs through the bug tracker function at \mblue\fBhttp://nasm\&.us\fR\m\&.
+.SH "SEE ALSO"
+.sp
+\fBas\fR(1), \fBld\fR(1)\&.

_service:tar_scm:nasm-2.16.03.tar.xz/nasm.spec Added

@@ -0,0 +1,80 @@
+# -*- coding: utf-8 -*-
+%define nasm_version 2.16.03
+Summary: The Netwide Assembler, a portable x86 assembler with Intel-like syntax
+Name: nasm
+Version: 2.16.03
+Release: 0%{?dist}
+License: BSD
+Source: http://www.nasm.us/pub/nasm/releasebuilds/%{nasm_version}/nasm-%{nasm_version}.tar.xz
+URL: http://www.nasm.us/
+BuildRoot: /tmp/rpm-build-nasm
+Prefix: %{_prefix}
+BuildRequires: perl(Fcntl)
+BuildRequires: perl(File::Basename)
+BuildRequires: perl(File::Compare)
+BuildRequires: perl(File::Copy)
+BuildRequires: perl(File::Find)
+BuildRequires: perl(File::Path)
+BuildRequires: perl(File::Spec)
+BuildRequires: perl(File::Temp)
+BuildRequires: perl(Font::TTF::Cmap)
+BuildRequires: perl(Font::TTF::Font)
+BuildRequires: perl(Font::TTF::Head)
+BuildRequires: perl(Font::TTF::Hmtx)
+BuildRequires: perl(Font::TTF::Maxp)
+BuildRequires: perl(Font::TTF::Post)
+BuildRequires: perl(Font::TTF::PSNames)
+BuildRequires: perl(Getopt::Long)
+BuildRequires: perl(Pod::Usage)
+BuildRequires: perl(Sort::Versions)
+BuildRequires: autoconf
+BuildRequires: automake
+BuildRequires: asciidoc
+BuildRequires: xmlto
+BuildRequires: xz
+BuildRequires: perl
+BuildRoot: %{_tmppath}/%{name}-%{version}-%{release}-root-%(%{__id_u} -n)
+
+%package doc
+Summary: Detailed manual for the Netwide Assembler
+BuildArch: noarch
+BuildRequires: ghostscript
+BuildRequires: fontconfig
+BuildRequires: adobe-source-sans-pro-fonts
+BuildRequires: adobe-source-code-pro-fonts
+
+%description
+NASM is the Netwide Assembler, a free portable assembler for the Intel
+80x86 microprocessor series, using primarily the traditional Intel
+instruction mnemonics and syntax.
+
+%description doc
+Extensive documentation for the Netwide Assembler (NASM) in HTML and
+PDF formats.
+
+%prep
+%setup -q -n nasm-%{nasm_version}
+
+%build
+sh autogen.sh
+%configure --enable-gc $( -z "%{_lto_cflags}"  || echo --enable-lto)
+make %{?_smp_mflags} everything
+
+%install
+rm -rf "%{buildroot}"
+mkdir -p "%{buildroot}"/%{_bindir}
+mkdir -p "%{buildroot}"/%{_mandir}/man1
+make DESTDIR="%{buildroot}" install
+
+%files
+%doc AUTHORS
+%{_bindir}/nasm
+%{_bindir}/ndisasm
+%{_mandir}/man1/nasm.1*
+%{_mandir}/man1/ndisasm.1*
+
+%files doc
+%doc doc/html doc/nasmdoc.pdf.xz
+
+# This is the upstream spec file; the change log is in git
+%changelog

_service:tar_scm:nasm-2.16.03.tar.xz/nasm.spec.in Added

@@ -0,0 +1,63 @@
+# -*- coding: utf-8 -*-
+%define nasm_version @@NASM_VER@@
+Summary: The Netwide Assembler, a portable x86 assembler with Intel-like syntax
+Name: nasm
+Version: @@NASM_MANGLED_VER@@
+Release: 0%{?dist}
+License: BSD
+Source: http://www.nasm.us/pub/nasm/releasebuilds/%{nasm_version}/nasm-%{nasm_version}.tar.xz
+URL: http://www.nasm.us/
+BuildRoot: /tmp/rpm-build-nasm
+Prefix: %{_prefix}
+@@PERLBUILDREQS@@
+BuildRequires: autoconf
+BuildRequires: automake
+BuildRequires: asciidoc
+BuildRequires: xmlto
+BuildRequires: xz
+BuildRequires: perl
+BuildRoot: %{_tmppath}/%{name}-%{version}-%{release}-root-%(%{__id_u} -n)
+
+%package doc
+Summary: Detailed manual for the Netwide Assembler
+BuildArch: noarch
+BuildRequires: ghostscript
+BuildRequires: fontconfig
+BuildRequires: adobe-source-sans-pro-fonts
+BuildRequires: adobe-source-code-pro-fonts
+
+%description
+NASM is the Netwide Assembler, a free portable assembler for the Intel
+80x86 microprocessor series, using primarily the traditional Intel
+instruction mnemonics and syntax.
+
+%description doc
+Extensive documentation for the Netwide Assembler (NASM) in HTML and
+PDF formats.
+
+%prep
+%setup -q -n nasm-%{nasm_version}
+
+%build
+sh autogen.sh
+%configure --enable-gc $( -z "%{_lto_cflags}"  || echo --enable-lto)
+make %{?_smp_mflags} everything
+
+%install
+rm -rf "%{buildroot}"
+mkdir -p "%{buildroot}"/%{_bindir}
+mkdir -p "%{buildroot}"/%{_mandir}/man1
+make DESTDIR="%{buildroot}" install
+
+%files
+%doc AUTHORS
+%{_bindir}/nasm
+%{_bindir}/ndisasm
+%{_mandir}/man1/nasm.1*
+%{_mandir}/man1/ndisasm.1*
+
+%files doc
+%doc doc/html doc/nasmdoc.pdf.xz
+
+# This is the upstream spec file; the change log is in git
+%changelog

_service:tar_scm:nasm-2.16.03.tar.xz/nasm.spec.sed Added

_service:tar_scm:nasm-2.16.03.tar.xz/nasm.txt Added

@@ -0,0 +1,306 @@
+nasm(1)
+=======
+:doctype:	manpage
+:man source:	NASM
+:man manual:	The Netwide Assembler Project
+
+NAME
+----
+nasm - the Netwide Assembler, a portable 80x86 assembler
+
+SYNOPSIS
+--------
+*nasm* *-@* response file *-f* format *-o* outfile *-l* listfile 'options'... filename
+
+DESCRIPTION
+-----------
+The *nasm* command assembles the file 'filename' and directs output to the file
+'outfile' if specified. If 'outfile' is not specified, *nasm* will derive a default
+output file name from the name of its input file, usually by appending `.o' or
+`.obj', or by removing all extensions for a raw binary file. Failing that, the
+output file name will be `nasm.out'.
+
+OPTIONS
+-------
+*-@* 'filename'::
+	Causes *nasm* to process options from filename as if they were included on
+	the command line.
+
+*-a*::
+	Causes *nasm* to assemble the given input file without first applying the
+	macro preprocessor.
+
+*-D*|*-d* 'macro=value'::
+	Pre-defines a single-line macro.
+
+*-E*|*-e*::
+	Causes *nasm* to preprocess the given input file, and write the output to
+	'stdout' (or the specified output file name), and not actually assemble
+	anything.
+
+*-f* 'format'::
+	Specifies the output file format. To see a list of valid output formats,
+	use the *-hf* option.
+
+*-F* 'format'::
+	Specifies the debug information format. To see a list of valid output
+	formats, use the *-y* option (for example *-felf -y*).
+
+*-g*::
+	Causes *nasm* to generate debug information.
+
+*-g*'format'::
+	Equivalent to **-g -F**__ format__.
+
+*-h*::
+	Causes *nasm* to exit immediately, after giving a summary of its
+	invocation options.
+
+*-hf*::
+	Same as *-h* , but also lists all valid output formats.
+
+*-I*|*-i* 'directory'::
+	Adds a directory to the search path for include files. The directory
+	specification must include the trailing slash, as it will be directly
+	prepended to the name of the include file.
+
+*-l* 'listfile'::
+	Causes an assembly listing to be directed to the given file, in which
+	the original source is displayed on the right hand side (plus the source
+	for included files and the expansions of multi-line macros) and the
+	generated code is shown in hex on the left.
+
+*-M*::
+	Causes *nasm* to output Makefile-style dependencies to stdout; normal
+	output is suppressed.
+
+*-MG* 'file'::
+	Same as *-M* but assumes that missing Makefile dependencies are generated
+	and added to dependency list without a prefix.
+
+*-MF* 'file'::
+	Output Makefile-style dependencies to the specified file.
+
+*-MD* 'file'::
+	Same as a combination of *-M* and *-MF* options.
+
+*-MT* 'file'::
+	Override the default name of the dependency target dependency target name.
+	This is normally the same as the output filename, specified by
+	the *-o* option.
+
+*-MQ* 'file'::
+	The same as *-MT* except it tries to quote characters that have special
+	meaning in Makefile syntax. This is not foolproof, as not all characters
+	with special meaning are quotable in Make.
+
+*-MP*::
+	Emit phony target.
+
+*-O* 'number'::
+	Optimize branch offsets.
+	* *-O0*: No optimization
+	* *-O1*: Minimal optimization
+	* *-Ox*: Multipass optimization (default)
+
+*-o* 'outfile'::
+	Specifies a precise name for the output file, overriding *nasm*'s default
+	means of determining it.
+
+*-P*|*-p* 'file'::
+	Specifies a file to be pre-included, before the main source file
+	starts to be processed.
+
+*-s*::
+	Causes *nasm* to send its error messages and/or help text to stdout
+	instead of stderr.
+
+*-t*::
+	Causes *nasm* to assemble in SciTech TASM compatible mode.
+
+*-U*|*-u* 'macro'::
+	Undefines a single-line macro.
+
+*-v*::
+	Causes *nasm* to exit immediately, after displaying its version number.
+
+*-Wno-foo'::
+	Causes *nasm* to enable or disable certain classes of warning messages,
+	in gcc-like style, for example *-Wlabel-orphan* or *-Wno-orphan-labels*.
+
+*-w*'+-foo'::
+	Causes *nasm* to enable or disable certain classes of warning messages,
+	for example *-w+label-orphan* or *-w-macro-params*.
+
+*-X* 'format'::
+	Specifies error reporting format (gnu or vc).
+
+*-y*::
+	Causes *nasm* to list supported debug formats.
+
+*-Z* 'filename'::
+	Causes *nasm* to redirect error messages to 'filename'. This option exists
+	to support operating systems on which stderr is not easily redirected.
+
+--prefix::
+--postfix::
+	Prepend or append (respectively) the given argument to all global or
+	extern variables.
+
+SYNTAX
+------
+This man page does not fully describe the syntax of *nasm*'s assembly language,
+but does give a summary of the differences from other assemblers.
+
+'Registers' have no leading `%' sign, unlike *gas*, and floating-point stack
+registers are referred to as 'st0', 'st1', and so on.
+
+'Floating-point instructions' may use either the single-operand form or the
+double. A 'TO' keyword is provided; thus, one could either write
+
+	fadd st0,st1
+	fadd st1,st0
+
+or one could use the alternative single-operand forms
+
+	fadd st1
+	fadd to st1
+
+'Uninitialised storage' is reserved using the 'RESB', 'RESW', 'RESD', 'RESQ',
+'REST' and 'RESO' pseudo-opcodes, each taking one parameter which gives the
+number of bytes, words, doublewords, quadwords or ten-byte words to reserve.
+
+'Repetition' of data items is not done by the 'DUP' keyword as seen in DOS
+assemblers, but by the use of the 'TIMES' prefix, like this:
+
+	message: times 3 db 'abc'
+		 times 64-$+message db 0
+
+which defines the string `abcabcabc`, followed by the right number of zero
+bytes to make the total length up to 64 bytes.
+
+'Symbol references' are always understood to be immediate (i.e. the address
+of the symbol), unless square brackets are used, in which case the contents
+of the memory location are used. Thus:
+
+	mov ax,wordvar
+
+loads AX with the address of the variable `wordvar`, whereas
+
+	mov ax,wordvar
+	mov ax,wordvar+1
+	mov ax,es:wordvar+bx
+
+all refer to the 'contents' of memory locations. The syntaxes
+
+	mov ax,es:wordvarbx
+	es mov ax,wordvar1
+
+are not legal at all, although the use of a segment register name as an instruction
+prefix is valid, and can be used with instructions such as 'LODSB' which can't
+be overridden any other way.
+
+'Constants' may be expressed numerically in most formats: a trailing H, Q or
+B denotes hex, octal or binary respectively, and a leading `0x' or `$' denotes
+hex as well. Leading zeros are not treated specially at all. Character constants
+may be enclosed in single or double quotes; there is no escape character. The
+ordering is little-endian (reversed), so that the character constant ''abcd''
+denotes 0x64636261 and not 0x61626364.
+
+Local labels begin with a period, and their `locality' is granted by the assembler
+prepending the name of the previous non-local symbol. Thus declaring a label
+`.loop' after a label `label' has actually defined a symbol called `label.loop'.
+
+DIRECTIVES
+----------
+'SECTION' 'name' or 'SEGMENT' 'name' causes *nasm* to direct all following code
+to the named section. Section names vary with output file format, although most
+formats support the names '.text', '.data' and '.bss'. (The exception is the
+'obj' format, in which all segments are user-definable.)
+
+'ABSOLUTE' 'address' causes *nasm* to position its notional assembly point at
+an absolute address: so no code or data may be generated, but you can use 'RESB',
+'RESW' and 'RESD' to move the assembly point further on, and you can define labels.
+So this directive may be used to define data structures. When you have finished
+doing absolute assembly, you must issue another 'SECTION' directive to return to
+normal assembly.
+
+'BITS' '16', 'BITS' '32' or 'BITS' '64' switches the default processor mode for
+which *nasm* is generating code: it is equivalent to 'USE16' or 'USE32' in DOS
+assemblers.
+
+'EXTERN' 'symbol' and 'GLOBAL' 'symbol' import and export symbol definitions,
+respectively, from and to other modules. Note that the 'GLOBAL' directive must
+appear before the definition of the symbol it refers to.
+
+'STRUC' 'strucname' and 'ENDSTRUC', when used to bracket a number of 'RESB',
+'RESW' or similar instructions, define a data structure. In addition to
+defining the offsets of the structure members, the construct also defines a symbol
+for the size of the structure, which is simply the structure name with 'size'
+tacked on to the end.
+
+FORMAT-SPECIFIC DIRECTIVES
+--------------------------
+'ORG' 'address' is used by the 'bin' flat-form binary output format, and
+specifies the address at which the output code will eventually be loaded.
+
+'GROUP' 'grpname' 'seg1' 'seg2'... is used by the obj (Microsoft 16-bit)
+output format, and defines segment groups. This format also uses 'UPPERCASE',
+which directs that all segment, group and symbol names output to the object
+file should be in uppercase. Note that the actual assembly is still case
+sensitive.
+
+'LIBRARY' 'libname' is used by the 'rdf' output format, and causes a
+dependency record to be written to the output file which indicates that
+the program requires a certain library in order to run.
+
+MACRO PREPROCESSOR
+------------------
+Single-line macros are defined using the '%define' or '%idefine' commands, in
+a similar fashion to the C preprocessor. They can be overloaded with respect
+to number of parameters, although defining a macro with no parameters prevents
+the definition of any macro with the same name taking parameters, and vice versa.
+'%define' defines macros whose names match case-sensitively, whereas '%idefine'
+defines case-insensitive macros.
+
+Multi-line macros are defined using '%macro' and '%imacro' (the distinction is the
+same as that between '%define' and '%idefine'), whose syntax is as follows
+
+	%macro name minprm-maxprm+.nolist defaults
+		<some lines of macro expansion text>
+	%endmacro
+
+Again, these macros may be overloaded. The trailing plus sign indicates that
+any parameters after the last one get subsumed, with their separating commas,
+into the last parameter. The 'defaults' part can be used to specify defaults for
+unspecified macro parameters after 'minparam'. '%endm' is a valid synonym for
+'%endmacro'.
+
+To refer to the macro parameters within a macro expansion, you use '%1', '%2' and
+so on. You can also enforce that a macro parameter should contain a condition
+code by using '%+1', and you can invert the condition code by using '%-1'. You can also
+define a label specific to a macro invocation by prefixing it with a double `%' sign.
+
+Files can be included using the '%include' directive, which works like C.
+
+The preprocessor has a `context stack', which may be used by one macro to store
+information that a later one will retrieve. You can push a context on the stack
+using '%push', remove one using '%pop', and change the name of the top context (without
+disturbing any associated definitions) using '%repl'. Labels and '%define' macros
+specific to the top context may be defined by prefixing their names with %$,
+and things specific to the next context down with %$$, and so on.
+
+Conditional assembly is done by means of '%ifdef', '%ifndef', '%else' and '%endif'
+as in C. (Except that '%ifdef' can accept several putative macro names, and
+will evaluate TRUE if any of them is defined.) In addition, the directives
+'%ifctx' and '%ifnctx' can be used to condition on the name of the top context
+on the context stack. The obvious set of `else-if' directives, '%elifdef',
+'%elifndef', '%elifctx' and '%elifnctx' are also supported.
+
+BUGS
+----
+Please report bugs through the bug tracker function at http://nasm.us.
+
+SEE ALSO
+--------
+*as*(1), *ld*(1).

_service:tar_scm:nasm-2.16.03.tar.xz/nasm.xml Added

@@ -0,0 +1,527 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!DOCTYPE refentry PUBLIC "-//OASIS//DTD DocBook XML V4.5//EN" "http://www.oasis-open.org/docbook/xml/4.5/docbookx.dtd">
+<?asciidoc-toc?>
+<?asciidoc-numbered?>
+<refentry lang="en">
+<refentryinfo>
+    <title>nasm(1)</title>
+</refentryinfo>
+<refmeta>
+<refentrytitle>nasm</refentrytitle>
+<manvolnum>1</manvolnum>
+<refmiscinfo class="source">NASM</refmiscinfo>
+<refmiscinfo class="manual">The Netwide Assembler Project</refmiscinfo>
+</refmeta>
+<refnamediv>
+    <refname>nasm</refname>
+    <refpurpose>the Netwide Assembler, a portable 80x86 assembler</refpurpose>
+</refnamediv>
+<refsynopsisdiv id="_synopsis">
+<simpara><emphasis role="strong">nasm</emphasis> <emphasis role="strong">-@</emphasis> response file <emphasis role="strong">-f</emphasis> format <emphasis role="strong">-o</emphasis> outfile <emphasis role="strong">-l</emphasis> listfile <emphasis>options</emphasis>&#8230; filename</simpara>
+</refsynopsisdiv>
+<refsect1 id="_description">
+<title>DESCRIPTION</title>
+<simpara>The <emphasis role="strong">nasm</emphasis> command assembles the file <emphasis>filename</emphasis> and directs output to the file
+<emphasis>outfile</emphasis> if specified. If <emphasis>outfile</emphasis> is not specified, <emphasis role="strong">nasm</emphasis> will derive a default
+output file name from the name of its input file, usually by appending &#8216;.o&#8217; or
+&#8216;.obj&#8217;, or by removing all extensions for a raw binary file. Failing that, the
+output file name will be &#8216;nasm.out&#8217;.</simpara>
+</refsect1>
+<refsect1 id="_options">
+<title>OPTIONS</title>
+<variablelist>
+<varlistentry>
+<term>
+<emphasis role="strong">-@</emphasis> <emphasis>filename</emphasis>
+</term>
+<listitem>
+<simpara>
+        Causes <emphasis role="strong">nasm</emphasis> to process options from filename as if they were included on
+        the command line.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-a</emphasis>
+</term>
+<listitem>
+<simpara>
+        Causes <emphasis role="strong">nasm</emphasis> to assemble the given input file without first applying the
+        macro preprocessor.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-D</emphasis>|<emphasis role="strong">-d</emphasis> <emphasis>macro=value</emphasis>
+</term>
+<listitem>
+<simpara>
+        Pre-defines a single-line macro.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-E</emphasis>|<emphasis role="strong">-e</emphasis>
+</term>
+<listitem>
+<simpara>
+        Causes <emphasis role="strong">nasm</emphasis> to preprocess the given input file, and write the output to
+        <emphasis>stdout</emphasis> (or the specified output file name), and not actually assemble
+        anything.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-f</emphasis> <emphasis>format</emphasis>
+</term>
+<listitem>
+<simpara>
+        Specifies the output file format. To see a list of valid output formats,
+        use the <emphasis role="strong">-hf</emphasis> option.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-F</emphasis> <emphasis>format</emphasis>
+</term>
+<listitem>
+<simpara>
+        Specifies the debug information format. To see a list of valid output
+        formats, use the <emphasis role="strong">-y</emphasis> option (for example <emphasis role="strong">-felf -y</emphasis>).
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-g</emphasis>
+</term>
+<listitem>
+<simpara>
+        Causes <emphasis role="strong">nasm</emphasis> to generate debug information.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-g</emphasis><emphasis>format</emphasis>
+</term>
+<listitem>
+<simpara>
+        Equivalent to <emphasis role="strong">-g -F</emphasis><emphasis> format</emphasis>.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-h</emphasis>
+</term>
+<listitem>
+<simpara>
+        Causes <emphasis role="strong">nasm</emphasis> to exit immediately, after giving a summary of its
+        invocation options.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-hf</emphasis>
+</term>
+<listitem>
+<simpara>
+        Same as <emphasis role="strong">-h</emphasis> , but also lists all valid output formats.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-I</emphasis>|<emphasis role="strong">-i</emphasis> <emphasis>directory</emphasis>
+</term>
+<listitem>
+<simpara>
+        Adds a directory to the search path for include files. The directory
+        specification must include the trailing slash, as it will be directly
+        prepended to the name of the include file.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-l</emphasis> <emphasis>listfile</emphasis>
+</term>
+<listitem>
+<simpara>
+        Causes an assembly listing to be directed to the given file, in which
+        the original source is displayed on the right hand side (plus the source
+        for included files and the expansions of multi-line macros) and the
+        generated code is shown in hex on the left.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-M</emphasis>
+</term>
+<listitem>
+<simpara>
+        Causes <emphasis role="strong">nasm</emphasis> to output Makefile-style dependencies to stdout; normal
+        output is suppressed.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-MG</emphasis> <emphasis>file</emphasis>
+</term>
+<listitem>
+<simpara>
+        Same as <emphasis role="strong">-M</emphasis> but assumes that missing Makefile dependencies are generated
+        and added to dependency list without a prefix.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-MF</emphasis> <emphasis>file</emphasis>
+</term>
+<listitem>
+<simpara>
+        Output Makefile-style dependencies to the specified file.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-MD</emphasis> <emphasis>file</emphasis>
+</term>
+<listitem>
+<simpara>
+        Same as a combination of <emphasis role="strong">-M</emphasis> and <emphasis role="strong">-MF</emphasis> options.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-MT</emphasis> <emphasis>file</emphasis>
+</term>
+<listitem>
+<simpara>
+        Override the default name of the dependency target dependency target name.
+        This is normally the same as the output filename, specified by
+        the <emphasis role="strong">-o</emphasis> option.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-MQ</emphasis> <emphasis>file</emphasis>
+</term>
+<listitem>
+<simpara>
+        The same as <emphasis role="strong">-MT</emphasis> except it tries to quote characters that have special
+        meaning in Makefile syntax. This is not foolproof, as not all characters
+        with special meaning are quotable in Make.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-MP</emphasis>
+</term>
+<listitem>
+<simpara>
+        Emit phony target.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-O</emphasis> <emphasis>number</emphasis>
+</term>
+<listitem>
+<simpara>
+        Optimize branch offsets.
+</simpara>
+<itemizedlist>
+<listitem>
+<simpara>
+<emphasis role="strong">-O0</emphasis>: No optimization
+</simpara>
+</listitem>
+<listitem>
+<simpara>
+<emphasis role="strong">-O1</emphasis>: Minimal optimization
+</simpara>
+</listitem>
+<listitem>
+<simpara>
+<emphasis role="strong">-Ox</emphasis>: Multipass optimization (default)
+</simpara>
+</listitem>
+</itemizedlist>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-o</emphasis> <emphasis>outfile</emphasis>
+</term>
+<listitem>
+<simpara>
+        Specifies a precise name for the output file, overriding <emphasis role="strong">nasm</emphasis>'s default
+        means of determining it.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-P</emphasis>|<emphasis role="strong">-p</emphasis> <emphasis>file</emphasis>
+</term>
+<listitem>
+<simpara>
+        Specifies a file to be pre-included, before the main source file
+        starts to be processed.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-s</emphasis>
+</term>
+<listitem>
+<simpara>
+        Causes <emphasis role="strong">nasm</emphasis> to send its error messages and/or help text to stdout
+        instead of stderr.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-t</emphasis>
+</term>
+<listitem>
+<simpara>
+        Causes <emphasis role="strong">nasm</emphasis> to assemble in SciTech TASM compatible mode.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-U</emphasis>|<emphasis role="strong">-u</emphasis> <emphasis>macro</emphasis>
+</term>
+<listitem>
+<simpara>
+        Undefines a single-line macro.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-v</emphasis>
+</term>
+<listitem>
+<simpara>
+        Causes <emphasis role="strong">nasm</emphasis> to exit immediately, after displaying its version number.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+*-Wno-foo'
+</term>
+<listitem>
+<simpara>
+        Causes <emphasis role="strong">nasm</emphasis> to enable or disable certain classes of warning messages,
+        in gcc-like style, for example <emphasis role="strong">-Wlabel-orphan</emphasis> or <emphasis role="strong">-Wno-orphan-labels</emphasis>.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-w</emphasis><emphasis>+-foo</emphasis>
+</term>
+<listitem>
+<simpara>
+        Causes <emphasis role="strong">nasm</emphasis> to enable or disable certain classes of warning messages,
+        for example <emphasis role="strong">-w+label-orphan</emphasis> or <emphasis role="strong">-w-macro-params</emphasis>.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-X</emphasis> <emphasis>format</emphasis>
+</term>
+<listitem>
+<simpara>
+        Specifies error reporting format (gnu or vc).
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-y</emphasis>
+</term>
+<listitem>
+<simpara>
+        Causes <emphasis role="strong">nasm</emphasis> to list supported debug formats.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-Z</emphasis> <emphasis>filename</emphasis>
+</term>
+<listitem>
+<simpara>
+        Causes <emphasis role="strong">nasm</emphasis> to redirect error messages to <emphasis>filename</emphasis>. This option exists
+        to support operating systems on which stderr is not easily redirected.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+--prefix
+</term>
+<term>
+--postfix
+</term>
+<listitem>
+<simpara>
+        Prepend or append (respectively) the given argument to all global or
+        extern variables.
+</simpara>
+</listitem>
+</varlistentry>
+</variablelist>
+</refsect1>
+<refsect1 id="_syntax">
+<title>SYNTAX</title>
+<simpara>This man page does not fully describe the syntax of <emphasis role="strong">nasm</emphasis>'s assembly language,
+but does give a summary of the differences from other assemblers.</simpara>
+<simpara><emphasis>Registers</emphasis> have no leading &#8216;%&#8217; sign, unlike <emphasis role="strong">gas</emphasis>, and floating-point stack
+registers are referred to as <emphasis>st0</emphasis>, <emphasis>st1</emphasis>, and so on.</simpara>
+<simpara><emphasis>Floating-point instructions</emphasis> may use either the single-operand form or the
+double. A <emphasis>TO</emphasis> keyword is provided; thus, one could either write</simpara>
+<literallayout class="monospaced">fadd st0,st1
+fadd st1,st0</literallayout>
+<simpara>or one could use the alternative single-operand forms</simpara>
+<literallayout class="monospaced">fadd st1
+fadd to st1</literallayout>
+<simpara><emphasis>Uninitialised storage</emphasis> is reserved using the <emphasis>RESB</emphasis>, <emphasis>RESW</emphasis>, <emphasis>RESD</emphasis>, <emphasis>RESQ</emphasis>,
+<emphasis>REST</emphasis> and <emphasis>RESO</emphasis> pseudo-opcodes, each taking one parameter which gives the
+number of bytes, words, doublewords, quadwords or ten-byte words to reserve.</simpara>
+<simpara><emphasis>Repetition</emphasis> of data items is not done by the <emphasis>DUP</emphasis> keyword as seen in DOS
+assemblers, but by the use of the <emphasis>TIMES</emphasis> prefix, like this:</simpara>
+<literallayout class="monospaced">message: times 3 db 'abc'
+         times 64-$+message db 0</literallayout>
+<simpara>which defines the string <literal>abcabcabc</literal>, followed by the right number of zero
+bytes to make the total length up to 64 bytes.</simpara>
+<simpara><emphasis>Symbol references</emphasis> are always understood to be immediate (i.e. the address
+of the symbol), unless square brackets are used, in which case the contents
+of the memory location are used. Thus:</simpara>
+<literallayout class="monospaced">mov ax,wordvar</literallayout>
+<simpara>loads AX with the address of the variable <literal>wordvar</literal>, whereas</simpara>
+<literallayout class="monospaced">mov ax,wordvar
+mov ax,wordvar+1
+mov ax,es:wordvar+bx</literallayout>
+<simpara>all refer to the <emphasis>contents</emphasis> of memory locations. The syntaxes</simpara>
+<literallayout class="monospaced">mov ax,es:wordvarbx
+es mov ax,wordvar1</literallayout>
+<simpara>are not legal at all, although the use of a segment register name as an instruction
+prefix is valid, and can be used with instructions such as <emphasis>LODSB</emphasis> which can&#8217;t
+be overridden any other way.</simpara>
+<simpara><emphasis>Constants</emphasis> may be expressed numerically in most formats: a trailing H, Q or
+B denotes hex, octal or binary respectively, and a leading &#8216;0x&#8217; or &#8216;$&#8217; denotes
+hex as well. Leading zeros are not treated specially at all. Character constants
+may be enclosed in single or double quotes; there is no escape character. The
+ordering is little-endian (reversed), so that the character constant <emphasis>'abcd</emphasis>'
+denotes 0x64636261 and not 0x61626364.</simpara>
+<simpara>Local labels begin with a period, and their &#8216;locality&#8217; is granted by the assembler
+prepending the name of the previous non-local symbol. Thus declaring a label
+&#8216;.loop&#8217; after a label &#8216;label&#8217; has actually defined a symbol called &#8216;label.loop&#8217;.</simpara>
+</refsect1>
+<refsect1 id="_directives">
+<title>DIRECTIVES</title>
+<simpara><emphasis>SECTION</emphasis> <emphasis>name</emphasis> or <emphasis>SEGMENT</emphasis> <emphasis>name</emphasis> causes <emphasis role="strong">nasm</emphasis> to direct all following code
+to the named section. Section names vary with output file format, although most
+formats support the names <emphasis>.text</emphasis>, <emphasis>.data</emphasis> and <emphasis>.bss</emphasis>. (The exception is the
+<emphasis>obj</emphasis> format, in which all segments are user-definable.)</simpara>
+<simpara><emphasis>ABSOLUTE</emphasis> <emphasis>address</emphasis> causes <emphasis role="strong">nasm</emphasis> to position its notional assembly point at
+an absolute address: so no code or data may be generated, but you can use <emphasis>RESB</emphasis>,
+<emphasis>RESW</emphasis> and <emphasis>RESD</emphasis> to move the assembly point further on, and you can define labels.
+So this directive may be used to define data structures. When you have finished
+doing absolute assembly, you must issue another <emphasis>SECTION</emphasis> directive to return to
+normal assembly.</simpara>
+<simpara><emphasis>BITS</emphasis> <emphasis>16</emphasis>, <emphasis>BITS</emphasis> <emphasis>32</emphasis> or <emphasis>BITS</emphasis> <emphasis>64</emphasis> switches the default processor mode for
+which <emphasis role="strong">nasm</emphasis> is generating code: it is equivalent to <emphasis>USE16</emphasis> or <emphasis>USE32</emphasis> in DOS
+assemblers.</simpara>
+<simpara><emphasis>EXTERN</emphasis> <emphasis>symbol</emphasis> and <emphasis>GLOBAL</emphasis> <emphasis>symbol</emphasis> import and export symbol definitions,
+respectively, from and to other modules. Note that the <emphasis>GLOBAL</emphasis> directive must
+appear before the definition of the symbol it refers to.</simpara>
+<simpara><emphasis>STRUC</emphasis> <emphasis>strucname</emphasis> and <emphasis>ENDSTRUC</emphasis>, when used to bracket a number of <emphasis>RESB</emphasis>,
+<emphasis>RESW</emphasis> or similar instructions, define a data structure. In addition to
+defining the offsets of the structure members, the construct also defines a symbol
+for the size of the structure, which is simply the structure name with <emphasis>size</emphasis>
+tacked on to the end.</simpara>
+</refsect1>
+<refsect1 id="_format_specific_directives">
+<title>FORMAT-SPECIFIC DIRECTIVES</title>
+<simpara><emphasis>ORG</emphasis> <emphasis>address</emphasis> is used by the <emphasis>bin</emphasis> flat-form binary output format, and
+specifies the address at which the output code will eventually be loaded.</simpara>
+<simpara><emphasis>GROUP</emphasis> <emphasis>grpname</emphasis> <emphasis>seg1</emphasis> <emphasis>seg2</emphasis>&#8230; is used by the obj (Microsoft 16-bit)
+output format, and defines segment groups. This format also uses <emphasis>UPPERCASE</emphasis>,
+which directs that all segment, group and symbol names output to the object
+file should be in uppercase. Note that the actual assembly is still case
+sensitive.</simpara>
+<simpara><emphasis>LIBRARY</emphasis> <emphasis>libname</emphasis> is used by the <emphasis>rdf</emphasis> output format, and causes a
+dependency record to be written to the output file which indicates that
+the program requires a certain library in order to run.</simpara>
+</refsect1>
+<refsect1 id="_macro_preprocessor">
+<title>MACRO PREPROCESSOR</title>
+<simpara>Single-line macros are defined using the <emphasis>%define</emphasis> or <emphasis>%idefine</emphasis> commands, in
+a similar fashion to the C preprocessor. They can be overloaded with respect
+to number of parameters, although defining a macro with no parameters prevents
+the definition of any macro with the same name taking parameters, and vice versa.
+<emphasis>%define</emphasis> defines macros whose names match case-sensitively, whereas <emphasis>%idefine</emphasis>
+defines case-insensitive macros.</simpara>
+<simpara>Multi-line macros are defined using <emphasis>%macro</emphasis> and <emphasis>%imacro</emphasis> (the distinction is the
+same as that between <emphasis>%define</emphasis> and <emphasis>%idefine</emphasis>), whose syntax is as follows</simpara>
+<literallayout class="monospaced">%macro name minprm-maxprm+.nolist defaults
+        &lt;some lines of macro expansion text&gt;
+%endmacro</literallayout>
+<simpara>Again, these macros may be overloaded. The trailing plus sign indicates that
+any parameters after the last one get subsumed, with their separating commas,
+into the last parameter. The <emphasis>defaults</emphasis> part can be used to specify defaults for
+unspecified macro parameters after <emphasis>minparam</emphasis>. <emphasis>%endm</emphasis> is a valid synonym for
+<emphasis>%endmacro</emphasis>.</simpara>
+<simpara>To refer to the macro parameters within a macro expansion, you use <emphasis>%1</emphasis>, <emphasis>%2</emphasis> and
+so on. You can also enforce that a macro parameter should contain a condition
+code by using <emphasis>%+1</emphasis>, and you can invert the condition code by using <emphasis>%-1</emphasis>. You can also
+define a label specific to a macro invocation by prefixing it with a double &#8216;%&#8217; sign.</simpara>
+<simpara>Files can be included using the <emphasis>%include</emphasis> directive, which works like C.</simpara>
+<simpara>The preprocessor has a &#8216;context stack&#8217;, which may be used by one macro to store
+information that a later one will retrieve. You can push a context on the stack
+using <emphasis>%push</emphasis>, remove one using <emphasis>%pop</emphasis>, and change the name of the top context (without
+disturbing any associated definitions) using <emphasis>%repl</emphasis>. Labels and <emphasis>%define</emphasis> macros
+specific to the top context may be defined by prefixing their names with %$,
+and things specific to the next context down with %$$, and so on.</simpara>
+<simpara>Conditional assembly is done by means of <emphasis>%ifdef</emphasis>, <emphasis>%ifndef</emphasis>, <emphasis>%else</emphasis> and <emphasis>%endif</emphasis>
+as in C. (Except that <emphasis>%ifdef</emphasis> can accept several putative macro names, and
+will evaluate TRUE if any of them is defined.) In addition, the directives
+<emphasis>%ifctx</emphasis> and <emphasis>%ifnctx</emphasis> can be used to condition on the name of the top context
+on the context stack. The obvious set of &#8216;else-if&#8217; directives, <emphasis>%elifdef</emphasis>,
+<emphasis>%elifndef</emphasis>, <emphasis>%elifctx</emphasis> and <emphasis>%elifnctx</emphasis> are also supported.</simpara>
+</refsect1>
+<refsect1 id="_bugs">
+<title>BUGS</title>
+<simpara>Please report bugs through the bug tracker function at <ulink url="http://nasm.us">http://nasm.us</ulink>.</simpara>
+</refsect1>
+<refsect1 id="_see_also">
+<title>SEE ALSO</title>
+<simpara><emphasis role="strong">as</emphasis>(1), <emphasis role="strong">ld</emphasis>(1).</simpara>
+</refsect1>
+</refentry>

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib Added

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/alloc.c Added

@@ -0,0 +1,197 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2019 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * nasmlib.c	library routines for the Netwide Assembler
+ */
+
+#include "compiler.h"
+#include "nasmlib.h"
+#include "error.h"
+#include "alloc.h"
+
+size_t _nasm_last_string_size;
+
+fatal_func nasm_alloc_failed(void)
+{
+    nasm_critical("out of memory!");
+}
+
+void *nasm_malloc(size_t size)
+{
+    void *p;
+
+again:
+    p = malloc(size);
+
+    if (unlikely(!p)) {
+        if (!size) {
+            size = 1;
+            goto again;
+        }
+        nasm_alloc_failed();
+    }
+    return p;
+}
+
+void *nasm_calloc(size_t nelem, size_t size)
+{
+    void *p;
+
+again:
+    p = calloc(nelem, size);
+
+    if (unlikely(!p)) {
+        if (!nelem || !size) {
+            nelem = size = 1;
+            goto again;
+        }
+        nasm_alloc_failed();
+    }
+
+    return p;
+}
+
+void *nasm_zalloc(size_t size)
+{
+    return nasm_calloc(size, 1);
+}
+
+/*
+ * Unlike the system realloc, we do *not* allow size == 0 to be
+ * the equivalent to free(); we guarantee returning a non-NULL pointer.
+ *
+ * The check for calling malloc() is theoretically redundant, but be
+ * paranoid about the system library...
+ */
+void *nasm_realloc(void *q, size_t size)
+{
+    if (unlikely(!size))
+        size = 1;
+    q = q ? realloc(q, size) : malloc(size);
+    return validate_ptr(q);
+}
+
+void nasm_free(void *q)
+{
+    if (q)
+        free(q);
+}
+
+char *nasm_strdup(const char *s)
+{
+    char *p;
+    const size_t size = strlen(s) + 1;
+
+    _nasm_last_string_size = size;
+    p = nasm_malloc(size);
+    return memcpy(p, s, size);
+}
+
+char *nasm_strndup(const char *s, size_t len)
+{
+    char *p;
+
+    len = strnlen(s, len);
+    _nasm_last_string_size = len + 1;
+    p = nasm_malloc(len+1);
+    plen = '\0';
+    return memcpy(p, s, len);
+}
+
+char *nasm_strcat(const char *one, const char *two)
+{
+    char *rslt;
+    const size_t l1 = strlen(one);
+    const size_t s2 = strlen(two) + 1;
+
+    _nasm_last_string_size = l1 + s2;
+    rslt = nasm_malloc(l1 + s2);
+    memcpy(rslt, one, l1);
+    memcpy(rslt + l1, two, s2);
+    return rslt;
+}
+
+char *nasm_strcatn(const char *str1, ...)
+{
+    va_list ap;
+    char *rslt;                 /* Output buffer */
+    size_t s;                   /* Total buffer size */
+    size_t n;                   /* Number of arguments */
+    size_t *ltbl;               /* Table of lengths */
+    size_t l, *lp;              /* Length for current argument */
+    const char *p;              /* Currently examined argument */
+    char *q;                    /* Output pointer */
+
+    n = 0;                      /* No strings encountered yet */
+    p = str1;
+    va_start(ap, str1);
+    while (p) {
+        n++;
+        p = va_arg(ap, const char *);
+    }
+    va_end(ap);
+
+    ltbl = nasm_malloc(n * sizeof(size_t));
+
+    s = 1;                      /* Space for final NULL */
+    p = str1;
+    lp = ltbl;
+    va_start(ap, str1);
+    while (p) {
+        *lp++ = l = strlen(p);
+        s += l;
+        p = va_arg(ap, const char *);
+    }
+    va_end(ap);
+
+    _nasm_last_string_size = s;
+
+    q = rslt = nasm_malloc(s);
+
+    p = str1;
+    lp = ltbl;
+    va_start(ap, str1);
+    while (p) {
+        l = *lp++;
+        memcpy(q, p, l);
+        q += l;
+        p = va_arg(ap, const char *);
+    }
+    va_end(ap);
+    *q = '\0';
+
+    nasm_free(ltbl);
+
+    return rslt;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/alloc.h Added

@@ -0,0 +1,50 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2018 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#ifndef NASMLIB_ALLOC_H
+#define NASMLIB_ALLOC_H
+
+#include "compiler.h"
+
+fatal_func nasm_alloc_failed(void);
+
+static inline void *validate_ptr(void *p)
+{
+    if (unlikely(!p))
+        nasm_alloc_failed();
+    return p;
+}
+
+extern size_t _nasm_last_string_size;
+
+#endif /* NASMLIB_ALLOC_H */

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/asprintf.c Added

@@ -0,0 +1,94 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2018 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#include "compiler.h"
+#include "nasmlib.h"
+#include "alloc.h"
+
+/*
+ * nasm_vasprintf() are variants of the semi-standard vasprintf()
+ * functions, except that we return the pointer instead of a count.
+ * The length of the string (with or without the final NUL) is available
+ * by calling nasm_last_string_{len,size}() afterwards.
+ *
+ * nasm_vaxprintf() are similar, but allocates a user-defined amount
+ * of storage before the string, and returns a pointer to the
+ * allocated buffer. The size of that area is not included in the value
+ * returned by nasm_last_string_size().
+ */
+
+void *nasm_vaxprintf(size_t extra, const char *fmt, va_list ap)
+{
+    char *strp;
+    va_list xap;
+    size_t bytes;
+
+    va_copy(xap, ap);
+    bytes = vsnprintf(NULL, 0, fmt, xap) + 1;
+    _nasm_last_string_size = bytes;
+    va_end(xap);
+
+    strp = nasm_malloc(extra+bytes);
+    memset(strp, 0, extra);
+    vsnprintf(strp+extra, bytes, fmt, ap);
+    return strp;
+}
+
+char *nasm_vasprintf(const char *fmt, va_list ap)
+{
+    return nasm_vaxprintf(0, fmt, ap);
+}
+
+void *nasm_axprintf(size_t extra, const char *fmt, ...)
+{
+    va_list ap;
+    void *strp;
+
+    va_start(ap, fmt);
+    strp = nasm_vaxprintf(extra, fmt, ap);
+    va_end(ap);
+
+    return strp;
+}
+
+char *nasm_asprintf(const char *fmt, ...)
+{
+    va_list ap;
+    char *strp;
+
+    va_start(ap, fmt);
+    strp = nasm_vaxprintf(0, fmt, ap);
+    va_end(ap);
+
+    return strp;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/badenum.c Added

@@ -0,0 +1,43 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 2017 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#include "nasmlib.h"
+
+/* Used to avoid returning NULL to a debug printing function */
+const char *invalid_enum_str(int x)
+{
+    static char buf64;
+
+    snprintf(buf, sizeof buf, "<invalid %d>", x);
+    return buf;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/bsi.c Added

@@ -0,0 +1,76 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2016 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * nasmlib.c	library routines for the Netwide Assembler
+ */
+
+#include "compiler.h"
+
+
+#include "nasmlib.h"
+
+/*
+ * Binary search.
+ */
+int bsi(const char *string, const char **array, int size)
+{
+    int i = -1, j = size;       /* always, i < index < j */
+    while (j - i >= 2) {
+        int k = (i + j) / 2;
+        int l = strcmp(string, arrayk);
+        if (l < 0)              /* it's in the first half */
+            j = k;
+        else if (l > 0)         /* it's in the second half */
+            i = k;
+        else                    /* we've got it :) */
+            return k;
+    }
+    return -1;                  /* we haven't got it :( */
+}
+
+int bsii(const char *string, const char **array, int size)
+{
+    int i = -1, j = size;       /* always, i < index < j */
+    while (j - i >= 2) {
+        int k = (i + j) / 2;
+        int l = nasm_stricmp(string, arrayk);
+        if (l < 0)              /* it's in the first half */
+            j = k;
+        else if (l > 0)         /* it's in the second half */
+            i = k;
+        else                    /* we've got it :) */
+            return k;
+    }
+    return -1;                  /* we haven't got it :( */
+}

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/crc32.c Added

@@ -0,0 +1,115 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2021 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#include "compiler.h"
+#include "hashtbl.h"
+
+const uint32_t crc32_tab256 = {
+    0x00000000, 0x77073096, 0xEE0E612C, 0x990951BA,
+    0x076DC419, 0x706AF48F, 0xE963A535, 0x9E6495A3,
+    0x0EDB8832, 0x79DCB8A4, 0xE0D5E91E, 0x97D2D988,
+    0x09B64C2B, 0x7EB17CBD, 0xE7B82D07, 0x90BF1D91,
+    0x1DB71064, 0x6AB020F2, 0xF3B97148, 0x84BE41DE,
+    0x1ADAD47D, 0x6DDDE4EB, 0xF4D4B551, 0x83D385C7,
+    0x136C9856, 0x646BA8C0, 0xFD62F97A, 0x8A65C9EC,
+    0x14015C4F, 0x63066CD9, 0xFA0F3D63, 0x8D080DF5,
+    0x3B6E20C8, 0x4C69105E, 0xD56041E4, 0xA2677172,
+    0x3C03E4D1, 0x4B04D447, 0xD20D85FD, 0xA50AB56B,
+    0x35B5A8FA, 0x42B2986C, 0xDBBBC9D6, 0xACBCF940,
+    0x32D86CE3, 0x45DF5C75, 0xDCD60DCF, 0xABD13D59,
+    0x26D930AC, 0x51DE003A, 0xC8D75180, 0xBFD06116,
+    0x21B4F4B5, 0x56B3C423, 0xCFBA9599, 0xB8BDA50F,
+    0x2802B89E, 0x5F058808, 0xC60CD9B2, 0xB10BE924,
+    0x2F6F7C87, 0x58684C11, 0xC1611DAB, 0xB6662D3D,
+    0x76DC4190, 0x01DB7106, 0x98D220BC, 0xEFD5102A,
+    0x71B18589, 0x06B6B51F, 0x9FBFE4A5, 0xE8B8D433,
+    0x7807C9A2, 0x0F00F934, 0x9609A88E, 0xE10E9818,
+    0x7F6A0DBB, 0x086D3D2D, 0x91646C97, 0xE6635C01,
+    0x6B6B51F4, 0x1C6C6162, 0x856530D8, 0xF262004E,
+    0x6C0695ED, 0x1B01A57B, 0x8208F4C1, 0xF50FC457,
+    0x65B0D9C6, 0x12B7E950, 0x8BBEB8EA, 0xFCB9887C,
+    0x62DD1DDF, 0x15DA2D49, 0x8CD37CF3, 0xFBD44C65,
+    0x4DB26158, 0x3AB551CE, 0xA3BC0074, 0xD4BB30E2,
+    0x4ADFA541, 0x3DD895D7, 0xA4D1C46D, 0xD3D6F4FB,
+    0x4369E96A, 0x346ED9FC, 0xAD678846, 0xDA60B8D0,
+    0x44042D73, 0x33031DE5, 0xAA0A4C5F, 0xDD0D7CC9,
+    0x5005713C, 0x270241AA, 0xBE0B1010, 0xC90C2086,
+    0x5768B525, 0x206F85B3, 0xB966D409, 0xCE61E49F,
+    0x5EDEF90E, 0x29D9C998, 0xB0D09822, 0xC7D7A8B4,
+    0x59B33D17, 0x2EB40D81, 0xB7BD5C3B, 0xC0BA6CAD,
+    0xEDB88320, 0x9ABFB3B6, 0x03B6E20C, 0x74B1D29A,
+    0xEAD54739, 0x9DD277AF, 0x04DB2615, 0x73DC1683,
+    0xE3630B12, 0x94643B84, 0x0D6D6A3E, 0x7A6A5AA8,
+    0xE40ECF0B, 0x9309FF9D, 0x0A00AE27, 0x7D079EB1,
+    0xF00F9344, 0x8708A3D2, 0x1E01F268, 0x6906C2FE,
+    0xF762575D, 0x806567CB, 0x196C3671, 0x6E6B06E7,
+    0xFED41B76, 0x89D32BE0, 0x10DA7A5A, 0x67DD4ACC,
+    0xF9B9DF6F, 0x8EBEEFF9, 0x17B7BE43, 0x60B08ED5,
+    0xD6D6A3E8, 0xA1D1937E, 0x38D8C2C4, 0x4FDFF252,
+    0xD1BB67F1, 0xA6BC5767, 0x3FB506DD, 0x48B2364B,
+    0xD80D2BDA, 0xAF0A1B4C, 0x36034AF6, 0x41047A60,
+    0xDF60EFC3, 0xA867DF55, 0x316E8EEF, 0x4669BE79,
+    0xCB61B38C, 0xBC66831A, 0x256FD2A0, 0x5268E236,
+    0xCC0C7795, 0xBB0B4703, 0x220216B9, 0x5505262F,
+    0xC5BA3BBE, 0xB2BD0B28, 0x2BB45A92, 0x5CB36A04,
+    0xC2D7FFA7, 0xB5D0CF31, 0x2CD99E8B, 0x5BDEAE1D,
+    0x9B64C2B0, 0xEC63F226, 0x756AA39C, 0x026D930A,
+    0x9C0906A9, 0xEB0E363F, 0x72076785, 0x05005713,
+    0x95BF4A82, 0xE2B87A14, 0x7BB12BAE, 0x0CB61B38,
+    0x92D28E9B, 0xE5D5BE0D, 0x7CDCEFB7, 0x0BDBDF21,
+    0x86D3D2D4, 0xF1D4E242, 0x68DDB3F8, 0x1FDA836E,
+    0x81BE16CD, 0xF6B9265B, 0x6FB077E1, 0x18B74777,
+    0x88085AE6, 0xFF0F6A70, 0x66063BCA, 0x11010B5C,
+    0x8F659EFF, 0xF862AE69, 0x616BFFD3, 0x166CCF45,
+    0xA00AE278, 0xD70DD2EE, 0x4E048354, 0x3903B3C2,
+    0xA7672661, 0xD06016F7, 0x4969474D, 0x3E6E77DB,
+    0xAED16A4A, 0xD9D65ADC, 0x40DF0B66, 0x37D83BF0,
+    0xA9BCAE53, 0xDEBB9EC5, 0x47B2CF7F, 0x30B5FFE9,
+    0xBDBDF21C, 0xCABAC28A, 0x53B39330, 0x24B4A3A6,
+    0xBAD03605, 0xCDD70693, 0x54DE5729, 0x23D967BF,
+    0xB3667A2E, 0xC4614AB8, 0x5D681B02, 0x2A6F2B94,
+    0xB40BBE37, 0xC30C8EA1, 0x5A05DF1B, 0x2D02EF8D
+};
+
+uint32_t crc32b(uint32_t crc, const void *data, size_t len)
+{
+    register const uint8_t *p = data;
+    register uint32_t hashval = crc;
+
+    while (len--)
+    {
+        hashval = (hashval >> 8) ^ crc32_tab(hashval ^ *p++) & 0xff;
+    }
+
+    return hashval;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/crc64.c Added

@@ -0,0 +1,207 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2014 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#include "compiler.h"
+#include "nctype.h"
+#include "hashtbl.h"
+
+const uint64_t crc64_tab256 = {
+    UINT64_C(0x0000000000000000), UINT64_C(0x7ad870c830358979),
+    UINT64_C(0xf5b0e190606b12f2), UINT64_C(0x8f689158505e9b8b),
+    UINT64_C(0xc038e5739841b68f), UINT64_C(0xbae095bba8743ff6),
+    UINT64_C(0x358804e3f82aa47d), UINT64_C(0x4f50742bc81f2d04),
+    UINT64_C(0xab28ecb46814fe75), UINT64_C(0xd1f09c7c5821770c),
+    UINT64_C(0x5e980d24087fec87), UINT64_C(0x24407dec384a65fe),
+    UINT64_C(0x6b1009c7f05548fa), UINT64_C(0x11c8790fc060c183),
+    UINT64_C(0x9ea0e857903e5a08), UINT64_C(0xe478989fa00bd371),
+    UINT64_C(0x7d08ff3b88be6f81), UINT64_C(0x07d08ff3b88be6f8),
+    UINT64_C(0x88b81eabe8d57d73), UINT64_C(0xf2606e63d8e0f40a),
+    UINT64_C(0xbd301a4810ffd90e), UINT64_C(0xc7e86a8020ca5077),
+    UINT64_C(0x4880fbd87094cbfc), UINT64_C(0x32588b1040a14285),
+    UINT64_C(0xd620138fe0aa91f4), UINT64_C(0xacf86347d09f188d),
+    UINT64_C(0x2390f21f80c18306), UINT64_C(0x594882d7b0f40a7f),
+    UINT64_C(0x1618f6fc78eb277b), UINT64_C(0x6cc0863448deae02),
+    UINT64_C(0xe3a8176c18803589), UINT64_C(0x997067a428b5bcf0),
+    UINT64_C(0xfa11fe77117cdf02), UINT64_C(0x80c98ebf2149567b),
+    UINT64_C(0x0fa11fe77117cdf0), UINT64_C(0x75796f2f41224489),
+    UINT64_C(0x3a291b04893d698d), UINT64_C(0x40f16bccb908e0f4),
+    UINT64_C(0xcf99fa94e9567b7f), UINT64_C(0xb5418a5cd963f206),
+    UINT64_C(0x513912c379682177), UINT64_C(0x2be1620b495da80e),
+    UINT64_C(0xa489f35319033385), UINT64_C(0xde51839b2936bafc),
+    UINT64_C(0x9101f7b0e12997f8), UINT64_C(0xebd98778d11c1e81),
+    UINT64_C(0x64b116208142850a), UINT64_C(0x1e6966e8b1770c73),
+    UINT64_C(0x8719014c99c2b083), UINT64_C(0xfdc17184a9f739fa),
+    UINT64_C(0x72a9e0dcf9a9a271), UINT64_C(0x08719014c99c2b08),
+    UINT64_C(0x4721e43f0183060c), UINT64_C(0x3df994f731b68f75),
+    UINT64_C(0xb29105af61e814fe), UINT64_C(0xc849756751dd9d87),
+    UINT64_C(0x2c31edf8f1d64ef6), UINT64_C(0x56e99d30c1e3c78f),
+    UINT64_C(0xd9810c6891bd5c04), UINT64_C(0xa3597ca0a188d57d),
+    UINT64_C(0xec09088b6997f879), UINT64_C(0x96d1784359a27100),
+    UINT64_C(0x19b9e91b09fcea8b), UINT64_C(0x636199d339c963f2),
+    UINT64_C(0xdf7adabd7a6e2d6f), UINT64_C(0xa5a2aa754a5ba416),
+    UINT64_C(0x2aca3b2d1a053f9d), UINT64_C(0x50124be52a30b6e4),
+    UINT64_C(0x1f423fcee22f9be0), UINT64_C(0x659a4f06d21a1299),
+    UINT64_C(0xeaf2de5e82448912), UINT64_C(0x902aae96b271006b),
+    UINT64_C(0x74523609127ad31a), UINT64_C(0x0e8a46c1224f5a63),
+    UINT64_C(0x81e2d7997211c1e8), UINT64_C(0xfb3aa75142244891),
+    UINT64_C(0xb46ad37a8a3b6595), UINT64_C(0xceb2a3b2ba0eecec),
+    UINT64_C(0x41da32eaea507767), UINT64_C(0x3b024222da65fe1e),
+    UINT64_C(0xa2722586f2d042ee), UINT64_C(0xd8aa554ec2e5cb97),
+    UINT64_C(0x57c2c41692bb501c), UINT64_C(0x2d1ab4dea28ed965),
+    UINT64_C(0x624ac0f56a91f461), UINT64_C(0x1892b03d5aa47d18),
+    UINT64_C(0x97fa21650afae693), UINT64_C(0xed2251ad3acf6fea),
+    UINT64_C(0x095ac9329ac4bc9b), UINT64_C(0x7382b9faaaf135e2),
+    UINT64_C(0xfcea28a2faafae69), UINT64_C(0x8632586aca9a2710),
+    UINT64_C(0xc9622c4102850a14), UINT64_C(0xb3ba5c8932b0836d),
+    UINT64_C(0x3cd2cdd162ee18e6), UINT64_C(0x460abd1952db919f),
+    UINT64_C(0x256b24ca6b12f26d), UINT64_C(0x5fb354025b277b14),
+    UINT64_C(0xd0dbc55a0b79e09f), UINT64_C(0xaa03b5923b4c69e6),
+    UINT64_C(0xe553c1b9f35344e2), UINT64_C(0x9f8bb171c366cd9b),
+    UINT64_C(0x10e3202993385610), UINT64_C(0x6a3b50e1a30ddf69),
+    UINT64_C(0x8e43c87e03060c18), UINT64_C(0xf49bb8b633338561),
+    UINT64_C(0x7bf329ee636d1eea), UINT64_C(0x012b592653589793),
+    UINT64_C(0x4e7b2d0d9b47ba97), UINT64_C(0x34a35dc5ab7233ee),
+    UINT64_C(0xbbcbcc9dfb2ca865), UINT64_C(0xc113bc55cb19211c),
+    UINT64_C(0x5863dbf1e3ac9dec), UINT64_C(0x22bbab39d3991495),
+    UINT64_C(0xadd33a6183c78f1e), UINT64_C(0xd70b4aa9b3f20667),
+    UINT64_C(0x985b3e827bed2b63), UINT64_C(0xe2834e4a4bd8a21a),
+    UINT64_C(0x6debdf121b863991), UINT64_C(0x1733afda2bb3b0e8),
+    UINT64_C(0xf34b37458bb86399), UINT64_C(0x8993478dbb8deae0),
+    UINT64_C(0x06fbd6d5ebd3716b), UINT64_C(0x7c23a61ddbe6f812),
+    UINT64_C(0x3373d23613f9d516), UINT64_C(0x49aba2fe23cc5c6f),
+    UINT64_C(0xc6c333a67392c7e4), UINT64_C(0xbc1b436e43a74e9d),
+    UINT64_C(0x95ac9329ac4bc9b5), UINT64_C(0xef74e3e19c7e40cc),
+    UINT64_C(0x601c72b9cc20db47), UINT64_C(0x1ac40271fc15523e),
+    UINT64_C(0x5594765a340a7f3a), UINT64_C(0x2f4c0692043ff643),
+    UINT64_C(0xa02497ca54616dc8), UINT64_C(0xdafce7026454e4b1),
+    UINT64_C(0x3e847f9dc45f37c0), UINT64_C(0x445c0f55f46abeb9),
+    UINT64_C(0xcb349e0da4342532), UINT64_C(0xb1eceec59401ac4b),
+    UINT64_C(0xfebc9aee5c1e814f), UINT64_C(0x8464ea266c2b0836),
+    UINT64_C(0x0b0c7b7e3c7593bd), UINT64_C(0x71d40bb60c401ac4),
+    UINT64_C(0xe8a46c1224f5a634), UINT64_C(0x927c1cda14c02f4d),
+    UINT64_C(0x1d148d82449eb4c6), UINT64_C(0x67ccfd4a74ab3dbf),
+    UINT64_C(0x289c8961bcb410bb), UINT64_C(0x5244f9a98c8199c2),
+    UINT64_C(0xdd2c68f1dcdf0249), UINT64_C(0xa7f41839ecea8b30),
+    UINT64_C(0x438c80a64ce15841), UINT64_C(0x3954f06e7cd4d138),
+    UINT64_C(0xb63c61362c8a4ab3), UINT64_C(0xcce411fe1cbfc3ca),
+    UINT64_C(0x83b465d5d4a0eece), UINT64_C(0xf96c151de49567b7),
+    UINT64_C(0x76048445b4cbfc3c), UINT64_C(0x0cdcf48d84fe7545),
+    UINT64_C(0x6fbd6d5ebd3716b7), UINT64_C(0x15651d968d029fce),
+    UINT64_C(0x9a0d8ccedd5c0445), UINT64_C(0xe0d5fc06ed698d3c),
+    UINT64_C(0xaf85882d2576a038), UINT64_C(0xd55df8e515432941),
+    UINT64_C(0x5a3569bd451db2ca), UINT64_C(0x20ed197575283bb3),
+    UINT64_C(0xc49581ead523e8c2), UINT64_C(0xbe4df122e51661bb),
+    UINT64_C(0x3125607ab548fa30), UINT64_C(0x4bfd10b2857d7349),
+    UINT64_C(0x04ad64994d625e4d), UINT64_C(0x7e7514517d57d734),
+    UINT64_C(0xf11d85092d094cbf), UINT64_C(0x8bc5f5c11d3cc5c6),
+    UINT64_C(0x12b5926535897936), UINT64_C(0x686de2ad05bcf04f),
+    UINT64_C(0xe70573f555e26bc4), UINT64_C(0x9ddd033d65d7e2bd),
+    UINT64_C(0xd28d7716adc8cfb9), UINT64_C(0xa85507de9dfd46c0),
+    UINT64_C(0x273d9686cda3dd4b), UINT64_C(0x5de5e64efd965432),
+    UINT64_C(0xb99d7ed15d9d8743), UINT64_C(0xc3450e196da80e3a),
+    UINT64_C(0x4c2d9f413df695b1), UINT64_C(0x36f5ef890dc31cc8),
+    UINT64_C(0x79a59ba2c5dc31cc), UINT64_C(0x037deb6af5e9b8b5),
+    UINT64_C(0x8c157a32a5b7233e), UINT64_C(0xf6cd0afa9582aa47),
+    UINT64_C(0x4ad64994d625e4da), UINT64_C(0x300e395ce6106da3),
+    UINT64_C(0xbf66a804b64ef628), UINT64_C(0xc5bed8cc867b7f51),
+    UINT64_C(0x8aeeace74e645255), UINT64_C(0xf036dc2f7e51db2c),
+    UINT64_C(0x7f5e4d772e0f40a7), UINT64_C(0x05863dbf1e3ac9de),
+    UINT64_C(0xe1fea520be311aaf), UINT64_C(0x9b26d5e88e0493d6),
+    UINT64_C(0x144e44b0de5a085d), UINT64_C(0x6e963478ee6f8124),
+    UINT64_C(0x21c640532670ac20), UINT64_C(0x5b1e309b16452559),
+    UINT64_C(0xd476a1c3461bbed2), UINT64_C(0xaeaed10b762e37ab),
+    UINT64_C(0x37deb6af5e9b8b5b), UINT64_C(0x4d06c6676eae0222),
+    UINT64_C(0xc26e573f3ef099a9), UINT64_C(0xb8b627f70ec510d0),
+    UINT64_C(0xf7e653dcc6da3dd4), UINT64_C(0x8d3e2314f6efb4ad),
+    UINT64_C(0x0256b24ca6b12f26), UINT64_C(0x788ec2849684a65f),
+    UINT64_C(0x9cf65a1b368f752e), UINT64_C(0xe62e2ad306bafc57),
+    UINT64_C(0x6946bb8b56e467dc), UINT64_C(0x139ecb4366d1eea5),
+    UINT64_C(0x5ccebf68aecec3a1), UINT64_C(0x2616cfa09efb4ad8),
+    UINT64_C(0xa97e5ef8cea5d153), UINT64_C(0xd3a62e30fe90582a),
+    UINT64_C(0xb0c7b7e3c7593bd8), UINT64_C(0xca1fc72bf76cb2a1),
+    UINT64_C(0x45775673a732292a), UINT64_C(0x3faf26bb9707a053),
+    UINT64_C(0x70ff52905f188d57), UINT64_C(0x0a2722586f2d042e),
+    UINT64_C(0x854fb3003f739fa5), UINT64_C(0xff97c3c80f4616dc),
+    UINT64_C(0x1bef5b57af4dc5ad), UINT64_C(0x61372b9f9f784cd4),
+    UINT64_C(0xee5fbac7cf26d75f), UINT64_C(0x9487ca0fff135e26),
+    UINT64_C(0xdbd7be24370c7322), UINT64_C(0xa10fceec0739fa5b),
+    UINT64_C(0x2e675fb4576761d0), UINT64_C(0x54bf2f7c6752e8a9),
+    UINT64_C(0xcdcf48d84fe75459), UINT64_C(0xb71738107fd2dd20),
+    UINT64_C(0x387fa9482f8c46ab), UINT64_C(0x42a7d9801fb9cfd2),
+    UINT64_C(0x0df7adabd7a6e2d6), UINT64_C(0x772fdd63e7936baf),
+    UINT64_C(0xf8474c3bb7cdf024), UINT64_C(0x829f3cf387f8795d),
+    UINT64_C(0x66e7a46c27f3aa2c), UINT64_C(0x1c3fd4a417c62355),
+    UINT64_C(0x935745fc4798b8de), UINT64_C(0xe98f353477ad31a7),
+    UINT64_C(0xa6df411fbfb21ca3), UINT64_C(0xdc0731d78f8795da),
+    UINT64_C(0x536fa08fdfd90e51), UINT64_C(0x29b7d047efec8728),
+};
+
+uint64_t crc64(uint64_t crc, const char *str)
+{
+    uint8_t c;
+
+    while ((c = *str++) != 0)
+        crc = crc64_byte(crc, c);
+
+    return crc;
+}
+
+uint64_t crc64i(uint64_t crc, const char *str)
+{
+    uint8_t c;
+
+    while ((c = *str++) != 0)
+	crc = crc64_byte(crc, nasm_tolower(c));
+
+    return crc;
+}
+
+uint64_t crc64b(uint64_t crc, const void *data, size_t len)
+{
+    const uint8_t *str = data;
+
+    while (len--)
+        crc = crc64_byte(crc, *str++);
+
+    return crc;
+}
+
+uint64_t crc64ib(uint64_t crc, const void *data, size_t len)
+{
+    const uint8_t *str = data;
+
+    while (len--)
+        crc = crc64_byte(crc, nasm_tolower(*str++));
+
+    return crc;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/errfile.c Added

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/file.c Added

@@ -0,0 +1,352 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2017 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#include "file.h"
+
+void nasm_read(void *ptr, size_t size, FILE *f)
+{
+    size_t n = fread(ptr, 1, size, f);
+    if (ferror(f)) {
+        nasm_fatal("unable to read input: %s", strerror(errno));
+    } else if (n != size || feof(f)) {
+        nasm_fatal("fatal short read on input");
+    }
+}
+
+void nasm_write(const void *ptr, size_t size, FILE *f)
+{
+    size_t n = fwrite(ptr, 1, size, f);
+    if (n != size || ferror(f) || feof(f))
+        nasm_fatal("unable to write output: %s", strerror(errno));
+}
+
+void fwriteint16_t(uint16_t data, FILE * fp)
+{
+    data = cpu_to_le16(data);
+    nasm_write(&data, 2, fp);
+}
+
+void fwriteint32_t(uint32_t data, FILE * fp)
+{
+    data = cpu_to_le32(data);
+    nasm_write(&data, 4, fp);
+}
+
+void fwriteint64_t(uint64_t data, FILE * fp)
+{
+    data = cpu_to_le64(data);
+    nasm_write(&data, 8, fp);
+}
+
+void fwriteaddr(uint64_t data, int size, FILE * fp)
+{
+    data = cpu_to_le64(data);
+    nasm_write(&data, size, fp);
+}
+
+void fwritezero(off_t bytes, FILE *fp)
+{
+    size_t blksize;
+
+#ifdef os_ftruncate
+    if (bytes >= BUFSIZ && !ferror(fp) && !feof(fp)) {
+	off_t pos = ftello(fp);
+	if (pos != (off_t)-1) {
+            off_t end = pos + bytes;
+	    if (!fflush(fp) && !os_ftruncate(fileno(fp), end)) {
+                fseeko(fp, 0, SEEK_END);
+                pos = ftello(fp);
+                if (pos != (off_t)-1)
+                    bytes = end - pos; /* This SHOULD be zero */
+            }
+	}
+    }
+#endif
+
+    while (bytes > 0) {
+	blksize = (bytes < ZERO_BUF_SIZE) ? bytes : ZERO_BUF_SIZE;
+
+	nasm_write(zero_buffer, blksize, fp);
+	bytes -= blksize;
+    }
+}
+
+#ifdef _WIN32
+
+/*
+ * On Windows, we want to use _wfopen(), as fopen() has a much smaller limit
+ * on the path length that it supports.
+ *
+ * Previously we tried to prefix the path name with \\?\ in order to
+ * let the Windows kernel know that we are not limited to PATH_MAX
+ * characters, but it breaks relative paths among other things, and
+ * apparently Windows 10 contains a registry option to override this
+ * limit anyway. One day maybe they will even implement UTF-8 as byte
+ * characters so we can use the standard file API even on this OS.
+ */
+
+os_filename os_mangle_filename(const char *filename)
+{
+    mbstate_t ps;
+    size_t wclen;
+    wchar_t *buf;
+    const char *p;
+
+    /*
+     * Note: mbsrtowcs() return (size_t)-1 on error, otherwise
+     * the length of the string *without* final NUL in wchar_t
+     * units. Thus we add 1 for the final NUL; the error value
+     * now becomes 0.
+     */
+    memset(&ps, 0, sizeof ps);  /* Begin in the initial state */
+    p = filename;
+    wclen = mbsrtowcs(NULL, &p, 0, &ps) + 1;
+    if (!wclen)
+        return NULL;
+
+    buf = nasm_malloc(wclen * sizeof(wchar_t));
+
+    memset(&ps, 0, sizeof ps);  /* Begin in the initial state */
+    p = filename;
+    if (mbsrtowcs(buf, &p, wclen, &ps) + 1 != wclen || p) {
+        nasm_free(buf);
+        return NULL;
+    }
+
+    return buf;
+}
+
+#endif
+
+void nasm_set_binary_mode(FILE *f)
+{
+	os_set_binary_mode(f);
+}
+
+FILE *nasm_open_read(const char *filename, enum file_flags flags)
+{
+    FILE *f = NULL;
+    os_filename osfname;
+
+    osfname = os_mangle_filename(filename);
+    if (osfname) {
+        os_fopenflag fopen_flags4;
+        memset(fopen_flags, 0, sizeof fopen_flags);
+
+        fopen_flags0 = 'r';
+        fopen_flags1 = (flags & NF_TEXT) ? 't' : 'b';
+
+#if defined(__GLIBC__) || defined(__linux__)
+        /*
+         * Try to open this file with memory mapping for speed, unless we are
+         * going to do it "manually" with nasm_map_file()
+         */
+        if (!(flags & NF_FORMAP))
+            fopen_flags2 = 'm';
+#endif
+
+        while (true) {
+            f = os_fopen(osfname, fopen_flags);
+            if (f || errno != EINVAL || !fopen_flags2)
+                break;
+
+            /* We got EINVAL but with 'm'; try again without 'm' */
+            fopen_flags2 = '\0';
+        }
+
+        os_free_filename(osfname);
+    }
+
+    if (!f && (flags & NF_FATAL))
+        nasm_fatalf(ERR_NOFILE, "unable to open input file: `%s': %s",
+                    filename, strerror(errno));
+
+    return f;
+}
+
+FILE *nasm_open_write(const char *filename, enum file_flags flags)
+{
+    FILE *f = NULL;
+    os_filename osfname;
+
+    osfname = os_mangle_filename(filename);
+    if (osfname) {
+        os_fopenflag fopen_flags3;
+
+        fopen_flags0 = 'w';
+        fopen_flags1 = (flags & NF_TEXT) ? 't' : 'b';
+        fopen_flags2 = '\0';
+
+        f = os_fopen(osfname, fopen_flags);
+        os_free_filename(osfname);
+    }
+
+    if (!f && (flags & NF_FATAL))
+        nasm_fatalf(ERR_NOFILE, "unable to open output file: `%s': %s",
+                    filename, strerror(errno));
+
+    switch (flags & NF_BUF_MASK) {
+    case NF_IONBF:
+        setvbuf(f, NULL, _IONBF, 0);
+        break;
+    case NF_IOLBF:
+        setvbuf(f, NULL, _IOLBF, 0);
+        break;
+    case NF_IOFBF:
+        setvbuf(f, NULL, _IOFBF, 0);
+        break;
+    default:
+        break;
+    }
+
+    return f;
+}
+
+/* The appropriate "rb" strings for os_fopen() */
+static const os_fopenflag fopenflags_rb3 = { 'r', 'b', 0 };
+
+/*
+ * Report the existence of a file
+ */
+bool nasm_file_exists(const char *filename)
+{
+#ifndef os_access
+    FILE *f;
+#endif
+    os_filename osfname;
+    bool exists;
+
+    osfname = os_mangle_filename(filename);
+    if (!osfname)
+        return false;
+
+#ifdef os_access
+    exists = os_access(osfname, R_OK) == 0;
+#else
+    f = os_fopen(osfname, fopenflags_rb);
+    exists = f != NULL;
+    if (f)
+        fclose(f);
+#endif
+
+    os_free_filename(osfname);
+    return exists;
+}
+
+/*
+ * Report the file size of an open file.  This MAY move the file pointer.
+ */
+off_t nasm_file_size(FILE *f)
+{
+    off_t where, end;
+    os_struct_stat st;
+
+    if (!os_fstat(fileno(f), &st) && S_ISREG(st.st_mode))
+        return st.st_size;
+
+    /* Do it the hard way... this tests for seekability */
+
+    if (fseeko(f, 0, SEEK_CUR))
+        goto fail;              /* Not seekable, don't even try */
+
+    where = ftello(f);
+    if (where == (off_t)-1)
+        goto fail;
+
+    if (fseeko(f, 0, SEEK_END))
+        goto fail;
+
+    end = ftello(f);
+    if (end == (off_t)-1)
+        goto fail;
+
+    /*
+     * Move the file pointer back. If this fails, this is probably
+     * not a plain file.
+     */
+    if (fseeko(f, where, SEEK_SET))
+        goto fail;
+
+    return end;
+
+fail:
+    return -1;
+}
+
+/*
+ * Report file size given pathname
+ */
+off_t nasm_file_size_by_path(const char *pathname)
+{
+    os_filename osfname;
+    off_t len = -1;
+    os_struct_stat st;
+    FILE *fp;
+
+    osfname = os_mangle_filename(pathname);
+
+    if (!os_stat(osfname, &st) && S_ISREG(st.st_mode))
+        len = st.st_size;
+
+    fp = os_fopen(osfname, fopenflags_rb);
+    if (fp) {
+        len = nasm_file_size(fp);
+        fclose(fp);
+    }
+
+    return len;
+}
+
+/*
+ * Report the timestamp on a file, returns true if successful
+ */
+bool nasm_file_time(time_t *t, const char *pathname)
+{
+#ifdef os_stat
+    os_filename osfname;
+    os_struct_stat st;
+    bool rv = false;
+
+    osfname = os_mangle_filename(pathname);
+    if (!osfname)
+        return false;
+
+    rv = !os_stat(osfname, &st);
+    *t = st.st_mtime;
+    os_free_filename(osfname);
+
+    return rv;
+#else
+    return false;               /* No idea how to do this on this OS */
+#endif
+}

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/file.h Added

@@ -0,0 +1,234 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2022 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#ifndef NASMLIB_FILE_H
+#define NASMLIB_FILE_H
+
+#include "compiler.h"
+#include "nasmlib.h"
+#include "error.h"
+
+#include <errno.h>
+
+#ifdef HAVE_FCNTL_H
+# include <fcntl.h>
+#endif
+#ifdef HAVE_SYS_TYPES_H
+#endif
+#ifdef HAVE_SYS_STAT_H
+# include <sys/stat.h>
+#endif
+#ifdef HAVE_IO_H
+# include <io.h>
+#endif
+#ifdef HAVE_UNISTD_H
+# include <unistd.h>
+#endif
+#ifdef HAVE_SYS_MMAN_H
+# include <sys/mman.h>
+#endif
+
+#ifndef R_OK
+# define R_OK 4                 /* Classic Unix constant, same on Windows */
+#endif
+
+/* Can we adjust the file size without actually writing all the bytes? */
+#ifdef HAVE__CHSIZE_S
+# define os_ftruncate(fd,size)	_chsize_s(fd,size)
+#elif defined(HAVE__CHSIZE)
+# define os_ftruncate(fd,size)	_chsize(fd,size)
+#elif defined(HAVE_FTRUNCATE)
+# define os_ftruncate(fd,size)	ftruncate(fd,size)
+#endif
+
+/*
+ * On Windows, we want to use _wfopen(), as fopen() has a much smaller limit
+ * on the path length that it supports. Furthermore, we want to prefix the
+ * path name with \\?\ in order to let the Windows kernel know that
+ * we are not limited to PATH_MAX characters. Thus, we wrap all the functions
+ * which take filenames...
+ */
+#ifdef _WIN32
+# include <wchar.h>
+typedef wchar_t *os_filename;
+typedef wchar_t  os_fopenflag;
+
+os_filename os_mangle_filename(const char *filename);
+static inline void os_free_filename(os_filename filename)
+{
+    nasm_free(filename);
+}
+
+# define os_fopen  _wfopen
+# define os_access _waccess
+
+/*
+ * On Win32/64, we have to use the _wstati64() function. Note that
+ * we can't use _wstat64() without depending on a needlessly new
+ * version os MSVCRT.
+ */
+
+typedef struct _stati64 os_struct_stat;
+
+# define os_stat  _wstati64
+# define os_fstat _fstati64
+
+/*
+ * On Win32/64, freopen() and _wfreopen() fails when the mode string
+ * is with the letter 'b' that represents to set binary mode. On
+ * POSIX operating systems, the 'b' is ignored, without failure.
+ */
+
+#include <io.h>
+#include <fcntl.h>
+
+static inline void os_set_binary_mode(FILE *f) {
+    int ret = _setmode(_fileno(f), _O_BINARY);
+
+    if (ret == -1) {
+        nasm_fatalf(ERR_NOFILE, "unable to open file: %s",
+                    strerror(errno));
+    }
+}
+
+#else  /* not _WIN32 */
+
+typedef const char *os_filename;
+typedef char os_fopenflag;
+
+static inline os_filename os_mangle_filename(const char *filename)
+{
+    return filename;
+}
+static inline void os_free_filename(os_filename filename)
+{
+    (void)filename;             /* Nothing to do */
+}
+
+static inline void os_set_binary_mode(FILE *f) {
+    (void)f;
+}
+
+# define os_fopen  fopen
+
+#if defined(HAVE_FACCESSAT) && defined(AT_EACCESS)
+static inline int os_access(os_filename pathname, int mode)
+{
+    return faccessat(AT_FDCWD, pathname, mode, AT_EACCESS);
+}
+# define os_access os_access
+#elif defined(HAVE_ACCESS)
+# define os_access access
+#endif
+
+#ifdef HAVE_STRUCT_STAT
+typedef struct stat os_struct_stat;
+# ifdef HAVE_STAT
+#  define os_stat stat
+# endif
+# ifdef HAVE_FSTAT
+#  define os_fstat fstat
+# endif
+#else
+struct dummy_struct_stat {
+    int st_mode;
+    int st_size;
+};
+typedef struct dummy_struct_stat os_struct_stat;
+#endif
+
+#endif  /* Not _WIN32 */
+
+#ifdef S_ISREG
+/* all good */
+#elif defined(HAVE_S_ISREG)
+/* exists, but not a macro */
+# define S_ISREG S_ISREG
+#elif defined(S_IFMT) && defined(S_IFREG)
+# define S_ISREG(m) (((m) & S_IFMT) == S_IFREG)
+#elif defined(_S_IFMT) && defined(_S_IFREG)
+# define S_ISREG(m) (((m) & _S_IFMT) == _S_IFREG)
+#endif
+
+#ifdef fileno
+/* all good */
+#elif defined(HAVE_FILENO)
+/* exists, but not a macro */
+# define fileno fileno
+#elif defined(_fileno) || defined(HAVE__FILENO)
+# define fileno _fileno
+#endif
+
+#ifndef S_ISREG
+# undef os_stat
+# undef os_fstat
+#endif
+
+/* Disable these functions if they don't support something we need */
+#ifndef fileno
+# undef os_fstat
+# undef os_ftruncate
+# undef HAVE_MMAP
+#endif
+
+/*
+ * If we don't have functional versions of these functions,
+ * stub them out so we don't need so many #ifndefs
+ */
+#ifndef os_stat
+static inline int os_stat(os_filename osfname, os_struct_stat *st)
+{
+    (void)osfname;
+    (void)st;
+    return -1;
+}
+#endif
+
+#ifndef os_fstat
+static inline int os_fstat(int fd, os_struct_stat *st)
+{
+    (void)fd;
+    (void)st;
+    return -1;
+}
+#endif
+
+#ifndef S_ISREG
+static inline bool S_ISREG(int m)
+{
+    (void)m;
+    return false;
+}
+#endif
+
+#endif /* NASMLIB_FILE_H */

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/filename.c Added

@@ -0,0 +1,63 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2017 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * nasmlib.c	library routines for the Netwide Assembler
+ */
+
+#include "compiler.h"
+#include "nasmlib.h"
+#include "error.h"
+
+/*
+ * Add/modify a filename extension, assumed to be a period-delimited
+ * field at the very end of the filename.  Returns a newly allocated
+ * string buffer.
+ */
+const char *filename_set_extension(const char *inname, const char *extension)
+{
+    const char *q = inname;
+    char *p;
+    size_t elen = strlen(extension);
+    size_t baselen;
+
+    q = strrchrnul(inname, '.');   /* find extension or end of string */
+    baselen = q - inname;
+
+    p = nasm_malloc(baselen + elen + 1);
+
+    memcpy(p, inname, baselen);
+    memcpy(p+baselen, extension, elen+1);
+
+    return p;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/hashtbl.c Added

@@ -0,0 +1,287 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2018 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * hashtbl.c
+ *
+ * Efficient dictionary hash table class.
+ */
+
+#include "compiler.h"
+
+#include "nasm.h"
+#include "hashtbl.h"
+
+#define HASH_MAX_LOAD   2	/* Higher = more memory-efficient, slower */
+#define HASH_INIT_SIZE  16      /* Initial size (power of 2, min 4) */
+
+#define hash_calc(key,keylen)   crc64b(CRC64_INIT, (key), (keylen))
+#define hash_calci(key,keylen)  crc64ib(CRC64_INIT, (key), (keylen))
+#define hash_max_load(size)     ((size) * (HASH_MAX_LOAD - 1) / HASH_MAX_LOAD)
+#define hash_expand(size)       ((size) << 1)
+#define hash_mask(size)         ((size) - 1)
+#define hash_pos(hash, mask)    ((hash) & (mask))
+#define hash_inc(hash, mask)    ((((hash) >> 32) & (mask)) | 1) /* always odd */
+#define hash_pos_next(pos, inc, mask) (((pos) + (inc)) & (mask))
+
+static void hash_init(struct hash_table *head)
+{
+    head->size     = HASH_INIT_SIZE;
+    head->load     = 0;
+    head->max_load = hash_max_load(head->size);
+    nasm_newn(head->table, head->size);
+}
+
+/*
+ * Find an entry in a hash table.  The key can be any binary object.
+ *
+ * On failure, if "insert" is non-NULL, store data in that structure
+ * which can be used to insert that node using hash_add().
+ * See hash_add() for constraints on the uses of the insert object.
+ *
+ * On success, return a pointer to the "data" element of the hash
+ * structure.
+ */
+void **hash_findb(struct hash_table *head, const void *key,
+                  size_t keylen, struct hash_insert *insert)
+{
+    struct hash_node *np = NULL;
+    struct hash_node *tbl = head->table;
+    uint64_t hash = hash_calc(key, keylen);
+    size_t mask = hash_mask(head->size);
+    size_t pos = hash_pos(hash, mask);
+    size_t inc = hash_inc(hash, mask);
+
+    if (likely(tbl)) {
+        while ((np = &tblpos)->key) {
+            if (hash == np->hash &&
+                keylen == np->keylen &&
+                !memcmp(key, np->key, keylen))
+                return &np->data;
+            pos = hash_pos_next(pos, inc, mask);
+        }
+    }
+
+    /* Not found.  Store info for insert if requested. */
+    if (insert) {
+        insert->node.hash = hash;
+        insert->node.key = key;
+        insert->node.keylen = keylen;
+        insert->node.data = NULL;
+        insert->head  = head;
+        insert->where = np;
+    }
+    return NULL;
+}
+
+/*
+ * Same as hash_findb(), but for a C string.
+ */
+void **hash_find(struct hash_table *head, const char *key,
+                 struct hash_insert *insert)
+{
+    return hash_findb(head, key, strlen(key)+1, insert);
+}
+
+/*
+ * Same as hash_findb(), but for case-insensitive hashing.
+ */
+void **hash_findib(struct hash_table *head, const void *key, size_t keylen,
+                   struct hash_insert *insert)
+{
+    struct hash_node *np = NULL;
+    struct hash_node *tbl = head->table;
+    uint64_t hash = hash_calci(key, keylen);
+    size_t mask = hash_mask(head->size);
+    size_t pos = hash_pos(hash, mask);
+    size_t inc = hash_inc(hash, mask);
+
+    if (likely(tbl)) {
+        while ((np = &tblpos)->key) {
+            if (hash == np->hash &&
+                keylen == np->keylen &&
+                !nasm_memicmp(key, np->key, keylen))
+                return &np->data;
+            pos = hash_pos_next(pos, inc, mask);
+        }
+    }
+
+    /* Not found.  Store info for insert if requested. */
+    if (insert) {
+        insert->node.hash = hash;
+        insert->node.key = key;
+        insert->node.keylen = keylen;
+        insert->node.data = NULL;
+        insert->head  = head;
+        insert->where = np;
+    }
+    return NULL;
+}
+
+/*
+ * Same as hash_find(), but for case-insensitive hashing.
+ */
+void **hash_findi(struct hash_table *head, const char *key,
+                  struct hash_insert *insert)
+{
+    return hash_findib(head, key, strlen(key)+1, insert);
+}
+
+/*
+ * Insert node.  Return a pointer to the "data" element of the newly
+ * created hash node.
+ *
+ * The following constraints apply:
+ * 1. A call to hash_add() invalidates all other outstanding hash_insert
+ *    objects; attempting to use them causes a wild pointer reference.
+ * 2. The key provided must exactly match the key passed to hash_find*(),
+ *    but it does not have to point to the same storage address. The key
+ *    buffer provided to this function must not be freed for the lifespan
+ *    of the hash. NULL will use the same pointer that was passed to
+ *    hash_find*().
+ */
+void **hash_add(struct hash_insert *insert, const void *key, void *data)
+{
+    struct hash_table *head  = insert->head;
+    struct hash_node *np = insert->where;
+
+    if (unlikely(!np)) {
+        hash_init(head);
+        /* The hash table is empty, so we don't need to iterate here */
+        np = &head->tablehash_pos(insert->node.hash, hash_mask(head->size));
+    }
+
+    /*
+     * Insert node.  We can always do this, even if we need to
+     * rebalance immediately after.
+     */
+    *np = insert->node;
+    np->data = data;
+    if (key)
+        np->key = key;
+
+    if (unlikely(++head->load > head->max_load)) {
+        /* Need to expand the table */
+        size_t newsize           = hash_expand(head->size);
+        struct hash_node *newtbl;
+        size_t mask              = hash_mask(newsize);
+        struct hash_node *op, *xp;
+        size_t i;
+
+        nasm_newn(newtbl, newsize);
+
+        /* Rebalance all the entries */
+        for (i = 0, op = head->table; i < head->size; i++, op++) {
+            if (op->key) {
+                size_t pos = hash_pos(op->hash, mask);
+                size_t inc = hash_inc(op->hash, mask);
+
+                while ((xp = &newtblpos)->key)
+                    pos = hash_pos_next(pos, inc, mask);
+
+                *xp = *op;
+                if (op == np)
+                    np = xp;
+            }
+        }
+        nasm_free(head->table);
+
+        head->table    = newtbl;
+        head->size     = newsize;
+        head->max_load = hash_max_load(newsize);
+    }
+
+    return &np->data;
+}
+
+/*
+ * Iterate over all members of a hash set. For the first call, iter
+ * should be as initialized by hash_iterator_init(). Returns a struct
+ * hash_node representing the current object, or NULL if we have
+ * reached the end of the hash table.
+ *
+ * Calling hash_add() will invalidate the iterator.
+ */
+const struct hash_node *hash_iterate(struct hash_iterator *iter)
+{
+    const struct hash_table *head = iter->head;
+    const struct hash_node *cp = iter->next;
+    const struct hash_node *ep = head->table + head->size;
+
+    /* For an empty table, cp == ep == NULL */
+    while (cp < ep) {
+        if (cp->key) {
+            iter->next = cp+1;
+            return cp;
+        }
+        cp++;
+    }
+
+    iter->next = head->table;
+    return NULL;
+}
+
+/*
+ * Free the hash itself.  Doesn't free the data elements; use
+ * hash_iterate() to do that first, if needed.  This function is normally
+ * used when the hash data entries are either freed separately, or
+ * compound objects which can't be freed in a single operation.
+ */
+void hash_free(struct hash_table *head)
+{
+    void *p = head->table;
+    memset(head, 0, sizeof *head);
+    nasm_free(p);
+}
+
+/*
+ * Frees the hash *and* all data elements.  This is applicable only in
+ * the case where the data element is a single allocation.  If the
+ * second argument is false, the key string is part of the data
+ * allocation or belongs to an allocation which will be freed
+ * separately, if it is true the keys are also freed.
+ */
+void hash_free_all(struct hash_table *head, bool free_keys)
+{
+    struct hash_iterator it;
+    const struct hash_node *np;
+
+    hash_for_each(head, it, np) {
+        if (np->data)
+            nasm_free(np->data);
+        if (free_keys && np->key)
+            nasm_free((void *)np->key);
+    }
+
+    hash_free(head);
+}

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/ilog2.c Added

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/md5c.c Added

@@ -0,0 +1,246 @@
+/*
+ * This code implements the MD5 message-digest algorithm.
+ * The algorithm is due to Ron Rivest.  This code was
+ * written by Colin Plumb in 1993, no copyright is claimed.
+ * This code is in the public domain; do with it what you wish.
+ *
+ * Equivalent code is available from RSA Data Security, Inc.
+ * This code has been tested against that, and is equivalent,
+ * except that you don't need to include two pages of legalese
+ * with every copy.
+ *
+ * To compute the message digest of a chunk of bytes, declare an
+ * MD5Context structure, pass it to MD5Init, call MD5Update as
+ * needed on buffers full of bytes, and then call MD5Final, which
+ * will fill a supplied 16-byte array with the digest.
+ */
+
+#include "md5.h"
+
+#ifdef WORDS_LITTLEENDIAN
+#define byteReverse(buf, len)	/* Nothing */
+#else
+static void byteReverse(unsigned char *buf, unsigned longs);
+
+/*
+ * Note: this code is harmless on little-endian machines.
+ */
+static void byteReverse(unsigned char *buf, unsigned longs)
+{
+    uint32_t t;
+    do {
+	t = (uint32_t) ((unsigned) buf3 << 8 | buf2) << 16 |
+	    ((unsigned) buf1 << 8 | buf0);
+	*(uint32_t *) buf = t;
+	buf += 4;
+    } while (--longs);
+}
+#endif
+
+/*
+ * Start MD5 accumulation.  Set bit count to 0 and buffer to mysterious
+ * initialization constants.
+ */
+void MD5Init(MD5_CTX *ctx)
+{
+    ctx->buf0 = 0x67452301;
+    ctx->buf1 = 0xefcdab89;
+    ctx->buf2 = 0x98badcfe;
+    ctx->buf3 = 0x10325476;
+
+    ctx->bits0 = 0;
+    ctx->bits1 = 0;
+}
+
+/*
+ * Update context to reflect the concatenation of another buffer full
+ * of bytes.
+ */
+void MD5Update(MD5_CTX *ctx, unsigned char const *buf, unsigned len)
+{
+    uint32_t t;
+
+    /* Update bitcount */
+
+    t = ctx->bits0;
+    if ((ctx->bits0 = t + ((uint32_t) len << 3)) < t)
+	ctx->bits1++;		/* Carry from low to high */
+    ctx->bits1 += len >> 29;
+
+    t = (t >> 3) & 0x3f;	/* Bytes already in shsInfo->data */
+
+    /* Handle any leading odd-sized chunks */
+
+    if (t) {
+	unsigned char *p = (unsigned char *) ctx->in + t;
+
+	t = 64 - t;
+	if (len < t) {
+	    memcpy(p, buf, len);
+	    return;
+	}
+	memcpy(p, buf, t);
+	byteReverse(ctx->in, 16);
+	MD5Transform(ctx->buf, (uint32_t *) ctx->in);
+	buf += t;
+	len -= t;
+    }
+    /* Process data in 64-byte chunks */
+
+    while (len >= 64) {
+	memcpy(ctx->in, buf, 64);
+	byteReverse(ctx->in, 16);
+	MD5Transform(ctx->buf, (uint32_t *) ctx->in);
+	buf += 64;
+	len -= 64;
+    }
+
+    /* Handle any remaining bytes of data. */
+
+    memcpy(ctx->in, buf, len);
+}
+
+/*
+ * Final wrapup - pad to 64-byte boundary with the bit pattern 
+ * 1 0* (64-bit count of bits processed, MSB-first)
+ */
+void MD5Final(unsigned char digest16, MD5_CTX *ctx)
+{
+    unsigned count;
+    unsigned char *p;
+
+    /* Compute number of bytes mod 64 */
+    count = (ctx->bits0 >> 3) & 0x3F;
+
+    /* Set the first char of padding to 0x80.  This is safe since there is
+       always at least one byte free */
+    p = ctx->in + count;
+    *p++ = 0x80;
+
+    /* Bytes of padding needed to make 64 bytes */
+    count = 64 - 1 - count;
+
+    /* Pad out to 56 mod 64 */
+    if (count < 8) {
+	/* Two lots of padding:  Pad the first block to 64 bytes */
+	memset(p, 0, count);
+	byteReverse(ctx->in, 16);
+	MD5Transform(ctx->buf, (uint32_t *) ctx->in);
+
+	/* Now fill the next block with 56 bytes */
+	memset(ctx->in, 0, 56);
+    } else {
+	/* Pad block to 56 bytes */
+	memset(p, 0, count - 8);
+    }
+    byteReverse(ctx->in, 14);
+
+    /* Append length in bits and transform */
+    ((uint32_t *) ctx->in)14 = ctx->bits0;
+    ((uint32_t *) ctx->in)15 = ctx->bits1;
+
+    MD5Transform(ctx->buf, (uint32_t *) ctx->in);
+    byteReverse((unsigned char *) ctx->buf, 4);
+    memcpy(digest, ctx->buf, 16);
+    memset((char *) ctx, 0, sizeof(*ctx));	/* In case it's sensitive */
+}
+
+/* The four core functions - F1 is optimized somewhat */
+
+/* #define F1(x, y, z) (x & y | ~x & z) */
+#define F1(x, y, z) (z ^ (x & (y ^ z)))
+#define F2(x, y, z) F1(z, x, y)
+#define F3(x, y, z) (x ^ y ^ z)
+#define F4(x, y, z) (y ^ (x | ~z))
+
+/* This is the central step in the MD5 algorithm. */
+#define MD5STEP(f, w, x, y, z, data, s) \
+	( w += f(x, y, z) + data,  w = w<<s | w>>(32-s),  w += x )
+
+/*
+ * The core of the MD5 algorithm, this alters an existing MD5 hash to
+ * reflect the addition of 16 longwords of new data.  MD5Update blocks
+ * the data and converts bytes into longwords for this routine.
+ */
+void MD5Transform(uint32_t buf4, uint32_t const in16)
+{
+    register uint32_t a, b, c, d;
+
+    a = buf0;
+    b = buf1;
+    c = buf2;
+    d = buf3;
+
+    MD5STEP(F1, a, b, c, d, in0 + 0xd76aa478, 7);
+    MD5STEP(F1, d, a, b, c, in1 + 0xe8c7b756, 12);
+    MD5STEP(F1, c, d, a, b, in2 + 0x242070db, 17);
+    MD5STEP(F1, b, c, d, a, in3 + 0xc1bdceee, 22);
+    MD5STEP(F1, a, b, c, d, in4 + 0xf57c0faf, 7);
+    MD5STEP(F1, d, a, b, c, in5 + 0x4787c62a, 12);
+    MD5STEP(F1, c, d, a, b, in6 + 0xa8304613, 17);
+    MD5STEP(F1, b, c, d, a, in7 + 0xfd469501, 22);
+    MD5STEP(F1, a, b, c, d, in8 + 0x698098d8, 7);
+    MD5STEP(F1, d, a, b, c, in9 + 0x8b44f7af, 12);
+    MD5STEP(F1, c, d, a, b, in10 + 0xffff5bb1, 17);
+    MD5STEP(F1, b, c, d, a, in11 + 0x895cd7be, 22);
+    MD5STEP(F1, a, b, c, d, in12 + 0x6b901122, 7);
+    MD5STEP(F1, d, a, b, c, in13 + 0xfd987193, 12);
+    MD5STEP(F1, c, d, a, b, in14 + 0xa679438e, 17);
+    MD5STEP(F1, b, c, d, a, in15 + 0x49b40821, 22);
+
+    MD5STEP(F2, a, b, c, d, in1 + 0xf61e2562, 5);
+    MD5STEP(F2, d, a, b, c, in6 + 0xc040b340, 9);
+    MD5STEP(F2, c, d, a, b, in11 + 0x265e5a51, 14);
+    MD5STEP(F2, b, c, d, a, in0 + 0xe9b6c7aa, 20);
+    MD5STEP(F2, a, b, c, d, in5 + 0xd62f105d, 5);
+    MD5STEP(F2, d, a, b, c, in10 + 0x02441453, 9);
+    MD5STEP(F2, c, d, a, b, in15 + 0xd8a1e681, 14);
+    MD5STEP(F2, b, c, d, a, in4 + 0xe7d3fbc8, 20);
+    MD5STEP(F2, a, b, c, d, in9 + 0x21e1cde6, 5);
+    MD5STEP(F2, d, a, b, c, in14 + 0xc33707d6, 9);
+    MD5STEP(F2, c, d, a, b, in3 + 0xf4d50d87, 14);
+    MD5STEP(F2, b, c, d, a, in8 + 0x455a14ed, 20);
+    MD5STEP(F2, a, b, c, d, in13 + 0xa9e3e905, 5);
+    MD5STEP(F2, d, a, b, c, in2 + 0xfcefa3f8, 9);
+    MD5STEP(F2, c, d, a, b, in7 + 0x676f02d9, 14);
+    MD5STEP(F2, b, c, d, a, in12 + 0x8d2a4c8a, 20);
+
+    MD5STEP(F3, a, b, c, d, in5 + 0xfffa3942, 4);
+    MD5STEP(F3, d, a, b, c, in8 + 0x8771f681, 11);
+    MD5STEP(F3, c, d, a, b, in11 + 0x6d9d6122, 16);
+    MD5STEP(F3, b, c, d, a, in14 + 0xfde5380c, 23);
+    MD5STEP(F3, a, b, c, d, in1 + 0xa4beea44, 4);
+    MD5STEP(F3, d, a, b, c, in4 + 0x4bdecfa9, 11);
+    MD5STEP(F3, c, d, a, b, in7 + 0xf6bb4b60, 16);
+    MD5STEP(F3, b, c, d, a, in10 + 0xbebfbc70, 23);
+    MD5STEP(F3, a, b, c, d, in13 + 0x289b7ec6, 4);
+    MD5STEP(F3, d, a, b, c, in0 + 0xeaa127fa, 11);
+    MD5STEP(F3, c, d, a, b, in3 + 0xd4ef3085, 16);
+    MD5STEP(F3, b, c, d, a, in6 + 0x04881d05, 23);
+    MD5STEP(F3, a, b, c, d, in9 + 0xd9d4d039, 4);
+    MD5STEP(F3, d, a, b, c, in12 + 0xe6db99e5, 11);
+    MD5STEP(F3, c, d, a, b, in15 + 0x1fa27cf8, 16);
+    MD5STEP(F3, b, c, d, a, in2 + 0xc4ac5665, 23);
+
+    MD5STEP(F4, a, b, c, d, in0 + 0xf4292244, 6);
+    MD5STEP(F4, d, a, b, c, in7 + 0x432aff97, 10);
+    MD5STEP(F4, c, d, a, b, in14 + 0xab9423a7, 15);
+    MD5STEP(F4, b, c, d, a, in5 + 0xfc93a039, 21);
+    MD5STEP(F4, a, b, c, d, in12 + 0x655b59c3, 6);
+    MD5STEP(F4, d, a, b, c, in3 + 0x8f0ccc92, 10);
+    MD5STEP(F4, c, d, a, b, in10 + 0xffeff47d, 15);
+    MD5STEP(F4, b, c, d, a, in1 + 0x85845dd1, 21);
+    MD5STEP(F4, a, b, c, d, in8 + 0x6fa87e4f, 6);
+    MD5STEP(F4, d, a, b, c, in15 + 0xfe2ce6e0, 10);
+    MD5STEP(F4, c, d, a, b, in6 + 0xa3014314, 15);
+    MD5STEP(F4, b, c, d, a, in13 + 0x4e0811a1, 21);
+    MD5STEP(F4, a, b, c, d, in4 + 0xf7537e82, 6);
+    MD5STEP(F4, d, a, b, c, in11 + 0xbd3af235, 10);
+    MD5STEP(F4, c, d, a, b, in2 + 0x2ad7d2bb, 15);
+    MD5STEP(F4, b, c, d, a, in9 + 0xeb86d391, 21);
+
+    buf0 += a;
+    buf1 += b;
+    buf2 += c;
+    buf3 += d;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/mmap.c Added

@@ -0,0 +1,139 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2017 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#include "file.h"
+
+/* ----------------------------------------------------------------------- *
+ *   Unix-style memory mapping, using mmap().
+ * ----------------------------------------------------------------------- */
+#if defined(HAVE_FILENO) && defined(HAVE_MMAP)
+
+/*
+ * System page size
+ */
+
+/* File scope since not all compilers like static data in inline functions */
+static size_t nasm_pagemask;
+
+static size_t get_pagemask(void)
+{
+    size_t ps = 0;
+
+# if defined(HAVE_SYSCONF) && defined(_SC_PAGESIZE)
+    ps = sysconf(_SC_PAGESIZE);
+# elif defined(HAVE_GETPAGESIZE)
+    ps = getpagesize();
+# elif defined(PAGE_SIZE)
+    ps = PAGE_SIZE;
+# endif
+
+    nasm_pagemask = ps = is_power2(ps) ? (ps - 1) : 0;
+    return ps;
+}
+
+static inline size_t pagemask(void)
+{
+    size_t pm = nasm_pagemask;
+
+    if (unlikely(!pm))
+        return get_pagemask();
+
+    return pm;
+}
+
+/*
+ * Try to map an input file into memory
+ */
+const void *nasm_map_file(FILE *fp, off_t start, off_t len)
+{
+    const char *p;
+    off_t  astart;              /* Aligned start */
+    size_t salign;              /* Amount of start adjustment */
+    size_t alen;                /* Aligned length */
+    const size_t page_mask = pagemask();
+
+    if (unlikely(!page_mask))
+        return NULL;            /* Page size undefined? */
+
+    if (unlikely(!len))
+        return NULL;            /* Mapping nothing... */
+
+    if (unlikely(len != (off_t)(size_t)len))
+        return NULL;            /* Address space insufficient */
+
+    astart = start & ~(off_t)page_mask;
+    salign = start - astart;
+    alen = (len + salign + page_mask) & ~page_mask;
+
+    p = mmap(NULL, alen, PROT_READ, MAP_SHARED, fileno(fp), astart);
+    return unlikely(p == MAP_FAILED) ? NULL : p + salign;
+}
+
+/*
+ * Unmap an input file
+ */
+void nasm_unmap_file(const void *p, size_t len)
+{
+    const size_t page_mask = pagemask();
+    uintptr_t astart;
+    size_t salign;
+    size_t alen;
+
+    if (unlikely(!page_mask))
+        return;
+
+    astart = (uintptr_t)p & ~(uintptr_t)page_mask;
+    salign = (uintptr_t)p - astart;
+    alen = (len + salign + page_mask) & ~page_mask;
+
+    munmap((void *)astart, alen);
+}
+
+/* ----------------------------------------------------------------------- *
+ *   No memory map support at all
+ *   XXX: Add a section with Windows support
+ * ----------------------------------------------------------------------- */
+#else
+
+const void *nasm_map_file(FILE *fp, off_t start, off_t len)
+{
+    (void)fp; (void)start; (void)len;
+    return NULL;
+}
+
+void nasm_unmap_file(const void *p, size_t len)
+{
+    (void)p; (void)len;
+}
+
+#endif

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/nctype.c Added

@@ -0,0 +1,116 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2018 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#include "nctype.h"
+#include <ctype.h>
+
+/*
+ * Table of tolower() results.  This avoids function calls
+ * on some platforms.
+ */
+unsigned char nasm_tolower_tab256;
+
+static void tolower_tab_init(void)
+{
+    int i;
+
+    for (i = 0; i < 256; i++)
+	nasm_tolower_tabi = tolower(i);
+}
+
+/*
+ * Table of character type flags; some are simply <ctype.h>,
+ * some are NASM-specific.
+ */
+
+uint16_t nasm_ctype_tab256;
+
+#if !defined(HAVE_ISCNTRL) && !defined(iscntrl)
+# define iscntrl(x) ((x) < 32)
+#endif
+#if !defined(HAVE_ISASCII) && !defined(isascii)
+# define isascii(x) ((x) < 128)
+#endif
+
+static void ctype_tab_init(void)
+{
+    int i;
+
+    for (i = 0; i < 256; i++) {
+        enum nasm_ctype ct = 0;
+
+        if (iscntrl(i))
+            ct |= NCT_CTRL;
+
+        if (isascii(i))
+            ct |= NCT_ASCII;
+
+        if (isspace(i) && i != '\n')
+            ct |= NCT_SPACE;
+
+        if (isalpha(i)) {
+            ct |= (nasm_tolower(i) == i) ? NCT_LOWER : NCT_UPPER;
+            ct |= NCT_ID|NCT_IDSTART;
+        }
+
+        if (isdigit(i))
+            ct |= NCT_DIGIT|NCT_ID;
+
+        if (isxdigit(i))
+            ct |= NCT_HEX;
+
+        /* Non-ASCII character, but no ctype returned (e.g. Unicode) */
+        if (!ct && !ispunct(i))
+            ct |= NCT_ID|NCT_IDSTART;
+
+        nasm_ctype_tabi = ct;
+    }
+
+    nasm_ctype_tab'-'  |= NCT_MINUS;
+    nasm_ctype_tab'$'  |= NCT_DOLLAR|NCT_ID;
+    nasm_ctype_tab'_'  |= NCT_UNDER|NCT_ID|NCT_IDSTART;
+    nasm_ctype_tab'.'  |= NCT_ID|NCT_IDSTART;
+    nasm_ctype_tab'@'  |= NCT_ID|NCT_IDSTART;
+    nasm_ctype_tab'?'  |= NCT_ID|NCT_IDSTART;
+    nasm_ctype_tab'#'  |= NCT_ID;
+    nasm_ctype_tab'~'  |= NCT_ID;
+    nasm_ctype_tab'\'' |= NCT_QUOTE;
+    nasm_ctype_tab'\"' |= NCT_QUOTE;
+    nasm_ctype_tab'`'  |= NCT_QUOTE;
+}
+
+void nasm_ctype_init(void)
+{
+    tolower_tab_init();
+    ctype_tab_init();
+}

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/numstr.c Added

@@ -0,0 +1,81 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 2023 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#include "nasmlib.h"
+
+/*
+ * Produce an unsigned integer string from a number with a specified
+ * base, digits and signedness.
+ */
+int numstr(char *buf, size_t buflen, uint64_t n,
+           int digits, unsigned int base, bool ucase)
+{
+    static const char digit_chars2NUMSTR_MAXBASE+1 =
+    {
+        /* Lower case version */
+        "0123456789"
+        "abcdefghijklmnopqrstuvwxyz"
+        "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
+        "@_",
+
+        /* Upper case version */
+        "0123456789"
+        "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
+        "abcdefghijklmnopqrstuvwxyz"
+        "@_"
+    };
+    const char * const dchars = digit_charsucase;
+    bool moredigits = digits <= 0;
+    char *p;
+    int len;
+
+    if (base < 2 || base > NUMSTR_MAXBASE)
+        return -1;
+
+    if (moredigits)
+        digits = -digits;
+
+    p = buf + buflen;
+    *--p = '\0';
+
+    while (p > buf && (digits-- > 0 || (moredigits && n))) {
+        *--p = dcharsn % base;
+        n /= base;
+    }
+
+    len = buflen - (p - buf);   /* Including final null */
+    if (p != buf)
+        memmove(buf, p, len);
+
+    return len - 1;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/path.c Added

@@ -0,0 +1,186 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 2017 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * path.c - host operating system specific pathname manipulation functions
+ *
+ * This file is inherently nonportable ... please help adjusting it to
+ * any new platforms that may be necessary.
+ */
+
+#include "compiler.h"
+#include "nasmlib.h"
+#include "error.h"
+
+#if defined(__MSDOS__) || defined(__DOS__) || \
+    defined(__WINDOWS__) || defined(_Windows) ||                        \
+    defined(__OS2__) || defined(_WIN16) || defined(WIN32) || defined(_WIN32)
+/* MS-DOS/Windows and like operating systems */
+# define separators "/\\:"
+# define cleandirend "/\\"
+# define catsep '\\'
+# define leaveonclean 2         /* Leave \\ at the start alone */
+# define curdir "."
+#elif defined(unix) || defined(__unix) || defined(__unix__) ||   \
+    defined(__UNIX__) || defined(__Unix__) || \
+    defined(__MACH__) || defined(__BEOS__)
+/* Unix and Unix-like operating systems and others using
+ * the equivalent syntax (slashes as only separators, no concept of volume)
+ *
+ * This must come after the __MSDOS__ section, since it seems that at
+ * least DJGPP defines __unix__ despite not being a Unix environment at all.
+ */
+# define separators "/"
+# define cleandirend "/"
+# define catsep '/'
+# define leaveonclean 1
+# define curdir "."
+#elif defined(Macintosh) || defined(macintosh)
+/* MacOS classic */
+# define separators ":"
+# define curdir ":"
+# define catsep ':'
+# define cleandirend ":"
+# define leaveonclean 0
+# define leave_leading 1
+#elif defined(__VMS)
+/* VMS *
+ *
+ * VMS filenames may have ;version at the end.  Assume we should count that
+ * as part of the filename anyway.
+ */
+# define separators ":"
+# define curdir ""
+#else
+/* No idea what to do here, do nothing.  Feel free to add new ones. */
+# define curdir ""
+#endif
+
+/*
+ * This is an inline, because most compilers can greatly simplify this
+ * for a fixed string, like we have here.
+ */
+static inline bool ismatch(const char *charset, char ch)
+{
+    const char *p;
+
+    for (p = charset; *p; p++) {
+        if (ch == *p)
+            return true;
+    }
+
+    return false;
+}
+
+static const char *first_filename_char(const char *path)
+{
+#ifdef separators
+    const char *p = path + strlen(path);
+
+    while (p > path) {
+        if (ismatch(separators, p-1))
+            return p;
+        p--;
+    }
+
+    return p;
+#else
+    return path;
+#endif
+}
+
+/* Return the filename portion of a PATH as a new string */
+char *nasm_basename(const char *path)
+{
+    return nasm_strdup(first_filename_char(path));
+}
+
+/* Return the directory name portion of a PATH as a new string */
+char *nasm_dirname(const char *path)
+{
+    const char *p = first_filename_char(path);
+    const char *p0 = p;
+    (void)p0;                   /* Don't warn if unused */
+
+    if (p == path)
+        return nasm_strdup(curdir);
+
+#ifdef cleandirend
+    while (p > path+leaveonclean) {
+        if (ismatch(cleandirend, p-1))
+            break;
+        p--;
+    }
+#endif
+
+#ifdef leave_leading
+    /* If the directory contained ONLY separators, leave as-is */
+    if (p == path+leaveonclean)
+        p = p0;
+#endif
+
+    return nasm_strndup(path, p-path);
+}
+
+/*
+ * Concatenate a directory path and a filename.  Note that this function
+ * currently does NOT handle the case where file itself contains
+ * directory components (except on Unix platforms, because it is trivial.)
+ */
+char *nasm_catfile(const char *dir, const char *file)
+{
+#ifndef catsep
+    return nasm_strcat(dir, file);
+#else
+    size_t dl = strlen(dir);
+    size_t fl = strlen(file);
+    char *p, *pp;
+    bool dosep = true;
+
+    if (!dl || ismatch(separators, dirdl-1)) {
+        /* No separator necessary */
+        dosep = false;
+    }
+
+    p = pp = nasm_malloc(dl + fl + dosep + 1);
+
+    memcpy(pp, dir, dl);
+    pp += dl;
+    if (dosep)
+        *pp++ = catsep;
+
+    memcpy(pp, file, fl+1);
+
+    return p;
+#endif
+}

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/perfhash.c Added

@@ -0,0 +1,55 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 2017 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#include "perfhash.h"
+#include "hashtbl.h"            /* For crc64i() */
+
+int perfhash_find(const struct perfect_hash *hash, const char *str)
+{
+    uint32_t k1, k2;
+    uint64_t crc;
+    uint16_t ix;
+
+    crc = crc64i(hash->crcinit, str);
+    k1 = (uint32_t)crc & hash->hashmask;
+    k2 = ((uint32_t)(crc >> 32) & hash->hashmask) + 1;
+
+    ix = hash->hashvalsk1 + hash->hashvalsk2;
+
+    if (ix >= hash->tbllen ||
+        !hash->stringsix ||
+        nasm_stricmp(str, hash->stringsix))
+        return hash->errval;
+
+    return hash->tbloffs + ix;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/perfhash.pl Added

@@ -0,0 +1,357 @@
+#!/usr/bin/perl
+## --------------------------------------------------------------------------
+##
+##   Copyright 1996-2017 The NASM Authors - All Rights Reserved
+##   See the file AUTHORS included with the NASM distribution for
+##   the specific copyright holders.
+##
+##   Redistribution and use in source and binary forms, with or without
+##   modification, are permitted provided that the following
+##   conditions are met:
+##
+##   * Redistributions of source code must retain the above copyright
+##     notice, this list of conditions and the following disclaimer.
+##   * Redistributions in binary form must reproduce the above
+##     copyright notice, this list of conditions and the following
+##     disclaimer in the documentation and/or other materials provided
+##     with the distribution.
+##
+##     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+##     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+##     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+##     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+##     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+##     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+##     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+##     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+##     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+##     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+##     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+##     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+##     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+##
+## --------------------------------------------------------------------------
+
+#
+# Generate a perfect hash for general case-insensitive string-to-enum
+# lookup.  This generates an enum and the corresponding hash, but
+# relies on a common function to parse the hash.
+#
+# Usage:
+#      perfhash.pl h foohash.dat foohash.h (to generate C header)
+#      perfhash.pl c foohash.dat foohash.c (to generate C source)
+#
+
+use strict;
+
+require 'phash.ph';
+
+sub basename($) {
+    my($s) = @_;
+    $s =~ s/^.*^-:alnum:_\.//;	# Remove path component as best we can
+    return $s;
+}
+
+sub intval($) {
+    my($s) = @_;
+
+    if ($s =~ /^0/) {
+	return oct($s);		# Handles octal or hexadecimal
+    } elsif ($s =~ /^\-(0.*)$/) {
+	return -oct($1);
+    } else {
+	return $s + 0;		# Forcibly convert to number
+    }
+}
+
+my($output, $infile, $outfile) = @ARGV;
+my $me = basename($0);
+
+# The following special things are allowed in the input file:
+# #<space> or ; begins a comment
+# #include filename
+# #name str
+#    The name of the hash
+# #prefix str
+#    Defines the prefix before enum
+# #guard str
+#    Defines the header guard string
+# #special str = value
+#    Generate an enum value without a corresponding string; not capitalized.
+# #header str
+#    Indicates the name of the .h file to include from the .c file
+# #errval str
+#    Define the value to be returned if a string is not found
+#    (defaults to -1).  This can be any constant C expression,
+#    including one of the enum values.
+#
+# Regular lines are just str = value
+#
+# Enumeration is generated in the order listed in the file, just as in C
+# specifying a value causes the values to increase by 1 from that point on
+# unless specified.
+
+my $name;
+my $prefix;
+my $guard;
+my $hfile;
+
+my %strings = ();
+my %specials = ();
+my $next_value = 0;
+my $errval = '-1';
+
+my @incstack =  ();
+my @filenames = ($infile);
+my @linenums =  (0);
+my $dd = undef;
+my $err = 0;
+
+while (scalar(@filenames)) {
+    if (!defined($dd)) {
+	open($dd, '<', $filenames-1)
+	    or die "$0: cannot open: $filenames-1: $!\n";
+    }
+
+    my $line = <$dd>;
+    if (!defined($line)) {
+	close($dd);
+	$dd = pop @incstack;
+	pop @filenames;
+	pop @linenums;
+	next;
+    }
+
+    $linenums-1++;
+
+    chomp $line;
+    $line =~ s/\s*(|\;.*|\#\s.*|\#)$//; # Remove comments and trailing space
+    $line =~ s/^\s+//;			# Remove leading space
+    if ($line eq '') {
+	# Do nothing
+    } elsif ($line =~ /^\#name\s+(:alnum:_+)$/) {
+	$name = $1;
+    } elsif ($line =~ /^\#prefix\s+(:alnum:_+)$/) {
+	$prefix = $1;
+    } elsif ($line =~ /^\#guard\s+(:alnum:_+)$/) {
+	$guard = $1;
+    } elsif ($line =~ /^\#errval\s+(\S.*)$/) {
+	$errval = $1;
+    } elsif ($line =~ /^\#header\s+(\"(.+)\"|\S+)$/) {
+	$hfile = ($2 ne '') ? $2 : $1;
+    } elsif ($line =~ /^\#include\s+(\"(.+)\"|\S+)$/) {
+	push @incstack, $dd;
+	push @filenames, (($2 ne '') ? $2 : $1);
+	push @linenums, 0;
+	undef $dd;		# Open a new file
+    } elsif ($line =~ /^(|\#special\s+)(\S+)\s*(|=\s*(\-?(0Xx:xdigit:+|00-7*|0-9+)))$/) {
+	$next_value = intval($4) if ($4 ne '');
+	if ($1 eq '') {
+	    $strings{$2} = $next_value++;
+	} else {
+	    $specials{$2} = $next_value++;
+	}
+    } else {
+	printf STDERR "%s:%d:%s syntax error: \"%s\"\n",
+	    $filenames-1, $linenums-1,
+	    (scalar(@incstack) == 1) ? '' : "(from $infile)", $line;
+	$err++;
+    }
+}
+
+exit 1 if ($err);
+
+# Default name, prefix, and header guard name
+if (!defined($name)) {
+    $name = basename($infile);
+    $name =~ s/(\..*)$//;		# Strip extension, if any
+}
+if (!defined($prefix)) {
+    $prefix = "\U${name}\E_";
+}
+if (!defined($hfile)) {
+    $hfile = $outfile;
+    $hfile =~ s/\.c$/\.h/;
+}
+if (!defined($guard)) {
+    $guard = basename($hfile);
+    $guard =~ s/^:alnum:_/_/g;
+    $guard =~ s/__+/_/g;
+    $guard =  "\U$guard";
+}
+
+# Verify input.  We can't have more than one constant with the same
+# enumeration value, nor the same enumeration string.
+if (scalar(keys(%strings)) == 0) {
+    die "$0: $infile: no strings to hash!\n";
+}
+
+my %enums;
+my %enumvals;
+my %stringbyval;
+my $max_enum;
+my $tbllen = 0;
+my $tbloffs;
+foreach my $s (keys(%strings)) {
+    my $es = "${prefix}\U${s}";
+    $es =~ s/^:alnum:_/_/g;
+    $es =~ s/__+/_/g;
+    my $v = $strings{$s};
+    $stringbyval{$v} = $s;
+    if (defined($enums{$es})) {
+	printf STDERR "%s: string \"%s\" duplicates existing enum %s\n",
+	    $infile, $s, $es;
+	$err++;
+    } else {
+	$enums{$es} = $v;
+    }
+    if (defined($enumvals{$v})) {
+	printf STDERR "%s: string \"%s\" duplicates existing enum constant %d\n", $v;
+	$err++;
+    } else {
+	$enumvals{$v} = $es;
+    }
+    $max_enum = $v if (!defined($max_enum) || $v > $max_enum);
+    $tbloffs = $v if (!defined($tbloffs) || $v < $tbloffs);
+    $tbllen = $v+1 if (!defined($tbllen) || $v >= $tbllen);
+}
+foreach my $s (keys(%specials)) {
+    my $es = $prefix . $s;	# No string mangling here
+    my $v = $specials{$s};
+    if (defined($enums{$es})) {
+	printf STDERR "%s: special \"%s\" duplicates existing enum %s\n",
+	    $infile, $s, $es;
+	$err++;
+    } else {
+	$enums{$es} = $v;
+    }
+    if (defined ($enumvals{$v})) {
+	printf STDERR "%s: special \"%s\" duplicates existing enum constant %d\n", $v;
+	$err++;
+    } else {
+	$enumvals{$v} = $es;
+    }
+    $max_enum = $v if ($v > $max_enum || !defined($max_enum));
+}
+
+$tbllen -= $tbloffs;
+if ($tbllen > 65536) {
+    printf STDERR "%s: span of enumeration values too large\n";
+    $err++;
+}
+
+exit 1 if ($err);
+
+open(F, '>', $outfile)
+    or die "$0: cannot create: ${outfile}: $!\n";
+
+if ($output eq 'h') {
+    print F "/*\n";
+    print F " * This file is generated from $infile\n";
+    print F " * by $me; do not edit.\n";
+    print F " */\n";
+    print F "\n";
+
+    print F "#ifndef $guard\n";
+    print F "#define $guard 1\n\n";
+    print F "#include \"perfhash.h\"\n\n";
+
+    my $c = '{';
+    $next_value = 0;
+    print F "enum ${name} ";
+    foreach my $v (sort { $a <=> $b } keys(%enumvals)) {
+	my $s = $enumvals{$v};
+	print F "$c\n    $s";
+	print F " = $v" if ($v != $next_value);
+	$next_value = $v + 1;
+	$c = ',';
+    }
+    print F "\n};\n\n";
+    print F "extern const struct perfect_hash ${name}_hash;\n";
+    printf F "extern const char * const %s_tbl%d;\n", $name, $tbllen;
+
+    print F "\nstatic inline enum ${name} ${name}_find(const char *str)\n";
+    print F "{\n";
+    print F "    return perfhash_find(&${name}_hash, str);\n";
+    print F "}\n";
+
+    print F "\nstatic inline const char * ${name}_name(enum ${name} x)\n";
+    print F "{\n";
+    printf F  "    size_t ix = (size_t)x - (%d);\n", $tbloffs;
+    printf F "    if (ix >= %d)\n", $tbllen;
+    print F  "        return NULL;\n";
+    print F  "    return ${name}_tblix;\n";
+    print F  "}\n";
+
+    print F "\nstatic inline const char * ${name}_dname(enum ${name} x)\n";
+    print F "{\n";
+    print F "    const char *y = ${name}_name(x);\n";
+    print F "    return y ? y : invalid_enum_str(x);\n";
+    print F "}\n";
+
+    print F "\n#endif /* $guard */\n";
+} elsif ($output eq 'c') {
+    # The strings we hash must all be lower case, even if the string
+    # table doesn't contain them that way.
+
+    my %lcstrings;
+    foreach my $s (keys(%strings)) {
+	my $ls = "\L$s";
+	if (defined($lcstrings{$ls})) {
+	    printf STDERR "%s: strings \"%s\" and \"%s\" differ only in case\n",
+		$infile, $s, $strings{$lcstrings{$s}};
+	} else {
+	    $lcstrings{$ls} = $strings{$s} - $tbloffs;
+	}
+    }
+
+    my @hashinfo = gen_perfect_hash(\%lcstrings);
+    if (!@hashinfo) {
+	die "$0: no hash found\n";
+    }
+
+    # Paranoia...
+    verify_hash_table(\%lcstrings, \@hashinfo);
+
+    my ($n, $sv, $g) = @hashinfo;
+
+    die if ($n & ($n-1));
+
+    print F "/*\n";
+    print F " * This file is generated from $infile\n";
+    print F " * by $me; do not edit.\n";
+    print F " */\n";
+    print F "\n";
+
+    print F "#include \"$hfile\"\n\n";
+
+    printf F "const char * const %s_tbl%d = ", $name, $tbllen;
+    my $c = '{';
+    for (my $i = $tbloffs; $i < $tbloffs+$tbllen; $i++) {
+	printf F "%s\n    %s", $c,
+	    defined($stringbyval{$i}) ? '"'.$stringbyval{$i}.'"' : 'NULL';
+	$c = ',';
+    }
+    print F "\n};\n\n";
+
+    print F "#define INVALID_HASH_ENTRY (65536/3)\n\n";
+
+    printf F "static const int16_t %s_hashvals%d = ", $name, $n*2;
+    $c = '{';
+    for (my $i = 0; $i < $n*2; $i++) {
+	my $h = ${$g}$i;
+	print F "$c\n    ", defined($h) ? $h : 'INVALID_HASH_ENTRY';
+	$c = ',';
+    }
+    print F "\n};\n\n";
+
+    print F "const struct perfect_hash ${name}_hash = {\n";
+    printf F "    UINT64_C(0x%08x%08x),\n", $$sv0, $$sv1; # crcinit
+    printf F "    UINT32_C(0x%x),\n", ($n-1) << 1;	      # hashmask
+    printf F "    UINT32_C(%u),\n", $tbllen;		      # tbllen
+    printf F "    %d,\n", $tbloffs;			      # tbloffs
+    printf F "    (%s),\n", $errval;			      # errval
+    printf F "    ${name}_hashvals,\n";			      # hashvals
+    printf F "    ${name}_tbl\n";			      # strings
+    print F "};\n";
+}

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/raa.c Added

@@ -0,0 +1,198 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2018 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#include "nasmlib.h"
+#include "raa.h"
+#include "ilog2.h"
+
+/*
+ * Routines to manage a dynamic random access array of int64_ts which
+ * may grow in size to be more than the largest single malloc'able
+ * chunk.
+ */
+
+#define RAA_LAYERSHIFT	11      /* 2^this many items per layer */
+#define RAA_LAYERSIZE	((size_t)1 << RAA_LAYERSHIFT)
+#define RAA_LAYERMASK	(RAA_LAYERSIZE-1)
+
+typedef struct RAA RAA;
+typedef union RAA_UNION RAA_UNION;
+typedef struct RAA_LEAF RAA_LEAF;
+typedef struct RAA_BRANCH RAA_BRANCH;
+
+struct RAA {
+    /* Last position in this RAA */
+    raaindex endposn;
+
+    /*
+     * Number of layers below this one to get to the real data. 0
+     * means this structure is a leaf, holding RAA_LAYERSIZE real
+     * data items; 1 and above mean it's a branch, holding
+     * RAA_LAYERSIZE pointers to the next level branch or leaf
+     * structures.
+     */
+    unsigned int layers;
+
+    /*
+     * Number of real data items spanned by one position in the
+     * `data' array at this level. This number is 0 trivially, for
+     * a leaf (level 0): for a level n branch it should be
+     * n*RAA_LAYERSHIFT.
+     */
+    unsigned int shift;
+
+    /*
+     * The actual data
+     */
+    union RAA_UNION {
+        struct RAA_LEAF {
+            union intorptr dataRAA_LAYERSIZE;
+        } l;
+        struct RAA_BRANCH {
+            struct RAA *dataRAA_LAYERSIZE;
+        } b;
+    } u;
+};
+
+#define LEAFSIZ (sizeof(RAA)-sizeof(RAA_UNION)+sizeof(RAA_LEAF))
+#define BRANCHSIZ (sizeof(RAA)-sizeof(RAA_UNION)+sizeof(RAA_BRANCH))
+
+static struct RAA *raa_init_layer(raaindex posn, unsigned int layers)
+{
+    struct RAA *r;
+    raaindex posmask;
+
+    r = nasm_zalloc((layers == 0) ? LEAFSIZ : BRANCHSIZ);
+    r->shift = layers * RAA_LAYERSHIFT;
+    r->layers    = layers;
+    posmask = ((raaindex)RAA_LAYERSIZE << r->shift) - 1;
+    r->endposn   = posn | posmask;
+    return r;
+}
+
+void raa_free(struct RAA *r)
+{
+    if (!r)
+        return;
+
+    if (r->layers) {
+        struct RAA **p = r->u.b.data;
+        size_t i;
+        for (i = 0; i < RAA_LAYERSIZE; i++)
+            raa_free(*p++);
+    }
+    nasm_free(r);
+}
+
+static const union intorptr *real_raa_read(struct RAA *r, raaindex posn)
+{
+    nasm_assert(posn <= (~(raaindex)0 >> 1));
+
+    if (unlikely(!r || posn > r->endposn))
+        return NULL;            /* Beyond the end */
+
+    while (r->layers) {
+        size_t l = (posn >> r->shift) & RAA_LAYERMASK;
+        r = r->u.b.datal;
+        if (!r)
+            return NULL;        /* Not present */
+    }
+    return &r->u.l.dataposn & RAA_LAYERMASK;
+}
+
+int64_t raa_read(struct RAA *r, raaindex pos)
+{
+    const union intorptr *ip;
+
+    ip = real_raa_read(r, pos);
+    return ip ? ip->i : 0;
+}
+
+void *raa_read_ptr(struct RAA *r, raaindex pos)
+{
+    const union intorptr *ip;
+
+    ip = real_raa_read(r, pos);
+    return ip ? ip->p : NULL;
+}
+
+
+static struct RAA *
+real_raa_write(struct RAA *r, raaindex posn, union intorptr value)
+{
+    struct RAA *result;
+
+    nasm_assert(posn <= (~(raaindex)0 >> 1));
+
+    if (unlikely(!r)) {
+        /* Create a new top-level RAA */
+        r = raa_init_layer(posn, ilog2_64(posn)/RAA_LAYERSHIFT);
+    } else {
+        while (unlikely(r->endposn < posn)) {
+            /* We need to add layers to an existing RAA */
+            struct RAA *s = raa_init_layer(r->endposn, r->layers + 1);
+            s->u.b.data0 = r;
+            r = s;
+        }
+    }
+
+    result = r;
+
+    while (r->layers) {
+        struct RAA **s;
+        size_t l = (posn >> r->shift) & RAA_LAYERMASK;
+        s = &r->u.b.datal;
+        if (unlikely(!*s))
+            *s = raa_init_layer(posn, r->layers - 1);
+        r = *s;
+    }
+    r->u.l.dataposn & RAA_LAYERMASK = value;
+
+    return result;
+}
+
+struct RAA *raa_write(struct RAA *r, raaindex posn, int64_t value)
+{
+    union intorptr ip;
+
+    ip.i = value;
+    return real_raa_write(r, posn, ip);
+}
+
+struct RAA *raa_write_ptr(struct RAA *r, raaindex posn, void *value)
+{
+    union intorptr ip;
+
+    ip.p = value;
+    return real_raa_write(r, posn, ip);
+}

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/rbtree.c Added

@@ -0,0 +1,259 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2020 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * rbtree.c
+ *
+ * Simple implementation of a "left-leaning threaded red-black tree"
+ * with 64-bit integer keys.  The search operation will return the
+ * highest node <= the key; only search and insert are supported, but
+ * additional standard llrbtree operations can be coded up at will.
+ *
+ * See http://www.cs.princeton.edu/~rs/talks/LLRB/RedBlack.pdf for
+ * information about left-leaning red-black trees.
+ *
+ * The "threaded" part means that left and right pointers that would
+ * otherwise be NULL are pointers to the in-order predecessor or
+ * successor node. The only pointers that are NULL are the very left-
+ * and rightmost, for which no corresponding side node exists.
+ *
+ * This, among other things, allows for efficient predecessor and
+ * successor operations without requiring dedicated space for a parent
+ * pointer.
+ *
+ * This implementation is robust for identical key values; such keys
+ * will not have their insertion order preserved, and after insertion
+ * of unrelated keys a lookup may return a different node for the
+ * duplicated key, but the prev/next operations will always enumerate
+ * all entries.
+ *
+ * The NULL pointers at the end are considered predecessor/successor
+ * pointers, so if the corresponding flags are clear it is always safe
+ * to access the pointed-to object without an explicit NULL pointer
+ * check.
+ */
+
+#include "rbtree.h"
+#include "nasmlib.h"
+
+struct rbtree *rb_search(const struct rbtree *tree, uint64_t key)
+{
+    const struct rbtree *best = NULL;
+
+    if (tree) {
+        while (true) {
+            if (tree->key > key) {
+                if (tree->m.flags & RBTREE_NODE_PRED)
+                    break;
+                tree = tree->m.left;
+            } else {
+                best = tree;
+                if (tree->key == key || (tree->m.flags & RBTREE_NODE_SUCC))
+                    break;
+                tree = tree->m.right;
+            }
+	}
+    }
+    return (struct rbtree *)best;
+}
+
+struct rbtree *rb_search_exact(const struct rbtree *tree, uint64_t key)
+{
+    struct rbtree *rv;
+
+    rv = rb_search(tree, key);
+    return (rv && rv->key == key) ? rv : NULL;
+}
+
+/* Reds two left in a row? */
+static inline bool is_red_left_left(struct rbtree *h)
+{
+    return !(h->m.flags & RBTREE_NODE_PRED) &&
+        !(h->m.left->m.flags & (RBTREE_NODE_BLACK|RBTREE_NODE_PRED)) &&
+        !(h->m.left->m.left->m.flags & RBTREE_NODE_BLACK);
+}
+
+/* Node to the right is red? */
+static inline bool is_red_right(struct rbtree *h)
+{
+    return !(h->m.flags & RBTREE_NODE_SUCC) &&
+           !(h->m.right->m.flags & RBTREE_NODE_BLACK);
+}
+
+/* Both the left and right hand nodes are red? */
+static inline bool is_red_both(struct rbtree *h)
+{
+    return !(h->m.flags & (RBTREE_NODE_PRED|RBTREE_NODE_SUCC))
+        && !(h->m.left->m.flags & h->m.right->m.flags & RBTREE_NODE_BLACK);
+}
+
+static inline struct rbtree *rotate_left(struct rbtree *h)
+{
+    struct rbtree *x = h->m.right;
+    enum rbtree_node_flags hf = h->m.flags;
+    enum rbtree_node_flags xf = x->m.flags;
+
+    if (xf & RBTREE_NODE_PRED) {
+        h->m.right = x;
+        h->m.flags = (hf & RBTREE_NODE_PRED)  | RBTREE_NODE_SUCC;
+    } else {
+        h->m.right = x->m.left;
+        h->m.flags = hf & RBTREE_NODE_PRED;
+    }
+    x->m.flags = (hf & RBTREE_NODE_BLACK) | (xf & RBTREE_NODE_SUCC);
+    x->m.left = h;
+
+    return x;
+}
+
+static inline struct rbtree *rotate_right(struct rbtree *h)
+{
+    struct rbtree *x = h->m.left;
+    enum rbtree_node_flags hf = h->m.flags;
+    enum rbtree_node_flags xf = x->m.flags;
+
+    if (xf & RBTREE_NODE_SUCC) {
+        h->m.left = x;
+        h->m.flags = (hf & RBTREE_NODE_SUCC)  | RBTREE_NODE_PRED;
+    } else {
+        h->m.left = x->m.right;
+        h->m.flags = hf & RBTREE_NODE_SUCC;
+    }
+    x->m.flags = (hf & RBTREE_NODE_BLACK) | (xf & RBTREE_NODE_PRED);
+    x->m.right = h;
+
+    return x;
+}
+
+static inline void color_flip(struct rbtree *h)
+{
+    h->m.flags          ^= RBTREE_NODE_BLACK;
+    h->m.left->m.flags  ^= RBTREE_NODE_BLACK;
+    h->m.right->m.flags ^= RBTREE_NODE_BLACK;
+}
+
+static struct rbtree *
+_rb_insert(struct rbtree *tree, struct rbtree *node);
+
+struct rbtree *rb_insert(struct rbtree *tree, struct rbtree *node)
+{
+    /* Initialize node as if it was the sole member of the tree */
+
+    nasm_zero(node->m);
+    node->m.flags = RBTREE_NODE_PRED|RBTREE_NODE_SUCC;
+
+    if (unlikely(!tree))
+        return node;
+
+    return _rb_insert(tree, node);
+}
+
+static struct rbtree *
+_rb_insert(struct rbtree *tree, struct rbtree *node)
+{
+    /* Recursive part of the algorithm */
+
+    /* Red on both sides? */
+    if (is_red_both(tree))
+	color_flip(tree);
+
+    if (node->key < tree->key) {
+        node->m.right  = tree;  /* Potential successor */
+        if (tree->m.flags & RBTREE_NODE_PRED) {
+            node->m.left   = tree->m.left;
+            tree->m.flags &= ~RBTREE_NODE_PRED;
+            tree->m.left   = node;
+        } else {
+            tree->m.left   = _rb_insert(tree->m.left, node);
+        }
+    } else {
+        node->m.left   = tree;  /* Potential predecessor */
+        if (tree->m.flags & RBTREE_NODE_SUCC) {
+            node->m.right  = tree->m.right;
+            tree->m.flags &= ~RBTREE_NODE_SUCC;
+            tree->m.right  = node;
+        } else {
+            tree->m.right  = _rb_insert(tree->m.right, node);
+        }
+    }
+
+    if (is_red_right(tree))
+	tree = rotate_left(tree);
+
+    if (is_red_left_left(tree))
+	tree = rotate_right(tree);
+
+    return tree;
+}
+
+struct rbtree *rb_first(const struct rbtree *tree)
+{
+    if (unlikely(!tree))
+        return NULL;
+
+    while (!(tree->m.flags & RBTREE_NODE_PRED))
+        tree = tree->m.left;
+
+    return (struct rbtree *)tree;
+}
+
+struct rbtree *rb_last(const struct rbtree *tree)
+{
+    if (unlikely(!tree))
+        return NULL;
+
+    while (!(tree->m.flags & RBTREE_NODE_SUCC))
+        tree = tree->m.right;
+
+    return (struct rbtree *)tree;
+}
+
+struct rbtree *rb_prev(const struct rbtree *node)
+{
+    struct rbtree *np = node->m.left;
+
+    if (node->m.flags & RBTREE_NODE_PRED)
+        return np;
+    else
+        return rb_last(np);
+}
+
+struct rbtree *rb_next(const struct rbtree *node)
+{
+    struct rbtree *np = node->m.right;
+
+    if (node->m.flags & RBTREE_NODE_SUCC)
+        return np;
+    else
+        return rb_first(np);
+}

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/readnum.c Added

@@ -0,0 +1,159 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2016 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * nasmlib.c	library routines for the Netwide Assembler
+ */
+
+#include "compiler.h"
+
+#include "nctype.h"
+
+#include "nasmlib.h"
+#include "error.h"
+#include "nasm.h"               /* For globalbits */
+
+#define lib_isnumchar(c)    (nasm_isalnum(c) || (c) == '$' || (c) == '_')
+
+int64_t readnum(const char *str, bool *error)
+{
+    const char *r = str, *q;
+    int32_t pradix, sradix, radix;
+    int plen, slen, len;
+    uint64_t result, checklimit;
+    int digit, last;
+    bool warn = false;
+    int sign = 1;
+
+    if (error)
+        *error = true;
+
+    while (nasm_isspace(*r))
+        r++;                    /* find start of number */
+
+    /*
+     * If the number came from make_tok_num (as a result of an %assign), it
+     * might have a '-' built into it (rather than in a preceding token).
+     */
+    if (*r == '-') {
+        r++;
+        sign = -1;
+    }
+
+    q = r;
+
+    while (lib_isnumchar(*q))
+        q++;                    /* find end of number */
+
+    len = q-r;
+    if (!len) {
+	/* Not numeric */
+        return 0;
+    }
+
+    /*
+     * Handle radix formats:
+     *
+     * 0<radix-letter><string>
+     * $<string>		(hexadecimal)
+     * <string><radix-letter>
+     */
+    pradix = sradix = 0;
+    plen = slen = 0;
+
+    if (len > 2 && *r == '0' && (pradix = radix_letter(r1)) != 0)
+	plen = 2;
+    else if (len > 1 && *r == '$')
+	pradix = 16, plen = 1;
+
+    if (len > 1 && (sradix = radix_letter(q-1)) != 0)
+	slen = 1;
+
+    if (pradix > sradix) {
+	radix = pradix;
+	r += plen;
+    } else if (sradix > pradix) {
+	radix = sradix;
+	q -= slen;
+    } else {
+	/* Either decimal, or invalid -- if invalid, we'll trip up
+	   further down. */
+	radix = 10;
+    }
+
+    /*
+     * `checklimit' must be 2**64 / radix. We can't do that in
+     * 64-bit arithmetic, which we're (probably) using, so we
+     * cheat: since we know that all radices we use are even, we
+     * can divide 2**63 by radix/2 instead.
+     */
+    checklimit = UINT64_C(0x8000000000000000) / (radix >> 1);
+
+    /*
+     * Calculate the highest allowable value for the last digit of a
+     * 64-bit constant... in radix 10, it is 6, otherwise it is 0
+     */
+    last = (radix == 10 ? 6 : 0);
+
+    result = 0;
+    while (*r && r < q) {
+	if (*r != '_') {
+	    if (*r < '0' || (*r > '9' && *r < 'A')
+		|| (digit = numvalue(*r)) >= radix) {
+                return 0;
+	    }
+	    if (result > checklimit ||
+		(result == checklimit && digit >= last)) {
+		warn = true;
+	    }
+
+	    result = radix * result + digit;
+	}
+        r++;
+    }
+
+    if (warn) {
+        /*!
+         *!number-overflow on numeric constant does not fit
+         *!    covers warnings about numeric constants which
+         *!    don't fit in 64 bits.
+         */
+        nasm_warn(WARN_NUMBER_OVERFLOW,
+		   "numeric constant %s does not fit in 64 bits",
+		   str);
+    }
+
+    if (error)
+        *error = false;
+    return result * sign;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/realpath.c Added

@@ -0,0 +1,133 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 2016 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * realpath.c	As system-independent as possible implementation of realpath()
+ */
+
+#include "compiler.h"
+
+#include <errno.h>
+#ifdef HAVE_UNISTD_H
+# include <unistd.h>
+#endif
+#ifdef HAVE_SYS_PARAM_H
+# include <sys/param.h>
+#endif
+
+#include "nasmlib.h"
+
+#ifdef HAVE_CANONICALIZE_FILE_NAME
+
+/*
+ * GNU-specific, but avoids the realpath(..., NULL)
+ * portability problem if it exists.
+ */
+char *nasm_realpath(const char *rel_path)
+{
+    char *rp = canonicalize_file_name(rel_path);
+    return rp ? rp : nasm_strdup(rel_path);
+}
+
+#elif defined(HAVE_REALPATH)
+
+/*
+ * POSIX.1-2008 defines realpath(..., NULL); POSIX.1-2001 doesn't guarantee
+ * that a NULL second argument is supported.
+ */
+
+char *nasm_realpath(const char *rel_path)
+{
+    char *rp;
+
+    rp = realpath(rel_path, NULL);
+
+    /* Not all implementations of realpath() support a NULL second argument */
+    if (!rp && errno == EINVAL) {
+        long path_max = -1;
+        char *rp;
+
+#if defined(HAVE_PATHCONF) && defined(_PC_PATH_MAX)
+        path_max = pathconf(rel_path, _PC_PATH_MAX); /* POSIX */
+#endif
+
+        if (path_max < 0) {
+#ifdef PATH_MAX
+            path_max = PATH_MAX;    /* SUSv2 */
+#elif defined(MAXPATHLEN)
+            path_max = MAXPATHLEN;  /* Solaris */
+#else
+            path_max = 65536;    /* Crazily high, we hope */
+#endif
+        }
+
+        rp = nasm_malloc(path_max);
+
+        if (!realpath(rel_path, rp)) {
+            nasm_free(rp);
+            rp = NULL;
+        } else {
+            /* On some systems, pathconf() can return a very large value */
+
+            rppath_max - 1 = '\0'; /* Just in case overrun is possible */
+            rp = nasm_realloc(rp, strlen(rp) + 1);
+        }
+    }
+
+    return rp ? rp : nasm_strdup(rel_path);
+}
+
+#elif defined(HAVE__FULLPATH)
+
+/*
+ * win32/win64 API
+ */
+
+char *nasm_realpath(const char *rel_path)
+{
+    char *rp = _fullpath(NULL, rel_path, 0);
+    return rp ? rp : nasm_strdup(rel_path);
+}
+
+#else
+
+/*
+ * There is nothing we know how to do here, so hope it just works anyway.
+ */
+
+char *nasm_realpath(const char *rel_path)
+{
+    return nasm_strdup(rel_path);
+}
+
+#endif

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/rlimit.c Added

@@ -0,0 +1,78 @@
+ /* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 2020 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#include "compiler.h"
+#include "nasmlib.h"
+
+#ifdef HAVE_SYS_RESOURCE_H
+# include <sys/resource.h>
+#endif
+
+#if defined(HAVE_GETRLIMIT) && defined(RLIMIT_STACK)
+
+size_t nasm_get_stack_size_limit(void)
+{
+    struct rlimit rl;
+
+    if (getrlimit(RLIMIT_STACK, &rl))
+        return SIZE_MAX;
+
+# ifdef RLIM_SAVED_MAX
+    if (rl.rlim_cur == RLIM_SAVED_MAX)
+        rl.rlim_cur = rl.rlim_max;
+# endif
+
+    if (
+# ifdef RLIM_INFINITY
+        rl.rlim_cur >= RLIM_INFINITY ||
+# endif
+# ifdef RLIM_SAVED_CUR
+        rl.rlim_cur == RLIM_SAVED_CUR ||
+# endif
+# ifdef RLIM_SAVED_MAX
+        rl.rlim_cur == RLIM_SAVED_MAX ||
+# endif
+        (size_t)rl.rlim_cur != rl.rlim_cur)
+        return SIZE_MAX;
+
+    return rl.rlim_cur;
+}
+
+#else
+
+size_t nasm_get_stack_size_limit(void)
+{
+    return SIZE_MAX;
+}
+
+#endif

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/saa.c Added

@@ -0,0 +1,383 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2017 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#include "compiler.h"
+#include "nasmlib.h"
+#include "saa.h"
+
+/* Aggregate SAA components smaller than this */
+#define SAA_BLKSHIFT	16
+#define SAA_BLKLEN	((size_t)1 << SAA_BLKSHIFT)
+
+struct SAA *saa_init(size_t elem_len)
+{
+    struct SAA *s;
+    char *data;
+
+    s = nasm_zalloc(sizeof(struct SAA));
+
+    if (elem_len >= SAA_BLKLEN)
+        s->blk_len = elem_len;
+    else
+        s->blk_len = SAA_BLKLEN - (SAA_BLKLEN % elem_len);
+
+    s->elem_len = elem_len;
+    s->length = s->blk_len;
+    data = nasm_malloc(s->blk_len);
+    s->nblkptrs = s->nblks = 1;
+    s->blk_ptrs = nasm_malloc(sizeof(char *));
+    s->blk_ptrs0 = data;
+    s->wblk = s->rblk = &s->blk_ptrs0;
+
+    return s;
+}
+
+void saa_free(struct SAA *s)
+{
+    char **p;
+    size_t n;
+
+    for (p = s->blk_ptrs, n = s->nblks; n; p++, n--)
+        nasm_free(*p);
+
+    nasm_free(s->blk_ptrs);
+    nasm_free(s);
+}
+
+/* Add one allocation block to an SAA */
+static void saa_extend(struct SAA *s)
+{
+    size_t blkn = s->nblks++;
+
+    if (blkn >= s->nblkptrs) {
+        size_t rindex = s->rblk - s->blk_ptrs;
+        size_t windex = s->wblk - s->blk_ptrs;
+
+        s->nblkptrs <<= 1;
+        s->blk_ptrs =
+            nasm_realloc(s->blk_ptrs, s->nblkptrs * sizeof(char *));
+
+        s->rblk = s->blk_ptrs + rindex;
+        s->wblk = s->blk_ptrs + windex;
+    }
+
+    s->blk_ptrsblkn = nasm_malloc(s->blk_len);
+    s->length += s->blk_len;
+}
+
+void *saa_wstruct(struct SAA *s)
+{
+    void *p;
+
+    nasm_assert((s->wpos % s->elem_len) == 0);
+
+    if (s->wpos + s->elem_len > s->blk_len) {
+        nasm_assert(s->wpos == s->blk_len);
+        if (s->wptr + s->elem_len > s->length)
+            saa_extend(s);
+        s->wblk++;
+        s->wpos = 0;
+    }
+
+    p = *s->wblk + s->wpos;
+    s->wpos += s->elem_len;
+    s->wptr += s->elem_len;
+
+    if (s->wptr > s->datalen)
+        s->datalen = s->wptr;
+
+    return p;
+}
+
+void saa_wbytes(struct SAA *s, const void *data, size_t len)
+{
+    const char *d = data;
+
+    while (len) {
+        size_t l = s->blk_len - s->wpos;
+        if (l > len)
+            l = len;
+        if (l) {
+            if (d) {
+                memcpy(*s->wblk + s->wpos, d, l);
+                d += l;
+            } else
+                memset(*s->wblk + s->wpos, 0, l);
+            s->wpos += l;
+            s->wptr += l;
+            len -= l;
+
+            if (s->datalen < s->wptr)
+                s->datalen = s->wptr;
+        }
+        if (len) {
+            if (s->wptr >= s->length)
+                saa_extend(s);
+            s->wblk++;
+            s->wpos = 0;
+        }
+    }
+}
+
+/*
+ * Writes a string, *including* the final null, to the specified SAA,
+ * and return the number of bytes written.
+ */
+size_t saa_wcstring(struct SAA *s, const char *str)
+{
+    size_t bytes = strlen(str) + 1;
+
+    saa_wbytes(s, str, bytes);
+
+    return bytes;
+}
+
+void saa_rewind(struct SAA *s)
+{
+    s->rblk = s->blk_ptrs;
+    s->rpos = s->rptr = 0;
+}
+
+void *saa_rstruct(struct SAA *s)
+{
+    void *p;
+
+    if (s->rptr + s->elem_len > s->datalen)
+        return NULL;
+
+    nasm_assert((s->rpos % s->elem_len) == 0);
+
+    if (s->rpos + s->elem_len > s->blk_len) {
+        s->rblk++;
+        s->rpos = 0;
+    }
+
+    p = *s->rblk + s->rpos;
+    s->rpos += s->elem_len;
+    s->rptr += s->elem_len;
+
+    return p;
+}
+
+const void *saa_rbytes(struct SAA *s, size_t * lenp)
+{
+    const void *p;
+    size_t len;
+
+    if (s->rptr >= s->datalen) {
+        *lenp = 0;
+        return NULL;
+    }
+
+    if (s->rpos >= s->blk_len) {
+        s->rblk++;
+        s->rpos = 0;
+    }
+
+    len = *lenp;
+    if (len > s->datalen - s->rptr)
+        len = s->datalen - s->rptr;
+    if (len > s->blk_len - s->rpos)
+        len = s->blk_len - s->rpos;
+
+    *lenp = len;
+    p = *s->rblk + s->rpos;
+
+    s->rpos += len;
+    s->rptr += len;
+
+    return p;
+}
+
+void saa_rnbytes(struct SAA *s, void *data, size_t len)
+{
+    char *d = data;
+
+    nasm_assert(s->rptr + len <= s->datalen);
+
+    while (len) {
+        size_t l;
+        const void *p;
+
+        l = len;
+        p = saa_rbytes(s, &l);
+
+        memcpy(d, p, l);
+        d += l;
+        len -= l;
+    }
+}
+
+/* Same as saa_rnbytes, except position the counter first */
+void saa_fread(struct SAA *s, size_t posn, void *data, size_t len)
+{
+    size_t ix;
+
+    nasm_assert(posn + len <= s->datalen);
+
+    if (likely(s->blk_len == SAA_BLKLEN)) {
+        ix = posn >> SAA_BLKSHIFT;
+        s->rpos = posn & (SAA_BLKLEN - 1);
+    } else {
+        ix = posn / s->blk_len;
+        s->rpos = posn % s->blk_len;
+    }
+    s->rptr = posn;
+    s->rblk = &s->blk_ptrsix;
+
+    saa_rnbytes(s, data, len);
+}
+
+/* Same as saa_wbytes, except position the counter first */
+void saa_fwrite(struct SAA *s, size_t posn, const void *data, size_t len)
+{
+    size_t ix;
+    size_t padding = 0;
+
+    if (posn > s->datalen) {
+        padding = posn - s->datalen;
+        posn = s->datalen;
+    }
+
+    if (likely(s->blk_len == SAA_BLKLEN)) {
+        ix = posn >> SAA_BLKSHIFT;
+        s->wpos = posn & (SAA_BLKLEN - 1);
+    } else {
+        ix = posn / s->blk_len;
+        s->wpos = posn % s->blk_len;
+    }
+    s->wptr = posn;
+    s->wblk = &s->blk_ptrsix;
+
+    if (!s->wpos) {
+        s->wpos = s->blk_len;
+        s->wblk--;
+    }
+
+    if (padding)
+        saa_wbytes(s, NULL, padding);
+
+    saa_wbytes(s, data, len);
+}
+
+void saa_fpwrite(struct SAA *s, FILE * fp)
+{
+    const char *data;
+    size_t len;
+
+    saa_rewind(s);
+    while (len = s->datalen, (data = saa_rbytes(s, &len)) != NULL)
+        nasm_write(data, len, fp);
+}
+
+void saa_write8(struct SAA *s, uint8_t v)
+{
+    saa_wbytes(s, &v, 1);
+}
+
+void saa_write16(struct SAA *s, uint16_t v)
+{
+    v = cpu_to_le16(v);
+    saa_wbytes(s, &v, 2);
+}
+
+void saa_write32(struct SAA *s, uint32_t v)
+{
+    v = cpu_to_le32(v);
+    saa_wbytes(s, &v, 4);
+}
+
+void saa_write64(struct SAA *s, uint64_t v)
+{
+    v = cpu_to_le64(v);
+    saa_wbytes(s, &v, 8);
+}
+
+void saa_writeaddr(struct SAA *s, uint64_t v, size_t len)
+{
+    v = cpu_to_le64(v);
+    saa_wbytes(s, &v, len);
+}
+
+/* write unsigned LEB128 value to SAA */
+void saa_wleb128u(struct SAA *psaa, int value)
+{
+    char temp64, *ptemp;
+    uint8_t byte;
+    int len;
+
+    ptemp = temp;
+    len = 0;
+    do {
+        byte = value & 127;
+        value >>= 7;
+        if (value != 0)         /* more bytes to come */
+            byte |= 0x80;
+        *ptemp = byte;
+        ptemp++;
+        len++;
+    } while (value != 0);
+    saa_wbytes(psaa, temp, len);
+}
+
+/* write signed LEB128 value to SAA */
+void saa_wleb128s(struct SAA *psaa, int value)
+{
+    char temp64, *ptemp;
+    uint8_t byte;
+    bool more, negative;
+    int size, len;
+
+    ptemp = temp;
+    more = 1;
+    negative = (value < 0);
+    size = sizeof(int) * 8;
+    len = 0;
+    while (more) {
+        byte = value & 0x7f;
+        value >>= 7;
+        if (negative)
+            /* sign extend */
+            value |= -(1 << (size - 7));
+        /* sign bit of byte is second high order bit (0x40) */
+        if ((value == 0 && !(byte & 0x40)) ||
+            ((value == -1) && (byte & 0x40)))
+            more = 0;
+        else
+            byte |= 0x80;
+        *ptemp = byte;
+        ptemp++;
+        len++;
+    }
+    saa_wbytes(psaa, temp, len);
+}

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/string.c Added

@@ -0,0 +1,224 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2016 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * nasmlib.c	library routines for the Netwide Assembler
+ */
+
+#include "compiler.h"
+#include "nasmlib.h"
+#include "nctype.h"
+
+#ifndef nasm_stricmp
+int nasm_stricmp(const char *s1, const char *s2)
+{
+    unsigned char c1, c2;
+    int d;
+
+    while (1) {
+	c1 = nasm_tolower(*s1++);
+	c2 = nasm_tolower(*s2++);
+	d = c1-c2;
+
+	if (d)
+	    return d;
+	if (!c1)
+	    break;
+    }
+    return 0;
+}
+#endif
+
+#ifndef nasm_strnicmp
+int nasm_strnicmp(const char *s1, const char *s2, size_t n)
+{
+    unsigned char c1, c2;
+    int d;
+
+    while (n--) {
+	c1 = nasm_tolower(*s1++);
+	c2 = nasm_tolower(*s2++);
+	d = c1-c2;
+
+	if (d)
+	    return d;
+	if (!c1)
+	    break;
+    }
+    return 0;
+}
+#endif
+
+int nasm_memicmp(const char *s1, const char *s2, size_t n)
+{
+    unsigned char c1, c2;
+    int d;
+
+    while (n--) {
+	c1 = nasm_tolower(*s1++);
+	c2 = nasm_tolower(*s2++);
+	d = c1-c2;
+	if (d)
+	    return d;
+    }
+    return 0;
+}
+
+#ifndef nasm_strsep
+char *nasm_strsep(char **stringp, const char *delim)
+{
+        char *s = *stringp;
+        char *e;
+
+        if (!s)
+                return NULL;
+
+        e = strpbrk(s, delim);
+        if (e)
+                *e++ = '\0';
+
+        *stringp = e;
+        return s;
+}
+#endif
+
+/* skip leading spaces */
+char *nasm_skip_spaces(const char *p)
+{
+    if (p)
+        while (*p && nasm_isspace(*p))
+            p++;
+    return (char *)p;
+}
+
+/* skip leading non-spaces */
+char *nasm_skip_word(const char *p)
+{
+    if (p)
+        while (*p && !nasm_isspace(*p))
+            p++;
+    return (char *)p;
+}
+
+/* zap leading spaces with zero */
+char *nasm_zap_spaces_fwd(char *p)
+{
+    if (p)
+        while (*p && nasm_isspace(*p))
+            *p++ = 0x0;
+    return p;
+}
+
+/* zap spaces with zero in reverse order */
+char *nasm_zap_spaces_rev(char *p)
+{
+    if (p)
+        while (*p && nasm_isspace(*p))
+            *p-- = 0x0;
+    return p;
+}
+
+/* zap leading and trailing spaces */
+char *nasm_trim_spaces(char *p)
+{
+    p = nasm_zap_spaces_fwd(p);
+    nasm_zap_spaces_fwd(nasm_skip_word(p));
+
+    return p;
+}
+
+/*
+ * return the word extracted from a stream
+ * or NULL if nothing left
+ */
+char *nasm_get_word(char *p, char **tail)
+{
+    char *word = nasm_skip_spaces(p);
+    char *next = nasm_skip_word(word);
+
+    if (word && *word) {
+        if (*next)
+            *next++ = '\0';
+    } else
+        word = next = NULL;
+
+    /* NOTE: the tail may start with spaces */
+    *tail = next;
+
+    return word;
+}
+
+/*
+ * Extract "opt=val" values from the stream and
+ * returns "opt"
+ *
+ * Exceptions:
+ * 1) If "=val" passed the NULL returned though
+ *    you may continue handling the tail via "next"
+ * 2) If "=" passed the NULL is returned and "val"
+ *    is set to NULL as well
+ */
+char *nasm_opt_val(char *p, char **val, char **next)
+{
+    char *q, *nxt;
+
+    *val = *next = NULL;
+
+    p = nasm_get_word(p, &nxt);
+    if (!p)
+        return NULL;
+
+    q = strchr(p, '=');
+    if (q) {
+        if (q == p)
+            p = NULL;
+        *q++='\0';
+        if (*q) {
+            *val = q;
+        } else {
+            q = nasm_get_word(q + 1, &nxt);
+            if (q)
+                *val = q;
+        }
+    } else {
+        q = nasm_skip_spaces(nxt);
+        if (q && *q == '=') {
+            q = nasm_get_word(q + 1, &nxt);
+            if (q)
+                *val = q;
+        }
+    }
+
+    *next = nxt;
+    return p;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/strlist.c Added

@@ -0,0 +1,207 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2020 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * strlist.c - list of ordered strings, optionally made unique
+ */
+
+#include "strlist.h"
+
+/*
+ * Create a string list. The list can be uniqizing or not.
+ */
+struct strlist *strlist_alloc(bool uniq)
+{
+	struct strlist *list = nasm_zalloc(sizeof(*list));
+	list->tailp = &list->head;
+        list->uniq = uniq;
+	return list;
+}
+
+/*
+ * Append a string to a string list. Return the entry pointer, which
+ * may be a pre-existing entry for a uniqizing list.
+ */
+
+static const struct strlist_entry *
+strlist_add_common(struct strlist *list, struct strlist_entry *e,
+		   struct hash_insert *hi)
+{
+        e->offset = list->size;
+        e->next = NULL;
+
+	*list->tailp = e;
+	list->tailp = &e->next;
+	list->nstr++;
+	list->size += e->size;
+
+        if (list->uniq)
+		hash_add(hi, e->str, (void *)e);
+
+	return e;
+}
+
+const struct strlist_entry *
+strlist_add(struct strlist *list, const char *str)
+{
+	struct strlist_entry *e;
+	struct hash_insert hi;
+	size_t size;
+
+	if (!list)
+		return NULL;
+
+	size = strlen(str) + 1;
+	if (list->uniq) {
+		void **dp = hash_findb(&list->hash, str, size, &hi);
+		if (dp)
+			return *dp;
+	}
+
+	/* Structure already has char1 as EOS */
+	e = nasm_malloc(sizeof(*e) - 1 + size);
+	e->size = size;
+	memcpy(e->str, str, size);
+
+	return strlist_add_common(list, e, &hi);
+}
+
+/*
+ * printf() to a string list
+ */
+const struct strlist_entry *
+strlist_vprintf(struct strlist *list, const char *fmt, va_list ap)
+{
+	/* clang miscompiles offsetin() unless e is initialized here */
+	struct strlist_entry *e = NULL;
+	struct hash_insert hi;
+
+	if (!list)
+		return NULL;
+
+	e = nasm_vaxprintf(offsetin(*e, str), fmt, ap);
+	e->size = nasm_last_string_size();
+
+	if (list->uniq) {
+		void **dp = hash_findb(&list->hash, e->str, e->size, &hi);
+		if (dp) {
+			nasm_free(e);
+			return *dp;
+		}
+	}
+
+	return strlist_add_common(list, e, &hi);
+}
+
+const struct strlist_entry *
+strlist_printf(struct strlist *list, const char *fmt, ...)
+{
+	va_list ap;
+	const struct strlist_entry *e;
+
+	va_start(ap, fmt);
+	e = strlist_vprintf(list, fmt, ap);
+	va_end(ap);
+
+	return e;
+}
+
+/*
+ * Free a string list. Sets the pointed to pointer to NULL.
+ */
+void strlist_free(struct strlist **listp)
+{
+	struct strlist *list = *listp;
+	struct strlist_entry *e, *tmp;
+
+	if (!list)
+		return;
+
+	if (list->uniq)
+		hash_free(&list->hash);
+
+	list_for_each_safe(e, tmp, list->head)
+		nasm_free(e);
+
+	nasm_free(list);
+	*listp = NULL;
+}
+
+/*
+ * Search the string list for an entry. If found, return the entry pointer.
+ * Only possible on a uniqizing list.
+ */
+const struct strlist_entry *
+strlist_find(const struct strlist *list, const char *str)
+{
+	void **hf;
+
+        nasm_assert(list->uniq);
+
+	hf = hash_find((struct hash_table *)&list->hash, str, NULL);
+	return hf ? *hf : NULL;
+}
+
+/*
+ * Produce a linearized buffer containing the whole list, in order;
+ * The character "sep" is the separator between strings; this is
+ * typically either 0 or '\n'. strlist_size() will give the size of
+ * the returned buffer.
+ */
+void *strlist_linearize(const struct strlist *list, char sep)
+{
+	const struct strlist_entry *sl;
+	char *buf = nasm_malloc(list->size);
+	char *p = buf;
+
+	strlist_for_each(sl, list) {
+		p = mempcpy(p, sl->str, sl->size);
+		p-1 = sep;
+	}
+
+	return buf;
+}
+
+/*
+ * Output a string list to a file. The separator can be any string.
+ */
+void strlist_write(const struct strlist *list, const char *sep, FILE *f)
+{
+	const struct strlist_entry *sl;
+	size_t seplen = strlen(sep);
+
+	strlist_for_each(sl, list) {
+		fwrite(sl->str, 1, sl->size - 1, f);
+		fwrite(sep, 1, seplen, f);
+	}
+}

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/ver.c Added

@@ -0,0 +1,80 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2020 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#include "ver.h"
+#include "version.h"
+
+/* This is printed when entering nasm -v */
+const char nasm_version = NASM_VER;
+const char nasm_date = __DATE__;
+const char nasm_compile_options = ""
+#ifdef DEBUG
+    " with -DDEBUG"
+#endif
+    ;
+
+bool reproducible;              /* Reproducible output */
+
+/* These are used by some backends. For a reproducible build,
+ * these cannot contain version numbers.
+ */
+static const char * const _nasm_comment2 =
+{
+    "The Netwide Assembler " NASM_VER,
+    "The Netwide Assembler"
+};
+
+static const char * const _nasm_signature2 = {
+    "NASM " NASM_VER,
+    "NASM"
+};
+
+const char *nasm_comment(void)
+{
+    return _nasm_commentreproducible;
+}
+
+size_t nasm_comment_len(void)
+{
+    return strlen(nasm_comment());
+}
+
+const char *nasm_signature(void)
+{
+    return _nasm_signaturereproducible;
+}
+
+size_t nasm_signature_len(void)
+{
+    return strlen(nasm_signature());
+}

_service:tar_scm:nasm-2.16.03.tar.xz/nasmlib/zerobuf.c Added

@@ -0,0 +1,42 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2016 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * nasmlib.c	library routines for the Netwide Assembler
+ */
+
+#include "compiler.h"
+#include "nasmlib.h"
+
+/* Uninitialized -> all zero by C spec */
+const uint8_t zero_bufferZERO_BUF_SIZE;

_service:tar_scm:nasm-2.16.03.tar.xz/ndisasm.1 Added

@@ -0,0 +1,120 @@
+'\" t
+.\"     Title: ndisasm
+.\"    Author: FIXME: author see http://www.docbook.org/tdg5/en/html/author
+.\" Generator: DocBook XSL Stylesheets vsnapshot <http://docbook.sf.net/>
+.\"      Date: 04/17/2024
+.\"    Manual: The Netwide Assembler Project
+.\"    Source: NASM
+.\"  Language: English
+.\"
+.TH "NDISASM" "1" "04/17/2024" "NASM" "The Netwide Assembler Project"
+.\" -----------------------------------------------------------------
+.\" * Define some portability stuff
+.\" -----------------------------------------------------------------
+.\" ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+.\" http://bugs.debian.org/507673
+.\" http://lists.gnu.org/archive/html/groff/2009-02/msg00013.html
+.\" ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\" -----------------------------------------------------------------
+.\" * set default formatting
+.\" -----------------------------------------------------------------
+.\" disable hyphenation
+.nh
+.\" disable justification (adjust text to left margin only)
+.ad l
+.\" -----------------------------------------------------------------
+.\" * MAIN CONTENT STARTS HERE *
+.\" -----------------------------------------------------------------
+.SH "NAME"
+ndisasm \- the Netwide Disassembler, an 80x86 binary file disassembler
+.SH "SYNOPSIS"
+.sp
+\fBndisasm\fR  \fB\-o\fR origin   \fB\-s\fR sync\-point \&...  \fB\-a\fR | \fB\-i\fR   \fB\-b\fR bits   \fB\-u\fR   \fB\-e\fR hdrlen   \fB\-p\fR vendor   \fB\-k\fR offset,length \&... infile
+.SH "DESCRIPTION"
+.sp
+The \fBndisasm\fR command generates a disassembly listing of the binary file infile and directs it to stdout\&.
+.SH "OPTIONS"
+.PP
+\fB\-h\fR
+.RS 4
+Causes
+\fBndisasm\fR
+to exit immediately, after giving a summary of its invocation options\&.
+.RE
+.PP
+\fB\-r\fR|\fB\-v\fR
+.RS 4
+Causes
+\fBndisasm\fR
+to exit immediately, after displaying its version number\&.
+.RE
+.PP
+\fB\-o\fR \fIorigin\fR
+.RS 4
+Specifies the notional load address for the file\&. This option causes
+\fBndisasm\fR
+to get the addresses it lists down the left hand margin, and the target addresses of PC\-relative jumps and calls, right\&.
+.RE
+.PP
+\fB\-s\fR \fIsync\-point\fR
+.RS 4
+Manually specifies a synchronisation address, such that
+\fBndisasm\fR
+will not output any machine instruction which encompasses bytes on both sides of the address\&. Hence the instruction which starts at that address will be correctly disassembled\&.
+.RE
+.PP
+\fB\-e\fR \fIhdrlen\fR
+.RS 4
+Specifies a number of bytes to discard from the beginning of the file before starting disassembly\&. This does not count towards the calculation of the disassembly offset: the first
+\fIdisassembled\fR
+instruction will be shown starting at the given load address\&.
+.RE
+.PP
+\fB\-k\fR \fIoffset,length\fR
+.RS 4
+Specifies that
+\fIlength\fR
+bytes, starting from disassembly offset
+\fIoffset\fR, should be skipped over without generating any output\&. The skipped bytes still count towards the calculation of the disassembly offset\&.
+.RE
+.PP
+\fB\-a\fR|\fB\-i\fR
+.RS 4
+Enables automatic (or intelligent) sync mode, in which
+\fBndisasm\fR
+will attempt to guess where synchronisation should be performed, by means of examining the target addresses of the relative jumps and calls it disassembles\&.
+.RE
+.PP
+\fB\-b\fR \fIbits\fR
+.RS 4
+Specifies 16\-, 32\- or 64\-bit mode\&. The default is 16\-bit mode\&.
+.RE
+.PP
+\fB\-u\fR
+.RS 4
+Specifies 32\-bit mode, more compactly than using \(oq\-b 32\(cq\&.
+.RE
+.PP
+\fB\-p\fR \fIvendor\fR
+.RS 4
+Prefers instructions as defined by
+\fIvendor\fR
+in case of a conflict\&. Known
+\fIvendor\fR
+names include
+\fBintel\fR,
+\fBamd\fR,
+\fBcyrix\fR, and
+\fBidt\fR\&. The default is
+\fBintel\fR\&.
+.RE
+.SH "RESTRICTIONS"
+.sp
+\fBndisasm\fR only disassembles binary files: it has no understanding of the header information present in object or executable files\&. If you want to disassemble an object file, you should probably be using \fBobjdump\fR(1)\&.
+.sp
+Auto\-sync mode won\(cqt necessarily cure all your synchronisation problems: a sync marker can only be placed automatically if a jump or call instruction is found to refer to it \fIbefore\fR \fBndisasm\fR actually disassembles that part of the code\&. Also, if spurious jumps or calls result from disassembling non\-machine\-code data, sync markers may get placed in strange places\&. Feel free to turn auto\-sync off and go back to doing it manually if necessary\&.
+.SH "SEE ALSO"
+.sp
+\fBobjdump\fR(1)

_service:tar_scm:nasm-2.16.03.tar.xz/ndisasm.txt Added

@@ -0,0 +1,94 @@
+ndisasm(1)
+==========
+:doctype:	manpage
+:man source:	NASM
+:man manual:	The Netwide Assembler Project
+
+NAME
+----
+ndisasm - the Netwide Disassembler, an 80x86 binary file disassembler
+
+SYNOPSIS
+--------
+*ndisasm*  *-o* origin   *-s* sync-point ...  *-a* | *-i* 
+	 *-b* bits   *-u*   *-e* hdrlen   *-p* vendor 
+	 *-k* offset,length ... infile
+
+DESCRIPTION
+-----------
+The *ndisasm* command generates a disassembly listing of the binary file
+infile and directs it to stdout.
+
+OPTIONS
+-------
+*-h*::
+	Causes *ndisasm* to exit immediately, after giving a summary
+	of its invocation options.
+
+*-r*|*-v*::
+	Causes *ndisasm* to exit immediately, after displaying its
+	version number.
+
+*-o* 'origin'::
+	Specifies the notional load address for the file. This
+	option causes *ndisasm* to get the addresses it lists
+	down the left hand margin, and the target addresses
+	of PC-relative jumps and calls, right.
+
+*-s* 'sync-point'::
+	Manually specifies a synchronisation address, such that
+	*ndisasm* will not output any machine instruction which
+	encompasses bytes on both sides of the address. Hence
+	the instruction which starts at that address will be
+	correctly disassembled.
+
+*-e* 'hdrlen'::
+	Specifies a number of bytes to discard from the beginning
+	of the file before starting disassembly. This does not
+	count towards the calculation of the disassembly offset:
+	the first 'disassembled' instruction will be shown starting
+	at the given load address.
+
+*-k* 'offset,length'::
+	Specifies that 'length' bytes, starting from disassembly
+	offset 'offset', should be skipped over without generating
+	any output. The skipped bytes still count towards the
+	calculation of the disassembly offset.
+
+*-a*|*-i*::
+	Enables automatic (or intelligent) sync mode, in which
+	*ndisasm* will attempt to guess where synchronisation should
+	be performed, by means of examining the target addresses
+	of the relative jumps and calls it disassembles.
+
+*-b* 'bits'::
+	Specifies 16-, 32- or 64-bit mode. The default is 16-bit
+	mode.
+
+*-u*::
+	Specifies 32-bit mode, more compactly than using `-b 32'.
+
+*-p* 'vendor'::
+	Prefers instructions as defined by 'vendor' in case of
+	a conflict. Known 'vendor' names include *intel*, *amd*,
+	*cyrix*, and *idt*. The default is *intel*.
+
+RESTRICTIONS
+------------
+*ndisasm* only disassembles binary files: it has no understanding of
+the header information present in object or executable files.
+If you want to disassemble an object file, you should probably
+be using *objdump*(1).
+
+Auto-sync mode won't necessarily cure all your synchronisation
+problems: a sync marker can only be placed automatically if a
+jump or call instruction is found to refer to it 'before'
+*ndisasm* actually disassembles that part of the code. Also,
+if spurious jumps or calls result from disassembling
+non-machine-code data, sync markers may get placed in strange
+places. Feel free to turn auto-sync off and go back to doing
+it manually if necessary.
+
+SEE ALSO
+--------
+*objdump*(1)

_service:tar_scm:nasm-2.16.03.tar.xz/ndisasm.xml Added

@@ -0,0 +1,175 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!DOCTYPE refentry PUBLIC "-//OASIS//DTD DocBook XML V4.5//EN" "http://www.oasis-open.org/docbook/xml/4.5/docbookx.dtd">
+<?asciidoc-toc?>
+<?asciidoc-numbered?>
+<refentry lang="en">
+<refentryinfo>
+    <title>ndisasm(1)</title>
+</refentryinfo>
+<refmeta>
+<refentrytitle>ndisasm</refentrytitle>
+<manvolnum>1</manvolnum>
+<refmiscinfo class="source">NASM</refmiscinfo>
+<refmiscinfo class="manual">The Netwide Assembler Project</refmiscinfo>
+</refmeta>
+<refnamediv>
+    <refname>ndisasm</refname>
+    <refpurpose>the Netwide Disassembler, an 80x86 binary file disassembler</refpurpose>
+</refnamediv>
+<refsynopsisdiv id="_synopsis">
+<simpara><emphasis role="strong">ndisasm</emphasis>  <emphasis role="strong">-o</emphasis> origin   <emphasis role="strong">-s</emphasis> sync-point &#8230;  <emphasis role="strong">-a</emphasis> | <emphasis role="strong">-i</emphasis> 
+         <emphasis role="strong">-b</emphasis> bits   <emphasis role="strong">-u</emphasis>   <emphasis role="strong">-e</emphasis> hdrlen   <emphasis role="strong">-p</emphasis> vendor 
+         <emphasis role="strong">-k</emphasis> offset,length &#8230; infile</simpara>
+</refsynopsisdiv>
+<refsect1 id="_description">
+<title>DESCRIPTION</title>
+<simpara>The <emphasis role="strong">ndisasm</emphasis> command generates a disassembly listing of the binary file
+infile and directs it to stdout.</simpara>
+</refsect1>
+<refsect1 id="_options">
+<title>OPTIONS</title>
+<variablelist>
+<varlistentry>
+<term>
+<emphasis role="strong">-h</emphasis>
+</term>
+<listitem>
+<simpara>
+        Causes <emphasis role="strong">ndisasm</emphasis> to exit immediately, after giving a summary
+        of its invocation options.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-r</emphasis>|<emphasis role="strong">-v</emphasis>
+</term>
+<listitem>
+<simpara>
+        Causes <emphasis role="strong">ndisasm</emphasis> to exit immediately, after displaying its
+        version number.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-o</emphasis> <emphasis>origin</emphasis>
+</term>
+<listitem>
+<simpara>
+        Specifies the notional load address for the file. This
+        option causes <emphasis role="strong">ndisasm</emphasis> to get the addresses it lists
+        down the left hand margin, and the target addresses
+        of PC-relative jumps and calls, right.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-s</emphasis> <emphasis>sync-point</emphasis>
+</term>
+<listitem>
+<simpara>
+        Manually specifies a synchronisation address, such that
+        <emphasis role="strong">ndisasm</emphasis> will not output any machine instruction which
+        encompasses bytes on both sides of the address. Hence
+        the instruction which starts at that address will be
+        correctly disassembled.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-e</emphasis> <emphasis>hdrlen</emphasis>
+</term>
+<listitem>
+<simpara>
+        Specifies a number of bytes to discard from the beginning
+        of the file before starting disassembly. This does not
+        count towards the calculation of the disassembly offset:
+        the first <emphasis>disassembled</emphasis> instruction will be shown starting
+        at the given load address.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-k</emphasis> <emphasis>offset,length</emphasis>
+</term>
+<listitem>
+<simpara>
+        Specifies that <emphasis>length</emphasis> bytes, starting from disassembly
+        offset <emphasis>offset</emphasis>, should be skipped over without generating
+        any output. The skipped bytes still count towards the
+        calculation of the disassembly offset.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-a</emphasis>|<emphasis role="strong">-i</emphasis>
+</term>
+<listitem>
+<simpara>
+        Enables automatic (or intelligent) sync mode, in which
+        <emphasis role="strong">ndisasm</emphasis> will attempt to guess where synchronisation should
+        be performed, by means of examining the target addresses
+        of the relative jumps and calls it disassembles.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-b</emphasis> <emphasis>bits</emphasis>
+</term>
+<listitem>
+<simpara>
+        Specifies 16-, 32- or 64-bit mode. The default is 16-bit
+        mode.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-u</emphasis>
+</term>
+<listitem>
+<simpara>
+        Specifies 32-bit mode, more compactly than using &#8216;-b 32&#8217;.
+</simpara>
+</listitem>
+</varlistentry>
+<varlistentry>
+<term>
+<emphasis role="strong">-p</emphasis> <emphasis>vendor</emphasis>
+</term>
+<listitem>
+<simpara>
+        Prefers instructions as defined by <emphasis>vendor</emphasis> in case of
+        a conflict. Known <emphasis>vendor</emphasis> names include <emphasis role="strong">intel</emphasis>, <emphasis role="strong">amd</emphasis>,
+        <emphasis role="strong">cyrix</emphasis>, and <emphasis role="strong">idt</emphasis>. The default is <emphasis role="strong">intel</emphasis>.
+</simpara>
+</listitem>
+</varlistentry>
+</variablelist>
+</refsect1>
+<refsect1 id="_restrictions">
+<title>RESTRICTIONS</title>
+<simpara><emphasis role="strong">ndisasm</emphasis> only disassembles binary files: it has no understanding of
+the header information present in object or executable files.
+If you want to disassemble an object file, you should probably
+be using <emphasis role="strong">objdump</emphasis>(1).</simpara>
+<simpara>Auto-sync mode won&#8217;t necessarily cure all your synchronisation
+problems: a sync marker can only be placed automatically if a
+jump or call instruction is found to refer to it <emphasis>before</emphasis>
+<emphasis role="strong">ndisasm</emphasis> actually disassembles that part of the code. Also,
+if spurious jumps or calls result from disassembling
+non-machine-code data, sync markers may get placed in strange
+places. Feel free to turn auto-sync off and go back to doing
+it manually if necessary.</simpara>
+</refsect1>
+<refsect1 id="_see_also">
+<title>SEE ALSO</title>
+<simpara><emphasis role="strong">objdump</emphasis>(1)</simpara>
+</refsect1>
+</refentry>

_service:tar_scm:nasm-2.16.03.tar.xz/nsis Added

_service:tar_scm:nasm-2.16.03.tar.xz/nsis/NASMMultiUser.nsh Added

@@ -0,0 +1,478 @@
+/*
+
+MultiUser.nsh
+
+Installer configuration for multi-user Windows environments
+
+Copyright 2008-2009 Joost Verburg
+Updated 2016 by H. Peter Anvin to handle 64-bit Windows
+
+*/
+
+!ifndef MULTIUSER_INCLUDED
+!define MULTIUSER_INCLUDED
+!verbose push
+!verbose 3
+
+;Standard NSIS header files
+
+!ifdef MULTIUSER_MUI
+  !include MUI2.nsh
+!endif
+!include nsDialogs.nsh
+!include LogicLib.nsh
+!include WinVer.nsh
+!include FileFunc.nsh
+
+;Variables
+
+Var MultiUser.Privileges
+Var MultiUser.InstallMode
+
+;Command line installation mode setting
+
+!ifdef MULTIUSER_INSTALLMODE_COMMANDLINE
+  !include StrFunc.nsh
+  !ifndef StrStr_INCLUDED
+    ${StrStr}
+  !endif
+  !ifndef MULTIUSER_NOUNINSTALL
+    !ifndef UnStrStr_INCLUDED
+      ${UnStrStr}
+    !endif
+  !endif
+
+  Var MultiUser.Parameters
+  Var MultiUser.Result
+!endif
+
+;Installation folder stored in registry
+
+!ifdef MULTIUSER_INSTALLMODE_INSTDIR_REGISTRY_KEY & MULTIUSER_INSTALLMODE_INSTDIR_REGISTRY_VALUENAME
+  Var MultiUser.InstDir
+!endif
+
+!ifdef MULTIUSER_INSTALLMODE_DEFAULT_REGISTRY_KEY & MULTIUSER_INSTALLMODE_DEFAULT_REGISTRY_VALUENAME
+  Var MultiUser.DefaultKeyValue
+!endif
+
+;Windows Vista UAC setting
+
+!if "${MULTIUSER_EXECUTIONLEVEL}" == Admin
+  RequestExecutionLevel admin
+  !define MULTIUSER_EXECUTIONLEVEL_ALLUSERS
+!else if "${MULTIUSER_EXECUTIONLEVEL}" == Power
+  RequestExecutionLevel admin
+  !define MULTIUSER_EXECUTIONLEVEL_ALLUSERS
+!else if "${MULTIUSER_EXECUTIONLEVEL}" == Highest
+  RequestExecutionLevel highest
+  !define MULTIUSER_EXECUTIONLEVEL_ALLUSERS
+!else
+  RequestExecutionLevel user
+!endif
+
+/*
+
+Install modes
+
+*/
+
+!macro MULTIUSER_INSTALLMODE_ALLUSERS UNINSTALLER_PREFIX UNINSTALLER_FUNCPREFIX
+
+  ;Install mode initialization - per-machine
+
+  ${ifnot} ${IsNT}
+    ${orif} $MultiUser.Privileges == "Admin"
+    ${orif} $MultiUser.Privileges == "Power"
+
+    StrCpy $MultiUser.InstallMode AllUsers
+
+    SetShellVarContext all
+
+    !if "${UNINSTALLER_PREFIX}" != UN
+      ;Set default installation location for installer
+      !ifdef MULTIUSER_INSTALLMODE_INSTDIR
+        StrCpy $INSTDIR "${GLOBALINSTDIR}\${MULTIUSER_INSTALLMODE_INSTDIR}"
+      !endif
+    !endif
+
+    !ifdef MULTIUSER_INSTALLMODE_INSTDIR_REGISTRY_KEY & MULTIUSER_INSTALLMODE_INSTDIR_REGISTRY_VALUENAME
+
+      ReadRegStr $MultiUser.InstDir HKLM "${MULTIUSER_INSTALLMODE_INSTDIR_REGISTRY_KEY}" "${MULTIUSER_INSTALLMODE_INSTDIR_REGISTRY_VALUENAME}"
+
+      ${if} $MultiUser.InstDir != ""
+        StrCpy $INSTDIR $MultiUser.InstDir
+      ${endif}
+
+    !endif
+
+    !ifdef MULTIUSER_INSTALLMODE_${UNINSTALLER_PREFIX}FUNCTION
+      Call "${MULTIUSER_INSTALLMODE_${UNINSTALLER_PREFIX}FUNCTION}"
+    !endif
+
+  ${endif}
+
+!macroend
+
+!macro MULTIUSER_INSTALLMODE_CURRENTUSER UNINSTALLER_PREFIX UNINSTALLER_FUNCPREFIX
+
+  ;Install mode initialization - per-user
+
+  ${if} ${IsNT}
+
+    StrCpy $MultiUser.InstallMode CurrentUser
+
+    SetShellVarContext current
+
+    !if "${UNINSTALLER_PREFIX}" != UN
+      ;Set default installation location for installer
+      !ifdef MULTIUSER_INSTALLMODE_INSTDIR
+        ${if} ${AtLeastWin2000}
+          StrCpy $INSTDIR "$LOCALAPPDATA\bin\${MULTIUSER_INSTALLMODE_INSTDIR}"
+        ${else}
+          StrCpy $INSTDIR "${GLOBALINSTDIR}\${MULTIUSER_INSTALLMODE_INSTDIR}"
+        ${endif}
+      !endif
+    !endif
+
+    !ifdef MULTIUSER_INSTALLMODE_INSTDIR_REGISTRY_KEY & MULTIUSER_INSTALLMODE_INSTDIR_REGISTRY_VALUENAME
+
+      ReadRegStr $MultiUser.InstDir HKCU "${MULTIUSER_INSTALLMODE_INSTDIR_REGISTRY_KEY}" "${MULTIUSER_INSTALLMODE_INSTDIR_REGISTRY_VALUENAME}"
+
+      ${if} $MultiUser.InstDir != ""
+        StrCpy $INSTDIR $MultiUser.InstDir
+      ${endif}
+
+    !endif
+
+    !ifdef MULTIUSER_INSTALLMODE_${UNINSTALLER_PREFIX}FUNCTION
+      Call "${MULTIUSER_INSTALLMODE_${UNINSTALLER_PREFIX}FUNCTION}"
+    !endif
+
+  ${endif}
+
+!macroend
+
+Function MultiUser.InstallMode.AllUsers
+  !insertmacro MULTIUSER_INSTALLMODE_ALLUSERS "" ""
+FunctionEnd
+
+Function MultiUser.InstallMode.CurrentUser
+  !insertmacro MULTIUSER_INSTALLMODE_CURRENTUSER "" ""
+FunctionEnd
+
+!ifndef MULTIUSER_NOUNINSTALL
+
+Function un.MultiUser.InstallMode.AllUsers
+  !insertmacro MULTIUSER_INSTALLMODE_ALLUSERS UN .un
+FunctionEnd
+
+Function un.MultiUser.InstallMode.CurrentUser
+  !insertmacro MULTIUSER_INSTALLMODE_CURRENTUSER UN .un
+FunctionEnd
+
+!endif
+
+/*
+
+Installer/uninstaller initialization
+
+*/
+
+!macro MULTIUSER_INIT_QUIT UNINSTALLER_FUNCPREFIX
+
+  !ifdef MULTIUSER_INIT_${UNINSTALLER_FUNCPREFIX}FUNCTIONQUIT
+    Call "${MULTIUSER_INIT_${UNINSTALLER_FUNCPREFIX}FUCTIONQUIT}
+  !else
+    Quit
+  !endif
+
+!macroend
+
+!macro MULTIUSER_INIT_TEXTS
+
+  !ifndef MULTIUSER_INIT_TEXT_ADMINREQUIRED
+    !define MULTIUSER_INIT_TEXT_ADMINREQUIRED "$(^Caption) requires Administrator privileges."
+  !endif
+
+  !ifndef MULTIUSER_INIT_TEXT_POWERREQUIRED
+    !define MULTIUSER_INIT_TEXT_POWERREQUIRED "$(^Caption) requires at least Power User privileges."
+  !endif
+
+  !ifndef MULTIUSER_INIT_TEXT_ALLUSERSNOTPOSSIBLE
+    !define MULTIUSER_INIT_TEXT_ALLUSERSNOTPOSSIBLE "Your user account does not have sufficient privileges to install $(^Name) for all users of this compuetr."
+  !endif
+
+!macroend
+
+!macro MULTIUSER_INIT_CHECKS UNINSTALLER_PREFIX UNINSTALLER_FUNCPREFIX
+
+  ;Installer initialization - check privileges and set install mode
+
+  !insertmacro MULTIUSER_INIT_TEXTS
+
+  UserInfo::GetAccountType
+  Pop $MultiUser.Privileges
+
+  ${if} ${IsNT}
+
+    ;Check privileges
+
+    !if "${MULTIUSER_EXECUTIONLEVEL}" == Admin
+
+      ${if} $MultiUser.Privileges != "Admin"
+        MessageBox MB_OK|MB_ICONSTOP "${MULTIUSER_INIT_TEXT_ADMINREQUIRED}"
+        !insertmacro MULTIUSER_INIT_QUIT "${UNINSTALLER_FUNCPREFIX}"
+      ${endif}
+
+    !else if "${MULTIUSER_EXECUTIONLEVEL}" == Power
+
+      ${if} $MultiUser.Privileges != "Power"
+        ${andif} $MultiUser.Privileges != "Admin"
+        ${if} ${AtMostWinXP}
+           MessageBox MB_OK|MB_ICONSTOP "${MULTIUSER_INIT_TEXT_POWERREQUIRED}"
+        ${else}
+           MessageBox MB_OK|MB_ICONSTOP "${MULTIUSER_INIT_TEXT_ADMINREQUIRED}"
+        ${endif}
+        !insertmacro MULTIUSER_INIT_QUIT "${UNINSTALLER_FUNCPREFIX}"
+      ${endif}
+
+    !endif
+
+    !ifdef MULTIUSER_EXECUTIONLEVEL_ALLUSERS
+
+      ;Default to per-machine installation if possible
+
+      ${if} $MultiUser.Privileges == "Admin"
+        ${orif} $MultiUser.Privileges == "Power"
+        !ifndef MULTIUSER_INSTALLMODE_DEFAULT_CURRENTUSER
+          Call ${UNINSTALLER_FUNCPREFIX}MultiUser.InstallMode.AllUsers
+        !else
+          Call ${UNINSTALLER_FUNCPREFIX}MultiUser.InstallMode.CurrentUser
+        !endif
+
+        !ifdef MULTIUSER_INSTALLMODE_DEFAULT_REGISTRY_KEY & MULTIUSER_INSTALLMODE_DEFAULT_REGISTRY_VALUENAME
+
+          ;Set installation mode to setting from a previous installation
+
+          !ifndef MULTIUSER_INSTALLMODE_DEFAULT_CURRENTUSER
+            ReadRegStr $MultiUser.DefaultKeyValue HKLM "${MULTIUSER_INSTALLMODE_DEFAULT_REGISTRY_KEY}" "${MULTIUSER_INSTALLMODE_DEFAULT_REGISTRY_VALUENAME}"
+            ${if} $MultiUser.DefaultKeyValue == ""
+              ReadRegStr $MultiUser.DefaultKeyValue HKCU "${MULTIUSER_INSTALLMODE_DEFAULT_REGISTRY_KEY}" "${MULTIUSER_INSTALLMODE_DEFAULT_REGISTRY_VALUENAME}"
+              ${if} $MultiUser.DefaultKeyValue != ""
+                Call ${UNINSTALLER_FUNCPREFIX}MultiUser.InstallMode.CurrentUser
+              ${endif}
+            ${endif}
+          !else
+            ReadRegStr $MultiUser.DefaultKeyValue HKCU "${MULTIUSER_INSTALLMODE_DEFAULT_REGISTRY_KEY}" "${MULTIUSER_INSTALLMODE_DEFAULT_REGISTRY_VALUENAME}"
+            ${if} $MultiUser.DefaultKeyValue == ""
+              ReadRegStr $MultiUser.DefaultKeyValue HKLM "${MULTIUSER_INSTALLMODE_DEFAULT_REGISTRY_KEY}" "${MULTIUSER_INSTALLMODE_DEFAULT_REGISTRY_VALUENAME}"
+              ${if} $MultiUser.DefaultKeyValue != ""
+                Call ${UNINSTALLER_FUNCPREFIX}MultiUser.InstallMode.AllUsers
+              ${endif}
+            ${endif}
+          !endif
+
+        !endif
+
+      ${else}
+        Call ${UNINSTALLER_FUNCPREFIX}MultiUser.InstallMode.CurrentUser
+      ${endif}
+
+    !else
+
+      Call ${UNINSTALLER_FUNCPREFIX}MultiUser.InstallMode.CurrentUser
+
+    !endif
+
+    !ifdef MULTIUSER_INSTALLMODE_COMMANDLINE
+
+      ;Check for install mode setting on command line
+
+      ${${UNINSTALLER_FUNCPREFIX}GetParameters} $MultiUser.Parameters
+
+      ${${UNINSTALLER_PREFIX}StrStr} $MultiUser.Result $MultiUser.Parameters "/CurrentUser"
+
+      ${if} $MultiUser.Result != ""
+        Call ${UNINSTALLER_FUNCPREFIX}MultiUser.InstallMode.CurrentUser
+      ${endif}
+
+      ${${UNINSTALLER_PREFIX}StrStr} $MultiUser.Result $MultiUser.Parameters "/AllUsers"
+
+      ${if} $MultiUser.Result != ""
+        ${if} $MultiUser.Privileges == "Admin"
+          ${orif} $MultiUser.Privileges == "Power"
+          Call ${UNINSTALLER_FUNCPREFIX}MultiUser.InstallMode.AllUsers
+        ${else}
+          MessageBox MB_OK|MB_ICONSTOP "${MULTIUSER_INIT_TEXT_ALLUSERSNOTPOSSIBLE}"
+        ${endif}
+      ${endif}
+
+    !endif
+
+  ${else}
+
+    ;Not running Windows NT, per-user installation not supported
+
+    Call ${UNINSTALLER_FUNCPREFIX}MultiUser.InstallMode.AllUsers
+
+  ${endif}
+
+!macroend
+
+!macro MULTIUSER_INIT
+  !verbose push
+  !verbose 3
+
+  !insertmacro MULTIUSER_INIT_CHECKS "" ""
+
+  !verbose pop
+!macroend
+
+!ifndef MULTIUSER_NOUNINSTALL
+
+!macro MULTIUSER_UNINIT
+  !verbose push
+  !verbose 3
+
+  !insertmacro MULTIUSER_INIT_CHECKS Un un.
+
+  !verbose pop
+!macroend
+
+!endif
+
+/*
+
+Modern UI 2 page
+
+*/
+
+!ifdef MULTIUSER_MUI
+
+!macro MULTIUSER_INSTALLMODEPAGE_INTERFACE
+
+  !ifndef MULTIUSER_INSTALLMODEPAGE_INTERFACE
+    !define MULTIUSER_INSTALLMODEPAGE_INTERFACE
+    Var MultiUser.InstallModePage
+
+    Var MultiUser.InstallModePage.Text
+
+    Var MultiUser.InstallModePage.AllUsers
+    Var MultiUser.InstallModePage.CurrentUser
+
+    Var MultiUser.InstallModePage.ReturnValue
+  !endif
+
+!macroend
+
+!macro MULTIUSER_PAGEDECLARATION_INSTALLMODE
+
+  !insertmacro MUI_SET MULTIUSER_${MUI_PAGE_UNINSTALLER_PREFIX}INSTALLMODEPAGE ""
+  !insertmacro MULTIUSER_INSTALLMODEPAGE_INTERFACE
+
+  !insertmacro MUI_DEFAULT MULTIUSER_INSTALLMODEPAGE_TEXT_TOP "$(MULTIUSER_INNERTEXT_INSTALLMODE_TOP)"
+  !insertmacro MUI_DEFAULT MULTIUSER_INSTALLMODEPAGE_TEXT_ALLUSERS "$(MULTIUSER_INNERTEXT_INSTALLMODE_ALLUSERS)"
+  !insertmacro MUI_DEFAULT MULTIUSER_INSTALLMODEPAGE_TEXT_CURRENTUSER "$(MULTIUSER_INNERTEXT_INSTALLMODE_CURRENTUSER)"
+
+  PageEx custom
+
+    PageCallbacks MultiUser.InstallModePre_${MUI_UNIQUEID} MultiUser.InstallModeLeave_${MUI_UNIQUEID}
+
+    Caption " "
+
+  PageExEnd
+
+  !insertmacro MULTIUSER_FUNCTION_INSTALLMODEPAGE MultiUser.InstallModePre_${MUI_UNIQUEID} MultiUser.InstallModeLeave_${MUI_UNIQUEID}
+
+  !undef MULTIUSER_INSTALLMODEPAGE_TEXT_TOP
+  !undef MULTIUSER_INSTALLMODEPAGE_TEXT_ALLUSERS
+  !undef MULTIUSER_INSTALLMODEPAGE_TEXT_CURRENTUSER
+
+!macroend
+
+!macro MULTIUSER_PAGE_INSTALLMODE
+
+  ;Modern UI page for install mode
+
+  !verbose push
+  !verbose 3
+
+  !ifndef MULTIUSER_EXECUTIONLEVEL_ALLUSERS
+    !error "A mixed-mode installation requires MULTIUSER_EXECUTIONLEVEL to be set to Admin, Power or Highest."
+  !endif
+
+  !insertmacro MUI_PAGE_INIT
+  !insertmacro MULTIUSER_PAGEDECLARATION_INSTALLMODE
+
+  !verbose pop
+
+!macroend
+
+!macro MULTIUSER_FUNCTION_INSTALLMODEPAGE PRE LEAVE
+
+  !ifndef MULTIUSER_TEXT_NOTADMIN
+    !define MULTIUSER_TEXT_NOTADMIN "The installer is currently running as an unprivileged user.  It will not be possible to install this software for all users on the system.  Cancel and re-run the installer as Administrator to install system-wide."
+  !endif
+
+  ;Page functions of Modern UI page
+
+  Function "${PRE}"
+
+    ${ifnot} ${IsNT}
+      Abort
+    ${endif}
+
+    ${if} $MultiUser.Privileges != "Power"
+      ${andif} $MultiUser.Privileges != "Admin"
+	MessageBox MB_OKCANCEL "${MULTIUSER_TEXT_NOTADMIN}" /SD IDOK IDABORT nofun
+	Abort
+
+    nofun:
+	Quit
+    ${endif}
+
+    !insertmacro MUI_PAGE_FUNCTION_CUSTOM PRE
+    !insertmacro MUI_HEADER_TEXT_PAGE $(MULTIUSER_TEXT_INSTALLMODE_TITLE) $(MULTIUSER_TEXT_INSTALLMODE_SUBTITLE)
+
+    nsDialogs::Create 1018
+    Pop $MultiUser.InstallModePage
+
+    ${NSD_CreateLabel} 0u 0u 300u 20u "${MULTIUSER_INSTALLMODEPAGE_TEXT_TOP}"
+    Pop $MultiUser.InstallModePage.Text
+
+    ${NSD_CreateRadioButton} 20u 50u 280u 10u "${MULTIUSER_INSTALLMODEPAGE_TEXT_ALLUSERS}"
+    Pop $MultiUser.InstallModePage.AllUsers
+
+    ${NSD_CreateRadioButton} 20u 70u 280u 10u "${MULTIUSER_INSTALLMODEPAGE_TEXT_CURRENTUSER}"
+    Pop $MultiUser.InstallModePage.CurrentUser
+
+    ${if} $MultiUser.InstallMode == "AllUsers"
+      SendMessage $MultiUser.InstallModePage.AllUsers ${BM_SETCHECK} ${BST_CHECKED} 0
+    ${else}
+      SendMessage $MultiUser.InstallModePage.CurrentUser ${BM_SETCHECK} ${BST_CHECKED} 0
+    ${endif}
+
+    !insertmacro MUI_PAGE_FUNCTION_CUSTOM SHOW
+    nsDialogs::Show
+
+  FunctionEnd
+
+  Function "${LEAVE}"
+     SendMessage $MultiUser.InstallModePage.AllUsers ${BM_GETCHECK} 0 0 $MultiUser.InstallModePage.ReturnValue
+
+     ${if} $MultiUser.InstallModePage.ReturnValue = ${BST_CHECKED}
+        Call MultiUser.InstallMode.AllUsers
+     ${else}
+        Call MultiUser.InstallMode.CurrentUser
+     ${endif}
+
+    !insertmacro MUI_PAGE_FUNCTION_CUSTOM LEAVE
+  FunctionEnd
+
+!macroend
+
+!endif
+
+!verbose pop
+!endif

_service:tar_scm:nasm-2.16.03.tar.xz/nsis/getpearch.pl Added

@@ -0,0 +1,76 @@
+#!/usr/bin/perl
+#
+# Get the appropriate variables to make an NSIS installer file
+# based on the PE architecture of a specific file
+#
+
+use strict;
+use bytes;
+
+my %archnames = (
+    0x01de => 'am33',
+    0x8664 => 'x64',
+    0x01c0 => 'arm32',
+    0x01c4 => 'thumb',
+    0xaa64 => 'arm64',
+    0x0ebc => 'efi',
+    0x014c => 'x86',
+    0x0200 => 'ia64',
+    0x9041 => 'm32r',
+    0x0266 => 'mips16',
+    0x0366 => 'mips',
+    0x0466 => 'mips16',
+    0x01f0 => 'powerpc',
+    0x01f1 => 'powerpc',
+    0x0166 => 'mips',
+    0x01a2 => 'sh3',
+    0x01a3 => 'sh3',
+    0x01a6 => 'sh4',
+    0x01a8 => 'sh5',
+    0x01c2 => 'arm32',
+    0x0169 => 'wcemipsv2'
+);
+
+my ($file) = @ARGV;
+open(my $fh, '<', $file)
+    or die "$0: cannot open file: $file: $!\n";
+
+read($fh, my $mz, 2);
+exit 1 if ($mz ne 'MZ');
+
+exit 0 unless (seek($fh, 0x3c, 0));
+exit 0 unless (read($fh, my $pe_offset, 4) == 4);
+$pe_offset = unpack("V", $pe_offset);
+
+exit 1 unless (seek($fh, $pe_offset, 0));
+read($fh, my $pe, 4);
+exit 1 unless ($pe eq "PE\0\0");
+
+exit 1 unless (read($fh, my $arch, 2) == 2);
+$arch = $archnames{unpack("v", $arch)};
+if (defined($arch)) {
+    print "!define ARCH ${arch}\n";
+}
+
+exit 1 unless (seek($fh, 14, 1));
+exit 1 unless (read($fh, my $auxheaderlen, 2) == 2);
+exit 1 unless (unpack("v", $auxheaderlen) >= 2);
+
+exit 1 unless (seek($fh, 2, 1));
+exit 1 unless (read($fh, my $petype, 2) == 2);
+$petype = unpack("v", $petype);
+if ($petype == 0x010b) {
+    # It is a 32-bit PE32 file
+    print "!define BITS 32\n";
+    print "!define GLOBALINSTDIR \$PROGRAMFILES\n";
+} elsif ($petype == 0x020b) {
+    # It is a 64-bit PE32+ file
+    print "!define BITS 64\n";
+    print "!define GLOBALINSTDIR \$PROGRAMFILES64\n";
+} else {
+    # No idea...
+    exit 1;
+}
+
+close($fh);
+exit 0;

_service:tar_scm:nasm-2.16.03.tar.xz/nsis/nasm-un.ico Added

_service:tar_scm:nasm-2.16.03.tar.xz/nsis/nasm.ico Added

_service:tar_scm:nasm-2.16.03.tar.xz/nsis/nasm.nsi Added

@@ -0,0 +1,228 @@
+#!Nsis Installer Command Script
+
+#
+# Copyright (c) 2009, Shao Miller (shao.miller@yrdsb.edu.on.ca)
+# Copyright (c) 2009, Cyrill Gorcunov (gorcunov@gmail.com)
+# All rights reserved.
+#
+# The script requires NSIS v2.45 (or any later)
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#     * Redistributions of source code must retain the above copyright
+#       notice, this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# ''AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL <copyright holder> BE LIABLE FOR
+# ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+!addincludedir "${objdir}\nsis"
+!addincludedir "${srcdir}\nsis"
+!include "version.nsh"
+!include "arch.nsh"
+
+!define PRODUCT_NAME "Netwide Assembler"
+!define PRODUCT_SHORT_NAME "nasm"
+!define PACKAGE_NAME "${PRODUCT_NAME} ${VERSION}"
+!define PACKAGE_SHORT_NAME "${PRODUCT_SHORT_NAME}-${VERSION}"
+
+SetCompressor /solid lzma
+
+!if "${NSIS_PACKEDVERSION}" >= 0x3000000
+Unicode true
+!endif
+
+!define MULTIUSER_EXECUTIONLEVEL Highest
+!define MULTIUSER_MUI
+!define MULTIUSER_INSTALLMODE_COMMANDLINE
+!define MULTIUSER_INSTALLMODE_INSTDIR "NASM"
+!include "NASMMultiUser.nsh"
+
+!insertmacro MULTIUSER_PAGE_INSTALLMODE
+!insertmacro MULTIUSER_INSTALLMODEPAGE_INTERFACE
+
+;--------------------------------
+;General
+
+;Name and file
+Name "${PACKAGE_NAME}"
+OutFile "${objdir}\${PACKAGE_SHORT_NAME}-installer-${ARCH}.exe"
+
+;Get installation folder from registry if available
+InstallDirRegKey HKCU "Software\${PRODUCT_SHORT_NAME}" ""
+
+;Request application privileges for Windows Vista
+RequestExecutionLevel user
+
+;--------------------------------
+;Variables
+
+Var StartMenuFolder
+Var CmdFailed
+
+;--------------------------------
+;Interface Settings
+Caption "${PACKAGE_SHORT_NAME} installation"
+Icon "${srcdir}\nsis\nasm.ico"
+UninstallIcon "${srcdir}\nsis\nasm-un.ico"
+
+!define MUI_ABORTWARNING
+
+;--------------------------------
+;Pages
+
+!insertmacro MUI_PAGE_COMPONENTS
+!insertmacro MUI_PAGE_DIRECTORY
+
+;Start Menu Folder Page Configuration
+!define MUI_STARTMENUPAGE_REGISTRY_ROOT "HKCU"
+!define MUI_STARTMENUPAGE_REGISTRY_KEY "Software\${PRODUCT_SHORT_NAME}"
+!define MUI_STARTMENUPAGE_REGISTRY_VALUENAME "${PRODUCT_SHORT_NAME}"
+
+!insertmacro MUI_PAGE_STARTMENU Application $StartMenuFolder
+
+!insertmacro MUI_PAGE_INSTFILES
+
+!insertmacro MUI_UNPAGE_CONFIRM
+!insertmacro MUI_UNPAGE_INSTFILES
+
+;--------------------------------
+;Installer Sections
+
+!insertmacro MUI_LANGUAGE English
+
+Section "NASM" SecNasm
+    Sectionin RO
+    SetOutPath "$INSTDIR"
+    File "${srcdir}\LICENSE"
+    File "${objdir}\nasm.exe"
+    File "${objdir}\ndisasm.exe"
+    File "${srcdir}\nsis\nasm.ico"
+
+    ;Store installation folder
+    WriteRegStr HKCU "Software\${PRODUCT_SHORT_NAME}" "" $INSTDIR
+
+    ;Store shortcuts folder
+    WriteRegStr HKCU "Software\${PRODUCT_SHORT_NAME}\" "lnk" $SMPROGRAMS\$StartMenuFolder
+    WriteRegStr HKCU "Software\${PRODUCT_SHORT_NAME}\" "bat-lnk" $DESKTOP\${PRODUCT_SHORT_NAME}.lnk
+
+    ;
+    ; the bat we need
+    StrCpy $CmdFailed "true"
+    FileOpen $0 "nasmpath.bat" w
+    IfErrors skip
+    StrCpy $CmdFailed "false"
+    FileWrite $0 "@set path=$INSTDIR;%path%$\r$\n"
+    FileWrite $0 "@%comspec%"
+    FileClose $0
+    CreateShortCut "$DESKTOP\${PRODUCT_SHORT_NAME}.lnk" "$INSTDIR\nasmpath.bat" "" "$INSTDIR\nasm.ico" 0
+skip:
+    ;Create uninstaller
+    WriteUninstaller "$INSTDIR\Uninstall.exe"
+
+    !insertmacro MUI_STARTMENU_WRITE_BEGIN Application
+
+    ;Create shortcuts
+    CreateDirectory "$SMPROGRAMS\$StartMenuFolder"
+    StrCmp $CmdFailed "true" +2
+    CreateShortCut "$SMPROGRAMS\$StartMenuFolder\${PRODUCT_SHORT_NAME}-shell.lnk" "$INSTDIR\nasmpath.bat"
+    CreateShortCut  "$SMPROGRAMS\$StartMenuFolder\${PRODUCT_SHORT_NAME}.lnk" "$INSTDIR\nasm.exe" "" "$INSTDIR\nasm.ico" 0
+    CreateShortCut  "$SMPROGRAMS\$StartMenuFolder\Uninstall.lnk" "$INSTDIR\Uninstall.exe"
+
+    !insertmacro MUI_STARTMENU_WRITE_END
+SectionEnd
+
+Section "Manual" SecManual
+    SetOutPath "$INSTDIR"
+    File "${objdir}\doc\nasmdoc.pdf"
+    CreateShortCut "$SMPROGRAMS\$StartMenuFolder\Manual.lnk" "$INSTDIR\nasmdoc.pdf"
+SectionEnd
+
+Section "VS8 integration" SecVS8
+    CreateDirectory "$INSTDIR\VSrules"
+    SetOutPath "$INSTDIR\VSrules"
+    File "${srcdir}\contrib\VSrules\nasm.README"
+    File "${srcdir}\contrib\VSrules\nasm.rules"
+SectionEnd
+
+;--------------------------------
+;Descriptions
+
+    ;Language strings
+    LangString DESC_SecNasm ${LANG_ENGLISH}     "NASM assembler and disassember modules"
+    LangString DESC_SecManual ${LANG_ENGLISH}   "Complete NASM manual (pdf file)"
+    LangString DESC_SecVS8 ${LANG_ENGLISH}      "Visual Studio 2008 NASM integration (rules file)"
+
+    ;Assign language strings to sections
+    !insertmacro MUI_FUNCTION_DESCRIPTION_BEGIN
+    !insertmacro MUI_DESCRIPTION_TEXT ${SecNasm} $(DESC_SecNasm)
+    !insertmacro MUI_DESCRIPTION_TEXT ${SecManual} $(DESC_SecManual)
+    !insertmacro MUI_DESCRIPTION_TEXT ${SecVS8} $(DESC_SecVS8)
+    !insertmacro MUI_FUNCTION_DESCRIPTION_END
+
+;--------------------------------
+;Uninstaller Section
+
+Section "Uninstall"
+    ;
+    ; files on HDD
+    IfFileExists "$INSTDIR" +3 +1
+        MessageBox MB_OK "No files found, aborting."
+        Abort
+        MessageBox MB_YESNO "The following directory will be deleted$\n$INSTDIR" IDYES rm_instdir_true IDNO rm_instdir_false
+        rm_instdir_true:
+            RMDir /r /rebootok "$INSTDIR"
+        rm_instdir_false:
+
+    ;
+    ; Desktop link
+    ReadRegStr $0 HKCU Software\${PRODUCT_SHORT_NAME} "bat-lnk"
+    StrCmp $0 0 +1 +3
+        MessageBox MB_OK "Invalid path to a bat-lnk file, aborting"
+        Abort
+    IfFileExists $0 +3 +1
+        MessageBox MB_OK "No bat-lnk files found, aborting."
+        Abort
+        MessageBox MB_YESNO "The following file will be deleted$\n$0" IDYES rm_batlinks_true IDNO rm_batlinks_false
+        rm_batlinks_true:
+            Delete /rebootok "$0"
+            RMDir "$0"
+        rm_batlinks_false:
+
+    ;
+    ; Start menu folder
+    ReadRegStr $0 HKCU Software\${PRODUCT_SHORT_NAME} "lnk"
+    StrCmp $0 0 +1 +3
+        MessageBox MB_OK "Invalid path to a lnk file, aborting"
+        Abort
+    IfFileExists $0 +3 +1
+        MessageBox MB_OK "No lnk files found, aborting."
+        Abort
+        MessageBox MB_YESNO "The following directory will be deleted$\n$0" IDYES rm_links_true IDNO rm_links_false
+        rm_links_true:
+            Delete /rebootok "$0\*"
+            RMDir "$0"
+        rm_links_false:
+    DeleteRegKey /ifempty HKCU "Software\${PRODUCT_SHORT_NAME}"
+SectionEnd
+
+;
+; MUI requires this hooks
+Function .onInit
+    SetRegView ${BITS}
+    !insertmacro MULTIUSER_INIT
+FunctionEnd
+
+Function un.onInit
+    !insertmacro MULTIUSER_UNINIT
+FunctionEnd

_service:tar_scm:nasm-2.16.03.tar.xz/nsis/version.nsh Added

_service:tar_scm:nasm-2.16.03.tar.xz/output Added

_service:tar_scm:nasm-2.16.03.tar.xz/output/codeview.c Added

@@ -0,0 +1,820 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2020 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * codeview.c Codeview Debug Format support for COFF
+ */
+
+#include "version.h"
+#include "compiler.h"
+
+
+#include "nasm.h"
+#include "nasmlib.h"
+#include "error.h"
+#include "preproc.h"
+#include "saa.h"
+#include "hashtbl.h"
+#include "outlib.h"
+#include "pecoff.h"
+#include "md5.h"
+
+static void cv8_init(void);
+static void cv8_linenum(const char *filename, int32_t linenumber,
+        int32_t segto);
+static void cv8_deflabel(char *name, int32_t segment, int64_t offset,
+        int is_global, char *special);
+static void cv8_typevalue(int32_t type);
+static void cv8_output(int type, void *param);
+static void cv8_cleanup(void);
+
+const struct dfmt df_cv8 = {
+    "Codeview 8+",              /* .fullname */
+    "cv8",                      /* .shortname */
+    cv8_init,                   /* .init */
+    cv8_linenum,                /* .linenum */
+    cv8_deflabel,               /* .debug_deflabel */
+    NULL,                       /* .debug_smacros */
+    NULL,                       /* .debug_include */
+    NULL,                       /* .debug_mmacros */
+    null_debug_directive,       /* .debug_directive */
+    cv8_typevalue,              /* .debug_typevalue */
+    cv8_output,                 /* .debug_output */
+    cv8_cleanup,                /* .cleanup */
+    NULL                        /* pragma list */
+};
+
+/*******************************************************************************
+ * dfmt callbacks
+ ******************************************************************************/
+struct source_file;
+
+struct source_file {
+    const char *filename;
+    char *fullname;
+    uint32_t fullnamelen;
+
+    struct source_file *next;
+
+    uint32_t filetbl_off;
+    uint32_t sourcetbl_off;
+
+    struct SAA *lines;
+    uint32_t num_lines;
+
+    unsigned char md5sumMD5_HASHBYTES;
+};
+
+struct linepair {
+    uint32_t file_offset;
+    uint32_t linenumber;
+};
+
+enum symbol_type {
+    SYMTYPE_CODE,
+    SYMTYPE_PROC,
+    SYMTYPE_LDATA,
+    SYMTYPE_GDATA,
+
+    SYMTYPE_MAX
+};
+
+struct cv8_symbol {
+    enum symbol_type type;
+    char *name;
+
+    uint32_t secrel;
+    uint16_t section;
+    uint32_t size;
+    uint32_t typeindex;
+
+    enum symtype {
+        TYPE_UNREGISTERED = 0x0000, /* T_NOTYPE */
+        TYPE_BYTE = 0x0020,
+        TYPE_WORD = 0x0021,
+        TYPE_DWORD= 0x0022,
+        TYPE_QUAD = 0x0023,
+
+        TYPE_REAL32 = 0x0040,
+        TYPE_REAL64 = 0x0041,
+        TYPE_REAL80 = 0x0042,
+        TYPE_REAL128= 0x0043,
+        TYPE_REAL256= 0x0044,
+        TYPE_REAL512= 0x0045
+    } symtype;
+};
+
+struct cv8_state {
+    int symbol_sect;
+    int type_sect;
+
+    uint32_t text_offset;
+
+    struct source_file *source_files, **source_files_tail;
+    const char *last_filename;
+    struct source_file *last_source_file;
+    struct hash_table file_hash;
+    unsigned num_files;
+    uint32_t total_filename_len;
+
+
+    unsigned total_lines;
+
+    struct SAA *symbols;
+    struct cv8_symbol *last_sym;
+    unsigned num_symsSYMTYPE_MAX;
+    unsigned symbol_lengths;
+    unsigned total_syms;
+
+    struct {
+        char *name;
+        size_t namebytes;
+    } outfile;
+};
+struct cv8_state cv8_state;
+
+static void cv8_init(void)
+{
+    const uint32_t sect_flags =     IMAGE_SCN_MEM_READ |
+                    IMAGE_SCN_MEM_DISCARDABLE |
+                    IMAGE_SCN_CNT_INITIALIZED_DATA |
+                    IMAGE_SCN_ALIGN_1BYTES;
+
+    cv8_state.symbol_sect = coff_make_section(".debug$S", sect_flags);
+    cv8_state.type_sect = coff_make_section(".debug$T", sect_flags);
+
+    cv8_state.text_offset = 0;
+
+    cv8_state.source_files = NULL;
+    cv8_state.source_files_tail = &cv8_state.source_files;
+
+    cv8_state.num_files = 0;
+    cv8_state.total_filename_len = 0;
+
+    cv8_state.total_lines = 0;
+
+    cv8_state.symbols = saa_init(sizeof(struct cv8_symbol));
+    cv8_state.last_sym = NULL;
+}
+
+static struct source_file *register_file(const char *filename);
+static struct coff_Section *find_section(int32_t segto);
+
+static void cv8_linenum(const char *filename, int32_t linenumber,
+        int32_t segto)
+{
+    struct coff_Section *s;
+    struct linepair *li;
+    struct source_file *file;
+
+    file = register_file(filename);
+
+    s = find_section(segto);
+    if (s == NULL)
+        return;
+
+    if ((s->flags & IMAGE_SCN_MEM_EXECUTE) == 0)
+        return;
+
+    li = saa_wstruct(file->lines);
+    li->file_offset = cv8_state.text_offset;
+    li->linenumber = linenumber;
+
+    file->num_lines++;
+    cv8_state.total_lines++;
+}
+
+static void cv8_deflabel(char *name, int32_t segment, int64_t offset,
+        int is_global, char *special)
+{
+    struct cv8_symbol *sym;
+    struct coff_Section *s;
+
+    (void)special;
+
+    s = find_section(segment);
+    if (s == NULL)
+        return;
+
+    sym = saa_wstruct(cv8_state.symbols);
+
+    if (s->flags & IMAGE_SCN_MEM_EXECUTE)
+        sym->type = is_global ? SYMTYPE_PROC : SYMTYPE_CODE;
+    else
+        sym->type = is_global ?  SYMTYPE_GDATA : SYMTYPE_LDATA;
+    cv8_state.num_symssym->type++;
+    cv8_state.total_syms++;
+
+    sym->section = segment;
+    sym->secrel = offset;
+    sym->symtype = TYPE_UNREGISTERED;
+    sym->size = 0;
+    sym->typeindex = 0;
+
+    sym->name = nasm_strdup(name);
+    cv8_state.symbol_lengths += strlen(sym->name) + 1;
+
+    if (cv8_state.last_sym && cv8_state.last_sym->section == segment)
+        cv8_state.last_sym->size = offset - cv8_state.last_sym->secrel;
+    cv8_state.last_sym = sym;
+}
+
+static void cv8_typevalue(int32_t type)
+{
+    if (!cv8_state.last_sym)
+        return;
+    if (cv8_state.last_sym->symtype != TYPE_UNREGISTERED)
+        return;
+
+    switch (TYM_TYPE(type)) {
+    case TY_BYTE:
+        cv8_state.last_sym->symtype = TYPE_BYTE;
+        break;
+    case TY_WORD:
+        cv8_state.last_sym->symtype = TYPE_WORD;
+        break;
+    case TY_DWORD:
+        cv8_state.last_sym->symtype = TYPE_DWORD;
+        break;
+    case TY_QWORD:
+        cv8_state.last_sym->symtype = TYPE_QUAD;
+        break;
+    case TY_FLOAT:
+        cv8_state.last_sym->symtype = TYPE_REAL32;
+        break;
+    case TY_TBYTE:
+        cv8_state.last_sym->symtype = TYPE_REAL80;
+        break;
+    case TY_OWORD:
+        cv8_state.last_sym->symtype = TYPE_REAL128;
+        break;
+    case TY_YWORD:
+        cv8_state.last_sym->symtype = TYPE_REAL256;
+        break;
+    case TY_ZWORD:
+        cv8_state.last_sym->symtype = TYPE_REAL512;
+        break;
+    case TY_UNKNOWN:
+        break;
+    case TY_LABEL:
+        break;
+    }
+}
+
+static void cv8_output(int type, void *param)
+{
+    struct coff_DebugInfo *dinfo = param;
+
+    (void)type;
+
+    if (dinfo->section && dinfo->section->name &&
+    !strncmp(dinfo->section->name, ".text", 5))
+        cv8_state.text_offset += dinfo->size;
+}
+
+static void build_symbol_table(struct coff_Section *const sect);
+static void build_type_table(struct coff_Section *const sect);
+
+static void cv8_cleanup(void)
+{
+    struct cv8_symbol *sym;
+    struct source_file *file, *ftmp;
+
+    struct coff_Section *symbol_sect = coff_sectscv8_state.symbol_sect;
+    struct coff_Section *type_sect = coff_sectscv8_state.type_sect;
+
+    cv8_state.outfile.name = nasm_realpath(outname);
+    cv8_state.outfile.namebytes = strlen(cv8_state.outfile.name) + 1;
+
+    build_symbol_table(symbol_sect);
+    build_type_table(type_sect);
+
+    list_for_each_safe(file, ftmp, cv8_state.source_files) {
+        nasm_free(file->fullname);
+        saa_free(file->lines);
+        nasm_free(file);
+    }
+    hash_free(&cv8_state.file_hash);
+
+    saa_rewind(cv8_state.symbols);
+    while ((sym = saa_rstruct(cv8_state.symbols)))
+        nasm_free(sym->name);
+    saa_free(cv8_state.symbols);
+
+    nasm_free(cv8_state.outfile.name);
+}
+
+/*******************************************************************************
+ * implementation
+ ******************************************************************************/
+static void calc_md5(const char *const filename,
+        unsigned char sumMD5_HASHBYTES)
+{
+    int success = 0;
+    unsigned char *file_buf;
+    FILE *f;
+    MD5_CTX ctx;
+
+    f = pp_input_fopen(filename, NF_BINARY);
+    if (!f)
+        goto done;
+
+    file_buf = nasm_zalloc(BUFSIZ);
+
+    MD5Init(&ctx);
+    while (!feof(f)) {
+        size_t i = fread(file_buf, 1, BUFSIZ, f);
+        if (ferror(f))
+            goto done_0;
+        else if (i == 0)
+            break;
+        MD5Update(&ctx, file_buf, i);
+    }
+    MD5Final(sum, &ctx);
+
+    success = 1;
+done_0:
+    nasm_free(file_buf);
+    fclose(f);
+done:
+    if (!success) {
+        nasm_nonfatal("unable to hash file %s. "
+                      "Debug information may be unavailable.",
+                      filename);
+    }
+    return;
+}
+
+static struct source_file *register_file(const char *filename)
+{
+    struct source_file *file;
+    void **filep;
+    char *fullpath;
+    struct hash_insert hi;
+
+    /*
+     * The common case is that we are invoked with the same filename
+     * as we were last time.  Make this a pointer comparison: this is
+     * safe because the NASM core code allocates each filename once
+     * and never frees it.
+     */
+    if (likely(cv8_state.last_filename == filename))
+        return cv8_state.last_source_file;
+
+    cv8_state.last_filename = filename;
+
+    filep = hash_find(&cv8_state.file_hash, filename, &hi);
+    if (likely(filep)) {
+        file = *filep;
+    } else {
+        /* New filename encounter */
+
+        fullpath = nasm_realpath(filename);
+
+        nasm_new(file);
+        file->filename = filename;
+        file->fullname = fullpath;
+        file->fullnamelen = strlen(fullpath);
+        file->lines = saa_init(sizeof(struct linepair));
+        *cv8_state.source_files_tail = file;
+        cv8_state.source_files_tail = &file->next;
+        calc_md5(fullpath, file->md5sum);
+
+        hash_add(&hi, filename, file);
+
+        cv8_state.num_files++;
+        cv8_state.total_filename_len += file->fullnamelen + 1;
+    }
+
+    cv8_state.last_source_file = file;
+    return file;
+}
+
+static struct coff_Section *find_section(int32_t segto)
+{
+    int i;
+
+    for (i = 0; i < coff_nsects; i++) {
+        struct coff_Section *sec;
+
+        sec = coff_sectsi;
+        if (segto == sec->index)
+            return sec;
+    }
+    return NULL;
+}
+
+static void register_reloc(struct coff_Section *const sect,
+        char *sym, uint32_t addr, uint16_t type)
+{
+    struct coff_Reloc *r;
+    struct coff_Section *sec;
+    uint32_t i;
+
+    r = *sect->tail = nasm_malloc(sizeof(struct coff_Reloc));
+    sect->tail = &r->next;
+    r->next = NULL;
+    sect->nrelocs++;
+
+    r->address = addr;
+    r->symbase = SECT_SYMBOLS;
+    r->type = type;
+
+    r->symbol = 0;
+    for (i = 0; i < (uint32_t)coff_nsects; i++) {
+        sec = coff_sectsi;
+        if (!strcmp(sym, sec->name)) {
+            return;
+        }
+        r->symbol += 2;
+    }
+
+    saa_rewind(coff_syms);
+    for (i = 0; i < coff_nsyms; i++) {
+        struct coff_Symbol *s = saa_rstruct(coff_syms);
+        r->symbol++;
+        if (s->strpos == -1 && !strcmp(sym, s->name)) {
+            return;
+        } else if (s->strpos != -1) {
+            int res;
+            char *symname;
+
+            symname = nasm_malloc(s->namlen + 1);
+            saa_fread(coff_strs, s->strpos-4, symname, s->namlen);
+            symnames->namlen = '\0';
+            res = strcmp(sym, symname);
+            nasm_free(symname);
+            if (!res)
+                return;
+        }
+    }
+    nasm_panic("codeview: relocation for unregistered symbol: %s", sym);
+}
+
+static inline void section_write32(struct coff_Section *sect, uint32_t val)
+{
+    saa_write32(sect->data, val);
+    sect->len += 4;
+}
+
+static inline void section_write16(struct coff_Section *sect, uint16_t val)
+{
+    saa_write16(sect->data, val);
+    sect->len += 2;
+}
+
+static inline void section_write8(struct coff_Section *sect, uint8_t val)
+{
+    saa_write8(sect->data, val);
+    sect->len++;
+}
+
+static inline void section_wbytes(struct coff_Section *sect, const void *buf,
+        size_t len)
+{
+    saa_wbytes(sect->data, buf, len);
+    sect->len += len;
+}
+
+static void write_filename_table(struct coff_Section *const sect)
+{
+    uint32_t field_length;
+    uint32_t tbl_off = 1;    /* offset starts at 1 to skip NULL entry */
+    struct source_file *file;
+
+    nasm_assert(cv8_state.source_files != NULL);
+    nasm_assert(cv8_state.num_files > 0);
+    nasm_assert(cv8_state.total_filename_len > 0);
+
+    field_length = 1 + cv8_state.total_filename_len;
+
+    section_write32(sect, 0x000000F3);
+    section_write32(sect, field_length);
+
+    section_write8(sect, 0);
+
+    list_for_each(file, cv8_state.source_files) {
+        section_wbytes(sect, file->fullname, file->fullnamelen + 1);
+        file->filetbl_off = tbl_off;
+        tbl_off += file->fullnamelen + 1;
+    }
+}
+
+static void write_sourcefile_table(struct coff_Section *const sect)
+{
+    const uint32_t entry_size = 4 + 2 + MD5_HASHBYTES + 2;
+
+    uint32_t field_length = 0;
+    uint32_t tbl_off = 0;
+    struct source_file *file;
+
+    field_length = entry_size * cv8_state.num_files;
+
+    section_write32(sect, 0x000000F4);
+    section_write32(sect, field_length);
+
+    list_for_each(file, cv8_state.source_files) {
+        nasm_assert(file->filetbl_off > 0);
+        section_write32(sect, file->filetbl_off);
+        section_write16(sect, 0x0110);
+        section_wbytes(sect, file->md5sum, MD5_HASHBYTES);
+        section_write16(sect, 0);
+
+        file->sourcetbl_off = tbl_off;
+        tbl_off += entry_size;
+    }
+}
+
+static void write_linenumber_table(struct coff_Section *const sect)
+{
+    const uint32_t file_field_len = 12;
+    const uint32_t line_field_len = 8;
+
+    int i;
+    uint32_t field_length = 0;
+    size_t field_base;
+    struct source_file *file;
+    struct coff_Section *s;
+
+    for (i = 0; i < coff_nsects; i++) {
+        if (!strncmp(coff_sectsi->name, ".text", 5))
+            break;
+    }
+
+    if (i == coff_nsects)
+        return;
+    s = coff_sectsi;
+
+    field_length = 12;
+    field_length += (cv8_state.num_files * file_field_len);
+    field_length += (cv8_state.total_lines * line_field_len);
+
+    section_write32(sect, 0x000000F2);
+    section_write32(sect, field_length);
+
+    field_base = sect->len;
+    section_write32(sect, 0); /* SECREL, updated by relocation */
+    section_write16(sect, 0); /* SECTION, updated by relocation*/
+    section_write16(sect, 0); /* pad */
+    section_write32(sect, s->len);
+
+    register_reloc(sect, ".text", field_base,
+        win64 ? IMAGE_REL_AMD64_SECREL : IMAGE_REL_I386_SECREL);
+
+    register_reloc(sect, ".text", field_base + 4,
+        win64 ? IMAGE_REL_AMD64_SECTION : IMAGE_REL_I386_SECTION);
+
+    list_for_each(file, cv8_state.source_files) {
+        struct linepair *li;
+
+        /* source mapping */
+        section_write32(sect, file->sourcetbl_off);
+        section_write32(sect, file->num_lines);
+        section_write32(sect, file_field_len + (file->num_lines * line_field_len));
+
+        /* the pairs */
+        saa_rewind(file->lines);
+        while ((li = saa_rstruct(file->lines))) {
+            section_write32(sect, li->file_offset);
+            section_write32(sect, li->linenumber |= 0x80000000);
+        }
+    }
+}
+
+static uint32_t write_symbolinfo_obj(struct coff_Section *sect)
+{
+    uint32_t obj_len;
+
+    obj_len = 2 + 4 + cv8_state.outfile.namebytes;
+
+    section_write16(sect, obj_len);
+    section_write16(sect, 0x1101);
+    section_write32(sect, 0); /* ASM language */
+    section_wbytes(sect, cv8_state.outfile.name, cv8_state.outfile.namebytes);
+
+    return obj_len;
+}
+
+static uint32_t write_symbolinfo_properties(struct coff_Section *sect,
+        const char *const creator_str)
+{
+    /* https://github.com/Microsoft/microsoft-pdb/blob/1d60e041/include/cvinfo.h#L3313 */
+    uint32_t creator_len;
+
+    creator_len = 2 + 4 + 2 + 3*2 + 3*2 + strlen(creator_str)+1 + 2;
+
+    /*
+     * We used to use a language ID of 3 for "MASM", since it's closest of the
+     * options available; however, BinScope from WACK (the Windows Application
+     * Certification Kit) tests for specific minimum MASM versions and trying to
+     * match an increasing sequence of random MASM version/build numbers seems
+     * like a fool's errand.
+     *
+     * Instead, use a different language ID (NASM is, after all, not MASM
+     * syntax) and just write the actual NASM version number. BinScope appears
+     * to be happy with that.
+     */
+
+    section_write16(sect, creator_len);
+    section_write16(sect, 0x1116);
+    section_write32(sect, 'N'); /* language: 'N' (0x4e) for "NASM"; flags are 0 */
+    if (win64)
+        section_write16(sect, 0x00D0); /* machine */
+    else if (win32)
+        section_write16(sect, 0x0006); /* machine */
+    else
+        nasm_panic("neither win32 nor win64 are set!");
+    section_write16(sect, 0); /* verFEMajor */
+    section_write16(sect, 0); /* verFEMinor */
+    section_write16(sect, 0); /* verFEBuild */
+
+    /* BinScope/WACK insist on version >= 8.0.50727 */
+    section_write16(sect, NASM_MAJOR_VER); /* verMajor */
+    section_write16(sect, NASM_MINOR_VER); /* verMinor */
+    section_write16(sect, NASM_SUBMINOR_VER*100 + NASM_PATCHLEVEL_VER); /* verBuild */
+
+    section_wbytes(sect, creator_str, strlen(creator_str)+1); /* verSt */
+    /*
+     * normally there would be key/value pairs here, but they aren't
+     * necessary. They are terminated by 2B
+     */
+    section_write16(sect, 0);
+
+    return creator_len;
+}
+
+static uint32_t write_symbolinfo_symbols(struct coff_Section *sect)
+{
+    uint32_t len = 0, field_len;
+    uint32_t field_base;
+    struct cv8_symbol *sym;
+
+    saa_rewind(cv8_state.symbols);
+    while ((sym = saa_rstruct(cv8_state.symbols))) {
+        switch (sym->type) {
+        case SYMTYPE_LDATA:
+        case SYMTYPE_GDATA:
+            field_len = 12 + strlen(sym->name) + 1;
+            len += field_len - 2;
+            section_write16(sect, field_len);
+            if (sym->type == SYMTYPE_LDATA)
+                section_write16(sect, 0x110C);
+            else
+                section_write16(sect, 0x110D);
+            section_write32(sect, sym->symtype);
+
+            field_base = sect->len;
+            section_write32(sect, 0); /* SECREL */
+            section_write16(sect, 0); /* SECTION */
+            break;
+        case SYMTYPE_PROC:
+        case SYMTYPE_CODE:
+            field_len = 9 + strlen(sym->name) + 1;
+            len += field_len - 2;
+            section_write16(sect, field_len);
+            section_write16(sect, 0x1105);
+
+            field_base = sect->len;
+            section_write32(sect, 0); /* SECREL */
+            section_write16(sect, 0); /* SECTION */
+            section_write8(sect, 0); /* FLAG */
+            break;
+        default:
+            nasm_panic("unknown symbol type");
+        }
+
+        section_wbytes(sect, sym->name, strlen(sym->name) + 1);
+
+        register_reloc(sect, sym->name, field_base,
+            win64 ? IMAGE_REL_AMD64_SECREL :
+                IMAGE_REL_I386_SECREL);
+        register_reloc(sect, sym->name, field_base + 4,
+            win64 ? IMAGE_REL_AMD64_SECTION :
+                IMAGE_REL_I386_SECTION);
+    }
+
+    return len;
+}
+
+static void write_symbolinfo_table(struct coff_Section *const sect)
+{
+    static const char creator_str = "The Netwide Assembler " NASM_VER;
+    uint32_t obj_length, creator_length, sym_length;
+    uint32_t field_length = 0, out_len;
+
+    nasm_assert(cv8_state.outfile.namebytes);
+
+    /* signature, language, outfile NULL */
+    obj_length = 2 + 4 + cv8_state.outfile.namebytes;
+    creator_length = 2 + 4 + 2 + 3*2 + 3*2 + strlen(creator_str)+1 + 2;
+
+    sym_length =    ( cv8_state.num_symsSYMTYPE_CODE *  7) +
+            ( cv8_state.num_symsSYMTYPE_PROC *  7) +
+            ( cv8_state.num_symsSYMTYPE_LDATA * 10) +
+            ( cv8_state.num_symsSYMTYPE_GDATA * 10) +
+            cv8_state.symbol_lengths;
+
+    field_length = 2 + obj_length +
+               2 + creator_length +
+               (4 * cv8_state.total_syms) + sym_length;
+
+    section_write32(sect, 0x000000F1);
+    section_write32(sect, field_length);
+
+    /* for sub fields, length proceeds type */
+
+    out_len = write_symbolinfo_obj(sect);
+    nasm_assert(out_len == obj_length);
+
+    out_len = write_symbolinfo_properties(sect, creator_str);
+    nasm_assert(out_len == creator_length);
+
+    out_len = write_symbolinfo_symbols(sect);
+    nasm_assert(out_len == sym_length);
+}
+
+static inline void align4_table(struct coff_Section *const sect)
+{
+    unsigned diff;
+    uint32_t zero = 0;
+    struct SAA *data = sect->data;
+
+    if (data->wptr % 4 == 0)
+        return;
+
+    diff = 4 - (data->wptr % 4);
+    if (diff)
+        section_wbytes(sect, &zero, diff);
+}
+
+static void build_symbol_table(struct coff_Section *const sect)
+{
+    section_write32(sect, 0x00000004);
+
+    write_filename_table(sect);
+    align4_table(sect);
+    write_sourcefile_table(sect);
+    align4_table(sect);
+    write_linenumber_table(sect);
+    align4_table(sect);
+    write_symbolinfo_table(sect);
+    align4_table(sect);
+}
+
+static void build_type_table(struct coff_Section *const sect)
+{
+    uint32_t field_len;
+    uint32_t typeindex = 0x1000;
+    uint32_t idx_arglist;
+
+    section_write32(sect, 0x00000004);
+
+    /* empty argument list type */
+    field_len = 2 + 4;
+    section_write16(sect, field_len);
+    section_write16(sect, 0x1201); /* ARGLIST */
+    section_write32(sect, 0); /* num params */
+    idx_arglist = typeindex++;
+
+    /* procedure type: void proc(void) */
+    field_len = 2 + 4 + 1 + 1 + 2 + 4;
+    section_write16(sect, field_len);
+    section_write16(sect, 0x1008); /* PROC type */
+
+    section_write32(sect, 0x00000003); /* return type VOID */
+    section_write8(sect, 0);  /* calling convention (default) */
+    section_write8(sect, 0);  /* function attributes */
+    section_write16(sect, 0); /* # params */
+    section_write32(sect, idx_arglist); /* argument list type */
+    /* idx_voidfunc = typeindex++; */
+}

_service:tar_scm:nasm-2.16.03.tar.xz/output/dwarf.h Added

@@ -0,0 +1,621 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2018 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#ifndef OUTPUT_DWARF_H
+#define OUTPUT_DWARF_H
+
+/*
+ * based on DWARF 3 standard
+ */
+
+enum dwarf_tag {
+	DW_TAG_padding			= 0x00,
+	DW_TAG_array_type		= 0x01,
+	DW_TAG_class_type		= 0x02,
+	DW_TAG_entry_point		= 0x03,
+	DW_TAG_enumeration_type		= 0x04,
+	DW_TAG_formal_parameter		= 0x05,
+	DW_TAG_global_subroutine	= 0x06,
+	DW_TAG_global_variable		= 0x07,
+	DW_TAG_label			= 0x0a,
+	DW_TAG_lexical_block		= 0x0b,
+	DW_TAG_local_variable		= 0x0c,
+	DW_TAG_member			= 0x0d,
+	DW_TAG_pointer_type		= 0x0f,
+	DW_TAG_reference_type		= 0x10,
+	DW_TAG_compile_unit		= 0x11,
+	DW_TAG_string_type		= 0x12,
+	DW_TAG_structure_type		= 0x13,
+	DW_TAG_subroutine		= 0x14,
+	DW_TAG_subroutine_type		= 0x15,
+	DW_TAG_typedef			= 0x16,
+	DW_TAG_union_type		= 0x17,
+	DW_TAG_unspecified_parameters	= 0x18,
+	DW_TAG_variant			= 0x19,
+	DW_TAG_common_block		= 0x1a,
+	DW_TAG_common_inclusion		= 0x1b,
+	DW_TAG_inheritance		= 0x1c,
+	DW_TAG_inlined_subroutine	= 0x1d,
+	DW_TAG_module			= 0x1e,
+	DW_TAG_ptr_to_member_type	= 0x1f,
+	DW_TAG_set_type			= 0x20,
+	DW_TAG_subrange_type		= 0x21,
+	DW_TAG_with_stmt		= 0x22,
+	DW_TAG_access_declaration	= 0x23,
+	DW_TAG_base_type		= 0x24,
+	DW_TAG_catch_block		= 0x25,
+	DW_TAG_const_type		= 0x26,
+	DW_TAG_constant			= 0x27,
+	DW_TAG_enumerator		= 0x28,
+	DW_TAG_file_type		= 0x29,
+	DW_TAG_friend			= 0x2a,
+	DW_TAG_namelist			= 0x2b,
+	DW_TAG_namelist_item		= 0x2c,
+	DW_TAG_packed_type		= 0x2d,
+	DW_TAG_subprogram		= 0x2e,
+	DW_TAG_template_type_parameter	= 0x2f,
+	DW_TAG_template_value_parameter	= 0x30,
+	DW_TAG_thrown_type		= 0x31,
+	DW_TAG_try_block		= 0x32,
+	DW_TAG_variant_part		= 0x33,
+	DW_TAG_variable			= 0x34,
+	DW_TAG_volatile_type		= 0x35,
+	/* DWARF 3 */
+	DW_TAG_dwarf_procedure		= 0x36,
+	DW_TAG_restrict_type		= 0x37,
+	DW_TAG_interface_type		= 0x38,
+	DW_TAG_namespace		= 0x39,
+	DW_TAG_imported_module		= 0x3a,
+	DW_TAG_unspecified_type		= 0x3b,
+	DW_TAG_partial_unit		= 0x3c,
+	DW_TAG_imported_unit		= 0x3d,
+	DW_TAG_condition		= 0x3f,
+	DW_TAG_shared_type		= 0x40,
+	/* DWARF 4 */
+	DW_TAG_type_unit		= 0x41,
+	DW_TAG_rvalue_reference_type	= 0x42,
+	DW_TAG_template_alias		= 0x43,
+	/* DWARF 5 */
+	DW_TAG_atomic_type		= 0x47,
+
+	DW_TAG_lo_user			= 0x4080,
+	DW_TAG_hi_user			= 0xffff
+};
+
+enum dwarf_child {
+	DW_CHILDREN_no		= 0x00,
+	DW_CHILDREN_yes		= 0x01
+};
+
+enum dwarf_form {
+	DW_FORM_addr		= 0x01,
+	DW_FORM_block2		= 0x03,
+	DW_FORM_block4		= 0x04,
+	DW_FORM_data2		= 0x05,
+	DW_FORM_data4		= 0x06,
+	DW_FORM_data8		= 0x07,
+	DW_FORM_string		= 0x08,
+	DW_FORM_block		= 0x09,
+	DW_FORM_block1		= 0x0a,
+	DW_FORM_data1		= 0x0b,
+	DW_FORM_flag		= 0x0c,
+	DW_FORM_sdata		= 0x0d,
+	DW_FORM_strp		= 0x0e,
+	DW_FORM_udata		= 0x0f,
+	DW_FORM_ref_addr	= 0x10,
+	DW_FORM_ref1		= 0x11,
+	DW_FORM_ref2		= 0x12,
+	DW_FORM_ref4		= 0x13,
+	DW_FORM_ref8		= 0x14,
+	DW_FORM_ref_udata	= 0x15,
+	DW_FORM_indirect	= 0x16,
+	/* DWARF 4 */
+	DW_FORM_sec_offset	= 0x17,
+	DW_FORM_exprloc		= 0x18,
+	DW_FORM_flag_present	= 0x19,
+	DW_FORM_ref_sig8	= 0x20
+};
+
+enum dwarf_attribute {
+	DW_AT_sibling		= 0x01,
+	DW_AT_location		= 0x02,
+	DW_AT_name		= 0x03,
+	DW_AT_ordering		= 0x09,
+	DW_AT_byte_size		= 0x0b,
+	DW_AT_bit_offset	= 0x0c,
+	DW_AT_bit_size		= 0x0d,
+	DW_AT_stmt_list		= 0x10,
+	DW_AT_low_pc		= 0x11,
+	DW_AT_high_pc		= 0x12,
+	DW_AT_language		= 0x13,
+	DW_AT_discr		= 0x15,
+	DW_AT_discr_value	= 0x16,
+	DW_AT_visibility	= 0x17,
+	DW_AT_import		= 0x18,
+	DW_AT_string_length	= 0x19,
+	DW_AT_common_reference	= 0x1a,
+	DW_AT_comp_dir		= 0x1b,
+	DW_AT_const_value	= 0x1c,
+	DW_AT_containing_type	= 0x1d,
+	DW_AT_default_value	= 0x1e,
+	DW_AT_inline		= 0x20,
+	DW_AT_is_optional	= 0x21,
+	DW_AT_lower_bound	= 0x22,
+	DW_AT_producer		= 0x25,
+	DW_AT_prototyped	= 0x27,
+	DW_AT_return_addr	= 0x2a,
+	DW_AT_start_scope	= 0x2c,
+	DW_AT_bit_stride	= 0x2e,
+	DW_AT_upper_bound	= 0x2f,
+	DW_AT_abstract_origin	= 0x31,
+	DW_AT_accessibility	= 0x32,
+	DW_AT_address_class	= 0x33,
+	DW_AT_artificial	= 0x34,
+	DW_AT_base_types	= 0x35,
+	DW_AT_calling_convention= 0x36,
+	DW_AT_count		= 0x37,
+	DW_AT_data_member_location = 0x38,
+	DW_AT_decl_column	= 0x39,
+	DW_AT_decl_file		= 0x3a,
+	DW_AT_decl_line		= 0x3b,
+	DW_AT_declaration	= 0x3c,
+	DW_AT_discr_list	= 0x3d,
+	DW_AT_encoding		= 0x3e,
+	DW_AT_external		= 0x3f,
+	DW_AT_frame_base	= 0x40,
+	DW_AT_friend		= 0x41,
+	DW_AT_identifier_case	= 0x42,
+	DW_AT_macro_info	= 0x43,
+	DW_AT_namelist_item	= 0x44,
+	DW_AT_priority		= 0x45,
+	DW_AT_segment		= 0x46,
+	DW_AT_specification	= 0x47,
+	DW_AT_static_link	= 0x48,
+	DW_AT_type		= 0x49,
+	DW_AT_use_location	= 0x4a,
+	DW_AT_variable_parameter = 0x4b,
+	DW_AT_virtuality	= 0x4c,
+	DW_AT_vtable_elem_location = 0x4d,
+	/* DWARF 3 */
+	DW_AT_allocated		= 0x4e,
+	DW_AT_associated	= 0x4f,
+	DW_AT_data_location	= 0x50,
+	DW_AT_byte_stride	= 0x51,
+	DW_AT_entry_pc		= 0x52,
+	DW_AT_use_UTF8		= 0x53,
+	DW_AT_extension		= 0x54,
+	DW_AT_ranges		= 0x55,
+	DW_AT_trampoline	= 0x56,
+	DW_AT_call_column	= 0x57,
+	DW_AT_call_file		= 0x58,
+	DW_AT_call_line		= 0x59,
+	DW_AT_description	= 0x5a,
+	DW_AT_binary_scale	= 0x5b,
+	DW_AT_decimal_scale	= 0x5c,
+	DW_AT_small		= 0x5d,
+	DW_AT_decimal_sign	= 0x5e,
+	DW_AT_digit_count	= 0x5f,
+	DW_AT_picture_string	= 0x60,
+	DW_AT_mutable		= 0x61,
+	DW_AT_threads_scaled	= 0x62,
+	DW_AT_explicit		= 0x63,
+	DW_AT_object_pointer	= 0x64,
+	DW_AT_endianity		= 0x65,
+	DW_AT_elemental		= 0x66,
+	DW_AT_pure		= 0x67,
+	DW_AT_recursive		= 0x68,
+	/* DWARF 4 */
+	DW_AT_signature		= 0x69,
+	DW_AT_main_subprogram	= 0x6a,
+	DW_AT_data_bit_offset	= 0x6b,
+	DW_AT_const_expr	= 0x6c,
+	DW_AT_enum_class	= 0x6d,
+	DW_AT_linkage_name	= 0x6e,
+	/* DWARF 5 */
+	DW_AT_noreturn		= 0x87,
+
+	DW_AT_lo_user		= 0x2000,
+	DW_AT_hi_user		= 0x3fff
+};
+
+enum dwarf_op {
+	DW_OP_addr		= 0x03,
+	DW_OP_deref		= 0x06,
+	DW_OP_const1u		= 0x08,
+	DW_OP_const1s		= 0x09,
+	DW_OP_const2u		= 0x0a,
+	DW_OP_const2s		= 0x0b,
+	DW_OP_const4u		= 0x0c,
+	DW_OP_const4s		= 0x0d,
+	DW_OP_const8u		= 0x0e,
+	DW_OP_const8s		= 0x0f,
+	DW_OP_constu		= 0x10,
+	DW_OP_consts		= 0x11,
+	DW_OP_dup		= 0x12,
+	DW_OP_drop		= 0x13,
+	DW_OP_over		= 0x14,
+	DW_OP_pick		= 0x15,
+	DW_OP_swap		= 0x16,
+	DW_OP_rot		= 0x17,
+	DW_OP_xderef		= 0x18,
+	DW_OP_abs		= 0x19,
+	DW_OP_and		= 0x1a,
+	DW_OP_div		= 0x1b,
+	DW_OP_minus		= 0x1c,
+	DW_OP_mod		= 0x1d,
+	DW_OP_mul		= 0x1e,
+	DW_OP_neg		= 0x1f,
+	DW_OP_not		= 0x20,
+	DW_OP_or		= 0x21,
+	DW_OP_plus		= 0x22,
+	DW_OP_plus_uconst	= 0x23,
+	DW_OP_shl		= 0x24,
+	DW_OP_shr		= 0x25,
+	DW_OP_shra		= 0x26,
+	DW_OP_xor		= 0x27,
+	DW_OP_skip		= 0x2f,
+	DW_OP_bra		= 0x28,
+	DW_OP_eq		= 0x29,
+	DW_OP_ge		= 0x2a,
+	DW_OP_gt		= 0x2b,
+	DW_OP_le		= 0x2c,
+	DW_OP_lt		= 0x2d,
+	DW_OP_ne		= 0x2e,
+	DW_OP_lit0		= 0x30,
+	DW_OP_lit1		= 0x31,
+	DW_OP_lit2		= 0x32,
+	DW_OP_lit3		= 0x33,
+	DW_OP_lit4		= 0x34,
+	DW_OP_lit5		= 0x35,
+	DW_OP_lit6		= 0x36,
+	DW_OP_lit7		= 0x37,
+	DW_OP_lit8		= 0x38,
+	DW_OP_lit9		= 0x39,
+	DW_OP_lit10		= 0x3a,
+	DW_OP_lit11		= 0x3b,
+	DW_OP_lit12		= 0x3c,
+	DW_OP_lit13		= 0x3d,
+	DW_OP_lit14		= 0x3e,
+	DW_OP_lit15		= 0x3f,
+	DW_OP_lit16		= 0x40,
+	DW_OP_lit17		= 0x41,
+	DW_OP_lit18		= 0x42,
+	DW_OP_lit19		= 0x43,
+	DW_OP_lit20		= 0x44,
+	DW_OP_lit21		= 0x45,
+	DW_OP_lit22		= 0x46,
+	DW_OP_lit23		= 0x47,
+	DW_OP_lit24		= 0x48,
+	DW_OP_lit25		= 0x49,
+	DW_OP_lit26		= 0x4a,
+	DW_OP_lit27		= 0x4b,
+	DW_OP_lit28		= 0x4c,
+	DW_OP_lit29		= 0x4d,
+	DW_OP_lit30		= 0x4e,
+	DW_OP_lit31		= 0x4f,
+	DW_OP_reg0		= 0x50,
+	DW_OP_reg1		= 0x51,
+	DW_OP_reg2		= 0x52,
+	DW_OP_reg3		= 0x53,
+	DW_OP_reg4		= 0x54,
+	DW_OP_reg5		= 0x55,
+	DW_OP_reg6		= 0x56,
+	DW_OP_reg7		= 0x57,
+	DW_OP_reg8		= 0x58,
+	DW_OP_reg9		= 0x59,
+	DW_OP_reg10		= 0x5a,
+	DW_OP_reg11		= 0x5b,
+	DW_OP_reg12		= 0x5c,
+	DW_OP_reg13		= 0x5d,
+	DW_OP_reg14		= 0x5e,
+	DW_OP_reg15		= 0x5f,
+	DW_OP_reg16		= 0x60,
+	DW_OP_reg17		= 0x61,
+	DW_OP_reg18		= 0x62,
+	DW_OP_reg19		= 0x63,
+	DW_OP_reg20		= 0x64,
+	DW_OP_reg21		= 0x65,
+	DW_OP_reg22		= 0x66,
+	DW_OP_reg23		= 0x67,
+	DW_OP_reg24		= 0x68,
+	DW_OP_reg25		= 0x69,
+	DW_OP_reg26		= 0x6a,
+	DW_OP_reg27		= 0x6b,
+	DW_OP_reg28		= 0x6c,
+	DW_OP_reg29		= 0x6d,
+	DW_OP_reg30		= 0x6e,
+	DW_OP_reg31		= 0x6f,
+	DW_OP_breg0		= 0x70,
+	DW_OP_breg1		= 0x71,
+	DW_OP_breg2		= 0x72,
+	DW_OP_breg3		= 0x73,
+	DW_OP_breg4		= 0x74,
+	DW_OP_breg5		= 0x75,
+	DW_OP_breg6		= 0x76,
+	DW_OP_breg7		= 0x77,
+	DW_OP_breg8		= 0x78,
+	DW_OP_breg9		= 0x79,
+	DW_OP_breg10		= 0x7a,
+	DW_OP_breg11		= 0x7b,
+	DW_OP_breg12		= 0x7c,
+	DW_OP_breg13		= 0x7d,
+	DW_OP_breg14		= 0x7e,
+	DW_OP_breg15		= 0x7f,
+	DW_OP_breg16		= 0x80,
+	DW_OP_breg17		= 0x81,
+	DW_OP_breg18		= 0x82,
+	DW_OP_breg19		= 0x83,
+	DW_OP_breg20		= 0x84,
+	DW_OP_breg21		= 0x85,
+	DW_OP_breg22		= 0x86,
+	DW_OP_breg23		= 0x87,
+	DW_OP_breg24		= 0x88,
+	DW_OP_breg25		= 0x89,
+	DW_OP_breg26		= 0x8a,
+	DW_OP_breg27		= 0x8b,
+	DW_OP_breg28		= 0x8c,
+	DW_OP_breg29		= 0x8d,
+	DW_OP_breg30		= 0x8e,
+	DW_OP_breg31		= 0x8f,
+	DW_OP_regx		= 0x90,
+	DW_OP_fbreg		= 0x91,
+	DW_OP_bregx		= 0x92,
+	DW_OP_piece		= 0x93,
+	DW_OP_deref_size	= 0x94,
+	DW_OP_xderef_size	= 0x95,
+	DW_OP_nop		= 0x96,
+	/* DWARF 3 */
+	DW_OP_push_object_address = 0x97,
+	DW_OP_call2		= 0x98,
+	DW_OP_call4		= 0x99,
+	DW_OP_call_ref		= 0x9a ,
+	DW_OP_form_tls_address	= 0x9b,
+	DW_OP_call_frame_cfa	= 0x9c,
+	DW_OP_bit_piece		= 0x9d,
+	/* DWARF 4 */
+	DW_OP_implicit_value	= 0x9e,
+	DW_OP_stack_value	= 0x9f,
+
+	DW_OP_lo_user		= 0xe0,
+	DW_OP_hi_user		= 0xff
+};
+
+enum dwarf_base_type {
+	DW_ATE_address		= 0x01,
+	DW_ATE_boolean		= 0x02,
+	DW_ATE_complex_float	= 0x03,
+	DW_ATE_float		= 0x04,
+	DW_ATE_signed		= 0x05,
+	DW_ATE_signed_char	= 0x06,
+	DW_ATE_unsigned		= 0x07,
+	DW_ATE_unsigned_char	= 0x08,
+	/* DWARF 3 */
+	DW_ATE_imaginary_float	= 0x09,
+	DW_ATE_packed_decimal	= 0x0a,
+	DW_ATE_numeric_string	= 0x0b,
+	DW_ATE_edited		= 0x0c,
+	DW_ATE_signed_fixed	= 0x0d,
+	DW_ATE_unsigned_fixed	= 0x0e,
+	DW_ATE_decimal_float	= 0x0f,
+	/* DWARF 4 */
+	DW_ATE_UTF		= 0x10,
+
+	DW_ATE_lo_user		= 0x80,
+	DW_ATE_hi_user		= 0xff
+};
+
+enum dwarf_decimal_sign {
+	DW_DS_unsigned			= 0x01,
+	DW_DS_leading_overpunch		= 0x02,
+	DW_DS_trailing_overpunch	= 0x03,
+	DW_DS_leading_separate		= 0x04,
+	DW_DS_trailing_separate		= 0x05
+};
+
+enum dwarf_endianity {
+	DW_END_default	= 0x00,
+	DW_END_big	= 0x01,
+	DW_END_little	= 0x02,
+
+	DW_END_lo_user	= 0x40,
+	DW_END_hi_user	= 0xff
+};
+
+enum dwarf_accessibility {
+	DW_ACCESS_public	= 0x01,
+	DW_ACCESS_protected	= 0x02,
+	DW_ACCESS_private	= 0x03
+};
+
+enum dwarf_visibility {
+	DW_VIS_local		= 0x01,
+	DW_VIS_exported		= 0x02,
+	DW_VIS_qualified	= 0x03
+};
+
+enum dwarf_virtuality {
+	DW_VIRTUALITY_none		= 0x00,
+	DW_VIRTUALITY_virtual		= 0x01,
+	DW_VIRTUALITY_pure_virtual	= 0x02
+};
+
+enum dwarf_language {
+	DW_LANG_C89		= 0x0001,
+	DW_LANG_C		= 0x0002,
+	DW_LANG_Ada83		= 0x0003,
+	DW_LANG_C_plus_plus	= 0x0004,
+	DW_LANG_Cobol74		= 0x0005,
+	DW_LANG_Cobol85		= 0x0006,
+	DW_LANG_Fortran77	= 0x0007,
+	DW_LANG_Fortran90	= 0x0008,
+	DW_LANG_Pascal83	= 0x0009,
+	DW_LANG_Modula2		= 0x000a,
+	DW_LANG_Java		= 0x000b,
+	DW_LANG_C99		= 0x000c,
+	DW_LANG_Ada95		= 0x000d,
+	DW_LANG_Fortran95	= 0x000e,
+	DW_LANG_PLI		= 0x000f,
+	DW_LANG_ObjC		= 0x0010,
+	DW_LANG_ObjC_plus_plus	= 0x0011,
+	DW_LANG_UPC		= 0x0012,
+	DW_LANG_D		= 0x0013,
+	DW_LANG_Python		= 0x0014,
+	DW_LANG_OpenCL		= 0x0015,
+	DW_LANG_Go		= 0x0016,
+	DW_LANG_Modula3		= 0x0017,
+	DW_LANG_Haskell		= 0x0018,
+	DW_LANG_C_plus_plus_03	= 0x0019,
+	DW_LANG_C_plus_plus_11	= 0x001a,
+	DW_LANG_OCaml		= 0x001b,
+	DW_LANG_Rust		= 0x001c,
+	DW_LANG_C11		= 0x001d,
+	DW_LANG_Swift		= 0x001e,
+	DW_LANG_Julia		= 0x001f,
+	DW_LANG_Dylan		= 0x0020,
+	DW_LANG_C_plus_plus_14	= 0x0021,
+	DW_LANG_Fortran03	= 0x0022,
+	DW_LANG_Fortran08	= 0x0023,
+	DW_LANG_RenderScript	= 0x0024,
+
+	DW_LANG_Mips_Assembler	= 0x8001,
+
+	DW_LANG_lo_user		= 0x8000,
+	DW_LANG_hi_user		= 0xffff,
+
+	DW_LANG_Rust_old	= 0x9000
+};
+
+enum dwarf_identifier_case {
+	DW_ID_case_sensitive	= 0x00,
+	DW_ID_up_case		= 0x01,
+	DW_ID_down_case		= 0x02,
+	DW_ID_case_insensitive	= 0x03
+};
+
+enum dwarf_calling_conversion {
+	DW_CC_normal			= 0x01,
+	DW_CC_program			= 0x02,
+	DW_CC_nocall			= 0x03,
+	DW_CC_pass_by_reference		= 0x4,
+	DW_CC_pass_by_value		= 0x5,
+
+	DW_CC_lo_user			= 0x40,
+	DW_CC_hi_user			= 0xff,
+
+	DW_CC_GNU_renesas_sh		= 0x40,
+	DW_CC_GNU_borland_fastcall_i386	= 0x41
+};
+
+enum dwarf_inline {
+	DW_INL_not_inlined		= 0x00,
+	DW_INL_inlined			= 0x01,
+	DW_INL_declared_not_inlined	= 0x02,
+	DW_INL_declared_inlined		= 0x03
+};
+
+enum dwarf_ordering {
+	DW_ORD_row_major = 0x00,
+	DW_ORD_col_major = 0x01
+};
+
+enum dwarf_discriminant {
+	DW_DSC_label = 0x00,
+	DW_DSC_range = 0x01
+};
+
+enum dwarf_line_number {
+	DW_LNS_extended_op	= 0x00,
+	DW_LNS_copy		= 0x01,
+	DW_LNS_advance_pc	= 0x02,
+	DW_LNS_advance_line	= 0x03,
+	DW_LNS_set_file		= 0x04,
+	DW_LNS_set_column	= 0x05,
+	DW_LNS_negate_stmt	= 0x06,
+	DW_LNS_set_basic_block	= 0x07,
+	DW_LNS_const_add_pc	= 0x08,
+	DW_LNS_fixed_advance_pc	= 0x09,
+	DW_LNS_set_prologue_end	= 0x0a,
+	DW_LNS_set_epilogue_begin = 0x0b,
+	DW_LNS_set_isa		= 0x0c
+};
+
+enum dwarf_line_number_extended {
+	DW_LNE_end_sequence	= 0x01,
+	DW_LNE_set_address	= 0x02,
+	DW_LNE_define_file	= 0x03,
+	DW_LNE_set_discriminator= 0x04,
+	DW_LNE_lo_user		= 0x80,
+	DW_LNE_hi_user		= 0xff
+};
+
+enum dwarf_macinfo_type {
+	DW_MACINFO_define	= 0x01,
+	DW_MACINFO_undef	= 0x02,
+	DW_MACINFO_start_file	= 0x03,
+	DW_MACINFO_end_file	= 0x04,
+	DW_MACINFO_vendor_ext	= 0xff
+};
+
+enum dwarf_call_frame {
+	DW_CFA_advance_loc		= 0x01,
+	DW_CFA_offset			= 0x02,
+	DW_CFA_restore			= 0x03,
+	DW_CFA_nop			= 0x00,
+	DW_CFA_set_loc			= 0x01,
+	DW_CFA_advance_loc1		= 0x02,
+	DW_CFA_advance_loc2		= 0x03,
+	DW_CFA_advance_loc4		= 0x04,
+	DW_CFA_offset_extended		= 0x05,
+	DW_CFA_restore_extended		= 0x06,
+	DW_CFA_undefined		= 0x07,
+	DW_CFA_same_value		= 0x08,
+	DW_CFA_register			= 0x09,
+	DW_CFA_remember_state		= 0x0a,
+	DW_CFA_restore_state		= 0x0b,
+	DW_CFA_def_cfa			= 0x0c,
+	DW_CFA_def_cfa_register		= 0x0d,
+	DW_CFA_def_cfa_offset		= 0x0e,
+	/* DWARF 3 */
+	DW_CFA_def_cfa_expression	= 0x0f,
+	DW_CFA_expression		= 0x10,
+	DW_CFA_offset_extended_sf	= 0x11,
+	DW_CFA_def_cfa_sf		= 0x12,
+	DW_CFA_def_cfa_offset_sf	= 0x13,
+	DW_CFA_val_offset		= 0x14,
+	DW_CFA_val_offset_sf		= 0x15,
+	DW_CFA_val_expression		= 0x16,
+	DW_CFA_lo_user			= 0x1c,
+	DW_CFA_hi_user			= 0x3f
+};
+
+#endif /* OUTPUT_DWARF_H */

_service:tar_scm:nasm-2.16.03.tar.xz/output/elf.h Added

@@ -0,0 +1,557 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2018 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#ifndef OUTPUT_ELF_H
+#define OUTPUT_ELF_H
+
+/*
+ * Since NASM support both Elf32/64 file formats
+ * we need to cover all types, structures, typedefs and etc
+ */
+
+#include "compiler.h"
+
+/* Segment types */
+#define PT_NULL		0
+#define PT_LOAD		1
+#define PT_DYNAMIC	2
+#define PT_INTERP	3
+#define PT_NOTE		4
+#define PT_SHLIB	5
+#define PT_PHDR		6
+#define PT_LOOS		0x60000000
+#define PT_HIOS		0x6fffffff
+#define PT_LOPROC	0x70000000
+#define PT_HIPROC	0x7fffffff
+#define PT_GNU_EH_FRAME	0x6474e550	/* Extension, eh? */
+
+/* ELF file types */
+#define ET_NONE		0
+#define ET_REL		1
+#define ET_EXEC		2
+#define ET_DYN		3
+#define ET_CORE		4
+#define ET_LOPROC	0xff00
+#define ET_HIPROC	0xffff
+
+/* ELF machine types */
+#define EM_NONE		0
+#define EM_M32		1
+#define EM_SPARC	2
+#define EM_386		3
+#define EM_68K		4
+#define EM_88K		5
+#define EM_486		6	/* Not used in Linux at least */
+#define EM_860		7
+#define EM_MIPS		8	/* R3k, bigendian(?) */
+#define EM_MIPS_RS4_BE	10	/* R4k BE */
+#define EM_PARISC	15
+#define EM_SPARC32PLUS	18
+#define EM_PPC		20
+#define EM_PPC64	21
+#define EM_S390		22
+#define EM_SH		42
+#define EM_SPARCV9	43	/* v9 = SPARC64 */
+#define EM_H8_300H	47
+#define EM_H8S		48
+#define EM_IA_64	50
+#define EM_X86_64	62
+#define EM_CRIS		76
+#define EM_V850		87
+#define EM_ALPHA	0x9026	/* Interim Alpha that stuck around */
+#define EM_CYGNUS_V850	0x9080	/* Old v850 ID used by Cygnus */
+#define EM_S390_OLD	0xA390	/* Obsolete interim value for S/390 */
+
+/* Dynamic type values */
+#define DT_NULL		0
+#define DT_NEEDED	1
+#define DT_PLTRELSZ	2
+#define DT_PLTGOT	3
+#define DT_HASH		4
+#define DT_STRTAB	5
+#define DT_SYMTAB	6
+#define DT_RELA		7
+#define DT_RELASZ	8
+#define DT_RELAENT	9
+#define DT_STRSZ	10
+#define DT_SYMENT	11
+#define DT_INIT		12
+#define DT_FINI		13
+#define DT_SONAME	14
+#define DT_RPATH	15
+#define DT_SYMBOLIC	16
+#define DT_REL		17
+#define DT_RELSZ	18
+#define DT_RELENT	19
+#define DT_PLTREL	20
+#define DT_DEBUG	21
+#define DT_TEXTREL	22
+#define DT_JMPREL	23
+#define DT_LOPROC	0x70000000
+#define DT_HIPROC	0x7fffffff
+
+/* Auxiliary table entries */
+#define AT_NULL		0	/* end of vector */
+#define AT_IGNORE	1	/* entry should be ignored */
+#define AT_EXECFD	2	/* file descriptor of program */
+#define AT_PHDR		3	/* program headers for program */
+#define AT_PHENT	4	/* size of program header entry */
+#define AT_PHNUM	5	/* number of program headers */
+#define AT_PAGESZ	6	/* system page size */
+#define AT_BASE		7	/* base address of interpreter */
+#define AT_FLAGS	8	/* flags */
+#define AT_ENTRY	9	/* entry point of program */
+#define AT_NOTELF	10	/* program is not ELF */
+#define AT_UID		11	/* real uid */
+#define AT_EUID		12	/* effective uid */
+#define AT_GID		13	/* real gid */
+#define AT_EGID		14	/* effective gid */
+#define AT_PLATFORM	15	/* string identifying CPU for optimizations */
+#define AT_HWCAP	16	/* arch dependent hints at CPU capabilities */
+#define AT_CLKTCK	17	/* frequency at which times() increments */
+/* 18..22 = ? */
+#define AT_SECURE	23	/* secure mode boolean */
+
+/* Program header permission flags */
+#define PF_X		0x1
+#define PF_W		0x2
+#define PF_R		0x4
+
+/* Section header types */
+#define SHT_NULL        0
+#define SHT_PROGBITS    1
+#define SHT_SYMTAB      2
+#define SHT_STRTAB      3
+#define SHT_RELA        4
+#define SHT_HASH        5
+#define SHT_DYNAMIC     6
+#define SHT_NOTE        7
+#define SHT_NOBITS      8
+#define SHT_REL         9
+#define SHT_SHLIB       10
+#define SHT_DYNSYM      11
+#define SHT_INIT_ARRAY	14
+#define SHT_FINI_ARRAY	15
+#define SHT_PREINIT_ARRAY 16
+#define SHT_GROUP	17
+#define SHT_SYMTAB_SHNDX 18
+#define SHT_LOPROC      0x70000000
+#define SHT_HIPROC      0x7fffffff
+#define SHT_LOUSER      0x80000000
+#define SHT_HIUSER      0xffffffff
+
+/* Section header flags */
+#define SHF_WRITE		(1 << 0)	/* Writable */
+#define SHF_ALLOC		(1 << 1)	/* Occupies memory during execution */
+#define SHF_EXECINSTR		(1 << 2)	/* Executable */
+#define SHF_MERGE		(1 << 4)	/* Might be merged */
+#define SHF_STRINGS		(1 << 5)	/* Contains nul-terminated strings */
+#define SHF_INFO_LINK		(1 << 6)	/* `sh_info' contains SHT index */
+#define SHF_LINK_ORDER		(1 << 7)	/* Preserve order after combining */
+#define SHF_OS_NONCONFORMING	(1 << 8)	/* Non-standard OS specific handling required */
+#define SHF_GROUP		(1 << 9)	/* Section is member of a group */
+#define SHF_TLS			(1 << 10)	/* Section hold thread-local data */
+
+/* Special section numbers */
+#define SHN_UNDEF       0x0000
+#define SHN_LORESERVE   0xff00
+#define SHN_LOPROC      0xff00
+#define SHN_HIPROC      0xff1f
+#define SHN_ABS         0xfff1
+#define SHN_COMMON      0xfff2
+#define SHN_XINDEX	0xffff
+#define SHN_HIRESERVE   0xffff
+
+/* Same, but signed/sign-extended */
+#define XSHN_UNDEF      ((int16_t)SHN_UNDEF)
+#define XSHN_LORESERVE  ((int16_t)SHN_LORESERVE)
+#define XSHN_LOPROC     ((int16_t)SHN_LOPROC)
+#define XSHN_HIPROC     ((int16_t)SHN_HIPROC)
+#define XSHN_ABS        ((int16_t)SHN_ABS)
+#define XSHN_COMMON     ((int16_t)SHN_COMMON)
+#define XSHN_XINDEX     ((int16_t)SHN_XINDEX)
+#define XSHN_HIRESERVE  ((int16_t)SHN_HIRESERVE)
+
+/* Section align flag */
+#define SHA_ANY		1	/* No alignment constraint */
+
+/* Length of magic at the start of a file */
+#define EI_NIDENT	16
+
+/* Magic number constants... */
+#define EI_MAG0		0	/* e_ident indexes */
+#define EI_MAG1		1
+#define EI_MAG2		2
+#define EI_MAG3		3
+#define EI_CLASS	4
+#define EI_DATA		5
+#define EI_VERSION	6
+#define EI_OSABI	7
+#define EI_ABIVERSION	8
+#define EI_NINDENT	16
+
+#define ELFMAG0		0x7f	/* EI_MAG */
+#define ELFMAG1		'E'
+#define ELFMAG2		'L'
+#define ELFMAG3		'F'
+#define ELFMAG		"\177ELF"
+#define SELFMAG		4
+
+#define ELFCLASSNONE	0	/* EI_CLASS */
+#define ELFCLASS32	1
+#define ELFCLASS64	2
+#define ELFCLASSNUM	3
+
+#define ELFDATANONE	0	/* e_identEI_DATA */
+#define ELFDATA2LSB	1
+#define ELFDATA2MSB	2
+
+#define EV_NONE		0	/* e_version, EI_VERSION */
+#define EV_CURRENT	1
+#define EV_NUM		2
+
+#define ELFOSABI_NONE	0
+#define ELFOSABI_LINUX	3
+
+/* Legal values for ST_BIND subfield of st_info (symbol binding) */
+#define STB_LOCAL	0	/* Local symbol */
+#define STB_GLOBAL	1	/* Global symbol */
+#define STB_WEAK	2	/* Weak symbol */
+#define STB_NUM		3	/* Number of defined types */
+#define STB_LOOS	10	/* Start of OS-specific */
+#define STB_HIOS	12	/* End of OS-specific */
+#define STB_LOPROC	13	/* Start of processor-specific */
+#define STB_HIPROC	15	/* End of processor-specific */
+
+/* Symbol types */
+#define STT_NOTYPE	0	/* Symbol type is unspecified */
+#define STT_OBJECT	1	/* Symbol is a data object */
+#define STT_FUNC	2	/* Symbol is a code object */
+#define STT_SECTION	3	/* Symbol associated with a section */
+#define STT_FILE	4	/* Symbol's name is file name */
+#define STT_COMMON	5	/* Symbol is a common data object */
+#define STT_TLS		6	/* Symbol is thread-local data object */
+#define STT_NUM		7	/* Number of defined types */
+
+/* Symbol visibilities */
+#define STV_DEFAULT	0	/* Default symbol visibility rules */
+#define STV_INTERNAL	1	/* Processor specific hidden class */
+#define STV_HIDDEN	2	/* Sym unavailable in other modules */
+#define STV_PROTECTED	3	/* Not preemptible, not exported */
+
+/* Both Elf32_Sym and Elf64_Sym use the same one-byte st_info field  */
+#define ELF32_ST_BIND(i)	((i) >> 4)
+#define ELF32_ST_MKBIND(i)	((i) << 4)	/* just a helper */
+#define ELF32_ST_TYPE(i)	((i) & 0xf)
+#define ELF32_ST_INFO(b, i)	(ELF32_ST_MKBIND(b) + ELF32_ST_TYPE(i))
+
+#define ELF64_ST_BIND(i)	ELF32_ST_BIND(i)
+#define ELF64_ST_MKBIND(i)	ELF32_ST_MKBIND(i)
+#define ELF64_ST_TYPE(i)	ELF32_ST_TYPE(i)
+#define ELF64_ST_INFO(b, i)	ELF32_ST_INFO(b, i)
+
+/*
+ * ELF standard typedefs (yet more proof that <stdint.h> was way overdue)
+ */
+
+typedef uint16_t Elf32_Half;
+typedef int16_t Elf32_SHalf;
+typedef uint32_t Elf32_Word;
+typedef int32_t Elf32_Sword;
+typedef uint64_t Elf32_Xword;
+typedef int64_t Elf32_Sxword;
+
+typedef uint32_t Elf32_Off;
+typedef uint32_t Elf32_Addr;
+typedef uint16_t Elf32_Section;
+
+typedef uint16_t Elf64_Half;
+typedef int16_t Elf64_SHalf;
+typedef uint32_t Elf64_Word;
+typedef int32_t Elf64_Sword;
+typedef uint64_t Elf64_Xword;
+typedef int64_t Elf64_Sxword;
+
+typedef uint64_t Elf64_Off;
+typedef uint64_t Elf64_Addr;
+typedef uint16_t Elf64_Section;
+
+/*
+ * Dynamic header
+ */
+
+typedef struct elf32_dyn {
+	Elf32_Sword		d_tag;
+	union {
+		Elf32_Sword	d_val;
+		Elf32_Addr	d_ptr;
+	} d_un;
+} Elf32_Dyn;
+
+typedef struct elf64_dyn {
+	Elf64_Sxword		d_tag;
+	union {
+		Elf64_Xword	d_val;
+		Elf64_Addr	d_ptr;
+	} d_un;
+} Elf64_Dyn;
+
+/*
+ * Relocations
+ */
+
+#define ELF32_R_SYM(x)		((x) >> 8)
+#define ELF32_R_TYPE(x)		((x) & 0xff)
+#define ELF32_R_INFO(s,t)	(((Elf32_Word)(s) << 8) + ELF32_R_TYPE(t))
+
+typedef struct elf32_rel {
+	Elf32_Addr		r_offset;
+	Elf32_Word		r_info;
+} Elf32_Rel;
+
+typedef struct elf32_rela {
+	Elf32_Addr		r_offset;
+	Elf32_Word		r_info;
+	Elf32_Sword		r_addend;
+} Elf32_Rela;
+
+enum reloc32_type {
+	R_386_32		=  1,	/* ordinary absolute relocation */
+	R_386_PC32		=  2,	/* PC-relative relocation */
+	R_386_GOT32		=  3,	/* an offset into GOT */
+	R_386_PLT32		=  4,	/* a PC-relative offset into PLT */
+	R_386_COPY		=  5,	/* ??? */
+	R_386_GLOB_DAT		=  6,	/* ??? */
+	R_386_JUMP_SLOT		=  7,	/* ??? */
+	R_386_RELATIVE		=  8,	/* ??? */
+	R_386_GOTOFF		=  9,	/* an offset from GOT base */
+	R_386_GOTPC		= 10,	/* a PC-relative offset _to_ GOT */
+	R_386_TLS_TPOFF		= 14,	/* Offset in static TLS block */
+	R_386_TLS_IE		= 15,	/* Address of GOT entry for static TLS block offset */
+	/* These are GNU extensions, but useful */
+	R_386_16		= 20,	/* A 16-bit absolute relocation */
+	R_386_PC16		= 21,	/* A 16-bit PC-relative relocation */
+	R_386_8			= 22,	/* An 8-bit absolute relocation */
+	R_386_PC8		= 23,	/* An 8-bit PC-relative relocation */
+        R_386_SEG16		= 45,   /* A 16-bit real-mode segment */
+        R_386_SUB16		= 46,   /* Subtract 16-bit value */
+        R_386_SUB32		= 47    /* Subtract 32-bit value */
+};
+
+#define ELF64_R_SYM(x)		((x) >> 32)
+#define ELF64_R_TYPE(x)		((x) & 0xffffffff)
+#define ELF64_R_INFO(s,t)	(((Elf64_Xword)(s) << 32) + ELF64_R_TYPE(t))
+
+typedef struct elf64_rel {
+	Elf64_Addr	r_offset;
+	Elf64_Xword	r_info;
+} Elf64_Rel;
+
+typedef struct elf64_rela {
+	Elf64_Addr	r_offset;
+	Elf64_Xword	r_info;
+	Elf64_Sxword	r_addend;
+} Elf64_Rela;
+
+enum reloc64_type {
+	R_X86_64_NONE		=  0,	/* No reloc */
+	R_X86_64_64		=  1,	/* Direct 64 bit  */
+	R_X86_64_PC32		=  2,	/* PC relative 32 bit signed */
+	R_X86_64_GOT32		=  3,	/* 32 bit GOT entry */
+	R_X86_64_PLT32		=  4,	/* 32 bit PLT address */
+	R_X86_64_COPY		=  5,	/* Copy symbol at runtime */
+	R_X86_64_GLOB_DAT	=  6,	/* Create GOT entry */
+	R_X86_64_JUMP_SLOT	=  7,	/* Create PLT entry */
+	R_X86_64_RELATIVE	=  8,	/* Adjust by program base */
+	R_X86_64_GOTPCREL	=  9,	/* 32 bit signed PC relative offset to GOT */
+	R_X86_64_32		= 10,	/* Direct 32 bit zero extended */
+	R_X86_64_32S		= 11,	/* Direct 32 bit sign extended */
+	R_X86_64_16		= 12,	/* Direct 16 bit zero extended */
+	R_X86_64_PC16		= 13,	/* 16 bit sign extended pc relative */
+	R_X86_64_8		= 14,	/* Direct 8 bit sign extended  */
+	R_X86_64_PC8		= 15,	/* 8 bit sign extended pc relative */
+	R_X86_64_DTPMOD64	= 16,	/* ID of module containing symbol */
+	R_X86_64_DTPOFF64	= 17,	/* Offset in module's TLS block */
+	R_X86_64_TPOFF64	= 18,	/* Offset in initial TLS block */
+	R_X86_64_TLSGD		= 19,	/* 32 bit signed PC relative offset to two GOT entries for GD symbol */
+	R_X86_64_TLSLD		= 20,	/* 32 bit signed PC relative offset to two GOT entries for LD symbol */
+	R_X86_64_DTPOFF32	= 21,	/* Offset in TLS block */
+	R_X86_64_GOTTPOFF	= 22,	/* 32 bit signed PC relative offset to GOT entry for IE symbol */
+	R_X86_64_TPOFF32	= 23,	/* Offset in initial TLS block */
+	R_X86_64_PC64		= 24,	/* word64 S + A - P */
+	R_X86_64_GOTOFF64	= 25,	/* word64 S + A - GOT */
+	R_X86_64_GOTPC32	= 26,	/* word32 GOT + A - P */
+	R_X86_64_GOT64		= 27,	/* word64 G + A */
+	R_X86_64_GOTPCREL64	= 28,	/* word64 G + GOT - P + A */
+	R_X86_64_GOTPC64	= 29,	/* word64 GOT - P + A */
+	R_X86_64_GOTPLT64	= 30,	/* word64 G + A */
+	R_X86_64_PLTOFF64	= 31,	/* word64 L - GOT + A */
+	R_X86_64_SIZE32		= 32,	/* word32 Z + A */
+	R_X86_64_SIZE64		= 33,	/* word64 Z + A */
+	R_X86_64_GOTPC32_TLSDESC= 34,	/* word32 */
+	R_X86_64_TLSDESC_CALL	= 35,	/* none */
+	R_X86_64_TLSDESC	= 36	/* word64?2 */
+};
+
+/*
+ * Symbol
+ */
+
+typedef struct elf32_sym {
+	Elf32_Word	st_name;
+	Elf32_Addr	st_value;
+	Elf32_Word	st_size;
+	unsigned char	st_info;
+	unsigned char	st_other;
+	Elf32_Half	st_shndx;
+} Elf32_Sym;
+
+typedef struct elf64_sym {
+	Elf64_Word	st_name;
+	unsigned char	st_info;
+	unsigned char	st_other;
+	Elf64_Half	st_shndx;
+	Elf64_Addr	st_value;
+	Elf64_Xword	st_size;
+} Elf64_Sym;
+
+/*
+ * Main file header
+ */
+
+typedef struct elf32_hdr {
+	unsigned char	e_identEI_NIDENT;
+	Elf32_Half	e_type;
+	Elf32_Half	e_machine;
+	Elf32_Word	e_version;
+	Elf32_Addr	e_entry;
+	Elf32_Off	e_phoff;
+	Elf32_Off	e_shoff;
+	Elf32_Word	e_flags;
+	Elf32_Half	e_ehsize;
+	Elf32_Half	e_phentsize;
+	Elf32_Half	e_phnum;
+	Elf32_Half	e_shentsize;
+	Elf32_Half	e_shnum;
+	Elf32_Half	e_shstrndx;
+} Elf32_Ehdr;
+
+typedef struct elf64_hdr {
+	unsigned char	e_identEI_NIDENT;
+	Elf64_Half	e_type;
+	Elf64_Half	e_machine;
+	Elf64_Word	e_version;
+	Elf64_Addr	e_entry;
+	Elf64_Off	e_phoff;
+	Elf64_Off	e_shoff;
+	Elf64_Word	e_flags;
+	Elf64_Half	e_ehsize;
+	Elf64_Half	e_phentsize;
+	Elf64_Half	e_phnum;
+	Elf64_Half	e_shentsize;
+	Elf64_Half	e_shnum;
+	Elf64_Half	e_shstrndx;
+} Elf64_Ehdr;
+
+/*
+ * Program header
+ */
+
+typedef struct elf32_phdr {
+	Elf32_Word	p_type;
+	Elf32_Off	p_offset;
+	Elf32_Addr	p_vaddr;
+	Elf32_Addr	p_paddr;
+	Elf32_Word	p_filesz;
+	Elf32_Word	p_memsz;
+	Elf32_Word	p_flags;
+	Elf32_Word	p_align;
+} Elf32_Phdr;
+
+typedef struct elf64_phdr {
+	Elf64_Word	p_type;
+	Elf64_Word	p_flags;
+	Elf64_Off	p_offset;
+	Elf64_Addr	p_vaddr;
+	Elf64_Addr	p_paddr;
+	Elf64_Xword	p_filesz;
+	Elf64_Xword	p_memsz;
+	Elf64_Xword	p_align;
+} Elf64_Phdr;
+
+/*
+ * Section header
+ */
+
+typedef struct elf32_shdr {
+	Elf32_Word	sh_name;
+	Elf32_Word	sh_type;
+	Elf32_Word	sh_flags;
+	Elf32_Addr	sh_addr;
+	Elf32_Off	sh_offset;
+	Elf32_Word	sh_size;
+	Elf32_Word	sh_link;
+	Elf32_Word	sh_info;
+	Elf32_Word	sh_addralign;
+	Elf32_Word	sh_entsize;
+} Elf32_Shdr;
+
+typedef struct elf64_shdr {
+	Elf64_Word	sh_name;
+	Elf64_Word	sh_type;
+	Elf64_Xword	sh_flags;
+	Elf64_Addr	sh_addr;
+	Elf64_Off	sh_offset;
+	Elf64_Xword	sh_size;
+	Elf64_Word	sh_link;
+	Elf64_Word	sh_info;
+	Elf64_Xword	sh_addralign;
+	Elf64_Xword	sh_entsize;
+} Elf64_Shdr;
+
+/*
+ * Note header
+ */
+typedef struct elf32_note {
+	Elf32_Word	n_namesz;	/* Name size */
+	Elf32_Word	n_descsz;	/* Content size */
+	Elf32_Word	n_type;		/* Content type */
+} Elf32_Nhdr;
+
+typedef struct elf64_note {
+	Elf64_Word	n_namesz;	/* Name size */
+	Elf64_Word	n_descsz;	/* Content size */
+	Elf64_Word	n_type;		/* Content type */
+} Elf64_Nhdr;
+
+#endif /* OUTPUT_ELF_H */

_service:tar_scm:nasm-2.16.03.tar.xz/output/legacy.c Added

@@ -0,0 +1,125 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 2016-2023 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * output/legacy.c
+ *
+ * Mangle a struct out_data to match the rather bizarre legacy
+ * backend interface.
+ *
+ * The "data" parameter for the output function points to a "int64_t",
+ * containing the address of the target in question, unless the type is
+ * OUT_RAWDATA, in which case it points to an "uint8_t"
+ * array.
+ *
+ * Exceptions are OUT_RELxADR, which denote an x-byte relocation
+ * which will be a relative jump. For this we need to know the
+ * distance in bytes from the start of the relocated record until
+ * the end of the containing instruction. _This_ is what is stored
+ * in the size part of the parameter, in this case.
+ *
+ * Also OUT_RESERVE denotes reservation of N bytes of BSS space,
+ * and the contents of the "data" parameter is irrelevant.
+ */
+
+#include "nasm.h"
+#include "outlib.h"
+
+void nasm_do_legacy_output(const struct out_data *data)
+{
+    const void *dptr = data->data;
+    enum out_type type = data->type;
+    int32_t tsegment = data->tsegment;
+    int32_t twrt = data->twrt;
+    uint64_t size = data->size;
+
+    switch (data->type) {
+    case OUT_RELADDR:
+        switch (data->size) {
+        case 1:
+            type = OUT_REL1ADR;
+            break;
+        case 2:
+            type = OUT_REL2ADR;
+            break;
+        case 4:
+            type = OUT_REL4ADR;
+            break;
+        case 8:
+            type = OUT_REL8ADR;
+            break;
+        default:
+            panic();
+            break;
+        }
+
+        dptr = &data->toffset;
+        size = data->relbase - data->offset;
+        break;
+
+    case OUT_SEGMENT:
+        type = OUT_ADDRESS;
+        if (tsegment != NO_SEG && tsegment < SEG_ABS)
+            tsegment |= 1;
+        dptr = zero_buffer;
+        size = data->size;
+        break;
+
+    case OUT_ADDRESS:
+        dptr = &data->toffset;
+        size = (data->flags & OUT_SIGNED) ? -data->size : data->size;
+        break;
+
+    case OUT_RAWDATA:
+    case OUT_RESERVE:
+        tsegment = twrt = NO_SEG;
+        break;
+
+    case OUT_ZERODATA:
+        tsegment = twrt = NO_SEG;
+        type = OUT_RAWDATA;
+        dptr = zero_buffer;
+        while (size > ZERO_BUF_SIZE) {
+            ofmt->legacy_output(data->segment, dptr, type,
+                                ZERO_BUF_SIZE, tsegment, twrt);
+            size -= ZERO_BUF_SIZE;
+        }
+        break;
+
+    default:
+        panic();
+        break;
+    }
+
+    ofmt->legacy_output(data->segment, dptr, type, size, tsegment, twrt);
+}

_service:tar_scm:nasm-2.16.03.tar.xz/output/macho.h Added

@@ -0,0 +1,282 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2018 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#ifndef OUTPUT_MACHO_H
+#define OUTPUT_MACHO_H
+
+#include "compiler.h"
+
+/* Magics */
+#define MH_MAGIC			0xfeedface
+#define MH_MAGIC_64			0xfeedfacf
+
+/* File types */
+#define MH_OBJECT			0x1
+
+/* CPUs */
+#define CPU_ARCH_MASK			0xff000000
+#define CPU_ARCH_ABI64			0x01000000
+#define CPU_TYPE_X86			7
+#define CPU_TYPE_I386			CPU_TYPE_X86
+#define CPU_TYPE_X86_64			(CPU_TYPE_X86 | CPU_ARCH_ABI64)
+
+#define CPU_SUBTYPE_MASK		0xff000000
+#define CPU_SUBTYPE_I386_ALL		3
+
+/* Header flags */
+#define MH_SUBSECTIONS_VIA_SYMBOLS	0x00002000
+
+/* Load commands */
+#define LC_SEGMENT			0x1
+#define LC_SEGMENT_64			0x19
+#define LC_SYMTAB			0x2
+
+/* Symbol type bits */
+#define N_STAB				0xe0
+#define	N_PEXT				0x10
+#define N_TYPE				0x0e
+#define N_EXT				0x01
+
+/* To mask with N_TYPE */
+#define N_UNDF				0x00
+#define N_ABS				0x02
+#define N_INDR				0x0a
+#define N_PBUD				0x0c
+#define N_SECT				0x0e
+
+/* Section ordinals */
+#define NO_SECT				0x00
+#define MAX_SECT			0xff
+
+/* Section bits */
+#define SECTION_TYPE			0x000000ff
+#define SECTION_ATTRIBUTES		0xffffff00
+#define SECTION_ATTRIBUTES_USR		0xff000000
+#define SECTION_ATTRIBUTES_SYS		0x00ffff00
+
+#define S_REGULAR				0x00
+#define S_ZEROFILL				0x01
+#define S_CSTRING_LITERALS			0x02
+#define S_4BYTE_LITERALS			0x03
+#define S_8BYTE_LITERALS			0x04
+#define S_LITERAL_POINTERS			0x05
+#define S_NON_LAZY_SYMBOL_POINTERS		0x06
+#define S_LAZY_SYMBOL_POINTERS			0x07
+#define S_SYMBOL_STUBS				0x08
+#define S_MOD_INIT_FUNC_POINTERS		0x09
+#define S_MOD_TERM_FUNC_POINTERS		0x0a
+#define S_COALESCED				0x0b
+#define S_GB_ZEROFILL				0x0c
+#define S_INTERPOSING				0x0d
+#define S_16BYTE_LITERALS			0x0e
+#define S_DTRACE_DOF				0x0f
+#define S_LAZY_DYLIB_SYMBOL_POINTERS		0x10
+#define S_THREAD_LOCAL_REGULAR			0x11
+#define S_THREAD_LOCAL_ZEROFILL			0x12
+#define S_THREAD_LOCAL_VARIABLES		0x13
+#define S_THREAD_LOCAL_VARIABLE_POINTERS	0x14
+#define S_THREAD_LOCAL_INIT_FUNCTION_POINTERS	0x15
+
+#define S_ATTR_PURE_INSTRUCTIONS		0x80000000
+#define S_ATTR_NO_TOC				0x40000000
+#define S_ATTR_STRIP_STATIC_SYMS		0x20000000
+#define S_ATTR_NO_DEAD_STRIP			0x10000000
+#define S_ATTR_LIVE_SUPPORT			0x08000000
+#define S_ATTR_SELF_MODIFYING_CODE		0x04000000
+#define S_ATTR_DEBUG				0x02000000
+
+#define S_ATTR_SOME_INSTRUCTIONS		0x00000400
+#define S_ATTR_EXT_RELOC			0x00000200
+#define S_ATTR_LOC_RELOC			0x00000100
+#define INDIRECT_SYMBOL_LOCAL			0x80000000
+#define INDIRECT_SYMBOL_ABS			0x40000000
+
+/* Relocation info type */
+#define GENERIC_RELOC_VANILLA		0
+#define GENERIC_RELOC_PAIR		1
+#define GENERIC_RELOC_SECTDIFF		2
+#define GENERIC_RELOC_PB_LA_PTR		3
+#define GENERIC_RELOC_LOCAL_SECTDIFF	4
+#define GENERIC_RELOC_TLV		5
+
+#define X86_64_RELOC_UNSIGNED		0
+#define X86_64_RELOC_SIGNED		1
+#define X86_64_RELOC_BRANCH		2
+#define X86_64_RELOC_GOT_LOAD		3
+#define X86_64_RELOC_GOT		4
+#define X86_64_RELOC_SUBTRACTOR		5
+#define X86_64_RELOC_SIGNED_1		6
+#define X86_64_RELOC_SIGNED_2		7
+#define X86_64_RELOC_SIGNED_4		8
+#define X86_64_RELOC_TLV		9
+
+/* Relocation info */
+#define R_ABS		0
+#define R_SCATTERED	0x80000000
+
+/* VM permission constants */
+#define	VM_PROT_NONE			0x00
+#define VM_PROT_READ			0x01
+#define VM_PROT_WRITE			0x02
+#define VM_PROT_EXECUTE			0x04
+
+typedef struct {
+	uint32_t	magic;
+	uint32_t	cputype;
+	uint32_t	cpusubtype;
+	uint32_t	filetype;
+	uint32_t	ncmds;
+	uint32_t	sizeofcmds;
+	uint32_t	flags;
+} macho_header_t;
+
+typedef struct {
+	uint32_t	magic;
+	uint32_t	cputype;
+	uint32_t	cpusubtype;
+	uint32_t	filetype;
+	uint32_t	ncmds;
+	uint32_t	sizeofcmds;
+	uint32_t	flags;
+	uint32_t	reserved;
+} macho_header_64_t;
+
+typedef struct {
+	uint32_t	cmd;
+	uint32_t	cmdsize;
+} macho_load_command_t;
+
+typedef struct {
+	uint32_t	cmd;
+	uint32_t	cmdsize;
+	char		segname16;
+	uint32_t	vmaddr;
+	uint32_t	vmsize;
+	uint32_t	fileoff;
+	uint32_t	filesize;
+	uint32_t	maxprot;
+	uint32_t	initprot;
+	uint32_t	nsects;
+	uint32_t	flags;
+} macho_segment_command_t;
+
+typedef struct {
+	uint32_t	cmd;
+	uint32_t	cmdsize;
+	char		segname16;
+	uint64_t	vmaddr;
+	uint64_t	vmsize;
+	uint64_t	fileoff;
+	uint64_t	filesize;
+	uint32_t	maxprot;
+	uint32_t	initprot;
+	uint32_t	nsects;
+	uint32_t	flags;
+} macho_segment_command_64_t;
+
+typedef struct {
+	char		sectname16;
+	char		segname16;
+	uint32_t	addr;
+	uint32_t	size;
+	uint32_t	offset;
+	uint32_t	align;
+	uint32_t	reloff;
+	uint32_t	nreloc;
+	uint32_t	flags;
+	uint32_t	reserved1;
+	uint32_t	reserved2;
+} macho_section_t;
+
+typedef struct {
+	char		sectname16;
+	char		segname16;
+	uint64_t	addr;
+	uint64_t	size;
+	uint32_t	offset;
+	uint32_t	align;
+	uint32_t	reloff;
+	uint32_t	nreloc;
+	uint32_t	flags;
+	uint32_t	reserved1;
+	uint32_t	reserved2;
+	uint32_t	reserved3;
+} macho_section_64_t;
+
+typedef struct {
+	uint32_t	cmd;
+	uint32_t	cmdsize;
+	uint32_t	symoff;
+	uint32_t	nsyms;
+	uint32_t	stroff;
+	uint32_t	strsize;
+} macho_symtab_command_t;
+
+typedef struct {
+	int32_t		r_address;
+	union {
+		struct {
+			uint32_t	r_symbolnum:	24,
+					r_pcrel:	1,
+					r_length:	2,
+					r_extern:	1,
+					r_type:		4;
+		} s;
+		uint32_t	r_raw;
+	} u;
+} macho_relocation_info_t;
+
+typedef struct nlist_base {
+	uint32_t	n_strx;
+	uint8_t		n_type;
+	uint8_t		n_sect;
+	uint16_t	n_desc;
+} macho_nlist_base_t;
+
+typedef struct nlist {
+	uint32_t	n_strx;
+	uint8_t		n_type;
+	uint8_t		n_sect;
+	int16_t		n_desc;
+	uint32_t	n_value;
+} macho_nlist_t;
+
+typedef struct {
+	uint32_t	n_strx;
+	uint8_t		n_type;
+	uint8_t		n_sect;
+	uint16_t	n_desc;
+	uint64_t	n_value;
+} macho_nlist_64_t;
+
+#endif /* OUTPUT_MACHO_H */

_service:tar_scm:nasm-2.16.03.tar.xz/output/nulldbg.c Added

@@ -0,0 +1,96 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2014 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#include "nasm.h"
+#include "nasmlib.h"
+#include "outlib.h"
+
+void null_debug_init(void)
+{
+}
+
+void null_debug_linenum(const char *filename, int32_t linenumber, int32_t segto)
+{
+	(void)filename;
+	(void)linenumber;
+	(void)segto;
+}
+
+void null_debug_deflabel(char *name, int32_t segment, int64_t offset,
+                         int is_global, char *special)
+{
+	(void)name;
+	(void)segment;
+	(void)offset;
+	(void)is_global;
+	(void)special;
+}
+
+void null_debug_directive(const char *directive, const char *params)
+{
+	(void)directive;
+	(void)params;
+}
+
+void null_debug_typevalue(int32_t type)
+{
+	(void)type;
+}
+
+void null_debug_output(int type, void *param)
+{
+	(void)type;
+	(void)param;
+}
+
+void null_debug_cleanup(void)
+{
+}
+
+const struct dfmt null_debug_form = {
+    "Null",
+    "null",
+    null_debug_init,
+    null_debug_linenum,
+    null_debug_deflabel,
+    NULL,                       /* .debug_smacros */
+    NULL,                       /* .debug_include */
+    NULL,                       /* .debug_mmacros */
+    null_debug_directive,
+    null_debug_typevalue,
+    null_debug_output,
+    null_debug_cleanup,
+    NULL                        /* pragma list */
+};
+
+const struct dfmt * const null_debug_arr2 = { &null_debug_form, NULL };

_service:tar_scm:nasm-2.16.03.tar.xz/output/nullout.c Added

@@ -0,0 +1,60 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2018 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#include "nasm.h"
+#include "nasmlib.h"
+#include "outlib.h"
+
+enum directive_result
+null_directive(enum directive directive, char *value)
+{
+    (void)directive;
+    (void)value;
+    return DIRR_UNKNOWN;
+}
+
+void null_sectalign(int32_t seg, unsigned int value)
+{
+    (void)seg;
+    (void)value;
+}
+
+void null_reset(void)
+{
+    /* Nothing to do */
+}
+
+int32_t null_segbase(int32_t segment)
+{
+    return segment;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/output/outaout.c Added

@@ -0,0 +1,923 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2013 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/* 
+ * outaout.c	output routines for the Netwide Assembler to produce
+ *		Linux a.out object files
+ */
+
+#include "compiler.h"
+
+#include "nctype.h"
+
+#include "nasm.h"
+#include "nasmlib.h"
+#include "error.h"
+#include "saa.h"
+#include "raa.h"
+#include "stdscan.h"
+#include "eval.h"
+#include "outform.h"
+#include "outlib.h"
+
+#if defined OF_AOUT || defined OF_AOUTB
+
+#define RELTYPE_ABSOLUTE 0x00
+#define RELTYPE_RELATIVE 0x01
+#define RELTYPE_GOTPC    0x01   /* no explicit GOTPC in a.out */
+#define RELTYPE_GOTOFF   0x10
+#define RELTYPE_GOT      0x10   /* distinct from GOTOFF bcos sym not sect */
+#define RELTYPE_PLT      0x21
+#define RELTYPE_SYMFLAG  0x08
+
+struct Reloc {
+    struct Reloc *next;
+    int32_t address;               /* relative to _start_ of section */
+    int32_t symbol;                /* symbol number or -ve section id */
+    int bytes;                  /* 2 or 4 */
+    int reltype;                /* see above */
+};
+
+struct Symbol {
+    int32_t strpos;                /* string table position of name */
+    int type;                   /* symbol type - see flags below */
+    int32_t value;                 /* address, or COMMON variable size */
+    int32_t size;                  /* size for data or function exports */
+    int32_t segment;               /* back-reference used by gsym_reloc */
+    struct Symbol *next;        /* list of globals in each section */
+    struct Symbol *nextfwd;     /* list of unresolved-size symbols */
+    char *name;                 /* for unresolved-size symbols */
+    int32_t symnum;                /* index into symbol table */
+};
+
+/*
+ * Section IDs - used in Reloc.symbol when negative, and in
+ * Symbol.type when positive.
+ */
+#define SECT_ABS 2              /* absolute value */
+#define SECT_TEXT 4             /* text section */
+#define SECT_DATA 6             /* data section */
+#define SECT_BSS 8              /* bss section */
+#define SECT_MASK 0xE           /* mask out any of the above */
+
+/*
+ * More flags used in Symbol.type.
+ */
+#define SYM_GLOBAL 1            /* it's a global symbol */
+#define SYM_DATA 0x100          /* used for shared libs */
+#define SYM_FUNCTION 0x200      /* used for shared libs */
+#define SYM_WITH_SIZE 0x4000    /* not output; internal only */
+
+/*
+ * Bit more explanation of symbol types: SECT_xxx denotes a local
+ * symbol. SECT_xxx|SYM_GLOBAL denotes a global symbol, defined in
+ * this module. Just SYM_GLOBAL, with zero value, denotes an
+ * external symbol referenced in this module. And just SYM_GLOBAL,
+ * but with a non-zero value, declares a C `common' variable, of
+ * size `value'.
+ */
+
+struct Section {
+    struct SAA *data;
+    uint32_t len, size, nrelocs;
+    int32_t index;
+    struct Reloc *head, **tail;
+    struct Symbol *gsyms, *asym;
+};
+
+static struct Section stext, sdata, sbss;
+
+static struct SAA *syms;
+static uint32_t nsyms;
+
+static struct RAA *bsym;
+
+static struct SAA *strs;
+static uint32_t strslen;
+
+static struct Symbol *fwds;
+
+static int bsd;
+static int is_pic;
+
+static void aout_write(void);
+static void aout_write_relocs(struct Reloc *);
+static void aout_write_syms(void);
+static void aout_sect_write(struct Section *, const uint8_t *,
+                            uint32_t);
+static void aout_pad_sections(void);
+static void aout_fixup_relocs(struct Section *);
+
+/*
+ * Special section numbers which are used to define special
+ * symbols, which can be used with WRT to provide PIC relocation
+ * types.
+ */
+static int32_t aout_gotpc_sect, aout_gotoff_sect;
+static int32_t aout_got_sect, aout_plt_sect;
+static int32_t aout_sym_sect;
+
+static void aoutg_init(void)
+{
+    stext.data = saa_init(1L);
+    stext.head = NULL;
+    stext.tail = &stext.head;
+    sdata.data = saa_init(1L);
+    sdata.head = NULL;
+    sdata.tail = &sdata.head;
+    stext.len = stext.size = sdata.len = sdata.size = sbss.len = 0;
+    stext.nrelocs = sdata.nrelocs = 0;
+    stext.gsyms = sdata.gsyms = sbss.gsyms = NULL;
+    stext.index = seg_alloc();
+    sdata.index = seg_alloc();
+    sbss.index = seg_alloc();
+    stext.asym = sdata.asym = sbss.asym = NULL;
+    syms = saa_init((int32_t)sizeof(struct Symbol));
+    nsyms = 0;
+    bsym = raa_init();
+    strs = saa_init(1L);
+    strslen = 0;
+    fwds = NULL;
+}
+
+#ifdef OF_AOUT
+
+static void aout_init(void)
+{
+    bsd = false;
+    aoutg_init();
+
+    aout_gotpc_sect = aout_gotoff_sect = aout_got_sect =
+        aout_plt_sect = aout_sym_sect = NO_SEG;
+}
+
+#endif
+
+#ifdef OF_AOUTB
+
+extern const struct ofmt of_aoutb;
+
+static void aoutb_init(void)
+{
+    bsd = true;
+    aoutg_init();
+
+    is_pic = 0x00;              /* may become 0x40 */
+
+    aout_gotpc_sect = seg_alloc();
+    backend_label("..gotpc", aout_gotpc_sect + 1, 0L);
+    aout_gotoff_sect = seg_alloc();
+    backend_label("..gotoff", aout_gotoff_sect + 1, 0L);
+    aout_got_sect = seg_alloc();
+    backend_label("..got", aout_got_sect + 1, 0L);
+    aout_plt_sect = seg_alloc();
+    backend_label("..plt", aout_plt_sect + 1, 0L);
+    aout_sym_sect = seg_alloc();
+    backend_label("..sym", aout_sym_sect + 1, 0L);
+}
+
+#endif
+
+static void aout_cleanup(void)
+{
+    struct Reloc *r;
+
+    aout_pad_sections();
+    aout_fixup_relocs(&stext);
+    aout_fixup_relocs(&sdata);
+    aout_write();
+    saa_free(stext.data);
+    while (stext.head) {
+        r = stext.head;
+        stext.head = stext.head->next;
+        nasm_free(r);
+    }
+    saa_free(sdata.data);
+    while (sdata.head) {
+        r = sdata.head;
+        sdata.head = sdata.head->next;
+        nasm_free(r);
+    }
+    saa_free(syms);
+    raa_free(bsym);
+    saa_free(strs);
+}
+
+static int32_t aout_section_names(char *name, int *bits)
+{
+    /*
+     * Default to 32 bits.
+     */
+    if (!name) {
+        *bits = 32;
+        return stext.index;
+    }
+
+    if (!strcmp(name, ".text"))
+        return stext.index;
+    else if (!strcmp(name, ".data"))
+        return sdata.index;
+    else if (!strcmp(name, ".bss"))
+        return sbss.index;
+    else
+        return NO_SEG;
+}
+
+static void aout_deflabel(char *name, int32_t segment, int64_t offset,
+                          int is_global, char *special)
+{
+    int pos = strslen + 4;
+    struct Symbol *sym;
+    int special_used = false;
+
+    if (name0 == '.' && name1 == '.' && name2 != '@') {
+        /*
+         * This is a NASM special symbol. We never allow it into
+         * the a.out symbol table, even if it's a valid one. If it
+         * _isn't_ a valid one, we should barf immediately.
+         */
+        if (strcmp(name, "..gotpc") && strcmp(name, "..gotoff") &&
+            strcmp(name, "..got") && strcmp(name, "..plt") &&
+            strcmp(name, "..sym"))
+            nasm_nonfatal("unrecognised special symbol `%s'", name);
+        return;
+    }
+
+    if (is_global == 3) {
+        struct Symbol **s;
+        /*
+         * Fix up a forward-reference symbol size from the first
+         * pass.
+         */
+        for (s = &fwds; *s; s = &(*s)->nextfwd)
+            if (!strcmp((*s)->name, name)) {
+                struct tokenval tokval;
+                expr *e;
+                char *p = special;
+
+                p = nasm_skip_spaces(nasm_skip_word(p));
+                stdscan_reset();
+                stdscan_set(p);
+                tokval.t_type = TOKEN_INVALID;
+                e = evaluate(stdscan, NULL, &tokval, NULL, 1, NULL);
+                if (e) {
+                    if (!is_simple(e))
+                        nasm_nonfatal("cannot use relocatable"
+                                      " expression as symbol size");
+                    else
+                        (*s)->size = reloc_value(e);
+                }
+
+                /*
+                 * Remove it from the list of unresolved sizes.
+                 */
+                nasm_free((*s)->name);
+                *s = (*s)->nextfwd;
+                return;
+            }
+        return;                 /* it wasn't an important one */
+    }
+
+    saa_wbytes(strs, name, (int32_t)(1 + strlen(name)));
+    strslen += 1 + strlen(name);
+
+    sym = saa_wstruct(syms);
+
+    sym->strpos = pos;
+    sym->type = is_global ? SYM_GLOBAL : 0;
+    sym->segment = segment;
+    if (segment == NO_SEG)
+        sym->type |= SECT_ABS;
+    else if (segment == stext.index) {
+        sym->type |= SECT_TEXT;
+        if (is_global) {
+            sym->next = stext.gsyms;
+            stext.gsyms = sym;
+        } else if (!stext.asym)
+            stext.asym = sym;
+    } else if (segment == sdata.index) {
+        sym->type |= SECT_DATA;
+        if (is_global) {
+            sym->next = sdata.gsyms;
+            sdata.gsyms = sym;
+        } else if (!sdata.asym)
+            sdata.asym = sym;
+    } else if (segment == sbss.index) {
+        sym->type |= SECT_BSS;
+        if (is_global) {
+            sym->next = sbss.gsyms;
+            sbss.gsyms = sym;
+        } else if (!sbss.asym)
+            sbss.asym = sym;
+    } else
+        sym->type = SYM_GLOBAL;
+    if (is_global == 2)
+        sym->value = offset;
+    else
+        sym->value = (sym->type == SYM_GLOBAL ? 0 : offset);
+
+    if (is_global && sym->type != SYM_GLOBAL) {
+        /*
+         * Global symbol exported _from_ this module. We must check
+         * the special text for type information.
+         */
+
+        if (special) {
+            int n = strcspn(special, " ");
+
+            if (!nasm_strnicmp(special, "function", n))
+                sym->type |= SYM_FUNCTION;
+            else if (!nasm_strnicmp(special, "data", n) ||
+                     !nasm_strnicmp(special, "object", n))
+                sym->type |= SYM_DATA;
+            else
+                nasm_nonfatal("unrecognised symbol type `%.*s'",
+                              n, special);
+            if (specialn) {
+                struct tokenval tokval;
+                expr *e;
+                int fwd = false;
+                char *saveme = stdscan_get();
+
+                if (!bsd) {
+                    nasm_nonfatal("Linux a.out does not support"
+                                  " symbol size information");
+                } else {
+                    while (specialn && nasm_isspace(specialn))
+                        n++;
+                    /*
+                     * We have a size expression; attempt to
+                     * evaluate it.
+                     */
+                    sym->type |= SYM_WITH_SIZE;
+                    stdscan_reset();
+                    stdscan_set(special + n);
+                    tokval.t_type = TOKEN_INVALID;
+                    e = evaluate(stdscan, NULL, &tokval, &fwd, 0, NULL);
+                    if (fwd) {
+                        sym->nextfwd = fwds;
+                        fwds = sym;
+                        sym->name = nasm_strdup(name);
+                    } else if (e) {
+                        if (!is_simple(e))
+                            nasm_nonfatal("cannot use relocatable"
+                                          " expression as symbol size");
+                        else
+                            sym->size = reloc_value(e);
+                    }
+                }
+                stdscan_set(saveme);
+            }
+            special_used = true;
+        }
+    }
+
+    /*
+     * define the references from external-symbol segment numbers
+     * to these symbol records.
+     */
+    if (segment != NO_SEG && segment != stext.index &&
+        segment != sdata.index && segment != sbss.index)
+        bsym = raa_write(bsym, segment, nsyms);
+    sym->symnum = nsyms;
+
+    nsyms++;
+    if (sym->type & SYM_WITH_SIZE)
+        nsyms++;                /* and another for the size */
+
+    if (special && !special_used)
+        nasm_nonfatal("no special symbol features supported here");
+}
+
+static void aout_add_reloc(struct Section *sect, int32_t segment,
+                           int reltype, int bytes)
+{
+    struct Reloc *r;
+
+    r = *sect->tail = nasm_malloc(sizeof(struct Reloc));
+    sect->tail = &r->next;
+    r->next = NULL;
+
+    r->address = sect->len;
+    r->symbol = (segment == NO_SEG ? -SECT_ABS :
+                 segment == stext.index ? -SECT_TEXT :
+                 segment == sdata.index ? -SECT_DATA :
+                 segment == sbss.index ? -SECT_BSS :
+                 raa_read(bsym, segment));
+    r->reltype = reltype;
+    if (r->symbol >= 0)
+        r->reltype |= RELTYPE_SYMFLAG;
+    r->bytes = bytes;
+
+    sect->nrelocs++;
+}
+
+/*
+ * This routine deals with ..got and ..sym relocations: the more
+ * complicated kinds. In shared-library writing, some relocations
+ * with respect to global symbols must refer to the precise symbol
+ * rather than referring to an offset from the base of the section
+ * _containing_ the symbol. Such relocations call to this routine,
+ * which searches the symbol list for the symbol in question.
+ *
+ * RELTYPE_GOT references require the _exact_ symbol address to be
+ * used; RELTYPE_ABSOLUTE references can be at an offset from the
+ * symbol. The boolean argument `exact' tells us this.
+ *
+ * Return value is the adjusted value of `addr', having become an
+ * offset from the symbol rather than the section. Should always be
+ * zero when returning from an exact call.
+ *
+ * Limitation: if you define two symbols at the same place,
+ * confusion will occur.
+ *
+ * Inefficiency: we search, currently, using a linked list which
+ * isn't even necessarily sorted.
+ */
+static int32_t aout_add_gsym_reloc(struct Section *sect,
+                                int32_t segment, int32_t offset,
+                                int type, int bytes, int exact)
+{
+    struct Symbol *sym, *sm, *shead;
+    struct Reloc *r;
+
+    /*
+     * First look up the segment to find whether it's text, data,
+     * bss or an external symbol.
+     */
+    shead = NULL;
+    if (segment == stext.index)
+        shead = stext.gsyms;
+    else if (segment == sdata.index)
+        shead = sdata.gsyms;
+    else if (segment == sbss.index)
+        shead = sbss.gsyms;
+    if (!shead) {
+        if (exact && offset != 0)
+            nasm_nonfatal("unable to find a suitable global symbol"
+                          " for this reference");
+        else
+            aout_add_reloc(sect, segment, type, bytes);
+        return offset;
+    }
+
+    if (exact) {
+        /*
+         * Find a symbol pointing _exactly_ at this one.
+         */
+        list_for_each(sym, shead)
+            if (sym->value == offset)
+                break;
+    } else {
+        /*
+         * Find the nearest symbol below this one.
+         */
+        sym = NULL;
+        list_for_each(sm, shead)
+            if (sm->value <= offset && (!sym || sm->value > sym->value))
+                sym = sm;
+    }
+    if (!sym && exact) {
+        nasm_nonfatal("unable to find a suitable global symbol"
+                      " for this reference");
+        return 0;
+    }
+
+    r = *sect->tail = nasm_malloc(sizeof(struct Reloc));
+    sect->tail = &r->next;
+    r->next = NULL;
+
+    r->address = sect->len;
+    r->symbol = sym->symnum;
+    r->reltype = type | RELTYPE_SYMFLAG;
+    r->bytes = bytes;
+
+    sect->nrelocs++;
+
+    return offset - sym->value;
+}
+
+/*
+ * This routine deals with ..gotoff relocations. These _must_ refer
+ * to a symbol, due to a perversity of *BSD's PIC implementation,
+ * and it must be a non-global one as well; so we store `asym', the
+ * first nonglobal symbol defined in each section, and always work
+ * from that. Relocation type is always RELTYPE_GOTOFF.
+ *
+ * Return value is the adjusted value of `addr', having become an
+ * offset from the `asym' symbol rather than the section.
+ */
+static int32_t aout_add_gotoff_reloc(struct Section *sect, int32_t segment,
+                                  int32_t offset, int bytes)
+{
+    struct Reloc *r;
+    struct Symbol *asym;
+
+    /*
+     * First look up the segment to find whether it's text, data,
+     * bss or an external symbol.
+     */
+    asym = NULL;
+    if (segment == stext.index)
+        asym = stext.asym;
+    else if (segment == sdata.index)
+        asym = sdata.asym;
+    else if (segment == sbss.index)
+        asym = sbss.asym;
+    if (!asym)
+        nasm_nonfatal("`..gotoff' relocations require a non-global"
+                      " symbol in the section");
+
+    r = *sect->tail = nasm_malloc(sizeof(struct Reloc));
+    sect->tail = &r->next;
+    r->next = NULL;
+
+    r->address = sect->len;
+    r->symbol = asym->symnum;
+    r->reltype = RELTYPE_GOTOFF;
+    r->bytes = bytes;
+
+    sect->nrelocs++;
+
+    return offset - asym->value;
+}
+
+static void aout_out(int32_t segto, const void *data,
+		     enum out_type type, uint64_t size,
+                     int32_t segment, int32_t wrt)
+{
+    struct Section *s;
+    int32_t addr;
+    uint8_t mydata4, *p;
+
+    if (segto == stext.index)
+        s = &stext;
+    else if (segto == sdata.index)
+        s = &sdata;
+    else if (segto == sbss.index)
+        s = NULL;
+    else {
+        nasm_warn(WARN_OTHER, "attempt to assemble code in"
+                  " segment %d: defaulting to `.text'", segto);
+        s = &stext;
+    }
+
+    if (!s && type != OUT_RESERVE) {
+        nasm_warn(WARN_OTHER, "attempt to initialize memory in the"
+                  " BSS section: ignored");
+        sbss.len += realsize(type, size);
+        return;
+    }
+
+    memset(mydata, 0, sizeof(mydata));
+
+    if (type == OUT_RESERVE) {
+        if (s) {
+            nasm_warn(WARN_ZEROING, "uninitialized space declared in"
+                      " %s section: zeroing",
+                      (segto == stext.index ? "code" : "data"));
+            aout_sect_write(s, NULL, size);
+        } else
+            sbss.len += size;
+    } else if (type == OUT_RAWDATA) {
+        aout_sect_write(s, data, size);
+    } else if (type == OUT_ADDRESS) {
+        int asize = abs((int)size);
+        addr = *(int64_t *)data;
+        if (segment != NO_SEG) {
+            if (segment % 2) {
+                nasm_nonfatal("a.out format does not support"
+                              " segment base references");
+            } else {
+                if (wrt == NO_SEG) {
+                    aout_add_reloc(s, segment, RELTYPE_ABSOLUTE, asize);
+                } else if (!bsd) {
+                    nasm_nonfatal("Linux a.out format does not support"
+                                  " any use of WRT");
+                    wrt = NO_SEG;       /* we can at least _try_ to continue */
+                } else if (wrt == aout_gotpc_sect + 1) {
+                    is_pic = 0x40;
+                    aout_add_reloc(s, segment, RELTYPE_GOTPC, asize);
+                } else if (wrt == aout_gotoff_sect + 1) {
+                    is_pic = 0x40;
+                    addr = aout_add_gotoff_reloc(s, segment, addr, asize);
+                } else if (wrt == aout_got_sect + 1) {
+                    is_pic = 0x40;
+                    addr = aout_add_gsym_reloc(s, segment, addr, RELTYPE_GOT,
+                                               asize, true);
+                } else if (wrt == aout_sym_sect + 1) {
+                    addr = aout_add_gsym_reloc(s, segment, addr,
+                                               RELTYPE_ABSOLUTE, asize,
+                                               false);
+                } else if (wrt == aout_plt_sect + 1) {
+                    is_pic = 0x40;
+                    nasm_nonfatal("a.out format cannot produce non-PC-"
+                                  "relative PLT references");
+                } else {
+                    nasm_nonfatal("a.out format does not support this"
+                                  " use of WRT");
+                    wrt = NO_SEG;       /* we can at least _try_ to continue */
+                }
+            }
+        }
+        p = mydata;
+        if (asize == 2)
+            WRITESHORT(p, addr);
+        else
+            WRITELONG(p, addr);
+        aout_sect_write(s, mydata, asize);
+    } else if (type == OUT_REL2ADR) {
+        if (segment != NO_SEG && segment % 2) {
+            nasm_nonfatal("a.out format does not support"
+                          " segment base references");
+        } else {
+            if (wrt == NO_SEG) {
+                aout_add_reloc(s, segment, RELTYPE_RELATIVE, 2);
+            } else if (!bsd) {
+                nasm_nonfatal("Linux a.out format does not support"
+                              " any use of WRT");
+                wrt = NO_SEG;   /* we can at least _try_ to continue */
+            } else if (wrt == aout_plt_sect + 1) {
+                is_pic = 0x40;
+                aout_add_reloc(s, segment, RELTYPE_PLT, 2);
+            } else if (wrt == aout_gotpc_sect + 1 ||
+                       wrt == aout_gotoff_sect + 1 ||
+                       wrt == aout_got_sect + 1) {
+                nasm_nonfatal("a.out format cannot produce PC-"
+                              "relative GOT references");
+            } else {
+                nasm_nonfatal("a.out format does not support this"
+                              " use of WRT");
+                wrt = NO_SEG;   /* we can at least _try_ to continue */
+            }
+        }
+        p = mydata;
+        WRITESHORT(p, *(int64_t *)data - (size + s->len));
+        aout_sect_write(s, mydata, 2L);
+    } else if (type == OUT_REL4ADR) {
+        if (segment != NO_SEG && segment % 2) {
+            nasm_nonfatal("a.out format does not support"
+                          " segment base references");
+        } else {
+            if (wrt == NO_SEG) {
+                aout_add_reloc(s, segment, RELTYPE_RELATIVE, 4);
+            } else if (!bsd) {
+                nasm_nonfatal("Linux a.out format does not support"
+                              " any use of WRT");
+                wrt = NO_SEG;   /* we can at least _try_ to continue */
+            } else if (wrt == aout_plt_sect + 1) {
+                is_pic = 0x40;
+                aout_add_reloc(s, segment, RELTYPE_PLT, 4);
+            } else if (wrt == aout_gotpc_sect + 1 ||
+                       wrt == aout_gotoff_sect + 1 ||
+                       wrt == aout_got_sect + 1) {
+                nasm_nonfatal("a.out format cannot produce PC-"
+                              "relative GOT references");
+            } else {
+                nasm_nonfatal("a.out format does not support this"
+                              " use of WRT");
+                wrt = NO_SEG;   /* we can at least _try_ to continue */
+            }
+        }
+        p = mydata;
+        WRITELONG(p, *(int64_t *)data - (size + s->len));
+        aout_sect_write(s, mydata, 4L);
+    }
+}
+
+static void aout_pad_sections(void)
+{
+    static uint8_t pad = { 0x90, 0x90, 0x90, 0x90 };
+    /*
+     * Pad each of the text and data sections with NOPs until their
+     * length is a multiple of four. (NOP == 0x90.) Also increase
+     * the length of the BSS section similarly.
+     */
+    aout_sect_write(&stext, pad, (-(int32_t)stext.len) & 3);
+    aout_sect_write(&sdata, pad, (-(int32_t)sdata.len) & 3);
+    sbss.len = ALIGN(sbss.len, 4);
+}
+
+/*
+ * a.out files have the curious property that all references to
+ * things in the data or bss sections are done by addresses which
+ * are actually relative to the start of the _text_ section, in the
+ * _file_. (No relation to what happens after linking. No idea why
+ * this should be so. It's very strange.) So we have to go through
+ * the relocation table, _after_ the final size of each section is
+ * known, and fix up the relocations pointed to.
+ */
+static void aout_fixup_relocs(struct Section *sect)
+{
+    struct Reloc *r;
+
+    saa_rewind(sect->data);
+    list_for_each(r, sect->head) {
+        uint8_t *p, *q, blk4;
+        int32_t l;
+
+        saa_fread(sect->data, r->address, blk, (int32_t)r->bytes);
+        p = q = blk;
+        l = *p++;
+        if (r->bytes > 1) {
+            l += ((int32_t)*p++) << 8;
+            if (r->bytes == 4) {
+                l += ((int32_t)*p++) << 16;
+                l += ((int32_t)*p++) << 24;
+            }
+        }
+        if (r->symbol == -SECT_DATA)
+            l += stext.len;
+        else if (r->symbol == -SECT_BSS)
+            l += stext.len + sdata.len;
+        if (r->bytes == 4)
+            WRITELONG(q, l);
+        else if (r->bytes == 2)
+            WRITESHORT(q, l);
+        else
+            *q++ = l & 0xFF;
+        saa_fwrite(sect->data, r->address, blk, (int32_t)r->bytes);
+    }
+}
+
+static void aout_write(void)
+{
+    /*
+     * Emit the a.out header.
+     */
+    /* OMAGIC, M_386 or MID_I386, no flags */
+    fwriteint32_t(bsd ? 0x07018600 | is_pic : 0x640107L, ofile);
+    fwriteint32_t(stext.len, ofile);
+    fwriteint32_t(sdata.len, ofile);
+    fwriteint32_t(sbss.len, ofile);
+    fwriteint32_t(nsyms * 12, ofile);     /* length of symbol table */
+    fwriteint32_t(0L, ofile);     /* object files have no entry point */
+    fwriteint32_t(stext.nrelocs * 8, ofile);      /* size of text relocs */
+    fwriteint32_t(sdata.nrelocs * 8, ofile);      /* size of data relocs */
+
+    /*
+     * Write out the code section and the data section.
+     */
+    saa_fpwrite(stext.data, ofile);
+    saa_fpwrite(sdata.data, ofile);
+
+    /*
+     * Write out the relocations.
+     */
+    aout_write_relocs(stext.head);
+    aout_write_relocs(sdata.head);
+
+    /*
+     * Write the symbol table.
+     */
+    aout_write_syms();
+
+    /*
+     * And the string table.
+     */
+    fwriteint32_t(strslen + 4, ofile);    /* length includes length count */
+    saa_fpwrite(strs, ofile);
+}
+
+static void aout_write_relocs(struct Reloc *r)
+{
+    list_for_each(r, r) {
+        uint32_t word2;
+
+        fwriteint32_t(r->address, ofile);
+
+        if (r->symbol >= 0)
+            word2 = r->symbol;
+        else
+            word2 = -r->symbol;
+        word2 |= r->reltype << 24;
+        word2 |= (r->bytes == 1 ? 0 :
+                  r->bytes == 2 ? 0x2000000L : 0x4000000L);
+        fwriteint32_t(word2, ofile);
+    }
+}
+
+static void aout_write_syms(void)
+{
+    uint32_t i;
+
+    saa_rewind(syms);
+    for (i = 0; i < nsyms; i++) {
+        struct Symbol *sym = saa_rstruct(syms);
+        fwriteint32_t(sym->strpos, ofile);
+        fwriteint32_t((int32_t)sym->type & ~SYM_WITH_SIZE, ofile);
+        /*
+         * Fix up the symbol value now we know the final section
+         * sizes.
+         */
+        if ((sym->type & SECT_MASK) == SECT_DATA)
+            sym->value += stext.len;
+        if ((sym->type & SECT_MASK) == SECT_BSS)
+            sym->value += stext.len + sdata.len;
+        fwriteint32_t(sym->value, ofile);
+        /*
+         * Output a size record if necessary.
+         */
+        if (sym->type & SYM_WITH_SIZE) {
+            fwriteint32_t(sym->strpos, ofile);
+            fwriteint32_t(0x0DL, ofile);  /* special value: means size */
+            fwriteint32_t(sym->size, ofile);
+            i++;                /* use up another of `nsyms' */
+        }
+    }
+}
+
+static void aout_sect_write(struct Section *sect,
+                            const uint8_t *data, uint32_t len)
+{
+    saa_wbytes(sect->data, data, len);
+    sect->len += len;
+}
+
+extern macros_t aout_stdmac;
+
+#endif                          /* OF_AOUT || OF_AOUTB */
+
+#ifdef OF_AOUT
+
+const struct ofmt of_aout = {
+    "Linux a.out",
+    "aout",
+    ".o",
+    0,
+    32,
+    null_debug_arr,
+    &null_debug_form,
+    aout_stdmac,
+    aout_init,
+    null_reset,
+    nasm_do_legacy_output,
+    aout_out,
+    aout_deflabel,
+    aout_section_names,
+    NULL,
+    null_sectalign,
+    null_segbase,
+    null_directive,
+    aout_cleanup,
+    NULL                        /* pragma list */
+};
+
+#endif
+
+#ifdef OF_AOUTB
+
+const struct ofmt of_aoutb = {
+    "NetBSD/FreeBSD a.out",
+    "aoutb",
+    ".o",
+    0,
+    32,
+    null_debug_arr,
+    &null_debug_form,
+    aout_stdmac,
+    aoutb_init,
+    null_reset,
+    nasm_do_legacy_output,
+    aout_out,
+    aout_deflabel,
+    aout_section_names,
+    NULL,
+    null_sectalign,
+    null_segbase,
+    null_directive,
+    aout_cleanup,
+    NULL                        /* pragma list */
+};
+
+#endif

_service:tar_scm:nasm-2.16.03.tar.xz/output/outaout.mac Added

@@ -0,0 +1,37 @@
+;; --------------------------------------------------------------------------
+;;   
+;;   Copyright 1996-2009 The NASM Authors - All Rights Reserved
+;;   See the file AUTHORS included with the NASM distribution for
+;;   the specific copyright holders.
+;;
+;;   Redistribution and use in source and binary forms, with or without
+;;   modification, are permitted provided that the following
+;;   conditions are met:
+;;
+;;   * Redistributions of source code must retain the above copyright
+;;     notice, this list of conditions and the following disclaimer.
+;;   * Redistributions in binary form must reproduce the above
+;;     copyright notice, this list of conditions and the following
+;;     disclaimer in the documentation and/or other materials provided
+;;     with the distribution.
+;;     
+;;     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+;;     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+;;     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+;;     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;;     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+;;     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;;     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+;;     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+;;     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+;;     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+;;     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+;;     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;;     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+;; --------------------------------------------------------------------------
+
+OUT: aout aoutb
+%define __?SECT?__ section .text
+%macro __?NASM_CDecl?__ 1
+%endmacro

_service:tar_scm:nasm-2.16.03.tar.xz/output/outas86.c Added

@@ -0,0 +1,611 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2017 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/* 
+ * outas86.c	output routines for the Netwide Assembler to produce
+ *		Linux as86 (bin86-0.3) object files
+ */
+
+#include "compiler.h"
+
+#include "nctype.h"
+
+#include "nasm.h"
+#include "nasmlib.h"
+#include "error.h"
+#include "saa.h"
+#include "raa.h"
+#include "outform.h"
+#include "outlib.h"
+
+#ifdef OF_AS86
+
+struct Piece {
+    struct Piece *next;
+    int type;                   /* 0 = absolute, 1 = seg, 2 = sym */
+    int32_t offset;		/* relative offset */
+    int number;			/* symbol/segment number (4=bss) */
+    int32_t bytes;	        /* size of reloc or of absolute data */
+    bool relative;		/* relative address? */
+};
+
+struct Symbol {
+    int32_t strpos;		/* string table position of name */
+    int flags;                  /* symbol flags */
+    int segment;                /* 4=bss at this point */
+    int32_t value;		/* address, or COMMON variable size */
+};
+
+/*
+ * Section IDs - used in Piece.number and Symbol.segment.
+ */
+#define SECT_TEXT 0             /* text section */
+#define SECT_DATA 3             /* data section */
+#define SECT_BSS 4              /* bss section */
+
+/*
+ * Flags used in Symbol.flags.
+ */
+#define SYM_ENTRY (1<<8)
+#define SYM_EXPORT (1<<7)
+#define SYM_IMPORT (1<<6)
+#define SYM_ABSOLUTE (1<<4)
+
+struct Section {
+    struct SAA *data;
+    uint32_t datalen, size, len;
+    int32_t index;
+    struct Piece *head, *last, **tail;
+};
+
+static struct Section stext, sdata;
+static uint32_t bsslen;
+static int32_t bssindex;
+
+static struct SAA *syms;
+static uint32_t nsyms;
+
+static struct RAA *bsym;
+
+static struct SAA *strs;
+static size_t strslen;
+
+static int as86_reloc_size;
+
+static void as86_write(void);
+static void as86_write_section(struct Section *, int);
+static size_t as86_add_string(const char *name);
+static void as86_sect_write(struct Section *, const uint8_t *,
+                            uint32_t);
+
+static void as86_init(void)
+{
+    stext.data = saa_init(1L);
+    stext.datalen = 0L;
+    stext.head = stext.last = NULL;
+    stext.tail = &stext.head;
+    sdata.data = saa_init(1L);
+    sdata.datalen = 0L;
+    sdata.head = sdata.last = NULL;
+    sdata.tail = &sdata.head;
+    bsslen =
+        stext.len = stext.datalen = stext.size =
+        sdata.len = sdata.datalen = sdata.size = 0;
+    stext.index = seg_alloc();
+    sdata.index = seg_alloc();
+    bssindex = seg_alloc();
+    syms = saa_init((int32_t)sizeof(struct Symbol));
+    nsyms = 0;
+    bsym = raa_init();
+    strs = saa_init(1L);
+    strslen = 0;
+
+    /* as86 module name = input file minus extension */
+    as86_add_string(filename_set_extension(inname, ""));
+}
+
+static void as86_cleanup(void)
+{
+    struct Piece *p;
+
+    as86_write();
+    saa_free(stext.data);
+    while (stext.head) {
+        p = stext.head;
+        stext.head = stext.head->next;
+        nasm_free(p);
+    }
+    saa_free(sdata.data);
+    while (sdata.head) {
+        p = sdata.head;
+        sdata.head = sdata.head->next;
+        nasm_free(p);
+    }
+    saa_free(syms);
+    raa_free(bsym);
+    saa_free(strs);
+}
+
+static int32_t as86_section_names(char *name, int *bits)
+{
+    /*
+     * Default is 16 bits.
+     */
+    if (!name) {
+        *bits = 16;
+        return stext.index;
+    }
+
+    if (!strcmp(name, ".text"))
+        return stext.index;
+    else if (!strcmp(name, ".data"))
+        return sdata.index;
+    else if (!strcmp(name, ".bss"))
+        return bssindex;
+    else
+        return NO_SEG;
+}
+
+static size_t as86_add_string(const char *name)
+{
+    size_t pos = strslen;
+    size_t length = strlen(name);
+
+    saa_wbytes(strs, name, length + 1);
+    strslen += 1 + length;
+
+    return pos;
+}
+
+static void as86_deflabel(char *name, int32_t segment, int64_t offset,
+                          int is_global, char *special)
+{
+    bool is_start = false;
+    struct Symbol *sym;
+
+    if (special)
+        nasm_nonfatal("as86 format does not support any"
+                      " special symbol types");
+
+
+    if (name0 == '.' && name1 == '.' && name2 != '@') {
+	if (strcmp(name, "..start")) {
+	    nasm_nonfatal("unrecognised special symbol `%s'", name);
+	    return;
+	} else {
+	    is_start = true;
+	}
+    }
+
+    sym = saa_wstruct(syms);
+
+    sym->strpos = as86_add_string(name);
+    sym->flags = 0;
+
+    if (is_start)
+      sym->flags = SYM_ENTRY;
+
+    if (segment == NO_SEG)
+        sym->flags |= SYM_ABSOLUTE, sym->segment = 0;
+    else if (segment == stext.index)
+        sym->segment = SECT_TEXT;
+    else if (segment == sdata.index)
+        sym->segment = SECT_DATA;
+    else if (segment == bssindex)
+        sym->segment = SECT_BSS;
+    else {
+        sym->flags |= SYM_IMPORT;
+        sym->segment = 15;
+    }
+
+    if (is_global == 2)
+        sym->segment = 3;       /* already have IMPORT */
+
+    if (is_global && !(sym->flags & SYM_IMPORT))
+        sym->flags |= SYM_EXPORT;
+
+    sym->value = offset;
+
+    /*
+     * define the references from external-symbol segment numbers
+     * to these symbol records.
+     */
+    if (segment != NO_SEG && segment != stext.index &&
+        segment != sdata.index && segment != bssindex)
+        bsym = raa_write(bsym, segment, nsyms);
+
+    nsyms++;
+}
+
+static void as86_add_piece(struct Section *sect, int type, int32_t offset,
+                           int32_t segment, int32_t bytes, int relative)
+{
+    struct Piece *p;
+
+    sect->len += bytes;
+
+    if (type == 0 && sect->last && sect->last->type == 0) {
+        sect->last->bytes += bytes;
+        return;
+    }
+
+    p = sect->last = *sect->tail = nasm_malloc(sizeof(struct Piece));
+    sect->tail = &p->next;
+    p->next = NULL;
+
+    p->type = type;
+    p->offset = offset;
+    p->bytes = bytes;
+    p->relative = relative;
+
+    if (type == 1 && segment == stext.index)
+        p->number = SECT_TEXT;
+    else if (type == 1 && segment == sdata.index)
+        p->number = SECT_DATA;
+    else if (type == 1 && segment == bssindex)
+        p->number = SECT_BSS;
+    else if (type == 1)
+        p->number = raa_read(bsym, segment), p->type = 2;
+}
+
+static void as86_out(int32_t segto, const void *data,
+		     enum out_type type, uint64_t size,
+                     int32_t segment, int32_t wrt)
+{
+    struct Section *s;
+    int32_t offset;
+    uint8_t mydata4, *p;
+
+    if (wrt != NO_SEG) {
+        wrt = NO_SEG;           /* continue to do _something_ */
+        nasm_nonfatal("WRT not supported by as86 output format");
+    }
+
+    if (segto == stext.index)
+        s = &stext;
+    else if (segto == sdata.index)
+        s = &sdata;
+    else if (segto == bssindex)
+        s = NULL;
+    else {
+        nasm_warn(WARN_OTHER, "attempt to assemble code in"
+                  " segment %d: defaulting to `.text'", segto);
+        s = &stext;
+    }
+
+    if (!s && type != OUT_RESERVE) {
+        nasm_warn(WARN_OTHER, "attempt to initialize memory in the"
+                  " BSS section: ignored");
+	bsslen += realsize(type, size);
+        return;
+    }
+
+    memset(mydata, 0, sizeof(mydata));
+
+    if (type == OUT_RESERVE) {
+        if (s) {
+            nasm_warn(WARN_ZEROING, "uninitialized space declared in"
+                      " %s section: zeroing",
+                      (segto == stext.index ? "code" : "data"));
+            as86_sect_write(s, NULL, size);
+            as86_add_piece(s, 0, 0L, 0L, size, 0);
+        } else
+            bsslen += size;
+    } else if (type == OUT_RAWDATA) {
+        as86_sect_write(s, data, size);
+        as86_add_piece(s, 0, 0L, 0L, size, 0);
+    } else if (type == OUT_ADDRESS) {
+        int asize = abs((int)size);
+        if (segment != NO_SEG) {
+            if (segment % 2) {
+                nasm_nonfatal("as86 format does not support"
+                              " segment base references");
+            } else {
+                offset = *(int64_t *)data;
+                as86_add_piece(s, 1, offset, segment, asize, 0);
+            }
+        } else {
+            p = mydata;
+            WRITELONG(p, *(int64_t *)data);
+            as86_sect_write(s, data, asize);
+            as86_add_piece(s, 0, 0L, 0L, asize, 0);
+        }
+    } else if (type == OUT_REL2ADR) {
+        if (segment != NO_SEG) {
+            if (segment % 2) {
+                nasm_nonfatal("as86 format does not support"
+                              " segment base references");
+            } else {
+                offset = *(int64_t *)data;
+                as86_add_piece(s, 1, offset - size + 2, segment, 2L,
+                               1);
+            }
+        }
+    } else if (type == OUT_REL4ADR) {
+        if (segment != NO_SEG) {
+            if (segment % 2) {
+                nasm_nonfatal("as86 format does not support"
+                              " segment base references");
+            } else {
+                offset = *(int64_t *)data;
+                as86_add_piece(s, 1, offset - size + 4, segment, 4L,
+                               1);
+            }
+        }
+    }
+}
+
+static void as86_write(void)
+{
+    uint32_t i;
+    int32_t symlen, seglen, segsize;
+
+    /*
+     * First, go through the symbol records working out how big
+     * each will be. Also fix up BSS references at this time, and
+     * set the flags words up completely.
+     */
+    symlen = 0;
+    saa_rewind(syms);
+    for (i = 0; i < nsyms; i++) {
+        struct Symbol *sym = saa_rstruct(syms);
+        if (sym->segment == SECT_BSS)
+            sym->segment = SECT_DATA, sym->value += sdata.len;
+        sym->flags |= sym->segment;
+        if (sym->value == 0)
+            sym->flags |= 0 << 14, symlen += 4;
+        else if (sym->value >= 0 && sym->value <= 255)
+            sym->flags |= 1 << 14, symlen += 5;
+        else if (sym->value >= 0 && sym->value <= 65535L)
+            sym->flags |= 2 << 14, symlen += 6;
+        else
+            sym->flags |= 3 << 14, symlen += 8;
+    }
+
+    /*
+     * Now do the same for the segments, and get the segment size
+     * descriptor word at the same time.
+     */
+    seglen = segsize = 0;
+    if ((uint32_t)stext.len > 65535L)
+        segsize |= 0x03000000L, seglen += 4;
+    else
+        segsize |= 0x02000000L, seglen += 2;
+    if ((uint32_t)sdata.len > 65535L)
+        segsize |= 0xC0000000L, seglen += 4;
+    else
+        segsize |= 0x80000000L, seglen += 2;
+
+    /*
+     * Emit the as86 header.
+     */
+    fwriteint32_t(0x000186A3L, ofile);
+    fputc(0x2A, ofile);
+    fwriteint32_t(27 + symlen + seglen + strslen, ofile); /* header length */
+    fwriteint32_t(stext.len + sdata.len + bsslen, ofile);
+    fwriteint16_t(strslen, ofile);
+    fwriteint16_t(0, ofile);     /* class = revision = 0 */
+    fwriteint32_t(0x55555555L, ofile);    /* segment max sizes: always this */
+    fwriteint32_t(segsize, ofile);        /* segment size descriptors */
+    if (segsize & 0x01000000L)
+        fwriteint32_t(stext.len, ofile);
+    else
+        fwriteint16_t(stext.len, ofile);
+    if (segsize & 0x40000000L)
+        fwriteint32_t(sdata.len + bsslen, ofile);
+    else
+        fwriteint16_t(sdata.len + bsslen, ofile);
+    fwriteint16_t(nsyms, ofile);
+
+    /*
+     * Write the symbol table.
+     */
+    saa_rewind(syms);
+    for (i = 0; i < nsyms; i++) {
+        struct Symbol *sym = saa_rstruct(syms);
+        fwriteint16_t(sym->strpos, ofile);
+        fwriteint16_t(sym->flags, ofile);
+        switch (sym->flags & (3 << 14)) {
+        case 0 << 14:
+            break;
+        case 1 << 14:
+            fputc(sym->value, ofile);
+            break;
+        case 2 << 14:
+            fwriteint16_t(sym->value, ofile);
+            break;
+        case 3 << 14:
+            fwriteint32_t(sym->value, ofile);
+            break;
+        }
+    }
+
+    /*
+     * Write out the string table.
+     */
+    saa_fpwrite(strs, ofile);
+
+    /*
+     * Write the program text.
+     */
+    as86_reloc_size = -1;
+    as86_write_section(&stext, SECT_TEXT);
+    as86_write_section(&sdata, SECT_DATA);
+    /*
+     * Append the BSS section to the .data section
+     */
+    if (bsslen > 65535L) {
+        fputc(0x13, ofile);
+        fwriteint32_t(bsslen, ofile);
+    } else if (bsslen > 255) {
+        fputc(0x12, ofile);
+        fwriteint16_t(bsslen, ofile);
+    } else if (bsslen) {
+        fputc(0x11, ofile);
+        fputc(bsslen, ofile);
+    }
+
+    fputc(0, ofile);           /* termination */
+}
+
+static void as86_set_rsize(int size)
+{
+    if (as86_reloc_size != size) {
+        switch (as86_reloc_size = size) {
+        case 1:
+            fputc(0x01, ofile);
+            break;
+        case 2:
+            fputc(0x02, ofile);
+            break;
+        case 4:
+            fputc(0x03, ofile);
+            break;
+        default:
+            nasm_panic("bizarre relocation size %d", size);
+	    break;
+        }
+    }
+}
+
+static void as86_write_section(struct Section *sect, int index)
+{
+    struct Piece *p;
+    uint32_t s;
+    int32_t length;
+
+    fputc(0x20 + index, ofile);        /* select the right section */
+
+    saa_rewind(sect->data);
+
+    for (p = sect->head; p; p = p->next)
+        switch (p->type) {
+        case 0:
+            /*
+             * Absolute data. Emit it in chunks of at most 64
+             * bytes.
+             */
+            length = p->bytes;
+            do {
+                char buf64;
+                int32_t tmplen = (length > 64 ? 64 : length);
+                fputc(0x40 | (tmplen & 0x3F), ofile);
+                saa_rnbytes(sect->data, buf, tmplen);
+                nasm_write(buf, tmplen, ofile);
+                length -= tmplen;
+            } while (length > 0);
+            break;
+        case 1:
+            /*
+             * A segment-type relocation. First fix up the BSS.
+             */
+            if (p->number == SECT_BSS)
+                p->number = SECT_DATA, p->offset += sdata.len;
+            as86_set_rsize(p->bytes);
+            fputc(0x80 | (p->relative ? 0x20 : 0) | p->number, ofile);
+            if (as86_reloc_size == 2)
+                fwriteint16_t(p->offset, ofile);
+            else
+                fwriteint32_t(p->offset, ofile);
+            break;
+        case 2:
+            /*
+             * A symbol-type relocation.
+             */
+            as86_set_rsize(p->bytes);
+            s = p->offset;
+            if (s > 65535L)
+                s = 3;
+            else if (s > 255)
+                s = 2;
+            else if (s > 0)
+                s = 1;
+            else
+                s = 0;
+            fputc(0xC0 |
+                  (p->relative ? 0x20 : 0) |
+                  (p->number > 255 ? 0x04 : 0) | s, ofile);
+            if (p->number > 255)
+                fwriteint16_t(p->number, ofile);
+            else
+                fputc(p->number, ofile);
+            switch (s) {
+            case 0:
+                break;
+            case 1:
+                fputc(p->offset, ofile);
+                break;
+            case 2:
+                fwriteint16_t(p->offset, ofile);
+                break;
+            case 3:
+                fwriteint32_t(p->offset, ofile);
+                break;
+            }
+            break;
+        }
+}
+
+static void as86_sect_write(struct Section *sect,
+                            const uint8_t *data, uint32_t len)
+{
+    saa_wbytes(sect->data, data, len);
+    sect->datalen += len;
+}
+
+extern macros_t as86_stdmac;
+
+const struct ofmt of_as86 = {
+    "as86 (bin86/dev86 toolchain)",
+    "as86",
+    ".o",
+    0,
+    32,
+    null_debug_arr,
+    &null_debug_form,
+    as86_stdmac,
+    as86_init,
+    null_reset,
+    nasm_do_legacy_output,
+    as86_out,
+    as86_deflabel,
+    as86_section_names,
+    NULL,
+    null_sectalign,
+    null_segbase,
+    null_directive,
+    as86_cleanup,
+    NULL                        /* pragma list */
+};
+
+#endif                          /* OF_AS86 */

_service:tar_scm:nasm-2.16.03.tar.xz/output/outas86.mac Added

@@ -0,0 +1,37 @@
+;; --------------------------------------------------------------------------
+;;   
+;;   Copyright 1996-2009 The NASM Authors - All Rights Reserved
+;;   See the file AUTHORS included with the NASM distribution for
+;;   the specific copyright holders.
+;;
+;;   Redistribution and use in source and binary forms, with or without
+;;   modification, are permitted provided that the following
+;;   conditions are met:
+;;
+;;   * Redistributions of source code must retain the above copyright
+;;     notice, this list of conditions and the following disclaimer.
+;;   * Redistributions in binary form must reproduce the above
+;;     copyright notice, this list of conditions and the following
+;;     disclaimer in the documentation and/or other materials provided
+;;     with the distribution.
+;;     
+;;     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+;;     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+;;     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+;;     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;;     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+;;     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;;     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+;;     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+;;     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+;;     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+;;     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+;;     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;;     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+;; --------------------------------------------------------------------------
+
+OUT: as86
+%define __?SECT?__ section .text
+%macro __?NASM_CDecl?__ 1
+%endmacro

_service:tar_scm:nasm-2.16.03.tar.xz/output/outbin.c Added

@@ -0,0 +1,1669 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2017 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * outbin.c output routines for the Netwide Assembler to produce
+ *    flat-form binary files
+ */
+
+/* This is the extended version of NASM's original binary output
+ * format.  It is backward compatible with the original BIN format,
+ * and contains support for multiple sections and advanced section
+ * ordering.
+ *
+ * Feature summary:
+ *
+ * - Users can create an arbitrary number of sections; they are not
+ *   limited to just ".text", ".data", and ".bss".
+ *
+ * - Sections can be either progbits or nobits type.
+ *
+ * - You can specify that they be aligned at a certain boundary
+ *   following the previous section ("align="), or positioned at an
+ *   arbitrary byte-granular location ("start=").
+ *
+ * - You can specify a "virtual" start address for a section, which
+ *   will be used for the calculation for all address references
+ *   with respect to that section ("vstart=").
+ *
+ * - The ORG directive, as well as the section/segment directive
+ *   arguments ("align=", "start=", "vstart="), can take a critical
+ *   expression as their value.  For example: "align=(1 << 12)".
+ *
+ * - You can generate map files using the 'map' directive.
+ *
+ */
+
+/* Uncomment the following define if you want sections to adapt
+ * their progbits/nobits state depending on what type of
+ * instructions are issued, rather than defaulting to progbits.
+ * Note that this behavior violates the specification.
+
+#define ABIN_SMART_ADAPT
+
+*/
+
+#include "compiler.h"
+
+#include "nctype.h"
+
+#include "nasm.h"
+#include "nasmlib.h"
+#include "error.h"
+#include "saa.h"
+#include "stdscan.h"
+#include "labels.h"
+#include "eval.h"
+#include "outform.h"
+#include "outlib.h"
+
+#ifdef OF_BIN
+
+static FILE *rf = NULL;
+static void (*do_output)(void);
+
+/* Section flags keep track of which attributes the user has defined. */
+#define START_DEFINED       0x001
+#define ALIGN_DEFINED       0x002
+#define FOLLOWS_DEFINED     0x004
+#define VSTART_DEFINED      0x008
+#define VALIGN_DEFINED      0x010
+#define VFOLLOWS_DEFINED    0x020
+#define TYPE_DEFINED        0x040
+#define TYPE_PROGBITS       0x080
+#define TYPE_NOBITS         0x100
+
+/* This struct is used to keep track of symbols for map-file generation. */
+static struct bin_label {
+    char *name;
+    struct bin_label *next;
+} *no_seg_labels, **nsl_tail;
+
+static struct Section {
+    char *name;
+    struct SAA *contents;
+    int64_t length;                /* section length in bytes */
+
+/* Section attributes */
+    int flags;                  /* see flag definitions above */
+    uint64_t align;        /* section alignment */
+    uint64_t valign;       /* notional section alignment */
+    uint64_t start;        /* section start address */
+    uint64_t vstart;       /* section virtual start address */
+    char *follows;              /* the section that this one will follow */
+    char *vfollows;             /* the section that this one will notionally follow */
+    int32_t start_index;           /* NASM section id for non-relocated version */
+    int32_t vstart_index;          /* the NASM section id */
+
+    struct bin_label *labels;   /* linked-list of label handles for map output. */
+    struct bin_label **labels_end;      /* Holds address of end of labels list. */
+    struct Section *prev;       /* Points to previous section (implicit follows). */
+    struct Section *next;       /* This links sections with a defined start address. */
+
+/* The extended bin format allows for sections to have a "virtual"
+ * start address.  This is accomplished by creating two sections:
+ * one beginning at the Load Memory Address and the other beginning
+ * at the Virtual Memory Address.  The LMA section is only used to
+ * define the section.<section_name>.start label, but there isn't
+ * any other good way for us to handle that label.
+ */
+
+} *sections, *last_section;
+
+static struct Reloc {
+    struct Reloc *next;
+    int32_t posn;
+    int32_t bytes;
+    int32_t secref;
+    int32_t secrel;
+    struct Section *target;
+} *relocs, **reloctail;
+
+static uint64_t origin;
+static int origin_defined;
+
+/* Stuff we need for map-file generation. */
+#define MAP_ORIGIN       1
+#define MAP_SUMMARY      2
+#define MAP_SECTIONS     4
+#define MAP_SYMBOLS      8
+static int map_control = 0;
+
+extern macros_t bin_stdmac;
+
+static void add_reloc(struct Section *s, int32_t bytes, int32_t secref,
+                      int32_t secrel)
+{
+    struct Reloc *r;
+
+    r = *reloctail = nasm_malloc(sizeof(struct Reloc));
+    reloctail = &r->next;
+    r->next = NULL;
+    r->posn = s->length;
+    r->bytes = bytes;
+    r->secref = secref;
+    r->secrel = secrel;
+    r->target = s;
+}
+
+static struct Section *find_section_by_name(const char *name)
+{
+    struct Section *s;
+
+    list_for_each(s, sections)
+        if (!strcmp(s->name, name))
+            break;
+    return s;
+}
+
+static struct Section *find_section_by_index(int32_t index)
+{
+    struct Section *s;
+
+    list_for_each(s, sections)
+        if ((index == s->vstart_index) || (index == s->start_index))
+            break;
+    return s;
+}
+
+static struct Section *create_section(char *name)
+{
+    struct Section *s = nasm_zalloc(sizeof(*s));
+
+    s->prev         = last_section;
+    s->name         = nasm_strdup(name);
+    s->labels_end   = &(s->labels);
+    s->contents     = saa_init(1L);
+
+    /* Register our sections with NASM. */
+    s->vstart_index = seg_alloc();
+    s->start_index  = seg_alloc();
+
+    /* FIXME: Append to a tail, we need some helper */
+    last_section->next = s;
+    last_section = s;
+
+    return last_section;
+}
+
+static void bin_cleanup(void)
+{
+    struct Section *g, **gp;
+    struct Section *gs = NULL, **gsp;
+    struct Section *s, **sp;
+    struct Section *nobits = NULL, **nt;
+    struct Section *last_progbits;
+    struct bin_label *l;
+    struct Reloc *r;
+    uint64_t pend;
+    int h;
+
+    if (debug_level(1)) {
+        nasm_debug("bin_cleanup: Sections were initially referenced in this order:\n");
+        for (h = 0, s = sections; s; h++, s = s->next)
+            nasm_debug("%i. %s\n", h, s->name);
+    }
+
+    /* Assembly has completed, so now we need to generate the output file.
+     * Step 1: Separate progbits and nobits sections into separate lists.
+     * Step 2: Sort the progbits sections into their output order.
+     * Step 3: Compute start addresses for all progbits sections.
+     * Step 4: Compute vstart addresses for all sections.
+     * Step 5: Apply relocations.
+     * Step 6: Write the sections' data to the output file.
+     * Step 7: Generate the map file.
+     * Step 8: Release all allocated memory.
+     */
+
+    /* To do: Smart section-type adaptation could leave some empty sections
+     * without a defined type (progbits/nobits).  Won't fix now since this
+     * feature will be disabled.  */
+
+    /* Step 1: Split progbits and nobits sections into separate lists. */
+
+    nt = &nobits;
+    /* Move nobits sections into a separate list.  Also pre-process nobits
+     * sections' attributes. */
+    for (sp = &sections->next, s = sections->next; s; s = *sp) {        /* Skip progbits sections. */
+        if (s->flags & TYPE_PROGBITS) {
+            sp = &s->next;
+            continue;
+        }
+        /* Do some special pre-processing on nobits sections' attributes. */
+        if (s->flags & (START_DEFINED | ALIGN_DEFINED | FOLLOWS_DEFINED)) {     /* Check for a mixture of real and virtual section attributes. */
+            if (s->flags & (VSTART_DEFINED | VALIGN_DEFINED |
+			    VFOLLOWS_DEFINED))
+                nasm_fatal("cannot mix real and virtual attributes"
+                           " in nobits section (%s)", s->name);
+            /* Real and virtual attributes mean the same thing for nobits sections. */
+            if (s->flags & START_DEFINED) {
+                s->vstart = s->start;
+                s->flags |= VSTART_DEFINED;
+            }
+            if (s->flags & ALIGN_DEFINED) {
+                s->valign = s->align;
+                s->flags |= VALIGN_DEFINED;
+            }
+            if (s->flags & FOLLOWS_DEFINED) {
+                s->vfollows = s->follows;
+                s->flags |= VFOLLOWS_DEFINED;
+                s->flags &= ~FOLLOWS_DEFINED;
+            }
+        }
+        /* Every section must have a start address. */
+        if (s->flags & VSTART_DEFINED) {
+            s->start = s->vstart;
+            s->flags |= START_DEFINED;
+        }
+        /* Move the section into the nobits list. */
+        *sp = s->next;
+        s->next = NULL;
+        *nt = s;
+        nt = &s->next;
+    }
+
+    /* Step 2: Sort the progbits sections into their output order. */
+
+    /* In Step 2 we move around sections in groups.  A group
+     * begins with a section (group leader) that has a user-
+     * defined start address or follows section.  The remainder
+     * of the group is made up of the sections that implicitly
+     * follow the group leader (i.e., they were defined after
+     * the group leader and were not given an explicit start
+     * address or follows section by the user). */
+
+    /* For anyone attempting to read this code:
+     * g (group) points to a group of sections, the first one of which has
+     *   a user-defined start address or follows section.
+     * gp (g previous) holds the location of the pointer to g.
+     * gs (g scan) is a temp variable that we use to scan to the end of the group.
+     * gsp (gs previous) holds the location of the pointer to gs.
+     * nt (nobits tail) points to the nobits section-list tail.
+     */
+
+    /* Link all 'follows' groups to their proper position.  To do
+     * this we need to know three things: the start of the group
+     * to relocate (g), the section it is following (s), and the
+     * end of the group we're relocating (gs). */
+    for (gp = &sections, g = sections; g; g = gs) {     /* Find the next follows group that is out of place (g). */
+        if (!(g->flags & FOLLOWS_DEFINED)) {
+            while (g->next) {
+                if ((g->next->flags & FOLLOWS_DEFINED) &&
+                    strcmp(g->name, g->next->follows))
+                    break;
+                g = g->next;
+            }
+            if (!g->next)
+                break;
+            gp = &g->next;
+            g = g->next;
+        }
+        /* Find the section that this group follows (s). */
+        for (sp = &sections, s = sections;
+             s && strcmp(s->name, g->follows);
+             sp = &s->next, s = s->next) ;
+        if (!s)
+            nasm_fatal("section %s follows an invalid or"
+                  " unknown section (%s)", g->name, g->follows);
+        if (s == g)
+            nasm_fatal("section %s is self following", s->name);
+        if (s->next && (s->next->flags & FOLLOWS_DEFINED) &&
+            !strcmp(s->name, s->next->follows))
+            nasm_fatal("sections %s and %s can't both follow"
+                  " section %s", g->name, s->next->name, s->name);
+        /* Find the end of the current follows group (gs). */
+        for (gsp = &g->next, gs = g->next;
+             gs && (gs != s) && !(gs->flags & START_DEFINED);
+             gsp = &gs->next, gs = gs->next) {
+            if (gs->next && (gs->next->flags & FOLLOWS_DEFINED) &&
+                strcmp(gs->name, gs->next->follows)) {
+                gsp = &gs->next;
+                gs = gs->next;
+                break;
+            }
+        }
+        /* Re-link the group after its follows section. */
+        *gsp = s->next;
+        s->next = g;
+        *gp = gs;
+    }
+
+    /* Link all 'start' groups to their proper position.  Once
+     * again we need to know g, s, and gs (see above).  The main
+     * difference is we already know g since we sort by moving
+     * groups from the 'unsorted' list into a 'sorted' list (g
+     * will always be the first section in the unsorted list). */
+    for (g = sections, sections = NULL; g; g = gs) {    /* Find the section that we will insert this group before (s). */
+        for (sp = &sections, s = sections; s; sp = &s->next, s = s->next)
+            if ((s->flags & START_DEFINED) && (g->start < s->start))
+                break;
+        /* Find the end of the group (gs). */
+        for (gs = g->next, gsp = &g->next;
+             gs && !(gs->flags & START_DEFINED);
+             gsp = &gs->next, gs = gs->next) ;
+        /* Re-link the group before the target section. */
+        *sp = g;
+        *gsp = s;
+    }
+
+    /* Step 3: Compute start addresses for all progbits sections. */
+
+    /* Make sure we have an origin and a start address for the first section. */
+    if (origin_defined) {
+	if (sections->flags & START_DEFINED) {
+            /* Make sure this section doesn't begin before the origin. */
+            if (sections->start < origin)
+                nasm_fatal("section %s begins"
+                      " before program origin", sections->name);
+	} else if (sections->flags & ALIGN_DEFINED) {
+            sections->start = ALIGN(origin, sections->align);
+	} else {
+            sections->start = origin;
+	}
+    } else {
+        if (!(sections->flags & START_DEFINED))
+            sections->start = 0;
+        origin = sections->start;
+    }
+    sections->flags |= START_DEFINED;
+
+    /* Make sure each section has an explicit start address.  If it
+     * doesn't, then compute one based its alignment and the end of
+     * the previous section. */
+    for (pend = sections->start, g = s = sections; g; g = g->next) {    /* Find the next section that could cause an overlap situation
+                                                                         * (has a defined start address, and is not zero length). */
+        if (g == s)
+            for (s = g->next;
+                 s && ((s->length == 0) || !(s->flags & START_DEFINED));
+                 s = s->next) ;
+        /* Compute the start address of this section, if necessary. */
+        if (!(g->flags & START_DEFINED)) {      /* Default to an alignment of 4 if unspecified. */
+            if (!(g->flags & ALIGN_DEFINED)) {
+                g->align = 4;
+                g->flags |= ALIGN_DEFINED;
+            }
+            /* Set the section start address. */
+            g->start = ALIGN(pend, g->align);
+            g->flags |= START_DEFINED;
+        }
+        /* Ugly special case for progbits sections' virtual attributes:
+         *   If there is a defined valign, but no vstart and no vfollows, then
+         *   we valign after the previous progbits section.  This case doesn't
+         *   really make much sense for progbits sections with a defined start
+         *   address, but it is possible and we must do *something*.
+         * Not-so-ugly special case:
+         *   If a progbits section has no virtual attributes, we set the
+         *   vstart equal to the start address.  */
+        if (!(g->flags & (VSTART_DEFINED | VFOLLOWS_DEFINED))) {
+            if (g->flags & VALIGN_DEFINED)
+                g->vstart = ALIGN(pend, g->valign);
+            else
+                g->vstart = g->start;
+            g->flags |= VSTART_DEFINED;
+        }
+        /* Ignore zero-length sections. */
+        if (g->start < pend)
+            continue;
+        /* Compute the span of this section. */
+        pend = g->start + g->length;
+        /* Check for section overlap. */
+        if (s) {
+	    if (s->start < origin)
+		nasm_fatal("section %s beings before program origin",
+		      s->name);
+	    if (g->start > s->start)
+                nasm_fatal("sections %s ~ %s and %s overlap!",
+                      gs->name, g->name, s->name);
+            if (pend > s->start)
+                nasm_fatal("sections %s and %s overlap!",
+                      g->name, s->name);
+        }
+        /* Remember this section as the latest >0 length section. */
+        gs = g;
+    }
+
+    /* Step 4: Compute vstart addresses for all sections. */
+
+    /* Attach the nobits sections to the end of the progbits sections. */
+    for (s = sections; s->next; s = s->next) ;
+    s->next = nobits;
+    last_progbits = s;
+    /*
+     * Scan for sections that don't have a vstart address.  If we find
+     * one we'll attempt to compute its vstart.  If we can't compute
+     * the vstart, we leave it alone and come back to it in a
+     * subsequent scan.  We continue scanning and re-scanning until
+     * we've gone one full cycle without computing any vstarts.
+     */
+    do {                        /* Do one full scan of the sections list. */
+        for (h = 0, g = sections; g; g = g->next) {
+            if (g->flags & VSTART_DEFINED)
+                continue;
+            /* Find the section that this one virtually follows.  */
+            if (g->flags & VFOLLOWS_DEFINED) {
+                for (s = sections; s && strcmp(g->vfollows, s->name);
+                     s = s->next) ;
+                if (!s)
+                    nasm_fatal("section %s vfollows unknown section (%s)",
+                               g->name, g->vfollows);
+            } else if (g->prev != NULL)
+                for (s = sections; s && (s != g->prev); s = s->next) ;
+            /* The .bss section is the only one with prev = NULL.
+	       In this case we implicitly follow the last progbits
+	       section.  */
+            else
+                s = last_progbits;
+
+            /* If the section we're following has a vstart, we can proceed. */
+            if (s->flags & VSTART_DEFINED) {    /* Default to virtual alignment of four. */
+                if (!(g->flags & VALIGN_DEFINED)) {
+                    g->valign = 4;
+                    g->flags |= VALIGN_DEFINED;
+                }
+                /* Compute the vstart address. */
+                g->vstart = ALIGN(s->vstart + s->length, g->valign);
+                g->flags |= VSTART_DEFINED;
+                h++;
+                /* Start and vstart mean the same thing for nobits sections. */
+                if (g->flags & TYPE_NOBITS)
+                    g->start = g->vstart;
+            }
+        }
+    } while (h);
+
+    /* Now check for any circular vfollows references, which will manifest
+     * themselves as sections without a defined vstart. */
+    for (h = 0, s = sections; s; s = s->next) {
+        if (!(s->flags & VSTART_DEFINED)) {     /* Non-fatal errors after assembly has completed are generally a
+                                                 * no-no, but we'll throw a fatal one eventually so it's ok.  */
+            nasm_nonfatal("cannot compute vstart for section %s", s->name);
+            h++;
+        }
+    }
+    if (h)
+        nasm_fatal("circular vfollows path detected");
+
+    if (debug_level(1)) {
+        nasm_debug("bin_cleanup: Confirm final section order for output file:\n");
+        for (h = 0, s = sections; s && (s->flags & TYPE_PROGBITS);
+             h++, s = s->next)
+            nasm_debug("%i. %s\n", h, s->name);
+    }
+
+    /* Step 5: Apply relocations. */
+
+    /* Prepare the sections for relocating. */
+    list_for_each(s, sections)
+        saa_rewind(s->contents);
+    /* Apply relocations. */
+    list_for_each(r, relocs) {
+        uint8_t *p, mydata8;
+        int64_t l;
+        int b;
+
+        nasm_assert(r->bytes <= 8);
+
+        memset(mydata, 0, sizeof(mydata));
+
+        saa_fread(r->target->contents, r->posn, mydata, r->bytes);
+        p = mydata;
+        l = 0;
+        for (b = r->bytes - 1; b >= 0; b--)
+            l = (l << 8) + mydatab;
+
+        s = find_section_by_index(r->secref);
+        if (s) {
+            if (r->secref == s->start_index)
+                l += s->start;
+            else
+                l += s->vstart;
+        }
+        s = find_section_by_index(r->secrel);
+        if (s) {
+            if (r->secrel == s->start_index)
+                l -= s->start;
+            else
+                l -= s->vstart;
+        }
+
+        WRITEADDR(p, l, r->bytes);
+        saa_fwrite(r->target->contents, r->posn, mydata, r->bytes);
+    }
+
+    /* Step 6: Write the section data to the output file. */
+    do_output();
+
+    /* Step 7: Generate the map file. */
+
+    if (map_control) {
+        static const char not_defined = "not defined";
+
+        /* Display input and output file names. */
+        fprintf(rf, "\n- NASM Map file ");
+        for (h = 63; h; h--)
+            fputc('-', rf);
+        fprintf(rf, "\n\nSource file:  %s\nOutput file:  %s\n\n",
+                inname, outname);
+
+        if (map_control & MAP_ORIGIN) { /* Display program origin. */
+            fprintf(rf, "-- Program origin ");
+            for (h = 61; h; h--)
+                fputc('-', rf);
+            fprintf(rf, "\n\n%08"PRIX64"\n\n", origin);
+        }
+        /* Display sections summary. */
+        if (map_control & MAP_SUMMARY) {
+            fprintf(rf, "-- Sections (summary) ");
+            for (h = 57; h; h--)
+                fputc('-', rf);
+            fprintf(rf, "\n\nVstart            Start             Stop              "
+                    "Length    Class     Name\n");
+            list_for_each(s, sections) {
+                fprintf(rf, "%16"PRIX64"  %16"PRIX64"  %16"PRIX64"  %08"PRIX64"  ",
+                        s->vstart, s->start, s->start + s->length,
+                        s->length);
+                if (s->flags & TYPE_PROGBITS)
+                    fprintf(rf, "progbits  ");
+                else
+                    fprintf(rf, "nobits    ");
+                fprintf(rf, "%s\n", s->name);
+            }
+            fprintf(rf, "\n");
+        }
+        /* Display detailed section information. */
+        if (map_control & MAP_SECTIONS) {
+            fprintf(rf, "-- Sections (detailed) ");
+            for (h = 56; h; h--)
+                fputc('-', rf);
+            fprintf(rf, "\n\n");
+            list_for_each(s, sections) {
+                fprintf(rf, "---- Section %s ", s->name);
+                if (strlen(s->name) < 65)
+                for (h = 65 - strlen(s->name); h; h--)
+                    fputc('-', rf);
+                fprintf(rf, "\n\nclass:     ");
+                if (s->flags & TYPE_PROGBITS)
+                    fprintf(rf, "progbits");
+                else
+                    fprintf(rf, "nobits");
+                fprintf(rf, "\nlength:    %16"PRIX64"\nstart:     %16"PRIX64""
+                        "\nalign:     ", s->length, s->start);
+                if (s->flags & ALIGN_DEFINED)
+                    fprintf(rf, "%16"PRIX64"", s->align);
+                else
+                    fputs(not_defined, rf);
+                fprintf(rf, "\nfollows:   ");
+                if (s->flags & FOLLOWS_DEFINED)
+                    fprintf(rf, "%s", s->follows);
+                else
+                    fputs(not_defined, rf);
+                fprintf(rf, "\nvstart:    %16"PRIX64"\nvalign:    ", s->vstart);
+                if (s->flags & VALIGN_DEFINED)
+                    fprintf(rf, "%16"PRIX64"", s->valign);
+                else
+                    fputs(not_defined, rf);
+                fprintf(rf, "\nvfollows:  ");
+                if (s->flags & VFOLLOWS_DEFINED)
+                    fprintf(rf, "%s", s->vfollows);
+                else
+                    fputs(not_defined, rf);
+                fprintf(rf, "\n\n");
+            }
+        }
+        /* Display symbols information. */
+        if (map_control & MAP_SYMBOLS) {
+            int32_t segment;
+            int64_t offset;
+            enum label_type found_label;
+
+            fprintf(rf, "-- Symbols ");
+            for (h = 68; h; h--)
+                fputc('-', rf);
+            fprintf(rf, "\n\n");
+            if (no_seg_labels) {
+                fprintf(rf, "---- No Section ");
+                for (h = 63; h; h--)
+                    fputc('-', rf);
+                fprintf(rf, "\n\nValue     Name\n");
+                list_for_each(l, no_seg_labels) {
+                    found_label = lookup_label(l->name, &segment, &offset);
+                    nasm_assert(found_label != LBL_none);
+                    fprintf(rf, "%08"PRIX64"  %s\n", offset, l->name);
+                }
+                fprintf(rf, "\n\n");
+            }
+            list_for_each(s, sections) {
+                if (s->labels) {
+                    fprintf(rf, "---- Section %s ", s->name);
+                    for (h = 65 - strlen(s->name); h; h--)
+                        fputc('-', rf);
+                    fprintf(rf, "\n\nReal              Virtual           Name\n");
+                    list_for_each(l, s->labels) {
+                        found_label = lookup_label(l->name, &segment, &offset);
+                        nasm_assert(found_label != LBL_none);
+                        fprintf(rf, "%16"PRIX64"  %16"PRIX64"  %s\n",
+                                s->start + offset, s->vstart + offset,
+                                l->name);
+                    }
+                    fprintf(rf, "\n");
+                }
+            }
+        }
+    }
+
+    /* Close the report file. */
+    if (map_control && (rf != stdout) && (rf != stderr))
+        fclose(rf);
+
+    /* Step 8: Release all allocated memory. */
+
+    /* Free sections, label pointer structs, etc.. */
+    while (sections) {
+        s = sections;
+        sections = s->next;
+        saa_free(s->contents);
+        nasm_free(s->name);
+        if (s->flags & FOLLOWS_DEFINED)
+            nasm_free(s->follows);
+        if (s->flags & VFOLLOWS_DEFINED)
+            nasm_free(s->vfollows);
+        while (s->labels) {
+            l = s->labels;
+            s->labels = l->next;
+            nasm_free(l);
+        }
+        nasm_free(s);
+    }
+
+    /* Free no-section labels. */
+    while (no_seg_labels) {
+        l = no_seg_labels;
+        no_seg_labels = l->next;
+        nasm_free(l);
+    }
+
+    /* Free relocation structures. */
+    while (relocs) {
+        r = relocs->next;
+        nasm_free(relocs);
+        relocs = r;
+    }
+}
+
+static void bin_out(int32_t segto, const void *data,
+		    enum out_type type, uint64_t size,
+                    int32_t segment, int32_t wrt)
+{
+    uint8_t *p, mydata8;
+    struct Section *s;
+
+    if (wrt != NO_SEG) {
+        wrt = NO_SEG;           /* continue to do _something_ */
+        nasm_nonfatal("WRT not supported by binary output format");
+    }
+
+    /* Find the segment we are targeting. */
+    s = find_section_by_index(segto);
+    if (!s)
+        nasm_panic("code directed to nonexistent segment?");
+
+    /* "Smart" section-type adaptation code. */
+    if (!(s->flags & TYPE_DEFINED)) {
+        if (type == OUT_RESERVE)
+            s->flags |= TYPE_DEFINED | TYPE_NOBITS;
+        else
+            s->flags |= TYPE_DEFINED | TYPE_PROGBITS;
+    }
+
+    if ((s->flags & TYPE_NOBITS) && (type != OUT_RESERVE))
+        nasm_warn(WARN_OTHER, "attempt to initialize memory in a"
+                  " nobits section: ignored");
+
+    switch (type) {
+    case OUT_ADDRESS:
+    {
+        int asize = abs((int)size);
+
+        if (segment != NO_SEG && !find_section_by_index(segment)) {
+            if (segment % 2)
+                nasm_nonfatal("binary output format does not support"
+                              " segment base references");
+            else
+                nasm_nonfatal("binary output format does not support"
+                              " external references");
+            segment = NO_SEG;
+        }
+        if (s->flags & TYPE_PROGBITS) {
+            if (segment != NO_SEG)
+                add_reloc(s, asize, segment, -1L);
+            p = mydata;
+	    WRITEADDR(p, *(int64_t *)data, asize);
+            saa_wbytes(s->contents, mydata, asize);
+        }
+
+        /*
+         * Reassign size with sign dropped, we will need it
+         * for section length calculation.
+         */
+        size = asize;
+	break;
+    }
+
+    case OUT_RAWDATA:
+        if (s->flags & TYPE_PROGBITS)
+            saa_wbytes(s->contents, data, size);
+	break;
+
+    case OUT_RESERVE:
+        if (s->flags & TYPE_PROGBITS) {
+            nasm_warn(WARN_ZEROING, "uninitialized space declared in"
+                      " %s section: zeroing", s->name);
+            saa_wbytes(s->contents, NULL, size);
+        }
+	break;
+
+    case OUT_REL1ADR:
+    case OUT_REL2ADR:
+    case OUT_REL4ADR:
+    case OUT_REL8ADR:
+    {
+	int64_t addr = *(int64_t *)data - size;
+	size = realsize(type, size);
+        if (segment != NO_SEG && !find_section_by_index(segment)) {
+            if (segment % 2)
+                nasm_nonfatal("binary output format does not support"
+                              " segment base references");
+            else
+                nasm_nonfatal("binary output format does not support"
+                              " external references");
+            segment = NO_SEG;
+        }
+        if (s->flags & TYPE_PROGBITS) {
+            add_reloc(s, size, segment, segto);
+            p = mydata;
+	    WRITEADDR(p, addr - s->length, size);
+            saa_wbytes(s->contents, mydata, size);
+        }
+	break;
+    }
+
+    default:
+	nasm_nonfatal("unsupported relocation type %d\n", type);
+	break;
+    }
+
+    s->length += size;
+}
+
+static void bin_deflabel(char *name, int32_t segment, int64_t offset,
+                         int is_global, char *special)
+{
+    (void)segment;              /* Don't warn that this parameter is unused */
+    (void)offset;               /* Don't warn that this parameter is unused */
+
+    if (special)
+        nasm_nonfatal("binary format does not support any"
+                      " special symbol types");
+    else if (name0 == '.' && name1 == '.' && name2 != '@')
+        nasm_nonfatal("unrecognised special symbol `%s'", name);
+    else if (is_global == 2)
+        nasm_nonfatal("binary output format does not support common"
+                      " variables");
+    else {
+        struct Section *s;
+        struct bin_label ***ltp;
+
+        /* Remember label definition so we can look it up later when
+         * creating the map file. */
+        s = find_section_by_index(segment);
+        if (s)
+            ltp = &(s->labels_end);
+        else
+            ltp = &nsl_tail;
+        (**ltp) = nasm_malloc(sizeof(struct bin_label));
+        (**ltp)->name = name;
+        (**ltp)->next = NULL;
+        *ltp = &((**ltp)->next);
+    }
+
+}
+
+/* These constants and the following function are used
+ * by bin_secname() to parse attribute assignments. */
+
+enum { ATTRIB_START, ATTRIB_ALIGN, ATTRIB_FOLLOWS,
+    ATTRIB_VSTART, ATTRIB_VALIGN, ATTRIB_VFOLLOWS,
+    ATTRIB_NOBITS, ATTRIB_PROGBITS
+};
+
+static int bin_read_attribute(char **line, int *attribute,
+                              uint64_t *value)
+{
+    expr *e;
+    int attrib_name_size;
+    struct tokenval tokval;
+    char *exp;
+
+    /* Skip whitespace. */
+    while (**line && nasm_isspace(**line))
+        (*line)++;
+    if (!**line)
+        return 0;
+
+    /* Figure out what attribute we're reading. */
+    if (!nasm_strnicmp(*line, "align=", 6)) {
+        *attribute = ATTRIB_ALIGN;
+        attrib_name_size = 6;
+    } else {
+        if (!nasm_strnicmp(*line, "start=", 6)) {
+            *attribute = ATTRIB_START;
+            attrib_name_size = 6;
+        } else if (!nasm_strnicmp(*line, "follows=", 8)) {
+            *attribute = ATTRIB_FOLLOWS;
+            *line += 8;
+            return 1;
+        } else if (!nasm_strnicmp(*line, "vstart=", 7)) {
+            *attribute = ATTRIB_VSTART;
+            attrib_name_size = 7;
+        } else if (!nasm_strnicmp(*line, "valign=", 7)) {
+            *attribute = ATTRIB_VALIGN;
+            attrib_name_size = 7;
+        } else if (!nasm_strnicmp(*line, "vfollows=", 9)) {
+            *attribute = ATTRIB_VFOLLOWS;
+            *line += 9;
+            return 1;
+        } else if (!nasm_strnicmp(*line, "nobits", 6) &&
+                   (nasm_isspace((*line)6) || ((*line)6 == '\0'))) {
+            *attribute = ATTRIB_NOBITS;
+            *line += 6;
+            return 1;
+        } else if (!nasm_strnicmp(*line, "progbits", 8) &&
+                   (nasm_isspace((*line)8) || ((*line)8 == '\0'))) {
+            *attribute = ATTRIB_PROGBITS;
+            *line += 8;
+            return 1;
+        } else
+            return 0;
+    }
+
+    /* Find the end of the expression. */
+    if ((*line)attrib_name_size != '(') {
+        /* Single term (no parenthesis). */
+        exp = *line += attrib_name_size;
+        while (**line && !nasm_isspace(**line))
+            (*line)++;
+        if (**line) {
+            **line = '\0';
+            (*line)++;
+        }
+    } else {
+        char c;
+        int pcount = 1;
+
+        /* Full expression (delimited by parenthesis) */
+        exp = *line += attrib_name_size + 1;
+        while (1) {
+            (*line) += strcspn(*line, "()'\"");
+            if (**line == '(') {
+                ++(*line);
+                ++pcount;
+            }
+            if (**line == ')') {
+                ++(*line);
+                --pcount;
+                if (!pcount)
+                    break;
+            }
+            if ((**line == '"') || (**line == '\'')) {
+                c = **line;
+                while (**line) {
+                    ++(*line);
+                    if (**line == c)
+                        break;
+                }
+                if (!**line) {
+                    nasm_nonfatal("invalid syntax in `section' directive");
+                    return -1;
+                }
+                ++(*line);
+            }
+            if (!**line) {
+                nasm_nonfatal("expecting `)'");
+                return -1;
+            }
+        }
+        *(*line - 1) = '\0';    /* Terminate the expression. */
+    }
+
+    /* Check for no value given. */
+    if (!*exp) {
+        nasm_warn(WARN_OTHER, "No value given to attribute in"
+                  " `section' directive");
+        return -1;
+    }
+
+    /* Read and evaluate the expression. */
+    stdscan_reset();
+    stdscan_set(exp);
+    tokval.t_type = TOKEN_INVALID;
+    e = evaluate(stdscan, NULL, &tokval, NULL, 1, NULL);
+    if (e) {
+        if (!is_really_simple(e)) {
+            nasm_nonfatal("section attribute value must be"
+                          " a critical expression");
+            return -1;
+        }
+    } else {
+        nasm_nonfatal("Invalid attribute value"
+                      " specified in `section' directive.");
+        return -1;
+    }
+    *value = (uint64_t)reloc_value(e);
+    return 1;
+}
+
+static void bin_sectalign(int32_t seg, unsigned int value)
+{
+    struct Section *s = find_section_by_index(seg);
+
+    if (!s || !is_power2(value))
+        return;
+
+    if (value > s->align)
+        s->align = value;
+
+    if (!(s->flags & ALIGN_DEFINED))
+        s->flags |= ALIGN_DEFINED;
+}
+
+static void bin_assign_attributes(struct Section *sec, char *astring)
+{
+    int attribute, check;
+    uint64_t value;
+    char *p;
+
+    while (1) {                 /* Get the next attribute. */
+        check = bin_read_attribute(&astring, &attribute, &value);
+        /* Skip bad attribute. */
+        if (check == -1)
+            continue;
+        /* Unknown section attribute, so skip it and warn the user. */
+        if (!check) {
+            if (!*astring)
+                break;          /* End of line. */
+            else {
+                p = astring;
+                while (*astring && !nasm_isspace(*astring))
+                    astring++;
+                if (*astring) {
+                    *astring = '\0';
+                    astring++;
+                }
+                nasm_warn(WARN_OTHER, "ignoring unknown section attribute: \"%s\"", p);
+            }
+            continue;
+        }
+
+        switch (attribute) {    /* Handle nobits attribute. */
+        case ATTRIB_NOBITS:
+            if ((sec->flags & TYPE_DEFINED)
+                && (sec->flags & TYPE_PROGBITS))
+                nasm_nonfatal("attempt to change section type"
+                              " from progbits to nobits");
+            else
+                sec->flags |= TYPE_DEFINED | TYPE_NOBITS;
+            continue;
+
+            /* Handle progbits attribute. */
+        case ATTRIB_PROGBITS:
+            if ((sec->flags & TYPE_DEFINED) && (sec->flags & TYPE_NOBITS))
+                nasm_nonfatal("attempt to change section type"
+                              " from nobits to progbits");
+            else
+                sec->flags |= TYPE_DEFINED | TYPE_PROGBITS;
+            continue;
+
+            /* Handle align attribute. */
+        case ATTRIB_ALIGN:
+            if (!value || ((value - 1) & value)) {
+                nasm_nonfatal("argument to `align' is not a power of two");
+            } else {
+                /*
+                 * Alignment is already satisfied if
+                 * the previous align value is greater
+                 */
+                if ((sec->flags & ALIGN_DEFINED) && (value < sec->align))
+                    value = sec->align;
+
+                /* Don't allow a conflicting align value. */
+                if ((sec->flags & START_DEFINED) && (sec->start & (value - 1))) {
+                    nasm_nonfatal("`align' value conflicts with section start address");
+                } else {
+                    sec->align  = value;
+                    sec->flags |= ALIGN_DEFINED;
+                }
+            }
+            continue;
+
+            /* Handle valign attribute. */
+        case ATTRIB_VALIGN:
+            if (!value || ((value - 1) & value))
+                nasm_nonfatal("argument to `valign' is not a power of two");
+            else {              /* Alignment is already satisfied if the previous
+                                 * align value is greater. */
+                if ((sec->flags & VALIGN_DEFINED) && (value < sec->valign))
+                    value = sec->valign;
+
+                /* Don't allow a conflicting valign value. */
+                if ((sec->flags & VSTART_DEFINED)
+                    && (sec->vstart & (value - 1)))
+                    nasm_nonfatal("`valign' value conflicts with `vstart' address");
+                else {
+                    sec->valign = value;
+                    sec->flags |= VALIGN_DEFINED;
+                }
+            }
+            continue;
+
+            /* Handle start attribute. */
+        case ATTRIB_START:
+            if (sec->flags & FOLLOWS_DEFINED)
+                nasm_nonfatal("cannot combine `start' and `follows'"
+                              " section attributes");
+            else if ((sec->flags & START_DEFINED) && (value != sec->start))
+                nasm_nonfatal("section start address redefined");
+            else {
+                sec->start = value;
+                sec->flags |= START_DEFINED;
+                if (sec->flags & ALIGN_DEFINED) {
+                    if (sec->start & (sec->align - 1))
+                        nasm_nonfatal("`start' address conflicts"
+                                      " with section alignment");
+                    sec->flags ^= ALIGN_DEFINED;
+                }
+            }
+            continue;
+
+            /* Handle vstart attribute. */
+        case ATTRIB_VSTART:
+            if (sec->flags & VFOLLOWS_DEFINED)
+                nasm_nonfatal("cannot combine `vstart' and `vfollows'"
+                              " section attributes");
+            else if ((sec->flags & VSTART_DEFINED)
+                     && (value != sec->vstart))
+                nasm_nonfatal("section virtual start address"
+                              " (vstart) redefined");
+            else {
+                sec->vstart = value;
+                sec->flags |= VSTART_DEFINED;
+                if (sec->flags & VALIGN_DEFINED) {
+                    if (sec->vstart & (sec->valign - 1))
+                        nasm_nonfatal("`vstart' address conflicts"
+                                      " with `valign' value");
+                    sec->flags ^= VALIGN_DEFINED;
+                }
+            }
+            continue;
+
+            /* Handle follows attribute. */
+        case ATTRIB_FOLLOWS:
+            p = astring;
+            astring += strcspn(astring, " \t");
+            if (astring == p)
+                nasm_nonfatal("expecting section name for `follows'"
+                              " attribute");
+            else {
+                *(astring++) = '\0';
+                if (sec->flags & START_DEFINED)
+                    nasm_nonfatal("cannot combine `start' and `follows'"
+                                  " section attributes");
+                sec->follows = nasm_strdup(p);
+                sec->flags |= FOLLOWS_DEFINED;
+            }
+            continue;
+
+            /* Handle vfollows attribute. */
+        case ATTRIB_VFOLLOWS:
+            if (sec->flags & VSTART_DEFINED)
+                nasm_nonfatal("cannot combine `vstart' and `vfollows'"
+                              " section attributes");
+            else {
+                p = astring;
+                astring += strcspn(astring, " \t");
+                if (astring == p)
+                    nasm_nonfatal("expecting section name for `vfollows'"
+                                  " attribute");
+                else {
+                    *(astring++) = '\0';
+                    sec->vfollows = nasm_strdup(p);
+                    sec->flags |= VFOLLOWS_DEFINED;
+                }
+            }
+            continue;
+        }
+    }
+}
+
+static void bin_define_section_labels(void)
+{
+    static int labels_defined = 0;
+    struct Section *sec;
+    char *label_name;
+    size_t base_len;
+
+    if (labels_defined)
+        return;
+    list_for_each(sec, sections) {
+        base_len = strlen(sec->name) + 8;
+        label_name = nasm_malloc(base_len + 8);
+        strcpy(label_name, "section.");
+        strcpy(label_name + 8, sec->name);
+
+        /* section.<name>.start */
+        strcpy(label_name + base_len, ".start");
+        define_label(label_name, sec->start_index, 0L, false);
+
+        /* section.<name>.vstart */
+        strcpy(label_name + base_len, ".vstart");
+        define_label(label_name, sec->vstart_index, 0L, false);
+
+        nasm_free(label_name);
+    }
+    labels_defined = 1;
+}
+
+static int32_t bin_secname(char *name, int *bits)
+{
+    char *p;
+    struct Section *sec;
+
+    /* bin_secname is called with *name = NULL at the start of each
+     * pass.  Use this opportunity to establish the default section
+     * (default is BITS-16 ".text" segment).
+     */
+    if (!name) {
+        /* Reset ORG and section attributes at the start of each pass. */
+        origin_defined = 0;
+        list_for_each(sec, sections)
+            sec->flags &= ~(START_DEFINED | VSTART_DEFINED |
+                            ALIGN_DEFINED | VALIGN_DEFINED);
+
+        /* Define section start and vstart labels. */
+        if (!pass_first())
+            bin_define_section_labels();
+
+        /* Establish the default (.text) section. */
+        *bits = 16;
+        sec = find_section_by_name(".text");
+        sec->flags |= TYPE_DEFINED | TYPE_PROGBITS;
+        return sec->vstart_index;
+    }
+
+    /* Attempt to find the requested section.  If it does not
+     * exist, create it. */
+    p = name;
+    while (*p && !nasm_isspace(*p))
+        p++;
+    if (*p)
+        *p++ = '\0';
+    sec = find_section_by_name(name);
+    if (!sec) {
+        sec = create_section(name);
+        if (!strcmp(name, ".data"))
+            sec->flags |= TYPE_DEFINED | TYPE_PROGBITS;
+        else if (!strcmp(name, ".bss")) {
+            sec->flags |= TYPE_DEFINED | TYPE_NOBITS;
+            sec->prev = NULL;
+        }
+    }
+
+    /* Handle attribute assignments. */
+    if (!pass_first())
+        bin_assign_attributes(sec, p);
+
+#ifndef ABIN_SMART_ADAPT
+    /* The following line disables smart adaptation of
+     * PROGBITS/NOBITS section types (it forces sections to
+     * default to PROGBITS). */
+    if (!pass_first() && !(sec->flags & TYPE_DEFINED))
+        sec->flags |= TYPE_DEFINED | TYPE_PROGBITS;
+#endif
+
+    return sec->vstart_index;
+}
+
+static enum directive_result
+bin_directive(enum directive directive, char *args)
+{
+    switch (directive) {
+    case D_ORG:
+    {
+        struct tokenval tokval;
+        uint64_t value;
+        expr *e;
+
+        stdscan_reset();
+        stdscan_set(args);
+        tokval.t_type = TOKEN_INVALID;
+        e = evaluate(stdscan, NULL, &tokval, NULL, 1, NULL);
+        if (e) {
+            if (!is_really_simple(e))
+                nasm_nonfatal("org value must be a critical"
+                      " expression");
+            else {
+                value = reloc_value(e);
+                /* Check for ORG redefinition. */
+                if (origin_defined && (value != origin))
+                    nasm_nonfatal("program origin redefined");
+                else {
+                    origin = value;
+                    origin_defined = 1;
+                }
+            }
+        } else
+            nasm_nonfatal("No or invalid offset specified"
+                          " in ORG directive.");
+        return DIRR_OK;
+    }
+    case D_MAP:
+    {
+    /* The 'map' directive allows the user to generate section
+     * and symbol information to stdout, stderr, or to a file. */
+	char *p;
+
+        if (!pass_first())
+            return DIRR_OK;
+        args += strspn(args, " \t");
+        while (*args) {
+            p = args;
+            args += strcspn(args, " \t");
+            if (*args != '\0')
+                *(args++) = '\0';
+            if (!nasm_stricmp(p, "all"))
+                map_control |=
+                    MAP_ORIGIN | MAP_SUMMARY | MAP_SECTIONS | MAP_SYMBOLS;
+            else if (!nasm_stricmp(p, "brief"))
+                map_control |= MAP_ORIGIN | MAP_SUMMARY;
+            else if (!nasm_stricmp(p, "sections"))
+                map_control |= MAP_ORIGIN | MAP_SUMMARY | MAP_SECTIONS;
+            else if (!nasm_stricmp(p, "segments"))
+                map_control |= MAP_ORIGIN | MAP_SUMMARY | MAP_SECTIONS;
+            else if (!nasm_stricmp(p, "symbols"))
+                map_control |= MAP_SYMBOLS;
+            else if (!rf) {
+                if (!nasm_stricmp(p, "stdout"))
+                    rf = stdout;
+                else if (!nasm_stricmp(p, "stderr"))
+                    rf = stderr;
+                else {          /* Must be a filename. */
+                    rf = nasm_open_write(p, NF_TEXT);
+                    if (!rf) {
+                        nasm_warn(WARN_OTHER, "unable to open map file `%s'", p);
+                        map_control = 0;
+                        return DIRR_OK;
+                    }
+                }
+            } else
+                nasm_warn(WARN_OTHER, "map file already specified");
+        }
+        if (map_control == 0)
+            map_control |= MAP_ORIGIN | MAP_SUMMARY;
+        if (!rf)
+            rf = stdout;
+        return DIRR_OK;
+    }
+    default:
+	return DIRR_UNKNOWN;
+    }
+}
+
+const struct ofmt of_bin, of_ith, of_srec;
+static void binfmt_init(void);
+static void do_output_bin(void);
+static void do_output_ith(void);
+static void do_output_srec(void);
+
+static void bin_init(void)
+{
+    do_output = do_output_bin;
+    binfmt_init();
+}
+
+static void ith_init(void)
+{
+    do_output = do_output_ith;
+    binfmt_init();
+}
+
+static void srec_init(void)
+{
+    do_output = do_output_srec;
+    binfmt_init();
+}
+
+static void binfmt_init(void)
+{
+    relocs = NULL;
+    reloctail = &relocs;
+    origin_defined = 0;
+    no_seg_labels = NULL;
+    nsl_tail = &no_seg_labels;
+
+    /* Create default section (.text). */
+    sections = last_section = nasm_zalloc(sizeof(struct Section));
+    last_section->name          = nasm_strdup(".text");
+    last_section->contents      = saa_init(1L);
+    last_section->flags         = TYPE_DEFINED | TYPE_PROGBITS;
+    last_section->labels_end    = &(last_section->labels);
+    last_section->start_index   = seg_alloc();
+    last_section->vstart_index  = seg_alloc();
+}
+
+/* Generate binary file output */
+static void do_output_bin(void)
+{
+    struct Section *s;
+    uint64_t addr = origin;
+
+    /* Write the progbits sections to the output file. */
+    list_for_each(s, sections) {
+	/* Skip non-progbits sections */
+	if (!(s->flags & TYPE_PROGBITS))
+	    continue;
+	/* Skip zero-length sections */
+	if (s->length == 0)
+            continue;
+
+        /* Pad the space between sections. */
+	nasm_assert(addr <= s->start);
+	fwritezero(s->start - addr, ofile);
+
+        /* Write the section to the output file. */
+	saa_fpwrite(s->contents, ofile);
+
+	/* Keep track of the current file position */
+	addr = s->start + s->length;
+    }
+}
+
+/* Generate Intel hex file output */
+static void write_ith_record(unsigned int len, uint16_t addr,
+                             uint8_t type, void *data)
+{
+    char buf1+2+4+2+255*2+2+2;
+    char *p = buf;
+    uint8_t csum, *dptr = data;
+    unsigned int i;
+
+    nasm_assert(len <= 255);
+
+    csum = len + addr + (addr >> 8) + type;
+    for (i = 0; i < len; i++)
+	csum += dptri;
+    csum = -csum;
+
+    p += sprintf(p, ":%02X%04X%02X", len, addr, type);
+    for (i = 0; i < len; i++)
+	p += sprintf(p, "%02X", dptri);
+    p += sprintf(p, "%02X\n", csum);
+
+    nasm_write(buf, p-buf, ofile);
+}
+
+static void do_output_ith(void)
+{
+    uint8_t buf32;
+    struct Section *s;
+    uint64_t addr, hiaddr, hilba;
+    uint64_t length;
+    unsigned int chunk;
+
+    /* Write the progbits sections to the output file. */
+    hilba = 0;
+    list_for_each(s, sections) {
+	/* Skip non-progbits sections */
+	if (!(s->flags & TYPE_PROGBITS))
+	    continue;
+	/* Skip zero-length sections */
+	if (s->length == 0)
+            continue;
+
+	addr   = s->start;
+	length = s->length;
+	saa_rewind(s->contents);
+
+	while (length) {
+	    hiaddr = addr >> 16;
+	    if (hiaddr != hilba) {
+		buf0 = hiaddr >> 8;
+		buf1 = hiaddr;
+		write_ith_record(2, 0, 4, buf);
+		hilba = hiaddr;
+	    }
+
+	    chunk = 32 - (addr & 31);
+	    if (length < chunk)
+		chunk = length;
+
+	    saa_rnbytes(s->contents, buf, chunk);
+	    write_ith_record(chunk, (uint16_t)addr, 0, buf);
+
+	    addr += chunk;
+	    length -= chunk;
+	}
+    }
+
+    /* Write closing record */
+    write_ith_record(0, 0, 1, NULL);
+}
+
+/* Generate Motorola S-records */
+static void write_srecord(unsigned int len,  unsigned int alen,
+                          uint32_t addr, uint8_t type, void *data)
+{
+    char buf2+2+8+255*2+2+2;
+    char *p = buf;
+    uint8_t csum, *dptr = data;
+    unsigned int i;
+
+    nasm_assert(len <= 255);
+
+    switch (alen) {
+    case 2:
+	addr &= 0xffff;
+	break;
+    case 3:
+	addr &= 0xffffff;
+	break;
+    case 4:
+	break;
+    default:
+	panic();
+	break;
+    }
+
+    csum = (len+alen+1) + addr + (addr >> 8) + (addr >> 16) + (addr >> 24);
+    for (i = 0; i < len; i++)
+	csum += dptri;
+    csum = 0xff-csum;
+
+    p += sprintf(p, "S%c%02X%0*X", type, len+alen+1, alen*2, addr);
+    for (i = 0; i < len; i++)
+	p += sprintf(p, "%02X", dptri);
+    p += sprintf(p, "%02X\n", csum);
+
+    nasm_write(buf, p-buf, ofile);
+}
+
+static void do_output_srec(void)
+{
+    uint8_t buf32;
+    struct Section *s;
+    uint64_t addr, maxaddr;
+    uint64_t length;
+    int alen;
+    unsigned int chunk;
+    char dtype, etype;
+
+    maxaddr = 0;
+    list_for_each(s, sections) {
+	/* Skip non-progbits sections */
+	if (!(s->flags & TYPE_PROGBITS))
+	    continue;
+	/* Skip zero-length sections */
+	if (s->length == 0)
+            continue;
+
+	addr = s->start + s->length - 1;
+	if (addr > maxaddr)
+	    maxaddr = addr;
+    }
+
+    if (maxaddr <= 0xffff) {
+	alen  = 2;
+	dtype = '1';		/* S1 = 16-bit data */
+	etype = '9';		/* S9 = 16-bit end */
+    } else if (maxaddr <= 0xffffff) {
+	alen = 3;
+	dtype = '2';		/* S2 = 24-bit data */
+	etype = '8';		/* S8 = 24-bit end */
+    } else {
+	alen = 4;
+	dtype = '3';		/* S3 = 32-bit data */
+	etype = '7';		/* S7 = 32-bit end */
+    }
+
+    /* Write head record */
+    write_srecord(0, 2, 0, '0', NULL);
+
+    /* Write the progbits sections to the output file. */
+    list_for_each(s, sections) {
+	/* Skip non-progbits sections */
+	if (!(s->flags & TYPE_PROGBITS))
+	    continue;
+	/* Skip zero-length sections */
+	if (s->length == 0)
+            continue;
+
+	addr   = s->start;
+	length = s->length;
+	saa_rewind(s->contents);
+
+	while (length) {
+	    chunk = 32 - (addr & 31);
+	    if (length < chunk)
+		chunk = length;
+
+	    saa_rnbytes(s->contents, buf, chunk);
+	    write_srecord(chunk, alen, (uint32_t)addr, dtype, buf);
+
+	    addr += chunk;
+	    length -= chunk;
+	}
+    }
+
+    /* Write closing record */
+    write_srecord(0, alen, 0, etype, NULL);
+}
+
+
+const struct ofmt of_bin = {
+    "Flat raw binary (MS-DOS, embedded, ...)",
+    "bin",
+    "",
+    0,
+    64,
+    null_debug_arr,
+    &null_debug_form,
+    bin_stdmac,
+    bin_init,
+    null_reset,
+    nasm_do_legacy_output,
+    bin_out,
+    bin_deflabel,
+    bin_secname,
+    NULL,
+    bin_sectalign,
+    null_segbase,
+    bin_directive,
+    bin_cleanup,
+    NULL                        /* pragma list */
+};
+
+const struct ofmt of_ith = {
+    "Intel Hex encoded flat binary",
+    "ith",
+    ".ith",                     /* really should have been ".hex"... */
+    OFMT_TEXT,
+    64,
+    null_debug_arr,
+    &null_debug_form,
+    bin_stdmac,
+    ith_init,
+    null_reset,
+    nasm_do_legacy_output,
+    bin_out,
+    bin_deflabel,
+    bin_secname,
+    NULL,
+    bin_sectalign,
+    null_segbase,
+    bin_directive,
+    bin_cleanup,
+    NULL                        /* pragma list */
+};
+
+const struct ofmt of_srec = {
+    "Motorola S-records encoded flat binary",
+    "srec",
+    ".srec",
+    OFMT_TEXT,
+    64,
+    null_debug_arr,
+    &null_debug_form,
+    bin_stdmac,
+    srec_init,
+    null_reset,
+    nasm_do_legacy_output,
+    bin_out,
+    bin_deflabel,
+    bin_secname,
+    NULL,
+    bin_sectalign,
+    null_segbase,
+    bin_directive,
+    bin_cleanup,
+    NULL                        /* pragma list */
+};
+
+#endif                          /* #ifdef OF_BIN */

_service:tar_scm:nasm-2.16.03.tar.xz/output/outbin.mac Added

@@ -0,0 +1,40 @@
+;; --------------------------------------------------------------------------
+;;   
+;;   Copyright 1996-2009 The NASM Authors - All Rights Reserved
+;;   See the file AUTHORS included with the NASM distribution for
+;;   the specific copyright holders.
+;;
+;;   Redistribution and use in source and binary forms, with or without
+;;   modification, are permitted provided that the following
+;;   conditions are met:
+;;
+;;   * Redistributions of source code must retain the above copyright
+;;     notice, this list of conditions and the following disclaimer.
+;;   * Redistributions in binary form must reproduce the above
+;;     copyright notice, this list of conditions and the following
+;;     disclaimer in the documentation and/or other materials provided
+;;     with the distribution.
+;;     
+;;     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+;;     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+;;     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+;;     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;;     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+;;     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;;     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+;;     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+;;     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+;;     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+;;     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+;;     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;;     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+;; --------------------------------------------------------------------------
+
+OUT: bin
+%define __?SECT?__ section .text
+%imacro org 1+.nolist
+org %1
+%endmacro
+%macro __?NASM_CDecl?__ 1
+%endmacro

_service:tar_scm:nasm-2.16.03.tar.xz/output/outcoff.c Added

@@ -0,0 +1,1436 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2020 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * outcoff.c    output routines for the Netwide Assembler to produce
+ *              COFF object files (for DJGPP and Win32)
+ */
+
+#include "compiler.h"
+
+#include "nctype.h"
+#include <time.h>
+#include "ver.h"
+
+#include "nasm.h"
+#include "nasmlib.h"
+#include "ilog2.h"
+#include "error.h"
+#include "saa.h"
+#include "raa.h"
+#include "eval.h"
+#include "outform.h"
+#include "outlib.h"
+#include "pecoff.h"
+
+#if defined(OF_COFF) || defined(OF_WIN32) || defined(OF_WIN64)
+
+/*
+ * Notes on COFF:
+ *
+ * (0) When I say `standard COFF' below, I mean `COFF as output and
+ * used by DJGPP'. I assume DJGPP gets it right.
+ *
+ * (1) Win32 appears to interpret the term `relative relocation'
+ * differently from standard COFF. Standard COFF understands a
+ * relative relocation to mean that during relocation you add the
+ * address of the symbol you're referencing, and subtract the base
+ * address of the section you're in. Win32 COFF, by contrast, seems
+ * to add the address of the symbol and then subtract the address
+ * of THE BYTE AFTER THE RELOCATED DWORD. Hence the two formats are
+ * subtly incompatible.
+ *
+ * (2) Win32 doesn't bother putting any flags in the header flags
+ * field (at offset 0x12 into the file).
+ *
+ * (3) Win32/64 uses some extra flags into the section header table:
+ * it defines flags 0x80000000 (writable), 0x40000000 (readable)
+ * and 0x20000000 (executable), and uses them in the expected
+ * combinations. It also defines 0x00100000 through 0x00f00000 for
+ * section alignments of 1 through 8192 bytes.
+ *
+ * (4) Both standard COFF and Win32 COFF seem to use the DWORD
+ * field directly after the section name in the section header
+ * table for something strange: they store what the address of the
+ * section start point _would_ be, if you laid all the sections end
+ * to end starting at zero. Dunno why. Microsoft's documentation
+ * lists this field as "Virtual Size of Section", which doesn't
+ * seem to fit at all. In fact, Win32 even includes non-linked
+ * sections such as .drectve in this calculation.
+ *
+ * Newer versions of MASM seem to have changed this to be zero, and
+ * that apparently matches the COFF spec, so go with that.
+ *
+ * (5) Standard COFF does something very strange to common
+ * variables: the relocation point for a common variable is as far
+ * _before_ the variable as its size stretches out _after_ it. So
+ * we must fix up common variable references. Win32 seems to be
+ * sensible on this one.
+ */
+
+/* Flag which version of COFF we are currently outputting. */
+bool win32, win64;
+
+static int32_t imagebase_sect;
+#define WRT_IMAGEBASE "..imagebase"
+
+/*
+ * Some common section flags by default
+ */
+#define TEXT_FLAGS_WIN                                  \
+        (IMAGE_SCN_CNT_CODE                     |       \
+         IMAGE_SCN_ALIGN_16BYTES                |       \
+         IMAGE_SCN_MEM_EXECUTE                  |       \
+         IMAGE_SCN_MEM_READ)
+#define TEXT_FLAGS_DOS                                  \
+        (IMAGE_SCN_CNT_CODE)
+
+#define DATA_FLAGS_WIN                                  \
+        (IMAGE_SCN_CNT_INITIALIZED_DATA         |       \
+         IMAGE_SCN_ALIGN_4BYTES                 |       \
+         IMAGE_SCN_MEM_READ                     |       \
+         IMAGE_SCN_MEM_WRITE)
+#define DATA_FLAGS_DOS                                  \
+        (IMAGE_SCN_CNT_INITIALIZED_DATA)
+
+#define BSS_FLAGS_WIN                                   \
+        (IMAGE_SCN_CNT_UNINITIALIZED_DATA       |       \
+         IMAGE_SCN_ALIGN_4BYTES                 |       \
+         IMAGE_SCN_MEM_READ                     |       \
+         IMAGE_SCN_MEM_WRITE)
+#define BSS_FLAGS_DOS                                   \
+        (IMAGE_SCN_CNT_UNINITIALIZED_DATA)
+
+#define RDATA_FLAGS_WIN                                 \
+        (IMAGE_SCN_CNT_INITIALIZED_DATA         |       \
+         IMAGE_SCN_ALIGN_8BYTES                 |       \
+         IMAGE_SCN_MEM_READ)
+
+#define RDATA_FLAGS_DOS                                 \
+        (IMAGE_SCN_CNT_INITIALIZED_DATA)
+
+#define PDATA_FLAGS                                     \
+        (IMAGE_SCN_CNT_INITIALIZED_DATA         |       \
+         IMAGE_SCN_ALIGN_4BYTES                 |       \
+         IMAGE_SCN_MEM_READ)
+
+#define XDATA_FLAGS                                     \
+        (IMAGE_SCN_CNT_INITIALIZED_DATA         |       \
+         IMAGE_SCN_ALIGN_8BYTES                 |       \
+         IMAGE_SCN_MEM_READ)
+
+#define INFO_FLAGS                                      \
+        (IMAGE_SCN_ALIGN_1BYTES                 |       \
+         IMAGE_SCN_LNK_INFO                     |       \
+         IMAGE_SCN_LNK_REMOVE)
+
+#define TEXT_FLAGS      ((win32 | win64) ? TEXT_FLAGS_WIN  : TEXT_FLAGS_DOS)
+#define DATA_FLAGS      ((win32 | win64) ? DATA_FLAGS_WIN  : DATA_FLAGS_DOS)
+#define BSS_FLAGS       ((win32 | win64) ? BSS_FLAGS_WIN   : BSS_FLAGS_DOS)
+#define RDATA_FLAGS     ((win32 | win64) ? RDATA_FLAGS_WIN : RDATA_FLAGS_DOS)
+
+#define COFF_MAX_ALIGNMENT 8192
+
+#define SECT_DELTA 32
+struct coff_Section **coff_sects;
+static int sectlen;
+int coff_nsects;
+
+struct SAA *coff_syms;
+uint32_t coff_nsyms;
+
+static int32_t def_seg;
+
+static int initsym;
+
+static struct RAA *bsym, *symval;
+
+struct SAA *coff_strs;
+static uint32_t strslen;
+
+static void coff_gen_init(void);
+static void coff_sect_write(struct coff_Section *, const uint8_t *, uint32_t);
+static void coff_write(void);
+static void coff_section_header(char *, int32_t, int32_t, int32_t, int32_t, int32_t, int, int32_t);
+static void coff_write_relocs(struct coff_Section *);
+static void coff_write_symbols(void);
+static void coff_defcomdatname(char *name, int32_t segment);
+
+#define COMDAT_PLACEHOLDER_NAME ".tmpcmdt"
+
+static void coff_win32_init(void)
+{
+    win32 = true;
+    win64 = false;
+    coff_gen_init();
+}
+
+static void coff_win64_init(void)
+{
+    win32 = false;
+    win64 = true;
+    coff_gen_init();
+    imagebase_sect = seg_alloc()+1;
+    backend_label(WRT_IMAGEBASE, imagebase_sect, 0);
+}
+
+static void coff_std_init(void)
+{
+    win32 = win64 = false;
+    coff_gen_init();
+}
+
+static void coff_gen_init(void)
+{
+
+    coff_sects = NULL;
+    coff_nsects = sectlen = 0;
+    coff_syms = saa_init(sizeof(struct coff_Symbol));
+    coff_nsyms = 0;
+    bsym = raa_init();
+    symval = raa_init();
+    coff_strs = saa_init(1);
+    strslen = 0;
+    def_seg = seg_alloc();
+}
+
+static void coff_cleanup(void)
+{
+    struct coff_Reloc *r;
+    int i;
+
+    dfmt->cleanup();
+
+    coff_write();
+    for (i = 0; i < coff_nsects; i++) {
+        if (coff_sectsi->data)
+            saa_free(coff_sectsi->data);
+        while (coff_sectsi->head) {
+            r = coff_sectsi->head;
+            coff_sectsi->head = coff_sectsi->head->next;
+            nasm_free(r);
+        }
+        nasm_free(coff_sectsi->name);
+        nasm_free(coff_sectsi->comdat_name);
+        nasm_free(coff_sectsi);
+    }
+    nasm_free(coff_sects);
+    saa_free(coff_syms);
+    raa_free(bsym);
+    raa_free(symval);
+    saa_free(coff_strs);
+}
+
+int coff_make_section(char *name, uint32_t flags)
+{
+    struct coff_Section *s;
+    size_t namelen;
+
+    s = nasm_zalloc(sizeof(*s));
+
+    if (flags != BSS_FLAGS)
+        s->data = saa_init(1);
+    s->tail = &s->head;
+    if (!strcmp(name, ".text"))
+        s->index = def_seg;
+    else
+        s->index = seg_alloc();
+    s->namepos = -1;
+    namelen = strlen(name);
+    if (namelen > 8) {
+        if (win32 || win64) {
+            s->namepos = strslen + 4;
+            saa_wbytes(coff_strs, name, namelen + 1);
+            strslen += namelen + 1;
+        } else {
+            namelen = 8;
+        }
+    }
+    s->name = nasm_malloc(namelen + 1);
+    strncpy(s->name, name, namelen);
+    s->namenamelen = '\0';
+    s->flags = flags;
+
+    if (coff_nsects >= sectlen) {
+        sectlen += SECT_DELTA;
+        coff_sects = nasm_realloc(coff_sects, sectlen * sizeof(*coff_sects));
+    }
+    coff_sectscoff_nsects++ = s;
+
+    return coff_nsects - 1;
+}
+
+/*
+ * Update the name and flags of an existing section
+ */
+static void coff_update_section(int section, char *name, uint32_t flags)
+{
+    struct coff_Section *s = coff_sectssection;
+    size_t namelen = strlen(name);
+
+    if (namelen > 8) {
+        if (win32 || win64) {
+            s->namepos = strslen + 4;
+            saa_wbytes(coff_strs, name, namelen + 1);
+            strslen += namelen + 1;
+        } else {
+            namelen = 8;
+        }
+    }
+
+    nasm_free(s->name);
+    s->name = nasm_malloc(namelen + 1);
+    strncpy(s->name, name, namelen);
+    s->namenamelen = '\0';
+    s->flags = flags;
+}
+
+/*
+ * Convert an alignment value to the corresponding flags.
+ * An alignment value of 0 means no flags should be set.
+ */
+static inline uint32_t coff_sectalign_flags(unsigned int align)
+{
+    return (alignlog2_32(align) + 1) << 20;
+}
+
+/*
+ * Get the default section flags (based on section name)
+ */
+static uint32_t coff_section_flags(char *name, uint32_t flags)
+{
+    if (!flags) {
+        flags = TEXT_FLAGS;
+
+        if (!strcmp(name, ".data")) {
+            flags = DATA_FLAGS;
+        } else if (!strcmp(name, ".rdata")) {
+            flags = RDATA_FLAGS;
+        } else if (!strcmp(name, ".bss")) {
+            flags = BSS_FLAGS;
+        } else if (win64) {
+            if (!strcmp(name, ".pdata"))
+                flags = PDATA_FLAGS;
+            else if (!strcmp(name, ".xdata"))
+                flags = XDATA_FLAGS;
+        }
+    }
+
+    return flags;
+}
+
+static int32_t coff_section_names(char *name, int *bits)
+{
+    char *p, *comdat_name;
+    uint32_t flags, align_flags;
+    int i, j;
+    int8_t comdat_selection;
+    int32_t comdat_associated;
+
+    /*
+     * Set default bits.
+     */
+    if (!name) {
+        if(win64)
+            *bits = 64;
+        else
+            *bits = 32;
+
+        return def_seg;
+    }
+
+    p = name;
+    while (*p && !nasm_isspace(*p))
+        p++;
+    if (*p)
+        *p++ = '\0';
+    if (strlen(name) > 8) {
+        if (!win32 && !win64) {
+            nasm_warn(WARN_OTHER, "COFF section names limited to 8 characters:  truncating");
+            name8 = '\0';
+        }
+    }
+    flags = align_flags = comdat_selection = comdat_associated = 0;
+    comdat_name = NULL;
+
+    while (*p && nasm_isspace(*p))
+        p++;
+    while (*p) {
+        char *q = p;
+        while (*p && !nasm_isspace(*p))
+            p++;
+        if (*p)
+            *p++ = '\0';
+        while (*p && nasm_isspace(*p))
+            p++;
+
+        if (!nasm_stricmp(q, "code") || !nasm_stricmp(q, "text")) {
+            flags = TEXT_FLAGS;
+        } else if (!nasm_stricmp(q, "data")) {
+            flags = DATA_FLAGS;
+        } else if (!nasm_stricmp(q, "rdata")) {
+            if (win32 | win64)
+                flags = RDATA_FLAGS;
+            else {
+                flags = DATA_FLAGS;     /* gotta do something */
+                nasm_nonfatal("standard COFF does not support"
+                              " read-only data sections");
+            }
+        } else if (!nasm_stricmp(q, "bss")) {
+            flags = BSS_FLAGS;
+        } else if (!nasm_stricmp(q, "info")) {
+            if (win32 | win64)
+                flags = INFO_FLAGS;
+            else {
+                flags = DATA_FLAGS;     /* gotta do something */
+                nasm_nonfatal("standard COFF does not support"
+                              " informational sections");
+            }
+        } else if (!nasm_strnicmp(q, "align=", 6)) {
+            if (q6 + strspn(q + 6, "0123456789"))
+                nasm_nonfatal("argument to `align' is not numeric");
+            else {
+                unsigned int align = atoi(q + 6);
+                /* Allow align=0 meaning use default */
+                if (!align) {
+                    align_flags = 0;
+                } else if (!is_power2(align)) {
+                    nasm_nonfatal("argument to `align' is not a"
+                                  " power of two");
+                } else if (align > COFF_MAX_ALIGNMENT) {
+                    nasm_nonfatal("maximum alignment in COFF is %d bytes",
+                                  COFF_MAX_ALIGNMENT);
+                } else {
+                    align_flags = coff_sectalign_flags(align);
+                }
+            }
+        } else if (!nasm_strnicmp(q, "comdat=", 7)) {
+            /*
+             * Expected format: comdat=num:name
+             * where
+             *   num is a number: one of the IMAGE_COMDAT_SELECT_* constants
+             *   name is a string: the "COMDAT name"
+             */
+            comdat_selection = strtoul(q + 7, &q, 10);
+            if (!comdat_selection)
+                nasm_nonfatal("invalid argument to `comdat'");
+            else if (*q != ':' || q1 == '\0')
+                nasm_nonfatal("missing name in `comdat'");
+            else {
+                comdat_name = q + 1;
+            }
+        }
+    }
+
+    for (i = 0; i < coff_nsects; i++)
+        if (!strcmp(name, coff_sectsi->name)) {
+            if (!comdat_name && !coff_sectsi->comdat_name)
+                break;
+            else if (comdat_name && coff_sectsi->comdat_name &&
+                     !strcmp(comdat_name, coff_sectsi->comdat_name)) {
+                /*
+                 * For COMDAT, it makes sense to have multiple sections with
+                 * the same name (different comdat name though)
+                 */
+                if ((coff_sectsi->comdat_selection == IMAGE_COMDAT_SELECT_ASSOCIATIVE &&
+                    comdat_selection == IMAGE_COMDAT_SELECT_ASSOCIATIVE) ||
+                    (coff_sectsi->comdat_selection != IMAGE_COMDAT_SELECT_ASSOCIATIVE &&
+                    comdat_selection != IMAGE_COMDAT_SELECT_ASSOCIATIVE)) {
+                    /*
+                     * Let's also allow an associative/other pair with the same name
+                     */
+                    break;
+                }
+            }
+        }
+        else if (comdat_name && coff_sectsi->comdat_name &&
+                 !coff_sectsi->comdat_selection &&
+                 !strcmp(comdat_name, coff_sectsi->comdat_name) &&
+                 comdat_selection != IMAGE_COMDAT_SELECT_ASSOCIATIVE) {
+            /*
+             * This seems to be a "placeholder section" we've created before
+             * to be the associate of a previous comdat section.
+             * We'll just update the name and flags with the real ones now.
+             */
+            flags = coff_section_flags(name, flags);
+            coff_update_section(i, name, flags | IMAGE_SCN_LNK_COMDAT);
+            coff_sectsi->comdat_selection = comdat_selection;
+            break;
+        }
+
+    if (i == coff_nsects) {
+        flags = coff_section_flags(name, flags);
+
+        if (comdat_name) {
+            flags |= IMAGE_SCN_LNK_COMDAT;
+
+            if (comdat_selection == IMAGE_COMDAT_SELECT_ASSOCIATIVE) {
+                /*
+                 * Find an existing section with given comdat name
+                 */
+                for (j = 0; j < coff_nsects; j++)
+                    if (coff_sectsj->comdat_name &&
+                        !strcmp(coff_sectsj->comdat_name, comdat_name))
+                        break;
+
+                if (j == coff_nsects) {
+                    /*
+                     * The associated section doesn't exist (yet)
+                     * Even though the specs don't enforce a particular order,
+                     * VS (2019) linker doesn't accept .obj files where the
+                     * target section is a later one (than the one with sel==5)
+                     *
+                     * So let's insert another section now (a placeholder),
+                     * hoping it will be turned into the target section later.
+                     */
+                    j = coff_make_section(COMDAT_PLACEHOLDER_NAME, TEXT_FLAGS);
+                    coff_sectsj->comdat_name = nasm_strdup(comdat_name);
+                }
+
+                comdat_associated = j + 1;
+            }
+        }
+
+        i = coff_make_section(name, flags);
+        coff_sectsi->align_flags = align_flags;
+
+        if (comdat_name) {
+            coff_sectsi->comdat_selection = comdat_selection;
+            coff_sectsi->comdat_associated = comdat_associated;
+            coff_sectsi->comdat_name = nasm_strdup(comdat_name);
+        }
+    } else {
+        if (flags) {
+            if (comdat_name)
+                flags |= IMAGE_SCN_LNK_COMDAT;
+
+            /* Warn if non-alignment flags differ */
+            if (((flags ^ coff_sectsi->flags) & ~IMAGE_SCN_ALIGN_MASK) &&
+                coff_sectsi->pass_last_seen == pass_count()) {
+                nasm_warn(WARN_OTHER, "section attributes changed on"
+                          " redeclaration of section `%s'", name);
+            }
+        }
+
+        /*
+         * Alignment can be increased, but never decreased. However,
+         * specifying a narrower alignment is permitted and ignored.
+         */
+        if (align_flags > coff_sectsi->align_flags) {
+            coff_sectsi->align_flags = align_flags;
+        }
+
+        if (comdat_name) {
+            if ((coff_sectsi->comdat_selection != comdat_selection) &&
+                coff_sectsi->pass_last_seen == pass_count()) {
+                nasm_warn(WARN_OTHER, "comdat selection changed on"
+                          " redeclaration of name `%s'", comdat_name);
+            }
+        }
+    }
+
+    coff_sectsi->pass_last_seen = pass_count();
+    return coff_sectsi->index;
+}
+
+static void coff_deflabel(char *name, int32_t segment, int64_t offset,
+                          int is_global, char *special)
+{
+    int pos, section;
+    struct coff_Symbol *sym;
+
+    if (special)
+        nasm_nonfatal("COFF format does not support any"
+                      " special symbol types");
+
+    if (name0 == '.' && name1 == '.' && name2 != '@') {
+        if (strcmp(name,WRT_IMAGEBASE))
+            nasm_nonfatal("unrecognized special symbol `%s'", name);
+        return;
+    }
+
+    if (segment == NO_SEG)
+        section = -1;      /* absolute symbol */
+    else {
+        int i;
+        section = 0;
+        for (i = 0; i < coff_nsects; i++)
+            if (segment == coff_sectsi->index) {
+                section = i + 1;
+
+                if (coff_sectsi->comdat_name && !coff_sectsi->comdat_symbol) {
+                    /*
+                     * The "comdat symbol" must be the first one in symbol table
+                     * So we'll insert/define it - before defining the other one
+                     */
+                    coff_sectsi->comdat_symbol = 1;
+
+                    if (coff_sectsi->comdat_selection != IMAGE_COMDAT_SELECT_ASSOCIATIVE &&
+                        0 != strcmp(coff_sectsi->comdat_name, name)) {
+                        coff_defcomdatname(coff_sectsi->comdat_name, segment);
+                    }
+                }
+                break;
+            }
+    }
+
+    pos = strslen + 4;
+    if (strlen(name) > 8) {
+        size_t nlen = strlen(name)+1;
+        saa_wbytes(coff_strs, name, nlen);
+        strslen += nlen;
+    } else
+        pos = -1;
+
+    sym = saa_wstruct(coff_syms);
+
+    sym->strpos = pos;
+    sym->namlen = strlen(name);
+    if (pos == -1)
+        strcpy(sym->name, name);
+    sym->is_global = !!is_global;
+    sym->type = 0;              /* Default to T_NULL (no type) */
+    sym->section = section;
+    if (!sym->section)
+        sym->is_global = true;
+    if (is_global == 2)
+        sym->value = offset;
+    else
+        sym->value = (sym->section == 0 ? 0 : offset);
+
+    /*
+     * define the references from external-symbol segment numbers
+     * to these symbol records.
+     */
+    if (sym->section == 0)
+        bsym = raa_write(bsym, segment, coff_nsyms);
+
+    if (segment != NO_SEG)
+        symval = raa_write(symval, segment, sym->section ? 0 : sym->value);
+
+    coff_nsyms++;
+}
+
+static int32_t coff_add_reloc(struct coff_Section *sect, int32_t segment,
+                              int16_t type)
+{
+    struct coff_Reloc *r;
+
+    r = *sect->tail = nasm_malloc(sizeof(struct coff_Reloc));
+    sect->tail = &r->next;
+    r->next = NULL;
+
+    r->address = sect->len;
+    if (segment == NO_SEG) {
+        r->symbol = 0, r->symbase = ABS_SYMBOL;
+    } else {
+        int i;
+        r->symbase = REAL_SYMBOLS;
+        for (i = 0; i < coff_nsects; i++) {
+            if (segment == coff_sectsi->index) {
+                r->symbol = i * 2;
+                r->symbase = SECT_SYMBOLS;
+                break;
+            }
+        }
+        if (r->symbase == REAL_SYMBOLS)
+            r->symbol = raa_read(bsym, segment);
+    }
+    r->type = type;
+
+    sect->nrelocs++;
+
+    /*
+     * Return the fixup for standard COFF common variables.
+     */
+    if (r->symbase == REAL_SYMBOLS && !(win32 | win64))
+        return raa_read(symval, segment);
+
+    return 0;
+}
+
+static void coff_out(int32_t segto, const void *data,
+                     enum out_type type, uint64_t size,
+                     int32_t segment, int32_t wrt)
+{
+    struct coff_Section *s;
+    uint8_t mydata8, *p;
+    int i;
+
+    if (wrt != NO_SEG && !win64) {
+        wrt = NO_SEG;           /* continue to do _something_ */
+        nasm_nonfatal("WRT not supported by COFF output formats");
+    }
+
+    s = NULL;
+    for (i = 0; i < coff_nsects; i++) {
+        if (segto == coff_sectsi->index) {
+            s = coff_sectsi;
+            break;
+        }
+    }
+    if (!s) {
+        int tempint;            /* ignored */
+        if (segto != coff_section_names(".text", &tempint))
+            nasm_panic("strange segment conditions in COFF driver");
+        else
+            s = coff_sectscoff_nsects - 1;
+    }
+
+    /* magically default to 'wrt ..imagebase' in .pdata and .xdata */
+    if (win64 && wrt == NO_SEG) {
+        if (!strcmp(s->name,".pdata") || !strcmp(s->name,".xdata"))
+            wrt = imagebase_sect;
+    }
+
+    if (!s->data && type != OUT_RESERVE) {
+        nasm_warn(WARN_OTHER, "attempt to initialize memory in"
+                  " BSS section `%s': ignored", s->name);
+        s->len += realsize(type, size);
+        return;
+    }
+
+    memset(mydata, 0, sizeof(mydata));
+
+    if (dfmt && dfmt->debug_output) {
+        struct coff_DebugInfo dinfo;
+        dinfo.segto = segto;
+        dinfo.seg = segment;
+        dinfo.section = s;
+
+        if (type == OUT_ADDRESS)
+            dinfo.size = abs((int)size);
+        else
+            dinfo.size = realsize(type, size);
+
+        dfmt->debug_output(type, &dinfo);
+    }
+
+    if (type == OUT_RESERVE) {
+        if (s->data) {
+            nasm_warn(WARN_ZEROING, "uninitialised space declared in"
+                      " non-BSS section `%s': zeroing", s->name);
+            coff_sect_write(s, NULL, size);
+        } else
+            s->len += size;
+    } else if (type == OUT_RAWDATA) {
+        coff_sect_write(s, data, size);
+    } else if (type == OUT_ADDRESS) {
+        int asize = abs((int)size);
+        if (!win64) {
+            if (asize != 4 && (segment != NO_SEG || wrt != NO_SEG)) {
+                nasm_nonfatal("COFF format does not support non-32-bit"
+                              " relocations");
+            } else {
+                int32_t fix = 0;
+                if (segment != NO_SEG || wrt != NO_SEG) {
+                    if (wrt != NO_SEG) {
+                        nasm_nonfatal("COFF format does not support WRT types");
+                    } else if (segment % 2) {
+                        nasm_nonfatal("COFF format does not support"
+                                      " segment base references");
+                    } else
+                        fix = coff_add_reloc(s, segment, IMAGE_REL_I386_DIR32);
+                }
+                p = mydata;
+                WRITELONG(p, *(int64_t *)data + fix);
+                coff_sect_write(s, mydata, asize);
+            }
+        } else {
+            int32_t fix = 0;
+            p = mydata;
+            if (asize == 8) {
+                if (wrt == imagebase_sect) {
+                    nasm_nonfatal("operand size mismatch: 'wrt "
+                                  WRT_IMAGEBASE "' is a 32-bit operand");
+                }
+                fix = coff_add_reloc(s, segment, IMAGE_REL_AMD64_ADDR64);
+                WRITEDLONG(p, *(int64_t *)data + fix);
+                coff_sect_write(s, mydata, asize);
+            } else {
+                fix = coff_add_reloc(s, segment,
+                        wrt == imagebase_sect ?	IMAGE_REL_AMD64_ADDR32NB:
+                                                IMAGE_REL_AMD64_ADDR32);
+                WRITELONG(p, *(int64_t *)data + fix);
+                coff_sect_write(s, mydata, asize);
+            }
+        }
+    } else if (type == OUT_REL2ADR) {
+        nasm_nonfatal("COFF format does not support 16-bit relocations");
+    } else if (type == OUT_REL4ADR) {
+        if (segment == segto && !(win64))  /* Acceptable for RIP-relative */
+            nasm_panic("intra-segment OUT_REL4ADR");
+        else if (segment == NO_SEG && win32)
+            nasm_nonfatal("Win32 COFF does not correctly support"
+                          " relative references to absolute addresses");
+        else {
+            int32_t fix = 0;
+            if (segment != NO_SEG && segment % 2) {
+                nasm_nonfatal("COFF format does not support"
+                              " segment base references");
+            } else
+                fix = coff_add_reloc(s, segment,
+                        win64 ? IMAGE_REL_AMD64_REL32 : IMAGE_REL_I386_REL32);
+            p = mydata;
+            if (win32 | win64) {
+                WRITELONG(p, *(int64_t *)data + 4 - size + fix);
+            } else {
+                WRITELONG(p, *(int64_t *)data - (size + s->len) + fix);
+            }
+            coff_sect_write(s, mydata, 4L);
+        }
+
+    }
+}
+
+static void coff_sect_write(struct coff_Section *sect,
+                            const uint8_t *data, uint32_t len)
+{
+    saa_wbytes(sect->data, data, len);
+    sect->len += len;
+}
+
+typedef struct tagString {
+    struct tagString *next;
+    int len;
+    char *String;
+} STRING;
+
+#define EXPORT_SECTION_NAME ".drectve"
+#define EXPORT_SECTION_FLAGS INFO_FLAGS
+/*
+ * #define EXPORT_SECTION_NAME ".text"
+ * #define EXPORT_SECTION_FLAGS TEXT_FLAGS
+ */
+
+static STRING *Exports = NULL;
+static struct coff_Section *directive_sec;
+static void AddExport(char *name)
+{
+    STRING *rvp = Exports, *newS;
+
+    newS = (STRING *) nasm_malloc(sizeof(STRING));
+    newS->len = strlen(name);
+    newS->next = NULL;
+    newS->String = (char *)nasm_malloc(newS->len + 1);
+    strcpy(newS->String, name);
+    if (rvp == NULL) {
+        int i;
+
+        for (i = 0; i < coff_nsects; i++) {
+            if (!strcmp(EXPORT_SECTION_NAME, coff_sectsi->name))
+                break;
+        }
+
+        if (i == coff_nsects)
+            i = coff_make_section(EXPORT_SECTION_NAME, EXPORT_SECTION_FLAGS);
+
+        directive_sec = coff_sectsi;
+        Exports = newS;
+    } else {
+        while (rvp->next) {
+            if (!strcmp(rvp->String, name))
+                return;
+            rvp = rvp->next;
+        }
+        rvp->next = newS;
+    }
+}
+
+static void BuildExportTable(STRING **rvp)
+{
+    STRING *p, *t;
+
+    if (!rvp || !*rvp)
+        return;
+
+    list_for_each_safe(p, t, *rvp) {
+        coff_sect_write(directive_sec, (uint8_t *)"-export:", 8);
+        coff_sect_write(directive_sec, (uint8_t *)p->String, p->len);
+        coff_sect_write(directive_sec, (uint8_t *)" ", 1);
+        nasm_free(p->String);
+        nasm_free(p);
+    }
+
+    *rvp = NULL;
+}
+
+static void coff_defcomdatname(char *name, int32_t segment)
+{
+    coff_deflabel(name, segment, 0, 1, NULL);
+}
+
+static enum directive_result
+coff_directives(enum directive directive, char *value)
+{
+    switch (directive) {
+    case D_EXPORT:
+    {
+        char *q, *name;
+
+        /*
+         * XXX: pass_first() is really wrong here, but AddExport()
+         * needs to be modified to handle duplicate calls for the
+         * same value in order to change that. The right thing to do
+         * is probably to mark a label as an export in the label
+         * structure, in case the label doesn't actually exist.
+         */
+        if (!pass_first())
+            return DIRR_OK;           /* ignore in pass two */
+        name = q = value;
+        while (*q && !nasm_isspace(*q))
+            q++;
+        if (nasm_isspace(*q)) {
+            *q++ = '\0';
+            while (*q && nasm_isspace(*q))
+                q++;
+        }
+
+        if (!*name) {
+            nasm_nonfatal("`export' directive requires export name");
+            return DIRR_ERROR;
+        }
+        if (*q) {
+            nasm_nonfatal("unrecognized export qualifier `%s'", q);
+            return DIRR_ERROR;
+        }
+        AddExport(name);
+        return DIRR_OK;
+    }
+    case D_SAFESEH:
+    {
+        static int sxseg=-1;
+        int i;
+
+        if (!win32) /* Only applicable for -f win32 */
+            return 0;
+
+        if (sxseg == -1) {
+            for (i = 0; i < coff_nsects; i++)
+                if (!strcmp(".sxdata",coff_sectsi->name))
+                    break;
+            if (i == coff_nsects)
+                sxseg = coff_make_section(".sxdata", IMAGE_SCN_LNK_INFO);
+            else
+                sxseg = i;
+        }
+        /*
+         * pass_final() is the only time when the full set of symbols are
+         * guaranteed to be present as it is the final output pass.
+         */
+        if (pass_final()) {
+            uint32_t n;
+            saa_rewind(coff_syms);
+            for (n = 0; n < coff_nsyms; n++) {
+                struct coff_Symbol *sym = saa_rstruct(coff_syms);
+                bool equals;
+
+                /*
+                 * sym->strpos is biased by 4, because symbol
+                 * table is prefixed with table length
+                 */
+                if (sym->strpos >=4) {
+                    char *name = nasm_malloc(sym->namlen+1);
+                    saa_fread(coff_strs, sym->strpos-4, name, sym->namlen);
+                    namesym->namlen = '\0';
+                    equals = !strcmp(value,name);
+                    nasm_free(name);
+                } else {
+                    equals = !strcmp(value,sym->name);
+                }
+
+                if (equals) {
+                    /*
+                     * this value arithmetic effectively reflects
+                     * initsym in coff_write(): 2 for file, 1 for
+                     * .absolute and two per each section
+                     */
+                    unsigned char value4,*p=value;
+                    WRITELONG(p,n + 2 + 1 + coff_nsects*2);
+                    coff_sect_write(coff_sectssxseg,value,4);
+                    sym->type = 0x20;
+                    break;
+                }
+            }
+            if (n == coff_nsyms) {
+                nasm_nonfatal("`safeseh' directive requires valid symbol");
+                return DIRR_ERROR;
+            }
+        }
+        return DIRR_OK;
+    }
+    default:
+        return DIRR_UNKNOWN;
+    }
+}
+
+/* handle relocations storm, valid for win32/64 only */
+static inline void coff_adjust_relocs(struct coff_Section *s)
+{
+    if (s->nrelocs < IMAGE_SCN_MAX_RELOC)
+        return;
+#ifdef OF_COFF
+    else
+    {
+        if (ofmt == &of_coff)
+            nasm_fatal("Too many relocations (%d) for section `%s'",
+                       s->nrelocs, s->name);
+    }
+#endif
+
+    s->flags |= IMAGE_SCN_LNK_NRELOC_OVFL;
+    s->nrelocs++;
+}
+
+/*
+ * Make sure we satisfy all section alignment requirements and put the
+ * resulting alignment flags into the flags value in the header.  If
+ * no user-specified alignment is given, use the default for the
+ * section type; then either way round up to alignment specified by
+ * sectalign directives.
+ */
+static inline void coff_adjust_alignment(struct coff_Section *s)
+{
+    uint32_t align_flags = s->align_flags;
+
+    if (!align_flags) {
+        /* No user-specified alignment, use default for partition type */
+        align_flags = s->flags & IMAGE_SCN_ALIGN_MASK;
+    }
+
+    if (align_flags < s->sectalign_flags)
+        align_flags = s->sectalign_flags;
+
+    s->flags = (s->flags & ~IMAGE_SCN_ALIGN_MASK) | align_flags;
+}
+
+static void coff_write(void)
+{
+    int32_t pos, sympos, vsize;
+    int i;
+
+    /* fill in the .drectve section with -export's */
+    BuildExportTable(&Exports);
+
+    if (win32) {
+        /* add default value for @feat.00, this allows to 'link /safeseh' */
+        uint32_t n;
+
+        saa_rewind(coff_syms);
+        for (n = 0; n < coff_nsyms; n++) {
+            struct coff_Symbol *sym = saa_rstruct(coff_syms);
+            if (sym->strpos == -1 && !strcmp("@feat.00",sym->name))
+                break;
+        }
+        if (n == coff_nsyms)
+            coff_deflabel("@feat.00", NO_SEG, 1, 0, NULL);
+    }
+
+    /*
+     * Check all comdat sections
+     */
+    for (i = 0; i < coff_nsects; i++)
+        if (coff_sectsi->comdat_name) {
+            if (!coff_sectsi->comdat_symbol &&
+                coff_sectsi->comdat_selection != IMAGE_COMDAT_SELECT_ASSOCIATIVE) {
+                /*
+                 * This section doesn't have its comdat symbol defined; do it
+                 */
+                coff_defcomdatname(coff_sectsi->comdat_name, coff_sectsi->index);
+            }
+            if (!coff_sectsi->comdat_selection) {
+                /*
+                 * This is a placeholder section that wasn't properly defined
+                 */
+                nasm_nonfatal("`comdat' associate with symbol `%s` wasn't defined",
+                              coff_sectsi->comdat_name);
+            }
+        }
+
+    /*
+     * Work out how big the file will get.
+     * Calculate the start of the `real' symbols at the same time.
+     * Check for massive relocations.
+     */
+    pos = 0x14 + 0x28 * coff_nsects;
+    initsym = 3;                /* two for the file, one absolute */
+    for (i = 0; i < coff_nsects; i++) {
+        coff_adjust_alignment(coff_sectsi);
+        if (coff_sectsi->data) {
+            coff_adjust_relocs(coff_sectsi);
+            coff_sectsi->pos = pos;
+            pos += coff_sectsi->len;
+            coff_sectsi->relpos = pos;
+            pos += 10 * coff_sectsi->nrelocs;
+        } else
+            coff_sectsi->pos = coff_sectsi->relpos = 0L;
+        initsym += 2;           /* two for each section */
+    }
+    sympos = pos;
+
+    /*
+     * Output the COFF header.
+     */
+    if (win64)
+        i = IMAGE_FILE_MACHINE_AMD64;
+    else
+        i = IMAGE_FILE_MACHINE_I386;
+    fwriteint16_t(i,                    ofile); /* machine type */
+    fwriteint16_t(coff_nsects,               ofile); /* number of sections */
+    fwriteint32_t(posix_timestamp(), ofile); /* timestamp */
+    fwriteint32_t(sympos,               ofile);
+    fwriteint32_t(coff_nsyms + initsym,      ofile);
+    fwriteint16_t(0,                    ofile); /* no optional header */
+    /* Flags: 32-bit, no line numbers. Win32 doesn't even bother with them. */
+    fwriteint16_t((win32 | win64) ? 0 : 0x104, ofile);
+
+    /*
+     * Output the section headers.
+     */
+    vsize = 0L;
+    for (i = 0; i < coff_nsects; i++) {
+        coff_section_header(coff_sectsi->name, coff_sectsi->namepos, vsize, coff_sectsi->len,
+                            coff_sectsi->pos, coff_sectsi->relpos,
+                            coff_sectsi->nrelocs, coff_sectsi->flags);
+        vsize += coff_sectsi->len;
+    }
+
+    /*
+     * Output the sections and their relocations.
+     */
+    for (i = 0; i < coff_nsects; i++)
+        if (coff_sectsi->data) {
+            saa_fpwrite(coff_sectsi->data, ofile);
+            coff_write_relocs(coff_sectsi);
+
+            if (coff_sectsi->flags & IMAGE_SCN_LNK_COMDAT) {
+                /*
+                 * Checksum the section data
+                 */
+                uint32_t checksum = 0;
+                const char *data;
+                size_t len;
+
+                saa_rewind(coff_sectsi->data);
+                while (len = coff_sectsi->data->datalen,
+                        (data = saa_rbytes(coff_sectsi->data, &len)) != NULL)
+                    checksum = crc32b(checksum, data, len);
+
+                coff_sectsi->checksum = checksum;
+            }
+        }
+
+    /*
+     * Output the symbol and string tables.
+     */
+    coff_write_symbols();
+    fwriteint32_t(strslen + 4, ofile);     /* length includes length count */
+    saa_fpwrite(coff_strs, ofile);
+}
+
+static void coff_section_header(char *name, int32_t namepos, int32_t vsize,
+                                int32_t datalen, int32_t datapos,
+                                int32_t relpos, int nrelocs, int32_t flags)
+{
+    char padname8;
+
+    (void)vsize;
+
+    if (namepos == -1) {
+        strncpy(padname, name, 8);
+        nasm_write(padname, 8, ofile);
+    } else {
+        /*
+         * If name is longer than 8 bytes, write '/' followed
+         * by offset into the strings table represented as
+         * decimal number.
+         */
+        namepos = namepos % 100000000;
+        padname0 = '/';
+        padname1 = '0' + (namepos / 1000000);
+        namepos = namepos % 1000000;
+        padname2 = '0' + (namepos / 100000);
+        namepos = namepos % 100000;
+        padname3 = '0' + (namepos / 10000);
+        namepos = namepos % 10000;
+        padname4 = '0' + (namepos / 1000);
+        namepos = namepos % 1000;
+        padname5 = '0' + (namepos / 100);
+        namepos = namepos % 100;
+        padname6 = '0' + (namepos / 10);
+        namepos = namepos % 10;
+        padname7 = '0' + (namepos);
+        nasm_write(padname, 8, ofile);
+    }
+
+    fwriteint32_t(0,            ofile); /* Virtual size field - set to 0 or vsize */
+    fwriteint32_t(0L,           ofile); /* RVA/offset - we ignore */
+    fwriteint32_t(datalen,      ofile);
+    fwriteint32_t(datapos,      ofile);
+    fwriteint32_t(relpos,       ofile);
+    fwriteint32_t(0L,           ofile); /* no line numbers - we don't do 'em */
+
+    /*
+     * a special case -- if there are too many relocs
+     * we have to put IMAGE_SCN_MAX_RELOC here and write
+     * the real relocs number into VirtualAddress of first
+     * relocation
+     */
+    if (flags & IMAGE_SCN_LNK_NRELOC_OVFL)
+        fwriteint16_t(IMAGE_SCN_MAX_RELOC, ofile);
+    else
+        fwriteint16_t(nrelocs,  ofile);
+
+    fwriteint16_t(0,            ofile); /* again, no line numbers */
+    fwriteint32_t(flags,        ofile);
+}
+
+static void coff_write_relocs(struct coff_Section *s)
+{
+    struct coff_Reloc *r;
+
+    /* a real number of relocations if needed */
+    if (s->flags & IMAGE_SCN_LNK_NRELOC_OVFL) {
+        fwriteint32_t(s->nrelocs, ofile);
+        fwriteint32_t(0, ofile);
+        fwriteint16_t(0, ofile);
+    }
+
+    for (r = s->head; r; r = r->next) {
+        fwriteint32_t(r->address, ofile);
+        fwriteint32_t(r->symbol + (r->symbase == REAL_SYMBOLS ? initsym :
+                                   r->symbase == ABS_SYMBOL   ? initsym - 1 :
+                                   r->symbase == SECT_SYMBOLS ? 2 : 0),
+                      ofile);
+        fwriteint16_t(r->type, ofile);
+    }
+}
+
+static void coff_symbol(char *name, int32_t strpos, int32_t value,
+                        int section, int type, int storageclass, int aux)
+{
+    char padname8;
+
+    if (name) {
+        strncpy(padname, name, 8);
+        nasm_write(padname, 8, ofile);
+    } else {
+        fwriteint32_t(0, ofile);
+        fwriteint32_t(strpos, ofile);
+    }
+
+    fwriteint32_t(value,        ofile);
+    fwriteint16_t(section,      ofile);
+    fwriteint16_t(type,         ofile);
+
+    fputc(storageclass, ofile);
+    fputc(aux, ofile);
+}
+
+static void coff_write_symbols(void)
+{
+    char filename18;
+    uint32_t i;
+
+    /*
+     * The `.file' record, and the file name auxiliary record.
+     */
+    coff_symbol(".file", 0L, 0L, -2, 0, 0x67, 1);
+    if (reproducible)
+        memset(filename, 0, 18);
+    else
+        strncpy(filename, inname, 18);
+    nasm_write(filename, 18, ofile);
+
+    /*
+     * The section records, with their auxiliaries.
+     */
+    memset(filename, 0, 18);    /* useful zeroed buffer */
+
+    for (i = 0; i < (uint32_t) coff_nsects; i++) {
+        coff_symbol(coff_sectsi->name, 0L, 0L, i + 1, 0, 3, 1);
+        fwriteint32_t(coff_sectsi->len,    ofile);
+        fwriteint16_t(coff_sectsi->nrelocs,ofile);
+        if (coff_sectsi->flags & IMAGE_SCN_LNK_COMDAT) {
+            fwriteint16_t(0, ofile);
+            fwriteint32_t(coff_sectsi->checksum, ofile);
+            fwriteint16_t(coff_sectsi->comdat_associated, ofile);
+            fputc(coff_sectsi->comdat_selection, ofile);
+            nasm_write(filename, 3, ofile);
+        }
+        else
+            nasm_write(filename, 12, ofile);
+    }
+
+    /*
+     * The absolute symbol, for relative-to-absolute relocations.
+     */
+    coff_symbol(".absolut", 0L, 0L, -1, 0, 3, 0);
+
+    /*
+     * The real symbols.
+     */
+    saa_rewind(coff_syms);
+    for (i = 0; i < coff_nsyms; i++) {
+        struct coff_Symbol *sym = saa_rstruct(coff_syms);
+        coff_symbol(sym->strpos == -1 ? sym->name : NULL,
+                    sym->strpos, sym->value, sym->section,
+                    sym->type, sym->is_global ? 2 : 3, 0);
+    }
+}
+
+static void coff_sectalign(int32_t seg, unsigned int value)
+{
+    struct coff_Section *s = NULL;
+    uint32_t flags;
+    int i;
+
+    for (i = 0; i < coff_nsects; i++) {
+        if (coff_sectsi->index == seg) {
+            s = coff_sectsi;
+            break;
+        }
+    }
+
+    if (!s || !is_power2(value))
+        return;
+
+    if (value > COFF_MAX_ALIGNMENT)
+        value = COFF_MAX_ALIGNMENT; /* Do our best... */
+
+    flags = coff_sectalign_flags(value);
+    if (flags > s->sectalign_flags)
+        s->sectalign_flags = flags;
+}
+
+extern macros_t coff_stdmac;
+
+#endif /* defined(OF_COFF) || defined(OF_WIN32) */
+
+#ifdef OF_COFF
+
+static const struct pragma_facility coff_pragma_list = {
+    { "coff", NULL },
+    { NULL,   NULL }
+};
+
+const struct ofmt of_coff = {
+    "COFF (i386) (DJGPP, some Unix variants)",
+    "coff",
+    ".o",
+    0,
+    32,
+    null_debug_arr,
+    &null_debug_form,
+    coff_stdmac,
+    coff_std_init,
+    null_reset,
+    nasm_do_legacy_output,
+    coff_out,
+    coff_deflabel,
+    coff_section_names,
+    NULL,
+    coff_sectalign,
+    null_segbase,
+    coff_directives,
+    coff_cleanup,
+    coff_pragma_list
+};
+
+#endif
+
+
+#ifdef OF_WIN32
+
+static const struct pragma_facility coff_win_pragma_list = {
+    { "win",  NULL },
+    { "coff", NULL },
+    { NULL,   NULL }
+};
+
+extern const struct dfmt df_cv8;
+static const struct dfmt * const win32_debug_arr2 = { &df_cv8, NULL };
+
+const struct ofmt of_win32 = {
+    "Microsoft extended COFF for Win32 (i386)",
+    "win32",
+    ".obj",
+    0,
+    32,
+    win32_debug_arr,
+    &df_cv8,
+    coff_stdmac,
+    coff_win32_init,
+    null_reset,
+    nasm_do_legacy_output,
+    coff_out,
+    coff_deflabel,
+    coff_section_names,
+    NULL,
+    coff_sectalign,
+    null_segbase,
+    coff_directives,
+    coff_cleanup,
+    coff_win_pragma_list
+};
+
+#endif
+
+#ifdef OF_WIN64
+
+static const struct dfmt * const win64_debug_arr2 = { &df_cv8, NULL };
+
+const struct ofmt of_win64 = {
+    "Microsoft extended COFF for Win64 (x86-64)",
+    "win64",
+    ".obj",
+    0,
+    64,
+    win64_debug_arr,
+    &df_cv8,
+    coff_stdmac,
+    coff_win64_init,
+    null_reset,
+    nasm_do_legacy_output,
+    coff_out,
+    coff_deflabel,
+    coff_section_names,
+    NULL,
+    coff_sectalign,
+    null_segbase,
+    coff_directives,
+    coff_cleanup,
+    coff_win_pragma_list
+};
+
+#endif

_service:tar_scm:nasm-2.16.03.tar.xz/output/outcoff.mac Added

@@ -0,0 +1,43 @@
+;; --------------------------------------------------------------------------
+;;   
+;;   Copyright 1996-2009 The NASM Authors - All Rights Reserved
+;;   See the file AUTHORS included with the NASM distribution for
+;;   the specific copyright holders.
+;;
+;;   Redistribution and use in source and binary forms, with or without
+;;   modification, are permitted provided that the following
+;;   conditions are met:
+;;
+;;   * Redistributions of source code must retain the above copyright
+;;     notice, this list of conditions and the following disclaimer.
+;;   * Redistributions in binary form must reproduce the above
+;;     copyright notice, this list of conditions and the following
+;;     disclaimer in the documentation and/or other materials provided
+;;     with the distribution.
+;;     
+;;     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+;;     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+;;     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+;;     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;;     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+;;     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;;     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+;;     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+;;     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+;;     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+;;     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+;;     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;;     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+;; --------------------------------------------------------------------------
+
+OUT: coff win32 win64
+%define __?SECT?__ section .text
+%macro __?NASM_CDecl?__ 1
+%endmacro
+%imacro export 1+.nolist
+export %1
+%endmacro
+%imacro safeseh 1.nolist
+safeseh %1
+%endmacro

_service:tar_scm:nasm-2.16.03.tar.xz/output/outdbg.c Added

@@ -0,0 +1,576 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2020 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * outdbg.c	output routines for the Netwide Assembler to produce
+ *		a debugging trace
+ */
+
+#include "compiler.h"
+
+#include "nctype.h"
+#include <errno.h>
+
+#include "nasm.h"
+#include "nasmlib.h"
+#include "outform.h"
+#include "outlib.h"
+#include "insns.h"
+#include "dbginfo.h"
+
+#ifdef OF_DBG
+
+struct Section {
+    struct Section *next;
+    int32_t number;
+    char *name;
+} *dbgsect;
+
+static unsigned long dbg_max_data_dump = 128;
+static bool section_labels = true;
+static bool subsections_via_symbols = false;
+static int32_t init_seg;
+
+const struct ofmt of_dbg;
+static void dbg_init(void)
+{
+    dbgsect = NULL;
+    fprintf(ofile, "NASM Output format debug dump\n");
+    fprintf(ofile, "input file  = %s\n", inname);
+    fprintf(ofile, "output file = %s\n", outname);
+    init_seg = seg_alloc();
+}
+
+static void dbg_reset(void)
+{
+    fprintf(ofile, "*** pass reset: pass = %"PRId64" (%s)\n",
+            pass_count(), pass_type_name());
+}
+
+static void dbg_cleanup(void)
+{
+    dfmt->cleanup();
+    while (dbgsect) {
+        struct Section *tmp = dbgsect;
+        dbgsect = dbgsect->next;
+        nasm_free(tmp->name);
+        nasm_free(tmp);
+    }
+}
+
+static int32_t dbg_add_section(char *name, int *bits, const char *whatwecallit)
+{
+    int seg;
+
+    /*
+     * We must have an initial default: let's make it 16.
+     */
+    if (!name)
+        *bits = 16;
+
+    if (!name) {
+        fprintf(ofile, "section_name on init: returning %d\n", init_seg);
+        seg = init_seg;
+    } else {
+        int n = strcspn(name, " \t");
+        char *sname = nasm_strndup(name, n);
+        char *tail = nasm_skip_spaces(name+n);
+        struct Section *s;
+
+        seg = NO_SEG;
+        for (s = dbgsect; s; s = s->next)
+            if (!strcmp(s->name, sname))
+                seg = s->number;
+
+        if (seg == NO_SEG) {
+            s = nasm_malloc(sizeof(*s));
+            s->name = sname;
+            s->number = seg = seg_alloc();
+            s->next = dbgsect;
+            dbgsect = s;
+            fprintf(ofile, "%s %s (%s) pass %"PRId64" (%s) : returning %d\n",
+                    whatwecallit, name, tail, pass_count(), pass_type_name(), seg);
+
+            if (section_labels)
+                backend_label(s->name, s->number + 1, 0);
+        }
+    }
+    return seg;
+}
+
+static int32_t dbg_section_names(char *name, int *bits)
+{
+    return dbg_add_section(name, bits, "section_names");
+}
+
+static int32_t dbg_herelabel(const char *name, enum label_type type,
+                             int32_t oldseg, int32_t *subsection,
+                             bool *copyoffset)
+{
+    int32_t newseg = oldseg;
+
+    if (subsections_via_symbols && type != LBL_LOCAL) {
+        newseg = *subsection;
+        if (newseg == NO_SEG) {
+            newseg = *subsection = seg_alloc();
+            *copyoffset = true; /* Minic MachO for now */
+        }
+    }
+    fprintf(ofile, "herelabel %s type %d (seg %08x) -> %08x\n",
+            name, type, oldseg, newseg);
+
+    return newseg;
+}
+
+static void dbg_deflabel(char *name, int32_t segment, int64_t offset,
+                         int is_global, char *special)
+{
+    fprintf(ofile, "deflabel %s := %08"PRIx32":%016"PRIx64" %s (%d)%s%s\n",
+            name, segment, offset,
+            is_global == 2 ? "common" : is_global ? "global" : "local",
+            is_global, special ? ": " : "", special);
+}
+
+static const char *out_type(enum out_type type)
+{
+    static const char *out_types = {
+        "rawdata",
+        "reserve",
+        "zerodata",
+        "address",
+        "reladdr",
+        "segment"
+    };
+    static char invalid_buf64;
+
+    if (type >= sizeof(out_types)/sizeof(out_types0)) {
+        sprintf(invalid_buf, "invalid type %d", type);
+        return invalid_buf;
+    }
+
+    return out_typestype;
+}
+
+static const char *out_flags(enum out_flags flags)
+{
+    static const char *out_flags = {
+        "signed",
+        "unsigned"
+    };
+    static char flags_buf1024;
+    unsigned long flv = flags;
+    size_t n;
+    size_t left = sizeof flags_buf - 1;
+    char *p = flags_buf;
+    unsigned int i;
+
+    for (i = 0; flv; flv >>= 1, i++) {
+        if (flv & 1) {
+            if (i < ARRAY_SIZE(out_flags))
+                n = snprintf(p, left, "%s,", out_flagsi);
+            else
+                n = snprintf(p, left, "%u,", i);
+            if (n >= left)
+                break;
+            left -= n;
+            p += n;
+        }
+    }
+    if (p > flags_buf)
+        p--;                    /* Delete final comma */
+    *p = '\0';
+
+    return flags_buf;
+}
+
+static void dbg_out(const struct out_data *data)
+{
+    fprintf(ofile,
+            "out to %"PRIx32":%"PRIx64" %s(%s) bits %d insoffs %d/%d "
+            "size %"PRIu64,
+            data->segment, data->offset,
+            out_type(data->type), out_flags(data->flags),
+            data->bits, data->insoffs, data->inslen, data->size);
+    if (data->itemp) {
+        fprintf(ofile, " ins %s(%d)",
+                nasm_insn_namesdata->itemp->opcode, data->itemp->operands);
+    } else {
+        fprintf(ofile, " no ins (plain data)");
+    }
+
+    if (data->type == OUT_ADDRESS || data->type == OUT_RELADDR ||
+        data->type == OUT_SEGMENT) {
+        fprintf(ofile, " target %"PRIx32":%"PRIx64,
+                data->tsegment, data->toffset);
+        if (data->twrt != NO_SEG)
+            fprintf(ofile, " wrt %"PRIx32, data->twrt);
+    }
+    if (data->type == OUT_RELADDR)
+        fprintf(ofile, " relbase %"PRIx64, data->relbase);
+
+    putc('\n', ofile);
+
+    if (data->type == OUT_RAWDATA) {
+        if ((size_t)data->size != data->size) {
+            fprintf(ofile, "  data: <error: impossible size>\n");
+        } else if (!data->data) {
+            fprintf(ofile, "  data: <error: null pointer>\n");
+        } else if (dbg_max_data_dump != -1UL &&
+                   data->size > dbg_max_data_dump) {
+            fprintf(ofile, "  data: <%"PRIu64" bytes>\n", data->size);
+        } else {
+            size_t i, j;
+            const uint8_t *bytes = data->data;
+            for (i = 0; i < data->size; i += 16) {
+                fprintf(ofile, "  data:");
+                for (j = 0; j < 16; j++) {
+                    if (i+j >= data->size)
+                        fprintf(ofile, "   ");
+                    else
+                        fprintf(ofile, "%c%02x",
+                                (j == 8) ? '-' : ' ', bytesi+j);
+                }
+                fprintf(ofile,"    ");
+                for (j = 0; j < 16; j++) {
+                    if (i+j >= data->size) {
+                        putc(' ', ofile);
+                    } else {
+                        if (bytesi+j >= 32 && bytesi+j <= 126)
+                            putc(bytesi+j, ofile);
+                        else
+                            putc('.', ofile);
+                    }
+                }
+                putc('\n', ofile);
+            }
+        }
+    }
+
+    /* This is probably the only place were we'll call this this way... */
+    nasm_do_legacy_output(data);
+}
+
+static void dbg_legacy_out(int32_t segto, const void *data,
+                           enum out_type type, uint64_t size,
+                           int32_t segment, int32_t wrt)
+{
+    int32_t ldata;
+
+    if (type == OUT_ADDRESS)
+        fprintf(ofile, "  legacy: out to %"PRIx32", len = %d: ",
+                segto, (int)abs((int)size));
+    else
+        fprintf(ofile, "  legacy: out to %"PRIx32", len = %"PRId64" (0x%"PRIx64"): ",
+                segto, (int64_t)size, size);
+
+    switch (type) {
+    case OUT_RESERVE:
+        fprintf(ofile, "reserved.\n");
+        break;
+    case OUT_RAWDATA:
+        fprintf(ofile, "rawdata\n"); /* Already have a data dump */
+        break;
+    case OUT_ADDRESS:
+	ldata = *(int64_t *)data;
+        fprintf(ofile, "addr %08"PRIx32" (seg %08"PRIx32", wrt %08"PRIx32")\n",
+                ldata, segment, wrt);
+        break;
+    case OUT_REL1ADR:
+        fprintf(ofile, "rel1adr %02"PRIx8" (seg %08"PRIx32")\n",
+		(uint8_t)*(int64_t *)data, segment);
+        break;
+    case OUT_REL2ADR:
+        fprintf(ofile, "rel2adr %04"PRIx16" (seg %08"PRIx32")\n",
+		(uint16_t)*(int64_t *)data, segment);
+        break;
+    case OUT_REL4ADR:
+        fprintf(ofile, "rel4adr %08"PRIx32" (seg %08"PRIx32")\n",
+		(uint32_t)*(int64_t *)data,
+                segment);
+        break;
+    case OUT_REL8ADR:
+        fprintf(ofile, "rel8adr %016"PRIx64" (seg %08"PRIx32")\n",
+		(uint64_t)*(int64_t *)data, segment);
+        break;
+    default:
+        fprintf(ofile, "unknown\n");
+        break;
+    }
+}
+
+static void dbg_sectalign(int32_t seg, unsigned int value)
+{
+    fprintf(ofile, "set alignment (%d) for segment (%u)\n",
+            seg, value);
+}
+
+static enum directive_result
+dbg_directive(enum directive directive, char *value)
+{
+    switch (directive) {
+        /*
+         * The .obj GROUP directive is nontrivial to emulate in a macro.
+         * It effectively creates a "pseudo-section" containing the first
+         * space-separated argument; the rest we ignore.
+         */
+    case D_GROUP:
+    {
+        int dummy;
+        dbg_add_section(value, &dummy, "directive:group");
+        break;
+    }
+
+    default:
+        break;
+    }
+
+    fprintf(ofile, "directive %s value %s pass %"PRId64" (%s)\n",
+            directive_dname(directive), value, pass_count(), pass_type_name());
+    return DIRR_OK;
+}
+
+static enum directive_result
+dbg_pragma(const struct pragma *pragma);
+
+static const struct pragma_facility dbg_pragma_list = {
+    { NULL, dbg_pragma }
+};
+
+static enum directive_result
+dbg_pragma(const struct pragma *pragma)
+{
+    fprintf(ofile, "pragma %s(%s) %s%s %s\n",
+            pragma->facility_name,
+            pragma->facility->name ? pragma->facility->name : "<default>",
+            pragma->opname, directive_dname(pragma->opcode),
+            pragma->tail);
+
+    if (pragma->facility == &dbg_pragma_list0) {
+        switch (pragma->opcode) {
+        case D_MAXDUMP:
+            if (!nasm_stricmp(pragma->tail, "unlimited")) {
+                dbg_max_data_dump = -1UL;
+            } else {
+                char *ep;
+                unsigned long arg;
+
+                errno = 0;
+                arg = strtoul(pragma->tail, &ep, 0);
+                if (errno || *nasm_skip_spaces(ep)) {
+                    nasm_warn(WARN_PRAGMA_BAD | ERR_PASS2,
+                               "invalid %%pragma dbg maxdump argument");
+                    return DIRR_ERROR;
+                } else {
+                    dbg_max_data_dump = arg;
+                }
+            }
+            break;
+        case D_NOSECLABELS:
+            section_labels = false;
+            break;
+        case D_SUBSECTIONS_VIA_SYMBOLS:
+            subsections_via_symbols = true;
+            break;
+        default:
+            break;
+        }
+    }
+    return DIRR_OK;
+}
+
+static const char * const types = {
+    "unknown", "label", "byte", "word", "dword", "float", "qword", "tbyte"
+};
+static void dbgdbg_init(void)
+{
+    fprintf(ofile, "dbg init: debug information enabled\n");
+}
+static void dbgdbg_cleanup(void)
+{
+    fprintf(ofile, "dbg cleanup: called\n");
+}
+
+static void dbgdbg_linnum(const char *lnfname, int32_t lineno, int32_t segto)
+{
+    fprintf(ofile, "dbg linenum: %s(%"PRId32") segment %"PRIx32"\n",
+	    lnfname, lineno, segto);
+}
+static void dbgdbg_deflabel(char *name, int32_t segment,
+                            int64_t offset, int is_global, char *special)
+{
+    fprintf(ofile, "dbg deflabel: %s = %08"PRIx32":%016"PRIx64" %s (%d)%s%s\n",
+            name,
+            segment, offset,
+            is_global == 2 ? "common" : is_global ? "global" : "local",
+            is_global, special ? ": " : "", special);
+}
+
+static void dbgdbg_debug_smacros(bool define, const char *def)
+{
+    fprintf(ofile, "dbg define: %s %s\n",
+            define ? "define " : "undef ", def);
+}
+static void dbgdbg_debug_include(bool start, struct src_location outer,
+                                 struct src_location inner)
+{
+    fprintf(ofile, "dbg include: %s include: %s:%"PRId32" %s %s:%"PRId32"\n",
+            start ? "start" : "end", outer.filename, outer.lineno,
+            start ? "->" : "<-", inner.filename, inner.lineno);
+}
+
+static void dbgdbg_output(int output_type, void *param)
+{
+    (void)output_type;
+    (void)param;
+    fprintf(ofile, "dbg output: called\n");
+}
+static void dbgdbg_typevalue(int32_t type)
+{
+    fprintf(ofile, "dbg typevalue: %s(%"PRIX32")\n",
+            typesTYM_TYPE(type) >> 3, TYM_ELEMENTS(type));
+}
+
+static void
+write_macro_inv_list(const struct debug_macro_inv *inv, int level)
+{
+    int indent = (level+1) << 1;
+
+    while (inv) {
+        const struct rbtree *rb;
+
+        fprintf(ofile, "%*smacro: %s, invoked at %s:%"PRId32
+                ", %"PRIu32" ranges\n",
+                indent, "", inv->def->name, inv->where.filename,
+                inv->where.lineno, inv->naddr);
+
+        for (rb = rb_first(inv->addr.tree); rb; rb = rb_next(rb)) {
+            const struct debug_macro_addr *addr =
+                (const struct debug_macro_addr *)rb;
+            if (!addr->len) {
+                fprintf(ofile, "%*s%08"PRIx32": empty\n",
+                        indent+2, "", debug_macro_seg(addr));
+            } else {
+                fprintf(ofile,
+                        "%*s%08"PRIx32":%016"PRIx64" ... %016"PRIx64" "
+                        "len %"PRIu64"\n",
+                        indent+2, "",
+                        debug_macro_seg(addr), addr->start,
+                        addr->start + addr->len - 1, addr->len);
+            }
+        }
+
+        write_macro_inv_list(inv->down.l, level+1);
+        inv = inv->next;
+    }
+}
+
+static void dbgdbg_debug_mmacros(const struct debug_macro_info *dmi)
+{
+    const struct debug_macro_def *def;
+
+    fprintf(ofile, "dbg macros: %llu macros defined\n",
+            (unsigned long long)dmi->def.n);
+
+    fprintf(ofile, "  macro definitions:\n");
+    list_for_each(def, dmi->def.l) {
+        fprintf(ofile, "    macro: %s, count %llu, defined at %s:%"PRId32"\n",
+                def->name, (unsigned long long)def->ninv,
+                def->where.filename, def->where.lineno);
+    }
+
+    fprintf(ofile, "  macro invocations:\n");
+    write_macro_inv_list(dmi->inv.l, 1);
+
+    fprintf(ofile, "  end macro debug information\n");
+}
+
+static void dbgdbg_debug_directive(const char *id, const char *value)
+{
+    fprintf(ofile, "dbg directive: id %s value %s pass %"PRId64" (%s)\n",
+            id, value, pass_count(), pass_type_name());
+}
+
+
+static const struct pragma_facility dbgdbg_pragma_list = {
+    { "dbgdbg", dbg_pragma },
+    { NULL, dbg_pragma }        /* Won't trigger, "debug" is a reserved ns */
+};
+
+static const struct dfmt debug_debug_form = {
+    "Trace of all info passed to debug stage",
+    "debug",
+    dbgdbg_init,
+    dbgdbg_linnum,
+    dbgdbg_deflabel,
+    dbgdbg_debug_smacros,
+    dbgdbg_debug_include,
+    dbgdbg_debug_mmacros,
+    dbgdbg_debug_directive,
+    dbgdbg_typevalue,
+    dbgdbg_output,
+    dbgdbg_cleanup,
+    dbgdbg_pragma_list
+};
+
+static const struct dfmt * const debug_debug_arr3 = {
+    &debug_debug_form,
+    &null_debug_form,
+    NULL
+};
+
+extern macros_t dbg_stdmac;
+
+const struct ofmt of_dbg = {
+    "Trace of all info passed to output stage",
+    "dbg",
+    ".dbg",
+    OFMT_TEXT|OFMT_KEEP_ADDR,
+    64,
+    debug_debug_arr,
+    &debug_debug_form,
+    dbg_stdmac,
+    dbg_init,
+    dbg_reset,
+    dbg_out,
+    dbg_legacy_out,
+    dbg_deflabel,
+    dbg_section_names,
+    dbg_herelabel,
+    dbg_sectalign,
+    null_segbase,
+    dbg_directive,
+    dbg_cleanup,
+    dbg_pragma_list
+};
+
+#endif                          /* OF_DBG */

_service:tar_scm:nasm-2.16.03.tar.xz/output/outdbg.mac Added

@@ -0,0 +1,56 @@
+;; --------------------------------------------------------------------------
+;;
+;;   Copyright 1996-2017 The NASM Authors - All Rights Reserved
+;;   See the file AUTHORS included with the NASM distribution for
+;;   the specific copyright holders.
+;;
+;;   Redistribution and use in source and binary forms, with or without
+;;   modification, are permitted provided that the following
+;;   conditions are met:
+;;
+;;   * Redistributions of source code must retain the above copyright
+;;     notice, this list of conditions and the following disclaimer.
+;;   * Redistributions in binary form must reproduce the above
+;;     copyright notice, this list of conditions and the following
+;;     disclaimer in the documentation and/or other materials provided
+;;     with the distribution.
+;;
+;;     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+;;     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+;;     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+;;     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;;     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+;;     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;;     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+;;     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+;;     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+;;     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+;;     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+;;     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;;     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+;; --------------------------------------------------------------------------
+
+;
+; Define a few macros which lets the dbg format process files intended
+; for the .obj and .bin formats.
+;
+OUT: dbg
+%define __?SECT?__ section .text
+%imacro group 1+.nolist
+group %1
+%endmacro
+%imacro uppercase 0+.nolist
+ %pragma dbg uppercase %1
+%endmacro
+%imacro export 1+.nolist
+ %pragma dbg export %1
+%endmacro
+%imacro import 1+.nolist
+ %pragma dbg import %1
+%endmacro
+%imacro org 1+.nolist
+ %pragma dbg org %1
+%endmacro
+%macro __?NASM_CDecl?__ 1
+%endmacro

_service:tar_scm:nasm-2.16.03.tar.xz/output/outelf.c Added

@@ -0,0 +1,3672 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2022 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * Common code for outelf32 and outelf64
+ */
+
+#include "compiler.h"
+
+
+#include "nasm.h"
+#include "nasmlib.h"
+#include "error.h"
+#include "saa.h"
+#include "raa.h"
+#include "stdscan.h"
+#include "eval.h"
+#include "outform.h"
+#include "outlib.h"
+#include "rbtree.h"
+#include "hashtbl.h"
+#include "ver.h"
+
+#include "dwarf.h"
+#include "stabs.h"
+#include "outelf.h"
+#include "elf.h"
+
+#if defined(OF_ELF32) || defined(OF_ELF64) || defined(OF_ELFX32)
+
+#define SECT_DELTA 32
+static struct elf_section **sects;
+static int nsects, sectlen;
+
+#define SHSTR_DELTA 256
+static char *shstrtab;
+static int shstrtablen, shstrtabsize;
+
+static struct SAA *syms;
+static uint32_t nlocals, nglobs, ndebugs; /* Symbol counts */
+
+static int32_t def_seg;
+
+static struct RAA *bsym;
+
+static struct SAA *symtab, *symtab_shndx;
+
+static struct SAA *strs;
+static uint32_t strslen;
+
+static struct RAA *section_by_index;
+static struct hash_table section_by_name;
+
+static struct elf_symbol *fwds;
+
+static char elf_moduleFILENAME_MAX;
+static char elf_dirFILENAME_MAX;
+
+extern const struct ofmt of_elf32;
+extern const struct ofmt of_elf64;
+extern const struct ofmt of_elfx32;
+
+static struct ELF_SECTDATA {
+    void                *data;
+    int64_t             len;
+    bool                is_saa;
+} *elf_sects;
+
+static int elf_nsect, nsections;
+static int64_t elf_foffs;
+
+static void elf_write(void);
+static void elf_sect_write(struct elf_section *, const void *, size_t);
+static void elf_sect_writeaddr(struct elf_section *, int64_t, size_t);
+static void elf_section_header(int name, int type, uint64_t flags,
+                               void *data, bool is_saa, uint64_t datalen,
+                               int link, int info,
+                               uint64_t align, uint64_t entsize);
+static void elf_write_sections(void);
+static size_t elf_build_symtab(void);
+static int add_sectname(const char *, const char *);
+
+/* First debugging section index */
+static int sec_debug;
+
+struct symlininfo {
+    int                 offset;
+    int                 section;        /* index into sects */
+    int                 segto;          /* internal section number */
+    char                *name;          /* shallow-copied pointer of section name */
+};
+
+struct linelist {
+    struct linelist     *next;
+    struct linelist     *last;
+    struct symlininfo   info;
+    char                *filename;
+    int                 line;
+};
+
+struct sectlist {
+    struct SAA          *psaa;
+    int                 section;
+    int                 line;
+    int                 offset;
+    int                 file;
+    struct sectlist     *next;
+    struct sectlist     *last;
+};
+
+/* common debug variables */
+static int currentline = 1;
+static int debug_immcall = 0;
+
+/* stabs debug variables */
+static struct linelist *stabslines = 0;
+static int numlinestabs = 0;
+static char *stabs_filename = 0;
+static uint8_t *stabbuf = 0, *stabstrbuf = 0, *stabrelbuf = 0;
+static int stablen, stabstrlen, stabrellen;
+
+/* dwarf debug variables */
+static struct linelist *dwarf_flist = 0, *dwarf_clist = 0, *dwarf_elist = 0;
+static struct sectlist *dwarf_fsect = 0, *dwarf_csect = 0, *dwarf_esect = 0;
+static int dwarf_numfiles = 0, dwarf_nsections;
+static uint8_t *arangesbuf = 0, *arangesrelbuf = 0, *pubnamesbuf = 0, *infobuf = 0,  *inforelbuf = 0,
+               *abbrevbuf = 0, *linebuf = 0, *linerelbuf = 0, *framebuf = 0, *locbuf = 0;
+static int8_t line_base = -5, line_range = 14, opcode_base = 13;
+static int arangeslen, arangesrellen, pubnameslen, infolen, inforellen,
+           abbrevlen, linelen, linerellen, framelen, loclen;
+static int64_t dwarf_infosym, dwarf_abbrevsym, dwarf_linesym;
+
+static struct elf_symbol *lastsym;
+
+/* common debugging routines */
+static void debug_typevalue(int32_t);
+
+/* stabs debugging routines */
+static void stabs_linenum(const char *filename, int32_t linenumber, int32_t);
+static void stabs_output(int, void *);
+static void stabs_generate(void);
+static void stabs_cleanup(void);
+
+/* dwarf debugging routines */
+
+/* This should match the order in elf_write() */
+enum dwarf_sect {
+    DWARF_ARANGES,
+    DWARF_RELA_ARANGES,
+    DWARF_PUBNAMES,
+    DWARF_INFO,
+    DWARF_RELA_INFO,
+    DWARF_ABBREV,
+    DWARF_LINE,
+    DWARF_RELA_LINE,
+    DWARF_FRAME,
+    DWARF_LOC,
+    DWARF_NSECT
+};
+
+struct dwarf_format {
+    uint16_t dwarf_version;
+    uint16_t sect_versionDWARF_NSECT;
+    /* ... add more here to generalize further */
+};
+const struct dwarf_format *dwfmt;
+
+static void dwarf32_init(void);
+static void dwarfx32_init(void);
+static void dwarf64_init(void);
+static void dwarf_linenum(const char *filename, int32_t linenumber, int32_t);
+static void dwarf_output(int, void *);
+static void dwarf_generate(void);
+static void dwarf_cleanup(void);
+static void dwarf_findfile(const char *);
+static void dwarf_findsect(const int);
+
+struct elf_format_info {
+    size_t word;                /* Word size (4 or 8) */
+    size_t ehdr_size;           /* Size of the ELF header */
+    size_t shdr_size;           /* Size of a section header */
+    size_t sym_size;            /* Size of a symbol */
+    size_t relsize;             /* Size of a reltype relocation */
+    char relpfx8;             /* Relocation section prefix */
+    uint32_t reltype;           /* Relocation section type */
+    uint16_t e_machine;         /* Header e_machine field */
+    uint8_t ei_class;           /* ELFCLASS32 or ELFCLASS64 */
+    bool elf64;                 /* 64-bit ELF */
+
+    /* Write a symbol */
+    void (*elf_sym)(const struct elf_symbol *);
+
+    /* Build a relocation table */
+    struct SAA *(*elf_build_reltab)(const struct elf_reloc *);
+};
+static const struct elf_format_info *efmt;
+
+static void elf32_sym(const struct elf_symbol *sym);
+static void elf64_sym(const struct elf_symbol *sym);
+
+static struct SAA *elf32_build_reltab(const struct elf_reloc *r);
+static struct SAA *elfx32_build_reltab(const struct elf_reloc *r);
+static struct SAA *elf64_build_reltab(const struct elf_reloc *r);
+
+static bool dfmt_is_stabs(void);
+static bool dfmt_is_dwarf(void);
+
+/*
+ * Special NASM section numbers which are used to define ELF special
+ * symbols.
+ */
+static int32_t elf_gotpc_sect, elf_gotoff_sect;
+static int32_t elf_got_sect, elf_plt_sect;
+static int32_t elf_sym_sect, elf_gottpoff_sect, elf_tlsie_sect;
+
+uint8_t elf_osabi = 0;      /* Default OSABI = 0 (System V or Linux) */
+uint8_t elf_abiver = 0;     /* Current ABI version */
+
+/* Known sections with nonstandard defaults. -n means n*pointer size. */
+struct elf_known_section {
+    const char *name;   /* Name of section */
+    int type;           /* Section type (SHT_) */
+    uint32_t flags;     /* Section flags (SHF_) */
+    int align;          /* Section alignment */
+    int entsize;	/* Entry size, if applicable */
+};
+
+static const struct elf_known_section elf_known_sections = {
+    { ".text",          SHT_PROGBITS,      SHF_ALLOC|SHF_EXECINSTR,     16,  0 },
+    { ".rodata",        SHT_PROGBITS,      SHF_ALLOC,                    4,  0 },
+    { ".lrodata",       SHT_PROGBITS,      SHF_ALLOC,                    4,  0 },
+    { ".data",          SHT_PROGBITS,      SHF_ALLOC|SHF_WRITE,          4,  0 },
+    { ".ldata",         SHT_PROGBITS,      SHF_ALLOC|SHF_WRITE,          4,  0 },
+    { ".bss",           SHT_NOBITS,        SHF_ALLOC|SHF_WRITE,          4,  0 },
+    { ".lbss",          SHT_NOBITS,        SHF_ALLOC|SHF_WRITE,          4,  0 },
+    { ".tdata",         SHT_PROGBITS,      SHF_ALLOC|SHF_WRITE|SHF_TLS,  4,  0 },
+    { ".tbss",          SHT_NOBITS,        SHF_ALLOC|SHF_WRITE|SHF_TLS,  4,  0 },
+    { ".comment",       SHT_PROGBITS,      0,                            1,  0 },
+    { ".preinit_array", SHT_PREINIT_ARRAY, SHF_ALLOC,                   -1, -1 },
+    { ".init_array",    SHT_INIT_ARRAY,    SHF_ALLOC,                   -1, -1 },
+    { ".fini_array",    SHT_FINI_ARRAY,    SHF_ALLOC,                   -1, -1 },
+    { ".note",          SHT_NOTE,          0,                            4,  0 },
+    { NULL /*default*/, SHT_PROGBITS,      SHF_ALLOC,                    1,  0 }
+};
+
+struct size_unit {
+    char name8;
+    int bytes;
+    int align;
+};
+static const struct size_unit size_units =
+{
+    { "byte",     1,  1 },
+    { "word",     2,  2 },
+    { "dword",    4,  4 },
+    { "qword",    8,  8 },
+    { "tword",   10,  2 },
+    { "tbyte",   10,  2 },
+    { "oword",   16, 16 },
+    { "xword",   16, 16 },
+    { "yword",   32, 32 },
+    { "zword",   64, 64 },
+    { "pointer", -1, -1 },
+    { "",         0,  0 }
+};
+
+static inline size_t to_bytes(int val)
+{
+    return (val >= 0) ? (size_t)val : -val * efmt->word;
+}
+
+/* parse section attributes */
+static void elf_section_attrib(char *name, char *attr, uint32_t *flags_and, uint32_t *flags_or,
+                               uint64_t *alignp, uint64_t *entsize, int *type)
+{
+    char *opt, *val, *next;
+    uint64_t align = 0;
+    uint64_t xalign = 0;
+
+    opt = nasm_skip_spaces(attr);
+    if (!opt || !*opt)
+        return;
+
+    while ((opt = nasm_opt_val(opt, &val, &next))) {
+        if (!nasm_stricmp(opt, "align")) {
+            if (!val) {
+                nasm_nonfatal("section align without value specified");
+            } else {
+                bool err;
+                uint64_t a = readnum(val, &err);
+                if (a && !is_power2(a)) {
+                    nasm_error(ERR_NONFATAL,
+                               "section alignment %"PRId64" is not a power of two",
+                               a);
+                } else if (a > align) {
+                    align = a;
+                }
+            }
+        } else if (!nasm_stricmp(opt, "alloc")) {
+            *flags_and  |= SHF_ALLOC;
+            *flags_or   |= SHF_ALLOC;
+        } else if (!nasm_stricmp(opt, "noalloc")) {
+            *flags_and  |= SHF_ALLOC;
+            *flags_or   &= ~SHF_ALLOC;
+        } else if (!nasm_stricmp(opt, "exec")) {
+            *flags_and  |= SHF_EXECINSTR;
+            *flags_or   |= SHF_EXECINSTR;
+        } else if (!nasm_stricmp(opt, "noexec")) {
+            *flags_and  |= SHF_EXECINSTR;
+            *flags_or   &= ~SHF_EXECINSTR;
+        } else if (!nasm_stricmp(opt, "write")) {
+            *flags_and  |= SHF_WRITE;
+            *flags_or   |= SHF_WRITE;
+        } else if (!nasm_stricmp(opt, "nowrite") ||
+		   !nasm_stricmp(opt, "readonly")) {
+            *flags_and  |= SHF_WRITE;
+            *flags_or   &= ~SHF_WRITE;
+        } else if (!nasm_stricmp(opt, "tls")) {
+            *flags_and  |= SHF_TLS;
+            *flags_or   |= SHF_TLS;
+        } else if (!nasm_stricmp(opt, "notls")) {
+            *flags_and  |= SHF_TLS;
+            *flags_or   &= ~SHF_TLS;
+        } else if (!nasm_stricmp(opt, "merge")) {
+            *flags_and  |= SHF_MERGE;
+            *flags_or   |= SHF_MERGE;
+        } else if (!nasm_stricmp(opt, "nomerge")) {
+            *flags_and  |= SHF_MERGE;
+            *flags_or   &= ~SHF_MERGE;
+        } else if (!nasm_stricmp(opt, "strings")) {
+            *flags_and  |= SHF_STRINGS;
+            *flags_or   |= SHF_STRINGS;
+        } else if (!nasm_stricmp(opt, "nostrings")) {
+            *flags_and  |= SHF_STRINGS;
+            *flags_or   &= ~SHF_STRINGS;
+        } else if (!nasm_stricmp(opt, "progbits")) {
+            *type = SHT_PROGBITS;
+        } else if (!nasm_stricmp(opt, "nobits")) {
+            *type = SHT_NOBITS;
+        } else if (!nasm_stricmp(opt, "note")) {
+            *type = SHT_NOTE;
+	} else if (!nasm_stricmp(opt, "preinit_array")) {
+	    *type = SHT_PREINIT_ARRAY;
+	} else if (!nasm_stricmp(opt, "init_array")) {
+	    *type = SHT_INIT_ARRAY;
+	} else if (!nasm_stricmp(opt, "fini_array")) {
+	    *type = SHT_FINI_ARRAY;
+        } else {
+	    uint64_t mult;
+	    size_t l;
+	    const char *a = strchr(opt, '*');
+	    bool err;
+	    const struct size_unit *su;
+
+	    if (a) {
+		l = a - opt - 1;
+		mult = readnum(a+1, &err);
+	    } else {
+		l = strlen(opt);
+		mult = 1;
+	    }
+
+	    for (su = size_units; su->bytes; su++) {
+		if (!nasm_strnicmp(opt, su->name, l))
+		    break;
+	    }
+
+	    if (su->bytes) {
+		*entsize = to_bytes(su->bytes) * mult;
+		xalign = to_bytes(su->align);
+	    } else {
+		/* Unknown attribute */
+		nasm_warn(WARN_OTHER,
+			   "unknown section attribute '%s' ignored on"
+			   " declaration of section `%s'", opt, name);
+	    }
+         }
+        opt = next;
+    }
+
+    switch (*type) {
+    case SHT_PREINIT_ARRAY:
+    case SHT_INIT_ARRAY:
+    case SHT_FINI_ARRAY:
+	if (!xalign)
+	    xalign = efmt->word;
+	if (!*entsize)
+	    *entsize = efmt->word;
+	break;
+    default:
+	break;
+    }
+
+    if (!align)
+        align = xalign;
+    if (!align)
+	align = SHA_ANY;
+
+    *alignp = align;
+}
+
+static enum directive_result
+elf_directive(enum directive directive, char *value)
+{
+    int64_t n;
+    bool err;
+    char *p;
+
+    switch (directive) {
+    case D_OSABI:
+        if (!pass_first())      /* XXX: Why? */
+            return DIRR_OK;
+
+        n = readnum(value, &err);
+        if (err) {
+            nasm_nonfatal("`osabi' directive requires a parameter");
+            return DIRR_ERROR;
+        }
+
+        if (n < 0 || n > 255) {
+            nasm_nonfatal("valid osabi numbers are 0 to 255");
+            return DIRR_ERROR;
+        }
+
+        elf_osabi  = n;
+        elf_abiver = 0;
+
+        p = strchr(value,',');
+        if (!p)
+            return DIRR_OK;
+
+        n = readnum(p + 1, &err);
+        if (err || n < 0 || n > 255) {
+            nasm_nonfatal("invalid ABI version number (valid: 0 to 255)");
+            return DIRR_ERROR;
+        }
+
+        elf_abiver = n;
+        return DIRR_OK;
+
+    default:
+        return DIRR_UNKNOWN;
+    }
+}
+
+static void elf_init(void);
+
+static void elf32_init(void)
+{
+    static const struct elf_format_info ef_elf32 = {
+        4,
+        sizeof(Elf32_Ehdr),
+        sizeof(Elf32_Shdr),
+        sizeof(Elf32_Sym),
+        sizeof(Elf32_Rel),
+        ".rel",
+        SHT_REL,
+        EM_386,
+        ELFCLASS32,
+        false,
+
+        elf32_sym,
+        elf32_build_reltab
+    };
+    efmt = &ef_elf32;
+    elf_init();
+}
+
+static void elfx32_init(void)
+{
+    static const struct elf_format_info ef_elfx32 = {
+        4,
+        sizeof(Elf32_Ehdr),
+        sizeof(Elf32_Shdr),
+        sizeof(Elf32_Sym),
+        sizeof(Elf32_Rela),
+        ".rela",
+        SHT_RELA,
+        EM_X86_64,
+        ELFCLASS32,
+        false,
+
+        elf32_sym,
+        elfx32_build_reltab
+    };
+    efmt = &ef_elfx32;
+    elf_init();
+}
+
+static void elf64_init(void)
+{
+    static const struct elf_format_info ef_elf64 = {
+        8,
+        sizeof(Elf64_Ehdr),
+        sizeof(Elf64_Shdr),
+        sizeof(Elf64_Sym),
+        sizeof(Elf64_Rela),
+        ".rela",
+        SHT_RELA,
+        EM_X86_64,
+        ELFCLASS64,
+        true,
+
+        elf64_sym,
+        elf64_build_reltab
+    };
+    efmt = &ef_elf64;
+    elf_init();
+}
+
+static void elf_init(void)
+{
+    static const char * const reserved_sections = {
+        ".shstrtab", ".strtab", ".symtab", ".symtab_shndx", NULL
+    };
+    const char * const *p;
+    const char * cur_path = nasm_realpath(inname);
+
+    strlcpy(elf_module, inname, sizeof(elf_module));
+    strlcpy(elf_dir, nasm_dirname(cur_path), sizeof(elf_dir));
+    sects = NULL;
+    nsects = sectlen = 0;
+    syms = saa_init((int32_t)sizeof(struct elf_symbol));
+    nlocals = nglobs = ndebugs = 0;
+    bsym = raa_init();
+    strs = saa_init(1L);
+    saa_wbytes(strs, "\0", 1L);
+    saa_wbytes(strs, elf_module, strlen(elf_module)+1);
+    strslen = 2 + strlen(elf_module);
+    shstrtab = NULL;
+    shstrtablen = shstrtabsize = 0;;
+    add_sectname("", "");       /* SHN_UNDEF */
+
+    fwds = NULL;
+
+    section_by_index = raa_init();
+
+    /*
+     * Add reserved section names to the section hash, with NULL
+     * as the data pointer
+     */
+    for (p = reserved_sections; *p; p++) {
+        struct hash_insert hi;
+        hash_find(&section_by_name, *p, &hi);
+        hash_add(&hi, *p, NULL);
+    }
+
+    /*
+     * FIXME: tlsie is Elf32 only and
+     * gottpoff is Elfx32|64 only.
+     */
+    elf_gotpc_sect = seg_alloc();
+    backend_label("..gotpc", elf_gotpc_sect + 1, 0L);
+    elf_gotoff_sect = seg_alloc();
+    backend_label("..gotoff", elf_gotoff_sect + 1, 0L);
+    elf_got_sect = seg_alloc();
+    backend_label("..got", elf_got_sect + 1, 0L);
+    elf_plt_sect = seg_alloc();
+    backend_label("..plt", elf_plt_sect + 1, 0L);
+    elf_sym_sect = seg_alloc();
+    backend_label("..sym", elf_sym_sect + 1, 0L);
+    elf_gottpoff_sect = seg_alloc();
+    backend_label("..gottpoff", elf_gottpoff_sect + 1, 0L);
+    elf_tlsie_sect = seg_alloc();
+    backend_label("..tlsie", elf_tlsie_sect + 1, 0L);
+
+    def_seg = seg_alloc();
+}
+
+static void elf_cleanup(void)
+{
+    struct elf_reloc *r;
+    int i;
+
+    elf_write();
+    for (i = 0; i < nsects; i++) {
+        if (sectsi->type != SHT_NOBITS)
+            saa_free(sectsi->data);
+        if (sectsi->rel)
+            saa_free(sectsi->rel);
+        while (sectsi->head) {
+            r = sectsi->head;
+            sectsi->head = sectsi->head->next;
+            nasm_free(r);
+        }
+    }
+    hash_free(&section_by_name);
+    raa_free(section_by_index);
+    nasm_free(sects);
+    saa_free(syms);
+    raa_free(bsym);
+    saa_free(strs);
+    dfmt->cleanup();
+}
+
+/*
+ * Add entry to the elf .shstrtab section and increment nsections.
+ * Returns the section index for this new section.
+ *
+ * IMPORTANT: this needs to match the order the section headers are
+ * emitted.
+ */
+static int add_sectname(const char *firsthalf, const char *secondhalf)
+{
+    int l1 = strlen(firsthalf);
+    int l2 = strlen(secondhalf);
+
+    while (shstrtablen + l1 + l2 + 1 > shstrtabsize)
+        shstrtab = nasm_realloc(shstrtab, (shstrtabsize += SHSTR_DELTA));
+
+    memcpy(shstrtab + shstrtablen, firsthalf, l1);
+    shstrtablen += l1;
+    memcpy(shstrtab + shstrtablen, secondhalf, l2+1);
+    shstrtablen += l2 + 1;
+
+    return nsections++;
+}
+
+static struct elf_section *
+elf_make_section(char *name, int type, int flags, uint64_t align)
+{
+    struct elf_section *s;
+
+    s = nasm_zalloc(sizeof(*s));
+
+    if (type != SHT_NOBITS)
+        s->data = saa_init(1L);
+    s->tail = &s->head;
+    if (!strcmp(name, ".text"))
+        s->index = def_seg;
+    else
+        s->index = seg_alloc();
+
+    s->name     = nasm_strdup(name);
+    s->type     = type;
+    s->flags    = flags;
+    s->align    = align;
+    s->shndx    = add_sectname("", name);
+
+    if (nsects >= sectlen)
+        sects = nasm_realloc(sects, (sectlen += SECT_DELTA) * sizeof(*sects));
+    sectsnsects++ = s;
+
+    return s;
+}
+
+static int32_t elf_section_names(char *name, int *bits)
+{
+    char *p;
+    uint32_t flags, flags_and, flags_or;
+    uint64_t align, entsize;
+    void **hp;
+    struct elf_section *s;
+    struct hash_insert hi;
+    int type;
+
+    if (!name) {
+        *bits = ofmt->maxbits;
+        return def_seg;
+    }
+
+    p = nasm_skip_word(name);
+    if (*p)
+        *p++ = '\0';
+    flags_and = flags_or = type = align = entsize = 0;
+
+    elf_section_attrib(name, p, &flags_and, &flags_or, &align, &entsize, &type);
+
+    hp = hash_find(&section_by_name, name, &hi);
+    if (hp) {
+        s = *hp;
+        if (!s) {
+            nasm_nonfatal("attempt to redefine reserved section name `%s'", name);
+            return NO_SEG;
+        }
+    } else {
+        const struct elf_known_section *ks = elf_known_sections;
+
+        while (ks->name) {
+            if (!strcmp(name, ks->name))
+                break;
+            ks++;
+        }
+
+        type = type ? type : ks->type;
+	if (!align)
+	    align = to_bytes(ks->align);
+	if (!entsize)
+	    entsize = to_bytes(ks->entsize);
+        flags = (ks->flags & ~flags_and) | flags_or;
+
+        s = elf_make_section(name, type, flags, align);
+        hash_add(&hi, s->name, s);
+        section_by_index = raa_write_ptr(section_by_index, s->index >> 1, s);
+    }
+
+    if ((type && s->type != type)
+        || ((s->flags & flags_and) != flags_or)
+        || (entsize && s->entsize && entsize != s->entsize)) {
+        nasm_warn(WARN_OTHER, "incompatible section attributes ignored on"
+                  " redeclaration of section `%s'", name);
+    }
+
+    if (align > s->align)
+        s->align = align;
+
+    if (entsize && !s->entsize)
+        s->entsize = entsize;
+
+    if ((flags_or & SHF_MERGE) && s->entsize == 0) {
+        if (!(s->flags & SHF_STRINGS))
+            nasm_nonfatal("section attribute merge specified without an entry size or `strings'");
+        s->entsize = 1;
+    }
+
+    return s->index;
+}
+
+static inline bool sym_type_local(int type)
+{
+    return ELF32_ST_BIND(type) == STB_LOCAL;
+}
+
+static void elf_deflabel(char *name, int32_t segment, int64_t offset,
+                         int is_global, char *special)
+{
+    int pos = strslen;
+    struct elf_symbol *sym;
+    const char *spcword = nasm_skip_spaces(special);
+    int bind, type;             /* st_info components */
+    const struct elf_section *sec = NULL;
+
+    if (debug_level(2)) {
+        nasm_debug(" elf_deflabel: %s, seg=%"PRIx32", off=%"PRIx64", is_global=%d, %s\n",
+                   name, segment, offset, is_global, special);
+    }
+
+    if (name0 == '.' && name1 == '.' && name2 != '@') {
+        /*
+         * This is a NASM special symbol. We never allow it into
+         * the ELF symbol table, even if it's a valid one. If it
+         * _isn't_ a valid one, we should barf immediately.
+         *
+         * FIXME: tlsie is Elf32 only, and gottpoff is Elfx32|64 only.
+         */
+        if (strcmp(name, "..gotpc") && strcmp(name, "..gotoff") &&
+            strcmp(name, "..got") && strcmp(name, "..plt") &&
+            strcmp(name, "..sym") && strcmp(name, "..gottpoff") &&
+            strcmp(name, "..tlsie"))
+            nasm_nonfatal("unrecognised special symbol `%s'", name);
+        return;
+    }
+
+    if (is_global == 3) {
+        struct elf_symbol **s;
+        /*
+         * Fix up a forward-reference symbol size from the first
+         * pass.
+         */
+        for (s = &fwds; *s; s = &(*s)->nextfwd)
+            if (!strcmp((*s)->name, name)) {
+                struct tokenval tokval;
+                expr *e;
+                char *p = nasm_skip_spaces(nasm_skip_word(special));
+
+                stdscan_reset();
+                stdscan_set(p);
+                tokval.t_type = TOKEN_INVALID;
+                e = evaluate(stdscan, NULL, &tokval, NULL, 1, NULL);
+                if (e) {
+                    if (!is_simple(e))
+                        nasm_nonfatal("cannot use relocatable"
+                                      " expression as symbol size");
+                    else
+                        (*s)->size = reloc_value(e);
+                }
+
+                /*
+                 * Remove it from the list of unresolved sizes.
+                 */
+                nasm_free((*s)->name);
+                *s = (*s)->nextfwd;
+                return;
+            }
+        return;                 /* it wasn't an important one */
+    }
+
+    saa_wbytes(strs, name, (int32_t)(1 + strlen(name)));
+    strslen += 1 + strlen(name);
+
+    lastsym = sym = saa_wstruct(syms);
+
+    memset(&sym->symv, 0, sizeof(struct rbtree));
+
+    sym->strpos = pos;
+    bind = is_global ? STB_GLOBAL : STB_LOCAL;
+    type = STT_NOTYPE;
+    sym->other = STV_DEFAULT;
+    sym->size = 0;
+    if (segment == NO_SEG) {
+        sym->section = XSHN_ABS;
+    } else {
+        sym->section = XSHN_UNDEF;
+        if (segment == def_seg) {
+            /* we have to be sure at least text section is there */
+            int tempint;
+            if (segment != elf_section_names(".text", &tempint))
+                nasm_panic("strange segment conditions in ELF driver");
+        }
+        sec = raa_read_ptr(section_by_index, segment >> 1);
+        if (sec)
+            sym->section = sec->shndx;
+    }
+
+    if (is_global == 2) {
+        sym->size = offset;
+        sym->symv.key = 0;
+        sym->section = XSHN_COMMON;
+        /*
+         * We have a common variable. Check the special text to see
+         * if it's a valid number and power of two; if so, store it
+         * as the alignment for the common variable.
+         *
+         * XXX: this should allow an expression.
+         */
+        if (spcword) {
+            bool err;
+            sym->symv.key = readnum(spcword, &err);
+            if (err)
+                nasm_nonfatal("alignment constraint `%s' is not a"
+                              " valid number", special);
+            else if (!is_power2(sym->symv.key))
+                nasm_nonfatal("alignment constraint `%s' is not a"
+                              " power of two", special);
+            spcword = nasm_skip_spaces(nasm_skip_word(spcword));
+        }
+    } else {
+        sym->symv.key = (sym->section == XSHN_UNDEF ? 0 : offset);
+    }
+
+    if (spcword && *spcword) {
+        const char *wend;
+        bool ok = true;
+
+        while (ok) {
+            size_t wlen;
+            wend = nasm_skip_word(spcword);
+            wlen = wend - spcword;
+
+            switch (wlen) {
+            case 4:
+                if (!nasm_strnicmp(spcword, "data", wlen))
+                    type = STT_OBJECT;
+                else if (!nasm_strnicmp(spcword, "weak", wlen))
+                    bind = STB_WEAK;
+                else
+                    ok = false;
+                break;
+
+            case 6:
+                if (!nasm_strnicmp(spcword, "notype", wlen))
+                    type = STT_NOTYPE;
+                else if (!nasm_strnicmp(spcword, "object", wlen))
+                    type = STT_OBJECT;
+                else if (!nasm_strnicmp(spcword, "hidden", wlen))
+                    sym->other = STV_HIDDEN;
+                else if (!nasm_strnicmp(spcword, "strong", wlen))
+                    bind = STB_GLOBAL;
+                else
+                    ok = false;
+                break;
+
+            case 7:
+                if (!nasm_strnicmp(spcword, "default", wlen))
+                    sym->other = STV_DEFAULT;
+                else
+                    ok = false;
+                break;
+
+            case 8:
+                if (!nasm_strnicmp(spcword, "function", wlen))
+                    type = STT_FUNC;
+                else if (!nasm_stricmp(spcword, "internal"))
+                    sym->other = STV_INTERNAL;
+                else
+                    ok = false;
+                break;
+
+            case 9:
+                if (!nasm_strnicmp(spcword, "protected", wlen))
+                    sym->other = STV_PROTECTED;
+                else
+                    ok = false;
+                break;
+
+            default:
+                ok = false;
+                break;
+            }
+
+            if (ok)
+                spcword = nasm_skip_spaces(wend);
+        }
+        if (!is_global && bind != STB_LOCAL) {
+            nasm_nonfatal("weak and strong only applies to global symbols");
+            bind = STB_LOCAL;
+        }
+
+        if (spcword && *spcword) {
+            struct tokenval tokval;
+            expr *e;
+            int fwd = 0;
+            char *saveme = stdscan_get();
+
+            /*
+             * We have a size expression; attempt to
+             * evaluate it.
+             */
+            stdscan_reset();
+            stdscan_set((char *)spcword);
+            tokval.t_type = TOKEN_INVALID;
+            e = evaluate(stdscan, NULL, &tokval, &fwd, 0, NULL);
+            if (fwd) {
+                sym->nextfwd = fwds;
+                fwds = sym;
+                sym->name = nasm_strdup(name);
+            } else if (e) {
+                if (!is_simple(e))
+                    nasm_nonfatal("cannot use relocatable"
+                                  " expression as symbol size");
+                else
+                    sym->size = reloc_value(e);
+            }
+            stdscan_set(saveme);
+        }
+    }
+
+    /*
+     * If it is in a TLS segment, mark symbol accordingly.
+     */
+    if (sec && (sec->flags & SHF_TLS))
+        type = STT_TLS;
+
+    /* Note: ELF32_ST_INFO() and ELF64_ST_INFO() are identical */
+    sym->type = ELF32_ST_INFO(bind, type);
+
+    if (sym_type_local(sym->type)) {
+        nlocals++;
+    } else {
+        /*
+         * If sym->section == SHN_ABS, then the first line of the
+         * else section would cause a core dump, because its a reference
+         * beyond the end of the section array.
+         * This behaviour is exhibited by this code:
+         *     GLOBAL crash_nasm
+         *     crash_nasm equ 0
+         * To avoid such a crash, such requests are silently discarded.
+         * This may not be the best solution.
+         */
+        if (sym->section == XSHN_UNDEF || sym->section == XSHN_COMMON) {
+            bsym = raa_write(bsym, segment, nglobs);
+        } else if (sym->section != XSHN_ABS) {
+            /*
+             * This is a global symbol; so we must add it to the rbtree
+             * of global symbols in its section.
+             *
+             * In addition, we check the special text for symbol
+             * type and size information.
+             */
+            sectssym->section-1->gsyms =
+                rb_insert(sectssym->section-1->gsyms, &sym->symv);
+
+        }
+        sym->globnum = nglobs;
+        nglobs++;
+    }
+}
+
+static void elf_add_reloc(struct elf_section *sect, int32_t segment,
+                          int64_t offset, int type)
+{
+    struct elf_reloc *r;
+
+    r = *sect->tail = nasm_zalloc(sizeof(struct elf_reloc));
+    sect->tail = &r->next;
+
+    r->address = sect->len;
+    r->offset = offset;
+
+    if (segment != NO_SEG) {
+        const struct elf_section *s;
+        s = raa_read_ptr(section_by_index, segment >> 1);
+        if (s)
+            r->symbol = s->shndx + 1;
+        else
+            r->symbol = GLOBAL_TEMP_BASE + raa_read(bsym, segment);
+    }
+    r->type = type;
+
+    sect->nrelocs++;
+}
+
+/*
+ * This routine deals with ..got and ..sym relocations: the more
+ * complicated kinds. In shared-library writing, some relocations
+ * with respect to global symbols must refer to the precise symbol
+ * rather than referring to an offset from the base of the section
+ * _containing_ the symbol. Such relocations call to this routine,
+ * which searches the symbol list for the symbol in question.
+ *
+ * R_386_GOT32 | R_X86_64_GOT32 references require the _exact_ symbol address to be
+ * used; R_386_32 | R_X86_64_32 references can be at an offset from the symbol.
+ * The boolean argument `exact' tells us this.
+ *
+ * Return value is the adjusted value of `addr', having become an
+ * offset from the symbol rather than the section. Should always be
+ * zero when returning from an exact call.
+ *
+ * Limitation: if you define two symbols at the same place,
+ * confusion will occur.
+ *
+ * Inefficiency: we search, currently, using a linked list which
+ * isn't even necessarily sorted.
+ */
+static int64_t elf_add_gsym_reloc(struct elf_section *sect,
+                                  int32_t segment, uint64_t offset,
+                                  int64_t pcrel, int type, bool exact)
+{
+    struct elf_reloc *r;
+    struct elf_section *s;
+    struct elf_symbol *sym;
+    struct rbtree *srb;
+
+    /*
+     * First look up the segment/offset pair and find a global
+     * symbol corresponding to it. If it's not one of our segments,
+     * then it must be an external symbol, in which case we're fine
+     * doing a normal elf_add_reloc after first sanity-checking
+     * that the offset from the symbol is zero.
+     */
+    s = raa_read_ptr(section_by_index, segment >> 1);
+    if (!s) {
+        if (exact && offset)
+            nasm_nonfatal("invalid access to an external symbol");
+        else
+            elf_add_reloc(sect, segment, offset - pcrel, type);
+        return 0;
+    }
+
+    srb = rb_search(s->gsyms, offset);
+    if (!srb || (exact && srb->key != offset)) {
+        nasm_nonfatal("unable to find a suitable global symbol"
+                      " for this reference");
+        return 0;
+    }
+    sym = container_of(srb, struct elf_symbol, symv);
+
+    r = *sect->tail = nasm_malloc(sizeof(struct elf_reloc));
+    sect->tail = &r->next;
+
+    r->next     = NULL;
+    r->address  = sect->len;
+    r->offset = offset - pcrel - sym->symv.key;
+    r->symbol   = GLOBAL_TEMP_BASE + sym->globnum;
+    r->type     = type;
+
+    sect->nrelocs++;
+    return r->offset;
+}
+
+static void elf32_out(int32_t segto, const void *data,
+                      enum out_type type, uint64_t size,
+                      int32_t segment, int32_t wrt)
+{
+    struct elf_section *s;
+    int64_t addr;
+    int reltype, bytes;
+    static struct symlininfo sinfo;
+
+    /*
+     * handle absolute-assembly (structure definitions)
+     */
+    if (segto == NO_SEG) {
+        if (type != OUT_RESERVE)
+            nasm_nonfatal("attempt to assemble code in ABSOLUTE space");
+        return;
+    }
+
+    s = raa_read_ptr(section_by_index, segto >> 1);
+    if (!s) {
+        int tempint;            /* ignored */
+        if (segto != elf_section_names(".text", &tempint))
+            nasm_panic("strange segment conditions in ELF driver");
+        else
+            s = sectsnsects - 1;
+    }
+
+    /* again some stabs debugging stuff */
+    sinfo.offset = s->len;
+    /* Adjust to an index of the section table. */
+    sinfo.section = s->shndx - 1;
+    sinfo.segto = segto;
+    sinfo.name = s->name;
+    dfmt->debug_output(TY_DEBUGSYMLIN, &sinfo);
+    /* end of debugging stuff */
+
+    if (s->type == SHT_NOBITS && type != OUT_RESERVE) {
+        nasm_warn(WARN_OTHER, "attempt to initialize memory in"
+                  " BSS section `%s': ignored", s->name);
+        s->len += realsize(type, size);
+        return;
+    }
+
+    switch (type) {
+    case OUT_RESERVE:
+        if (s->type != SHT_NOBITS) {
+            nasm_warn(WARN_ZEROING, "uninitialized space declared in"
+                      " non-BSS section `%s': zeroing", s->name);
+            elf_sect_write(s, NULL, size);
+        } else
+            s->len += size;
+        break;
+
+    case OUT_RAWDATA:
+        elf_sect_write(s, data, size);
+        break;
+
+    case OUT_ADDRESS:
+    {
+        bool err = false;
+        int asize = abs((int)size);
+
+        addr = *(int64_t *)data;
+        if (segment != NO_SEG) {
+            if (segment & 1) {
+                nasm_nonfatal("ELF format does not support"
+                              " segment base references");
+            } else {
+                if (wrt == NO_SEG) {
+                    /*
+                     * The if() is a hack to deal with compilers which
+                     * don't handle switch() statements with 64-bit
+                     * expressions.
+                     */
+                    switch (asize) {
+                    case 1:
+                        elf_add_reloc(s, segment, 0, R_386_8);
+                        break;
+                    case 2:
+                        elf_add_reloc(s, segment, 0, R_386_16);
+                        break;
+                    case 4:
+                        elf_add_reloc(s, segment, 0, R_386_32);
+                        break;
+                    default: /* Error issued further down */
+                        err = true;
+                        break;
+                    }
+                } else if (wrt == elf_gotpc_sect + 1) {
+                    /*
+                     * The user will supply GOT relative to $$. ELF
+                     * will let us have GOT relative to $. So we
+                     * need to fix up the data item by $-$$.
+                     */
+                    err = asize != 4;
+                    addr += s->len;
+                    elf_add_reloc(s, segment, 0, R_386_GOTPC);
+                } else if (wrt == elf_gotoff_sect + 1) {
+                    err = asize != 4;
+                    elf_add_reloc(s, segment, 0, R_386_GOTOFF);
+                } else if (wrt == elf_tlsie_sect + 1) {
+                    err = asize != 4;
+                    addr = elf_add_gsym_reloc(s, segment, addr, 0,
+                                              R_386_TLS_IE, true);
+                } else if (wrt == elf_got_sect + 1) {
+                    err = asize != 4;
+                    addr = elf_add_gsym_reloc(s, segment, addr, 0,
+                                              R_386_GOT32, true);
+                } else if (wrt == elf_sym_sect + 1) {
+                    switch (asize) {
+                    case 1:
+                        addr = elf_add_gsym_reloc(s, segment, addr, 0,
+                                                  R_386_8, false);
+                        break;
+                    case 2:
+                        addr = elf_add_gsym_reloc(s, segment, addr, 0,
+                                                  R_386_16, false);
+                        break;
+                    case 4:
+                        addr = elf_add_gsym_reloc(s, segment, addr, 0,
+                                                  R_386_32, false);
+                        break;
+                    default:
+                        err = true;
+                        break;
+                    }
+                } else if (wrt == elf_plt_sect + 1) {
+                    nasm_nonfatal("ELF format cannot produce non-PC-"
+                                  "relative PLT references");
+                } else {
+                    nasm_nonfatal("ELF format does not support this"
+                                  " use of WRT");
+                    wrt = NO_SEG; /* we can at least _try_ to continue */
+                }
+            }
+        }
+
+        if (err) {
+            nasm_nonfatal("Unsupported %d-bit ELF relocation", asize << 3);
+        }
+        elf_sect_writeaddr(s, addr, asize);
+        break;
+    }
+
+    case OUT_REL1ADR:
+        reltype = R_386_PC8;
+        bytes = 1;
+        goto rel12adr;
+    case OUT_REL2ADR:
+        reltype = R_386_PC16;
+        bytes = 2;
+        goto rel12adr;
+
+rel12adr:
+        addr = *(int64_t *)data - size;
+        nasm_assert(segment != segto);
+        if (segment != NO_SEG && (segment & 1)) {
+            nasm_nonfatal("ELF format does not support"
+                          " segment base references");
+        } else {
+            if (wrt == NO_SEG) {
+                elf_add_reloc(s, segment, 0, reltype);
+            } else {
+                nasm_nonfatal("Unsupported %d-bit ELF relocation", bytes << 3);
+            }
+        }
+        elf_sect_writeaddr(s, addr, bytes);
+        break;
+
+    case OUT_REL4ADR:
+        addr = *(int64_t *)data - size;
+        if (segment == segto)
+            nasm_panic("intra-segment OUT_REL4ADR");
+        if (segment != NO_SEG && (segment & 1)) {
+            nasm_nonfatal("ELF format does not support"
+                          " segment base references");
+        } else {
+            if (wrt == NO_SEG) {
+                elf_add_reloc(s, segment, 0, R_386_PC32);
+            } else if (wrt == elf_plt_sect + 1) {
+                elf_add_reloc(s, segment, 0, R_386_PLT32);
+            } else if (wrt == elf_gotpc_sect + 1 ||
+                       wrt == elf_gotoff_sect + 1 ||
+                       wrt == elf_got_sect + 1) {
+                nasm_nonfatal("ELF format cannot produce PC-"
+                              "relative GOT references");
+            } else {
+                nasm_nonfatal("ELF format does not support this"
+                              " use of WRT");
+                wrt = NO_SEG;   /* we can at least _try_ to continue */
+            }
+        }
+        elf_sect_writeaddr(s, addr, 4);
+        break;
+
+    case OUT_REL8ADR:
+        nasm_nonfatal("32-bit ELF format does not support 64-bit relocations");
+        addr = 0;
+        elf_sect_writeaddr(s, addr, 8);
+        break;
+
+    default:
+        panic();
+    }
+}
+static void elf64_out(int32_t segto, const void *data,
+                      enum out_type type, uint64_t size,
+                      int32_t segment, int32_t wrt)
+{
+    struct elf_section *s;
+    int64_t addr;
+    int reltype, bytes;
+    static struct symlininfo sinfo;
+
+    /*
+     * handle absolute-assembly (structure definitions)
+     */
+    if (segto == NO_SEG) {
+        if (type != OUT_RESERVE)
+            nasm_nonfatal("attempt to assemble code in ABSOLUTE space");
+        return;
+    }
+
+    s = raa_read_ptr(section_by_index, segto >> 1);
+    if (!s) {
+        int tempint;            /* ignored */
+        if (segto != elf_section_names(".text", &tempint))
+            nasm_panic("strange segment conditions in ELF driver");
+        else
+            s = sectsnsects - 1;
+    }
+
+    /* again some stabs debugging stuff */
+    sinfo.offset = s->len;
+    /* Adjust to an index of the section table. */
+    sinfo.section = s->shndx - 1;
+    sinfo.segto = segto;
+    sinfo.name = s->name;
+    dfmt->debug_output(TY_DEBUGSYMLIN, &sinfo);
+    /* end of debugging stuff */
+
+    if (s->type == SHT_NOBITS && type != OUT_RESERVE) {
+        nasm_warn(WARN_OTHER, "attempt to initialize memory in"
+                  " BSS section `%s': ignored", s->name);
+        s->len += realsize(type, size);
+        return;
+    }
+
+    switch (type) {
+    case OUT_RESERVE:
+        if (s->type != SHT_NOBITS) {
+            nasm_warn(WARN_ZEROING, "uninitialized space declared in"
+                      " non-BSS section `%s': zeroing", s->name);
+            elf_sect_write(s, NULL, size);
+        } else
+            s->len += size;
+        break;
+
+    case OUT_RAWDATA:
+        if (segment != NO_SEG)
+            nasm_panic("OUT_RAWDATA with other than NO_SEG");
+        elf_sect_write(s, data, size);
+        break;
+
+    case OUT_ADDRESS:
+    {
+        int isize = (int)size;
+        int asize = abs((int)size);
+
+        addr = *(int64_t *)data;
+        if (segment == NO_SEG) {
+            /* Do nothing */
+        } else if (segment & 1) {
+            nasm_nonfatal("ELF format does not support"
+                          " segment base references");
+        } else {
+            if (wrt == NO_SEG) {
+                switch (isize) {
+                case 1:
+                case -1:
+                    elf_add_reloc(s, segment, addr, R_X86_64_8);
+                    break;
+                case 2:
+                case -2:
+                    elf_add_reloc(s, segment, addr, R_X86_64_16);
+                    break;
+                case 4:
+                    elf_add_reloc(s, segment, addr, R_X86_64_32);
+                    break;
+                case -4:
+                    elf_add_reloc(s, segment, addr, R_X86_64_32S);
+                    break;
+                case 8:
+                case -8:
+                    elf_add_reloc(s, segment, addr, R_X86_64_64);
+                    break;
+                default:
+                    nasm_panic("internal error elf64-hpa-871");
+                    break;
+                }
+                addr = 0;
+            } else if (wrt == elf_gotpc_sect + 1) {
+                /*
+                 * The user will supply GOT relative to $$. ELF
+                 * will let us have GOT relative to $. So we
+                 * need to fix up the data item by $-$$.
+                 */
+                addr += s->len;
+                elf_add_reloc(s, segment, addr, R_X86_64_GOTPC32);
+                addr = 0;
+            } else if (wrt == elf_gotoff_sect + 1) {
+                if (asize != 8) {
+                    nasm_nonfatal("ELF64 requires ..gotoff "
+                                  "references to be qword");
+                } else {
+                    elf_add_reloc(s, segment, addr, R_X86_64_GOTOFF64);
+                    addr = 0;
+                }
+            } else if (wrt == elf_got_sect + 1) {
+                switch (asize) {
+                case 4:
+                    elf_add_gsym_reloc(s, segment, addr, 0,
+                                       R_X86_64_GOT32, true);
+                    addr = 0;
+                    break;
+                case 8:
+                    elf_add_gsym_reloc(s, segment, addr, 0,
+                                       R_X86_64_GOT64, true);
+                    addr = 0;
+                    break;
+                default:
+                    nasm_nonfatal("invalid ..got reference");
+                    break;
+                }
+            } else if (wrt == elf_sym_sect + 1) {
+                switch (isize) {
+                case 1:
+                case -1:
+                    elf_add_gsym_reloc(s, segment, addr, 0,
+                                       R_X86_64_8, false);
+                    addr = 0;
+                    break;
+                case 2:
+                case -2:
+                    elf_add_gsym_reloc(s, segment, addr, 0,
+                                       R_X86_64_16, false);
+                    addr = 0;
+                    break;
+                case 4:
+                    elf_add_gsym_reloc(s, segment, addr, 0,
+                                       R_X86_64_32, false);
+                    addr = 0;
+                    break;
+                case -4:
+                    elf_add_gsym_reloc(s, segment, addr, 0,
+                                       R_X86_64_32S, false);
+                    addr = 0;
+                    break;
+                case 8:
+                case -8:
+                    elf_add_gsym_reloc(s, segment, addr, 0,
+                                       R_X86_64_64, false);
+                    addr = 0;
+                    break;
+                default:
+                    nasm_panic("internal error elf64-hpa-903");
+                    break;
+                }
+            } else if (wrt == elf_plt_sect + 1) {
+                nasm_nonfatal("ELF format cannot produce non-PC-"
+                              "relative PLT references");
+            } else {
+                nasm_nonfatal("ELF format does not support this"
+                              " use of WRT");
+            }
+        }
+        elf_sect_writeaddr(s, addr, asize);
+        break;
+    }
+
+    case OUT_REL1ADR:
+        reltype = R_X86_64_PC8;
+        bytes = 1;
+        goto rel12adr;
+
+    case OUT_REL2ADR:
+        reltype = R_X86_64_PC16;
+        bytes = 2;
+        goto rel12adr;
+
+rel12adr:
+        addr = *(int64_t *)data - size;
+        if (segment == segto)
+            nasm_panic("intra-segment OUT_REL1ADR");
+        if (segment == NO_SEG) {
+            /* Do nothing */
+        } else if (segment & 1) {
+            nasm_nonfatal("ELF format does not support"
+                          " segment base references");
+        } else {
+            if (wrt == NO_SEG) {
+                elf_add_reloc(s, segment, addr, reltype);
+                addr = 0;
+            } else {
+                nasm_nonfatal("Unsupported %d-bit ELF relocation", bytes << 3);
+            }
+        }
+        elf_sect_writeaddr(s, addr, bytes);
+        break;
+
+    case OUT_REL4ADR:
+        addr = *(int64_t *)data - size;
+        if (segment == segto)
+            nasm_panic("intra-segment OUT_REL4ADR");
+        if (segment == NO_SEG) {
+            /* Do nothing */
+        } else if (segment & 1) {
+            nasm_nonfatal("ELF64 format does not support"
+                          " segment base references");
+        } else {
+            if (wrt == NO_SEG) {
+                elf_add_reloc(s, segment, addr, R_X86_64_PC32);
+                addr = 0;
+            } else if (wrt == elf_plt_sect + 1) {
+                elf_add_gsym_reloc(s, segment, addr+size, size,
+                                   R_X86_64_PLT32, true);
+                addr = 0;
+            } else if (wrt == elf_gotpc_sect + 1 ||
+                       wrt == elf_got_sect + 1) {
+                elf_add_gsym_reloc(s, segment, addr+size, size,
+                                   R_X86_64_GOTPCREL, true);
+                addr = 0;
+            } else if (wrt == elf_gotoff_sect + 1 ||
+                       wrt == elf_got_sect + 1) {
+                nasm_nonfatal("ELF64 requires ..gotoff references to be "
+                              "qword absolute");
+            } else if (wrt == elf_gottpoff_sect + 1) {
+                elf_add_gsym_reloc(s, segment, addr+size, size,
+                                   R_X86_64_GOTTPOFF, true);
+                addr = 0;
+            } else {
+                nasm_nonfatal("ELF64 format does not support this"
+                              " use of WRT");
+            }
+        }
+        elf_sect_writeaddr(s, addr, 4);
+        break;
+
+    case OUT_REL8ADR:
+        addr = *(int64_t *)data - size;
+        if (segment == segto)
+            nasm_panic("intra-segment OUT_REL8ADR");
+        if (segment == NO_SEG) {
+            /* Do nothing */
+        } else if (segment & 1) {
+            nasm_nonfatal("ELF64 format does not support"
+                          " segment base references");
+        } else {
+            if (wrt == NO_SEG) {
+                elf_add_reloc(s, segment, addr, R_X86_64_PC64);
+                addr = 0;
+            } else if (wrt == elf_gotpc_sect + 1 ||
+                       wrt == elf_got_sect + 1) {
+                elf_add_gsym_reloc(s, segment, addr+size, size,
+                                   R_X86_64_GOTPCREL64, true);
+                addr = 0;
+            } else if (wrt == elf_gotoff_sect + 1 ||
+                       wrt == elf_got_sect + 1) {
+                nasm_nonfatal("ELF64 requires ..gotoff references to be "
+                              "absolute");
+            } else if (wrt == elf_gottpoff_sect + 1) {
+                nasm_nonfatal("ELF64 requires ..gottpoff references to be "
+                              "dword");
+            } else {
+                nasm_nonfatal("ELF64 format does not support this"
+                              " use of WRT");
+            }
+        }
+        elf_sect_writeaddr(s, addr, 8);
+        break;
+
+    default:
+        panic();
+    }
+}
+
+static void elfx32_out(int32_t segto, const void *data,
+                       enum out_type type, uint64_t size,
+                       int32_t segment, int32_t wrt)
+{
+    struct elf_section *s;
+    int64_t addr;
+    int reltype, bytes;
+    static struct symlininfo sinfo;
+
+    /*
+     * handle absolute-assembly (structure definitions)
+     */
+    if (segto == NO_SEG) {
+        if (type != OUT_RESERVE)
+            nasm_nonfatal("attempt to assemble code in ABSOLUTE space");
+        return;
+    }
+
+    s = raa_read_ptr(section_by_index, segto >> 1);
+    if (!s) {
+        int tempint;            /* ignored */
+        if (segto != elf_section_names(".text", &tempint))
+            nasm_panic("strange segment conditions in ELF driver");
+        else
+            s = sectsnsects - 1;
+    }
+
+    /* again some stabs debugging stuff */
+    sinfo.offset = s->len;
+    /* Adjust to an index of the section table. */
+    sinfo.section = s->shndx - 1;
+    sinfo.segto = segto;
+    sinfo.name = s->name;
+    dfmt->debug_output(TY_DEBUGSYMLIN, &sinfo);
+    /* end of debugging stuff */
+
+    if (s->type == SHT_NOBITS && type != OUT_RESERVE) {
+        nasm_warn(WARN_OTHER, "attempt to initialize memory in"
+                  " BSS section `%s': ignored", s->name);
+        s->len += realsize(type, size);
+        return;
+    }
+
+    switch (type) {
+    case OUT_RESERVE:
+        if (s->type != SHT_NOBITS) {
+            nasm_warn(WARN_ZEROING, "uninitialized space declared in"
+                      " non-BSS section `%s': zeroing", s->name);
+            elf_sect_write(s, NULL, size);
+        } else
+            s->len += size;
+        break;
+
+    case OUT_RAWDATA:
+        if (segment != NO_SEG)
+            nasm_panic("OUT_RAWDATA with other than NO_SEG");
+        elf_sect_write(s, data, size);
+        break;
+
+    case OUT_ADDRESS:
+    {
+        int isize = (int)size;
+        int asize = abs((int)size);
+
+        addr = *(int64_t *)data;
+        if (segment == NO_SEG) {
+            /* Do nothing */
+        } else if (segment & 1) {
+            nasm_nonfatal("ELF format does not support"
+                          " segment base references");
+        } else {
+            if (wrt == NO_SEG) {
+                switch (isize) {
+                case 1:
+                case -1:
+                    elf_add_reloc(s, segment, addr, R_X86_64_8);
+                    break;
+                case 2:
+                case -2:
+                    elf_add_reloc(s, segment, addr, R_X86_64_16);
+                    break;
+                case 4:
+                    elf_add_reloc(s, segment, addr, R_X86_64_32);
+                    break;
+                case -4:
+                    elf_add_reloc(s, segment, addr, R_X86_64_32S);
+                    break;
+                case 8:
+                case -8:
+                    elf_add_reloc(s, segment, addr, R_X86_64_64);
+                    break;
+                default:
+                    nasm_panic("internal error elfx32-hpa-871");
+                    break;
+                }
+                addr = 0;
+            } else if (wrt == elf_gotpc_sect + 1) {
+                /*
+                 * The user will supply GOT relative to $$. ELF
+                 * will let us have GOT relative to $. So we
+                 * need to fix up the data item by $-$$.
+                 */
+                addr += s->len;
+                elf_add_reloc(s, segment, addr, R_X86_64_GOTPC32);
+                addr = 0;
+            } else if (wrt == elf_gotoff_sect + 1) {
+                nasm_nonfatal("ELFX32 doesn't support "
+                              "R_X86_64_GOTOFF64");
+            } else if (wrt == elf_got_sect + 1) {
+                switch (asize) {
+                case 4:
+                    elf_add_gsym_reloc(s, segment, addr, 0,
+                                       R_X86_64_GOT32, true);
+                    addr = 0;
+                    break;
+                default:
+                    nasm_nonfatal("invalid ..got reference");
+                    break;
+                }
+            } else if (wrt == elf_sym_sect + 1) {
+                switch (isize) {
+                case 1:
+                case -1:
+                    elf_add_gsym_reloc(s, segment, addr, 0,
+                                       R_X86_64_8, false);
+                    addr = 0;
+                    break;
+                case 2:
+                case -2:
+                    elf_add_gsym_reloc(s, segment, addr, 0,
+                                       R_X86_64_16, false);
+                    addr = 0;
+                    break;
+                case 4:
+                    elf_add_gsym_reloc(s, segment, addr, 0,
+                                       R_X86_64_32, false);
+                    addr = 0;
+                    break;
+                case -4:
+                    elf_add_gsym_reloc(s, segment, addr, 0,
+                                       R_X86_64_32S, false);
+                    addr = 0;
+                    break;
+                case 8:
+                case -8:
+                    elf_add_gsym_reloc(s, segment, addr, 0,
+                                       R_X86_64_64, false);
+                    addr = 0;
+                    break;
+                default:
+                    nasm_panic("internal error elfx32-hpa-903");
+                    break;
+                }
+            } else if (wrt == elf_plt_sect + 1) {
+                nasm_nonfatal("ELF format cannot produce non-PC-"
+                              "relative PLT references");
+            } else {
+                nasm_nonfatal("ELF format does not support this"
+                              " use of WRT");
+            }
+        }
+        elf_sect_writeaddr(s, addr, asize);
+        break;
+    }
+
+    case OUT_REL1ADR:
+        reltype = R_X86_64_PC8;
+        bytes = 1;
+        goto rel12adr;
+
+    case OUT_REL2ADR:
+        reltype = R_X86_64_PC16;
+        bytes = 2;
+        goto rel12adr;
+
+rel12adr:
+        addr = *(int64_t *)data - size;
+        if (segment == segto)
+            nasm_panic("intra-segment OUT_REL1ADR");
+        if (segment == NO_SEG) {
+            /* Do nothing */
+        } else if (segment & 1) {
+            nasm_nonfatal("ELF format does not support"
+                          " segment base references");
+        } else {
+            if (wrt == NO_SEG) {
+                elf_add_reloc(s, segment, addr, reltype);
+                addr = 0;
+            } else {
+                nasm_nonfatal("unsupported %d-bit ELF relocation", bytes << 3);
+            }
+        }
+        elf_sect_writeaddr(s, addr, bytes);
+        break;
+
+    case OUT_REL4ADR:
+        addr = *(int64_t *)data - size;
+        if (segment == segto)
+            nasm_panic("intra-segment OUT_REL4ADR");
+        if (segment == NO_SEG) {
+            /* Do nothing */
+        } else if (segment & 1) {
+            nasm_nonfatal("ELFX32 format does not support"
+                          " segment base references");
+        } else {
+            if (wrt == NO_SEG) {
+                elf_add_reloc(s, segment, addr, R_X86_64_PC32);
+                addr = 0;
+            } else if (wrt == elf_plt_sect + 1) {
+                elf_add_gsym_reloc(s, segment, addr+size, size,
+                                   R_X86_64_PLT32, true);
+                addr = 0;
+            } else if (wrt == elf_gotpc_sect + 1 ||
+                       wrt == elf_got_sect + 1) {
+                elf_add_gsym_reloc(s, segment, addr+size, size,
+                                   R_X86_64_GOTPCREL, true);
+                addr = 0;
+            } else if (wrt == elf_gotoff_sect + 1 ||
+                       wrt == elf_got_sect + 1) {
+                nasm_nonfatal("invalid ..gotoff reference");
+            } else if (wrt == elf_gottpoff_sect + 1) {
+                elf_add_gsym_reloc(s, segment, addr+size, size,
+                                   R_X86_64_GOTTPOFF, true);
+                addr = 0;
+            } else {
+                nasm_nonfatal("ELFX32 format does not support this use of WRT");
+            }
+        }
+        elf_sect_writeaddr(s, addr, 4);
+        break;
+
+    case OUT_REL8ADR:
+        nasm_nonfatal("32-bit ELF format does not support 64-bit relocations");
+        addr = 0;
+        elf_sect_writeaddr(s, addr, 8);
+        break;
+
+    default:
+        panic();
+    }
+}
+
+/*
+ * Section index/count with a specified overflow value (usually SHN_INDEX,
+ * but 0 for e_shnum.
+ */
+static inline uint16_t elf_shndx(int section, uint16_t overflow)
+{
+    return cpu_to_le16(section < (int)SHN_LORESERVE ? section : overflow);
+}
+
+struct ehdr_common {
+    uint8_t	e_identEI_NIDENT;
+    uint16_t    e_type;
+    uint16_t    e_machine;
+    uint32_t	e_version;
+};
+
+union ehdr {
+    Elf32_Ehdr ehdr32;
+    Elf64_Ehdr ehdr64;
+    struct ehdr_common com;
+};
+
+static void elf_write(void)
+{
+    int align;
+    char *p;
+    int i;
+    size_t symtablocal;
+    int sec_shstrtab, sec_symtab, sec_strtab;
+    union ehdr ehdr;
+
+    /*
+     * Add any sections we don't already have:
+     * rel/rela sections for the user sections, debug sections, and
+     * the ELF special sections.
+     */
+
+    sec_debug = nsections;
+    if (dfmt_is_stabs()) {
+        /* in case the debug information is wanted, just add these three sections... */
+        add_sectname("", ".stab");
+        add_sectname("", ".stabstr");
+        add_sectname(efmt->relpfx, ".stab");
+    } else if (dfmt_is_dwarf()) {
+        /* the dwarf debug standard specifies the following ten sections,
+           not all of which are currently implemented,
+           although all of them are defined. */
+        add_sectname("", ".debug_aranges");
+        add_sectname(efmt->relpfx, ".debug_aranges");
+        add_sectname("", ".debug_pubnames");
+        add_sectname("", ".debug_info");
+        add_sectname(efmt->relpfx, ".debug_info");
+        add_sectname("", ".debug_abbrev");
+        add_sectname("", ".debug_line");
+        add_sectname(efmt->relpfx, ".debug_line");
+        add_sectname("", ".debug_frame");
+        add_sectname("", ".debug_loc");
+    }
+
+    sec_shstrtab = add_sectname("", ".shstrtab");
+    sec_symtab   = add_sectname("", ".symtab");
+    sec_strtab   = add_sectname("", ".strtab");
+
+    /*
+     * Build the symbol table and relocation tables.
+     */
+    symtablocal = elf_build_symtab();
+
+    /* Do we need an .symtab_shndx section? */
+    if (symtab_shndx)
+        add_sectname("", ".symtab_shndx");
+
+    for (i = 0; i < nsects; i++) {
+        if (sectsi->head) {
+            add_sectname(efmt->relpfx, sectsi->name);
+            sectsi->rel = efmt->elf_build_reltab(sectsi->head);
+        }
+    }
+
+    /*
+     * Output the ELF header.
+     */
+    nasm_zero(ehdr);
+
+    /* These fields are in the same place for 32 and 64 bits */
+    memcpy(&ehdr.com.e_identEI_MAG0, ELFMAG, SELFMAG);
+    ehdr.com.e_identEI_CLASS      = efmt->ei_class;
+    ehdr.com.e_identEI_DATA       = ELFDATA2LSB;
+    ehdr.com.e_identEI_VERSION    = EV_CURRENT;
+    ehdr.com.e_identEI_OSABI      = elf_osabi;
+    ehdr.com.e_identEI_ABIVERSION = elf_abiver;
+    ehdr.com.e_type                 = cpu_to_le16(ET_REL);
+    ehdr.com.e_machine              = cpu_to_le16(efmt->e_machine);
+    ehdr.com.e_version              = cpu_to_le16(EV_CURRENT);
+
+    if (!efmt->elf64) {
+        ehdr.ehdr32.e_shoff         = cpu_to_le32(sizeof ehdr);
+        ehdr.ehdr32.e_ehsize        = cpu_to_le16(sizeof(Elf32_Ehdr));
+        ehdr.ehdr32.e_shentsize     = cpu_to_le16(sizeof(Elf32_Shdr));
+        ehdr.ehdr32.e_shnum         = elf_shndx(nsections, 0);
+        ehdr.ehdr32.e_shstrndx      = elf_shndx(sec_shstrtab, SHN_XINDEX);
+    } else {
+        ehdr.ehdr64.e_shoff         = cpu_to_le64(sizeof ehdr);
+        ehdr.ehdr64.e_ehsize        = cpu_to_le16(sizeof(Elf64_Ehdr));
+        ehdr.ehdr64.e_shentsize     = cpu_to_le16(sizeof(Elf64_Shdr));
+        ehdr.ehdr64.e_shnum         = elf_shndx(nsections, 0);
+        ehdr.ehdr64.e_shstrndx      = elf_shndx(sec_shstrtab, SHN_XINDEX);
+    }
+
+    nasm_write(&ehdr, sizeof(ehdr), ofile);
+    elf_foffs = sizeof ehdr + efmt->shdr_size * nsections;
+
+    /*
+     * Now output the section header table.
+     */
+    align = ALIGN(elf_foffs, SEC_FILEALIGN) - elf_foffs;
+    elf_foffs += align;
+    elf_nsect = 0;
+    elf_sects = nasm_malloc(sizeof(*elf_sects) * nsections);
+
+    /* SHN_UNDEF */
+    elf_section_header(0, SHT_NULL, 0, NULL, false,
+                       nsections > (int)SHN_LORESERVE ? nsections : 0,
+                       sec_shstrtab >= (int)SHN_LORESERVE ? sec_shstrtab : 0,
+                       0, 0, 0);
+    p = shstrtab + 1;
+
+    /* The normal sections */
+    for (i = 0; i < nsects; i++) {
+        elf_section_header(p - shstrtab, sectsi->type, sectsi->flags,
+                           sectsi->data, true,
+                           sectsi->len, 0, 0,
+                           sectsi->align, sectsi->entsize);
+        p += strlen(p) + 1;
+    }
+
+    /* The debugging sections */
+    if (dfmt_is_stabs()) {
+        /* for debugging information, create the last three sections
+           which are the .stab , .stabstr and .rel.stab sections respectively */
+
+        /* this function call creates the stab sections in memory */
+        stabs_generate();
+
+        if (stabbuf && stabstrbuf && stabrelbuf) {
+            elf_section_header(p - shstrtab, SHT_PROGBITS, 0, stabbuf, false,
+                               stablen, sec_stabstr, 0, 4, 12);
+            p += strlen(p) + 1;
+
+            elf_section_header(p - shstrtab, SHT_STRTAB, 0, stabstrbuf, false,
+                               stabstrlen, 0, 0, 4, 0);
+            p += strlen(p) + 1;
+
+            /* link -> symtable  info -> section to refer to */
+            elf_section_header(p - shstrtab, efmt->reltype, 0,
+                               stabrelbuf, false, stabrellen,
+                               sec_symtab, sec_stab,
+                               efmt->word, efmt->relsize);
+            p += strlen(p) + 1;
+        }
+    } else if (dfmt_is_dwarf()) {
+        /* for dwarf debugging information, create the ten dwarf sections */
+
+        /* this function call creates the dwarf sections in memory */
+	if (dwarf_fsect)
+            dwarf_generate();
+
+        elf_section_header(p - shstrtab, SHT_PROGBITS, 0, arangesbuf, false,
+                           arangeslen, 0, 0, 1, 0);
+        p += strlen(p) + 1;
+
+        elf_section_header(p - shstrtab, efmt->reltype, 0, arangesrelbuf, false,
+			   arangesrellen, sec_symtab,
+                           sec_debug_aranges,
+                           efmt->word, efmt->relsize);
+        p += strlen(p) + 1;
+
+        elf_section_header(p - shstrtab, SHT_PROGBITS, 0, pubnamesbuf,
+                           false, pubnameslen, 0, 0, 1, 0);
+        p += strlen(p) + 1;
+
+        elf_section_header(p - shstrtab, SHT_PROGBITS, 0, infobuf, false,
+                           infolen, 0, 0, 1, 0);
+        p += strlen(p) + 1;
+
+        elf_section_header(p - shstrtab, efmt->reltype, 0, inforelbuf, false,
+                           inforellen, sec_symtab,
+                           sec_debug_info,
+                           efmt->word, efmt->relsize);
+        p += strlen(p) + 1;
+
+        elf_section_header(p - shstrtab, SHT_PROGBITS, 0, abbrevbuf, false,
+                           abbrevlen, 0, 0, 1, 0);
+        p += strlen(p) + 1;
+
+        elf_section_header(p - shstrtab, SHT_PROGBITS, 0, linebuf, false,
+                           linelen, 0, 0, 1, 0);
+        p += strlen(p) + 1;
+
+        elf_section_header(p - shstrtab, efmt->reltype, 0, linerelbuf, false,
+                           linerellen, sec_symtab,
+                           sec_debug_line,
+                           efmt->word, efmt->relsize);
+        p += strlen(p) + 1;
+
+        elf_section_header(p - shstrtab, SHT_PROGBITS, 0, framebuf, false,
+                           framelen, 0, 0, 8, 0);
+        p += strlen(p) + 1;
+
+        elf_section_header(p - shstrtab, SHT_PROGBITS, 0, locbuf, false,
+                           loclen, 0, 0, 1, 0);
+        p += strlen(p) + 1;
+    }
+
+    /* .shstrtab */
+    elf_section_header(p - shstrtab, SHT_STRTAB, 0, shstrtab, false,
+                       shstrtablen, 0, 0, 1, 0);
+    p += strlen(p) + 1;
+
+    /* .symtab */
+    elf_section_header(p - shstrtab, SHT_SYMTAB, 0, symtab, true,
+                       symtab->datalen, sec_strtab, symtablocal,
+                       efmt->word, efmt->sym_size);
+    p += strlen(p) + 1;
+
+    /* .strtab */
+    elf_section_header(p - shstrtab, SHT_STRTAB, 0, strs, true,
+                       strslen, 0, 0, 1, 0);
+    p += strlen(p) + 1
+;
+    /* .symtab_shndx */
+    if (symtab_shndx) {
+        elf_section_header(p - shstrtab, SHT_SYMTAB_SHNDX, 0,
+                           symtab_shndx, true, symtab_shndx->datalen,
+                           sec_symtab, 0, 1, 0);
+        p += strlen(p) + 1;
+    }
+
+    /* The relocation sections */
+    for (i = 0; i < nsects; i++) {
+        if (sectsi->rel) {
+            elf_section_header(p - shstrtab, efmt->reltype, 0,
+                               sectsi->rel, true, sectsi->rel->datalen,
+                               sec_symtab, sectsi->shndx,
+                               efmt->word, efmt->relsize);
+            p += strlen(p) + 1;
+        }
+    }
+    fwritezero(align, ofile);
+
+    /*
+     * Now output the sections.
+     */
+    elf_write_sections();
+
+    nasm_free(elf_sects);
+    saa_free(symtab);
+    if (symtab_shndx)
+        saa_free(symtab_shndx);
+}
+
+static size_t nsyms;
+
+static void elf_sym(const struct elf_symbol *sym)
+{
+    int shndx = sym->section;
+
+    /*
+     * Careful here. This relies on sym->section being signed; for
+     * special section indices this value needs to be cast to
+     * (int16_t) so that it sign-extends, however, here SHN_LORESERVE
+     * is used as an unsigned constant.
+     */
+    if (shndx >= (int)SHN_LORESERVE) {
+        if (unlikely(!symtab_shndx)) {
+            /* Create symtab_shndx and fill previous entries with zero */
+            symtab_shndx = saa_init(1);
+            saa_wbytes(symtab_shndx, NULL, nsyms << 2);
+        }
+    } else {
+        shndx = 0;              /* Section index table always write zero */
+    }
+
+    if (symtab_shndx)
+        saa_write32(symtab_shndx, shndx);
+
+    efmt->elf_sym(sym);
+    nsyms++;
+}
+
+static void elf32_sym(const struct elf_symbol *sym)
+{
+    Elf32_Sym sym32;
+
+    sym32.st_name     = cpu_to_le32(sym->strpos);
+    sym32.st_value    = cpu_to_le32(sym->symv.key);
+    sym32.st_size     = cpu_to_le32(sym->size);
+    sym32.st_info     = sym->type;
+    sym32.st_other    = sym->other;
+    sym32.st_shndx    = elf_shndx(sym->section, SHN_XINDEX);
+    saa_wbytes(symtab, &sym32, sizeof sym32);
+}
+
+static void elf64_sym(const struct elf_symbol *sym)
+{
+    Elf64_Sym sym64;
+
+    sym64.st_name     = cpu_to_le32(sym->strpos);
+    sym64.st_value    = cpu_to_le64(sym->symv.key);
+    sym64.st_size     = cpu_to_le64(sym->size);
+    sym64.st_info     = sym->type;
+    sym64.st_other    = sym->other;
+    sym64.st_shndx    = elf_shndx(sym->section, SHN_XINDEX);
+    saa_wbytes(symtab, &sym64, sizeof sym64);
+}
+
+static size_t elf_build_symtab(void)
+{
+    struct elf_symbol *sym, xsym;
+    size_t nlocal;
+    int i;
+
+    symtab       = saa_init(1);
+    symtab_shndx = NULL;
+
+    /*
+     * Zero symbol first as required by spec.
+     */
+    nasm_zero(xsym);
+    elf_sym(&xsym);
+
+    /*
+     * Next, an entry for the file name.
+     */
+    nasm_zero(xsym);
+    xsym.strpos  = 1;
+    xsym.type    = ELF32_ST_INFO(STB_LOCAL, STT_FILE);
+    xsym.section = XSHN_ABS;
+    elf_sym(&xsym);
+
+    /*
+     * Now some standard symbols defining the segments, for relocation
+     * purposes.
+     */
+    nasm_zero(xsym);
+    for (i = 1; i <= nsects; i++) {
+        xsym.type    = ELF64_ST_INFO(STB_LOCAL, STT_SECTION);
+        xsym.section = i;
+        elf_sym(&xsym);
+    }
+
+    /*
+     * dwarf needs symbols for debug sections
+     * which are relocation targets.
+     */
+    if (dfmt_is_dwarf()) {
+        dwarf_infosym   = nsyms;
+        xsym.section    = sec_debug_info;
+        elf_sym(&xsym);
+
+        dwarf_abbrevsym = nsyms;
+        xsym.section    = sec_debug_abbrev;
+        elf_sym(&xsym);
+
+        dwarf_linesym   = nsyms;
+        xsym.section    = sec_debug_line;
+        elf_sym(&xsym);
+    }
+
+    /*
+     * Now the other local symbols.
+     */
+    saa_rewind(syms);
+    while ((sym = saa_rstruct(syms))) {
+        if (!sym_type_local(sym->type))
+            continue;
+
+        elf_sym(sym);
+    }
+
+    nlocal = nsyms;
+
+    /*
+     * Now the global symbols.
+     */
+    saa_rewind(syms);
+    while ((sym = saa_rstruct(syms))) {
+        if (sym_type_local(sym->type))
+            continue;
+
+        elf_sym(sym);
+    }
+
+    return nlocal;
+}
+
+static struct SAA *elf32_build_reltab(const struct elf_reloc *r)
+{
+    struct SAA *s;
+    int32_t global_offset;
+    Elf32_Rel rel32;
+
+    if (!r)
+        return NULL;
+
+    s = saa_init(1L);
+
+    /*
+     * How to onvert from a global placeholder to a real symbol index;
+     * the +2 refers to the two special entries, the null entry and
+     * the filename entry.
+     */
+    global_offset = -GLOBAL_TEMP_BASE + nsects + nlocals + ndebugs + 2;
+
+    while (r) {
+        int32_t sym = r->symbol;
+
+        if (sym >= GLOBAL_TEMP_BASE)
+            sym += global_offset;
+
+        rel32.r_offset    = cpu_to_le32(r->address);
+        rel32.r_info      = cpu_to_le32(ELF32_R_INFO(sym, r->type));
+        saa_wbytes(s, &rel32, sizeof rel32);
+
+        r = r->next;
+    }
+
+    return s;
+}
+
+static struct SAA *elfx32_build_reltab(const struct elf_reloc *r)
+{
+    struct SAA *s;
+    int32_t global_offset;
+    Elf32_Rela rela32;
+
+    if (!r)
+        return NULL;
+
+    s = saa_init(1L);
+
+    /*
+     * How to onvert from a global placeholder to a real symbol index;
+     * the +2 refers to the two special entries, the null entry and
+     * the filename entry.
+     */
+    global_offset = -GLOBAL_TEMP_BASE + nsects + nlocals + ndebugs + 2;
+
+    while (r) {
+        int32_t sym = r->symbol;
+
+        if (sym >= GLOBAL_TEMP_BASE)
+            sym += global_offset;
+
+        rela32.r_offset   = cpu_to_le32(r->address);
+        rela32.r_info     = cpu_to_le32(ELF32_R_INFO(sym, r->type));
+        rela32.r_addend   = cpu_to_le32(r->offset);
+        saa_wbytes(s, &rela32, sizeof rela32);
+
+        r = r->next;
+    }
+
+    return s;
+}
+
+static struct SAA *elf64_build_reltab(const struct elf_reloc *r)
+{
+    struct SAA *s;
+    int32_t global_offset;
+    Elf64_Rela rela64;
+
+    if (!r)
+        return NULL;
+
+    s = saa_init(1L);
+
+    /*
+     * How to onvert from a global placeholder to a real symbol index;
+     * the +2 refers to the two special entries, the null entry and
+     * the filename entry.
+     */
+    global_offset = -GLOBAL_TEMP_BASE + nsects + nlocals + ndebugs + 2;
+
+    while (r) {
+        int32_t sym = r->symbol;
+
+        if (sym >= GLOBAL_TEMP_BASE)
+            sym += global_offset;
+
+        rela64.r_offset   = cpu_to_le64(r->address);
+        rela64.r_info     = cpu_to_le64(ELF64_R_INFO(sym, r->type));
+        rela64.r_addend   = cpu_to_le64(r->offset);
+        saa_wbytes(s, &rela64, sizeof rela64);
+
+        r = r->next;
+    }
+
+    return s;
+}
+
+static void elf_section_header(int name, int type, uint64_t flags,
+                               void *data, bool is_saa, uint64_t datalen,
+                               int link, int info,
+                               uint64_t align, uint64_t entsize)
+{
+    elf_sectself_nsect.data = data;
+    elf_sectself_nsect.len = datalen;
+    elf_sectself_nsect.is_saa = is_saa;
+    elf_nsect++;
+
+    if (!efmt->elf64) {
+        Elf32_Shdr  shdr;
+
+        shdr.sh_name         = cpu_to_le32(name);
+        shdr.sh_type         = cpu_to_le32(type);
+        shdr.sh_flags        = cpu_to_le32(flags);
+        shdr.sh_addr         = 0;
+        shdr.sh_offset       = cpu_to_le32(type == SHT_NULL ? 0 : elf_foffs);
+        shdr.sh_size         = cpu_to_le32(datalen);
+        if (data)
+            elf_foffs += ALIGN(datalen, SEC_FILEALIGN);
+        shdr.sh_link         = cpu_to_le32(link);
+        shdr.sh_info         = cpu_to_le32(info);
+        shdr.sh_addralign    = cpu_to_le32(align);
+        shdr.sh_entsize      = cpu_to_le32(entsize);
+
+        nasm_write(&shdr, sizeof shdr, ofile);
+    } else {
+        Elf64_Shdr  shdr;
+
+        shdr.sh_name         = cpu_to_le32(name);
+        shdr.sh_type         = cpu_to_le32(type);
+        shdr.sh_flags        = cpu_to_le64(flags);
+        shdr.sh_addr         = 0;
+        shdr.sh_offset       = cpu_to_le64(type == SHT_NULL ? 0 : elf_foffs);
+        shdr.sh_size         = cpu_to_le64(datalen);
+        if (data)
+            elf_foffs += ALIGN(datalen, SEC_FILEALIGN);
+        shdr.sh_link        = cpu_to_le32(link);
+        shdr.sh_info        = cpu_to_le32(info);
+        shdr.sh_addralign   = cpu_to_le64(align);
+        shdr.sh_entsize     = cpu_to_le64(entsize);
+
+        nasm_write(&shdr, sizeof shdr, ofile);
+    }
+}
+
+static void elf_write_sections(void)
+{
+    int i;
+    for (i = 0; i < elf_nsect; i++)
+        if (elf_sectsi.data) {
+            int32_t len = elf_sectsi.len;
+            int32_t reallen = ALIGN(len, SEC_FILEALIGN);
+            int32_t align = reallen - len;
+            if (elf_sectsi.is_saa)
+                saa_fpwrite(elf_sectsi.data, ofile);
+            else
+                nasm_write(elf_sectsi.data, len, ofile);
+            fwritezero(align, ofile);
+        }
+}
+
+static void elf_sect_write(struct elf_section *sect, const void *data, size_t len)
+{
+    saa_wbytes(sect->data, data, len);
+    sect->len += len;
+}
+
+static void elf_sect_writeaddr(struct elf_section *sect, int64_t data, size_t len)
+{
+    saa_writeaddr(sect->data, data, len);
+    sect->len += len;
+}
+
+static void elf_sectalign(int32_t seg, unsigned int value)
+{
+    struct elf_section *s;
+
+    s = raa_read_ptr(section_by_index, seg >> 1);
+    if (!s || !is_power2(value))
+        return;
+
+    if (value > s->align)
+        s->align = value;
+}
+
+extern macros_t elf_stdmac;
+
+/* Claim "elf" as a pragma namespace, for the future */
+static const struct pragma_facility elf_pragma_list =
+{
+    { "elf", NULL },
+    { NULL, NULL }          /* Implements the canonical output name */
+};
+
+
+static const struct dfmt elf32_df_dwarf = {
+    "ELF32 (i386) dwarf (newer)",
+    "dwarf",
+    dwarf32_init,
+    dwarf_linenum,
+    null_debug_deflabel,
+    NULL,                       /* .debug_smacros */
+    NULL,                       /* .debug_include */
+    NULL,                       /* .debug_mmacros */
+    null_debug_directive,
+    debug_typevalue,
+    dwarf_output,
+    dwarf_cleanup,
+    NULL                        /* pragma list */
+};
+
+static const struct dfmt elf32_df_stabs = {
+    "ELF32 (i386) stabs (older)",
+    "stabs",
+    null_debug_init,
+    stabs_linenum,
+    null_debug_deflabel,
+    NULL,                       /* .debug_smacros */
+    NULL,                       /* .debug_include */
+    NULL,                       /* .debug_mmacros */
+    null_debug_directive,
+    debug_typevalue,
+    stabs_output,
+    stabs_cleanup,
+    NULL                        /* pragma list */
+};
+
+static const struct dfmt * const elf32_debugs_arr3 =
+  { &elf32_df_dwarf, &elf32_df_stabs, NULL };
+
+const struct ofmt of_elf32 = {
+    "ELF32 (i386) (Linux, most Unix variants)",
+    "elf32",
+    ".o",
+    0,
+    32,
+    elf32_debugs_arr,
+    &elf32_df_dwarf,
+    elf_stdmac,
+    elf32_init,
+    null_reset,
+    nasm_do_legacy_output,
+    elf32_out,
+    elf_deflabel,
+    elf_section_names,
+    NULL,
+    elf_sectalign,
+    null_segbase,
+    elf_directive,
+    elf_cleanup,
+    elf_pragma_list,
+};
+
+static const struct dfmt elf64_df_dwarf = {
+    "ELF64 (x86-64) dwarf (newer)",
+    "dwarf",
+    dwarf64_init,
+    dwarf_linenum,
+    null_debug_deflabel,
+    NULL,                       /* .debug_smacros */
+    NULL,                       /* .debug_include */
+    NULL,                       /* .debug_mmacros */
+    null_debug_directive,
+    debug_typevalue,
+    dwarf_output,
+    dwarf_cleanup,
+    NULL                        /* pragma list */
+};
+
+static const struct dfmt elf64_df_stabs = {
+    "ELF64 (x86-64) stabs (older)",
+    "stabs",
+    null_debug_init,
+    stabs_linenum,
+    null_debug_deflabel,
+    NULL,                       /* .debug_smacros */
+    NULL,                       /* .debug_include */
+    NULL,                       /* .debug_mmacros */
+    null_debug_directive,
+    debug_typevalue,
+    stabs_output,
+    stabs_cleanup,
+    NULL                        /* pragma list */
+};
+
+static const struct dfmt * const elf64_debugs_arr3 =
+  { &elf64_df_dwarf, &elf64_df_stabs, NULL };
+
+const struct ofmt of_elf64 = {
+    "ELF64 (x86-64) (Linux, most Unix variants)",
+    "elf64",
+    ".o",
+    0,
+    64,
+    elf64_debugs_arr,
+    &elf64_df_dwarf,
+    elf_stdmac,
+    elf64_init,
+    null_reset,
+    nasm_do_legacy_output,
+    elf64_out,
+    elf_deflabel,
+    elf_section_names,
+    NULL,
+    elf_sectalign,
+    null_segbase,
+    elf_directive,
+    elf_cleanup,
+    elf_pragma_list,
+};
+
+static const struct dfmt elfx32_df_dwarf = {
+    "ELFx32 (x86-64) dwarf (newer)",
+    "dwarf",
+    dwarfx32_init,
+    dwarf_linenum,
+    null_debug_deflabel,
+    NULL,                       /* .debug_smacros */
+    NULL,                       /* .debug_include */
+    NULL,                       /* .debug_mmacros */
+    null_debug_directive,
+    debug_typevalue,
+    dwarf_output,
+    dwarf_cleanup,
+    NULL                        /* pragma list */
+};
+
+static const struct dfmt elfx32_df_stabs = {
+    "ELFx32 (x86-64) stabs (older)",
+    "stabs",
+    null_debug_init,
+    stabs_linenum,
+    null_debug_deflabel,
+    NULL,                       /* .debug_smacros */
+    NULL,                       /* .debug_include */
+    NULL,                       /* .debug_mmacros */
+    null_debug_directive,
+    debug_typevalue,
+    stabs_output,
+    stabs_cleanup,
+    elf_pragma_list,
+};
+
+static const struct dfmt * const elfx32_debugs_arr3 =
+  { &elfx32_df_dwarf, &elfx32_df_stabs, NULL };
+
+const struct ofmt of_elfx32 = {
+    "ELFx32 (ELF32 for x86-64) (Linux)",
+    "elfx32",
+    ".o",
+    0,
+    64,
+    elfx32_debugs_arr,
+    &elfx32_df_dwarf,
+    elf_stdmac,
+    elfx32_init,
+    null_reset,
+    nasm_do_legacy_output,
+    elfx32_out,
+    elf_deflabel,
+    elf_section_names,
+    NULL,
+    elf_sectalign,
+    null_segbase,
+    elf_directive,
+    elf_cleanup,
+    NULL                        /* pragma list */
+};
+
+static bool is_elf64(void)
+{
+	return ofmt == &of_elf64;
+}
+
+static bool is_elf32(void)
+{
+	return ofmt == &of_elf32;
+}
+
+static bool is_elfx32(void)
+{
+	return ofmt == &of_elfx32;
+}
+
+static bool dfmt_is_stabs(void)
+{
+	return dfmt == &elf32_df_stabs ||
+               dfmt == &elfx32_df_stabs ||
+               dfmt == &elf64_df_stabs;
+}
+
+static bool dfmt_is_dwarf(void)
+{
+	return dfmt == &elf32_df_dwarf ||
+               dfmt == &elfx32_df_dwarf ||
+               dfmt == &elf64_df_dwarf;
+}
+
+/* common debugging routines */
+static void debug_typevalue(int32_t type)
+{
+    int32_t stype, ssize;
+    switch (TYM_TYPE(type)) {
+        case TY_LABEL:
+            ssize = 0;
+            stype = STT_NOTYPE;
+            break;
+        case TY_BYTE:
+            ssize = 1;
+            stype = STT_OBJECT;
+            break;
+        case TY_WORD:
+            ssize = 2;
+            stype = STT_OBJECT;
+            break;
+        case TY_DWORD:
+            ssize = 4;
+            stype = STT_OBJECT;
+            break;
+        case TY_FLOAT:
+            ssize = 4;
+            stype = STT_OBJECT;
+            break;
+        case TY_QWORD:
+            ssize = 8;
+            stype = STT_OBJECT;
+            break;
+        case TY_TBYTE:
+            ssize = 10;
+            stype = STT_OBJECT;
+            break;
+        case TY_OWORD:
+            ssize = 16;
+            stype = STT_OBJECT;
+            break;
+        case TY_YWORD:
+            ssize = 32;
+            stype = STT_OBJECT;
+            break;
+        case TY_ZWORD:
+            ssize = 64;
+            stype = STT_OBJECT;
+            break;
+        case TY_COMMON:
+            ssize = 0;
+            stype = STT_COMMON;
+            break;
+        case TY_SEG:
+            ssize = 0;
+            stype = STT_SECTION;
+            break;
+        case TY_EXTERN:
+            ssize = 0;
+            stype = STT_NOTYPE;
+            break;
+        case TY_EQU:
+            ssize = 0;
+            stype = STT_NOTYPE;
+            break;
+        default:
+            ssize = 0;
+            stype = STT_NOTYPE;
+            break;
+    }
+    /* Set type and size info on most recently seen symbol if we haven't set it already.
+       But avoid setting size info on object (data) symbols in absolute sections (which
+       is primarily structs); some environments get confused with non-zero-extent absolute
+       object symbols and end up showing them in backtraces for NULL fn pointer calls. */
+    if (stype == STT_OBJECT && lastsym && !lastsym->type && lastsym->section != XSHN_ABS) {
+        lastsym->size = ssize;
+        lastsym->type = stype;
+    }
+}
+
+/* stabs debugging routines */
+
+static void stabs_linenum(const char *filename, int32_t linenumber, int32_t segto)
+{
+    (void)segto;
+    if (!stabs_filename) {
+        stabs_filename = nasm_malloc(strlen(filename) + 1);
+        strcpy(stabs_filename, filename);
+    } else {
+        if (strcmp(stabs_filename, filename)) {
+            /* yep, a memory leak...this program is one-shot anyway, so who cares...
+               in fact, this leak comes in quite handy to maintain a list of files
+               encountered so far in the symbol lines... */
+
+            /* why not nasm_free(stabs_filename); we're done with the old one */
+
+            stabs_filename = nasm_malloc(strlen(filename) + 1);
+            strcpy(stabs_filename, filename);
+        }
+    }
+    debug_immcall = 1;
+    currentline = linenumber;
+}
+
+static void stabs_output(int type, void *param)
+{
+    struct symlininfo *s;
+    struct linelist *el;
+    if (type == TY_DEBUGSYMLIN) {
+        if (debug_immcall) {
+            s = (struct symlininfo *)param;
+            if (!(sectss->section->flags & SHF_EXECINSTR))
+                return; /* line info is only collected for executable sections */
+            numlinestabs++;
+            el = nasm_malloc(sizeof(struct linelist));
+            el->info.offset = s->offset;
+            el->info.section = s->section;
+            el->info.name = s->name;
+            el->line = currentline;
+            el->filename = stabs_filename;
+            el->next = 0;
+            if (stabslines) {
+                stabslines->last->next = el;
+                stabslines->last = el;
+            } else {
+                stabslines = el;
+                stabslines->last = el;
+            }
+        }
+    }
+    debug_immcall = 0;
+}
+
+/* for creating the .stab , .stabstr and .rel.stab sections in memory */
+
+static void stabs_generate(void)
+{
+    int i, numfiles, strsize, numstabs = 0, currfile, mainfileindex;
+    uint8_t *sbuf, *ssbuf, *rbuf, *sptr, *rptr;
+    char **allfiles;
+    int *fileidx;
+
+    struct linelist *ptr;
+
+    ptr = stabslines;
+
+    allfiles = nasm_zalloc(numlinestabs * sizeof(char *));
+    numfiles = 0;
+    while (ptr) {
+        if (numfiles == 0) {
+            allfiles0 = ptr->filename;
+            numfiles++;
+        } else {
+            for (i = 0; i < numfiles; i++) {
+                if (!strcmp(allfilesi, ptr->filename))
+                    break;
+            }
+            if (i >= numfiles) {
+                allfilesi = ptr->filename;
+                numfiles++;
+            }
+        }
+        ptr = ptr->next;
+    }
+    strsize = 1;
+    fileidx = nasm_malloc(numfiles * sizeof(int));
+    for (i = 0; i < numfiles; i++) {
+        fileidxi = strsize;
+        strsize += strlen(allfilesi) + 1;
+    }
+    currfile = mainfileindex = 0;
+    for (i = 0; i < numfiles; i++) {
+        if (!strcmp(allfilesi, elf_module)) {
+            currfile = mainfileindex = i;
+            break;
+        }
+    }
+
+    /*
+     * worst case size of the stab buffer would be:
+     * the sourcefiles changes each line, which would mean 1 SOL, 1 SYMLIN per line
+     * plus one "ending" entry
+     */
+    sbuf = nasm_malloc((numlinestabs * 2 + 4) *
+                                    sizeof(struct stabentry));
+    ssbuf = nasm_malloc(strsize);
+    rbuf = nasm_malloc(numlinestabs * (is_elf64() ? 16 : 8) * (2 + 3));
+    rptr = rbuf;
+
+    for (i = 0; i < numfiles; i++)
+        strcpy((char *)ssbuf + fileidxi, allfilesi);
+    ssbuf0 = 0;
+
+    stabstrlen = strsize;       /* set global variable for length of stab strings */
+
+    sptr = sbuf;
+    ptr = stabslines;
+    numstabs = 0;
+
+    if (ptr) {
+        /*
+         * this is the first stab, its strx points to the filename of the
+         * source-file, the n_desc field should be set to the number
+         * of remaining stabs
+         */
+        WRITE_STAB(sptr, fileidx0, 0, 0, 0, stabstrlen);
+
+        /* this is the stab for the main source file */
+        WRITE_STAB(sptr, fileidxmainfileindex, N_SO, 0, 0, 0);
+
+        /* relocation table entry */
+
+        /*
+         * Since the symbol table has two entries before
+         * the section symbols, the index in the info.section
+         * member must be adjusted by adding 2
+         */
+
+        if (is_elf32()) {
+            WRITELONG(rptr, (sptr - sbuf) - 4);
+            WRITELONG(rptr, ((ptr->info.section + 2) << 8) | R_386_32);
+        } else if (is_elfx32()) {
+            WRITELONG(rptr, (sptr - sbuf) - 4);
+            WRITELONG(rptr, ((ptr->info.section + 2) << 8) | R_X86_64_32);
+            WRITELONG(rptr, 0);
+        } else {
+            nasm_assert(is_elf64());
+            WRITEDLONG(rptr, (int64_t)(sptr - sbuf) - 4);
+            WRITELONG(rptr, R_X86_64_32);
+            WRITELONG(rptr, ptr->info.section + 2);
+            WRITEDLONG(rptr, 0);
+        }
+        numstabs++;
+    }
+
+    if (is_elf32()) {
+        while (ptr) {
+            if (strcmp(allfilescurrfile, ptr->filename)) {
+                /* oops file has changed... */
+                for (i = 0; i < numfiles; i++)
+                    if (!strcmp(allfilesi, ptr->filename))
+                        break;
+                currfile = i;
+                WRITE_STAB(sptr, fileidxcurrfile, N_SOL, 0, 0,
+                           ptr->info.offset);
+                numstabs++;
+
+                /* relocation table entry */
+                WRITELONG(rptr, (sptr - sbuf) - 4);
+                WRITELONG(rptr, ((ptr->info.section + 2) << 8) | R_386_32);
+            }
+
+            WRITE_STAB(sptr, 0, N_SLINE, 0, ptr->line, ptr->info.offset);
+            numstabs++;
+
+            /* relocation table entry */
+            WRITELONG(rptr, (sptr - sbuf) - 4);
+            WRITELONG(rptr, ((ptr->info.section + 2) << 8) | R_386_32);
+
+            ptr = ptr->next;
+        }
+    } else if (is_elfx32()) {
+        while (ptr) {
+            if (strcmp(allfilescurrfile, ptr->filename)) {
+                /* oops file has changed... */
+                for (i = 0; i < numfiles; i++)
+                    if (!strcmp(allfilesi, ptr->filename))
+                        break;
+                currfile = i;
+                WRITE_STAB(sptr, fileidxcurrfile, N_SOL, 0, 0,
+                           ptr->info.offset);
+                numstabs++;
+
+                /* relocation table entry */
+                WRITELONG(rptr, (sptr - sbuf) - 4);
+                WRITELONG(rptr, ((ptr->info.section + 2) << 8) | R_X86_64_32);
+                WRITELONG(rptr, ptr->info.offset);
+            }
+
+            WRITE_STAB(sptr, 0, N_SLINE, 0, ptr->line, ptr->info.offset);
+            numstabs++;
+
+            /* relocation table entry */
+            WRITELONG(rptr, (sptr - sbuf) - 4);
+            WRITELONG(rptr, ((ptr->info.section + 2) << 8) | R_X86_64_32);
+            WRITELONG(rptr, ptr->info.offset);
+
+            ptr = ptr->next;
+        }
+    } else {
+        nasm_assert(is_elf64());
+        while (ptr) {
+            if (strcmp(allfilescurrfile, ptr->filename)) {
+                /* oops file has changed... */
+                for (i = 0; i < numfiles; i++)
+                    if (!strcmp(allfilesi, ptr->filename))
+                        break;
+                currfile = i;
+                WRITE_STAB(sptr, fileidxcurrfile, N_SOL, 0, 0,
+                           ptr->info.offset);
+                numstabs++;
+
+                /* relocation table entry */
+                WRITEDLONG(rptr, (int64_t)(sptr - sbuf) - 4);
+                WRITELONG(rptr, R_X86_64_32);
+                WRITELONG(rptr, ptr->info.section + 2);
+                WRITEDLONG(rptr, ptr->info.offset);
+            }
+
+            WRITE_STAB(sptr, 0, N_SLINE, 0, ptr->line, ptr->info.offset);
+            numstabs++;
+
+            /* relocation table entry */
+            WRITEDLONG(rptr, (int64_t)(sptr - sbuf) - 4);
+            WRITELONG(rptr, R_X86_64_32);
+            WRITELONG(rptr, ptr->info.section + 2);
+            WRITEDLONG(rptr, ptr->info.offset);
+
+            ptr = ptr->next;
+        }
+    }
+
+    /* this is an "ending" token */
+    WRITE_STAB(sptr, 0, N_SO, 0, 0, 0);
+    numstabs++;
+
+    ((struct stabentry *)sbuf)->n_desc = numstabs;
+
+    nasm_free(allfiles);
+    nasm_free(fileidx);
+
+    stablen = (sptr - sbuf);
+    stabrellen = (rptr - rbuf);
+    stabrelbuf = rbuf;
+    stabbuf = sbuf;
+    stabstrbuf = ssbuf;
+}
+
+static void stabs_cleanup(void)
+{
+    struct linelist *ptr, *del;
+    if (!stabslines)
+        return;
+
+    ptr = stabslines;
+    while (ptr) {
+        del = ptr;
+        ptr = ptr->next;
+        nasm_free(del);
+    }
+
+    nasm_free(stabbuf);
+    nasm_free(stabrelbuf);
+    nasm_free(stabstrbuf);
+}
+
+/* dwarf routines */
+
+static void dwarf_init_common(const struct dwarf_format *fmt)
+{
+    dwfmt = fmt;
+    ndebugs = 3; /* 3 debug symbols */
+}
+
+static void dwarf32_init(void)
+{
+    static const struct dwarf_format dwfmt32 = {
+        2,                          /* DWARF 2 */
+        /* section version numbers: */
+        { 2,                        /* .debug_aranges */
+          0,                        /* .rela.debug_aranges */
+          2,                        /* .debug_pubnames */
+          2,                        /* .debug_info */
+          0,                        /* .rela.debug_info */
+          0,                        /* .debug_abbrev */
+          2,                        /* .debug_line */
+          0,                        /* .rela.debug_line */
+          1,                        /* .debug_frame */
+          0 }                       /* .debug_loc */
+    };
+    dwarf_init_common(&dwfmt32);
+}
+
+static void dwarfx32_init(void)
+{
+    static const struct dwarf_format dwfmtx32 = {
+        3,                          /* DWARF 3 */
+        /* section version numbers: */
+        { 2,                        /* .debug_aranges */
+          0,                        /* .rela.debug_aranges */
+          2,                        /* .debug_pubnames */
+          3,                        /* .debug_info */
+          0,                        /* .rela.debug_info */
+          0,                        /* .debug_abbrev */
+          3,                        /* .debug_line */
+          0,                        /* .rela.debug_line */
+          3,                        /* .debug_frame */
+          0 }                       /* .debug_loc */
+    };
+    dwarf_init_common(&dwfmtx32);
+}
+
+static void dwarf64_init(void)
+{
+    static const struct dwarf_format dwfmt64 = {
+        3,                          /* DWARF 3 */
+        /* section version numbers: */
+        { 2,                        /* .debug_aranges */
+          0,                        /* .rela.debug_aranges */
+          2,                        /* .debug_pubnames */
+          3,                        /* .debug_info */
+          0,                        /* .rela.debug_info */
+          0,                        /* .debug_abbrev */
+          3,                        /* .debug_line */
+          0,                        /* .rela.debug_line */
+          3,                        /* .debug_frame */
+          0 }                       /* .debug_loc */
+    };
+    dwarf_init_common(&dwfmt64);
+}
+
+static void dwarf_linenum(const char *filename, int32_t linenumber,
+                            int32_t segto)
+{
+    (void)segto;
+    dwarf_findfile(filename);
+    debug_immcall = 1;
+    currentline = linenumber;
+}
+
+/* called from elf_out with type == TY_DEBUGSYMLIN */
+static void dwarf_output(int type, void *param)
+{
+    int ln, aa, inx, maxln, soc;
+    struct symlininfo *s;
+    struct SAA *plinep;
+
+    (void)type;
+
+    s = (struct symlininfo *)param;
+
+    /* line number info is only gathered for executable sections */
+    if (!(sectss->section->flags & SHF_EXECINSTR))
+        return;
+
+    /* Check if section index has changed */
+    if (!(dwarf_csect && (dwarf_csect->section) == (s->section)))
+        dwarf_findsect(s->section);
+
+    /* do nothing unless line or file has changed */
+    if (!debug_immcall)
+        return;
+
+    ln = currentline - dwarf_csect->line;
+    aa = s->offset - dwarf_csect->offset;
+    inx = dwarf_clist->line;
+    plinep = dwarf_csect->psaa;
+    /* check for file change */
+    if (!(inx == dwarf_csect->file)) {
+        saa_write8(plinep,DW_LNS_set_file);
+        saa_write8(plinep,inx);
+        dwarf_csect->file = inx;
+    }
+    /* check for line change */
+    if (ln) {
+        /* test if in range of special op code */
+        maxln = line_base + line_range;
+        soc = (ln - line_base) + (line_range * aa) + opcode_base;
+        if (ln >= line_base && ln < maxln && soc < 256) {
+            saa_write8(plinep,soc);
+        } else {
+            saa_write8(plinep,DW_LNS_advance_line);
+            saa_wleb128s(plinep,ln);
+            if (aa) {
+                saa_write8(plinep,DW_LNS_advance_pc);
+                saa_wleb128u(plinep,aa);
+            }
+            saa_write8(plinep,DW_LNS_copy);
+        }
+        dwarf_csect->line = currentline;
+        dwarf_csect->offset = s->offset;
+    }
+
+    /* show change handled */
+    debug_immcall = 0;
+}
+
+
+static void dwarf_generate(void)
+{
+    uint8_t *pbuf;
+    int indx;
+    struct linelist *ftentry;
+    struct SAA *paranges, *ppubnames, *pinfo, *pabbrev, *plines, *plinep;
+    struct SAA *parangesrel, *plinesrel, *pinforel;
+    struct sectlist *psect;
+    size_t saalen, linepoff, totlen, highaddr;
+
+    if (is_elf32()) {
+        /* write epilogues for each line program range */
+        /* and build aranges section */
+        paranges = saa_init(1L);
+        parangesrel = saa_init(1L);
+        saa_write16(paranges, dwfmt->sect_versionDWARF_ARANGES);
+        saa_write32(parangesrel, paranges->datalen+4);
+        saa_write32(parangesrel, (dwarf_infosym << 8) +  R_386_32); /* reloc to info */
+        saa_write32(paranges,0);    /* offset into info */
+        saa_write8(paranges,4);     /* pointer size */
+        saa_write8(paranges,0);     /* not segmented */
+        saa_write32(paranges,0);    /* padding */
+        /* iterate though sectlist entries */
+        psect = dwarf_fsect;
+        totlen = 0;
+        highaddr = 0;
+        for (indx = 0; indx < dwarf_nsections; indx++) {
+            plinep = psect->psaa;
+            /* Line Number Program Epilogue */
+            saa_write8(plinep,2);           /* std op 2 */
+            saa_write8(plinep,(sectspsect->section->len)-psect->offset);
+            saa_write8(plinep,DW_LNS_extended_op);
+            saa_write8(plinep,1);           /* operand length */
+            saa_write8(plinep,DW_LNE_end_sequence);
+            totlen += plinep->datalen;
+            /* range table relocation entry */
+            saa_write32(parangesrel, paranges->datalen + 4);
+            saa_write32(parangesrel, ((uint32_t) (psect->section + 2) << 8) +  R_386_32);
+            /* range table entry */
+            saa_write32(paranges,0x0000);   /* range start */
+            saa_write32(paranges,sectspsect->section->len); /* range length */
+            highaddr += sectspsect->section->len;
+            /* done with this entry */
+            psect = psect->next;
+        }
+        saa_write32(paranges,0);    /* null address */
+        saa_write32(paranges,0);    /* null length */
+        saalen = paranges->datalen;
+        arangeslen = saalen + 4;
+        arangesbuf = pbuf = nasm_malloc(arangeslen);
+        WRITELONG(pbuf,saalen);     /* initial length */
+        saa_rnbytes(paranges, pbuf, saalen);
+        saa_free(paranges);
+    } else if (is_elfx32()) {
+        /* write epilogues for each line program range */
+        /* and build aranges section */
+        paranges = saa_init(1L);
+        parangesrel = saa_init(1L);
+        saa_write16(paranges, dwfmt->sect_versionDWARF_ARANGES);
+        saa_write32(parangesrel, paranges->datalen+4);
+        saa_write32(parangesrel, (dwarf_infosym << 8) +  R_X86_64_32); /* reloc to info */
+        saa_write32(parangesrel, 0);
+        saa_write32(paranges,0);            /* offset into info */
+        saa_write8(paranges,4);             /* pointer size */
+        saa_write8(paranges,0);             /* not segmented */
+        saa_write32(paranges,0);            /* padding */
+        /* iterate though sectlist entries */
+        psect = dwarf_fsect;
+        totlen = 0;
+        highaddr = 0;
+        for (indx = 0; indx < dwarf_nsections; indx++)  {
+            plinep = psect->psaa;
+            /* Line Number Program Epilogue */
+            saa_write8(plinep,2);			/* std op 2 */
+            saa_write8(plinep,(sectspsect->section->len)-psect->offset);
+            saa_write8(plinep,DW_LNS_extended_op);
+            saa_write8(plinep,1);			/* operand length */
+            saa_write8(plinep,DW_LNE_end_sequence);
+            totlen += plinep->datalen;
+            /* range table relocation entry */
+            saa_write32(parangesrel, paranges->datalen + 4);
+            saa_write32(parangesrel, ((uint32_t) (psect->section + 2) << 8) +  R_X86_64_32);
+            saa_write32(parangesrel, (uint32_t) 0);
+            /* range table entry */
+            saa_write32(paranges,0x0000);		/* range start */
+            saa_write32(paranges,sectspsect->section->len);	/* range length */
+            highaddr += sectspsect->section->len;
+            /* done with this entry */
+            psect = psect->next;
+        }
+        saa_write32(paranges,0);		/* null address */
+        saa_write32(paranges,0);		/* null length */
+        saalen = paranges->datalen;
+        arangeslen = saalen + 4;
+        arangesbuf = pbuf = nasm_malloc(arangeslen);
+        WRITELONG(pbuf,saalen);			/* initial length */
+        saa_rnbytes(paranges, pbuf, saalen);
+        saa_free(paranges);
+    } else {
+        nasm_assert(is_elf64());
+        /* write epilogues for each line program range */
+        /* and build aranges section */
+        paranges = saa_init(1L);
+        parangesrel = saa_init(1L);
+        saa_write16(paranges, dwfmt->sect_versionDWARF_ARANGES);
+        saa_write64(parangesrel, paranges->datalen+4);
+        saa_write64(parangesrel, (dwarf_infosym << 32) +  R_X86_64_32); /* reloc to info */
+        saa_write64(parangesrel, 0);
+        saa_write32(paranges,0);            /* offset into info */
+        saa_write8(paranges,8);             /* pointer size */
+        saa_write8(paranges,0);             /* not segmented */
+        saa_write32(paranges,0);            /* padding */
+        /* iterate though sectlist entries */
+        psect = dwarf_fsect;
+        totlen = 0;
+        highaddr = 0;
+        for (indx = 0; indx < dwarf_nsections; indx++) {
+            plinep = psect->psaa;
+            /* Line Number Program Epilogue */
+            saa_write8(plinep,2);			/* std op 2 */
+            saa_write8(plinep,(sectspsect->section->len)-psect->offset);
+            saa_write8(plinep,DW_LNS_extended_op);
+            saa_write8(plinep,1);			/* operand length */
+            saa_write8(plinep,DW_LNE_end_sequence);
+            totlen += plinep->datalen;
+            /* range table relocation entry */
+            saa_write64(parangesrel, paranges->datalen + 4);
+            saa_write64(parangesrel, ((uint64_t) (psect->section + 2) << 32) +  R_X86_64_64);
+            saa_write64(parangesrel, (uint64_t) 0);
+            /* range table entry */
+            saa_write64(paranges,0x0000);		/* range start */
+            saa_write64(paranges,sectspsect->section->len);	/* range length */
+            highaddr += sectspsect->section->len;
+            /* done with this entry */
+            psect = psect->next;
+        }
+        saa_write64(paranges,0);		/* null address */
+        saa_write64(paranges,0);		/* null length */
+        saalen = paranges->datalen;
+        arangeslen = saalen + 4;
+        arangesbuf = pbuf = nasm_malloc(arangeslen);
+        WRITELONG(pbuf,saalen);			/* initial length */
+        saa_rnbytes(paranges, pbuf, saalen);
+        saa_free(paranges);
+    }
+
+    /* build rela.aranges section */
+    arangesrellen = saalen = parangesrel->datalen;
+    arangesrelbuf = pbuf = nasm_malloc(arangesrellen);
+    saa_rnbytes(parangesrel, pbuf, saalen);
+    saa_free(parangesrel);
+
+    /* build pubnames section */
+    if (0) {
+        ppubnames = saa_init(1L);
+        saa_write16(ppubnames,dwfmt->sect_versionDWARF_PUBNAMES);
+        saa_write32(ppubnames,0);   /* offset into info */
+        saa_write32(ppubnames,0);   /* space used in info */
+        saa_write32(ppubnames,0);   /* end of list */
+        saalen = ppubnames->datalen;
+        pubnameslen = saalen + 4;
+        pubnamesbuf = pbuf = nasm_malloc(pubnameslen);
+        WRITELONG(pbuf,saalen);     /* initial length */
+        saa_rnbytes(ppubnames, pbuf, saalen);
+        saa_free(ppubnames);
+    } else {
+        /* Don't write a section without actual information */
+        pubnameslen = 0;
+    }
+
+    if (is_elf32()) {
+        /* build info section */
+        pinfo = saa_init(1L);
+        pinforel = saa_init(1L);
+        saa_write16(pinfo, dwfmt->sect_versionDWARF_INFO);
+        saa_write32(pinforel, pinfo->datalen + 4);
+        saa_write32(pinforel, (dwarf_abbrevsym << 8) +  R_386_32); /* reloc to abbrev */
+        saa_write32(pinfo,0);       /* offset into abbrev */
+        saa_write8(pinfo,4);        /* pointer size */
+        saa_write8(pinfo,1);        /* abbrviation number LEB128u */
+        saa_write32(pinforel, pinfo->datalen + 4);
+        saa_write32(pinforel, ((dwarf_fsect->section + 2) << 8) +  R_386_32);
+        saa_write32(pinfo,0);       /* DW_AT_low_pc */
+        saa_write32(pinforel, pinfo->datalen + 4);
+        saa_write32(pinforel, ((dwarf_fsect->section + 2) << 8) +  R_386_32);
+        saa_write32(pinfo,highaddr);    /* DW_AT_high_pc */
+        saa_write32(pinforel, pinfo->datalen + 4);
+        saa_write32(pinforel, (dwarf_linesym << 8) +  R_386_32); /* reloc to line */
+        saa_write32(pinfo,0);       /* DW_AT_stmt_list */
+        saa_wbytes(pinfo, elf_module, strlen(elf_module)+1); /* DW_AT_name */
+        saa_wbytes(pinfo, elf_dir, strlen(elf_dir)+1); /* DW_AT_comp_dir */
+        saa_wbytes(pinfo, nasm_signature(), nasm_signature_len()+1);
+        saa_write16(pinfo,DW_LANG_Mips_Assembler);
+        saa_write8(pinfo,2);        /* abbrviation number LEB128u */
+        saa_write32(pinforel, pinfo->datalen + 4);
+        saa_write32(pinforel, ((dwarf_fsect->section + 2) << 8) +  R_386_32);
+        saa_write32(pinfo,0);       /* DW_AT_low_pc */
+        saa_write32(pinfo,0);       /* DW_AT_frame_base */
+        saa_write8(pinfo,0);        /* end of entries */
+        saalen = pinfo->datalen;
+        infolen = saalen + 4;
+        infobuf = pbuf = nasm_malloc(infolen);
+        WRITELONG(pbuf,saalen);     /* initial length */
+        saa_rnbytes(pinfo, pbuf, saalen);
+        saa_free(pinfo);
+    } else if (is_elfx32()) {
+        /* build info section */
+        pinfo = saa_init(1L);
+        pinforel = saa_init(1L);
+        saa_write16(pinfo, dwfmt->sect_versionDWARF_INFO);
+        saa_write32(pinforel, pinfo->datalen + 4);
+        saa_write32(pinforel, (dwarf_abbrevsym << 8) + R_X86_64_32); /* reloc to abbrev */
+        saa_write32(pinforel, 0);
+        saa_write32(pinfo,0);			/* offset into abbrev */
+        saa_write8(pinfo,4);			/* pointer size */
+        saa_write8(pinfo,1);			/* abbrviation number LEB128u */
+        saa_write32(pinforel, pinfo->datalen + 4);
+        saa_write32(pinforel, ((dwarf_fsect->section + 2) << 8) + R_X86_64_32);
+        saa_write32(pinforel, 0);
+        saa_write32(pinfo,0);			/* DW_AT_low_pc */
+        saa_write32(pinforel, pinfo->datalen + 4);
+        saa_write32(pinforel, ((dwarf_fsect->section + 2) << 8) + R_X86_64_32);
+        saa_write32(pinforel, highaddr);
+        saa_write32(pinfo,0);			/* DW_AT_high_pc */
+        saa_write32(pinforel, pinfo->datalen + 4);
+        saa_write32(pinforel, (dwarf_linesym << 8) + R_X86_64_32); /* reloc to line */
+        saa_write32(pinforel, 0);
+        saa_write32(pinfo,0);			/* DW_AT_stmt_list */
+        saa_wbytes(pinfo, elf_module, strlen(elf_module)+1); /* DW_AT_name */
+        saa_wbytes(pinfo, elf_dir, strlen(elf_dir)+1); /* DW_AT_comp_dir */
+        saa_wbytes(pinfo, nasm_signature(), nasm_signature_len()+1);
+        saa_write16(pinfo,DW_LANG_Mips_Assembler);
+        saa_write8(pinfo,2);			/* abbrviation number LEB128u */
+        saa_write32(pinforel, pinfo->datalen + 4);
+        saa_write32(pinforel, ((dwarf_fsect->section + 2) << 8) +  R_X86_64_32);
+        saa_write32(pinforel, 0);
+        saa_write32(pinfo,0);			/* DW_AT_low_pc */
+        saa_write32(pinfo,0);			/* DW_AT_frame_base */
+        saa_write8(pinfo,0);			/* end of entries */
+        saalen = pinfo->datalen;
+        infolen = saalen + 4;
+        infobuf = pbuf = nasm_malloc(infolen);
+        WRITELONG(pbuf,saalen);     /* initial length */
+        saa_rnbytes(pinfo, pbuf, saalen);
+        saa_free(pinfo);
+    } else {
+        nasm_assert(is_elf64());
+        /* build info section */
+        pinfo = saa_init(1L);
+        pinforel = saa_init(1L);
+        saa_write16(pinfo, dwfmt->sect_versionDWARF_INFO);
+        saa_write64(pinforel, pinfo->datalen + 4);
+        saa_write64(pinforel, (dwarf_abbrevsym << 32) +  R_X86_64_32); /* reloc to abbrev */
+        saa_write64(pinforel, 0);
+        saa_write32(pinfo,0);			/* offset into abbrev */
+        saa_write8(pinfo,8);			/* pointer size */
+        saa_write8(pinfo,1);			/* abbrviation number LEB128u */
+        saa_write64(pinforel, pinfo->datalen + 4);
+        saa_write64(pinforel, ((uint64_t)(dwarf_fsect->section + 2) << 32) +  R_X86_64_64);
+        saa_write64(pinforel, 0);
+        saa_write64(pinfo,0);			/* DW_AT_low_pc */
+        saa_write64(pinforel, pinfo->datalen + 4);
+        saa_write64(pinforel, ((uint64_t)(dwarf_fsect->section + 2) << 32) +  R_X86_64_64);
+        saa_write64(pinforel, highaddr);
+        saa_write64(pinfo,0);			/* DW_AT_high_pc */
+        saa_write64(pinforel, pinfo->datalen + 4);
+        saa_write64(pinforel, (dwarf_linesym << 32) +  R_X86_64_32); /* reloc to line */
+        saa_write64(pinforel, 0);
+        saa_write32(pinfo,0);			/* DW_AT_stmt_list */
+        saa_wbytes(pinfo, elf_module, strlen(elf_module)+1); /* DW_AT_name */
+        saa_wbytes(pinfo, elf_dir, strlen(elf_dir)+1); /* DW_AT_comp_dir */
+        saa_wbytes(pinfo, nasm_signature(), nasm_signature_len()+1);
+        saa_write16(pinfo,DW_LANG_Mips_Assembler);
+        saa_write8(pinfo,2);			/* abbrviation number LEB128u */
+        saa_write64(pinforel, pinfo->datalen + 4);
+        saa_write64(pinforel, ((uint64_t)(dwarf_fsect->section + 2) << 32) +  R_X86_64_64);
+        saa_write64(pinforel, 0);
+        saa_write64(pinfo,0);			/* DW_AT_low_pc */
+        saa_write64(pinfo,0);			/* DW_AT_frame_base */
+        saa_write8(pinfo,0);			/* end of entries */
+        saalen = pinfo->datalen;
+        infolen = saalen + 4;
+        infobuf = pbuf = nasm_malloc(infolen);
+        WRITELONG(pbuf,saalen);     /* initial length */
+        saa_rnbytes(pinfo, pbuf, saalen);
+        saa_free(pinfo);
+    }
+
+    /* build rela.info section */
+    inforellen = saalen = pinforel->datalen;
+    inforelbuf = pbuf = nasm_malloc(inforellen);
+    saa_rnbytes(pinforel, pbuf, saalen);
+    saa_free(pinforel);
+
+    /* build abbrev section */
+    pabbrev = saa_init(1L);
+    saa_write8(pabbrev,1);      /* entry number LEB128u */
+    saa_write8(pabbrev,DW_TAG_compile_unit);    /* tag LEB128u */
+    saa_write8(pabbrev,1);      /* has children */
+    /* the following attributes and forms are all LEB128u values */
+    saa_write8(pabbrev,DW_AT_low_pc);
+    saa_write8(pabbrev,DW_FORM_addr);
+    saa_write8(pabbrev,DW_AT_high_pc);
+    saa_write8(pabbrev,DW_FORM_addr);
+    saa_write8(pabbrev,DW_AT_stmt_list);
+    saa_write8(pabbrev,DW_FORM_data4);
+    saa_write8(pabbrev,DW_AT_name);
+    saa_write8(pabbrev,DW_FORM_string);
+    saa_write8(pabbrev,DW_AT_comp_dir);
+    saa_write8(pabbrev,DW_FORM_string);
+    saa_write8(pabbrev,DW_AT_producer);
+    saa_write8(pabbrev,DW_FORM_string);
+    saa_write8(pabbrev,DW_AT_language);
+    saa_write8(pabbrev,DW_FORM_data2);
+    saa_write16(pabbrev,0);     /* end of entry */
+    /* LEB128u usage same as above */
+    saa_write8(pabbrev,2);      /* entry number */
+    saa_write8(pabbrev,DW_TAG_subprogram);
+    saa_write8(pabbrev,0);      /* no children */
+    saa_write8(pabbrev,DW_AT_low_pc);
+    saa_write8(pabbrev,DW_FORM_addr);
+    saa_write8(pabbrev,DW_AT_frame_base);
+    saa_write8(pabbrev,DW_FORM_data4);
+    saa_write16(pabbrev,0);     /* end of entry */
+    /* Terminal zero entry */
+    saa_write8(pabbrev,0);
+    abbrevlen = saalen = pabbrev->datalen;
+    abbrevbuf = pbuf = nasm_malloc(saalen);
+    saa_rnbytes(pabbrev, pbuf, saalen);
+    saa_free(pabbrev);
+
+    /* build line section */
+    /* prolog */
+    plines = saa_init(1L);
+    saa_write8(plines,1);           /* Minimum Instruction Length */
+    saa_write8(plines,1);           /* Initial value of 'is_stmt' */
+    saa_write8(plines,line_base);   /* Line Base */
+    saa_write8(plines,line_range);  /* Line Range */
+    saa_write8(plines,opcode_base); /* Opcode Base */
+    /* standard opcode lengths (# of LEB128u operands) */
+    saa_write8(plines,0);           /* Std opcode 1 length */
+    saa_write8(plines,1);           /* Std opcode 2 length */
+    saa_write8(plines,1);           /* Std opcode 3 length */
+    saa_write8(plines,1);           /* Std opcode 4 length */
+    saa_write8(plines,1);           /* Std opcode 5 length */
+    saa_write8(plines,0);           /* Std opcode 6 length */
+    saa_write8(plines,0);           /* Std opcode 7 length */
+    saa_write8(plines,0);           /* Std opcode 8 length */
+    saa_write8(plines,1);           /* Std opcode 9 length */
+    saa_write8(plines,0);           /* Std opcode 10 length */
+    saa_write8(plines,0);           /* Std opcode 11 length */
+    saa_write8(plines,1);           /* Std opcode 12 length */
+    /* Directory Table */
+    saa_write8(plines,0);           /* End of table */
+    /* File Name Table */
+    ftentry = dwarf_flist;
+    for (indx = 0; indx < dwarf_numfiles; indx++) {
+        saa_wbytes(plines, ftentry->filename, (int32_t)(strlen(ftentry->filename) + 1));
+        saa_write8(plines,0);       /* directory  LEB128u */
+        saa_write8(plines,0);       /* time LEB128u */
+        saa_write8(plines,0);       /* size LEB128u */
+        ftentry = ftentry->next;
+    }
+    saa_write8(plines,0);           /* End of table */
+    linepoff = plines->datalen;
+    linelen = linepoff + totlen + 10;
+    linebuf = pbuf = nasm_malloc(linelen);
+    WRITELONG(pbuf,linelen-4);      /* initial length */
+    WRITESHORT(pbuf,dwfmt->sect_versionDWARF_LINE);
+    WRITELONG(pbuf,linepoff);       /* offset to line number program */
+    /* write line header */
+    saalen = linepoff;
+    saa_rnbytes(plines, pbuf, saalen);   /* read a given no. of bytes */
+    pbuf += linepoff;
+    saa_free(plines);
+    /* concatenate line program ranges */
+    linepoff += 13;
+    plinesrel = saa_init(1L);
+    psect = dwarf_fsect;
+    if (is_elf32()) {
+        for (indx = 0; indx < dwarf_nsections; indx++) {
+            saa_write32(plinesrel, linepoff);
+            saa_write32(plinesrel, ((uint32_t) (psect->section + 2) << 8) +  R_386_32);
+            plinep = psect->psaa;
+            saalen = plinep->datalen;
+            saa_rnbytes(plinep, pbuf, saalen);
+            pbuf += saalen;
+            linepoff += saalen;
+            saa_free(plinep);
+            /* done with this entry */
+            psect = psect->next;
+        }
+    } else if (is_elfx32()) {
+        for (indx = 0; indx < dwarf_nsections; indx++) {
+            saa_write32(plinesrel, linepoff);
+            saa_write32(plinesrel, ((psect->section + 2) << 8) + R_X86_64_32);
+            saa_write32(plinesrel, 0);
+            plinep = psect->psaa;
+            saalen = plinep->datalen;
+            saa_rnbytes(plinep, pbuf, saalen);
+            pbuf += saalen;
+            linepoff += saalen;
+            saa_free(plinep);
+            /* done with this entry */
+            psect = psect->next;
+        }
+    } else {
+        nasm_assert(is_elf64());
+        for (indx = 0; indx < dwarf_nsections; indx++) {
+            saa_write64(plinesrel, linepoff);
+            saa_write64(plinesrel, ((uint64_t) (psect->section + 2) << 32) +  R_X86_64_64);
+            saa_write64(plinesrel, (uint64_t) 0);
+            plinep = psect->psaa;
+            saalen = plinep->datalen;
+            saa_rnbytes(plinep, pbuf, saalen);
+            pbuf += saalen;
+            linepoff += saalen;
+            saa_free(plinep);
+            /* done with this entry */
+            psect = psect->next;
+        }
+    }
+
+    /* build rela.lines section */
+    linerellen =saalen = plinesrel->datalen;
+    linerelbuf = pbuf = nasm_malloc(linerellen);
+    saa_rnbytes(plinesrel, pbuf, saalen);
+    saa_free(plinesrel);
+
+    /* build .debug_frame section */
+    if (0) {
+        framelen = 4;
+        framebuf = pbuf = nasm_malloc(framelen);
+        WRITELONG(pbuf,framelen-4); /* initial length */
+    } else {
+        /* Leave .debug_frame empty if not used! */
+        framelen = 0;
+    }
+
+    /* build .debug_loc section */
+    if (0) {
+        loclen = 16;
+        locbuf = pbuf = nasm_malloc(loclen);
+        if (is_elf32() || is_elfx32()) {
+            WRITELONG(pbuf,0);  /* null  beginning offset */
+            WRITELONG(pbuf,0);  /* null  ending offset */
+        } else {
+            nasm_assert(is_elf64());
+            WRITEDLONG(pbuf,0);  /* null  beginning offset */
+            WRITEDLONG(pbuf,0);  /* null  ending offset */
+        }
+    } else {
+        /* Leave .debug_frame empty if not used! */
+        loclen = 0;
+    }
+}
+
+static void dwarf_cleanup(void)
+{
+    nasm_free(arangesbuf);
+    nasm_free(arangesrelbuf);
+    nasm_free(pubnamesbuf);
+    nasm_free(infobuf);
+    nasm_free(inforelbuf);
+    nasm_free(abbrevbuf);
+    nasm_free(linebuf);
+    nasm_free(linerelbuf);
+    nasm_free(framebuf);
+    nasm_free(locbuf);
+}
+
+static void dwarf_findfile(const char * fname)
+{
+    int finx;
+    struct linelist *match;
+
+    /* return if fname is current file name */
+    if (dwarf_clist && !(strcmp(fname, dwarf_clist->filename)))
+        return;
+
+    /* search for match */
+    match = 0;
+    if (dwarf_flist) {
+        match = dwarf_flist;
+        for (finx = 0; finx < dwarf_numfiles; finx++) {
+            if (!(strcmp(fname, match->filename))) {
+                dwarf_clist = match;
+                return;
+            }
+            match = match->next;
+        }
+    }
+
+    /* add file name to end of list */
+    dwarf_clist = nasm_malloc(sizeof(struct linelist));
+    dwarf_numfiles++;
+    dwarf_clist->line = dwarf_numfiles;
+    dwarf_clist->filename = nasm_malloc(strlen(fname) + 1);
+    strcpy(dwarf_clist->filename,fname);
+    dwarf_clist->next = 0;
+    if (!dwarf_flist) {     /* if first entry */
+        dwarf_flist = dwarf_elist = dwarf_clist;
+        dwarf_clist->last = 0;
+    } else {                /* chain to previous entry */
+        dwarf_elist->next = dwarf_clist;
+        dwarf_elist = dwarf_clist;
+    }
+}
+
+static void dwarf_findsect(const int index)
+{
+    int sinx;
+    struct sectlist *match;
+    struct SAA *plinep;
+
+    /* return if index is current section index */
+    if (dwarf_csect && (dwarf_csect->section == index))
+        return;
+
+    /* search for match */
+    match = 0;
+    if (dwarf_fsect) {
+        match = dwarf_fsect;
+        for (sinx = 0; sinx < dwarf_nsections; sinx++) {
+            if (match->section == index) {
+                dwarf_csect = match;
+                return;
+            }
+            match = match->next;
+        }
+    }
+
+    /* add entry to end of list */
+    dwarf_csect = nasm_malloc(sizeof(struct sectlist));
+    dwarf_nsections++;
+    dwarf_csect->psaa = plinep = saa_init(1L);
+    dwarf_csect->line = 1;
+    dwarf_csect->offset = 0;
+    dwarf_csect->file = 1;
+    dwarf_csect->section = index;
+    dwarf_csect->next = 0;
+    /* set relocatable address at start of line program */
+    saa_write8(plinep,DW_LNS_extended_op);
+    saa_write8(plinep,is_elf64() ? 9 : 5);   /* operand length */
+    saa_write8(plinep,DW_LNE_set_address);
+    if (is_elf64())
+        saa_write64(plinep,0);  /* Start Address */
+    else
+        saa_write32(plinep,0);  /* Start Address */
+
+    if (!dwarf_fsect) { /* if first entry */
+        dwarf_fsect = dwarf_esect = dwarf_csect;
+        dwarf_csect->last = 0;
+    } else {            /* chain to previous entry */
+        dwarf_esect->next = dwarf_csect;
+        dwarf_esect = dwarf_csect;
+    }
+}
+
+#endif /* defined(OF_ELF32) || defined(OF_ELF64) || defined(OF_ELFX32) */

_service:tar_scm:nasm-2.16.03.tar.xz/output/outelf.h Added

@@ -0,0 +1,133 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2019 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * Internal definitions common to outelf32 and outelf64
+ */
+#ifndef OUTPUT_OUTELF_H
+#define OUTPUT_OUTELF_H
+
+#include "elf.h"
+#include "rbtree.h"
+#include "saa.h"
+
+#define GLOBAL_TEMP_BASE  0x40000000 /* bigger than any sane symbol index */
+
+/* alignment of sections in file */
+#define SEC_FILEALIGN 16
+
+/* this stuff is needed for the dwarf/stabs debugging format */
+#define TY_DEBUGSYMLIN 0x40     /* internal call to debug_out */
+
+/*
+ * Debugging ELF sections (section indices starting with sec_debug)
+ */
+
+/* stabs */
+#define sec_stab                (sec_debug + 0)
+#define sec_stabstr             (sec_debug + 1)
+#define sec_rel_stab            (sec_debug + 2)
+
+/* stabs symbol table format */
+struct stabentry {
+    uint32_t    n_strx;
+    uint8_t     n_type;
+    uint8_t     n_other;
+    uint16_t    n_desc;
+    uint32_t    n_value;
+};
+
+/* dwarf */
+#define sec_debug_aranges       (sec_debug + 0)
+#define sec_rela_debug_aranges  (sec_debug + 1)
+#define sec_debug_pubnames      (sec_debug + 2)
+#define sec_debug_info          (sec_debug + 3)
+#define sec_rela_debug_info     (sec_debug + 4)
+#define sec_debug_abbrev        (sec_debug + 5)
+#define sec_debug_line          (sec_debug + 6)
+#define sec_rela_debug_line     (sec_debug + 7)
+#define sec_debug_frame         (sec_debug + 8)
+#define sec_debug_loc           (sec_debug + 9)
+
+extern uint8_t elf_osabi;
+extern uint8_t elf_abiver;
+
+#define WRITE_STAB(p,n_strx,n_type,n_other,n_desc,n_value)  \
+    do {                                                    \
+        WRITELONG(p, n_strx);                               \
+        WRITECHAR(p, n_type);                               \
+        WRITECHAR(p, n_other);                              \
+        WRITESHORT(p, n_desc);                              \
+        WRITELONG(p, n_value);                              \
+    } while (0)
+
+struct elf_reloc {
+    struct elf_reloc    *next;
+    int64_t             address;        /* relative to _start_ of section */
+    int64_t             symbol;         /* symbol index */
+    int64_t             offset;         /* symbol addend */
+    int                 type;           /* type of relocation */
+};
+
+struct elf_symbol {
+    struct rbtree       symv;           /* symbol value and symbol rbtree */
+    int32_t             strpos;         /* string table position of name */
+    int32_t             section;        /* section ID of the symbol */
+    int                 type;           /* symbol type */
+    int                 other;          /* symbol visibility */
+    int32_t             size;           /* size of symbol */
+    int32_t             globnum;        /* symbol table offset if global */
+    struct elf_symbol   *nextfwd;       /* list of unresolved-size symbols */
+    char                *name;          /* used temporarily if in above list */
+};
+
+struct elf_section {
+    struct SAA          *data;
+    uint64_t            len;
+    uint64_t            size;
+    uint64_t            nrelocs;
+    int32_t             index;		/* NASM index or NO_SEG if internal */
+    int			shndx;          /* ELF index */
+    int                 type;           /* SHT_* */
+    uint64_t            align;          /* alignment: power of two */
+    uint64_t            flags;          /* section flags */
+    int64_t		pass_last_seen;
+    uint64_t		entsize;        /* entry size */
+    char                *name;
+    struct SAA          *rel;
+    struct elf_reloc    *head;
+    struct elf_reloc    **tail;
+    struct rbtree       *gsyms;         /* global symbols in section */
+};
+
+#endif /* OUTPUT_OUTELF_H */

_service:tar_scm:nasm-2.16.03.tar.xz/output/outelf.mac Added

@@ -0,0 +1,41 @@
+;; --------------------------------------------------------------------------
+;;   
+;;   Copyright 1996-2017 The NASM Authors - All Rights Reserved
+;;   See the file AUTHORS included with the NASM distribution for
+;;   the specific copyright holders.
+;;
+;;   Redistribution and use in source and binary forms, with or without
+;;   modification, are permitted provided that the following
+;;   conditions are met:
+;;
+;;   * Redistributions of source code must retain the above copyright
+;;     notice, this list of conditions and the following disclaimer.
+;;   * Redistributions in binary form must reproduce the above
+;;     copyright notice, this list of conditions and the following
+;;     disclaimer in the documentation and/or other materials provided
+;;     with the distribution.
+;;     
+;;     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+;;     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+;;     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+;;     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;;     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+;;     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;;     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+;;     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+;;     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+;;     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+;;     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+;;     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;;     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+;; --------------------------------------------------------------------------
+
+OUT: elf elf32 elf64
+%define __?SECT?__ section .text
+%macro __?NASM_CDecl?__ 1
+%define $_%1 $%1
+%endmacro
+%imacro osabi 1+.nolist
+%? %1
+%endmacro

_service:tar_scm:nasm-2.16.03.tar.xz/output/outform.c Added

@@ -0,0 +1,135 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2011 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * outform.c	manages a list of output formats, and associates
+ *		them with their relevant drivers. Also has a
+ *		routine to find the correct driver given a name
+ *		for it
+ */
+
+#include "compiler.h"
+
+
+#define BUILD_DRIVERS_ARRAY
+#include "outform.h"
+#include "outlib.h"
+
+const struct ofmt *ofmt_find(const char *name,
+			     const struct ofmt_alias **ofmt_alias)
+{
+    const struct ofmt * const *ofp;
+    const struct ofmt *of;
+    unsigned int i;
+
+    *ofmt_alias = NULL;
+
+    /* primary targets first */
+    for (ofp = drivers; (of = *ofp); ofp++) {
+        if (!nasm_stricmp(name, of->shortname))
+            return of;
+    }
+
+    /* lets walk thru aliases then */
+    for (i = 0; i < ARRAY_SIZE(ofmt_aliases); i++) {
+        if (ofmt_aliasesi.shortname &&
+            !nasm_stricmp(name, ofmt_aliasesi.shortname)) {
+            *ofmt_alias = &ofmt_aliasesi;
+            return ofmt_aliasesi.ofmt;
+        }
+    }
+
+    return NULL;
+}
+
+const struct dfmt *dfmt_find(const struct ofmt *ofmt, const char *name)
+{
+    const struct dfmt * const *dfp;
+    const struct dfmt *df;
+
+    for (dfp = ofmt->debug_formats; (df = *dfp); dfp++) {
+        if (!nasm_stricmp(name, df->shortname))
+            return df;
+    }
+    return NULL;
+}
+
+void ofmt_list(const struct ofmt *deffmt, FILE * fp)
+{
+    const struct ofmt * const *ofp, *of;
+    unsigned int i;
+
+    /* primary targets first */
+    for (ofp = drivers; (of = *ofp); ofp++) {
+        fprintf(fp, "       %-20s %s%s\n",
+                of->shortname,
+                of->fullname,
+                of == deffmt ? " default" : "");
+    }
+
+    /* lets walk through aliases then */
+    for (i = 0; i < ARRAY_SIZE(ofmt_aliases); i++) {
+        if (!ofmt_aliasesi.shortname)
+            continue;
+        fprintf(fp, "       %-20s Legacy alias for \"%s\"\n",
+                ofmt_aliasesi.shortname,
+                ofmt_aliasesi.ofmt->shortname);
+    }
+}
+
+void dfmt_list(FILE *fp)
+{
+    const struct ofmt * const *ofp;
+    const struct ofmt *of;
+    const struct dfmt * const *dfp;
+    const struct dfmt *df;
+    char prefixbuf32;
+    const char *prefix;
+
+    for (ofp = drivers; (of = *ofp); ofp++) {
+        if (of->debug_formats && of->debug_formats != null_debug_arr) {
+            snprintf(prefixbuf, sizeof prefixbuf, "%s:",
+                     of->shortname);
+            prefix = prefixbuf;
+
+            for (dfp = of->debug_formats; (df = *dfp); dfp++) {
+                if (df != &null_debug_form)
+                    fprintf(fp, "       %-10s %-9s %s%s\n",
+                            prefix,
+                            df->shortname, df->fullname,
+                            df == of->default_dfmt ? " default" : "");
+                prefix = "";
+            }
+        }
+    }
+}

_service:tar_scm:nasm-2.16.03.tar.xz/output/outform.h Added

@@ -0,0 +1,354 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2022 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * outform.h    header file for binding output format drivers to the
+ *              remainder of the code in the Netwide Assembler
+ */
+
+/*
+ * This header file allows configuration of which output formats
+ * get compiled into the NASM binary. You can configure by defining
+ * various preprocessor symbols beginning with "OF_", either on the
+ * compiler command line or at the top of this file.
+ *
+ * OF_ONLY                -- only include specified object formats
+ * OF_name                -- ensure that output format 'name' is included
+ * OF_NO_name             -- remove output format 'name'
+ * OF_DOS                 -- ensure that 'obj', 'bin', 'win32' & 'win64' are included.
+ * OF_UNIX                -- ensure that 'aout', 'aoutb', 'coff', 'elf32' & 'elf64' are in.
+ * OF_OTHERS              -- ensure that 'bin', 'as86', 'rdf' 'macho32' & 'macho64' are in.
+ * OF_ALL                 -- ensure that all formats are included.
+ *                           note that this doesn't include 'dbg', which is
+ *                           only really useful if you're doing development
+ *                           work on NASM. Define OF_DBG if you want this.
+ *
+ * OF_DEFAULT=of_name     -- ensure that 'name' is the default format.
+ *
+ * eg: -DOF_UNIX -DOF_ELF32 -DOF_DEFAULT=of_elf32 would be a suitable config
+ * for an average linux system.
+ *
+ * Default config = -DOF_ALL -DOF_DEFAULT=of_bin
+ *
+ * You probably only want to set these options while compiling 'nasm.c'. */
+
+#ifndef NASM_OUTFORM_H
+#define NASM_OUTFORM_H
+
+#include "nasm.h"
+
+/* -------------- USER MODIFIABLE PART ---------------- */
+
+/*
+ * Insert #defines here in accordance with the configuration
+ * instructions above.
+ *
+ * E.g.
+ *
+ * #define OF_ONLY
+ * #define OF_OBJ
+ * #define OF_BIN
+ *
+ * for a 16-bit DOS assembler with no extraneous formats.
+ */
+
+/* ------------ END USER MODIFIABLE PART -------------- */
+
+/* ====configurable info begins here==== */
+/* formats configurable:
+ * bin,obj,elf32,elf64,aout,aoutb,coff,win32,as86,rdf2,macho32,macho64 */
+
+/* process options... */
+
+#ifndef OF_ONLY
+#ifndef OF_ALL
+#define OF_ALL                  /* default is to have all formats */
+#endif
+#endif
+
+#ifdef OF_ALL                   /* set all formats on... */
+#ifndef OF_BIN
+#define OF_BIN
+#endif
+#ifndef OF_OBJ
+#define OF_OBJ
+#endif
+#ifndef OF_ELF32
+#define OF_ELF32
+#endif
+#ifndef OF_ELFX32
+#define OF_ELFX32
+#endif
+#ifndef OF_ELF64
+#define OF_ELF64
+#endif
+#ifndef OF_COFF
+#define OF_COFF
+#endif
+#ifndef OF_AOUT
+#define OF_AOUT
+#endif
+#ifndef OF_AOUTB
+#define OF_AOUTB
+#endif
+#ifndef OF_WIN32
+#define OF_WIN32
+#endif
+#ifndef OF_WIN64
+#define OF_WIN64
+#endif
+#ifndef OF_AS86
+#define OF_AS86
+#endif
+#ifndef OF_IEEE
+#define OF_IEEE
+#endif
+#ifndef OF_MACHO32
+#define OF_MACHO32
+#endif
+#ifndef OF_MACHO64
+#define OF_MACHO64
+#endif
+#ifndef OF_DBG
+#define OF_DBG
+#endif
+#endif                          /* OF_ALL */
+
+/* turn on groups of formats specified.... */
+#ifdef OF_DOS
+#ifndef OF_OBJ
+#define OF_OBJ
+#endif
+#ifndef OF_BIN
+#define OF_BIN
+#endif
+#ifndef OF_COFF
+#define OF_COFF                 /* COFF is used by DJGPP */
+#endif
+#ifndef OF_WIN32
+#define OF_WIN32
+#endif
+#ifndef OF_WIN64
+#define OF_WIN64
+#endif
+#endif
+
+#ifdef OF_UNIX
+#ifndef OF_AOUT
+#define OF_AOUT
+#endif
+#ifndef OF_AOUTB
+#define OF_AOUTB
+#endif
+#ifndef OF_COFF
+#define OF_COFF
+#endif
+#ifndef OF_ELF32
+#define OF_ELF32
+#endif
+#ifndef OF_ELF64
+#define OF_ELF64
+#endif
+#ifndef OF_ELFX32
+#define OF_ELFX32
+#endif
+#endif
+
+#ifdef OF_OTHERS
+#ifndef OF_BIN
+#define OF_BIN
+#endif
+#ifndef OF_AS86
+#define OF_AS86
+#endif
+#ifndef OF_IEEE
+#define OF_IEEE
+#endif
+#ifndef OF_MACHO32
+#define OF_MACHO32
+#endif
+#ifndef OF_MACHO64
+#define OF_MACHO64
+#endif
+#endif
+
+/* finally... override any format specifically specified to be off */
+#ifdef OF_NO_BIN
+#undef OF_BIN
+#endif
+#ifdef OF_NO_OBJ
+#undef OF_OBJ
+#endif
+#ifdef OF_NO_ELF32
+#undef OF_ELF32
+#endif
+#ifdef OF_NO_ELF64
+#undef OF_ELF64
+#endif
+#ifdef OF_NO_ELFX32
+#undef OF_ELFX32
+#endif
+#ifdef OF_NO_AOUT
+#undef OF_AOUT
+#endif
+#ifdef OF_NO_AOUTB
+#undef OF_AOUTB
+#endif
+#ifdef OF_NO_COFF
+#undef OF_COFF
+#endif
+#ifdef OF_NO_WIN32
+#undef OF_WIN32
+#endif
+#ifdef OF_NO_WIN64
+#undef OF_WIN64
+#endif
+#ifdef OF_NO_AS86
+#undef OF_AS86
+#endif
+#ifdef OF_NO_IEEE
+#undef OF_IEEE
+#endif
+#ifdef OF_NO_MACHO32
+#undef OF_MACHO32
+#endif
+#ifdef OF_NO_MACHO64
+#undef OF_MACHO64
+#endif
+#ifdef OF_NO_DBG
+#undef OF_DBG
+#endif
+
+#ifndef OF_DEFAULT
+#define OF_DEFAULT of_bin
+#endif
+
+extern const struct ofmt of_bin;
+extern const struct ofmt of_ith;
+extern const struct ofmt of_srec;
+extern const struct ofmt of_aout;
+extern const struct ofmt of_aoutb;
+extern const struct ofmt of_coff;
+extern const struct ofmt of_elf32;
+extern const struct ofmt of_elfx32;
+extern const struct ofmt of_elf64;
+extern const struct ofmt of_as86;
+extern const struct ofmt of_obj;
+extern const struct ofmt of_win32;
+extern const struct ofmt of_win64;
+extern const struct ofmt of_ieee;
+extern const struct ofmt of_macho32;
+extern const struct ofmt of_macho64;
+extern const struct ofmt of_dbg;
+
+#ifdef BUILD_DRIVERS_ARRAY      /* only if included from outform.c */
+
+/*
+ * pull in the externs for the different formats, then make the
+ * drivers array based on the above defines
+ */
+
+static const struct ofmt * const drivers = {
+#ifdef OF_BIN
+    &of_bin,
+    &of_ith,
+    &of_srec,
+#endif
+#ifdef OF_AOUT
+    &of_aout,
+#endif
+#ifdef OF_AOUTB
+    &of_aoutb,
+#endif
+#ifdef OF_COFF
+    &of_coff,
+#endif
+#ifdef OF_ELF32
+    &of_elf32,
+#endif
+#ifdef OF_ELF64
+    &of_elf64,
+#endif
+#ifdef OF_ELFX32
+    &of_elfx32,
+#endif
+#ifdef OF_AS86
+    &of_as86,
+#endif
+#ifdef OF_OBJ
+    &of_obj,
+#endif
+#ifdef OF_WIN32
+    &of_win32,
+#endif
+#ifdef OF_WIN64
+    &of_win64,
+#endif
+#ifdef OF_IEEE
+    &of_ieee,
+#endif
+#ifdef OF_MACHO32
+    &of_macho32,
+#endif
+#ifdef OF_MACHO64
+    &of_macho64,
+#endif
+#ifdef OF_DBG
+    &of_dbg,
+#endif
+
+    NULL
+};
+
+static const struct ofmt_alias ofmt_aliases = {
+#ifdef OF_ELF32
+    { "elf",  &of_elf32 },
+#endif
+#ifdef OF_MACHO32
+    { "macho", &of_macho32 },
+#endif
+#ifdef OF_WIN32
+    { "win",   &of_win32 },
+#endif
+    { NULL, NULL }
+};
+
+#endif /* BUILD_DRIVERS_ARRAY */
+
+const struct ofmt *ofmt_find(const char *name, const struct ofmt_alias **ofmt_alias);
+const struct dfmt *dfmt_find(const struct ofmt *, const char *);
+void ofmt_list(const struct ofmt *, FILE *);
+void dfmt_list(FILE *);
+extern const struct dfmt null_debug_form;
+
+#endif /* NASM_OUTFORM_H */

_service:tar_scm:nasm-2.16.03.tar.xz/output/outieee.c Added

@@ -0,0 +1,1521 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2022 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * outieee.c	output routines for the Netwide Assembler to produce
+ *		IEEE-std object files
+ */
+
+/* notes: I have tried to make this correspond to the IEEE version
+ * of the standard, specifically the primary ASCII version.  It should
+ * be trivial to create the binary version given this source (which is
+ * one of MANY things that have to be done to make this correspond to
+ * the hp-microtek version of the standard).
+ *
+ * 16-bit support is assumed to use 24-bit addresses
+ * The linker can sort out segmentation-specific stuff
+ * if it keeps track of externals
+ * in terms of being relative to section bases
+ *
+ * A non-standard variable type, the 'Yn' variable, has been introduced.
+ * Basically it is a reference to extern 'n'- denoting the low limit
+ * (L-variable) of the section that extern 'n' is defined in.  Like the
+ * x variable, there may be no explicit assignment to it, it is derived
+ * from the public definition corresponding to the extern name.  This
+ * is required because the one thing the mufom guys forgot to do well was
+ * take into account segmented architectures.
+ *
+ * I use comment classes for various things and these are undefined by
+ * the standard.
+ *
+ * Debug info should be considered totally non-standard (local labels are
+ * standard but linenum records are not covered by the standard.
+ * Type defs have the standard format but absolute meanings for ordinal
+ * types are not covered by the standard.)
+ *
+ * David Lindauer, LADsoft
+ */
+#include "compiler.h"
+
+#include <time.h>
+#include <ctype.h>              /* For toupper() */
+#include "nctype.h"
+
+#include "nasm.h"
+#include "nasmlib.h"
+#include "error.h"
+#include "ver.h"
+
+#include "outform.h"
+#include "outlib.h"
+
+#ifdef OF_IEEE
+
+#define ARRAY_BOT 0x1
+
+static char ieee_infileFILENAME_MAX;
+static int ieee_uppercase;
+
+static bool any_segs;
+static int arrindex;
+
+#define HUNKSIZE 1024           /* Size of the data hunk */
+#define EXT_BLKSIZ 512
+#define LDPERLINE 32            /* bytes per line in output */
+
+struct ieeeSection;
+
+struct LineNumber {
+    struct LineNumber *next;
+    struct ieeeSection *segment;
+    int32_t offset;
+    int32_t lineno;
+};
+
+static struct FileName {
+    struct FileName *next;
+    char *name;
+    int32_t index;
+} *fnhead, **fntail;
+
+static struct Array {
+    struct Array *next;
+    unsigned size;
+    int basetype;
+} *arrhead, **arrtail;
+
+static struct ieeePublic {
+    struct ieeePublic *next;
+    char *name;
+    int32_t offset;
+    int32_t segment;               /* only if it's far-absolute */
+    int32_t index;
+    int type;                   /* for debug purposes */
+} *fpubhead, **fpubtail, *last_defined;
+
+static struct ieeeExternal {
+    struct ieeeExternal *next;
+    char *name;
+    int32_t commonsize;
+} *exthead, **exttail;
+
+static int externals;
+
+static struct ExtBack {
+    struct ExtBack *next;
+    int indexEXT_BLKSIZ;
+} *ebhead, **ebtail;
+
+/* NOTE: the first segment MUST be the lineno segment */
+static struct ieeeSection {
+    struct ieeeSection *next;
+    char *name;
+    struct ieeeObjData *data, *datacurr;
+    struct ieeeFixupp *fptr, *flptr;
+    int32_t index;                 /* the NASM segment id */
+    int32_t ieee_index;            /* the IEEE-file segment index */
+    int32_t currentpos;
+    int32_t align;                 /* can be SEG_ABS + absolute addr */
+    int32_t startpos;
+    int32_t use32;                 /* is this segment 32-bit? */
+    int64_t pass_last_seen;
+    struct ieeePublic *pubhead, **pubtail, *lochead, **loctail;
+    enum {
+        CMB_PRIVATE = 0,
+        CMB_PUBLIC = 2,
+        CMB_COMMON = 6
+    } combine;
+} *seghead, **segtail, *ieee_seg_needs_update;
+
+struct ieeeObjData {
+    struct ieeeObjData *next;
+    uint8_t dataHUNKSIZE;
+};
+
+struct ieeeFixupp {
+    struct ieeeFixupp *next;
+    enum {
+        FT_SEG = 0,
+        FT_REL = 1,
+        FT_OFS = 2,
+        FT_EXT = 3,
+        FT_WRT = 4,
+        FT_EXTREL = 5,
+        FT_EXTWRT = 6,
+        FT_EXTSEG = 7
+    } ftype;
+    int16_t size;
+    int32_t id1;
+    int32_t id2;
+    int32_t offset;
+    int32_t addend;
+};
+
+static int32_t ieee_entry_seg, ieee_entry_ofs;
+static int checksum;
+
+extern const struct ofmt of_ieee;
+static const struct dfmt ladsoft_debug_form;
+
+static void ieee_data_new(struct ieeeSection *);
+static void ieee_write_fixup(int32_t, int32_t, struct ieeeSection *,
+                             int, uint64_t, int32_t);
+static void ieee_install_fixup(struct ieeeSection *, struct ieeeFixupp *);
+static int32_t ieee_segment(char *, int *);
+static void ieee_write_file(void);
+static void ieee_write_byte(struct ieeeSection *, int);
+static void ieee_write_word(struct ieeeSection *, int);
+static void ieee_write_dword(struct ieeeSection *, int32_t);
+static void ieee_putascii(char *, ...);
+static void ieee_putcs(int);
+static int32_t ieee_putld(int32_t, int32_t, uint8_t *);
+static int32_t ieee_putlr(struct ieeeFixupp *);
+static void ieee_unqualified_name(char *, char *);
+
+/*
+ * pup init
+ */
+static void ieee_init(void)
+{
+    strlcpy(ieee_infile, inname, sizeof(ieee_infile));
+    any_segs = false;
+    fpubhead = NULL;
+    fpubtail = &fpubhead;
+    exthead = NULL;
+    exttail = &exthead;
+    externals = 1;
+    ebhead = NULL;
+    ebtail = &ebhead;
+    seghead = ieee_seg_needs_update = NULL;
+    segtail = &seghead;
+    ieee_entry_seg = NO_SEG;
+    ieee_uppercase = false;
+    checksum = 0;
+}
+
+/*
+ * Rundown
+ */
+static void ieee_cleanup(void)
+{
+    ieee_write_file();
+    dfmt->cleanup();
+    while (seghead) {
+        struct ieeeSection *segtmp = seghead;
+        seghead = seghead->next;
+        while (segtmp->pubhead) {
+            struct ieeePublic *pubtmp = segtmp->pubhead;
+            segtmp->pubhead = pubtmp->next;
+            nasm_free(pubtmp);
+        }
+        while (segtmp->fptr) {
+            struct ieeeFixupp *fixtmp = segtmp->fptr;
+            segtmp->fptr = fixtmp->next;
+            nasm_free(fixtmp);
+        }
+        while (segtmp->data) {
+            struct ieeeObjData *dattmp = segtmp->data;
+            segtmp->data = dattmp->next;
+            nasm_free(dattmp);
+        }
+        nasm_free(segtmp);
+    }
+    while (fpubhead) {
+        struct ieeePublic *pubtmp = fpubhead;
+        fpubhead = fpubhead->next;
+        nasm_free(pubtmp);
+    }
+    while (exthead) {
+        struct ieeeExternal *exttmp = exthead;
+        exthead = exthead->next;
+        nasm_free(exttmp);
+    }
+    while (ebhead) {
+        struct ExtBack *ebtmp = ebhead;
+        ebhead = ebhead->next;
+        nasm_free(ebtmp);
+    }
+}
+
+/*
+ * callback for labels
+ */
+static void ieee_deflabel(char *name, int32_t segment,
+                          int64_t offset, int is_global, char *special)
+{
+    /*
+     * We have three cases:
+     *
+     * (i) `segment' is a segment-base. If so, set the name field
+     * for the segment structure it refers to, and then
+     * return.
+     *
+     * (ii) `segment' is one of our segments, or a SEG_ABS segment.
+     * Save the label position for later output of a PUBDEF record.
+     *
+     *
+     * (iii) `segment' is not one of our segments. Save the label
+     * position for later output of an EXTDEF.
+     */
+    struct ieeeExternal *ext;
+    struct ExtBack *eb;
+    struct ieeeSection *seg;
+    int i;
+
+    if (special)
+        nasm_nonfatal("unrecognised symbol type `%s'", special);
+    /*
+     * First check for the double-period, signifying something
+     * unusual.
+     */
+    if (name0 == '.' && name1 == '.' && name2 != '@') {
+        if (!strcmp(name, "..start")) {
+            ieee_entry_seg = segment;
+            ieee_entry_ofs = offset;
+        }
+        return;
+    }
+
+    /*
+     * Case (i):
+     */
+    if (ieee_seg_needs_update) {
+        ieee_seg_needs_update->name = name;
+        return;
+    }
+    if (segment < SEG_ABS && segment != NO_SEG && segment % 2)
+        return;
+
+    /*
+     * case (ii)
+     */
+    if (segment >= SEG_ABS) {
+        /*
+         * SEG_ABS subcase of (ii).
+         */
+        if (is_global) {
+            struct ieeePublic *pub;
+
+            pub = *fpubtail = nasm_malloc(sizeof(*pub));
+            fpubtail = &pub->next;
+            pub->next = NULL;
+            pub->name = name;
+            pub->offset = offset;
+            pub->segment = segment & ~SEG_ABS;
+        }
+        return;
+    }
+
+    for (seg = seghead; seg && is_global; seg = seg->next)
+        if (seg->index == segment) {
+            struct ieeePublic *pub;
+
+            last_defined = pub = *seg->pubtail = nasm_malloc(sizeof(*pub));
+            seg->pubtail = &pub->next;
+            pub->next = NULL;
+            pub->name = name;
+            pub->offset = offset;
+            pub->index = seg->ieee_index;
+            pub->segment = -1;
+            return;
+        }
+
+    /*
+     * Case (iii).
+     */
+    if (is_global) {
+        ext = *exttail = nasm_malloc(sizeof(*ext));
+        ext->next = NULL;
+        exttail = &ext->next;
+        ext->name = name;
+        if (is_global == 2)
+            ext->commonsize = offset;
+        else
+            ext->commonsize = 0;
+        i = segment / 2;
+        eb = ebhead;
+        if (!eb) {
+            eb = *ebtail = nasm_zalloc(sizeof(*eb));
+            eb->next = NULL;
+            ebtail = &eb->next;
+        }
+        while (i > EXT_BLKSIZ) {
+            if (eb && eb->next)
+                eb = eb->next;
+            else {
+                eb = *ebtail = nasm_zalloc(sizeof(*eb));
+                eb->next = NULL;
+                ebtail = &eb->next;
+            }
+            i -= EXT_BLKSIZ;
+        }
+        eb->indexi = externals++;
+    }
+
+}
+
+/*
+ * Put data out
+ */
+static void ieee_out(int32_t segto, const void *data,
+		     enum out_type type, uint64_t size,
+                     int32_t segment, int32_t wrt)
+{
+    const uint8_t *ucdata;
+    int32_t ldata;
+    struct ieeeSection *seg;
+
+    /*
+     * If `any_segs' is still false, we must define a default
+     * segment.
+     */
+    if (!any_segs) {
+        int tempint;            /* ignored */
+        if (segto != ieee_segment("__NASMDEFSEG", &tempint))
+            nasm_panic("strange segment conditions in IEEE driver");
+    }
+
+    /*
+     * Find the segment we are targeting.
+     */
+    for (seg = seghead; seg; seg = seg->next)
+        if (seg->index == segto)
+            break;
+    if (!seg)
+        nasm_panic("code directed to nonexistent segment?");
+
+    if (type == OUT_RAWDATA) {
+        ucdata = data;
+        while (size--)
+            ieee_write_byte(seg, *ucdata++);
+    } else if (type == OUT_ADDRESS || type == OUT_REL2ADR ||
+               type == OUT_REL4ADR) {
+        if (type == OUT_ADDRESS)
+            size = abs((int)size);
+        else if (segment == NO_SEG)
+            nasm_nonfatal("relative call to absolute address not"
+                          " supported by IEEE format");
+        ldata = *(int64_t *)data;
+        if (type == OUT_REL2ADR)
+            ldata += (size - 2);
+        if (type == OUT_REL4ADR)
+            ldata += (size - 4);
+        ieee_write_fixup(segment, wrt, seg, size, type, ldata);
+        if (size == 2)
+            ieee_write_word(seg, ldata);
+        else
+            ieee_write_dword(seg, ldata);
+    } else if (type == OUT_RESERVE) {
+        while (size--)
+            ieee_write_byte(seg, 0);
+    }
+}
+
+static void ieee_data_new(struct ieeeSection *segto)
+{
+
+    if (!segto->data)
+        segto->data = segto->datacurr =
+            nasm_malloc(sizeof(*(segto->datacurr)));
+    else
+        segto->datacurr = segto->datacurr->next =
+            nasm_malloc(sizeof(*(segto->datacurr)));
+    segto->datacurr->next = NULL;
+}
+
+/*
+ * this routine is unalduterated bloatware.  I usually don't do this
+ * but I might as well see what it is like on a harmless program.
+ * If anyone wants to optimize this is a good canditate!
+ */
+static void ieee_write_fixup(int32_t segment, int32_t wrt,
+                             struct ieeeSection *segto, int size,
+                             uint64_t realtype, int32_t offset)
+{
+    struct ieeeSection *target;
+    struct ieeeFixupp s;
+
+    /* Don't put a fixup for things NASM can calculate */
+    if (wrt == NO_SEG && segment == NO_SEG)
+        return;
+
+    s.ftype = -1;
+    /* if it is a WRT offset */
+    if (wrt != NO_SEG) {
+        s.ftype = FT_WRT;
+        s.addend = offset;
+        if (wrt >= SEG_ABS)
+            s.id1 = -(wrt - SEG_ABS);
+        else {
+            if (wrt % 2 && realtype != OUT_REL2ADR
+                && realtype != OUT_REL4ADR) {
+                wrt--;
+
+                for (target = seghead; target; target = target->next)
+                    if (target->index == wrt)
+                        break;
+                if (target) {
+                    s.id1 = target->ieee_index;
+                    for (target = seghead; target; target = target->next)
+                        if (target->index == segment)
+                            break;
+
+                    if (target)
+                        s.id2 = target->ieee_index;
+                    else {
+                        /*
+                         * Now we assume the segment field is being used
+                         * to hold an extern index
+                         */
+                        int32_t i = segment / 2;
+                        struct ExtBack *eb = ebhead;
+                        while (i > EXT_BLKSIZ) {
+                            if (eb)
+                                eb = eb->next;
+                            else
+                                break;
+                            i -= EXT_BLKSIZ;
+                        }
+                        /* if we have an extern decide the type and make a record
+                         */
+                        if (eb) {
+                            s.ftype = FT_EXTWRT;
+                            s.addend = 0;
+                            s.id2 = eb->indexi;
+                        } else
+                            nasm_nonfatal("source of WRT must be an offset");
+                    }
+
+                } else
+                    nasm_panic("unrecognised WRT value in ieee_write_fixup");
+            } else
+                nasm_nonfatal("target of WRT must be a section");
+        }
+        s.size = size;
+        ieee_install_fixup(segto, &s);
+        return;
+    }
+    /* Pure segment fixup ? */
+    if (segment != NO_SEG) {
+        s.ftype = FT_SEG;
+        s.id1 = 0;
+        if (segment >= SEG_ABS) {
+            /* absolute far segment fixup */
+            s.id1 = -(segment - ~SEG_ABS);
+        } else if (segment % 2) {
+            /* fixup to named segment */
+            /* look it up */
+            for (target = seghead; target; target = target->next)
+                if (target->index == segment - 1)
+                    break;
+            if (target)
+                s.id1 = target->ieee_index;
+            else {
+                /*
+                 * Now we assume the segment field is being used
+                 * to hold an extern index
+                 */
+                int32_t i = segment / 2;
+                struct ExtBack *eb = ebhead;
+                while (i > EXT_BLKSIZ) {
+                    if (eb)
+                        eb = eb->next;
+                    else
+                        break;
+                    i -= EXT_BLKSIZ;
+                }
+                /* if we have an extern decide the type and make a record
+                 */
+                if (eb) {
+                    if (realtype == OUT_REL2ADR || realtype == OUT_REL4ADR) {
+                        nasm_panic("Segment of a rel not supported in ieee_write_fixup");
+                    } else {
+                        /* If we want the segment */
+                        s.ftype = FT_EXTSEG;
+                        s.addend = 0;
+                        s.id1 = eb->indexi;
+                    }
+
+                } else
+                    /* If we get here the seg value doesn't make sense */
+                    nasm_panic("unrecognised segment value in ieee_write_fixup");
+            }
+
+        } else {
+            /* Assume we are offsetting directly from a section
+             * So look up the target segment
+             */
+            for (target = seghead; target; target = target->next)
+                if (target->index == segment)
+                    break;
+            if (target) {
+                if (realtype == OUT_REL2ADR || realtype == OUT_REL4ADR) {
+                    /* PC rel to a known offset */
+                    s.id1 = target->ieee_index;
+                    s.ftype = FT_REL;
+                    s.size = size;
+                    s.addend = offset;
+                } else {
+                    /* We were offsetting from a seg */
+                    s.id1 = target->ieee_index;
+                    s.ftype = FT_OFS;
+                    s.size = size;
+                    s.addend = offset;
+                }
+            } else {
+                /*
+                 * Now we assume the segment field is being used
+                 * to hold an extern index
+                 */
+                int32_t i = segment / 2;
+                struct ExtBack *eb = ebhead;
+                while (i > EXT_BLKSIZ) {
+                    if (eb)
+                        eb = eb->next;
+                    else
+                        break;
+                    i -= EXT_BLKSIZ;
+                }
+                /* if we have an extern decide the type and make a record
+                 */
+                if (eb) {
+                    if (realtype == OUT_REL2ADR || realtype == OUT_REL4ADR) {
+                        s.ftype = FT_EXTREL;
+                        s.addend = 0;
+                        s.id1 = eb->indexi;
+                    } else {
+                        /* else we want the external offset */
+                        s.ftype = FT_EXT;
+                        s.addend = 0;
+                        s.id1 = eb->indexi;
+                    }
+
+                } else
+                    /* If we get here the seg value doesn't make sense */
+                    nasm_panic("unrecognised segment value in ieee_write_fixup");
+            }
+        }
+        if (size != 2 && s.ftype == FT_SEG)
+            nasm_nonfatal("IEEE format can only handle 2-byte"
+                          " segment base references");
+        s.size = size;
+        ieee_install_fixup(segto, &s);
+        return;
+    }
+    /* should never get here */
+}
+static void ieee_install_fixup(struct ieeeSection *seg,
+                               struct ieeeFixupp *fix)
+{
+    struct ieeeFixupp *f;
+    f = nasm_malloc(sizeof(struct ieeeFixupp));
+    memcpy(f, fix, sizeof(struct ieeeFixupp));
+    f->offset = seg->currentpos;
+    seg->currentpos += fix->size;
+    f->next = NULL;
+    if (seg->fptr)
+        seg->flptr = seg->flptr->next = f;
+    else
+        seg->fptr = seg->flptr = f;
+
+}
+
+/*
+ * segment registry
+ */
+static int32_t ieee_segment(char *name, int *bits)
+{
+    /*
+     * We call the label manager here to define a name for the new
+     * segment, and when our _own_ label-definition stub gets
+     * called in return, it should register the new segment name
+     * using the pointer it gets passed. That way we save memory,
+     * by sponging off the label manager.
+     */
+    if (!name) {
+        *bits = 16;
+        if (!any_segs)
+            return 0;
+        return seghead->index;
+    } else {
+        struct ieeeSection *seg;
+        int ieee_idx, attrs;
+	bool rn_error;
+        char *p;
+
+        /*
+         * Look for segment attributes.
+         */
+        attrs = 0;
+        while (*name == '.')
+            name++;             /* hack, but a documented one */
+        p = name;
+        while (*p && !nasm_isspace(*p))
+            p++;
+        if (*p) {
+            *p++ = '\0';
+            while (*p && nasm_isspace(*p))
+                *p++ = '\0';
+        }
+        while (*p) {
+            while (*p && !nasm_isspace(*p))
+                p++;
+            if (*p) {
+                *p++ = '\0';
+                while (*p && nasm_isspace(*p))
+                    *p++ = '\0';
+            }
+
+            attrs++;
+        }
+
+        ieee_idx = 1;
+        for (seg = seghead; seg; seg = seg->next) {
+            ieee_idx++;
+            if (!strcmp(seg->name, name)) {
+                if (attrs > 0 && seg->pass_last_seen == pass_count())
+                    nasm_warn(WARN_OTHER, "segment attributes specified on"
+                              " redeclaration of segment: ignoring");
+                if (seg->use32)
+                    *bits = 32;
+                else
+                    *bits = 16;
+
+                seg->pass_last_seen = pass_count();
+                return seg->index;
+            }
+        }
+
+        *segtail = seg = nasm_malloc(sizeof(*seg));
+        seg->next = NULL;
+        segtail = &seg->next;
+        seg->index = seg_alloc();
+        seg->ieee_index = ieee_idx;
+        any_segs = true;
+        seg->name = NULL;
+        seg->currentpos = 0;
+        seg->align = 1;         /* default */
+        seg->use32 = *bits == 32;       /* default to user spec */
+        seg->combine = CMB_PUBLIC;      /* default */
+        seg->pubhead = NULL;
+        seg->pubtail = &seg->pubhead;
+        seg->data = NULL;
+        seg->fptr = NULL;
+        seg->lochead = NULL;
+        seg->loctail = &seg->lochead;
+
+        /*
+         * Process the segment attributes.
+         */
+        p = name;
+        while (attrs--) {
+            p += strlen(p);
+            while (!*p)
+                p++;
+
+            /*
+             * `p' contains a segment attribute.
+             */
+            if (!nasm_stricmp(p, "private"))
+                seg->combine = CMB_PRIVATE;
+            else if (!nasm_stricmp(p, "public"))
+                seg->combine = CMB_PUBLIC;
+            else if (!nasm_stricmp(p, "common"))
+                seg->combine = CMB_COMMON;
+            else if (!nasm_stricmp(p, "use16"))
+                seg->use32 = false;
+            else if (!nasm_stricmp(p, "use32"))
+                seg->use32 = true;
+            else if (!nasm_strnicmp(p, "align=", 6)) {
+                seg->align = readnum(p + 6, &rn_error);
+                if (seg->align == 0)
+                    seg->align = 1;
+                if (rn_error) {
+                    seg->align = 1;
+                    nasm_nonfatal("segment alignment should be numeric");
+                }
+                switch (seg->align) {
+                case 1:        /* BYTE */
+                case 2:        /* WORD */
+                case 4:        /* DWORD */
+                case 16:       /* PARA */
+                case 256:      /* PAGE */
+                case 8:
+                case 32:
+                case 64:
+                case 128:
+                    break;
+                default:
+                    nasm_nonfatal("invalid alignment value %d", seg->align);
+                    seg->align = 1;
+                    break;
+                }
+            } else if (!nasm_strnicmp(p, "absolute=", 9)) {
+                seg->align = SEG_ABS + readnum(p + 9, &rn_error);
+                if (rn_error)
+                    nasm_nonfatal("argument to `absolute' segment"
+                                  " attribute should be numeric");
+            }
+        }
+
+        ieee_seg_needs_update = seg;
+        if (seg->align >= SEG_ABS)
+            define_label(name, NO_SEG, seg->align - SEG_ABS, false);
+        else
+            define_label(name, seg->index + 1, 0L, false);
+        ieee_seg_needs_update = NULL;
+
+        /*
+         * In commit 98578071b9d71ecaa2344dd9c185237c1765041e
+         * we reworked labels significantly which in turn lead
+         * to the case where seg->name = NULL here and we get
+         * nil dereference in next segments definitions.
+         *
+         * Lets placate this case with explicit name setting
+         * if labels engine didn't set it yet.
+         *
+         * FIXME: Need to revisit this moment if such fix doesn't
+         * break anything but since IEEE 695 format is veeery
+         * old I don't expect there are many users left. In worst
+         * case this should only lead to a memory leak.
+         */
+        if (!seg->name)
+            seg->name = nasm_strdup(name);
+
+        if (seg->use32)
+            *bits = 32;
+        else
+            *bits = 16;
+        return seg->index;
+    }
+}
+
+/*
+ * directives supported
+ */
+static enum directive_result
+ieee_directive(enum directive directive, char *value)
+{
+    (void)value;
+
+    switch (directive) {
+    case D_UPPERCASE:
+        ieee_uppercase = true;
+        return DIRR_OK;
+
+    default:
+	return DIRR_UNKNOWN;
+    }
+}
+
+static void ieee_sectalign(int32_t seg, unsigned int value)
+{
+    struct ieeeSection *s;
+
+    list_for_each(s, seghead) {
+        if (s->index == seg)
+            break;
+    }
+
+    /*
+     * 256 is maximum there, note it may happen
+     * that align is issued on "absolute" segment
+     * it's fine since SEG_ABS > 256 and we never
+     * get escape this test
+     */
+    if (!s || !is_power2(value) || value > 256)
+        return;
+
+    if ((unsigned int)s->align < value)
+        s->align = value;
+}
+
+/*
+ * Return segment data
+ */
+static int32_t ieee_segbase(int32_t segment)
+{
+    struct ieeeSection *seg;
+
+    /*
+     * Find the segment in our list.
+     */
+    for (seg = seghead; seg; seg = seg->next)
+        if (seg->index == segment - 1)
+            break;
+
+    if (!seg)
+        return segment;         /* not one of ours - leave it alone */
+
+    if (seg->align >= SEG_ABS)
+        return seg->align;      /* absolute segment */
+
+    return segment;             /* no special treatment */
+}
+
+static void ieee_write_file(void)
+{
+    const struct tm * const thetime = &official_compile_time.local;
+    struct FileName *fn;
+    struct ieeeSection *seg;
+    struct ieeePublic *pub, *loc;
+    struct ieeeExternal *ext;
+    struct ieeeObjData *data;
+    struct ieeeFixupp *fix;
+    struct Array *arr;
+    int i;
+    const bool debuginfo = (dfmt == &ladsoft_debug_form);
+
+    /*
+     * Write the module header
+     */
+    ieee_putascii("MBFNASM,%02X%s.\n", strlen(ieee_infile), ieee_infile);
+
+    /*
+     * Write the NASM boast comment.
+     */
+    ieee_putascii("CO0,%02X%s.\n", nasm_comment_len(), nasm_comment());
+
+    /*
+     * write processor-specific information
+     */
+    ieee_putascii("AD8,4,L.\n");
+
+    /*
+     * date and time
+     */
+    ieee_putascii("DT%04d%02d%02d%02d%02d%02d.\n",
+                  1900 + thetime->tm_year, thetime->tm_mon + 1,
+                  thetime->tm_mday, thetime->tm_hour, thetime->tm_min,
+                  thetime->tm_sec);
+    /*
+     * if debugging, dump file names
+     */
+    for (fn = fnhead; fn && debuginfo; fn = fn->next) {
+        ieee_putascii("C0105,%02X%s.\n", strlen(fn->name), fn->name);
+    }
+
+    ieee_putascii("CO101,07ENDHEAD.\n");
+    /*
+     * the standard doesn't specify when to put checksums,
+     * we'll just do it periodically.
+     */
+    ieee_putcs(false);
+
+    /*
+     * Write the section headers
+     */
+    seg = seghead;
+    if (!debuginfo && seg && !strcmp(seg->name, "??LINE"))
+        seg = seg->next;
+    while (seg) {
+        char buf256;
+        char attrib;
+        switch (seg->combine) {
+        case CMB_PUBLIC:
+        default:
+            attrib = 'C';
+            break;
+        case CMB_PRIVATE:
+            attrib = 'S';
+            break;
+        case CMB_COMMON:
+            attrib = 'M';
+            break;
+        }
+        ieee_unqualified_name(buf, seg->name);
+        if (seg->align >= SEG_ABS) {
+            ieee_putascii("ST%X,A,%02X%s.\n", seg->ieee_index,
+                          strlen(buf), buf);
+            ieee_putascii("ASL%X,%lX.\n", seg->ieee_index,
+                          (seg->align - SEG_ABS) * 16);
+        } else {
+            ieee_putascii("ST%X,%c,%02X%s.\n", seg->ieee_index, attrib,
+                          strlen(buf), buf);
+            ieee_putascii("SA%X,%lX.\n", seg->ieee_index, seg->align);
+            ieee_putascii("ASS%X,%X.\n", seg->ieee_index,
+                          seg->currentpos);
+        }
+        seg = seg->next;
+    }
+    /*
+     * write the start address if there is one
+     */
+    if (ieee_entry_seg && seghead) {
+        for (seg = seghead; seg; seg = seg->next)
+            if (seg->index == ieee_entry_seg)
+                break;
+        if (!seg)
+            nasm_panic("Start address records are incorrect");
+        else
+            ieee_putascii("ASG,R%X,%lX,+.\n", seg->ieee_index,
+                          ieee_entry_ofs);
+    }
+
+    ieee_putcs(false);
+    /*
+     * Write the publics
+     */
+    i = 1;
+    for (seg = seghead; seg; seg = seg->next) {
+        for (pub = seg->pubhead; pub; pub = pub->next) {
+            char buf256;
+            ieee_unqualified_name(buf, pub->name);
+            ieee_putascii("NI%X,%02X%s.\n", i, strlen(buf), buf);
+            if (pub->segment == -1)
+                ieee_putascii("ASI%X,R%X,%lX,+.\n", i, pub->index,
+                              pub->offset);
+            else
+                ieee_putascii("ASI%X,%lX,%lX,+.\n", i, pub->segment * 16,
+                              pub->offset);
+            if (debuginfo) {
+                if (pub->type >= 0x100)
+                    ieee_putascii("ATI%X,T%X.\n", i, pub->type - 0x100);
+                else
+                    ieee_putascii("ATI%X,%X.\n", i, pub->type);
+            }
+            i++;
+        }
+    }
+    pub = fpubhead;
+    i = 1;
+    while (pub) {
+        char buf256;
+        ieee_unqualified_name(buf, pub->name);
+        ieee_putascii("NI%X,%02X%s.\n", i, strlen(buf), buf);
+        if (pub->segment == -1)
+            ieee_putascii("ASI%X,R%X,%lX,+.\n", i, pub->index,
+                          pub->offset);
+        else
+            ieee_putascii("ASI%X,%lX,%lX,+.\n", i, pub->segment * 16,
+                          pub->offset);
+        if (debuginfo) {
+            if (pub->type >= 0x100)
+                ieee_putascii("ATI%X,T%X.\n", i, pub->type - 0x100);
+            else
+                ieee_putascii("ATI%X,%X.\n", i, pub->type);
+        }
+        i++;
+        pub = pub->next;
+    }
+    /*
+     * Write the externals
+     */
+    ext = exthead;
+    i = 1;
+    while (ext) {
+        char buf256;
+        ieee_unqualified_name(buf, ext->name);
+        ieee_putascii("NX%X,%02X%s.\n", i++, strlen(buf), buf);
+        ext = ext->next;
+    }
+    ieee_putcs(false);
+
+    /*
+     * IEEE doesn't have a standard pass break record
+     * so use the ladsoft variant
+     */
+    ieee_putascii("CO100,06ENDSYM.\n");
+
+    /*
+     * now put types
+     */
+    i = ARRAY_BOT;
+    for (arr = arrhead; arr && debuginfo; arr = arr->next) {
+        ieee_putascii("TY%X,20,%X,%lX.\n", i++, arr->basetype,
+                      arr->size);
+    }
+    /*
+     * now put locals
+     */
+    i = 1;
+    for (seg = seghead; seg && debuginfo; seg = seg->next) {
+        for (loc = seg->lochead; loc; loc = loc->next) {
+            char buf256;
+            ieee_unqualified_name(buf, loc->name);
+            ieee_putascii("NN%X,%02X%s.\n", i, strlen(buf), buf);
+            if (loc->segment == -1)
+                ieee_putascii("ASN%X,R%X,%lX,+.\n", i, loc->index,
+                              loc->offset);
+            else
+                ieee_putascii("ASN%X,%lX,%lX,+.\n", i, loc->segment * 16,
+                              loc->offset);
+            if (debuginfo) {
+                if (loc->type >= 0x100)
+                    ieee_putascii("ATN%X,T%X.\n", i, loc->type - 0x100);
+                else
+                    ieee_putascii("ATN%X,%X.\n", i, loc->type);
+            }
+            i++;
+        }
+    }
+
+    /*
+     *  put out section data;
+     */
+    seg = seghead;
+    if (!debuginfo && seg && !strcmp(seg->name, "??LINE"))
+        seg = seg->next;
+    while (seg) {
+        if (seg->currentpos) {
+            int32_t size, org = 0;
+            data = seg->data;
+            ieee_putascii("SB%X.\n", seg->ieee_index);
+            fix = seg->fptr;
+            while (fix) {
+                size = HUNKSIZE - (org % HUNKSIZE);
+                size =
+                    size + org >
+                    seg->currentpos ? seg->currentpos - org : size;
+                size = fix->offset - org > size ? size : fix->offset - org;
+                org = ieee_putld(org, org + size, data->data);
+                if (org % HUNKSIZE == 0)
+                    data = data->next;
+                if (org == fix->offset) {
+                    org += ieee_putlr(fix);
+                    fix = fix->next;
+                }
+            }
+            while (org < seg->currentpos && data) {
+                size =
+                    seg->currentpos - org >
+                    HUNKSIZE ? HUNKSIZE : seg->currentpos - org;
+                org = ieee_putld(org, org + size, data->data);
+                data = data->next;
+            }
+            ieee_putcs(false);
+
+        }
+        seg = seg->next;
+    }
+    /*
+     * module end record
+     */
+    ieee_putascii("ME.\n");
+}
+
+static void ieee_write_byte(struct ieeeSection *seg, int data)
+{
+    int temp;
+    if (!(temp = seg->currentpos++ % HUNKSIZE))
+        ieee_data_new(seg);
+    seg->datacurr->datatemp = data;
+}
+
+static void ieee_write_word(struct ieeeSection *seg, int data)
+{
+    ieee_write_byte(seg, data & 0xFF);
+    ieee_write_byte(seg, (data >> 8) & 0xFF);
+}
+
+static void ieee_write_dword(struct ieeeSection *seg, int32_t data)
+{
+    ieee_write_byte(seg, data & 0xFF);
+    ieee_write_byte(seg, (data >> 8) & 0xFF);
+    ieee_write_byte(seg, (data >> 16) & 0xFF);
+    ieee_write_byte(seg, (data >> 24) & 0xFF);
+}
+static void printf_func(1, 2) ieee_putascii(char *format, ...)
+{
+    char buffer256;
+    size_t i, l;
+    va_list ap;
+
+    va_start(ap, format);
+    l = vsnprintf(buffer, sizeof(buffer), format, ap);
+    nasm_assert(l < sizeof(buffer));
+    for (i = 0; i < l; i++)
+        if ((uint8_t)bufferi > 31)
+            checksum += bufferi;
+    va_end(ap);
+    fputs(buffer, ofile);
+}
+
+/*
+ * put out a checksum record */
+static void ieee_putcs(int toclear)
+{
+    if (toclear) {
+        ieee_putascii("CS.\n");
+    } else {
+        checksum += 'C';
+        checksum += 'S';
+        ieee_putascii("CS%02X.\n", checksum & 127);
+    }
+    checksum = 0;
+}
+
+static int32_t ieee_putld(int32_t start, int32_t end, uint8_t *buf)
+{
+    int32_t val;
+    if (start == end)
+        return (start);
+    val = start % HUNKSIZE;
+    /* fill up multiple lines */
+    while (end - start >= LDPERLINE) {
+        int i;
+        ieee_putascii("LD");
+        for (i = 0; i < LDPERLINE; i++) {
+            ieee_putascii("%02X", bufval++);
+            start++;
+        }
+        ieee_putascii(".\n");
+    }
+    /* if no partial lines */
+    if (start == end)
+        return (start);
+    /* make a partial line */
+    ieee_putascii("LD");
+    while (start < end) {
+        ieee_putascii("%02X", bufval++);
+        start++;
+    }
+    ieee_putascii(".\n");
+    return (start);
+}
+static int32_t ieee_putlr(struct ieeeFixupp *p)
+{
+/*
+ * To deal with the vagaries of segmentation the LADsoft linker
+ * defines two types of segments: absolute and virtual.  Note that
+ * 'absolute' in this context is a different thing from the IEEE
+ * definition of an absolute segment type, which is also supported. If a
+ * segment is linked in virtual mode the low limit (L-var) is
+ * subtracted from each R,X, and P variable which appears in an
+ * expression, so that we can have relative offsets.  Meanwhile
+ * in the ABSOLUTE mode this subtraction is not done and
+ * so we can use absolute offsets from 0.  In the LADsoft linker
+ * this configuration is not done in the assemblker source but in
+ * a source the linker reads.  Generally this type of thing only
+ * becomes an issue if real mode code is used.  A pure 32-bit linker could
+ * get away without defining the virtual mode...
+ */
+    char buf40;
+    int32_t size = p->size;
+    switch (p->ftype) {
+    case FT_SEG:
+        if (p->id1 < 0)
+            sprintf(buf, "%"PRIX32"", -p->id1);
+        else
+            sprintf(buf, "L%"PRIX32",10,/", p->id1);
+        break;
+    case FT_OFS:
+        sprintf(buf, "R%"PRIX32",%"PRIX32",+", p->id1, p->addend);
+        break;
+    case FT_REL:
+        sprintf(buf, "R%"PRIX32",%"PRIX32",+,P,-,%X,-", p->id1, p->addend, p->size);
+        break;
+
+    case FT_WRT:
+        if (p->id2 < 0)
+            sprintf(buf, "R%"PRIX32",%"PRIX32",+,L%"PRIX32",+,%"PRIX32",-", p->id2, p->addend,
+                    p->id2, -p->id1 * 16);
+        else
+            sprintf(buf, "R%"PRIX32",%"PRIX32",+,L%"PRIX32",+,L%"PRIX32",-", p->id2, p->addend,
+                    p->id2, p->id1);
+        break;
+    case FT_EXT:
+        sprintf(buf, "X%"PRIX32"", p->id1);
+        break;
+    case FT_EXTREL:
+        sprintf(buf, "X%"PRIX32",P,-,%"PRIX32",-", p->id1, size);
+        break;
+    case FT_EXTSEG:
+        /* We needed a non-ieee hack here.
+         * We introduce the Y variable, which is the low
+         * limit of the native segment the extern resides in
+         */
+        sprintf(buf, "Y%"PRIX32",10,/", p->id1);
+        break;
+    case FT_EXTWRT:
+        if (p->id2 < 0)
+            sprintf(buf, "X%"PRIX32",Y%"PRIX32",+,%"PRIX32",-", p->id2, p->id2,
+                    -p->id1 * 16);
+        else
+            sprintf(buf, "X%"PRIX32",Y%"PRIX32",+,L%"PRIX32",-", p->id2, p->id2, p->id1);
+        break;
+    }
+    ieee_putascii("LR(%s,%"PRIX32").\n", buf, size);
+
+    return (size);
+}
+
+/* Dump all segment data (text and fixups )*/
+
+static void ieee_unqualified_name(char *dest, char *source)
+{
+    if (ieee_uppercase) {
+        while (*source)
+            *dest++ = toupper(*source++);
+        *dest = 0;
+    } else
+        strcpy(dest, source);
+}
+static void dbgls_init(void)
+{
+    int tempint;
+
+    fnhead = NULL;
+    fntail = &fnhead;
+    arrindex = ARRAY_BOT;
+    arrhead = NULL;
+    arrtail = &arrhead;
+    ieee_segment("??LINE", &tempint);
+    any_segs = false;
+}
+static void dbgls_cleanup(void)
+{
+    struct ieeeSection *segtmp;
+    while (fnhead) {
+        struct FileName *fntemp = fnhead;
+        fnhead = fnhead->next;
+        nasm_free(fntemp->name);
+        nasm_free(fntemp);
+    }
+    for (segtmp = seghead; segtmp; segtmp = segtmp->next) {
+        while (segtmp->lochead) {
+            struct ieeePublic *loctmp = segtmp->lochead;
+            segtmp->lochead = loctmp->next;
+            nasm_free(loctmp->name);
+            nasm_free(loctmp);
+        }
+    }
+    while (arrhead) {
+        struct Array *arrtmp = arrhead;
+        arrhead = arrhead->next;
+        nasm_free(arrtmp);
+    }
+}
+
+/*
+ * because this routine is not bracketed in
+ * the main program, this routine will be called even if there
+ * is no request for debug info
+ * so, we have to make sure the ??LINE segment is available
+ * as the first segment when this debug format is selected
+ */
+static void dbgls_linnum(const char *lnfname, int32_t lineno, int32_t segto)
+{
+    struct FileName *fn;
+    struct ieeeSection *seg;
+    int i = 0;
+    if (segto == NO_SEG)
+        return;
+
+    /*
+     * If `any_segs' is still false, we must define a default
+     * segment.
+     */
+    if (!any_segs) {
+        int tempint;            /* ignored */
+        if (segto != ieee_segment("__NASMDEFSEG", &tempint))
+            nasm_panic("strange segment conditions in IEEE driver");
+    }
+
+    /*
+     * Find the segment we are targeting.
+     */
+    for (seg = seghead; seg; seg = seg->next)
+        if (seg->index == segto)
+            break;
+    if (!seg)
+        nasm_panic("lineno directed to nonexistent segment?");
+
+    for (fn = fnhead; fn; fn = fn->next) {
+        if (!nasm_stricmp(lnfname, fn->name))
+            break;
+        i++;
+    }
+    if (!fn) {
+        fn = nasm_malloc(sizeof(*fn));
+        fn->name = nasm_malloc(strlen(lnfname) + 1);
+        fn->index = i;
+        strcpy(fn->name, lnfname);
+        fn->next = NULL;
+        *fntail = fn;
+        fntail = &fn->next;
+    }
+    ieee_write_byte(seghead, fn->index);
+    ieee_write_word(seghead, lineno);
+    ieee_write_fixup(segto, NO_SEG, seghead, 4, OUT_ADDRESS,
+                     seg->currentpos);
+
+}
+static void dbgls_deflabel(char *name, int32_t segment,
+                           int64_t offset, int is_global, char *special)
+{
+    struct ieeeSection *seg;
+
+    /* Keep compiler from warning about special */
+    (void)special;
+
+    /*
+     * Note: ..^@ special symbols are filtered in labels.c
+     */
+
+    /*
+     * If it's a special-retry from pass two, discard it.
+     */
+    if (is_global == 3)
+        return;
+
+    /*
+     * Case (i):
+     */
+    if (ieee_seg_needs_update)
+        return;
+    if (segment < SEG_ABS && segment != NO_SEG && segment % 2)
+        return;
+
+    if (segment >= SEG_ABS || segment == NO_SEG) {
+        return;
+    }
+
+    /*
+     * If `any_segs' is still false, we might need to define a
+     * default segment, if they're trying to declare a label in
+     * `first_seg'.  But the label should exist due to a prior
+     * call to ieee_deflabel so we can skip that.
+     */
+
+    for (seg = seghead; seg; seg = seg->next)
+        if (seg->index == segment) {
+            struct ieeePublic *loc;
+            /*
+             * Case (ii). Maybe MODPUB someday?
+             */
+            if (!is_global) {
+                last_defined = loc = nasm_malloc(sizeof(*loc));
+                *seg->loctail = loc;
+                seg->loctail = &loc->next;
+                loc->next = NULL;
+                loc->name = nasm_strdup(name);
+                loc->offset = offset;
+                loc->segment = -1;
+                loc->index = seg->ieee_index;
+            }
+        }
+}
+static void dbgls_typevalue(int32_t type)
+{
+    int elem = TYM_ELEMENTS(type);
+    type = TYM_TYPE(type);
+
+    if (!last_defined)
+        return;
+
+    switch (type) {
+    case TY_BYTE:
+        last_defined->type = 1; /* uint8_t */
+        break;
+    case TY_WORD:
+        last_defined->type = 3; /* unsigned word */
+        break;
+    case TY_DWORD:
+        last_defined->type = 5; /* unsigned dword */
+        break;
+    case TY_FLOAT:
+        last_defined->type = 9; /* float */
+        break;
+    case TY_QWORD:
+        last_defined->type = 10;        /* qword */
+        break;
+    case TY_TBYTE:
+        last_defined->type = 11;        /* TBYTE */
+        break;
+    default:
+        last_defined->type = 0x10;      /* near label */
+        break;
+    }
+
+    if (elem > 1) {
+        struct Array *arrtmp = nasm_malloc(sizeof(*arrtmp));
+        int vtype = last_defined->type;
+        arrtmp->size = elem;
+        arrtmp->basetype = vtype;
+        arrtmp->next = NULL;
+        last_defined->type = arrindex++ + 0x100;
+        *arrtail = arrtmp;
+        arrtail = &(arrtmp->next);
+    }
+    last_defined = NULL;
+}
+static void dbgls_output(int output_type, void *param)
+{
+    (void)output_type;
+    (void)param;
+}
+static const struct dfmt ladsoft_debug_form = {
+    "LADsoft Debug Records",
+    "ladsoft",
+    dbgls_init,
+    dbgls_linnum,
+    dbgls_deflabel,
+    NULL,                       /* .debug_smacros */
+    NULL,                       /* .debug_include */
+    NULL,                       /* .debug_mmacros */
+    null_debug_directive,
+    dbgls_typevalue,
+    dbgls_output,
+    dbgls_cleanup,
+    NULL                        /* pragma list */
+};
+static const struct dfmt * const ladsoft_debug_arr3 = {
+    &ladsoft_debug_form,
+    &null_debug_form,
+    NULL
+};
+const struct ofmt of_ieee = {
+    "IEEE-695 (LADsoft variant) object file format",
+    "ieee",
+    ".o",
+    OFMT_TEXT,
+    32,
+    ladsoft_debug_arr,
+    &ladsoft_debug_form,
+    NULL,
+    ieee_init,
+    null_reset,
+    nasm_do_legacy_output,
+    ieee_out,
+    ieee_deflabel,
+    ieee_segment,
+    NULL,
+    ieee_sectalign,
+    ieee_segbase,
+    ieee_directive,
+    ieee_cleanup,
+    NULL                        /* pragma list */
+};
+
+#endif                          /* OF_IEEE */

_service:tar_scm:nasm-2.16.03.tar.xz/output/outlib.c Added

@@ -0,0 +1,324 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2020 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * outlib.c
+ *
+ * Common routines for the output backends.
+ */
+
+#include "outlib.h"
+#include "raa.h"
+
+uint64_t realsize(enum out_type type, uint64_t size)
+{
+    switch (type) {
+    case OUT_REL1ADR:
+	return 1;
+    case OUT_REL2ADR:
+	return 2;
+    case OUT_REL4ADR:
+	return 4;
+    case OUT_REL8ADR:
+	return 8;
+    default:
+	return size;
+    }
+}
+
+/* Common section/symbol handling */
+
+struct ol_sect *_ol_sect_list;
+uint64_t _ol_nsects;             /* True sections, not external symbols */
+static struct ol_sect **ol_sect_tail = &_ol_sect_list;
+static struct hash_table ol_secthash;
+static struct RAA *ol_sect_index_tbl;
+
+struct ol_sym *_ol_sym_list;
+uint64_t _ol_nsyms;
+static struct ol_sym **ol_sym_tail = &_ol_sym_list;
+static struct hash_table ol_symhash;
+
+void ol_init(void)
+{
+}
+
+static void ol_free_symbols(void)
+{
+    struct ol_sym *s, *stmp;
+
+    hash_free(&ol_symhash);
+
+    list_for_each_safe(s, stmp, _ol_sym_list) {
+        nasm_free((char *)s->name);
+        nasm_free(s);
+    }
+
+    _ol_nsyms = 0;
+    _ol_sym_list = NULL;
+    ol_sym_tail = &_ol_sym_list;
+}
+
+static void ol_free_sections(void)
+{
+    struct ol_sect *s, *stmp;
+
+    hash_free(&ol_secthash);
+    raa_free(ol_sect_index_tbl);
+    ol_sect_index_tbl = NULL;
+
+    list_for_each_safe(s, stmp, _ol_sect_list) {
+        saa_free(s->data);
+        saa_free(s->reloc);
+        nasm_free((char *)s->name);
+        nasm_free(s);
+    }
+
+    _ol_nsects = 0;
+    _ol_sect_list = NULL;
+    ol_sect_tail = &_ol_sect_list;
+}
+
+void ol_cleanup(void)
+{
+    ol_free_symbols();
+    ol_free_sections();
+}
+
+/*
+ * Allocate a section index and add a section, subsection, or external
+ * symbol to the section-by-index table. If the index provided is zero,
+ * allocate a new index via seg_alloc().
+ */
+static uint32_t ol_seg_alloc(void *s, uint32_t ix)
+{
+    if (!ix)
+        ix = seg_alloc();
+    ol_sect_index_tbl = raa_write_ptr(ol_sect_index_tbl, ix >> 1, s);
+    return ix;
+}
+
+/*
+ * Find a section or create a new section structure if it does not exist
+ * and allocate it an index value via seg_alloc().
+ */
+struct ol_sect *_ol_get_sect(const char *name, size_t ssize, size_t rsize)
+{
+    struct ol_sect *s, **sp;
+    struct hash_insert hi;
+
+    sp = (struct ol_sect **)hash_find(&ol_secthash, name, &hi);
+    if (sp)
+        return *sp;
+
+    s             = nasm_zalloc(ssize);
+    s->syml.tail  = &s->syml.head;
+    s->name       = nasm_strdup(name);
+    s->data       = saa_init(1);
+    s->reloc      = saa_init(rsize);
+    *ol_sect_tail = s;
+    ol_sect_tail  = &s->next;
+    _ol_nsects++;
+    s->index     = s->subindex = ol_seg_alloc(s, 0);
+
+    hash_add(&hi, s->name, s);
+    return s;
+}
+
+/* Find a section by name without creating one */
+struct ol_sect *_ol_sect_by_name(const char *name)
+{
+    struct ol_sect **sp;
+
+    sp = (struct ol_sect **)hash_find(&ol_secthash, name, NULL);
+    return sp ? *sp : NULL;
+}
+
+/* Find a section or external symbol by index; NULL if not valid */
+struct ol_sect *_ol_sect_by_index(int32_t index)
+{
+    uint32_t ix = index;
+
+    if (unlikely(ix >= SEG_ABS))
+        return NULL;
+
+    return raa_read_ptr(ol_sect_index_tbl, ix >> 1);
+}
+
+/*
+ * Start a new subsection for the given section. At the moment, once a
+ * subsection has been created, it is not possible to revert to an
+ * earlier subsection. ol_sect_by_index() will return the main section
+ * structure. Returns the new section index.  This is used to prevent
+ * the front end from optimizing across subsection boundaries.
+ */
+int32_t _ol_new_subsection(struct ol_sect *sect)
+{
+    if (unlikely(!sect))
+        return NO_SEG;
+
+    return sect->subindex = ol_seg_alloc(sect, 0);
+}
+
+/*
+ * Insert a symbol into a list; need to use upcasting using container_of()
+ * to walk the list later.
+ */
+static void ol_add_sym_to(struct ol_symlist *syml, struct ol_symhead *head,
+                          uint64_t offset)
+{
+    syml->tree.key = offset;
+    head->tree     = rb_insert(head->tree, &syml->tree);
+    *head->tail    = syml;
+    head->tail     = &syml->next;
+    head->n++;
+}
+
+/*
+ * Create a location structure from seg:offs
+ */
+void ol_mkloc(struct ol_loc *loc, int64_t offs, int32_t seg)
+{
+    nasm_zero(*loc);
+    loc->offs = offs;
+
+    if (unlikely((uint32_t)seg >= SEG_ABS)) {
+        if (likely(seg == NO_SEG)) {
+            loc->seg.t     = OS_NOSEG;
+        } else {
+            loc->seg.t     = OS_ABS;
+            loc->seg.index = seg - SEG_ABS;
+        }
+    } else {
+        loc->seg.index  = seg & ~1;
+        loc->seg.t      = OS_SECT | (seg & 1);
+        loc->seg.s.sect = _ol_sect_by_index(loc->seg.index);
+    }
+}
+
+/*
+ * Create a new symbol. If this symbol is OS_OFFS, add it to the relevant
+ * section, too. If the symbol already exists, return NULL; this is
+ * different from ol_get_section() as a single section may be invoked
+ * many times. On the contrary, the front end will prevent a single symbol
+ * from being defined more than once.
+ *
+ * If flags has OF_GLOBAL set, add it to the global symbol hash for
+ * the containing section if applicable.
+ *
+ * If flags has OF_IMPSEC set, allocate a segment index for it via
+ * seg_alloc() unless v->index is already set, and add it to the
+ * section by index list.
+ */
+struct ol_sym *_ol_new_sym(const char *name, const struct ol_loc *v,
+                           uint32_t flags, size_t size)
+{
+    struct hash_insert hi;
+    struct ol_sym *sym;
+
+    if (hash_find(&ol_symhash, name, &hi))
+        return NULL;            /* Symbol already exists */
+
+    flags     |= OF_SYMBOL;
+
+    sym        = nasm_zalloc(size);
+    sym->name  = nasm_strdup(name);
+    sym->v     = *v;
+
+    if (sym->v.seg.t & OS_SECT) {
+        struct ol_sect *sect = sym->v.seg.s.sect;
+
+        if (!sect || (sect->flags & OF_SYMBOL))
+            /* Must be an external or common reference */
+            flags |= OF_IMPSEC;
+
+        if (flags & OF_IMPSEC) {
+            /* Metasection */
+            if (!sym->v.seg.s.sym) {
+                sym->v.seg.s.sym = sym;
+                sym->v.seg.index = ol_seg_alloc(sym, sym->v.seg.index);
+            }
+        } else if (sym->v.seg.t == OS_OFFS) {
+            struct ol_sect * const sect = sym->v.seg.s.sect;
+            const uint64_t offs = sym->v.offs;
+
+            ol_add_sym_to(&sym->syml, &sect->syml, offs);
+            if (flags & OF_GLOBAL)
+                ol_add_sym_to(&sym->symg, &sect->symg, offs);
+        }
+    }
+    sym->flags = flags;
+
+    *ol_sym_tail = sym;
+    ol_sym_tail  = &sym->next;
+    _ol_nsyms++;
+
+    hash_add(&hi, sym->name, sym);
+    return sym;
+}
+
+/* Find a symbol in the global namespace */
+struct ol_sym *_ol_sym_by_name(const char *name)
+{
+    struct ol_sym **symp;
+
+    symp = (struct ol_sym **)hash_find(&ol_symhash, name, NULL);
+    return symp ? *symp : NULL;
+}
+
+/*
+ * Find a symbol by address in a specific section. If no symbol is defined
+ * at that exact address, return the immediately previously defined one.
+ * If global is set, then only return global symbols.
+ */
+struct ol_sym *_ol_sym_by_address(struct ol_sect *sect, int64_t addr,
+                                  bool global)
+{
+    struct ol_symhead *head;
+    size_t t_offs;
+    struct rbtree *t;
+
+    if (global) {
+        head = &sect->symg;
+        t_offs = offsetof(struct ol_sym, symg.tree);
+    } else {
+        head = &sect->syml;
+        t_offs = offsetof(struct ol_sym, syml.tree);
+    }
+
+    t = rb_search(head->tree, addr);
+    if (!t)
+        return NULL;
+
+    return (struct ol_sym *)((char *)t - t_offs);
+}

_service:tar_scm:nasm-2.16.03.tar.xz/output/outlib.h Added

@@ -0,0 +1,313 @@
+/* ----------------------------------------------------------------------- *
+ *   
+ *   Copyright 1996-2020 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *     
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#ifndef NASM_OUTLIB_H
+#define NASM_OUTLIB_H
+
+#include "compiler.h"
+#include "nasm.h"
+#include "error.h"
+#include "hashtbl.h"
+#include "saa.h"
+#include "rbtree.h"
+
+uint64_t realsize(enum out_type type, uint64_t size);
+
+/* Do-nothing versions of some output routines */
+enum directive_result
+null_directive(enum directive directive, char *value);
+void null_sectalign(int32_t seg, unsigned int value);
+void null_reset(void);
+int32_t null_segbase(int32_t seg);
+
+/* Do-nothing versions of all the debug routines */
+void null_debug_init(void);
+void null_debug_linenum(const char *filename, int32_t linenumber,
+			int32_t segto);
+void null_debug_deflabel(char *name, int32_t segment, int64_t offset,
+                         int is_global, char *special);
+void null_debug_directive(const char *directive, const char *params);
+void null_debug_typevalue(int32_t type);
+void null_debug_output(int type, void *param);
+void null_debug_cleanup(void);
+extern const struct dfmt * const null_debug_arr2;
+
+/* Wrapper for unported backends */
+void nasm_do_legacy_output(const struct out_data *data);
+
+/*
+ * Common routines for tasks that really should migrate into the core.
+ * This provides a common interface for maintaining sections and symbols,
+ * and provide quick lookups as well as declared-order sequential walks.
+ *
+ * These structures are intended to be embedded at the *top* of a
+ * backend-specific structure containing additional information.
+ *
+ * The tokens O_Section, O_Symbol and O_Reloc are intended to be
+ * defined as macros by the backend before including this file!
+ */
+
+struct ol_sect;
+struct ol_sym;
+
+#ifndef O_Section
+typedef struct ol_sect O_Section;
+#endif
+#ifndef O_Symbol
+typedef struct ol_sym O_Symbol;
+#endif
+#ifndef O_Reloc
+typedef void * O_Reloc;
+#endif
+
+/* Common section structure */
+
+/*
+ * Common flags for sections and symbols; low values reserved for
+ * backend.  Note that both ol_sect and ol_sym begin with a flags
+ * field, so if a section pointer points to an external symbol instead
+ * they can be trivially resolved.
+ */
+#define OF_SYMBOL 0x80000000
+#define OF_GLOBAL 0x40000000
+#define OF_IMPSEC 0x20000000
+#define OF_COMMON 0x10000000
+
+struct ol_sym;
+
+struct ol_symlist {
+    struct ol_symlist *next;
+    struct rbtree tree;
+};
+struct ol_symhead {
+    struct ol_symlist *head, **tail;
+    struct rbtree *tree;
+    uint64_t n;
+};
+
+struct ol_sect {
+    uint32_t flags;             /* Section/symbol flags */
+    struct ol_sect *next;       /* Next section in declared order */
+    const char *name;           /* Name of section */
+    struct ol_symhead syml;     /* All symbols in this section */
+    struct ol_symhead symg;     /* Global symbols in this section */
+    struct SAA *data;           /* Contents of section */
+    struct SAA *reloc;          /* Section relocations */
+    uint32_t index;             /* Primary section index */
+    uint32_t subindex;          /* Current subsection index */
+};
+
+/* Segment reference */
+enum ol_seg_type {
+    OS_NOSEG  = 0,                /* Plain number (no segment) */
+    OS_SEGREF = 1,                /* It is a segment reference */
+    OS_ABS    = 1,                /* Absolute segment reference */
+    OS_SECT   = 2,                /* It is a real section */
+    OS_OFFS   = OS_SECT,          /* Offset reference in section */
+    OS_SEG    = OS_SECT|OS_SEGREF /* Section reference */
+};
+
+union ol_segval {
+    struct ol_sect *sect;   /* Section structure */
+    struct ol_sym  *sym;    /* External symbol structure */
+};
+
+struct ol_seg {
+    union ol_segval  s;
+    enum ol_seg_type t;
+
+    /*
+     * For a section:          subsection index
+     * For a metasymbol:       virtual segment index
+     * For an absolute symbol: absolute value
+     */
+    uint32_t index;
+};
+
+/* seg:offs representing the full location value and type */
+struct ol_loc {
+    int64_t offs;
+    struct ol_seg seg;
+};
+
+/* Common symbol structure */
+struct ol_sym {
+    uint32_t flags;             /* Section/symbol flags */
+    uint32_t size;              /* Size value (for backend) */
+    struct ol_sym *next;       	/* Next symbol in declared order */
+    const char *name;           /* Symbol name */
+    struct ol_symlist syml;     /* Section-local symbol list */
+    struct ol_symlist symg;     /* Section-local global symbol list */
+    struct ol_loc p;            /* Symbol position ("where") */
+    struct ol_loc v;            /* Symbol value ("what") */
+};
+
+/*
+ * Operations
+ */
+void ol_init(void);
+void ol_cleanup(void);
+
+/* Convert offs:seg to a location structure */
+extern void
+ol_mkloc(struct ol_loc *loc, int64_t offs, int32_t seg);
+
+/* Get the section or external symbol from a struct ol_seg */
+static inline O_Section *seg_sect(struct ol_seg *seg)
+{
+    return (O_Section *)seg->s.sect;
+}
+static inline O_Symbol *seg_xsym(struct ol_seg *seg)
+{
+    return (O_Symbol *)seg->s.sym;
+}
+
+/*
+ * Return a pointer to the symbol structure if and only if a section is
+ * really a symbol of some kind (extern, common...)
+ */
+static inline struct ol_sym *_seg_extsym(struct ol_sect *sect)
+{
+    return (sect->flags & OF_SYMBOL) ? (struct ol_sym *)sect : NULL;
+}
+static inline O_Symbol *seg_extsym(O_Section *sect)
+{
+    return (O_Symbol *)_seg_extsym((struct ol_sect *)sect);
+}
+
+/*
+ * Find a section or create a new section structure if it does not exist
+ * and allocate it an index value via seg_alloc().
+ */
+extern struct ol_sect *
+_ol_get_sect(const char *name, size_t ssize, size_t rsize);
+static inline O_Section *ol_get_sect(const char *name)
+{
+    return (O_Section *)_ol_get_sect(name, sizeof(O_Section), sizeof(O_Reloc));
+}
+
+/* Find a section by name without creating one */
+extern struct ol_sect *_ol_sect_by_name(const char *);
+static inline O_Section *ol_sect_by_name(const char *name)
+{
+    return (O_Section *)_ol_sect_by_name(name);
+}
+
+/* Find a section or external symbol by index; NULL if not valid */
+extern struct ol_sect *_ol_sect_by_index(int32_t index);
+static inline O_Section *ol_sect_by_index(int32_t index)
+{
+    return (O_Section *)_ol_sect_by_index(index);
+}
+
+/* Global list of sections (not including external symbols) */
+extern struct ol_sect *_ol_sect_list;
+static inline O_Section *ol_sect_list(void)
+{
+    return (O_Section *)_ol_sect_list;
+}
+
+/* Count of sections (not including external symbols) */
+extern uint64_t _ol_nsects;
+static inline uint64_t ol_nsects(void)
+{
+    return _ol_nsects;
+}
+
+/*
+ * Start a new subsection for the given section. At the moment, once a
+ * subsection has been created, it is not possible to revert to an
+ * earlier subsection. ol_sect_by_index() will return the main section
+ * structure. Returns the new section index.  This is used to prevent
+ * the front end from optimizing across subsection boundaries.
+ */
+extern int32_t _ol_new_subsection(struct ol_sect *sect);
+static inline int32_t ol_new_subsection(O_Section *sect)
+{
+    return _ol_new_subsection((struct ol_sect *)sect);
+}
+
+/*
+ * Create a new symbol. If this symbol is OS_OFFS, add it to the relevant
+ * section, too. If the symbol already exists, return NULL; this is
+ * different from ol_get_section() as a single section may be invoked
+ * many times. On the contrary, the front end will prevent a single symbol
+ * from being defined more than once.
+ *
+ * If flags has OF_GLOBAL set, add it to the global symbol hash for the
+ * containing section. If flags has OF_IMPSEC set, allocate a segment
+ * index for it via seg_alloc() and add it to the section by index list.
+ */
+extern struct ol_sym *_ol_new_sym(const char *name, const struct ol_loc *v,
+                                  uint32_t flags, size_t size);
+static inline O_Symbol *ol_new_sym(const char *name, const struct ol_loc *v,
+                                   uint32_t flags)
+{
+    return (O_Symbol *)_ol_new_sym(name, v, flags, sizeof(O_Symbol));
+}
+
+/* Find a symbol by name in the global namespace */
+extern struct ol_sym *_ol_sym_by_name(const char *name);
+static inline O_Symbol *ol_sym_by_name(const char *name)
+{
+    return (O_Symbol *)_ol_sym_by_name(name);
+}
+
+/*
+ * Find a symbol by address in a specific section. If no symbol is defined
+ * at that exact address, return the immediately previously defined one.
+ * If global is set, then only return global symbols.
+ */
+extern struct ol_sym *_ol_sym_by_address(struct ol_sect *sect, int64_t addr,
+                                         bool global);
+static inline O_Symbol *ol_sym_by_address(O_Section *sect, int64_t addr,
+                                          bool global)
+{
+    return (O_Symbol *)_ol_sym_by_address((struct ol_sect *)sect, addr, global);
+}
+
+/* Global list of symbols */
+extern struct ol_sym *_ol_sym_list;
+static inline O_Symbol *ol_sym_list(void)
+{
+    return (O_Symbol *)_ol_sym_list;
+}
+
+/* Global count of symbols */
+extern uint64_t _ol_nsyms;
+static inline uint64_t ol_nsyms(void)
+{
+    return _ol_nsyms;
+}
+
+#endif /* NASM_OUTLIB_H */

_service:tar_scm:nasm-2.16.03.tar.xz/output/outmacho.c Added

@@ -0,0 +1,2411 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2018 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * outmacho.c	output routines for the Netwide Assembler to produce
+ *		NeXTstep/OpenStep/Rhapsody/Darwin/MacOS X object files
+ */
+
+#include "compiler.h"
+
+#include "nctype.h"
+
+#include "nasm.h"
+#include "nasmlib.h"
+#include "ilog2.h"
+#include "labels.h"
+#include "error.h"
+#include "saa.h"
+#include "raa.h"
+#include "rbtree.h"
+#include "hashtbl.h"
+#include "outform.h"
+#include "outlib.h"
+#include "ver.h"
+#include "dwarf.h"
+#include "macho.h"
+
+#if defined(OF_MACHO) || defined(OF_MACHO64)
+
+/* Mach-O in-file header structure sizes */
+#define MACHO_HEADER_SIZE		28
+#define MACHO_SEGCMD_SIZE		56
+#define MACHO_SECTCMD_SIZE		68
+#define MACHO_SYMCMD_SIZE		24
+#define MACHO_NLIST_SIZE		12
+#define MACHO_RELINFO_SIZE		8
+
+#define MACHO_HEADER64_SIZE		32
+#define MACHO_SEGCMD64_SIZE		72
+#define MACHO_SECTCMD64_SIZE		80
+#define MACHO_NLIST64_SIZE		16
+
+/* Mach-O relocations numbers */
+
+#define VM_PROT_DEFAULT	(VM_PROT_READ | VM_PROT_WRITE | VM_PROT_EXECUTE)
+#define VM_PROT_ALL	(VM_PROT_READ | VM_PROT_WRITE | VM_PROT_EXECUTE)
+
+/* Our internal relocation types */
+enum reltype {
+    RL_ABS,			/* Absolute relocation */
+    RL_REL,			/* Relative relocation */
+    RL_TLV,			/* Thread local */
+    RL_BRANCH,			/* Relative direct branch */
+    RL_SUB,			/* X86_64_RELOC_SUBTRACT */
+    RL_GOT,			/* X86_64_RELOC_GOT */
+    RL_GOTLOAD			/* X86_64_RELOC_GOT_LOAD */
+};
+#define RL_MAX_32	RL_TLV
+#define RL_MAX_64	RL_GOTLOAD
+
+struct macho_fmt {
+    uint32_t ptrsize;		/* Pointer size in bytes */
+    uint32_t mh_magic;		/* Which magic number to use */
+    uint32_t cpu_type;		/* Which CPU type */
+    uint32_t lc_segment;	/* Which segment load command */
+    uint32_t header_size;	/* Header size */
+    uint32_t segcmd_size;	/* Segment command size */
+    uint32_t sectcmd_size;	/* Section command size */
+    uint32_t nlist_size;	/* Nlist (symbol) size */
+    enum reltype maxreltype;	/* Maximum entry in enum reltype permitted */
+    uint32_t reloc_abs;		/* Absolute relocation type */
+    uint32_t reloc_rel;		/* Relative relocation type */
+    uint32_t reloc_tlv;		/* Thread local relocation type */
+    bool forcesym;		/* Always use "external" (symbol-relative) relocations */
+};
+
+static struct macho_fmt fmt;
+
+static void fwriteptr(uint64_t data, FILE * fp)
+{
+    fwriteaddr(data, fmt.ptrsize, fp);
+}
+
+struct section {
+    /* nasm internal data */
+    struct section *next;
+    struct SAA *data;
+    int32_t index;		/* Main section index */
+    int32_t subsection;		/* Current subsection index */
+    int32_t fileindex;
+    struct reloc *relocs;
+    struct rbtree *syms2; /* All/global symbols symbols in section */
+    int align;
+    bool by_name;	    /* This section was specified by full MachO name */
+    char namestr34;	    /* segment,section as a C string */
+
+    /* data that goes into the file */
+    char sectname16;     /* what this section is called */
+    char segname16;      /* segment this section will be in */
+    uint64_t addr;         /* in-memory address (subject to alignment) */
+    uint64_t size;         /* in-memory and -file size  */
+    uint64_t offset;	   /* in-file offset */
+    uint32_t pad;          /* padding bytes before section */
+    uint32_t nreloc;       /* relocation entry count */
+    uint32_t flags;        /* type and attributes (masked) */
+    uint32_t extreloc;     /* external relocations */
+};
+
+#define S_NASM_TYPE_MASK	 0x800004ff	/* we consider these bits "section type" */
+
+/* fake section for absolute symbols, *not* part of the section linked list */
+static struct section absolute_sect;
+
+struct reloc {
+    /* nasm internal data */
+    struct reloc *next;
+
+    /* data that goes into the file */
+    int32_t addr;		/* op's offset in section */
+    uint32_t snum:24,		/* contains symbol index if
+				 ** ext otherwise in-file
+				 ** section number */
+	pcrel:1,                /* relative relocation */
+	length:2,               /* 0=byte, 1=word, 2=int32_t, 3=int64_t */
+	ext:1,                  /* external symbol referenced */
+	type:4;                 /* reloc type */
+};
+
+struct symbol {
+    /* nasm internal data */
+    struct rbtree symv2;	/* All/global symbol rbtrees; "key" contains the
+				   symbol offset. */
+    struct symbol *next;	/* next symbol in the list */
+    char *name;			/* name of this symbol */
+    int32_t initial_snum;	/* symbol number used above in reloc */
+    int32_t snum;		/* true snum for reloc */
+
+    /* data that goes into the file */
+    uint32_t strx;              /* string table index */
+    uint8_t type;		/* symbol type */
+    uint8_t sect;		/* NO_SECT or section number */
+    uint16_t desc;		/* for stab debugging, 0 for us */
+};
+
+#define DEFAULT_SECTION_ALIGNMENT 0 /* byte (i.e. no) alignment */
+
+static struct section *sects, **sectstail, **sectstab;
+static struct symbol *syms, **symstail;
+static uint32_t nsyms;
+
+/* These variables are set by macho_layout_symbols() to organize
+   the symbol table and string table in order the dynamic linker
+   expects.  They are then used in macho_write() to put out the
+   symbols and strings in that order.
+
+   The order of the symbol table is:
+     local symbols
+     defined external symbols (sorted by name)
+     undefined external symbols (sorted by name)
+
+   The order of the string table is:
+     strings for external symbols
+     strings for local symbols
+ */
+static uint32_t ilocalsym = 0;
+static uint32_t iextdefsym = 0;
+static uint32_t iundefsym = 0;
+static uint32_t nlocalsym;
+static uint32_t nextdefsym;
+static uint32_t nundefsym;
+static struct symbol **extdefsyms = NULL;
+static struct symbol **undefsyms = NULL;
+
+static struct RAA *extsyms;
+static struct SAA *strs;
+static uint32_t strslen;
+
+/* Global file information. This should be cleaned up into either
+   a structure or as function arguments.  */
+static uint32_t head_ncmds = 0;
+static uint32_t head_sizeofcmds = 0;
+static uint32_t head_flags = 0;
+static uint64_t seg_filesize = 0;
+static uint64_t seg_vmsize = 0;
+static uint32_t seg_nsects = 0;
+static uint64_t rel_padcnt = 0;
+
+/*
+ * Functions for handling fixed-length zero-padded string
+ * fields, that may or may not be null-terminated.
+ */
+
+/* Copy a string into a zero-padded fixed-length field */
+#define xstrncpy(xdst, xsrc) strncpy(xdst, xsrc, sizeof(xdst))
+
+/* Compare a fixed-length field with a string */
+#define xstrncmp(xdst, xsrc) strncmp(xdst, xsrc, sizeof(xdst))
+
+#define alignint32_t(x)							\
+    ALIGN(x, sizeof(int32_t))	/* align x to int32_t boundary */
+
+#define alignint64_t(x)							\
+    ALIGN(x, sizeof(int64_t))	/* align x to int64_t boundary */
+
+#define alignptr(x) \
+    ALIGN(x, fmt.ptrsize)	/* align x to output format width */
+
+static struct hash_table section_by_name;
+static struct RAA *section_by_index;
+
+static struct section * never_null
+find_or_add_section(const char *segname, const char *sectname)
+{
+    struct hash_insert hi;
+    void **sp;
+    struct section *s;
+    char sect34;
+
+    snprintf(sect, sizeof sect, "%-16s,%-16s", segname, sectname);
+
+    sp = hash_find(&section_by_name, sect, &hi);
+    if (sp)
+	return (struct section *)(*sp);
+
+    s = nasm_zalloc(sizeof *s);
+    xstrncpy(s->segname, segname);
+    xstrncpy(s->sectname, sectname);
+    xstrncpy(s->namestr, sect);
+    hash_add(&hi, s->namestr, s);
+
+    s->index = s->subsection = seg_alloc();
+    section_by_index = raa_write_ptr(section_by_index, s->index >> 1, s);
+
+    return s;
+}
+
+static inline bool is_new_section(const struct section *s)
+{
+    return !s->data;
+}
+
+static struct section *get_section_by_name(const char *segname,
+                                           const char *sectname)
+{
+    char sect34;
+    void **sp;
+
+    snprintf(sect, sizeof sect, "%-16s,%-16s", segname, sectname);
+
+    sp = hash_find(&section_by_name, sect, NULL);
+    return sp ? (struct section *)(*sp) : NULL;
+}
+
+static struct section *get_section_by_index(int32_t index)
+{
+    if (index < 0 || index >= SEG_ABS || (index & 1))
+	return NULL;
+
+    return raa_read_ptr(section_by_index, index >> 1);
+}
+
+struct dir_list {
+    struct dir_list *next;
+    struct dir_list *last;
+    const char *dir_name;
+    uint32_t dir;
+};
+
+struct file_list {
+    struct file_list *next;
+    struct file_list *last;
+    const char *file_name;
+    uint32_t file;
+    struct dir_list *dir;
+};
+
+struct dw_sect_list {
+    struct SAA *psaa;
+    int32_t section;
+    uint32_t line;
+    uint64_t offset;
+    uint32_t file;
+    struct dw_sect_list *next;
+    struct dw_sect_list *last;
+};
+
+struct section_info {
+    uint64_t size;
+    int32_t secto;
+};
+
+#define DW_LN_BASE (-5)
+#define DW_LN_RANGE 14
+#define DW_OPCODE_BASE 13
+#define DW_MAX_LN (DW_LN_BASE + DW_LN_RANGE)
+#define DW_MAX_SP_OPCODE 256
+
+static struct file_list *dw_head_file = 0, *dw_cur_file = 0, **dw_last_file_next = NULL;
+static struct dir_list *dw_head_dir = 0, **dw_last_dir_next = NULL;
+static struct dw_sect_list  *dw_head_sect = 0, *dw_cur_sect = 0, *dw_last_sect = 0;
+static uint32_t  cur_line = 0, dw_num_files = 0, dw_num_dirs = 0, dw_num_sects = 0;
+static bool  dbg_immcall = false;
+static const char *module_name = NULL;
+
+/*
+ * Special section numbers which are used to define Mach-O special
+ * symbols, which can be used with WRT to provide PIC relocation
+ * types.
+ */
+static int32_t macho_tlvp_sect;
+static int32_t macho_gotpcrel_sect;
+
+static void macho_init(void)
+{
+    module_name = inname;
+    sects = NULL;
+    sectstail = &sects;
+
+    /* Fake section for absolute symbols */
+    absolute_sect.index = NO_SEG;
+
+    syms = NULL;
+    symstail = &syms;
+    nsyms = 0;
+    nlocalsym = 0;
+    nextdefsym = 0;
+    nundefsym = 0;
+
+    extsyms = raa_init();
+    strs = saa_init(1L);
+
+    section_by_index = raa_init();
+
+    /* string table starts with a zero byte so index 0 is an empty string */
+    saa_wbytes(strs, zero_buffer, 1);
+    strslen = 1;
+
+    /* add special symbol for TLVP */
+    macho_tlvp_sect = seg_alloc() + 1;
+    backend_label("..tlvp", macho_tlvp_sect, 0L);
+}
+
+static void sect_write(struct section *sect,
+                       const uint8_t *data, uint32_t len)
+{
+    saa_wbytes(sect->data, data, len);
+    sect->size += len;
+}
+
+/*
+ * Find a suitable global symbol for a ..gotpcrel or ..tlvp reference
+ */
+static struct symbol *macho_find_sym(struct section *s, uint64_t offset,
+				     bool global, bool exact)
+{
+    struct rbtree *srb;
+
+    srb = rb_search(s->symsglobal, offset);
+
+    if (!srb || (exact && srb->key != offset)) {
+        nasm_error(ERR_NONFATAL, "unable to find a suitable%s%s symbol"
+		   " for this reference",
+		   global ? " global" : "",
+		   s == &absolute_sect ? " absolute " : "");
+        return NULL;
+    }
+
+    return container_of(srb - global, struct symbol, symv);
+}
+
+static int64_t add_reloc(struct section *sect, int32_t section,
+			 int64_t offset,
+			 enum reltype reltype, int bytes)
+{
+    struct reloc *r;
+    struct section *s;
+    int32_t fi;
+    int64_t adjust;
+
+    /* Double check this is a valid relocation type for this platform */
+    nasm_assert(reltype <= fmt.maxreltype);
+
+    /* the current end of the section will be the symbol's address for
+     ** now, might have to be fixed by macho_fixup_relocs() later on. make
+     ** sure we don't make the symbol scattered by setting the highest
+     ** bit by accident */
+    r = nasm_malloc(sizeof(struct reloc));
+    r->addr = sect->size & ~R_SCATTERED;
+    r->ext = 1;
+    adjust = 0;
+
+    /* match byte count 1, 2, 4, 8 to length codes 0, 1, 2, 3 respectively */
+    r->length = ilog2_32(bytes);
+
+    /* set default relocation values */
+    r->type = fmt.reloc_abs;
+    r->pcrel = 0;
+    r->snum = R_ABS;
+
+    s = get_section_by_index(section);
+    fi = s ? s->fileindex : NO_SECT;
+
+    /* absolute relocation */
+    switch (reltype) {
+    case RL_ABS:
+	if (section == NO_SEG) {
+	    /* absolute (can this even happen?) */
+	    r->ext = 0;
+	} else if (fi == NO_SECT) {
+	    /* external */
+	    r->snum = raa_read(extsyms, section);
+	} else {
+	    /* local */
+	    r->ext = 0;
+	    r->snum = fi;
+	}
+	break;
+
+    case RL_REL:
+    case RL_BRANCH:
+	r->type = fmt.reloc_rel;
+	r->pcrel = 1;
+	if (section == NO_SEG) {
+	    /* may optionally be converted below by fmt.forcesym */
+	    r->ext = 0;
+	} else if (fi == NO_SECT) {
+	    /* external */
+	    sect->extreloc = 1;
+	    r->snum = raa_read(extsyms, section);
+	    if (reltype == RL_BRANCH)
+		r->type = X86_64_RELOC_BRANCH;
+	} else {
+	    /* local */
+	    r->ext = 0;
+	    r->snum = fi;
+	    if (reltype == RL_BRANCH)
+		r->type = X86_64_RELOC_BRANCH;
+	}
+	break;
+
+    case RL_SUB: /* obsolete */
+	nasm_warn(WARN_OTHER, "relcation with subtraction"
+		   "becomes to be obsolete");
+	r->ext = 0;
+	r->type = X86_64_RELOC_SUBTRACTOR;
+	break;
+
+    case RL_GOT:
+	r->type = X86_64_RELOC_GOT;
+	goto needsym;
+
+    case RL_GOTLOAD:
+	r->type = X86_64_RELOC_GOT_LOAD;
+	goto needsym;
+
+    case RL_TLV:
+	r->type = fmt.reloc_tlv;
+	goto needsym;
+
+    needsym:
+	r->pcrel = (fmt.ptrsize == 8 ? 1 : 0);
+	if (section == NO_SEG) {
+	    nasm_error(ERR_NONFATAL, "Unsupported use of use of WRT");
+	    goto bail;
+	} else if (fi == NO_SECT) {
+	    /* external */
+	    r->snum = raa_read(extsyms, section);
+	} else {
+	    /* internal - GOTPCREL doesn't need to be in global */
+	    struct symbol *sym = macho_find_sym(s, offset,
+						false, /* reltype != RL_TLV */
+						true);
+	    if (!sym) {
+		nasm_error(ERR_NONFATAL, "Symbol for WRT not found");
+		goto bail;
+	    }
+
+	    adjust -= sym->symv0.key;
+	    r->snum = sym->initial_snum;
+	}
+	break;
+    }
+
+    /*
+     * For 64-bit Mach-O, force a symbol reference if at all possible
+     * Allow for r->snum == R_ABS by searching absolute_sect
+     */
+    if (!r->ext && fmt.forcesym) {
+	struct symbol *sym = macho_find_sym(s ? s : &absolute_sect,
+					    offset, false, false);
+	if (sym) {
+	    adjust -= sym->symv0.key;
+	    r->snum = sym->initial_snum;
+	    r->ext = 1;
+	}
+    }
+
+    if (r->pcrel)
+	adjust += ((r->ext && fmt.ptrsize == 8) ? bytes : -(int64_t)sect->size);
+
+    /* NeXT as puts relocs in reversed order (address-wise) into the
+     ** files, so we do the same, doesn't seem to make much of a
+     ** difference either way */
+    r->next = sect->relocs;
+    sect->relocs = r;
+    if (r->ext)
+	sect->extreloc = 1;
+    ++sect->nreloc;
+
+    return adjust;
+
+ bail:
+    nasm_free(r);
+    return 0;
+}
+
+static void macho_output(int32_t secto, const void *data,
+			 enum out_type type, uint64_t size,
+                         int32_t section, int32_t wrt)
+{
+    struct section *s;
+    int64_t addr, offset;
+    uint8_t mydata16, *p;
+    bool is_bss;
+    enum reltype reltype;
+
+    s = get_section_by_index(secto);
+    if (!s) {
+        nasm_warn(WARN_OTHER, "attempt to assemble code in"
+              " section %d: defaulting to `.text'", secto);
+        s = get_section_by_name("__TEXT", "__text");
+
+        /* should never happen */
+        if (!s)
+            nasm_panic("text section not found");
+    }
+
+    /* debug code generation only for sections tagged with
+     * instruction attribute */
+    if (s->flags & S_ATTR_SOME_INSTRUCTIONS)
+    {
+        struct section_info sinfo;
+        sinfo.size = s->size;
+        sinfo.secto = secto;
+        dfmt->debug_output(0, &sinfo);
+    }
+
+    is_bss = (s->flags & SECTION_TYPE) == S_ZEROFILL;
+
+    if (is_bss && type != OUT_RESERVE) {
+        nasm_warn(WARN_OTHER, "attempt to initialize memory in "
+              "BSS section: ignored");
+        /* FIXME */
+        nasm_warn(WARN_OTHER, "section size may be negative"
+            "with address symbols");
+        s->size += realsize(type, size);
+        return;
+    }
+
+    memset(mydata, 0, sizeof(mydata));
+
+    switch (type) {
+    case OUT_RESERVE:
+        if (!is_bss) {
+            nasm_warn(WARN_ZEROING, "uninitialized space declared in"
+		       " %s,%s section: zeroing", s->segname, s->sectname);
+
+            sect_write(s, NULL, size);
+        } else
+            s->size += size;
+
+        break;
+
+    case OUT_RAWDATA:
+        sect_write(s, data, size);
+        break;
+
+    case OUT_ADDRESS:
+    {
+	int asize = abs((int)size);
+
+        addr = *(int64_t *)data;
+        if (section != NO_SEG) {
+            if (section % 2) {
+                nasm_error(ERR_NONFATAL, "Mach-O format does not support"
+			   " section base references");
+            } else if (wrt == NO_SEG) {
+		if (fmt.ptrsize == 8 && asize != 8) {
+		    nasm_error(ERR_NONFATAL,
+			       "Mach-O 64-bit format does not support"
+			       " 32-bit absolute addresses");
+		} else {
+		    addr += add_reloc(s, section, addr, RL_ABS, asize);
+		}
+	    } else if (wrt == macho_tlvp_sect && fmt.ptrsize != 8 &&
+		       asize == (int) fmt.ptrsize) {
+		addr += add_reloc(s, section, addr, RL_TLV, asize);
+	    } else {
+		nasm_error(ERR_NONFATAL, "Mach-O format does not support"
+			   " this use of WRT");
+	    }
+	}
+
+        p = mydata;
+	WRITEADDR(p, addr, asize);
+        sect_write(s, mydata, asize);
+        break;
+    }
+
+    case OUT_REL1ADR:
+    case OUT_REL2ADR:
+
+        p = mydata;
+	offset = *(int64_t *)data;
+        addr = offset - size;
+
+        if (section != NO_SEG && section % 2) {
+            nasm_error(ERR_NONFATAL, "Mach-O format does not support"
+		       " section base references");
+	} else if (fmt.ptrsize == 8) {
+	    nasm_error(ERR_NONFATAL, "Unsupported non-32-bit"
+		       " Macho-O relocation 2");
+	} else if (wrt != NO_SEG) {
+	    nasm_error(ERR_NONFATAL, "Mach-O format does not support"
+		       " this use of WRT");
+	    wrt = NO_SEG;	/* we can at least _try_ to continue */
+	} else {
+	    addr += add_reloc(s, section, addr+size, RL_REL,
+                              type == OUT_REL1ADR ? 1 : 2);
+	}
+
+        WRITESHORT(p, addr);
+        sect_write(s, mydata, type == OUT_REL1ADR ? 1 : 2);
+        break;
+
+    case OUT_REL4ADR:
+    case OUT_REL8ADR:
+
+        p = mydata;
+	offset = *(int64_t *)data;
+        addr = offset - size;
+	reltype = RL_REL;
+
+        if (section != NO_SEG && section % 2) {
+            nasm_error(ERR_NONFATAL, "Mach-O format does not support"
+		       " section base references");
+        } else if (wrt == NO_SEG) {
+	    if (fmt.ptrsize == 8 &&
+		(s->flags & S_ATTR_SOME_INSTRUCTIONS)) {
+		uint8_t opcode2;
+
+		opcode0 = opcode1 = 0;
+
+		/* HACK: Retrieve instruction opcode */
+		if (likely(s->data->datalen >= 2)) {
+		    saa_fread(s->data, s->data->datalen-2, opcode, 2);
+		} else if (s->data->datalen == 1) {
+		    saa_fread(s->data, 0, opcode+1, 1);
+		}
+
+		if ((opcode0 != 0x0f && (opcode1 & 0xfe) == 0xe8) ||
+		    (opcode0 == 0x0f && (opcode1 & 0xf0) == 0x80)) {
+		    /* Direct call, jmp, or jcc */
+		    reltype = RL_BRANCH;
+		}
+	    }
+	} else if (wrt == macho_gotpcrel_sect) {
+	    reltype = RL_GOT;
+
+	    if ((s->flags & S_ATTR_SOME_INSTRUCTIONS) &&
+		s->data->datalen >= 3) {
+		uint8_t gotload3;
+
+		/* HACK: Retrieve instruction opcode */
+		saa_fread(s->data, s->data->datalen-3, gotload, 3);
+		if ((gotload0 & 0xf8) == 0x48 &&
+		    gotload1 == 0x8b &&
+		    (gotload2 & 0307) == 0005) {
+		    /* movq <reg>,rel sym wrt ..gotpcrel */
+		    reltype = RL_GOTLOAD;
+		}
+	    }
+	} else if (wrt == macho_tlvp_sect && fmt.ptrsize == 8) {
+	    reltype = RL_TLV;
+	} else {
+	    nasm_error(ERR_NONFATAL, "Mach-O format does not support"
+		       " this use of WRT");
+	    /* continue with RL_REL */
+	}
+
+	addr += add_reloc(s, section, offset, reltype,
+                          type == OUT_REL4ADR ? 4 : 8);
+        WRITELONG(p, addr);
+        sect_write(s, mydata, type == OUT_REL4ADR ? 4 : 8);
+        break;
+
+    default:
+        nasm_error(ERR_NONFATAL, "Unrepresentable relocation in Mach-O");
+        break;
+    }
+}
+
+#define S_CODE  (S_REGULAR | S_ATTR_SOME_INSTRUCTIONS | S_ATTR_PURE_INSTRUCTIONS)
+#define NO_TYPE S_NASM_TYPE_MASK
+
+/* Translation table from traditional Unix section names to Mach-O */
+static const struct macho_known_section {
+    const char      *nasmsect;
+    const char      *segname;
+    const char      *sectname;
+    const uint32_t  flags;
+} known_sections = {
+    { ".text",          "__TEXT",   "__text",           S_CODE          },
+    { ".data",          "__DATA",   "__data",           S_REGULAR       },
+    { ".rodata",        "__DATA",   "__const",          S_REGULAR       },
+    { ".bss",           "__DATA",   "__bss",            S_ZEROFILL      },
+    { ".debug_abbrev",  "__DWARF",  "__debug_abbrev",   S_ATTR_DEBUG    },
+    { ".debug_info",    "__DWARF",  "__debug_info",     S_ATTR_DEBUG    },
+    { ".debug_line",    "__DWARF",  "__debug_line",     S_ATTR_DEBUG    },
+    { ".debug_str",     "__DWARF",  "__debug_str",      S_ATTR_DEBUG    },
+};
+
+/* Section type or attribute directives */
+static const struct macho_known_section_attr {
+    const char      *name;
+    uint32_t        flags;
+} sect_attribs = {
+    { "data",               S_REGULAR                               },
+    { "code",               S_CODE                                  },
+    { "mixed",              S_REGULAR | S_ATTR_SOME_INSTRUCTIONS    },
+    { "bss",                S_ZEROFILL                              },
+    { "zerofill",           S_ZEROFILL                              },
+    { "no_dead_strip",      NO_TYPE | S_ATTR_NO_DEAD_STRIP          },
+    { "live_support",       NO_TYPE | S_ATTR_LIVE_SUPPORT           },
+    { "strip_static_syms",  NO_TYPE | S_ATTR_STRIP_STATIC_SYMS      },
+    { "debug",              NO_TYPE | S_ATTR_DEBUG                  },
+    { NULL, 0 }
+};
+
+static const struct macho_known_section *
+lookup_known_section(const char *name, bool by_sectname)
+{
+    size_t i;
+
+    if (name && name0) {
+            for (i = 0; i < ARRAY_SIZE(known_sections); i++) {
+                const char *p = by_sectname ?
+                    known_sectionsi.sectname :
+                    known_sectionsi.nasmsect;
+                if (!strcmp(name, p))
+                    return &known_sectionsi;
+            }
+    }
+
+    return NULL;
+}
+
+static int32_t macho_section(char *name, int *bits)
+{
+    const struct macho_known_section *known_section;
+    const struct macho_known_section_attr *sa;
+    char *sectionAttributes;
+    struct section *s;
+    const char *section, *segment;
+    uint32_t flags;
+    char *currentAttribute;
+    char *comma;
+
+    bool new_seg;
+
+    /* Default to the appropriate number of bits. */
+    if (!name) {
+        *bits = fmt.ptrsize << 3;
+        name = ".text";
+        sectionAttributes = NULL;
+    } else {
+        sectionAttributes = name;
+        name = nasm_strsep(&sectionAttributes, " \t");
+    }
+
+    section = segment = NULL;
+    flags = 0;
+
+    comma = strchr(name, ',');
+    if (comma) {
+	int len;
+
+	*comma = '\0';
+	segment = name;
+	section = comma+1;
+
+	len = strlen(segment);
+	if (len == 0) {
+	    nasm_error(ERR_NONFATAL, "empty segment name\n");
+	} else if (len > 16) {
+	    nasm_error(ERR_NONFATAL, "segment name %s too long\n", segment);
+	}
+
+	len = strlen(section);
+	if (len == 0) {
+	    nasm_error(ERR_NONFATAL, "empty section name\n");
+	} else if (len > 16) {
+	    nasm_error(ERR_NONFATAL, "section name %s too long\n", section);
+	}
+
+        known_section = lookup_known_section(section, true);
+        if (known_section)
+            flags = known_section->flags;
+        else
+            flags = S_REGULAR;
+    } else {
+        known_section = lookup_known_section(name, false);
+        if (!known_section) {
+            nasm_error(ERR_NONFATAL, "unknown section name %s\n", name);
+            return NO_SEG;
+        }
+
+        segment = known_section->segname;
+        section = known_section->sectname;
+        flags = known_section->flags;
+    }
+
+    /* try to find section with that name, or create it */
+    s = find_or_add_section(segment, section);
+    new_seg = is_new_section(s);
+
+    /* initialize it if it is a brand new section */
+    if (new_seg) {
+	*sectstail = s;
+	sectstail = &s->next;
+
+	s->data = saa_init(1L);
+	s->fileindex = ++seg_nsects;
+	s->align = -1;
+	s->pad = -1;
+	s->offset = -1;
+	s->by_name = false;
+
+	s->size = 0;
+	s->nreloc = 0;
+	s->flags = flags;
+    }
+
+    if (comma)
+	*comma = ',';		/* Restore comma */
+
+    s->by_name = s->by_name || comma; /* Was specified by name */
+
+    flags = NO_TYPE;
+
+    while (sectionAttributes &&
+	   (currentAttribute = nasm_strsep(&sectionAttributes, " \t"))) {
+	if (!*currentAttribute)
+	    continue;
+
+	if (!nasm_strnicmp("align=", currentAttribute, 6)) {
+	    char *end;
+	    int newAlignment, value;
+
+	    value = strtoul(currentAttribute + 6, (char**)&end, 0);
+	    newAlignment = alignlog2_32(value);
+
+	    if (0 != *end) {
+		nasm_error(ERR_NONFATAL,
+			   "unknown or missing alignment value \"%s\" "
+			   "specified for section \"%s\"",
+			   currentAttribute + 6,
+			   name);
+	    } else if (0 > newAlignment) {
+		nasm_error(ERR_NONFATAL,
+			   "alignment of %d (for section \"%s\") is not "
+			   "a power of two",
+			   value,
+			   name);
+	    }
+
+	    if (s->align < newAlignment)
+		s->align = newAlignment;
+	} else {
+	    for (sa = sect_attribs; sa->name; sa++) {
+		if (!nasm_stricmp(sa->name, currentAttribute)) {
+		    if ((sa->flags & S_NASM_TYPE_MASK) != NO_TYPE) {
+			flags = (flags & ~S_NASM_TYPE_MASK)
+			    | (sa->flags & S_NASM_TYPE_MASK);
+		    }
+		    flags |= sa->flags & ~S_NASM_TYPE_MASK;
+		    break;
+		}
+	    }
+
+	    if (!sa->name) {
+		nasm_error(ERR_NONFATAL,
+			   "unknown section attribute %s for section %s",
+			   currentAttribute, name);
+	    }
+	}
+    }
+
+    if ((flags & S_NASM_TYPE_MASK) != NO_TYPE) {
+	if (!new_seg && ((s->flags ^ flags) & S_NASM_TYPE_MASK)) {
+	    nasm_error(ERR_NONFATAL,
+		       "inconsistent section attributes for section %s\n",
+		       name);
+	} else {
+	    s->flags = (s->flags & ~S_NASM_TYPE_MASK) | flags;
+	}
+    } else {
+	s->flags |= flags & ~S_NASM_TYPE_MASK;
+    }
+
+    return s->subsection;
+}
+
+static int32_t macho_herelabel(const char *name, enum label_type type,
+			       int32_t section, int32_t *subsection,
+			       bool *copyoffset)
+{
+    struct section *s;
+    int32_t subsec;
+    (void)name;
+
+    if (!(head_flags & MH_SUBSECTIONS_VIA_SYMBOLS))
+	return section;
+
+    /* No subsection only for local labels */
+    if (type == LBL_LOCAL)
+	return section;
+
+    s = get_section_by_index(section);
+    if (!s)
+	return section;
+
+    subsec = *subsection;
+    if (subsec == NO_SEG) {
+	/* Allocate a new subsection index */
+	subsec = *subsection = seg_alloc();
+	section_by_index = raa_write_ptr(section_by_index, subsec >> 1, s);
+    }
+
+    s->subsection = subsec;
+    *copyoffset = true;		/* Maintain previous offset */
+    return subsec;
+}
+
+static void macho_symdef(char *name, int32_t section, int64_t offset,
+                         int is_global, char *special)
+{
+    struct symbol *sym;
+    struct section *s;
+    bool special_used = false;
+
+#if defined(DEBUG) && DEBUG>2
+    nasm_error(ERR_DEBUG,
+            " macho_symdef: %s, pass=%"PRId64" type %s, sec=%"PRIx32", off=%"PRIx64", is_global=%d, %s\n",
+	       name, pass_count(), pass_typespass_type(),
+	       section, offset, is_global, special);
+#endif
+
+    if (is_global == 3) {
+        if (special) {
+            int n = strcspn(special, " \t");
+
+            if (!nasm_strnicmp(special, "private_extern", n)) {
+                for (sym = syms; sym != NULL; sym = sym->next) {
+                    if (!strcmp(name, sym->name)) {
+                        if (sym->type & N_PEXT)
+                            return; /* nothing to be done */
+                        else
+                            break;
+                    }
+                }
+            }
+        }
+        nasm_error(ERR_NONFATAL, "The Mach-O format does not "
+              "(yet) support forward reference fixups.");
+        return;
+    }
+
+    if (name0 == '.' && name1 == '.' && name2 != '@') {
+	/*
+	 * This is a NASM special symbol. We never allow it into
+	 * the Macho-O symbol table, even if it's a valid one. If it
+	 * _isn't_ a valid one, we should barf immediately.
+	 */
+	if (strcmp(name, "..gotpcrel") && strcmp(name, "..tlvp"))
+            nasm_error(ERR_NONFATAL, "unrecognized special symbol `%s'", name);
+	return;
+    }
+
+    sym = *symstail = nasm_zalloc(sizeof(struct symbol));
+    sym->next = NULL;
+    symstail = &sym->next;
+
+    sym->name = name;
+    sym->strx = strslen;
+    sym->type = 0;
+    sym->desc = 0;
+    sym->symv0.key = offset;
+    sym->symv1.key = offset;
+    sym->initial_snum = -1;
+
+    /* external and common symbols get N_EXT */
+    if (is_global != 0) {
+        sym->type |= N_EXT;
+    }
+    if (is_global == 1) {
+        /* check special to see if the global symbol shall be marked as private external: N_PEXT */
+        if (special) {
+            int n = strcspn(special, " \t");
+
+            if (!nasm_strnicmp(special, "private_extern", n))
+                sym->type |= N_PEXT;
+            else
+                nasm_error(ERR_NONFATAL, "unrecognised symbol type `%.*s'", n, special);
+        }
+        special_used = true;
+    }
+
+    /* track the initially allocated symbol number for use in future fix-ups */
+    sym->initial_snum = nsyms;
+
+    if (section == NO_SEG) {
+        /* symbols in no section get absolute */
+        sym->type |= N_ABS;
+        sym->sect = NO_SECT;
+
+	s = &absolute_sect;
+    } else {
+	s = get_section_by_index(section);
+
+        sym->type |= N_SECT;
+
+        /* get the in-file index of the section the symbol was defined in */
+        sym->sect = s ? s->fileindex : NO_SECT;
+
+        if (!s) {
+            /* remember symbol number of references to external
+             ** symbols, this works because every external symbol gets
+             ** its own section number allocated internally by nasm and
+             ** can so be used as a key */
+	    extsyms = raa_write(extsyms, section, nsyms);
+
+            switch (is_global) {
+            case 1:
+            case 2:
+                /* there isn't actually a difference between global
+                 ** and common symbols, both even have their size in
+                 ** sym->symv0.key */
+                sym->type = N_EXT;
+                break;
+
+            default:
+                /* give an error on unfound section if it's not an
+                 ** external or common symbol (assemble_file() does a
+                 ** seg_alloc() on every call for them) */
+                nasm_panic("in-file index for section %d not found, is_global = %d", section, is_global);
+		break;
+            }
+	}
+    }
+
+    if (s) {
+	s->syms0 = rb_insert(s->syms0, &sym->symv0);
+	if (is_global)
+	    s->syms1 = rb_insert(s->syms1, &sym->symv1);
+    }
+
+    ++nsyms;
+
+    if (special && !special_used)
+        nasm_error(ERR_NONFATAL, "no special symbol features supported here");
+}
+
+static void macho_sectalign(int32_t seg, unsigned int value)
+{
+    struct section *s;
+    int align;
+
+    nasm_assert(!(seg & 1));
+
+    s = get_section_by_index(seg);
+
+    if (!s || !is_power2(value))
+        return;
+
+    align = alignlog2_32(value);
+    if (s->align < align)
+        s->align = align;
+}
+
+extern macros_t macho_stdmac;
+
+/* Comparison function for qsort symbol layout.  */
+static int layout_compare (const struct symbol **s1,
+			   const struct symbol **s2)
+{
+    return (strcmp ((*s1)->name, (*s2)->name));
+}
+
+/* The native assembler does a few things in a similar function
+
+	* Remove temporary labels
+	* Sort symbols according to local, external, undefined (by name)
+	* Order the string table
+
+   We do not remove temporary labels right now.
+
+   numsyms is the total number of symbols we have. strtabsize is the
+   number entries in the string table.  */
+
+static void macho_layout_symbols (uint32_t *numsyms,
+				  uint32_t *strtabsize)
+{
+    struct symbol *sym, **symp;
+    uint32_t i,j;
+
+    *numsyms = 0;
+    *strtabsize = sizeof (char);
+
+    symp = &syms;
+
+    while ((sym = *symp)) {
+	/* Undefined symbols are now external.  */
+	if (sym->type == N_UNDF)
+	    sym->type |= N_EXT;
+
+	if ((sym->type & N_EXT) == 0) {
+	    sym->snum = *numsyms;
+	    *numsyms = *numsyms + 1;
+	    nlocalsym++;
+	}
+	else {
+	    if ((sym->type & N_TYPE) != N_UNDF) {
+		nextdefsym++;
+	    } else {
+		nundefsym++;
+	    }
+
+	    /* If we handle debug info we'll want
+	       to check for it here instead of just
+	       adding the symbol to the string table.  */
+	    sym->strx = *strtabsize;
+	    saa_wbytes (strs, sym->name, (int32_t)(strlen(sym->name) + 1));
+	    *strtabsize += strlen(sym->name) + 1;
+	}
+	symp = &(sym->next);
+    }
+
+    /* Next, sort the symbols.  Most of this code is a direct translation from
+       the Apple cctools symbol layout. We need to keep compatibility with that.  */
+    /* Set the indexes for symbol groups into the symbol table */
+    ilocalsym = 0;
+    iextdefsym = nlocalsym;
+    iundefsym = nlocalsym + nextdefsym;
+
+    /* allocate arrays for sorting externals by name */
+    extdefsyms = nasm_malloc(nextdefsym * sizeof(struct symbol *));
+    undefsyms = nasm_malloc(nundefsym * sizeof(struct symbol *));
+
+    i = 0;
+    j = 0;
+
+    symp = &syms;
+
+    while ((sym = *symp)) {
+
+	if((sym->type & N_EXT) == 0) {
+	    sym->strx = *strtabsize;
+	    saa_wbytes (strs, sym->name, (int32_t)(strlen (sym->name) + 1));
+	    *strtabsize += strlen(sym->name) + 1;
+	}
+	else {
+	    if ((sym->type & N_TYPE) != N_UNDF) {
+		extdefsymsi++ = sym;
+	    } else {
+		undefsymsj++ = sym;
+	    }
+	}
+	symp = &(sym->next);
+    }
+
+    qsort(extdefsyms, nextdefsym, sizeof(struct symbol *),
+	  (int (*)(const void *, const void *))layout_compare);
+    qsort(undefsyms, nundefsym, sizeof(struct symbol *),
+	  (int (*)(const void *, const void *))layout_compare);
+
+    for(i = 0; i < nextdefsym; i++) {
+	extdefsymsi->snum = *numsyms;
+	*numsyms += 1;
+    }
+    for(j = 0; j < nundefsym; j++) {
+	undefsymsj->snum = *numsyms;
+	*numsyms += 1;
+    }
+}
+
+/* Calculate some values we'll need for writing later.  */
+
+static void macho_calculate_sizes (void)
+{
+    struct section *s;
+    int fi;
+
+    /* count sections and calculate in-memory and in-file offsets */
+    for (s = sects; s != NULL; s = s->next) {
+        uint64_t newaddr;
+
+        /* recalculate segment address based on alignment and vm size */
+        s->addr = seg_vmsize;
+
+        /* we need section alignment to calculate final section address */
+        if (s->align == -1)
+            s->align = DEFAULT_SECTION_ALIGNMENT;
+
+        newaddr = ALIGN(s->addr, UINT64_C(1) << s->align);
+        s->addr = newaddr;
+
+        seg_vmsize = newaddr + s->size;
+
+        /* zerofill sections aren't actually written to the file */
+        if ((s->flags & SECTION_TYPE) != S_ZEROFILL) {
+	    /*
+	     * LLVM/Xcode as always aligns the section data to 4
+	     * bytes; there is a comment in the LLVM source code that
+	     * perhaps aligning to pointer size would be better.
+	     */
+	    s->pad = ALIGN(seg_filesize, 4) - seg_filesize;
+	    s->offset = seg_filesize + s->pad;
+            seg_filesize += s->size + s->pad;
+
+            /* filesize and vmsize needs to be aligned */
+            seg_vmsize += s->pad;
+	}
+    }
+
+    /* calculate size of all headers, load commands and sections to
+    ** get a pointer to the start of all the raw data */
+    if (seg_nsects > 0) {
+        ++head_ncmds;
+        head_sizeofcmds += fmt.segcmd_size  + seg_nsects * fmt.sectcmd_size;
+    }
+
+    if (nsyms > 0) {
+	++head_ncmds;
+	head_sizeofcmds += MACHO_SYMCMD_SIZE;
+    }
+
+    if (seg_nsects > MAX_SECT) {
+	nasm_fatal("MachO output is limited to %d sections\n",
+		   MAX_SECT);
+    }
+
+    /* Create a table of sections by file index to avoid linear search */
+    sectstab = nasm_malloc((seg_nsects + 1) * sizeof(*sectstab));
+    sectstabNO_SECT = &absolute_sect;
+    for (s = sects, fi = 1; s != NULL; s = s->next, fi++)
+	sectstabfi = s;
+}
+
+/* Write out the header information for the file.  */
+
+static void macho_write_header (void)
+{
+    fwriteint32_t(fmt.mh_magic, ofile);	/* magic */
+    fwriteint32_t(fmt.cpu_type, ofile);	/* CPU type */
+    fwriteint32_t(CPU_SUBTYPE_I386_ALL, ofile);	/* CPU subtype */
+    fwriteint32_t(MH_OBJECT, ofile);	/* Mach-O file type */
+    fwriteint32_t(head_ncmds, ofile);	/* number of load commands */
+    fwriteint32_t(head_sizeofcmds, ofile);	/* size of load commands */
+    fwriteint32_t(head_flags, ofile);		/* flags, if any */
+    fwritezero(fmt.header_size - 7*4, ofile);	/* reserved fields */
+}
+
+/* Write out the segment load command at offset.  */
+
+static uint32_t macho_write_segment (uint64_t offset)
+{
+    uint64_t rel_base = alignptr(offset + seg_filesize);
+    uint32_t s_reloff = 0;
+    struct section *s;
+
+    fwriteint32_t(fmt.lc_segment, ofile);        /* cmd == LC_SEGMENT_64 */
+
+    /* size of load command including section load commands */
+    fwriteint32_t(fmt.segcmd_size + seg_nsects * fmt.sectcmd_size,
+		  ofile);
+
+    /* in an MH_OBJECT file all sections are in one unnamed (name
+    ** all zeros) segment */
+    fwritezero(16, ofile);
+    fwriteptr(0, ofile);		     /* in-memory offset */
+    fwriteptr(seg_vmsize, ofile);	     /* in-memory size */
+    fwriteptr(offset, ofile);	             /* in-file offset to data */
+    fwriteptr(seg_filesize, ofile);	     /* in-file size */
+    fwriteint32_t(VM_PROT_DEFAULT, ofile);   /* maximum vm protection */
+    fwriteint32_t(VM_PROT_DEFAULT, ofile);   /* initial vm protection */
+    fwriteint32_t(seg_nsects, ofile);        /* number of sections */
+    fwriteint32_t(0, ofile);		     /* no flags */
+
+    /* emit section headers */
+    for (s = sects; s != NULL; s = s->next) {
+	if (s->nreloc) {
+	    nasm_assert((s->flags & SECTION_TYPE) != S_ZEROFILL);
+	    s->flags |= S_ATTR_LOC_RELOC;
+	    if (s->extreloc)
+		s->flags |= S_ATTR_EXT_RELOC;
+	} else if (!xstrncmp(s->segname, "__DATA") &&
+		   !xstrncmp(s->sectname, "__const") &&
+		   !s->by_name &&
+		   !get_section_by_name("__TEXT", "__const")) {
+	    /*
+	     * The MachO equivalent to .rodata can be either
+	     * __DATA,__const or __TEXT,__const; the latter only if
+	     * there are no relocations.  However, when mixed it is
+	     * better to specify the segments explicitly.
+	     */
+	    xstrncpy(s->segname, "__TEXT");
+	}
+
+        nasm_write(s->sectname, sizeof(s->sectname), ofile);
+        nasm_write(s->segname, sizeof(s->segname), ofile);
+        fwriteptr(s->addr, ofile);
+        fwriteptr(s->size, ofile);
+
+        /* dummy data for zerofill sections or proper values */
+        if ((s->flags & SECTION_TYPE) != S_ZEROFILL) {
+	    nasm_assert(s->pad != (uint32_t)-1);
+	    offset += s->pad;
+            fwriteint32_t(offset, ofile);
+	    offset += s->size;
+            /* Write out section alignment, as a power of two.
+            e.g. 32-bit word alignment would be 2 (2^2 = 4).  */
+            fwriteint32_t(s->align, ofile);
+            /* To be compatible with cctools as we emit
+            a zero reloff if we have no relocations.  */
+            fwriteint32_t(s->nreloc ? rel_base + s_reloff : 0, ofile);
+            fwriteint32_t(s->nreloc, ofile);
+
+            s_reloff += s->nreloc * MACHO_RELINFO_SIZE;
+        } else {
+            fwriteint32_t(0, ofile);
+            fwriteint32_t(s->align, ofile);
+            fwriteint32_t(0, ofile);
+            fwriteint32_t(0, ofile);
+        }
+
+        fwriteint32_t(s->flags, ofile);      /* flags */
+        fwriteint32_t(0, ofile);	     /* reserved */
+        fwriteptr(0, ofile);		     /* reserved */
+    }
+
+    rel_padcnt = rel_base - offset;
+    offset = rel_base + s_reloff;
+
+    return offset;
+}
+
+/* For a given chain of relocs r, write out the entire relocation
+   chain to the object file.  */
+
+static void macho_write_relocs (struct reloc *r)
+{
+    while (r) {
+	uint32_t word2;
+
+	fwriteint32_t(r->addr, ofile); /* reloc offset */
+
+	word2 = r->snum;
+	word2 |= r->pcrel << 24;
+	word2 |= r->length << 25;
+	word2 |= r->ext << 27;
+	word2 |= r->type << 28;
+	fwriteint32_t(word2, ofile); /* reloc data */
+	r = r->next;
+    }
+}
+
+/* Write out the section data.  */
+static void macho_write_section (void)
+{
+    struct section *s;
+    struct reloc *r;
+    uint8_t *p;
+    int32_t len;
+    int64_t l;
+    union offset {
+	uint64_t val;
+	uint8_t buf8;
+    } blk;
+
+    for (s = sects; s != NULL; s = s->next) {
+	if ((s->flags & SECTION_TYPE) == S_ZEROFILL)
+	    continue;
+
+	/* Like a.out Mach-O references things in the data or bss
+	 * sections by addresses which are actually relative to the
+	 * start of the _text_ section, in the _file_. See outaout.c
+	 * for more information. */
+	saa_rewind(s->data);
+	for (r = s->relocs; r != NULL; r = r->next) {
+	    len = (uint32_t)1 << r->length;
+	    if (len > 4)	/* Can this ever be an issue?! */
+		len = 8;
+	    blk.val = 0;
+	    saa_fread(s->data, r->addr, blk.buf, len);
+
+	    /* get offset based on relocation type */
+#ifdef WORDS_LITTLEENDIAN
+	    l = blk.val;
+#else
+	    l  = blk.buf0;
+	    l += ((int64_t)blk.buf1) << 8;
+	    l += ((int64_t)blk.buf2) << 16;
+	    l += ((int64_t)blk.buf3) << 24;
+	    l += ((int64_t)blk.buf4) << 32;
+	    l += ((int64_t)blk.buf5) << 40;
+	    l += ((int64_t)blk.buf6) << 48;
+	    l += ((int64_t)blk.buf7) << 56;
+#endif
+
+	    /* If the relocation is internal add to the current section
+	       offset. Otherwise the only value we need is the symbol
+	       offset which we already have. The linker takes care
+	       of the rest of the address.  */
+	    if (!r->ext) {
+		/* generate final address by section address and offset */
+		nasm_assert(r->snum <= seg_nsects);
+		l += sectstabr->snum->addr;
+		if (r->pcrel)
+		    l -= s->addr;
+	    } else if (r->pcrel && r->type == GENERIC_RELOC_VANILLA) {
+		l -= s->addr;
+	    }
+
+	    /* write new offset back */
+	    p = blk.buf;
+	    WRITEDLONG(p, l);
+	    saa_fwrite(s->data, r->addr, blk.buf, len);
+	}
+
+	/* dump the section data to file */
+	fwritezero(s->pad, ofile);
+	saa_fpwrite(s->data, ofile);
+    }
+
+    /* pad last section up to reloc entries on pointer boundary */
+    fwritezero(rel_padcnt, ofile);
+
+    /* emit relocation entries */
+    for (s = sects; s != NULL; s = s->next)
+	macho_write_relocs (s->relocs);
+}
+
+/* Write out the symbol table. We should already have sorted this
+   before now.  */
+static void macho_write_symtab (void)
+{
+    struct symbol *sym;
+    uint64_t i;
+
+    /* we don't need to pad here since MACHO_RELINFO_SIZE == 8 */
+
+    for (sym = syms; sym != NULL; sym = sym->next) {
+	if ((sym->type & N_EXT) == 0) {
+	    fwriteint32_t(sym->strx, ofile);		/* string table entry number */
+	    nasm_write(&sym->type, 1, ofile);		/* symbol type */
+	    nasm_write(&sym->sect, 1, ofile);		/* section */
+	    fwriteint16_t(sym->desc, ofile);		/* description */
+
+	    /* Fix up the symbol value now that we know the final section
+	       sizes.  */
+	    if (((sym->type & N_TYPE) == N_SECT) && (sym->sect != NO_SECT)) {
+		nasm_assert(sym->sect <= seg_nsects);
+		sym->symv0.key += sectstabsym->sect->addr;
+	    }
+
+	    fwriteptr(sym->symv0.key, ofile);	/* value (i.e. offset) */
+	}
+    }
+
+    for (i = 0; i < nextdefsym; i++) {
+	sym = extdefsymsi;
+	fwriteint32_t(sym->strx, ofile);
+	nasm_write(&sym->type, 1, ofile);	/* symbol type */
+	nasm_write(&sym->sect, 1, ofile);	/* section */
+	fwriteint16_t(sym->desc, ofile);	/* description */
+
+	/* Fix up the symbol value now that we know the final section
+	   sizes.  */
+	if (((sym->type & N_TYPE) == N_SECT) && (sym->sect != NO_SECT)) {
+	    nasm_assert(sym->sect <= seg_nsects);
+	    sym->symv0.key += sectstabsym->sect->addr;
+	}
+
+	fwriteptr(sym->symv0.key, ofile); /* value (i.e. offset) */
+    }
+
+     for (i = 0; i < nundefsym; i++) {
+	 sym = undefsymsi;
+	 fwriteint32_t(sym->strx, ofile);
+	 nasm_write(&sym->type, 1, ofile);	/* symbol type */
+	 nasm_write(&sym->sect, 1, ofile);	/* section */
+	 fwriteint16_t(sym->desc, ofile);	/* description */
+
+	/* Fix up the symbol value now that we know the final section
+	   sizes.  */
+	 if (((sym->type & N_TYPE) == N_SECT) && (sym->sect != NO_SECT)) {
+	    nasm_assert(sym->sect <= seg_nsects);
+	    sym->symv0.key += sectstabsym->sect->addr;
+	 }
+
+	 fwriteptr(sym->symv0.key, ofile); /* value (i.e. offset) */
+     }
+
+}
+
+/* Fixup the snum in the relocation entries, we should be
+   doing this only for externally referenced symbols. */
+static void macho_fixup_relocs (struct reloc *r)
+{
+    struct symbol *sym;
+
+    while (r != NULL) {
+	if (r->ext) {
+	    for (sym = syms; sym != NULL; sym = sym->next) {
+		if (sym->initial_snum == r->snum) {
+		    r->snum = sym->snum;
+		    break;
+		}
+	    }
+	}
+	r = r->next;
+    }
+}
+
+/* Write out the object file.  */
+
+static void macho_write (void)
+{
+    uint64_t offset = 0;
+
+    /* mach-o object file structure:
+    **
+    ** mach header
+    **  uint32_t magic
+    **  int   cpu type
+    **  int   cpu subtype
+    **  uint32_t mach file type
+    **  uint32_t number of load commands
+    **  uint32_t size of all load commands
+    **   (includes section struct size of segment command)
+    **  uint32_t flags
+    **
+    ** segment command
+    **  uint32_t command type == LC_SEGMENT_64
+    **  uint32_t size of load command
+    **   (including section load commands)
+    **  char16 segment name
+    **  pointer  in-memory offset
+    **  pointer  in-memory size
+    **  pointer  in-file offset to data area
+    **  pointer  in-file size
+    **   (in-memory size excluding zerofill sections)
+    **  int   maximum vm protection
+    **  int   initial vm protection
+    **  uint32_t number of sections
+    **  uint32_t flags
+    **
+    ** section commands
+    **   char16 section name
+    **   char16 segment name
+    **   pointer  in-memory offset
+    **   pointer  in-memory size
+    **   uint32_t in-file offset
+    **   uint32_t alignment
+    **    (irrelevant in MH_OBJECT)
+    **   uint32_t in-file offset of relocation entries
+    **   uint32_t number of relocations
+    **   uint32_t flags
+    **   uint32_t reserved
+    **   uint32_t reserved
+    **
+    ** symbol table command
+    **  uint32_t command type == LC_SYMTAB
+    **  uint32_t size of load command
+    **  uint32_t symbol table offset
+    **  uint32_t number of symbol table entries
+    **  uint32_t string table offset
+    **  uint32_t string table size
+    **
+    ** raw section data
+    **
+    ** padding to pointer boundary
+    **
+    ** relocation data (struct reloc)
+    ** int32_t offset
+    **  uint data (symbolnum, pcrel, length, extern, type)
+    **
+    ** symbol table data (struct nlist)
+    **  int32_t  string table entry number
+    **  uint8_t type
+    **   (extern, absolute, defined in section)
+    **  uint8_t section
+    **   (0 for global symbols, section number of definition (>= 1, <=
+    **   254) for local symbols, size of variable for common symbols
+    **   type == extern)
+    **  int16_t description
+    **   (for stab debugging format)
+    **  pointer value (i.e. file offset) of symbol or stab offset
+    **
+    ** string table data
+    **  list of null-terminated strings
+    */
+
+    /* Emit the Mach-O header.  */
+    macho_write_header();
+
+    offset = fmt.header_size + head_sizeofcmds;
+
+    /* emit the segment load command */
+    if (seg_nsects > 0)
+	offset = macho_write_segment (offset);
+    else
+        nasm_warn(WARN_OTHER, "no sections?");
+
+    if (nsyms > 0) {
+        /* write out symbol command */
+        fwriteint32_t(LC_SYMTAB, ofile); /* cmd == LC_SYMTAB */
+        fwriteint32_t(MACHO_SYMCMD_SIZE, ofile); /* size of load command */
+        fwriteint32_t(offset, ofile);    /* symbol table offset */
+        fwriteint32_t(nsyms, ofile);     /* number of symbol
+                                         ** table entries */
+        offset += nsyms * fmt.nlist_size;
+        fwriteint32_t(offset, ofile);    /* string table offset */
+        fwriteint32_t(strslen, ofile);   /* string table size */
+    }
+
+    /* emit section data */
+    if (seg_nsects > 0)
+	macho_write_section ();
+
+    /* emit symbol table if we have symbols */
+    if (nsyms > 0)
+	macho_write_symtab ();
+
+    /* we don't need to pad here, we are already aligned */
+
+    /* emit string table */
+    saa_fpwrite(strs, ofile);
+}
+/* We do quite a bit here, starting with finalizing all of the data
+   for the object file, writing, and then freeing all of the data from
+   the file.  */
+
+static void macho_cleanup(void)
+{
+    struct section *s;
+    struct reloc *r;
+    struct symbol *sym;
+
+    dfmt->cleanup();
+
+    /* Sort all symbols.  */
+    macho_layout_symbols (&nsyms, &strslen);
+
+    /* Fixup relocation entries */
+    for (s = sects; s != NULL; s = s->next) {
+	macho_fixup_relocs (s->relocs);
+    }
+
+    /* First calculate and finalize needed values.  */
+    macho_calculate_sizes();
+    macho_write();
+
+    /* free up everything */
+    while (sects->next) {
+        s = sects;
+        sects = sects->next;
+
+        saa_free(s->data);
+        while (s->relocs != NULL) {
+            r = s->relocs;
+            s->relocs = s->relocs->next;
+            nasm_free(r);
+        }
+
+        nasm_free(s);
+    }
+
+    saa_free(strs);
+
+    raa_free(extsyms);
+
+    while (syms) {
+       sym = syms;
+       syms = syms->next;
+       nasm_free (sym);
+    }
+
+    nasm_free(extdefsyms);
+    nasm_free(undefsyms);
+    nasm_free(sectstab);
+    raa_free(section_by_index);
+    hash_free(&section_by_name);
+}
+
+static bool macho_set_section_attribute_by_symbol(const char *label, uint32_t flags)
+{
+    struct section *s;
+    int32_t nasm_seg;
+    int64_t offset;
+
+    if (lookup_label(label, &nasm_seg, &offset) == LBL_none) {
+	nasm_error(ERR_NONFATAL, "unknown symbol `%s' in no_dead_strip", label);
+	return false;
+    }
+
+    s = get_section_by_index(nasm_seg);
+    if (!s) {
+	nasm_error(ERR_NONFATAL, "symbol `%s' is external or absolute", label);
+	return false;
+    }
+
+    s->flags |= flags;
+    return true;
+}
+
+/*
+ * Mark a symbol for no dead stripping
+ */
+static enum directive_result macho_no_dead_strip(const char *labels)
+{
+    char *s, *p, *ep;
+    char ec;
+    enum directive_result rv = DIRR_ERROR;
+
+    p = s = nasm_strdup(labels);
+    while (*p) {
+	ep = nasm_skip_identifier(p);
+	if (!ep) {
+	    nasm_error(ERR_NONFATAL, "invalid symbol in NO_DEAD_STRIP");
+	    goto err;
+	}
+	ec = *ep;
+	if (ec && ec != ',' && !nasm_isspace(ec)) {
+	    nasm_error(ERR_NONFATAL, "cannot parse contents after symbol");
+	    goto err;
+	}
+	*ep = '\0';
+	if (!pass_first()) {
+	    if (!macho_set_section_attribute_by_symbol(p, S_ATTR_NO_DEAD_STRIP))
+		rv = DIRR_ERROR;
+	}
+	*ep = ec;
+	p = nasm_skip_spaces(ep);
+	if (*p == ',')
+	    p = nasm_skip_spaces(++p);
+    }
+
+    rv = DIRR_OK;
+
+err:
+    nasm_free(s);
+    return rv;
+}
+
+/*
+ * Mach-O pragmas
+ */
+static enum directive_result
+macho_pragma(const struct pragma *pragma)
+{
+    switch (pragma->opcode) {
+    case D_SUBSECTIONS_VIA_SYMBOLS:
+	if (*pragma->tail)
+	    return DIRR_BADPARAM;
+
+	if (!pass_first())
+	    head_flags |= MH_SUBSECTIONS_VIA_SYMBOLS;
+
+        /* Jmp-match optimization conflicts */
+        optimizing.flag |= OPTIM_DISABLE_JMP_MATCH;
+
+	return DIRR_OK;
+
+    case D_NO_DEAD_STRIP:
+	return macho_no_dead_strip(pragma->tail);
+
+    default:
+	return DIRR_UNKNOWN;	/* Not a Mach-O directive */
+    }
+}
+
+static const struct pragma_facility macho_pragma_list = {
+    { "macho", macho_pragma },
+    { NULL, macho_pragma }	/* Implements macho32/macho64 namespaces */
+};
+
+static void macho_dbg_generate(void)
+{
+    uint8_t *p_buf = NULL, *p_buf_base = NULL;
+    size_t saa_len = 0, high_addr = 0, total_len = 0;
+    struct section *p_section = NULL;
+    /* calculated at debug_str and referenced at debug_info */
+    uint32_t producer_str_offset = 0, module_str_offset = 0, dir_str_offset = 0;
+
+    /* debug section defines */
+    {
+        int bits = 0;
+        macho_section(".debug_abbrev", &bits);
+        macho_section(".debug_info", &bits);
+        macho_section(".debug_line", &bits);
+        macho_section(".debug_str", &bits);
+    }
+
+    /* dw section walk to find high_addr and total_len */
+    {
+        struct dw_sect_list *p_sect;
+
+        list_for_each(p_sect, dw_head_sect) {
+            uint64_t offset = get_section_by_index(p_sect->section)->size;
+            struct SAA *p_linep = p_sect->psaa;
+
+            saa_write8(p_linep, 2); /* std op 2 */
+            saa_write8(p_linep, offset - p_sect->offset);
+            saa_write8(p_linep, DW_LNS_extended_op);
+            saa_write8(p_linep, 1); /* operand length */
+            saa_write8(p_linep, DW_LNE_end_sequence);
+
+            total_len += p_linep->datalen;
+            high_addr += offset;
+        }
+    }
+
+    /* debug line */
+    {
+        struct dw_sect_list *p_sect;
+        size_t linep_off, buf_size;
+        struct SAA *p_lines = saa_init(1L);
+        struct dir_list *p_dir;
+        struct file_list *p_file;
+
+        p_section = get_section_by_name("__DWARF", "__debug_line");
+        nasm_assert(p_section != NULL);
+
+        saa_write8(p_lines, 1); /* minimum instruction length */
+        saa_write8(p_lines, 1); /* initial value of "is_stmt" */
+        saa_write8(p_lines, DW_LN_BASE); /* line base */
+        saa_write8(p_lines, DW_LN_RANGE); /* line range */
+        saa_write8(p_lines, DW_OPCODE_BASE); /* opcode base */
+        saa_write8(p_lines, 0); /* std opcode 1 length */
+        saa_write8(p_lines, 1); /* std opcode 2 length */
+        saa_write8(p_lines, 1); /* std opcode 3 length */
+        saa_write8(p_lines, 1); /* std opcode 4 length */
+        saa_write8(p_lines, 1); /* std opcode 5 length */
+        saa_write8(p_lines, 0); /* std opcode 6 length */
+        saa_write8(p_lines, 0); /* std opcode 7 length */
+        saa_write8(p_lines, 0); /* std opcode 8 length */
+        saa_write8(p_lines, 1); /* std opcode 9 length */
+        saa_write8(p_lines, 0); /* std opcode 10 length */
+        saa_write8(p_lines, 0); /* std opcode 11 length */
+        saa_write8(p_lines, 1); /* std opcode 12 length */
+        list_for_each(p_dir, dw_head_dir) {
+            saa_wcstring(p_lines, p_dir->dir_name);
+        }
+        saa_write8(p_lines, 0); /* end of table */
+
+        list_for_each(p_file, dw_head_file) {
+            saa_wcstring(p_lines, p_file->file_name);
+            saa_write8(p_lines, p_file->dir->dir); /* directory id */
+            saa_write8(p_lines, 0); /* time */
+            saa_write8(p_lines, 0); /* size */
+        }
+        saa_write8(p_lines, 0); /* end of table */
+
+        linep_off = p_lines->datalen;
+        /* 10 bytes for initial & prolong length, and dwarf version info */
+        buf_size = saa_len = linep_off + total_len + 10;
+        p_buf_base = p_buf = nasm_malloc(buf_size);
+
+        WRITELONG(p_buf, saa_len - 4); /* initial length; size excluding itself */
+        WRITESHORT(p_buf, 2); /* dwarf version */
+        WRITELONG(p_buf, linep_off); /* prolong length */
+
+        saa_rnbytes(p_lines, p_buf, linep_off);
+        p_buf += linep_off;
+        saa_free(p_lines);
+
+        list_for_each(p_sect, dw_head_sect) {
+            struct SAA *p_linep = p_sect->psaa;
+
+            saa_len = p_linep->datalen;
+            saa_rnbytes(p_linep, p_buf, saa_len);
+            p_buf += saa_len;
+
+            saa_free(p_linep);
+        }
+
+        macho_output(p_section->index, p_buf_base, OUT_RAWDATA, buf_size, NO_SEG, 0);
+
+        nasm_free(p_buf_base);
+    }
+
+    /* string section */
+    {
+        struct SAA *p_str = saa_init(1L);
+        char *cur_path = nasm_realpath(module_name);
+        char *cur_file = nasm_basename(cur_path);
+        char *cur_dir = nasm_dirname(cur_path);
+
+        p_section = get_section_by_name("__DWARF", "__debug_str");
+        nasm_assert(p_section != NULL);
+
+        producer_str_offset = 0;
+        module_str_offset = dir_str_offset = saa_wcstring(p_str, nasm_signature());
+        dir_str_offset += saa_wcstring(p_str, cur_file);
+        saa_wcstring(p_str, cur_dir);
+
+        saa_len = p_str->datalen;
+        p_buf = nasm_malloc(saa_len);
+        saa_rnbytes(p_str, p_buf, saa_len);
+        macho_output(p_section->index, p_buf, OUT_RAWDATA, saa_len, NO_SEG, 0);
+
+        nasm_free(cur_path);
+        nasm_free(cur_file);
+        nasm_free(cur_dir);
+        saa_free(p_str);
+        nasm_free(p_buf);
+    }
+
+    /* debug info */
+    {
+        struct SAA *p_info = saa_init(1L);
+
+        p_section = get_section_by_name("__DWARF", "__debug_info");
+        nasm_assert(p_section != NULL);
+
+        /* size will be overwritten once determined, so skip in p_info layout */
+        saa_write16(p_info, 2); /* dwarf version */
+        saa_write32(p_info, 0); /* offset info abbrev */
+        saa_write8(p_info, (ofmt == &of_macho64) ? 8 : 4);   /* pointer size  */
+
+        saa_write8(p_info, 1);   /* abbrev entry number  */
+
+        saa_write32(p_info, producer_str_offset); /* offset from string table for DW_AT_producer  */
+        saa_write16(p_info, DW_LANG_Mips_Assembler); /* DW_AT_language  */
+        saa_write32(p_info, module_str_offset); /* offset from string table for DW_AT_name  */
+        saa_write32(p_info, dir_str_offset); /* offset from string table for DW_AT_comp_dir */
+        saa_write32(p_info, 0); /* DW_AT_stmt_list  */
+
+        if (ofmt == &of_macho64) {
+            saa_write64(p_info, 0); /* DW_AT_low_pc */
+            saa_write64(p_info, high_addr); /* DW_AT_high_pc */
+        } else  {
+            saa_write32(p_info, 0); /* DW_AT_low_pc */
+            saa_write32(p_info, high_addr); /* DW_AT_high_pc */
+        }
+
+        saa_write8(p_info, 2);   /* abbrev entry number */
+
+        if (ofmt == &of_macho64) {
+            saa_write64(p_info, 0); /* DW_AT_low_pc */
+            saa_write64(p_info, 0); /* DW_AT_frame_base */
+        } else  {
+            saa_write32(p_info, 0); /* DW_AT_low_pc */
+            saa_write32(p_info, 0); /* DW_AT_frame_base */
+        }
+        saa_write8(p_info, DW_END_default);
+
+        saa_len = p_info->datalen;
+        p_buf_base = p_buf = nasm_malloc(saa_len + 4); /* 4B for size info */
+
+        WRITELONG(p_buf, saa_len);
+        saa_rnbytes(p_info, p_buf, saa_len);
+        macho_output(p_section->index, p_buf_base, OUT_RAWDATA, saa_len + 4, NO_SEG, 0);
+
+        saa_free(p_info);
+        nasm_free(p_buf_base);
+    }
+
+    /* abbrev section */
+    {
+        struct SAA *p_abbrev = saa_init(1L);
+
+        p_section = get_section_by_name("__DWARF", "__debug_abbrev");
+        nasm_assert(p_section != NULL);
+
+        saa_write8(p_abbrev, 1); /* entry number */
+
+        saa_write8(p_abbrev, DW_TAG_compile_unit);
+        saa_write8(p_abbrev, DW_CHILDREN_yes);
+
+        saa_write8(p_abbrev, DW_AT_producer);
+        saa_write8(p_abbrev, DW_FORM_strp);
+
+        saa_write8(p_abbrev, DW_AT_language);
+        saa_write8(p_abbrev, DW_FORM_data2);
+
+        saa_write8(p_abbrev, DW_AT_name);
+        saa_write8(p_abbrev, DW_FORM_strp);
+
+        saa_write8(p_abbrev, DW_AT_comp_dir);
+        saa_write8(p_abbrev, DW_FORM_strp);
+
+        saa_write8(p_abbrev, DW_AT_stmt_list);
+        saa_write8(p_abbrev, DW_FORM_data4);
+
+        saa_write8(p_abbrev, DW_AT_low_pc);
+        saa_write8(p_abbrev, DW_FORM_addr);
+
+        saa_write8(p_abbrev, DW_AT_high_pc);
+        saa_write8(p_abbrev, DW_FORM_addr);
+
+        saa_write16(p_abbrev, DW_END_default);
+
+        saa_write8(p_abbrev, 2); /* entry number */
+
+        saa_write8(p_abbrev, DW_TAG_subprogram);
+        saa_write8(p_abbrev, DW_CHILDREN_no);
+
+        saa_write8(p_abbrev, DW_AT_low_pc);
+        saa_write8(p_abbrev, DW_FORM_addr);
+
+        saa_write8(p_abbrev, DW_AT_frame_base);
+        saa_write8(p_abbrev, DW_FORM_addr);
+
+        saa_write16(p_abbrev, DW_END_default);
+
+	saa_write8(p_abbrev, 0); /* Terminal zero entry */
+
+        saa_len = p_abbrev->datalen;
+
+        p_buf = nasm_malloc(saa_len);
+
+        saa_rnbytes(p_abbrev, p_buf, saa_len);
+        macho_output(p_section->index, p_buf, OUT_RAWDATA, saa_len, NO_SEG, 0);
+
+        saa_free(p_abbrev);
+        nasm_free(p_buf);
+    }
+}
+
+static void new_file_list (const char *file_name, const char *dir_name)
+{
+    struct dir_list *dir_list;
+    bool need_new_dir_list = true;
+
+    nasm_new(dw_cur_file);
+    dw_cur_file->file = ++dw_num_files;
+    dw_cur_file->file_name = file_name;
+    if(!dw_head_file) {
+        dw_head_file = dw_cur_file;
+    } else {
+        *dw_last_file_next = dw_cur_file;
+    }
+    dw_last_file_next = &(dw_cur_file->next);
+
+    if(dw_head_dir) {
+        list_for_each(dir_list, dw_head_dir) {
+            if(!(strcmp(dir_name, dir_list->dir_name))) {
+                dw_cur_file->dir = dir_list;
+                need_new_dir_list = false;
+                break;
+            }
+        }
+    }
+
+    if(need_new_dir_list)
+    {
+        nasm_new(dir_list);
+        dir_list->dir = dw_num_dirs++;
+        dir_list->dir_name = dir_name;
+        if(!dw_head_dir) {
+            dw_head_dir = dir_list;
+        } else {
+            *dw_last_dir_next = dir_list;
+        }
+        dw_last_dir_next = &(dir_list->next);
+        dw_cur_file->dir = dir_list;
+    }
+}
+
+static void macho_dbg_init(void)
+{
+}
+
+static void macho_dbg_linenum(const char *file_name, int32_t line_num, int32_t segto)
+{
+    bool need_new_list = true;
+    const char *cur_file = nasm_basename(file_name);
+    const char *cur_dir  = nasm_dirname(file_name);
+    (void)segto;
+
+    if(!dw_cur_file || strcmp(cur_file, dw_cur_file->file_name) ||
+        strcmp(cur_dir, dw_cur_file->dir->dir_name)) {
+        if(dw_head_file) {
+            struct file_list *match;
+
+            list_for_each(match, dw_head_file) {
+                if(!(strcmp(cur_file, match->file_name)) &&
+                    !(strcmp(cur_dir, match->dir->dir_name))) {
+                    dw_cur_file = match;
+                    dw_cur_file->dir = match->dir;
+                    need_new_list = false;
+                    break;
+                }
+            }
+        }
+
+        if (need_new_list)
+            new_file_list(cur_file, cur_dir);
+    }
+
+    if (!need_new_list) {
+            nasm_free((void *)cur_file);
+            nasm_free((void *)cur_dir);
+    }
+
+    dbg_immcall = true;
+    cur_line = line_num;
+}
+
+static void macho_dbg_output(int type, void *param)
+{
+    struct section_info *sinfo_param = (struct section_info *)param;
+    int32_t secto = sinfo_param->secto;
+    bool need_new_sect = false;
+    struct SAA *p_linep = NULL;
+    (void)type;
+
+    if(!(dw_cur_sect && (dw_cur_sect->section == secto))) {
+        need_new_sect = true;
+        if(dw_head_sect) {
+            struct dw_sect_list *match = dw_head_sect;
+            uint32_t idx = 0;
+
+            for(; idx < dw_num_sects; idx++) {
+                if(match->section == secto) {
+                    dw_cur_sect = match;
+                    need_new_sect = false;
+                    break;
+                }
+                match = match->next;
+            }
+        }
+    }
+
+    if(need_new_sect) {
+        nasm_new(dw_cur_sect);
+        dw_num_sects ++;
+        p_linep = dw_cur_sect->psaa = saa_init(1L);
+        dw_cur_sect->line = dw_cur_sect->file = 1;
+        dw_cur_sect->offset = 0;
+        dw_cur_sect->next = NULL;
+        dw_cur_sect->section = secto;
+
+        saa_write8(p_linep, DW_LNS_extended_op);
+        saa_write8(p_linep, (ofmt == &of_macho64) ? 9 : 5);
+        saa_write8(p_linep, DW_LNE_set_address);
+        if (ofmt == &of_macho64) {
+            saa_write64(p_linep, 0);
+        } else {
+            saa_write32(p_linep, 0);
+        }
+
+        if(!dw_head_sect) {
+            dw_head_sect = dw_last_sect = dw_cur_sect;
+        } else {
+            dw_last_sect->next = dw_cur_sect;
+            dw_last_sect = dw_cur_sect;
+        }
+    }
+
+    if(dbg_immcall == true) {
+        int32_t line_delta = cur_line - dw_cur_sect->line;
+        int32_t offset_delta = sinfo_param->size - dw_cur_sect->offset;
+        uint32_t cur_file = dw_cur_file->file;
+        p_linep = dw_cur_sect->psaa;
+
+        if(cur_file != dw_cur_sect->file) {
+            saa_write8(p_linep, DW_LNS_set_file);
+            saa_write8(p_linep, cur_file);
+            dw_cur_sect->file = cur_file;
+        }
+
+        if(line_delta) {
+            int special_opcode = (line_delta - DW_LN_BASE) + (DW_LN_RANGE * offset_delta) +
+                                             DW_OPCODE_BASE;
+
+            if((line_delta >= DW_LN_BASE) && (line_delta < DW_MAX_LN) &&
+                (special_opcode < DW_MAX_SP_OPCODE)) {
+                saa_write8(p_linep, special_opcode);
+            } else {
+                saa_write8(p_linep, DW_LNS_advance_line);
+                saa_wleb128s(p_linep, line_delta);
+                if(offset_delta) {
+                    saa_write8(p_linep, DW_LNS_advance_pc);
+                    saa_wleb128u(p_linep, offset_delta);
+                }
+                saa_write8(p_linep, DW_LNS_copy);
+            }
+
+            dw_cur_sect->line = cur_line;
+            dw_cur_sect->offset = sinfo_param->size;
+        }
+
+        dbg_immcall = false;
+    }
+}
+
+static void macho_dbg_cleanup(void)
+{
+    /* dwarf sectors generation */
+    macho_dbg_generate();
+
+    {
+        struct dw_sect_list *p_sect = dw_head_sect;
+        struct file_list *p_file = dw_head_file;
+        uint32_t idx = 0;
+
+        for(; idx < dw_num_sects; idx++) {
+            struct dw_sect_list *next = p_sect->next;
+            nasm_free(p_sect);
+            p_sect = next;
+        }
+
+        for(idx = 0; idx < dw_num_files; idx++) {
+            struct file_list *next = p_file->next;
+            nasm_free(p_file);
+            p_file = next;
+        }
+    }
+}
+
+#ifdef OF_MACHO32
+static const struct macho_fmt macho32_fmt = {
+    4,
+    MH_MAGIC,
+    CPU_TYPE_I386,
+    LC_SEGMENT,
+    MACHO_HEADER_SIZE,
+    MACHO_SEGCMD_SIZE,
+    MACHO_SECTCMD_SIZE,
+    MACHO_NLIST_SIZE,
+    RL_MAX_32,
+    GENERIC_RELOC_VANILLA,
+    GENERIC_RELOC_VANILLA,
+    GENERIC_RELOC_TLV,
+    false			/* Allow segment-relative relocations */
+};
+
+static void macho32_init(void)
+{
+    fmt = macho32_fmt;
+    macho_init();
+
+    macho_gotpcrel_sect = NO_SEG;
+}
+
+static const struct dfmt macho32_df_dwarf = {
+    "Mach-O i386 dwarf for Darwin/MacOS",
+    "dwarf",
+    macho_dbg_init,
+    macho_dbg_linenum,
+    null_debug_deflabel,
+    NULL,                       /* .debug_smacros */
+    NULL,                       /* .debug_include */
+    NULL,                       /* .debug_mmacros */
+    null_debug_directive,
+    null_debug_typevalue,
+    macho_dbg_output,
+    macho_dbg_cleanup,
+    NULL /*pragma list*/
+};
+
+static const struct dfmt * const macho32_df_arr2 =
+ { &macho32_df_dwarf, NULL };
+
+const struct ofmt of_macho32 = {
+    "Mach-O i386 (Mach, including MacOS X and variants)",
+    "macho32",
+    ".o",
+    0,
+    32,
+    macho32_df_arr,
+    &macho32_df_dwarf,
+    macho_stdmac,
+    macho32_init,
+    null_reset,
+    nasm_do_legacy_output,
+    macho_output,
+    macho_symdef,
+    macho_section,
+    macho_herelabel,
+    macho_sectalign,
+    null_segbase,
+    null_directive,
+    macho_cleanup,
+    macho_pragma_list
+};
+#endif
+
+#ifdef OF_MACHO64
+static const struct macho_fmt macho64_fmt = {
+    8,
+    MH_MAGIC_64,
+    CPU_TYPE_X86_64,
+    LC_SEGMENT_64,
+    MACHO_HEADER64_SIZE,
+    MACHO_SEGCMD64_SIZE,
+    MACHO_SECTCMD64_SIZE,
+    MACHO_NLIST64_SIZE,
+    RL_MAX_64,
+    X86_64_RELOC_UNSIGNED,
+    X86_64_RELOC_SIGNED,
+    X86_64_RELOC_TLV,
+    true			/* Force symbol-relative relocations */
+};
+
+static void macho64_init(void)
+{
+    fmt = macho64_fmt;
+    macho_init();
+
+    /* add special symbol for ..gotpcrel */
+    macho_gotpcrel_sect = seg_alloc() + 1;
+    backend_label("..gotpcrel", macho_gotpcrel_sect, 0L);
+}
+
+static const struct dfmt macho64_df_dwarf = {
+    "Mach-O x86-64 dwarf for Darwin/MacOS",
+    "dwarf",
+    macho_dbg_init,
+    macho_dbg_linenum,
+    null_debug_deflabel,
+    NULL,                       /* .debug_smacros */
+    NULL,                       /* .debug_include */
+    NULL,                       /* .debug_mmacros */
+    null_debug_directive,
+    null_debug_typevalue,
+    macho_dbg_output,
+    macho_dbg_cleanup,
+    NULL /*pragma list*/
+};
+
+static const struct dfmt * const macho64_df_arr2 =
+ { &macho64_df_dwarf, NULL };
+
+const struct ofmt of_macho64 = {
+    "Mach-O x86-64 (Mach, including MacOS X and variants)",
+    "macho64",
+    ".o",
+    0,
+    64,
+    macho64_df_arr,
+    &macho64_df_dwarf,
+    macho_stdmac,
+    macho64_init,
+    null_reset,
+    nasm_do_legacy_output,
+    macho_output,
+    macho_symdef,
+    macho_section,
+    macho_herelabel,
+    macho_sectalign,
+    null_segbase,
+    null_directive,
+    macho_cleanup,
+    macho_pragma_list,
+};
+#endif
+
+#endif
+
+/*
+ * Local Variables:
+ * mode:c
+ * c-basic-offset:4
+ * End:
+ *
+ * end of file */

_service:tar_scm:nasm-2.16.03.tar.xz/output/outmacho.mac Added

@@ -0,0 +1,49 @@
+;; --------------------------------------------------------------------------
+;;   
+;;   Copyright 1996-2017 The NASM Authors - All Rights Reserved
+;;   See the file AUTHORS included with the NASM distribution for
+;;   the specific copyright holders.
+;;
+;;   Redistribution and use in source and binary forms, with or without
+;;   modification, are permitted provided that the following
+;;   conditions are met:
+;;
+;;   * Redistributions of source code must retain the above copyright
+;;     notice, this list of conditions and the following disclaimer.
+;;   * Redistributions in binary form must reproduce the above
+;;     copyright notice, this list of conditions and the following
+;;     disclaimer in the documentation and/or other materials provided
+;;     with the distribution.
+;;     
+;;     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+;;     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+;;     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+;;     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;;     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+;;     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;;     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+;;     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+;;     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+;;     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+;;     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+;;     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;;     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+;; --------------------------------------------------------------------------
+
+OUT: macho macho32 macho64
+%define __?SECT?__ section .text
+%macro __?NASM_CDecl?__ 1
+%endmacro
+
+; This directive sets the MH_SUBSECTIONS_VIA_SYMBOLS header flag
+%imacro subsections_via_symbols 0.nolist
+    %pragma __?OUTPUT_FORMAT?__ %?
+%endmacro
+
+%imacro no_dead_strip 1-*.nolist
+    %rep %0
+        %pragma __?OUTPUT_FORMAT?__ %? %1
+        %rotate 1
+    %endrep
+%endmacro

_service:tar_scm:nasm-2.16.03.tar.xz/output/outobj.c Added

@@ -0,0 +1,2701 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2017 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * outobj.c	output routines for the Netwide Assembler to produce
+ *		.OBJ object files
+ */
+
+#include "compiler.h"
+
+#include <ctype.h>              /* For toupper() */
+#include "nctype.h"
+
+#include "nasm.h"
+#include "nasmlib.h"
+#include "error.h"
+#include "stdscan.h"
+#include "eval.h"
+#include "ver.h"
+
+#include "outform.h"
+#include "outlib.h"
+
+#ifdef OF_OBJ
+
+/*
+ * outobj.c is divided into two sections.  The first section is low level
+ * routines for creating obj records;  It has nearly zero NASM specific
+ * code.  The second section is high level routines for processing calls and
+ * data structures from the rest of NASM into obj format.
+ *
+ * It should be easy (though not zero work) to lift the first section out for
+ * use as an obj file writer for some other assembler or compiler.
+ */
+
+/*
+ * These routines are built around the ObjRecord data structure.  An ObjRecord
+ * holds an object file record that may be under construction or complete.
+ *
+ * A major function of these routines is to support continuation of an obj
+ * record into the next record when the maximum record size is exceeded.  The
+ * high level code does not need to worry about where the record breaks occur.
+ * It does need to do some minor extra steps to make the automatic continuation
+ * work.  Those steps may be skipped for records where the high level knows no
+ * continuation could be required.
+ *
+ * 1) An ObjRecord is allocated and cleared by obj_new, or an existing ObjRecord
+ *    is cleared by obj_clear.
+ *
+ * 2) The caller should fill in .type.
+ *
+ * 3) If the record is continuable and there is processing that must be done at
+ *    the start of each record then the caller should fill in .ori with the
+ *    address of the record initializer routine.
+ *
+ * 4) If the record is continuable and it should be saved (rather than emitted
+ *    immediately) as each record is done, the caller should set .up to be a
+ *    pointer to a location in which the caller keeps the master pointer to the
+ *    ObjRecord.  When the record is continued, the obj_bump routine will then
+ *    allocate a new ObjRecord structure and update the master pointer.
+ *
+ * 5) If the .ori field was used then the caller should fill in the .parm with
+ *    any data required by the initializer.
+ *
+ * 6) The caller uses the routines: obj_byte, obj_word, obj_rword, obj_dword,
+ *    obj_x, obj_index, obj_value and obj_name to fill in the various kinds of
+ *    data required for this record.
+ *
+ * 7) If the record is continuable, the caller should call obj_commit at each
+ *    point where breaking the record is permitted.
+ *
+ * 8) To write out the record, the caller should call obj_emit2.  If the
+ *    caller has called obj_commit for all data written then he can get slightly
+ *    faster code by calling obj_emit instead of obj_emit2.
+ *
+ * Most of these routines return an ObjRecord pointer.  This will be the input
+ * pointer most of the time and will be the new location if the ObjRecord
+ * moved as a result of the call.  The caller may ignore the return value in
+ * three cases:  It is a "Never Reallocates" routine;  or  The caller knows
+ * continuation is not possible;  or  The caller uses the master pointer for the
+ * next operation.
+ */
+
+#define RECORD_MAX (1024-3)     /* maximal size of any record except type+reclen */
+#define OBJ_PARMS  3            /* maximum .parm used by any .ori routine */
+
+#define FIX_08_LOW      0x8000  /* location type for various fixup subrecords */
+#define FIX_16_OFFSET   0x8400
+#define FIX_16_SELECTOR 0x8800
+#define FIX_32_POINTER  0x8C00
+#define FIX_08_HIGH     0x9000
+#define FIX_32_OFFSET   0xA400
+#define FIX_48_POINTER  0xAC00
+
+enum RecordID {                 /* record ID codes */
+
+    THEADR = 0x80,              /* module header */
+    COMENT = 0x88,              /* comment record */
+
+    LINNUM = 0x94,              /* line number record */
+    LNAMES = 0x96,              /* list of names */
+
+    SEGDEF = 0x98,              /* segment definition */
+    GRPDEF = 0x9A,              /* group definition */
+    EXTDEF = 0x8C,              /* external definition */
+    PUBDEF = 0x90,              /* public definition */
+    COMDEF = 0xB0,              /* common definition */
+
+    LEDATA = 0xA0,              /* logical enumerated data */
+    FIXUPP = 0x9C,              /* fixups (relocations) */
+    FIXU32 = 0x9D,              /* 32-bit fixups (relocations) */
+
+    MODEND = 0x8A,              /* module end */
+    MODE32 = 0x8B               /* module end for 32-bit objects */
+};
+
+enum ComentID {                 /* ID codes for comment records */
+    dTRANSL   = 0x0000,         /* translator comment */
+    dOMFEXT   = 0xC0A0,         /* "OMF extension" */
+    dEXTENDED = 0xC0A1,         /* translator-specific extensions */
+    dLINKPASS = 0x40A2,         /* link pass 2 marker */
+    dTYPEDEF  = 0xC0E3,         /* define a type */
+    dSYM      = 0xC0E6,         /* symbol debug record */
+    dFILNAME  = 0xC0E8,         /* file name record */
+    dDEPFILE  = 0xC0E9,         /* dependency file */
+    dCOMPDEF  = 0xC0EA          /* compiler type info */
+};
+
+typedef struct ObjRecord ObjRecord;
+typedef void ORI(ObjRecord * orp);
+
+struct ObjRecord {
+    ORI *ori;                   /* Initialization routine           */
+    int used;                   /* Current data size                */
+    int committed;              /* Data size at last boundary       */
+    int x_size;                 /* (see obj_x)                      */
+    unsigned int type;          /* Record type                      */
+    ObjRecord *child;           /* Associated record below this one */
+    ObjRecord **up;             /* Master pointer to this ObjRecord */
+    ObjRecord *back;            /* Previous part of this record     */
+    uint32_t parmOBJ_PARMS;      /* Parameters for ori routine       */
+    uint8_t bufRECORD_MAX + 3;
+};
+
+static void obj_fwrite(ObjRecord * orp);
+static void ori_ledata(ObjRecord * orp);
+static void ori_pubdef(ObjRecord * orp);
+static void ori_null(ObjRecord * orp);
+static ObjRecord *obj_commit(ObjRecord * orp);
+
+static bool obj_uppercase;       /* Flag: all names in uppercase */
+static bool obj_use32;           /* Flag: at least one segment is 32-bit */
+static bool obj_nodepend;        /* Flag: don't emit file dependencies */
+
+/*
+ * Clear an ObjRecord structure.  (Never reallocates).
+ * To simplify reuse of ObjRecord's, .type, .ori and .parm are not cleared.
+ */
+static ObjRecord *obj_clear(ObjRecord * orp)
+{
+    orp->used = 0;
+    orp->committed = 0;
+    orp->x_size = 0;
+    orp->child = NULL;
+    orp->up = NULL;
+    orp->back = NULL;
+    return (orp);
+}
+
+/*
+ * Emit an ObjRecord structure.  (Never reallocates).
+ * The record is written out proceeded (recursively) by its previous part (if
+ * any) and followed (recursively) by its child (if any).
+ * The previous part and the child are freed.  The main ObjRecord is cleared,
+ * not freed.
+ */
+static ObjRecord *obj_emit(ObjRecord * orp)
+{
+    if (orp->back) {
+        obj_emit(orp->back);
+        nasm_free(orp->back);
+    }
+
+    if (orp->committed)
+        obj_fwrite(orp);
+
+    if (orp->child) {
+        obj_emit(orp->child);
+        nasm_free(orp->child);
+    }
+
+    return (obj_clear(orp));
+}
+
+/*
+ * Commit and Emit a record.  (Never reallocates).
+ */
+static ObjRecord *obj_emit2(ObjRecord * orp)
+{
+    obj_commit(orp);
+    return (obj_emit(orp));
+}
+
+/*
+ * Allocate and clear a new ObjRecord;  Also sets .ori to ori_null
+ */
+static ObjRecord *obj_new(void)
+{
+    ObjRecord *orp;
+
+    orp = obj_clear(nasm_malloc(sizeof(ObjRecord)));
+    orp->ori = ori_null;
+    return (orp);
+}
+
+/*
+ * Advance to the next record because the existing one is full or its x_size
+ * is incompatible.
+ * Any uncommitted data is moved into the next record.
+ */
+static ObjRecord *obj_bump(ObjRecord * orp)
+{
+    ObjRecord *nxt;
+    int used = orp->used;
+    int committed = orp->committed;
+
+    if (orp->up) {
+        *orp->up = nxt = obj_new();
+        nxt->ori = orp->ori;
+        nxt->type = orp->type;
+        nxt->up = orp->up;
+        nxt->back = orp;
+        memcpy(nxt->parm, orp->parm, sizeof(orp->parm));
+    } else
+        nxt = obj_emit(orp);
+
+    used -= committed;
+    if (used) {
+        nxt->committed = 1;
+        nxt->ori(nxt);
+        nxt->committed = nxt->used;
+        memcpy(nxt->buf + nxt->committed, orp->buf + committed, used);
+        nxt->used = nxt->committed + used;
+    }
+
+    return (nxt);
+}
+
+/*
+ * Advance to the next record if necessary to allow the next field to fit.
+ */
+static ObjRecord *obj_check(ObjRecord * orp, int size)
+{
+    if (orp->used + size > RECORD_MAX)
+        orp = obj_bump(orp);
+
+    if (!orp->committed) {
+        orp->committed = 1;
+        orp->ori(orp);
+        orp->committed = orp->used;
+    }
+
+    return (orp);
+}
+
+/*
+ * All data written so far is committed to the current record (won't be moved to
+ * the next record in case of continuation).
+ */
+static ObjRecord *obj_commit(ObjRecord * orp)
+{
+    orp->committed = orp->used;
+    return (orp);
+}
+
+/*
+ * Write a byte
+ */
+static ObjRecord *obj_byte(ObjRecord * orp, uint8_t val)
+{
+    orp = obj_check(orp, 1);
+    orp->buforp->used = val;
+    orp->used++;
+    return (orp);
+}
+
+/*
+ * Write a word
+ */
+static ObjRecord *obj_word(ObjRecord * orp, unsigned int val)
+{
+    orp = obj_check(orp, 2);
+    orp->buforp->used = val;
+    orp->buforp->used + 1 = val >> 8;
+    orp->used += 2;
+    return (orp);
+}
+
+/*
+ * Write a reversed word
+ */
+static ObjRecord *obj_rword(ObjRecord * orp, unsigned int val)
+{
+    orp = obj_check(orp, 2);
+    orp->buforp->used = val >> 8;
+    orp->buforp->used + 1 = val;
+    orp->used += 2;
+    return (orp);
+}
+
+/*
+ * Write a dword
+ */
+static ObjRecord *obj_dword(ObjRecord * orp, uint32_t val)
+{
+    orp = obj_check(orp, 4);
+    orp->buforp->used = val;
+    orp->buforp->used + 1 = val >> 8;
+    orp->buforp->used + 2 = val >> 16;
+    orp->buforp->used + 3 = val >> 24;
+    orp->used += 4;
+    return (orp);
+}
+
+/*
+ * All fields of "size x" in one obj record must be the same size (either 16
+ * bits or 32 bits).  There is a one bit flag in each record which specifies
+ * which.
+ * This routine is used to force the current record to have the desired
+ * x_size.  x_size is normally automatic (using obj_x), so that this
+ * routine should be used outside obj_x, only to provide compatibility with
+ * linkers that have bugs in their processing of the size bit.
+ */
+
+static ObjRecord *obj_force(ObjRecord * orp, int x)
+{
+    if (orp->x_size == (x ^ 48))
+        orp = obj_bump(orp);
+    orp->x_size = x;
+    return (orp);
+}
+
+/*
+ * This routine writes a field of size x.  The caller does not need to worry at
+ * all about whether 16-bits or 32-bits are required.
+ */
+static ObjRecord *obj_x(ObjRecord * orp, uint32_t val)
+{
+    if (orp->type & 1)
+        orp->x_size = 32;
+    if (val > 0xFFFF)
+        orp = obj_force(orp, 32);
+    if (orp->x_size == 32) {
+	ObjRecord *nxt = obj_dword(orp, val);
+	nxt->x_size = 32;	/* x_size is cleared when a record overflows */
+	return nxt;
+    }
+    orp->x_size = 16;
+    return (obj_word(orp, val));
+}
+
+/*
+ * Writes an index
+ */
+static ObjRecord *obj_index(ObjRecord * orp, unsigned int val)
+{
+    if (val < 128)
+        return (obj_byte(orp, val));
+    return (obj_word(orp, (val >> 8) | (val << 8) | 0x80));
+}
+
+/*
+ * Writes a variable length value
+ */
+static ObjRecord *obj_value(ObjRecord * orp, uint32_t val)
+{
+    if (val <= 128)
+        return (obj_byte(orp, val));
+    if (val <= 0xFFFF) {
+        orp = obj_byte(orp, 129);
+        return (obj_word(orp, val));
+    }
+    if (val <= 0xFFFFFF)
+        return (obj_dword(orp, (val << 8) + 132));
+    orp = obj_byte(orp, 136);
+    return (obj_dword(orp, val));
+}
+
+/*
+ * Writes a counted string
+ */
+static ObjRecord *obj_name(ObjRecord * orp, const char *name)
+{
+    int len = strlen(name);
+    uint8_t *ptr;
+
+    if (len > UINT8_MAX) {
+        nasm_warn(WARN_OTHER, "truncating object name `%.64s...' to %u bytes",
+                  name, UINT8_MAX);
+        len = UINT8_MAX;
+    }
+
+    orp = obj_check(orp, len + 1);
+    ptr = orp->buf + orp->used;
+    *ptr++ = len;
+    orp->used += len + 1;
+    if (obj_uppercase)
+        while (--len >= 0) {
+            *ptr++ = toupper(*name);
+            name++;
+    } else
+        memcpy(ptr, name, len);
+    return (orp);
+}
+
+/*
+ * Initializer for an LEDATA record.
+ * parm0 = offset
+ * parm1 = segment index
+ * During the use of a LEDATA ObjRecord, parm0 is constantly updated to
+ * represent the offset that would be required if the record were split at the
+ * last commit point.
+ * parm2 is a copy of parm0 as it was when the current record was initted.
+ */
+static void ori_ledata(ObjRecord * orp)
+{
+    obj_index(orp, orp->parm1);
+    orp->parm2 = orp->parm0;
+    obj_x(orp, orp->parm0);
+}
+
+/*
+ * Initializer for a PUBDEF record.
+ * parm0 = group index
+ * parm1 = segment index
+ * parm2 = frame (only used when both indexes are zero)
+ */
+static void ori_pubdef(ObjRecord * orp)
+{
+    obj_index(orp, orp->parm0);
+    obj_index(orp, orp->parm1);
+    if (!(orp->parm0 | orp->parm1))
+        obj_word(orp, orp->parm2);
+}
+
+/*
+ * Initializer for a LINNUM record.
+ * parm0 = group index
+ * parm1 = segment index
+ */
+static void ori_linnum(ObjRecord * orp)
+{
+    obj_index(orp, orp->parm0);
+    obj_index(orp, orp->parm1);
+}
+
+/*
+ * Initializer for a local vars record.
+ */
+static void ori_local(ObjRecord * orp)
+{
+    obj_rword(orp, dSYM);
+}
+
+/*
+ * Null initializer for records that continue without any header info
+ */
+static void ori_null(ObjRecord * orp)
+{
+    (void)orp;                  /* Do nothing */
+}
+
+/*
+ * This concludes the low level section of outobj.c
+ */
+
+static char obj_infileFILENAME_MAX;
+
+static int32_t first_seg;
+static bool any_segs;
+static int passtwo;
+static int arrindex;
+
+#define GROUP_MAX 256           /* we won't _realistically_ have more
+                                 * than this many segs in a group */
+#define EXT_BLKSIZ 256          /* block size for externals list */
+
+struct Segment;                 /* need to know these structs exist */
+struct Group;
+
+struct LineNumber {
+    struct LineNumber *next;
+    struct Segment *segment;
+    int32_t offset;
+    int32_t lineno;
+};
+
+static struct FileName {
+    struct FileName *next;
+    char *name;
+    struct LineNumber *lnhead, **lntail;
+    int index;
+} *fnhead, **fntail;
+
+static struct Array {
+    struct Array *next;
+    unsigned size;
+    int basetype;
+} *arrhead, **arrtail;
+
+#define ARRAYBOT 31             /* magic number  for first array index */
+
+static struct Public {
+    struct Public *next;
+    char *name;
+    int32_t offset;
+    int32_t segment;               /* only if it's far-absolute */
+    int type;                   /* only for local debug syms */
+} *fpubhead, **fpubtail, *last_defined;
+
+static struct External {
+    struct External *next;
+    char *name;
+    int32_t commonsize;
+    int32_t commonelem;            /* element size if FAR, else zero */
+    int index;                  /* OBJ-file external index */
+    enum {
+        DEFWRT_NONE,            /* no unusual default-WRT */
+        DEFWRT_STRING,          /* a string we don't yet understand */
+        DEFWRT_SEGMENT,         /* a segment */
+        DEFWRT_GROUP            /* a group */
+    } defwrt_type;
+    union {
+        char *string;
+        struct Segment *seg;
+        struct Group *grp;
+    } defwrt_ptr;
+    struct External *next_dws;  /* next with DEFWRT_STRING */
+} *exthead, **exttail, *dws;
+
+static int externals;
+
+static struct ExtBack {
+    struct ExtBack *next;
+    struct External *extsEXT_BLKSIZ;
+} *ebhead, **ebtail;
+
+static struct Segment {
+    struct Segment *next;
+    char *name;
+    int32_t index;                 /* the NASM segment id */
+    int32_t obj_index;             /* the OBJ-file segment index */
+    struct Group *grp;          /* the group it beint32_ts to */
+    uint32_t currentpos;
+    int32_t align;                 /* can be SEG_ABS + absolute addr */
+    int64_t pass_last_seen;
+    struct Public *pubhead, **pubtail, *lochead, **loctail;
+    char *segclass, *overlay;   /* `class' is a C++ keyword :-) */
+    ObjRecord *orp;
+    enum {
+        CMB_PRIVATE = 0,
+        CMB_PUBLIC = 2,
+        CMB_STACK = 5,
+        CMB_COMMON = 6
+    } combine;
+    bool use32;                 /* is this segment 32-bit? */
+} *seghead, **segtail, *obj_seg_needs_update;
+
+static struct Group {
+    struct Group *next;
+    char *name;
+    int32_t index;                 /* NASM segment id */
+    int32_t obj_index;             /* OBJ-file group index */
+    int32_t nentries;              /* number of elements... */
+    int32_t nindices;              /* ...and number of index elts... */
+    union {
+        int32_t index;
+        char *name;
+    } segsGROUP_MAX;          /* ...in this */
+} *grphead, **grptail, *obj_grp_needs_update;
+
+static struct ImpDef {
+    struct ImpDef *next;
+    char *extname;
+    char *libname;
+    unsigned int impindex;
+    char *impname;
+} *imphead, **imptail;
+
+static struct ExpDef {
+    struct ExpDef *next;
+    char *intname;
+    char *extname;
+    unsigned int ordinal;
+    int flags;
+} *exphead, **exptail;
+
+#define EXPDEF_FLAG_ORDINAL  0x80
+#define EXPDEF_FLAG_RESIDENT 0x40
+#define EXPDEF_FLAG_NODATA   0x20
+#define EXPDEF_MASK_PARMCNT  0x1F
+
+static int32_t obj_entry_seg, obj_entry_ofs;
+
+const struct ofmt of_obj;
+static const struct dfmt borland_debug_form;
+
+/* The current segment */
+static struct Segment *current_seg;
+
+static int32_t obj_segment(char *, int *);
+static void obj_write_file(void);
+static enum directive_result obj_directive(enum directive, char *);
+
+static void obj_init(void)
+{
+    strlcpy(obj_infile, inname, sizeof(obj_infile));
+    first_seg = seg_alloc();
+    any_segs = false;
+    fpubhead = NULL;
+    fpubtail = &fpubhead;
+    exthead = NULL;
+    exttail = &exthead;
+    imphead = NULL;
+    imptail = &imphead;
+    exphead = NULL;
+    exptail = &exphead;
+    dws = NULL;
+    externals = 0;
+    ebhead = NULL;
+    ebtail = &ebhead;
+    seghead = obj_seg_needs_update = NULL;
+    segtail = &seghead;
+    grphead = obj_grp_needs_update = NULL;
+    grptail = &grphead;
+    obj_entry_seg = NO_SEG;
+    obj_uppercase = false;
+    obj_use32 = false;
+    passtwo = 0;
+    current_seg = NULL;
+}
+
+static void obj_cleanup(void)
+{
+    obj_write_file();
+    dfmt->cleanup();
+    while (seghead) {
+        struct Segment *segtmp = seghead;
+        seghead = seghead->next;
+        while (segtmp->pubhead) {
+            struct Public *pubtmp = segtmp->pubhead;
+            segtmp->pubhead = pubtmp->next;
+            nasm_free(pubtmp->name);
+            nasm_free(pubtmp);
+        }
+        nasm_free(segtmp->segclass);
+        nasm_free(segtmp->overlay);
+        nasm_free(segtmp);
+    }
+    while (fpubhead) {
+        struct Public *pubtmp = fpubhead;
+        fpubhead = fpubhead->next;
+        nasm_free(pubtmp->name);
+        nasm_free(pubtmp);
+    }
+    while (exthead) {
+        struct External *exttmp = exthead;
+        exthead = exthead->next;
+        nasm_free(exttmp);
+    }
+    while (imphead) {
+        struct ImpDef *imptmp = imphead;
+        imphead = imphead->next;
+        nasm_free(imptmp->extname);
+        nasm_free(imptmp->libname);
+        nasm_free(imptmp->impname);     /* nasm_free won't mind if it's NULL */
+        nasm_free(imptmp);
+    }
+    while (exphead) {
+        struct ExpDef *exptmp = exphead;
+        exphead = exphead->next;
+        nasm_free(exptmp->extname);
+        nasm_free(exptmp->intname);
+        nasm_free(exptmp);
+    }
+    while (ebhead) {
+        struct ExtBack *ebtmp = ebhead;
+        ebhead = ebhead->next;
+        nasm_free(ebtmp);
+    }
+    while (grphead) {
+        struct Group *grptmp = grphead;
+        grphead = grphead->next;
+        nasm_free(grptmp);
+    }
+}
+
+static void obj_ext_set_defwrt(struct External *ext, char *id)
+{
+    struct Segment *seg;
+    struct Group *grp;
+
+    for (seg = seghead; seg; seg = seg->next)
+        if (!strcmp(seg->name, id)) {
+            ext->defwrt_type = DEFWRT_SEGMENT;
+            ext->defwrt_ptr.seg = seg;
+            nasm_free(id);
+            return;
+        }
+
+    for (grp = grphead; grp; grp = grp->next)
+        if (!strcmp(grp->name, id)) {
+            ext->defwrt_type = DEFWRT_GROUP;
+            ext->defwrt_ptr.grp = grp;
+            nasm_free(id);
+            return;
+        }
+
+    ext->defwrt_type = DEFWRT_STRING;
+    ext->defwrt_ptr.string = id;
+    ext->next_dws = dws;
+    dws = ext;
+}
+
+static void obj_deflabel(char *name, int32_t segment,
+                         int64_t offset, int is_global, char *special)
+{
+    /*
+     * We have three cases:
+     *
+     * (i) `segment' is a segment-base. If so, set the name field
+     * for the segment or group structure it refers to, and then
+     * return.
+     *
+     * (ii) `segment' is one of our segments, or a SEG_ABS segment.
+     * Save the label position for later output of a PUBDEF record.
+     * (Or a MODPUB, if we work out how.)
+     *
+     * (iii) `segment' is not one of our segments. Save the label
+     * position for later output of an EXTDEF, and also store a
+     * back-reference so that we can map later references to this
+     * segment number to the external index.
+     */
+    struct External *ext;
+    struct ExtBack *eb;
+    struct Segment *seg;
+    int i;
+    bool used_special = false;   /* have we used the special text? */
+
+    if (debug_level(2))
+        nasm_debug(" obj_deflabel: %s, seg=%"PRIx32", off=%"PRIx64", is_global=%d, %s\n",
+                   name, segment, offset, is_global, special);
+
+    /*
+     * If it's a special-retry from pass two, discard it.
+     */
+    if (is_global == 3)
+        return;
+
+    /*
+     * First check for the double-period, signifying something
+     * unusual.
+     */
+    if (name0 == '.' && name1 == '.' && name2 != '@') {
+        if (!strcmp(name, "..start")) {
+            obj_entry_seg = segment;
+            obj_entry_ofs = offset;
+            return;
+        }
+        nasm_nonfatal("unrecognised special symbol `%s'", name);
+    }
+
+    /*
+     * Case (i):
+     */
+    if (obj_seg_needs_update) {
+        obj_seg_needs_update->name = name;
+        return;
+    } else if (obj_grp_needs_update) {
+        obj_grp_needs_update->name = name;
+        return;
+    }
+    if (segment < SEG_ABS && segment != NO_SEG && segment % 2)
+        return;
+
+    if (segment >= SEG_ABS || segment == NO_SEG) {
+        /*
+         * SEG_ABS subcase of (ii).
+         */
+        if (is_global) {
+            struct Public *pub;
+
+            pub = *fpubtail = nasm_malloc(sizeof(*pub));
+            fpubtail = &pub->next;
+            pub->next = NULL;
+            pub->name = nasm_strdup(name);
+            pub->offset = offset;
+            pub->segment = (segment == NO_SEG ? 0 : segment & ~SEG_ABS);
+        }
+        if (special)
+            nasm_nonfatal("OBJ supports no special symbol features"
+                          " for this symbol type");
+        return;
+    }
+
+    /*
+     * If `any_segs' is still false, we might need to define a
+     * default segment, if they're trying to declare a label in
+     * `first_seg'.
+     */
+    if (!any_segs && segment == first_seg) {
+        int tempint = 0;
+        if (segment != obj_segment("__NASMDEFSEG", &tempint))
+            nasm_panic("strange segment conditions in OBJ driver");
+    }
+
+    for (seg = seghead; seg && is_global; seg = seg->next)
+        if (seg->index == segment) {
+            struct Public *loc = nasm_malloc(sizeof(*loc));
+            /*
+             * Case (ii). Maybe MODPUB someday?
+             */
+            *seg->pubtail = loc;
+            seg->pubtail = &loc->next;
+            loc->next = NULL;
+            loc->name = nasm_strdup(name);
+            loc->offset = offset;
+
+            if (special)
+                nasm_nonfatal("OBJ supports no special symbol features"
+                              " for this symbol type");
+            return;
+        }
+
+    /*
+     * Case (iii).
+     */
+    if (is_global) {
+        ext = *exttail = nasm_malloc(sizeof(*ext));
+        ext->next = NULL;
+        exttail = &ext->next;
+        ext->name = name;
+        /* Place by default all externs into the current segment */
+        ext->defwrt_type = DEFWRT_NONE;
+
+/* 28-Apr-2002 - John Coffman
+  The following code was introduced on 12-Aug-2000, and breaks fixups
+  on code passed thru the MSC 5.1 linker (3.66) and MSC 6.00A linker
+  (5.10).  It was introduced after FIXUP32 was added, and may be needed
+  for 32-bit segments.  The following will get 16-bit segments working
+  again, and maybe someone can correct the 'if' condition which is
+  actually needed.
+*/
+#if 0
+        if (current_seg) {
+#else
+        if (current_seg && current_seg->use32) {
+            if (current_seg->grp) {
+                ext->defwrt_type = DEFWRT_GROUP;
+                ext->defwrt_ptr.grp = current_seg->grp;
+            } else {
+                ext->defwrt_type = DEFWRT_SEGMENT;
+                ext->defwrt_ptr.seg = current_seg;
+            }
+        }
+#endif
+
+        if (is_global == 2) {
+            ext->commonsize = offset;
+            ext->commonelem = 1;        /* default FAR */
+        } else
+            ext->commonsize = 0;
+    } else
+        return;
+
+    /*
+     * Now process the special text, if any, to find default-WRT
+     * specifications and common-variable element-size and near/far
+     * specifications.
+     */
+    while (special && *special) {
+        used_special = true;
+
+        /*
+         * We might have a default-WRT specification.
+         */
+        if (!nasm_strnicmp(special, "wrt", 3)) {
+            char *p;
+            int len;
+            special += 3;
+            special += strspn(special, " \t");
+            p = nasm_strndup(special, len = strcspn(special, ":"));
+            obj_ext_set_defwrt(ext, p);
+            special += len;
+            if (*special && *special != ':')
+                nasm_nonfatal("`:' expected in special symbol"
+                              " text for `%s'", ext->name);
+            else if (*special == ':')
+                special++;
+        }
+
+        /*
+         * The NEAR or FAR keywords specify nearness or
+         * farness. FAR gives default element size 1.
+         */
+        if (!nasm_strnicmp(special, "far", 3)) {
+            if (ext->commonsize)
+                ext->commonelem = 1;
+            else
+                nasm_nonfatal("`%s': `far' keyword may only be applied"
+                              " to common variables\n", ext->name);
+            special += 3;
+            special += strspn(special, " \t");
+        } else if (!nasm_strnicmp(special, "near", 4)) {
+            if (ext->commonsize)
+                ext->commonelem = 0;
+            else
+                nasm_nonfatal("`%s': `far' keyword may only be applied"
+                              " to common variables\n", ext->name);
+            special += 4;
+            special += strspn(special, " \t");
+        }
+
+        /*
+         * If it's a common, and anything else remains on the line
+         * before a further colon, evaluate it as an expression and
+         * use that as the element size. Forward references aren't
+         * allowed.
+         */
+        if (*special == ':')
+            special++;
+        else if (*special) {
+            if (ext->commonsize) {
+                expr *e;
+                struct tokenval tokval;
+
+                stdscan_reset();
+                stdscan_set(special);
+                tokval.t_type = TOKEN_INVALID;
+                e = evaluate(stdscan, NULL, &tokval, NULL, 1, NULL);
+                if (e) {
+                    if (!is_simple(e))
+                        nasm_nonfatal("cannot use relocatable"
+                                      " expression as common-variable element size");
+                    else
+                        ext->commonelem = reloc_value(e);
+                }
+                special = stdscan_get();
+            } else {
+                nasm_nonfatal("`%s': element-size specifications only"
+                              " apply to common variables", ext->name);
+                while (*special && *special != ':')
+                    special++;
+                if (*special == ':')
+                    special++;
+            }
+        }
+    }
+
+    i = segment / 2;
+    eb = ebhead;
+    if (!eb) {
+        eb = *ebtail = nasm_zalloc(sizeof(*eb));
+        eb->next = NULL;
+        ebtail = &eb->next;
+    }
+    while (i >= EXT_BLKSIZ) {
+        if (eb && eb->next)
+            eb = eb->next;
+        else {
+            eb = *ebtail = nasm_zalloc(sizeof(*eb));
+            eb->next = NULL;
+            ebtail = &eb->next;
+        }
+        i -= EXT_BLKSIZ;
+    }
+    eb->extsi = ext;
+    ext->index = ++externals;
+
+    if (special && !used_special)
+        nasm_nonfatal("OBJ supports no special symbol features"
+                      " for this symbol type");
+}
+
+/* forward declaration */
+static void obj_write_fixup(ObjRecord * orp, int bytes,
+                            int segrel, int32_t seg, int32_t wrt,
+                            struct Segment *segto);
+
+static void obj_out(int32_t segto, const void *data,
+		    enum out_type type, uint64_t size,
+                    int32_t segment, int32_t wrt)
+{
+    const uint8_t *ucdata;
+    int32_t ldata;
+    struct Segment *seg;
+    ObjRecord *orp;
+
+    /*
+     * If `any_segs' is still false, we must define a default
+     * segment.
+     */
+    if (!any_segs) {
+        int tempint = 0;
+        if (segto != obj_segment("__NASMDEFSEG", &tempint))
+            nasm_panic("strange segment conditions in OBJ driver");
+    }
+
+    /*
+     * Find the segment we are targeting.
+     */
+    for (seg = seghead; seg; seg = seg->next)
+        if (seg->index == segto)
+            break;
+    if (!seg)
+        nasm_panic("code directed to nonexistent segment?");
+
+    orp = seg->orp;
+    orp->parm0 = seg->currentpos;
+
+    switch (type) {
+    case OUT_RAWDATA:
+        ucdata = data;
+        while (size > 0) {
+            unsigned int len;
+            orp = obj_check(seg->orp, 1);
+            len = RECORD_MAX - orp->used;
+            if (len > size)
+                len = size;
+            memcpy(orp->buf + orp->used, ucdata, len);
+            orp->committed = orp->used += len;
+            orp->parm0 = seg->currentpos += len;
+            ucdata += len;
+            size -= len;
+        }
+	break;
+
+    case OUT_ADDRESS:
+    case OUT_REL1ADR:
+    case OUT_REL2ADR:
+    case OUT_REL4ADR:
+    case OUT_REL8ADR:
+    {
+        int rsize;
+
+        if (type == OUT_ADDRESS)
+            size = abs((int)size);
+
+        if (segment == NO_SEG && type != OUT_ADDRESS)
+            nasm_nonfatal("relative call to absolute address not"
+                          " supported by OBJ format");
+        if (segment >= SEG_ABS)
+            nasm_nonfatal("far-absolute relocations not supported"
+                          " by OBJ format");
+
+        ldata = *(int64_t *)data;
+        if (type != OUT_ADDRESS) {
+	    /*
+	     * For 16-bit and 32-bit x86 code, the size and realsize() always
+	     * matches as only jumps, calls and loops uses PC relative
+	     * addressing and the address isn't followed by any other opcode
+	     * bytes.  In 64-bit mode there is RIP relative addressing which
+	     * means the fixup location can be followed by an immediate value,
+	     * meaning that size > realsize().
+	     *
+	     * When the CPU is calculating the effective address, it takes the
+	     * RIP at the end of the instruction and adds the fixed up relative
+	     * address value to it.
+	     *
+	     * The linker's point of reference is the end of the fixup location
+	     * (which is the end of the instruction for Jcc, CALL, LOOPcc).
+	     * It is calculating distance between the target symbol and the end
+	     * of the fixup location, and add this to the displacement value we
+	     * are calculating here and storing at the fixup location.
+	     *
+	     * To get the right effect, we need to _reduce_ the displacement
+	     * value by the number of bytes following the fixup.
+	     *
+	     * Example:
+	     *  data at address 0x100; REL4ADR at 0x050, 4 byte immediate,
+	     *  end of fixup at 0x054, end of instruction at 0x058.
+	     *  => size = 8.
+	     *  => realsize() -> 4
+	     *  => CPU needs a value of:   0x100 - 0x058 = 0x0a8
+	     *  => linker/loader will add: 0x100 - 0x054 = 0x0ac
+	     *  => We must add an addend of -4.
+	     *  => realsize() - size = -4.
+	     *
+	     * The code used to do size - realsize() at least since v0.90,
+	     * probably because it wasn't needed...
+	     */
+	    ldata -= size;
+	    size = realsize(type, size);
+	    ldata += size;
+        }
+
+	switch (size) {
+	default:
+            nasm_nonfatal("OBJ format can only handle 16- or "
+                          "32-byte relocations");
+	    segment = NO_SEG;	/* Don't actually generate a relocation */
+	    break;
+	case 2:
+            orp = obj_word(orp, ldata);
+	    break;
+	case 4:
+            orp = obj_dword(orp, ldata);
+	    break;
+	}
+
+        rsize = size;
+        if (segment < SEG_ABS && (segment != NO_SEG && segment % 2) &&
+            size == 4) {
+            /*
+             * This is a 4-byte segment-base relocation such as
+             * `MOV EAX,SEG foo'. OBJ format can't actually handle
+             * these, but if the constant term has the 16 low bits
+             * zero, we can just apply a 2-byte segment-base
+             * relocation to the low word instead.
+             */
+            rsize = 2;
+            if (ldata & 0xFFFF)
+                nasm_nonfatal("OBJ format cannot handle complex"
+                              " dword-size segment base references");
+        }
+        if (segment != NO_SEG)
+            obj_write_fixup(orp, rsize,
+                            (type == OUT_ADDRESS ? 0x4000 : 0),
+                            segment, wrt, seg);
+        seg->currentpos += size;
+	break;
+    }
+
+    default:
+        nasm_nonfatal("Relocation type not supported by output format");
+	/* fall through */
+
+    case OUT_RESERVE:
+        if (orp->committed)
+            orp = obj_bump(orp);
+        seg->currentpos += size;
+	break;
+    }
+    obj_commit(orp);
+}
+
+static void obj_write_fixup(ObjRecord * orp, int bytes,
+                            int segrel, int32_t seg, int32_t wrt,
+                            struct Segment *segto)
+{
+    unsigned locat;
+    int method;
+    int base;
+    int32_t tidx, fidx;
+    struct Segment *s = NULL;
+    struct Group *g = NULL;
+    struct External *e = NULL;
+    ObjRecord *forp;
+
+    if (bytes != 2 && bytes != 4) {
+        nasm_nonfatal("`obj' output driver does not support"
+                      " %d-bit relocations", bytes << 3);
+        return;
+    }
+
+    forp = orp->child;
+    if (forp == NULL) {
+        orp->child = forp = obj_new();
+        forp->up = &(orp->child);
+        /* We should choose between FIXUPP and FIXU32 record type */
+        /* If we're targeting a 32-bit segment, use a FIXU32 record */
+        if (segto->use32)
+            forp->type = FIXU32;
+        else
+            forp->type = FIXUPP;
+    }
+
+    if (seg % 2) {
+        base = true;
+        locat = FIX_16_SELECTOR;
+        seg--;
+        if (bytes != 2)
+            nasm_panic("OBJ: 4-byte segment base fixup got"
+                  " through sanity check");
+    } else {
+        base = false;
+        locat = (bytes == 2) ? FIX_16_OFFSET : FIX_32_OFFSET;
+        if (!segrel)
+            /*
+             * There is a bug in tlink that makes it process self relative
+             * fixups incorrectly if the x_size doesn't match the location
+             * size.
+             */
+            forp = obj_force(forp, bytes << 3);
+    }
+
+    forp = obj_rword(forp, locat | segrel | (orp->parm0 - orp->parm2));
+
+    tidx = fidx = -1, method = 0;       /* placate optimisers */
+
+    /*
+     * See if we can find the segment ID in our segment list. If
+     * so, we have a T4 (LSEG) target.
+     */
+    for (s = seghead; s; s = s->next)
+        if (s->index == seg)
+            break;
+    if (s)
+        method = 4, tidx = s->obj_index;
+    else {
+        for (g = grphead; g; g = g->next)
+            if (g->index == seg)
+                break;
+        if (g)
+            method = 5, tidx = g->obj_index;
+        else {
+            int32_t i = seg / 2;
+            struct ExtBack *eb = ebhead;
+            while (i >= EXT_BLKSIZ) {
+                if (eb)
+                    eb = eb->next;
+                else
+                    break;
+                i -= EXT_BLKSIZ;
+            }
+            if (eb)
+                method = 6, e = eb->extsi, tidx = e->index;
+            else
+                nasm_panic("unrecognised segment value in obj_write_fixup");
+        }
+    }
+
+    /*
+     * If no WRT given, assume the natural default, which is method
+     * F5 unless:
+     *
+     * - we are doing an OFFSET fixup for a grouped segment, in
+     *   which case we require F1 (group).
+     *
+     * - we are doing an OFFSET fixup for an external with a
+     *   default WRT, in which case we must honour the default WRT.
+     */
+    if (wrt == NO_SEG) {
+        if (!base && s && s->grp)
+            method |= 0x10, fidx = s->grp->obj_index;
+        else if (!base && e && e->defwrt_type != DEFWRT_NONE) {
+            if (e->defwrt_type == DEFWRT_SEGMENT)
+                method |= 0x00, fidx = e->defwrt_ptr.seg->obj_index;
+            else if (e->defwrt_type == DEFWRT_GROUP)
+                method |= 0x10, fidx = e->defwrt_ptr.grp->obj_index;
+            else {
+                nasm_nonfatal("default WRT specification for"
+                              " external `%s' unresolved", e->name);
+                method |= 0x50, fidx = -1;      /* got to do _something_ */
+            }
+        } else
+            method |= 0x50, fidx = -1;
+    } else {
+        /*
+         * See if we can find the WRT-segment ID in our segment
+         * list. If so, we have a F0 (LSEG) frame.
+         */
+        for (s = seghead; s; s = s->next)
+            if (s->index == wrt - 1)
+                break;
+        if (s)
+            method |= 0x00, fidx = s->obj_index;
+        else {
+            for (g = grphead; g; g = g->next)
+                if (g->index == wrt - 1)
+                    break;
+            if (g)
+                method |= 0x10, fidx = g->obj_index;
+            else {
+                int32_t i = wrt / 2;
+                struct ExtBack *eb = ebhead;
+                while (i >= EXT_BLKSIZ) {
+                    if (eb)
+                        eb = eb->next;
+                    else
+                        break;
+                    i -= EXT_BLKSIZ;
+                }
+                if (eb)
+                    method |= 0x20, fidx = eb->extsi->index;
+                else
+                    nasm_panic("unrecognised WRT value in obj_write_fixup");
+            }
+        }
+    }
+
+    forp = obj_byte(forp, method);
+    if (fidx != -1)
+        forp = obj_index(forp, fidx);
+    forp = obj_index(forp, tidx);
+    obj_commit(forp);
+}
+
+static int32_t obj_segment(char *name, int *bits)
+{
+    /*
+     * We call the label manager here to define a name for the new
+     * segment, and when our _own_ label-definition stub gets
+     * called in return, it should register the new segment name
+     * using the pointer it gets passed. That way we save memory,
+     * by sponging off the label manager.
+     */
+    if (debug_level(3))
+        nasm_debug(" obj_segment: < %s >, *bits=%d\n", name, *bits);
+
+    if (!name) {
+        *bits = 16;
+        current_seg = NULL;
+        return first_seg;
+    } else {
+        struct Segment *seg;
+        struct Group *grp;
+        struct External **extp;
+        int obj_idx, i, attrs;
+	bool rn_error;
+        char *p;
+
+        /*
+         * Look for segment attributes.
+         */
+        attrs = 0;
+        while (*name == '.')
+            name++;             /* hack, but a documented one */
+        p = name;
+        while (*p && !nasm_isspace(*p))
+            p++;
+        if (*p) {
+            *p++ = '\0';
+            while (*p && nasm_isspace(*p))
+                *p++ = '\0';
+        }
+        while (*p) {
+            while (*p && !nasm_isspace(*p))
+                p++;
+            if (*p) {
+                *p++ = '\0';
+                while (*p && nasm_isspace(*p))
+                    *p++ = '\0';
+            }
+
+            attrs++;
+        }
+
+        for (seg = seghead, obj_idx = 1; ; seg = seg->next, obj_idx++) {
+            if (!seg)
+                break;
+
+            if (!strcmp(seg->name, name)) {
+                if (attrs > 0 && seg->pass_last_seen == pass_count())
+                    nasm_warn(WARN_OTHER, "segment attributes specified on"
+                              " redeclaration of segment: ignoring");
+                if (seg->use32)
+                    *bits = 32;
+                else
+                    *bits = 16;
+                current_seg = seg;
+                seg->pass_last_seen = pass_count();
+                return seg->index;
+            }
+        }
+
+        *segtail = seg = nasm_malloc(sizeof(*seg));
+        seg->next = NULL;
+        segtail = &seg->next;
+        seg->index = (any_segs ? seg_alloc() : first_seg);
+        seg->obj_index = obj_idx;
+        seg->grp = NULL;
+        any_segs = true;
+        seg->name = nasm_strdup(name);
+        seg->currentpos = 0;
+        seg->align = 1;         /* default */
+        seg->use32 = false;     /* default */
+        seg->combine = CMB_PUBLIC;      /* default */
+        seg->segclass = seg->overlay = NULL;
+        seg->pubhead = NULL;
+        seg->pubtail = &seg->pubhead;
+        seg->lochead = NULL;
+        seg->loctail = &seg->lochead;
+        seg->orp = obj_new();
+        seg->orp->up = &(seg->orp);
+        seg->orp->ori = ori_ledata;
+        seg->orp->type = LEDATA;
+        seg->orp->parm1 = obj_idx;
+
+        /*
+         * Process the segment attributes.
+         */
+        p = name;
+        while (attrs--) {
+            p += strlen(p);
+            while (!*p)
+                p++;
+
+            /*
+             * `p' contains a segment attribute.
+             */
+            if (!nasm_stricmp(p, "private"))
+                seg->combine = CMB_PRIVATE;
+            else if (!nasm_stricmp(p, "public"))
+                seg->combine = CMB_PUBLIC;
+            else if (!nasm_stricmp(p, "common"))
+                seg->combine = CMB_COMMON;
+            else if (!nasm_stricmp(p, "stack"))
+                seg->combine = CMB_STACK;
+            else if (!nasm_stricmp(p, "use16"))
+                seg->use32 = false;
+            else if (!nasm_stricmp(p, "use32"))
+                seg->use32 = true;
+            else if (!nasm_stricmp(p, "flat")) {
+                /*
+                 * This segment is an OS/2 FLAT segment. That means
+                 * that its default group is group FLAT, even if
+                 * the group FLAT does not explicitly _contain_ the
+                 * segment.
+                 *
+                 * When we see this, we must create the group
+                 * `FLAT', containing no segments, if it does not
+                 * already exist; then we must set the default
+                 * group of this segment to be the FLAT group.
+                 */
+                struct Group *grp;
+                for (grp = grphead; grp; grp = grp->next)
+                    if (!strcmp(grp->name, "FLAT"))
+                        break;
+                if (!grp) {
+                    obj_directive(D_GROUP, "FLAT");
+                    for (grp = grphead; grp; grp = grp->next)
+                        if (!strcmp(grp->name, "FLAT"))
+                            break;
+                    if (!grp)
+                        nasm_panic("failure to define FLAT?!");
+                }
+                seg->grp = grp;
+            } else if (!nasm_strnicmp(p, "class=", 6))
+                seg->segclass = nasm_strdup(p + 6);
+            else if (!nasm_strnicmp(p, "overlay=", 8))
+                seg->overlay = nasm_strdup(p + 8);
+            else if (!nasm_strnicmp(p, "align=", 6)) {
+                seg->align = readnum(p + 6, &rn_error);
+                if (rn_error) {
+                    seg->align = 1;
+                    nasm_nonfatal("segment alignment should be numeric");
+                }
+                switch (seg->align) {
+                case 1:        /* BYTE */
+                case 2:        /* WORD */
+                case 4:        /* DWORD */
+                case 16:       /* PARA */
+                case 256:      /* PAGE */
+                case 4096:     /* PharLap extension */
+                    break;
+                case 8:
+                    nasm_warn(WARN_OTHER, "OBJ format does not support alignment"
+                              " of 8: rounding up to 16");
+                    seg->align = 16;
+                    break;
+                case 32:
+                case 64:
+                case 128:
+                    nasm_warn(WARN_OTHER, "OBJ format does not support alignment"
+                              " of %d: rounding up to 256", seg->align);
+                    seg->align = 256;
+                    break;
+                case 512:
+                case 1024:
+                case 2048:
+                    nasm_warn(WARN_OTHER, "OBJ format does not support alignment"
+                              " of %d: rounding up to 4096", seg->align);
+                    seg->align = 4096;
+                    break;
+                default:
+                    nasm_nonfatal("invalid alignment value %d",
+                                  seg->align);
+                    seg->align = 1;
+                    break;
+                }
+            } else if (!nasm_strnicmp(p, "absolute=", 9)) {
+                seg->align = SEG_ABS + readnum(p + 9, &rn_error);
+                if (rn_error)
+                    nasm_nonfatal("argument to `absolute' segment"
+                                  " attribute should be numeric");
+            }
+        }
+
+        /* We need to know whenever we have at least one 32-bit segment */
+        obj_use32 |= seg->use32;
+
+        obj_seg_needs_update = seg;
+        if (seg->align >= SEG_ABS)
+            define_label(name, NO_SEG, seg->align - SEG_ABS, false);
+        else
+            define_label(name, seg->index + 1, 0L, false);
+        obj_seg_needs_update = NULL;
+
+        /*
+         * See if this segment is defined in any groups.
+         */
+        for (grp = grphead; grp; grp = grp->next) {
+            for (i = grp->nindices; i < grp->nentries; i++) {
+                if (!strcmp(grp->segsi.name, seg->name)) {
+                    nasm_free(grp->segsi.name);
+                    grp->segsi = grp->segsgrp->nindices;
+                    grp->segsgrp->nindices++.index = seg->obj_index;
+                    if (seg->grp)
+                        nasm_warn(WARN_OTHER, "segment `%s' is already part of"
+                                  " a group: first one takes precedence",
+                                  seg->name);
+                    else
+                        seg->grp = grp;
+                }
+            }
+        }
+
+        /*
+         * Walk through the list of externals with unresolved
+         * default-WRT clauses, and resolve any that point at this
+         * segment.
+         */
+        extp = &dws;
+        while (*extp) {
+            if ((*extp)->defwrt_type == DEFWRT_STRING &&
+                !strcmp((*extp)->defwrt_ptr.string, seg->name)) {
+                nasm_free((*extp)->defwrt_ptr.string);
+                (*extp)->defwrt_type = DEFWRT_SEGMENT;
+                (*extp)->defwrt_ptr.seg = seg;
+                *extp = (*extp)->next_dws;
+            } else
+                extp = &(*extp)->next_dws;
+        }
+
+        if (seg->use32)
+            *bits = 32;
+        else
+            *bits = 16;
+        current_seg = seg;
+        return seg->index;
+    }
+}
+
+static enum directive_result
+obj_directive(enum directive directive, char *value)
+{
+    switch (directive) {
+    case D_GROUP:
+    {
+        char *p, *q, *v;
+        if (pass_first()) {     /* XXX */
+            struct Group *grp;
+            struct Segment *seg;
+            struct External **extp;
+            int obj_idx;
+
+            q = value;
+            while (*q == '.')
+                q++;            /* hack, but a documented one */
+            v = q;
+            while (*q && !nasm_isspace(*q))
+                q++;
+            if (nasm_isspace(*q)) {
+                *q++ = '\0';
+                while (*q && nasm_isspace(*q))
+                    q++;
+            }
+            /*
+             * Here we used to sanity-check the group directive to
+             * ensure nobody tried to declare a group containing no
+             * segments. However, OS/2 does this as standard
+             * practice, so the sanity check has been removed.
+             *
+             * if (!*q) {
+             *     nasm_error(ERR_NONFATAL,"GROUP directive contains no segments");
+             *     return DIRR_ERROR;
+             * }
+             */
+
+            obj_idx = 1;
+            for (grp = grphead; grp; grp = grp->next) {
+                obj_idx++;
+                if (!strcmp(grp->name, v)) {
+                    nasm_nonfatal("group `%s' defined twice", v);
+                    return DIRR_ERROR;
+                }
+            }
+
+            *grptail = grp = nasm_malloc(sizeof(*grp));
+            grp->next = NULL;
+            grptail = &grp->next;
+            grp->index = seg_alloc();
+            grp->obj_index = obj_idx;
+            grp->nindices = grp->nentries = 0;
+            grp->name = NULL;
+
+            obj_grp_needs_update = grp;
+            backend_label(v, grp->index + 1, 0L);
+            obj_grp_needs_update = NULL;
+
+            while (*q) {
+                p = q;
+                while (*q && !nasm_isspace(*q))
+                    q++;
+                if (nasm_isspace(*q)) {
+                    *q++ = '\0';
+                    while (*q && nasm_isspace(*q))
+                        q++;
+                }
+                /*
+                 * Now p contains a segment name. Find it.
+                 */
+                for (seg = seghead; seg; seg = seg->next)
+                    if (!strcmp(seg->name, p))
+                        break;
+                if (seg) {
+                    /*
+                     * We have a segment index. Shift a name entry
+                     * to the end of the array to make room.
+                     */
+                    grp->segsgrp->nentries++ = grp->segsgrp->nindices;
+                    grp->segsgrp->nindices++.index = seg->obj_index;
+                    if (seg->grp)
+                        nasm_warn(WARN_OTHER, "segment `%s' is already part of"
+                                  " a group: first one takes precedence",
+                                  seg->name);
+                    else
+                        seg->grp = grp;
+                } else {
+                    /*
+                     * We have an as-yet undefined segment.
+                     * Remember its name, for later.
+                     */
+                    grp->segsgrp->nentries++.name = nasm_strdup(p);
+                }
+            }
+
+            /*
+             * Walk through the list of externals with unresolved
+             * default-WRT clauses, and resolve any that point at
+             * this group.
+             */
+            extp = &dws;
+            while (*extp) {
+                if ((*extp)->defwrt_type == DEFWRT_STRING &&
+                    !strcmp((*extp)->defwrt_ptr.string, grp->name)) {
+                    nasm_free((*extp)->defwrt_ptr.string);
+                    (*extp)->defwrt_type = DEFWRT_GROUP;
+                    (*extp)->defwrt_ptr.grp = grp;
+                    *extp = (*extp)->next_dws;
+                } else
+                    extp = &(*extp)->next_dws;
+            }
+        }
+        return DIRR_OK;
+    }
+    case D_UPPERCASE:
+        obj_uppercase = true;
+        return DIRR_OK;
+
+    case D_IMPORT:
+    {
+        char *q, *extname, *libname, *impname;
+
+        if (!pass_first())      /* XXX */
+            return DIRR_OK;
+        extname = q = value;
+        while (*q && !nasm_isspace(*q))
+            q++;
+        if (nasm_isspace(*q)) {
+            *q++ = '\0';
+            while (*q && nasm_isspace(*q))
+                q++;
+        }
+
+        libname = q;
+        while (*q && !nasm_isspace(*q))
+            q++;
+        if (nasm_isspace(*q)) {
+            *q++ = '\0';
+            while (*q && nasm_isspace(*q))
+                q++;
+        }
+
+        impname = q;
+
+        if (!*extname || !*libname)
+            nasm_nonfatal("`import' directive requires symbol name"
+                          " and library name");
+        else {
+            struct ImpDef *imp;
+            bool err = false;
+
+            imp = *imptail = nasm_malloc(sizeof(struct ImpDef));
+            imptail = &imp->next;
+            imp->next = NULL;
+            imp->extname = nasm_strdup(extname);
+            imp->libname = nasm_strdup(libname);
+            imp->impindex = readnum(impname, &err);
+            if (!*impname || err)
+                imp->impname = nasm_strdup(impname);
+            else
+                imp->impname = NULL;
+        }
+
+        return DIRR_OK;
+    }
+    case D_EXPORT:
+    {
+        char *q, *extname, *intname, *v;
+        struct ExpDef *export;
+        int flags = 0;
+        unsigned int ordinal = 0;
+
+        if (!pass_first())
+            return DIRR_OK;     /* ignore in pass two */
+        intname = q = value;
+        while (*q && !nasm_isspace(*q))
+            q++;
+        if (nasm_isspace(*q)) {
+            *q++ = '\0';
+            while (*q && nasm_isspace(*q))
+                q++;
+        }
+
+        extname = q;
+        while (*q && !nasm_isspace(*q))
+            q++;
+        if (nasm_isspace(*q)) {
+            *q++ = '\0';
+            while (*q && nasm_isspace(*q))
+                q++;
+        }
+
+        if (!*intname) {
+            nasm_nonfatal("`export' directive requires export name");
+            return DIRR_OK;
+        }
+        if (!*extname) {
+            extname = intname;
+            intname = "";
+        }
+        while (*q) {
+            v = q;
+            while (*q && !nasm_isspace(*q))
+                q++;
+            if (nasm_isspace(*q)) {
+                *q++ = '\0';
+                while (*q && nasm_isspace(*q))
+                    q++;
+            }
+            if (!nasm_stricmp(v, "resident"))
+                flags |= EXPDEF_FLAG_RESIDENT;
+            else if (!nasm_stricmp(v, "nodata"))
+                flags |= EXPDEF_FLAG_NODATA;
+            else if (!nasm_strnicmp(v, "parm=", 5)) {
+                bool err = false;
+                flags |= EXPDEF_MASK_PARMCNT & readnum(v + 5, &err);
+                if (err) {
+                    nasm_nonfatal("value `%s' for `parm' is non-numeric", v + 5);
+                    return DIRR_ERROR;
+                }
+            } else {
+                bool err = false;
+                ordinal = readnum(v, &err);
+                if (err) {
+                    nasm_nonfatal("unrecognised export qualifier `%s'", v);
+                    return DIRR_ERROR;
+                }
+                flags |= EXPDEF_FLAG_ORDINAL;
+            }
+        }
+
+        export = *exptail = nasm_malloc(sizeof(struct ExpDef));
+        exptail = &export->next;
+        export->next = NULL;
+        export->extname = nasm_strdup(extname);
+        export->intname = nasm_strdup(intname);
+        export->ordinal = ordinal;
+        export->flags = flags;
+
+        return DIRR_OK;
+    }
+    default:
+	return DIRR_UNKNOWN;
+    }
+}
+
+static void obj_sectalign(int32_t seg, unsigned int value)
+{
+    struct Segment *s;
+
+    list_for_each(s, seghead) {
+        if (s->index == seg)
+            break;
+    }
+
+    /*
+     * it should not be too big value
+     * and applied on non-absolute sections
+     */
+    if (!s || !is_power2(value) ||
+        value > 4096 || s->align >= SEG_ABS)
+        return;
+
+    /*
+     * FIXME: No code duplication please
+     * consider making helper for this
+     * mapping since section handler has
+     * to do the same
+     */
+    switch (value) {
+    case 8:
+        value = 16;
+        break;
+    case 32:
+    case 64:
+    case 128:
+        value = 256;
+        break;
+    case 512:
+    case 1024:
+    case 2048:
+        value = 4096;
+        break;
+    }
+
+    if (s->align < (int)value)
+        s->align = value;
+}
+
+static int32_t obj_segbase(int32_t segment)
+{
+    struct Segment *seg;
+
+    /*
+     * Find the segment in our list.
+     */
+    for (seg = seghead; seg; seg = seg->next)
+        if (seg->index == segment - 1)
+            break;
+
+    if (!seg) {
+        /*
+         * Might be an external with a default WRT.
+         */
+        int32_t i = segment / 2;
+        struct ExtBack *eb = ebhead;
+        struct External *e;
+
+        while (i >= EXT_BLKSIZ) {
+            if (eb)
+                eb = eb->next;
+            else
+                break;
+            i -= EXT_BLKSIZ;
+        }
+        if (eb) {
+            e = eb->extsi;
+	    if (!e) {
+                /* Not available yet, probably a forward reference */
+		nasm_assert(!pass_final());
+		return NO_SEG;
+	    }
+
+	    switch (e->defwrt_type) {
+	    case DEFWRT_NONE:
+                return segment; /* fine */
+	    case DEFWRT_SEGMENT:
+                return e->defwrt_ptr.seg->index + 1;
+	    case DEFWRT_GROUP:
+                return e->defwrt_ptr.grp->index + 1;
+	    default:
+                return NO_SEG;  /* can't tell what it is */
+	    }
+        }
+
+        return segment;         /* not one of ours - leave it alone */
+    }
+
+    if (seg->align >= SEG_ABS)
+        return seg->align;      /* absolute segment */
+    if (seg->grp)
+        return seg->grp->index + 1;     /* grouped segment */
+
+    return segment;             /* no special treatment */
+}
+
+/* Get a file timestamp in MS-DOS format */
+static uint32_t obj_file_timestamp(const char *pathname)
+{
+    time_t t;
+    const struct tm *lt;
+
+    if (!nasm_file_time(&t, pathname))
+        return 0;
+
+    lt = localtime(&t);
+    if (!lt)
+        return 0;
+
+    if (lt->tm_year < 80 || lt->tm_year > 207)
+        return 0;               /* Only years 1980-2107 representable */
+
+    return
+        ((uint32_t)lt->tm_sec >> 1) +
+        ((uint32_t)lt->tm_min << 5) +
+        ((uint32_t)lt->tm_hour << 11) +
+        ((uint32_t)lt->tm_mday << 16) +
+        (((uint32_t)lt->tm_mon + 1) << 21) +
+        (((uint32_t)lt->tm_year - 80) << 25);
+}
+
+static void obj_write_file(void)
+{
+    struct Segment *seg, *entry_seg_ptr = 0;
+    struct FileName *fn;
+    struct LineNumber *ln;
+    struct Group *grp;
+    struct Public *pub, *loc;
+    struct External *ext;
+    struct ImpDef *imp;
+    struct ExpDef *export;
+    int lname_idx;
+    ObjRecord *orp;
+    const struct strlist_entry *depfile;
+    const bool debuginfo = (dfmt == &borland_debug_form);
+
+    /*
+     * Write the THEADR module header.
+     */
+    orp = obj_new();
+    orp->type = THEADR;
+    obj_name(orp, obj_infile);
+    obj_emit2(orp);
+
+    /*
+     * Write the NASM boast comment.
+     */
+    orp->type = COMENT;
+    obj_rword(orp, dTRANSL);
+    obj_name(orp, nasm_comment());
+    obj_emit2(orp);
+
+    /*
+     * Output file dependency information
+     */
+    if (!obj_nodepend && depend_list) {
+        strlist_for_each(depfile, depend_list) {
+            uint32_t ts;
+
+            ts = obj_file_timestamp(depfile->str);
+            if (ts) {
+                orp->type = COMENT;
+                obj_rword(orp, dDEPFILE);
+                obj_dword(orp, ts);
+                obj_name(orp, depfile->str);
+                obj_emit2(orp);
+            }
+        }
+    }
+
+    orp->type = COMENT;
+    /*
+     * Write the IMPDEF records, if any.
+     */
+    for (imp = imphead; imp; imp = imp->next) {
+        obj_rword(orp, dOMFEXT);
+        obj_byte(orp, 1);       /* subfunction 1: IMPDEF */
+        if (imp->impname)
+            obj_byte(orp, 0);   /* import by name */
+        else
+            obj_byte(orp, 1);   /* import by ordinal */
+        obj_name(orp, imp->extname);
+        obj_name(orp, imp->libname);
+        if (imp->impname)
+            obj_name(orp, imp->impname);
+        else
+            obj_word(orp, imp->impindex);
+        obj_emit2(orp);
+    }
+
+    /*
+     * Write the EXPDEF records, if any.
+     */
+    for (export = exphead; export; export = export->next) {
+        obj_rword(orp, dOMFEXT);
+        obj_byte(orp, 2);       /* subfunction 2: EXPDEF */
+        obj_byte(orp, export->flags);
+        obj_name(orp, export->extname);
+        obj_name(orp, export->intname);
+        if (export->flags & EXPDEF_FLAG_ORDINAL)
+            obj_word(orp, export->ordinal);
+        obj_emit2(orp);
+    }
+
+    /* we're using extended OMF if we put in debug info */
+    if (debuginfo) {
+        orp->type = COMENT;
+        obj_rword(orp, dEXTENDED);
+        obj_emit2(orp);
+    }
+
+    /*
+     * Write the first LNAMES record, containing LNAME one, which
+     * is null. Also initialize the LNAME counter.
+     */
+    orp->type = LNAMES;
+    obj_byte(orp, 0);
+    lname_idx = 1;
+    /*
+     * Write some LNAMES for the segment names
+     */
+    for (seg = seghead; seg; seg = seg->next) {
+        orp = obj_name(orp, seg->name);
+        if (seg->segclass)
+            orp = obj_name(orp, seg->segclass);
+        if (seg->overlay)
+            orp = obj_name(orp, seg->overlay);
+        obj_commit(orp);
+    }
+    /*
+     * Write some LNAMES for the group names
+     */
+    for (grp = grphead; grp; grp = grp->next) {
+        orp = obj_name(orp, grp->name);
+        obj_commit(orp);
+    }
+    obj_emit(orp);
+
+    /*
+     * Write the SEGDEF records.
+     */
+    orp->type = SEGDEF;
+    for (seg = seghead; seg; seg = seg->next) {
+        int acbp;
+        uint32_t seglen = seg->currentpos;
+
+        acbp = (seg->combine << 2);     /* C field */
+
+        if (seg->use32)
+            acbp |= 0x01;       /* P bit is Use32 flag */
+        else if (seglen == 0x10000L) {
+            seglen = 0;         /* This special case may be needed for old linkers */
+            acbp |= 0x02;       /* B bit */
+        }
+
+        /* A field */
+        if (seg->align >= SEG_ABS)
+            /* acbp |= 0x00 */ ;
+        else if (seg->align >= 4096) {
+            if (seg->align > 4096)
+                nasm_nonfatal("segment `%s' requires more alignment"
+                              " than OBJ format supports", seg->name);
+            acbp |= 0xC0;       /* PharLap extension */
+        } else if (seg->align >= 256) {
+            acbp |= 0x80;
+        } else if (seg->align >= 16) {
+            acbp |= 0x60;
+        } else if (seg->align >= 4) {
+            acbp |= 0xA0;
+        } else if (seg->align >= 2) {
+            acbp |= 0x40;
+        } else
+            acbp |= 0x20;
+
+        obj_byte(orp, acbp);
+        if (seg->align & SEG_ABS) {
+            obj_x(orp, seg->align - SEG_ABS);   /* Frame */
+            obj_byte(orp, 0);   /* Offset */
+        }
+        obj_x(orp, seglen);
+        obj_index(orp, ++lname_idx);
+        obj_index(orp, seg->segclass ? ++lname_idx : 1);
+        obj_index(orp, seg->overlay ? ++lname_idx : 1);
+        obj_emit2(orp);
+    }
+
+    /*
+     * Write the GRPDEF records.
+     */
+    orp->type = GRPDEF;
+    for (grp = grphead; grp; grp = grp->next) {
+        int i;
+
+        if (grp->nindices != grp->nentries) {
+            for (i = grp->nindices; i < grp->nentries; i++) {
+                nasm_nonfatal("group `%s' contains undefined segment"
+                              " `%s'", grp->name, grp->segsi.name);
+                nasm_free(grp->segsi.name);
+                grp->segsi.name = NULL;
+            }
+        }
+        obj_index(orp, ++lname_idx);
+        for (i = 0; i < grp->nindices; i++) {
+            obj_byte(orp, 0xFF);
+            obj_index(orp, grp->segsi.index);
+        }
+        obj_emit2(orp);
+    }
+
+    /*
+     * Write the PUBDEF records: first the ones in the segments,
+     * then the far-absolutes.
+     */
+    orp->type = PUBDEF;
+    orp->ori = ori_pubdef;
+    for (seg = seghead; seg; seg = seg->next) {
+        orp->parm0 = seg->grp ? seg->grp->obj_index : 0;
+        orp->parm1 = seg->obj_index;
+        for (pub = seg->pubhead; pub; pub = pub->next) {
+            orp = obj_name(orp, pub->name);
+            orp = obj_x(orp, pub->offset);
+            orp = obj_byte(orp, 0);     /* type index */
+            obj_commit(orp);
+        }
+        obj_emit(orp);
+    }
+    orp->parm0 = 0;
+    orp->parm1 = 0;
+    for (pub = fpubhead; pub; pub = pub->next) {        /* pub-crawl :-) */
+        if (orp->parm2 != (uint32_t)pub->segment) {
+            obj_emit(orp);
+            orp->parm2 = pub->segment;
+        }
+        orp = obj_name(orp, pub->name);
+        orp = obj_x(orp, pub->offset);
+        orp = obj_byte(orp, 0); /* type index */
+        obj_commit(orp);
+    }
+    obj_emit(orp);
+
+    /*
+     * Write the EXTDEF and COMDEF records, in order.
+     */
+    orp->ori = ori_null;
+    for (ext = exthead; ext; ext = ext->next) {
+        if (ext->commonsize == 0) {
+            if (orp->type != EXTDEF) {
+                obj_emit(orp);
+                orp->type = EXTDEF;
+            }
+            orp = obj_name(orp, ext->name);
+            orp = obj_index(orp, 0);
+        } else {
+            if (orp->type != COMDEF) {
+                obj_emit(orp);
+                orp->type = COMDEF;
+            }
+            orp = obj_name(orp, ext->name);
+            orp = obj_index(orp, 0);
+            if (ext->commonelem) {
+                orp = obj_byte(orp, 0x61);      /* far communal */
+                orp = obj_value(orp, (ext->commonsize / ext->commonelem));
+                orp = obj_value(orp, ext->commonelem);
+            } else {
+                orp = obj_byte(orp, 0x62);      /* near communal */
+                orp = obj_value(orp, ext->commonsize);
+            }
+        }
+        obj_commit(orp);
+    }
+    obj_emit(orp);
+
+    /*
+     * Write a COMENT record stating that the linker's first pass
+     * may stop processing at this point. Exception is if our
+     * MODEND record specifies a start point, in which case,
+     * according to some variants of the documentation, this COMENT
+     * should be omitted. So we'll omit it just in case.
+     * But, TASM puts it in all the time so if we are using
+     * TASM debug stuff we are putting it in
+     */
+    if (debuginfo || obj_entry_seg == NO_SEG) {
+        orp->type = COMENT;
+        obj_rword(orp, dLINKPASS);
+        obj_byte(orp, 1);
+        obj_emit2(orp);
+    }
+
+    /*
+     * 1) put out the compiler type
+     * 2) Put out the type info.  The only type we are using is near label #19
+     */
+    if (debuginfo) {
+        int i;
+        struct Array *arrtmp = arrhead;
+        orp->type = COMENT;
+        obj_rword(orp, dCOMPDEF);
+        obj_byte(orp, 4);
+        obj_byte(orp, 0);
+        obj_emit2(orp);
+
+        obj_rword(orp, dTYPEDEF);
+        obj_word(orp, 0x18);    /* type # for linking */
+        obj_word(orp, 6);       /* size of type */
+        obj_byte(orp, 0x2a);    /* absolute type for debugging */
+        obj_emit2(orp);
+        obj_rword(orp, dTYPEDEF);
+        obj_word(orp, 0x19);    /* type # for linking */
+        obj_word(orp, 0);       /* size of type */
+        obj_byte(orp, 0x24);    /* absolute type for debugging */
+        obj_byte(orp, 0);       /* near/far specifier */
+        obj_emit2(orp);
+        obj_rword(orp, dTYPEDEF);
+        obj_word(orp, 0x1A);    /* type # for linking */
+        obj_word(orp, 0);       /* size of type */
+        obj_byte(orp, 0x24);    /* absolute type for debugging */
+        obj_byte(orp, 1);       /* near/far specifier */
+        obj_emit2(orp);
+        obj_rword(orp, dTYPEDEF);
+        obj_word(orp, 0x1b);    /* type # for linking */
+        obj_word(orp, 0);       /* size of type */
+        obj_byte(orp, 0x23);    /* absolute type for debugging */
+        obj_byte(orp, 0);
+        obj_byte(orp, 0);
+        obj_byte(orp, 0);
+        obj_emit2(orp);
+        obj_rword(orp, dTYPEDEF);
+        obj_word(orp, 0x1c);    /* type # for linking */
+        obj_word(orp, 0);       /* size of type */
+        obj_byte(orp, 0x23);    /* absolute type for debugging */
+        obj_byte(orp, 0);
+        obj_byte(orp, 4);
+        obj_byte(orp, 0);
+        obj_emit2(orp);
+        obj_rword(orp, dTYPEDEF);
+        obj_word(orp, 0x1d);    /* type # for linking */
+        obj_word(orp, 0);       /* size of type */
+        obj_byte(orp, 0x23);    /* absolute type for debugging */
+        obj_byte(orp, 0);
+        obj_byte(orp, 1);
+        obj_byte(orp, 0);
+        obj_emit2(orp);
+        obj_rword(orp, dTYPEDEF);
+        obj_word(orp, 0x1e);    /* type # for linking */
+        obj_word(orp, 0);       /* size of type */
+        obj_byte(orp, 0x23);    /* absolute type for debugging */
+        obj_byte(orp, 0);
+        obj_byte(orp, 5);
+        obj_byte(orp, 0);
+        obj_emit2(orp);
+
+        /* put out the array types */
+        for (i = ARRAYBOT; i < arrindex; i++) {
+            obj_rword(orp, dTYPEDEF);
+            obj_word(orp, i);   /* type # for linking */
+            obj_word(orp, arrtmp->size);        /* size of type */
+            obj_byte(orp, 0x1A);        /* absolute type for debugging (array) */
+            obj_byte(orp, arrtmp->basetype);    /* base type */
+            obj_emit2(orp);
+            arrtmp = arrtmp->next;
+        }
+    }
+    /*
+     * write out line number info with a LINNUM record
+     * switch records when we switch segments, and output the
+     * file in a pseudo-TASM fashion.  The record switch is naive; that
+     * is that one file may have many records for the same segment
+     * if there are lots of segment switches
+     */
+    if (fnhead && debuginfo) {
+        seg = fnhead->lnhead->segment;
+
+        for (fn = fnhead; fn; fn = fn->next) {
+            /* write out current file name */
+            orp->type = COMENT;
+            orp->ori = ori_null;
+            obj_rword(orp, dFILNAME);
+            obj_byte(orp, 0);
+            obj_name(orp, fn->name);
+            obj_dword(orp, 0);
+            obj_emit2(orp);
+
+            /* write out line numbers this file */
+
+            orp->type = LINNUM;
+            orp->ori = ori_linnum;
+            for (ln = fn->lnhead; ln; ln = ln->next) {
+                if (seg != ln->segment) {
+                    /* if we get here have to flush the buffer and start
+                     * a new record for a new segment
+                     */
+                    seg = ln->segment;
+                    obj_emit(orp);
+                }
+                orp->parm0 = seg->grp ? seg->grp->obj_index : 0;
+                orp->parm1 = seg->obj_index;
+                orp = obj_word(orp, ln->lineno);
+                orp = obj_x(orp, ln->offset);
+                obj_commit(orp);
+            }
+            obj_emit(orp);
+        }
+    }
+    /*
+     * we are going to locate the entry point segment now
+     * rather than wait until the MODEND record, because,
+     * then we can output a special symbol to tell where the
+     * entry point is.
+     *
+     */
+    if (obj_entry_seg != NO_SEG) {
+        for (seg = seghead; seg; seg = seg->next) {
+            if (seg->index == obj_entry_seg) {
+                entry_seg_ptr = seg;
+                break;
+            }
+        }
+        if (!seg)
+            nasm_nonfatal("entry point is not in this module");
+    }
+
+    /*
+     * get ready to put out symbol records
+     */
+    orp->type = COMENT;
+    orp->ori = ori_local;
+
+    /*
+     * put out a symbol for the entry point
+     * no dots in this symbol, because, borland does
+     * not (officially) support dots in label names
+     * and I don't know what various versions of TLINK will do
+     */
+    if (debuginfo && obj_entry_seg != NO_SEG) {
+        orp = obj_name(orp, "start_of_program");
+        orp = obj_word(orp, 0x19);      /* type: near label */
+        orp = obj_index(orp, seg->grp ? seg->grp->obj_index : 0);
+        orp = obj_index(orp, seg->obj_index);
+        orp = obj_x(orp, obj_entry_ofs);
+        obj_commit(orp);
+    }
+
+    /*
+     * put out the local labels
+     */
+    for (seg = seghead; seg && debuginfo; seg = seg->next) {
+        /* labels this seg */
+        for (loc = seg->lochead; loc; loc = loc->next) {
+            orp = obj_name(orp, loc->name);
+            orp = obj_word(orp, loc->type);
+            orp = obj_index(orp, seg->grp ? seg->grp->obj_index : 0);
+            orp = obj_index(orp, seg->obj_index);
+            orp = obj_x(orp, loc->offset);
+            obj_commit(orp);
+        }
+    }
+    if (orp->used)
+        obj_emit(orp);
+
+    /*
+     * Write the LEDATA/FIXUPP pairs.
+     */
+    for (seg = seghead; seg; seg = seg->next) {
+        obj_emit(seg->orp);
+        nasm_free(seg->orp);
+    }
+
+    /*
+     * Write the MODEND module end marker.
+     */
+    orp->type = obj_use32 ? MODE32 : MODEND;
+    orp->ori = ori_null;
+    if (entry_seg_ptr) {
+        orp->type = entry_seg_ptr->use32 ? MODE32 : MODEND;
+        obj_byte(orp, 0xC1);
+        seg = entry_seg_ptr;
+        if (seg->grp) {
+            obj_byte(orp, 0x10);
+            obj_index(orp, seg->grp->obj_index);
+        } else {
+            /*
+             * the below changed to prevent TLINK crashing.
+             * Previous more efficient version read:
+             *
+             *  obj_byte (orp, 0x50);
+             */
+            obj_byte(orp, 0x00);
+            obj_index(orp, seg->obj_index);
+        }
+        obj_index(orp, seg->obj_index);
+        obj_x(orp, obj_entry_ofs);
+    } else
+        obj_byte(orp, 0);
+    obj_emit2(orp);
+    nasm_free(orp);
+}
+
+static void obj_fwrite(ObjRecord * orp)
+{
+    unsigned int cksum, len;
+    uint8_t *ptr;
+
+    cksum = orp->type;
+    if (orp->x_size == 32)
+        cksum |= 1;
+    fputc(cksum, ofile);
+    len = orp->committed + 1;
+    cksum += (len & 0xFF) + ((len >> 8) & 0xFF);
+    fwriteint16_t(len, ofile);
+    nasm_write(orp->buf, len-1, ofile);
+    for (ptr = orp->buf; --len; ptr++)
+        cksum += *ptr;
+    fputc((-cksum) & 0xFF, ofile);
+}
+
+static enum directive_result
+obj_pragma(const struct pragma *pragma)
+{
+    switch (pragma->opcode) {
+    case D_NODEPEND:
+        obj_nodepend = true;
+        break;
+
+    default:
+        break;
+    }
+
+    return DIRR_OK;
+}
+
+extern macros_t obj_stdmac;
+
+static void dbgbi_init(void)
+{
+    fnhead = NULL;
+    fntail = &fnhead;
+    arrindex = ARRAYBOT;
+    arrhead = NULL;
+    arrtail = &arrhead;
+}
+static void dbgbi_cleanup(void)
+{
+    struct Segment *segtmp;
+    while (fnhead) {
+        struct FileName *fntemp = fnhead;
+        while (fnhead->lnhead) {
+            struct LineNumber *lntemp = fnhead->lnhead;
+            fnhead->lnhead = lntemp->next;
+            nasm_free(lntemp);
+        }
+        fnhead = fnhead->next;
+        nasm_free(fntemp->name);
+        nasm_free(fntemp);
+    }
+    for (segtmp = seghead; segtmp; segtmp = segtmp->next) {
+        while (segtmp->lochead) {
+            struct Public *loctmp = segtmp->lochead;
+            segtmp->lochead = loctmp->next;
+            nasm_free(loctmp->name);
+            nasm_free(loctmp);
+        }
+    }
+    while (arrhead) {
+        struct Array *arrtmp = arrhead;
+        arrhead = arrhead->next;
+        nasm_free(arrtmp);
+    }
+}
+
+static void dbgbi_linnum(const char *lnfname, int32_t lineno, int32_t segto)
+{
+    struct FileName *fn;
+    struct LineNumber *ln;
+    struct Segment *seg;
+
+    if (segto == NO_SEG)
+        return;
+
+    /*
+     * If `any_segs' is still false, we must define a default
+     * segment.
+     */
+    if (!any_segs) {
+        int tempint = 0;
+        if (segto != obj_segment("__NASMDEFSEG", &tempint))
+            nasm_panic("strange segment conditions in OBJ driver");
+    }
+
+    /*
+     * Find the segment we are targeting.
+     */
+    for (seg = seghead; seg; seg = seg->next)
+        if (seg->index == segto)
+            break;
+    if (!seg)
+        nasm_panic("lineno directed to nonexistent segment?");
+
+/*    for (fn = fnhead; fn; fn = fnhead->next) */
+    for (fn = fnhead; fn; fn = fn->next)        /* fbk - Austin Lunnen - John Fine */
+        if (!nasm_stricmp(lnfname, fn->name))
+            break;
+    if (!fn) {
+        fn = nasm_malloc(sizeof(*fn));
+        fn->name = nasm_malloc(strlen(lnfname) + 1);
+        strcpy(fn->name, lnfname);
+        fn->lnhead = NULL;
+        fn->lntail = &fn->lnhead;
+        fn->next = NULL;
+        *fntail = fn;
+        fntail = &fn->next;
+    }
+    ln = nasm_malloc(sizeof(*ln));
+    ln->segment = seg;
+    ln->offset = seg->currentpos;
+    ln->lineno = lineno;
+    ln->next = NULL;
+    *fn->lntail = ln;
+    fn->lntail = &ln->next;
+
+}
+static void dbgbi_deflabel(char *name, int32_t segment,
+                           int64_t offset, int is_global, char *special)
+{
+    struct Segment *seg;
+
+    (void)special;
+
+    /*
+     * Note: ..^@ special symbols are filtered in labels.c
+     */
+
+    /*
+     * If it's a special-retry from pass two, discard it.
+     */
+    if (is_global == 3)
+        return;
+
+    /*
+     * Case (i):
+     */
+    if (obj_seg_needs_update) {
+        return;
+    } else if (obj_grp_needs_update) {
+        return;
+    }
+    if (segment < SEG_ABS && segment != NO_SEG && segment % 2)
+        return;
+
+    if (segment >= SEG_ABS || segment == NO_SEG) {
+        return;
+    }
+
+    /*
+     * If `any_segs' is still false, we might need to define a
+     * default segment, if they're trying to declare a label in
+     * `first_seg'.  But the label should exist due to a prior
+     * call to obj_deflabel so we can skip that.
+     */
+
+    for (seg = seghead; seg; seg = seg->next)
+        if (seg->index == segment) {
+            struct Public *loc = nasm_malloc(sizeof(*loc));
+            /*
+             * Case (ii). Maybe MODPUB someday?
+             */
+            last_defined = *seg->loctail = loc;
+            seg->loctail = &loc->next;
+            loc->next = NULL;
+            loc->name = nasm_strdup(name);
+            loc->offset = offset;
+        }
+}
+static void dbgbi_typevalue(int32_t type)
+{
+    int vsize;
+    int elem = TYM_ELEMENTS(type);
+    type = TYM_TYPE(type);
+
+    if (!last_defined)
+        return;
+
+    switch (type) {
+    case TY_BYTE:
+        last_defined->type = 8; /* uint8_t */
+        vsize = 1;
+        break;
+    case TY_WORD:
+        last_defined->type = 10;        /* unsigned word */
+        vsize = 2;
+        break;
+    case TY_DWORD:
+        last_defined->type = 12;        /* unsigned dword */
+        vsize = 4;
+        break;
+    case TY_FLOAT:
+        last_defined->type = 14;        /* float */
+        vsize = 4;
+        break;
+    case TY_QWORD:
+        last_defined->type = 15;        /* qword */
+        vsize = 8;
+        break;
+    case TY_TBYTE:
+        last_defined->type = 16;        /* TBYTE */
+        vsize = 10;
+        break;
+    default:
+        last_defined->type = 0x19;      /* label */
+        vsize = 0;
+        break;
+    }
+
+    if (elem > 1) {
+        struct Array *arrtmp = nasm_malloc(sizeof(*arrtmp));
+        int vtype = last_defined->type;
+        arrtmp->size = vsize * elem;
+        arrtmp->basetype = vtype;
+        arrtmp->next = NULL;
+        last_defined->type = arrindex++;
+        *arrtail = arrtmp;
+        arrtail = &(arrtmp->next);
+    }
+    last_defined = NULL;
+}
+static void dbgbi_output(int output_type, void *param)
+{
+    (void)output_type;
+    (void)param;
+}
+static const struct dfmt borland_debug_form = {
+    "Borland Debug Records",
+    "borland",
+    dbgbi_init,
+    dbgbi_linnum,
+    dbgbi_deflabel,
+    NULL,                       /* .debug_smacros */
+    NULL,                       /* .debug_include */
+    NULL,                       /* .debug_mmacros */
+    null_debug_directive,
+    dbgbi_typevalue,
+    dbgbi_output,
+    dbgbi_cleanup,
+    NULL                        /* pragma list */
+};
+
+static const struct dfmt * const borland_debug_arr3 = {
+    &borland_debug_form,
+    &null_debug_form,
+    NULL
+};
+
+static const struct pragma_facility obj_pragma_list = {
+    { NULL, obj_pragma }
+};
+
+const struct ofmt of_obj = {
+    "Intel/Microsoft OMF (MS-DOS, OS/2, Win16)",
+    "obj",
+    ".obj",
+    0,
+    32,
+    borland_debug_arr,
+    &borland_debug_form,
+    obj_stdmac,
+    obj_init,
+    null_reset,
+    nasm_do_legacy_output,
+    obj_out,
+    obj_deflabel,
+    obj_segment,
+    NULL,
+    obj_sectalign,
+    obj_segbase,
+    obj_directive,
+    obj_cleanup,
+    obj_pragma_list
+};
+#endif                          /* OF_OBJ */

_service:tar_scm:nasm-2.16.03.tar.xz/output/outobj.mac Added

@@ -0,0 +1,49 @@
+;; --------------------------------------------------------------------------
+;;   
+;;   Copyright 1996-2009 The NASM Authors - All Rights Reserved
+;;   See the file AUTHORS included with the NASM distribution for
+;;   the specific copyright holders.
+;;
+;;   Redistribution and use in source and binary forms, with or without
+;;   modification, are permitted provided that the following
+;;   conditions are met:
+;;
+;;   * Redistributions of source code must retain the above copyright
+;;     notice, this list of conditions and the following disclaimer.
+;;   * Redistributions in binary form must reproduce the above
+;;     copyright notice, this list of conditions and the following
+;;     disclaimer in the documentation and/or other materials provided
+;;     with the distribution.
+;;     
+;;     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+;;     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+;;     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+;;     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;;     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+;;     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;;     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+;;     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+;;     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+;;     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+;;     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+;;     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;;     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+;; --------------------------------------------------------------------------
+
+OUT: obj
+%define __?SECT?__ section .text
+%imacro group 1+.nolist
+group %1
+%endmacro
+%imacro uppercase 0+.nolist
+uppercase %1
+%endmacro
+%imacro export 1+.nolist
+export %1
+%endmacro
+%imacro import 1+.nolist
+import %1
+%endmacro
+%macro __?NASM_CDecl?__ 1
+%endmacro

_service:tar_scm:nasm-2.16.03.tar.xz/output/pecoff.h Added

@@ -0,0 +1,542 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2020 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#ifndef PECOFF_H
+#define PECOFF_H
+
+/*
+ * Microsoft Portable Executable and Common Object
+ * File Format Specification
+ *
+ * Revision 8.1 – February 15, 2008
+ */
+
+/*
+ * Machine types
+ */
+#define IMAGE_FILE_MACHINE_UNKNOWN      0x0000
+#define IMAGE_FILE_MACHINE_AM33         0x01d3
+#define IMAGE_FILE_MACHINE_AMD64        0x8664
+#define IMAGE_FILE_MACHINE_EBC          0x0ebc
+#define IMAGE_FILE_MACHINE_M32R         0x9041
+#define IMAGE_FILE_MACHINE_ALPHA        0x0184
+#define IMAGE_FILE_MACHINE_ARM          0x01c0
+#define IMAGE_FILE_MACHINE_ALPHA64      0x0284
+#define IMAGE_FILE_MACHINE_I386         0x014c
+#define IMAGE_FILE_MACHINE_IA64         0x0200
+#define IMAGE_FILE_MACHINE_M68K         0x0268
+#define IMAGE_FILE_MACHINE_MIPS16       0x0266
+#define IMAGE_FILE_MACHINE_MIPSFPU      0x0366
+#define IMAGE_FILE_MACHINE_MIPSFPU16    0x0466
+#define IMAGE_FILE_MACHINE_POWERPC      0x01f0
+#define IMAGE_FILE_MACHINE_POWERPCFP    0x01f1
+#define IMAGE_FILE_MACHINE_R3000        0x0162
+#define IMAGE_FILE_MACHINE_R4000        0x0166
+#define IMAGE_FILE_MACHINE_R10000       0x0168
+#define IMAGE_FILE_MACHINE_SH3          0x01a2
+#define IMAGE_FILE_MACHINE_SH3DSP       0x01a3
+#define IMAGE_FILE_MACHINE_SH4          0x01a6
+#define IMAGE_FILE_MACHINE_SH5          0x01a8
+#define IMAGE_FILE_MACHINE_THUMB        0x01c2
+#define IMAGE_FILE_MACHINE_WCEMIPSV2    0x0169
+#define IMAGE_FILE_MACHINE_MASK         0xffff
+
+/*
+ * Characteristics
+ */
+#define IMAGE_FILE_RELOCS_STRIPPED              0x0001
+#define IMAGE_FILE_EXECUTABLE_IMAGE             0x0002
+#define IMAGE_FILE_LINE_NUMS_STRIPPED           0x0004
+#define IMAGE_FILE_LOCAL_SYMS_STRIPPED          0x0008
+#define IMAGE_FILE_AGGRESSIVE_WS_TRIM           0x0010
+#define IMAGE_FILE_LARGE_ADDRESS_AWARE          0x0020
+#define IMAGE_FILE_BYTES_REVERSED_LO            0x0080
+#define IMAGE_FILE_32BIT_MACHINE                0x0100
+#define IMAGE_FILE_DEBUG_STRIPPED               0x0200
+#define IMAGE_FILE_REMOVABLE_RUN_FROM_SWAP      0x0400
+#define IMAGE_FILE_NET_RUN_FROM_SWAP            0x0800
+#define IMAGE_FILE_SYSTEM                       0x1000
+#define IMAGE_FILE_DLL                          0x2000
+#define IMAGE_FILE_UP_SYSTEM_ONLY               0x4000
+#define IMAGE_FILE_BYTES_REVERSED_HI            0x8000
+
+/*
+ * Windows subsystem
+ */
+#define IMAGE_SUBSYSTEM_UNKNOWN                 0
+#define IMAGE_SUBSYSTEM_NATIVE                  1
+#define IMAGE_SUBSYSTEM_WINDOWS_GUI             2
+#define IMAGE_SUBSYSTEM_WINDOWS_CUI             3
+#define IMAGE_SUBSYSTEM_POSIX_CUI               7
+#define IMAGE_SUBSYSTEM_WINDOWS_CE_GUI          9
+#define IMAGE_SUBSYSTEM_EFI_APPLICATION         10
+#define IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER 11
+#define IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER      12
+#define IMAGE_SUBSYSTEM_EFI_ROM                 13
+#define IMAGE_SUBSYSTEM_XBOX                    14
+
+/*
+ * DLL characteristics
+ */
+#define IMAGE_DLL_CHARACTERISTICS_DYNAMIC_BASE          0x0040
+#define IMAGE_DLL_CHARACTERISTICS_FORCE_INTEGRITY       0x0080
+#define IMAGE_DLL_CHARACTERISTICS_NX_COMPAT             0x0100
+#define IMAGE_DLLCHARACTERISTICS_NO_ISOLATION           0x0200
+#define IMAGE_DLLCHARACTERISTICS_NO_SEH                 0x0400
+#define IMAGE_DLLCHARACTERISTICS_NO_BIND                0x0800
+#define IMAGE_DLLCHARACTERISTICS_WDM_DRIVER             0x2000
+#define IMAGE_DLLCHARACTERISTICS_TERMINAL_SERVER_AWARE  0x8000
+
+/*
+ * Section flags
+ */
+#define IMAGE_SCN_TYPE_REG                      0x00000000
+#define IMAGE_SCN_TYPE_DSECT                    0x00000001
+#define IMAGE_SCN_TYPE_NOLOAD                   0x00000002
+#define IMAGE_SCN_TYPE_GROUP                    0x00000004
+#define IMAGE_SCN_TYPE_NO_PAD                   0x00000008
+#define IMAGE_SCN_TYPE_COPY                     0x00000010
+
+#define IMAGE_SCN_CNT_CODE                      0x00000020
+#define IMAGE_SCN_CNT_INITIALIZED_DATA          0x00000040
+#define IMAGE_SCN_CNT_UNINITIALIZED_DATA        0x00000080
+
+#define IMAGE_SCN_LNK_OTHER                     0x00000100
+#define IMAGE_SCN_LNK_INFO                      0x00000200
+#define IMAGE_SCN_TYPE_OVER                     0x00000400
+#define IMAGE_SCN_LNK_REMOVE                    0x00000800
+#define IMAGE_SCN_LNK_COMDAT                    0x00001000
+
+#define IMAGE_SCN_MAX_RELOC			0xffff
+
+#define IMAGE_SCN_MEM_FARDATA                   0x00008000
+#define IMAGE_SCN_MEM_PURGEABLE                 0x00020000
+#define IMAGE_SCN_MEM_16BIT                     0x00020000
+#define IMAGE_SCN_MEM_LOCKED                    0x00040000
+#define IMAGE_SCN_MEM_PRELOAD                   0x00080000
+
+#define IMAGE_SCN_ALIGN_1BYTES                  0x00100000
+#define IMAGE_SCN_ALIGN_2BYTES                  0x00200000
+#define IMAGE_SCN_ALIGN_4BYTES                  0x00300000
+#define IMAGE_SCN_ALIGN_8BYTES                  0x00400000
+#define IMAGE_SCN_ALIGN_16BYTES                 0x00500000
+#define IMAGE_SCN_ALIGN_32BYTES                 0x00600000
+#define IMAGE_SCN_ALIGN_64BYTES                 0x00700000
+#define IMAGE_SCN_ALIGN_128BYTES                0x00800000
+#define IMAGE_SCN_ALIGN_256BYTES                0x00900000
+#define IMAGE_SCN_ALIGN_512BYTES                0x00a00000
+#define IMAGE_SCN_ALIGN_1024BYTES               0x00b00000
+#define IMAGE_SCN_ALIGN_2048BYTES               0x00c00000
+#define IMAGE_SCN_ALIGN_4096BYTES               0x00d00000
+#define IMAGE_SCN_ALIGN_8192BYTES               0x00e00000
+#define IMAGE_SCN_ALIGN_MASK                    0x00f00000
+
+#define IMAGE_SCN_LNK_NRELOC_OVFL               0x01000000
+#define IMAGE_SCN_MEM_DISCARDABLE               0x02000000
+#define IMAGE_SCN_MEM_NOT_CACHED                0x04000000
+#define IMAGE_SCN_MEM_NOT_PAGED                 0x08000000
+#define IMAGE_SCN_MEM_SHARED                    0x10000000
+#define IMAGE_SCN_MEM_EXECUTE                   0x20000000
+#define IMAGE_SCN_MEM_READ                      0x40000000
+#define IMAGE_SCN_MEM_WRITE                     0x80000000
+
+/*
+ * Relocation type x86-64
+ */
+#define IMAGE_REL_AMD64_ABSOLUTE        0x0000
+#define IMAGE_REL_AMD64_ADDR64          0x0001
+#define IMAGE_REL_AMD64_ADDR32          0x0002
+#define IMAGE_REL_AMD64_ADDR32NB        0x0003
+#define IMAGE_REL_AMD64_REL32           0x0004
+#define IMAGE_REL_AMD64_REL32_1         0x0005
+#define IMAGE_REL_AMD64_REL32_2         0x0006
+#define IMAGE_REL_AMD64_REL32_3         0x0007
+#define IMAGE_REL_AMD64_REL32_4         0x0008
+#define IMAGE_REL_AMD64_REL32_5         0x0009
+#define IMAGE_REL_AMD64_SECTION         0x000a
+#define IMAGE_REL_AMD64_SECREL          0x000b
+#define IMAGE_REL_AMD64_SECREL7         0x000c
+#define IMAGE_REL_AMD64_TOKEN           0x000d
+#define IMAGE_REL_AMD64_SREL32          0x000e
+#define IMAGE_REL_AMD64_PAIR            0x000f
+#define IMAGE_REL_AMD64_SSPAN32         0x0010
+
+/*
+ * Relocation types i386
+ */
+#define IMAGE_REL_I386_ABSOLUTE         0x0000
+#define IMAGE_REL_I386_DIR16            0x0001
+#define IMAGE_REL_I386_REL16            0x0002
+#define IMAGE_REL_I386_DIR32            0x0006
+#define IMAGE_REL_I386_DIR32NB          0x0007
+#define IMAGE_REL_I386_SEG12            0x0009
+#define IMAGE_REL_I386_SECTION          0x000a
+#define IMAGE_REL_I386_SECREL           0x000b
+#define IMAGE_REL_I386_TOKEN            0x000c
+#define IMAGE_REL_I386_SECREL7          0x000d
+#define IMAGE_REL_I386_REL32            0x0014
+
+/*
+ * Relocation types ARM
+ */
+#define IMAGE_REL_ARM_ABSOLUTE          0x0000
+#define IMAGE_REL_ARM_ADDR32            0x0001
+#define IMAGE_REL_ARM_ADDR32NB          0x0002
+#define IMAGE_REL_ARM_BRANCH24          0x0003
+#define IMAGE_REL_ARM_BRANCH11          0x0004
+#define IMAGE_REL_ARM_SECTION           0x000e
+#define IMAGE_REL_ARM_SECREL            0x000f
+
+/*
+ * Relocation types Hitachi SuperH
+ */
+#define IMAGE_REL_SH3_ABSOLUTE          0x0000
+#define IMAGE_REL_SH3_DIRECT16          0x0001
+#define IMAGE_REL_SH3_DIRECT32          0x0002
+#define IMAGE_REL_SH3_DIRECT8           0x0003
+#define IMAGE_REL_SH3_DIRECT8_WORD      0x0004
+#define IMAGE_REL_SH3_DIRECT8_LONG      0x0005
+#define IMAGE_REL_SH3_DIRECT4           0x0006
+#define IMAGE_REL_SH3_DIRECT4_WORD      0x0007
+#define IMAGE_REL_SH3_DIRECT4_LONG      0x0008
+#define IMAGE_REL_SH3_PCREL8_WORD       0x0009
+#define IMAGE_REL_SH3_PCREL8_LONG       0x000a
+#define IMAGE_REL_SH3_PCREL12_WORD      0x000b
+#define IMAGE_REL_SH3_STARTOF_SECTION   0x000c
+#define IMAGE_REL_SH3_SIZEOF_SECTION    0x000d
+#define IMAGE_REL_SH3_SECTION           0x000e
+#define IMAGE_REL_SH3_SECREL            0x000f
+#define IMAGE_REL_SH3_DIRECT32_NB       0x0010
+#define IMAGE_REL_SH3_GPREL4_LONG       0x0011
+#define IMAGE_REL_SH3_TOKEN             0x0012
+#define IMAGE_REL_SHM_PCRELPT           0x0013
+#define IMAGE_REL_SHM_REFLO             0x0014
+#define IMAGE_REL_SHM_REFHALF           0x0015
+#define IMAGE_REL_SHM_RELLO             0x0016
+#define IMAGE_REL_SHM_RELHALF           0x0017
+#define IMAGE_REL_SHM_PAIR              0x0018
+#define IMAGE_REL_SHM_NOMODE            0x8000
+
+/*
+ * Relocation types IBM PowerPC processors
+ */
+#define IMAGE_REL_PPC_ABSOLUTE          0x0000
+#define IMAGE_REL_PPC_ADDR64            0x0001
+#define IMAGE_REL_PPC_ADDR32            0x0002
+#define IMAGE_REL_PPC_ADDR24            0x0003
+#define IMAGE_REL_PPC_ADDR16            0x0004
+#define IMAGE_REL_PPC_ADDR14            0x0005
+#define IMAGE_REL_PPC_REL24             0x0006
+#define IMAGE_REL_PPC_REL14             0x0007
+#define IMAGE_REL_PPC_ADDR32NB          0x000a
+#define IMAGE_REL_PPC_SECREL            0x000b
+#define IMAGE_REL_PPC_SECTION           0x000c
+#define IMAGE_REL_PPC_SECREL16          0x000f
+#define IMAGE_REL_PPC_REFHI             0x0010
+#define IMAGE_REL_PPC_REFLO             0x0011
+#define IMAGE_REL_PPC_PAIR              0x0012
+#define IMAGE_REL_PPC_SECRELLO          0x0013
+#define IMAGE_REL_PPC_GPREL             0x0015
+#define IMAGE_REL_PPC_TOKEN             0x0016
+
+/*
+ * Relocation types Intel Itanium processor family (IPF)
+ */
+#define IMAGE_REL_IA64_ABSOLUTE         0x0000
+#define IMAGE_REL_IA64_IMM14            0x0001
+#define IMAGE_REL_IA64_IMM22            0x0002
+#define IMAGE_REL_IA64_IMM64            0x0003
+#define IMAGE_REL_IA64_DIR32            0x0004
+#define IMAGE_REL_IA64_DIR64            0x0005
+#define IMAGE_REL_IA64_PCREL21B         0x0006
+#define IMAGE_REL_IA64_PCREL21M         0x0007
+#define IMAGE_REL_IA64_PCREL21F         0x0008
+#define IMAGE_REL_IA64_GPREL22          0x0009
+#define IMAGE_REL_IA64_LTOFF22          0x000a
+#define IMAGE_REL_IA64_SECTION          0x000b
+#define IMAGE_REL_IA64_SECREL22         0x000c
+#define IMAGE_REL_IA64_SECREL64I        0x000d
+#define IMAGE_REL_IA64_SECREL32         0x000e
+#define IMAGE_REL_IA64_DIR32NB          0x0010
+#define IMAGE_REL_IA64_SREL14           0x0011
+#define IMAGE_REL_IA64_SREL22           0x0012
+#define IMAGE_REL_IA64_SREL32           0x0013
+#define IMAGE_REL_IA64_UREL32           0x0014
+#define IMAGE_REL_IA64_PCREL60X         0x0015
+#define IMAGE_REL_IA64_PCREL 60B        0x0016
+#define IMAGE_REL_IA64_PCREL60F         0x0017
+#define IMAGE_REL_IA64_PCREL60I         0x0018
+#define IMAGE_REL_IA64_PCREL60M         0x0019
+#define IMAGE_REL_IA64_IMMGPREL64       0x001a
+#define IMAGE_REL_IA64_TOKEN            0x001b
+#define IMAGE_REL_IA64_GPREL32          0x001c
+#define IMAGE_REL_IA64_ADDEND           0x001f
+
+/*
+ * Relocation types MIPS Processors
+ */
+#define IMAGE_REL_MIPS_ABSOLUTE         0x0000
+#define IMAGE_REL_MIPS_REFHALF          0x0001
+#define IMAGE_REL_MIPS_REFWORD          0x0002
+#define IMAGE_REL_MIPS_JMPADDR          0x0003
+#define IMAGE_REL_MIPS_REFHI            0x0004
+#define IMAGE_REL_MIPS_REFLO            0x0005
+#define IMAGE_REL_MIPS_GPREL            0x0006
+#define IMAGE_REL_MIPS_LITERAL          0x0007
+#define IMAGE_REL_MIPS_SECTION          0x000a
+#define IMAGE_REL_MIPS_SECREL           0x000b
+#define IMAGE_REL_MIPS_SECRELLO         0x000c
+#define IMAGE_REL_MIPS_SECRELHI         0x000d
+#define IMAGE_REL_MIPS_JMPADDR16        0x0010
+#define IMAGE_REL_MIPS_REFWORDNB        0x0022
+#define IMAGE_REL_MIPS_PAIR             0x0025
+
+/*
+ * Relocation types Mitsubishi M32R
+ */
+#define IMAGE_REL_M32R_ABSOLUTE         0x0000
+#define IMAGE_REL_M32R_ADDR32           0x0001
+#define IMAGE_REL_M32R_ADDR32NB         0x0002
+#define IMAGE_REL_M32R_ADDR24           0x0003
+#define IMAGE_REL_M32R_GPREL16          0x0004
+#define IMAGE_REL_M32R_PCREL24          0x0005
+#define IMAGE_REL_M32R_PCREL16          0x0006
+#define IMAGE_REL_M32R_PCREL8           0x0007
+#define IMAGE_REL_M32R_REFHALF          0x0008
+#define IMAGE_REL_M32R_REFHI            0x0009
+#define IMAGE_REL_M32R_REFLO            0x000a
+#define IMAGE_REL_M32R_PAIR             0x000b
+#define IMAGE_REL_M32R_SECTION          0x000c
+#define IMAGE_REL_M32R_SECREL           0x000d
+#define IMAGE_REL_M32R_TOKEN            0x000e
+
+/*
+ * Section number values
+ */
+#define IMAGE_SYM_UNDEFINED      0
+#define IMAGE_SYM_ABSOLUTE      -1
+#define IMAGE_SYM_DEBUG         -2
+
+/*
+ * Type representation
+ */
+#define IMAGE_SYM_TYPE_NULL             0
+#define IMAGE_SYM_TYPE_VOID             1
+#define IMAGE_SYM_TYPE_CHAR             2
+#define IMAGE_SYM_TYPE_SHORT            3
+#define IMAGE_SYM_TYPE_INT              4
+#define IMAGE_SYM_TYPE_LONG             5
+#define IMAGE_SYM_TYPE_FLOAT            6
+#define IMAGE_SYM_TYPE_DOUBLE           7
+#define IMAGE_SYM_TYPE_STRUCT           8
+#define IMAGE_SYM_TYPE_UNION            9
+#define IMAGE_SYM_TYPE_ENUM             10
+#define IMAGE_SYM_TYPE_MOE              11
+#define IMAGE_SYM_TYPE_BYTE             12
+#define IMAGE_SYM_TYPE_WORD             13
+#define IMAGE_SYM_TYPE_UINT             14
+#define IMAGE_SYM_TYPE_DWORD            15
+
+#define IMAGE_SYM_DTYPE_NULL            0
+#define IMAGE_SYM_DTYPE_POINTER         1
+#define IMAGE_SYM_DTYPE_FUNCTION        2
+#define IMAGE_SYM_DTYPE_ARRAY           3
+
+/*
+ * Storage class
+ */
+#define IMAGE_SYM_CLASS_END_OF_FUNCTION         -1
+#define IMAGE_SYM_CLASS_NULL                    0
+#define IMAGE_SYM_CLASS_AUTOMATIC               1
+#define IMAGE_SYM_CLASS_EXTERNAL                2
+#define IMAGE_SYM_CLASS_STATIC                  3
+#define IMAGE_SYM_CLAS S_REGISTER               4
+#define IMAGE_SYM_CLASS_EXTERNAL_DEF            5
+#define IMAGE_SYM_CLASS_LABEL                   6
+#define IMAGE_SYM_CLASS_UNDEFINED_LABEL         7
+#define IMAGE_SYM_CLASS_MEMBER_OF_STRUCT        8
+#define IMAGE_SYM_CLASS_ARGUMENT                9
+#define IMAGE_SYM_CLASS_STRUCT_TAG              10
+#define IMAGE_SYM_CLASS_MEMBER_OF_UNION         11
+#define IMAGE_SYM_CLASS_UNION_TAG               12
+#define IMAGE_SYM_CLASS_TYPE_DEFINITION         13
+#define IMAGE_SYM_CLASS_UNDEFINED_STATIC        14
+#define IMAGE_SYM_CLASS_ENUM_TAG                15
+#define IMAGE_SYM_CLASS_MEMBER_OF_ENUM          16
+#define IMAGE_SYM_CLASS_REGISTER_PARAM          17
+#define IMAGE_SYM_CLASS_BIT_FIELD               18
+#define IMAGE_SYM_CLASS_BLOCK                   100
+#define IMAGE_SYM_CLASS_FUNCTION                101
+#define IMAGE_SYM_CLASS_END_OF_STRUCT           102
+#define IMAGE_SYM_CLASS_FILE                    103
+#define IMAGE_SYM_CLASS_SECTION                 104
+#define IMAGE_SYM_CLASS_WEAK_EXTERNAL           105
+#define IMAGE_SYM_CLASS_CLR_TOKEN               107
+
+/*
+ * COMDAT sections
+ */
+#define IMAGE_COMDAT_SELECT_NODUPLICATES        1
+#define IMAGE_COMDAT_SELECT_ANY                 2
+#define IMAGE_COMDAT_SELECT_SAME_SIZE           3
+#define IMAGE_COMDAT_SELECT_EXACT_MATCH         4
+#define IMAGE_COMDAT_SELECT_ASSOCIATIVE         5
+#define IMAGE_COMDAT_SELECT_LARGEST             6
+
+/*
+ * Attribute certificate table
+ */
+#define WIN_CERT_REVISION_1_0           0x0100
+#define WIN_CERT_REVISION_2_0           0x0200
+#define WIN_CERT_TYPE_X509              0x0001
+#define WIN_CERT_TYPE_PKCS_SIGNED_DATA  0x0002
+#define WIN_CERT_TYPE_RESERVED_1        0x0003
+#define WIN_CERT_TYPE_TS_STACK_SIGNED   0x0004
+
+/*
+ * Debug type
+ */
+#define IMAGE_DEBUG_TYPE_UNKNOWN        0
+#define IMAGE_DEBUG_TYPE_COFF           1
+#define IMAGE_DEBUG_TYPE_CODEVIEW       2
+#define IMAGE_DEBUG_TYPE_FPO            3
+#define IMAGE_DEBUG_TYPE_MISC           4
+#define IMAGE_DEBUG_TYPE_EXCEPTION      5
+#define IMAGE_DEBUG_TYPE_FIXUP          6
+#define IMAGE_DEBUG_TYPE_OMAP_TO_SRC    7
+#define IMAGE_DEBUG_TYPE_OMAP_FROM_SRC  8
+#define IMAGE_DEBUG_TYP E_BORLAND       9
+#define IMAGE_DEBUG_TYPE_RESERVED10     10
+#define IMAGE_DEBUG_TYPE_CLSID          11
+
+/*
+ * Base relocation types
+ */
+#define IMAGE_REL_BASED_ABSOLUTE        0
+#define IMAGE_REL_BASED_HIGH            1
+#define IMAGE_REL_BASED_LOW             2
+#define IMAGE_REL_BASED_HIGHLOW         3
+#define IMAGE_REL_BASED_HIGHADJ         4
+#define IMAGE_REL_BASED_MIPS_JMPADDR    5
+#define IMAGE_REL_BASED_MIPS_JMPADDR16  9
+#define IMAGE_REL_BASED_DIR64           10
+
+/*
+ * TLS callback functions
+ */
+#define DLL_PROCESS_ATTACH      1
+#define DLL_THREAD_ATTACH       2
+#define DLL_THREAD_DETACH       3
+#define DLL_PROCESS_DETACH      0
+
+/*
+ * Import Type
+ */
+#define IMPORT_CODE     0
+#define IMPORT_DATA     1
+#define IMPORT_CONST    2
+
+/*
+ * Import name type
+ */
+#define IMPORT_ORDINAL          0
+#define IMPORT_NAME             1
+#define IMPORT_NAME_NOPREFIX    2
+#define IMPORT_NAME_UNDECORATE  3
+
+struct coff_Section {
+    struct SAA *data;
+    uint32_t len;
+    int nrelocs;
+    int32_t index;
+    struct coff_Reloc *head, **tail;
+    uint32_t flags;             /* section flags */
+    uint32_t align_flags;       /* user-specified alignment flags */
+    uint32_t sectalign_flags;   /* minimum alignment from sectalign */
+    char *name;
+    int32_t namepos;            /* Offset of name into the strings table */
+    int32_t pos, relpos;
+    int64_t pass_last_seen;
+
+    /* comdat-related members */
+    char *comdat_name;
+    uint32_t checksum;          /* set only for comdat sections */
+    int8_t comdat_selection;
+    int8_t comdat_symbol;       /* is the "comdat name" in symbol table? */
+    int32_t comdat_associated;  /* associated section for selection==5 */
+};
+
+struct coff_Reloc {
+    struct coff_Reloc *next;
+    int32_t address;            /* relative to _start_ of section */
+    int32_t symbol;             /* symbol number */
+    enum {
+        SECT_SYMBOLS,
+        ABS_SYMBOL,
+        REAL_SYMBOLS
+    } symbase;                  /* relocation for symbol number :) */
+    int16_t type;
+};
+
+struct coff_Symbol {
+    char name9;
+    int32_t strpos;             /* string table position of name */
+    int32_t value;              /* address, or COMMON variable size */
+    int section;                /* section number where it's defined
+                                 * - in COFF codes, not NASM codes */
+    bool is_global;             /* is it a global symbol or not? */
+    int16_t type;               /* 0 - notype, 0x20 - function */
+    int32_t namlen;             /* full name length */
+};
+
+struct coff_DebugInfo {
+    int32_t segto;
+    int32_t seg;
+    uint64_t size;
+    struct coff_Section *section;
+};
+
+extern struct coff_Section **coff_sects;
+extern int coff_nsects;
+extern struct SAA *coff_syms;
+extern uint32_t coff_nsyms;
+extern struct SAA *coff_strs;
+extern bool win32, win64;
+
+extern char coff_infileFILENAME_MAX;
+extern char coff_outfileFILENAME_MAX;
+
+extern int coff_make_section(char *name, uint32_t flags);
+
+
+#endif /* PECOFF_H */

_service:tar_scm:nasm-2.16.03.tar.xz/output/stabs.h Added

@@ -0,0 +1,150 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2018 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#ifndef STABS_H_
+#define STABS_H_
+
+#include "nctype.h"
+
+#include "compiler.h"
+#include "nasmlib.h"
+#include "nasm.h"
+
+/* offsets */
+enum stab_offsets {
+	STAB_strdxoff	= 0,
+	STAB_typeoff	= 4,
+	STAB_otheroff	= 5,
+	STAB_descoff	= 6,
+	STAB_valoff	= 8,
+	STAB_stabsize	= 12
+};
+
+/* stab/non-stab types */
+enum stab_types {
+	N_UNDF		= 0x00, /* Undefined symbol */
+	N_EXT		= 0x01, /* External symbol */
+	N_ABS		= 0x02, /* Absolute symbol */
+	N_ABS_EXT	= 0x03, /* Absolute external symbol */
+	N_TEXT		= 0x04, /* Symbol in text segment */
+	N_TEXT_EXT	= 0x05, /* Symbol in external text segment */
+	N_DATA		= 0x06,
+	N_DATA_EXT	= 0x07,
+	N_BSS		= 0x08,
+	N_BSS_EXT	= 0x09,
+	N_INDR		= 0x0a,
+	N_FN_SEQ	= 0x0c, /* N_FN from Sequent compilers */
+	N_WEAKU		= 0x0d, /* Weak undefined symbol */
+	N_WEAKA		= 0x0e, /* Weak absolute symbl */
+	N_WEAKT		= 0x0f, /* Weak text symbol */
+	N_WEAKD		= 0x10, /* Weak data symbol */
+	N_WEAKB		= 0x11, /* Weak bss symbol */
+	N_COMM		= 0x12, /* Common symbol */
+	N_SETA		= 0x14, /* Absolute set element symbol */
+	N_SETA_EXT	= 0x15,
+	N_SETT		= 0x16, /* Text set element symbol */
+	N_SETT_EXT	= 0x17,
+	N_SETD		= 0x18, /* Data set element symbol */
+	N_SETD_EXT	= 0x19,
+	N_SETB		= 0x1a, /* BSS set element symbol */
+	N_SETB_EXT	= 0x1b,
+	N_SETV		= 0x1c, /* Pointer to set vector in data area */
+	N_SETV_EXT	= 0x1d,
+	N_WARNING	= 0x1e, /* Warning symbol */
+	N_FN		= 0x1f, /* Filename of .o file */
+	N_GSYM		= 0x20, /* Global variable */
+	N_FNAME		= 0x22, /* Function name for BSD Fortran */
+	N_FUN		= 0x24, /* Function name or text segment variable for C */
+	N_STSYM		= 0x26, /* Data-segment variable with internal linkage */
+	N_LCSYM		= 0x28, /* BSS-segment variable with internal linkage */
+	N_MAIN		= 0x2a, /* Name of main routine */
+	N_ROSYM		= 0x2c, /* Read-only data symbols */
+	N_BNSYM		= 0x2e, /* The beginning of a relocatable function block */
+	N_PC		= 0x30, /* Global symbol in Pascal */
+	N_NSYMS		= 0x32, /* Number of symbols */
+	N_NOMAP		= 0x34, /* No DST map for sym */
+	N_OBJ		= 0x38, /* Like N_SO, but for the object file */
+	N_OPT		= 0x3c, /* Options for the debugger */
+	N_RSYM		= 0x40, /* Register variable */
+	N_M2C		= 0x42, /* Modula-2 compilation unit */
+	N_SLINE		= 0x44, /* Line number in text segment */
+	N_DSLINE	= 0x46, /* Line number in data segment */
+	N_BSLINE	= 0x48, /* Line number in bss segment */
+	N_BROWS		= 0x48, /* Sun's source-code browser stabs */
+	N_DEFD		= 0x4a, /* GNU Modula-2 definition module dependency */
+	N_FLINE		= 0x4c, /* Function start/body/end line numbers */
+	N_ENSYM		= 0x4e, /* This tells the end of a relocatable function */
+	N_EHDECL	= 0x50, /* GNU C++ exception variable */
+	N_MOD2		= 0x50, /* Modula2 info "for imc" */
+	N_CATCH		= 0x54, /* GNU C++ `catch' clause */
+	N_SSYM		= 0x60, /* Structure or union element */
+	N_ENDM		= 0x62, /* Last stab emitted for module */
+	N_SO		= 0x64, /* ID for main source file */
+	N_OSO		= 0x66, /* Apple: This is the stab that associated the .o file  */
+	N_ALIAS		= 0x6c, /* SunPro F77: Name of alias */
+	N_LSYM		= 0x80, /* Automatic variable in the stack */
+	N_BINCL		= 0x82, /* Beginning of an include file */
+	N_SOL		= 0x84, /* ID for sub-source file */
+	N_PSYM		= 0xa0, /* Parameter variable */
+	N_EINCL		= 0xa2, /* End of an include file */
+	N_ENTRY		= 0xa4, /* Alternate entry point */
+	N_LBRAC		= 0xc0, /* Beginning of lexical block */
+	N_EXCL		= 0xc2, /* Place holder for deleted include file */
+	N_SCOPE		= 0xc4, /* Modula-2 scope information */
+	N_PATCH		= 0xd0, /* Solaris2: Patch Run Time Checker */
+	N_RBRAC		= 0xe0, /* End of a lexical block */
+	N_BCOMM		= 0xe2, /* Begin named common block */
+	N_ECOMM		= 0xe4, /* End named common block */
+	N_ECOML		= 0xe8, /* Member of a common block */
+	N_WITH		= 0xea, /* Solaris2: Pascal "with" statement */
+	N_NBTEXT	= 0xf0,
+	N_NBDATA	= 0xf2,
+	N_NBBSS		= 0xf4,
+	N_NBSTS		= 0xf6,
+	N_NBLCS		= 0xf8,
+	N_LENG		= 0xfe  /* Second symbol entry whih a length-value for the preceding entry */
+};
+
+enum stab_source_file {
+	N_SO_AS		= 0x01,
+	N_SO_C		= 0x02,
+	N_SO_ANSI_C	= 0x03,
+	N_SO_CC		= 0x04,
+	N_SO_FORTRAN	= 0x05,
+	N_SO_PASCAL	= 0x06,
+	N_SO_FORTRAN90	= 0x07,
+	N_SO_OBJC	= 0x32,
+	N_SO_OBJCPLUS	= 0x33
+};
+
+#endif /* STABS_H_ */

_service:tar_scm:nasm-2.16.03.tar.xz/perllib Added

_service:tar_scm:nasm-2.16.03.tar.xz/perllib/crc64.ph Added

@@ -0,0 +1,158 @@
+# -*- perl -*-
+#
+# Pure Perl implementation of the same CRC64 implementation used
+# elsewhere in NASM.
+#
+# Note: Perl may have 32- or 64-bit integers; we need to handle both
+# without overflowing into floating point (yuck), so handle them as
+# pairs of 32-bit numbers.  Ordering is BIGENDIAN.
+#
+
+@crc64_tab = (
+    0x00000000, 0x00000000, 0x7ad870c8, 0x30358979,
+    0xf5b0e190, 0x606b12f2, 0x8f689158, 0x505e9b8b,
+    0xc038e573, 0x9841b68f, 0xbae095bb, 0xa8743ff6,
+    0x358804e3, 0xf82aa47d, 0x4f50742b, 0xc81f2d04,
+    0xab28ecb4, 0x6814fe75, 0xd1f09c7c, 0x5821770c,
+    0x5e980d24, 0x087fec87, 0x24407dec, 0x384a65fe,
+    0x6b1009c7, 0xf05548fa, 0x11c8790f, 0xc060c183,
+    0x9ea0e857, 0x903e5a08, 0xe478989f, 0xa00bd371,
+    0x7d08ff3b, 0x88be6f81, 0x07d08ff3, 0xb88be6f8,
+    0x88b81eab, 0xe8d57d73, 0xf2606e63, 0xd8e0f40a,
+    0xbd301a48, 0x10ffd90e, 0xc7e86a80, 0x20ca5077,
+    0x4880fbd8, 0x7094cbfc, 0x32588b10, 0x40a14285,
+    0xd620138f, 0xe0aa91f4, 0xacf86347, 0xd09f188d,
+    0x2390f21f, 0x80c18306, 0x594882d7, 0xb0f40a7f,
+    0x1618f6fc, 0x78eb277b, 0x6cc08634, 0x48deae02,
+    0xe3a8176c, 0x18803589, 0x997067a4, 0x28b5bcf0,
+    0xfa11fe77, 0x117cdf02, 0x80c98ebf, 0x2149567b,
+    0x0fa11fe7, 0x7117cdf0, 0x75796f2f, 0x41224489,
+    0x3a291b04, 0x893d698d, 0x40f16bcc, 0xb908e0f4,
+    0xcf99fa94, 0xe9567b7f, 0xb5418a5c, 0xd963f206,
+    0x513912c3, 0x79682177, 0x2be1620b, 0x495da80e,
+    0xa489f353, 0x19033385, 0xde51839b, 0x2936bafc,
+    0x9101f7b0, 0xe12997f8, 0xebd98778, 0xd11c1e81,
+    0x64b11620, 0x8142850a, 0x1e6966e8, 0xb1770c73,
+    0x8719014c, 0x99c2b083, 0xfdc17184, 0xa9f739fa,
+    0x72a9e0dc, 0xf9a9a271, 0x08719014, 0xc99c2b08,
+    0x4721e43f, 0x0183060c, 0x3df994f7, 0x31b68f75,
+    0xb29105af, 0x61e814fe, 0xc8497567, 0x51dd9d87,
+    0x2c31edf8, 0xf1d64ef6, 0x56e99d30, 0xc1e3c78f,
+    0xd9810c68, 0x91bd5c04, 0xa3597ca0, 0xa188d57d,
+    0xec09088b, 0x6997f879, 0x96d17843, 0x59a27100,
+    0x19b9e91b, 0x09fcea8b, 0x636199d3, 0x39c963f2,
+    0xdf7adabd, 0x7a6e2d6f, 0xa5a2aa75, 0x4a5ba416,
+    0x2aca3b2d, 0x1a053f9d, 0x50124be5, 0x2a30b6e4,
+    0x1f423fce, 0xe22f9be0, 0x659a4f06, 0xd21a1299,
+    0xeaf2de5e, 0x82448912, 0x902aae96, 0xb271006b,
+    0x74523609, 0x127ad31a, 0x0e8a46c1, 0x224f5a63,
+    0x81e2d799, 0x7211c1e8, 0xfb3aa751, 0x42244891,
+    0xb46ad37a, 0x8a3b6595, 0xceb2a3b2, 0xba0eecec,
+    0x41da32ea, 0xea507767, 0x3b024222, 0xda65fe1e,
+    0xa2722586, 0xf2d042ee, 0xd8aa554e, 0xc2e5cb97,
+    0x57c2c416, 0x92bb501c, 0x2d1ab4de, 0xa28ed965,
+    0x624ac0f5, 0x6a91f461, 0x1892b03d, 0x5aa47d18,
+    0x97fa2165, 0x0afae693, 0xed2251ad, 0x3acf6fea,
+    0x095ac932, 0x9ac4bc9b, 0x7382b9fa, 0xaaf135e2,
+    0xfcea28a2, 0xfaafae69, 0x8632586a, 0xca9a2710,
+    0xc9622c41, 0x02850a14, 0xb3ba5c89, 0x32b0836d,
+    0x3cd2cdd1, 0x62ee18e6, 0x460abd19, 0x52db919f,
+    0x256b24ca, 0x6b12f26d, 0x5fb35402, 0x5b277b14,
+    0xd0dbc55a, 0x0b79e09f, 0xaa03b592, 0x3b4c69e6,
+    0xe553c1b9, 0xf35344e2, 0x9f8bb171, 0xc366cd9b,
+    0x10e32029, 0x93385610, 0x6a3b50e1, 0xa30ddf69,
+    0x8e43c87e, 0x03060c18, 0xf49bb8b6, 0x33338561,
+    0x7bf329ee, 0x636d1eea, 0x012b5926, 0x53589793,
+    0x4e7b2d0d, 0x9b47ba97, 0x34a35dc5, 0xab7233ee,
+    0xbbcbcc9d, 0xfb2ca865, 0xc113bc55, 0xcb19211c,
+    0x5863dbf1, 0xe3ac9dec, 0x22bbab39, 0xd3991495,
+    0xadd33a61, 0x83c78f1e, 0xd70b4aa9, 0xb3f20667,
+    0x985b3e82, 0x7bed2b63, 0xe2834e4a, 0x4bd8a21a,
+    0x6debdf12, 0x1b863991, 0x1733afda, 0x2bb3b0e8,
+    0xf34b3745, 0x8bb86399, 0x8993478d, 0xbb8deae0,
+    0x06fbd6d5, 0xebd3716b, 0x7c23a61d, 0xdbe6f812,
+    0x3373d236, 0x13f9d516, 0x49aba2fe, 0x23cc5c6f,
+    0xc6c333a6, 0x7392c7e4, 0xbc1b436e, 0x43a74e9d,
+    0x95ac9329, 0xac4bc9b5, 0xef74e3e1, 0x9c7e40cc,
+    0x601c72b9, 0xcc20db47, 0x1ac40271, 0xfc15523e,
+    0x5594765a, 0x340a7f3a, 0x2f4c0692, 0x043ff643,
+    0xa02497ca, 0x54616dc8, 0xdafce702, 0x6454e4b1,
+    0x3e847f9d, 0xc45f37c0, 0x445c0f55, 0xf46abeb9,
+    0xcb349e0d, 0xa4342532, 0xb1eceec5, 0x9401ac4b,
+    0xfebc9aee, 0x5c1e814f, 0x8464ea26, 0x6c2b0836,
+    0x0b0c7b7e, 0x3c7593bd, 0x71d40bb6, 0x0c401ac4,
+    0xe8a46c12, 0x24f5a634, 0x927c1cda, 0x14c02f4d,
+    0x1d148d82, 0x449eb4c6, 0x67ccfd4a, 0x74ab3dbf,
+    0x289c8961, 0xbcb410bb, 0x5244f9a9, 0x8c8199c2,
+    0xdd2c68f1, 0xdcdf0249, 0xa7f41839, 0xecea8b30,
+    0x438c80a6, 0x4ce15841, 0x3954f06e, 0x7cd4d138,
+    0xb63c6136, 0x2c8a4ab3, 0xcce411fe, 0x1cbfc3ca,
+    0x83b465d5, 0xd4a0eece, 0xf96c151d, 0xe49567b7,
+    0x76048445, 0xb4cbfc3c, 0x0cdcf48d, 0x84fe7545,
+    0x6fbd6d5e, 0xbd3716b7, 0x15651d96, 0x8d029fce,
+    0x9a0d8cce, 0xdd5c0445, 0xe0d5fc06, 0xed698d3c,
+    0xaf85882d, 0x2576a038, 0xd55df8e5, 0x15432941,
+    0x5a3569bd, 0x451db2ca, 0x20ed1975, 0x75283bb3,
+    0xc49581ea, 0xd523e8c2, 0xbe4df122, 0xe51661bb,
+    0x3125607a, 0xb548fa30, 0x4bfd10b2, 0x857d7349,
+    0x04ad6499, 0x4d625e4d, 0x7e751451, 0x7d57d734,
+    0xf11d8509, 0x2d094cbf, 0x8bc5f5c1, 0x1d3cc5c6,
+    0x12b59265, 0x35897936, 0x686de2ad, 0x05bcf04f,
+    0xe70573f5, 0x55e26bc4, 0x9ddd033d, 0x65d7e2bd,
+    0xd28d7716, 0xadc8cfb9, 0xa85507de, 0x9dfd46c0,
+    0x273d9686, 0xcda3dd4b, 0x5de5e64e, 0xfd965432,
+    0xb99d7ed1, 0x5d9d8743, 0xc3450e19, 0x6da80e3a,
+    0x4c2d9f41, 0x3df695b1, 0x36f5ef89, 0x0dc31cc8,
+    0x79a59ba2, 0xc5dc31cc, 0x037deb6a, 0xf5e9b8b5,
+    0x8c157a32, 0xa5b7233e, 0xf6cd0afa, 0x9582aa47,
+    0x4ad64994, 0xd625e4da, 0x300e395c, 0xe6106da3,
+    0xbf66a804, 0xb64ef628, 0xc5bed8cc, 0x867b7f51,
+    0x8aeeace7, 0x4e645255, 0xf036dc2f, 0x7e51db2c,
+    0x7f5e4d77, 0x2e0f40a7, 0x05863dbf, 0x1e3ac9de,
+    0xe1fea520, 0xbe311aaf, 0x9b26d5e8, 0x8e0493d6,
+    0x144e44b0, 0xde5a085d, 0x6e963478, 0xee6f8124,
+    0x21c64053, 0x2670ac20, 0x5b1e309b, 0x16452559,
+    0xd476a1c3, 0x461bbed2, 0xaeaed10b, 0x762e37ab,
+    0x37deb6af, 0x5e9b8b5b, 0x4d06c667, 0x6eae0222,
+    0xc26e573f, 0x3ef099a9, 0xb8b627f7, 0x0ec510d0,
+    0xf7e653dc, 0xc6da3dd4, 0x8d3e2314, 0xf6efb4ad,
+    0x0256b24c, 0xa6b12f26, 0x788ec284, 0x9684a65f,
+    0x9cf65a1b, 0x368f752e, 0xe62e2ad3, 0x06bafc57,
+    0x6946bb8b, 0x56e467dc, 0x139ecb43, 0x66d1eea5,
+    0x5ccebf68, 0xaecec3a1, 0x2616cfa0, 0x9efb4ad8,
+    0xa97e5ef8, 0xcea5d153, 0xd3a62e30, 0xfe90582a,
+    0xb0c7b7e3, 0xc7593bd8, 0xca1fc72b, 0xf76cb2a1,
+    0x45775673, 0xa732292a, 0x3faf26bb, 0x9707a053,
+    0x70ff5290, 0x5f188d57, 0x0a272258, 0x6f2d042e,
+    0x854fb300, 0x3f739fa5, 0xff97c3c8, 0x0f4616dc,
+    0x1bef5b57, 0xaf4dc5ad, 0x61372b9f, 0x9f784cd4,
+    0xee5fbac7, 0xcf26d75f, 0x9487ca0f, 0xff135e26,
+    0xdbd7be24, 0x370c7322, 0xa10fceec, 0x0739fa5b,
+    0x2e675fb4, 0x576761d0, 0x54bf2f7c, 0x6752e8a9,
+    0xcdcf48d8, 0x4fe75459, 0xb7173810, 0x7fd2dd20,
+    0x387fa948, 0x2f8c46ab, 0x42a7d980, 0x1fb9cfd2,
+    0x0df7adab, 0xd7a6e2d6, 0x772fdd63, 0xe7936baf,
+    0xf8474c3b, 0xb7cdf024, 0x829f3cf3, 0x87f8795d,
+    0x66e7a46c, 0x27f3aa2c, 0x1c3fd4a4, 0x17c62355,
+    0x935745fc, 0x4798b8de, 0xe98f3534, 0x77ad31a7,
+    0xa6df411f, 0xbfb21ca3, 0xdc0731d7, 0x8f8795da,
+    0x536fa08f, 0xdfd90e51, 0x29b7d047, 0xefec8728
+    );
+
+sub crc64($$) {
+    my ($cv, $str) = @_;
+    my $c;
+    my @cc = @$cv;
+    $cc0 %= 4294967296;
+    $cc1 %= 4294967296;
+
+    foreach $c (unpack("C*", $str)) {
+	my @ct = @{$crc64_tab($cc1 & 0xff) ^ $c};
+
+	$cc1 = $ct1 ^
+	    ((($cc1 & 0xffffff00) >> 8) | (($cc0 & 0xff) << 24));
+	$cc0 = $ct0 ^ (($cc0 & 0xffffff00) >> 8);
+    }
+
+    return @cc;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/perllib/gensv.pl Added

_service:tar_scm:nasm-2.16.03.tar.xz/perllib/phash.ph Added

@@ -0,0 +1,203 @@
+# -*- perl -*-
+#
+# Perfect Minimal Hash Generator written in Perl, which produces
+# C output.
+#
+
+require 'random_sv_vectors.ph';
+require 'crc64.ph';
+
+#
+# Compute the prehash for a key
+#
+# prehash(key, sv, N)
+#
+sub prehash($$$) {
+    my($key, $n, $sv) = @_;
+    my @c = crc64($sv, $key);
+    my $nmask = ($n << 1) - 2;
+
+    # Create a bipartite graph...
+    $k1 = ($c1 & $nmask) + 0; # low word
+    $k2 = ($c0 & $nmask) + 1; # high word
+
+    return ($k1, $k2);
+}
+
+#
+# Walk the assignment graph, return true on success
+#
+sub walk_graph($$$$) {
+    my($nodeval,$nodeneigh,$n,$v) = @_;
+    my $nx;
+
+    # print STDERR "Vertex $n value $v\n";
+    $$nodeval$n = $v;
+
+    foreach $nx (@{$$nodeneigh$n}) {
+	# $nx -> neigh, hash
+	my ($o, $e) = @$nx;
+
+	# print STDERR "Edge $n,$o value $e: ";
+	my $ov;
+	if (defined($ov = $$nodeval$o)) {
+	    if ($v+$ov != $e) {
+		# Cyclic graph with collision
+		# print STDERR "error, should be ", $v+$ov, "\n";
+		return 0;
+	    } else {
+		# print STDERR "ok\n";
+	    }
+	} else {
+	    return 0 unless (walk_graph($nodeval, $nodeneigh, $o, $e-$v));
+	}
+    }
+    return 1;
+}
+
+#
+# Generate the function assuming a given N.
+#
+# gen_hash_n(N, sv, \%data, run)
+#
+sub gen_hash_n($$$$) {
+    my($n, $sv, $href, $run) = @_;
+    my @keys = keys(%{$href});
+    my $i;
+    my $gr;
+    my ($k, $v);
+    my $gsize = 2*$n;
+    my @nodeval;
+    my @nodeneigh;
+    my %edges;
+
+    for ($i = 0; $i < $gsize; $i++) {
+	$nodeneigh$i = ;
+    }
+
+    %edges = ();
+    foreach $k (@keys) {
+	my ($pf1, $pf2) = prehash($k, $n, $sv);
+	($pf1,$pf2) = ($pf2,$pf1) if ($pf1 > $pf2); # Canonicalize order
+
+	my $pf = "$pf1,$pf2";
+	my $e = ${$href}{$k};
+	my $xkey;
+
+	if (defined($xkey = $edges{$pf})) {
+	    next if ($e == ${$href}{$xkey}); # Duplicate hash, safe to ignore
+	    if (defined($run)) {
+		print STDERR "$run: Collision: $pf: $k with $xkey\n";
+	    }
+	    return;
+	}
+
+	# print STDERR "Edge $pf value $e from $k\n";
+
+	$edges{$pf} = $k;
+	push(@{$nodeneigh$pf1}, $pf2, $e);
+	push(@{$nodeneigh$pf2}, $pf1, $e);
+    }
+
+    # Now we need to assign values to each vertex, so that for each
+    # edge, the sum of the values for the two vertices give the value
+    # for the edge (which is our hash index.)  If we find an impossible
+    # situation, the graph was cyclic.
+    @nodeval = (undef) x $gsize;
+
+    for ($i = 0; $i < $gsize; $i++) {
+	if (scalar(@{$nodeneigh$i})) {
+	    # This vertex has neighbors (is used)
+	    if (!defined($nodeval$i)) {
+		# First vertex in a cluster
+		unless (walk_graph(\@nodeval, \@nodeneigh, $i, 0)) {
+		    if (defined($run)) {
+			print STDERR "$run: Graph is cyclic\n";
+		    }
+		    return;
+		}
+	    }
+	}
+    }
+
+    # for ($i = 0; $i < $n; $i++) {
+    #	print STDERR "Vertex ", $i, ": ", $g$i, "\n";
+    # }
+
+    if (defined($run)) {
+	printf STDERR "$run: Done: n = $n, sv = 0x%08x, 0x%08x\n",
+	$$sv0, $$sv1;
+    }
+
+    return ($n, $sv, \@nodeval);
+}
+
+#
+# Driver for generating the function
+#
+# gen_perfect_hash(\%data)
+#
+sub gen_perfect_hash($) {
+    my($href) = @_;
+    my @keys = keys(%{$href});
+    my @hashinfo;
+    my ($n, $i, $j, $sv, $maxj);
+    my $run = 1;
+
+    # Minimal power of 2 value for N with enough wiggle room.
+    # The scaling constant must be larger than 0.5 in order for the
+    # algorithm to ever terminate. The higher the scaling constant,
+    # the more space does the hash take up, but the less likely is it
+    # that an invalid token will require a string comparison.
+    my $room = int(scalar(@keys)*1.6);
+    $n = 1;
+    while ($n < $room) {
+	$n <<= 1;
+    }
+
+    # Number of times to try...
+    $maxj = scalar @random_sv_vectors;
+
+    for ($i = 0; $i < 4; $i++) {
+	printf STDERR "%d vectors, trying n = %d...\n",
+		scalar @keys, $n;
+	for ($j = 0; $j < $maxj; $j++) {
+	    $sv = $random_sv_vectors$j;
+	    @hashinfo = gen_hash_n($n, $sv, $href, $run++);
+	    return @hashinfo if (@hashinfo);
+	}
+	$n <<= 1;
+    }
+
+    return;
+}
+
+#
+# Verify that the hash table is actually correct...
+#
+sub verify_hash_table($$)
+{
+    my ($href, $hashinfo) = @_;
+    my ($n, $sv, $g) = @{$hashinfo};
+    my $k;
+    my $err = 0;
+
+    foreach $k (keys(%$href)) {
+	my ($pf1, $pf2) = prehash($k, $n, $sv);
+	my $g1 = ${$g}$pf1;
+	my $g2 = ${$g}$pf2;
+
+	if ($g1+$g2 != ${$href}{$k}) {
+	    printf STDERR "%s(%d,%d): %d+%d = %d != %d\n",
+	    $k, $pf1, $pf2, $g1, $g2, $g1+$g2, ${$href}{$k};
+	    $err = 1;
+	} else {
+	    # printf STDERR "%s: %d+%d = %d ok\n",
+	    # $k, $g1, $g2, $g1+$g2;
+	}
+    }
+
+    die "$0: hash validation error\n" if ($err);
+}
+
+1;

_service:tar_scm:nasm-2.16.03.tar.xz/perllib/random_sv_vectors.ph Added

@@ -0,0 +1,67 @@
+@random_sv_vectors = (
+    0x076259c3, 0xe291c26c, 0xaee7ac5c, 0xcabdec91,
+    0x5d3862fb, 0x2e8a3060, 0x6fb3635c, 0x4783593a,
+    0x13f0eafb, 0x407e486a, 0x7436afdd, 0xd04c4829,
+    0xace2d0e4, 0x80575791, 0x2dd9a392, 0xdc1e869e,
+    0x199c3e38, 0x026a9d67, 0x9f911c85, 0x3a489c87,
+    0x9ac31028, 0x0b6e14b2, 0x2ccfbcf9, 0x3f9f2308,
+    0x2e0210fb, 0x392f380f, 0x14ab403a, 0x81a11065,
+    0xd496f63c, 0x53196b13, 0x48a34d7f, 0x2ffc6036,
+    0x34ea8e9d, 0xcd1ed098, 0x2da1a3f2, 0x3d6c23f2,
+    0xca7374da, 0x06054f89, 0xc909a0bb, 0x31d6c0d2,
+    0x87454496, 0x15b360d7, 0x9eebbd12, 0x89532131,
+    0x1119c65b, 0xd9e49705, 0x60c3be0b, 0xd6cc7c8a,
+    0x117723cd, 0x40af090f, 0xfc284f51, 0x3dcf4c06,
+    0xb41fcda4, 0xec03644c, 0xd99e1ea7, 0x84eaf76d,
+    0x534b956a, 0x06d3fb8d, 0x2da4bb09, 0x078092eb,
+    0x6a5be463, 0xbfa51a88, 0xc4e8be95, 0xe7eec27c,
+    0x15a1fbb9, 0xfadc08cd, 0x0bcfab08, 0xbccade0f,
+    0x629f1f6c, 0x90ccede7, 0x5c2b26aa, 0x1f0b1fce,
+    0xdfe0e3fd, 0xbd7c3cfb, 0xa1628ca9, 0x90a05686,
+    0xbf0267f2, 0xd2964139, 0x8009a9b9, 0xd2195918,
+    0xfcc7b5f8, 0xc108c643, 0xf447d4b0, 0x71953863,
+    0x95d091ed, 0xdbe01948, 0x81dec325, 0x2bfecda2,
+    0x2ed2acaa, 0x7eeaa0d0, 0xb7b0a20e, 0x8bf5c01b,
+    0x75eb3917, 0xfd2f758f, 0xb33a5b49, 0x8a8cedf6,
+    0x3aaf2757, 0x69b319a9, 0x32cfa41b, 0xeba36f19,
+    0xf54209dd, 0x941f3a08, 0x232703bb, 0x786a6f84,
+    0x4937b242, 0xc9f07398, 0x74dc5d39, 0x550a58e8,
+    0x6c9aebdc, 0x8fda5069, 0x5ae6d62a, 0x05cd24a3,
+    0x8111e50a, 0xc1c6d19b, 0xb980a92b, 0x448b4d1f,
+    0x568cf58a, 0x8bcb93ca, 0xfe96002f, 0x410cd2f1,
+    0xaf511e45, 0x99e4872f, 0x822c20bc, 0x3db49ddd,
+    0x184fec4e, 0xbb82ec52, 0x30ca5326, 0xf3180297,
+    0x97962aa4, 0x7d4bc6d4, 0x9199a315, 0x8e9f18c6,
+    0xead69a7e, 0x3262a683, 0xe261ec00, 0x81edc47a,
+    0x06080c0e, 0x6d18fa9f, 0x1771ec43, 0x6747ed66,
+    0xe71fe587, 0xe81ad0f3, 0xf083e80c, 0x0898bcd8,
+    0x30328c5a, 0x2efb4ee7, 0xd04fa5d7, 0xec9c9f18,
+    0x87820480, 0x48932224, 0xb1f18815, 0x1b27e3e3,
+    0x79aa440c, 0xdf17a8fc, 0x8a83d404, 0x10fdec8c,
+    0x7d4dfe60, 0x573561ee, 0x60315c7d, 0xa0692af6,
+    0xb3ca4d52, 0x89ca832f, 0x9ebc5c79, 0xa84a28fc,
+    0xdfa76008, 0x7772cf7c, 0xb0e3a15f, 0xbdc35aee,
+    0x6e252b03, 0x32b2107d, 0x20dcc2a3, 0x21987229,
+    0x848e3ad8, 0xe692a0c6, 0xdd07fa50, 0x0b64e1ae,
+    0xc4072bc2, 0x2f120bba, 0xdb3af26e, 0xacab0c48,
+    0xd7d4b59a, 0xcf72a7a7, 0x4628de45, 0x4dfb2750,
+    0x7519211f, 0x4798b536, 0x19984af3, 0xffd2aa19,
+    0x1372d9c0, 0x7512153a, 0x295d19da, 0x497416e5,
+    0x70932c73, 0x8a9bf591, 0xa0960860, 0xfaa7dc61,
+    0xd425f548, 0x43aeda4d, 0xaa2573c7, 0x01a2553d,
+    0x988e71d7, 0xd3c004a4, 0x3da87545, 0x2197af10,
+    0x2f89e592, 0xa686e2fc, 0x7b88018a, 0xae66d575,
+    0x93215591, 0xed69e6ea, 0x4fcacc4a, 0x4d2aba97,
+    0xbedb923b, 0x500b2f1a, 0x0b6d8aa0, 0x232511b0,
+    0x282fb3ee, 0x23695de0, 0x0c455dfe, 0x820cca3f,
+    0xe893868c, 0x87f698f6, 0xb6428730, 0x56e576ce,
+    0xf3843ee7, 0xba79bc28, 0xa1c9ca45, 0x30c479c1,
+    0xbfc244c2, 0xa9af65f0, 0x6eeb88eb, 0x62b4479c,
+    0xcc328fe5, 0x60f5c9bf, 0x31aa2c21, 0xc55575fb,
+    0x9429492d, 0x8e80612a, 0xb12fe59e, 0xf0e1e97b,
+    0xc2501dad, 0x4a9f4bbf, 0x65ae8366, 0x3e8b0983,
+    0xd5fc062a, 0xba74f808, 0x7398cc0a, 0x39a6a269,
+    0x5581dd60, 0xff79d28c, 0xea5e52b3, 0x9be66c71,
+    0x8f6e02a4, 0xe27318b5, 0xe8bceb99, 0xa48a7f2c,
+);
+1;

_service:tar_scm:nasm-2.16.03.tar.xz/stdlib Added

_service:tar_scm:nasm-2.16.03.tar.xz/stdlib/snprintf.c Added

_service:tar_scm:nasm-2.16.03.tar.xz/stdlib/strlcpy.c Added

@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 1998 Todd C. Miller <Todd.Miller@courtesan.com>
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include "compiler.h"
+
+/*
+ * Copy src to string dst of size siz.  At most siz-1 characters
+ * will be copied.  Always NUL terminates (unless siz == 0).
+ * Returns strlen(src); if retval >= siz, truncation occurred.
+ */
+#ifndef HAVE_STRLCPY
+
+size_t strlcpy(char *dst, const char *src, size_t siz)
+{
+    char *d = dst;
+    const char *s = src;
+    size_t n = siz;
+
+    /* Copy as many bytes as will fit */
+    if (n != 0) {
+	while (--n != 0) {
+	    if ((*d++ = *s++) == '\0')
+		break;
+	}
+    }
+
+    /* Not enough room in dst, add NUL and traverse rest of src */
+    if (n == 0) {
+	if (siz != 0)
+	    *d = '\0';		/* NUL-terminate dst */
+	while (*s++)
+	    ;
+    }
+
+    return(s - src - 1);	/* count does not include NUL */
+}
+
+#endif

_service:tar_scm:nasm-2.16.03.tar.xz/stdlib/strnlen.c Added

@@ -0,0 +1,45 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2016 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#include "compiler.h"
+
+#ifndef HAVE_STRNLEN
+
+size_t strnlen(const char *s, size_t maxlen)
+{
+    const char *end = memchr(s, 0, maxlen);
+
+    return end ? (size_t)(end - s) : maxlen;
+}
+
+#endif

_service:tar_scm:nasm-2.16.03.tar.xz/stdlib/strrchrnul.c Added

@@ -0,0 +1,49 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 2017 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+#include "compiler.h"
+
+#ifndef HAVE_STRRCHRNUL
+
+char *strrchrnul(const char *s, int c)
+{
+    char *p;
+
+    p = strrchr(s, c);
+    if (!p)
+        p = strchr(s, '\0');
+
+    return p;
+}
+
+#endif

_service:tar_scm:nasm-2.16.03.tar.xz/stdlib/vsnprintf.c Added

@@ -0,0 +1,46 @@
+/*
+ * vsnprintf()
+ *
+ * Poor substitute for a real vsnprintf() function for systems
+ * that don't have them...
+ */
+
+#include "compiler.h"
+
+
+#include "nasmlib.h"
+#include "error.h"
+
+#if !defined(HAVE_VSNPRINTF) && !defined(HAVE__VSNPRINTF)
+
+#define BUFFER_SIZE     65536   /* Bigger than any string we might print... */
+
+static char snprintf_bufferBUFFER_SIZE;
+
+int vsnprintf(char *str, size_t size, const char *format, va_list ap)
+{
+    int rv, bytes;
+
+    if (size > BUFFER_SIZE) {
+        nasm_panic("vsnprintf: size (%llu) > BUFFER_SIZE (%d)",
+                   (unsigned long long)size, BUFFER_SIZE);
+        size = BUFFER_SIZE;
+    }
+
+    rv = vsprintf(snprintf_buffer, format, ap);
+    if (rv >= BUFFER_SIZE)
+        nasm_panic("vsnprintf buffer overflow");
+
+    if (size > 0) {
+        if ((size_t)rv < size-1)
+            bytes = rv;
+        else
+            bytes = size-1;
+        memcpy(str, snprintf_buffer, bytes);
+        strbytes = '\0';
+    }
+
+    return rv;
+}
+
+#endif

_service:tar_scm:nasm-2.16.03.tar.xz/test Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/Makefile Added

@@ -0,0 +1,113 @@
+.SUFFIXES: .bin .o .o64 .aout .obj .obj64 .exe .asm .lst .pl
+
+NASMDEP = ../nasm
+NASM	= ../nasm
+LISTOPT = -L+
+NASMOPT = -Ox -I../misc $(LISTOPT) $(OPT)
+PERL	= perl
+TESTS	= $(wildcard *.asm)
+RM_F	= rm -f
+RM_RF	= rm -rf
+
+$(NASM):
+	$(MAKE) -C ..
+
+%.bin: %.asm $(NASMDEP)
+	$(NASM) $(NASMOPT) -f bin -o $@ -MD $@.dep -l $@.lst $<
+
+%.ith: %.asm $(NASMDEP)
+	$(NASM) $(NASMOPT) -f ith -o $@ -MD $@.dep -l $@.lst $<
+
+%.srec: %.asm $(NASMDEP)
+	$(NASM) $(NASMOPT) -f srec -o $@ -MD $@.dep -l $@.lst $<
+
+%.o: %.asm $(NASMDEP)
+	$(NASM) $(NASMOPT) -f elf32 -gdwarf -o $@ -MD $@.dep -l $@.lst $<
+
+%.ox: %.asm $(NASMDEP)
+	$(NASM) $(NASMOPT) -f elfx32 -gdwarf -o $@ -MD $@.dep -l $@.lst $<
+
+%.o64: %.asm $(NASMDEP)
+	$(NASM) $(NASMOPT) -f elf64 -gdwarf -o $@ -MD $@.dep -l $@.lst $<
+
+%.aout: %.asm $(NASMDEP)
+	$(NASM) $(NASMOPT) -f aout -o $@ -MD $@.dep -l $@.lst $<
+
+%.obj: %.asm $(NASMDEP)
+	$(NASM) $(NASMOPT) -f obj -gborland -o $@ -MD $@.dep -l $@.lst $<
+
+%.rdf: %.asm $(NASMDEP)
+	$(NASM) $(NASMOPT) -f rdf -o $@ -MD $@.dep -l $@.lst $<
+
+%.od: %.obj ../misc/omfdump
+	../misc/omfdump $< > $@
+
+%.coff: %.asm $(NASMDEP)
+	$(NASM) $(NASMOPT) -f coff -o $@ -MD $@.dep -l $@.lst $<
+
+%.win32: %.asm $(NASMDEP)
+	$(NASM) $(NASMOPT) -f win32 -gcv8 -o $@ -MD $@.dep -l $@.lst $<
+
+%.win64: %.asm $(NASMDEP)
+	$(NASM) $(NASMOPT) -f win64 -gcv8 -o $@ -MD $@.dep -l $@.lst $<
+
+%.mo32: %.asm $(NASMDEP)
+	$(NASM) $(NASMOPT) -f macho32 -gdwarf -o $@ -MD $@.dep -l $@.lst $<
+
+%.mo64: %.asm $(NASMDEP)
+	$(NASM) $(NASMOPT) -f macho64 -gdwarf -o $@ -MD $@.dep -l $@.lst $<
+
+%.dbg: %.asm $(NASMDEP)
+	$(NASM) $(NASMOPT) -f dbg -gdebug -o $@ -MD $@.dep -l $@.lst $<
+
+%.asm: %.pl
+	$(PERL) $< > $@
+
+%.i: %.asm $(NASMDEP)
+	$(NASM) $(NASMOPT) -E -o $@ -MD $@.dep $<
+
+all:
+
+golden: performtest.pl $(TESTS)
+	$(PERL) performtest.pl --golden --nasm='$(NASM)' $(TESTS)
+
+test:	performtest.pl $(NASMDEP) $(TESTS)
+	$(PERL) performtest.pl --nasm='$(NASM)' $(TESTS)
+
+diff:	performtest.pl $(NASMDEP) $(TESTS)
+	$(PERL) performtest.pl --diff --nasm='$(NASM)' $(TESTS)
+
+clean:
+	$(RM_F) *.com *.o *.o64 *.aout *.obj *.win32 *.win64 *.exe *.lst *.bin
+	$(RM_F) *.dbg *.coff *.ith *.srec *.mo32 *.mo64 *.i *.dep *.rdf
+	$(RM_RF) testresults
+	$(RM_F) elftest elftest64
+
+spotless: clean
+	$(RM_RF) golden
+
+#
+# Test for ELF32 shared libraries; assumes an x86 Linux system
+#
+elfso.o: elfso.asm $(NASMDEP)
+	$(NASM) $(NASMOPT) -f elf32 -F stabs -o $@ -MD $@.dep -l $@.lst $<
+
+elfso.so: elfso.o
+	$(LD) -m elf_i386 -shared -o $@ -MD $@.dep $<
+
+elftest: elftest.c elfso.so
+	$(CC) -g -m32 -o $@ -MD $@.dep $^
+	-env LD_LIBRARY_PATH=.:$$LD_LIBRARY_PATH ./elftest
+
+#
+# Test for ELF64 shared libraries; assumes an x86-64 Linux system
+#
+elf64so.o: elf64so.asm $(NASMDEP)
+	$(NASM) $(NASMOPT) -f elf64 -F dwarf -o $@ -MD $@.dep -l $@.lst $<
+
+elf64so.so: elf64so.o
+	$(LD) -shared -o $@ -MD $@.dep $<
+
+elftest64: elftest64.c elf64so.so
+	$(CC) -g -o $@ -MD $@.dep $^
+	-env LD_LIBRARY_PATH=.:$$LD_LIBRARY_PATH ./elftest64

_service:tar_scm:nasm-2.16.03.tar.xz/test/_file_.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/_version.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/a32offs.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/a64.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/absolute.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/addr64x.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/align13.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/align13s.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/alonesym-obj.asm Added

@@ -0,0 +1,166 @@
+;Testname=unoptimized; Arguments=-O0 -fobj -oalonesym-obj.obj; Files=stdout stderr alonesym-obj.obj
+;Testname=optimized; Arguments=-Ox -fobj -oalonesym-obj.obj; Files=stdout stderr alonesym-obj.obj
+
+section         DOS32DATA align=16 public use32 FLAT class=DOS32DATA
+
+                global sym0000
+                global sym0001
+                global sym0002
+                global sym0003
+                global sym0004
+                global sym0005
+                global sym0006
+                global sym0007
+                global sym0008
+                global sym0009
+                global sym0010
+                global sym0011
+                global sym0012
+                global sym0013
+                global sym0014
+                global sym0015
+                global sym0016
+                global sym0017
+                global sym0018
+                global sym0019
+                global sym0020
+                global sym0021
+                global sym0022
+                global sym0023
+                global sym0024
+                global sym0025
+                global sym0026
+                global sym0027
+                global sym0028
+                global sym0029
+                global sym0030
+                global sym0031
+                global sym0032
+                global sym0033
+                global sym0034
+                global sym0035
+                global sym0036
+                global sym0037
+                global sym0038
+                global sym0039
+                global sym0040
+                global sym0041
+                global sym0042
+                global sym0043
+                global sym0044
+                global sym0045
+                global sym0046
+                global sym0047
+                global sym0048
+                global sym0049
+                global sym0050
+                global sym0051
+                global sym0052
+                global sym0053
+                global sym0054
+                global sym0055
+                global sym0056
+                global sym0057
+                global sym0058
+                global sym0059
+                global sym0060
+                global sym0061
+                global sym0062
+                global sym0063
+                global sym0064
+                global sym0065
+                global sym0066
+                global sym0067
+                global sym0068
+                global sym0069
+                global sym0070
+                global sym0071
+                global sym0072
+                global sym0073
+                global sym0074
+                global sym0075
+                global sym0076
+                global sym0077
+                global s
+
+
+                resb 20000h
+sym0000         resd 1
+sym0001         resd 1
+sym0002         resd 1
+sym0003         resd 1
+sym0004         resd 1
+sym0005         resd 1
+sym0006         resd 1
+sym0007         resd 1
+sym0008         resd 1
+sym0009         resd 1
+sym0010         resd 1
+sym0011         resd 1
+sym0012         resd 1
+sym0013         resd 1
+sym0014         resd 1
+sym0015         resd 1
+sym0016         resd 1
+sym0017         resd 1
+sym0018         resd 1
+sym0019         resd 1
+sym0020         resd 1
+sym0021         resd 1
+sym0022         resd 1
+sym0023         resd 1
+sym0024         resd 1
+sym0025         resd 1
+sym0026         resd 1
+sym0027         resd 1
+sym0028         resd 1
+sym0029         resd 1
+sym0030         resd 1
+sym0031         resd 1
+sym0032         resd 1
+sym0033         resd 1
+sym0034         resd 1
+sym0035         resd 1
+sym0036         resd 1
+sym0037         resd 1
+sym0038         resd 1
+sym0039         resd 1
+sym0040         resd 1
+sym0041         resd 1
+sym0042         resd 1
+sym0043         resd 1
+sym0044         resd 1
+sym0045         resd 1
+sym0046         resd 1
+sym0047         resd 1
+sym0048         resd 1
+sym0049         resd 1
+sym0050         resd 1
+sym0051         resd 1
+sym0052         resd 1
+sym0053         resd 1
+sym0054         resd 1
+sym0055         resd 1
+sym0056         resd 1
+sym0057         resd 1
+sym0058         resd 1
+sym0059         resd 1
+sym0060         resd 1
+sym0061         resd 1
+sym0062         resd 1
+sym0063         resd 1
+sym0064         resd 1
+sym0065         resd 1
+sym0066         resd 1
+sym0067         resd 1
+sym0068         resd 1
+sym0069         resd 1
+sym0070         resd 1
+sym0071         resd 1
+sym0072         resd 1
+sym0073         resd 1
+sym0074         resd 1
+sym0075         resd 1
+sym0076         resd 1
+sym0077         resd 1
+s               resd 1

_service:tar_scm:nasm-2.16.03.tar.xz/test/amx.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/andbyte.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/aoutso.asm Added

@@ -0,0 +1,99 @@
+;Testname=unoptimized; Arguments=-O0 -faoutb -oaoutso.o; Files=stdout stderr aoutso.o
+;Testname=optimized;   Arguments=-Ox -faoutb -oaoutso.o; Files=stdout stderr aoutso.o
+
+; test source file for assembling to NetBSD/FreeBSD a.out shared library
+; build with:
+;    nasm -f aoutb aoutso.asm
+;    ld -Bshareable -o aoutso.so aoutso.o
+; test with:
+;    cc -o aoutso aouttest.c aoutso.so
+;    ./aoutso
+
+; This file should test the following:
+; 1 Define and export a global text-section symbol
+; 2 Define and export a global data-section symbol
+; 3 Define and export a global BSS-section symbol
+; 4 Define a non-global text-section symbol
+; 5 Define a non-global data-section symbol
+; 6 Define a non-global BSS-section symbol
+; 7 Define a COMMON symbol
+; 8 Define a NASM local label
+; 9 Reference a NASM local label
+; 10 Import an external symbol
+; 11 Make a PC-relative call to an external symbol
+; 12 Reference a text-section symbol in the text section
+; 13 Reference a data-section symbol in the text section
+; 14 Reference a BSS-section symbol in the text section
+; 15 Reference a text-section symbol in the data section
+; 16 Reference a data-section symbol in the data section
+; 17 Reference a BSS-section symbol in the data section
+
+	  BITS 32
+	  EXTERN __GLOBAL_OFFSET_TABLE_
+	  GLOBAL _lrotate:function ; 1
+	  GLOBAL _greet:function ; 1
+	  GLOBAL _asmstr:data _asmstr.end-_asmstr ; 2
+	  GLOBAL _textptr:data 4 ; 2
+	  GLOBAL _selfptr:data 4 ; 2
+	  GLOBAL _integer:data 4 ; 3
+	  EXTERN _printf	; 10
+	  COMMON _commvar 4	; 7
+
+	  SECTION .text
+
+; prototype: long lrotate(long x, int num);
+_lrotate:			; 1
+	  push ebp
+	  mov ebp,esp
+	  mov eax,ebp+8
+	  mov ecx,ebp+12
+.label	  rol eax,1		; 4 8
+	  loop .label		; 9 12
+	  mov esp,ebp
+	  pop ebp
+	  ret
+
+; prototype: void greet(void);
+_greet	  push ebx		; we'll use EBX for GOT, so save it
+	  call .getgot
+.getgot:  pop ebx
+	  add ebx,__GLOBAL_OFFSET_TABLE_ + $$ - .getgot wrt ..gotpc
+	  mov eax,ebx+_integer wrt ..got ; 14
+	  mov eax,eax
+	  inc eax
+	  mov ebx+localint wrt ..gotoff,eax ; 14
+	  mov eax,ebx+_commvar wrt ..got
+	  push dword eax
+	  mov eax,ebx+localptr wrt ..gotoff ; 13
+	  push dword eax
+	  mov eax,ebx+_integer wrt ..got ; 1 14
+	  push dword eax
+	  lea eax,ebx+_printfstr wrt ..gotoff
+	  push eax		; 13
+	  call _printf wrt ..plt ; 11
+	  add esp,16
+	  pop ebx
+	  ret
+
+	  SECTION .data
+
+; a string
+_asmstr	  db 'hello, world', 0	; 2
+.end
+
+; a string for Printf
+_printfstr db "integer==%d, localint==%d, commvar=%d"
+	  db 10, 0
+
+; some pointers
+localptr  dd localint		; 5 17
+_textptr  dd _greet wrt ..sym	; 15
+_selfptr  dd _selfptr wrt ..sym	; 16
+
+	  SECTION .bss
+
+; an integer
+_integer  resd 1		; 3
+
+; a local integer
+localint  resd 1		; 6

_service:tar_scm:nasm-2.16.03.tar.xz/test/aouttest.asm Added

@@ -0,0 +1,86 @@
+;Testname=unoptimized; Arguments=-O0 -faout -oaouttest.o; Files=stdout stderr aouttest.o
+;Testname=optimized;   Arguments=-Ox -faout -oaouttest.o; Files=stdout stderr aouttest.o
+
+; test source file for assembling to a.out
+; build with:
+;    nasm -f aout aouttest.asm
+;    gcc -o aouttest aouttest.c aouttest.o
+; (assuming your gcc is a.out)
+
+; This file should test the following:
+; 1 Define and export a global text-section symbol
+; 2 Define and export a global data-section symbol
+; 3 Define and export a global BSS-section symbol
+; 4 Define a non-global text-section symbol
+; 5 Define a non-global data-section symbol
+; 6 Define a non-global BSS-section symbol
+; 7 Define a COMMON symbol
+; 8 Define a NASM local label
+; 9 Reference a NASM local label
+; 10 Import an external symbol
+; 11 Make a PC-relative call to an external symbol
+; 12 Reference a text-section symbol in the text section
+; 13 Reference a data-section symbol in the text section
+; 14 Reference a BSS-section symbol in the text section
+; 15 Reference a text-section symbol in the data section
+; 16 Reference a data-section symbol in the data section
+; 17 Reference a BSS-section symbol in the data section
+
+	  BITS 32
+	  GLOBAL _lrotate	; 1
+	  GLOBAL _greet		; 1
+	  GLOBAL _asmstr	; 2
+	  GLOBAL _textptr	; 2
+	  GLOBAL _selfptr	; 2
+	  GLOBAL _integer	; 3
+	  EXTERN _printf	; 10
+	  COMMON _commvar 4	; 7
+
+	  SECTION .text
+
+; prototype: long lrotate(long x, int num);
+_lrotate:			; 1
+	  push ebp
+	  mov ebp,esp
+	  mov eax,ebp+8
+	  mov ecx,ebp+12
+.label	  rol eax,1		; 4 8
+	  loop .label		; 9 12
+	  mov esp,ebp
+	  pop ebp
+	  ret
+
+; prototype: void greet(void);
+_greet	  mov eax,_integer	; 14
+	  inc eax
+	  mov localint,eax	; 14
+	  push dword _commvar
+	  mov eax,localptr	; 13
+	  push dword eax
+	  push dword _integer	; 1 14
+	  push dword _printfstr	; 13
+	  call _printf		; 11
+	  add esp,16
+	  ret
+
+	  SECTION .data
+
+; a string
+_asmstr	  db 'hello, world', 0	; 2
+
+; a string for Printf
+_printfstr db "integer==%d, localint==%d, commvar=%d"
+	  db 10, 0
+
+; some pointers
+localptr  dd localint		; 5 17
+_textptr  dd _greet		; 15
+_selfptr  dd _selfptr		; 16
+
+	  SECTION .bss
+
+; an integer
+_integer  resd 1		; 3
+
+; a local integer
+localint  resd 1		; 6

_service:tar_scm:nasm-2.16.03.tar.xz/test/aouttest.c Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/avx.asm Added

@@ -0,0 +1,46 @@
+;Testname=unoptimized; Arguments=-O0 -fbin -oavx.bin; Files=stdout stderr avx.bin
+;Testname=optimized;   Arguments=-Ox -fbin -oavx.bin; Files=stdout stderr avx.bin
+
+		bits 64
+		blendvpd	xmm2,xmm1,xmm0
+
+		vblendvpd	xmm2,xmm1,xmm0,xmm0
+		vblendvpd	xmm2,xmm1,xmm0
+		vblendvpd	ymm2,ymm1,ymm0,ymm0
+		vblendvpd	ymm2,ymm1,ymm0
+
+		vcvtsi2sd	xmm9,xmm10,ecx
+		vcvtsi2sd	xmm9,xmm10,rcx
+		vcvtsi2sd	xmm9,xmm10,dword rdi
+		vcvtsi2sd	xmm9,xmm10,qword rdi
+
+		vpextrb		rax,xmm1,0x33
+		vpextrw		rax,xmm1,0x33
+		vpextrd		rax,xmm1,0x33
+		vpextrq		rax,xmm1,0x33
+		vpextrb		rax,xmm1,0x33
+		vpextrw		rax,xmm1,0x33
+		vpextrd		rax,xmm1,0x33
+		vpextrq		rax,xmm1,0x33
+		vpextrb		eax,xmm1,0x33
+		vpextrw		eax,xmm1,0x33
+		vpextrd		eax,xmm1,0x33
+;		vpextrq		eax,xmm1,0x33
+
+		vcvtpd2ps	xmm0,xmm1
+		vcvtpd2ps	xmm0,oword rsi
+		vcvtpd2ps	xmm0,ymm1
+		vcvtpd2ps	xmm0,yword rsi
+;		vcvtpd2ps	xmm0,rsi
+
+		vcvtpd2dq	xmm0,xmm1
+		vcvtpd2dq	xmm0,oword rsi
+		vcvtpd2dq	xmm0,ymm1
+		vcvtpd2dq	xmm0,yword rsi
+;		vcvtpd2dq	xmm0,rsi
+
+		vcvttpd2dq	xmm0,xmm1
+		vcvttpd2dq	xmm0,oword rsi
+		vcvttpd2dq	xmm0,ymm1
+		vcvttpd2dq	xmm0,yword rsi
+;		vcvttpd2dq	xmm0,rsi

_service:tar_scm:nasm-2.16.03.tar.xz/test/avx005.asm Added

@@ -0,0 +1,529 @@
+;Testname=avx005; Arguments=-fbin -oavx005.bin -Ox; Files=stdout stderr avx005.bin
+
+%define regxmm xmm0
+%define regymm ymm0
+%define mem 0
+%define imm 3
+
+%macro x 1+.nolist
+ %1 ; comment this line if RELAXed variants are not supported
+%endmacro
+
+  VFMADDSUB132PS regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMADDSUB132PS regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMADDSUB132PS regymm,regymm,mem        ; VEX_FMA,SY
+  VFMADDSUB132PS regymm,regymm,regymm     ; VEX_FMA
+
+x VFMADDSUB312PS regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMADDSUB312PS regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMADDSUB312PS regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMADDSUB312PS regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMADDSUB132PD regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMADDSUB132PD regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMADDSUB132PD regymm,regymm,mem        ; VEX_FMA,SY
+  VFMADDSUB132PD regymm,regymm,regymm     ; VEX_FMA
+
+x VFMADDSUB312PD regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMADDSUB312PD regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMADDSUB312PD regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMADDSUB312PD regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMSUBADD132PS regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMSUBADD132PS regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMSUBADD132PS regymm,regymm,mem        ; VEX_FMA,SY
+  VFMSUBADD132PS regymm,regymm,regymm     ; VEX_FMA
+
+x VFMSUBADD312PS regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMSUBADD312PS regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMSUBADD312PS regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMSUBADD312PS regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMSUBADD132PD regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMSUBADD132PD regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMSUBADD132PD regymm,regymm,mem        ; VEX_FMA,SY
+  VFMSUBADD132PD regymm,regymm,regymm     ; VEX_FMA
+
+x VFMSUBADD312PD regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMSUBADD312PD regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMSUBADD312PD regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMSUBADD312PD regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMADD132PS    regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMADD132PS    regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMADD132PS    regymm,regymm,mem        ; VEX_FMA,SY
+  VFMADD132PS    regymm,regymm,regymm     ; VEX_FMA
+
+x VFMADD312PS    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMADD312PS    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMADD312PS    regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMADD312PS    regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMADD132PD    regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMADD132PD    regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMADD132PD    regymm,regymm,mem        ; VEX_FMA,SY
+  VFMADD132PD    regymm,regymm,regymm     ; VEX_FMA
+
+x VFMADD312PD    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMADD312PD    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMADD312PD    regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMADD312PD    regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMADD132SS    regxmm,regxmm,mem        ; VEX_FMA,SD
+  VFMADD132SS    regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFMADD312SS    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SD
+x VFMADD312SS    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFMADD132SD    regxmm,regxmm,mem        ; VEX_FMA,SQ
+  VFMADD132SD    regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFMADD312SD    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SQ
+x VFMADD312SD    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFMSUB132PS    regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMSUB132PS    regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMSUB132PS    regymm,regymm,mem        ; VEX_FMA,SY
+  VFMSUB132PS    regymm,regymm,regymm     ; VEX_FMA
+
+x VFMSUB312PS    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMSUB312PS    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMSUB312PS    regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMSUB312PS    regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMSUB132PD    regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMSUB132PD    regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMSUB132PD    regymm,regymm,mem        ; VEX_FMA,SY
+  VFMSUB132PD    regymm,regymm,regymm     ; VEX_FMA
+
+x VFMSUB312PD    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMSUB312PD    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMSUB312PD    regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMSUB312PD    regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMSUB132SS    regxmm,regxmm,mem        ; VEX_FMA,SD
+  VFMSUB132SS    regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFMSUB312SS    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SD
+x VFMSUB312SS    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFMSUB132SD    regxmm,regxmm,mem        ; VEX_FMA,SQ
+  VFMSUB132SD    regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFMSUB312SD    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SQ
+x VFMSUB312SD    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFNMADD132PS   regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFNMADD132PS   regxmm,regxmm,regxmm     ; VEX_FMA
+  VFNMADD132PS   regymm,regymm,mem        ; VEX_FMA,SY
+  VFNMADD132PS   regymm,regymm,regymm     ; VEX_FMA
+
+x VFNMADD312PS   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFNMADD312PS   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFNMADD312PS   regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFNMADD312PS   regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFNMADD132PD   regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFNMADD132PD   regxmm,regxmm,regxmm     ; VEX_FMA
+  VFNMADD132PD   regymm,regymm,mem        ; VEX_FMA,SY
+  VFNMADD132PD   regymm,regymm,regymm     ; VEX_FMA
+
+x VFNMADD312PD   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFNMADD312PD   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFNMADD312PD   regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFNMADD312PD   regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFNMADD132SS   regxmm,regxmm,mem        ; VEX_FMA,SD
+  VFNMADD132SS   regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFNMADD312SS   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SD
+x VFNMADD312SS   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFNMADD132SD   regxmm,regxmm,mem        ; VEX_FMA,SQ
+  VFNMADD132SD   regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFNMADD312SD   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SQ
+x VFNMADD312SD   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFNMSUB132PS   regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFNMSUB132PS   regxmm,regxmm,regxmm     ; VEX_FMA
+  VFNMSUB132PS   regymm,regymm,mem        ; VEX_FMA,SY
+  VFNMSUB132PS   regymm,regymm,regymm     ; VEX_FMA
+
+x VFNMSUB312PS   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFNMSUB312PS   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFNMSUB312PS   regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFNMSUB312PS   regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFNMSUB132PD   regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFNMSUB132PD   regxmm,regxmm,regxmm     ; VEX_FMA
+  VFNMSUB132PD   regymm,regymm,mem        ; VEX_FMA,SY
+  VFNMSUB132PD   regymm,regymm,regymm     ; VEX_FMA
+
+x VFNMSUB312PD   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFNMSUB312PD   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFNMSUB312PD   regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFNMSUB312PD   regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFNMSUB132SS   regxmm,regxmm,mem        ; VEX_FMA,SD
+  VFNMSUB132SS   regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFNMSUB312SS   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SD
+x VFNMSUB312SS   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFNMSUB132SD   regxmm,regxmm,mem        ; VEX_FMA,SQ
+  VFNMSUB132SD   regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFNMSUB312SD   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SQ
+x VFNMSUB312SD   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFMADDSUB213PS regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMADDSUB213PS regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMADDSUB213PS regymm,regymm,mem        ; VEX_FMA,SY
+  VFMADDSUB213PS regymm,regymm,regymm     ; VEX_FMA
+
+x VFMADDSUB123PS regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMADDSUB123PS regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMADDSUB123PS regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMADDSUB123PS regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMADDSUB213PD regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMADDSUB213PD regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMADDSUB213PD regymm,regymm,mem        ; VEX_FMA,SY
+  VFMADDSUB213PD regymm,regymm,regymm     ; VEX_FMA
+
+x VFMADDSUB123PD regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMADDSUB123PD regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMADDSUB123PD regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMADDSUB123PD regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMSUBADD213PS regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMSUBADD213PS regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMSUBADD213PS regymm,regymm,mem        ; VEX_FMA,SY
+  VFMSUBADD213PS regymm,regymm,regymm     ; VEX_FMA
+
+x VFMSUBADD123PS regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMSUBADD123PS regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMSUBADD123PS regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMSUBADD123PS regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMSUBADD213PD regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMSUBADD213PD regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMSUBADD213PD regymm,regymm,mem        ; VEX_FMA,SY
+  VFMSUBADD213PD regymm,regymm,regymm     ; VEX_FMA
+
+x VFMSUBADD123PD regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMSUBADD123PD regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMSUBADD123PD regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMSUBADD123PD regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMADD213PS    regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMADD213PS    regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMADD213PS    regymm,regymm,mem        ; VEX_FMA,SY
+  VFMADD213PS    regymm,regymm,regymm     ; VEX_FMA
+
+x VFMADD123PS    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMADD123PS    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMADD123PS    regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMADD123PS    regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMADD213PD    regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMADD213PD    regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMADD213PD    regymm,regymm,mem        ; VEX_FMA,SY
+  VFMADD213PD    regymm,regymm,regymm     ; VEX_FMA
+
+x VFMADD123PD    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMADD123PD    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMADD123PD    regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMADD123PD    regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMADD213SS    regxmm,regxmm,mem        ; VEX_FMA,SD
+  VFMADD213SS    regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFMADD123SS    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SD
+x VFMADD123SS    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFMADD213SD    regxmm,regxmm,mem        ; VEX_FMA,SQ
+  VFMADD213SD    regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFMADD123SD    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SQ
+x VFMADD123SD    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFMSUB213PS    regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMSUB213PS    regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMSUB213PS    regymm,regymm,mem        ; VEX_FMA,SY
+  VFMSUB213PS    regymm,regymm,regymm     ; VEX_FMA
+
+x VFMSUB123PS    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMSUB123PS    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMSUB123PS    regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMSUB123PS    regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMSUB213PD    regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMSUB213PD    regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMSUB213PD    regymm,regymm,mem        ; VEX_FMA,SY
+  VFMSUB213PD    regymm,regymm,regymm     ; VEX_FMA
+
+x VFMSUB123PD    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMSUB123PD    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMSUB123PD    regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMSUB123PD    regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMSUB213SS    regxmm,regxmm,mem        ; VEX_FMA,SD
+  VFMSUB213SS    regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFMSUB123SS    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SD
+x VFMSUB123SS    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFMSUB213SD    regxmm,regxmm,mem        ; VEX_FMA,SQ
+  VFMSUB213SD    regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFMSUB123SD    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SQ
+x VFMSUB123SD    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFNMADD213PS   regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFNMADD213PS   regxmm,regxmm,regxmm     ; VEX_FMA
+  VFNMADD213PS   regymm,regymm,mem        ; VEX_FMA,SY
+  VFNMADD213PS   regymm,regymm,regymm     ; VEX_FMA
+
+x VFNMADD123PS   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFNMADD123PS   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFNMADD123PS   regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFNMADD123PS   regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFNMADD213PD   regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFNMADD213PD   regxmm,regxmm,regxmm     ; VEX_FMA
+  VFNMADD213PD   regymm,regymm,mem        ; VEX_FMA,SY
+  VFNMADD213PD   regymm,regymm,regymm     ; VEX_FMA
+
+x VFNMADD123PD   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFNMADD123PD   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFNMADD123PD   regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFNMADD123PD   regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFNMADD213SS   regxmm,regxmm,mem        ; VEX_FMA,SD
+  VFNMADD213SS   regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFNMADD123SS   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SD
+x VFNMADD123SS   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFNMADD213SD   regxmm,regxmm,mem        ; VEX_FMA,SQ
+  VFNMADD213SD   regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFNMADD123SD   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SQ
+x VFNMADD123SD   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFNMSUB213PS   regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFNMSUB213PS   regxmm,regxmm,regxmm     ; VEX_FMA
+  VFNMSUB213PS   regymm,regymm,mem        ; VEX_FMA,SY
+  VFNMSUB213PS   regymm,regymm,regymm     ; VEX_FMA
+
+x VFNMSUB123PS   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFNMSUB123PS   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFNMSUB123PS   regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFNMSUB123PS   regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFNMSUB213PD   regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFNMSUB213PD   regxmm,regxmm,regxmm     ; VEX_FMA
+  VFNMSUB213PD   regymm,regymm,mem        ; VEX_FMA,SY
+  VFNMSUB213PD   regymm,regymm,regymm     ; VEX_FMA
+
+x VFNMSUB123PD   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFNMSUB123PD   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFNMSUB123PD   regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFNMSUB123PD   regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFNMSUB213SS   regxmm,regxmm,mem        ; VEX_FMA,SD
+  VFNMSUB213SS   regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFNMSUB123SS   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SD
+x VFNMSUB123SS   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFNMSUB213SD   regxmm,regxmm,mem        ; VEX_FMA,SQ
+  VFNMSUB213SD   regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFNMSUB123SD   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SQ
+x VFNMSUB123SD   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFMADDSUB231PS regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMADDSUB231PS regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMADDSUB231PS regymm,regymm,mem        ; VEX_FMA,SY
+  VFMADDSUB231PS regymm,regymm,regymm     ; VEX_FMA
+
+x VFMADDSUB321PS regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMADDSUB321PS regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMADDSUB321PS regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMADDSUB321PS regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMADDSUB231PD regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMADDSUB231PD regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMADDSUB231PD regymm,regymm,mem        ; VEX_FMA,SY
+  VFMADDSUB231PD regymm,regymm,regymm     ; VEX_FMA
+
+x VFMADDSUB321PD regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMADDSUB321PD regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMADDSUB321PD regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMADDSUB321PD regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMSUBADD231PS regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMSUBADD231PS regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMSUBADD231PS regymm,regymm,mem        ; VEX_FMA,SY
+  VFMSUBADD231PS regymm,regymm,regymm     ; VEX_FMA
+
+x VFMSUBADD321PS regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMSUBADD321PS regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMSUBADD321PS regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMSUBADD321PS regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMSUBADD231PD regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMSUBADD231PD regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMSUBADD231PD regymm,regymm,mem        ; VEX_FMA,SY
+  VFMSUBADD231PD regymm,regymm,regymm     ; VEX_FMA
+
+x VFMSUBADD321PD regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMSUBADD321PD regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMSUBADD321PD regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMSUBADD321PD regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMADD231PS    regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMADD231PS    regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMADD231PS    regymm,regymm,mem        ; VEX_FMA,SY
+  VFMADD231PS    regymm,regymm,regymm     ; VEX_FMA
+
+x VFMADD321PS    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMADD321PS    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMADD321PS    regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMADD321PS    regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMADD231PD    regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMADD231PD    regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMADD231PD    regymm,regymm,mem        ; VEX_FMA,SY
+  VFMADD231PD    regymm,regymm,regymm     ; VEX_FMA
+
+x VFMADD321PD    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMADD321PD    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMADD321PD    regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMADD321PD    regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMADD231SS    regxmm,regxmm,mem        ; VEX_FMA,SD
+  VFMADD231SS    regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFMADD321SS    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SD
+x VFMADD321SS    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFMADD231SD    regxmm,regxmm,mem        ; VEX_FMA,SQ
+  VFMADD231SD    regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFMADD321SD    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SQ
+x VFMADD321SD    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFMSUB231PS    regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMSUB231PS    regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMSUB231PS    regymm,regymm,mem        ; VEX_FMA,SY
+  VFMSUB231PS    regymm,regymm,regymm     ; VEX_FMA
+
+x VFMSUB321PS    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMSUB321PS    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMSUB321PS    regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMSUB321PS    regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMSUB231PD    regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMSUB231PD    regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMSUB231PD    regymm,regymm,mem        ; VEX_FMA,SY
+  VFMSUB231PD    regymm,regymm,regymm     ; VEX_FMA
+
+x VFMSUB321PD    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMSUB321PD    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMSUB321PD    regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMSUB321PD    regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMSUB231SS    regxmm,regxmm,mem        ; VEX_FMA,SD
+  VFMSUB231SS    regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFMSUB321SS    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SD
+x VFMSUB321SS    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFMSUB231SD    regxmm,regxmm,mem        ; VEX_FMA,SQ
+  VFMSUB231SD    regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFMSUB321SD    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SQ
+x VFMSUB321SD    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFNMADD231PS   regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFNMADD231PS   regxmm,regxmm,regxmm     ; VEX_FMA
+  VFNMADD231PS   regymm,regymm,mem        ; VEX_FMA,SY
+  VFNMADD231PS   regymm,regymm,regymm     ; VEX_FMA
+
+x VFNMADD321PS   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFNMADD321PS   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFNMADD321PS   regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFNMADD321PS   regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFNMADD231PD   regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFNMADD231PD   regxmm,regxmm,regxmm     ; VEX_FMA
+  VFNMADD231PD   regymm,regymm,mem        ; VEX_FMA,SY
+  VFNMADD231PD   regymm,regymm,regymm     ; VEX_FMA
+
+x VFNMADD321PD   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFNMADD321PD   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFNMADD321PD   regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFNMADD321PD   regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFNMADD231SS   regxmm,regxmm,mem        ; VEX_FMA,SD
+  VFNMADD231SS   regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFNMADD321SS   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SD
+x VFNMADD321SS   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFNMADD231SD   regxmm,regxmm,mem        ; VEX_FMA,SQ
+  VFNMADD231SD   regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFNMADD321SD   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SQ
+x VFNMADD321SD   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFNMSUB231PS   regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFNMSUB231PS   regxmm,regxmm,regxmm     ; VEX_FMA
+  VFNMSUB231PS   regymm,regymm,mem        ; VEX_FMA,SY
+  VFNMSUB231PS   regymm,regymm,regymm     ; VEX_FMA
+
+x VFNMSUB321PS   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFNMSUB321PS   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFNMSUB321PS   regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFNMSUB321PS   regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFNMSUB231PD   regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFNMSUB231PD   regxmm,regxmm,regxmm     ; VEX_FMA
+  VFNMSUB231PD   regymm,regymm,mem        ; VEX_FMA,SY
+  VFNMSUB231PD   regymm,regymm,regymm     ; VEX_FMA
+
+x VFNMSUB321PD   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFNMSUB321PD   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFNMSUB321PD   regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFNMSUB321PD   regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFNMSUB231SS   regxmm,regxmm,mem        ; VEX_FMA,SD
+  VFNMSUB231SS   regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFNMSUB321SS   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SD
+x VFNMSUB321SS   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFNMSUB231SD   regxmm,regxmm,mem        ; VEX_FMA,SQ
+  VFNMSUB231SD   regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFNMSUB321SD   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SQ
+x VFNMSUB321SD   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VPCLMULLQLQDQ  regxmm,regxmm,mem        ; PCLMUL,VEX_AVX,SO
+  VPCLMULLQLQDQ  regxmm,regxmm,regxmm     ; PCLMUL,VEX_AVX
+  VPCLMULHQLQDQ  regxmm,regxmm,mem        ; PCLMUL,VEX_AVX,SO
+  VPCLMULHQLQDQ  regxmm,regxmm,regxmm     ; PCLMUL,VEX_AVX
+  VPCLMULLQHQDQ  regxmm,regxmm,mem        ; PCLMUL,VEX_AVX,SO
+  VPCLMULLQHQDQ  regxmm,regxmm,regxmm     ; PCLMUL,VEX_AVX
+  VPCLMULHQHQDQ  regxmm,regxmm,mem        ; PCLMUL,VEX_AVX,SO
+  VPCLMULHQHQDQ  regxmm,regxmm,regxmm     ; PCLMUL,VEX_AVX
+  VPCLMULQDQ     regxmm,regxmm,mem,imm    ; PCLMUL,VEX_AVX,SB3,SO
+  VPCLMULQDQ     regxmm,regxmm,regxmm,imm ; PCLMUL,VEX_AVX,SB3
+
+; EOF
+
+

_service:tar_scm:nasm-2.16.03.tar.xz/test/avx2.asm Added

@@ -0,0 +1,1608 @@
+; AVX testcases from gas
+;------------------------
+
+;
+; This file is taken from there
+;     http://sourceware.org/ml/binutils/2011-06/msg00150.html
+; So the original author is "H.J. Lu" <hongjiu dot lu at intel dot com>
+;
+; nasm64developer adopted it for the nasm testing suite
+
+%macro testcase 2
+ %ifdef BIN
+  db %1
+ %endif
+ %ifdef SRC
+  %2
+ %endif
+%endmacro
+
+bits 32
+
+; b/gas/testsuite/gas/i386/avx-gather-intel.d
+testcase	{ 0xc4, 0xe2, 0xe9, 0x92, 0x4c, 0x7d, 0x00			}, { vgatherdpd xmm1,QWORD ebp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0xe9, 0x93, 0x4c, 0x7d, 0x00			}, { vgatherqpd xmm1,QWORD ebp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0xed, 0x92, 0x4c, 0x7d, 0x00			}, { vgatherdpd ymm1,QWORD ebp+xmm7*2+0x0,ymm2	}
+testcase	{ 0xc4, 0xe2, 0xed, 0x93, 0x4c, 0x7d, 0x00			}, { vgatherqpd ymm1,QWORD ebp+ymm7*2+0x0,ymm2	}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0x25, 0x08, 0x00, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm4*1+0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0x25, 0xf8, 0xff, 0xff, 0xff	}, { vgatherdpd ymm6,QWORD xmm4*1-0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0x25, 0x00, 0x00, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm4*1+0x0,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0x25, 0x98, 0x02, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm4*1+0x298,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0xe5, 0x08, 0x00, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm4*8+0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0xe5, 0xf8, 0xff, 0xff, 0xff	}, { vgatherdpd ymm6,QWORD xmm4*8-0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0xe5, 0x00, 0x00, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm4*8+0x0,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0xe5, 0x98, 0x02, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm4*8+0x298,ymm5		}
+testcase	{ 0xc4, 0xe2, 0x69, 0x92, 0x4c, 0x7d, 0x00			}, { vgatherdps xmm1,DWORD ebp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0x69, 0x93, 0x4c, 0x7d, 0x00			}, { vgatherqps xmm1,DWORD ebp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0x6d, 0x92, 0x4c, 0x7d, 0x00			}, { vgatherdps ymm1,DWORD ebp+ymm7*2+0x0,ymm2	}
+testcase	{ 0xc4, 0xe2, 0x6d, 0x93, 0x4c, 0x7d, 0x00			}, { vgatherqps xmm1,DWORD ebp+ymm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0x25, 0x08, 0x00, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm4*1+0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0x25, 0xf8, 0xff, 0xff, 0xff	}, { vgatherdps xmm6,DWORD xmm4*1-0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0x25, 0x00, 0x00, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm4*1+0x0,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0x25, 0x98, 0x02, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm4*1+0x298,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0xe5, 0x08, 0x00, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm4*8+0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0xe5, 0xf8, 0xff, 0xff, 0xff	}, { vgatherdps xmm6,DWORD xmm4*8-0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0xe5, 0x00, 0x00, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm4*8+0x0,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0xe5, 0x98, 0x02, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm4*8+0x298,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x69, 0x90, 0x4c, 0x7d, 0x00			}, { vpgatherdd xmm1,DWORD ebp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0x69, 0x91, 0x4c, 0x7d, 0x00			}, { vpgatherqd xmm1,DWORD ebp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0x6d, 0x90, 0x4c, 0x7d, 0x00			}, { vpgatherdd ymm1,DWORD ebp+ymm7*2+0x0,ymm2	}
+testcase	{ 0xc4, 0xe2, 0x6d, 0x91, 0x4c, 0x7d, 0x00			}, { vpgatherqd xmm1,DWORD ebp+ymm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0x25, 0x08, 0x00, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm4*1+0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0x25, 0xf8, 0xff, 0xff, 0xff	}, { vpgatherdd xmm6,DWORD xmm4*1-0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0x25, 0x00, 0x00, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm4*1+0x0,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0x25, 0x98, 0x02, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm4*1+0x298,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0xe5, 0x08, 0x00, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm4*8+0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0xe5, 0xf8, 0xff, 0xff, 0xff	}, { vpgatherdd xmm6,DWORD xmm4*8-0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0xe5, 0x00, 0x00, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm4*8+0x0,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0xe5, 0x98, 0x02, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm4*8+0x298,xmm5		}
+testcase	{ 0xc4, 0xe2, 0xe9, 0x90, 0x4c, 0x7d, 0x00			}, { vpgatherdq xmm1,QWORD ebp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0xe9, 0x91, 0x4c, 0x7d, 0x00			}, { vpgatherqq xmm1,QWORD ebp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0xed, 0x90, 0x4c, 0x7d, 0x00			}, { vpgatherdq ymm1,QWORD ebp+xmm7*2+0x0,ymm2	}
+testcase	{ 0xc4, 0xe2, 0xed, 0x91, 0x4c, 0x7d, 0x00			}, { vpgatherqq ymm1,QWORD ebp+ymm7*2+0x0,ymm2	}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0x25, 0x08, 0x00, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm4*1+0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0x25, 0xf8, 0xff, 0xff, 0xff	}, { vpgatherdq ymm6,QWORD xmm4*1-0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0x25, 0x00, 0x00, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm4*1+0x0,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0x25, 0x98, 0x02, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm4*1+0x298,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0xe5, 0x08, 0x00, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm4*8+0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0xe5, 0xf8, 0xff, 0xff, 0xff	}, { vpgatherdq ymm6,QWORD xmm4*8-0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0xe5, 0x00, 0x00, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm4*8+0x0,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0xe5, 0x98, 0x02, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm4*8+0x298,ymm5		}
+
+; b/gas/testsuite/gas/i386/avx2-intel.d
+testcase	{ 0xc4, 0xe2, 0x5d, 0x8c, 0x31					}, { vpmaskmovd ymm6,ymm4,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x8e, 0x21					}, { vpmaskmovd YWORD ecx,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe2, 0xdd, 0x8c, 0x31					}, { vpmaskmovq ymm6,ymm4,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x8e, 0x21					}, { vpmaskmovq YWORD ecx,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x01, 0xd6, 0x07				}, { vpermpd ymm2,ymm6,0x7				}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x01, 0x31, 0x07				}, { vpermpd ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x00, 0xd6, 0x07				}, { vpermq ymm2,ymm6,0x7				}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x00, 0x31, 0x07				}, { vpermq ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x36, 0xd4					}, { vpermd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x36, 0x11					}, { vpermd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x16, 0xd4					}, { vpermps ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x16, 0x11					}, { vpermps ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x47, 0xd4					}, { vpsllvd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x47, 0x11					}, { vpsllvd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x47, 0xd4					}, { vpsllvq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x47, 0x11					}, { vpsllvq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x46, 0xd4					}, { vpsravd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x46, 0x11					}, { vpsravd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x45, 0xd4					}, { vpsrlvd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x45, 0x11					}, { vpsrlvd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x45, 0xd4					}, { vpsrlvq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x45, 0x11					}, { vpsrlvq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x2a, 0x21					}, { vmovntdqa ymm4,YWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x19, 0xf4					}, { vbroadcastsd ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x18, 0xf4					}, { vbroadcastss ymm6,xmm4				}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x02, 0xd4, 0x07				}, { vpblendd ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x02, 0x11, 0x07				}, { vpblendd ymm2,ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x46, 0xd4, 0x07				}, { vperm2i128 ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x46, 0x11, 0x07				}, { vperm2i128 ymm2,ymm6,YWORD ecx,0x7		}
+testcase	{ 0xc4, 0xe3, 0x5d, 0x38, 0xf4, 0x07				}, { vinserti128 ymm6,ymm4,xmm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x5d, 0x38, 0x31, 0x07				}, { vinserti128 ymm6,ymm4,OWORD ecx,0x7		}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x5a, 0x21					}, { vbroadcasti128 ymm4,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x47, 0xd4					}, { vpsllvd xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x49, 0x47, 0x39					}, { vpsllvd xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x47, 0xd4					}, { vpsllvq xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x47, 0x39					}, { vpsllvq xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x46, 0xd4					}, { vpsravd xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x49, 0x46, 0x39					}, { vpsravd xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x45, 0xd4					}, { vpsrlvd xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x49, 0x45, 0x39					}, { vpsrlvd xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x45, 0xd4					}, { vpsrlvq xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x45, 0x39					}, { vpsrlvq xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x59, 0x8c, 0x31					}, { vpmaskmovd xmm6,xmm4,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xd9, 0x8c, 0x31					}, { vpmaskmovq xmm6,xmm4,OWORD ecx			}
+testcase	{ 0xc4, 0xe3, 0x7d, 0x39, 0xe6, 0x07				}, { vextracti128 xmm6,ymm4,0x7				}
+testcase	{ 0xc4, 0xe3, 0x7d, 0x39, 0x21, 0x07				}, { vextracti128 OWORD ecx,ymm4,0x7			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x8e, 0x21					}, { vpmaskmovd OWORD ecx,xmm6,xmm4			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x8e, 0x21					}, { vpmaskmovq OWORD ecx,xmm6,xmm4			}
+testcase	{ 0xc4, 0xe3, 0x49, 0x02, 0xd4, 0x07				}, { vpblendd xmm2,xmm6,xmm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x49, 0x02, 0x11, 0x07				}, { vpblendd xmm2,xmm6,OWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x59, 0xf4					}, { vpbroadcastq xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x59, 0x21					}, { vpbroadcastq xmm4,QWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x59, 0xf4					}, { vpbroadcastq ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x59, 0x21					}, { vpbroadcastq ymm4,QWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x58, 0xe4					}, { vpbroadcastd ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x58, 0x21					}, { vpbroadcastd ymm4,DWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x58, 0xf4					}, { vpbroadcastd xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x58, 0x21					}, { vpbroadcastd xmm4,DWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x79, 0xf4					}, { vpbroadcastw xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x79, 0x21					}, { vpbroadcastw xmm4,WORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x79, 0xf4					}, { vpbroadcastw ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x79, 0x21					}, { vpbroadcastw ymm4,WORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x78, 0xf4					}, { vpbroadcastb xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x78, 0x21					}, { vpbroadcastb xmm4,BYTE ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x78, 0xf4					}, { vpbroadcastb ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x78, 0x21					}, { vpbroadcastb ymm4,BYTE ecx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x18, 0xf4					}, { vbroadcastss xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x5d, 0x8c, 0x31					}, { vpmaskmovd ymm6,ymm4,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x8e, 0x21					}, { vpmaskmovd YWORD ecx,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe2, 0x5d, 0x8c, 0x31					}, { vpmaskmovd ymm6,ymm4,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x8e, 0x21					}, { vpmaskmovd YWORD ecx,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe2, 0xdd, 0x8c, 0x31					}, { vpmaskmovq ymm6,ymm4,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x8e, 0x21					}, { vpmaskmovq YWORD ecx,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe2, 0xdd, 0x8c, 0x31					}, { vpmaskmovq ymm6,ymm4,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x8e, 0x21					}, { vpmaskmovq YWORD ecx,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x01, 0xd6, 0x07				}, { vpermpd ymm2,ymm6,0x7				}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x01, 0x31, 0x07				}, { vpermpd ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x01, 0x31, 0x07				}, { vpermpd ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x00, 0xd6, 0x07				}, { vpermq ymm2,ymm6,0x7				}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x00, 0x31, 0x07				}, { vpermq ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x00, 0x31, 0x07				}, { vpermq ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x36, 0xd4					}, { vpermd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x36, 0x11					}, { vpermd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x36, 0x11					}, { vpermd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x16, 0xd4					}, { vpermps ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x16, 0x11					}, { vpermps ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x16, 0x11					}, { vpermps ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x47, 0xd4					}, { vpsllvd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x47, 0x11					}, { vpsllvd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x47, 0x11					}, { vpsllvd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x47, 0xd4					}, { vpsllvq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x47, 0x11					}, { vpsllvq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x47, 0x11					}, { vpsllvq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x46, 0xd4					}, { vpsravd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x46, 0x11					}, { vpsravd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x46, 0x11					}, { vpsravd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x45, 0xd4					}, { vpsrlvd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x45, 0x11					}, { vpsrlvd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x45, 0x11					}, { vpsrlvd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x45, 0xd4					}, { vpsrlvq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x45, 0x11					}, { vpsrlvq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x45, 0x11					}, { vpsrlvq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x2a, 0x21					}, { vmovntdqa ymm4,YWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x2a, 0x21					}, { vmovntdqa ymm4,YWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x19, 0xf4					}, { vbroadcastsd ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x18, 0xf4					}, { vbroadcastss ymm6,xmm4				}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x02, 0xd4, 0x07				}, { vpblendd ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x02, 0x11, 0x07				}, { vpblendd ymm2,ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x02, 0x11, 0x07				}, { vpblendd ymm2,ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x46, 0xd4, 0x07				}, { vperm2i128 ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x46, 0x11, 0x07				}, { vperm2i128 ymm2,ymm6,YWORD ecx,0x7		}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x46, 0x11, 0x07				}, { vperm2i128 ymm2,ymm6,YWORD ecx,0x7		}
+testcase	{ 0xc4, 0xe3, 0x5d, 0x38, 0xf4, 0x07				}, { vinserti128 ymm6,ymm4,xmm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x5d, 0x38, 0x31, 0x07				}, { vinserti128 ymm6,ymm4,OWORD ecx,0x7		}
+testcase	{ 0xc4, 0xe3, 0x5d, 0x38, 0x31, 0x07				}, { vinserti128 ymm6,ymm4,OWORD ecx,0x7		}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x5a, 0x21					}, { vbroadcasti128 ymm4,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x5a, 0x21					}, { vbroadcasti128 ymm4,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x47, 0xd4					}, { vpsllvd xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x49, 0x47, 0x39					}, { vpsllvd xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x47, 0x39					}, { vpsllvd xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x47, 0xd4					}, { vpsllvq xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x47, 0x39					}, { vpsllvq xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x47, 0x39					}, { vpsllvq xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x46, 0xd4					}, { vpsravd xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x49, 0x46, 0x39					}, { vpsravd xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x46, 0x39					}, { vpsravd xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x45, 0xd4					}, { vpsrlvd xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x49, 0x45, 0x39					}, { vpsrlvd xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x45, 0x39					}, { vpsrlvd xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x45, 0xd4					}, { vpsrlvq xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x45, 0x39					}, { vpsrlvq xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x45, 0x39					}, { vpsrlvq xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x59, 0x8c, 0x31					}, { vpmaskmovd xmm6,xmm4,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x59, 0x8c, 0x31					}, { vpmaskmovd xmm6,xmm4,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xd9, 0x8c, 0x31					}, { vpmaskmovq xmm6,xmm4,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xd9, 0x8c, 0x31					}, { vpmaskmovq xmm6,xmm4,OWORD ecx			}
+testcase	{ 0xc4, 0xe3, 0x7d, 0x39, 0xe6, 0x07				}, { vextracti128 xmm6,ymm4,0x7				}
+testcase	{ 0xc4, 0xe3, 0x7d, 0x39, 0x21, 0x07				}, { vextracti128 OWORD ecx,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x7d, 0x39, 0x21, 0x07				}, { vextracti128 OWORD ecx,ymm4,0x7			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x8e, 0x21					}, { vpmaskmovd OWORD ecx,xmm6,xmm4			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x8e, 0x21					}, { vpmaskmovd OWORD ecx,xmm6,xmm4			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x8e, 0x21					}, { vpmaskmovq OWORD ecx,xmm6,xmm4			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x8e, 0x21					}, { vpmaskmovq OWORD ecx,xmm6,xmm4			}
+testcase	{ 0xc4, 0xe3, 0x49, 0x02, 0xd4, 0x07				}, { vpblendd xmm2,xmm6,xmm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x49, 0x02, 0x11, 0x07				}, { vpblendd xmm2,xmm6,OWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x49, 0x02, 0x11, 0x07				}, { vpblendd xmm2,xmm6,OWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x59, 0xf4					}, { vpbroadcastq xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x59, 0x21					}, { vpbroadcastq xmm4,QWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x59, 0x21					}, { vpbroadcastq xmm4,QWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x59, 0xf4					}, { vpbroadcastq ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x59, 0x21					}, { vpbroadcastq ymm4,QWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x59, 0x21					}, { vpbroadcastq ymm4,QWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x58, 0xe4					}, { vpbroadcastd ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x58, 0x21					}, { vpbroadcastd ymm4,DWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x58, 0x21					}, { vpbroadcastd ymm4,DWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x58, 0xf4					}, { vpbroadcastd xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x58, 0x21					}, { vpbroadcastd xmm4,DWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x58, 0x21					}, { vpbroadcastd xmm4,DWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x79, 0xf4					}, { vpbroadcastw xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x79, 0x21					}, { vpbroadcastw xmm4,WORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x79, 0x21					}, { vpbroadcastw xmm4,WORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x79, 0xf4					}, { vpbroadcastw ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x79, 0x21					}, { vpbroadcastw ymm4,WORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x79, 0x21					}, { vpbroadcastw ymm4,WORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x78, 0xf4					}, { vpbroadcastb xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x78, 0x21					}, { vpbroadcastb xmm4,BYTE ecx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x78, 0x21					}, { vpbroadcastb xmm4,BYTE ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x78, 0xf4					}, { vpbroadcastb ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x78, 0x21					}, { vpbroadcastb ymm4,BYTE ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x78, 0x21					}, { vpbroadcastb ymm4,BYTE ecx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x18, 0xf4					}, { vbroadcastss xmm6,xmm4				}
+
+; b/gas/testsuite/gas/i386/avx256int-intel.d
+testcase	{ 0xc5, 0xfd, 0xd7, 0xcc					}, { vpmovmskb ecx,ymm4					}
+testcase	{ 0xc5, 0xed, 0x72, 0xf6, 0x07					}, { vpslld ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xfe, 0x07					}, { vpslldq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xf6, 0x07					}, { vpsllq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x71, 0xf6, 0x07					}, { vpsllw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x72, 0xe6, 0x07					}, { vpsrad ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x71, 0xe6, 0x07					}, { vpsraw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x72, 0xd6, 0x07					}, { vpsrld ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xde, 0x07					}, { vpsrldq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xd6, 0x07					}, { vpsrlq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x71, 0xd6, 0x07					}, { vpsrlw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xfd, 0x70, 0xd6, 0x07					}, { vpshufd ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xfd, 0x70, 0x31, 0x07					}, { vpshufd ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc5, 0xfe, 0x70, 0xd6, 0x07					}, { vpshufhw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xfe, 0x70, 0x31, 0x07					}, { vpshufhw ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc5, 0xff, 0x70, 0xd6, 0x07					}, { vpshuflw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xff, 0x70, 0x31, 0x07					}, { vpshuflw ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc5, 0xcd, 0x6b, 0xd4					}, { vpackssdw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6b, 0x11					}, { vpackssdw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x63, 0xd4					}, { vpacksswb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x63, 0x11					}, { vpacksswb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x2b, 0xd4					}, { vpackusdw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x2b, 0x11					}, { vpackusdw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x67, 0xd4					}, { vpackuswb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x67, 0x11					}, { vpackuswb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfc, 0xd4					}, { vpaddb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfc, 0x11					}, { vpaddb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfd, 0xd4					}, { vpaddw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfd, 0x11					}, { vpaddw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfe, 0xd4					}, { vpaddd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfe, 0x11					}, { vpaddd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd4, 0xd4					}, { vpaddq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd4, 0x11					}, { vpaddq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xec, 0xd4					}, { vpaddsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xec, 0x11					}, { vpaddsb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xed, 0xd4					}, { vpaddsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xed, 0x11					}, { vpaddsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xdc, 0xd4					}, { vpaddusb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdc, 0x11					}, { vpaddusb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xdd, 0xd4					}, { vpaddusw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdd, 0x11					}, { vpaddusw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xdb, 0xd4					}, { vpand ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdb, 0x11					}, { vpand ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xdf, 0xd4					}, { vpandn ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdf, 0x11					}, { vpandn ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe0, 0xd4					}, { vpavgb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe0, 0x11					}, { vpavgb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe3, 0xd4					}, { vpavgw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe3, 0x11					}, { vpavgw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x74, 0xd4					}, { vpcmpeqb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x74, 0x11					}, { vpcmpeqb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x75, 0xd4					}, { vpcmpeqw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x75, 0x11					}, { vpcmpeqw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x76, 0xd4					}, { vpcmpeqd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x76, 0x11					}, { vpcmpeqd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x29, 0xd4					}, { vpcmpeqq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x29, 0x11					}, { vpcmpeqq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x64, 0xd4					}, { vpcmpgtb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x64, 0x11					}, { vpcmpgtb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x65, 0xd4					}, { vpcmpgtw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x65, 0x11					}, { vpcmpgtw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x66, 0xd4					}, { vpcmpgtd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x66, 0x11					}, { vpcmpgtd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x37, 0xd4					}, { vpcmpgtq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x37, 0x11					}, { vpcmpgtq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x01, 0xd4					}, { vphaddw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x01, 0x11					}, { vphaddw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x02, 0xd4					}, { vphaddd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x02, 0x11					}, { vphaddd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x03, 0xd4					}, { vphaddsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x03, 0x11					}, { vphaddsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x05, 0xd4					}, { vphsubw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x05, 0x11					}, { vphsubw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x06, 0xd4					}, { vphsubd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x06, 0x11					}, { vphsubd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x07, 0xd4					}, { vphsubsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x07, 0x11					}, { vphsubsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf5, 0xd4					}, { vpmaddwd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf5, 0x11					}, { vpmaddwd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x04, 0xd4					}, { vpmaddubsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x04, 0x11					}, { vpmaddubsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3c, 0xd4					}, { vpmaxsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3c, 0x11					}, { vpmaxsb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xee, 0xd4					}, { vpmaxsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xee, 0x11					}, { vpmaxsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3d, 0xd4					}, { vpmaxsd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3d, 0x11					}, { vpmaxsd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xde, 0xd4					}, { vpmaxub ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xde, 0x11					}, { vpmaxub ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3e, 0xd4					}, { vpmaxuw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3e, 0x11					}, { vpmaxuw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3f, 0xd4					}, { vpmaxud ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3f, 0x11					}, { vpmaxud ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x38, 0xd4					}, { vpminsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x38, 0x11					}, { vpminsb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xea, 0xd4					}, { vpminsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xea, 0x11					}, { vpminsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x39, 0xd4					}, { vpminsd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x39, 0x11					}, { vpminsd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xda, 0xd4					}, { vpminub ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xda, 0x11					}, { vpminub ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3a, 0xd4					}, { vpminuw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3a, 0x11					}, { vpminuw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3b, 0xd4					}, { vpminud ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3b, 0x11					}, { vpminud ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe4, 0xd4					}, { vpmulhuw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe4, 0x11					}, { vpmulhuw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0b, 0xd4					}, { vpmulhrsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0b, 0x11					}, { vpmulhrsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe5, 0xd4					}, { vpmulhw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe5, 0x11					}, { vpmulhw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd5, 0xd4					}, { vpmullw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd5, 0x11					}, { vpmullw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x40, 0xd4					}, { vpmulld ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x40, 0x11					}, { vpmulld ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf4, 0xd4					}, { vpmuludq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf4, 0x11					}, { vpmuludq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x28, 0xd4					}, { vpmuldq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x28, 0x11					}, { vpmuldq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xeb, 0xd4					}, { vpor ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xeb, 0x11					}, { vpor ymm2,ymm6,YWORD ecx				}
+testcase	{ 0xc5, 0xcd, 0xf6, 0xd4					}, { vpsadbw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf6, 0x11					}, { vpsadbw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x00, 0xd4					}, { vpshufb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x00, 0x11					}, { vpshufb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x08, 0xd4					}, { vpsignb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x08, 0x11					}, { vpsignb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x09, 0xd4					}, { vpsignw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x09, 0x11					}, { vpsignw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0a, 0xd4					}, { vpsignd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0a, 0x11					}, { vpsignd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf8, 0xd4					}, { vpsubb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf8, 0x11					}, { vpsubb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf9, 0xd4					}, { vpsubw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf9, 0x11					}, { vpsubw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfa, 0xd4					}, { vpsubd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfa, 0x11					}, { vpsubd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfb, 0xd4					}, { vpsubq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfb, 0x11					}, { vpsubq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe8, 0xd4					}, { vpsubsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe8, 0x11					}, { vpsubsb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe9, 0xd4					}, { vpsubsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe9, 0x11					}, { vpsubsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd8, 0xd4					}, { vpsubusb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd8, 0x11					}, { vpsubusb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd9, 0xd4					}, { vpsubusw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd9, 0x11					}, { vpsubusw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x68, 0xd4					}, { vpunpckhbw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x68, 0x11					}, { vpunpckhbw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x69, 0xd4					}, { vpunpckhwd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x69, 0x11					}, { vpunpckhwd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x6a, 0xd4					}, { vpunpckhdq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6a, 0x11					}, { vpunpckhdq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x6d, 0xd4					}, { vpunpckhqdq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6d, 0x11					}, { vpunpckhqdq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x60, 0xd4					}, { vpunpcklbw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x60, 0x11					}, { vpunpcklbw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x61, 0xd4					}, { vpunpcklwd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x61, 0x11					}, { vpunpcklwd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x62, 0xd4					}, { vpunpckldq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x62, 0x11					}, { vpunpckldq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x6c, 0xd4					}, { vpunpcklqdq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6c, 0x11					}, { vpunpcklqdq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xef, 0xd4					}, { vpxor ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xef, 0x11					}, { vpxor ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1c, 0xf4					}, { vpabsb ymm6,ymm4					}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1c, 0x21					}, { vpabsb ymm4,YWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1d, 0xf4					}, { vpabsw ymm6,ymm4					}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1d, 0x21					}, { vpabsw ymm4,YWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1e, 0xf4					}, { vpabsd ymm6,ymm4					}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1e, 0x21					}, { vpabsd ymm4,YWORD ecx				}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x42, 0xd4, 0x07				}, { vmpsadbw ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x42, 0x11, 0x07				}, { vmpsadbw ymm2,ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0f, 0xd4, 0x07				}, { vpalignr ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0f, 0x11, 0x07				}, { vpalignr ymm2,ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0e, 0xd4, 0x07				}, { vpblendw ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0e, 0x11, 0x07				}, { vpblendw ymm2,ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x6d, 0x4c, 0xfe, 0x40				}, { vpblendvb ymm7,ymm2,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe3, 0x6d, 0x4c, 0x39, 0x40				}, { vpblendvb ymm7,ymm2,YWORD ecx,ymm4		}
+testcase	{ 0xc5, 0xcd, 0xf1, 0xd4					}, { vpsllw ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xf1, 0x11					}, { vpsllw ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf2, 0xd4					}, { vpslld ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xf2, 0x11					}, { vpslld ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf3, 0xd4					}, { vpsllq ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xf3, 0x11					}, { vpsllq ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe1, 0xd4					}, { vpsraw ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xe1, 0x11					}, { vpsraw ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe2, 0xd4					}, { vpsrad ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xe2, 0x11					}, { vpsrad ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd1, 0xd4					}, { vpsrlw ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xd1, 0x11					}, { vpsrlw ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd2, 0xd4					}, { vpsrld ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xd2, 0x11					}, { vpsrld ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd3, 0xd4					}, { vpsrlq ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xd3, 0x11					}, { vpsrlq ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x20, 0xe4					}, { vpmovsxbw ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x20, 0x21					}, { vpmovsxbw ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x23, 0xe4					}, { vpmovsxwd ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x23, 0x21					}, { vpmovsxwd ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x25, 0xe4					}, { vpmovsxdq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x25, 0x21					}, { vpmovsxdq ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x30, 0xe4					}, { vpmovzxbw ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x30, 0x21					}, { vpmovzxbw ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x33, 0xe4					}, { vpmovzxwd ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x33, 0x21					}, { vpmovzxwd ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x35, 0xe4					}, { vpmovzxdq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x35, 0x21					}, { vpmovzxdq ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x21, 0xf4					}, { vpmovsxbd ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x21, 0x21					}, { vpmovsxbd ymm4,QWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x24, 0xf4					}, { vpmovsxwq ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x24, 0x21					}, { vpmovsxwq ymm4,QWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x31, 0xf4					}, { vpmovzxbd ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x31, 0x21					}, { vpmovzxbd ymm4,QWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x34, 0xf4					}, { vpmovzxwq ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x34, 0x21					}, { vpmovzxwq ymm4,QWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x22, 0xe4					}, { vpmovsxbq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x22, 0x21					}, { vpmovsxbq ymm4,DWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x32, 0xe4					}, { vpmovzxbq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x32, 0x21					}, { vpmovzxbq ymm4,DWORD ecx				}
+testcase	{ 0xc5, 0xfd, 0xd7, 0xcc					}, { vpmovmskb ecx,ymm4					}
+testcase	{ 0xc5, 0xed, 0x72, 0xf6, 0x07					}, { vpslld ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xfe, 0x07					}, { vpslldq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xf6, 0x07					}, { vpsllq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x71, 0xf6, 0x07					}, { vpsllw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x72, 0xe6, 0x07					}, { vpsrad ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x71, 0xe6, 0x07					}, { vpsraw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x72, 0xd6, 0x07					}, { vpsrld ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xde, 0x07					}, { vpsrldq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xd6, 0x07					}, { vpsrlq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x71, 0xd6, 0x07					}, { vpsrlw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xfd, 0x70, 0xd6, 0x07					}, { vpshufd ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xfd, 0x70, 0x31, 0x07					}, { vpshufd ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc5, 0xfd, 0x70, 0x31, 0x07					}, { vpshufd ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc5, 0xfe, 0x70, 0xd6, 0x07					}, { vpshufhw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xfe, 0x70, 0x31, 0x07					}, { vpshufhw ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc5, 0xfe, 0x70, 0x31, 0x07					}, { vpshufhw ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc5, 0xff, 0x70, 0xd6, 0x07					}, { vpshuflw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xff, 0x70, 0x31, 0x07					}, { vpshuflw ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc5, 0xff, 0x70, 0x31, 0x07					}, { vpshuflw ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc5, 0xcd, 0x6b, 0xd4					}, { vpackssdw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6b, 0x11					}, { vpackssdw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x6b, 0x11					}, { vpackssdw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x63, 0xd4					}, { vpacksswb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x63, 0x11					}, { vpacksswb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x63, 0x11					}, { vpacksswb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x2b, 0xd4					}, { vpackusdw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x2b, 0x11					}, { vpackusdw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x2b, 0x11					}, { vpackusdw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x67, 0xd4					}, { vpackuswb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x67, 0x11					}, { vpackuswb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x67, 0x11					}, { vpackuswb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfc, 0xd4					}, { vpaddb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfc, 0x11					}, { vpaddb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfc, 0x11					}, { vpaddb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfd, 0xd4					}, { vpaddw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfd, 0x11					}, { vpaddw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfd, 0x11					}, { vpaddw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfe, 0xd4					}, { vpaddd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfe, 0x11					}, { vpaddd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfe, 0x11					}, { vpaddd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd4, 0xd4					}, { vpaddq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd4, 0x11					}, { vpaddq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd4, 0x11					}, { vpaddq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xec, 0xd4					}, { vpaddsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xec, 0x11					}, { vpaddsb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xec, 0x11					}, { vpaddsb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xed, 0xd4					}, { vpaddsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xed, 0x11					}, { vpaddsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xed, 0x11					}, { vpaddsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xdc, 0xd4					}, { vpaddusb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdc, 0x11					}, { vpaddusb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xdc, 0x11					}, { vpaddusb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xdd, 0xd4					}, { vpaddusw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdd, 0x11					}, { vpaddusw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xdd, 0x11					}, { vpaddusw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xdb, 0xd4					}, { vpand ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdb, 0x11					}, { vpand ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xdb, 0x11					}, { vpand ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xdf, 0xd4					}, { vpandn ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdf, 0x11					}, { vpandn ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xdf, 0x11					}, { vpandn ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe0, 0xd4					}, { vpavgb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe0, 0x11					}, { vpavgb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe0, 0x11					}, { vpavgb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe3, 0xd4					}, { vpavgw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe3, 0x11					}, { vpavgw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe3, 0x11					}, { vpavgw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x74, 0xd4					}, { vpcmpeqb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x74, 0x11					}, { vpcmpeqb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x74, 0x11					}, { vpcmpeqb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x75, 0xd4					}, { vpcmpeqw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x75, 0x11					}, { vpcmpeqw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x75, 0x11					}, { vpcmpeqw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x76, 0xd4					}, { vpcmpeqd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x76, 0x11					}, { vpcmpeqd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x76, 0x11					}, { vpcmpeqd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x29, 0xd4					}, { vpcmpeqq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x29, 0x11					}, { vpcmpeqq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x29, 0x11					}, { vpcmpeqq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x64, 0xd4					}, { vpcmpgtb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x64, 0x11					}, { vpcmpgtb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x64, 0x11					}, { vpcmpgtb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x65, 0xd4					}, { vpcmpgtw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x65, 0x11					}, { vpcmpgtw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x65, 0x11					}, { vpcmpgtw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x66, 0xd4					}, { vpcmpgtd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x66, 0x11					}, { vpcmpgtd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x66, 0x11					}, { vpcmpgtd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x37, 0xd4					}, { vpcmpgtq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x37, 0x11					}, { vpcmpgtq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x37, 0x11					}, { vpcmpgtq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x01, 0xd4					}, { vphaddw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x01, 0x11					}, { vphaddw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x01, 0x11					}, { vphaddw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x02, 0xd4					}, { vphaddd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x02, 0x11					}, { vphaddd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x02, 0x11					}, { vphaddd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x03, 0xd4					}, { vphaddsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x03, 0x11					}, { vphaddsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x03, 0x11					}, { vphaddsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x05, 0xd4					}, { vphsubw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x05, 0x11					}, { vphsubw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x05, 0x11					}, { vphsubw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x06, 0xd4					}, { vphsubd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x06, 0x11					}, { vphsubd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x06, 0x11					}, { vphsubd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x07, 0xd4					}, { vphsubsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x07, 0x11					}, { vphsubsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x07, 0x11					}, { vphsubsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf5, 0xd4					}, { vpmaddwd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf5, 0x11					}, { vpmaddwd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf5, 0x11					}, { vpmaddwd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x04, 0xd4					}, { vpmaddubsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x04, 0x11					}, { vpmaddubsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x04, 0x11					}, { vpmaddubsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3c, 0xd4					}, { vpmaxsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3c, 0x11					}, { vpmaxsb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3c, 0x11					}, { vpmaxsb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xee, 0xd4					}, { vpmaxsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xee, 0x11					}, { vpmaxsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xee, 0x11					}, { vpmaxsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3d, 0xd4					}, { vpmaxsd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3d, 0x11					}, { vpmaxsd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3d, 0x11					}, { vpmaxsd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xde, 0xd4					}, { vpmaxub ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xde, 0x11					}, { vpmaxub ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xde, 0x11					}, { vpmaxub ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3e, 0xd4					}, { vpmaxuw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3e, 0x11					}, { vpmaxuw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3e, 0x11					}, { vpmaxuw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3f, 0xd4					}, { vpmaxud ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3f, 0x11					}, { vpmaxud ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3f, 0x11					}, { vpmaxud ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x38, 0xd4					}, { vpminsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x38, 0x11					}, { vpminsb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x38, 0x11					}, { vpminsb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xea, 0xd4					}, { vpminsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xea, 0x11					}, { vpminsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xea, 0x11					}, { vpminsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x39, 0xd4					}, { vpminsd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x39, 0x11					}, { vpminsd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x39, 0x11					}, { vpminsd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xda, 0xd4					}, { vpminub ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xda, 0x11					}, { vpminub ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xda, 0x11					}, { vpminub ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3a, 0xd4					}, { vpminuw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3a, 0x11					}, { vpminuw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3a, 0x11					}, { vpminuw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3b, 0xd4					}, { vpminud ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3b, 0x11					}, { vpminud ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3b, 0x11					}, { vpminud ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe4, 0xd4					}, { vpmulhuw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe4, 0x11					}, { vpmulhuw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe4, 0x11					}, { vpmulhuw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0b, 0xd4					}, { vpmulhrsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0b, 0x11					}, { vpmulhrsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0b, 0x11					}, { vpmulhrsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe5, 0xd4					}, { vpmulhw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe5, 0x11					}, { vpmulhw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe5, 0x11					}, { vpmulhw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd5, 0xd4					}, { vpmullw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd5, 0x11					}, { vpmullw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd5, 0x11					}, { vpmullw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x40, 0xd4					}, { vpmulld ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x40, 0x11					}, { vpmulld ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x40, 0x11					}, { vpmulld ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf4, 0xd4					}, { vpmuludq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf4, 0x11					}, { vpmuludq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf4, 0x11					}, { vpmuludq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x28, 0xd4					}, { vpmuldq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x28, 0x11					}, { vpmuldq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x28, 0x11					}, { vpmuldq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xeb, 0xd4					}, { vpor ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xeb, 0x11					}, { vpor ymm2,ymm6,YWORD ecx				}
+testcase	{ 0xc5, 0xcd, 0xeb, 0x11					}, { vpor ymm2,ymm6,YWORD ecx				}
+testcase	{ 0xc5, 0xcd, 0xf6, 0xd4					}, { vpsadbw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf6, 0x11					}, { vpsadbw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf6, 0x11					}, { vpsadbw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x00, 0xd4					}, { vpshufb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x00, 0x11					}, { vpshufb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x00, 0x11					}, { vpshufb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x08, 0xd4					}, { vpsignb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x08, 0x11					}, { vpsignb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x08, 0x11					}, { vpsignb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x09, 0xd4					}, { vpsignw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x09, 0x11					}, { vpsignw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x09, 0x11					}, { vpsignw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0a, 0xd4					}, { vpsignd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0a, 0x11					}, { vpsignd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0a, 0x11					}, { vpsignd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf8, 0xd4					}, { vpsubb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf8, 0x11					}, { vpsubb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf8, 0x11					}, { vpsubb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf9, 0xd4					}, { vpsubw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf9, 0x11					}, { vpsubw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf9, 0x11					}, { vpsubw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfa, 0xd4					}, { vpsubd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfa, 0x11					}, { vpsubd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfa, 0x11					}, { vpsubd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfb, 0xd4					}, { vpsubq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfb, 0x11					}, { vpsubq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfb, 0x11					}, { vpsubq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe8, 0xd4					}, { vpsubsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe8, 0x11					}, { vpsubsb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe8, 0x11					}, { vpsubsb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe9, 0xd4					}, { vpsubsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe9, 0x11					}, { vpsubsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe9, 0x11					}, { vpsubsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd8, 0xd4					}, { vpsubusb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd8, 0x11					}, { vpsubusb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd8, 0x11					}, { vpsubusb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd9, 0xd4					}, { vpsubusw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd9, 0x11					}, { vpsubusw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd9, 0x11					}, { vpsubusw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x68, 0xd4					}, { vpunpckhbw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x68, 0x11					}, { vpunpckhbw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x68, 0x11					}, { vpunpckhbw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x69, 0xd4					}, { vpunpckhwd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x69, 0x11					}, { vpunpckhwd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x69, 0x11					}, { vpunpckhwd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x6a, 0xd4					}, { vpunpckhdq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6a, 0x11					}, { vpunpckhdq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x6a, 0x11					}, { vpunpckhdq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x6d, 0xd4					}, { vpunpckhqdq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6d, 0x11					}, { vpunpckhqdq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x6d, 0x11					}, { vpunpckhqdq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x60, 0xd4					}, { vpunpcklbw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x60, 0x11					}, { vpunpcklbw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x60, 0x11					}, { vpunpcklbw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x61, 0xd4					}, { vpunpcklwd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x61, 0x11					}, { vpunpcklwd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x61, 0x11					}, { vpunpcklwd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x62, 0xd4					}, { vpunpckldq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x62, 0x11					}, { vpunpckldq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x62, 0x11					}, { vpunpckldq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x6c, 0xd4					}, { vpunpcklqdq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6c, 0x11					}, { vpunpcklqdq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x6c, 0x11					}, { vpunpcklqdq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xef, 0xd4					}, { vpxor ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xef, 0x11					}, { vpxor ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xef, 0x11					}, { vpxor ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1c, 0xf4					}, { vpabsb ymm6,ymm4					}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1c, 0x21					}, { vpabsb ymm4,YWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1c, 0x21					}, { vpabsb ymm4,YWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1d, 0xf4					}, { vpabsw ymm6,ymm4					}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1d, 0x21					}, { vpabsw ymm4,YWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1d, 0x21					}, { vpabsw ymm4,YWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1e, 0xf4					}, { vpabsd ymm6,ymm4					}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1e, 0x21					}, { vpabsd ymm4,YWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1e, 0x21					}, { vpabsd ymm4,YWORD ecx				}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x42, 0xd4, 0x07				}, { vmpsadbw ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x42, 0x11, 0x07				}, { vmpsadbw ymm2,ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x42, 0x11, 0x07				}, { vmpsadbw ymm2,ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0f, 0xd4, 0x07				}, { vpalignr ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0f, 0x11, 0x07				}, { vpalignr ymm2,ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0f, 0x11, 0x07				}, { vpalignr ymm2,ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0e, 0xd4, 0x07				}, { vpblendw ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0e, 0x11, 0x07				}, { vpblendw ymm2,ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0e, 0x11, 0x07				}, { vpblendw ymm2,ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x6d, 0x4c, 0xfe, 0x40				}, { vpblendvb ymm7,ymm2,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe3, 0x6d, 0x4c, 0x39, 0x40				}, { vpblendvb ymm7,ymm2,YWORD ecx,ymm4		}
+testcase	{ 0xc4, 0xe3, 0x6d, 0x4c, 0x39, 0x40				}, { vpblendvb ymm7,ymm2,YWORD ecx,ymm4		}
+testcase	{ 0xc5, 0xcd, 0xf1, 0xd4					}, { vpsllw ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xf1, 0x11					}, { vpsllw ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf1, 0x11					}, { vpsllw ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf2, 0xd4					}, { vpslld ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xf2, 0x11					}, { vpslld ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf2, 0x11					}, { vpslld ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf3, 0xd4					}, { vpsllq ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xf3, 0x11					}, { vpsllq ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf3, 0x11					}, { vpsllq ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe1, 0xd4					}, { vpsraw ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xe1, 0x11					}, { vpsraw ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe1, 0x11					}, { vpsraw ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe2, 0xd4					}, { vpsrad ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xe2, 0x11					}, { vpsrad ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe2, 0x11					}, { vpsrad ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd1, 0xd4					}, { vpsrlw ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xd1, 0x11					}, { vpsrlw ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd1, 0x11					}, { vpsrlw ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd2, 0xd4					}, { vpsrld ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xd2, 0x11					}, { vpsrld ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd2, 0x11					}, { vpsrld ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd3, 0xd4					}, { vpsrlq ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xd3, 0x11					}, { vpsrlq ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd3, 0x11					}, { vpsrlq ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x20, 0xe4					}, { vpmovsxbw ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x20, 0x21					}, { vpmovsxbw ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x20, 0x21					}, { vpmovsxbw ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x23, 0xe4					}, { vpmovsxwd ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x23, 0x21					}, { vpmovsxwd ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x23, 0x21					}, { vpmovsxwd ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x25, 0xe4					}, { vpmovsxdq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x25, 0x21					}, { vpmovsxdq ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x25, 0x21					}, { vpmovsxdq ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x30, 0xe4					}, { vpmovzxbw ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x30, 0x21					}, { vpmovzxbw ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x30, 0x21					}, { vpmovzxbw ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x33, 0xe4					}, { vpmovzxwd ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x33, 0x21					}, { vpmovzxwd ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x33, 0x21					}, { vpmovzxwd ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x35, 0xe4					}, { vpmovzxdq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x35, 0x21					}, { vpmovzxdq ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x35, 0x21					}, { vpmovzxdq ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x21, 0xf4					}, { vpmovsxbd ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x21, 0x21					}, { vpmovsxbd ymm4,QWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x21, 0x21					}, { vpmovsxbd ymm4,QWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x24, 0xf4					}, { vpmovsxwq ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x24, 0x21					}, { vpmovsxwq ymm4,QWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x24, 0x21					}, { vpmovsxwq ymm4,QWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x31, 0xf4					}, { vpmovzxbd ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x31, 0x21					}, { vpmovzxbd ymm4,QWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x31, 0x21					}, { vpmovzxbd ymm4,QWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x34, 0xf4					}, { vpmovzxwq ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x34, 0x21					}, { vpmovzxwq ymm4,QWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x34, 0x21					}, { vpmovzxwq ymm4,QWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x22, 0xe4					}, { vpmovsxbq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x22, 0x21					}, { vpmovsxbq ymm4,DWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x22, 0x21					}, { vpmovsxbq ymm4,DWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x32, 0xe4					}, { vpmovzxbq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x32, 0x21					}, { vpmovzxbq ymm4,DWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x32, 0x21					}, { vpmovzxbq ymm4,DWORD ecx				}
+
+bits 64
+
+; b/gas/testsuite/gas/i386/x86-64-avx-gather-intel.d
+testcase	{ 0xc4, 0xe2, 0xe9, 0x92, 0x4c, 0x7d, 0x00			}, { vgatherdpd xmm1,QWORD rbp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0xe9, 0x93, 0x4c, 0x7d, 0x00			}, { vgatherqpd xmm1,QWORD rbp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0xed, 0x92, 0x4c, 0x7d, 0x00			}, { vgatherdpd ymm1,QWORD rbp+xmm7*2+0x0,ymm2	}
+testcase	{ 0xc4, 0xe2, 0xed, 0x93, 0x4c, 0x7d, 0x00			}, { vgatherqpd ymm1,QWORD rbp+ymm7*2+0x0,ymm2	}
+testcase	{ 0xc4, 0x02, 0x99, 0x92, 0x5c, 0x75, 0x00			}, { vgatherdpd xmm11,QWORD r13+xmm14*2+0x0,xmm12	}
+testcase	{ 0xc4, 0x02, 0x99, 0x93, 0x5c, 0x75, 0x00			}, { vgatherqpd xmm11,QWORD r13+xmm14*2+0x0,xmm12	}
+testcase	{ 0xc4, 0x02, 0x9d, 0x92, 0x5c, 0x75, 0x00			}, { vgatherdpd ymm11,QWORD r13+xmm14*2+0x0,ymm12	}
+testcase	{ 0xc4, 0x02, 0x9d, 0x93, 0x5c, 0x75, 0x00			}, { vgatherqpd ymm11,QWORD r13+ymm14*2+0x0,ymm12	}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0x25, 0x08, 0x00, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm4*1+0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0x25, 0xf8, 0xff, 0xff, 0xff	}, { vgatherdpd ymm6,QWORD xmm4*1-0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0x25, 0x00, 0x00, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm4*1+0x0,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0x25, 0x98, 0x02, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm4*1+0x298,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0xe5, 0x08, 0x00, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm4*8+0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0xe5, 0xf8, 0xff, 0xff, 0xff	}, { vgatherdpd ymm6,QWORD xmm4*8-0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0xe5, 0x00, 0x00, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm4*8+0x0,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0xe5, 0x98, 0x02, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm4*8+0x298,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x92, 0x34, 0x35, 0x08, 0x00, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm14*1+0x8,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x92, 0x34, 0x35, 0xf8, 0xff, 0xff, 0xff	}, { vgatherdpd ymm6,QWORD xmm14*1-0x8,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x92, 0x34, 0x35, 0x00, 0x00, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm14*1+0x0,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x92, 0x34, 0x35, 0x98, 0x02, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm14*1+0x298,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x92, 0x34, 0xf5, 0x08, 0x00, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm14*8+0x8,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x92, 0x34, 0xf5, 0xf8, 0xff, 0xff, 0xff	}, { vgatherdpd ymm6,QWORD xmm14*8-0x8,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x92, 0x34, 0xf5, 0x00, 0x00, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm14*8+0x0,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x92, 0x34, 0xf5, 0x98, 0x02, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm14*8+0x298,ymm5		}
+testcase	{ 0xc4, 0xe2, 0x69, 0x92, 0x4c, 0x7d, 0x00			}, { vgatherdps xmm1,DWORD rbp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0x69, 0x93, 0x4c, 0x7d, 0x00			}, { vgatherqps xmm1,DWORD rbp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0x6d, 0x92, 0x4c, 0x7d, 0x00			}, { vgatherdps ymm1,DWORD rbp+ymm7*2+0x0,ymm2	}
+testcase	{ 0xc4, 0xe2, 0x6d, 0x93, 0x4c, 0x7d, 0x00			}, { vgatherqps xmm1,DWORD rbp+ymm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0x02, 0x19, 0x92, 0x5c, 0x75, 0x00			}, { vgatherdps xmm11,DWORD r13+xmm14*2+0x0,xmm12	}
+testcase	{ 0xc4, 0x02, 0x19, 0x93, 0x5c, 0x75, 0x00			}, { vgatherqps xmm11,DWORD r13+xmm14*2+0x0,xmm12	}
+testcase	{ 0xc4, 0x02, 0x1d, 0x92, 0x5c, 0x75, 0x00			}, { vgatherdps ymm11,DWORD r13+ymm14*2+0x0,ymm12	}
+testcase	{ 0xc4, 0x02, 0x1d, 0x93, 0x5c, 0x75, 0x00			}, { vgatherqps xmm11,DWORD r13+ymm14*2+0x0,xmm12	}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0x25, 0x08, 0x00, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm4*1+0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0x25, 0xf8, 0xff, 0xff, 0xff	}, { vgatherdps xmm6,DWORD xmm4*1-0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0x25, 0x00, 0x00, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm4*1+0x0,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0x25, 0x98, 0x02, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm4*1+0x298,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0xe5, 0x08, 0x00, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm4*8+0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0xe5, 0xf8, 0xff, 0xff, 0xff	}, { vgatherdps xmm6,DWORD xmm4*8-0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0xe5, 0x00, 0x00, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm4*8+0x0,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0xe5, 0x98, 0x02, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm4*8+0x298,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x92, 0x34, 0x35, 0x08, 0x00, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm14*1+0x8,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x92, 0x34, 0x35, 0xf8, 0xff, 0xff, 0xff	}, { vgatherdps xmm6,DWORD xmm14*1-0x8,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x92, 0x34, 0x35, 0x00, 0x00, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm14*1+0x0,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x92, 0x34, 0x35, 0x98, 0x02, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm14*1+0x298,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x92, 0x34, 0xf5, 0x08, 0x00, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm14*8+0x8,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x92, 0x34, 0xf5, 0xf8, 0xff, 0xff, 0xff	}, { vgatherdps xmm6,DWORD xmm14*8-0x8,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x92, 0x34, 0xf5, 0x00, 0x00, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm14*8+0x0,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x92, 0x34, 0xf5, 0x98, 0x02, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm14*8+0x298,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x69, 0x90, 0x4c, 0x7d, 0x00			}, { vpgatherdd xmm1,DWORD rbp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0x69, 0x91, 0x4c, 0x7d, 0x00			}, { vpgatherqd xmm1,DWORD rbp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0x6d, 0x90, 0x4c, 0x7d, 0x00			}, { vpgatherdd ymm1,DWORD rbp+ymm7*2+0x0,ymm2	}
+testcase	{ 0xc4, 0xe2, 0x6d, 0x91, 0x4c, 0x7d, 0x00			}, { vpgatherqd xmm1,DWORD rbp+ymm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0x02, 0x19, 0x90, 0x5c, 0x75, 0x00			}, { vpgatherdd xmm11,DWORD r13+xmm14*2+0x0,xmm12	}
+testcase	{ 0xc4, 0x02, 0x19, 0x91, 0x5c, 0x75, 0x00			}, { vpgatherqd xmm11,DWORD r13+xmm14*2+0x0,xmm12	}
+testcase	{ 0xc4, 0x02, 0x1d, 0x90, 0x5c, 0x75, 0x00			}, { vpgatherdd ymm11,DWORD r13+ymm14*2+0x0,ymm12	}
+testcase	{ 0xc4, 0x02, 0x1d, 0x91, 0x5c, 0x75, 0x00			}, { vpgatherqd xmm11,DWORD r13+ymm14*2+0x0,xmm12	}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0x25, 0x08, 0x00, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm4*1+0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0x25, 0xf8, 0xff, 0xff, 0xff	}, { vpgatherdd xmm6,DWORD xmm4*1-0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0x25, 0x00, 0x00, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm4*1+0x0,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0x25, 0x98, 0x02, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm4*1+0x298,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0xe5, 0x08, 0x00, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm4*8+0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0xe5, 0xf8, 0xff, 0xff, 0xff	}, { vpgatherdd xmm6,DWORD xmm4*8-0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0xe5, 0x00, 0x00, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm4*8+0x0,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0xe5, 0x98, 0x02, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm4*8+0x298,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x90, 0x34, 0x35, 0x08, 0x00, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm14*1+0x8,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x90, 0x34, 0x35, 0xf8, 0xff, 0xff, 0xff	}, { vpgatherdd xmm6,DWORD xmm14*1-0x8,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x90, 0x34, 0x35, 0x00, 0x00, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm14*1+0x0,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x90, 0x34, 0x35, 0x98, 0x02, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm14*1+0x298,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x90, 0x34, 0xf5, 0x08, 0x00, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm14*8+0x8,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x90, 0x34, 0xf5, 0xf8, 0xff, 0xff, 0xff	}, { vpgatherdd xmm6,DWORD xmm14*8-0x8,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x90, 0x34, 0xf5, 0x00, 0x00, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm14*8+0x0,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x90, 0x34, 0xf5, 0x98, 0x02, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm14*8+0x298,xmm5		}
+testcase	{ 0xc4, 0xe2, 0xe9, 0x90, 0x4c, 0x7d, 0x00			}, { vpgatherdq xmm1,QWORD rbp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0xe9, 0x91, 0x4c, 0x7d, 0x00			}, { vpgatherqq xmm1,QWORD rbp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0xed, 0x90, 0x4c, 0x7d, 0x00			}, { vpgatherdq ymm1,QWORD rbp+xmm7*2+0x0,ymm2	}
+testcase	{ 0xc4, 0xe2, 0xed, 0x91, 0x4c, 0x7d, 0x00			}, { vpgatherqq ymm1,QWORD rbp+ymm7*2+0x0,ymm2	}
+testcase	{ 0xc4, 0x02, 0x99, 0x90, 0x5c, 0x75, 0x00			}, { vpgatherdq xmm11,QWORD r13+xmm14*2+0x0,xmm12	}
+testcase	{ 0xc4, 0x02, 0x99, 0x91, 0x5c, 0x75, 0x00			}, { vpgatherqq xmm11,QWORD r13+xmm14*2+0x0,xmm12	}
+testcase	{ 0xc4, 0x02, 0x9d, 0x90, 0x5c, 0x75, 0x00			}, { vpgatherdq ymm11,QWORD r13+xmm14*2+0x0,ymm12	}
+testcase	{ 0xc4, 0x02, 0x9d, 0x91, 0x5c, 0x75, 0x00			}, { vpgatherqq ymm11,QWORD r13+ymm14*2+0x0,ymm12	}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0x25, 0x08, 0x00, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm4*1+0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0x25, 0xf8, 0xff, 0xff, 0xff	}, { vpgatherdq ymm6,QWORD xmm4*1-0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0x25, 0x00, 0x00, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm4*1+0x0,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0x25, 0x98, 0x02, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm4*1+0x298,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0xe5, 0x08, 0x00, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm4*8+0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0xe5, 0xf8, 0xff, 0xff, 0xff	}, { vpgatherdq ymm6,QWORD xmm4*8-0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0xe5, 0x00, 0x00, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm4*8+0x0,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0xe5, 0x98, 0x02, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm4*8+0x298,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x90, 0x34, 0x35, 0x08, 0x00, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm14*1+0x8,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x90, 0x34, 0x35, 0xf8, 0xff, 0xff, 0xff	}, { vpgatherdq ymm6,QWORD xmm14*1-0x8,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x90, 0x34, 0x35, 0x00, 0x00, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm14*1+0x0,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x90, 0x34, 0x35, 0x98, 0x02, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm14*1+0x298,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x90, 0x34, 0xf5, 0x08, 0x00, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm14*8+0x8,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x90, 0x34, 0xf5, 0xf8, 0xff, 0xff, 0xff	}, { vpgatherdq ymm6,QWORD xmm14*8-0x8,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x90, 0x34, 0xf5, 0x00, 0x00, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm14*8+0x0,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x90, 0x34, 0xf5, 0x98, 0x02, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm14*8+0x298,ymm5		}
+
+; b/gas/testsuite/gas/i386/x86-64-avx2-intel.d
+testcase	{ 0xc4, 0xe2, 0x5d, 0x8c, 0x31					}, { vpmaskmovd ymm6,ymm4,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x8e, 0x21					}, { vpmaskmovd YWORD rcx,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe2, 0xdd, 0x8c, 0x31					}, { vpmaskmovq ymm6,ymm4,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x8e, 0x21					}, { vpmaskmovq YWORD rcx,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x01, 0xd6, 0x07				}, { vpermpd ymm2,ymm6,0x7				}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x01, 0x31, 0x07				}, { vpermpd ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x00, 0xd6, 0x07				}, { vpermq ymm2,ymm6,0x7				}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x00, 0x31, 0x07				}, { vpermq ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x36, 0xd4					}, { vpermd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x36, 0x11					}, { vpermd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x16, 0xd4					}, { vpermps ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x16, 0x11					}, { vpermps ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x47, 0xd4					}, { vpsllvd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x47, 0x11					}, { vpsllvd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x47, 0xd4					}, { vpsllvq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x47, 0x11					}, { vpsllvq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x46, 0xd4					}, { vpsravd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x46, 0x11					}, { vpsravd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x45, 0xd4					}, { vpsrlvd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x45, 0x11					}, { vpsrlvd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x45, 0xd4					}, { vpsrlvq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x45, 0x11					}, { vpsrlvq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x2a, 0x21					}, { vmovntdqa ymm4,YWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x19, 0xf4					}, { vbroadcastsd ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x18, 0xf4					}, { vbroadcastss ymm6,xmm4				}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x02, 0xd4, 0x07				}, { vpblendd ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x02, 0x11, 0x07				}, { vpblendd ymm2,ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x46, 0xd4, 0x07				}, { vperm2i128 ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x46, 0x11, 0x07				}, { vperm2i128 ymm2,ymm6,YWORD rcx,0x7		}
+testcase	{ 0xc4, 0xe3, 0x5d, 0x38, 0xf4, 0x07				}, { vinserti128 ymm6,ymm4,xmm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x5d, 0x38, 0x31, 0x07				}, { vinserti128 ymm6,ymm4,OWORD rcx,0x7		}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x5a, 0x21					}, { vbroadcasti128 ymm4,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x47, 0xd4					}, { vpsllvd xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x49, 0x47, 0x39					}, { vpsllvd xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x47, 0xd4					}, { vpsllvq xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x47, 0x39					}, { vpsllvq xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x46, 0xd4					}, { vpsravd xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x49, 0x46, 0x39					}, { vpsravd xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x45, 0xd4					}, { vpsrlvd xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x49, 0x45, 0x39					}, { vpsrlvd xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x45, 0xd4					}, { vpsrlvq xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x45, 0x39					}, { vpsrlvq xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x59, 0x8c, 0x31					}, { vpmaskmovd xmm6,xmm4,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xd9, 0x8c, 0x31					}, { vpmaskmovq xmm6,xmm4,OWORD rcx			}
+testcase	{ 0xc4, 0xe3, 0x7d, 0x39, 0xe6, 0x07				}, { vextracti128 xmm6,ymm4,0x7				}
+testcase	{ 0xc4, 0xe3, 0x7d, 0x39, 0x21, 0x07				}, { vextracti128 OWORD rcx,ymm4,0x7			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x8e, 0x21					}, { vpmaskmovd OWORD rcx,xmm6,xmm4			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x8e, 0x21					}, { vpmaskmovq OWORD rcx,xmm6,xmm4			}
+testcase	{ 0xc4, 0xe3, 0x49, 0x02, 0xd4, 0x07				}, { vpblendd xmm2,xmm6,xmm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x49, 0x02, 0x11, 0x07				}, { vpblendd xmm2,xmm6,OWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x59, 0xf4					}, { vpbroadcastq xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x59, 0x21					}, { vpbroadcastq xmm4,QWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x59, 0xf4					}, { vpbroadcastq ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x59, 0x21					}, { vpbroadcastq ymm4,QWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x58, 0xe4					}, { vpbroadcastd ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x58, 0x21					}, { vpbroadcastd ymm4,DWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x58, 0xf4					}, { vpbroadcastd xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x58, 0x21					}, { vpbroadcastd xmm4,DWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x79, 0xf4					}, { vpbroadcastw xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x79, 0x21					}, { vpbroadcastw xmm4,WORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x79, 0xf4					}, { vpbroadcastw ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x79, 0x21					}, { vpbroadcastw ymm4,WORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x78, 0xf4					}, { vpbroadcastb xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x78, 0x21					}, { vpbroadcastb xmm4,BYTE rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x78, 0xf4					}, { vpbroadcastb ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x78, 0x21					}, { vpbroadcastb ymm4,BYTE rcx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x18, 0xf4					}, { vbroadcastss xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x5d, 0x8c, 0x31					}, { vpmaskmovd ymm6,ymm4,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x8e, 0x21					}, { vpmaskmovd YWORD rcx,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe2, 0x5d, 0x8c, 0x31					}, { vpmaskmovd ymm6,ymm4,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x8e, 0x21					}, { vpmaskmovd YWORD rcx,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe2, 0xdd, 0x8c, 0x31					}, { vpmaskmovq ymm6,ymm4,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x8e, 0x21					}, { vpmaskmovq YWORD rcx,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe2, 0xdd, 0x8c, 0x31					}, { vpmaskmovq ymm6,ymm4,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x8e, 0x21					}, { vpmaskmovq YWORD rcx,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x01, 0xd6, 0x07				}, { vpermpd ymm2,ymm6,0x7				}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x01, 0x31, 0x07				}, { vpermpd ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x01, 0x31, 0x07				}, { vpermpd ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x00, 0xd6, 0x07				}, { vpermq ymm2,ymm6,0x7				}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x00, 0x31, 0x07				}, { vpermq ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x00, 0x31, 0x07				}, { vpermq ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x36, 0xd4					}, { vpermd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x36, 0x11					}, { vpermd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x36, 0x11					}, { vpermd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x16, 0xd4					}, { vpermps ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x16, 0x11					}, { vpermps ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x16, 0x11					}, { vpermps ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x47, 0xd4					}, { vpsllvd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x47, 0x11					}, { vpsllvd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x47, 0x11					}, { vpsllvd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x47, 0xd4					}, { vpsllvq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x47, 0x11					}, { vpsllvq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x47, 0x11					}, { vpsllvq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x46, 0xd4					}, { vpsravd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x46, 0x11					}, { vpsravd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x46, 0x11					}, { vpsravd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x45, 0xd4					}, { vpsrlvd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x45, 0x11					}, { vpsrlvd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x45, 0x11					}, { vpsrlvd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x45, 0xd4					}, { vpsrlvq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x45, 0x11					}, { vpsrlvq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x45, 0x11					}, { vpsrlvq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x2a, 0x21					}, { vmovntdqa ymm4,YWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x2a, 0x21					}, { vmovntdqa ymm4,YWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x19, 0xf4					}, { vbroadcastsd ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x18, 0xf4					}, { vbroadcastss ymm6,xmm4				}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x02, 0xd4, 0x07				}, { vpblendd ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x02, 0x11, 0x07				}, { vpblendd ymm2,ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x02, 0x11, 0x07				}, { vpblendd ymm2,ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x46, 0xd4, 0x07				}, { vperm2i128 ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x46, 0x11, 0x07				}, { vperm2i128 ymm2,ymm6,YWORD rcx,0x7		}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x46, 0x11, 0x07				}, { vperm2i128 ymm2,ymm6,YWORD rcx,0x7		}
+testcase	{ 0xc4, 0xe3, 0x5d, 0x38, 0xf4, 0x07				}, { vinserti128 ymm6,ymm4,xmm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x5d, 0x38, 0x31, 0x07				}, { vinserti128 ymm6,ymm4,OWORD rcx,0x7		}
+testcase	{ 0xc4, 0xe3, 0x5d, 0x38, 0x31, 0x07				}, { vinserti128 ymm6,ymm4,OWORD rcx,0x7		}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x5a, 0x21					}, { vbroadcasti128 ymm4,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x5a, 0x21					}, { vbroadcasti128 ymm4,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x47, 0xd4					}, { vpsllvd xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x49, 0x47, 0x39					}, { vpsllvd xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x47, 0x39					}, { vpsllvd xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x47, 0xd4					}, { vpsllvq xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x47, 0x39					}, { vpsllvq xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x47, 0x39					}, { vpsllvq xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x46, 0xd4					}, { vpsravd xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x49, 0x46, 0x39					}, { vpsravd xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x46, 0x39					}, { vpsravd xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x45, 0xd4					}, { vpsrlvd xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x49, 0x45, 0x39					}, { vpsrlvd xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x45, 0x39					}, { vpsrlvd xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x45, 0xd4					}, { vpsrlvq xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x45, 0x39					}, { vpsrlvq xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x45, 0x39					}, { vpsrlvq xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x59, 0x8c, 0x31					}, { vpmaskmovd xmm6,xmm4,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x59, 0x8c, 0x31					}, { vpmaskmovd xmm6,xmm4,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xd9, 0x8c, 0x31					}, { vpmaskmovq xmm6,xmm4,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xd9, 0x8c, 0x31					}, { vpmaskmovq xmm6,xmm4,OWORD rcx			}
+testcase	{ 0xc4, 0xe3, 0x7d, 0x39, 0xe6, 0x07				}, { vextracti128 xmm6,ymm4,0x7				}
+testcase	{ 0xc4, 0xe3, 0x7d, 0x39, 0x21, 0x07				}, { vextracti128 OWORD rcx,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x7d, 0x39, 0x21, 0x07				}, { vextracti128 OWORD rcx,ymm4,0x7			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x8e, 0x21					}, { vpmaskmovd OWORD rcx,xmm6,xmm4			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x8e, 0x21					}, { vpmaskmovd OWORD rcx,xmm6,xmm4			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x8e, 0x21					}, { vpmaskmovq OWORD rcx,xmm6,xmm4			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x8e, 0x21					}, { vpmaskmovq OWORD rcx,xmm6,xmm4			}
+testcase	{ 0xc4, 0xe3, 0x49, 0x02, 0xd4, 0x07				}, { vpblendd xmm2,xmm6,xmm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x49, 0x02, 0x11, 0x07				}, { vpblendd xmm2,xmm6,OWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x49, 0x02, 0x11, 0x07				}, { vpblendd xmm2,xmm6,OWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x59, 0xf4					}, { vpbroadcastq xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x59, 0x21					}, { vpbroadcastq xmm4,QWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x59, 0x21					}, { vpbroadcastq xmm4,QWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x59, 0xf4					}, { vpbroadcastq ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x59, 0x21					}, { vpbroadcastq ymm4,QWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x59, 0x21					}, { vpbroadcastq ymm4,QWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x58, 0xe4					}, { vpbroadcastd ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x58, 0x21					}, { vpbroadcastd ymm4,DWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x58, 0x21					}, { vpbroadcastd ymm4,DWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x58, 0xf4					}, { vpbroadcastd xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x58, 0x21					}, { vpbroadcastd xmm4,DWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x58, 0x21					}, { vpbroadcastd xmm4,DWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x79, 0xf4					}, { vpbroadcastw xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x79, 0x21					}, { vpbroadcastw xmm4,WORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x79, 0x21					}, { vpbroadcastw xmm4,WORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x79, 0xf4					}, { vpbroadcastw ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x79, 0x21					}, { vpbroadcastw ymm4,WORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x79, 0x21					}, { vpbroadcastw ymm4,WORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x78, 0xf4					}, { vpbroadcastb xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x78, 0x21					}, { vpbroadcastb xmm4,BYTE rcx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x78, 0x21					}, { vpbroadcastb xmm4,BYTE rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x78, 0xf4					}, { vpbroadcastb ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x78, 0x21					}, { vpbroadcastb ymm4,BYTE rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x78, 0x21					}, { vpbroadcastb ymm4,BYTE rcx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x18, 0xf4					}, { vbroadcastss xmm6,xmm4				}
+
+; b/gas/testsuite/gas/i386/x86-64-avx256int-intel.d
+testcase	{ 0xc5, 0xfd, 0xd7, 0xcc					}, { vpmovmskb ecx,ymm4					}
+testcase	{ 0xc5, 0xfd, 0xd7, 0xcc					}, { vpmovmskb ecx,ymm4					}
+testcase	{ 0xc5, 0xed, 0x72, 0xf6, 0x07					}, { vpslld ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xfe, 0x07					}, { vpslldq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xf6, 0x07					}, { vpsllq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x71, 0xf6, 0x07					}, { vpsllw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x72, 0xe6, 0x07					}, { vpsrad ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x71, 0xe6, 0x07					}, { vpsraw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x72, 0xd6, 0x07					}, { vpsrld ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xde, 0x07					}, { vpsrldq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xd6, 0x07					}, { vpsrlq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x71, 0xd6, 0x07					}, { vpsrlw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xfd, 0x70, 0xd6, 0x07					}, { vpshufd ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xfd, 0x70, 0x31, 0x07					}, { vpshufd ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc5, 0xfe, 0x70, 0xd6, 0x07					}, { vpshufhw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xfe, 0x70, 0x31, 0x07					}, { vpshufhw ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc5, 0xff, 0x70, 0xd6, 0x07					}, { vpshuflw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xff, 0x70, 0x31, 0x07					}, { vpshuflw ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc5, 0xcd, 0x6b, 0xd4					}, { vpackssdw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6b, 0x11					}, { vpackssdw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x63, 0xd4					}, { vpacksswb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x63, 0x11					}, { vpacksswb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x2b, 0xd4					}, { vpackusdw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x2b, 0x11					}, { vpackusdw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x67, 0xd4					}, { vpackuswb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x67, 0x11					}, { vpackuswb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfc, 0xd4					}, { vpaddb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfc, 0x11					}, { vpaddb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfd, 0xd4					}, { vpaddw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfd, 0x11					}, { vpaddw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfe, 0xd4					}, { vpaddd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfe, 0x11					}, { vpaddd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd4, 0xd4					}, { vpaddq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd4, 0x11					}, { vpaddq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xec, 0xd4					}, { vpaddsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xec, 0x11					}, { vpaddsb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xed, 0xd4					}, { vpaddsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xed, 0x11					}, { vpaddsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xdc, 0xd4					}, { vpaddusb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdc, 0x11					}, { vpaddusb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xdd, 0xd4					}, { vpaddusw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdd, 0x11					}, { vpaddusw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xdb, 0xd4					}, { vpand ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdb, 0x11					}, { vpand ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xdf, 0xd4					}, { vpandn ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdf, 0x11					}, { vpandn ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe0, 0xd4					}, { vpavgb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe0, 0x11					}, { vpavgb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe3, 0xd4					}, { vpavgw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe3, 0x11					}, { vpavgw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x74, 0xd4					}, { vpcmpeqb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x74, 0x11					}, { vpcmpeqb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x75, 0xd4					}, { vpcmpeqw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x75, 0x11					}, { vpcmpeqw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x76, 0xd4					}, { vpcmpeqd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x76, 0x11					}, { vpcmpeqd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x29, 0xd4					}, { vpcmpeqq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x29, 0x11					}, { vpcmpeqq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x64, 0xd4					}, { vpcmpgtb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x64, 0x11					}, { vpcmpgtb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x65, 0xd4					}, { vpcmpgtw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x65, 0x11					}, { vpcmpgtw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x66, 0xd4					}, { vpcmpgtd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x66, 0x11					}, { vpcmpgtd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x37, 0xd4					}, { vpcmpgtq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x37, 0x11					}, { vpcmpgtq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x01, 0xd4					}, { vphaddw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x01, 0x11					}, { vphaddw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x02, 0xd4					}, { vphaddd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x02, 0x11					}, { vphaddd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x03, 0xd4					}, { vphaddsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x03, 0x11					}, { vphaddsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x05, 0xd4					}, { vphsubw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x05, 0x11					}, { vphsubw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x06, 0xd4					}, { vphsubd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x06, 0x11					}, { vphsubd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x07, 0xd4					}, { vphsubsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x07, 0x11					}, { vphsubsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf5, 0xd4					}, { vpmaddwd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf5, 0x11					}, { vpmaddwd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x04, 0xd4					}, { vpmaddubsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x04, 0x11					}, { vpmaddubsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3c, 0xd4					}, { vpmaxsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3c, 0x11					}, { vpmaxsb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xee, 0xd4					}, { vpmaxsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xee, 0x11					}, { vpmaxsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3d, 0xd4					}, { vpmaxsd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3d, 0x11					}, { vpmaxsd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xde, 0xd4					}, { vpmaxub ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xde, 0x11					}, { vpmaxub ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3e, 0xd4					}, { vpmaxuw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3e, 0x11					}, { vpmaxuw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3f, 0xd4					}, { vpmaxud ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3f, 0x11					}, { vpmaxud ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x38, 0xd4					}, { vpminsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x38, 0x11					}, { vpminsb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xea, 0xd4					}, { vpminsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xea, 0x11					}, { vpminsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x39, 0xd4					}, { vpminsd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x39, 0x11					}, { vpminsd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xda, 0xd4					}, { vpminub ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xda, 0x11					}, { vpminub ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3a, 0xd4					}, { vpminuw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3a, 0x11					}, { vpminuw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3b, 0xd4					}, { vpminud ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3b, 0x11					}, { vpminud ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe4, 0xd4					}, { vpmulhuw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe4, 0x11					}, { vpmulhuw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0b, 0xd4					}, { vpmulhrsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0b, 0x11					}, { vpmulhrsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe5, 0xd4					}, { vpmulhw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe5, 0x11					}, { vpmulhw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd5, 0xd4					}, { vpmullw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd5, 0x11					}, { vpmullw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x40, 0xd4					}, { vpmulld ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x40, 0x11					}, { vpmulld ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf4, 0xd4					}, { vpmuludq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf4, 0x11					}, { vpmuludq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x28, 0xd4					}, { vpmuldq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x28, 0x11					}, { vpmuldq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xeb, 0xd4					}, { vpor ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xeb, 0x11					}, { vpor ymm2,ymm6,YWORD rcx				}
+testcase	{ 0xc5, 0xcd, 0xf6, 0xd4					}, { vpsadbw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf6, 0x11					}, { vpsadbw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x00, 0xd4					}, { vpshufb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x00, 0x11					}, { vpshufb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x08, 0xd4					}, { vpsignb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x08, 0x11					}, { vpsignb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x09, 0xd4					}, { vpsignw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x09, 0x11					}, { vpsignw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0a, 0xd4					}, { vpsignd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0a, 0x11					}, { vpsignd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf8, 0xd4					}, { vpsubb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf8, 0x11					}, { vpsubb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf9, 0xd4					}, { vpsubw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf9, 0x11					}, { vpsubw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfa, 0xd4					}, { vpsubd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfa, 0x11					}, { vpsubd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfb, 0xd4					}, { vpsubq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfb, 0x11					}, { vpsubq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe8, 0xd4					}, { vpsubsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe8, 0x11					}, { vpsubsb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe9, 0xd4					}, { vpsubsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe9, 0x11					}, { vpsubsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd8, 0xd4					}, { vpsubusb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd8, 0x11					}, { vpsubusb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd9, 0xd4					}, { vpsubusw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd9, 0x11					}, { vpsubusw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x68, 0xd4					}, { vpunpckhbw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x68, 0x11					}, { vpunpckhbw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x69, 0xd4					}, { vpunpckhwd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x69, 0x11					}, { vpunpckhwd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x6a, 0xd4					}, { vpunpckhdq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6a, 0x11					}, { vpunpckhdq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x6d, 0xd4					}, { vpunpckhqdq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6d, 0x11					}, { vpunpckhqdq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x60, 0xd4					}, { vpunpcklbw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x60, 0x11					}, { vpunpcklbw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x61, 0xd4					}, { vpunpcklwd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x61, 0x11					}, { vpunpcklwd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x62, 0xd4					}, { vpunpckldq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x62, 0x11					}, { vpunpckldq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x6c, 0xd4					}, { vpunpcklqdq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6c, 0x11					}, { vpunpcklqdq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xef, 0xd4					}, { vpxor ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xef, 0x11					}, { vpxor ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1c, 0xf4					}, { vpabsb ymm6,ymm4					}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1c, 0x21					}, { vpabsb ymm4,YWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1d, 0xf4					}, { vpabsw ymm6,ymm4					}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1d, 0x21					}, { vpabsw ymm4,YWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1e, 0xf4					}, { vpabsd ymm6,ymm4					}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1e, 0x21					}, { vpabsd ymm4,YWORD rcx				}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x42, 0xd4, 0x07				}, { vmpsadbw ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x42, 0x11, 0x07				}, { vmpsadbw ymm2,ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0f, 0xd4, 0x07				}, { vpalignr ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0f, 0x11, 0x07				}, { vpalignr ymm2,ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0e, 0xd4, 0x07				}, { vpblendw ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0e, 0x11, 0x07				}, { vpblendw ymm2,ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x6d, 0x4c, 0xfe, 0x40				}, { vpblendvb ymm7,ymm2,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe3, 0x6d, 0x4c, 0x39, 0x40				}, { vpblendvb ymm7,ymm2,YWORD rcx,ymm4		}
+testcase	{ 0xc5, 0xcd, 0xf1, 0xd4					}, { vpsllw ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xf1, 0x11					}, { vpsllw ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf2, 0xd4					}, { vpslld ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xf2, 0x11					}, { vpslld ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf3, 0xd4					}, { vpsllq ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xf3, 0x11					}, { vpsllq ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe1, 0xd4					}, { vpsraw ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xe1, 0x11					}, { vpsraw ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe2, 0xd4					}, { vpsrad ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xe2, 0x11					}, { vpsrad ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd1, 0xd4					}, { vpsrlw ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xd1, 0x11					}, { vpsrlw ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd2, 0xd4					}, { vpsrld ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xd2, 0x11					}, { vpsrld ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd3, 0xd4					}, { vpsrlq ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xd3, 0x11					}, { vpsrlq ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x20, 0xe4					}, { vpmovsxbw ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x20, 0x21					}, { vpmovsxbw ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x23, 0xe4					}, { vpmovsxwd ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x23, 0x21					}, { vpmovsxwd ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x25, 0xe4					}, { vpmovsxdq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x25, 0x21					}, { vpmovsxdq ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x30, 0xe4					}, { vpmovzxbw ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x30, 0x21					}, { vpmovzxbw ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x33, 0xe4					}, { vpmovzxwd ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x33, 0x21					}, { vpmovzxwd ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x35, 0xe4					}, { vpmovzxdq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x35, 0x21					}, { vpmovzxdq ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x21, 0xf4					}, { vpmovsxbd ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x21, 0x21					}, { vpmovsxbd ymm4,QWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x24, 0xf4					}, { vpmovsxwq ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x24, 0x21					}, { vpmovsxwq ymm4,QWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x31, 0xf4					}, { vpmovzxbd ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x31, 0x21					}, { vpmovzxbd ymm4,QWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x34, 0xf4					}, { vpmovzxwq ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x34, 0x21					}, { vpmovzxwq ymm4,QWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x22, 0xe4					}, { vpmovsxbq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x22, 0x21					}, { vpmovsxbq ymm4,DWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x32, 0xe4					}, { vpmovzxbq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x32, 0x21					}, { vpmovzxbq ymm4,DWORD rcx				}
+testcase	{ 0xc5, 0xfd, 0xd7, 0xcc					}, { vpmovmskb ecx,ymm4					}
+testcase	{ 0xc5, 0xfd, 0xd7, 0xcc					}, { vpmovmskb ecx,ymm4					}
+testcase	{ 0xc5, 0xed, 0x72, 0xf6, 0x07					}, { vpslld ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xfe, 0x07					}, { vpslldq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xf6, 0x07					}, { vpsllq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x71, 0xf6, 0x07					}, { vpsllw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x72, 0xe6, 0x07					}, { vpsrad ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x71, 0xe6, 0x07					}, { vpsraw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x72, 0xd6, 0x07					}, { vpsrld ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xde, 0x07					}, { vpsrldq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xd6, 0x07					}, { vpsrlq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x71, 0xd6, 0x07					}, { vpsrlw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xfd, 0x70, 0xd6, 0x07					}, { vpshufd ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xfd, 0x70, 0x31, 0x07					}, { vpshufd ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc5, 0xfd, 0x70, 0x31, 0x07					}, { vpshufd ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc5, 0xfe, 0x70, 0xd6, 0x07					}, { vpshufhw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xfe, 0x70, 0x31, 0x07					}, { vpshufhw ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc5, 0xfe, 0x70, 0x31, 0x07					}, { vpshufhw ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc5, 0xff, 0x70, 0xd6, 0x07					}, { vpshuflw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xff, 0x70, 0x31, 0x07					}, { vpshuflw ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc5, 0xff, 0x70, 0x31, 0x07					}, { vpshuflw ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc5, 0xcd, 0x6b, 0xd4					}, { vpackssdw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6b, 0x11					}, { vpackssdw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x6b, 0x11					}, { vpackssdw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x63, 0xd4					}, { vpacksswb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x63, 0x11					}, { vpacksswb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x63, 0x11					}, { vpacksswb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x2b, 0xd4					}, { vpackusdw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x2b, 0x11					}, { vpackusdw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x2b, 0x11					}, { vpackusdw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x67, 0xd4					}, { vpackuswb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x67, 0x11					}, { vpackuswb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x67, 0x11					}, { vpackuswb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfc, 0xd4					}, { vpaddb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfc, 0x11					}, { vpaddb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfc, 0x11					}, { vpaddb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfd, 0xd4					}, { vpaddw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfd, 0x11					}, { vpaddw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfd, 0x11					}, { vpaddw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfe, 0xd4					}, { vpaddd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfe, 0x11					}, { vpaddd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfe, 0x11					}, { vpaddd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd4, 0xd4					}, { vpaddq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd4, 0x11					}, { vpaddq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd4, 0x11					}, { vpaddq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xec, 0xd4					}, { vpaddsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xec, 0x11					}, { vpaddsb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xec, 0x11					}, { vpaddsb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xed, 0xd4					}, { vpaddsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xed, 0x11					}, { vpaddsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xed, 0x11					}, { vpaddsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xdc, 0xd4					}, { vpaddusb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdc, 0x11					}, { vpaddusb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xdc, 0x11					}, { vpaddusb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xdd, 0xd4					}, { vpaddusw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdd, 0x11					}, { vpaddusw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xdd, 0x11					}, { vpaddusw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xdb, 0xd4					}, { vpand ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdb, 0x11					}, { vpand ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xdb, 0x11					}, { vpand ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xdf, 0xd4					}, { vpandn ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdf, 0x11					}, { vpandn ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xdf, 0x11					}, { vpandn ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe0, 0xd4					}, { vpavgb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe0, 0x11					}, { vpavgb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe0, 0x11					}, { vpavgb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe3, 0xd4					}, { vpavgw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe3, 0x11					}, { vpavgw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe3, 0x11					}, { vpavgw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x74, 0xd4					}, { vpcmpeqb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x74, 0x11					}, { vpcmpeqb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x74, 0x11					}, { vpcmpeqb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x75, 0xd4					}, { vpcmpeqw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x75, 0x11					}, { vpcmpeqw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x75, 0x11					}, { vpcmpeqw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x76, 0xd4					}, { vpcmpeqd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x76, 0x11					}, { vpcmpeqd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x76, 0x11					}, { vpcmpeqd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x29, 0xd4					}, { vpcmpeqq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x29, 0x11					}, { vpcmpeqq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x29, 0x11					}, { vpcmpeqq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x64, 0xd4					}, { vpcmpgtb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x64, 0x11					}, { vpcmpgtb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x64, 0x11					}, { vpcmpgtb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x65, 0xd4					}, { vpcmpgtw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x65, 0x11					}, { vpcmpgtw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x65, 0x11					}, { vpcmpgtw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x66, 0xd4					}, { vpcmpgtd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x66, 0x11					}, { vpcmpgtd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x66, 0x11					}, { vpcmpgtd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x37, 0xd4					}, { vpcmpgtq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x37, 0x11					}, { vpcmpgtq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x37, 0x11					}, { vpcmpgtq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x01, 0xd4					}, { vphaddw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x01, 0x11					}, { vphaddw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x01, 0x11					}, { vphaddw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x02, 0xd4					}, { vphaddd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x02, 0x11					}, { vphaddd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x02, 0x11					}, { vphaddd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x03, 0xd4					}, { vphaddsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x03, 0x11					}, { vphaddsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x03, 0x11					}, { vphaddsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x05, 0xd4					}, { vphsubw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x05, 0x11					}, { vphsubw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x05, 0x11					}, { vphsubw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x06, 0xd4					}, { vphsubd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x06, 0x11					}, { vphsubd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x06, 0x11					}, { vphsubd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x07, 0xd4					}, { vphsubsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x07, 0x11					}, { vphsubsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x07, 0x11					}, { vphsubsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf5, 0xd4					}, { vpmaddwd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf5, 0x11					}, { vpmaddwd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf5, 0x11					}, { vpmaddwd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x04, 0xd4					}, { vpmaddubsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x04, 0x11					}, { vpmaddubsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x04, 0x11					}, { vpmaddubsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3c, 0xd4					}, { vpmaxsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3c, 0x11					}, { vpmaxsb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3c, 0x11					}, { vpmaxsb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xee, 0xd4					}, { vpmaxsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xee, 0x11					}, { vpmaxsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xee, 0x11					}, { vpmaxsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3d, 0xd4					}, { vpmaxsd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3d, 0x11					}, { vpmaxsd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3d, 0x11					}, { vpmaxsd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xde, 0xd4					}, { vpmaxub ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xde, 0x11					}, { vpmaxub ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xde, 0x11					}, { vpmaxub ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3e, 0xd4					}, { vpmaxuw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3e, 0x11					}, { vpmaxuw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3e, 0x11					}, { vpmaxuw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3f, 0xd4					}, { vpmaxud ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3f, 0x11					}, { vpmaxud ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3f, 0x11					}, { vpmaxud ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x38, 0xd4					}, { vpminsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x38, 0x11					}, { vpminsb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x38, 0x11					}, { vpminsb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xea, 0xd4					}, { vpminsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xea, 0x11					}, { vpminsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xea, 0x11					}, { vpminsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x39, 0xd4					}, { vpminsd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x39, 0x11					}, { vpminsd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x39, 0x11					}, { vpminsd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xda, 0xd4					}, { vpminub ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xda, 0x11					}, { vpminub ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xda, 0x11					}, { vpminub ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3a, 0xd4					}, { vpminuw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3a, 0x11					}, { vpminuw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3a, 0x11					}, { vpminuw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3b, 0xd4					}, { vpminud ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3b, 0x11					}, { vpminud ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3b, 0x11					}, { vpminud ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe4, 0xd4					}, { vpmulhuw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe4, 0x11					}, { vpmulhuw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe4, 0x11					}, { vpmulhuw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0b, 0xd4					}, { vpmulhrsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0b, 0x11					}, { vpmulhrsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0b, 0x11					}, { vpmulhrsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe5, 0xd4					}, { vpmulhw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe5, 0x11					}, { vpmulhw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe5, 0x11					}, { vpmulhw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd5, 0xd4					}, { vpmullw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd5, 0x11					}, { vpmullw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd5, 0x11					}, { vpmullw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x40, 0xd4					}, { vpmulld ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x40, 0x11					}, { vpmulld ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x40, 0x11					}, { vpmulld ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf4, 0xd4					}, { vpmuludq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf4, 0x11					}, { vpmuludq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf4, 0x11					}, { vpmuludq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x28, 0xd4					}, { vpmuldq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x28, 0x11					}, { vpmuldq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x28, 0x11					}, { vpmuldq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xeb, 0xd4					}, { vpor ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xeb, 0x11					}, { vpor ymm2,ymm6,YWORD rcx				}
+testcase	{ 0xc5, 0xcd, 0xeb, 0x11					}, { vpor ymm2,ymm6,YWORD rcx				}
+testcase	{ 0xc5, 0xcd, 0xf6, 0xd4					}, { vpsadbw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf6, 0x11					}, { vpsadbw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf6, 0x11					}, { vpsadbw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x00, 0xd4					}, { vpshufb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x00, 0x11					}, { vpshufb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x00, 0x11					}, { vpshufb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x08, 0xd4					}, { vpsignb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x08, 0x11					}, { vpsignb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x08, 0x11					}, { vpsignb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x09, 0xd4					}, { vpsignw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x09, 0x11					}, { vpsignw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x09, 0x11					}, { vpsignw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0a, 0xd4					}, { vpsignd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0a, 0x11					}, { vpsignd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0a, 0x11					}, { vpsignd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf8, 0xd4					}, { vpsubb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf8, 0x11					}, { vpsubb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf8, 0x11					}, { vpsubb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf9, 0xd4					}, { vpsubw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf9, 0x11					}, { vpsubw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf9, 0x11					}, { vpsubw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfa, 0xd4					}, { vpsubd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfa, 0x11					}, { vpsubd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfa, 0x11					}, { vpsubd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfb, 0xd4					}, { vpsubq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfb, 0x11					}, { vpsubq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfb, 0x11					}, { vpsubq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe8, 0xd4					}, { vpsubsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe8, 0x11					}, { vpsubsb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe8, 0x11					}, { vpsubsb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe9, 0xd4					}, { vpsubsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe9, 0x11					}, { vpsubsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe9, 0x11					}, { vpsubsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd8, 0xd4					}, { vpsubusb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd8, 0x11					}, { vpsubusb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd8, 0x11					}, { vpsubusb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd9, 0xd4					}, { vpsubusw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd9, 0x11					}, { vpsubusw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd9, 0x11					}, { vpsubusw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x68, 0xd4					}, { vpunpckhbw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x68, 0x11					}, { vpunpckhbw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x68, 0x11					}, { vpunpckhbw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x69, 0xd4					}, { vpunpckhwd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x69, 0x11					}, { vpunpckhwd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x69, 0x11					}, { vpunpckhwd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x6a, 0xd4					}, { vpunpckhdq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6a, 0x11					}, { vpunpckhdq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x6a, 0x11					}, { vpunpckhdq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x6d, 0xd4					}, { vpunpckhqdq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6d, 0x11					}, { vpunpckhqdq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x6d, 0x11					}, { vpunpckhqdq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x60, 0xd4					}, { vpunpcklbw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x60, 0x11					}, { vpunpcklbw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x60, 0x11					}, { vpunpcklbw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x61, 0xd4					}, { vpunpcklwd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x61, 0x11					}, { vpunpcklwd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x61, 0x11					}, { vpunpcklwd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x62, 0xd4					}, { vpunpckldq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x62, 0x11					}, { vpunpckldq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x62, 0x11					}, { vpunpckldq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x6c, 0xd4					}, { vpunpcklqdq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6c, 0x11					}, { vpunpcklqdq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x6c, 0x11					}, { vpunpcklqdq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xef, 0xd4					}, { vpxor ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xef, 0x11					}, { vpxor ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xef, 0x11					}, { vpxor ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1c, 0xf4					}, { vpabsb ymm6,ymm4					}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1c, 0x21					}, { vpabsb ymm4,YWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1c, 0x21					}, { vpabsb ymm4,YWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1d, 0xf4					}, { vpabsw ymm6,ymm4					}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1d, 0x21					}, { vpabsw ymm4,YWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1d, 0x21					}, { vpabsw ymm4,YWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1e, 0xf4					}, { vpabsd ymm6,ymm4					}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1e, 0x21					}, { vpabsd ymm4,YWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1e, 0x21					}, { vpabsd ymm4,YWORD rcx				}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x42, 0xd4, 0x07				}, { vmpsadbw ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x42, 0x11, 0x07				}, { vmpsadbw ymm2,ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x42, 0x11, 0x07				}, { vmpsadbw ymm2,ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0f, 0xd4, 0x07				}, { vpalignr ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0f, 0x11, 0x07				}, { vpalignr ymm2,ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0f, 0x11, 0x07				}, { vpalignr ymm2,ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0e, 0xd4, 0x07				}, { vpblendw ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0e, 0x11, 0x07				}, { vpblendw ymm2,ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0e, 0x11, 0x07				}, { vpblendw ymm2,ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x6d, 0x4c, 0xfe, 0x40				}, { vpblendvb ymm7,ymm2,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe3, 0x6d, 0x4c, 0x39, 0x40				}, { vpblendvb ymm7,ymm2,YWORD rcx,ymm4		}
+testcase	{ 0xc4, 0xe3, 0x6d, 0x4c, 0x39, 0x40				}, { vpblendvb ymm7,ymm2,YWORD rcx,ymm4		}
+testcase	{ 0xc5, 0xcd, 0xf1, 0xd4					}, { vpsllw ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xf1, 0x11					}, { vpsllw ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf1, 0x11					}, { vpsllw ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf2, 0xd4					}, { vpslld ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xf2, 0x11					}, { vpslld ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf2, 0x11					}, { vpslld ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf3, 0xd4					}, { vpsllq ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xf3, 0x11					}, { vpsllq ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf3, 0x11					}, { vpsllq ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe1, 0xd4					}, { vpsraw ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xe1, 0x11					}, { vpsraw ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe1, 0x11					}, { vpsraw ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe2, 0xd4					}, { vpsrad ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xe2, 0x11					}, { vpsrad ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe2, 0x11					}, { vpsrad ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd1, 0xd4					}, { vpsrlw ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xd1, 0x11					}, { vpsrlw ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd1, 0x11					}, { vpsrlw ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd2, 0xd4					}, { vpsrld ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xd2, 0x11					}, { vpsrld ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd2, 0x11					}, { vpsrld ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd3, 0xd4					}, { vpsrlq ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xd3, 0x11					}, { vpsrlq ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd3, 0x11					}, { vpsrlq ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x20, 0xe4					}, { vpmovsxbw ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x20, 0x21					}, { vpmovsxbw ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x20, 0x21					}, { vpmovsxbw ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x23, 0xe4					}, { vpmovsxwd ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x23, 0x21					}, { vpmovsxwd ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x23, 0x21					}, { vpmovsxwd ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x25, 0xe4					}, { vpmovsxdq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x25, 0x21					}, { vpmovsxdq ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x25, 0x21					}, { vpmovsxdq ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x30, 0xe4					}, { vpmovzxbw ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x30, 0x21					}, { vpmovzxbw ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x30, 0x21					}, { vpmovzxbw ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x33, 0xe4					}, { vpmovzxwd ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x33, 0x21					}, { vpmovzxwd ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x33, 0x21					}, { vpmovzxwd ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x35, 0xe4					}, { vpmovzxdq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x35, 0x21					}, { vpmovzxdq ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x35, 0x21					}, { vpmovzxdq ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x21, 0xf4					}, { vpmovsxbd ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x21, 0x21					}, { vpmovsxbd ymm4,QWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x21, 0x21					}, { vpmovsxbd ymm4,QWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x24, 0xf4					}, { vpmovsxwq ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x24, 0x21					}, { vpmovsxwq ymm4,QWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x24, 0x21					}, { vpmovsxwq ymm4,QWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x31, 0xf4					}, { vpmovzxbd ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x31, 0x21					}, { vpmovzxbd ymm4,QWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x31, 0x21					}, { vpmovzxbd ymm4,QWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x34, 0xf4					}, { vpmovzxwq ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x34, 0x21					}, { vpmovzxwq ymm4,QWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x34, 0x21					}, { vpmovzxwq ymm4,QWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x22, 0xe4					}, { vpmovsxbq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x22, 0x21					}, { vpmovsxbq ymm4,DWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x22, 0x21					}, { vpmovsxbq ymm4,DWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x32, 0xe4					}, { vpmovzxbq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x32, 0x21					}, { vpmovzxbq ymm4,DWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x32, 0x21					}, { vpmovzxbq ymm4,DWORD rcx				}
+
+; EOF

_service:tar_scm:nasm-2.16.03.tar.xz/test/avx512cd.asm Added

@@ -0,0 +1,106 @@
+;Testname=avx512cd; Arguments=-fbin -oavx512cd.bin -O0 -DSRC; Files=stdout stderr avx512cd.bin
+; AVX-512CD testcases from gas
+;------------------------
+;
+; This file is taken from there
+;     https://gnu.googlesource.com/binutils/+/master/gas/testsuite/gas/i386/x86-64-avx512cd-intel.d
+; So the original author is "H.J. Lu" <hongjiu dot lu at intel dot com>
+;
+; Jin Kyu Song converted it for the nasm testing suite using gas2nasm.py
+
+%macro testcase 2
+ %ifdef BIN
+  db %1
+ %endif
+ %ifdef SRC
+  %2
+ %endif
+%endmacro
+
+
+bits 64
+
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0xc4, 0xf5                                     }, { vpconflictd zmm30,zmm29                                      }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0xc4, 0xf5                                     }, { vpconflictd zmm30{k7},zmm29                                  }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0xc4, 0xf5                                     }, { vpconflictd zmm30{k7}{z},zmm29                               }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xc4, 0x31                                     }, { vpconflictd zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0xc4, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpconflictd zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xc4, 0x31                                     }, { vpconflictd zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xc4, 0x72, 0x7f                               }, { vpconflictd zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xc4, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpconflictd zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xc4, 0x72, 0x80                               }, { vpconflictd zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xc4, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpconflictd zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xc4, 0x72, 0x7f                               }, { vpconflictd zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xc4, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpconflictd zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xc4, 0x72, 0x80                               }, { vpconflictd zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xc4, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpconflictd zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0xc4, 0xf5                                     }, { vpconflictq zmm30,zmm29                                      }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0xc4, 0xf5                                     }, { vpconflictq zmm30{k7},zmm29                                  }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0xc4, 0xf5                                     }, { vpconflictq zmm30{k7}{z},zmm29                               }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xc4, 0x31                                     }, { vpconflictq zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0xc4, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpconflictq zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xc4, 0x31                                     }, { vpconflictq zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xc4, 0x72, 0x7f                               }, { vpconflictq zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xc4, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpconflictq zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xc4, 0x72, 0x80                               }, { vpconflictq zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xc4, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpconflictq zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xc4, 0x72, 0x7f                               }, { vpconflictq zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xc4, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpconflictq zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xc4, 0x72, 0x80                               }, { vpconflictq zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xc4, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpconflictq zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0x44, 0xf5                                     }, { vplzcntd zmm30,zmm29                                         }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x44, 0xf5                                     }, { vplzcntd zmm30{k7},zmm29                                     }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x44, 0xf5                                     }, { vplzcntd zmm30{k7}{z},zmm29                                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x44, 0x31                                     }, { vplzcntd zmm30,ZWORD rcx                                   }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x44, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vplzcntd zmm30,ZWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x44, 0x31                                     }, { vplzcntd zmm30,DWORD rcx{1to16}                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x44, 0x72, 0x7f                               }, { vplzcntd zmm30,ZWORD rdx+0x1fc0                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x44, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vplzcntd zmm30,ZWORD rdx+0x2000                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x44, 0x72, 0x80                               }, { vplzcntd zmm30,ZWORD rdx-0x2000                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x44, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vplzcntd zmm30,ZWORD rdx-0x2040                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x44, 0x72, 0x7f                               }, { vplzcntd zmm30,DWORD rdx+0x1fc{1to16}                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x44, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vplzcntd zmm30,DWORD rdx+0x200{1to16}                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x44, 0x72, 0x80                               }, { vplzcntd zmm30,DWORD rdx-0x200{1to16}                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x44, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vplzcntd zmm30,DWORD rdx-0x204{1to16}                      }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0x44, 0xf5                                     }, { vplzcntq zmm30,zmm29                                         }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0x44, 0xf5                                     }, { vplzcntq zmm30{k7},zmm29                                     }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0x44, 0xf5                                     }, { vplzcntq zmm30{k7}{z},zmm29                                  }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x44, 0x31                                     }, { vplzcntq zmm30,ZWORD rcx                                   }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x44, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vplzcntq zmm30,ZWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x44, 0x31                                     }, { vplzcntq zmm30,QWORD rcx{1to8}                             }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x44, 0x72, 0x7f                               }, { vplzcntq zmm30,ZWORD rdx+0x1fc0                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x44, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vplzcntq zmm30,ZWORD rdx+0x2000                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x44, 0x72, 0x80                               }, { vplzcntq zmm30,ZWORD rdx-0x2000                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x44, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vplzcntq zmm30,ZWORD rdx-0x2040                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x44, 0x72, 0x7f                               }, { vplzcntq zmm30,QWORD rdx+0x3f8{1to8}                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x44, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vplzcntq zmm30,QWORD rdx+0x400{1to8}                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x44, 0x72, 0x80                               }, { vplzcntq zmm30,QWORD rdx-0x400{1to8}                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x44, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vplzcntq zmm30,QWORD rdx-0x408{1to8}                       }
+testcase	{ 0x62, 0x92, 0x16, 0x40, 0x27, 0xec                                     }, { vptestnmd k5,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x92, 0x16, 0x47, 0x27, 0xec                                     }, { vptestnmd k5{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0xf2, 0x16, 0x40, 0x27, 0x29                                     }, { vptestnmd k5,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0xb2, 0x16, 0x40, 0x27, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vptestnmd k5,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf2, 0x16, 0x50, 0x27, 0x29                                     }, { vptestnmd k5,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf2, 0x16, 0x40, 0x27, 0x6a, 0x7f                               }, { vptestnmd k5,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf2, 0x16, 0x40, 0x27, 0xaa, 0x00, 0x20, 0x00, 0x00             }, { vptestnmd k5,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf2, 0x16, 0x40, 0x27, 0x6a, 0x80                               }, { vptestnmd k5,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf2, 0x16, 0x40, 0x27, 0xaa, 0xc0, 0xdf, 0xff, 0xff             }, { vptestnmd k5,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf2, 0x16, 0x50, 0x27, 0x6a, 0x7f                               }, { vptestnmd k5,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf2, 0x16, 0x50, 0x27, 0xaa, 0x00, 0x02, 0x00, 0x00             }, { vptestnmd k5,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf2, 0x16, 0x50, 0x27, 0x6a, 0x80                               }, { vptestnmd k5,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf2, 0x16, 0x50, 0x27, 0xaa, 0xfc, 0xfd, 0xff, 0xff             }, { vptestnmd k5,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x92, 0x96, 0x40, 0x27, 0xec                                     }, { vptestnmq k5,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x92, 0x96, 0x47, 0x27, 0xec                                     }, { vptestnmq k5{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0xf2, 0x96, 0x40, 0x27, 0x29                                     }, { vptestnmq k5,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0xb2, 0x96, 0x40, 0x27, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vptestnmq k5,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf2, 0x96, 0x50, 0x27, 0x29                                     }, { vptestnmq k5,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf2, 0x96, 0x40, 0x27, 0x6a, 0x7f                               }, { vptestnmq k5,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf2, 0x96, 0x40, 0x27, 0xaa, 0x00, 0x20, 0x00, 0x00             }, { vptestnmq k5,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf2, 0x96, 0x40, 0x27, 0x6a, 0x80                               }, { vptestnmq k5,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf2, 0x96, 0x40, 0x27, 0xaa, 0xc0, 0xdf, 0xff, 0xff             }, { vptestnmq k5,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf2, 0x96, 0x50, 0x27, 0x6a, 0x7f                               }, { vptestnmq k5,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf2, 0x96, 0x50, 0x27, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vptestnmq k5,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf2, 0x96, 0x50, 0x27, 0x6a, 0x80                               }, { vptestnmq k5,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf2, 0x96, 0x50, 0x27, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vptestnmq k5,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x3a, 0xf6                                     }, { vpbroadcastmw2d zmm30,k6                                     }
+testcase	{ 0x62, 0x62, 0xfe, 0x48, 0x2a, 0xf6                                     }, { vpbroadcastmb2q zmm30,k6                                     }

_service:tar_scm:nasm-2.16.03.tar.xz/test/avx512er.asm Added

@@ -0,0 +1,144 @@
+;Testname=avx512er; Arguments=-fbin -oavx512er.bin -O0 -DSRC; Files=stdout stderr avx512er.bin
+; AVX-512ER testcases from gas
+;------------------------
+;
+; This file is taken from there
+;     https://gnu.googlesource.com/binutils/+/master/gas/testsuite/gas/i386/x86-64-avx512er-intel.d
+; So the original author is "H.J. Lu" <hongjiu dot lu at intel dot com>
+;
+; Jin Kyu Song converted it for the nasm testing suite using gas2nasm.py
+
+%macro testcase 2
+ %ifdef BIN
+  db %1
+ %endif
+ %ifdef SRC
+  %2
+ %endif
+%endmacro
+
+
+bits 64
+
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0xc8, 0xf5                                     }, { vexp2ps zmm30,zmm29                                          }
+testcase	{ 0x62, 0x02, 0x7d, 0x18, 0xc8, 0xf5                                     }, { vexp2ps zmm30,zmm29,{sae}                                    }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xc8, 0x31                                     }, { vexp2ps zmm30,ZWORD rcx                                    }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0xc8, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vexp2ps zmm30,ZWORD rax+r14*8+0x123                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xc8, 0x31                                     }, { vexp2ps zmm30,DWORD rcx{1to16}                             }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xc8, 0x72, 0x7f                               }, { vexp2ps zmm30,ZWORD rdx+0x1fc0                             }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xc8, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vexp2ps zmm30,ZWORD rdx+0x2000                             }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xc8, 0x72, 0x80                               }, { vexp2ps zmm30,ZWORD rdx-0x2000                             }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xc8, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vexp2ps zmm30,ZWORD rdx-0x2040                             }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xc8, 0x72, 0x7f                               }, { vexp2ps zmm30,DWORD rdx+0x1fc{1to16}                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xc8, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vexp2ps zmm30,DWORD rdx+0x200{1to16}                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xc8, 0x72, 0x80                               }, { vexp2ps zmm30,DWORD rdx-0x200{1to16}                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xc8, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vexp2ps zmm30,DWORD rdx-0x204{1to16}                       }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0xc8, 0xf5                                     }, { vexp2pd zmm30,zmm29                                          }
+testcase	{ 0x62, 0x02, 0xfd, 0x18, 0xc8, 0xf5                                     }, { vexp2pd zmm30,zmm29,{sae}                                    }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xc8, 0x31                                     }, { vexp2pd zmm30,ZWORD rcx                                    }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0xc8, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vexp2pd zmm30,ZWORD rax+r14*8+0x123                        }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xc8, 0x31                                     }, { vexp2pd zmm30,QWORD rcx{1to8}                              }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xc8, 0x72, 0x7f                               }, { vexp2pd zmm30,ZWORD rdx+0x1fc0                             }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xc8, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vexp2pd zmm30,ZWORD rdx+0x2000                             }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xc8, 0x72, 0x80                               }, { vexp2pd zmm30,ZWORD rdx-0x2000                             }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xc8, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vexp2pd zmm30,ZWORD rdx-0x2040                             }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xc8, 0x72, 0x7f                               }, { vexp2pd zmm30,QWORD rdx+0x3f8{1to8}                        }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xc8, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vexp2pd zmm30,QWORD rdx+0x400{1to8}                        }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xc8, 0x72, 0x80                               }, { vexp2pd zmm30,QWORD rdx-0x400{1to8}                        }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xc8, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vexp2pd zmm30,QWORD rdx-0x408{1to8}                        }
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0xca, 0xf5                                     }, { vrcp28ps zmm30,zmm29                                         }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0xca, 0xf5                                     }, { vrcp28ps zmm30{k7},zmm29                                     }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0xca, 0xf5                                     }, { vrcp28ps zmm30{k7}{z},zmm29                                  }
+testcase	{ 0x62, 0x02, 0x7d, 0x18, 0xca, 0xf5                                     }, { vrcp28ps zmm30,zmm29,{sae}                                   }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xca, 0x31                                     }, { vrcp28ps zmm30,ZWORD rcx                                   }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0xca, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrcp28ps zmm30,ZWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xca, 0x31                                     }, { vrcp28ps zmm30,DWORD rcx{1to16}                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xca, 0x72, 0x7f                               }, { vrcp28ps zmm30,ZWORD rdx+0x1fc0                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xca, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vrcp28ps zmm30,ZWORD rdx+0x2000                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xca, 0x72, 0x80                               }, { vrcp28ps zmm30,ZWORD rdx-0x2000                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xca, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vrcp28ps zmm30,ZWORD rdx-0x2040                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xca, 0x72, 0x7f                               }, { vrcp28ps zmm30,DWORD rdx+0x1fc{1to16}                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xca, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vrcp28ps zmm30,DWORD rdx+0x200{1to16}                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xca, 0x72, 0x80                               }, { vrcp28ps zmm30,DWORD rdx-0x200{1to16}                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xca, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vrcp28ps zmm30,DWORD rdx-0x204{1to16}                      }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0xca, 0xf5                                     }, { vrcp28pd zmm30,zmm29                                         }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0xca, 0xf5                                     }, { vrcp28pd zmm30{k7},zmm29                                     }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0xca, 0xf5                                     }, { vrcp28pd zmm30{k7}{z},zmm29                                  }
+testcase	{ 0x62, 0x02, 0xfd, 0x18, 0xca, 0xf5                                     }, { vrcp28pd zmm30,zmm29,{sae}                                   }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xca, 0x31                                     }, { vrcp28pd zmm30,ZWORD rcx                                   }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0xca, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrcp28pd zmm30,ZWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xca, 0x31                                     }, { vrcp28pd zmm30,QWORD rcx{1to8}                             }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xca, 0x72, 0x7f                               }, { vrcp28pd zmm30,ZWORD rdx+0x1fc0                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xca, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vrcp28pd zmm30,ZWORD rdx+0x2000                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xca, 0x72, 0x80                               }, { vrcp28pd zmm30,ZWORD rdx-0x2000                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xca, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vrcp28pd zmm30,ZWORD rdx-0x2040                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xca, 0x72, 0x7f                               }, { vrcp28pd zmm30,QWORD rdx+0x3f8{1to8}                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xca, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vrcp28pd zmm30,QWORD rdx+0x400{1to8}                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xca, 0x72, 0x80                               }, { vrcp28pd zmm30,QWORD rdx-0x400{1to8}                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xca, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vrcp28pd zmm30,QWORD rdx-0x408{1to8}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0xcb, 0xf4                                     }, { vrcp28ss xmm30{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0xcb, 0xf4                                     }, { vrcp28ss xmm30{k7}{z},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0xcb, 0xf4                                     }, { vrcp28ss xmm30{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xcb, 0x31                                     }, { vrcp28ss xmm30{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0xcb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrcp28ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xcb, 0x72, 0x7f                               }, { vrcp28ss xmm30{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xcb, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vrcp28ss xmm30{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xcb, 0x72, 0x80                               }, { vrcp28ss xmm30{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xcb, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vrcp28ss xmm30{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0xcb, 0xf4                                     }, { vrcp28sd xmm30{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0xcb, 0xf4                                     }, { vrcp28sd xmm30{k7}{z},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0xcb, 0xf4                                     }, { vrcp28sd xmm30{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xcb, 0x31                                     }, { vrcp28sd xmm30{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0xcb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrcp28sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xcb, 0x72, 0x7f                               }, { vrcp28sd xmm30{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xcb, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vrcp28sd xmm30{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xcb, 0x72, 0x80                               }, { vrcp28sd xmm30{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xcb, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vrcp28sd xmm30{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0xcc, 0xf5                                     }, { vrsqrt28ps zmm30,zmm29                                       }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0xcc, 0xf5                                     }, { vrsqrt28ps zmm30{k7},zmm29                                   }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0xcc, 0xf5                                     }, { vrsqrt28ps zmm30{k7}{z},zmm29                                }
+testcase	{ 0x62, 0x02, 0x7d, 0x18, 0xcc, 0xf5                                     }, { vrsqrt28ps zmm30,zmm29,{sae}                                 }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xcc, 0x31                                     }, { vrsqrt28ps zmm30,ZWORD rcx                                 }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0xcc, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrsqrt28ps zmm30,ZWORD rax+r14*8+0x123                     }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xcc, 0x31                                     }, { vrsqrt28ps zmm30,DWORD rcx{1to16}                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xcc, 0x72, 0x7f                               }, { vrsqrt28ps zmm30,ZWORD rdx+0x1fc0                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xcc, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vrsqrt28ps zmm30,ZWORD rdx+0x2000                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xcc, 0x72, 0x80                               }, { vrsqrt28ps zmm30,ZWORD rdx-0x2000                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xcc, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vrsqrt28ps zmm30,ZWORD rdx-0x2040                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xcc, 0x72, 0x7f                               }, { vrsqrt28ps zmm30,DWORD rdx+0x1fc{1to16}                    }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xcc, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vrsqrt28ps zmm30,DWORD rdx+0x200{1to16}                    }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xcc, 0x72, 0x80                               }, { vrsqrt28ps zmm30,DWORD rdx-0x200{1to16}                    }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xcc, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vrsqrt28ps zmm30,DWORD rdx-0x204{1to16}                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0xcc, 0xf5                                     }, { vrsqrt28pd zmm30,zmm29                                       }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0xcc, 0xf5                                     }, { vrsqrt28pd zmm30{k7},zmm29                                   }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0xcc, 0xf5                                     }, { vrsqrt28pd zmm30{k7}{z},zmm29                                }
+testcase	{ 0x62, 0x02, 0xfd, 0x18, 0xcc, 0xf5                                     }, { vrsqrt28pd zmm30,zmm29,{sae}                                 }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xcc, 0x31                                     }, { vrsqrt28pd zmm30,ZWORD rcx                                 }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0xcc, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrsqrt28pd zmm30,ZWORD rax+r14*8+0x123                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xcc, 0x31                                     }, { vrsqrt28pd zmm30,QWORD rcx{1to8}                           }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xcc, 0x72, 0x7f                               }, { vrsqrt28pd zmm30,ZWORD rdx+0x1fc0                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xcc, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vrsqrt28pd zmm30,ZWORD rdx+0x2000                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xcc, 0x72, 0x80                               }, { vrsqrt28pd zmm30,ZWORD rdx-0x2000                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xcc, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vrsqrt28pd zmm30,ZWORD rdx-0x2040                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xcc, 0x72, 0x7f                               }, { vrsqrt28pd zmm30,QWORD rdx+0x3f8{1to8}                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xcc, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vrsqrt28pd zmm30,QWORD rdx+0x400{1to8}                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xcc, 0x72, 0x80                               }, { vrsqrt28pd zmm30,QWORD rdx-0x400{1to8}                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xcc, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vrsqrt28pd zmm30,QWORD rdx-0x408{1to8}                     }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0xcd, 0xf4                                     }, { vrsqrt28ss xmm30{k7},xmm29,xmm28                             }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0xcd, 0xf4                                     }, { vrsqrt28ss xmm30{k7}{z},xmm29,xmm28                          }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0xcd, 0xf4                                     }, { vrsqrt28ss xmm30{k7},xmm29,xmm28,{sae}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xcd, 0x31                                     }, { vrsqrt28ss xmm30{k7},xmm29,DWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0xcd, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrsqrt28ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xcd, 0x72, 0x7f                               }, { vrsqrt28ss xmm30{k7},xmm29,DWORD rdx+0x1fc                 }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xcd, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vrsqrt28ss xmm30{k7},xmm29,DWORD rdx+0x200                 }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xcd, 0x72, 0x80                               }, { vrsqrt28ss xmm30{k7},xmm29,DWORD rdx-0x200                 }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xcd, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vrsqrt28ss xmm30{k7},xmm29,DWORD rdx-0x204                 }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0xcd, 0xf4                                     }, { vrsqrt28sd xmm30{k7},xmm29,xmm28                             }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0xcd, 0xf4                                     }, { vrsqrt28sd xmm30{k7}{z},xmm29,xmm28                          }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0xcd, 0xf4                                     }, { vrsqrt28sd xmm30{k7},xmm29,xmm28,{sae}                       }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xcd, 0x31                                     }, { vrsqrt28sd xmm30{k7},xmm29,QWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0xcd, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrsqrt28sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xcd, 0x72, 0x7f                               }, { vrsqrt28sd xmm30{k7},xmm29,QWORD rdx+0x3f8                 }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xcd, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vrsqrt28sd xmm30{k7},xmm29,QWORD rdx+0x400                 }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xcd, 0x72, 0x80                               }, { vrsqrt28sd xmm30{k7},xmm29,QWORD rdx-0x400                 }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xcd, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vrsqrt28sd xmm30{k7},xmm29,QWORD rdx-0x408                 }

_service:tar_scm:nasm-2.16.03.tar.xz/test/avx512f.asm Added

@@ -0,0 +1,7000 @@
+;Testname=avx512f; Arguments=-fbin -oavx512f.bin -O0 -DSRC; Files=stdout stderr avx512f.bin
+; AVX-512F testcases from gas
+;------------------------
+;
+; This file is taken from there
+;     https://gnu.googlesource.com/binutils/+/master/gas/testsuite/gas/i386/x86-64-avx512f-intel.d
+; So the original author is "H.J. Lu" <hongjiu dot lu at intel dot com>
+;
+; Jin Kyu Song converted it for the nasm testing suite using gas2nasm.py
+
+%macro testcase 2
+ %ifdef BIN
+  db %1
+ %endif
+ %ifdef SRC
+  %2
+ %endif
+%endmacro
+
+
+bits 64
+
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0x58, 0xf4                                     }, { vaddpd zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0x58, 0xf4                                     }, { vaddpd zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0x58, 0xf4                                     }, { vaddpd zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x95, 0x10, 0x58, 0xf4                                     }, { vaddpd zmm30,zmm29,zmm28,{rn-sae}                            }
+testcase	{ 0x62, 0x01, 0x95, 0x50, 0x58, 0xf4                                     }, { vaddpd zmm30,zmm29,zmm28,{ru-sae}                            }
+testcase	{ 0x62, 0x01, 0x95, 0x30, 0x58, 0xf4                                     }, { vaddpd zmm30,zmm29,zmm28,{rd-sae}                            }
+testcase	{ 0x62, 0x01, 0x95, 0x70, 0x58, 0xf4                                     }, { vaddpd zmm30,zmm29,zmm28,{rz-sae}                            }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x58, 0x31                                     }, { vaddpd zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0x58, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vaddpd zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x58, 0x31                                     }, { vaddpd zmm30,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x58, 0x72, 0x7f                               }, { vaddpd zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x58, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vaddpd zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x58, 0x72, 0x80                               }, { vaddpd zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x58, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vaddpd zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x58, 0x72, 0x7f                               }, { vaddpd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x58, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vaddpd zmm30,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x58, 0x72, 0x80                               }, { vaddpd zmm30,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x58, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vaddpd zmm30,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x01, 0x14, 0x40, 0x58, 0xf4                                     }, { vaddps zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x14, 0x47, 0x58, 0xf4                                     }, { vaddps zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x14, 0xc7, 0x58, 0xf4                                     }, { vaddps zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x14, 0x10, 0x58, 0xf4                                     }, { vaddps zmm30,zmm29,zmm28,{rn-sae}                            }
+testcase	{ 0x62, 0x01, 0x14, 0x50, 0x58, 0xf4                                     }, { vaddps zmm30,zmm29,zmm28,{ru-sae}                            }
+testcase	{ 0x62, 0x01, 0x14, 0x30, 0x58, 0xf4                                     }, { vaddps zmm30,zmm29,zmm28,{rd-sae}                            }
+testcase	{ 0x62, 0x01, 0x14, 0x70, 0x58, 0xf4                                     }, { vaddps zmm30,zmm29,zmm28,{rz-sae}                            }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x58, 0x31                                     }, { vaddps zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x14, 0x40, 0x58, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vaddps zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x58, 0x31                                     }, { vaddps zmm30,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x58, 0x72, 0x7f                               }, { vaddps zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x58, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vaddps zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x58, 0x72, 0x80                               }, { vaddps zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x58, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vaddps zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x58, 0x72, 0x7f                               }, { vaddps zmm30,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x58, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vaddps zmm30,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x58, 0x72, 0x80                               }, { vaddps zmm30,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x58, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vaddps zmm30,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x01, 0x97, 0x07, 0x58, 0xf4                                     }, { vaddsd xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x97, 0x87, 0x58, 0xf4                                     }, { vaddsd xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x97, 0x17, 0x58, 0xf4                                     }, { vaddsd xmm30{k7},xmm29,xmm28,{rn-sae}                        }
+testcase	{ 0x62, 0x01, 0x97, 0x57, 0x58, 0xf4                                     }, { vaddsd xmm30{k7},xmm29,xmm28,{ru-sae}                        }
+testcase	{ 0x62, 0x01, 0x97, 0x37, 0x58, 0xf4                                     }, { vaddsd xmm30{k7},xmm29,xmm28,{rd-sae}                        }
+testcase	{ 0x62, 0x01, 0x97, 0x77, 0x58, 0xf4                                     }, { vaddsd xmm30{k7},xmm29,xmm28,{rz-sae}                        }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x58, 0x31                                     }, { vaddsd xmm30{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x97, 0x07, 0x58, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vaddsd xmm30{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x58, 0x72, 0x7f                               }, { vaddsd xmm30{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x58, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vaddsd xmm30{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x58, 0x72, 0x80                               }, { vaddsd xmm30{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x58, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vaddsd xmm30{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x01, 0x16, 0x07, 0x58, 0xf4                                     }, { vaddss xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x16, 0x87, 0x58, 0xf4                                     }, { vaddss xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x16, 0x17, 0x58, 0xf4                                     }, { vaddss xmm30{k7},xmm29,xmm28,{rn-sae}                        }
+testcase	{ 0x62, 0x01, 0x16, 0x57, 0x58, 0xf4                                     }, { vaddss xmm30{k7},xmm29,xmm28,{ru-sae}                        }
+testcase	{ 0x62, 0x01, 0x16, 0x37, 0x58, 0xf4                                     }, { vaddss xmm30{k7},xmm29,xmm28,{rd-sae}                        }
+testcase	{ 0x62, 0x01, 0x16, 0x77, 0x58, 0xf4                                     }, { vaddss xmm30{k7},xmm29,xmm28,{rz-sae}                        }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x58, 0x31                                     }, { vaddss xmm30{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x16, 0x07, 0x58, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vaddss xmm30{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x58, 0x72, 0x7f                               }, { vaddss xmm30{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x58, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vaddss xmm30{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x58, 0x72, 0x80                               }, { vaddss xmm30{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x58, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vaddss xmm30{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x03, 0x15, 0x40, 0x03, 0xf4, 0xab                               }, { valignd zmm30,zmm29,zmm28,0xab                               }
+testcase	{ 0x62, 0x03, 0x15, 0x47, 0x03, 0xf4, 0xab                               }, { valignd zmm30{k7},zmm29,zmm28,0xab                           }
+testcase	{ 0x62, 0x03, 0x15, 0xc7, 0x03, 0xf4, 0xab                               }, { valignd zmm30{k7}{z},zmm29,zmm28,0xab                        }
+testcase	{ 0x62, 0x03, 0x15, 0x40, 0x03, 0xf4, 0x7b                               }, { valignd zmm30,zmm29,zmm28,0x7b                               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x03, 0x31, 0x7b                               }, { valignd zmm30,zmm29,ZWORD rcx,0x7b                         }
+testcase	{ 0x62, 0x23, 0x15, 0x40, 0x03, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { valignd zmm30,zmm29,ZWORD rax+r14*8+0x123,0x7b             }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x03, 0x31, 0x7b                               }, { valignd zmm30,zmm29,DWORD rcx{1to16},0x7b                  }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x03, 0x72, 0x7f, 0x7b                         }, { valignd zmm30,zmm29,ZWORD rdx+0x1fc0,0x7b                  }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x03, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { valignd zmm30,zmm29,ZWORD rdx+0x2000,0x7b                  }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x03, 0x72, 0x80, 0x7b                         }, { valignd zmm30,zmm29,ZWORD rdx-0x2000,0x7b                  }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x03, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { valignd zmm30,zmm29,ZWORD rdx-0x2040,0x7b                  }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x03, 0x72, 0x7f, 0x7b                         }, { valignd zmm30,zmm29,DWORD rdx+0x1fc{1to16},0x7b            }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x03, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { valignd zmm30,zmm29,DWORD rdx+0x200{1to16},0x7b            }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x03, 0x72, 0x80, 0x7b                         }, { valignd zmm30,zmm29,DWORD rdx-0x200{1to16},0x7b            }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x03, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { valignd zmm30,zmm29,DWORD rdx-0x204{1to16},0x7b            }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x65, 0xf4                                     }, { vblendmpd zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x65, 0xf4                                     }, { vblendmpd zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x65, 0xf4                                     }, { vblendmpd zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x65, 0x31                                     }, { vblendmpd zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x65, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vblendmpd zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x65, 0x31                                     }, { vblendmpd zmm30,zmm29,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x65, 0x72, 0x7f                               }, { vblendmpd zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x65, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vblendmpd zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x65, 0x72, 0x80                               }, { vblendmpd zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x65, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vblendmpd zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x65, 0x72, 0x7f                               }, { vblendmpd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x65, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vblendmpd zmm30,zmm29,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x65, 0x72, 0x80                               }, { vblendmpd zmm30,zmm29,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x65, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vblendmpd zmm30,zmm29,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x65, 0xf4                                     }, { vblendmps zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x65, 0xf4                                     }, { vblendmps zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x65, 0xf4                                     }, { vblendmps zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x65, 0x31                                     }, { vblendmps zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x65, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vblendmps zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x65, 0x31                                     }, { vblendmps zmm30,zmm29,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x65, 0x72, 0x7f                               }, { vblendmps zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x65, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vblendmps zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x65, 0x72, 0x80                               }, { vblendmps zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x65, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vblendmps zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x65, 0x72, 0x7f                               }, { vblendmps zmm30,zmm29,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x65, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vblendmps zmm30,zmm29,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x65, 0x72, 0x80                               }, { vblendmps zmm30,zmm29,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x65, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vblendmps zmm30,zmm29,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x1a, 0x31                                     }, { vbroadcastf32x4 zmm30,OWORD rcx                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x1a, 0x31                                     }, { vbroadcastf32x4 zmm30{k7},OWORD rcx                        }
+testcase	{ 0x62, 0x62, 0x7d, 0xcf, 0x1a, 0x31                                     }, { vbroadcastf32x4 zmm30{k7}{z},OWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x1a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vbroadcastf32x4 zmm30,OWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x1a, 0x72, 0x7f                               }, { vbroadcastf32x4 zmm30,OWORD rdx+0x7f0                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x1a, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vbroadcastf32x4 zmm30,OWORD rdx+0x800                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x1a, 0x72, 0x80                               }, { vbroadcastf32x4 zmm30,OWORD rdx-0x800                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x1a, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vbroadcastf32x4 zmm30,OWORD rdx-0x810                      }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x1b, 0x31                                     }, { vbroadcastf64x4 zmm30,YWORD rcx                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x4f, 0x1b, 0x31                                     }, { vbroadcastf64x4 zmm30{k7},YWORD rcx                        }
+testcase	{ 0x62, 0x62, 0xfd, 0xcf, 0x1b, 0x31                                     }, { vbroadcastf64x4 zmm30{k7}{z},YWORD rcx                     }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x1b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vbroadcastf64x4 zmm30,YWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x1b, 0x72, 0x7f                               }, { vbroadcastf64x4 zmm30,YWORD rdx+0xfe0                      }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x1b, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vbroadcastf64x4 zmm30,YWORD rdx+0x1000                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x1b, 0x72, 0x80                               }, { vbroadcastf64x4 zmm30,YWORD rdx-0x1000                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x1b, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vbroadcastf64x4 zmm30,YWORD rdx-0x1020                     }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x5a, 0x31                                     }, { vbroadcasti32x4 zmm30,OWORD rcx                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x5a, 0x31                                     }, { vbroadcasti32x4 zmm30{k7},OWORD rcx                        }
+testcase	{ 0x62, 0x62, 0x7d, 0xcf, 0x5a, 0x31                                     }, { vbroadcasti32x4 zmm30{k7}{z},OWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x5a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vbroadcasti32x4 zmm30,OWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x5a, 0x72, 0x7f                               }, { vbroadcasti32x4 zmm30,OWORD rdx+0x7f0                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x5a, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vbroadcasti32x4 zmm30,OWORD rdx+0x800                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x5a, 0x72, 0x80                               }, { vbroadcasti32x4 zmm30,OWORD rdx-0x800                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x5a, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vbroadcasti32x4 zmm30,OWORD rdx-0x810                      }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x5b, 0x31                                     }, { vbroadcasti64x4 zmm30,YWORD rcx                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x4f, 0x5b, 0x31                                     }, { vbroadcasti64x4 zmm30{k7},YWORD rcx                        }
+testcase	{ 0x62, 0x62, 0xfd, 0xcf, 0x5b, 0x31                                     }, { vbroadcasti64x4 zmm30{k7}{z},YWORD rcx                     }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x5b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vbroadcasti64x4 zmm30,YWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x5b, 0x72, 0x7f                               }, { vbroadcasti64x4 zmm30,YWORD rdx+0xfe0                      }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x5b, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vbroadcasti64x4 zmm30,YWORD rdx+0x1000                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x5b, 0x72, 0x80                               }, { vbroadcasti64x4 zmm30,YWORD rdx-0x1000                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x5b, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vbroadcasti64x4 zmm30,YWORD rdx-0x1020                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x19, 0x31                                     }, { vbroadcastsd zmm30,QWORD rcx                               }
+testcase	{ 0x62, 0x62, 0xfd, 0x4f, 0x19, 0x31                                     }, { vbroadcastsd zmm30{k7},QWORD rcx                           }
+testcase	{ 0x62, 0x62, 0xfd, 0xcf, 0x19, 0x31                                     }, { vbroadcastsd zmm30{k7}{z},QWORD rcx                        }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x19, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vbroadcastsd zmm30,QWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x19, 0x72, 0x7f                               }, { vbroadcastsd zmm30,QWORD rdx+0x3f8                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x19, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vbroadcastsd zmm30,QWORD rdx+0x400                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x19, 0x72, 0x80                               }, { vbroadcastsd zmm30,QWORD rdx-0x400                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x19, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vbroadcastsd zmm30,QWORD rdx-0x408                         }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0x19, 0xf5                                     }, { vbroadcastsd zmm30{k7},xmm29                                 }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0x19, 0xf5                                     }, { vbroadcastsd zmm30{k7}{z},xmm29                              }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x18, 0x31                                     }, { vbroadcastss zmm30,DWORD rcx                               }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x18, 0x31                                     }, { vbroadcastss zmm30{k7},DWORD rcx                           }
+testcase	{ 0x62, 0x62, 0x7d, 0xcf, 0x18, 0x31                                     }, { vbroadcastss zmm30{k7}{z},DWORD rcx                        }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x18, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vbroadcastss zmm30,DWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x18, 0x72, 0x7f                               }, { vbroadcastss zmm30,DWORD rdx+0x1fc                         }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x18, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vbroadcastss zmm30,DWORD rdx+0x200                         }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x18, 0x72, 0x80                               }, { vbroadcastss zmm30,DWORD rdx-0x200                         }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x18, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vbroadcastss zmm30,DWORD rdx-0x204                         }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x18, 0xf5                                     }, { vbroadcastss zmm30{k7},xmm29                                 }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x18, 0xf5                                     }, { vbroadcastss zmm30{k7}{z},xmm29                              }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0xab                               }, { vcmppd k5,zmm30,zmm29,0xab                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0xab                               }, { vcmppd k5{k7},zmm30,zmm29,0xab                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0xab                               }, { vcmppd k5,zmm30,zmm29,{sae},0xab                             }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x7b                               }, { vcmppd k5,zmm30,zmm29,0x7b                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x7b                               }, { vcmppd k5,zmm30,zmm29,{sae},0x7b                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x7b                               }, { vcmppd k5,zmm30,ZWORD rcx,0x7b                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vcmppd k5,zmm30,ZWORD rax+r14*8+0x123,0x7b                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x7b                               }, { vcmppd k5,zmm30,QWORD rcx{1to8},0x7b                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x7b                         }, { vcmppd k5,zmm30,ZWORD rdx+0x1fc0,0x7b                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vcmppd k5,zmm30,ZWORD rdx+0x2000,0x7b                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x7b                         }, { vcmppd k5,zmm30,ZWORD rdx-0x2000,0x7b                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vcmppd k5,zmm30,ZWORD rdx-0x2040,0x7b                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x7b                         }, { vcmppd k5,zmm30,QWORD rdx+0x3f8{1to8},0x7b                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vcmppd k5,zmm30,QWORD rdx+0x400{1to8},0x7b                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x7b                         }, { vcmppd k5,zmm30,QWORD rdx-0x400{1to8},0x7b                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vcmppd k5,zmm30,QWORD rdx-0x408{1to8},0x7b                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x00                               }, { vcmpeqpd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x00                               }, { vcmpeqpd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x00                               }, { vcmpeqpd k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x00                               }, { vcmpeqpd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vcmpeqpd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x00                               }, { vcmpeqpd k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x00                         }, { vcmpeqpd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x00       }, { vcmpeqpd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x00                         }, { vcmpeqpd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x00       }, { vcmpeqpd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x00                         }, { vcmpeqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x00       }, { vcmpeqpd k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x00                         }, { vcmpeqpd k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x00       }, { vcmpeqpd k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x00                               }, { vcmpeqpd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x00                               }, { vcmpeqpd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x00                               }, { vcmpeqpd k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x00                               }, { vcmpeqpd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vcmpeqpd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x00                               }, { vcmpeqpd k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x00                         }, { vcmpeqpd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x00       }, { vcmpeqpd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x00                         }, { vcmpeqpd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x00       }, { vcmpeqpd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x00                         }, { vcmpeqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x00       }, { vcmpeqpd k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x00                         }, { vcmpeqpd k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x00       }, { vcmpeqpd k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x01                               }, { vcmpltpd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x01                               }, { vcmpltpd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x01                               }, { vcmpltpd k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x01                               }, { vcmpltpd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vcmpltpd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x01                               }, { vcmpltpd k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x01                         }, { vcmpltpd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x01       }, { vcmpltpd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x01                         }, { vcmpltpd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x01       }, { vcmpltpd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x01                         }, { vcmpltpd k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x01       }, { vcmpltpd k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x01                         }, { vcmpltpd k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x01       }, { vcmpltpd k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x01                               }, { vcmpltpd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x01                               }, { vcmpltpd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x01                               }, { vcmpltpd k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x01                               }, { vcmpltpd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vcmpltpd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x01                               }, { vcmpltpd k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x01                         }, { vcmpltpd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x01       }, { vcmpltpd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x01                         }, { vcmpltpd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x01       }, { vcmpltpd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x01                         }, { vcmpltpd k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x01       }, { vcmpltpd k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x01                         }, { vcmpltpd k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x01       }, { vcmpltpd k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x02                               }, { vcmplepd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x02                               }, { vcmplepd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x02                               }, { vcmplepd k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x02                               }, { vcmplepd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vcmplepd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x02                               }, { vcmplepd k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x02                         }, { vcmplepd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x02       }, { vcmplepd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x02                         }, { vcmplepd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x02       }, { vcmplepd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x02                         }, { vcmplepd k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x02       }, { vcmplepd k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x02                         }, { vcmplepd k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x02       }, { vcmplepd k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x02                               }, { vcmplepd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x02                               }, { vcmplepd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x02                               }, { vcmplepd k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x02                               }, { vcmplepd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vcmplepd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x02                               }, { vcmplepd k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x02                         }, { vcmplepd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x02       }, { vcmplepd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x02                         }, { vcmplepd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x02       }, { vcmplepd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x02                         }, { vcmplepd k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x02       }, { vcmplepd k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x02                         }, { vcmplepd k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x02       }, { vcmplepd k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x03                               }, { vcmpunordpd k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x03                               }, { vcmpunordpd k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x03                               }, { vcmpunordpd k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x03                               }, { vcmpunordpd k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x03 }, { vcmpunordpd k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x03                               }, { vcmpunordpd k5,zmm30,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x03                         }, { vcmpunordpd k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x03       }, { vcmpunordpd k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x03                         }, { vcmpunordpd k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x03       }, { vcmpunordpd k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x03                         }, { vcmpunordpd k5,zmm30,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x03       }, { vcmpunordpd k5,zmm30,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x03                         }, { vcmpunordpd k5,zmm30,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x03       }, { vcmpunordpd k5,zmm30,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x03                               }, { vcmpunordpd k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x03                               }, { vcmpunordpd k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x03                               }, { vcmpunordpd k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x03                               }, { vcmpunordpd k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x03 }, { vcmpunordpd k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x03                               }, { vcmpunordpd k5,zmm30,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x03                         }, { vcmpunordpd k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x03       }, { vcmpunordpd k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x03                         }, { vcmpunordpd k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x03       }, { vcmpunordpd k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x03                         }, { vcmpunordpd k5,zmm30,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x03       }, { vcmpunordpd k5,zmm30,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x03                         }, { vcmpunordpd k5,zmm30,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x03       }, { vcmpunordpd k5,zmm30,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x04                               }, { vcmpneqpd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x04                               }, { vcmpneqpd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x04                               }, { vcmpneqpd k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x04                               }, { vcmpneqpd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vcmpneqpd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x04                               }, { vcmpneqpd k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x04                         }, { vcmpneqpd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x04       }, { vcmpneqpd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x04                         }, { vcmpneqpd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x04       }, { vcmpneqpd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x04                         }, { vcmpneqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x04       }, { vcmpneqpd k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x04                         }, { vcmpneqpd k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x04       }, { vcmpneqpd k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x04                               }, { vcmpneqpd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x04                               }, { vcmpneqpd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x04                               }, { vcmpneqpd k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x04                               }, { vcmpneqpd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vcmpneqpd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x04                               }, { vcmpneqpd k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x04                         }, { vcmpneqpd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x04       }, { vcmpneqpd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x04                         }, { vcmpneqpd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x04       }, { vcmpneqpd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x04                         }, { vcmpneqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x04       }, { vcmpneqpd k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x04                         }, { vcmpneqpd k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x04       }, { vcmpneqpd k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x05                               }, { vcmpnltpd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x05                               }, { vcmpnltpd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x05                               }, { vcmpnltpd k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x05                               }, { vcmpnltpd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vcmpnltpd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x05                               }, { vcmpnltpd k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x05                         }, { vcmpnltpd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x05       }, { vcmpnltpd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x05                         }, { vcmpnltpd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x05       }, { vcmpnltpd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x05                         }, { vcmpnltpd k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x05       }, { vcmpnltpd k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x05                         }, { vcmpnltpd k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x05       }, { vcmpnltpd k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x05                               }, { vcmpnltpd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x05                               }, { vcmpnltpd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x05                               }, { vcmpnltpd k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x05                               }, { vcmpnltpd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vcmpnltpd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x05                               }, { vcmpnltpd k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x05                         }, { vcmpnltpd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x05       }, { vcmpnltpd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x05                         }, { vcmpnltpd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x05       }, { vcmpnltpd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x05                         }, { vcmpnltpd k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x05       }, { vcmpnltpd k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x05                         }, { vcmpnltpd k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x05       }, { vcmpnltpd k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x06                               }, { vcmpnlepd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x06                               }, { vcmpnlepd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x06                               }, { vcmpnlepd k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x06                               }, { vcmpnlepd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vcmpnlepd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x06                               }, { vcmpnlepd k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x06                         }, { vcmpnlepd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x06       }, { vcmpnlepd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x06                         }, { vcmpnlepd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x06       }, { vcmpnlepd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x06                         }, { vcmpnlepd k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x06       }, { vcmpnlepd k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x06                         }, { vcmpnlepd k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x06       }, { vcmpnlepd k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x06                               }, { vcmpnlepd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x06                               }, { vcmpnlepd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x06                               }, { vcmpnlepd k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x06                               }, { vcmpnlepd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vcmpnlepd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x06                               }, { vcmpnlepd k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x06                         }, { vcmpnlepd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x06       }, { vcmpnlepd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x06                         }, { vcmpnlepd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x06       }, { vcmpnlepd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x06                         }, { vcmpnlepd k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x06       }, { vcmpnlepd k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x06                         }, { vcmpnlepd k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x06       }, { vcmpnlepd k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x07                               }, { vcmpordpd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x07                               }, { vcmpordpd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x07                               }, { vcmpordpd k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x07                               }, { vcmpordpd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x07 }, { vcmpordpd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x07                               }, { vcmpordpd k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x07                         }, { vcmpordpd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x07       }, { vcmpordpd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x07                         }, { vcmpordpd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x07       }, { vcmpordpd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x07                         }, { vcmpordpd k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x07       }, { vcmpordpd k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x07                         }, { vcmpordpd k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x07       }, { vcmpordpd k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x07                               }, { vcmpordpd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x07                               }, { vcmpordpd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x07                               }, { vcmpordpd k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x07                               }, { vcmpordpd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x07 }, { vcmpordpd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x07                               }, { vcmpordpd k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x07                         }, { vcmpordpd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x07       }, { vcmpordpd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x07                         }, { vcmpordpd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x07       }, { vcmpordpd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x07                         }, { vcmpordpd k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x07       }, { vcmpordpd k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x07                         }, { vcmpordpd k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x07       }, { vcmpordpd k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x08                               }, { vcmpeq_uqpd k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x08                               }, { vcmpeq_uqpd k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x08                               }, { vcmpeq_uqpd k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x08                               }, { vcmpeq_uqpd k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x08 }, { vcmpeq_uqpd k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x08                               }, { vcmpeq_uqpd k5,zmm30,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x08                         }, { vcmpeq_uqpd k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x08       }, { vcmpeq_uqpd k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x08                         }, { vcmpeq_uqpd k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x08       }, { vcmpeq_uqpd k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x08                         }, { vcmpeq_uqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x08       }, { vcmpeq_uqpd k5,zmm30,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x08                         }, { vcmpeq_uqpd k5,zmm30,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x08       }, { vcmpeq_uqpd k5,zmm30,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x09                               }, { vcmpngepd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x09                               }, { vcmpngepd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x09                               }, { vcmpngepd k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x09                               }, { vcmpngepd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x09 }, { vcmpngepd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x09                               }, { vcmpngepd k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x09                         }, { vcmpngepd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x09       }, { vcmpngepd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x09                         }, { vcmpngepd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x09       }, { vcmpngepd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x09                         }, { vcmpngepd k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x09       }, { vcmpngepd k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x09                         }, { vcmpngepd k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x09       }, { vcmpngepd k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x09                               }, { vcmpngepd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x09                               }, { vcmpngepd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x09                               }, { vcmpngepd k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x09                               }, { vcmpngepd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x09 }, { vcmpngepd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x09                               }, { vcmpngepd k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x09                         }, { vcmpngepd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x09       }, { vcmpngepd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x09                         }, { vcmpngepd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x09       }, { vcmpngepd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x09                         }, { vcmpngepd k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x09       }, { vcmpngepd k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x09                         }, { vcmpngepd k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x09       }, { vcmpngepd k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0a                               }, { vcmpngtpd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0a                               }, { vcmpngtpd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0a                               }, { vcmpngtpd k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0a                               }, { vcmpngtpd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0a }, { vcmpngtpd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0a                               }, { vcmpngtpd k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0a                         }, { vcmpngtpd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0a       }, { vcmpngtpd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0a                         }, { vcmpngtpd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0a       }, { vcmpngtpd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0a                         }, { vcmpngtpd k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0a       }, { vcmpngtpd k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0a                         }, { vcmpngtpd k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0a       }, { vcmpngtpd k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0a                               }, { vcmpngtpd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0a                               }, { vcmpngtpd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0a                               }, { vcmpngtpd k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0a                               }, { vcmpngtpd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0a }, { vcmpngtpd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0a                               }, { vcmpngtpd k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0a                         }, { vcmpngtpd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0a       }, { vcmpngtpd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0a                         }, { vcmpngtpd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0a       }, { vcmpngtpd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0a                         }, { vcmpngtpd k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0a       }, { vcmpngtpd k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0a                         }, { vcmpngtpd k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0a       }, { vcmpngtpd k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0b                               }, { vcmpfalsepd k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0b                               }, { vcmpfalsepd k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0b                               }, { vcmpfalsepd k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0b                               }, { vcmpfalsepd k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0b }, { vcmpfalsepd k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0b                               }, { vcmpfalsepd k5,zmm30,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0b                         }, { vcmpfalsepd k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0b       }, { vcmpfalsepd k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0b                         }, { vcmpfalsepd k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0b       }, { vcmpfalsepd k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0b                         }, { vcmpfalsepd k5,zmm30,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0b       }, { vcmpfalsepd k5,zmm30,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0b                         }, { vcmpfalsepd k5,zmm30,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0b       }, { vcmpfalsepd k5,zmm30,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0b                               }, { vcmpfalsepd k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0b                               }, { vcmpfalsepd k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0b                               }, { vcmpfalsepd k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0b                               }, { vcmpfalsepd k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0b }, { vcmpfalsepd k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0b                               }, { vcmpfalsepd k5,zmm30,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0b                         }, { vcmpfalsepd k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0b       }, { vcmpfalsepd k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0b                         }, { vcmpfalsepd k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0b       }, { vcmpfalsepd k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0b                         }, { vcmpfalsepd k5,zmm30,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0b       }, { vcmpfalsepd k5,zmm30,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0b                         }, { vcmpfalsepd k5,zmm30,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0b       }, { vcmpfalsepd k5,zmm30,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0c                               }, { vcmpneq_oqpd k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0c                               }, { vcmpneq_oqpd k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0c                               }, { vcmpneq_oqpd k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0c                               }, { vcmpneq_oqpd k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0c }, { vcmpneq_oqpd k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0c                               }, { vcmpneq_oqpd k5,zmm30,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0c                         }, { vcmpneq_oqpd k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0c       }, { vcmpneq_oqpd k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0c                         }, { vcmpneq_oqpd k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0c       }, { vcmpneq_oqpd k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0c                         }, { vcmpneq_oqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0c       }, { vcmpneq_oqpd k5,zmm30,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0c                         }, { vcmpneq_oqpd k5,zmm30,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0c       }, { vcmpneq_oqpd k5,zmm30,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0d                               }, { vcmpgepd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0d                               }, { vcmpgepd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0d                               }, { vcmpgepd k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0d                               }, { vcmpgepd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0d }, { vcmpgepd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0d                               }, { vcmpgepd k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0d                         }, { vcmpgepd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0d       }, { vcmpgepd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0d                         }, { vcmpgepd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0d       }, { vcmpgepd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0d                         }, { vcmpgepd k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0d       }, { vcmpgepd k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0d                         }, { vcmpgepd k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0d       }, { vcmpgepd k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0d                               }, { vcmpgepd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0d                               }, { vcmpgepd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0d                               }, { vcmpgepd k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0d                               }, { vcmpgepd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0d }, { vcmpgepd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0d                               }, { vcmpgepd k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0d                         }, { vcmpgepd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0d       }, { vcmpgepd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0d                         }, { vcmpgepd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0d       }, { vcmpgepd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0d                         }, { vcmpgepd k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0d       }, { vcmpgepd k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0d                         }, { vcmpgepd k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0d       }, { vcmpgepd k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0e                               }, { vcmpgtpd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0e                               }, { vcmpgtpd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0e                               }, { vcmpgtpd k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0e                               }, { vcmpgtpd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0e }, { vcmpgtpd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0e                               }, { vcmpgtpd k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0e                         }, { vcmpgtpd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0e       }, { vcmpgtpd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0e                         }, { vcmpgtpd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0e       }, { vcmpgtpd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0e                         }, { vcmpgtpd k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0e       }, { vcmpgtpd k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0e                         }, { vcmpgtpd k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0e       }, { vcmpgtpd k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0e                               }, { vcmpgtpd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0e                               }, { vcmpgtpd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0e                               }, { vcmpgtpd k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0e                               }, { vcmpgtpd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0e }, { vcmpgtpd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0e                               }, { vcmpgtpd k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0e                         }, { vcmpgtpd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0e       }, { vcmpgtpd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0e                         }, { vcmpgtpd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0e       }, { vcmpgtpd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0e                         }, { vcmpgtpd k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0e       }, { vcmpgtpd k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0e                         }, { vcmpgtpd k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0e       }, { vcmpgtpd k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0f                               }, { vcmptruepd k5,zmm30,zmm29                                    }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0f                               }, { vcmptruepd k5{k7},zmm30,zmm29                                }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0f                               }, { vcmptruepd k5,zmm30,zmm29,{sae}                              }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0f                               }, { vcmptruepd k5,zmm30,ZWORD rcx                              }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0f }, { vcmptruepd k5,zmm30,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0f                               }, { vcmptruepd k5,zmm30,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0f                         }, { vcmptruepd k5,zmm30,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0f       }, { vcmptruepd k5,zmm30,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0f                         }, { vcmptruepd k5,zmm30,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0f       }, { vcmptruepd k5,zmm30,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0f                         }, { vcmptruepd k5,zmm30,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0f       }, { vcmptruepd k5,zmm30,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0f                         }, { vcmptruepd k5,zmm30,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0f       }, { vcmptruepd k5,zmm30,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0f                               }, { vcmptruepd k5,zmm30,zmm29                                    }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0f                               }, { vcmptruepd k5{k7},zmm30,zmm29                                }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0f                               }, { vcmptruepd k5,zmm30,zmm29,{sae}                              }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0f                               }, { vcmptruepd k5,zmm30,ZWORD rcx                              }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0f }, { vcmptruepd k5,zmm30,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0f                               }, { vcmptruepd k5,zmm30,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0f                         }, { vcmptruepd k5,zmm30,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0f       }, { vcmptruepd k5,zmm30,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0f                         }, { vcmptruepd k5,zmm30,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0f       }, { vcmptruepd k5,zmm30,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0f                         }, { vcmptruepd k5,zmm30,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0f       }, { vcmptruepd k5,zmm30,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0f                         }, { vcmptruepd k5,zmm30,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0f       }, { vcmptruepd k5,zmm30,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x10                               }, { vcmpeq_ospd k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x10                               }, { vcmpeq_ospd k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x10                               }, { vcmpeq_ospd k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x10                               }, { vcmpeq_ospd k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x10 }, { vcmpeq_ospd k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x10                               }, { vcmpeq_ospd k5,zmm30,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x10                         }, { vcmpeq_ospd k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x10       }, { vcmpeq_ospd k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x10                         }, { vcmpeq_ospd k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x10       }, { vcmpeq_ospd k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x10                         }, { vcmpeq_ospd k5,zmm30,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x10       }, { vcmpeq_ospd k5,zmm30,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x10                         }, { vcmpeq_ospd k5,zmm30,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x10       }, { vcmpeq_ospd k5,zmm30,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x11                               }, { vcmplt_oqpd k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x11                               }, { vcmplt_oqpd k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x11                               }, { vcmplt_oqpd k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x11                               }, { vcmplt_oqpd k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x11 }, { vcmplt_oqpd k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x11                               }, { vcmplt_oqpd k5,zmm30,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x11                         }, { vcmplt_oqpd k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x11       }, { vcmplt_oqpd k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x11                         }, { vcmplt_oqpd k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x11       }, { vcmplt_oqpd k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x11                         }, { vcmplt_oqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x11       }, { vcmplt_oqpd k5,zmm30,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x11                         }, { vcmplt_oqpd k5,zmm30,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x11       }, { vcmplt_oqpd k5,zmm30,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x12                               }, { vcmple_oqpd k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x12                               }, { vcmple_oqpd k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x12                               }, { vcmple_oqpd k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x12                               }, { vcmple_oqpd k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x12 }, { vcmple_oqpd k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x12                               }, { vcmple_oqpd k5,zmm30,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x12                         }, { vcmple_oqpd k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x12       }, { vcmple_oqpd k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x12                         }, { vcmple_oqpd k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x12       }, { vcmple_oqpd k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x12                         }, { vcmple_oqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x12       }, { vcmple_oqpd k5,zmm30,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x12                         }, { vcmple_oqpd k5,zmm30,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x12       }, { vcmple_oqpd k5,zmm30,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x13                               }, { vcmpunord_spd k5,zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x13                               }, { vcmpunord_spd k5{k7},zmm30,zmm29                             }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x13                               }, { vcmpunord_spd k5,zmm30,zmm29,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x13                               }, { vcmpunord_spd k5,zmm30,ZWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x13 }, { vcmpunord_spd k5,zmm30,ZWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x13                               }, { vcmpunord_spd k5,zmm30,QWORD rcx{1to8}                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x13                         }, { vcmpunord_spd k5,zmm30,ZWORD rdx+0x1fc0                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x13       }, { vcmpunord_spd k5,zmm30,ZWORD rdx+0x2000                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x13                         }, { vcmpunord_spd k5,zmm30,ZWORD rdx-0x2000                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x13       }, { vcmpunord_spd k5,zmm30,ZWORD rdx-0x2040                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x13                         }, { vcmpunord_spd k5,zmm30,QWORD rdx+0x3f8{1to8}               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x13       }, { vcmpunord_spd k5,zmm30,QWORD rdx+0x400{1to8}               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x13                         }, { vcmpunord_spd k5,zmm30,QWORD rdx-0x400{1to8}               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x13       }, { vcmpunord_spd k5,zmm30,QWORD rdx-0x408{1to8}               }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x14                               }, { vcmpneq_uspd k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x14                               }, { vcmpneq_uspd k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x14                               }, { vcmpneq_uspd k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x14                               }, { vcmpneq_uspd k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x14 }, { vcmpneq_uspd k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x14                               }, { vcmpneq_uspd k5,zmm30,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x14                         }, { vcmpneq_uspd k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x14       }, { vcmpneq_uspd k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x14                         }, { vcmpneq_uspd k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x14       }, { vcmpneq_uspd k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x14                         }, { vcmpneq_uspd k5,zmm30,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x14       }, { vcmpneq_uspd k5,zmm30,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x14                         }, { vcmpneq_uspd k5,zmm30,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x14       }, { vcmpneq_uspd k5,zmm30,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x15                               }, { vcmpnlt_uqpd k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x15                               }, { vcmpnlt_uqpd k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x15                               }, { vcmpnlt_uqpd k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x15                               }, { vcmpnlt_uqpd k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x15 }, { vcmpnlt_uqpd k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x15                               }, { vcmpnlt_uqpd k5,zmm30,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x15                         }, { vcmpnlt_uqpd k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x15       }, { vcmpnlt_uqpd k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x15                         }, { vcmpnlt_uqpd k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x15       }, { vcmpnlt_uqpd k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x15                         }, { vcmpnlt_uqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x15       }, { vcmpnlt_uqpd k5,zmm30,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x15                         }, { vcmpnlt_uqpd k5,zmm30,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x15       }, { vcmpnlt_uqpd k5,zmm30,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x16                               }, { vcmpnle_uqpd k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x16                               }, { vcmpnle_uqpd k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x16                               }, { vcmpnle_uqpd k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x16                               }, { vcmpnle_uqpd k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x16 }, { vcmpnle_uqpd k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x16                               }, { vcmpnle_uqpd k5,zmm30,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x16                         }, { vcmpnle_uqpd k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x16       }, { vcmpnle_uqpd k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x16                         }, { vcmpnle_uqpd k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x16       }, { vcmpnle_uqpd k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x16                         }, { vcmpnle_uqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x16       }, { vcmpnle_uqpd k5,zmm30,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x16                         }, { vcmpnle_uqpd k5,zmm30,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x16       }, { vcmpnle_uqpd k5,zmm30,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x17                               }, { vcmpord_spd k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x17                               }, { vcmpord_spd k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x17                               }, { vcmpord_spd k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x17                               }, { vcmpord_spd k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x17 }, { vcmpord_spd k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x17                               }, { vcmpord_spd k5,zmm30,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x17                         }, { vcmpord_spd k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x17       }, { vcmpord_spd k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x17                         }, { vcmpord_spd k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x17       }, { vcmpord_spd k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x17                         }, { vcmpord_spd k5,zmm30,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x17       }, { vcmpord_spd k5,zmm30,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x17                         }, { vcmpord_spd k5,zmm30,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x17       }, { vcmpord_spd k5,zmm30,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x18                               }, { vcmpeq_uspd k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x18                               }, { vcmpeq_uspd k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x18                               }, { vcmpeq_uspd k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x18                               }, { vcmpeq_uspd k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x18 }, { vcmpeq_uspd k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x18                               }, { vcmpeq_uspd k5,zmm30,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x18                         }, { vcmpeq_uspd k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x18       }, { vcmpeq_uspd k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x18                         }, { vcmpeq_uspd k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x18       }, { vcmpeq_uspd k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x18                         }, { vcmpeq_uspd k5,zmm30,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x18       }, { vcmpeq_uspd k5,zmm30,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x18                         }, { vcmpeq_uspd k5,zmm30,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x18       }, { vcmpeq_uspd k5,zmm30,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x19                               }, { vcmpnge_uqpd k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x19                               }, { vcmpnge_uqpd k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x19                               }, { vcmpnge_uqpd k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x19                               }, { vcmpnge_uqpd k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x19 }, { vcmpnge_uqpd k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x19                               }, { vcmpnge_uqpd k5,zmm30,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x19                         }, { vcmpnge_uqpd k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x19       }, { vcmpnge_uqpd k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x19                         }, { vcmpnge_uqpd k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x19       }, { vcmpnge_uqpd k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x19                         }, { vcmpnge_uqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x19       }, { vcmpnge_uqpd k5,zmm30,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x19                         }, { vcmpnge_uqpd k5,zmm30,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x19       }, { vcmpnge_uqpd k5,zmm30,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x1a                               }, { vcmpngt_uqpd k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x1a                               }, { vcmpngt_uqpd k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x1a                               }, { vcmpngt_uqpd k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x1a                               }, { vcmpngt_uqpd k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1a }, { vcmpngt_uqpd k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x1a                               }, { vcmpngt_uqpd k5,zmm30,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x1a                         }, { vcmpngt_uqpd k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1a       }, { vcmpngt_uqpd k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x1a                         }, { vcmpngt_uqpd k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1a       }, { vcmpngt_uqpd k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x1a                         }, { vcmpngt_uqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1a       }, { vcmpngt_uqpd k5,zmm30,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x1a                         }, { vcmpngt_uqpd k5,zmm30,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1a       }, { vcmpngt_uqpd k5,zmm30,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x1b                               }, { vcmpfalse_ospd k5,zmm30,zmm29                                }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x1b                               }, { vcmpfalse_ospd k5{k7},zmm30,zmm29                            }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x1b                               }, { vcmpfalse_ospd k5,zmm30,zmm29,{sae}                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x1b                               }, { vcmpfalse_ospd k5,zmm30,ZWORD rcx                          }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1b }, { vcmpfalse_ospd k5,zmm30,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x1b                               }, { vcmpfalse_ospd k5,zmm30,QWORD rcx{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x1b                         }, { vcmpfalse_ospd k5,zmm30,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1b       }, { vcmpfalse_ospd k5,zmm30,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x1b                         }, { vcmpfalse_ospd k5,zmm30,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1b       }, { vcmpfalse_ospd k5,zmm30,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x1b                         }, { vcmpfalse_ospd k5,zmm30,QWORD rdx+0x3f8{1to8}              }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1b       }, { vcmpfalse_ospd k5,zmm30,QWORD rdx+0x400{1to8}              }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x1b                         }, { vcmpfalse_ospd k5,zmm30,QWORD rdx-0x400{1to8}              }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1b       }, { vcmpfalse_ospd k5,zmm30,QWORD rdx-0x408{1to8}              }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x1c                               }, { vcmpneq_ospd k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x1c                               }, { vcmpneq_ospd k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x1c                               }, { vcmpneq_ospd k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x1c                               }, { vcmpneq_ospd k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1c }, { vcmpneq_ospd k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x1c                               }, { vcmpneq_ospd k5,zmm30,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x1c                         }, { vcmpneq_ospd k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1c       }, { vcmpneq_ospd k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x1c                         }, { vcmpneq_ospd k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1c       }, { vcmpneq_ospd k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x1c                         }, { vcmpneq_ospd k5,zmm30,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1c       }, { vcmpneq_ospd k5,zmm30,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x1c                         }, { vcmpneq_ospd k5,zmm30,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1c       }, { vcmpneq_ospd k5,zmm30,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x1d                               }, { vcmpge_oqpd k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x1d                               }, { vcmpge_oqpd k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x1d                               }, { vcmpge_oqpd k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x1d                               }, { vcmpge_oqpd k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1d }, { vcmpge_oqpd k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x1d                               }, { vcmpge_oqpd k5,zmm30,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x1d                         }, { vcmpge_oqpd k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1d       }, { vcmpge_oqpd k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x1d                         }, { vcmpge_oqpd k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1d       }, { vcmpge_oqpd k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x1d                         }, { vcmpge_oqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1d       }, { vcmpge_oqpd k5,zmm30,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x1d                         }, { vcmpge_oqpd k5,zmm30,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1d       }, { vcmpge_oqpd k5,zmm30,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x1e                               }, { vcmpgt_oqpd k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x1e                               }, { vcmpgt_oqpd k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x1e                               }, { vcmpgt_oqpd k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x1e                               }, { vcmpgt_oqpd k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1e }, { vcmpgt_oqpd k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x1e                               }, { vcmpgt_oqpd k5,zmm30,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x1e                         }, { vcmpgt_oqpd k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1e       }, { vcmpgt_oqpd k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x1e                         }, { vcmpgt_oqpd k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1e       }, { vcmpgt_oqpd k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x1e                         }, { vcmpgt_oqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1e       }, { vcmpgt_oqpd k5,zmm30,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x1e                         }, { vcmpgt_oqpd k5,zmm30,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1e       }, { vcmpgt_oqpd k5,zmm30,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x1f                               }, { vcmptrue_uspd k5,zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x1f                               }, { vcmptrue_uspd k5{k7},zmm30,zmm29                             }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x1f                               }, { vcmptrue_uspd k5,zmm30,zmm29,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x1f                               }, { vcmptrue_uspd k5,zmm30,ZWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1f }, { vcmptrue_uspd k5,zmm30,ZWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x1f                               }, { vcmptrue_uspd k5,zmm30,QWORD rcx{1to8}                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x1f                         }, { vcmptrue_uspd k5,zmm30,ZWORD rdx+0x1fc0                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1f       }, { vcmptrue_uspd k5,zmm30,ZWORD rdx+0x2000                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x1f                         }, { vcmptrue_uspd k5,zmm30,ZWORD rdx-0x2000                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1f       }, { vcmptrue_uspd k5,zmm30,ZWORD rdx-0x2040                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x1f                         }, { vcmptrue_uspd k5,zmm30,QWORD rdx+0x3f8{1to8}               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1f       }, { vcmptrue_uspd k5,zmm30,QWORD rdx+0x400{1to8}               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x1f                         }, { vcmptrue_uspd k5,zmm30,QWORD rdx-0x400{1to8}               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1f       }, { vcmptrue_uspd k5,zmm30,QWORD rdx-0x408{1to8}               }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0xab                               }, { vcmpps k5,zmm30,zmm29,0xab                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0xab                               }, { vcmpps k5{k7},zmm30,zmm29,0xab                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0xab                               }, { vcmpps k5,zmm30,zmm29,{sae},0xab                             }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x7b                               }, { vcmpps k5,zmm30,zmm29,0x7b                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x7b                               }, { vcmpps k5,zmm30,zmm29,{sae},0x7b                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x7b                               }, { vcmpps k5,zmm30,ZWORD rcx,0x7b                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vcmpps k5,zmm30,ZWORD rax+r14*8+0x123,0x7b                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x7b                               }, { vcmpps k5,zmm30,DWORD rcx{1to16},0x7b                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x7b                         }, { vcmpps k5,zmm30,ZWORD rdx+0x1fc0,0x7b                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vcmpps k5,zmm30,ZWORD rdx+0x2000,0x7b                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x7b                         }, { vcmpps k5,zmm30,ZWORD rdx-0x2000,0x7b                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vcmpps k5,zmm30,ZWORD rdx-0x2040,0x7b                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x7b                         }, { vcmpps k5,zmm30,DWORD rdx+0x1fc{1to16},0x7b                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vcmpps k5,zmm30,DWORD rdx+0x200{1to16},0x7b                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x7b                         }, { vcmpps k5,zmm30,DWORD rdx-0x200{1to16},0x7b                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vcmpps k5,zmm30,DWORD rdx-0x204{1to16},0x7b                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x00                               }, { vcmpeqps k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x00                               }, { vcmpeqps k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x00                               }, { vcmpeqps k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x00                               }, { vcmpeqps k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vcmpeqps k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x00                               }, { vcmpeqps k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x00                         }, { vcmpeqps k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x00       }, { vcmpeqps k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x00                         }, { vcmpeqps k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x00       }, { vcmpeqps k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x00                         }, { vcmpeqps k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x00       }, { vcmpeqps k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x00                         }, { vcmpeqps k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x00       }, { vcmpeqps k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x00                               }, { vcmpeqps k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x00                               }, { vcmpeqps k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x00                               }, { vcmpeqps k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x00                               }, { vcmpeqps k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vcmpeqps k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x00                               }, { vcmpeqps k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x00                         }, { vcmpeqps k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x00       }, { vcmpeqps k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x00                         }, { vcmpeqps k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x00       }, { vcmpeqps k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x00                         }, { vcmpeqps k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x00       }, { vcmpeqps k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x00                         }, { vcmpeqps k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x00       }, { vcmpeqps k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x01                               }, { vcmpltps k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x01                               }, { vcmpltps k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x01                               }, { vcmpltps k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x01                               }, { vcmpltps k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vcmpltps k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x01                               }, { vcmpltps k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x01                         }, { vcmpltps k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x01       }, { vcmpltps k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x01                         }, { vcmpltps k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x01       }, { vcmpltps k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x01                         }, { vcmpltps k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x01       }, { vcmpltps k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x01                         }, { vcmpltps k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x01       }, { vcmpltps k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x01                               }, { vcmpltps k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x01                               }, { vcmpltps k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x01                               }, { vcmpltps k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x01                               }, { vcmpltps k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vcmpltps k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x01                               }, { vcmpltps k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x01                         }, { vcmpltps k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x01       }, { vcmpltps k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x01                         }, { vcmpltps k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x01       }, { vcmpltps k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x01                         }, { vcmpltps k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x01       }, { vcmpltps k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x01                         }, { vcmpltps k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x01       }, { vcmpltps k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x02                               }, { vcmpleps k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x02                               }, { vcmpleps k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x02                               }, { vcmpleps k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x02                               }, { vcmpleps k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vcmpleps k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x02                               }, { vcmpleps k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x02                         }, { vcmpleps k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x02       }, { vcmpleps k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x02                         }, { vcmpleps k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x02       }, { vcmpleps k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x02                         }, { vcmpleps k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x02       }, { vcmpleps k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x02                         }, { vcmpleps k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x02       }, { vcmpleps k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x02                               }, { vcmpleps k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x02                               }, { vcmpleps k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x02                               }, { vcmpleps k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x02                               }, { vcmpleps k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vcmpleps k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x02                               }, { vcmpleps k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x02                         }, { vcmpleps k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x02       }, { vcmpleps k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x02                         }, { vcmpleps k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x02       }, { vcmpleps k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x02                         }, { vcmpleps k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x02       }, { vcmpleps k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x02                         }, { vcmpleps k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x02       }, { vcmpleps k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x03                               }, { vcmpunordps k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x03                               }, { vcmpunordps k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x03                               }, { vcmpunordps k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x03                               }, { vcmpunordps k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x03 }, { vcmpunordps k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x03                               }, { vcmpunordps k5,zmm30,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x03                         }, { vcmpunordps k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x03       }, { vcmpunordps k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x03                         }, { vcmpunordps k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x03       }, { vcmpunordps k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x03                         }, { vcmpunordps k5,zmm30,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x03       }, { vcmpunordps k5,zmm30,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x03                         }, { vcmpunordps k5,zmm30,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x03       }, { vcmpunordps k5,zmm30,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x03                               }, { vcmpunordps k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x03                               }, { vcmpunordps k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x03                               }, { vcmpunordps k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x03                               }, { vcmpunordps k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x03 }, { vcmpunordps k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x03                               }, { vcmpunordps k5,zmm30,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x03                         }, { vcmpunordps k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x03       }, { vcmpunordps k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x03                         }, { vcmpunordps k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x03       }, { vcmpunordps k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x03                         }, { vcmpunordps k5,zmm30,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x03       }, { vcmpunordps k5,zmm30,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x03                         }, { vcmpunordps k5,zmm30,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x03       }, { vcmpunordps k5,zmm30,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x04                               }, { vcmpneqps k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x04                               }, { vcmpneqps k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x04                               }, { vcmpneqps k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x04                               }, { vcmpneqps k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vcmpneqps k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x04                               }, { vcmpneqps k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x04                         }, { vcmpneqps k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x04       }, { vcmpneqps k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x04                         }, { vcmpneqps k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x04       }, { vcmpneqps k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x04                         }, { vcmpneqps k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x04       }, { vcmpneqps k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x04                         }, { vcmpneqps k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x04       }, { vcmpneqps k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x04                               }, { vcmpneqps k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x04                               }, { vcmpneqps k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x04                               }, { vcmpneqps k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x04                               }, { vcmpneqps k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vcmpneqps k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x04                               }, { vcmpneqps k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x04                         }, { vcmpneqps k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x04       }, { vcmpneqps k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x04                         }, { vcmpneqps k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x04       }, { vcmpneqps k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x04                         }, { vcmpneqps k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x04       }, { vcmpneqps k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x04                         }, { vcmpneqps k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x04       }, { vcmpneqps k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x05                               }, { vcmpnltps k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x05                               }, { vcmpnltps k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x05                               }, { vcmpnltps k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x05                               }, { vcmpnltps k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vcmpnltps k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x05                               }, { vcmpnltps k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x05                         }, { vcmpnltps k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x05       }, { vcmpnltps k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x05                         }, { vcmpnltps k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x05       }, { vcmpnltps k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x05                         }, { vcmpnltps k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x05       }, { vcmpnltps k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x05                         }, { vcmpnltps k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x05       }, { vcmpnltps k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x05                               }, { vcmpnltps k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x05                               }, { vcmpnltps k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x05                               }, { vcmpnltps k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x05                               }, { vcmpnltps k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vcmpnltps k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x05                               }, { vcmpnltps k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x05                         }, { vcmpnltps k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x05       }, { vcmpnltps k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x05                         }, { vcmpnltps k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x05       }, { vcmpnltps k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x05                         }, { vcmpnltps k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x05       }, { vcmpnltps k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x05                         }, { vcmpnltps k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x05       }, { vcmpnltps k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x06                               }, { vcmpnleps k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x06                               }, { vcmpnleps k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x06                               }, { vcmpnleps k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x06                               }, { vcmpnleps k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vcmpnleps k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x06                               }, { vcmpnleps k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x06                         }, { vcmpnleps k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x06       }, { vcmpnleps k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x06                         }, { vcmpnleps k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x06       }, { vcmpnleps k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x06                         }, { vcmpnleps k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x06       }, { vcmpnleps k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x06                         }, { vcmpnleps k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x06       }, { vcmpnleps k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x06                               }, { vcmpnleps k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x06                               }, { vcmpnleps k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x06                               }, { vcmpnleps k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x06                               }, { vcmpnleps k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vcmpnleps k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x06                               }, { vcmpnleps k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x06                         }, { vcmpnleps k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x06       }, { vcmpnleps k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x06                         }, { vcmpnleps k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x06       }, { vcmpnleps k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x06                         }, { vcmpnleps k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x06       }, { vcmpnleps k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x06                         }, { vcmpnleps k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x06       }, { vcmpnleps k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x07                               }, { vcmpordps k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x07                               }, { vcmpordps k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x07                               }, { vcmpordps k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x07                               }, { vcmpordps k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x07 }, { vcmpordps k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x07                               }, { vcmpordps k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x07                         }, { vcmpordps k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x07       }, { vcmpordps k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x07                         }, { vcmpordps k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x07       }, { vcmpordps k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x07                         }, { vcmpordps k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x07       }, { vcmpordps k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x07                         }, { vcmpordps k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x07       }, { vcmpordps k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x07                               }, { vcmpordps k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x07                               }, { vcmpordps k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x07                               }, { vcmpordps k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x07                               }, { vcmpordps k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x07 }, { vcmpordps k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x07                               }, { vcmpordps k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x07                         }, { vcmpordps k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x07       }, { vcmpordps k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x07                         }, { vcmpordps k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x07       }, { vcmpordps k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x07                         }, { vcmpordps k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x07       }, { vcmpordps k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x07                         }, { vcmpordps k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x07       }, { vcmpordps k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x08                               }, { vcmpeq_uqps k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x08                               }, { vcmpeq_uqps k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x08                               }, { vcmpeq_uqps k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x08                               }, { vcmpeq_uqps k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x08 }, { vcmpeq_uqps k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x08                               }, { vcmpeq_uqps k5,zmm30,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x08                         }, { vcmpeq_uqps k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x08       }, { vcmpeq_uqps k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x08                         }, { vcmpeq_uqps k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x08       }, { vcmpeq_uqps k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x08                         }, { vcmpeq_uqps k5,zmm30,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x08       }, { vcmpeq_uqps k5,zmm30,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x08                         }, { vcmpeq_uqps k5,zmm30,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x08       }, { vcmpeq_uqps k5,zmm30,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x09                               }, { vcmpngeps k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x09                               }, { vcmpngeps k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x09                               }, { vcmpngeps k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x09                               }, { vcmpngeps k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x09 }, { vcmpngeps k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x09                               }, { vcmpngeps k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x09                         }, { vcmpngeps k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x09       }, { vcmpngeps k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x09                         }, { vcmpngeps k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x09       }, { vcmpngeps k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x09                         }, { vcmpngeps k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x09       }, { vcmpngeps k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x09                         }, { vcmpngeps k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x09       }, { vcmpngeps k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x09                               }, { vcmpngeps k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x09                               }, { vcmpngeps k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x09                               }, { vcmpngeps k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x09                               }, { vcmpngeps k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x09 }, { vcmpngeps k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x09                               }, { vcmpngeps k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x09                         }, { vcmpngeps k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x09       }, { vcmpngeps k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x09                         }, { vcmpngeps k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x09       }, { vcmpngeps k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x09                         }, { vcmpngeps k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x09       }, { vcmpngeps k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x09                         }, { vcmpngeps k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x09       }, { vcmpngeps k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0a                               }, { vcmpngtps k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0a                               }, { vcmpngtps k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0a                               }, { vcmpngtps k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0a                               }, { vcmpngtps k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0a }, { vcmpngtps k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0a                               }, { vcmpngtps k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0a                         }, { vcmpngtps k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0a       }, { vcmpngtps k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0a                         }, { vcmpngtps k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0a       }, { vcmpngtps k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0a                         }, { vcmpngtps k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0a       }, { vcmpngtps k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0a                         }, { vcmpngtps k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0a       }, { vcmpngtps k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0a                               }, { vcmpngtps k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0a                               }, { vcmpngtps k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0a                               }, { vcmpngtps k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0a                               }, { vcmpngtps k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0a }, { vcmpngtps k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0a                               }, { vcmpngtps k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0a                         }, { vcmpngtps k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0a       }, { vcmpngtps k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0a                         }, { vcmpngtps k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0a       }, { vcmpngtps k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0a                         }, { vcmpngtps k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0a       }, { vcmpngtps k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0a                         }, { vcmpngtps k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0a       }, { vcmpngtps k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0b                               }, { vcmpfalseps k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0b                               }, { vcmpfalseps k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0b                               }, { vcmpfalseps k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0b                               }, { vcmpfalseps k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0b }, { vcmpfalseps k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0b                               }, { vcmpfalseps k5,zmm30,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0b                         }, { vcmpfalseps k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0b       }, { vcmpfalseps k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0b                         }, { vcmpfalseps k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0b       }, { vcmpfalseps k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0b                         }, { vcmpfalseps k5,zmm30,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0b       }, { vcmpfalseps k5,zmm30,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0b                         }, { vcmpfalseps k5,zmm30,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0b       }, { vcmpfalseps k5,zmm30,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0b                               }, { vcmpfalseps k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0b                               }, { vcmpfalseps k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0b                               }, { vcmpfalseps k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0b                               }, { vcmpfalseps k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0b }, { vcmpfalseps k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0b                               }, { vcmpfalseps k5,zmm30,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0b                         }, { vcmpfalseps k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0b       }, { vcmpfalseps k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0b                         }, { vcmpfalseps k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0b       }, { vcmpfalseps k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0b                         }, { vcmpfalseps k5,zmm30,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0b       }, { vcmpfalseps k5,zmm30,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0b                         }, { vcmpfalseps k5,zmm30,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0b       }, { vcmpfalseps k5,zmm30,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0c                               }, { vcmpneq_oqps k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0c                               }, { vcmpneq_oqps k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0c                               }, { vcmpneq_oqps k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0c                               }, { vcmpneq_oqps k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0c }, { vcmpneq_oqps k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0c                               }, { vcmpneq_oqps k5,zmm30,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0c                         }, { vcmpneq_oqps k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0c       }, { vcmpneq_oqps k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0c                         }, { vcmpneq_oqps k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0c       }, { vcmpneq_oqps k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0c                         }, { vcmpneq_oqps k5,zmm30,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0c       }, { vcmpneq_oqps k5,zmm30,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0c                         }, { vcmpneq_oqps k5,zmm30,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0c       }, { vcmpneq_oqps k5,zmm30,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0d                               }, { vcmpgeps k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0d                               }, { vcmpgeps k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0d                               }, { vcmpgeps k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0d                               }, { vcmpgeps k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0d }, { vcmpgeps k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0d                               }, { vcmpgeps k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0d                         }, { vcmpgeps k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0d       }, { vcmpgeps k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0d                         }, { vcmpgeps k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0d       }, { vcmpgeps k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0d                         }, { vcmpgeps k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0d       }, { vcmpgeps k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0d                         }, { vcmpgeps k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0d       }, { vcmpgeps k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0d                               }, { vcmpgeps k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0d                               }, { vcmpgeps k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0d                               }, { vcmpgeps k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0d                               }, { vcmpgeps k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0d }, { vcmpgeps k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0d                               }, { vcmpgeps k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0d                         }, { vcmpgeps k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0d       }, { vcmpgeps k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0d                         }, { vcmpgeps k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0d       }, { vcmpgeps k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0d                         }, { vcmpgeps k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0d       }, { vcmpgeps k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0d                         }, { vcmpgeps k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0d       }, { vcmpgeps k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0e                               }, { vcmpgtps k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0e                               }, { vcmpgtps k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0e                               }, { vcmpgtps k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0e                               }, { vcmpgtps k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0e }, { vcmpgtps k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0e                               }, { vcmpgtps k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0e                         }, { vcmpgtps k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0e       }, { vcmpgtps k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0e                         }, { vcmpgtps k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0e       }, { vcmpgtps k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0e                         }, { vcmpgtps k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0e       }, { vcmpgtps k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0e                         }, { vcmpgtps k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0e       }, { vcmpgtps k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0e                               }, { vcmpgtps k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0e                               }, { vcmpgtps k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0e                               }, { vcmpgtps k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0e                               }, { vcmpgtps k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0e }, { vcmpgtps k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0e                               }, { vcmpgtps k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0e                         }, { vcmpgtps k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0e       }, { vcmpgtps k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0e                         }, { vcmpgtps k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0e       }, { vcmpgtps k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0e                         }, { vcmpgtps k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0e       }, { vcmpgtps k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0e                         }, { vcmpgtps k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0e       }, { vcmpgtps k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0f                               }, { vcmptrueps k5,zmm30,zmm29                                    }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0f                               }, { vcmptrueps k5{k7},zmm30,zmm29                                }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0f                               }, { vcmptrueps k5,zmm30,zmm29,{sae}                              }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0f                               }, { vcmptrueps k5,zmm30,ZWORD rcx                              }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0f }, { vcmptrueps k5,zmm30,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0f                               }, { vcmptrueps k5,zmm30,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0f                         }, { vcmptrueps k5,zmm30,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0f       }, { vcmptrueps k5,zmm30,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0f                         }, { vcmptrueps k5,zmm30,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0f       }, { vcmptrueps k5,zmm30,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0f                         }, { vcmptrueps k5,zmm30,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0f       }, { vcmptrueps k5,zmm30,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0f                         }, { vcmptrueps k5,zmm30,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0f       }, { vcmptrueps k5,zmm30,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0f                               }, { vcmptrueps k5,zmm30,zmm29                                    }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0f                               }, { vcmptrueps k5{k7},zmm30,zmm29                                }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0f                               }, { vcmptrueps k5,zmm30,zmm29,{sae}                              }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0f                               }, { vcmptrueps k5,zmm30,ZWORD rcx                              }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0f }, { vcmptrueps k5,zmm30,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0f                               }, { vcmptrueps k5,zmm30,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0f                         }, { vcmptrueps k5,zmm30,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0f       }, { vcmptrueps k5,zmm30,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0f                         }, { vcmptrueps k5,zmm30,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0f       }, { vcmptrueps k5,zmm30,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0f                         }, { vcmptrueps k5,zmm30,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0f       }, { vcmptrueps k5,zmm30,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0f                         }, { vcmptrueps k5,zmm30,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0f       }, { vcmptrueps k5,zmm30,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x10                               }, { vcmpeq_osps k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x10                               }, { vcmpeq_osps k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x10                               }, { vcmpeq_osps k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x10                               }, { vcmpeq_osps k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x10 }, { vcmpeq_osps k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x10                               }, { vcmpeq_osps k5,zmm30,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x10                         }, { vcmpeq_osps k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x10       }, { vcmpeq_osps k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x10                         }, { vcmpeq_osps k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x10       }, { vcmpeq_osps k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x10                         }, { vcmpeq_osps k5,zmm30,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x10       }, { vcmpeq_osps k5,zmm30,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x10                         }, { vcmpeq_osps k5,zmm30,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x10       }, { vcmpeq_osps k5,zmm30,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x11                               }, { vcmplt_oqps k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x11                               }, { vcmplt_oqps k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x11                               }, { vcmplt_oqps k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x11                               }, { vcmplt_oqps k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x11 }, { vcmplt_oqps k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x11                               }, { vcmplt_oqps k5,zmm30,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x11                         }, { vcmplt_oqps k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x11       }, { vcmplt_oqps k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x11                         }, { vcmplt_oqps k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x11       }, { vcmplt_oqps k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x11                         }, { vcmplt_oqps k5,zmm30,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x11       }, { vcmplt_oqps k5,zmm30,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x11                         }, { vcmplt_oqps k5,zmm30,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x11       }, { vcmplt_oqps k5,zmm30,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x12                               }, { vcmple_oqps k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x12                               }, { vcmple_oqps k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x12                               }, { vcmple_oqps k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x12                               }, { vcmple_oqps k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x12 }, { vcmple_oqps k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x12                               }, { vcmple_oqps k5,zmm30,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x12                         }, { vcmple_oqps k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x12       }, { vcmple_oqps k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x12                         }, { vcmple_oqps k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x12       }, { vcmple_oqps k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x12                         }, { vcmple_oqps k5,zmm30,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x12       }, { vcmple_oqps k5,zmm30,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x12                         }, { vcmple_oqps k5,zmm30,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x12       }, { vcmple_oqps k5,zmm30,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x13                               }, { vcmpunord_sps k5,zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x13                               }, { vcmpunord_sps k5{k7},zmm30,zmm29                             }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x13                               }, { vcmpunord_sps k5,zmm30,zmm29,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x13                               }, { vcmpunord_sps k5,zmm30,ZWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x13 }, { vcmpunord_sps k5,zmm30,ZWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x13                               }, { vcmpunord_sps k5,zmm30,DWORD rcx{1to16}                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x13                         }, { vcmpunord_sps k5,zmm30,ZWORD rdx+0x1fc0                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x13       }, { vcmpunord_sps k5,zmm30,ZWORD rdx+0x2000                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x13                         }, { vcmpunord_sps k5,zmm30,ZWORD rdx-0x2000                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x13       }, { vcmpunord_sps k5,zmm30,ZWORD rdx-0x2040                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x13                         }, { vcmpunord_sps k5,zmm30,DWORD rdx+0x1fc{1to16}              }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x13       }, { vcmpunord_sps k5,zmm30,DWORD rdx+0x200{1to16}              }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x13                         }, { vcmpunord_sps k5,zmm30,DWORD rdx-0x200{1to16}              }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x13       }, { vcmpunord_sps k5,zmm30,DWORD rdx-0x204{1to16}              }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x14                               }, { vcmpneq_usps k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x14                               }, { vcmpneq_usps k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x14                               }, { vcmpneq_usps k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x14                               }, { vcmpneq_usps k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x14 }, { vcmpneq_usps k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x14                               }, { vcmpneq_usps k5,zmm30,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x14                         }, { vcmpneq_usps k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x14       }, { vcmpneq_usps k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x14                         }, { vcmpneq_usps k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x14       }, { vcmpneq_usps k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x14                         }, { vcmpneq_usps k5,zmm30,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x14       }, { vcmpneq_usps k5,zmm30,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x14                         }, { vcmpneq_usps k5,zmm30,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x14       }, { vcmpneq_usps k5,zmm30,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x15                               }, { vcmpnlt_uqps k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x15                               }, { vcmpnlt_uqps k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x15                               }, { vcmpnlt_uqps k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x15                               }, { vcmpnlt_uqps k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x15 }, { vcmpnlt_uqps k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x15                               }, { vcmpnlt_uqps k5,zmm30,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x15                         }, { vcmpnlt_uqps k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x15       }, { vcmpnlt_uqps k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x15                         }, { vcmpnlt_uqps k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x15       }, { vcmpnlt_uqps k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x15                         }, { vcmpnlt_uqps k5,zmm30,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x15       }, { vcmpnlt_uqps k5,zmm30,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x15                         }, { vcmpnlt_uqps k5,zmm30,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x15       }, { vcmpnlt_uqps k5,zmm30,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x16                               }, { vcmpnle_uqps k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x16                               }, { vcmpnle_uqps k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x16                               }, { vcmpnle_uqps k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x16                               }, { vcmpnle_uqps k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x16 }, { vcmpnle_uqps k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x16                               }, { vcmpnle_uqps k5,zmm30,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x16                         }, { vcmpnle_uqps k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x16       }, { vcmpnle_uqps k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x16                         }, { vcmpnle_uqps k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x16       }, { vcmpnle_uqps k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x16                         }, { vcmpnle_uqps k5,zmm30,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x16       }, { vcmpnle_uqps k5,zmm30,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x16                         }, { vcmpnle_uqps k5,zmm30,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x16       }, { vcmpnle_uqps k5,zmm30,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x17                               }, { vcmpord_sps k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x17                               }, { vcmpord_sps k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x17                               }, { vcmpord_sps k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x17                               }, { vcmpord_sps k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x17 }, { vcmpord_sps k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x17                               }, { vcmpord_sps k5,zmm30,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x17                         }, { vcmpord_sps k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x17       }, { vcmpord_sps k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x17                         }, { vcmpord_sps k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x17       }, { vcmpord_sps k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x17                         }, { vcmpord_sps k5,zmm30,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x17       }, { vcmpord_sps k5,zmm30,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x17                         }, { vcmpord_sps k5,zmm30,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x17       }, { vcmpord_sps k5,zmm30,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x18                               }, { vcmpeq_usps k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x18                               }, { vcmpeq_usps k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x18                               }, { vcmpeq_usps k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x18                               }, { vcmpeq_usps k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x18 }, { vcmpeq_usps k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x18                               }, { vcmpeq_usps k5,zmm30,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x18                         }, { vcmpeq_usps k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x18       }, { vcmpeq_usps k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x18                         }, { vcmpeq_usps k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x18       }, { vcmpeq_usps k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x18                         }, { vcmpeq_usps k5,zmm30,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x18       }, { vcmpeq_usps k5,zmm30,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x18                         }, { vcmpeq_usps k5,zmm30,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x18       }, { vcmpeq_usps k5,zmm30,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x19                               }, { vcmpnge_uqps k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x19                               }, { vcmpnge_uqps k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x19                               }, { vcmpnge_uqps k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x19                               }, { vcmpnge_uqps k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x19 }, { vcmpnge_uqps k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x19                               }, { vcmpnge_uqps k5,zmm30,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x19                         }, { vcmpnge_uqps k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x19       }, { vcmpnge_uqps k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x19                         }, { vcmpnge_uqps k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x19       }, { vcmpnge_uqps k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x19                         }, { vcmpnge_uqps k5,zmm30,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x19       }, { vcmpnge_uqps k5,zmm30,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x19                         }, { vcmpnge_uqps k5,zmm30,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x19       }, { vcmpnge_uqps k5,zmm30,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x1a                               }, { vcmpngt_uqps k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x1a                               }, { vcmpngt_uqps k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x1a                               }, { vcmpngt_uqps k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x1a                               }, { vcmpngt_uqps k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1a }, { vcmpngt_uqps k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x1a                               }, { vcmpngt_uqps k5,zmm30,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x1a                         }, { vcmpngt_uqps k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1a       }, { vcmpngt_uqps k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x1a                         }, { vcmpngt_uqps k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1a       }, { vcmpngt_uqps k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x1a                         }, { vcmpngt_uqps k5,zmm30,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1a       }, { vcmpngt_uqps k5,zmm30,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x1a                         }, { vcmpngt_uqps k5,zmm30,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1a       }, { vcmpngt_uqps k5,zmm30,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x1b                               }, { vcmpfalse_osps k5,zmm30,zmm29                                }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x1b                               }, { vcmpfalse_osps k5{k7},zmm30,zmm29                            }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x1b                               }, { vcmpfalse_osps k5,zmm30,zmm29,{sae}                          }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x1b                               }, { vcmpfalse_osps k5,zmm30,ZWORD rcx                          }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1b }, { vcmpfalse_osps k5,zmm30,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x1b                               }, { vcmpfalse_osps k5,zmm30,DWORD rcx{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x1b                         }, { vcmpfalse_osps k5,zmm30,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1b       }, { vcmpfalse_osps k5,zmm30,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x1b                         }, { vcmpfalse_osps k5,zmm30,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1b       }, { vcmpfalse_osps k5,zmm30,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x1b                         }, { vcmpfalse_osps k5,zmm30,DWORD rdx+0x1fc{1to16}             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1b       }, { vcmpfalse_osps k5,zmm30,DWORD rdx+0x200{1to16}             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x1b                         }, { vcmpfalse_osps k5,zmm30,DWORD rdx-0x200{1to16}             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1b       }, { vcmpfalse_osps k5,zmm30,DWORD rdx-0x204{1to16}             }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x1c                               }, { vcmpneq_osps k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x1c                               }, { vcmpneq_osps k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x1c                               }, { vcmpneq_osps k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x1c                               }, { vcmpneq_osps k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1c }, { vcmpneq_osps k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x1c                               }, { vcmpneq_osps k5,zmm30,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x1c                         }, { vcmpneq_osps k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1c       }, { vcmpneq_osps k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x1c                         }, { vcmpneq_osps k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1c       }, { vcmpneq_osps k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x1c                         }, { vcmpneq_osps k5,zmm30,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1c       }, { vcmpneq_osps k5,zmm30,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x1c                         }, { vcmpneq_osps k5,zmm30,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1c       }, { vcmpneq_osps k5,zmm30,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x1d                               }, { vcmpge_oqps k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x1d                               }, { vcmpge_oqps k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x1d                               }, { vcmpge_oqps k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x1d                               }, { vcmpge_oqps k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1d }, { vcmpge_oqps k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x1d                               }, { vcmpge_oqps k5,zmm30,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x1d                         }, { vcmpge_oqps k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1d       }, { vcmpge_oqps k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x1d                         }, { vcmpge_oqps k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1d       }, { vcmpge_oqps k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x1d                         }, { vcmpge_oqps k5,zmm30,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1d       }, { vcmpge_oqps k5,zmm30,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x1d                         }, { vcmpge_oqps k5,zmm30,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1d       }, { vcmpge_oqps k5,zmm30,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x1e                               }, { vcmpgt_oqps k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x1e                               }, { vcmpgt_oqps k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x1e                               }, { vcmpgt_oqps k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x1e                               }, { vcmpgt_oqps k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1e }, { vcmpgt_oqps k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x1e                               }, { vcmpgt_oqps k5,zmm30,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x1e                         }, { vcmpgt_oqps k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1e       }, { vcmpgt_oqps k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x1e                         }, { vcmpgt_oqps k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1e       }, { vcmpgt_oqps k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x1e                         }, { vcmpgt_oqps k5,zmm30,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1e       }, { vcmpgt_oqps k5,zmm30,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x1e                         }, { vcmpgt_oqps k5,zmm30,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1e       }, { vcmpgt_oqps k5,zmm30,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x1f                               }, { vcmptrue_usps k5,zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x1f                               }, { vcmptrue_usps k5{k7},zmm30,zmm29                             }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x1f                               }, { vcmptrue_usps k5,zmm30,zmm29,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x1f                               }, { vcmptrue_usps k5,zmm30,ZWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1f }, { vcmptrue_usps k5,zmm30,ZWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x1f                               }, { vcmptrue_usps k5,zmm30,DWORD rcx{1to16}                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x1f                         }, { vcmptrue_usps k5,zmm30,ZWORD rdx+0x1fc0                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1f       }, { vcmptrue_usps k5,zmm30,ZWORD rdx+0x2000                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x1f                         }, { vcmptrue_usps k5,zmm30,ZWORD rdx-0x2000                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1f       }, { vcmptrue_usps k5,zmm30,ZWORD rdx-0x2040                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x1f                         }, { vcmptrue_usps k5,zmm30,DWORD rdx+0x1fc{1to16}              }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1f       }, { vcmptrue_usps k5,zmm30,DWORD rdx+0x200{1to16}              }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x1f                         }, { vcmptrue_usps k5,zmm30,DWORD rdx-0x200{1to16}              }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1f       }, { vcmptrue_usps k5,zmm30,DWORD rdx-0x204{1to16}              }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0xab                               }, { vcmpsd k5{k7},xmm29,xmm28,0xab                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0xab                               }, { vcmpsd k5{k7},xmm29,xmm28,{sae},0xab                         }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x7b                               }, { vcmpsd k5{k7},xmm29,xmm28,0x7b                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x7b                               }, { vcmpsd k5{k7},xmm29,xmm28,{sae},0x7b                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x7b                               }, { vcmpsd k5{k7},xmm29,QWORD rcx,0x7b                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vcmpsd k5{k7},xmm29,QWORD rax+r14*8+0x123,0x7b             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x7b                         }, { vcmpsd k5{k7},xmm29,QWORD rdx+0x3f8,0x7b                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vcmpsd k5{k7},xmm29,QWORD rdx+0x400,0x7b                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x7b                         }, { vcmpsd k5{k7},xmm29,QWORD rdx-0x400,0x7b                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vcmpsd k5{k7},xmm29,QWORD rdx-0x408,0x7b                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x00                               }, { vcmpeqsd k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x00                               }, { vcmpeqsd k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x00                               }, { vcmpeqsd k5{k7},xmm29,QWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vcmpeqsd k5{k7},xmm29,QWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x00                         }, { vcmpeqsd k5{k7},xmm29,QWORD rdx+0x3f8                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x00       }, { vcmpeqsd k5{k7},xmm29,QWORD rdx+0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x00                         }, { vcmpeqsd k5{k7},xmm29,QWORD rdx-0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x00       }, { vcmpeqsd k5{k7},xmm29,QWORD rdx-0x408                      }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x00                               }, { vcmpeqsd k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x00                               }, { vcmpeqsd k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x00                               }, { vcmpeqsd k5{k7},xmm29,QWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vcmpeqsd k5{k7},xmm29,QWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x00                         }, { vcmpeqsd k5{k7},xmm29,QWORD rdx+0x3f8                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x00       }, { vcmpeqsd k5{k7},xmm29,QWORD rdx+0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x00                         }, { vcmpeqsd k5{k7},xmm29,QWORD rdx-0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x00       }, { vcmpeqsd k5{k7},xmm29,QWORD rdx-0x408                      }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x01                               }, { vcmpltsd k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x01                               }, { vcmpltsd k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x01                               }, { vcmpltsd k5{k7},xmm29,QWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vcmpltsd k5{k7},xmm29,QWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x01                         }, { vcmpltsd k5{k7},xmm29,QWORD rdx+0x3f8                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x01       }, { vcmpltsd k5{k7},xmm29,QWORD rdx+0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x01                         }, { vcmpltsd k5{k7},xmm29,QWORD rdx-0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x01       }, { vcmpltsd k5{k7},xmm29,QWORD rdx-0x408                      }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x01                               }, { vcmpltsd k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x01                               }, { vcmpltsd k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x01                               }, { vcmpltsd k5{k7},xmm29,QWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vcmpltsd k5{k7},xmm29,QWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x01                         }, { vcmpltsd k5{k7},xmm29,QWORD rdx+0x3f8                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x01       }, { vcmpltsd k5{k7},xmm29,QWORD rdx+0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x01                         }, { vcmpltsd k5{k7},xmm29,QWORD rdx-0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x01       }, { vcmpltsd k5{k7},xmm29,QWORD rdx-0x408                      }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x02                               }, { vcmplesd k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x02                               }, { vcmplesd k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x02                               }, { vcmplesd k5{k7},xmm29,QWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vcmplesd k5{k7},xmm29,QWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x02                         }, { vcmplesd k5{k7},xmm29,QWORD rdx+0x3f8                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x02       }, { vcmplesd k5{k7},xmm29,QWORD rdx+0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x02                         }, { vcmplesd k5{k7},xmm29,QWORD rdx-0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x02       }, { vcmplesd k5{k7},xmm29,QWORD rdx-0x408                      }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x02                               }, { vcmplesd k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x02                               }, { vcmplesd k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x02                               }, { vcmplesd k5{k7},xmm29,QWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vcmplesd k5{k7},xmm29,QWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x02                         }, { vcmplesd k5{k7},xmm29,QWORD rdx+0x3f8                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x02       }, { vcmplesd k5{k7},xmm29,QWORD rdx+0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x02                         }, { vcmplesd k5{k7},xmm29,QWORD rdx-0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x02       }, { vcmplesd k5{k7},xmm29,QWORD rdx-0x408                      }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x03                               }, { vcmpunordsd k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x03                               }, { vcmpunordsd k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x03                               }, { vcmpunordsd k5{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x03 }, { vcmpunordsd k5{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x03                         }, { vcmpunordsd k5{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x03       }, { vcmpunordsd k5{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x03                         }, { vcmpunordsd k5{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x03       }, { vcmpunordsd k5{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x03                               }, { vcmpunordsd k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x03                               }, { vcmpunordsd k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x03                               }, { vcmpunordsd k5{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x03 }, { vcmpunordsd k5{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x03                         }, { vcmpunordsd k5{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x03       }, { vcmpunordsd k5{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x03                         }, { vcmpunordsd k5{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x03       }, { vcmpunordsd k5{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x04                               }, { vcmpneqsd k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x04                               }, { vcmpneqsd k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x04                               }, { vcmpneqsd k5{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vcmpneqsd k5{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x04                         }, { vcmpneqsd k5{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x04       }, { vcmpneqsd k5{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x04                         }, { vcmpneqsd k5{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x04       }, { vcmpneqsd k5{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x04                               }, { vcmpneqsd k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x04                               }, { vcmpneqsd k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x04                               }, { vcmpneqsd k5{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vcmpneqsd k5{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x04                         }, { vcmpneqsd k5{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x04       }, { vcmpneqsd k5{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x04                         }, { vcmpneqsd k5{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x04       }, { vcmpneqsd k5{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x05                               }, { vcmpnltsd k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x05                               }, { vcmpnltsd k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x05                               }, { vcmpnltsd k5{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vcmpnltsd k5{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x05                         }, { vcmpnltsd k5{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x05       }, { vcmpnltsd k5{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x05                         }, { vcmpnltsd k5{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x05       }, { vcmpnltsd k5{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x05                               }, { vcmpnltsd k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x05                               }, { vcmpnltsd k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x05                               }, { vcmpnltsd k5{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vcmpnltsd k5{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x05                         }, { vcmpnltsd k5{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x05       }, { vcmpnltsd k5{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x05                         }, { vcmpnltsd k5{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x05       }, { vcmpnltsd k5{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x06                               }, { vcmpnlesd k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x06                               }, { vcmpnlesd k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x06                               }, { vcmpnlesd k5{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vcmpnlesd k5{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x06                         }, { vcmpnlesd k5{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x06       }, { vcmpnlesd k5{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x06                         }, { vcmpnlesd k5{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x06       }, { vcmpnlesd k5{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x06                               }, { vcmpnlesd k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x06                               }, { vcmpnlesd k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x06                               }, { vcmpnlesd k5{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vcmpnlesd k5{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x06                         }, { vcmpnlesd k5{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x06       }, { vcmpnlesd k5{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x06                         }, { vcmpnlesd k5{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x06       }, { vcmpnlesd k5{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x07                               }, { vcmpordsd k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x07                               }, { vcmpordsd k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x07                               }, { vcmpordsd k5{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x07 }, { vcmpordsd k5{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x07                         }, { vcmpordsd k5{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x07       }, { vcmpordsd k5{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x07                         }, { vcmpordsd k5{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x07       }, { vcmpordsd k5{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x07                               }, { vcmpordsd k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x07                               }, { vcmpordsd k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x07                               }, { vcmpordsd k5{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x07 }, { vcmpordsd k5{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x07                         }, { vcmpordsd k5{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x07       }, { vcmpordsd k5{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x07                         }, { vcmpordsd k5{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x07       }, { vcmpordsd k5{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x08                               }, { vcmpeq_uqsd k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x08                               }, { vcmpeq_uqsd k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x08                               }, { vcmpeq_uqsd k5{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x08 }, { vcmpeq_uqsd k5{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x08                         }, { vcmpeq_uqsd k5{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x08       }, { vcmpeq_uqsd k5{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x08                         }, { vcmpeq_uqsd k5{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x08       }, { vcmpeq_uqsd k5{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x09                               }, { vcmpngesd k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x09                               }, { vcmpngesd k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x09                               }, { vcmpngesd k5{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x09 }, { vcmpngesd k5{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x09                         }, { vcmpngesd k5{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x09       }, { vcmpngesd k5{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x09                         }, { vcmpngesd k5{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x09       }, { vcmpngesd k5{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x09                               }, { vcmpngesd k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x09                               }, { vcmpngesd k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x09                               }, { vcmpngesd k5{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x09 }, { vcmpngesd k5{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x09                         }, { vcmpngesd k5{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x09       }, { vcmpngesd k5{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x09                         }, { vcmpngesd k5{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x09       }, { vcmpngesd k5{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0a                               }, { vcmpngtsd k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0a                               }, { vcmpngtsd k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0a                               }, { vcmpngtsd k5{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0a }, { vcmpngtsd k5{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0a                         }, { vcmpngtsd k5{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0a       }, { vcmpngtsd k5{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0a                         }, { vcmpngtsd k5{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0a       }, { vcmpngtsd k5{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0a                               }, { vcmpngtsd k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0a                               }, { vcmpngtsd k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0a                               }, { vcmpngtsd k5{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0a }, { vcmpngtsd k5{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0a                         }, { vcmpngtsd k5{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0a       }, { vcmpngtsd k5{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0a                         }, { vcmpngtsd k5{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0a       }, { vcmpngtsd k5{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0b                               }, { vcmpfalsesd k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0b                               }, { vcmpfalsesd k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0b                               }, { vcmpfalsesd k5{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0b }, { vcmpfalsesd k5{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0b                         }, { vcmpfalsesd k5{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0b       }, { vcmpfalsesd k5{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0b                         }, { vcmpfalsesd k5{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0b       }, { vcmpfalsesd k5{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0b                               }, { vcmpfalsesd k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0b                               }, { vcmpfalsesd k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0b                               }, { vcmpfalsesd k5{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0b }, { vcmpfalsesd k5{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0b                         }, { vcmpfalsesd k5{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0b       }, { vcmpfalsesd k5{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0b                         }, { vcmpfalsesd k5{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0b       }, { vcmpfalsesd k5{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0c                               }, { vcmpneq_oqsd k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0c                               }, { vcmpneq_oqsd k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0c                               }, { vcmpneq_oqsd k5{k7},xmm29,QWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0c }, { vcmpneq_oqsd k5{k7},xmm29,QWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0c                         }, { vcmpneq_oqsd k5{k7},xmm29,QWORD rdx+0x3f8                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0c       }, { vcmpneq_oqsd k5{k7},xmm29,QWORD rdx+0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0c                         }, { vcmpneq_oqsd k5{k7},xmm29,QWORD rdx-0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0c       }, { vcmpneq_oqsd k5{k7},xmm29,QWORD rdx-0x408                  }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0d                               }, { vcmpgesd k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0d                               }, { vcmpgesd k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0d                               }, { vcmpgesd k5{k7},xmm29,QWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0d }, { vcmpgesd k5{k7},xmm29,QWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0d                         }, { vcmpgesd k5{k7},xmm29,QWORD rdx+0x3f8                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0d       }, { vcmpgesd k5{k7},xmm29,QWORD rdx+0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0d                         }, { vcmpgesd k5{k7},xmm29,QWORD rdx-0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0d       }, { vcmpgesd k5{k7},xmm29,QWORD rdx-0x408                      }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0d                               }, { vcmpgesd k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0d                               }, { vcmpgesd k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0d                               }, { vcmpgesd k5{k7},xmm29,QWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0d }, { vcmpgesd k5{k7},xmm29,QWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0d                         }, { vcmpgesd k5{k7},xmm29,QWORD rdx+0x3f8                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0d       }, { vcmpgesd k5{k7},xmm29,QWORD rdx+0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0d                         }, { vcmpgesd k5{k7},xmm29,QWORD rdx-0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0d       }, { vcmpgesd k5{k7},xmm29,QWORD rdx-0x408                      }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0e                               }, { vcmpgtsd k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0e                               }, { vcmpgtsd k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0e                               }, { vcmpgtsd k5{k7},xmm29,QWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0e }, { vcmpgtsd k5{k7},xmm29,QWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0e                         }, { vcmpgtsd k5{k7},xmm29,QWORD rdx+0x3f8                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0e       }, { vcmpgtsd k5{k7},xmm29,QWORD rdx+0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0e                         }, { vcmpgtsd k5{k7},xmm29,QWORD rdx-0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0e       }, { vcmpgtsd k5{k7},xmm29,QWORD rdx-0x408                      }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0e                               }, { vcmpgtsd k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0e                               }, { vcmpgtsd k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0e                               }, { vcmpgtsd k5{k7},xmm29,QWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0e }, { vcmpgtsd k5{k7},xmm29,QWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0e                         }, { vcmpgtsd k5{k7},xmm29,QWORD rdx+0x3f8                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0e       }, { vcmpgtsd k5{k7},xmm29,QWORD rdx+0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0e                         }, { vcmpgtsd k5{k7},xmm29,QWORD rdx-0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0e       }, { vcmpgtsd k5{k7},xmm29,QWORD rdx-0x408                      }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0f                               }, { vcmptruesd k5{k7},xmm29,xmm28                                }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0f                               }, { vcmptruesd k5{k7},xmm29,xmm28,{sae}                          }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0f                               }, { vcmptruesd k5{k7},xmm29,QWORD rcx                          }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0f }, { vcmptruesd k5{k7},xmm29,QWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0f                         }, { vcmptruesd k5{k7},xmm29,QWORD rdx+0x3f8                    }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0f       }, { vcmptruesd k5{k7},xmm29,QWORD rdx+0x400                    }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0f                         }, { vcmptruesd k5{k7},xmm29,QWORD rdx-0x400                    }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0f       }, { vcmptruesd k5{k7},xmm29,QWORD rdx-0x408                    }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0f                               }, { vcmptruesd k5{k7},xmm29,xmm28                                }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0f                               }, { vcmptruesd k5{k7},xmm29,xmm28,{sae}                          }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0f                               }, { vcmptruesd k5{k7},xmm29,QWORD rcx                          }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0f }, { vcmptruesd k5{k7},xmm29,QWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0f                         }, { vcmptruesd k5{k7},xmm29,QWORD rdx+0x3f8                    }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0f       }, { vcmptruesd k5{k7},xmm29,QWORD rdx+0x400                    }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0f                         }, { vcmptruesd k5{k7},xmm29,QWORD rdx-0x400                    }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0f       }, { vcmptruesd k5{k7},xmm29,QWORD rdx-0x408                    }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x10                               }, { vcmpeq_ossd k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x10                               }, { vcmpeq_ossd k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x10                               }, { vcmpeq_ossd k5{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x10 }, { vcmpeq_ossd k5{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x10                         }, { vcmpeq_ossd k5{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x10       }, { vcmpeq_ossd k5{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x10                         }, { vcmpeq_ossd k5{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x10       }, { vcmpeq_ossd k5{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x11                               }, { vcmplt_oqsd k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x11                               }, { vcmplt_oqsd k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x11                               }, { vcmplt_oqsd k5{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x11 }, { vcmplt_oqsd k5{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x11                         }, { vcmplt_oqsd k5{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x11       }, { vcmplt_oqsd k5{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x11                         }, { vcmplt_oqsd k5{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x11       }, { vcmplt_oqsd k5{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x12                               }, { vcmple_oqsd k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x12                               }, { vcmple_oqsd k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x12                               }, { vcmple_oqsd k5{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x12 }, { vcmple_oqsd k5{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x12                         }, { vcmple_oqsd k5{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x12       }, { vcmple_oqsd k5{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x12                         }, { vcmple_oqsd k5{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x12       }, { vcmple_oqsd k5{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x13                               }, { vcmpunord_ssd k5{k7},xmm29,xmm28                             }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x13                               }, { vcmpunord_ssd k5{k7},xmm29,xmm28,{sae}                       }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x13                               }, { vcmpunord_ssd k5{k7},xmm29,QWORD rcx                       }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x13 }, { vcmpunord_ssd k5{k7},xmm29,QWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x13                         }, { vcmpunord_ssd k5{k7},xmm29,QWORD rdx+0x3f8                 }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x13       }, { vcmpunord_ssd k5{k7},xmm29,QWORD rdx+0x400                 }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x13                         }, { vcmpunord_ssd k5{k7},xmm29,QWORD rdx-0x400                 }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x13       }, { vcmpunord_ssd k5{k7},xmm29,QWORD rdx-0x408                 }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x14                               }, { vcmpneq_ussd k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x14                               }, { vcmpneq_ussd k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x14                               }, { vcmpneq_ussd k5{k7},xmm29,QWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x14 }, { vcmpneq_ussd k5{k7},xmm29,QWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x14                         }, { vcmpneq_ussd k5{k7},xmm29,QWORD rdx+0x3f8                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x14       }, { vcmpneq_ussd k5{k7},xmm29,QWORD rdx+0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x14                         }, { vcmpneq_ussd k5{k7},xmm29,QWORD rdx-0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x14       }, { vcmpneq_ussd k5{k7},xmm29,QWORD rdx-0x408                  }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x15                               }, { vcmpnlt_uqsd k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x15                               }, { vcmpnlt_uqsd k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x15                               }, { vcmpnlt_uqsd k5{k7},xmm29,QWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x15 }, { vcmpnlt_uqsd k5{k7},xmm29,QWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x15                         }, { vcmpnlt_uqsd k5{k7},xmm29,QWORD rdx+0x3f8                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x15       }, { vcmpnlt_uqsd k5{k7},xmm29,QWORD rdx+0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x15                         }, { vcmpnlt_uqsd k5{k7},xmm29,QWORD rdx-0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x15       }, { vcmpnlt_uqsd k5{k7},xmm29,QWORD rdx-0x408                  }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x16                               }, { vcmpnle_uqsd k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x16                               }, { vcmpnle_uqsd k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x16                               }, { vcmpnle_uqsd k5{k7},xmm29,QWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x16 }, { vcmpnle_uqsd k5{k7},xmm29,QWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x16                         }, { vcmpnle_uqsd k5{k7},xmm29,QWORD rdx+0x3f8                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x16       }, { vcmpnle_uqsd k5{k7},xmm29,QWORD rdx+0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x16                         }, { vcmpnle_uqsd k5{k7},xmm29,QWORD rdx-0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x16       }, { vcmpnle_uqsd k5{k7},xmm29,QWORD rdx-0x408                  }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x17                               }, { vcmpord_ssd k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x17                               }, { vcmpord_ssd k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x17                               }, { vcmpord_ssd k5{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x17 }, { vcmpord_ssd k5{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x17                         }, { vcmpord_ssd k5{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x17       }, { vcmpord_ssd k5{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x17                         }, { vcmpord_ssd k5{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x17       }, { vcmpord_ssd k5{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x18                               }, { vcmpeq_ussd k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x18                               }, { vcmpeq_ussd k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x18                               }, { vcmpeq_ussd k5{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x18 }, { vcmpeq_ussd k5{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x18                         }, { vcmpeq_ussd k5{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x18       }, { vcmpeq_ussd k5{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x18                         }, { vcmpeq_ussd k5{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x18       }, { vcmpeq_ussd k5{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x19                               }, { vcmpnge_uqsd k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x19                               }, { vcmpnge_uqsd k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x19                               }, { vcmpnge_uqsd k5{k7},xmm29,QWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x19 }, { vcmpnge_uqsd k5{k7},xmm29,QWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x19                         }, { vcmpnge_uqsd k5{k7},xmm29,QWORD rdx+0x3f8                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x19       }, { vcmpnge_uqsd k5{k7},xmm29,QWORD rdx+0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x19                         }, { vcmpnge_uqsd k5{k7},xmm29,QWORD rdx-0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x19       }, { vcmpnge_uqsd k5{k7},xmm29,QWORD rdx-0x408                  }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x1a                               }, { vcmpngt_uqsd k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x1a                               }, { vcmpngt_uqsd k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x1a                               }, { vcmpngt_uqsd k5{k7},xmm29,QWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1a }, { vcmpngt_uqsd k5{k7},xmm29,QWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x1a                         }, { vcmpngt_uqsd k5{k7},xmm29,QWORD rdx+0x3f8                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1a       }, { vcmpngt_uqsd k5{k7},xmm29,QWORD rdx+0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x1a                         }, { vcmpngt_uqsd k5{k7},xmm29,QWORD rdx-0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1a       }, { vcmpngt_uqsd k5{k7},xmm29,QWORD rdx-0x408                  }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x1b                               }, { vcmpfalse_ossd k5{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x1b                               }, { vcmpfalse_ossd k5{k7},xmm29,xmm28,{sae}                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x1b                               }, { vcmpfalse_ossd k5{k7},xmm29,QWORD rcx                      }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1b }, { vcmpfalse_ossd k5{k7},xmm29,QWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x1b                         }, { vcmpfalse_ossd k5{k7},xmm29,QWORD rdx+0x3f8                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1b       }, { vcmpfalse_ossd k5{k7},xmm29,QWORD rdx+0x400                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x1b                         }, { vcmpfalse_ossd k5{k7},xmm29,QWORD rdx-0x400                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1b       }, { vcmpfalse_ossd k5{k7},xmm29,QWORD rdx-0x408                }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x1c                               }, { vcmpneq_ossd k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x1c                               }, { vcmpneq_ossd k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x1c                               }, { vcmpneq_ossd k5{k7},xmm29,QWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1c }, { vcmpneq_ossd k5{k7},xmm29,QWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x1c                         }, { vcmpneq_ossd k5{k7},xmm29,QWORD rdx+0x3f8                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1c       }, { vcmpneq_ossd k5{k7},xmm29,QWORD rdx+0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x1c                         }, { vcmpneq_ossd k5{k7},xmm29,QWORD rdx-0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1c       }, { vcmpneq_ossd k5{k7},xmm29,QWORD rdx-0x408                  }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x1d                               }, { vcmpge_oqsd k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x1d                               }, { vcmpge_oqsd k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x1d                               }, { vcmpge_oqsd k5{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1d }, { vcmpge_oqsd k5{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x1d                         }, { vcmpge_oqsd k5{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1d       }, { vcmpge_oqsd k5{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x1d                         }, { vcmpge_oqsd k5{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1d       }, { vcmpge_oqsd k5{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x1e                               }, { vcmpgt_oqsd k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x1e                               }, { vcmpgt_oqsd k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x1e                               }, { vcmpgt_oqsd k5{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1e }, { vcmpgt_oqsd k5{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x1e                         }, { vcmpgt_oqsd k5{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1e       }, { vcmpgt_oqsd k5{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x1e                         }, { vcmpgt_oqsd k5{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1e       }, { vcmpgt_oqsd k5{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x1f                               }, { vcmptrue_ussd k5{k7},xmm29,xmm28                             }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x1f                               }, { vcmptrue_ussd k5{k7},xmm29,xmm28,{sae}                       }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x1f                               }, { vcmptrue_ussd k5{k7},xmm29,QWORD rcx                       }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1f }, { vcmptrue_ussd k5{k7},xmm29,QWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x1f                         }, { vcmptrue_ussd k5{k7},xmm29,QWORD rdx+0x3f8                 }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1f       }, { vcmptrue_ussd k5{k7},xmm29,QWORD rdx+0x400                 }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x1f                         }, { vcmptrue_ussd k5{k7},xmm29,QWORD rdx-0x400                 }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1f       }, { vcmptrue_ussd k5{k7},xmm29,QWORD rdx-0x408                 }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0xab                               }, { vcmpss k5{k7},xmm29,xmm28,0xab                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0xab                               }, { vcmpss k5{k7},xmm29,xmm28,{sae},0xab                         }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x7b                               }, { vcmpss k5{k7},xmm29,xmm28,0x7b                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x7b                               }, { vcmpss k5{k7},xmm29,xmm28,{sae},0x7b                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x7b                               }, { vcmpss k5{k7},xmm29,DWORD rcx,0x7b                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vcmpss k5{k7},xmm29,DWORD rax+r14*8+0x123,0x7b             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x7b                         }, { vcmpss k5{k7},xmm29,DWORD rdx+0x1fc,0x7b                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vcmpss k5{k7},xmm29,DWORD rdx+0x200,0x7b                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x7b                         }, { vcmpss k5{k7},xmm29,DWORD rdx-0x200,0x7b                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vcmpss k5{k7},xmm29,DWORD rdx-0x204,0x7b                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x00                               }, { vcmpeqss k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x00                               }, { vcmpeqss k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x00                               }, { vcmpeqss k5{k7},xmm29,DWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vcmpeqss k5{k7},xmm29,DWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x00                         }, { vcmpeqss k5{k7},xmm29,DWORD rdx+0x1fc                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x00       }, { vcmpeqss k5{k7},xmm29,DWORD rdx+0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x00                         }, { vcmpeqss k5{k7},xmm29,DWORD rdx-0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x00       }, { vcmpeqss k5{k7},xmm29,DWORD rdx-0x204                      }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x00                               }, { vcmpeqss k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x00                               }, { vcmpeqss k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x00                               }, { vcmpeqss k5{k7},xmm29,DWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vcmpeqss k5{k7},xmm29,DWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x00                         }, { vcmpeqss k5{k7},xmm29,DWORD rdx+0x1fc                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x00       }, { vcmpeqss k5{k7},xmm29,DWORD rdx+0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x00                         }, { vcmpeqss k5{k7},xmm29,DWORD rdx-0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x00       }, { vcmpeqss k5{k7},xmm29,DWORD rdx-0x204                      }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x01                               }, { vcmpltss k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x01                               }, { vcmpltss k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x01                               }, { vcmpltss k5{k7},xmm29,DWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vcmpltss k5{k7},xmm29,DWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x01                         }, { vcmpltss k5{k7},xmm29,DWORD rdx+0x1fc                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x01       }, { vcmpltss k5{k7},xmm29,DWORD rdx+0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x01                         }, { vcmpltss k5{k7},xmm29,DWORD rdx-0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x01       }, { vcmpltss k5{k7},xmm29,DWORD rdx-0x204                      }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x01                               }, { vcmpltss k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x01                               }, { vcmpltss k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x01                               }, { vcmpltss k5{k7},xmm29,DWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vcmpltss k5{k7},xmm29,DWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x01                         }, { vcmpltss k5{k7},xmm29,DWORD rdx+0x1fc                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x01       }, { vcmpltss k5{k7},xmm29,DWORD rdx+0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x01                         }, { vcmpltss k5{k7},xmm29,DWORD rdx-0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x01       }, { vcmpltss k5{k7},xmm29,DWORD rdx-0x204                      }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x02                               }, { vcmpless k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x02                               }, { vcmpless k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x02                               }, { vcmpless k5{k7},xmm29,DWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vcmpless k5{k7},xmm29,DWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x02                         }, { vcmpless k5{k7},xmm29,DWORD rdx+0x1fc                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x02       }, { vcmpless k5{k7},xmm29,DWORD rdx+0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x02                         }, { vcmpless k5{k7},xmm29,DWORD rdx-0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x02       }, { vcmpless k5{k7},xmm29,DWORD rdx-0x204                      }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x02                               }, { vcmpless k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x02                               }, { vcmpless k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x02                               }, { vcmpless k5{k7},xmm29,DWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vcmpless k5{k7},xmm29,DWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x02                         }, { vcmpless k5{k7},xmm29,DWORD rdx+0x1fc                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x02       }, { vcmpless k5{k7},xmm29,DWORD rdx+0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x02                         }, { vcmpless k5{k7},xmm29,DWORD rdx-0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x02       }, { vcmpless k5{k7},xmm29,DWORD rdx-0x204                      }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x03                               }, { vcmpunordss k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x03                               }, { vcmpunordss k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x03                               }, { vcmpunordss k5{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x03 }, { vcmpunordss k5{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x03                         }, { vcmpunordss k5{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x03       }, { vcmpunordss k5{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x03                         }, { vcmpunordss k5{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x03       }, { vcmpunordss k5{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x03                               }, { vcmpunordss k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x03                               }, { vcmpunordss k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x03                               }, { vcmpunordss k5{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x03 }, { vcmpunordss k5{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x03                         }, { vcmpunordss k5{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x03       }, { vcmpunordss k5{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x03                         }, { vcmpunordss k5{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x03       }, { vcmpunordss k5{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x04                               }, { vcmpneqss k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x04                               }, { vcmpneqss k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x04                               }, { vcmpneqss k5{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vcmpneqss k5{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x04                         }, { vcmpneqss k5{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x04       }, { vcmpneqss k5{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x04                         }, { vcmpneqss k5{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x04       }, { vcmpneqss k5{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x04                               }, { vcmpneqss k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x04                               }, { vcmpneqss k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x04                               }, { vcmpneqss k5{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vcmpneqss k5{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x04                         }, { vcmpneqss k5{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x04       }, { vcmpneqss k5{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x04                         }, { vcmpneqss k5{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x04       }, { vcmpneqss k5{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x05                               }, { vcmpnltss k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x05                               }, { vcmpnltss k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x05                               }, { vcmpnltss k5{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vcmpnltss k5{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x05                         }, { vcmpnltss k5{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x05       }, { vcmpnltss k5{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x05                         }, { vcmpnltss k5{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x05       }, { vcmpnltss k5{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x05                               }, { vcmpnltss k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x05                               }, { vcmpnltss k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x05                               }, { vcmpnltss k5{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vcmpnltss k5{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x05                         }, { vcmpnltss k5{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x05       }, { vcmpnltss k5{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x05                         }, { vcmpnltss k5{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x05       }, { vcmpnltss k5{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x06                               }, { vcmpnless k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x06                               }, { vcmpnless k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x06                               }, { vcmpnless k5{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vcmpnless k5{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x06                         }, { vcmpnless k5{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x06       }, { vcmpnless k5{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x06                         }, { vcmpnless k5{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x06       }, { vcmpnless k5{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x06                               }, { vcmpnless k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x06                               }, { vcmpnless k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x06                               }, { vcmpnless k5{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vcmpnless k5{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x06                         }, { vcmpnless k5{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x06       }, { vcmpnless k5{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x06                         }, { vcmpnless k5{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x06       }, { vcmpnless k5{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x07                               }, { vcmpordss k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x07                               }, { vcmpordss k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x07                               }, { vcmpordss k5{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x07 }, { vcmpordss k5{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x07                         }, { vcmpordss k5{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x07       }, { vcmpordss k5{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x07                         }, { vcmpordss k5{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x07       }, { vcmpordss k5{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x07                               }, { vcmpordss k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x07                               }, { vcmpordss k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x07                               }, { vcmpordss k5{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x07 }, { vcmpordss k5{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x07                         }, { vcmpordss k5{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x07       }, { vcmpordss k5{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x07                         }, { vcmpordss k5{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x07       }, { vcmpordss k5{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x08                               }, { vcmpeq_uqss k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x08                               }, { vcmpeq_uqss k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x08                               }, { vcmpeq_uqss k5{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x08 }, { vcmpeq_uqss k5{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x08                         }, { vcmpeq_uqss k5{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x08       }, { vcmpeq_uqss k5{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x08                         }, { vcmpeq_uqss k5{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x08       }, { vcmpeq_uqss k5{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x09                               }, { vcmpngess k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x09                               }, { vcmpngess k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x09                               }, { vcmpngess k5{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x09 }, { vcmpngess k5{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x09                         }, { vcmpngess k5{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x09       }, { vcmpngess k5{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x09                         }, { vcmpngess k5{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x09       }, { vcmpngess k5{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x09                               }, { vcmpngess k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x09                               }, { vcmpngess k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x09                               }, { vcmpngess k5{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x09 }, { vcmpngess k5{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x09                         }, { vcmpngess k5{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x09       }, { vcmpngess k5{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x09                         }, { vcmpngess k5{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x09       }, { vcmpngess k5{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0a                               }, { vcmpngtss k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0a                               }, { vcmpngtss k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0a                               }, { vcmpngtss k5{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0a }, { vcmpngtss k5{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0a                         }, { vcmpngtss k5{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0a       }, { vcmpngtss k5{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0a                         }, { vcmpngtss k5{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0a       }, { vcmpngtss k5{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0a                               }, { vcmpngtss k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0a                               }, { vcmpngtss k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0a                               }, { vcmpngtss k5{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0a }, { vcmpngtss k5{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0a                         }, { vcmpngtss k5{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0a       }, { vcmpngtss k5{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0a                         }, { vcmpngtss k5{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0a       }, { vcmpngtss k5{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0b                               }, { vcmpfalsess k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0b                               }, { vcmpfalsess k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0b                               }, { vcmpfalsess k5{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0b }, { vcmpfalsess k5{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0b                         }, { vcmpfalsess k5{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0b       }, { vcmpfalsess k5{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0b                         }, { vcmpfalsess k5{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0b       }, { vcmpfalsess k5{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0b                               }, { vcmpfalsess k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0b                               }, { vcmpfalsess k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0b                               }, { vcmpfalsess k5{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0b }, { vcmpfalsess k5{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0b                         }, { vcmpfalsess k5{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0b       }, { vcmpfalsess k5{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0b                         }, { vcmpfalsess k5{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0b       }, { vcmpfalsess k5{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0c                               }, { vcmpneq_oqss k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0c                               }, { vcmpneq_oqss k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0c                               }, { vcmpneq_oqss k5{k7},xmm29,DWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0c }, { vcmpneq_oqss k5{k7},xmm29,DWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0c                         }, { vcmpneq_oqss k5{k7},xmm29,DWORD rdx+0x1fc                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0c       }, { vcmpneq_oqss k5{k7},xmm29,DWORD rdx+0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0c                         }, { vcmpneq_oqss k5{k7},xmm29,DWORD rdx-0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0c       }, { vcmpneq_oqss k5{k7},xmm29,DWORD rdx-0x204                  }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0d                               }, { vcmpgess k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0d                               }, { vcmpgess k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0d                               }, { vcmpgess k5{k7},xmm29,DWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0d }, { vcmpgess k5{k7},xmm29,DWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0d                         }, { vcmpgess k5{k7},xmm29,DWORD rdx+0x1fc                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0d       }, { vcmpgess k5{k7},xmm29,DWORD rdx+0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0d                         }, { vcmpgess k5{k7},xmm29,DWORD rdx-0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0d       }, { vcmpgess k5{k7},xmm29,DWORD rdx-0x204                      }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0d                               }, { vcmpgess k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0d                               }, { vcmpgess k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0d                               }, { vcmpgess k5{k7},xmm29,DWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0d }, { vcmpgess k5{k7},xmm29,DWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0d                         }, { vcmpgess k5{k7},xmm29,DWORD rdx+0x1fc                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0d       }, { vcmpgess k5{k7},xmm29,DWORD rdx+0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0d                         }, { vcmpgess k5{k7},xmm29,DWORD rdx-0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0d       }, { vcmpgess k5{k7},xmm29,DWORD rdx-0x204                      }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0e                               }, { vcmpgtss k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0e                               }, { vcmpgtss k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0e                               }, { vcmpgtss k5{k7},xmm29,DWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0e }, { vcmpgtss k5{k7},xmm29,DWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0e                         }, { vcmpgtss k5{k7},xmm29,DWORD rdx+0x1fc                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0e       }, { vcmpgtss k5{k7},xmm29,DWORD rdx+0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0e                         }, { vcmpgtss k5{k7},xmm29,DWORD rdx-0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0e       }, { vcmpgtss k5{k7},xmm29,DWORD rdx-0x204                      }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0e                               }, { vcmpgtss k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0e                               }, { vcmpgtss k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0e                               }, { vcmpgtss k5{k7},xmm29,DWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0e }, { vcmpgtss k5{k7},xmm29,DWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0e                         }, { vcmpgtss k5{k7},xmm29,DWORD rdx+0x1fc                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0e       }, { vcmpgtss k5{k7},xmm29,DWORD rdx+0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0e                         }, { vcmpgtss k5{k7},xmm29,DWORD rdx-0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0e       }, { vcmpgtss k5{k7},xmm29,DWORD rdx-0x204                      }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0f                               }, { vcmptruess k5{k7},xmm29,xmm28                                }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0f                               }, { vcmptruess k5{k7},xmm29,xmm28,{sae}                          }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0f                               }, { vcmptruess k5{k7},xmm29,DWORD rcx                          }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0f }, { vcmptruess k5{k7},xmm29,DWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0f                         }, { vcmptruess k5{k7},xmm29,DWORD rdx+0x1fc                    }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0f       }, { vcmptruess k5{k7},xmm29,DWORD rdx+0x200                    }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0f                         }, { vcmptruess k5{k7},xmm29,DWORD rdx-0x200                    }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0f       }, { vcmptruess k5{k7},xmm29,DWORD rdx-0x204                    }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0f                               }, { vcmptruess k5{k7},xmm29,xmm28                                }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0f                               }, { vcmptruess k5{k7},xmm29,xmm28,{sae}                          }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0f                               }, { vcmptruess k5{k7},xmm29,DWORD rcx                          }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0f }, { vcmptruess k5{k7},xmm29,DWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0f                         }, { vcmptruess k5{k7},xmm29,DWORD rdx+0x1fc                    }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0f       }, { vcmptruess k5{k7},xmm29,DWORD rdx+0x200                    }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0f                         }, { vcmptruess k5{k7},xmm29,DWORD rdx-0x200                    }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0f       }, { vcmptruess k5{k7},xmm29,DWORD rdx-0x204                    }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x10                               }, { vcmpeq_osss k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x10                               }, { vcmpeq_osss k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x10                               }, { vcmpeq_osss k5{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x10 }, { vcmpeq_osss k5{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x10                         }, { vcmpeq_osss k5{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x10       }, { vcmpeq_osss k5{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x10                         }, { vcmpeq_osss k5{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x10       }, { vcmpeq_osss k5{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x11                               }, { vcmplt_oqss k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x11                               }, { vcmplt_oqss k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x11                               }, { vcmplt_oqss k5{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x11 }, { vcmplt_oqss k5{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x11                         }, { vcmplt_oqss k5{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x11       }, { vcmplt_oqss k5{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x11                         }, { vcmplt_oqss k5{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x11       }, { vcmplt_oqss k5{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x12                               }, { vcmple_oqss k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x12                               }, { vcmple_oqss k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x12                               }, { vcmple_oqss k5{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x12 }, { vcmple_oqss k5{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x12                         }, { vcmple_oqss k5{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x12       }, { vcmple_oqss k5{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x12                         }, { vcmple_oqss k5{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x12       }, { vcmple_oqss k5{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x13                               }, { vcmpunord_sss k5{k7},xmm29,xmm28                             }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x13                               }, { vcmpunord_sss k5{k7},xmm29,xmm28,{sae}                       }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x13                               }, { vcmpunord_sss k5{k7},xmm29,DWORD rcx                       }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x13 }, { vcmpunord_sss k5{k7},xmm29,DWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x13                         }, { vcmpunord_sss k5{k7},xmm29,DWORD rdx+0x1fc                 }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x13       }, { vcmpunord_sss k5{k7},xmm29,DWORD rdx+0x200                 }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x13                         }, { vcmpunord_sss k5{k7},xmm29,DWORD rdx-0x200                 }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x13       }, { vcmpunord_sss k5{k7},xmm29,DWORD rdx-0x204                 }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x14                               }, { vcmpneq_usss k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x14                               }, { vcmpneq_usss k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x14                               }, { vcmpneq_usss k5{k7},xmm29,DWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x14 }, { vcmpneq_usss k5{k7},xmm29,DWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x14                         }, { vcmpneq_usss k5{k7},xmm29,DWORD rdx+0x1fc                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x14       }, { vcmpneq_usss k5{k7},xmm29,DWORD rdx+0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x14                         }, { vcmpneq_usss k5{k7},xmm29,DWORD rdx-0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x14       }, { vcmpneq_usss k5{k7},xmm29,DWORD rdx-0x204                  }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x15                               }, { vcmpnlt_uqss k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x15                               }, { vcmpnlt_uqss k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x15                               }, { vcmpnlt_uqss k5{k7},xmm29,DWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x15 }, { vcmpnlt_uqss k5{k7},xmm29,DWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x15                         }, { vcmpnlt_uqss k5{k7},xmm29,DWORD rdx+0x1fc                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x15       }, { vcmpnlt_uqss k5{k7},xmm29,DWORD rdx+0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x15                         }, { vcmpnlt_uqss k5{k7},xmm29,DWORD rdx-0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x15       }, { vcmpnlt_uqss k5{k7},xmm29,DWORD rdx-0x204                  }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x16                               }, { vcmpnle_uqss k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x16                               }, { vcmpnle_uqss k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x16                               }, { vcmpnle_uqss k5{k7},xmm29,DWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x16 }, { vcmpnle_uqss k5{k7},xmm29,DWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x16                         }, { vcmpnle_uqss k5{k7},xmm29,DWORD rdx+0x1fc                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x16       }, { vcmpnle_uqss k5{k7},xmm29,DWORD rdx+0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x16                         }, { vcmpnle_uqss k5{k7},xmm29,DWORD rdx-0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x16       }, { vcmpnle_uqss k5{k7},xmm29,DWORD rdx-0x204                  }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x17                               }, { vcmpord_sss k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x17                               }, { vcmpord_sss k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x17                               }, { vcmpord_sss k5{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x17 }, { vcmpord_sss k5{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x17                         }, { vcmpord_sss k5{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x17       }, { vcmpord_sss k5{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x17                         }, { vcmpord_sss k5{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x17       }, { vcmpord_sss k5{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x18                               }, { vcmpeq_usss k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x18                               }, { vcmpeq_usss k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x18                               }, { vcmpeq_usss k5{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x18 }, { vcmpeq_usss k5{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x18                         }, { vcmpeq_usss k5{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x18       }, { vcmpeq_usss k5{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x18                         }, { vcmpeq_usss k5{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x18       }, { vcmpeq_usss k5{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x19                               }, { vcmpnge_uqss k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x19                               }, { vcmpnge_uqss k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x19                               }, { vcmpnge_uqss k5{k7},xmm29,DWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x19 }, { vcmpnge_uqss k5{k7},xmm29,DWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x19                         }, { vcmpnge_uqss k5{k7},xmm29,DWORD rdx+0x1fc                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x19       }, { vcmpnge_uqss k5{k7},xmm29,DWORD rdx+0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x19                         }, { vcmpnge_uqss k5{k7},xmm29,DWORD rdx-0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x19       }, { vcmpnge_uqss k5{k7},xmm29,DWORD rdx-0x204                  }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x1a                               }, { vcmpngt_uqss k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x1a                               }, { vcmpngt_uqss k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x1a                               }, { vcmpngt_uqss k5{k7},xmm29,DWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1a }, { vcmpngt_uqss k5{k7},xmm29,DWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x1a                         }, { vcmpngt_uqss k5{k7},xmm29,DWORD rdx+0x1fc                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1a       }, { vcmpngt_uqss k5{k7},xmm29,DWORD rdx+0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x1a                         }, { vcmpngt_uqss k5{k7},xmm29,DWORD rdx-0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1a       }, { vcmpngt_uqss k5{k7},xmm29,DWORD rdx-0x204                  }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x1b                               }, { vcmpfalse_osss k5{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x1b                               }, { vcmpfalse_osss k5{k7},xmm29,xmm28,{sae}                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x1b                               }, { vcmpfalse_osss k5{k7},xmm29,DWORD rcx                      }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1b }, { vcmpfalse_osss k5{k7},xmm29,DWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x1b                         }, { vcmpfalse_osss k5{k7},xmm29,DWORD rdx+0x1fc                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1b       }, { vcmpfalse_osss k5{k7},xmm29,DWORD rdx+0x200                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x1b                         }, { vcmpfalse_osss k5{k7},xmm29,DWORD rdx-0x200                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1b       }, { vcmpfalse_osss k5{k7},xmm29,DWORD rdx-0x204                }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x1c                               }, { vcmpneq_osss k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x1c                               }, { vcmpneq_osss k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x1c                               }, { vcmpneq_osss k5{k7},xmm29,DWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1c }, { vcmpneq_osss k5{k7},xmm29,DWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x1c                         }, { vcmpneq_osss k5{k7},xmm29,DWORD rdx+0x1fc                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1c       }, { vcmpneq_osss k5{k7},xmm29,DWORD rdx+0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x1c                         }, { vcmpneq_osss k5{k7},xmm29,DWORD rdx-0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1c       }, { vcmpneq_osss k5{k7},xmm29,DWORD rdx-0x204                  }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x1d                               }, { vcmpge_oqss k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x1d                               }, { vcmpge_oqss k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x1d                               }, { vcmpge_oqss k5{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1d }, { vcmpge_oqss k5{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x1d                         }, { vcmpge_oqss k5{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1d       }, { vcmpge_oqss k5{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x1d                         }, { vcmpge_oqss k5{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1d       }, { vcmpge_oqss k5{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x1e                               }, { vcmpgt_oqss k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x1e                               }, { vcmpgt_oqss k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x1e                               }, { vcmpgt_oqss k5{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1e }, { vcmpgt_oqss k5{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x1e                         }, { vcmpgt_oqss k5{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1e       }, { vcmpgt_oqss k5{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x1e                         }, { vcmpgt_oqss k5{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1e       }, { vcmpgt_oqss k5{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x1f                               }, { vcmptrue_usss k5{k7},xmm29,xmm28                             }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x1f                               }, { vcmptrue_usss k5{k7},xmm29,xmm28,{sae}                       }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x1f                               }, { vcmptrue_usss k5{k7},xmm29,DWORD rcx                       }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1f }, { vcmptrue_usss k5{k7},xmm29,DWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x1f                         }, { vcmptrue_usss k5{k7},xmm29,DWORD rdx+0x1fc                 }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1f       }, { vcmptrue_usss k5{k7},xmm29,DWORD rdx+0x200                 }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x1f                         }, { vcmptrue_usss k5{k7},xmm29,DWORD rdx-0x200                 }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1f       }, { vcmptrue_usss k5{k7},xmm29,DWORD rdx-0x204                 }
+testcase	{ 0x62, 0x01, 0xfd, 0x08, 0x2f, 0xf5                                     }, { vcomisd xmm30,xmm29                                          }
+testcase	{ 0x62, 0x01, 0xfd, 0x18, 0x2f, 0xf5                                     }, { vcomisd xmm30,xmm29,{sae}                                    }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x2f, 0x31                                     }, { vcomisd xmm30,QWORD rcx                                    }
+testcase	{ 0x62, 0x21, 0xfd, 0x08, 0x2f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcomisd xmm30,QWORD rax+r14*8+0x123                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x2f, 0x72, 0x7f                               }, { vcomisd xmm30,QWORD rdx+0x3f8                              }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x2f, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vcomisd xmm30,QWORD rdx+0x400                              }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x2f, 0x72, 0x80                               }, { vcomisd xmm30,QWORD rdx-0x400                              }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x2f, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vcomisd xmm30,QWORD rdx-0x408                              }
+testcase	{ 0x62, 0x01, 0x7c, 0x08, 0x2f, 0xf5                                     }, { vcomiss xmm30,xmm29                                          }
+testcase	{ 0x62, 0x01, 0x7c, 0x18, 0x2f, 0xf5                                     }, { vcomiss xmm30,xmm29,{sae}                                    }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x2f, 0x31                                     }, { vcomiss xmm30,DWORD rcx                                    }
+testcase	{ 0x62, 0x21, 0x7c, 0x08, 0x2f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcomiss xmm30,DWORD rax+r14*8+0x123                        }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x2f, 0x72, 0x7f                               }, { vcomiss xmm30,DWORD rdx+0x1fc                              }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x2f, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcomiss xmm30,DWORD rdx+0x200                              }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x2f, 0x72, 0x80                               }, { vcomiss xmm30,DWORD rdx-0x200                              }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x2f, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcomiss xmm30,DWORD rdx-0x204                              }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x8a, 0x31                                     }, { vcompresspd ZWORD rcx,zmm30                                }
+testcase	{ 0x62, 0x62, 0xfd, 0x4f, 0x8a, 0x31                                     }, { vcompresspd ZWORD rcx{k7},zmm30                            }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x8a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcompresspd ZWORD rax+r14*8+0x123,zmm30                    }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x8a, 0x72, 0x7f                               }, { vcompresspd ZWORD rdx+0x3f8,zmm30                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x8a, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vcompresspd ZWORD rdx+0x400,zmm30                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x8a, 0x72, 0x80                               }, { vcompresspd ZWORD rdx-0x400,zmm30                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x8a, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vcompresspd ZWORD rdx-0x408,zmm30                          }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0x8a, 0xee                                     }, { vcompresspd zmm30,zmm29                                      }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0x8a, 0xee                                     }, { vcompresspd zmm30{k7},zmm29                                  }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0x8a, 0xee                                     }, { vcompresspd zmm30{k7}{z},zmm29                               }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x8a, 0x31                                     }, { vcompressps ZWORD rcx,zmm30                                }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x8a, 0x31                                     }, { vcompressps ZWORD rcx{k7},zmm30                            }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x8a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcompressps ZWORD rax+r14*8+0x123,zmm30                    }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x8a, 0x72, 0x7f                               }, { vcompressps ZWORD rdx+0x1fc,zmm30                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x8a, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcompressps ZWORD rdx+0x200,zmm30                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x8a, 0x72, 0x80                               }, { vcompressps ZWORD rdx-0x200,zmm30                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x8a, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcompressps ZWORD rdx-0x204,zmm30                          }
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0x8a, 0xee                                     }, { vcompressps zmm30,zmm29                                      }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x8a, 0xee                                     }, { vcompressps zmm30{k7},zmm29                                  }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x8a, 0xee                                     }, { vcompressps zmm30{k7}{z},zmm29                               }
+testcase	{ 0x62, 0x01, 0x7e, 0x4f, 0xe6, 0xf5                                     }, { vcvtdq2pd zmm30{k7},ymm29                                    }
+testcase	{ 0x62, 0x01, 0x7e, 0xcf, 0xe6, 0xf5                                     }, { vcvtdq2pd zmm30{k7}{z},ymm29                                 }
+testcase	{ 0x62, 0x61, 0x7e, 0x4f, 0xe6, 0x31                                     }, { vcvtdq2pd zmm30{k7},YWORD rcx                              }
+testcase	{ 0x62, 0x21, 0x7e, 0x4f, 0xe6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtdq2pd zmm30{k7},YWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x61, 0x7e, 0x5f, 0xe6, 0x31                                     }, { vcvtdq2pd zmm30{k7},DWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x61, 0x7e, 0x4f, 0xe6, 0x72, 0x7f                               }, { vcvtdq2pd zmm30{k7},YWORD rdx+0xfe0                        }
+testcase	{ 0x62, 0x61, 0x7e, 0x4f, 0xe6, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vcvtdq2pd zmm30{k7},YWORD rdx+0x1000                       }
+testcase	{ 0x62, 0x61, 0x7e, 0x4f, 0xe6, 0x72, 0x80                               }, { vcvtdq2pd zmm30{k7},YWORD rdx-0x1000                       }
+testcase	{ 0x62, 0x61, 0x7e, 0x4f, 0xe6, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vcvtdq2pd zmm30{k7},YWORD rdx-0x1020                       }
+testcase	{ 0x62, 0x61, 0x7e, 0x5f, 0xe6, 0x72, 0x7f                               }, { vcvtdq2pd zmm30{k7},DWORD rdx+0x1fc{1to8}                  }
+testcase	{ 0x62, 0x61, 0x7e, 0x5f, 0xe6, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvtdq2pd zmm30{k7},DWORD rdx+0x200{1to8}                  }
+testcase	{ 0x62, 0x61, 0x7e, 0x5f, 0xe6, 0x72, 0x80                               }, { vcvtdq2pd zmm30{k7},DWORD rdx-0x200{1to8}                  }
+testcase	{ 0x62, 0x61, 0x7e, 0x5f, 0xe6, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtdq2pd zmm30{k7},DWORD rdx-0x204{1to8}                  }
+testcase	{ 0x62, 0x01, 0x7c, 0x48, 0x5b, 0xf5                                     }, { vcvtdq2ps zmm30,zmm29                                        }
+testcase	{ 0x62, 0x01, 0x7c, 0x4f, 0x5b, 0xf5                                     }, { vcvtdq2ps zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x01, 0x7c, 0xcf, 0x5b, 0xf5                                     }, { vcvtdq2ps zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x01, 0x7c, 0x18, 0x5b, 0xf5                                     }, { vcvtdq2ps zmm30,zmm29,{rn-sae}                               }
+testcase	{ 0x62, 0x01, 0x7c, 0x58, 0x5b, 0xf5                                     }, { vcvtdq2ps zmm30,zmm29,{ru-sae}                               }
+testcase	{ 0x62, 0x01, 0x7c, 0x38, 0x5b, 0xf5                                     }, { vcvtdq2ps zmm30,zmm29,{rd-sae}                               }
+testcase	{ 0x62, 0x01, 0x7c, 0x78, 0x5b, 0xf5                                     }, { vcvtdq2ps zmm30,zmm29,{rz-sae}                               }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x5b, 0x31                                     }, { vcvtdq2ps zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x21, 0x7c, 0x48, 0x5b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtdq2ps zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x5b, 0x31                                     }, { vcvtdq2ps zmm30,DWORD rcx{1to16}                           }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x5b, 0x72, 0x7f                               }, { vcvtdq2ps zmm30,ZWORD rdx+0x1fc0                           }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x5b, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vcvtdq2ps zmm30,ZWORD rdx+0x2000                           }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x5b, 0x72, 0x80                               }, { vcvtdq2ps zmm30,ZWORD rdx-0x2000                           }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x5b, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vcvtdq2ps zmm30,ZWORD rdx-0x2040                           }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x5b, 0x72, 0x7f                               }, { vcvtdq2ps zmm30,DWORD rdx+0x1fc{1to16}                     }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x5b, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvtdq2ps zmm30,DWORD rdx+0x200{1to16}                     }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x5b, 0x72, 0x80                               }, { vcvtdq2ps zmm30,DWORD rdx-0x200{1to16}                     }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x5b, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtdq2ps zmm30,DWORD rdx-0x204{1to16}                     }
+testcase	{ 0x62, 0x01, 0xff, 0x4f, 0xe6, 0xf5                                     }, { vcvtpd2dq ymm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x01, 0xff, 0xcf, 0xe6, 0xf5                                     }, { vcvtpd2dq ymm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x01, 0xff, 0x1f, 0xe6, 0xf5                                     }, { vcvtpd2dq ymm30{k7},zmm29,{rn-sae}                           }
+testcase	{ 0x62, 0x01, 0xff, 0x5f, 0xe6, 0xf5                                     }, { vcvtpd2dq ymm30{k7},zmm29,{ru-sae}                           }
+testcase	{ 0x62, 0x01, 0xff, 0x3f, 0xe6, 0xf5                                     }, { vcvtpd2dq ymm30{k7},zmm29,{rd-sae}                           }
+testcase	{ 0x62, 0x01, 0xff, 0x7f, 0xe6, 0xf5                                     }, { vcvtpd2dq ymm30{k7},zmm29,{rz-sae}                           }
+testcase	{ 0x62, 0x61, 0xff, 0x4f, 0xe6, 0x31                                     }, { vcvtpd2dq ymm30{k7},ZWORD rcx                              }
+testcase	{ 0x62, 0x21, 0xff, 0x4f, 0xe6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtpd2dq ymm30{k7},ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x61, 0xff, 0x5f, 0xe6, 0x31                                     }, { vcvtpd2dq ymm30{k7},QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x61, 0xff, 0x4f, 0xe6, 0x72, 0x7f                               }, { vcvtpd2dq ymm30{k7},ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x61, 0xff, 0x4f, 0xe6, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vcvtpd2dq ymm30{k7},ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x61, 0xff, 0x4f, 0xe6, 0x72, 0x80                               }, { vcvtpd2dq ymm30{k7},ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x61, 0xff, 0x4f, 0xe6, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vcvtpd2dq ymm30{k7},ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x61, 0xff, 0x5f, 0xe6, 0x72, 0x7f                               }, { vcvtpd2dq ymm30{k7},QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x61, 0xff, 0x5f, 0xe6, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vcvtpd2dq ymm30{k7},QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x61, 0xff, 0x5f, 0xe6, 0x72, 0x80                               }, { vcvtpd2dq ymm30{k7},QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x61, 0xff, 0x5f, 0xe6, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtpd2dq ymm30{k7},QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x01, 0xfd, 0x4f, 0x5a, 0xf5                                     }, { vcvtpd2ps ymm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x01, 0xfd, 0xcf, 0x5a, 0xf5                                     }, { vcvtpd2ps ymm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x01, 0xfd, 0x1f, 0x5a, 0xf5                                     }, { vcvtpd2ps ymm30{k7},zmm29,{rn-sae}                           }
+testcase	{ 0x62, 0x01, 0xfd, 0x5f, 0x5a, 0xf5                                     }, { vcvtpd2ps ymm30{k7},zmm29,{ru-sae}                           }
+testcase	{ 0x62, 0x01, 0xfd, 0x3f, 0x5a, 0xf5                                     }, { vcvtpd2ps ymm30{k7},zmm29,{rd-sae}                           }
+testcase	{ 0x62, 0x01, 0xfd, 0x7f, 0x5a, 0xf5                                     }, { vcvtpd2ps ymm30{k7},zmm29,{rz-sae}                           }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0x5a, 0x31                                     }, { vcvtpd2ps ymm30{k7},ZWORD rcx                              }
+testcase	{ 0x62, 0x21, 0xfd, 0x4f, 0x5a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtpd2ps ymm30{k7},ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x61, 0xfd, 0x5f, 0x5a, 0x31                                     }, { vcvtpd2ps ymm30{k7},QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0x5a, 0x72, 0x7f                               }, { vcvtpd2ps ymm30{k7},ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0x5a, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vcvtpd2ps ymm30{k7},ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0x5a, 0x72, 0x80                               }, { vcvtpd2ps ymm30{k7},ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0x5a, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vcvtpd2ps ymm30{k7},ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x61, 0xfd, 0x5f, 0x5a, 0x72, 0x7f                               }, { vcvtpd2ps ymm30{k7},QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x61, 0xfd, 0x5f, 0x5a, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vcvtpd2ps ymm30{k7},QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x61, 0xfd, 0x5f, 0x5a, 0x72, 0x80                               }, { vcvtpd2ps ymm30{k7},QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x61, 0xfd, 0x5f, 0x5a, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtpd2ps ymm30{k7},QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x01, 0xfc, 0x4f, 0x79, 0xf5                                     }, { vcvtpd2udq ymm30{k7},zmm29                                   }
+testcase	{ 0x62, 0x01, 0xfc, 0xcf, 0x79, 0xf5                                     }, { vcvtpd2udq ymm30{k7}{z},zmm29                                }
+testcase	{ 0x62, 0x01, 0xfc, 0x1f, 0x79, 0xf5                                     }, { vcvtpd2udq ymm30{k7},zmm29,{rn-sae}                          }
+testcase	{ 0x62, 0x01, 0xfc, 0x5f, 0x79, 0xf5                                     }, { vcvtpd2udq ymm30{k7},zmm29,{ru-sae}                          }
+testcase	{ 0x62, 0x01, 0xfc, 0x3f, 0x79, 0xf5                                     }, { vcvtpd2udq ymm30{k7},zmm29,{rd-sae}                          }
+testcase	{ 0x62, 0x01, 0xfc, 0x7f, 0x79, 0xf5                                     }, { vcvtpd2udq ymm30{k7},zmm29,{rz-sae}                          }
+testcase	{ 0x62, 0x61, 0xfc, 0x4f, 0x79, 0x31                                     }, { vcvtpd2udq ymm30{k7},ZWORD rcx                             }
+testcase	{ 0x62, 0x21, 0xfc, 0x4f, 0x79, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtpd2udq ymm30{k7},ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0x61, 0xfc, 0x5f, 0x79, 0x31                                     }, { vcvtpd2udq ymm30{k7},QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0x61, 0xfc, 0x4f, 0x79, 0x72, 0x7f                               }, { vcvtpd2udq ymm30{k7},ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0x61, 0xfc, 0x4f, 0x79, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vcvtpd2udq ymm30{k7},ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0x61, 0xfc, 0x4f, 0x79, 0x72, 0x80                               }, { vcvtpd2udq ymm30{k7},ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0x61, 0xfc, 0x4f, 0x79, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vcvtpd2udq ymm30{k7},ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0x61, 0xfc, 0x5f, 0x79, 0x72, 0x7f                               }, { vcvtpd2udq ymm30{k7},QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0x61, 0xfc, 0x5f, 0x79, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vcvtpd2udq ymm30{k7},QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0x61, 0xfc, 0x5f, 0x79, 0x72, 0x80                               }, { vcvtpd2udq ymm30{k7},QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0x61, 0xfc, 0x5f, 0x79, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtpd2udq ymm30{k7},QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x13, 0xf5                                     }, { vcvtph2ps zmm30{k7},ymm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x13, 0xf5                                     }, { vcvtph2ps zmm30{k7}{z},ymm29                                 }
+testcase	{ 0x62, 0x02, 0x7d, 0x1f, 0x13, 0xf5                                     }, { vcvtph2ps zmm30{k7},ymm29,{sae}                              }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x13, 0x31                                     }, { vcvtph2ps zmm30{k7},YWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x7d, 0x4f, 0x13, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtph2ps zmm30{k7},YWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x13, 0x72, 0x7f                               }, { vcvtph2ps zmm30{k7},YWORD rdx+0xfe0                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x13, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vcvtph2ps zmm30{k7},YWORD rdx+0x1000                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x13, 0x72, 0x80                               }, { vcvtph2ps zmm30{k7},YWORD rdx-0x1000                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x13, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vcvtph2ps zmm30{k7},YWORD rdx-0x1020                       }
+testcase	{ 0x62, 0x01, 0x7d, 0x48, 0x5b, 0xf5                                     }, { vcvtps2dq zmm30,zmm29                                        }
+testcase	{ 0x62, 0x01, 0x7d, 0x4f, 0x5b, 0xf5                                     }, { vcvtps2dq zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x01, 0x7d, 0xcf, 0x5b, 0xf5                                     }, { vcvtps2dq zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x01, 0x7d, 0x18, 0x5b, 0xf5                                     }, { vcvtps2dq zmm30,zmm29,{rn-sae}                               }
+testcase	{ 0x62, 0x01, 0x7d, 0x58, 0x5b, 0xf5                                     }, { vcvtps2dq zmm30,zmm29,{ru-sae}                               }
+testcase	{ 0x62, 0x01, 0x7d, 0x38, 0x5b, 0xf5                                     }, { vcvtps2dq zmm30,zmm29,{rd-sae}                               }
+testcase	{ 0x62, 0x01, 0x7d, 0x78, 0x5b, 0xf5                                     }, { vcvtps2dq zmm30,zmm29,{rz-sae}                               }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x5b, 0x31                                     }, { vcvtps2dq zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x21, 0x7d, 0x48, 0x5b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtps2dq zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x61, 0x7d, 0x58, 0x5b, 0x31                                     }, { vcvtps2dq zmm30,DWORD rcx{1to16}                           }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x5b, 0x72, 0x7f                               }, { vcvtps2dq zmm30,ZWORD rdx+0x1fc0                           }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x5b, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vcvtps2dq zmm30,ZWORD rdx+0x2000                           }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x5b, 0x72, 0x80                               }, { vcvtps2dq zmm30,ZWORD rdx-0x2000                           }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x5b, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vcvtps2dq zmm30,ZWORD rdx-0x2040                           }
+testcase	{ 0x62, 0x61, 0x7d, 0x58, 0x5b, 0x72, 0x7f                               }, { vcvtps2dq zmm30,DWORD rdx+0x1fc{1to16}                     }
+testcase	{ 0x62, 0x61, 0x7d, 0x58, 0x5b, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvtps2dq zmm30,DWORD rdx+0x200{1to16}                     }
+testcase	{ 0x62, 0x61, 0x7d, 0x58, 0x5b, 0x72, 0x80                               }, { vcvtps2dq zmm30,DWORD rdx-0x200{1to16}                     }
+testcase	{ 0x62, 0x61, 0x7d, 0x58, 0x5b, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtps2dq zmm30,DWORD rdx-0x204{1to16}                     }
+testcase	{ 0x62, 0x01, 0x7c, 0x4f, 0x5a, 0xf5                                     }, { vcvtps2pd zmm30{k7},ymm29                                    }
+testcase	{ 0x62, 0x01, 0x7c, 0xcf, 0x5a, 0xf5                                     }, { vcvtps2pd zmm30{k7}{z},ymm29                                 }
+testcase	{ 0x62, 0x01, 0x7c, 0x1f, 0x5a, 0xf5                                     }, { vcvtps2pd zmm30{k7},ymm29,{sae}                              }
+testcase	{ 0x62, 0x61, 0x7c, 0x4f, 0x5a, 0x31                                     }, { vcvtps2pd zmm30{k7},YWORD rcx                              }
+testcase	{ 0x62, 0x21, 0x7c, 0x4f, 0x5a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtps2pd zmm30{k7},YWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x61, 0x7c, 0x5f, 0x5a, 0x31                                     }, { vcvtps2pd zmm30{k7},DWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x61, 0x7c, 0x4f, 0x5a, 0x72, 0x7f                               }, { vcvtps2pd zmm30{k7},YWORD rdx+0xfe0                        }
+testcase	{ 0x62, 0x61, 0x7c, 0x4f, 0x5a, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vcvtps2pd zmm30{k7},YWORD rdx+0x1000                       }
+testcase	{ 0x62, 0x61, 0x7c, 0x4f, 0x5a, 0x72, 0x80                               }, { vcvtps2pd zmm30{k7},YWORD rdx-0x1000                       }
+testcase	{ 0x62, 0x61, 0x7c, 0x4f, 0x5a, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vcvtps2pd zmm30{k7},YWORD rdx-0x1020                       }
+testcase	{ 0x62, 0x61, 0x7c, 0x5f, 0x5a, 0x72, 0x7f                               }, { vcvtps2pd zmm30{k7},DWORD rdx+0x1fc{1to8}                  }
+testcase	{ 0x62, 0x61, 0x7c, 0x5f, 0x5a, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvtps2pd zmm30{k7},DWORD rdx+0x200{1to8}                  }
+testcase	{ 0x62, 0x61, 0x7c, 0x5f, 0x5a, 0x72, 0x80                               }, { vcvtps2pd zmm30{k7},DWORD rdx-0x200{1to8}                  }
+testcase	{ 0x62, 0x61, 0x7c, 0x5f, 0x5a, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtps2pd zmm30{k7},DWORD rdx-0x204{1to8}                  }
+testcase	{ 0x62, 0x03, 0x7d, 0x4f, 0x1d, 0xee, 0xab                               }, { vcvtps2ph ymm30{k7},zmm29,0xab                               }
+testcase	{ 0x62, 0x03, 0x7d, 0xcf, 0x1d, 0xee, 0xab                               }, { vcvtps2ph ymm30{k7}{z},zmm29,0xab                            }
+testcase	{ 0x62, 0x03, 0x7d, 0x1f, 0x1d, 0xee, 0xab                               }, { vcvtps2ph ymm30{k7},zmm29,{sae},0xab                         }
+testcase	{ 0x62, 0x03, 0x7d, 0x4f, 0x1d, 0xee, 0x7b                               }, { vcvtps2ph ymm30{k7},zmm29,0x7b                               }
+testcase	{ 0x62, 0x03, 0x7d, 0x1f, 0x1d, 0xee, 0x7b                               }, { vcvtps2ph ymm30{k7},zmm29,{sae},0x7b                         }
+testcase	{ 0x62, 0x01, 0x7c, 0x48, 0x79, 0xf5                                     }, { vcvtps2udq zmm30,zmm29                                       }
+testcase	{ 0x62, 0x01, 0x7c, 0x4f, 0x79, 0xf5                                     }, { vcvtps2udq zmm30{k7},zmm29                                   }
+testcase	{ 0x62, 0x01, 0x7c, 0xcf, 0x79, 0xf5                                     }, { vcvtps2udq zmm30{k7}{z},zmm29                                }
+testcase	{ 0x62, 0x01, 0x7c, 0x18, 0x79, 0xf5                                     }, { vcvtps2udq zmm30,zmm29,{rn-sae}                              }
+testcase	{ 0x62, 0x01, 0x7c, 0x58, 0x79, 0xf5                                     }, { vcvtps2udq zmm30,zmm29,{ru-sae}                              }
+testcase	{ 0x62, 0x01, 0x7c, 0x38, 0x79, 0xf5                                     }, { vcvtps2udq zmm30,zmm29,{rd-sae}                              }
+testcase	{ 0x62, 0x01, 0x7c, 0x78, 0x79, 0xf5                                     }, { vcvtps2udq zmm30,zmm29,{rz-sae}                              }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x79, 0x31                                     }, { vcvtps2udq zmm30,ZWORD rcx                                 }
+testcase	{ 0x62, 0x21, 0x7c, 0x48, 0x79, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtps2udq zmm30,ZWORD rax+r14*8+0x123                     }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x79, 0x31                                     }, { vcvtps2udq zmm30,DWORD rcx{1to16}                          }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x79, 0x72, 0x7f                               }, { vcvtps2udq zmm30,ZWORD rdx+0x1fc0                          }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x79, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vcvtps2udq zmm30,ZWORD rdx+0x2000                          }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x79, 0x72, 0x80                               }, { vcvtps2udq zmm30,ZWORD rdx-0x2000                          }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x79, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vcvtps2udq zmm30,ZWORD rdx-0x2040                          }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x79, 0x72, 0x7f                               }, { vcvtps2udq zmm30,DWORD rdx+0x1fc{1to16}                    }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x79, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvtps2udq zmm30,DWORD rdx+0x200{1to16}                    }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x79, 0x72, 0x80                               }, { vcvtps2udq zmm30,DWORD rdx-0x200{1to16}                    }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x79, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtps2udq zmm30,DWORD rdx-0x204{1to16}                    }
+testcase	{ 0x62, 0x91, 0x7f, 0x18, 0x2d, 0xc6                                     }, { vcvtsd2si eax,xmm30,{rn-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7f, 0x58, 0x2d, 0xc6                                     }, { vcvtsd2si eax,xmm30,{ru-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7f, 0x38, 0x2d, 0xc6                                     }, { vcvtsd2si eax,xmm30,{rd-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7f, 0x78, 0x2d, 0xc6                                     }, { vcvtsd2si eax,xmm30,{rz-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7f, 0x18, 0x2d, 0xee                                     }, { vcvtsd2si ebp,xmm30,{rn-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7f, 0x58, 0x2d, 0xee                                     }, { vcvtsd2si ebp,xmm30,{ru-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7f, 0x38, 0x2d, 0xee                                     }, { vcvtsd2si ebp,xmm30,{rd-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7f, 0x78, 0x2d, 0xee                                     }, { vcvtsd2si ebp,xmm30,{rz-sae}                                 }
+testcase	{ 0x62, 0x11, 0x7f, 0x18, 0x2d, 0xee                                     }, { vcvtsd2si r13d,xmm30,{rn-sae}                                }
+testcase	{ 0x62, 0x11, 0x7f, 0x58, 0x2d, 0xee                                     }, { vcvtsd2si r13d,xmm30,{ru-sae}                                }
+testcase	{ 0x62, 0x11, 0x7f, 0x38, 0x2d, 0xee                                     }, { vcvtsd2si r13d,xmm30,{rd-sae}                                }
+testcase	{ 0x62, 0x11, 0x7f, 0x78, 0x2d, 0xee                                     }, { vcvtsd2si r13d,xmm30,{rz-sae}                                }
+testcase	{ 0x62, 0x91, 0xff, 0x18, 0x2d, 0xc6                                     }, { vcvtsd2si rax,xmm30,{rn-sae}                                 }
+testcase	{ 0x62, 0x91, 0xff, 0x58, 0x2d, 0xc6                                     }, { vcvtsd2si rax,xmm30,{ru-sae}                                 }
+testcase	{ 0x62, 0x91, 0xff, 0x38, 0x2d, 0xc6                                     }, { vcvtsd2si rax,xmm30,{rd-sae}                                 }
+testcase	{ 0x62, 0x91, 0xff, 0x78, 0x2d, 0xc6                                     }, { vcvtsd2si rax,xmm30,{rz-sae}                                 }
+testcase	{ 0x62, 0x11, 0xff, 0x18, 0x2d, 0xc6                                     }, { vcvtsd2si r8,xmm30,{rn-sae}                                  }
+testcase	{ 0x62, 0x11, 0xff, 0x58, 0x2d, 0xc6                                     }, { vcvtsd2si r8,xmm30,{ru-sae}                                  }
+testcase	{ 0x62, 0x11, 0xff, 0x38, 0x2d, 0xc6                                     }, { vcvtsd2si r8,xmm30,{rd-sae}                                  }
+testcase	{ 0x62, 0x11, 0xff, 0x78, 0x2d, 0xc6                                     }, { vcvtsd2si r8,xmm30,{rz-sae}                                  }
+testcase	{ 0x62, 0x01, 0x97, 0x07, 0x5a, 0xf4                                     }, { vcvtsd2ss xmm30{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x97, 0x87, 0x5a, 0xf4                                     }, { vcvtsd2ss xmm30{k7}{z},xmm29,xmm28                           }
+testcase	{ 0x62, 0x01, 0x97, 0x17, 0x5a, 0xf4                                     }, { vcvtsd2ss xmm30{k7},xmm29,xmm28,{rn-sae}                     }
+testcase	{ 0x62, 0x01, 0x97, 0x57, 0x5a, 0xf4                                     }, { vcvtsd2ss xmm30{k7},xmm29,xmm28,{ru-sae}                     }
+testcase	{ 0x62, 0x01, 0x97, 0x37, 0x5a, 0xf4                                     }, { vcvtsd2ss xmm30{k7},xmm29,xmm28,{rd-sae}                     }
+testcase	{ 0x62, 0x01, 0x97, 0x77, 0x5a, 0xf4                                     }, { vcvtsd2ss xmm30{k7},xmm29,xmm28,{rz-sae}                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5a, 0x31                                     }, { vcvtsd2ss xmm30{k7},xmm29,QWORD rcx                        }
+testcase	{ 0x62, 0x21, 0x97, 0x07, 0x5a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtsd2ss xmm30{k7},xmm29,QWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5a, 0x72, 0x7f                               }, { vcvtsd2ss xmm30{k7},xmm29,QWORD rdx+0x3f8                  }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5a, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vcvtsd2ss xmm30{k7},xmm29,QWORD rdx+0x400                  }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5a, 0x72, 0x80                               }, { vcvtsd2ss xmm30{k7},xmm29,QWORD rdx-0x400                  }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5a, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtsd2ss xmm30{k7},xmm29,QWORD rdx-0x408                  }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x2a, 0xf0                                     }, { vcvtsi2sd xmm30,xmm29,eax                                    }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x2a, 0xf5                                     }, { vcvtsi2sd xmm30,xmm29,ebp                                    }
+testcase	{ 0x62, 0x41, 0x17, 0x00, 0x2a, 0xf5                                     }, { vcvtsi2sd xmm30,xmm29,r13d                                   }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x2a, 0x31                                     }, { vcvtsi2sd xmm30,xmm29,DWORD rcx                            }
+testcase	{ 0x62, 0x21, 0x17, 0x00, 0x2a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtsi2sd xmm30,xmm29,DWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x2a, 0x72, 0x7f                               }, { vcvtsi2sd xmm30,xmm29,DWORD rdx+0x1fc                      }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x2a, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvtsi2sd xmm30,xmm29,DWORD rdx+0x200                      }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x2a, 0x72, 0x80                               }, { vcvtsi2sd xmm30,xmm29,DWORD rdx-0x200                      }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x2a, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtsi2sd xmm30,xmm29,DWORD rdx-0x204                      }
+testcase	{ 0x62, 0x61, 0x97, 0x00, 0x2a, 0xf0                                     }, { vcvtsi2sd xmm30,xmm29,rax                                    }
+testcase	{ 0x62, 0x61, 0x97, 0x10, 0x2a, 0xf0                                     }, { vcvtsi2sd xmm30,xmm29,{rn-sae},rax                           }
+testcase	{ 0x62, 0x61, 0x97, 0x50, 0x2a, 0xf0                                     }, { vcvtsi2sd xmm30,xmm29,{ru-sae},rax                           }
+testcase	{ 0x62, 0x61, 0x97, 0x30, 0x2a, 0xf0                                     }, { vcvtsi2sd xmm30,xmm29,{rd-sae},rax                           }
+testcase	{ 0x62, 0x61, 0x97, 0x70, 0x2a, 0xf0                                     }, { vcvtsi2sd xmm30,xmm29,{rz-sae},rax                           }
+testcase	{ 0x62, 0x41, 0x97, 0x00, 0x2a, 0xf0                                     }, { vcvtsi2sd xmm30,xmm29,r8                                     }
+testcase	{ 0x62, 0x41, 0x97, 0x10, 0x2a, 0xf0                                     }, { vcvtsi2sd xmm30,xmm29,{rn-sae},r8                            }
+testcase	{ 0x62, 0x41, 0x97, 0x50, 0x2a, 0xf0                                     }, { vcvtsi2sd xmm30,xmm29,{ru-sae},r8                            }
+testcase	{ 0x62, 0x41, 0x97, 0x30, 0x2a, 0xf0                                     }, { vcvtsi2sd xmm30,xmm29,{rd-sae},r8                            }
+testcase	{ 0x62, 0x41, 0x97, 0x70, 0x2a, 0xf0                                     }, { vcvtsi2sd xmm30,xmm29,{rz-sae},r8                            }
+testcase	{ 0x62, 0x61, 0x97, 0x00, 0x2a, 0x31                                     }, { vcvtsi2sd xmm30,xmm29,QWORD rcx                            }
+testcase	{ 0x62, 0x21, 0x97, 0x00, 0x2a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtsi2sd xmm30,xmm29,QWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x61, 0x97, 0x00, 0x2a, 0x72, 0x7f                               }, { vcvtsi2sd xmm30,xmm29,QWORD rdx+0x3f8                      }
+testcase	{ 0x62, 0x61, 0x97, 0x00, 0x2a, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vcvtsi2sd xmm30,xmm29,QWORD rdx+0x400                      }
+testcase	{ 0x62, 0x61, 0x97, 0x00, 0x2a, 0x72, 0x80                               }, { vcvtsi2sd xmm30,xmm29,QWORD rdx-0x400                      }
+testcase	{ 0x62, 0x61, 0x97, 0x00, 0x2a, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtsi2sd xmm30,xmm29,QWORD rdx-0x408                      }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,eax                                    }
+testcase	{ 0x62, 0x61, 0x16, 0x10, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,{rn-sae},eax                           }
+testcase	{ 0x62, 0x61, 0x16, 0x50, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,{ru-sae},eax                           }
+testcase	{ 0x62, 0x61, 0x16, 0x30, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,{rd-sae},eax                           }
+testcase	{ 0x62, 0x61, 0x16, 0x70, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,{rz-sae},eax                           }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x2a, 0xf5                                     }, { vcvtsi2ss xmm30,xmm29,ebp                                    }
+testcase	{ 0x62, 0x61, 0x16, 0x10, 0x2a, 0xf5                                     }, { vcvtsi2ss xmm30,xmm29,{rn-sae},ebp                           }
+testcase	{ 0x62, 0x61, 0x16, 0x50, 0x2a, 0xf5                                     }, { vcvtsi2ss xmm30,xmm29,{ru-sae},ebp                           }
+testcase	{ 0x62, 0x61, 0x16, 0x30, 0x2a, 0xf5                                     }, { vcvtsi2ss xmm30,xmm29,{rd-sae},ebp                           }
+testcase	{ 0x62, 0x61, 0x16, 0x70, 0x2a, 0xf5                                     }, { vcvtsi2ss xmm30,xmm29,{rz-sae},ebp                           }
+testcase	{ 0x62, 0x41, 0x16, 0x00, 0x2a, 0xf5                                     }, { vcvtsi2ss xmm30,xmm29,r13d                                   }
+testcase	{ 0x62, 0x41, 0x16, 0x10, 0x2a, 0xf5                                     }, { vcvtsi2ss xmm30,xmm29,{rn-sae},r13d                          }
+testcase	{ 0x62, 0x41, 0x16, 0x50, 0x2a, 0xf5                                     }, { vcvtsi2ss xmm30,xmm29,{ru-sae},r13d                          }
+testcase	{ 0x62, 0x41, 0x16, 0x30, 0x2a, 0xf5                                     }, { vcvtsi2ss xmm30,xmm29,{rd-sae},r13d                          }
+testcase	{ 0x62, 0x41, 0x16, 0x70, 0x2a, 0xf5                                     }, { vcvtsi2ss xmm30,xmm29,{rz-sae},r13d                          }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x2a, 0x31                                     }, { vcvtsi2ss xmm30,xmm29,DWORD rcx                            }
+testcase	{ 0x62, 0x21, 0x16, 0x00, 0x2a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtsi2ss xmm30,xmm29,DWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x2a, 0x72, 0x7f                               }, { vcvtsi2ss xmm30,xmm29,DWORD rdx+0x1fc                      }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x2a, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvtsi2ss xmm30,xmm29,DWORD rdx+0x200                      }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x2a, 0x72, 0x80                               }, { vcvtsi2ss xmm30,xmm29,DWORD rdx-0x200                      }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x2a, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtsi2ss xmm30,xmm29,DWORD rdx-0x204                      }
+testcase	{ 0x62, 0x61, 0x96, 0x00, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,rax                                    }
+testcase	{ 0x62, 0x61, 0x96, 0x10, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,{rn-sae},rax                           }
+testcase	{ 0x62, 0x61, 0x96, 0x50, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,{ru-sae},rax                           }
+testcase	{ 0x62, 0x61, 0x96, 0x30, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,{rd-sae},rax                           }
+testcase	{ 0x62, 0x61, 0x96, 0x70, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,{rz-sae},rax                           }
+testcase	{ 0x62, 0x41, 0x96, 0x00, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,r8                                     }
+testcase	{ 0x62, 0x41, 0x96, 0x10, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,{rn-sae},r8                            }
+testcase	{ 0x62, 0x41, 0x96, 0x50, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,{ru-sae},r8                            }
+testcase	{ 0x62, 0x41, 0x96, 0x30, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,{rd-sae},r8                            }
+testcase	{ 0x62, 0x41, 0x96, 0x70, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,{rz-sae},r8                            }
+testcase	{ 0x62, 0x61, 0x96, 0x00, 0x2a, 0x31                                     }, { vcvtsi2ss xmm30,xmm29,QWORD rcx                            }
+testcase	{ 0x62, 0x21, 0x96, 0x00, 0x2a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtsi2ss xmm30,xmm29,QWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x61, 0x96, 0x00, 0x2a, 0x72, 0x7f                               }, { vcvtsi2ss xmm30,xmm29,QWORD rdx+0x3f8                      }
+testcase	{ 0x62, 0x61, 0x96, 0x00, 0x2a, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vcvtsi2ss xmm30,xmm29,QWORD rdx+0x400                      }
+testcase	{ 0x62, 0x61, 0x96, 0x00, 0x2a, 0x72, 0x80                               }, { vcvtsi2ss xmm30,xmm29,QWORD rdx-0x400                      }
+testcase	{ 0x62, 0x61, 0x96, 0x00, 0x2a, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtsi2ss xmm30,xmm29,QWORD rdx-0x408                      }
+testcase	{ 0x62, 0x01, 0x16, 0x07, 0x5a, 0xf4                                     }, { vcvtss2sd xmm30{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x16, 0x87, 0x5a, 0xf4                                     }, { vcvtss2sd xmm30{k7}{z},xmm29,xmm28                           }
+testcase	{ 0x62, 0x01, 0x16, 0x17, 0x5a, 0xf4                                     }, { vcvtss2sd xmm30{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5a, 0x31                                     }, { vcvtss2sd xmm30{k7},xmm29,DWORD rcx                        }
+testcase	{ 0x62, 0x21, 0x16, 0x07, 0x5a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtss2sd xmm30{k7},xmm29,DWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5a, 0x72, 0x7f                               }, { vcvtss2sd xmm30{k7},xmm29,DWORD rdx+0x1fc                  }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5a, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvtss2sd xmm30{k7},xmm29,DWORD rdx+0x200                  }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5a, 0x72, 0x80                               }, { vcvtss2sd xmm30{k7},xmm29,DWORD rdx-0x200                  }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5a, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtss2sd xmm30{k7},xmm29,DWORD rdx-0x204                  }
+testcase	{ 0x62, 0x91, 0x7e, 0x18, 0x2d, 0xc6                                     }, { vcvtss2si eax,xmm30,{rn-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7e, 0x58, 0x2d, 0xc6                                     }, { vcvtss2si eax,xmm30,{ru-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7e, 0x38, 0x2d, 0xc6                                     }, { vcvtss2si eax,xmm30,{rd-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7e, 0x78, 0x2d, 0xc6                                     }, { vcvtss2si eax,xmm30,{rz-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7e, 0x18, 0x2d, 0xee                                     }, { vcvtss2si ebp,xmm30,{rn-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7e, 0x58, 0x2d, 0xee                                     }, { vcvtss2si ebp,xmm30,{ru-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7e, 0x38, 0x2d, 0xee                                     }, { vcvtss2si ebp,xmm30,{rd-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7e, 0x78, 0x2d, 0xee                                     }, { vcvtss2si ebp,xmm30,{rz-sae}                                 }
+testcase	{ 0x62, 0x11, 0x7e, 0x18, 0x2d, 0xee                                     }, { vcvtss2si r13d,xmm30,{rn-sae}                                }
+testcase	{ 0x62, 0x11, 0x7e, 0x58, 0x2d, 0xee                                     }, { vcvtss2si r13d,xmm30,{ru-sae}                                }
+testcase	{ 0x62, 0x11, 0x7e, 0x38, 0x2d, 0xee                                     }, { vcvtss2si r13d,xmm30,{rd-sae}                                }
+testcase	{ 0x62, 0x11, 0x7e, 0x78, 0x2d, 0xee                                     }, { vcvtss2si r13d,xmm30,{rz-sae}                                }
+testcase	{ 0x62, 0x91, 0xfe, 0x18, 0x2d, 0xc6                                     }, { vcvtss2si rax,xmm30,{rn-sae}                                 }
+testcase	{ 0x62, 0x91, 0xfe, 0x58, 0x2d, 0xc6                                     }, { vcvtss2si rax,xmm30,{ru-sae}                                 }
+testcase	{ 0x62, 0x91, 0xfe, 0x38, 0x2d, 0xc6                                     }, { vcvtss2si rax,xmm30,{rd-sae}                                 }
+testcase	{ 0x62, 0x91, 0xfe, 0x78, 0x2d, 0xc6                                     }, { vcvtss2si rax,xmm30,{rz-sae}                                 }
+testcase	{ 0x62, 0x11, 0xfe, 0x18, 0x2d, 0xc6                                     }, { vcvtss2si r8,xmm30,{rn-sae}                                  }
+testcase	{ 0x62, 0x11, 0xfe, 0x58, 0x2d, 0xc6                                     }, { vcvtss2si r8,xmm30,{ru-sae}                                  }
+testcase	{ 0x62, 0x11, 0xfe, 0x38, 0x2d, 0xc6                                     }, { vcvtss2si r8,xmm30,{rd-sae}                                  }
+testcase	{ 0x62, 0x11, 0xfe, 0x78, 0x2d, 0xc6                                     }, { vcvtss2si r8,xmm30,{rz-sae}                                  }
+testcase	{ 0x62, 0x01, 0xfd, 0x4f, 0xe6, 0xf5                                     }, { vcvttpd2dq ymm30{k7},zmm29                                   }
+testcase	{ 0x62, 0x01, 0xfd, 0xcf, 0xe6, 0xf5                                     }, { vcvttpd2dq ymm30{k7}{z},zmm29                                }
+testcase	{ 0x62, 0x01, 0xfd, 0x1f, 0xe6, 0xf5                                     }, { vcvttpd2dq ymm30{k7},zmm29,{sae}                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0xe6, 0x31                                     }, { vcvttpd2dq ymm30{k7},ZWORD rcx                             }
+testcase	{ 0x62, 0x21, 0xfd, 0x4f, 0xe6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttpd2dq ymm30{k7},ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0x61, 0xfd, 0x5f, 0xe6, 0x31                                     }, { vcvttpd2dq ymm30{k7},QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0xe6, 0x72, 0x7f                               }, { vcvttpd2dq ymm30{k7},ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0xe6, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vcvttpd2dq ymm30{k7},ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0xe6, 0x72, 0x80                               }, { vcvttpd2dq ymm30{k7},ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0xe6, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vcvttpd2dq ymm30{k7},ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0x61, 0xfd, 0x5f, 0xe6, 0x72, 0x7f                               }, { vcvttpd2dq ymm30{k7},QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0x61, 0xfd, 0x5f, 0xe6, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vcvttpd2dq ymm30{k7},QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0x61, 0xfd, 0x5f, 0xe6, 0x72, 0x80                               }, { vcvttpd2dq ymm30{k7},QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0x61, 0xfd, 0x5f, 0xe6, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vcvttpd2dq ymm30{k7},QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x01, 0x7e, 0x48, 0x5b, 0xf5                                     }, { vcvttps2dq zmm30,zmm29                                       }
+testcase	{ 0x62, 0x01, 0x7e, 0x4f, 0x5b, 0xf5                                     }, { vcvttps2dq zmm30{k7},zmm29                                   }
+testcase	{ 0x62, 0x01, 0x7e, 0xcf, 0x5b, 0xf5                                     }, { vcvttps2dq zmm30{k7}{z},zmm29                                }
+testcase	{ 0x62, 0x01, 0x7e, 0x18, 0x5b, 0xf5                                     }, { vcvttps2dq zmm30,zmm29,{sae}                                 }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x5b, 0x31                                     }, { vcvttps2dq zmm30,ZWORD rcx                                 }
+testcase	{ 0x62, 0x21, 0x7e, 0x48, 0x5b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttps2dq zmm30,ZWORD rax+r14*8+0x123                     }
+testcase	{ 0x62, 0x61, 0x7e, 0x58, 0x5b, 0x31                                     }, { vcvttps2dq zmm30,DWORD rcx{1to16}                          }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x5b, 0x72, 0x7f                               }, { vcvttps2dq zmm30,ZWORD rdx+0x1fc0                          }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x5b, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vcvttps2dq zmm30,ZWORD rdx+0x2000                          }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x5b, 0x72, 0x80                               }, { vcvttps2dq zmm30,ZWORD rdx-0x2000                          }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x5b, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vcvttps2dq zmm30,ZWORD rdx-0x2040                          }
+testcase	{ 0x62, 0x61, 0x7e, 0x58, 0x5b, 0x72, 0x7f                               }, { vcvttps2dq zmm30,DWORD rdx+0x1fc{1to16}                    }
+testcase	{ 0x62, 0x61, 0x7e, 0x58, 0x5b, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvttps2dq zmm30,DWORD rdx+0x200{1to16}                    }
+testcase	{ 0x62, 0x61, 0x7e, 0x58, 0x5b, 0x72, 0x80                               }, { vcvttps2dq zmm30,DWORD rdx-0x200{1to16}                    }
+testcase	{ 0x62, 0x61, 0x7e, 0x58, 0x5b, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvttps2dq zmm30,DWORD rdx-0x204{1to16}                    }
+testcase	{ 0x62, 0x91, 0x7f, 0x18, 0x2c, 0xc6                                     }, { vcvttsd2si eax,xmm30,{sae}                                   }
+testcase	{ 0x62, 0x91, 0x7f, 0x18, 0x2c, 0xee                                     }, { vcvttsd2si ebp,xmm30,{sae}                                   }
+testcase	{ 0x62, 0x11, 0x7f, 0x18, 0x2c, 0xee                                     }, { vcvttsd2si r13d,xmm30,{sae}                                  }
+testcase	{ 0x62, 0x91, 0xff, 0x18, 0x2c, 0xc6                                     }, { vcvttsd2si rax,xmm30,{sae}                                   }
+testcase	{ 0x62, 0x11, 0xff, 0x18, 0x2c, 0xc6                                     }, { vcvttsd2si r8,xmm30,{sae}                                    }
+testcase	{ 0x62, 0x91, 0x7e, 0x18, 0x2c, 0xc6                                     }, { vcvttss2si eax,xmm30,{sae}                                   }
+testcase	{ 0x62, 0x91, 0x7e, 0x18, 0x2c, 0xee                                     }, { vcvttss2si ebp,xmm30,{sae}                                   }
+testcase	{ 0x62, 0x11, 0x7e, 0x18, 0x2c, 0xee                                     }, { vcvttss2si r13d,xmm30,{sae}                                  }
+testcase	{ 0x62, 0x91, 0xfe, 0x18, 0x2c, 0xc6                                     }, { vcvttss2si rax,xmm30,{sae}                                   }
+testcase	{ 0x62, 0x11, 0xfe, 0x18, 0x2c, 0xc6                                     }, { vcvttss2si r8,xmm30,{sae}                                    }
+testcase	{ 0x62, 0x01, 0x7e, 0x4f, 0x7a, 0xf5                                     }, { vcvtudq2pd zmm30{k7},ymm29                                   }
+testcase	{ 0x62, 0x01, 0x7e, 0xcf, 0x7a, 0xf5                                     }, { vcvtudq2pd zmm30{k7}{z},ymm29                                }
+testcase	{ 0x62, 0x61, 0x7e, 0x4f, 0x7a, 0x31                                     }, { vcvtudq2pd zmm30{k7},YWORD rcx                             }
+testcase	{ 0x62, 0x21, 0x7e, 0x4f, 0x7a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtudq2pd zmm30{k7},YWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0x61, 0x7e, 0x5f, 0x7a, 0x31                                     }, { vcvtudq2pd zmm30{k7},DWORD rcx{1to8}                       }
+testcase	{ 0x62, 0x61, 0x7e, 0x4f, 0x7a, 0x72, 0x7f                               }, { vcvtudq2pd zmm30{k7},YWORD rdx+0xfe0                       }
+testcase	{ 0x62, 0x61, 0x7e, 0x4f, 0x7a, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vcvtudq2pd zmm30{k7},YWORD rdx+0x1000                      }
+testcase	{ 0x62, 0x61, 0x7e, 0x4f, 0x7a, 0x72, 0x80                               }, { vcvtudq2pd zmm30{k7},YWORD rdx-0x1000                      }
+testcase	{ 0x62, 0x61, 0x7e, 0x4f, 0x7a, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vcvtudq2pd zmm30{k7},YWORD rdx-0x1020                      }
+testcase	{ 0x62, 0x61, 0x7e, 0x5f, 0x7a, 0x72, 0x7f                               }, { vcvtudq2pd zmm30{k7},DWORD rdx+0x1fc{1to8}                 }
+testcase	{ 0x62, 0x61, 0x7e, 0x5f, 0x7a, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvtudq2pd zmm30{k7},DWORD rdx+0x200{1to8}                 }
+testcase	{ 0x62, 0x61, 0x7e, 0x5f, 0x7a, 0x72, 0x80                               }, { vcvtudq2pd zmm30{k7},DWORD rdx-0x200{1to8}                 }
+testcase	{ 0x62, 0x61, 0x7e, 0x5f, 0x7a, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtudq2pd zmm30{k7},DWORD rdx-0x204{1to8}                 }
+testcase	{ 0x62, 0x01, 0x7f, 0x48, 0x7a, 0xf5                                     }, { vcvtudq2ps zmm30,zmm29                                       }
+testcase	{ 0x62, 0x01, 0x7f, 0x4f, 0x7a, 0xf5                                     }, { vcvtudq2ps zmm30{k7},zmm29                                   }
+testcase	{ 0x62, 0x01, 0x7f, 0xcf, 0x7a, 0xf5                                     }, { vcvtudq2ps zmm30{k7}{z},zmm29                                }
+testcase	{ 0x62, 0x01, 0x7f, 0x18, 0x7a, 0xf5                                     }, { vcvtudq2ps zmm30,zmm29,{rn-sae}                              }
+testcase	{ 0x62, 0x01, 0x7f, 0x58, 0x7a, 0xf5                                     }, { vcvtudq2ps zmm30,zmm29,{ru-sae}                              }
+testcase	{ 0x62, 0x01, 0x7f, 0x38, 0x7a, 0xf5                                     }, { vcvtudq2ps zmm30,zmm29,{rd-sae}                              }
+testcase	{ 0x62, 0x01, 0x7f, 0x78, 0x7a, 0xf5                                     }, { vcvtudq2ps zmm30,zmm29,{rz-sae}                              }
+testcase	{ 0x62, 0x61, 0x7f, 0x48, 0x7a, 0x31                                     }, { vcvtudq2ps zmm30,ZWORD rcx                                 }
+testcase	{ 0x62, 0x21, 0x7f, 0x48, 0x7a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtudq2ps zmm30,ZWORD rax+r14*8+0x123                     }
+testcase	{ 0x62, 0x61, 0x7f, 0x58, 0x7a, 0x31                                     }, { vcvtudq2ps zmm30,DWORD rcx{1to16}                          }
+testcase	{ 0x62, 0x61, 0x7f, 0x48, 0x7a, 0x72, 0x7f                               }, { vcvtudq2ps zmm30,ZWORD rdx+0x1fc0                          }
+testcase	{ 0x62, 0x61, 0x7f, 0x48, 0x7a, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vcvtudq2ps zmm30,ZWORD rdx+0x2000                          }
+testcase	{ 0x62, 0x61, 0x7f, 0x48, 0x7a, 0x72, 0x80                               }, { vcvtudq2ps zmm30,ZWORD rdx-0x2000                          }
+testcase	{ 0x62, 0x61, 0x7f, 0x48, 0x7a, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vcvtudq2ps zmm30,ZWORD rdx-0x2040                          }
+testcase	{ 0x62, 0x61, 0x7f, 0x58, 0x7a, 0x72, 0x7f                               }, { vcvtudq2ps zmm30,DWORD rdx+0x1fc{1to16}                    }
+testcase	{ 0x62, 0x61, 0x7f, 0x58, 0x7a, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvtudq2ps zmm30,DWORD rdx+0x200{1to16}                    }
+testcase	{ 0x62, 0x61, 0x7f, 0x58, 0x7a, 0x72, 0x80                               }, { vcvtudq2ps zmm30,DWORD rdx-0x200{1to16}                    }
+testcase	{ 0x62, 0x61, 0x7f, 0x58, 0x7a, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtudq2ps zmm30,DWORD rdx-0x204{1to16}                    }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0x5e, 0xf4                                     }, { vdivpd zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0x5e, 0xf4                                     }, { vdivpd zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0x5e, 0xf4                                     }, { vdivpd zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x95, 0x10, 0x5e, 0xf4                                     }, { vdivpd zmm30,zmm29,zmm28,{rn-sae}                            }
+testcase	{ 0x62, 0x01, 0x95, 0x50, 0x5e, 0xf4                                     }, { vdivpd zmm30,zmm29,zmm28,{ru-sae}                            }
+testcase	{ 0x62, 0x01, 0x95, 0x30, 0x5e, 0xf4                                     }, { vdivpd zmm30,zmm29,zmm28,{rd-sae}                            }
+testcase	{ 0x62, 0x01, 0x95, 0x70, 0x5e, 0xf4                                     }, { vdivpd zmm30,zmm29,zmm28,{rz-sae}                            }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5e, 0x31                                     }, { vdivpd zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0x5e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vdivpd zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5e, 0x31                                     }, { vdivpd zmm30,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5e, 0x72, 0x7f                               }, { vdivpd zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5e, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vdivpd zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5e, 0x72, 0x80                               }, { vdivpd zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5e, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vdivpd zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5e, 0x72, 0x7f                               }, { vdivpd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5e, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vdivpd zmm30,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5e, 0x72, 0x80                               }, { vdivpd zmm30,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5e, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vdivpd zmm30,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x01, 0x14, 0x40, 0x5e, 0xf4                                     }, { vdivps zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x14, 0x47, 0x5e, 0xf4                                     }, { vdivps zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x14, 0xc7, 0x5e, 0xf4                                     }, { vdivps zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x14, 0x10, 0x5e, 0xf4                                     }, { vdivps zmm30,zmm29,zmm28,{rn-sae}                            }
+testcase	{ 0x62, 0x01, 0x14, 0x50, 0x5e, 0xf4                                     }, { vdivps zmm30,zmm29,zmm28,{ru-sae}                            }
+testcase	{ 0x62, 0x01, 0x14, 0x30, 0x5e, 0xf4                                     }, { vdivps zmm30,zmm29,zmm28,{rd-sae}                            }
+testcase	{ 0x62, 0x01, 0x14, 0x70, 0x5e, 0xf4                                     }, { vdivps zmm30,zmm29,zmm28,{rz-sae}                            }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5e, 0x31                                     }, { vdivps zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x14, 0x40, 0x5e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vdivps zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5e, 0x31                                     }, { vdivps zmm30,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5e, 0x72, 0x7f                               }, { vdivps zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5e, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vdivps zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5e, 0x72, 0x80                               }, { vdivps zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5e, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vdivps zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5e, 0x72, 0x7f                               }, { vdivps zmm30,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5e, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vdivps zmm30,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5e, 0x72, 0x80                               }, { vdivps zmm30,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5e, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vdivps zmm30,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x01, 0x97, 0x07, 0x5e, 0xf4                                     }, { vdivsd xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x97, 0x87, 0x5e, 0xf4                                     }, { vdivsd xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x97, 0x17, 0x5e, 0xf4                                     }, { vdivsd xmm30{k7},xmm29,xmm28,{rn-sae}                        }
+testcase	{ 0x62, 0x01, 0x97, 0x57, 0x5e, 0xf4                                     }, { vdivsd xmm30{k7},xmm29,xmm28,{ru-sae}                        }
+testcase	{ 0x62, 0x01, 0x97, 0x37, 0x5e, 0xf4                                     }, { vdivsd xmm30{k7},xmm29,xmm28,{rd-sae}                        }
+testcase	{ 0x62, 0x01, 0x97, 0x77, 0x5e, 0xf4                                     }, { vdivsd xmm30{k7},xmm29,xmm28,{rz-sae}                        }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5e, 0x31                                     }, { vdivsd xmm30{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x97, 0x07, 0x5e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vdivsd xmm30{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5e, 0x72, 0x7f                               }, { vdivsd xmm30{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5e, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vdivsd xmm30{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5e, 0x72, 0x80                               }, { vdivsd xmm30{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5e, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vdivsd xmm30{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x01, 0x16, 0x07, 0x5e, 0xf4                                     }, { vdivss xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x16, 0x87, 0x5e, 0xf4                                     }, { vdivss xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x16, 0x17, 0x5e, 0xf4                                     }, { vdivss xmm30{k7},xmm29,xmm28,{rn-sae}                        }
+testcase	{ 0x62, 0x01, 0x16, 0x57, 0x5e, 0xf4                                     }, { vdivss xmm30{k7},xmm29,xmm28,{ru-sae}                        }
+testcase	{ 0x62, 0x01, 0x16, 0x37, 0x5e, 0xf4                                     }, { vdivss xmm30{k7},xmm29,xmm28,{rd-sae}                        }
+testcase	{ 0x62, 0x01, 0x16, 0x77, 0x5e, 0xf4                                     }, { vdivss xmm30{k7},xmm29,xmm28,{rz-sae}                        }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5e, 0x31                                     }, { vdivss xmm30{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x16, 0x07, 0x5e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vdivss xmm30{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5e, 0x72, 0x7f                               }, { vdivss xmm30{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5e, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vdivss xmm30{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5e, 0x72, 0x80                               }, { vdivss xmm30{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5e, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vdivss xmm30{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x88, 0x31                                     }, { vexpandpd zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x62, 0xfd, 0x4f, 0x88, 0x31                                     }, { vexpandpd zmm30{k7},ZWORD rcx                              }
+testcase	{ 0x62, 0x62, 0xfd, 0xcf, 0x88, 0x31                                     }, { vexpandpd zmm30{k7}{z},ZWORD rcx                           }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x88, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vexpandpd zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x88, 0x72, 0x7f                               }, { vexpandpd zmm30,ZWORD rdx+0x3f8                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x88, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vexpandpd zmm30,ZWORD rdx+0x400                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x88, 0x72, 0x80                               }, { vexpandpd zmm30,ZWORD rdx-0x400                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x88, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vexpandpd zmm30,ZWORD rdx-0x408                            }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0x88, 0xf5                                     }, { vexpandpd zmm30,zmm29                                        }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0x88, 0xf5                                     }, { vexpandpd zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0x88, 0xf5                                     }, { vexpandpd zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x88, 0x31                                     }, { vexpandps zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x88, 0x31                                     }, { vexpandps zmm30{k7},ZWORD rcx                              }
+testcase	{ 0x62, 0x62, 0x7d, 0xcf, 0x88, 0x31                                     }, { vexpandps zmm30{k7}{z},ZWORD rcx                           }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x88, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vexpandps zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x88, 0x72, 0x7f                               }, { vexpandps zmm30,ZWORD rdx+0x1fc                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x88, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vexpandps zmm30,ZWORD rdx+0x200                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x88, 0x72, 0x80                               }, { vexpandps zmm30,ZWORD rdx-0x200                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x88, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vexpandps zmm30,ZWORD rdx-0x204                            }
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0x88, 0xf5                                     }, { vexpandps zmm30,zmm29                                        }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x88, 0xf5                                     }, { vexpandps zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x88, 0xf5                                     }, { vexpandps zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x03, 0x7d, 0x4f, 0x19, 0xee, 0xab                               }, { vextractf32x4 xmm30{k7},zmm29,0xab                           }
+testcase	{ 0x62, 0x03, 0x7d, 0xcf, 0x19, 0xee, 0xab                               }, { vextractf32x4 xmm30{k7}{z},zmm29,0xab                        }
+testcase	{ 0x62, 0x03, 0x7d, 0x4f, 0x19, 0xee, 0x7b                               }, { vextractf32x4 xmm30{k7},zmm29,0x7b                           }
+testcase	{ 0x62, 0x03, 0xfd, 0x4f, 0x1b, 0xee, 0xab                               }, { vextractf64x4 ymm30{k7},zmm29,0xab                           }
+testcase	{ 0x62, 0x03, 0xfd, 0xcf, 0x1b, 0xee, 0xab                               }, { vextractf64x4 ymm30{k7}{z},zmm29,0xab                        }
+testcase	{ 0x62, 0x03, 0xfd, 0x4f, 0x1b, 0xee, 0x7b                               }, { vextractf64x4 ymm30{k7},zmm29,0x7b                           }
+testcase	{ 0x62, 0x03, 0x7d, 0x4f, 0x39, 0xee, 0xab                               }, { vextracti32x4 xmm30{k7},zmm29,0xab                           }
+testcase	{ 0x62, 0x03, 0x7d, 0xcf, 0x39, 0xee, 0xab                               }, { vextracti32x4 xmm30{k7}{z},zmm29,0xab                        }
+testcase	{ 0x62, 0x03, 0x7d, 0x4f, 0x39, 0xee, 0x7b                               }, { vextracti32x4 xmm30{k7},zmm29,0x7b                           }
+testcase	{ 0x62, 0x03, 0xfd, 0x4f, 0x3b, 0xee, 0xab                               }, { vextracti64x4 ymm30{k7},zmm29,0xab                           }
+testcase	{ 0x62, 0x03, 0xfd, 0xcf, 0x3b, 0xee, 0xab                               }, { vextracti64x4 ymm30{k7}{z},zmm29,0xab                        }
+testcase	{ 0x62, 0x03, 0xfd, 0x4f, 0x3b, 0xee, 0x7b                               }, { vextracti64x4 ymm30{k7},zmm29,0x7b                           }
+testcase	{ 0x62, 0x63, 0xfd, 0x08, 0x17, 0xe8, 0xab                               }, { vextractps rax,xmm29,0xab                                    }
+testcase	{ 0x62, 0x63, 0xfd, 0x08, 0x17, 0xe8, 0x7b                               }, { vextractps rax,xmm29,0x7b                                    }
+testcase	{ 0x62, 0x43, 0xfd, 0x08, 0x17, 0xe8, 0x7b                               }, { vextractps r8,xmm29,0x7b                                     }
+testcase	{ 0x62, 0x63, 0x7d, 0x08, 0x17, 0x29, 0x7b                               }, { vextractps DWORD rcx,xmm29,0x7b                            }
+testcase	{ 0x62, 0x23, 0x7d, 0x08, 0x17, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vextractps DWORD rax+r14*8+0x123,xmm29,0x7b                }
+testcase	{ 0x62, 0x63, 0x7d, 0x08, 0x17, 0x6a, 0x7f, 0x7b                         }, { vextractps DWORD rdx+0x1fc,xmm29,0x7b                      }
+testcase	{ 0x62, 0x63, 0x7d, 0x08, 0x17, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vextractps DWORD rdx+0x200,xmm29,0x7b                      }
+testcase	{ 0x62, 0x63, 0x7d, 0x08, 0x17, 0x6a, 0x80, 0x7b                         }, { vextractps DWORD rdx-0x200,xmm29,0x7b                      }
+testcase	{ 0x62, 0x63, 0x7d, 0x08, 0x17, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vextractps DWORD rdx-0x204,xmm29,0x7b                      }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x98, 0xf4                                     }, { vfmadd132pd zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x98, 0xf4                                     }, { vfmadd132pd zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x98, 0xf4                                     }, { vfmadd132pd zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0x98, 0xf4                                     }, { vfmadd132pd zmm30,zmm29,zmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0x98, 0xf4                                     }, { vfmadd132pd zmm30,zmm29,zmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0x98, 0xf4                                     }, { vfmadd132pd zmm30,zmm29,zmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0x98, 0xf4                                     }, { vfmadd132pd zmm30,zmm29,zmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x98, 0x31                                     }, { vfmadd132pd zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x98, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmadd132pd zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x98, 0x31                                     }, { vfmadd132pd zmm30,zmm29,QWORD rcx{1to8}                    }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x98, 0x72, 0x7f                               }, { vfmadd132pd zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x98, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmadd132pd zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x98, 0x72, 0x80                               }, { vfmadd132pd zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x98, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmadd132pd zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x98, 0x72, 0x7f                               }, { vfmadd132pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x98, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmadd132pd zmm30,zmm29,QWORD rdx+0x400{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x98, 0x72, 0x80                               }, { vfmadd132pd zmm30,zmm29,QWORD rdx-0x400{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x98, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmadd132pd zmm30,zmm29,QWORD rdx-0x408{1to8}              }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x98, 0xf4                                     }, { vfmadd132ps zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x98, 0xf4                                     }, { vfmadd132ps zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x98, 0xf4                                     }, { vfmadd132ps zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0x98, 0xf4                                     }, { vfmadd132ps zmm30,zmm29,zmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0x98, 0xf4                                     }, { vfmadd132ps zmm30,zmm29,zmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0x98, 0xf4                                     }, { vfmadd132ps zmm30,zmm29,zmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0x98, 0xf4                                     }, { vfmadd132ps zmm30,zmm29,zmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x98, 0x31                                     }, { vfmadd132ps zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x98, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmadd132ps zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x98, 0x31                                     }, { vfmadd132ps zmm30,zmm29,DWORD rcx{1to16}                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x98, 0x72, 0x7f                               }, { vfmadd132ps zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x98, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmadd132ps zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x98, 0x72, 0x80                               }, { vfmadd132ps zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x98, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmadd132ps zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x98, 0x72, 0x7f                               }, { vfmadd132ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x98, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmadd132ps zmm30,zmm29,DWORD rdx+0x200{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x98, 0x72, 0x80                               }, { vfmadd132ps zmm30,zmm29,DWORD rdx-0x200{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x98, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmadd132ps zmm30,zmm29,DWORD rdx-0x204{1to16}             }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0x99, 0xf4                                     }, { vfmadd132sd xmm30{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0x99, 0xf4                                     }, { vfmadd132sd xmm30{k7}{z},xmm29,xmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0x99, 0xf4                                     }, { vfmadd132sd xmm30{k7},xmm29,xmm28,{rn-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0x99, 0xf4                                     }, { vfmadd132sd xmm30{k7},xmm29,xmm28,{ru-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0x99, 0xf4                                     }, { vfmadd132sd xmm30{k7},xmm29,xmm28,{rd-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0x99, 0xf4                                     }, { vfmadd132sd xmm30{k7},xmm29,xmm28,{rz-sae}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x99, 0x31                                     }, { vfmadd132sd xmm30{k7},xmm29,QWORD rcx                      }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0x99, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmadd132sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x99, 0x72, 0x7f                               }, { vfmadd132sd xmm30{k7},xmm29,QWORD rdx+0x3f8                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x99, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmadd132sd xmm30{k7},xmm29,QWORD rdx+0x400                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x99, 0x72, 0x80                               }, { vfmadd132sd xmm30{k7},xmm29,QWORD rdx-0x400                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x99, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmadd132sd xmm30{k7},xmm29,QWORD rdx-0x408                }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0x99, 0xf4                                     }, { vfmadd132ss xmm30{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0x99, 0xf4                                     }, { vfmadd132ss xmm30{k7}{z},xmm29,xmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0x99, 0xf4                                     }, { vfmadd132ss xmm30{k7},xmm29,xmm28,{rn-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0x99, 0xf4                                     }, { vfmadd132ss xmm30{k7},xmm29,xmm28,{ru-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0x99, 0xf4                                     }, { vfmadd132ss xmm30{k7},xmm29,xmm28,{rd-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0x99, 0xf4                                     }, { vfmadd132ss xmm30{k7},xmm29,xmm28,{rz-sae}                   }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x99, 0x31                                     }, { vfmadd132ss xmm30{k7},xmm29,DWORD rcx                      }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0x99, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmadd132ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x99, 0x72, 0x7f                               }, { vfmadd132ss xmm30{k7},xmm29,DWORD rdx+0x1fc                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x99, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmadd132ss xmm30{k7},xmm29,DWORD rdx+0x200                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x99, 0x72, 0x80                               }, { vfmadd132ss xmm30{k7},xmm29,DWORD rdx-0x200                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x99, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmadd132ss xmm30{k7},xmm29,DWORD rdx-0x204                }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0xa8, 0xf4                                     }, { vfmadd213pd zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0xa8, 0xf4                                     }, { vfmadd213pd zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0xa8, 0xf4                                     }, { vfmadd213pd zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0xa8, 0xf4                                     }, { vfmadd213pd zmm30,zmm29,zmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0xa8, 0xf4                                     }, { vfmadd213pd zmm30,zmm29,zmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0xa8, 0xf4                                     }, { vfmadd213pd zmm30,zmm29,zmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0xa8, 0xf4                                     }, { vfmadd213pd zmm30,zmm29,zmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa8, 0x31                                     }, { vfmadd213pd zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0xa8, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmadd213pd zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa8, 0x31                                     }, { vfmadd213pd zmm30,zmm29,QWORD rcx{1to8}                    }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa8, 0x72, 0x7f                               }, { vfmadd213pd zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa8, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmadd213pd zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa8, 0x72, 0x80                               }, { vfmadd213pd zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa8, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmadd213pd zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa8, 0x72, 0x7f                               }, { vfmadd213pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa8, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmadd213pd zmm30,zmm29,QWORD rdx+0x400{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa8, 0x72, 0x80                               }, { vfmadd213pd zmm30,zmm29,QWORD rdx-0x400{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa8, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmadd213pd zmm30,zmm29,QWORD rdx-0x408{1to8}              }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0xa8, 0xf4                                     }, { vfmadd213ps zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0xa8, 0xf4                                     }, { vfmadd213ps zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0xa8, 0xf4                                     }, { vfmadd213ps zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0xa8, 0xf4                                     }, { vfmadd213ps zmm30,zmm29,zmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0xa8, 0xf4                                     }, { vfmadd213ps zmm30,zmm29,zmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0xa8, 0xf4                                     }, { vfmadd213ps zmm30,zmm29,zmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0xa8, 0xf4                                     }, { vfmadd213ps zmm30,zmm29,zmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa8, 0x31                                     }, { vfmadd213ps zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0xa8, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmadd213ps zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa8, 0x31                                     }, { vfmadd213ps zmm30,zmm29,DWORD rcx{1to16}                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa8, 0x72, 0x7f                               }, { vfmadd213ps zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa8, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmadd213ps zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa8, 0x72, 0x80                               }, { vfmadd213ps zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa8, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmadd213ps zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa8, 0x72, 0x7f                               }, { vfmadd213ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa8, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmadd213ps zmm30,zmm29,DWORD rdx+0x200{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa8, 0x72, 0x80                               }, { vfmadd213ps zmm30,zmm29,DWORD rdx-0x200{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa8, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmadd213ps zmm30,zmm29,DWORD rdx-0x204{1to16}             }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0xa9, 0xf4                                     }, { vfmadd213sd xmm30{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0xa9, 0xf4                                     }, { vfmadd213sd xmm30{k7}{z},xmm29,xmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0xa9, 0xf4                                     }, { vfmadd213sd xmm30{k7},xmm29,xmm28,{rn-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0xa9, 0xf4                                     }, { vfmadd213sd xmm30{k7},xmm29,xmm28,{ru-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0xa9, 0xf4                                     }, { vfmadd213sd xmm30{k7},xmm29,xmm28,{rd-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0xa9, 0xf4                                     }, { vfmadd213sd xmm30{k7},xmm29,xmm28,{rz-sae}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xa9, 0x31                                     }, { vfmadd213sd xmm30{k7},xmm29,QWORD rcx                      }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0xa9, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmadd213sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xa9, 0x72, 0x7f                               }, { vfmadd213sd xmm30{k7},xmm29,QWORD rdx+0x3f8                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xa9, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmadd213sd xmm30{k7},xmm29,QWORD rdx+0x400                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xa9, 0x72, 0x80                               }, { vfmadd213sd xmm30{k7},xmm29,QWORD rdx-0x400                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xa9, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmadd213sd xmm30{k7},xmm29,QWORD rdx-0x408                }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0xa9, 0xf4                                     }, { vfmadd213ss xmm30{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0xa9, 0xf4                                     }, { vfmadd213ss xmm30{k7}{z},xmm29,xmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0xa9, 0xf4                                     }, { vfmadd213ss xmm30{k7},xmm29,xmm28,{rn-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0xa9, 0xf4                                     }, { vfmadd213ss xmm30{k7},xmm29,xmm28,{ru-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0xa9, 0xf4                                     }, { vfmadd213ss xmm30{k7},xmm29,xmm28,{rd-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0xa9, 0xf4                                     }, { vfmadd213ss xmm30{k7},xmm29,xmm28,{rz-sae}                   }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xa9, 0x31                                     }, { vfmadd213ss xmm30{k7},xmm29,DWORD rcx                      }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0xa9, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmadd213ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xa9, 0x72, 0x7f                               }, { vfmadd213ss xmm30{k7},xmm29,DWORD rdx+0x1fc                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xa9, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmadd213ss xmm30{k7},xmm29,DWORD rdx+0x200                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xa9, 0x72, 0x80                               }, { vfmadd213ss xmm30{k7},xmm29,DWORD rdx-0x200                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xa9, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmadd213ss xmm30{k7},xmm29,DWORD rdx-0x204                }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0xb8, 0xf4                                     }, { vfmadd231pd zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0xb8, 0xf4                                     }, { vfmadd231pd zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0xb8, 0xf4                                     }, { vfmadd231pd zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0xb8, 0xf4                                     }, { vfmadd231pd zmm30,zmm29,zmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0xb8, 0xf4                                     }, { vfmadd231pd zmm30,zmm29,zmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0xb8, 0xf4                                     }, { vfmadd231pd zmm30,zmm29,zmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0xb8, 0xf4                                     }, { vfmadd231pd zmm30,zmm29,zmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb8, 0x31                                     }, { vfmadd231pd zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0xb8, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmadd231pd zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb8, 0x31                                     }, { vfmadd231pd zmm30,zmm29,QWORD rcx{1to8}                    }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb8, 0x72, 0x7f                               }, { vfmadd231pd zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb8, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmadd231pd zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb8, 0x72, 0x80                               }, { vfmadd231pd zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb8, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmadd231pd zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb8, 0x72, 0x7f                               }, { vfmadd231pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb8, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmadd231pd zmm30,zmm29,QWORD rdx+0x400{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb8, 0x72, 0x80                               }, { vfmadd231pd zmm30,zmm29,QWORD rdx-0x400{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb8, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmadd231pd zmm30,zmm29,QWORD rdx-0x408{1to8}              }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0xb8, 0xf4                                     }, { vfmadd231ps zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0xb8, 0xf4                                     }, { vfmadd231ps zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0xb8, 0xf4                                     }, { vfmadd231ps zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0xb8, 0xf4                                     }, { vfmadd231ps zmm30,zmm29,zmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0xb8, 0xf4                                     }, { vfmadd231ps zmm30,zmm29,zmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0xb8, 0xf4                                     }, { vfmadd231ps zmm30,zmm29,zmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0xb8, 0xf4                                     }, { vfmadd231ps zmm30,zmm29,zmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb8, 0x31                                     }, { vfmadd231ps zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0xb8, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmadd231ps zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb8, 0x31                                     }, { vfmadd231ps zmm30,zmm29,DWORD rcx{1to16}                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb8, 0x72, 0x7f                               }, { vfmadd231ps zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb8, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmadd231ps zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb8, 0x72, 0x80                               }, { vfmadd231ps zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb8, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmadd231ps zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb8, 0x72, 0x7f                               }, { vfmadd231ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb8, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmadd231ps zmm30,zmm29,DWORD rdx+0x200{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb8, 0x72, 0x80                               }, { vfmadd231ps zmm30,zmm29,DWORD rdx-0x200{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb8, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmadd231ps zmm30,zmm29,DWORD rdx-0x204{1to16}             }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0xb9, 0xf4                                     }, { vfmadd231sd xmm30{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0xb9, 0xf4                                     }, { vfmadd231sd xmm30{k7}{z},xmm29,xmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0xb9, 0xf4                                     }, { vfmadd231sd xmm30{k7},xmm29,xmm28,{rn-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0xb9, 0xf4                                     }, { vfmadd231sd xmm30{k7},xmm29,xmm28,{ru-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0xb9, 0xf4                                     }, { vfmadd231sd xmm30{k7},xmm29,xmm28,{rd-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0xb9, 0xf4                                     }, { vfmadd231sd xmm30{k7},xmm29,xmm28,{rz-sae}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xb9, 0x31                                     }, { vfmadd231sd xmm30{k7},xmm29,QWORD rcx                      }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0xb9, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmadd231sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xb9, 0x72, 0x7f                               }, { vfmadd231sd xmm30{k7},xmm29,QWORD rdx+0x3f8                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xb9, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmadd231sd xmm30{k7},xmm29,QWORD rdx+0x400                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xb9, 0x72, 0x80                               }, { vfmadd231sd xmm30{k7},xmm29,QWORD rdx-0x400                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xb9, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmadd231sd xmm30{k7},xmm29,QWORD rdx-0x408                }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0xb9, 0xf4                                     }, { vfmadd231ss xmm30{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0xb9, 0xf4                                     }, { vfmadd231ss xmm30{k7}{z},xmm29,xmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0xb9, 0xf4                                     }, { vfmadd231ss xmm30{k7},xmm29,xmm28,{rn-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0xb9, 0xf4                                     }, { vfmadd231ss xmm30{k7},xmm29,xmm28,{ru-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0xb9, 0xf4                                     }, { vfmadd231ss xmm30{k7},xmm29,xmm28,{rd-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0xb9, 0xf4                                     }, { vfmadd231ss xmm30{k7},xmm29,xmm28,{rz-sae}                   }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xb9, 0x31                                     }, { vfmadd231ss xmm30{k7},xmm29,DWORD rcx                      }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0xb9, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmadd231ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xb9, 0x72, 0x7f                               }, { vfmadd231ss xmm30{k7},xmm29,DWORD rdx+0x1fc                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xb9, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmadd231ss xmm30{k7},xmm29,DWORD rdx+0x200                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xb9, 0x72, 0x80                               }, { vfmadd231ss xmm30{k7},xmm29,DWORD rdx-0x200                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xb9, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmadd231ss xmm30{k7},xmm29,DWORD rdx-0x204                }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x96, 0xf4                                     }, { vfmaddsub132pd zmm30,zmm29,zmm28                             }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x96, 0xf4                                     }, { vfmaddsub132pd zmm30{k7},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x96, 0xf4                                     }, { vfmaddsub132pd zmm30{k7}{z},zmm29,zmm28                      }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0x96, 0xf4                                     }, { vfmaddsub132pd zmm30,zmm29,zmm28,{rn-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0x96, 0xf4                                     }, { vfmaddsub132pd zmm30,zmm29,zmm28,{ru-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0x96, 0xf4                                     }, { vfmaddsub132pd zmm30,zmm29,zmm28,{rd-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0x96, 0xf4                                     }, { vfmaddsub132pd zmm30,zmm29,zmm28,{rz-sae}                    }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x96, 0x31                                     }, { vfmaddsub132pd zmm30,zmm29,ZWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x96, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmaddsub132pd zmm30,zmm29,ZWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x96, 0x31                                     }, { vfmaddsub132pd zmm30,zmm29,QWORD rcx{1to8}                 }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x96, 0x72, 0x7f                               }, { vfmaddsub132pd zmm30,zmm29,ZWORD rdx+0x1fc0                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x96, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmaddsub132pd zmm30,zmm29,ZWORD rdx+0x2000                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x96, 0x72, 0x80                               }, { vfmaddsub132pd zmm30,zmm29,ZWORD rdx-0x2000                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x96, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmaddsub132pd zmm30,zmm29,ZWORD rdx-0x2040                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x96, 0x72, 0x7f                               }, { vfmaddsub132pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x96, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmaddsub132pd zmm30,zmm29,QWORD rdx+0x400{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x96, 0x72, 0x80                               }, { vfmaddsub132pd zmm30,zmm29,QWORD rdx-0x400{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x96, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmaddsub132pd zmm30,zmm29,QWORD rdx-0x408{1to8}           }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x96, 0xf4                                     }, { vfmaddsub132ps zmm30,zmm29,zmm28                             }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x96, 0xf4                                     }, { vfmaddsub132ps zmm30{k7},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x96, 0xf4                                     }, { vfmaddsub132ps zmm30{k7}{z},zmm29,zmm28                      }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0x96, 0xf4                                     }, { vfmaddsub132ps zmm30,zmm29,zmm28,{rn-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0x96, 0xf4                                     }, { vfmaddsub132ps zmm30,zmm29,zmm28,{ru-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0x96, 0xf4                                     }, { vfmaddsub132ps zmm30,zmm29,zmm28,{rd-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0x96, 0xf4                                     }, { vfmaddsub132ps zmm30,zmm29,zmm28,{rz-sae}                    }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x96, 0x31                                     }, { vfmaddsub132ps zmm30,zmm29,ZWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x96, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmaddsub132ps zmm30,zmm29,ZWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x96, 0x31                                     }, { vfmaddsub132ps zmm30,zmm29,DWORD rcx{1to16}                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x96, 0x72, 0x7f                               }, { vfmaddsub132ps zmm30,zmm29,ZWORD rdx+0x1fc0                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x96, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmaddsub132ps zmm30,zmm29,ZWORD rdx+0x2000                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x96, 0x72, 0x80                               }, { vfmaddsub132ps zmm30,zmm29,ZWORD rdx-0x2000                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x96, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmaddsub132ps zmm30,zmm29,ZWORD rdx-0x2040                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x96, 0x72, 0x7f                               }, { vfmaddsub132ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x96, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmaddsub132ps zmm30,zmm29,DWORD rdx+0x200{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x96, 0x72, 0x80                               }, { vfmaddsub132ps zmm30,zmm29,DWORD rdx-0x200{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x96, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmaddsub132ps zmm30,zmm29,DWORD rdx-0x204{1to16}          }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0xa6, 0xf4                                     }, { vfmaddsub213pd zmm30,zmm29,zmm28                             }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0xa6, 0xf4                                     }, { vfmaddsub213pd zmm30{k7},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0xa6, 0xf4                                     }, { vfmaddsub213pd zmm30{k7}{z},zmm29,zmm28                      }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0xa6, 0xf4                                     }, { vfmaddsub213pd zmm30,zmm29,zmm28,{rn-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0xa6, 0xf4                                     }, { vfmaddsub213pd zmm30,zmm29,zmm28,{ru-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0xa6, 0xf4                                     }, { vfmaddsub213pd zmm30,zmm29,zmm28,{rd-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0xa6, 0xf4                                     }, { vfmaddsub213pd zmm30,zmm29,zmm28,{rz-sae}                    }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa6, 0x31                                     }, { vfmaddsub213pd zmm30,zmm29,ZWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0xa6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmaddsub213pd zmm30,zmm29,ZWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa6, 0x31                                     }, { vfmaddsub213pd zmm30,zmm29,QWORD rcx{1to8}                 }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa6, 0x72, 0x7f                               }, { vfmaddsub213pd zmm30,zmm29,ZWORD rdx+0x1fc0                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa6, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmaddsub213pd zmm30,zmm29,ZWORD rdx+0x2000                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa6, 0x72, 0x80                               }, { vfmaddsub213pd zmm30,zmm29,ZWORD rdx-0x2000                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa6, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmaddsub213pd zmm30,zmm29,ZWORD rdx-0x2040                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa6, 0x72, 0x7f                               }, { vfmaddsub213pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa6, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmaddsub213pd zmm30,zmm29,QWORD rdx+0x400{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa6, 0x72, 0x80                               }, { vfmaddsub213pd zmm30,zmm29,QWORD rdx-0x400{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa6, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmaddsub213pd zmm30,zmm29,QWORD rdx-0x408{1to8}           }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0xa6, 0xf4                                     }, { vfmaddsub213ps zmm30,zmm29,zmm28                             }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0xa6, 0xf4                                     }, { vfmaddsub213ps zmm30{k7},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0xa6, 0xf4                                     }, { vfmaddsub213ps zmm30{k7}{z},zmm29,zmm28                      }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0xa6, 0xf4                                     }, { vfmaddsub213ps zmm30,zmm29,zmm28,{rn-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0xa6, 0xf4                                     }, { vfmaddsub213ps zmm30,zmm29,zmm28,{ru-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0xa6, 0xf4                                     }, { vfmaddsub213ps zmm30,zmm29,zmm28,{rd-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0xa6, 0xf4                                     }, { vfmaddsub213ps zmm30,zmm29,zmm28,{rz-sae}                    }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa6, 0x31                                     }, { vfmaddsub213ps zmm30,zmm29,ZWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0xa6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmaddsub213ps zmm30,zmm29,ZWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa6, 0x31                                     }, { vfmaddsub213ps zmm30,zmm29,DWORD rcx{1to16}                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa6, 0x72, 0x7f                               }, { vfmaddsub213ps zmm30,zmm29,ZWORD rdx+0x1fc0                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa6, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmaddsub213ps zmm30,zmm29,ZWORD rdx+0x2000                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa6, 0x72, 0x80                               }, { vfmaddsub213ps zmm30,zmm29,ZWORD rdx-0x2000                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa6, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmaddsub213ps zmm30,zmm29,ZWORD rdx-0x2040                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa6, 0x72, 0x7f                               }, { vfmaddsub213ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa6, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmaddsub213ps zmm30,zmm29,DWORD rdx+0x200{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa6, 0x72, 0x80                               }, { vfmaddsub213ps zmm30,zmm29,DWORD rdx-0x200{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa6, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmaddsub213ps zmm30,zmm29,DWORD rdx-0x204{1to16}          }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0xb6, 0xf4                                     }, { vfmaddsub231pd zmm30,zmm29,zmm28                             }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0xb6, 0xf4                                     }, { vfmaddsub231pd zmm30{k7},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0xb6, 0xf4                                     }, { vfmaddsub231pd zmm30{k7}{z},zmm29,zmm28                      }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0xb6, 0xf4                                     }, { vfmaddsub231pd zmm30,zmm29,zmm28,{rn-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0xb6, 0xf4                                     }, { vfmaddsub231pd zmm30,zmm29,zmm28,{ru-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0xb6, 0xf4                                     }, { vfmaddsub231pd zmm30,zmm29,zmm28,{rd-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0xb6, 0xf4                                     }, { vfmaddsub231pd zmm30,zmm29,zmm28,{rz-sae}                    }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb6, 0x31                                     }, { vfmaddsub231pd zmm30,zmm29,ZWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0xb6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmaddsub231pd zmm30,zmm29,ZWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb6, 0x31                                     }, { vfmaddsub231pd zmm30,zmm29,QWORD rcx{1to8}                 }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb6, 0x72, 0x7f                               }, { vfmaddsub231pd zmm30,zmm29,ZWORD rdx+0x1fc0                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb6, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmaddsub231pd zmm30,zmm29,ZWORD rdx+0x2000                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb6, 0x72, 0x80                               }, { vfmaddsub231pd zmm30,zmm29,ZWORD rdx-0x2000                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb6, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmaddsub231pd zmm30,zmm29,ZWORD rdx-0x2040                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb6, 0x72, 0x7f                               }, { vfmaddsub231pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb6, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmaddsub231pd zmm30,zmm29,QWORD rdx+0x400{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb6, 0x72, 0x80                               }, { vfmaddsub231pd zmm30,zmm29,QWORD rdx-0x400{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb6, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmaddsub231pd zmm30,zmm29,QWORD rdx-0x408{1to8}           }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0xb6, 0xf4                                     }, { vfmaddsub231ps zmm30,zmm29,zmm28                             }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0xb6, 0xf4                                     }, { vfmaddsub231ps zmm30{k7},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0xb6, 0xf4                                     }, { vfmaddsub231ps zmm30{k7}{z},zmm29,zmm28                      }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0xb6, 0xf4                                     }, { vfmaddsub231ps zmm30,zmm29,zmm28,{rn-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0xb6, 0xf4                                     }, { vfmaddsub231ps zmm30,zmm29,zmm28,{ru-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0xb6, 0xf4                                     }, { vfmaddsub231ps zmm30,zmm29,zmm28,{rd-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0xb6, 0xf4                                     }, { vfmaddsub231ps zmm30,zmm29,zmm28,{rz-sae}                    }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb6, 0x31                                     }, { vfmaddsub231ps zmm30,zmm29,ZWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0xb6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmaddsub231ps zmm30,zmm29,ZWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb6, 0x31                                     }, { vfmaddsub231ps zmm30,zmm29,DWORD rcx{1to16}                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb6, 0x72, 0x7f                               }, { vfmaddsub231ps zmm30,zmm29,ZWORD rdx+0x1fc0                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb6, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmaddsub231ps zmm30,zmm29,ZWORD rdx+0x2000                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb6, 0x72, 0x80                               }, { vfmaddsub231ps zmm30,zmm29,ZWORD rdx-0x2000                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb6, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmaddsub231ps zmm30,zmm29,ZWORD rdx-0x2040                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb6, 0x72, 0x7f                               }, { vfmaddsub231ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb6, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmaddsub231ps zmm30,zmm29,DWORD rdx+0x200{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb6, 0x72, 0x80                               }, { vfmaddsub231ps zmm30,zmm29,DWORD rdx-0x200{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb6, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmaddsub231ps zmm30,zmm29,DWORD rdx-0x204{1to16}          }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x9a, 0xf4                                     }, { vfmsub132pd zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x9a, 0xf4                                     }, { vfmsub132pd zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x9a, 0xf4                                     }, { vfmsub132pd zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0x9a, 0xf4                                     }, { vfmsub132pd zmm30,zmm29,zmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0x9a, 0xf4                                     }, { vfmsub132pd zmm30,zmm29,zmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0x9a, 0xf4                                     }, { vfmsub132pd zmm30,zmm29,zmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0x9a, 0xf4                                     }, { vfmsub132pd zmm30,zmm29,zmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9a, 0x31                                     }, { vfmsub132pd zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x9a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsub132pd zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9a, 0x31                                     }, { vfmsub132pd zmm30,zmm29,QWORD rcx{1to8}                    }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9a, 0x72, 0x7f                               }, { vfmsub132pd zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9a, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmsub132pd zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9a, 0x72, 0x80                               }, { vfmsub132pd zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9a, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmsub132pd zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9a, 0x72, 0x7f                               }, { vfmsub132pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9a, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmsub132pd zmm30,zmm29,QWORD rdx+0x400{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9a, 0x72, 0x80                               }, { vfmsub132pd zmm30,zmm29,QWORD rdx-0x400{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9a, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmsub132pd zmm30,zmm29,QWORD rdx-0x408{1to8}              }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x9a, 0xf4                                     }, { vfmsub132ps zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x9a, 0xf4                                     }, { vfmsub132ps zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x9a, 0xf4                                     }, { vfmsub132ps zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0x9a, 0xf4                                     }, { vfmsub132ps zmm30,zmm29,zmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0x9a, 0xf4                                     }, { vfmsub132ps zmm30,zmm29,zmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0x9a, 0xf4                                     }, { vfmsub132ps zmm30,zmm29,zmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0x9a, 0xf4                                     }, { vfmsub132ps zmm30,zmm29,zmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9a, 0x31                                     }, { vfmsub132ps zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x9a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsub132ps zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9a, 0x31                                     }, { vfmsub132ps zmm30,zmm29,DWORD rcx{1to16}                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9a, 0x72, 0x7f                               }, { vfmsub132ps zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9a, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmsub132ps zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9a, 0x72, 0x80                               }, { vfmsub132ps zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9a, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmsub132ps zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9a, 0x72, 0x7f                               }, { vfmsub132ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9a, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmsub132ps zmm30,zmm29,DWORD rdx+0x200{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9a, 0x72, 0x80                               }, { vfmsub132ps zmm30,zmm29,DWORD rdx-0x200{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9a, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmsub132ps zmm30,zmm29,DWORD rdx-0x204{1to16}             }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0x9b, 0xf4                                     }, { vfmsub132sd xmm30{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0x9b, 0xf4                                     }, { vfmsub132sd xmm30{k7}{z},xmm29,xmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0x9b, 0xf4                                     }, { vfmsub132sd xmm30{k7},xmm29,xmm28,{rn-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0x9b, 0xf4                                     }, { vfmsub132sd xmm30{k7},xmm29,xmm28,{ru-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0x9b, 0xf4                                     }, { vfmsub132sd xmm30{k7},xmm29,xmm28,{rd-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0x9b, 0xf4                                     }, { vfmsub132sd xmm30{k7},xmm29,xmm28,{rz-sae}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9b, 0x31                                     }, { vfmsub132sd xmm30{k7},xmm29,QWORD rcx                      }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0x9b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsub132sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9b, 0x72, 0x7f                               }, { vfmsub132sd xmm30{k7},xmm29,QWORD rdx+0x3f8                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9b, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmsub132sd xmm30{k7},xmm29,QWORD rdx+0x400                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9b, 0x72, 0x80                               }, { vfmsub132sd xmm30{k7},xmm29,QWORD rdx-0x400                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9b, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmsub132sd xmm30{k7},xmm29,QWORD rdx-0x408                }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0x9b, 0xf4                                     }, { vfmsub132ss xmm30{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0x9b, 0xf4                                     }, { vfmsub132ss xmm30{k7}{z},xmm29,xmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0x9b, 0xf4                                     }, { vfmsub132ss xmm30{k7},xmm29,xmm28,{rn-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0x9b, 0xf4                                     }, { vfmsub132ss xmm30{k7},xmm29,xmm28,{ru-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0x9b, 0xf4                                     }, { vfmsub132ss xmm30{k7},xmm29,xmm28,{rd-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0x9b, 0xf4                                     }, { vfmsub132ss xmm30{k7},xmm29,xmm28,{rz-sae}                   }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9b, 0x31                                     }, { vfmsub132ss xmm30{k7},xmm29,DWORD rcx                      }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0x9b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsub132ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9b, 0x72, 0x7f                               }, { vfmsub132ss xmm30{k7},xmm29,DWORD rdx+0x1fc                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9b, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmsub132ss xmm30{k7},xmm29,DWORD rdx+0x200                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9b, 0x72, 0x80                               }, { vfmsub132ss xmm30{k7},xmm29,DWORD rdx-0x200                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9b, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmsub132ss xmm30{k7},xmm29,DWORD rdx-0x204                }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0xaa, 0xf4                                     }, { vfmsub213pd zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0xaa, 0xf4                                     }, { vfmsub213pd zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0xaa, 0xf4                                     }, { vfmsub213pd zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0xaa, 0xf4                                     }, { vfmsub213pd zmm30,zmm29,zmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0xaa, 0xf4                                     }, { vfmsub213pd zmm30,zmm29,zmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0xaa, 0xf4                                     }, { vfmsub213pd zmm30,zmm29,zmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0xaa, 0xf4                                     }, { vfmsub213pd zmm30,zmm29,zmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xaa, 0x31                                     }, { vfmsub213pd zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0xaa, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsub213pd zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xaa, 0x31                                     }, { vfmsub213pd zmm30,zmm29,QWORD rcx{1to8}                    }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xaa, 0x72, 0x7f                               }, { vfmsub213pd zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xaa, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmsub213pd zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xaa, 0x72, 0x80                               }, { vfmsub213pd zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xaa, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmsub213pd zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xaa, 0x72, 0x7f                               }, { vfmsub213pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xaa, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmsub213pd zmm30,zmm29,QWORD rdx+0x400{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xaa, 0x72, 0x80                               }, { vfmsub213pd zmm30,zmm29,QWORD rdx-0x400{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xaa, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmsub213pd zmm30,zmm29,QWORD rdx-0x408{1to8}              }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0xaa, 0xf4                                     }, { vfmsub213ps zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0xaa, 0xf4                                     }, { vfmsub213ps zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0xaa, 0xf4                                     }, { vfmsub213ps zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0xaa, 0xf4                                     }, { vfmsub213ps zmm30,zmm29,zmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0xaa, 0xf4                                     }, { vfmsub213ps zmm30,zmm29,zmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0xaa, 0xf4                                     }, { vfmsub213ps zmm30,zmm29,zmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0xaa, 0xf4                                     }, { vfmsub213ps zmm30,zmm29,zmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xaa, 0x31                                     }, { vfmsub213ps zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0xaa, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsub213ps zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xaa, 0x31                                     }, { vfmsub213ps zmm30,zmm29,DWORD rcx{1to16}                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xaa, 0x72, 0x7f                               }, { vfmsub213ps zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xaa, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmsub213ps zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xaa, 0x72, 0x80                               }, { vfmsub213ps zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xaa, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmsub213ps zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xaa, 0x72, 0x7f                               }, { vfmsub213ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xaa, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmsub213ps zmm30,zmm29,DWORD rdx+0x200{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xaa, 0x72, 0x80                               }, { vfmsub213ps zmm30,zmm29,DWORD rdx-0x200{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xaa, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmsub213ps zmm30,zmm29,DWORD rdx-0x204{1to16}             }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0xab, 0xf4                                     }, { vfmsub213sd xmm30{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0xab, 0xf4                                     }, { vfmsub213sd xmm30{k7}{z},xmm29,xmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0xab, 0xf4                                     }, { vfmsub213sd xmm30{k7},xmm29,xmm28,{rn-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0xab, 0xf4                                     }, { vfmsub213sd xmm30{k7},xmm29,xmm28,{ru-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0xab, 0xf4                                     }, { vfmsub213sd xmm30{k7},xmm29,xmm28,{rd-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0xab, 0xf4                                     }, { vfmsub213sd xmm30{k7},xmm29,xmm28,{rz-sae}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xab, 0x31                                     }, { vfmsub213sd xmm30{k7},xmm29,QWORD rcx                      }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0xab, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsub213sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xab, 0x72, 0x7f                               }, { vfmsub213sd xmm30{k7},xmm29,QWORD rdx+0x3f8                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xab, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmsub213sd xmm30{k7},xmm29,QWORD rdx+0x400                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xab, 0x72, 0x80                               }, { vfmsub213sd xmm30{k7},xmm29,QWORD rdx-0x400                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xab, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmsub213sd xmm30{k7},xmm29,QWORD rdx-0x408                }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0xab, 0xf4                                     }, { vfmsub213ss xmm30{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0xab, 0xf4                                     }, { vfmsub213ss xmm30{k7}{z},xmm29,xmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0xab, 0xf4                                     }, { vfmsub213ss xmm30{k7},xmm29,xmm28,{rn-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0xab, 0xf4                                     }, { vfmsub213ss xmm30{k7},xmm29,xmm28,{ru-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0xab, 0xf4                                     }, { vfmsub213ss xmm30{k7},xmm29,xmm28,{rd-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0xab, 0xf4                                     }, { vfmsub213ss xmm30{k7},xmm29,xmm28,{rz-sae}                   }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xab, 0x31                                     }, { vfmsub213ss xmm30{k7},xmm29,DWORD rcx                      }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0xab, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsub213ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xab, 0x72, 0x7f                               }, { vfmsub213ss xmm30{k7},xmm29,DWORD rdx+0x1fc                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xab, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmsub213ss xmm30{k7},xmm29,DWORD rdx+0x200                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xab, 0x72, 0x80                               }, { vfmsub213ss xmm30{k7},xmm29,DWORD rdx-0x200                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xab, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmsub213ss xmm30{k7},xmm29,DWORD rdx-0x204                }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0xba, 0xf4                                     }, { vfmsub231pd zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0xba, 0xf4                                     }, { vfmsub231pd zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0xba, 0xf4                                     }, { vfmsub231pd zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0xba, 0xf4                                     }, { vfmsub231pd zmm30,zmm29,zmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0xba, 0xf4                                     }, { vfmsub231pd zmm30,zmm29,zmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0xba, 0xf4                                     }, { vfmsub231pd zmm30,zmm29,zmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0xba, 0xf4                                     }, { vfmsub231pd zmm30,zmm29,zmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xba, 0x31                                     }, { vfmsub231pd zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0xba, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsub231pd zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xba, 0x31                                     }, { vfmsub231pd zmm30,zmm29,QWORD rcx{1to8}                    }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xba, 0x72, 0x7f                               }, { vfmsub231pd zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xba, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmsub231pd zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xba, 0x72, 0x80                               }, { vfmsub231pd zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xba, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmsub231pd zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xba, 0x72, 0x7f                               }, { vfmsub231pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xba, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmsub231pd zmm30,zmm29,QWORD rdx+0x400{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xba, 0x72, 0x80                               }, { vfmsub231pd zmm30,zmm29,QWORD rdx-0x400{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xba, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmsub231pd zmm30,zmm29,QWORD rdx-0x408{1to8}              }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0xba, 0xf4                                     }, { vfmsub231ps zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0xba, 0xf4                                     }, { vfmsub231ps zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0xba, 0xf4                                     }, { vfmsub231ps zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0xba, 0xf4                                     }, { vfmsub231ps zmm30,zmm29,zmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0xba, 0xf4                                     }, { vfmsub231ps zmm30,zmm29,zmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0xba, 0xf4                                     }, { vfmsub231ps zmm30,zmm29,zmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0xba, 0xf4                                     }, { vfmsub231ps zmm30,zmm29,zmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xba, 0x31                                     }, { vfmsub231ps zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0xba, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsub231ps zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xba, 0x31                                     }, { vfmsub231ps zmm30,zmm29,DWORD rcx{1to16}                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xba, 0x72, 0x7f                               }, { vfmsub231ps zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xba, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmsub231ps zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xba, 0x72, 0x80                               }, { vfmsub231ps zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xba, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmsub231ps zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xba, 0x72, 0x7f                               }, { vfmsub231ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xba, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmsub231ps zmm30,zmm29,DWORD rdx+0x200{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xba, 0x72, 0x80                               }, { vfmsub231ps zmm30,zmm29,DWORD rdx-0x200{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xba, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmsub231ps zmm30,zmm29,DWORD rdx-0x204{1to16}             }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0xbb, 0xf4                                     }, { vfmsub231sd xmm30{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0xbb, 0xf4                                     }, { vfmsub231sd xmm30{k7}{z},xmm29,xmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0xbb, 0xf4                                     }, { vfmsub231sd xmm30{k7},xmm29,xmm28,{rn-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0xbb, 0xf4                                     }, { vfmsub231sd xmm30{k7},xmm29,xmm28,{ru-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0xbb, 0xf4                                     }, { vfmsub231sd xmm30{k7},xmm29,xmm28,{rd-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0xbb, 0xf4                                     }, { vfmsub231sd xmm30{k7},xmm29,xmm28,{rz-sae}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbb, 0x31                                     }, { vfmsub231sd xmm30{k7},xmm29,QWORD rcx                      }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0xbb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsub231sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbb, 0x72, 0x7f                               }, { vfmsub231sd xmm30{k7},xmm29,QWORD rdx+0x3f8                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbb, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmsub231sd xmm30{k7},xmm29,QWORD rdx+0x400                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbb, 0x72, 0x80                               }, { vfmsub231sd xmm30{k7},xmm29,QWORD rdx-0x400                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbb, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmsub231sd xmm30{k7},xmm29,QWORD rdx-0x408                }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0xbb, 0xf4                                     }, { vfmsub231ss xmm30{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0xbb, 0xf4                                     }, { vfmsub231ss xmm30{k7}{z},xmm29,xmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0xbb, 0xf4                                     }, { vfmsub231ss xmm30{k7},xmm29,xmm28,{rn-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0xbb, 0xf4                                     }, { vfmsub231ss xmm30{k7},xmm29,xmm28,{ru-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0xbb, 0xf4                                     }, { vfmsub231ss xmm30{k7},xmm29,xmm28,{rd-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0xbb, 0xf4                                     }, { vfmsub231ss xmm30{k7},xmm29,xmm28,{rz-sae}                   }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbb, 0x31                                     }, { vfmsub231ss xmm30{k7},xmm29,DWORD rcx                      }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0xbb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsub231ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbb, 0x72, 0x7f                               }, { vfmsub231ss xmm30{k7},xmm29,DWORD rdx+0x1fc                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbb, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmsub231ss xmm30{k7},xmm29,DWORD rdx+0x200                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbb, 0x72, 0x80                               }, { vfmsub231ss xmm30{k7},xmm29,DWORD rdx-0x200                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbb, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmsub231ss xmm30{k7},xmm29,DWORD rdx-0x204                }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x97, 0xf4                                     }, { vfmsubadd132pd zmm30,zmm29,zmm28                             }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x97, 0xf4                                     }, { vfmsubadd132pd zmm30{k7},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x97, 0xf4                                     }, { vfmsubadd132pd zmm30{k7}{z},zmm29,zmm28                      }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0x97, 0xf4                                     }, { vfmsubadd132pd zmm30,zmm29,zmm28,{rn-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0x97, 0xf4                                     }, { vfmsubadd132pd zmm30,zmm29,zmm28,{ru-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0x97, 0xf4                                     }, { vfmsubadd132pd zmm30,zmm29,zmm28,{rd-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0x97, 0xf4                                     }, { vfmsubadd132pd zmm30,zmm29,zmm28,{rz-sae}                    }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x97, 0x31                                     }, { vfmsubadd132pd zmm30,zmm29,ZWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x97, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsubadd132pd zmm30,zmm29,ZWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x97, 0x31                                     }, { vfmsubadd132pd zmm30,zmm29,QWORD rcx{1to8}                 }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x97, 0x72, 0x7f                               }, { vfmsubadd132pd zmm30,zmm29,ZWORD rdx+0x1fc0                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x97, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmsubadd132pd zmm30,zmm29,ZWORD rdx+0x2000                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x97, 0x72, 0x80                               }, { vfmsubadd132pd zmm30,zmm29,ZWORD rdx-0x2000                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x97, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmsubadd132pd zmm30,zmm29,ZWORD rdx-0x2040                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x97, 0x72, 0x7f                               }, { vfmsubadd132pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x97, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmsubadd132pd zmm30,zmm29,QWORD rdx+0x400{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x97, 0x72, 0x80                               }, { vfmsubadd132pd zmm30,zmm29,QWORD rdx-0x400{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x97, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmsubadd132pd zmm30,zmm29,QWORD rdx-0x408{1to8}           }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x97, 0xf4                                     }, { vfmsubadd132ps zmm30,zmm29,zmm28                             }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x97, 0xf4                                     }, { vfmsubadd132ps zmm30{k7},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x97, 0xf4                                     }, { vfmsubadd132ps zmm30{k7}{z},zmm29,zmm28                      }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0x97, 0xf4                                     }, { vfmsubadd132ps zmm30,zmm29,zmm28,{rn-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0x97, 0xf4                                     }, { vfmsubadd132ps zmm30,zmm29,zmm28,{ru-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0x97, 0xf4                                     }, { vfmsubadd132ps zmm30,zmm29,zmm28,{rd-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0x97, 0xf4                                     }, { vfmsubadd132ps zmm30,zmm29,zmm28,{rz-sae}                    }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x97, 0x31                                     }, { vfmsubadd132ps zmm30,zmm29,ZWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x97, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsubadd132ps zmm30,zmm29,ZWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x97, 0x31                                     }, { vfmsubadd132ps zmm30,zmm29,DWORD rcx{1to16}                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x97, 0x72, 0x7f                               }, { vfmsubadd132ps zmm30,zmm29,ZWORD rdx+0x1fc0                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x97, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmsubadd132ps zmm30,zmm29,ZWORD rdx+0x2000                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x97, 0x72, 0x80                               }, { vfmsubadd132ps zmm30,zmm29,ZWORD rdx-0x2000                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x97, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmsubadd132ps zmm30,zmm29,ZWORD rdx-0x2040                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x97, 0x72, 0x7f                               }, { vfmsubadd132ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x97, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmsubadd132ps zmm30,zmm29,DWORD rdx+0x200{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x97, 0x72, 0x80                               }, { vfmsubadd132ps zmm30,zmm29,DWORD rdx-0x200{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x97, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmsubadd132ps zmm30,zmm29,DWORD rdx-0x204{1to16}          }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0xa7, 0xf4                                     }, { vfmsubadd213pd zmm30,zmm29,zmm28                             }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0xa7, 0xf4                                     }, { vfmsubadd213pd zmm30{k7},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0xa7, 0xf4                                     }, { vfmsubadd213pd zmm30{k7}{z},zmm29,zmm28                      }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0xa7, 0xf4                                     }, { vfmsubadd213pd zmm30,zmm29,zmm28,{rn-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0xa7, 0xf4                                     }, { vfmsubadd213pd zmm30,zmm29,zmm28,{ru-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0xa7, 0xf4                                     }, { vfmsubadd213pd zmm30,zmm29,zmm28,{rd-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0xa7, 0xf4                                     }, { vfmsubadd213pd zmm30,zmm29,zmm28,{rz-sae}                    }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa7, 0x31                                     }, { vfmsubadd213pd zmm30,zmm29,ZWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0xa7, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsubadd213pd zmm30,zmm29,ZWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa7, 0x31                                     }, { vfmsubadd213pd zmm30,zmm29,QWORD rcx{1to8}                 }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa7, 0x72, 0x7f                               }, { vfmsubadd213pd zmm30,zmm29,ZWORD rdx+0x1fc0                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa7, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmsubadd213pd zmm30,zmm29,ZWORD rdx+0x2000                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa7, 0x72, 0x80                               }, { vfmsubadd213pd zmm30,zmm29,ZWORD rdx-0x2000                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa7, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmsubadd213pd zmm30,zmm29,ZWORD rdx-0x2040                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa7, 0x72, 0x7f                               }, { vfmsubadd213pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa7, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmsubadd213pd zmm30,zmm29,QWORD rdx+0x400{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa7, 0x72, 0x80                               }, { vfmsubadd213pd zmm30,zmm29,QWORD rdx-0x400{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa7, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmsubadd213pd zmm30,zmm29,QWORD rdx-0x408{1to8}           }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0xa7, 0xf4                                     }, { vfmsubadd213ps zmm30,zmm29,zmm28                             }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0xa7, 0xf4                                     }, { vfmsubadd213ps zmm30{k7},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0xa7, 0xf4                                     }, { vfmsubadd213ps zmm30{k7}{z},zmm29,zmm28                      }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0xa7, 0xf4                                     }, { vfmsubadd213ps zmm30,zmm29,zmm28,{rn-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0xa7, 0xf4                                     }, { vfmsubadd213ps zmm30,zmm29,zmm28,{ru-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0xa7, 0xf4                                     }, { vfmsubadd213ps zmm30,zmm29,zmm28,{rd-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0xa7, 0xf4                                     }, { vfmsubadd213ps zmm30,zmm29,zmm28,{rz-sae}                    }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa7, 0x31                                     }, { vfmsubadd213ps zmm30,zmm29,ZWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0xa7, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsubadd213ps zmm30,zmm29,ZWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa7, 0x31                                     }, { vfmsubadd213ps zmm30,zmm29,DWORD rcx{1to16}                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa7, 0x72, 0x7f                               }, { vfmsubadd213ps zmm30,zmm29,ZWORD rdx+0x1fc0                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa7, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmsubadd213ps zmm30,zmm29,ZWORD rdx+0x2000                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa7, 0x72, 0x80                               }, { vfmsubadd213ps zmm30,zmm29,ZWORD rdx-0x2000                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa7, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmsubadd213ps zmm30,zmm29,ZWORD rdx-0x2040                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa7, 0x72, 0x7f                               }, { vfmsubadd213ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa7, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmsubadd213ps zmm30,zmm29,DWORD rdx+0x200{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa7, 0x72, 0x80                               }, { vfmsubadd213ps zmm30,zmm29,DWORD rdx-0x200{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa7, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmsubadd213ps zmm30,zmm29,DWORD rdx-0x204{1to16}          }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0xb7, 0xf4                                     }, { vfmsubadd231pd zmm30,zmm29,zmm28                             }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0xb7, 0xf4                                     }, { vfmsubadd231pd zmm30{k7},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0xb7, 0xf4                                     }, { vfmsubadd231pd zmm30{k7}{z},zmm29,zmm28                      }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0xb7, 0xf4                                     }, { vfmsubadd231pd zmm30,zmm29,zmm28,{rn-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0xb7, 0xf4                                     }, { vfmsubadd231pd zmm30,zmm29,zmm28,{ru-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0xb7, 0xf4                                     }, { vfmsubadd231pd zmm30,zmm29,zmm28,{rd-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0xb7, 0xf4                                     }, { vfmsubadd231pd zmm30,zmm29,zmm28,{rz-sae}                    }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb7, 0x31                                     }, { vfmsubadd231pd zmm30,zmm29,ZWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0xb7, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsubadd231pd zmm30,zmm29,ZWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb7, 0x31                                     }, { vfmsubadd231pd zmm30,zmm29,QWORD rcx{1to8}                 }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb7, 0x72, 0x7f                               }, { vfmsubadd231pd zmm30,zmm29,ZWORD rdx+0x1fc0                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb7, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmsubadd231pd zmm30,zmm29,ZWORD rdx+0x2000                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb7, 0x72, 0x80                               }, { vfmsubadd231pd zmm30,zmm29,ZWORD rdx-0x2000                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb7, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmsubadd231pd zmm30,zmm29,ZWORD rdx-0x2040                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb7, 0x72, 0x7f                               }, { vfmsubadd231pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb7, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmsubadd231pd zmm30,zmm29,QWORD rdx+0x400{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb7, 0x72, 0x80                               }, { vfmsubadd231pd zmm30,zmm29,QWORD rdx-0x400{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb7, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmsubadd231pd zmm30,zmm29,QWORD rdx-0x408{1to8}           }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0xb7, 0xf4                                     }, { vfmsubadd231ps zmm30,zmm29,zmm28                             }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0xb7, 0xf4                                     }, { vfmsubadd231ps zmm30{k7},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0xb7, 0xf4                                     }, { vfmsubadd231ps zmm30{k7}{z},zmm29,zmm28                      }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0xb7, 0xf4                                     }, { vfmsubadd231ps zmm30,zmm29,zmm28,{rn-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0xb7, 0xf4                                     }, { vfmsubadd231ps zmm30,zmm29,zmm28,{ru-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0xb7, 0xf4                                     }, { vfmsubadd231ps zmm30,zmm29,zmm28,{rd-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0xb7, 0xf4                                     }, { vfmsubadd231ps zmm30,zmm29,zmm28,{rz-sae}                    }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb7, 0x31                                     }, { vfmsubadd231ps zmm30,zmm29,ZWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0xb7, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsubadd231ps zmm30,zmm29,ZWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb7, 0x31                                     }, { vfmsubadd231ps zmm30,zmm29,DWORD rcx{1to16}                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb7, 0x72, 0x7f                               }, { vfmsubadd231ps zmm30,zmm29,ZWORD rdx+0x1fc0                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb7, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmsubadd231ps zmm30,zmm29,ZWORD rdx+0x2000                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb7, 0x72, 0x80                               }, { vfmsubadd231ps zmm30,zmm29,ZWORD rdx-0x2000                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb7, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmsubadd231ps zmm30,zmm29,ZWORD rdx-0x2040                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb7, 0x72, 0x7f                               }, { vfmsubadd231ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb7, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmsubadd231ps zmm30,zmm29,DWORD rdx+0x200{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb7, 0x72, 0x80                               }, { vfmsubadd231ps zmm30,zmm29,DWORD rdx-0x200{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb7, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmsubadd231ps zmm30,zmm29,DWORD rdx-0x204{1to16}          }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x9c, 0xf4                                     }, { vfnmadd132pd zmm30,zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x9c, 0xf4                                     }, { vfnmadd132pd zmm30{k7},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x9c, 0xf4                                     }, { vfnmadd132pd zmm30{k7}{z},zmm29,zmm28                        }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0x9c, 0xf4                                     }, { vfnmadd132pd zmm30,zmm29,zmm28,{rn-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0x9c, 0xf4                                     }, { vfnmadd132pd zmm30,zmm29,zmm28,{ru-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0x9c, 0xf4                                     }, { vfnmadd132pd zmm30,zmm29,zmm28,{rd-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0x9c, 0xf4                                     }, { vfnmadd132pd zmm30,zmm29,zmm28,{rz-sae}                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9c, 0x31                                     }, { vfnmadd132pd zmm30,zmm29,ZWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x9c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmadd132pd zmm30,zmm29,ZWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9c, 0x31                                     }, { vfnmadd132pd zmm30,zmm29,QWORD rcx{1to8}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9c, 0x72, 0x7f                               }, { vfnmadd132pd zmm30,zmm29,ZWORD rdx+0x1fc0                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9c, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfnmadd132pd zmm30,zmm29,ZWORD rdx+0x2000                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9c, 0x72, 0x80                               }, { vfnmadd132pd zmm30,zmm29,ZWORD rdx-0x2000                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9c, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfnmadd132pd zmm30,zmm29,ZWORD rdx-0x2040                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9c, 0x72, 0x7f                               }, { vfnmadd132pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9c, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfnmadd132pd zmm30,zmm29,QWORD rdx+0x400{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9c, 0x72, 0x80                               }, { vfnmadd132pd zmm30,zmm29,QWORD rdx-0x400{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9c, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfnmadd132pd zmm30,zmm29,QWORD rdx-0x408{1to8}             }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x9c, 0xf4                                     }, { vfnmadd132ps zmm30,zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x9c, 0xf4                                     }, { vfnmadd132ps zmm30{k7},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x9c, 0xf4                                     }, { vfnmadd132ps zmm30{k7}{z},zmm29,zmm28                        }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0x9c, 0xf4                                     }, { vfnmadd132ps zmm30,zmm29,zmm28,{rn-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0x9c, 0xf4                                     }, { vfnmadd132ps zmm30,zmm29,zmm28,{ru-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0x9c, 0xf4                                     }, { vfnmadd132ps zmm30,zmm29,zmm28,{rd-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0x9c, 0xf4                                     }, { vfnmadd132ps zmm30,zmm29,zmm28,{rz-sae}                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9c, 0x31                                     }, { vfnmadd132ps zmm30,zmm29,ZWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x9c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmadd132ps zmm30,zmm29,ZWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9c, 0x31                                     }, { vfnmadd132ps zmm30,zmm29,DWORD rcx{1to16}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9c, 0x72, 0x7f                               }, { vfnmadd132ps zmm30,zmm29,ZWORD rdx+0x1fc0                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9c, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfnmadd132ps zmm30,zmm29,ZWORD rdx+0x2000                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9c, 0x72, 0x80                               }, { vfnmadd132ps zmm30,zmm29,ZWORD rdx-0x2000                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9c, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfnmadd132ps zmm30,zmm29,ZWORD rdx-0x2040                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9c, 0x72, 0x7f                               }, { vfnmadd132ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9c, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfnmadd132ps zmm30,zmm29,DWORD rdx+0x200{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9c, 0x72, 0x80                               }, { vfnmadd132ps zmm30,zmm29,DWORD rdx-0x200{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9c, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfnmadd132ps zmm30,zmm29,DWORD rdx-0x204{1to16}            }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0x9d, 0xf4                                     }, { vfnmadd132sd xmm30{k7},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0x9d, 0xf4                                     }, { vfnmadd132sd xmm30{k7}{z},xmm29,xmm28                        }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0x9d, 0xf4                                     }, { vfnmadd132sd xmm30{k7},xmm29,xmm28,{rn-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0x9d, 0xf4                                     }, { vfnmadd132sd xmm30{k7},xmm29,xmm28,{ru-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0x9d, 0xf4                                     }, { vfnmadd132sd xmm30{k7},xmm29,xmm28,{rd-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0x9d, 0xf4                                     }, { vfnmadd132sd xmm30{k7},xmm29,xmm28,{rz-sae}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9d, 0x31                                     }, { vfnmadd132sd xmm30{k7},xmm29,QWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0x9d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmadd132sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123         }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9d, 0x72, 0x7f                               }, { vfnmadd132sd xmm30{k7},xmm29,QWORD rdx+0x3f8               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9d, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfnmadd132sd xmm30{k7},xmm29,QWORD rdx+0x400               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9d, 0x72, 0x80                               }, { vfnmadd132sd xmm30{k7},xmm29,QWORD rdx-0x400               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9d, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfnmadd132sd xmm30{k7},xmm29,QWORD rdx-0x408               }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0x9d, 0xf4                                     }, { vfnmadd132ss xmm30{k7},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0x9d, 0xf4                                     }, { vfnmadd132ss xmm30{k7}{z},xmm29,xmm28                        }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0x9d, 0xf4                                     }, { vfnmadd132ss xmm30{k7},xmm29,xmm28,{rn-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0x9d, 0xf4                                     }, { vfnmadd132ss xmm30{k7},xmm29,xmm28,{ru-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0x9d, 0xf4                                     }, { vfnmadd132ss xmm30{k7},xmm29,xmm28,{rd-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0x9d, 0xf4                                     }, { vfnmadd132ss xmm30{k7},xmm29,xmm28,{rz-sae}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9d, 0x31                                     }, { vfnmadd132ss xmm30{k7},xmm29,DWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0x9d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmadd132ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123         }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9d, 0x72, 0x7f                               }, { vfnmadd132ss xmm30{k7},xmm29,DWORD rdx+0x1fc               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9d, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfnmadd132ss xmm30{k7},xmm29,DWORD rdx+0x200               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9d, 0x72, 0x80                               }, { vfnmadd132ss xmm30{k7},xmm29,DWORD rdx-0x200               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9d, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfnmadd132ss xmm30{k7},xmm29,DWORD rdx-0x204               }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0xac, 0xf4                                     }, { vfnmadd213pd zmm30,zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0xac, 0xf4                                     }, { vfnmadd213pd zmm30{k7},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0xac, 0xf4                                     }, { vfnmadd213pd zmm30{k7}{z},zmm29,zmm28                        }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0xac, 0xf4                                     }, { vfnmadd213pd zmm30,zmm29,zmm28,{rn-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0xac, 0xf4                                     }, { vfnmadd213pd zmm30,zmm29,zmm28,{ru-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0xac, 0xf4                                     }, { vfnmadd213pd zmm30,zmm29,zmm28,{rd-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0xac, 0xf4                                     }, { vfnmadd213pd zmm30,zmm29,zmm28,{rz-sae}                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xac, 0x31                                     }, { vfnmadd213pd zmm30,zmm29,ZWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0xac, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmadd213pd zmm30,zmm29,ZWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xac, 0x31                                     }, { vfnmadd213pd zmm30,zmm29,QWORD rcx{1to8}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xac, 0x72, 0x7f                               }, { vfnmadd213pd zmm30,zmm29,ZWORD rdx+0x1fc0                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xac, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfnmadd213pd zmm30,zmm29,ZWORD rdx+0x2000                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xac, 0x72, 0x80                               }, { vfnmadd213pd zmm30,zmm29,ZWORD rdx-0x2000                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xac, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfnmadd213pd zmm30,zmm29,ZWORD rdx-0x2040                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xac, 0x72, 0x7f                               }, { vfnmadd213pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xac, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfnmadd213pd zmm30,zmm29,QWORD rdx+0x400{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xac, 0x72, 0x80                               }, { vfnmadd213pd zmm30,zmm29,QWORD rdx-0x400{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xac, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfnmadd213pd zmm30,zmm29,QWORD rdx-0x408{1to8}             }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0xac, 0xf4                                     }, { vfnmadd213ps zmm30,zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0xac, 0xf4                                     }, { vfnmadd213ps zmm30{k7},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0xac, 0xf4                                     }, { vfnmadd213ps zmm30{k7}{z},zmm29,zmm28                        }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0xac, 0xf4                                     }, { vfnmadd213ps zmm30,zmm29,zmm28,{rn-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0xac, 0xf4                                     }, { vfnmadd213ps zmm30,zmm29,zmm28,{ru-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0xac, 0xf4                                     }, { vfnmadd213ps zmm30,zmm29,zmm28,{rd-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0xac, 0xf4                                     }, { vfnmadd213ps zmm30,zmm29,zmm28,{rz-sae}                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xac, 0x31                                     }, { vfnmadd213ps zmm30,zmm29,ZWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0xac, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmadd213ps zmm30,zmm29,ZWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xac, 0x31                                     }, { vfnmadd213ps zmm30,zmm29,DWORD rcx{1to16}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xac, 0x72, 0x7f                               }, { vfnmadd213ps zmm30,zmm29,ZWORD rdx+0x1fc0                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xac, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfnmadd213ps zmm30,zmm29,ZWORD rdx+0x2000                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xac, 0x72, 0x80                               }, { vfnmadd213ps zmm30,zmm29,ZWORD rdx-0x2000                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xac, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfnmadd213ps zmm30,zmm29,ZWORD rdx-0x2040                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xac, 0x72, 0x7f                               }, { vfnmadd213ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xac, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfnmadd213ps zmm30,zmm29,DWORD rdx+0x200{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xac, 0x72, 0x80                               }, { vfnmadd213ps zmm30,zmm29,DWORD rdx-0x200{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xac, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfnmadd213ps zmm30,zmm29,DWORD rdx-0x204{1to16}            }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0xad, 0xf4                                     }, { vfnmadd213sd xmm30{k7},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0xad, 0xf4                                     }, { vfnmadd213sd xmm30{k7}{z},xmm29,xmm28                        }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0xad, 0xf4                                     }, { vfnmadd213sd xmm30{k7},xmm29,xmm28,{rn-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0xad, 0xf4                                     }, { vfnmadd213sd xmm30{k7},xmm29,xmm28,{ru-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0xad, 0xf4                                     }, { vfnmadd213sd xmm30{k7},xmm29,xmm28,{rd-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0xad, 0xf4                                     }, { vfnmadd213sd xmm30{k7},xmm29,xmm28,{rz-sae}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xad, 0x31                                     }, { vfnmadd213sd xmm30{k7},xmm29,QWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0xad, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmadd213sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123         }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xad, 0x72, 0x7f                               }, { vfnmadd213sd xmm30{k7},xmm29,QWORD rdx+0x3f8               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xad, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfnmadd213sd xmm30{k7},xmm29,QWORD rdx+0x400               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xad, 0x72, 0x80                               }, { vfnmadd213sd xmm30{k7},xmm29,QWORD rdx-0x400               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xad, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfnmadd213sd xmm30{k7},xmm29,QWORD rdx-0x408               }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0xad, 0xf4                                     }, { vfnmadd213ss xmm30{k7},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0xad, 0xf4                                     }, { vfnmadd213ss xmm30{k7}{z},xmm29,xmm28                        }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0xad, 0xf4                                     }, { vfnmadd213ss xmm30{k7},xmm29,xmm28,{rn-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0xad, 0xf4                                     }, { vfnmadd213ss xmm30{k7},xmm29,xmm28,{ru-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0xad, 0xf4                                     }, { vfnmadd213ss xmm30{k7},xmm29,xmm28,{rd-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0xad, 0xf4                                     }, { vfnmadd213ss xmm30{k7},xmm29,xmm28,{rz-sae}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xad, 0x31                                     }, { vfnmadd213ss xmm30{k7},xmm29,DWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0xad, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmadd213ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123         }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xad, 0x72, 0x7f                               }, { vfnmadd213ss xmm30{k7},xmm29,DWORD rdx+0x1fc               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xad, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfnmadd213ss xmm30{k7},xmm29,DWORD rdx+0x200               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xad, 0x72, 0x80                               }, { vfnmadd213ss xmm30{k7},xmm29,DWORD rdx-0x200               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xad, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfnmadd213ss xmm30{k7},xmm29,DWORD rdx-0x204               }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0xbc, 0xf4                                     }, { vfnmadd231pd zmm30,zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0xbc, 0xf4                                     }, { vfnmadd231pd zmm30{k7},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0xbc, 0xf4                                     }, { vfnmadd231pd zmm30{k7}{z},zmm29,zmm28                        }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0xbc, 0xf4                                     }, { vfnmadd231pd zmm30,zmm29,zmm28,{rn-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0xbc, 0xf4                                     }, { vfnmadd231pd zmm30,zmm29,zmm28,{ru-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0xbc, 0xf4                                     }, { vfnmadd231pd zmm30,zmm29,zmm28,{rd-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0xbc, 0xf4                                     }, { vfnmadd231pd zmm30,zmm29,zmm28,{rz-sae}                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xbc, 0x31                                     }, { vfnmadd231pd zmm30,zmm29,ZWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0xbc, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmadd231pd zmm30,zmm29,ZWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xbc, 0x31                                     }, { vfnmadd231pd zmm30,zmm29,QWORD rcx{1to8}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xbc, 0x72, 0x7f                               }, { vfnmadd231pd zmm30,zmm29,ZWORD rdx+0x1fc0                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xbc, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfnmadd231pd zmm30,zmm29,ZWORD rdx+0x2000                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xbc, 0x72, 0x80                               }, { vfnmadd231pd zmm30,zmm29,ZWORD rdx-0x2000                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xbc, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfnmadd231pd zmm30,zmm29,ZWORD rdx-0x2040                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xbc, 0x72, 0x7f                               }, { vfnmadd231pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xbc, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfnmadd231pd zmm30,zmm29,QWORD rdx+0x400{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xbc, 0x72, 0x80                               }, { vfnmadd231pd zmm30,zmm29,QWORD rdx-0x400{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xbc, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfnmadd231pd zmm30,zmm29,QWORD rdx-0x408{1to8}             }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0xbc, 0xf4                                     }, { vfnmadd231ps zmm30,zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0xbc, 0xf4                                     }, { vfnmadd231ps zmm30{k7},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0xbc, 0xf4                                     }, { vfnmadd231ps zmm30{k7}{z},zmm29,zmm28                        }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0xbc, 0xf4                                     }, { vfnmadd231ps zmm30,zmm29,zmm28,{rn-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0xbc, 0xf4                                     }, { vfnmadd231ps zmm30,zmm29,zmm28,{ru-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0xbc, 0xf4                                     }, { vfnmadd231ps zmm30,zmm29,zmm28,{rd-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0xbc, 0xf4                                     }, { vfnmadd231ps zmm30,zmm29,zmm28,{rz-sae}                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xbc, 0x31                                     }, { vfnmadd231ps zmm30,zmm29,ZWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0xbc, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmadd231ps zmm30,zmm29,ZWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xbc, 0x31                                     }, { vfnmadd231ps zmm30,zmm29,DWORD rcx{1to16}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xbc, 0x72, 0x7f                               }, { vfnmadd231ps zmm30,zmm29,ZWORD rdx+0x1fc0                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xbc, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfnmadd231ps zmm30,zmm29,ZWORD rdx+0x2000                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xbc, 0x72, 0x80                               }, { vfnmadd231ps zmm30,zmm29,ZWORD rdx-0x2000                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xbc, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfnmadd231ps zmm30,zmm29,ZWORD rdx-0x2040                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xbc, 0x72, 0x7f                               }, { vfnmadd231ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xbc, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfnmadd231ps zmm30,zmm29,DWORD rdx+0x200{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xbc, 0x72, 0x80                               }, { vfnmadd231ps zmm30,zmm29,DWORD rdx-0x200{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xbc, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfnmadd231ps zmm30,zmm29,DWORD rdx-0x204{1to16}            }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0xbd, 0xf4                                     }, { vfnmadd231sd xmm30{k7},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0xbd, 0xf4                                     }, { vfnmadd231sd xmm30{k7}{z},xmm29,xmm28                        }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0xbd, 0xf4                                     }, { vfnmadd231sd xmm30{k7},xmm29,xmm28,{rn-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0xbd, 0xf4                                     }, { vfnmadd231sd xmm30{k7},xmm29,xmm28,{ru-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0xbd, 0xf4                                     }, { vfnmadd231sd xmm30{k7},xmm29,xmm28,{rd-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0xbd, 0xf4                                     }, { vfnmadd231sd xmm30{k7},xmm29,xmm28,{rz-sae}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbd, 0x31                                     }, { vfnmadd231sd xmm30{k7},xmm29,QWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0xbd, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmadd231sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123         }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbd, 0x72, 0x7f                               }, { vfnmadd231sd xmm30{k7},xmm29,QWORD rdx+0x3f8               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbd, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfnmadd231sd xmm30{k7},xmm29,QWORD rdx+0x400               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbd, 0x72, 0x80                               }, { vfnmadd231sd xmm30{k7},xmm29,QWORD rdx-0x400               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbd, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfnmadd231sd xmm30{k7},xmm29,QWORD rdx-0x408               }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0xbd, 0xf4                                     }, { vfnmadd231ss xmm30{k7},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0xbd, 0xf4                                     }, { vfnmadd231ss xmm30{k7}{z},xmm29,xmm28                        }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0xbd, 0xf4                                     }, { vfnmadd231ss xmm30{k7},xmm29,xmm28,{rn-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0xbd, 0xf4                                     }, { vfnmadd231ss xmm30{k7},xmm29,xmm28,{ru-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0xbd, 0xf4                                     }, { vfnmadd231ss xmm30{k7},xmm29,xmm28,{rd-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0xbd, 0xf4                                     }, { vfnmadd231ss xmm30{k7},xmm29,xmm28,{rz-sae}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbd, 0x31                                     }, { vfnmadd231ss xmm30{k7},xmm29,DWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0xbd, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmadd231ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123         }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbd, 0x72, 0x7f                               }, { vfnmadd231ss xmm30{k7},xmm29,DWORD rdx+0x1fc               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbd, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfnmadd231ss xmm30{k7},xmm29,DWORD rdx+0x200               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbd, 0x72, 0x80                               }, { vfnmadd231ss xmm30{k7},xmm29,DWORD rdx-0x200               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbd, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfnmadd231ss xmm30{k7},xmm29,DWORD rdx-0x204               }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x9e, 0xf4                                     }, { vfnmsub132pd zmm30,zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x9e, 0xf4                                     }, { vfnmsub132pd zmm30{k7},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x9e, 0xf4                                     }, { vfnmsub132pd zmm30{k7}{z},zmm29,zmm28                        }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0x9e, 0xf4                                     }, { vfnmsub132pd zmm30,zmm29,zmm28,{rn-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0x9e, 0xf4                                     }, { vfnmsub132pd zmm30,zmm29,zmm28,{ru-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0x9e, 0xf4                                     }, { vfnmsub132pd zmm30,zmm29,zmm28,{rd-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0x9e, 0xf4                                     }, { vfnmsub132pd zmm30,zmm29,zmm28,{rz-sae}                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9e, 0x31                                     }, { vfnmsub132pd zmm30,zmm29,ZWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x9e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmsub132pd zmm30,zmm29,ZWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9e, 0x31                                     }, { vfnmsub132pd zmm30,zmm29,QWORD rcx{1to8}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9e, 0x72, 0x7f                               }, { vfnmsub132pd zmm30,zmm29,ZWORD rdx+0x1fc0                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9e, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfnmsub132pd zmm30,zmm29,ZWORD rdx+0x2000                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9e, 0x72, 0x80                               }, { vfnmsub132pd zmm30,zmm29,ZWORD rdx-0x2000                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9e, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfnmsub132pd zmm30,zmm29,ZWORD rdx-0x2040                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9e, 0x72, 0x7f                               }, { vfnmsub132pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9e, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfnmsub132pd zmm30,zmm29,QWORD rdx+0x400{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9e, 0x72, 0x80                               }, { vfnmsub132pd zmm30,zmm29,QWORD rdx-0x400{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9e, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfnmsub132pd zmm30,zmm29,QWORD rdx-0x408{1to8}             }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x9e, 0xf4                                     }, { vfnmsub132ps zmm30,zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x9e, 0xf4                                     }, { vfnmsub132ps zmm30{k7},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x9e, 0xf4                                     }, { vfnmsub132ps zmm30{k7}{z},zmm29,zmm28                        }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0x9e, 0xf4                                     }, { vfnmsub132ps zmm30,zmm29,zmm28,{rn-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0x9e, 0xf4                                     }, { vfnmsub132ps zmm30,zmm29,zmm28,{ru-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0x9e, 0xf4                                     }, { vfnmsub132ps zmm30,zmm29,zmm28,{rd-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0x9e, 0xf4                                     }, { vfnmsub132ps zmm30,zmm29,zmm28,{rz-sae}                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9e, 0x31                                     }, { vfnmsub132ps zmm30,zmm29,ZWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x9e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmsub132ps zmm30,zmm29,ZWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9e, 0x31                                     }, { vfnmsub132ps zmm30,zmm29,DWORD rcx{1to16}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9e, 0x72, 0x7f                               }, { vfnmsub132ps zmm30,zmm29,ZWORD rdx+0x1fc0                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9e, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfnmsub132ps zmm30,zmm29,ZWORD rdx+0x2000                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9e, 0x72, 0x80                               }, { vfnmsub132ps zmm30,zmm29,ZWORD rdx-0x2000                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9e, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfnmsub132ps zmm30,zmm29,ZWORD rdx-0x2040                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9e, 0x72, 0x7f                               }, { vfnmsub132ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9e, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfnmsub132ps zmm30,zmm29,DWORD rdx+0x200{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9e, 0x72, 0x80                               }, { vfnmsub132ps zmm30,zmm29,DWORD rdx-0x200{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9e, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfnmsub132ps zmm30,zmm29,DWORD rdx-0x204{1to16}            }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0x9f, 0xf4                                     }, { vfnmsub132sd xmm30{k7},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0x9f, 0xf4                                     }, { vfnmsub132sd xmm30{k7}{z},xmm29,xmm28                        }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0x9f, 0xf4                                     }, { vfnmsub132sd xmm30{k7},xmm29,xmm28,{rn-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0x9f, 0xf4                                     }, { vfnmsub132sd xmm30{k7},xmm29,xmm28,{ru-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0x9f, 0xf4                                     }, { vfnmsub132sd xmm30{k7},xmm29,xmm28,{rd-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0x9f, 0xf4                                     }, { vfnmsub132sd xmm30{k7},xmm29,xmm28,{rz-sae}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9f, 0x31                                     }, { vfnmsub132sd xmm30{k7},xmm29,QWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0x9f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmsub132sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123         }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9f, 0x72, 0x7f                               }, { vfnmsub132sd xmm30{k7},xmm29,QWORD rdx+0x3f8               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9f, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfnmsub132sd xmm30{k7},xmm29,QWORD rdx+0x400               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9f, 0x72, 0x80                               }, { vfnmsub132sd xmm30{k7},xmm29,QWORD rdx-0x400               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9f, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfnmsub132sd xmm30{k7},xmm29,QWORD rdx-0x408               }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0x9f, 0xf4                                     }, { vfnmsub132ss xmm30{k7},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0x9f, 0xf4                                     }, { vfnmsub132ss xmm30{k7}{z},xmm29,xmm28                        }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0x9f, 0xf4                                     }, { vfnmsub132ss xmm30{k7},xmm29,xmm28,{rn-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0x9f, 0xf4                                     }, { vfnmsub132ss xmm30{k7},xmm29,xmm28,{ru-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0x9f, 0xf4                                     }, { vfnmsub132ss xmm30{k7},xmm29,xmm28,{rd-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0x9f, 0xf4                                     }, { vfnmsub132ss xmm30{k7},xmm29,xmm28,{rz-sae}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9f, 0x31                                     }, { vfnmsub132ss xmm30{k7},xmm29,DWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0x9f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmsub132ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123         }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9f, 0x72, 0x7f                               }, { vfnmsub132ss xmm30{k7},xmm29,DWORD rdx+0x1fc               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9f, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfnmsub132ss xmm30{k7},xmm29,DWORD rdx+0x200               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9f, 0x72, 0x80                               }, { vfnmsub132ss xmm30{k7},xmm29,DWORD rdx-0x200               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9f, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfnmsub132ss xmm30{k7},xmm29,DWORD rdx-0x204               }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0xae, 0xf4                                     }, { vfnmsub213pd zmm30,zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0xae, 0xf4                                     }, { vfnmsub213pd zmm30{k7},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0xae, 0xf4                                     }, { vfnmsub213pd zmm30{k7}{z},zmm29,zmm28                        }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0xae, 0xf4                                     }, { vfnmsub213pd zmm30,zmm29,zmm28,{rn-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0xae, 0xf4                                     }, { vfnmsub213pd zmm30,zmm29,zmm28,{ru-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0xae, 0xf4                                     }, { vfnmsub213pd zmm30,zmm29,zmm28,{rd-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0xae, 0xf4                                     }, { vfnmsub213pd zmm30,zmm29,zmm28,{rz-sae}                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xae, 0x31                                     }, { vfnmsub213pd zmm30,zmm29,ZWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0xae, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmsub213pd zmm30,zmm29,ZWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xae, 0x31                                     }, { vfnmsub213pd zmm30,zmm29,QWORD rcx{1to8}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xae, 0x72, 0x7f                               }, { vfnmsub213pd zmm30,zmm29,ZWORD rdx+0x1fc0                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xae, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfnmsub213pd zmm30,zmm29,ZWORD rdx+0x2000                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xae, 0x72, 0x80                               }, { vfnmsub213pd zmm30,zmm29,ZWORD rdx-0x2000                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xae, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfnmsub213pd zmm30,zmm29,ZWORD rdx-0x2040                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xae, 0x72, 0x7f                               }, { vfnmsub213pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xae, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfnmsub213pd zmm30,zmm29,QWORD rdx+0x400{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xae, 0x72, 0x80                               }, { vfnmsub213pd zmm30,zmm29,QWORD rdx-0x400{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xae, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfnmsub213pd zmm30,zmm29,QWORD rdx-0x408{1to8}             }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0xae, 0xf4                                     }, { vfnmsub213ps zmm30,zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0xae, 0xf4                                     }, { vfnmsub213ps zmm30{k7},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0xae, 0xf4                                     }, { vfnmsub213ps zmm30{k7}{z},zmm29,zmm28                        }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0xae, 0xf4                                     }, { vfnmsub213ps zmm30,zmm29,zmm28,{rn-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0xae, 0xf4                                     }, { vfnmsub213ps zmm30,zmm29,zmm28,{ru-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0xae, 0xf4                                     }, { vfnmsub213ps zmm30,zmm29,zmm28,{rd-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0xae, 0xf4                                     }, { vfnmsub213ps zmm30,zmm29,zmm28,{rz-sae}                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xae, 0x31                                     }, { vfnmsub213ps zmm30,zmm29,ZWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0xae, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmsub213ps zmm30,zmm29,ZWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xae, 0x31                                     }, { vfnmsub213ps zmm30,zmm29,DWORD rcx{1to16}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xae, 0x72, 0x7f                               }, { vfnmsub213ps zmm30,zmm29,ZWORD rdx+0x1fc0                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xae, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfnmsub213ps zmm30,zmm29,ZWORD rdx+0x2000                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xae, 0x72, 0x80                               }, { vfnmsub213ps zmm30,zmm29,ZWORD rdx-0x2000                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xae, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfnmsub213ps zmm30,zmm29,ZWORD rdx-0x2040                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xae, 0x72, 0x7f                               }, { vfnmsub213ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xae, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfnmsub213ps zmm30,zmm29,DWORD rdx+0x200{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xae, 0x72, 0x80                               }, { vfnmsub213ps zmm30,zmm29,DWORD rdx-0x200{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xae, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfnmsub213ps zmm30,zmm29,DWORD rdx-0x204{1to16}            }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0xaf, 0xf4                                     }, { vfnmsub213sd xmm30{k7},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0xaf, 0xf4                                     }, { vfnmsub213sd xmm30{k7}{z},xmm29,xmm28                        }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0xaf, 0xf4                                     }, { vfnmsub213sd xmm30{k7},xmm29,xmm28,{rn-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0xaf, 0xf4                                     }, { vfnmsub213sd xmm30{k7},xmm29,xmm28,{ru-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0xaf, 0xf4                                     }, { vfnmsub213sd xmm30{k7},xmm29,xmm28,{rd-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0xaf, 0xf4                                     }, { vfnmsub213sd xmm30{k7},xmm29,xmm28,{rz-sae}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xaf, 0x31                                     }, { vfnmsub213sd xmm30{k7},xmm29,QWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0xaf, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmsub213sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123         }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xaf, 0x72, 0x7f                               }, { vfnmsub213sd xmm30{k7},xmm29,QWORD rdx+0x3f8               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xaf, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfnmsub213sd xmm30{k7},xmm29,QWORD rdx+0x400               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xaf, 0x72, 0x80                               }, { vfnmsub213sd xmm30{k7},xmm29,QWORD rdx-0x400               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xaf, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfnmsub213sd xmm30{k7},xmm29,QWORD rdx-0x408               }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0xaf, 0xf4                                     }, { vfnmsub213ss xmm30{k7},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0xaf, 0xf4                                     }, { vfnmsub213ss xmm30{k7}{z},xmm29,xmm28                        }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0xaf, 0xf4                                     }, { vfnmsub213ss xmm30{k7},xmm29,xmm28,{rn-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0xaf, 0xf4                                     }, { vfnmsub213ss xmm30{k7},xmm29,xmm28,{ru-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0xaf, 0xf4                                     }, { vfnmsub213ss xmm30{k7},xmm29,xmm28,{rd-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0xaf, 0xf4                                     }, { vfnmsub213ss xmm30{k7},xmm29,xmm28,{rz-sae}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xaf, 0x31                                     }, { vfnmsub213ss xmm30{k7},xmm29,DWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0xaf, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmsub213ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123         }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xaf, 0x72, 0x7f                               }, { vfnmsub213ss xmm30{k7},xmm29,DWORD rdx+0x1fc               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xaf, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfnmsub213ss xmm30{k7},xmm29,DWORD rdx+0x200               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xaf, 0x72, 0x80                               }, { vfnmsub213ss xmm30{k7},xmm29,DWORD rdx-0x200               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xaf, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfnmsub213ss xmm30{k7},xmm29,DWORD rdx-0x204               }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0xbe, 0xf4                                     }, { vfnmsub231pd zmm30,zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0xbe, 0xf4                                     }, { vfnmsub231pd zmm30{k7},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0xbe, 0xf4                                     }, { vfnmsub231pd zmm30{k7}{z},zmm29,zmm28                        }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0xbe, 0xf4                                     }, { vfnmsub231pd zmm30,zmm29,zmm28,{rn-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0xbe, 0xf4                                     }, { vfnmsub231pd zmm30,zmm29,zmm28,{ru-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0xbe, 0xf4                                     }, { vfnmsub231pd zmm30,zmm29,zmm28,{rd-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0xbe, 0xf4                                     }, { vfnmsub231pd zmm30,zmm29,zmm28,{rz-sae}                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xbe, 0x31                                     }, { vfnmsub231pd zmm30,zmm29,ZWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0xbe, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmsub231pd zmm30,zmm29,ZWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xbe, 0x31                                     }, { vfnmsub231pd zmm30,zmm29,QWORD rcx{1to8}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xbe, 0x72, 0x7f                               }, { vfnmsub231pd zmm30,zmm29,ZWORD rdx+0x1fc0                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xbe, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfnmsub231pd zmm30,zmm29,ZWORD rdx+0x2000                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xbe, 0x72, 0x80                               }, { vfnmsub231pd zmm30,zmm29,ZWORD rdx-0x2000                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xbe, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfnmsub231pd zmm30,zmm29,ZWORD rdx-0x2040                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xbe, 0x72, 0x7f                               }, { vfnmsub231pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xbe, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfnmsub231pd zmm30,zmm29,QWORD rdx+0x400{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xbe, 0x72, 0x80                               }, { vfnmsub231pd zmm30,zmm29,QWORD rdx-0x400{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xbe, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfnmsub231pd zmm30,zmm29,QWORD rdx-0x408{1to8}             }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0xbe, 0xf4                                     }, { vfnmsub231ps zmm30,zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0xbe, 0xf4                                     }, { vfnmsub231ps zmm30{k7},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0xbe, 0xf4                                     }, { vfnmsub231ps zmm30{k7}{z},zmm29,zmm28                        }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0xbe, 0xf4                                     }, { vfnmsub231ps zmm30,zmm29,zmm28,{rn-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0xbe, 0xf4                                     }, { vfnmsub231ps zmm30,zmm29,zmm28,{ru-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0xbe, 0xf4                                     }, { vfnmsub231ps zmm30,zmm29,zmm28,{rd-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0xbe, 0xf4                                     }, { vfnmsub231ps zmm30,zmm29,zmm28,{rz-sae}                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xbe, 0x31                                     }, { vfnmsub231ps zmm30,zmm29,ZWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0xbe, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmsub231ps zmm30,zmm29,ZWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xbe, 0x31                                     }, { vfnmsub231ps zmm30,zmm29,DWORD rcx{1to16}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xbe, 0x72, 0x7f                               }, { vfnmsub231ps zmm30,zmm29,ZWORD rdx+0x1fc0                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xbe, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfnmsub231ps zmm30,zmm29,ZWORD rdx+0x2000                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xbe, 0x72, 0x80                               }, { vfnmsub231ps zmm30,zmm29,ZWORD rdx-0x2000                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xbe, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfnmsub231ps zmm30,zmm29,ZWORD rdx-0x2040                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xbe, 0x72, 0x7f                               }, { vfnmsub231ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xbe, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfnmsub231ps zmm30,zmm29,DWORD rdx+0x200{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xbe, 0x72, 0x80                               }, { vfnmsub231ps zmm30,zmm29,DWORD rdx-0x200{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xbe, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfnmsub231ps zmm30,zmm29,DWORD rdx-0x204{1to16}            }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0xbf, 0xf4                                     }, { vfnmsub231sd xmm30{k7},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0xbf, 0xf4                                     }, { vfnmsub231sd xmm30{k7}{z},xmm29,xmm28                        }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0xbf, 0xf4                                     }, { vfnmsub231sd xmm30{k7},xmm29,xmm28,{rn-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0xbf, 0xf4                                     }, { vfnmsub231sd xmm30{k7},xmm29,xmm28,{ru-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0xbf, 0xf4                                     }, { vfnmsub231sd xmm30{k7},xmm29,xmm28,{rd-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0xbf, 0xf4                                     }, { vfnmsub231sd xmm30{k7},xmm29,xmm28,{rz-sae}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbf, 0x31                                     }, { vfnmsub231sd xmm30{k7},xmm29,QWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0xbf, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmsub231sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123         }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbf, 0x72, 0x7f                               }, { vfnmsub231sd xmm30{k7},xmm29,QWORD rdx+0x3f8               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbf, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfnmsub231sd xmm30{k7},xmm29,QWORD rdx+0x400               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbf, 0x72, 0x80                               }, { vfnmsub231sd xmm30{k7},xmm29,QWORD rdx-0x400               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbf, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfnmsub231sd xmm30{k7},xmm29,QWORD rdx-0x408               }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0xbf, 0xf4                                     }, { vfnmsub231ss xmm30{k7},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0xbf, 0xf4                                     }, { vfnmsub231ss xmm30{k7}{z},xmm29,xmm28                        }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0xbf, 0xf4                                     }, { vfnmsub231ss xmm30{k7},xmm29,xmm28,{rn-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0xbf, 0xf4                                     }, { vfnmsub231ss xmm30{k7},xmm29,xmm28,{ru-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0xbf, 0xf4                                     }, { vfnmsub231ss xmm30{k7},xmm29,xmm28,{rd-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0xbf, 0xf4                                     }, { vfnmsub231ss xmm30{k7},xmm29,xmm28,{rz-sae}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbf, 0x31                                     }, { vfnmsub231ss xmm30{k7},xmm29,DWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0xbf, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmsub231ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123         }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbf, 0x72, 0x7f                               }, { vfnmsub231ss xmm30{k7},xmm29,DWORD rdx+0x1fc               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbf, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfnmsub231ss xmm30{k7},xmm29,DWORD rdx+0x200               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbf, 0x72, 0x80                               }, { vfnmsub231ss xmm30{k7},xmm29,DWORD rdx-0x200               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbf, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfnmsub231ss xmm30{k7},xmm29,DWORD rdx-0x204               }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0x92, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherdpd zmm30{k1}, r14+ymm31*8+0x7b                     }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0x92, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherdpd zmm30{k1}, r14+ymm31*8+0x7b                     }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0x92, 0x74, 0x39, 0x20                         }, { vgatherdpd zmm30{k1}, r9+ymm31*1+0x100                     }
+testcase	{ 0x62, 0x22, 0xfd, 0x41, 0x92, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vgatherdpd zmm30{k1}, rcx+ymm31*4+0x400                    }
+testcase	{ 0x62, 0x02, 0x7d, 0x41, 0x92, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherdps zmm30{k1}, r14+zmm31*8+0x7b                     }
+testcase	{ 0x62, 0x02, 0x7d, 0x41, 0x92, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherdps zmm30{k1}, r14+zmm31*8+0x7b                     }
+testcase	{ 0x62, 0x02, 0x7d, 0x41, 0x92, 0x74, 0x39, 0x40                         }, { vgatherdps zmm30{k1}, r9+zmm31*1+0x100                     }
+testcase	{ 0x62, 0x22, 0x7d, 0x41, 0x92, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vgatherdps zmm30{k1}, rcx+zmm31*4+0x400                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0x93, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherqpd zmm30{k1}, r14+zmm31*8+0x7b                     }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0x93, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherqpd zmm30{k1}, r14+zmm31*8+0x7b                     }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0x93, 0x74, 0x39, 0x20                         }, { vgatherqpd zmm30{k1}, r9+zmm31*1+0x100                     }
+testcase	{ 0x62, 0x22, 0xfd, 0x41, 0x93, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vgatherqpd zmm30{k1}, rcx+zmm31*4+0x400                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0x42, 0xf5                                     }, { vgetexppd zmm30,zmm29                                        }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0x42, 0xf5                                     }, { vgetexppd zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0x42, 0xf5                                     }, { vgetexppd zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x02, 0xfd, 0x18, 0x42, 0xf5                                     }, { vgetexppd zmm30,zmm29,{sae}                                  }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x42, 0x31                                     }, { vgetexppd zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x42, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vgetexppd zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x42, 0x31                                     }, { vgetexppd zmm30,QWORD rcx{1to8}                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x42, 0x72, 0x7f                               }, { vgetexppd zmm30,ZWORD rdx+0x1fc0                           }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x42, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vgetexppd zmm30,ZWORD rdx+0x2000                           }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x42, 0x72, 0x80                               }, { vgetexppd zmm30,ZWORD rdx-0x2000                           }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x42, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vgetexppd zmm30,ZWORD rdx-0x2040                           }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x42, 0x72, 0x7f                               }, { vgetexppd zmm30,QWORD rdx+0x3f8{1to8}                      }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x42, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vgetexppd zmm30,QWORD rdx+0x400{1to8}                      }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x42, 0x72, 0x80                               }, { vgetexppd zmm30,QWORD rdx-0x400{1to8}                      }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x42, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vgetexppd zmm30,QWORD rdx-0x408{1to8}                      }
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0x42, 0xf5                                     }, { vgetexpps zmm30,zmm29                                        }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x42, 0xf5                                     }, { vgetexpps zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x42, 0xf5                                     }, { vgetexpps zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x02, 0x7d, 0x18, 0x42, 0xf5                                     }, { vgetexpps zmm30,zmm29,{sae}                                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x42, 0x31                                     }, { vgetexpps zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x42, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vgetexpps zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x42, 0x31                                     }, { vgetexpps zmm30,DWORD rcx{1to16}                           }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x42, 0x72, 0x7f                               }, { vgetexpps zmm30,ZWORD rdx+0x1fc0                           }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x42, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vgetexpps zmm30,ZWORD rdx+0x2000                           }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x42, 0x72, 0x80                               }, { vgetexpps zmm30,ZWORD rdx-0x2000                           }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x42, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vgetexpps zmm30,ZWORD rdx-0x2040                           }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x42, 0x72, 0x7f                               }, { vgetexpps zmm30,DWORD rdx+0x1fc{1to16}                     }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x42, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vgetexpps zmm30,DWORD rdx+0x200{1to16}                     }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x42, 0x72, 0x80                               }, { vgetexpps zmm30,DWORD rdx-0x200{1to16}                     }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x42, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vgetexpps zmm30,DWORD rdx-0x204{1to16}                     }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0x43, 0xf4                                     }, { vgetexpsd xmm30{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0x43, 0xf4                                     }, { vgetexpsd xmm30{k7}{z},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0x43, 0xf4                                     }, { vgetexpsd xmm30{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x43, 0x31                                     }, { vgetexpsd xmm30{k7},xmm29,QWORD rcx                        }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0x43, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vgetexpsd xmm30{k7},xmm29,QWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x43, 0x72, 0x7f                               }, { vgetexpsd xmm30{k7},xmm29,QWORD rdx+0x3f8                  }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x43, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vgetexpsd xmm30{k7},xmm29,QWORD rdx+0x400                  }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x43, 0x72, 0x80                               }, { vgetexpsd xmm30{k7},xmm29,QWORD rdx-0x400                  }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x43, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vgetexpsd xmm30{k7},xmm29,QWORD rdx-0x408                  }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0x43, 0xf4                                     }, { vgetexpss xmm30{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0x43, 0xf4                                     }, { vgetexpss xmm30{k7}{z},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0x43, 0xf4                                     }, { vgetexpss xmm30{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x43, 0x31                                     }, { vgetexpss xmm30{k7},xmm29,DWORD rcx                        }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0x43, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vgetexpss xmm30{k7},xmm29,DWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x43, 0x72, 0x7f                               }, { vgetexpss xmm30{k7},xmm29,DWORD rdx+0x1fc                  }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x43, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vgetexpss xmm30{k7},xmm29,DWORD rdx+0x200                  }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x43, 0x72, 0x80                               }, { vgetexpss xmm30{k7},xmm29,DWORD rdx-0x200                  }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x43, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vgetexpss xmm30{k7},xmm29,DWORD rdx-0x204                  }
+testcase	{ 0x62, 0x03, 0xfd, 0x48, 0x26, 0xf5, 0xab                               }, { vgetmantpd zmm30,zmm29,0xab                                  }
+testcase	{ 0x62, 0x03, 0xfd, 0x4f, 0x26, 0xf5, 0xab                               }, { vgetmantpd zmm30{k7},zmm29,0xab                              }
+testcase	{ 0x62, 0x03, 0xfd, 0xcf, 0x26, 0xf5, 0xab                               }, { vgetmantpd zmm30{k7}{z},zmm29,0xab                           }
+testcase	{ 0x62, 0x03, 0xfd, 0x18, 0x26, 0xf5, 0xab                               }, { vgetmantpd zmm30,zmm29,{sae},0xab                            }
+testcase	{ 0x62, 0x03, 0xfd, 0x48, 0x26, 0xf5, 0x7b                               }, { vgetmantpd zmm30,zmm29,0x7b                                  }
+testcase	{ 0x62, 0x03, 0xfd, 0x18, 0x26, 0xf5, 0x7b                               }, { vgetmantpd zmm30,zmm29,{sae},0x7b                            }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x26, 0x31, 0x7b                               }, { vgetmantpd zmm30,ZWORD rcx,0x7b                            }
+testcase	{ 0x62, 0x23, 0xfd, 0x48, 0x26, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vgetmantpd zmm30,ZWORD rax+r14*8+0x123,0x7b                }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x26, 0x31, 0x7b                               }, { vgetmantpd zmm30,QWORD rcx{1to8},0x7b                      }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x26, 0x72, 0x7f, 0x7b                         }, { vgetmantpd zmm30,ZWORD rdx+0x1fc0,0x7b                     }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x26, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vgetmantpd zmm30,ZWORD rdx+0x2000,0x7b                     }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x26, 0x72, 0x80, 0x7b                         }, { vgetmantpd zmm30,ZWORD rdx-0x2000,0x7b                     }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x26, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vgetmantpd zmm30,ZWORD rdx-0x2040,0x7b                     }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x26, 0x72, 0x7f, 0x7b                         }, { vgetmantpd zmm30,QWORD rdx+0x3f8{1to8},0x7b                }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x26, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vgetmantpd zmm30,QWORD rdx+0x400{1to8},0x7b                }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x26, 0x72, 0x80, 0x7b                         }, { vgetmantpd zmm30,QWORD rdx-0x400{1to8},0x7b                }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x26, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vgetmantpd zmm30,QWORD rdx-0x408{1to8},0x7b                }
+testcase	{ 0x62, 0x03, 0x7d, 0x48, 0x26, 0xf5, 0xab                               }, { vgetmantps zmm30,zmm29,0xab                                  }
+testcase	{ 0x62, 0x03, 0x7d, 0x4f, 0x26, 0xf5, 0xab                               }, { vgetmantps zmm30{k7},zmm29,0xab                              }
+testcase	{ 0x62, 0x03, 0x7d, 0xcf, 0x26, 0xf5, 0xab                               }, { vgetmantps zmm30{k7}{z},zmm29,0xab                           }
+testcase	{ 0x62, 0x03, 0x7d, 0x18, 0x26, 0xf5, 0xab                               }, { vgetmantps zmm30,zmm29,{sae},0xab                            }
+testcase	{ 0x62, 0x03, 0x7d, 0x48, 0x26, 0xf5, 0x7b                               }, { vgetmantps zmm30,zmm29,0x7b                                  }
+testcase	{ 0x62, 0x03, 0x7d, 0x18, 0x26, 0xf5, 0x7b                               }, { vgetmantps zmm30,zmm29,{sae},0x7b                            }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x26, 0x31, 0x7b                               }, { vgetmantps zmm30,ZWORD rcx,0x7b                            }
+testcase	{ 0x62, 0x23, 0x7d, 0x48, 0x26, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vgetmantps zmm30,ZWORD rax+r14*8+0x123,0x7b                }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x26, 0x31, 0x7b                               }, { vgetmantps zmm30,DWORD rcx{1to16},0x7b                     }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x26, 0x72, 0x7f, 0x7b                         }, { vgetmantps zmm30,ZWORD rdx+0x1fc0,0x7b                     }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x26, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vgetmantps zmm30,ZWORD rdx+0x2000,0x7b                     }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x26, 0x72, 0x80, 0x7b                         }, { vgetmantps zmm30,ZWORD rdx-0x2000,0x7b                     }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x26, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vgetmantps zmm30,ZWORD rdx-0x2040,0x7b                     }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x26, 0x72, 0x7f, 0x7b                         }, { vgetmantps zmm30,DWORD rdx+0x1fc{1to16},0x7b               }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x26, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vgetmantps zmm30,DWORD rdx+0x200{1to16},0x7b               }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x26, 0x72, 0x80, 0x7b                         }, { vgetmantps zmm30,DWORD rdx-0x200{1to16},0x7b               }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x26, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vgetmantps zmm30,DWORD rdx-0x204{1to16},0x7b               }
+testcase	{ 0x62, 0x03, 0x95, 0x07, 0x27, 0xf4, 0xab                               }, { vgetmantsd xmm30{k7},xmm29,xmm28,0xab                        }
+testcase	{ 0x62, 0x03, 0x95, 0x87, 0x27, 0xf4, 0xab                               }, { vgetmantsd xmm30{k7}{z},xmm29,xmm28,0xab                     }
+testcase	{ 0x62, 0x03, 0x95, 0x17, 0x27, 0xf4, 0xab                               }, { vgetmantsd xmm30{k7},xmm29,xmm28,{sae},0xab                  }
+testcase	{ 0x62, 0x03, 0x95, 0x07, 0x27, 0xf4, 0x7b                               }, { vgetmantsd xmm30{k7},xmm29,xmm28,0x7b                        }
+testcase	{ 0x62, 0x03, 0x95, 0x17, 0x27, 0xf4, 0x7b                               }, { vgetmantsd xmm30{k7},xmm29,xmm28,{sae},0x7b                  }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x27, 0x31, 0x7b                               }, { vgetmantsd xmm30{k7},xmm29,QWORD rcx,0x7b                  }
+testcase	{ 0x62, 0x23, 0x95, 0x07, 0x27, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vgetmantsd xmm30{k7},xmm29,QWORD rax+r14*8+0x123,0x7b      }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x27, 0x72, 0x7f, 0x7b                         }, { vgetmantsd xmm30{k7},xmm29,QWORD rdx+0x3f8,0x7b            }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x27, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vgetmantsd xmm30{k7},xmm29,QWORD rdx+0x400,0x7b            }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x27, 0x72, 0x80, 0x7b                         }, { vgetmantsd xmm30{k7},xmm29,QWORD rdx-0x400,0x7b            }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x27, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vgetmantsd xmm30{k7},xmm29,QWORD rdx-0x408,0x7b            }
+testcase	{ 0x62, 0x03, 0x15, 0x07, 0x27, 0xf4, 0xab                               }, { vgetmantss xmm30{k7},xmm29,xmm28,0xab                        }
+testcase	{ 0x62, 0x03, 0x15, 0x87, 0x27, 0xf4, 0xab                               }, { vgetmantss xmm30{k7}{z},xmm29,xmm28,0xab                     }
+testcase	{ 0x62, 0x03, 0x15, 0x17, 0x27, 0xf4, 0xab                               }, { vgetmantss xmm30{k7},xmm29,xmm28,{sae},0xab                  }
+testcase	{ 0x62, 0x03, 0x15, 0x07, 0x27, 0xf4, 0x7b                               }, { vgetmantss xmm30{k7},xmm29,xmm28,0x7b                        }
+testcase	{ 0x62, 0x03, 0x15, 0x17, 0x27, 0xf4, 0x7b                               }, { vgetmantss xmm30{k7},xmm29,xmm28,{sae},0x7b                  }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x27, 0x31, 0x7b                               }, { vgetmantss xmm30{k7},xmm29,DWORD rcx,0x7b                  }
+testcase	{ 0x62, 0x23, 0x15, 0x07, 0x27, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vgetmantss xmm30{k7},xmm29,DWORD rax+r14*8+0x123,0x7b      }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x27, 0x72, 0x7f, 0x7b                         }, { vgetmantss xmm30{k7},xmm29,DWORD rdx+0x1fc,0x7b            }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x27, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vgetmantss xmm30{k7},xmm29,DWORD rdx+0x200,0x7b            }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x27, 0x72, 0x80, 0x7b                         }, { vgetmantss xmm30{k7},xmm29,DWORD rdx-0x200,0x7b            }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x27, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vgetmantss xmm30{k7},xmm29,DWORD rdx-0x204,0x7b            }
+testcase	{ 0x62, 0x03, 0x15, 0x47, 0x18, 0xf4, 0xab                               }, { vinsertf32x4 zmm30{k7},zmm29,xmm28,0xab                      }
+testcase	{ 0x62, 0x03, 0x15, 0xc7, 0x18, 0xf4, 0xab                               }, { vinsertf32x4 zmm30{k7}{z},zmm29,xmm28,0xab                   }
+testcase	{ 0x62, 0x03, 0x15, 0x47, 0x18, 0xf4, 0x7b                               }, { vinsertf32x4 zmm30{k7},zmm29,xmm28,0x7b                      }
+testcase	{ 0x62, 0x63, 0x15, 0x47, 0x18, 0x31, 0x7b                               }, { vinsertf32x4 zmm30{k7},zmm29,OWORD rcx,0x7b                }
+testcase	{ 0x62, 0x23, 0x15, 0x47, 0x18, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vinsertf32x4 zmm30{k7},zmm29,OWORD rax+r14*8+0x123,0x7b    }
+testcase	{ 0x62, 0x63, 0x15, 0x47, 0x18, 0x72, 0x7f, 0x7b                         }, { vinsertf32x4 zmm30{k7},zmm29,OWORD rdx+0x7f0,0x7b          }
+testcase	{ 0x62, 0x63, 0x15, 0x47, 0x18, 0xb2, 0x00, 0x08, 0x00, 0x00, 0x7b       }, { vinsertf32x4 zmm30{k7},zmm29,OWORD rdx+0x800,0x7b          }
+testcase	{ 0x62, 0x63, 0x15, 0x47, 0x18, 0x72, 0x80, 0x7b                         }, { vinsertf32x4 zmm30{k7},zmm29,OWORD rdx-0x800,0x7b          }
+testcase	{ 0x62, 0x63, 0x15, 0x47, 0x18, 0xb2, 0xf0, 0xf7, 0xff, 0xff, 0x7b       }, { vinsertf32x4 zmm30{k7},zmm29,OWORD rdx-0x810,0x7b          }
+testcase	{ 0x62, 0x03, 0x95, 0x47, 0x1a, 0xf4, 0xab                               }, { vinsertf64x4 zmm30{k7},zmm29,ymm28,0xab                      }
+testcase	{ 0x62, 0x03, 0x95, 0xc7, 0x1a, 0xf4, 0xab                               }, { vinsertf64x4 zmm30{k7}{z},zmm29,ymm28,0xab                   }
+testcase	{ 0x62, 0x03, 0x95, 0x47, 0x1a, 0xf4, 0x7b                               }, { vinsertf64x4 zmm30{k7},zmm29,ymm28,0x7b                      }
+testcase	{ 0x62, 0x63, 0x95, 0x47, 0x1a, 0x31, 0x7b                               }, { vinsertf64x4 zmm30{k7},zmm29,YWORD rcx,0x7b                }
+testcase	{ 0x62, 0x23, 0x95, 0x47, 0x1a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vinsertf64x4 zmm30{k7},zmm29,YWORD rax+r14*8+0x123,0x7b    }
+testcase	{ 0x62, 0x63, 0x95, 0x47, 0x1a, 0x72, 0x7f, 0x7b                         }, { vinsertf64x4 zmm30{k7},zmm29,YWORD rdx+0xfe0,0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x47, 0x1a, 0xb2, 0x00, 0x10, 0x00, 0x00, 0x7b       }, { vinsertf64x4 zmm30{k7},zmm29,YWORD rdx+0x1000,0x7b         }
+testcase	{ 0x62, 0x63, 0x95, 0x47, 0x1a, 0x72, 0x80, 0x7b                         }, { vinsertf64x4 zmm30{k7},zmm29,YWORD rdx-0x1000,0x7b         }
+testcase	{ 0x62, 0x63, 0x95, 0x47, 0x1a, 0xb2, 0xe0, 0xef, 0xff, 0xff, 0x7b       }, { vinsertf64x4 zmm30{k7},zmm29,YWORD rdx-0x1020,0x7b         }
+testcase	{ 0x62, 0x03, 0x15, 0x47, 0x38, 0xf4, 0xab                               }, { vinserti32x4 zmm30{k7},zmm29,xmm28,0xab                      }
+testcase	{ 0x62, 0x03, 0x15, 0xc7, 0x38, 0xf4, 0xab                               }, { vinserti32x4 zmm30{k7}{z},zmm29,xmm28,0xab                   }
+testcase	{ 0x62, 0x03, 0x15, 0x47, 0x38, 0xf4, 0x7b                               }, { vinserti32x4 zmm30{k7},zmm29,xmm28,0x7b                      }
+testcase	{ 0x62, 0x63, 0x15, 0x47, 0x38, 0x31, 0x7b                               }, { vinserti32x4 zmm30{k7},zmm29,OWORD rcx,0x7b                }
+testcase	{ 0x62, 0x23, 0x15, 0x47, 0x38, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vinserti32x4 zmm30{k7},zmm29,OWORD rax+r14*8+0x123,0x7b    }
+testcase	{ 0x62, 0x63, 0x15, 0x47, 0x38, 0x72, 0x7f, 0x7b                         }, { vinserti32x4 zmm30{k7},zmm29,OWORD rdx+0x7f0,0x7b          }
+testcase	{ 0x62, 0x63, 0x15, 0x47, 0x38, 0xb2, 0x00, 0x08, 0x00, 0x00, 0x7b       }, { vinserti32x4 zmm30{k7},zmm29,OWORD rdx+0x800,0x7b          }
+testcase	{ 0x62, 0x63, 0x15, 0x47, 0x38, 0x72, 0x80, 0x7b                         }, { vinserti32x4 zmm30{k7},zmm29,OWORD rdx-0x800,0x7b          }
+testcase	{ 0x62, 0x63, 0x15, 0x47, 0x38, 0xb2, 0xf0, 0xf7, 0xff, 0xff, 0x7b       }, { vinserti32x4 zmm30{k7},zmm29,OWORD rdx-0x810,0x7b          }
+testcase	{ 0x62, 0x03, 0x95, 0x47, 0x3a, 0xf4, 0xab                               }, { vinserti64x4 zmm30{k7},zmm29,ymm28,0xab                      }
+testcase	{ 0x62, 0x03, 0x95, 0xc7, 0x3a, 0xf4, 0xab                               }, { vinserti64x4 zmm30{k7}{z},zmm29,ymm28,0xab                   }
+testcase	{ 0x62, 0x03, 0x95, 0x47, 0x3a, 0xf4, 0x7b                               }, { vinserti64x4 zmm30{k7},zmm29,ymm28,0x7b                      }
+testcase	{ 0x62, 0x63, 0x95, 0x47, 0x3a, 0x31, 0x7b                               }, { vinserti64x4 zmm30{k7},zmm29,YWORD rcx,0x7b                }
+testcase	{ 0x62, 0x23, 0x95, 0x47, 0x3a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vinserti64x4 zmm30{k7},zmm29,YWORD rax+r14*8+0x123,0x7b    }
+testcase	{ 0x62, 0x63, 0x95, 0x47, 0x3a, 0x72, 0x7f, 0x7b                         }, { vinserti64x4 zmm30{k7},zmm29,YWORD rdx+0xfe0,0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x47, 0x3a, 0xb2, 0x00, 0x10, 0x00, 0x00, 0x7b       }, { vinserti64x4 zmm30{k7},zmm29,YWORD rdx+0x1000,0x7b         }
+testcase	{ 0x62, 0x63, 0x95, 0x47, 0x3a, 0x72, 0x80, 0x7b                         }, { vinserti64x4 zmm30{k7},zmm29,YWORD rdx-0x1000,0x7b         }
+testcase	{ 0x62, 0x63, 0x95, 0x47, 0x3a, 0xb2, 0xe0, 0xef, 0xff, 0xff, 0x7b       }, { vinserti64x4 zmm30{k7},zmm29,YWORD rdx-0x1020,0x7b         }
+testcase	{ 0x62, 0x03, 0x15, 0x00, 0x21, 0xf4, 0xab                               }, { vinsertps xmm30,xmm29,xmm28,0xab                             }
+testcase	{ 0x62, 0x03, 0x15, 0x00, 0x21, 0xf4, 0x7b                               }, { vinsertps xmm30,xmm29,xmm28,0x7b                             }
+testcase	{ 0x62, 0x63, 0x15, 0x00, 0x21, 0x31, 0x7b                               }, { vinsertps xmm30,xmm29,DWORD rcx,0x7b                       }
+testcase	{ 0x62, 0x23, 0x15, 0x00, 0x21, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vinsertps xmm30,xmm29,DWORD rax+r14*8+0x123,0x7b           }
+testcase	{ 0x62, 0x63, 0x15, 0x00, 0x21, 0x72, 0x7f, 0x7b                         }, { vinsertps xmm30,xmm29,DWORD rdx+0x1fc,0x7b                 }
+testcase	{ 0x62, 0x63, 0x15, 0x00, 0x21, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vinsertps xmm30,xmm29,DWORD rdx+0x200,0x7b                 }
+testcase	{ 0x62, 0x63, 0x15, 0x00, 0x21, 0x72, 0x80, 0x7b                         }, { vinsertps xmm30,xmm29,DWORD rdx-0x200,0x7b                 }
+testcase	{ 0x62, 0x63, 0x15, 0x00, 0x21, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vinsertps xmm30,xmm29,DWORD rdx-0x204,0x7b                 }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0x5f, 0xf4                                     }, { vmaxpd zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0x5f, 0xf4                                     }, { vmaxpd zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0x5f, 0xf4                                     }, { vmaxpd zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x95, 0x10, 0x5f, 0xf4                                     }, { vmaxpd zmm30,zmm29,zmm28,{sae}                               }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5f, 0x31                                     }, { vmaxpd zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0x5f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmaxpd zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5f, 0x31                                     }, { vmaxpd zmm30,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5f, 0x72, 0x7f                               }, { vmaxpd zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmaxpd zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5f, 0x72, 0x80                               }, { vmaxpd zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmaxpd zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5f, 0x72, 0x7f                               }, { vmaxpd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5f, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmaxpd zmm30,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5f, 0x72, 0x80                               }, { vmaxpd zmm30,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5f, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmaxpd zmm30,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x01, 0x14, 0x40, 0x5f, 0xf4                                     }, { vmaxps zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x14, 0x47, 0x5f, 0xf4                                     }, { vmaxps zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x14, 0xc7, 0x5f, 0xf4                                     }, { vmaxps zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x14, 0x10, 0x5f, 0xf4                                     }, { vmaxps zmm30,zmm29,zmm28,{sae}                               }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5f, 0x31                                     }, { vmaxps zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x14, 0x40, 0x5f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmaxps zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5f, 0x31                                     }, { vmaxps zmm30,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5f, 0x72, 0x7f                               }, { vmaxps zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmaxps zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5f, 0x72, 0x80                               }, { vmaxps zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmaxps zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5f, 0x72, 0x7f                               }, { vmaxps zmm30,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5f, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vmaxps zmm30,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5f, 0x72, 0x80                               }, { vmaxps zmm30,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5f, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vmaxps zmm30,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x01, 0x97, 0x07, 0x5f, 0xf4                                     }, { vmaxsd xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x97, 0x87, 0x5f, 0xf4                                     }, { vmaxsd xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x97, 0x17, 0x5f, 0xf4                                     }, { vmaxsd xmm30{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5f, 0x31                                     }, { vmaxsd xmm30{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x97, 0x07, 0x5f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmaxsd xmm30{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5f, 0x72, 0x7f                               }, { vmaxsd xmm30{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5f, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmaxsd xmm30{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5f, 0x72, 0x80                               }, { vmaxsd xmm30{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5f, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmaxsd xmm30{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x01, 0x16, 0x07, 0x5f, 0xf4                                     }, { vmaxss xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x16, 0x87, 0x5f, 0xf4                                     }, { vmaxss xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x16, 0x17, 0x5f, 0xf4                                     }, { vmaxss xmm30{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5f, 0x31                                     }, { vmaxss xmm30{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x16, 0x07, 0x5f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmaxss xmm30{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5f, 0x72, 0x7f                               }, { vmaxss xmm30{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5f, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vmaxss xmm30{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5f, 0x72, 0x80                               }, { vmaxss xmm30{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5f, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vmaxss xmm30{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0x5d, 0xf4                                     }, { vminpd zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0x5d, 0xf4                                     }, { vminpd zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0x5d, 0xf4                                     }, { vminpd zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x95, 0x10, 0x5d, 0xf4                                     }, { vminpd zmm30,zmm29,zmm28,{sae}                               }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5d, 0x31                                     }, { vminpd zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0x5d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vminpd zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5d, 0x31                                     }, { vminpd zmm30,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5d, 0x72, 0x7f                               }, { vminpd zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5d, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vminpd zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5d, 0x72, 0x80                               }, { vminpd zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5d, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vminpd zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5d, 0x72, 0x7f                               }, { vminpd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5d, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vminpd zmm30,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5d, 0x72, 0x80                               }, { vminpd zmm30,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5d, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vminpd zmm30,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x01, 0x14, 0x40, 0x5d, 0xf4                                     }, { vminps zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x14, 0x47, 0x5d, 0xf4                                     }, { vminps zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x14, 0xc7, 0x5d, 0xf4                                     }, { vminps zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x14, 0x10, 0x5d, 0xf4                                     }, { vminps zmm30,zmm29,zmm28,{sae}                               }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5d, 0x31                                     }, { vminps zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x14, 0x40, 0x5d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vminps zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5d, 0x31                                     }, { vminps zmm30,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5d, 0x72, 0x7f                               }, { vminps zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5d, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vminps zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5d, 0x72, 0x80                               }, { vminps zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5d, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vminps zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5d, 0x72, 0x7f                               }, { vminps zmm30,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5d, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vminps zmm30,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5d, 0x72, 0x80                               }, { vminps zmm30,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5d, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vminps zmm30,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x01, 0x97, 0x07, 0x5d, 0xf4                                     }, { vminsd xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x97, 0x87, 0x5d, 0xf4                                     }, { vminsd xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x97, 0x17, 0x5d, 0xf4                                     }, { vminsd xmm30{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5d, 0x31                                     }, { vminsd xmm30{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x97, 0x07, 0x5d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vminsd xmm30{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5d, 0x72, 0x7f                               }, { vminsd xmm30{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5d, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vminsd xmm30{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5d, 0x72, 0x80                               }, { vminsd xmm30{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5d, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vminsd xmm30{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x01, 0x16, 0x07, 0x5d, 0xf4                                     }, { vminss xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x16, 0x87, 0x5d, 0xf4                                     }, { vminss xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x16, 0x17, 0x5d, 0xf4                                     }, { vminss xmm30{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5d, 0x31                                     }, { vminss xmm30{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x16, 0x07, 0x5d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vminss xmm30{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5d, 0x72, 0x7f                               }, { vminss xmm30{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5d, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vminss xmm30{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5d, 0x72, 0x80                               }, { vminss xmm30{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5d, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vminss xmm30{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x01, 0xfd, 0x48, 0x28, 0xf5                                     }, { vmovapd zmm30,zmm29                                          }
+testcase	{ 0x62, 0x01, 0xfd, 0x4f, 0x28, 0xf5                                     }, { vmovapd zmm30{k7},zmm29                                      }
+testcase	{ 0x62, 0x01, 0xfd, 0xcf, 0x28, 0xf5                                     }, { vmovapd zmm30{k7}{z},zmm29                                   }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x28, 0x31                                     }, { vmovapd zmm30,ZWORD rcx                                    }
+testcase	{ 0x62, 0x21, 0xfd, 0x48, 0x28, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovapd zmm30,ZWORD rax+r14*8+0x123                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x28, 0x72, 0x7f                               }, { vmovapd zmm30,ZWORD rdx+0x1fc0                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x28, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovapd zmm30,ZWORD rdx+0x2000                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x28, 0x72, 0x80                               }, { vmovapd zmm30,ZWORD rdx-0x2000                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x28, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovapd zmm30,ZWORD rdx-0x2040                             }
+testcase	{ 0x62, 0x01, 0x7c, 0x48, 0x28, 0xf5                                     }, { vmovaps zmm30,zmm29                                          }
+testcase	{ 0x62, 0x01, 0x7c, 0x4f, 0x28, 0xf5                                     }, { vmovaps zmm30{k7},zmm29                                      }
+testcase	{ 0x62, 0x01, 0x7c, 0xcf, 0x28, 0xf5                                     }, { vmovaps zmm30{k7}{z},zmm29                                   }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x28, 0x31                                     }, { vmovaps zmm30,ZWORD rcx                                    }
+testcase	{ 0x62, 0x21, 0x7c, 0x48, 0x28, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovaps zmm30,ZWORD rax+r14*8+0x123                        }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x28, 0x72, 0x7f                               }, { vmovaps zmm30,ZWORD rdx+0x1fc0                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x28, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovaps zmm30,ZWORD rdx+0x2000                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x28, 0x72, 0x80                               }, { vmovaps zmm30,ZWORD rdx-0x2000                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x28, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovaps zmm30,ZWORD rdx-0x2040                             }
+testcase	{ 0x62, 0x61, 0x7d, 0x08, 0x6e, 0xf0                                     }, { vmovd  xmm30,eax                                             }
+testcase	{ 0x62, 0x61, 0x7d, 0x08, 0x6e, 0xf5                                     }, { vmovd  xmm30,ebp                                             }
+testcase	{ 0x62, 0x41, 0x7d, 0x08, 0x6e, 0xf5                                     }, { vmovd  xmm30,r13d                                            }
+testcase	{ 0x62, 0x61, 0x7d, 0x08, 0x6e, 0x31                                     }, { vmovd  xmm30,DWORD rcx                                     }
+testcase	{ 0x62, 0x21, 0x7d, 0x08, 0x6e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovd  xmm30,DWORD rax+r14*8+0x123                         }
+testcase	{ 0x62, 0x61, 0x7d, 0x08, 0x6e, 0x72, 0x7f                               }, { vmovd  xmm30,DWORD rdx+0x1fc                               }
+testcase	{ 0x62, 0x61, 0x7d, 0x08, 0x6e, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vmovd  xmm30,DWORD rdx+0x200                               }
+testcase	{ 0x62, 0x61, 0x7d, 0x08, 0x6e, 0x72, 0x80                               }, { vmovd  xmm30,DWORD rdx-0x200                               }
+testcase	{ 0x62, 0x61, 0x7d, 0x08, 0x6e, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vmovd  xmm30,DWORD rdx-0x204                               }
+testcase	{ 0x62, 0x61, 0x7d, 0x08, 0x7e, 0x31                                     }, { vmovd  DWORD rcx,xmm30                                     }
+testcase	{ 0x62, 0x21, 0x7d, 0x08, 0x7e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovd  DWORD rax+r14*8+0x123,xmm30                         }
+testcase	{ 0x62, 0x61, 0x7d, 0x08, 0x7e, 0x72, 0x7f                               }, { vmovd  DWORD rdx+0x1fc,xmm30                               }
+testcase	{ 0x62, 0x61, 0x7d, 0x08, 0x7e, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vmovd  DWORD rdx+0x200,xmm30                               }
+testcase	{ 0x62, 0x61, 0x7d, 0x08, 0x7e, 0x72, 0x80                               }, { vmovd  DWORD rdx-0x200,xmm30                               }
+testcase	{ 0x62, 0x61, 0x7d, 0x08, 0x7e, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vmovd  DWORD rdx-0x204,xmm30                               }
+testcase	{ 0x62, 0x01, 0xff, 0x48, 0x12, 0xf5                                     }, { vmovddup zmm30,zmm29                                         }
+testcase	{ 0x62, 0x01, 0xff, 0x4f, 0x12, 0xf5                                     }, { vmovddup zmm30{k7},zmm29                                     }
+testcase	{ 0x62, 0x01, 0xff, 0xcf, 0x12, 0xf5                                     }, { vmovddup zmm30{k7}{z},zmm29                                  }
+testcase	{ 0x62, 0x61, 0xff, 0x48, 0x12, 0x31                                     }, { vmovddup zmm30,ZWORD rcx                                   }
+testcase	{ 0x62, 0x21, 0xff, 0x48, 0x12, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovddup zmm30,ZWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0x61, 0xff, 0x48, 0x12, 0x72, 0x7f                               }, { vmovddup zmm30,ZWORD rdx+0x1fc0                            }
+testcase	{ 0x62, 0x61, 0xff, 0x48, 0x12, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovddup zmm30,ZWORD rdx+0x2000                            }
+testcase	{ 0x62, 0x61, 0xff, 0x48, 0x12, 0x72, 0x80                               }, { vmovddup zmm30,ZWORD rdx-0x2000                            }
+testcase	{ 0x62, 0x61, 0xff, 0x48, 0x12, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovddup zmm30,ZWORD rdx-0x2040                            }
+testcase	{ 0x62, 0x01, 0x7d, 0x48, 0x6f, 0xf5                                     }, { vmovdqa32 zmm30,zmm29                                        }
+testcase	{ 0x62, 0x01, 0x7d, 0x4f, 0x6f, 0xf5                                     }, { vmovdqa32 zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x01, 0x7d, 0xcf, 0x6f, 0xf5                                     }, { vmovdqa32 zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x6f, 0x31                                     }, { vmovdqa32 zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x21, 0x7d, 0x48, 0x6f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovdqa32 zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x6f, 0x72, 0x7f                               }, { vmovdqa32 zmm30,ZWORD rdx+0x1fc0                           }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x6f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovdqa32 zmm30,ZWORD rdx+0x2000                           }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x6f, 0x72, 0x80                               }, { vmovdqa32 zmm30,ZWORD rdx-0x2000                           }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x6f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovdqa32 zmm30,ZWORD rdx-0x2040                           }
+testcase	{ 0x62, 0x01, 0xfd, 0x48, 0x6f, 0xf5                                     }, { vmovdqa64 zmm30,zmm29                                        }
+testcase	{ 0x62, 0x01, 0xfd, 0x4f, 0x6f, 0xf5                                     }, { vmovdqa64 zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x01, 0xfd, 0xcf, 0x6f, 0xf5                                     }, { vmovdqa64 zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x6f, 0x31                                     }, { vmovdqa64 zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x21, 0xfd, 0x48, 0x6f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovdqa64 zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x6f, 0x72, 0x7f                               }, { vmovdqa64 zmm30,ZWORD rdx+0x1fc0                           }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x6f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovdqa64 zmm30,ZWORD rdx+0x2000                           }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x6f, 0x72, 0x80                               }, { vmovdqa64 zmm30,ZWORD rdx-0x2000                           }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x6f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovdqa64 zmm30,ZWORD rdx-0x2040                           }
+testcase	{ 0x62, 0x01, 0x7e, 0x48, 0x6f, 0xf5                                     }, { vmovdqu32 zmm30,zmm29                                        }
+testcase	{ 0x62, 0x01, 0x7e, 0x4f, 0x6f, 0xf5                                     }, { vmovdqu32 zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x01, 0x7e, 0xcf, 0x6f, 0xf5                                     }, { vmovdqu32 zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x6f, 0x31                                     }, { vmovdqu32 zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x21, 0x7e, 0x48, 0x6f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovdqu32 zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x6f, 0x72, 0x7f                               }, { vmovdqu32 zmm30,ZWORD rdx+0x1fc0                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x6f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovdqu32 zmm30,ZWORD rdx+0x2000                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x6f, 0x72, 0x80                               }, { vmovdqu32 zmm30,ZWORD rdx-0x2000                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x6f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovdqu32 zmm30,ZWORD rdx-0x2040                           }
+testcase	{ 0x62, 0x01, 0xfe, 0x48, 0x6f, 0xf5                                     }, { vmovdqu64 zmm30,zmm29                                        }
+testcase	{ 0x62, 0x01, 0xfe, 0x4f, 0x6f, 0xf5                                     }, { vmovdqu64 zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x01, 0xfe, 0xcf, 0x6f, 0xf5                                     }, { vmovdqu64 zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x61, 0xfe, 0x48, 0x6f, 0x31                                     }, { vmovdqu64 zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x21, 0xfe, 0x48, 0x6f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovdqu64 zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x61, 0xfe, 0x48, 0x6f, 0x72, 0x7f                               }, { vmovdqu64 zmm30,ZWORD rdx+0x1fc0                           }
+testcase	{ 0x62, 0x61, 0xfe, 0x48, 0x6f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovdqu64 zmm30,ZWORD rdx+0x2000                           }
+testcase	{ 0x62, 0x61, 0xfe, 0x48, 0x6f, 0x72, 0x80                               }, { vmovdqu64 zmm30,ZWORD rdx-0x2000                           }
+testcase	{ 0x62, 0x61, 0xfe, 0x48, 0x6f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovdqu64 zmm30,ZWORD rdx-0x2040                           }
+testcase	{ 0x62, 0x01, 0x14, 0x00, 0x12, 0xf4                                     }, { vmovhlps xmm30,xmm29,xmm28                                   }
+testcase	{ 0x62, 0x61, 0x8d, 0x00, 0x16, 0x29                                     }, { vmovhpd xmm29,xmm30,QWORD rcx                              }
+testcase	{ 0x62, 0x21, 0x8d, 0x00, 0x16, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovhpd xmm29,xmm30,QWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x61, 0x8d, 0x00, 0x16, 0x6a, 0x7f                               }, { vmovhpd xmm29,xmm30,QWORD rdx+0x3f8                        }
+testcase	{ 0x62, 0x61, 0x8d, 0x00, 0x16, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vmovhpd xmm29,xmm30,QWORD rdx+0x400                        }
+testcase	{ 0x62, 0x61, 0x8d, 0x00, 0x16, 0x6a, 0x80                               }, { vmovhpd xmm29,xmm30,QWORD rdx-0x400                        }
+testcase	{ 0x62, 0x61, 0x8d, 0x00, 0x16, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vmovhpd xmm29,xmm30,QWORD rdx-0x408                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x17, 0x31                                     }, { vmovhpd QWORD rcx,xmm30                                    }
+testcase	{ 0x62, 0x21, 0xfd, 0x08, 0x17, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovhpd QWORD rax+r14*8+0x123,xmm30                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x17, 0x72, 0x7f                               }, { vmovhpd QWORD rdx+0x3f8,xmm30                              }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x17, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmovhpd QWORD rdx+0x400,xmm30                              }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x17, 0x72, 0x80                               }, { vmovhpd QWORD rdx-0x400,xmm30                              }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x17, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmovhpd QWORD rdx-0x408,xmm30                              }
+testcase	{ 0x62, 0x61, 0x0c, 0x00, 0x16, 0x29                                     }, { vmovhps xmm29,xmm30,QWORD rcx                              }
+testcase	{ 0x62, 0x21, 0x0c, 0x00, 0x16, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovhps xmm29,xmm30,QWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x61, 0x0c, 0x00, 0x16, 0x6a, 0x7f                               }, { vmovhps xmm29,xmm30,QWORD rdx+0x3f8                        }
+testcase	{ 0x62, 0x61, 0x0c, 0x00, 0x16, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vmovhps xmm29,xmm30,QWORD rdx+0x400                        }
+testcase	{ 0x62, 0x61, 0x0c, 0x00, 0x16, 0x6a, 0x80                               }, { vmovhps xmm29,xmm30,QWORD rdx-0x400                        }
+testcase	{ 0x62, 0x61, 0x0c, 0x00, 0x16, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vmovhps xmm29,xmm30,QWORD rdx-0x408                        }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x17, 0x31                                     }, { vmovhps QWORD rcx,xmm30                                    }
+testcase	{ 0x62, 0x21, 0x7c, 0x08, 0x17, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovhps QWORD rax+r14*8+0x123,xmm30                        }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x17, 0x72, 0x7f                               }, { vmovhps QWORD rdx+0x3f8,xmm30                              }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x17, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmovhps QWORD rdx+0x400,xmm30                              }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x17, 0x72, 0x80                               }, { vmovhps QWORD rdx-0x400,xmm30                              }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x17, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmovhps QWORD rdx-0x408,xmm30                              }
+testcase	{ 0x62, 0x01, 0x14, 0x00, 0x16, 0xf4                                     }, { vmovlhps xmm30,xmm29,xmm28                                   }
+testcase	{ 0x62, 0x61, 0x8d, 0x00, 0x12, 0x29                                     }, { vmovlpd xmm29,xmm30,QWORD rcx                              }
+testcase	{ 0x62, 0x21, 0x8d, 0x00, 0x12, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovlpd xmm29,xmm30,QWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x61, 0x8d, 0x00, 0x12, 0x6a, 0x7f                               }, { vmovlpd xmm29,xmm30,QWORD rdx+0x3f8                        }
+testcase	{ 0x62, 0x61, 0x8d, 0x00, 0x12, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vmovlpd xmm29,xmm30,QWORD rdx+0x400                        }
+testcase	{ 0x62, 0x61, 0x8d, 0x00, 0x12, 0x6a, 0x80                               }, { vmovlpd xmm29,xmm30,QWORD rdx-0x400                        }
+testcase	{ 0x62, 0x61, 0x8d, 0x00, 0x12, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vmovlpd xmm29,xmm30,QWORD rdx-0x408                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x13, 0x31                                     }, { vmovlpd QWORD rcx,xmm30                                    }
+testcase	{ 0x62, 0x21, 0xfd, 0x08, 0x13, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovlpd QWORD rax+r14*8+0x123,xmm30                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x13, 0x72, 0x7f                               }, { vmovlpd QWORD rdx+0x3f8,xmm30                              }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x13, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmovlpd QWORD rdx+0x400,xmm30                              }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x13, 0x72, 0x80                               }, { vmovlpd QWORD rdx-0x400,xmm30                              }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x13, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmovlpd QWORD rdx-0x408,xmm30                              }
+testcase	{ 0x62, 0x61, 0x0c, 0x00, 0x12, 0x29                                     }, { vmovlps xmm29,xmm30,QWORD rcx                              }
+testcase	{ 0x62, 0x21, 0x0c, 0x00, 0x12, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovlps xmm29,xmm30,QWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x61, 0x0c, 0x00, 0x12, 0x6a, 0x7f                               }, { vmovlps xmm29,xmm30,QWORD rdx+0x3f8                        }
+testcase	{ 0x62, 0x61, 0x0c, 0x00, 0x12, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vmovlps xmm29,xmm30,QWORD rdx+0x400                        }
+testcase	{ 0x62, 0x61, 0x0c, 0x00, 0x12, 0x6a, 0x80                               }, { vmovlps xmm29,xmm30,QWORD rdx-0x400                        }
+testcase	{ 0x62, 0x61, 0x0c, 0x00, 0x12, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vmovlps xmm29,xmm30,QWORD rdx-0x408                        }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x13, 0x31                                     }, { vmovlps QWORD rcx,xmm30                                    }
+testcase	{ 0x62, 0x21, 0x7c, 0x08, 0x13, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovlps QWORD rax+r14*8+0x123,xmm30                        }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x13, 0x72, 0x7f                               }, { vmovlps QWORD rdx+0x3f8,xmm30                              }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x13, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmovlps QWORD rdx+0x400,xmm30                              }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x13, 0x72, 0x80                               }, { vmovlps QWORD rdx-0x400,xmm30                              }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x13, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmovlps QWORD rdx-0x408,xmm30                              }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0xe7, 0x31                                     }, { vmovntdq ZWORD rcx,zmm30                                   }
+testcase	{ 0x62, 0x21, 0x7d, 0x48, 0xe7, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovntdq ZWORD rax+r14*8+0x123,zmm30                       }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0xe7, 0x72, 0x7f                               }, { vmovntdq ZWORD rdx+0x1fc0,zmm30                            }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0xe7, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovntdq ZWORD rdx+0x2000,zmm30                            }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0xe7, 0x72, 0x80                               }, { vmovntdq ZWORD rdx-0x2000,zmm30                            }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0xe7, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovntdq ZWORD rdx-0x2040,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x2a, 0x31                                     }, { vmovntdqa zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x2a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovntdqa zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x2a, 0x72, 0x7f                               }, { vmovntdqa zmm30,ZWORD rdx+0x1fc0                           }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x2a, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovntdqa zmm30,ZWORD rdx+0x2000                           }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x2a, 0x72, 0x80                               }, { vmovntdqa zmm30,ZWORD rdx-0x2000                           }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x2a, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovntdqa zmm30,ZWORD rdx-0x2040                           }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x2b, 0x31                                     }, { vmovntpd ZWORD rcx,zmm30                                   }
+testcase	{ 0x62, 0x21, 0xfd, 0x48, 0x2b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovntpd ZWORD rax+r14*8+0x123,zmm30                       }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x2b, 0x72, 0x7f                               }, { vmovntpd ZWORD rdx+0x1fc0,zmm30                            }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x2b, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovntpd ZWORD rdx+0x2000,zmm30                            }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x2b, 0x72, 0x80                               }, { vmovntpd ZWORD rdx-0x2000,zmm30                            }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x2b, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovntpd ZWORD rdx-0x2040,zmm30                            }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x2b, 0x31                                     }, { vmovntps ZWORD rcx,zmm30                                   }
+testcase	{ 0x62, 0x21, 0x7c, 0x48, 0x2b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovntps ZWORD rax+r14*8+0x123,zmm30                       }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x2b, 0x72, 0x7f                               }, { vmovntps ZWORD rdx+0x1fc0,zmm30                            }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x2b, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovntps ZWORD rdx+0x2000,zmm30                            }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x2b, 0x72, 0x80                               }, { vmovntps ZWORD rdx-0x2000,zmm30                            }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x2b, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovntps ZWORD rdx-0x2040,zmm30                            }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x6e, 0xf0                                     }, { vmovq  xmm30,rax                                             }
+testcase	{ 0x62, 0x41, 0xfd, 0x08, 0x6e, 0xf0                                     }, { vmovq  xmm30,r8                                              }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x6e, 0x31                                     }, { vmovq  xmm30,QWORD rcx                                     }
+testcase	{ 0x62, 0x21, 0xfd, 0x08, 0x6e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovq  xmm30,QWORD rax+r14*8+0x123                         }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x6e, 0x72, 0x7f                               }, { vmovq  xmm30,QWORD rdx+0x3f8                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x6e, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmovq  xmm30,QWORD rdx+0x400                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x6e, 0x72, 0x80                               }, { vmovq  xmm30,QWORD rdx-0x400                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x6e, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmovq  xmm30,QWORD rdx-0x408                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x7e, 0x31                                     }, { vmovq  QWORD rcx,xmm30                                     }
+testcase	{ 0x62, 0x21, 0xfd, 0x08, 0x7e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovq  QWORD rax+r14*8+0x123,xmm30                         }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x7e, 0x72, 0x7f                               }, { vmovq  QWORD rdx+0x3f8,xmm30                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x7e, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmovq  QWORD rdx+0x400,xmm30                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x7e, 0x72, 0x80                               }, { vmovq  QWORD rdx-0x400,xmm30                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x7e, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmovq  QWORD rdx-0x408,xmm30                               }
+testcase	{ 0x62, 0x01, 0xfe, 0x08, 0x7e, 0xf5                                     }, { vmovq  xmm30,xmm29                                           }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x6e, 0x31                                     }, { vmovq  xmm30,QWORD rcx                                     }
+testcase	{ 0x62, 0x21, 0xfd, 0x08, 0x6e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovq  xmm30,QWORD rax+r14*8+0x123                         }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x6e, 0x72, 0x7f                               }, { vmovq  xmm30,QWORD rdx+0x3f8                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x6e, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmovq  xmm30,QWORD rdx+0x400                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x6e, 0x72, 0x80                               }, { vmovq  xmm30,QWORD rdx-0x400                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x6e, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmovq  xmm30,QWORD rdx-0x408                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x7e, 0x29                                     }, { vmovq  QWORD rcx,xmm29                                     }
+testcase	{ 0x62, 0x21, 0xfd, 0x08, 0x7e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovq  QWORD rax+r14*8+0x123,xmm29                         }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x7e, 0x6a, 0x7f                               }, { vmovq  QWORD rdx+0x3f8,xmm29                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x7e, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vmovq  QWORD rdx+0x400,xmm29                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x7e, 0x6a, 0x80                               }, { vmovq  QWORD rdx-0x400,xmm29                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x7e, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vmovq  QWORD rdx-0x408,xmm29                               }
+testcase	{ 0x62, 0x61, 0xff, 0x0f, 0x10, 0x31                                     }, { vmovsd xmm30{k7},QWORD rcx                                 }
+testcase	{ 0x62, 0x61, 0xff, 0x8f, 0x10, 0x31                                     }, { vmovsd xmm30{k7}{z},QWORD rcx                              }
+testcase	{ 0x62, 0x21, 0xff, 0x0f, 0x10, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovsd xmm30{k7},QWORD rax+r14*8+0x123                     }
+testcase	{ 0x62, 0x61, 0xff, 0x0f, 0x10, 0x72, 0x7f                               }, { vmovsd xmm30{k7},QWORD rdx+0x3f8                           }
+testcase	{ 0x62, 0x61, 0xff, 0x0f, 0x10, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmovsd xmm30{k7},QWORD rdx+0x400                           }
+testcase	{ 0x62, 0x61, 0xff, 0x0f, 0x10, 0x72, 0x80                               }, { vmovsd xmm30{k7},QWORD rdx-0x400                           }
+testcase	{ 0x62, 0x61, 0xff, 0x0f, 0x10, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmovsd xmm30{k7},QWORD rdx-0x408                           }
+testcase	{ 0x62, 0x61, 0xff, 0x0f, 0x11, 0x31                                     }, { vmovsd QWORD rcx{k7},xmm30                                 }
+testcase	{ 0x62, 0x21, 0xff, 0x0f, 0x11, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovsd QWORD rax+r14*8+0x123{k7},xmm30                     }
+testcase	{ 0x62, 0x61, 0xff, 0x0f, 0x11, 0x72, 0x7f                               }, { vmovsd QWORD rdx+0x3f8{k7},xmm30                           }
+testcase	{ 0x62, 0x61, 0xff, 0x0f, 0x11, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmovsd QWORD rdx+0x400{k7},xmm30                           }
+testcase	{ 0x62, 0x61, 0xff, 0x0f, 0x11, 0x72, 0x80                               }, { vmovsd QWORD rdx-0x400{k7},xmm30                           }
+testcase	{ 0x62, 0x61, 0xff, 0x0f, 0x11, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmovsd QWORD rdx-0x408{k7},xmm30                           }
+testcase	{ 0x62, 0x01, 0x97, 0x07, 0x10, 0xf4                                     }, { vmovsd xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x97, 0x87, 0x10, 0xf4                                     }, { vmovsd xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x7e, 0x48, 0x16, 0xf5                                     }, { vmovshdup zmm30,zmm29                                        }
+testcase	{ 0x62, 0x01, 0x7e, 0x4f, 0x16, 0xf5                                     }, { vmovshdup zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x01, 0x7e, 0xcf, 0x16, 0xf5                                     }, { vmovshdup zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x16, 0x31                                     }, { vmovshdup zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x21, 0x7e, 0x48, 0x16, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovshdup zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x16, 0x72, 0x7f                               }, { vmovshdup zmm30,ZWORD rdx+0x1fc0                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x16, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovshdup zmm30,ZWORD rdx+0x2000                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x16, 0x72, 0x80                               }, { vmovshdup zmm30,ZWORD rdx-0x2000                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x16, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovshdup zmm30,ZWORD rdx-0x2040                           }
+testcase	{ 0x62, 0x01, 0x7e, 0x48, 0x12, 0xf5                                     }, { vmovsldup zmm30,zmm29                                        }
+testcase	{ 0x62, 0x01, 0x7e, 0x4f, 0x12, 0xf5                                     }, { vmovsldup zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x01, 0x7e, 0xcf, 0x12, 0xf5                                     }, { vmovsldup zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x12, 0x31                                     }, { vmovsldup zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x21, 0x7e, 0x48, 0x12, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovsldup zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x12, 0x72, 0x7f                               }, { vmovsldup zmm30,ZWORD rdx+0x1fc0                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x12, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovsldup zmm30,ZWORD rdx+0x2000                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x12, 0x72, 0x80                               }, { vmovsldup zmm30,ZWORD rdx-0x2000                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x12, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovsldup zmm30,ZWORD rdx-0x2040                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x0f, 0x10, 0x31                                     }, { vmovss xmm30{k7},DWORD rcx                                 }
+testcase	{ 0x62, 0x61, 0x7e, 0x8f, 0x10, 0x31                                     }, { vmovss xmm30{k7}{z},DWORD rcx                              }
+testcase	{ 0x62, 0x21, 0x7e, 0x0f, 0x10, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovss xmm30{k7},DWORD rax+r14*8+0x123                     }
+testcase	{ 0x62, 0x61, 0x7e, 0x0f, 0x10, 0x72, 0x7f                               }, { vmovss xmm30{k7},DWORD rdx+0x1fc                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x0f, 0x10, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vmovss xmm30{k7},DWORD rdx+0x200                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x0f, 0x10, 0x72, 0x80                               }, { vmovss xmm30{k7},DWORD rdx-0x200                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x0f, 0x10, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vmovss xmm30{k7},DWORD rdx-0x204                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x0f, 0x11, 0x31                                     }, { vmovss DWORD rcx{k7},xmm30                                 }
+testcase	{ 0x62, 0x21, 0x7e, 0x0f, 0x11, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovss DWORD rax+r14*8+0x123{k7},xmm30                     }
+testcase	{ 0x62, 0x61, 0x7e, 0x0f, 0x11, 0x72, 0x7f                               }, { vmovss DWORD rdx+0x1fc{k7},xmm30                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x0f, 0x11, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vmovss DWORD rdx+0x200{k7},xmm30                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x0f, 0x11, 0x72, 0x80                               }, { vmovss DWORD rdx-0x200{k7},xmm30                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x0f, 0x11, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vmovss DWORD rdx-0x204{k7},xmm30                           }
+testcase	{ 0x62, 0x01, 0x16, 0x07, 0x10, 0xf4                                     }, { vmovss xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x16, 0x87, 0x10, 0xf4                                     }, { vmovss xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0xfd, 0x48, 0x10, 0xf5                                     }, { vmovupd zmm30,zmm29                                          }
+testcase	{ 0x62, 0x01, 0xfd, 0x4f, 0x10, 0xf5                                     }, { vmovupd zmm30{k7},zmm29                                      }
+testcase	{ 0x62, 0x01, 0xfd, 0xcf, 0x10, 0xf5                                     }, { vmovupd zmm30{k7}{z},zmm29                                   }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x10, 0x31                                     }, { vmovupd zmm30,ZWORD rcx                                    }
+testcase	{ 0x62, 0x21, 0xfd, 0x48, 0x10, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovupd zmm30,ZWORD rax+r14*8+0x123                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x10, 0x72, 0x7f                               }, { vmovupd zmm30,ZWORD rdx+0x1fc0                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x10, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovupd zmm30,ZWORD rdx+0x2000                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x10, 0x72, 0x80                               }, { vmovupd zmm30,ZWORD rdx-0x2000                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x10, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovupd zmm30,ZWORD rdx-0x2040                             }
+testcase	{ 0x62, 0x01, 0x7c, 0x48, 0x10, 0xf5                                     }, { vmovups zmm30,zmm29                                          }
+testcase	{ 0x62, 0x01, 0x7c, 0x4f, 0x10, 0xf5                                     }, { vmovups zmm30{k7},zmm29                                      }
+testcase	{ 0x62, 0x01, 0x7c, 0xcf, 0x10, 0xf5                                     }, { vmovups zmm30{k7}{z},zmm29                                   }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x10, 0x31                                     }, { vmovups zmm30,ZWORD rcx                                    }
+testcase	{ 0x62, 0x21, 0x7c, 0x48, 0x10, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovups zmm30,ZWORD rax+r14*8+0x123                        }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x10, 0x72, 0x7f                               }, { vmovups zmm30,ZWORD rdx+0x1fc0                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x10, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovups zmm30,ZWORD rdx+0x2000                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x10, 0x72, 0x80                               }, { vmovups zmm30,ZWORD rdx-0x2000                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x10, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovups zmm30,ZWORD rdx-0x2040                             }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0x59, 0xf4                                     }, { vmulpd zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0x59, 0xf4                                     }, { vmulpd zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0x59, 0xf4                                     }, { vmulpd zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x95, 0x10, 0x59, 0xf4                                     }, { vmulpd zmm30,zmm29,zmm28,{rn-sae}                            }
+testcase	{ 0x62, 0x01, 0x95, 0x50, 0x59, 0xf4                                     }, { vmulpd zmm30,zmm29,zmm28,{ru-sae}                            }
+testcase	{ 0x62, 0x01, 0x95, 0x30, 0x59, 0xf4                                     }, { vmulpd zmm30,zmm29,zmm28,{rd-sae}                            }
+testcase	{ 0x62, 0x01, 0x95, 0x70, 0x59, 0xf4                                     }, { vmulpd zmm30,zmm29,zmm28,{rz-sae}                            }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x59, 0x31                                     }, { vmulpd zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0x59, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmulpd zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x59, 0x31                                     }, { vmulpd zmm30,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x59, 0x72, 0x7f                               }, { vmulpd zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x59, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmulpd zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x59, 0x72, 0x80                               }, { vmulpd zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x59, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmulpd zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x59, 0x72, 0x7f                               }, { vmulpd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x59, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmulpd zmm30,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x59, 0x72, 0x80                               }, { vmulpd zmm30,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x59, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmulpd zmm30,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x01, 0x14, 0x40, 0x59, 0xf4                                     }, { vmulps zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x14, 0x47, 0x59, 0xf4                                     }, { vmulps zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x14, 0xc7, 0x59, 0xf4                                     }, { vmulps zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x14, 0x10, 0x59, 0xf4                                     }, { vmulps zmm30,zmm29,zmm28,{rn-sae}                            }
+testcase	{ 0x62, 0x01, 0x14, 0x50, 0x59, 0xf4                                     }, { vmulps zmm30,zmm29,zmm28,{ru-sae}                            }
+testcase	{ 0x62, 0x01, 0x14, 0x30, 0x59, 0xf4                                     }, { vmulps zmm30,zmm29,zmm28,{rd-sae}                            }
+testcase	{ 0x62, 0x01, 0x14, 0x70, 0x59, 0xf4                                     }, { vmulps zmm30,zmm29,zmm28,{rz-sae}                            }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x59, 0x31                                     }, { vmulps zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x14, 0x40, 0x59, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmulps zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x59, 0x31                                     }, { vmulps zmm30,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x59, 0x72, 0x7f                               }, { vmulps zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x59, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmulps zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x59, 0x72, 0x80                               }, { vmulps zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x59, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmulps zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x59, 0x72, 0x7f                               }, { vmulps zmm30,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x59, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vmulps zmm30,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x59, 0x72, 0x80                               }, { vmulps zmm30,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x59, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vmulps zmm30,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x01, 0x97, 0x07, 0x59, 0xf4                                     }, { vmulsd xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x97, 0x87, 0x59, 0xf4                                     }, { vmulsd xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x97, 0x17, 0x59, 0xf4                                     }, { vmulsd xmm30{k7},xmm29,xmm28,{rn-sae}                        }
+testcase	{ 0x62, 0x01, 0x97, 0x57, 0x59, 0xf4                                     }, { vmulsd xmm30{k7},xmm29,xmm28,{ru-sae}                        }
+testcase	{ 0x62, 0x01, 0x97, 0x37, 0x59, 0xf4                                     }, { vmulsd xmm30{k7},xmm29,xmm28,{rd-sae}                        }
+testcase	{ 0x62, 0x01, 0x97, 0x77, 0x59, 0xf4                                     }, { vmulsd xmm30{k7},xmm29,xmm28,{rz-sae}                        }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x59, 0x31                                     }, { vmulsd xmm30{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x97, 0x07, 0x59, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmulsd xmm30{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x59, 0x72, 0x7f                               }, { vmulsd xmm30{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x59, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmulsd xmm30{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x59, 0x72, 0x80                               }, { vmulsd xmm30{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x59, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmulsd xmm30{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x01, 0x16, 0x07, 0x59, 0xf4                                     }, { vmulss xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x16, 0x87, 0x59, 0xf4                                     }, { vmulss xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x16, 0x17, 0x59, 0xf4                                     }, { vmulss xmm30{k7},xmm29,xmm28,{rn-sae}                        }
+testcase	{ 0x62, 0x01, 0x16, 0x57, 0x59, 0xf4                                     }, { vmulss xmm30{k7},xmm29,xmm28,{ru-sae}                        }
+testcase	{ 0x62, 0x01, 0x16, 0x37, 0x59, 0xf4                                     }, { vmulss xmm30{k7},xmm29,xmm28,{rd-sae}                        }
+testcase	{ 0x62, 0x01, 0x16, 0x77, 0x59, 0xf4                                     }, { vmulss xmm30{k7},xmm29,xmm28,{rz-sae}                        }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x59, 0x31                                     }, { vmulss xmm30{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x16, 0x07, 0x59, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmulss xmm30{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x59, 0x72, 0x7f                               }, { vmulss xmm30{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x59, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vmulss xmm30{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x59, 0x72, 0x80                               }, { vmulss xmm30{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x59, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vmulss xmm30{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0x1e, 0xf5                                     }, { vpabsd zmm30,zmm29                                           }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x1e, 0xf5                                     }, { vpabsd zmm30{k7},zmm29                                       }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x1e, 0xf5                                     }, { vpabsd zmm30{k7}{z},zmm29                                    }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x1e, 0x31                                     }, { vpabsd zmm30,ZWORD rcx                                     }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x1e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpabsd zmm30,ZWORD rax+r14*8+0x123                         }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x1e, 0x31                                     }, { vpabsd zmm30,DWORD rcx{1to16}                              }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x1e, 0x72, 0x7f                               }, { vpabsd zmm30,ZWORD rdx+0x1fc0                              }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x1e, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpabsd zmm30,ZWORD rdx+0x2000                              }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x1e, 0x72, 0x80                               }, { vpabsd zmm30,ZWORD rdx-0x2000                              }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x1e, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpabsd zmm30,ZWORD rdx-0x2040                              }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x1e, 0x72, 0x7f                               }, { vpabsd zmm30,DWORD rdx+0x1fc{1to16}                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x1e, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpabsd zmm30,DWORD rdx+0x200{1to16}                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x1e, 0x72, 0x80                               }, { vpabsd zmm30,DWORD rdx-0x200{1to16}                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x1e, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpabsd zmm30,DWORD rdx-0x204{1to16}                        }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0x1f, 0xf5                                     }, { vpabsq zmm30,zmm29                                           }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0x1f, 0xf5                                     }, { vpabsq zmm30{k7},zmm29                                       }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0x1f, 0xf5                                     }, { vpabsq zmm30{k7}{z},zmm29                                    }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x1f, 0x31                                     }, { vpabsq zmm30,ZWORD rcx                                     }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x1f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpabsq zmm30,ZWORD rax+r14*8+0x123                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x1f, 0x31                                     }, { vpabsq zmm30,QWORD rcx{1to8}                               }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x1f, 0x72, 0x7f                               }, { vpabsq zmm30,ZWORD rdx+0x1fc0                              }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x1f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpabsq zmm30,ZWORD rdx+0x2000                              }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x1f, 0x72, 0x80                               }, { vpabsq zmm30,ZWORD rdx-0x2000                              }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x1f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpabsq zmm30,ZWORD rdx-0x2040                              }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x1f, 0x72, 0x7f                               }, { vpabsq zmm30,QWORD rdx+0x3f8{1to8}                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x1f, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpabsq zmm30,QWORD rdx+0x400{1to8}                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x1f, 0x72, 0x80                               }, { vpabsq zmm30,QWORD rdx-0x400{1to8}                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x1f, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpabsq zmm30,QWORD rdx-0x408{1to8}                         }
+testcase	{ 0x62, 0x01, 0x15, 0x40, 0xfe, 0xf4                                     }, { vpaddd zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x15, 0x47, 0xfe, 0xf4                                     }, { vpaddd zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x15, 0xc7, 0xfe, 0xf4                                     }, { vpaddd zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xfe, 0x31                                     }, { vpaddd zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x15, 0x40, 0xfe, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpaddd zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xfe, 0x31                                     }, { vpaddd zmm30,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xfe, 0x72, 0x7f                               }, { vpaddd zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xfe, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpaddd zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xfe, 0x72, 0x80                               }, { vpaddd zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xfe, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpaddd zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xfe, 0x72, 0x7f                               }, { vpaddd zmm30,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xfe, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpaddd zmm30,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xfe, 0x72, 0x80                               }, { vpaddd zmm30,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xfe, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpaddd zmm30,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0xd4, 0xf4                                     }, { vpaddq zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0xd4, 0xf4                                     }, { vpaddq zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0xd4, 0xf4                                     }, { vpaddq zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xd4, 0x31                                     }, { vpaddq zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0xd4, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpaddq zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xd4, 0x31                                     }, { vpaddq zmm30,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xd4, 0x72, 0x7f                               }, { vpaddq zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xd4, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpaddq zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xd4, 0x72, 0x80                               }, { vpaddq zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xd4, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpaddq zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xd4, 0x72, 0x7f                               }, { vpaddq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xd4, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpaddq zmm30,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xd4, 0x72, 0x80                               }, { vpaddq zmm30,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xd4, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpaddq zmm30,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x01, 0x15, 0x40, 0xdb, 0xf4                                     }, { vpandd zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x15, 0x47, 0xdb, 0xf4                                     }, { vpandd zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x15, 0xc7, 0xdb, 0xf4                                     }, { vpandd zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xdb, 0x31                                     }, { vpandd zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x15, 0x40, 0xdb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpandd zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xdb, 0x31                                     }, { vpandd zmm30,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xdb, 0x72, 0x7f                               }, { vpandd zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xdb, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpandd zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xdb, 0x72, 0x80                               }, { vpandd zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xdb, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpandd zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xdb, 0x72, 0x7f                               }, { vpandd zmm30,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xdb, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpandd zmm30,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xdb, 0x72, 0x80                               }, { vpandd zmm30,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xdb, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpandd zmm30,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x01, 0x15, 0x40, 0xdf, 0xf4                                     }, { vpandnd zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x01, 0x15, 0x47, 0xdf, 0xf4                                     }, { vpandnd zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x01, 0x15, 0xc7, 0xdf, 0xf4                                     }, { vpandnd zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xdf, 0x31                                     }, { vpandnd zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x21, 0x15, 0x40, 0xdf, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpandnd zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xdf, 0x31                                     }, { vpandnd zmm30,zmm29,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xdf, 0x72, 0x7f                               }, { vpandnd zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xdf, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpandnd zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xdf, 0x72, 0x80                               }, { vpandnd zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xdf, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpandnd zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xdf, 0x72, 0x7f                               }, { vpandnd zmm30,zmm29,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xdf, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpandnd zmm30,zmm29,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xdf, 0x72, 0x80                               }, { vpandnd zmm30,zmm29,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xdf, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpandnd zmm30,zmm29,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0xdf, 0xf4                                     }, { vpandnq zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0xdf, 0xf4                                     }, { vpandnq zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0xdf, 0xf4                                     }, { vpandnq zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xdf, 0x31                                     }, { vpandnq zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0xdf, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpandnq zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xdf, 0x31                                     }, { vpandnq zmm30,zmm29,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xdf, 0x72, 0x7f                               }, { vpandnq zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xdf, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpandnq zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xdf, 0x72, 0x80                               }, { vpandnq zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xdf, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpandnq zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xdf, 0x72, 0x7f                               }, { vpandnq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xdf, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpandnq zmm30,zmm29,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xdf, 0x72, 0x80                               }, { vpandnq zmm30,zmm29,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xdf, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpandnq zmm30,zmm29,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0xdb, 0xf4                                     }, { vpandq zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0xdb, 0xf4                                     }, { vpandq zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0xdb, 0xf4                                     }, { vpandq zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xdb, 0x31                                     }, { vpandq zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0xdb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpandq zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xdb, 0x31                                     }, { vpandq zmm30,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xdb, 0x72, 0x7f                               }, { vpandq zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xdb, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpandq zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xdb, 0x72, 0x80                               }, { vpandq zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xdb, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpandq zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xdb, 0x72, 0x7f                               }, { vpandq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xdb, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpandq zmm30,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xdb, 0x72, 0x80                               }, { vpandq zmm30,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xdb, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpandq zmm30,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x64, 0xf4                                     }, { vpblendmd zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x64, 0xf4                                     }, { vpblendmd zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x64, 0xf4                                     }, { vpblendmd zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x64, 0x31                                     }, { vpblendmd zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x64, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpblendmd zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x64, 0x31                                     }, { vpblendmd zmm30,zmm29,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x64, 0x72, 0x7f                               }, { vpblendmd zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x64, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpblendmd zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x64, 0x72, 0x80                               }, { vpblendmd zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x64, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpblendmd zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x64, 0x72, 0x7f                               }, { vpblendmd zmm30,zmm29,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x64, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpblendmd zmm30,zmm29,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x64, 0x72, 0x80                               }, { vpblendmd zmm30,zmm29,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x64, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpblendmd zmm30,zmm29,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x58, 0x31                                     }, { vpbroadcastd zmm30,DWORD rcx                               }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x58, 0x31                                     }, { vpbroadcastd zmm30{k7},DWORD rcx                           }
+testcase	{ 0x62, 0x62, 0x7d, 0xcf, 0x58, 0x31                                     }, { vpbroadcastd zmm30{k7}{z},DWORD rcx                        }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x58, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpbroadcastd zmm30,DWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x58, 0x72, 0x7f                               }, { vpbroadcastd zmm30,DWORD rdx+0x1fc                         }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x58, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpbroadcastd zmm30,DWORD rdx+0x200                         }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x58, 0x72, 0x80                               }, { vpbroadcastd zmm30,DWORD rdx-0x200                         }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x58, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpbroadcastd zmm30,DWORD rdx-0x204                         }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x58, 0xf5                                     }, { vpbroadcastd zmm30{k7},xmm29                                 }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x58, 0xf5                                     }, { vpbroadcastd zmm30{k7}{z},xmm29                              }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x7c, 0xf0                                     }, { vpbroadcastd zmm30,eax                                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x7c, 0xf0                                     }, { vpbroadcastd zmm30{k7},eax                                   }
+testcase	{ 0x62, 0x62, 0x7d, 0xcf, 0x7c, 0xf0                                     }, { vpbroadcastd zmm30{k7}{z},eax                                }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x7c, 0xf5                                     }, { vpbroadcastd zmm30,ebp                                       }
+testcase	{ 0x62, 0x42, 0x7d, 0x48, 0x7c, 0xf5                                     }, { vpbroadcastd zmm30,r13d                                      }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x59, 0x31                                     }, { vpbroadcastq zmm30,QWORD rcx                               }
+testcase	{ 0x62, 0x62, 0xfd, 0x4f, 0x59, 0x31                                     }, { vpbroadcastq zmm30{k7},QWORD rcx                           }
+testcase	{ 0x62, 0x62, 0xfd, 0xcf, 0x59, 0x31                                     }, { vpbroadcastq zmm30{k7}{z},QWORD rcx                        }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x59, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpbroadcastq zmm30,QWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x59, 0x72, 0x7f                               }, { vpbroadcastq zmm30,QWORD rdx+0x3f8                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x59, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpbroadcastq zmm30,QWORD rdx+0x400                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x59, 0x72, 0x80                               }, { vpbroadcastq zmm30,QWORD rdx-0x400                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x59, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpbroadcastq zmm30,QWORD rdx-0x408                         }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0x59, 0xf5                                     }, { vpbroadcastq zmm30{k7},xmm29                                 }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0x59, 0xf5                                     }, { vpbroadcastq zmm30{k7}{z},xmm29                              }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x7c, 0xf0                                     }, { vpbroadcastq zmm30,rax                                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x4f, 0x7c, 0xf0                                     }, { vpbroadcastq zmm30{k7},rax                                   }
+testcase	{ 0x62, 0x62, 0xfd, 0xcf, 0x7c, 0xf0                                     }, { vpbroadcastq zmm30{k7}{z},rax                                }
+testcase	{ 0x62, 0x42, 0xfd, 0x48, 0x7c, 0xf0                                     }, { vpbroadcastq zmm30,r8                                        }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1f, 0xed, 0xab                               }, { vpcmpd k5,zmm30,zmm29,0xab                                   }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1f, 0xed, 0xab                               }, { vpcmpd k5{k7},zmm30,zmm29,0xab                               }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1f, 0xed, 0x7b                               }, { vpcmpd k5,zmm30,zmm29,0x7b                                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x29, 0x7b                               }, { vpcmpd k5,zmm30,ZWORD rcx,0x7b                             }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpcmpd k5,zmm30,ZWORD rax+r14*8+0x123,0x7b                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x29, 0x7b                               }, { vpcmpd k5,zmm30,DWORD rcx{1to16},0x7b                      }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x7f, 0x7b                         }, { vpcmpd k5,zmm30,ZWORD rdx+0x1fc0,0x7b                      }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpcmpd k5,zmm30,ZWORD rdx+0x2000,0x7b                      }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x80, 0x7b                         }, { vpcmpd k5,zmm30,ZWORD rdx-0x2000,0x7b                      }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpcmpd k5,zmm30,ZWORD rdx-0x2040,0x7b                      }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x7f, 0x7b                         }, { vpcmpd k5,zmm30,DWORD rdx+0x1fc{1to16},0x7b                }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vpcmpd k5,zmm30,DWORD rdx+0x200{1to16},0x7b                }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x80, 0x7b                         }, { vpcmpd k5,zmm30,DWORD rdx-0x200{1to16},0x7b                }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vpcmpd k5,zmm30,DWORD rdx-0x204{1to16},0x7b                }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1f, 0xed, 0x01                               }, { vpcmpltd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1f, 0xed, 0x01                               }, { vpcmpltd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x29, 0x01                               }, { vpcmpltd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vpcmpltd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x29, 0x01                               }, { vpcmpltd k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x7f, 0x01                         }, { vpcmpltd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x01       }, { vpcmpltd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x80, 0x01                         }, { vpcmpltd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x01       }, { vpcmpltd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x7f, 0x01                         }, { vpcmpltd k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x01       }, { vpcmpltd k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x80, 0x01                         }, { vpcmpltd k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x01       }, { vpcmpltd k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1f, 0xed, 0x02                               }, { vpcmpled k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1f, 0xed, 0x02                               }, { vpcmpled k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x29, 0x02                               }, { vpcmpled k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vpcmpled k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x29, 0x02                               }, { vpcmpled k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x7f, 0x02                         }, { vpcmpled k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x02       }, { vpcmpled k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x80, 0x02                         }, { vpcmpled k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x02       }, { vpcmpled k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x7f, 0x02                         }, { vpcmpled k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x02       }, { vpcmpled k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x80, 0x02                         }, { vpcmpled k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x02       }, { vpcmpled k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1f, 0xed, 0x04                               }, { vpcmpneqd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1f, 0xed, 0x04                               }, { vpcmpneqd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x29, 0x04                               }, { vpcmpneqd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vpcmpneqd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x29, 0x04                               }, { vpcmpneqd k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x7f, 0x04                         }, { vpcmpneqd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x04       }, { vpcmpneqd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x80, 0x04                         }, { vpcmpneqd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x04       }, { vpcmpneqd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x7f, 0x04                         }, { vpcmpneqd k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x04       }, { vpcmpneqd k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x80, 0x04                         }, { vpcmpneqd k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x04       }, { vpcmpneqd k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1f, 0xed, 0x05                               }, { vpcmpnltd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1f, 0xed, 0x05                               }, { vpcmpnltd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x29, 0x05                               }, { vpcmpnltd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vpcmpnltd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x29, 0x05                               }, { vpcmpnltd k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x7f, 0x05                         }, { vpcmpnltd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x05       }, { vpcmpnltd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x80, 0x05                         }, { vpcmpnltd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x05       }, { vpcmpnltd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x7f, 0x05                         }, { vpcmpnltd k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x05       }, { vpcmpnltd k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x80, 0x05                         }, { vpcmpnltd k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x05       }, { vpcmpnltd k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1f, 0xed, 0x06                               }, { vpcmpnled k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1f, 0xed, 0x06                               }, { vpcmpnled k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x29, 0x06                               }, { vpcmpnled k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vpcmpnled k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x29, 0x06                               }, { vpcmpnled k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x7f, 0x06                         }, { vpcmpnled k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x06       }, { vpcmpnled k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x80, 0x06                         }, { vpcmpnled k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x06       }, { vpcmpnled k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x7f, 0x06                         }, { vpcmpnled k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x06       }, { vpcmpnled k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x80, 0x06                         }, { vpcmpnled k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x06       }, { vpcmpnled k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0d, 0x40, 0x76, 0xed                                     }, { vpcmpeqd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x0d, 0x47, 0x76, 0xed                                     }, { vpcmpeqd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x76, 0x29                                     }, { vpcmpeqd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x0d, 0x40, 0x76, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpcmpeqd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x76, 0x29                                     }, { vpcmpeqd k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x76, 0x6a, 0x7f                               }, { vpcmpeqd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x76, 0xaa, 0x00, 0x20, 0x00, 0x00             }, { vpcmpeqd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x76, 0x6a, 0x80                               }, { vpcmpeqd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x76, 0xaa, 0xc0, 0xdf, 0xff, 0xff             }, { vpcmpeqd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x76, 0x6a, 0x7f                               }, { vpcmpeqd k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x76, 0xaa, 0x00, 0x02, 0x00, 0x00             }, { vpcmpeqd k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x76, 0x6a, 0x80                               }, { vpcmpeqd k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x76, 0xaa, 0xfc, 0xfd, 0xff, 0xff             }, { vpcmpeqd k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x92, 0x8d, 0x40, 0x29, 0xed                                     }, { vpcmpeqq k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x92, 0x8d, 0x47, 0x29, 0xed                                     }, { vpcmpeqq k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x29, 0x29                                     }, { vpcmpeqq k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb2, 0x8d, 0x40, 0x29, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpcmpeqq k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x29, 0x29                                     }, { vpcmpeqq k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x29, 0x6a, 0x7f                               }, { vpcmpeqq k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x29, 0xaa, 0x00, 0x20, 0x00, 0x00             }, { vpcmpeqq k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x29, 0x6a, 0x80                               }, { vpcmpeqq k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x29, 0xaa, 0xc0, 0xdf, 0xff, 0xff             }, { vpcmpeqq k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x29, 0x6a, 0x7f                               }, { vpcmpeqq k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x29, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vpcmpeqq k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x29, 0x6a, 0x80                               }, { vpcmpeqq k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x29, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vpcmpeqq k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x91, 0x0d, 0x40, 0x66, 0xed                                     }, { vpcmpgtd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x0d, 0x47, 0x66, 0xed                                     }, { vpcmpgtd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x66, 0x29                                     }, { vpcmpgtd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x0d, 0x40, 0x66, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpcmpgtd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x66, 0x29                                     }, { vpcmpgtd k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x66, 0x6a, 0x7f                               }, { vpcmpgtd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x66, 0xaa, 0x00, 0x20, 0x00, 0x00             }, { vpcmpgtd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x66, 0x6a, 0x80                               }, { vpcmpgtd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x66, 0xaa, 0xc0, 0xdf, 0xff, 0xff             }, { vpcmpgtd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x66, 0x6a, 0x7f                               }, { vpcmpgtd k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x66, 0xaa, 0x00, 0x02, 0x00, 0x00             }, { vpcmpgtd k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x66, 0x6a, 0x80                               }, { vpcmpgtd k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x66, 0xaa, 0xfc, 0xfd, 0xff, 0xff             }, { vpcmpgtd k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x92, 0x8d, 0x40, 0x37, 0xed                                     }, { vpcmpgtq k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x92, 0x8d, 0x47, 0x37, 0xed                                     }, { vpcmpgtq k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x37, 0x29                                     }, { vpcmpgtq k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb2, 0x8d, 0x40, 0x37, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpcmpgtq k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x37, 0x29                                     }, { vpcmpgtq k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x37, 0x6a, 0x7f                               }, { vpcmpgtq k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x37, 0xaa, 0x00, 0x20, 0x00, 0x00             }, { vpcmpgtq k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x37, 0x6a, 0x80                               }, { vpcmpgtq k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x37, 0xaa, 0xc0, 0xdf, 0xff, 0xff             }, { vpcmpgtq k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x37, 0x6a, 0x7f                               }, { vpcmpgtq k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x37, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vpcmpgtq k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x37, 0x6a, 0x80                               }, { vpcmpgtq k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x37, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vpcmpgtq k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1f, 0xed, 0xab                               }, { vpcmpq k5,zmm30,zmm29,0xab                                   }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1f, 0xed, 0xab                               }, { vpcmpq k5{k7},zmm30,zmm29,0xab                               }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1f, 0xed, 0x7b                               }, { vpcmpq k5,zmm30,zmm29,0x7b                                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x29, 0x7b                               }, { vpcmpq k5,zmm30,ZWORD rcx,0x7b                             }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpcmpq k5,zmm30,ZWORD rax+r14*8+0x123,0x7b                 }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x29, 0x7b                               }, { vpcmpq k5,zmm30,QWORD rcx{1to8},0x7b                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x7f, 0x7b                         }, { vpcmpq k5,zmm30,ZWORD rdx+0x1fc0,0x7b                      }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpcmpq k5,zmm30,ZWORD rdx+0x2000,0x7b                      }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x80, 0x7b                         }, { vpcmpq k5,zmm30,ZWORD rdx-0x2000,0x7b                      }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpcmpq k5,zmm30,ZWORD rdx-0x2040,0x7b                      }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x7f, 0x7b                         }, { vpcmpq k5,zmm30,QWORD rdx+0x3f8{1to8},0x7b                 }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vpcmpq k5,zmm30,QWORD rdx+0x400{1to8},0x7b                 }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x80, 0x7b                         }, { vpcmpq k5,zmm30,QWORD rdx-0x400{1to8},0x7b                 }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vpcmpq k5,zmm30,QWORD rdx-0x408{1to8},0x7b                 }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1f, 0xed, 0x01                               }, { vpcmpltq k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1f, 0xed, 0x01                               }, { vpcmpltq k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x29, 0x01                               }, { vpcmpltq k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vpcmpltq k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x29, 0x01                               }, { vpcmpltq k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x7f, 0x01                         }, { vpcmpltq k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x01       }, { vpcmpltq k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x80, 0x01                         }, { vpcmpltq k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x01       }, { vpcmpltq k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x7f, 0x01                         }, { vpcmpltq k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x01       }, { vpcmpltq k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x80, 0x01                         }, { vpcmpltq k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x01       }, { vpcmpltq k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1f, 0xed, 0x02                               }, { vpcmpleq k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1f, 0xed, 0x02                               }, { vpcmpleq k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x29, 0x02                               }, { vpcmpleq k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vpcmpleq k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x29, 0x02                               }, { vpcmpleq k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x7f, 0x02                         }, { vpcmpleq k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x02       }, { vpcmpleq k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x80, 0x02                         }, { vpcmpleq k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x02       }, { vpcmpleq k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x7f, 0x02                         }, { vpcmpleq k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x02       }, { vpcmpleq k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x80, 0x02                         }, { vpcmpleq k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x02       }, { vpcmpleq k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1f, 0xed, 0x04                               }, { vpcmpneqq k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1f, 0xed, 0x04                               }, { vpcmpneqq k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x29, 0x04                               }, { vpcmpneqq k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vpcmpneqq k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x29, 0x04                               }, { vpcmpneqq k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x7f, 0x04                         }, { vpcmpneqq k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x04       }, { vpcmpneqq k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x80, 0x04                         }, { vpcmpneqq k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x04       }, { vpcmpneqq k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x7f, 0x04                         }, { vpcmpneqq k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x04       }, { vpcmpneqq k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x80, 0x04                         }, { vpcmpneqq k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x04       }, { vpcmpneqq k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1f, 0xed, 0x05                               }, { vpcmpnltq k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1f, 0xed, 0x05                               }, { vpcmpnltq k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x29, 0x05                               }, { vpcmpnltq k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vpcmpnltq k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x29, 0x05                               }, { vpcmpnltq k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x7f, 0x05                         }, { vpcmpnltq k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x05       }, { vpcmpnltq k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x80, 0x05                         }, { vpcmpnltq k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x05       }, { vpcmpnltq k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x7f, 0x05                         }, { vpcmpnltq k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x05       }, { vpcmpnltq k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x80, 0x05                         }, { vpcmpnltq k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x05       }, { vpcmpnltq k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1f, 0xed, 0x06                               }, { vpcmpnleq k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1f, 0xed, 0x06                               }, { vpcmpnleq k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x29, 0x06                               }, { vpcmpnleq k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vpcmpnleq k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x29, 0x06                               }, { vpcmpnleq k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x7f, 0x06                         }, { vpcmpnleq k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x06       }, { vpcmpnleq k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x80, 0x06                         }, { vpcmpnleq k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x06       }, { vpcmpnleq k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x7f, 0x06                         }, { vpcmpnleq k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x06       }, { vpcmpnleq k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x80, 0x06                         }, { vpcmpnleq k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x06       }, { vpcmpnleq k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1e, 0xed, 0xab                               }, { vpcmpud k5,zmm30,zmm29,0xab                                  }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1e, 0xed, 0xab                               }, { vpcmpud k5{k7},zmm30,zmm29,0xab                              }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1e, 0xed, 0x7b                               }, { vpcmpud k5,zmm30,zmm29,0x7b                                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x29, 0x7b                               }, { vpcmpud k5,zmm30,ZWORD rcx,0x7b                            }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpcmpud k5,zmm30,ZWORD rax+r14*8+0x123,0x7b                }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x29, 0x7b                               }, { vpcmpud k5,zmm30,DWORD rcx{1to16},0x7b                     }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x7f, 0x7b                         }, { vpcmpud k5,zmm30,ZWORD rdx+0x1fc0,0x7b                     }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpcmpud k5,zmm30,ZWORD rdx+0x2000,0x7b                     }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x80, 0x7b                         }, { vpcmpud k5,zmm30,ZWORD rdx-0x2000,0x7b                     }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpcmpud k5,zmm30,ZWORD rdx-0x2040,0x7b                     }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x7f, 0x7b                         }, { vpcmpud k5,zmm30,DWORD rdx+0x1fc{1to16},0x7b               }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vpcmpud k5,zmm30,DWORD rdx+0x200{1to16},0x7b               }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x80, 0x7b                         }, { vpcmpud k5,zmm30,DWORD rdx-0x200{1to16},0x7b               }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vpcmpud k5,zmm30,DWORD rdx-0x204{1to16},0x7b               }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1e, 0xed, 0x00                               }, { vpcmpequd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1e, 0xed, 0x00                               }, { vpcmpequd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x29, 0x00                               }, { vpcmpequd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vpcmpequd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x29, 0x00                               }, { vpcmpequd k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x7f, 0x00                         }, { vpcmpequd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x00       }, { vpcmpequd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x80, 0x00                         }, { vpcmpequd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x00       }, { vpcmpequd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x7f, 0x00                         }, { vpcmpequd k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x00       }, { vpcmpequd k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x80, 0x00                         }, { vpcmpequd k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x00       }, { vpcmpequd k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1e, 0xed, 0x01                               }, { vpcmpltud k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1e, 0xed, 0x01                               }, { vpcmpltud k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x29, 0x01                               }, { vpcmpltud k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vpcmpltud k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x29, 0x01                               }, { vpcmpltud k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x7f, 0x01                         }, { vpcmpltud k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x01       }, { vpcmpltud k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x80, 0x01                         }, { vpcmpltud k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x01       }, { vpcmpltud k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x7f, 0x01                         }, { vpcmpltud k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x01       }, { vpcmpltud k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x80, 0x01                         }, { vpcmpltud k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x01       }, { vpcmpltud k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1e, 0xed, 0x02                               }, { vpcmpleud k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1e, 0xed, 0x02                               }, { vpcmpleud k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x29, 0x02                               }, { vpcmpleud k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vpcmpleud k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x29, 0x02                               }, { vpcmpleud k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x7f, 0x02                         }, { vpcmpleud k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x02       }, { vpcmpleud k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x80, 0x02                         }, { vpcmpleud k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x02       }, { vpcmpleud k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x7f, 0x02                         }, { vpcmpleud k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x02       }, { vpcmpleud k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x80, 0x02                         }, { vpcmpleud k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x02       }, { vpcmpleud k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1e, 0xed, 0x04                               }, { vpcmpnequd k5,zmm30,zmm29                                    }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1e, 0xed, 0x04                               }, { vpcmpnequd k5{k7},zmm30,zmm29                                }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x29, 0x04                               }, { vpcmpnequd k5,zmm30,ZWORD rcx                              }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vpcmpnequd k5,zmm30,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x29, 0x04                               }, { vpcmpnequd k5,zmm30,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x7f, 0x04                         }, { vpcmpnequd k5,zmm30,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x04       }, { vpcmpnequd k5,zmm30,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x80, 0x04                         }, { vpcmpnequd k5,zmm30,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x04       }, { vpcmpnequd k5,zmm30,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x7f, 0x04                         }, { vpcmpnequd k5,zmm30,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x04       }, { vpcmpnequd k5,zmm30,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x80, 0x04                         }, { vpcmpnequd k5,zmm30,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x04       }, { vpcmpnequd k5,zmm30,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1e, 0xed, 0x05                               }, { vpcmpnltud k5,zmm30,zmm29                                    }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1e, 0xed, 0x05                               }, { vpcmpnltud k5{k7},zmm30,zmm29                                }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x29, 0x05                               }, { vpcmpnltud k5,zmm30,ZWORD rcx                              }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vpcmpnltud k5,zmm30,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x29, 0x05                               }, { vpcmpnltud k5,zmm30,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x7f, 0x05                         }, { vpcmpnltud k5,zmm30,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x05       }, { vpcmpnltud k5,zmm30,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x80, 0x05                         }, { vpcmpnltud k5,zmm30,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x05       }, { vpcmpnltud k5,zmm30,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x7f, 0x05                         }, { vpcmpnltud k5,zmm30,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x05       }, { vpcmpnltud k5,zmm30,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x80, 0x05                         }, { vpcmpnltud k5,zmm30,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x05       }, { vpcmpnltud k5,zmm30,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1e, 0xed, 0x06                               }, { vpcmpnleud k5,zmm30,zmm29                                    }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1e, 0xed, 0x06                               }, { vpcmpnleud k5{k7},zmm30,zmm29                                }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x29, 0x06                               }, { vpcmpnleud k5,zmm30,ZWORD rcx                              }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vpcmpnleud k5,zmm30,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x29, 0x06                               }, { vpcmpnleud k5,zmm30,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x7f, 0x06                         }, { vpcmpnleud k5,zmm30,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x06       }, { vpcmpnleud k5,zmm30,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x80, 0x06                         }, { vpcmpnleud k5,zmm30,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x06       }, { vpcmpnleud k5,zmm30,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x7f, 0x06                         }, { vpcmpnleud k5,zmm30,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x06       }, { vpcmpnleud k5,zmm30,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x80, 0x06                         }, { vpcmpnleud k5,zmm30,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x06       }, { vpcmpnleud k5,zmm30,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1e, 0xed, 0xab                               }, { vpcmpuq k5,zmm30,zmm29,0xab                                  }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1e, 0xed, 0xab                               }, { vpcmpuq k5{k7},zmm30,zmm29,0xab                              }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1e, 0xed, 0x7b                               }, { vpcmpuq k5,zmm30,zmm29,0x7b                                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x29, 0x7b                               }, { vpcmpuq k5,zmm30,ZWORD rcx,0x7b                            }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpcmpuq k5,zmm30,ZWORD rax+r14*8+0x123,0x7b                }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x29, 0x7b                               }, { vpcmpuq k5,zmm30,QWORD rcx{1to8},0x7b                      }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x7f, 0x7b                         }, { vpcmpuq k5,zmm30,ZWORD rdx+0x1fc0,0x7b                     }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpcmpuq k5,zmm30,ZWORD rdx+0x2000,0x7b                     }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x80, 0x7b                         }, { vpcmpuq k5,zmm30,ZWORD rdx-0x2000,0x7b                     }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpcmpuq k5,zmm30,ZWORD rdx-0x2040,0x7b                     }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x7f, 0x7b                         }, { vpcmpuq k5,zmm30,QWORD rdx+0x3f8{1to8},0x7b                }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vpcmpuq k5,zmm30,QWORD rdx+0x400{1to8},0x7b                }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x80, 0x7b                         }, { vpcmpuq k5,zmm30,QWORD rdx-0x400{1to8},0x7b                }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vpcmpuq k5,zmm30,QWORD rdx-0x408{1to8},0x7b                }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1e, 0xed, 0x00                               }, { vpcmpequq k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1e, 0xed, 0x00                               }, { vpcmpequq k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x29, 0x00                               }, { vpcmpequq k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vpcmpequq k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x29, 0x00                               }, { vpcmpequq k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x7f, 0x00                         }, { vpcmpequq k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x00       }, { vpcmpequq k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x80, 0x00                         }, { vpcmpequq k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x00       }, { vpcmpequq k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x7f, 0x00                         }, { vpcmpequq k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x00       }, { vpcmpequq k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x80, 0x00                         }, { vpcmpequq k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x00       }, { vpcmpequq k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1e, 0xed, 0x01                               }, { vpcmpltuq k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1e, 0xed, 0x01                               }, { vpcmpltuq k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x29, 0x01                               }, { vpcmpltuq k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vpcmpltuq k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x29, 0x01                               }, { vpcmpltuq k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x7f, 0x01                         }, { vpcmpltuq k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x01       }, { vpcmpltuq k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x80, 0x01                         }, { vpcmpltuq k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x01       }, { vpcmpltuq k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x7f, 0x01                         }, { vpcmpltuq k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x01       }, { vpcmpltuq k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x80, 0x01                         }, { vpcmpltuq k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x01       }, { vpcmpltuq k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1e, 0xed, 0x02                               }, { vpcmpleuq k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1e, 0xed, 0x02                               }, { vpcmpleuq k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x29, 0x02                               }, { vpcmpleuq k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vpcmpleuq k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x29, 0x02                               }, { vpcmpleuq k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x7f, 0x02                         }, { vpcmpleuq k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x02       }, { vpcmpleuq k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x80, 0x02                         }, { vpcmpleuq k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x02       }, { vpcmpleuq k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x7f, 0x02                         }, { vpcmpleuq k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x02       }, { vpcmpleuq k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x80, 0x02                         }, { vpcmpleuq k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x02       }, { vpcmpleuq k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1e, 0xed, 0x04                               }, { vpcmpnequq k5,zmm30,zmm29                                    }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1e, 0xed, 0x04                               }, { vpcmpnequq k5{k7},zmm30,zmm29                                }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x29, 0x04                               }, { vpcmpnequq k5,zmm30,ZWORD rcx                              }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vpcmpnequq k5,zmm30,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x29, 0x04                               }, { vpcmpnequq k5,zmm30,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x7f, 0x04                         }, { vpcmpnequq k5,zmm30,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x04       }, { vpcmpnequq k5,zmm30,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x80, 0x04                         }, { vpcmpnequq k5,zmm30,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x04       }, { vpcmpnequq k5,zmm30,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x7f, 0x04                         }, { vpcmpnequq k5,zmm30,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x04       }, { vpcmpnequq k5,zmm30,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x80, 0x04                         }, { vpcmpnequq k5,zmm30,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x04       }, { vpcmpnequq k5,zmm30,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1e, 0xed, 0x05                               }, { vpcmpnltuq k5,zmm30,zmm29                                    }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1e, 0xed, 0x05                               }, { vpcmpnltuq k5{k7},zmm30,zmm29                                }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x29, 0x05                               }, { vpcmpnltuq k5,zmm30,ZWORD rcx                              }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vpcmpnltuq k5,zmm30,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x29, 0x05                               }, { vpcmpnltuq k5,zmm30,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x7f, 0x05                         }, { vpcmpnltuq k5,zmm30,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x05       }, { vpcmpnltuq k5,zmm30,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x80, 0x05                         }, { vpcmpnltuq k5,zmm30,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x05       }, { vpcmpnltuq k5,zmm30,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x7f, 0x05                         }, { vpcmpnltuq k5,zmm30,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x05       }, { vpcmpnltuq k5,zmm30,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x80, 0x05                         }, { vpcmpnltuq k5,zmm30,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x05       }, { vpcmpnltuq k5,zmm30,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1e, 0xed, 0x06                               }, { vpcmpnleuq k5,zmm30,zmm29                                    }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1e, 0xed, 0x06                               }, { vpcmpnleuq k5{k7},zmm30,zmm29                                }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x29, 0x06                               }, { vpcmpnleuq k5,zmm30,ZWORD rcx                              }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vpcmpnleuq k5,zmm30,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x29, 0x06                               }, { vpcmpnleuq k5,zmm30,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x7f, 0x06                         }, { vpcmpnleuq k5,zmm30,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x06       }, { vpcmpnleuq k5,zmm30,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x80, 0x06                         }, { vpcmpnleuq k5,zmm30,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x06       }, { vpcmpnleuq k5,zmm30,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x7f, 0x06                         }, { vpcmpnleuq k5,zmm30,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x06       }, { vpcmpnleuq k5,zmm30,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x80, 0x06                         }, { vpcmpnleuq k5,zmm30,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x06       }, { vpcmpnleuq k5,zmm30,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x64, 0xf4                                     }, { vpblendmq zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x64, 0xf4                                     }, { vpblendmq zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x64, 0xf4                                     }, { vpblendmq zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x64, 0x31                                     }, { vpblendmq zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x64, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpblendmq zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x64, 0x31                                     }, { vpblendmq zmm30,zmm29,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x64, 0x72, 0x7f                               }, { vpblendmq zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x64, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpblendmq zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x64, 0x72, 0x80                               }, { vpblendmq zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x64, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpblendmq zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x64, 0x72, 0x7f                               }, { vpblendmq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x64, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpblendmq zmm30,zmm29,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x64, 0x72, 0x80                               }, { vpblendmq zmm30,zmm29,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x64, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpblendmq zmm30,zmm29,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x8b, 0x31                                     }, { vpcompressd ZWORD rcx,zmm30                                }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x8b, 0x31                                     }, { vpcompressd ZWORD rcx{k7},zmm30                            }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x8b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpcompressd ZWORD rax+r14*8+0x123,zmm30                    }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x8b, 0x72, 0x7f                               }, { vpcompressd ZWORD rdx+0x1fc,zmm30                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x8b, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpcompressd ZWORD rdx+0x200,zmm30                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x8b, 0x72, 0x80                               }, { vpcompressd ZWORD rdx-0x200,zmm30                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x8b, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpcompressd ZWORD rdx-0x204,zmm30                          }
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0x8b, 0xee                                     }, { vpcompressd zmm30,zmm29                                      }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x8b, 0xee                                     }, { vpcompressd zmm30{k7},zmm29                                  }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x8b, 0xee                                     }, { vpcompressd zmm30{k7}{z},zmm29                               }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x36, 0xf4                                     }, { vpermd zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x36, 0xf4                                     }, { vpermd zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x36, 0xf4                                     }, { vpermd zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x36, 0x31                                     }, { vpermd zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x36, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermd zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x36, 0x31                                     }, { vpermd zmm30,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x36, 0x72, 0x7f                               }, { vpermd zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x36, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermd zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x36, 0x72, 0x80                               }, { vpermd zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x36, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermd zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x36, 0x72, 0x7f                               }, { vpermd zmm30,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x36, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpermd zmm30,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x36, 0x72, 0x80                               }, { vpermd zmm30,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x36, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpermd zmm30,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x03, 0xfd, 0x48, 0x05, 0xf5, 0xab                               }, { vpermilpd zmm30,zmm29,0xab                                   }
+testcase	{ 0x62, 0x03, 0xfd, 0x4f, 0x05, 0xf5, 0xab                               }, { vpermilpd zmm30{k7},zmm29,0xab                               }
+testcase	{ 0x62, 0x03, 0xfd, 0xcf, 0x05, 0xf5, 0xab                               }, { vpermilpd zmm30{k7}{z},zmm29,0xab                            }
+testcase	{ 0x62, 0x03, 0xfd, 0x48, 0x05, 0xf5, 0x7b                               }, { vpermilpd zmm30,zmm29,0x7b                                   }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x05, 0x31, 0x7b                               }, { vpermilpd zmm30,ZWORD rcx,0x7b                             }
+testcase	{ 0x62, 0x23, 0xfd, 0x48, 0x05, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpermilpd zmm30,ZWORD rax+r14*8+0x123,0x7b                 }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x05, 0x31, 0x7b                               }, { vpermilpd zmm30,QWORD rcx{1to8},0x7b                       }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x05, 0x72, 0x7f, 0x7b                         }, { vpermilpd zmm30,ZWORD rdx+0x1fc0,0x7b                      }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x05, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpermilpd zmm30,ZWORD rdx+0x2000,0x7b                      }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x05, 0x72, 0x80, 0x7b                         }, { vpermilpd zmm30,ZWORD rdx-0x2000,0x7b                      }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x05, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpermilpd zmm30,ZWORD rdx-0x2040,0x7b                      }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x05, 0x72, 0x7f, 0x7b                         }, { vpermilpd zmm30,QWORD rdx+0x3f8{1to8},0x7b                 }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x05, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vpermilpd zmm30,QWORD rdx+0x400{1to8},0x7b                 }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x05, 0x72, 0x80, 0x7b                         }, { vpermilpd zmm30,QWORD rdx-0x400{1to8},0x7b                 }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x05, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vpermilpd zmm30,QWORD rdx-0x408{1to8},0x7b                 }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x0d, 0xf4                                     }, { vpermilpd zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x0d, 0xf4                                     }, { vpermilpd zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x0d, 0xf4                                     }, { vpermilpd zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x0d, 0x31                                     }, { vpermilpd zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x0d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermilpd zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x0d, 0x31                                     }, { vpermilpd zmm30,zmm29,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x0d, 0x72, 0x7f                               }, { vpermilpd zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x0d, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermilpd zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x0d, 0x72, 0x80                               }, { vpermilpd zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x0d, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermilpd zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x0d, 0x72, 0x7f                               }, { vpermilpd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x0d, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpermilpd zmm30,zmm29,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x0d, 0x72, 0x80                               }, { vpermilpd zmm30,zmm29,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x0d, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpermilpd zmm30,zmm29,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x03, 0x7d, 0x48, 0x04, 0xf5, 0xab                               }, { vpermilps zmm30,zmm29,0xab                                   }
+testcase	{ 0x62, 0x03, 0x7d, 0x4f, 0x04, 0xf5, 0xab                               }, { vpermilps zmm30{k7},zmm29,0xab                               }
+testcase	{ 0x62, 0x03, 0x7d, 0xcf, 0x04, 0xf5, 0xab                               }, { vpermilps zmm30{k7}{z},zmm29,0xab                            }
+testcase	{ 0x62, 0x03, 0x7d, 0x48, 0x04, 0xf5, 0x7b                               }, { vpermilps zmm30,zmm29,0x7b                                   }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x04, 0x31, 0x7b                               }, { vpermilps zmm30,ZWORD rcx,0x7b                             }
+testcase	{ 0x62, 0x23, 0x7d, 0x48, 0x04, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpermilps zmm30,ZWORD rax+r14*8+0x123,0x7b                 }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x04, 0x31, 0x7b                               }, { vpermilps zmm30,DWORD rcx{1to16},0x7b                      }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x04, 0x72, 0x7f, 0x7b                         }, { vpermilps zmm30,ZWORD rdx+0x1fc0,0x7b                      }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x04, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpermilps zmm30,ZWORD rdx+0x2000,0x7b                      }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x04, 0x72, 0x80, 0x7b                         }, { vpermilps zmm30,ZWORD rdx-0x2000,0x7b                      }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x04, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpermilps zmm30,ZWORD rdx-0x2040,0x7b                      }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x04, 0x72, 0x7f, 0x7b                         }, { vpermilps zmm30,DWORD rdx+0x1fc{1to16},0x7b                }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x04, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vpermilps zmm30,DWORD rdx+0x200{1to16},0x7b                }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x04, 0x72, 0x80, 0x7b                         }, { vpermilps zmm30,DWORD rdx-0x200{1to16},0x7b                }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x04, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vpermilps zmm30,DWORD rdx-0x204{1to16},0x7b                }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x0c, 0xf4                                     }, { vpermilps zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x0c, 0xf4                                     }, { vpermilps zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x0c, 0xf4                                     }, { vpermilps zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x0c, 0x31                                     }, { vpermilps zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x0c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermilps zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x0c, 0x31                                     }, { vpermilps zmm30,zmm29,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x0c, 0x72, 0x7f                               }, { vpermilps zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x0c, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermilps zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x0c, 0x72, 0x80                               }, { vpermilps zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x0c, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermilps zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x0c, 0x72, 0x7f                               }, { vpermilps zmm30,zmm29,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x0c, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpermilps zmm30,zmm29,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x0c, 0x72, 0x80                               }, { vpermilps zmm30,zmm29,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x0c, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpermilps zmm30,zmm29,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x03, 0xfd, 0x48, 0x01, 0xf5, 0xab                               }, { vpermpd zmm30,zmm29,0xab                                     }
+testcase	{ 0x62, 0x03, 0xfd, 0x4f, 0x01, 0xf5, 0xab                               }, { vpermpd zmm30{k7},zmm29,0xab                                 }
+testcase	{ 0x62, 0x03, 0xfd, 0xcf, 0x01, 0xf5, 0xab                               }, { vpermpd zmm30{k7}{z},zmm29,0xab                              }
+testcase	{ 0x62, 0x03, 0xfd, 0x48, 0x01, 0xf5, 0x7b                               }, { vpermpd zmm30,zmm29,0x7b                                     }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x01, 0x31, 0x7b                               }, { vpermpd zmm30,ZWORD rcx,0x7b                               }
+testcase	{ 0x62, 0x23, 0xfd, 0x48, 0x01, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpermpd zmm30,ZWORD rax+r14*8+0x123,0x7b                   }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x01, 0x31, 0x7b                               }, { vpermpd zmm30,QWORD rcx{1to8},0x7b                         }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x01, 0x72, 0x7f, 0x7b                         }, { vpermpd zmm30,ZWORD rdx+0x1fc0,0x7b                        }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x01, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpermpd zmm30,ZWORD rdx+0x2000,0x7b                        }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x01, 0x72, 0x80, 0x7b                         }, { vpermpd zmm30,ZWORD rdx-0x2000,0x7b                        }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x01, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpermpd zmm30,ZWORD rdx-0x2040,0x7b                        }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x01, 0x72, 0x7f, 0x7b                         }, { vpermpd zmm30,QWORD rdx+0x3f8{1to8},0x7b                   }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x01, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vpermpd zmm30,QWORD rdx+0x400{1to8},0x7b                   }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x01, 0x72, 0x80, 0x7b                         }, { vpermpd zmm30,QWORD rdx-0x400{1to8},0x7b                   }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x01, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vpermpd zmm30,QWORD rdx-0x408{1to8},0x7b                   }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x16, 0xf4                                     }, { vpermps zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x16, 0xf4                                     }, { vpermps zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x16, 0xf4                                     }, { vpermps zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x16, 0x31                                     }, { vpermps zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x16, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermps zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x16, 0x31                                     }, { vpermps zmm30,zmm29,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x16, 0x72, 0x7f                               }, { vpermps zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x16, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermps zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x16, 0x72, 0x80                               }, { vpermps zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x16, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermps zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x16, 0x72, 0x7f                               }, { vpermps zmm30,zmm29,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x16, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpermps zmm30,zmm29,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x16, 0x72, 0x80                               }, { vpermps zmm30,zmm29,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x16, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpermps zmm30,zmm29,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x03, 0xfd, 0x48, 0x00, 0xf5, 0xab                               }, { vpermq zmm30,zmm29,0xab                                      }
+testcase	{ 0x62, 0x03, 0xfd, 0x4f, 0x00, 0xf5, 0xab                               }, { vpermq zmm30{k7},zmm29,0xab                                  }
+testcase	{ 0x62, 0x03, 0xfd, 0xcf, 0x00, 0xf5, 0xab                               }, { vpermq zmm30{k7}{z},zmm29,0xab                               }
+testcase	{ 0x62, 0x03, 0xfd, 0x48, 0x00, 0xf5, 0x7b                               }, { vpermq zmm30,zmm29,0x7b                                      }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x00, 0x31, 0x7b                               }, { vpermq zmm30,ZWORD rcx,0x7b                                }
+testcase	{ 0x62, 0x23, 0xfd, 0x48, 0x00, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpermq zmm30,ZWORD rax+r14*8+0x123,0x7b                    }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x00, 0x31, 0x7b                               }, { vpermq zmm30,QWORD rcx{1to8},0x7b                          }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x00, 0x72, 0x7f, 0x7b                         }, { vpermq zmm30,ZWORD rdx+0x1fc0,0x7b                         }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x00, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpermq zmm30,ZWORD rdx+0x2000,0x7b                         }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x00, 0x72, 0x80, 0x7b                         }, { vpermq zmm30,ZWORD rdx-0x2000,0x7b                         }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x00, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpermq zmm30,ZWORD rdx-0x2040,0x7b                         }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x00, 0x72, 0x7f, 0x7b                         }, { vpermq zmm30,QWORD rdx+0x3f8{1to8},0x7b                    }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x00, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vpermq zmm30,QWORD rdx+0x400{1to8},0x7b                    }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x00, 0x72, 0x80, 0x7b                         }, { vpermq zmm30,QWORD rdx-0x400{1to8},0x7b                    }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x00, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vpermq zmm30,QWORD rdx-0x408{1to8},0x7b                    }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x89, 0x31                                     }, { vpexpandd zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x89, 0x31                                     }, { vpexpandd zmm30{k7},ZWORD rcx                              }
+testcase	{ 0x62, 0x62, 0x7d, 0xcf, 0x89, 0x31                                     }, { vpexpandd zmm30{k7}{z},ZWORD rcx                           }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x89, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpexpandd zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x89, 0x72, 0x7f                               }, { vpexpandd zmm30,ZWORD rdx+0x1fc                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x89, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpexpandd zmm30,ZWORD rdx+0x200                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x89, 0x72, 0x80                               }, { vpexpandd zmm30,ZWORD rdx-0x200                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x89, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpexpandd zmm30,ZWORD rdx-0x204                            }
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0x89, 0xf5                                     }, { vpexpandd zmm30,zmm29                                        }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x89, 0xf5                                     }, { vpexpandd zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x89, 0xf5                                     }, { vpexpandd zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x89, 0x31                                     }, { vpexpandq zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x62, 0xfd, 0x4f, 0x89, 0x31                                     }, { vpexpandq zmm30{k7},ZWORD rcx                              }
+testcase	{ 0x62, 0x62, 0xfd, 0xcf, 0x89, 0x31                                     }, { vpexpandq zmm30{k7}{z},ZWORD rcx                           }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x89, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpexpandq zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x89, 0x72, 0x7f                               }, { vpexpandq zmm30,ZWORD rdx+0x3f8                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x89, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpexpandq zmm30,ZWORD rdx+0x400                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x89, 0x72, 0x80                               }, { vpexpandq zmm30,ZWORD rdx-0x400                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x89, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpexpandq zmm30,ZWORD rdx-0x408                            }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0x89, 0xf5                                     }, { vpexpandq zmm30,zmm29                                        }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0x89, 0xf5                                     }, { vpexpandq zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0x89, 0xf5                                     }, { vpexpandq zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x02, 0x7d, 0x41, 0x90, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vpgatherdd zmm30{k1}, r14+zmm31*8+0x7b                     }
+testcase	{ 0x62, 0x02, 0x7d, 0x41, 0x90, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vpgatherdd zmm30{k1}, r14+zmm31*8+0x7b                     }
+testcase	{ 0x62, 0x02, 0x7d, 0x41, 0x90, 0x74, 0x39, 0x40                         }, { vpgatherdd zmm30{k1}, r9+zmm31*1+0x100                     }
+testcase	{ 0x62, 0x22, 0x7d, 0x41, 0x90, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vpgatherdd zmm30{k1}, rcx+zmm31*4+0x400                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0x90, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vpgatherdq zmm30{k1}, r14+ymm31*8+0x7b                     }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0x90, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vpgatherdq zmm30{k1}, r14+ymm31*8+0x7b                     }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0x90, 0x74, 0x39, 0x20                         }, { vpgatherdq zmm30{k1}, r9+ymm31*1+0x100                     }
+testcase	{ 0x62, 0x22, 0xfd, 0x41, 0x90, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vpgatherdq zmm30{k1}, rcx+ymm31*4+0x400                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0x91, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vpgatherqq zmm30{k1}, r14+zmm31*8+0x7b                     }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0x91, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vpgatherqq zmm30{k1}, r14+zmm31*8+0x7b                     }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0x91, 0x74, 0x39, 0x20                         }, { vpgatherqq zmm30{k1}, r9+zmm31*1+0x100                     }
+testcase	{ 0x62, 0x22, 0xfd, 0x41, 0x91, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vpgatherqq zmm30{k1}, rcx+zmm31*4+0x400                    }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x3d, 0xf4                                     }, { vpmaxsd zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x3d, 0xf4                                     }, { vpmaxsd zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x3d, 0xf4                                     }, { vpmaxsd zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3d, 0x31                                     }, { vpmaxsd zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x3d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmaxsd zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3d, 0x31                                     }, { vpmaxsd zmm30,zmm29,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3d, 0x72, 0x7f                               }, { vpmaxsd zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3d, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpmaxsd zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3d, 0x72, 0x80                               }, { vpmaxsd zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3d, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpmaxsd zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3d, 0x72, 0x7f                               }, { vpmaxsd zmm30,zmm29,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3d, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpmaxsd zmm30,zmm29,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3d, 0x72, 0x80                               }, { vpmaxsd zmm30,zmm29,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3d, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpmaxsd zmm30,zmm29,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x3d, 0xf4                                     }, { vpmaxsq zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x3d, 0xf4                                     }, { vpmaxsq zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x3d, 0xf4                                     }, { vpmaxsq zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3d, 0x31                                     }, { vpmaxsq zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x3d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmaxsq zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3d, 0x31                                     }, { vpmaxsq zmm30,zmm29,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3d, 0x72, 0x7f                               }, { vpmaxsq zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3d, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpmaxsq zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3d, 0x72, 0x80                               }, { vpmaxsq zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3d, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpmaxsq zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3d, 0x72, 0x7f                               }, { vpmaxsq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3d, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpmaxsq zmm30,zmm29,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3d, 0x72, 0x80                               }, { vpmaxsq zmm30,zmm29,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3d, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpmaxsq zmm30,zmm29,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x3f, 0xf4                                     }, { vpmaxud zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x3f, 0xf4                                     }, { vpmaxud zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x3f, 0xf4                                     }, { vpmaxud zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3f, 0x31                                     }, { vpmaxud zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x3f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmaxud zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3f, 0x31                                     }, { vpmaxud zmm30,zmm29,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3f, 0x72, 0x7f                               }, { vpmaxud zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpmaxud zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3f, 0x72, 0x80                               }, { vpmaxud zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpmaxud zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3f, 0x72, 0x7f                               }, { vpmaxud zmm30,zmm29,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3f, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpmaxud zmm30,zmm29,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3f, 0x72, 0x80                               }, { vpmaxud zmm30,zmm29,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3f, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpmaxud zmm30,zmm29,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x3f, 0xf4                                     }, { vpmaxuq zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x3f, 0xf4                                     }, { vpmaxuq zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x3f, 0xf4                                     }, { vpmaxuq zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3f, 0x31                                     }, { vpmaxuq zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x3f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmaxuq zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3f, 0x31                                     }, { vpmaxuq zmm30,zmm29,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3f, 0x72, 0x7f                               }, { vpmaxuq zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpmaxuq zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3f, 0x72, 0x80                               }, { vpmaxuq zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpmaxuq zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3f, 0x72, 0x7f                               }, { vpmaxuq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3f, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpmaxuq zmm30,zmm29,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3f, 0x72, 0x80                               }, { vpmaxuq zmm30,zmm29,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3f, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpmaxuq zmm30,zmm29,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x39, 0xf4                                     }, { vpminsd zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x39, 0xf4                                     }, { vpminsd zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x39, 0xf4                                     }, { vpminsd zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x39, 0x31                                     }, { vpminsd zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x39, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpminsd zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x39, 0x31                                     }, { vpminsd zmm30,zmm29,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x39, 0x72, 0x7f                               }, { vpminsd zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x39, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpminsd zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x39, 0x72, 0x80                               }, { vpminsd zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x39, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpminsd zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x39, 0x72, 0x7f                               }, { vpminsd zmm30,zmm29,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x39, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpminsd zmm30,zmm29,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x39, 0x72, 0x80                               }, { vpminsd zmm30,zmm29,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x39, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpminsd zmm30,zmm29,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x39, 0xf4                                     }, { vpminsq zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x39, 0xf4                                     }, { vpminsq zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x39, 0xf4                                     }, { vpminsq zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x39, 0x31                                     }, { vpminsq zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x39, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpminsq zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x39, 0x31                                     }, { vpminsq zmm30,zmm29,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x39, 0x72, 0x7f                               }, { vpminsq zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x39, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpminsq zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x39, 0x72, 0x80                               }, { vpminsq zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x39, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpminsq zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x39, 0x72, 0x7f                               }, { vpminsq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x39, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpminsq zmm30,zmm29,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x39, 0x72, 0x80                               }, { vpminsq zmm30,zmm29,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x39, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpminsq zmm30,zmm29,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x3b, 0xf4                                     }, { vpminud zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x3b, 0xf4                                     }, { vpminud zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x3b, 0xf4                                     }, { vpminud zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3b, 0x31                                     }, { vpminud zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x3b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpminud zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3b, 0x31                                     }, { vpminud zmm30,zmm29,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3b, 0x72, 0x7f                               }, { vpminud zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3b, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpminud zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3b, 0x72, 0x80                               }, { vpminud zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3b, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpminud zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3b, 0x72, 0x7f                               }, { vpminud zmm30,zmm29,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3b, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpminud zmm30,zmm29,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3b, 0x72, 0x80                               }, { vpminud zmm30,zmm29,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3b, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpminud zmm30,zmm29,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x3b, 0xf4                                     }, { vpminuq zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x3b, 0xf4                                     }, { vpminuq zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x3b, 0xf4                                     }, { vpminuq zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3b, 0x31                                     }, { vpminuq zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x3b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpminuq zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3b, 0x31                                     }, { vpminuq zmm30,zmm29,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3b, 0x72, 0x7f                               }, { vpminuq zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3b, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpminuq zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3b, 0x72, 0x80                               }, { vpminuq zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3b, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpminuq zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3b, 0x72, 0x7f                               }, { vpminuq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3b, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpminuq zmm30,zmm29,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3b, 0x72, 0x80                               }, { vpminuq zmm30,zmm29,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3b, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpminuq zmm30,zmm29,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x21, 0xf5                                     }, { vpmovsxbd zmm30{k7},xmm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x21, 0xf5                                     }, { vpmovsxbd zmm30{k7}{z},xmm29                                 }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x21, 0x31                                     }, { vpmovsxbd zmm30{k7},OWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x7d, 0x4f, 0x21, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovsxbd zmm30{k7},OWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x21, 0x72, 0x7f                               }, { vpmovsxbd zmm30{k7},OWORD rdx+0x7f0                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x21, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpmovsxbd zmm30{k7},OWORD rdx+0x800                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x21, 0x72, 0x80                               }, { vpmovsxbd zmm30{k7},OWORD rdx-0x800                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x21, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpmovsxbd zmm30{k7},OWORD rdx-0x810                        }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x22, 0xf5                                     }, { vpmovsxbq zmm30{k7},xmm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x22, 0xf5                                     }, { vpmovsxbq zmm30{k7}{z},xmm29                                 }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x22, 0x31                                     }, { vpmovsxbq zmm30{k7},QWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x7d, 0x4f, 0x22, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovsxbq zmm30{k7},QWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x22, 0x72, 0x7f                               }, { vpmovsxbq zmm30{k7},QWORD rdx+0x3f8                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x22, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpmovsxbq zmm30{k7},QWORD rdx+0x400                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x22, 0x72, 0x80                               }, { vpmovsxbq zmm30{k7},QWORD rdx-0x400                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x22, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpmovsxbq zmm30{k7},QWORD rdx-0x408                        }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x25, 0xf5                                     }, { vpmovsxdq zmm30{k7},ymm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x25, 0xf5                                     }, { vpmovsxdq zmm30{k7}{z},ymm29                                 }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x25, 0x31                                     }, { vpmovsxdq zmm30{k7},YWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x7d, 0x4f, 0x25, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovsxdq zmm30{k7},YWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x25, 0x72, 0x7f                               }, { vpmovsxdq zmm30{k7},YWORD rdx+0xfe0                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x25, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vpmovsxdq zmm30{k7},YWORD rdx+0x1000                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x25, 0x72, 0x80                               }, { vpmovsxdq zmm30{k7},YWORD rdx-0x1000                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x25, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vpmovsxdq zmm30{k7},YWORD rdx-0x1020                       }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x23, 0xf5                                     }, { vpmovsxwd zmm30{k7},ymm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x23, 0xf5                                     }, { vpmovsxwd zmm30{k7}{z},ymm29                                 }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x23, 0x31                                     }, { vpmovsxwd zmm30{k7},YWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x7d, 0x4f, 0x23, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovsxwd zmm30{k7},YWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x23, 0x72, 0x7f                               }, { vpmovsxwd zmm30{k7},YWORD rdx+0xfe0                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x23, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vpmovsxwd zmm30{k7},YWORD rdx+0x1000                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x23, 0x72, 0x80                               }, { vpmovsxwd zmm30{k7},YWORD rdx-0x1000                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x23, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vpmovsxwd zmm30{k7},YWORD rdx-0x1020                       }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x24, 0xf5                                     }, { vpmovsxwq zmm30{k7},xmm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x24, 0xf5                                     }, { vpmovsxwq zmm30{k7}{z},xmm29                                 }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x24, 0x31                                     }, { vpmovsxwq zmm30{k7},OWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x7d, 0x4f, 0x24, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovsxwq zmm30{k7},OWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x24, 0x72, 0x7f                               }, { vpmovsxwq zmm30{k7},OWORD rdx+0x7f0                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x24, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpmovsxwq zmm30{k7},OWORD rdx+0x800                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x24, 0x72, 0x80                               }, { vpmovsxwq zmm30{k7},OWORD rdx-0x800                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x24, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpmovsxwq zmm30{k7},OWORD rdx-0x810                        }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x31, 0xf5                                     }, { vpmovzxbd zmm30{k7},xmm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x31, 0xf5                                     }, { vpmovzxbd zmm30{k7}{z},xmm29                                 }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x31, 0x31                                     }, { vpmovzxbd zmm30{k7},OWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x7d, 0x4f, 0x31, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovzxbd zmm30{k7},OWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x31, 0x72, 0x7f                               }, { vpmovzxbd zmm30{k7},OWORD rdx+0x7f0                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x31, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpmovzxbd zmm30{k7},OWORD rdx+0x800                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x31, 0x72, 0x80                               }, { vpmovzxbd zmm30{k7},OWORD rdx-0x800                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x31, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpmovzxbd zmm30{k7},OWORD rdx-0x810                        }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x32, 0xf5                                     }, { vpmovzxbq zmm30{k7},xmm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x32, 0xf5                                     }, { vpmovzxbq zmm30{k7}{z},xmm29                                 }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x32, 0x31                                     }, { vpmovzxbq zmm30{k7},QWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x7d, 0x4f, 0x32, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovzxbq zmm30{k7},QWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x32, 0x72, 0x7f                               }, { vpmovzxbq zmm30{k7},QWORD rdx+0x3f8                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x32, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpmovzxbq zmm30{k7},QWORD rdx+0x400                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x32, 0x72, 0x80                               }, { vpmovzxbq zmm30{k7},QWORD rdx-0x400                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x32, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpmovzxbq zmm30{k7},QWORD rdx-0x408                        }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x35, 0xf5                                     }, { vpmovzxdq zmm30{k7},ymm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x35, 0xf5                                     }, { vpmovzxdq zmm30{k7}{z},ymm29                                 }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x35, 0x31                                     }, { vpmovzxdq zmm30{k7},YWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x7d, 0x4f, 0x35, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovzxdq zmm30{k7},YWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x35, 0x72, 0x7f                               }, { vpmovzxdq zmm30{k7},YWORD rdx+0xfe0                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x35, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vpmovzxdq zmm30{k7},YWORD rdx+0x1000                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x35, 0x72, 0x80                               }, { vpmovzxdq zmm30{k7},YWORD rdx-0x1000                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x35, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vpmovzxdq zmm30{k7},YWORD rdx-0x1020                       }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x33, 0xf5                                     }, { vpmovzxwd zmm30{k7},ymm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x33, 0xf5                                     }, { vpmovzxwd zmm30{k7}{z},ymm29                                 }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x33, 0x31                                     }, { vpmovzxwd zmm30{k7},YWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x7d, 0x4f, 0x33, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovzxwd zmm30{k7},YWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x33, 0x72, 0x7f                               }, { vpmovzxwd zmm30{k7},YWORD rdx+0xfe0                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x33, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vpmovzxwd zmm30{k7},YWORD rdx+0x1000                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x33, 0x72, 0x80                               }, { vpmovzxwd zmm30{k7},YWORD rdx-0x1000                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x33, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vpmovzxwd zmm30{k7},YWORD rdx-0x1020                       }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x34, 0xf5                                     }, { vpmovzxwq zmm30{k7},xmm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x34, 0xf5                                     }, { vpmovzxwq zmm30{k7}{z},xmm29                                 }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x34, 0x31                                     }, { vpmovzxwq zmm30{k7},OWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x7d, 0x4f, 0x34, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovzxwq zmm30{k7},OWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x34, 0x72, 0x7f                               }, { vpmovzxwq zmm30{k7},OWORD rdx+0x7f0                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x34, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpmovzxwq zmm30{k7},OWORD rdx+0x800                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x34, 0x72, 0x80                               }, { vpmovzxwq zmm30{k7},OWORD rdx-0x800                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x34, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpmovzxwq zmm30{k7},OWORD rdx-0x810                        }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x28, 0xf4                                     }, { vpmuldq zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x28, 0xf4                                     }, { vpmuldq zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x28, 0xf4                                     }, { vpmuldq zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x28, 0x31                                     }, { vpmuldq zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x28, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmuldq zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x28, 0x31                                     }, { vpmuldq zmm30,zmm29,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x28, 0x72, 0x7f                               }, { vpmuldq zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x28, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpmuldq zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x28, 0x72, 0x80                               }, { vpmuldq zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x28, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpmuldq zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x28, 0x72, 0x7f                               }, { vpmuldq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x28, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpmuldq zmm30,zmm29,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x28, 0x72, 0x80                               }, { vpmuldq zmm30,zmm29,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x28, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpmuldq zmm30,zmm29,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x40, 0xf4                                     }, { vpmulld zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x40, 0xf4                                     }, { vpmulld zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x40, 0xf4                                     }, { vpmulld zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x40, 0x31                                     }, { vpmulld zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x40, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmulld zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x40, 0x31                                     }, { vpmulld zmm30,zmm29,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x40, 0x72, 0x7f                               }, { vpmulld zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x40, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpmulld zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x40, 0x72, 0x80                               }, { vpmulld zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x40, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpmulld zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x40, 0x72, 0x7f                               }, { vpmulld zmm30,zmm29,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x40, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpmulld zmm30,zmm29,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x40, 0x72, 0x80                               }, { vpmulld zmm30,zmm29,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x40, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpmulld zmm30,zmm29,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0xf4, 0xf4                                     }, { vpmuludq zmm30,zmm29,zmm28                                   }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0xf4, 0xf4                                     }, { vpmuludq zmm30{k7},zmm29,zmm28                               }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0xf4, 0xf4                                     }, { vpmuludq zmm30{k7}{z},zmm29,zmm28                            }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xf4, 0x31                                     }, { vpmuludq zmm30,zmm29,ZWORD rcx                             }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0xf4, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmuludq zmm30,zmm29,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xf4, 0x31                                     }, { vpmuludq zmm30,zmm29,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xf4, 0x72, 0x7f                               }, { vpmuludq zmm30,zmm29,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xf4, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpmuludq zmm30,zmm29,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xf4, 0x72, 0x80                               }, { vpmuludq zmm30,zmm29,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xf4, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpmuludq zmm30,zmm29,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xf4, 0x72, 0x7f                               }, { vpmuludq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xf4, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpmuludq zmm30,zmm29,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xf4, 0x72, 0x80                               }, { vpmuludq zmm30,zmm29,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xf4, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpmuludq zmm30,zmm29,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x01, 0x15, 0x40, 0xeb, 0xf4                                     }, { vpord  zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x15, 0x47, 0xeb, 0xf4                                     }, { vpord  zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x15, 0xc7, 0xeb, 0xf4                                     }, { vpord  zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xeb, 0x31                                     }, { vpord  zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x15, 0x40, 0xeb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpord  zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xeb, 0x31                                     }, { vpord  zmm30,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xeb, 0x72, 0x7f                               }, { vpord  zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xeb, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpord  zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xeb, 0x72, 0x80                               }, { vpord  zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xeb, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpord  zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xeb, 0x72, 0x7f                               }, { vpord  zmm30,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xeb, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpord  zmm30,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xeb, 0x72, 0x80                               }, { vpord  zmm30,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xeb, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpord  zmm30,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0xeb, 0xf4                                     }, { vporq  zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0xeb, 0xf4                                     }, { vporq  zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0xeb, 0xf4                                     }, { vporq  zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xeb, 0x31                                     }, { vporq  zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0xeb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vporq  zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xeb, 0x31                                     }, { vporq  zmm30,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xeb, 0x72, 0x7f                               }, { vporq  zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xeb, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vporq  zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xeb, 0x72, 0x80                               }, { vporq  zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xeb, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vporq  zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xeb, 0x72, 0x7f                               }, { vporq  zmm30,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xeb, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vporq  zmm30,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xeb, 0x72, 0x80                               }, { vporq  zmm30,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xeb, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vporq  zmm30,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x02, 0x7d, 0x41, 0xa0, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vpscatterdd  r14+zmm31*8+0x7b{k1},zmm30                    }
+testcase	{ 0x62, 0x02, 0x7d, 0x41, 0xa0, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vpscatterdd  r14+zmm31*8+0x7b{k1},zmm30                    }
+testcase	{ 0x62, 0x02, 0x7d, 0x41, 0xa0, 0x74, 0x39, 0x40                         }, { vpscatterdd  r9+zmm31*1+0x100{k1},zmm30                    }
+testcase	{ 0x62, 0x22, 0x7d, 0x41, 0xa0, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vpscatterdd  rcx+zmm31*4+0x400{k1},zmm30                   }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0xa0, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vpscatterdq  r14+ymm31*8+0x7b{k1},zmm30                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0xa0, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vpscatterdq  r14+ymm31*8+0x7b{k1},zmm30                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0xa0, 0x74, 0x39, 0x20                         }, { vpscatterdq  r9+ymm31*1+0x100{k1},zmm30                    }
+testcase	{ 0x62, 0x22, 0xfd, 0x41, 0xa0, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vpscatterdq  rcx+ymm31*4+0x400{k1},zmm30                   }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0xa1, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vpscatterqq  r14+zmm31*8+0x7b{k1},zmm30                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0xa1, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vpscatterqq  r14+zmm31*8+0x7b{k1},zmm30                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0xa1, 0x74, 0x39, 0x20                         }, { vpscatterqq  r9+zmm31*1+0x100{k1},zmm30                    }
+testcase	{ 0x62, 0x22, 0xfd, 0x41, 0xa1, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vpscatterqq  rcx+zmm31*4+0x400{k1},zmm30                   }
+testcase	{ 0x62, 0x01, 0x7d, 0x48, 0x70, 0xf5, 0xab                               }, { vpshufd zmm30,zmm29,0xab                                     }
+testcase	{ 0x62, 0x01, 0x7d, 0x4f, 0x70, 0xf5, 0xab                               }, { vpshufd zmm30{k7},zmm29,0xab                                 }
+testcase	{ 0x62, 0x01, 0x7d, 0xcf, 0x70, 0xf5, 0xab                               }, { vpshufd zmm30{k7}{z},zmm29,0xab                              }
+testcase	{ 0x62, 0x01, 0x7d, 0x48, 0x70, 0xf5, 0x7b                               }, { vpshufd zmm30,zmm29,0x7b                                     }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x70, 0x31, 0x7b                               }, { vpshufd zmm30,ZWORD rcx,0x7b                               }
+testcase	{ 0x62, 0x21, 0x7d, 0x48, 0x70, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpshufd zmm30,ZWORD rax+r14*8+0x123,0x7b                   }
+testcase	{ 0x62, 0x61, 0x7d, 0x58, 0x70, 0x31, 0x7b                               }, { vpshufd zmm30,DWORD rcx{1to16},0x7b                        }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x70, 0x72, 0x7f, 0x7b                         }, { vpshufd zmm30,ZWORD rdx+0x1fc0,0x7b                        }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x70, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpshufd zmm30,ZWORD rdx+0x2000,0x7b                        }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x70, 0x72, 0x80, 0x7b                         }, { vpshufd zmm30,ZWORD rdx-0x2000,0x7b                        }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x70, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpshufd zmm30,ZWORD rdx-0x2040,0x7b                        }
+testcase	{ 0x62, 0x61, 0x7d, 0x58, 0x70, 0x72, 0x7f, 0x7b                         }, { vpshufd zmm30,DWORD rdx+0x1fc{1to16},0x7b                  }
+testcase	{ 0x62, 0x61, 0x7d, 0x58, 0x70, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vpshufd zmm30,DWORD rdx+0x200{1to16},0x7b                  }
+testcase	{ 0x62, 0x61, 0x7d, 0x58, 0x70, 0x72, 0x80, 0x7b                         }, { vpshufd zmm30,DWORD rdx-0x200{1to16},0x7b                  }
+testcase	{ 0x62, 0x61, 0x7d, 0x58, 0x70, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vpshufd zmm30,DWORD rdx-0x204{1to16},0x7b                  }
+testcase	{ 0x62, 0x01, 0x15, 0x47, 0xf2, 0xf4                                     }, { vpslld zmm30{k7},zmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x15, 0xc7, 0xf2, 0xf4                                     }, { vpslld zmm30{k7}{z},zmm29,xmm28                              }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xf2, 0x31                                     }, { vpslld zmm30{k7},zmm29,OWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x15, 0x47, 0xf2, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpslld zmm30{k7},zmm29,OWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xf2, 0x72, 0x7f                               }, { vpslld zmm30{k7},zmm29,OWORD rdx+0x7f0                     }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xf2, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpslld zmm30{k7},zmm29,OWORD rdx+0x800                     }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xf2, 0x72, 0x80                               }, { vpslld zmm30{k7},zmm29,OWORD rdx-0x800                     }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xf2, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpslld zmm30{k7},zmm29,OWORD rdx-0x810                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0xf3, 0xf4                                     }, { vpsllq zmm30{k7},zmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0xf3, 0xf4                                     }, { vpsllq zmm30{k7}{z},zmm29,xmm28                              }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xf3, 0x31                                     }, { vpsllq zmm30{k7},zmm29,OWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x95, 0x47, 0xf3, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsllq zmm30{k7},zmm29,OWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xf3, 0x72, 0x7f                               }, { vpsllq zmm30{k7},zmm29,OWORD rdx+0x7f0                     }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xf3, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpsllq zmm30{k7},zmm29,OWORD rdx+0x800                     }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xf3, 0x72, 0x80                               }, { vpsllq zmm30{k7},zmm29,OWORD rdx-0x800                     }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xf3, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpsllq zmm30{k7},zmm29,OWORD rdx-0x810                     }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x47, 0xf4                                     }, { vpsllvd zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x47, 0xf4                                     }, { vpsllvd zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x47, 0xf4                                     }, { vpsllvd zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x47, 0x31                                     }, { vpsllvd zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x47, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsllvd zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x47, 0x31                                     }, { vpsllvd zmm30,zmm29,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x47, 0x72, 0x7f                               }, { vpsllvd zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x47, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpsllvd zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x47, 0x72, 0x80                               }, { vpsllvd zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x47, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpsllvd zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x47, 0x72, 0x7f                               }, { vpsllvd zmm30,zmm29,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x47, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpsllvd zmm30,zmm29,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x47, 0x72, 0x80                               }, { vpsllvd zmm30,zmm29,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x47, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpsllvd zmm30,zmm29,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x47, 0xf4                                     }, { vpsllvq zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x47, 0xf4                                     }, { vpsllvq zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x47, 0xf4                                     }, { vpsllvq zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x47, 0x31                                     }, { vpsllvq zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x47, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsllvq zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x47, 0x31                                     }, { vpsllvq zmm30,zmm29,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x47, 0x72, 0x7f                               }, { vpsllvq zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x47, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpsllvq zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x47, 0x72, 0x80                               }, { vpsllvq zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x47, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpsllvq zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x47, 0x72, 0x7f                               }, { vpsllvq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x47, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpsllvq zmm30,zmm29,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x47, 0x72, 0x80                               }, { vpsllvq zmm30,zmm29,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x47, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpsllvq zmm30,zmm29,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x01, 0x15, 0x47, 0xe2, 0xf4                                     }, { vpsrad zmm30{k7},zmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x15, 0xc7, 0xe2, 0xf4                                     }, { vpsrad zmm30{k7}{z},zmm29,xmm28                              }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xe2, 0x31                                     }, { vpsrad zmm30{k7},zmm29,OWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x15, 0x47, 0xe2, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsrad zmm30{k7},zmm29,OWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xe2, 0x72, 0x7f                               }, { vpsrad zmm30{k7},zmm29,OWORD rdx+0x7f0                     }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xe2, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpsrad zmm30{k7},zmm29,OWORD rdx+0x800                     }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xe2, 0x72, 0x80                               }, { vpsrad zmm30{k7},zmm29,OWORD rdx-0x800                     }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xe2, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpsrad zmm30{k7},zmm29,OWORD rdx-0x810                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0xe2, 0xf4                                     }, { vpsraq zmm30{k7},zmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0xe2, 0xf4                                     }, { vpsraq zmm30{k7}{z},zmm29,xmm28                              }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xe2, 0x31                                     }, { vpsraq zmm30{k7},zmm29,OWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x95, 0x47, 0xe2, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsraq zmm30{k7},zmm29,OWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xe2, 0x72, 0x7f                               }, { vpsraq zmm30{k7},zmm29,OWORD rdx+0x7f0                     }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xe2, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpsraq zmm30{k7},zmm29,OWORD rdx+0x800                     }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xe2, 0x72, 0x80                               }, { vpsraq zmm30{k7},zmm29,OWORD rdx-0x800                     }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xe2, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpsraq zmm30{k7},zmm29,OWORD rdx-0x810                     }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x46, 0xf4                                     }, { vpsravd zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x46, 0xf4                                     }, { vpsravd zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x46, 0xf4                                     }, { vpsravd zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x46, 0x31                                     }, { vpsravd zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x46, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsravd zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x46, 0x31                                     }, { vpsravd zmm30,zmm29,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x46, 0x72, 0x7f                               }, { vpsravd zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x46, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpsravd zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x46, 0x72, 0x80                               }, { vpsravd zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x46, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpsravd zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x46, 0x72, 0x7f                               }, { vpsravd zmm30,zmm29,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x46, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpsravd zmm30,zmm29,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x46, 0x72, 0x80                               }, { vpsravd zmm30,zmm29,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x46, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpsravd zmm30,zmm29,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x46, 0xf4                                     }, { vpsravq zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x46, 0xf4                                     }, { vpsravq zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x46, 0xf4                                     }, { vpsravq zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x46, 0x31                                     }, { vpsravq zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x46, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsravq zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x46, 0x31                                     }, { vpsravq zmm30,zmm29,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x46, 0x72, 0x7f                               }, { vpsravq zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x46, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpsravq zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x46, 0x72, 0x80                               }, { vpsravq zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x46, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpsravq zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x46, 0x72, 0x7f                               }, { vpsravq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x46, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpsravq zmm30,zmm29,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x46, 0x72, 0x80                               }, { vpsravq zmm30,zmm29,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x46, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpsravq zmm30,zmm29,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x01, 0x15, 0x47, 0xd2, 0xf4                                     }, { vpsrld zmm30{k7},zmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x15, 0xc7, 0xd2, 0xf4                                     }, { vpsrld zmm30{k7}{z},zmm29,xmm28                              }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xd2, 0x31                                     }, { vpsrld zmm30{k7},zmm29,OWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x15, 0x47, 0xd2, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsrld zmm30{k7},zmm29,OWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xd2, 0x72, 0x7f                               }, { vpsrld zmm30{k7},zmm29,OWORD rdx+0x7f0                     }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xd2, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpsrld zmm30{k7},zmm29,OWORD rdx+0x800                     }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xd2, 0x72, 0x80                               }, { vpsrld zmm30{k7},zmm29,OWORD rdx-0x800                     }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xd2, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpsrld zmm30{k7},zmm29,OWORD rdx-0x810                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0xd3, 0xf4                                     }, { vpsrlq zmm30{k7},zmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0xd3, 0xf4                                     }, { vpsrlq zmm30{k7}{z},zmm29,xmm28                              }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xd3, 0x31                                     }, { vpsrlq zmm30{k7},zmm29,OWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x95, 0x47, 0xd3, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsrlq zmm30{k7},zmm29,OWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xd3, 0x72, 0x7f                               }, { vpsrlq zmm30{k7},zmm29,OWORD rdx+0x7f0                     }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xd3, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpsrlq zmm30{k7},zmm29,OWORD rdx+0x800                     }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xd3, 0x72, 0x80                               }, { vpsrlq zmm30{k7},zmm29,OWORD rdx-0x800                     }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xd3, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpsrlq zmm30{k7},zmm29,OWORD rdx-0x810                     }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x45, 0xf4                                     }, { vpsrlvd zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x45, 0xf4                                     }, { vpsrlvd zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x45, 0xf4                                     }, { vpsrlvd zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x45, 0x31                                     }, { vpsrlvd zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x45, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsrlvd zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x45, 0x31                                     }, { vpsrlvd zmm30,zmm29,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x45, 0x72, 0x7f                               }, { vpsrlvd zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x45, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpsrlvd zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x45, 0x72, 0x80                               }, { vpsrlvd zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x45, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpsrlvd zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x45, 0x72, 0x7f                               }, { vpsrlvd zmm30,zmm29,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x45, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpsrlvd zmm30,zmm29,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x45, 0x72, 0x80                               }, { vpsrlvd zmm30,zmm29,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x45, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpsrlvd zmm30,zmm29,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x45, 0xf4                                     }, { vpsrlvq zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x45, 0xf4                                     }, { vpsrlvq zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x45, 0xf4                                     }, { vpsrlvq zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x45, 0x31                                     }, { vpsrlvq zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x45, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsrlvq zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x45, 0x31                                     }, { vpsrlvq zmm30,zmm29,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x45, 0x72, 0x7f                               }, { vpsrlvq zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x45, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpsrlvq zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x45, 0x72, 0x80                               }, { vpsrlvq zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x45, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpsrlvq zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x45, 0x72, 0x7f                               }, { vpsrlvq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x45, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpsrlvq zmm30,zmm29,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x45, 0x72, 0x80                               }, { vpsrlvq zmm30,zmm29,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x45, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpsrlvq zmm30,zmm29,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x91, 0x0d, 0x40, 0x72, 0xd5, 0xab                               }, { vpsrld zmm30,zmm29,0xab                                      }
+testcase	{ 0x62, 0x91, 0x0d, 0x47, 0x72, 0xd5, 0xab                               }, { vpsrld zmm30{k7},zmm29,0xab                                  }
+testcase	{ 0x62, 0x91, 0x0d, 0xc7, 0x72, 0xd5, 0xab                               }, { vpsrld zmm30{k7}{z},zmm29,0xab                               }
+testcase	{ 0x62, 0x91, 0x0d, 0x40, 0x72, 0xd5, 0x7b                               }, { vpsrld zmm30,zmm29,0x7b                                      }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x11, 0x7b                               }, { vpsrld zmm30,ZWORD rcx,0x7b                                }
+testcase	{ 0x62, 0xb1, 0x0d, 0x40, 0x72, 0x94, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpsrld zmm30,ZWORD rax+r14*8+0x123,0x7b                    }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x11, 0x7b                               }, { vpsrld zmm30,DWORD rcx{1to16},0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x52, 0x7f, 0x7b                         }, { vpsrld zmm30,ZWORD rdx+0x1fc0,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x92, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpsrld zmm30,ZWORD rdx+0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x52, 0x80, 0x7b                         }, { vpsrld zmm30,ZWORD rdx-0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x92, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpsrld zmm30,ZWORD rdx-0x2040,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x52, 0x7f, 0x7b                         }, { vpsrld zmm30,DWORD rdx+0x1fc{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x92, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vpsrld zmm30,DWORD rdx+0x200{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x52, 0x80, 0x7b                         }, { vpsrld zmm30,DWORD rdx-0x200{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x92, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vpsrld zmm30,DWORD rdx-0x204{1to16},0x7b                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0x73, 0xd5, 0xab                               }, { vpsrlq zmm30,zmm29,0xab                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0x73, 0xd5, 0xab                               }, { vpsrlq zmm30{k7},zmm29,0xab                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0xc7, 0x73, 0xd5, 0xab                               }, { vpsrlq zmm30{k7}{z},zmm29,0xab                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0x73, 0xd5, 0x7b                               }, { vpsrlq zmm30,zmm29,0x7b                                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x73, 0x11, 0x7b                               }, { vpsrlq zmm30,ZWORD rcx,0x7b                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0x73, 0x94, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpsrlq zmm30,ZWORD rax+r14*8+0x123,0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x73, 0x11, 0x7b                               }, { vpsrlq zmm30,QWORD rcx{1to8},0x7b                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x73, 0x52, 0x7f, 0x7b                         }, { vpsrlq zmm30,ZWORD rdx+0x1fc0,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x73, 0x92, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpsrlq zmm30,ZWORD rdx+0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x73, 0x52, 0x80, 0x7b                         }, { vpsrlq zmm30,ZWORD rdx-0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x73, 0x92, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpsrlq zmm30,ZWORD rdx-0x2040,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x73, 0x52, 0x7f, 0x7b                         }, { vpsrlq zmm30,QWORD rdx+0x3f8{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x73, 0x92, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vpsrlq zmm30,QWORD rdx+0x400{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x73, 0x52, 0x80, 0x7b                         }, { vpsrlq zmm30,QWORD rdx-0x400{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x73, 0x92, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vpsrlq zmm30,QWORD rdx-0x408{1to8},0x7b                    }
+testcase	{ 0x62, 0x01, 0x15, 0x40, 0xfa, 0xf4                                     }, { vpsubd zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x15, 0x47, 0xfa, 0xf4                                     }, { vpsubd zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x15, 0xc7, 0xfa, 0xf4                                     }, { vpsubd zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xfa, 0x31                                     }, { vpsubd zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x15, 0x40, 0xfa, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsubd zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xfa, 0x31                                     }, { vpsubd zmm30,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xfa, 0x72, 0x7f                               }, { vpsubd zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xfa, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpsubd zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xfa, 0x72, 0x80                               }, { vpsubd zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xfa, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpsubd zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xfa, 0x72, 0x7f                               }, { vpsubd zmm30,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xfa, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpsubd zmm30,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xfa, 0x72, 0x80                               }, { vpsubd zmm30,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xfa, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpsubd zmm30,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0xfb, 0xf4                                     }, { vpsubq zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0xfb, 0xf4                                     }, { vpsubq zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0xfb, 0xf4                                     }, { vpsubq zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xfb, 0x31                                     }, { vpsubq zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0xfb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsubq zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xfb, 0x31                                     }, { vpsubq zmm30,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xfb, 0x72, 0x7f                               }, { vpsubq zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xfb, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpsubq zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xfb, 0x72, 0x80                               }, { vpsubq zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xfb, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpsubq zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xfb, 0x72, 0x7f                               }, { vpsubq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xfb, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpsubq zmm30,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xfb, 0x72, 0x80                               }, { vpsubq zmm30,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xfb, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpsubq zmm30,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x92, 0x0d, 0x40, 0x27, 0xed                                     }, { vptestmd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x92, 0x0d, 0x47, 0x27, 0xed                                     }, { vptestmd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0xf2, 0x0d, 0x40, 0x27, 0x29                                     }, { vptestmd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb2, 0x0d, 0x40, 0x27, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vptestmd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf2, 0x0d, 0x50, 0x27, 0x29                                     }, { vptestmd k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf2, 0x0d, 0x40, 0x27, 0x6a, 0x7f                               }, { vptestmd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf2, 0x0d, 0x40, 0x27, 0xaa, 0x00, 0x20, 0x00, 0x00             }, { vptestmd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf2, 0x0d, 0x40, 0x27, 0x6a, 0x80                               }, { vptestmd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf2, 0x0d, 0x40, 0x27, 0xaa, 0xc0, 0xdf, 0xff, 0xff             }, { vptestmd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf2, 0x0d, 0x50, 0x27, 0x6a, 0x7f                               }, { vptestmd k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf2, 0x0d, 0x50, 0x27, 0xaa, 0x00, 0x02, 0x00, 0x00             }, { vptestmd k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf2, 0x0d, 0x50, 0x27, 0x6a, 0x80                               }, { vptestmd k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf2, 0x0d, 0x50, 0x27, 0xaa, 0xfc, 0xfd, 0xff, 0xff             }, { vptestmd k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x92, 0x8d, 0x40, 0x27, 0xed                                     }, { vptestmq k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x92, 0x8d, 0x47, 0x27, 0xed                                     }, { vptestmq k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x27, 0x29                                     }, { vptestmq k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb2, 0x8d, 0x40, 0x27, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vptestmq k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x27, 0x29                                     }, { vptestmq k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x27, 0x6a, 0x7f                               }, { vptestmq k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x27, 0xaa, 0x00, 0x20, 0x00, 0x00             }, { vptestmq k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x27, 0x6a, 0x80                               }, { vptestmq k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x27, 0xaa, 0xc0, 0xdf, 0xff, 0xff             }, { vptestmq k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x27, 0x6a, 0x7f                               }, { vptestmq k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x27, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vptestmq k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x27, 0x6a, 0x80                               }, { vptestmq k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x27, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vptestmq k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x01, 0x15, 0x40, 0x6a, 0xf4                                     }, { vpunpckhdq zmm30,zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x15, 0x47, 0x6a, 0xf4                                     }, { vpunpckhdq zmm30{k7},zmm29,zmm28                             }
+testcase	{ 0x62, 0x01, 0x15, 0xc7, 0x6a, 0xf4                                     }, { vpunpckhdq zmm30{k7}{z},zmm29,zmm28                          }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0x6a, 0x31                                     }, { vpunpckhdq zmm30,zmm29,ZWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x15, 0x40, 0x6a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpunpckhdq zmm30,zmm29,ZWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0x6a, 0x31                                     }, { vpunpckhdq zmm30,zmm29,DWORD rcx{1to16}                    }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0x6a, 0x72, 0x7f                               }, { vpunpckhdq zmm30,zmm29,ZWORD rdx+0x1fc0                    }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0x6a, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpunpckhdq zmm30,zmm29,ZWORD rdx+0x2000                    }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0x6a, 0x72, 0x80                               }, { vpunpckhdq zmm30,zmm29,ZWORD rdx-0x2000                    }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0x6a, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpunpckhdq zmm30,zmm29,ZWORD rdx-0x2040                    }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0x6a, 0x72, 0x7f                               }, { vpunpckhdq zmm30,zmm29,DWORD rdx+0x1fc{1to16}              }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0x6a, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpunpckhdq zmm30,zmm29,DWORD rdx+0x200{1to16}              }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0x6a, 0x72, 0x80                               }, { vpunpckhdq zmm30,zmm29,DWORD rdx-0x200{1to16}              }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0x6a, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpunpckhdq zmm30,zmm29,DWORD rdx-0x204{1to16}              }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0x6d, 0xf4                                     }, { vpunpckhqdq zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0x6d, 0xf4                                     }, { vpunpckhqdq zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0x6d, 0xf4                                     }, { vpunpckhqdq zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x6d, 0x31                                     }, { vpunpckhqdq zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0x6d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpunpckhqdq zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x6d, 0x31                                     }, { vpunpckhqdq zmm30,zmm29,QWORD rcx{1to8}                    }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x6d, 0x72, 0x7f                               }, { vpunpckhqdq zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x6d, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpunpckhqdq zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x6d, 0x72, 0x80                               }, { vpunpckhqdq zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x6d, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpunpckhqdq zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x6d, 0x72, 0x7f                               }, { vpunpckhqdq zmm30,zmm29,QWORD rdx+0x3f8{1to8}              }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x6d, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpunpckhqdq zmm30,zmm29,QWORD rdx+0x400{1to8}              }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x6d, 0x72, 0x80                               }, { vpunpckhqdq zmm30,zmm29,QWORD rdx-0x400{1to8}              }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x6d, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpunpckhqdq zmm30,zmm29,QWORD rdx-0x408{1to8}              }
+testcase	{ 0x62, 0x01, 0x15, 0x40, 0x62, 0xf4                                     }, { vpunpckldq zmm30,zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x15, 0x47, 0x62, 0xf4                                     }, { vpunpckldq zmm30{k7},zmm29,zmm28                             }
+testcase	{ 0x62, 0x01, 0x15, 0xc7, 0x62, 0xf4                                     }, { vpunpckldq zmm30{k7}{z},zmm29,zmm28                          }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0x62, 0x31                                     }, { vpunpckldq zmm30,zmm29,ZWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x15, 0x40, 0x62, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpunpckldq zmm30,zmm29,ZWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0x62, 0x31                                     }, { vpunpckldq zmm30,zmm29,DWORD rcx{1to16}                    }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0x62, 0x72, 0x7f                               }, { vpunpckldq zmm30,zmm29,ZWORD rdx+0x1fc0                    }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0x62, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpunpckldq zmm30,zmm29,ZWORD rdx+0x2000                    }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0x62, 0x72, 0x80                               }, { vpunpckldq zmm30,zmm29,ZWORD rdx-0x2000                    }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0x62, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpunpckldq zmm30,zmm29,ZWORD rdx-0x2040                    }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0x62, 0x72, 0x7f                               }, { vpunpckldq zmm30,zmm29,DWORD rdx+0x1fc{1to16}              }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0x62, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpunpckldq zmm30,zmm29,DWORD rdx+0x200{1to16}              }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0x62, 0x72, 0x80                               }, { vpunpckldq zmm30,zmm29,DWORD rdx-0x200{1to16}              }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0x62, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpunpckldq zmm30,zmm29,DWORD rdx-0x204{1to16}              }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0x6c, 0xf4                                     }, { vpunpcklqdq zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0x6c, 0xf4                                     }, { vpunpcklqdq zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0x6c, 0xf4                                     }, { vpunpcklqdq zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x6c, 0x31                                     }, { vpunpcklqdq zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0x6c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpunpcklqdq zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x6c, 0x31                                     }, { vpunpcklqdq zmm30,zmm29,QWORD rcx{1to8}                    }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x6c, 0x72, 0x7f                               }, { vpunpcklqdq zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x6c, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpunpcklqdq zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x6c, 0x72, 0x80                               }, { vpunpcklqdq zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x6c, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpunpcklqdq zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x6c, 0x72, 0x7f                               }, { vpunpcklqdq zmm30,zmm29,QWORD rdx+0x3f8{1to8}              }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x6c, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpunpcklqdq zmm30,zmm29,QWORD rdx+0x400{1to8}              }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x6c, 0x72, 0x80                               }, { vpunpcklqdq zmm30,zmm29,QWORD rdx-0x400{1to8}              }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x6c, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpunpcklqdq zmm30,zmm29,QWORD rdx-0x408{1to8}              }
+testcase	{ 0x62, 0x01, 0x15, 0x40, 0xef, 0xf4                                     }, { vpxord zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x15, 0x47, 0xef, 0xf4                                     }, { vpxord zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x15, 0xc7, 0xef, 0xf4                                     }, { vpxord zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xef, 0x31                                     }, { vpxord zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x15, 0x40, 0xef, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpxord zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xef, 0x31                                     }, { vpxord zmm30,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xef, 0x72, 0x7f                               }, { vpxord zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xef, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpxord zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xef, 0x72, 0x80                               }, { vpxord zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xef, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpxord zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xef, 0x72, 0x7f                               }, { vpxord zmm30,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xef, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpxord zmm30,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xef, 0x72, 0x80                               }, { vpxord zmm30,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xef, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpxord zmm30,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0xef, 0xf4                                     }, { vpxorq zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0xef, 0xf4                                     }, { vpxorq zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0xef, 0xf4                                     }, { vpxorq zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xef, 0x31                                     }, { vpxorq zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0xef, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpxorq zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xef, 0x31                                     }, { vpxorq zmm30,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xef, 0x72, 0x7f                               }, { vpxorq zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xef, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpxorq zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xef, 0x72, 0x80                               }, { vpxorq zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xef, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpxorq zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xef, 0x72, 0x7f                               }, { vpxorq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xef, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpxorq zmm30,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xef, 0x72, 0x80                               }, { vpxorq zmm30,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xef, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpxorq zmm30,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0x4c, 0xf5                                     }, { vrcp14pd zmm30,zmm29                                         }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0x4c, 0xf5                                     }, { vrcp14pd zmm30{k7},zmm29                                     }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0x4c, 0xf5                                     }, { vrcp14pd zmm30{k7}{z},zmm29                                  }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x4c, 0x31                                     }, { vrcp14pd zmm30,ZWORD rcx                                   }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x4c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrcp14pd zmm30,ZWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x4c, 0x31                                     }, { vrcp14pd zmm30,QWORD rcx{1to8}                             }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x4c, 0x72, 0x7f                               }, { vrcp14pd zmm30,ZWORD rdx+0x1fc0                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x4c, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vrcp14pd zmm30,ZWORD rdx+0x2000                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x4c, 0x72, 0x80                               }, { vrcp14pd zmm30,ZWORD rdx-0x2000                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x4c, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vrcp14pd zmm30,ZWORD rdx-0x2040                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x4c, 0x72, 0x7f                               }, { vrcp14pd zmm30,QWORD rdx+0x3f8{1to8}                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x4c, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vrcp14pd zmm30,QWORD rdx+0x400{1to8}                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x4c, 0x72, 0x80                               }, { vrcp14pd zmm30,QWORD rdx-0x400{1to8}                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x4c, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vrcp14pd zmm30,QWORD rdx-0x408{1to8}                       }
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0x4c, 0xf5                                     }, { vrcp14ps zmm30,zmm29                                         }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x4c, 0xf5                                     }, { vrcp14ps zmm30{k7},zmm29                                     }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x4c, 0xf5                                     }, { vrcp14ps zmm30{k7}{z},zmm29                                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x4c, 0x31                                     }, { vrcp14ps zmm30,ZWORD rcx                                   }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x4c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrcp14ps zmm30,ZWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x4c, 0x31                                     }, { vrcp14ps zmm30,DWORD rcx{1to16}                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x4c, 0x72, 0x7f                               }, { vrcp14ps zmm30,ZWORD rdx+0x1fc0                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x4c, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vrcp14ps zmm30,ZWORD rdx+0x2000                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x4c, 0x72, 0x80                               }, { vrcp14ps zmm30,ZWORD rdx-0x2000                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x4c, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vrcp14ps zmm30,ZWORD rdx-0x2040                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x4c, 0x72, 0x7f                               }, { vrcp14ps zmm30,DWORD rdx+0x1fc{1to16}                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x4c, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vrcp14ps zmm30,DWORD rdx+0x200{1to16}                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x4c, 0x72, 0x80                               }, { vrcp14ps zmm30,DWORD rdx-0x200{1to16}                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x4c, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vrcp14ps zmm30,DWORD rdx-0x204{1to16}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0x4d, 0xf4                                     }, { vrcp14sd xmm30{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0x4d, 0xf4                                     }, { vrcp14sd xmm30{k7}{z},xmm29,xmm28                            }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x4d, 0x31                                     }, { vrcp14sd xmm30{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0x4d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrcp14sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x4d, 0x72, 0x7f                               }, { vrcp14sd xmm30{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x4d, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vrcp14sd xmm30{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x4d, 0x72, 0x80                               }, { vrcp14sd xmm30{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x4d, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vrcp14sd xmm30{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0x4d, 0xf4                                     }, { vrcp14ss xmm30{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0x4d, 0xf4                                     }, { vrcp14ss xmm30{k7}{z},xmm29,xmm28                            }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x4d, 0x31                                     }, { vrcp14ss xmm30{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0x4d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrcp14ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x4d, 0x72, 0x7f                               }, { vrcp14ss xmm30{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x4d, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vrcp14ss xmm30{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x4d, 0x72, 0x80                               }, { vrcp14ss xmm30{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x4d, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vrcp14ss xmm30{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0x4e, 0xf5                                     }, { vrsqrt14pd zmm30,zmm29                                       }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0x4e, 0xf5                                     }, { vrsqrt14pd zmm30{k7},zmm29                                   }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0x4e, 0xf5                                     }, { vrsqrt14pd zmm30{k7}{z},zmm29                                }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x4e, 0x31                                     }, { vrsqrt14pd zmm30,ZWORD rcx                                 }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x4e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrsqrt14pd zmm30,ZWORD rax+r14*8+0x123                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x4e, 0x31                                     }, { vrsqrt14pd zmm30,QWORD rcx{1to8}                           }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x4e, 0x72, 0x7f                               }, { vrsqrt14pd zmm30,ZWORD rdx+0x1fc0                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x4e, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vrsqrt14pd zmm30,ZWORD rdx+0x2000                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x4e, 0x72, 0x80                               }, { vrsqrt14pd zmm30,ZWORD rdx-0x2000                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x4e, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vrsqrt14pd zmm30,ZWORD rdx-0x2040                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x4e, 0x72, 0x7f                               }, { vrsqrt14pd zmm30,QWORD rdx+0x3f8{1to8}                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x4e, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vrsqrt14pd zmm30,QWORD rdx+0x400{1to8}                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x4e, 0x72, 0x80                               }, { vrsqrt14pd zmm30,QWORD rdx-0x400{1to8}                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x4e, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vrsqrt14pd zmm30,QWORD rdx-0x408{1to8}                     }
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0x4e, 0xf5                                     }, { vrsqrt14ps zmm30,zmm29                                       }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x4e, 0xf5                                     }, { vrsqrt14ps zmm30{k7},zmm29                                   }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x4e, 0xf5                                     }, { vrsqrt14ps zmm30{k7}{z},zmm29                                }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x4e, 0x31                                     }, { vrsqrt14ps zmm30,ZWORD rcx                                 }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x4e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrsqrt14ps zmm30,ZWORD rax+r14*8+0x123                     }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x4e, 0x31                                     }, { vrsqrt14ps zmm30,DWORD rcx{1to16}                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x4e, 0x72, 0x7f                               }, { vrsqrt14ps zmm30,ZWORD rdx+0x1fc0                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x4e, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vrsqrt14ps zmm30,ZWORD rdx+0x2000                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x4e, 0x72, 0x80                               }, { vrsqrt14ps zmm30,ZWORD rdx-0x2000                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x4e, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vrsqrt14ps zmm30,ZWORD rdx-0x2040                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x4e, 0x72, 0x7f                               }, { vrsqrt14ps zmm30,DWORD rdx+0x1fc{1to16}                    }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x4e, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vrsqrt14ps zmm30,DWORD rdx+0x200{1to16}                    }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x4e, 0x72, 0x80                               }, { vrsqrt14ps zmm30,DWORD rdx-0x200{1to16}                    }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x4e, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vrsqrt14ps zmm30,DWORD rdx-0x204{1to16}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0x4f, 0xf4                                     }, { vrsqrt14sd xmm30{k7},xmm29,xmm28                             }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0x4f, 0xf4                                     }, { vrsqrt14sd xmm30{k7}{z},xmm29,xmm28                          }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x4f, 0x31                                     }, { vrsqrt14sd xmm30{k7},xmm29,QWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0x4f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrsqrt14sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x4f, 0x72, 0x7f                               }, { vrsqrt14sd xmm30{k7},xmm29,QWORD rdx+0x3f8                 }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x4f, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vrsqrt14sd xmm30{k7},xmm29,QWORD rdx+0x400                 }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x4f, 0x72, 0x80                               }, { vrsqrt14sd xmm30{k7},xmm29,QWORD rdx-0x400                 }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x4f, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vrsqrt14sd xmm30{k7},xmm29,QWORD rdx-0x408                 }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0x4f, 0xf4                                     }, { vrsqrt14ss xmm30{k7},xmm29,xmm28                             }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0x4f, 0xf4                                     }, { vrsqrt14ss xmm30{k7}{z},xmm29,xmm28                          }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x4f, 0x31                                     }, { vrsqrt14ss xmm30{k7},xmm29,DWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0x4f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrsqrt14ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x4f, 0x72, 0x7f                               }, { vrsqrt14ss xmm30{k7},xmm29,DWORD rdx+0x1fc                 }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x4f, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vrsqrt14ss xmm30{k7},xmm29,DWORD rdx+0x200                 }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x4f, 0x72, 0x80                               }, { vrsqrt14ss xmm30{k7},xmm29,DWORD rdx-0x200                 }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x4f, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vrsqrt14ss xmm30{k7},xmm29,DWORD rdx-0x204                 }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0xa2, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterdpd  r14+ymm31*8+0x7b{k1},zmm30                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0xa2, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterdpd  r14+ymm31*8+0x7b{k1},zmm30                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0xa2, 0x74, 0x39, 0x20                         }, { vscatterdpd  r9+ymm31*1+0x100{k1},zmm30                    }
+testcase	{ 0x62, 0x22, 0xfd, 0x41, 0xa2, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vscatterdpd  rcx+ymm31*4+0x400{k1},zmm30                   }
+testcase	{ 0x62, 0x02, 0x7d, 0x41, 0xa2, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterdps  r14+zmm31*8+0x7b{k1},zmm30                    }
+testcase	{ 0x62, 0x02, 0x7d, 0x41, 0xa2, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterdps  r14+zmm31*8+0x7b{k1},zmm30                    }
+testcase	{ 0x62, 0x02, 0x7d, 0x41, 0xa2, 0x74, 0x39, 0x40                         }, { vscatterdps  r9+zmm31*1+0x100{k1},zmm30                    }
+testcase	{ 0x62, 0x22, 0x7d, 0x41, 0xa2, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vscatterdps  rcx+zmm31*4+0x400{k1},zmm30                   }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0xa3, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterqpd  r14+zmm31*8+0x7b{k1},zmm30                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0xa3, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterqpd  r14+zmm31*8+0x7b{k1},zmm30                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0xa3, 0x74, 0x39, 0x20                         }, { vscatterqpd  r9+zmm31*1+0x100{k1},zmm30                    }
+testcase	{ 0x62, 0x22, 0xfd, 0x41, 0xa3, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vscatterqpd  rcx+zmm31*4+0x400{k1},zmm30                   }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0xc6, 0xf4, 0xab                               }, { vshufpd zmm30,zmm29,zmm28,0xab                               }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0xc6, 0xf4, 0xab                               }, { vshufpd zmm30{k7},zmm29,zmm28,0xab                           }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0xc6, 0xf4, 0xab                               }, { vshufpd zmm30{k7}{z},zmm29,zmm28,0xab                        }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0xc6, 0xf4, 0x7b                               }, { vshufpd zmm30,zmm29,zmm28,0x7b                               }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xc6, 0x31, 0x7b                               }, { vshufpd zmm30,zmm29,ZWORD rcx,0x7b                         }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0xc6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vshufpd zmm30,zmm29,ZWORD rax+r14*8+0x123,0x7b             }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xc6, 0x31, 0x7b                               }, { vshufpd zmm30,zmm29,QWORD rcx{1to8},0x7b                   }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xc6, 0x72, 0x7f, 0x7b                         }, { vshufpd zmm30,zmm29,ZWORD rdx+0x1fc0,0x7b                  }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xc6, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vshufpd zmm30,zmm29,ZWORD rdx+0x2000,0x7b                  }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xc6, 0x72, 0x80, 0x7b                         }, { vshufpd zmm30,zmm29,ZWORD rdx-0x2000,0x7b                  }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xc6, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vshufpd zmm30,zmm29,ZWORD rdx-0x2040,0x7b                  }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xc6, 0x72, 0x7f, 0x7b                         }, { vshufpd zmm30,zmm29,QWORD rdx+0x3f8{1to8},0x7b             }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xc6, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vshufpd zmm30,zmm29,QWORD rdx+0x400{1to8},0x7b             }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xc6, 0x72, 0x80, 0x7b                         }, { vshufpd zmm30,zmm29,QWORD rdx-0x400{1to8},0x7b             }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xc6, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vshufpd zmm30,zmm29,QWORD rdx-0x408{1to8},0x7b             }
+testcase	{ 0x62, 0x01, 0x14, 0x40, 0xc6, 0xf4, 0xab                               }, { vshufps zmm30,zmm29,zmm28,0xab                               }
+testcase	{ 0x62, 0x01, 0x14, 0x47, 0xc6, 0xf4, 0xab                               }, { vshufps zmm30{k7},zmm29,zmm28,0xab                           }
+testcase	{ 0x62, 0x01, 0x14, 0xc7, 0xc6, 0xf4, 0xab                               }, { vshufps zmm30{k7}{z},zmm29,zmm28,0xab                        }
+testcase	{ 0x62, 0x01, 0x14, 0x40, 0xc6, 0xf4, 0x7b                               }, { vshufps zmm30,zmm29,zmm28,0x7b                               }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0xc6, 0x31, 0x7b                               }, { vshufps zmm30,zmm29,ZWORD rcx,0x7b                         }
+testcase	{ 0x62, 0x21, 0x14, 0x40, 0xc6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vshufps zmm30,zmm29,ZWORD rax+r14*8+0x123,0x7b             }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0xc6, 0x31, 0x7b                               }, { vshufps zmm30,zmm29,DWORD rcx{1to16},0x7b                  }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0xc6, 0x72, 0x7f, 0x7b                         }, { vshufps zmm30,zmm29,ZWORD rdx+0x1fc0,0x7b                  }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0xc6, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vshufps zmm30,zmm29,ZWORD rdx+0x2000,0x7b                  }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0xc6, 0x72, 0x80, 0x7b                         }, { vshufps zmm30,zmm29,ZWORD rdx-0x2000,0x7b                  }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0xc6, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vshufps zmm30,zmm29,ZWORD rdx-0x2040,0x7b                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0xc6, 0x72, 0x7f, 0x7b                         }, { vshufps zmm30,zmm29,DWORD rdx+0x1fc{1to16},0x7b            }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0xc6, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vshufps zmm30,zmm29,DWORD rdx+0x200{1to16},0x7b            }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0xc6, 0x72, 0x80, 0x7b                         }, { vshufps zmm30,zmm29,DWORD rdx-0x200{1to16},0x7b            }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0xc6, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vshufps zmm30,zmm29,DWORD rdx-0x204{1to16},0x7b            }
+testcase	{ 0x62, 0x01, 0xfd, 0x48, 0x51, 0xf5                                     }, { vsqrtpd zmm30,zmm29                                          }
+testcase	{ 0x62, 0x01, 0xfd, 0x4f, 0x51, 0xf5                                     }, { vsqrtpd zmm30{k7},zmm29                                      }
+testcase	{ 0x62, 0x01, 0xfd, 0xcf, 0x51, 0xf5                                     }, { vsqrtpd zmm30{k7}{z},zmm29                                   }
+testcase	{ 0x62, 0x01, 0xfd, 0x18, 0x51, 0xf5                                     }, { vsqrtpd zmm30,zmm29,{rn-sae}                                 }
+testcase	{ 0x62, 0x01, 0xfd, 0x58, 0x51, 0xf5                                     }, { vsqrtpd zmm30,zmm29,{ru-sae}                                 }
+testcase	{ 0x62, 0x01, 0xfd, 0x38, 0x51, 0xf5                                     }, { vsqrtpd zmm30,zmm29,{rd-sae}                                 }
+testcase	{ 0x62, 0x01, 0xfd, 0x78, 0x51, 0xf5                                     }, { vsqrtpd zmm30,zmm29,{rz-sae}                                 }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x51, 0x31                                     }, { vsqrtpd zmm30,ZWORD rcx                                    }
+testcase	{ 0x62, 0x21, 0xfd, 0x48, 0x51, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vsqrtpd zmm30,ZWORD rax+r14*8+0x123                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x58, 0x51, 0x31                                     }, { vsqrtpd zmm30,QWORD rcx{1to8}                              }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x51, 0x72, 0x7f                               }, { vsqrtpd zmm30,ZWORD rdx+0x1fc0                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x51, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vsqrtpd zmm30,ZWORD rdx+0x2000                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x51, 0x72, 0x80                               }, { vsqrtpd zmm30,ZWORD rdx-0x2000                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x51, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vsqrtpd zmm30,ZWORD rdx-0x2040                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x58, 0x51, 0x72, 0x7f                               }, { vsqrtpd zmm30,QWORD rdx+0x3f8{1to8}                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x58, 0x51, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vsqrtpd zmm30,QWORD rdx+0x400{1to8}                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x58, 0x51, 0x72, 0x80                               }, { vsqrtpd zmm30,QWORD rdx-0x400{1to8}                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x58, 0x51, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vsqrtpd zmm30,QWORD rdx-0x408{1to8}                        }
+testcase	{ 0x62, 0x01, 0x7c, 0x48, 0x51, 0xf5                                     }, { vsqrtps zmm30,zmm29                                          }
+testcase	{ 0x62, 0x01, 0x7c, 0x4f, 0x51, 0xf5                                     }, { vsqrtps zmm30{k7},zmm29                                      }
+testcase	{ 0x62, 0x01, 0x7c, 0xcf, 0x51, 0xf5                                     }, { vsqrtps zmm30{k7}{z},zmm29                                   }
+testcase	{ 0x62, 0x01, 0x7c, 0x18, 0x51, 0xf5                                     }, { vsqrtps zmm30,zmm29,{rn-sae}                                 }
+testcase	{ 0x62, 0x01, 0x7c, 0x58, 0x51, 0xf5                                     }, { vsqrtps zmm30,zmm29,{ru-sae}                                 }
+testcase	{ 0x62, 0x01, 0x7c, 0x38, 0x51, 0xf5                                     }, { vsqrtps zmm30,zmm29,{rd-sae}                                 }
+testcase	{ 0x62, 0x01, 0x7c, 0x78, 0x51, 0xf5                                     }, { vsqrtps zmm30,zmm29,{rz-sae}                                 }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x51, 0x31                                     }, { vsqrtps zmm30,ZWORD rcx                                    }
+testcase	{ 0x62, 0x21, 0x7c, 0x48, 0x51, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vsqrtps zmm30,ZWORD rax+r14*8+0x123                        }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x51, 0x31                                     }, { vsqrtps zmm30,DWORD rcx{1to16}                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x51, 0x72, 0x7f                               }, { vsqrtps zmm30,ZWORD rdx+0x1fc0                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x51, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vsqrtps zmm30,ZWORD rdx+0x2000                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x51, 0x72, 0x80                               }, { vsqrtps zmm30,ZWORD rdx-0x2000                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x51, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vsqrtps zmm30,ZWORD rdx-0x2040                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x51, 0x72, 0x7f                               }, { vsqrtps zmm30,DWORD rdx+0x1fc{1to16}                       }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x51, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vsqrtps zmm30,DWORD rdx+0x200{1to16}                       }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x51, 0x72, 0x80                               }, { vsqrtps zmm30,DWORD rdx-0x200{1to16}                       }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x51, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vsqrtps zmm30,DWORD rdx-0x204{1to16}                       }
+testcase	{ 0x62, 0x01, 0x97, 0x07, 0x51, 0xf4                                     }, { vsqrtsd xmm30{k7},xmm29,xmm28                                }
+testcase	{ 0x62, 0x01, 0x97, 0x87, 0x51, 0xf4                                     }, { vsqrtsd xmm30{k7}{z},xmm29,xmm28                             }
+testcase	{ 0x62, 0x01, 0x97, 0x17, 0x51, 0xf4                                     }, { vsqrtsd xmm30{k7},xmm29,xmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x01, 0x97, 0x57, 0x51, 0xf4                                     }, { vsqrtsd xmm30{k7},xmm29,xmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x01, 0x97, 0x37, 0x51, 0xf4                                     }, { vsqrtsd xmm30{k7},xmm29,xmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x01, 0x97, 0x77, 0x51, 0xf4                                     }, { vsqrtsd xmm30{k7},xmm29,xmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x51, 0x31                                     }, { vsqrtsd xmm30{k7},xmm29,QWORD rcx                          }
+testcase	{ 0x62, 0x21, 0x97, 0x07, 0x51, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vsqrtsd xmm30{k7},xmm29,QWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x51, 0x72, 0x7f                               }, { vsqrtsd xmm30{k7},xmm29,QWORD rdx+0x3f8                    }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x51, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vsqrtsd xmm30{k7},xmm29,QWORD rdx+0x400                    }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x51, 0x72, 0x80                               }, { vsqrtsd xmm30{k7},xmm29,QWORD rdx-0x400                    }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x51, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vsqrtsd xmm30{k7},xmm29,QWORD rdx-0x408                    }
+testcase	{ 0x62, 0x01, 0x16, 0x07, 0x51, 0xf4                                     }, { vsqrtss xmm30{k7},xmm29,xmm28                                }
+testcase	{ 0x62, 0x01, 0x16, 0x87, 0x51, 0xf4                                     }, { vsqrtss xmm30{k7}{z},xmm29,xmm28                             }
+testcase	{ 0x62, 0x01, 0x16, 0x17, 0x51, 0xf4                                     }, { vsqrtss xmm30{k7},xmm29,xmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x01, 0x16, 0x57, 0x51, 0xf4                                     }, { vsqrtss xmm30{k7},xmm29,xmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x01, 0x16, 0x37, 0x51, 0xf4                                     }, { vsqrtss xmm30{k7},xmm29,xmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x01, 0x16, 0x77, 0x51, 0xf4                                     }, { vsqrtss xmm30{k7},xmm29,xmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x51, 0x31                                     }, { vsqrtss xmm30{k7},xmm29,DWORD rcx                          }
+testcase	{ 0x62, 0x21, 0x16, 0x07, 0x51, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vsqrtss xmm30{k7},xmm29,DWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x51, 0x72, 0x7f                               }, { vsqrtss xmm30{k7},xmm29,DWORD rdx+0x1fc                    }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x51, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vsqrtss xmm30{k7},xmm29,DWORD rdx+0x200                    }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x51, 0x72, 0x80                               }, { vsqrtss xmm30{k7},xmm29,DWORD rdx-0x200                    }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x51, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vsqrtss xmm30{k7},xmm29,DWORD rdx-0x204                    }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0x5c, 0xf4                                     }, { vsubpd zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0x5c, 0xf4                                     }, { vsubpd zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0x5c, 0xf4                                     }, { vsubpd zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x95, 0x10, 0x5c, 0xf4                                     }, { vsubpd zmm30,zmm29,zmm28,{rn-sae}                            }
+testcase	{ 0x62, 0x01, 0x95, 0x50, 0x5c, 0xf4                                     }, { vsubpd zmm30,zmm29,zmm28,{ru-sae}                            }
+testcase	{ 0x62, 0x01, 0x95, 0x30, 0x5c, 0xf4                                     }, { vsubpd zmm30,zmm29,zmm28,{rd-sae}                            }
+testcase	{ 0x62, 0x01, 0x95, 0x70, 0x5c, 0xf4                                     }, { vsubpd zmm30,zmm29,zmm28,{rz-sae}                            }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5c, 0x31                                     }, { vsubpd zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0x5c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vsubpd zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5c, 0x31                                     }, { vsubpd zmm30,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5c, 0x72, 0x7f                               }, { vsubpd zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5c, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vsubpd zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5c, 0x72, 0x80                               }, { vsubpd zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5c, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vsubpd zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5c, 0x72, 0x7f                               }, { vsubpd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5c, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vsubpd zmm30,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5c, 0x72, 0x80                               }, { vsubpd zmm30,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5c, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vsubpd zmm30,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x01, 0x14, 0x40, 0x5c, 0xf4                                     }, { vsubps zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x14, 0x47, 0x5c, 0xf4                                     }, { vsubps zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x14, 0xc7, 0x5c, 0xf4                                     }, { vsubps zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x14, 0x10, 0x5c, 0xf4                                     }, { vsubps zmm30,zmm29,zmm28,{rn-sae}                            }
+testcase	{ 0x62, 0x01, 0x14, 0x50, 0x5c, 0xf4                                     }, { vsubps zmm30,zmm29,zmm28,{ru-sae}                            }
+testcase	{ 0x62, 0x01, 0x14, 0x30, 0x5c, 0xf4                                     }, { vsubps zmm30,zmm29,zmm28,{rd-sae}                            }
+testcase	{ 0x62, 0x01, 0x14, 0x70, 0x5c, 0xf4                                     }, { vsubps zmm30,zmm29,zmm28,{rz-sae}                            }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5c, 0x31                                     }, { vsubps zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x14, 0x40, 0x5c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vsubps zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5c, 0x31                                     }, { vsubps zmm30,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5c, 0x72, 0x7f                               }, { vsubps zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5c, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vsubps zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5c, 0x72, 0x80                               }, { vsubps zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5c, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vsubps zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5c, 0x72, 0x7f                               }, { vsubps zmm30,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5c, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vsubps zmm30,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5c, 0x72, 0x80                               }, { vsubps zmm30,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5c, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vsubps zmm30,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x01, 0x97, 0x07, 0x5c, 0xf4                                     }, { vsubsd xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x97, 0x87, 0x5c, 0xf4                                     }, { vsubsd xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x97, 0x17, 0x5c, 0xf4                                     }, { vsubsd xmm30{k7},xmm29,xmm28,{rn-sae}                        }
+testcase	{ 0x62, 0x01, 0x97, 0x57, 0x5c, 0xf4                                     }, { vsubsd xmm30{k7},xmm29,xmm28,{ru-sae}                        }
+testcase	{ 0x62, 0x01, 0x97, 0x37, 0x5c, 0xf4                                     }, { vsubsd xmm30{k7},xmm29,xmm28,{rd-sae}                        }
+testcase	{ 0x62, 0x01, 0x97, 0x77, 0x5c, 0xf4                                     }, { vsubsd xmm30{k7},xmm29,xmm28,{rz-sae}                        }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5c, 0x31                                     }, { vsubsd xmm30{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x97, 0x07, 0x5c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vsubsd xmm30{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5c, 0x72, 0x7f                               }, { vsubsd xmm30{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5c, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vsubsd xmm30{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5c, 0x72, 0x80                               }, { vsubsd xmm30{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5c, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vsubsd xmm30{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x01, 0x16, 0x07, 0x5c, 0xf4                                     }, { vsubss xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x16, 0x87, 0x5c, 0xf4                                     }, { vsubss xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x16, 0x17, 0x5c, 0xf4                                     }, { vsubss xmm30{k7},xmm29,xmm28,{rn-sae}                        }
+testcase	{ 0x62, 0x01, 0x16, 0x57, 0x5c, 0xf4                                     }, { vsubss xmm30{k7},xmm29,xmm28,{ru-sae}                        }
+testcase	{ 0x62, 0x01, 0x16, 0x37, 0x5c, 0xf4                                     }, { vsubss xmm30{k7},xmm29,xmm28,{rd-sae}                        }
+testcase	{ 0x62, 0x01, 0x16, 0x77, 0x5c, 0xf4                                     }, { vsubss xmm30{k7},xmm29,xmm28,{rz-sae}                        }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5c, 0x31                                     }, { vsubss xmm30{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x16, 0x07, 0x5c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vsubss xmm30{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5c, 0x72, 0x7f                               }, { vsubss xmm30{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5c, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vsubss xmm30{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5c, 0x72, 0x80                               }, { vsubss xmm30{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5c, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vsubss xmm30{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x01, 0xfd, 0x08, 0x2e, 0xf5                                     }, { vucomisd xmm30,xmm29                                         }
+testcase	{ 0x62, 0x01, 0xfd, 0x18, 0x2e, 0xf5                                     }, { vucomisd xmm30,xmm29,{sae}                                   }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x2e, 0x31                                     }, { vucomisd xmm30,QWORD rcx                                   }
+testcase	{ 0x62, 0x21, 0xfd, 0x08, 0x2e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vucomisd xmm30,QWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x2e, 0x72, 0x7f                               }, { vucomisd xmm30,QWORD rdx+0x3f8                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x2e, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vucomisd xmm30,QWORD rdx+0x400                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x2e, 0x72, 0x80                               }, { vucomisd xmm30,QWORD rdx-0x400                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x2e, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vucomisd xmm30,QWORD rdx-0x408                             }
+testcase	{ 0x62, 0x01, 0x7c, 0x08, 0x2e, 0xf5                                     }, { vucomiss xmm30,xmm29                                         }
+testcase	{ 0x62, 0x01, 0x7c, 0x18, 0x2e, 0xf5                                     }, { vucomiss xmm30,xmm29,{sae}                                   }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x2e, 0x31                                     }, { vucomiss xmm30,DWORD rcx                                   }
+testcase	{ 0x62, 0x21, 0x7c, 0x08, 0x2e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vucomiss xmm30,DWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x2e, 0x72, 0x7f                               }, { vucomiss xmm30,DWORD rdx+0x1fc                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x2e, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vucomiss xmm30,DWORD rdx+0x200                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x2e, 0x72, 0x80                               }, { vucomiss xmm30,DWORD rdx-0x200                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x2e, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vucomiss xmm30,DWORD rdx-0x204                             }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0x15, 0xf4                                     }, { vunpckhpd zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0x15, 0xf4                                     }, { vunpckhpd zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0x15, 0xf4                                     }, { vunpckhpd zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x15, 0x31                                     }, { vunpckhpd zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0x15, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vunpckhpd zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x15, 0x31                                     }, { vunpckhpd zmm30,zmm29,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x15, 0x72, 0x7f                               }, { vunpckhpd zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x15, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vunpckhpd zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x15, 0x72, 0x80                               }, { vunpckhpd zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x15, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vunpckhpd zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x15, 0x72, 0x7f                               }, { vunpckhpd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x15, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vunpckhpd zmm30,zmm29,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x15, 0x72, 0x80                               }, { vunpckhpd zmm30,zmm29,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x15, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vunpckhpd zmm30,zmm29,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x01, 0x14, 0x40, 0x15, 0xf4                                     }, { vunpckhps zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x01, 0x14, 0x47, 0x15, 0xf4                                     }, { vunpckhps zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x14, 0xc7, 0x15, 0xf4                                     }, { vunpckhps zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x15, 0x31                                     }, { vunpckhps zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x21, 0x14, 0x40, 0x15, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vunpckhps zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x15, 0x31                                     }, { vunpckhps zmm30,zmm29,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x15, 0x72, 0x7f                               }, { vunpckhps zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x15, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vunpckhps zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x15, 0x72, 0x80                               }, { vunpckhps zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x15, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vunpckhps zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x15, 0x72, 0x7f                               }, { vunpckhps zmm30,zmm29,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x15, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vunpckhps zmm30,zmm29,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x15, 0x72, 0x80                               }, { vunpckhps zmm30,zmm29,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x15, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vunpckhps zmm30,zmm29,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0x14, 0xf4                                     }, { vunpcklpd zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0x14, 0xf4                                     }, { vunpcklpd zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0x14, 0xf4                                     }, { vunpcklpd zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x14, 0x31                                     }, { vunpcklpd zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0x14, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vunpcklpd zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x14, 0x31                                     }, { vunpcklpd zmm30,zmm29,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x14, 0x72, 0x7f                               }, { vunpcklpd zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x14, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vunpcklpd zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x14, 0x72, 0x80                               }, { vunpcklpd zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x14, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vunpcklpd zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x14, 0x72, 0x7f                               }, { vunpcklpd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x14, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vunpcklpd zmm30,zmm29,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x14, 0x72, 0x80                               }, { vunpcklpd zmm30,zmm29,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x14, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vunpcklpd zmm30,zmm29,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x01, 0x14, 0x40, 0x14, 0xf4                                     }, { vunpcklps zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x01, 0x14, 0x47, 0x14, 0xf4                                     }, { vunpcklps zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x14, 0xc7, 0x14, 0xf4                                     }, { vunpcklps zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x14, 0x31                                     }, { vunpcklps zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x21, 0x14, 0x40, 0x14, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vunpcklps zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x14, 0x31                                     }, { vunpcklps zmm30,zmm29,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x14, 0x72, 0x7f                               }, { vunpcklps zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x14, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vunpcklps zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x14, 0x72, 0x80                               }, { vunpcklps zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x14, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vunpcklps zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x14, 0x72, 0x7f                               }, { vunpcklps zmm30,zmm29,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x14, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vunpcklps zmm30,zmm29,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x14, 0x72, 0x80                               }, { vunpcklps zmm30,zmm29,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x14, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vunpcklps zmm30,zmm29,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x03, 0x15, 0x40, 0x25, 0xf4, 0xab                               }, { vpternlogd zmm30,zmm29,zmm28,0xab                            }
+testcase	{ 0x62, 0x03, 0x15, 0x47, 0x25, 0xf4, 0xab                               }, { vpternlogd zmm30{k7},zmm29,zmm28,0xab                        }
+testcase	{ 0x62, 0x03, 0x15, 0xc7, 0x25, 0xf4, 0xab                               }, { vpternlogd zmm30{k7}{z},zmm29,zmm28,0xab                     }
+testcase	{ 0x62, 0x03, 0x15, 0x40, 0x25, 0xf4, 0x7b                               }, { vpternlogd zmm30,zmm29,zmm28,0x7b                            }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x25, 0x31, 0x7b                               }, { vpternlogd zmm30,zmm29,ZWORD rcx,0x7b                      }
+testcase	{ 0x62, 0x23, 0x15, 0x40, 0x25, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpternlogd zmm30,zmm29,ZWORD rax+r14*8+0x123,0x7b          }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x25, 0x31, 0x7b                               }, { vpternlogd zmm30,zmm29,DWORD rcx{1to16},0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x25, 0x72, 0x7f, 0x7b                         }, { vpternlogd zmm30,zmm29,ZWORD rdx+0x1fc0,0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x25, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpternlogd zmm30,zmm29,ZWORD rdx+0x2000,0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x25, 0x72, 0x80, 0x7b                         }, { vpternlogd zmm30,zmm29,ZWORD rdx-0x2000,0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x25, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpternlogd zmm30,zmm29,ZWORD rdx-0x2040,0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x25, 0x72, 0x7f, 0x7b                         }, { vpternlogd zmm30,zmm29,DWORD rdx+0x1fc{1to16},0x7b         }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x25, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vpternlogd zmm30,zmm29,DWORD rdx+0x200{1to16},0x7b         }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x25, 0x72, 0x80, 0x7b                         }, { vpternlogd zmm30,zmm29,DWORD rdx-0x200{1to16},0x7b         }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x25, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vpternlogd zmm30,zmm29,DWORD rdx-0x204{1to16},0x7b         }
+testcase	{ 0x62, 0x03, 0x95, 0x40, 0x25, 0xf4, 0xab                               }, { vpternlogq zmm30,zmm29,zmm28,0xab                            }
+testcase	{ 0x62, 0x03, 0x95, 0x47, 0x25, 0xf4, 0xab                               }, { vpternlogq zmm30{k7},zmm29,zmm28,0xab                        }
+testcase	{ 0x62, 0x03, 0x95, 0xc7, 0x25, 0xf4, 0xab                               }, { vpternlogq zmm30{k7}{z},zmm29,zmm28,0xab                     }
+testcase	{ 0x62, 0x03, 0x95, 0x40, 0x25, 0xf4, 0x7b                               }, { vpternlogq zmm30,zmm29,zmm28,0x7b                            }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x25, 0x31, 0x7b                               }, { vpternlogq zmm30,zmm29,ZWORD rcx,0x7b                      }
+testcase	{ 0x62, 0x23, 0x95, 0x40, 0x25, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpternlogq zmm30,zmm29,ZWORD rax+r14*8+0x123,0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x25, 0x31, 0x7b                               }, { vpternlogq zmm30,zmm29,QWORD rcx{1to8},0x7b                }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x25, 0x72, 0x7f, 0x7b                         }, { vpternlogq zmm30,zmm29,ZWORD rdx+0x1fc0,0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x25, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpternlogq zmm30,zmm29,ZWORD rdx+0x2000,0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x25, 0x72, 0x80, 0x7b                         }, { vpternlogq zmm30,zmm29,ZWORD rdx-0x2000,0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x25, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpternlogq zmm30,zmm29,ZWORD rdx-0x2040,0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x25, 0x72, 0x7f, 0x7b                         }, { vpternlogq zmm30,zmm29,QWORD rdx+0x3f8{1to8},0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x25, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vpternlogq zmm30,zmm29,QWORD rdx+0x400{1to8},0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x25, 0x72, 0x80, 0x7b                         }, { vpternlogq zmm30,zmm29,QWORD rdx-0x400{1to8},0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x25, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vpternlogq zmm30,zmm29,QWORD rdx-0x408{1to8},0x7b          }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x32, 0xee                                     }, { vpmovqb xmm30{k7},zmm29                                      }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x32, 0xee                                     }, { vpmovqb xmm30{k7}{z},zmm29                                   }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x22, 0xee                                     }, { vpmovsqb xmm30{k7},zmm29                                     }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x22, 0xee                                     }, { vpmovsqb xmm30{k7}{z},zmm29                                  }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x12, 0xee                                     }, { vpmovusqb xmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x12, 0xee                                     }, { vpmovusqb xmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x34, 0xee                                     }, { vpmovqw xmm30{k7},zmm29                                      }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x34, 0xee                                     }, { vpmovqw xmm30{k7}{z},zmm29                                   }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x24, 0xee                                     }, { vpmovsqw xmm30{k7},zmm29                                     }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x24, 0xee                                     }, { vpmovsqw xmm30{k7}{z},zmm29                                  }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x14, 0xee                                     }, { vpmovusqw xmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x14, 0xee                                     }, { vpmovusqw xmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x35, 0xee                                     }, { vpmovqd ymm30{k7},zmm29                                      }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x35, 0xee                                     }, { vpmovqd ymm30{k7}{z},zmm29                                   }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x25, 0xee                                     }, { vpmovsqd ymm30{k7},zmm29                                     }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x25, 0xee                                     }, { vpmovsqd ymm30{k7}{z},zmm29                                  }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x15, 0xee                                     }, { vpmovusqd ymm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x15, 0xee                                     }, { vpmovusqd ymm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x31, 0xee                                     }, { vpmovdb xmm30{k7},zmm29                                      }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x31, 0xee                                     }, { vpmovdb xmm30{k7}{z},zmm29                                   }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x21, 0xee                                     }, { vpmovsdb xmm30{k7},zmm29                                     }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x21, 0xee                                     }, { vpmovsdb xmm30{k7}{z},zmm29                                  }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x11, 0xee                                     }, { vpmovusdb xmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x11, 0xee                                     }, { vpmovusdb xmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x33, 0xee                                     }, { vpmovdw ymm30{k7},zmm29                                      }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x33, 0xee                                     }, { vpmovdw ymm30{k7}{z},zmm29                                   }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x23, 0xee                                     }, { vpmovsdw ymm30{k7},zmm29                                     }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x23, 0xee                                     }, { vpmovsdw ymm30{k7}{z},zmm29                                  }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x13, 0xee                                     }, { vpmovusdw ymm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x13, 0xee                                     }, { vpmovusdw ymm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x03, 0x15, 0x40, 0x23, 0xf4, 0xab                               }, { vshuff32x4 zmm30,zmm29,zmm28,0xab                            }
+testcase	{ 0x62, 0x03, 0x15, 0x47, 0x23, 0xf4, 0xab                               }, { vshuff32x4 zmm30{k7},zmm29,zmm28,0xab                        }
+testcase	{ 0x62, 0x03, 0x15, 0xc7, 0x23, 0xf4, 0xab                               }, { vshuff32x4 zmm30{k7}{z},zmm29,zmm28,0xab                     }
+testcase	{ 0x62, 0x03, 0x15, 0x40, 0x23, 0xf4, 0x7b                               }, { vshuff32x4 zmm30,zmm29,zmm28,0x7b                            }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x23, 0x31, 0x7b                               }, { vshuff32x4 zmm30,zmm29,ZWORD rcx,0x7b                      }
+testcase	{ 0x62, 0x23, 0x15, 0x40, 0x23, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vshuff32x4 zmm30,zmm29,ZWORD rax+r14*8+0x123,0x7b          }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x23, 0x31, 0x7b                               }, { vshuff32x4 zmm30,zmm29,DWORD rcx{1to16},0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x23, 0x72, 0x7f, 0x7b                         }, { vshuff32x4 zmm30,zmm29,ZWORD rdx+0x1fc0,0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x23, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vshuff32x4 zmm30,zmm29,ZWORD rdx+0x2000,0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x23, 0x72, 0x80, 0x7b                         }, { vshuff32x4 zmm30,zmm29,ZWORD rdx-0x2000,0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x23, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vshuff32x4 zmm30,zmm29,ZWORD rdx-0x2040,0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x23, 0x72, 0x7f, 0x7b                         }, { vshuff32x4 zmm30,zmm29,DWORD rdx+0x1fc{1to16},0x7b         }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x23, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vshuff32x4 zmm30,zmm29,DWORD rdx+0x200{1to16},0x7b         }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x23, 0x72, 0x80, 0x7b                         }, { vshuff32x4 zmm30,zmm29,DWORD rdx-0x200{1to16},0x7b         }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x23, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vshuff32x4 zmm30,zmm29,DWORD rdx-0x204{1to16},0x7b         }
+testcase	{ 0x62, 0x03, 0x95, 0x40, 0x23, 0xf4, 0xab                               }, { vshuff64x2 zmm30,zmm29,zmm28,0xab                            }
+testcase	{ 0x62, 0x03, 0x95, 0x47, 0x23, 0xf4, 0xab                               }, { vshuff64x2 zmm30{k7},zmm29,zmm28,0xab                        }
+testcase	{ 0x62, 0x03, 0x95, 0xc7, 0x23, 0xf4, 0xab                               }, { vshuff64x2 zmm30{k7}{z},zmm29,zmm28,0xab                     }
+testcase	{ 0x62, 0x03, 0x95, 0x40, 0x23, 0xf4, 0x7b                               }, { vshuff64x2 zmm30,zmm29,zmm28,0x7b                            }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x23, 0x31, 0x7b                               }, { vshuff64x2 zmm30,zmm29,ZWORD rcx,0x7b                      }
+testcase	{ 0x62, 0x23, 0x95, 0x40, 0x23, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vshuff64x2 zmm30,zmm29,ZWORD rax+r14*8+0x123,0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x23, 0x31, 0x7b                               }, { vshuff64x2 zmm30,zmm29,QWORD rcx{1to8},0x7b                }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x23, 0x72, 0x7f, 0x7b                         }, { vshuff64x2 zmm30,zmm29,ZWORD rdx+0x1fc0,0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x23, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vshuff64x2 zmm30,zmm29,ZWORD rdx+0x2000,0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x23, 0x72, 0x80, 0x7b                         }, { vshuff64x2 zmm30,zmm29,ZWORD rdx-0x2000,0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x23, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vshuff64x2 zmm30,zmm29,ZWORD rdx-0x2040,0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x23, 0x72, 0x7f, 0x7b                         }, { vshuff64x2 zmm30,zmm29,QWORD rdx+0x3f8{1to8},0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x23, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vshuff64x2 zmm30,zmm29,QWORD rdx+0x400{1to8},0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x23, 0x72, 0x80, 0x7b                         }, { vshuff64x2 zmm30,zmm29,QWORD rdx-0x400{1to8},0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x23, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vshuff64x2 zmm30,zmm29,QWORD rdx-0x408{1to8},0x7b          }
+testcase	{ 0x62, 0x03, 0x15, 0x40, 0x43, 0xf4, 0xab                               }, { vshufi32x4 zmm30,zmm29,zmm28,0xab                            }
+testcase	{ 0x62, 0x03, 0x15, 0x47, 0x43, 0xf4, 0xab                               }, { vshufi32x4 zmm30{k7},zmm29,zmm28,0xab                        }
+testcase	{ 0x62, 0x03, 0x15, 0xc7, 0x43, 0xf4, 0xab                               }, { vshufi32x4 zmm30{k7}{z},zmm29,zmm28,0xab                     }
+testcase	{ 0x62, 0x03, 0x15, 0x40, 0x43, 0xf4, 0x7b                               }, { vshufi32x4 zmm30,zmm29,zmm28,0x7b                            }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x43, 0x31, 0x7b                               }, { vshufi32x4 zmm30,zmm29,ZWORD rcx,0x7b                      }
+testcase	{ 0x62, 0x23, 0x15, 0x40, 0x43, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vshufi32x4 zmm30,zmm29,ZWORD rax+r14*8+0x123,0x7b          }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x43, 0x31, 0x7b                               }, { vshufi32x4 zmm30,zmm29,DWORD rcx{1to16},0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x43, 0x72, 0x7f, 0x7b                         }, { vshufi32x4 zmm30,zmm29,ZWORD rdx+0x1fc0,0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x43, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vshufi32x4 zmm30,zmm29,ZWORD rdx+0x2000,0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x43, 0x72, 0x80, 0x7b                         }, { vshufi32x4 zmm30,zmm29,ZWORD rdx-0x2000,0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x43, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vshufi32x4 zmm30,zmm29,ZWORD rdx-0x2040,0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x43, 0x72, 0x7f, 0x7b                         }, { vshufi32x4 zmm30,zmm29,DWORD rdx+0x1fc{1to16},0x7b         }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x43, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vshufi32x4 zmm30,zmm29,DWORD rdx+0x200{1to16},0x7b         }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x43, 0x72, 0x80, 0x7b                         }, { vshufi32x4 zmm30,zmm29,DWORD rdx-0x200{1to16},0x7b         }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x43, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vshufi32x4 zmm30,zmm29,DWORD rdx-0x204{1to16},0x7b         }
+testcase	{ 0x62, 0x03, 0x95, 0x40, 0x43, 0xf4, 0xab                               }, { vshufi64x2 zmm30,zmm29,zmm28,0xab                            }
+testcase	{ 0x62, 0x03, 0x95, 0x47, 0x43, 0xf4, 0xab                               }, { vshufi64x2 zmm30{k7},zmm29,zmm28,0xab                        }
+testcase	{ 0x62, 0x03, 0x95, 0xc7, 0x43, 0xf4, 0xab                               }, { vshufi64x2 zmm30{k7}{z},zmm29,zmm28,0xab                     }
+testcase	{ 0x62, 0x03, 0x95, 0x40, 0x43, 0xf4, 0x7b                               }, { vshufi64x2 zmm30,zmm29,zmm28,0x7b                            }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x43, 0x31, 0x7b                               }, { vshufi64x2 zmm30,zmm29,ZWORD rcx,0x7b                      }
+testcase	{ 0x62, 0x23, 0x95, 0x40, 0x43, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vshufi64x2 zmm30,zmm29,ZWORD rax+r14*8+0x123,0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x43, 0x31, 0x7b                               }, { vshufi64x2 zmm30,zmm29,QWORD rcx{1to8},0x7b                }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x43, 0x72, 0x7f, 0x7b                         }, { vshufi64x2 zmm30,zmm29,ZWORD rdx+0x1fc0,0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x43, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vshufi64x2 zmm30,zmm29,ZWORD rdx+0x2000,0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x43, 0x72, 0x80, 0x7b                         }, { vshufi64x2 zmm30,zmm29,ZWORD rdx-0x2000,0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x43, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vshufi64x2 zmm30,zmm29,ZWORD rdx-0x2040,0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x43, 0x72, 0x7f, 0x7b                         }, { vshufi64x2 zmm30,zmm29,QWORD rdx+0x3f8{1to8},0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x43, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vshufi64x2 zmm30,zmm29,QWORD rdx+0x400{1to8},0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x43, 0x72, 0x80, 0x7b                         }, { vshufi64x2 zmm30,zmm29,QWORD rdx-0x400{1to8},0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x43, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vshufi64x2 zmm30,zmm29,QWORD rdx-0x408{1to8},0x7b          }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x36, 0xf4                                     }, { vpermq zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x36, 0xf4                                     }, { vpermq zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x36, 0xf4                                     }, { vpermq zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x36, 0x31                                     }, { vpermq zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x36, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermq zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x36, 0x31                                     }, { vpermq zmm30,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x36, 0x72, 0x7f                               }, { vpermq zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x36, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermq zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x36, 0x72, 0x80                               }, { vpermq zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x36, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermq zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x36, 0x72, 0x7f                               }, { vpermq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x36, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpermq zmm30,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x36, 0x72, 0x80                               }, { vpermq zmm30,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x36, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpermq zmm30,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x16, 0xf4                                     }, { vpermpd zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x16, 0xf4                                     }, { vpermpd zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x16, 0xf4                                     }, { vpermpd zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x16, 0x31                                     }, { vpermpd zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x16, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermpd zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x16, 0x31                                     }, { vpermpd zmm30,zmm29,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x16, 0x72, 0x7f                               }, { vpermpd zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x16, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermpd zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x16, 0x72, 0x80                               }, { vpermpd zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x16, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermpd zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x16, 0x72, 0x7f                               }, { vpermpd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x16, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpermpd zmm30,zmm29,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x16, 0x72, 0x80                               }, { vpermpd zmm30,zmm29,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x16, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpermpd zmm30,zmm29,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x7e, 0xf4                                     }, { vpermt2d zmm30,zmm29,zmm28                                   }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x7e, 0xf4                                     }, { vpermt2d zmm30{k7},zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x7e, 0xf4                                     }, { vpermt2d zmm30{k7}{z},zmm29,zmm28                            }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x7e, 0x31                                     }, { vpermt2d zmm30,zmm29,ZWORD rcx                             }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x7e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermt2d zmm30,zmm29,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x7e, 0x31                                     }, { vpermt2d zmm30,zmm29,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x7e, 0x72, 0x7f                               }, { vpermt2d zmm30,zmm29,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x7e, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermt2d zmm30,zmm29,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x7e, 0x72, 0x80                               }, { vpermt2d zmm30,zmm29,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x7e, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermt2d zmm30,zmm29,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x7e, 0x72, 0x7f                               }, { vpermt2d zmm30,zmm29,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x7e, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpermt2d zmm30,zmm29,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x7e, 0x72, 0x80                               }, { vpermt2d zmm30,zmm29,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x7e, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpermt2d zmm30,zmm29,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x7e, 0xf4                                     }, { vpermt2q zmm30,zmm29,zmm28                                   }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x7e, 0xf4                                     }, { vpermt2q zmm30{k7},zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x7e, 0xf4                                     }, { vpermt2q zmm30{k7}{z},zmm29,zmm28                            }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x7e, 0x31                                     }, { vpermt2q zmm30,zmm29,ZWORD rcx                             }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x7e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermt2q zmm30,zmm29,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x7e, 0x31                                     }, { vpermt2q zmm30,zmm29,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x7e, 0x72, 0x7f                               }, { vpermt2q zmm30,zmm29,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x7e, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermt2q zmm30,zmm29,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x7e, 0x72, 0x80                               }, { vpermt2q zmm30,zmm29,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x7e, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermt2q zmm30,zmm29,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x7e, 0x72, 0x7f                               }, { vpermt2q zmm30,zmm29,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x7e, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpermt2q zmm30,zmm29,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x7e, 0x72, 0x80                               }, { vpermt2q zmm30,zmm29,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x7e, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpermt2q zmm30,zmm29,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x7f, 0xf4                                     }, { vpermt2ps zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x7f, 0xf4                                     }, { vpermt2ps zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x7f, 0xf4                                     }, { vpermt2ps zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x7f, 0x31                                     }, { vpermt2ps zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x7f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermt2ps zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x7f, 0x31                                     }, { vpermt2ps zmm30,zmm29,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x7f, 0x72, 0x7f                               }, { vpermt2ps zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x7f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermt2ps zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x7f, 0x72, 0x80                               }, { vpermt2ps zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x7f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermt2ps zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x7f, 0x72, 0x7f                               }, { vpermt2ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x7f, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpermt2ps zmm30,zmm29,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x7f, 0x72, 0x80                               }, { vpermt2ps zmm30,zmm29,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x7f, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpermt2ps zmm30,zmm29,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x7f, 0xf4                                     }, { vpermt2pd zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x7f, 0xf4                                     }, { vpermt2pd zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x7f, 0xf4                                     }, { vpermt2pd zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x7f, 0x31                                     }, { vpermt2pd zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x7f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermt2pd zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x7f, 0x31                                     }, { vpermt2pd zmm30,zmm29,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x7f, 0x72, 0x7f                               }, { vpermt2pd zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x7f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermt2pd zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x7f, 0x72, 0x80                               }, { vpermt2pd zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x7f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermt2pd zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x7f, 0x72, 0x7f                               }, { vpermt2pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x7f, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpermt2pd zmm30,zmm29,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x7f, 0x72, 0x80                               }, { vpermt2pd zmm30,zmm29,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x7f, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpermt2pd zmm30,zmm29,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x03, 0x95, 0x40, 0x03, 0xf4, 0xab                               }, { valignq zmm30,zmm29,zmm28,0xab                               }
+testcase	{ 0x62, 0x03, 0x95, 0x47, 0x03, 0xf4, 0xab                               }, { valignq zmm30{k7},zmm29,zmm28,0xab                           }
+testcase	{ 0x62, 0x03, 0x95, 0xc7, 0x03, 0xf4, 0xab                               }, { valignq zmm30{k7}{z},zmm29,zmm28,0xab                        }
+testcase	{ 0x62, 0x03, 0x95, 0x40, 0x03, 0xf4, 0x7b                               }, { valignq zmm30,zmm29,zmm28,0x7b                               }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x03, 0x31, 0x7b                               }, { valignq zmm30,zmm29,ZWORD rcx,0x7b                         }
+testcase	{ 0x62, 0x23, 0x95, 0x40, 0x03, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { valignq zmm30,zmm29,ZWORD rax+r14*8+0x123,0x7b             }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x03, 0x31, 0x7b                               }, { valignq zmm30,zmm29,QWORD rcx{1to8},0x7b                   }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x03, 0x72, 0x7f, 0x7b                         }, { valignq zmm30,zmm29,ZWORD rdx+0x1fc0,0x7b                  }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x03, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { valignq zmm30,zmm29,ZWORD rdx+0x2000,0x7b                  }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x03, 0x72, 0x80, 0x7b                         }, { valignq zmm30,zmm29,ZWORD rdx-0x2000,0x7b                  }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x03, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { valignq zmm30,zmm29,ZWORD rdx-0x2040,0x7b                  }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x03, 0x72, 0x7f, 0x7b                         }, { valignq zmm30,zmm29,QWORD rdx+0x3f8{1to8},0x7b             }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x03, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { valignq zmm30,zmm29,QWORD rdx+0x400{1to8},0x7b             }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x03, 0x72, 0x80, 0x7b                         }, { valignq zmm30,zmm29,QWORD rdx-0x400{1to8},0x7b             }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x03, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { valignq zmm30,zmm29,QWORD rdx-0x408{1to8},0x7b             }
+testcase	{ 0x62, 0x91, 0x7f, 0x08, 0x79, 0xc6                                     }, { vcvtsd2usi eax,xmm30                                         }
+testcase	{ 0x62, 0x91, 0x7f, 0x18, 0x79, 0xc6                                     }, { vcvtsd2usi eax,xmm30,{rn-sae}                                }
+testcase	{ 0x62, 0x91, 0x7f, 0x58, 0x79, 0xc6                                     }, { vcvtsd2usi eax,xmm30,{ru-sae}                                }
+testcase	{ 0x62, 0x91, 0x7f, 0x38, 0x79, 0xc6                                     }, { vcvtsd2usi eax,xmm30,{rd-sae}                                }
+testcase	{ 0x62, 0x91, 0x7f, 0x78, 0x79, 0xc6                                     }, { vcvtsd2usi eax,xmm30,{rz-sae}                                }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x79, 0x01                                     }, { vcvtsd2usi eax,QWORD rcx                                   }
+testcase	{ 0x62, 0xb1, 0x7f, 0x08, 0x79, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtsd2usi eax,QWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x79, 0x42, 0x7f                               }, { vcvtsd2usi eax,QWORD rdx+0x3f8                             }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x79, 0x82, 0x00, 0x04, 0x00, 0x00             }, { vcvtsd2usi eax,QWORD rdx+0x400                             }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x79, 0x42, 0x80                               }, { vcvtsd2usi eax,QWORD rdx-0x400                             }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x79, 0x82, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtsd2usi eax,QWORD rdx-0x408                             }
+testcase	{ 0x62, 0x91, 0x7f, 0x08, 0x79, 0xee                                     }, { vcvtsd2usi ebp,xmm30                                         }
+testcase	{ 0x62, 0x91, 0x7f, 0x18, 0x79, 0xee                                     }, { vcvtsd2usi ebp,xmm30,{rn-sae}                                }
+testcase	{ 0x62, 0x91, 0x7f, 0x58, 0x79, 0xee                                     }, { vcvtsd2usi ebp,xmm30,{ru-sae}                                }
+testcase	{ 0x62, 0x91, 0x7f, 0x38, 0x79, 0xee                                     }, { vcvtsd2usi ebp,xmm30,{rd-sae}                                }
+testcase	{ 0x62, 0x91, 0x7f, 0x78, 0x79, 0xee                                     }, { vcvtsd2usi ebp,xmm30,{rz-sae}                                }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x79, 0x29                                     }, { vcvtsd2usi ebp,QWORD rcx                                   }
+testcase	{ 0x62, 0xb1, 0x7f, 0x08, 0x79, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtsd2usi ebp,QWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x79, 0x6a, 0x7f                               }, { vcvtsd2usi ebp,QWORD rdx+0x3f8                             }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x79, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vcvtsd2usi ebp,QWORD rdx+0x400                             }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x79, 0x6a, 0x80                               }, { vcvtsd2usi ebp,QWORD rdx-0x400                             }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x79, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtsd2usi ebp,QWORD rdx-0x408                             }
+testcase	{ 0x62, 0x11, 0x7f, 0x08, 0x79, 0xee                                     }, { vcvtsd2usi r13d,xmm30                                        }
+testcase	{ 0x62, 0x11, 0x7f, 0x18, 0x79, 0xee                                     }, { vcvtsd2usi r13d,xmm30,{rn-sae}                               }
+testcase	{ 0x62, 0x11, 0x7f, 0x58, 0x79, 0xee                                     }, { vcvtsd2usi r13d,xmm30,{ru-sae}                               }
+testcase	{ 0x62, 0x11, 0x7f, 0x38, 0x79, 0xee                                     }, { vcvtsd2usi r13d,xmm30,{rd-sae}                               }
+testcase	{ 0x62, 0x11, 0x7f, 0x78, 0x79, 0xee                                     }, { vcvtsd2usi r13d,xmm30,{rz-sae}                               }
+testcase	{ 0x62, 0x71, 0x7f, 0x08, 0x79, 0x29                                     }, { vcvtsd2usi r13d,QWORD rcx                                  }
+testcase	{ 0x62, 0x31, 0x7f, 0x08, 0x79, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtsd2usi r13d,QWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x71, 0x7f, 0x08, 0x79, 0x6a, 0x7f                               }, { vcvtsd2usi r13d,QWORD rdx+0x3f8                            }
+testcase	{ 0x62, 0x71, 0x7f, 0x08, 0x79, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vcvtsd2usi r13d,QWORD rdx+0x400                            }
+testcase	{ 0x62, 0x71, 0x7f, 0x08, 0x79, 0x6a, 0x80                               }, { vcvtsd2usi r13d,QWORD rdx-0x400                            }
+testcase	{ 0x62, 0x71, 0x7f, 0x08, 0x79, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtsd2usi r13d,QWORD rdx-0x408                            }
+testcase	{ 0x62, 0x91, 0xff, 0x08, 0x79, 0xc6                                     }, { vcvtsd2usi rax,xmm30                                         }
+testcase	{ 0x62, 0x91, 0xff, 0x18, 0x79, 0xc6                                     }, { vcvtsd2usi rax,xmm30,{rn-sae}                                }
+testcase	{ 0x62, 0x91, 0xff, 0x58, 0x79, 0xc6                                     }, { vcvtsd2usi rax,xmm30,{ru-sae}                                }
+testcase	{ 0x62, 0x91, 0xff, 0x38, 0x79, 0xc6                                     }, { vcvtsd2usi rax,xmm30,{rd-sae}                                }
+testcase	{ 0x62, 0x91, 0xff, 0x78, 0x79, 0xc6                                     }, { vcvtsd2usi rax,xmm30,{rz-sae}                                }
+testcase	{ 0x62, 0xf1, 0xff, 0x08, 0x79, 0x01                                     }, { vcvtsd2usi rax,QWORD rcx                                   }
+testcase	{ 0x62, 0xb1, 0xff, 0x08, 0x79, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtsd2usi rax,QWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0xf1, 0xff, 0x08, 0x79, 0x42, 0x7f                               }, { vcvtsd2usi rax,QWORD rdx+0x3f8                             }
+testcase	{ 0x62, 0xf1, 0xff, 0x08, 0x79, 0x82, 0x00, 0x04, 0x00, 0x00             }, { vcvtsd2usi rax,QWORD rdx+0x400                             }
+testcase	{ 0x62, 0xf1, 0xff, 0x08, 0x79, 0x42, 0x80                               }, { vcvtsd2usi rax,QWORD rdx-0x400                             }
+testcase	{ 0x62, 0xf1, 0xff, 0x08, 0x79, 0x82, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtsd2usi rax,QWORD rdx-0x408                             }
+testcase	{ 0x62, 0x11, 0xff, 0x08, 0x79, 0xc6                                     }, { vcvtsd2usi r8,xmm30                                          }
+testcase	{ 0x62, 0x11, 0xff, 0x18, 0x79, 0xc6                                     }, { vcvtsd2usi r8,xmm30,{rn-sae}                                 }
+testcase	{ 0x62, 0x11, 0xff, 0x58, 0x79, 0xc6                                     }, { vcvtsd2usi r8,xmm30,{ru-sae}                                 }
+testcase	{ 0x62, 0x11, 0xff, 0x38, 0x79, 0xc6                                     }, { vcvtsd2usi r8,xmm30,{rd-sae}                                 }
+testcase	{ 0x62, 0x11, 0xff, 0x78, 0x79, 0xc6                                     }, { vcvtsd2usi r8,xmm30,{rz-sae}                                 }
+testcase	{ 0x62, 0x71, 0xff, 0x08, 0x79, 0x01                                     }, { vcvtsd2usi r8,QWORD rcx                                    }
+testcase	{ 0x62, 0x31, 0xff, 0x08, 0x79, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtsd2usi r8,QWORD rax+r14*8+0x123                        }
+testcase	{ 0x62, 0x71, 0xff, 0x08, 0x79, 0x42, 0x7f                               }, { vcvtsd2usi r8,QWORD rdx+0x3f8                              }
+testcase	{ 0x62, 0x71, 0xff, 0x08, 0x79, 0x82, 0x00, 0x04, 0x00, 0x00             }, { vcvtsd2usi r8,QWORD rdx+0x400                              }
+testcase	{ 0x62, 0x71, 0xff, 0x08, 0x79, 0x42, 0x80                               }, { vcvtsd2usi r8,QWORD rdx-0x400                              }
+testcase	{ 0x62, 0x71, 0xff, 0x08, 0x79, 0x82, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtsd2usi r8,QWORD rdx-0x408                              }
+testcase	{ 0x62, 0x91, 0x7e, 0x08, 0x79, 0xc6                                     }, { vcvtss2usi eax,xmm30                                         }
+testcase	{ 0x62, 0x91, 0x7e, 0x18, 0x79, 0xc6                                     }, { vcvtss2usi eax,xmm30,{rn-sae}                                }
+testcase	{ 0x62, 0x91, 0x7e, 0x58, 0x79, 0xc6                                     }, { vcvtss2usi eax,xmm30,{ru-sae}                                }
+testcase	{ 0x62, 0x91, 0x7e, 0x38, 0x79, 0xc6                                     }, { vcvtss2usi eax,xmm30,{rd-sae}                                }
+testcase	{ 0x62, 0x91, 0x7e, 0x78, 0x79, 0xc6                                     }, { vcvtss2usi eax,xmm30,{rz-sae}                                }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x79, 0x01                                     }, { vcvtss2usi eax,DWORD rcx                                   }
+testcase	{ 0x62, 0xb1, 0x7e, 0x08, 0x79, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtss2usi eax,DWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x79, 0x42, 0x7f                               }, { vcvtss2usi eax,DWORD rdx+0x1fc                             }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x79, 0x82, 0x00, 0x02, 0x00, 0x00             }, { vcvtss2usi eax,DWORD rdx+0x200                             }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x79, 0x42, 0x80                               }, { vcvtss2usi eax,DWORD rdx-0x200                             }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x79, 0x82, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtss2usi eax,DWORD rdx-0x204                             }
+testcase	{ 0x62, 0x91, 0x7e, 0x08, 0x79, 0xee                                     }, { vcvtss2usi ebp,xmm30                                         }
+testcase	{ 0x62, 0x91, 0x7e, 0x18, 0x79, 0xee                                     }, { vcvtss2usi ebp,xmm30,{rn-sae}                                }
+testcase	{ 0x62, 0x91, 0x7e, 0x58, 0x79, 0xee                                     }, { vcvtss2usi ebp,xmm30,{ru-sae}                                }
+testcase	{ 0x62, 0x91, 0x7e, 0x38, 0x79, 0xee                                     }, { vcvtss2usi ebp,xmm30,{rd-sae}                                }
+testcase	{ 0x62, 0x91, 0x7e, 0x78, 0x79, 0xee                                     }, { vcvtss2usi ebp,xmm30,{rz-sae}                                }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x79, 0x29                                     }, { vcvtss2usi ebp,DWORD rcx                                   }
+testcase	{ 0x62, 0xb1, 0x7e, 0x08, 0x79, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtss2usi ebp,DWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x79, 0x6a, 0x7f                               }, { vcvtss2usi ebp,DWORD rdx+0x1fc                             }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x79, 0xaa, 0x00, 0x02, 0x00, 0x00             }, { vcvtss2usi ebp,DWORD rdx+0x200                             }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x79, 0x6a, 0x80                               }, { vcvtss2usi ebp,DWORD rdx-0x200                             }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x79, 0xaa, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtss2usi ebp,DWORD rdx-0x204                             }
+testcase	{ 0x62, 0x11, 0x7e, 0x08, 0x79, 0xee                                     }, { vcvtss2usi r13d,xmm30                                        }
+testcase	{ 0x62, 0x11, 0x7e, 0x18, 0x79, 0xee                                     }, { vcvtss2usi r13d,xmm30,{rn-sae}                               }
+testcase	{ 0x62, 0x11, 0x7e, 0x58, 0x79, 0xee                                     }, { vcvtss2usi r13d,xmm30,{ru-sae}                               }
+testcase	{ 0x62, 0x11, 0x7e, 0x38, 0x79, 0xee                                     }, { vcvtss2usi r13d,xmm30,{rd-sae}                               }
+testcase	{ 0x62, 0x11, 0x7e, 0x78, 0x79, 0xee                                     }, { vcvtss2usi r13d,xmm30,{rz-sae}                               }
+testcase	{ 0x62, 0x71, 0x7e, 0x08, 0x79, 0x29                                     }, { vcvtss2usi r13d,DWORD rcx                                  }
+testcase	{ 0x62, 0x31, 0x7e, 0x08, 0x79, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtss2usi r13d,DWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x71, 0x7e, 0x08, 0x79, 0x6a, 0x7f                               }, { vcvtss2usi r13d,DWORD rdx+0x1fc                            }
+testcase	{ 0x62, 0x71, 0x7e, 0x08, 0x79, 0xaa, 0x00, 0x02, 0x00, 0x00             }, { vcvtss2usi r13d,DWORD rdx+0x200                            }
+testcase	{ 0x62, 0x71, 0x7e, 0x08, 0x79, 0x6a, 0x80                               }, { vcvtss2usi r13d,DWORD rdx-0x200                            }
+testcase	{ 0x62, 0x71, 0x7e, 0x08, 0x79, 0xaa, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtss2usi r13d,DWORD rdx-0x204                            }
+testcase	{ 0x62, 0x91, 0xfe, 0x08, 0x79, 0xc6                                     }, { vcvtss2usi rax,xmm30                                         }
+testcase	{ 0x62, 0x91, 0xfe, 0x18, 0x79, 0xc6                                     }, { vcvtss2usi rax,xmm30,{rn-sae}                                }
+testcase	{ 0x62, 0x91, 0xfe, 0x58, 0x79, 0xc6                                     }, { vcvtss2usi rax,xmm30,{ru-sae}                                }
+testcase	{ 0x62, 0x91, 0xfe, 0x38, 0x79, 0xc6                                     }, { vcvtss2usi rax,xmm30,{rd-sae}                                }
+testcase	{ 0x62, 0x91, 0xfe, 0x78, 0x79, 0xc6                                     }, { vcvtss2usi rax,xmm30,{rz-sae}                                }
+testcase	{ 0x62, 0xf1, 0xfe, 0x08, 0x79, 0x01                                     }, { vcvtss2usi rax,DWORD rcx                                   }
+testcase	{ 0x62, 0xb1, 0xfe, 0x08, 0x79, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtss2usi rax,DWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0xf1, 0xfe, 0x08, 0x79, 0x42, 0x7f                               }, { vcvtss2usi rax,DWORD rdx+0x1fc                             }
+testcase	{ 0x62, 0xf1, 0xfe, 0x08, 0x79, 0x82, 0x00, 0x02, 0x00, 0x00             }, { vcvtss2usi rax,DWORD rdx+0x200                             }
+testcase	{ 0x62, 0xf1, 0xfe, 0x08, 0x79, 0x42, 0x80                               }, { vcvtss2usi rax,DWORD rdx-0x200                             }
+testcase	{ 0x62, 0xf1, 0xfe, 0x08, 0x79, 0x82, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtss2usi rax,DWORD rdx-0x204                             }
+testcase	{ 0x62, 0x11, 0xfe, 0x08, 0x79, 0xc6                                     }, { vcvtss2usi r8,xmm30                                          }
+testcase	{ 0x62, 0x11, 0xfe, 0x18, 0x79, 0xc6                                     }, { vcvtss2usi r8,xmm30,{rn-sae}                                 }
+testcase	{ 0x62, 0x11, 0xfe, 0x58, 0x79, 0xc6                                     }, { vcvtss2usi r8,xmm30,{ru-sae}                                 }
+testcase	{ 0x62, 0x11, 0xfe, 0x38, 0x79, 0xc6                                     }, { vcvtss2usi r8,xmm30,{rd-sae}                                 }
+testcase	{ 0x62, 0x11, 0xfe, 0x78, 0x79, 0xc6                                     }, { vcvtss2usi r8,xmm30,{rz-sae}                                 }
+testcase	{ 0x62, 0x71, 0xfe, 0x08, 0x79, 0x01                                     }, { vcvtss2usi r8,DWORD rcx                                    }
+testcase	{ 0x62, 0x31, 0xfe, 0x08, 0x79, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtss2usi r8,DWORD rax+r14*8+0x123                        }
+testcase	{ 0x62, 0x71, 0xfe, 0x08, 0x79, 0x42, 0x7f                               }, { vcvtss2usi r8,DWORD rdx+0x1fc                              }
+testcase	{ 0x62, 0x71, 0xfe, 0x08, 0x79, 0x82, 0x00, 0x02, 0x00, 0x00             }, { vcvtss2usi r8,DWORD rdx+0x200                              }
+testcase	{ 0x62, 0x71, 0xfe, 0x08, 0x79, 0x42, 0x80                               }, { vcvtss2usi r8,DWORD rdx-0x200                              }
+testcase	{ 0x62, 0x71, 0xfe, 0x08, 0x79, 0x82, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtss2usi r8,DWORD rdx-0x204                              }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x7b, 0xf0                                     }, { vcvtusi2sd xmm30,xmm29,eax                                   }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x7b, 0xf5                                     }, { vcvtusi2sd xmm30,xmm29,ebp                                   }
+testcase	{ 0x62, 0x41, 0x17, 0x00, 0x7b, 0xf5                                     }, { vcvtusi2sd xmm30,xmm29,r13d                                  }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x7b, 0x31                                     }, { vcvtusi2sd xmm30,xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x17, 0x00, 0x7b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtusi2sd xmm30,xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x7b, 0x72, 0x7f                               }, { vcvtusi2sd xmm30,xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x7b, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvtusi2sd xmm30,xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x7b, 0x72, 0x80                               }, { vcvtusi2sd xmm30,xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x7b, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtusi2sd xmm30,xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x61, 0x97, 0x00, 0x7b, 0xf0                                     }, { vcvtusi2sd xmm30,xmm29,rax                                   }
+testcase	{ 0x62, 0x61, 0x97, 0x10, 0x7b, 0xf0                                     }, { vcvtusi2sd xmm30,xmm29,{rn-sae},rax                          }
+testcase	{ 0x62, 0x61, 0x97, 0x50, 0x7b, 0xf0                                     }, { vcvtusi2sd xmm30,xmm29,{ru-sae},rax                          }
+testcase	{ 0x62, 0x61, 0x97, 0x30, 0x7b, 0xf0                                     }, { vcvtusi2sd xmm30,xmm29,{rd-sae},rax                          }
+testcase	{ 0x62, 0x61, 0x97, 0x70, 0x7b, 0xf0                                     }, { vcvtusi2sd xmm30,xmm29,{rz-sae},rax                          }
+testcase	{ 0x62, 0x41, 0x97, 0x00, 0x7b, 0xf0                                     }, { vcvtusi2sd xmm30,xmm29,r8                                    }
+testcase	{ 0x62, 0x41, 0x97, 0x10, 0x7b, 0xf0                                     }, { vcvtusi2sd xmm30,xmm29,{rn-sae},r8                           }
+testcase	{ 0x62, 0x41, 0x97, 0x50, 0x7b, 0xf0                                     }, { vcvtusi2sd xmm30,xmm29,{ru-sae},r8                           }
+testcase	{ 0x62, 0x41, 0x97, 0x30, 0x7b, 0xf0                                     }, { vcvtusi2sd xmm30,xmm29,{rd-sae},r8                           }
+testcase	{ 0x62, 0x41, 0x97, 0x70, 0x7b, 0xf0                                     }, { vcvtusi2sd xmm30,xmm29,{rz-sae},r8                           }
+testcase	{ 0x62, 0x61, 0x97, 0x00, 0x7b, 0x31                                     }, { vcvtusi2sd xmm30,xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x97, 0x00, 0x7b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtusi2sd xmm30,xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x97, 0x00, 0x7b, 0x72, 0x7f                               }, { vcvtusi2sd xmm30,xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0x61, 0x97, 0x00, 0x7b, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vcvtusi2sd xmm30,xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x00, 0x7b, 0x72, 0x80                               }, { vcvtusi2sd xmm30,xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x00, 0x7b, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtusi2sd xmm30,xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,eax                                   }
+testcase	{ 0x62, 0x61, 0x16, 0x10, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,{rn-sae},eax                          }
+testcase	{ 0x62, 0x61, 0x16, 0x50, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,{ru-sae},eax                          }
+testcase	{ 0x62, 0x61, 0x16, 0x30, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,{rd-sae},eax                          }
+testcase	{ 0x62, 0x61, 0x16, 0x70, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,{rz-sae},eax                          }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x7b, 0xf5                                     }, { vcvtusi2ss xmm30,xmm29,ebp                                   }
+testcase	{ 0x62, 0x61, 0x16, 0x10, 0x7b, 0xf5                                     }, { vcvtusi2ss xmm30,xmm29,{rn-sae},ebp                          }
+testcase	{ 0x62, 0x61, 0x16, 0x50, 0x7b, 0xf5                                     }, { vcvtusi2ss xmm30,xmm29,{ru-sae},ebp                          }
+testcase	{ 0x62, 0x61, 0x16, 0x30, 0x7b, 0xf5                                     }, { vcvtusi2ss xmm30,xmm29,{rd-sae},ebp                          }
+testcase	{ 0x62, 0x61, 0x16, 0x70, 0x7b, 0xf5                                     }, { vcvtusi2ss xmm30,xmm29,{rz-sae},ebp                          }
+testcase	{ 0x62, 0x41, 0x16, 0x00, 0x7b, 0xf5                                     }, { vcvtusi2ss xmm30,xmm29,r13d                                  }
+testcase	{ 0x62, 0x41, 0x16, 0x10, 0x7b, 0xf5                                     }, { vcvtusi2ss xmm30,xmm29,{rn-sae},r13d                         }
+testcase	{ 0x62, 0x41, 0x16, 0x50, 0x7b, 0xf5                                     }, { vcvtusi2ss xmm30,xmm29,{ru-sae},r13d                         }
+testcase	{ 0x62, 0x41, 0x16, 0x30, 0x7b, 0xf5                                     }, { vcvtusi2ss xmm30,xmm29,{rd-sae},r13d                         }
+testcase	{ 0x62, 0x41, 0x16, 0x70, 0x7b, 0xf5                                     }, { vcvtusi2ss xmm30,xmm29,{rz-sae},r13d                         }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x7b, 0x31                                     }, { vcvtusi2ss xmm30,xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x16, 0x00, 0x7b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtusi2ss xmm30,xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x7b, 0x72, 0x7f                               }, { vcvtusi2ss xmm30,xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x7b, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvtusi2ss xmm30,xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x7b, 0x72, 0x80                               }, { vcvtusi2ss xmm30,xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x7b, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtusi2ss xmm30,xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x61, 0x96, 0x00, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,rax                                   }
+testcase	{ 0x62, 0x61, 0x96, 0x10, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,{rn-sae},rax                          }
+testcase	{ 0x62, 0x61, 0x96, 0x50, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,{ru-sae},rax                          }
+testcase	{ 0x62, 0x61, 0x96, 0x30, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,{rd-sae},rax                          }
+testcase	{ 0x62, 0x61, 0x96, 0x70, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,{rz-sae},rax                          }
+testcase	{ 0x62, 0x41, 0x96, 0x00, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,r8                                    }
+testcase	{ 0x62, 0x41, 0x96, 0x10, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,{rn-sae},r8                           }
+testcase	{ 0x62, 0x41, 0x96, 0x50, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,{ru-sae},r8                           }
+testcase	{ 0x62, 0x41, 0x96, 0x30, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,{rd-sae},r8                           }
+testcase	{ 0x62, 0x41, 0x96, 0x70, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,{rz-sae},r8                           }
+testcase	{ 0x62, 0x61, 0x96, 0x00, 0x7b, 0x31                                     }, { vcvtusi2ss xmm30,xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x96, 0x00, 0x7b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtusi2ss xmm30,xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x96, 0x00, 0x7b, 0x72, 0x7f                               }, { vcvtusi2ss xmm30,xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0x61, 0x96, 0x00, 0x7b, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vcvtusi2ss xmm30,xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0x61, 0x96, 0x00, 0x7b, 0x72, 0x80                               }, { vcvtusi2ss xmm30,xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0x61, 0x96, 0x00, 0x7b, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtusi2ss xmm30,xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x2c, 0xf4                                     }, { vscalefpd zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x2c, 0xf4                                     }, { vscalefpd zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x2c, 0xf4                                     }, { vscalefpd zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0x2c, 0xf4                                     }, { vscalefpd zmm30,zmm29,zmm28,{rn-sae}                         }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0x2c, 0xf4                                     }, { vscalefpd zmm30,zmm29,zmm28,{ru-sae}                         }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0x2c, 0xf4                                     }, { vscalefpd zmm30,zmm29,zmm28,{rd-sae}                         }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0x2c, 0xf4                                     }, { vscalefpd zmm30,zmm29,zmm28,{rz-sae}                         }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x2c, 0x31                                     }, { vscalefpd zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x2c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vscalefpd zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x2c, 0x31                                     }, { vscalefpd zmm30,zmm29,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x2c, 0x72, 0x7f                               }, { vscalefpd zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x2c, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vscalefpd zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x2c, 0x72, 0x80                               }, { vscalefpd zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x2c, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vscalefpd zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x2c, 0x72, 0x7f                               }, { vscalefpd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x2c, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vscalefpd zmm30,zmm29,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x2c, 0x72, 0x80                               }, { vscalefpd zmm30,zmm29,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x2c, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vscalefpd zmm30,zmm29,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x2c, 0xf4                                     }, { vscalefps zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x2c, 0xf4                                     }, { vscalefps zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x2c, 0xf4                                     }, { vscalefps zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0x2c, 0xf4                                     }, { vscalefps zmm30,zmm29,zmm28,{rn-sae}                         }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0x2c, 0xf4                                     }, { vscalefps zmm30,zmm29,zmm28,{ru-sae}                         }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0x2c, 0xf4                                     }, { vscalefps zmm30,zmm29,zmm28,{rd-sae}                         }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0x2c, 0xf4                                     }, { vscalefps zmm30,zmm29,zmm28,{rz-sae}                         }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x2c, 0x31                                     }, { vscalefps zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x2c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vscalefps zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x2c, 0x31                                     }, { vscalefps zmm30,zmm29,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x2c, 0x72, 0x7f                               }, { vscalefps zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x2c, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vscalefps zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x2c, 0x72, 0x80                               }, { vscalefps zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x2c, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vscalefps zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x2c, 0x72, 0x7f                               }, { vscalefps zmm30,zmm29,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x2c, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vscalefps zmm30,zmm29,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x2c, 0x72, 0x80                               }, { vscalefps zmm30,zmm29,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x2c, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vscalefps zmm30,zmm29,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0x2d, 0xf4                                     }, { vscalefsd xmm30{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0x2d, 0xf4                                     }, { vscalefsd xmm30{k7}{z},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0x2d, 0xf4                                     }, { vscalefsd xmm30{k7},xmm29,xmm28,{rn-sae}                     }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0x2d, 0xf4                                     }, { vscalefsd xmm30{k7},xmm29,xmm28,{ru-sae}                     }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0x2d, 0xf4                                     }, { vscalefsd xmm30{k7},xmm29,xmm28,{rd-sae}                     }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0x2d, 0xf4                                     }, { vscalefsd xmm30{k7},xmm29,xmm28,{rz-sae}                     }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x2d, 0x31                                     }, { vscalefsd xmm30{k7},xmm29,QWORD rcx                        }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0x2d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vscalefsd xmm30{k7},xmm29,QWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x2d, 0x72, 0x7f                               }, { vscalefsd xmm30{k7},xmm29,QWORD rdx+0x3f8                  }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x2d, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vscalefsd xmm30{k7},xmm29,QWORD rdx+0x400                  }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x2d, 0x72, 0x80                               }, { vscalefsd xmm30{k7},xmm29,QWORD rdx-0x400                  }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x2d, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vscalefsd xmm30{k7},xmm29,QWORD rdx-0x408                  }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0x2d, 0xf4                                     }, { vscalefss xmm30{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0x2d, 0xf4                                     }, { vscalefss xmm30{k7}{z},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0x2d, 0xf4                                     }, { vscalefss xmm30{k7},xmm29,xmm28,{rn-sae}                     }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0x2d, 0xf4                                     }, { vscalefss xmm30{k7},xmm29,xmm28,{ru-sae}                     }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0x2d, 0xf4                                     }, { vscalefss xmm30{k7},xmm29,xmm28,{rd-sae}                     }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0x2d, 0xf4                                     }, { vscalefss xmm30{k7},xmm29,xmm28,{rz-sae}                     }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x2d, 0x31                                     }, { vscalefss xmm30{k7},xmm29,DWORD rcx                        }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0x2d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vscalefss xmm30{k7},xmm29,DWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x2d, 0x72, 0x7f                               }, { vscalefss xmm30{k7},xmm29,DWORD rdx+0x1fc                  }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x2d, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vscalefss xmm30{k7},xmm29,DWORD rdx+0x200                  }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x2d, 0x72, 0x80                               }, { vscalefss xmm30{k7},xmm29,DWORD rdx-0x200                  }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x2d, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vscalefss xmm30{k7},xmm29,DWORD rdx-0x204                  }
+testcase	{ 0x62, 0x03, 0x15, 0x40, 0x54, 0xf4, 0xab                               }, { vfixupimmps zmm30,zmm29,zmm28,0xab                           }
+testcase	{ 0x62, 0x03, 0x15, 0x47, 0x54, 0xf4, 0xab                               }, { vfixupimmps zmm30{k7},zmm29,zmm28,0xab                       }
+testcase	{ 0x62, 0x03, 0x15, 0xc7, 0x54, 0xf4, 0xab                               }, { vfixupimmps zmm30{k7}{z},zmm29,zmm28,0xab                    }
+testcase	{ 0x62, 0x03, 0x15, 0x10, 0x54, 0xf4, 0xab                               }, { vfixupimmps zmm30,zmm29,zmm28,{sae},0xab                     }
+testcase	{ 0x62, 0x03, 0x15, 0x40, 0x54, 0xf4, 0x7b                               }, { vfixupimmps zmm30,zmm29,zmm28,0x7b                           }
+testcase	{ 0x62, 0x03, 0x15, 0x10, 0x54, 0xf4, 0x7b                               }, { vfixupimmps zmm30,zmm29,zmm28,{sae},0x7b                     }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x54, 0x31, 0x7b                               }, { vfixupimmps zmm30,zmm29,ZWORD rcx,0x7b                     }
+testcase	{ 0x62, 0x23, 0x15, 0x40, 0x54, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vfixupimmps zmm30,zmm29,ZWORD rax+r14*8+0x123,0x7b         }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x54, 0x31, 0x7b                               }, { vfixupimmps zmm30,zmm29,DWORD rcx{1to16},0x7b              }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x54, 0x72, 0x7f, 0x7b                         }, { vfixupimmps zmm30,zmm29,ZWORD rdx+0x1fc0,0x7b              }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x54, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vfixupimmps zmm30,zmm29,ZWORD rdx+0x2000,0x7b              }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x54, 0x72, 0x80, 0x7b                         }, { vfixupimmps zmm30,zmm29,ZWORD rdx-0x2000,0x7b              }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x54, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vfixupimmps zmm30,zmm29,ZWORD rdx-0x2040,0x7b              }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x54, 0x72, 0x7f, 0x7b                         }, { vfixupimmps zmm30,zmm29,DWORD rdx+0x1fc{1to16},0x7b        }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x54, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vfixupimmps zmm30,zmm29,DWORD rdx+0x200{1to16},0x7b        }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x54, 0x72, 0x80, 0x7b                         }, { vfixupimmps zmm30,zmm29,DWORD rdx-0x200{1to16},0x7b        }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x54, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vfixupimmps zmm30,zmm29,DWORD rdx-0x204{1to16},0x7b        }
+testcase	{ 0x62, 0x03, 0x95, 0x40, 0x54, 0xf4, 0xab                               }, { vfixupimmpd zmm30,zmm29,zmm28,0xab                           }
+testcase	{ 0x62, 0x03, 0x95, 0x47, 0x54, 0xf4, 0xab                               }, { vfixupimmpd zmm30{k7},zmm29,zmm28,0xab                       }
+testcase	{ 0x62, 0x03, 0x95, 0xc7, 0x54, 0xf4, 0xab                               }, { vfixupimmpd zmm30{k7}{z},zmm29,zmm28,0xab                    }
+testcase	{ 0x62, 0x03, 0x95, 0x10, 0x54, 0xf4, 0xab                               }, { vfixupimmpd zmm30,zmm29,zmm28,{sae},0xab                     }
+testcase	{ 0x62, 0x03, 0x95, 0x40, 0x54, 0xf4, 0x7b                               }, { vfixupimmpd zmm30,zmm29,zmm28,0x7b                           }
+testcase	{ 0x62, 0x03, 0x95, 0x10, 0x54, 0xf4, 0x7b                               }, { vfixupimmpd zmm30,zmm29,zmm28,{sae},0x7b                     }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x54, 0x31, 0x7b                               }, { vfixupimmpd zmm30,zmm29,ZWORD rcx,0x7b                     }
+testcase	{ 0x62, 0x23, 0x95, 0x40, 0x54, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vfixupimmpd zmm30,zmm29,ZWORD rax+r14*8+0x123,0x7b         }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x54, 0x31, 0x7b                               }, { vfixupimmpd zmm30,zmm29,QWORD rcx{1to8},0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x54, 0x72, 0x7f, 0x7b                         }, { vfixupimmpd zmm30,zmm29,ZWORD rdx+0x1fc0,0x7b              }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x54, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vfixupimmpd zmm30,zmm29,ZWORD rdx+0x2000,0x7b              }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x54, 0x72, 0x80, 0x7b                         }, { vfixupimmpd zmm30,zmm29,ZWORD rdx-0x2000,0x7b              }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x54, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vfixupimmpd zmm30,zmm29,ZWORD rdx-0x2040,0x7b              }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x54, 0x72, 0x7f, 0x7b                         }, { vfixupimmpd zmm30,zmm29,QWORD rdx+0x3f8{1to8},0x7b         }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x54, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vfixupimmpd zmm30,zmm29,QWORD rdx+0x400{1to8},0x7b         }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x54, 0x72, 0x80, 0x7b                         }, { vfixupimmpd zmm30,zmm29,QWORD rdx-0x400{1to8},0x7b         }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x54, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vfixupimmpd zmm30,zmm29,QWORD rdx-0x408{1to8},0x7b         }
+testcase	{ 0x62, 0x03, 0x15, 0x07, 0x55, 0xf4, 0xab                               }, { vfixupimmss xmm30{k7},xmm29,xmm28,0xab                       }
+testcase	{ 0x62, 0x03, 0x15, 0x87, 0x55, 0xf4, 0xab                               }, { vfixupimmss xmm30{k7}{z},xmm29,xmm28,0xab                    }
+testcase	{ 0x62, 0x03, 0x15, 0x17, 0x55, 0xf4, 0xab                               }, { vfixupimmss xmm30{k7},xmm29,xmm28,{sae},0xab                 }
+testcase	{ 0x62, 0x03, 0x15, 0x07, 0x55, 0xf4, 0x7b                               }, { vfixupimmss xmm30{k7},xmm29,xmm28,0x7b                       }
+testcase	{ 0x62, 0x03, 0x15, 0x17, 0x55, 0xf4, 0x7b                               }, { vfixupimmss xmm30{k7},xmm29,xmm28,{sae},0x7b                 }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x55, 0x31, 0x7b                               }, { vfixupimmss xmm30{k7},xmm29,DWORD rcx,0x7b                 }
+testcase	{ 0x62, 0x23, 0x15, 0x07, 0x55, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vfixupimmss xmm30{k7},xmm29,DWORD rax+r14*8+0x123,0x7b     }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x55, 0x72, 0x7f, 0x7b                         }, { vfixupimmss xmm30{k7},xmm29,DWORD rdx+0x1fc,0x7b           }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x55, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vfixupimmss xmm30{k7},xmm29,DWORD rdx+0x200,0x7b           }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x55, 0x72, 0x80, 0x7b                         }, { vfixupimmss xmm30{k7},xmm29,DWORD rdx-0x200,0x7b           }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x55, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vfixupimmss xmm30{k7},xmm29,DWORD rdx-0x204,0x7b           }
+testcase	{ 0x62, 0x03, 0x95, 0x07, 0x55, 0xf4, 0xab                               }, { vfixupimmsd xmm30{k7},xmm29,xmm28,0xab                       }
+testcase	{ 0x62, 0x03, 0x95, 0x87, 0x55, 0xf4, 0xab                               }, { vfixupimmsd xmm30{k7}{z},xmm29,xmm28,0xab                    }
+testcase	{ 0x62, 0x03, 0x95, 0x17, 0x55, 0xf4, 0xab                               }, { vfixupimmsd xmm30{k7},xmm29,xmm28,{sae},0xab                 }
+testcase	{ 0x62, 0x03, 0x95, 0x07, 0x55, 0xf4, 0x7b                               }, { vfixupimmsd xmm30{k7},xmm29,xmm28,0x7b                       }
+testcase	{ 0x62, 0x03, 0x95, 0x17, 0x55, 0xf4, 0x7b                               }, { vfixupimmsd xmm30{k7},xmm29,xmm28,{sae},0x7b                 }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x55, 0x31, 0x7b                               }, { vfixupimmsd xmm30{k7},xmm29,QWORD rcx,0x7b                 }
+testcase	{ 0x62, 0x23, 0x95, 0x07, 0x55, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vfixupimmsd xmm30{k7},xmm29,QWORD rax+r14*8+0x123,0x7b     }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x55, 0x72, 0x7f, 0x7b                         }, { vfixupimmsd xmm30{k7},xmm29,QWORD rdx+0x3f8,0x7b           }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x55, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vfixupimmsd xmm30{k7},xmm29,QWORD rdx+0x400,0x7b           }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x55, 0x72, 0x80, 0x7b                         }, { vfixupimmsd xmm30{k7},xmm29,QWORD rdx-0x400,0x7b           }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x55, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vfixupimmsd xmm30{k7},xmm29,QWORD rdx-0x408,0x7b           }
+testcase	{ 0x62, 0x91, 0x0d, 0x40, 0x72, 0xf5, 0xab                               }, { vpslld zmm30,zmm29,0xab                                      }
+testcase	{ 0x62, 0x91, 0x0d, 0x47, 0x72, 0xf5, 0xab                               }, { vpslld zmm30{k7},zmm29,0xab                                  }
+testcase	{ 0x62, 0x91, 0x0d, 0xc7, 0x72, 0xf5, 0xab                               }, { vpslld zmm30{k7}{z},zmm29,0xab                               }
+testcase	{ 0x62, 0x91, 0x0d, 0x40, 0x72, 0xf5, 0x7b                               }, { vpslld zmm30,zmm29,0x7b                                      }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x31, 0x7b                               }, { vpslld zmm30,ZWORD rcx,0x7b                                }
+testcase	{ 0x62, 0xb1, 0x0d, 0x40, 0x72, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpslld zmm30,ZWORD rax+r14*8+0x123,0x7b                    }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x31, 0x7b                               }, { vpslld zmm30,DWORD rcx{1to16},0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x72, 0x7f, 0x7b                         }, { vpslld zmm30,ZWORD rdx+0x1fc0,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpslld zmm30,ZWORD rdx+0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x72, 0x80, 0x7b                         }, { vpslld zmm30,ZWORD rdx-0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpslld zmm30,ZWORD rdx-0x2040,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x72, 0x7f, 0x7b                         }, { vpslld zmm30,DWORD rdx+0x1fc{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vpslld zmm30,DWORD rdx+0x200{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x72, 0x80, 0x7b                         }, { vpslld zmm30,DWORD rdx-0x200{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vpslld zmm30,DWORD rdx-0x204{1to16},0x7b                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0x73, 0xf5, 0xab                               }, { vpsllq zmm30,zmm29,0xab                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0x73, 0xf5, 0xab                               }, { vpsllq zmm30{k7},zmm29,0xab                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0xc7, 0x73, 0xf5, 0xab                               }, { vpsllq zmm30{k7}{z},zmm29,0xab                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0x73, 0xf5, 0x7b                               }, { vpsllq zmm30,zmm29,0x7b                                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x73, 0x31, 0x7b                               }, { vpsllq zmm30,ZWORD rcx,0x7b                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0x73, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpsllq zmm30,ZWORD rax+r14*8+0x123,0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x73, 0x31, 0x7b                               }, { vpsllq zmm30,QWORD rcx{1to8},0x7b                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x73, 0x72, 0x7f, 0x7b                         }, { vpsllq zmm30,ZWORD rdx+0x1fc0,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x73, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpsllq zmm30,ZWORD rdx+0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x73, 0x72, 0x80, 0x7b                         }, { vpsllq zmm30,ZWORD rdx-0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x73, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpsllq zmm30,ZWORD rdx-0x2040,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x73, 0x72, 0x7f, 0x7b                         }, { vpsllq zmm30,QWORD rdx+0x3f8{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x73, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vpsllq zmm30,QWORD rdx+0x400{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x73, 0x72, 0x80, 0x7b                         }, { vpsllq zmm30,QWORD rdx-0x400{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x73, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vpsllq zmm30,QWORD rdx-0x408{1to8},0x7b                    }
+testcase	{ 0x62, 0x91, 0x0d, 0x40, 0x72, 0xe5, 0xab                               }, { vpsrad zmm30,zmm29,0xab                                      }
+testcase	{ 0x62, 0x91, 0x0d, 0x47, 0x72, 0xe5, 0xab                               }, { vpsrad zmm30{k7},zmm29,0xab                                  }
+testcase	{ 0x62, 0x91, 0x0d, 0xc7, 0x72, 0xe5, 0xab                               }, { vpsrad zmm30{k7}{z},zmm29,0xab                               }
+testcase	{ 0x62, 0x91, 0x0d, 0x40, 0x72, 0xe5, 0x7b                               }, { vpsrad zmm30,zmm29,0x7b                                      }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x21, 0x7b                               }, { vpsrad zmm30,ZWORD rcx,0x7b                                }
+testcase	{ 0x62, 0xb1, 0x0d, 0x40, 0x72, 0xa4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpsrad zmm30,ZWORD rax+r14*8+0x123,0x7b                    }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x21, 0x7b                               }, { vpsrad zmm30,DWORD rcx{1to16},0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x62, 0x7f, 0x7b                         }, { vpsrad zmm30,ZWORD rdx+0x1fc0,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0xa2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpsrad zmm30,ZWORD rdx+0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x62, 0x80, 0x7b                         }, { vpsrad zmm30,ZWORD rdx-0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0xa2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpsrad zmm30,ZWORD rdx-0x2040,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x62, 0x7f, 0x7b                         }, { vpsrad zmm30,DWORD rdx+0x1fc{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0xa2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vpsrad zmm30,DWORD rdx+0x200{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x62, 0x80, 0x7b                         }, { vpsrad zmm30,DWORD rdx-0x200{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0xa2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vpsrad zmm30,DWORD rdx-0x204{1to16},0x7b                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0x72, 0xe5, 0xab                               }, { vpsraq zmm30,zmm29,0xab                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0x72, 0xe5, 0xab                               }, { vpsraq zmm30{k7},zmm29,0xab                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0xc7, 0x72, 0xe5, 0xab                               }, { vpsraq zmm30{k7}{z},zmm29,0xab                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0x72, 0xe5, 0x7b                               }, { vpsraq zmm30,zmm29,0x7b                                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x21, 0x7b                               }, { vpsraq zmm30,ZWORD rcx,0x7b                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0x72, 0xa4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpsraq zmm30,ZWORD rax+r14*8+0x123,0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x21, 0x7b                               }, { vpsraq zmm30,QWORD rcx{1to8},0x7b                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x62, 0x7f, 0x7b                         }, { vpsraq zmm30,ZWORD rdx+0x1fc0,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0xa2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpsraq zmm30,ZWORD rdx+0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x62, 0x80, 0x7b                         }, { vpsraq zmm30,ZWORD rdx-0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0xa2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpsraq zmm30,ZWORD rdx-0x2040,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x62, 0x7f, 0x7b                         }, { vpsraq zmm30,QWORD rdx+0x3f8{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0xa2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vpsraq zmm30,QWORD rdx+0x400{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x62, 0x80, 0x7b                         }, { vpsraq zmm30,QWORD rdx-0x400{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0xa2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vpsraq zmm30,QWORD rdx-0x408{1to8},0x7b                    }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x15, 0xf4                                     }, { vprolvd zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x15, 0xf4                                     }, { vprolvd zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x15, 0xf4                                     }, { vprolvd zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x15, 0x31                                     }, { vprolvd zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x15, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vprolvd zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x15, 0x31                                     }, { vprolvd zmm30,zmm29,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x15, 0x72, 0x7f                               }, { vprolvd zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x15, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vprolvd zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x15, 0x72, 0x80                               }, { vprolvd zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x15, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vprolvd zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x15, 0x72, 0x7f                               }, { vprolvd zmm30,zmm29,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x15, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vprolvd zmm30,zmm29,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x15, 0x72, 0x80                               }, { vprolvd zmm30,zmm29,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x15, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vprolvd zmm30,zmm29,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x91, 0x0d, 0x40, 0x72, 0xcd, 0xab                               }, { vprold zmm30,zmm29,0xab                                      }
+testcase	{ 0x62, 0x91, 0x0d, 0x47, 0x72, 0xcd, 0xab                               }, { vprold zmm30{k7},zmm29,0xab                                  }
+testcase	{ 0x62, 0x91, 0x0d, 0xc7, 0x72, 0xcd, 0xab                               }, { vprold zmm30{k7}{z},zmm29,0xab                               }
+testcase	{ 0x62, 0x91, 0x0d, 0x40, 0x72, 0xcd, 0x7b                               }, { vprold zmm30,zmm29,0x7b                                      }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x09, 0x7b                               }, { vprold zmm30,ZWORD rcx,0x7b                                }
+testcase	{ 0x62, 0xb1, 0x0d, 0x40, 0x72, 0x8c, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vprold zmm30,ZWORD rax+r14*8+0x123,0x7b                    }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x09, 0x7b                               }, { vprold zmm30,DWORD rcx{1to16},0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x4a, 0x7f, 0x7b                         }, { vprold zmm30,ZWORD rdx+0x1fc0,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x8a, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vprold zmm30,ZWORD rdx+0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x4a, 0x80, 0x7b                         }, { vprold zmm30,ZWORD rdx-0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x8a, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vprold zmm30,ZWORD rdx-0x2040,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x4a, 0x7f, 0x7b                         }, { vprold zmm30,DWORD rdx+0x1fc{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x8a, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vprold zmm30,DWORD rdx+0x200{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x4a, 0x80, 0x7b                         }, { vprold zmm30,DWORD rdx-0x200{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x8a, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vprold zmm30,DWORD rdx-0x204{1to16},0x7b                   }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x15, 0xf4                                     }, { vprolvq zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x15, 0xf4                                     }, { vprolvq zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x15, 0xf4                                     }, { vprolvq zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x15, 0x31                                     }, { vprolvq zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x15, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vprolvq zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x15, 0x31                                     }, { vprolvq zmm30,zmm29,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x15, 0x72, 0x7f                               }, { vprolvq zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x15, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vprolvq zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x15, 0x72, 0x80                               }, { vprolvq zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x15, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vprolvq zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x15, 0x72, 0x7f                               }, { vprolvq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x15, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vprolvq zmm30,zmm29,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x15, 0x72, 0x80                               }, { vprolvq zmm30,zmm29,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x15, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vprolvq zmm30,zmm29,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0x72, 0xcd, 0xab                               }, { vprolq zmm30,zmm29,0xab                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0x72, 0xcd, 0xab                               }, { vprolq zmm30{k7},zmm29,0xab                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0xc7, 0x72, 0xcd, 0xab                               }, { vprolq zmm30{k7}{z},zmm29,0xab                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0x72, 0xcd, 0x7b                               }, { vprolq zmm30,zmm29,0x7b                                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x09, 0x7b                               }, { vprolq zmm30,ZWORD rcx,0x7b                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0x72, 0x8c, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vprolq zmm30,ZWORD rax+r14*8+0x123,0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x09, 0x7b                               }, { vprolq zmm30,QWORD rcx{1to8},0x7b                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x4a, 0x7f, 0x7b                         }, { vprolq zmm30,ZWORD rdx+0x1fc0,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x8a, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vprolq zmm30,ZWORD rdx+0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x4a, 0x80, 0x7b                         }, { vprolq zmm30,ZWORD rdx-0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x8a, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vprolq zmm30,ZWORD rdx-0x2040,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x4a, 0x7f, 0x7b                         }, { vprolq zmm30,QWORD rdx+0x3f8{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x8a, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vprolq zmm30,QWORD rdx+0x400{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x4a, 0x80, 0x7b                         }, { vprolq zmm30,QWORD rdx-0x400{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x8a, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vprolq zmm30,QWORD rdx-0x408{1to8},0x7b                    }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x14, 0xf4                                     }, { vprorvd zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x14, 0xf4                                     }, { vprorvd zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x14, 0xf4                                     }, { vprorvd zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x14, 0x31                                     }, { vprorvd zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x14, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vprorvd zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x14, 0x31                                     }, { vprorvd zmm30,zmm29,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x14, 0x72, 0x7f                               }, { vprorvd zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x14, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vprorvd zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x14, 0x72, 0x80                               }, { vprorvd zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x14, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vprorvd zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x14, 0x72, 0x7f                               }, { vprorvd zmm30,zmm29,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x14, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vprorvd zmm30,zmm29,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x14, 0x72, 0x80                               }, { vprorvd zmm30,zmm29,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x14, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vprorvd zmm30,zmm29,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x91, 0x0d, 0x40, 0x72, 0xc5, 0xab                               }, { vprord zmm30,zmm29,0xab                                      }
+testcase	{ 0x62, 0x91, 0x0d, 0x47, 0x72, 0xc5, 0xab                               }, { vprord zmm30{k7},zmm29,0xab                                  }
+testcase	{ 0x62, 0x91, 0x0d, 0xc7, 0x72, 0xc5, 0xab                               }, { vprord zmm30{k7}{z},zmm29,0xab                               }
+testcase	{ 0x62, 0x91, 0x0d, 0x40, 0x72, 0xc5, 0x7b                               }, { vprord zmm30,zmm29,0x7b                                      }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x01, 0x7b                               }, { vprord zmm30,ZWORD rcx,0x7b                                }
+testcase	{ 0x62, 0xb1, 0x0d, 0x40, 0x72, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vprord zmm30,ZWORD rax+r14*8+0x123,0x7b                    }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x01, 0x7b                               }, { vprord zmm30,DWORD rcx{1to16},0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x42, 0x7f, 0x7b                         }, { vprord zmm30,ZWORD rdx+0x1fc0,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x82, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vprord zmm30,ZWORD rdx+0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x42, 0x80, 0x7b                         }, { vprord zmm30,ZWORD rdx-0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x82, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vprord zmm30,ZWORD rdx-0x2040,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x42, 0x7f, 0x7b                         }, { vprord zmm30,DWORD rdx+0x1fc{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x82, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vprord zmm30,DWORD rdx+0x200{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x42, 0x80, 0x7b                         }, { vprord zmm30,DWORD rdx-0x200{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x82, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vprord zmm30,DWORD rdx-0x204{1to16},0x7b                   }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x14, 0xf4                                     }, { vprorvq zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x14, 0xf4                                     }, { vprorvq zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x14, 0xf4                                     }, { vprorvq zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x14, 0x31                                     }, { vprorvq zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x14, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vprorvq zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x14, 0x31                                     }, { vprorvq zmm30,zmm29,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x14, 0x72, 0x7f                               }, { vprorvq zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x14, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vprorvq zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x14, 0x72, 0x80                               }, { vprorvq zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x14, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vprorvq zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x14, 0x72, 0x7f                               }, { vprorvq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x14, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vprorvq zmm30,zmm29,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x14, 0x72, 0x80                               }, { vprorvq zmm30,zmm29,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x14, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vprorvq zmm30,zmm29,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0x72, 0xc5, 0xab                               }, { vprorq zmm30,zmm29,0xab                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0x72, 0xc5, 0xab                               }, { vprorq zmm30{k7},zmm29,0xab                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0xc7, 0x72, 0xc5, 0xab                               }, { vprorq zmm30{k7}{z},zmm29,0xab                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0x72, 0xc5, 0x7b                               }, { vprorq zmm30,zmm29,0x7b                                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x01, 0x7b                               }, { vprorq zmm30,ZWORD rcx,0x7b                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0x72, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vprorq zmm30,ZWORD rax+r14*8+0x123,0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x01, 0x7b                               }, { vprorq zmm30,QWORD rcx{1to8},0x7b                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x42, 0x7f, 0x7b                         }, { vprorq zmm30,ZWORD rdx+0x1fc0,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x82, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vprorq zmm30,ZWORD rdx+0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x42, 0x80, 0x7b                         }, { vprorq zmm30,ZWORD rdx-0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x82, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vprorq zmm30,ZWORD rdx-0x2040,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x42, 0x7f, 0x7b                         }, { vprorq zmm30,QWORD rdx+0x3f8{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x82, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vprorq zmm30,QWORD rdx+0x400{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x42, 0x80, 0x7b                         }, { vprorq zmm30,QWORD rdx-0x400{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x82, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vprorq zmm30,QWORD rdx-0x408{1to8},0x7b                    }
+testcase	{ 0x62, 0x03, 0xfd, 0x48, 0x09, 0xf5, 0xab                               }, { vrndscalepd zmm30,zmm29,0xab                                 }
+testcase	{ 0x62, 0x03, 0xfd, 0x4f, 0x09, 0xf5, 0xab                               }, { vrndscalepd zmm30{k7},zmm29,0xab                             }
+testcase	{ 0x62, 0x03, 0xfd, 0xcf, 0x09, 0xf5, 0xab                               }, { vrndscalepd zmm30{k7}{z},zmm29,0xab                          }
+testcase	{ 0x62, 0x03, 0xfd, 0x18, 0x09, 0xf5, 0xab                               }, { vrndscalepd zmm30,zmm29,{sae},0xab                           }
+testcase	{ 0x62, 0x03, 0xfd, 0x48, 0x09, 0xf5, 0x7b                               }, { vrndscalepd zmm30,zmm29,0x7b                                 }
+testcase	{ 0x62, 0x03, 0xfd, 0x18, 0x09, 0xf5, 0x7b                               }, { vrndscalepd zmm30,zmm29,{sae},0x7b                           }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x09, 0x31, 0x7b                               }, { vrndscalepd zmm30,ZWORD rcx,0x7b                           }
+testcase	{ 0x62, 0x23, 0xfd, 0x48, 0x09, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vrndscalepd zmm30,ZWORD rax+r14*8+0x123,0x7b               }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x09, 0x31, 0x7b                               }, { vrndscalepd zmm30,QWORD rcx{1to8},0x7b                     }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x09, 0x72, 0x7f, 0x7b                         }, { vrndscalepd zmm30,ZWORD rdx+0x1fc0,0x7b                    }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x09, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vrndscalepd zmm30,ZWORD rdx+0x2000,0x7b                    }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x09, 0x72, 0x80, 0x7b                         }, { vrndscalepd zmm30,ZWORD rdx-0x2000,0x7b                    }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x09, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vrndscalepd zmm30,ZWORD rdx-0x2040,0x7b                    }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x09, 0x72, 0x7f, 0x7b                         }, { vrndscalepd zmm30,QWORD rdx+0x3f8{1to8},0x7b               }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x09, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vrndscalepd zmm30,QWORD rdx+0x400{1to8},0x7b               }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x09, 0x72, 0x80, 0x7b                         }, { vrndscalepd zmm30,QWORD rdx-0x400{1to8},0x7b               }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x09, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vrndscalepd zmm30,QWORD rdx-0x408{1to8},0x7b               }
+testcase	{ 0x62, 0x03, 0x7d, 0x48, 0x08, 0xf5, 0xab                               }, { vrndscaleps zmm30,zmm29,0xab                                 }
+testcase	{ 0x62, 0x03, 0x7d, 0x4f, 0x08, 0xf5, 0xab                               }, { vrndscaleps zmm30{k7},zmm29,0xab                             }
+testcase	{ 0x62, 0x03, 0x7d, 0xcf, 0x08, 0xf5, 0xab                               }, { vrndscaleps zmm30{k7}{z},zmm29,0xab                          }
+testcase	{ 0x62, 0x03, 0x7d, 0x18, 0x08, 0xf5, 0xab                               }, { vrndscaleps zmm30,zmm29,{sae},0xab                           }
+testcase	{ 0x62, 0x03, 0x7d, 0x48, 0x08, 0xf5, 0x7b                               }, { vrndscaleps zmm30,zmm29,0x7b                                 }
+testcase	{ 0x62, 0x03, 0x7d, 0x18, 0x08, 0xf5, 0x7b                               }, { vrndscaleps zmm30,zmm29,{sae},0x7b                           }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x08, 0x31, 0x7b                               }, { vrndscaleps zmm30,ZWORD rcx,0x7b                           }
+testcase	{ 0x62, 0x23, 0x7d, 0x48, 0x08, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vrndscaleps zmm30,ZWORD rax+r14*8+0x123,0x7b               }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x08, 0x31, 0x7b                               }, { vrndscaleps zmm30,DWORD rcx{1to16},0x7b                    }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x08, 0x72, 0x7f, 0x7b                         }, { vrndscaleps zmm30,ZWORD rdx+0x1fc0,0x7b                    }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x08, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vrndscaleps zmm30,ZWORD rdx+0x2000,0x7b                    }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x08, 0x72, 0x80, 0x7b                         }, { vrndscaleps zmm30,ZWORD rdx-0x2000,0x7b                    }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x08, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vrndscaleps zmm30,ZWORD rdx-0x2040,0x7b                    }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x08, 0x72, 0x7f, 0x7b                         }, { vrndscaleps zmm30,DWORD rdx+0x1fc{1to16},0x7b              }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x08, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vrndscaleps zmm30,DWORD rdx+0x200{1to16},0x7b              }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x08, 0x72, 0x80, 0x7b                         }, { vrndscaleps zmm30,DWORD rdx-0x200{1to16},0x7b              }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x08, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vrndscaleps zmm30,DWORD rdx-0x204{1to16},0x7b              }
+testcase	{ 0x62, 0x03, 0x95, 0x07, 0x0b, 0xf4, 0xab                               }, { vrndscalesd xmm30{k7},xmm29,xmm28,0xab                       }
+testcase	{ 0x62, 0x03, 0x95, 0x87, 0x0b, 0xf4, 0xab                               }, { vrndscalesd xmm30{k7}{z},xmm29,xmm28,0xab                    }
+testcase	{ 0x62, 0x03, 0x95, 0x17, 0x0b, 0xf4, 0xab                               }, { vrndscalesd xmm30{k7},xmm29,xmm28,{sae},0xab                 }
+testcase	{ 0x62, 0x03, 0x95, 0x07, 0x0b, 0xf4, 0x7b                               }, { vrndscalesd xmm30{k7},xmm29,xmm28,0x7b                       }
+testcase	{ 0x62, 0x03, 0x95, 0x17, 0x0b, 0xf4, 0x7b                               }, { vrndscalesd xmm30{k7},xmm29,xmm28,{sae},0x7b                 }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x0b, 0x31, 0x7b                               }, { vrndscalesd xmm30{k7},xmm29,QWORD rcx,0x7b                 }
+testcase	{ 0x62, 0x23, 0x95, 0x07, 0x0b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vrndscalesd xmm30{k7},xmm29,QWORD rax+r14*8+0x123,0x7b     }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x0b, 0x72, 0x7f, 0x7b                         }, { vrndscalesd xmm30{k7},xmm29,QWORD rdx+0x3f8,0x7b           }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x0b, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vrndscalesd xmm30{k7},xmm29,QWORD rdx+0x400,0x7b           }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x0b, 0x72, 0x80, 0x7b                         }, { vrndscalesd xmm30{k7},xmm29,QWORD rdx-0x400,0x7b           }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x0b, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vrndscalesd xmm30{k7},xmm29,QWORD rdx-0x408,0x7b           }
+testcase	{ 0x62, 0x03, 0x15, 0x07, 0x0a, 0xf4, 0xab                               }, { vrndscaless xmm30{k7},xmm29,xmm28,0xab                       }
+testcase	{ 0x62, 0x03, 0x15, 0x87, 0x0a, 0xf4, 0xab                               }, { vrndscaless xmm30{k7}{z},xmm29,xmm28,0xab                    }
+testcase	{ 0x62, 0x03, 0x15, 0x17, 0x0a, 0xf4, 0xab                               }, { vrndscaless xmm30{k7},xmm29,xmm28,{sae},0xab                 }
+testcase	{ 0x62, 0x03, 0x15, 0x07, 0x0a, 0xf4, 0x7b                               }, { vrndscaless xmm30{k7},xmm29,xmm28,0x7b                       }
+testcase	{ 0x62, 0x03, 0x15, 0x17, 0x0a, 0xf4, 0x7b                               }, { vrndscaless xmm30{k7},xmm29,xmm28,{sae},0x7b                 }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x0a, 0x31, 0x7b                               }, { vrndscaless xmm30{k7},xmm29,DWORD rcx,0x7b                 }
+testcase	{ 0x62, 0x23, 0x15, 0x07, 0x0a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vrndscaless xmm30{k7},xmm29,DWORD rax+r14*8+0x123,0x7b     }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x0a, 0x72, 0x7f, 0x7b                         }, { vrndscaless xmm30{k7},xmm29,DWORD rdx+0x1fc,0x7b           }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x0a, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vrndscaless xmm30{k7},xmm29,DWORD rdx+0x200,0x7b           }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x0a, 0x72, 0x80, 0x7b                         }, { vrndscaless xmm30{k7},xmm29,DWORD rdx-0x200,0x7b           }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x0a, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vrndscaless xmm30{k7},xmm29,DWORD rdx-0x204,0x7b           }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x8b, 0x31                                     }, { vpcompressq ZWORD rcx,zmm30                                }
+testcase	{ 0x62, 0x62, 0xfd, 0x4f, 0x8b, 0x31                                     }, { vpcompressq ZWORD rcx{k7},zmm30                            }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x8b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpcompressq ZWORD rax+r14*8+0x123,zmm30                    }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x8b, 0x72, 0x7f                               }, { vpcompressq ZWORD rdx+0x3f8,zmm30                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x8b, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpcompressq ZWORD rdx+0x400,zmm30                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x8b, 0x72, 0x80                               }, { vpcompressq ZWORD rdx-0x400,zmm30                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x8b, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpcompressq ZWORD rdx-0x408,zmm30                          }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0x8b, 0xee                                     }, { vpcompressq zmm30,zmm29                                      }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0x8b, 0xee                                     }, { vpcompressq zmm30{k7},zmm29                                  }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0x8b, 0xee                                     }, { vpcompressq zmm30{k7}{z},zmm29                               }
+testcase	{ 0xc5, 0xcc, 0x41, 0xef                                                 }, { kandw  k5,k6,k7                                              }
+testcase	{ 0xc5, 0xcc, 0x42, 0xef                                                 }, { kandnw k5,k6,k7                                              }
+testcase	{ 0xc5, 0xcc, 0x45, 0xef                                                 }, { korw   k5,k6,k7                                              }
+testcase	{ 0xc5, 0xcc, 0x46, 0xef                                                 }, { kxnorw k5,k6,k7                                              }
+testcase	{ 0xc5, 0xcc, 0x47, 0xef                                                 }, { kxorw  k5,k6,k7                                              }
+testcase	{ 0xc5, 0xf8, 0x44, 0xee                                                 }, { knotw  k5,k6                                                 }
+testcase	{ 0xc5, 0xf8, 0x98, 0xee                                                 }, { kortestw k5,k6                                               }
+testcase	{ 0xc4, 0xe3, 0xf9, 0x30, 0xee, 0xab                                     }, { kshiftrw k5,k6,0xab                                          }
+testcase	{ 0xc4, 0xe3, 0xf9, 0x30, 0xee, 0x7b                                     }, { kshiftrw k5,k6,0x7b                                          }
+testcase	{ 0xc4, 0xe3, 0xf9, 0x32, 0xee, 0xab                                     }, { kshiftlw k5,k6,0xab                                          }
+testcase	{ 0xc4, 0xe3, 0xf9, 0x32, 0xee, 0x7b                                     }, { kshiftlw k5,k6,0x7b                                          }
+testcase	{ 0xc5, 0xf8, 0x90, 0xee                                                 }, { kmovw  k5,k6                                                 }
+testcase	{ 0xc5, 0xf8, 0x90, 0x29                                                 }, { kmovw  k5,WORD rcx                                         }
+testcase	{ 0xc4, 0xa1, 0x78, 0x90, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00             }, { kmovw  k5,WORD rax+r14*8+0x123                             }
+testcase	{ 0xc5, 0xf8, 0x91, 0x29                                                 }, { kmovw  WORD rcx,k5                                         }
+testcase	{ 0xc4, 0xa1, 0x78, 0x91, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00             }, { kmovw  WORD rax+r14*8+0x123,k5                             }
+testcase	{ 0xc5, 0xf8, 0x92, 0xe8                                                 }, { kmovw  k5,eax                                                }
+testcase	{ 0xc5, 0xf8, 0x92, 0xed                                                 }, { kmovw  k5,ebp                                                }
+testcase	{ 0xc4, 0xc1, 0x78, 0x92, 0xed                                           }, { kmovw  k5,r13d                                               }
+testcase	{ 0xc5, 0xf8, 0x93, 0xc5                                                 }, { kmovw  eax,k5                                                }
+testcase	{ 0xc5, 0xf8, 0x93, 0xed                                                 }, { kmovw  ebp,k5                                                }
+testcase	{ 0xc5, 0x78, 0x93, 0xed                                                 }, { kmovw  r13d,k5                                               }
+testcase	{ 0xc5, 0xcd, 0x4b, 0xef                                                 }, { kunpckbw k5,k6,k7                                            }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x1d, 0x31, 0xab                               }, { vcvtps2ph YWORD rcx,zmm30,0xab                             }
+testcase	{ 0x62, 0x63, 0x7d, 0x4f, 0x1d, 0x31, 0xab                               }, { vcvtps2ph YWORD rcx{k7},zmm30,0xab                         }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x1d, 0x31, 0x7b                               }, { vcvtps2ph YWORD rcx,zmm30,0x7b                             }
+testcase	{ 0x62, 0x23, 0x7d, 0x48, 0x1d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vcvtps2ph YWORD rax+r14*8+0x123,zmm30,0x7b                 }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x1d, 0x72, 0x7f, 0x7b                         }, { vcvtps2ph YWORD rdx+0xfe0,zmm30,0x7b                       }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x1d, 0xb2, 0x00, 0x10, 0x00, 0x00, 0x7b       }, { vcvtps2ph YWORD rdx+0x1000,zmm30,0x7b                      }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x1d, 0x72, 0x80, 0x7b                         }, { vcvtps2ph YWORD rdx-0x1000,zmm30,0x7b                      }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x1d, 0xb2, 0xe0, 0xef, 0xff, 0xff, 0x7b       }, { vcvtps2ph YWORD rdx-0x1020,zmm30,0x7b                      }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x19, 0x31, 0xab                               }, { vextractf32x4 OWORD rcx,zmm30,0xab                         }
+testcase	{ 0x62, 0x63, 0x7d, 0x4f, 0x19, 0x31, 0xab                               }, { vextractf32x4 OWORD rcx{k7},zmm30,0xab                     }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x19, 0x31, 0x7b                               }, { vextractf32x4 OWORD rcx,zmm30,0x7b                         }
+testcase	{ 0x62, 0x23, 0x7d, 0x48, 0x19, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vextractf32x4 OWORD rax+r14*8+0x123,zmm30,0x7b             }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x19, 0x72, 0x7f, 0x7b                         }, { vextractf32x4 OWORD rdx+0x7f0,zmm30,0x7b                   }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x19, 0xb2, 0x00, 0x08, 0x00, 0x00, 0x7b       }, { vextractf32x4 OWORD rdx+0x800,zmm30,0x7b                   }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x19, 0x72, 0x80, 0x7b                         }, { vextractf32x4 OWORD rdx-0x800,zmm30,0x7b                   }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x19, 0xb2, 0xf0, 0xf7, 0xff, 0xff, 0x7b       }, { vextractf32x4 OWORD rdx-0x810,zmm30,0x7b                   }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x1b, 0x31, 0xab                               }, { vextractf64x4 YWORD rcx,zmm30,0xab                         }
+testcase	{ 0x62, 0x63, 0xfd, 0x4f, 0x1b, 0x31, 0xab                               }, { vextractf64x4 YWORD rcx{k7},zmm30,0xab                     }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x1b, 0x31, 0x7b                               }, { vextractf64x4 YWORD rcx,zmm30,0x7b                         }
+testcase	{ 0x62, 0x23, 0xfd, 0x48, 0x1b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vextractf64x4 YWORD rax+r14*8+0x123,zmm30,0x7b             }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x1b, 0x72, 0x7f, 0x7b                         }, { vextractf64x4 YWORD rdx+0xfe0,zmm30,0x7b                   }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x1b, 0xb2, 0x00, 0x10, 0x00, 0x00, 0x7b       }, { vextractf64x4 YWORD rdx+0x1000,zmm30,0x7b                  }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x1b, 0x72, 0x80, 0x7b                         }, { vextractf64x4 YWORD rdx-0x1000,zmm30,0x7b                  }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x1b, 0xb2, 0xe0, 0xef, 0xff, 0xff, 0x7b       }, { vextractf64x4 YWORD rdx-0x1020,zmm30,0x7b                  }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x39, 0x31, 0xab                               }, { vextracti32x4 OWORD rcx,zmm30,0xab                         }
+testcase	{ 0x62, 0x63, 0x7d, 0x4f, 0x39, 0x31, 0xab                               }, { vextracti32x4 OWORD rcx{k7},zmm30,0xab                     }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x39, 0x31, 0x7b                               }, { vextracti32x4 OWORD rcx,zmm30,0x7b                         }
+testcase	{ 0x62, 0x23, 0x7d, 0x48, 0x39, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vextracti32x4 OWORD rax+r14*8+0x123,zmm30,0x7b             }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x39, 0x72, 0x7f, 0x7b                         }, { vextracti32x4 OWORD rdx+0x7f0,zmm30,0x7b                   }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x39, 0xb2, 0x00, 0x08, 0x00, 0x00, 0x7b       }, { vextracti32x4 OWORD rdx+0x800,zmm30,0x7b                   }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x39, 0x72, 0x80, 0x7b                         }, { vextracti32x4 OWORD rdx-0x800,zmm30,0x7b                   }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x39, 0xb2, 0xf0, 0xf7, 0xff, 0xff, 0x7b       }, { vextracti32x4 OWORD rdx-0x810,zmm30,0x7b                   }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x3b, 0x31, 0xab                               }, { vextracti64x4 YWORD rcx,zmm30,0xab                         }
+testcase	{ 0x62, 0x63, 0xfd, 0x4f, 0x3b, 0x31, 0xab                               }, { vextracti64x4 YWORD rcx{k7},zmm30,0xab                     }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x3b, 0x31, 0x7b                               }, { vextracti64x4 YWORD rcx,zmm30,0x7b                         }
+testcase	{ 0x62, 0x23, 0xfd, 0x48, 0x3b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vextracti64x4 YWORD rax+r14*8+0x123,zmm30,0x7b             }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x3b, 0x72, 0x7f, 0x7b                         }, { vextracti64x4 YWORD rdx+0xfe0,zmm30,0x7b                   }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x3b, 0xb2, 0x00, 0x10, 0x00, 0x00, 0x7b       }, { vextracti64x4 YWORD rdx+0x1000,zmm30,0x7b                  }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x3b, 0x72, 0x80, 0x7b                         }, { vextracti64x4 YWORD rdx-0x1000,zmm30,0x7b                  }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x3b, 0xb2, 0xe0, 0xef, 0xff, 0xff, 0x7b       }, { vextracti64x4 YWORD rdx-0x1020,zmm30,0x7b                  }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x29, 0x31                                     }, { vmovapd ZWORD rcx,zmm30                                    }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0x29, 0x31                                     }, { vmovapd ZWORD rcx{k7},zmm30                                }
+testcase	{ 0x62, 0x21, 0xfd, 0x48, 0x29, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovapd ZWORD rax+r14*8+0x123,zmm30                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x29, 0x72, 0x7f                               }, { vmovapd ZWORD rdx+0x1fc0,zmm30                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x29, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovapd ZWORD rdx+0x2000,zmm30                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x29, 0x72, 0x80                               }, { vmovapd ZWORD rdx-0x2000,zmm30                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x29, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovapd ZWORD rdx-0x2040,zmm30                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x29, 0x31                                     }, { vmovaps ZWORD rcx,zmm30                                    }
+testcase	{ 0x62, 0x61, 0x7c, 0x4f, 0x29, 0x31                                     }, { vmovaps ZWORD rcx{k7},zmm30                                }
+testcase	{ 0x62, 0x21, 0x7c, 0x48, 0x29, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovaps ZWORD rax+r14*8+0x123,zmm30                        }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x29, 0x72, 0x7f                               }, { vmovaps ZWORD rdx+0x1fc0,zmm30                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x29, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovaps ZWORD rdx+0x2000,zmm30                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x29, 0x72, 0x80                               }, { vmovaps ZWORD rdx-0x2000,zmm30                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x29, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovaps ZWORD rdx-0x2040,zmm30                             }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x7f, 0x31                                     }, { vmovdqa32 ZWORD rcx,zmm30                                  }
+testcase	{ 0x62, 0x61, 0x7d, 0x4f, 0x7f, 0x31                                     }, { vmovdqa32 ZWORD rcx{k7},zmm30                              }
+testcase	{ 0x62, 0x21, 0x7d, 0x48, 0x7f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovdqa32 ZWORD rax+r14*8+0x123,zmm30                      }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x7f, 0x72, 0x7f                               }, { vmovdqa32 ZWORD rdx+0x1fc0,zmm30                           }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x7f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovdqa32 ZWORD rdx+0x2000,zmm30                           }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x7f, 0x72, 0x80                               }, { vmovdqa32 ZWORD rdx-0x2000,zmm30                           }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x7f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovdqa32 ZWORD rdx-0x2040,zmm30                           }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x7f, 0x31                                     }, { vmovdqa64 ZWORD rcx,zmm30                                  }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0x7f, 0x31                                     }, { vmovdqa64 ZWORD rcx{k7},zmm30                              }
+testcase	{ 0x62, 0x21, 0xfd, 0x48, 0x7f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovdqa64 ZWORD rax+r14*8+0x123,zmm30                      }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x7f, 0x72, 0x7f                               }, { vmovdqa64 ZWORD rdx+0x1fc0,zmm30                           }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x7f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovdqa64 ZWORD rdx+0x2000,zmm30                           }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x7f, 0x72, 0x80                               }, { vmovdqa64 ZWORD rdx-0x2000,zmm30                           }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x7f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovdqa64 ZWORD rdx-0x2040,zmm30                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x7f, 0x31                                     }, { vmovdqu32 ZWORD rcx,zmm30                                  }
+testcase	{ 0x62, 0x61, 0x7e, 0x4f, 0x7f, 0x31                                     }, { vmovdqu32 ZWORD rcx{k7},zmm30                              }
+testcase	{ 0x62, 0x21, 0x7e, 0x48, 0x7f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovdqu32 ZWORD rax+r14*8+0x123,zmm30                      }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x7f, 0x72, 0x7f                               }, { vmovdqu32 ZWORD rdx+0x1fc0,zmm30                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x7f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovdqu32 ZWORD rdx+0x2000,zmm30                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x7f, 0x72, 0x80                               }, { vmovdqu32 ZWORD rdx-0x2000,zmm30                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x7f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovdqu32 ZWORD rdx-0x2040,zmm30                           }
+testcase	{ 0x62, 0x61, 0xfe, 0x48, 0x7f, 0x31                                     }, { vmovdqu64 ZWORD rcx,zmm30                                  }
+testcase	{ 0x62, 0x61, 0xfe, 0x4f, 0x7f, 0x31                                     }, { vmovdqu64 ZWORD rcx{k7},zmm30                              }
+testcase	{ 0x62, 0x21, 0xfe, 0x48, 0x7f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovdqu64 ZWORD rax+r14*8+0x123,zmm30                      }
+testcase	{ 0x62, 0x61, 0xfe, 0x48, 0x7f, 0x72, 0x7f                               }, { vmovdqu64 ZWORD rdx+0x1fc0,zmm30                           }
+testcase	{ 0x62, 0x61, 0xfe, 0x48, 0x7f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovdqu64 ZWORD rdx+0x2000,zmm30                           }
+testcase	{ 0x62, 0x61, 0xfe, 0x48, 0x7f, 0x72, 0x80                               }, { vmovdqu64 ZWORD rdx-0x2000,zmm30                           }
+testcase	{ 0x62, 0x61, 0xfe, 0x48, 0x7f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovdqu64 ZWORD rdx-0x2040,zmm30                           }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x11, 0x31                                     }, { vmovupd ZWORD rcx,zmm30                                    }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0x11, 0x31                                     }, { vmovupd ZWORD rcx{k7},zmm30                                }
+testcase	{ 0x62, 0x21, 0xfd, 0x48, 0x11, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovupd ZWORD rax+r14*8+0x123,zmm30                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x11, 0x72, 0x7f                               }, { vmovupd ZWORD rdx+0x1fc0,zmm30                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x11, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovupd ZWORD rdx+0x2000,zmm30                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x11, 0x72, 0x80                               }, { vmovupd ZWORD rdx-0x2000,zmm30                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x11, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovupd ZWORD rdx-0x2040,zmm30                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x11, 0x31                                     }, { vmovups ZWORD rcx,zmm30                                    }
+testcase	{ 0x62, 0x61, 0x7c, 0x4f, 0x11, 0x31                                     }, { vmovups ZWORD rcx{k7},zmm30                                }
+testcase	{ 0x62, 0x21, 0x7c, 0x48, 0x11, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovups ZWORD rax+r14*8+0x123,zmm30                        }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x11, 0x72, 0x7f                               }, { vmovups ZWORD rdx+0x1fc0,zmm30                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x11, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovups ZWORD rdx+0x2000,zmm30                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x11, 0x72, 0x80                               }, { vmovups ZWORD rdx-0x2000,zmm30                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x11, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovups ZWORD rdx-0x2040,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x32, 0x31                                     }, { vpmovqb QWORD rcx,zmm30                                    }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x32, 0x31                                     }, { vpmovqb QWORD rcx{k7},zmm30                                }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x32, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovqb QWORD rax+r14*8+0x123,zmm30                        }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x32, 0x72, 0x7f                               }, { vpmovqb QWORD rdx+0x3f8,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x32, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpmovqb QWORD rdx+0x400,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x32, 0x72, 0x80                               }, { vpmovqb QWORD rdx-0x400,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x32, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpmovqb QWORD rdx-0x408,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x22, 0x31                                     }, { vpmovsqb QWORD rcx,zmm30                                   }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x22, 0x31                                     }, { vpmovsqb QWORD rcx{k7},zmm30                               }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x22, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovsqb QWORD rax+r14*8+0x123,zmm30                       }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x22, 0x72, 0x7f                               }, { vpmovsqb QWORD rdx+0x3f8,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x22, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpmovsqb QWORD rdx+0x400,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x22, 0x72, 0x80                               }, { vpmovsqb QWORD rdx-0x400,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x22, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpmovsqb QWORD rdx-0x408,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x12, 0x31                                     }, { vpmovusqb QWORD rcx,zmm30                                  }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x12, 0x31                                     }, { vpmovusqb QWORD rcx{k7},zmm30                              }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x12, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovusqb QWORD rax+r14*8+0x123,zmm30                      }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x12, 0x72, 0x7f                               }, { vpmovusqb QWORD rdx+0x3f8,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x12, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpmovusqb QWORD rdx+0x400,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x12, 0x72, 0x80                               }, { vpmovusqb QWORD rdx-0x400,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x12, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpmovusqb QWORD rdx-0x408,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x34, 0x31                                     }, { vpmovqw OWORD rcx,zmm30                                    }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x34, 0x31                                     }, { vpmovqw OWORD rcx{k7},zmm30                                }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x34, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovqw OWORD rax+r14*8+0x123,zmm30                        }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x34, 0x72, 0x7f                               }, { vpmovqw OWORD rdx+0x7f0,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x34, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpmovqw OWORD rdx+0x800,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x34, 0x72, 0x80                               }, { vpmovqw OWORD rdx-0x800,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x34, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpmovqw OWORD rdx-0x810,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x24, 0x31                                     }, { vpmovsqw OWORD rcx,zmm30                                   }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x24, 0x31                                     }, { vpmovsqw OWORD rcx{k7},zmm30                               }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x24, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovsqw OWORD rax+r14*8+0x123,zmm30                       }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x24, 0x72, 0x7f                               }, { vpmovsqw OWORD rdx+0x7f0,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x24, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpmovsqw OWORD rdx+0x800,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x24, 0x72, 0x80                               }, { vpmovsqw OWORD rdx-0x800,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x24, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpmovsqw OWORD rdx-0x810,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x14, 0x31                                     }, { vpmovusqw OWORD rcx,zmm30                                  }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x14, 0x31                                     }, { vpmovusqw OWORD rcx{k7},zmm30                              }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x14, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovusqw OWORD rax+r14*8+0x123,zmm30                      }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x14, 0x72, 0x7f                               }, { vpmovusqw OWORD rdx+0x7f0,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x14, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpmovusqw OWORD rdx+0x800,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x14, 0x72, 0x80                               }, { vpmovusqw OWORD rdx-0x800,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x14, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpmovusqw OWORD rdx-0x810,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x35, 0x31                                     }, { vpmovqd YWORD rcx,zmm30                                    }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x35, 0x31                                     }, { vpmovqd YWORD rcx{k7},zmm30                                }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x35, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovqd YWORD rax+r14*8+0x123,zmm30                        }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x35, 0x72, 0x7f                               }, { vpmovqd YWORD rdx+0xfe0,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x35, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vpmovqd YWORD rdx+0x1000,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x35, 0x72, 0x80                               }, { vpmovqd YWORD rdx-0x1000,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x35, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vpmovqd YWORD rdx-0x1020,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x25, 0x31                                     }, { vpmovsqd YWORD rcx,zmm30                                   }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x25, 0x31                                     }, { vpmovsqd YWORD rcx{k7},zmm30                               }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x25, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovsqd YWORD rax+r14*8+0x123,zmm30                       }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x25, 0x72, 0x7f                               }, { vpmovsqd YWORD rdx+0xfe0,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x25, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vpmovsqd YWORD rdx+0x1000,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x25, 0x72, 0x80                               }, { vpmovsqd YWORD rdx-0x1000,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x25, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vpmovsqd YWORD rdx-0x1020,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x15, 0x31                                     }, { vpmovusqd YWORD rcx,zmm30                                  }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x15, 0x31                                     }, { vpmovusqd YWORD rcx{k7},zmm30                              }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x15, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovusqd YWORD rax+r14*8+0x123,zmm30                      }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x15, 0x72, 0x7f                               }, { vpmovusqd YWORD rdx+0xfe0,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x15, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vpmovusqd YWORD rdx+0x1000,zmm30                           }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x15, 0x72, 0x80                               }, { vpmovusqd YWORD rdx-0x1000,zmm30                           }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x15, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vpmovusqd YWORD rdx-0x1020,zmm30                           }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x31, 0x31                                     }, { vpmovdb OWORD rcx,zmm30                                    }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x31, 0x31                                     }, { vpmovdb OWORD rcx{k7},zmm30                                }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x31, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovdb OWORD rax+r14*8+0x123,zmm30                        }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x31, 0x72, 0x7f                               }, { vpmovdb OWORD rdx+0x7f0,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x31, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpmovdb OWORD rdx+0x800,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x31, 0x72, 0x80                               }, { vpmovdb OWORD rdx-0x800,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x31, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpmovdb OWORD rdx-0x810,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x21, 0x31                                     }, { vpmovsdb OWORD rcx,zmm30                                   }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x21, 0x31                                     }, { vpmovsdb OWORD rcx{k7},zmm30                               }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x21, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovsdb OWORD rax+r14*8+0x123,zmm30                       }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x21, 0x72, 0x7f                               }, { vpmovsdb OWORD rdx+0x7f0,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x21, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpmovsdb OWORD rdx+0x800,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x21, 0x72, 0x80                               }, { vpmovsdb OWORD rdx-0x800,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x21, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpmovsdb OWORD rdx-0x810,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x11, 0x31                                     }, { vpmovusdb OWORD rcx,zmm30                                  }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x11, 0x31                                     }, { vpmovusdb OWORD rcx{k7},zmm30                              }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x11, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovusdb OWORD rax+r14*8+0x123,zmm30                      }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x11, 0x72, 0x7f                               }, { vpmovusdb OWORD rdx+0x7f0,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x11, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpmovusdb OWORD rdx+0x800,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x11, 0x72, 0x80                               }, { vpmovusdb OWORD rdx-0x800,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x11, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpmovusdb OWORD rdx-0x810,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x33, 0x31                                     }, { vpmovdw YWORD rcx,zmm30                                    }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x33, 0x31                                     }, { vpmovdw YWORD rcx{k7},zmm30                                }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x33, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovdw YWORD rax+r14*8+0x123,zmm30                        }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x33, 0x72, 0x7f                               }, { vpmovdw YWORD rdx+0xfe0,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x33, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vpmovdw YWORD rdx+0x1000,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x33, 0x72, 0x80                               }, { vpmovdw YWORD rdx-0x1000,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x33, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vpmovdw YWORD rdx-0x1020,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x23, 0x31                                     }, { vpmovsdw YWORD rcx,zmm30                                   }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x23, 0x31                                     }, { vpmovsdw YWORD rcx{k7},zmm30                               }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x23, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovsdw YWORD rax+r14*8+0x123,zmm30                       }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x23, 0x72, 0x7f                               }, { vpmovsdw YWORD rdx+0xfe0,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x23, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vpmovsdw YWORD rdx+0x1000,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x23, 0x72, 0x80                               }, { vpmovsdw YWORD rdx-0x1000,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x23, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vpmovsdw YWORD rdx-0x1020,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x13, 0x31                                     }, { vpmovusdw YWORD rcx,zmm30                                  }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x13, 0x31                                     }, { vpmovusdw YWORD rcx{k7},zmm30                              }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x13, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovusdw YWORD rax+r14*8+0x123,zmm30                      }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x13, 0x72, 0x7f                               }, { vpmovusdw YWORD rdx+0xfe0,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x13, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vpmovusdw YWORD rdx+0x1000,zmm30                           }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x13, 0x72, 0x80                               }, { vpmovusdw YWORD rdx-0x1000,zmm30                           }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x13, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vpmovusdw YWORD rdx-0x1020,zmm30                           }
+testcase	{ 0x62, 0x01, 0xfc, 0x4f, 0x78, 0xf5                                     }, { vcvttpd2udq ymm30{k7},zmm29                                  }
+testcase	{ 0x62, 0x01, 0xfc, 0xcf, 0x78, 0xf5                                     }, { vcvttpd2udq ymm30{k7}{z},zmm29                               }
+testcase	{ 0x62, 0x01, 0xfc, 0x1f, 0x78, 0xf5                                     }, { vcvttpd2udq ymm30{k7},zmm29,{sae}                            }
+testcase	{ 0x62, 0x61, 0xfc, 0x4f, 0x78, 0x31                                     }, { vcvttpd2udq ymm30{k7},ZWORD rcx                            }
+testcase	{ 0x62, 0x21, 0xfc, 0x4f, 0x78, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttpd2udq ymm30{k7},ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x61, 0xfc, 0x5f, 0x78, 0x31                                     }, { vcvttpd2udq ymm30{k7},QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0x61, 0xfc, 0x4f, 0x78, 0x72, 0x7f                               }, { vcvttpd2udq ymm30{k7},ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x61, 0xfc, 0x4f, 0x78, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vcvttpd2udq ymm30{k7},ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x61, 0xfc, 0x4f, 0x78, 0x72, 0x80                               }, { vcvttpd2udq ymm30{k7},ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x61, 0xfc, 0x4f, 0x78, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vcvttpd2udq ymm30{k7},ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x61, 0xfc, 0x5f, 0x78, 0x72, 0x7f                               }, { vcvttpd2udq ymm30{k7},QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0x61, 0xfc, 0x5f, 0x78, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vcvttpd2udq ymm30{k7},QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0x61, 0xfc, 0x5f, 0x78, 0x72, 0x80                               }, { vcvttpd2udq ymm30{k7},QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0x61, 0xfc, 0x5f, 0x78, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vcvttpd2udq ymm30{k7},QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x01, 0x7c, 0x48, 0x78, 0xf5                                     }, { vcvttps2udq zmm30,zmm29                                      }
+testcase	{ 0x62, 0x01, 0x7c, 0x4f, 0x78, 0xf5                                     }, { vcvttps2udq zmm30{k7},zmm29                                  }
+testcase	{ 0x62, 0x01, 0x7c, 0xcf, 0x78, 0xf5                                     }, { vcvttps2udq zmm30{k7}{z},zmm29                               }
+testcase	{ 0x62, 0x01, 0x7c, 0x18, 0x78, 0xf5                                     }, { vcvttps2udq zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x78, 0x31                                     }, { vcvttps2udq zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0x21, 0x7c, 0x48, 0x78, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttps2udq zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x78, 0x31                                     }, { vcvttps2udq zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x78, 0x72, 0x7f                               }, { vcvttps2udq zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x78, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vcvttps2udq zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x78, 0x72, 0x80                               }, { vcvttps2udq zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x78, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vcvttps2udq zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x78, 0x72, 0x7f                               }, { vcvttps2udq zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x78, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvttps2udq zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x78, 0x72, 0x80                               }, { vcvttps2udq zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x78, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvttps2udq zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x91, 0x7f, 0x08, 0x78, 0xc6                                     }, { vcvttsd2usi eax,xmm30                                        }
+testcase	{ 0x62, 0x91, 0x7f, 0x18, 0x78, 0xc6                                     }, { vcvttsd2usi eax,xmm30,{sae}                                  }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x78, 0x01                                     }, { vcvttsd2usi eax,QWORD rcx                                  }
+testcase	{ 0x62, 0xb1, 0x7f, 0x08, 0x78, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttsd2usi eax,QWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x78, 0x42, 0x7f                               }, { vcvttsd2usi eax,QWORD rdx+0x3f8                            }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x78, 0x82, 0x00, 0x04, 0x00, 0x00             }, { vcvttsd2usi eax,QWORD rdx+0x400                            }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x78, 0x42, 0x80                               }, { vcvttsd2usi eax,QWORD rdx-0x400                            }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x78, 0x82, 0xf8, 0xfb, 0xff, 0xff             }, { vcvttsd2usi eax,QWORD rdx-0x408                            }
+testcase	{ 0x62, 0x91, 0x7f, 0x08, 0x78, 0xee                                     }, { vcvttsd2usi ebp,xmm30                                        }
+testcase	{ 0x62, 0x91, 0x7f, 0x18, 0x78, 0xee                                     }, { vcvttsd2usi ebp,xmm30,{sae}                                  }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x78, 0x29                                     }, { vcvttsd2usi ebp,QWORD rcx                                  }
+testcase	{ 0x62, 0xb1, 0x7f, 0x08, 0x78, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttsd2usi ebp,QWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x78, 0x6a, 0x7f                               }, { vcvttsd2usi ebp,QWORD rdx+0x3f8                            }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x78, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vcvttsd2usi ebp,QWORD rdx+0x400                            }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x78, 0x6a, 0x80                               }, { vcvttsd2usi ebp,QWORD rdx-0x400                            }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x78, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vcvttsd2usi ebp,QWORD rdx-0x408                            }
+testcase	{ 0x62, 0x11, 0x7f, 0x08, 0x78, 0xee                                     }, { vcvttsd2usi r13d,xmm30                                       }
+testcase	{ 0x62, 0x11, 0x7f, 0x18, 0x78, 0xee                                     }, { vcvttsd2usi r13d,xmm30,{sae}                                 }
+testcase	{ 0x62, 0x71, 0x7f, 0x08, 0x78, 0x29                                     }, { vcvttsd2usi r13d,QWORD rcx                                 }
+testcase	{ 0x62, 0x31, 0x7f, 0x08, 0x78, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttsd2usi r13d,QWORD rax+r14*8+0x123                     }
+testcase	{ 0x62, 0x71, 0x7f, 0x08, 0x78, 0x6a, 0x7f                               }, { vcvttsd2usi r13d,QWORD rdx+0x3f8                           }
+testcase	{ 0x62, 0x71, 0x7f, 0x08, 0x78, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vcvttsd2usi r13d,QWORD rdx+0x400                           }
+testcase	{ 0x62, 0x71, 0x7f, 0x08, 0x78, 0x6a, 0x80                               }, { vcvttsd2usi r13d,QWORD rdx-0x400                           }
+testcase	{ 0x62, 0x71, 0x7f, 0x08, 0x78, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vcvttsd2usi r13d,QWORD rdx-0x408                           }
+testcase	{ 0x62, 0x91, 0xff, 0x08, 0x78, 0xc6                                     }, { vcvttsd2usi rax,xmm30                                        }
+testcase	{ 0x62, 0x91, 0xff, 0x18, 0x78, 0xc6                                     }, { vcvttsd2usi rax,xmm30,{sae}                                  }
+testcase	{ 0x62, 0xf1, 0xff, 0x08, 0x78, 0x01                                     }, { vcvttsd2usi rax,QWORD rcx                                  }
+testcase	{ 0x62, 0xb1, 0xff, 0x08, 0x78, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttsd2usi rax,QWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0xf1, 0xff, 0x08, 0x78, 0x42, 0x7f                               }, { vcvttsd2usi rax,QWORD rdx+0x3f8                            }
+testcase	{ 0x62, 0xf1, 0xff, 0x08, 0x78, 0x82, 0x00, 0x04, 0x00, 0x00             }, { vcvttsd2usi rax,QWORD rdx+0x400                            }
+testcase	{ 0x62, 0xf1, 0xff, 0x08, 0x78, 0x42, 0x80                               }, { vcvttsd2usi rax,QWORD rdx-0x400                            }
+testcase	{ 0x62, 0xf1, 0xff, 0x08, 0x78, 0x82, 0xf8, 0xfb, 0xff, 0xff             }, { vcvttsd2usi rax,QWORD rdx-0x408                            }
+testcase	{ 0x62, 0x11, 0xff, 0x08, 0x78, 0xc6                                     }, { vcvttsd2usi r8,xmm30                                         }
+testcase	{ 0x62, 0x11, 0xff, 0x18, 0x78, 0xc6                                     }, { vcvttsd2usi r8,xmm30,{sae}                                   }
+testcase	{ 0x62, 0x71, 0xff, 0x08, 0x78, 0x01                                     }, { vcvttsd2usi r8,QWORD rcx                                   }
+testcase	{ 0x62, 0x31, 0xff, 0x08, 0x78, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttsd2usi r8,QWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0x71, 0xff, 0x08, 0x78, 0x42, 0x7f                               }, { vcvttsd2usi r8,QWORD rdx+0x3f8                             }
+testcase	{ 0x62, 0x71, 0xff, 0x08, 0x78, 0x82, 0x00, 0x04, 0x00, 0x00             }, { vcvttsd2usi r8,QWORD rdx+0x400                             }
+testcase	{ 0x62, 0x71, 0xff, 0x08, 0x78, 0x42, 0x80                               }, { vcvttsd2usi r8,QWORD rdx-0x400                             }
+testcase	{ 0x62, 0x71, 0xff, 0x08, 0x78, 0x82, 0xf8, 0xfb, 0xff, 0xff             }, { vcvttsd2usi r8,QWORD rdx-0x408                             }
+testcase	{ 0x62, 0x91, 0x7e, 0x08, 0x78, 0xc6                                     }, { vcvttss2usi eax,xmm30                                        }
+testcase	{ 0x62, 0x91, 0x7e, 0x18, 0x78, 0xc6                                     }, { vcvttss2usi eax,xmm30,{sae}                                  }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x78, 0x01                                     }, { vcvttss2usi eax,DWORD rcx                                  }
+testcase	{ 0x62, 0xb1, 0x7e, 0x08, 0x78, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttss2usi eax,DWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x78, 0x42, 0x7f                               }, { vcvttss2usi eax,DWORD rdx+0x1fc                            }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x78, 0x82, 0x00, 0x02, 0x00, 0x00             }, { vcvttss2usi eax,DWORD rdx+0x200                            }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x78, 0x42, 0x80                               }, { vcvttss2usi eax,DWORD rdx-0x200                            }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x78, 0x82, 0xfc, 0xfd, 0xff, 0xff             }, { vcvttss2usi eax,DWORD rdx-0x204                            }
+testcase	{ 0x62, 0x91, 0x7e, 0x08, 0x78, 0xee                                     }, { vcvttss2usi ebp,xmm30                                        }
+testcase	{ 0x62, 0x91, 0x7e, 0x18, 0x78, 0xee                                     }, { vcvttss2usi ebp,xmm30,{sae}                                  }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x78, 0x29                                     }, { vcvttss2usi ebp,DWORD rcx                                  }
+testcase	{ 0x62, 0xb1, 0x7e, 0x08, 0x78, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttss2usi ebp,DWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x78, 0x6a, 0x7f                               }, { vcvttss2usi ebp,DWORD rdx+0x1fc                            }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x78, 0xaa, 0x00, 0x02, 0x00, 0x00             }, { vcvttss2usi ebp,DWORD rdx+0x200                            }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x78, 0x6a, 0x80                               }, { vcvttss2usi ebp,DWORD rdx-0x200                            }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x78, 0xaa, 0xfc, 0xfd, 0xff, 0xff             }, { vcvttss2usi ebp,DWORD rdx-0x204                            }
+testcase	{ 0x62, 0x11, 0x7e, 0x08, 0x78, 0xee                                     }, { vcvttss2usi r13d,xmm30                                       }
+testcase	{ 0x62, 0x11, 0x7e, 0x18, 0x78, 0xee                                     }, { vcvttss2usi r13d,xmm30,{sae}                                 }
+testcase	{ 0x62, 0x71, 0x7e, 0x08, 0x78, 0x29                                     }, { vcvttss2usi r13d,DWORD rcx                                 }
+testcase	{ 0x62, 0x31, 0x7e, 0x08, 0x78, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttss2usi r13d,DWORD rax+r14*8+0x123                     }
+testcase	{ 0x62, 0x71, 0x7e, 0x08, 0x78, 0x6a, 0x7f                               }, { vcvttss2usi r13d,DWORD rdx+0x1fc                           }
+testcase	{ 0x62, 0x71, 0x7e, 0x08, 0x78, 0xaa, 0x00, 0x02, 0x00, 0x00             }, { vcvttss2usi r13d,DWORD rdx+0x200                           }
+testcase	{ 0x62, 0x71, 0x7e, 0x08, 0x78, 0x6a, 0x80                               }, { vcvttss2usi r13d,DWORD rdx-0x200                           }
+testcase	{ 0x62, 0x71, 0x7e, 0x08, 0x78, 0xaa, 0xfc, 0xfd, 0xff, 0xff             }, { vcvttss2usi r13d,DWORD rdx-0x204                           }
+testcase	{ 0x62, 0x91, 0xfe, 0x08, 0x78, 0xc6                                     }, { vcvttss2usi rax,xmm30                                        }
+testcase	{ 0x62, 0x91, 0xfe, 0x18, 0x78, 0xc6                                     }, { vcvttss2usi rax,xmm30,{sae}                                  }
+testcase	{ 0x62, 0xf1, 0xfe, 0x08, 0x78, 0x01                                     }, { vcvttss2usi rax,DWORD rcx                                  }
+testcase	{ 0x62, 0xb1, 0xfe, 0x08, 0x78, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttss2usi rax,DWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0xf1, 0xfe, 0x08, 0x78, 0x42, 0x7f                               }, { vcvttss2usi rax,DWORD rdx+0x1fc                            }
+testcase	{ 0x62, 0xf1, 0xfe, 0x08, 0x78, 0x82, 0x00, 0x02, 0x00, 0x00             }, { vcvttss2usi rax,DWORD rdx+0x200                            }
+testcase	{ 0x62, 0xf1, 0xfe, 0x08, 0x78, 0x42, 0x80                               }, { vcvttss2usi rax,DWORD rdx-0x200                            }
+testcase	{ 0x62, 0xf1, 0xfe, 0x08, 0x78, 0x82, 0xfc, 0xfd, 0xff, 0xff             }, { vcvttss2usi rax,DWORD rdx-0x204                            }
+testcase	{ 0x62, 0x11, 0xfe, 0x08, 0x78, 0xc6                                     }, { vcvttss2usi r8,xmm30                                         }
+testcase	{ 0x62, 0x11, 0xfe, 0x18, 0x78, 0xc6                                     }, { vcvttss2usi r8,xmm30,{sae}                                   }
+testcase	{ 0x62, 0x71, 0xfe, 0x08, 0x78, 0x01                                     }, { vcvttss2usi r8,DWORD rcx                                   }
+testcase	{ 0x62, 0x31, 0xfe, 0x08, 0x78, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttss2usi r8,DWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0x71, 0xfe, 0x08, 0x78, 0x42, 0x7f                               }, { vcvttss2usi r8,DWORD rdx+0x1fc                             }
+testcase	{ 0x62, 0x71, 0xfe, 0x08, 0x78, 0x82, 0x00, 0x02, 0x00, 0x00             }, { vcvttss2usi r8,DWORD rdx+0x200                             }
+testcase	{ 0x62, 0x71, 0xfe, 0x08, 0x78, 0x42, 0x80                               }, { vcvttss2usi r8,DWORD rdx-0x200                             }
+testcase	{ 0x62, 0x71, 0xfe, 0x08, 0x78, 0x82, 0xfc, 0xfd, 0xff, 0xff             }, { vcvttss2usi r8,DWORD rdx-0x204                             }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x76, 0xf4                                     }, { vpermi2d zmm30,zmm29,zmm28                                   }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x76, 0xf4                                     }, { vpermi2d zmm30{k7},zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x76, 0xf4                                     }, { vpermi2d zmm30{k7}{z},zmm29,zmm28                            }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x76, 0x31                                     }, { vpermi2d zmm30,zmm29,ZWORD rcx                             }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x76, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermi2d zmm30,zmm29,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x76, 0x31                                     }, { vpermi2d zmm30,zmm29,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x76, 0x72, 0x7f                               }, { vpermi2d zmm30,zmm29,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x76, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermi2d zmm30,zmm29,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x76, 0x72, 0x80                               }, { vpermi2d zmm30,zmm29,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x76, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermi2d zmm30,zmm29,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x76, 0x72, 0x7f                               }, { vpermi2d zmm30,zmm29,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x76, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpermi2d zmm30,zmm29,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x76, 0x72, 0x80                               }, { vpermi2d zmm30,zmm29,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x76, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpermi2d zmm30,zmm29,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x76, 0xf4                                     }, { vpermi2q zmm30,zmm29,zmm28                                   }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x76, 0xf4                                     }, { vpermi2q zmm30{k7},zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x76, 0xf4                                     }, { vpermi2q zmm30{k7}{z},zmm29,zmm28                            }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x76, 0x31                                     }, { vpermi2q zmm30,zmm29,ZWORD rcx                             }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x76, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermi2q zmm30,zmm29,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x76, 0x31                                     }, { vpermi2q zmm30,zmm29,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x76, 0x72, 0x7f                               }, { vpermi2q zmm30,zmm29,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x76, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermi2q zmm30,zmm29,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x76, 0x72, 0x80                               }, { vpermi2q zmm30,zmm29,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x76, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermi2q zmm30,zmm29,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x76, 0x72, 0x7f                               }, { vpermi2q zmm30,zmm29,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x76, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpermi2q zmm30,zmm29,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x76, 0x72, 0x80                               }, { vpermi2q zmm30,zmm29,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x76, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpermi2q zmm30,zmm29,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x77, 0xf4                                     }, { vpermi2ps zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x77, 0xf4                                     }, { vpermi2ps zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x77, 0xf4                                     }, { vpermi2ps zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x77, 0x31                                     }, { vpermi2ps zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x77, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermi2ps zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x77, 0x31                                     }, { vpermi2ps zmm30,zmm29,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x77, 0x72, 0x7f                               }, { vpermi2ps zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x77, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermi2ps zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x77, 0x72, 0x80                               }, { vpermi2ps zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x77, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermi2ps zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x77, 0x72, 0x7f                               }, { vpermi2ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x77, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpermi2ps zmm30,zmm29,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x77, 0x72, 0x80                               }, { vpermi2ps zmm30,zmm29,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x77, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpermi2ps zmm30,zmm29,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x77, 0xf4                                     }, { vpermi2pd zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x77, 0xf4                                     }, { vpermi2pd zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x77, 0xf4                                     }, { vpermi2pd zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x77, 0x31                                     }, { vpermi2pd zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x77, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermi2pd zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x77, 0x31                                     }, { vpermi2pd zmm30,zmm29,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x77, 0x72, 0x7f                               }, { vpermi2pd zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x77, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermi2pd zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x77, 0x72, 0x80                               }, { vpermi2pd zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x77, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermi2pd zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x77, 0x72, 0x7f                               }, { vpermi2pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x77, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpermi2pd zmm30,zmm29,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x77, 0x72, 0x80                               }, { vpermi2pd zmm30,zmm29,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x77, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpermi2pd zmm30,zmm29,QWORD rdx-0x408{1to8}                }

_service:tar_scm:nasm-2.16.03.tar.xz/test/avx512pf.asm Added

@@ -0,0 +1,88 @@
+;Testname=avx512pf; Arguments=-fbin -oavx512pf.bin -O0 -DSRC; Files=stdout stderr avx512pf.bin
+; AVX-512PF testcases from gas
+;------------------------
+;
+; This file is taken from there
+;     https://gnu.googlesource.com/binutils/+/master/gas/testsuite/gas/i386/x86-64-avx512pf-intel.d
+; So the original author is "H.J. Lu" <hongjiu dot lu at intel dot com>
+;
+; Jin Kyu Song converted it for the nasm testing suite using gas2nasm.py
+
+%macro testcase 2
+ %ifdef BIN
+  db %1
+ %endif
+ %ifdef SRC
+  %2
+ %endif
+%endmacro
+
+
+bits 64
+
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc6, 0x8c, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf0dpd  r14+ymm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc6, 0x8c, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf0dpd  r14+ymm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc6, 0x4c, 0x39, 0x20                         }, { vgatherpf0dpd  r9+ymm31*1+0x100{k1}                        }
+testcase	{ 0x62, 0xb2, 0xfd, 0x41, 0xc6, 0x8c, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vgatherpf0dpd  rcx+ymm31*4+0x400{k1}                       }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc6, 0x8c, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf0dps  r14+zmm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc6, 0x8c, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf0dps  r14+zmm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc6, 0x4c, 0x39, 0x40                         }, { vgatherpf0dps  r9+zmm31*1+0x100{k1}                        }
+testcase	{ 0x62, 0xb2, 0x7d, 0x41, 0xc6, 0x8c, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vgatherpf0dps  rcx+zmm31*4+0x400{k1}                       }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc7, 0x8c, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf0qpd  r14+zmm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc7, 0x8c, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf0qpd  r14+zmm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc7, 0x4c, 0x39, 0x20                         }, { vgatherpf0qpd  r9+zmm31*1+0x100{k1}                        }
+testcase	{ 0x62, 0xb2, 0xfd, 0x41, 0xc7, 0x8c, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vgatherpf0qpd  rcx+zmm31*4+0x400{k1}                       }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc7, 0x8c, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf0qps  r14+zmm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc7, 0x8c, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf0qps  r14+zmm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc7, 0x4c, 0x39, 0x40                         }, { vgatherpf0qps  r9+zmm31*1+0x100{k1}                        }
+testcase	{ 0x62, 0xb2, 0x7d, 0x41, 0xc7, 0x8c, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vgatherpf0qps  rcx+zmm31*4+0x400{k1}                       }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc6, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf1dpd  r14+ymm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc6, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf1dpd  r14+ymm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc6, 0x54, 0x39, 0x20                         }, { vgatherpf1dpd  r9+ymm31*1+0x100{k1}                        }
+testcase	{ 0x62, 0xb2, 0xfd, 0x41, 0xc6, 0x94, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vgatherpf1dpd  rcx+ymm31*4+0x400{k1}                       }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc6, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf1dps  r14+zmm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc6, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf1dps  r14+zmm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc6, 0x54, 0x39, 0x40                         }, { vgatherpf1dps  r9+zmm31*1+0x100{k1}                        }
+testcase	{ 0x62, 0xb2, 0x7d, 0x41, 0xc6, 0x94, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vgatherpf1dps  rcx+zmm31*4+0x400{k1}                       }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc7, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf1qpd  r14+zmm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc7, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf1qpd  r14+zmm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc7, 0x54, 0x39, 0x20                         }, { vgatherpf1qpd  r9+zmm31*1+0x100{k1}                        }
+testcase	{ 0x62, 0xb2, 0xfd, 0x41, 0xc7, 0x94, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vgatherpf1qpd  rcx+zmm31*4+0x400{k1}                       }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc7, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf1qps  r14+zmm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc7, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf1qps  r14+zmm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc7, 0x54, 0x39, 0x40                         }, { vgatherpf1qps  r9+zmm31*1+0x100{k1}                        }
+testcase	{ 0x62, 0xb2, 0x7d, 0x41, 0xc7, 0x94, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vgatherpf1qps  rcx+zmm31*4+0x400{k1}                       }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc6, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf0dpd  r14+ymm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc6, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf0dpd  r14+ymm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc6, 0x6c, 0x39, 0x20                         }, { vscatterpf0dpd  r9+ymm31*1+0x100{k1}                       }
+testcase	{ 0x62, 0xb2, 0xfd, 0x41, 0xc6, 0xac, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vscatterpf0dpd  rcx+ymm31*4+0x400{k1}                      }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc6, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf0dps  r14+zmm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc6, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf0dps  r14+zmm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc6, 0x6c, 0x39, 0x40                         }, { vscatterpf0dps  r9+zmm31*1+0x100{k1}                       }
+testcase	{ 0x62, 0xb2, 0x7d, 0x41, 0xc6, 0xac, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vscatterpf0dps  rcx+zmm31*4+0x400{k1}                      }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc7, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf0qpd  r14+zmm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc7, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf0qpd  r14+zmm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc7, 0x6c, 0x39, 0x20                         }, { vscatterpf0qpd  r9+zmm31*1+0x100{k1}                       }
+testcase	{ 0x62, 0xb2, 0xfd, 0x41, 0xc7, 0xac, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vscatterpf0qpd  rcx+zmm31*4+0x400{k1}                      }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc7, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf0qps  r14+zmm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc7, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf0qps  r14+zmm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc7, 0x6c, 0x39, 0x40                         }, { vscatterpf0qps  r9+zmm31*1+0x100{k1}                       }
+testcase	{ 0x62, 0xb2, 0x7d, 0x41, 0xc7, 0xac, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vscatterpf0qps  rcx+zmm31*4+0x400{k1}                      }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc6, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf1dpd  r14+ymm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc6, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf1dpd  r14+ymm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc6, 0x74, 0x39, 0x20                         }, { vscatterpf1dpd  r9+ymm31*1+0x100{k1}                       }
+testcase	{ 0x62, 0xb2, 0xfd, 0x41, 0xc6, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vscatterpf1dpd  rcx+ymm31*4+0x400{k1}                      }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc6, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf1dps  r14+zmm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc6, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf1dps  r14+zmm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc6, 0x74, 0x39, 0x40                         }, { vscatterpf1dps  r9+zmm31*1+0x100{k1}                       }
+testcase	{ 0x62, 0xb2, 0x7d, 0x41, 0xc6, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vscatterpf1dps  rcx+zmm31*4+0x400{k1}                      }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc7, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf1qpd  r14+zmm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc7, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf1qpd  r14+zmm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc7, 0x74, 0x39, 0x20                         }, { vscatterpf1qpd  r9+zmm31*1+0x100{k1}                       }
+testcase	{ 0x62, 0xb2, 0xfd, 0x41, 0xc7, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vscatterpf1qpd  rcx+zmm31*4+0x400{k1}                      }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc7, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf1qps  r14+zmm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc7, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf1qps  r14+zmm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc7, 0x74, 0x39, 0x40                         }, { vscatterpf1qps  r9+zmm31*1+0x100{k1}                       }
+testcase	{ 0x62, 0xb2, 0x7d, 0x41, 0xc7, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vscatterpf1qps  rcx+zmm31*4+0x400{k1}                      }
+testcase	{ 0x0f, 0x0d, 0x11                                                       }, { prefetchwt1 BYTE rcx                                       }
+testcase	{ 0x42, 0x0f, 0x0d, 0x94, 0xf0, 0x23, 0x01, 0x00, 0x00                   }, { prefetchwt1 BYTE rax+r14*8+0x123                           }

_service:tar_scm:nasm-2.16.03.tar.xz/test/baddb.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/baddq.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/badrep.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/bcd.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/binexe.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/binoverflow.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/bintest.asm Added

@@ -0,0 +1,59 @@
+;Testname=unoptimized; Arguments=-O0 -fbin -obintest.bin; Files=stdout stderr bintest.bin
+;Testname=optimized;   Arguments=-Ox -fbin -obintest.bin; Files=stdout stderr bintest.bin
+
+; test source file for assembling to binary files
+; build with:
+;    nasm -f bin -o bintest.com bintest.asm
+
+; When run (as a DOS .COM file), this program should print
+;    hello, world
+; on two successive lines, then exit cleanly.
+
+; This file should test the following:
+; 1 Define a text-section symbol
+; 2 Define a data-section symbol
+; 3 Define a BSS-section symbol
+; 4 Define a NASM local label
+; 5 Reference a NASM local label
+; 6 Reference a text-section symbol in the text section
+; 7 Reference a data-section symbol in the text section
+; 8 Reference a BSS-section symbol in the text section
+; 9 Reference a text-section symbol in the data section
+; 10 Reference a data-section symbol in the data section
+; 11 Reference a BSS-section symbol in the data section
+
+	  BITS 16
+	  ORG 0x100
+
+	  SECTION .text
+
+	  jmp start		; 6
+
+endX	  mov ax,0x4c00		; 1
+	  int 0x21
+
+start	  mov byte bss_sym,',' ; 1 8
+	  mov bx,bssptr	; 7
+	  mov al,bx
+	  mov bx,dataptr	; 7
+	  mov bx,al
+	  mov cx,2
+.loop	  mov dx,datasym	; 1 4 7
+	  mov ah,9
+	  push cx
+	  int 0x21
+	  pop cx
+	  loop .loop		; 5 6
+	  mov bx,textptr	; 7
+	  jmp bx
+
+	  SECTION .data
+
+datasym	  db 'hello  world', 13, 10, '$' ; 2
+bssptr	  dw bss_sym		; 2 11
+dataptr	  dw datasym+5		; 2 10
+textptr	  dw endX		; 2 9
+
+	  SECTION .bss
+
+bss_sym	  resb 1		; 3

_service:tar_scm:nasm-2.16.03.tar.xz/test/bisect.sh Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br1879590.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br2003451.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br2030823.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br2148476.asm Added

@@ -0,0 +1,221 @@
+;Testname=test; Arguments=-fbin -obr2148476.bin; Files=stdout stderr br2148476.bin
+
+	bits 64
+
+	cvtdq2pd xmm0, xmm1
+	cvtdq2pd xmm0, rdi
+	cvtdq2pd xmm0, qword rdi
+
+	cvtdq2ps xmm0, xmm1
+	cvtdq2ps xmm0, rdi
+	cvtdq2ps xmm0, oword rdi
+
+	cvtpd2dq xmm0, xmm1
+	cvtpd2dq xmm0, rdi
+	cvtpd2dq xmm0, oword rdi
+
+	cvtpd2pi mm0, xmm1
+	cvtpd2pi mm0, rdi
+	cvtpd2pi mm0, oword rdi
+
+	cvtpd2ps xmm0, xmm1
+	cvtpd2ps xmm0, rdi
+	cvtpd2ps xmm0, oword rdi
+
+	cvtpi2pd xmm0, mm1
+	cvtpi2pd xmm0, rdi
+	cvtpi2pd xmm0, qword rdi
+
+	cvtpi2ps xmm0, mm1
+	cvtpi2ps xmm0, rdi
+	cvtpi2ps xmm0, qword rdi
+
+	cvtps2dq xmm0, xmm1
+	cvtps2dq xmm0, rdi
+	cvtps2dq xmm0, oword rdi
+
+	cvtps2pd xmm0, xmm1
+	cvtps2pd xmm0, rdi
+	cvtps2pd xmm0, qword rdi
+
+	cvtps2pi mm0, xmm1
+	cvtps2pi mm0, rdi
+	cvtps2pi mm0, qword rdi
+
+	cvtsd2si eax, xmm1
+	cvtsd2si eax, rdi
+	cvtsd2si eax, qword rdi
+	cvtsd2si rax, xmm1
+	cvtsd2si rax, rdi
+	cvtsd2si rax, qword rdi
+
+	cvtsd2ss xmm0, xmm1
+	cvtsd2ss xmm0, rdi
+	cvtsd2ss xmm0, qword rdi
+
+	cvtsi2sd xmm0, eax
+	cvtsi2sd xmm0, rdi	; Compatibility
+	cvtsi2sd xmm0, dword rdi
+	cvtsi2sd xmm0, rax
+	cvtsi2sd xmm0, qword rdi
+
+	cvtsi2ss xmm0, eax
+	cvtsi2ss xmm0, rdi	; Compatibility
+	cvtsi2ss xmm0, dword rdi
+	cvtsi2ss xmm0, rax
+	cvtsi2ss xmm0, qword rdi
+
+	cvtss2sd xmm0, xmm1
+	cvtss2sd xmm0, rdi
+	cvtss2sd xmm0, dword rdi
+
+	cvtss2si eax, xmm1
+	cvtss2si eax, rdi
+	cvtss2si eax, dword rdi
+	cvtss2si rax, xmm1
+	cvtss2si rax, rdi
+	cvtss2si rax, dword rdi
+
+	cvttpd2dq xmm0, xmm1
+	cvttpd2dq xmm0, rdi
+	cvttpd2dq xmm0, oword rdi
+
+	cvttpd2pi mm0, xmm1
+	cvttpd2pi mm0, rdi
+	cvttpd2pi mm0, oword rdi
+
+	cvttps2dq xmm0, xmm1
+	cvttps2dq xmm0, rdi
+	cvttps2dq xmm0, oword rdi
+
+	cvttps2pi mm0, xmm1
+	cvttps2pi mm0, rdi
+	cvttps2pi mm0, qword rdi
+
+	cvttsd2si eax, xmm1
+	cvttsd2si eax, rdi	; Compatibility
+	cvttsd2si eax, qword rdi
+	cvttsd2si rax, xmm1
+	cvttsd2si rax, rdi
+	cvttsd2si rax, qword rdi
+
+	cvttss2si eax, xmm1
+	cvttss2si eax, rdi 	; Compatibility
+	cvttss2si eax, dword rdi
+	cvttss2si rax, xmm1
+	cvttss2si rax, rdi
+	cvttss2si rax, dword rdi
+
+	vcvtdq2pd xmm0, xmm1
+	vcvtdq2pd xmm0, rdi
+	vcvtdq2pd xmm0, qword rdi
+	vcvtdq2pd ymm0, xmm1
+	vcvtdq2pd ymm0, rdi
+	vcvtdq2pd ymm0, oword rdi
+
+	vcvtdq2ps xmm0, xmm1
+	vcvtdq2ps xmm0, rdi
+	vcvtdq2ps xmm0, oword rdi
+	vcvtdq2ps ymm0, ymm1
+	vcvtdq2ps ymm0, rdi
+	vcvtdq2ps ymm0, yword rdi
+
+	vcvtpd2dq xmm0, xmm1
+	vcvtpd2dq xmm0, oword rdi
+	vcvtpd2dq xmm0, ymm1
+	vcvtpd2dq xmm0, yword rdi
+
+	vcvtpd2ps xmm0, xmm1
+	vcvtpd2ps xmm0, oword rdi
+	vcvtpd2ps xmm0, ymm1
+	vcvtpd2ps xmm0, yword rdi
+
+	vcvtps2dq xmm0, xmm1
+	vcvtps2dq xmm0, rdi
+	vcvtps2dq xmm0, oword rdi
+	vcvtps2dq ymm0, ymm1
+	vcvtps2dq ymm0, rdi
+	vcvtps2dq ymm0, yword rdi
+
+	vcvtps2pd xmm0, xmm1
+	vcvtps2pd xmm0, rdi
+	vcvtps2pd xmm0, qword rdi
+	vcvtps2pd ymm0, xmm1
+	vcvtps2pd ymm0, rdi
+	vcvtps2pd ymm0, oword rdi
+
+	vcvtsd2si eax, xmm1
+	vcvtsd2si eax, rdi
+	vcvtsd2si eax, qword rdi
+	vcvtsd2si rax, xmm1
+	vcvtsd2si rax, rdi
+	vcvtsd2si rax, qword rdi
+
+	vcvtsd2ss xmm0, xmm1
+	vcvtsd2ss xmm0, rdi
+	vcvtsd2ss xmm0, qword rdi
+	vcvtsd2ss xmm0, xmm1, xmm2
+	vcvtsd2ss xmm0, xmm1, rdi
+	vcvtsd2ss xmm0, xmm1, qword rdi
+
+	vcvtsi2sd xmm0, eax
+	vcvtsi2sd xmm0, rdi	; Compatibility
+	vcvtsi2sd xmm0, dword rdi
+	vcvtsi2sd xmm0, rax
+	vcvtsi2sd xmm0, qword rdi
+	vcvtsi2sd xmm0, xmm1, eax
+	vcvtsi2sd xmm0, xmm1, rdi	; Compatibility
+	vcvtsi2sd xmm0, xmm1, dword rdi
+	vcvtsi2sd xmm0, xmm1, rax
+	vcvtsi2sd xmm0, xmm1, qword rdi
+
+	vcvtsi2ss xmm0, eax
+	vcvtsi2ss xmm0, rdi	; Compatibility
+	vcvtsi2ss xmm0, dword rdi
+	vcvtsi2ss xmm0, rax
+	vcvtsi2ss xmm0, qword rdi
+	vcvtsi2ss xmm0, xmm1, eax
+	vcvtsi2ss xmm0, xmm1, rdi	; Compatibility
+	vcvtsi2ss xmm0, xmm1, dword rdi
+	vcvtsi2ss xmm0, xmm1, rax
+	vcvtsi2ss xmm0, xmm1, qword rdi
+
+	vcvtss2sd xmm0, xmm1
+	vcvtss2sd xmm0, rdi
+	vcvtss2sd xmm0, dword rdi
+	vcvtss2sd xmm0, xmm1, xmm2
+	vcvtss2sd xmm0, xmm1, rdi
+	vcvtss2sd xmm0, xmm1, dword rdi
+
+	vcvtss2si eax, xmm1
+	vcvtss2si eax, rdi
+	vcvtss2si eax, dword rdi
+	vcvtss2si rax, xmm1
+	vcvtss2si rax, rdi
+	vcvtss2si rax, dword rdi
+
+	vcvttpd2dq xmm0, xmm1
+	vcvttpd2dq xmm0, oword rdi
+	vcvttpd2dq xmm0, ymm1
+	vcvttpd2dq xmm0, yword rdi
+
+	vcvttps2dq xmm0, xmm1
+	vcvttps2dq xmm0, rdi
+	vcvttps2dq xmm0, oword rdi
+	vcvttps2dq ymm0, ymm1
+	vcvttps2dq ymm0, rdi
+	vcvttps2dq ymm0, yword rdi
+
+	vcvttsd2si eax, xmm1
+	vcvttsd2si eax, rdi	; Compatibility
+	vcvttsd2si eax, qword rdi
+	vcvttsd2si rax, xmm1
+	vcvttsd2si rax, rdi
+	vcvttsd2si rax, qword rdi
+
+	vcvttss2si eax, xmm1
+	vcvttss2si eax, rdi 	; Compatibility
+	vcvttss2si eax, dword rdi
+	vcvttss2si rax, xmm1
+	vcvttss2si rax, rdi
+	vcvttss2si rax, dword rdi

_service:tar_scm:nasm-2.16.03.tar.xz/test/br2222615.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br2496848.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3005117.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3026808.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3028880.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3041451.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3058845.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3066383.asm Added

@@ -0,0 +1,70 @@
+;Testname=br3066383; Arguments=-Ox -fbin -obr3066383.bin; Files=stdout stderr br3066383.bin
+
+;
+; this is a for BR3005117
+; http://sourceforge.net/tracker/?func=detail&aid=3005117&group_id=6208&atid=106208
+;
+%macro b_struc 1-*
+    %push foo
+        %define %$strucname %1
+%%top_%$strucname:
+        %rep %0 - 1
+            %rotate 1
+            resb %{$strucname}%1 - ($ - %%top_%$strucname)
+%1:
+        %endrep
+        resb %{$strucname}_size - ($ - %%top_%$strucname)
+    %pop
+%endmacro
+
+struc timeval
+    .tv_sec     resd    1
+    .tv_usec    resd    1
+endstruc
+
+section .text
+    mov timeval_struct.tv_sec, eax
+
+section .bss
+    timeval_struct b_struc timeval, .tv_sec, .tv_usec
+        timeval_struct_len equ $ - timeval_struct
+
+section .text
+
+;
+; this is a test for BR3026808
+; http://sourceforge.net/tracker/?func=detail&aid=3026808&group_id=6208&atid=106208
+;
+%imacro proc 1
+    %push proc
+    %assign %$arg 1
+%endmacro
+
+%imacro arg 0-1 1
+    %assign %$arg %1+%$arg
+%endmacro
+
+%imacro endproc 0
+    %pop
+%endmacro
+
+proc Test
+    %$ARG arg
+endproc
+
+;
+; this is a test for BR3066383
+; http://sourceforge.net/tracker/?func=detail&aid=3066383&group_id=6208&atid=106208
+;
+%macro pp_local 1
+    %push
+        %assign %$_uses 0
+        %rep 4
+            %assign %$_ur%$_uses %$_uses
+            mov ecx, %$_ur%$_uses
+            %assign %$_uses %$_uses+1
+        %endrep
+    %pop
+%endmacro
+
+pp_local 1

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3074517.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3092924.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3104312.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3109604.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3174983.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3187743.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3189064.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3200749.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3385573.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3392252.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3392259.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3392363.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3392392.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3392396.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3392411.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3392418.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3392439.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3392442.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3392472.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3392538.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3392586.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3392607.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3392626.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3392640.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3392660.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3392661.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3392667.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3392668-3.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3392669-57.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3392707.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3392708.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br3392711.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br560575.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br890790.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br890790_i.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/br978756.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/changed.asm Added

@@ -0,0 +1,383 @@
+;This file demonstrates many of the differences between NASM version X and NASM
+;version 0.97
+;
+; changed.asm is copyright (C) 1998 John S. Fine
+;
+;  It may be redistributed under the same conditions as NASM as described in
+;  LICENSE file in the NASM archive
+;_________________________________
+;
+;  nasm changed.asm -l changed.lst
+;
+; When assembled without any -d switches, it includes examples which:
+;       Work correctly in version X
+;  and  Work incorrectly and/or display warnings in version 0.97
+;  and  Do not prevent the generation of output in version 0.97
+;
+; Not all the differences can be seen in the .lst file.  I suggest that you use
+; "ndisasm changes"  to examine the code actually generated.
+;_________________________________
+;
+;  nasm changed.asm -l changed.lst -doldmsg
+;
+; When assembled with -doldmsg, it adds examples which:
+;       Work correctly in version X
+;  and  Generate error messages in version 0.97 and do not generate output
+;_________________________________
+;
+;  nasm changed.asm -l changed.lst -doldcrash
+;
+; When assembled with -doldcrash, it adds examples which:
+;       Work correctly in version X
+;  and  Cause NASM to crash in version 0.97
+;_________________________________
+;
+;  nasm changed.asm -l changed.lst -dnewmsg
+;
+; When assembled with -dnewmsg, it adds examples which:
+;       Generate error messages in version X
+;  and  Generate wrong output without warning or error message in version 0.97
+;-----------------------------------------------------------------------------
+
+; Please note that I have reported the name of the person who made the
+; correction based on very limited information.  In several cases, I am sure I
+; will identify the wrong author.  Please send me any corrections;  I don't
+; intend to insult or exclude anyone.
+
+;-----------------------------------------------------------------------------
+; Bug fixed by Simon in assemble()
+;
+; The following generated "call next" / "call next-1" instead of
+; two copies of "call next"
+;
+	times 2 a16 call next
+next:
+
+;-----------------------------------------------------------------------------
+; Bug fixed by John in parse_line()  (and other routines)
+;
+; This used to jmp to prior.1, when it should be here.1
+;
+prior:
+.1:
+here:	jmp	.1
+.1:
+
+;-----------------------------------------------------------------------------
+; Bug fixed by John in assemble()
+;
+; Strings used in dq and dt were not zero filled correctly
+;
+	dq	'b'
+
+
+;-----------------------------------------------------------------------------
+; Bug fixed by Simon in isn_names
+;
+; Was not recognised as an instruction
+;
+	int01			; Instead of INT1
+
+;-----------------------------------------------------------------------------
+; Bug fixed by Jim Hague in ???
+;
+; Forward references were instruction level rather than per operand
+;
+	shr word forwardref,1
+forwardref:
+
+;-----------------------------------------------------------------------------
+; Bug fixed by John in preproc.c
+;
+; It used to silently discard id characters appended to a multi-line
+; macro parameter (such as the x in %1x below).
+;
+%macro xxx 1
+%1: nop
+%{1}x: jmp %1x
+%endmacro
+xxx yyy
+
+;-----------------------------------------------------------------------------
+; Bug added by John in preproc.c 0.98-J4, removed by John in 0.98-J5
+;
+; Tested here to make sure it stays removed
+;
+%macro TestElse 1
+%if %1=0
+%elif %1=1
+nop
+%endif
+%endmacro
+TestElse 1
+
+%ifdef oldmsg
+;***************************************************************
+;
+; The following examples will generate error messages in 0.97 and will generate
+; correct output in the new version.
+
+;-----------------------------------------------------------------------------
+; Bug fixed by Simon in isns.dat
+;
+; The optional "near" was not permitted on JMP and CALL
+;
+	jmp near here
+
+;-----------------------------------------------------------------------------
+; Feature added by Simon in stdscan()
+;
+; You can now use the numeric value of strings in %assign
+;
+%assign xxx 'ABCD'
+	dd xxx
+
+;-----------------------------------------------------------------------------
+; Feature added by John in add_vectors()
+;
+; Stranger address expressions are now supported as long as they resolve to
+; something valid.
+;
+	mov ax, eax + ebx + ecx - eax
+
+;-----------------------------------------------------------------------------
+; Bug fixed by Simon in ???
+;
+; The EQU directive affected local labels in a way that was inconsistent
+; between passes
+;
+.local:
+neither equ $
+	jmp .local
+
+;-----------------------------------------------------------------------------
+; Feature added by Jules in parse_line
+;
+; You can override a size specifier
+;
+%define arg1 dword bp+4
+	cmp word arg1, 2
+
+;-----------------------------------------------------------------------------
+; Bug fixed by John in preproc.c
+;
+; You could not use a label on the same line with a macro invocation, if the
+; macro definition began with a preprocessor directive.
+;
+	struc mytype
+.long	resd	1
+	endstruc
+
+lbl	istruc mytype
+	at mytype.long, dd 'ABCD'
+	iend
+
+;-----------------------------------------------------------------------------
+; Warning removed by John in preproc.c
+;
+; In order to allow macros that extend the definition of instructions, I
+; disabled the warning on a multi-line macro referencing itself.
+;
+%endif			;NASM 0.97 doesn't handle %0 etc. inside false %if
+%macro push 1-*		;
+%rep %0			;
+push %1			;
+%rotate 1		;
+%endrep			;
+%endmacro		;
+%ifdef oldmsg		;
+
+	push ax,bx
+
+;-----------------------------------------------------------------------------
+; Warning removed by John in preproc.c
+;
+; To support other types of macros that extend the definition of instructions,
+; I disabled the warning on a multi-line macro called with the wrong number of
+; parameters.  PUSH and POP can be extended equally well by either method, but
+; other instruction extensions may need one method or the other, so I made both
+; work.
+;
+; Note that neither of these warnings was really needed, because a later stage
+; of NASM would almost always give an adequate error message if the macro use
+; really was wrong.
+;
+%endif
+%macro pop 2-*
+%rep %0
+pop %1
+%rotate 1
+%endrep
+%endmacro
+%ifdef oldmsg
+
+	pop ax,bx
+%endif
+
+
+%ifdef newmsg  ;***************************************************************
+
+;-----------------------------------------------------------------------------
+; Bug fixed by John in parse_line()  (and other routines)
+;
+; This invalid code used to assemble without errors
+;
+myself equ myself+1
+	jmp myself
+
+;-----------------------------------------------------------------------------
+; Change made by John in preproc.c
+;
+; In 0.97, an id that appears as a label on a macro invocation was always
+; prepended to the first line of the macro expansion.  That caused several
+; bugs, but also could be used in tricks like the arg macro in c16.mac and
+; c32.mac.
+;
+; In version X, an id that appears as a label on a macro invocation will
+; normally be defined as a label for the address at which the macro is
+; invoked, regardless of whether the first line of the macro expansion is
+; something that can take a label.  The new token %00 may be used for any
+; of the situations in which the old prepend behavior was doing something
+; tricky but useful.  %00 can also be used more than once and in places
+; other than the start of the expansion.
+;
+%endif
+%assign arg_off 0
+
+%imacro arg 0-1 2		;arg defined the old way
+	  equ arg_off
+%assign arg_off %1+arg_off
+%endmacro
+
+%ifdef newmsg
+arg_example arg
+%endif
+
+%imacro arg2 0-1 2		;arg defined the new way
+%00	  equ arg_off
+%assign arg_off %1+arg_off
+%endmacro
+
+%ifdef oldmsg
+arg_example2 arg2
+
+;-----------------------------------------------------------------------------
+; Change made by Jules and John in INSNS.DAT
+;
+; Various instruction in which the size of an immediate is built-in to the
+; instruction set, now allow you to redundantly specify that size as long
+; as you specify it correctly
+;
+	AAD	byte 5
+	AAM	byte 5
+	BT	bx, byte 3
+	BTC	cx, byte 4
+	BTR	dx, byte 5
+	BTS	si, byte 6
+	IN	eax, byte 0x40
+	INT	byte 21h
+	OUT	byte 70h, ax
+	RET	word 2
+	RETN	word 2
+	RETF	word 4
+
+; note "ENTER" has not been changed yet.
+
+;-----------------------------------------------------------------------------
+; Enhancement by hpa in insns.dat et al
+;
+; Simplified adding new instructions, and added some missing instructions
+;
+	int03			; Instead of INT3
+	ud1			; No documented mnemonic for this one
+	ud2
+	sysenter
+	sysexit
+	syscall
+	sysret
+	fxsave ebx
+	fxrstor es:ebx+esi*4+0x3000
+
+;-----------------------------------------------------------------------------
+; Enhancement by hpa in insns.dat et al
+;
+; Actually make SSE work, and use the -p option to ndisasm to select
+; one of several aliased opcodes
+;
+	sqrtps xmm0,ebx+10	; SSE opcode
+	paddsiw mm0,ebx+10	; Cyrix opcode with the same byte seq.
+
+;-----------------------------------------------------------------------------
+; Enhancement by hpa in preproc.c
+;
+; Support %undef to remove a single-line macro
+;
+%define	TEST_ME 42
+%ifndef TEST_ME
+%error	"TEST_ME not defined after %define"
+%endif
+
+%undef  TEST_ME
+%ifdef  TEST_ME
+%error	"TEST_ME defined after %undef"
+%endif
+
+;-----------------------------------------------------------------------------
+; Bug fix by hpa in insns.dat
+;
+; PSHUFW and PINSRW weren't handling the implicit sizes correctly; all of
+; the entries below are (or should be) legal
+;
+	pshufw mm2, mm1, 3
+	pshufw mm3,ebx,2
+	pshufw mm7,0+edi*8,1
+
+	pshufw mm2, mm1, byte 3
+	pshufw mm3,ebx,byte 2
+	pshufw mm7,0+edi*8,byte 1
+
+	pshufw mm2, mm1, 3
+	pshufw mm3, qword ebx, 2
+	pshufw mm7, qword 0+edi*8, 1
+
+	pshufw mm2, mm1, byte 3
+	pshufw mm3, qword ebx, byte 2
+	pshufw mm7, qword 0+edi*8, byte 1
+
+	pinsrw mm1, esi, 1
+	pinsrw mm1, word esi, 1
+	pinsrw mm1, esi, byte 1
+	pinsrw mm1, word esi, byte 1
+
+
+%endif				; oldmsg
+
+%ifdef oldcrash  ;*************************************************************
+
+This_label_is_256_characters_long__There_used_to_be_a_bug_in_stdscan_which_made_it_crash_when_it_did_a_keyword_search_on_any_label_longer_than_255_characters__Now_anything_longer_than_MAX_KEYWORD_is_always_a_symbol__It_will_not_even_try_a_keyword_search___
+
+;-----------------------------------------------------------------------------
+; Bug fixed by John in preproc.c
+;
+; Builds of NASM that prohibit dereferencing a NULL pointer used to crash if a
+; macro that started with a blank line was invoked with a label
+;
+%macro empty_macro 0
+
+%endm
+
+emlabel empty_macro
+	jmp	emlabel
+
+;-----------------------------------------------------------------------------
+; Enhancement by Conan Brink in preproc.c
+;
+; Allow %rep to be nested
+;
+%rep 4
+%rep 5
+	nop
+%endrep
+%endrep
+
+%endif

_service:tar_scm:nasm-2.16.03.tar.xz/test/clzero.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/coffalign.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/cofftest.asm Added

@@ -0,0 +1,85 @@
+;Cannot be automatically tested because it differs every time,
+;I guess because of a date/time field.
+
+; test source file for assembling to COFF
+; build with (under DJGPP, for example):
+;    nasm -f coff cofftest.asm
+;    gcc -o cofftest cofftest.c cofftest.o
+
+; This file should test the following:
+; 1 Define and export a global text-section symbol
+; 2 Define and export a global data-section symbol
+; 3 Define and export a global BSS-section symbol
+; 4 Define a non-global text-section symbol
+; 5 Define a non-global data-section symbol
+; 6 Define a non-global BSS-section symbol
+; 7 Define a COMMON symbol
+; 8 Define a NASM local label
+; 9 Reference a NASM local label
+; 10 Import an external symbol
+; 11 Make a PC-relative call to an external symbol
+; 12 Reference a text-section symbol in the text section
+; 13 Reference a data-section symbol in the text section
+; 14 Reference a BSS-section symbol in the text section
+; 15 Reference a text-section symbol in the data section
+; 16 Reference a data-section symbol in the data section
+; 17 Reference a BSS-section symbol in the data section
+
+	  BITS 32
+	  GLOBAL _lrotate	; 1
+	  GLOBAL _greet		; 1
+	  GLOBAL _asmstr	; 2
+	  GLOBAL _textptr	; 2
+	  GLOBAL _selfptr	; 2
+	  GLOBAL _integer	; 3
+	  EXTERN _printf	; 10
+	  COMMON _commvar 4	; 7
+
+	  SECTION .text
+
+; prototype: long lrotate(long x, int num);
+_lrotate:			; 1
+	  push ebp
+	  mov ebp,esp
+	  mov eax,ebp+8
+	  mov ecx,ebp+12
+.label	  rol eax,1		; 4 8
+	  loop .label		; 9 12
+	  mov esp,ebp
+	  pop ebp
+	  ret
+
+; prototype: void greet(void);
+_greet	  mov eax,_integer	; 14
+	  inc eax
+	  mov localint,eax	; 14
+	  push dword _commvar
+	  mov eax,localptr	; 13
+	  push dword eax
+	  push dword _integer	; 1 14
+	  push dword _printfstr	; 13
+	  call _printf		; 11
+	  add esp,16
+	  ret
+
+	  SECTION .data
+
+; a string
+_asmstr	  db 'hello, world', 0	; 2
+
+; a string for Printf
+_printfstr db "integer==%d, localint==%d, commvar=%d"
+	  db 10, 0
+
+; some pointers
+localptr  dd localint		; 5 17
+_textptr  dd _greet		; 15
+_selfptr  dd _selfptr		; 16
+
+	  SECTION .bss
+
+; an integer
+_integer  resd 1		; 3
+
+; a local integer
+localint  resd 1		; 6

_service:tar_scm:nasm-2.16.03.tar.xz/test/cofftest.c Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/crc32.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/ctxlocal.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/cv8struc.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/defalias.asm Added

@@ -0,0 +1,52 @@
+%defalias foo bar
+%ifdef foo
+  %error "foo should not be defined here!"
+%endif
+
+%define foo 33
+%ifndef foo
+  %error "foo should be defined here!"
+%endif
+%ifndef bar
+  %error "bar should be defined here!"
+%endif
+%if bar != 33
+  %error "bar should have the value 33 here"
+%endif
+
+%define bar 34
+%if foo != 34
+  %error "foo should have the value 34 here"
+%endif
+
+%undef foo
+%ifdef foo
+  %error "foo should not be defined here!"
+%endif
+%ifdef bar
+  %error "bar should not be defined here!"
+%endif
+
+%ifndefalias foo
+  %error "foo was removed as an alias!"
+%endif
+
+%define bar 35
+%if foo != 35
+  %error "foo should have the value 35 here"
+%endif
+
+%define foo 36
+%if bar != 36
+  %error "bar should have the value 36 here"
+%endif
+
+%undefalias foo
+%ifdef foo
+  %error "foo is still defined after %undefalias"
+%elifdefalias foo
+  %error "foo is undefined, but still an alias"
+%endif
+%ifndef bar
+  %error "bar disappeared after %undefalias foo"
+%endif

_service:tar_scm:nasm-2.16.03.tar.xz/test/dtbcd.asm Added

@@ -0,0 +1,72 @@
+;
+; This is a macro to generate packed BCD constants.
+; It is obsoleted by "dt" with a packed BCD value with a "p"
+; suffix, but it is included here as a rest of nested %rep.
+;
+%macro dtbcd 1-*.nolist
+  %push dtbcd
+  %rep %0
+    %defstr %$abc %1
+    %substr %$sign %$abc 1
+    %if %$sign == '-'
+      %substr %$abc %$abc 2,-1
+      %xdefine %$sign 0x80
+    %elif %$sign == '+'
+      %substr %$abc %$abc 2,-1
+      %xdefine %$sign 0x00
+    %else
+      %xdefine %$sign 0x00
+    %endif
+    %strlen %$abclen %$abc
+    %defstr %$abclen_str %$abclen
+    %assign %$pos %$abclen
+    %assign %$bc 0
+    %assign %$ld -1
+    %rep %$abclen
+      %substr %$chr %$abc %$pos
+      %assign %$pos %$pos-1
+      %if %$chr >= '0' && %$chr <= '9'
+        %if %$ld < 0
+          %assign %$ld %$chr-'0'
+          %assign %$bc %$bc+1
+          %if %$bc > 9
+            %warning "too many digits in BCD constant"
+	    %exitrep
+          %endif
+        %else
+          db %$ld+((%$chr-'0') << 4)
+	  %assign %$ld -1
+        %endif
+      %elif %$chr == '_'
+        ; Do nothing...
+      %else
+        %error "invalid character in BCD constant"
+	%exitrep
+      %endif
+    %endrep
+    %if %$ld >= 0
+      db %$ld
+    %endif
+    %rep 9-%$bc
+      db 0
+    %endrep
+    db %$sign
+    %rotate 1
+  %endrep
+  %pop
+%endmacro
+
+	dtbcd 123, -456, +789
+	dt 123p, -456p, +789p
+	dtbcd 765432109876543210
+	dt 765432109876543210p
+	dtbcd -765432109876543210
+	dt -765432109876543210p
+	dtbcd +765_432_109_876_543_210
+	dt +765_432_109_876_543_210p
+	dtbcd -765_432_109_876_543_210
+	dt -765_432_109_876_543_210p
+
+	;; Both of these should warn...
+	dtbcd 8_765_432_109_876_543_210
+	dt 8_765_432_109_876_543_210p

_service:tar_scm:nasm-2.16.03.tar.xz/test/dup.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/elf64so.asm Added

@@ -0,0 +1,118 @@
+; test source file for assembling to ELF64 shared library
+; build with:
+;    nasm -f elf64 elf64so.asm
+;    ld -shared -o elf64so.so elf64so.o
+; test with:
+;    gcc -o elf64so elftest64.c ./elf64so.so
+;    ./elf64so
+
+; This file should test the following:
+; 1 Define and export a global text-section symbol
+; 2 Define and export a global data-section symbol
+; 3 Define and export a global BSS-section symbol
+; 4 Define a non-global text-section symbol
+; 5 Define a non-global data-section symbol
+; 6 Define a non-global BSS-section symbol
+; 7 Define a COMMON symbol
+; 8 Define a NASM local label
+; 9 Reference a NASM local label
+; 10 Import an external symbol
+; 11 Make a PC-relative call to an external symbol
+; 12 Reference a text-section symbol in the text section
+; 13 Reference a data-section symbol in the text section
+; 14 Reference a BSS-section symbol in the text section
+; 15 Reference a text-section symbol in the data section
+; 16 Reference a data-section symbol in the data section
+; 17 Reference a BSS-section symbol in the data section
+
+	  BITS 64
+	  GLOBAL lrotate:function ; 1
+	  GLOBAL greet_s:function ; 1
+	  GLOBAL greet_m:function ; 1
+	  GLOBAL asmstr:data asmstr.end-asmstr ; 2
+	  GLOBAL textptr:data 8	; 2
+	  GLOBAL selfptr:data 8	; 2
+	  GLOBAL useless:data 8	; 3
+	  GLOBAL integer:data 8	; 3
+	  EXTERN printf		; 10
+	  COMMON commvar 8:8	; 7
+	  EXTERN _GLOBAL_OFFSET_TABLE_
+
+	  SECTION .text
+
+; prototype: long lrotate(long x, int num);
+lrotate:			; 1
+	  push rbp
+	  mov rbp,rsp
+	  mov rax,rdi
+	  mov rcx,rsi
+.label	  rol rax,1		; 4 8
+	  loop .label		; 9 12
+	  mov rsp,rbp
+	  pop rbp
+	  ret
+
+;; prototype: void greet_*(void);
+;; 
+;;  Arguments are:	rdi - rsi - rdx - rcx - r8 - r9
+;;  Registers:		rbx, rbp, r12-r15 are saved
+;; greet_s() is Small PIC model, greet_m() is Medium PIC model
+;; (Large model cannot be linked with other code)
+;;
+greet_s:
+	  ;;  This instruction is useless, this is only a test...
+	  cmp qword rel integer wrt ..got,0
+	  mov rax,rel commvar wrt ..got ; &commvar
+	  mov rcx,rax			  ; commvar
+	  mov rax,rel integer wrt ..got ; &integer
+	  mov rsi,rax
+	  lea rdx,rsi+1
+	  mov rel localint,rdx ; localint = integer+1
+	  mov rax,rel localptr ; localptr
+	  mov rdx,rax		 ; *localptr = localint
+	  lea rdi,rel printfstr
+	  xor eax,eax		; No fp arguments
+	  jmp printf wrt ..plt	; 10
+
+greet_m:
+	  push r15		; Used by convention...
+	  lea r15,rel _GLOBAL_OFFSET_TABLE_
+	  mov rax,rel commvar wrt ..got ; &commvar
+	  mov rcx,rax			  ; commvar
+	  mov rax,rel integer wrt ..got ; &integer
+	  mov rsi,rax
+	  lea rdx,rsi+1
+	  mov rax,localint wrt ..gotoff	 ; &localint - r15
+	  mov rax+r15,rdx	 ; localint = integer+1
+	  mov rax,localptr wrt ..gotoff ; &localptr - r15
+	  mov rax,rax+r15	 ; localptr
+	  mov rdx,rax		 ; *localptr = localint
+	  mov rdi,printfstr wrt ..gotoff ; &printfstr - r15
+	  add rdi,r15		; &printfstr 
+	  xor eax,eax		; No fp arguments
+	  pop r15
+	  jmp printf wrt ..plt	; 10
+
+	  SECTION .data
+
+; a string
+asmstr	  db 'hello, world', 0	; 2
+.end:
+
+; a string for Printf
+printfstr db "integer=%ld, localint=%ld, commvar=%ld", 10, 0
+
+; some pointers
+localptr  dq localint		; 5 17
+textptr	  dq greet_s wrt ..sym	; 15
+selfptr	  dq selfptr wrt ..sym	; 16
+
+	  SECTION .bss
+; a useless symbol
+useless	  resq 1
+	
+; an integer
+integer	  resq 1		; 3
+
+; a local integer
+localint  resq 1		; 6

_service:tar_scm:nasm-2.16.03.tar.xz/test/elf_visibility.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/elfso.asm Added

@@ -0,0 +1,100 @@
+;Testname=unoptimized; Arguments=-O0 -felf -oelfso.o; Files=stdout stderr elfso.o
+;Testname=optimized;   Arguments=-Ox -felf -oelfso.o; Files=stdout stderr elfso.o
+
+; test source file for assembling to ELF shared library
+; build with:
+;    nasm -f elf elfso.asm
+;    ld -shared -o elfso.so elfso.o
+; test with:
+;    gcc -o elfso elftest.c ./elfso.so
+;    ./elfso
+; (assuming your gcc is ELF, and you're running bash)
+
+; This file should test the following:
+; 1 Define and export a global text-section symbol
+; 2 Define and export a global data-section symbol
+; 3 Define and export a global BSS-section symbol
+; 4 Define a non-global text-section symbol
+; 5 Define a non-global data-section symbol
+; 6 Define a non-global BSS-section symbol
+; 7 Define a COMMON symbol
+; 8 Define a NASM local label
+; 9 Reference a NASM local label
+; 10 Import an external symbol
+; 11 Make a PC-relative call to an external symbol
+; 12 Reference a text-section symbol in the text section
+; 13 Reference a data-section symbol in the text section
+; 14 Reference a BSS-section symbol in the text section
+; 15 Reference a text-section symbol in the data section
+; 16 Reference a data-section symbol in the data section
+; 17 Reference a BSS-section symbol in the data section
+
+	  BITS 32
+	  GLOBAL lrotate:function ; 1
+	  GLOBAL greet:function	; 1
+	  GLOBAL asmstr:data asmstr.end-asmstr ; 2
+	  GLOBAL textptr:data 4	; 2
+	  GLOBAL selfptr:data 4	; 2
+	  GLOBAL integer:data 4	; 3
+	  EXTERN printf		; 10
+	  COMMON commvar 4:4	; 7
+	  EXTERN _GLOBAL_OFFSET_TABLE_
+
+	  SECTION .text
+
+; prototype: long lrotate(long x, int num);
+lrotate:			; 1
+	  push ebp
+	  mov ebp,esp
+	  mov eax,ebp+8
+	  mov ecx,ebp+12
+.label	  rol eax,1		; 4 8
+	  loop .label		; 9 12
+	  mov esp,ebp
+	  pop ebp
+	  ret
+
+; prototype: void greet(void);
+greet	  push ebx		; we'll use EBX for GOT, so save it
+	  call .getgot
+.getgot:  pop ebx
+	  add ebx,_GLOBAL_OFFSET_TABLE_ + $$ - .getgot wrt ..gotpc
+	  mov eax,ebx+integer wrt ..got ; 14
+	  mov eax,eax
+	  inc eax
+	  mov ebx+localint wrt ..gotoff,eax ; 14
+	  mov eax,ebx+commvar wrt ..got
+	  push dword eax
+	  mov eax,ebx+localptr wrt ..gotoff ; 13
+	  push dword eax
+	  mov eax,ebx+integer wrt ..got ; 1 14
+	  push dword eax
+	  lea eax,ebx+printfstr wrt ..gotoff
+	  push eax		; 13
+	  call printf wrt ..plt	; 11
+	  add esp,16
+	  pop ebx
+	  ret
+
+	  SECTION .data
+
+; a string
+asmstr	  db 'hello, world', 0	; 2
+.end
+
+; a string for Printf
+printfstr db "integer==%d, localint==%d, commvar=%d"
+	  db 10, 0
+
+; some pointers
+localptr  dd localint		; 5 17
+textptr	  dd greet wrt ..sym	; 15
+selfptr	  dd selfptr wrt ..sym	; 16
+
+	  SECTION .bss
+
+; an integer
+integer	  resd 1		; 3
+
+; a local integer
+localint  resd 1		; 6

_service:tar_scm:nasm-2.16.03.tar.xz/test/elftest.asm Added

@@ -0,0 +1,87 @@
+; test source file for assembling to ELF
+; build with:
+;    nasm -f elf elftest.asm
+;    gcc -o elftest elftest.c elftest.o
+; (assuming your gcc is ELF)
+
+; This file should test the following:
+; 1 Define and export a global text-section symbol
+; 2 Define and export a global data-section symbol
+; 3 Define and export a global BSS-section symbol
+; 4 Define a non-global text-section symbol
+; 5 Define a non-global data-section symbol
+; 6 Define a non-global BSS-section symbol
+; 7 Define a COMMON symbol
+; 8 Define a NASM local label
+; 9 Reference a NASM local label
+; 10 Import an external symbol
+; 11 Make a PC-relative call to an external symbol
+; 12 Reference a text-section symbol in the text section
+; 13 Reference a data-section symbol in the text section
+; 14 Reference a BSS-section symbol in the text section
+; 15 Reference a text-section symbol in the data section
+; 16 Reference a data-section symbol in the data section
+; 17 Reference a BSS-section symbol in the data section
+; 18 Define a non-global rodata-section symbol
+
+	  BITS 32
+	  GLOBAL lrotate	; 1
+	  GLOBAL greet		; 1
+	  GLOBAL asmstr		; 2
+	  GLOBAL textptr	; 2
+	  GLOBAL selfptr	; 2
+	  GLOBAL integer	; 3
+	  EXTERN printf		; 10
+	  COMMON commvar 4	; 7
+
+	  SECTION .text
+
+; prototype: long lrotate(long x, int num);
+lrotate:			; 1
+	  push ebp
+	  mov ebp,esp
+	  mov eax,ebp+8
+	  mov ecx,ebp+12
+.label	  rol eax,1		; 4 8
+	  loop .label		; 9 12
+	  mov esp,ebp
+	  pop ebp
+	  ret
+
+; prototype: void greet(void);
+greet	  mov eax,integer	; 14
+	  inc eax
+	  mov localint,eax	; 14
+	  push dword commvar
+	  mov eax,localptr	; 13
+	  push dword eax
+	  push dword integer	; 1 14
+	  push dword printfstr	; 13
+	  call printf		; 11
+	  add esp,16
+	  ret
+
+	  SECTION .data
+
+; a string
+asmstr	  db 'hello, world', 0	; 2
+
+; a string for Printf
+printfstr db "integer==%d, localint==%d, commvar=%d"
+	  db 10, 0
+
+; some pointers
+localptr  dd localint		; 5 17
+textptr	  dd greet		; 15
+selfptr	  dd selfptr		; 16
+
+	  SECTION .bss
+
+; an integer
+integer	  resd 1		; 3
+
+; a local integer
+localint  resd 1		; 6
+
+	  SECTION .rodata
+readonly  dd readonly		; 18

_service:tar_scm:nasm-2.16.03.tar.xz/test/elftest.c Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/elftest64.c Added

@@ -0,0 +1,43 @@
+/*
+ *  build with:
+ *	nasm -f elf64 elf64so.asm
+ *	ld -shared -o elf64so.so elf64so.o
+ * test with:
+ *	gcc -o elf64so elftest64.c ./elf64so.so
+ *	./elf64so
+ */
+
+#include <stdio.h>
+#include <inttypes.h>
+
+extern long lrotate(long, int);
+extern void greet_s(void);
+extern void greet_m(void);
+extern int8_t asmstr;
+extern void *selfptr;
+extern void *textptr;
+extern long integer;
+long commvar;
+
+int main(void)
+{
+
+    printf("Testing lrotate: should get 0x00400000, 0x00000001\n");
+    printf("lrotate(0x00040000, 4) = 0x%08lx\n", lrotate(0x40000, 4));
+    printf("lrotate(0x00040000, 46) = 0x%08lx\n", lrotate(0x40000, 46));
+
+    printf("This string should read `hello, world': `%s'\n", asmstr);
+
+    printf("&integer = %p, &commvar = %p\n", &integer, &commvar);
+    printf("The integers here should be 1234, 1235 and 4321:\n");
+    integer = 1234;
+    commvar = 4321;
+    greet_s();
+    greet_m();
+
+    printf("These pointers should be equal: %p and %p\n", &greet_s, textptr);
+
+    printf("So should these: %p and %p\n", selfptr, &selfptr);
+
+    return 0;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/test/elif.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/emptyarg.asm Added

@@ -0,0 +1,147 @@
+%define EMPTY
+
+%macro bar 1
+	db "bar", __LINE__, %0, %1
+%endmacro
+
+%macro baz 2
+	db "baz", __LINE__, %0, %1, %2
+%endmacro
+
+%macro nothing 0
+	db "nothing", __LINE__, %0
+%endmacro
+
+%macro xyzzy 1-2
+	db "xyzzy", __LINE__, %0, %1, %2, %3
+%endmacro
+
+%macro vararg 0-*
+	db "vararg", __LINE__, %0
+	%assign %%i 1
+	%rep %0
+	  db "vararg arg ", %%i, %1
+	  %rotate 1
+	  %assign %%i %%i + 1
+	%endrep
+%endmacro
+
+%macro defargs 1-5 def2, def3, def4, def5
+	db "defargs", __LINE__, %0, %1, %2, %3, %4, %5
+%endmacro
+
+%macro ivar 1
+	vararg %1
+%endmacro
+
+%macro foo 1-2
+	db "foo", __LINE__, %0, %1, %2
+	bar %2
+	bar {%2}
+	bar %2,
+	bar {%2},
+	baz %1,%2
+	baz {%1},{%2}
+	nothing %1
+	nothing %2
+	xyzzy "meep",%1,%2,
+	xyzzy "meep","meep",%1,%2
+	xyzzy "alpha","bravo",
+	xyzzy "with","empty",EMPTY
+%endmacro
+
+%macro orange 1
+	db %{1:1}
+%endmacro
+
+%macro prange1 2-3
+	db %{1:2}, 0%3
+%endmacro
+
+%macro prange2 1-3 'two', 'three'
+	db %{1:3}
+%endmacro
+
+	db 4,
+	nothing
+	nothing 1
+	nothing			; foo
+	nothing EMPTY
+
+flup:	foo 1,2
+	foo 3
+	bar
+	bar EMPTY
+	foo 6,
+	foo 6,			; With space/comment
+	foo 6,EMPTY
+	baz 8,EMPTY
+	foo 6,{}
+	foo ,5
+
+	xyzzy 13,14,15,
+	xyzzy 13,14,15,EMPTY
+	xyzzy 20,21
+	xyzzy 22,23,
+	xyzzy 24,25,EMPTY
+	xyzzy 26,27,,
+	xyzzy 28,29,EMPTY,EMPTY
+
+	vararg
+	vararg EMPTY
+	vararg ,
+	vararg 10
+	vararg 11,
+	vararg 12,EMPTY
+	vararg 13,14,15,
+	vararg 13,14,15,EMPTY
+	vararg 20,21
+	vararg 22,23,
+	vararg 24,25,EMPTY
+	vararg 26,27,,
+	vararg 28,29,EMPTY,EMPTY
+
+	ivar {}
+	ivar {EMPTY}
+	ivar EMPTY
+	ivar ,
+	ivar {,}
+	ivar {60}
+	ivar {61,}
+	ivar {62,EMPTY}
+	ivar {63,64,65,}
+	ivar {63,64,65,EMPTY}
+	ivar {70,71}
+	ivar {72,73,}
+	ivar {74,75,EMPTY}
+	ivar {76,77,,}
+	ivar {78,79,EMPTY,EMPTY}
+
+	defargs EMPTY
+	defargs 91
+	defargs 91,92
+	defargs 91,92,93
+	defargs 91,92,93,94
+	defargs 91,92,93,94,95
+	defargs ,
+	defargs 91,
+	defargs 91,92,
+	defargs 91,92,93,
+	defargs 91,92,93,94,
+	defargs 91,92,93,94,95,
+
+	prange1 101
+	prange1 101, 102
+	prange1 101, 102, 103
+	prange2 121
+	prange2 121, 122
+	prange2 121, 122, 123
+	prange2 {121}
+	prange2 {121,121}
+	prange2 {121},{122}
+	prange2 {121},122,{123}
+	prange2 121,{122,122},123
+
+	orange 130
+	orange 130, 131
+	orange {130, 131}

_service:tar_scm:nasm-2.16.03.tar.xz/test/evalerr.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/evalmacro.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/exitrep.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/expimp.asm Added

@@ -0,0 +1,90 @@
+;Testname=O0; Arguments=-O0 -fbin -oexpimp.bin; Files=stdout stderr expimp.bin
+;Testname=O1; Arguments=-O1 -fbin -oexpimp.bin; Files=stdout stderr expimp.bin
+;Testname=Ox; Arguments=-Ox -fbin -oexpimp.bin; Files=stdout stderr expimp.bin
+;Testname=error-O0; Arguments=-O0 -fbin -oexpimp.bin -DERROR; Files=stdout stderr expimp.bin
+;Testname=error-Ox; Arguments=-Ox -fbin -oexpimp.bin -DERROR; Files=stdout stderr expimp.bin
+
+;
+; Test of explicitly and implicitly sized operands
+;
+	BITS 32
+
+	add esi,2			; Implicit
+	add esi,123456h			; Implicit
+	add esi,byte 2			; Explicit
+	add esi,dword 2			; Explicit
+	add esi,dword 123456h		; Explicit
+	add esi,byte 123456h		; Explicit Truncation
+
+	add esi,strict 2		; Implicit Strict
+	add esi,strict 123456h		; Implicit Strict
+	add esi,strict byte 2		; Explicit Strict
+	add esi,strict dword 2		; Explicit Strict
+	add esi,strict dword 123456h	; Explicit Strict
+	add esi,strict byte 123456h	; Explicit Strict Truncation
+
+	add eax,2			; Implicit
+	add eax,123456h			; Implicit
+	add eax,byte 2			; Explicit
+	add eax,dword 2			; Explicit
+	add eax,dword 123456h		; Explicit
+	add eax,byte 123456h		; Explicit Truncation
+
+	add eax,strict 2		; Implicit Strict
+	add eax,strict 123456h		; Implicit Strict
+	add eax,strict byte 2		; Explicit Strict
+	add eax,strict dword 2		; Explicit Strict
+	add eax,strict dword 123456h	; Explicit Strict
+	add eax,strict byte 123456h	; Explicit Strict Truncation
+
+	imul dx,3			; Implicit
+	imul dx,byte 3			; Explicit
+	imul dx,word 3			; Explicit
+	imul dx,strict byte 3		; Explicit Strict
+	imul dx,strict word 3		; Explicit Strict
+
+;
+; Same thing with branches
+;
+start:
+	jmp short start			; Explicit
+	jmp near start			; Explicit
+	jmp word start			; Explicit
+	jmp dword start			; Explicit
+	jmp short forward		; Explicit
+	jmp near forward		; Explicit
+	jmp word forward		; Explicit
+	jmp dword forward		; Explicit
+%ifdef ERROR
+	jmp short faraway		; Explicit (ERROR)
+%endif
+	jmp near faraway		; Explicit
+	jmp word faraway		; Explicit
+	jmp dword faraway		; Explicit
+	jmp start			; Implicit
+	jmp forward			; Implicit
+	jmp faraway			; Implicit
+
+	jmp strict short start		; Explicit Strict
+	jmp strict near start		; Explicit Strict
+	jmp strict word start		; Explicit Strict
+	jmp strict dword start		; Explicit Strict
+	jmp strict short forward	; Explicit Strict
+	jmp strict near forward		; Explicit Strict
+	jmp strict word forward		; Explicit Strict
+	jmp strict dword forward	; Explicit Strict
+%ifdef ERROR
+	jmp strict short faraway	; Explicit (ERROR)
+%endif
+	jmp strict near faraway		; Explicit Strict
+	jmp strict word faraway		; Explicit Strict
+	jmp strict dword faraway	; Explicit Strict
+	jmp strict start		; Implicit Strict
+	jmp strict forward		; Implicit Strict
+	jmp strict faraway		; Implicit Strict
+forward:
+
+	times 256 nop
+faraway:
+
+

_service:tar_scm:nasm-2.16.03.tar.xz/test/far64.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/fewsecs.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/float.asm Added

@@ -0,0 +1,220 @@
+;Testname=unoptimized; Arguments=-O0 -fbin -ofloat.bin; Files=stdout stderr float.bin
+;Testname=optimized;   Arguments=-Ox -fbin -ofloat.bin; Files=stdout stderr float.bin
+
+;
+; Test of floating-point formats
+;
+
+%use fp
+
+; 8-bit
+	db 1.0
+	db +1.0
+	db -1.0
+	db 1.5
+	db +1.5
+	db -1.5
+	db 0.0
+	db +0.0
+	db -0.0
+	db 1.83203125
+	db +1.83203125
+	db -1.83203125
+	db 1.83203125e1
+	db +1.83203125e1
+	db -1.83203125e1
+	db 1.83203125e-1
+	db +1.83203125e-1
+	db -1.83203125e-1
+	db 1.13203125e-2		; Denormal!
+	db +1.13203125e-2		; Denormal!
+	db -1.13203125e-2		; Denormal!
+	db __Infinity__
+	db +__Infinity__
+	db -__Infinity__
+	db __NaN__
+	db __QNaN__
+	db __SNaN__
+	db 3.1415926535_8979323846_2643383279_5028841971_6939937510_5
+
+; 16-bit
+	dw 1.0
+	dw +1.0
+	dw -1.0
+	dw 1.5
+	dw +1.5
+	dw -1.5
+	dw 0.0
+	dw +0.0
+	dw -0.0
+	dw 1.83203125
+	dw +1.83203125
+	dw -1.83203125
+	dw 1.83203125e3
+	dw +1.83203125e3
+	dw -1.83203125e3
+	dw 1.83203125e-3
+	dw +1.83203125e-3
+	dw -1.83203125e-3
+	dw 1.83203125e-6		; Denormal!
+	dw +1.83203125e-6		; Denormal!
+	dw -1.83203125e-6		; Denormal!
+	dw __Infinity__
+	dw +__Infinity__
+	dw -__Infinity__
+	dw __NaN__
+	dw __QNaN__
+	dw __SNaN__
+	dw 3.1415926535_8979323846_2643383279_5028841971_6939937510_5
+
+; 16-bit bfloat
+	bf16 1.0
+	bf16 +1.0
+	bf16 -1.0
+	bf16 1.5
+	bf16 +1.5
+	bf16 -1.5
+	bf16 0.0
+	bf16 +0.0
+	bf16 -0.0
+	bf16 1.83203125
+	bf16 +1.83203125
+	bf16 -1.83203125
+	bf16 1.83203125e15
+	bf16 +1.83203125e15
+	bf16 -1.83203125e15
+	bf16 1.83203125e-15
+	bf16 +1.83203125e-15
+	bf16 -1.83203125e-15
+	bf16 1.83203125e-40		; Denormal!
+	bf16 +1.83203125e-40		; Denormal!
+	bf16 -1.83203125e-40		; Denormal!
+	bf16 __Infinity__
+	bf16 +__Infinity__
+	bf16 -__Infinity__
+	bf16 __NaN__
+	bf16 __QNaN__
+	bf16 __SNaN__
+	bf16 3.1415926535_8979323846_2643383279_5028841971_6939937510_5
+	bf16 -3.1415, NaN, 2000.0, +Inf
+
+; 32-bit
+	dd 1.0
+	dd +1.0
+	dd -1.0
+	dd 1.5
+	dd +1.5
+	dd -1.5
+	dd 0.0
+	dd +0.0
+	dd -0.0
+	dd 1.83203125
+	dd +1.83203125
+	dd -1.83203125
+	dd 1.83203125e15
+	dd +1.83203125e15
+	dd -1.83203125e15
+	dd 1.83203125e-15
+	dd +1.83203125e-15
+	dd -1.83203125e-15
+	dd 1.83203125e-40		; Denormal!
+	dd +1.83203125e-40		; Denormal!
+	dd -1.83203125e-40		; Denormal!
+	dd __Infinity__
+	dd +__Infinity__
+	dd -__Infinity__
+	dd __NaN__
+	dd __QNaN__
+	dd __SNaN__
+	dd 3.1415926535_8979323846_2643383279_5028841971_6939937510_5
+	dd -3.1415, NaN, 2000.0, +Inf
+
+; 64-bit
+	dq 1.0
+	dq +1.0
+	dq -1.0
+	dq 1.5
+	dq +1.5
+	dq -1.5
+	dq 0.0
+	dq +0.0
+	dq -0.0
+	dq 1.83203125
+	dq +1.83203125
+	dq -1.83203125
+	dq 1.83203125e300
+	dq +1.83203125e300
+	dq -1.83203125e300
+	dq 1.83203125e-300
+	dq +1.83203125e-300
+	dq -1.83203125e-300
+	dq 1.83203125e-320		; Denormal!
+	dq +1.83203125e-320		; Denormal!
+	dq -1.83203125e-320		; Denormal!
+	dq __Infinity__
+	dq +__Infinity__
+	dq -__Infinity__
+	dq __NaN__
+	dq __QNaN__
+	dq __SNaN__
+	dq 3.1415926535_8979323846_2643383279_5028841971_6939937510_5
+
+; 80-bit
+	dt 1.0
+	dt +1.0
+	dt -1.0
+	dt 1.5
+	dt +1.5
+	dt -1.5
+	dt 0.0
+	dt +0.0
+	dt -0.0
+	dt 1.83203125
+	dt +1.83203125
+	dt -1.83203125
+	dt 1.83203125e+4000
+	dt +1.83203125e+4000
+	dt -1.83203125e+4000
+	dt 1.83203125e-4000
+	dt +1.83203125e-4000
+	dt -1.83203125e-4000
+	dt 1.83203125e-4940		; Denormal!
+	dt +1.83203125e-4940		; Denormal!
+	dt -1.83203125e-4940		; Denormal!
+	dt __Infinity__
+	dt +__Infinity__
+	dt -__Infinity__
+	dt __NaN__
+	dt __QNaN__
+	dt __SNaN__
+	dt 3.1415926535_8979323846_2643383279_5028841971_6939937510_5
+
+; 128-bit
+	do 1.0
+	do +1.0
+	do -1.0
+	do 1.5
+	do +1.5
+	do -1.5
+	do 0.0
+	do +0.0
+	do -0.0
+	do 1.83203125
+	do +1.83203125
+	do -1.83203125
+	do 1.83203125e+4000
+	do +1.83203125e+4000
+	do -1.83203125e+4000
+	do 1.83203125e-4000
+	do +1.83203125e-4000
+	do -1.83203125e-4000
+	do 1.83203125e-4940		; Denormal!
+	do +1.83203125e-4940		; Denormal!
+	do -1.83203125e-4940		; Denormal!
+	do __Infinity__
+	do +__Infinity__
+	do -__Infinity__
+	do __NaN__
+	do __QNaN__
+	do __SNaN__
+	do 3.1415926535_8979323846_2643383279_5028841971_6939937510_5

_service:tar_scm:nasm-2.16.03.tar.xz/test/float8.asm Added

@@ -0,0 +1,135 @@
+;Testname=unoptimized; Arguments=-O0 -fbin -ofloat8.bin; Files=stdout stderr float8.bin
+;Testname=optimized;   Arguments=-Ox -fbin -ofloat8.bin; Files=stdout stderr float8.bin
+
+; Test of 8-bit floating-point constants
+
+	; Zero
+	db 0.0			; 00h
+
+	; Denorms
+	db 0.001953125		; 01h
+	db 0.00390625		; 02h
+	db 0.005859375		; 03h
+	db 0.0078125		; 04h
+	db 0.009765625		; 05h
+	db 0.01171875		; 06h
+	db 0.013671875		; 07h
+
+	; Normals
+	db 0.015625		; 08h
+	db 0.017578125		; 09h
+	db 0.01953125		; 0Ah
+	db 0.021484375		; 0Bh
+	db 0.0234375		; 0Ch
+	db 0.025390625		; 0Dh
+	db 0.02734375		; 0Eh
+	db 0.029296875		; 0Fh
+	db 0.03125		; 10h
+	db 0.03515625		; 11h
+	db 0.0390625		; 12h
+	db 0.04296875		; 13h
+	db 0.046875		; 14h
+	db 0.05078125		; 15h
+	db 0.0546875		; 16h
+	db 0.05859375		; 17h
+	db 0.0625		; 18h
+	db 0.0703125		; 19h
+	db 0.078125		; 1Ah
+	db 0.0859375		; 1Bh
+	db 0.09375		; 1Ch
+	db 0.1015625		; 1Dh
+	db 0.109375		; 1Eh
+	db 0.1171875		; 1Fh
+	db 0.125		; 20h
+	db 0.140625		; 21h
+	db 0.15625		; 22h
+	db 0.171875		; 23h
+	db 0.1875		; 24h
+	db 0.203125		; 25h
+	db 0.21875		; 26h
+	db 0.234375		; 27h
+	db 0.25			; 28h
+	db 0.28125		; 29h
+	db 0.3125		; 2Ah
+	db 0.34375		; 2Bh
+	db 0.375		; 2Ch
+	db 0.40625		; 2Dh
+	db 0.4375		; 2Eh
+	db 0.46875		; 2Fh
+	db 0.5			; 30h
+	db 0.5625		; 31h
+	db 0.625		; 32h
+	db 0.6875		; 33h
+	db 0.75			; 34h
+	db 0.8125		; 35h
+	db 0.875		; 36h
+	db 0.9375		; 37h
+	db 1.0			; 38h
+	db 1.125		; 39h
+	db 1.25			; 3Ah
+	db 1.375		; 3Bh
+	db 1.5			; 3Ch
+	db 1.625		; 3Dh
+	db 1.75			; 3Eh
+	db 1.875		; 3Fh
+	db 2.0			; 40h
+	db 2.25			; 41h
+	db 2.5			; 42h
+	db 2.75			; 43h
+	db 3.0			; 44h
+	db 3.25			; 45h
+	db 3.5			; 46h
+	db 3.75			; 47h
+	db 4.0			; 48h
+	db 4.5			; 49h
+	db 5.0			; 4Ah
+	db 5.5			; 4Bh
+	db 6.0			; 4Ch
+	db 6.5			; 4Dh
+	db 7.0			; 4Eh
+	db 7.5			; 4Fh
+	db 8.0			; 50h
+	db 9.0			; 51h
+	db 10.0			; 52h
+	db 11.0			; 53h
+	db 12.0			; 54h
+	db 13.0			; 55h
+	db 14.0			; 56h
+	db 15.0			; 57h
+	db 16.0			; 58h
+	db 18.0			; 59h
+	db 20.0			; 5Ah
+	db 22.0			; 5Bh
+	db 24.0			; 5Ch
+	db 26.0			; 5Dh
+	db 28.0			; 5Eh
+	db 30.0			; 5Fh
+	db 32.0			; 60h
+	db 36.0			; 61h
+	db 40.0			; 62h
+	db 44.0			; 63h
+	db 48.0			; 64h
+	db 52.0			; 65h
+	db 56.0			; 66h
+	db 60.0			; 67h
+	db 64.0			; 68h
+	db 72.0			; 69h
+	db 80.0			; 6Ah
+	db 88.0			; 6Bh
+	db 96.0			; 6Ch
+	db 104.0		; 6Dh
+	db 112.0		; 6Eh
+	db 120.0		; 6Fh
+	db 128.0		; 70h
+	db 144.0		; 71h
+	db 160.0		; 72h
+	db 176.0		; 73h
+	db 192.0		; 74h
+	db 208.0		; 75h
+	db 224.0		; 76h
+	db 240.0		; 77h
+
+	; Exceptionals
+	db __Infinity__		; 78h
+	db __SNaN__		; 79h
+	db __QNaN__		; 7Ch

_service:tar_scm:nasm-2.16.03.tar.xz/test/floatb.asm Added

@@ -0,0 +1,60 @@
+;Testname=unoptimized; Arguments=-O0 -fbin -ofloatb.bin; Files=stdout stderr floatb.bin
+;Testname=optimized;   Arguments=-Ox -fbin -ofloatb.bin; Files=stdout stderr floatb.bin
+
+	;; Known problematic floating-point numbers and their proper
+	;; encoding...
+
+	bits 64
+
+	dd 1.1e10
+	dd 0x5023e9ac	; Should be...
+
+	dd 50.40e9
+	dd 0x513bc130	; Should be...
+
+	dq 1.4e23
+	dq 0x44bda56a4b0835c0
+
+	dq 50.48e21
+	dq 0x44a5610d7502feae
+
+	dt 1.2e28
+	dq 0x9b18ab5df7180b6c
+	dw 0x405c
+
+	dt 50.46e25
+	dq 0xd0b29a67e95dcb60
+	dw 0x4057
+
+	do 0xf.ffffff8p-4
+	do 0q3.7777777774p-2
+	do 0b1.1111_1111_1111_1111_1111_1111_1111_111p-1
+
+	dt 0xf.ffffff8p-4
+	dt 0q3.7777777774p-2
+	dt 0b1.1111_1111_1111_1111_1111_1111_1111_111p-1
+
+	dq 0xf.ffffff8p-4
+	dq 0q3.7777777774p-2
+	dq 0b1.1111_1111_1111_1111_1111_1111_1111_111p-1
+
+	dd 0xf.ffffff8p-4
+	dd 0q3.7777777774p-2
+	dd 0b1.1111_1111_1111_1111_1111_1111_1111_111p-1
+
+	dw 0xf.ffffff8p-4
+	dw 0q3.7777777774p-2
+	dw 0b1.1111_1111_1111_1111_1111_1111_1111_111p-1
+
+	db 0xf.ffffff8p-4
+	db 0q3.7777777774p-2
+	db 0b1.1111_1111_1111_1111_1111_1111_1111_111p-1
+
+
+	;; Way too big numbers, should overflow to +Inf
+	dd 1.0E646456955
+	dd 1.0E646456956
+	dd 1.0E2147483646
+	dd 1.0E2147483647
+	dd 1.0E2147483648
+	dd 1.0E2147483649

_service:tar_scm:nasm-2.16.03.tar.xz/test/floatexp.asm Added

@@ -0,0 +1,382 @@
+;Testname=unoptimized; Arguments=-O0 -fbin -ofloatexp.bin; Files=stdout stderr floatexp.bin
+;Testname=optimized;   Arguments=-Ox -fbin -ofloatexp.bin; Files=stdout stderr floatexp.bin
+
+	bits 64
+;
+; Test of floating-point formats
+;
+
+; 8-bit
+	mov al,__float8__(1.0)
+	mov al,__float8__(+1.0)
+	mov al,__float8__(-1.0)
+	mov al,__float8__(0.0)
+	mov al,__float8__(+0.0)
+	mov al,__float8__(-0.0)
+	mov al,__float8__(1.83203125)
+	mov al,__float8__(+1.83203125)
+	mov al,__float8__(-1.83203125)
+	mov al,__float8__(1.83203125e1)
+	mov al,__float8__(+1.83203125e1)
+	mov al,__float8__(-1.83203125e1)
+	mov al,__float8__(1.83203125e-1)
+	mov al,__float8__(+1.83203125e-1)
+	mov al,__float8__(-1.83203125e-1)
+	mov al,__float8__(1.13203125e-2)		; Denormal!
+	mov al,__float8__(+1.13203125e-2)		; Denormal!
+	mov al,__float8__(-1.13203125e-2)		; Denormal!
+	mov al,__float8__(__Infinity__)
+	mov al,__float8__(+__Infinity__)
+	mov al,__float8__(-__Infinity__)
+	mov al,__float8__(__NaN__)
+	mov al,__float8__(__QNaN__)
+	mov al,__float8__(__SNaN__)
+
+; 16-bit
+	mov ax,__float16__(1.0)
+	mov ax,__float16__(+1.0)
+	mov ax,__float16__(-1.0)
+	mov ax,__float16__(0.0)
+	mov ax,__float16__(+0.0)
+	mov ax,__float16__(-0.0)
+	mov ax,__float16__(1.83203125)
+	mov ax,__float16__(+1.83203125)
+	mov ax,__float16__(-1.83203125)
+	mov ax,__float16__(1.83203125e3)
+	mov ax,__float16__(+1.83203125e3)
+	mov ax,__float16__(-1.83203125e3)
+	mov ax,__float16__(1.83203125e-3)
+	mov ax,__float16__(+1.83203125e-3)
+	mov ax,__float16__(-1.83203125e-3)
+	mov ax,__float16__(1.83203125e-6)		; Denormal!
+	mov ax,__float16__(+1.83203125e-6)		; Denormal!
+	mov ax,__float16__(-1.83203125e-6)		; Denormal!
+	mov ax,__float16__(__Infinity__)
+	mov ax,__float16__(+__Infinity__)
+	mov ax,__float16__(-__Infinity__)
+	mov ax,__float16__(__NaN__)
+	mov ax,__float16__(__QNaN__)
+	mov ax,__float16__(__SNaN__)
+
+; 32-bit
+	mov eax,__float32__(1.0)
+	mov eax,__float32__(+1.0)
+	mov eax,__float32__(-1.0)
+	mov eax,__float32__(0.0)
+	mov eax,__float32__(+0.0)
+	mov eax,__float32__(-0.0)
+	mov eax,__float32__(1.83203125)
+	mov eax,__float32__(+1.83203125)
+	mov eax,__float32__(-1.83203125)
+	mov eax,__float32__(1.83203125e15)
+	mov eax,__float32__(+1.83203125e15)
+	mov eax,__float32__(-1.83203125e15)
+	mov eax,__float32__(1.83203125e-15)
+	mov eax,__float32__(+1.83203125e-15)
+	mov eax,__float32__(-1.83203125e-15)
+	mov eax,__float32__(1.83203125e-40)		; Denormal!
+	mov eax,__float32__(+1.83203125e-40)		; Denormal!
+	mov eax,__float32__(-1.83203125e-40)		; Denormal!
+	mov eax,__float32__(__Infinity__)
+	mov eax,__float32__(+__Infinity__)
+	mov eax,__float32__(-__Infinity__)
+	mov eax,__float32__(__NaN__)
+	mov eax,__float32__(__QNaN__)
+	mov eax,__float32__(__SNaN__)
+
+; 64-bit
+	mov rax,__float64__(1.0)
+	mov rax,__float64__(+1.0)
+	mov rax,__float64__(-1.0)
+	mov rax,__float64__(0.0)
+	mov rax,__float64__(+0.0)
+	mov rax,__float64__(-0.0)
+	mov rax,__float64__(1.83203125)
+	mov rax,__float64__(+1.83203125)
+	mov rax,__float64__(-1.83203125)
+	mov rax,__float64__(1.83203125e300)
+	mov rax,__float64__(+1.83203125e300)
+	mov rax,__float64__(-1.83203125e300)
+	mov rax,__float64__(1.83203125e-300)
+	mov rax,__float64__(+1.83203125e-300)
+	mov rax,__float64__(-1.83203125e-300)
+	mov rax,__float64__(1.83203125e-320)		; Denormal!
+	mov rax,__float64__(+1.83203125e-320)		; Denormal!
+	mov rax,__float64__(-1.83203125e-320)		; Denormal!
+	mov rax,__float64__(__Infinity__)
+	mov rax,__float64__(+__Infinity__)
+	mov rax,__float64__(-__Infinity__)
+	mov rax,__float64__(__NaN__)
+	mov rax,__float64__(__QNaN__)
+	mov rax,__float64__(__SNaN__)
+
+; 80-bit
+	mov rax,__float80m__(1.0)
+	mov ax,__float80e__(1.0)
+	mov rax,__float80m__(+1.0)
+	mov ax,__float80e__(+1.0)
+	mov rax,__float80m__(-1.0)
+	mov ax,__float80e__(-1.0)
+	mov rax,__float80m__(0.0)
+	mov ax,__float80e__(0.0)
+	mov rax,__float80m__(+0.0)
+	mov ax,__float80e__(+0.0)
+	mov rax,__float80m__(-0.0)
+	mov ax,__float80e__(-0.0)
+	mov rax,__float80m__(1.83203125)
+	mov ax,__float80e__(1.83203125)
+	mov rax,__float80m__(+1.83203125)
+	mov ax,__float80e__(+1.83203125)
+	mov rax,__float80m__(-1.83203125)
+	mov ax,__float80e__(-1.83203125)
+	mov rax,__float80m__(1.83203125e+4000)
+	mov ax,__float80e__(1.83203125e+4000)
+	mov rax,__float80m__(+1.83203125e+4000)
+	mov ax,__float80e__(+1.83203125e+4000)
+	mov rax,__float80m__(-1.83203125e+4000)
+	mov ax,__float80e__(-1.83203125e+4000)
+	mov rax,__float80m__(1.83203125e-4000)
+	mov ax,__float80e__(1.83203125e-4000)
+	mov rax,__float80m__(+1.83203125e-4000)
+	mov ax,__float80e__(+1.83203125e-4000)
+	mov rax,__float80m__(-1.83203125e-4000)
+	mov ax,__float80e__(-1.83203125e-4000)
+	mov rax,__float80m__(1.83203125e-4940)		; Denormal!
+	mov ax,__float80e__(1.83203125e-4940)		; Denormal!
+	mov rax,__float80m__(+1.83203125e-4940)		; Denormal!
+	mov ax,__float80e__(+1.83203125e-4940)		; Denormal!
+	mov rax,__float80m__(-1.83203125e-4940)		; Denormal!
+	mov ax,__float80e__(-1.83203125e-4940)		; Denormal!
+	mov rax,__float80m__(__Infinity__)
+	mov ax,__float80e__(__Infinity__)
+	mov rax,__float80m__(+__Infinity__)
+	mov ax,__float80e__(+__Infinity__)
+	mov rax,__float80m__(-__Infinity__)
+	mov ax,__float80e__(-__Infinity__)
+	mov rax,__float80m__(__NaN__)
+	mov ax,__float80e__(__NaN__)
+	mov rax,__float80m__(__QNaN__)
+	mov ax,__float80e__(__QNaN__)
+	mov rax,__float80m__(__SNaN__)
+	mov ax,__float80e__(__SNaN__)
+
+; 128-bit
+	mov rax,__float128l__(1.0)
+	mov rax,__float128h__(1.0)
+	mov rax,__float128l__(+1.0)
+	mov rax,__float128h__(+1.0)
+	mov rax,__float128l__(-1.0)
+	mov rax,__float128h__(-1.0)
+	mov rax,__float128l__(0.0)
+	mov rax,__float128h__(0.0)
+	mov rax,__float128l__(+0.0)
+	mov rax,__float128h__(+0.0)
+	mov rax,__float128l__(-0.0)
+	mov rax,__float128h__(-0.0)
+	mov rax,__float128l__(1.83203125)
+	mov rax,__float128h__(1.83203125)
+	mov rax,__float128l__(+1.83203125)
+	mov rax,__float128h__(+1.83203125)
+	mov rax,__float128l__(-1.83203125)
+	mov rax,__float128h__(-1.83203125)
+	mov rax,__float128l__(1.83203125e+4000)
+	mov rax,__float128h__(1.83203125e+4000)
+	mov rax,__float128l__(+1.83203125e+4000)
+	mov rax,__float128h__(+1.83203125e+4000)
+	mov rax,__float128l__(-1.83203125e+4000)
+	mov rax,__float128h__(-1.83203125e+4000)
+	mov rax,__float128l__(1.83203125e-4000)
+	mov rax,__float128h__(1.83203125e-4000)
+	mov rax,__float128l__(+1.83203125e-4000)
+	mov rax,__float128h__(+1.83203125e-4000)
+	mov rax,__float128l__(-1.83203125e-4000)
+	mov rax,__float128h__(-1.83203125e-4000)
+	mov rax,__float128l__(1.83203125e-4940)		; Denormal!
+	mov rax,__float128h__(1.83203125e-4940)		; Denormal!
+	mov rax,__float128l__(+1.83203125e-4940)		; Denormal!
+	mov rax,__float128h__(+1.83203125e-4940)		; Denormal!
+	mov rax,__float128l__(-1.83203125e-4940)		; Denormal!
+	mov rax,__float128h__(-1.83203125e-4940)		; Denormal!
+	mov rax,__float128l__(__Infinity__)
+	mov rax,__float128h__(__Infinity__)
+	mov rax,__float128l__(+__Infinity__)
+	mov rax,__float128h__(+__Infinity__)
+	mov rax,__float128l__(-__Infinity__)
+	mov rax,__float128h__(-__Infinity__)
+	mov rax,__float128l__(__NaN__)
+	mov rax,__float128h__(__NaN__)
+	mov rax,__float128l__(__QNaN__)
+	mov rax,__float128h__(__QNaN__)
+	mov rax,__float128l__(__SNaN__)
+	mov rax,__float128h__(__SNaN__)
+
+;
+; Test hexadecimal floating-point numbers
+;
+ 
+; 16-bit
+	mov ax,__float16__(1.0)
+	mov ax,__float16__(0x1.0)
+	mov ax,__float16__(2.0)
+	mov ax,__float16__(0x2.0)
+	mov ax,__float16__(0x1.0p+1)
+	mov ax,__float16__(0x1.0p-1)
+	mov ax,__float16__(0x0.0)
+	mov ax,__float16__(0x1.23456789)
+	mov ax,__float16__(0x0.123456789)
+	mov ax,__float16__(0x0.0000123456789)
+	mov ax,__float16__(0x1.23456789p10)
+	mov ax,__float16__(0x1.23456789p+10)
+	mov ax,__float16__(0x1.23456789p-10)
+	mov ax,__float16__(0x0.123456789p10)
+	mov ax,__float16__(0x0.123456789p+10)
+	mov ax,__float16__(0x0.123456789abcdef0123456789abcdef012345p-10)
+	mov ax,__float16__(0x0.0000123456789)
+	mov ax,__float16__(0x0.0000123456789p+10)
+	mov ax,__float16__(0x0.0000123456789p-10)
+
+; 32-bit
+	mov eax,__float32__(1.0)
+	mov eax,__float32__(0x1.0)
+	mov eax,__float32__(2.0)
+	mov eax,__float32__(0x2.0)
+	mov eax,__float32__(0x1.0p+1)
+	mov eax,__float32__(0x1.0p-1)
+	mov eax,__float32__(0x0.0)
+	mov eax,__float32__(0x1.23456789)
+	mov eax,__float32__(0x0.123456789)
+	mov eax,__float32__(0x0.0000123456789)
+	mov eax,__float32__(0x1.23456789p10)
+	mov eax,__float32__(0x1.23456789p+10)
+	mov eax,__float32__(0x1.23456789p-10)
+	mov eax,__float32__(0x0.123456789p10)
+	mov eax,__float32__(0x0.123456789p+10)
+	mov eax,__float32__(0x0.123456789abcdef0123456789abcdef012345p-10)
+	mov eax,__float32__(0x0.0000123456789)
+	mov eax,__float32__(0x0.0000123456789p+10)
+	mov eax,__float32__(0x0.0000123456789p-10)
+	mov eax,__float32__(0x123456789.0)
+	mov eax,__float32__(0x0000123456789.0)
+	mov eax,__float32__(0x123456789.0p+0)
+	mov eax,__float32__(0x123456789.0p+64)
+
+; 64-bit
+	mov rax,__float64__(1.0)
+	mov rax,__float64__(0x1.0)
+	mov rax,__float64__(2.0)
+	mov rax,__float64__(0x2.0)
+	mov rax,__float64__(0x1.0p+1)
+	mov rax,__float64__(0x1.0p-1)
+	mov rax,__float64__(0x0.0)
+	mov rax,__float64__(0x1.23456789)
+	mov rax,__float64__(0x0.123456789)
+	mov rax,__float64__(0x0.0000123456789)
+	mov rax,__float64__(0x1.23456789p10)
+	mov rax,__float64__(0x1.23456789p+10)
+	mov rax,__float64__(0x1.23456789p-10)
+	mov rax,__float64__(0x0.123456789p10)
+	mov rax,__float64__(0x0.123456789p+10)
+	mov rax,__float64__(0x0.123456789abcdef0123456789abcdef012345p-10)
+	mov rax,__float64__(0x0.0000123456789)
+	mov rax,__float64__(0x0.0000123456789p+10)
+	mov rax,__float64__(0x0.0000123456789p-10)
+	mov rax,__float64__(0x123456789.0)
+	mov rax,__float64__(0x0000123456789.0)
+	mov rax,__float64__(0x123456789.0p+0)
+	mov rax,__float64__(0x123456789.0p+300)
+	
+; 80-bit
+	mov rax,__float80m__(1.0)
+	mov ax,__float80e__(1.0)
+	mov rax,__float80m__(0x1.0)
+	mov ax,__float80e__(0x1.0)
+	mov rax,__float80m__(2.0)
+	mov ax,__float80e__(2.0)
+	mov rax,__float80m__(0x2.0)
+	mov ax,__float80e__(0x2.0)
+	mov rax,__float80m__(0x1.0p+1)
+	mov ax,__float80e__(0x1.0p+1)
+	mov rax,__float80m__(0x1.0p-1)
+	mov ax,__float80e__(0x1.0p-1)
+	mov rax,__float80m__(0x0.0)
+	mov ax,__float80e__(0x0.0)
+	mov rax,__float80m__(0x1.23456789)
+	mov ax,__float80e__(0x1.23456789)
+	mov rax,__float80m__(0x0.123456789)
+	mov ax,__float80e__(0x0.123456789)
+	mov rax,__float80m__(0x0.0000123456789)
+	mov ax,__float80e__(0x0.0000123456789)
+	mov rax,__float80m__(0x1.23456789p10)
+	mov ax,__float80e__(0x1.23456789p10)
+	mov rax,__float80m__(0x1.23456789p+10)
+	mov ax,__float80e__(0x1.23456789p+10)
+	mov rax,__float80m__(0x1.23456789p-10)
+	mov ax,__float80e__(0x1.23456789p-10)
+	mov rax,__float80m__(0x0.123456789p10)
+	mov ax,__float80e__(0x0.123456789p10)
+	mov rax,__float80m__(0x0.123456789p+10)
+	mov ax,__float80e__(0x0.123456789p+10)
+	mov rax,__float80m__(0x0.123456789abcdef0123456789abcdef012345p-10)
+	mov ax,__float80e__(0x0.123456789abcdef0123456789abcdef012345p-10)
+	mov rax,__float80m__(0x0.0000123456789)
+	mov ax,__float80e__(0x0.0000123456789)
+	mov rax,__float80m__(0x0.0000123456789p+10)
+	mov ax,__float80e__(0x0.0000123456789p+10)
+	mov rax,__float80m__(0x0.0000123456789p-10)
+	mov ax,__float80e__(0x0.0000123456789p-10)
+	mov rax,__float80m__(0x123456789.0)
+	mov ax,__float80e__(0x123456789.0)
+	mov rax,__float80m__(0x0000123456789.0)
+	mov ax,__float80e__(0x0000123456789.0)
+	mov rax,__float80m__(0x123456789.0p+0)
+	mov ax,__float80e__(0x123456789.0p+0)
+	mov rax,__float80m__(0x123456789.0p+1024)
+	mov ax,__float80e__(0x123456789.0p+1024)
+
+; 128-bit
+	mov rax,__float128l__(1.0)
+	mov rax,__float128h__(1.0)
+	mov rax,__float128l__(0x1.0)
+	mov rax,__float128h__(0x1.0)
+	mov rax,__float128l__(2.0)
+	mov rax,__float128h__(2.0)
+	mov rax,__float128l__(0x2.0)
+	mov rax,__float128h__(0x2.0)
+	mov rax,__float128l__(0x1.0p+1)
+	mov rax,__float128h__(0x1.0p+1)
+	mov rax,__float128l__(0x1.0p-1)
+	mov rax,__float128h__(0x1.0p-1)
+	mov rax,__float128l__(0x0.0)
+	mov rax,__float128h__(0x0.0)
+	mov rax,__float128l__(0x1.23456789)
+	mov rax,__float128h__(0x1.23456789)
+	mov rax,__float128l__(0x0.123456789)
+	mov rax,__float128h__(0x0.123456789)
+	mov rax,__float128l__(0x0.0000123456789)
+	mov rax,__float128h__(0x0.0000123456789)
+	mov rax,__float128l__(0x1.23456789p10)
+	mov rax,__float128h__(0x1.23456789p10)
+	mov rax,__float128l__(0x1.23456789p+10)
+	mov rax,__float128h__(0x1.23456789p+10)
+	mov rax,__float128l__(0x1.23456789p-10)
+	mov rax,__float128h__(0x1.23456789p-10)
+	mov rax,__float128l__(0x0.123456789p10)
+	mov rax,__float128h__(0x0.123456789p10)
+	mov rax,__float128l__(0x0.123456789p+10)
+	mov rax,__float128h__(0x0.123456789p+10)
+	mov rax,__float128l__(0x0.123456789abcdef0123456789abcdef012345p-10)
+	mov rax,__float128h__(0x0.123456789abcdef0123456789abcdef012345p-10)
+	mov rax,__float128l__(0x0.0000123456789)
+	mov rax,__float128h__(0x0.0000123456789)
+	mov rax,__float128l__(0x0.0000123456789p+10)
+	mov rax,__float128h__(0x0.0000123456789p+10)
+	mov rax,__float128l__(0x0.0000123456789p-10)
+	mov rax,__float128h__(0x0.0000123456789p-10)
+	mov rax,__float128l__(0x123456789.0)
+	mov rax,__float128h__(0x123456789.0)
+	mov rax,__float128l__(0x0000123456789.0)
+	mov rax,__float128h__(0x0000123456789.0)
+	mov rax,__float128l__(0x123456789.0p+0)
+	mov rax,__float128h__(0x123456789.0p+0)
+	mov rax,__float128l__(0x123456789.0p+1024)
+	mov rax,__float128h__(0x123456789.0p+1024)

_service:tar_scm:nasm-2.16.03.tar.xz/test/floatize.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/floattest.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/floatx.asm Added

@@ -0,0 +1,525 @@
+;
+; floatx.asm
+;
+; Test hexadecimal floating-point numbers
+
+%define Inf __Infinity__
+%define NaN __QNaN__
+
+; 16-bit
+	dw 1.0
+	dw 0x1.0
+	dw 2.0
+	dw 0x2.0
+	dw 0x1.0p+1
+	dw 0x1.0p-1
+	dw 0x0.0
+	dw 0x1.23456789
+	dw 0x0.123456789
+	dw 0x0.0000123456789
+	dw 0x1.23456789p10
+	dw 0x1.23456789p+10
+	dw 0x1.23456789p-10
+	dw 0x0.123456789p10
+	dw 0x0.123456789p+10
+	dw 0x0.123456789abcdef0123456789abcdef012345p-10
+	dw 0x0.0000123456789
+	dw 0x0.0000123456789p+10
+	dw 0x0.0000123456789p-10
+	dw 0x1.0p-25		; Underflow
+	dw 0x1.01p-25		; Rounds to denorm
+	dw 0x1.0p-24		; Smallest denorm
+	dw 0x1.ffffffffffffffffffffffffffffp-16	; Rounds to denorm
+	dw 0x1.0p-15		; Denorm
+	dw 0x1.ffffffffffffffffffffffffffffp-15	; Rounds to normal
+	dw 0x1.0p-14		; Smallest non-denorm
+	dw 0x1.0p+15		; Biggest possible exponent
+	dw 0x1.ffffffffffffffffffffffffffffp+15	; Rounds to infinity
+	dw Inf			; Infinity
+	dw NaN
+
+; 32-bit
+	dd 1.0
+	dd 0x1.0
+	dd 2.0
+	dd 0x2.0
+	dd 0x1.0p+1
+	dd 0x1.0p-1
+	dd 0x0.0
+	dd 0x1.23456789
+	dd 0x0.123456789
+	dd 0x0.0000123456789
+	dd 0x1.23456789p10
+	dd 0x1.23456789p+10
+	dd 0x1.23456789p-10
+	dd 0x0.123456789p10
+	dd 0x0.123456789p+10
+	dd 0x0.123456789abcdef0123456789abcdef012345p-10
+	dd 0x0.0000123456789
+	dd 0x0.0000123456789p+10
+	dd 0x0.0000123456789p-10
+	dd 0x123456789.0
+	dd 0x0000123456789.0
+	dd 0x123456789.0p+0
+	dd 0x123456789.0p+64
+	dd 0x1.0p-150		; Underflow
+	dd 0x1.01p-150		; Rounds to denorm
+	dd 0x1.0p-149		; Smallest denorm
+	dd 0x1.ffffffffffffffffffffffffffffp-128	; Rounds to denorm
+	dd 0x1.0p-127		; Denorm
+	dd 0x1.ffffffffffffffffffffffffffffp-127	; Rounds to normal
+	dd 0x1.0p-126		; Smallest non-denorm
+	dd 0x1.0p+127		; Biggest possible exponent
+	dd 0x1.ffffffffffffffffffffffffffffp+127	; Rounds to infinity
+	dd Inf			; Infinity
+	dd NaN
+
+; 64-bit
+	dq 1.0
+	dq 0x1.0
+	dq 2.0
+	dq 0x2.0
+	dq 0x1.0p+1
+	dq 0x1.0p-1
+	dq 0x0.0
+	dq 0x1.23456789
+	dq 0x0.123456789
+	dq 0x0.0000123456789
+	dq 0x1.23456789p10
+	dq 0x1.23456789p+10
+	dq 0x1.23456789p-10
+	dq 0x0.123456789p10
+	dq 0x0.123456789p+10
+	dq 0x0.123456789abcdef0123456789abcdef012345p-10
+	dq 0x0.0000123456789
+	dq 0x0.0000123456789p+10
+	dq 0x0.0000123456789p-10
+	dq 0x123456789.0
+	dq 0x0000123456789.0
+	dq 0x123456789.0p+0
+	dq 0x123456789.0p+300
+	dq 0x1.0p-1075		; Underflow
+	dq 0x1.01p-1075		; Rounds to denorm
+	dq 0x1.0p-1074		; Smallest denorm
+	dq 0x1.ffffffffffffffffffffffffffffp-1024	; Rounds to denorm
+	dq 0x1.0p-1023		; Denorm
+	dq 0x1.ffffffffffffffffffffffffffffp-1023	; Rounds to normal
+	dq 0x1.0p-1022		; Smallest non-denorm
+	dq 0x1.0p+1023		; Biggest possible exponent
+	dq 0x1.ffffffffffffffffffffffffffffp+1023	; Rounds to infinity
+	dq Inf			; Infinity
+	dq NaN
+
+; 80-bit
+	dt 1.0
+	dt 0x1.0
+	dt 2.0
+	dt 0x2.0
+	dt 0x1.0p+1
+	dt 0x1.0p-1
+	dt 0x0.0
+	dt 0x1.23456789
+	dt 0x0.123456789
+	dt 0x0.0000123456789
+	dt 0x1.23456789p10
+	dt 0x1.23456789p+10
+	dt 0x1.23456789p-10
+	dt 0x0.123456789p10
+	dt 0x0.123456789p+10
+	dt 0x0.123456789abcdef0123456789abcdef012345p-10
+	dt 0x0.0000123456789
+	dt 0x0.0000123456789p+10
+	dt 0x0.0000123456789p-10
+	dt 0x123456789.0
+	dt 0x0000123456789.0
+	dt 0x123456789.0p+0
+	dt 0x123456789.0p+1024
+	dt 0x1.0p-16446		; Underflow
+	dt 0x1.01p-16446	; Rounds to denorm
+	dt 0x1.0p-16445		; Smallest denorm
+	dt 0x1.ffffffffffffffffffffffffffffp-16384	; Rounds to denorm
+	dt 0x1.0p-16383		; Denorm
+	dt 0x1.ffffffffffffffffffffffffffffp-16383	; Rounds to normal
+	dt 0x1.0p-16382		; Smallest non-denorm
+	dt 0x1.0p+16383		; Biggest possible exponent
+	dt 0x1.ffffffffffffffffffffffffffffp+16383	; Rounds to infinity
+	dt Inf			; Infinity
+	dt NaN
+
+; 128-bit
+	do 1.0
+	do 0x1.0
+	do 2.0
+	do 0x2.0
+	do 0x1.0p+1
+	do 0x1.0p-1
+	do 0x0.0
+	do 0x1.23456789
+	do 0x0.123456789
+	do 0x0.0000123456789
+	do 0x1.23456789p10
+	do 0x1.23456789p+10
+	do 0x1.23456789p-10
+	do 0x0.123456789p10
+	do 0x0.123456789p+10
+	do 0x0.123456789abcdef0123456789abcdef012345p-10
+	do 0x0.0000123456789
+	do 0x0.0000123456789p+10
+	do 0x0.0000123456789p-10
+	do 0x123456789.0
+	do 0x0000123456789.0
+	do 0x123456789.0p+0
+	do 0x123456789.0p+1024
+	do 0x1.0p-16495		; Underflow
+	do 0x1.01p-16495	; Rounds to denorm
+	do 0x1.0p-16494		; Smallest denorm
+	do 0x1.ffffffffffffffffffffffffffffffffp-16384	; Rounds to denorm
+	do 0x1.0p-16383		; Denorm
+	do 0x1.ffffffffffffffffffffffffffffffffp-16383	; Rounds to normal
+	do 0x1.0p-16382		; Smallest non-denorm
+	do 0x1.0p+16383		; Biggest possible exponent
+	do 0x1.ffffffffffffffffffffffffffffffffp+16383	; Rounds to infinity
+	do Inf			; Infinity
+	do NaN
+
+; 16-bit
+	dw 1.0
+	dw 0h1.0
+	dw 2.0
+	dw 0h2.0
+	dw 0h1.0p+1
+	dw 0h1.0p-1
+	dw 0h0.0
+	dw 0h1.23456789
+	dw 0h0.123456789
+	dw 0h0.0000123456789
+	dw 0h1.23456789p10
+	dw 0h1.23456789p+10
+	dw 0h1.23456789p-10
+	dw 0h0.123456789p10
+	dw 0h0.123456789p+10
+	dw 0h0.123456789abcdef0123456789abcdef012345p-10
+	dw 0h0.0000123456789
+	dw 0h0.0000123456789p+10
+	dw 0h0.0000123456789p-10
+	dw 0h1.0p-25		; Underflow
+	dw 0h1.0p-24		; Smallest denorm
+	dw 0h1.ffffffffffffffffffffffffffffp-16	; Rounds to denorm
+	dw 0h1.0p-15		; Denorm
+	dw 0h1.ffffffffffffffffffffffffffffp-15	; Rounds to normal
+	dw 0h1.0p-14		; Smallest non-denorm
+	dw 0h1.0p+15		; Biggest possible exponent
+	dw 0h1.ffffffffffffffffffffffffffffp+15	; Rounds to infinity
+	dw Inf			; Infinity
+	dw NaN
+
+; 32-bit
+	dd 1.0
+	dd 0h1.0
+	dd 2.0
+	dd 0h2.0
+	dd 0h1.0p+1
+	dd 0h1.0p-1
+	dd 0h0.0
+	dd 0h1.23456789
+	dd 0h0.123456789
+	dd 0h0.0000123456789
+	dd 0h1.23456789p10
+	dd 0h1.23456789p+10
+	dd 0h1.23456789p-10
+	dd 0h0.123456789p10
+	dd 0h0.123456789p+10
+	dd 0h0.123456789abcdef0123456789abcdef012345p-10
+	dd 0h0.0000123456789
+	dd 0h0.0000123456789p+10
+	dd 0h0.0000123456789p-10
+	dd 0h123456789.0
+	dd 0h0000123456789.0
+	dd 0h123456789.0p+0
+	dd 0h123456789.0p+64
+	dd 0h1.0p-150		; Underflow
+	dd 0h1.0p-149		; Smallest denorm
+	dd 0h1.ffffffffffffffffffffffffffffp-128	; Rounds to denorm
+	dd 0h1.0p-127		; Denorm
+	dd 0h1.ffffffffffffffffffffffffffffp-127	; Rounds to normal
+	dd 0h1.0p-126		; Smallest non-denorm
+	dd 0h1.0p+127		; Biggest possible exponent
+	dd 0h1.ffffffffffffffffffffffffffffp+127	; Rounds to infinity
+	dd Inf			; Infinity
+	dd NaN
+
+; 64-bit
+	dq 1.0
+	dq 0h1.0
+	dq 2.0
+	dq 0h2.0
+	dq 0h1.0p+1
+	dq 0h1.0p-1
+	dq 0h0.0
+	dq 0h1.23456789
+	dq 0h0.123456789
+	dq 0h0.0000123456789
+	dq 0h1.23456789p10
+	dq 0h1.23456789p+10
+	dq 0h1.23456789p-10
+	dq 0h0.123456789p10
+	dq 0h0.123456789p+10
+	dq 0h0.123456789abcdef0123456789abcdef012345p-10
+	dq 0h0.0000123456789
+	dq 0h0.0000123456789p+10
+	dq 0h0.0000123456789p-10
+	dq 0h123456789.0
+	dq 0h0000123456789.0
+	dq 0h123456789.0p+0
+	dq 0h123456789.0p+300
+	dq 0h1.0p-1075		; Underflow
+	dq 0h1.0p-1074		; Smallest denorm
+	dq 0h1.ffffffffffffffffffffffffffffp-1024	; Rounds to denorm
+	dq 0h1.0p-1023		; Denorm
+	dq 0h1.ffffffffffffffffffffffffffffp-1023	; Rounds to normal
+	dq 0h1.0p-1022		; Smallest non-denorm
+	dq 0h1.0p+1023		; Biggest possible exponent
+	dq 0h1.ffffffffffffffffffffffffffffp+1023	; Rounds to infinity
+	dq Inf			; Infinity
+	dq NaN
+
+; 80-bit
+	dt 1.0
+	dt 0h1.0
+	dt 2.0
+	dt 0h2.0
+	dt 0h1.0p+1
+	dt 0h1.0p-1
+	dt 0h0.0
+	dt 0h1.23456789
+	dt 0h0.123456789
+	dt 0h0.0000123456789
+	dt 0h1.23456789p10
+	dt 0h1.23456789p+10
+	dt 0h1.23456789p-10
+	dt 0h0.123456789p10
+	dt 0h0.123456789p+10
+	dt 0h0.123456789abcdef0123456789abcdef012345p-10
+	dt 0h0.0000123456789
+	dt 0h0.0000123456789p+10
+	dt 0h0.0000123456789p-10
+	dt 0h123456789.0
+	dt 0h0000123456789.0
+	dt 0h123456789.0p+0
+	dt 0h123456789.0p+1024
+	dt 0h1.0p-16446		; Underflow
+	dt 0h1.0p-16445		; Smallest denorm
+	dt 0h1.ffffffffffffffffffffffffffffp-16384	; Rounds to denorm
+	dt 0h1.0p-16383		; Denorm
+	dt 0h1.ffffffffffffffffffffffffffffp-16383	; Rounds to normal
+	dt 0h1.0p-16382		; Smallest non-denorm
+	dt 0h1.0p+16383		; Biggest possible exponent
+	dt 0h1.ffffffffffffffffffffffffffffp+16383	; Rounds to infinity
+	dt Inf			; Infinity
+	dt NaN
+
+; 128-bit
+	do 1.0
+	do 0h1.0
+	do 2.0
+	do 0h2.0
+	do 0h1.0p+1
+	do 0h1.0p-1
+	do 0h0.0
+	do 0h1.23456789
+	do 0h0.123456789
+	do 0h0.0000123456789
+	do 0h1.23456789p10
+	do 0h1.23456789p+10
+	do 0h1.23456789p-10
+	do 0h0.123456789p10
+	do 0h0.123456789p+10
+	do 0h0.123456789abcdef0123456789abcdef012345p-10
+	do 0h0.0000123456789
+	do 0h0.0000123456789p+10
+	do 0h0.0000123456789p-10
+	do 0h123456789.0
+	do 0h0000123456789.0
+	do 0h123456789.0p+0
+	do 0h123456789.0p+1024
+	do 0h1.0p-16495		; Underflow
+	do 0h1.0p-16494		; Smallest denorm
+	do 0h1.ffffffffffffffffffffffffffffffffp-16384	; Rounds to denorm
+	do 0h1.0p-16383		; Denorm
+	do 0h1.ffffffffffffffffffffffffffffffffp-16383	; Rounds to normal
+	do 0h1.0p-16382		; Smallest non-denorm
+	do 0h1.0p+16383		; Biggest possible exponent
+	do 0h1.ffffffffffffffffffffffffffffffffp+16383	; Rounds to infinity
+	do Inf			; Infinity
+	do NaN
+
+; 16-bit
+	dw 1.0
+	dw $1.0
+	dw 2.0
+	dw $2.0
+	dw $1.0p+1
+	dw $1.0p-1
+	dw $0.0
+	dw $1.23456789
+	dw $0.123456789
+	dw $0.0000123456789
+	dw $1.23456789p10
+	dw $1.23456789p+10
+	dw $1.23456789p-10
+	dw $0.123456789p10
+	dw $0.123456789p+10
+	dw $0.123456789abcdef0123456789abcdef012345p-10
+	dw $0.0000123456789
+	dw $0.0000123456789p+10
+	dw $0.0000123456789p-10
+	dw $1.0p-25		; Underflow
+	dw $1.0p-24		; Smallest denorm
+	dw $1.ffffffffffffffffffffffffffffp-16	; Rounds to denorm
+	dw $1.0p-15		; Denorm
+	dw $1.ffffffffffffffffffffffffffffp-15	; Rounds to normal
+	dw $1.0p-14		; Smallest non-denorm
+	dw $1.0p+15		; Biggest possible exponent
+	dw $1.ffffffffffffffffffffffffffffp+15	; Rounds to infinity
+	dw Inf			; Infinity
+	dw NaN
+
+; 32-bit
+	dd 1.0
+	dd $1.0
+	dd 2.0
+	dd $2.0
+	dd $1.0p+1
+	dd $1.0p-1
+	dd $0.0
+	dd $1.23456789
+	dd $0.123456789
+	dd $0.0000123456789
+	dd $1.23456789p10
+	dd $1.23456789p+10
+	dd $1.23456789p-10
+	dd $0.123456789p10
+	dd $0.123456789p+10
+	dd $0.123456789abcdef0123456789abcdef012345p-10
+	dd $0.0000123456789
+	dd $0.0000123456789p+10
+	dd $0.0000123456789p-10
+	dd $123456789.0
+	dd $0000123456789.0
+	dd $123456789.0p+0
+	dd $123456789.0p+64
+	dd $1.0p-150		; Underflow
+	dd $1.0p-149		; Smallest denorm
+	dd $1.ffffffffffffffffffffffffffffp-128	; Rounds to denorm
+	dd $1.0p-127		; Denorm
+	dd $1.ffffffffffffffffffffffffffffp-127	; Rounds to normal
+	dd $1.0p-126		; Smallest non-denorm
+	dd $1.0p+127		; Biggest possible exponent
+	dd $1.ffffffffffffffffffffffffffffp+127	; Rounds to infinity
+	dd Inf			; Infinity
+	dd NaN
+
+; 64-bit
+	dq 1.0
+	dq $1.0
+	dq 2.0
+	dq $2.0
+	dq $1.0p+1
+	dq $1.0p-1
+	dq $0.0
+	dq $1.23456789
+	dq $0.123456789
+	dq $0.0000123456789
+	dq $1.23456789p10
+	dq $1.23456789p+10
+	dq $1.23456789p-10
+	dq $0.123456789p10
+	dq $0.123456789p+10
+	dq $0.123456789abcdef0123456789abcdef012345p-10
+	dq $0.0000123456789
+	dq $0.0000123456789p+10
+	dq $0.0000123456789p-10
+	dq $123456789.0
+	dq $0000123456789.0
+	dq $123456789.0p+0
+	dq $123456789.0p+300
+	dq $1.0p-1075		; Underflow
+	dq $1.0p-1074		; Smallest denorm
+	dq $1.ffffffffffffffffffffffffffffp-1024	; Rounds to denorm
+	dq $1.0p-1023		; Denorm
+	dq $1.ffffffffffffffffffffffffffffp-1023	; Rounds to normal
+	dq $1.0p-1022		; Smallest non-denorm
+	dq $1.0p+1023		; Biggest possible exponent
+	dq $1.ffffffffffffffffffffffffffffp+1023	; Rounds to infinity
+	dq Inf			; Infinity
+	dq NaN
+
+; 80-bit
+	dt 1.0
+	dt $1.0
+	dt 2.0
+	dt $2.0
+	dt $1.0p+1
+	dt $1.0p-1
+	dt $0.0
+	dt $1.23456789
+	dt $0.123456789
+	dt $0.0000123456789
+	dt $1.23456789p10
+	dt $1.23456789p+10
+	dt $1.23456789p-10
+	dt $0.123456789p10
+	dt $0.123456789p+10
+	dt $0.123456789abcdef0123456789abcdef012345p-10
+	dt $0.0000123456789
+	dt $0.0000123456789p+10
+	dt $0.0000123456789p-10
+	dt $123456789.0
+	dt $0000123456789.0
+	dt $123456789.0p+0
+	dt $123456789.0p+1024
+	dt $1.0p-16446		; Underflow
+	dt $1.0p-16445		; Smallest denorm
+	dt $1.ffffffffffffffffffffffffffffp-16384	; Rounds to denorm
+	dt $1.0p-16383		; Denorm
+	dt $1.ffffffffffffffffffffffffffffp-16383	; Rounds to normal
+	dt $1.0p-16382		; Smallest non-denorm
+	dt $1.0p+16383		; Biggest possible exponent
+	dt $1.ffffffffffffffffffffffffffffp+16383	; Rounds to infinity
+	dt Inf			; Infinity
+	dt NaN
+
+; 128-bit
+	do 1.0
+	do $1.0
+	do 2.0
+	do $2.0
+	do $1.0p+1
+	do $1.0p-1
+	do $0.0
+	do $1.23456789
+	do $0.123456789
+	do $0.0000123456789
+	do $1.23456789p10
+	do $1.23456789p+10
+	do $1.23456789p-10
+	do $0.123456789p10
+	do $0.123456789p+10
+	do $0.123456789abcdef0123456789abcdef012345p-10
+	do $0.0000123456789
+	do $0.0000123456789p+10
+	do $0.0000123456789p-10
+	do $123456789.0
+	do $0000123456789.0
+	do $123456789.0p+0
+	do $123456789.0p+1024
+	do $1.0p-16495		; Underflow
+	do $1.0p-16494		; Smallest denorm
+	do $1.ffffffffffffffffffffffffffffffffp-16384	; Rounds to denorm
+	do $1.0p-16383		; Denorm
+	do $1.ffffffffffffffffffffffffffffffffp-16383	; Rounds to normal
+	do $1.0p-16382		; Smallest non-denorm
+	do $1.0p+16383		; Biggest possible exponent
+	do $1.ffffffffffffffffffffffffffffffffp+16383	; Rounds to infinity
+	do Inf			; Infinity
+	do NaN

_service:tar_scm:nasm-2.16.03.tar.xz/test/fpu.asm Added

@@ -0,0 +1,127 @@
+;Testname=test; Arguments=-fbin -ofpu.bin; Files=stdout stderr fpu.bin
+
+; relaxed encodings for FPU instructions, which NASM should support
+; -----------------------------------------------------------------
+
+%define void
+%define reg_fpu0 st0
+%define reg_fpu st1
+
+; no operands instead of one operand:
+
+  ; F(U)COM(P), FCOM2, FCOMP3, FCOMP5
+
+    FCOM            void
+    FCOMP           void
+    FUCOM           void
+    FUCOMP          void
+;    FCOM2           void
+;    FCOMP3          void
+;    FCOMP5          void
+
+  ; FLD, FST, FSTP, FSTP1, FSTP8, FSTP9
+
+    FLD             void
+    FST             void
+    FSTP            void
+;    FSTP1           void
+;    FSTP8           void
+;    FSTP9           void
+
+  ; FXCH, FXCH4, FXCH7, FFREE, FFREEP
+
+    FXCH            void
+;    FXCH4           void
+;    FXCH7           void
+    FFREE           void
+    FFREEP          void
+
+; no operands instead of two operands:
+
+  ; FADD(P), FMUL(P), FSUBR(P), FSUB(P), FDIVR(P), FDIV(P)
+
+    FADD            void
+    FADDP           void
+    FMUL            void
+    FMULP           void
+    FSUBR           void
+    FSUBRP          void
+    FSUB            void
+    FSUBP           void
+    FDIVR           void
+    FDIVRP          void
+    FDIV            void
+    FDIVP           void
+
+; one operand instead of two operands:
+
+  ; FADD, FMUL, FSUB, FSUBR, FDIV, FDIVR
+
+    FADD            reg_fpu
+    FMUL            reg_fpu
+    FSUB            reg_fpu
+    FSUBR           reg_fpu
+    FDIV            reg_fpu
+    FDIVR           reg_fpu
+
+  ; FADD, FMUL, FSUBR, FSUB, FDIVR, FDIV (with TO qualifier)
+
+    FADD            to reg_fpu
+    FMUL            to reg_fpu
+    FSUBR           to reg_fpu
+    FSUB            to reg_fpu
+    FDIVR           to reg_fpu
+    FDIV            to reg_fpu
+
+  ; FADDP, FMULP, FSUBRP, FSUBP, FDIVRP, FDIVP
+
+    FADDP           reg_fpu
+    FMULP           reg_fpu
+    FSUBRP          reg_fpu
+    FSUBP           reg_fpu
+    FDIVRP          reg_fpu
+    FDIVP           reg_fpu
+
+  ; FCMOV(N)B, FCMOV(N)E, FCMOV(N)BE, FCMOV(N)U, and F(U)COMI(P)
+
+    FCMOVB          reg_fpu
+    FCMOVNB         reg_fpu
+    FCMOVE          reg_fpu
+    FCMOVNE         reg_fpu
+    FCMOVBE         reg_fpu
+    FCMOVNBE        reg_fpu
+    FCMOVU          reg_fpu
+    FCMOVNU         reg_fpu
+    FCOMI           reg_fpu
+    FCOMIP          reg_fpu
+    FUCOMI          reg_fpu
+    FUCOMIP         reg_fpu
+
+; two operands instead of one operand:
+
+  ; these don't really exist, and thus are _NOT_ supported:
+
+;   FCOM            reg_fpu,reg_fpu0
+;   FCOM            reg_fpu0,reg_fpu
+;   FUCOM           reg_fpu,reg_fpu0
+;   FUCOM           reg_fpu0,reg_fpu
+;   FCOMP           reg_fpu,reg_fpu0
+;   FCOMP           reg_fpu0,reg_fpu
+;   FUCOMP          reg_fpu,reg_fpu0
+;   FUCOMP          reg_fpu0,reg_fpu
+
+;   FCOM2           reg_fpu,reg_fpu0
+;   FCOM2           reg_fpu0,reg_fpu
+;   FCOMP3          reg_fpu,reg_fpu0
+;   FCOMP3          reg_fpu0,reg_fpu
+;   FCOMP5          reg_fpu,reg_fpu0
+;   FCOMP5          reg_fpu0,reg_fpu
+
+;   FXCH            reg_fpu,reg_fpu0
+;   FXCH            reg_fpu0,reg_fpu
+;   FXCH4           reg_fpu,reg_fpu0
+;   FXCH4           reg_fpu0,reg_fpu
+;   FXCH7           reg_fpu,reg_fpu0
+;   FXCH7           reg_fpu0,reg_fpu
+
+; EOF

_service:tar_scm:nasm-2.16.03.tar.xz/test/fred.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/fwdopt.asm Added

@@ -0,0 +1,133 @@
+;Testname=test; Arguments=-fbin -ofwdopt.bin; Files=stdout stderr fwdopt.bin
+n0:	jmp n1
+n1:	jmp n2
+n2:	jmp n3
+n3:	jmp n4
+n4:	jmp n5
+n5:	jmp n6
+n6:	jmp n7
+n7:	jmp n8
+n8:	jmp n9
+n9:	jmp n10
+n10:	jmp n11
+n11:	jmp n12
+n12:	jmp n13
+n13:	jmp n14
+n14:	jmp n15
+n15:	jmp n16
+n16:	jmp n17
+n17:	jmp n18
+n18:	jmp n19
+n19:	jmp n20
+n20:	jmp n21
+n21:	jmp n22
+n22:	jmp n23
+n23:	jmp n24
+n24:	jmp n25
+n25:	jmp n26
+n26:	jmp n27
+n27:	jmp n28
+n28:	jmp n29
+n29:	jmp n30
+n30:	jmp n31
+n31:	jmp n32
+n32:	jmp n33
+n33:	jmp n34
+n34:	jmp n35
+n35:	jmp n36
+n36:	jmp n37
+n37:	jmp n38
+n38:	jmp n39
+n39:	jmp n40
+n40:	jmp n41
+n41:	jmp n42
+n42:	jmp n43
+n43:	jmp n44
+n44:	jmp n45
+n45:	jmp n46
+n46:	jmp n47
+n47:	jmp n48
+n48:	jmp n49
+n49:	jmp n50
+n50:	jmp n51
+n51:	jmp n52
+n52:	jmp n53
+n53:	jmp n54
+n54:	jmp n55
+n55:	jmp n56
+n56:	jmp n57
+n57:	jmp n58
+n58:	jmp n59
+n59:	jmp n60
+n60:	jmp n61
+n61:	jmp n62
+n62:	jmp n63
+n63:	jmp n64
+n64:	jmp n65
+n65:	jmp n66
+n66:	jmp n67
+n67:	jmp n68
+n68:	jmp n69
+n69:	jmp n70
+n70:	jmp n71
+n71:	jmp n72
+n72:	jmp n73
+n73:	jmp n74
+n74:	jmp n75
+n75:	jmp n76
+n76:	jmp n77
+n77:	jmp n78
+n78:	jmp n79
+n79:	jmp n80
+n80:	jmp n81
+n81:	jmp n82
+n82:	jmp n83
+n83:	jmp n84
+n84:	jmp n85
+n85:	jmp n86
+n86:	jmp n87
+n87:	jmp n88
+n88:	jmp n89
+n89:	jmp n90
+n90:	jmp n91
+n91:	jmp n92
+n92:	jmp n93
+n93:	jmp n94
+n94:	jmp n95
+n95:	jmp n96
+n96:	jmp n97
+n97:	jmp n98
+n98:	jmp n99
+n99:	jmp n100
+n100:	jmp n101
+n101:	jmp n102
+n102:	jmp n103
+n103:	jmp n104
+n104:	jmp n105
+n105:	jmp n106
+n106:	jmp n107
+n107:	jmp n108
+n108:	jmp n109
+n109:	jmp n110
+n110:	jmp n111
+n111:	jmp n112
+n112:	jmp n113
+n113:	jmp n114
+n114:	jmp n115
+n115:	jmp n116
+n116:	jmp n117
+n117:	jmp n118
+n118:	jmp n119
+n119:	jmp n120
+n120:	jmp n121
+n121:	jmp n122
+n122:	jmp n123
+n123:	jmp n124
+n124:	jmp n125
+n125:	jmp n126
+n126:	jmp n127
+n127:	jmp n0
+
+	;;  This should emit exactly 3 NOP bytes
+	times 260-($-$$) nop
+	hlt

_service:tar_scm:nasm-2.16.03.tar.xz/test/fwdoptpp.asm Added

@@ -0,0 +1,150 @@
+;Testname=error; Arguments=-fbin -DERROR -ofwdoptpp.bin; Files=stdout stderr fwdoptpp.bin
+;Testname=fatal; Arguments=-fbin -DFATAL -ofwdoptpp.bin; Files=stdout stderr fwdoptpp.bin
+;Testname=warning; Arguments=-fbin -DWARNING -ofwdoptpp.bin; Files=stdout stderr fwdoptpp.bin
+
+%ifndef ERROR
+  %ifndef FATAL
+    %ifndef WARNING
+      %define ERROR 1
+    %endif
+  %endif
+%endif
+	
+n0:	jmp n1
+n1:	jmp n2
+n2:	jmp n3
+n3:	jmp n4
+n4:	jmp n5
+n5:	jmp n6
+n6:	jmp n7
+n7:	jmp n8
+n8:	jmp n9
+n9:	jmp n10
+n10:	jmp n11
+n11:	jmp n12
+n12:	jmp n13
+n13:	jmp n14
+n14:	jmp n15
+n15:	jmp n16
+n16:	jmp n17
+n17:	jmp n18
+n18:	jmp n19
+n19:	jmp n20
+n20:	jmp n21
+n21:	jmp n22
+n22:	jmp n23
+n23:	jmp n24
+n24:	jmp n25
+n25:	jmp n26
+n26:	jmp n27
+n27:	jmp n28
+n28:	jmp n29
+n29:	jmp n30
+n30:	jmp n31
+n31:	jmp n32
+n32:	jmp n33
+n33:	jmp n34
+n34:	jmp n35
+n35:	jmp n36
+n36:	jmp n37
+n37:	jmp n38
+n38:	jmp n39
+n39:	jmp n40
+n40:	jmp n41
+n41:	jmp n42
+n42:	jmp n43
+n43:	jmp n44
+n44:	jmp n45
+n45:	jmp n46
+n46:	jmp n47
+n47:	jmp n48
+n48:	jmp n49
+n49:	jmp n50
+n50:	jmp n51
+n51:	jmp n52
+n52:	jmp n53
+n53:	jmp n54
+n54:	jmp n55
+n55:	jmp n56
+n56:	jmp n57
+n57:	jmp n58
+n58:	jmp n59
+n59:	jmp n60
+n60:	jmp n61
+n61:	jmp n62
+n62:	jmp n63
+n63:	jmp n64
+n64:	jmp n65
+n65:	jmp n66
+n66:	jmp n67
+n67:	jmp n68
+n68:	jmp n69
+n69:	jmp n70
+n70:	jmp n71
+n71:	jmp n72
+n72:	jmp n73
+n73:	jmp n74
+n74:	jmp n75
+n75:	jmp n76
+n76:	jmp n77
+n77:	jmp n78
+n78:	jmp n79
+n79:	jmp n80
+n80:	jmp n81
+n81:	jmp n82
+n82:	jmp n83
+n83:	jmp n84
+n84:	jmp n85
+n85:	jmp n86
+n86:	jmp n87
+n87:	jmp n88
+n88:	jmp n89
+n89:	jmp n90
+n90:	jmp n91
+n91:	jmp n92
+n92:	jmp n93
+n93:	jmp n94
+n94:	jmp n95
+n95:	jmp n96
+n96:	jmp n97
+n97:	jmp n98
+n98:	jmp n99
+n99:	jmp n100
+n100:	jmp n101
+n101:	jmp n102
+n102:	jmp n103
+n103:	jmp n104
+n104:	jmp n105
+n105:	jmp n106
+n106:	jmp n107
+n107:	jmp n108
+n108:	jmp n109
+n109:	jmp n110
+n110:	jmp n111
+n111:	jmp n112
+n112:	jmp n113
+n113:	jmp n114
+n114:	jmp n115
+n115:	jmp n116
+n116:	jmp n117
+n117:	jmp n118
+n118:	jmp n119
+n119:	jmp n120
+n120:	jmp n121
+n121:	jmp n122
+n122:	jmp n123
+n123:	jmp n124
+n124:	jmp n125
+n125:	jmp n126
+n126:	jmp n127
+n127:	jmp n0
+	
+%if ($-$$) > 257
+  %ifdef FATAL
+    %fatal "Out of space!"
+  %elifdef ERROR
+    %error "Out of space!"
+  %elifdef WARNING
+    %warning "Out of space!"
+  %endif
+%endif

_service:tar_scm:nasm-2.16.03.tar.xz/test/gas2nasm.py Added

@@ -0,0 +1,104 @@
+#!/usr/bin/env python -tt
+# -*- python -*-
+# Convert gas testsuite file to NASM test asm file
+# usage >
+# python gas2nasm.py -i input_gas_file -o output_nasm_file -b bits
+# e.g. python gas2nasm.py -i x86-64-avx512f-intel.d -o avx512f.asm -b 64
+
+import sys
+import os
+import optparse
+import re
+
+def setup():
+    parser = optparse.OptionParser()
+    parser.add_option('-i', dest='input', action='store',
+            default="",
+            help='Name for input gas testsuite file.')
+    parser.add_option('-o', dest='output', action='store',
+            default="",
+            help='Name for output NASM test asm file.')
+    parser.add_option('-b', dest='bits', action='store',
+            default="",
+            help='Bits for output ASM file.')
+    parser.add_option('-r', dest='raw_output', action='store',
+            default="",
+            help='Name for raw output bytes in text')
+    (options, args) =  parser.parse_args()
+    return options
+
+def read(options):
+    with open(options.input, 'rb') as f:
+        recs = 
+        for line in f:
+            if line0 == '':
+                d = 
+                strr = line16:.partition('   ')
+                if strr1 == '':
+                    strr = line16:.partition('\t')
+                l = strr0.strip()
+                r = strr2.strip()
+                d.append(l)
+                d.append(r)
+                recs.append(d)
+    return recs
+
+def commas(recs):
+    replace_tbl = {' PTR':'', '\\':'', 'MM':'', 'XWORD':'OWORD'}
+    reccommas = 
+    for insn in recs:
+        new = 
+        byte = '0x' + insn0.replace(' ', ', 0x')
+        for rep in replace_tbl.keys():
+            insn1 = insn1.replace(rep, replace_tblrep)
+        mnemonic = insn1
+
+        # gas size specifier for gather and scatter insturctions seems wrong. just remove them.
+        if 'gather' in insn1 or 'scatter' in insn1:
+            mnemonic = mnemonic.replace('ZWORD', '')
+
+        new.append(byte)
+        new.append(mnemonic)
+        reccommas.append(new)
+    return reccommas
+
+# The spaces reserved here can be adjusted according to the output string length.
+# maxlen printed out at the end of the process will give a hint for it.
+outstrfmt = "testcase\t{ %-70s }, { %-60s }\n"
+
+macro = "%macro testcase 2\n %ifdef BIN\n  db %1\n %endif\n %ifdef SRC\n  %2\n %endif\n%endmacro\n\n\n"
+
+def write(data, options):
+    if options.output:
+        with open(options.output, 'wb') as out:
+            out.write(macro)
+            if options.bits:
+                out.write('bits ' + options.bits + '\n\n')
+            for insn in data:
+                outstr = outstrfmt % tuple(insn)
+                out.write(outstr)
+
+def write_rawbytes(data, options):
+    if options.raw_output:
+        with open(options.raw_output, 'wb') as out:
+            for insn in data:
+                out.write(insn0 + '\n')
+
+if __name__ == "__main__":
+    options = setup()
+    recs = read(options)
+
+    write_rawbytes(recs, options)
+
+    recs = commas(recs)
+
+    write(recs, options)
+
+    maxlen = 0,0,0,0,0,0,0,0
+    for insn in recs:
+#print insn0 + '\t<-\t' + insn1
+        print outstrfmt:-1 % tuple(insn)
+        for i, strstr in enumerate(insn):
+            if maxleni < len(strstr): maxleni = len(strstr)
+
+    print maxlen

_service:tar_scm:nasm-2.16.03.tar.xz/test/gather.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/gotoff64.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/gsmacro.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/hexfp.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/hle.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/ifdef.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/ifelse.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/ifenv.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/ifmacro.asm Added

@@ -0,0 +1,413 @@
+;Testname=test; Arguments=-fbin -oifmacro.txt; Files=stdout stderr ifmacro.txt
+
+;
+; ifmacro.asm
+;
+; Test of the new ifmacro directive
+;
+; This file produces a human-readable text file when compiled
+; with -f bin
+;
+
+%define LF 10
+
+%macro dummy 2
+	db 'This is a dummy macro, '
+	db 'arg1 = ', %1, ', '
+	db 'arg2 = ', %2, LF
+%endmacro
+
+	dummy 'this', 'that'
+
+%ifdef CR
+	db '%ifdef CR', LF
+%endif
+
+%ifdef LF
+	db '%ifdef LF', LF
+%endif
+
+%ifmacro dummy 1
+	db '%ifmacro dummy 1', LF
+%endif
+
+%ifmacro dummy 2
+	db '%ifmacro dummy 2', LF
+%endif
+
+%ifmacro dummy 3
+	db '%ifmacro dummy 3', LF
+%endif
+
+%ifmacro dummy 1+
+	db '%ifmacro dummy 1+', LF
+%endif
+
+%ifmacro dummy 2+
+	db '%ifmacro dummy 2+', LF
+%endif
+
+%ifmacro dummy 3+
+	db '%ifmacro dummy 3+', LF
+%endif
+
+%ifmacro dummy
+	db '%ifmacro dummy', LF
+%endif
+
+%ifmacro dummy 0-1
+	db '%ifmacro dummy 0-1', LF
+%endif
+
+%ifmacro dummy 1-2
+	db '%ifmacro dummy 1-2', LF
+%endif
+
+%ifmacro dummy 2-3
+	db '%ifmacro dummy 2-3', LF
+%endif
+
+%ifmacro dummy 3-4
+	db '%ifmacro dummy 3-4', LF
+%endif
+
+%ifmacro LF
+	db '%ifmacro LF', LF
+%endif
+
+%ifndef CR
+	db '%ifndef CR', LF
+%endif
+
+%ifndef LF
+	db '%ifndef LF', LF
+%endif
+
+%ifnmacro dummy 1
+	db '%ifnmacro dummy 1', LF
+%endif
+
+%ifnmacro dummy 2
+	db '%ifnmacro dummy 2', LF
+%endif
+
+%ifnmacro dummy 3
+	db '%ifnmacro dummy 3', LF
+%endif
+
+%ifnmacro dummy 1+
+	db '%ifnmacro dummy 1+', LF
+%endif
+
+%ifnmacro dummy 2+
+	db '%ifnmacro dummy 2+', LF
+%endif
+
+%ifnmacro dummy 3+
+	db '%ifnmacro dummy 3+', LF
+%endif
+
+%ifnmacro dummy
+	db '%ifnmacro dummy', LF
+%endif
+
+%ifnmacro dummy 0-1
+	db '%ifnmacro dummy 0-1', LF
+%endif
+
+%ifnmacro dummy 1-2
+	db '%ifnmacro dummy 1-2', LF
+%endif
+
+%ifnmacro dummy 2-3
+	db '%ifnmacro dummy 2-3', LF
+%endif
+
+%ifnmacro dummy 3-4
+	db '%ifnmacro dummy 3-4', LF
+%endif
+
+%ifnmacro LF
+	db '%ifnmacro LF', LF
+%endif
+
+%if 0
+%elifdef CR
+	db '%elifdef CR', CR
+%endif
+
+%if 0
+%elifdef LF
+	db '%elifdef LF', LF
+%endif
+
+%if 0
+%elifmacro dummy 1
+	db '%elifmacro dummy 1', LF
+%endif
+
+%if 0
+%elifmacro dummy 2
+	db '%elifmacro dummy 2', LF
+%endif
+
+%if 0
+%elifmacro dummy 3
+	db '%elifmacro dummy 3', LF
+%endif
+
+%if 0
+%elifmacro dummy 1+
+	db '%elifmacro dummy 1+', LF
+%endif
+
+%if 0
+%elifmacro dummy 2+
+	db '%elifmacro dummy 2+', LF
+%endif
+
+%if 0
+%elifmacro dummy 3+
+	db '%elifmacro dummy 3+', LF
+%endif
+
+%if 0
+%elifmacro dummy
+	db '%elifmacro dummy', LF
+%endif
+
+%if 0
+%elifmacro dummy 0-1
+	db '%elifmacro dummy 0-1', LF
+%endif
+
+%if 0
+%elifmacro dummy 1-2
+	db '%elifmacro dummy 1-2', LF
+%endif
+
+%if 0
+%elifmacro dummy 2-3
+	db '%elifmacro dummy 2-3', LF
+%endif
+
+%if 0
+%elifmacro dummy 3-4
+	db '%elifmacro dummy 3-4', LF
+%endif
+
+%if 0
+%elifmacro LF
+	db '%elifmacro LF', LF
+%endif
+
+%if 0
+%elifndef CR
+	db '%elifndef CR', LF
+%endif
+
+%if 0
+%elifndef LF
+	db '%elifndef LF', LF
+%endif
+
+%if 0
+%elifnmacro dummy 1
+	db '%elifnmacro dummy 1', LF
+%endif
+
+%if 0
+%elifnmacro dummy 2
+	db '%elifnmacro dummy 2', LF
+%endif
+
+%if 0
+%elifnmacro dummy 3
+	db '%elifnmacro dummy 3', LF
+%endif
+
+%if 0
+%elifnmacro dummy 1+
+	db '%elifnmacro dummy 1+', LF
+%endif
+
+%if 0
+%elifnmacro dummy 2+
+	db '%elifnmacro dummy 2+', LF
+%endif
+
+%if 0
+%elifnmacro dummy 3+
+	db '%elifnmacro dummy 3+', LF
+%endif
+
+%if 0
+%elifnmacro dummy
+	db '%elifnmacro dummy', LF
+%endif
+
+%if 0
+%elifnmacro dummy 0-1
+	db '%elifnmacro dummy 0-1', LF
+%endif
+
+%if 0
+%elifnmacro dummy 1-2
+	db '%elifnmacro dummy 1-2', LF
+%endif
+
+%if 0
+%elifnmacro dummy 2-3
+	db '%elifnmacro dummy 2-3', LF
+%endif
+
+%if 0
+%elifnmacro dummy 3-4
+	db '%elifnmacro dummy 3-4', LF
+%endif
+
+%if 0
+%elifnmacro LF
+	db '%elifnmacro LF', LF
+%endif
+
+%if 1
+%elifdef CR
+	db 'bad %elifdef CR', LF
+%endif
+
+%if 1
+%elifdef LF
+	db 'bad %elifdef LF', LF
+%endif
+
+%if 1
+%elifmacro dummy 1
+	db 'bad %elifmacro dummy 1', LF
+%endif
+
+%if 1
+%elifmacro dummy 2
+	db 'bad %elifmacro dummy 2', LF
+%endif
+
+%if 1
+%elifmacro dummy 3
+	db 'bad %elifmacro dummy 3', LF
+%endif
+
+%if 1
+%elifmacro dummy 1+
+	db 'bad %elifmacro dummy 1+', LF
+%endif
+
+%if 1
+%elifmacro dummy 2+
+	db 'bad %elifmacro dummy 2+', LF
+%endif
+
+%if 1
+%elifmacro dummy 3+
+	db 'bad %elifmacro dummy 3+', LF
+%endif
+
+%if 1
+%elifmacro dummy
+	db 'bad %elifmacro dummy', LF
+%endif
+
+%if 1
+%elifmacro dummy 0-1
+	db 'bad %elifmacro dummy 0-1', LF
+%endif
+
+%if 1
+%elifmacro dummy 1-2
+	db 'bad %elifmacro dummy 1-2', LF
+%endif
+
+%if 1
+%elifmacro dummy 2-3
+	db 'bad %elifmacro dummy 2-3', LF
+%endif
+
+%if 1
+%elifmacro dummy 3-4
+	db 'bad %elifmacro dummy 3-4', LF
+%endif
+
+%if 1
+%elifmacro LF
+	db 'bad %elifmacro LF', LF
+%endif
+
+%if 1
+%elifndef CR
+	db 'bad %elifndef CR', LF
+%endif
+
+%if 1
+%elifndef LF
+	db 'bad %elifndef LF', LF
+%endif
+
+%if 1
+%elifnmacro dummy 1
+	db 'bad %elifnmacro dummy 1', LF
+%endif
+
+%if 1
+%elifnmacro dummy 2
+	db 'bad %elifnmacro dummy 2', LF
+%endif
+
+%if 1
+%elifnmacro dummy 3
+	db 'bad %elifnmacro dummy 3', LF
+%endif
+
+%if 1
+%elifnmacro dummy 1+
+	db 'bad %elifnmacro dummy 1+', LF
+%endif
+
+%if 1
+%elifnmacro dummy 2+
+	db 'bad %elifnmacro dummy 2+', LF
+%endif
+
+%if 1
+%elifnmacro dummy 3+
+	db 'bad %elifnmacro dummy 3+', LF
+%endif
+
+%if 1
+%elifnmacro dummy
+	db 'bad %elifnmacro dummy', LF
+%endif
+
+%if 1
+%elifnmacro dummy 0-1
+	db 'bad %elifnmacro dummy 0-1', LF
+%endif
+
+%if 1
+%elifnmacro dummy 1-2
+	db 'bad %elifnmacro dummy 1-2', LF
+%endif
+
+%if 1
+%elifnmacro dummy 2-3
+	db 'bad %elifnmacro dummy 2-3', LF
+%endif
+
+%if 1
+%elifnmacro dummy 3-4
+	db 'bad %elifnmacro dummy 3-4', LF
+%endif
+
+%if 1
+%elifnmacro LF
+	db 'bad %elifnmacro LF', LF
+%endif
+

_service:tar_scm:nasm-2.16.03.tar.xz/test/iftoken.asm Added

@@ -0,0 +1,317 @@
+;Testname=test; Arguments=-fbin -oiftoken.txt; Files=stdout stderr iftoken.txt
+
+%define ZMACRO
+%define NMACRO 1
+%define TMACRO 1 2
+	db 'N "":'
+%iftoken 
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty 
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "":'
+%iftoken  ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty  ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'N "ZMACRO":'
+%iftoken ZMACRO
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty ZMACRO
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "ZMACRO":'
+%iftoken ZMACRO ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty ZMACRO ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'N "NMACRO":'
+%iftoken NMACRO
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty NMACRO
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "NMACRO":'
+%iftoken NMACRO ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty NMACRO ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'N "TMACRO":'
+%iftoken TMACRO
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty TMACRO
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "TMACRO":'
+%iftoken TMACRO ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty TMACRO ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'N "1":'
+%iftoken 1
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty 1
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "1":'
+%iftoken 1 ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty 1 ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'N "+1":'
+%iftoken +1
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty +1
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "+1":'
+%iftoken +1 ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty +1 ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'N "1 2":'
+%iftoken 1 2
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty 1 2
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "1 2":'
+%iftoken 1 2 ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty 1 2 ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'N "1,2":'
+%iftoken 1,2
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty 1,2
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "1,2":'
+%iftoken 1,2 ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty 1,2 ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'N "foo":'
+%iftoken foo
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty foo
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "foo":'
+%iftoken foo ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty foo ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'N "foo bar":'
+%iftoken foo bar
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty foo bar
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "foo bar":'
+%iftoken foo bar ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty foo bar ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'N "%":'
+%iftoken %
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty %
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "%":'
+%iftoken % ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty % ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'N "+foo":'
+%iftoken +foo
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty +foo
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "+foo":'
+%iftoken +foo ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty +foo ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'N "<<":'
+%iftoken <<
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty <<
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "<<":'
+%iftoken << ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty << ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10

_service:tar_scm:nasm-2.16.03.tar.xz/test/iftoken.pl Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/ilog2.asm Added

@@ -0,0 +1,271 @@
+%use ifunc
+
+	db ilog2(0x1)
+	db ilog2(0x2)
+	db ilog2(0x4)
+	db ilog2(0x8)
+	db ilog2(0x10)
+	db ilog2(0x20)
+	db ilog2(0x40)
+	db ilog2(0x80)
+	db ilog2(0x100)
+	db ilog2(0x200)
+	db ilog2(0x400)
+	db ilog2(0x800)
+	db ilog2(0x1000)
+	db ilog2(0x2000)
+	db ilog2(0x4000)
+	db ilog2(0x8000)
+	db ilog2(0x10000)
+	db ilog2(0x20000)
+	db ilog2(0x40000)
+	db ilog2(0x80000)
+	db ilog2(0x100000)
+	db ilog2(0x200000)
+	db ilog2(0x400000)
+	db ilog2(0x800000)
+	db ilog2(0x1000000)
+	db ilog2(0x2000000)
+	db ilog2(0x4000000)
+	db ilog2(0x8000000)
+	db ilog2(0x10000000)
+	db ilog2(0x20000000)
+	db ilog2(0x40000000)
+	db ilog2(0x80000000)
+
+	db ilog2w(0x1)
+	db ilog2w(0x2)
+	db ilog2w(0x4)
+	db ilog2w(0x8)
+	db ilog2w(0x10)
+	db ilog2w(0x20)
+	db ilog2w(0x40)
+	db ilog2w(0x80)
+	db ilog2w(0x100)
+	db ilog2w(0x200)
+	db ilog2w(0x400)
+	db ilog2w(0x800)
+	db ilog2w(0x1000)
+	db ilog2w(0x2000)
+	db ilog2w(0x4000)
+	db ilog2w(0x8000)
+	db ilog2w(0x10000)
+	db ilog2w(0x20000)
+	db ilog2w(0x40000)
+	db ilog2w(0x80000)
+	db ilog2w(0x100000)
+	db ilog2w(0x200000)
+	db ilog2w(0x400000)
+	db ilog2w(0x800000)
+	db ilog2w(0x1000000)
+	db ilog2w(0x2000000)
+	db ilog2w(0x4000000)
+	db ilog2w(0x8000000)
+	db ilog2w(0x10000000)
+	db ilog2w(0x20000000)
+	db ilog2w(0x40000000)
+	db ilog2w(0x80000000)
+
+	db ilog2f(0x1)
+	db ilog2f(0x2)
+	db ilog2f(0x4)
+	db ilog2f(0x8)
+	db ilog2f(0x10)
+	db ilog2f(0x20)
+	db ilog2f(0x40)
+	db ilog2f(0x80)
+	db ilog2f(0x100)
+	db ilog2f(0x200)
+	db ilog2f(0x400)
+	db ilog2f(0x800)
+	db ilog2f(0x1000)
+	db ilog2f(0x2000)
+	db ilog2f(0x4000)
+	db ilog2f(0x8000)
+	db ilog2f(0x10000)
+	db ilog2f(0x20000)
+	db ilog2f(0x40000)
+	db ilog2f(0x80000)
+	db ilog2f(0x100000)
+	db ilog2f(0x200000)
+	db ilog2f(0x400000)
+	db ilog2f(0x800000)
+	db ilog2f(0x1000000)
+	db ilog2f(0x2000000)
+	db ilog2f(0x4000000)
+	db ilog2f(0x8000000)
+	db ilog2f(0x10000000)
+	db ilog2f(0x20000000)
+	db ilog2f(0x40000000)
+	db ilog2f(0x80000000)
+
+	db ilog2c(0x1)
+	db ilog2c(0x2)
+	db ilog2c(0x4)
+	db ilog2c(0x8)
+	db ilog2c(0x10)
+	db ilog2c(0x20)
+	db ilog2c(0x40)
+	db ilog2c(0x80)
+	db ilog2c(0x100)
+	db ilog2c(0x200)
+	db ilog2c(0x400)
+	db ilog2c(0x800)
+	db ilog2c(0x1000)
+	db ilog2c(0x2000)
+	db ilog2c(0x4000)
+	db ilog2c(0x8000)
+	db ilog2c(0x10000)
+	db ilog2c(0x20000)
+	db ilog2c(0x40000)
+	db ilog2c(0x80000)
+	db ilog2c(0x100000)
+	db ilog2c(0x200000)
+	db ilog2c(0x400000)
+	db ilog2c(0x800000)
+	db ilog2c(0x1000000)
+	db ilog2c(0x2000000)
+	db ilog2c(0x4000000)
+	db ilog2c(0x8000000)
+	db ilog2c(0x10000000)
+	db ilog2c(0x20000000)
+	db ilog2c(0x40000000)
+	db ilog2c(0x80000000)
+
+%ifdef ERROR
+	db ilog2(0x0)
+	db ilog2(0x3)
+	db ilog2(0x5)
+	db ilog2(0x9)
+	db ilog2(0x10)
+	db ilog2(0x30)
+	db ilog2(0x50)
+	db ilog2(0x90)
+	db ilog2(0x100)
+	db ilog2(0x300)
+	db ilog2(0x500)
+	db ilog2(0x900)
+	db ilog2(0x1000)
+	db ilog2(0x3000)
+	db ilog2(0x5000)
+	db ilog2(0x9000)
+	db ilog2(0x10000)
+	db ilog2(0x30000)
+	db ilog2(0x50000)
+	db ilog2(0x90000)
+	db ilog2(0x100000)
+	db ilog2(0x300000)
+	db ilog2(0x500000)
+	db ilog2(0x900000)
+	db ilog2(0x1000000)
+	db ilog2(0x3000000)
+	db ilog2(0x5000000)
+	db ilog2(0x9000000)
+	db ilog2(0x10000000)
+	db ilog2(0x30000000)
+	db ilog2(0x50000000)
+	db ilog2(0x90000000)
+%endif
+
+%ifdef WARNING
+	db ilog2w(0x0)
+	db ilog2w(0x3)
+	db ilog2w(0x5)
+	db ilog2w(0x9)
+	db ilog2w(0x10)
+	db ilog2w(0x30)
+	db ilog2w(0x50)
+	db ilog2w(0x90)
+	db ilog2w(0x100)
+	db ilog2w(0x300)
+	db ilog2w(0x500)
+	db ilog2w(0x900)
+	db ilog2w(0x1000)
+	db ilog2w(0x3000)
+	db ilog2w(0x5000)
+	db ilog2w(0x9000)
+	db ilog2w(0x10000)
+	db ilog2w(0x30000)
+	db ilog2w(0x50000)
+	db ilog2w(0x90000)
+	db ilog2w(0x100000)
+	db ilog2w(0x300000)
+	db ilog2w(0x500000)
+	db ilog2w(0x900000)
+	db ilog2w(0x1000000)
+	db ilog2w(0x3000000)
+	db ilog2w(0x5000000)
+	db ilog2w(0x9000000)
+	db ilog2w(0x10000000)
+	db ilog2w(0x30000000)
+	db ilog2w(0x50000000)
+	db ilog2w(0x90000000)
+%endif
+
+	db ilog2f(0x0)
+	db ilog2f(0x1)
+	db ilog2f(0x3)
+	db ilog2f(0x5)
+	db ilog2f(0x9)
+	db ilog2f(0x10)
+	db ilog2f(0x30)
+	db ilog2f(0x50)
+	db ilog2f(0x90)
+	db ilog2f(0x100)
+	db ilog2f(0x300)
+	db ilog2f(0x500)
+	db ilog2f(0x900)
+	db ilog2f(0x1000)
+	db ilog2f(0x3000)
+	db ilog2f(0x5000)
+	db ilog2f(0x9000)
+	db ilog2f(0x10000)
+	db ilog2f(0x30000)
+	db ilog2f(0x50000)
+	db ilog2f(0x90000)
+	db ilog2f(0x100000)
+	db ilog2f(0x300000)
+	db ilog2f(0x500000)
+	db ilog2f(0x900000)
+	db ilog2f(0x1000000)
+	db ilog2f(0x3000000)
+	db ilog2f(0x5000000)
+	db ilog2f(0x9000000)
+	db ilog2f(0x10000000)
+	db ilog2f(0x30000000)
+	db ilog2f(0x50000000)
+	db ilog2f(0x90000000)
+
+	db ilog2c(0x0)
+	db ilog2c(0x1)
+	db ilog2c(0x3)
+	db ilog2c(0x5)
+	db ilog2c(0x9)
+	db ilog2c(0x10)
+	db ilog2c(0x30)
+	db ilog2c(0x50)
+	db ilog2c(0x90)
+	db ilog2c(0x100)
+	db ilog2c(0x300)
+	db ilog2c(0x500)
+	db ilog2c(0x900)
+	db ilog2c(0x1000)
+	db ilog2c(0x3000)
+	db ilog2c(0x5000)
+	db ilog2c(0x9000)
+	db ilog2c(0x10000)
+	db ilog2c(0x30000)
+	db ilog2c(0x50000)
+	db ilog2c(0x90000)
+	db ilog2c(0x100000)
+	db ilog2c(0x300000)
+	db ilog2c(0x500000)
+	db ilog2c(0x900000)
+	db ilog2c(0x1000000)
+	db ilog2c(0x3000000)
+	db ilog2c(0x5000000)
+	db ilog2c(0x9000000)
+	db ilog2c(0x10000000)
+	db ilog2c(0x30000000)
+	db ilog2c(0x50000000)
+	db ilog2c(0x90000000)

_service:tar_scm:nasm-2.16.03.tar.xz/test/imacro.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/imm.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/imm64.asm Added

@@ -0,0 +1,61 @@
+;Testname=imm64-O0; Arguments=-O0 -fbin -oimm64.bin; Files=stdout stderr imm64.bin
+;Testname=imm64-O1; Arguments=-O1 -fbin -oimm64.bin; Files=stdout stderr imm64.bin
+;Testname=imm64-Ox; Arguments=-Ox -fbin -oimm64.bin; Files=stdout stderr imm64.bin
+
+	bits 64
+	mov rax,11223344h
+	mov rax,dword 11223344h
+	mov eax,11223344h
+	mov rax,dword 11223344h		; 32-bit operation
+	mov qword rax,11223344h
+	mov qword rax,dword 11223344h
+
+	mov rax,0_ffffffff_8899aabbh
+	mov rax,dword 0_ffffffff_8899aabbh
+	mov eax,0_ffffffff_8899aabbh
+	mov rax,dword 0_ffffffff_8899aabbh	; 32-bit operation
+	mov qword rax,0_ffffffff_8899aabbh
+	mov qword rax,dword 0_ffffffff_8899aabbh
+
+	mov rax,7fffffffh
+	mov rax,80000000h
+	mov rax,0_ffffffffh
+	mov rax,1_00000000h
+	mov rax,0_ffffffff_7fffffffh
+	mov rax,0_ffffffff_80000000h
+
+	mov rax,0_11223344_8899aabbh
+	mov rax,dword 0_11223344_8899aabbh
+	mov eax,0_11223344_8899aabbh
+	mov rax,dword 0_11223344_8899aabbh	; 32-bit operation
+	mov qword rax,0_11223344_8899aabbh
+	mov qword rax,dword 0_11223344_8899aabbh
+	
+	mov rax,strict 11223344h
+	mov rax,strict dword 11223344h
+	mov eax,strict 11223344h
+	mov rax,strict dword 11223344h		; 32-bit operation
+	mov qword rax,strict 11223344h
+	mov qword rax,strict dword 11223344h
+
+	mov rax,strict 0_ffffffff_8899aabbh
+	mov rax,strict dword 0_ffffffff_8899aabbh
+	mov eax,strict 0_ffffffff_8899aabbh
+	mov rax,strict dword 0_ffffffff_8899aabbh	; 32-bit operation
+	mov qword rax,strict 0_ffffffff_8899aabbh
+	mov qword rax,strict dword 0_ffffffff_8899aabbh
+
+	mov rax,strict 7fffffffh
+	mov rax,strict 80000000h
+	mov rax,strict 0_ffffffffh
+	mov rax,strict 1_00000000h
+	mov rax,strict 0_ffffffff_7fffffffh
+	mov rax,strict 0_ffffffff_80000000h
+
+	mov rax,strict 0_11223344_8899aabbh
+	mov rax,strict dword 0_11223344_8899aabbh
+	mov eax,strict 0_11223344_8899aabbh
+	mov rax,strict dword 0_11223344_8899aabbh	; 32-bit operation
+	mov qword rax,strict 0_11223344_8899aabbh
+	mov qword rax,strict dword 0_11223344_8899aabbh
+

_service:tar_scm:nasm-2.16.03.tar.xz/test/immsize.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/immwarn.asm Added

@@ -0,0 +1,91 @@
+;Testname=onowarn; Arguments=-Ox -DOPT=1 -DWARN=0 -fbin -oimmwarn.bin; Files=stdout stderr immwarn.bin
+;Testname=owarn; Arguments=-Ox -DOPT=1 -DWARN=1 -fbin -oimmwarn.bin; Files=stdout stderr immwarn.bin
+;Testname=nowarn; Arguments=-O0 -DOPT=0 -DWARN=0 -fbin -oimmwarn.bin; Files=stdout stderr immwarn.bin
+;Testname=warn; Arguments=-O0 -DOPT=1 -DWARN=1 -fbin -oimmwarn.bin; Files=stdout stderr immwarn.bin
+
+%ifndef WARN
+  %define WARN 1
+%endif
+
+	bits 16
+	push 1
+%if WARN
+	push 0ffffffffh
+%endif
+	push -1
+	push 0ffffh
+	push byte 0FFFFh
+
+	add ax,0FFFFh
+%if WARN
+	add ax,0FFFFFFFFh
+%endif
+	add ax,-1
+	add ax,byte 0FFFFh
+%if WARN
+	add ax,byte 0FFFFFFFFh
+%endif
+	add ax,-1
+
+	add cx,0FFFFh
+%if WARN
+	add cx,0FFFFFFFFh
+%endif
+	add cx,-1
+	add cx,byte 0FFFFh
+%if WARN
+	add cx,byte 0FFFFFFFFh
+%endif
+	add cx,-1
+
+	bits 32
+	push 1
+	push 0ffffffffh
+	push -1
+	push 0ffffh
+
+	push byte 1
+%if WARN
+	push byte 0ffffh
+%endif
+	push byte -1
+
+	push word 1
+	push word 0ffffh
+	push word -1
+
+	push dword 1
+	push dword 0ffffffffh
+	push dword -1
+
+	add eax,0FFFFh
+	add eax,0FFFFFFFFh
+	add eax,-1
+
+	add ecx,0FFFFh
+	add ecx,0FFFFFFFFh
+	add ecx,-1
+
+	bits 64
+	mov eax,7fffffffh
+	mov eax,80000000h
+	mov rax,7fffffffh
+	mov rax,80000000h
+%if WARN
+	mov rax,dword 80000000h
+%endif
+	add rcx,0FFFFh
+%if WARN
+	add rcx,0FFFFFFFFh
+%endif
+	add rcx,-1
+
+	add ecx,0FFFFh
+	add ecx,0FFFFFFFFh
+	add ecx,-1
+
+	push byte 1
+%if WARN
+	push byte 0ffffffffh
+%endif
+	push byte -1

_service:tar_scm:nasm-2.16.03.tar.xz/test/imul.asm Added

@@ -0,0 +1,117 @@
+;Testname=nowarn; Arguments=-fbin -oimul.bin; Files=stdout stderr imul.bin
+;Testname=warn; Arguments=-DWARN -fbin -oimul.bin; Files=stdout stderr imul.bin
+
+%macro test 1-3 5 -2
+	bits %1
+
+%undef MEM
+%if %1 == 16
+  %define MEM di
+%elif %1 == 32
+  %define MEM edi
+%elif %1 == 64
+  %define MEM rdi
+%endif
+
+	imul al
+	imul byte MEM
+	imul ax
+	imul word MEM
+	imul eax
+	imul dword MEM
+%if %1 == 64
+	imul rdx
+	imul qword MEM
+%endif
+	
+	imul ax,cx
+	imul ax,MEM
+	imul ax,word MEM
+	imul eax,ecx
+	imul eax,MEM
+	imul eax,dword MEM
+%if %1 == 64
+	imul rax,rcx
+	imul rax,MEM
+	imul rax,qword MEM
+%endif
+
+	imul ax,cx,%2
+	imul ax,cx,byte %2
+	imul ax,MEM,%2
+	imul ax,word MEM,%2
+	imul eax,ecx,%2
+	imul eax,ecx,byte %2
+	imul eax,MEM,%2
+	imul eax,dword MEM,%2
+%if %1 == 64
+	imul rax,rcx,%2
+	imul rax,rcx,byte %2
+	imul rax,MEM,%2
+	imul rax,qword MEM,%2
+%endif
+
+	imul ax,%2
+	imul ax,byte %2
+	imul eax,%2
+	imul eax,byte %2
+%if %1 == 64
+	imul rax,%2
+	imul rax,byte %2
+%endif
+
+	imul ax,cx,0x1234
+	imul ax,MEM,0x1234
+	imul ax,word MEM,0x1234
+	imul eax,ecx,0x12345678
+	imul eax,MEM,0x12345678
+	imul eax,dword MEM,0x12345678
+%if %1 == 64
+	imul rax,rcx,0x12345678
+	imul rax,MEM,0x12345678
+	imul rax,qword MEM,0x12345678
+%endif
+
+	imul ax,0x1234
+	imul eax,0x12345678
+%if %1 == 64
+	imul rax,0x12345678
+%endif
+
+	imul ax,cx,0xfffe
+	imul ax,MEM,0xfffe
+	imul ax,word MEM,0xfffe
+	imul ax,cx,0xfe
+	imul ax,MEM,0xfe
+	imul ax,word MEM,0xfe
+	imul eax,ecx,0xfffffffe
+	imul eax,MEM,0xfffffffe
+	imul eax,dword MEM,0xfffffffe
+	imul eax,ecx,0xfffe
+	imul eax,MEM,0xfffe
+	imul eax,dword MEM,0xfffe
+%if %1 == 64
+	imul rax,rcx,%3
+	imul rax,MEM,%3
+	imul rax,qword MEM,%3
+	imul rax,rcx,0xfffe
+	imul rax,MEM,0xfffe
+	imul rax,qword MEM,0xfffe
+%endif
+
+	imul ax,0xfffe
+	imul eax,0xfffffffe
+%if %1 == 64
+	imul rax,%3
+%endif
+%endmacro
+
+	test 16
+	test 32
+	test 64
+
+%ifdef WARN
+	test 16,0x999
+	test 32,0x999999
+	test 64,0x999999999,0xfffffffe
+%endif

_service:tar_scm:nasm-2.16.03.tar.xz/test/inc1.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/inc2.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/incbin.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/incbin.data Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/include-self.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/inctest.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/insertps.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/insnlbl.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/invlpga.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/istruc_local.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/jmp64.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/join.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/k_test.asm Added

@@ -0,0 +1,139 @@
+	bits 64
+	default rel
+
+%use altreg
+
+	section .text
+
+bar	equ 0xcc
+
+	;; Each instruction group separated by blank should encode identially
+
+	;; k_mov kreg size_suffix size_name gpr big_gpr
+%macro k_mov 5
+	kmov%2 %1,foo
+	kmov %1,%3 foo
+	kmov %3 foo,%1
+
+	kmov%2 foo,%1
+	kmov  %3 foo,%1
+	kmov  foo,%3 %1
+	kmov  %3 foo,%1
+
+	kmov%2 %1,%1
+	kmov   %3 %1,%1
+	kmov   %1,%3 %1
+
+	kmov%2 %1,%4
+	kmov%2 %1,%5
+	kmov   %1,%4
+	kmov   %3 %1,%4
+	kmov   %3 %1,%5
+	kmov   %1,%3 %4
+    %ifidni %4,%5
+	kmov   %1,%5
+    %endif
+
+	kmov%2 %5,%1
+    %ifidni %4,%5
+	kmov   %5,%1
+    %endif
+	kmov   %5,%3 %1
+
+%endmacro
+
+;%pragma list options +bempf
+
+	;; k_rr op kreg size_suffix size_name
+%macro k_rr 4
+	%1%3 %2,%2
+	%1  %4 %2,%2
+	%1  %2,%4 %2
+
+%endmacro
+
+	;; k_rri op kreg size_suffix size_name
+%macro k_rrr 4
+	%1%3 %2,%2,%2
+	%1  %4 %2,%2,%2
+	%1  %2,%4 %2,%2
+	%1  %2,%2,%4 %2
+
+%endmacro
+
+	;; k_rri op kreg size_suffix size_name
+%macro k_rri 4
+	%1%3 %2,%2,bar
+	%1  %4 %2,%2,bar
+	%1  %2,%4 %2,bar
+
+%endmacro
+
+%define size_b byte
+%define size_w word
+%define size_d dword
+%define size_q qword
+
+%define gpr_b  b
+%define gpr_w  w
+%define gpr_d  d
+%define gpr_q
+
+%define bgpr_b d
+%define bgpr_w d
+%define bgpr_d d
+%define bgpr_q
+
+	;; k_test size_suffix regno
+%macro k_test 2
+	k_mov k%2,%1,size_%1,%r %+ %2 %+ gpr_%1,%r %+ %2 %+ bgpr_%1
+	k_rrr kadd,k%2,%1,size_%1
+	k_rrr kand,k%2,%1,size_%1
+	k_rrr kandn,k%2,%1,size_%1
+	k_rrr kand,k%2,%1,size_%1
+	k_rr knot,k%2,%1,size_%1
+	k_rrr kor,k%2,%1,size_%1
+	k_rr kortest,k%2,%1,size_%1
+	k_rri kshiftl,k%2,%1,size_%1
+	k_rri kshiftr,k%2,%1,size_%1
+	k_rr ktest,k%2,%1,size_%1
+	k_rrr kxnor,k%2,%1,size_%1
+	k_rrr kxor,k%2,%1,size_%1
+%endmacro
+
+%assign nreg 0
+%define kreg k %+ nreg
+%rep 8
+
+	k_test b,nreg
+	k_test w,nreg
+	k_test d,nreg
+	k_test q,nreg
+
+	kunpckbw kreg,kreg,kreg
+	kunpck   word kreg,kreg,kreg
+	kunpck   kreg,byte kreg,kreg
+	kunpck   kreg,kreg,byte kreg
+	kunpck   word kreg,byte kreg,kreg
+	kunpck   word kreg,kreg,byte kreg
+
+	kunpckwd kreg,kreg,kreg
+	kunpck   dword kreg,kreg,kreg
+	kunpck   kreg,word kreg,kreg
+	kunpck   kreg,kreg,word kreg
+	kunpck   dword kreg,word kreg,kreg
+	kunpck   dword kreg,kreg,word kreg
+
+	kunpckdq kreg,kreg,kreg
+	kunpck   qword kreg,kreg,kreg
+	kunpck   kreg,dword kreg,kreg
+	kunpck   kreg,kreg,dword kreg
+	kunpck   qword kreg,dword kreg,kreg
+	kunpck   qword kreg,kreg,dword kreg
+
+	%assign nreg nreg+1
+%endrep
+
+	section .bss
+
+foo	resq 1

_service:tar_scm:nasm-2.16.03.tar.xz/test/lar_lsl.asm Added

@@ -0,0 +1,124 @@
+;Testname=test; Arguments=-fbin -olar_lsl.bin; Files=stdout stderr lar_lsl.bin
+
+; LAR/LSL
+;---------
+
+; 1x ; = invalid due to lack of REX
+; 3x ; = invalid due to Mw
+
+%macro m 1
+
+  bits 16
+
+	%1  ax, ax
+	%1  ax,eax
+;	%1  ax,rax
+
+	%1 eax, ax
+	%1 eax,eax
+;	%1 eax,rax
+
+;	%1 rax, ax
+;	%1 rax,eax
+;	%1 rax,rax
+
+	%1  ax,      0
+	%1  ax, word 0
+;;;	%1  ax,dword 0
+;	%1  ax,qword 0
+
+	%1 eax,      0
+	%1 eax, word 0
+;;;	%1 eax,dword 0
+;	%1 eax,qword 0
+
+;	%1 rax,      0
+;	%1 rax, word 0
+;	%1 rax,dword 0
+;	%1 rax,qword 0
+
+  bits 32
+
+	%1  ax, ax
+	%1  ax,eax
+;	%1  ax,rax
+
+	%1 eax, ax
+	%1 eax,eax
+;	%1 eax,rax
+
+;	%1 rax, ax
+;	%1 rax,eax
+;	%1 rax,rax
+
+	%1  ax,      0
+	%1  ax, word 0
+;;;	%1  ax,dword 0
+;	%1  ax,qword 0
+
+	%1 eax,      0
+	%1 eax, word 0
+;;;	%1 eax,dword 0
+;	%1 eax,qword 0
+
+;	%1 rax,      0
+;	%1 rax, word 0
+;	%1 rax,dword 0
+;	%1 rax,qword 0
+
+  bits 64
+
+	%1  ax, ax
+	%1  ax,eax
+	%1  ax,rax	; $TODO: shouldn't emit REX.W $
+
+	%1 eax, ax
+	%1 eax,eax
+	%1 eax,rax	; $TODO: shouldn't emit REX.W $
+
+	%1 rax, ax
+	%1 rax,eax
+	%1 rax,rax
+
+	%1  ax,      0
+	%1  ax, word 0
+;;;	%1  ax,dword 0
+;;;	%1  ax,qword 0
+
+	%1 eax,      0
+	%1 eax, word 0
+;;;	%1 eax,dword 0
+;;;	%1 eax,qword 0
+
+	%1 rax,      0
+	%1 rax, word 0
+;;;	%1 rax,dword 0
+;;;	%1 rax,qword 0
+
+%endmacro
+
+m lar
+
+m lsl
+
+bits 16
+lar ax, si
+lar ax,esi
+bits 32
+lar ax, si
+lar ax,esi
+bits 64
+lar ax,esi
+lar ax,rsi
+
+bits 16
+lsl ax, si
+lsl ax,esi
+bits 32
+lsl ax, si
+lsl ax,esi
+bits 64
+lar ax,esi
+lsl ax,rsi
+
+; EOF

_service:tar_scm:nasm-2.16.03.tar.xz/test/larlsl.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/latevex.asm Added

@@ -0,0 +1,71 @@
+	bits 64
+
+%define YMMWORD yword
+
+	vpmadd52luq	ymm3,ymm1,YMMWORDrsi
+	vpmadd52luq	ymm16,ymm1,YMMWORD32+rsi
+	vpmadd52luq	ymm17,ymm1,YMMWORD64+rsi
+	vpmadd52luq	ymm18,ymm1,YMMWORD96+rsi
+	vpmadd52luq	ymm19,ymm1,YMMWORD128+rsi
+
+	vpmadd52luq	ymm3,ymm2,YMMWORDrcx
+	vpmadd52luq	ymm16,ymm2,YMMWORD32+rcx
+	vpmadd52luq	ymm17,ymm2,YMMWORD64+rcx
+	vpmadd52luq	ymm18,ymm2,YMMWORD96+rcx
+	vpmadd52luq	ymm19,ymm2,YMMWORD128+rcx
+
+ {vex}	vpmadd52luq	ymm3,ymm1,YMMWORDrsi
+ {vex}	vpmadd52luq	ymm3,ymm2,YMMWORDrcx
+
+	cpu latevex
+
+	vpmadd52luq	ymm3,ymm1,YMMWORDrsi
+	vpmadd52luq	ymm16,ymm1,YMMWORD32+rsi
+	vpmadd52luq	ymm17,ymm1,YMMWORD64+rsi
+	vpmadd52luq	ymm18,ymm1,YMMWORD96+rsi
+	vpmadd52luq	ymm19,ymm1,YMMWORD128+rsi
+
+	vpmadd52luq	ymm3,ymm2,YMMWORDrcx
+	vpmadd52luq	ymm16,ymm2,YMMWORD32+rcx
+	vpmadd52luq	ymm17,ymm2,YMMWORD64+rcx
+	vpmadd52luq	ymm18,ymm2,YMMWORD96+rcx
+	vpmadd52luq	ymm19,ymm2,YMMWORD128+rcx
+
+	cpu default
+
+	vpmadd52luq	ymm3,ymm1,YMMWORDrsi
+	vpmadd52luq	ymm3,ymm2,YMMWORDrcx
+
+	cpu noevex
+
+	vpmadd52luq	ymm3,ymm1,YMMWORDrsi
+	vpmadd52luq	ymm3,ymm2,YMMWORDrcx
+
+%ifdef ERROR
+	vpmadd52luq	ymm19,ymm2,YMMWORD128+rcx
+%endif
+
+	cpu evex,novex,latevex
+
+	vpmadd52luq	ymm3,ymm1,YMMWORDrsi
+	vpmadd52luq	ymm3,ymm2,YMMWORDrcx
+
+	cpu default
+
+	vaddps		ymm3,ymm1,YMMWORDrsi
+	vaddps		ymm3,ymm2,YMMWORDrcx
+
+	cpu novex
+
+	vaddps		ymm3,ymm1,YMMWORDrsi
+	vaddps		ymm3,ymm2,YMMWORDrcx
+
+%ifdef ERROR
+	cpu noevex
+
+	vaddps		ymm3,ymm1,YMMWORDrsi
+	vaddps		ymm3,ymm2,YMMWORDrcx
+%endif
+
+ {vex}	vaddps		ymm3,ymm1,YMMWORDrsi
+ {vex}	vaddps		ymm3,ymm2,YMMWORDrcx

_service:tar_scm:nasm-2.16.03.tar.xz/test/lnxhello.asm Added

@@ -0,0 +1,54 @@
+;Testname=aout;  Arguments=-faout  -olnxhello.o -Ox; Files=stdout stderr lnxhello.o
+;Testname=aoutb; Arguments=-faoutb -olnxhello.o -Ox; Files=stdout stderr lnxhello.o
+;Testname=as86;  Arguments=-fas86  -olnxhello.o -Ox; Files=stdout stderr lnxhello.o
+;Testname=elf32; Arguments=-felf32 -olnxhello.o -Ox; Files=stdout stderr lnxhello.o
+
+;
+; Assembly "Hello, World!" for Linux
+;
+
+
+; Properly defined in <sys/syscall.h>
+%define SYS_exit	1
+%define SYS_write	4
+
+	section .text
+
+	global _start
+_start:
+	; gdb doesn't like to stop at the entry point address, so
+	; we put a nop here for pure convenience
+	nop				
+
+
+write_hello:
+	mov edx, hello_len
+	mov ecx, hello
+	
+.loop:
+	mov eax, SYS_write
+	mov ebx, 1			; stdout
+	int 80h
+
+	cmp eax, -4096
+	ja error
+
+	add ecx, eax
+	sub edx, eax
+	jnz .loop
+
+ok:	
+	mov eax, SYS_exit
+	xor ebx, ebx
+	int 80h
+	hlt
+
+error:
+	mov eax, SYS_exit
+	mov ebx, 1		; Error
+	int 80h
+	hlt
+	
+	section .rodata
+hello:	db "Hello, World!", 10
+hello_len equ $-hello

_service:tar_scm:nasm-2.16.03.tar.xz/test/local.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/loopoffs.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/lwp.asm Added

@@ -0,0 +1,213 @@
+; LWP testcases from 2010/03/22 binutils change: no more 16-bit variants
+;------------------------------------------------------------------------
+
+%define testcase3(x) x
+%define testcase3(x,y) y,x
+%define testcase3(x,y,z) z,y,x
+
+%macro testcase 3.nolist	; uncomment one of the two, and compare the -f bin and -l output between them
+;    db %1
+;    %2 testcase3(%3)
+%endmacro
+
+bits 32
+
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc0									  }, { llwpcb }, { eax }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc1									  }, { llwpcb }, { ecx }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc2									  }, { llwpcb }, { edx }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc3									  }, { llwpcb }, { ebx }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc4									  }, { llwpcb }, { esp }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc5									  }, { llwpcb }, { ebp }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc6									  }, { llwpcb }, { esi }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc7									  }, { llwpcb }, { edi }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xcf									  }, { slwpcb }, { edi }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xce									  }, { slwpcb }, { esi }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xcd									  }, { slwpcb }, { ebp }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xcc									  }, { slwpcb }, { esp }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xcb									  }, { slwpcb }, { ebx }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xca									  }, { slwpcb }, { edx }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc9									  }, { slwpcb }, { ecx }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc8									  }, { slwpcb }, { eax }
+testcase { 0x8f, 0xea, 0x78, 0x12, 0xc7, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,edi,eax }
+testcase { 0x8f, 0xea, 0x70, 0x12, 0xc6, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,esi,ecx }
+testcase { 0x8f, 0xea, 0x68, 0x12, 0xc5, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,ebp,edx }
+testcase { 0x8f, 0xea, 0x60, 0x12, 0xc4, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,esp,ebx }
+testcase { 0x8f, 0xea, 0x58, 0x12, 0xc3, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,ebx,esp }
+testcase { 0x8f, 0xea, 0x50, 0x12, 0xc2, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,edx,ebp }
+testcase { 0x8f, 0xea, 0x48, 0x12, 0xc1, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,ecx,esi }
+testcase { 0x8f, 0xea, 0x40, 0x12, 0xc0, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,eax,edi }
+testcase { 0x8f, 0xea, 0x78, 0x12, 0xcf, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,edi,eax }
+testcase { 0x8f, 0xea, 0x70, 0x12, 0xce, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,esi,ecx }
+testcase { 0x8f, 0xea, 0x68, 0x12, 0xcd, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,ebp,edx }
+testcase { 0x8f, 0xea, 0x60, 0x12, 0xcc, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,esp,ebx }
+testcase { 0x8f, 0xea, 0x58, 0x12, 0xcb, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,ebx,esp }
+testcase { 0x8f, 0xea, 0x50, 0x12, 0xca, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,edx,ebp }
+testcase { 0x8f, 0xea, 0x48, 0x12, 0xc9, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,ecx,esi }
+testcase { 0x8f, 0xea, 0x40, 0x12, 0xc8, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,eax,edi }
+testcase { 0x8f, 0xea, 0x78, 0x12, 0x07, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,edi,eax }
+testcase { 0x8f, 0xea, 0x70, 0x12, 0x06, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,esi,ecx }
+testcase { 0x8f, 0xea, 0x68, 0x12, 0x45, 0x00, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,ebp,edx }
+testcase { 0x8f, 0xea, 0x60, 0x12, 0x04, 0x24, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,esp,ebx }
+testcase { 0x8f, 0xea, 0x58, 0x12, 0x03, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,ebx,esp }
+testcase { 0x8f, 0xea, 0x50, 0x12, 0x02, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,edx,ebp }
+testcase { 0x8f, 0xea, 0x48, 0x12, 0x01, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,ecx,esi }
+testcase { 0x8f, 0xea, 0x40, 0x12, 0x00, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,eax,edi }
+testcase { 0x8f, 0xea, 0x78, 0x12, 0x0f, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,edi,eax }
+testcase { 0x8f, 0xea, 0x70, 0x12, 0x0e, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,esi,ecx }
+testcase { 0x8f, 0xea, 0x68, 0x12, 0x4d, 0x00, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,ebp,edx }
+testcase { 0x8f, 0xea, 0x60, 0x12, 0x0c, 0x24, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,esp,ebx }
+testcase { 0x8f, 0xea, 0x58, 0x12, 0x0b, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,ebx,esp }
+testcase { 0x8f, 0xea, 0x50, 0x12, 0x0a, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,edx,ebp }
+testcase { 0x8f, 0xea, 0x48, 0x12, 0x09, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,ecx,esi }
+testcase { 0x8f, 0xea, 0x40, 0x12, 0x08, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,eax,edi }
+testcase { 0x8f, 0xea, 0x78, 0x12, 0x87, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpins }, { 0x12345678,0xcafe+edi,eax }
+testcase { 0x8f, 0xea, 0x70, 0x12, 0x86, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpins }, { 0x12345678,0xcafe+esi,ecx }
+testcase { 0x8f, 0xea, 0x68, 0x12, 0x85, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpins }, { 0x12345678,0xcafe+ebp,edx }
+testcase { 0x8f, 0xea, 0x60, 0x12, 0x84, 0x24, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+esp,ebx }
+testcase { 0x8f, 0xea, 0x58, 0x12, 0x83, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpins }, { 0x12345678,0xcafe+ebx,esp }
+testcase { 0x8f, 0xea, 0x50, 0x12, 0x82, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpins }, { 0x12345678,0xcafe+edx,ebp }
+testcase { 0x8f, 0xea, 0x48, 0x12, 0x81, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpins }, { 0x12345678,0xcafe+ecx,esi }
+testcase { 0x8f, 0xea, 0x40, 0x12, 0x80, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpins }, { 0x12345678,0xcafe+eax,edi }
+testcase { 0x8f, 0xea, 0x78, 0x12, 0x8f, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpval }, { 0x12345678,0xcafe+edi,eax }
+testcase { 0x8f, 0xea, 0x70, 0x12, 0x8e, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpval }, { 0x12345678,0xcafe+esi,ecx }
+testcase { 0x8f, 0xea, 0x68, 0x12, 0x8d, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpval }, { 0x12345678,0xcafe+ebp,edx }
+testcase { 0x8f, 0xea, 0x60, 0x12, 0x8c, 0x24, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+esp,ebx }
+testcase { 0x8f, 0xea, 0x58, 0x12, 0x8b, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpval }, { 0x12345678,0xcafe+ebx,esp }
+testcase { 0x8f, 0xea, 0x50, 0x12, 0x8a, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpval }, { 0x12345678,0xcafe+edx,ebp }
+testcase { 0x8f, 0xea, 0x48, 0x12, 0x89, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpval }, { 0x12345678,0xcafe+ecx,esi }
+testcase { 0x8f, 0xea, 0x40, 0x12, 0x88, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpval }, { 0x12345678,0xcafe+eax,edi }
+
+bits 64
+
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc0									  }, { llwpcb }, { eax }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc1									  }, { llwpcb }, { ecx }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc2									  }, { llwpcb }, { edx }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc3									  }, { llwpcb }, { ebx }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc4									  }, { llwpcb }, { esp }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc5									  }, { llwpcb }, { ebp }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc6									  }, { llwpcb }, { esi }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc7									  }, { llwpcb }, { edi }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc0									  }, { llwpcb }, { r8d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc1									  }, { llwpcb }, { r9d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc2									  }, { llwpcb }, { r10d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc3									  }, { llwpcb }, { r11d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc4									  }, { llwpcb }, { r12d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc5									  }, { llwpcb }, { r13d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc6									  }, { llwpcb }, { r14d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc7									  }, { llwpcb }, { r15d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xcf									  }, { slwpcb }, { r15d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xce									  }, { slwpcb }, { r14d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xcd									  }, { slwpcb }, { r13d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xcc									  }, { slwpcb }, { r12d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xcb									  }, { slwpcb }, { r11d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xca									  }, { slwpcb }, { r10d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc9									  }, { slwpcb }, { r9d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc8									  }, { slwpcb }, { r8d }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xcf									  }, { slwpcb }, { edi }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xce									  }, { slwpcb }, { esi }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xcd									  }, { slwpcb }, { ebp }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xcc									  }, { slwpcb }, { esp }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xcb									  }, { slwpcb }, { ebx }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xca									  }, { slwpcb }, { edx }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc9									  }, { slwpcb }, { ecx }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc8									  }, { slwpcb }, { eax }
+testcase { 0x8f, 0xca, 0x78, 0x12, 0xc7, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,r15d,eax }
+testcase { 0x8f, 0xca, 0x70, 0x12, 0xc6, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,r14d,ecx }
+testcase { 0x8f, 0xca, 0x68, 0x12, 0xc5, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,r13d,edx }
+testcase { 0x8f, 0xca, 0x60, 0x12, 0xc4, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,r12d,ebx }
+testcase { 0x8f, 0xca, 0x58, 0x12, 0xc3, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,r11d,esp }
+testcase { 0x8f, 0xca, 0x50, 0x12, 0xc2, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,r10d,ebp }
+testcase { 0x8f, 0xca, 0x48, 0x12, 0xc1, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,r9d,esi }
+testcase { 0x8f, 0xca, 0x40, 0x12, 0xc0, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,r8d,edi }
+testcase { 0x8f, 0xea, 0x38, 0x12, 0xc7, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,edi,r8d }
+testcase { 0x8f, 0xea, 0x30, 0x12, 0xc6, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,esi,r9d }
+testcase { 0x8f, 0xea, 0x28, 0x12, 0xc5, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,ebp,r10d }
+testcase { 0x8f, 0xea, 0x20, 0x12, 0xc4, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,esp,r11d }
+testcase { 0x8f, 0xea, 0x18, 0x12, 0xc3, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,ebx,r12d }
+testcase { 0x8f, 0xea, 0x10, 0x12, 0xc2, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,edx,r13d }
+testcase { 0x8f, 0xea, 0x08, 0x12, 0xc1, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,ecx,r14d }
+testcase { 0x8f, 0xea, 0x00, 0x12, 0xc0, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,eax,r15d }
+testcase { 0x8f, 0xca, 0x78, 0x12, 0xcf, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,r15d,eax }
+testcase { 0x8f, 0xca, 0x70, 0x12, 0xce, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,r14d,ecx }
+testcase { 0x8f, 0xca, 0x68, 0x12, 0xcd, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,r13d,edx }
+testcase { 0x8f, 0xca, 0x60, 0x12, 0xcc, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,r12d,ebx }
+testcase { 0x8f, 0xca, 0x58, 0x12, 0xcb, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,r11d,esp }
+testcase { 0x8f, 0xca, 0x50, 0x12, 0xca, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,r10d,ebp }
+testcase { 0x8f, 0xca, 0x48, 0x12, 0xc9, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,r9d,esi }
+testcase { 0x8f, 0xca, 0x40, 0x12, 0xc8, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,r8d,edi }
+testcase { 0x8f, 0xea, 0x38, 0x12, 0xcf, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,edi,r8d }
+testcase { 0x8f, 0xea, 0x30, 0x12, 0xce, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,esi,r9d }
+testcase { 0x8f, 0xea, 0x28, 0x12, 0xcd, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,ebp,r10d }
+testcase { 0x8f, 0xea, 0x20, 0x12, 0xcc, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,esp,r11d }
+testcase { 0x8f, 0xea, 0x18, 0x12, 0xcb, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,ebx,r12d }
+testcase { 0x8f, 0xea, 0x10, 0x12, 0xca, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,edx,r13d }
+testcase { 0x8f, 0xea, 0x08, 0x12, 0xc9, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,ecx,r14d }
+testcase { 0x8f, 0xea, 0x00, 0x12, 0xc8, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,eax,r15d }
+testcase { 0x67, 0x8f, 0xca, 0x78, 0x12, 0x07, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,r15d,eax }
+testcase { 0x67, 0x8f, 0xca, 0x70, 0x12, 0x06, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,r14d,ecx }
+testcase { 0x67, 0x8f, 0xca, 0x68, 0x12, 0x45, 0x00, 0x78, 0x56, 0x34, 0x12				  }, { lwpins }, { 0x12345678,r13d,edx }
+testcase { 0x67, 0x8f, 0xca, 0x60, 0x12, 0x04, 0x24, 0x78, 0x56, 0x34, 0x12				  }, { lwpins }, { 0x12345678,r12d,ebx }
+testcase { 0x67, 0x8f, 0xca, 0x58, 0x12, 0x03, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,r11d,esp }
+testcase { 0x67, 0x8f, 0xca, 0x50, 0x12, 0x02, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,r10d,ebp }
+testcase { 0x67, 0x8f, 0xca, 0x48, 0x12, 0x01, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,r9d,esi }
+testcase { 0x67, 0x8f, 0xca, 0x40, 0x12, 0x00, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,r8d,edi }
+testcase { 0x67, 0x8f, 0xea, 0x38, 0x12, 0x07, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,edi,r8d }
+testcase { 0x67, 0x8f, 0xea, 0x30, 0x12, 0x06, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,esi,r9d }
+testcase { 0x67, 0x8f, 0xea, 0x28, 0x12, 0x45, 0x00, 0x78, 0x56, 0x34, 0x12				  }, { lwpins }, { 0x12345678,ebp,r10d }
+testcase { 0x67, 0x8f, 0xea, 0x20, 0x12, 0x04, 0x24, 0x78, 0x56, 0x34, 0x12				  }, { lwpins }, { 0x12345678,esp,r11d }
+testcase { 0x67, 0x8f, 0xea, 0x18, 0x12, 0x03, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,ebx,r12d }
+testcase { 0x67, 0x8f, 0xea, 0x10, 0x12, 0x02, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,edx,r13d }
+testcase { 0x67, 0x8f, 0xea, 0x08, 0x12, 0x01, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,ecx,r14d }
+testcase { 0x67, 0x8f, 0xea, 0x00, 0x12, 0x00, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,eax,r15d }
+testcase { 0x67, 0x8f, 0xca, 0x78, 0x12, 0x0f, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,r15d,eax }
+testcase { 0x67, 0x8f, 0xca, 0x70, 0x12, 0x0e, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,r14d,ecx }
+testcase { 0x67, 0x8f, 0xca, 0x68, 0x12, 0x4d, 0x00, 0x78, 0x56, 0x34, 0x12				  }, { lwpval }, { 0x12345678,r13d,edx }
+testcase { 0x67, 0x8f, 0xca, 0x60, 0x12, 0x0c, 0x24, 0x78, 0x56, 0x34, 0x12				  }, { lwpval }, { 0x12345678,r12d,ebx }
+testcase { 0x67, 0x8f, 0xca, 0x58, 0x12, 0x0b, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,r11d,esp }
+testcase { 0x67, 0x8f, 0xca, 0x50, 0x12, 0x0a, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,r10d,ebp }
+testcase { 0x67, 0x8f, 0xca, 0x48, 0x12, 0x09, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,r9d,esi }
+testcase { 0x67, 0x8f, 0xca, 0x40, 0x12, 0x08, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,r8d,edi }
+testcase { 0x67, 0x8f, 0xea, 0x38, 0x12, 0x0f, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,edi,r8d }
+testcase { 0x67, 0x8f, 0xea, 0x30, 0x12, 0x0e, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,esi,r9d }
+testcase { 0x67, 0x8f, 0xea, 0x28, 0x12, 0x4d, 0x00, 0x78, 0x56, 0x34, 0x12				  }, { lwpval }, { 0x12345678,ebp,r10d }
+testcase { 0x67, 0x8f, 0xea, 0x20, 0x12, 0x0c, 0x24, 0x78, 0x56, 0x34, 0x12				  }, { lwpval }, { 0x12345678,esp,r11d }
+testcase { 0x67, 0x8f, 0xea, 0x18, 0x12, 0x0b, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,ebx,r12d }
+testcase { 0x67, 0x8f, 0xea, 0x10, 0x12, 0x0a, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,edx,r13d }
+testcase { 0x67, 0x8f, 0xea, 0x08, 0x12, 0x09, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,ecx,r14d }
+testcase { 0x67, 0x8f, 0xea, 0x00, 0x12, 0x08, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,eax,r15d }
+testcase { 0x67, 0x8f, 0xca, 0x78, 0x12, 0x87, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+r15d,eax }
+testcase { 0x67, 0x8f, 0xca, 0x70, 0x12, 0x86, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+r14d,ecx }
+testcase { 0x67, 0x8f, 0xca, 0x68, 0x12, 0x85, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+r13d,edx }
+testcase { 0x67, 0x8f, 0xca, 0x60, 0x12, 0x84, 0x24, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12	  }, { lwpins }, { 0x12345678,0xcafe+r12d,ebx }
+testcase { 0x67, 0x8f, 0xca, 0x58, 0x12, 0x83, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+r11d,esp }
+testcase { 0x67, 0x8f, 0xca, 0x50, 0x12, 0x82, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+r10d,ebp }
+testcase { 0x67, 0x8f, 0xca, 0x48, 0x12, 0x81, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+r9d,esi }
+testcase { 0x67, 0x8f, 0xca, 0x40, 0x12, 0x80, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+r8d,edi }
+testcase { 0x67, 0x8f, 0xea, 0x38, 0x12, 0x87, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+edi,r8d }
+testcase { 0x67, 0x8f, 0xea, 0x30, 0x12, 0x86, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+esi,r9d }
+testcase { 0x67, 0x8f, 0xea, 0x28, 0x12, 0x85, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+ebp,r10d }
+testcase { 0x67, 0x8f, 0xea, 0x20, 0x12, 0x84, 0x24, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12	  }, { lwpins }, { 0x12345678,0xcafe+esp,r11d }
+testcase { 0x67, 0x8f, 0xea, 0x18, 0x12, 0x83, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+ebx,r12d }
+testcase { 0x67, 0x8f, 0xea, 0x10, 0x12, 0x82, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+edx,r13d }
+testcase { 0x67, 0x8f, 0xea, 0x08, 0x12, 0x81, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+ecx,r14d }
+testcase { 0x67, 0x8f, 0xea, 0x00, 0x12, 0x80, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+eax,r15d }
+testcase { 0x67, 0x8f, 0xca, 0x78, 0x12, 0x8f, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+r15d,eax }
+testcase { 0x67, 0x8f, 0xca, 0x70, 0x12, 0x8e, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+r14d,ecx }
+testcase { 0x67, 0x8f, 0xca, 0x68, 0x12, 0x8d, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+r13d,edx }
+testcase { 0x67, 0x8f, 0xca, 0x60, 0x12, 0x8c, 0x24, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12	  }, { lwpval }, { 0x12345678,0xcafe+r12d,ebx }
+testcase { 0x67, 0x8f, 0xca, 0x58, 0x12, 0x8b, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+r11d,esp }
+testcase { 0x67, 0x8f, 0xca, 0x50, 0x12, 0x8a, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+r10d,ebp }
+testcase { 0x67, 0x8f, 0xca, 0x48, 0x12, 0x89, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+r9d,esi }
+testcase { 0x67, 0x8f, 0xca, 0x40, 0x12, 0x88, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+r8d,edi }
+testcase { 0x67, 0x8f, 0xea, 0x38, 0x12, 0x8f, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+edi,r8d }
+testcase { 0x67, 0x8f, 0xea, 0x30, 0x12, 0x8e, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+esi,r9d }
+testcase { 0x67, 0x8f, 0xea, 0x28, 0x12, 0x8d, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+ebp,r10d }
+testcase { 0x67, 0x8f, 0xea, 0x20, 0x12, 0x8c, 0x24, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12	  }, { lwpval }, { 0x12345678,0xcafe+esp,r11d }
+testcase { 0x67, 0x8f, 0xea, 0x18, 0x12, 0x8b, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+ebx,r12d }
+testcase { 0x67, 0x8f, 0xea, 0x10, 0x12, 0x8a, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+edx,r13d }
+testcase { 0x67, 0x8f, 0xea, 0x08, 0x12, 0x89, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+ecx,r14d }
+testcase { 0x67, 0x8f, 0xea, 0x00, 0x12, 0x88, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+eax,r15d }
+
+; EOF
+
+

_service:tar_scm:nasm-2.16.03.tar.xz/test/macro-defaults.asm Added

@@ -0,0 +1,64 @@
+;Testname=warning;    Arguments=-fbin -omacdef.bin -w+macro-defaults; Files=stdout stderr macdef.bin
+;Testname=nonwarning; Arguments=-fbin -omacdef.bin -w-macro-defaults; Files=stdout stderr macdef.bin
+
+%MACRO mmac_fix 1 a
+ ; While defined to take one parameter, any invocation will
+ ; see two, due to the default parameter.
+ %warning %0 %1 %2 %3 %4 %5
+%ENDMACRO
+mmac_fix one
+
+%MACRO mmac_var 1-2 a,b
+ ; While defined to take one or two parameters, invocations
+ ; will see three, due to the default parameters.
+ %warning %0 %1 %2 %3 %4 %5
+%ENDMACRO
+mmac_var one
+mmac_var one,two
+
+%MACRO mmac_plus 1-2+ a,b
+ ; This does not warn. Although this looks like two default
+ ; parameters, it ends up being only one: the "+" limits it
+ ; to two parameters; if invoked without a second parameter
+ ; the second parameter will be "a,b".
+ %warning %0 %1 %2 %3 %4 %5
+ ;Check rotating behaviour
+%ENDMACRO
+mmac_plus one
+mmac_plus one,two
+mmac_plus one,two,three
+
+%MACRO mmac_star 1-* a,b
+ ; This does not warn. Because the "*" extends the range of
+ ; parameters to infinity, the "a,b" default parameters can
+ ; not exceed that range.
+ %warning %0 %1 %2 %3 %4 %5
+%ENDMACRO
+mmac_star one
+mmac_star one,two
+mmac_star one,two,three
+
+%MACRO mmac_rotate 0-* a,b
+ %warning %0 %1 %2 %3 %4 %5
+ ;%rotate should rotate all parameters
+ %rotate 1
+ %warning %0 %1 %2 %3 %4 %5
+%ENDMACRO
+mmac_rotate
+mmac_rotate one
+mmac_rotate one,two
+mmac_rotate one,two,three
+
+;Scope / evaluation time test
+%define  I 0
+%assign  J 0
+%xdefine K 0
+
+%MACRO mmac_scope 0 I J K
+ %warning %1 %2 %3
+%ENDMACRO
+
+%define  I 1
+%assign  J 1
+%xdefine K 1
+mmac_scope

_service:tar_scm:nasm-2.16.03.tar.xz/test/macroerr.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/macroerr.inc Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/manysecs.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/map.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/mapi.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/masmdisp.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/memleak.asm Added

@@ -0,0 +1,71 @@
+        %imacro call 1.nolist
+%push
+ %assign %$size 2
+ %assign %$isreg 0
+ %assign %$exit 0
+ %rep 2
+  %ifn %$exit
+   %if %$size == 2
+    %define %$regnames "ax  cx  dx  bx  sp  bp  si  di  "
+   %elif %$size == 4
+    %define %$regnames "eax ecx edx ebx esp ebp esi edi "
+   %endif
+   %assign %$index 0
+   %rep 8
+    %ifn %$exit
+     %substr %$reg %$regnames %$index * 4 + 1, 4
+     %deftok %$reg %$reg
+     %ifnempty %$reg
+      %ifidni %$reg, %1
+       %assign %$isreg %$size
+       %assign %$exit 1
+       %exitrep
+      %endif
+     %endif
+    %endif
+    %assign %$index %$index + 1
+   %endrep
+   %if %$exit
+    %exitrep
+   %endif
+   %assign %$size %$size * 2
+  %endif
+ %endrep
+
+ %assign %$ismulti 0
+ %assign %$ismem 0
+ %defstr %$string %1
+ %strlen %$length %$string
+ %assign %$ii 0
+ %rep %$length
+  %substr %$point %$string %$ii + 1, 1
+  %if %$point == 32 || %$point == 9
+   %assign %$ismulti 1
+  %endif
+  %ifidn %$point, ''
+   %assign %$ismem 1
+  %endif
+  %assign %$ii %$ii + 1
+ %endrep
+%pop
+        %endmacro
+
+
+%ifndef _OUTER
+ %assign _OUTER 100
+%endif
+%ifndef _INNER
+ %assign _INNER 50
+%endif
+
+%rep _OUTER
+call cx
+call near 0
+call .
+ %rep _INNER
+call label
+call labelfoo
+call labelbar
+call labelbaz
+ %endrep
+%endrep

_service:tar_scm:nasm-2.16.03.tar.xz/test/mmxsize.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/moresecs.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/mostsecs.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/movd.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/movd64.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/movhpd.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/movimm.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/movnti.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/mpx-64.asm Added

@@ -0,0 +1,120 @@
+;Testname=mpx-64; Arguments=-felf64 -ompx-64.o -O0; Files=stdout stderr mpx-64.o
+BITS 64
+
+	bndmk bnd1, r11
+	bndmk bnd1, rax
+	bndmk bnd1, 0x399
+	bndmk bnd1, r9+0x3
+	bndmk bnd1, rax+0x3
+	bndmk bnd1, 3,1*r12
+	bndmk bnd1, rax+rcx
+	bndmk bnd1, r11+1*rax+0x3
+	bndmk bnd1, rbx+1*r9+0x3
+
+	; bndmov
+	bndmov bnd1, r11
+	bndmov bnd1, rax
+	bndmov bnd1, 0x399
+	bndmov bnd2, r9+0x3
+	bndmov bnd2, rax+0x3
+	bndmov bnd0, 1*r12+0x3
+	bndmov bnd2, rax+rdx
+	bndmov bnd1, r11+1*rax+0x3
+	bndmov bnd1, rbx+1*r9+0x3
+	bndmov bnd0, bnd2
+
+	bndmov r11, bnd1
+	bndmov rax, bnd1
+	bndmov 0x399, bnd1
+	bndmov r9+0x3, bnd2
+	bndmov rax+0x3, bnd2
+	bndmov 1*r12+0x3, bnd0
+	bndmov rax+rdx, bnd2
+	bndmov r11+1*rax+0x3, bnd1
+	bndmov rbx+1*r9+0x3, bnd1
+	bndmov bnd2, bnd0
+
+	; bndcl
+	bndcl bnd1, r11
+	bndcl bnd1, rax
+	bndcl bnd1, r11
+	bndcl bnd1, rcx
+	bndcl bnd1, 0x399
+	bndcl bnd1, r9+0x3
+	bndcl bnd1, rax+0x3
+	bndcl bnd1, 1*r12+0x3
+	bndcl bnd1, rax+rcx
+	bndcl bnd1, r11+1*rax+0x3
+	bndcl bnd1, rbx+1*r9+0x3
+
+	; bndcu
+	bndcu bnd1, r11
+	bndcu bnd1, rax
+	bndcu bnd1, r11
+	bndcu bnd1, rcx
+	bndcu bnd1, 0x399
+	bndcu bnd1, r9+0x3
+	bndcu bnd1, rax+0x3
+	bndcu bnd1, 1*r12+0x3
+	bndcu bnd1, rax+rcx
+	bndcu bnd1, r11+1*rax+0x3
+	bndcu bnd1, rbx+1*r9+0x3
+
+	; bndcn
+	bndcn bnd1, r11
+	bndcn bnd1, rax
+	bndcn bnd1, r11
+	bndcn bnd1, rcx
+	bndcn bnd1, 0x399
+	bndcn bnd1, r9+0x3
+	bndcn bnd1, rax+0x3
+	bndcn bnd1, 1*r9+0x3
+	bndcn bnd1, rax+rcx
+	bndcn bnd1, r11+1*rax+0x3
+	bndcn bnd1, rbx+1*r9+0x3
+
+	; bndstx
+	; next 5 lines should be parsed same
+	bndstx rax+0x3,rbx, bnd0	; NASM - split EA
+	bndstx rax+rbx*1+0x3, bnd0	; GAS
+	bndstx rax+rbx+3, bnd0	; GAS
+	bndstx rax+0x3, bnd0, rbx	; ICC-1
+	bndstx rax+0x3, rbx, bnd0	; ICC-2
+
+	; next 5 lines should be parsed same
+	bndstx ,rcx*1, bnd2		; NASM
+	bndstx 0,rcx*1, bnd2		; NASM
+	bndstx 0, bnd2, rcx		; ICC-1
+	bndstx 0, rcx, bnd2		; ICC-2
+	bndstx rcx*1, bnd2		; GAS - rcx is encoded as index only when it is mib
+
+	; next 3 lines should be parsed same
+	bndstx 3,1*r12, bnd2		; NASM
+	bndstx 1*r12+3, bnd2		; GAS
+	bndstx 3, r12, bnd2		; ICC
+
+	bndstx r12+0x399, bnd3
+	bndstx r11+0x1234, bnd1
+	bndstx rbx+0x1234, bnd2
+	bndstx rdx, bnd1
+
+	; bndldx
+	bndldx bnd0, rax+rbx*1+0x3
+	bndldx bnd2, rbx+rdx+3
+	bndldx bnd3, r12+0x399
+	bndldx bnd1, r11+0x1234
+	bndldx bnd2, rbx+0x1234
+	bndldx bnd2, 1*rbx+3
+	bndldx bnd2, 1*r12+3
+	bndldx bnd1, rdx
+
+	; bnd
+	bnd ret
+	bnd call      foo
+	bnd jmp       foo	; when it becomes a Jb form - short jmp (eb),
+				; bnd prefix is silently dropped
+	bnd jmp       near 0	; near jmp (opcode e9)
+;	bnd jmp       short 0	; explicit short jmp (opcode eb) : error
+	bnd jno       foo
+
+foo:	bnd ret

_service:tar_scm:nasm-2.16.03.tar.xz/test/mpx.asm Added

@@ -0,0 +1,89 @@
+;Testname=mpx; Arguments=-felf -ompx.o -O0; Files=stdout stderr mpx.o
+BITS 32
+
+	bndmk bnd1, eax
+	bndmk bnd1, 0x399
+	bndmk bnd1, ecx+0x3
+	bndmk bnd1, eax+ecx
+	bndmk bnd1, ecx*1
+	bndmk bnd1, edx+1*eax+0x3
+
+	; bndmov
+	bndmov bnd1, eax
+	bndmov bnd1, 0x399
+	bndmov bnd1, ecx+0x3
+	bndmov bnd1, eax+ecx
+	bndmov bnd1, ecx*1
+	bndmov bnd1, edx+1*eax+0x3
+	bndmov bnd0, bnd1
+
+	bndmov eax, bnd1
+	bndmov 0x399, bnd1
+	bndmov ecx+0x3, bnd1
+	bndmov eax+ecx, bnd1
+	bndmov ecx*1, bnd1
+	bndmov edx+1*eax+0x3, bnd1
+	bndmov bnd1, bnd0
+
+	; bndcl
+	bndcl bnd1, eax
+	bndcl bnd1, ecx
+	bndcl bnd1, 0x399
+	bndcl bnd1, ecx+0x3
+	bndcl bnd1, eax+ecx
+	bndcl bnd1, ecx*1
+	bndcl bnd1, edx+1*eax+0x3
+
+	; bndcu
+	bndcu bnd1, eax
+	bndcu bnd1, ecx
+	bndcu bnd1, 0x399
+	bndcu bnd1, ecx+0x3
+	bndcu bnd1, eax+ecx
+	bndcu bnd1, ecx*1
+	bndcu bnd1, edx+1*eax+0x3
+
+	; bndcn
+	bndcn bnd1, eax
+	bndcn bnd1, ecx
+	bndcn bnd1, 0x399
+	bndcn bnd1, ecx+0x3
+	bndcn bnd1, eax+ecx
+	bndcn bnd1, ecx*1
+	bndcn bnd1, edx+1*eax+0x3
+
+	; bndstx
+	bndstx eax+ebx*1+0x3, bnd0
+	bndstx eax+0x3,ebx, bnd0
+	bndstx eax+0x3, bnd0, ebx
+	bndstx eax+0x3, ebx, bnd0
+	bndstx ecx*1, bnd2
+	bndstx ,ecx*1, bnd2
+	bndstx 0,ecx*1, bnd2
+	bndstx 0, bnd2, ecx
+	bndstx 0, ecx, bnd2
+	bndstx edx+0x399, bnd3
+	bndstx 1*ebx+3, bnd2
+	bndstx 3,1*ebx, bnd2
+	bndstx 3, ebx, bnd2
+	bndstx edx, bnd1
+
+	; bndldx
+	bndldx bnd0, eax+ebx*1+0x3
+	bndldx bnd2, ebx+edx+3
+	bndldx bnd2, ecx*1
+	bndldx bnd3, edx+0x399
+	bndldx bnd2, 1*ebx+3
+	bndldx bnd2, 3, ebx
+	bndldx bnd1, edx
+
+	; bnd
+	bnd ret
+	bnd call      foo
+	bnd jmp       foo	; when it becomes a Jb form - short jmp (eb),
+				; bnd prefix is silently dropped
+	bnd jmp       near 0	; near jmp (opcode e9)
+;	bnd jmp       short 0	; explicit short jmp (opcode eb) : error
+	bnd jno       foo
+
+foo:	bnd ret

_service:tar_scm:nasm-2.16.03.tar.xz/test/multisection.asm Added

@@ -0,0 +1,96 @@
+;Testname=aout;  Arguments=-faout  -olnxhello.o -Ox; Files=stdout stderr lnxhello.o
+;Testname=aoutb; Arguments=-faoutb -olnxhello.o -Ox; Files=stdout stderr lnxhello.o
+;Testname=as86;  Arguments=-fas86  -olnxhello.o -Ox; Files=stdout stderr lnxhello.o
+;Testname=elf32; Arguments=-felf32 -olnxhello.o -Ox; Files=stdout stderr lnxhello.o
+;Testname=elf64; Arguments=-felf64 -olnxhello.o -Ox; Files=stdout stderr lnxhello.o
+;Testname=obj;   Arguments=-fobj   -olnxhello.o -Ox; Files=stdout stderr lnxhello.o
+;Testname=rdf;   Arguments=-frdf   -olnxhello.o -Ox; Files=stdout stderr lnxhello.o
+;Testname=win32; Arguments=-fwin32 -olnxhello.o -Ox; Files=stdout stderr lnxhello.o
+;Testname=win64; Arguments=-fwin64 -olnxhello.o -Ox; Files=stdout stderr lnxhello.o
+
+; To test where code that is placed before any explicit SECTION
+; gets placed, and what happens if a .text section has an ORG
+;statement, uncomment the following lines.
+;
+;	times	10h	nop
+;
+;section .text
+;org 0x300
+;	times	20h	inc ax
+
+; let's see which of these sections can be placed in the specified order.
+
+section .appspecific
+section .data
+section .stringdata
+section .mytext
+section .code
+section .extra_code
+
+
+section .stringdata
+mystr1: db "Hello, this is string 1", 13, 10, '$'
+
+section .extra_code
+org 0x200
+bits 16
+more:
+   mov si, asciz1
+   mov ah, 0x0E
+   xor bx, bx
+.print:
+   lodsb
+   test al, al
+   jz .end
+   int  0x10
+   jmp short .print
+.end:
+
+   xor ax, ax
+   int 0x16
+
+   mov ax, 0x4c00
+   int 0x21
+
+section .appspecific
+asciz1: db "This is string 2", 0
+
+section .code
+org 0x100
+bits 16
+
+start:
+   mov dx, mystr1
+   mov ah, 9
+   int 0x21
+
+   xor ax, ax
+   int 0x16
+
+   jmp more
+
+section .text
+	xor	eax,eax
+	times	50h nop
+
+section .mytext
+
+	xor	ebx,ebx
+
+section .data
+	db	95h,95h,95h,95h,95h,95h,95h,95h
+
+section .hmm
+	resd	2
+
+section .bss
+	resd	8
+
+section .final1
+	inc	ax
+
+section .final2
+	inc	bx
+
+section .final3
+	inc	cx

_service:tar_scm:nasm-2.16.03.tar.xz/test/nasmformat.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/new Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/newrdwr.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/nop.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/nullfile.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/numtest.asm Added

@@ -0,0 +1,47 @@
+%define a 64
+%define b -30
+
+	dq a*b
+	db %num(a*b,,16), `\n`
+	db %num(a*b,16,16), `\n`
+
+	db %num(a*b), `\n`
+	db %num(a*b,10), `\n`
+	db %num(a*b,3), `\n`
+	db %num(a*b,-3), `\n`
+	db %num(a*b,10,2), `\n`
+	db %num(a*b,-10,2), `\n`
+	db %num(a*b,,2), `\n`
+
+	dq -a*b
+	db %num(-a*b,,16), `\n`
+	db %num(-a*b,16,16), `\n`
+
+	db %num(-a*b), `\n`
+	db %num(-a*b,10), `\n`
+	db %num(-a*b,3), `\n`
+	db %num(-a*b,-3), `\n`
+	db %num(-a*b,10,2), `\n`
+	db %num(-a*b,-10,2), `\n`
+
+	dq %abs(a*b)
+	db %num(%abs(a*b),,16), `\n`
+	db %num(%abs(a*b),16,16), `\n`
+
+	db %num(%abs(a*b)), `\n`
+	db %num(%abs(a*b),10), `\n`
+	db %num(%abs(a*b),3), `\n`
+	db %num(%abs(a*b),-3), `\n`
+	db %num(%abs(a*b),10,2), `\n`
+	db %num(%abs(a*b),-10,2), `\n`
+
+	dq %abs(-a*b)
+	db %num(%abs(-a*b),,16), `\n`
+	db %num(%abs(-a*b),16,16), `\n`
+
+	db %num(%abs(-a*b)), `\n`
+	db %num(%abs(-a*b),10), `\n`
+	db %num(%abs(-a*b),3), `\n`
+	db %num(%abs(-a*b),-3), `\n`
+	db %num(%abs(-a*b),10,2), `\n`
+	db %num(%abs(-a*b),-10,2), `\n`

_service:tar_scm:nasm-2.16.03.tar.xz/test/objexe.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/objlink.c Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/objtest.asm Added

@@ -0,0 +1,87 @@
+;Testname=unoptimized; Arguments=-O0 -fobj -oobj.o; Files=stdout stderr obj.o
+;Testname=optimized;   Arguments=-Ox -fobj -oobj.o; Files=stdout stderr obj.o
+
+; test source file for assembling to Microsoft 16-bit .OBJ
+; build with (16-bit Microsoft C):
+;    nasm -f obj objtest.asm
+;    cl /AL objtest.obj objlink.c
+; other compilers should work too, provided they handle large
+; model in the same way as MS C
+
+; This file should test the following:
+; 1 Define and export a global symbol
+; 2 Define a non-global symbol
+; 3 Define a common symbol
+; 4 Define a NASM local label
+; 5 Reference a NASM local label
+; 6 Import an external symbol
+; 7 Make a PC-relative relocated reference
+; 8 Reference a symbol in the same section as itself
+; 9 Reference a symbol in a different segment from itself
+; 10 Define a segment group
+; 11 Take the offset of a symbol in a grouped segment w.r.t. its segment
+; 12 Reserve uninitialised data space in a segment
+; 13 Directly take the segment address of a segment
+; 14 Directly take the segment address of a group
+; 15 Use SEG on a non-external
+; 16 Use SEG on an external
+
+	  bits 16
+
+	  global _bsssym	; 1
+	  global _function	; 1
+	  global _selfptr	; 1
+	  global _selfptr2	; 1
+	  common _commvar 2	; 3
+	  extern _printf	; 6
+
+	  group mygroup mybss mydata
+	  group mygroup2 mycode mycode2
+
+	  segment mycode private
+
+_function push bp
+	  mov bp,sp
+	  push ds
+	  mov ax,mygroup	; 14
+	  mov ds,ax
+	  inc word _bsssym	; 9
+	  mov ax,seg _commvar
+	  mov ds,ax
+	  dec word _commvar
+	  pop ds
+	  mov ax,bp+6
+	  mov dx,bp+8
+	  push dx
+	  push ax
+	  push dx
+	  push ax
+	  call far cs:.printf	; 5 8
+	  pop ax
+	  pop ax
+	  call trampoline	; 7
+	  pop ax
+	  pop ax
+	  mov sp,bp
+	  pop bp
+	  retf
+
+.printf	  dw _printf, seg _printf ; 2 4 16
+.printfd  dd _printf, seg _printf ; 2 4 16
+.printfq  dq _printf, seg _printf ; 2 4 16
+
+	  segment mycode2 private
+
+trampoline: pop ax
+	  push cs
+	  push ax
+	  jmp far _printf
+
+	  segment mybss private
+
+_bsssym	  resw 64		; 12
+
+	  segment mydata private
+
+_selfptr  dw _selfptr, seg _selfptr ; 8 15
+_selfptr2 dw _selfptr2 wrt mydata, mydata ; 11 13

_service:tar_scm:nasm-2.16.03.tar.xz/test/obsolete.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/omferr.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/optimization.asm Added

@@ -0,0 +1,104 @@
+;Testname=O0; Arguments=-O0 -fbin -ooptimization.bin; Files=stdout stderr optimization.bin
+;Testname=O1; Arguments=-O1 -fbin -ooptimization.bin; Files=stdout stderr optimization.bin
+;Testname=Ox; Arguments=-Ox -fbin -ooptimization.bin; Files=stdout stderr optimization.bin
+
+BITS 32
+
+; Simple
+jmp foo
+times 124 nop
+foo:
+
+; Must start short to converge optimally
+jmp car
+times 127 nop
+car:
+
+; Always near
+jmp cdr
+times 128 nop
+cdr:
+
+
+; Simple
+add eax, quux2 - quux1
+quux1:
+times 127 nop
+quux2:
+
+; Must start short
+corge1:
+add eax, corge2 - corge1
+times 127 - 3 nop
+corge2:
+
+
+; Simple
+lea eax, bolug2-bolug1
+bolug1:
+times 127 nop
+bolug2:
+
+; Must start short
+calog1:
+lea eax, calog2-calog1
+times 127 - 3 nop
+calog2:
+
+
+; Simple
+lea eax, eax+dolug2-dolug1
+dolug1:
+times 127 nop
+dolug2:
+
+; Must start short
+ealog1:
+lea eax, eax+ealog2-ealog1
+times 127 - 3 nop
+ealog2:
+
+; Must stay long!
+lea eax, eax+folug2-folug1
+folug1:
+times 128 nop
+folug2:
+
+; Must stay long!
+galog1:
+lea eax, eax+galog2-galog1
+times 128 - 3 nop
+galog2:
+
+; Sbyte tests...
+onetwentysix	equ 126
+onetwentynine	equ 129
+	
+add eax,onetwentyseven		; sbyte (forward)
+add eax,onetwentyeight		; not sbyte (forward)
+add eax,onetwentyseven		; sbyte (forward)
+add eax,onetwentysix		; sbyte (backward)
+add eax,onetwentynine		; not sbyte (backward)
+add ecx,onetwentyseven		; sbyte (forward)
+add ecx,onetwentyeight		; not sbyte (forward)
+add ecx,onetwentyseven		; sbyte (forward)
+add ecx,onetwentysix		; sbyte (backward)
+add ecx,onetwentynine		; not sbyte (backward)
+	
+onetwentyseven	equ 127
+onetwentyeight	equ 128
+
+; Simple
+add eax, holug2-holug1
+holug1:
+times 127 nop
+holug2:
+
+; Must start short
+ialog1:
+add eax, ialog2-ialog1
+times 127 - 3 nop
+ialog2:
+	
+; Do not confuse forward references and segmentless addresses!
+jmp 12345

_service:tar_scm:nasm-2.16.03.tar.xz/test/org.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/paste.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/pcrel.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/perf Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/perf/label.pl Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/perf/macro.pl Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/perf/token.pl Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/performtest.pl Added

@@ -0,0 +1,192 @@
+#!/usr/bin/perl
+#Perform tests on nasm
+
+use strict;
+use warnings;
+
+use Getopt::Long qw(GetOptions);
+use Pod::Usage qw(pod2usage);
+
+use File::Basename qw(fileparse);
+use File::Compare qw(compare compare_text);
+use File::Copy qw(move);
+use File::Path qw(mkpath rmtree);
+
+#sub debugprint { print (pop() . "\n"); }
+ sub debugprint { }
+
+my $globalresult = 0;
+
+#Process one testfile
+sub perform {
+    my ($clean, $diff, $golden, $nasm, $quiet, $testpath) = @_;
+    my ($stdoutfile, $stderrfile) = ("stdout", "stderr");
+
+    my ($testname, $ignoredpath, $ignoredsuffix) = fileparse($testpath, ".asm");
+    debugprint $testname;
+
+    my $outputdir = $golden ? "golden" : "testresults";
+
+    mkdir "$outputdir" unless -d "$outputdir";
+
+    if ($clean) {
+        rmtree "$outputdir/$testname";
+        return;
+    }
+
+    if(-d "$outputdir/$testname") {
+        rmtree "$outputdir/$testname";
+    }
+
+    open(TESTFILE, '<', $testpath) or (warn "Can't open $testpath\n", return);
+    TEST:
+    while(<TESTFILE>) {
+        #See if there is a test case
+        last unless /Testname=(.*);\s*Arguments=(.*);\s*Files=(.*)/;
+        my ($subname, $arguments, $files) = ($1, $2, $3);
+        debugprint("$subname | $arguments | $files");
+
+        #Call nasm with this test case
+        system("$nasm $arguments $testpath > $stdoutfile 2> $stderrfile");
+        debugprint("$nasm $arguments $testpath > $stdoutfile 2> $stderrfile ----> $?");
+
+        #Move the output to the test dir
+        mkpath("$outputdir/$testname/$subname");
+        foreach(split / /,$files) {
+            if (-f $_) {
+                move($_, "$outputdir/$testname/$subname/$_") or die $!
+            }
+        }
+        unlink ("$stdoutfile", "$stderrfile"); #Just to be sure
+
+        if($golden) {
+            print "Test $testname/$subname created.\n" unless $quiet;
+        } else {
+            #Compare them with the golden files
+            my $result = 0;
+            my @failedfiles = ();
+            foreach(split / /, $files) {
+                if(-f "$outputdir/$testname/$subname/$_") {
+                    my $temp;
+                    if($_ eq $stdoutfile or $_ eq $stderrfile) {
+                        #Compare stdout and stderr in text mode so line ending changes won't matter
+                        $temp = compare_text("$outputdir/$testname/$subname/$_", "golden/$testname/$subname/$_",
+                                             sub { my ($a, $b) = @_;
+                                                   $a =~ s/\r//g;
+                                                   $b =~ s/\r//g;
+                                                   $a ne $b; } );
+                    } else {
+                        $temp = compare("$outputdir/$testname/$subname/$_", "golden/$testname/$subname/$_");
+                    }
+
+                    if($temp == 1) {
+                        #different
+                        $result = 1;
+                        $globalresult = 1;
+                        push @failedfiles, $_;
+                    } elsif($temp == -1) {
+                        #error
+                        print "Can't compare at $testname/$subname file $_\n";
+                        next TEST;
+                    }
+                } elsif (-f "golden/$testname/$subname/$_") {
+                    #File exists in golden but not in output
+                    $result = 1;
+                    $globalresult = 1;
+                    push @failedfiles, $_;
+                }
+            }
+
+            if($result == 0) {
+                print "Test $testname/$subname succeeded.\n" unless $quiet;
+            } elsif ($result == 1) {
+                print "Test $testname/$subname failed on @failedfiles.\n";
+                if($diff) {
+                    for(@failedfiles) {
+                        if($_ eq $stdoutfile or $_ eq $stderrfile) {
+                            system "diff -u golden/$testname/$subname/$_ $outputdir/$testname/$subname/$_";
+                            print "\n";
+                        }
+                    }
+                }
+            } else {
+                die "Impossible result";
+            }
+        }
+    }
+    close(TESTFILE);
+}
+
+my $nasm;
+my $clean = 0;
+my $diff = 0;
+my $golden = 0;
+my $help = 0;
+my $verbose = 0;
+
+GetOptions('clean' => \$clean,
+           'diff'=> \$diff,
+           'golden' => \$golden,
+           'help' => \$help,
+           'verbose' => \$verbose,
+           'nasm=s' => \$nasm
+          ) or pod2usage();
+
+pod2usage() if $help;
+die "Please specify either --nasm or --clean. Use --help for help.\n"
+unless $nasm or $clean;
+die "Please specify the test files, e.g. *.asm\n" unless @ARGV;
+
+unless (!defined $nasm or -x $nasm) {
+  warn "Warning: $nasm may not be executable. Expect problems.\n\n";
+  sleep 5;
+}
+
+perform($clean, $diff, $golden, $nasm, ! $verbose, $_) foreach @ARGV;
+exit $globalresult;
+
+__END__
+
+=head1 NAME
+
+performtest.pl - NASM regression tester based on golden files
+
+=head1 SYNOPSIS
+
+performtest.pl options testfile.asm ...
+
+Runs NASM on the specified test files and compare the results
+with "golden" output files.
+
+ Options:
+     --clean     Clean up test results (or golden files with --golden)
+     --diff      Execute diff when stdout or stderr don't match
+     --golden    Create golden files
+     --help      Get this help
+     --nasm=file Specify the file name for the NASM executable, e.g. ../nasm
+     --verbose   Get more output
+
+     If --clean is not specified, --nasm is required.
+
+ testfile.asm ...:
+    One or more files that NASM should be tested with,
+    often *.asm in the test directory.
+    It should contain one or more option lines at the start,
+    in the following format:
+
+;Testname=<testname>; Arguments=<arguments to nasm>; Files=<output files>
+
+    If no such lines are found at the start, the file is skipped.
+    testname should ideally describe the arguments, eg. unoptimized for -O0.
+    arguments can be an optimization level (-O), an output format (-f),
+    an output file specifier (-o) etc.
+    The output files should be a space separated list of files that will
+    be checked for regressions. This should often be the output file
+    and the special files stdout and stderr.
+
+Any mismatch could be a regression,
+but it doesn't have to be. COFF files have a timestamp which
+makes this method useless. ELF files have a comment section
+with the current version of NASM, so they will change each version number.
+
+=cut

_service:tar_scm:nasm-2.16.03.tar.xz/test/pextrw.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/pinsr16.asm Added

@@ -0,0 +1,53 @@
+;Testname=test; Arguments=-O0 -fbin -opinsr16.bin; Files=stdout stderr pinsr16.bin
+	bits 16
+
+	pinsrw mm0,eax,0
+	pinsrw mm1,si,0
+	pinsrw mm2,bx,0
+	pinsrw mm3,word bx,0
+
+	pinsrb xmm0,eax,0
+	pinsrb xmm1,sil,0
+;	pinsrb xmm1,bh,0
+	pinsrb xmm2,bx,0
+	pinsrb xmm3,byte bx,0
+
+	pinsrw xmm0,eax,0
+	pinsrw xmm1,si,0
+	pinsrw xmm2,bx,0
+	pinsrw xmm3,word bx,0
+
+	pinsrd xmm0,eax,0
+	pinsrd xmm1,esi,0
+	pinsrd xmm2,bx,0
+	pinsrd xmm3,dword bx,0
+
+	vpinsrb xmm0,eax,0
+	vpinsrb xmm1,bl,0
+	vpinsrb xmm2,bx,0
+	vpinsrb xmm3,byte bx,0
+
+	vpinsrw xmm0,eax,0
+	vpinsrw xmm1,si,0
+	vpinsrw xmm2,bx,0
+	vpinsrw xmm3,word bx,0
+
+	vpinsrd xmm0,eax,0
+	vpinsrd xmm1,esi,0
+	vpinsrd xmm2,bx,0
+	vpinsrd xmm3,dword bx,0
+
+	vpinsrb xmm4,xmm0,eax,0
+	vpinsrb xmm5,xmm1,bl,0
+	vpinsrb xmm6,xmm2,bx,0
+	vpinsrb xmm7,xmm3,byte bx,0
+
+	vpinsrw xmm4,xmm0,eax,0
+	vpinsrw xmm5,xmm1,si,0
+	vpinsrw xmm6,xmm2,bx,0
+	vpinsrw xmm7,xmm3,word bx,0
+
+	vpinsrd xmm4,xmm0,eax,0
+	vpinsrd xmm5,xmm1,esi,0
+	vpinsrd xmm6,xmm2,bx,0
+	vpinsrd xmm7,xmm3,dword bx,0

_service:tar_scm:nasm-2.16.03.tar.xz/test/pinsr32.asm Added

@@ -0,0 +1,53 @@
+;Testname=test; Arguments=-O0 -fbin -opinsr32.bin; Files=stdout stderr pinsr32.bin
+	bits 32
+
+	pinsrw mm0,eax,0
+	pinsrw mm1,si,0
+	pinsrw mm2,ecx,0
+	pinsrw mm3,word ecx,0
+
+	pinsrb xmm0,eax,0
+	pinsrb xmm1,sil,0
+;	pinsrb xmm1,bh,0
+	pinsrb xmm2,ecx,0
+	pinsrb xmm3,byte ecx,0
+
+	pinsrw xmm0,eax,0
+	pinsrw xmm1,si,0
+	pinsrw xmm2,ecx,0
+	pinsrw xmm3,word ecx,0
+
+	pinsrd xmm0,eax,0
+	pinsrd xmm1,esi,0
+	pinsrd xmm2,ecx,0
+	pinsrd xmm3,dword ecx,0
+
+	vpinsrb xmm0,eax,0
+	vpinsrb xmm1,bl,0
+	vpinsrb xmm2,ecx,0
+	vpinsrb xmm3,byte ecx,0
+
+	vpinsrw xmm0,eax,0
+	vpinsrw xmm1,si,0
+	vpinsrw xmm2,ecx,0
+	vpinsrw xmm3,word ecx,0
+
+	vpinsrd xmm0,eax,0
+	vpinsrd xmm1,esi,0
+	vpinsrd xmm2,ecx,0
+	vpinsrd xmm3,dword ecx,0
+
+	vpinsrb xmm4,xmm0,eax,0
+	vpinsrb xmm5,xmm1,bl,0
+	vpinsrb xmm6,xmm2,ecx,0
+	vpinsrb xmm7,xmm3,byte ecx,0
+
+	vpinsrw xmm4,xmm0,eax,0
+	vpinsrw xmm5,xmm1,si,0
+	vpinsrw xmm6,xmm2,ecx,0
+	vpinsrw xmm7,xmm3,word ecx,0
+
+	vpinsrd xmm4,xmm0,eax,0
+	vpinsrd xmm5,xmm1,esi,0
+	vpinsrd xmm6,xmm2,ecx,0
+	vpinsrd xmm7,xmm3,dword ecx,0

_service:tar_scm:nasm-2.16.03.tar.xz/test/pinsr64.asm Added

@@ -0,0 +1,68 @@
+;Testname=test; Arguments=-O0 -fbin -opinsr64.bin; Files=stdout stderr pinsr64.bin
+	bits 64
+
+	pinsrw mm0,eax,0
+	pinsrw mm1,si,0
+	pinsrw mm2,rcx,0
+	pinsrw mm3,word rcx,0
+
+	pinsrb xmm0,eax,0
+	pinsrb xmm1,sil,0
+;	pinsrb xmm1,bh,0
+	pinsrb xmm2,rcx,0
+	pinsrb xmm3,byte rcx,0
+
+	pinsrw xmm0,eax,0
+	pinsrw xmm1,si,0
+	pinsrw xmm2,rcx,0
+	pinsrw xmm3,word rcx,0
+
+	pinsrd xmm0,eax,0
+	pinsrd xmm1,esi,0
+	pinsrd xmm2,rcx,0
+	pinsrd xmm3,dword rcx,0
+
+	pinsrq xmm0,rax,0
+	pinsrq xmm1,rsi,0
+	pinsrq xmm2,rcx,0
+	pinsrq xmm3,qword rcx,0
+
+	vpinsrb xmm0,eax,0
+	vpinsrb xmm1,sil,0
+	vpinsrb xmm2,rcx,0
+	vpinsrb xmm3,byte rcx,0
+
+	vpinsrw xmm0,eax,0
+	vpinsrw xmm1,si,0
+	vpinsrw xmm2,rcx,0
+	vpinsrw xmm3,word rcx,0
+
+	vpinsrd xmm0,eax,0
+	vpinsrd xmm1,esi,0
+	vpinsrd xmm2,rcx,0
+	vpinsrd xmm3,dword rcx,0
+
+	vpinsrq xmm0,rax,0
+	vpinsrq xmm1,rsi,0
+	vpinsrq xmm2,rcx,0
+	vpinsrq xmm3,qword rcx,0
+
+	vpinsrb xmm4,xmm0,eax,0
+	vpinsrb xmm5,xmm1,sil,0
+	vpinsrb xmm6,xmm2,rcx,0
+	vpinsrb xmm7,xmm3,byte rcx,0
+
+	vpinsrw xmm4,xmm0,eax,0
+	vpinsrw xmm5,xmm1,si,0
+	vpinsrw xmm6,xmm2,rcx,0
+	vpinsrw xmm7,xmm3,word rcx,0
+
+	vpinsrd xmm4,xmm0,eax,0
+	vpinsrd xmm5,xmm1,esi,0
+	vpinsrd xmm6,xmm2,rcx,0
+	vpinsrd xmm7,xmm3,dword rcx,0
+
+	vpinsrq xmm4,xmm0,rax,0
+	vpinsrq xmm5,xmm1,rsi,0
+	vpinsrq xmm6,xmm2,rcx,0
+	vpinsrq xmm7,xmm3,qword rdx,0

_service:tar_scm:nasm-2.16.03.tar.xz/test/popcnt.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/ppindirect.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/pragma.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/prefix66.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/prefixsym.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/ptr.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/pushseg.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/r13.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/radix.asm Added

@@ -0,0 +1,54 @@
+;Testname=test; Arguments=-fbin -oradix.bin; Files=stdout stderr radix.bin
+
+	;;  Integer constants...
+
+	dd 1010_0101		; Decimal
+	dd 01010_0101		; Decimal (*not* octal!)
+	dd 0d1010_0101		; Decimal
+	dd 0t1010_0101		; Decimal
+	dd 1010_0101d		; Decimal
+	dd 1010_0101t		; Decimal
+
+	dd 0b1010_0101		; Binary
+	dd 0y1010_0101		; Binary
+	dd 1010_0101b		; Binary
+	dd 1010_0101y		; Binary
+
+	dd 0o1010_0101		; Octal
+	dd 0q1010_0101		; Octal
+	dd 1010_0101o		; Octal
+	dd 1010_0101q		; Octal
+
+	dd 0h1010_0101		; Hex
+	dd 0x1010_0101		; Hex
+	dd 1010_0101h		; Hex
+	dd 1010_0101x		; Hex
+	dd $1010_0101		; Hex
+
+	db 0h			; Zero!
+	db 0x			; Zero!
+	db 0b			; Zero!
+	db 0dh			; Hex
+	db 0bh			; Hex
+	db 0dx			; Hex
+	db 0bx			; Hex
+	db 0hd			; Hex
+	db 0hb			; Hex
+	db 0xd			; Hex
+	db 0xb			; Hex
+	
+	;; Floating-point constants
+	;; All of these should output B4A21147
+	dd 3.7282705e+4		; Decimal
+	dd 00003.7282705e+4	; Decimal
+	dd 0d3.7282705e+4	; Decimal
+	dd 0t3.7282705e+4	; Decimal
+
+	dd 0x1.23456789p+15	; Hex
+	dd 0h1.23456789p+15	; Hex
+	
+	dd 0o1.10642547422p+15	; Octal
+	dd 0q1.10642547422p+15	; Octal
+
+	dd 0b1.0010_0011_0100_0101_0110_0111_1000_1001p+15 ; Binary
+	dd 0y1.0010_0011_0100_0101_0110_0111_1000_1001p+15 ; Binary

_service:tar_scm:nasm-2.16.03.tar.xz/test/rdpid.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/reldef.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/relocs.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/require.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/ret.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/riprel.asm Added

@@ -0,0 +1,5357 @@
+;Testname=unoptimized; Arguments=-fbin -oriprel.bin -O0; Files=stdout stderr riprel.bin
+;Testname=optimized;   Arguments=-fbin -oriprel.bin -Ox; Files=stdout stderr riprel.bin
+	bits 64
+
+	default abs
+
+	mov al,foo
+	mov bl,foo
+	mov ax,foo
+	mov bx,foo
+	mov eax,foo
+	mov ebx,foo
+	mov rax,foo
+	mov rbx,foo
+	mov al,0xaaaaaaaaaaaaaaaa
+	mov bl,0xaaaaaaaaaaaaaaaa
+	mov ax,0xaaaaaaaaaaaaaaaa
+	mov bx,0xaaaaaaaaaaaaaaaa
+	mov eax,0xaaaaaaaaaaaaaaaa
+	mov ebx,0xaaaaaaaaaaaaaaaa
+	mov rax,0xaaaaaaaaaaaaaaaa
+	mov rbx,0xaaaaaaaaaaaaaaaa
+	mov al,0xbbbbbbbb
+	mov bl,0xbbbbbbbb
+	mov ax,0xbbbbbbbb
+	mov bx,0xbbbbbbbb
+	mov eax,0xbbbbbbbb
+	mov ebx,0xbbbbbbbb
+	mov rax,0xbbbbbbbb
+	mov rbx,0xbbbbbbbb
+	mov al,0xffffffffcccccccc
+	mov bl,0xffffffffcccccccc
+	mov ax,0xffffffffcccccccc
+	mov bx,0xffffffffcccccccc
+	mov eax,0xffffffffcccccccc
+	mov ebx,0xffffffffcccccccc
+	mov rax,0xffffffffcccccccc
+	mov rbx,0xffffffffcccccccc
+
+	mov al,dword foo
+	mov bl,dword foo
+	mov ax,dword foo
+	mov bx,dword foo
+	mov eax,dword foo
+	mov ebx,dword foo
+	mov rax,dword foo
+	mov rbx,dword foo
+	mov al,dword 0xaaaaaaaaaaaaaaaa
+	mov bl,dword 0xaaaaaaaaaaaaaaaa
+	mov ax,dword 0xaaaaaaaaaaaaaaaa
+	mov bx,dword 0xaaaaaaaaaaaaaaaa
+	mov eax,dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,dword 0xaaaaaaaaaaaaaaaa
+	mov rax,dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,dword 0xaaaaaaaaaaaaaaaa
+	mov al,dword 0xbbbbbbbb
+	mov bl,dword 0xbbbbbbbb
+	mov ax,dword 0xbbbbbbbb
+	mov bx,dword 0xbbbbbbbb
+	mov eax,dword 0xbbbbbbbb
+	mov ebx,dword 0xbbbbbbbb
+	mov rax,dword 0xbbbbbbbb
+	mov rbx,dword 0xbbbbbbbb
+	mov al,dword 0xffffffffcccccccc
+	mov bl,dword 0xffffffffcccccccc
+	mov ax,dword 0xffffffffcccccccc
+	mov bx,dword 0xffffffffcccccccc
+	mov eax,dword 0xffffffffcccccccc
+	mov ebx,dword 0xffffffffcccccccc
+	mov rax,dword 0xffffffffcccccccc
+	mov rbx,dword 0xffffffffcccccccc
+
+	mov al,qword foo
+	mov bl,qword foo
+	mov ax,qword foo
+	mov bx,qword foo
+	mov eax,qword foo
+	mov ebx,qword foo
+	mov rax,qword foo
+	mov rbx,qword foo
+	mov al,qword 0xaaaaaaaaaaaaaaaa
+	mov bl,qword 0xaaaaaaaaaaaaaaaa
+	mov ax,qword 0xaaaaaaaaaaaaaaaa
+	mov bx,qword 0xaaaaaaaaaaaaaaaa
+	mov eax,qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,qword 0xaaaaaaaaaaaaaaaa
+	mov rax,qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,qword 0xaaaaaaaaaaaaaaaa
+	mov al,qword 0xbbbbbbbb
+	mov bl,qword 0xbbbbbbbb
+	mov ax,qword 0xbbbbbbbb
+	mov bx,qword 0xbbbbbbbb
+	mov eax,qword 0xbbbbbbbb
+	mov ebx,qword 0xbbbbbbbb
+	mov rax,qword 0xbbbbbbbb
+	mov rbx,qword 0xbbbbbbbb
+	mov al,qword 0xffffffffcccccccc
+	mov bl,qword 0xffffffffcccccccc
+	mov ax,qword 0xffffffffcccccccc
+	mov bx,qword 0xffffffffcccccccc
+	mov eax,qword 0xffffffffcccccccc
+	mov ebx,qword 0xffffffffcccccccc
+	mov rax,qword 0xffffffffcccccccc
+	mov rbx,qword 0xffffffffcccccccc
+
+	mov al,a64 foo
+	mov bl,a64 foo
+	mov ax,a64 foo
+	mov bx,a64 foo
+	mov eax,a64 foo
+	mov ebx,a64 foo
+	mov rax,a64 foo
+	mov rbx,a64 foo
+	mov al,a64 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 0xaaaaaaaaaaaaaaaa
+	mov al,a64 0xbbbbbbbb
+	mov bl,a64 0xbbbbbbbb
+	mov ax,a64 0xbbbbbbbb
+	mov bx,a64 0xbbbbbbbb
+	mov eax,a64 0xbbbbbbbb
+	mov ebx,a64 0xbbbbbbbb
+	mov rax,a64 0xbbbbbbbb
+	mov rbx,a64 0xbbbbbbbb
+	mov al,a64 0xffffffffcccccccc
+	mov bl,a64 0xffffffffcccccccc
+	mov ax,a64 0xffffffffcccccccc
+	mov bx,a64 0xffffffffcccccccc
+	mov eax,a64 0xffffffffcccccccc
+	mov ebx,a64 0xffffffffcccccccc
+	mov rax,a64 0xffffffffcccccccc
+	mov rbx,a64 0xffffffffcccccccc
+
+	mov al,a64 dword foo
+	mov bl,a64 dword foo
+	mov ax,a64 dword foo
+	mov bx,a64 dword foo
+	mov eax,a64 dword foo
+	mov ebx,a64 dword foo
+	mov rax,a64 dword foo
+	mov rbx,a64 dword foo
+	mov al,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov al,a64 dword 0xbbbbbbbb
+	mov bl,a64 dword 0xbbbbbbbb
+	mov ax,a64 dword 0xbbbbbbbb
+	mov bx,a64 dword 0xbbbbbbbb
+	mov eax,a64 dword 0xbbbbbbbb
+	mov ebx,a64 dword 0xbbbbbbbb
+	mov rax,a64 dword 0xbbbbbbbb
+	mov rbx,a64 dword 0xbbbbbbbb
+	mov al,a64 dword 0xffffffffcccccccc
+	mov bl,a64 dword 0xffffffffcccccccc
+	mov ax,a64 dword 0xffffffffcccccccc
+	mov bx,a64 dword 0xffffffffcccccccc
+	mov eax,a64 dword 0xffffffffcccccccc
+	mov ebx,a64 dword 0xffffffffcccccccc
+	mov rax,a64 dword 0xffffffffcccccccc
+	mov rbx,a64 dword 0xffffffffcccccccc
+
+	mov al,a64 qword foo
+	mov bl,a64 qword foo
+	mov ax,a64 qword foo
+	mov bx,a64 qword foo
+	mov eax,a64 qword foo
+	mov ebx,a64 qword foo
+	mov rax,a64 qword foo
+	mov rbx,a64 qword foo
+	mov al,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov al,a64 qword 0xbbbbbbbb
+	mov bl,a64 qword 0xbbbbbbbb
+	mov ax,a64 qword 0xbbbbbbbb
+	mov bx,a64 qword 0xbbbbbbbb
+	mov eax,a64 qword 0xbbbbbbbb
+	mov ebx,a64 qword 0xbbbbbbbb
+	mov rax,a64 qword 0xbbbbbbbb
+	mov rbx,a64 qword 0xbbbbbbbb
+	mov al,a64 qword 0xffffffffcccccccc
+	mov bl,a64 qword 0xffffffffcccccccc
+	mov ax,a64 qword 0xffffffffcccccccc
+	mov bx,a64 qword 0xffffffffcccccccc
+	mov eax,a64 qword 0xffffffffcccccccc
+	mov ebx,a64 qword 0xffffffffcccccccc
+	mov rax,a64 qword 0xffffffffcccccccc
+	mov rbx,a64 qword 0xffffffffcccccccc
+
+	mov al,a32 foo
+	mov bl,a32 foo
+	mov ax,a32 foo
+	mov bx,a32 foo
+	mov eax,a32 foo
+	mov ebx,a32 foo
+	mov rax,a32 foo
+	mov rbx,a32 foo
+	mov al,a32 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 0xaaaaaaaaaaaaaaaa
+	mov al,a32 0xbbbbbbbb
+	mov bl,a32 0xbbbbbbbb
+	mov ax,a32 0xbbbbbbbb
+	mov bx,a32 0xbbbbbbbb
+	mov eax,a32 0xbbbbbbbb
+	mov ebx,a32 0xbbbbbbbb
+	mov rax,a32 0xbbbbbbbb
+	mov rbx,a32 0xbbbbbbbb
+	mov al,a32 0xffffffffcccccccc
+	mov bl,a32 0xffffffffcccccccc
+	mov ax,a32 0xffffffffcccccccc
+	mov bx,a32 0xffffffffcccccccc
+	mov eax,a32 0xffffffffcccccccc
+	mov ebx,a32 0xffffffffcccccccc
+	mov rax,a32 0xffffffffcccccccc
+	mov rbx,a32 0xffffffffcccccccc
+
+	mov al,a32 dword foo
+	mov bl,a32 dword foo
+	mov ax,a32 dword foo
+	mov bx,a32 dword foo
+	mov eax,a32 dword foo
+	mov ebx,a32 dword foo
+	mov rax,a32 dword foo
+	mov rbx,a32 dword foo
+	mov al,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov al,a32 dword 0xbbbbbbbb
+	mov bl,a32 dword 0xbbbbbbbb
+	mov ax,a32 dword 0xbbbbbbbb
+	mov bx,a32 dword 0xbbbbbbbb
+	mov eax,a32 dword 0xbbbbbbbb
+	mov ebx,a32 dword 0xbbbbbbbb
+	mov rax,a32 dword 0xbbbbbbbb
+	mov rbx,a32 dword 0xbbbbbbbb
+	mov al,a32 dword 0xffffffffcccccccc
+	mov bl,a32 dword 0xffffffffcccccccc
+	mov ax,a32 dword 0xffffffffcccccccc
+	mov bx,a32 dword 0xffffffffcccccccc
+	mov eax,a32 dword 0xffffffffcccccccc
+	mov ebx,a32 dword 0xffffffffcccccccc
+	mov rax,a32 dword 0xffffffffcccccccc
+	mov rbx,a32 dword 0xffffffffcccccccc
+
+	mov al,a32 qword foo
+	mov bl,a32 qword foo
+	mov ax,a32 qword foo
+	mov bx,a32 qword foo
+	mov eax,a32 qword foo
+	mov ebx,a32 qword foo
+	mov rax,a32 qword foo
+	mov rbx,a32 qword foo
+	mov al,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov al,a32 qword 0xbbbbbbbb
+	mov bl,a32 qword 0xbbbbbbbb
+	mov ax,a32 qword 0xbbbbbbbb
+	mov bx,a32 qword 0xbbbbbbbb
+	mov eax,a32 qword 0xbbbbbbbb
+	mov ebx,a32 qword 0xbbbbbbbb
+	mov rax,a32 qword 0xbbbbbbbb
+	mov rbx,a32 qword 0xbbbbbbbb
+	mov al,a32 qword 0xffffffffcccccccc
+	mov bl,a32 qword 0xffffffffcccccccc
+	mov ax,a32 qword 0xffffffffcccccccc
+	mov bx,a32 qword 0xffffffffcccccccc
+	mov eax,a32 qword 0xffffffffcccccccc
+	mov ebx,a32 qword 0xffffffffcccccccc
+	mov rax,a32 qword 0xffffffffcccccccc
+	mov rbx,a32 qword 0xffffffffcccccccc
+
+	mov al,abs foo
+	mov bl,abs foo
+	mov ax,abs foo
+	mov bx,abs foo
+	mov eax,abs foo
+	mov ebx,abs foo
+	mov rax,abs foo
+	mov rbx,abs foo
+	mov al,abs 0xaaaaaaaaaaaaaaaa
+	mov bl,abs 0xaaaaaaaaaaaaaaaa
+	mov ax,abs 0xaaaaaaaaaaaaaaaa
+	mov bx,abs 0xaaaaaaaaaaaaaaaa
+	mov eax,abs 0xaaaaaaaaaaaaaaaa
+	mov ebx,abs 0xaaaaaaaaaaaaaaaa
+	mov rax,abs 0xaaaaaaaaaaaaaaaa
+	mov rbx,abs 0xaaaaaaaaaaaaaaaa
+	mov al,abs 0xbbbbbbbb
+	mov bl,abs 0xbbbbbbbb
+	mov ax,abs 0xbbbbbbbb
+	mov bx,abs 0xbbbbbbbb
+	mov eax,abs 0xbbbbbbbb
+	mov ebx,abs 0xbbbbbbbb
+	mov rax,abs 0xbbbbbbbb
+	mov rbx,abs 0xbbbbbbbb
+	mov al,abs 0xffffffffcccccccc
+	mov bl,abs 0xffffffffcccccccc
+	mov ax,abs 0xffffffffcccccccc
+	mov bx,abs 0xffffffffcccccccc
+	mov eax,abs 0xffffffffcccccccc
+	mov ebx,abs 0xffffffffcccccccc
+	mov rax,abs 0xffffffffcccccccc
+	mov rbx,abs 0xffffffffcccccccc
+
+	mov al,abs dword foo
+	mov bl,abs dword foo
+	mov ax,abs dword foo
+	mov bx,abs dword foo
+	mov eax,abs dword foo
+	mov ebx,abs dword foo
+	mov rax,abs dword foo
+	mov rbx,abs dword foo
+	mov al,abs dword 0xaaaaaaaaaaaaaaaa
+	mov bl,abs dword 0xaaaaaaaaaaaaaaaa
+	mov ax,abs dword 0xaaaaaaaaaaaaaaaa
+	mov bx,abs dword 0xaaaaaaaaaaaaaaaa
+	mov eax,abs dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,abs dword 0xaaaaaaaaaaaaaaaa
+	mov rax,abs dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,abs dword 0xaaaaaaaaaaaaaaaa
+	mov al,abs dword 0xbbbbbbbb
+	mov bl,abs dword 0xbbbbbbbb
+	mov ax,abs dword 0xbbbbbbbb
+	mov bx,abs dword 0xbbbbbbbb
+	mov eax,abs dword 0xbbbbbbbb
+	mov ebx,abs dword 0xbbbbbbbb
+	mov rax,abs dword 0xbbbbbbbb
+	mov rbx,abs dword 0xbbbbbbbb
+	mov al,abs dword 0xffffffffcccccccc
+	mov bl,abs dword 0xffffffffcccccccc
+	mov ax,abs dword 0xffffffffcccccccc
+	mov bx,abs dword 0xffffffffcccccccc
+	mov eax,abs dword 0xffffffffcccccccc
+	mov ebx,abs dword 0xffffffffcccccccc
+	mov rax,abs dword 0xffffffffcccccccc
+	mov rbx,abs dword 0xffffffffcccccccc
+
+	mov al,abs qword foo
+	mov bl,abs qword foo
+	mov ax,abs qword foo
+	mov bx,abs qword foo
+	mov eax,abs qword foo
+	mov ebx,abs qword foo
+	mov rax,abs qword foo
+	mov rbx,abs qword foo
+	mov al,abs qword 0xaaaaaaaaaaaaaaaa
+	mov bl,abs qword 0xaaaaaaaaaaaaaaaa
+	mov ax,abs qword 0xaaaaaaaaaaaaaaaa
+	mov bx,abs qword 0xaaaaaaaaaaaaaaaa
+	mov eax,abs qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,abs qword 0xaaaaaaaaaaaaaaaa
+	mov rax,abs qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,abs qword 0xaaaaaaaaaaaaaaaa
+	mov al,abs qword 0xbbbbbbbb
+	mov bl,abs qword 0xbbbbbbbb
+	mov ax,abs qword 0xbbbbbbbb
+	mov bx,abs qword 0xbbbbbbbb
+	mov eax,abs qword 0xbbbbbbbb
+	mov ebx,abs qword 0xbbbbbbbb
+	mov rax,abs qword 0xbbbbbbbb
+	mov rbx,abs qword 0xbbbbbbbb
+	mov al,abs qword 0xffffffffcccccccc
+	mov bl,abs qword 0xffffffffcccccccc
+	mov ax,abs qword 0xffffffffcccccccc
+	mov bx,abs qword 0xffffffffcccccccc
+	mov eax,abs qword 0xffffffffcccccccc
+	mov ebx,abs qword 0xffffffffcccccccc
+	mov rax,abs qword 0xffffffffcccccccc
+	mov rbx,abs qword 0xffffffffcccccccc
+
+	mov al,a64 abs foo
+	mov bl,a64 abs foo
+	mov ax,a64 abs foo
+	mov bx,a64 abs foo
+	mov eax,a64 abs foo
+	mov ebx,a64 abs foo
+	mov rax,a64 abs foo
+	mov rbx,a64 abs foo
+	mov al,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs 0xbbbbbbbb
+	mov bl,a64 abs 0xbbbbbbbb
+	mov ax,a64 abs 0xbbbbbbbb
+	mov bx,a64 abs 0xbbbbbbbb
+	mov eax,a64 abs 0xbbbbbbbb
+	mov ebx,a64 abs 0xbbbbbbbb
+	mov rax,a64 abs 0xbbbbbbbb
+	mov rbx,a64 abs 0xbbbbbbbb
+	mov al,a64 abs 0xffffffffcccccccc
+	mov bl,a64 abs 0xffffffffcccccccc
+	mov ax,a64 abs 0xffffffffcccccccc
+	mov bx,a64 abs 0xffffffffcccccccc
+	mov eax,a64 abs 0xffffffffcccccccc
+	mov ebx,a64 abs 0xffffffffcccccccc
+	mov rax,a64 abs 0xffffffffcccccccc
+	mov rbx,a64 abs 0xffffffffcccccccc
+
+	mov al,a64 abs dword foo
+	mov bl,a64 abs dword foo
+	mov ax,a64 abs dword foo
+	mov bx,a64 abs dword foo
+	mov eax,a64 abs dword foo
+	mov ebx,a64 abs dword foo
+	mov rax,a64 abs dword foo
+	mov rbx,a64 abs dword foo
+	mov al,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs dword 0xbbbbbbbb
+	mov bl,a64 abs dword 0xbbbbbbbb
+	mov ax,a64 abs dword 0xbbbbbbbb
+	mov bx,a64 abs dword 0xbbbbbbbb
+	mov eax,a64 abs dword 0xbbbbbbbb
+	mov ebx,a64 abs dword 0xbbbbbbbb
+	mov rax,a64 abs dword 0xbbbbbbbb
+	mov rbx,a64 abs dword 0xbbbbbbbb
+	mov al,a64 abs dword 0xffffffffcccccccc
+	mov bl,a64 abs dword 0xffffffffcccccccc
+	mov ax,a64 abs dword 0xffffffffcccccccc
+	mov bx,a64 abs dword 0xffffffffcccccccc
+	mov eax,a64 abs dword 0xffffffffcccccccc
+	mov ebx,a64 abs dword 0xffffffffcccccccc
+	mov rax,a64 abs dword 0xffffffffcccccccc
+	mov rbx,a64 abs dword 0xffffffffcccccccc
+
+	mov al,a64 abs qword foo
+	mov bl,a64 abs qword foo
+	mov ax,a64 abs qword foo
+	mov bx,a64 abs qword foo
+	mov eax,a64 abs qword foo
+	mov ebx,a64 abs qword foo
+	mov rax,a64 abs qword foo
+	mov rbx,a64 abs qword foo
+	mov al,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs qword 0xbbbbbbbb
+	mov bl,a64 abs qword 0xbbbbbbbb
+	mov ax,a64 abs qword 0xbbbbbbbb
+	mov bx,a64 abs qword 0xbbbbbbbb
+	mov eax,a64 abs qword 0xbbbbbbbb
+	mov ebx,a64 abs qword 0xbbbbbbbb
+	mov rax,a64 abs qword 0xbbbbbbbb
+	mov rbx,a64 abs qword 0xbbbbbbbb
+	mov al,a64 abs qword 0xffffffffcccccccc
+	mov bl,a64 abs qword 0xffffffffcccccccc
+	mov ax,a64 abs qword 0xffffffffcccccccc
+	mov bx,a64 abs qword 0xffffffffcccccccc
+	mov eax,a64 abs qword 0xffffffffcccccccc
+	mov ebx,a64 abs qword 0xffffffffcccccccc
+	mov rax,a64 abs qword 0xffffffffcccccccc
+	mov rbx,a64 abs qword 0xffffffffcccccccc
+
+	mov al,a32 abs foo
+	mov bl,a32 abs foo
+	mov ax,a32 abs foo
+	mov bx,a32 abs foo
+	mov eax,a32 abs foo
+	mov ebx,a32 abs foo
+	mov rax,a32 abs foo
+	mov rbx,a32 abs foo
+	mov al,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs 0xbbbbbbbb
+	mov bl,a32 abs 0xbbbbbbbb
+	mov ax,a32 abs 0xbbbbbbbb
+	mov bx,a32 abs 0xbbbbbbbb
+	mov eax,a32 abs 0xbbbbbbbb
+	mov ebx,a32 abs 0xbbbbbbbb
+	mov rax,a32 abs 0xbbbbbbbb
+	mov rbx,a32 abs 0xbbbbbbbb
+	mov al,a32 abs 0xffffffffcccccccc
+	mov bl,a32 abs 0xffffffffcccccccc
+	mov ax,a32 abs 0xffffffffcccccccc
+	mov bx,a32 abs 0xffffffffcccccccc
+	mov eax,a32 abs 0xffffffffcccccccc
+	mov ebx,a32 abs 0xffffffffcccccccc
+	mov rax,a32 abs 0xffffffffcccccccc
+	mov rbx,a32 abs 0xffffffffcccccccc
+
+	mov al,a32 abs dword foo
+	mov bl,a32 abs dword foo
+	mov ax,a32 abs dword foo
+	mov bx,a32 abs dword foo
+	mov eax,a32 abs dword foo
+	mov ebx,a32 abs dword foo
+	mov rax,a32 abs dword foo
+	mov rbx,a32 abs dword foo
+	mov al,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs dword 0xbbbbbbbb
+	mov bl,a32 abs dword 0xbbbbbbbb
+	mov ax,a32 abs dword 0xbbbbbbbb
+	mov bx,a32 abs dword 0xbbbbbbbb
+	mov eax,a32 abs dword 0xbbbbbbbb
+	mov ebx,a32 abs dword 0xbbbbbbbb
+	mov rax,a32 abs dword 0xbbbbbbbb
+	mov rbx,a32 abs dword 0xbbbbbbbb
+	mov al,a32 abs dword 0xffffffffcccccccc
+	mov bl,a32 abs dword 0xffffffffcccccccc
+	mov ax,a32 abs dword 0xffffffffcccccccc
+	mov bx,a32 abs dword 0xffffffffcccccccc
+	mov eax,a32 abs dword 0xffffffffcccccccc
+	mov ebx,a32 abs dword 0xffffffffcccccccc
+	mov rax,a32 abs dword 0xffffffffcccccccc
+	mov rbx,a32 abs dword 0xffffffffcccccccc
+
+	mov al,a32 abs qword foo
+	mov bl,a32 abs qword foo
+	mov ax,a32 abs qword foo
+	mov bx,a32 abs qword foo
+	mov eax,a32 abs qword foo
+	mov ebx,a32 abs qword foo
+	mov rax,a32 abs qword foo
+	mov rbx,a32 abs qword foo
+	mov al,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs qword 0xbbbbbbbb
+	mov bl,a32 abs qword 0xbbbbbbbb
+	mov ax,a32 abs qword 0xbbbbbbbb
+	mov bx,a32 abs qword 0xbbbbbbbb
+	mov eax,a32 abs qword 0xbbbbbbbb
+	mov ebx,a32 abs qword 0xbbbbbbbb
+	mov rax,a32 abs qword 0xbbbbbbbb
+	mov rbx,a32 abs qword 0xbbbbbbbb
+	mov al,a32 abs qword 0xffffffffcccccccc
+	mov bl,a32 abs qword 0xffffffffcccccccc
+	mov ax,a32 abs qword 0xffffffffcccccccc
+	mov bx,a32 abs qword 0xffffffffcccccccc
+	mov eax,a32 abs qword 0xffffffffcccccccc
+	mov ebx,a32 abs qword 0xffffffffcccccccc
+	mov rax,a32 abs qword 0xffffffffcccccccc
+	mov rbx,a32 abs qword 0xffffffffcccccccc
+
+	mov al,rel foo
+	mov bl,rel foo
+	mov ax,rel foo
+	mov bx,rel foo
+	mov eax,rel foo
+	mov ebx,rel foo
+	mov rax,rel foo
+	mov rbx,rel foo
+	mov al,rel 0xaaaaaaaaaaaaaaaa
+	mov bl,rel 0xaaaaaaaaaaaaaaaa
+	mov ax,rel 0xaaaaaaaaaaaaaaaa
+	mov bx,rel 0xaaaaaaaaaaaaaaaa
+	mov eax,rel 0xaaaaaaaaaaaaaaaa
+	mov ebx,rel 0xaaaaaaaaaaaaaaaa
+	mov rax,rel 0xaaaaaaaaaaaaaaaa
+	mov rbx,rel 0xaaaaaaaaaaaaaaaa
+	mov al,rel 0xbbbbbbbb
+	mov bl,rel 0xbbbbbbbb
+	mov ax,rel 0xbbbbbbbb
+	mov bx,rel 0xbbbbbbbb
+	mov eax,rel 0xbbbbbbbb
+	mov ebx,rel 0xbbbbbbbb
+	mov rax,rel 0xbbbbbbbb
+	mov rbx,rel 0xbbbbbbbb
+	mov al,rel 0xffffffffcccccccc
+	mov bl,rel 0xffffffffcccccccc
+	mov ax,rel 0xffffffffcccccccc
+	mov bx,rel 0xffffffffcccccccc
+	mov eax,rel 0xffffffffcccccccc
+	mov ebx,rel 0xffffffffcccccccc
+	mov rax,rel 0xffffffffcccccccc
+	mov rbx,rel 0xffffffffcccccccc
+
+	mov al,rel dword foo
+	mov bl,rel dword foo
+	mov ax,rel dword foo
+	mov bx,rel dword foo
+	mov eax,rel dword foo
+	mov ebx,rel dword foo
+	mov rax,rel dword foo
+	mov rbx,rel dword foo
+	mov al,rel dword 0xaaaaaaaaaaaaaaaa
+	mov bl,rel dword 0xaaaaaaaaaaaaaaaa
+	mov ax,rel dword 0xaaaaaaaaaaaaaaaa
+	mov bx,rel dword 0xaaaaaaaaaaaaaaaa
+	mov eax,rel dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,rel dword 0xaaaaaaaaaaaaaaaa
+	mov rax,rel dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,rel dword 0xaaaaaaaaaaaaaaaa
+	mov al,rel dword 0xbbbbbbbb
+	mov bl,rel dword 0xbbbbbbbb
+	mov ax,rel dword 0xbbbbbbbb
+	mov bx,rel dword 0xbbbbbbbb
+	mov eax,rel dword 0xbbbbbbbb
+	mov ebx,rel dword 0xbbbbbbbb
+	mov rax,rel dword 0xbbbbbbbb
+	mov rbx,rel dword 0xbbbbbbbb
+	mov al,rel dword 0xffffffffcccccccc
+	mov bl,rel dword 0xffffffffcccccccc
+	mov ax,rel dword 0xffffffffcccccccc
+	mov bx,rel dword 0xffffffffcccccccc
+	mov eax,rel dword 0xffffffffcccccccc
+	mov ebx,rel dword 0xffffffffcccccccc
+	mov rax,rel dword 0xffffffffcccccccc
+	mov rbx,rel dword 0xffffffffcccccccc
+
+	mov al,rel qword foo
+	mov bl,rel qword foo
+	mov ax,rel qword foo
+	mov bx,rel qword foo
+	mov eax,rel qword foo
+	mov ebx,rel qword foo
+	mov rax,rel qword foo
+	mov rbx,rel qword foo
+	mov al,rel qword 0xaaaaaaaaaaaaaaaa
+	mov bl,rel qword 0xaaaaaaaaaaaaaaaa
+	mov ax,rel qword 0xaaaaaaaaaaaaaaaa
+	mov bx,rel qword 0xaaaaaaaaaaaaaaaa
+	mov eax,rel qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,rel qword 0xaaaaaaaaaaaaaaaa
+	mov rax,rel qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,rel qword 0xaaaaaaaaaaaaaaaa
+	mov al,rel qword 0xbbbbbbbb
+	mov bl,rel qword 0xbbbbbbbb
+	mov ax,rel qword 0xbbbbbbbb
+	mov bx,rel qword 0xbbbbbbbb
+	mov eax,rel qword 0xbbbbbbbb
+	mov ebx,rel qword 0xbbbbbbbb
+	mov rax,rel qword 0xbbbbbbbb
+	mov rbx,rel qword 0xbbbbbbbb
+	mov al,rel qword 0xffffffffcccccccc
+	mov bl,rel qword 0xffffffffcccccccc
+	mov ax,rel qword 0xffffffffcccccccc
+	mov bx,rel qword 0xffffffffcccccccc
+	mov eax,rel qword 0xffffffffcccccccc
+	mov ebx,rel qword 0xffffffffcccccccc
+	mov rax,rel qword 0xffffffffcccccccc
+	mov rbx,rel qword 0xffffffffcccccccc
+
+	mov al,a64 rel foo
+	mov bl,a64 rel foo
+	mov ax,a64 rel foo
+	mov bx,a64 rel foo
+	mov eax,a64 rel foo
+	mov ebx,a64 rel foo
+	mov rax,a64 rel foo
+	mov rbx,a64 rel foo
+	mov al,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel 0xbbbbbbbb
+	mov bl,a64 rel 0xbbbbbbbb
+	mov ax,a64 rel 0xbbbbbbbb
+	mov bx,a64 rel 0xbbbbbbbb
+	mov eax,a64 rel 0xbbbbbbbb
+	mov ebx,a64 rel 0xbbbbbbbb
+	mov rax,a64 rel 0xbbbbbbbb
+	mov rbx,a64 rel 0xbbbbbbbb
+	mov al,a64 rel 0xffffffffcccccccc
+	mov bl,a64 rel 0xffffffffcccccccc
+	mov ax,a64 rel 0xffffffffcccccccc
+	mov bx,a64 rel 0xffffffffcccccccc
+	mov eax,a64 rel 0xffffffffcccccccc
+	mov ebx,a64 rel 0xffffffffcccccccc
+	mov rax,a64 rel 0xffffffffcccccccc
+	mov rbx,a64 rel 0xffffffffcccccccc
+
+	mov al,a64 rel dword foo
+	mov bl,a64 rel dword foo
+	mov ax,a64 rel dword foo
+	mov bx,a64 rel dword foo
+	mov eax,a64 rel dword foo
+	mov ebx,a64 rel dword foo
+	mov rax,a64 rel dword foo
+	mov rbx,a64 rel dword foo
+	mov al,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel dword 0xbbbbbbbb
+	mov bl,a64 rel dword 0xbbbbbbbb
+	mov ax,a64 rel dword 0xbbbbbbbb
+	mov bx,a64 rel dword 0xbbbbbbbb
+	mov eax,a64 rel dword 0xbbbbbbbb
+	mov ebx,a64 rel dword 0xbbbbbbbb
+	mov rax,a64 rel dword 0xbbbbbbbb
+	mov rbx,a64 rel dword 0xbbbbbbbb
+	mov al,a64 rel dword 0xffffffffcccccccc
+	mov bl,a64 rel dword 0xffffffffcccccccc
+	mov ax,a64 rel dword 0xffffffffcccccccc
+	mov bx,a64 rel dword 0xffffffffcccccccc
+	mov eax,a64 rel dword 0xffffffffcccccccc
+	mov ebx,a64 rel dword 0xffffffffcccccccc
+	mov rax,a64 rel dword 0xffffffffcccccccc
+	mov rbx,a64 rel dword 0xffffffffcccccccc
+
+	mov al,a64 rel qword foo
+	mov bl,a64 rel qword foo
+	mov ax,a64 rel qword foo
+	mov bx,a64 rel qword foo
+	mov eax,a64 rel qword foo
+	mov ebx,a64 rel qword foo
+	mov rax,a64 rel qword foo
+	mov rbx,a64 rel qword foo
+	mov al,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel qword 0xbbbbbbbb
+	mov bl,a64 rel qword 0xbbbbbbbb
+	mov ax,a64 rel qword 0xbbbbbbbb
+	mov bx,a64 rel qword 0xbbbbbbbb
+	mov eax,a64 rel qword 0xbbbbbbbb
+	mov ebx,a64 rel qword 0xbbbbbbbb
+	mov rax,a64 rel qword 0xbbbbbbbb
+	mov rbx,a64 rel qword 0xbbbbbbbb
+	mov al,a64 rel qword 0xffffffffcccccccc
+	mov bl,a64 rel qword 0xffffffffcccccccc
+	mov ax,a64 rel qword 0xffffffffcccccccc
+	mov bx,a64 rel qword 0xffffffffcccccccc
+	mov eax,a64 rel qword 0xffffffffcccccccc
+	mov ebx,a64 rel qword 0xffffffffcccccccc
+	mov rax,a64 rel qword 0xffffffffcccccccc
+	mov rbx,a64 rel qword 0xffffffffcccccccc
+
+	mov al,a32 rel foo
+	mov bl,a32 rel foo
+	mov ax,a32 rel foo
+	mov bx,a32 rel foo
+	mov eax,a32 rel foo
+	mov ebx,a32 rel foo
+	mov rax,a32 rel foo
+	mov rbx,a32 rel foo
+	mov al,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel 0xbbbbbbbb
+	mov bl,a32 rel 0xbbbbbbbb
+	mov ax,a32 rel 0xbbbbbbbb
+	mov bx,a32 rel 0xbbbbbbbb
+	mov eax,a32 rel 0xbbbbbbbb
+	mov ebx,a32 rel 0xbbbbbbbb
+	mov rax,a32 rel 0xbbbbbbbb
+	mov rbx,a32 rel 0xbbbbbbbb
+	mov al,a32 rel 0xffffffffcccccccc
+	mov bl,a32 rel 0xffffffffcccccccc
+	mov ax,a32 rel 0xffffffffcccccccc
+	mov bx,a32 rel 0xffffffffcccccccc
+	mov eax,a32 rel 0xffffffffcccccccc
+	mov ebx,a32 rel 0xffffffffcccccccc
+	mov rax,a32 rel 0xffffffffcccccccc
+	mov rbx,a32 rel 0xffffffffcccccccc
+
+	mov al,a32 rel dword foo
+	mov bl,a32 rel dword foo
+	mov ax,a32 rel dword foo
+	mov bx,a32 rel dword foo
+	mov eax,a32 rel dword foo
+	mov ebx,a32 rel dword foo
+	mov rax,a32 rel dword foo
+	mov rbx,a32 rel dword foo
+	mov al,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel dword 0xbbbbbbbb
+	mov bl,a32 rel dword 0xbbbbbbbb
+	mov ax,a32 rel dword 0xbbbbbbbb
+	mov bx,a32 rel dword 0xbbbbbbbb
+	mov eax,a32 rel dword 0xbbbbbbbb
+	mov ebx,a32 rel dword 0xbbbbbbbb
+	mov rax,a32 rel dword 0xbbbbbbbb
+	mov rbx,a32 rel dword 0xbbbbbbbb
+	mov al,a32 rel dword 0xffffffffcccccccc
+	mov bl,a32 rel dword 0xffffffffcccccccc
+	mov ax,a32 rel dword 0xffffffffcccccccc
+	mov bx,a32 rel dword 0xffffffffcccccccc
+	mov eax,a32 rel dword 0xffffffffcccccccc
+	mov ebx,a32 rel dword 0xffffffffcccccccc
+	mov rax,a32 rel dword 0xffffffffcccccccc
+	mov rbx,a32 rel dword 0xffffffffcccccccc
+
+	mov al,a32 rel qword foo
+	mov bl,a32 rel qword foo
+	mov ax,a32 rel qword foo
+	mov bx,a32 rel qword foo
+	mov eax,a32 rel qword foo
+	mov ebx,a32 rel qword foo
+	mov rax,a32 rel qword foo
+	mov rbx,a32 rel qword foo
+	mov al,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel qword 0xbbbbbbbb
+	mov bl,a32 rel qword 0xbbbbbbbb
+	mov ax,a32 rel qword 0xbbbbbbbb
+	mov bx,a32 rel qword 0xbbbbbbbb
+	mov eax,a32 rel qword 0xbbbbbbbb
+	mov ebx,a32 rel qword 0xbbbbbbbb
+	mov rax,a32 rel qword 0xbbbbbbbb
+	mov rbx,a32 rel qword 0xbbbbbbbb
+	mov al,a32 rel qword 0xffffffffcccccccc
+	mov bl,a32 rel qword 0xffffffffcccccccc
+	mov ax,a32 rel qword 0xffffffffcccccccc
+	mov bx,a32 rel qword 0xffffffffcccccccc
+	mov eax,a32 rel qword 0xffffffffcccccccc
+	mov ebx,a32 rel qword 0xffffffffcccccccc
+	mov rax,a32 rel qword 0xffffffffcccccccc
+	mov rbx,a32 rel qword 0xffffffffcccccccc
+
+	mov al,fs:foo
+	mov bl,fs:foo
+	mov ax,fs:foo
+	mov bx,fs:foo
+	mov eax,fs:foo
+	mov ebx,fs:foo
+	mov rax,fs:foo
+	mov rbx,fs:foo
+	mov al,fs:0xaaaaaaaaaaaaaaaa
+	mov bl,fs:0xaaaaaaaaaaaaaaaa
+	mov ax,fs:0xaaaaaaaaaaaaaaaa
+	mov bx,fs:0xaaaaaaaaaaaaaaaa
+	mov eax,fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,fs:0xaaaaaaaaaaaaaaaa
+	mov rax,fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,fs:0xaaaaaaaaaaaaaaaa
+	mov al,fs:0xbbbbbbbb
+	mov bl,fs:0xbbbbbbbb
+	mov ax,fs:0xbbbbbbbb
+	mov bx,fs:0xbbbbbbbb
+	mov eax,fs:0xbbbbbbbb
+	mov ebx,fs:0xbbbbbbbb
+	mov rax,fs:0xbbbbbbbb
+	mov rbx,fs:0xbbbbbbbb
+	mov al,fs:0xffffffffcccccccc
+	mov bl,fs:0xffffffffcccccccc
+	mov ax,fs:0xffffffffcccccccc
+	mov bx,fs:0xffffffffcccccccc
+	mov eax,fs:0xffffffffcccccccc
+	mov ebx,fs:0xffffffffcccccccc
+	mov rax,fs:0xffffffffcccccccc
+	mov rbx,fs:0xffffffffcccccccc
+
+	mov al,dword fs:foo
+	mov bl,dword fs:foo
+	mov ax,dword fs:foo
+	mov bx,dword fs:foo
+	mov eax,dword fs:foo
+	mov ebx,dword fs:foo
+	mov rax,dword fs:foo
+	mov rbx,dword fs:foo
+	mov al,dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,dword fs:0xbbbbbbbb
+	mov bl,dword fs:0xbbbbbbbb
+	mov ax,dword fs:0xbbbbbbbb
+	mov bx,dword fs:0xbbbbbbbb
+	mov eax,dword fs:0xbbbbbbbb
+	mov ebx,dword fs:0xbbbbbbbb
+	mov rax,dword fs:0xbbbbbbbb
+	mov rbx,dword fs:0xbbbbbbbb
+	mov al,dword fs:0xffffffffcccccccc
+	mov bl,dword fs:0xffffffffcccccccc
+	mov ax,dword fs:0xffffffffcccccccc
+	mov bx,dword fs:0xffffffffcccccccc
+	mov eax,dword fs:0xffffffffcccccccc
+	mov ebx,dword fs:0xffffffffcccccccc
+	mov rax,dword fs:0xffffffffcccccccc
+	mov rbx,dword fs:0xffffffffcccccccc
+
+	mov al,qword fs:foo
+	mov bl,qword fs:foo
+	mov ax,qword fs:foo
+	mov bx,qword fs:foo
+	mov eax,qword fs:foo
+	mov ebx,qword fs:foo
+	mov rax,qword fs:foo
+	mov rbx,qword fs:foo
+	mov al,qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,qword fs:0xbbbbbbbb
+	mov bl,qword fs:0xbbbbbbbb
+	mov ax,qword fs:0xbbbbbbbb
+	mov bx,qword fs:0xbbbbbbbb
+	mov eax,qword fs:0xbbbbbbbb
+	mov ebx,qword fs:0xbbbbbbbb
+	mov rax,qword fs:0xbbbbbbbb
+	mov rbx,qword fs:0xbbbbbbbb
+	mov al,qword fs:0xffffffffcccccccc
+	mov bl,qword fs:0xffffffffcccccccc
+	mov ax,qword fs:0xffffffffcccccccc
+	mov bx,qword fs:0xffffffffcccccccc
+	mov eax,qword fs:0xffffffffcccccccc
+	mov ebx,qword fs:0xffffffffcccccccc
+	mov rax,qword fs:0xffffffffcccccccc
+	mov rbx,qword fs:0xffffffffcccccccc
+
+	mov al,a64 fs:foo
+	mov bl,a64 fs:foo
+	mov ax,a64 fs:foo
+	mov bx,a64 fs:foo
+	mov eax,a64 fs:foo
+	mov ebx,a64 fs:foo
+	mov rax,a64 fs:foo
+	mov rbx,a64 fs:foo
+	mov al,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 fs:0xbbbbbbbb
+	mov bl,a64 fs:0xbbbbbbbb
+	mov ax,a64 fs:0xbbbbbbbb
+	mov bx,a64 fs:0xbbbbbbbb
+	mov eax,a64 fs:0xbbbbbbbb
+	mov ebx,a64 fs:0xbbbbbbbb
+	mov rax,a64 fs:0xbbbbbbbb
+	mov rbx,a64 fs:0xbbbbbbbb
+	mov al,a64 fs:0xffffffffcccccccc
+	mov bl,a64 fs:0xffffffffcccccccc
+	mov ax,a64 fs:0xffffffffcccccccc
+	mov bx,a64 fs:0xffffffffcccccccc
+	mov eax,a64 fs:0xffffffffcccccccc
+	mov ebx,a64 fs:0xffffffffcccccccc
+	mov rax,a64 fs:0xffffffffcccccccc
+	mov rbx,a64 fs:0xffffffffcccccccc
+
+	mov al,a64 dword fs:foo
+	mov bl,a64 dword fs:foo
+	mov ax,a64 dword fs:foo
+	mov bx,a64 dword fs:foo
+	mov eax,a64 dword fs:foo
+	mov ebx,a64 dword fs:foo
+	mov rax,a64 dword fs:foo
+	mov rbx,a64 dword fs:foo
+	mov al,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 dword fs:0xbbbbbbbb
+	mov bl,a64 dword fs:0xbbbbbbbb
+	mov ax,a64 dword fs:0xbbbbbbbb
+	mov bx,a64 dword fs:0xbbbbbbbb
+	mov eax,a64 dword fs:0xbbbbbbbb
+	mov ebx,a64 dword fs:0xbbbbbbbb
+	mov rax,a64 dword fs:0xbbbbbbbb
+	mov rbx,a64 dword fs:0xbbbbbbbb
+	mov al,a64 dword fs:0xffffffffcccccccc
+	mov bl,a64 dword fs:0xffffffffcccccccc
+	mov ax,a64 dword fs:0xffffffffcccccccc
+	mov bx,a64 dword fs:0xffffffffcccccccc
+	mov eax,a64 dword fs:0xffffffffcccccccc
+	mov ebx,a64 dword fs:0xffffffffcccccccc
+	mov rax,a64 dword fs:0xffffffffcccccccc
+	mov rbx,a64 dword fs:0xffffffffcccccccc
+
+	mov al,a64 qword fs:foo
+	mov bl,a64 qword fs:foo
+	mov ax,a64 qword fs:foo
+	mov bx,a64 qword fs:foo
+	mov eax,a64 qword fs:foo
+	mov ebx,a64 qword fs:foo
+	mov rax,a64 qword fs:foo
+	mov rbx,a64 qword fs:foo
+	mov al,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 qword fs:0xbbbbbbbb
+	mov bl,a64 qword fs:0xbbbbbbbb
+	mov ax,a64 qword fs:0xbbbbbbbb
+	mov bx,a64 qword fs:0xbbbbbbbb
+	mov eax,a64 qword fs:0xbbbbbbbb
+	mov ebx,a64 qword fs:0xbbbbbbbb
+	mov rax,a64 qword fs:0xbbbbbbbb
+	mov rbx,a64 qword fs:0xbbbbbbbb
+	mov al,a64 qword fs:0xffffffffcccccccc
+	mov bl,a64 qword fs:0xffffffffcccccccc
+	mov ax,a64 qword fs:0xffffffffcccccccc
+	mov bx,a64 qword fs:0xffffffffcccccccc
+	mov eax,a64 qword fs:0xffffffffcccccccc
+	mov ebx,a64 qword fs:0xffffffffcccccccc
+	mov rax,a64 qword fs:0xffffffffcccccccc
+	mov rbx,a64 qword fs:0xffffffffcccccccc
+
+	mov al,a32 fs:foo
+	mov bl,a32 fs:foo
+	mov ax,a32 fs:foo
+	mov bx,a32 fs:foo
+	mov eax,a32 fs:foo
+	mov ebx,a32 fs:foo
+	mov rax,a32 fs:foo
+	mov rbx,a32 fs:foo
+	mov al,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 fs:0xbbbbbbbb
+	mov bl,a32 fs:0xbbbbbbbb
+	mov ax,a32 fs:0xbbbbbbbb
+	mov bx,a32 fs:0xbbbbbbbb
+	mov eax,a32 fs:0xbbbbbbbb
+	mov ebx,a32 fs:0xbbbbbbbb
+	mov rax,a32 fs:0xbbbbbbbb
+	mov rbx,a32 fs:0xbbbbbbbb
+	mov al,a32 fs:0xffffffffcccccccc
+	mov bl,a32 fs:0xffffffffcccccccc
+	mov ax,a32 fs:0xffffffffcccccccc
+	mov bx,a32 fs:0xffffffffcccccccc
+	mov eax,a32 fs:0xffffffffcccccccc
+	mov ebx,a32 fs:0xffffffffcccccccc
+	mov rax,a32 fs:0xffffffffcccccccc
+	mov rbx,a32 fs:0xffffffffcccccccc
+
+	mov al,a32 dword fs:foo
+	mov bl,a32 dword fs:foo
+	mov ax,a32 dword fs:foo
+	mov bx,a32 dword fs:foo
+	mov eax,a32 dword fs:foo
+	mov ebx,a32 dword fs:foo
+	mov rax,a32 dword fs:foo
+	mov rbx,a32 dword fs:foo
+	mov al,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 dword fs:0xbbbbbbbb
+	mov bl,a32 dword fs:0xbbbbbbbb
+	mov ax,a32 dword fs:0xbbbbbbbb
+	mov bx,a32 dword fs:0xbbbbbbbb
+	mov eax,a32 dword fs:0xbbbbbbbb
+	mov ebx,a32 dword fs:0xbbbbbbbb
+	mov rax,a32 dword fs:0xbbbbbbbb
+	mov rbx,a32 dword fs:0xbbbbbbbb
+	mov al,a32 dword fs:0xffffffffcccccccc
+	mov bl,a32 dword fs:0xffffffffcccccccc
+	mov ax,a32 dword fs:0xffffffffcccccccc
+	mov bx,a32 dword fs:0xffffffffcccccccc
+	mov eax,a32 dword fs:0xffffffffcccccccc
+	mov ebx,a32 dword fs:0xffffffffcccccccc
+	mov rax,a32 dword fs:0xffffffffcccccccc
+	mov rbx,a32 dword fs:0xffffffffcccccccc
+
+	mov al,a32 qword fs:foo
+	mov bl,a32 qword fs:foo
+	mov ax,a32 qword fs:foo
+	mov bx,a32 qword fs:foo
+	mov eax,a32 qword fs:foo
+	mov ebx,a32 qword fs:foo
+	mov rax,a32 qword fs:foo
+	mov rbx,a32 qword fs:foo
+	mov al,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 qword fs:0xbbbbbbbb
+	mov bl,a32 qword fs:0xbbbbbbbb
+	mov ax,a32 qword fs:0xbbbbbbbb
+	mov bx,a32 qword fs:0xbbbbbbbb
+	mov eax,a32 qword fs:0xbbbbbbbb
+	mov ebx,a32 qword fs:0xbbbbbbbb
+	mov rax,a32 qword fs:0xbbbbbbbb
+	mov rbx,a32 qword fs:0xbbbbbbbb
+	mov al,a32 qword fs:0xffffffffcccccccc
+	mov bl,a32 qword fs:0xffffffffcccccccc
+	mov ax,a32 qword fs:0xffffffffcccccccc
+	mov bx,a32 qword fs:0xffffffffcccccccc
+	mov eax,a32 qword fs:0xffffffffcccccccc
+	mov ebx,a32 qword fs:0xffffffffcccccccc
+	mov rax,a32 qword fs:0xffffffffcccccccc
+	mov rbx,a32 qword fs:0xffffffffcccccccc
+
+	mov al,abs fs:foo
+	mov bl,abs fs:foo
+	mov ax,abs fs:foo
+	mov bx,abs fs:foo
+	mov eax,abs fs:foo
+	mov ebx,abs fs:foo
+	mov rax,abs fs:foo
+	mov rbx,abs fs:foo
+	mov al,abs fs:0xaaaaaaaaaaaaaaaa
+	mov bl,abs fs:0xaaaaaaaaaaaaaaaa
+	mov ax,abs fs:0xaaaaaaaaaaaaaaaa
+	mov bx,abs fs:0xaaaaaaaaaaaaaaaa
+	mov eax,abs fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,abs fs:0xaaaaaaaaaaaaaaaa
+	mov rax,abs fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,abs fs:0xaaaaaaaaaaaaaaaa
+	mov al,abs fs:0xbbbbbbbb
+	mov bl,abs fs:0xbbbbbbbb
+	mov ax,abs fs:0xbbbbbbbb
+	mov bx,abs fs:0xbbbbbbbb
+	mov eax,abs fs:0xbbbbbbbb
+	mov ebx,abs fs:0xbbbbbbbb
+	mov rax,abs fs:0xbbbbbbbb
+	mov rbx,abs fs:0xbbbbbbbb
+	mov al,abs fs:0xffffffffcccccccc
+	mov bl,abs fs:0xffffffffcccccccc
+	mov ax,abs fs:0xffffffffcccccccc
+	mov bx,abs fs:0xffffffffcccccccc
+	mov eax,abs fs:0xffffffffcccccccc
+	mov ebx,abs fs:0xffffffffcccccccc
+	mov rax,abs fs:0xffffffffcccccccc
+	mov rbx,abs fs:0xffffffffcccccccc
+
+	mov al,abs dword fs:foo
+	mov bl,abs dword fs:foo
+	mov ax,abs dword fs:foo
+	mov bx,abs dword fs:foo
+	mov eax,abs dword fs:foo
+	mov ebx,abs dword fs:foo
+	mov rax,abs dword fs:foo
+	mov rbx,abs dword fs:foo
+	mov al,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,abs dword fs:0xbbbbbbbb
+	mov bl,abs dword fs:0xbbbbbbbb
+	mov ax,abs dword fs:0xbbbbbbbb
+	mov bx,abs dword fs:0xbbbbbbbb
+	mov eax,abs dword fs:0xbbbbbbbb
+	mov ebx,abs dword fs:0xbbbbbbbb
+	mov rax,abs dword fs:0xbbbbbbbb
+	mov rbx,abs dword fs:0xbbbbbbbb
+	mov al,abs dword fs:0xffffffffcccccccc
+	mov bl,abs dword fs:0xffffffffcccccccc
+	mov ax,abs dword fs:0xffffffffcccccccc
+	mov bx,abs dword fs:0xffffffffcccccccc
+	mov eax,abs dword fs:0xffffffffcccccccc
+	mov ebx,abs dword fs:0xffffffffcccccccc
+	mov rax,abs dword fs:0xffffffffcccccccc
+	mov rbx,abs dword fs:0xffffffffcccccccc
+
+	mov al,abs qword fs:foo
+	mov bl,abs qword fs:foo
+	mov ax,abs qword fs:foo
+	mov bx,abs qword fs:foo
+	mov eax,abs qword fs:foo
+	mov ebx,abs qword fs:foo
+	mov rax,abs qword fs:foo
+	mov rbx,abs qword fs:foo
+	mov al,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,abs qword fs:0xbbbbbbbb
+	mov bl,abs qword fs:0xbbbbbbbb
+	mov ax,abs qword fs:0xbbbbbbbb
+	mov bx,abs qword fs:0xbbbbbbbb
+	mov eax,abs qword fs:0xbbbbbbbb
+	mov ebx,abs qword fs:0xbbbbbbbb
+	mov rax,abs qword fs:0xbbbbbbbb
+	mov rbx,abs qword fs:0xbbbbbbbb
+	mov al,abs qword fs:0xffffffffcccccccc
+	mov bl,abs qword fs:0xffffffffcccccccc
+	mov ax,abs qword fs:0xffffffffcccccccc
+	mov bx,abs qword fs:0xffffffffcccccccc
+	mov eax,abs qword fs:0xffffffffcccccccc
+	mov ebx,abs qword fs:0xffffffffcccccccc
+	mov rax,abs qword fs:0xffffffffcccccccc
+	mov rbx,abs qword fs:0xffffffffcccccccc
+
+	mov al,a64 abs fs:foo
+	mov bl,a64 abs fs:foo
+	mov ax,a64 abs fs:foo
+	mov bx,a64 abs fs:foo
+	mov eax,a64 abs fs:foo
+	mov ebx,a64 abs fs:foo
+	mov rax,a64 abs fs:foo
+	mov rbx,a64 abs fs:foo
+	mov al,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs fs:0xbbbbbbbb
+	mov bl,a64 abs fs:0xbbbbbbbb
+	mov ax,a64 abs fs:0xbbbbbbbb
+	mov bx,a64 abs fs:0xbbbbbbbb
+	mov eax,a64 abs fs:0xbbbbbbbb
+	mov ebx,a64 abs fs:0xbbbbbbbb
+	mov rax,a64 abs fs:0xbbbbbbbb
+	mov rbx,a64 abs fs:0xbbbbbbbb
+	mov al,a64 abs fs:0xffffffffcccccccc
+	mov bl,a64 abs fs:0xffffffffcccccccc
+	mov ax,a64 abs fs:0xffffffffcccccccc
+	mov bx,a64 abs fs:0xffffffffcccccccc
+	mov eax,a64 abs fs:0xffffffffcccccccc
+	mov ebx,a64 abs fs:0xffffffffcccccccc
+	mov rax,a64 abs fs:0xffffffffcccccccc
+	mov rbx,a64 abs fs:0xffffffffcccccccc
+
+	mov al,a64 abs dword fs:foo
+	mov bl,a64 abs dword fs:foo
+	mov ax,a64 abs dword fs:foo
+	mov bx,a64 abs dword fs:foo
+	mov eax,a64 abs dword fs:foo
+	mov ebx,a64 abs dword fs:foo
+	mov rax,a64 abs dword fs:foo
+	mov rbx,a64 abs dword fs:foo
+	mov al,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs dword fs:0xbbbbbbbb
+	mov bl,a64 abs dword fs:0xbbbbbbbb
+	mov ax,a64 abs dword fs:0xbbbbbbbb
+	mov bx,a64 abs dword fs:0xbbbbbbbb
+	mov eax,a64 abs dword fs:0xbbbbbbbb
+	mov ebx,a64 abs dword fs:0xbbbbbbbb
+	mov rax,a64 abs dword fs:0xbbbbbbbb
+	mov rbx,a64 abs dword fs:0xbbbbbbbb
+	mov al,a64 abs dword fs:0xffffffffcccccccc
+	mov bl,a64 abs dword fs:0xffffffffcccccccc
+	mov ax,a64 abs dword fs:0xffffffffcccccccc
+	mov bx,a64 abs dword fs:0xffffffffcccccccc
+	mov eax,a64 abs dword fs:0xffffffffcccccccc
+	mov ebx,a64 abs dword fs:0xffffffffcccccccc
+	mov rax,a64 abs dword fs:0xffffffffcccccccc
+	mov rbx,a64 abs dword fs:0xffffffffcccccccc
+
+	mov al,a64 abs qword fs:foo
+	mov bl,a64 abs qword fs:foo
+	mov ax,a64 abs qword fs:foo
+	mov bx,a64 abs qword fs:foo
+	mov eax,a64 abs qword fs:foo
+	mov ebx,a64 abs qword fs:foo
+	mov rax,a64 abs qword fs:foo
+	mov rbx,a64 abs qword fs:foo
+	mov al,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs qword fs:0xbbbbbbbb
+	mov bl,a64 abs qword fs:0xbbbbbbbb
+	mov ax,a64 abs qword fs:0xbbbbbbbb
+	mov bx,a64 abs qword fs:0xbbbbbbbb
+	mov eax,a64 abs qword fs:0xbbbbbbbb
+	mov ebx,a64 abs qword fs:0xbbbbbbbb
+	mov rax,a64 abs qword fs:0xbbbbbbbb
+	mov rbx,a64 abs qword fs:0xbbbbbbbb
+	mov al,a64 abs qword fs:0xffffffffcccccccc
+	mov bl,a64 abs qword fs:0xffffffffcccccccc
+	mov ax,a64 abs qword fs:0xffffffffcccccccc
+	mov bx,a64 abs qword fs:0xffffffffcccccccc
+	mov eax,a64 abs qword fs:0xffffffffcccccccc
+	mov ebx,a64 abs qword fs:0xffffffffcccccccc
+	mov rax,a64 abs qword fs:0xffffffffcccccccc
+	mov rbx,a64 abs qword fs:0xffffffffcccccccc
+
+	mov al,a32 abs fs:foo
+	mov bl,a32 abs fs:foo
+	mov ax,a32 abs fs:foo
+	mov bx,a32 abs fs:foo
+	mov eax,a32 abs fs:foo
+	mov ebx,a32 abs fs:foo
+	mov rax,a32 abs fs:foo
+	mov rbx,a32 abs fs:foo
+	mov al,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs fs:0xbbbbbbbb
+	mov bl,a32 abs fs:0xbbbbbbbb
+	mov ax,a32 abs fs:0xbbbbbbbb
+	mov bx,a32 abs fs:0xbbbbbbbb
+	mov eax,a32 abs fs:0xbbbbbbbb
+	mov ebx,a32 abs fs:0xbbbbbbbb
+	mov rax,a32 abs fs:0xbbbbbbbb
+	mov rbx,a32 abs fs:0xbbbbbbbb
+	mov al,a32 abs fs:0xffffffffcccccccc
+	mov bl,a32 abs fs:0xffffffffcccccccc
+	mov ax,a32 abs fs:0xffffffffcccccccc
+	mov bx,a32 abs fs:0xffffffffcccccccc
+	mov eax,a32 abs fs:0xffffffffcccccccc
+	mov ebx,a32 abs fs:0xffffffffcccccccc
+	mov rax,a32 abs fs:0xffffffffcccccccc
+	mov rbx,a32 abs fs:0xffffffffcccccccc
+
+	mov al,a32 abs dword fs:foo
+	mov bl,a32 abs dword fs:foo
+	mov ax,a32 abs dword fs:foo
+	mov bx,a32 abs dword fs:foo
+	mov eax,a32 abs dword fs:foo
+	mov ebx,a32 abs dword fs:foo
+	mov rax,a32 abs dword fs:foo
+	mov rbx,a32 abs dword fs:foo
+	mov al,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs dword fs:0xbbbbbbbb
+	mov bl,a32 abs dword fs:0xbbbbbbbb
+	mov ax,a32 abs dword fs:0xbbbbbbbb
+	mov bx,a32 abs dword fs:0xbbbbbbbb
+	mov eax,a32 abs dword fs:0xbbbbbbbb
+	mov ebx,a32 abs dword fs:0xbbbbbbbb
+	mov rax,a32 abs dword fs:0xbbbbbbbb
+	mov rbx,a32 abs dword fs:0xbbbbbbbb
+	mov al,a32 abs dword fs:0xffffffffcccccccc
+	mov bl,a32 abs dword fs:0xffffffffcccccccc
+	mov ax,a32 abs dword fs:0xffffffffcccccccc
+	mov bx,a32 abs dword fs:0xffffffffcccccccc
+	mov eax,a32 abs dword fs:0xffffffffcccccccc
+	mov ebx,a32 abs dword fs:0xffffffffcccccccc
+	mov rax,a32 abs dword fs:0xffffffffcccccccc
+	mov rbx,a32 abs dword fs:0xffffffffcccccccc
+
+	mov al,a32 abs qword fs:foo
+	mov bl,a32 abs qword fs:foo
+	mov ax,a32 abs qword fs:foo
+	mov bx,a32 abs qword fs:foo
+	mov eax,a32 abs qword fs:foo
+	mov ebx,a32 abs qword fs:foo
+	mov rax,a32 abs qword fs:foo
+	mov rbx,a32 abs qword fs:foo
+	mov al,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs qword fs:0xbbbbbbbb
+	mov bl,a32 abs qword fs:0xbbbbbbbb
+	mov ax,a32 abs qword fs:0xbbbbbbbb
+	mov bx,a32 abs qword fs:0xbbbbbbbb
+	mov eax,a32 abs qword fs:0xbbbbbbbb
+	mov ebx,a32 abs qword fs:0xbbbbbbbb
+	mov rax,a32 abs qword fs:0xbbbbbbbb
+	mov rbx,a32 abs qword fs:0xbbbbbbbb
+	mov al,a32 abs qword fs:0xffffffffcccccccc
+	mov bl,a32 abs qword fs:0xffffffffcccccccc
+	mov ax,a32 abs qword fs:0xffffffffcccccccc
+	mov bx,a32 abs qword fs:0xffffffffcccccccc
+	mov eax,a32 abs qword fs:0xffffffffcccccccc
+	mov ebx,a32 abs qword fs:0xffffffffcccccccc
+	mov rax,a32 abs qword fs:0xffffffffcccccccc
+	mov rbx,a32 abs qword fs:0xffffffffcccccccc
+
+	mov al,rel fs:foo
+	mov bl,rel fs:foo
+	mov ax,rel fs:foo
+	mov bx,rel fs:foo
+	mov eax,rel fs:foo
+	mov ebx,rel fs:foo
+	mov rax,rel fs:foo
+	mov rbx,rel fs:foo
+	mov al,rel fs:0xaaaaaaaaaaaaaaaa
+	mov bl,rel fs:0xaaaaaaaaaaaaaaaa
+	mov ax,rel fs:0xaaaaaaaaaaaaaaaa
+	mov bx,rel fs:0xaaaaaaaaaaaaaaaa
+	mov eax,rel fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,rel fs:0xaaaaaaaaaaaaaaaa
+	mov rax,rel fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,rel fs:0xaaaaaaaaaaaaaaaa
+	mov al,rel fs:0xbbbbbbbb
+	mov bl,rel fs:0xbbbbbbbb
+	mov ax,rel fs:0xbbbbbbbb
+	mov bx,rel fs:0xbbbbbbbb
+	mov eax,rel fs:0xbbbbbbbb
+	mov ebx,rel fs:0xbbbbbbbb
+	mov rax,rel fs:0xbbbbbbbb
+	mov rbx,rel fs:0xbbbbbbbb
+	mov al,rel fs:0xffffffffcccccccc
+	mov bl,rel fs:0xffffffffcccccccc
+	mov ax,rel fs:0xffffffffcccccccc
+	mov bx,rel fs:0xffffffffcccccccc
+	mov eax,rel fs:0xffffffffcccccccc
+	mov ebx,rel fs:0xffffffffcccccccc
+	mov rax,rel fs:0xffffffffcccccccc
+	mov rbx,rel fs:0xffffffffcccccccc
+
+	mov al,rel dword fs:foo
+	mov bl,rel dword fs:foo
+	mov ax,rel dword fs:foo
+	mov bx,rel dword fs:foo
+	mov eax,rel dword fs:foo
+	mov ebx,rel dword fs:foo
+	mov rax,rel dword fs:foo
+	mov rbx,rel dword fs:foo
+	mov al,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,rel dword fs:0xbbbbbbbb
+	mov bl,rel dword fs:0xbbbbbbbb
+	mov ax,rel dword fs:0xbbbbbbbb
+	mov bx,rel dword fs:0xbbbbbbbb
+	mov eax,rel dword fs:0xbbbbbbbb
+	mov ebx,rel dword fs:0xbbbbbbbb
+	mov rax,rel dword fs:0xbbbbbbbb
+	mov rbx,rel dword fs:0xbbbbbbbb
+	mov al,rel dword fs:0xffffffffcccccccc
+	mov bl,rel dword fs:0xffffffffcccccccc
+	mov ax,rel dword fs:0xffffffffcccccccc
+	mov bx,rel dword fs:0xffffffffcccccccc
+	mov eax,rel dword fs:0xffffffffcccccccc
+	mov ebx,rel dword fs:0xffffffffcccccccc
+	mov rax,rel dword fs:0xffffffffcccccccc
+	mov rbx,rel dword fs:0xffffffffcccccccc
+
+	mov al,rel qword fs:foo
+	mov bl,rel qword fs:foo
+	mov ax,rel qword fs:foo
+	mov bx,rel qword fs:foo
+	mov eax,rel qword fs:foo
+	mov ebx,rel qword fs:foo
+	mov rax,rel qword fs:foo
+	mov rbx,rel qword fs:foo
+	mov al,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,rel qword fs:0xbbbbbbbb
+	mov bl,rel qword fs:0xbbbbbbbb
+	mov ax,rel qword fs:0xbbbbbbbb
+	mov bx,rel qword fs:0xbbbbbbbb
+	mov eax,rel qword fs:0xbbbbbbbb
+	mov ebx,rel qword fs:0xbbbbbbbb
+	mov rax,rel qword fs:0xbbbbbbbb
+	mov rbx,rel qword fs:0xbbbbbbbb
+	mov al,rel qword fs:0xffffffffcccccccc
+	mov bl,rel qword fs:0xffffffffcccccccc
+	mov ax,rel qword fs:0xffffffffcccccccc
+	mov bx,rel qword fs:0xffffffffcccccccc
+	mov eax,rel qword fs:0xffffffffcccccccc
+	mov ebx,rel qword fs:0xffffffffcccccccc
+	mov rax,rel qword fs:0xffffffffcccccccc
+	mov rbx,rel qword fs:0xffffffffcccccccc
+
+	mov al,a64 rel fs:foo
+	mov bl,a64 rel fs:foo
+	mov ax,a64 rel fs:foo
+	mov bx,a64 rel fs:foo
+	mov eax,a64 rel fs:foo
+	mov ebx,a64 rel fs:foo
+	mov rax,a64 rel fs:foo
+	mov rbx,a64 rel fs:foo
+	mov al,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel fs:0xbbbbbbbb
+	mov bl,a64 rel fs:0xbbbbbbbb
+	mov ax,a64 rel fs:0xbbbbbbbb
+	mov bx,a64 rel fs:0xbbbbbbbb
+	mov eax,a64 rel fs:0xbbbbbbbb
+	mov ebx,a64 rel fs:0xbbbbbbbb
+	mov rax,a64 rel fs:0xbbbbbbbb
+	mov rbx,a64 rel fs:0xbbbbbbbb
+	mov al,a64 rel fs:0xffffffffcccccccc
+	mov bl,a64 rel fs:0xffffffffcccccccc
+	mov ax,a64 rel fs:0xffffffffcccccccc
+	mov bx,a64 rel fs:0xffffffffcccccccc
+	mov eax,a64 rel fs:0xffffffffcccccccc
+	mov ebx,a64 rel fs:0xffffffffcccccccc
+	mov rax,a64 rel fs:0xffffffffcccccccc
+	mov rbx,a64 rel fs:0xffffffffcccccccc
+
+	mov al,a64 rel dword fs:foo
+	mov bl,a64 rel dword fs:foo
+	mov ax,a64 rel dword fs:foo
+	mov bx,a64 rel dword fs:foo
+	mov eax,a64 rel dword fs:foo
+	mov ebx,a64 rel dword fs:foo
+	mov rax,a64 rel dword fs:foo
+	mov rbx,a64 rel dword fs:foo
+	mov al,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel dword fs:0xbbbbbbbb
+	mov bl,a64 rel dword fs:0xbbbbbbbb
+	mov ax,a64 rel dword fs:0xbbbbbbbb
+	mov bx,a64 rel dword fs:0xbbbbbbbb
+	mov eax,a64 rel dword fs:0xbbbbbbbb
+	mov ebx,a64 rel dword fs:0xbbbbbbbb
+	mov rax,a64 rel dword fs:0xbbbbbbbb
+	mov rbx,a64 rel dword fs:0xbbbbbbbb
+	mov al,a64 rel dword fs:0xffffffffcccccccc
+	mov bl,a64 rel dword fs:0xffffffffcccccccc
+	mov ax,a64 rel dword fs:0xffffffffcccccccc
+	mov bx,a64 rel dword fs:0xffffffffcccccccc
+	mov eax,a64 rel dword fs:0xffffffffcccccccc
+	mov ebx,a64 rel dword fs:0xffffffffcccccccc
+	mov rax,a64 rel dword fs:0xffffffffcccccccc
+	mov rbx,a64 rel dword fs:0xffffffffcccccccc
+
+	mov al,a64 rel qword fs:foo
+	mov bl,a64 rel qword fs:foo
+	mov ax,a64 rel qword fs:foo
+	mov bx,a64 rel qword fs:foo
+	mov eax,a64 rel qword fs:foo
+	mov ebx,a64 rel qword fs:foo
+	mov rax,a64 rel qword fs:foo
+	mov rbx,a64 rel qword fs:foo
+	mov al,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel qword fs:0xbbbbbbbb
+	mov bl,a64 rel qword fs:0xbbbbbbbb
+	mov ax,a64 rel qword fs:0xbbbbbbbb
+	mov bx,a64 rel qword fs:0xbbbbbbbb
+	mov eax,a64 rel qword fs:0xbbbbbbbb
+	mov ebx,a64 rel qword fs:0xbbbbbbbb
+	mov rax,a64 rel qword fs:0xbbbbbbbb
+	mov rbx,a64 rel qword fs:0xbbbbbbbb
+	mov al,a64 rel qword fs:0xffffffffcccccccc
+	mov bl,a64 rel qword fs:0xffffffffcccccccc
+	mov ax,a64 rel qword fs:0xffffffffcccccccc
+	mov bx,a64 rel qword fs:0xffffffffcccccccc
+	mov eax,a64 rel qword fs:0xffffffffcccccccc
+	mov ebx,a64 rel qword fs:0xffffffffcccccccc
+	mov rax,a64 rel qword fs:0xffffffffcccccccc
+	mov rbx,a64 rel qword fs:0xffffffffcccccccc
+
+	mov al,a32 rel fs:foo
+	mov bl,a32 rel fs:foo
+	mov ax,a32 rel fs:foo
+	mov bx,a32 rel fs:foo
+	mov eax,a32 rel fs:foo
+	mov ebx,a32 rel fs:foo
+	mov rax,a32 rel fs:foo
+	mov rbx,a32 rel fs:foo
+	mov al,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel fs:0xbbbbbbbb
+	mov bl,a32 rel fs:0xbbbbbbbb
+	mov ax,a32 rel fs:0xbbbbbbbb
+	mov bx,a32 rel fs:0xbbbbbbbb
+	mov eax,a32 rel fs:0xbbbbbbbb
+	mov ebx,a32 rel fs:0xbbbbbbbb
+	mov rax,a32 rel fs:0xbbbbbbbb
+	mov rbx,a32 rel fs:0xbbbbbbbb
+	mov al,a32 rel fs:0xffffffffcccccccc
+	mov bl,a32 rel fs:0xffffffffcccccccc
+	mov ax,a32 rel fs:0xffffffffcccccccc
+	mov bx,a32 rel fs:0xffffffffcccccccc
+	mov eax,a32 rel fs:0xffffffffcccccccc
+	mov ebx,a32 rel fs:0xffffffffcccccccc
+	mov rax,a32 rel fs:0xffffffffcccccccc
+	mov rbx,a32 rel fs:0xffffffffcccccccc
+
+	mov al,a32 rel dword fs:foo
+	mov bl,a32 rel dword fs:foo
+	mov ax,a32 rel dword fs:foo
+	mov bx,a32 rel dword fs:foo
+	mov eax,a32 rel dword fs:foo
+	mov ebx,a32 rel dword fs:foo
+	mov rax,a32 rel dword fs:foo
+	mov rbx,a32 rel dword fs:foo
+	mov al,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel dword fs:0xbbbbbbbb
+	mov bl,a32 rel dword fs:0xbbbbbbbb
+	mov ax,a32 rel dword fs:0xbbbbbbbb
+	mov bx,a32 rel dword fs:0xbbbbbbbb
+	mov eax,a32 rel dword fs:0xbbbbbbbb
+	mov ebx,a32 rel dword fs:0xbbbbbbbb
+	mov rax,a32 rel dword fs:0xbbbbbbbb
+	mov rbx,a32 rel dword fs:0xbbbbbbbb
+	mov al,a32 rel dword fs:0xffffffffcccccccc
+	mov bl,a32 rel dword fs:0xffffffffcccccccc
+	mov ax,a32 rel dword fs:0xffffffffcccccccc
+	mov bx,a32 rel dword fs:0xffffffffcccccccc
+	mov eax,a32 rel dword fs:0xffffffffcccccccc
+	mov ebx,a32 rel dword fs:0xffffffffcccccccc
+	mov rax,a32 rel dword fs:0xffffffffcccccccc
+	mov rbx,a32 rel dword fs:0xffffffffcccccccc
+
+	mov al,a32 rel qword fs:foo
+	mov bl,a32 rel qword fs:foo
+	mov ax,a32 rel qword fs:foo
+	mov bx,a32 rel qword fs:foo
+	mov eax,a32 rel qword fs:foo
+	mov ebx,a32 rel qword fs:foo
+	mov rax,a32 rel qword fs:foo
+	mov rbx,a32 rel qword fs:foo
+	mov al,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel qword fs:0xbbbbbbbb
+	mov bl,a32 rel qword fs:0xbbbbbbbb
+	mov ax,a32 rel qword fs:0xbbbbbbbb
+	mov bx,a32 rel qword fs:0xbbbbbbbb
+	mov eax,a32 rel qword fs:0xbbbbbbbb
+	mov ebx,a32 rel qword fs:0xbbbbbbbb
+	mov rax,a32 rel qword fs:0xbbbbbbbb
+	mov rbx,a32 rel qword fs:0xbbbbbbbb
+	mov al,a32 rel qword fs:0xffffffffcccccccc
+	mov bl,a32 rel qword fs:0xffffffffcccccccc
+	mov ax,a32 rel qword fs:0xffffffffcccccccc
+	mov bx,a32 rel qword fs:0xffffffffcccccccc
+	mov eax,a32 rel qword fs:0xffffffffcccccccc
+	mov ebx,a32 rel qword fs:0xffffffffcccccccc
+	mov rax,a32 rel qword fs:0xffffffffcccccccc
+	mov rbx,a32 rel qword fs:0xffffffffcccccccc
+
+	mov al,es:foo
+	mov bl,es:foo
+	mov ax,es:foo
+	mov bx,es:foo
+	mov eax,es:foo
+	mov ebx,es:foo
+	mov rax,es:foo
+	mov rbx,es:foo
+	mov al,es:0xaaaaaaaaaaaaaaaa
+	mov bl,es:0xaaaaaaaaaaaaaaaa
+	mov ax,es:0xaaaaaaaaaaaaaaaa
+	mov bx,es:0xaaaaaaaaaaaaaaaa
+	mov eax,es:0xaaaaaaaaaaaaaaaa
+	mov ebx,es:0xaaaaaaaaaaaaaaaa
+	mov rax,es:0xaaaaaaaaaaaaaaaa
+	mov rbx,es:0xaaaaaaaaaaaaaaaa
+	mov al,es:0xbbbbbbbb
+	mov bl,es:0xbbbbbbbb
+	mov ax,es:0xbbbbbbbb
+	mov bx,es:0xbbbbbbbb
+	mov eax,es:0xbbbbbbbb
+	mov ebx,es:0xbbbbbbbb
+	mov rax,es:0xbbbbbbbb
+	mov rbx,es:0xbbbbbbbb
+	mov al,es:0xffffffffcccccccc
+	mov bl,es:0xffffffffcccccccc
+	mov ax,es:0xffffffffcccccccc
+	mov bx,es:0xffffffffcccccccc
+	mov eax,es:0xffffffffcccccccc
+	mov ebx,es:0xffffffffcccccccc
+	mov rax,es:0xffffffffcccccccc
+	mov rbx,es:0xffffffffcccccccc
+
+	mov al,dword es:foo
+	mov bl,dword es:foo
+	mov ax,dword es:foo
+	mov bx,dword es:foo
+	mov eax,dword es:foo
+	mov ebx,dword es:foo
+	mov rax,dword es:foo
+	mov rbx,dword es:foo
+	mov al,dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,dword es:0xaaaaaaaaaaaaaaaa
+	mov al,dword es:0xbbbbbbbb
+	mov bl,dword es:0xbbbbbbbb
+	mov ax,dword es:0xbbbbbbbb
+	mov bx,dword es:0xbbbbbbbb
+	mov eax,dword es:0xbbbbbbbb
+	mov ebx,dword es:0xbbbbbbbb
+	mov rax,dword es:0xbbbbbbbb
+	mov rbx,dword es:0xbbbbbbbb
+	mov al,dword es:0xffffffffcccccccc
+	mov bl,dword es:0xffffffffcccccccc
+	mov ax,dword es:0xffffffffcccccccc
+	mov bx,dword es:0xffffffffcccccccc
+	mov eax,dword es:0xffffffffcccccccc
+	mov ebx,dword es:0xffffffffcccccccc
+	mov rax,dword es:0xffffffffcccccccc
+	mov rbx,dword es:0xffffffffcccccccc
+
+	mov al,qword es:foo
+	mov bl,qword es:foo
+	mov ax,qword es:foo
+	mov bx,qword es:foo
+	mov eax,qword es:foo
+	mov ebx,qword es:foo
+	mov rax,qword es:foo
+	mov rbx,qword es:foo
+	mov al,qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,qword es:0xaaaaaaaaaaaaaaaa
+	mov al,qword es:0xbbbbbbbb
+	mov bl,qword es:0xbbbbbbbb
+	mov ax,qword es:0xbbbbbbbb
+	mov bx,qword es:0xbbbbbbbb
+	mov eax,qword es:0xbbbbbbbb
+	mov ebx,qword es:0xbbbbbbbb
+	mov rax,qword es:0xbbbbbbbb
+	mov rbx,qword es:0xbbbbbbbb
+	mov al,qword es:0xffffffffcccccccc
+	mov bl,qword es:0xffffffffcccccccc
+	mov ax,qword es:0xffffffffcccccccc
+	mov bx,qword es:0xffffffffcccccccc
+	mov eax,qword es:0xffffffffcccccccc
+	mov ebx,qword es:0xffffffffcccccccc
+	mov rax,qword es:0xffffffffcccccccc
+	mov rbx,qword es:0xffffffffcccccccc
+
+	mov al,a64 es:foo
+	mov bl,a64 es:foo
+	mov ax,a64 es:foo
+	mov bx,a64 es:foo
+	mov eax,a64 es:foo
+	mov ebx,a64 es:foo
+	mov rax,a64 es:foo
+	mov rbx,a64 es:foo
+	mov al,a64 es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 es:0xbbbbbbbb
+	mov bl,a64 es:0xbbbbbbbb
+	mov ax,a64 es:0xbbbbbbbb
+	mov bx,a64 es:0xbbbbbbbb
+	mov eax,a64 es:0xbbbbbbbb
+	mov ebx,a64 es:0xbbbbbbbb
+	mov rax,a64 es:0xbbbbbbbb
+	mov rbx,a64 es:0xbbbbbbbb
+	mov al,a64 es:0xffffffffcccccccc
+	mov bl,a64 es:0xffffffffcccccccc
+	mov ax,a64 es:0xffffffffcccccccc
+	mov bx,a64 es:0xffffffffcccccccc
+	mov eax,a64 es:0xffffffffcccccccc
+	mov ebx,a64 es:0xffffffffcccccccc
+	mov rax,a64 es:0xffffffffcccccccc
+	mov rbx,a64 es:0xffffffffcccccccc
+
+	mov al,a64 dword es:foo
+	mov bl,a64 dword es:foo
+	mov ax,a64 dword es:foo
+	mov bx,a64 dword es:foo
+	mov eax,a64 dword es:foo
+	mov ebx,a64 dword es:foo
+	mov rax,a64 dword es:foo
+	mov rbx,a64 dword es:foo
+	mov al,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 dword es:0xbbbbbbbb
+	mov bl,a64 dword es:0xbbbbbbbb
+	mov ax,a64 dword es:0xbbbbbbbb
+	mov bx,a64 dword es:0xbbbbbbbb
+	mov eax,a64 dword es:0xbbbbbbbb
+	mov ebx,a64 dword es:0xbbbbbbbb
+	mov rax,a64 dword es:0xbbbbbbbb
+	mov rbx,a64 dword es:0xbbbbbbbb
+	mov al,a64 dword es:0xffffffffcccccccc
+	mov bl,a64 dword es:0xffffffffcccccccc
+	mov ax,a64 dword es:0xffffffffcccccccc
+	mov bx,a64 dword es:0xffffffffcccccccc
+	mov eax,a64 dword es:0xffffffffcccccccc
+	mov ebx,a64 dword es:0xffffffffcccccccc
+	mov rax,a64 dword es:0xffffffffcccccccc
+	mov rbx,a64 dword es:0xffffffffcccccccc
+
+	mov al,a64 qword es:foo
+	mov bl,a64 qword es:foo
+	mov ax,a64 qword es:foo
+	mov bx,a64 qword es:foo
+	mov eax,a64 qword es:foo
+	mov ebx,a64 qword es:foo
+	mov rax,a64 qword es:foo
+	mov rbx,a64 qword es:foo
+	mov al,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 qword es:0xbbbbbbbb
+	mov bl,a64 qword es:0xbbbbbbbb
+	mov ax,a64 qword es:0xbbbbbbbb
+	mov bx,a64 qword es:0xbbbbbbbb
+	mov eax,a64 qword es:0xbbbbbbbb
+	mov ebx,a64 qword es:0xbbbbbbbb
+	mov rax,a64 qword es:0xbbbbbbbb
+	mov rbx,a64 qword es:0xbbbbbbbb
+	mov al,a64 qword es:0xffffffffcccccccc
+	mov bl,a64 qword es:0xffffffffcccccccc
+	mov ax,a64 qword es:0xffffffffcccccccc
+	mov bx,a64 qword es:0xffffffffcccccccc
+	mov eax,a64 qword es:0xffffffffcccccccc
+	mov ebx,a64 qword es:0xffffffffcccccccc
+	mov rax,a64 qword es:0xffffffffcccccccc
+	mov rbx,a64 qword es:0xffffffffcccccccc
+
+	mov al,a32 es:foo
+	mov bl,a32 es:foo
+	mov ax,a32 es:foo
+	mov bx,a32 es:foo
+	mov eax,a32 es:foo
+	mov ebx,a32 es:foo
+	mov rax,a32 es:foo
+	mov rbx,a32 es:foo
+	mov al,a32 es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 es:0xbbbbbbbb
+	mov bl,a32 es:0xbbbbbbbb
+	mov ax,a32 es:0xbbbbbbbb
+	mov bx,a32 es:0xbbbbbbbb
+	mov eax,a32 es:0xbbbbbbbb
+	mov ebx,a32 es:0xbbbbbbbb
+	mov rax,a32 es:0xbbbbbbbb
+	mov rbx,a32 es:0xbbbbbbbb
+	mov al,a32 es:0xffffffffcccccccc
+	mov bl,a32 es:0xffffffffcccccccc
+	mov ax,a32 es:0xffffffffcccccccc
+	mov bx,a32 es:0xffffffffcccccccc
+	mov eax,a32 es:0xffffffffcccccccc
+	mov ebx,a32 es:0xffffffffcccccccc
+	mov rax,a32 es:0xffffffffcccccccc
+	mov rbx,a32 es:0xffffffffcccccccc
+
+	mov al,a32 dword es:foo
+	mov bl,a32 dword es:foo
+	mov ax,a32 dword es:foo
+	mov bx,a32 dword es:foo
+	mov eax,a32 dword es:foo
+	mov ebx,a32 dword es:foo
+	mov rax,a32 dword es:foo
+	mov rbx,a32 dword es:foo
+	mov al,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 dword es:0xbbbbbbbb
+	mov bl,a32 dword es:0xbbbbbbbb
+	mov ax,a32 dword es:0xbbbbbbbb
+	mov bx,a32 dword es:0xbbbbbbbb
+	mov eax,a32 dword es:0xbbbbbbbb
+	mov ebx,a32 dword es:0xbbbbbbbb
+	mov rax,a32 dword es:0xbbbbbbbb
+	mov rbx,a32 dword es:0xbbbbbbbb
+	mov al,a32 dword es:0xffffffffcccccccc
+	mov bl,a32 dword es:0xffffffffcccccccc
+	mov ax,a32 dword es:0xffffffffcccccccc
+	mov bx,a32 dword es:0xffffffffcccccccc
+	mov eax,a32 dword es:0xffffffffcccccccc
+	mov ebx,a32 dword es:0xffffffffcccccccc
+	mov rax,a32 dword es:0xffffffffcccccccc
+	mov rbx,a32 dword es:0xffffffffcccccccc
+
+	mov al,a32 qword es:foo
+	mov bl,a32 qword es:foo
+	mov ax,a32 qword es:foo
+	mov bx,a32 qword es:foo
+	mov eax,a32 qword es:foo
+	mov ebx,a32 qword es:foo
+	mov rax,a32 qword es:foo
+	mov rbx,a32 qword es:foo
+	mov al,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 qword es:0xbbbbbbbb
+	mov bl,a32 qword es:0xbbbbbbbb
+	mov ax,a32 qword es:0xbbbbbbbb
+	mov bx,a32 qword es:0xbbbbbbbb
+	mov eax,a32 qword es:0xbbbbbbbb
+	mov ebx,a32 qword es:0xbbbbbbbb
+	mov rax,a32 qword es:0xbbbbbbbb
+	mov rbx,a32 qword es:0xbbbbbbbb
+	mov al,a32 qword es:0xffffffffcccccccc
+	mov bl,a32 qword es:0xffffffffcccccccc
+	mov ax,a32 qword es:0xffffffffcccccccc
+	mov bx,a32 qword es:0xffffffffcccccccc
+	mov eax,a32 qword es:0xffffffffcccccccc
+	mov ebx,a32 qword es:0xffffffffcccccccc
+	mov rax,a32 qword es:0xffffffffcccccccc
+	mov rbx,a32 qword es:0xffffffffcccccccc
+
+	mov al,abs es:foo
+	mov bl,abs es:foo
+	mov ax,abs es:foo
+	mov bx,abs es:foo
+	mov eax,abs es:foo
+	mov ebx,abs es:foo
+	mov rax,abs es:foo
+	mov rbx,abs es:foo
+	mov al,abs es:0xaaaaaaaaaaaaaaaa
+	mov bl,abs es:0xaaaaaaaaaaaaaaaa
+	mov ax,abs es:0xaaaaaaaaaaaaaaaa
+	mov bx,abs es:0xaaaaaaaaaaaaaaaa
+	mov eax,abs es:0xaaaaaaaaaaaaaaaa
+	mov ebx,abs es:0xaaaaaaaaaaaaaaaa
+	mov rax,abs es:0xaaaaaaaaaaaaaaaa
+	mov rbx,abs es:0xaaaaaaaaaaaaaaaa
+	mov al,abs es:0xbbbbbbbb
+	mov bl,abs es:0xbbbbbbbb
+	mov ax,abs es:0xbbbbbbbb
+	mov bx,abs es:0xbbbbbbbb
+	mov eax,abs es:0xbbbbbbbb
+	mov ebx,abs es:0xbbbbbbbb
+	mov rax,abs es:0xbbbbbbbb
+	mov rbx,abs es:0xbbbbbbbb
+	mov al,abs es:0xffffffffcccccccc
+	mov bl,abs es:0xffffffffcccccccc
+	mov ax,abs es:0xffffffffcccccccc
+	mov bx,abs es:0xffffffffcccccccc
+	mov eax,abs es:0xffffffffcccccccc
+	mov ebx,abs es:0xffffffffcccccccc
+	mov rax,abs es:0xffffffffcccccccc
+	mov rbx,abs es:0xffffffffcccccccc
+
+	mov al,abs dword es:foo
+	mov bl,abs dword es:foo
+	mov ax,abs dword es:foo
+	mov bx,abs dword es:foo
+	mov eax,abs dword es:foo
+	mov ebx,abs dword es:foo
+	mov rax,abs dword es:foo
+	mov rbx,abs dword es:foo
+	mov al,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov al,abs dword es:0xbbbbbbbb
+	mov bl,abs dword es:0xbbbbbbbb
+	mov ax,abs dword es:0xbbbbbbbb
+	mov bx,abs dword es:0xbbbbbbbb
+	mov eax,abs dword es:0xbbbbbbbb
+	mov ebx,abs dword es:0xbbbbbbbb
+	mov rax,abs dword es:0xbbbbbbbb
+	mov rbx,abs dword es:0xbbbbbbbb
+	mov al,abs dword es:0xffffffffcccccccc
+	mov bl,abs dword es:0xffffffffcccccccc
+	mov ax,abs dword es:0xffffffffcccccccc
+	mov bx,abs dword es:0xffffffffcccccccc
+	mov eax,abs dword es:0xffffffffcccccccc
+	mov ebx,abs dword es:0xffffffffcccccccc
+	mov rax,abs dword es:0xffffffffcccccccc
+	mov rbx,abs dword es:0xffffffffcccccccc
+
+	mov al,abs qword es:foo
+	mov bl,abs qword es:foo
+	mov ax,abs qword es:foo
+	mov bx,abs qword es:foo
+	mov eax,abs qword es:foo
+	mov ebx,abs qword es:foo
+	mov rax,abs qword es:foo
+	mov rbx,abs qword es:foo
+	mov al,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov al,abs qword es:0xbbbbbbbb
+	mov bl,abs qword es:0xbbbbbbbb
+	mov ax,abs qword es:0xbbbbbbbb
+	mov bx,abs qword es:0xbbbbbbbb
+	mov eax,abs qword es:0xbbbbbbbb
+	mov ebx,abs qword es:0xbbbbbbbb
+	mov rax,abs qword es:0xbbbbbbbb
+	mov rbx,abs qword es:0xbbbbbbbb
+	mov al,abs qword es:0xffffffffcccccccc
+	mov bl,abs qword es:0xffffffffcccccccc
+	mov ax,abs qword es:0xffffffffcccccccc
+	mov bx,abs qword es:0xffffffffcccccccc
+	mov eax,abs qword es:0xffffffffcccccccc
+	mov ebx,abs qword es:0xffffffffcccccccc
+	mov rax,abs qword es:0xffffffffcccccccc
+	mov rbx,abs qword es:0xffffffffcccccccc
+
+	mov al,a64 abs es:foo
+	mov bl,a64 abs es:foo
+	mov ax,a64 abs es:foo
+	mov bx,a64 abs es:foo
+	mov eax,a64 abs es:foo
+	mov ebx,a64 abs es:foo
+	mov rax,a64 abs es:foo
+	mov rbx,a64 abs es:foo
+	mov al,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs es:0xbbbbbbbb
+	mov bl,a64 abs es:0xbbbbbbbb
+	mov ax,a64 abs es:0xbbbbbbbb
+	mov bx,a64 abs es:0xbbbbbbbb
+	mov eax,a64 abs es:0xbbbbbbbb
+	mov ebx,a64 abs es:0xbbbbbbbb
+	mov rax,a64 abs es:0xbbbbbbbb
+	mov rbx,a64 abs es:0xbbbbbbbb
+	mov al,a64 abs es:0xffffffffcccccccc
+	mov bl,a64 abs es:0xffffffffcccccccc
+	mov ax,a64 abs es:0xffffffffcccccccc
+	mov bx,a64 abs es:0xffffffffcccccccc
+	mov eax,a64 abs es:0xffffffffcccccccc
+	mov ebx,a64 abs es:0xffffffffcccccccc
+	mov rax,a64 abs es:0xffffffffcccccccc
+	mov rbx,a64 abs es:0xffffffffcccccccc
+
+	mov al,a64 abs dword es:foo
+	mov bl,a64 abs dword es:foo
+	mov ax,a64 abs dword es:foo
+	mov bx,a64 abs dword es:foo
+	mov eax,a64 abs dword es:foo
+	mov ebx,a64 abs dword es:foo
+	mov rax,a64 abs dword es:foo
+	mov rbx,a64 abs dword es:foo
+	mov al,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs dword es:0xbbbbbbbb
+	mov bl,a64 abs dword es:0xbbbbbbbb
+	mov ax,a64 abs dword es:0xbbbbbbbb
+	mov bx,a64 abs dword es:0xbbbbbbbb
+	mov eax,a64 abs dword es:0xbbbbbbbb
+	mov ebx,a64 abs dword es:0xbbbbbbbb
+	mov rax,a64 abs dword es:0xbbbbbbbb
+	mov rbx,a64 abs dword es:0xbbbbbbbb
+	mov al,a64 abs dword es:0xffffffffcccccccc
+	mov bl,a64 abs dword es:0xffffffffcccccccc
+	mov ax,a64 abs dword es:0xffffffffcccccccc
+	mov bx,a64 abs dword es:0xffffffffcccccccc
+	mov eax,a64 abs dword es:0xffffffffcccccccc
+	mov ebx,a64 abs dword es:0xffffffffcccccccc
+	mov rax,a64 abs dword es:0xffffffffcccccccc
+	mov rbx,a64 abs dword es:0xffffffffcccccccc
+
+	mov al,a64 abs qword es:foo
+	mov bl,a64 abs qword es:foo
+	mov ax,a64 abs qword es:foo
+	mov bx,a64 abs qword es:foo
+	mov eax,a64 abs qword es:foo
+	mov ebx,a64 abs qword es:foo
+	mov rax,a64 abs qword es:foo
+	mov rbx,a64 abs qword es:foo
+	mov al,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs qword es:0xbbbbbbbb
+	mov bl,a64 abs qword es:0xbbbbbbbb
+	mov ax,a64 abs qword es:0xbbbbbbbb
+	mov bx,a64 abs qword es:0xbbbbbbbb
+	mov eax,a64 abs qword es:0xbbbbbbbb
+	mov ebx,a64 abs qword es:0xbbbbbbbb
+	mov rax,a64 abs qword es:0xbbbbbbbb
+	mov rbx,a64 abs qword es:0xbbbbbbbb
+	mov al,a64 abs qword es:0xffffffffcccccccc
+	mov bl,a64 abs qword es:0xffffffffcccccccc
+	mov ax,a64 abs qword es:0xffffffffcccccccc
+	mov bx,a64 abs qword es:0xffffffffcccccccc
+	mov eax,a64 abs qword es:0xffffffffcccccccc
+	mov ebx,a64 abs qword es:0xffffffffcccccccc
+	mov rax,a64 abs qword es:0xffffffffcccccccc
+	mov rbx,a64 abs qword es:0xffffffffcccccccc
+
+	mov al,a32 abs es:foo
+	mov bl,a32 abs es:foo
+	mov ax,a32 abs es:foo
+	mov bx,a32 abs es:foo
+	mov eax,a32 abs es:foo
+	mov ebx,a32 abs es:foo
+	mov rax,a32 abs es:foo
+	mov rbx,a32 abs es:foo
+	mov al,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs es:0xbbbbbbbb
+	mov bl,a32 abs es:0xbbbbbbbb
+	mov ax,a32 abs es:0xbbbbbbbb
+	mov bx,a32 abs es:0xbbbbbbbb
+	mov eax,a32 abs es:0xbbbbbbbb
+	mov ebx,a32 abs es:0xbbbbbbbb
+	mov rax,a32 abs es:0xbbbbbbbb
+	mov rbx,a32 abs es:0xbbbbbbbb
+	mov al,a32 abs es:0xffffffffcccccccc
+	mov bl,a32 abs es:0xffffffffcccccccc
+	mov ax,a32 abs es:0xffffffffcccccccc
+	mov bx,a32 abs es:0xffffffffcccccccc
+	mov eax,a32 abs es:0xffffffffcccccccc
+	mov ebx,a32 abs es:0xffffffffcccccccc
+	mov rax,a32 abs es:0xffffffffcccccccc
+	mov rbx,a32 abs es:0xffffffffcccccccc
+
+	mov al,a32 abs dword es:foo
+	mov bl,a32 abs dword es:foo
+	mov ax,a32 abs dword es:foo
+	mov bx,a32 abs dword es:foo
+	mov eax,a32 abs dword es:foo
+	mov ebx,a32 abs dword es:foo
+	mov rax,a32 abs dword es:foo
+	mov rbx,a32 abs dword es:foo
+	mov al,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs dword es:0xbbbbbbbb
+	mov bl,a32 abs dword es:0xbbbbbbbb
+	mov ax,a32 abs dword es:0xbbbbbbbb
+	mov bx,a32 abs dword es:0xbbbbbbbb
+	mov eax,a32 abs dword es:0xbbbbbbbb
+	mov ebx,a32 abs dword es:0xbbbbbbbb
+	mov rax,a32 abs dword es:0xbbbbbbbb
+	mov rbx,a32 abs dword es:0xbbbbbbbb
+	mov al,a32 abs dword es:0xffffffffcccccccc
+	mov bl,a32 abs dword es:0xffffffffcccccccc
+	mov ax,a32 abs dword es:0xffffffffcccccccc
+	mov bx,a32 abs dword es:0xffffffffcccccccc
+	mov eax,a32 abs dword es:0xffffffffcccccccc
+	mov ebx,a32 abs dword es:0xffffffffcccccccc
+	mov rax,a32 abs dword es:0xffffffffcccccccc
+	mov rbx,a32 abs dword es:0xffffffffcccccccc
+
+	mov al,a32 abs qword es:foo
+	mov bl,a32 abs qword es:foo
+	mov ax,a32 abs qword es:foo
+	mov bx,a32 abs qword es:foo
+	mov eax,a32 abs qword es:foo
+	mov ebx,a32 abs qword es:foo
+	mov rax,a32 abs qword es:foo
+	mov rbx,a32 abs qword es:foo
+	mov al,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs qword es:0xbbbbbbbb
+	mov bl,a32 abs qword es:0xbbbbbbbb
+	mov ax,a32 abs qword es:0xbbbbbbbb
+	mov bx,a32 abs qword es:0xbbbbbbbb
+	mov eax,a32 abs qword es:0xbbbbbbbb
+	mov ebx,a32 abs qword es:0xbbbbbbbb
+	mov rax,a32 abs qword es:0xbbbbbbbb
+	mov rbx,a32 abs qword es:0xbbbbbbbb
+	mov al,a32 abs qword es:0xffffffffcccccccc
+	mov bl,a32 abs qword es:0xffffffffcccccccc
+	mov ax,a32 abs qword es:0xffffffffcccccccc
+	mov bx,a32 abs qword es:0xffffffffcccccccc
+	mov eax,a32 abs qword es:0xffffffffcccccccc
+	mov ebx,a32 abs qword es:0xffffffffcccccccc
+	mov rax,a32 abs qword es:0xffffffffcccccccc
+	mov rbx,a32 abs qword es:0xffffffffcccccccc
+
+	mov al,rel es:foo
+	mov bl,rel es:foo
+	mov ax,rel es:foo
+	mov bx,rel es:foo
+	mov eax,rel es:foo
+	mov ebx,rel es:foo
+	mov rax,rel es:foo
+	mov rbx,rel es:foo
+	mov al,rel es:0xaaaaaaaaaaaaaaaa
+	mov bl,rel es:0xaaaaaaaaaaaaaaaa
+	mov ax,rel es:0xaaaaaaaaaaaaaaaa
+	mov bx,rel es:0xaaaaaaaaaaaaaaaa
+	mov eax,rel es:0xaaaaaaaaaaaaaaaa
+	mov ebx,rel es:0xaaaaaaaaaaaaaaaa
+	mov rax,rel es:0xaaaaaaaaaaaaaaaa
+	mov rbx,rel es:0xaaaaaaaaaaaaaaaa
+	mov al,rel es:0xbbbbbbbb
+	mov bl,rel es:0xbbbbbbbb
+	mov ax,rel es:0xbbbbbbbb
+	mov bx,rel es:0xbbbbbbbb
+	mov eax,rel es:0xbbbbbbbb
+	mov ebx,rel es:0xbbbbbbbb
+	mov rax,rel es:0xbbbbbbbb
+	mov rbx,rel es:0xbbbbbbbb
+	mov al,rel es:0xffffffffcccccccc
+	mov bl,rel es:0xffffffffcccccccc
+	mov ax,rel es:0xffffffffcccccccc
+	mov bx,rel es:0xffffffffcccccccc
+	mov eax,rel es:0xffffffffcccccccc
+	mov ebx,rel es:0xffffffffcccccccc
+	mov rax,rel es:0xffffffffcccccccc
+	mov rbx,rel es:0xffffffffcccccccc
+
+	mov al,rel dword es:foo
+	mov bl,rel dword es:foo
+	mov ax,rel dword es:foo
+	mov bx,rel dword es:foo
+	mov eax,rel dword es:foo
+	mov ebx,rel dword es:foo
+	mov rax,rel dword es:foo
+	mov rbx,rel dword es:foo
+	mov al,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov al,rel dword es:0xbbbbbbbb
+	mov bl,rel dword es:0xbbbbbbbb
+	mov ax,rel dword es:0xbbbbbbbb
+	mov bx,rel dword es:0xbbbbbbbb
+	mov eax,rel dword es:0xbbbbbbbb
+	mov ebx,rel dword es:0xbbbbbbbb
+	mov rax,rel dword es:0xbbbbbbbb
+	mov rbx,rel dword es:0xbbbbbbbb
+	mov al,rel dword es:0xffffffffcccccccc
+	mov bl,rel dword es:0xffffffffcccccccc
+	mov ax,rel dword es:0xffffffffcccccccc
+	mov bx,rel dword es:0xffffffffcccccccc
+	mov eax,rel dword es:0xffffffffcccccccc
+	mov ebx,rel dword es:0xffffffffcccccccc
+	mov rax,rel dword es:0xffffffffcccccccc
+	mov rbx,rel dword es:0xffffffffcccccccc
+
+	mov al,rel qword es:foo
+	mov bl,rel qword es:foo
+	mov ax,rel qword es:foo
+	mov bx,rel qword es:foo
+	mov eax,rel qword es:foo
+	mov ebx,rel qword es:foo
+	mov rax,rel qword es:foo
+	mov rbx,rel qword es:foo
+	mov al,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov al,rel qword es:0xbbbbbbbb
+	mov bl,rel qword es:0xbbbbbbbb
+	mov ax,rel qword es:0xbbbbbbbb
+	mov bx,rel qword es:0xbbbbbbbb
+	mov eax,rel qword es:0xbbbbbbbb
+	mov ebx,rel qword es:0xbbbbbbbb
+	mov rax,rel qword es:0xbbbbbbbb
+	mov rbx,rel qword es:0xbbbbbbbb
+	mov al,rel qword es:0xffffffffcccccccc
+	mov bl,rel qword es:0xffffffffcccccccc
+	mov ax,rel qword es:0xffffffffcccccccc
+	mov bx,rel qword es:0xffffffffcccccccc
+	mov eax,rel qword es:0xffffffffcccccccc
+	mov ebx,rel qword es:0xffffffffcccccccc
+	mov rax,rel qword es:0xffffffffcccccccc
+	mov rbx,rel qword es:0xffffffffcccccccc
+
+	mov al,a64 rel es:foo
+	mov bl,a64 rel es:foo
+	mov ax,a64 rel es:foo
+	mov bx,a64 rel es:foo
+	mov eax,a64 rel es:foo
+	mov ebx,a64 rel es:foo
+	mov rax,a64 rel es:foo
+	mov rbx,a64 rel es:foo
+	mov al,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel es:0xbbbbbbbb
+	mov bl,a64 rel es:0xbbbbbbbb
+	mov ax,a64 rel es:0xbbbbbbbb
+	mov bx,a64 rel es:0xbbbbbbbb
+	mov eax,a64 rel es:0xbbbbbbbb
+	mov ebx,a64 rel es:0xbbbbbbbb
+	mov rax,a64 rel es:0xbbbbbbbb
+	mov rbx,a64 rel es:0xbbbbbbbb
+	mov al,a64 rel es:0xffffffffcccccccc
+	mov bl,a64 rel es:0xffffffffcccccccc
+	mov ax,a64 rel es:0xffffffffcccccccc
+	mov bx,a64 rel es:0xffffffffcccccccc
+	mov eax,a64 rel es:0xffffffffcccccccc
+	mov ebx,a64 rel es:0xffffffffcccccccc
+	mov rax,a64 rel es:0xffffffffcccccccc
+	mov rbx,a64 rel es:0xffffffffcccccccc
+
+	mov al,a64 rel dword es:foo
+	mov bl,a64 rel dword es:foo
+	mov ax,a64 rel dword es:foo
+	mov bx,a64 rel dword es:foo
+	mov eax,a64 rel dword es:foo
+	mov ebx,a64 rel dword es:foo
+	mov rax,a64 rel dword es:foo
+	mov rbx,a64 rel dword es:foo
+	mov al,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel dword es:0xbbbbbbbb
+	mov bl,a64 rel dword es:0xbbbbbbbb
+	mov ax,a64 rel dword es:0xbbbbbbbb
+	mov bx,a64 rel dword es:0xbbbbbbbb
+	mov eax,a64 rel dword es:0xbbbbbbbb
+	mov ebx,a64 rel dword es:0xbbbbbbbb
+	mov rax,a64 rel dword es:0xbbbbbbbb
+	mov rbx,a64 rel dword es:0xbbbbbbbb
+	mov al,a64 rel dword es:0xffffffffcccccccc
+	mov bl,a64 rel dword es:0xffffffffcccccccc
+	mov ax,a64 rel dword es:0xffffffffcccccccc
+	mov bx,a64 rel dword es:0xffffffffcccccccc
+	mov eax,a64 rel dword es:0xffffffffcccccccc
+	mov ebx,a64 rel dword es:0xffffffffcccccccc
+	mov rax,a64 rel dword es:0xffffffffcccccccc
+	mov rbx,a64 rel dword es:0xffffffffcccccccc
+
+	mov al,a64 rel qword es:foo
+	mov bl,a64 rel qword es:foo
+	mov ax,a64 rel qword es:foo
+	mov bx,a64 rel qword es:foo
+	mov eax,a64 rel qword es:foo
+	mov ebx,a64 rel qword es:foo
+	mov rax,a64 rel qword es:foo
+	mov rbx,a64 rel qword es:foo
+	mov al,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel qword es:0xbbbbbbbb
+	mov bl,a64 rel qword es:0xbbbbbbbb
+	mov ax,a64 rel qword es:0xbbbbbbbb
+	mov bx,a64 rel qword es:0xbbbbbbbb
+	mov eax,a64 rel qword es:0xbbbbbbbb
+	mov ebx,a64 rel qword es:0xbbbbbbbb
+	mov rax,a64 rel qword es:0xbbbbbbbb
+	mov rbx,a64 rel qword es:0xbbbbbbbb
+	mov al,a64 rel qword es:0xffffffffcccccccc
+	mov bl,a64 rel qword es:0xffffffffcccccccc
+	mov ax,a64 rel qword es:0xffffffffcccccccc
+	mov bx,a64 rel qword es:0xffffffffcccccccc
+	mov eax,a64 rel qword es:0xffffffffcccccccc
+	mov ebx,a64 rel qword es:0xffffffffcccccccc
+	mov rax,a64 rel qword es:0xffffffffcccccccc
+	mov rbx,a64 rel qword es:0xffffffffcccccccc
+
+	mov al,a32 rel es:foo
+	mov bl,a32 rel es:foo
+	mov ax,a32 rel es:foo
+	mov bx,a32 rel es:foo
+	mov eax,a32 rel es:foo
+	mov ebx,a32 rel es:foo
+	mov rax,a32 rel es:foo
+	mov rbx,a32 rel es:foo
+	mov al,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel es:0xbbbbbbbb
+	mov bl,a32 rel es:0xbbbbbbbb
+	mov ax,a32 rel es:0xbbbbbbbb
+	mov bx,a32 rel es:0xbbbbbbbb
+	mov eax,a32 rel es:0xbbbbbbbb
+	mov ebx,a32 rel es:0xbbbbbbbb
+	mov rax,a32 rel es:0xbbbbbbbb
+	mov rbx,a32 rel es:0xbbbbbbbb
+	mov al,a32 rel es:0xffffffffcccccccc
+	mov bl,a32 rel es:0xffffffffcccccccc
+	mov ax,a32 rel es:0xffffffffcccccccc
+	mov bx,a32 rel es:0xffffffffcccccccc
+	mov eax,a32 rel es:0xffffffffcccccccc
+	mov ebx,a32 rel es:0xffffffffcccccccc
+	mov rax,a32 rel es:0xffffffffcccccccc
+	mov rbx,a32 rel es:0xffffffffcccccccc
+
+	mov al,a32 rel dword es:foo
+	mov bl,a32 rel dword es:foo
+	mov ax,a32 rel dword es:foo
+	mov bx,a32 rel dword es:foo
+	mov eax,a32 rel dword es:foo
+	mov ebx,a32 rel dword es:foo
+	mov rax,a32 rel dword es:foo
+	mov rbx,a32 rel dword es:foo
+	mov al,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel dword es:0xbbbbbbbb
+	mov bl,a32 rel dword es:0xbbbbbbbb
+	mov ax,a32 rel dword es:0xbbbbbbbb
+	mov bx,a32 rel dword es:0xbbbbbbbb
+	mov eax,a32 rel dword es:0xbbbbbbbb
+	mov ebx,a32 rel dword es:0xbbbbbbbb
+	mov rax,a32 rel dword es:0xbbbbbbbb
+	mov rbx,a32 rel dword es:0xbbbbbbbb
+	mov al,a32 rel dword es:0xffffffffcccccccc
+	mov bl,a32 rel dword es:0xffffffffcccccccc
+	mov ax,a32 rel dword es:0xffffffffcccccccc
+	mov bx,a32 rel dword es:0xffffffffcccccccc
+	mov eax,a32 rel dword es:0xffffffffcccccccc
+	mov ebx,a32 rel dword es:0xffffffffcccccccc
+	mov rax,a32 rel dword es:0xffffffffcccccccc
+	mov rbx,a32 rel dword es:0xffffffffcccccccc
+
+	mov al,a32 rel qword es:foo
+	mov bl,a32 rel qword es:foo
+	mov ax,a32 rel qword es:foo
+	mov bx,a32 rel qword es:foo
+	mov eax,a32 rel qword es:foo
+	mov ebx,a32 rel qword es:foo
+	mov rax,a32 rel qword es:foo
+	mov rbx,a32 rel qword es:foo
+	mov al,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel qword es:0xbbbbbbbb
+	mov bl,a32 rel qword es:0xbbbbbbbb
+	mov ax,a32 rel qword es:0xbbbbbbbb
+	mov bx,a32 rel qword es:0xbbbbbbbb
+	mov eax,a32 rel qword es:0xbbbbbbbb
+	mov ebx,a32 rel qword es:0xbbbbbbbb
+	mov rax,a32 rel qword es:0xbbbbbbbb
+	mov rbx,a32 rel qword es:0xbbbbbbbb
+	mov al,a32 rel qword es:0xffffffffcccccccc
+	mov bl,a32 rel qword es:0xffffffffcccccccc
+	mov ax,a32 rel qword es:0xffffffffcccccccc
+	mov bx,a32 rel qword es:0xffffffffcccccccc
+	mov eax,a32 rel qword es:0xffffffffcccccccc
+	mov ebx,a32 rel qword es:0xffffffffcccccccc
+	mov rax,a32 rel qword es:0xffffffffcccccccc
+	mov rbx,a32 rel qword es:0xffffffffcccccccc
+
+
+	default rel
+
+	mov al,foo
+	mov bl,foo
+	mov ax,foo
+	mov bx,foo
+	mov eax,foo
+	mov ebx,foo
+	mov rax,foo
+	mov rbx,foo
+	mov al,0xaaaaaaaaaaaaaaaa
+	mov bl,0xaaaaaaaaaaaaaaaa
+	mov ax,0xaaaaaaaaaaaaaaaa
+	mov bx,0xaaaaaaaaaaaaaaaa
+	mov eax,0xaaaaaaaaaaaaaaaa
+	mov ebx,0xaaaaaaaaaaaaaaaa
+	mov rax,0xaaaaaaaaaaaaaaaa
+	mov rbx,0xaaaaaaaaaaaaaaaa
+	mov al,0xbbbbbbbb
+	mov bl,0xbbbbbbbb
+	mov ax,0xbbbbbbbb
+	mov bx,0xbbbbbbbb
+	mov eax,0xbbbbbbbb
+	mov ebx,0xbbbbbbbb
+	mov rax,0xbbbbbbbb
+	mov rbx,0xbbbbbbbb
+	mov al,0xffffffffcccccccc
+	mov bl,0xffffffffcccccccc
+	mov ax,0xffffffffcccccccc
+	mov bx,0xffffffffcccccccc
+	mov eax,0xffffffffcccccccc
+	mov ebx,0xffffffffcccccccc
+	mov rax,0xffffffffcccccccc
+	mov rbx,0xffffffffcccccccc
+
+	mov al,dword foo
+	mov bl,dword foo
+	mov ax,dword foo
+	mov bx,dword foo
+	mov eax,dword foo
+	mov ebx,dword foo
+	mov rax,dword foo
+	mov rbx,dword foo
+	mov al,dword 0xaaaaaaaaaaaaaaaa
+	mov bl,dword 0xaaaaaaaaaaaaaaaa
+	mov ax,dword 0xaaaaaaaaaaaaaaaa
+	mov bx,dword 0xaaaaaaaaaaaaaaaa
+	mov eax,dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,dword 0xaaaaaaaaaaaaaaaa
+	mov rax,dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,dword 0xaaaaaaaaaaaaaaaa
+	mov al,dword 0xbbbbbbbb
+	mov bl,dword 0xbbbbbbbb
+	mov ax,dword 0xbbbbbbbb
+	mov bx,dword 0xbbbbbbbb
+	mov eax,dword 0xbbbbbbbb
+	mov ebx,dword 0xbbbbbbbb
+	mov rax,dword 0xbbbbbbbb
+	mov rbx,dword 0xbbbbbbbb
+	mov al,dword 0xffffffffcccccccc
+	mov bl,dword 0xffffffffcccccccc
+	mov ax,dword 0xffffffffcccccccc
+	mov bx,dword 0xffffffffcccccccc
+	mov eax,dword 0xffffffffcccccccc
+	mov ebx,dword 0xffffffffcccccccc
+	mov rax,dword 0xffffffffcccccccc
+	mov rbx,dword 0xffffffffcccccccc
+
+	mov al,qword foo
+	mov bl,qword foo
+	mov ax,qword foo
+	mov bx,qword foo
+	mov eax,qword foo
+	mov ebx,qword foo
+	mov rax,qword foo
+	mov rbx,qword foo
+	mov al,qword 0xaaaaaaaaaaaaaaaa
+	mov bl,qword 0xaaaaaaaaaaaaaaaa
+	mov ax,qword 0xaaaaaaaaaaaaaaaa
+	mov bx,qword 0xaaaaaaaaaaaaaaaa
+	mov eax,qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,qword 0xaaaaaaaaaaaaaaaa
+	mov rax,qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,qword 0xaaaaaaaaaaaaaaaa
+	mov al,qword 0xbbbbbbbb
+	mov bl,qword 0xbbbbbbbb
+	mov ax,qword 0xbbbbbbbb
+	mov bx,qword 0xbbbbbbbb
+	mov eax,qword 0xbbbbbbbb
+	mov ebx,qword 0xbbbbbbbb
+	mov rax,qword 0xbbbbbbbb
+	mov rbx,qword 0xbbbbbbbb
+	mov al,qword 0xffffffffcccccccc
+	mov bl,qword 0xffffffffcccccccc
+	mov ax,qword 0xffffffffcccccccc
+	mov bx,qword 0xffffffffcccccccc
+	mov eax,qword 0xffffffffcccccccc
+	mov ebx,qword 0xffffffffcccccccc
+	mov rax,qword 0xffffffffcccccccc
+	mov rbx,qword 0xffffffffcccccccc
+
+	mov al,a64 foo
+	mov bl,a64 foo
+	mov ax,a64 foo
+	mov bx,a64 foo
+	mov eax,a64 foo
+	mov ebx,a64 foo
+	mov rax,a64 foo
+	mov rbx,a64 foo
+	mov al,a64 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 0xaaaaaaaaaaaaaaaa
+	mov al,a64 0xbbbbbbbb
+	mov bl,a64 0xbbbbbbbb
+	mov ax,a64 0xbbbbbbbb
+	mov bx,a64 0xbbbbbbbb
+	mov eax,a64 0xbbbbbbbb
+	mov ebx,a64 0xbbbbbbbb
+	mov rax,a64 0xbbbbbbbb
+	mov rbx,a64 0xbbbbbbbb
+	mov al,a64 0xffffffffcccccccc
+	mov bl,a64 0xffffffffcccccccc
+	mov ax,a64 0xffffffffcccccccc
+	mov bx,a64 0xffffffffcccccccc
+	mov eax,a64 0xffffffffcccccccc
+	mov ebx,a64 0xffffffffcccccccc
+	mov rax,a64 0xffffffffcccccccc
+	mov rbx,a64 0xffffffffcccccccc
+
+	mov al,a64 dword foo
+	mov bl,a64 dword foo
+	mov ax,a64 dword foo
+	mov bx,a64 dword foo
+	mov eax,a64 dword foo
+	mov ebx,a64 dword foo
+	mov rax,a64 dword foo
+	mov rbx,a64 dword foo
+	mov al,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov al,a64 dword 0xbbbbbbbb
+	mov bl,a64 dword 0xbbbbbbbb
+	mov ax,a64 dword 0xbbbbbbbb
+	mov bx,a64 dword 0xbbbbbbbb
+	mov eax,a64 dword 0xbbbbbbbb
+	mov ebx,a64 dword 0xbbbbbbbb
+	mov rax,a64 dword 0xbbbbbbbb
+	mov rbx,a64 dword 0xbbbbbbbb
+	mov al,a64 dword 0xffffffffcccccccc
+	mov bl,a64 dword 0xffffffffcccccccc
+	mov ax,a64 dword 0xffffffffcccccccc
+	mov bx,a64 dword 0xffffffffcccccccc
+	mov eax,a64 dword 0xffffffffcccccccc
+	mov ebx,a64 dword 0xffffffffcccccccc
+	mov rax,a64 dword 0xffffffffcccccccc
+	mov rbx,a64 dword 0xffffffffcccccccc
+
+	mov al,a64 qword foo
+	mov bl,a64 qword foo
+	mov ax,a64 qword foo
+	mov bx,a64 qword foo
+	mov eax,a64 qword foo
+	mov ebx,a64 qword foo
+	mov rax,a64 qword foo
+	mov rbx,a64 qword foo
+	mov al,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov al,a64 qword 0xbbbbbbbb
+	mov bl,a64 qword 0xbbbbbbbb
+	mov ax,a64 qword 0xbbbbbbbb
+	mov bx,a64 qword 0xbbbbbbbb
+	mov eax,a64 qword 0xbbbbbbbb
+	mov ebx,a64 qword 0xbbbbbbbb
+	mov rax,a64 qword 0xbbbbbbbb
+	mov rbx,a64 qword 0xbbbbbbbb
+	mov al,a64 qword 0xffffffffcccccccc
+	mov bl,a64 qword 0xffffffffcccccccc
+	mov ax,a64 qword 0xffffffffcccccccc
+	mov bx,a64 qword 0xffffffffcccccccc
+	mov eax,a64 qword 0xffffffffcccccccc
+	mov ebx,a64 qword 0xffffffffcccccccc
+	mov rax,a64 qword 0xffffffffcccccccc
+	mov rbx,a64 qword 0xffffffffcccccccc
+
+	mov al,a32 foo
+	mov bl,a32 foo
+	mov ax,a32 foo
+	mov bx,a32 foo
+	mov eax,a32 foo
+	mov ebx,a32 foo
+	mov rax,a32 foo
+	mov rbx,a32 foo
+	mov al,a32 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 0xaaaaaaaaaaaaaaaa
+	mov al,a32 0xbbbbbbbb
+	mov bl,a32 0xbbbbbbbb
+	mov ax,a32 0xbbbbbbbb
+	mov bx,a32 0xbbbbbbbb
+	mov eax,a32 0xbbbbbbbb
+	mov ebx,a32 0xbbbbbbbb
+	mov rax,a32 0xbbbbbbbb
+	mov rbx,a32 0xbbbbbbbb
+	mov al,a32 0xffffffffcccccccc
+	mov bl,a32 0xffffffffcccccccc
+	mov ax,a32 0xffffffffcccccccc
+	mov bx,a32 0xffffffffcccccccc
+	mov eax,a32 0xffffffffcccccccc
+	mov ebx,a32 0xffffffffcccccccc
+	mov rax,a32 0xffffffffcccccccc
+	mov rbx,a32 0xffffffffcccccccc
+
+	mov al,a32 dword foo
+	mov bl,a32 dword foo
+	mov ax,a32 dword foo
+	mov bx,a32 dword foo
+	mov eax,a32 dword foo
+	mov ebx,a32 dword foo
+	mov rax,a32 dword foo
+	mov rbx,a32 dword foo
+	mov al,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov al,a32 dword 0xbbbbbbbb
+	mov bl,a32 dword 0xbbbbbbbb
+	mov ax,a32 dword 0xbbbbbbbb
+	mov bx,a32 dword 0xbbbbbbbb
+	mov eax,a32 dword 0xbbbbbbbb
+	mov ebx,a32 dword 0xbbbbbbbb
+	mov rax,a32 dword 0xbbbbbbbb
+	mov rbx,a32 dword 0xbbbbbbbb
+	mov al,a32 dword 0xffffffffcccccccc
+	mov bl,a32 dword 0xffffffffcccccccc
+	mov ax,a32 dword 0xffffffffcccccccc
+	mov bx,a32 dword 0xffffffffcccccccc
+	mov eax,a32 dword 0xffffffffcccccccc
+	mov ebx,a32 dword 0xffffffffcccccccc
+	mov rax,a32 dword 0xffffffffcccccccc
+	mov rbx,a32 dword 0xffffffffcccccccc
+
+	mov al,a32 qword foo
+	mov bl,a32 qword foo
+	mov ax,a32 qword foo
+	mov bx,a32 qword foo
+	mov eax,a32 qword foo
+	mov ebx,a32 qword foo
+	mov rax,a32 qword foo
+	mov rbx,a32 qword foo
+	mov al,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov al,a32 qword 0xbbbbbbbb
+	mov bl,a32 qword 0xbbbbbbbb
+	mov ax,a32 qword 0xbbbbbbbb
+	mov bx,a32 qword 0xbbbbbbbb
+	mov eax,a32 qword 0xbbbbbbbb
+	mov ebx,a32 qword 0xbbbbbbbb
+	mov rax,a32 qword 0xbbbbbbbb
+	mov rbx,a32 qword 0xbbbbbbbb
+	mov al,a32 qword 0xffffffffcccccccc
+	mov bl,a32 qword 0xffffffffcccccccc
+	mov ax,a32 qword 0xffffffffcccccccc
+	mov bx,a32 qword 0xffffffffcccccccc
+	mov eax,a32 qword 0xffffffffcccccccc
+	mov ebx,a32 qword 0xffffffffcccccccc
+	mov rax,a32 qword 0xffffffffcccccccc
+	mov rbx,a32 qword 0xffffffffcccccccc
+
+	mov al,abs foo
+	mov bl,abs foo
+	mov ax,abs foo
+	mov bx,abs foo
+	mov eax,abs foo
+	mov ebx,abs foo
+	mov rax,abs foo
+	mov rbx,abs foo
+	mov al,abs 0xaaaaaaaaaaaaaaaa
+	mov bl,abs 0xaaaaaaaaaaaaaaaa
+	mov ax,abs 0xaaaaaaaaaaaaaaaa
+	mov bx,abs 0xaaaaaaaaaaaaaaaa
+	mov eax,abs 0xaaaaaaaaaaaaaaaa
+	mov ebx,abs 0xaaaaaaaaaaaaaaaa
+	mov rax,abs 0xaaaaaaaaaaaaaaaa
+	mov rbx,abs 0xaaaaaaaaaaaaaaaa
+	mov al,abs 0xbbbbbbbb
+	mov bl,abs 0xbbbbbbbb
+	mov ax,abs 0xbbbbbbbb
+	mov bx,abs 0xbbbbbbbb
+	mov eax,abs 0xbbbbbbbb
+	mov ebx,abs 0xbbbbbbbb
+	mov rax,abs 0xbbbbbbbb
+	mov rbx,abs 0xbbbbbbbb
+	mov al,abs 0xffffffffcccccccc
+	mov bl,abs 0xffffffffcccccccc
+	mov ax,abs 0xffffffffcccccccc
+	mov bx,abs 0xffffffffcccccccc
+	mov eax,abs 0xffffffffcccccccc
+	mov ebx,abs 0xffffffffcccccccc
+	mov rax,abs 0xffffffffcccccccc
+	mov rbx,abs 0xffffffffcccccccc
+
+	mov al,abs dword foo
+	mov bl,abs dword foo
+	mov ax,abs dword foo
+	mov bx,abs dword foo
+	mov eax,abs dword foo
+	mov ebx,abs dword foo
+	mov rax,abs dword foo
+	mov rbx,abs dword foo
+	mov al,abs dword 0xaaaaaaaaaaaaaaaa
+	mov bl,abs dword 0xaaaaaaaaaaaaaaaa
+	mov ax,abs dword 0xaaaaaaaaaaaaaaaa
+	mov bx,abs dword 0xaaaaaaaaaaaaaaaa
+	mov eax,abs dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,abs dword 0xaaaaaaaaaaaaaaaa
+	mov rax,abs dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,abs dword 0xaaaaaaaaaaaaaaaa
+	mov al,abs dword 0xbbbbbbbb
+	mov bl,abs dword 0xbbbbbbbb
+	mov ax,abs dword 0xbbbbbbbb
+	mov bx,abs dword 0xbbbbbbbb
+	mov eax,abs dword 0xbbbbbbbb
+	mov ebx,abs dword 0xbbbbbbbb
+	mov rax,abs dword 0xbbbbbbbb
+	mov rbx,abs dword 0xbbbbbbbb
+	mov al,abs dword 0xffffffffcccccccc
+	mov bl,abs dword 0xffffffffcccccccc
+	mov ax,abs dword 0xffffffffcccccccc
+	mov bx,abs dword 0xffffffffcccccccc
+	mov eax,abs dword 0xffffffffcccccccc
+	mov ebx,abs dword 0xffffffffcccccccc
+	mov rax,abs dword 0xffffffffcccccccc
+	mov rbx,abs dword 0xffffffffcccccccc
+
+	mov al,abs qword foo
+	mov bl,abs qword foo
+	mov ax,abs qword foo
+	mov bx,abs qword foo
+	mov eax,abs qword foo
+	mov ebx,abs qword foo
+	mov rax,abs qword foo
+	mov rbx,abs qword foo
+	mov al,abs qword 0xaaaaaaaaaaaaaaaa
+	mov bl,abs qword 0xaaaaaaaaaaaaaaaa
+	mov ax,abs qword 0xaaaaaaaaaaaaaaaa
+	mov bx,abs qword 0xaaaaaaaaaaaaaaaa
+	mov eax,abs qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,abs qword 0xaaaaaaaaaaaaaaaa
+	mov rax,abs qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,abs qword 0xaaaaaaaaaaaaaaaa
+	mov al,abs qword 0xbbbbbbbb
+	mov bl,abs qword 0xbbbbbbbb
+	mov ax,abs qword 0xbbbbbbbb
+	mov bx,abs qword 0xbbbbbbbb
+	mov eax,abs qword 0xbbbbbbbb
+	mov ebx,abs qword 0xbbbbbbbb
+	mov rax,abs qword 0xbbbbbbbb
+	mov rbx,abs qword 0xbbbbbbbb
+	mov al,abs qword 0xffffffffcccccccc
+	mov bl,abs qword 0xffffffffcccccccc
+	mov ax,abs qword 0xffffffffcccccccc
+	mov bx,abs qword 0xffffffffcccccccc
+	mov eax,abs qword 0xffffffffcccccccc
+	mov ebx,abs qword 0xffffffffcccccccc
+	mov rax,abs qword 0xffffffffcccccccc
+	mov rbx,abs qword 0xffffffffcccccccc
+
+	mov al,a64 abs foo
+	mov bl,a64 abs foo
+	mov ax,a64 abs foo
+	mov bx,a64 abs foo
+	mov eax,a64 abs foo
+	mov ebx,a64 abs foo
+	mov rax,a64 abs foo
+	mov rbx,a64 abs foo
+	mov al,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs 0xbbbbbbbb
+	mov bl,a64 abs 0xbbbbbbbb
+	mov ax,a64 abs 0xbbbbbbbb
+	mov bx,a64 abs 0xbbbbbbbb
+	mov eax,a64 abs 0xbbbbbbbb
+	mov ebx,a64 abs 0xbbbbbbbb
+	mov rax,a64 abs 0xbbbbbbbb
+	mov rbx,a64 abs 0xbbbbbbbb
+	mov al,a64 abs 0xffffffffcccccccc
+	mov bl,a64 abs 0xffffffffcccccccc
+	mov ax,a64 abs 0xffffffffcccccccc
+	mov bx,a64 abs 0xffffffffcccccccc
+	mov eax,a64 abs 0xffffffffcccccccc
+	mov ebx,a64 abs 0xffffffffcccccccc
+	mov rax,a64 abs 0xffffffffcccccccc
+	mov rbx,a64 abs 0xffffffffcccccccc
+
+	mov al,a64 abs dword foo
+	mov bl,a64 abs dword foo
+	mov ax,a64 abs dword foo
+	mov bx,a64 abs dword foo
+	mov eax,a64 abs dword foo
+	mov ebx,a64 abs dword foo
+	mov rax,a64 abs dword foo
+	mov rbx,a64 abs dword foo
+	mov al,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs dword 0xbbbbbbbb
+	mov bl,a64 abs dword 0xbbbbbbbb
+	mov ax,a64 abs dword 0xbbbbbbbb
+	mov bx,a64 abs dword 0xbbbbbbbb
+	mov eax,a64 abs dword 0xbbbbbbbb
+	mov ebx,a64 abs dword 0xbbbbbbbb
+	mov rax,a64 abs dword 0xbbbbbbbb
+	mov rbx,a64 abs dword 0xbbbbbbbb
+	mov al,a64 abs dword 0xffffffffcccccccc
+	mov bl,a64 abs dword 0xffffffffcccccccc
+	mov ax,a64 abs dword 0xffffffffcccccccc
+	mov bx,a64 abs dword 0xffffffffcccccccc
+	mov eax,a64 abs dword 0xffffffffcccccccc
+	mov ebx,a64 abs dword 0xffffffffcccccccc
+	mov rax,a64 abs dword 0xffffffffcccccccc
+	mov rbx,a64 abs dword 0xffffffffcccccccc
+
+	mov al,a64 abs qword foo
+	mov bl,a64 abs qword foo
+	mov ax,a64 abs qword foo
+	mov bx,a64 abs qword foo
+	mov eax,a64 abs qword foo
+	mov ebx,a64 abs qword foo
+	mov rax,a64 abs qword foo
+	mov rbx,a64 abs qword foo
+	mov al,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs qword 0xbbbbbbbb
+	mov bl,a64 abs qword 0xbbbbbbbb
+	mov ax,a64 abs qword 0xbbbbbbbb
+	mov bx,a64 abs qword 0xbbbbbbbb
+	mov eax,a64 abs qword 0xbbbbbbbb
+	mov ebx,a64 abs qword 0xbbbbbbbb
+	mov rax,a64 abs qword 0xbbbbbbbb
+	mov rbx,a64 abs qword 0xbbbbbbbb
+	mov al,a64 abs qword 0xffffffffcccccccc
+	mov bl,a64 abs qword 0xffffffffcccccccc
+	mov ax,a64 abs qword 0xffffffffcccccccc
+	mov bx,a64 abs qword 0xffffffffcccccccc
+	mov eax,a64 abs qword 0xffffffffcccccccc
+	mov ebx,a64 abs qword 0xffffffffcccccccc
+	mov rax,a64 abs qword 0xffffffffcccccccc
+	mov rbx,a64 abs qword 0xffffffffcccccccc
+
+	mov al,a32 abs foo
+	mov bl,a32 abs foo
+	mov ax,a32 abs foo
+	mov bx,a32 abs foo
+	mov eax,a32 abs foo
+	mov ebx,a32 abs foo
+	mov rax,a32 abs foo
+	mov rbx,a32 abs foo
+	mov al,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs 0xbbbbbbbb
+	mov bl,a32 abs 0xbbbbbbbb
+	mov ax,a32 abs 0xbbbbbbbb
+	mov bx,a32 abs 0xbbbbbbbb
+	mov eax,a32 abs 0xbbbbbbbb
+	mov ebx,a32 abs 0xbbbbbbbb
+	mov rax,a32 abs 0xbbbbbbbb
+	mov rbx,a32 abs 0xbbbbbbbb
+	mov al,a32 abs 0xffffffffcccccccc
+	mov bl,a32 abs 0xffffffffcccccccc
+	mov ax,a32 abs 0xffffffffcccccccc
+	mov bx,a32 abs 0xffffffffcccccccc
+	mov eax,a32 abs 0xffffffffcccccccc
+	mov ebx,a32 abs 0xffffffffcccccccc
+	mov rax,a32 abs 0xffffffffcccccccc
+	mov rbx,a32 abs 0xffffffffcccccccc
+
+	mov al,a32 abs dword foo
+	mov bl,a32 abs dword foo
+	mov ax,a32 abs dword foo
+	mov bx,a32 abs dword foo
+	mov eax,a32 abs dword foo
+	mov ebx,a32 abs dword foo
+	mov rax,a32 abs dword foo
+	mov rbx,a32 abs dword foo
+	mov al,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs dword 0xbbbbbbbb
+	mov bl,a32 abs dword 0xbbbbbbbb
+	mov ax,a32 abs dword 0xbbbbbbbb
+	mov bx,a32 abs dword 0xbbbbbbbb
+	mov eax,a32 abs dword 0xbbbbbbbb
+	mov ebx,a32 abs dword 0xbbbbbbbb
+	mov rax,a32 abs dword 0xbbbbbbbb
+	mov rbx,a32 abs dword 0xbbbbbbbb
+	mov al,a32 abs dword 0xffffffffcccccccc
+	mov bl,a32 abs dword 0xffffffffcccccccc
+	mov ax,a32 abs dword 0xffffffffcccccccc
+	mov bx,a32 abs dword 0xffffffffcccccccc
+	mov eax,a32 abs dword 0xffffffffcccccccc
+	mov ebx,a32 abs dword 0xffffffffcccccccc
+	mov rax,a32 abs dword 0xffffffffcccccccc
+	mov rbx,a32 abs dword 0xffffffffcccccccc
+
+	mov al,a32 abs qword foo
+	mov bl,a32 abs qword foo
+	mov ax,a32 abs qword foo
+	mov bx,a32 abs qword foo
+	mov eax,a32 abs qword foo
+	mov ebx,a32 abs qword foo
+	mov rax,a32 abs qword foo
+	mov rbx,a32 abs qword foo
+	mov al,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs qword 0xbbbbbbbb
+	mov bl,a32 abs qword 0xbbbbbbbb
+	mov ax,a32 abs qword 0xbbbbbbbb
+	mov bx,a32 abs qword 0xbbbbbbbb
+	mov eax,a32 abs qword 0xbbbbbbbb
+	mov ebx,a32 abs qword 0xbbbbbbbb
+	mov rax,a32 abs qword 0xbbbbbbbb
+	mov rbx,a32 abs qword 0xbbbbbbbb
+	mov al,a32 abs qword 0xffffffffcccccccc
+	mov bl,a32 abs qword 0xffffffffcccccccc
+	mov ax,a32 abs qword 0xffffffffcccccccc
+	mov bx,a32 abs qword 0xffffffffcccccccc
+	mov eax,a32 abs qword 0xffffffffcccccccc
+	mov ebx,a32 abs qword 0xffffffffcccccccc
+	mov rax,a32 abs qword 0xffffffffcccccccc
+	mov rbx,a32 abs qword 0xffffffffcccccccc
+
+	mov al,rel foo
+	mov bl,rel foo
+	mov ax,rel foo
+	mov bx,rel foo
+	mov eax,rel foo
+	mov ebx,rel foo
+	mov rax,rel foo
+	mov rbx,rel foo
+	mov al,rel 0xaaaaaaaaaaaaaaaa
+	mov bl,rel 0xaaaaaaaaaaaaaaaa
+	mov ax,rel 0xaaaaaaaaaaaaaaaa
+	mov bx,rel 0xaaaaaaaaaaaaaaaa
+	mov eax,rel 0xaaaaaaaaaaaaaaaa
+	mov ebx,rel 0xaaaaaaaaaaaaaaaa
+	mov rax,rel 0xaaaaaaaaaaaaaaaa
+	mov rbx,rel 0xaaaaaaaaaaaaaaaa
+	mov al,rel 0xbbbbbbbb
+	mov bl,rel 0xbbbbbbbb
+	mov ax,rel 0xbbbbbbbb
+	mov bx,rel 0xbbbbbbbb
+	mov eax,rel 0xbbbbbbbb
+	mov ebx,rel 0xbbbbbbbb
+	mov rax,rel 0xbbbbbbbb
+	mov rbx,rel 0xbbbbbbbb
+	mov al,rel 0xffffffffcccccccc
+	mov bl,rel 0xffffffffcccccccc
+	mov ax,rel 0xffffffffcccccccc
+	mov bx,rel 0xffffffffcccccccc
+	mov eax,rel 0xffffffffcccccccc
+	mov ebx,rel 0xffffffffcccccccc
+	mov rax,rel 0xffffffffcccccccc
+	mov rbx,rel 0xffffffffcccccccc
+
+	mov al,rel dword foo
+	mov bl,rel dword foo
+	mov ax,rel dword foo
+	mov bx,rel dword foo
+	mov eax,rel dword foo
+	mov ebx,rel dword foo
+	mov rax,rel dword foo
+	mov rbx,rel dword foo
+	mov al,rel dword 0xaaaaaaaaaaaaaaaa
+	mov bl,rel dword 0xaaaaaaaaaaaaaaaa
+	mov ax,rel dword 0xaaaaaaaaaaaaaaaa
+	mov bx,rel dword 0xaaaaaaaaaaaaaaaa
+	mov eax,rel dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,rel dword 0xaaaaaaaaaaaaaaaa
+	mov rax,rel dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,rel dword 0xaaaaaaaaaaaaaaaa
+	mov al,rel dword 0xbbbbbbbb
+	mov bl,rel dword 0xbbbbbbbb
+	mov ax,rel dword 0xbbbbbbbb
+	mov bx,rel dword 0xbbbbbbbb
+	mov eax,rel dword 0xbbbbbbbb
+	mov ebx,rel dword 0xbbbbbbbb
+	mov rax,rel dword 0xbbbbbbbb
+	mov rbx,rel dword 0xbbbbbbbb
+	mov al,rel dword 0xffffffffcccccccc
+	mov bl,rel dword 0xffffffffcccccccc
+	mov ax,rel dword 0xffffffffcccccccc
+	mov bx,rel dword 0xffffffffcccccccc
+	mov eax,rel dword 0xffffffffcccccccc
+	mov ebx,rel dword 0xffffffffcccccccc
+	mov rax,rel dword 0xffffffffcccccccc
+	mov rbx,rel dword 0xffffffffcccccccc
+
+	mov al,rel qword foo
+	mov bl,rel qword foo
+	mov ax,rel qword foo
+	mov bx,rel qword foo
+	mov eax,rel qword foo
+	mov ebx,rel qword foo
+	mov rax,rel qword foo
+	mov rbx,rel qword foo
+	mov al,rel qword 0xaaaaaaaaaaaaaaaa
+	mov bl,rel qword 0xaaaaaaaaaaaaaaaa
+	mov ax,rel qword 0xaaaaaaaaaaaaaaaa
+	mov bx,rel qword 0xaaaaaaaaaaaaaaaa
+	mov eax,rel qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,rel qword 0xaaaaaaaaaaaaaaaa
+	mov rax,rel qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,rel qword 0xaaaaaaaaaaaaaaaa
+	mov al,rel qword 0xbbbbbbbb
+	mov bl,rel qword 0xbbbbbbbb
+	mov ax,rel qword 0xbbbbbbbb
+	mov bx,rel qword 0xbbbbbbbb
+	mov eax,rel qword 0xbbbbbbbb
+	mov ebx,rel qword 0xbbbbbbbb
+	mov rax,rel qword 0xbbbbbbbb
+	mov rbx,rel qword 0xbbbbbbbb
+	mov al,rel qword 0xffffffffcccccccc
+	mov bl,rel qword 0xffffffffcccccccc
+	mov ax,rel qword 0xffffffffcccccccc
+	mov bx,rel qword 0xffffffffcccccccc
+	mov eax,rel qword 0xffffffffcccccccc
+	mov ebx,rel qword 0xffffffffcccccccc
+	mov rax,rel qword 0xffffffffcccccccc
+	mov rbx,rel qword 0xffffffffcccccccc
+
+	mov al,a64 rel foo
+	mov bl,a64 rel foo
+	mov ax,a64 rel foo
+	mov bx,a64 rel foo
+	mov eax,a64 rel foo
+	mov ebx,a64 rel foo
+	mov rax,a64 rel foo
+	mov rbx,a64 rel foo
+	mov al,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel 0xbbbbbbbb
+	mov bl,a64 rel 0xbbbbbbbb
+	mov ax,a64 rel 0xbbbbbbbb
+	mov bx,a64 rel 0xbbbbbbbb
+	mov eax,a64 rel 0xbbbbbbbb
+	mov ebx,a64 rel 0xbbbbbbbb
+	mov rax,a64 rel 0xbbbbbbbb
+	mov rbx,a64 rel 0xbbbbbbbb
+	mov al,a64 rel 0xffffffffcccccccc
+	mov bl,a64 rel 0xffffffffcccccccc
+	mov ax,a64 rel 0xffffffffcccccccc
+	mov bx,a64 rel 0xffffffffcccccccc
+	mov eax,a64 rel 0xffffffffcccccccc
+	mov ebx,a64 rel 0xffffffffcccccccc
+	mov rax,a64 rel 0xffffffffcccccccc
+	mov rbx,a64 rel 0xffffffffcccccccc
+
+	mov al,a64 rel dword foo
+	mov bl,a64 rel dword foo
+	mov ax,a64 rel dword foo
+	mov bx,a64 rel dword foo
+	mov eax,a64 rel dword foo
+	mov ebx,a64 rel dword foo
+	mov rax,a64 rel dword foo
+	mov rbx,a64 rel dword foo
+	mov al,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel dword 0xbbbbbbbb
+	mov bl,a64 rel dword 0xbbbbbbbb
+	mov ax,a64 rel dword 0xbbbbbbbb
+	mov bx,a64 rel dword 0xbbbbbbbb
+	mov eax,a64 rel dword 0xbbbbbbbb
+	mov ebx,a64 rel dword 0xbbbbbbbb
+	mov rax,a64 rel dword 0xbbbbbbbb
+	mov rbx,a64 rel dword 0xbbbbbbbb
+	mov al,a64 rel dword 0xffffffffcccccccc
+	mov bl,a64 rel dword 0xffffffffcccccccc
+	mov ax,a64 rel dword 0xffffffffcccccccc
+	mov bx,a64 rel dword 0xffffffffcccccccc
+	mov eax,a64 rel dword 0xffffffffcccccccc
+	mov ebx,a64 rel dword 0xffffffffcccccccc
+	mov rax,a64 rel dword 0xffffffffcccccccc
+	mov rbx,a64 rel dword 0xffffffffcccccccc
+
+	mov al,a64 rel qword foo
+	mov bl,a64 rel qword foo
+	mov ax,a64 rel qword foo
+	mov bx,a64 rel qword foo
+	mov eax,a64 rel qword foo
+	mov ebx,a64 rel qword foo
+	mov rax,a64 rel qword foo
+	mov rbx,a64 rel qword foo
+	mov al,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel qword 0xbbbbbbbb
+	mov bl,a64 rel qword 0xbbbbbbbb
+	mov ax,a64 rel qword 0xbbbbbbbb
+	mov bx,a64 rel qword 0xbbbbbbbb
+	mov eax,a64 rel qword 0xbbbbbbbb
+	mov ebx,a64 rel qword 0xbbbbbbbb
+	mov rax,a64 rel qword 0xbbbbbbbb
+	mov rbx,a64 rel qword 0xbbbbbbbb
+	mov al,a64 rel qword 0xffffffffcccccccc
+	mov bl,a64 rel qword 0xffffffffcccccccc
+	mov ax,a64 rel qword 0xffffffffcccccccc
+	mov bx,a64 rel qword 0xffffffffcccccccc
+	mov eax,a64 rel qword 0xffffffffcccccccc
+	mov ebx,a64 rel qword 0xffffffffcccccccc
+	mov rax,a64 rel qword 0xffffffffcccccccc
+	mov rbx,a64 rel qword 0xffffffffcccccccc
+
+	mov al,a32 rel foo
+	mov bl,a32 rel foo
+	mov ax,a32 rel foo
+	mov bx,a32 rel foo
+	mov eax,a32 rel foo
+	mov ebx,a32 rel foo
+	mov rax,a32 rel foo
+	mov rbx,a32 rel foo
+	mov al,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel 0xbbbbbbbb
+	mov bl,a32 rel 0xbbbbbbbb
+	mov ax,a32 rel 0xbbbbbbbb
+	mov bx,a32 rel 0xbbbbbbbb
+	mov eax,a32 rel 0xbbbbbbbb
+	mov ebx,a32 rel 0xbbbbbbbb
+	mov rax,a32 rel 0xbbbbbbbb
+	mov rbx,a32 rel 0xbbbbbbbb
+	mov al,a32 rel 0xffffffffcccccccc
+	mov bl,a32 rel 0xffffffffcccccccc
+	mov ax,a32 rel 0xffffffffcccccccc
+	mov bx,a32 rel 0xffffffffcccccccc
+	mov eax,a32 rel 0xffffffffcccccccc
+	mov ebx,a32 rel 0xffffffffcccccccc
+	mov rax,a32 rel 0xffffffffcccccccc
+	mov rbx,a32 rel 0xffffffffcccccccc
+
+	mov al,a32 rel dword foo
+	mov bl,a32 rel dword foo
+	mov ax,a32 rel dword foo
+	mov bx,a32 rel dword foo
+	mov eax,a32 rel dword foo
+	mov ebx,a32 rel dword foo
+	mov rax,a32 rel dword foo
+	mov rbx,a32 rel dword foo
+	mov al,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel dword 0xbbbbbbbb
+	mov bl,a32 rel dword 0xbbbbbbbb
+	mov ax,a32 rel dword 0xbbbbbbbb
+	mov bx,a32 rel dword 0xbbbbbbbb
+	mov eax,a32 rel dword 0xbbbbbbbb
+	mov ebx,a32 rel dword 0xbbbbbbbb
+	mov rax,a32 rel dword 0xbbbbbbbb
+	mov rbx,a32 rel dword 0xbbbbbbbb
+	mov al,a32 rel dword 0xffffffffcccccccc
+	mov bl,a32 rel dword 0xffffffffcccccccc
+	mov ax,a32 rel dword 0xffffffffcccccccc
+	mov bx,a32 rel dword 0xffffffffcccccccc
+	mov eax,a32 rel dword 0xffffffffcccccccc
+	mov ebx,a32 rel dword 0xffffffffcccccccc
+	mov rax,a32 rel dword 0xffffffffcccccccc
+	mov rbx,a32 rel dword 0xffffffffcccccccc
+
+	mov al,a32 rel qword foo
+	mov bl,a32 rel qword foo
+	mov ax,a32 rel qword foo
+	mov bx,a32 rel qword foo
+	mov eax,a32 rel qword foo
+	mov ebx,a32 rel qword foo
+	mov rax,a32 rel qword foo
+	mov rbx,a32 rel qword foo
+	mov al,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel qword 0xbbbbbbbb
+	mov bl,a32 rel qword 0xbbbbbbbb
+	mov ax,a32 rel qword 0xbbbbbbbb
+	mov bx,a32 rel qword 0xbbbbbbbb
+	mov eax,a32 rel qword 0xbbbbbbbb
+	mov ebx,a32 rel qword 0xbbbbbbbb
+	mov rax,a32 rel qword 0xbbbbbbbb
+	mov rbx,a32 rel qword 0xbbbbbbbb
+	mov al,a32 rel qword 0xffffffffcccccccc
+	mov bl,a32 rel qword 0xffffffffcccccccc
+	mov ax,a32 rel qword 0xffffffffcccccccc
+	mov bx,a32 rel qword 0xffffffffcccccccc
+	mov eax,a32 rel qword 0xffffffffcccccccc
+	mov ebx,a32 rel qword 0xffffffffcccccccc
+	mov rax,a32 rel qword 0xffffffffcccccccc
+	mov rbx,a32 rel qword 0xffffffffcccccccc
+
+	mov al,fs:foo
+	mov bl,fs:foo
+	mov ax,fs:foo
+	mov bx,fs:foo
+	mov eax,fs:foo
+	mov ebx,fs:foo
+	mov rax,fs:foo
+	mov rbx,fs:foo
+	mov al,fs:0xaaaaaaaaaaaaaaaa
+	mov bl,fs:0xaaaaaaaaaaaaaaaa
+	mov ax,fs:0xaaaaaaaaaaaaaaaa
+	mov bx,fs:0xaaaaaaaaaaaaaaaa
+	mov eax,fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,fs:0xaaaaaaaaaaaaaaaa
+	mov rax,fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,fs:0xaaaaaaaaaaaaaaaa
+	mov al,fs:0xbbbbbbbb
+	mov bl,fs:0xbbbbbbbb
+	mov ax,fs:0xbbbbbbbb
+	mov bx,fs:0xbbbbbbbb
+	mov eax,fs:0xbbbbbbbb
+	mov ebx,fs:0xbbbbbbbb
+	mov rax,fs:0xbbbbbbbb
+	mov rbx,fs:0xbbbbbbbb
+	mov al,fs:0xffffffffcccccccc
+	mov bl,fs:0xffffffffcccccccc
+	mov ax,fs:0xffffffffcccccccc
+	mov bx,fs:0xffffffffcccccccc
+	mov eax,fs:0xffffffffcccccccc
+	mov ebx,fs:0xffffffffcccccccc
+	mov rax,fs:0xffffffffcccccccc
+	mov rbx,fs:0xffffffffcccccccc
+
+	mov al,dword fs:foo
+	mov bl,dword fs:foo
+	mov ax,dword fs:foo
+	mov bx,dword fs:foo
+	mov eax,dword fs:foo
+	mov ebx,dword fs:foo
+	mov rax,dword fs:foo
+	mov rbx,dword fs:foo
+	mov al,dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,dword fs:0xbbbbbbbb
+	mov bl,dword fs:0xbbbbbbbb
+	mov ax,dword fs:0xbbbbbbbb
+	mov bx,dword fs:0xbbbbbbbb
+	mov eax,dword fs:0xbbbbbbbb
+	mov ebx,dword fs:0xbbbbbbbb
+	mov rax,dword fs:0xbbbbbbbb
+	mov rbx,dword fs:0xbbbbbbbb
+	mov al,dword fs:0xffffffffcccccccc
+	mov bl,dword fs:0xffffffffcccccccc
+	mov ax,dword fs:0xffffffffcccccccc
+	mov bx,dword fs:0xffffffffcccccccc
+	mov eax,dword fs:0xffffffffcccccccc
+	mov ebx,dword fs:0xffffffffcccccccc
+	mov rax,dword fs:0xffffffffcccccccc
+	mov rbx,dword fs:0xffffffffcccccccc
+
+	mov al,qword fs:foo
+	mov bl,qword fs:foo
+	mov ax,qword fs:foo
+	mov bx,qword fs:foo
+	mov eax,qword fs:foo
+	mov ebx,qword fs:foo
+	mov rax,qword fs:foo
+	mov rbx,qword fs:foo
+	mov al,qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,qword fs:0xbbbbbbbb
+	mov bl,qword fs:0xbbbbbbbb
+	mov ax,qword fs:0xbbbbbbbb
+	mov bx,qword fs:0xbbbbbbbb
+	mov eax,qword fs:0xbbbbbbbb
+	mov ebx,qword fs:0xbbbbbbbb
+	mov rax,qword fs:0xbbbbbbbb
+	mov rbx,qword fs:0xbbbbbbbb
+	mov al,qword fs:0xffffffffcccccccc
+	mov bl,qword fs:0xffffffffcccccccc
+	mov ax,qword fs:0xffffffffcccccccc
+	mov bx,qword fs:0xffffffffcccccccc
+	mov eax,qword fs:0xffffffffcccccccc
+	mov ebx,qword fs:0xffffffffcccccccc
+	mov rax,qword fs:0xffffffffcccccccc
+	mov rbx,qword fs:0xffffffffcccccccc
+
+	mov al,a64 fs:foo
+	mov bl,a64 fs:foo
+	mov ax,a64 fs:foo
+	mov bx,a64 fs:foo
+	mov eax,a64 fs:foo
+	mov ebx,a64 fs:foo
+	mov rax,a64 fs:foo
+	mov rbx,a64 fs:foo
+	mov al,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 fs:0xbbbbbbbb
+	mov bl,a64 fs:0xbbbbbbbb
+	mov ax,a64 fs:0xbbbbbbbb
+	mov bx,a64 fs:0xbbbbbbbb
+	mov eax,a64 fs:0xbbbbbbbb
+	mov ebx,a64 fs:0xbbbbbbbb
+	mov rax,a64 fs:0xbbbbbbbb
+	mov rbx,a64 fs:0xbbbbbbbb
+	mov al,a64 fs:0xffffffffcccccccc
+	mov bl,a64 fs:0xffffffffcccccccc
+	mov ax,a64 fs:0xffffffffcccccccc
+	mov bx,a64 fs:0xffffffffcccccccc
+	mov eax,a64 fs:0xffffffffcccccccc
+	mov ebx,a64 fs:0xffffffffcccccccc
+	mov rax,a64 fs:0xffffffffcccccccc
+	mov rbx,a64 fs:0xffffffffcccccccc
+
+	mov al,a64 dword fs:foo
+	mov bl,a64 dword fs:foo
+	mov ax,a64 dword fs:foo
+	mov bx,a64 dword fs:foo
+	mov eax,a64 dword fs:foo
+	mov ebx,a64 dword fs:foo
+	mov rax,a64 dword fs:foo
+	mov rbx,a64 dword fs:foo
+	mov al,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 dword fs:0xbbbbbbbb
+	mov bl,a64 dword fs:0xbbbbbbbb
+	mov ax,a64 dword fs:0xbbbbbbbb
+	mov bx,a64 dword fs:0xbbbbbbbb
+	mov eax,a64 dword fs:0xbbbbbbbb
+	mov ebx,a64 dword fs:0xbbbbbbbb
+	mov rax,a64 dword fs:0xbbbbbbbb
+	mov rbx,a64 dword fs:0xbbbbbbbb
+	mov al,a64 dword fs:0xffffffffcccccccc
+	mov bl,a64 dword fs:0xffffffffcccccccc
+	mov ax,a64 dword fs:0xffffffffcccccccc
+	mov bx,a64 dword fs:0xffffffffcccccccc
+	mov eax,a64 dword fs:0xffffffffcccccccc
+	mov ebx,a64 dword fs:0xffffffffcccccccc
+	mov rax,a64 dword fs:0xffffffffcccccccc
+	mov rbx,a64 dword fs:0xffffffffcccccccc
+
+	mov al,a64 qword fs:foo
+	mov bl,a64 qword fs:foo
+	mov ax,a64 qword fs:foo
+	mov bx,a64 qword fs:foo
+	mov eax,a64 qword fs:foo
+	mov ebx,a64 qword fs:foo
+	mov rax,a64 qword fs:foo
+	mov rbx,a64 qword fs:foo
+	mov al,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 qword fs:0xbbbbbbbb
+	mov bl,a64 qword fs:0xbbbbbbbb
+	mov ax,a64 qword fs:0xbbbbbbbb
+	mov bx,a64 qword fs:0xbbbbbbbb
+	mov eax,a64 qword fs:0xbbbbbbbb
+	mov ebx,a64 qword fs:0xbbbbbbbb
+	mov rax,a64 qword fs:0xbbbbbbbb
+	mov rbx,a64 qword fs:0xbbbbbbbb
+	mov al,a64 qword fs:0xffffffffcccccccc
+	mov bl,a64 qword fs:0xffffffffcccccccc
+	mov ax,a64 qword fs:0xffffffffcccccccc
+	mov bx,a64 qword fs:0xffffffffcccccccc
+	mov eax,a64 qword fs:0xffffffffcccccccc
+	mov ebx,a64 qword fs:0xffffffffcccccccc
+	mov rax,a64 qword fs:0xffffffffcccccccc
+	mov rbx,a64 qword fs:0xffffffffcccccccc
+
+	mov al,a32 fs:foo
+	mov bl,a32 fs:foo
+	mov ax,a32 fs:foo
+	mov bx,a32 fs:foo
+	mov eax,a32 fs:foo
+	mov ebx,a32 fs:foo
+	mov rax,a32 fs:foo
+	mov rbx,a32 fs:foo
+	mov al,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 fs:0xbbbbbbbb
+	mov bl,a32 fs:0xbbbbbbbb
+	mov ax,a32 fs:0xbbbbbbbb
+	mov bx,a32 fs:0xbbbbbbbb
+	mov eax,a32 fs:0xbbbbbbbb
+	mov ebx,a32 fs:0xbbbbbbbb
+	mov rax,a32 fs:0xbbbbbbbb
+	mov rbx,a32 fs:0xbbbbbbbb
+	mov al,a32 fs:0xffffffffcccccccc
+	mov bl,a32 fs:0xffffffffcccccccc
+	mov ax,a32 fs:0xffffffffcccccccc
+	mov bx,a32 fs:0xffffffffcccccccc
+	mov eax,a32 fs:0xffffffffcccccccc
+	mov ebx,a32 fs:0xffffffffcccccccc
+	mov rax,a32 fs:0xffffffffcccccccc
+	mov rbx,a32 fs:0xffffffffcccccccc
+
+	mov al,a32 dword fs:foo
+	mov bl,a32 dword fs:foo
+	mov ax,a32 dword fs:foo
+	mov bx,a32 dword fs:foo
+	mov eax,a32 dword fs:foo
+	mov ebx,a32 dword fs:foo
+	mov rax,a32 dword fs:foo
+	mov rbx,a32 dword fs:foo
+	mov al,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 dword fs:0xbbbbbbbb
+	mov bl,a32 dword fs:0xbbbbbbbb
+	mov ax,a32 dword fs:0xbbbbbbbb
+	mov bx,a32 dword fs:0xbbbbbbbb
+	mov eax,a32 dword fs:0xbbbbbbbb
+	mov ebx,a32 dword fs:0xbbbbbbbb
+	mov rax,a32 dword fs:0xbbbbbbbb
+	mov rbx,a32 dword fs:0xbbbbbbbb
+	mov al,a32 dword fs:0xffffffffcccccccc
+	mov bl,a32 dword fs:0xffffffffcccccccc
+	mov ax,a32 dword fs:0xffffffffcccccccc
+	mov bx,a32 dword fs:0xffffffffcccccccc
+	mov eax,a32 dword fs:0xffffffffcccccccc
+	mov ebx,a32 dword fs:0xffffffffcccccccc
+	mov rax,a32 dword fs:0xffffffffcccccccc
+	mov rbx,a32 dword fs:0xffffffffcccccccc
+
+	mov al,a32 qword fs:foo
+	mov bl,a32 qword fs:foo
+	mov ax,a32 qword fs:foo
+	mov bx,a32 qword fs:foo
+	mov eax,a32 qword fs:foo
+	mov ebx,a32 qword fs:foo
+	mov rax,a32 qword fs:foo
+	mov rbx,a32 qword fs:foo
+	mov al,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 qword fs:0xbbbbbbbb
+	mov bl,a32 qword fs:0xbbbbbbbb
+	mov ax,a32 qword fs:0xbbbbbbbb
+	mov bx,a32 qword fs:0xbbbbbbbb
+	mov eax,a32 qword fs:0xbbbbbbbb
+	mov ebx,a32 qword fs:0xbbbbbbbb
+	mov rax,a32 qword fs:0xbbbbbbbb
+	mov rbx,a32 qword fs:0xbbbbbbbb
+	mov al,a32 qword fs:0xffffffffcccccccc
+	mov bl,a32 qword fs:0xffffffffcccccccc
+	mov ax,a32 qword fs:0xffffffffcccccccc
+	mov bx,a32 qword fs:0xffffffffcccccccc
+	mov eax,a32 qword fs:0xffffffffcccccccc
+	mov ebx,a32 qword fs:0xffffffffcccccccc
+	mov rax,a32 qword fs:0xffffffffcccccccc
+	mov rbx,a32 qword fs:0xffffffffcccccccc
+
+	mov al,abs fs:foo
+	mov bl,abs fs:foo
+	mov ax,abs fs:foo
+	mov bx,abs fs:foo
+	mov eax,abs fs:foo
+	mov ebx,abs fs:foo
+	mov rax,abs fs:foo
+	mov rbx,abs fs:foo
+	mov al,abs fs:0xaaaaaaaaaaaaaaaa
+	mov bl,abs fs:0xaaaaaaaaaaaaaaaa
+	mov ax,abs fs:0xaaaaaaaaaaaaaaaa
+	mov bx,abs fs:0xaaaaaaaaaaaaaaaa
+	mov eax,abs fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,abs fs:0xaaaaaaaaaaaaaaaa
+	mov rax,abs fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,abs fs:0xaaaaaaaaaaaaaaaa
+	mov al,abs fs:0xbbbbbbbb
+	mov bl,abs fs:0xbbbbbbbb
+	mov ax,abs fs:0xbbbbbbbb
+	mov bx,abs fs:0xbbbbbbbb
+	mov eax,abs fs:0xbbbbbbbb
+	mov ebx,abs fs:0xbbbbbbbb
+	mov rax,abs fs:0xbbbbbbbb
+	mov rbx,abs fs:0xbbbbbbbb
+	mov al,abs fs:0xffffffffcccccccc
+	mov bl,abs fs:0xffffffffcccccccc
+	mov ax,abs fs:0xffffffffcccccccc
+	mov bx,abs fs:0xffffffffcccccccc
+	mov eax,abs fs:0xffffffffcccccccc
+	mov ebx,abs fs:0xffffffffcccccccc
+	mov rax,abs fs:0xffffffffcccccccc
+	mov rbx,abs fs:0xffffffffcccccccc
+
+	mov al,abs dword fs:foo
+	mov bl,abs dword fs:foo
+	mov ax,abs dword fs:foo
+	mov bx,abs dword fs:foo
+	mov eax,abs dword fs:foo
+	mov ebx,abs dword fs:foo
+	mov rax,abs dword fs:foo
+	mov rbx,abs dword fs:foo
+	mov al,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,abs dword fs:0xbbbbbbbb
+	mov bl,abs dword fs:0xbbbbbbbb
+	mov ax,abs dword fs:0xbbbbbbbb
+	mov bx,abs dword fs:0xbbbbbbbb
+	mov eax,abs dword fs:0xbbbbbbbb
+	mov ebx,abs dword fs:0xbbbbbbbb
+	mov rax,abs dword fs:0xbbbbbbbb
+	mov rbx,abs dword fs:0xbbbbbbbb
+	mov al,abs dword fs:0xffffffffcccccccc
+	mov bl,abs dword fs:0xffffffffcccccccc
+	mov ax,abs dword fs:0xffffffffcccccccc
+	mov bx,abs dword fs:0xffffffffcccccccc
+	mov eax,abs dword fs:0xffffffffcccccccc
+	mov ebx,abs dword fs:0xffffffffcccccccc
+	mov rax,abs dword fs:0xffffffffcccccccc
+	mov rbx,abs dword fs:0xffffffffcccccccc
+
+	mov al,abs qword fs:foo
+	mov bl,abs qword fs:foo
+	mov ax,abs qword fs:foo
+	mov bx,abs qword fs:foo
+	mov eax,abs qword fs:foo
+	mov ebx,abs qword fs:foo
+	mov rax,abs qword fs:foo
+	mov rbx,abs qword fs:foo
+	mov al,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,abs qword fs:0xbbbbbbbb
+	mov bl,abs qword fs:0xbbbbbbbb
+	mov ax,abs qword fs:0xbbbbbbbb
+	mov bx,abs qword fs:0xbbbbbbbb
+	mov eax,abs qword fs:0xbbbbbbbb
+	mov ebx,abs qword fs:0xbbbbbbbb
+	mov rax,abs qword fs:0xbbbbbbbb
+	mov rbx,abs qword fs:0xbbbbbbbb
+	mov al,abs qword fs:0xffffffffcccccccc
+	mov bl,abs qword fs:0xffffffffcccccccc
+	mov ax,abs qword fs:0xffffffffcccccccc
+	mov bx,abs qword fs:0xffffffffcccccccc
+	mov eax,abs qword fs:0xffffffffcccccccc
+	mov ebx,abs qword fs:0xffffffffcccccccc
+	mov rax,abs qword fs:0xffffffffcccccccc
+	mov rbx,abs qword fs:0xffffffffcccccccc
+
+	mov al,a64 abs fs:foo
+	mov bl,a64 abs fs:foo
+	mov ax,a64 abs fs:foo
+	mov bx,a64 abs fs:foo
+	mov eax,a64 abs fs:foo
+	mov ebx,a64 abs fs:foo
+	mov rax,a64 abs fs:foo
+	mov rbx,a64 abs fs:foo
+	mov al,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs fs:0xbbbbbbbb
+	mov bl,a64 abs fs:0xbbbbbbbb
+	mov ax,a64 abs fs:0xbbbbbbbb
+	mov bx,a64 abs fs:0xbbbbbbbb
+	mov eax,a64 abs fs:0xbbbbbbbb
+	mov ebx,a64 abs fs:0xbbbbbbbb
+	mov rax,a64 abs fs:0xbbbbbbbb
+	mov rbx,a64 abs fs:0xbbbbbbbb
+	mov al,a64 abs fs:0xffffffffcccccccc
+	mov bl,a64 abs fs:0xffffffffcccccccc
+	mov ax,a64 abs fs:0xffffffffcccccccc
+	mov bx,a64 abs fs:0xffffffffcccccccc
+	mov eax,a64 abs fs:0xffffffffcccccccc
+	mov ebx,a64 abs fs:0xffffffffcccccccc
+	mov rax,a64 abs fs:0xffffffffcccccccc
+	mov rbx,a64 abs fs:0xffffffffcccccccc
+
+	mov al,a64 abs dword fs:foo
+	mov bl,a64 abs dword fs:foo
+	mov ax,a64 abs dword fs:foo
+	mov bx,a64 abs dword fs:foo
+	mov eax,a64 abs dword fs:foo
+	mov ebx,a64 abs dword fs:foo
+	mov rax,a64 abs dword fs:foo
+	mov rbx,a64 abs dword fs:foo
+	mov al,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs dword fs:0xbbbbbbbb
+	mov bl,a64 abs dword fs:0xbbbbbbbb
+	mov ax,a64 abs dword fs:0xbbbbbbbb
+	mov bx,a64 abs dword fs:0xbbbbbbbb
+	mov eax,a64 abs dword fs:0xbbbbbbbb
+	mov ebx,a64 abs dword fs:0xbbbbbbbb
+	mov rax,a64 abs dword fs:0xbbbbbbbb
+	mov rbx,a64 abs dword fs:0xbbbbbbbb
+	mov al,a64 abs dword fs:0xffffffffcccccccc
+	mov bl,a64 abs dword fs:0xffffffffcccccccc
+	mov ax,a64 abs dword fs:0xffffffffcccccccc
+	mov bx,a64 abs dword fs:0xffffffffcccccccc
+	mov eax,a64 abs dword fs:0xffffffffcccccccc
+	mov ebx,a64 abs dword fs:0xffffffffcccccccc
+	mov rax,a64 abs dword fs:0xffffffffcccccccc
+	mov rbx,a64 abs dword fs:0xffffffffcccccccc
+
+	mov al,a64 abs qword fs:foo
+	mov bl,a64 abs qword fs:foo
+	mov ax,a64 abs qword fs:foo
+	mov bx,a64 abs qword fs:foo
+	mov eax,a64 abs qword fs:foo
+	mov ebx,a64 abs qword fs:foo
+	mov rax,a64 abs qword fs:foo
+	mov rbx,a64 abs qword fs:foo
+	mov al,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs qword fs:0xbbbbbbbb
+	mov bl,a64 abs qword fs:0xbbbbbbbb
+	mov ax,a64 abs qword fs:0xbbbbbbbb
+	mov bx,a64 abs qword fs:0xbbbbbbbb
+	mov eax,a64 abs qword fs:0xbbbbbbbb
+	mov ebx,a64 abs qword fs:0xbbbbbbbb
+	mov rax,a64 abs qword fs:0xbbbbbbbb
+	mov rbx,a64 abs qword fs:0xbbbbbbbb
+	mov al,a64 abs qword fs:0xffffffffcccccccc
+	mov bl,a64 abs qword fs:0xffffffffcccccccc
+	mov ax,a64 abs qword fs:0xffffffffcccccccc
+	mov bx,a64 abs qword fs:0xffffffffcccccccc
+	mov eax,a64 abs qword fs:0xffffffffcccccccc
+	mov ebx,a64 abs qword fs:0xffffffffcccccccc
+	mov rax,a64 abs qword fs:0xffffffffcccccccc
+	mov rbx,a64 abs qword fs:0xffffffffcccccccc
+
+	mov al,a32 abs fs:foo
+	mov bl,a32 abs fs:foo
+	mov ax,a32 abs fs:foo
+	mov bx,a32 abs fs:foo
+	mov eax,a32 abs fs:foo
+	mov ebx,a32 abs fs:foo
+	mov rax,a32 abs fs:foo
+	mov rbx,a32 abs fs:foo
+	mov al,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs fs:0xbbbbbbbb
+	mov bl,a32 abs fs:0xbbbbbbbb
+	mov ax,a32 abs fs:0xbbbbbbbb
+	mov bx,a32 abs fs:0xbbbbbbbb
+	mov eax,a32 abs fs:0xbbbbbbbb
+	mov ebx,a32 abs fs:0xbbbbbbbb
+	mov rax,a32 abs fs:0xbbbbbbbb
+	mov rbx,a32 abs fs:0xbbbbbbbb
+	mov al,a32 abs fs:0xffffffffcccccccc
+	mov bl,a32 abs fs:0xffffffffcccccccc
+	mov ax,a32 abs fs:0xffffffffcccccccc
+	mov bx,a32 abs fs:0xffffffffcccccccc
+	mov eax,a32 abs fs:0xffffffffcccccccc
+	mov ebx,a32 abs fs:0xffffffffcccccccc
+	mov rax,a32 abs fs:0xffffffffcccccccc
+	mov rbx,a32 abs fs:0xffffffffcccccccc
+
+	mov al,a32 abs dword fs:foo
+	mov bl,a32 abs dword fs:foo
+	mov ax,a32 abs dword fs:foo
+	mov bx,a32 abs dword fs:foo
+	mov eax,a32 abs dword fs:foo
+	mov ebx,a32 abs dword fs:foo
+	mov rax,a32 abs dword fs:foo
+	mov rbx,a32 abs dword fs:foo
+	mov al,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs dword fs:0xbbbbbbbb
+	mov bl,a32 abs dword fs:0xbbbbbbbb
+	mov ax,a32 abs dword fs:0xbbbbbbbb
+	mov bx,a32 abs dword fs:0xbbbbbbbb
+	mov eax,a32 abs dword fs:0xbbbbbbbb
+	mov ebx,a32 abs dword fs:0xbbbbbbbb
+	mov rax,a32 abs dword fs:0xbbbbbbbb
+	mov rbx,a32 abs dword fs:0xbbbbbbbb
+	mov al,a32 abs dword fs:0xffffffffcccccccc
+	mov bl,a32 abs dword fs:0xffffffffcccccccc
+	mov ax,a32 abs dword fs:0xffffffffcccccccc
+	mov bx,a32 abs dword fs:0xffffffffcccccccc
+	mov eax,a32 abs dword fs:0xffffffffcccccccc
+	mov ebx,a32 abs dword fs:0xffffffffcccccccc
+	mov rax,a32 abs dword fs:0xffffffffcccccccc
+	mov rbx,a32 abs dword fs:0xffffffffcccccccc
+
+	mov al,a32 abs qword fs:foo
+	mov bl,a32 abs qword fs:foo
+	mov ax,a32 abs qword fs:foo
+	mov bx,a32 abs qword fs:foo
+	mov eax,a32 abs qword fs:foo
+	mov ebx,a32 abs qword fs:foo
+	mov rax,a32 abs qword fs:foo
+	mov rbx,a32 abs qword fs:foo
+	mov al,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs qword fs:0xbbbbbbbb
+	mov bl,a32 abs qword fs:0xbbbbbbbb
+	mov ax,a32 abs qword fs:0xbbbbbbbb
+	mov bx,a32 abs qword fs:0xbbbbbbbb
+	mov eax,a32 abs qword fs:0xbbbbbbbb
+	mov ebx,a32 abs qword fs:0xbbbbbbbb
+	mov rax,a32 abs qword fs:0xbbbbbbbb
+	mov rbx,a32 abs qword fs:0xbbbbbbbb
+	mov al,a32 abs qword fs:0xffffffffcccccccc
+	mov bl,a32 abs qword fs:0xffffffffcccccccc
+	mov ax,a32 abs qword fs:0xffffffffcccccccc
+	mov bx,a32 abs qword fs:0xffffffffcccccccc
+	mov eax,a32 abs qword fs:0xffffffffcccccccc
+	mov ebx,a32 abs qword fs:0xffffffffcccccccc
+	mov rax,a32 abs qword fs:0xffffffffcccccccc
+	mov rbx,a32 abs qword fs:0xffffffffcccccccc
+
+	mov al,rel fs:foo
+	mov bl,rel fs:foo
+	mov ax,rel fs:foo
+	mov bx,rel fs:foo
+	mov eax,rel fs:foo
+	mov ebx,rel fs:foo
+	mov rax,rel fs:foo
+	mov rbx,rel fs:foo
+	mov al,rel fs:0xaaaaaaaaaaaaaaaa
+	mov bl,rel fs:0xaaaaaaaaaaaaaaaa
+	mov ax,rel fs:0xaaaaaaaaaaaaaaaa
+	mov bx,rel fs:0xaaaaaaaaaaaaaaaa
+	mov eax,rel fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,rel fs:0xaaaaaaaaaaaaaaaa
+	mov rax,rel fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,rel fs:0xaaaaaaaaaaaaaaaa
+	mov al,rel fs:0xbbbbbbbb
+	mov bl,rel fs:0xbbbbbbbb
+	mov ax,rel fs:0xbbbbbbbb
+	mov bx,rel fs:0xbbbbbbbb
+	mov eax,rel fs:0xbbbbbbbb
+	mov ebx,rel fs:0xbbbbbbbb
+	mov rax,rel fs:0xbbbbbbbb
+	mov rbx,rel fs:0xbbbbbbbb
+	mov al,rel fs:0xffffffffcccccccc
+	mov bl,rel fs:0xffffffffcccccccc
+	mov ax,rel fs:0xffffffffcccccccc
+	mov bx,rel fs:0xffffffffcccccccc
+	mov eax,rel fs:0xffffffffcccccccc
+	mov ebx,rel fs:0xffffffffcccccccc
+	mov rax,rel fs:0xffffffffcccccccc
+	mov rbx,rel fs:0xffffffffcccccccc
+
+	mov al,rel dword fs:foo
+	mov bl,rel dword fs:foo
+	mov ax,rel dword fs:foo
+	mov bx,rel dword fs:foo
+	mov eax,rel dword fs:foo
+	mov ebx,rel dword fs:foo
+	mov rax,rel dword fs:foo
+	mov rbx,rel dword fs:foo
+	mov al,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,rel dword fs:0xbbbbbbbb
+	mov bl,rel dword fs:0xbbbbbbbb
+	mov ax,rel dword fs:0xbbbbbbbb
+	mov bx,rel dword fs:0xbbbbbbbb
+	mov eax,rel dword fs:0xbbbbbbbb
+	mov ebx,rel dword fs:0xbbbbbbbb
+	mov rax,rel dword fs:0xbbbbbbbb
+	mov rbx,rel dword fs:0xbbbbbbbb
+	mov al,rel dword fs:0xffffffffcccccccc
+	mov bl,rel dword fs:0xffffffffcccccccc
+	mov ax,rel dword fs:0xffffffffcccccccc
+	mov bx,rel dword fs:0xffffffffcccccccc
+	mov eax,rel dword fs:0xffffffffcccccccc
+	mov ebx,rel dword fs:0xffffffffcccccccc
+	mov rax,rel dword fs:0xffffffffcccccccc
+	mov rbx,rel dword fs:0xffffffffcccccccc
+
+	mov al,rel qword fs:foo
+	mov bl,rel qword fs:foo
+	mov ax,rel qword fs:foo
+	mov bx,rel qword fs:foo
+	mov eax,rel qword fs:foo
+	mov ebx,rel qword fs:foo
+	mov rax,rel qword fs:foo
+	mov rbx,rel qword fs:foo
+	mov al,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,rel qword fs:0xbbbbbbbb
+	mov bl,rel qword fs:0xbbbbbbbb
+	mov ax,rel qword fs:0xbbbbbbbb
+	mov bx,rel qword fs:0xbbbbbbbb
+	mov eax,rel qword fs:0xbbbbbbbb
+	mov ebx,rel qword fs:0xbbbbbbbb
+	mov rax,rel qword fs:0xbbbbbbbb
+	mov rbx,rel qword fs:0xbbbbbbbb
+	mov al,rel qword fs:0xffffffffcccccccc
+	mov bl,rel qword fs:0xffffffffcccccccc
+	mov ax,rel qword fs:0xffffffffcccccccc
+	mov bx,rel qword fs:0xffffffffcccccccc
+	mov eax,rel qword fs:0xffffffffcccccccc
+	mov ebx,rel qword fs:0xffffffffcccccccc
+	mov rax,rel qword fs:0xffffffffcccccccc
+	mov rbx,rel qword fs:0xffffffffcccccccc
+
+	mov al,a64 rel fs:foo
+	mov bl,a64 rel fs:foo
+	mov ax,a64 rel fs:foo
+	mov bx,a64 rel fs:foo
+	mov eax,a64 rel fs:foo
+	mov ebx,a64 rel fs:foo
+	mov rax,a64 rel fs:foo
+	mov rbx,a64 rel fs:foo
+	mov al,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel fs:0xbbbbbbbb
+	mov bl,a64 rel fs:0xbbbbbbbb
+	mov ax,a64 rel fs:0xbbbbbbbb
+	mov bx,a64 rel fs:0xbbbbbbbb
+	mov eax,a64 rel fs:0xbbbbbbbb
+	mov ebx,a64 rel fs:0xbbbbbbbb
+	mov rax,a64 rel fs:0xbbbbbbbb
+	mov rbx,a64 rel fs:0xbbbbbbbb
+	mov al,a64 rel fs:0xffffffffcccccccc
+	mov bl,a64 rel fs:0xffffffffcccccccc
+	mov ax,a64 rel fs:0xffffffffcccccccc
+	mov bx,a64 rel fs:0xffffffffcccccccc
+	mov eax,a64 rel fs:0xffffffffcccccccc
+	mov ebx,a64 rel fs:0xffffffffcccccccc
+	mov rax,a64 rel fs:0xffffffffcccccccc
+	mov rbx,a64 rel fs:0xffffffffcccccccc
+
+	mov al,a64 rel dword fs:foo
+	mov bl,a64 rel dword fs:foo
+	mov ax,a64 rel dword fs:foo
+	mov bx,a64 rel dword fs:foo
+	mov eax,a64 rel dword fs:foo
+	mov ebx,a64 rel dword fs:foo
+	mov rax,a64 rel dword fs:foo
+	mov rbx,a64 rel dword fs:foo
+	mov al,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel dword fs:0xbbbbbbbb
+	mov bl,a64 rel dword fs:0xbbbbbbbb
+	mov ax,a64 rel dword fs:0xbbbbbbbb
+	mov bx,a64 rel dword fs:0xbbbbbbbb
+	mov eax,a64 rel dword fs:0xbbbbbbbb
+	mov ebx,a64 rel dword fs:0xbbbbbbbb
+	mov rax,a64 rel dword fs:0xbbbbbbbb
+	mov rbx,a64 rel dword fs:0xbbbbbbbb
+	mov al,a64 rel dword fs:0xffffffffcccccccc
+	mov bl,a64 rel dword fs:0xffffffffcccccccc
+	mov ax,a64 rel dword fs:0xffffffffcccccccc
+	mov bx,a64 rel dword fs:0xffffffffcccccccc
+	mov eax,a64 rel dword fs:0xffffffffcccccccc
+	mov ebx,a64 rel dword fs:0xffffffffcccccccc
+	mov rax,a64 rel dword fs:0xffffffffcccccccc
+	mov rbx,a64 rel dword fs:0xffffffffcccccccc
+
+	mov al,a64 rel qword fs:foo
+	mov bl,a64 rel qword fs:foo
+	mov ax,a64 rel qword fs:foo
+	mov bx,a64 rel qword fs:foo
+	mov eax,a64 rel qword fs:foo
+	mov ebx,a64 rel qword fs:foo
+	mov rax,a64 rel qword fs:foo
+	mov rbx,a64 rel qword fs:foo
+	mov al,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel qword fs:0xbbbbbbbb
+	mov bl,a64 rel qword fs:0xbbbbbbbb
+	mov ax,a64 rel qword fs:0xbbbbbbbb
+	mov bx,a64 rel qword fs:0xbbbbbbbb
+	mov eax,a64 rel qword fs:0xbbbbbbbb
+	mov ebx,a64 rel qword fs:0xbbbbbbbb
+	mov rax,a64 rel qword fs:0xbbbbbbbb
+	mov rbx,a64 rel qword fs:0xbbbbbbbb
+	mov al,a64 rel qword fs:0xffffffffcccccccc
+	mov bl,a64 rel qword fs:0xffffffffcccccccc
+	mov ax,a64 rel qword fs:0xffffffffcccccccc
+	mov bx,a64 rel qword fs:0xffffffffcccccccc
+	mov eax,a64 rel qword fs:0xffffffffcccccccc
+	mov ebx,a64 rel qword fs:0xffffffffcccccccc
+	mov rax,a64 rel qword fs:0xffffffffcccccccc
+	mov rbx,a64 rel qword fs:0xffffffffcccccccc
+
+	mov al,a32 rel fs:foo
+	mov bl,a32 rel fs:foo
+	mov ax,a32 rel fs:foo
+	mov bx,a32 rel fs:foo
+	mov eax,a32 rel fs:foo
+	mov ebx,a32 rel fs:foo
+	mov rax,a32 rel fs:foo
+	mov rbx,a32 rel fs:foo
+	mov al,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel fs:0xbbbbbbbb
+	mov bl,a32 rel fs:0xbbbbbbbb
+	mov ax,a32 rel fs:0xbbbbbbbb
+	mov bx,a32 rel fs:0xbbbbbbbb
+	mov eax,a32 rel fs:0xbbbbbbbb
+	mov ebx,a32 rel fs:0xbbbbbbbb
+	mov rax,a32 rel fs:0xbbbbbbbb
+	mov rbx,a32 rel fs:0xbbbbbbbb
+	mov al,a32 rel fs:0xffffffffcccccccc
+	mov bl,a32 rel fs:0xffffffffcccccccc
+	mov ax,a32 rel fs:0xffffffffcccccccc
+	mov bx,a32 rel fs:0xffffffffcccccccc
+	mov eax,a32 rel fs:0xffffffffcccccccc
+	mov ebx,a32 rel fs:0xffffffffcccccccc
+	mov rax,a32 rel fs:0xffffffffcccccccc
+	mov rbx,a32 rel fs:0xffffffffcccccccc
+
+	mov al,a32 rel dword fs:foo
+	mov bl,a32 rel dword fs:foo
+	mov ax,a32 rel dword fs:foo
+	mov bx,a32 rel dword fs:foo
+	mov eax,a32 rel dword fs:foo
+	mov ebx,a32 rel dword fs:foo
+	mov rax,a32 rel dword fs:foo
+	mov rbx,a32 rel dword fs:foo
+	mov al,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel dword fs:0xbbbbbbbb
+	mov bl,a32 rel dword fs:0xbbbbbbbb
+	mov ax,a32 rel dword fs:0xbbbbbbbb
+	mov bx,a32 rel dword fs:0xbbbbbbbb
+	mov eax,a32 rel dword fs:0xbbbbbbbb
+	mov ebx,a32 rel dword fs:0xbbbbbbbb
+	mov rax,a32 rel dword fs:0xbbbbbbbb
+	mov rbx,a32 rel dword fs:0xbbbbbbbb
+	mov al,a32 rel dword fs:0xffffffffcccccccc
+	mov bl,a32 rel dword fs:0xffffffffcccccccc
+	mov ax,a32 rel dword fs:0xffffffffcccccccc
+	mov bx,a32 rel dword fs:0xffffffffcccccccc
+	mov eax,a32 rel dword fs:0xffffffffcccccccc
+	mov ebx,a32 rel dword fs:0xffffffffcccccccc
+	mov rax,a32 rel dword fs:0xffffffffcccccccc
+	mov rbx,a32 rel dword fs:0xffffffffcccccccc
+
+	mov al,a32 rel qword fs:foo
+	mov bl,a32 rel qword fs:foo
+	mov ax,a32 rel qword fs:foo
+	mov bx,a32 rel qword fs:foo
+	mov eax,a32 rel qword fs:foo
+	mov ebx,a32 rel qword fs:foo
+	mov rax,a32 rel qword fs:foo
+	mov rbx,a32 rel qword fs:foo
+	mov al,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel qword fs:0xbbbbbbbb
+	mov bl,a32 rel qword fs:0xbbbbbbbb
+	mov ax,a32 rel qword fs:0xbbbbbbbb
+	mov bx,a32 rel qword fs:0xbbbbbbbb
+	mov eax,a32 rel qword fs:0xbbbbbbbb
+	mov ebx,a32 rel qword fs:0xbbbbbbbb
+	mov rax,a32 rel qword fs:0xbbbbbbbb
+	mov rbx,a32 rel qword fs:0xbbbbbbbb
+	mov al,a32 rel qword fs:0xffffffffcccccccc
+	mov bl,a32 rel qword fs:0xffffffffcccccccc
+	mov ax,a32 rel qword fs:0xffffffffcccccccc
+	mov bx,a32 rel qword fs:0xffffffffcccccccc
+	mov eax,a32 rel qword fs:0xffffffffcccccccc
+	mov ebx,a32 rel qword fs:0xffffffffcccccccc
+	mov rax,a32 rel qword fs:0xffffffffcccccccc
+	mov rbx,a32 rel qword fs:0xffffffffcccccccc
+
+	mov al,es:foo
+	mov bl,es:foo
+	mov ax,es:foo
+	mov bx,es:foo
+	mov eax,es:foo
+	mov ebx,es:foo
+	mov rax,es:foo
+	mov rbx,es:foo
+	mov al,es:0xaaaaaaaaaaaaaaaa
+	mov bl,es:0xaaaaaaaaaaaaaaaa
+	mov ax,es:0xaaaaaaaaaaaaaaaa
+	mov bx,es:0xaaaaaaaaaaaaaaaa
+	mov eax,es:0xaaaaaaaaaaaaaaaa
+	mov ebx,es:0xaaaaaaaaaaaaaaaa
+	mov rax,es:0xaaaaaaaaaaaaaaaa
+	mov rbx,es:0xaaaaaaaaaaaaaaaa
+	mov al,es:0xbbbbbbbb
+	mov bl,es:0xbbbbbbbb
+	mov ax,es:0xbbbbbbbb
+	mov bx,es:0xbbbbbbbb
+	mov eax,es:0xbbbbbbbb
+	mov ebx,es:0xbbbbbbbb
+	mov rax,es:0xbbbbbbbb
+	mov rbx,es:0xbbbbbbbb
+	mov al,es:0xffffffffcccccccc
+	mov bl,es:0xffffffffcccccccc
+	mov ax,es:0xffffffffcccccccc
+	mov bx,es:0xffffffffcccccccc
+	mov eax,es:0xffffffffcccccccc
+	mov ebx,es:0xffffffffcccccccc
+	mov rax,es:0xffffffffcccccccc
+	mov rbx,es:0xffffffffcccccccc
+
+	mov al,dword es:foo
+	mov bl,dword es:foo
+	mov ax,dword es:foo
+	mov bx,dword es:foo
+	mov eax,dword es:foo
+	mov ebx,dword es:foo
+	mov rax,dword es:foo
+	mov rbx,dword es:foo
+	mov al,dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,dword es:0xaaaaaaaaaaaaaaaa
+	mov al,dword es:0xbbbbbbbb
+	mov bl,dword es:0xbbbbbbbb
+	mov ax,dword es:0xbbbbbbbb
+	mov bx,dword es:0xbbbbbbbb
+	mov eax,dword es:0xbbbbbbbb
+	mov ebx,dword es:0xbbbbbbbb
+	mov rax,dword es:0xbbbbbbbb
+	mov rbx,dword es:0xbbbbbbbb
+	mov al,dword es:0xffffffffcccccccc
+	mov bl,dword es:0xffffffffcccccccc
+	mov ax,dword es:0xffffffffcccccccc
+	mov bx,dword es:0xffffffffcccccccc
+	mov eax,dword es:0xffffffffcccccccc
+	mov ebx,dword es:0xffffffffcccccccc
+	mov rax,dword es:0xffffffffcccccccc
+	mov rbx,dword es:0xffffffffcccccccc
+
+	mov al,qword es:foo
+	mov bl,qword es:foo
+	mov ax,qword es:foo
+	mov bx,qword es:foo
+	mov eax,qword es:foo
+	mov ebx,qword es:foo
+	mov rax,qword es:foo
+	mov rbx,qword es:foo
+	mov al,qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,qword es:0xaaaaaaaaaaaaaaaa
+	mov al,qword es:0xbbbbbbbb
+	mov bl,qword es:0xbbbbbbbb
+	mov ax,qword es:0xbbbbbbbb
+	mov bx,qword es:0xbbbbbbbb
+	mov eax,qword es:0xbbbbbbbb
+	mov ebx,qword es:0xbbbbbbbb
+	mov rax,qword es:0xbbbbbbbb
+	mov rbx,qword es:0xbbbbbbbb
+	mov al,qword es:0xffffffffcccccccc
+	mov bl,qword es:0xffffffffcccccccc
+	mov ax,qword es:0xffffffffcccccccc
+	mov bx,qword es:0xffffffffcccccccc
+	mov eax,qword es:0xffffffffcccccccc
+	mov ebx,qword es:0xffffffffcccccccc
+	mov rax,qword es:0xffffffffcccccccc
+	mov rbx,qword es:0xffffffffcccccccc
+
+	mov al,a64 es:foo
+	mov bl,a64 es:foo
+	mov ax,a64 es:foo
+	mov bx,a64 es:foo
+	mov eax,a64 es:foo
+	mov ebx,a64 es:foo
+	mov rax,a64 es:foo
+	mov rbx,a64 es:foo
+	mov al,a64 es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 es:0xbbbbbbbb
+	mov bl,a64 es:0xbbbbbbbb
+	mov ax,a64 es:0xbbbbbbbb
+	mov bx,a64 es:0xbbbbbbbb
+	mov eax,a64 es:0xbbbbbbbb
+	mov ebx,a64 es:0xbbbbbbbb
+	mov rax,a64 es:0xbbbbbbbb
+	mov rbx,a64 es:0xbbbbbbbb
+	mov al,a64 es:0xffffffffcccccccc
+	mov bl,a64 es:0xffffffffcccccccc
+	mov ax,a64 es:0xffffffffcccccccc
+	mov bx,a64 es:0xffffffffcccccccc
+	mov eax,a64 es:0xffffffffcccccccc
+	mov ebx,a64 es:0xffffffffcccccccc
+	mov rax,a64 es:0xffffffffcccccccc
+	mov rbx,a64 es:0xffffffffcccccccc
+
+	mov al,a64 dword es:foo
+	mov bl,a64 dword es:foo
+	mov ax,a64 dword es:foo
+	mov bx,a64 dword es:foo
+	mov eax,a64 dword es:foo
+	mov ebx,a64 dword es:foo
+	mov rax,a64 dword es:foo
+	mov rbx,a64 dword es:foo
+	mov al,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 dword es:0xbbbbbbbb
+	mov bl,a64 dword es:0xbbbbbbbb
+	mov ax,a64 dword es:0xbbbbbbbb
+	mov bx,a64 dword es:0xbbbbbbbb
+	mov eax,a64 dword es:0xbbbbbbbb
+	mov ebx,a64 dword es:0xbbbbbbbb
+	mov rax,a64 dword es:0xbbbbbbbb
+	mov rbx,a64 dword es:0xbbbbbbbb
+	mov al,a64 dword es:0xffffffffcccccccc
+	mov bl,a64 dword es:0xffffffffcccccccc
+	mov ax,a64 dword es:0xffffffffcccccccc
+	mov bx,a64 dword es:0xffffffffcccccccc
+	mov eax,a64 dword es:0xffffffffcccccccc
+	mov ebx,a64 dword es:0xffffffffcccccccc
+	mov rax,a64 dword es:0xffffffffcccccccc
+	mov rbx,a64 dword es:0xffffffffcccccccc
+
+	mov al,a64 qword es:foo
+	mov bl,a64 qword es:foo
+	mov ax,a64 qword es:foo
+	mov bx,a64 qword es:foo
+	mov eax,a64 qword es:foo
+	mov ebx,a64 qword es:foo
+	mov rax,a64 qword es:foo
+	mov rbx,a64 qword es:foo
+	mov al,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 qword es:0xbbbbbbbb
+	mov bl,a64 qword es:0xbbbbbbbb
+	mov ax,a64 qword es:0xbbbbbbbb
+	mov bx,a64 qword es:0xbbbbbbbb
+	mov eax,a64 qword es:0xbbbbbbbb
+	mov ebx,a64 qword es:0xbbbbbbbb
+	mov rax,a64 qword es:0xbbbbbbbb
+	mov rbx,a64 qword es:0xbbbbbbbb
+	mov al,a64 qword es:0xffffffffcccccccc
+	mov bl,a64 qword es:0xffffffffcccccccc
+	mov ax,a64 qword es:0xffffffffcccccccc
+	mov bx,a64 qword es:0xffffffffcccccccc
+	mov eax,a64 qword es:0xffffffffcccccccc
+	mov ebx,a64 qword es:0xffffffffcccccccc
+	mov rax,a64 qword es:0xffffffffcccccccc
+	mov rbx,a64 qword es:0xffffffffcccccccc
+
+	mov al,a32 es:foo
+	mov bl,a32 es:foo
+	mov ax,a32 es:foo
+	mov bx,a32 es:foo
+	mov eax,a32 es:foo
+	mov ebx,a32 es:foo
+	mov rax,a32 es:foo
+	mov rbx,a32 es:foo
+	mov al,a32 es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 es:0xbbbbbbbb
+	mov bl,a32 es:0xbbbbbbbb
+	mov ax,a32 es:0xbbbbbbbb
+	mov bx,a32 es:0xbbbbbbbb
+	mov eax,a32 es:0xbbbbbbbb
+	mov ebx,a32 es:0xbbbbbbbb
+	mov rax,a32 es:0xbbbbbbbb
+	mov rbx,a32 es:0xbbbbbbbb
+	mov al,a32 es:0xffffffffcccccccc
+	mov bl,a32 es:0xffffffffcccccccc
+	mov ax,a32 es:0xffffffffcccccccc
+	mov bx,a32 es:0xffffffffcccccccc
+	mov eax,a32 es:0xffffffffcccccccc
+	mov ebx,a32 es:0xffffffffcccccccc
+	mov rax,a32 es:0xffffffffcccccccc
+	mov rbx,a32 es:0xffffffffcccccccc
+
+	mov al,a32 dword es:foo
+	mov bl,a32 dword es:foo
+	mov ax,a32 dword es:foo
+	mov bx,a32 dword es:foo
+	mov eax,a32 dword es:foo
+	mov ebx,a32 dword es:foo
+	mov rax,a32 dword es:foo
+	mov rbx,a32 dword es:foo
+	mov al,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 dword es:0xbbbbbbbb
+	mov bl,a32 dword es:0xbbbbbbbb
+	mov ax,a32 dword es:0xbbbbbbbb
+	mov bx,a32 dword es:0xbbbbbbbb
+	mov eax,a32 dword es:0xbbbbbbbb
+	mov ebx,a32 dword es:0xbbbbbbbb
+	mov rax,a32 dword es:0xbbbbbbbb
+	mov rbx,a32 dword es:0xbbbbbbbb
+	mov al,a32 dword es:0xffffffffcccccccc
+	mov bl,a32 dword es:0xffffffffcccccccc
+	mov ax,a32 dword es:0xffffffffcccccccc
+	mov bx,a32 dword es:0xffffffffcccccccc
+	mov eax,a32 dword es:0xffffffffcccccccc
+	mov ebx,a32 dword es:0xffffffffcccccccc
+	mov rax,a32 dword es:0xffffffffcccccccc
+	mov rbx,a32 dword es:0xffffffffcccccccc
+
+	mov al,a32 qword es:foo
+	mov bl,a32 qword es:foo
+	mov ax,a32 qword es:foo
+	mov bx,a32 qword es:foo
+	mov eax,a32 qword es:foo
+	mov ebx,a32 qword es:foo
+	mov rax,a32 qword es:foo
+	mov rbx,a32 qword es:foo
+	mov al,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 qword es:0xbbbbbbbb
+	mov bl,a32 qword es:0xbbbbbbbb
+	mov ax,a32 qword es:0xbbbbbbbb
+	mov bx,a32 qword es:0xbbbbbbbb
+	mov eax,a32 qword es:0xbbbbbbbb
+	mov ebx,a32 qword es:0xbbbbbbbb
+	mov rax,a32 qword es:0xbbbbbbbb
+	mov rbx,a32 qword es:0xbbbbbbbb
+	mov al,a32 qword es:0xffffffffcccccccc
+	mov bl,a32 qword es:0xffffffffcccccccc
+	mov ax,a32 qword es:0xffffffffcccccccc
+	mov bx,a32 qword es:0xffffffffcccccccc
+	mov eax,a32 qword es:0xffffffffcccccccc
+	mov ebx,a32 qword es:0xffffffffcccccccc
+	mov rax,a32 qword es:0xffffffffcccccccc
+	mov rbx,a32 qword es:0xffffffffcccccccc
+
+	mov al,abs es:foo
+	mov bl,abs es:foo
+	mov ax,abs es:foo
+	mov bx,abs es:foo
+	mov eax,abs es:foo
+	mov ebx,abs es:foo
+	mov rax,abs es:foo
+	mov rbx,abs es:foo
+	mov al,abs es:0xaaaaaaaaaaaaaaaa
+	mov bl,abs es:0xaaaaaaaaaaaaaaaa
+	mov ax,abs es:0xaaaaaaaaaaaaaaaa
+	mov bx,abs es:0xaaaaaaaaaaaaaaaa
+	mov eax,abs es:0xaaaaaaaaaaaaaaaa
+	mov ebx,abs es:0xaaaaaaaaaaaaaaaa
+	mov rax,abs es:0xaaaaaaaaaaaaaaaa
+	mov rbx,abs es:0xaaaaaaaaaaaaaaaa
+	mov al,abs es:0xbbbbbbbb
+	mov bl,abs es:0xbbbbbbbb
+	mov ax,abs es:0xbbbbbbbb
+	mov bx,abs es:0xbbbbbbbb
+	mov eax,abs es:0xbbbbbbbb
+	mov ebx,abs es:0xbbbbbbbb
+	mov rax,abs es:0xbbbbbbbb
+	mov rbx,abs es:0xbbbbbbbb
+	mov al,abs es:0xffffffffcccccccc
+	mov bl,abs es:0xffffffffcccccccc
+	mov ax,abs es:0xffffffffcccccccc
+	mov bx,abs es:0xffffffffcccccccc
+	mov eax,abs es:0xffffffffcccccccc
+	mov ebx,abs es:0xffffffffcccccccc
+	mov rax,abs es:0xffffffffcccccccc
+	mov rbx,abs es:0xffffffffcccccccc
+
+	mov al,abs dword es:foo
+	mov bl,abs dword es:foo
+	mov ax,abs dword es:foo
+	mov bx,abs dword es:foo
+	mov eax,abs dword es:foo
+	mov ebx,abs dword es:foo
+	mov rax,abs dword es:foo
+	mov rbx,abs dword es:foo
+	mov al,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov al,abs dword es:0xbbbbbbbb
+	mov bl,abs dword es:0xbbbbbbbb
+	mov ax,abs dword es:0xbbbbbbbb
+	mov bx,abs dword es:0xbbbbbbbb
+	mov eax,abs dword es:0xbbbbbbbb
+	mov ebx,abs dword es:0xbbbbbbbb
+	mov rax,abs dword es:0xbbbbbbbb
+	mov rbx,abs dword es:0xbbbbbbbb
+	mov al,abs dword es:0xffffffffcccccccc
+	mov bl,abs dword es:0xffffffffcccccccc
+	mov ax,abs dword es:0xffffffffcccccccc
+	mov bx,abs dword es:0xffffffffcccccccc
+	mov eax,abs dword es:0xffffffffcccccccc
+	mov ebx,abs dword es:0xffffffffcccccccc
+	mov rax,abs dword es:0xffffffffcccccccc
+	mov rbx,abs dword es:0xffffffffcccccccc
+
+	mov al,abs qword es:foo
+	mov bl,abs qword es:foo
+	mov ax,abs qword es:foo
+	mov bx,abs qword es:foo
+	mov eax,abs qword es:foo
+	mov ebx,abs qword es:foo
+	mov rax,abs qword es:foo
+	mov rbx,abs qword es:foo
+	mov al,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov al,abs qword es:0xbbbbbbbb
+	mov bl,abs qword es:0xbbbbbbbb
+	mov ax,abs qword es:0xbbbbbbbb
+	mov bx,abs qword es:0xbbbbbbbb
+	mov eax,abs qword es:0xbbbbbbbb
+	mov ebx,abs qword es:0xbbbbbbbb
+	mov rax,abs qword es:0xbbbbbbbb
+	mov rbx,abs qword es:0xbbbbbbbb
+	mov al,abs qword es:0xffffffffcccccccc
+	mov bl,abs qword es:0xffffffffcccccccc
+	mov ax,abs qword es:0xffffffffcccccccc
+	mov bx,abs qword es:0xffffffffcccccccc
+	mov eax,abs qword es:0xffffffffcccccccc
+	mov ebx,abs qword es:0xffffffffcccccccc
+	mov rax,abs qword es:0xffffffffcccccccc
+	mov rbx,abs qword es:0xffffffffcccccccc
+
+	mov al,a64 abs es:foo
+	mov bl,a64 abs es:foo
+	mov ax,a64 abs es:foo
+	mov bx,a64 abs es:foo
+	mov eax,a64 abs es:foo
+	mov ebx,a64 abs es:foo
+	mov rax,a64 abs es:foo
+	mov rbx,a64 abs es:foo
+	mov al,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs es:0xbbbbbbbb
+	mov bl,a64 abs es:0xbbbbbbbb
+	mov ax,a64 abs es:0xbbbbbbbb
+	mov bx,a64 abs es:0xbbbbbbbb
+	mov eax,a64 abs es:0xbbbbbbbb
+	mov ebx,a64 abs es:0xbbbbbbbb
+	mov rax,a64 abs es:0xbbbbbbbb
+	mov rbx,a64 abs es:0xbbbbbbbb
+	mov al,a64 abs es:0xffffffffcccccccc
+	mov bl,a64 abs es:0xffffffffcccccccc
+	mov ax,a64 abs es:0xffffffffcccccccc
+	mov bx,a64 abs es:0xffffffffcccccccc
+	mov eax,a64 abs es:0xffffffffcccccccc
+	mov ebx,a64 abs es:0xffffffffcccccccc
+	mov rax,a64 abs es:0xffffffffcccccccc
+	mov rbx,a64 abs es:0xffffffffcccccccc
+
+	mov al,a64 abs dword es:foo
+	mov bl,a64 abs dword es:foo
+	mov ax,a64 abs dword es:foo
+	mov bx,a64 abs dword es:foo
+	mov eax,a64 abs dword es:foo
+	mov ebx,a64 abs dword es:foo
+	mov rax,a64 abs dword es:foo
+	mov rbx,a64 abs dword es:foo
+	mov al,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs dword es:0xbbbbbbbb
+	mov bl,a64 abs dword es:0xbbbbbbbb
+	mov ax,a64 abs dword es:0xbbbbbbbb
+	mov bx,a64 abs dword es:0xbbbbbbbb
+	mov eax,a64 abs dword es:0xbbbbbbbb
+	mov ebx,a64 abs dword es:0xbbbbbbbb
+	mov rax,a64 abs dword es:0xbbbbbbbb
+	mov rbx,a64 abs dword es:0xbbbbbbbb
+	mov al,a64 abs dword es:0xffffffffcccccccc
+	mov bl,a64 abs dword es:0xffffffffcccccccc
+	mov ax,a64 abs dword es:0xffffffffcccccccc
+	mov bx,a64 abs dword es:0xffffffffcccccccc
+	mov eax,a64 abs dword es:0xffffffffcccccccc
+	mov ebx,a64 abs dword es:0xffffffffcccccccc
+	mov rax,a64 abs dword es:0xffffffffcccccccc
+	mov rbx,a64 abs dword es:0xffffffffcccccccc
+
+	mov al,a64 abs qword es:foo
+	mov bl,a64 abs qword es:foo
+	mov ax,a64 abs qword es:foo
+	mov bx,a64 abs qword es:foo
+	mov eax,a64 abs qword es:foo
+	mov ebx,a64 abs qword es:foo
+	mov rax,a64 abs qword es:foo
+	mov rbx,a64 abs qword es:foo
+	mov al,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs qword es:0xbbbbbbbb
+	mov bl,a64 abs qword es:0xbbbbbbbb
+	mov ax,a64 abs qword es:0xbbbbbbbb
+	mov bx,a64 abs qword es:0xbbbbbbbb
+	mov eax,a64 abs qword es:0xbbbbbbbb
+	mov ebx,a64 abs qword es:0xbbbbbbbb
+	mov rax,a64 abs qword es:0xbbbbbbbb
+	mov rbx,a64 abs qword es:0xbbbbbbbb
+	mov al,a64 abs qword es:0xffffffffcccccccc
+	mov bl,a64 abs qword es:0xffffffffcccccccc
+	mov ax,a64 abs qword es:0xffffffffcccccccc
+	mov bx,a64 abs qword es:0xffffffffcccccccc
+	mov eax,a64 abs qword es:0xffffffffcccccccc
+	mov ebx,a64 abs qword es:0xffffffffcccccccc
+	mov rax,a64 abs qword es:0xffffffffcccccccc
+	mov rbx,a64 abs qword es:0xffffffffcccccccc
+
+	mov al,a32 abs es:foo
+	mov bl,a32 abs es:foo
+	mov ax,a32 abs es:foo
+	mov bx,a32 abs es:foo
+	mov eax,a32 abs es:foo
+	mov ebx,a32 abs es:foo
+	mov rax,a32 abs es:foo
+	mov rbx,a32 abs es:foo
+	mov al,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs es:0xbbbbbbbb
+	mov bl,a32 abs es:0xbbbbbbbb
+	mov ax,a32 abs es:0xbbbbbbbb
+	mov bx,a32 abs es:0xbbbbbbbb
+	mov eax,a32 abs es:0xbbbbbbbb
+	mov ebx,a32 abs es:0xbbbbbbbb
+	mov rax,a32 abs es:0xbbbbbbbb
+	mov rbx,a32 abs es:0xbbbbbbbb
+	mov al,a32 abs es:0xffffffffcccccccc
+	mov bl,a32 abs es:0xffffffffcccccccc
+	mov ax,a32 abs es:0xffffffffcccccccc
+	mov bx,a32 abs es:0xffffffffcccccccc
+	mov eax,a32 abs es:0xffffffffcccccccc
+	mov ebx,a32 abs es:0xffffffffcccccccc
+	mov rax,a32 abs es:0xffffffffcccccccc
+	mov rbx,a32 abs es:0xffffffffcccccccc
+
+	mov al,a32 abs dword es:foo
+	mov bl,a32 abs dword es:foo
+	mov ax,a32 abs dword es:foo
+	mov bx,a32 abs dword es:foo
+	mov eax,a32 abs dword es:foo
+	mov ebx,a32 abs dword es:foo
+	mov rax,a32 abs dword es:foo
+	mov rbx,a32 abs dword es:foo
+	mov al,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs dword es:0xbbbbbbbb
+	mov bl,a32 abs dword es:0xbbbbbbbb
+	mov ax,a32 abs dword es:0xbbbbbbbb
+	mov bx,a32 abs dword es:0xbbbbbbbb
+	mov eax,a32 abs dword es:0xbbbbbbbb
+	mov ebx,a32 abs dword es:0xbbbbbbbb
+	mov rax,a32 abs dword es:0xbbbbbbbb
+	mov rbx,a32 abs dword es:0xbbbbbbbb
+	mov al,a32 abs dword es:0xffffffffcccccccc
+	mov bl,a32 abs dword es:0xffffffffcccccccc
+	mov ax,a32 abs dword es:0xffffffffcccccccc
+	mov bx,a32 abs dword es:0xffffffffcccccccc
+	mov eax,a32 abs dword es:0xffffffffcccccccc
+	mov ebx,a32 abs dword es:0xffffffffcccccccc
+	mov rax,a32 abs dword es:0xffffffffcccccccc
+	mov rbx,a32 abs dword es:0xffffffffcccccccc
+
+	mov al,a32 abs qword es:foo
+	mov bl,a32 abs qword es:foo
+	mov ax,a32 abs qword es:foo
+	mov bx,a32 abs qword es:foo
+	mov eax,a32 abs qword es:foo
+	mov ebx,a32 abs qword es:foo
+	mov rax,a32 abs qword es:foo
+	mov rbx,a32 abs qword es:foo
+	mov al,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs qword es:0xbbbbbbbb
+	mov bl,a32 abs qword es:0xbbbbbbbb
+	mov ax,a32 abs qword es:0xbbbbbbbb
+	mov bx,a32 abs qword es:0xbbbbbbbb
+	mov eax,a32 abs qword es:0xbbbbbbbb
+	mov ebx,a32 abs qword es:0xbbbbbbbb
+	mov rax,a32 abs qword es:0xbbbbbbbb
+	mov rbx,a32 abs qword es:0xbbbbbbbb
+	mov al,a32 abs qword es:0xffffffffcccccccc
+	mov bl,a32 abs qword es:0xffffffffcccccccc
+	mov ax,a32 abs qword es:0xffffffffcccccccc
+	mov bx,a32 abs qword es:0xffffffffcccccccc
+	mov eax,a32 abs qword es:0xffffffffcccccccc
+	mov ebx,a32 abs qword es:0xffffffffcccccccc
+	mov rax,a32 abs qword es:0xffffffffcccccccc
+	mov rbx,a32 abs qword es:0xffffffffcccccccc
+
+	mov al,rel es:foo
+	mov bl,rel es:foo
+	mov ax,rel es:foo
+	mov bx,rel es:foo
+	mov eax,rel es:foo
+	mov ebx,rel es:foo
+	mov rax,rel es:foo
+	mov rbx,rel es:foo
+	mov al,rel es:0xaaaaaaaaaaaaaaaa
+	mov bl,rel es:0xaaaaaaaaaaaaaaaa
+	mov ax,rel es:0xaaaaaaaaaaaaaaaa
+	mov bx,rel es:0xaaaaaaaaaaaaaaaa
+	mov eax,rel es:0xaaaaaaaaaaaaaaaa
+	mov ebx,rel es:0xaaaaaaaaaaaaaaaa
+	mov rax,rel es:0xaaaaaaaaaaaaaaaa
+	mov rbx,rel es:0xaaaaaaaaaaaaaaaa
+	mov al,rel es:0xbbbbbbbb
+	mov bl,rel es:0xbbbbbbbb
+	mov ax,rel es:0xbbbbbbbb
+	mov bx,rel es:0xbbbbbbbb
+	mov eax,rel es:0xbbbbbbbb
+	mov ebx,rel es:0xbbbbbbbb
+	mov rax,rel es:0xbbbbbbbb
+	mov rbx,rel es:0xbbbbbbbb
+	mov al,rel es:0xffffffffcccccccc
+	mov bl,rel es:0xffffffffcccccccc
+	mov ax,rel es:0xffffffffcccccccc
+	mov bx,rel es:0xffffffffcccccccc
+	mov eax,rel es:0xffffffffcccccccc
+	mov ebx,rel es:0xffffffffcccccccc
+	mov rax,rel es:0xffffffffcccccccc
+	mov rbx,rel es:0xffffffffcccccccc
+
+	mov al,rel dword es:foo
+	mov bl,rel dword es:foo
+	mov ax,rel dword es:foo
+	mov bx,rel dword es:foo
+	mov eax,rel dword es:foo
+	mov ebx,rel dword es:foo
+	mov rax,rel dword es:foo
+	mov rbx,rel dword es:foo
+	mov al,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov al,rel dword es:0xbbbbbbbb
+	mov bl,rel dword es:0xbbbbbbbb
+	mov ax,rel dword es:0xbbbbbbbb
+	mov bx,rel dword es:0xbbbbbbbb
+	mov eax,rel dword es:0xbbbbbbbb
+	mov ebx,rel dword es:0xbbbbbbbb
+	mov rax,rel dword es:0xbbbbbbbb
+	mov rbx,rel dword es:0xbbbbbbbb
+	mov al,rel dword es:0xffffffffcccccccc
+	mov bl,rel dword es:0xffffffffcccccccc
+	mov ax,rel dword es:0xffffffffcccccccc
+	mov bx,rel dword es:0xffffffffcccccccc
+	mov eax,rel dword es:0xffffffffcccccccc
+	mov ebx,rel dword es:0xffffffffcccccccc
+	mov rax,rel dword es:0xffffffffcccccccc
+	mov rbx,rel dword es:0xffffffffcccccccc
+
+	mov al,rel qword es:foo
+	mov bl,rel qword es:foo
+	mov ax,rel qword es:foo
+	mov bx,rel qword es:foo
+	mov eax,rel qword es:foo
+	mov ebx,rel qword es:foo
+	mov rax,rel qword es:foo
+	mov rbx,rel qword es:foo
+	mov al,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov al,rel qword es:0xbbbbbbbb
+	mov bl,rel qword es:0xbbbbbbbb
+	mov ax,rel qword es:0xbbbbbbbb
+	mov bx,rel qword es:0xbbbbbbbb
+	mov eax,rel qword es:0xbbbbbbbb
+	mov ebx,rel qword es:0xbbbbbbbb
+	mov rax,rel qword es:0xbbbbbbbb
+	mov rbx,rel qword es:0xbbbbbbbb
+	mov al,rel qword es:0xffffffffcccccccc
+	mov bl,rel qword es:0xffffffffcccccccc
+	mov ax,rel qword es:0xffffffffcccccccc
+	mov bx,rel qword es:0xffffffffcccccccc
+	mov eax,rel qword es:0xffffffffcccccccc
+	mov ebx,rel qword es:0xffffffffcccccccc
+	mov rax,rel qword es:0xffffffffcccccccc
+	mov rbx,rel qword es:0xffffffffcccccccc
+
+	mov al,a64 rel es:foo
+	mov bl,a64 rel es:foo
+	mov ax,a64 rel es:foo
+	mov bx,a64 rel es:foo
+	mov eax,a64 rel es:foo
+	mov ebx,a64 rel es:foo
+	mov rax,a64 rel es:foo
+	mov rbx,a64 rel es:foo
+	mov al,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel es:0xbbbbbbbb
+	mov bl,a64 rel es:0xbbbbbbbb
+	mov ax,a64 rel es:0xbbbbbbbb
+	mov bx,a64 rel es:0xbbbbbbbb
+	mov eax,a64 rel es:0xbbbbbbbb
+	mov ebx,a64 rel es:0xbbbbbbbb
+	mov rax,a64 rel es:0xbbbbbbbb
+	mov rbx,a64 rel es:0xbbbbbbbb
+	mov al,a64 rel es:0xffffffffcccccccc
+	mov bl,a64 rel es:0xffffffffcccccccc
+	mov ax,a64 rel es:0xffffffffcccccccc
+	mov bx,a64 rel es:0xffffffffcccccccc
+	mov eax,a64 rel es:0xffffffffcccccccc
+	mov ebx,a64 rel es:0xffffffffcccccccc
+	mov rax,a64 rel es:0xffffffffcccccccc
+	mov rbx,a64 rel es:0xffffffffcccccccc
+
+	mov al,a64 rel dword es:foo
+	mov bl,a64 rel dword es:foo
+	mov ax,a64 rel dword es:foo
+	mov bx,a64 rel dword es:foo
+	mov eax,a64 rel dword es:foo
+	mov ebx,a64 rel dword es:foo
+	mov rax,a64 rel dword es:foo
+	mov rbx,a64 rel dword es:foo
+	mov al,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel dword es:0xbbbbbbbb
+	mov bl,a64 rel dword es:0xbbbbbbbb
+	mov ax,a64 rel dword es:0xbbbbbbbb
+	mov bx,a64 rel dword es:0xbbbbbbbb
+	mov eax,a64 rel dword es:0xbbbbbbbb
+	mov ebx,a64 rel dword es:0xbbbbbbbb
+	mov rax,a64 rel dword es:0xbbbbbbbb
+	mov rbx,a64 rel dword es:0xbbbbbbbb
+	mov al,a64 rel dword es:0xffffffffcccccccc
+	mov bl,a64 rel dword es:0xffffffffcccccccc
+	mov ax,a64 rel dword es:0xffffffffcccccccc
+	mov bx,a64 rel dword es:0xffffffffcccccccc
+	mov eax,a64 rel dword es:0xffffffffcccccccc
+	mov ebx,a64 rel dword es:0xffffffffcccccccc
+	mov rax,a64 rel dword es:0xffffffffcccccccc
+	mov rbx,a64 rel dword es:0xffffffffcccccccc
+
+	mov al,a64 rel qword es:foo
+	mov bl,a64 rel qword es:foo
+	mov ax,a64 rel qword es:foo
+	mov bx,a64 rel qword es:foo
+	mov eax,a64 rel qword es:foo
+	mov ebx,a64 rel qword es:foo
+	mov rax,a64 rel qword es:foo
+	mov rbx,a64 rel qword es:foo
+	mov al,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel qword es:0xbbbbbbbb
+	mov bl,a64 rel qword es:0xbbbbbbbb
+	mov ax,a64 rel qword es:0xbbbbbbbb
+	mov bx,a64 rel qword es:0xbbbbbbbb
+	mov eax,a64 rel qword es:0xbbbbbbbb
+	mov ebx,a64 rel qword es:0xbbbbbbbb
+	mov rax,a64 rel qword es:0xbbbbbbbb
+	mov rbx,a64 rel qword es:0xbbbbbbbb
+	mov al,a64 rel qword es:0xffffffffcccccccc
+	mov bl,a64 rel qword es:0xffffffffcccccccc
+	mov ax,a64 rel qword es:0xffffffffcccccccc
+	mov bx,a64 rel qword es:0xffffffffcccccccc
+	mov eax,a64 rel qword es:0xffffffffcccccccc
+	mov ebx,a64 rel qword es:0xffffffffcccccccc
+	mov rax,a64 rel qword es:0xffffffffcccccccc
+	mov rbx,a64 rel qword es:0xffffffffcccccccc
+
+	mov al,a32 rel es:foo
+	mov bl,a32 rel es:foo
+	mov ax,a32 rel es:foo
+	mov bx,a32 rel es:foo
+	mov eax,a32 rel es:foo
+	mov ebx,a32 rel es:foo
+	mov rax,a32 rel es:foo
+	mov rbx,a32 rel es:foo
+	mov al,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel es:0xbbbbbbbb
+	mov bl,a32 rel es:0xbbbbbbbb
+	mov ax,a32 rel es:0xbbbbbbbb
+	mov bx,a32 rel es:0xbbbbbbbb
+	mov eax,a32 rel es:0xbbbbbbbb
+	mov ebx,a32 rel es:0xbbbbbbbb
+	mov rax,a32 rel es:0xbbbbbbbb
+	mov rbx,a32 rel es:0xbbbbbbbb
+	mov al,a32 rel es:0xffffffffcccccccc
+	mov bl,a32 rel es:0xffffffffcccccccc
+	mov ax,a32 rel es:0xffffffffcccccccc
+	mov bx,a32 rel es:0xffffffffcccccccc
+	mov eax,a32 rel es:0xffffffffcccccccc
+	mov ebx,a32 rel es:0xffffffffcccccccc
+	mov rax,a32 rel es:0xffffffffcccccccc
+	mov rbx,a32 rel es:0xffffffffcccccccc
+
+	mov al,a32 rel dword es:foo
+	mov bl,a32 rel dword es:foo
+	mov ax,a32 rel dword es:foo
+	mov bx,a32 rel dword es:foo
+	mov eax,a32 rel dword es:foo
+	mov ebx,a32 rel dword es:foo
+	mov rax,a32 rel dword es:foo
+	mov rbx,a32 rel dword es:foo
+	mov al,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel dword es:0xbbbbbbbb
+	mov bl,a32 rel dword es:0xbbbbbbbb
+	mov ax,a32 rel dword es:0xbbbbbbbb
+	mov bx,a32 rel dword es:0xbbbbbbbb
+	mov eax,a32 rel dword es:0xbbbbbbbb
+	mov ebx,a32 rel dword es:0xbbbbbbbb
+	mov rax,a32 rel dword es:0xbbbbbbbb
+	mov rbx,a32 rel dword es:0xbbbbbbbb
+	mov al,a32 rel dword es:0xffffffffcccccccc
+	mov bl,a32 rel dword es:0xffffffffcccccccc
+	mov ax,a32 rel dword es:0xffffffffcccccccc
+	mov bx,a32 rel dword es:0xffffffffcccccccc
+	mov eax,a32 rel dword es:0xffffffffcccccccc
+	mov ebx,a32 rel dword es:0xffffffffcccccccc
+	mov rax,a32 rel dword es:0xffffffffcccccccc
+	mov rbx,a32 rel dword es:0xffffffffcccccccc
+
+	mov al,a32 rel qword es:foo
+	mov bl,a32 rel qword es:foo
+	mov ax,a32 rel qword es:foo
+	mov bx,a32 rel qword es:foo
+	mov eax,a32 rel qword es:foo
+	mov ebx,a32 rel qword es:foo
+	mov rax,a32 rel qword es:foo
+	mov rbx,a32 rel qword es:foo
+	mov al,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel qword es:0xbbbbbbbb
+	mov bl,a32 rel qword es:0xbbbbbbbb
+	mov ax,a32 rel qword es:0xbbbbbbbb
+	mov bx,a32 rel qword es:0xbbbbbbbb
+	mov eax,a32 rel qword es:0xbbbbbbbb
+	mov ebx,a32 rel qword es:0xbbbbbbbb
+	mov rax,a32 rel qword es:0xbbbbbbbb
+	mov rbx,a32 rel qword es:0xbbbbbbbb
+	mov al,a32 rel qword es:0xffffffffcccccccc
+	mov bl,a32 rel qword es:0xffffffffcccccccc
+	mov ax,a32 rel qword es:0xffffffffcccccccc
+	mov bx,a32 rel qword es:0xffffffffcccccccc
+	mov eax,a32 rel qword es:0xffffffffcccccccc
+	mov ebx,a32 rel qword es:0xffffffffcccccccc
+	mov rax,a32 rel qword es:0xffffffffcccccccc
+	mov rbx,a32 rel qword es:0xffffffffcccccccc
+
+
+foo:

_service:tar_scm:nasm-2.16.03.tar.xz/test/riprel.pl Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/riprel2.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/selfref.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/sha-64.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/sha.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/sm3-64.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/sm3.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/sm4-64.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/sm4.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/smartalign16.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/smartalign32.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/smartalign64.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/splitea.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/sreg.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/ssesize.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/strlen.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/struc.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/subsection.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/test67.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/testdos.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/testnos3.asm Added

@@ -0,0 +1,973 @@
+;Testname=test; Arguments=-fbin -otestnos3.bin; Files=stdout stderr testnos3.bin
+;
+; Double-precision floating point tests, derived from Fred Tydeman's posting
+; of 26 February 1996 to comp.arch.arithmetic, via David M. Gay's gdtoa
+; package.
+;
+	bits 64
+
+	dq	9.e0306
+	dq	0x7fa9a2028368022e
+
+	dq	4.e-079
+	dq	0x2fa7b6d71d20b96c
+
+	dq	7.e-261
+	dq	0x09eb8d7e32be6396
+
+	dq	6.e-025
+	dq	0x3ae7361cb863de62
+
+	dq	7.e-161
+	dq	0x1eaf7e0db3799aa3
+
+	dq	7.e0289
+	dq	0x7c1cbb547777a285
+
+	dq	5.e0079
+	dq	0x507afcef51f0fb5f
+
+	dq	1.e0080
+	dq	0x508afcef51f0fb5f
+
+	dq	7.e-303
+	dq	0x0133339131c46f8b
+
+	dq	5.e0152
+	dq	0x5fa317e5ef3ab327
+
+	dq	5.e0125
+	dq	0x5a07a2ecc414a03f
+
+	dq	2.e0126
+	dq	0x5a27a2ecc414a03f
+
+	dq	7.e-141
+	dq	0x22d5570f59bd178c
+
+	dq	4.e-192
+	dq	0x18323ff06eea847a
+
+	dq	9.e0043
+	dq	0x49102498ea6df0c4
+
+	dq	1.e0303
+	dq	0x7ed754e31cd072da
+
+	dq	95.e-089
+	dq	0x2dde3cbc9907fdc8
+
+	dq	85.e0194
+	dq	0x689d1c26db7d0dae
+
+	dq	69.e0267
+	dq	0x77c0b7cb60c994da
+
+	dq	97.e-019
+	dq	0x3c665dde8e688ba6
+
+	dq	37.e0046
+	dq	0x49d033d7eca0adef
+
+	dq	74.e0046
+	dq	0x49e033d7eca0adef
+
+	dq	61.e-099
+	dq	0x2bc0ad836f269a17
+
+	dq	53.e-208
+	dq	0x151b39ae1909c31b
+
+	dq	93.e-234
+	dq	0x0fc27b2e4f210075
+
+	dq	79.e-095
+	dq	0x2c9a5db812948281
+
+	dq	87.e-274
+	dq	0x0772d36cf48e7abd
+
+	dq	83.e0025
+	dq	0x4585747ab143e353
+
+	dq	17.e-036
+	dq	0x38b698ccdc60015a
+
+	dq	53.e0033
+	dq	0x47246a3418629ef6
+
+	dq	51.e-074
+	dq	0x30ecd5bee57763e6
+
+	dq	63.e-022
+	dq	0x3bbdc03b8fd7016a
+
+	dq	839.e0143
+	dq	0x5e3ae03f245703e2
+
+	dq	749.e-182
+	dq	0x1abf14727744c63e
+
+	dq	999.e-026
+	dq	0x3b282782afe1869e
+
+	dq	345.e0266
+	dq	0x77b0b7cb60c994da
+
+	dq	914.e-102
+	dq	0x2b5ffc81bc29f02b
+
+	dq	829.e0102
+	dq	0x55b7221a79cdd1d9
+
+	dq	307.e0090
+	dq	0x5322d6b183fe4b55
+
+	dq	859.e0182
+	dq	0x6654374d8b87ac63
+
+	dq	283.e0085
+	dq	0x5216c309024bab4b
+
+	dq	589.e0187
+	dq	0x675526be9c22eb17
+
+	dq	302.e0176
+	dq	0x64fdcf7df8f573b7
+
+	dq	604.e0176
+	dq	0x650dcf7df8f573b7
+
+	dq	761.e-244
+	dq	0x0de03cea3586452e
+
+	dq	647.e0230
+	dq	0x7044d64d4079150c
+
+	dq	755.e0174
+	dq	0x64a7d93193f78fc6
+
+	dq	255.e-075
+	dq	0x30dcd5bee57763e6
+
+	dq	3391.e0055
+	dq	0x4c159bd3ad46e346
+
+	dq	4147.e-015
+	dq	0x3d923d1b5eb1d778
+
+	dq	3996.e-026
+	dq	0x3b482782afe1869e
+
+	dq	1998.e-026
+	dq	0x3b382782afe1869e
+
+	dq	3338.e-296
+	dq	0x0335519ac5142aab
+
+	dq	1669.e-296
+	dq	0x0325519ac5142aab
+
+	dq	8699.e-276
+	dq	0x0772d2df246ecd2d
+
+	dq	5311.e0243
+	dq	0x73284e91f4aa0fdb
+
+	dq	7903.e-096
+	dq	0x2cd07c2d27a5b989
+
+	dq	7611.e-226
+	dq	0x11d19b8744033457
+
+	dq	3257.e0058
+	dq	0x4cb444b34a6fb3eb
+
+	dq	6514.e0058
+	dq	0x4cc444b34a6fb3eb
+
+	dq	3571.e0263
+	dq	0x77462644c61d41aa
+
+	dq	7142.e0263
+	dq	0x77562644c61d41aa
+
+	dq	5311.e0242
+	dq	0x72f3720e5d54d97c
+
+	dq	1617.e-063
+	dq	0x3384c98fce16152e
+
+	dq	51881.e0037
+	dq	0x4897d2950dc76da4
+
+	dq	31441.e-118
+	dq	0x285ef890f5de4c86
+
+	dq	30179.e0079
+	dq	0x5143e272a77478e8
+
+	dq	60358.e0079
+	dq	0x5153e272a77478e8
+
+	dq	63876.e-020
+	dq	0x3cc703856844bdbf
+
+	dq	31938.e-020
+	dq	0x3cb703856844bdbf
+
+	dq	46073.e-032
+	dq	0x3a42405b773fbdf3
+
+	dq	32941.e0051
+	dq	0x4b757eb8ad52a5c9
+
+	dq	82081.e0041
+	dq	0x49770105df3d47cb
+
+	dq	38701.e-215
+	dq	0x1440492a4a8a37fd
+
+	dq	62745.e0047
+	dq	0x4ab0c52fe6dc6a1b
+
+	dq	12549.e0048
+	dq	0x4ac0c52fe6dc6a1b
+
+	dq	64009.e-183
+	dq	0x1af099b393b84832
+
+	dq	89275.e0261
+	dq	0x77262644c61d41aa
+
+	dq	75859.e0025
+	dq	0x46232645e1ba93f0
+
+	dq	57533.e0287
+	dq	0x7c8272ed2307f56a
+
+	dq	584169.e0229
+	dq	0x70ad657059dc79aa
+
+	dq	940189.e-112
+	dq	0x29eb99d6240c1a28
+
+	dq	416121.e0197
+	dq	0x6a00fd07ed297f80
+
+	dq	832242.e0197
+	dq	0x6a10fd07ed297f80
+
+	dq	584738.e0076
+	dq	0x50e8a85eb277e645
+
+	dq	933587.e-140
+	dq	0x241b248728b9c117
+
+	dq	252601.e0121
+	dq	0x5a2dda592e398dd7
+
+	dq	358423.e0274
+	dq	0x79f9463b59b8f2bd
+
+	dq	892771.e-213
+	dq	0x14f25818c7294f27
+
+	dq	410405.e0040
+	dq	0x49670105df3d47cb
+
+	dq	928609.e-261
+	dq	0x0afbe2dd66200bef
+
+	dq	302276.e-254
+	dq	0x0c55a462d91c6ab3
+
+	dq	920657.e-023
+	dq	0x3c653a9985dbde6c
+
+	dq	609019.e-025
+	dq	0x3bf1f99e11ea0a24
+
+	dq	252601.e0120
+	dq	0x59f7e1e0f1c7a4ac
+
+	dq	654839.e-060
+	dq	0x34b00e7db3b3f242
+
+	dq	8823691.e0130
+	dq	0x5c5e597c0b94b7ae
+
+	dq	2920845.e0228
+	dq	0x709d657059dc79aa
+
+	dq	9210917.e0080
+	dq	0x51fda232347e6032
+
+	dq	5800419.e-303
+	dq	0x026e58ffa48f4fce
+
+	dq	6119898.e-243
+	dq	0x0ee3ecf22ea07863
+
+	dq	3059949.e-243
+	dq	0x0ed3ecf22ea07863
+
+	dq	2572231.e0223
+	dq	0x6f90f73be1dff9ad
+
+	dq	5444097.e-021
+	dq	0x3cf8849dd33c95af
+
+	dq	5783893.e-127
+	dq	0x26f7e5902ce0e151
+
+	dq	3865421.e-225
+	dq	0x1295d4fe53afec65
+
+	dq	4590831.e0156
+	dq	0x61b4689b4a5fa201
+
+	dq	9181662.e0156
+	dq	0x61c4689b4a5fa201
+
+	dq	5906361.e-027
+	dq	0x3bbbe45a312d08a0
+
+	dq	7315057.e0235
+	dq	0x7225f0d408362a72
+
+	dq	9088115.e0106
+	dq	0x5762e51a84a3c6a0
+
+	dq	1817623.e0107
+	dq	0x5772e51a84a3c6a0
+
+	dq	44118455.e0129
+	dq	0x5c4e597c0b94b7ae
+
+	dq	35282041.e0293
+	dq	0x7e5512d5273e62e8
+
+	dq	31279898.e-291
+	dq	0x05129b01b6885d36
+
+	dq	15639949.e-291
+	dq	0x05029b01b6885d36
+
+	dq	27966061.e0145
+	dq	0x5f955bcf72fd10f9
+
+	dq	55932122.e0145
+	dq	0x5fa55bcf72fd10f9
+
+	dq	70176353.e-053
+	dq	0x36900683a21de855
+
+	dq	40277543.e-032
+	dq	0x3adf29ca0ff893b1
+
+	dq	50609263.e0157
+	dq	0x622193aff1f1c8e3
+
+	dq	66094077.e0077
+	dq	0x518b37c4b7928317
+
+	dq	84863171.e0114
+	dq	0x59406e98f5ec8f37
+
+	dq	89396333.e0264
+	dq	0x786526f061ca9053
+
+	dq	87575437.e-309
+	dq	0x016e07320602056c
+
+	dq	78693511.e-044
+	dq	0x3870bc7b7603a2ca
+
+	dq	90285923.e-206
+	dq	0x16d1470083f89d48
+
+	dq	30155207.e-030
+	dq	0x3b423a4ad20748a2
+
+	dq	245540327.e0121
+	dq	0x5acc569e968e0944
+
+	dq	263125459.e0287
+	dq	0x7d44997a298b2f2e
+
+	dq	566446538.e-257
+	dq	0x0c64472ba9550e86
+
+	dq	283223269.e-257
+	dq	0x0c54472ba9550e86
+
+	dq	245540327.e0122
+	dq	0x5b01b6231e18c5cb
+
+	dq	491080654.e0122
+	dq	0x5b11b6231e18c5cb
+
+	dq	971212611.e-126
+	dq	0x27a397d3c9745d2f
+
+	dq	229058583.e0052
+	dq	0x4c76ce94febdc7a5
+
+	dq	325270231.e0039
+	dq	0x49cc7ccf90c9f8ab
+
+	dq	989648089.e-035
+	dq	0x3a8880a3d515e849
+
+	dq	653777767.e0273
+	dq	0x7a720223f2b3a881
+
+	dq	923091487.e0209
+	dq	0x6d30bc60e6896717
+
+	dq	526250918.e0288
+	dq	0x7d89bfd8b3edfafa
+
+	dq	350301748.e-309
+	dq	0x018e07320602056c
+
+	dq	741111169.e-203
+	dq	0x17a14fe7daf8f3ae
+
+	dq	667284113.e-240
+	dq	0x0ff09355f8050c02
+
+	dq	1227701635.e0120
+	dq	0x5abc569e968e0944
+
+	dq	9981396317.e-182
+	dq	0x1c38afe10a2a66aa
+
+	dq	5232604057.e-298
+	dq	0x041465b896c24520
+
+	dq	5572170023.e-088
+	dq	0x2fb0847822f765b2
+
+	dq	1964322616.e0122
+	dq	0x5b31b6231e18c5cb
+
+	dq	3928645232.e0122
+	dq	0x5b41b6231e18c5cb
+
+	dq	8715380633.e-058
+	dq	0x35f4614c3219891f
+
+	dq	4856063055.e-127
+	dq	0x279397d3c9745d2f
+
+	dq	8336960483.e-153
+	dq	0x223a06a1024b95e1
+
+	dq	1007046393.e-155
+	dq	0x21a01891fc4717fd
+
+	dq	5378822089.e-176
+	dq	0x1d695fd4c88d4b1b
+
+	dq	5981342308.e-190
+	dq	0x1a83db11ac608107
+
+	dq	7214782613.e-086
+	dq	0x3020b552d2edcdea
+
+	dq	5458466829.e0142
+	dq	0x5f70acde6a98eb4c
+
+	dq	9078555839.e-109
+	dq	0x2b5fc575867314ee
+
+	dq	6418488827.e0079
+	dq	0x526021f14ed7b3fa
+
+	dq	65325840981.e0069
+	dq	0x5081a151ddbd3c4a
+
+	dq	49573485983.e0089
+	dq	0x54a221bd871d2cf4
+
+	dq	46275205733.e0074
+	dq	0x51830e6c7d4e3480
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+	dq	92550411466.e0074
+	dq	0x51930e6c7d4e3480
+
+	dq	41129842097.e-202
+	dq	0x1832c3e72d179607
+
+	dq	93227267727.e-049
+	dq	0x380960fe08d5847f
+
+	dq	41297294357.e0185
+	dq	0x688c49437fccfadb
+
+	dq	41534892987.e-067
+	dq	0x343a12666477886d
+
+	dq	42333842451.e0201
+	dq	0x6be0189a26df575f
+
+	dq	78564021519.e-227
+	dq	0x131155515fd37265
+
+	dq	53587107423.e-061
+	dq	0x35800a19a3ffd981
+
+	dq	53827010643.e-200
+	dq	0x18a32fa69a69bd6d
+
+	dq	83356057653.e0193
+	dq	0x6a4544e6daee2a18
+
+	dq	45256834646.e-118
+	dq	0x29a541ecdfd48694
+
+	dq	45392779195.e-110
+	dq	0x2b4fc575867314ee
+
+	dq	23934638219.e0291
+	dq	0x7e81deaf40ead9a0
+
+	dq	995779191233.e0113
+	dq	0x59e2d44edcc51304
+
+	dq	997422852243.e-265
+	dq	0x0b676688faee99bc
+
+	dq	653532977297.e-123
+	dq	0x28d925a0aabcdc68
+
+	dq	938885684947.e0147
+	dq	0x60f11894b202e9f4
+
+	dq	619534293513.e0124
+	dq	0x5c210c20303fe0f1
+
+	dq	539879452414.e-042
+	dq	0x39a5e66dc3d6bdb5
+
+	dq	742522891517.e0259
+	dq	0x782c1c352fc3c309
+
+	dq	254901016865.e-022
+	dq	0x3dbc06d366394441
+
+	dq	685763015669.e0280
+	dq	0x7c85fd7aa44d9477
+
+	dq	384865004907.e-285
+	dq	0x072aa65b58639e69
+
+	dq	286556458711.e0081
+	dq	0x5321958b36c5102b
+
+	dq	573112917422.e0081
+	dq	0x5331958b36c5102b
+
+	dq	769525178383.e-150
+	dq	0x234253ec0e161420
+
+	dq	416780288265.e0192
+	dq	0x6a3544e6daee2a18
+
+	dq	226963895975.e-111
+	dq	0x2b3fc575867314ee
+
+	dq	665592809339.e0063
+	dq	0x4f778b6516c2b478
+
+	dq	3891901811465.e0217
+	dq	0x6f99ab8261990292
+
+	dq	4764593340755.e0069
+	dq	0x50e4177a9915fbf8
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+	dq	6336156586177.e0269
+	dq	0x7a7173f76c63b792
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+	dq	8233559360849.e0095
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+	dq	3662265515198.e-107
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+	dq	1831132757599.e-107
+	dq	0x2c438e6edd48f2a3
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+	dq	7812878489261.e-179
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+	dq	6363857920591.e0145
+	dq	0x60b28a61cf9483b7
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+	dq	8811915538555.e0082
+	dq	0x53a51f508b287ae7
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+	dq	9997878507563.e-195
+	dq	0x1a253db2fea1ea31
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+	dq	9224786422069.e-291
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+	dq	6284426329974.e-294
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+	dq	9199302046091.e-062
+	dq	0x35c135972630774c
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+	dq	6070482281213.e-122
+	dq	0x29423fa9e6fcf47e
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+	dq	2780161250963.e-301
+	dq	0x0405acc2053064c2
+
+	dq	8233559360849.e0094
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+	dq	72027097041701.e0206
+	dq	0x6d94677812d3a606
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+	dq	97297545286625.e0215
+	dq	0x6f79ab8261990292
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+	dq	99021992302453.e-025
+	dq	0x3da5c6714def374c
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+	dq	54104687080198.e-022
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+	dq	33519685743233.e0089
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+	dq	67039371486466.e0089
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+	dq	39064392446305.e-180
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+	dq	17796979903653.e0261
+	dq	0x78e072f3819c1321
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+	dq	28921916763211.e0038
+	dq	0x4a9eebabe0957af3
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+	dq	87605699161665.e0155
+	dq	0x6302920f96e7f9ef
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+	dq	41921560615349.e-067
+	dq	0x34d9b2a5c4041e4b
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+	dq	80527976643809.e0061
+	dq	0x4f7c7c5aea080a49
+
+	dq	72335858886654.e-159
+	dq	0x21cce77c2b3328fc
+
+	dq	52656615219377.e0102
+	dq	0x57f561def4a9ee32
+
+	dq	15400733123779.e-072
+	dq	0x33b8bf7e7fa6f02a
+
+	dq	77003665618895.e-073
+	dq	0x33a8bf7e7fa6f02a
+
+	dq	475603213226859.e-042
+	dq	0x3a42d73088f4050a
+
+	dq	972708181182949.e0116
+	dq	0x5b218a7f36172332
+
+	dq	246411729980464.e-071
+	dq	0x342eef5e1f90ac34
+
+	dq	123205864990232.e-071
+	dq	0x341eef5e1f90ac34
+
+	dq	609610927149051.e-255
+	dq	0x0e104273b18918b1
+
+	dq	475603213226859.e-041
+	dq	0x3a778cfcab31064d
+
+	dq	672574798934795.e0065
+	dq	0x508226c684c87261
+
+	dq	134514959786959.e0066
+	dq	0x509226c684c87261
+
+	dq	294897574603217.e-151
+	dq	0x2395f2df5e675a0f
+
+	dq	723047919080275.e0036
+	dq	0x4a7eebabe0957af3
+
+	dq	660191429952702.e-088
+	dq	0x30bddc7e975c5045
+
+	dq	330095714976351.e-088
+	dq	0x30addc7e975c5045
+
+	dq	578686871093232.e-159
+	dq	0x21fce77c2b3328fc
+
+	dq	144671717773308.e-159
+	dq	0x21dce77c2b3328fc
+
+	dq	385018328094475.e-074
+	dq	0x3398bf7e7fa6f02a
+
+	dq	330095714976351.e-089
+	dq	0x3077e3987916a69e
+
+	dq	2215901545757777.e-212
+	dq	0x171a80a6e566428c
+
+	dq	1702061899637397.e-276
+	dq	0x09cacc46749dccfe
+
+	dq	1864950924021923.e0213
+	dq	0x6f53ae60753af6ca
+
+	dq	3729901848043846.e0213
+	dq	0x6f63ae60753af6ca
+
+	dq	7487252720986826.e-165
+	dq	0x20f8823a57adbef9
+
+	dq	3743626360493413.e-165
+	dq	0x20e8823a57adbef9
+
+	dq	4988915232824583.e0119
+	dq	0x5be5f6de9d5d6b5b
+
+	dq	3771476185376383.e0277
+	dq	0x7cae3c14d6916ce9
+
+	dq	6182410494241627.e-119
+	dq	0x2a81b96458445d07
+
+	dq	2572981889477453.e0142
+	dq	0x609dfc11fbf46087
+
+	dq	7793560217139653.e0051
+	dq	0x4dd280461b856ec5
+
+	dq	9163942927285259.e-202
+	dq	0x194fe601457dce4d
+
+	dq	6353227084707473.e0155
+	dq	0x63650aff653ffe8a
+
+	dq	4431803091515554.e-211
+	dq	0x176090684f5fe998
+
+	dq	9324754620109615.e0211
+	dq	0x6f0f7d6721f7f144
+
+	dq	8870461176410409.e0263
+	dq	0x79d90529a37b7e22
+
+	dq	90372559027740405.e0143
+	dq	0x612491daad0ba280
+
+	dq	18074511805548081.e0146
+	dq	0x61a011f2d73116f4
+
+	dq	54897030182071313.e0029
+	dq	0x496ec55666d8f9ec
+
+	dq	76232626624829156.e-032
+	dq	0x3ccb7738011e75fe
+
+	dq	59898021767894608.e-165
+	dq	0x2128823a57adbef9
+
+	dq	29949010883947304.e-165
+	dq	0x2118823a57adbef9
+
+	dq	26153245263757307.e0049
+	dq	0x4d83de005bd620df
+
+	dq	27176258005319167.e-261
+	dq	0x0d27c0747bd76fa1
+
+	dq	18074511805548081.e0147
+	dq	0x61d4166f8cfd5cb1
+
+	dq	24691002732654881.e-115
+	dq	0x2b759a2783ce70ab
+
+	dq	58483921078398283.e0057
+	dq	0x4f408ce499519ce3
+
+	dq	64409240769861689.e-159
+	dq	0x22692238f7987779
+
+	dq	94080055902682397.e-242
+	dq	0x11364981e39e66ca
+
+	dq	31766135423537365.e0154
+	dq	0x63550aff653ffe8a
+
+	dq	68985865317742005.e0164
+	dq	0x657a999ddec72aca
+
+	dq	13797173063548401.e0165
+	dq	0x658a999ddec72aca
+
+	dq	902042358290366539.e-281
+	dq	0x09522dc01ca1cb8c
+
+	dq	238296178309629163.e0272
+	dq	0x7c038fd93f1f5342
+
+	dq	783308178698887621.e0226
+	dq	0x72925ae62cb346d8
+
+	dq	439176241456570504.e0029
+	dq	0x499ec55666d8f9ec
+
+	dq	899810892172646163.e0283
+	dq	0x7e6adf51fa055e03
+
+	dq	926145344610700019.e-225
+	dq	0x14f307a67f1f69ff
+
+	dq	653831131593932675.e0047
+	dq	0x4d63de005bd620df
+
+	dq	130766226318786535.e0048
+	dq	0x4d73de005bd620df
+
+	dq	557035730189854663.e-294
+	dq	0x0693bfac6bc4767b
+
+	dq	902042358290366539.e-280
+	dq	0x0986b93023ca3e6f
+
+	dq	272104041512242479.e0200
+	dq	0x6d13bbb4bf05f087
+
+	dq	544208083024484958.e0200
+	dq	0x6d23bbb4bf05f087
+
+	dq	680429695511221511.e0192
+	dq	0x6b808ebc116f8a20
+
+	dq	308975121073410857.e0236
+	dq	0x7490db75cc001072
+
+	dq	792644927852378159.e0078
+	dq	0x53d7bff336d8ff06
+
+	dq	783308178698887621.e0223
+	dq	0x71f2cbac35f71140
+
+	dq	8396094300569779681.e-252
+	dq	0x0f8ab223efcee35a
+
+	dq	3507665085003296281.e-074
+	dq	0x346b85c026a264e4
+
+	dq	7322325862592278999.e0074
+	dq	0x5336775b6caa5ae0
+
+	dq	6014546754280072926.e0209
+	dq	0x6f396397b06732a4
+
+	dq	7120190517612959703.e0120
+	dq	0x5cc3220dcd5899fd
+
+	dq	3507665085003296281.e-073
+	dq	0x34a1339818257f0f
+
+	dq	4345544743100783551.e-218
+	dq	0x168a9c42e5b6d89f
+
+	dq	9778613303868468131.e-090
+	dq	0x313146fe1075e1ef
+
+	dq	7539204280836061195.e-082
+	dq	0x32d3d969e3dbe723
+
+	dq	7862637540082247119.e-202
+	dq	0x19eaba3262ee707b
+
+	dq	2176832332097939832.e0200
+	dq	0x6d43bbb4bf05f087
+
+	dq	8643988913946659879.e0115
+	dq	0x5bbe71ec1ed0a4f9
+
+	dq	5529436763613147623.e0138
+	dq	0x6079c677be6f236e
+
+	dq	6764958008109694533.e-173
+	dq	0x1fed06692e6f5ef6
+
+	dq	6802601037806061975.e0197
+	dq	0x6cbf92bacb3cb40c
+
+	dq	1360520207561212395.e0198
+	dq	0x6ccf92bacb3cb40c
+
+	dq	62259110684423957791.e0047
+	dq	0x4dcd8f2cfc20d6e8
+
+	dq	88800290202542652011.e-226
+	dq	0x1526cec51a43f41a
+
+	dq	41010852717673354694.e-221
+	dq	0x162012954b6aabba
+
+	dq	20505426358836677347.e-221
+	dq	0x161012954b6aabba
+
+	dq	66102447903809911604.e0055
+	dq	0x4f7762068a24fd55
+
+	dq	35600952588064798515.e0119
+	dq	0x5cb3220dcd5899fd
+
+	dq	14371240869903838702.e0205
+	dq	0x6e78d92d2bcc7a81
+
+	dq	57500690832492901689.e0043
+	dq	0x4cf65d3e2acd616b
+
+	dq	23432630639573022093.e-107
+	dq	0x2dbdd54c40a2f25f
+
+	dq	62259110684423957791.e0048
+	dq	0x4e02797c1d948651
+
+	dq	35620497849450218807.e-306
+	dq	0x0475b22082529425
+
+	dq	69658634627134074624.e0200
+	dq	0x6d93bbb4bf05f087
+
+	dq	99440755792436956989.e-062
+	dq	0x37362d10462a26f4
+
+	dq	55277197169490210673.e0081
+	dq	0x54d945bfa911e32a
+
+	dq	36992084760177624177.e-318
+	dq	0x01f8c5f9551c2f9a
+
+	dq	30888265282878466443.e-111
+	dq	0x2cf01b8ef28251fc
+
+	dq	2.4703282292062327208828439643411068618252990130716238221279284125033775363510437593264991818081799618989828234772285886546332835517796989819938739800539093906315035659515570226392290858392449105184435931802849936536152500319370457678249219365623669863658480757001585769269903706311928279558551332927834338409351978015531246597263579574622766465272827220056374006485499977096599470454020828166226237857393450736339007967761930577506740176324673600968951340535537458516661134223766678604162159680461914467291840300530057530849048765391711386591646239524912623653881879636239373280423891018672348497668235089863388587925628302755995657524455507255189313690836254779186948667994968324049705821028513185451396213837722826145437693412532098591327667236328125e-324
+	dq	0x0000000000000000
+
+	dq	2.47032822920623272e-324
+	dq	0x0000000000000000

_service:tar_scm:nasm-2.16.03.tar.xz/test/time.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/times.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/timesneg.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/tmap.nas Added

@@ -0,0 +1,1447 @@
+;; NASM note: this file abuses the section flags in such a way that
+;; NASM 0.98.37 broke when this was compiled with:
+;; nasm -o tmap.o -f elf -DLINUX tmap.nas
+
+;;-----------------------------------------------------------------------------
+;;
+;; $Id$
+;;
+;; Copyright (C) 1998-2000 by DooM Legacy Team.
+;;
+;; This program is free software; you can redistribute it and/or
+;; modify it under the terms of the GNU General Public License
+;; as published by the Free Software Foundation; either version 2
+;; of the License, or (at your option) any later version.
+;;
+;; This program is distributed in the hope that it will be useful,
+;; but WITHOUT ANY WARRANTY; without even the implied warranty of
+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+;; GNU General Public License for more details.
+;;
+;;
+;; $Log$
+;; Revision 1.2  2003/09/10 23:33:38  hpa
+;; Use the version of tmap.nas that actually caused problems
+;;
+;; Revision 1.10  2001/02/24 13:35:21  bpereira
+;; no message
+;;
+;; Revision 1.9  2001/02/10 15:24:19  hurdler
+;; Apply Rob's patch for Linux version
+;;
+;; Revision 1.8  2000/11/12 09:48:15  bpereira
+;; no message
+;;
+;; Revision 1.7  2000/11/06 20:52:16  bpereira
+;; no message
+;;
+;; Revision 1.6  2000/11/03 11:48:40  hurdler
+;; Fix compiling problem under win32 with 3D-Floors and FragglScript (to verify!)
+;;
+;; Revision 1.5  2000/11/03 03:27:17  stroggonmeth
+;; Again with the bug fixing...
+;;
+;; Revision 1.4  2000/11/02 17:50:10  stroggonmeth
+;; Big 3Dfloors & FraggleScript commit!!
+;;
+;; Revision 1.3  2000/04/24 20:24:38  bpereira
+;; no message
+;;
+;; Revision 1.2  2000/02/27 00:42:11  hurdler
+;; fix CR+LF problem
+;;
+;; Revision 1.1.1.1  2000/02/22 20:32:32  hurdler
+;; Initial import into CVS (v1.29 pr3)
+;;
+;;
+;; DESCRIPTION:
+;;      assembler optimised rendering code for software mode
+;;      draw floor spans, and wall columns.
+;;
+;;-----------------------------------------------------------------------------
+
+
+BITS 32
+
+%ifdef LINUX
+%macro cextern 1
+extern %1
+%endmacro
+
+%macro cglobal 1
+global %1
+%endmacro
+
+%define CODE_SEG .data
+%else
+%macro cextern 1
+%define %1 _%1
+extern %1
+%endmacro
+
+%macro cglobal 1
+%define %1 _%1
+global %1
+%endmacro
+
+%define CODE_SEG .text                         
+%endif
+
+
+;; externs
+;; columns
+cextern dc_x
+cextern dc_yl
+cextern dc_yh
+cextern ylookup
+cextern columnofs
+cextern dc_source
+cextern dc_texturemid
+cextern dc_iscale
+cextern centery
+cextern dc_colormap
+cextern dc_transmap
+cextern colormaps
+
+;; spans
+cextern ds_x1
+cextern ds_x2
+cextern ds_y
+cextern ds_xfrac
+cextern ds_yfrac
+cextern ds_xstep
+cextern ds_ystep
+cextern ds_source
+cextern ds_colormap
+;cextern ds_textureheight
+
+; polygon edge rasterizer
+cextern prastertab
+
+
+;;----------------------------------------------------------------------
+;;
+;; R_DrawColumn
+;;
+;; New  optimised version 10-01-1998 by D.Fabrice and P.Boris
+;; TO DO: optimise it much farther... should take at most 3 cycles/pix
+;;      once it's fixed, add code to patch the offsets so that it
+;;      works in every screen width.
+;;
+;;----------------------------------------------------------------------
+
+SECTION .data
+
+;;.align        4
+loopcount       dd      0
+pixelcount      dd      0
+tystep          dd      0
+
+SECTION CODE_SEG write
+
+;----------------------------------------------------------------------------
+;fixed_t FixedMul (fixed_t a, fixed_t b)
+;----------------------------------------------------------------------------
+cglobal FixedMul
+;       align   16
+FixedMul:
+        mov     eax,esp+4
+        imul    dword esp+8
+        shrd    eax,edx,16
+        ret
+
+;----------------------------------------------------------------------------
+;fixed_t FixedDiv2 (fixed_t a, fixed_t b);
+;----------------------------------------------------------------------------
+cglobal FixedDiv2
+;       align   16
+FixedDiv2:
+        mov     eax,esp+4
+        mov     edx,eax                 ;; these two instructions allow the next
+        sar     edx,31                  ;; two to pair, on the Pentium processor.
+        shld    edx,eax,16
+        sal     eax,16
+        idiv    dword esp+8
+        ret
+
+;----------------------------------------------------------------------------
+; void  ASM_PatchRowBytes (int rowbytes);
+;----------------------------------------------------------------------------
+cglobal ASM_PatchRowBytes
+;       align   16
+ASM_PatchRowBytes:
+        mov     eax,esp+4
+        mov     p1+2,eax
+        mov     p2+2,eax
+        mov     p3+2,eax
+        mov     p4+2,eax
+        mov     p5+2,eax
+        mov     p6+2,eax
+        mov     p7+2,eax
+        mov     p8+2,eax
+        mov     p9+2,eax
+        mov     pa+2,eax
+        mov     pb+2,eax
+        mov     pc+2,eax
+        mov     pd+2,eax
+        mov     pe+2,eax
+        mov     pf+2,eax
+        mov     pg+2,eax
+        mov     ph+2,eax
+        mov     pi+2,eax
+        mov     pj+2,eax
+        mov     pk+2,eax
+        mov     pl+2,eax
+        mov     pm+2,eax
+        mov     pn+2,eax
+        mov     po+2,eax
+        mov     pp+2,eax
+        mov     pq+2,eax
+        add     eax,eax
+        mov     q1+2,eax
+        mov     q2+2,eax
+        mov     q3+2,eax
+        mov     q4+2,eax
+        mov     q5+2,eax
+        mov     q6+2,eax
+        mov     q7+2,eax
+        mov     q8+2,eax
+        ret
+
+
+;----------------------------------------------------------------------------
+; 8bpp column drawer
+;----------------------------------------------------------------------------
+
+cglobal R_DrawColumn_8
+;       align   16
+R_DrawColumn_8:
+        push    ebp                     ;; preserve caller's stack frame pointer
+        push    esi                     ;; preserve register variables
+        push    edi
+        push    ebx
+;;
+;; dest = ylookupdc_yl + columnofsdc_x;
+;;
+        mov     ebp,dc_yl
+        mov     ebx,ebp
+        mov     edi,ylookup+ebx*4
+        mov     ebx,dc_x
+        add     edi,columnofs+ebx*4  ;; edi = dest
+;;
+;; pixelcount = yh - yl + 1
+;;
+        mov     eax,dc_yh
+        inc     eax
+        sub     eax,ebp                 ;; pixel count
+        mov     pixelcount,eax        ;; save for final pixel
+        jle     near vdone                   ;; nothing to scale
+;;
+;; frac = dc_texturemid - (centery-dc_yl)*fracstep;
+;;
+        mov     ecx,dc_iscale        ;; fracstep
+        mov     eax,centery
+        sub     eax,ebp
+        imul    eax,ecx
+        mov     edx,dc_texturemid
+        sub     edx,eax
+        mov     ebx,edx
+        shr     ebx,16                  ;; frac int.
+        and     ebx,0x7f
+        shl     edx,16                  ;; y frac up
+
+        mov     ebp,ecx
+        shl     ebp,16                  ;; fracstep f. up
+        shr     ecx,16                  ;; fracstep i. ->cl
+        and     cl,0x7f
+        mov     esi,dc_source
+;;
+;; lets rock :) !
+;;
+        mov     eax,pixelcount
+        mov     dh,al
+        shr     eax,2
+        mov     ch,al                   ;; quad count
+        mov     eax,dc_colormap
+        test    dh,0x3
+        je      near v4quadloop
+;;
+;;  do un-even pixel
+;;
+        test    dh,0x1
+        je      two_uneven
+
+        mov     al,esi+ebx            ;; prep un-even loops
+        add     edx,ebp                 ;; ypos f += ystep f
+        adc     bl,cl                   ;; ypos i += ystep i
+        mov     dl,eax                ;; colormap texel
+        and     bl,0x7f                 ;; mask 0-127 texture index
+        mov     edi,dl                ;; output pixel
+p1:     add     edi,0x12345678
+;;
+;;  do two non-quad-aligned pixels
+;;
+two_uneven:
+        test    dh,0x2
+        je      f3
+
+        mov     al,esi+ebx            ;; fetch source texel
+        add     edx,ebp                 ;; ypos f += ystep f
+        adc     bl,cl                   ;; ypos i += ystep i
+        mov     dl,eax                ;; colormap texel
+        and     bl,0x7f                 ;; mask 0-127 texture index
+        mov     edi,dl                ;; output pixel
+        mov     al,esi+ebx
+        add     edx,ebp                 ;; fetch source texel
+        adc     bl,cl                   ;; ypos f += ystep f
+        mov     dl,eax                ;; ypos i += ystep i
+        and     bl,0x7f                 ;; colormap texel
+p2:     add     edi,0x12345678          ;; mask 0-127 texture index
+        mov     edi,dl
+p3:     add     edi,0x12345678          ;; output pixel
+;;
+;;  test if there was at least 4 pixels
+;;
+f3:
+        test    ch,0xff                 ;; test quad count
+        je      near vdone
+;;
+;; ebp : ystep frac. upper 16 bits
+;; edx : y     frac. upper 16 bits
+;; ebx : y     i.    lower 7 bits,  masked for index
+;; ecx : ch = counter, cl = y step i.
+;; eax : colormap aligned 256
+;; esi : source texture column
+;; edi : dest screen
+;;
+v4quadloop:
+        mov     dh,0x7f                 ;; prep mask
+align 4
+vquadloop:
+        mov     al,esi+ebx            ;; prep loop
+        add     edx,ebp                 ;; ypos f += ystep f
+        adc     bl,cl                   ;; ypos i += ystep i
+        mov     dl,eax                ;; colormap texel
+        mov     edi,dl                ;; output pixel
+        and     bl,0x7f                 ;; mask 0-127 texture index
+
+        mov     al,esi+ebx            ;; fetch source texel
+        add     edx,ebp
+        adc     bl,cl
+p4:     add     edi,0x12345678
+        mov     dl,eax
+        and     bl,0x7f
+        mov     edi,dl
+
+        mov     al,esi+ebx            ;; fetch source texel
+        add     edx,ebp
+        adc     bl,cl
+p5:     add     edi,0x12345678
+        mov     dl,eax
+        and     bl,0x7f
+        mov     edi,dl
+
+        mov     al,esi+ebx            ;; fetch source texel
+        add     edx,ebp
+        adc     bl,cl
+p6:     add     edi,0x12345678
+        mov     dl,eax
+        and     bl,0x7f
+        mov     edi,dl
+
+p7:     add     edi,0x12345678
+
+        dec     ch
+        jne     vquadloop
+
+vdone:
+        pop     ebx                     ;; restore register variables
+        pop     edi
+        pop     esi
+        pop     ebp                     ;; restore caller's stack frame pointer
+        ret
+
+;;----------------------------------------------------------------------
+;;13-02-98:
+;;      R_DrawSkyColumn : same as R_DrawColumn but:
+;;
+;;      - wrap around 256 instead of 127.
+;;      this is needed because we have a higher texture for mouselook,
+;;      we need at least 200 lines for the sky.
+;;
+;;      NOTE: the sky should never wrap, so it could use a faster method.
+;;            for the moment, we'll still use a wrapping method...
+;;
+;;      IT S JUST A QUICK CUT N PASTE, WAS NOT OPTIMISED AS IT SHOULD BE !!!
+;;
+;;----------------------------------------------------------------------
+
+cglobal R_DrawSkyColumn_8
+;       align   16
+R_DrawSkyColumn_8:
+        push    ebp
+        push    esi
+        push    edi
+        push    ebx
+;;
+;; dest = ylookupdc_yl + columnofsdc_x;
+;;
+        mov     ebp,dc_yl
+        mov     ebx,ebp
+        mov     edi,ylookup+ebx*4
+        mov     ebx,dc_x
+        add     edi,columnofs+ebx*4   ;; edi = dest
+;;
+;; pixelcount = yh - yl + 1
+;;
+        mov     eax,dc_yh
+        inc     eax
+        sub     eax,ebp                 ;; pixel count
+        mov     pixelcount,eax        ;; save for final pixel
+        jle     near    vskydone        ;; nothing to scale
+;;
+;; frac = dc_texturemid - (centery-dc_yl)*fracstep;
+;;
+        mov     ecx,dc_iscale        ;; fracstep
+        mov     eax,centery
+        sub     eax,ebp
+        imul    eax,ecx
+        mov     edx,dc_texturemid
+        sub     edx,eax
+        mov     ebx,edx
+        shr     ebx,16                  ;; frac int.
+        and     ebx,0xff
+        shl     edx,16                  ;; y frac up
+        mov     ebp,ecx
+        shl     ebp,16                  ;; fracstep f. up
+        shr     ecx,16                  ;; fracstep i. ->cl
+        mov     esi,dc_source
+;;
+;; lets rock :) !
+;;
+        mov     eax,pixelcount
+        mov     dh,al
+        shr     eax,0x2
+        mov     ch,al                   ;; quad count
+        mov     eax,dc_colormap
+        test    dh,0x3
+        je      vskyquadloop
+;;
+;;  do un-even pixel
+;;
+        test    dh,0x1
+        je      f2
+        mov     al,esi+ebx            ;; prep un-even loops
+        add     edx,ebp                 ;; ypos f += ystep f
+        adc     bl,cl                   ;; ypos i += ystep i
+        mov     dl,eax                ;; colormap texel
+        mov     edi,dl                ;; output pixel
+p8:     add     edi,0x12345678
+;;
+;;  do two non-quad-aligned pixels
+;;
+f2:     test    dh,0x2
+        je      skyf3
+
+        mov     al,esi+ebx            ;; fetch source texel
+        add     edx,ebp                 ;; ypos f += ystep f
+        adc     bl,cl                   ;; ypos i += ystep i
+        mov     dl,eax                ;; colormap texel
+        mov     edi,dl                ;; output pixel
+
+        mov     al,esi+ebx            ;; fetch source texel
+        add     edx,ebp                 ;; ypos f += ystep f
+        adc     bl,cl                   ;; ypos i += ystep i
+        mov     dl,eax                ;; colormap texel
+p9:     add     edi,0x12345678
+        mov     edi,dl                ;; output pixel
+
+pa:     add     edi,0x12345678
+;;
+;;  test if there was at least 4 pixels
+;;
+skyf3:  test    ch,0xff                 ;; test quad count
+        je      vskydone
+;;
+;; ebp : ystep frac. upper 24 bits
+;; edx : y     frac. upper 24 bits
+;; ebx : y     i.    lower 7 bits,  masked for index
+;; ecx : ch = counter, cl = y step i.
+;; eax : colormap aligned 256
+;; esi : source texture column
+;; edi : dest screen
+;;
+align 4
+vskyquadloop:
+        mov     al,esi+ebx            ;; prep loop
+        add     edx,ebp                 ;; ypos f += ystep f
+        mov     dl,eax                ;; colormap texel
+        adc     bl,cl                   ;; ypos i += ystep i
+        mov     edi,dl                ;; output pixel
+
+        mov     al,esi+ebx            ;; fetch source texel
+        add     edx,ebp
+        adc     bl,cl
+pb:     add     edi,0x12345678
+        mov     dl,eax
+        mov     edi,dl
+
+        mov     al,esi+ebx            ;; fetch source texel
+        add     edx,ebp
+        adc     bl,cl
+pc:     add     edi,0x12345678
+        mov     dl,eax
+        mov     edi,dl
+
+        mov     al,esi+ebx            ;; fetch source texel
+        add     edx,ebp
+        adc     bl,cl
+pd:     add     edi,0x12345678
+        mov     dl,eax
+        mov     edi,dl
+
+pe:     add     edi,0x12345678
+
+        dec     ch
+        jne     vskyquadloop
+vskydone:
+        pop     ebx
+        pop     edi
+        pop     esi
+        pop     ebp
+        ret
+
+
+;;----------------------------------------------------------------------
+;; R_DrawTranslucentColumn_8
+;;
+;; Vertical column texture drawer, with transparency. Replaces Doom2's
+;; 'fuzz' effect, which was not so beautiful.
+;; Transparency is always impressive in some way, don't know why...
+;;----------------------------------------------------------------------
+
+cglobal R_DrawTranslucentColumn_8
+R_DrawTranslucentColumn_8:
+        push    ebp                     ;; preserve caller's stack frame pointer
+        push    esi                     ;; preserve register variables
+        push    edi
+        push    ebx
+;;
+;; dest = ylookupdc_yl + columnofsdc_x;
+;;
+        mov     ebp,dc_yl
+        mov     ebx,ebp
+        mov     edi,ylookup+ebx*4
+        mov     ebx,dc_x
+        add     edi,columnofs+ebx*4   ;; edi = dest
+;;
+;; pixelcount = yh - yl + 1
+;;
+        mov     eax,dc_yh
+        inc     eax
+        sub     eax,ebp                 ;; pixel count
+        mov     pixelcount,eax        ;; save for final pixel
+        jle     near    vtdone         ;; nothing to scale
+;;
+;; frac = dc_texturemid - (centery-dc_yl)*fracstep;
+;;
+        mov     ecx,dc_iscale        ;; fracstep
+        mov     eax,centery
+        sub     eax,ebp
+        imul    eax,ecx
+        mov     edx,dc_texturemid
+        sub     edx,eax
+        mov     ebx,edx
+
+        shr     ebx,16                  ;; frac int.
+        and     ebx,0x7f
+        shl     edx,16                  ;; y frac up
+
+        mov     ebp,ecx
+        shl     ebp,16                  ;; fracstep f. up
+        shr     ecx,16                  ;; fracstep i. ->cl
+        and     cl,0x7f
+        push    cx
+        mov     ecx,edx
+        pop     cx
+        mov     edx,dc_colormap
+        mov     esi,dc_source
+;;
+;; lets rock :) !
+;;
+        mov     eax,pixelcount
+        shr     eax,0x2
+        test    byte pixelcount,0x3
+        mov     ch,al                   ;; quad count
+        mov     eax,dc_transmap
+        je      vt4quadloop
+;;
+;;  do un-even pixel
+;;
+        test    byte pixelcount,0x1
+        je      trf2
+
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        add     ecx,ebp
+        adc     bl,cl
+        mov     al,edi                ;; fetch dest  : index into colormap
+        and     bl,0x7f
+        mov     dl,eax
+        mov     dl,edx
+        mov     edi,dl
+pf:     add     edi,0x12345678
+;;
+;;  do two non-quad-aligned pixels
+;;
+trf2:    test    byte pixelcount,0x2
+        je      trf3
+
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        add     ecx,ebp
+        adc     bl,cl
+        mov     al,edi                ;; fetch dest  : index into colormap
+        and     bl,0x7f
+        mov     dl,eax
+        mov     dl,edx
+        mov     edi,dl
+pg:     add     edi,0x12345678
+
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        add     ecx,ebp
+        adc     bl,cl
+        mov     al,edi                ;; fetch dest  : index into colormap
+        and     bl,0x7f
+        mov     dl,eax
+        mov     dl,edx
+        mov     edi,dl
+ph:     add     edi,0x12345678
+;;
+;;  test if there was at least 4 pixels
+;;
+trf3:   test    ch,0xff                 ;; test quad count
+        je near vtdone
+
+;;
+;; ebp : ystep frac. upper 24 bits
+;; edx : y     frac. upper 24 bits
+;; ebx : y     i.    lower 7 bits,  masked for index
+;; ecx : ch = counter, cl = y step i.
+;; eax : colormap aligned 256
+;; esi : source texture column
+;; edi : dest screen
+;;
+vt4quadloop:
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        mov     tystep,ebp
+pi:     add     edi,0x12345678
+        mov     al,edi                ;; fetch dest  : index into colormap
+pj:     sub     edi,0x12345678
+        mov     ebp,edi
+pk:     sub     edi,0x12345678
+        jmp short inloop
+align 4
+vtquadloop:
+        add     ecx,tystep
+        adc     bl,cl
+q1:     add     ebp,0x23456789
+        and     bl,0x7f
+        mov     dl,eax
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        mov     dl,edx
+        mov     edi,dl
+        mov     al,ebp                ;; fetch dest   : index into colormap
+inloop:
+        add     ecx,tystep
+        adc     bl,cl
+q2:     add     edi,0x23456789
+        and     bl,0x7f
+        mov     dl,eax
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        mov     dl,edx
+        mov     ebp+0x0,dl
+        mov     al,edi                ;; fetch dest   : index into colormap
+
+        add     ecx,tystep
+        adc     bl,cl
+q3:     add     ebp,0x23456789
+        and     bl,0x7f
+        mov     dl,eax
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        mov     dl,edx
+        mov     edi,dl
+        mov     al,ebp                ;; fetch dest   : index into colormap
+
+        add     ecx,tystep
+        adc     bl,cl
+q4:     add     edi,0x23456789
+        and     bl,0x7f
+        mov     dl,eax
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        mov     dl,edx
+        mov     ebp,dl
+        mov     al,edi                ;; fetch dest   : index into colormap
+
+        dec     ch
+        jne     vtquadloop
+vtdone:
+        pop     ebx
+        pop     edi
+        pop     esi
+        pop     ebp
+        ret
+
+
+;;----------------------------------------------------------------------
+;; R_DrawShadeColumn
+;;
+;;   for smoke..etc.. test.
+;;----------------------------------------------------------------------
+cglobal R_DrawShadeColumn_8
+R_DrawShadeColumn_8:
+        push    ebp                     ;; preserve caller's stack frame pointer
+        push    esi                     ;; preserve register variables
+        push    edi
+        push    ebx
+
+;;
+;; dest = ylookupdc_yl + columnofsdc_x;
+;;
+        mov     ebp,dc_yl
+        mov     ebx,ebp
+        mov     edi,ylookup+ebx*4
+        mov     ebx,dc_x
+        add     edi,columnofs+ebx*4  ;; edi = dest
+;;
+;; pixelcount = yh - yl + 1
+;;
+        mov     eax,dc_yh
+        inc     eax
+        sub     eax,ebp                 ;; pixel count
+        mov     pixelcount,eax       ;; save for final pixel
+        jle near shdone                ;; nothing to scale
+;;
+;; frac = dc_texturemid - (centery-dc_yl)*fracstep;
+;;
+        mov     ecx,dc_iscale        ;; fracstep
+        mov     eax,centery
+        sub     eax,ebp
+        imul    eax,ecx
+        mov     edx,dc_texturemid
+        sub     edx,eax
+        mov     ebx,edx
+        shr     ebx,16                  ;; frac int.
+        and     ebx,byte +0x7f
+        shl     edx,16                  ;; y frac up
+
+        mov     ebp,ecx
+        shl     ebp,16                  ;; fracstep f. up
+        shr     ecx,16                  ;; fracstep i. ->cl
+        and     cl,0x7f
+
+        mov     esi,dc_source
+;;
+;; lets rock :) !
+;;
+        mov     eax,pixelcount
+        mov     dh,al
+        shr     eax,2
+        mov     ch,al                   ;; quad count
+        mov     eax,colormaps
+        test    dh,3
+        je      sh4quadloop
+;;
+;;  do un-even pixel
+;;
+        test    dh,0x1
+        je      shf2
+
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        add     edx,ebp
+        adc     bl,cl
+        mov     al,edi                ;; fetch dest  : index into colormap
+        and     bl,0x7f
+        mov     dl,eax
+        mov     edi,dl
+pl:     add     edi,0x12345678
+;;
+;;  do two non-quad-aligned pixels
+;;
+shf2:
+        test    dh,0x2
+        je      shf3
+
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        add     edx,ebp
+        adc     bl,cl
+        mov     al,edi                ;; fetch dest  : index into colormap
+        and     bl,0x7f
+        mov     dl,eax
+        mov     edi,dl
+pm:     add     edi,0x12345678
+
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        add     edx,ebp
+        adc     bl,cl
+        mov     al,edi                ;; fetch dest  : index into colormap
+        and     bl,0x7f
+        mov     dl,eax
+        mov     edi,dl
+pn:     add     edi,0x12345678
+;;
+;;  test if there was at least 4 pixels
+;;
+shf3:
+        test    ch,0xff                 ;; test quad count
+        je near shdone
+
+;;
+;; ebp : ystep frac. upper 24 bits
+;; edx : y     frac. upper 24 bits
+;; ebx : y     i.    lower 7 bits,  masked for index
+;; ecx : ch = counter, cl = y step i.
+;; eax : colormap aligned 256
+;; esi : source texture column
+;; edi : dest screen
+;;
+sh4quadloop:
+        mov     dh,0x7f                 ;; prep mask
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        mov     tystep,ebp
+po:     add     edi,0x12345678
+        mov     al,edi                ;; fetch dest  : index into colormap
+pp:     sub     edi,0x12345678
+        mov     ebp,edi
+pq:     sub     edi,0x12345678
+        jmp short shinloop
+
+align  4
+shquadloop:
+        add     edx,tystep
+        adc     bl,cl
+        and     bl,dh
+q5:     add     ebp,0x12345678
+        mov     dl,eax
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        mov     edi,dl
+        mov     al,ebp                ;; fetch dest : index into colormap
+shinloop:
+        add     edx,tystep
+        adc     bl,cl
+        and     bl,dh
+q6:     add     edi,0x12345678
+        mov     dl,eax
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        mov     ebp,dl
+        mov     al,edi                ;; fetch dest : index into colormap
+
+        add     edx,tystep
+        adc     bl,cl
+        and     bl,dh
+q7:     add     ebp,0x12345678
+        mov     dl,eax
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        mov     edi,dl
+        mov     al,ebp                ;; fetch dest : index into colormap
+
+        add     edx,tystep
+        adc     bl,cl
+        and     bl,dh
+q8:     add     edi,0x12345678
+        mov     dl,eax
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        mov     ebp,dl
+        mov     al,edi                ;; fetch dest : index into colormap
+
+        dec     ch
+        jne     shquadloop
+
+shdone:
+        pop     ebx                     ;; restore register variables
+        pop     edi
+        pop     esi
+        pop     ebp                     ;; restore caller's stack frame pointer
+        ret
+
+
+
+;;----------------------------------------------------------------------
+;;
+;;      R_DrawSpan
+;;
+;;      Horizontal texture mapping
+;;
+;;----------------------------------------------------------------------
+
+
+SECTION .data
+
+oldcolormap     dd      0
+
+SECTION CODE_SEG write
+
+cglobal R_DrawSpan_8
+R_DrawSpan_8:
+        push    ebp                     ;; preserve caller's stack frame pointer
+        push    esi                     ;; preserve register variables
+        push    edi
+        push    ebx
+;;
+;; initilise registers
+;;
+  
+        mov     edx, ds_xfrac
+        mov     eax, ds_ystep
+        ror     edx, 14
+        ror     eax, 15
+        mov      bl, dl
+        mov     ecx, ds_xstep
+        mov      dh, al
+        mov      ax, 1
+        mov     tystep, eax
+
+
+        mov     eax, ds_yfrac
+        ror     ecx, 13
+        ror     eax, 16
+        mov      dl, cl
+        mov      bh, al
+        xor      cx, cx
+        and     ebx, 0x3fff
+        mov     pixelcount,ecx
+
+        mov     ecx, ds_x2
+        mov     edi, ds_y
+        mov     esi, ds_x1
+        mov     edi, ylookup+edi*4
+        mov     ebp, ebx
+        add     edi, columnofs+esi*4
+        sub     esi, ecx                ;; pixel count
+        shr     ebp, 2
+        mov     ecx, ds_colormap
+        mov      ax, si
+        mov     esi, ds_source
+        sar      ax,1
+        jnc     near .midloop           ;; check parity
+
+;   summary
+; edx = high16bit xfrac0..13, ah=ystep16..24 al=xtep14..21
+; ebx = high16bit =0, bh=yfrac16..24, bl=xfrac14..21 
+; ecx = colormap table cl=0 (colormap is aligned 8 bits)
+; eax = high16bit yfrac0..15, dx = count
+; esi = flat texture source
+; edi = screeen buffer destination
+; ebp = work register
+; pixelcount = high16bit xstep0..13 rest to 0
+; tystep     = high16bit ystep0..15 low 16 bit = 2 (increment of count)
+
+align 4
+.loop
+        add     eax, tystep
+         mov      cl, esi+ebp
+        adc      bh, dh
+         mov      cl, ecx
+        and      bh, 0x3f 
+         mov   edi, cl
+        mov     ebp, ebx        
+         inc     edi
+         shr     ebp, 2
+
+.midloop:
+        add     edx, pixelcount
+         mov      cl, esi+ebp
+        adc      bl, dl
+         mov      cl, ecx
+        mov     ebp, ebx 
+         mov   edi, cl
+        inc     edi
+         shr     ebp, 2
+
+        test    eax, 0xffff
+        jnz     near .loop
+
+.hdone: pop     ebx                     ;; restore register variables
+        pop     edi
+        pop     esi
+        pop     ebp                     ;; restore caller's stack frame pointer
+        ret
+
+
+SECTION .data
+
+obelix          dd      0
+etaussi         dd      0
+
+SECTION CODE_SEG
+
+cglobal R_DrawSpan_8_old
+R_DrawSpan_8_old:
+        push    ebp                     ;; preserve caller's stack frame pointer
+        push    esi                     ;; preserve register variables
+        push    edi
+        push    ebx
+;;
+;; find loop count
+;;
+        mov     eax,ds_x2
+        inc     eax
+        sub     eax,ds_x1             ;; pixel count
+        mov     pixelcount,eax        ;; save for final pixel
+        js near .hdone                  ;; nothing to scale
+        shr     eax,0x1                 ;; double pixel count
+        mov     loopcount,eax
+;;
+;; build composite position
+;;
+        mov     ebp,ds_xfrac
+        shl     ebp,10
+        and     ebp,0xffff0000
+        mov     eax,ds_yfrac
+        shr     eax,6
+        and     eax,0xffff
+        mov     edi,ds_y
+        or      ebp,eax
+
+        mov     esi,ds_source
+;;
+;; calculate screen dest
+;;
+        mov     edi,ylookup+edi*4
+        mov     eax,ds_x1
+        add     edi,columnofs+eax*4
+;;
+;; build composite step
+;;
+        mov     ebx,ds_xstep
+        shl     ebx,10
+        and     ebx,0xffff0000
+        mov     eax,ds_ystep
+        shr     eax,6
+        and     eax,0xffff
+        or      ebx,eax
+
+        mov     obelix,ebx
+        mov     etaussi,esi
+
+;; %eax      aligned colormap
+;; %ebx      aligned colormap
+;; %ecx,%edx  scratch
+;; %esi      virtual source
+;; %edi      moving destination pointer
+;; %ebp      frac
+
+        mov     eax,ds_colormap
+        mov     ecx,ebp
+        add     ebp,ebx                 ;; advance frac pointer
+        shr     cx,10
+        rol     ecx,6
+        and     ecx,4095                ;; finish calculation for third pixel
+        mov     edx,ebp
+        shr     dx,10
+        rol     edx,6
+        add     ebp,ebx                 ;; advance frac pointer
+        and     edx,4095                ;; finish calculation for fourth pixel
+        mov     ebx,eax
+        mov     al,esi+ecx            ;; get first pixel
+        mov     bl,esi+edx            ;; get second pixel
+
+        test dword pixelcount,0xfffffffe
+
+        mov     dl,eax                ;; color translate first pixel
+
+;;      movw    $0xf0f0,%dx             ;;see visplanes start
+
+        je      .hchecklast
+
+        mov     dh,ebx                ;; color translate second pixel
+        mov     esi,loopcount
+align 4
+.hdoubleloop:
+        mov     ecx,ebp
+        shr     cx,10
+        rol     ecx,6
+         add     ebp,obelix            ;; advance frac pointer
+        mov     edi,dx                ;; write first pixel
+         and     ecx,4095                ;; finish calculation for third pixel
+        mov     edx,ebp
+        shr     dx,10
+        rol     edx,6
+         add     ecx,etaussi
+        and     edx,4095                ;; finish calculation for fourth pixel
+         mov     al,ecx                ;; get third pixel
+        add     ebp,obelix            ;; advance frac pointer
+         add     edx,etaussi
+        mov     bl,edx                ;; get fourth pixel
+         mov     dl,eax                ;; color translate third pixel
+        add     edi,byte +0x2           ;; advance to third pixel destination
+         dec     esi                     ;; done with loop?
+        mov     dh,ebx                ;; color translate fourth pixel
+         jne     .hdoubleloop
+;; check for final pixel
+.hchecklast:
+        test dword pixelcount,0x1
+        je      .hdone
+        mov     edi,dl                ;; write final pixel
+.hdone: pop     ebx                     ;; restore register variables
+        pop     edi
+        pop     esi
+        pop     ebp                     ;; restore caller's stack frame pointer
+        ret
+
+
+;; ========================================================================
+;;  Rasterization des segments d'un polygne textur de manire LINEAIRE.
+;;  Il s'agit donc d'interpoler les coordonnes aux bords de la texture en
+;;  mme temps que les abscisses minx/maxx pour chaque ligne.
+;;  L'argument 'dir' indique quels bords de la texture sont interpolés:
+;;    0 : segments associs aux bord SUPERIEUR et INFERIEUR ( TY constant )
+;;    1 : segments associs aux bord GAUCHE    et DROITE    ( TX constant )
+;; ========================================================================
+;;
+;;  void   rasterize_segment_tex( LONG x1, LONG y1, LONG x2, LONG y2, LONG tv1, LONG tv2, LONG tc, LONG dir );
+;;                                   ARG1     ARG2     ARG3     ARG4      ARG5      ARG6     ARG7       ARG8
+;;
+;;  Pour dir = 0, (tv1,tv2) = (tX1,tX2), tc = tY, en effet TY est constant.
+;;
+;;  Pour dir = 1, (tv1,tv2) = (tY1,tY2), tc = tX, en effet TX est constant.
+;;
+;;
+;;  Uses:  extern struct rastery *_rastertab;
+;;
+
+SECTION CODE_SEG write
+
+MINX            EQU    0
+MAXX            EQU    4
+TX1             EQU    8
+TY1             EQU    12
+TX2             EQU    16
+TY2             EQU    20
+RASTERY_SIZEOF  EQU    24
+
+cglobal rasterize_segment_tex
+rasterize_segment_tex:
+        push    ebp
+        mov     ebp,esp
+
+        sub     esp,byte +0x8           ;; alloue les variables locales
+
+        push    ebx
+        push    esi
+        push    edi
+        o16 mov ax,es
+        push    eax
+
+;;        #define DX       ebp-4
+;;        #define TD       ebp-8
+
+        mov     eax,ebp+0xc           ;; y1
+        mov     ebx,ebp+0x14          ;; y2
+        cmp     ebx,eax
+        je near .L_finished             ;; special (y1==y2) segment horizontal, exit!
+
+        jg near .L_rasterize_right
+
+;;rasterize_left:       ;; on rasterize un segment  la GAUCHE du polygne
+
+        mov     ecx,eax
+        sub     ecx,ebx
+        inc     ecx                     ;; y1-y2+1
+
+        mov     eax,RASTERY_SIZEOF
+        mul     ebx                     ;; * y2
+        mov     esi,prastertab
+        add     esi,eax                 ;; point into rastertaby2
+
+        mov     eax,ebp+0x8           ;; ARG1
+        sub     eax,ebp+0x10          ;; ARG3
+        shl     eax,0x10                ;;     ((x1-x2)<<PRE) ...
+        cdq
+        idiv    ecx                     ;; dx =     ...        / (y1-y2+1)
+        mov     ebp-0x4,eax           ;; DX
+
+        mov     eax,ebp+0x18          ;; ARG5
+        sub     eax,ebp+0x1c          ;; ARG6
+        shl     eax,0x10
+        cdq
+        idiv    ecx                     ;;      tdx =((tx1-tx2)<<PRE) / (y1-y2+1)
+        mov     ebp-0x8,eax           ;; idem tdy =((ty1-ty2)<<PRE) / (y1-y2+1)
+
+        mov     eax,ebp+0x10          ;; ARG3
+        shl     eax,0x10                ;; x = x2<<PRE
+
+        mov     ebx,ebp+0x1c          ;; ARG6
+        shl     ebx,0x10                ;; tx = tx2<<PRE    d0
+                                        ;; ty = ty2<<PRE    d1
+        mov     edx,ebp+0x20          ;; ARG7
+        shl     edx,0x10                ;; ty = ty<<PRE     d0
+                                        ;; tx = tx<<PRE     d1
+        push    ebp
+        mov     edi,ebp-0x4           ;; DX
+        cmp     dword ebp+0x24,byte +0x0      ;; ARG8   direction ?
+
+        mov     ebp,ebp-0x8           ;; TD
+        je      .L_rleft_h_loop
+;;
+;; TY varie, TX est constant
+;;
+.L_rleft_v_loop:
+        mov     esi+MINX,eax           ;; rastertaby.minx = x
+          add     ebx,ebp
+        mov     esi+TX1,edx           ;;             .tx1  = tx
+          add     eax,edi
+        mov     esi+TY1,ebx           ;;             .ty1  = ty
+
+        ;;addl    DX, %eax        // x     += dx
+        ;;addl    TD, %ebx        // ty    += tdy
+
+        add     esi,RASTERY_SIZEOF      ;; next raster line into rastertab
+        dec     ecx
+        jne     .L_rleft_v_loop
+        pop     ebp
+        jmp     .L_finished
+;;
+;; TX varie, TY est constant
+;;
+.L_rleft_h_loop:
+        mov     esi+MINX,eax           ;; rastertaby.minx = x
+          add     eax,edi
+        mov     esi+TX1,ebx           ;;             .tx1  = tx
+          add     ebx,ebp
+        mov     esi+TY1,edx           ;;             .ty1  = ty
+
+        ;;addl    DX, %eax        // x     += dx
+        ;;addl    TD, %ebx        // tx    += tdx
+
+        add     esi,RASTERY_SIZEOF      ;; next raster line into rastertab
+        dec     ecx
+        jne     .L_rleft_h_loop
+        pop     ebp
+        jmp     .L_finished
+;;
+;; on rasterize un segment  la DROITE du polygne
+;;
+.L_rasterize_right:
+        mov     ecx,ebx
+        sub     ecx,eax
+        inc     ecx                     ;; y2-y1+1
+
+        mov     ebx,RASTERY_SIZEOF
+        mul     ebx                     ;;   * y1
+        mov     esi,prastertab
+        add     esi,eax                 ;;  point into rastertaby1
+
+        mov     eax,ebp+0x10          ;; ARG3
+        sub     eax,ebp+0x8           ;; ARG1
+        shl     eax,0x10                ;; ((x2-x1)<<PRE) ...
+        cdq
+        idiv    ecx                     ;;  dx =     ...        / (y2-y1+1)
+        mov     ebp-0x4,eax           ;; DX
+
+        mov     eax,ebp+0x1c          ;; ARG6
+        sub     eax,ebp+0x18          ;; ARG5
+        shl     eax,0x10
+        cdq
+        idiv    ecx                     ;;       tdx =((tx2-tx1)<<PRE) / (y2-y1+1)
+        mov     ebp-0x8,eax           ;;  idem tdy =((ty2-ty1)<<PRE) / (y2-y1+1)
+
+        mov     eax,ebp+0x8           ;; ARG1
+        shl     eax,0x10                ;; x  = x1<<PRE
+
+        mov     ebx,ebp+0x18          ;; ARG5
+        shl     ebx,0x10                ;; tx = tx1<<PRE    d0
+                                        ;; ty = ty1<<PRE    d1
+        mov     edx,ebp+0x20          ;; ARG7
+        shl     edx,0x10                ;; ty = ty<<PRE     d0
+                                        ;; tx = tx<<PRE     d1
+        push    ebp
+        mov     edi,ebp-0x4           ;; DX
+
+        cmp     dword ebp+0x24, 0     ;; direction ?
+
+         mov     ebp,ebp-0x8          ;; TD
+        je      .L_rright_h_loop
+;;
+;; TY varie, TX est constant
+;;
+.L_rright_v_loop:
+
+        mov     esi+MAXX,eax           ;; rastertaby.maxx = x
+          add     ebx,ebp
+        mov     esi+TX2,edx          ;;             .tx2  = tx
+          add     eax,edi
+        mov     esi+TY2,ebx          ;;             .ty2  = ty
+
+        ;;addl    DX, %eax        // x     += dx
+        ;;addl    TD, %ebx        // ty    += tdy
+
+        add     esi,RASTERY_SIZEOF
+        dec     ecx
+        jne     .L_rright_v_loop
+
+        pop     ebp
+
+        jmp     short .L_finished
+;;
+;; TX varie, TY est constant
+;;
+.L_rright_h_loop:
+        mov     esi+MAXX,eax           ;; rastertaby.maxx = x
+          add     eax,edi
+        mov     esi+TX2,ebx          ;;             .tx2  = tx
+          add     ebx,ebp
+        mov     esi+TY2,edx          ;;             .ty2  = ty
+
+        ;;addl    DX, %eax        // x     += dx
+        ;;addl    TD, %ebx        // tx    += tdx
+
+        add     esi,RASTERY_SIZEOF
+        dec     ecx
+        jne     .L_rright_h_loop
+
+        pop     ebp
+
+.L_finished:
+        pop     eax
+        o16 mov es,ax
+        pop     edi
+        pop     esi
+        pop     ebx
+
+        mov     esp,ebp
+        pop     ebp
+        ret
+
+
+;;; this version can draw 64x64 tiles, but they would have to be arranged 4 per row,
+;; so that the stride from one line to the next is 256
+;;
+;; .data
+;;xstep         dd      0
+;;ystep         dd      0
+;;texwidth      dd      64              ;; texture width
+;; .text
+;; this code is kept in case we add high-detail floor textures for example (256x256)
+;       align   16
+;_R_DrawSpan_8:
+;       push ebp                        ;; preserve caller's stack frame pointer
+;       push esi                        ;; preserve register variables
+;       push edi
+;       push ebx
+;;
+;; find loop count
+;;
+;       mov eax,ds_x2
+;       inc eax
+;       sub eax,ds_x1                 ;; pixel count
+;       mov pixelcount,eax            ;; save for final pixel
+;       js near .hdone                  ;; nothing to scale
+;;
+;; calculate screen dest
+;;
+;       mov edi,ds_y
+;       mov edi,ylookup+edi*4
+;       mov eax,ds_x1
+;       add edi,columnofs+eax*4
+;;
+;; prepare registers for inner loop
+;;
+;       xor eax,eax
+;       mov edx,ds_xfrac
+;       ror edx,16
+;       mov al,dl
+;       mov ecx,ds_yfrac
+;       ror ecx,16
+;       mov ah,cl
+;
+;       mov ebx,ds_xstep
+;       ror ebx,16
+;       mov ch,bl
+;       and ebx,0xffff0000
+;       mov xstep,ebx
+;       mov ebx,ds_ystep
+;       ror ebx,16
+;       mov dh,bl
+;       and ebx,0xffff0000
+;       mov ystep,ebx
+;
+;       mov esi,ds_source
+;
+;;; %eax      Yi,Xi in %ah,%al
+;;; %ebx      aligned colormap
+;;; %ecx      Yfrac upper, dXi in %ch, %cl is counter (upto 1024pels, =4x256)
+;;; %edx      Xfrac upper, dYi in %dh, %dl receives mapped pixels from (ebx)
+;;;  ystep    dYfrac, add to %ecx, low word is 0
+;;;  xstep    dXfrac, add to %edx, low word is 0
+;;; %ebp      temporary register serves as offset like %eax
+;;; %esi      virtual source
+;;; %edi      moving destination pointer
+;
+;       mov ebx,pixelcount
+;       shr ebx,0x2                     ;; 4 pixels per loop
+;       test bl,0xff
+;       je near .hchecklast
+;       mov cl,bl
+;
+;       mov ebx,dc_colormap
+;;;
+;;; prepare loop with first pixel
+;;;
+;       add ecx,ystep                 ;;pra1
+;       adc ah,dh
+;       add edx,xstep
+;       adc al,ch
+;       and eax,0x3f3f
+;       mov bl,esi+eax                ;;prb1
+;       mov dl,ebx                    ;;prc1
+;
+;       add ecx,ystep                 ;;a2
+;        adc ah,dh
+;
+;.hdoubleloop:
+;       mov edi+1,dl
+;        add edx,xstep
+;       adc al,ch
+;        add edi,byte +0x2
+;       mov ebp,eax
+;        add ecx,ystep
+;       adc ah,dh
+;        and ebp,0x3f3f
+;       add edx,xstep
+;        mov bl,esi+ebp
+;       adc al,ch
+;        mov dl,ebx
+;       and eax,0x3f3f
+;        mov edi,dl
+;       mov bl,esi+eax
+;        add ecx,ystep
+;       adc ah,dh
+;        add edx,xstep
+;       adc al,ch
+;        mov dl,ebx
+;       mov ebp,eax
+;        mov edi+1,dl
+;       and ebp,0x3f3f
+;        add ecx,ystep
+;       adc ah,dh
+;        mov bl,esi+ebp
+;       add edi,byte +0x2
+;        add edx,xstep
+;       adc al,ch
+;        mov dl,ebx
+;       and eax,0x3f3f
+;        mov edi,dl
+;       mov bl,esi+eax
+;        add ecx,ystep
+;       adc ah,dh
+;        mov dl,ebx
+;       dec cl
+;        jne near .hdoubleloop
+;;; check for final pixel
+;.hchecklast:
+;;; to do
+;.hdone:
+;       pop ebx
+;       pop edi
+;       pop esi
+;       pop ebp
+;       ret

_service:tar_scm:nasm-2.16.03.tar.xz/test/uscore.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/utf.asm Added

@@ -0,0 +1,82 @@
+;Testname=test;  Arguments=-fbin -outf.bin;         Files=stdout stderr utf.bin
+;Testname=error; Arguments=-fbin -outf.bin -DERROR; Files=stdout stderr utf.bin
+%define u(x) __utf16__(x)
+%define w(x) __utf32__(x)
+%define ul(x) __utf16le__(x)
+%define wl(x) __utf32le__(x)
+%define ub(x) __utf16be__(x)
+%define wb(x) __utf32be__(x)
+
+	db `Test \u306a\U0001abcd\n`
+	dw u(`Test \u306a\U0001abcd\n`)
+	dd w(`Test \u306a\U0001abcd\n`)
+
+	db `\u306a`
+	db `\xe3\x81\xaa`
+
+	dw __utf16__ "Hello, World!"
+
+	nop
+
+	mov ax,u(`a`)
+	mov bx,u(`\u306a`)
+	mov cx,u(`\xe3\x81\xaa`)
+	mov eax,u(`ab`)
+	mov ebx,u(`\U0001abcd`)
+	mov ecx,w(`\U0001abcd`)
+
+	db `Test \u306a\U0001abcd\n`
+	dw ul(`Test \u306a\U0001abcd\n`)
+	dd wl(`Test \u306a\U0001abcd\n`)
+
+	db `\u306a`
+	db `\xe3\x81\xaa`
+
+	dw __utf16le__ "Hello, World!"
+
+	nop
+
+	mov ax,ul(`a`)
+	mov bx,ul(`\u306a`)
+	mov cx,ul(`\xe3\x81\xaa`)
+	mov eax,ul(`ab`)
+	mov ebx,ul(`\U0001abcd`)
+	mov ecx,wl(`\U0001abcd`)
+	
+	db `Test \u306a\U0001abcd\n`
+	dw ub(`Test \u306a\U0001abcd\n`)
+	dd wb(`Test \u306a\U0001abcd\n`)
+
+	db `\u306a`
+	db `\xe3\x81\xaa`
+
+	dw __utf16be__ "Hello, World!"
+
+	nop
+
+	mov ax,ub(`a`)
+	mov bx,ub(`\u306a`)
+	mov cx,ub(`\xe3\x81\xaa`)
+	mov eax,ub(`ab`)
+	mov ebx,ub(`\U0001abcd`)
+	mov ecx,wb(`\U0001abcd`)
+
+%ifdef ERROR
+	dw __utf16__ 33
+	dw __utf16__, 46
+	dw __utf16__("Hello, World!",16)
+	dw __utf16__("Hello, World!",16
+	dw u(`\xff`)
+
+	dw __utf16le__ 33
+	dw __utf16le__, 46
+	dw __utf16le__("Hello, World!",16)
+	dw __utf16le__("Hello, World!",16
+	dw ul(`\xff`)
+
+	dw __utf16be__ 33
+	dw __utf16be__, 46
+	dw __utf16be__("Hello, World!",16)
+	dw __utf16be__("Hello, World!",16
+	dw ub(`\xff`)
+%endif

_service:tar_scm:nasm-2.16.03.tar.xz/test/v4.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/vaesenc.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/vex.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/vgather.asm Added

@@ -0,0 +1,76 @@
+	bits 64
+
+	vgatherdpd xmm0,rcx+xmm2,xmm3
+	vgatherqpd xmm0,rcx+xmm2,xmm3
+	vgatherdpd ymm0,rcx+xmm2,ymm3
+	vgatherqpd ymm0,rcx+ymm2,ymm3
+
+	vgatherdpd xmm0,rcx+xmm2*1,xmm3
+	vgatherqpd xmm0,rcx+xmm2*1,xmm3
+	vgatherdpd ymm0,rcx+xmm2*1,ymm3
+	vgatherqpd ymm0,rcx+ymm2*1,ymm3
+
+	vgatherdpd xmm0,rcx+xmm2*2,xmm3
+	vgatherqpd xmm0,rcx+xmm2*2,xmm3
+	vgatherdpd ymm0,rcx+xmm2*2,ymm3
+	vgatherqpd ymm0,rcx+ymm2*2,ymm3
+
+	vgatherdpd xmm0,rcx+xmm2*4,xmm3
+	vgatherqpd xmm0,rcx+xmm2*4,xmm3
+	vgatherdpd ymm0,rcx+xmm2*4,ymm3
+	vgatherqpd ymm0,rcx+ymm2*4,ymm3
+
+	vgatherdpd xmm0,rcx+xmm2*8,xmm3
+	vgatherqpd xmm0,rcx+xmm2*8,xmm3
+	vgatherdpd ymm0,rcx+xmm2*8,ymm3
+	vgatherqpd ymm0,rcx+ymm2*8,ymm3
+
+	vgatherdpd xmm0,xmm2,xmm3
+	vgatherqpd xmm0,xmm2,xmm3
+	vgatherdpd ymm0,xmm2,ymm3
+	vgatherqpd ymm0,ymm2,ymm3
+
+	vgatherdpd xmm0,xmm2*1,xmm3
+	vgatherqpd xmm0,xmm2*1,xmm3
+	vgatherdpd ymm0,xmm2*1,ymm3
+	vgatherqpd ymm0,ymm2*1,ymm3
+
+	vgatherdpd xmm0,xmm2*2,xmm3
+	vgatherqpd xmm0,xmm2*2,xmm3
+	vgatherdpd ymm0,xmm2*2,ymm3
+	vgatherqpd ymm0,ymm2*2,ymm3
+
+	vgatherdpd xmm0,xmm2*4,xmm3
+	vgatherqpd xmm0,xmm2*4,xmm3
+	vgatherdpd ymm0,xmm2*4,ymm3
+	vgatherqpd ymm0,ymm2*4,ymm3
+
+	vgatherdpd xmm0,xmm2*8,xmm3
+	vgatherqpd xmm0,xmm2*8,xmm3
+	vgatherdpd ymm0,xmm2*8,ymm3
+	vgatherqpd ymm0,ymm2*8,ymm3
+
+	vgatherdpd xmm0,xmm2+rcx,xmm3
+	vgatherqpd xmm0,xmm2+rcx,xmm3
+	vgatherdpd ymm0,xmm2+rcx,ymm3
+	vgatherqpd ymm0,ymm2+rcx,ymm3
+
+	vgatherdpd xmm0,xmm2*1+rcx,xmm3
+	vgatherqpd xmm0,xmm2*1+rcx,xmm3
+	vgatherdpd ymm0,xmm2*1+rcx,ymm3
+	vgatherqpd ymm0,ymm2*1+rcx,ymm3
+
+	vgatherdpd xmm0,xmm2*2+rcx,xmm3
+	vgatherqpd xmm0,xmm2*2+rcx,xmm3
+	vgatherdpd ymm0,xmm2*2+rcx,ymm3
+	vgatherqpd ymm0,ymm2*2+rcx,ymm3
+
+	vgatherdpd xmm0,xmm2*4+rcx,xmm3
+	vgatherqpd xmm0,xmm2*4+rcx,xmm3
+	vgatherdpd ymm0,xmm2*4+rcx,ymm3
+	vgatherqpd ymm0,ymm2*4+rcx,ymm3
+
+	vgatherdpd xmm0,xmm2*8+rcx,xmm3
+	vgatherqpd xmm0,xmm2*8+rcx,xmm3
+	vgatherdpd ymm0,xmm2*8+rcx,ymm3
+	vgatherqpd ymm0,ymm2*8+rcx,ymm3

_service:tar_scm:nasm-2.16.03.tar.xz/test/vmread.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/vpcmp.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/warnstack.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/weirdpaste.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/winalign.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/xchg.asm Added

@@ -0,0 +1,96 @@
+;Testname=unoptimized; Arguments=-fbin -oxchg.bin -O0; Files=stdout stderr xchg.bin
+;Testname=optimized;   Arguments=-fbin -oxchg.bin -Ox; Files=stdout stderr xchg.bin
+
+%macro x 2
+	xchg %1,%2
+	xchg %2,%1
+%endmacro
+
+	bits 16
+	
+	x ax,ax
+	x ax,cx
+	x ax,dx
+	x ax,bx
+	x ax,sp
+	x ax,bp
+	x ax,si
+	x ax,di
+	x eax,eax
+	x eax,ecx
+	x eax,edx
+	x eax,ebx
+	x eax,esp
+	x eax,ebp
+	x eax,esi
+	x eax,edi
+
+	bits 32
+	
+	x ax,ax
+	x ax,cx
+	x ax,dx
+	x ax,bx
+	x ax,sp
+	x ax,bp
+	x ax,si
+	x ax,di
+	x eax,eax
+	x eax,ecx
+	x eax,edx
+	x eax,ebx
+	x eax,esp
+	x eax,ebp
+	x eax,esi
+	x eax,edi
+
+	bits 64
+	
+	x ax,ax
+	x ax,cx
+	x ax,dx
+	x ax,bx
+	x ax,sp
+	x ax,bp
+	x ax,si
+	x ax,di
+	x ax,r8w
+	x ax,r9w
+	x ax,r10w
+	x ax,r11w
+	x ax,r12w
+	x ax,r13w
+	x ax,r14w
+	x ax,r15w
+	x eax,eax
+	x eax,ecx
+	x eax,edx
+	x eax,ebx
+	x eax,esp
+	x eax,ebp
+	x eax,esi
+	x eax,edi
+	x eax,r8d
+	x eax,r9d
+	x eax,r10d
+	x eax,r11d
+	x eax,r12d
+	x eax,r13d
+	x eax,r14d
+	x eax,r15d
+	x rax,rax
+	x rax,rcx
+	x rax,rdx
+	x rax,rbx
+	x rax,rsp
+	x rax,rbp
+	x rax,rsi
+	x rax,rdi
+	x rax,r8
+	x rax,r9
+	x rax,r10
+	x rax,r11
+	x rax,r12
+	x rax,r13
+	x rax,r14
+	x rax,r15

_service:tar_scm:nasm-2.16.03.tar.xz/test/xcrypt.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/xdefine.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/xmm0.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/xpaste.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/test/zerobyte.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/tools Added

_service:tar_scm:nasm-2.16.03.tar.xz/tools/Nindent Added

_service:tar_scm:nasm-2.16.03.tar.xz/tools/cleanfile Added

@@ -0,0 +1,176 @@
+#!/usr/bin/perl -w
+#
+# Clean a text file -- or directory of text files -- of stealth whitespace.
+# WARNING: this can be a highly destructive operation.  Use with caution.
+#
+
+use bytes;
+use File::Basename;
+
+# Default options
+$max_width = 79;
+
+# Clean up space-tab sequences, either by removing spaces or
+# replacing them with tabs.
+sub clean_space_tabs($)
+{
+    no bytes;			# Tab alignment depends on characters
+
+    my($li) = @_;
+    my($lo) = '';
+    my $pos = 0;
+    my $nsp = 0;
+    my($i, $c);
+
+    for ($i = 0; $i < length($li); $i++) {
+	$c = substr($li, $i, 1);
+	if ($c eq "\t") {
+	    my $npos = ($pos+$nsp+8) & ~7;
+	    my $ntab = ($npos >> 3) - ($pos >> 3);
+	    $lo .= "\t" x $ntab;
+	    $pos = $npos;
+	    $nsp = 0;
+	} elsif ($c eq "\n" || $c eq "\r") {
+	    $lo .= " " x $nsp;
+	    $pos += $nsp;
+	    $nsp = 0;
+	    $lo .= $c;
+	    $pos = 0;
+	} elsif ($c eq " ") {
+	    $nsp++;
+	} else {
+	    $lo .= " " x $nsp;
+	    $pos += $nsp;
+	    $nsp = 0;
+	    $lo .= $c;
+	    $pos++;
+	}
+    }
+    $lo .= " " x $nsp;
+    return $lo;
+}
+
+# Compute the visual width of a string
+sub strwidth($) {
+    no bytes;			# Tab alignment depends on characters
+
+    my($li) = @_;
+    my($c, $i);
+    my $pos = 0;
+    my $mlen = 0;
+
+    for ($i = 0; $i < length($li); $i++) {
+	$c = substr($li,$i,1);
+	if ($c eq "\t") {
+	    $pos = ($pos+8) & ~7;
+	} elsif ($c eq "\n") {
+	    $mlen = $pos if ($pos > $mlen);
+	    $pos = 0;
+	} else {
+	    $pos++;
+	}
+    }
+
+    $mlen = $pos if ($pos > $mlen);
+    return $mlen;
+}
+
+$name = basename($0);
+
+@files = ();
+
+while (defined($a = shift(@ARGV))) {
+    if ($a =~ /^-/) {
+	if ($a eq '-width' || $a eq '-w') {
+	    $max_width = shift(@ARGV)+0;
+	} else {
+	    print STDERR "Usage: $name -width # files...\n";
+	    exit 1;
+	}
+    } else {
+	push(@files, $a);
+    }
+}
+
+foreach $f ( @files ) {
+    print STDERR "$name: $f\n";
+
+    if (! -f $f) {
+	print STDERR "$f: not a file\n";
+	next;
+    }
+
+    if (!open(FILE, '+<', $f)) {
+	print STDERR "$name: Cannot open file: $f: $!\n";
+	next;
+    }
+
+    binmode FILE;
+
+    # First, verify that it is not a binary file; consider any file
+    # with a zero byte to be a binary file.  Is there any better, or
+    # additional, heuristic that should be applied?
+    $is_binary = 0;
+
+    while (read(FILE, $data, 65536) > 0) {
+	if ($data =~ /\0/) {
+	    $is_binary = 1;
+	    last;
+	}
+    }
+
+    if ($is_binary) {
+	print STDERR "$name: $f: binary file\n";
+	next;
+    }
+
+    seek(FILE, 0, 0);
+
+    $in_bytes = 0;
+    $out_bytes = 0;
+    $blank_bytes = 0;
+
+    @blanks = ();
+    @lines  = ();
+    $lineno = 0;
+
+    while ( defined($line = <FILE>) ) {
+	$lineno++;
+	$in_bytes += length($line);
+	$line =~ s/ \t\r*$//;		# Remove trailing spaces
+	$line = clean_space_tabs($line);
+
+	if ( $line eq "\n" ) {
+	    push(@blanks, $line);
+	    $blank_bytes += length($line);
+	} else {
+	    push(@lines, @blanks);
+	    $out_bytes += $blank_bytes;
+	    push(@lines, $line);
+	    $out_bytes += length($line);
+	    @blanks = ();
+	    $blank_bytes = 0;
+	}
+
+	$l_width = strwidth($line);
+	if ($max_width && $l_width > $max_width) {
+	    print STDERR
+		"$f:$lineno: line exceeds $max_width characters ($l_width)\n";
+	}
+    }
+
+    # Any blanks at the end of the file are discarded
+
+    if ($in_bytes != $out_bytes) {
+	# Only write to the file if changed
+	seek(FILE, 0, 0);
+	print FILE @lines;
+
+	if ( !defined($where = tell(FILE)) ||
+	     !truncate(FILE, $where) ) {
+	    die "$name: Failed to truncate modified file: $f: $!\n";
+	}
+    }
+
+    close(FILE);
+}

_service:tar_scm:nasm-2.16.03.tar.xz/tools/cleanpatch Added

@@ -0,0 +1,258 @@
+#!/usr/bin/perl -w
+#
+# Clean a patch file -- or directory of patch files -- of stealth whitespace.
+# WARNING: this can be a highly destructive operation.  Use with caution.
+#
+
+use bytes;
+use File::Basename;
+
+# Default options
+$max_width = 79;
+
+# Clean up space-tab sequences, either by removing spaces or
+# replacing them with tabs.
+sub clean_space_tabs($)
+{
+    no bytes;			# Tab alignment depends on characters
+
+    my($li) = @_;
+    my($lo) = '';
+    my $pos = 0;
+    my $nsp = 0;
+    my($i, $c);
+
+    for ($i = 0; $i < length($li); $i++) {
+	$c = substr($li, $i, 1);
+	if ($c eq "\t") {
+	    my $npos = ($pos+$nsp+8) & ~7;
+	    my $ntab = ($npos >> 3) - ($pos >> 3);
+	    $lo .= "\t" x $ntab;
+	    $pos = $npos;
+	    $nsp = 0;
+	} elsif ($c eq "\n" || $c eq "\r") {
+	    $lo .= " " x $nsp;
+	    $pos += $nsp;
+	    $nsp = 0;
+	    $lo .= $c;
+	    $pos = 0;
+	} elsif ($c eq " ") {
+	    $nsp++;
+	} else {
+	    $lo .= " " x $nsp;
+	    $pos += $nsp;
+	    $nsp = 0;
+	    $lo .= $c;
+	    $pos++;
+	}
+    }
+    $lo .= " " x $nsp;
+    return $lo;
+}
+
+# Compute the visual width of a string
+sub strwidth($) {
+    no bytes;			# Tab alignment depends on characters
+
+    my($li) = @_;
+    my($c, $i);
+    my $pos = 0;
+    my $mlen = 0;
+
+    for ($i = 0; $i < length($li); $i++) {
+	$c = substr($li,$i,1);
+	if ($c eq "\t") {
+	    $pos = ($pos+8) & ~7;
+	} elsif ($c eq "\n") {
+	    $mlen = $pos if ($pos > $mlen);
+	    $pos = 0;
+	} else {
+	    $pos++;
+	}
+    }
+
+    $mlen = $pos if ($pos > $mlen);
+    return $mlen;
+}
+
+$name = basename($0);
+
+@files = ();
+
+while (defined($a = shift(@ARGV))) {
+    if ($a =~ /^-/) {
+	if ($a eq '-width' || $a eq '-w') {
+	    $max_width = shift(@ARGV)+0;
+	} else {
+	    print STDERR "Usage: $name -width # files...\n";
+	    exit 1;
+	}
+    } else {
+	push(@files, $a);
+    }
+}
+
+foreach $f ( @files ) {
+    print STDERR "$name: $f\n";
+
+    if (! -f $f) {
+	print STDERR "$f: not a file\n";
+	next;
+    }
+
+    if (!open(FILE, '+<', $f)) {
+	print STDERR "$name: Cannot open file: $f: $!\n";
+	next;
+    }
+
+    binmode FILE;
+
+    # First, verify that it is not a binary file; consider any file
+    # with a zero byte to be a binary file.  Is there any better, or
+    # additional, heuristic that should be applied?
+    $is_binary = 0;
+
+    while (read(FILE, $data, 65536) > 0) {
+	if ($data =~ /\0/) {
+	    $is_binary = 1;
+	    last;
+	}
+    }
+
+    if ($is_binary) {
+	print STDERR "$name: $f: binary file\n";
+	next;
+    }
+
+    seek(FILE, 0, 0);
+
+    $in_bytes = 0;
+    $out_bytes = 0;
+    $lineno = 0;
+
+    @lines  = ();
+
+    $in_hunk = 0;
+    $err = 0;
+
+    while ( defined($line = <FILE>) ) {
+	$lineno++;
+	$in_bytes += length($line);
+
+	if (!$in_hunk) {
+	    if ($line =~
+		/^\@\@\s+\-(0-9+),(0-9+)\s+\+(0-9+),(0-9+)\s\@\@/) {
+		$minus_lines = $2;
+		$plus_lines = $4;
+		if ($minus_lines || $plus_lines) {
+		    $in_hunk = 1;
+		    @hunk_lines = ($line);
+		}
+	    } else {
+		push(@lines, $line);
+		$out_bytes += length($line);
+	    }
+	} else {
+	    # We're in a hunk
+
+	    if ($line =~ /^\+/) {
+		$plus_lines--;
+
+		$text = substr($line, 1);
+		$text =~ s/ \t\r*$//;		# Remove trailing spaces
+		$text = clean_space_tabs($text);
+
+		$l_width = strwidth($text);
+		if ($max_width && $l_width > $max_width) {
+		    print STDERR
+			"$f:$lineno: adds line exceeds $max_width ",
+			"characters ($l_width)\n";
+		}
+
+		push(@hunk_lines, '+'.$text);
+	    } elsif ($line =~ /^\-/) {
+		$minus_lines--;
+		push(@hunk_lines, $line);
+	    } elsif ($line =~ /^ /) {
+		$plus_lines--;
+		$minus_lines--;
+		push(@hunk_lines, $line);
+	    } else {
+		print STDERR "$name: $f: malformed patch\n";
+		$err = 1;
+		last;
+	    }
+
+	    if ($plus_lines < 0 || $minus_lines < 0) {
+		print STDERR "$name: $f: malformed patch\n";
+		$err = 1;
+		last;
+	    } elsif ($plus_lines == 0 && $minus_lines == 0) {
+		# End of a hunk.  Process this hunk.
+		my $i;
+		my $l;
+		my @h = ();
+		my $adj = 0;
+		my $done = 0;
+
+		for ($i = scalar(@hunk_lines)-1; $i > 0; $i--) {
+		    $l = $hunk_lines$i;
+		    if (!$done && $l eq "+\n") {
+			$adj++; # Skip this line
+		    } elsif ($l =~ /^ +/) {
+			$done = 1;
+			unshift(@h, $l);
+		    } else {
+			unshift(@h, $l);
+		    }
+		}
+
+		$l = $hunk_lines0;  # Hunk header
+		undef @hunk_lines;    # Free memory
+
+		if ($adj) {
+		    die unless
+			($l =~ /^\@\@\s+\-(0-9+),(0-9+)\s+\+(0-9+),(0-9+)\s\@\@(.*)$/);
+		    my $mstart = $1;
+		    my $mlin = $2;
+		    my $pstart = $3;
+		    my $plin = $4;
+		    my $tail = $5; # doesn't include the final newline
+
+		    $l = sprintf("@@ -%d,%d +%d,%d @@%s\n",
+				 $mstart, $mlin, $pstart, $plin-$adj,
+				 $tail);
+		}
+		unshift(@h, $l);
+
+		# Transfer to the output array
+		foreach $l (@h) {
+		    $out_bytes += length($l);
+		    push(@lines, $l);
+		}
+
+		$in_hunk = 0;
+	    }
+	}
+    }
+
+    if ($in_hunk) {
+	print STDERR "$name: $f: malformed patch\n";
+	$err = 1;
+    }
+
+    if (!$err) {
+	if ($in_bytes != $out_bytes) {
+	    # Only write to the file if changed
+	    seek(FILE, 0, 0);
+	    print FILE @lines;
+
+	    if ( !defined($where = tell(FILE)) ||
+		 !truncate(FILE, $where) ) {
+		die "$name: Failed to truncate modified file: $f: $!\n";
+	    }
+	}
+    }
+
+    close(FILE);
+}

_service:tar_scm:nasm-2.16.03.tar.xz/tools/mkdep.pl Added

@@ -0,0 +1,376 @@
+#!/usr/bin/perl
+## --------------------------------------------------------------------------
+##
+##   Copyright 1996-2024 The NASM Authors - All Rights Reserved
+##   See the file AUTHORS included with the NASM distribution for
+##   the specific copyright holders.
+##
+##   Redistribution and use in source and binary forms, with or without
+##   modification, are permitted provided that the following
+##   conditions are met:
+##
+##   * Redistributions of source code must retain the above copyright
+##     notice, this list of conditions and the following disclaimer.
+##   * Redistributions in binary form must reproduce the above
+##     copyright notice, this list of conditions and the following
+##     disclaimer in the documentation and/or other materials provided
+##     with the distribution.
+##
+##     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+##     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+##     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+##     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+##     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+##     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+##     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+##     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+##     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+##     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+##     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+##     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+##     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+##
+## --------------------------------------------------------------------------
+
+#
+# Script to create Makefile-style dependencies.
+#
+# Usage:
+#   perl mkdep.pl -i-e-m makefile...-M makefile... -- dir...
+#
+
+use strict;
+use integer;
+
+use File::Spec;
+use File::Basename;
+use File::Copy;
+use File::Temp;
+use Fcntl;
+
+my $barrier =
+    "#-- Everything below is generated by mkdep.pl - do not edit --#\n";
+
+# This converts from filenames to full pathnames for our dependencies
+my %dep_path = ();
+
+# List of files that cannot be found; these *must* be excluded
+my @must_exclude = ();
+
+#
+# Variables derived from the command line
+#
+my %deps;
+my %excludes;
+my @files;
+my @mkfiles;
+my $mkmode = 0;
+my @searchdirs = (File::Spec->curdir());
+my %searchdirs = (File::Spec->curdir() => 1);
+my $force_inline = 0;
+my $externalize = 0;
+my $debug = 0;
+
+#
+# Scan files for dependencies
+#
+sub scandeps {
+    # path is the filesystem path, file what the output should call it
+    my($path, $file) = @_;
+    my $line;
+    my %xdeps;
+    my %mdeps;
+
+    open(my $fh, '<', $path)
+	or return;		# If not openable, assume generated
+
+    while ( defined($line = <$fh>) ) {
+	chomp $line;
+	$line =~ s:/\*.*\*/::g;
+	$line =~ s://.*$::;
+	if ( $line =~ /^\s*\#\s*include\s+\"(.*)\"\s*$/ ) {
+	    my $nf = $1;
+	    if (!defined($dep_path{$nf})) {
+		push(@must_exclude, $nf);
+		next;
+	    }
+	    $nf = $dep_path{$nf};
+	    $mdeps{$nf}++;
+	    $xdeps{$nf}++ unless ( defined($deps{$nf}) );
+	}
+    }
+    close($fh);
+    $deps{$file} = keys(%mdeps);
+
+    foreach my $xf ( keys(%xdeps) ) {
+	scandeps($xf);
+    }
+}
+
+# %deps contains direct dependencies.  This subroutine resolves
+# indirect dependencies that result.
+sub alldeps($$) {
+    my($file, $level) = @_;
+    my %adeps;
+
+    foreach my $dep ( @{$deps{$file}} ) {
+	$adeps{$dep} = 1;
+	foreach my $idep ( alldeps($dep, $level+1) ) {
+	    $adeps{$idep} = 1;
+	}
+    }
+    return sort(keys(%adeps));
+}
+
+# This converts a filename from host syntax to target syntax
+# This almost certainly works only on relative filenames...
+sub convert_file($$) {
+    my($file,$sep) = @_;
+
+    if ($file eq '' || $file eq File::Spec->curdir() ||
+	$file eq File::Spec->rootdir()) {
+	return undef;
+    }
+
+    my @fspec = (basename($file));
+    while ( ($file = dirname($file)) ne File::Spec->curdir() &&
+	    $file ne File::Spec->rootdir() ) {
+	unshift(@fspec, basename($file));
+    }
+
+    if ( $sep eq '' ) {
+	# This means kill path completely.  Used with Makes who do
+	# path searches, but doesn't handle output files in subdirectories,
+	# like OpenWatcom WMAKE.
+	return $fspecscalar(@fspec)-1;
+    } else {
+	return join($sep, @fspec);
+    }
+}
+
+#
+# Insert dependencies into a Makefile
+#
+sub insert_deps($) {
+    my($file) = @_;
+
+    open(my $in, '<', $file)
+	or die "$0: Cannot open input: $file\n";
+
+    my ($line, $parm, $val);
+    my $obj = '.o';		# Defaults
+    my $sep = '/';
+    my $cont = "\\";
+    my $include_command = undef;
+    my $selfrule = 0;
+    my $maxline = 78;		# Seems like a reasonable default
+    my %exclude = ();		# Don't exclude anything
+    my @genhdrs = ();
+    my $external = undef;
+    my $raw_output = 0;
+    my @outfile = ();
+    my $is_external = 0;
+
+    while ( defined($line = <$in>) ) {
+	if ( $line =~ /^(^\s\#\$\:+\.h):/ ) {
+	    # Note: we trust the first Makefile given best
+	    my $fpath = $1;
+	    my $fbase = basename($fpath);
+	    if (!defined($dep_path{$fbase})) {
+		$dep_path{$fbase} = $fpath;
+		print STDERR "Makefile: $fbase -> $fpath\n";
+	    }
+	} elsif ( $line =~ /^\s*\#\s*@(a-z0-9-+):\s*\"(^\"*)\"/ ) {
+	    $parm = $1;  $val = $2;
+	    if ( $parm eq 'object-ending' ) {
+		$obj = $val;
+	    } elsif ( $parm eq 'path-separator' ) {
+		$sep = $val;
+	    } elsif ( $parm eq 'line-width' ) {
+		$maxline = $val+0;
+	    } elsif ( $parm eq 'continuation' ) {
+		$cont = $val;
+	    } elsif ( $parm eq 'exclude' ) {
+		$excludes{$val}++;
+	    } elsif ( $parm eq 'include-command' ) {
+		$include_command = $val;
+	    } elsif ( $parm eq 'external' ) {
+		# Keep dependencies in an external file
+		$external = $val;
+	    } elsif ( $parm eq 'selfrule' ) {
+		$selfrule = !!$val;
+	    }
+	} elsif ( $line =~ /^(\s*\#?\s*EXTERNAL_DEPENDENCIES\s*=\s*)(01)\s*$/ ) {
+	    # If this line is not present, we cannot externalize
+	    $is_external = $externalize ? 1 : $force_inline ? 0 : $2+0;
+	    $line = $1.$is_external."\n";
+	} elsif ( $line eq $barrier ) {
+	    last;		# Stop reading at barrier line
+	}
+
+	push @outfile, $line;
+    }
+    close($in);
+
+    $is_external = $is_external && defined($external);
+    if ( !$is_external ) {
+	undef $external;
+	$selfrule = 0;
+    }
+
+    my $out;
+    my $outpath;
+    if ( !$is_external || $externalize ) {
+	$out = File::Temp->new(DIR => dirname($outpath = $file));
+	print $out @outfile;
+    } else {
+	$out = File::Temp->new(DIR => dirname($outpath = $external));
+    }
+
+    print $out $barrier;
+
+    if ( $externalize ) {
+	# Just strip internal file dependency information
+	if (defined($include_command)) {
+	    print $out "$include_command $external\n";
+	}
+	unlink($external);
+    } else {
+	my $e;
+
+	foreach my $dfile ($external, sort(keys(%deps)) ) {
+	    my $ofile;
+	    my @deps;
+
+	    next unless (defined($dfile));
+
+	    if ( $selfrule && $dfile eq $external ) {
+		$ofile = convert_file($dfile, $sep).':';
+		@deps = sort(keys(%deps));
+	    } elsif ( $dfile =~ /^(.*)\.Cc$/ ) {
+		$ofile = convert_file($1, $sep).$obj.':';
+		@deps = ($dfile,alldeps($dfile,1));
+	    }
+
+	    if (defined($ofile)) {
+		my $len = length($ofile);
+		print $out $ofile;
+		foreach my $dep (@deps) {
+		    unless ($excludes{$dep}) {
+			my $str = convert_file($dep, $sep);
+			my $sl = length($str)+1;
+			if ( $len+$sl > $maxline-2 ) {
+			    print $out ' ', $cont, "\n ", $str;
+			    $len = $sl;
+			} else {
+			    print $out ' ', $str;
+			    $len += $sl;
+			}
+		    }
+		}
+		print $out "\n";
+	    }
+	}
+    }
+
+    close($out);
+    move($out->filename, $outpath);
+}
+
+#
+# Main program
+#
+
+while ( defined(my $arg = shift(@ARGV)) ) {
+    if ( $arg eq '-m' ) {
+	$arg = shift(@ARGV);
+	push(@mkfiles, $arg);
+    } elsif ( $arg eq '-s' ) {
+	$arg = shift(@ARGV);
+	push(@searchdirs, $arg);
+    } elsif ( $arg eq '-i' ) {
+	$force_inline = 1;
+    } elsif ( $arg eq '-e' ) {
+	$externalize = 1;
+    } elsif ( $arg eq '-d' ) {
+	$debug++;
+    } elsif ( $arg eq '-M' ) {
+	$mkmode = 1;		# Further filenames are output Makefile names
+    } elsif ( $arg eq '--' && $mkmode ) {
+	$mkmode = 0;
+    } elsif ( $arg =~ /^-/ ) {
+	die "Unknown option: $arg\n";
+    } else {
+	if ( $mkmode ) {
+	    push(@mkfiles, $arg);
+	} else {
+	    push(@files, $arg);
+	}
+    }
+}
+
+sub mycatdir($$) {
+    my($a,$b) = @_;
+    return $b if ($a eq File::Spec->curdir());
+    return $a if ($b eq File::Spec->curdir());
+    return File::Spec->catdir($a,$b);
+}
+
+sub mycatfile($$) {
+    my($d,$f) = @_;
+    return $f if ($d eq File::Spec->curdir());
+    return File::Spec->catfile($d,$f);
+}
+
+my @cfiles = ();
+
+my $err = 0;
+my %scanned;
+
+foreach my $fdir ( @files ) {
+    my $found = 0;
+
+    foreach my $sdir ( @searchdirs ) {
+	my $dir = mycatdir($sdir, $fdir);
+	if ($scanned{$dir}) {
+	    # Have already been here
+	    $found = 1;
+	    next;
+	}
+
+	opendir(DIR, $dir) or next;
+	$scanned{$dir}++;
+	$found++;
+
+	while ( my $file = readdir(DIR) ) {
+	    # $fdir is correct here, because we expect VPATH to do
+	    # its job, and the output filename depends on that, not
+	    # on the full source dir path.
+	    my $path = mycatfile($fdir, $file);
+	    my $fullpath = mycatfile($dir, $file);
+	    if ( $file =~ /\.Cc$/ ) {
+		push(@cfiles, $fullpath, $path);
+	    } elsif ( $file =~ /\.Hh$/ ) {
+		print STDERR "Filesystem: $file -> $path\n" if ( $debug );
+		$dep_path{$file} = $path; # Allow the blank filename
+		$dep_path{$path} = $path; # Also allow the full pathname
+	    }
+	}
+	closedir(DIR);
+    }
+
+    if (!$found) {
+	print STDERR "$0: cannot find directory: $fdir\n";
+	$err++;
+    }
+}
+
+exit(1) if ($err);
+
+foreach my $cfile ( @cfiles ) {
+    scandeps(@$cfile);
+}
+
+foreach my $mkfile ( @mkfiles ) {
+    insert_deps($mkfile);
+}

_service:tar_scm:nasm-2.16.03.tar.xz/tools/release Added

@@ -0,0 +1,109 @@
+#!/bin/bash -xe
+#
+# Generate a NASM release
+#
+# Usage: release version destination
+#
+
+version="$1"
+if  -z "$1" ; then
+    echo "Usage: $0 version destination" 1>&2
+    exit 1
+fi
+
+WHERE="$2"
+if  -z "$WHERE" ; then
+    WHERE=/var/tmp
+fi
+
+if  -n "$GIT_DIR" ; then
+    HERE="$GIT_DIR"
+else
+    HERE=`pwd`
+fi
+
+if  x`cat version` != x"${version}" ; then
+    echo "${version}" > version
+    git update-index version
+    git commit -m "Version ${version}" -- version
+fi
+git tag -m "NASM version ${version}" -f "nasm-${version}"
+
+cd "$WHERE"
+rm -rf nasm-release.*
+work=nasm-release.$$
+mkdir $work
+cd $work
+unset GIT_DIR
+git clone -s -l "$HERE" nasm
+rm -rf nasm/.git nasm/.gitignore
+
+# How to invoke make if makej is not set
+makej="${makej:-make}"
+
+# Create files which are in the release but automatically generated
+cd nasm
+./autogen.sh --clearenv
+./configure --prefix=/usr/local
+$makej dist
+cd ..
+
+# Clean up any previous attempt
+rm -f ../nasm-"$version".tar.gz  ../nasm-"$version"-xdoc.tar.gz
+rm -f ../nasm-"$version".tar.bz2 ../nasm-"$version"-xdoc.tar.bz2
+rm -f ../nasm-"$version".tar.xz  ../nasm-"$version"-xdoc.tar.xz
+rm -f ../nasm-"$version".zip     ../nasm-"$version"-xdoc.zip
+
+# Create tarfile (Unix convention: file includes prefix)
+mv nasm nasm-"$version"
+tar cvvf  nasm-"$version".tar nasm-"$version"
+xz    -9ek nasm-"$version".tar
+bzip2 -9k  nasm-"$version".tar
+gzip  -9   nasm-"$version".tar
+mv nasm-"$version".tar.gz nasm-"$version".tar.bz2 nasm-"$version".tar.xz ..
+
+# Create zipfile (DOS convention: no prefix, convert file endings)
+cd nasm-"$version"
+binext='jpg zip ico png pdf bin o obj exe com a lib xz'
+for e in $binext; do
+    xbin="$xbin -x *.$e -x *.$e.t"
+    ibin="$ibin -i *.$e -i *.$e.t"
+done
+# Text files
+zip -9Dlr ../../nasm-"$version".zip * $xbin
+# Binary files
+zip -9Dgr ../../nasm-"$version".zip * $ibin
+cd ..
+
+# Record what we have already generated
+find nasm-"$version" -not -type d -print > main
+
+# Create documentation
+cd nasm-"$version"
+./configure --prefix=/usr/local
+$makej doc
+# Remove intermediate files.
+$makej cleaner
+cd ..
+
+# Remove non-documentation
+cat main | xargs rm -f
+# Delete empty subdirectories
+find nasm-"$version"/doc -type d -exec rmdir '{}' \; 2>/dev/null || true
+
+# Create doc tarfile (don't include nasmdoc.pdf.xz as it is redundant)
+rm -f nasm-"$version"/doc/*.pdf.xz
+tar cvvf nasm-"$version"-xdoc.tar nasm-"$version"/doc
+xz    -9ek nasm-"$version"-xdoc.tar
+bzip2 -9k  nasm-"$version"-xdoc.tar
+gzip  -9   nasm-"$version"-xdoc.tar
+mv nasm-"$version"-xdoc.tar.gz nasm-"$version"-xdoc.tar.bz2 nasm-"$version"-xdoc.tar.xz ..
+
+# Create doc zipfile (DOS convention: no prefix, convert file endings)
+cd nasm-"$version"
+zip -9Dlr ../../nasm-"$version"-xdoc.zip doc $xbin
+zip -9Dgr ../../nasm-"$version"-xdoc.zip doc $ibin
+
+# Clean up
+cd ../..
+rm -rf "$work"

_service:tar_scm:nasm-2.16.03.tar.xz/tools/syncfiles.pl Added

@@ -0,0 +1,137 @@
+#!/usr/bin/perl
+## --------------------------------------------------------------------------
+##   
+##   Copyright 1996-2009 The NASM Authors - All Rights Reserved
+##   See the file AUTHORS included with the NASM distribution for
+##   the specific copyright holders.
+##
+##   Redistribution and use in source and binary forms, with or without
+##   modification, are permitted provided that the following
+##   conditions are met:
+##
+##   * Redistributions of source code must retain the above copyright
+##     notice, this list of conditions and the following disclaimer.
+##   * Redistributions in binary form must reproduce the above
+##     copyright notice, this list of conditions and the following
+##     disclaimer in the documentation and/or other materials provided
+##     with the distribution.
+##     
+##     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+##     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+##     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+##     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+##     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+##     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+##     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+##     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+##     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+##     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+##     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+##     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+##     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+##
+## --------------------------------------------------------------------------
+
+#
+# Sync the output file list between Makefiles
+# Use the mkdep.pl parameters to get the filename syntax
+#
+# The first file is the source file; the other ones target.
+#
+%def_hints = ('object-ending' => '.o',
+	      'path-separator' => '/',
+	      'continuation' => "\\");
+
+sub do_transform($$) {
+    my($l, $h) = @_;
+    my($ps) = $$h{'path-separator'};
+
+    $l =~ s/\x01/$$h{'object-ending'}/g;
+    $l =~ s/\x03/$$h{'continuation'}/g;
+
+    if ($ps eq '') {
+	# Remove the path separator and the preceding directory
+	$l =~ s/^\s\=*\x02//g;
+    } else {
+	# Convert the path separator
+	$l =~ s/\x02/$ps/g;
+    }
+
+    return $l;
+}
+
+undef %line_lists;
+
+$first = 1;
+$first_file = $ARGV0;
+die unless (defined($first_file));
+
+foreach $file (@ARGV) {
+    open(FILE, '<', $file) or die;
+
+    # First, read the syntax hints
+    %hints = %def_hints;
+    while (defined($line = <FILE>)) {
+	if ( $line =~ /^\s*\#\s*@(a-z0-9-+):\s*\"(^\"*)\"/ ) {
+	    $hints{$1} = $2;
+	}
+    }
+
+    # Read and process the file
+    seek(FILE,0,0);
+    @lines = ();
+    undef $processing;
+    while (defined($line = <FILE>)) {
+	chomp $line;
+	if (defined($processing)) {
+	    if ($line =~ /^\#-- End (^-\#*^-#\s) --\#$/) {
+		if ($1 ne $processing) {
+		    die "$0: $file: Mismatched Begin and End lines (\"$processing\" -> \"$1\"\n";
+		}
+		push(@lines, $line."\n");
+		undef $processing;
+	    } elsif ($first) {
+		my $xl = $line;
+		my $oe = "\Q$hints{'object-ending'}";
+		my $ps = "\Q$hints{'path-separator'}";
+		my $cn = "\Q$hints{'continuation'}";
+
+		$xl =~ s/${oe}(\s|$)/\x01$1/g;
+		$xl =~ s/${ps}/\x02/g;
+		$xl =~ s/${cn}$/\x03/;
+		push(@{$line_lists{$processing}}, $xl);
+		push(@lines, $line);
+	    }
+	} else {
+	    push(@lines, $line."\n");
+	    if ($line =~ '#-- Begin (^-\#*^-#\s) --#') {
+		$processing = $1;
+		if ($first) {
+		    if (defined($line_lists{$processing})) {
+			die "$0: $file: Repeated Begin block: $processing\n";
+		    }
+		    $line_lists{$processing} = ;
+		} elsif (!$first) {
+		    if (!defined($line_lists{$processing})) {
+			die "$0: $file: Begin block without template\n";
+		    }
+		    push(@lines, "# Edit in $first_file, not here!\n");
+		    foreach $l (@{$line_lists{$processing}}) {
+			push(@lines, do_transform($l, \%hints)."\n");
+		    }
+		}
+	    }
+	}
+    }
+    close(FILE);
+
+    # Write the file back out
+    if (!$first) {
+	open(FILE, '>', $file) or die;
+	print FILE @lines;
+	close(FILE);
+    }
+
+    undef @lines;
+    $first = 0;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/tools/tag-release Added

@@ -0,0 +1,58 @@
+#!/bin/sh
+
+version=""
+repo=""
+branch=""
+push=0
+
+for opt; do
+    case "$opt" in
+    --ver=*)
+        version=`echo $opt | sed 's/-a-zA-Z0-9*=//'`
+        ;;
+    --repo=*)
+        repo=`echo $opt | sed 's/-a-zA-Z0-9*=//'`
+        ;;
+    --branch=*)
+        branch=`echo $opt | sed 's/-a-zA-Z0-9*=//'`
+        ;;
+    --push)
+	push=1
+	;;
+    --no-push)
+        push=0
+        ;;
+    -*)
+	echo "Invalid option: $opt" 1>&2
+	exit 1
+	;;
+    *)
+        version=$opt
+        ;;
+    esac
+done
+
+if  -z "$version" ; then
+    echo "  Usage"
+    echo "      $0 --ver=num --repo=name --branch=name --push" 1>&2
+    echo "  Example"
+    echo "      $0 --ver=2.10rc1 --repo=git+ssh://user@repo.or.cz/nasm.git --branch=master --no-push" 1>&2
+    echo "  With --no-push the changes are not pushed out to remote repo"
+    exit 1
+fi
+
+tag="nasm-$version"
+
+echo "$version" > version
+git add version
+git commit -m "NASM $version"
+git tag -a -m "NASM $version" "$tag"
+
+if  $push = 1 ; then
+    set -x
+    git push $repo $branch
+    git push $repo $tag
+    git push --tags $repo
+    set +x
+fi
+

_service:tar_scm:nasm-2.16.03.tar.xz/travis Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/README.md Added

@@ -0,0 +1,166 @@
+Testing NASM
+============
+We use Travis CI(https://travis-ci.org/) service to execute NASM tests,
+which basically prepares the environment and runs our `nasm-t.py` script.
+
+The script scans a testing directory for `*.json` test descriptor files
+and runs test by descriptor content.
+
+Test engine
+-----------
+`nasm-t.py` script is a simple test engine written by Python3 language
+which allows either execute a single test or run them all in a sequence.
+
+A typical test case processed by the following steps:
+
+ - a test descriptor get parsed to figure out which arguments
+   are to be provided into the NASM command line;
+ - invoke the NASM with arguments;
+ - compare generated files with precompiled templates.
+
+`nasm-t.py` supports the following commands:
+
+ - `list`: to list all test cases
+ - `run`: to run test cases
+ - `update`: to update precompiled templates
+
+Use `nasm-t.py -h` command to get the detailed description of every option.
+
+### Test unit structure
+Each test consists at least of three files:
+
+ - a test descriptor in with `*.json` extension;
+ - a source file to compile;
+ - a target file to compare result with, it is assumed to have
+   the same name as output generated during the pass file but with `*.t`
+   extension; thus if a test generates `*.bin` file the appropriate target
+   should have `*.bin.t` name.
+
+Running tests
+-------------
+To run all currently available tests simply type the following
+
+```console
+python3 travis/nasm-t.py run
+```
+
+By default the `nasm-t.py` scans `test` subdirectory for `*.json` files and
+consider each as a test descriptor. Then every test is executed sequentially.
+If the descriptor can not be parsed it silently ignored.
+
+To run a particular test provide the test name, for example
+
+```console
+python3 travis/nasm-t.py list
+...
+./travis/test/utf                Test __utf__ helpers
+./travis/test/utf                Test errors in __utf__ helpers
+...
+python3 travis/nasm-t.py run -t ./travis/test/utf
+```
+
+Test name duplicates in the listing above means that the descriptor
+carries several tests with same name but different options.
+
+Test descriptor file
+--------------------
+A descriptor file should provide enough information how to run the NASM
+itself and which output files or streams to compare with predefined ones.
+We use *JSON* format with the following fields:
+
+ - `description`: a short description of a test which is shown to
+   a user when tests are being listed;
+ - `id`: descriptor internal name to use with `ref` field;
+ - `ref`: a reference to `id` from where settings should be
+   copied, it is convenient when say only `option` is different
+   while the rest of the fields are the same;
+ - `format`: NASM output format to use (`bin`,`elf` and etc);
+ - `source`: is a source file name to compile, this file must
+   be shipped together with descriptor file itself;
+ - `option`: an additional option passed to the command line;
+ - `update`: a trigger to skip updating targets when running
+   an update procedure;
+ - `target`: an array of targets which the test engine should
+   check once compilation finished:
+    - `stderr`: a file containing *stderr* stream output to check;
+    - `stdout`: a file containing *stdout* stream output to check;
+    - `output`: a file containing compiled result to check, in other
+      words it is a name passed as `-o` option to the compiler;
+ - `error`: an error handler, can be either *over* to ignore any
+   error happened, or *expected* to make sure the test is failing.
+
+### Examples
+A simple test where no additional options are used, simply compile
+`absolute.asm` file with `bin` format for output, then compare
+produced `absolute.bin` file with precompiled `absolute.bin.t`.
+
+```json
+{
+	"description": "Check absolute addressing",
+	"format": "bin",
+	"source": "absolute.asm",
+	"target": 
+		{ "output": "absolute.bin" }
+	
+}
+```
+
+Note the `output` target is named as *absolute.bin* where *absolute.bin.t*
+should be already precompiled (we will talk about it in `update` action)
+and present on disk.
+
+A slightly complex example: compile one source file with different optimization
+options and all results must be the same. To not write three descriptors
+we assign `id` to the first one and use `ref` term to copy settings.
+Also, it is expected that `stderr` stream will not be empty but carry some
+warnings to compare.
+
+```json
+
+	{
+		"description": "Check 64-bit addressing (-Ox)",
+		"id": "addr64x",
+		"format": "bin",
+		"source": "addr64x.asm",
+		"option": "-Ox",
+		"target": 
+			{ "output": "addr64x.bin" },
+			{ "stderr": "addr64x.stderr" }
+		
+	},
+	{
+		"description": "Check 64-bit addressing (-O1)",
+		"ref": "addr64x",
+		"option": "-O1",
+		"update": "false"
+	},
+	{
+		"description": "Check 64-bit addressing (-O0)",
+		"ref": "addr64x",
+		"option": "-O0",
+		"update": "false"
+	}
+
+```
+
+Updating tests
+--------------
+If during development some of the targets are expected to change
+the tests will start to fail so the should be updated. Thus new
+precompiled results will be treated as templates to compare with.
+
+To update all tests in one pass run
+
+```console
+python3 travis/nasm-t.py update
+...
+=== Updating ./travis/test/xcrypt ===
+	Processing ./travis/test/xcrypt
+	Executing ./nasm -f bin -o ./travis/test/xcrypt.bin ./travis/test/xcrypt.asm
+	Moving ./travis/test/xcrypt.bin to ./travis/test/xcrypt.bin.t
+=== Test ./travis/test/xcrypt UPDATED ===
+...
+```
+
+and commit the results. To update a particular test provide its name
+with `-t` option.

_service:tar_scm:nasm-2.16.03.tar.xz/travis/nasm-t.py Added

@@ -0,0 +1,562 @@
+#!/usr/bin/python3
+
+import subprocess
+import argparse
+import difflib
+import filecmp
+import fnmatch
+import json
+import sys
+import re
+import os
+
+fmtr_class = argparse.ArgumentDefaultsHelpFormatter
+parser = argparse.ArgumentParser(prog = 'nasm-t.py',
+                                 formatter_class=fmtr_class)
+
+parser.add_argument('-d', '--directory',
+                    dest = 'dir', default = './travis/test',
+                    help = 'Directory with tests')
+
+parser.add_argument('--nasm',
+                    dest = 'nasm', default = './nasm',
+                    help = 'Nasm executable to use')
+
+parser.add_argument('--hexdump',
+                    dest = 'hexdump', default = '/usr/bin/hexdump',
+                    help = 'Hexdump executable to use')
+
+sp = parser.add_subparsers(dest = 'cmd')
+for cmd in 'run':
+    spp = sp.add_parser(cmd, help = 'Run test cases')
+    spp.add_argument('-t', '--test',
+                     dest = 'test',
+                     help = 'Run the selected test only',
+                     required = False)
+
+for cmd in 'new':
+    spp = sp.add_parser(cmd, help = 'Add a new test case')
+    spp.add_argument('--description',
+                     dest = 'description', default = "Description of a test",
+                     help = 'Description of a test',
+                     required = False)
+    spp.add_argument('--id',
+                     dest = 'id',
+                     help = 'Test identifier/name',
+                     required = True)
+    spp.add_argument('--format',
+                     dest = 'format', default = 'bin',
+                     help = 'Output format',
+                     required = False)
+    spp.add_argument('--source',
+                     dest = 'source',
+                     help = 'Source file',
+                     required = False)
+    spp.add_argument('--option',
+                     dest = 'option',
+                     default = '-Ox',
+                     help = 'NASM options',
+                     required = False)
+    spp.add_argument('--ref',
+                     dest = 'ref',
+                     help = 'Test reference',
+                     required = False)
+    spp.add_argument('--error',
+                     dest = 'error',
+                     help = '"y" if test is supposed to fail or "i" to ignore',
+                     required = False)
+    spp.add_argument('--output',
+                     dest = 'output', default = 'y',
+                     help = 'Output (compiled) file name (or "y")',
+                     required = False)
+    spp.add_argument('--stdout',
+                     dest = 'stdout', default = 'y',
+                     help = 'Filename of stdout file (or "y")',
+                     required = False)
+    spp.add_argument('--stderr',
+                     dest = 'stderr', default = 'y',
+                     help = 'Filename of stderr file (or "y")',
+                     required = False)
+
+for cmd in 'list':
+    spp = sp.add_parser(cmd, help = 'List test cases')
+
+for cmd in 'update':
+    spp = sp.add_parser(cmd, help = 'Update test cases with new compiler')
+    spp.add_argument('-t', '--test',
+                     dest = 'test',
+                     help = 'Update the selected test only',
+                     required = False)
+
+map_fmt_ext = {
+        'bin':      '.bin',
+        'elf':      '.o',
+        'elf64':    '.o',
+        'elf32':    '.o',
+        'elfx32':   '.o',
+        'ith':      '.ith',
+        'srec':     '.srec',
+        'obj':      '.obj',
+        'win32':    '.obj',
+        'win64':    '.obj',
+        'coff':     '.obj',
+        'macho':    '.o',
+        'macho32':  '.o',
+        'macho64':  '.o',
+        'aout':     '.out',
+        'aoutb':    '.out',
+        'as86':     '.o',
+        'rdf':      '.rdf',
+}
+
+args = parser.parse_args()
+
+if args.cmd == None:
+    parser.print_help()
+    sys.exit(1)
+
+def read_stdfile(path):
+    with open(path, "rb") as f:
+        data = f.read().decode("utf-8")
+        f.close()
+        return data
+
+#
+# Check if descriptor has mandatory fields
+def is_valid_desc(desc):
+    if desc == None:
+        return False
+    if 'description' not in desc:
+        return False
+    if desc'description' == "":
+        return False
+    return True
+
+#
+# Expand ref/id in descriptors array
+def expand_templates(desc_array):
+    desc_ids = { }
+    for d in desc_array:
+        if 'id' in d:
+            desc_idsd'id' = d
+    for i, d in enumerate(desc_array):
+        if 'ref' in d and d'ref' in desc_ids:
+            ref = desc_idsd'ref'
+            own = d.copy()
+            desc_arrayi = ref.copy()
+            for k, v in own.items():
+                desc_arrayik = v
+            del desc_arrayi'id'
+    return desc_array
+
+def prepare_desc(desc, basedir, name, path):
+    if not is_valid_desc(desc):
+        return False
+    #
+    # Put private fields
+    desc'_base-dir' = basedir
+    desc'_json-file' = name
+    desc'_json-path' = path
+    desc'_test-name' = basedir + os.sep + name:-5
+    #
+    # If no target provided never update
+    if 'target' not in desc:
+        desc'target' = 
+        desc'update' = 'false'
+    #
+    # Which code to expect when nasm finishes
+    desc'_wait' = 0
+    if 'error' in desc:
+        if desc'error' == 'expected':
+            desc'_wait' = 1
+    #
+    # Walk over targets and generate match templates
+    # if were not provided yet
+    for d in desc'target':
+        if 'output' in d and not 'match' in d:
+            d'match' = d'output' + ".t"
+    return True
+
+def read_json(path):
+    desc = None
+    try:
+        with open(path, "rb") as f:
+            try:
+                desc = json.loads(f.read().decode("utf-8"))
+            except:
+                desc = None
+            finally:
+                f.close()
+    except:
+        pass
+    return desc
+
+def read_desc(basedir, name):
+    path = basedir + os.sep + name
+    desc = read_json(path)
+    desc_array = 
+    if type(desc) == dict:
+        if prepare_desc(desc, basedir, name, path) == True:
+            desc_array += desc
+    elif type(desc) == list:
+        expand_templates(desc)
+        for de in desc:
+            if prepare_desc(de, basedir, name, path) == True:
+                desc_array += de
+    return desc_array
+
+def collect_test_desc_from_file(path):
+    if not fnmatch.fnmatch(path, '*.json'):
+        path += '.json'
+    basedir = os.path.dirname(path)
+    filename = os.path.basename(path)
+    return read_desc(basedir, filename)
+
+def collect_test_desc_from_dir(basedir):
+    desc_array = 
+    if os.path.isdir(basedir):
+        for filename in os.listdir(basedir):
+            if os.path.isdir(basedir + os.sep + filename):
+                desc_array += collect_test_desc_from_dir(basedir + os.sep + filename)
+            elif fnmatch.fnmatch(filename, '*.json'):
+                desc = read_desc(basedir, filename)
+                if desc == None:
+                    continue
+                desc_array += desc
+        desc_array.sort(key=lambda x: x'_test-name')
+    return desc_array
+
+if args.cmd == 'list':
+    fmt_entry = '%-32s %s'
+    desc_array = collect_test_desc_from_dir(args.dir)
+    print(fmt_entry % ('Name', 'Description'))
+    for desc in desc_array:
+        print(fmt_entry % (desc'_test-name', desc'description'))
+
+def test_abort(test, message):
+    print("\t%s: %s" % (test, message))
+    print("=== Test %s ABORT ===" % (test))
+    sys.exit(1)
+    return False
+
+def test_fail(test, message):
+    print("\t%s: %s" % (test, message))
+    print("=== Test %s FAIL ===" % (test))
+    return False
+
+def test_skip(test, message):
+    print("\t%s: %s" % (test, message))
+    print("=== Test %s SKIP ===" % (test))
+    return True
+
+def test_over(test):
+    print("=== Test %s ERROR OVER ===" % (test))
+    return True
+
+def test_pass(test):
+    print("=== Test %s PASS ===" % (test))
+    return True
+
+def test_updated(test):
+    print("=== Test %s UPDATED ===" % (test))
+    return True
+
+def run_hexdump(path):
+    p = subprocess.Popen(args.hexdump, "-C", path,
+                         stdout = subprocess.PIPE,
+                         close_fds = True)
+    if p.wait() == 0:
+        return p
+    return None
+
+def show_std(stdname, data):
+    print("\t--- %s" % (stdname))
+    for i in data.split("\n"):
+        print("\t%s" % i)
+    print("\t---")
+
+def cmp_std(from_name, from_data, match_name, match_data):
+    if from_data != match_data:
+        print("\t--- %s" % (from_name))
+        for i in from_data.split("\n"):
+            print("\t%s" % i)
+        print("\t--- %s" % (match_name))
+        for i in match_data.split("\n"):
+            print("\t%s" % i)
+
+        diff = difflib.unified_diff(from_data.split("\n"), match_data.split("\n"),
+                                    fromfile = from_name, tofile = match_name)
+        for i in diff:
+            print("\t%s" % i.strip("\n"))
+        print("\t---")
+        return False
+    return True
+
+def show_diff(test, patha, pathb):
+    pa = run_hexdump(patha)
+    pb = run_hexdump(pathb)
+    if pa == None or pb == None:
+        return test_fail(test, "Can't create dumps")
+    sa = pa.stdout.read().decode("utf-8")
+    sb = pb.stdout.read().decode("utf-8")
+    print("\t--- hexdump %s" % (patha))
+    for i in sa.split("\n"):
+        print("\t%s" % i)
+    print("\t--- hexdump %s" % (pathb))
+    for i in sb.split("\n"):
+        print("\t%s" % i)
+    pa.stdout.close()
+    pb.stdout.close()
+
+    diff = difflib.unified_diff(sa.split("\n"), sb.split("\n"),
+                                fromfile = patha, tofile = pathb)
+    for i in diff:
+        print("\t%s" % i.strip("\n"))
+    print("\t---")
+    return True
+
+def prepare_run_opts(desc):
+    opts = 
+
+    if 'format' in desc:
+        opts += '-f', desc'format'
+    if 'option' in desc:
+        opts += desc'option'.split(" ")
+    for t in desc'target':
+        if 'output' in t:
+            if 'option' in t:
+                opts += t'option'.split(" ") + desc'_base-dir' + os.sep + t'output'
+            else:
+                opts += '-o', desc'_base-dir' + os.sep + t'output'
+        if 'stdout' in t or 'stderr' in t:
+            if 'option' in t:
+                opts += t'option'.split(" ")
+    if 'source' in desc:
+        opts += desc'_base-dir' + os.sep + desc'source'
+    return opts
+
+def exec_nasm(desc):
+    print("\tProcessing %s" % (desc'_test-name'))
+    opts = args.nasm + prepare_run_opts(desc)
+
+    nasm_env = os.environ.copy()
+    nasm_env'NASMENV' = '--reproducible'
+
+    desc_env = desc.get('environ')
+    if desc_env:
+        for i in desc_env:
+            v = i.split('=')
+            if len(v) == 2:
+                nasm_envv0 = v1
+            else:
+                nasm_envv0 = None
+
+    print("\tExecuting %s" % (" ".join(opts)))
+    pnasm = subprocess.Popen(opts,
+                             stdout = subprocess.PIPE,
+                             stderr = subprocess.PIPE,
+                             close_fds = True,
+                             env = nasm_env)
+    if pnasm == None:
+        test_fail(desc'_test-name', "Unable to execute test")
+        return None
+
+    #
+    # FIXME: For now 4M buffer is enough but
+    # better provide reading in a cycle.
+    stderr = pnasm.stderr.read(4194304).decode("utf-8")
+    stdout = pnasm.stdout.read(4194304).decode("utf-8")
+
+    pnasm.stdout.close()
+    pnasm.stderr.close()
+
+    wait_rc = pnasm.wait();
+
+    if desc'_wait' != wait_rc:
+        if stdout != "":
+            show_std("stdout", stdout)
+        if stderr != "":
+            show_std("stderr", stderr)
+        test_fail(desc'_test-name',
+                  "Unexpected ret code: " + str(wait_rc))
+        return None, None, None
+    return pnasm, stdout, stderr
+
+def test_run(desc):
+    print("=== Running %s ===" % (desc'_test-name'))
+
+    if 'disable' in desc:
+        return test_skip(desc'_test-name', desc"disable")
+
+    pnasm, stdout, stderr = exec_nasm(desc)
+    if pnasm == None:
+        return False
+
+    for t in desc'target':
+        if 'output' in t:
+            output = desc'_base-dir' + os.sep + t'output'
+            match = desc'_base-dir' + os.sep + t'match'
+            if desc'_wait' == 1:
+                continue
+            print("\tComparing %s %s" % (output, match))
+            if filecmp.cmp(match, output) == False:
+                show_diff(desc'_test-name', match, output)
+                return test_fail(desc'_test-name', match + " and " + output + " files are different")
+        elif 'stdout' in t:
+            print("\tComparing stdout")
+            match = desc'_base-dir' + os.sep + t'stdout'
+            match_data = read_stdfile(match)
+            if match_data == None:
+                return test_fail(test, "Can't read " + match)
+            if cmp_std(match, match_data, 'stdout', stdout) == False:
+                return test_fail(desc'_test-name', "Stdout mismatch")
+            else:
+                stdout = ""
+        elif 'stderr' in t:
+            print("\tComparing stderr")
+            match = desc'_base-dir' + os.sep + t'stderr'
+            match_data = read_stdfile(match)
+            if match_data == None:
+                return test_fail(test, "Can't read " + match)
+            if cmp_std(match, match_data, 'stderr', stderr) == False:
+                return test_fail(desc'_test-name', "Stderr mismatch")
+            else:
+                stderr = ""
+
+    if stdout != "":
+        show_std("stdout", stdout)
+        return test_fail(desc'_test-name', "Stdout is not empty")
+
+    if stderr != "":
+        show_std("stderr", stderr)
+        return test_fail(desc'_test-name', "Stderr is not empty")
+
+    return test_pass(desc'_test-name')
+
+#
+# Compile sources and generate new targets
+def test_update(desc):
+    print("=== Updating %s ===" % (desc'_test-name'))
+
+    if 'update' in desc and desc'update' == 'false':
+        return test_skip(desc'_test-name', "No output provided")
+    if 'disable' in desc:
+        return test_skip(desc'_test-name', desc"disable")
+
+    pnasm, stdout, stderr = exec_nasm(desc)
+    if pnasm == None:
+        return False
+
+    for t in desc'target':
+        if 'output' in t:
+            output = desc'_base-dir' + os.sep + t'output'
+            match = desc'_base-dir' + os.sep + t'match'
+            print("\tMoving %s to %s" % (output, match))
+            os.rename(output, match)
+        if 'stdout' in t:
+            match = desc'_base-dir' + os.sep + t'stdout'
+            print("\tMoving %s to %s" % ('stdout', match))
+            with open(match, "wb") as f:
+                f.write(stdout.encode("utf-8"))
+                f.close()
+        if 'stderr' in t:
+            match = desc'_base-dir' + os.sep + t'stderr'
+            print("\tMoving %s to %s" % ('stderr', match))
+            with open(match, "wb") as f:
+                f.write(stderr.encode("utf-8"))
+                f.close()
+
+    return test_updated(desc'_test-name')
+
+#
+# Create a new empty test case
+if args.cmd == 'new':
+    #
+    # If no source provided create one
+    # from (ID which is required)
+    if not args.source:
+        args.source = args.id + ".asm"
+
+    #
+    # Emulate "touch" on source file
+    path_asm = args.dir + os.sep + args.source
+    print("\tCreating %s" % (path_asm))
+    open(path_asm, 'a').close()
+
+    #
+    # Fill the test descriptor
+    #
+    # FIXME: We should probably use Jinja
+    path_json = args.dir + os.sep + args.id + ".json"
+    print("\tFilling descriptor %s" % (path_json))
+    with open(path_json, 'wb') as f:
+        f.write("\n\t{\n".encode("utf-8"))
+        acc = 
+        if args.description:
+            acc.append("\t\t\"description\": \"{}\"".format(args.description))
+        acc.append("\t\t\"id\": \"{}\"".format(args.id))
+        if args.format:
+            acc.append("\t\t\"format\": \"{}\"".format(args.format))
+        acc.append("\t\t\"source\": \"{}\"".format(args.source))
+        if args.option:
+            acc.append("\t\t\"option\": \"{}\"".format(args.option))
+        if args.ref:
+            acc.append("\t\t\"ref\": \"{}\"".format(args.ref))
+        if args.error == 'y':
+            acc.append("\t\t\"error\": \"expected\"")
+        elif args.error == 'i':
+            acc.append("\t\t\"error\": \"over\"")
+        f.write(",\n".join(acc).encode("utf-8"))
+        if args.output or args.stdout or args.stderr:
+            acc = 
+            if args.output:
+                if args.output == 'y':
+                    if args.format in map_fmt_ext:
+                        args.output = args.id + map_fmt_extargs.format
+                acc.append("\t\t\t{{ \"output\": \"{}\" }}".format(args.output))
+            if args.stdout:
+                if args.stdout == 'y':
+                    args.stdout = args.id + '.stdout'
+                acc.append("\t\t\t{{ \"stdout\": \"{}\" }}".format(args.stdout))
+            if args.stderr:
+                if args.stderr == 'y':
+                    args.stderr = args.id + '.stderr'
+                acc.append("\t\t\t{{ \"stderr\": \"{}\" }}".format(args.stderr))
+            f.write(",\n".encode("utf-8"))
+            f.write("\t\t\"target\": \n".encode("utf-8"))
+            f.write(",\n".join(acc).encode("utf-8"))
+            f.write("\n\t\t".encode("utf-8"))
+        f.write("\n\t}\n\n".encode("utf-8"))
+        f.close()
+
+if args.cmd == 'run':
+    desc_array = 
+    if args.test == None:
+        desc_array = collect_test_desc_from_dir(args.dir)
+    else:
+        desc_array = collect_test_desc_from_file(args.test)
+        if len(desc_array) == 0:
+            test_abort(args.test, "Can't obtain test descriptors")
+
+    for desc in desc_array:
+        if test_run(desc) == False:
+            if 'error' in desc and desc'error' == 'over':
+                test_over(desc'_test-name')
+            else:
+                test_abort(desc'_test-name', "Error detected")
+
+if args.cmd == 'update':
+    desc_array = 
+    if args.test == None:
+        desc_array = collect_test_desc_from_dir(args.dir)
+    else:
+        desc_array = collect_test_desc_from_file(args.test)
+        if len(desc_array) == 0:
+            test_abort(args.test, "Can't obtain a test descriptors")
+
+    for desc in desc_array:
+        if test_update(desc) == False:
+            if 'error' in desc and desc'error' == 'over':
+                test_over(desc'_test-name')
+            else:
+                test_abort(desc'_test-name', "Error detected")

_service:tar_scm:nasm-2.16.03.tar.xz/travis/t.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/_file_.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/_file_.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/_file_.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/_version.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/_version.stdout Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/a32offs.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/a32offs.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/a32offs.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/a64.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/a64.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/a64.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/absolute.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/absolute.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/absolute.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/addr64x.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/addr64x.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/addr64x.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/addr64x.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/align13.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/align13.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/align13.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/align13s.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/align13s.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/align13s.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/alonesym-obj.asm Added

@@ -0,0 +1,163 @@
+section         DOS32DATA align=16 public use32 FLAT class=DOS32DATA
+
+                global sym0000
+                global sym0001
+                global sym0002
+                global sym0003
+                global sym0004
+                global sym0005
+                global sym0006
+                global sym0007
+                global sym0008
+                global sym0009
+                global sym0010
+                global sym0011
+                global sym0012
+                global sym0013
+                global sym0014
+                global sym0015
+                global sym0016
+                global sym0017
+                global sym0018
+                global sym0019
+                global sym0020
+                global sym0021
+                global sym0022
+                global sym0023
+                global sym0024
+                global sym0025
+                global sym0026
+                global sym0027
+                global sym0028
+                global sym0029
+                global sym0030
+                global sym0031
+                global sym0032
+                global sym0033
+                global sym0034
+                global sym0035
+                global sym0036
+                global sym0037
+                global sym0038
+                global sym0039
+                global sym0040
+                global sym0041
+                global sym0042
+                global sym0043
+                global sym0044
+                global sym0045
+                global sym0046
+                global sym0047
+                global sym0048
+                global sym0049
+                global sym0050
+                global sym0051
+                global sym0052
+                global sym0053
+                global sym0054
+                global sym0055
+                global sym0056
+                global sym0057
+                global sym0058
+                global sym0059
+                global sym0060
+                global sym0061
+                global sym0062
+                global sym0063
+                global sym0064
+                global sym0065
+                global sym0066
+                global sym0067
+                global sym0068
+                global sym0069
+                global sym0070
+                global sym0071
+                global sym0072
+                global sym0073
+                global sym0074
+                global sym0075
+                global sym0076
+                global sym0077
+                global s
+
+
+                resb 20000h
+sym0000         resd 1
+sym0001         resd 1
+sym0002         resd 1
+sym0003         resd 1
+sym0004         resd 1
+sym0005         resd 1
+sym0006         resd 1
+sym0007         resd 1
+sym0008         resd 1
+sym0009         resd 1
+sym0010         resd 1
+sym0011         resd 1
+sym0012         resd 1
+sym0013         resd 1
+sym0014         resd 1
+sym0015         resd 1
+sym0016         resd 1
+sym0017         resd 1
+sym0018         resd 1
+sym0019         resd 1
+sym0020         resd 1
+sym0021         resd 1
+sym0022         resd 1
+sym0023         resd 1
+sym0024         resd 1
+sym0025         resd 1
+sym0026         resd 1
+sym0027         resd 1
+sym0028         resd 1
+sym0029         resd 1
+sym0030         resd 1
+sym0031         resd 1
+sym0032         resd 1
+sym0033         resd 1
+sym0034         resd 1
+sym0035         resd 1
+sym0036         resd 1
+sym0037         resd 1
+sym0038         resd 1
+sym0039         resd 1
+sym0040         resd 1
+sym0041         resd 1
+sym0042         resd 1
+sym0043         resd 1
+sym0044         resd 1
+sym0045         resd 1
+sym0046         resd 1
+sym0047         resd 1
+sym0048         resd 1
+sym0049         resd 1
+sym0050         resd 1
+sym0051         resd 1
+sym0052         resd 1
+sym0053         resd 1
+sym0054         resd 1
+sym0055         resd 1
+sym0056         resd 1
+sym0057         resd 1
+sym0058         resd 1
+sym0059         resd 1
+sym0060         resd 1
+sym0061         resd 1
+sym0062         resd 1
+sym0063         resd 1
+sym0064         resd 1
+sym0065         resd 1
+sym0066         resd 1
+sym0067         resd 1
+sym0068         resd 1
+sym0069         resd 1
+sym0070         resd 1
+sym0071         resd 1
+sym0072         resd 1
+sym0073         resd 1
+sym0074         resd 1
+sym0075         resd 1
+sym0076         resd 1
+sym0077         resd 1
+s               resd 1

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/alonesym-obj.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/alonesym-obj.obj.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/amx.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/amx.bin.t Added

@@ -0,0 +1 @@
+ÄâxI&#x6;ÄâyI&#x7;Äâ{IÀÄâ{K&#x4; Äâ{K&#x4;&#x10;Äâ{K&#x4;PÄâyK&#x4; ÄâyK&#x4;&#x10;ÄâyK&#x4;PÄâz\ÀÄâ{^ÀÄây^ÀÄâz^ÀÄâx^ÀÄâzK&#x4; ÄâzK&#x4;&#x10;ÄâzK&#x4;PÄâxIÀÄâxI&#x6;ÄâyI&#x7;Äâ{IÈÄâ{K&#xc; Äâ{K&#xc;&#x10;Äâ{K&#xc;PÄâyK&#xc; ÄâyK&#xc;&#x10;ÄâyK&#xc;PÄâr\ÉÄâs^ÉÄâq^ÉÄâr^ÉÄâp^ÉÄâzK&#xc; ÄâzK&#xc;&#x10;ÄâzK&#xc;PÄâxIÀÄâxI&#x6;ÄâyI&#x7;Äâ{IÐÄâ{K&#x14; Äâ{K&#x14;&#x10;Äâ{K&#x14;PÄâyK&#x14; ÄâyK&#x14;&#x10;ÄâyK&#x14;PÄâj\ÒÄâk^ÒÄâi^ÒÄâj^ÒÄâh^ÒÄâzK&#x14; ÄâzK&#x14;&#x10;ÄâzK&#x14;PÄâxIÀÄâxI&#x6;ÄâyI&#x7;Äâ{IØÄâ{K&#x1c; Äâ{K&#x1c;&#x10;Äâ{K&#x1c;PÄâyK&#x1c; ÄâyK&#x1c;&#x10;ÄâyK&#x1c;PÄâb\ÛÄâc^ÛÄâa^ÛÄâb^ÛÄâ`^ÛÄâzK&#x1c; ÄâzK&#x1c;&#x10;ÄâzK&#x1c;PÄâxIÀÄâxI&#x6;ÄâyI&#x7;Äâ{IàÄâ{K$ Äâ{K$&#x10;Äâ{K$PÄâyK$ ÄâyK$&#x10;ÄâyK$PÄâZ\äÄâ^äÄâY^äÄâZ^äÄâX^äÄâzK$ ÄâzK$&#x10;ÄâzK$PÄâxIÀÄâxI&#x6;ÄâyI&#x7;Äâ{IèÄâ{K, Äâ{K,&#x10;Äâ{K,PÄâyK, ÄâyK,&#x10;ÄâyK,PÄâR\íÄâS^íÄâQ^íÄâR^íÄâP^íÄâzK, ÄâzK,&#x10;ÄâzK,PÄâxIÀÄâxI&#x6;ÄâyI&#x7;Äâ{IðÄâ{K4 Äâ{K4&#x10;Äâ{K4PÄâyK4 ÄâyK4&#x10;ÄâyK4PÄâJ\öÄâK^öÄâI^öÄâJ^öÄâH^öÄâzK4 ÄâzK4&#x10;ÄâzK4PÄâxIÀÄâxI&#x6;ÄâyI&#x7;Äâ{IøÄâ{K< Äâ{K<&#x10;Äâ{K<PÄâyK< ÄâyK<&#x10;ÄâyK<PÄâB\ÿÄâC^ÿÄâA^ÿÄâB^ÿÄâ@^ÿÄâzK< ÄâzK<&#x10;ÄâzK<PÄâxIÀ
\ No newline at end of file

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/amx.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/andbyte.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/andbyte.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/andbyte.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/aoutso-o0.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/aoutso-ox.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/aoutso.asm Added

@@ -0,0 +1,96 @@
+; test source file for assembling to NetBSD/FreeBSD a.out shared library
+; build with:
+;    nasm -f aoutb aoutso.asm
+;    ld -Bshareable -o aoutso.so aoutso.o
+; test with:
+;    cc -o aoutso aouttest.c aoutso.so
+;    ./aoutso
+
+; This file should test the following:
+; 1 Define and export a global text-section symbol
+; 2 Define and export a global data-section symbol
+; 3 Define and export a global BSS-section symbol
+; 4 Define a non-global text-section symbol
+; 5 Define a non-global data-section symbol
+; 6 Define a non-global BSS-section symbol
+; 7 Define a COMMON symbol
+; 8 Define a NASM local label
+; 9 Reference a NASM local label
+; 10 Import an external symbol
+; 11 Make a PC-relative call to an external symbol
+; 12 Reference a text-section symbol in the text section
+; 13 Reference a data-section symbol in the text section
+; 14 Reference a BSS-section symbol in the text section
+; 15 Reference a text-section symbol in the data section
+; 16 Reference a data-section symbol in the data section
+; 17 Reference a BSS-section symbol in the data section
+
+	  BITS 32
+	  EXTERN __GLOBAL_OFFSET_TABLE_
+	  GLOBAL _lrotate:function ; 1
+	  GLOBAL _greet:function ; 1
+	  GLOBAL _asmstr:data _asmstr.end-_asmstr ; 2
+	  GLOBAL _textptr:data 4 ; 2
+	  GLOBAL _selfptr:data 4 ; 2
+	  GLOBAL _integer:data 4 ; 3
+	  EXTERN _printf	; 10
+	  COMMON _commvar 4	; 7
+
+	  SECTION .text
+
+; prototype: long lrotate(long x, int num);
+_lrotate:			; 1
+	  push ebp
+	  mov ebp,esp
+	  mov eax,ebp+8
+	  mov ecx,ebp+12
+.label	  rol eax,1		; 4 8
+	  loop .label		; 9 12
+	  mov esp,ebp
+	  pop ebp
+	  ret
+
+; prototype: void greet(void);
+_greet	  push ebx		; we'll use EBX for GOT, so save it
+	  call .getgot
+.getgot:  pop ebx
+	  add ebx,__GLOBAL_OFFSET_TABLE_ + $$ - .getgot wrt ..gotpc
+	  mov eax,ebx+_integer wrt ..got ; 14
+	  mov eax,eax
+	  inc eax
+	  mov ebx+localint wrt ..gotoff,eax ; 14
+	  mov eax,ebx+_commvar wrt ..got
+	  push dword eax
+	  mov eax,ebx+localptr wrt ..gotoff ; 13
+	  push dword eax
+	  mov eax,ebx+_integer wrt ..got ; 1 14
+	  push dword eax
+	  lea eax,ebx+_printfstr wrt ..gotoff
+	  push eax		; 13
+	  call _printf wrt ..plt ; 11
+	  add esp,16
+	  pop ebx
+	  ret
+
+	  SECTION .data
+
+; a string
+_asmstr	  db 'hello, world', 0	; 2
+.end
+
+; a string for Printf
+_printfstr db "integer==%d, localint==%d, commvar=%d"
+	  db 10, 0
+
+; some pointers
+localptr  dd localint		; 5 17
+_textptr  dd _greet wrt ..sym	; 15
+_selfptr  dd _selfptr wrt ..sym	; 16
+
+	  SECTION .bss
+
+; an integer
+_integer  resd 1		; 3
+
+; a local integer
+localint  resd 1		; 6

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/aoutso.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/aoutso.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/aouttest-o0.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/aouttest-ox.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/aouttest.asm Added

@@ -0,0 +1,83 @@
+; test source file for assembling to a.out
+; build with:
+;    nasm -f aout aouttest.asm
+;    gcc -o aouttest aouttest.c aouttest.o
+; (assuming your gcc is a.out)
+
+; This file should test the following:
+; 1 Define and export a global text-section symbol
+; 2 Define and export a global data-section symbol
+; 3 Define and export a global BSS-section symbol
+; 4 Define a non-global text-section symbol
+; 5 Define a non-global data-section symbol
+; 6 Define a non-global BSS-section symbol
+; 7 Define a COMMON symbol
+; 8 Define a NASM local label
+; 9 Reference a NASM local label
+; 10 Import an external symbol
+; 11 Make a PC-relative call to an external symbol
+; 12 Reference a text-section symbol in the text section
+; 13 Reference a data-section symbol in the text section
+; 14 Reference a BSS-section symbol in the text section
+; 15 Reference a text-section symbol in the data section
+; 16 Reference a data-section symbol in the data section
+; 17 Reference a BSS-section symbol in the data section
+
+	  BITS 32
+	  GLOBAL _lrotate	; 1
+	  GLOBAL _greet		; 1
+	  GLOBAL _asmstr	; 2
+	  GLOBAL _textptr	; 2
+	  GLOBAL _selfptr	; 2
+	  GLOBAL _integer	; 3
+	  EXTERN _printf	; 10
+	  COMMON _commvar 4	; 7
+
+	  SECTION .text
+
+; prototype: long lrotate(long x, int num);
+_lrotate:			; 1
+	  push ebp
+	  mov ebp,esp
+	  mov eax,ebp+8
+	  mov ecx,ebp+12
+.label	  rol eax,1		; 4 8
+	  loop .label		; 9 12
+	  mov esp,ebp
+	  pop ebp
+	  ret
+
+; prototype: void greet(void);
+_greet	  mov eax,_integer	; 14
+	  inc eax
+	  mov localint,eax	; 14
+	  push dword _commvar
+	  mov eax,localptr	; 13
+	  push dword eax
+	  push dword _integer	; 1 14
+	  push dword _printfstr	; 13
+	  call _printf		; 11
+	  add esp,16
+	  ret
+
+	  SECTION .data
+
+; a string
+_asmstr	  db 'hello, world', 0	; 2
+
+; a string for Printf
+_printfstr db "integer==%d, localint==%d, commvar=%d"
+	  db 10, 0
+
+; some pointers
+localptr  dd localint		; 5 17
+_textptr  dd _greet		; 15
+_selfptr  dd _selfptr		; 16
+
+	  SECTION .bss
+
+; an integer
+_integer  resd 1		; 3
+
+; a local integer
+localint  resd 1		; 6

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/aouttest.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/avx.asm Added

@@ -0,0 +1,45 @@
+		bits 64
+		blendvpd	xmm2,xmm1,xmm0
+
+		vblendvpd	xmm2,xmm1,xmm0,xmm0
+		vblendvpd	xmm2,xmm1,xmm0
+		vblendvpd	ymm2,ymm1,ymm0,ymm0
+		vblendvpd	ymm2,ymm1,ymm0
+
+		vcvtsi2sd	xmm9,xmm10,ecx
+		vcvtsi2sd	xmm9,xmm10,rcx
+		vcvtsi2sd	xmm9,xmm10,dword rdi
+		vcvtsi2sd	xmm9,xmm10,qword rdi
+
+		vpextrb		rax,xmm1,0x33
+		vpextrw		rax,xmm1,0x33
+		vpextrd		rax,xmm1,0x33
+		vpextrq		rax,xmm1,0x33
+		vpextrb		rax,xmm1,0x33
+		vpextrw		rax,xmm1,0x33
+		vpextrd		rax,xmm1,0x33
+		vpextrq		rax,xmm1,0x33
+		vpextrb		eax,xmm1,0x33
+		vpextrw		eax,xmm1,0x33
+		vpextrd		eax,xmm1,0x33
+;		vpextrq		eax,xmm1,0x33
+
+		pextrw		rax,xmm0,0x33
+
+		vcvtpd2ps	xmm0,xmm1
+		vcvtpd2ps	xmm0,oword rsi
+		vcvtpd2ps	xmm0,ymm1
+		vcvtpd2ps	xmm0,yword rsi
+;		vcvtpd2ps	xmm0,rsi
+
+		vcvtpd2dq	xmm0,xmm1
+		vcvtpd2dq	xmm0,oword rsi
+		vcvtpd2dq	xmm0,ymm1
+		vcvtpd2dq	xmm0,yword rsi
+;		vcvtpd2dq	xmm0,rsi
+
+		vcvttpd2dq	xmm0,xmm1
+		vcvttpd2dq	xmm0,oword rsi
+		vcvttpd2dq	xmm0,ymm1
+		vcvttpd2dq	xmm0,yword rsi
+;		vcvttpd2dq	xmm0,rsi

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/avx.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/avx.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/avx005.asm Added

@@ -0,0 +1,527 @@
+%define regxmm xmm0
+%define regymm ymm0
+%define mem 0
+%define imm 3
+
+%macro x 1+.nolist
+ %1 ; comment this line if RELAXed variants are not supported
+%endmacro
+
+  VFMADDSUB132PS regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMADDSUB132PS regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMADDSUB132PS regymm,regymm,mem        ; VEX_FMA,SY
+  VFMADDSUB132PS regymm,regymm,regymm     ; VEX_FMA
+
+x VFMADDSUB312PS regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMADDSUB312PS regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMADDSUB312PS regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMADDSUB312PS regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMADDSUB132PD regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMADDSUB132PD regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMADDSUB132PD regymm,regymm,mem        ; VEX_FMA,SY
+  VFMADDSUB132PD regymm,regymm,regymm     ; VEX_FMA
+
+x VFMADDSUB312PD regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMADDSUB312PD regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMADDSUB312PD regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMADDSUB312PD regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMSUBADD132PS regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMSUBADD132PS regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMSUBADD132PS regymm,regymm,mem        ; VEX_FMA,SY
+  VFMSUBADD132PS regymm,regymm,regymm     ; VEX_FMA
+
+x VFMSUBADD312PS regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMSUBADD312PS regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMSUBADD312PS regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMSUBADD312PS regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMSUBADD132PD regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMSUBADD132PD regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMSUBADD132PD regymm,regymm,mem        ; VEX_FMA,SY
+  VFMSUBADD132PD regymm,regymm,regymm     ; VEX_FMA
+
+x VFMSUBADD312PD regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMSUBADD312PD regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMSUBADD312PD regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMSUBADD312PD regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMADD132PS    regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMADD132PS    regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMADD132PS    regymm,regymm,mem        ; VEX_FMA,SY
+  VFMADD132PS    regymm,regymm,regymm     ; VEX_FMA
+
+x VFMADD312PS    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMADD312PS    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMADD312PS    regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMADD312PS    regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMADD132PD    regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMADD132PD    regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMADD132PD    regymm,regymm,mem        ; VEX_FMA,SY
+  VFMADD132PD    regymm,regymm,regymm     ; VEX_FMA
+
+x VFMADD312PD    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMADD312PD    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMADD312PD    regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMADD312PD    regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMADD132SS    regxmm,regxmm,mem        ; VEX_FMA,SD
+  VFMADD132SS    regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFMADD312SS    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SD
+x VFMADD312SS    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFMADD132SD    regxmm,regxmm,mem        ; VEX_FMA,SQ
+  VFMADD132SD    regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFMADD312SD    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SQ
+x VFMADD312SD    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFMSUB132PS    regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMSUB132PS    regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMSUB132PS    regymm,regymm,mem        ; VEX_FMA,SY
+  VFMSUB132PS    regymm,regymm,regymm     ; VEX_FMA
+
+x VFMSUB312PS    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMSUB312PS    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMSUB312PS    regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMSUB312PS    regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMSUB132PD    regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMSUB132PD    regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMSUB132PD    regymm,regymm,mem        ; VEX_FMA,SY
+  VFMSUB132PD    regymm,regymm,regymm     ; VEX_FMA
+
+x VFMSUB312PD    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMSUB312PD    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMSUB312PD    regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMSUB312PD    regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMSUB132SS    regxmm,regxmm,mem        ; VEX_FMA,SD
+  VFMSUB132SS    regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFMSUB312SS    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SD
+x VFMSUB312SS    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFMSUB132SD    regxmm,regxmm,mem        ; VEX_FMA,SQ
+  VFMSUB132SD    regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFMSUB312SD    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SQ
+x VFMSUB312SD    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFNMADD132PS   regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFNMADD132PS   regxmm,regxmm,regxmm     ; VEX_FMA
+  VFNMADD132PS   regymm,regymm,mem        ; VEX_FMA,SY
+  VFNMADD132PS   regymm,regymm,regymm     ; VEX_FMA
+
+x VFNMADD312PS   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFNMADD312PS   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFNMADD312PS   regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFNMADD312PS   regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFNMADD132PD   regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFNMADD132PD   regxmm,regxmm,regxmm     ; VEX_FMA
+  VFNMADD132PD   regymm,regymm,mem        ; VEX_FMA,SY
+  VFNMADD132PD   regymm,regymm,regymm     ; VEX_FMA
+
+x VFNMADD312PD   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFNMADD312PD   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFNMADD312PD   regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFNMADD312PD   regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFNMADD132SS   regxmm,regxmm,mem        ; VEX_FMA,SD
+  VFNMADD132SS   regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFNMADD312SS   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SD
+x VFNMADD312SS   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFNMADD132SD   regxmm,regxmm,mem        ; VEX_FMA,SQ
+  VFNMADD132SD   regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFNMADD312SD   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SQ
+x VFNMADD312SD   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFNMSUB132PS   regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFNMSUB132PS   regxmm,regxmm,regxmm     ; VEX_FMA
+  VFNMSUB132PS   regymm,regymm,mem        ; VEX_FMA,SY
+  VFNMSUB132PS   regymm,regymm,regymm     ; VEX_FMA
+
+x VFNMSUB312PS   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFNMSUB312PS   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFNMSUB312PS   regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFNMSUB312PS   regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFNMSUB132PD   regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFNMSUB132PD   regxmm,regxmm,regxmm     ; VEX_FMA
+  VFNMSUB132PD   regymm,regymm,mem        ; VEX_FMA,SY
+  VFNMSUB132PD   regymm,regymm,regymm     ; VEX_FMA
+
+x VFNMSUB312PD   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFNMSUB312PD   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFNMSUB312PD   regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFNMSUB312PD   regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFNMSUB132SS   regxmm,regxmm,mem        ; VEX_FMA,SD
+  VFNMSUB132SS   regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFNMSUB312SS   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SD
+x VFNMSUB312SS   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFNMSUB132SD   regxmm,regxmm,mem        ; VEX_FMA,SQ
+  VFNMSUB132SD   regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFNMSUB312SD   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SQ
+x VFNMSUB312SD   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFMADDSUB213PS regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMADDSUB213PS regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMADDSUB213PS regymm,regymm,mem        ; VEX_FMA,SY
+  VFMADDSUB213PS regymm,regymm,regymm     ; VEX_FMA
+
+x VFMADDSUB123PS regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMADDSUB123PS regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMADDSUB123PS regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMADDSUB123PS regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMADDSUB213PD regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMADDSUB213PD regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMADDSUB213PD regymm,regymm,mem        ; VEX_FMA,SY
+  VFMADDSUB213PD regymm,regymm,regymm     ; VEX_FMA
+
+x VFMADDSUB123PD regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMADDSUB123PD regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMADDSUB123PD regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMADDSUB123PD regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMSUBADD213PS regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMSUBADD213PS regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMSUBADD213PS regymm,regymm,mem        ; VEX_FMA,SY
+  VFMSUBADD213PS regymm,regymm,regymm     ; VEX_FMA
+
+x VFMSUBADD123PS regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMSUBADD123PS regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMSUBADD123PS regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMSUBADD123PS regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMSUBADD213PD regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMSUBADD213PD regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMSUBADD213PD regymm,regymm,mem        ; VEX_FMA,SY
+  VFMSUBADD213PD regymm,regymm,regymm     ; VEX_FMA
+
+x VFMSUBADD123PD regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMSUBADD123PD regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMSUBADD123PD regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMSUBADD123PD regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMADD213PS    regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMADD213PS    regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMADD213PS    regymm,regymm,mem        ; VEX_FMA,SY
+  VFMADD213PS    regymm,regymm,regymm     ; VEX_FMA
+
+x VFMADD123PS    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMADD123PS    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMADD123PS    regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMADD123PS    regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMADD213PD    regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMADD213PD    regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMADD213PD    regymm,regymm,mem        ; VEX_FMA,SY
+  VFMADD213PD    regymm,regymm,regymm     ; VEX_FMA
+
+x VFMADD123PD    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMADD123PD    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMADD123PD    regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMADD123PD    regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMADD213SS    regxmm,regxmm,mem        ; VEX_FMA,SD
+  VFMADD213SS    regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFMADD123SS    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SD
+x VFMADD123SS    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFMADD213SD    regxmm,regxmm,mem        ; VEX_FMA,SQ
+  VFMADD213SD    regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFMADD123SD    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SQ
+x VFMADD123SD    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFMSUB213PS    regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMSUB213PS    regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMSUB213PS    regymm,regymm,mem        ; VEX_FMA,SY
+  VFMSUB213PS    regymm,regymm,regymm     ; VEX_FMA
+
+x VFMSUB123PS    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMSUB123PS    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMSUB123PS    regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMSUB123PS    regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMSUB213PD    regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMSUB213PD    regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMSUB213PD    regymm,regymm,mem        ; VEX_FMA,SY
+  VFMSUB213PD    regymm,regymm,regymm     ; VEX_FMA
+
+x VFMSUB123PD    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMSUB123PD    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMSUB123PD    regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMSUB123PD    regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMSUB213SS    regxmm,regxmm,mem        ; VEX_FMA,SD
+  VFMSUB213SS    regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFMSUB123SS    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SD
+x VFMSUB123SS    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFMSUB213SD    regxmm,regxmm,mem        ; VEX_FMA,SQ
+  VFMSUB213SD    regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFMSUB123SD    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SQ
+x VFMSUB123SD    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFNMADD213PS   regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFNMADD213PS   regxmm,regxmm,regxmm     ; VEX_FMA
+  VFNMADD213PS   regymm,regymm,mem        ; VEX_FMA,SY
+  VFNMADD213PS   regymm,regymm,regymm     ; VEX_FMA
+
+x VFNMADD123PS   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFNMADD123PS   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFNMADD123PS   regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFNMADD123PS   regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFNMADD213PD   regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFNMADD213PD   regxmm,regxmm,regxmm     ; VEX_FMA
+  VFNMADD213PD   regymm,regymm,mem        ; VEX_FMA,SY
+  VFNMADD213PD   regymm,regymm,regymm     ; VEX_FMA
+
+x VFNMADD123PD   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFNMADD123PD   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFNMADD123PD   regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFNMADD123PD   regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFNMADD213SS   regxmm,regxmm,mem        ; VEX_FMA,SD
+  VFNMADD213SS   regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFNMADD123SS   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SD
+x VFNMADD123SS   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFNMADD213SD   regxmm,regxmm,mem        ; VEX_FMA,SQ
+  VFNMADD213SD   regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFNMADD123SD   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SQ
+x VFNMADD123SD   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFNMSUB213PS   regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFNMSUB213PS   regxmm,regxmm,regxmm     ; VEX_FMA
+  VFNMSUB213PS   regymm,regymm,mem        ; VEX_FMA,SY
+  VFNMSUB213PS   regymm,regymm,regymm     ; VEX_FMA
+
+x VFNMSUB123PS   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFNMSUB123PS   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFNMSUB123PS   regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFNMSUB123PS   regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFNMSUB213PD   regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFNMSUB213PD   regxmm,regxmm,regxmm     ; VEX_FMA
+  VFNMSUB213PD   regymm,regymm,mem        ; VEX_FMA,SY
+  VFNMSUB213PD   regymm,regymm,regymm     ; VEX_FMA
+
+x VFNMSUB123PD   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFNMSUB123PD   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFNMSUB123PD   regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFNMSUB123PD   regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFNMSUB213SS   regxmm,regxmm,mem        ; VEX_FMA,SD
+  VFNMSUB213SS   regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFNMSUB123SS   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SD
+x VFNMSUB123SS   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFNMSUB213SD   regxmm,regxmm,mem        ; VEX_FMA,SQ
+  VFNMSUB213SD   regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFNMSUB123SD   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SQ
+x VFNMSUB123SD   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFMADDSUB231PS regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMADDSUB231PS regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMADDSUB231PS regymm,regymm,mem        ; VEX_FMA,SY
+  VFMADDSUB231PS regymm,regymm,regymm     ; VEX_FMA
+
+x VFMADDSUB321PS regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMADDSUB321PS regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMADDSUB321PS regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMADDSUB321PS regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMADDSUB231PD regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMADDSUB231PD regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMADDSUB231PD regymm,regymm,mem        ; VEX_FMA,SY
+  VFMADDSUB231PD regymm,regymm,regymm     ; VEX_FMA
+
+x VFMADDSUB321PD regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMADDSUB321PD regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMADDSUB321PD regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMADDSUB321PD regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMSUBADD231PS regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMSUBADD231PS regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMSUBADD231PS regymm,regymm,mem        ; VEX_FMA,SY
+  VFMSUBADD231PS regymm,regymm,regymm     ; VEX_FMA
+
+x VFMSUBADD321PS regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMSUBADD321PS regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMSUBADD321PS regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMSUBADD321PS regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMSUBADD231PD regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMSUBADD231PD regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMSUBADD231PD regymm,regymm,mem        ; VEX_FMA,SY
+  VFMSUBADD231PD regymm,regymm,regymm     ; VEX_FMA
+
+x VFMSUBADD321PD regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMSUBADD321PD regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMSUBADD321PD regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMSUBADD321PD regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMADD231PS    regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMADD231PS    regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMADD231PS    regymm,regymm,mem        ; VEX_FMA,SY
+  VFMADD231PS    regymm,regymm,regymm     ; VEX_FMA
+
+x VFMADD321PS    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMADD321PS    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMADD321PS    regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMADD321PS    regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMADD231PD    regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMADD231PD    regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMADD231PD    regymm,regymm,mem        ; VEX_FMA,SY
+  VFMADD231PD    regymm,regymm,regymm     ; VEX_FMA
+
+x VFMADD321PD    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMADD321PD    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMADD321PD    regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMADD321PD    regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMADD231SS    regxmm,regxmm,mem        ; VEX_FMA,SD
+  VFMADD231SS    regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFMADD321SS    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SD
+x VFMADD321SS    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFMADD231SD    regxmm,regxmm,mem        ; VEX_FMA,SQ
+  VFMADD231SD    regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFMADD321SD    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SQ
+x VFMADD321SD    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFMSUB231PS    regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMSUB231PS    regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMSUB231PS    regymm,regymm,mem        ; VEX_FMA,SY
+  VFMSUB231PS    regymm,regymm,regymm     ; VEX_FMA
+
+x VFMSUB321PS    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMSUB321PS    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMSUB321PS    regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMSUB321PS    regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMSUB231PD    regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFMSUB231PD    regxmm,regxmm,regxmm     ; VEX_FMA
+  VFMSUB231PD    regymm,regymm,mem        ; VEX_FMA,SY
+  VFMSUB231PD    regymm,regymm,regymm     ; VEX_FMA
+
+x VFMSUB321PD    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFMSUB321PD    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFMSUB321PD    regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFMSUB321PD    regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFMSUB231SS    regxmm,regxmm,mem        ; VEX_FMA,SD
+  VFMSUB231SS    regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFMSUB321SS    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SD
+x VFMSUB321SS    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFMSUB231SD    regxmm,regxmm,mem        ; VEX_FMA,SQ
+  VFMSUB231SD    regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFMSUB321SD    regxmm,regxmm,mem        ; VEX_FMA,RELAX,SQ
+x VFMSUB321SD    regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFNMADD231PS   regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFNMADD231PS   regxmm,regxmm,regxmm     ; VEX_FMA
+  VFNMADD231PS   regymm,regymm,mem        ; VEX_FMA,SY
+  VFNMADD231PS   regymm,regymm,regymm     ; VEX_FMA
+
+x VFNMADD321PS   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFNMADD321PS   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFNMADD321PS   regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFNMADD321PS   regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFNMADD231PD   regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFNMADD231PD   regxmm,regxmm,regxmm     ; VEX_FMA
+  VFNMADD231PD   regymm,regymm,mem        ; VEX_FMA,SY
+  VFNMADD231PD   regymm,regymm,regymm     ; VEX_FMA
+
+x VFNMADD321PD   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFNMADD321PD   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFNMADD321PD   regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFNMADD321PD   regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFNMADD231SS   regxmm,regxmm,mem        ; VEX_FMA,SD
+  VFNMADD231SS   regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFNMADD321SS   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SD
+x VFNMADD321SS   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFNMADD231SD   regxmm,regxmm,mem        ; VEX_FMA,SQ
+  VFNMADD231SD   regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFNMADD321SD   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SQ
+x VFNMADD321SD   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFNMSUB231PS   regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFNMSUB231PS   regxmm,regxmm,regxmm     ; VEX_FMA
+  VFNMSUB231PS   regymm,regymm,mem        ; VEX_FMA,SY
+  VFNMSUB231PS   regymm,regymm,regymm     ; VEX_FMA
+
+x VFNMSUB321PS   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFNMSUB321PS   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFNMSUB321PS   regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFNMSUB321PS   regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFNMSUB231PD   regxmm,regxmm,mem        ; VEX_FMA,SO
+  VFNMSUB231PD   regxmm,regxmm,regxmm     ; VEX_FMA
+  VFNMSUB231PD   regymm,regymm,mem        ; VEX_FMA,SY
+  VFNMSUB231PD   regymm,regymm,regymm     ; VEX_FMA
+
+x VFNMSUB321PD   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SO
+x VFNMSUB321PD   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+x VFNMSUB321PD   regymm,regymm,mem        ; VEX_FMA,RELAX,SY
+x VFNMSUB321PD   regymm,regymm,regymm     ; VEX_FMA,RELAX
+
+  VFNMSUB231SS   regxmm,regxmm,mem        ; VEX_FMA,SD
+  VFNMSUB231SS   regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFNMSUB321SS   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SD
+x VFNMSUB321SS   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VFNMSUB231SD   regxmm,regxmm,mem        ; VEX_FMA,SQ
+  VFNMSUB231SD   regxmm,regxmm,regxmm     ; VEX_FMA
+
+x VFNMSUB321SD   regxmm,regxmm,mem        ; VEX_FMA,RELAX,SQ
+x VFNMSUB321SD   regxmm,regxmm,regxmm     ; VEX_FMA,RELAX
+
+  VPCLMULLQLQDQ  regxmm,regxmm,mem        ; PCLMUL,VEX_AVX,SO
+  VPCLMULLQLQDQ  regxmm,regxmm,regxmm     ; PCLMUL,VEX_AVX
+  VPCLMULHQLQDQ  regxmm,regxmm,mem        ; PCLMUL,VEX_AVX,SO
+  VPCLMULHQLQDQ  regxmm,regxmm,regxmm     ; PCLMUL,VEX_AVX
+  VPCLMULLQHQDQ  regxmm,regxmm,mem        ; PCLMUL,VEX_AVX,SO
+  VPCLMULLQHQDQ  regxmm,regxmm,regxmm     ; PCLMUL,VEX_AVX
+  VPCLMULHQHQDQ  regxmm,regxmm,mem        ; PCLMUL,VEX_AVX,SO
+  VPCLMULHQHQDQ  regxmm,regxmm,regxmm     ; PCLMUL,VEX_AVX
+  VPCLMULQDQ     regxmm,regxmm,mem,imm    ; PCLMUL,VEX_AVX,SB3,SO
+  VPCLMULQDQ     regxmm,regxmm,regxmm,imm ; PCLMUL,VEX_AVX,SB3
+
+; EOF
+
+

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/avx005.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/avx005.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/avx2.asm Added

@@ -0,0 +1,1608 @@
+; AVX testcases from gas
+;------------------------
+
+;
+; This file is taken from there
+;     http://sourceware.org/ml/binutils/2011-06/msg00150.html
+; So the original author is "H.J. Lu" <hongjiu dot lu at intel dot com>
+;
+; nasm64developer adopted it for the nasm testing suite
+
+%macro testcase 2
+ %ifdef BIN
+  db %1
+ %endif
+ %ifdef SRC
+  %2
+ %endif
+%endmacro
+
+bits 32
+
+; b/gas/testsuite/gas/i386/avx-gather-intel.d
+testcase	{ 0xc4, 0xe2, 0xe9, 0x92, 0x4c, 0x7d, 0x00			}, { vgatherdpd xmm1,QWORD ebp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0xe9, 0x93, 0x4c, 0x7d, 0x00			}, { vgatherqpd xmm1,QWORD ebp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0xed, 0x92, 0x4c, 0x7d, 0x00			}, { vgatherdpd ymm1,QWORD ebp+xmm7*2+0x0,ymm2	}
+testcase	{ 0xc4, 0xe2, 0xed, 0x93, 0x4c, 0x7d, 0x00			}, { vgatherqpd ymm1,QWORD ebp+ymm7*2+0x0,ymm2	}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0x25, 0x08, 0x00, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm4*1+0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0x25, 0xf8, 0xff, 0xff, 0xff	}, { vgatherdpd ymm6,QWORD xmm4*1-0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0x25, 0x00, 0x00, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm4*1+0x0,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0x25, 0x98, 0x02, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm4*1+0x298,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0xe5, 0x08, 0x00, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm4*8+0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0xe5, 0xf8, 0xff, 0xff, 0xff	}, { vgatherdpd ymm6,QWORD xmm4*8-0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0xe5, 0x00, 0x00, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm4*8+0x0,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0xe5, 0x98, 0x02, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm4*8+0x298,ymm5		}
+testcase	{ 0xc4, 0xe2, 0x69, 0x92, 0x4c, 0x7d, 0x00			}, { vgatherdps xmm1,DWORD ebp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0x69, 0x93, 0x4c, 0x7d, 0x00			}, { vgatherqps xmm1,DWORD ebp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0x6d, 0x92, 0x4c, 0x7d, 0x00			}, { vgatherdps ymm1,DWORD ebp+ymm7*2+0x0,ymm2	}
+testcase	{ 0xc4, 0xe2, 0x6d, 0x93, 0x4c, 0x7d, 0x00			}, { vgatherqps xmm1,DWORD ebp+ymm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0x25, 0x08, 0x00, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm4*1+0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0x25, 0xf8, 0xff, 0xff, 0xff	}, { vgatherdps xmm6,DWORD xmm4*1-0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0x25, 0x00, 0x00, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm4*1+0x0,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0x25, 0x98, 0x02, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm4*1+0x298,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0xe5, 0x08, 0x00, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm4*8+0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0xe5, 0xf8, 0xff, 0xff, 0xff	}, { vgatherdps xmm6,DWORD xmm4*8-0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0xe5, 0x00, 0x00, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm4*8+0x0,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0xe5, 0x98, 0x02, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm4*8+0x298,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x69, 0x90, 0x4c, 0x7d, 0x00			}, { vpgatherdd xmm1,DWORD ebp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0x69, 0x91, 0x4c, 0x7d, 0x00			}, { vpgatherqd xmm1,DWORD ebp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0x6d, 0x90, 0x4c, 0x7d, 0x00			}, { vpgatherdd ymm1,DWORD ebp+ymm7*2+0x0,ymm2	}
+testcase	{ 0xc4, 0xe2, 0x6d, 0x91, 0x4c, 0x7d, 0x00			}, { vpgatherqd xmm1,DWORD ebp+ymm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0x25, 0x08, 0x00, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm4*1+0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0x25, 0xf8, 0xff, 0xff, 0xff	}, { vpgatherdd xmm6,DWORD xmm4*1-0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0x25, 0x00, 0x00, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm4*1+0x0,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0x25, 0x98, 0x02, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm4*1+0x298,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0xe5, 0x08, 0x00, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm4*8+0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0xe5, 0xf8, 0xff, 0xff, 0xff	}, { vpgatherdd xmm6,DWORD xmm4*8-0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0xe5, 0x00, 0x00, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm4*8+0x0,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0xe5, 0x98, 0x02, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm4*8+0x298,xmm5		}
+testcase	{ 0xc4, 0xe2, 0xe9, 0x90, 0x4c, 0x7d, 0x00			}, { vpgatherdq xmm1,QWORD ebp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0xe9, 0x91, 0x4c, 0x7d, 0x00			}, { vpgatherqq xmm1,QWORD ebp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0xed, 0x90, 0x4c, 0x7d, 0x00			}, { vpgatherdq ymm1,QWORD ebp+xmm7*2+0x0,ymm2	}
+testcase	{ 0xc4, 0xe2, 0xed, 0x91, 0x4c, 0x7d, 0x00			}, { vpgatherqq ymm1,QWORD ebp+ymm7*2+0x0,ymm2	}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0x25, 0x08, 0x00, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm4*1+0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0x25, 0xf8, 0xff, 0xff, 0xff	}, { vpgatherdq ymm6,QWORD xmm4*1-0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0x25, 0x00, 0x00, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm4*1+0x0,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0x25, 0x98, 0x02, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm4*1+0x298,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0xe5, 0x08, 0x00, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm4*8+0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0xe5, 0xf8, 0xff, 0xff, 0xff	}, { vpgatherdq ymm6,QWORD xmm4*8-0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0xe5, 0x00, 0x00, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm4*8+0x0,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0xe5, 0x98, 0x02, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm4*8+0x298,ymm5		}
+
+; b/gas/testsuite/gas/i386/avx2-intel.d
+testcase	{ 0xc4, 0xe2, 0x5d, 0x8c, 0x31					}, { vpmaskmovd ymm6,ymm4,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x8e, 0x21					}, { vpmaskmovd YWORD ecx,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe2, 0xdd, 0x8c, 0x31					}, { vpmaskmovq ymm6,ymm4,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x8e, 0x21					}, { vpmaskmovq YWORD ecx,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x01, 0xd6, 0x07				}, { vpermpd ymm2,ymm6,0x7				}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x01, 0x31, 0x07				}, { vpermpd ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x00, 0xd6, 0x07				}, { vpermq ymm2,ymm6,0x7				}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x00, 0x31, 0x07				}, { vpermq ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x36, 0xd4					}, { vpermd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x36, 0x11					}, { vpermd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x16, 0xd4					}, { vpermps ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x16, 0x11					}, { vpermps ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x47, 0xd4					}, { vpsllvd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x47, 0x11					}, { vpsllvd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x47, 0xd4					}, { vpsllvq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x47, 0x11					}, { vpsllvq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x46, 0xd4					}, { vpsravd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x46, 0x11					}, { vpsravd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x45, 0xd4					}, { vpsrlvd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x45, 0x11					}, { vpsrlvd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x45, 0xd4					}, { vpsrlvq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x45, 0x11					}, { vpsrlvq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x2a, 0x21					}, { vmovntdqa ymm4,YWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x19, 0xf4					}, { vbroadcastsd ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x18, 0xf4					}, { vbroadcastss ymm6,xmm4				}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x02, 0xd4, 0x07				}, { vpblendd ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x02, 0x11, 0x07				}, { vpblendd ymm2,ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x46, 0xd4, 0x07				}, { vperm2i128 ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x46, 0x11, 0x07				}, { vperm2i128 ymm2,ymm6,YWORD ecx,0x7		}
+testcase	{ 0xc4, 0xe3, 0x5d, 0x38, 0xf4, 0x07				}, { vinserti128 ymm6,ymm4,xmm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x5d, 0x38, 0x31, 0x07				}, { vinserti128 ymm6,ymm4,OWORD ecx,0x7		}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x5a, 0x21					}, { vbroadcasti128 ymm4,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x47, 0xd4					}, { vpsllvd xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x49, 0x47, 0x39					}, { vpsllvd xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x47, 0xd4					}, { vpsllvq xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x47, 0x39					}, { vpsllvq xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x46, 0xd4					}, { vpsravd xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x49, 0x46, 0x39					}, { vpsravd xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x45, 0xd4					}, { vpsrlvd xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x49, 0x45, 0x39					}, { vpsrlvd xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x45, 0xd4					}, { vpsrlvq xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x45, 0x39					}, { vpsrlvq xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x59, 0x8c, 0x31					}, { vpmaskmovd xmm6,xmm4,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xd9, 0x8c, 0x31					}, { vpmaskmovq xmm6,xmm4,OWORD ecx			}
+testcase	{ 0xc4, 0xe3, 0x7d, 0x39, 0xe6, 0x07				}, { vextracti128 xmm6,ymm4,0x7				}
+testcase	{ 0xc4, 0xe3, 0x7d, 0x39, 0x21, 0x07				}, { vextracti128 OWORD ecx,ymm4,0x7			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x8e, 0x21					}, { vpmaskmovd OWORD ecx,xmm6,xmm4			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x8e, 0x21					}, { vpmaskmovq OWORD ecx,xmm6,xmm4			}
+testcase	{ 0xc4, 0xe3, 0x49, 0x02, 0xd4, 0x07				}, { vpblendd xmm2,xmm6,xmm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x49, 0x02, 0x11, 0x07				}, { vpblendd xmm2,xmm6,OWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x59, 0xf4					}, { vpbroadcastq xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x59, 0x21					}, { vpbroadcastq xmm4,QWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x59, 0xf4					}, { vpbroadcastq ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x59, 0x21					}, { vpbroadcastq ymm4,QWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x58, 0xe4					}, { vpbroadcastd ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x58, 0x21					}, { vpbroadcastd ymm4,DWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x58, 0xf4					}, { vpbroadcastd xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x58, 0x21					}, { vpbroadcastd xmm4,DWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x79, 0xf4					}, { vpbroadcastw xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x79, 0x21					}, { vpbroadcastw xmm4,WORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x79, 0xf4					}, { vpbroadcastw ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x79, 0x21					}, { vpbroadcastw ymm4,WORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x78, 0xf4					}, { vpbroadcastb xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x78, 0x21					}, { vpbroadcastb xmm4,BYTE ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x78, 0xf4					}, { vpbroadcastb ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x78, 0x21					}, { vpbroadcastb ymm4,BYTE ecx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x18, 0xf4					}, { vbroadcastss xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x5d, 0x8c, 0x31					}, { vpmaskmovd ymm6,ymm4,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x8e, 0x21					}, { vpmaskmovd YWORD ecx,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe2, 0x5d, 0x8c, 0x31					}, { vpmaskmovd ymm6,ymm4,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x8e, 0x21					}, { vpmaskmovd YWORD ecx,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe2, 0xdd, 0x8c, 0x31					}, { vpmaskmovq ymm6,ymm4,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x8e, 0x21					}, { vpmaskmovq YWORD ecx,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe2, 0xdd, 0x8c, 0x31					}, { vpmaskmovq ymm6,ymm4,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x8e, 0x21					}, { vpmaskmovq YWORD ecx,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x01, 0xd6, 0x07				}, { vpermpd ymm2,ymm6,0x7				}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x01, 0x31, 0x07				}, { vpermpd ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x01, 0x31, 0x07				}, { vpermpd ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x00, 0xd6, 0x07				}, { vpermq ymm2,ymm6,0x7				}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x00, 0x31, 0x07				}, { vpermq ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x00, 0x31, 0x07				}, { vpermq ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x36, 0xd4					}, { vpermd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x36, 0x11					}, { vpermd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x36, 0x11					}, { vpermd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x16, 0xd4					}, { vpermps ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x16, 0x11					}, { vpermps ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x16, 0x11					}, { vpermps ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x47, 0xd4					}, { vpsllvd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x47, 0x11					}, { vpsllvd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x47, 0x11					}, { vpsllvd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x47, 0xd4					}, { vpsllvq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x47, 0x11					}, { vpsllvq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x47, 0x11					}, { vpsllvq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x46, 0xd4					}, { vpsravd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x46, 0x11					}, { vpsravd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x46, 0x11					}, { vpsravd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x45, 0xd4					}, { vpsrlvd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x45, 0x11					}, { vpsrlvd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x45, 0x11					}, { vpsrlvd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x45, 0xd4					}, { vpsrlvq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x45, 0x11					}, { vpsrlvq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x45, 0x11					}, { vpsrlvq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x2a, 0x21					}, { vmovntdqa ymm4,YWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x2a, 0x21					}, { vmovntdqa ymm4,YWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x19, 0xf4					}, { vbroadcastsd ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x18, 0xf4					}, { vbroadcastss ymm6,xmm4				}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x02, 0xd4, 0x07				}, { vpblendd ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x02, 0x11, 0x07				}, { vpblendd ymm2,ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x02, 0x11, 0x07				}, { vpblendd ymm2,ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x46, 0xd4, 0x07				}, { vperm2i128 ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x46, 0x11, 0x07				}, { vperm2i128 ymm2,ymm6,YWORD ecx,0x7		}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x46, 0x11, 0x07				}, { vperm2i128 ymm2,ymm6,YWORD ecx,0x7		}
+testcase	{ 0xc4, 0xe3, 0x5d, 0x38, 0xf4, 0x07				}, { vinserti128 ymm6,ymm4,xmm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x5d, 0x38, 0x31, 0x07				}, { vinserti128 ymm6,ymm4,OWORD ecx,0x7		}
+testcase	{ 0xc4, 0xe3, 0x5d, 0x38, 0x31, 0x07				}, { vinserti128 ymm6,ymm4,OWORD ecx,0x7		}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x5a, 0x21					}, { vbroadcasti128 ymm4,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x5a, 0x21					}, { vbroadcasti128 ymm4,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x47, 0xd4					}, { vpsllvd xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x49, 0x47, 0x39					}, { vpsllvd xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x47, 0x39					}, { vpsllvd xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x47, 0xd4					}, { vpsllvq xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x47, 0x39					}, { vpsllvq xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x47, 0x39					}, { vpsllvq xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x46, 0xd4					}, { vpsravd xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x49, 0x46, 0x39					}, { vpsravd xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x46, 0x39					}, { vpsravd xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x45, 0xd4					}, { vpsrlvd xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x49, 0x45, 0x39					}, { vpsrlvd xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x45, 0x39					}, { vpsrlvd xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x45, 0xd4					}, { vpsrlvq xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x45, 0x39					}, { vpsrlvq xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x45, 0x39					}, { vpsrlvq xmm7,xmm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x59, 0x8c, 0x31					}, { vpmaskmovd xmm6,xmm4,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x59, 0x8c, 0x31					}, { vpmaskmovd xmm6,xmm4,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xd9, 0x8c, 0x31					}, { vpmaskmovq xmm6,xmm4,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0xd9, 0x8c, 0x31					}, { vpmaskmovq xmm6,xmm4,OWORD ecx			}
+testcase	{ 0xc4, 0xe3, 0x7d, 0x39, 0xe6, 0x07				}, { vextracti128 xmm6,ymm4,0x7				}
+testcase	{ 0xc4, 0xe3, 0x7d, 0x39, 0x21, 0x07				}, { vextracti128 OWORD ecx,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x7d, 0x39, 0x21, 0x07				}, { vextracti128 OWORD ecx,ymm4,0x7			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x8e, 0x21					}, { vpmaskmovd OWORD ecx,xmm6,xmm4			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x8e, 0x21					}, { vpmaskmovd OWORD ecx,xmm6,xmm4			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x8e, 0x21					}, { vpmaskmovq OWORD ecx,xmm6,xmm4			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x8e, 0x21					}, { vpmaskmovq OWORD ecx,xmm6,xmm4			}
+testcase	{ 0xc4, 0xe3, 0x49, 0x02, 0xd4, 0x07				}, { vpblendd xmm2,xmm6,xmm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x49, 0x02, 0x11, 0x07				}, { vpblendd xmm2,xmm6,OWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x49, 0x02, 0x11, 0x07				}, { vpblendd xmm2,xmm6,OWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x59, 0xf4					}, { vpbroadcastq xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x59, 0x21					}, { vpbroadcastq xmm4,QWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x59, 0x21					}, { vpbroadcastq xmm4,QWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x59, 0xf4					}, { vpbroadcastq ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x59, 0x21					}, { vpbroadcastq ymm4,QWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x59, 0x21					}, { vpbroadcastq ymm4,QWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x58, 0xe4					}, { vpbroadcastd ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x58, 0x21					}, { vpbroadcastd ymm4,DWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x58, 0x21					}, { vpbroadcastd ymm4,DWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x58, 0xf4					}, { vpbroadcastd xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x58, 0x21					}, { vpbroadcastd xmm4,DWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x58, 0x21					}, { vpbroadcastd xmm4,DWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x79, 0xf4					}, { vpbroadcastw xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x79, 0x21					}, { vpbroadcastw xmm4,WORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x79, 0x21					}, { vpbroadcastw xmm4,WORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x79, 0xf4					}, { vpbroadcastw ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x79, 0x21					}, { vpbroadcastw ymm4,WORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x79, 0x21					}, { vpbroadcastw ymm4,WORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x78, 0xf4					}, { vpbroadcastb xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x78, 0x21					}, { vpbroadcastb xmm4,BYTE ecx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x78, 0x21					}, { vpbroadcastb xmm4,BYTE ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x78, 0xf4					}, { vpbroadcastb ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x78, 0x21					}, { vpbroadcastb ymm4,BYTE ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x78, 0x21					}, { vpbroadcastb ymm4,BYTE ecx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x18, 0xf4					}, { vbroadcastss xmm6,xmm4				}
+
+; b/gas/testsuite/gas/i386/avx256int-intel.d
+testcase	{ 0xc5, 0xfd, 0xd7, 0xcc					}, { vpmovmskb ecx,ymm4					}
+testcase	{ 0xc5, 0xed, 0x72, 0xf6, 0x07					}, { vpslld ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xfe, 0x07					}, { vpslldq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xf6, 0x07					}, { vpsllq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x71, 0xf6, 0x07					}, { vpsllw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x72, 0xe6, 0x07					}, { vpsrad ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x71, 0xe6, 0x07					}, { vpsraw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x72, 0xd6, 0x07					}, { vpsrld ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xde, 0x07					}, { vpsrldq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xd6, 0x07					}, { vpsrlq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x71, 0xd6, 0x07					}, { vpsrlw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xfd, 0x70, 0xd6, 0x07					}, { vpshufd ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xfd, 0x70, 0x31, 0x07					}, { vpshufd ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc5, 0xfe, 0x70, 0xd6, 0x07					}, { vpshufhw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xfe, 0x70, 0x31, 0x07					}, { vpshufhw ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc5, 0xff, 0x70, 0xd6, 0x07					}, { vpshuflw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xff, 0x70, 0x31, 0x07					}, { vpshuflw ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc5, 0xcd, 0x6b, 0xd4					}, { vpackssdw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6b, 0x11					}, { vpackssdw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x63, 0xd4					}, { vpacksswb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x63, 0x11					}, { vpacksswb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x2b, 0xd4					}, { vpackusdw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x2b, 0x11					}, { vpackusdw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x67, 0xd4					}, { vpackuswb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x67, 0x11					}, { vpackuswb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfc, 0xd4					}, { vpaddb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfc, 0x11					}, { vpaddb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfd, 0xd4					}, { vpaddw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfd, 0x11					}, { vpaddw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfe, 0xd4					}, { vpaddd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfe, 0x11					}, { vpaddd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd4, 0xd4					}, { vpaddq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd4, 0x11					}, { vpaddq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xec, 0xd4					}, { vpaddsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xec, 0x11					}, { vpaddsb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xed, 0xd4					}, { vpaddsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xed, 0x11					}, { vpaddsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xdc, 0xd4					}, { vpaddusb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdc, 0x11					}, { vpaddusb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xdd, 0xd4					}, { vpaddusw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdd, 0x11					}, { vpaddusw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xdb, 0xd4					}, { vpand ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdb, 0x11					}, { vpand ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xdf, 0xd4					}, { vpandn ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdf, 0x11					}, { vpandn ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe0, 0xd4					}, { vpavgb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe0, 0x11					}, { vpavgb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe3, 0xd4					}, { vpavgw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe3, 0x11					}, { vpavgw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x74, 0xd4					}, { vpcmpeqb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x74, 0x11					}, { vpcmpeqb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x75, 0xd4					}, { vpcmpeqw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x75, 0x11					}, { vpcmpeqw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x76, 0xd4					}, { vpcmpeqd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x76, 0x11					}, { vpcmpeqd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x29, 0xd4					}, { vpcmpeqq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x29, 0x11					}, { vpcmpeqq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x64, 0xd4					}, { vpcmpgtb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x64, 0x11					}, { vpcmpgtb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x65, 0xd4					}, { vpcmpgtw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x65, 0x11					}, { vpcmpgtw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x66, 0xd4					}, { vpcmpgtd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x66, 0x11					}, { vpcmpgtd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x37, 0xd4					}, { vpcmpgtq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x37, 0x11					}, { vpcmpgtq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x01, 0xd4					}, { vphaddw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x01, 0x11					}, { vphaddw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x02, 0xd4					}, { vphaddd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x02, 0x11					}, { vphaddd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x03, 0xd4					}, { vphaddsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x03, 0x11					}, { vphaddsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x05, 0xd4					}, { vphsubw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x05, 0x11					}, { vphsubw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x06, 0xd4					}, { vphsubd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x06, 0x11					}, { vphsubd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x07, 0xd4					}, { vphsubsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x07, 0x11					}, { vphsubsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf5, 0xd4					}, { vpmaddwd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf5, 0x11					}, { vpmaddwd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x04, 0xd4					}, { vpmaddubsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x04, 0x11					}, { vpmaddubsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3c, 0xd4					}, { vpmaxsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3c, 0x11					}, { vpmaxsb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xee, 0xd4					}, { vpmaxsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xee, 0x11					}, { vpmaxsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3d, 0xd4					}, { vpmaxsd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3d, 0x11					}, { vpmaxsd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xde, 0xd4					}, { vpmaxub ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xde, 0x11					}, { vpmaxub ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3e, 0xd4					}, { vpmaxuw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3e, 0x11					}, { vpmaxuw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3f, 0xd4					}, { vpmaxud ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3f, 0x11					}, { vpmaxud ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x38, 0xd4					}, { vpminsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x38, 0x11					}, { vpminsb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xea, 0xd4					}, { vpminsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xea, 0x11					}, { vpminsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x39, 0xd4					}, { vpminsd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x39, 0x11					}, { vpminsd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xda, 0xd4					}, { vpminub ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xda, 0x11					}, { vpminub ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3a, 0xd4					}, { vpminuw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3a, 0x11					}, { vpminuw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3b, 0xd4					}, { vpminud ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3b, 0x11					}, { vpminud ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe4, 0xd4					}, { vpmulhuw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe4, 0x11					}, { vpmulhuw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0b, 0xd4					}, { vpmulhrsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0b, 0x11					}, { vpmulhrsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe5, 0xd4					}, { vpmulhw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe5, 0x11					}, { vpmulhw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd5, 0xd4					}, { vpmullw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd5, 0x11					}, { vpmullw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x40, 0xd4					}, { vpmulld ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x40, 0x11					}, { vpmulld ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf4, 0xd4					}, { vpmuludq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf4, 0x11					}, { vpmuludq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x28, 0xd4					}, { vpmuldq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x28, 0x11					}, { vpmuldq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xeb, 0xd4					}, { vpor ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xeb, 0x11					}, { vpor ymm2,ymm6,YWORD ecx				}
+testcase	{ 0xc5, 0xcd, 0xf6, 0xd4					}, { vpsadbw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf6, 0x11					}, { vpsadbw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x00, 0xd4					}, { vpshufb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x00, 0x11					}, { vpshufb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x08, 0xd4					}, { vpsignb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x08, 0x11					}, { vpsignb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x09, 0xd4					}, { vpsignw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x09, 0x11					}, { vpsignw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0a, 0xd4					}, { vpsignd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0a, 0x11					}, { vpsignd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf8, 0xd4					}, { vpsubb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf8, 0x11					}, { vpsubb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf9, 0xd4					}, { vpsubw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf9, 0x11					}, { vpsubw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfa, 0xd4					}, { vpsubd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfa, 0x11					}, { vpsubd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfb, 0xd4					}, { vpsubq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfb, 0x11					}, { vpsubq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe8, 0xd4					}, { vpsubsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe8, 0x11					}, { vpsubsb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe9, 0xd4					}, { vpsubsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe9, 0x11					}, { vpsubsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd8, 0xd4					}, { vpsubusb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd8, 0x11					}, { vpsubusb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd9, 0xd4					}, { vpsubusw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd9, 0x11					}, { vpsubusw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x68, 0xd4					}, { vpunpckhbw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x68, 0x11					}, { vpunpckhbw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x69, 0xd4					}, { vpunpckhwd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x69, 0x11					}, { vpunpckhwd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x6a, 0xd4					}, { vpunpckhdq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6a, 0x11					}, { vpunpckhdq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x6d, 0xd4					}, { vpunpckhqdq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6d, 0x11					}, { vpunpckhqdq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x60, 0xd4					}, { vpunpcklbw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x60, 0x11					}, { vpunpcklbw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x61, 0xd4					}, { vpunpcklwd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x61, 0x11					}, { vpunpcklwd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x62, 0xd4					}, { vpunpckldq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x62, 0x11					}, { vpunpckldq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x6c, 0xd4					}, { vpunpcklqdq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6c, 0x11					}, { vpunpcklqdq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xef, 0xd4					}, { vpxor ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xef, 0x11					}, { vpxor ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1c, 0xf4					}, { vpabsb ymm6,ymm4					}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1c, 0x21					}, { vpabsb ymm4,YWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1d, 0xf4					}, { vpabsw ymm6,ymm4					}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1d, 0x21					}, { vpabsw ymm4,YWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1e, 0xf4					}, { vpabsd ymm6,ymm4					}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1e, 0x21					}, { vpabsd ymm4,YWORD ecx				}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x42, 0xd4, 0x07				}, { vmpsadbw ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x42, 0x11, 0x07				}, { vmpsadbw ymm2,ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0f, 0xd4, 0x07				}, { vpalignr ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0f, 0x11, 0x07				}, { vpalignr ymm2,ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0e, 0xd4, 0x07				}, { vpblendw ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0e, 0x11, 0x07				}, { vpblendw ymm2,ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x6d, 0x4c, 0xfe, 0x40				}, { vpblendvb ymm7,ymm2,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe3, 0x6d, 0x4c, 0x39, 0x40				}, { vpblendvb ymm7,ymm2,YWORD ecx,ymm4		}
+testcase	{ 0xc5, 0xcd, 0xf1, 0xd4					}, { vpsllw ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xf1, 0x11					}, { vpsllw ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf2, 0xd4					}, { vpslld ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xf2, 0x11					}, { vpslld ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf3, 0xd4					}, { vpsllq ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xf3, 0x11					}, { vpsllq ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe1, 0xd4					}, { vpsraw ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xe1, 0x11					}, { vpsraw ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe2, 0xd4					}, { vpsrad ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xe2, 0x11					}, { vpsrad ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd1, 0xd4					}, { vpsrlw ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xd1, 0x11					}, { vpsrlw ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd2, 0xd4					}, { vpsrld ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xd2, 0x11					}, { vpsrld ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd3, 0xd4					}, { vpsrlq ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xd3, 0x11					}, { vpsrlq ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x20, 0xe4					}, { vpmovsxbw ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x20, 0x21					}, { vpmovsxbw ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x23, 0xe4					}, { vpmovsxwd ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x23, 0x21					}, { vpmovsxwd ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x25, 0xe4					}, { vpmovsxdq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x25, 0x21					}, { vpmovsxdq ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x30, 0xe4					}, { vpmovzxbw ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x30, 0x21					}, { vpmovzxbw ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x33, 0xe4					}, { vpmovzxwd ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x33, 0x21					}, { vpmovzxwd ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x35, 0xe4					}, { vpmovzxdq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x35, 0x21					}, { vpmovzxdq ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x21, 0xf4					}, { vpmovsxbd ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x21, 0x21					}, { vpmovsxbd ymm4,QWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x24, 0xf4					}, { vpmovsxwq ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x24, 0x21					}, { vpmovsxwq ymm4,QWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x31, 0xf4					}, { vpmovzxbd ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x31, 0x21					}, { vpmovzxbd ymm4,QWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x34, 0xf4					}, { vpmovzxwq ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x34, 0x21					}, { vpmovzxwq ymm4,QWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x22, 0xe4					}, { vpmovsxbq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x22, 0x21					}, { vpmovsxbq ymm4,DWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x32, 0xe4					}, { vpmovzxbq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x32, 0x21					}, { vpmovzxbq ymm4,DWORD ecx				}
+testcase	{ 0xc5, 0xfd, 0xd7, 0xcc					}, { vpmovmskb ecx,ymm4					}
+testcase	{ 0xc5, 0xed, 0x72, 0xf6, 0x07					}, { vpslld ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xfe, 0x07					}, { vpslldq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xf6, 0x07					}, { vpsllq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x71, 0xf6, 0x07					}, { vpsllw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x72, 0xe6, 0x07					}, { vpsrad ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x71, 0xe6, 0x07					}, { vpsraw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x72, 0xd6, 0x07					}, { vpsrld ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xde, 0x07					}, { vpsrldq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xd6, 0x07					}, { vpsrlq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x71, 0xd6, 0x07					}, { vpsrlw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xfd, 0x70, 0xd6, 0x07					}, { vpshufd ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xfd, 0x70, 0x31, 0x07					}, { vpshufd ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc5, 0xfd, 0x70, 0x31, 0x07					}, { vpshufd ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc5, 0xfe, 0x70, 0xd6, 0x07					}, { vpshufhw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xfe, 0x70, 0x31, 0x07					}, { vpshufhw ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc5, 0xfe, 0x70, 0x31, 0x07					}, { vpshufhw ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc5, 0xff, 0x70, 0xd6, 0x07					}, { vpshuflw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xff, 0x70, 0x31, 0x07					}, { vpshuflw ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc5, 0xff, 0x70, 0x31, 0x07					}, { vpshuflw ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc5, 0xcd, 0x6b, 0xd4					}, { vpackssdw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6b, 0x11					}, { vpackssdw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x6b, 0x11					}, { vpackssdw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x63, 0xd4					}, { vpacksswb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x63, 0x11					}, { vpacksswb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x63, 0x11					}, { vpacksswb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x2b, 0xd4					}, { vpackusdw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x2b, 0x11					}, { vpackusdw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x2b, 0x11					}, { vpackusdw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x67, 0xd4					}, { vpackuswb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x67, 0x11					}, { vpackuswb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x67, 0x11					}, { vpackuswb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfc, 0xd4					}, { vpaddb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfc, 0x11					}, { vpaddb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfc, 0x11					}, { vpaddb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfd, 0xd4					}, { vpaddw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfd, 0x11					}, { vpaddw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfd, 0x11					}, { vpaddw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfe, 0xd4					}, { vpaddd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfe, 0x11					}, { vpaddd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfe, 0x11					}, { vpaddd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd4, 0xd4					}, { vpaddq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd4, 0x11					}, { vpaddq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd4, 0x11					}, { vpaddq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xec, 0xd4					}, { vpaddsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xec, 0x11					}, { vpaddsb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xec, 0x11					}, { vpaddsb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xed, 0xd4					}, { vpaddsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xed, 0x11					}, { vpaddsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xed, 0x11					}, { vpaddsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xdc, 0xd4					}, { vpaddusb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdc, 0x11					}, { vpaddusb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xdc, 0x11					}, { vpaddusb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xdd, 0xd4					}, { vpaddusw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdd, 0x11					}, { vpaddusw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xdd, 0x11					}, { vpaddusw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xdb, 0xd4					}, { vpand ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdb, 0x11					}, { vpand ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xdb, 0x11					}, { vpand ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xdf, 0xd4					}, { vpandn ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdf, 0x11					}, { vpandn ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xdf, 0x11					}, { vpandn ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe0, 0xd4					}, { vpavgb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe0, 0x11					}, { vpavgb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe0, 0x11					}, { vpavgb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe3, 0xd4					}, { vpavgw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe3, 0x11					}, { vpavgw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe3, 0x11					}, { vpavgw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x74, 0xd4					}, { vpcmpeqb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x74, 0x11					}, { vpcmpeqb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x74, 0x11					}, { vpcmpeqb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x75, 0xd4					}, { vpcmpeqw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x75, 0x11					}, { vpcmpeqw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x75, 0x11					}, { vpcmpeqw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x76, 0xd4					}, { vpcmpeqd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x76, 0x11					}, { vpcmpeqd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x76, 0x11					}, { vpcmpeqd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x29, 0xd4					}, { vpcmpeqq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x29, 0x11					}, { vpcmpeqq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x29, 0x11					}, { vpcmpeqq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x64, 0xd4					}, { vpcmpgtb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x64, 0x11					}, { vpcmpgtb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x64, 0x11					}, { vpcmpgtb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x65, 0xd4					}, { vpcmpgtw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x65, 0x11					}, { vpcmpgtw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x65, 0x11					}, { vpcmpgtw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x66, 0xd4					}, { vpcmpgtd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x66, 0x11					}, { vpcmpgtd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x66, 0x11					}, { vpcmpgtd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x37, 0xd4					}, { vpcmpgtq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x37, 0x11					}, { vpcmpgtq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x37, 0x11					}, { vpcmpgtq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x01, 0xd4					}, { vphaddw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x01, 0x11					}, { vphaddw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x01, 0x11					}, { vphaddw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x02, 0xd4					}, { vphaddd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x02, 0x11					}, { vphaddd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x02, 0x11					}, { vphaddd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x03, 0xd4					}, { vphaddsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x03, 0x11					}, { vphaddsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x03, 0x11					}, { vphaddsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x05, 0xd4					}, { vphsubw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x05, 0x11					}, { vphsubw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x05, 0x11					}, { vphsubw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x06, 0xd4					}, { vphsubd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x06, 0x11					}, { vphsubd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x06, 0x11					}, { vphsubd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x07, 0xd4					}, { vphsubsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x07, 0x11					}, { vphsubsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x07, 0x11					}, { vphsubsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf5, 0xd4					}, { vpmaddwd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf5, 0x11					}, { vpmaddwd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf5, 0x11					}, { vpmaddwd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x04, 0xd4					}, { vpmaddubsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x04, 0x11					}, { vpmaddubsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x04, 0x11					}, { vpmaddubsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3c, 0xd4					}, { vpmaxsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3c, 0x11					}, { vpmaxsb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3c, 0x11					}, { vpmaxsb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xee, 0xd4					}, { vpmaxsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xee, 0x11					}, { vpmaxsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xee, 0x11					}, { vpmaxsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3d, 0xd4					}, { vpmaxsd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3d, 0x11					}, { vpmaxsd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3d, 0x11					}, { vpmaxsd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xde, 0xd4					}, { vpmaxub ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xde, 0x11					}, { vpmaxub ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xde, 0x11					}, { vpmaxub ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3e, 0xd4					}, { vpmaxuw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3e, 0x11					}, { vpmaxuw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3e, 0x11					}, { vpmaxuw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3f, 0xd4					}, { vpmaxud ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3f, 0x11					}, { vpmaxud ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3f, 0x11					}, { vpmaxud ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x38, 0xd4					}, { vpminsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x38, 0x11					}, { vpminsb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x38, 0x11					}, { vpminsb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xea, 0xd4					}, { vpminsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xea, 0x11					}, { vpminsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xea, 0x11					}, { vpminsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x39, 0xd4					}, { vpminsd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x39, 0x11					}, { vpminsd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x39, 0x11					}, { vpminsd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xda, 0xd4					}, { vpminub ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xda, 0x11					}, { vpminub ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xda, 0x11					}, { vpminub ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3a, 0xd4					}, { vpminuw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3a, 0x11					}, { vpminuw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3a, 0x11					}, { vpminuw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3b, 0xd4					}, { vpminud ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3b, 0x11					}, { vpminud ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3b, 0x11					}, { vpminud ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe4, 0xd4					}, { vpmulhuw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe4, 0x11					}, { vpmulhuw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe4, 0x11					}, { vpmulhuw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0b, 0xd4					}, { vpmulhrsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0b, 0x11					}, { vpmulhrsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0b, 0x11					}, { vpmulhrsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe5, 0xd4					}, { vpmulhw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe5, 0x11					}, { vpmulhw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe5, 0x11					}, { vpmulhw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd5, 0xd4					}, { vpmullw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd5, 0x11					}, { vpmullw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd5, 0x11					}, { vpmullw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x40, 0xd4					}, { vpmulld ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x40, 0x11					}, { vpmulld ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x40, 0x11					}, { vpmulld ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf4, 0xd4					}, { vpmuludq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf4, 0x11					}, { vpmuludq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf4, 0x11					}, { vpmuludq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x28, 0xd4					}, { vpmuldq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x28, 0x11					}, { vpmuldq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x28, 0x11					}, { vpmuldq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xeb, 0xd4					}, { vpor ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xeb, 0x11					}, { vpor ymm2,ymm6,YWORD ecx				}
+testcase	{ 0xc5, 0xcd, 0xeb, 0x11					}, { vpor ymm2,ymm6,YWORD ecx				}
+testcase	{ 0xc5, 0xcd, 0xf6, 0xd4					}, { vpsadbw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf6, 0x11					}, { vpsadbw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf6, 0x11					}, { vpsadbw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x00, 0xd4					}, { vpshufb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x00, 0x11					}, { vpshufb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x00, 0x11					}, { vpshufb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x08, 0xd4					}, { vpsignb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x08, 0x11					}, { vpsignb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x08, 0x11					}, { vpsignb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x09, 0xd4					}, { vpsignw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x09, 0x11					}, { vpsignw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x09, 0x11					}, { vpsignw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0a, 0xd4					}, { vpsignd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0a, 0x11					}, { vpsignd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0a, 0x11					}, { vpsignd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf8, 0xd4					}, { vpsubb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf8, 0x11					}, { vpsubb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf8, 0x11					}, { vpsubb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf9, 0xd4					}, { vpsubw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf9, 0x11					}, { vpsubw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf9, 0x11					}, { vpsubw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfa, 0xd4					}, { vpsubd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfa, 0x11					}, { vpsubd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfa, 0x11					}, { vpsubd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfb, 0xd4					}, { vpsubq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfb, 0x11					}, { vpsubq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xfb, 0x11					}, { vpsubq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe8, 0xd4					}, { vpsubsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe8, 0x11					}, { vpsubsb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe8, 0x11					}, { vpsubsb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe9, 0xd4					}, { vpsubsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe9, 0x11					}, { vpsubsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe9, 0x11					}, { vpsubsw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd8, 0xd4					}, { vpsubusb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd8, 0x11					}, { vpsubusb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd8, 0x11					}, { vpsubusb ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd9, 0xd4					}, { vpsubusw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd9, 0x11					}, { vpsubusw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd9, 0x11					}, { vpsubusw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x68, 0xd4					}, { vpunpckhbw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x68, 0x11					}, { vpunpckhbw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x68, 0x11					}, { vpunpckhbw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x69, 0xd4					}, { vpunpckhwd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x69, 0x11					}, { vpunpckhwd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x69, 0x11					}, { vpunpckhwd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x6a, 0xd4					}, { vpunpckhdq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6a, 0x11					}, { vpunpckhdq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x6a, 0x11					}, { vpunpckhdq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x6d, 0xd4					}, { vpunpckhqdq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6d, 0x11					}, { vpunpckhqdq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x6d, 0x11					}, { vpunpckhqdq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x60, 0xd4					}, { vpunpcklbw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x60, 0x11					}, { vpunpcklbw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x60, 0x11					}, { vpunpcklbw ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x61, 0xd4					}, { vpunpcklwd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x61, 0x11					}, { vpunpcklwd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x61, 0x11					}, { vpunpcklwd ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x62, 0xd4					}, { vpunpckldq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x62, 0x11					}, { vpunpckldq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x62, 0x11					}, { vpunpckldq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x6c, 0xd4					}, { vpunpcklqdq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6c, 0x11					}, { vpunpcklqdq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0x6c, 0x11					}, { vpunpcklqdq ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xef, 0xd4					}, { vpxor ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xef, 0x11					}, { vpxor ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xef, 0x11					}, { vpxor ymm2,ymm6,YWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1c, 0xf4					}, { vpabsb ymm6,ymm4					}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1c, 0x21					}, { vpabsb ymm4,YWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1c, 0x21					}, { vpabsb ymm4,YWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1d, 0xf4					}, { vpabsw ymm6,ymm4					}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1d, 0x21					}, { vpabsw ymm4,YWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1d, 0x21					}, { vpabsw ymm4,YWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1e, 0xf4					}, { vpabsd ymm6,ymm4					}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1e, 0x21					}, { vpabsd ymm4,YWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1e, 0x21					}, { vpabsd ymm4,YWORD ecx				}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x42, 0xd4, 0x07				}, { vmpsadbw ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x42, 0x11, 0x07				}, { vmpsadbw ymm2,ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x42, 0x11, 0x07				}, { vmpsadbw ymm2,ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0f, 0xd4, 0x07				}, { vpalignr ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0f, 0x11, 0x07				}, { vpalignr ymm2,ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0f, 0x11, 0x07				}, { vpalignr ymm2,ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0e, 0xd4, 0x07				}, { vpblendw ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0e, 0x11, 0x07				}, { vpblendw ymm2,ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0e, 0x11, 0x07				}, { vpblendw ymm2,ymm6,YWORD ecx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x6d, 0x4c, 0xfe, 0x40				}, { vpblendvb ymm7,ymm2,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe3, 0x6d, 0x4c, 0x39, 0x40				}, { vpblendvb ymm7,ymm2,YWORD ecx,ymm4		}
+testcase	{ 0xc4, 0xe3, 0x6d, 0x4c, 0x39, 0x40				}, { vpblendvb ymm7,ymm2,YWORD ecx,ymm4		}
+testcase	{ 0xc5, 0xcd, 0xf1, 0xd4					}, { vpsllw ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xf1, 0x11					}, { vpsllw ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf1, 0x11					}, { vpsllw ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf2, 0xd4					}, { vpslld ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xf2, 0x11					}, { vpslld ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf2, 0x11					}, { vpslld ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf3, 0xd4					}, { vpsllq ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xf3, 0x11					}, { vpsllq ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xf3, 0x11					}, { vpsllq ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe1, 0xd4					}, { vpsraw ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xe1, 0x11					}, { vpsraw ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe1, 0x11					}, { vpsraw ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe2, 0xd4					}, { vpsrad ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xe2, 0x11					}, { vpsrad ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xe2, 0x11					}, { vpsrad ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd1, 0xd4					}, { vpsrlw ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xd1, 0x11					}, { vpsrlw ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd1, 0x11					}, { vpsrlw ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd2, 0xd4					}, { vpsrld ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xd2, 0x11					}, { vpsrld ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd2, 0x11					}, { vpsrld ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd3, 0xd4					}, { vpsrlq ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xd3, 0x11					}, { vpsrlq ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc5, 0xcd, 0xd3, 0x11					}, { vpsrlq ymm2,ymm6,OWORD ecx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x20, 0xe4					}, { vpmovsxbw ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x20, 0x21					}, { vpmovsxbw ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x20, 0x21					}, { vpmovsxbw ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x23, 0xe4					}, { vpmovsxwd ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x23, 0x21					}, { vpmovsxwd ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x23, 0x21					}, { vpmovsxwd ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x25, 0xe4					}, { vpmovsxdq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x25, 0x21					}, { vpmovsxdq ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x25, 0x21					}, { vpmovsxdq ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x30, 0xe4					}, { vpmovzxbw ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x30, 0x21					}, { vpmovzxbw ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x30, 0x21					}, { vpmovzxbw ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x33, 0xe4					}, { vpmovzxwd ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x33, 0x21					}, { vpmovzxwd ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x33, 0x21					}, { vpmovzxwd ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x35, 0xe4					}, { vpmovzxdq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x35, 0x21					}, { vpmovzxdq ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x35, 0x21					}, { vpmovzxdq ymm4,OWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x21, 0xf4					}, { vpmovsxbd ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x21, 0x21					}, { vpmovsxbd ymm4,QWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x21, 0x21					}, { vpmovsxbd ymm4,QWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x24, 0xf4					}, { vpmovsxwq ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x24, 0x21					}, { vpmovsxwq ymm4,QWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x24, 0x21					}, { vpmovsxwq ymm4,QWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x31, 0xf4					}, { vpmovzxbd ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x31, 0x21					}, { vpmovzxbd ymm4,QWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x31, 0x21					}, { vpmovzxbd ymm4,QWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x34, 0xf4					}, { vpmovzxwq ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x34, 0x21					}, { vpmovzxwq ymm4,QWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x34, 0x21					}, { vpmovzxwq ymm4,QWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x22, 0xe4					}, { vpmovsxbq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x22, 0x21					}, { vpmovsxbq ymm4,DWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x22, 0x21					}, { vpmovsxbq ymm4,DWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x32, 0xe4					}, { vpmovzxbq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x32, 0x21					}, { vpmovzxbq ymm4,DWORD ecx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x32, 0x21					}, { vpmovzxbq ymm4,DWORD ecx				}
+
+bits 64
+
+; b/gas/testsuite/gas/i386/x86-64-avx-gather-intel.d
+testcase	{ 0xc4, 0xe2, 0xe9, 0x92, 0x4c, 0x7d, 0x00			}, { vgatherdpd xmm1,QWORD rbp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0xe9, 0x93, 0x4c, 0x7d, 0x00			}, { vgatherqpd xmm1,QWORD rbp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0xed, 0x92, 0x4c, 0x7d, 0x00			}, { vgatherdpd ymm1,QWORD rbp+xmm7*2+0x0,ymm2	}
+testcase	{ 0xc4, 0xe2, 0xed, 0x93, 0x4c, 0x7d, 0x00			}, { vgatherqpd ymm1,QWORD rbp+ymm7*2+0x0,ymm2	}
+testcase	{ 0xc4, 0x02, 0x99, 0x92, 0x5c, 0x75, 0x00			}, { vgatherdpd xmm11,QWORD r13+xmm14*2+0x0,xmm12	}
+testcase	{ 0xc4, 0x02, 0x99, 0x93, 0x5c, 0x75, 0x00			}, { vgatherqpd xmm11,QWORD r13+xmm14*2+0x0,xmm12	}
+testcase	{ 0xc4, 0x02, 0x9d, 0x92, 0x5c, 0x75, 0x00			}, { vgatherdpd ymm11,QWORD r13+xmm14*2+0x0,ymm12	}
+testcase	{ 0xc4, 0x02, 0x9d, 0x93, 0x5c, 0x75, 0x00			}, { vgatherqpd ymm11,QWORD r13+ymm14*2+0x0,ymm12	}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0x25, 0x08, 0x00, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm4*1+0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0x25, 0xf8, 0xff, 0xff, 0xff	}, { vgatherdpd ymm6,QWORD xmm4*1-0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0x25, 0x00, 0x00, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm4*1+0x0,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0x25, 0x98, 0x02, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm4*1+0x298,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0xe5, 0x08, 0x00, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm4*8+0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0xe5, 0xf8, 0xff, 0xff, 0xff	}, { vgatherdpd ymm6,QWORD xmm4*8-0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0xe5, 0x00, 0x00, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm4*8+0x0,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0xe5, 0x98, 0x02, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm4*8+0x298,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x92, 0x34, 0x35, 0x08, 0x00, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm14*1+0x8,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x92, 0x34, 0x35, 0xf8, 0xff, 0xff, 0xff	}, { vgatherdpd ymm6,QWORD xmm14*1-0x8,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x92, 0x34, 0x35, 0x00, 0x00, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm14*1+0x0,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x92, 0x34, 0x35, 0x98, 0x02, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm14*1+0x298,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x92, 0x34, 0xf5, 0x08, 0x00, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm14*8+0x8,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x92, 0x34, 0xf5, 0xf8, 0xff, 0xff, 0xff	}, { vgatherdpd ymm6,QWORD xmm14*8-0x8,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x92, 0x34, 0xf5, 0x00, 0x00, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm14*8+0x0,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x92, 0x34, 0xf5, 0x98, 0x02, 0x00, 0x00	}, { vgatherdpd ymm6,QWORD xmm14*8+0x298,ymm5		}
+testcase	{ 0xc4, 0xe2, 0x69, 0x92, 0x4c, 0x7d, 0x00			}, { vgatherdps xmm1,DWORD rbp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0x69, 0x93, 0x4c, 0x7d, 0x00			}, { vgatherqps xmm1,DWORD rbp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0x6d, 0x92, 0x4c, 0x7d, 0x00			}, { vgatherdps ymm1,DWORD rbp+ymm7*2+0x0,ymm2	}
+testcase	{ 0xc4, 0xe2, 0x6d, 0x93, 0x4c, 0x7d, 0x00			}, { vgatherqps xmm1,DWORD rbp+ymm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0x02, 0x19, 0x92, 0x5c, 0x75, 0x00			}, { vgatherdps xmm11,DWORD r13+xmm14*2+0x0,xmm12	}
+testcase	{ 0xc4, 0x02, 0x19, 0x93, 0x5c, 0x75, 0x00			}, { vgatherqps xmm11,DWORD r13+xmm14*2+0x0,xmm12	}
+testcase	{ 0xc4, 0x02, 0x1d, 0x92, 0x5c, 0x75, 0x00			}, { vgatherdps ymm11,DWORD r13+ymm14*2+0x0,ymm12	}
+testcase	{ 0xc4, 0x02, 0x1d, 0x93, 0x5c, 0x75, 0x00			}, { vgatherqps xmm11,DWORD r13+ymm14*2+0x0,xmm12	}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0x25, 0x08, 0x00, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm4*1+0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0x25, 0xf8, 0xff, 0xff, 0xff	}, { vgatherdps xmm6,DWORD xmm4*1-0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0x25, 0x00, 0x00, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm4*1+0x0,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0x25, 0x98, 0x02, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm4*1+0x298,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0xe5, 0x08, 0x00, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm4*8+0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0xe5, 0xf8, 0xff, 0xff, 0xff	}, { vgatherdps xmm6,DWORD xmm4*8-0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0xe5, 0x00, 0x00, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm4*8+0x0,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x92, 0x34, 0xe5, 0x98, 0x02, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm4*8+0x298,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x92, 0x34, 0x35, 0x08, 0x00, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm14*1+0x8,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x92, 0x34, 0x35, 0xf8, 0xff, 0xff, 0xff	}, { vgatherdps xmm6,DWORD xmm14*1-0x8,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x92, 0x34, 0x35, 0x00, 0x00, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm14*1+0x0,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x92, 0x34, 0x35, 0x98, 0x02, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm14*1+0x298,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x92, 0x34, 0xf5, 0x08, 0x00, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm14*8+0x8,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x92, 0x34, 0xf5, 0xf8, 0xff, 0xff, 0xff	}, { vgatherdps xmm6,DWORD xmm14*8-0x8,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x92, 0x34, 0xf5, 0x00, 0x00, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm14*8+0x0,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x92, 0x34, 0xf5, 0x98, 0x02, 0x00, 0x00	}, { vgatherdps xmm6,DWORD xmm14*8+0x298,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x69, 0x90, 0x4c, 0x7d, 0x00			}, { vpgatherdd xmm1,DWORD rbp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0x69, 0x91, 0x4c, 0x7d, 0x00			}, { vpgatherqd xmm1,DWORD rbp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0x6d, 0x90, 0x4c, 0x7d, 0x00			}, { vpgatherdd ymm1,DWORD rbp+ymm7*2+0x0,ymm2	}
+testcase	{ 0xc4, 0xe2, 0x6d, 0x91, 0x4c, 0x7d, 0x00			}, { vpgatherqd xmm1,DWORD rbp+ymm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0x02, 0x19, 0x90, 0x5c, 0x75, 0x00			}, { vpgatherdd xmm11,DWORD r13+xmm14*2+0x0,xmm12	}
+testcase	{ 0xc4, 0x02, 0x19, 0x91, 0x5c, 0x75, 0x00			}, { vpgatherqd xmm11,DWORD r13+xmm14*2+0x0,xmm12	}
+testcase	{ 0xc4, 0x02, 0x1d, 0x90, 0x5c, 0x75, 0x00			}, { vpgatherdd ymm11,DWORD r13+ymm14*2+0x0,ymm12	}
+testcase	{ 0xc4, 0x02, 0x1d, 0x91, 0x5c, 0x75, 0x00			}, { vpgatherqd xmm11,DWORD r13+ymm14*2+0x0,xmm12	}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0x25, 0x08, 0x00, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm4*1+0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0x25, 0xf8, 0xff, 0xff, 0xff	}, { vpgatherdd xmm6,DWORD xmm4*1-0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0x25, 0x00, 0x00, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm4*1+0x0,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0x25, 0x98, 0x02, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm4*1+0x298,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0xe5, 0x08, 0x00, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm4*8+0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0xe5, 0xf8, 0xff, 0xff, 0xff	}, { vpgatherdd xmm6,DWORD xmm4*8-0x8,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0xe5, 0x00, 0x00, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm4*8+0x0,xmm5		}
+testcase	{ 0xc4, 0xe2, 0x51, 0x90, 0x34, 0xe5, 0x98, 0x02, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm4*8+0x298,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x90, 0x34, 0x35, 0x08, 0x00, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm14*1+0x8,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x90, 0x34, 0x35, 0xf8, 0xff, 0xff, 0xff	}, { vpgatherdd xmm6,DWORD xmm14*1-0x8,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x90, 0x34, 0x35, 0x00, 0x00, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm14*1+0x0,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x90, 0x34, 0x35, 0x98, 0x02, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm14*1+0x298,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x90, 0x34, 0xf5, 0x08, 0x00, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm14*8+0x8,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x90, 0x34, 0xf5, 0xf8, 0xff, 0xff, 0xff	}, { vpgatherdd xmm6,DWORD xmm14*8-0x8,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x90, 0x34, 0xf5, 0x00, 0x00, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm14*8+0x0,xmm5		}
+testcase	{ 0xc4, 0xa2, 0x51, 0x90, 0x34, 0xf5, 0x98, 0x02, 0x00, 0x00	}, { vpgatherdd xmm6,DWORD xmm14*8+0x298,xmm5		}
+testcase	{ 0xc4, 0xe2, 0xe9, 0x90, 0x4c, 0x7d, 0x00			}, { vpgatherdq xmm1,QWORD rbp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0xe9, 0x91, 0x4c, 0x7d, 0x00			}, { vpgatherqq xmm1,QWORD rbp+xmm7*2+0x0,xmm2	}
+testcase	{ 0xc4, 0xe2, 0xed, 0x90, 0x4c, 0x7d, 0x00			}, { vpgatherdq ymm1,QWORD rbp+xmm7*2+0x0,ymm2	}
+testcase	{ 0xc4, 0xe2, 0xed, 0x91, 0x4c, 0x7d, 0x00			}, { vpgatherqq ymm1,QWORD rbp+ymm7*2+0x0,ymm2	}
+testcase	{ 0xc4, 0x02, 0x99, 0x90, 0x5c, 0x75, 0x00			}, { vpgatherdq xmm11,QWORD r13+xmm14*2+0x0,xmm12	}
+testcase	{ 0xc4, 0x02, 0x99, 0x91, 0x5c, 0x75, 0x00			}, { vpgatherqq xmm11,QWORD r13+xmm14*2+0x0,xmm12	}
+testcase	{ 0xc4, 0x02, 0x9d, 0x90, 0x5c, 0x75, 0x00			}, { vpgatherdq ymm11,QWORD r13+xmm14*2+0x0,ymm12	}
+testcase	{ 0xc4, 0x02, 0x9d, 0x91, 0x5c, 0x75, 0x00			}, { vpgatherqq ymm11,QWORD r13+ymm14*2+0x0,ymm12	}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0x25, 0x08, 0x00, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm4*1+0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0x25, 0xf8, 0xff, 0xff, 0xff	}, { vpgatherdq ymm6,QWORD xmm4*1-0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0x25, 0x00, 0x00, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm4*1+0x0,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0x25, 0x98, 0x02, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm4*1+0x298,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0xe5, 0x08, 0x00, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm4*8+0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0xe5, 0xf8, 0xff, 0xff, 0xff	}, { vpgatherdq ymm6,QWORD xmm4*8-0x8,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0xe5, 0x00, 0x00, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm4*8+0x0,ymm5		}
+testcase	{ 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0xe5, 0x98, 0x02, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm4*8+0x298,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x90, 0x34, 0x35, 0x08, 0x00, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm14*1+0x8,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x90, 0x34, 0x35, 0xf8, 0xff, 0xff, 0xff	}, { vpgatherdq ymm6,QWORD xmm14*1-0x8,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x90, 0x34, 0x35, 0x00, 0x00, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm14*1+0x0,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x90, 0x34, 0x35, 0x98, 0x02, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm14*1+0x298,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x90, 0x34, 0xf5, 0x08, 0x00, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm14*8+0x8,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x90, 0x34, 0xf5, 0xf8, 0xff, 0xff, 0xff	}, { vpgatherdq ymm6,QWORD xmm14*8-0x8,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x90, 0x34, 0xf5, 0x00, 0x00, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm14*8+0x0,ymm5		}
+testcase	{ 0xc4, 0xa2, 0xd5, 0x90, 0x34, 0xf5, 0x98, 0x02, 0x00, 0x00	}, { vpgatherdq ymm6,QWORD xmm14*8+0x298,ymm5		}
+
+; b/gas/testsuite/gas/i386/x86-64-avx2-intel.d
+testcase	{ 0xc4, 0xe2, 0x5d, 0x8c, 0x31					}, { vpmaskmovd ymm6,ymm4,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x8e, 0x21					}, { vpmaskmovd YWORD rcx,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe2, 0xdd, 0x8c, 0x31					}, { vpmaskmovq ymm6,ymm4,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x8e, 0x21					}, { vpmaskmovq YWORD rcx,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x01, 0xd6, 0x07				}, { vpermpd ymm2,ymm6,0x7				}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x01, 0x31, 0x07				}, { vpermpd ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x00, 0xd6, 0x07				}, { vpermq ymm2,ymm6,0x7				}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x00, 0x31, 0x07				}, { vpermq ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x36, 0xd4					}, { vpermd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x36, 0x11					}, { vpermd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x16, 0xd4					}, { vpermps ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x16, 0x11					}, { vpermps ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x47, 0xd4					}, { vpsllvd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x47, 0x11					}, { vpsllvd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x47, 0xd4					}, { vpsllvq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x47, 0x11					}, { vpsllvq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x46, 0xd4					}, { vpsravd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x46, 0x11					}, { vpsravd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x45, 0xd4					}, { vpsrlvd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x45, 0x11					}, { vpsrlvd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x45, 0xd4					}, { vpsrlvq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x45, 0x11					}, { vpsrlvq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x2a, 0x21					}, { vmovntdqa ymm4,YWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x19, 0xf4					}, { vbroadcastsd ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x18, 0xf4					}, { vbroadcastss ymm6,xmm4				}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x02, 0xd4, 0x07				}, { vpblendd ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x02, 0x11, 0x07				}, { vpblendd ymm2,ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x46, 0xd4, 0x07				}, { vperm2i128 ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x46, 0x11, 0x07				}, { vperm2i128 ymm2,ymm6,YWORD rcx,0x7		}
+testcase	{ 0xc4, 0xe3, 0x5d, 0x38, 0xf4, 0x07				}, { vinserti128 ymm6,ymm4,xmm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x5d, 0x38, 0x31, 0x07				}, { vinserti128 ymm6,ymm4,OWORD rcx,0x7		}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x5a, 0x21					}, { vbroadcasti128 ymm4,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x47, 0xd4					}, { vpsllvd xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x49, 0x47, 0x39					}, { vpsllvd xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x47, 0xd4					}, { vpsllvq xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x47, 0x39					}, { vpsllvq xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x46, 0xd4					}, { vpsravd xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x49, 0x46, 0x39					}, { vpsravd xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x45, 0xd4					}, { vpsrlvd xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x49, 0x45, 0x39					}, { vpsrlvd xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x45, 0xd4					}, { vpsrlvq xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x45, 0x39					}, { vpsrlvq xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x59, 0x8c, 0x31					}, { vpmaskmovd xmm6,xmm4,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xd9, 0x8c, 0x31					}, { vpmaskmovq xmm6,xmm4,OWORD rcx			}
+testcase	{ 0xc4, 0xe3, 0x7d, 0x39, 0xe6, 0x07				}, { vextracti128 xmm6,ymm4,0x7				}
+testcase	{ 0xc4, 0xe3, 0x7d, 0x39, 0x21, 0x07				}, { vextracti128 OWORD rcx,ymm4,0x7			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x8e, 0x21					}, { vpmaskmovd OWORD rcx,xmm6,xmm4			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x8e, 0x21					}, { vpmaskmovq OWORD rcx,xmm6,xmm4			}
+testcase	{ 0xc4, 0xe3, 0x49, 0x02, 0xd4, 0x07				}, { vpblendd xmm2,xmm6,xmm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x49, 0x02, 0x11, 0x07				}, { vpblendd xmm2,xmm6,OWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x59, 0xf4					}, { vpbroadcastq xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x59, 0x21					}, { vpbroadcastq xmm4,QWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x59, 0xf4					}, { vpbroadcastq ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x59, 0x21					}, { vpbroadcastq ymm4,QWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x58, 0xe4					}, { vpbroadcastd ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x58, 0x21					}, { vpbroadcastd ymm4,DWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x58, 0xf4					}, { vpbroadcastd xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x58, 0x21					}, { vpbroadcastd xmm4,DWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x79, 0xf4					}, { vpbroadcastw xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x79, 0x21					}, { vpbroadcastw xmm4,WORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x79, 0xf4					}, { vpbroadcastw ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x79, 0x21					}, { vpbroadcastw ymm4,WORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x78, 0xf4					}, { vpbroadcastb xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x78, 0x21					}, { vpbroadcastb xmm4,BYTE rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x78, 0xf4					}, { vpbroadcastb ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x78, 0x21					}, { vpbroadcastb ymm4,BYTE rcx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x18, 0xf4					}, { vbroadcastss xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x5d, 0x8c, 0x31					}, { vpmaskmovd ymm6,ymm4,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x8e, 0x21					}, { vpmaskmovd YWORD rcx,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe2, 0x5d, 0x8c, 0x31					}, { vpmaskmovd ymm6,ymm4,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x8e, 0x21					}, { vpmaskmovd YWORD rcx,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe2, 0xdd, 0x8c, 0x31					}, { vpmaskmovq ymm6,ymm4,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x8e, 0x21					}, { vpmaskmovq YWORD rcx,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe2, 0xdd, 0x8c, 0x31					}, { vpmaskmovq ymm6,ymm4,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x8e, 0x21					}, { vpmaskmovq YWORD rcx,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x01, 0xd6, 0x07				}, { vpermpd ymm2,ymm6,0x7				}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x01, 0x31, 0x07				}, { vpermpd ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x01, 0x31, 0x07				}, { vpermpd ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x00, 0xd6, 0x07				}, { vpermq ymm2,ymm6,0x7				}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x00, 0x31, 0x07				}, { vpermq ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0xfd, 0x00, 0x31, 0x07				}, { vpermq ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x36, 0xd4					}, { vpermd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x36, 0x11					}, { vpermd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x36, 0x11					}, { vpermd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x16, 0xd4					}, { vpermps ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x16, 0x11					}, { vpermps ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x16, 0x11					}, { vpermps ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x47, 0xd4					}, { vpsllvd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x47, 0x11					}, { vpsllvd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x47, 0x11					}, { vpsllvd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x47, 0xd4					}, { vpsllvq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x47, 0x11					}, { vpsllvq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x47, 0x11					}, { vpsllvq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x46, 0xd4					}, { vpsravd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x46, 0x11					}, { vpsravd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x46, 0x11					}, { vpsravd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x45, 0xd4					}, { vpsrlvd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x45, 0x11					}, { vpsrlvd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x45, 0x11					}, { vpsrlvd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x45, 0xd4					}, { vpsrlvq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x45, 0x11					}, { vpsrlvq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xcd, 0x45, 0x11					}, { vpsrlvq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x2a, 0x21					}, { vmovntdqa ymm4,YWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x2a, 0x21					}, { vmovntdqa ymm4,YWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x19, 0xf4					}, { vbroadcastsd ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x18, 0xf4					}, { vbroadcastss ymm6,xmm4				}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x02, 0xd4, 0x07				}, { vpblendd ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x02, 0x11, 0x07				}, { vpblendd ymm2,ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x02, 0x11, 0x07				}, { vpblendd ymm2,ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x46, 0xd4, 0x07				}, { vperm2i128 ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x46, 0x11, 0x07				}, { vperm2i128 ymm2,ymm6,YWORD rcx,0x7		}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x46, 0x11, 0x07				}, { vperm2i128 ymm2,ymm6,YWORD rcx,0x7		}
+testcase	{ 0xc4, 0xe3, 0x5d, 0x38, 0xf4, 0x07				}, { vinserti128 ymm6,ymm4,xmm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x5d, 0x38, 0x31, 0x07				}, { vinserti128 ymm6,ymm4,OWORD rcx,0x7		}
+testcase	{ 0xc4, 0xe3, 0x5d, 0x38, 0x31, 0x07				}, { vinserti128 ymm6,ymm4,OWORD rcx,0x7		}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x5a, 0x21					}, { vbroadcasti128 ymm4,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x5a, 0x21					}, { vbroadcasti128 ymm4,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x47, 0xd4					}, { vpsllvd xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x49, 0x47, 0x39					}, { vpsllvd xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x47, 0x39					}, { vpsllvd xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x47, 0xd4					}, { vpsllvq xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x47, 0x39					}, { vpsllvq xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x47, 0x39					}, { vpsllvq xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x46, 0xd4					}, { vpsravd xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x49, 0x46, 0x39					}, { vpsravd xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x46, 0x39					}, { vpsravd xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x45, 0xd4					}, { vpsrlvd xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x49, 0x45, 0x39					}, { vpsrlvd xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x45, 0x39					}, { vpsrlvd xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x45, 0xd4					}, { vpsrlvq xmm2,xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x45, 0x39					}, { vpsrlvq xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x45, 0x39					}, { vpsrlvq xmm7,xmm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x59, 0x8c, 0x31					}, { vpmaskmovd xmm6,xmm4,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x59, 0x8c, 0x31					}, { vpmaskmovd xmm6,xmm4,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xd9, 0x8c, 0x31					}, { vpmaskmovq xmm6,xmm4,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0xd9, 0x8c, 0x31					}, { vpmaskmovq xmm6,xmm4,OWORD rcx			}
+testcase	{ 0xc4, 0xe3, 0x7d, 0x39, 0xe6, 0x07				}, { vextracti128 xmm6,ymm4,0x7				}
+testcase	{ 0xc4, 0xe3, 0x7d, 0x39, 0x21, 0x07				}, { vextracti128 OWORD rcx,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x7d, 0x39, 0x21, 0x07				}, { vextracti128 OWORD rcx,ymm4,0x7			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x8e, 0x21					}, { vpmaskmovd OWORD rcx,xmm6,xmm4			}
+testcase	{ 0xc4, 0xe2, 0x49, 0x8e, 0x21					}, { vpmaskmovd OWORD rcx,xmm6,xmm4			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x8e, 0x21					}, { vpmaskmovq OWORD rcx,xmm6,xmm4			}
+testcase	{ 0xc4, 0xe2, 0xc9, 0x8e, 0x21					}, { vpmaskmovq OWORD rcx,xmm6,xmm4			}
+testcase	{ 0xc4, 0xe3, 0x49, 0x02, 0xd4, 0x07				}, { vpblendd xmm2,xmm6,xmm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x49, 0x02, 0x11, 0x07				}, { vpblendd xmm2,xmm6,OWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x49, 0x02, 0x11, 0x07				}, { vpblendd xmm2,xmm6,OWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x59, 0xf4					}, { vpbroadcastq xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x59, 0x21					}, { vpbroadcastq xmm4,QWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x59, 0x21					}, { vpbroadcastq xmm4,QWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x59, 0xf4					}, { vpbroadcastq ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x59, 0x21					}, { vpbroadcastq ymm4,QWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x59, 0x21					}, { vpbroadcastq ymm4,QWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x58, 0xe4					}, { vpbroadcastd ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x58, 0x21					}, { vpbroadcastd ymm4,DWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x58, 0x21					}, { vpbroadcastd ymm4,DWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x58, 0xf4					}, { vpbroadcastd xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x58, 0x21					}, { vpbroadcastd xmm4,DWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x58, 0x21					}, { vpbroadcastd xmm4,DWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x79, 0xf4					}, { vpbroadcastw xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x79, 0x21					}, { vpbroadcastw xmm4,WORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x79, 0x21					}, { vpbroadcastw xmm4,WORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x79, 0xf4					}, { vpbroadcastw ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x79, 0x21					}, { vpbroadcastw ymm4,WORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x79, 0x21					}, { vpbroadcastw ymm4,WORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x78, 0xf4					}, { vpbroadcastb xmm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x79, 0x78, 0x21					}, { vpbroadcastb xmm4,BYTE rcx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x78, 0x21					}, { vpbroadcastb xmm4,BYTE rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x78, 0xf4					}, { vpbroadcastb ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x78, 0x21					}, { vpbroadcastb ymm4,BYTE rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x78, 0x21					}, { vpbroadcastb ymm4,BYTE rcx			}
+testcase	{ 0xc4, 0xe2, 0x79, 0x18, 0xf4					}, { vbroadcastss xmm6,xmm4				}
+
+; b/gas/testsuite/gas/i386/x86-64-avx256int-intel.d
+testcase	{ 0xc5, 0xfd, 0xd7, 0xcc					}, { vpmovmskb ecx,ymm4					}
+testcase	{ 0xc5, 0xfd, 0xd7, 0xcc					}, { vpmovmskb ecx,ymm4					}
+testcase	{ 0xc5, 0xed, 0x72, 0xf6, 0x07					}, { vpslld ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xfe, 0x07					}, { vpslldq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xf6, 0x07					}, { vpsllq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x71, 0xf6, 0x07					}, { vpsllw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x72, 0xe6, 0x07					}, { vpsrad ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x71, 0xe6, 0x07					}, { vpsraw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x72, 0xd6, 0x07					}, { vpsrld ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xde, 0x07					}, { vpsrldq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xd6, 0x07					}, { vpsrlq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x71, 0xd6, 0x07					}, { vpsrlw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xfd, 0x70, 0xd6, 0x07					}, { vpshufd ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xfd, 0x70, 0x31, 0x07					}, { vpshufd ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc5, 0xfe, 0x70, 0xd6, 0x07					}, { vpshufhw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xfe, 0x70, 0x31, 0x07					}, { vpshufhw ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc5, 0xff, 0x70, 0xd6, 0x07					}, { vpshuflw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xff, 0x70, 0x31, 0x07					}, { vpshuflw ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc5, 0xcd, 0x6b, 0xd4					}, { vpackssdw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6b, 0x11					}, { vpackssdw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x63, 0xd4					}, { vpacksswb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x63, 0x11					}, { vpacksswb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x2b, 0xd4					}, { vpackusdw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x2b, 0x11					}, { vpackusdw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x67, 0xd4					}, { vpackuswb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x67, 0x11					}, { vpackuswb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfc, 0xd4					}, { vpaddb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfc, 0x11					}, { vpaddb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfd, 0xd4					}, { vpaddw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfd, 0x11					}, { vpaddw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfe, 0xd4					}, { vpaddd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfe, 0x11					}, { vpaddd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd4, 0xd4					}, { vpaddq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd4, 0x11					}, { vpaddq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xec, 0xd4					}, { vpaddsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xec, 0x11					}, { vpaddsb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xed, 0xd4					}, { vpaddsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xed, 0x11					}, { vpaddsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xdc, 0xd4					}, { vpaddusb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdc, 0x11					}, { vpaddusb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xdd, 0xd4					}, { vpaddusw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdd, 0x11					}, { vpaddusw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xdb, 0xd4					}, { vpand ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdb, 0x11					}, { vpand ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xdf, 0xd4					}, { vpandn ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdf, 0x11					}, { vpandn ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe0, 0xd4					}, { vpavgb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe0, 0x11					}, { vpavgb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe3, 0xd4					}, { vpavgw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe3, 0x11					}, { vpavgw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x74, 0xd4					}, { vpcmpeqb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x74, 0x11					}, { vpcmpeqb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x75, 0xd4					}, { vpcmpeqw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x75, 0x11					}, { vpcmpeqw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x76, 0xd4					}, { vpcmpeqd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x76, 0x11					}, { vpcmpeqd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x29, 0xd4					}, { vpcmpeqq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x29, 0x11					}, { vpcmpeqq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x64, 0xd4					}, { vpcmpgtb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x64, 0x11					}, { vpcmpgtb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x65, 0xd4					}, { vpcmpgtw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x65, 0x11					}, { vpcmpgtw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x66, 0xd4					}, { vpcmpgtd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x66, 0x11					}, { vpcmpgtd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x37, 0xd4					}, { vpcmpgtq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x37, 0x11					}, { vpcmpgtq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x01, 0xd4					}, { vphaddw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x01, 0x11					}, { vphaddw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x02, 0xd4					}, { vphaddd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x02, 0x11					}, { vphaddd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x03, 0xd4					}, { vphaddsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x03, 0x11					}, { vphaddsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x05, 0xd4					}, { vphsubw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x05, 0x11					}, { vphsubw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x06, 0xd4					}, { vphsubd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x06, 0x11					}, { vphsubd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x07, 0xd4					}, { vphsubsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x07, 0x11					}, { vphsubsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf5, 0xd4					}, { vpmaddwd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf5, 0x11					}, { vpmaddwd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x04, 0xd4					}, { vpmaddubsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x04, 0x11					}, { vpmaddubsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3c, 0xd4					}, { vpmaxsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3c, 0x11					}, { vpmaxsb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xee, 0xd4					}, { vpmaxsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xee, 0x11					}, { vpmaxsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3d, 0xd4					}, { vpmaxsd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3d, 0x11					}, { vpmaxsd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xde, 0xd4					}, { vpmaxub ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xde, 0x11					}, { vpmaxub ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3e, 0xd4					}, { vpmaxuw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3e, 0x11					}, { vpmaxuw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3f, 0xd4					}, { vpmaxud ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3f, 0x11					}, { vpmaxud ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x38, 0xd4					}, { vpminsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x38, 0x11					}, { vpminsb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xea, 0xd4					}, { vpminsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xea, 0x11					}, { vpminsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x39, 0xd4					}, { vpminsd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x39, 0x11					}, { vpminsd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xda, 0xd4					}, { vpminub ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xda, 0x11					}, { vpminub ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3a, 0xd4					}, { vpminuw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3a, 0x11					}, { vpminuw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3b, 0xd4					}, { vpminud ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3b, 0x11					}, { vpminud ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe4, 0xd4					}, { vpmulhuw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe4, 0x11					}, { vpmulhuw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0b, 0xd4					}, { vpmulhrsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0b, 0x11					}, { vpmulhrsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe5, 0xd4					}, { vpmulhw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe5, 0x11					}, { vpmulhw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd5, 0xd4					}, { vpmullw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd5, 0x11					}, { vpmullw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x40, 0xd4					}, { vpmulld ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x40, 0x11					}, { vpmulld ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf4, 0xd4					}, { vpmuludq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf4, 0x11					}, { vpmuludq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x28, 0xd4					}, { vpmuldq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x28, 0x11					}, { vpmuldq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xeb, 0xd4					}, { vpor ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xeb, 0x11					}, { vpor ymm2,ymm6,YWORD rcx				}
+testcase	{ 0xc5, 0xcd, 0xf6, 0xd4					}, { vpsadbw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf6, 0x11					}, { vpsadbw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x00, 0xd4					}, { vpshufb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x00, 0x11					}, { vpshufb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x08, 0xd4					}, { vpsignb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x08, 0x11					}, { vpsignb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x09, 0xd4					}, { vpsignw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x09, 0x11					}, { vpsignw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0a, 0xd4					}, { vpsignd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0a, 0x11					}, { vpsignd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf8, 0xd4					}, { vpsubb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf8, 0x11					}, { vpsubb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf9, 0xd4					}, { vpsubw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf9, 0x11					}, { vpsubw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfa, 0xd4					}, { vpsubd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfa, 0x11					}, { vpsubd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfb, 0xd4					}, { vpsubq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfb, 0x11					}, { vpsubq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe8, 0xd4					}, { vpsubsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe8, 0x11					}, { vpsubsb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe9, 0xd4					}, { vpsubsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe9, 0x11					}, { vpsubsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd8, 0xd4					}, { vpsubusb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd8, 0x11					}, { vpsubusb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd9, 0xd4					}, { vpsubusw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd9, 0x11					}, { vpsubusw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x68, 0xd4					}, { vpunpckhbw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x68, 0x11					}, { vpunpckhbw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x69, 0xd4					}, { vpunpckhwd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x69, 0x11					}, { vpunpckhwd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x6a, 0xd4					}, { vpunpckhdq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6a, 0x11					}, { vpunpckhdq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x6d, 0xd4					}, { vpunpckhqdq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6d, 0x11					}, { vpunpckhqdq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x60, 0xd4					}, { vpunpcklbw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x60, 0x11					}, { vpunpcklbw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x61, 0xd4					}, { vpunpcklwd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x61, 0x11					}, { vpunpcklwd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x62, 0xd4					}, { vpunpckldq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x62, 0x11					}, { vpunpckldq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x6c, 0xd4					}, { vpunpcklqdq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6c, 0x11					}, { vpunpcklqdq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xef, 0xd4					}, { vpxor ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xef, 0x11					}, { vpxor ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1c, 0xf4					}, { vpabsb ymm6,ymm4					}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1c, 0x21					}, { vpabsb ymm4,YWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1d, 0xf4					}, { vpabsw ymm6,ymm4					}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1d, 0x21					}, { vpabsw ymm4,YWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1e, 0xf4					}, { vpabsd ymm6,ymm4					}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1e, 0x21					}, { vpabsd ymm4,YWORD rcx				}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x42, 0xd4, 0x07				}, { vmpsadbw ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x42, 0x11, 0x07				}, { vmpsadbw ymm2,ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0f, 0xd4, 0x07				}, { vpalignr ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0f, 0x11, 0x07				}, { vpalignr ymm2,ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0e, 0xd4, 0x07				}, { vpblendw ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0e, 0x11, 0x07				}, { vpblendw ymm2,ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x6d, 0x4c, 0xfe, 0x40				}, { vpblendvb ymm7,ymm2,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe3, 0x6d, 0x4c, 0x39, 0x40				}, { vpblendvb ymm7,ymm2,YWORD rcx,ymm4		}
+testcase	{ 0xc5, 0xcd, 0xf1, 0xd4					}, { vpsllw ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xf1, 0x11					}, { vpsllw ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf2, 0xd4					}, { vpslld ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xf2, 0x11					}, { vpslld ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf3, 0xd4					}, { vpsllq ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xf3, 0x11					}, { vpsllq ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe1, 0xd4					}, { vpsraw ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xe1, 0x11					}, { vpsraw ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe2, 0xd4					}, { vpsrad ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xe2, 0x11					}, { vpsrad ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd1, 0xd4					}, { vpsrlw ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xd1, 0x11					}, { vpsrlw ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd2, 0xd4					}, { vpsrld ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xd2, 0x11					}, { vpsrld ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd3, 0xd4					}, { vpsrlq ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xd3, 0x11					}, { vpsrlq ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x20, 0xe4					}, { vpmovsxbw ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x20, 0x21					}, { vpmovsxbw ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x23, 0xe4					}, { vpmovsxwd ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x23, 0x21					}, { vpmovsxwd ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x25, 0xe4					}, { vpmovsxdq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x25, 0x21					}, { vpmovsxdq ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x30, 0xe4					}, { vpmovzxbw ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x30, 0x21					}, { vpmovzxbw ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x33, 0xe4					}, { vpmovzxwd ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x33, 0x21					}, { vpmovzxwd ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x35, 0xe4					}, { vpmovzxdq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x35, 0x21					}, { vpmovzxdq ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x21, 0xf4					}, { vpmovsxbd ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x21, 0x21					}, { vpmovsxbd ymm4,QWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x24, 0xf4					}, { vpmovsxwq ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x24, 0x21					}, { vpmovsxwq ymm4,QWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x31, 0xf4					}, { vpmovzxbd ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x31, 0x21					}, { vpmovzxbd ymm4,QWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x34, 0xf4					}, { vpmovzxwq ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x34, 0x21					}, { vpmovzxwq ymm4,QWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x22, 0xe4					}, { vpmovsxbq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x22, 0x21					}, { vpmovsxbq ymm4,DWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x32, 0xe4					}, { vpmovzxbq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x32, 0x21					}, { vpmovzxbq ymm4,DWORD rcx				}
+testcase	{ 0xc5, 0xfd, 0xd7, 0xcc					}, { vpmovmskb ecx,ymm4					}
+testcase	{ 0xc5, 0xfd, 0xd7, 0xcc					}, { vpmovmskb ecx,ymm4					}
+testcase	{ 0xc5, 0xed, 0x72, 0xf6, 0x07					}, { vpslld ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xfe, 0x07					}, { vpslldq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xf6, 0x07					}, { vpsllq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x71, 0xf6, 0x07					}, { vpsllw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x72, 0xe6, 0x07					}, { vpsrad ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x71, 0xe6, 0x07					}, { vpsraw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x72, 0xd6, 0x07					}, { vpsrld ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xde, 0x07					}, { vpsrldq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x73, 0xd6, 0x07					}, { vpsrlq ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xed, 0x71, 0xd6, 0x07					}, { vpsrlw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xfd, 0x70, 0xd6, 0x07					}, { vpshufd ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xfd, 0x70, 0x31, 0x07					}, { vpshufd ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc5, 0xfd, 0x70, 0x31, 0x07					}, { vpshufd ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc5, 0xfe, 0x70, 0xd6, 0x07					}, { vpshufhw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xfe, 0x70, 0x31, 0x07					}, { vpshufhw ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc5, 0xfe, 0x70, 0x31, 0x07					}, { vpshufhw ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc5, 0xff, 0x70, 0xd6, 0x07					}, { vpshuflw ymm2,ymm6,0x7				}
+testcase	{ 0xc5, 0xff, 0x70, 0x31, 0x07					}, { vpshuflw ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc5, 0xff, 0x70, 0x31, 0x07					}, { vpshuflw ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc5, 0xcd, 0x6b, 0xd4					}, { vpackssdw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6b, 0x11					}, { vpackssdw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x6b, 0x11					}, { vpackssdw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x63, 0xd4					}, { vpacksswb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x63, 0x11					}, { vpacksswb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x63, 0x11					}, { vpacksswb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x2b, 0xd4					}, { vpackusdw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x2b, 0x11					}, { vpackusdw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x2b, 0x11					}, { vpackusdw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x67, 0xd4					}, { vpackuswb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x67, 0x11					}, { vpackuswb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x67, 0x11					}, { vpackuswb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfc, 0xd4					}, { vpaddb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfc, 0x11					}, { vpaddb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfc, 0x11					}, { vpaddb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfd, 0xd4					}, { vpaddw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfd, 0x11					}, { vpaddw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfd, 0x11					}, { vpaddw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfe, 0xd4					}, { vpaddd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfe, 0x11					}, { vpaddd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfe, 0x11					}, { vpaddd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd4, 0xd4					}, { vpaddq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd4, 0x11					}, { vpaddq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd4, 0x11					}, { vpaddq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xec, 0xd4					}, { vpaddsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xec, 0x11					}, { vpaddsb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xec, 0x11					}, { vpaddsb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xed, 0xd4					}, { vpaddsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xed, 0x11					}, { vpaddsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xed, 0x11					}, { vpaddsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xdc, 0xd4					}, { vpaddusb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdc, 0x11					}, { vpaddusb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xdc, 0x11					}, { vpaddusb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xdd, 0xd4					}, { vpaddusw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdd, 0x11					}, { vpaddusw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xdd, 0x11					}, { vpaddusw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xdb, 0xd4					}, { vpand ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdb, 0x11					}, { vpand ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xdb, 0x11					}, { vpand ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xdf, 0xd4					}, { vpandn ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xdf, 0x11					}, { vpandn ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xdf, 0x11					}, { vpandn ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe0, 0xd4					}, { vpavgb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe0, 0x11					}, { vpavgb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe0, 0x11					}, { vpavgb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe3, 0xd4					}, { vpavgw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe3, 0x11					}, { vpavgw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe3, 0x11					}, { vpavgw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x74, 0xd4					}, { vpcmpeqb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x74, 0x11					}, { vpcmpeqb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x74, 0x11					}, { vpcmpeqb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x75, 0xd4					}, { vpcmpeqw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x75, 0x11					}, { vpcmpeqw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x75, 0x11					}, { vpcmpeqw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x76, 0xd4					}, { vpcmpeqd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x76, 0x11					}, { vpcmpeqd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x76, 0x11					}, { vpcmpeqd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x29, 0xd4					}, { vpcmpeqq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x29, 0x11					}, { vpcmpeqq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x29, 0x11					}, { vpcmpeqq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x64, 0xd4					}, { vpcmpgtb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x64, 0x11					}, { vpcmpgtb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x64, 0x11					}, { vpcmpgtb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x65, 0xd4					}, { vpcmpgtw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x65, 0x11					}, { vpcmpgtw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x65, 0x11					}, { vpcmpgtw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x66, 0xd4					}, { vpcmpgtd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x66, 0x11					}, { vpcmpgtd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x66, 0x11					}, { vpcmpgtd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x37, 0xd4					}, { vpcmpgtq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x37, 0x11					}, { vpcmpgtq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x37, 0x11					}, { vpcmpgtq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x01, 0xd4					}, { vphaddw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x01, 0x11					}, { vphaddw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x01, 0x11					}, { vphaddw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x02, 0xd4					}, { vphaddd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x02, 0x11					}, { vphaddd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x02, 0x11					}, { vphaddd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x03, 0xd4					}, { vphaddsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x03, 0x11					}, { vphaddsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x03, 0x11					}, { vphaddsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x05, 0xd4					}, { vphsubw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x05, 0x11					}, { vphsubw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x05, 0x11					}, { vphsubw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x06, 0xd4					}, { vphsubd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x06, 0x11					}, { vphsubd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x06, 0x11					}, { vphsubd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x07, 0xd4					}, { vphsubsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x07, 0x11					}, { vphsubsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x07, 0x11					}, { vphsubsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf5, 0xd4					}, { vpmaddwd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf5, 0x11					}, { vpmaddwd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf5, 0x11					}, { vpmaddwd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x04, 0xd4					}, { vpmaddubsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x04, 0x11					}, { vpmaddubsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x04, 0x11					}, { vpmaddubsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3c, 0xd4					}, { vpmaxsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3c, 0x11					}, { vpmaxsb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3c, 0x11					}, { vpmaxsb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xee, 0xd4					}, { vpmaxsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xee, 0x11					}, { vpmaxsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xee, 0x11					}, { vpmaxsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3d, 0xd4					}, { vpmaxsd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3d, 0x11					}, { vpmaxsd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3d, 0x11					}, { vpmaxsd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xde, 0xd4					}, { vpmaxub ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xde, 0x11					}, { vpmaxub ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xde, 0x11					}, { vpmaxub ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3e, 0xd4					}, { vpmaxuw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3e, 0x11					}, { vpmaxuw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3e, 0x11					}, { vpmaxuw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3f, 0xd4					}, { vpmaxud ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3f, 0x11					}, { vpmaxud ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3f, 0x11					}, { vpmaxud ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x38, 0xd4					}, { vpminsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x38, 0x11					}, { vpminsb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x38, 0x11					}, { vpminsb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xea, 0xd4					}, { vpminsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xea, 0x11					}, { vpminsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xea, 0x11					}, { vpminsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x39, 0xd4					}, { vpminsd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x39, 0x11					}, { vpminsd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x39, 0x11					}, { vpminsd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xda, 0xd4					}, { vpminub ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xda, 0x11					}, { vpminub ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xda, 0x11					}, { vpminub ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3a, 0xd4					}, { vpminuw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3a, 0x11					}, { vpminuw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3a, 0x11					}, { vpminuw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3b, 0xd4					}, { vpminud ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3b, 0x11					}, { vpminud ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x3b, 0x11					}, { vpminud ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe4, 0xd4					}, { vpmulhuw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe4, 0x11					}, { vpmulhuw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe4, 0x11					}, { vpmulhuw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0b, 0xd4					}, { vpmulhrsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0b, 0x11					}, { vpmulhrsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0b, 0x11					}, { vpmulhrsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe5, 0xd4					}, { vpmulhw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe5, 0x11					}, { vpmulhw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe5, 0x11					}, { vpmulhw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd5, 0xd4					}, { vpmullw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd5, 0x11					}, { vpmullw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd5, 0x11					}, { vpmullw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x40, 0xd4					}, { vpmulld ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x40, 0x11					}, { vpmulld ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x40, 0x11					}, { vpmulld ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf4, 0xd4					}, { vpmuludq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf4, 0x11					}, { vpmuludq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf4, 0x11					}, { vpmuludq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x28, 0xd4					}, { vpmuldq ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x28, 0x11					}, { vpmuldq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x28, 0x11					}, { vpmuldq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xeb, 0xd4					}, { vpor ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xeb, 0x11					}, { vpor ymm2,ymm6,YWORD rcx				}
+testcase	{ 0xc5, 0xcd, 0xeb, 0x11					}, { vpor ymm2,ymm6,YWORD rcx				}
+testcase	{ 0xc5, 0xcd, 0xf6, 0xd4					}, { vpsadbw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf6, 0x11					}, { vpsadbw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf6, 0x11					}, { vpsadbw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x00, 0xd4					}, { vpshufb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x00, 0x11					}, { vpshufb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x00, 0x11					}, { vpshufb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x08, 0xd4					}, { vpsignb ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x08, 0x11					}, { vpsignb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x08, 0x11					}, { vpsignb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x09, 0xd4					}, { vpsignw ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x09, 0x11					}, { vpsignw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x09, 0x11					}, { vpsignw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0a, 0xd4					}, { vpsignd ymm2,ymm6,ymm4				}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0a, 0x11					}, { vpsignd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x4d, 0x0a, 0x11					}, { vpsignd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf8, 0xd4					}, { vpsubb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf8, 0x11					}, { vpsubb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf8, 0x11					}, { vpsubb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf9, 0xd4					}, { vpsubw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xf9, 0x11					}, { vpsubw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf9, 0x11					}, { vpsubw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfa, 0xd4					}, { vpsubd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfa, 0x11					}, { vpsubd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfa, 0x11					}, { vpsubd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfb, 0xd4					}, { vpsubq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xfb, 0x11					}, { vpsubq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xfb, 0x11					}, { vpsubq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe8, 0xd4					}, { vpsubsb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe8, 0x11					}, { vpsubsb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe8, 0x11					}, { vpsubsb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe9, 0xd4					}, { vpsubsw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xe9, 0x11					}, { vpsubsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe9, 0x11					}, { vpsubsw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd8, 0xd4					}, { vpsubusb ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd8, 0x11					}, { vpsubusb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd8, 0x11					}, { vpsubusb ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd9, 0xd4					}, { vpsubusw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xd9, 0x11					}, { vpsubusw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd9, 0x11					}, { vpsubusw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x68, 0xd4					}, { vpunpckhbw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x68, 0x11					}, { vpunpckhbw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x68, 0x11					}, { vpunpckhbw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x69, 0xd4					}, { vpunpckhwd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x69, 0x11					}, { vpunpckhwd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x69, 0x11					}, { vpunpckhwd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x6a, 0xd4					}, { vpunpckhdq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6a, 0x11					}, { vpunpckhdq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x6a, 0x11					}, { vpunpckhdq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x6d, 0xd4					}, { vpunpckhqdq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6d, 0x11					}, { vpunpckhqdq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x6d, 0x11					}, { vpunpckhqdq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x60, 0xd4					}, { vpunpcklbw ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x60, 0x11					}, { vpunpcklbw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x60, 0x11					}, { vpunpcklbw ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x61, 0xd4					}, { vpunpcklwd ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x61, 0x11					}, { vpunpcklwd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x61, 0x11					}, { vpunpcklwd ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x62, 0xd4					}, { vpunpckldq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x62, 0x11					}, { vpunpckldq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x62, 0x11					}, { vpunpckldq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x6c, 0xd4					}, { vpunpcklqdq ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0x6c, 0x11					}, { vpunpcklqdq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0x6c, 0x11					}, { vpunpcklqdq ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xef, 0xd4					}, { vpxor ymm2,ymm6,ymm4				}
+testcase	{ 0xc5, 0xcd, 0xef, 0x11					}, { vpxor ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xef, 0x11					}, { vpxor ymm2,ymm6,YWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1c, 0xf4					}, { vpabsb ymm6,ymm4					}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1c, 0x21					}, { vpabsb ymm4,YWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1c, 0x21					}, { vpabsb ymm4,YWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1d, 0xf4					}, { vpabsw ymm6,ymm4					}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1d, 0x21					}, { vpabsw ymm4,YWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1d, 0x21					}, { vpabsw ymm4,YWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1e, 0xf4					}, { vpabsd ymm6,ymm4					}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1e, 0x21					}, { vpabsd ymm4,YWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x1e, 0x21					}, { vpabsd ymm4,YWORD rcx				}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x42, 0xd4, 0x07				}, { vmpsadbw ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x42, 0x11, 0x07				}, { vmpsadbw ymm2,ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x42, 0x11, 0x07				}, { vmpsadbw ymm2,ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0f, 0xd4, 0x07				}, { vpalignr ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0f, 0x11, 0x07				}, { vpalignr ymm2,ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0f, 0x11, 0x07				}, { vpalignr ymm2,ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0e, 0xd4, 0x07				}, { vpblendw ymm2,ymm6,ymm4,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0e, 0x11, 0x07				}, { vpblendw ymm2,ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x4d, 0x0e, 0x11, 0x07				}, { vpblendw ymm2,ymm6,YWORD rcx,0x7			}
+testcase	{ 0xc4, 0xe3, 0x6d, 0x4c, 0xfe, 0x40				}, { vpblendvb ymm7,ymm2,ymm6,ymm4			}
+testcase	{ 0xc4, 0xe3, 0x6d, 0x4c, 0x39, 0x40				}, { vpblendvb ymm7,ymm2,YWORD rcx,ymm4		}
+testcase	{ 0xc4, 0xe3, 0x6d, 0x4c, 0x39, 0x40				}, { vpblendvb ymm7,ymm2,YWORD rcx,ymm4		}
+testcase	{ 0xc5, 0xcd, 0xf1, 0xd4					}, { vpsllw ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xf1, 0x11					}, { vpsllw ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf1, 0x11					}, { vpsllw ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf2, 0xd4					}, { vpslld ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xf2, 0x11					}, { vpslld ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf2, 0x11					}, { vpslld ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf3, 0xd4					}, { vpsllq ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xf3, 0x11					}, { vpsllq ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xf3, 0x11					}, { vpsllq ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe1, 0xd4					}, { vpsraw ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xe1, 0x11					}, { vpsraw ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe1, 0x11					}, { vpsraw ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe2, 0xd4					}, { vpsrad ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xe2, 0x11					}, { vpsrad ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xe2, 0x11					}, { vpsrad ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd1, 0xd4					}, { vpsrlw ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xd1, 0x11					}, { vpsrlw ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd1, 0x11					}, { vpsrlw ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd2, 0xd4					}, { vpsrld ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xd2, 0x11					}, { vpsrld ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd2, 0x11					}, { vpsrld ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd3, 0xd4					}, { vpsrlq ymm2,ymm6,xmm4				}
+testcase	{ 0xc5, 0xcd, 0xd3, 0x11					}, { vpsrlq ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc5, 0xcd, 0xd3, 0x11					}, { vpsrlq ymm2,ymm6,OWORD rcx			}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x20, 0xe4					}, { vpmovsxbw ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x20, 0x21					}, { vpmovsxbw ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x20, 0x21					}, { vpmovsxbw ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x23, 0xe4					}, { vpmovsxwd ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x23, 0x21					}, { vpmovsxwd ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x23, 0x21					}, { vpmovsxwd ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x25, 0xe4					}, { vpmovsxdq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x25, 0x21					}, { vpmovsxdq ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x25, 0x21					}, { vpmovsxdq ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x30, 0xe4					}, { vpmovzxbw ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x30, 0x21					}, { vpmovzxbw ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x30, 0x21					}, { vpmovzxbw ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x33, 0xe4					}, { vpmovzxwd ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x33, 0x21					}, { vpmovzxwd ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x33, 0x21					}, { vpmovzxwd ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x35, 0xe4					}, { vpmovzxdq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x35, 0x21					}, { vpmovzxdq ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x35, 0x21					}, { vpmovzxdq ymm4,OWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x21, 0xf4					}, { vpmovsxbd ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x21, 0x21					}, { vpmovsxbd ymm4,QWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x21, 0x21					}, { vpmovsxbd ymm4,QWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x24, 0xf4					}, { vpmovsxwq ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x24, 0x21					}, { vpmovsxwq ymm4,QWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x24, 0x21					}, { vpmovsxwq ymm4,QWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x31, 0xf4					}, { vpmovzxbd ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x31, 0x21					}, { vpmovzxbd ymm4,QWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x31, 0x21					}, { vpmovzxbd ymm4,QWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x34, 0xf4					}, { vpmovzxwq ymm6,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x34, 0x21					}, { vpmovzxwq ymm4,QWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x34, 0x21					}, { vpmovzxwq ymm4,QWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x22, 0xe4					}, { vpmovsxbq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x22, 0x21					}, { vpmovsxbq ymm4,DWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x22, 0x21					}, { vpmovsxbq ymm4,DWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x32, 0xe4					}, { vpmovzxbq ymm4,xmm4				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x32, 0x21					}, { vpmovzxbq ymm4,DWORD rcx				}
+testcase	{ 0xc4, 0xe2, 0x7d, 0x32, 0x21					}, { vpmovzxbq ymm4,DWORD rcx				}
+
+; EOF

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/avx2.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/avx2.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/avx512cd.asm Added

@@ -0,0 +1,105 @@
+; AVX-512CD testcases from gas
+;------------------------
+;
+; This file is taken from there
+;     https://gnu.googlesource.com/binutils/+/master/gas/testsuite/gas/i386/x86-64-avx512cd-intel.d
+; So the original author is "H.J. Lu" <hongjiu dot lu at intel dot com>
+;
+; Jin Kyu Song converted it for the nasm testing suite using gas2nasm.py
+
+%macro testcase 2
+ %ifdef BIN
+  db %1
+ %endif
+ %ifdef SRC
+  %2
+ %endif
+%endmacro
+
+
+bits 64
+
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0xc4, 0xf5                                     }, { vpconflictd zmm30,zmm29                                      }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0xc4, 0xf5                                     }, { vpconflictd zmm30{k7},zmm29                                  }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0xc4, 0xf5                                     }, { vpconflictd zmm30{k7}{z},zmm29                               }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xc4, 0x31                                     }, { vpconflictd zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0xc4, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpconflictd zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xc4, 0x31                                     }, { vpconflictd zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xc4, 0x72, 0x7f                               }, { vpconflictd zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xc4, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpconflictd zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xc4, 0x72, 0x80                               }, { vpconflictd zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xc4, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpconflictd zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xc4, 0x72, 0x7f                               }, { vpconflictd zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xc4, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpconflictd zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xc4, 0x72, 0x80                               }, { vpconflictd zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xc4, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpconflictd zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0xc4, 0xf5                                     }, { vpconflictq zmm30,zmm29                                      }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0xc4, 0xf5                                     }, { vpconflictq zmm30{k7},zmm29                                  }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0xc4, 0xf5                                     }, { vpconflictq zmm30{k7}{z},zmm29                               }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xc4, 0x31                                     }, { vpconflictq zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0xc4, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpconflictq zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xc4, 0x31                                     }, { vpconflictq zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xc4, 0x72, 0x7f                               }, { vpconflictq zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xc4, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpconflictq zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xc4, 0x72, 0x80                               }, { vpconflictq zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xc4, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpconflictq zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xc4, 0x72, 0x7f                               }, { vpconflictq zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xc4, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpconflictq zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xc4, 0x72, 0x80                               }, { vpconflictq zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xc4, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpconflictq zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0x44, 0xf5                                     }, { vplzcntd zmm30,zmm29                                         }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x44, 0xf5                                     }, { vplzcntd zmm30{k7},zmm29                                     }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x44, 0xf5                                     }, { vplzcntd zmm30{k7}{z},zmm29                                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x44, 0x31                                     }, { vplzcntd zmm30,ZWORD rcx                                   }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x44, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vplzcntd zmm30,ZWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x44, 0x31                                     }, { vplzcntd zmm30,DWORD rcx{1to16}                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x44, 0x72, 0x7f                               }, { vplzcntd zmm30,ZWORD rdx+0x1fc0                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x44, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vplzcntd zmm30,ZWORD rdx+0x2000                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x44, 0x72, 0x80                               }, { vplzcntd zmm30,ZWORD rdx-0x2000                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x44, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vplzcntd zmm30,ZWORD rdx-0x2040                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x44, 0x72, 0x7f                               }, { vplzcntd zmm30,DWORD rdx+0x1fc{1to16}                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x44, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vplzcntd zmm30,DWORD rdx+0x200{1to16}                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x44, 0x72, 0x80                               }, { vplzcntd zmm30,DWORD rdx-0x200{1to16}                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x44, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vplzcntd zmm30,DWORD rdx-0x204{1to16}                      }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0x44, 0xf5                                     }, { vplzcntq zmm30,zmm29                                         }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0x44, 0xf5                                     }, { vplzcntq zmm30{k7},zmm29                                     }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0x44, 0xf5                                     }, { vplzcntq zmm30{k7}{z},zmm29                                  }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x44, 0x31                                     }, { vplzcntq zmm30,ZWORD rcx                                   }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x44, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vplzcntq zmm30,ZWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x44, 0x31                                     }, { vplzcntq zmm30,QWORD rcx{1to8}                             }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x44, 0x72, 0x7f                               }, { vplzcntq zmm30,ZWORD rdx+0x1fc0                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x44, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vplzcntq zmm30,ZWORD rdx+0x2000                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x44, 0x72, 0x80                               }, { vplzcntq zmm30,ZWORD rdx-0x2000                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x44, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vplzcntq zmm30,ZWORD rdx-0x2040                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x44, 0x72, 0x7f                               }, { vplzcntq zmm30,QWORD rdx+0x3f8{1to8}                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x44, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vplzcntq zmm30,QWORD rdx+0x400{1to8}                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x44, 0x72, 0x80                               }, { vplzcntq zmm30,QWORD rdx-0x400{1to8}                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x44, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vplzcntq zmm30,QWORD rdx-0x408{1to8}                       }
+testcase	{ 0x62, 0x92, 0x16, 0x40, 0x27, 0xec                                     }, { vptestnmd k5,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x92, 0x16, 0x47, 0x27, 0xec                                     }, { vptestnmd k5{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0xf2, 0x16, 0x40, 0x27, 0x29                                     }, { vptestnmd k5,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0xb2, 0x16, 0x40, 0x27, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vptestnmd k5,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf2, 0x16, 0x50, 0x27, 0x29                                     }, { vptestnmd k5,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf2, 0x16, 0x40, 0x27, 0x6a, 0x7f                               }, { vptestnmd k5,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf2, 0x16, 0x40, 0x27, 0xaa, 0x00, 0x20, 0x00, 0x00             }, { vptestnmd k5,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf2, 0x16, 0x40, 0x27, 0x6a, 0x80                               }, { vptestnmd k5,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf2, 0x16, 0x40, 0x27, 0xaa, 0xc0, 0xdf, 0xff, 0xff             }, { vptestnmd k5,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf2, 0x16, 0x50, 0x27, 0x6a, 0x7f                               }, { vptestnmd k5,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf2, 0x16, 0x50, 0x27, 0xaa, 0x00, 0x02, 0x00, 0x00             }, { vptestnmd k5,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf2, 0x16, 0x50, 0x27, 0x6a, 0x80                               }, { vptestnmd k5,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf2, 0x16, 0x50, 0x27, 0xaa, 0xfc, 0xfd, 0xff, 0xff             }, { vptestnmd k5,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x92, 0x96, 0x40, 0x27, 0xec                                     }, { vptestnmq k5,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x92, 0x96, 0x47, 0x27, 0xec                                     }, { vptestnmq k5{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0xf2, 0x96, 0x40, 0x27, 0x29                                     }, { vptestnmq k5,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0xb2, 0x96, 0x40, 0x27, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vptestnmq k5,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf2, 0x96, 0x50, 0x27, 0x29                                     }, { vptestnmq k5,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf2, 0x96, 0x40, 0x27, 0x6a, 0x7f                               }, { vptestnmq k5,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf2, 0x96, 0x40, 0x27, 0xaa, 0x00, 0x20, 0x00, 0x00             }, { vptestnmq k5,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf2, 0x96, 0x40, 0x27, 0x6a, 0x80                               }, { vptestnmq k5,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf2, 0x96, 0x40, 0x27, 0xaa, 0xc0, 0xdf, 0xff, 0xff             }, { vptestnmq k5,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf2, 0x96, 0x50, 0x27, 0x6a, 0x7f                               }, { vptestnmq k5,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf2, 0x96, 0x50, 0x27, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vptestnmq k5,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf2, 0x96, 0x50, 0x27, 0x6a, 0x80                               }, { vptestnmq k5,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf2, 0x96, 0x50, 0x27, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vptestnmq k5,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x3a, 0xf6                                     }, { vpbroadcastmw2d zmm30,k6                                     }
+testcase	{ 0x62, 0x62, 0xfe, 0x48, 0x2a, 0xf6                                     }, { vpbroadcastmb2q zmm30,k6                                     }

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/avx512cd.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/avx512cd.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/avx512er.asm Added

@@ -0,0 +1,143 @@
+; AVX-512ER testcases from gas
+;------------------------
+;
+; This file is taken from there
+;     https://gnu.googlesource.com/binutils/+/master/gas/testsuite/gas/i386/x86-64-avx512er-intel.d
+; So the original author is "H.J. Lu" <hongjiu dot lu at intel dot com>
+;
+; Jin Kyu Song converted it for the nasm testing suite using gas2nasm.py
+
+%macro testcase 2
+ %ifdef BIN
+  db %1
+ %endif
+ %ifdef SRC
+  %2
+ %endif
+%endmacro
+
+
+bits 64
+
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0xc8, 0xf5                                     }, { vexp2ps zmm30,zmm29                                          }
+testcase	{ 0x62, 0x02, 0x7d, 0x18, 0xc8, 0xf5                                     }, { vexp2ps zmm30,zmm29,{sae}                                    }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xc8, 0x31                                     }, { vexp2ps zmm30,ZWORD rcx                                    }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0xc8, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vexp2ps zmm30,ZWORD rax+r14*8+0x123                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xc8, 0x31                                     }, { vexp2ps zmm30,DWORD rcx{1to16}                             }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xc8, 0x72, 0x7f                               }, { vexp2ps zmm30,ZWORD rdx+0x1fc0                             }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xc8, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vexp2ps zmm30,ZWORD rdx+0x2000                             }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xc8, 0x72, 0x80                               }, { vexp2ps zmm30,ZWORD rdx-0x2000                             }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xc8, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vexp2ps zmm30,ZWORD rdx-0x2040                             }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xc8, 0x72, 0x7f                               }, { vexp2ps zmm30,DWORD rdx+0x1fc{1to16}                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xc8, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vexp2ps zmm30,DWORD rdx+0x200{1to16}                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xc8, 0x72, 0x80                               }, { vexp2ps zmm30,DWORD rdx-0x200{1to16}                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xc8, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vexp2ps zmm30,DWORD rdx-0x204{1to16}                       }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0xc8, 0xf5                                     }, { vexp2pd zmm30,zmm29                                          }
+testcase	{ 0x62, 0x02, 0xfd, 0x18, 0xc8, 0xf5                                     }, { vexp2pd zmm30,zmm29,{sae}                                    }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xc8, 0x31                                     }, { vexp2pd zmm30,ZWORD rcx                                    }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0xc8, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vexp2pd zmm30,ZWORD rax+r14*8+0x123                        }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xc8, 0x31                                     }, { vexp2pd zmm30,QWORD rcx{1to8}                              }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xc8, 0x72, 0x7f                               }, { vexp2pd zmm30,ZWORD rdx+0x1fc0                             }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xc8, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vexp2pd zmm30,ZWORD rdx+0x2000                             }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xc8, 0x72, 0x80                               }, { vexp2pd zmm30,ZWORD rdx-0x2000                             }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xc8, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vexp2pd zmm30,ZWORD rdx-0x2040                             }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xc8, 0x72, 0x7f                               }, { vexp2pd zmm30,QWORD rdx+0x3f8{1to8}                        }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xc8, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vexp2pd zmm30,QWORD rdx+0x400{1to8}                        }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xc8, 0x72, 0x80                               }, { vexp2pd zmm30,QWORD rdx-0x400{1to8}                        }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xc8, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vexp2pd zmm30,QWORD rdx-0x408{1to8}                        }
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0xca, 0xf5                                     }, { vrcp28ps zmm30,zmm29                                         }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0xca, 0xf5                                     }, { vrcp28ps zmm30{k7},zmm29                                     }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0xca, 0xf5                                     }, { vrcp28ps zmm30{k7}{z},zmm29                                  }
+testcase	{ 0x62, 0x02, 0x7d, 0x18, 0xca, 0xf5                                     }, { vrcp28ps zmm30,zmm29,{sae}                                   }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xca, 0x31                                     }, { vrcp28ps zmm30,ZWORD rcx                                   }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0xca, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrcp28ps zmm30,ZWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xca, 0x31                                     }, { vrcp28ps zmm30,DWORD rcx{1to16}                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xca, 0x72, 0x7f                               }, { vrcp28ps zmm30,ZWORD rdx+0x1fc0                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xca, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vrcp28ps zmm30,ZWORD rdx+0x2000                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xca, 0x72, 0x80                               }, { vrcp28ps zmm30,ZWORD rdx-0x2000                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xca, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vrcp28ps zmm30,ZWORD rdx-0x2040                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xca, 0x72, 0x7f                               }, { vrcp28ps zmm30,DWORD rdx+0x1fc{1to16}                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xca, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vrcp28ps zmm30,DWORD rdx+0x200{1to16}                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xca, 0x72, 0x80                               }, { vrcp28ps zmm30,DWORD rdx-0x200{1to16}                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xca, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vrcp28ps zmm30,DWORD rdx-0x204{1to16}                      }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0xca, 0xf5                                     }, { vrcp28pd zmm30,zmm29                                         }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0xca, 0xf5                                     }, { vrcp28pd zmm30{k7},zmm29                                     }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0xca, 0xf5                                     }, { vrcp28pd zmm30{k7}{z},zmm29                                  }
+testcase	{ 0x62, 0x02, 0xfd, 0x18, 0xca, 0xf5                                     }, { vrcp28pd zmm30,zmm29,{sae}                                   }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xca, 0x31                                     }, { vrcp28pd zmm30,ZWORD rcx                                   }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0xca, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrcp28pd zmm30,ZWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xca, 0x31                                     }, { vrcp28pd zmm30,QWORD rcx{1to8}                             }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xca, 0x72, 0x7f                               }, { vrcp28pd zmm30,ZWORD rdx+0x1fc0                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xca, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vrcp28pd zmm30,ZWORD rdx+0x2000                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xca, 0x72, 0x80                               }, { vrcp28pd zmm30,ZWORD rdx-0x2000                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xca, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vrcp28pd zmm30,ZWORD rdx-0x2040                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xca, 0x72, 0x7f                               }, { vrcp28pd zmm30,QWORD rdx+0x3f8{1to8}                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xca, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vrcp28pd zmm30,QWORD rdx+0x400{1to8}                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xca, 0x72, 0x80                               }, { vrcp28pd zmm30,QWORD rdx-0x400{1to8}                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xca, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vrcp28pd zmm30,QWORD rdx-0x408{1to8}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0xcb, 0xf4                                     }, { vrcp28ss xmm30{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0xcb, 0xf4                                     }, { vrcp28ss xmm30{k7}{z},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0xcb, 0xf4                                     }, { vrcp28ss xmm30{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xcb, 0x31                                     }, { vrcp28ss xmm30{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0xcb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrcp28ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xcb, 0x72, 0x7f                               }, { vrcp28ss xmm30{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xcb, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vrcp28ss xmm30{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xcb, 0x72, 0x80                               }, { vrcp28ss xmm30{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xcb, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vrcp28ss xmm30{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0xcb, 0xf4                                     }, { vrcp28sd xmm30{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0xcb, 0xf4                                     }, { vrcp28sd xmm30{k7}{z},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0xcb, 0xf4                                     }, { vrcp28sd xmm30{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xcb, 0x31                                     }, { vrcp28sd xmm30{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0xcb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrcp28sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xcb, 0x72, 0x7f                               }, { vrcp28sd xmm30{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xcb, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vrcp28sd xmm30{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xcb, 0x72, 0x80                               }, { vrcp28sd xmm30{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xcb, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vrcp28sd xmm30{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0xcc, 0xf5                                     }, { vrsqrt28ps zmm30,zmm29                                       }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0xcc, 0xf5                                     }, { vrsqrt28ps zmm30{k7},zmm29                                   }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0xcc, 0xf5                                     }, { vrsqrt28ps zmm30{k7}{z},zmm29                                }
+testcase	{ 0x62, 0x02, 0x7d, 0x18, 0xcc, 0xf5                                     }, { vrsqrt28ps zmm30,zmm29,{sae}                                 }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xcc, 0x31                                     }, { vrsqrt28ps zmm30,ZWORD rcx                                 }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0xcc, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrsqrt28ps zmm30,ZWORD rax+r14*8+0x123                     }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xcc, 0x31                                     }, { vrsqrt28ps zmm30,DWORD rcx{1to16}                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xcc, 0x72, 0x7f                               }, { vrsqrt28ps zmm30,ZWORD rdx+0x1fc0                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xcc, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vrsqrt28ps zmm30,ZWORD rdx+0x2000                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xcc, 0x72, 0x80                               }, { vrsqrt28ps zmm30,ZWORD rdx-0x2000                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0xcc, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vrsqrt28ps zmm30,ZWORD rdx-0x2040                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xcc, 0x72, 0x7f                               }, { vrsqrt28ps zmm30,DWORD rdx+0x1fc{1to16}                    }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xcc, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vrsqrt28ps zmm30,DWORD rdx+0x200{1to16}                    }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xcc, 0x72, 0x80                               }, { vrsqrt28ps zmm30,DWORD rdx-0x200{1to16}                    }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0xcc, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vrsqrt28ps zmm30,DWORD rdx-0x204{1to16}                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0xcc, 0xf5                                     }, { vrsqrt28pd zmm30,zmm29                                       }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0xcc, 0xf5                                     }, { vrsqrt28pd zmm30{k7},zmm29                                   }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0xcc, 0xf5                                     }, { vrsqrt28pd zmm30{k7}{z},zmm29                                }
+testcase	{ 0x62, 0x02, 0xfd, 0x18, 0xcc, 0xf5                                     }, { vrsqrt28pd zmm30,zmm29,{sae}                                 }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xcc, 0x31                                     }, { vrsqrt28pd zmm30,ZWORD rcx                                 }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0xcc, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrsqrt28pd zmm30,ZWORD rax+r14*8+0x123                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xcc, 0x31                                     }, { vrsqrt28pd zmm30,QWORD rcx{1to8}                           }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xcc, 0x72, 0x7f                               }, { vrsqrt28pd zmm30,ZWORD rdx+0x1fc0                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xcc, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vrsqrt28pd zmm30,ZWORD rdx+0x2000                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xcc, 0x72, 0x80                               }, { vrsqrt28pd zmm30,ZWORD rdx-0x2000                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0xcc, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vrsqrt28pd zmm30,ZWORD rdx-0x2040                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xcc, 0x72, 0x7f                               }, { vrsqrt28pd zmm30,QWORD rdx+0x3f8{1to8}                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xcc, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vrsqrt28pd zmm30,QWORD rdx+0x400{1to8}                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xcc, 0x72, 0x80                               }, { vrsqrt28pd zmm30,QWORD rdx-0x400{1to8}                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0xcc, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vrsqrt28pd zmm30,QWORD rdx-0x408{1to8}                     }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0xcd, 0xf4                                     }, { vrsqrt28ss xmm30{k7},xmm29,xmm28                             }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0xcd, 0xf4                                     }, { vrsqrt28ss xmm30{k7}{z},xmm29,xmm28                          }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0xcd, 0xf4                                     }, { vrsqrt28ss xmm30{k7},xmm29,xmm28,{sae}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xcd, 0x31                                     }, { vrsqrt28ss xmm30{k7},xmm29,DWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0xcd, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrsqrt28ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xcd, 0x72, 0x7f                               }, { vrsqrt28ss xmm30{k7},xmm29,DWORD rdx+0x1fc                 }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xcd, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vrsqrt28ss xmm30{k7},xmm29,DWORD rdx+0x200                 }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xcd, 0x72, 0x80                               }, { vrsqrt28ss xmm30{k7},xmm29,DWORD rdx-0x200                 }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xcd, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vrsqrt28ss xmm30{k7},xmm29,DWORD rdx-0x204                 }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0xcd, 0xf4                                     }, { vrsqrt28sd xmm30{k7},xmm29,xmm28                             }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0xcd, 0xf4                                     }, { vrsqrt28sd xmm30{k7}{z},xmm29,xmm28                          }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0xcd, 0xf4                                     }, { vrsqrt28sd xmm30{k7},xmm29,xmm28,{sae}                       }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xcd, 0x31                                     }, { vrsqrt28sd xmm30{k7},xmm29,QWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0xcd, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrsqrt28sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xcd, 0x72, 0x7f                               }, { vrsqrt28sd xmm30{k7},xmm29,QWORD rdx+0x3f8                 }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xcd, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vrsqrt28sd xmm30{k7},xmm29,QWORD rdx+0x400                 }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xcd, 0x72, 0x80                               }, { vrsqrt28sd xmm30{k7},xmm29,QWORD rdx-0x400                 }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xcd, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vrsqrt28sd xmm30{k7},xmm29,QWORD rdx-0x408                 }

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/avx512er.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/avx512er.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/avx512f.asm Added

@@ -0,0 +1,7000 @@
+;Testname=avx512f; Arguments=-fbin -oavx512f.bin -O0 -DSRC; Files=stdout stderr avx512f.bin
+; AVX-512F testcases from gas
+;------------------------
+;
+; This file is taken from there
+;     https://gnu.googlesource.com/binutils/+/master/gas/testsuite/gas/i386/x86-64-avx512f-intel.d
+; So the original author is "H.J. Lu" <hongjiu dot lu at intel dot com>
+;
+; Jin Kyu Song converted it for the nasm testing suite using gas2nasm.py
+
+%macro testcase 2
+ %ifdef BIN
+  db %1
+ %endif
+ %ifdef SRC
+  %2
+ %endif
+%endmacro
+
+
+bits 64
+
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0x58, 0xf4                                     }, { vaddpd zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0x58, 0xf4                                     }, { vaddpd zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0x58, 0xf4                                     }, { vaddpd zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x95, 0x10, 0x58, 0xf4                                     }, { vaddpd zmm30,zmm29,zmm28,{rn-sae}                            }
+testcase	{ 0x62, 0x01, 0x95, 0x50, 0x58, 0xf4                                     }, { vaddpd zmm30,zmm29,zmm28,{ru-sae}                            }
+testcase	{ 0x62, 0x01, 0x95, 0x30, 0x58, 0xf4                                     }, { vaddpd zmm30,zmm29,zmm28,{rd-sae}                            }
+testcase	{ 0x62, 0x01, 0x95, 0x70, 0x58, 0xf4                                     }, { vaddpd zmm30,zmm29,zmm28,{rz-sae}                            }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x58, 0x31                                     }, { vaddpd zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0x58, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vaddpd zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x58, 0x31                                     }, { vaddpd zmm30,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x58, 0x72, 0x7f                               }, { vaddpd zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x58, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vaddpd zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x58, 0x72, 0x80                               }, { vaddpd zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x58, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vaddpd zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x58, 0x72, 0x7f                               }, { vaddpd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x58, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vaddpd zmm30,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x58, 0x72, 0x80                               }, { vaddpd zmm30,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x58, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vaddpd zmm30,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x01, 0x14, 0x40, 0x58, 0xf4                                     }, { vaddps zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x14, 0x47, 0x58, 0xf4                                     }, { vaddps zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x14, 0xc7, 0x58, 0xf4                                     }, { vaddps zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x14, 0x10, 0x58, 0xf4                                     }, { vaddps zmm30,zmm29,zmm28,{rn-sae}                            }
+testcase	{ 0x62, 0x01, 0x14, 0x50, 0x58, 0xf4                                     }, { vaddps zmm30,zmm29,zmm28,{ru-sae}                            }
+testcase	{ 0x62, 0x01, 0x14, 0x30, 0x58, 0xf4                                     }, { vaddps zmm30,zmm29,zmm28,{rd-sae}                            }
+testcase	{ 0x62, 0x01, 0x14, 0x70, 0x58, 0xf4                                     }, { vaddps zmm30,zmm29,zmm28,{rz-sae}                            }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x58, 0x31                                     }, { vaddps zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x14, 0x40, 0x58, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vaddps zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x58, 0x31                                     }, { vaddps zmm30,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x58, 0x72, 0x7f                               }, { vaddps zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x58, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vaddps zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x58, 0x72, 0x80                               }, { vaddps zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x58, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vaddps zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x58, 0x72, 0x7f                               }, { vaddps zmm30,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x58, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vaddps zmm30,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x58, 0x72, 0x80                               }, { vaddps zmm30,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x58, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vaddps zmm30,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x01, 0x97, 0x07, 0x58, 0xf4                                     }, { vaddsd xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x97, 0x87, 0x58, 0xf4                                     }, { vaddsd xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x97, 0x17, 0x58, 0xf4                                     }, { vaddsd xmm30{k7},xmm29,xmm28,{rn-sae}                        }
+testcase	{ 0x62, 0x01, 0x97, 0x57, 0x58, 0xf4                                     }, { vaddsd xmm30{k7},xmm29,xmm28,{ru-sae}                        }
+testcase	{ 0x62, 0x01, 0x97, 0x37, 0x58, 0xf4                                     }, { vaddsd xmm30{k7},xmm29,xmm28,{rd-sae}                        }
+testcase	{ 0x62, 0x01, 0x97, 0x77, 0x58, 0xf4                                     }, { vaddsd xmm30{k7},xmm29,xmm28,{rz-sae}                        }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x58, 0x31                                     }, { vaddsd xmm30{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x97, 0x07, 0x58, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vaddsd xmm30{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x58, 0x72, 0x7f                               }, { vaddsd xmm30{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x58, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vaddsd xmm30{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x58, 0x72, 0x80                               }, { vaddsd xmm30{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x58, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vaddsd xmm30{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x01, 0x16, 0x07, 0x58, 0xf4                                     }, { vaddss xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x16, 0x87, 0x58, 0xf4                                     }, { vaddss xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x16, 0x17, 0x58, 0xf4                                     }, { vaddss xmm30{k7},xmm29,xmm28,{rn-sae}                        }
+testcase	{ 0x62, 0x01, 0x16, 0x57, 0x58, 0xf4                                     }, { vaddss xmm30{k7},xmm29,xmm28,{ru-sae}                        }
+testcase	{ 0x62, 0x01, 0x16, 0x37, 0x58, 0xf4                                     }, { vaddss xmm30{k7},xmm29,xmm28,{rd-sae}                        }
+testcase	{ 0x62, 0x01, 0x16, 0x77, 0x58, 0xf4                                     }, { vaddss xmm30{k7},xmm29,xmm28,{rz-sae}                        }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x58, 0x31                                     }, { vaddss xmm30{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x16, 0x07, 0x58, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vaddss xmm30{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x58, 0x72, 0x7f                               }, { vaddss xmm30{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x58, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vaddss xmm30{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x58, 0x72, 0x80                               }, { vaddss xmm30{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x58, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vaddss xmm30{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x03, 0x15, 0x40, 0x03, 0xf4, 0xab                               }, { valignd zmm30,zmm29,zmm28,0xab                               }
+testcase	{ 0x62, 0x03, 0x15, 0x47, 0x03, 0xf4, 0xab                               }, { valignd zmm30{k7},zmm29,zmm28,0xab                           }
+testcase	{ 0x62, 0x03, 0x15, 0xc7, 0x03, 0xf4, 0xab                               }, { valignd zmm30{k7}{z},zmm29,zmm28,0xab                        }
+testcase	{ 0x62, 0x03, 0x15, 0x40, 0x03, 0xf4, 0x7b                               }, { valignd zmm30,zmm29,zmm28,0x7b                               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x03, 0x31, 0x7b                               }, { valignd zmm30,zmm29,ZWORD rcx,0x7b                         }
+testcase	{ 0x62, 0x23, 0x15, 0x40, 0x03, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { valignd zmm30,zmm29,ZWORD rax+r14*8+0x123,0x7b             }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x03, 0x31, 0x7b                               }, { valignd zmm30,zmm29,DWORD rcx{1to16},0x7b                  }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x03, 0x72, 0x7f, 0x7b                         }, { valignd zmm30,zmm29,ZWORD rdx+0x1fc0,0x7b                  }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x03, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { valignd zmm30,zmm29,ZWORD rdx+0x2000,0x7b                  }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x03, 0x72, 0x80, 0x7b                         }, { valignd zmm30,zmm29,ZWORD rdx-0x2000,0x7b                  }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x03, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { valignd zmm30,zmm29,ZWORD rdx-0x2040,0x7b                  }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x03, 0x72, 0x7f, 0x7b                         }, { valignd zmm30,zmm29,DWORD rdx+0x1fc{1to16},0x7b            }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x03, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { valignd zmm30,zmm29,DWORD rdx+0x200{1to16},0x7b            }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x03, 0x72, 0x80, 0x7b                         }, { valignd zmm30,zmm29,DWORD rdx-0x200{1to16},0x7b            }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x03, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { valignd zmm30,zmm29,DWORD rdx-0x204{1to16},0x7b            }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x65, 0xf4                                     }, { vblendmpd zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x65, 0xf4                                     }, { vblendmpd zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x65, 0xf4                                     }, { vblendmpd zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x65, 0x31                                     }, { vblendmpd zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x65, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vblendmpd zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x65, 0x31                                     }, { vblendmpd zmm30,zmm29,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x65, 0x72, 0x7f                               }, { vblendmpd zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x65, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vblendmpd zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x65, 0x72, 0x80                               }, { vblendmpd zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x65, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vblendmpd zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x65, 0x72, 0x7f                               }, { vblendmpd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x65, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vblendmpd zmm30,zmm29,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x65, 0x72, 0x80                               }, { vblendmpd zmm30,zmm29,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x65, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vblendmpd zmm30,zmm29,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x65, 0xf4                                     }, { vblendmps zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x65, 0xf4                                     }, { vblendmps zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x65, 0xf4                                     }, { vblendmps zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x65, 0x31                                     }, { vblendmps zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x65, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vblendmps zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x65, 0x31                                     }, { vblendmps zmm30,zmm29,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x65, 0x72, 0x7f                               }, { vblendmps zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x65, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vblendmps zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x65, 0x72, 0x80                               }, { vblendmps zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x65, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vblendmps zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x65, 0x72, 0x7f                               }, { vblendmps zmm30,zmm29,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x65, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vblendmps zmm30,zmm29,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x65, 0x72, 0x80                               }, { vblendmps zmm30,zmm29,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x65, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vblendmps zmm30,zmm29,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x1a, 0x31                                     }, { vbroadcastf32x4 zmm30,OWORD rcx                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x1a, 0x31                                     }, { vbroadcastf32x4 zmm30{k7},OWORD rcx                        }
+testcase	{ 0x62, 0x62, 0x7d, 0xcf, 0x1a, 0x31                                     }, { vbroadcastf32x4 zmm30{k7}{z},OWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x1a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vbroadcastf32x4 zmm30,OWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x1a, 0x72, 0x7f                               }, { vbroadcastf32x4 zmm30,OWORD rdx+0x7f0                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x1a, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vbroadcastf32x4 zmm30,OWORD rdx+0x800                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x1a, 0x72, 0x80                               }, { vbroadcastf32x4 zmm30,OWORD rdx-0x800                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x1a, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vbroadcastf32x4 zmm30,OWORD rdx-0x810                      }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x1b, 0x31                                     }, { vbroadcastf64x4 zmm30,YWORD rcx                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x4f, 0x1b, 0x31                                     }, { vbroadcastf64x4 zmm30{k7},YWORD rcx                        }
+testcase	{ 0x62, 0x62, 0xfd, 0xcf, 0x1b, 0x31                                     }, { vbroadcastf64x4 zmm30{k7}{z},YWORD rcx                     }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x1b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vbroadcastf64x4 zmm30,YWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x1b, 0x72, 0x7f                               }, { vbroadcastf64x4 zmm30,YWORD rdx+0xfe0                      }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x1b, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vbroadcastf64x4 zmm30,YWORD rdx+0x1000                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x1b, 0x72, 0x80                               }, { vbroadcastf64x4 zmm30,YWORD rdx-0x1000                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x1b, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vbroadcastf64x4 zmm30,YWORD rdx-0x1020                     }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x5a, 0x31                                     }, { vbroadcasti32x4 zmm30,OWORD rcx                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x5a, 0x31                                     }, { vbroadcasti32x4 zmm30{k7},OWORD rcx                        }
+testcase	{ 0x62, 0x62, 0x7d, 0xcf, 0x5a, 0x31                                     }, { vbroadcasti32x4 zmm30{k7}{z},OWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x5a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vbroadcasti32x4 zmm30,OWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x5a, 0x72, 0x7f                               }, { vbroadcasti32x4 zmm30,OWORD rdx+0x7f0                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x5a, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vbroadcasti32x4 zmm30,OWORD rdx+0x800                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x5a, 0x72, 0x80                               }, { vbroadcasti32x4 zmm30,OWORD rdx-0x800                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x5a, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vbroadcasti32x4 zmm30,OWORD rdx-0x810                      }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x5b, 0x31                                     }, { vbroadcasti64x4 zmm30,YWORD rcx                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x4f, 0x5b, 0x31                                     }, { vbroadcasti64x4 zmm30{k7},YWORD rcx                        }
+testcase	{ 0x62, 0x62, 0xfd, 0xcf, 0x5b, 0x31                                     }, { vbroadcasti64x4 zmm30{k7}{z},YWORD rcx                     }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x5b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vbroadcasti64x4 zmm30,YWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x5b, 0x72, 0x7f                               }, { vbroadcasti64x4 zmm30,YWORD rdx+0xfe0                      }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x5b, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vbroadcasti64x4 zmm30,YWORD rdx+0x1000                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x5b, 0x72, 0x80                               }, { vbroadcasti64x4 zmm30,YWORD rdx-0x1000                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x5b, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vbroadcasti64x4 zmm30,YWORD rdx-0x1020                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x19, 0x31                                     }, { vbroadcastsd zmm30,QWORD rcx                               }
+testcase	{ 0x62, 0x62, 0xfd, 0x4f, 0x19, 0x31                                     }, { vbroadcastsd zmm30{k7},QWORD rcx                           }
+testcase	{ 0x62, 0x62, 0xfd, 0xcf, 0x19, 0x31                                     }, { vbroadcastsd zmm30{k7}{z},QWORD rcx                        }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x19, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vbroadcastsd zmm30,QWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x19, 0x72, 0x7f                               }, { vbroadcastsd zmm30,QWORD rdx+0x3f8                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x19, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vbroadcastsd zmm30,QWORD rdx+0x400                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x19, 0x72, 0x80                               }, { vbroadcastsd zmm30,QWORD rdx-0x400                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x19, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vbroadcastsd zmm30,QWORD rdx-0x408                         }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0x19, 0xf5                                     }, { vbroadcastsd zmm30{k7},xmm29                                 }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0x19, 0xf5                                     }, { vbroadcastsd zmm30{k7}{z},xmm29                              }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x18, 0x31                                     }, { vbroadcastss zmm30,DWORD rcx                               }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x18, 0x31                                     }, { vbroadcastss zmm30{k7},DWORD rcx                           }
+testcase	{ 0x62, 0x62, 0x7d, 0xcf, 0x18, 0x31                                     }, { vbroadcastss zmm30{k7}{z},DWORD rcx                        }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x18, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vbroadcastss zmm30,DWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x18, 0x72, 0x7f                               }, { vbroadcastss zmm30,DWORD rdx+0x1fc                         }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x18, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vbroadcastss zmm30,DWORD rdx+0x200                         }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x18, 0x72, 0x80                               }, { vbroadcastss zmm30,DWORD rdx-0x200                         }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x18, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vbroadcastss zmm30,DWORD rdx-0x204                         }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x18, 0xf5                                     }, { vbroadcastss zmm30{k7},xmm29                                 }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x18, 0xf5                                     }, { vbroadcastss zmm30{k7}{z},xmm29                              }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0xab                               }, { vcmppd k5,zmm30,zmm29,0xab                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0xab                               }, { vcmppd k5{k7},zmm30,zmm29,0xab                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0xab                               }, { vcmppd k5,zmm30,zmm29,{sae},0xab                             }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x7b                               }, { vcmppd k5,zmm30,zmm29,0x7b                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x7b                               }, { vcmppd k5,zmm30,zmm29,{sae},0x7b                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x7b                               }, { vcmppd k5,zmm30,ZWORD rcx,0x7b                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vcmppd k5,zmm30,ZWORD rax+r14*8+0x123,0x7b                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x7b                               }, { vcmppd k5,zmm30,QWORD rcx{1to8},0x7b                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x7b                         }, { vcmppd k5,zmm30,ZWORD rdx+0x1fc0,0x7b                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vcmppd k5,zmm30,ZWORD rdx+0x2000,0x7b                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x7b                         }, { vcmppd k5,zmm30,ZWORD rdx-0x2000,0x7b                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vcmppd k5,zmm30,ZWORD rdx-0x2040,0x7b                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x7b                         }, { vcmppd k5,zmm30,QWORD rdx+0x3f8{1to8},0x7b                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vcmppd k5,zmm30,QWORD rdx+0x400{1to8},0x7b                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x7b                         }, { vcmppd k5,zmm30,QWORD rdx-0x400{1to8},0x7b                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vcmppd k5,zmm30,QWORD rdx-0x408{1to8},0x7b                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x00                               }, { vcmpeqpd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x00                               }, { vcmpeqpd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x00                               }, { vcmpeqpd k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x00                               }, { vcmpeqpd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vcmpeqpd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x00                               }, { vcmpeqpd k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x00                         }, { vcmpeqpd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x00       }, { vcmpeqpd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x00                         }, { vcmpeqpd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x00       }, { vcmpeqpd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x00                         }, { vcmpeqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x00       }, { vcmpeqpd k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x00                         }, { vcmpeqpd k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x00       }, { vcmpeqpd k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x00                               }, { vcmpeqpd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x00                               }, { vcmpeqpd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x00                               }, { vcmpeqpd k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x00                               }, { vcmpeqpd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vcmpeqpd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x00                               }, { vcmpeqpd k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x00                         }, { vcmpeqpd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x00       }, { vcmpeqpd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x00                         }, { vcmpeqpd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x00       }, { vcmpeqpd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x00                         }, { vcmpeqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x00       }, { vcmpeqpd k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x00                         }, { vcmpeqpd k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x00       }, { vcmpeqpd k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x01                               }, { vcmpltpd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x01                               }, { vcmpltpd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x01                               }, { vcmpltpd k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x01                               }, { vcmpltpd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vcmpltpd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x01                               }, { vcmpltpd k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x01                         }, { vcmpltpd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x01       }, { vcmpltpd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x01                         }, { vcmpltpd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x01       }, { vcmpltpd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x01                         }, { vcmpltpd k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x01       }, { vcmpltpd k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x01                         }, { vcmpltpd k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x01       }, { vcmpltpd k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x01                               }, { vcmpltpd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x01                               }, { vcmpltpd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x01                               }, { vcmpltpd k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x01                               }, { vcmpltpd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vcmpltpd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x01                               }, { vcmpltpd k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x01                         }, { vcmpltpd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x01       }, { vcmpltpd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x01                         }, { vcmpltpd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x01       }, { vcmpltpd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x01                         }, { vcmpltpd k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x01       }, { vcmpltpd k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x01                         }, { vcmpltpd k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x01       }, { vcmpltpd k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x02                               }, { vcmplepd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x02                               }, { vcmplepd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x02                               }, { vcmplepd k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x02                               }, { vcmplepd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vcmplepd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x02                               }, { vcmplepd k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x02                         }, { vcmplepd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x02       }, { vcmplepd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x02                         }, { vcmplepd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x02       }, { vcmplepd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x02                         }, { vcmplepd k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x02       }, { vcmplepd k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x02                         }, { vcmplepd k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x02       }, { vcmplepd k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x02                               }, { vcmplepd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x02                               }, { vcmplepd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x02                               }, { vcmplepd k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x02                               }, { vcmplepd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vcmplepd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x02                               }, { vcmplepd k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x02                         }, { vcmplepd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x02       }, { vcmplepd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x02                         }, { vcmplepd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x02       }, { vcmplepd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x02                         }, { vcmplepd k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x02       }, { vcmplepd k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x02                         }, { vcmplepd k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x02       }, { vcmplepd k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x03                               }, { vcmpunordpd k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x03                               }, { vcmpunordpd k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x03                               }, { vcmpunordpd k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x03                               }, { vcmpunordpd k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x03 }, { vcmpunordpd k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x03                               }, { vcmpunordpd k5,zmm30,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x03                         }, { vcmpunordpd k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x03       }, { vcmpunordpd k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x03                         }, { vcmpunordpd k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x03       }, { vcmpunordpd k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x03                         }, { vcmpunordpd k5,zmm30,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x03       }, { vcmpunordpd k5,zmm30,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x03                         }, { vcmpunordpd k5,zmm30,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x03       }, { vcmpunordpd k5,zmm30,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x03                               }, { vcmpunordpd k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x03                               }, { vcmpunordpd k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x03                               }, { vcmpunordpd k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x03                               }, { vcmpunordpd k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x03 }, { vcmpunordpd k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x03                               }, { vcmpunordpd k5,zmm30,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x03                         }, { vcmpunordpd k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x03       }, { vcmpunordpd k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x03                         }, { vcmpunordpd k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x03       }, { vcmpunordpd k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x03                         }, { vcmpunordpd k5,zmm30,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x03       }, { vcmpunordpd k5,zmm30,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x03                         }, { vcmpunordpd k5,zmm30,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x03       }, { vcmpunordpd k5,zmm30,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x04                               }, { vcmpneqpd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x04                               }, { vcmpneqpd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x04                               }, { vcmpneqpd k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x04                               }, { vcmpneqpd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vcmpneqpd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x04                               }, { vcmpneqpd k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x04                         }, { vcmpneqpd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x04       }, { vcmpneqpd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x04                         }, { vcmpneqpd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x04       }, { vcmpneqpd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x04                         }, { vcmpneqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x04       }, { vcmpneqpd k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x04                         }, { vcmpneqpd k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x04       }, { vcmpneqpd k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x04                               }, { vcmpneqpd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x04                               }, { vcmpneqpd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x04                               }, { vcmpneqpd k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x04                               }, { vcmpneqpd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vcmpneqpd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x04                               }, { vcmpneqpd k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x04                         }, { vcmpneqpd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x04       }, { vcmpneqpd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x04                         }, { vcmpneqpd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x04       }, { vcmpneqpd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x04                         }, { vcmpneqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x04       }, { vcmpneqpd k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x04                         }, { vcmpneqpd k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x04       }, { vcmpneqpd k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x05                               }, { vcmpnltpd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x05                               }, { vcmpnltpd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x05                               }, { vcmpnltpd k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x05                               }, { vcmpnltpd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vcmpnltpd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x05                               }, { vcmpnltpd k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x05                         }, { vcmpnltpd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x05       }, { vcmpnltpd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x05                         }, { vcmpnltpd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x05       }, { vcmpnltpd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x05                         }, { vcmpnltpd k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x05       }, { vcmpnltpd k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x05                         }, { vcmpnltpd k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x05       }, { vcmpnltpd k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x05                               }, { vcmpnltpd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x05                               }, { vcmpnltpd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x05                               }, { vcmpnltpd k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x05                               }, { vcmpnltpd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vcmpnltpd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x05                               }, { vcmpnltpd k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x05                         }, { vcmpnltpd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x05       }, { vcmpnltpd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x05                         }, { vcmpnltpd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x05       }, { vcmpnltpd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x05                         }, { vcmpnltpd k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x05       }, { vcmpnltpd k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x05                         }, { vcmpnltpd k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x05       }, { vcmpnltpd k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x06                               }, { vcmpnlepd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x06                               }, { vcmpnlepd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x06                               }, { vcmpnlepd k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x06                               }, { vcmpnlepd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vcmpnlepd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x06                               }, { vcmpnlepd k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x06                         }, { vcmpnlepd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x06       }, { vcmpnlepd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x06                         }, { vcmpnlepd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x06       }, { vcmpnlepd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x06                         }, { vcmpnlepd k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x06       }, { vcmpnlepd k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x06                         }, { vcmpnlepd k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x06       }, { vcmpnlepd k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x06                               }, { vcmpnlepd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x06                               }, { vcmpnlepd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x06                               }, { vcmpnlepd k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x06                               }, { vcmpnlepd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vcmpnlepd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x06                               }, { vcmpnlepd k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x06                         }, { vcmpnlepd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x06       }, { vcmpnlepd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x06                         }, { vcmpnlepd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x06       }, { vcmpnlepd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x06                         }, { vcmpnlepd k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x06       }, { vcmpnlepd k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x06                         }, { vcmpnlepd k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x06       }, { vcmpnlepd k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x07                               }, { vcmpordpd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x07                               }, { vcmpordpd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x07                               }, { vcmpordpd k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x07                               }, { vcmpordpd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x07 }, { vcmpordpd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x07                               }, { vcmpordpd k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x07                         }, { vcmpordpd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x07       }, { vcmpordpd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x07                         }, { vcmpordpd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x07       }, { vcmpordpd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x07                         }, { vcmpordpd k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x07       }, { vcmpordpd k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x07                         }, { vcmpordpd k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x07       }, { vcmpordpd k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x07                               }, { vcmpordpd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x07                               }, { vcmpordpd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x07                               }, { vcmpordpd k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x07                               }, { vcmpordpd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x07 }, { vcmpordpd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x07                               }, { vcmpordpd k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x07                         }, { vcmpordpd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x07       }, { vcmpordpd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x07                         }, { vcmpordpd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x07       }, { vcmpordpd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x07                         }, { vcmpordpd k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x07       }, { vcmpordpd k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x07                         }, { vcmpordpd k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x07       }, { vcmpordpd k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x08                               }, { vcmpeq_uqpd k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x08                               }, { vcmpeq_uqpd k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x08                               }, { vcmpeq_uqpd k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x08                               }, { vcmpeq_uqpd k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x08 }, { vcmpeq_uqpd k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x08                               }, { vcmpeq_uqpd k5,zmm30,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x08                         }, { vcmpeq_uqpd k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x08       }, { vcmpeq_uqpd k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x08                         }, { vcmpeq_uqpd k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x08       }, { vcmpeq_uqpd k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x08                         }, { vcmpeq_uqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x08       }, { vcmpeq_uqpd k5,zmm30,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x08                         }, { vcmpeq_uqpd k5,zmm30,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x08       }, { vcmpeq_uqpd k5,zmm30,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x09                               }, { vcmpngepd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x09                               }, { vcmpngepd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x09                               }, { vcmpngepd k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x09                               }, { vcmpngepd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x09 }, { vcmpngepd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x09                               }, { vcmpngepd k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x09                         }, { vcmpngepd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x09       }, { vcmpngepd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x09                         }, { vcmpngepd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x09       }, { vcmpngepd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x09                         }, { vcmpngepd k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x09       }, { vcmpngepd k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x09                         }, { vcmpngepd k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x09       }, { vcmpngepd k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x09                               }, { vcmpngepd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x09                               }, { vcmpngepd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x09                               }, { vcmpngepd k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x09                               }, { vcmpngepd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x09 }, { vcmpngepd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x09                               }, { vcmpngepd k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x09                         }, { vcmpngepd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x09       }, { vcmpngepd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x09                         }, { vcmpngepd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x09       }, { vcmpngepd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x09                         }, { vcmpngepd k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x09       }, { vcmpngepd k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x09                         }, { vcmpngepd k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x09       }, { vcmpngepd k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0a                               }, { vcmpngtpd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0a                               }, { vcmpngtpd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0a                               }, { vcmpngtpd k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0a                               }, { vcmpngtpd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0a }, { vcmpngtpd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0a                               }, { vcmpngtpd k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0a                         }, { vcmpngtpd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0a       }, { vcmpngtpd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0a                         }, { vcmpngtpd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0a       }, { vcmpngtpd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0a                         }, { vcmpngtpd k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0a       }, { vcmpngtpd k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0a                         }, { vcmpngtpd k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0a       }, { vcmpngtpd k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0a                               }, { vcmpngtpd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0a                               }, { vcmpngtpd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0a                               }, { vcmpngtpd k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0a                               }, { vcmpngtpd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0a }, { vcmpngtpd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0a                               }, { vcmpngtpd k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0a                         }, { vcmpngtpd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0a       }, { vcmpngtpd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0a                         }, { vcmpngtpd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0a       }, { vcmpngtpd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0a                         }, { vcmpngtpd k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0a       }, { vcmpngtpd k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0a                         }, { vcmpngtpd k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0a       }, { vcmpngtpd k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0b                               }, { vcmpfalsepd k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0b                               }, { vcmpfalsepd k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0b                               }, { vcmpfalsepd k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0b                               }, { vcmpfalsepd k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0b }, { vcmpfalsepd k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0b                               }, { vcmpfalsepd k5,zmm30,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0b                         }, { vcmpfalsepd k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0b       }, { vcmpfalsepd k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0b                         }, { vcmpfalsepd k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0b       }, { vcmpfalsepd k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0b                         }, { vcmpfalsepd k5,zmm30,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0b       }, { vcmpfalsepd k5,zmm30,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0b                         }, { vcmpfalsepd k5,zmm30,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0b       }, { vcmpfalsepd k5,zmm30,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0b                               }, { vcmpfalsepd k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0b                               }, { vcmpfalsepd k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0b                               }, { vcmpfalsepd k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0b                               }, { vcmpfalsepd k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0b }, { vcmpfalsepd k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0b                               }, { vcmpfalsepd k5,zmm30,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0b                         }, { vcmpfalsepd k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0b       }, { vcmpfalsepd k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0b                         }, { vcmpfalsepd k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0b       }, { vcmpfalsepd k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0b                         }, { vcmpfalsepd k5,zmm30,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0b       }, { vcmpfalsepd k5,zmm30,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0b                         }, { vcmpfalsepd k5,zmm30,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0b       }, { vcmpfalsepd k5,zmm30,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0c                               }, { vcmpneq_oqpd k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0c                               }, { vcmpneq_oqpd k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0c                               }, { vcmpneq_oqpd k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0c                               }, { vcmpneq_oqpd k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0c }, { vcmpneq_oqpd k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0c                               }, { vcmpneq_oqpd k5,zmm30,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0c                         }, { vcmpneq_oqpd k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0c       }, { vcmpneq_oqpd k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0c                         }, { vcmpneq_oqpd k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0c       }, { vcmpneq_oqpd k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0c                         }, { vcmpneq_oqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0c       }, { vcmpneq_oqpd k5,zmm30,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0c                         }, { vcmpneq_oqpd k5,zmm30,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0c       }, { vcmpneq_oqpd k5,zmm30,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0d                               }, { vcmpgepd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0d                               }, { vcmpgepd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0d                               }, { vcmpgepd k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0d                               }, { vcmpgepd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0d }, { vcmpgepd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0d                               }, { vcmpgepd k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0d                         }, { vcmpgepd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0d       }, { vcmpgepd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0d                         }, { vcmpgepd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0d       }, { vcmpgepd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0d                         }, { vcmpgepd k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0d       }, { vcmpgepd k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0d                         }, { vcmpgepd k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0d       }, { vcmpgepd k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0d                               }, { vcmpgepd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0d                               }, { vcmpgepd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0d                               }, { vcmpgepd k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0d                               }, { vcmpgepd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0d }, { vcmpgepd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0d                               }, { vcmpgepd k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0d                         }, { vcmpgepd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0d       }, { vcmpgepd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0d                         }, { vcmpgepd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0d       }, { vcmpgepd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0d                         }, { vcmpgepd k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0d       }, { vcmpgepd k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0d                         }, { vcmpgepd k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0d       }, { vcmpgepd k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0e                               }, { vcmpgtpd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0e                               }, { vcmpgtpd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0e                               }, { vcmpgtpd k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0e                               }, { vcmpgtpd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0e }, { vcmpgtpd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0e                               }, { vcmpgtpd k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0e                         }, { vcmpgtpd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0e       }, { vcmpgtpd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0e                         }, { vcmpgtpd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0e       }, { vcmpgtpd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0e                         }, { vcmpgtpd k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0e       }, { vcmpgtpd k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0e                         }, { vcmpgtpd k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0e       }, { vcmpgtpd k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0e                               }, { vcmpgtpd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0e                               }, { vcmpgtpd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0e                               }, { vcmpgtpd k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0e                               }, { vcmpgtpd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0e }, { vcmpgtpd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0e                               }, { vcmpgtpd k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0e                         }, { vcmpgtpd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0e       }, { vcmpgtpd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0e                         }, { vcmpgtpd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0e       }, { vcmpgtpd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0e                         }, { vcmpgtpd k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0e       }, { vcmpgtpd k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0e                         }, { vcmpgtpd k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0e       }, { vcmpgtpd k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0f                               }, { vcmptruepd k5,zmm30,zmm29                                    }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0f                               }, { vcmptruepd k5{k7},zmm30,zmm29                                }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0f                               }, { vcmptruepd k5,zmm30,zmm29,{sae}                              }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0f                               }, { vcmptruepd k5,zmm30,ZWORD rcx                              }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0f }, { vcmptruepd k5,zmm30,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0f                               }, { vcmptruepd k5,zmm30,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0f                         }, { vcmptruepd k5,zmm30,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0f       }, { vcmptruepd k5,zmm30,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0f                         }, { vcmptruepd k5,zmm30,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0f       }, { vcmptruepd k5,zmm30,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0f                         }, { vcmptruepd k5,zmm30,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0f       }, { vcmptruepd k5,zmm30,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0f                         }, { vcmptruepd k5,zmm30,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0f       }, { vcmptruepd k5,zmm30,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0f                               }, { vcmptruepd k5,zmm30,zmm29                                    }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0f                               }, { vcmptruepd k5{k7},zmm30,zmm29                                }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0f                               }, { vcmptruepd k5,zmm30,zmm29,{sae}                              }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0f                               }, { vcmptruepd k5,zmm30,ZWORD rcx                              }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0f }, { vcmptruepd k5,zmm30,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0f                               }, { vcmptruepd k5,zmm30,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0f                         }, { vcmptruepd k5,zmm30,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0f       }, { vcmptruepd k5,zmm30,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0f                         }, { vcmptruepd k5,zmm30,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0f       }, { vcmptruepd k5,zmm30,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0f                         }, { vcmptruepd k5,zmm30,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0f       }, { vcmptruepd k5,zmm30,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0f                         }, { vcmptruepd k5,zmm30,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0f       }, { vcmptruepd k5,zmm30,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x10                               }, { vcmpeq_ospd k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x10                               }, { vcmpeq_ospd k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x10                               }, { vcmpeq_ospd k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x10                               }, { vcmpeq_ospd k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x10 }, { vcmpeq_ospd k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x10                               }, { vcmpeq_ospd k5,zmm30,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x10                         }, { vcmpeq_ospd k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x10       }, { vcmpeq_ospd k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x10                         }, { vcmpeq_ospd k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x10       }, { vcmpeq_ospd k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x10                         }, { vcmpeq_ospd k5,zmm30,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x10       }, { vcmpeq_ospd k5,zmm30,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x10                         }, { vcmpeq_ospd k5,zmm30,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x10       }, { vcmpeq_ospd k5,zmm30,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x11                               }, { vcmplt_oqpd k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x11                               }, { vcmplt_oqpd k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x11                               }, { vcmplt_oqpd k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x11                               }, { vcmplt_oqpd k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x11 }, { vcmplt_oqpd k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x11                               }, { vcmplt_oqpd k5,zmm30,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x11                         }, { vcmplt_oqpd k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x11       }, { vcmplt_oqpd k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x11                         }, { vcmplt_oqpd k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x11       }, { vcmplt_oqpd k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x11                         }, { vcmplt_oqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x11       }, { vcmplt_oqpd k5,zmm30,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x11                         }, { vcmplt_oqpd k5,zmm30,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x11       }, { vcmplt_oqpd k5,zmm30,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x12                               }, { vcmple_oqpd k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x12                               }, { vcmple_oqpd k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x12                               }, { vcmple_oqpd k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x12                               }, { vcmple_oqpd k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x12 }, { vcmple_oqpd k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x12                               }, { vcmple_oqpd k5,zmm30,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x12                         }, { vcmple_oqpd k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x12       }, { vcmple_oqpd k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x12                         }, { vcmple_oqpd k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x12       }, { vcmple_oqpd k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x12                         }, { vcmple_oqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x12       }, { vcmple_oqpd k5,zmm30,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x12                         }, { vcmple_oqpd k5,zmm30,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x12       }, { vcmple_oqpd k5,zmm30,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x13                               }, { vcmpunord_spd k5,zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x13                               }, { vcmpunord_spd k5{k7},zmm30,zmm29                             }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x13                               }, { vcmpunord_spd k5,zmm30,zmm29,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x13                               }, { vcmpunord_spd k5,zmm30,ZWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x13 }, { vcmpunord_spd k5,zmm30,ZWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x13                               }, { vcmpunord_spd k5,zmm30,QWORD rcx{1to8}                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x13                         }, { vcmpunord_spd k5,zmm30,ZWORD rdx+0x1fc0                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x13       }, { vcmpunord_spd k5,zmm30,ZWORD rdx+0x2000                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x13                         }, { vcmpunord_spd k5,zmm30,ZWORD rdx-0x2000                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x13       }, { vcmpunord_spd k5,zmm30,ZWORD rdx-0x2040                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x13                         }, { vcmpunord_spd k5,zmm30,QWORD rdx+0x3f8{1to8}               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x13       }, { vcmpunord_spd k5,zmm30,QWORD rdx+0x400{1to8}               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x13                         }, { vcmpunord_spd k5,zmm30,QWORD rdx-0x400{1to8}               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x13       }, { vcmpunord_spd k5,zmm30,QWORD rdx-0x408{1to8}               }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x14                               }, { vcmpneq_uspd k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x14                               }, { vcmpneq_uspd k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x14                               }, { vcmpneq_uspd k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x14                               }, { vcmpneq_uspd k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x14 }, { vcmpneq_uspd k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x14                               }, { vcmpneq_uspd k5,zmm30,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x14                         }, { vcmpneq_uspd k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x14       }, { vcmpneq_uspd k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x14                         }, { vcmpneq_uspd k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x14       }, { vcmpneq_uspd k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x14                         }, { vcmpneq_uspd k5,zmm30,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x14       }, { vcmpneq_uspd k5,zmm30,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x14                         }, { vcmpneq_uspd k5,zmm30,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x14       }, { vcmpneq_uspd k5,zmm30,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x15                               }, { vcmpnlt_uqpd k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x15                               }, { vcmpnlt_uqpd k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x15                               }, { vcmpnlt_uqpd k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x15                               }, { vcmpnlt_uqpd k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x15 }, { vcmpnlt_uqpd k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x15                               }, { vcmpnlt_uqpd k5,zmm30,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x15                         }, { vcmpnlt_uqpd k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x15       }, { vcmpnlt_uqpd k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x15                         }, { vcmpnlt_uqpd k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x15       }, { vcmpnlt_uqpd k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x15                         }, { vcmpnlt_uqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x15       }, { vcmpnlt_uqpd k5,zmm30,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x15                         }, { vcmpnlt_uqpd k5,zmm30,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x15       }, { vcmpnlt_uqpd k5,zmm30,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x16                               }, { vcmpnle_uqpd k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x16                               }, { vcmpnle_uqpd k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x16                               }, { vcmpnle_uqpd k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x16                               }, { vcmpnle_uqpd k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x16 }, { vcmpnle_uqpd k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x16                               }, { vcmpnle_uqpd k5,zmm30,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x16                         }, { vcmpnle_uqpd k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x16       }, { vcmpnle_uqpd k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x16                         }, { vcmpnle_uqpd k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x16       }, { vcmpnle_uqpd k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x16                         }, { vcmpnle_uqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x16       }, { vcmpnle_uqpd k5,zmm30,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x16                         }, { vcmpnle_uqpd k5,zmm30,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x16       }, { vcmpnle_uqpd k5,zmm30,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x17                               }, { vcmpord_spd k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x17                               }, { vcmpord_spd k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x17                               }, { vcmpord_spd k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x17                               }, { vcmpord_spd k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x17 }, { vcmpord_spd k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x17                               }, { vcmpord_spd k5,zmm30,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x17                         }, { vcmpord_spd k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x17       }, { vcmpord_spd k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x17                         }, { vcmpord_spd k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x17       }, { vcmpord_spd k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x17                         }, { vcmpord_spd k5,zmm30,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x17       }, { vcmpord_spd k5,zmm30,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x17                         }, { vcmpord_spd k5,zmm30,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x17       }, { vcmpord_spd k5,zmm30,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x18                               }, { vcmpeq_uspd k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x18                               }, { vcmpeq_uspd k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x18                               }, { vcmpeq_uspd k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x18                               }, { vcmpeq_uspd k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x18 }, { vcmpeq_uspd k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x18                               }, { vcmpeq_uspd k5,zmm30,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x18                         }, { vcmpeq_uspd k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x18       }, { vcmpeq_uspd k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x18                         }, { vcmpeq_uspd k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x18       }, { vcmpeq_uspd k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x18                         }, { vcmpeq_uspd k5,zmm30,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x18       }, { vcmpeq_uspd k5,zmm30,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x18                         }, { vcmpeq_uspd k5,zmm30,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x18       }, { vcmpeq_uspd k5,zmm30,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x19                               }, { vcmpnge_uqpd k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x19                               }, { vcmpnge_uqpd k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x19                               }, { vcmpnge_uqpd k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x19                               }, { vcmpnge_uqpd k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x19 }, { vcmpnge_uqpd k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x19                               }, { vcmpnge_uqpd k5,zmm30,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x19                         }, { vcmpnge_uqpd k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x19       }, { vcmpnge_uqpd k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x19                         }, { vcmpnge_uqpd k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x19       }, { vcmpnge_uqpd k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x19                         }, { vcmpnge_uqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x19       }, { vcmpnge_uqpd k5,zmm30,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x19                         }, { vcmpnge_uqpd k5,zmm30,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x19       }, { vcmpnge_uqpd k5,zmm30,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x1a                               }, { vcmpngt_uqpd k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x1a                               }, { vcmpngt_uqpd k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x1a                               }, { vcmpngt_uqpd k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x1a                               }, { vcmpngt_uqpd k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1a }, { vcmpngt_uqpd k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x1a                               }, { vcmpngt_uqpd k5,zmm30,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x1a                         }, { vcmpngt_uqpd k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1a       }, { vcmpngt_uqpd k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x1a                         }, { vcmpngt_uqpd k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1a       }, { vcmpngt_uqpd k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x1a                         }, { vcmpngt_uqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1a       }, { vcmpngt_uqpd k5,zmm30,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x1a                         }, { vcmpngt_uqpd k5,zmm30,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1a       }, { vcmpngt_uqpd k5,zmm30,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x1b                               }, { vcmpfalse_ospd k5,zmm30,zmm29                                }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x1b                               }, { vcmpfalse_ospd k5{k7},zmm30,zmm29                            }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x1b                               }, { vcmpfalse_ospd k5,zmm30,zmm29,{sae}                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x1b                               }, { vcmpfalse_ospd k5,zmm30,ZWORD rcx                          }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1b }, { vcmpfalse_ospd k5,zmm30,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x1b                               }, { vcmpfalse_ospd k5,zmm30,QWORD rcx{1to8}                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x1b                         }, { vcmpfalse_ospd k5,zmm30,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1b       }, { vcmpfalse_ospd k5,zmm30,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x1b                         }, { vcmpfalse_ospd k5,zmm30,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1b       }, { vcmpfalse_ospd k5,zmm30,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x1b                         }, { vcmpfalse_ospd k5,zmm30,QWORD rdx+0x3f8{1to8}              }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1b       }, { vcmpfalse_ospd k5,zmm30,QWORD rdx+0x400{1to8}              }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x1b                         }, { vcmpfalse_ospd k5,zmm30,QWORD rdx-0x400{1to8}              }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1b       }, { vcmpfalse_ospd k5,zmm30,QWORD rdx-0x408{1to8}              }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x1c                               }, { vcmpneq_ospd k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x1c                               }, { vcmpneq_ospd k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x1c                               }, { vcmpneq_ospd k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x1c                               }, { vcmpneq_ospd k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1c }, { vcmpneq_ospd k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x1c                               }, { vcmpneq_ospd k5,zmm30,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x1c                         }, { vcmpneq_ospd k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1c       }, { vcmpneq_ospd k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x1c                         }, { vcmpneq_ospd k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1c       }, { vcmpneq_ospd k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x1c                         }, { vcmpneq_ospd k5,zmm30,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1c       }, { vcmpneq_ospd k5,zmm30,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x1c                         }, { vcmpneq_ospd k5,zmm30,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1c       }, { vcmpneq_ospd k5,zmm30,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x1d                               }, { vcmpge_oqpd k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x1d                               }, { vcmpge_oqpd k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x1d                               }, { vcmpge_oqpd k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x1d                               }, { vcmpge_oqpd k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1d }, { vcmpge_oqpd k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x1d                               }, { vcmpge_oqpd k5,zmm30,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x1d                         }, { vcmpge_oqpd k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1d       }, { vcmpge_oqpd k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x1d                         }, { vcmpge_oqpd k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1d       }, { vcmpge_oqpd k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x1d                         }, { vcmpge_oqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1d       }, { vcmpge_oqpd k5,zmm30,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x1d                         }, { vcmpge_oqpd k5,zmm30,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1d       }, { vcmpge_oqpd k5,zmm30,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x1e                               }, { vcmpgt_oqpd k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x1e                               }, { vcmpgt_oqpd k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x1e                               }, { vcmpgt_oqpd k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x1e                               }, { vcmpgt_oqpd k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1e }, { vcmpgt_oqpd k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x1e                               }, { vcmpgt_oqpd k5,zmm30,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x1e                         }, { vcmpgt_oqpd k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1e       }, { vcmpgt_oqpd k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x1e                         }, { vcmpgt_oqpd k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1e       }, { vcmpgt_oqpd k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x1e                         }, { vcmpgt_oqpd k5,zmm30,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1e       }, { vcmpgt_oqpd k5,zmm30,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x1e                         }, { vcmpgt_oqpd k5,zmm30,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1e       }, { vcmpgt_oqpd k5,zmm30,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x1f                               }, { vcmptrue_uspd k5,zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x1f                               }, { vcmptrue_uspd k5{k7},zmm30,zmm29                             }
+testcase	{ 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x1f                               }, { vcmptrue_uspd k5,zmm30,zmm29,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x1f                               }, { vcmptrue_uspd k5,zmm30,ZWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1f }, { vcmptrue_uspd k5,zmm30,ZWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x1f                               }, { vcmptrue_uspd k5,zmm30,QWORD rcx{1to8}                     }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x1f                         }, { vcmptrue_uspd k5,zmm30,ZWORD rdx+0x1fc0                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1f       }, { vcmptrue_uspd k5,zmm30,ZWORD rdx+0x2000                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x1f                         }, { vcmptrue_uspd k5,zmm30,ZWORD rdx-0x2000                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1f       }, { vcmptrue_uspd k5,zmm30,ZWORD rdx-0x2040                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x1f                         }, { vcmptrue_uspd k5,zmm30,QWORD rdx+0x3f8{1to8}               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1f       }, { vcmptrue_uspd k5,zmm30,QWORD rdx+0x400{1to8}               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x1f                         }, { vcmptrue_uspd k5,zmm30,QWORD rdx-0x400{1to8}               }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1f       }, { vcmptrue_uspd k5,zmm30,QWORD rdx-0x408{1to8}               }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0xab                               }, { vcmpps k5,zmm30,zmm29,0xab                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0xab                               }, { vcmpps k5{k7},zmm30,zmm29,0xab                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0xab                               }, { vcmpps k5,zmm30,zmm29,{sae},0xab                             }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x7b                               }, { vcmpps k5,zmm30,zmm29,0x7b                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x7b                               }, { vcmpps k5,zmm30,zmm29,{sae},0x7b                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x7b                               }, { vcmpps k5,zmm30,ZWORD rcx,0x7b                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vcmpps k5,zmm30,ZWORD rax+r14*8+0x123,0x7b                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x7b                               }, { vcmpps k5,zmm30,DWORD rcx{1to16},0x7b                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x7b                         }, { vcmpps k5,zmm30,ZWORD rdx+0x1fc0,0x7b                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vcmpps k5,zmm30,ZWORD rdx+0x2000,0x7b                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x7b                         }, { vcmpps k5,zmm30,ZWORD rdx-0x2000,0x7b                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vcmpps k5,zmm30,ZWORD rdx-0x2040,0x7b                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x7b                         }, { vcmpps k5,zmm30,DWORD rdx+0x1fc{1to16},0x7b                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vcmpps k5,zmm30,DWORD rdx+0x200{1to16},0x7b                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x7b                         }, { vcmpps k5,zmm30,DWORD rdx-0x200{1to16},0x7b                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vcmpps k5,zmm30,DWORD rdx-0x204{1to16},0x7b                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x00                               }, { vcmpeqps k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x00                               }, { vcmpeqps k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x00                               }, { vcmpeqps k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x00                               }, { vcmpeqps k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vcmpeqps k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x00                               }, { vcmpeqps k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x00                         }, { vcmpeqps k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x00       }, { vcmpeqps k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x00                         }, { vcmpeqps k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x00       }, { vcmpeqps k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x00                         }, { vcmpeqps k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x00       }, { vcmpeqps k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x00                         }, { vcmpeqps k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x00       }, { vcmpeqps k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x00                               }, { vcmpeqps k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x00                               }, { vcmpeqps k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x00                               }, { vcmpeqps k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x00                               }, { vcmpeqps k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vcmpeqps k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x00                               }, { vcmpeqps k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x00                         }, { vcmpeqps k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x00       }, { vcmpeqps k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x00                         }, { vcmpeqps k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x00       }, { vcmpeqps k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x00                         }, { vcmpeqps k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x00       }, { vcmpeqps k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x00                         }, { vcmpeqps k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x00       }, { vcmpeqps k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x01                               }, { vcmpltps k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x01                               }, { vcmpltps k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x01                               }, { vcmpltps k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x01                               }, { vcmpltps k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vcmpltps k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x01                               }, { vcmpltps k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x01                         }, { vcmpltps k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x01       }, { vcmpltps k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x01                         }, { vcmpltps k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x01       }, { vcmpltps k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x01                         }, { vcmpltps k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x01       }, { vcmpltps k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x01                         }, { vcmpltps k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x01       }, { vcmpltps k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x01                               }, { vcmpltps k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x01                               }, { vcmpltps k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x01                               }, { vcmpltps k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x01                               }, { vcmpltps k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vcmpltps k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x01                               }, { vcmpltps k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x01                         }, { vcmpltps k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x01       }, { vcmpltps k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x01                         }, { vcmpltps k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x01       }, { vcmpltps k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x01                         }, { vcmpltps k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x01       }, { vcmpltps k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x01                         }, { vcmpltps k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x01       }, { vcmpltps k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x02                               }, { vcmpleps k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x02                               }, { vcmpleps k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x02                               }, { vcmpleps k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x02                               }, { vcmpleps k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vcmpleps k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x02                               }, { vcmpleps k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x02                         }, { vcmpleps k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x02       }, { vcmpleps k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x02                         }, { vcmpleps k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x02       }, { vcmpleps k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x02                         }, { vcmpleps k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x02       }, { vcmpleps k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x02                         }, { vcmpleps k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x02       }, { vcmpleps k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x02                               }, { vcmpleps k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x02                               }, { vcmpleps k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x02                               }, { vcmpleps k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x02                               }, { vcmpleps k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vcmpleps k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x02                               }, { vcmpleps k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x02                         }, { vcmpleps k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x02       }, { vcmpleps k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x02                         }, { vcmpleps k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x02       }, { vcmpleps k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x02                         }, { vcmpleps k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x02       }, { vcmpleps k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x02                         }, { vcmpleps k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x02       }, { vcmpleps k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x03                               }, { vcmpunordps k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x03                               }, { vcmpunordps k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x03                               }, { vcmpunordps k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x03                               }, { vcmpunordps k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x03 }, { vcmpunordps k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x03                               }, { vcmpunordps k5,zmm30,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x03                         }, { vcmpunordps k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x03       }, { vcmpunordps k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x03                         }, { vcmpunordps k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x03       }, { vcmpunordps k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x03                         }, { vcmpunordps k5,zmm30,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x03       }, { vcmpunordps k5,zmm30,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x03                         }, { vcmpunordps k5,zmm30,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x03       }, { vcmpunordps k5,zmm30,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x03                               }, { vcmpunordps k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x03                               }, { vcmpunordps k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x03                               }, { vcmpunordps k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x03                               }, { vcmpunordps k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x03 }, { vcmpunordps k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x03                               }, { vcmpunordps k5,zmm30,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x03                         }, { vcmpunordps k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x03       }, { vcmpunordps k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x03                         }, { vcmpunordps k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x03       }, { vcmpunordps k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x03                         }, { vcmpunordps k5,zmm30,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x03       }, { vcmpunordps k5,zmm30,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x03                         }, { vcmpunordps k5,zmm30,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x03       }, { vcmpunordps k5,zmm30,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x04                               }, { vcmpneqps k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x04                               }, { vcmpneqps k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x04                               }, { vcmpneqps k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x04                               }, { vcmpneqps k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vcmpneqps k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x04                               }, { vcmpneqps k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x04                         }, { vcmpneqps k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x04       }, { vcmpneqps k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x04                         }, { vcmpneqps k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x04       }, { vcmpneqps k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x04                         }, { vcmpneqps k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x04       }, { vcmpneqps k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x04                         }, { vcmpneqps k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x04       }, { vcmpneqps k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x04                               }, { vcmpneqps k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x04                               }, { vcmpneqps k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x04                               }, { vcmpneqps k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x04                               }, { vcmpneqps k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vcmpneqps k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x04                               }, { vcmpneqps k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x04                         }, { vcmpneqps k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x04       }, { vcmpneqps k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x04                         }, { vcmpneqps k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x04       }, { vcmpneqps k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x04                         }, { vcmpneqps k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x04       }, { vcmpneqps k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x04                         }, { vcmpneqps k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x04       }, { vcmpneqps k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x05                               }, { vcmpnltps k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x05                               }, { vcmpnltps k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x05                               }, { vcmpnltps k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x05                               }, { vcmpnltps k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vcmpnltps k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x05                               }, { vcmpnltps k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x05                         }, { vcmpnltps k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x05       }, { vcmpnltps k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x05                         }, { vcmpnltps k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x05       }, { vcmpnltps k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x05                         }, { vcmpnltps k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x05       }, { vcmpnltps k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x05                         }, { vcmpnltps k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x05       }, { vcmpnltps k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x05                               }, { vcmpnltps k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x05                               }, { vcmpnltps k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x05                               }, { vcmpnltps k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x05                               }, { vcmpnltps k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vcmpnltps k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x05                               }, { vcmpnltps k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x05                         }, { vcmpnltps k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x05       }, { vcmpnltps k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x05                         }, { vcmpnltps k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x05       }, { vcmpnltps k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x05                         }, { vcmpnltps k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x05       }, { vcmpnltps k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x05                         }, { vcmpnltps k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x05       }, { vcmpnltps k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x06                               }, { vcmpnleps k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x06                               }, { vcmpnleps k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x06                               }, { vcmpnleps k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x06                               }, { vcmpnleps k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vcmpnleps k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x06                               }, { vcmpnleps k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x06                         }, { vcmpnleps k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x06       }, { vcmpnleps k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x06                         }, { vcmpnleps k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x06       }, { vcmpnleps k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x06                         }, { vcmpnleps k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x06       }, { vcmpnleps k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x06                         }, { vcmpnleps k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x06       }, { vcmpnleps k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x06                               }, { vcmpnleps k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x06                               }, { vcmpnleps k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x06                               }, { vcmpnleps k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x06                               }, { vcmpnleps k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vcmpnleps k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x06                               }, { vcmpnleps k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x06                         }, { vcmpnleps k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x06       }, { vcmpnleps k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x06                         }, { vcmpnleps k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x06       }, { vcmpnleps k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x06                         }, { vcmpnleps k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x06       }, { vcmpnleps k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x06                         }, { vcmpnleps k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x06       }, { vcmpnleps k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x07                               }, { vcmpordps k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x07                               }, { vcmpordps k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x07                               }, { vcmpordps k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x07                               }, { vcmpordps k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x07 }, { vcmpordps k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x07                               }, { vcmpordps k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x07                         }, { vcmpordps k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x07       }, { vcmpordps k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x07                         }, { vcmpordps k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x07       }, { vcmpordps k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x07                         }, { vcmpordps k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x07       }, { vcmpordps k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x07                         }, { vcmpordps k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x07       }, { vcmpordps k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x07                               }, { vcmpordps k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x07                               }, { vcmpordps k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x07                               }, { vcmpordps k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x07                               }, { vcmpordps k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x07 }, { vcmpordps k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x07                               }, { vcmpordps k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x07                         }, { vcmpordps k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x07       }, { vcmpordps k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x07                         }, { vcmpordps k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x07       }, { vcmpordps k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x07                         }, { vcmpordps k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x07       }, { vcmpordps k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x07                         }, { vcmpordps k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x07       }, { vcmpordps k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x08                               }, { vcmpeq_uqps k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x08                               }, { vcmpeq_uqps k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x08                               }, { vcmpeq_uqps k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x08                               }, { vcmpeq_uqps k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x08 }, { vcmpeq_uqps k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x08                               }, { vcmpeq_uqps k5,zmm30,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x08                         }, { vcmpeq_uqps k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x08       }, { vcmpeq_uqps k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x08                         }, { vcmpeq_uqps k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x08       }, { vcmpeq_uqps k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x08                         }, { vcmpeq_uqps k5,zmm30,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x08       }, { vcmpeq_uqps k5,zmm30,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x08                         }, { vcmpeq_uqps k5,zmm30,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x08       }, { vcmpeq_uqps k5,zmm30,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x09                               }, { vcmpngeps k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x09                               }, { vcmpngeps k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x09                               }, { vcmpngeps k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x09                               }, { vcmpngeps k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x09 }, { vcmpngeps k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x09                               }, { vcmpngeps k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x09                         }, { vcmpngeps k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x09       }, { vcmpngeps k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x09                         }, { vcmpngeps k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x09       }, { vcmpngeps k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x09                         }, { vcmpngeps k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x09       }, { vcmpngeps k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x09                         }, { vcmpngeps k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x09       }, { vcmpngeps k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x09                               }, { vcmpngeps k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x09                               }, { vcmpngeps k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x09                               }, { vcmpngeps k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x09                               }, { vcmpngeps k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x09 }, { vcmpngeps k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x09                               }, { vcmpngeps k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x09                         }, { vcmpngeps k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x09       }, { vcmpngeps k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x09                         }, { vcmpngeps k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x09       }, { vcmpngeps k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x09                         }, { vcmpngeps k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x09       }, { vcmpngeps k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x09                         }, { vcmpngeps k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x09       }, { vcmpngeps k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0a                               }, { vcmpngtps k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0a                               }, { vcmpngtps k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0a                               }, { vcmpngtps k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0a                               }, { vcmpngtps k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0a }, { vcmpngtps k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0a                               }, { vcmpngtps k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0a                         }, { vcmpngtps k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0a       }, { vcmpngtps k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0a                         }, { vcmpngtps k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0a       }, { vcmpngtps k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0a                         }, { vcmpngtps k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0a       }, { vcmpngtps k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0a                         }, { vcmpngtps k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0a       }, { vcmpngtps k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0a                               }, { vcmpngtps k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0a                               }, { vcmpngtps k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0a                               }, { vcmpngtps k5,zmm30,zmm29,{sae}                               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0a                               }, { vcmpngtps k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0a }, { vcmpngtps k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0a                               }, { vcmpngtps k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0a                         }, { vcmpngtps k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0a       }, { vcmpngtps k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0a                         }, { vcmpngtps k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0a       }, { vcmpngtps k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0a                         }, { vcmpngtps k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0a       }, { vcmpngtps k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0a                         }, { vcmpngtps k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0a       }, { vcmpngtps k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0b                               }, { vcmpfalseps k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0b                               }, { vcmpfalseps k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0b                               }, { vcmpfalseps k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0b                               }, { vcmpfalseps k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0b }, { vcmpfalseps k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0b                               }, { vcmpfalseps k5,zmm30,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0b                         }, { vcmpfalseps k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0b       }, { vcmpfalseps k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0b                         }, { vcmpfalseps k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0b       }, { vcmpfalseps k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0b                         }, { vcmpfalseps k5,zmm30,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0b       }, { vcmpfalseps k5,zmm30,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0b                         }, { vcmpfalseps k5,zmm30,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0b       }, { vcmpfalseps k5,zmm30,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0b                               }, { vcmpfalseps k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0b                               }, { vcmpfalseps k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0b                               }, { vcmpfalseps k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0b                               }, { vcmpfalseps k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0b }, { vcmpfalseps k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0b                               }, { vcmpfalseps k5,zmm30,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0b                         }, { vcmpfalseps k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0b       }, { vcmpfalseps k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0b                         }, { vcmpfalseps k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0b       }, { vcmpfalseps k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0b                         }, { vcmpfalseps k5,zmm30,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0b       }, { vcmpfalseps k5,zmm30,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0b                         }, { vcmpfalseps k5,zmm30,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0b       }, { vcmpfalseps k5,zmm30,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0c                               }, { vcmpneq_oqps k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0c                               }, { vcmpneq_oqps k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0c                               }, { vcmpneq_oqps k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0c                               }, { vcmpneq_oqps k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0c }, { vcmpneq_oqps k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0c                               }, { vcmpneq_oqps k5,zmm30,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0c                         }, { vcmpneq_oqps k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0c       }, { vcmpneq_oqps k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0c                         }, { vcmpneq_oqps k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0c       }, { vcmpneq_oqps k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0c                         }, { vcmpneq_oqps k5,zmm30,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0c       }, { vcmpneq_oqps k5,zmm30,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0c                         }, { vcmpneq_oqps k5,zmm30,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0c       }, { vcmpneq_oqps k5,zmm30,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0d                               }, { vcmpgeps k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0d                               }, { vcmpgeps k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0d                               }, { vcmpgeps k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0d                               }, { vcmpgeps k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0d }, { vcmpgeps k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0d                               }, { vcmpgeps k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0d                         }, { vcmpgeps k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0d       }, { vcmpgeps k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0d                         }, { vcmpgeps k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0d       }, { vcmpgeps k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0d                         }, { vcmpgeps k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0d       }, { vcmpgeps k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0d                         }, { vcmpgeps k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0d       }, { vcmpgeps k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0d                               }, { vcmpgeps k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0d                               }, { vcmpgeps k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0d                               }, { vcmpgeps k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0d                               }, { vcmpgeps k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0d }, { vcmpgeps k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0d                               }, { vcmpgeps k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0d                         }, { vcmpgeps k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0d       }, { vcmpgeps k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0d                         }, { vcmpgeps k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0d       }, { vcmpgeps k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0d                         }, { vcmpgeps k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0d       }, { vcmpgeps k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0d                         }, { vcmpgeps k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0d       }, { vcmpgeps k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0e                               }, { vcmpgtps k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0e                               }, { vcmpgtps k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0e                               }, { vcmpgtps k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0e                               }, { vcmpgtps k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0e }, { vcmpgtps k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0e                               }, { vcmpgtps k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0e                         }, { vcmpgtps k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0e       }, { vcmpgtps k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0e                         }, { vcmpgtps k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0e       }, { vcmpgtps k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0e                         }, { vcmpgtps k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0e       }, { vcmpgtps k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0e                         }, { vcmpgtps k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0e       }, { vcmpgtps k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0e                               }, { vcmpgtps k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0e                               }, { vcmpgtps k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0e                               }, { vcmpgtps k5,zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0e                               }, { vcmpgtps k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0e }, { vcmpgtps k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0e                               }, { vcmpgtps k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0e                         }, { vcmpgtps k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0e       }, { vcmpgtps k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0e                         }, { vcmpgtps k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0e       }, { vcmpgtps k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0e                         }, { vcmpgtps k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0e       }, { vcmpgtps k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0e                         }, { vcmpgtps k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0e       }, { vcmpgtps k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0f                               }, { vcmptrueps k5,zmm30,zmm29                                    }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0f                               }, { vcmptrueps k5{k7},zmm30,zmm29                                }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0f                               }, { vcmptrueps k5,zmm30,zmm29,{sae}                              }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0f                               }, { vcmptrueps k5,zmm30,ZWORD rcx                              }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0f }, { vcmptrueps k5,zmm30,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0f                               }, { vcmptrueps k5,zmm30,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0f                         }, { vcmptrueps k5,zmm30,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0f       }, { vcmptrueps k5,zmm30,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0f                         }, { vcmptrueps k5,zmm30,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0f       }, { vcmptrueps k5,zmm30,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0f                         }, { vcmptrueps k5,zmm30,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0f       }, { vcmptrueps k5,zmm30,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0f                         }, { vcmptrueps k5,zmm30,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0f       }, { vcmptrueps k5,zmm30,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0f                               }, { vcmptrueps k5,zmm30,zmm29                                    }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0f                               }, { vcmptrueps k5{k7},zmm30,zmm29                                }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0f                               }, { vcmptrueps k5,zmm30,zmm29,{sae}                              }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0f                               }, { vcmptrueps k5,zmm30,ZWORD rcx                              }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0f }, { vcmptrueps k5,zmm30,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0f                               }, { vcmptrueps k5,zmm30,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0f                         }, { vcmptrueps k5,zmm30,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0f       }, { vcmptrueps k5,zmm30,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0f                         }, { vcmptrueps k5,zmm30,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0f       }, { vcmptrueps k5,zmm30,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0f                         }, { vcmptrueps k5,zmm30,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0f       }, { vcmptrueps k5,zmm30,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0f                         }, { vcmptrueps k5,zmm30,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0f       }, { vcmptrueps k5,zmm30,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x10                               }, { vcmpeq_osps k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x10                               }, { vcmpeq_osps k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x10                               }, { vcmpeq_osps k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x10                               }, { vcmpeq_osps k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x10 }, { vcmpeq_osps k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x10                               }, { vcmpeq_osps k5,zmm30,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x10                         }, { vcmpeq_osps k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x10       }, { vcmpeq_osps k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x10                         }, { vcmpeq_osps k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x10       }, { vcmpeq_osps k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x10                         }, { vcmpeq_osps k5,zmm30,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x10       }, { vcmpeq_osps k5,zmm30,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x10                         }, { vcmpeq_osps k5,zmm30,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x10       }, { vcmpeq_osps k5,zmm30,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x11                               }, { vcmplt_oqps k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x11                               }, { vcmplt_oqps k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x11                               }, { vcmplt_oqps k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x11                               }, { vcmplt_oqps k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x11 }, { vcmplt_oqps k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x11                               }, { vcmplt_oqps k5,zmm30,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x11                         }, { vcmplt_oqps k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x11       }, { vcmplt_oqps k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x11                         }, { vcmplt_oqps k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x11       }, { vcmplt_oqps k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x11                         }, { vcmplt_oqps k5,zmm30,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x11       }, { vcmplt_oqps k5,zmm30,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x11                         }, { vcmplt_oqps k5,zmm30,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x11       }, { vcmplt_oqps k5,zmm30,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x12                               }, { vcmple_oqps k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x12                               }, { vcmple_oqps k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x12                               }, { vcmple_oqps k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x12                               }, { vcmple_oqps k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x12 }, { vcmple_oqps k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x12                               }, { vcmple_oqps k5,zmm30,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x12                         }, { vcmple_oqps k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x12       }, { vcmple_oqps k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x12                         }, { vcmple_oqps k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x12       }, { vcmple_oqps k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x12                         }, { vcmple_oqps k5,zmm30,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x12       }, { vcmple_oqps k5,zmm30,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x12                         }, { vcmple_oqps k5,zmm30,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x12       }, { vcmple_oqps k5,zmm30,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x13                               }, { vcmpunord_sps k5,zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x13                               }, { vcmpunord_sps k5{k7},zmm30,zmm29                             }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x13                               }, { vcmpunord_sps k5,zmm30,zmm29,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x13                               }, { vcmpunord_sps k5,zmm30,ZWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x13 }, { vcmpunord_sps k5,zmm30,ZWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x13                               }, { vcmpunord_sps k5,zmm30,DWORD rcx{1to16}                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x13                         }, { vcmpunord_sps k5,zmm30,ZWORD rdx+0x1fc0                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x13       }, { vcmpunord_sps k5,zmm30,ZWORD rdx+0x2000                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x13                         }, { vcmpunord_sps k5,zmm30,ZWORD rdx-0x2000                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x13       }, { vcmpunord_sps k5,zmm30,ZWORD rdx-0x2040                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x13                         }, { vcmpunord_sps k5,zmm30,DWORD rdx+0x1fc{1to16}              }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x13       }, { vcmpunord_sps k5,zmm30,DWORD rdx+0x200{1to16}              }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x13                         }, { vcmpunord_sps k5,zmm30,DWORD rdx-0x200{1to16}              }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x13       }, { vcmpunord_sps k5,zmm30,DWORD rdx-0x204{1to16}              }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x14                               }, { vcmpneq_usps k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x14                               }, { vcmpneq_usps k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x14                               }, { vcmpneq_usps k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x14                               }, { vcmpneq_usps k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x14 }, { vcmpneq_usps k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x14                               }, { vcmpneq_usps k5,zmm30,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x14                         }, { vcmpneq_usps k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x14       }, { vcmpneq_usps k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x14                         }, { vcmpneq_usps k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x14       }, { vcmpneq_usps k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x14                         }, { vcmpneq_usps k5,zmm30,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x14       }, { vcmpneq_usps k5,zmm30,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x14                         }, { vcmpneq_usps k5,zmm30,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x14       }, { vcmpneq_usps k5,zmm30,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x15                               }, { vcmpnlt_uqps k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x15                               }, { vcmpnlt_uqps k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x15                               }, { vcmpnlt_uqps k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x15                               }, { vcmpnlt_uqps k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x15 }, { vcmpnlt_uqps k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x15                               }, { vcmpnlt_uqps k5,zmm30,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x15                         }, { vcmpnlt_uqps k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x15       }, { vcmpnlt_uqps k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x15                         }, { vcmpnlt_uqps k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x15       }, { vcmpnlt_uqps k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x15                         }, { vcmpnlt_uqps k5,zmm30,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x15       }, { vcmpnlt_uqps k5,zmm30,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x15                         }, { vcmpnlt_uqps k5,zmm30,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x15       }, { vcmpnlt_uqps k5,zmm30,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x16                               }, { vcmpnle_uqps k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x16                               }, { vcmpnle_uqps k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x16                               }, { vcmpnle_uqps k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x16                               }, { vcmpnle_uqps k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x16 }, { vcmpnle_uqps k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x16                               }, { vcmpnle_uqps k5,zmm30,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x16                         }, { vcmpnle_uqps k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x16       }, { vcmpnle_uqps k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x16                         }, { vcmpnle_uqps k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x16       }, { vcmpnle_uqps k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x16                         }, { vcmpnle_uqps k5,zmm30,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x16       }, { vcmpnle_uqps k5,zmm30,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x16                         }, { vcmpnle_uqps k5,zmm30,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x16       }, { vcmpnle_uqps k5,zmm30,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x17                               }, { vcmpord_sps k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x17                               }, { vcmpord_sps k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x17                               }, { vcmpord_sps k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x17                               }, { vcmpord_sps k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x17 }, { vcmpord_sps k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x17                               }, { vcmpord_sps k5,zmm30,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x17                         }, { vcmpord_sps k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x17       }, { vcmpord_sps k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x17                         }, { vcmpord_sps k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x17       }, { vcmpord_sps k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x17                         }, { vcmpord_sps k5,zmm30,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x17       }, { vcmpord_sps k5,zmm30,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x17                         }, { vcmpord_sps k5,zmm30,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x17       }, { vcmpord_sps k5,zmm30,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x18                               }, { vcmpeq_usps k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x18                               }, { vcmpeq_usps k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x18                               }, { vcmpeq_usps k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x18                               }, { vcmpeq_usps k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x18 }, { vcmpeq_usps k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x18                               }, { vcmpeq_usps k5,zmm30,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x18                         }, { vcmpeq_usps k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x18       }, { vcmpeq_usps k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x18                         }, { vcmpeq_usps k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x18       }, { vcmpeq_usps k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x18                         }, { vcmpeq_usps k5,zmm30,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x18       }, { vcmpeq_usps k5,zmm30,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x18                         }, { vcmpeq_usps k5,zmm30,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x18       }, { vcmpeq_usps k5,zmm30,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x19                               }, { vcmpnge_uqps k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x19                               }, { vcmpnge_uqps k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x19                               }, { vcmpnge_uqps k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x19                               }, { vcmpnge_uqps k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x19 }, { vcmpnge_uqps k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x19                               }, { vcmpnge_uqps k5,zmm30,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x19                         }, { vcmpnge_uqps k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x19       }, { vcmpnge_uqps k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x19                         }, { vcmpnge_uqps k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x19       }, { vcmpnge_uqps k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x19                         }, { vcmpnge_uqps k5,zmm30,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x19       }, { vcmpnge_uqps k5,zmm30,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x19                         }, { vcmpnge_uqps k5,zmm30,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x19       }, { vcmpnge_uqps k5,zmm30,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x1a                               }, { vcmpngt_uqps k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x1a                               }, { vcmpngt_uqps k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x1a                               }, { vcmpngt_uqps k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x1a                               }, { vcmpngt_uqps k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1a }, { vcmpngt_uqps k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x1a                               }, { vcmpngt_uqps k5,zmm30,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x1a                         }, { vcmpngt_uqps k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1a       }, { vcmpngt_uqps k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x1a                         }, { vcmpngt_uqps k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1a       }, { vcmpngt_uqps k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x1a                         }, { vcmpngt_uqps k5,zmm30,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1a       }, { vcmpngt_uqps k5,zmm30,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x1a                         }, { vcmpngt_uqps k5,zmm30,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1a       }, { vcmpngt_uqps k5,zmm30,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x1b                               }, { vcmpfalse_osps k5,zmm30,zmm29                                }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x1b                               }, { vcmpfalse_osps k5{k7},zmm30,zmm29                            }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x1b                               }, { vcmpfalse_osps k5,zmm30,zmm29,{sae}                          }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x1b                               }, { vcmpfalse_osps k5,zmm30,ZWORD rcx                          }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1b }, { vcmpfalse_osps k5,zmm30,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x1b                               }, { vcmpfalse_osps k5,zmm30,DWORD rcx{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x1b                         }, { vcmpfalse_osps k5,zmm30,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1b       }, { vcmpfalse_osps k5,zmm30,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x1b                         }, { vcmpfalse_osps k5,zmm30,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1b       }, { vcmpfalse_osps k5,zmm30,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x1b                         }, { vcmpfalse_osps k5,zmm30,DWORD rdx+0x1fc{1to16}             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1b       }, { vcmpfalse_osps k5,zmm30,DWORD rdx+0x200{1to16}             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x1b                         }, { vcmpfalse_osps k5,zmm30,DWORD rdx-0x200{1to16}             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1b       }, { vcmpfalse_osps k5,zmm30,DWORD rdx-0x204{1to16}             }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x1c                               }, { vcmpneq_osps k5,zmm30,zmm29                                  }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x1c                               }, { vcmpneq_osps k5{k7},zmm30,zmm29                              }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x1c                               }, { vcmpneq_osps k5,zmm30,zmm29,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x1c                               }, { vcmpneq_osps k5,zmm30,ZWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1c }, { vcmpneq_osps k5,zmm30,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x1c                               }, { vcmpneq_osps k5,zmm30,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x1c                         }, { vcmpneq_osps k5,zmm30,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1c       }, { vcmpneq_osps k5,zmm30,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x1c                         }, { vcmpneq_osps k5,zmm30,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1c       }, { vcmpneq_osps k5,zmm30,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x1c                         }, { vcmpneq_osps k5,zmm30,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1c       }, { vcmpneq_osps k5,zmm30,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x1c                         }, { vcmpneq_osps k5,zmm30,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1c       }, { vcmpneq_osps k5,zmm30,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x1d                               }, { vcmpge_oqps k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x1d                               }, { vcmpge_oqps k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x1d                               }, { vcmpge_oqps k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x1d                               }, { vcmpge_oqps k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1d }, { vcmpge_oqps k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x1d                               }, { vcmpge_oqps k5,zmm30,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x1d                         }, { vcmpge_oqps k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1d       }, { vcmpge_oqps k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x1d                         }, { vcmpge_oqps k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1d       }, { vcmpge_oqps k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x1d                         }, { vcmpge_oqps k5,zmm30,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1d       }, { vcmpge_oqps k5,zmm30,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x1d                         }, { vcmpge_oqps k5,zmm30,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1d       }, { vcmpge_oqps k5,zmm30,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x1e                               }, { vcmpgt_oqps k5,zmm30,zmm29                                   }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x1e                               }, { vcmpgt_oqps k5{k7},zmm30,zmm29                               }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x1e                               }, { vcmpgt_oqps k5,zmm30,zmm29,{sae}                             }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x1e                               }, { vcmpgt_oqps k5,zmm30,ZWORD rcx                             }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1e }, { vcmpgt_oqps k5,zmm30,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x1e                               }, { vcmpgt_oqps k5,zmm30,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x1e                         }, { vcmpgt_oqps k5,zmm30,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1e       }, { vcmpgt_oqps k5,zmm30,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x1e                         }, { vcmpgt_oqps k5,zmm30,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1e       }, { vcmpgt_oqps k5,zmm30,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x1e                         }, { vcmpgt_oqps k5,zmm30,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1e       }, { vcmpgt_oqps k5,zmm30,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x1e                         }, { vcmpgt_oqps k5,zmm30,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1e       }, { vcmpgt_oqps k5,zmm30,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x1f                               }, { vcmptrue_usps k5,zmm30,zmm29                                 }
+testcase	{ 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x1f                               }, { vcmptrue_usps k5{k7},zmm30,zmm29                             }
+testcase	{ 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x1f                               }, { vcmptrue_usps k5,zmm30,zmm29,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x1f                               }, { vcmptrue_usps k5,zmm30,ZWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1f }, { vcmptrue_usps k5,zmm30,ZWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x1f                               }, { vcmptrue_usps k5,zmm30,DWORD rcx{1to16}                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x1f                         }, { vcmptrue_usps k5,zmm30,ZWORD rdx+0x1fc0                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1f       }, { vcmptrue_usps k5,zmm30,ZWORD rdx+0x2000                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x1f                         }, { vcmptrue_usps k5,zmm30,ZWORD rdx-0x2000                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1f       }, { vcmptrue_usps k5,zmm30,ZWORD rdx-0x2040                    }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x1f                         }, { vcmptrue_usps k5,zmm30,DWORD rdx+0x1fc{1to16}              }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1f       }, { vcmptrue_usps k5,zmm30,DWORD rdx+0x200{1to16}              }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x1f                         }, { vcmptrue_usps k5,zmm30,DWORD rdx-0x200{1to16}              }
+testcase	{ 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1f       }, { vcmptrue_usps k5,zmm30,DWORD rdx-0x204{1to16}              }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0xab                               }, { vcmpsd k5{k7},xmm29,xmm28,0xab                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0xab                               }, { vcmpsd k5{k7},xmm29,xmm28,{sae},0xab                         }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x7b                               }, { vcmpsd k5{k7},xmm29,xmm28,0x7b                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x7b                               }, { vcmpsd k5{k7},xmm29,xmm28,{sae},0x7b                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x7b                               }, { vcmpsd k5{k7},xmm29,QWORD rcx,0x7b                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vcmpsd k5{k7},xmm29,QWORD rax+r14*8+0x123,0x7b             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x7b                         }, { vcmpsd k5{k7},xmm29,QWORD rdx+0x3f8,0x7b                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vcmpsd k5{k7},xmm29,QWORD rdx+0x400,0x7b                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x7b                         }, { vcmpsd k5{k7},xmm29,QWORD rdx-0x400,0x7b                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vcmpsd k5{k7},xmm29,QWORD rdx-0x408,0x7b                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x00                               }, { vcmpeqsd k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x00                               }, { vcmpeqsd k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x00                               }, { vcmpeqsd k5{k7},xmm29,QWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vcmpeqsd k5{k7},xmm29,QWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x00                         }, { vcmpeqsd k5{k7},xmm29,QWORD rdx+0x3f8                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x00       }, { vcmpeqsd k5{k7},xmm29,QWORD rdx+0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x00                         }, { vcmpeqsd k5{k7},xmm29,QWORD rdx-0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x00       }, { vcmpeqsd k5{k7},xmm29,QWORD rdx-0x408                      }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x00                               }, { vcmpeqsd k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x00                               }, { vcmpeqsd k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x00                               }, { vcmpeqsd k5{k7},xmm29,QWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vcmpeqsd k5{k7},xmm29,QWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x00                         }, { vcmpeqsd k5{k7},xmm29,QWORD rdx+0x3f8                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x00       }, { vcmpeqsd k5{k7},xmm29,QWORD rdx+0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x00                         }, { vcmpeqsd k5{k7},xmm29,QWORD rdx-0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x00       }, { vcmpeqsd k5{k7},xmm29,QWORD rdx-0x408                      }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x01                               }, { vcmpltsd k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x01                               }, { vcmpltsd k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x01                               }, { vcmpltsd k5{k7},xmm29,QWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vcmpltsd k5{k7},xmm29,QWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x01                         }, { vcmpltsd k5{k7},xmm29,QWORD rdx+0x3f8                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x01       }, { vcmpltsd k5{k7},xmm29,QWORD rdx+0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x01                         }, { vcmpltsd k5{k7},xmm29,QWORD rdx-0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x01       }, { vcmpltsd k5{k7},xmm29,QWORD rdx-0x408                      }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x01                               }, { vcmpltsd k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x01                               }, { vcmpltsd k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x01                               }, { vcmpltsd k5{k7},xmm29,QWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vcmpltsd k5{k7},xmm29,QWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x01                         }, { vcmpltsd k5{k7},xmm29,QWORD rdx+0x3f8                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x01       }, { vcmpltsd k5{k7},xmm29,QWORD rdx+0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x01                         }, { vcmpltsd k5{k7},xmm29,QWORD rdx-0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x01       }, { vcmpltsd k5{k7},xmm29,QWORD rdx-0x408                      }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x02                               }, { vcmplesd k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x02                               }, { vcmplesd k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x02                               }, { vcmplesd k5{k7},xmm29,QWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vcmplesd k5{k7},xmm29,QWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x02                         }, { vcmplesd k5{k7},xmm29,QWORD rdx+0x3f8                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x02       }, { vcmplesd k5{k7},xmm29,QWORD rdx+0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x02                         }, { vcmplesd k5{k7},xmm29,QWORD rdx-0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x02       }, { vcmplesd k5{k7},xmm29,QWORD rdx-0x408                      }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x02                               }, { vcmplesd k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x02                               }, { vcmplesd k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x02                               }, { vcmplesd k5{k7},xmm29,QWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vcmplesd k5{k7},xmm29,QWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x02                         }, { vcmplesd k5{k7},xmm29,QWORD rdx+0x3f8                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x02       }, { vcmplesd k5{k7},xmm29,QWORD rdx+0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x02                         }, { vcmplesd k5{k7},xmm29,QWORD rdx-0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x02       }, { vcmplesd k5{k7},xmm29,QWORD rdx-0x408                      }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x03                               }, { vcmpunordsd k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x03                               }, { vcmpunordsd k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x03                               }, { vcmpunordsd k5{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x03 }, { vcmpunordsd k5{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x03                         }, { vcmpunordsd k5{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x03       }, { vcmpunordsd k5{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x03                         }, { vcmpunordsd k5{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x03       }, { vcmpunordsd k5{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x03                               }, { vcmpunordsd k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x03                               }, { vcmpunordsd k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x03                               }, { vcmpunordsd k5{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x03 }, { vcmpunordsd k5{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x03                         }, { vcmpunordsd k5{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x03       }, { vcmpunordsd k5{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x03                         }, { vcmpunordsd k5{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x03       }, { vcmpunordsd k5{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x04                               }, { vcmpneqsd k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x04                               }, { vcmpneqsd k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x04                               }, { vcmpneqsd k5{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vcmpneqsd k5{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x04                         }, { vcmpneqsd k5{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x04       }, { vcmpneqsd k5{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x04                         }, { vcmpneqsd k5{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x04       }, { vcmpneqsd k5{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x04                               }, { vcmpneqsd k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x04                               }, { vcmpneqsd k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x04                               }, { vcmpneqsd k5{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vcmpneqsd k5{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x04                         }, { vcmpneqsd k5{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x04       }, { vcmpneqsd k5{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x04                         }, { vcmpneqsd k5{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x04       }, { vcmpneqsd k5{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x05                               }, { vcmpnltsd k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x05                               }, { vcmpnltsd k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x05                               }, { vcmpnltsd k5{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vcmpnltsd k5{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x05                         }, { vcmpnltsd k5{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x05       }, { vcmpnltsd k5{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x05                         }, { vcmpnltsd k5{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x05       }, { vcmpnltsd k5{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x05                               }, { vcmpnltsd k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x05                               }, { vcmpnltsd k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x05                               }, { vcmpnltsd k5{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vcmpnltsd k5{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x05                         }, { vcmpnltsd k5{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x05       }, { vcmpnltsd k5{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x05                         }, { vcmpnltsd k5{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x05       }, { vcmpnltsd k5{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x06                               }, { vcmpnlesd k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x06                               }, { vcmpnlesd k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x06                               }, { vcmpnlesd k5{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vcmpnlesd k5{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x06                         }, { vcmpnlesd k5{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x06       }, { vcmpnlesd k5{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x06                         }, { vcmpnlesd k5{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x06       }, { vcmpnlesd k5{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x06                               }, { vcmpnlesd k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x06                               }, { vcmpnlesd k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x06                               }, { vcmpnlesd k5{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vcmpnlesd k5{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x06                         }, { vcmpnlesd k5{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x06       }, { vcmpnlesd k5{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x06                         }, { vcmpnlesd k5{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x06       }, { vcmpnlesd k5{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x07                               }, { vcmpordsd k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x07                               }, { vcmpordsd k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x07                               }, { vcmpordsd k5{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x07 }, { vcmpordsd k5{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x07                         }, { vcmpordsd k5{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x07       }, { vcmpordsd k5{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x07                         }, { vcmpordsd k5{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x07       }, { vcmpordsd k5{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x07                               }, { vcmpordsd k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x07                               }, { vcmpordsd k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x07                               }, { vcmpordsd k5{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x07 }, { vcmpordsd k5{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x07                         }, { vcmpordsd k5{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x07       }, { vcmpordsd k5{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x07                         }, { vcmpordsd k5{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x07       }, { vcmpordsd k5{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x08                               }, { vcmpeq_uqsd k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x08                               }, { vcmpeq_uqsd k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x08                               }, { vcmpeq_uqsd k5{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x08 }, { vcmpeq_uqsd k5{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x08                         }, { vcmpeq_uqsd k5{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x08       }, { vcmpeq_uqsd k5{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x08                         }, { vcmpeq_uqsd k5{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x08       }, { vcmpeq_uqsd k5{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x09                               }, { vcmpngesd k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x09                               }, { vcmpngesd k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x09                               }, { vcmpngesd k5{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x09 }, { vcmpngesd k5{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x09                         }, { vcmpngesd k5{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x09       }, { vcmpngesd k5{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x09                         }, { vcmpngesd k5{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x09       }, { vcmpngesd k5{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x09                               }, { vcmpngesd k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x09                               }, { vcmpngesd k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x09                               }, { vcmpngesd k5{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x09 }, { vcmpngesd k5{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x09                         }, { vcmpngesd k5{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x09       }, { vcmpngesd k5{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x09                         }, { vcmpngesd k5{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x09       }, { vcmpngesd k5{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0a                               }, { vcmpngtsd k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0a                               }, { vcmpngtsd k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0a                               }, { vcmpngtsd k5{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0a }, { vcmpngtsd k5{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0a                         }, { vcmpngtsd k5{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0a       }, { vcmpngtsd k5{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0a                         }, { vcmpngtsd k5{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0a       }, { vcmpngtsd k5{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0a                               }, { vcmpngtsd k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0a                               }, { vcmpngtsd k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0a                               }, { vcmpngtsd k5{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0a }, { vcmpngtsd k5{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0a                         }, { vcmpngtsd k5{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0a       }, { vcmpngtsd k5{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0a                         }, { vcmpngtsd k5{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0a       }, { vcmpngtsd k5{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0b                               }, { vcmpfalsesd k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0b                               }, { vcmpfalsesd k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0b                               }, { vcmpfalsesd k5{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0b }, { vcmpfalsesd k5{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0b                         }, { vcmpfalsesd k5{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0b       }, { vcmpfalsesd k5{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0b                         }, { vcmpfalsesd k5{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0b       }, { vcmpfalsesd k5{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0b                               }, { vcmpfalsesd k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0b                               }, { vcmpfalsesd k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0b                               }, { vcmpfalsesd k5{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0b }, { vcmpfalsesd k5{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0b                         }, { vcmpfalsesd k5{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0b       }, { vcmpfalsesd k5{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0b                         }, { vcmpfalsesd k5{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0b       }, { vcmpfalsesd k5{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0c                               }, { vcmpneq_oqsd k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0c                               }, { vcmpneq_oqsd k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0c                               }, { vcmpneq_oqsd k5{k7},xmm29,QWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0c }, { vcmpneq_oqsd k5{k7},xmm29,QWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0c                         }, { vcmpneq_oqsd k5{k7},xmm29,QWORD rdx+0x3f8                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0c       }, { vcmpneq_oqsd k5{k7},xmm29,QWORD rdx+0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0c                         }, { vcmpneq_oqsd k5{k7},xmm29,QWORD rdx-0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0c       }, { vcmpneq_oqsd k5{k7},xmm29,QWORD rdx-0x408                  }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0d                               }, { vcmpgesd k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0d                               }, { vcmpgesd k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0d                               }, { vcmpgesd k5{k7},xmm29,QWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0d }, { vcmpgesd k5{k7},xmm29,QWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0d                         }, { vcmpgesd k5{k7},xmm29,QWORD rdx+0x3f8                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0d       }, { vcmpgesd k5{k7},xmm29,QWORD rdx+0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0d                         }, { vcmpgesd k5{k7},xmm29,QWORD rdx-0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0d       }, { vcmpgesd k5{k7},xmm29,QWORD rdx-0x408                      }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0d                               }, { vcmpgesd k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0d                               }, { vcmpgesd k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0d                               }, { vcmpgesd k5{k7},xmm29,QWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0d }, { vcmpgesd k5{k7},xmm29,QWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0d                         }, { vcmpgesd k5{k7},xmm29,QWORD rdx+0x3f8                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0d       }, { vcmpgesd k5{k7},xmm29,QWORD rdx+0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0d                         }, { vcmpgesd k5{k7},xmm29,QWORD rdx-0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0d       }, { vcmpgesd k5{k7},xmm29,QWORD rdx-0x408                      }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0e                               }, { vcmpgtsd k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0e                               }, { vcmpgtsd k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0e                               }, { vcmpgtsd k5{k7},xmm29,QWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0e }, { vcmpgtsd k5{k7},xmm29,QWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0e                         }, { vcmpgtsd k5{k7},xmm29,QWORD rdx+0x3f8                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0e       }, { vcmpgtsd k5{k7},xmm29,QWORD rdx+0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0e                         }, { vcmpgtsd k5{k7},xmm29,QWORD rdx-0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0e       }, { vcmpgtsd k5{k7},xmm29,QWORD rdx-0x408                      }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0e                               }, { vcmpgtsd k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0e                               }, { vcmpgtsd k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0e                               }, { vcmpgtsd k5{k7},xmm29,QWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0e }, { vcmpgtsd k5{k7},xmm29,QWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0e                         }, { vcmpgtsd k5{k7},xmm29,QWORD rdx+0x3f8                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0e       }, { vcmpgtsd k5{k7},xmm29,QWORD rdx+0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0e                         }, { vcmpgtsd k5{k7},xmm29,QWORD rdx-0x400                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0e       }, { vcmpgtsd k5{k7},xmm29,QWORD rdx-0x408                      }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0f                               }, { vcmptruesd k5{k7},xmm29,xmm28                                }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0f                               }, { vcmptruesd k5{k7},xmm29,xmm28,{sae}                          }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0f                               }, { vcmptruesd k5{k7},xmm29,QWORD rcx                          }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0f }, { vcmptruesd k5{k7},xmm29,QWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0f                         }, { vcmptruesd k5{k7},xmm29,QWORD rdx+0x3f8                    }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0f       }, { vcmptruesd k5{k7},xmm29,QWORD rdx+0x400                    }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0f                         }, { vcmptruesd k5{k7},xmm29,QWORD rdx-0x400                    }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0f       }, { vcmptruesd k5{k7},xmm29,QWORD rdx-0x408                    }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0f                               }, { vcmptruesd k5{k7},xmm29,xmm28                                }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0f                               }, { vcmptruesd k5{k7},xmm29,xmm28,{sae}                          }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0f                               }, { vcmptruesd k5{k7},xmm29,QWORD rcx                          }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0f }, { vcmptruesd k5{k7},xmm29,QWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0f                         }, { vcmptruesd k5{k7},xmm29,QWORD rdx+0x3f8                    }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0f       }, { vcmptruesd k5{k7},xmm29,QWORD rdx+0x400                    }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0f                         }, { vcmptruesd k5{k7},xmm29,QWORD rdx-0x400                    }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0f       }, { vcmptruesd k5{k7},xmm29,QWORD rdx-0x408                    }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x10                               }, { vcmpeq_ossd k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x10                               }, { vcmpeq_ossd k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x10                               }, { vcmpeq_ossd k5{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x10 }, { vcmpeq_ossd k5{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x10                         }, { vcmpeq_ossd k5{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x10       }, { vcmpeq_ossd k5{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x10                         }, { vcmpeq_ossd k5{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x10       }, { vcmpeq_ossd k5{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x11                               }, { vcmplt_oqsd k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x11                               }, { vcmplt_oqsd k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x11                               }, { vcmplt_oqsd k5{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x11 }, { vcmplt_oqsd k5{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x11                         }, { vcmplt_oqsd k5{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x11       }, { vcmplt_oqsd k5{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x11                         }, { vcmplt_oqsd k5{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x11       }, { vcmplt_oqsd k5{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x12                               }, { vcmple_oqsd k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x12                               }, { vcmple_oqsd k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x12                               }, { vcmple_oqsd k5{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x12 }, { vcmple_oqsd k5{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x12                         }, { vcmple_oqsd k5{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x12       }, { vcmple_oqsd k5{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x12                         }, { vcmple_oqsd k5{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x12       }, { vcmple_oqsd k5{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x13                               }, { vcmpunord_ssd k5{k7},xmm29,xmm28                             }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x13                               }, { vcmpunord_ssd k5{k7},xmm29,xmm28,{sae}                       }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x13                               }, { vcmpunord_ssd k5{k7},xmm29,QWORD rcx                       }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x13 }, { vcmpunord_ssd k5{k7},xmm29,QWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x13                         }, { vcmpunord_ssd k5{k7},xmm29,QWORD rdx+0x3f8                 }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x13       }, { vcmpunord_ssd k5{k7},xmm29,QWORD rdx+0x400                 }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x13                         }, { vcmpunord_ssd k5{k7},xmm29,QWORD rdx-0x400                 }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x13       }, { vcmpunord_ssd k5{k7},xmm29,QWORD rdx-0x408                 }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x14                               }, { vcmpneq_ussd k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x14                               }, { vcmpneq_ussd k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x14                               }, { vcmpneq_ussd k5{k7},xmm29,QWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x14 }, { vcmpneq_ussd k5{k7},xmm29,QWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x14                         }, { vcmpneq_ussd k5{k7},xmm29,QWORD rdx+0x3f8                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x14       }, { vcmpneq_ussd k5{k7},xmm29,QWORD rdx+0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x14                         }, { vcmpneq_ussd k5{k7},xmm29,QWORD rdx-0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x14       }, { vcmpneq_ussd k5{k7},xmm29,QWORD rdx-0x408                  }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x15                               }, { vcmpnlt_uqsd k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x15                               }, { vcmpnlt_uqsd k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x15                               }, { vcmpnlt_uqsd k5{k7},xmm29,QWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x15 }, { vcmpnlt_uqsd k5{k7},xmm29,QWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x15                         }, { vcmpnlt_uqsd k5{k7},xmm29,QWORD rdx+0x3f8                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x15       }, { vcmpnlt_uqsd k5{k7},xmm29,QWORD rdx+0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x15                         }, { vcmpnlt_uqsd k5{k7},xmm29,QWORD rdx-0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x15       }, { vcmpnlt_uqsd k5{k7},xmm29,QWORD rdx-0x408                  }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x16                               }, { vcmpnle_uqsd k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x16                               }, { vcmpnle_uqsd k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x16                               }, { vcmpnle_uqsd k5{k7},xmm29,QWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x16 }, { vcmpnle_uqsd k5{k7},xmm29,QWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x16                         }, { vcmpnle_uqsd k5{k7},xmm29,QWORD rdx+0x3f8                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x16       }, { vcmpnle_uqsd k5{k7},xmm29,QWORD rdx+0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x16                         }, { vcmpnle_uqsd k5{k7},xmm29,QWORD rdx-0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x16       }, { vcmpnle_uqsd k5{k7},xmm29,QWORD rdx-0x408                  }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x17                               }, { vcmpord_ssd k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x17                               }, { vcmpord_ssd k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x17                               }, { vcmpord_ssd k5{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x17 }, { vcmpord_ssd k5{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x17                         }, { vcmpord_ssd k5{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x17       }, { vcmpord_ssd k5{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x17                         }, { vcmpord_ssd k5{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x17       }, { vcmpord_ssd k5{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x18                               }, { vcmpeq_ussd k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x18                               }, { vcmpeq_ussd k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x18                               }, { vcmpeq_ussd k5{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x18 }, { vcmpeq_ussd k5{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x18                         }, { vcmpeq_ussd k5{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x18       }, { vcmpeq_ussd k5{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x18                         }, { vcmpeq_ussd k5{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x18       }, { vcmpeq_ussd k5{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x19                               }, { vcmpnge_uqsd k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x19                               }, { vcmpnge_uqsd k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x19                               }, { vcmpnge_uqsd k5{k7},xmm29,QWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x19 }, { vcmpnge_uqsd k5{k7},xmm29,QWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x19                         }, { vcmpnge_uqsd k5{k7},xmm29,QWORD rdx+0x3f8                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x19       }, { vcmpnge_uqsd k5{k7},xmm29,QWORD rdx+0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x19                         }, { vcmpnge_uqsd k5{k7},xmm29,QWORD rdx-0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x19       }, { vcmpnge_uqsd k5{k7},xmm29,QWORD rdx-0x408                  }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x1a                               }, { vcmpngt_uqsd k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x1a                               }, { vcmpngt_uqsd k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x1a                               }, { vcmpngt_uqsd k5{k7},xmm29,QWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1a }, { vcmpngt_uqsd k5{k7},xmm29,QWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x1a                         }, { vcmpngt_uqsd k5{k7},xmm29,QWORD rdx+0x3f8                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1a       }, { vcmpngt_uqsd k5{k7},xmm29,QWORD rdx+0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x1a                         }, { vcmpngt_uqsd k5{k7},xmm29,QWORD rdx-0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1a       }, { vcmpngt_uqsd k5{k7},xmm29,QWORD rdx-0x408                  }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x1b                               }, { vcmpfalse_ossd k5{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x1b                               }, { vcmpfalse_ossd k5{k7},xmm29,xmm28,{sae}                      }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x1b                               }, { vcmpfalse_ossd k5{k7},xmm29,QWORD rcx                      }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1b }, { vcmpfalse_ossd k5{k7},xmm29,QWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x1b                         }, { vcmpfalse_ossd k5{k7},xmm29,QWORD rdx+0x3f8                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1b       }, { vcmpfalse_ossd k5{k7},xmm29,QWORD rdx+0x400                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x1b                         }, { vcmpfalse_ossd k5{k7},xmm29,QWORD rdx-0x400                }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1b       }, { vcmpfalse_ossd k5{k7},xmm29,QWORD rdx-0x408                }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x1c                               }, { vcmpneq_ossd k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x1c                               }, { vcmpneq_ossd k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x1c                               }, { vcmpneq_ossd k5{k7},xmm29,QWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1c }, { vcmpneq_ossd k5{k7},xmm29,QWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x1c                         }, { vcmpneq_ossd k5{k7},xmm29,QWORD rdx+0x3f8                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1c       }, { vcmpneq_ossd k5{k7},xmm29,QWORD rdx+0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x1c                         }, { vcmpneq_ossd k5{k7},xmm29,QWORD rdx-0x400                  }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1c       }, { vcmpneq_ossd k5{k7},xmm29,QWORD rdx-0x408                  }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x1d                               }, { vcmpge_oqsd k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x1d                               }, { vcmpge_oqsd k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x1d                               }, { vcmpge_oqsd k5{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1d }, { vcmpge_oqsd k5{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x1d                         }, { vcmpge_oqsd k5{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1d       }, { vcmpge_oqsd k5{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x1d                         }, { vcmpge_oqsd k5{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1d       }, { vcmpge_oqsd k5{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x1e                               }, { vcmpgt_oqsd k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x1e                               }, { vcmpgt_oqsd k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x1e                               }, { vcmpgt_oqsd k5{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1e }, { vcmpgt_oqsd k5{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x1e                         }, { vcmpgt_oqsd k5{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1e       }, { vcmpgt_oqsd k5{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x1e                         }, { vcmpgt_oqsd k5{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1e       }, { vcmpgt_oqsd k5{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x1f                               }, { vcmptrue_ussd k5{k7},xmm29,xmm28                             }
+testcase	{ 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x1f                               }, { vcmptrue_ussd k5{k7},xmm29,xmm28,{sae}                       }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x1f                               }, { vcmptrue_ussd k5{k7},xmm29,QWORD rcx                       }
+testcase	{ 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1f }, { vcmptrue_ussd k5{k7},xmm29,QWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x1f                         }, { vcmptrue_ussd k5{k7},xmm29,QWORD rdx+0x3f8                 }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1f       }, { vcmptrue_ussd k5{k7},xmm29,QWORD rdx+0x400                 }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x1f                         }, { vcmptrue_ussd k5{k7},xmm29,QWORD rdx-0x400                 }
+testcase	{ 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1f       }, { vcmptrue_ussd k5{k7},xmm29,QWORD rdx-0x408                 }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0xab                               }, { vcmpss k5{k7},xmm29,xmm28,0xab                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0xab                               }, { vcmpss k5{k7},xmm29,xmm28,{sae},0xab                         }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x7b                               }, { vcmpss k5{k7},xmm29,xmm28,0x7b                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x7b                               }, { vcmpss k5{k7},xmm29,xmm28,{sae},0x7b                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x7b                               }, { vcmpss k5{k7},xmm29,DWORD rcx,0x7b                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vcmpss k5{k7},xmm29,DWORD rax+r14*8+0x123,0x7b             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x7b                         }, { vcmpss k5{k7},xmm29,DWORD rdx+0x1fc,0x7b                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vcmpss k5{k7},xmm29,DWORD rdx+0x200,0x7b                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x7b                         }, { vcmpss k5{k7},xmm29,DWORD rdx-0x200,0x7b                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vcmpss k5{k7},xmm29,DWORD rdx-0x204,0x7b                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x00                               }, { vcmpeqss k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x00                               }, { vcmpeqss k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x00                               }, { vcmpeqss k5{k7},xmm29,DWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vcmpeqss k5{k7},xmm29,DWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x00                         }, { vcmpeqss k5{k7},xmm29,DWORD rdx+0x1fc                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x00       }, { vcmpeqss k5{k7},xmm29,DWORD rdx+0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x00                         }, { vcmpeqss k5{k7},xmm29,DWORD rdx-0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x00       }, { vcmpeqss k5{k7},xmm29,DWORD rdx-0x204                      }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x00                               }, { vcmpeqss k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x00                               }, { vcmpeqss k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x00                               }, { vcmpeqss k5{k7},xmm29,DWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vcmpeqss k5{k7},xmm29,DWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x00                         }, { vcmpeqss k5{k7},xmm29,DWORD rdx+0x1fc                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x00       }, { vcmpeqss k5{k7},xmm29,DWORD rdx+0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x00                         }, { vcmpeqss k5{k7},xmm29,DWORD rdx-0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x00       }, { vcmpeqss k5{k7},xmm29,DWORD rdx-0x204                      }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x01                               }, { vcmpltss k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x01                               }, { vcmpltss k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x01                               }, { vcmpltss k5{k7},xmm29,DWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vcmpltss k5{k7},xmm29,DWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x01                         }, { vcmpltss k5{k7},xmm29,DWORD rdx+0x1fc                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x01       }, { vcmpltss k5{k7},xmm29,DWORD rdx+0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x01                         }, { vcmpltss k5{k7},xmm29,DWORD rdx-0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x01       }, { vcmpltss k5{k7},xmm29,DWORD rdx-0x204                      }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x01                               }, { vcmpltss k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x01                               }, { vcmpltss k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x01                               }, { vcmpltss k5{k7},xmm29,DWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vcmpltss k5{k7},xmm29,DWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x01                         }, { vcmpltss k5{k7},xmm29,DWORD rdx+0x1fc                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x01       }, { vcmpltss k5{k7},xmm29,DWORD rdx+0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x01                         }, { vcmpltss k5{k7},xmm29,DWORD rdx-0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x01       }, { vcmpltss k5{k7},xmm29,DWORD rdx-0x204                      }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x02                               }, { vcmpless k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x02                               }, { vcmpless k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x02                               }, { vcmpless k5{k7},xmm29,DWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vcmpless k5{k7},xmm29,DWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x02                         }, { vcmpless k5{k7},xmm29,DWORD rdx+0x1fc                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x02       }, { vcmpless k5{k7},xmm29,DWORD rdx+0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x02                         }, { vcmpless k5{k7},xmm29,DWORD rdx-0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x02       }, { vcmpless k5{k7},xmm29,DWORD rdx-0x204                      }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x02                               }, { vcmpless k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x02                               }, { vcmpless k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x02                               }, { vcmpless k5{k7},xmm29,DWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vcmpless k5{k7},xmm29,DWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x02                         }, { vcmpless k5{k7},xmm29,DWORD rdx+0x1fc                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x02       }, { vcmpless k5{k7},xmm29,DWORD rdx+0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x02                         }, { vcmpless k5{k7},xmm29,DWORD rdx-0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x02       }, { vcmpless k5{k7},xmm29,DWORD rdx-0x204                      }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x03                               }, { vcmpunordss k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x03                               }, { vcmpunordss k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x03                               }, { vcmpunordss k5{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x03 }, { vcmpunordss k5{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x03                         }, { vcmpunordss k5{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x03       }, { vcmpunordss k5{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x03                         }, { vcmpunordss k5{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x03       }, { vcmpunordss k5{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x03                               }, { vcmpunordss k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x03                               }, { vcmpunordss k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x03                               }, { vcmpunordss k5{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x03 }, { vcmpunordss k5{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x03                         }, { vcmpunordss k5{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x03       }, { vcmpunordss k5{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x03                         }, { vcmpunordss k5{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x03       }, { vcmpunordss k5{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x04                               }, { vcmpneqss k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x04                               }, { vcmpneqss k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x04                               }, { vcmpneqss k5{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vcmpneqss k5{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x04                         }, { vcmpneqss k5{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x04       }, { vcmpneqss k5{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x04                         }, { vcmpneqss k5{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x04       }, { vcmpneqss k5{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x04                               }, { vcmpneqss k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x04                               }, { vcmpneqss k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x04                               }, { vcmpneqss k5{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vcmpneqss k5{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x04                         }, { vcmpneqss k5{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x04       }, { vcmpneqss k5{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x04                         }, { vcmpneqss k5{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x04       }, { vcmpneqss k5{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x05                               }, { vcmpnltss k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x05                               }, { vcmpnltss k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x05                               }, { vcmpnltss k5{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vcmpnltss k5{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x05                         }, { vcmpnltss k5{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x05       }, { vcmpnltss k5{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x05                         }, { vcmpnltss k5{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x05       }, { vcmpnltss k5{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x05                               }, { vcmpnltss k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x05                               }, { vcmpnltss k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x05                               }, { vcmpnltss k5{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vcmpnltss k5{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x05                         }, { vcmpnltss k5{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x05       }, { vcmpnltss k5{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x05                         }, { vcmpnltss k5{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x05       }, { vcmpnltss k5{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x06                               }, { vcmpnless k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x06                               }, { vcmpnless k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x06                               }, { vcmpnless k5{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vcmpnless k5{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x06                         }, { vcmpnless k5{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x06       }, { vcmpnless k5{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x06                         }, { vcmpnless k5{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x06       }, { vcmpnless k5{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x06                               }, { vcmpnless k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x06                               }, { vcmpnless k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x06                               }, { vcmpnless k5{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vcmpnless k5{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x06                         }, { vcmpnless k5{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x06       }, { vcmpnless k5{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x06                         }, { vcmpnless k5{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x06       }, { vcmpnless k5{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x07                               }, { vcmpordss k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x07                               }, { vcmpordss k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x07                               }, { vcmpordss k5{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x07 }, { vcmpordss k5{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x07                         }, { vcmpordss k5{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x07       }, { vcmpordss k5{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x07                         }, { vcmpordss k5{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x07       }, { vcmpordss k5{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x07                               }, { vcmpordss k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x07                               }, { vcmpordss k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x07                               }, { vcmpordss k5{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x07 }, { vcmpordss k5{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x07                         }, { vcmpordss k5{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x07       }, { vcmpordss k5{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x07                         }, { vcmpordss k5{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x07       }, { vcmpordss k5{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x08                               }, { vcmpeq_uqss k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x08                               }, { vcmpeq_uqss k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x08                               }, { vcmpeq_uqss k5{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x08 }, { vcmpeq_uqss k5{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x08                         }, { vcmpeq_uqss k5{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x08       }, { vcmpeq_uqss k5{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x08                         }, { vcmpeq_uqss k5{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x08       }, { vcmpeq_uqss k5{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x09                               }, { vcmpngess k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x09                               }, { vcmpngess k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x09                               }, { vcmpngess k5{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x09 }, { vcmpngess k5{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x09                         }, { vcmpngess k5{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x09       }, { vcmpngess k5{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x09                         }, { vcmpngess k5{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x09       }, { vcmpngess k5{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x09                               }, { vcmpngess k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x09                               }, { vcmpngess k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x09                               }, { vcmpngess k5{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x09 }, { vcmpngess k5{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x09                         }, { vcmpngess k5{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x09       }, { vcmpngess k5{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x09                         }, { vcmpngess k5{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x09       }, { vcmpngess k5{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0a                               }, { vcmpngtss k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0a                               }, { vcmpngtss k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0a                               }, { vcmpngtss k5{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0a }, { vcmpngtss k5{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0a                         }, { vcmpngtss k5{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0a       }, { vcmpngtss k5{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0a                         }, { vcmpngtss k5{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0a       }, { vcmpngtss k5{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0a                               }, { vcmpngtss k5{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0a                               }, { vcmpngtss k5{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0a                               }, { vcmpngtss k5{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0a }, { vcmpngtss k5{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0a                         }, { vcmpngtss k5{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0a       }, { vcmpngtss k5{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0a                         }, { vcmpngtss k5{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0a       }, { vcmpngtss k5{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0b                               }, { vcmpfalsess k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0b                               }, { vcmpfalsess k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0b                               }, { vcmpfalsess k5{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0b }, { vcmpfalsess k5{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0b                         }, { vcmpfalsess k5{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0b       }, { vcmpfalsess k5{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0b                         }, { vcmpfalsess k5{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0b       }, { vcmpfalsess k5{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0b                               }, { vcmpfalsess k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0b                               }, { vcmpfalsess k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0b                               }, { vcmpfalsess k5{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0b }, { vcmpfalsess k5{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0b                         }, { vcmpfalsess k5{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0b       }, { vcmpfalsess k5{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0b                         }, { vcmpfalsess k5{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0b       }, { vcmpfalsess k5{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0c                               }, { vcmpneq_oqss k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0c                               }, { vcmpneq_oqss k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0c                               }, { vcmpneq_oqss k5{k7},xmm29,DWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0c }, { vcmpneq_oqss k5{k7},xmm29,DWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0c                         }, { vcmpneq_oqss k5{k7},xmm29,DWORD rdx+0x1fc                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0c       }, { vcmpneq_oqss k5{k7},xmm29,DWORD rdx+0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0c                         }, { vcmpneq_oqss k5{k7},xmm29,DWORD rdx-0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0c       }, { vcmpneq_oqss k5{k7},xmm29,DWORD rdx-0x204                  }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0d                               }, { vcmpgess k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0d                               }, { vcmpgess k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0d                               }, { vcmpgess k5{k7},xmm29,DWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0d }, { vcmpgess k5{k7},xmm29,DWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0d                         }, { vcmpgess k5{k7},xmm29,DWORD rdx+0x1fc                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0d       }, { vcmpgess k5{k7},xmm29,DWORD rdx+0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0d                         }, { vcmpgess k5{k7},xmm29,DWORD rdx-0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0d       }, { vcmpgess k5{k7},xmm29,DWORD rdx-0x204                      }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0d                               }, { vcmpgess k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0d                               }, { vcmpgess k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0d                               }, { vcmpgess k5{k7},xmm29,DWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0d }, { vcmpgess k5{k7},xmm29,DWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0d                         }, { vcmpgess k5{k7},xmm29,DWORD rdx+0x1fc                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0d       }, { vcmpgess k5{k7},xmm29,DWORD rdx+0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0d                         }, { vcmpgess k5{k7},xmm29,DWORD rdx-0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0d       }, { vcmpgess k5{k7},xmm29,DWORD rdx-0x204                      }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0e                               }, { vcmpgtss k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0e                               }, { vcmpgtss k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0e                               }, { vcmpgtss k5{k7},xmm29,DWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0e }, { vcmpgtss k5{k7},xmm29,DWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0e                         }, { vcmpgtss k5{k7},xmm29,DWORD rdx+0x1fc                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0e       }, { vcmpgtss k5{k7},xmm29,DWORD rdx+0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0e                         }, { vcmpgtss k5{k7},xmm29,DWORD rdx-0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0e       }, { vcmpgtss k5{k7},xmm29,DWORD rdx-0x204                      }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0e                               }, { vcmpgtss k5{k7},xmm29,xmm28                                  }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0e                               }, { vcmpgtss k5{k7},xmm29,xmm28,{sae}                            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0e                               }, { vcmpgtss k5{k7},xmm29,DWORD rcx                            }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0e }, { vcmpgtss k5{k7},xmm29,DWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0e                         }, { vcmpgtss k5{k7},xmm29,DWORD rdx+0x1fc                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0e       }, { vcmpgtss k5{k7},xmm29,DWORD rdx+0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0e                         }, { vcmpgtss k5{k7},xmm29,DWORD rdx-0x200                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0e       }, { vcmpgtss k5{k7},xmm29,DWORD rdx-0x204                      }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0f                               }, { vcmptruess k5{k7},xmm29,xmm28                                }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0f                               }, { vcmptruess k5{k7},xmm29,xmm28,{sae}                          }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0f                               }, { vcmptruess k5{k7},xmm29,DWORD rcx                          }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0f }, { vcmptruess k5{k7},xmm29,DWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0f                         }, { vcmptruess k5{k7},xmm29,DWORD rdx+0x1fc                    }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0f       }, { vcmptruess k5{k7},xmm29,DWORD rdx+0x200                    }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0f                         }, { vcmptruess k5{k7},xmm29,DWORD rdx-0x200                    }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0f       }, { vcmptruess k5{k7},xmm29,DWORD rdx-0x204                    }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0f                               }, { vcmptruess k5{k7},xmm29,xmm28                                }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0f                               }, { vcmptruess k5{k7},xmm29,xmm28,{sae}                          }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0f                               }, { vcmptruess k5{k7},xmm29,DWORD rcx                          }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0f }, { vcmptruess k5{k7},xmm29,DWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0f                         }, { vcmptruess k5{k7},xmm29,DWORD rdx+0x1fc                    }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0f       }, { vcmptruess k5{k7},xmm29,DWORD rdx+0x200                    }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0f                         }, { vcmptruess k5{k7},xmm29,DWORD rdx-0x200                    }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0f       }, { vcmptruess k5{k7},xmm29,DWORD rdx-0x204                    }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x10                               }, { vcmpeq_osss k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x10                               }, { vcmpeq_osss k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x10                               }, { vcmpeq_osss k5{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x10 }, { vcmpeq_osss k5{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x10                         }, { vcmpeq_osss k5{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x10       }, { vcmpeq_osss k5{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x10                         }, { vcmpeq_osss k5{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x10       }, { vcmpeq_osss k5{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x11                               }, { vcmplt_oqss k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x11                               }, { vcmplt_oqss k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x11                               }, { vcmplt_oqss k5{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x11 }, { vcmplt_oqss k5{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x11                         }, { vcmplt_oqss k5{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x11       }, { vcmplt_oqss k5{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x11                         }, { vcmplt_oqss k5{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x11       }, { vcmplt_oqss k5{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x12                               }, { vcmple_oqss k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x12                               }, { vcmple_oqss k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x12                               }, { vcmple_oqss k5{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x12 }, { vcmple_oqss k5{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x12                         }, { vcmple_oqss k5{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x12       }, { vcmple_oqss k5{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x12                         }, { vcmple_oqss k5{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x12       }, { vcmple_oqss k5{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x13                               }, { vcmpunord_sss k5{k7},xmm29,xmm28                             }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x13                               }, { vcmpunord_sss k5{k7},xmm29,xmm28,{sae}                       }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x13                               }, { vcmpunord_sss k5{k7},xmm29,DWORD rcx                       }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x13 }, { vcmpunord_sss k5{k7},xmm29,DWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x13                         }, { vcmpunord_sss k5{k7},xmm29,DWORD rdx+0x1fc                 }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x13       }, { vcmpunord_sss k5{k7},xmm29,DWORD rdx+0x200                 }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x13                         }, { vcmpunord_sss k5{k7},xmm29,DWORD rdx-0x200                 }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x13       }, { vcmpunord_sss k5{k7},xmm29,DWORD rdx-0x204                 }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x14                               }, { vcmpneq_usss k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x14                               }, { vcmpneq_usss k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x14                               }, { vcmpneq_usss k5{k7},xmm29,DWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x14 }, { vcmpneq_usss k5{k7},xmm29,DWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x14                         }, { vcmpneq_usss k5{k7},xmm29,DWORD rdx+0x1fc                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x14       }, { vcmpneq_usss k5{k7},xmm29,DWORD rdx+0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x14                         }, { vcmpneq_usss k5{k7},xmm29,DWORD rdx-0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x14       }, { vcmpneq_usss k5{k7},xmm29,DWORD rdx-0x204                  }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x15                               }, { vcmpnlt_uqss k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x15                               }, { vcmpnlt_uqss k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x15                               }, { vcmpnlt_uqss k5{k7},xmm29,DWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x15 }, { vcmpnlt_uqss k5{k7},xmm29,DWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x15                         }, { vcmpnlt_uqss k5{k7},xmm29,DWORD rdx+0x1fc                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x15       }, { vcmpnlt_uqss k5{k7},xmm29,DWORD rdx+0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x15                         }, { vcmpnlt_uqss k5{k7},xmm29,DWORD rdx-0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x15       }, { vcmpnlt_uqss k5{k7},xmm29,DWORD rdx-0x204                  }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x16                               }, { vcmpnle_uqss k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x16                               }, { vcmpnle_uqss k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x16                               }, { vcmpnle_uqss k5{k7},xmm29,DWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x16 }, { vcmpnle_uqss k5{k7},xmm29,DWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x16                         }, { vcmpnle_uqss k5{k7},xmm29,DWORD rdx+0x1fc                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x16       }, { vcmpnle_uqss k5{k7},xmm29,DWORD rdx+0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x16                         }, { vcmpnle_uqss k5{k7},xmm29,DWORD rdx-0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x16       }, { vcmpnle_uqss k5{k7},xmm29,DWORD rdx-0x204                  }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x17                               }, { vcmpord_sss k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x17                               }, { vcmpord_sss k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x17                               }, { vcmpord_sss k5{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x17 }, { vcmpord_sss k5{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x17                         }, { vcmpord_sss k5{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x17       }, { vcmpord_sss k5{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x17                         }, { vcmpord_sss k5{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x17       }, { vcmpord_sss k5{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x18                               }, { vcmpeq_usss k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x18                               }, { vcmpeq_usss k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x18                               }, { vcmpeq_usss k5{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x18 }, { vcmpeq_usss k5{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x18                         }, { vcmpeq_usss k5{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x18       }, { vcmpeq_usss k5{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x18                         }, { vcmpeq_usss k5{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x18       }, { vcmpeq_usss k5{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x19                               }, { vcmpnge_uqss k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x19                               }, { vcmpnge_uqss k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x19                               }, { vcmpnge_uqss k5{k7},xmm29,DWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x19 }, { vcmpnge_uqss k5{k7},xmm29,DWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x19                         }, { vcmpnge_uqss k5{k7},xmm29,DWORD rdx+0x1fc                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x19       }, { vcmpnge_uqss k5{k7},xmm29,DWORD rdx+0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x19                         }, { vcmpnge_uqss k5{k7},xmm29,DWORD rdx-0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x19       }, { vcmpnge_uqss k5{k7},xmm29,DWORD rdx-0x204                  }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x1a                               }, { vcmpngt_uqss k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x1a                               }, { vcmpngt_uqss k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x1a                               }, { vcmpngt_uqss k5{k7},xmm29,DWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1a }, { vcmpngt_uqss k5{k7},xmm29,DWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x1a                         }, { vcmpngt_uqss k5{k7},xmm29,DWORD rdx+0x1fc                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1a       }, { vcmpngt_uqss k5{k7},xmm29,DWORD rdx+0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x1a                         }, { vcmpngt_uqss k5{k7},xmm29,DWORD rdx-0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1a       }, { vcmpngt_uqss k5{k7},xmm29,DWORD rdx-0x204                  }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x1b                               }, { vcmpfalse_osss k5{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x1b                               }, { vcmpfalse_osss k5{k7},xmm29,xmm28,{sae}                      }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x1b                               }, { vcmpfalse_osss k5{k7},xmm29,DWORD rcx                      }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1b }, { vcmpfalse_osss k5{k7},xmm29,DWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x1b                         }, { vcmpfalse_osss k5{k7},xmm29,DWORD rdx+0x1fc                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1b       }, { vcmpfalse_osss k5{k7},xmm29,DWORD rdx+0x200                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x1b                         }, { vcmpfalse_osss k5{k7},xmm29,DWORD rdx-0x200                }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1b       }, { vcmpfalse_osss k5{k7},xmm29,DWORD rdx-0x204                }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x1c                               }, { vcmpneq_osss k5{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x1c                               }, { vcmpneq_osss k5{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x1c                               }, { vcmpneq_osss k5{k7},xmm29,DWORD rcx                        }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1c }, { vcmpneq_osss k5{k7},xmm29,DWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x1c                         }, { vcmpneq_osss k5{k7},xmm29,DWORD rdx+0x1fc                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1c       }, { vcmpneq_osss k5{k7},xmm29,DWORD rdx+0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x1c                         }, { vcmpneq_osss k5{k7},xmm29,DWORD rdx-0x200                  }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1c       }, { vcmpneq_osss k5{k7},xmm29,DWORD rdx-0x204                  }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x1d                               }, { vcmpge_oqss k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x1d                               }, { vcmpge_oqss k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x1d                               }, { vcmpge_oqss k5{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1d }, { vcmpge_oqss k5{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x1d                         }, { vcmpge_oqss k5{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1d       }, { vcmpge_oqss k5{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x1d                         }, { vcmpge_oqss k5{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1d       }, { vcmpge_oqss k5{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x1e                               }, { vcmpgt_oqss k5{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x1e                               }, { vcmpgt_oqss k5{k7},xmm29,xmm28,{sae}                         }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x1e                               }, { vcmpgt_oqss k5{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1e }, { vcmpgt_oqss k5{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x1e                         }, { vcmpgt_oqss k5{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1e       }, { vcmpgt_oqss k5{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x1e                         }, { vcmpgt_oqss k5{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1e       }, { vcmpgt_oqss k5{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x1f                               }, { vcmptrue_usss k5{k7},xmm29,xmm28                             }
+testcase	{ 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x1f                               }, { vcmptrue_usss k5{k7},xmm29,xmm28,{sae}                       }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x1f                               }, { vcmptrue_usss k5{k7},xmm29,DWORD rcx                       }
+testcase	{ 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1f }, { vcmptrue_usss k5{k7},xmm29,DWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x1f                         }, { vcmptrue_usss k5{k7},xmm29,DWORD rdx+0x1fc                 }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1f       }, { vcmptrue_usss k5{k7},xmm29,DWORD rdx+0x200                 }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x1f                         }, { vcmptrue_usss k5{k7},xmm29,DWORD rdx-0x200                 }
+testcase	{ 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1f       }, { vcmptrue_usss k5{k7},xmm29,DWORD rdx-0x204                 }
+testcase	{ 0x62, 0x01, 0xfd, 0x08, 0x2f, 0xf5                                     }, { vcomisd xmm30,xmm29                                          }
+testcase	{ 0x62, 0x01, 0xfd, 0x18, 0x2f, 0xf5                                     }, { vcomisd xmm30,xmm29,{sae}                                    }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x2f, 0x31                                     }, { vcomisd xmm30,QWORD rcx                                    }
+testcase	{ 0x62, 0x21, 0xfd, 0x08, 0x2f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcomisd xmm30,QWORD rax+r14*8+0x123                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x2f, 0x72, 0x7f                               }, { vcomisd xmm30,QWORD rdx+0x3f8                              }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x2f, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vcomisd xmm30,QWORD rdx+0x400                              }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x2f, 0x72, 0x80                               }, { vcomisd xmm30,QWORD rdx-0x400                              }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x2f, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vcomisd xmm30,QWORD rdx-0x408                              }
+testcase	{ 0x62, 0x01, 0x7c, 0x08, 0x2f, 0xf5                                     }, { vcomiss xmm30,xmm29                                          }
+testcase	{ 0x62, 0x01, 0x7c, 0x18, 0x2f, 0xf5                                     }, { vcomiss xmm30,xmm29,{sae}                                    }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x2f, 0x31                                     }, { vcomiss xmm30,DWORD rcx                                    }
+testcase	{ 0x62, 0x21, 0x7c, 0x08, 0x2f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcomiss xmm30,DWORD rax+r14*8+0x123                        }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x2f, 0x72, 0x7f                               }, { vcomiss xmm30,DWORD rdx+0x1fc                              }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x2f, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcomiss xmm30,DWORD rdx+0x200                              }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x2f, 0x72, 0x80                               }, { vcomiss xmm30,DWORD rdx-0x200                              }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x2f, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcomiss xmm30,DWORD rdx-0x204                              }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x8a, 0x31                                     }, { vcompresspd ZWORD rcx,zmm30                                }
+testcase	{ 0x62, 0x62, 0xfd, 0x4f, 0x8a, 0x31                                     }, { vcompresspd ZWORD rcx{k7},zmm30                            }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x8a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcompresspd ZWORD rax+r14*8+0x123,zmm30                    }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x8a, 0x72, 0x7f                               }, { vcompresspd ZWORD rdx+0x3f8,zmm30                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x8a, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vcompresspd ZWORD rdx+0x400,zmm30                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x8a, 0x72, 0x80                               }, { vcompresspd ZWORD rdx-0x400,zmm30                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x8a, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vcompresspd ZWORD rdx-0x408,zmm30                          }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0x8a, 0xee                                     }, { vcompresspd zmm30,zmm29                                      }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0x8a, 0xee                                     }, { vcompresspd zmm30{k7},zmm29                                  }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0x8a, 0xee                                     }, { vcompresspd zmm30{k7}{z},zmm29                               }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x8a, 0x31                                     }, { vcompressps ZWORD rcx,zmm30                                }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x8a, 0x31                                     }, { vcompressps ZWORD rcx{k7},zmm30                            }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x8a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcompressps ZWORD rax+r14*8+0x123,zmm30                    }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x8a, 0x72, 0x7f                               }, { vcompressps ZWORD rdx+0x1fc,zmm30                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x8a, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcompressps ZWORD rdx+0x200,zmm30                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x8a, 0x72, 0x80                               }, { vcompressps ZWORD rdx-0x200,zmm30                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x8a, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcompressps ZWORD rdx-0x204,zmm30                          }
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0x8a, 0xee                                     }, { vcompressps zmm30,zmm29                                      }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x8a, 0xee                                     }, { vcompressps zmm30{k7},zmm29                                  }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x8a, 0xee                                     }, { vcompressps zmm30{k7}{z},zmm29                               }
+testcase	{ 0x62, 0x01, 0x7e, 0x4f, 0xe6, 0xf5                                     }, { vcvtdq2pd zmm30{k7},ymm29                                    }
+testcase	{ 0x62, 0x01, 0x7e, 0xcf, 0xe6, 0xf5                                     }, { vcvtdq2pd zmm30{k7}{z},ymm29                                 }
+testcase	{ 0x62, 0x61, 0x7e, 0x4f, 0xe6, 0x31                                     }, { vcvtdq2pd zmm30{k7},YWORD rcx                              }
+testcase	{ 0x62, 0x21, 0x7e, 0x4f, 0xe6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtdq2pd zmm30{k7},YWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x61, 0x7e, 0x5f, 0xe6, 0x31                                     }, { vcvtdq2pd zmm30{k7},DWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x61, 0x7e, 0x4f, 0xe6, 0x72, 0x7f                               }, { vcvtdq2pd zmm30{k7},YWORD rdx+0xfe0                        }
+testcase	{ 0x62, 0x61, 0x7e, 0x4f, 0xe6, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vcvtdq2pd zmm30{k7},YWORD rdx+0x1000                       }
+testcase	{ 0x62, 0x61, 0x7e, 0x4f, 0xe6, 0x72, 0x80                               }, { vcvtdq2pd zmm30{k7},YWORD rdx-0x1000                       }
+testcase	{ 0x62, 0x61, 0x7e, 0x4f, 0xe6, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vcvtdq2pd zmm30{k7},YWORD rdx-0x1020                       }
+testcase	{ 0x62, 0x61, 0x7e, 0x5f, 0xe6, 0x72, 0x7f                               }, { vcvtdq2pd zmm30{k7},DWORD rdx+0x1fc{1to8}                  }
+testcase	{ 0x62, 0x61, 0x7e, 0x5f, 0xe6, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvtdq2pd zmm30{k7},DWORD rdx+0x200{1to8}                  }
+testcase	{ 0x62, 0x61, 0x7e, 0x5f, 0xe6, 0x72, 0x80                               }, { vcvtdq2pd zmm30{k7},DWORD rdx-0x200{1to8}                  }
+testcase	{ 0x62, 0x61, 0x7e, 0x5f, 0xe6, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtdq2pd zmm30{k7},DWORD rdx-0x204{1to8}                  }
+testcase	{ 0x62, 0x01, 0x7c, 0x48, 0x5b, 0xf5                                     }, { vcvtdq2ps zmm30,zmm29                                        }
+testcase	{ 0x62, 0x01, 0x7c, 0x4f, 0x5b, 0xf5                                     }, { vcvtdq2ps zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x01, 0x7c, 0xcf, 0x5b, 0xf5                                     }, { vcvtdq2ps zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x01, 0x7c, 0x18, 0x5b, 0xf5                                     }, { vcvtdq2ps zmm30,zmm29,{rn-sae}                               }
+testcase	{ 0x62, 0x01, 0x7c, 0x58, 0x5b, 0xf5                                     }, { vcvtdq2ps zmm30,zmm29,{ru-sae}                               }
+testcase	{ 0x62, 0x01, 0x7c, 0x38, 0x5b, 0xf5                                     }, { vcvtdq2ps zmm30,zmm29,{rd-sae}                               }
+testcase	{ 0x62, 0x01, 0x7c, 0x78, 0x5b, 0xf5                                     }, { vcvtdq2ps zmm30,zmm29,{rz-sae}                               }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x5b, 0x31                                     }, { vcvtdq2ps zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x21, 0x7c, 0x48, 0x5b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtdq2ps zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x5b, 0x31                                     }, { vcvtdq2ps zmm30,DWORD rcx{1to16}                           }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x5b, 0x72, 0x7f                               }, { vcvtdq2ps zmm30,ZWORD rdx+0x1fc0                           }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x5b, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vcvtdq2ps zmm30,ZWORD rdx+0x2000                           }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x5b, 0x72, 0x80                               }, { vcvtdq2ps zmm30,ZWORD rdx-0x2000                           }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x5b, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vcvtdq2ps zmm30,ZWORD rdx-0x2040                           }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x5b, 0x72, 0x7f                               }, { vcvtdq2ps zmm30,DWORD rdx+0x1fc{1to16}                     }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x5b, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvtdq2ps zmm30,DWORD rdx+0x200{1to16}                     }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x5b, 0x72, 0x80                               }, { vcvtdq2ps zmm30,DWORD rdx-0x200{1to16}                     }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x5b, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtdq2ps zmm30,DWORD rdx-0x204{1to16}                     }
+testcase	{ 0x62, 0x01, 0xff, 0x4f, 0xe6, 0xf5                                     }, { vcvtpd2dq ymm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x01, 0xff, 0xcf, 0xe6, 0xf5                                     }, { vcvtpd2dq ymm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x01, 0xff, 0x1f, 0xe6, 0xf5                                     }, { vcvtpd2dq ymm30{k7},zmm29,{rn-sae}                           }
+testcase	{ 0x62, 0x01, 0xff, 0x5f, 0xe6, 0xf5                                     }, { vcvtpd2dq ymm30{k7},zmm29,{ru-sae}                           }
+testcase	{ 0x62, 0x01, 0xff, 0x3f, 0xe6, 0xf5                                     }, { vcvtpd2dq ymm30{k7},zmm29,{rd-sae}                           }
+testcase	{ 0x62, 0x01, 0xff, 0x7f, 0xe6, 0xf5                                     }, { vcvtpd2dq ymm30{k7},zmm29,{rz-sae}                           }
+testcase	{ 0x62, 0x61, 0xff, 0x4f, 0xe6, 0x31                                     }, { vcvtpd2dq ymm30{k7},ZWORD rcx                              }
+testcase	{ 0x62, 0x21, 0xff, 0x4f, 0xe6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtpd2dq ymm30{k7},ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x61, 0xff, 0x5f, 0xe6, 0x31                                     }, { vcvtpd2dq ymm30{k7},QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x61, 0xff, 0x4f, 0xe6, 0x72, 0x7f                               }, { vcvtpd2dq ymm30{k7},ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x61, 0xff, 0x4f, 0xe6, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vcvtpd2dq ymm30{k7},ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x61, 0xff, 0x4f, 0xe6, 0x72, 0x80                               }, { vcvtpd2dq ymm30{k7},ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x61, 0xff, 0x4f, 0xe6, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vcvtpd2dq ymm30{k7},ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x61, 0xff, 0x5f, 0xe6, 0x72, 0x7f                               }, { vcvtpd2dq ymm30{k7},QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x61, 0xff, 0x5f, 0xe6, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vcvtpd2dq ymm30{k7},QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x61, 0xff, 0x5f, 0xe6, 0x72, 0x80                               }, { vcvtpd2dq ymm30{k7},QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x61, 0xff, 0x5f, 0xe6, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtpd2dq ymm30{k7},QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x01, 0xfd, 0x4f, 0x5a, 0xf5                                     }, { vcvtpd2ps ymm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x01, 0xfd, 0xcf, 0x5a, 0xf5                                     }, { vcvtpd2ps ymm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x01, 0xfd, 0x1f, 0x5a, 0xf5                                     }, { vcvtpd2ps ymm30{k7},zmm29,{rn-sae}                           }
+testcase	{ 0x62, 0x01, 0xfd, 0x5f, 0x5a, 0xf5                                     }, { vcvtpd2ps ymm30{k7},zmm29,{ru-sae}                           }
+testcase	{ 0x62, 0x01, 0xfd, 0x3f, 0x5a, 0xf5                                     }, { vcvtpd2ps ymm30{k7},zmm29,{rd-sae}                           }
+testcase	{ 0x62, 0x01, 0xfd, 0x7f, 0x5a, 0xf5                                     }, { vcvtpd2ps ymm30{k7},zmm29,{rz-sae}                           }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0x5a, 0x31                                     }, { vcvtpd2ps ymm30{k7},ZWORD rcx                              }
+testcase	{ 0x62, 0x21, 0xfd, 0x4f, 0x5a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtpd2ps ymm30{k7},ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x61, 0xfd, 0x5f, 0x5a, 0x31                                     }, { vcvtpd2ps ymm30{k7},QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0x5a, 0x72, 0x7f                               }, { vcvtpd2ps ymm30{k7},ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0x5a, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vcvtpd2ps ymm30{k7},ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0x5a, 0x72, 0x80                               }, { vcvtpd2ps ymm30{k7},ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0x5a, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vcvtpd2ps ymm30{k7},ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x61, 0xfd, 0x5f, 0x5a, 0x72, 0x7f                               }, { vcvtpd2ps ymm30{k7},QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x61, 0xfd, 0x5f, 0x5a, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vcvtpd2ps ymm30{k7},QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x61, 0xfd, 0x5f, 0x5a, 0x72, 0x80                               }, { vcvtpd2ps ymm30{k7},QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x61, 0xfd, 0x5f, 0x5a, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtpd2ps ymm30{k7},QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x01, 0xfc, 0x4f, 0x79, 0xf5                                     }, { vcvtpd2udq ymm30{k7},zmm29                                   }
+testcase	{ 0x62, 0x01, 0xfc, 0xcf, 0x79, 0xf5                                     }, { vcvtpd2udq ymm30{k7}{z},zmm29                                }
+testcase	{ 0x62, 0x01, 0xfc, 0x1f, 0x79, 0xf5                                     }, { vcvtpd2udq ymm30{k7},zmm29,{rn-sae}                          }
+testcase	{ 0x62, 0x01, 0xfc, 0x5f, 0x79, 0xf5                                     }, { vcvtpd2udq ymm30{k7},zmm29,{ru-sae}                          }
+testcase	{ 0x62, 0x01, 0xfc, 0x3f, 0x79, 0xf5                                     }, { vcvtpd2udq ymm30{k7},zmm29,{rd-sae}                          }
+testcase	{ 0x62, 0x01, 0xfc, 0x7f, 0x79, 0xf5                                     }, { vcvtpd2udq ymm30{k7},zmm29,{rz-sae}                          }
+testcase	{ 0x62, 0x61, 0xfc, 0x4f, 0x79, 0x31                                     }, { vcvtpd2udq ymm30{k7},ZWORD rcx                             }
+testcase	{ 0x62, 0x21, 0xfc, 0x4f, 0x79, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtpd2udq ymm30{k7},ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0x61, 0xfc, 0x5f, 0x79, 0x31                                     }, { vcvtpd2udq ymm30{k7},QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0x61, 0xfc, 0x4f, 0x79, 0x72, 0x7f                               }, { vcvtpd2udq ymm30{k7},ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0x61, 0xfc, 0x4f, 0x79, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vcvtpd2udq ymm30{k7},ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0x61, 0xfc, 0x4f, 0x79, 0x72, 0x80                               }, { vcvtpd2udq ymm30{k7},ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0x61, 0xfc, 0x4f, 0x79, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vcvtpd2udq ymm30{k7},ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0x61, 0xfc, 0x5f, 0x79, 0x72, 0x7f                               }, { vcvtpd2udq ymm30{k7},QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0x61, 0xfc, 0x5f, 0x79, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vcvtpd2udq ymm30{k7},QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0x61, 0xfc, 0x5f, 0x79, 0x72, 0x80                               }, { vcvtpd2udq ymm30{k7},QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0x61, 0xfc, 0x5f, 0x79, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtpd2udq ymm30{k7},QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x13, 0xf5                                     }, { vcvtph2ps zmm30{k7},ymm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x13, 0xf5                                     }, { vcvtph2ps zmm30{k7}{z},ymm29                                 }
+testcase	{ 0x62, 0x02, 0x7d, 0x1f, 0x13, 0xf5                                     }, { vcvtph2ps zmm30{k7},ymm29,{sae}                              }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x13, 0x31                                     }, { vcvtph2ps zmm30{k7},YWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x7d, 0x4f, 0x13, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtph2ps zmm30{k7},YWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x13, 0x72, 0x7f                               }, { vcvtph2ps zmm30{k7},YWORD rdx+0xfe0                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x13, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vcvtph2ps zmm30{k7},YWORD rdx+0x1000                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x13, 0x72, 0x80                               }, { vcvtph2ps zmm30{k7},YWORD rdx-0x1000                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x13, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vcvtph2ps zmm30{k7},YWORD rdx-0x1020                       }
+testcase	{ 0x62, 0x01, 0x7d, 0x48, 0x5b, 0xf5                                     }, { vcvtps2dq zmm30,zmm29                                        }
+testcase	{ 0x62, 0x01, 0x7d, 0x4f, 0x5b, 0xf5                                     }, { vcvtps2dq zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x01, 0x7d, 0xcf, 0x5b, 0xf5                                     }, { vcvtps2dq zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x01, 0x7d, 0x18, 0x5b, 0xf5                                     }, { vcvtps2dq zmm30,zmm29,{rn-sae}                               }
+testcase	{ 0x62, 0x01, 0x7d, 0x58, 0x5b, 0xf5                                     }, { vcvtps2dq zmm30,zmm29,{ru-sae}                               }
+testcase	{ 0x62, 0x01, 0x7d, 0x38, 0x5b, 0xf5                                     }, { vcvtps2dq zmm30,zmm29,{rd-sae}                               }
+testcase	{ 0x62, 0x01, 0x7d, 0x78, 0x5b, 0xf5                                     }, { vcvtps2dq zmm30,zmm29,{rz-sae}                               }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x5b, 0x31                                     }, { vcvtps2dq zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x21, 0x7d, 0x48, 0x5b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtps2dq zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x61, 0x7d, 0x58, 0x5b, 0x31                                     }, { vcvtps2dq zmm30,DWORD rcx{1to16}                           }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x5b, 0x72, 0x7f                               }, { vcvtps2dq zmm30,ZWORD rdx+0x1fc0                           }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x5b, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vcvtps2dq zmm30,ZWORD rdx+0x2000                           }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x5b, 0x72, 0x80                               }, { vcvtps2dq zmm30,ZWORD rdx-0x2000                           }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x5b, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vcvtps2dq zmm30,ZWORD rdx-0x2040                           }
+testcase	{ 0x62, 0x61, 0x7d, 0x58, 0x5b, 0x72, 0x7f                               }, { vcvtps2dq zmm30,DWORD rdx+0x1fc{1to16}                     }
+testcase	{ 0x62, 0x61, 0x7d, 0x58, 0x5b, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvtps2dq zmm30,DWORD rdx+0x200{1to16}                     }
+testcase	{ 0x62, 0x61, 0x7d, 0x58, 0x5b, 0x72, 0x80                               }, { vcvtps2dq zmm30,DWORD rdx-0x200{1to16}                     }
+testcase	{ 0x62, 0x61, 0x7d, 0x58, 0x5b, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtps2dq zmm30,DWORD rdx-0x204{1to16}                     }
+testcase	{ 0x62, 0x01, 0x7c, 0x4f, 0x5a, 0xf5                                     }, { vcvtps2pd zmm30{k7},ymm29                                    }
+testcase	{ 0x62, 0x01, 0x7c, 0xcf, 0x5a, 0xf5                                     }, { vcvtps2pd zmm30{k7}{z},ymm29                                 }
+testcase	{ 0x62, 0x01, 0x7c, 0x1f, 0x5a, 0xf5                                     }, { vcvtps2pd zmm30{k7},ymm29,{sae}                              }
+testcase	{ 0x62, 0x61, 0x7c, 0x4f, 0x5a, 0x31                                     }, { vcvtps2pd zmm30{k7},YWORD rcx                              }
+testcase	{ 0x62, 0x21, 0x7c, 0x4f, 0x5a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtps2pd zmm30{k7},YWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x61, 0x7c, 0x5f, 0x5a, 0x31                                     }, { vcvtps2pd zmm30{k7},DWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x61, 0x7c, 0x4f, 0x5a, 0x72, 0x7f                               }, { vcvtps2pd zmm30{k7},YWORD rdx+0xfe0                        }
+testcase	{ 0x62, 0x61, 0x7c, 0x4f, 0x5a, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vcvtps2pd zmm30{k7},YWORD rdx+0x1000                       }
+testcase	{ 0x62, 0x61, 0x7c, 0x4f, 0x5a, 0x72, 0x80                               }, { vcvtps2pd zmm30{k7},YWORD rdx-0x1000                       }
+testcase	{ 0x62, 0x61, 0x7c, 0x4f, 0x5a, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vcvtps2pd zmm30{k7},YWORD rdx-0x1020                       }
+testcase	{ 0x62, 0x61, 0x7c, 0x5f, 0x5a, 0x72, 0x7f                               }, { vcvtps2pd zmm30{k7},DWORD rdx+0x1fc{1to8}                  }
+testcase	{ 0x62, 0x61, 0x7c, 0x5f, 0x5a, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvtps2pd zmm30{k7},DWORD rdx+0x200{1to8}                  }
+testcase	{ 0x62, 0x61, 0x7c, 0x5f, 0x5a, 0x72, 0x80                               }, { vcvtps2pd zmm30{k7},DWORD rdx-0x200{1to8}                  }
+testcase	{ 0x62, 0x61, 0x7c, 0x5f, 0x5a, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtps2pd zmm30{k7},DWORD rdx-0x204{1to8}                  }
+testcase	{ 0x62, 0x03, 0x7d, 0x4f, 0x1d, 0xee, 0xab                               }, { vcvtps2ph ymm30{k7},zmm29,0xab                               }
+testcase	{ 0x62, 0x03, 0x7d, 0xcf, 0x1d, 0xee, 0xab                               }, { vcvtps2ph ymm30{k7}{z},zmm29,0xab                            }
+testcase	{ 0x62, 0x03, 0x7d, 0x1f, 0x1d, 0xee, 0xab                               }, { vcvtps2ph ymm30{k7},zmm29,{sae},0xab                         }
+testcase	{ 0x62, 0x03, 0x7d, 0x4f, 0x1d, 0xee, 0x7b                               }, { vcvtps2ph ymm30{k7},zmm29,0x7b                               }
+testcase	{ 0x62, 0x03, 0x7d, 0x1f, 0x1d, 0xee, 0x7b                               }, { vcvtps2ph ymm30{k7},zmm29,{sae},0x7b                         }
+testcase	{ 0x62, 0x01, 0x7c, 0x48, 0x79, 0xf5                                     }, { vcvtps2udq zmm30,zmm29                                       }
+testcase	{ 0x62, 0x01, 0x7c, 0x4f, 0x79, 0xf5                                     }, { vcvtps2udq zmm30{k7},zmm29                                   }
+testcase	{ 0x62, 0x01, 0x7c, 0xcf, 0x79, 0xf5                                     }, { vcvtps2udq zmm30{k7}{z},zmm29                                }
+testcase	{ 0x62, 0x01, 0x7c, 0x18, 0x79, 0xf5                                     }, { vcvtps2udq zmm30,zmm29,{rn-sae}                              }
+testcase	{ 0x62, 0x01, 0x7c, 0x58, 0x79, 0xf5                                     }, { vcvtps2udq zmm30,zmm29,{ru-sae}                              }
+testcase	{ 0x62, 0x01, 0x7c, 0x38, 0x79, 0xf5                                     }, { vcvtps2udq zmm30,zmm29,{rd-sae}                              }
+testcase	{ 0x62, 0x01, 0x7c, 0x78, 0x79, 0xf5                                     }, { vcvtps2udq zmm30,zmm29,{rz-sae}                              }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x79, 0x31                                     }, { vcvtps2udq zmm30,ZWORD rcx                                 }
+testcase	{ 0x62, 0x21, 0x7c, 0x48, 0x79, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtps2udq zmm30,ZWORD rax+r14*8+0x123                     }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x79, 0x31                                     }, { vcvtps2udq zmm30,DWORD rcx{1to16}                          }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x79, 0x72, 0x7f                               }, { vcvtps2udq zmm30,ZWORD rdx+0x1fc0                          }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x79, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vcvtps2udq zmm30,ZWORD rdx+0x2000                          }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x79, 0x72, 0x80                               }, { vcvtps2udq zmm30,ZWORD rdx-0x2000                          }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x79, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vcvtps2udq zmm30,ZWORD rdx-0x2040                          }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x79, 0x72, 0x7f                               }, { vcvtps2udq zmm30,DWORD rdx+0x1fc{1to16}                    }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x79, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvtps2udq zmm30,DWORD rdx+0x200{1to16}                    }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x79, 0x72, 0x80                               }, { vcvtps2udq zmm30,DWORD rdx-0x200{1to16}                    }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x79, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtps2udq zmm30,DWORD rdx-0x204{1to16}                    }
+testcase	{ 0x62, 0x91, 0x7f, 0x18, 0x2d, 0xc6                                     }, { vcvtsd2si eax,xmm30,{rn-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7f, 0x58, 0x2d, 0xc6                                     }, { vcvtsd2si eax,xmm30,{ru-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7f, 0x38, 0x2d, 0xc6                                     }, { vcvtsd2si eax,xmm30,{rd-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7f, 0x78, 0x2d, 0xc6                                     }, { vcvtsd2si eax,xmm30,{rz-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7f, 0x18, 0x2d, 0xee                                     }, { vcvtsd2si ebp,xmm30,{rn-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7f, 0x58, 0x2d, 0xee                                     }, { vcvtsd2si ebp,xmm30,{ru-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7f, 0x38, 0x2d, 0xee                                     }, { vcvtsd2si ebp,xmm30,{rd-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7f, 0x78, 0x2d, 0xee                                     }, { vcvtsd2si ebp,xmm30,{rz-sae}                                 }
+testcase	{ 0x62, 0x11, 0x7f, 0x18, 0x2d, 0xee                                     }, { vcvtsd2si r13d,xmm30,{rn-sae}                                }
+testcase	{ 0x62, 0x11, 0x7f, 0x58, 0x2d, 0xee                                     }, { vcvtsd2si r13d,xmm30,{ru-sae}                                }
+testcase	{ 0x62, 0x11, 0x7f, 0x38, 0x2d, 0xee                                     }, { vcvtsd2si r13d,xmm30,{rd-sae}                                }
+testcase	{ 0x62, 0x11, 0x7f, 0x78, 0x2d, 0xee                                     }, { vcvtsd2si r13d,xmm30,{rz-sae}                                }
+testcase	{ 0x62, 0x91, 0xff, 0x18, 0x2d, 0xc6                                     }, { vcvtsd2si rax,xmm30,{rn-sae}                                 }
+testcase	{ 0x62, 0x91, 0xff, 0x58, 0x2d, 0xc6                                     }, { vcvtsd2si rax,xmm30,{ru-sae}                                 }
+testcase	{ 0x62, 0x91, 0xff, 0x38, 0x2d, 0xc6                                     }, { vcvtsd2si rax,xmm30,{rd-sae}                                 }
+testcase	{ 0x62, 0x91, 0xff, 0x78, 0x2d, 0xc6                                     }, { vcvtsd2si rax,xmm30,{rz-sae}                                 }
+testcase	{ 0x62, 0x11, 0xff, 0x18, 0x2d, 0xc6                                     }, { vcvtsd2si r8,xmm30,{rn-sae}                                  }
+testcase	{ 0x62, 0x11, 0xff, 0x58, 0x2d, 0xc6                                     }, { vcvtsd2si r8,xmm30,{ru-sae}                                  }
+testcase	{ 0x62, 0x11, 0xff, 0x38, 0x2d, 0xc6                                     }, { vcvtsd2si r8,xmm30,{rd-sae}                                  }
+testcase	{ 0x62, 0x11, 0xff, 0x78, 0x2d, 0xc6                                     }, { vcvtsd2si r8,xmm30,{rz-sae}                                  }
+testcase	{ 0x62, 0x01, 0x97, 0x07, 0x5a, 0xf4                                     }, { vcvtsd2ss xmm30{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x97, 0x87, 0x5a, 0xf4                                     }, { vcvtsd2ss xmm30{k7}{z},xmm29,xmm28                           }
+testcase	{ 0x62, 0x01, 0x97, 0x17, 0x5a, 0xf4                                     }, { vcvtsd2ss xmm30{k7},xmm29,xmm28,{rn-sae}                     }
+testcase	{ 0x62, 0x01, 0x97, 0x57, 0x5a, 0xf4                                     }, { vcvtsd2ss xmm30{k7},xmm29,xmm28,{ru-sae}                     }
+testcase	{ 0x62, 0x01, 0x97, 0x37, 0x5a, 0xf4                                     }, { vcvtsd2ss xmm30{k7},xmm29,xmm28,{rd-sae}                     }
+testcase	{ 0x62, 0x01, 0x97, 0x77, 0x5a, 0xf4                                     }, { vcvtsd2ss xmm30{k7},xmm29,xmm28,{rz-sae}                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5a, 0x31                                     }, { vcvtsd2ss xmm30{k7},xmm29,QWORD rcx                        }
+testcase	{ 0x62, 0x21, 0x97, 0x07, 0x5a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtsd2ss xmm30{k7},xmm29,QWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5a, 0x72, 0x7f                               }, { vcvtsd2ss xmm30{k7},xmm29,QWORD rdx+0x3f8                  }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5a, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vcvtsd2ss xmm30{k7},xmm29,QWORD rdx+0x400                  }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5a, 0x72, 0x80                               }, { vcvtsd2ss xmm30{k7},xmm29,QWORD rdx-0x400                  }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5a, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtsd2ss xmm30{k7},xmm29,QWORD rdx-0x408                  }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x2a, 0xf0                                     }, { vcvtsi2sd xmm30,xmm29,eax                                    }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x2a, 0xf5                                     }, { vcvtsi2sd xmm30,xmm29,ebp                                    }
+testcase	{ 0x62, 0x41, 0x17, 0x00, 0x2a, 0xf5                                     }, { vcvtsi2sd xmm30,xmm29,r13d                                   }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x2a, 0x31                                     }, { vcvtsi2sd xmm30,xmm29,DWORD rcx                            }
+testcase	{ 0x62, 0x21, 0x17, 0x00, 0x2a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtsi2sd xmm30,xmm29,DWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x2a, 0x72, 0x7f                               }, { vcvtsi2sd xmm30,xmm29,DWORD rdx+0x1fc                      }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x2a, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvtsi2sd xmm30,xmm29,DWORD rdx+0x200                      }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x2a, 0x72, 0x80                               }, { vcvtsi2sd xmm30,xmm29,DWORD rdx-0x200                      }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x2a, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtsi2sd xmm30,xmm29,DWORD rdx-0x204                      }
+testcase	{ 0x62, 0x61, 0x97, 0x00, 0x2a, 0xf0                                     }, { vcvtsi2sd xmm30,xmm29,rax                                    }
+testcase	{ 0x62, 0x61, 0x97, 0x10, 0x2a, 0xf0                                     }, { vcvtsi2sd xmm30,xmm29,{rn-sae},rax                           }
+testcase	{ 0x62, 0x61, 0x97, 0x50, 0x2a, 0xf0                                     }, { vcvtsi2sd xmm30,xmm29,{ru-sae},rax                           }
+testcase	{ 0x62, 0x61, 0x97, 0x30, 0x2a, 0xf0                                     }, { vcvtsi2sd xmm30,xmm29,{rd-sae},rax                           }
+testcase	{ 0x62, 0x61, 0x97, 0x70, 0x2a, 0xf0                                     }, { vcvtsi2sd xmm30,xmm29,{rz-sae},rax                           }
+testcase	{ 0x62, 0x41, 0x97, 0x00, 0x2a, 0xf0                                     }, { vcvtsi2sd xmm30,xmm29,r8                                     }
+testcase	{ 0x62, 0x41, 0x97, 0x10, 0x2a, 0xf0                                     }, { vcvtsi2sd xmm30,xmm29,{rn-sae},r8                            }
+testcase	{ 0x62, 0x41, 0x97, 0x50, 0x2a, 0xf0                                     }, { vcvtsi2sd xmm30,xmm29,{ru-sae},r8                            }
+testcase	{ 0x62, 0x41, 0x97, 0x30, 0x2a, 0xf0                                     }, { vcvtsi2sd xmm30,xmm29,{rd-sae},r8                            }
+testcase	{ 0x62, 0x41, 0x97, 0x70, 0x2a, 0xf0                                     }, { vcvtsi2sd xmm30,xmm29,{rz-sae},r8                            }
+testcase	{ 0x62, 0x61, 0x97, 0x00, 0x2a, 0x31                                     }, { vcvtsi2sd xmm30,xmm29,QWORD rcx                            }
+testcase	{ 0x62, 0x21, 0x97, 0x00, 0x2a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtsi2sd xmm30,xmm29,QWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x61, 0x97, 0x00, 0x2a, 0x72, 0x7f                               }, { vcvtsi2sd xmm30,xmm29,QWORD rdx+0x3f8                      }
+testcase	{ 0x62, 0x61, 0x97, 0x00, 0x2a, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vcvtsi2sd xmm30,xmm29,QWORD rdx+0x400                      }
+testcase	{ 0x62, 0x61, 0x97, 0x00, 0x2a, 0x72, 0x80                               }, { vcvtsi2sd xmm30,xmm29,QWORD rdx-0x400                      }
+testcase	{ 0x62, 0x61, 0x97, 0x00, 0x2a, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtsi2sd xmm30,xmm29,QWORD rdx-0x408                      }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,eax                                    }
+testcase	{ 0x62, 0x61, 0x16, 0x10, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,{rn-sae},eax                           }
+testcase	{ 0x62, 0x61, 0x16, 0x50, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,{ru-sae},eax                           }
+testcase	{ 0x62, 0x61, 0x16, 0x30, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,{rd-sae},eax                           }
+testcase	{ 0x62, 0x61, 0x16, 0x70, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,{rz-sae},eax                           }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x2a, 0xf5                                     }, { vcvtsi2ss xmm30,xmm29,ebp                                    }
+testcase	{ 0x62, 0x61, 0x16, 0x10, 0x2a, 0xf5                                     }, { vcvtsi2ss xmm30,xmm29,{rn-sae},ebp                           }
+testcase	{ 0x62, 0x61, 0x16, 0x50, 0x2a, 0xf5                                     }, { vcvtsi2ss xmm30,xmm29,{ru-sae},ebp                           }
+testcase	{ 0x62, 0x61, 0x16, 0x30, 0x2a, 0xf5                                     }, { vcvtsi2ss xmm30,xmm29,{rd-sae},ebp                           }
+testcase	{ 0x62, 0x61, 0x16, 0x70, 0x2a, 0xf5                                     }, { vcvtsi2ss xmm30,xmm29,{rz-sae},ebp                           }
+testcase	{ 0x62, 0x41, 0x16, 0x00, 0x2a, 0xf5                                     }, { vcvtsi2ss xmm30,xmm29,r13d                                   }
+testcase	{ 0x62, 0x41, 0x16, 0x10, 0x2a, 0xf5                                     }, { vcvtsi2ss xmm30,xmm29,{rn-sae},r13d                          }
+testcase	{ 0x62, 0x41, 0x16, 0x50, 0x2a, 0xf5                                     }, { vcvtsi2ss xmm30,xmm29,{ru-sae},r13d                          }
+testcase	{ 0x62, 0x41, 0x16, 0x30, 0x2a, 0xf5                                     }, { vcvtsi2ss xmm30,xmm29,{rd-sae},r13d                          }
+testcase	{ 0x62, 0x41, 0x16, 0x70, 0x2a, 0xf5                                     }, { vcvtsi2ss xmm30,xmm29,{rz-sae},r13d                          }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x2a, 0x31                                     }, { vcvtsi2ss xmm30,xmm29,DWORD rcx                            }
+testcase	{ 0x62, 0x21, 0x16, 0x00, 0x2a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtsi2ss xmm30,xmm29,DWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x2a, 0x72, 0x7f                               }, { vcvtsi2ss xmm30,xmm29,DWORD rdx+0x1fc                      }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x2a, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvtsi2ss xmm30,xmm29,DWORD rdx+0x200                      }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x2a, 0x72, 0x80                               }, { vcvtsi2ss xmm30,xmm29,DWORD rdx-0x200                      }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x2a, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtsi2ss xmm30,xmm29,DWORD rdx-0x204                      }
+testcase	{ 0x62, 0x61, 0x96, 0x00, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,rax                                    }
+testcase	{ 0x62, 0x61, 0x96, 0x10, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,{rn-sae},rax                           }
+testcase	{ 0x62, 0x61, 0x96, 0x50, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,{ru-sae},rax                           }
+testcase	{ 0x62, 0x61, 0x96, 0x30, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,{rd-sae},rax                           }
+testcase	{ 0x62, 0x61, 0x96, 0x70, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,{rz-sae},rax                           }
+testcase	{ 0x62, 0x41, 0x96, 0x00, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,r8                                     }
+testcase	{ 0x62, 0x41, 0x96, 0x10, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,{rn-sae},r8                            }
+testcase	{ 0x62, 0x41, 0x96, 0x50, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,{ru-sae},r8                            }
+testcase	{ 0x62, 0x41, 0x96, 0x30, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,{rd-sae},r8                            }
+testcase	{ 0x62, 0x41, 0x96, 0x70, 0x2a, 0xf0                                     }, { vcvtsi2ss xmm30,xmm29,{rz-sae},r8                            }
+testcase	{ 0x62, 0x61, 0x96, 0x00, 0x2a, 0x31                                     }, { vcvtsi2ss xmm30,xmm29,QWORD rcx                            }
+testcase	{ 0x62, 0x21, 0x96, 0x00, 0x2a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtsi2ss xmm30,xmm29,QWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x61, 0x96, 0x00, 0x2a, 0x72, 0x7f                               }, { vcvtsi2ss xmm30,xmm29,QWORD rdx+0x3f8                      }
+testcase	{ 0x62, 0x61, 0x96, 0x00, 0x2a, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vcvtsi2ss xmm30,xmm29,QWORD rdx+0x400                      }
+testcase	{ 0x62, 0x61, 0x96, 0x00, 0x2a, 0x72, 0x80                               }, { vcvtsi2ss xmm30,xmm29,QWORD rdx-0x400                      }
+testcase	{ 0x62, 0x61, 0x96, 0x00, 0x2a, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtsi2ss xmm30,xmm29,QWORD rdx-0x408                      }
+testcase	{ 0x62, 0x01, 0x16, 0x07, 0x5a, 0xf4                                     }, { vcvtss2sd xmm30{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x16, 0x87, 0x5a, 0xf4                                     }, { vcvtss2sd xmm30{k7}{z},xmm29,xmm28                           }
+testcase	{ 0x62, 0x01, 0x16, 0x17, 0x5a, 0xf4                                     }, { vcvtss2sd xmm30{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5a, 0x31                                     }, { vcvtss2sd xmm30{k7},xmm29,DWORD rcx                        }
+testcase	{ 0x62, 0x21, 0x16, 0x07, 0x5a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtss2sd xmm30{k7},xmm29,DWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5a, 0x72, 0x7f                               }, { vcvtss2sd xmm30{k7},xmm29,DWORD rdx+0x1fc                  }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5a, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvtss2sd xmm30{k7},xmm29,DWORD rdx+0x200                  }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5a, 0x72, 0x80                               }, { vcvtss2sd xmm30{k7},xmm29,DWORD rdx-0x200                  }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5a, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtss2sd xmm30{k7},xmm29,DWORD rdx-0x204                  }
+testcase	{ 0x62, 0x91, 0x7e, 0x18, 0x2d, 0xc6                                     }, { vcvtss2si eax,xmm30,{rn-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7e, 0x58, 0x2d, 0xc6                                     }, { vcvtss2si eax,xmm30,{ru-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7e, 0x38, 0x2d, 0xc6                                     }, { vcvtss2si eax,xmm30,{rd-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7e, 0x78, 0x2d, 0xc6                                     }, { vcvtss2si eax,xmm30,{rz-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7e, 0x18, 0x2d, 0xee                                     }, { vcvtss2si ebp,xmm30,{rn-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7e, 0x58, 0x2d, 0xee                                     }, { vcvtss2si ebp,xmm30,{ru-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7e, 0x38, 0x2d, 0xee                                     }, { vcvtss2si ebp,xmm30,{rd-sae}                                 }
+testcase	{ 0x62, 0x91, 0x7e, 0x78, 0x2d, 0xee                                     }, { vcvtss2si ebp,xmm30,{rz-sae}                                 }
+testcase	{ 0x62, 0x11, 0x7e, 0x18, 0x2d, 0xee                                     }, { vcvtss2si r13d,xmm30,{rn-sae}                                }
+testcase	{ 0x62, 0x11, 0x7e, 0x58, 0x2d, 0xee                                     }, { vcvtss2si r13d,xmm30,{ru-sae}                                }
+testcase	{ 0x62, 0x11, 0x7e, 0x38, 0x2d, 0xee                                     }, { vcvtss2si r13d,xmm30,{rd-sae}                                }
+testcase	{ 0x62, 0x11, 0x7e, 0x78, 0x2d, 0xee                                     }, { vcvtss2si r13d,xmm30,{rz-sae}                                }
+testcase	{ 0x62, 0x91, 0xfe, 0x18, 0x2d, 0xc6                                     }, { vcvtss2si rax,xmm30,{rn-sae}                                 }
+testcase	{ 0x62, 0x91, 0xfe, 0x58, 0x2d, 0xc6                                     }, { vcvtss2si rax,xmm30,{ru-sae}                                 }
+testcase	{ 0x62, 0x91, 0xfe, 0x38, 0x2d, 0xc6                                     }, { vcvtss2si rax,xmm30,{rd-sae}                                 }
+testcase	{ 0x62, 0x91, 0xfe, 0x78, 0x2d, 0xc6                                     }, { vcvtss2si rax,xmm30,{rz-sae}                                 }
+testcase	{ 0x62, 0x11, 0xfe, 0x18, 0x2d, 0xc6                                     }, { vcvtss2si r8,xmm30,{rn-sae}                                  }
+testcase	{ 0x62, 0x11, 0xfe, 0x58, 0x2d, 0xc6                                     }, { vcvtss2si r8,xmm30,{ru-sae}                                  }
+testcase	{ 0x62, 0x11, 0xfe, 0x38, 0x2d, 0xc6                                     }, { vcvtss2si r8,xmm30,{rd-sae}                                  }
+testcase	{ 0x62, 0x11, 0xfe, 0x78, 0x2d, 0xc6                                     }, { vcvtss2si r8,xmm30,{rz-sae}                                  }
+testcase	{ 0x62, 0x01, 0xfd, 0x4f, 0xe6, 0xf5                                     }, { vcvttpd2dq ymm30{k7},zmm29                                   }
+testcase	{ 0x62, 0x01, 0xfd, 0xcf, 0xe6, 0xf5                                     }, { vcvttpd2dq ymm30{k7}{z},zmm29                                }
+testcase	{ 0x62, 0x01, 0xfd, 0x1f, 0xe6, 0xf5                                     }, { vcvttpd2dq ymm30{k7},zmm29,{sae}                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0xe6, 0x31                                     }, { vcvttpd2dq ymm30{k7},ZWORD rcx                             }
+testcase	{ 0x62, 0x21, 0xfd, 0x4f, 0xe6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttpd2dq ymm30{k7},ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0x61, 0xfd, 0x5f, 0xe6, 0x31                                     }, { vcvttpd2dq ymm30{k7},QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0xe6, 0x72, 0x7f                               }, { vcvttpd2dq ymm30{k7},ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0xe6, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vcvttpd2dq ymm30{k7},ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0xe6, 0x72, 0x80                               }, { vcvttpd2dq ymm30{k7},ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0xe6, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vcvttpd2dq ymm30{k7},ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0x61, 0xfd, 0x5f, 0xe6, 0x72, 0x7f                               }, { vcvttpd2dq ymm30{k7},QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0x61, 0xfd, 0x5f, 0xe6, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vcvttpd2dq ymm30{k7},QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0x61, 0xfd, 0x5f, 0xe6, 0x72, 0x80                               }, { vcvttpd2dq ymm30{k7},QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0x61, 0xfd, 0x5f, 0xe6, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vcvttpd2dq ymm30{k7},QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x01, 0x7e, 0x48, 0x5b, 0xf5                                     }, { vcvttps2dq zmm30,zmm29                                       }
+testcase	{ 0x62, 0x01, 0x7e, 0x4f, 0x5b, 0xf5                                     }, { vcvttps2dq zmm30{k7},zmm29                                   }
+testcase	{ 0x62, 0x01, 0x7e, 0xcf, 0x5b, 0xf5                                     }, { vcvttps2dq zmm30{k7}{z},zmm29                                }
+testcase	{ 0x62, 0x01, 0x7e, 0x18, 0x5b, 0xf5                                     }, { vcvttps2dq zmm30,zmm29,{sae}                                 }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x5b, 0x31                                     }, { vcvttps2dq zmm30,ZWORD rcx                                 }
+testcase	{ 0x62, 0x21, 0x7e, 0x48, 0x5b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttps2dq zmm30,ZWORD rax+r14*8+0x123                     }
+testcase	{ 0x62, 0x61, 0x7e, 0x58, 0x5b, 0x31                                     }, { vcvttps2dq zmm30,DWORD rcx{1to16}                          }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x5b, 0x72, 0x7f                               }, { vcvttps2dq zmm30,ZWORD rdx+0x1fc0                          }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x5b, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vcvttps2dq zmm30,ZWORD rdx+0x2000                          }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x5b, 0x72, 0x80                               }, { vcvttps2dq zmm30,ZWORD rdx-0x2000                          }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x5b, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vcvttps2dq zmm30,ZWORD rdx-0x2040                          }
+testcase	{ 0x62, 0x61, 0x7e, 0x58, 0x5b, 0x72, 0x7f                               }, { vcvttps2dq zmm30,DWORD rdx+0x1fc{1to16}                    }
+testcase	{ 0x62, 0x61, 0x7e, 0x58, 0x5b, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvttps2dq zmm30,DWORD rdx+0x200{1to16}                    }
+testcase	{ 0x62, 0x61, 0x7e, 0x58, 0x5b, 0x72, 0x80                               }, { vcvttps2dq zmm30,DWORD rdx-0x200{1to16}                    }
+testcase	{ 0x62, 0x61, 0x7e, 0x58, 0x5b, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvttps2dq zmm30,DWORD rdx-0x204{1to16}                    }
+testcase	{ 0x62, 0x91, 0x7f, 0x18, 0x2c, 0xc6                                     }, { vcvttsd2si eax,xmm30,{sae}                                   }
+testcase	{ 0x62, 0x91, 0x7f, 0x18, 0x2c, 0xee                                     }, { vcvttsd2si ebp,xmm30,{sae}                                   }
+testcase	{ 0x62, 0x11, 0x7f, 0x18, 0x2c, 0xee                                     }, { vcvttsd2si r13d,xmm30,{sae}                                  }
+testcase	{ 0x62, 0x91, 0xff, 0x18, 0x2c, 0xc6                                     }, { vcvttsd2si rax,xmm30,{sae}                                   }
+testcase	{ 0x62, 0x11, 0xff, 0x18, 0x2c, 0xc6                                     }, { vcvttsd2si r8,xmm30,{sae}                                    }
+testcase	{ 0x62, 0x91, 0x7e, 0x18, 0x2c, 0xc6                                     }, { vcvttss2si eax,xmm30,{sae}                                   }
+testcase	{ 0x62, 0x91, 0x7e, 0x18, 0x2c, 0xee                                     }, { vcvttss2si ebp,xmm30,{sae}                                   }
+testcase	{ 0x62, 0x11, 0x7e, 0x18, 0x2c, 0xee                                     }, { vcvttss2si r13d,xmm30,{sae}                                  }
+testcase	{ 0x62, 0x91, 0xfe, 0x18, 0x2c, 0xc6                                     }, { vcvttss2si rax,xmm30,{sae}                                   }
+testcase	{ 0x62, 0x11, 0xfe, 0x18, 0x2c, 0xc6                                     }, { vcvttss2si r8,xmm30,{sae}                                    }
+testcase	{ 0x62, 0x01, 0x7e, 0x4f, 0x7a, 0xf5                                     }, { vcvtudq2pd zmm30{k7},ymm29                                   }
+testcase	{ 0x62, 0x01, 0x7e, 0xcf, 0x7a, 0xf5                                     }, { vcvtudq2pd zmm30{k7}{z},ymm29                                }
+testcase	{ 0x62, 0x61, 0x7e, 0x4f, 0x7a, 0x31                                     }, { vcvtudq2pd zmm30{k7},YWORD rcx                             }
+testcase	{ 0x62, 0x21, 0x7e, 0x4f, 0x7a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtudq2pd zmm30{k7},YWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0x61, 0x7e, 0x5f, 0x7a, 0x31                                     }, { vcvtudq2pd zmm30{k7},DWORD rcx{1to8}                       }
+testcase	{ 0x62, 0x61, 0x7e, 0x4f, 0x7a, 0x72, 0x7f                               }, { vcvtudq2pd zmm30{k7},YWORD rdx+0xfe0                       }
+testcase	{ 0x62, 0x61, 0x7e, 0x4f, 0x7a, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vcvtudq2pd zmm30{k7},YWORD rdx+0x1000                      }
+testcase	{ 0x62, 0x61, 0x7e, 0x4f, 0x7a, 0x72, 0x80                               }, { vcvtudq2pd zmm30{k7},YWORD rdx-0x1000                      }
+testcase	{ 0x62, 0x61, 0x7e, 0x4f, 0x7a, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vcvtudq2pd zmm30{k7},YWORD rdx-0x1020                      }
+testcase	{ 0x62, 0x61, 0x7e, 0x5f, 0x7a, 0x72, 0x7f                               }, { vcvtudq2pd zmm30{k7},DWORD rdx+0x1fc{1to8}                 }
+testcase	{ 0x62, 0x61, 0x7e, 0x5f, 0x7a, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvtudq2pd zmm30{k7},DWORD rdx+0x200{1to8}                 }
+testcase	{ 0x62, 0x61, 0x7e, 0x5f, 0x7a, 0x72, 0x80                               }, { vcvtudq2pd zmm30{k7},DWORD rdx-0x200{1to8}                 }
+testcase	{ 0x62, 0x61, 0x7e, 0x5f, 0x7a, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtudq2pd zmm30{k7},DWORD rdx-0x204{1to8}                 }
+testcase	{ 0x62, 0x01, 0x7f, 0x48, 0x7a, 0xf5                                     }, { vcvtudq2ps zmm30,zmm29                                       }
+testcase	{ 0x62, 0x01, 0x7f, 0x4f, 0x7a, 0xf5                                     }, { vcvtudq2ps zmm30{k7},zmm29                                   }
+testcase	{ 0x62, 0x01, 0x7f, 0xcf, 0x7a, 0xf5                                     }, { vcvtudq2ps zmm30{k7}{z},zmm29                                }
+testcase	{ 0x62, 0x01, 0x7f, 0x18, 0x7a, 0xf5                                     }, { vcvtudq2ps zmm30,zmm29,{rn-sae}                              }
+testcase	{ 0x62, 0x01, 0x7f, 0x58, 0x7a, 0xf5                                     }, { vcvtudq2ps zmm30,zmm29,{ru-sae}                              }
+testcase	{ 0x62, 0x01, 0x7f, 0x38, 0x7a, 0xf5                                     }, { vcvtudq2ps zmm30,zmm29,{rd-sae}                              }
+testcase	{ 0x62, 0x01, 0x7f, 0x78, 0x7a, 0xf5                                     }, { vcvtudq2ps zmm30,zmm29,{rz-sae}                              }
+testcase	{ 0x62, 0x61, 0x7f, 0x48, 0x7a, 0x31                                     }, { vcvtudq2ps zmm30,ZWORD rcx                                 }
+testcase	{ 0x62, 0x21, 0x7f, 0x48, 0x7a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtudq2ps zmm30,ZWORD rax+r14*8+0x123                     }
+testcase	{ 0x62, 0x61, 0x7f, 0x58, 0x7a, 0x31                                     }, { vcvtudq2ps zmm30,DWORD rcx{1to16}                          }
+testcase	{ 0x62, 0x61, 0x7f, 0x48, 0x7a, 0x72, 0x7f                               }, { vcvtudq2ps zmm30,ZWORD rdx+0x1fc0                          }
+testcase	{ 0x62, 0x61, 0x7f, 0x48, 0x7a, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vcvtudq2ps zmm30,ZWORD rdx+0x2000                          }
+testcase	{ 0x62, 0x61, 0x7f, 0x48, 0x7a, 0x72, 0x80                               }, { vcvtudq2ps zmm30,ZWORD rdx-0x2000                          }
+testcase	{ 0x62, 0x61, 0x7f, 0x48, 0x7a, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vcvtudq2ps zmm30,ZWORD rdx-0x2040                          }
+testcase	{ 0x62, 0x61, 0x7f, 0x58, 0x7a, 0x72, 0x7f                               }, { vcvtudq2ps zmm30,DWORD rdx+0x1fc{1to16}                    }
+testcase	{ 0x62, 0x61, 0x7f, 0x58, 0x7a, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvtudq2ps zmm30,DWORD rdx+0x200{1to16}                    }
+testcase	{ 0x62, 0x61, 0x7f, 0x58, 0x7a, 0x72, 0x80                               }, { vcvtudq2ps zmm30,DWORD rdx-0x200{1to16}                    }
+testcase	{ 0x62, 0x61, 0x7f, 0x58, 0x7a, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtudq2ps zmm30,DWORD rdx-0x204{1to16}                    }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0x5e, 0xf4                                     }, { vdivpd zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0x5e, 0xf4                                     }, { vdivpd zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0x5e, 0xf4                                     }, { vdivpd zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x95, 0x10, 0x5e, 0xf4                                     }, { vdivpd zmm30,zmm29,zmm28,{rn-sae}                            }
+testcase	{ 0x62, 0x01, 0x95, 0x50, 0x5e, 0xf4                                     }, { vdivpd zmm30,zmm29,zmm28,{ru-sae}                            }
+testcase	{ 0x62, 0x01, 0x95, 0x30, 0x5e, 0xf4                                     }, { vdivpd zmm30,zmm29,zmm28,{rd-sae}                            }
+testcase	{ 0x62, 0x01, 0x95, 0x70, 0x5e, 0xf4                                     }, { vdivpd zmm30,zmm29,zmm28,{rz-sae}                            }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5e, 0x31                                     }, { vdivpd zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0x5e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vdivpd zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5e, 0x31                                     }, { vdivpd zmm30,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5e, 0x72, 0x7f                               }, { vdivpd zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5e, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vdivpd zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5e, 0x72, 0x80                               }, { vdivpd zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5e, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vdivpd zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5e, 0x72, 0x7f                               }, { vdivpd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5e, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vdivpd zmm30,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5e, 0x72, 0x80                               }, { vdivpd zmm30,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5e, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vdivpd zmm30,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x01, 0x14, 0x40, 0x5e, 0xf4                                     }, { vdivps zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x14, 0x47, 0x5e, 0xf4                                     }, { vdivps zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x14, 0xc7, 0x5e, 0xf4                                     }, { vdivps zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x14, 0x10, 0x5e, 0xf4                                     }, { vdivps zmm30,zmm29,zmm28,{rn-sae}                            }
+testcase	{ 0x62, 0x01, 0x14, 0x50, 0x5e, 0xf4                                     }, { vdivps zmm30,zmm29,zmm28,{ru-sae}                            }
+testcase	{ 0x62, 0x01, 0x14, 0x30, 0x5e, 0xf4                                     }, { vdivps zmm30,zmm29,zmm28,{rd-sae}                            }
+testcase	{ 0x62, 0x01, 0x14, 0x70, 0x5e, 0xf4                                     }, { vdivps zmm30,zmm29,zmm28,{rz-sae}                            }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5e, 0x31                                     }, { vdivps zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x14, 0x40, 0x5e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vdivps zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5e, 0x31                                     }, { vdivps zmm30,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5e, 0x72, 0x7f                               }, { vdivps zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5e, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vdivps zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5e, 0x72, 0x80                               }, { vdivps zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5e, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vdivps zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5e, 0x72, 0x7f                               }, { vdivps zmm30,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5e, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vdivps zmm30,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5e, 0x72, 0x80                               }, { vdivps zmm30,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5e, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vdivps zmm30,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x01, 0x97, 0x07, 0x5e, 0xf4                                     }, { vdivsd xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x97, 0x87, 0x5e, 0xf4                                     }, { vdivsd xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x97, 0x17, 0x5e, 0xf4                                     }, { vdivsd xmm30{k7},xmm29,xmm28,{rn-sae}                        }
+testcase	{ 0x62, 0x01, 0x97, 0x57, 0x5e, 0xf4                                     }, { vdivsd xmm30{k7},xmm29,xmm28,{ru-sae}                        }
+testcase	{ 0x62, 0x01, 0x97, 0x37, 0x5e, 0xf4                                     }, { vdivsd xmm30{k7},xmm29,xmm28,{rd-sae}                        }
+testcase	{ 0x62, 0x01, 0x97, 0x77, 0x5e, 0xf4                                     }, { vdivsd xmm30{k7},xmm29,xmm28,{rz-sae}                        }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5e, 0x31                                     }, { vdivsd xmm30{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x97, 0x07, 0x5e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vdivsd xmm30{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5e, 0x72, 0x7f                               }, { vdivsd xmm30{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5e, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vdivsd xmm30{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5e, 0x72, 0x80                               }, { vdivsd xmm30{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5e, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vdivsd xmm30{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x01, 0x16, 0x07, 0x5e, 0xf4                                     }, { vdivss xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x16, 0x87, 0x5e, 0xf4                                     }, { vdivss xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x16, 0x17, 0x5e, 0xf4                                     }, { vdivss xmm30{k7},xmm29,xmm28,{rn-sae}                        }
+testcase	{ 0x62, 0x01, 0x16, 0x57, 0x5e, 0xf4                                     }, { vdivss xmm30{k7},xmm29,xmm28,{ru-sae}                        }
+testcase	{ 0x62, 0x01, 0x16, 0x37, 0x5e, 0xf4                                     }, { vdivss xmm30{k7},xmm29,xmm28,{rd-sae}                        }
+testcase	{ 0x62, 0x01, 0x16, 0x77, 0x5e, 0xf4                                     }, { vdivss xmm30{k7},xmm29,xmm28,{rz-sae}                        }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5e, 0x31                                     }, { vdivss xmm30{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x16, 0x07, 0x5e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vdivss xmm30{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5e, 0x72, 0x7f                               }, { vdivss xmm30{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5e, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vdivss xmm30{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5e, 0x72, 0x80                               }, { vdivss xmm30{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5e, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vdivss xmm30{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x88, 0x31                                     }, { vexpandpd zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x62, 0xfd, 0x4f, 0x88, 0x31                                     }, { vexpandpd zmm30{k7},ZWORD rcx                              }
+testcase	{ 0x62, 0x62, 0xfd, 0xcf, 0x88, 0x31                                     }, { vexpandpd zmm30{k7}{z},ZWORD rcx                           }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x88, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vexpandpd zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x88, 0x72, 0x7f                               }, { vexpandpd zmm30,ZWORD rdx+0x3f8                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x88, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vexpandpd zmm30,ZWORD rdx+0x400                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x88, 0x72, 0x80                               }, { vexpandpd zmm30,ZWORD rdx-0x400                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x88, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vexpandpd zmm30,ZWORD rdx-0x408                            }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0x88, 0xf5                                     }, { vexpandpd zmm30,zmm29                                        }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0x88, 0xf5                                     }, { vexpandpd zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0x88, 0xf5                                     }, { vexpandpd zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x88, 0x31                                     }, { vexpandps zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x88, 0x31                                     }, { vexpandps zmm30{k7},ZWORD rcx                              }
+testcase	{ 0x62, 0x62, 0x7d, 0xcf, 0x88, 0x31                                     }, { vexpandps zmm30{k7}{z},ZWORD rcx                           }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x88, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vexpandps zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x88, 0x72, 0x7f                               }, { vexpandps zmm30,ZWORD rdx+0x1fc                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x88, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vexpandps zmm30,ZWORD rdx+0x200                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x88, 0x72, 0x80                               }, { vexpandps zmm30,ZWORD rdx-0x200                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x88, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vexpandps zmm30,ZWORD rdx-0x204                            }
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0x88, 0xf5                                     }, { vexpandps zmm30,zmm29                                        }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x88, 0xf5                                     }, { vexpandps zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x88, 0xf5                                     }, { vexpandps zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x03, 0x7d, 0x4f, 0x19, 0xee, 0xab                               }, { vextractf32x4 xmm30{k7},zmm29,0xab                           }
+testcase	{ 0x62, 0x03, 0x7d, 0xcf, 0x19, 0xee, 0xab                               }, { vextractf32x4 xmm30{k7}{z},zmm29,0xab                        }
+testcase	{ 0x62, 0x03, 0x7d, 0x4f, 0x19, 0xee, 0x7b                               }, { vextractf32x4 xmm30{k7},zmm29,0x7b                           }
+testcase	{ 0x62, 0x03, 0xfd, 0x4f, 0x1b, 0xee, 0xab                               }, { vextractf64x4 ymm30{k7},zmm29,0xab                           }
+testcase	{ 0x62, 0x03, 0xfd, 0xcf, 0x1b, 0xee, 0xab                               }, { vextractf64x4 ymm30{k7}{z},zmm29,0xab                        }
+testcase	{ 0x62, 0x03, 0xfd, 0x4f, 0x1b, 0xee, 0x7b                               }, { vextractf64x4 ymm30{k7},zmm29,0x7b                           }
+testcase	{ 0x62, 0x03, 0x7d, 0x4f, 0x39, 0xee, 0xab                               }, { vextracti32x4 xmm30{k7},zmm29,0xab                           }
+testcase	{ 0x62, 0x03, 0x7d, 0xcf, 0x39, 0xee, 0xab                               }, { vextracti32x4 xmm30{k7}{z},zmm29,0xab                        }
+testcase	{ 0x62, 0x03, 0x7d, 0x4f, 0x39, 0xee, 0x7b                               }, { vextracti32x4 xmm30{k7},zmm29,0x7b                           }
+testcase	{ 0x62, 0x03, 0xfd, 0x4f, 0x3b, 0xee, 0xab                               }, { vextracti64x4 ymm30{k7},zmm29,0xab                           }
+testcase	{ 0x62, 0x03, 0xfd, 0xcf, 0x3b, 0xee, 0xab                               }, { vextracti64x4 ymm30{k7}{z},zmm29,0xab                        }
+testcase	{ 0x62, 0x03, 0xfd, 0x4f, 0x3b, 0xee, 0x7b                               }, { vextracti64x4 ymm30{k7},zmm29,0x7b                           }
+testcase	{ 0x62, 0x63, 0xfd, 0x08, 0x17, 0xe8, 0xab                               }, { vextractps rax,xmm29,0xab                                    }
+testcase	{ 0x62, 0x63, 0xfd, 0x08, 0x17, 0xe8, 0x7b                               }, { vextractps rax,xmm29,0x7b                                    }
+testcase	{ 0x62, 0x43, 0xfd, 0x08, 0x17, 0xe8, 0x7b                               }, { vextractps r8,xmm29,0x7b                                     }
+testcase	{ 0x62, 0x63, 0x7d, 0x08, 0x17, 0x29, 0x7b                               }, { vextractps DWORD rcx,xmm29,0x7b                            }
+testcase	{ 0x62, 0x23, 0x7d, 0x08, 0x17, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vextractps DWORD rax+r14*8+0x123,xmm29,0x7b                }
+testcase	{ 0x62, 0x63, 0x7d, 0x08, 0x17, 0x6a, 0x7f, 0x7b                         }, { vextractps DWORD rdx+0x1fc,xmm29,0x7b                      }
+testcase	{ 0x62, 0x63, 0x7d, 0x08, 0x17, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vextractps DWORD rdx+0x200,xmm29,0x7b                      }
+testcase	{ 0x62, 0x63, 0x7d, 0x08, 0x17, 0x6a, 0x80, 0x7b                         }, { vextractps DWORD rdx-0x200,xmm29,0x7b                      }
+testcase	{ 0x62, 0x63, 0x7d, 0x08, 0x17, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vextractps DWORD rdx-0x204,xmm29,0x7b                      }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x98, 0xf4                                     }, { vfmadd132pd zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x98, 0xf4                                     }, { vfmadd132pd zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x98, 0xf4                                     }, { vfmadd132pd zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0x98, 0xf4                                     }, { vfmadd132pd zmm30,zmm29,zmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0x98, 0xf4                                     }, { vfmadd132pd zmm30,zmm29,zmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0x98, 0xf4                                     }, { vfmadd132pd zmm30,zmm29,zmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0x98, 0xf4                                     }, { vfmadd132pd zmm30,zmm29,zmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x98, 0x31                                     }, { vfmadd132pd zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x98, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmadd132pd zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x98, 0x31                                     }, { vfmadd132pd zmm30,zmm29,QWORD rcx{1to8}                    }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x98, 0x72, 0x7f                               }, { vfmadd132pd zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x98, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmadd132pd zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x98, 0x72, 0x80                               }, { vfmadd132pd zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x98, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmadd132pd zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x98, 0x72, 0x7f                               }, { vfmadd132pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x98, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmadd132pd zmm30,zmm29,QWORD rdx+0x400{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x98, 0x72, 0x80                               }, { vfmadd132pd zmm30,zmm29,QWORD rdx-0x400{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x98, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmadd132pd zmm30,zmm29,QWORD rdx-0x408{1to8}              }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x98, 0xf4                                     }, { vfmadd132ps zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x98, 0xf4                                     }, { vfmadd132ps zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x98, 0xf4                                     }, { vfmadd132ps zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0x98, 0xf4                                     }, { vfmadd132ps zmm30,zmm29,zmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0x98, 0xf4                                     }, { vfmadd132ps zmm30,zmm29,zmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0x98, 0xf4                                     }, { vfmadd132ps zmm30,zmm29,zmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0x98, 0xf4                                     }, { vfmadd132ps zmm30,zmm29,zmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x98, 0x31                                     }, { vfmadd132ps zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x98, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmadd132ps zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x98, 0x31                                     }, { vfmadd132ps zmm30,zmm29,DWORD rcx{1to16}                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x98, 0x72, 0x7f                               }, { vfmadd132ps zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x98, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmadd132ps zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x98, 0x72, 0x80                               }, { vfmadd132ps zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x98, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmadd132ps zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x98, 0x72, 0x7f                               }, { vfmadd132ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x98, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmadd132ps zmm30,zmm29,DWORD rdx+0x200{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x98, 0x72, 0x80                               }, { vfmadd132ps zmm30,zmm29,DWORD rdx-0x200{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x98, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmadd132ps zmm30,zmm29,DWORD rdx-0x204{1to16}             }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0x99, 0xf4                                     }, { vfmadd132sd xmm30{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0x99, 0xf4                                     }, { vfmadd132sd xmm30{k7}{z},xmm29,xmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0x99, 0xf4                                     }, { vfmadd132sd xmm30{k7},xmm29,xmm28,{rn-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0x99, 0xf4                                     }, { vfmadd132sd xmm30{k7},xmm29,xmm28,{ru-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0x99, 0xf4                                     }, { vfmadd132sd xmm30{k7},xmm29,xmm28,{rd-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0x99, 0xf4                                     }, { vfmadd132sd xmm30{k7},xmm29,xmm28,{rz-sae}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x99, 0x31                                     }, { vfmadd132sd xmm30{k7},xmm29,QWORD rcx                      }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0x99, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmadd132sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x99, 0x72, 0x7f                               }, { vfmadd132sd xmm30{k7},xmm29,QWORD rdx+0x3f8                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x99, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmadd132sd xmm30{k7},xmm29,QWORD rdx+0x400                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x99, 0x72, 0x80                               }, { vfmadd132sd xmm30{k7},xmm29,QWORD rdx-0x400                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x99, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmadd132sd xmm30{k7},xmm29,QWORD rdx-0x408                }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0x99, 0xf4                                     }, { vfmadd132ss xmm30{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0x99, 0xf4                                     }, { vfmadd132ss xmm30{k7}{z},xmm29,xmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0x99, 0xf4                                     }, { vfmadd132ss xmm30{k7},xmm29,xmm28,{rn-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0x99, 0xf4                                     }, { vfmadd132ss xmm30{k7},xmm29,xmm28,{ru-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0x99, 0xf4                                     }, { vfmadd132ss xmm30{k7},xmm29,xmm28,{rd-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0x99, 0xf4                                     }, { vfmadd132ss xmm30{k7},xmm29,xmm28,{rz-sae}                   }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x99, 0x31                                     }, { vfmadd132ss xmm30{k7},xmm29,DWORD rcx                      }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0x99, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmadd132ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x99, 0x72, 0x7f                               }, { vfmadd132ss xmm30{k7},xmm29,DWORD rdx+0x1fc                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x99, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmadd132ss xmm30{k7},xmm29,DWORD rdx+0x200                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x99, 0x72, 0x80                               }, { vfmadd132ss xmm30{k7},xmm29,DWORD rdx-0x200                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x99, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmadd132ss xmm30{k7},xmm29,DWORD rdx-0x204                }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0xa8, 0xf4                                     }, { vfmadd213pd zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0xa8, 0xf4                                     }, { vfmadd213pd zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0xa8, 0xf4                                     }, { vfmadd213pd zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0xa8, 0xf4                                     }, { vfmadd213pd zmm30,zmm29,zmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0xa8, 0xf4                                     }, { vfmadd213pd zmm30,zmm29,zmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0xa8, 0xf4                                     }, { vfmadd213pd zmm30,zmm29,zmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0xa8, 0xf4                                     }, { vfmadd213pd zmm30,zmm29,zmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa8, 0x31                                     }, { vfmadd213pd zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0xa8, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmadd213pd zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa8, 0x31                                     }, { vfmadd213pd zmm30,zmm29,QWORD rcx{1to8}                    }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa8, 0x72, 0x7f                               }, { vfmadd213pd zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa8, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmadd213pd zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa8, 0x72, 0x80                               }, { vfmadd213pd zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa8, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmadd213pd zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa8, 0x72, 0x7f                               }, { vfmadd213pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa8, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmadd213pd zmm30,zmm29,QWORD rdx+0x400{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa8, 0x72, 0x80                               }, { vfmadd213pd zmm30,zmm29,QWORD rdx-0x400{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa8, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmadd213pd zmm30,zmm29,QWORD rdx-0x408{1to8}              }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0xa8, 0xf4                                     }, { vfmadd213ps zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0xa8, 0xf4                                     }, { vfmadd213ps zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0xa8, 0xf4                                     }, { vfmadd213ps zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0xa8, 0xf4                                     }, { vfmadd213ps zmm30,zmm29,zmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0xa8, 0xf4                                     }, { vfmadd213ps zmm30,zmm29,zmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0xa8, 0xf4                                     }, { vfmadd213ps zmm30,zmm29,zmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0xa8, 0xf4                                     }, { vfmadd213ps zmm30,zmm29,zmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa8, 0x31                                     }, { vfmadd213ps zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0xa8, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmadd213ps zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa8, 0x31                                     }, { vfmadd213ps zmm30,zmm29,DWORD rcx{1to16}                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa8, 0x72, 0x7f                               }, { vfmadd213ps zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa8, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmadd213ps zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa8, 0x72, 0x80                               }, { vfmadd213ps zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa8, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmadd213ps zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa8, 0x72, 0x7f                               }, { vfmadd213ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa8, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmadd213ps zmm30,zmm29,DWORD rdx+0x200{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa8, 0x72, 0x80                               }, { vfmadd213ps zmm30,zmm29,DWORD rdx-0x200{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa8, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmadd213ps zmm30,zmm29,DWORD rdx-0x204{1to16}             }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0xa9, 0xf4                                     }, { vfmadd213sd xmm30{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0xa9, 0xf4                                     }, { vfmadd213sd xmm30{k7}{z},xmm29,xmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0xa9, 0xf4                                     }, { vfmadd213sd xmm30{k7},xmm29,xmm28,{rn-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0xa9, 0xf4                                     }, { vfmadd213sd xmm30{k7},xmm29,xmm28,{ru-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0xa9, 0xf4                                     }, { vfmadd213sd xmm30{k7},xmm29,xmm28,{rd-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0xa9, 0xf4                                     }, { vfmadd213sd xmm30{k7},xmm29,xmm28,{rz-sae}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xa9, 0x31                                     }, { vfmadd213sd xmm30{k7},xmm29,QWORD rcx                      }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0xa9, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmadd213sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xa9, 0x72, 0x7f                               }, { vfmadd213sd xmm30{k7},xmm29,QWORD rdx+0x3f8                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xa9, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmadd213sd xmm30{k7},xmm29,QWORD rdx+0x400                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xa9, 0x72, 0x80                               }, { vfmadd213sd xmm30{k7},xmm29,QWORD rdx-0x400                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xa9, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmadd213sd xmm30{k7},xmm29,QWORD rdx-0x408                }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0xa9, 0xf4                                     }, { vfmadd213ss xmm30{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0xa9, 0xf4                                     }, { vfmadd213ss xmm30{k7}{z},xmm29,xmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0xa9, 0xf4                                     }, { vfmadd213ss xmm30{k7},xmm29,xmm28,{rn-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0xa9, 0xf4                                     }, { vfmadd213ss xmm30{k7},xmm29,xmm28,{ru-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0xa9, 0xf4                                     }, { vfmadd213ss xmm30{k7},xmm29,xmm28,{rd-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0xa9, 0xf4                                     }, { vfmadd213ss xmm30{k7},xmm29,xmm28,{rz-sae}                   }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xa9, 0x31                                     }, { vfmadd213ss xmm30{k7},xmm29,DWORD rcx                      }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0xa9, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmadd213ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xa9, 0x72, 0x7f                               }, { vfmadd213ss xmm30{k7},xmm29,DWORD rdx+0x1fc                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xa9, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmadd213ss xmm30{k7},xmm29,DWORD rdx+0x200                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xa9, 0x72, 0x80                               }, { vfmadd213ss xmm30{k7},xmm29,DWORD rdx-0x200                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xa9, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmadd213ss xmm30{k7},xmm29,DWORD rdx-0x204                }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0xb8, 0xf4                                     }, { vfmadd231pd zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0xb8, 0xf4                                     }, { vfmadd231pd zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0xb8, 0xf4                                     }, { vfmadd231pd zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0xb8, 0xf4                                     }, { vfmadd231pd zmm30,zmm29,zmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0xb8, 0xf4                                     }, { vfmadd231pd zmm30,zmm29,zmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0xb8, 0xf4                                     }, { vfmadd231pd zmm30,zmm29,zmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0xb8, 0xf4                                     }, { vfmadd231pd zmm30,zmm29,zmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb8, 0x31                                     }, { vfmadd231pd zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0xb8, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmadd231pd zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb8, 0x31                                     }, { vfmadd231pd zmm30,zmm29,QWORD rcx{1to8}                    }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb8, 0x72, 0x7f                               }, { vfmadd231pd zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb8, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmadd231pd zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb8, 0x72, 0x80                               }, { vfmadd231pd zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb8, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmadd231pd zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb8, 0x72, 0x7f                               }, { vfmadd231pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb8, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmadd231pd zmm30,zmm29,QWORD rdx+0x400{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb8, 0x72, 0x80                               }, { vfmadd231pd zmm30,zmm29,QWORD rdx-0x400{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb8, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmadd231pd zmm30,zmm29,QWORD rdx-0x408{1to8}              }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0xb8, 0xf4                                     }, { vfmadd231ps zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0xb8, 0xf4                                     }, { vfmadd231ps zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0xb8, 0xf4                                     }, { vfmadd231ps zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0xb8, 0xf4                                     }, { vfmadd231ps zmm30,zmm29,zmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0xb8, 0xf4                                     }, { vfmadd231ps zmm30,zmm29,zmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0xb8, 0xf4                                     }, { vfmadd231ps zmm30,zmm29,zmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0xb8, 0xf4                                     }, { vfmadd231ps zmm30,zmm29,zmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb8, 0x31                                     }, { vfmadd231ps zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0xb8, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmadd231ps zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb8, 0x31                                     }, { vfmadd231ps zmm30,zmm29,DWORD rcx{1to16}                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb8, 0x72, 0x7f                               }, { vfmadd231ps zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb8, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmadd231ps zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb8, 0x72, 0x80                               }, { vfmadd231ps zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb8, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmadd231ps zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb8, 0x72, 0x7f                               }, { vfmadd231ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb8, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmadd231ps zmm30,zmm29,DWORD rdx+0x200{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb8, 0x72, 0x80                               }, { vfmadd231ps zmm30,zmm29,DWORD rdx-0x200{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb8, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmadd231ps zmm30,zmm29,DWORD rdx-0x204{1to16}             }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0xb9, 0xf4                                     }, { vfmadd231sd xmm30{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0xb9, 0xf4                                     }, { vfmadd231sd xmm30{k7}{z},xmm29,xmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0xb9, 0xf4                                     }, { vfmadd231sd xmm30{k7},xmm29,xmm28,{rn-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0xb9, 0xf4                                     }, { vfmadd231sd xmm30{k7},xmm29,xmm28,{ru-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0xb9, 0xf4                                     }, { vfmadd231sd xmm30{k7},xmm29,xmm28,{rd-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0xb9, 0xf4                                     }, { vfmadd231sd xmm30{k7},xmm29,xmm28,{rz-sae}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xb9, 0x31                                     }, { vfmadd231sd xmm30{k7},xmm29,QWORD rcx                      }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0xb9, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmadd231sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xb9, 0x72, 0x7f                               }, { vfmadd231sd xmm30{k7},xmm29,QWORD rdx+0x3f8                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xb9, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmadd231sd xmm30{k7},xmm29,QWORD rdx+0x400                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xb9, 0x72, 0x80                               }, { vfmadd231sd xmm30{k7},xmm29,QWORD rdx-0x400                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xb9, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmadd231sd xmm30{k7},xmm29,QWORD rdx-0x408                }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0xb9, 0xf4                                     }, { vfmadd231ss xmm30{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0xb9, 0xf4                                     }, { vfmadd231ss xmm30{k7}{z},xmm29,xmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0xb9, 0xf4                                     }, { vfmadd231ss xmm30{k7},xmm29,xmm28,{rn-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0xb9, 0xf4                                     }, { vfmadd231ss xmm30{k7},xmm29,xmm28,{ru-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0xb9, 0xf4                                     }, { vfmadd231ss xmm30{k7},xmm29,xmm28,{rd-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0xb9, 0xf4                                     }, { vfmadd231ss xmm30{k7},xmm29,xmm28,{rz-sae}                   }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xb9, 0x31                                     }, { vfmadd231ss xmm30{k7},xmm29,DWORD rcx                      }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0xb9, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmadd231ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xb9, 0x72, 0x7f                               }, { vfmadd231ss xmm30{k7},xmm29,DWORD rdx+0x1fc                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xb9, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmadd231ss xmm30{k7},xmm29,DWORD rdx+0x200                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xb9, 0x72, 0x80                               }, { vfmadd231ss xmm30{k7},xmm29,DWORD rdx-0x200                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xb9, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmadd231ss xmm30{k7},xmm29,DWORD rdx-0x204                }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x96, 0xf4                                     }, { vfmaddsub132pd zmm30,zmm29,zmm28                             }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x96, 0xf4                                     }, { vfmaddsub132pd zmm30{k7},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x96, 0xf4                                     }, { vfmaddsub132pd zmm30{k7}{z},zmm29,zmm28                      }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0x96, 0xf4                                     }, { vfmaddsub132pd zmm30,zmm29,zmm28,{rn-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0x96, 0xf4                                     }, { vfmaddsub132pd zmm30,zmm29,zmm28,{ru-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0x96, 0xf4                                     }, { vfmaddsub132pd zmm30,zmm29,zmm28,{rd-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0x96, 0xf4                                     }, { vfmaddsub132pd zmm30,zmm29,zmm28,{rz-sae}                    }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x96, 0x31                                     }, { vfmaddsub132pd zmm30,zmm29,ZWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x96, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmaddsub132pd zmm30,zmm29,ZWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x96, 0x31                                     }, { vfmaddsub132pd zmm30,zmm29,QWORD rcx{1to8}                 }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x96, 0x72, 0x7f                               }, { vfmaddsub132pd zmm30,zmm29,ZWORD rdx+0x1fc0                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x96, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmaddsub132pd zmm30,zmm29,ZWORD rdx+0x2000                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x96, 0x72, 0x80                               }, { vfmaddsub132pd zmm30,zmm29,ZWORD rdx-0x2000                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x96, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmaddsub132pd zmm30,zmm29,ZWORD rdx-0x2040                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x96, 0x72, 0x7f                               }, { vfmaddsub132pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x96, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmaddsub132pd zmm30,zmm29,QWORD rdx+0x400{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x96, 0x72, 0x80                               }, { vfmaddsub132pd zmm30,zmm29,QWORD rdx-0x400{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x96, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmaddsub132pd zmm30,zmm29,QWORD rdx-0x408{1to8}           }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x96, 0xf4                                     }, { vfmaddsub132ps zmm30,zmm29,zmm28                             }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x96, 0xf4                                     }, { vfmaddsub132ps zmm30{k7},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x96, 0xf4                                     }, { vfmaddsub132ps zmm30{k7}{z},zmm29,zmm28                      }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0x96, 0xf4                                     }, { vfmaddsub132ps zmm30,zmm29,zmm28,{rn-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0x96, 0xf4                                     }, { vfmaddsub132ps zmm30,zmm29,zmm28,{ru-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0x96, 0xf4                                     }, { vfmaddsub132ps zmm30,zmm29,zmm28,{rd-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0x96, 0xf4                                     }, { vfmaddsub132ps zmm30,zmm29,zmm28,{rz-sae}                    }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x96, 0x31                                     }, { vfmaddsub132ps zmm30,zmm29,ZWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x96, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmaddsub132ps zmm30,zmm29,ZWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x96, 0x31                                     }, { vfmaddsub132ps zmm30,zmm29,DWORD rcx{1to16}                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x96, 0x72, 0x7f                               }, { vfmaddsub132ps zmm30,zmm29,ZWORD rdx+0x1fc0                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x96, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmaddsub132ps zmm30,zmm29,ZWORD rdx+0x2000                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x96, 0x72, 0x80                               }, { vfmaddsub132ps zmm30,zmm29,ZWORD rdx-0x2000                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x96, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmaddsub132ps zmm30,zmm29,ZWORD rdx-0x2040                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x96, 0x72, 0x7f                               }, { vfmaddsub132ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x96, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmaddsub132ps zmm30,zmm29,DWORD rdx+0x200{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x96, 0x72, 0x80                               }, { vfmaddsub132ps zmm30,zmm29,DWORD rdx-0x200{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x96, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmaddsub132ps zmm30,zmm29,DWORD rdx-0x204{1to16}          }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0xa6, 0xf4                                     }, { vfmaddsub213pd zmm30,zmm29,zmm28                             }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0xa6, 0xf4                                     }, { vfmaddsub213pd zmm30{k7},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0xa6, 0xf4                                     }, { vfmaddsub213pd zmm30{k7}{z},zmm29,zmm28                      }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0xa6, 0xf4                                     }, { vfmaddsub213pd zmm30,zmm29,zmm28,{rn-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0xa6, 0xf4                                     }, { vfmaddsub213pd zmm30,zmm29,zmm28,{ru-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0xa6, 0xf4                                     }, { vfmaddsub213pd zmm30,zmm29,zmm28,{rd-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0xa6, 0xf4                                     }, { vfmaddsub213pd zmm30,zmm29,zmm28,{rz-sae}                    }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa6, 0x31                                     }, { vfmaddsub213pd zmm30,zmm29,ZWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0xa6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmaddsub213pd zmm30,zmm29,ZWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa6, 0x31                                     }, { vfmaddsub213pd zmm30,zmm29,QWORD rcx{1to8}                 }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa6, 0x72, 0x7f                               }, { vfmaddsub213pd zmm30,zmm29,ZWORD rdx+0x1fc0                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa6, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmaddsub213pd zmm30,zmm29,ZWORD rdx+0x2000                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa6, 0x72, 0x80                               }, { vfmaddsub213pd zmm30,zmm29,ZWORD rdx-0x2000                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa6, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmaddsub213pd zmm30,zmm29,ZWORD rdx-0x2040                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa6, 0x72, 0x7f                               }, { vfmaddsub213pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa6, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmaddsub213pd zmm30,zmm29,QWORD rdx+0x400{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa6, 0x72, 0x80                               }, { vfmaddsub213pd zmm30,zmm29,QWORD rdx-0x400{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa6, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmaddsub213pd zmm30,zmm29,QWORD rdx-0x408{1to8}           }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0xa6, 0xf4                                     }, { vfmaddsub213ps zmm30,zmm29,zmm28                             }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0xa6, 0xf4                                     }, { vfmaddsub213ps zmm30{k7},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0xa6, 0xf4                                     }, { vfmaddsub213ps zmm30{k7}{z},zmm29,zmm28                      }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0xa6, 0xf4                                     }, { vfmaddsub213ps zmm30,zmm29,zmm28,{rn-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0xa6, 0xf4                                     }, { vfmaddsub213ps zmm30,zmm29,zmm28,{ru-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0xa6, 0xf4                                     }, { vfmaddsub213ps zmm30,zmm29,zmm28,{rd-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0xa6, 0xf4                                     }, { vfmaddsub213ps zmm30,zmm29,zmm28,{rz-sae}                    }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa6, 0x31                                     }, { vfmaddsub213ps zmm30,zmm29,ZWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0xa6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmaddsub213ps zmm30,zmm29,ZWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa6, 0x31                                     }, { vfmaddsub213ps zmm30,zmm29,DWORD rcx{1to16}                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa6, 0x72, 0x7f                               }, { vfmaddsub213ps zmm30,zmm29,ZWORD rdx+0x1fc0                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa6, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmaddsub213ps zmm30,zmm29,ZWORD rdx+0x2000                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa6, 0x72, 0x80                               }, { vfmaddsub213ps zmm30,zmm29,ZWORD rdx-0x2000                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa6, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmaddsub213ps zmm30,zmm29,ZWORD rdx-0x2040                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa6, 0x72, 0x7f                               }, { vfmaddsub213ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa6, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmaddsub213ps zmm30,zmm29,DWORD rdx+0x200{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa6, 0x72, 0x80                               }, { vfmaddsub213ps zmm30,zmm29,DWORD rdx-0x200{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa6, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmaddsub213ps zmm30,zmm29,DWORD rdx-0x204{1to16}          }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0xb6, 0xf4                                     }, { vfmaddsub231pd zmm30,zmm29,zmm28                             }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0xb6, 0xf4                                     }, { vfmaddsub231pd zmm30{k7},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0xb6, 0xf4                                     }, { vfmaddsub231pd zmm30{k7}{z},zmm29,zmm28                      }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0xb6, 0xf4                                     }, { vfmaddsub231pd zmm30,zmm29,zmm28,{rn-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0xb6, 0xf4                                     }, { vfmaddsub231pd zmm30,zmm29,zmm28,{ru-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0xb6, 0xf4                                     }, { vfmaddsub231pd zmm30,zmm29,zmm28,{rd-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0xb6, 0xf4                                     }, { vfmaddsub231pd zmm30,zmm29,zmm28,{rz-sae}                    }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb6, 0x31                                     }, { vfmaddsub231pd zmm30,zmm29,ZWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0xb6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmaddsub231pd zmm30,zmm29,ZWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb6, 0x31                                     }, { vfmaddsub231pd zmm30,zmm29,QWORD rcx{1to8}                 }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb6, 0x72, 0x7f                               }, { vfmaddsub231pd zmm30,zmm29,ZWORD rdx+0x1fc0                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb6, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmaddsub231pd zmm30,zmm29,ZWORD rdx+0x2000                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb6, 0x72, 0x80                               }, { vfmaddsub231pd zmm30,zmm29,ZWORD rdx-0x2000                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb6, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmaddsub231pd zmm30,zmm29,ZWORD rdx-0x2040                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb6, 0x72, 0x7f                               }, { vfmaddsub231pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb6, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmaddsub231pd zmm30,zmm29,QWORD rdx+0x400{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb6, 0x72, 0x80                               }, { vfmaddsub231pd zmm30,zmm29,QWORD rdx-0x400{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb6, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmaddsub231pd zmm30,zmm29,QWORD rdx-0x408{1to8}           }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0xb6, 0xf4                                     }, { vfmaddsub231ps zmm30,zmm29,zmm28                             }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0xb6, 0xf4                                     }, { vfmaddsub231ps zmm30{k7},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0xb6, 0xf4                                     }, { vfmaddsub231ps zmm30{k7}{z},zmm29,zmm28                      }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0xb6, 0xf4                                     }, { vfmaddsub231ps zmm30,zmm29,zmm28,{rn-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0xb6, 0xf4                                     }, { vfmaddsub231ps zmm30,zmm29,zmm28,{ru-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0xb6, 0xf4                                     }, { vfmaddsub231ps zmm30,zmm29,zmm28,{rd-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0xb6, 0xf4                                     }, { vfmaddsub231ps zmm30,zmm29,zmm28,{rz-sae}                    }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb6, 0x31                                     }, { vfmaddsub231ps zmm30,zmm29,ZWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0xb6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmaddsub231ps zmm30,zmm29,ZWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb6, 0x31                                     }, { vfmaddsub231ps zmm30,zmm29,DWORD rcx{1to16}                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb6, 0x72, 0x7f                               }, { vfmaddsub231ps zmm30,zmm29,ZWORD rdx+0x1fc0                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb6, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmaddsub231ps zmm30,zmm29,ZWORD rdx+0x2000                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb6, 0x72, 0x80                               }, { vfmaddsub231ps zmm30,zmm29,ZWORD rdx-0x2000                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb6, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmaddsub231ps zmm30,zmm29,ZWORD rdx-0x2040                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb6, 0x72, 0x7f                               }, { vfmaddsub231ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb6, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmaddsub231ps zmm30,zmm29,DWORD rdx+0x200{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb6, 0x72, 0x80                               }, { vfmaddsub231ps zmm30,zmm29,DWORD rdx-0x200{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb6, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmaddsub231ps zmm30,zmm29,DWORD rdx-0x204{1to16}          }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x9a, 0xf4                                     }, { vfmsub132pd zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x9a, 0xf4                                     }, { vfmsub132pd zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x9a, 0xf4                                     }, { vfmsub132pd zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0x9a, 0xf4                                     }, { vfmsub132pd zmm30,zmm29,zmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0x9a, 0xf4                                     }, { vfmsub132pd zmm30,zmm29,zmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0x9a, 0xf4                                     }, { vfmsub132pd zmm30,zmm29,zmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0x9a, 0xf4                                     }, { vfmsub132pd zmm30,zmm29,zmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9a, 0x31                                     }, { vfmsub132pd zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x9a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsub132pd zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9a, 0x31                                     }, { vfmsub132pd zmm30,zmm29,QWORD rcx{1to8}                    }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9a, 0x72, 0x7f                               }, { vfmsub132pd zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9a, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmsub132pd zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9a, 0x72, 0x80                               }, { vfmsub132pd zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9a, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmsub132pd zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9a, 0x72, 0x7f                               }, { vfmsub132pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9a, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmsub132pd zmm30,zmm29,QWORD rdx+0x400{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9a, 0x72, 0x80                               }, { vfmsub132pd zmm30,zmm29,QWORD rdx-0x400{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9a, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmsub132pd zmm30,zmm29,QWORD rdx-0x408{1to8}              }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x9a, 0xf4                                     }, { vfmsub132ps zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x9a, 0xf4                                     }, { vfmsub132ps zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x9a, 0xf4                                     }, { vfmsub132ps zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0x9a, 0xf4                                     }, { vfmsub132ps zmm30,zmm29,zmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0x9a, 0xf4                                     }, { vfmsub132ps zmm30,zmm29,zmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0x9a, 0xf4                                     }, { vfmsub132ps zmm30,zmm29,zmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0x9a, 0xf4                                     }, { vfmsub132ps zmm30,zmm29,zmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9a, 0x31                                     }, { vfmsub132ps zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x9a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsub132ps zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9a, 0x31                                     }, { vfmsub132ps zmm30,zmm29,DWORD rcx{1to16}                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9a, 0x72, 0x7f                               }, { vfmsub132ps zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9a, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmsub132ps zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9a, 0x72, 0x80                               }, { vfmsub132ps zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9a, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmsub132ps zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9a, 0x72, 0x7f                               }, { vfmsub132ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9a, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmsub132ps zmm30,zmm29,DWORD rdx+0x200{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9a, 0x72, 0x80                               }, { vfmsub132ps zmm30,zmm29,DWORD rdx-0x200{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9a, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmsub132ps zmm30,zmm29,DWORD rdx-0x204{1to16}             }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0x9b, 0xf4                                     }, { vfmsub132sd xmm30{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0x9b, 0xf4                                     }, { vfmsub132sd xmm30{k7}{z},xmm29,xmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0x9b, 0xf4                                     }, { vfmsub132sd xmm30{k7},xmm29,xmm28,{rn-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0x9b, 0xf4                                     }, { vfmsub132sd xmm30{k7},xmm29,xmm28,{ru-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0x9b, 0xf4                                     }, { vfmsub132sd xmm30{k7},xmm29,xmm28,{rd-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0x9b, 0xf4                                     }, { vfmsub132sd xmm30{k7},xmm29,xmm28,{rz-sae}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9b, 0x31                                     }, { vfmsub132sd xmm30{k7},xmm29,QWORD rcx                      }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0x9b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsub132sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9b, 0x72, 0x7f                               }, { vfmsub132sd xmm30{k7},xmm29,QWORD rdx+0x3f8                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9b, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmsub132sd xmm30{k7},xmm29,QWORD rdx+0x400                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9b, 0x72, 0x80                               }, { vfmsub132sd xmm30{k7},xmm29,QWORD rdx-0x400                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9b, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmsub132sd xmm30{k7},xmm29,QWORD rdx-0x408                }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0x9b, 0xf4                                     }, { vfmsub132ss xmm30{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0x9b, 0xf4                                     }, { vfmsub132ss xmm30{k7}{z},xmm29,xmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0x9b, 0xf4                                     }, { vfmsub132ss xmm30{k7},xmm29,xmm28,{rn-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0x9b, 0xf4                                     }, { vfmsub132ss xmm30{k7},xmm29,xmm28,{ru-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0x9b, 0xf4                                     }, { vfmsub132ss xmm30{k7},xmm29,xmm28,{rd-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0x9b, 0xf4                                     }, { vfmsub132ss xmm30{k7},xmm29,xmm28,{rz-sae}                   }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9b, 0x31                                     }, { vfmsub132ss xmm30{k7},xmm29,DWORD rcx                      }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0x9b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsub132ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9b, 0x72, 0x7f                               }, { vfmsub132ss xmm30{k7},xmm29,DWORD rdx+0x1fc                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9b, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmsub132ss xmm30{k7},xmm29,DWORD rdx+0x200                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9b, 0x72, 0x80                               }, { vfmsub132ss xmm30{k7},xmm29,DWORD rdx-0x200                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9b, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmsub132ss xmm30{k7},xmm29,DWORD rdx-0x204                }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0xaa, 0xf4                                     }, { vfmsub213pd zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0xaa, 0xf4                                     }, { vfmsub213pd zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0xaa, 0xf4                                     }, { vfmsub213pd zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0xaa, 0xf4                                     }, { vfmsub213pd zmm30,zmm29,zmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0xaa, 0xf4                                     }, { vfmsub213pd zmm30,zmm29,zmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0xaa, 0xf4                                     }, { vfmsub213pd zmm30,zmm29,zmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0xaa, 0xf4                                     }, { vfmsub213pd zmm30,zmm29,zmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xaa, 0x31                                     }, { vfmsub213pd zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0xaa, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsub213pd zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xaa, 0x31                                     }, { vfmsub213pd zmm30,zmm29,QWORD rcx{1to8}                    }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xaa, 0x72, 0x7f                               }, { vfmsub213pd zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xaa, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmsub213pd zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xaa, 0x72, 0x80                               }, { vfmsub213pd zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xaa, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmsub213pd zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xaa, 0x72, 0x7f                               }, { vfmsub213pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xaa, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmsub213pd zmm30,zmm29,QWORD rdx+0x400{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xaa, 0x72, 0x80                               }, { vfmsub213pd zmm30,zmm29,QWORD rdx-0x400{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xaa, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmsub213pd zmm30,zmm29,QWORD rdx-0x408{1to8}              }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0xaa, 0xf4                                     }, { vfmsub213ps zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0xaa, 0xf4                                     }, { vfmsub213ps zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0xaa, 0xf4                                     }, { vfmsub213ps zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0xaa, 0xf4                                     }, { vfmsub213ps zmm30,zmm29,zmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0xaa, 0xf4                                     }, { vfmsub213ps zmm30,zmm29,zmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0xaa, 0xf4                                     }, { vfmsub213ps zmm30,zmm29,zmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0xaa, 0xf4                                     }, { vfmsub213ps zmm30,zmm29,zmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xaa, 0x31                                     }, { vfmsub213ps zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0xaa, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsub213ps zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xaa, 0x31                                     }, { vfmsub213ps zmm30,zmm29,DWORD rcx{1to16}                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xaa, 0x72, 0x7f                               }, { vfmsub213ps zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xaa, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmsub213ps zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xaa, 0x72, 0x80                               }, { vfmsub213ps zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xaa, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmsub213ps zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xaa, 0x72, 0x7f                               }, { vfmsub213ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xaa, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmsub213ps zmm30,zmm29,DWORD rdx+0x200{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xaa, 0x72, 0x80                               }, { vfmsub213ps zmm30,zmm29,DWORD rdx-0x200{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xaa, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmsub213ps zmm30,zmm29,DWORD rdx-0x204{1to16}             }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0xab, 0xf4                                     }, { vfmsub213sd xmm30{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0xab, 0xf4                                     }, { vfmsub213sd xmm30{k7}{z},xmm29,xmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0xab, 0xf4                                     }, { vfmsub213sd xmm30{k7},xmm29,xmm28,{rn-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0xab, 0xf4                                     }, { vfmsub213sd xmm30{k7},xmm29,xmm28,{ru-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0xab, 0xf4                                     }, { vfmsub213sd xmm30{k7},xmm29,xmm28,{rd-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0xab, 0xf4                                     }, { vfmsub213sd xmm30{k7},xmm29,xmm28,{rz-sae}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xab, 0x31                                     }, { vfmsub213sd xmm30{k7},xmm29,QWORD rcx                      }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0xab, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsub213sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xab, 0x72, 0x7f                               }, { vfmsub213sd xmm30{k7},xmm29,QWORD rdx+0x3f8                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xab, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmsub213sd xmm30{k7},xmm29,QWORD rdx+0x400                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xab, 0x72, 0x80                               }, { vfmsub213sd xmm30{k7},xmm29,QWORD rdx-0x400                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xab, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmsub213sd xmm30{k7},xmm29,QWORD rdx-0x408                }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0xab, 0xf4                                     }, { vfmsub213ss xmm30{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0xab, 0xf4                                     }, { vfmsub213ss xmm30{k7}{z},xmm29,xmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0xab, 0xf4                                     }, { vfmsub213ss xmm30{k7},xmm29,xmm28,{rn-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0xab, 0xf4                                     }, { vfmsub213ss xmm30{k7},xmm29,xmm28,{ru-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0xab, 0xf4                                     }, { vfmsub213ss xmm30{k7},xmm29,xmm28,{rd-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0xab, 0xf4                                     }, { vfmsub213ss xmm30{k7},xmm29,xmm28,{rz-sae}                   }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xab, 0x31                                     }, { vfmsub213ss xmm30{k7},xmm29,DWORD rcx                      }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0xab, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsub213ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xab, 0x72, 0x7f                               }, { vfmsub213ss xmm30{k7},xmm29,DWORD rdx+0x1fc                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xab, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmsub213ss xmm30{k7},xmm29,DWORD rdx+0x200                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xab, 0x72, 0x80                               }, { vfmsub213ss xmm30{k7},xmm29,DWORD rdx-0x200                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xab, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmsub213ss xmm30{k7},xmm29,DWORD rdx-0x204                }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0xba, 0xf4                                     }, { vfmsub231pd zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0xba, 0xf4                                     }, { vfmsub231pd zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0xba, 0xf4                                     }, { vfmsub231pd zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0xba, 0xf4                                     }, { vfmsub231pd zmm30,zmm29,zmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0xba, 0xf4                                     }, { vfmsub231pd zmm30,zmm29,zmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0xba, 0xf4                                     }, { vfmsub231pd zmm30,zmm29,zmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0xba, 0xf4                                     }, { vfmsub231pd zmm30,zmm29,zmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xba, 0x31                                     }, { vfmsub231pd zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0xba, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsub231pd zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xba, 0x31                                     }, { vfmsub231pd zmm30,zmm29,QWORD rcx{1to8}                    }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xba, 0x72, 0x7f                               }, { vfmsub231pd zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xba, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmsub231pd zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xba, 0x72, 0x80                               }, { vfmsub231pd zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xba, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmsub231pd zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xba, 0x72, 0x7f                               }, { vfmsub231pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xba, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmsub231pd zmm30,zmm29,QWORD rdx+0x400{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xba, 0x72, 0x80                               }, { vfmsub231pd zmm30,zmm29,QWORD rdx-0x400{1to8}              }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xba, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmsub231pd zmm30,zmm29,QWORD rdx-0x408{1to8}              }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0xba, 0xf4                                     }, { vfmsub231ps zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0xba, 0xf4                                     }, { vfmsub231ps zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0xba, 0xf4                                     }, { vfmsub231ps zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0xba, 0xf4                                     }, { vfmsub231ps zmm30,zmm29,zmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0xba, 0xf4                                     }, { vfmsub231ps zmm30,zmm29,zmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0xba, 0xf4                                     }, { vfmsub231ps zmm30,zmm29,zmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0xba, 0xf4                                     }, { vfmsub231ps zmm30,zmm29,zmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xba, 0x31                                     }, { vfmsub231ps zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0xba, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsub231ps zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xba, 0x31                                     }, { vfmsub231ps zmm30,zmm29,DWORD rcx{1to16}                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xba, 0x72, 0x7f                               }, { vfmsub231ps zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xba, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmsub231ps zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xba, 0x72, 0x80                               }, { vfmsub231ps zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xba, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmsub231ps zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xba, 0x72, 0x7f                               }, { vfmsub231ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xba, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmsub231ps zmm30,zmm29,DWORD rdx+0x200{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xba, 0x72, 0x80                               }, { vfmsub231ps zmm30,zmm29,DWORD rdx-0x200{1to16}             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xba, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmsub231ps zmm30,zmm29,DWORD rdx-0x204{1to16}             }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0xbb, 0xf4                                     }, { vfmsub231sd xmm30{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0xbb, 0xf4                                     }, { vfmsub231sd xmm30{k7}{z},xmm29,xmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0xbb, 0xf4                                     }, { vfmsub231sd xmm30{k7},xmm29,xmm28,{rn-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0xbb, 0xf4                                     }, { vfmsub231sd xmm30{k7},xmm29,xmm28,{ru-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0xbb, 0xf4                                     }, { vfmsub231sd xmm30{k7},xmm29,xmm28,{rd-sae}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0xbb, 0xf4                                     }, { vfmsub231sd xmm30{k7},xmm29,xmm28,{rz-sae}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbb, 0x31                                     }, { vfmsub231sd xmm30{k7},xmm29,QWORD rcx                      }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0xbb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsub231sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbb, 0x72, 0x7f                               }, { vfmsub231sd xmm30{k7},xmm29,QWORD rdx+0x3f8                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbb, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmsub231sd xmm30{k7},xmm29,QWORD rdx+0x400                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbb, 0x72, 0x80                               }, { vfmsub231sd xmm30{k7},xmm29,QWORD rdx-0x400                }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbb, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmsub231sd xmm30{k7},xmm29,QWORD rdx-0x408                }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0xbb, 0xf4                                     }, { vfmsub231ss xmm30{k7},xmm29,xmm28                            }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0xbb, 0xf4                                     }, { vfmsub231ss xmm30{k7}{z},xmm29,xmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0xbb, 0xf4                                     }, { vfmsub231ss xmm30{k7},xmm29,xmm28,{rn-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0xbb, 0xf4                                     }, { vfmsub231ss xmm30{k7},xmm29,xmm28,{ru-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0xbb, 0xf4                                     }, { vfmsub231ss xmm30{k7},xmm29,xmm28,{rd-sae}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0xbb, 0xf4                                     }, { vfmsub231ss xmm30{k7},xmm29,xmm28,{rz-sae}                   }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbb, 0x31                                     }, { vfmsub231ss xmm30{k7},xmm29,DWORD rcx                      }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0xbb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsub231ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123          }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbb, 0x72, 0x7f                               }, { vfmsub231ss xmm30{k7},xmm29,DWORD rdx+0x1fc                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbb, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmsub231ss xmm30{k7},xmm29,DWORD rdx+0x200                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbb, 0x72, 0x80                               }, { vfmsub231ss xmm30{k7},xmm29,DWORD rdx-0x200                }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbb, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmsub231ss xmm30{k7},xmm29,DWORD rdx-0x204                }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x97, 0xf4                                     }, { vfmsubadd132pd zmm30,zmm29,zmm28                             }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x97, 0xf4                                     }, { vfmsubadd132pd zmm30{k7},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x97, 0xf4                                     }, { vfmsubadd132pd zmm30{k7}{z},zmm29,zmm28                      }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0x97, 0xf4                                     }, { vfmsubadd132pd zmm30,zmm29,zmm28,{rn-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0x97, 0xf4                                     }, { vfmsubadd132pd zmm30,zmm29,zmm28,{ru-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0x97, 0xf4                                     }, { vfmsubadd132pd zmm30,zmm29,zmm28,{rd-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0x97, 0xf4                                     }, { vfmsubadd132pd zmm30,zmm29,zmm28,{rz-sae}                    }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x97, 0x31                                     }, { vfmsubadd132pd zmm30,zmm29,ZWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x97, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsubadd132pd zmm30,zmm29,ZWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x97, 0x31                                     }, { vfmsubadd132pd zmm30,zmm29,QWORD rcx{1to8}                 }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x97, 0x72, 0x7f                               }, { vfmsubadd132pd zmm30,zmm29,ZWORD rdx+0x1fc0                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x97, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmsubadd132pd zmm30,zmm29,ZWORD rdx+0x2000                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x97, 0x72, 0x80                               }, { vfmsubadd132pd zmm30,zmm29,ZWORD rdx-0x2000                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x97, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmsubadd132pd zmm30,zmm29,ZWORD rdx-0x2040                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x97, 0x72, 0x7f                               }, { vfmsubadd132pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x97, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmsubadd132pd zmm30,zmm29,QWORD rdx+0x400{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x97, 0x72, 0x80                               }, { vfmsubadd132pd zmm30,zmm29,QWORD rdx-0x400{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x97, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmsubadd132pd zmm30,zmm29,QWORD rdx-0x408{1to8}           }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x97, 0xf4                                     }, { vfmsubadd132ps zmm30,zmm29,zmm28                             }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x97, 0xf4                                     }, { vfmsubadd132ps zmm30{k7},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x97, 0xf4                                     }, { vfmsubadd132ps zmm30{k7}{z},zmm29,zmm28                      }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0x97, 0xf4                                     }, { vfmsubadd132ps zmm30,zmm29,zmm28,{rn-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0x97, 0xf4                                     }, { vfmsubadd132ps zmm30,zmm29,zmm28,{ru-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0x97, 0xf4                                     }, { vfmsubadd132ps zmm30,zmm29,zmm28,{rd-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0x97, 0xf4                                     }, { vfmsubadd132ps zmm30,zmm29,zmm28,{rz-sae}                    }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x97, 0x31                                     }, { vfmsubadd132ps zmm30,zmm29,ZWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x97, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsubadd132ps zmm30,zmm29,ZWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x97, 0x31                                     }, { vfmsubadd132ps zmm30,zmm29,DWORD rcx{1to16}                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x97, 0x72, 0x7f                               }, { vfmsubadd132ps zmm30,zmm29,ZWORD rdx+0x1fc0                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x97, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmsubadd132ps zmm30,zmm29,ZWORD rdx+0x2000                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x97, 0x72, 0x80                               }, { vfmsubadd132ps zmm30,zmm29,ZWORD rdx-0x2000                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x97, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmsubadd132ps zmm30,zmm29,ZWORD rdx-0x2040                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x97, 0x72, 0x7f                               }, { vfmsubadd132ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x97, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmsubadd132ps zmm30,zmm29,DWORD rdx+0x200{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x97, 0x72, 0x80                               }, { vfmsubadd132ps zmm30,zmm29,DWORD rdx-0x200{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x97, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmsubadd132ps zmm30,zmm29,DWORD rdx-0x204{1to16}          }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0xa7, 0xf4                                     }, { vfmsubadd213pd zmm30,zmm29,zmm28                             }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0xa7, 0xf4                                     }, { vfmsubadd213pd zmm30{k7},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0xa7, 0xf4                                     }, { vfmsubadd213pd zmm30{k7}{z},zmm29,zmm28                      }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0xa7, 0xf4                                     }, { vfmsubadd213pd zmm30,zmm29,zmm28,{rn-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0xa7, 0xf4                                     }, { vfmsubadd213pd zmm30,zmm29,zmm28,{ru-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0xa7, 0xf4                                     }, { vfmsubadd213pd zmm30,zmm29,zmm28,{rd-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0xa7, 0xf4                                     }, { vfmsubadd213pd zmm30,zmm29,zmm28,{rz-sae}                    }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa7, 0x31                                     }, { vfmsubadd213pd zmm30,zmm29,ZWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0xa7, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsubadd213pd zmm30,zmm29,ZWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa7, 0x31                                     }, { vfmsubadd213pd zmm30,zmm29,QWORD rcx{1to8}                 }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa7, 0x72, 0x7f                               }, { vfmsubadd213pd zmm30,zmm29,ZWORD rdx+0x1fc0                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa7, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmsubadd213pd zmm30,zmm29,ZWORD rdx+0x2000                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa7, 0x72, 0x80                               }, { vfmsubadd213pd zmm30,zmm29,ZWORD rdx-0x2000                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xa7, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmsubadd213pd zmm30,zmm29,ZWORD rdx-0x2040                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa7, 0x72, 0x7f                               }, { vfmsubadd213pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa7, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmsubadd213pd zmm30,zmm29,QWORD rdx+0x400{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa7, 0x72, 0x80                               }, { vfmsubadd213pd zmm30,zmm29,QWORD rdx-0x400{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xa7, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmsubadd213pd zmm30,zmm29,QWORD rdx-0x408{1to8}           }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0xa7, 0xf4                                     }, { vfmsubadd213ps zmm30,zmm29,zmm28                             }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0xa7, 0xf4                                     }, { vfmsubadd213ps zmm30{k7},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0xa7, 0xf4                                     }, { vfmsubadd213ps zmm30{k7}{z},zmm29,zmm28                      }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0xa7, 0xf4                                     }, { vfmsubadd213ps zmm30,zmm29,zmm28,{rn-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0xa7, 0xf4                                     }, { vfmsubadd213ps zmm30,zmm29,zmm28,{ru-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0xa7, 0xf4                                     }, { vfmsubadd213ps zmm30,zmm29,zmm28,{rd-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0xa7, 0xf4                                     }, { vfmsubadd213ps zmm30,zmm29,zmm28,{rz-sae}                    }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa7, 0x31                                     }, { vfmsubadd213ps zmm30,zmm29,ZWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0xa7, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsubadd213ps zmm30,zmm29,ZWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa7, 0x31                                     }, { vfmsubadd213ps zmm30,zmm29,DWORD rcx{1to16}                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa7, 0x72, 0x7f                               }, { vfmsubadd213ps zmm30,zmm29,ZWORD rdx+0x1fc0                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa7, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmsubadd213ps zmm30,zmm29,ZWORD rdx+0x2000                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa7, 0x72, 0x80                               }, { vfmsubadd213ps zmm30,zmm29,ZWORD rdx-0x2000                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xa7, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmsubadd213ps zmm30,zmm29,ZWORD rdx-0x2040                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa7, 0x72, 0x7f                               }, { vfmsubadd213ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa7, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmsubadd213ps zmm30,zmm29,DWORD rdx+0x200{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa7, 0x72, 0x80                               }, { vfmsubadd213ps zmm30,zmm29,DWORD rdx-0x200{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xa7, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmsubadd213ps zmm30,zmm29,DWORD rdx-0x204{1to16}          }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0xb7, 0xf4                                     }, { vfmsubadd231pd zmm30,zmm29,zmm28                             }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0xb7, 0xf4                                     }, { vfmsubadd231pd zmm30{k7},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0xb7, 0xf4                                     }, { vfmsubadd231pd zmm30{k7}{z},zmm29,zmm28                      }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0xb7, 0xf4                                     }, { vfmsubadd231pd zmm30,zmm29,zmm28,{rn-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0xb7, 0xf4                                     }, { vfmsubadd231pd zmm30,zmm29,zmm28,{ru-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0xb7, 0xf4                                     }, { vfmsubadd231pd zmm30,zmm29,zmm28,{rd-sae}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0xb7, 0xf4                                     }, { vfmsubadd231pd zmm30,zmm29,zmm28,{rz-sae}                    }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb7, 0x31                                     }, { vfmsubadd231pd zmm30,zmm29,ZWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0xb7, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsubadd231pd zmm30,zmm29,ZWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb7, 0x31                                     }, { vfmsubadd231pd zmm30,zmm29,QWORD rcx{1to8}                 }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb7, 0x72, 0x7f                               }, { vfmsubadd231pd zmm30,zmm29,ZWORD rdx+0x1fc0                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb7, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmsubadd231pd zmm30,zmm29,ZWORD rdx+0x2000                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb7, 0x72, 0x80                               }, { vfmsubadd231pd zmm30,zmm29,ZWORD rdx-0x2000                }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xb7, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmsubadd231pd zmm30,zmm29,ZWORD rdx-0x2040                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb7, 0x72, 0x7f                               }, { vfmsubadd231pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb7, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfmsubadd231pd zmm30,zmm29,QWORD rdx+0x400{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb7, 0x72, 0x80                               }, { vfmsubadd231pd zmm30,zmm29,QWORD rdx-0x400{1to8}           }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xb7, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfmsubadd231pd zmm30,zmm29,QWORD rdx-0x408{1to8}           }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0xb7, 0xf4                                     }, { vfmsubadd231ps zmm30,zmm29,zmm28                             }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0xb7, 0xf4                                     }, { vfmsubadd231ps zmm30{k7},zmm29,zmm28                         }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0xb7, 0xf4                                     }, { vfmsubadd231ps zmm30{k7}{z},zmm29,zmm28                      }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0xb7, 0xf4                                     }, { vfmsubadd231ps zmm30,zmm29,zmm28,{rn-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0xb7, 0xf4                                     }, { vfmsubadd231ps zmm30,zmm29,zmm28,{ru-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0xb7, 0xf4                                     }, { vfmsubadd231ps zmm30,zmm29,zmm28,{rd-sae}                    }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0xb7, 0xf4                                     }, { vfmsubadd231ps zmm30,zmm29,zmm28,{rz-sae}                    }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb7, 0x31                                     }, { vfmsubadd231ps zmm30,zmm29,ZWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0xb7, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfmsubadd231ps zmm30,zmm29,ZWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb7, 0x31                                     }, { vfmsubadd231ps zmm30,zmm29,DWORD rcx{1to16}                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb7, 0x72, 0x7f                               }, { vfmsubadd231ps zmm30,zmm29,ZWORD rdx+0x1fc0                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb7, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfmsubadd231ps zmm30,zmm29,ZWORD rdx+0x2000                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb7, 0x72, 0x80                               }, { vfmsubadd231ps zmm30,zmm29,ZWORD rdx-0x2000                }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xb7, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfmsubadd231ps zmm30,zmm29,ZWORD rdx-0x2040                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb7, 0x72, 0x7f                               }, { vfmsubadd231ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb7, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfmsubadd231ps zmm30,zmm29,DWORD rdx+0x200{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb7, 0x72, 0x80                               }, { vfmsubadd231ps zmm30,zmm29,DWORD rdx-0x200{1to16}          }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xb7, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfmsubadd231ps zmm30,zmm29,DWORD rdx-0x204{1to16}          }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x9c, 0xf4                                     }, { vfnmadd132pd zmm30,zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x9c, 0xf4                                     }, { vfnmadd132pd zmm30{k7},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x9c, 0xf4                                     }, { vfnmadd132pd zmm30{k7}{z},zmm29,zmm28                        }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0x9c, 0xf4                                     }, { vfnmadd132pd zmm30,zmm29,zmm28,{rn-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0x9c, 0xf4                                     }, { vfnmadd132pd zmm30,zmm29,zmm28,{ru-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0x9c, 0xf4                                     }, { vfnmadd132pd zmm30,zmm29,zmm28,{rd-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0x9c, 0xf4                                     }, { vfnmadd132pd zmm30,zmm29,zmm28,{rz-sae}                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9c, 0x31                                     }, { vfnmadd132pd zmm30,zmm29,ZWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x9c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmadd132pd zmm30,zmm29,ZWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9c, 0x31                                     }, { vfnmadd132pd zmm30,zmm29,QWORD rcx{1to8}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9c, 0x72, 0x7f                               }, { vfnmadd132pd zmm30,zmm29,ZWORD rdx+0x1fc0                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9c, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfnmadd132pd zmm30,zmm29,ZWORD rdx+0x2000                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9c, 0x72, 0x80                               }, { vfnmadd132pd zmm30,zmm29,ZWORD rdx-0x2000                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9c, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfnmadd132pd zmm30,zmm29,ZWORD rdx-0x2040                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9c, 0x72, 0x7f                               }, { vfnmadd132pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9c, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfnmadd132pd zmm30,zmm29,QWORD rdx+0x400{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9c, 0x72, 0x80                               }, { vfnmadd132pd zmm30,zmm29,QWORD rdx-0x400{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9c, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfnmadd132pd zmm30,zmm29,QWORD rdx-0x408{1to8}             }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x9c, 0xf4                                     }, { vfnmadd132ps zmm30,zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x9c, 0xf4                                     }, { vfnmadd132ps zmm30{k7},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x9c, 0xf4                                     }, { vfnmadd132ps zmm30{k7}{z},zmm29,zmm28                        }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0x9c, 0xf4                                     }, { vfnmadd132ps zmm30,zmm29,zmm28,{rn-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0x9c, 0xf4                                     }, { vfnmadd132ps zmm30,zmm29,zmm28,{ru-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0x9c, 0xf4                                     }, { vfnmadd132ps zmm30,zmm29,zmm28,{rd-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0x9c, 0xf4                                     }, { vfnmadd132ps zmm30,zmm29,zmm28,{rz-sae}                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9c, 0x31                                     }, { vfnmadd132ps zmm30,zmm29,ZWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x9c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmadd132ps zmm30,zmm29,ZWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9c, 0x31                                     }, { vfnmadd132ps zmm30,zmm29,DWORD rcx{1to16}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9c, 0x72, 0x7f                               }, { vfnmadd132ps zmm30,zmm29,ZWORD rdx+0x1fc0                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9c, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfnmadd132ps zmm30,zmm29,ZWORD rdx+0x2000                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9c, 0x72, 0x80                               }, { vfnmadd132ps zmm30,zmm29,ZWORD rdx-0x2000                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9c, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfnmadd132ps zmm30,zmm29,ZWORD rdx-0x2040                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9c, 0x72, 0x7f                               }, { vfnmadd132ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9c, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfnmadd132ps zmm30,zmm29,DWORD rdx+0x200{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9c, 0x72, 0x80                               }, { vfnmadd132ps zmm30,zmm29,DWORD rdx-0x200{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9c, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfnmadd132ps zmm30,zmm29,DWORD rdx-0x204{1to16}            }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0x9d, 0xf4                                     }, { vfnmadd132sd xmm30{k7},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0x9d, 0xf4                                     }, { vfnmadd132sd xmm30{k7}{z},xmm29,xmm28                        }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0x9d, 0xf4                                     }, { vfnmadd132sd xmm30{k7},xmm29,xmm28,{rn-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0x9d, 0xf4                                     }, { vfnmadd132sd xmm30{k7},xmm29,xmm28,{ru-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0x9d, 0xf4                                     }, { vfnmadd132sd xmm30{k7},xmm29,xmm28,{rd-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0x9d, 0xf4                                     }, { vfnmadd132sd xmm30{k7},xmm29,xmm28,{rz-sae}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9d, 0x31                                     }, { vfnmadd132sd xmm30{k7},xmm29,QWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0x9d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmadd132sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123         }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9d, 0x72, 0x7f                               }, { vfnmadd132sd xmm30{k7},xmm29,QWORD rdx+0x3f8               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9d, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfnmadd132sd xmm30{k7},xmm29,QWORD rdx+0x400               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9d, 0x72, 0x80                               }, { vfnmadd132sd xmm30{k7},xmm29,QWORD rdx-0x400               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9d, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfnmadd132sd xmm30{k7},xmm29,QWORD rdx-0x408               }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0x9d, 0xf4                                     }, { vfnmadd132ss xmm30{k7},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0x9d, 0xf4                                     }, { vfnmadd132ss xmm30{k7}{z},xmm29,xmm28                        }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0x9d, 0xf4                                     }, { vfnmadd132ss xmm30{k7},xmm29,xmm28,{rn-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0x9d, 0xf4                                     }, { vfnmadd132ss xmm30{k7},xmm29,xmm28,{ru-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0x9d, 0xf4                                     }, { vfnmadd132ss xmm30{k7},xmm29,xmm28,{rd-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0x9d, 0xf4                                     }, { vfnmadd132ss xmm30{k7},xmm29,xmm28,{rz-sae}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9d, 0x31                                     }, { vfnmadd132ss xmm30{k7},xmm29,DWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0x9d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmadd132ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123         }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9d, 0x72, 0x7f                               }, { vfnmadd132ss xmm30{k7},xmm29,DWORD rdx+0x1fc               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9d, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfnmadd132ss xmm30{k7},xmm29,DWORD rdx+0x200               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9d, 0x72, 0x80                               }, { vfnmadd132ss xmm30{k7},xmm29,DWORD rdx-0x200               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9d, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfnmadd132ss xmm30{k7},xmm29,DWORD rdx-0x204               }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0xac, 0xf4                                     }, { vfnmadd213pd zmm30,zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0xac, 0xf4                                     }, { vfnmadd213pd zmm30{k7},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0xac, 0xf4                                     }, { vfnmadd213pd zmm30{k7}{z},zmm29,zmm28                        }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0xac, 0xf4                                     }, { vfnmadd213pd zmm30,zmm29,zmm28,{rn-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0xac, 0xf4                                     }, { vfnmadd213pd zmm30,zmm29,zmm28,{ru-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0xac, 0xf4                                     }, { vfnmadd213pd zmm30,zmm29,zmm28,{rd-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0xac, 0xf4                                     }, { vfnmadd213pd zmm30,zmm29,zmm28,{rz-sae}                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xac, 0x31                                     }, { vfnmadd213pd zmm30,zmm29,ZWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0xac, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmadd213pd zmm30,zmm29,ZWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xac, 0x31                                     }, { vfnmadd213pd zmm30,zmm29,QWORD rcx{1to8}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xac, 0x72, 0x7f                               }, { vfnmadd213pd zmm30,zmm29,ZWORD rdx+0x1fc0                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xac, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfnmadd213pd zmm30,zmm29,ZWORD rdx+0x2000                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xac, 0x72, 0x80                               }, { vfnmadd213pd zmm30,zmm29,ZWORD rdx-0x2000                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xac, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfnmadd213pd zmm30,zmm29,ZWORD rdx-0x2040                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xac, 0x72, 0x7f                               }, { vfnmadd213pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xac, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfnmadd213pd zmm30,zmm29,QWORD rdx+0x400{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xac, 0x72, 0x80                               }, { vfnmadd213pd zmm30,zmm29,QWORD rdx-0x400{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xac, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfnmadd213pd zmm30,zmm29,QWORD rdx-0x408{1to8}             }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0xac, 0xf4                                     }, { vfnmadd213ps zmm30,zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0xac, 0xf4                                     }, { vfnmadd213ps zmm30{k7},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0xac, 0xf4                                     }, { vfnmadd213ps zmm30{k7}{z},zmm29,zmm28                        }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0xac, 0xf4                                     }, { vfnmadd213ps zmm30,zmm29,zmm28,{rn-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0xac, 0xf4                                     }, { vfnmadd213ps zmm30,zmm29,zmm28,{ru-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0xac, 0xf4                                     }, { vfnmadd213ps zmm30,zmm29,zmm28,{rd-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0xac, 0xf4                                     }, { vfnmadd213ps zmm30,zmm29,zmm28,{rz-sae}                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xac, 0x31                                     }, { vfnmadd213ps zmm30,zmm29,ZWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0xac, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmadd213ps zmm30,zmm29,ZWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xac, 0x31                                     }, { vfnmadd213ps zmm30,zmm29,DWORD rcx{1to16}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xac, 0x72, 0x7f                               }, { vfnmadd213ps zmm30,zmm29,ZWORD rdx+0x1fc0                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xac, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfnmadd213ps zmm30,zmm29,ZWORD rdx+0x2000                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xac, 0x72, 0x80                               }, { vfnmadd213ps zmm30,zmm29,ZWORD rdx-0x2000                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xac, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfnmadd213ps zmm30,zmm29,ZWORD rdx-0x2040                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xac, 0x72, 0x7f                               }, { vfnmadd213ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xac, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfnmadd213ps zmm30,zmm29,DWORD rdx+0x200{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xac, 0x72, 0x80                               }, { vfnmadd213ps zmm30,zmm29,DWORD rdx-0x200{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xac, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfnmadd213ps zmm30,zmm29,DWORD rdx-0x204{1to16}            }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0xad, 0xf4                                     }, { vfnmadd213sd xmm30{k7},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0xad, 0xf4                                     }, { vfnmadd213sd xmm30{k7}{z},xmm29,xmm28                        }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0xad, 0xf4                                     }, { vfnmadd213sd xmm30{k7},xmm29,xmm28,{rn-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0xad, 0xf4                                     }, { vfnmadd213sd xmm30{k7},xmm29,xmm28,{ru-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0xad, 0xf4                                     }, { vfnmadd213sd xmm30{k7},xmm29,xmm28,{rd-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0xad, 0xf4                                     }, { vfnmadd213sd xmm30{k7},xmm29,xmm28,{rz-sae}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xad, 0x31                                     }, { vfnmadd213sd xmm30{k7},xmm29,QWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0xad, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmadd213sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123         }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xad, 0x72, 0x7f                               }, { vfnmadd213sd xmm30{k7},xmm29,QWORD rdx+0x3f8               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xad, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfnmadd213sd xmm30{k7},xmm29,QWORD rdx+0x400               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xad, 0x72, 0x80                               }, { vfnmadd213sd xmm30{k7},xmm29,QWORD rdx-0x400               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xad, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfnmadd213sd xmm30{k7},xmm29,QWORD rdx-0x408               }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0xad, 0xf4                                     }, { vfnmadd213ss xmm30{k7},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0xad, 0xf4                                     }, { vfnmadd213ss xmm30{k7}{z},xmm29,xmm28                        }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0xad, 0xf4                                     }, { vfnmadd213ss xmm30{k7},xmm29,xmm28,{rn-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0xad, 0xf4                                     }, { vfnmadd213ss xmm30{k7},xmm29,xmm28,{ru-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0xad, 0xf4                                     }, { vfnmadd213ss xmm30{k7},xmm29,xmm28,{rd-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0xad, 0xf4                                     }, { vfnmadd213ss xmm30{k7},xmm29,xmm28,{rz-sae}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xad, 0x31                                     }, { vfnmadd213ss xmm30{k7},xmm29,DWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0xad, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmadd213ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123         }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xad, 0x72, 0x7f                               }, { vfnmadd213ss xmm30{k7},xmm29,DWORD rdx+0x1fc               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xad, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfnmadd213ss xmm30{k7},xmm29,DWORD rdx+0x200               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xad, 0x72, 0x80                               }, { vfnmadd213ss xmm30{k7},xmm29,DWORD rdx-0x200               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xad, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfnmadd213ss xmm30{k7},xmm29,DWORD rdx-0x204               }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0xbc, 0xf4                                     }, { vfnmadd231pd zmm30,zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0xbc, 0xf4                                     }, { vfnmadd231pd zmm30{k7},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0xbc, 0xf4                                     }, { vfnmadd231pd zmm30{k7}{z},zmm29,zmm28                        }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0xbc, 0xf4                                     }, { vfnmadd231pd zmm30,zmm29,zmm28,{rn-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0xbc, 0xf4                                     }, { vfnmadd231pd zmm30,zmm29,zmm28,{ru-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0xbc, 0xf4                                     }, { vfnmadd231pd zmm30,zmm29,zmm28,{rd-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0xbc, 0xf4                                     }, { vfnmadd231pd zmm30,zmm29,zmm28,{rz-sae}                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xbc, 0x31                                     }, { vfnmadd231pd zmm30,zmm29,ZWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0xbc, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmadd231pd zmm30,zmm29,ZWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xbc, 0x31                                     }, { vfnmadd231pd zmm30,zmm29,QWORD rcx{1to8}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xbc, 0x72, 0x7f                               }, { vfnmadd231pd zmm30,zmm29,ZWORD rdx+0x1fc0                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xbc, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfnmadd231pd zmm30,zmm29,ZWORD rdx+0x2000                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xbc, 0x72, 0x80                               }, { vfnmadd231pd zmm30,zmm29,ZWORD rdx-0x2000                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xbc, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfnmadd231pd zmm30,zmm29,ZWORD rdx-0x2040                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xbc, 0x72, 0x7f                               }, { vfnmadd231pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xbc, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfnmadd231pd zmm30,zmm29,QWORD rdx+0x400{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xbc, 0x72, 0x80                               }, { vfnmadd231pd zmm30,zmm29,QWORD rdx-0x400{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xbc, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfnmadd231pd zmm30,zmm29,QWORD rdx-0x408{1to8}             }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0xbc, 0xf4                                     }, { vfnmadd231ps zmm30,zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0xbc, 0xf4                                     }, { vfnmadd231ps zmm30{k7},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0xbc, 0xf4                                     }, { vfnmadd231ps zmm30{k7}{z},zmm29,zmm28                        }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0xbc, 0xf4                                     }, { vfnmadd231ps zmm30,zmm29,zmm28,{rn-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0xbc, 0xf4                                     }, { vfnmadd231ps zmm30,zmm29,zmm28,{ru-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0xbc, 0xf4                                     }, { vfnmadd231ps zmm30,zmm29,zmm28,{rd-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0xbc, 0xf4                                     }, { vfnmadd231ps zmm30,zmm29,zmm28,{rz-sae}                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xbc, 0x31                                     }, { vfnmadd231ps zmm30,zmm29,ZWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0xbc, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmadd231ps zmm30,zmm29,ZWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xbc, 0x31                                     }, { vfnmadd231ps zmm30,zmm29,DWORD rcx{1to16}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xbc, 0x72, 0x7f                               }, { vfnmadd231ps zmm30,zmm29,ZWORD rdx+0x1fc0                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xbc, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfnmadd231ps zmm30,zmm29,ZWORD rdx+0x2000                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xbc, 0x72, 0x80                               }, { vfnmadd231ps zmm30,zmm29,ZWORD rdx-0x2000                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xbc, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfnmadd231ps zmm30,zmm29,ZWORD rdx-0x2040                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xbc, 0x72, 0x7f                               }, { vfnmadd231ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xbc, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfnmadd231ps zmm30,zmm29,DWORD rdx+0x200{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xbc, 0x72, 0x80                               }, { vfnmadd231ps zmm30,zmm29,DWORD rdx-0x200{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xbc, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfnmadd231ps zmm30,zmm29,DWORD rdx-0x204{1to16}            }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0xbd, 0xf4                                     }, { vfnmadd231sd xmm30{k7},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0xbd, 0xf4                                     }, { vfnmadd231sd xmm30{k7}{z},xmm29,xmm28                        }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0xbd, 0xf4                                     }, { vfnmadd231sd xmm30{k7},xmm29,xmm28,{rn-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0xbd, 0xf4                                     }, { vfnmadd231sd xmm30{k7},xmm29,xmm28,{ru-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0xbd, 0xf4                                     }, { vfnmadd231sd xmm30{k7},xmm29,xmm28,{rd-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0xbd, 0xf4                                     }, { vfnmadd231sd xmm30{k7},xmm29,xmm28,{rz-sae}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbd, 0x31                                     }, { vfnmadd231sd xmm30{k7},xmm29,QWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0xbd, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmadd231sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123         }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbd, 0x72, 0x7f                               }, { vfnmadd231sd xmm30{k7},xmm29,QWORD rdx+0x3f8               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbd, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfnmadd231sd xmm30{k7},xmm29,QWORD rdx+0x400               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbd, 0x72, 0x80                               }, { vfnmadd231sd xmm30{k7},xmm29,QWORD rdx-0x400               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbd, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfnmadd231sd xmm30{k7},xmm29,QWORD rdx-0x408               }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0xbd, 0xf4                                     }, { vfnmadd231ss xmm30{k7},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0xbd, 0xf4                                     }, { vfnmadd231ss xmm30{k7}{z},xmm29,xmm28                        }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0xbd, 0xf4                                     }, { vfnmadd231ss xmm30{k7},xmm29,xmm28,{rn-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0xbd, 0xf4                                     }, { vfnmadd231ss xmm30{k7},xmm29,xmm28,{ru-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0xbd, 0xf4                                     }, { vfnmadd231ss xmm30{k7},xmm29,xmm28,{rd-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0xbd, 0xf4                                     }, { vfnmadd231ss xmm30{k7},xmm29,xmm28,{rz-sae}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbd, 0x31                                     }, { vfnmadd231ss xmm30{k7},xmm29,DWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0xbd, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmadd231ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123         }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbd, 0x72, 0x7f                               }, { vfnmadd231ss xmm30{k7},xmm29,DWORD rdx+0x1fc               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbd, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfnmadd231ss xmm30{k7},xmm29,DWORD rdx+0x200               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbd, 0x72, 0x80                               }, { vfnmadd231ss xmm30{k7},xmm29,DWORD rdx-0x200               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbd, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfnmadd231ss xmm30{k7},xmm29,DWORD rdx-0x204               }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x9e, 0xf4                                     }, { vfnmsub132pd zmm30,zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x9e, 0xf4                                     }, { vfnmsub132pd zmm30{k7},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x9e, 0xf4                                     }, { vfnmsub132pd zmm30{k7}{z},zmm29,zmm28                        }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0x9e, 0xf4                                     }, { vfnmsub132pd zmm30,zmm29,zmm28,{rn-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0x9e, 0xf4                                     }, { vfnmsub132pd zmm30,zmm29,zmm28,{ru-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0x9e, 0xf4                                     }, { vfnmsub132pd zmm30,zmm29,zmm28,{rd-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0x9e, 0xf4                                     }, { vfnmsub132pd zmm30,zmm29,zmm28,{rz-sae}                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9e, 0x31                                     }, { vfnmsub132pd zmm30,zmm29,ZWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x9e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmsub132pd zmm30,zmm29,ZWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9e, 0x31                                     }, { vfnmsub132pd zmm30,zmm29,QWORD rcx{1to8}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9e, 0x72, 0x7f                               }, { vfnmsub132pd zmm30,zmm29,ZWORD rdx+0x1fc0                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9e, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfnmsub132pd zmm30,zmm29,ZWORD rdx+0x2000                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9e, 0x72, 0x80                               }, { vfnmsub132pd zmm30,zmm29,ZWORD rdx-0x2000                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x9e, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfnmsub132pd zmm30,zmm29,ZWORD rdx-0x2040                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9e, 0x72, 0x7f                               }, { vfnmsub132pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9e, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfnmsub132pd zmm30,zmm29,QWORD rdx+0x400{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9e, 0x72, 0x80                               }, { vfnmsub132pd zmm30,zmm29,QWORD rdx-0x400{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x9e, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfnmsub132pd zmm30,zmm29,QWORD rdx-0x408{1to8}             }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x9e, 0xf4                                     }, { vfnmsub132ps zmm30,zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x9e, 0xf4                                     }, { vfnmsub132ps zmm30{k7},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x9e, 0xf4                                     }, { vfnmsub132ps zmm30{k7}{z},zmm29,zmm28                        }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0x9e, 0xf4                                     }, { vfnmsub132ps zmm30,zmm29,zmm28,{rn-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0x9e, 0xf4                                     }, { vfnmsub132ps zmm30,zmm29,zmm28,{ru-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0x9e, 0xf4                                     }, { vfnmsub132ps zmm30,zmm29,zmm28,{rd-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0x9e, 0xf4                                     }, { vfnmsub132ps zmm30,zmm29,zmm28,{rz-sae}                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9e, 0x31                                     }, { vfnmsub132ps zmm30,zmm29,ZWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x9e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmsub132ps zmm30,zmm29,ZWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9e, 0x31                                     }, { vfnmsub132ps zmm30,zmm29,DWORD rcx{1to16}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9e, 0x72, 0x7f                               }, { vfnmsub132ps zmm30,zmm29,ZWORD rdx+0x1fc0                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9e, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfnmsub132ps zmm30,zmm29,ZWORD rdx+0x2000                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9e, 0x72, 0x80                               }, { vfnmsub132ps zmm30,zmm29,ZWORD rdx-0x2000                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x9e, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfnmsub132ps zmm30,zmm29,ZWORD rdx-0x2040                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9e, 0x72, 0x7f                               }, { vfnmsub132ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9e, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfnmsub132ps zmm30,zmm29,DWORD rdx+0x200{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9e, 0x72, 0x80                               }, { vfnmsub132ps zmm30,zmm29,DWORD rdx-0x200{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x9e, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfnmsub132ps zmm30,zmm29,DWORD rdx-0x204{1to16}            }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0x9f, 0xf4                                     }, { vfnmsub132sd xmm30{k7},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0x9f, 0xf4                                     }, { vfnmsub132sd xmm30{k7}{z},xmm29,xmm28                        }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0x9f, 0xf4                                     }, { vfnmsub132sd xmm30{k7},xmm29,xmm28,{rn-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0x9f, 0xf4                                     }, { vfnmsub132sd xmm30{k7},xmm29,xmm28,{ru-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0x9f, 0xf4                                     }, { vfnmsub132sd xmm30{k7},xmm29,xmm28,{rd-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0x9f, 0xf4                                     }, { vfnmsub132sd xmm30{k7},xmm29,xmm28,{rz-sae}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9f, 0x31                                     }, { vfnmsub132sd xmm30{k7},xmm29,QWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0x9f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmsub132sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123         }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9f, 0x72, 0x7f                               }, { vfnmsub132sd xmm30{k7},xmm29,QWORD rdx+0x3f8               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9f, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfnmsub132sd xmm30{k7},xmm29,QWORD rdx+0x400               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9f, 0x72, 0x80                               }, { vfnmsub132sd xmm30{k7},xmm29,QWORD rdx-0x400               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x9f, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfnmsub132sd xmm30{k7},xmm29,QWORD rdx-0x408               }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0x9f, 0xf4                                     }, { vfnmsub132ss xmm30{k7},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0x9f, 0xf4                                     }, { vfnmsub132ss xmm30{k7}{z},xmm29,xmm28                        }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0x9f, 0xf4                                     }, { vfnmsub132ss xmm30{k7},xmm29,xmm28,{rn-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0x9f, 0xf4                                     }, { vfnmsub132ss xmm30{k7},xmm29,xmm28,{ru-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0x9f, 0xf4                                     }, { vfnmsub132ss xmm30{k7},xmm29,xmm28,{rd-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0x9f, 0xf4                                     }, { vfnmsub132ss xmm30{k7},xmm29,xmm28,{rz-sae}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9f, 0x31                                     }, { vfnmsub132ss xmm30{k7},xmm29,DWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0x9f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmsub132ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123         }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9f, 0x72, 0x7f                               }, { vfnmsub132ss xmm30{k7},xmm29,DWORD rdx+0x1fc               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9f, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfnmsub132ss xmm30{k7},xmm29,DWORD rdx+0x200               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9f, 0x72, 0x80                               }, { vfnmsub132ss xmm30{k7},xmm29,DWORD rdx-0x200               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x9f, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfnmsub132ss xmm30{k7},xmm29,DWORD rdx-0x204               }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0xae, 0xf4                                     }, { vfnmsub213pd zmm30,zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0xae, 0xf4                                     }, { vfnmsub213pd zmm30{k7},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0xae, 0xf4                                     }, { vfnmsub213pd zmm30{k7}{z},zmm29,zmm28                        }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0xae, 0xf4                                     }, { vfnmsub213pd zmm30,zmm29,zmm28,{rn-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0xae, 0xf4                                     }, { vfnmsub213pd zmm30,zmm29,zmm28,{ru-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0xae, 0xf4                                     }, { vfnmsub213pd zmm30,zmm29,zmm28,{rd-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0xae, 0xf4                                     }, { vfnmsub213pd zmm30,zmm29,zmm28,{rz-sae}                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xae, 0x31                                     }, { vfnmsub213pd zmm30,zmm29,ZWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0xae, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmsub213pd zmm30,zmm29,ZWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xae, 0x31                                     }, { vfnmsub213pd zmm30,zmm29,QWORD rcx{1to8}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xae, 0x72, 0x7f                               }, { vfnmsub213pd zmm30,zmm29,ZWORD rdx+0x1fc0                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xae, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfnmsub213pd zmm30,zmm29,ZWORD rdx+0x2000                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xae, 0x72, 0x80                               }, { vfnmsub213pd zmm30,zmm29,ZWORD rdx-0x2000                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xae, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfnmsub213pd zmm30,zmm29,ZWORD rdx-0x2040                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xae, 0x72, 0x7f                               }, { vfnmsub213pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xae, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfnmsub213pd zmm30,zmm29,QWORD rdx+0x400{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xae, 0x72, 0x80                               }, { vfnmsub213pd zmm30,zmm29,QWORD rdx-0x400{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xae, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfnmsub213pd zmm30,zmm29,QWORD rdx-0x408{1to8}             }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0xae, 0xf4                                     }, { vfnmsub213ps zmm30,zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0xae, 0xf4                                     }, { vfnmsub213ps zmm30{k7},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0xae, 0xf4                                     }, { vfnmsub213ps zmm30{k7}{z},zmm29,zmm28                        }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0xae, 0xf4                                     }, { vfnmsub213ps zmm30,zmm29,zmm28,{rn-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0xae, 0xf4                                     }, { vfnmsub213ps zmm30,zmm29,zmm28,{ru-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0xae, 0xf4                                     }, { vfnmsub213ps zmm30,zmm29,zmm28,{rd-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0xae, 0xf4                                     }, { vfnmsub213ps zmm30,zmm29,zmm28,{rz-sae}                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xae, 0x31                                     }, { vfnmsub213ps zmm30,zmm29,ZWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0xae, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmsub213ps zmm30,zmm29,ZWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xae, 0x31                                     }, { vfnmsub213ps zmm30,zmm29,DWORD rcx{1to16}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xae, 0x72, 0x7f                               }, { vfnmsub213ps zmm30,zmm29,ZWORD rdx+0x1fc0                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xae, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfnmsub213ps zmm30,zmm29,ZWORD rdx+0x2000                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xae, 0x72, 0x80                               }, { vfnmsub213ps zmm30,zmm29,ZWORD rdx-0x2000                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xae, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfnmsub213ps zmm30,zmm29,ZWORD rdx-0x2040                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xae, 0x72, 0x7f                               }, { vfnmsub213ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xae, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfnmsub213ps zmm30,zmm29,DWORD rdx+0x200{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xae, 0x72, 0x80                               }, { vfnmsub213ps zmm30,zmm29,DWORD rdx-0x200{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xae, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfnmsub213ps zmm30,zmm29,DWORD rdx-0x204{1to16}            }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0xaf, 0xf4                                     }, { vfnmsub213sd xmm30{k7},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0xaf, 0xf4                                     }, { vfnmsub213sd xmm30{k7}{z},xmm29,xmm28                        }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0xaf, 0xf4                                     }, { vfnmsub213sd xmm30{k7},xmm29,xmm28,{rn-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0xaf, 0xf4                                     }, { vfnmsub213sd xmm30{k7},xmm29,xmm28,{ru-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0xaf, 0xf4                                     }, { vfnmsub213sd xmm30{k7},xmm29,xmm28,{rd-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0xaf, 0xf4                                     }, { vfnmsub213sd xmm30{k7},xmm29,xmm28,{rz-sae}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xaf, 0x31                                     }, { vfnmsub213sd xmm30{k7},xmm29,QWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0xaf, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmsub213sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123         }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xaf, 0x72, 0x7f                               }, { vfnmsub213sd xmm30{k7},xmm29,QWORD rdx+0x3f8               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xaf, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfnmsub213sd xmm30{k7},xmm29,QWORD rdx+0x400               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xaf, 0x72, 0x80                               }, { vfnmsub213sd xmm30{k7},xmm29,QWORD rdx-0x400               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xaf, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfnmsub213sd xmm30{k7},xmm29,QWORD rdx-0x408               }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0xaf, 0xf4                                     }, { vfnmsub213ss xmm30{k7},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0xaf, 0xf4                                     }, { vfnmsub213ss xmm30{k7}{z},xmm29,xmm28                        }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0xaf, 0xf4                                     }, { vfnmsub213ss xmm30{k7},xmm29,xmm28,{rn-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0xaf, 0xf4                                     }, { vfnmsub213ss xmm30{k7},xmm29,xmm28,{ru-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0xaf, 0xf4                                     }, { vfnmsub213ss xmm30{k7},xmm29,xmm28,{rd-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0xaf, 0xf4                                     }, { vfnmsub213ss xmm30{k7},xmm29,xmm28,{rz-sae}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xaf, 0x31                                     }, { vfnmsub213ss xmm30{k7},xmm29,DWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0xaf, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmsub213ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123         }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xaf, 0x72, 0x7f                               }, { vfnmsub213ss xmm30{k7},xmm29,DWORD rdx+0x1fc               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xaf, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfnmsub213ss xmm30{k7},xmm29,DWORD rdx+0x200               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xaf, 0x72, 0x80                               }, { vfnmsub213ss xmm30{k7},xmm29,DWORD rdx-0x200               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xaf, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfnmsub213ss xmm30{k7},xmm29,DWORD rdx-0x204               }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0xbe, 0xf4                                     }, { vfnmsub231pd zmm30,zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0xbe, 0xf4                                     }, { vfnmsub231pd zmm30{k7},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0xbe, 0xf4                                     }, { vfnmsub231pd zmm30{k7}{z},zmm29,zmm28                        }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0xbe, 0xf4                                     }, { vfnmsub231pd zmm30,zmm29,zmm28,{rn-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0xbe, 0xf4                                     }, { vfnmsub231pd zmm30,zmm29,zmm28,{ru-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0xbe, 0xf4                                     }, { vfnmsub231pd zmm30,zmm29,zmm28,{rd-sae}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0xbe, 0xf4                                     }, { vfnmsub231pd zmm30,zmm29,zmm28,{rz-sae}                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xbe, 0x31                                     }, { vfnmsub231pd zmm30,zmm29,ZWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0xbe, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmsub231pd zmm30,zmm29,ZWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xbe, 0x31                                     }, { vfnmsub231pd zmm30,zmm29,QWORD rcx{1to8}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xbe, 0x72, 0x7f                               }, { vfnmsub231pd zmm30,zmm29,ZWORD rdx+0x1fc0                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xbe, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfnmsub231pd zmm30,zmm29,ZWORD rdx+0x2000                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xbe, 0x72, 0x80                               }, { vfnmsub231pd zmm30,zmm29,ZWORD rdx-0x2000                  }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0xbe, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfnmsub231pd zmm30,zmm29,ZWORD rdx-0x2040                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xbe, 0x72, 0x7f                               }, { vfnmsub231pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xbe, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfnmsub231pd zmm30,zmm29,QWORD rdx+0x400{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xbe, 0x72, 0x80                               }, { vfnmsub231pd zmm30,zmm29,QWORD rdx-0x400{1to8}             }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0xbe, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfnmsub231pd zmm30,zmm29,QWORD rdx-0x408{1to8}             }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0xbe, 0xf4                                     }, { vfnmsub231ps zmm30,zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0xbe, 0xf4                                     }, { vfnmsub231ps zmm30{k7},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0xbe, 0xf4                                     }, { vfnmsub231ps zmm30{k7}{z},zmm29,zmm28                        }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0xbe, 0xf4                                     }, { vfnmsub231ps zmm30,zmm29,zmm28,{rn-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0xbe, 0xf4                                     }, { vfnmsub231ps zmm30,zmm29,zmm28,{ru-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0xbe, 0xf4                                     }, { vfnmsub231ps zmm30,zmm29,zmm28,{rd-sae}                      }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0xbe, 0xf4                                     }, { vfnmsub231ps zmm30,zmm29,zmm28,{rz-sae}                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xbe, 0x31                                     }, { vfnmsub231ps zmm30,zmm29,ZWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0xbe, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmsub231ps zmm30,zmm29,ZWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xbe, 0x31                                     }, { vfnmsub231ps zmm30,zmm29,DWORD rcx{1to16}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xbe, 0x72, 0x7f                               }, { vfnmsub231ps zmm30,zmm29,ZWORD rdx+0x1fc0                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xbe, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vfnmsub231ps zmm30,zmm29,ZWORD rdx+0x2000                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xbe, 0x72, 0x80                               }, { vfnmsub231ps zmm30,zmm29,ZWORD rdx-0x2000                  }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0xbe, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vfnmsub231ps zmm30,zmm29,ZWORD rdx-0x2040                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xbe, 0x72, 0x7f                               }, { vfnmsub231ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xbe, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfnmsub231ps zmm30,zmm29,DWORD rdx+0x200{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xbe, 0x72, 0x80                               }, { vfnmsub231ps zmm30,zmm29,DWORD rdx-0x200{1to16}            }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0xbe, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfnmsub231ps zmm30,zmm29,DWORD rdx-0x204{1to16}            }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0xbf, 0xf4                                     }, { vfnmsub231sd xmm30{k7},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0xbf, 0xf4                                     }, { vfnmsub231sd xmm30{k7}{z},xmm29,xmm28                        }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0xbf, 0xf4                                     }, { vfnmsub231sd xmm30{k7},xmm29,xmm28,{rn-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0xbf, 0xf4                                     }, { vfnmsub231sd xmm30{k7},xmm29,xmm28,{ru-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0xbf, 0xf4                                     }, { vfnmsub231sd xmm30{k7},xmm29,xmm28,{rd-sae}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0xbf, 0xf4                                     }, { vfnmsub231sd xmm30{k7},xmm29,xmm28,{rz-sae}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbf, 0x31                                     }, { vfnmsub231sd xmm30{k7},xmm29,QWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0xbf, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmsub231sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123         }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbf, 0x72, 0x7f                               }, { vfnmsub231sd xmm30{k7},xmm29,QWORD rdx+0x3f8               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbf, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vfnmsub231sd xmm30{k7},xmm29,QWORD rdx+0x400               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbf, 0x72, 0x80                               }, { vfnmsub231sd xmm30{k7},xmm29,QWORD rdx-0x400               }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0xbf, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vfnmsub231sd xmm30{k7},xmm29,QWORD rdx-0x408               }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0xbf, 0xf4                                     }, { vfnmsub231ss xmm30{k7},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0xbf, 0xf4                                     }, { vfnmsub231ss xmm30{k7}{z},xmm29,xmm28                        }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0xbf, 0xf4                                     }, { vfnmsub231ss xmm30{k7},xmm29,xmm28,{rn-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0xbf, 0xf4                                     }, { vfnmsub231ss xmm30{k7},xmm29,xmm28,{ru-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0xbf, 0xf4                                     }, { vfnmsub231ss xmm30{k7},xmm29,xmm28,{rd-sae}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0xbf, 0xf4                                     }, { vfnmsub231ss xmm30{k7},xmm29,xmm28,{rz-sae}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbf, 0x31                                     }, { vfnmsub231ss xmm30{k7},xmm29,DWORD rcx                     }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0xbf, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vfnmsub231ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123         }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbf, 0x72, 0x7f                               }, { vfnmsub231ss xmm30{k7},xmm29,DWORD rdx+0x1fc               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbf, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vfnmsub231ss xmm30{k7},xmm29,DWORD rdx+0x200               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbf, 0x72, 0x80                               }, { vfnmsub231ss xmm30{k7},xmm29,DWORD rdx-0x200               }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0xbf, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vfnmsub231ss xmm30{k7},xmm29,DWORD rdx-0x204               }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0x92, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherdpd zmm30{k1}, r14+ymm31*8+0x7b                     }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0x92, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherdpd zmm30{k1}, r14+ymm31*8+0x7b                     }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0x92, 0x74, 0x39, 0x20                         }, { vgatherdpd zmm30{k1}, r9+ymm31*1+0x100                     }
+testcase	{ 0x62, 0x22, 0xfd, 0x41, 0x92, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vgatherdpd zmm30{k1}, rcx+ymm31*4+0x400                    }
+testcase	{ 0x62, 0x02, 0x7d, 0x41, 0x92, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherdps zmm30{k1}, r14+zmm31*8+0x7b                     }
+testcase	{ 0x62, 0x02, 0x7d, 0x41, 0x92, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherdps zmm30{k1}, r14+zmm31*8+0x7b                     }
+testcase	{ 0x62, 0x02, 0x7d, 0x41, 0x92, 0x74, 0x39, 0x40                         }, { vgatherdps zmm30{k1}, r9+zmm31*1+0x100                     }
+testcase	{ 0x62, 0x22, 0x7d, 0x41, 0x92, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vgatherdps zmm30{k1}, rcx+zmm31*4+0x400                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0x93, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherqpd zmm30{k1}, r14+zmm31*8+0x7b                     }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0x93, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherqpd zmm30{k1}, r14+zmm31*8+0x7b                     }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0x93, 0x74, 0x39, 0x20                         }, { vgatherqpd zmm30{k1}, r9+zmm31*1+0x100                     }
+testcase	{ 0x62, 0x22, 0xfd, 0x41, 0x93, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vgatherqpd zmm30{k1}, rcx+zmm31*4+0x400                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0x42, 0xf5                                     }, { vgetexppd zmm30,zmm29                                        }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0x42, 0xf5                                     }, { vgetexppd zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0x42, 0xf5                                     }, { vgetexppd zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x02, 0xfd, 0x18, 0x42, 0xf5                                     }, { vgetexppd zmm30,zmm29,{sae}                                  }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x42, 0x31                                     }, { vgetexppd zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x42, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vgetexppd zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x42, 0x31                                     }, { vgetexppd zmm30,QWORD rcx{1to8}                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x42, 0x72, 0x7f                               }, { vgetexppd zmm30,ZWORD rdx+0x1fc0                           }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x42, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vgetexppd zmm30,ZWORD rdx+0x2000                           }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x42, 0x72, 0x80                               }, { vgetexppd zmm30,ZWORD rdx-0x2000                           }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x42, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vgetexppd zmm30,ZWORD rdx-0x2040                           }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x42, 0x72, 0x7f                               }, { vgetexppd zmm30,QWORD rdx+0x3f8{1to8}                      }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x42, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vgetexppd zmm30,QWORD rdx+0x400{1to8}                      }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x42, 0x72, 0x80                               }, { vgetexppd zmm30,QWORD rdx-0x400{1to8}                      }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x42, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vgetexppd zmm30,QWORD rdx-0x408{1to8}                      }
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0x42, 0xf5                                     }, { vgetexpps zmm30,zmm29                                        }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x42, 0xf5                                     }, { vgetexpps zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x42, 0xf5                                     }, { vgetexpps zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x02, 0x7d, 0x18, 0x42, 0xf5                                     }, { vgetexpps zmm30,zmm29,{sae}                                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x42, 0x31                                     }, { vgetexpps zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x42, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vgetexpps zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x42, 0x31                                     }, { vgetexpps zmm30,DWORD rcx{1to16}                           }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x42, 0x72, 0x7f                               }, { vgetexpps zmm30,ZWORD rdx+0x1fc0                           }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x42, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vgetexpps zmm30,ZWORD rdx+0x2000                           }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x42, 0x72, 0x80                               }, { vgetexpps zmm30,ZWORD rdx-0x2000                           }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x42, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vgetexpps zmm30,ZWORD rdx-0x2040                           }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x42, 0x72, 0x7f                               }, { vgetexpps zmm30,DWORD rdx+0x1fc{1to16}                     }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x42, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vgetexpps zmm30,DWORD rdx+0x200{1to16}                     }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x42, 0x72, 0x80                               }, { vgetexpps zmm30,DWORD rdx-0x200{1to16}                     }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x42, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vgetexpps zmm30,DWORD rdx-0x204{1to16}                     }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0x43, 0xf4                                     }, { vgetexpsd xmm30{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0x43, 0xf4                                     }, { vgetexpsd xmm30{k7}{z},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0x43, 0xf4                                     }, { vgetexpsd xmm30{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x43, 0x31                                     }, { vgetexpsd xmm30{k7},xmm29,QWORD rcx                        }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0x43, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vgetexpsd xmm30{k7},xmm29,QWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x43, 0x72, 0x7f                               }, { vgetexpsd xmm30{k7},xmm29,QWORD rdx+0x3f8                  }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x43, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vgetexpsd xmm30{k7},xmm29,QWORD rdx+0x400                  }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x43, 0x72, 0x80                               }, { vgetexpsd xmm30{k7},xmm29,QWORD rdx-0x400                  }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x43, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vgetexpsd xmm30{k7},xmm29,QWORD rdx-0x408                  }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0x43, 0xf4                                     }, { vgetexpss xmm30{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0x43, 0xf4                                     }, { vgetexpss xmm30{k7}{z},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0x43, 0xf4                                     }, { vgetexpss xmm30{k7},xmm29,xmm28,{sae}                        }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x43, 0x31                                     }, { vgetexpss xmm30{k7},xmm29,DWORD rcx                        }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0x43, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vgetexpss xmm30{k7},xmm29,DWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x43, 0x72, 0x7f                               }, { vgetexpss xmm30{k7},xmm29,DWORD rdx+0x1fc                  }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x43, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vgetexpss xmm30{k7},xmm29,DWORD rdx+0x200                  }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x43, 0x72, 0x80                               }, { vgetexpss xmm30{k7},xmm29,DWORD rdx-0x200                  }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x43, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vgetexpss xmm30{k7},xmm29,DWORD rdx-0x204                  }
+testcase	{ 0x62, 0x03, 0xfd, 0x48, 0x26, 0xf5, 0xab                               }, { vgetmantpd zmm30,zmm29,0xab                                  }
+testcase	{ 0x62, 0x03, 0xfd, 0x4f, 0x26, 0xf5, 0xab                               }, { vgetmantpd zmm30{k7},zmm29,0xab                              }
+testcase	{ 0x62, 0x03, 0xfd, 0xcf, 0x26, 0xf5, 0xab                               }, { vgetmantpd zmm30{k7}{z},zmm29,0xab                           }
+testcase	{ 0x62, 0x03, 0xfd, 0x18, 0x26, 0xf5, 0xab                               }, { vgetmantpd zmm30,zmm29,{sae},0xab                            }
+testcase	{ 0x62, 0x03, 0xfd, 0x48, 0x26, 0xf5, 0x7b                               }, { vgetmantpd zmm30,zmm29,0x7b                                  }
+testcase	{ 0x62, 0x03, 0xfd, 0x18, 0x26, 0xf5, 0x7b                               }, { vgetmantpd zmm30,zmm29,{sae},0x7b                            }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x26, 0x31, 0x7b                               }, { vgetmantpd zmm30,ZWORD rcx,0x7b                            }
+testcase	{ 0x62, 0x23, 0xfd, 0x48, 0x26, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vgetmantpd zmm30,ZWORD rax+r14*8+0x123,0x7b                }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x26, 0x31, 0x7b                               }, { vgetmantpd zmm30,QWORD rcx{1to8},0x7b                      }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x26, 0x72, 0x7f, 0x7b                         }, { vgetmantpd zmm30,ZWORD rdx+0x1fc0,0x7b                     }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x26, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vgetmantpd zmm30,ZWORD rdx+0x2000,0x7b                     }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x26, 0x72, 0x80, 0x7b                         }, { vgetmantpd zmm30,ZWORD rdx-0x2000,0x7b                     }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x26, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vgetmantpd zmm30,ZWORD rdx-0x2040,0x7b                     }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x26, 0x72, 0x7f, 0x7b                         }, { vgetmantpd zmm30,QWORD rdx+0x3f8{1to8},0x7b                }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x26, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vgetmantpd zmm30,QWORD rdx+0x400{1to8},0x7b                }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x26, 0x72, 0x80, 0x7b                         }, { vgetmantpd zmm30,QWORD rdx-0x400{1to8},0x7b                }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x26, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vgetmantpd zmm30,QWORD rdx-0x408{1to8},0x7b                }
+testcase	{ 0x62, 0x03, 0x7d, 0x48, 0x26, 0xf5, 0xab                               }, { vgetmantps zmm30,zmm29,0xab                                  }
+testcase	{ 0x62, 0x03, 0x7d, 0x4f, 0x26, 0xf5, 0xab                               }, { vgetmantps zmm30{k7},zmm29,0xab                              }
+testcase	{ 0x62, 0x03, 0x7d, 0xcf, 0x26, 0xf5, 0xab                               }, { vgetmantps zmm30{k7}{z},zmm29,0xab                           }
+testcase	{ 0x62, 0x03, 0x7d, 0x18, 0x26, 0xf5, 0xab                               }, { vgetmantps zmm30,zmm29,{sae},0xab                            }
+testcase	{ 0x62, 0x03, 0x7d, 0x48, 0x26, 0xf5, 0x7b                               }, { vgetmantps zmm30,zmm29,0x7b                                  }
+testcase	{ 0x62, 0x03, 0x7d, 0x18, 0x26, 0xf5, 0x7b                               }, { vgetmantps zmm30,zmm29,{sae},0x7b                            }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x26, 0x31, 0x7b                               }, { vgetmantps zmm30,ZWORD rcx,0x7b                            }
+testcase	{ 0x62, 0x23, 0x7d, 0x48, 0x26, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vgetmantps zmm30,ZWORD rax+r14*8+0x123,0x7b                }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x26, 0x31, 0x7b                               }, { vgetmantps zmm30,DWORD rcx{1to16},0x7b                     }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x26, 0x72, 0x7f, 0x7b                         }, { vgetmantps zmm30,ZWORD rdx+0x1fc0,0x7b                     }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x26, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vgetmantps zmm30,ZWORD rdx+0x2000,0x7b                     }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x26, 0x72, 0x80, 0x7b                         }, { vgetmantps zmm30,ZWORD rdx-0x2000,0x7b                     }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x26, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vgetmantps zmm30,ZWORD rdx-0x2040,0x7b                     }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x26, 0x72, 0x7f, 0x7b                         }, { vgetmantps zmm30,DWORD rdx+0x1fc{1to16},0x7b               }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x26, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vgetmantps zmm30,DWORD rdx+0x200{1to16},0x7b               }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x26, 0x72, 0x80, 0x7b                         }, { vgetmantps zmm30,DWORD rdx-0x200{1to16},0x7b               }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x26, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vgetmantps zmm30,DWORD rdx-0x204{1to16},0x7b               }
+testcase	{ 0x62, 0x03, 0x95, 0x07, 0x27, 0xf4, 0xab                               }, { vgetmantsd xmm30{k7},xmm29,xmm28,0xab                        }
+testcase	{ 0x62, 0x03, 0x95, 0x87, 0x27, 0xf4, 0xab                               }, { vgetmantsd xmm30{k7}{z},xmm29,xmm28,0xab                     }
+testcase	{ 0x62, 0x03, 0x95, 0x17, 0x27, 0xf4, 0xab                               }, { vgetmantsd xmm30{k7},xmm29,xmm28,{sae},0xab                  }
+testcase	{ 0x62, 0x03, 0x95, 0x07, 0x27, 0xf4, 0x7b                               }, { vgetmantsd xmm30{k7},xmm29,xmm28,0x7b                        }
+testcase	{ 0x62, 0x03, 0x95, 0x17, 0x27, 0xf4, 0x7b                               }, { vgetmantsd xmm30{k7},xmm29,xmm28,{sae},0x7b                  }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x27, 0x31, 0x7b                               }, { vgetmantsd xmm30{k7},xmm29,QWORD rcx,0x7b                  }
+testcase	{ 0x62, 0x23, 0x95, 0x07, 0x27, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vgetmantsd xmm30{k7},xmm29,QWORD rax+r14*8+0x123,0x7b      }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x27, 0x72, 0x7f, 0x7b                         }, { vgetmantsd xmm30{k7},xmm29,QWORD rdx+0x3f8,0x7b            }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x27, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vgetmantsd xmm30{k7},xmm29,QWORD rdx+0x400,0x7b            }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x27, 0x72, 0x80, 0x7b                         }, { vgetmantsd xmm30{k7},xmm29,QWORD rdx-0x400,0x7b            }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x27, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vgetmantsd xmm30{k7},xmm29,QWORD rdx-0x408,0x7b            }
+testcase	{ 0x62, 0x03, 0x15, 0x07, 0x27, 0xf4, 0xab                               }, { vgetmantss xmm30{k7},xmm29,xmm28,0xab                        }
+testcase	{ 0x62, 0x03, 0x15, 0x87, 0x27, 0xf4, 0xab                               }, { vgetmantss xmm30{k7}{z},xmm29,xmm28,0xab                     }
+testcase	{ 0x62, 0x03, 0x15, 0x17, 0x27, 0xf4, 0xab                               }, { vgetmantss xmm30{k7},xmm29,xmm28,{sae},0xab                  }
+testcase	{ 0x62, 0x03, 0x15, 0x07, 0x27, 0xf4, 0x7b                               }, { vgetmantss xmm30{k7},xmm29,xmm28,0x7b                        }
+testcase	{ 0x62, 0x03, 0x15, 0x17, 0x27, 0xf4, 0x7b                               }, { vgetmantss xmm30{k7},xmm29,xmm28,{sae},0x7b                  }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x27, 0x31, 0x7b                               }, { vgetmantss xmm30{k7},xmm29,DWORD rcx,0x7b                  }
+testcase	{ 0x62, 0x23, 0x15, 0x07, 0x27, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vgetmantss xmm30{k7},xmm29,DWORD rax+r14*8+0x123,0x7b      }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x27, 0x72, 0x7f, 0x7b                         }, { vgetmantss xmm30{k7},xmm29,DWORD rdx+0x1fc,0x7b            }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x27, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vgetmantss xmm30{k7},xmm29,DWORD rdx+0x200,0x7b            }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x27, 0x72, 0x80, 0x7b                         }, { vgetmantss xmm30{k7},xmm29,DWORD rdx-0x200,0x7b            }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x27, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vgetmantss xmm30{k7},xmm29,DWORD rdx-0x204,0x7b            }
+testcase	{ 0x62, 0x03, 0x15, 0x47, 0x18, 0xf4, 0xab                               }, { vinsertf32x4 zmm30{k7},zmm29,xmm28,0xab                      }
+testcase	{ 0x62, 0x03, 0x15, 0xc7, 0x18, 0xf4, 0xab                               }, { vinsertf32x4 zmm30{k7}{z},zmm29,xmm28,0xab                   }
+testcase	{ 0x62, 0x03, 0x15, 0x47, 0x18, 0xf4, 0x7b                               }, { vinsertf32x4 zmm30{k7},zmm29,xmm28,0x7b                      }
+testcase	{ 0x62, 0x63, 0x15, 0x47, 0x18, 0x31, 0x7b                               }, { vinsertf32x4 zmm30{k7},zmm29,OWORD rcx,0x7b                }
+testcase	{ 0x62, 0x23, 0x15, 0x47, 0x18, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vinsertf32x4 zmm30{k7},zmm29,OWORD rax+r14*8+0x123,0x7b    }
+testcase	{ 0x62, 0x63, 0x15, 0x47, 0x18, 0x72, 0x7f, 0x7b                         }, { vinsertf32x4 zmm30{k7},zmm29,OWORD rdx+0x7f0,0x7b          }
+testcase	{ 0x62, 0x63, 0x15, 0x47, 0x18, 0xb2, 0x00, 0x08, 0x00, 0x00, 0x7b       }, { vinsertf32x4 zmm30{k7},zmm29,OWORD rdx+0x800,0x7b          }
+testcase	{ 0x62, 0x63, 0x15, 0x47, 0x18, 0x72, 0x80, 0x7b                         }, { vinsertf32x4 zmm30{k7},zmm29,OWORD rdx-0x800,0x7b          }
+testcase	{ 0x62, 0x63, 0x15, 0x47, 0x18, 0xb2, 0xf0, 0xf7, 0xff, 0xff, 0x7b       }, { vinsertf32x4 zmm30{k7},zmm29,OWORD rdx-0x810,0x7b          }
+testcase	{ 0x62, 0x03, 0x95, 0x47, 0x1a, 0xf4, 0xab                               }, { vinsertf64x4 zmm30{k7},zmm29,ymm28,0xab                      }
+testcase	{ 0x62, 0x03, 0x95, 0xc7, 0x1a, 0xf4, 0xab                               }, { vinsertf64x4 zmm30{k7}{z},zmm29,ymm28,0xab                   }
+testcase	{ 0x62, 0x03, 0x95, 0x47, 0x1a, 0xf4, 0x7b                               }, { vinsertf64x4 zmm30{k7},zmm29,ymm28,0x7b                      }
+testcase	{ 0x62, 0x63, 0x95, 0x47, 0x1a, 0x31, 0x7b                               }, { vinsertf64x4 zmm30{k7},zmm29,YWORD rcx,0x7b                }
+testcase	{ 0x62, 0x23, 0x95, 0x47, 0x1a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vinsertf64x4 zmm30{k7},zmm29,YWORD rax+r14*8+0x123,0x7b    }
+testcase	{ 0x62, 0x63, 0x95, 0x47, 0x1a, 0x72, 0x7f, 0x7b                         }, { vinsertf64x4 zmm30{k7},zmm29,YWORD rdx+0xfe0,0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x47, 0x1a, 0xb2, 0x00, 0x10, 0x00, 0x00, 0x7b       }, { vinsertf64x4 zmm30{k7},zmm29,YWORD rdx+0x1000,0x7b         }
+testcase	{ 0x62, 0x63, 0x95, 0x47, 0x1a, 0x72, 0x80, 0x7b                         }, { vinsertf64x4 zmm30{k7},zmm29,YWORD rdx-0x1000,0x7b         }
+testcase	{ 0x62, 0x63, 0x95, 0x47, 0x1a, 0xb2, 0xe0, 0xef, 0xff, 0xff, 0x7b       }, { vinsertf64x4 zmm30{k7},zmm29,YWORD rdx-0x1020,0x7b         }
+testcase	{ 0x62, 0x03, 0x15, 0x47, 0x38, 0xf4, 0xab                               }, { vinserti32x4 zmm30{k7},zmm29,xmm28,0xab                      }
+testcase	{ 0x62, 0x03, 0x15, 0xc7, 0x38, 0xf4, 0xab                               }, { vinserti32x4 zmm30{k7}{z},zmm29,xmm28,0xab                   }
+testcase	{ 0x62, 0x03, 0x15, 0x47, 0x38, 0xf4, 0x7b                               }, { vinserti32x4 zmm30{k7},zmm29,xmm28,0x7b                      }
+testcase	{ 0x62, 0x63, 0x15, 0x47, 0x38, 0x31, 0x7b                               }, { vinserti32x4 zmm30{k7},zmm29,OWORD rcx,0x7b                }
+testcase	{ 0x62, 0x23, 0x15, 0x47, 0x38, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vinserti32x4 zmm30{k7},zmm29,OWORD rax+r14*8+0x123,0x7b    }
+testcase	{ 0x62, 0x63, 0x15, 0x47, 0x38, 0x72, 0x7f, 0x7b                         }, { vinserti32x4 zmm30{k7},zmm29,OWORD rdx+0x7f0,0x7b          }
+testcase	{ 0x62, 0x63, 0x15, 0x47, 0x38, 0xb2, 0x00, 0x08, 0x00, 0x00, 0x7b       }, { vinserti32x4 zmm30{k7},zmm29,OWORD rdx+0x800,0x7b          }
+testcase	{ 0x62, 0x63, 0x15, 0x47, 0x38, 0x72, 0x80, 0x7b                         }, { vinserti32x4 zmm30{k7},zmm29,OWORD rdx-0x800,0x7b          }
+testcase	{ 0x62, 0x63, 0x15, 0x47, 0x38, 0xb2, 0xf0, 0xf7, 0xff, 0xff, 0x7b       }, { vinserti32x4 zmm30{k7},zmm29,OWORD rdx-0x810,0x7b          }
+testcase	{ 0x62, 0x03, 0x95, 0x47, 0x3a, 0xf4, 0xab                               }, { vinserti64x4 zmm30{k7},zmm29,ymm28,0xab                      }
+testcase	{ 0x62, 0x03, 0x95, 0xc7, 0x3a, 0xf4, 0xab                               }, { vinserti64x4 zmm30{k7}{z},zmm29,ymm28,0xab                   }
+testcase	{ 0x62, 0x03, 0x95, 0x47, 0x3a, 0xf4, 0x7b                               }, { vinserti64x4 zmm30{k7},zmm29,ymm28,0x7b                      }
+testcase	{ 0x62, 0x63, 0x95, 0x47, 0x3a, 0x31, 0x7b                               }, { vinserti64x4 zmm30{k7},zmm29,YWORD rcx,0x7b                }
+testcase	{ 0x62, 0x23, 0x95, 0x47, 0x3a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vinserti64x4 zmm30{k7},zmm29,YWORD rax+r14*8+0x123,0x7b    }
+testcase	{ 0x62, 0x63, 0x95, 0x47, 0x3a, 0x72, 0x7f, 0x7b                         }, { vinserti64x4 zmm30{k7},zmm29,YWORD rdx+0xfe0,0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x47, 0x3a, 0xb2, 0x00, 0x10, 0x00, 0x00, 0x7b       }, { vinserti64x4 zmm30{k7},zmm29,YWORD rdx+0x1000,0x7b         }
+testcase	{ 0x62, 0x63, 0x95, 0x47, 0x3a, 0x72, 0x80, 0x7b                         }, { vinserti64x4 zmm30{k7},zmm29,YWORD rdx-0x1000,0x7b         }
+testcase	{ 0x62, 0x63, 0x95, 0x47, 0x3a, 0xb2, 0xe0, 0xef, 0xff, 0xff, 0x7b       }, { vinserti64x4 zmm30{k7},zmm29,YWORD rdx-0x1020,0x7b         }
+testcase	{ 0x62, 0x03, 0x15, 0x00, 0x21, 0xf4, 0xab                               }, { vinsertps xmm30,xmm29,xmm28,0xab                             }
+testcase	{ 0x62, 0x03, 0x15, 0x00, 0x21, 0xf4, 0x7b                               }, { vinsertps xmm30,xmm29,xmm28,0x7b                             }
+testcase	{ 0x62, 0x63, 0x15, 0x00, 0x21, 0x31, 0x7b                               }, { vinsertps xmm30,xmm29,DWORD rcx,0x7b                       }
+testcase	{ 0x62, 0x23, 0x15, 0x00, 0x21, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vinsertps xmm30,xmm29,DWORD rax+r14*8+0x123,0x7b           }
+testcase	{ 0x62, 0x63, 0x15, 0x00, 0x21, 0x72, 0x7f, 0x7b                         }, { vinsertps xmm30,xmm29,DWORD rdx+0x1fc,0x7b                 }
+testcase	{ 0x62, 0x63, 0x15, 0x00, 0x21, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vinsertps xmm30,xmm29,DWORD rdx+0x200,0x7b                 }
+testcase	{ 0x62, 0x63, 0x15, 0x00, 0x21, 0x72, 0x80, 0x7b                         }, { vinsertps xmm30,xmm29,DWORD rdx-0x200,0x7b                 }
+testcase	{ 0x62, 0x63, 0x15, 0x00, 0x21, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vinsertps xmm30,xmm29,DWORD rdx-0x204,0x7b                 }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0x5f, 0xf4                                     }, { vmaxpd zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0x5f, 0xf4                                     }, { vmaxpd zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0x5f, 0xf4                                     }, { vmaxpd zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x95, 0x10, 0x5f, 0xf4                                     }, { vmaxpd zmm30,zmm29,zmm28,{sae}                               }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5f, 0x31                                     }, { vmaxpd zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0x5f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmaxpd zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5f, 0x31                                     }, { vmaxpd zmm30,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5f, 0x72, 0x7f                               }, { vmaxpd zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmaxpd zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5f, 0x72, 0x80                               }, { vmaxpd zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmaxpd zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5f, 0x72, 0x7f                               }, { vmaxpd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5f, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmaxpd zmm30,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5f, 0x72, 0x80                               }, { vmaxpd zmm30,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5f, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmaxpd zmm30,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x01, 0x14, 0x40, 0x5f, 0xf4                                     }, { vmaxps zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x14, 0x47, 0x5f, 0xf4                                     }, { vmaxps zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x14, 0xc7, 0x5f, 0xf4                                     }, { vmaxps zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x14, 0x10, 0x5f, 0xf4                                     }, { vmaxps zmm30,zmm29,zmm28,{sae}                               }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5f, 0x31                                     }, { vmaxps zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x14, 0x40, 0x5f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmaxps zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5f, 0x31                                     }, { vmaxps zmm30,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5f, 0x72, 0x7f                               }, { vmaxps zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmaxps zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5f, 0x72, 0x80                               }, { vmaxps zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmaxps zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5f, 0x72, 0x7f                               }, { vmaxps zmm30,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5f, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vmaxps zmm30,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5f, 0x72, 0x80                               }, { vmaxps zmm30,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5f, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vmaxps zmm30,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x01, 0x97, 0x07, 0x5f, 0xf4                                     }, { vmaxsd xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x97, 0x87, 0x5f, 0xf4                                     }, { vmaxsd xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x97, 0x17, 0x5f, 0xf4                                     }, { vmaxsd xmm30{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5f, 0x31                                     }, { vmaxsd xmm30{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x97, 0x07, 0x5f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmaxsd xmm30{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5f, 0x72, 0x7f                               }, { vmaxsd xmm30{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5f, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmaxsd xmm30{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5f, 0x72, 0x80                               }, { vmaxsd xmm30{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5f, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmaxsd xmm30{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x01, 0x16, 0x07, 0x5f, 0xf4                                     }, { vmaxss xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x16, 0x87, 0x5f, 0xf4                                     }, { vmaxss xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x16, 0x17, 0x5f, 0xf4                                     }, { vmaxss xmm30{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5f, 0x31                                     }, { vmaxss xmm30{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x16, 0x07, 0x5f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmaxss xmm30{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5f, 0x72, 0x7f                               }, { vmaxss xmm30{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5f, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vmaxss xmm30{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5f, 0x72, 0x80                               }, { vmaxss xmm30{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5f, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vmaxss xmm30{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0x5d, 0xf4                                     }, { vminpd zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0x5d, 0xf4                                     }, { vminpd zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0x5d, 0xf4                                     }, { vminpd zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x95, 0x10, 0x5d, 0xf4                                     }, { vminpd zmm30,zmm29,zmm28,{sae}                               }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5d, 0x31                                     }, { vminpd zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0x5d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vminpd zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5d, 0x31                                     }, { vminpd zmm30,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5d, 0x72, 0x7f                               }, { vminpd zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5d, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vminpd zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5d, 0x72, 0x80                               }, { vminpd zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5d, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vminpd zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5d, 0x72, 0x7f                               }, { vminpd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5d, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vminpd zmm30,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5d, 0x72, 0x80                               }, { vminpd zmm30,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5d, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vminpd zmm30,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x01, 0x14, 0x40, 0x5d, 0xf4                                     }, { vminps zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x14, 0x47, 0x5d, 0xf4                                     }, { vminps zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x14, 0xc7, 0x5d, 0xf4                                     }, { vminps zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x14, 0x10, 0x5d, 0xf4                                     }, { vminps zmm30,zmm29,zmm28,{sae}                               }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5d, 0x31                                     }, { vminps zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x14, 0x40, 0x5d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vminps zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5d, 0x31                                     }, { vminps zmm30,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5d, 0x72, 0x7f                               }, { vminps zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5d, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vminps zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5d, 0x72, 0x80                               }, { vminps zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5d, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vminps zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5d, 0x72, 0x7f                               }, { vminps zmm30,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5d, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vminps zmm30,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5d, 0x72, 0x80                               }, { vminps zmm30,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5d, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vminps zmm30,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x01, 0x97, 0x07, 0x5d, 0xf4                                     }, { vminsd xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x97, 0x87, 0x5d, 0xf4                                     }, { vminsd xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x97, 0x17, 0x5d, 0xf4                                     }, { vminsd xmm30{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5d, 0x31                                     }, { vminsd xmm30{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x97, 0x07, 0x5d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vminsd xmm30{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5d, 0x72, 0x7f                               }, { vminsd xmm30{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5d, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vminsd xmm30{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5d, 0x72, 0x80                               }, { vminsd xmm30{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5d, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vminsd xmm30{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x01, 0x16, 0x07, 0x5d, 0xf4                                     }, { vminss xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x16, 0x87, 0x5d, 0xf4                                     }, { vminss xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x16, 0x17, 0x5d, 0xf4                                     }, { vminss xmm30{k7},xmm29,xmm28,{sae}                           }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5d, 0x31                                     }, { vminss xmm30{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x16, 0x07, 0x5d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vminss xmm30{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5d, 0x72, 0x7f                               }, { vminss xmm30{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5d, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vminss xmm30{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5d, 0x72, 0x80                               }, { vminss xmm30{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5d, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vminss xmm30{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x01, 0xfd, 0x48, 0x28, 0xf5                                     }, { vmovapd zmm30,zmm29                                          }
+testcase	{ 0x62, 0x01, 0xfd, 0x4f, 0x28, 0xf5                                     }, { vmovapd zmm30{k7},zmm29                                      }
+testcase	{ 0x62, 0x01, 0xfd, 0xcf, 0x28, 0xf5                                     }, { vmovapd zmm30{k7}{z},zmm29                                   }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x28, 0x31                                     }, { vmovapd zmm30,ZWORD rcx                                    }
+testcase	{ 0x62, 0x21, 0xfd, 0x48, 0x28, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovapd zmm30,ZWORD rax+r14*8+0x123                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x28, 0x72, 0x7f                               }, { vmovapd zmm30,ZWORD rdx+0x1fc0                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x28, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovapd zmm30,ZWORD rdx+0x2000                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x28, 0x72, 0x80                               }, { vmovapd zmm30,ZWORD rdx-0x2000                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x28, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovapd zmm30,ZWORD rdx-0x2040                             }
+testcase	{ 0x62, 0x01, 0x7c, 0x48, 0x28, 0xf5                                     }, { vmovaps zmm30,zmm29                                          }
+testcase	{ 0x62, 0x01, 0x7c, 0x4f, 0x28, 0xf5                                     }, { vmovaps zmm30{k7},zmm29                                      }
+testcase	{ 0x62, 0x01, 0x7c, 0xcf, 0x28, 0xf5                                     }, { vmovaps zmm30{k7}{z},zmm29                                   }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x28, 0x31                                     }, { vmovaps zmm30,ZWORD rcx                                    }
+testcase	{ 0x62, 0x21, 0x7c, 0x48, 0x28, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovaps zmm30,ZWORD rax+r14*8+0x123                        }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x28, 0x72, 0x7f                               }, { vmovaps zmm30,ZWORD rdx+0x1fc0                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x28, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovaps zmm30,ZWORD rdx+0x2000                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x28, 0x72, 0x80                               }, { vmovaps zmm30,ZWORD rdx-0x2000                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x28, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovaps zmm30,ZWORD rdx-0x2040                             }
+testcase	{ 0x62, 0x61, 0x7d, 0x08, 0x6e, 0xf0                                     }, { vmovd  xmm30,eax                                             }
+testcase	{ 0x62, 0x61, 0x7d, 0x08, 0x6e, 0xf5                                     }, { vmovd  xmm30,ebp                                             }
+testcase	{ 0x62, 0x41, 0x7d, 0x08, 0x6e, 0xf5                                     }, { vmovd  xmm30,r13d                                            }
+testcase	{ 0x62, 0x61, 0x7d, 0x08, 0x6e, 0x31                                     }, { vmovd  xmm30,DWORD rcx                                     }
+testcase	{ 0x62, 0x21, 0x7d, 0x08, 0x6e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovd  xmm30,DWORD rax+r14*8+0x123                         }
+testcase	{ 0x62, 0x61, 0x7d, 0x08, 0x6e, 0x72, 0x7f                               }, { vmovd  xmm30,DWORD rdx+0x1fc                               }
+testcase	{ 0x62, 0x61, 0x7d, 0x08, 0x6e, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vmovd  xmm30,DWORD rdx+0x200                               }
+testcase	{ 0x62, 0x61, 0x7d, 0x08, 0x6e, 0x72, 0x80                               }, { vmovd  xmm30,DWORD rdx-0x200                               }
+testcase	{ 0x62, 0x61, 0x7d, 0x08, 0x6e, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vmovd  xmm30,DWORD rdx-0x204                               }
+testcase	{ 0x62, 0x61, 0x7d, 0x08, 0x7e, 0x31                                     }, { vmovd  DWORD rcx,xmm30                                     }
+testcase	{ 0x62, 0x21, 0x7d, 0x08, 0x7e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovd  DWORD rax+r14*8+0x123,xmm30                         }
+testcase	{ 0x62, 0x61, 0x7d, 0x08, 0x7e, 0x72, 0x7f                               }, { vmovd  DWORD rdx+0x1fc,xmm30                               }
+testcase	{ 0x62, 0x61, 0x7d, 0x08, 0x7e, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vmovd  DWORD rdx+0x200,xmm30                               }
+testcase	{ 0x62, 0x61, 0x7d, 0x08, 0x7e, 0x72, 0x80                               }, { vmovd  DWORD rdx-0x200,xmm30                               }
+testcase	{ 0x62, 0x61, 0x7d, 0x08, 0x7e, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vmovd  DWORD rdx-0x204,xmm30                               }
+testcase	{ 0x62, 0x01, 0xff, 0x48, 0x12, 0xf5                                     }, { vmovddup zmm30,zmm29                                         }
+testcase	{ 0x62, 0x01, 0xff, 0x4f, 0x12, 0xf5                                     }, { vmovddup zmm30{k7},zmm29                                     }
+testcase	{ 0x62, 0x01, 0xff, 0xcf, 0x12, 0xf5                                     }, { vmovddup zmm30{k7}{z},zmm29                                  }
+testcase	{ 0x62, 0x61, 0xff, 0x48, 0x12, 0x31                                     }, { vmovddup zmm30,ZWORD rcx                                   }
+testcase	{ 0x62, 0x21, 0xff, 0x48, 0x12, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovddup zmm30,ZWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0x61, 0xff, 0x48, 0x12, 0x72, 0x7f                               }, { vmovddup zmm30,ZWORD rdx+0x1fc0                            }
+testcase	{ 0x62, 0x61, 0xff, 0x48, 0x12, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovddup zmm30,ZWORD rdx+0x2000                            }
+testcase	{ 0x62, 0x61, 0xff, 0x48, 0x12, 0x72, 0x80                               }, { vmovddup zmm30,ZWORD rdx-0x2000                            }
+testcase	{ 0x62, 0x61, 0xff, 0x48, 0x12, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovddup zmm30,ZWORD rdx-0x2040                            }
+testcase	{ 0x62, 0x01, 0x7d, 0x48, 0x6f, 0xf5                                     }, { vmovdqa32 zmm30,zmm29                                        }
+testcase	{ 0x62, 0x01, 0x7d, 0x4f, 0x6f, 0xf5                                     }, { vmovdqa32 zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x01, 0x7d, 0xcf, 0x6f, 0xf5                                     }, { vmovdqa32 zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x6f, 0x31                                     }, { vmovdqa32 zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x21, 0x7d, 0x48, 0x6f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovdqa32 zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x6f, 0x72, 0x7f                               }, { vmovdqa32 zmm30,ZWORD rdx+0x1fc0                           }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x6f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovdqa32 zmm30,ZWORD rdx+0x2000                           }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x6f, 0x72, 0x80                               }, { vmovdqa32 zmm30,ZWORD rdx-0x2000                           }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x6f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovdqa32 zmm30,ZWORD rdx-0x2040                           }
+testcase	{ 0x62, 0x01, 0xfd, 0x48, 0x6f, 0xf5                                     }, { vmovdqa64 zmm30,zmm29                                        }
+testcase	{ 0x62, 0x01, 0xfd, 0x4f, 0x6f, 0xf5                                     }, { vmovdqa64 zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x01, 0xfd, 0xcf, 0x6f, 0xf5                                     }, { vmovdqa64 zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x6f, 0x31                                     }, { vmovdqa64 zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x21, 0xfd, 0x48, 0x6f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovdqa64 zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x6f, 0x72, 0x7f                               }, { vmovdqa64 zmm30,ZWORD rdx+0x1fc0                           }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x6f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovdqa64 zmm30,ZWORD rdx+0x2000                           }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x6f, 0x72, 0x80                               }, { vmovdqa64 zmm30,ZWORD rdx-0x2000                           }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x6f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovdqa64 zmm30,ZWORD rdx-0x2040                           }
+testcase	{ 0x62, 0x01, 0x7e, 0x48, 0x6f, 0xf5                                     }, { vmovdqu32 zmm30,zmm29                                        }
+testcase	{ 0x62, 0x01, 0x7e, 0x4f, 0x6f, 0xf5                                     }, { vmovdqu32 zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x01, 0x7e, 0xcf, 0x6f, 0xf5                                     }, { vmovdqu32 zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x6f, 0x31                                     }, { vmovdqu32 zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x21, 0x7e, 0x48, 0x6f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovdqu32 zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x6f, 0x72, 0x7f                               }, { vmovdqu32 zmm30,ZWORD rdx+0x1fc0                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x6f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovdqu32 zmm30,ZWORD rdx+0x2000                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x6f, 0x72, 0x80                               }, { vmovdqu32 zmm30,ZWORD rdx-0x2000                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x6f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovdqu32 zmm30,ZWORD rdx-0x2040                           }
+testcase	{ 0x62, 0x01, 0xfe, 0x48, 0x6f, 0xf5                                     }, { vmovdqu64 zmm30,zmm29                                        }
+testcase	{ 0x62, 0x01, 0xfe, 0x4f, 0x6f, 0xf5                                     }, { vmovdqu64 zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x01, 0xfe, 0xcf, 0x6f, 0xf5                                     }, { vmovdqu64 zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x61, 0xfe, 0x48, 0x6f, 0x31                                     }, { vmovdqu64 zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x21, 0xfe, 0x48, 0x6f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovdqu64 zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x61, 0xfe, 0x48, 0x6f, 0x72, 0x7f                               }, { vmovdqu64 zmm30,ZWORD rdx+0x1fc0                           }
+testcase	{ 0x62, 0x61, 0xfe, 0x48, 0x6f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovdqu64 zmm30,ZWORD rdx+0x2000                           }
+testcase	{ 0x62, 0x61, 0xfe, 0x48, 0x6f, 0x72, 0x80                               }, { vmovdqu64 zmm30,ZWORD rdx-0x2000                           }
+testcase	{ 0x62, 0x61, 0xfe, 0x48, 0x6f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovdqu64 zmm30,ZWORD rdx-0x2040                           }
+testcase	{ 0x62, 0x01, 0x14, 0x00, 0x12, 0xf4                                     }, { vmovhlps xmm30,xmm29,xmm28                                   }
+testcase	{ 0x62, 0x61, 0x8d, 0x00, 0x16, 0x29                                     }, { vmovhpd xmm29,xmm30,QWORD rcx                              }
+testcase	{ 0x62, 0x21, 0x8d, 0x00, 0x16, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovhpd xmm29,xmm30,QWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x61, 0x8d, 0x00, 0x16, 0x6a, 0x7f                               }, { vmovhpd xmm29,xmm30,QWORD rdx+0x3f8                        }
+testcase	{ 0x62, 0x61, 0x8d, 0x00, 0x16, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vmovhpd xmm29,xmm30,QWORD rdx+0x400                        }
+testcase	{ 0x62, 0x61, 0x8d, 0x00, 0x16, 0x6a, 0x80                               }, { vmovhpd xmm29,xmm30,QWORD rdx-0x400                        }
+testcase	{ 0x62, 0x61, 0x8d, 0x00, 0x16, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vmovhpd xmm29,xmm30,QWORD rdx-0x408                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x17, 0x31                                     }, { vmovhpd QWORD rcx,xmm30                                    }
+testcase	{ 0x62, 0x21, 0xfd, 0x08, 0x17, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovhpd QWORD rax+r14*8+0x123,xmm30                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x17, 0x72, 0x7f                               }, { vmovhpd QWORD rdx+0x3f8,xmm30                              }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x17, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmovhpd QWORD rdx+0x400,xmm30                              }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x17, 0x72, 0x80                               }, { vmovhpd QWORD rdx-0x400,xmm30                              }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x17, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmovhpd QWORD rdx-0x408,xmm30                              }
+testcase	{ 0x62, 0x61, 0x0c, 0x00, 0x16, 0x29                                     }, { vmovhps xmm29,xmm30,QWORD rcx                              }
+testcase	{ 0x62, 0x21, 0x0c, 0x00, 0x16, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovhps xmm29,xmm30,QWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x61, 0x0c, 0x00, 0x16, 0x6a, 0x7f                               }, { vmovhps xmm29,xmm30,QWORD rdx+0x3f8                        }
+testcase	{ 0x62, 0x61, 0x0c, 0x00, 0x16, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vmovhps xmm29,xmm30,QWORD rdx+0x400                        }
+testcase	{ 0x62, 0x61, 0x0c, 0x00, 0x16, 0x6a, 0x80                               }, { vmovhps xmm29,xmm30,QWORD rdx-0x400                        }
+testcase	{ 0x62, 0x61, 0x0c, 0x00, 0x16, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vmovhps xmm29,xmm30,QWORD rdx-0x408                        }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x17, 0x31                                     }, { vmovhps QWORD rcx,xmm30                                    }
+testcase	{ 0x62, 0x21, 0x7c, 0x08, 0x17, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovhps QWORD rax+r14*8+0x123,xmm30                        }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x17, 0x72, 0x7f                               }, { vmovhps QWORD rdx+0x3f8,xmm30                              }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x17, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmovhps QWORD rdx+0x400,xmm30                              }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x17, 0x72, 0x80                               }, { vmovhps QWORD rdx-0x400,xmm30                              }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x17, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmovhps QWORD rdx-0x408,xmm30                              }
+testcase	{ 0x62, 0x01, 0x14, 0x00, 0x16, 0xf4                                     }, { vmovlhps xmm30,xmm29,xmm28                                   }
+testcase	{ 0x62, 0x61, 0x8d, 0x00, 0x12, 0x29                                     }, { vmovlpd xmm29,xmm30,QWORD rcx                              }
+testcase	{ 0x62, 0x21, 0x8d, 0x00, 0x12, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovlpd xmm29,xmm30,QWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x61, 0x8d, 0x00, 0x12, 0x6a, 0x7f                               }, { vmovlpd xmm29,xmm30,QWORD rdx+0x3f8                        }
+testcase	{ 0x62, 0x61, 0x8d, 0x00, 0x12, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vmovlpd xmm29,xmm30,QWORD rdx+0x400                        }
+testcase	{ 0x62, 0x61, 0x8d, 0x00, 0x12, 0x6a, 0x80                               }, { vmovlpd xmm29,xmm30,QWORD rdx-0x400                        }
+testcase	{ 0x62, 0x61, 0x8d, 0x00, 0x12, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vmovlpd xmm29,xmm30,QWORD rdx-0x408                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x13, 0x31                                     }, { vmovlpd QWORD rcx,xmm30                                    }
+testcase	{ 0x62, 0x21, 0xfd, 0x08, 0x13, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovlpd QWORD rax+r14*8+0x123,xmm30                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x13, 0x72, 0x7f                               }, { vmovlpd QWORD rdx+0x3f8,xmm30                              }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x13, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmovlpd QWORD rdx+0x400,xmm30                              }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x13, 0x72, 0x80                               }, { vmovlpd QWORD rdx-0x400,xmm30                              }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x13, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmovlpd QWORD rdx-0x408,xmm30                              }
+testcase	{ 0x62, 0x61, 0x0c, 0x00, 0x12, 0x29                                     }, { vmovlps xmm29,xmm30,QWORD rcx                              }
+testcase	{ 0x62, 0x21, 0x0c, 0x00, 0x12, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovlps xmm29,xmm30,QWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x61, 0x0c, 0x00, 0x12, 0x6a, 0x7f                               }, { vmovlps xmm29,xmm30,QWORD rdx+0x3f8                        }
+testcase	{ 0x62, 0x61, 0x0c, 0x00, 0x12, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vmovlps xmm29,xmm30,QWORD rdx+0x400                        }
+testcase	{ 0x62, 0x61, 0x0c, 0x00, 0x12, 0x6a, 0x80                               }, { vmovlps xmm29,xmm30,QWORD rdx-0x400                        }
+testcase	{ 0x62, 0x61, 0x0c, 0x00, 0x12, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vmovlps xmm29,xmm30,QWORD rdx-0x408                        }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x13, 0x31                                     }, { vmovlps QWORD rcx,xmm30                                    }
+testcase	{ 0x62, 0x21, 0x7c, 0x08, 0x13, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovlps QWORD rax+r14*8+0x123,xmm30                        }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x13, 0x72, 0x7f                               }, { vmovlps QWORD rdx+0x3f8,xmm30                              }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x13, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmovlps QWORD rdx+0x400,xmm30                              }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x13, 0x72, 0x80                               }, { vmovlps QWORD rdx-0x400,xmm30                              }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x13, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmovlps QWORD rdx-0x408,xmm30                              }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0xe7, 0x31                                     }, { vmovntdq ZWORD rcx,zmm30                                   }
+testcase	{ 0x62, 0x21, 0x7d, 0x48, 0xe7, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovntdq ZWORD rax+r14*8+0x123,zmm30                       }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0xe7, 0x72, 0x7f                               }, { vmovntdq ZWORD rdx+0x1fc0,zmm30                            }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0xe7, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovntdq ZWORD rdx+0x2000,zmm30                            }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0xe7, 0x72, 0x80                               }, { vmovntdq ZWORD rdx-0x2000,zmm30                            }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0xe7, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovntdq ZWORD rdx-0x2040,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x2a, 0x31                                     }, { vmovntdqa zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x2a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovntdqa zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x2a, 0x72, 0x7f                               }, { vmovntdqa zmm30,ZWORD rdx+0x1fc0                           }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x2a, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovntdqa zmm30,ZWORD rdx+0x2000                           }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x2a, 0x72, 0x80                               }, { vmovntdqa zmm30,ZWORD rdx-0x2000                           }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x2a, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovntdqa zmm30,ZWORD rdx-0x2040                           }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x2b, 0x31                                     }, { vmovntpd ZWORD rcx,zmm30                                   }
+testcase	{ 0x62, 0x21, 0xfd, 0x48, 0x2b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovntpd ZWORD rax+r14*8+0x123,zmm30                       }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x2b, 0x72, 0x7f                               }, { vmovntpd ZWORD rdx+0x1fc0,zmm30                            }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x2b, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovntpd ZWORD rdx+0x2000,zmm30                            }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x2b, 0x72, 0x80                               }, { vmovntpd ZWORD rdx-0x2000,zmm30                            }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x2b, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovntpd ZWORD rdx-0x2040,zmm30                            }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x2b, 0x31                                     }, { vmovntps ZWORD rcx,zmm30                                   }
+testcase	{ 0x62, 0x21, 0x7c, 0x48, 0x2b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovntps ZWORD rax+r14*8+0x123,zmm30                       }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x2b, 0x72, 0x7f                               }, { vmovntps ZWORD rdx+0x1fc0,zmm30                            }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x2b, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovntps ZWORD rdx+0x2000,zmm30                            }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x2b, 0x72, 0x80                               }, { vmovntps ZWORD rdx-0x2000,zmm30                            }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x2b, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovntps ZWORD rdx-0x2040,zmm30                            }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x6e, 0xf0                                     }, { vmovq  xmm30,rax                                             }
+testcase	{ 0x62, 0x41, 0xfd, 0x08, 0x6e, 0xf0                                     }, { vmovq  xmm30,r8                                              }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x6e, 0x31                                     }, { vmovq  xmm30,QWORD rcx                                     }
+testcase	{ 0x62, 0x21, 0xfd, 0x08, 0x6e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovq  xmm30,QWORD rax+r14*8+0x123                         }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x6e, 0x72, 0x7f                               }, { vmovq  xmm30,QWORD rdx+0x3f8                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x6e, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmovq  xmm30,QWORD rdx+0x400                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x6e, 0x72, 0x80                               }, { vmovq  xmm30,QWORD rdx-0x400                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x6e, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmovq  xmm30,QWORD rdx-0x408                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x7e, 0x31                                     }, { vmovq  QWORD rcx,xmm30                                     }
+testcase	{ 0x62, 0x21, 0xfd, 0x08, 0x7e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovq  QWORD rax+r14*8+0x123,xmm30                         }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x7e, 0x72, 0x7f                               }, { vmovq  QWORD rdx+0x3f8,xmm30                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x7e, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmovq  QWORD rdx+0x400,xmm30                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x7e, 0x72, 0x80                               }, { vmovq  QWORD rdx-0x400,xmm30                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x7e, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmovq  QWORD rdx-0x408,xmm30                               }
+testcase	{ 0x62, 0x01, 0xfe, 0x08, 0x7e, 0xf5                                     }, { vmovq  xmm30,xmm29                                           }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x6e, 0x31                                     }, { vmovq  xmm30,QWORD rcx                                     }
+testcase	{ 0x62, 0x21, 0xfd, 0x08, 0x6e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovq  xmm30,QWORD rax+r14*8+0x123                         }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x6e, 0x72, 0x7f                               }, { vmovq  xmm30,QWORD rdx+0x3f8                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x6e, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmovq  xmm30,QWORD rdx+0x400                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x6e, 0x72, 0x80                               }, { vmovq  xmm30,QWORD rdx-0x400                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x6e, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmovq  xmm30,QWORD rdx-0x408                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x7e, 0x29                                     }, { vmovq  QWORD rcx,xmm29                                     }
+testcase	{ 0x62, 0x21, 0xfd, 0x08, 0x7e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovq  QWORD rax+r14*8+0x123,xmm29                         }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x7e, 0x6a, 0x7f                               }, { vmovq  QWORD rdx+0x3f8,xmm29                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x7e, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vmovq  QWORD rdx+0x400,xmm29                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x7e, 0x6a, 0x80                               }, { vmovq  QWORD rdx-0x400,xmm29                               }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x7e, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vmovq  QWORD rdx-0x408,xmm29                               }
+testcase	{ 0x62, 0x61, 0xff, 0x0f, 0x10, 0x31                                     }, { vmovsd xmm30{k7},QWORD rcx                                 }
+testcase	{ 0x62, 0x61, 0xff, 0x8f, 0x10, 0x31                                     }, { vmovsd xmm30{k7}{z},QWORD rcx                              }
+testcase	{ 0x62, 0x21, 0xff, 0x0f, 0x10, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovsd xmm30{k7},QWORD rax+r14*8+0x123                     }
+testcase	{ 0x62, 0x61, 0xff, 0x0f, 0x10, 0x72, 0x7f                               }, { vmovsd xmm30{k7},QWORD rdx+0x3f8                           }
+testcase	{ 0x62, 0x61, 0xff, 0x0f, 0x10, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmovsd xmm30{k7},QWORD rdx+0x400                           }
+testcase	{ 0x62, 0x61, 0xff, 0x0f, 0x10, 0x72, 0x80                               }, { vmovsd xmm30{k7},QWORD rdx-0x400                           }
+testcase	{ 0x62, 0x61, 0xff, 0x0f, 0x10, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmovsd xmm30{k7},QWORD rdx-0x408                           }
+testcase	{ 0x62, 0x61, 0xff, 0x0f, 0x11, 0x31                                     }, { vmovsd QWORD rcx{k7},xmm30                                 }
+testcase	{ 0x62, 0x21, 0xff, 0x0f, 0x11, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovsd QWORD rax+r14*8+0x123{k7},xmm30                     }
+testcase	{ 0x62, 0x61, 0xff, 0x0f, 0x11, 0x72, 0x7f                               }, { vmovsd QWORD rdx+0x3f8{k7},xmm30                           }
+testcase	{ 0x62, 0x61, 0xff, 0x0f, 0x11, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmovsd QWORD rdx+0x400{k7},xmm30                           }
+testcase	{ 0x62, 0x61, 0xff, 0x0f, 0x11, 0x72, 0x80                               }, { vmovsd QWORD rdx-0x400{k7},xmm30                           }
+testcase	{ 0x62, 0x61, 0xff, 0x0f, 0x11, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmovsd QWORD rdx-0x408{k7},xmm30                           }
+testcase	{ 0x62, 0x01, 0x97, 0x07, 0x10, 0xf4                                     }, { vmovsd xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x97, 0x87, 0x10, 0xf4                                     }, { vmovsd xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x7e, 0x48, 0x16, 0xf5                                     }, { vmovshdup zmm30,zmm29                                        }
+testcase	{ 0x62, 0x01, 0x7e, 0x4f, 0x16, 0xf5                                     }, { vmovshdup zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x01, 0x7e, 0xcf, 0x16, 0xf5                                     }, { vmovshdup zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x16, 0x31                                     }, { vmovshdup zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x21, 0x7e, 0x48, 0x16, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovshdup zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x16, 0x72, 0x7f                               }, { vmovshdup zmm30,ZWORD rdx+0x1fc0                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x16, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovshdup zmm30,ZWORD rdx+0x2000                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x16, 0x72, 0x80                               }, { vmovshdup zmm30,ZWORD rdx-0x2000                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x16, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovshdup zmm30,ZWORD rdx-0x2040                           }
+testcase	{ 0x62, 0x01, 0x7e, 0x48, 0x12, 0xf5                                     }, { vmovsldup zmm30,zmm29                                        }
+testcase	{ 0x62, 0x01, 0x7e, 0x4f, 0x12, 0xf5                                     }, { vmovsldup zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x01, 0x7e, 0xcf, 0x12, 0xf5                                     }, { vmovsldup zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x12, 0x31                                     }, { vmovsldup zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x21, 0x7e, 0x48, 0x12, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovsldup zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x12, 0x72, 0x7f                               }, { vmovsldup zmm30,ZWORD rdx+0x1fc0                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x12, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovsldup zmm30,ZWORD rdx+0x2000                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x12, 0x72, 0x80                               }, { vmovsldup zmm30,ZWORD rdx-0x2000                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x12, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovsldup zmm30,ZWORD rdx-0x2040                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x0f, 0x10, 0x31                                     }, { vmovss xmm30{k7},DWORD rcx                                 }
+testcase	{ 0x62, 0x61, 0x7e, 0x8f, 0x10, 0x31                                     }, { vmovss xmm30{k7}{z},DWORD rcx                              }
+testcase	{ 0x62, 0x21, 0x7e, 0x0f, 0x10, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovss xmm30{k7},DWORD rax+r14*8+0x123                     }
+testcase	{ 0x62, 0x61, 0x7e, 0x0f, 0x10, 0x72, 0x7f                               }, { vmovss xmm30{k7},DWORD rdx+0x1fc                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x0f, 0x10, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vmovss xmm30{k7},DWORD rdx+0x200                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x0f, 0x10, 0x72, 0x80                               }, { vmovss xmm30{k7},DWORD rdx-0x200                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x0f, 0x10, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vmovss xmm30{k7},DWORD rdx-0x204                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x0f, 0x11, 0x31                                     }, { vmovss DWORD rcx{k7},xmm30                                 }
+testcase	{ 0x62, 0x21, 0x7e, 0x0f, 0x11, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovss DWORD rax+r14*8+0x123{k7},xmm30                     }
+testcase	{ 0x62, 0x61, 0x7e, 0x0f, 0x11, 0x72, 0x7f                               }, { vmovss DWORD rdx+0x1fc{k7},xmm30                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x0f, 0x11, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vmovss DWORD rdx+0x200{k7},xmm30                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x0f, 0x11, 0x72, 0x80                               }, { vmovss DWORD rdx-0x200{k7},xmm30                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x0f, 0x11, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vmovss DWORD rdx-0x204{k7},xmm30                           }
+testcase	{ 0x62, 0x01, 0x16, 0x07, 0x10, 0xf4                                     }, { vmovss xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x16, 0x87, 0x10, 0xf4                                     }, { vmovss xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0xfd, 0x48, 0x10, 0xf5                                     }, { vmovupd zmm30,zmm29                                          }
+testcase	{ 0x62, 0x01, 0xfd, 0x4f, 0x10, 0xf5                                     }, { vmovupd zmm30{k7},zmm29                                      }
+testcase	{ 0x62, 0x01, 0xfd, 0xcf, 0x10, 0xf5                                     }, { vmovupd zmm30{k7}{z},zmm29                                   }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x10, 0x31                                     }, { vmovupd zmm30,ZWORD rcx                                    }
+testcase	{ 0x62, 0x21, 0xfd, 0x48, 0x10, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovupd zmm30,ZWORD rax+r14*8+0x123                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x10, 0x72, 0x7f                               }, { vmovupd zmm30,ZWORD rdx+0x1fc0                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x10, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovupd zmm30,ZWORD rdx+0x2000                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x10, 0x72, 0x80                               }, { vmovupd zmm30,ZWORD rdx-0x2000                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x10, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovupd zmm30,ZWORD rdx-0x2040                             }
+testcase	{ 0x62, 0x01, 0x7c, 0x48, 0x10, 0xf5                                     }, { vmovups zmm30,zmm29                                          }
+testcase	{ 0x62, 0x01, 0x7c, 0x4f, 0x10, 0xf5                                     }, { vmovups zmm30{k7},zmm29                                      }
+testcase	{ 0x62, 0x01, 0x7c, 0xcf, 0x10, 0xf5                                     }, { vmovups zmm30{k7}{z},zmm29                                   }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x10, 0x31                                     }, { vmovups zmm30,ZWORD rcx                                    }
+testcase	{ 0x62, 0x21, 0x7c, 0x48, 0x10, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovups zmm30,ZWORD rax+r14*8+0x123                        }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x10, 0x72, 0x7f                               }, { vmovups zmm30,ZWORD rdx+0x1fc0                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x10, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovups zmm30,ZWORD rdx+0x2000                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x10, 0x72, 0x80                               }, { vmovups zmm30,ZWORD rdx-0x2000                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x10, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovups zmm30,ZWORD rdx-0x2040                             }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0x59, 0xf4                                     }, { vmulpd zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0x59, 0xf4                                     }, { vmulpd zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0x59, 0xf4                                     }, { vmulpd zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x95, 0x10, 0x59, 0xf4                                     }, { vmulpd zmm30,zmm29,zmm28,{rn-sae}                            }
+testcase	{ 0x62, 0x01, 0x95, 0x50, 0x59, 0xf4                                     }, { vmulpd zmm30,zmm29,zmm28,{ru-sae}                            }
+testcase	{ 0x62, 0x01, 0x95, 0x30, 0x59, 0xf4                                     }, { vmulpd zmm30,zmm29,zmm28,{rd-sae}                            }
+testcase	{ 0x62, 0x01, 0x95, 0x70, 0x59, 0xf4                                     }, { vmulpd zmm30,zmm29,zmm28,{rz-sae}                            }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x59, 0x31                                     }, { vmulpd zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0x59, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmulpd zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x59, 0x31                                     }, { vmulpd zmm30,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x59, 0x72, 0x7f                               }, { vmulpd zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x59, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmulpd zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x59, 0x72, 0x80                               }, { vmulpd zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x59, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmulpd zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x59, 0x72, 0x7f                               }, { vmulpd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x59, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmulpd zmm30,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x59, 0x72, 0x80                               }, { vmulpd zmm30,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x59, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmulpd zmm30,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x01, 0x14, 0x40, 0x59, 0xf4                                     }, { vmulps zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x14, 0x47, 0x59, 0xf4                                     }, { vmulps zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x14, 0xc7, 0x59, 0xf4                                     }, { vmulps zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x14, 0x10, 0x59, 0xf4                                     }, { vmulps zmm30,zmm29,zmm28,{rn-sae}                            }
+testcase	{ 0x62, 0x01, 0x14, 0x50, 0x59, 0xf4                                     }, { vmulps zmm30,zmm29,zmm28,{ru-sae}                            }
+testcase	{ 0x62, 0x01, 0x14, 0x30, 0x59, 0xf4                                     }, { vmulps zmm30,zmm29,zmm28,{rd-sae}                            }
+testcase	{ 0x62, 0x01, 0x14, 0x70, 0x59, 0xf4                                     }, { vmulps zmm30,zmm29,zmm28,{rz-sae}                            }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x59, 0x31                                     }, { vmulps zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x14, 0x40, 0x59, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmulps zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x59, 0x31                                     }, { vmulps zmm30,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x59, 0x72, 0x7f                               }, { vmulps zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x59, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmulps zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x59, 0x72, 0x80                               }, { vmulps zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x59, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmulps zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x59, 0x72, 0x7f                               }, { vmulps zmm30,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x59, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vmulps zmm30,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x59, 0x72, 0x80                               }, { vmulps zmm30,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x59, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vmulps zmm30,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x01, 0x97, 0x07, 0x59, 0xf4                                     }, { vmulsd xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x97, 0x87, 0x59, 0xf4                                     }, { vmulsd xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x97, 0x17, 0x59, 0xf4                                     }, { vmulsd xmm30{k7},xmm29,xmm28,{rn-sae}                        }
+testcase	{ 0x62, 0x01, 0x97, 0x57, 0x59, 0xf4                                     }, { vmulsd xmm30{k7},xmm29,xmm28,{ru-sae}                        }
+testcase	{ 0x62, 0x01, 0x97, 0x37, 0x59, 0xf4                                     }, { vmulsd xmm30{k7},xmm29,xmm28,{rd-sae}                        }
+testcase	{ 0x62, 0x01, 0x97, 0x77, 0x59, 0xf4                                     }, { vmulsd xmm30{k7},xmm29,xmm28,{rz-sae}                        }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x59, 0x31                                     }, { vmulsd xmm30{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x97, 0x07, 0x59, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmulsd xmm30{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x59, 0x72, 0x7f                               }, { vmulsd xmm30{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x59, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vmulsd xmm30{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x59, 0x72, 0x80                               }, { vmulsd xmm30{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x59, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vmulsd xmm30{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x01, 0x16, 0x07, 0x59, 0xf4                                     }, { vmulss xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x16, 0x87, 0x59, 0xf4                                     }, { vmulss xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x16, 0x17, 0x59, 0xf4                                     }, { vmulss xmm30{k7},xmm29,xmm28,{rn-sae}                        }
+testcase	{ 0x62, 0x01, 0x16, 0x57, 0x59, 0xf4                                     }, { vmulss xmm30{k7},xmm29,xmm28,{ru-sae}                        }
+testcase	{ 0x62, 0x01, 0x16, 0x37, 0x59, 0xf4                                     }, { vmulss xmm30{k7},xmm29,xmm28,{rd-sae}                        }
+testcase	{ 0x62, 0x01, 0x16, 0x77, 0x59, 0xf4                                     }, { vmulss xmm30{k7},xmm29,xmm28,{rz-sae}                        }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x59, 0x31                                     }, { vmulss xmm30{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x16, 0x07, 0x59, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmulss xmm30{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x59, 0x72, 0x7f                               }, { vmulss xmm30{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x59, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vmulss xmm30{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x59, 0x72, 0x80                               }, { vmulss xmm30{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x59, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vmulss xmm30{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0x1e, 0xf5                                     }, { vpabsd zmm30,zmm29                                           }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x1e, 0xf5                                     }, { vpabsd zmm30{k7},zmm29                                       }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x1e, 0xf5                                     }, { vpabsd zmm30{k7}{z},zmm29                                    }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x1e, 0x31                                     }, { vpabsd zmm30,ZWORD rcx                                     }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x1e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpabsd zmm30,ZWORD rax+r14*8+0x123                         }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x1e, 0x31                                     }, { vpabsd zmm30,DWORD rcx{1to16}                              }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x1e, 0x72, 0x7f                               }, { vpabsd zmm30,ZWORD rdx+0x1fc0                              }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x1e, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpabsd zmm30,ZWORD rdx+0x2000                              }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x1e, 0x72, 0x80                               }, { vpabsd zmm30,ZWORD rdx-0x2000                              }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x1e, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpabsd zmm30,ZWORD rdx-0x2040                              }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x1e, 0x72, 0x7f                               }, { vpabsd zmm30,DWORD rdx+0x1fc{1to16}                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x1e, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpabsd zmm30,DWORD rdx+0x200{1to16}                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x1e, 0x72, 0x80                               }, { vpabsd zmm30,DWORD rdx-0x200{1to16}                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x1e, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpabsd zmm30,DWORD rdx-0x204{1to16}                        }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0x1f, 0xf5                                     }, { vpabsq zmm30,zmm29                                           }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0x1f, 0xf5                                     }, { vpabsq zmm30{k7},zmm29                                       }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0x1f, 0xf5                                     }, { vpabsq zmm30{k7}{z},zmm29                                    }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x1f, 0x31                                     }, { vpabsq zmm30,ZWORD rcx                                     }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x1f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpabsq zmm30,ZWORD rax+r14*8+0x123                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x1f, 0x31                                     }, { vpabsq zmm30,QWORD rcx{1to8}                               }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x1f, 0x72, 0x7f                               }, { vpabsq zmm30,ZWORD rdx+0x1fc0                              }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x1f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpabsq zmm30,ZWORD rdx+0x2000                              }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x1f, 0x72, 0x80                               }, { vpabsq zmm30,ZWORD rdx-0x2000                              }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x1f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpabsq zmm30,ZWORD rdx-0x2040                              }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x1f, 0x72, 0x7f                               }, { vpabsq zmm30,QWORD rdx+0x3f8{1to8}                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x1f, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpabsq zmm30,QWORD rdx+0x400{1to8}                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x1f, 0x72, 0x80                               }, { vpabsq zmm30,QWORD rdx-0x400{1to8}                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x1f, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpabsq zmm30,QWORD rdx-0x408{1to8}                         }
+testcase	{ 0x62, 0x01, 0x15, 0x40, 0xfe, 0xf4                                     }, { vpaddd zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x15, 0x47, 0xfe, 0xf4                                     }, { vpaddd zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x15, 0xc7, 0xfe, 0xf4                                     }, { vpaddd zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xfe, 0x31                                     }, { vpaddd zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x15, 0x40, 0xfe, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpaddd zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xfe, 0x31                                     }, { vpaddd zmm30,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xfe, 0x72, 0x7f                               }, { vpaddd zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xfe, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpaddd zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xfe, 0x72, 0x80                               }, { vpaddd zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xfe, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpaddd zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xfe, 0x72, 0x7f                               }, { vpaddd zmm30,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xfe, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpaddd zmm30,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xfe, 0x72, 0x80                               }, { vpaddd zmm30,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xfe, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpaddd zmm30,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0xd4, 0xf4                                     }, { vpaddq zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0xd4, 0xf4                                     }, { vpaddq zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0xd4, 0xf4                                     }, { vpaddq zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xd4, 0x31                                     }, { vpaddq zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0xd4, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpaddq zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xd4, 0x31                                     }, { vpaddq zmm30,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xd4, 0x72, 0x7f                               }, { vpaddq zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xd4, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpaddq zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xd4, 0x72, 0x80                               }, { vpaddq zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xd4, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpaddq zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xd4, 0x72, 0x7f                               }, { vpaddq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xd4, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpaddq zmm30,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xd4, 0x72, 0x80                               }, { vpaddq zmm30,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xd4, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpaddq zmm30,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x01, 0x15, 0x40, 0xdb, 0xf4                                     }, { vpandd zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x15, 0x47, 0xdb, 0xf4                                     }, { vpandd zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x15, 0xc7, 0xdb, 0xf4                                     }, { vpandd zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xdb, 0x31                                     }, { vpandd zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x15, 0x40, 0xdb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpandd zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xdb, 0x31                                     }, { vpandd zmm30,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xdb, 0x72, 0x7f                               }, { vpandd zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xdb, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpandd zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xdb, 0x72, 0x80                               }, { vpandd zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xdb, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpandd zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xdb, 0x72, 0x7f                               }, { vpandd zmm30,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xdb, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpandd zmm30,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xdb, 0x72, 0x80                               }, { vpandd zmm30,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xdb, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpandd zmm30,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x01, 0x15, 0x40, 0xdf, 0xf4                                     }, { vpandnd zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x01, 0x15, 0x47, 0xdf, 0xf4                                     }, { vpandnd zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x01, 0x15, 0xc7, 0xdf, 0xf4                                     }, { vpandnd zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xdf, 0x31                                     }, { vpandnd zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x21, 0x15, 0x40, 0xdf, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpandnd zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xdf, 0x31                                     }, { vpandnd zmm30,zmm29,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xdf, 0x72, 0x7f                               }, { vpandnd zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xdf, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpandnd zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xdf, 0x72, 0x80                               }, { vpandnd zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xdf, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpandnd zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xdf, 0x72, 0x7f                               }, { vpandnd zmm30,zmm29,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xdf, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpandnd zmm30,zmm29,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xdf, 0x72, 0x80                               }, { vpandnd zmm30,zmm29,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xdf, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpandnd zmm30,zmm29,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0xdf, 0xf4                                     }, { vpandnq zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0xdf, 0xf4                                     }, { vpandnq zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0xdf, 0xf4                                     }, { vpandnq zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xdf, 0x31                                     }, { vpandnq zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0xdf, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpandnq zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xdf, 0x31                                     }, { vpandnq zmm30,zmm29,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xdf, 0x72, 0x7f                               }, { vpandnq zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xdf, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpandnq zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xdf, 0x72, 0x80                               }, { vpandnq zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xdf, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpandnq zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xdf, 0x72, 0x7f                               }, { vpandnq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xdf, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpandnq zmm30,zmm29,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xdf, 0x72, 0x80                               }, { vpandnq zmm30,zmm29,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xdf, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpandnq zmm30,zmm29,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0xdb, 0xf4                                     }, { vpandq zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0xdb, 0xf4                                     }, { vpandq zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0xdb, 0xf4                                     }, { vpandq zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xdb, 0x31                                     }, { vpandq zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0xdb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpandq zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xdb, 0x31                                     }, { vpandq zmm30,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xdb, 0x72, 0x7f                               }, { vpandq zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xdb, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpandq zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xdb, 0x72, 0x80                               }, { vpandq zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xdb, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpandq zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xdb, 0x72, 0x7f                               }, { vpandq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xdb, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpandq zmm30,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xdb, 0x72, 0x80                               }, { vpandq zmm30,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xdb, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpandq zmm30,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x64, 0xf4                                     }, { vpblendmd zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x64, 0xf4                                     }, { vpblendmd zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x64, 0xf4                                     }, { vpblendmd zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x64, 0x31                                     }, { vpblendmd zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x64, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpblendmd zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x64, 0x31                                     }, { vpblendmd zmm30,zmm29,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x64, 0x72, 0x7f                               }, { vpblendmd zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x64, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpblendmd zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x64, 0x72, 0x80                               }, { vpblendmd zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x64, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpblendmd zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x64, 0x72, 0x7f                               }, { vpblendmd zmm30,zmm29,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x64, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpblendmd zmm30,zmm29,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x64, 0x72, 0x80                               }, { vpblendmd zmm30,zmm29,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x64, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpblendmd zmm30,zmm29,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x58, 0x31                                     }, { vpbroadcastd zmm30,DWORD rcx                               }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x58, 0x31                                     }, { vpbroadcastd zmm30{k7},DWORD rcx                           }
+testcase	{ 0x62, 0x62, 0x7d, 0xcf, 0x58, 0x31                                     }, { vpbroadcastd zmm30{k7}{z},DWORD rcx                        }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x58, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpbroadcastd zmm30,DWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x58, 0x72, 0x7f                               }, { vpbroadcastd zmm30,DWORD rdx+0x1fc                         }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x58, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpbroadcastd zmm30,DWORD rdx+0x200                         }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x58, 0x72, 0x80                               }, { vpbroadcastd zmm30,DWORD rdx-0x200                         }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x58, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpbroadcastd zmm30,DWORD rdx-0x204                         }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x58, 0xf5                                     }, { vpbroadcastd zmm30{k7},xmm29                                 }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x58, 0xf5                                     }, { vpbroadcastd zmm30{k7}{z},xmm29                              }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x7c, 0xf0                                     }, { vpbroadcastd zmm30,eax                                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x7c, 0xf0                                     }, { vpbroadcastd zmm30{k7},eax                                   }
+testcase	{ 0x62, 0x62, 0x7d, 0xcf, 0x7c, 0xf0                                     }, { vpbroadcastd zmm30{k7}{z},eax                                }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x7c, 0xf5                                     }, { vpbroadcastd zmm30,ebp                                       }
+testcase	{ 0x62, 0x42, 0x7d, 0x48, 0x7c, 0xf5                                     }, { vpbroadcastd zmm30,r13d                                      }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x59, 0x31                                     }, { vpbroadcastq zmm30,QWORD rcx                               }
+testcase	{ 0x62, 0x62, 0xfd, 0x4f, 0x59, 0x31                                     }, { vpbroadcastq zmm30{k7},QWORD rcx                           }
+testcase	{ 0x62, 0x62, 0xfd, 0xcf, 0x59, 0x31                                     }, { vpbroadcastq zmm30{k7}{z},QWORD rcx                        }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x59, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpbroadcastq zmm30,QWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x59, 0x72, 0x7f                               }, { vpbroadcastq zmm30,QWORD rdx+0x3f8                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x59, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpbroadcastq zmm30,QWORD rdx+0x400                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x59, 0x72, 0x80                               }, { vpbroadcastq zmm30,QWORD rdx-0x400                         }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x59, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpbroadcastq zmm30,QWORD rdx-0x408                         }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0x59, 0xf5                                     }, { vpbroadcastq zmm30{k7},xmm29                                 }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0x59, 0xf5                                     }, { vpbroadcastq zmm30{k7}{z},xmm29                              }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x7c, 0xf0                                     }, { vpbroadcastq zmm30,rax                                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x4f, 0x7c, 0xf0                                     }, { vpbroadcastq zmm30{k7},rax                                   }
+testcase	{ 0x62, 0x62, 0xfd, 0xcf, 0x7c, 0xf0                                     }, { vpbroadcastq zmm30{k7}{z},rax                                }
+testcase	{ 0x62, 0x42, 0xfd, 0x48, 0x7c, 0xf0                                     }, { vpbroadcastq zmm30,r8                                        }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1f, 0xed, 0xab                               }, { vpcmpd k5,zmm30,zmm29,0xab                                   }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1f, 0xed, 0xab                               }, { vpcmpd k5{k7},zmm30,zmm29,0xab                               }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1f, 0xed, 0x7b                               }, { vpcmpd k5,zmm30,zmm29,0x7b                                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x29, 0x7b                               }, { vpcmpd k5,zmm30,ZWORD rcx,0x7b                             }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpcmpd k5,zmm30,ZWORD rax+r14*8+0x123,0x7b                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x29, 0x7b                               }, { vpcmpd k5,zmm30,DWORD rcx{1to16},0x7b                      }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x7f, 0x7b                         }, { vpcmpd k5,zmm30,ZWORD rdx+0x1fc0,0x7b                      }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpcmpd k5,zmm30,ZWORD rdx+0x2000,0x7b                      }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x80, 0x7b                         }, { vpcmpd k5,zmm30,ZWORD rdx-0x2000,0x7b                      }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpcmpd k5,zmm30,ZWORD rdx-0x2040,0x7b                      }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x7f, 0x7b                         }, { vpcmpd k5,zmm30,DWORD rdx+0x1fc{1to16},0x7b                }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vpcmpd k5,zmm30,DWORD rdx+0x200{1to16},0x7b                }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x80, 0x7b                         }, { vpcmpd k5,zmm30,DWORD rdx-0x200{1to16},0x7b                }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vpcmpd k5,zmm30,DWORD rdx-0x204{1to16},0x7b                }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1f, 0xed, 0x01                               }, { vpcmpltd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1f, 0xed, 0x01                               }, { vpcmpltd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x29, 0x01                               }, { vpcmpltd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vpcmpltd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x29, 0x01                               }, { vpcmpltd k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x7f, 0x01                         }, { vpcmpltd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x01       }, { vpcmpltd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x80, 0x01                         }, { vpcmpltd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x01       }, { vpcmpltd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x7f, 0x01                         }, { vpcmpltd k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x01       }, { vpcmpltd k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x80, 0x01                         }, { vpcmpltd k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x01       }, { vpcmpltd k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1f, 0xed, 0x02                               }, { vpcmpled k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1f, 0xed, 0x02                               }, { vpcmpled k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x29, 0x02                               }, { vpcmpled k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vpcmpled k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x29, 0x02                               }, { vpcmpled k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x7f, 0x02                         }, { vpcmpled k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x02       }, { vpcmpled k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x80, 0x02                         }, { vpcmpled k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x02       }, { vpcmpled k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x7f, 0x02                         }, { vpcmpled k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x02       }, { vpcmpled k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x80, 0x02                         }, { vpcmpled k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x02       }, { vpcmpled k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1f, 0xed, 0x04                               }, { vpcmpneqd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1f, 0xed, 0x04                               }, { vpcmpneqd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x29, 0x04                               }, { vpcmpneqd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vpcmpneqd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x29, 0x04                               }, { vpcmpneqd k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x7f, 0x04                         }, { vpcmpneqd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x04       }, { vpcmpneqd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x80, 0x04                         }, { vpcmpneqd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x04       }, { vpcmpneqd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x7f, 0x04                         }, { vpcmpneqd k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x04       }, { vpcmpneqd k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x80, 0x04                         }, { vpcmpneqd k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x04       }, { vpcmpneqd k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1f, 0xed, 0x05                               }, { vpcmpnltd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1f, 0xed, 0x05                               }, { vpcmpnltd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x29, 0x05                               }, { vpcmpnltd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vpcmpnltd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x29, 0x05                               }, { vpcmpnltd k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x7f, 0x05                         }, { vpcmpnltd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x05       }, { vpcmpnltd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x80, 0x05                         }, { vpcmpnltd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x05       }, { vpcmpnltd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x7f, 0x05                         }, { vpcmpnltd k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x05       }, { vpcmpnltd k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x80, 0x05                         }, { vpcmpnltd k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x05       }, { vpcmpnltd k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1f, 0xed, 0x06                               }, { vpcmpnled k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1f, 0xed, 0x06                               }, { vpcmpnled k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x29, 0x06                               }, { vpcmpnled k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vpcmpnled k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x29, 0x06                               }, { vpcmpnled k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x7f, 0x06                         }, { vpcmpnled k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x06       }, { vpcmpnled k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x80, 0x06                         }, { vpcmpnled k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x06       }, { vpcmpnled k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x7f, 0x06                         }, { vpcmpnled k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x06       }, { vpcmpnled k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x80, 0x06                         }, { vpcmpnled k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x06       }, { vpcmpnled k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x91, 0x0d, 0x40, 0x76, 0xed                                     }, { vpcmpeqd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x0d, 0x47, 0x76, 0xed                                     }, { vpcmpeqd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x76, 0x29                                     }, { vpcmpeqd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x0d, 0x40, 0x76, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpcmpeqd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x76, 0x29                                     }, { vpcmpeqd k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x76, 0x6a, 0x7f                               }, { vpcmpeqd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x76, 0xaa, 0x00, 0x20, 0x00, 0x00             }, { vpcmpeqd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x76, 0x6a, 0x80                               }, { vpcmpeqd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x76, 0xaa, 0xc0, 0xdf, 0xff, 0xff             }, { vpcmpeqd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x76, 0x6a, 0x7f                               }, { vpcmpeqd k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x76, 0xaa, 0x00, 0x02, 0x00, 0x00             }, { vpcmpeqd k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x76, 0x6a, 0x80                               }, { vpcmpeqd k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x76, 0xaa, 0xfc, 0xfd, 0xff, 0xff             }, { vpcmpeqd k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x92, 0x8d, 0x40, 0x29, 0xed                                     }, { vpcmpeqq k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x92, 0x8d, 0x47, 0x29, 0xed                                     }, { vpcmpeqq k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x29, 0x29                                     }, { vpcmpeqq k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb2, 0x8d, 0x40, 0x29, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpcmpeqq k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x29, 0x29                                     }, { vpcmpeqq k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x29, 0x6a, 0x7f                               }, { vpcmpeqq k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x29, 0xaa, 0x00, 0x20, 0x00, 0x00             }, { vpcmpeqq k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x29, 0x6a, 0x80                               }, { vpcmpeqq k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x29, 0xaa, 0xc0, 0xdf, 0xff, 0xff             }, { vpcmpeqq k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x29, 0x6a, 0x7f                               }, { vpcmpeqq k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x29, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vpcmpeqq k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x29, 0x6a, 0x80                               }, { vpcmpeqq k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x29, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vpcmpeqq k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x91, 0x0d, 0x40, 0x66, 0xed                                     }, { vpcmpgtd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x91, 0x0d, 0x47, 0x66, 0xed                                     }, { vpcmpgtd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x66, 0x29                                     }, { vpcmpgtd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb1, 0x0d, 0x40, 0x66, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpcmpgtd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x66, 0x29                                     }, { vpcmpgtd k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x66, 0x6a, 0x7f                               }, { vpcmpgtd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x66, 0xaa, 0x00, 0x20, 0x00, 0x00             }, { vpcmpgtd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x66, 0x6a, 0x80                               }, { vpcmpgtd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x66, 0xaa, 0xc0, 0xdf, 0xff, 0xff             }, { vpcmpgtd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x66, 0x6a, 0x7f                               }, { vpcmpgtd k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x66, 0xaa, 0x00, 0x02, 0x00, 0x00             }, { vpcmpgtd k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x66, 0x6a, 0x80                               }, { vpcmpgtd k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x66, 0xaa, 0xfc, 0xfd, 0xff, 0xff             }, { vpcmpgtd k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x92, 0x8d, 0x40, 0x37, 0xed                                     }, { vpcmpgtq k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x92, 0x8d, 0x47, 0x37, 0xed                                     }, { vpcmpgtq k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x37, 0x29                                     }, { vpcmpgtq k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb2, 0x8d, 0x40, 0x37, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpcmpgtq k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x37, 0x29                                     }, { vpcmpgtq k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x37, 0x6a, 0x7f                               }, { vpcmpgtq k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x37, 0xaa, 0x00, 0x20, 0x00, 0x00             }, { vpcmpgtq k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x37, 0x6a, 0x80                               }, { vpcmpgtq k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x37, 0xaa, 0xc0, 0xdf, 0xff, 0xff             }, { vpcmpgtq k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x37, 0x6a, 0x7f                               }, { vpcmpgtq k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x37, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vpcmpgtq k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x37, 0x6a, 0x80                               }, { vpcmpgtq k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x37, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vpcmpgtq k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1f, 0xed, 0xab                               }, { vpcmpq k5,zmm30,zmm29,0xab                                   }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1f, 0xed, 0xab                               }, { vpcmpq k5{k7},zmm30,zmm29,0xab                               }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1f, 0xed, 0x7b                               }, { vpcmpq k5,zmm30,zmm29,0x7b                                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x29, 0x7b                               }, { vpcmpq k5,zmm30,ZWORD rcx,0x7b                             }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpcmpq k5,zmm30,ZWORD rax+r14*8+0x123,0x7b                 }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x29, 0x7b                               }, { vpcmpq k5,zmm30,QWORD rcx{1to8},0x7b                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x7f, 0x7b                         }, { vpcmpq k5,zmm30,ZWORD rdx+0x1fc0,0x7b                      }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpcmpq k5,zmm30,ZWORD rdx+0x2000,0x7b                      }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x80, 0x7b                         }, { vpcmpq k5,zmm30,ZWORD rdx-0x2000,0x7b                      }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpcmpq k5,zmm30,ZWORD rdx-0x2040,0x7b                      }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x7f, 0x7b                         }, { vpcmpq k5,zmm30,QWORD rdx+0x3f8{1to8},0x7b                 }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vpcmpq k5,zmm30,QWORD rdx+0x400{1to8},0x7b                 }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x80, 0x7b                         }, { vpcmpq k5,zmm30,QWORD rdx-0x400{1to8},0x7b                 }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vpcmpq k5,zmm30,QWORD rdx-0x408{1to8},0x7b                 }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1f, 0xed, 0x01                               }, { vpcmpltq k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1f, 0xed, 0x01                               }, { vpcmpltq k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x29, 0x01                               }, { vpcmpltq k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vpcmpltq k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x29, 0x01                               }, { vpcmpltq k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x7f, 0x01                         }, { vpcmpltq k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x01       }, { vpcmpltq k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x80, 0x01                         }, { vpcmpltq k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x01       }, { vpcmpltq k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x7f, 0x01                         }, { vpcmpltq k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x01       }, { vpcmpltq k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x80, 0x01                         }, { vpcmpltq k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x01       }, { vpcmpltq k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1f, 0xed, 0x02                               }, { vpcmpleq k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1f, 0xed, 0x02                               }, { vpcmpleq k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x29, 0x02                               }, { vpcmpleq k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vpcmpleq k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x29, 0x02                               }, { vpcmpleq k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x7f, 0x02                         }, { vpcmpleq k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x02       }, { vpcmpleq k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x80, 0x02                         }, { vpcmpleq k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x02       }, { vpcmpleq k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x7f, 0x02                         }, { vpcmpleq k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x02       }, { vpcmpleq k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x80, 0x02                         }, { vpcmpleq k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x02       }, { vpcmpleq k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1f, 0xed, 0x04                               }, { vpcmpneqq k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1f, 0xed, 0x04                               }, { vpcmpneqq k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x29, 0x04                               }, { vpcmpneqq k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vpcmpneqq k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x29, 0x04                               }, { vpcmpneqq k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x7f, 0x04                         }, { vpcmpneqq k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x04       }, { vpcmpneqq k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x80, 0x04                         }, { vpcmpneqq k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x04       }, { vpcmpneqq k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x7f, 0x04                         }, { vpcmpneqq k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x04       }, { vpcmpneqq k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x80, 0x04                         }, { vpcmpneqq k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x04       }, { vpcmpneqq k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1f, 0xed, 0x05                               }, { vpcmpnltq k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1f, 0xed, 0x05                               }, { vpcmpnltq k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x29, 0x05                               }, { vpcmpnltq k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vpcmpnltq k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x29, 0x05                               }, { vpcmpnltq k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x7f, 0x05                         }, { vpcmpnltq k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x05       }, { vpcmpnltq k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x80, 0x05                         }, { vpcmpnltq k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x05       }, { vpcmpnltq k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x7f, 0x05                         }, { vpcmpnltq k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x05       }, { vpcmpnltq k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x80, 0x05                         }, { vpcmpnltq k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x05       }, { vpcmpnltq k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1f, 0xed, 0x06                               }, { vpcmpnleq k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1f, 0xed, 0x06                               }, { vpcmpnleq k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x29, 0x06                               }, { vpcmpnleq k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vpcmpnleq k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x29, 0x06                               }, { vpcmpnleq k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x7f, 0x06                         }, { vpcmpnleq k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x06       }, { vpcmpnleq k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x80, 0x06                         }, { vpcmpnleq k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x06       }, { vpcmpnleq k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x7f, 0x06                         }, { vpcmpnleq k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x06       }, { vpcmpnleq k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x80, 0x06                         }, { vpcmpnleq k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x06       }, { vpcmpnleq k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1e, 0xed, 0xab                               }, { vpcmpud k5,zmm30,zmm29,0xab                                  }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1e, 0xed, 0xab                               }, { vpcmpud k5{k7},zmm30,zmm29,0xab                              }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1e, 0xed, 0x7b                               }, { vpcmpud k5,zmm30,zmm29,0x7b                                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x29, 0x7b                               }, { vpcmpud k5,zmm30,ZWORD rcx,0x7b                            }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpcmpud k5,zmm30,ZWORD rax+r14*8+0x123,0x7b                }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x29, 0x7b                               }, { vpcmpud k5,zmm30,DWORD rcx{1to16},0x7b                     }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x7f, 0x7b                         }, { vpcmpud k5,zmm30,ZWORD rdx+0x1fc0,0x7b                     }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpcmpud k5,zmm30,ZWORD rdx+0x2000,0x7b                     }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x80, 0x7b                         }, { vpcmpud k5,zmm30,ZWORD rdx-0x2000,0x7b                     }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpcmpud k5,zmm30,ZWORD rdx-0x2040,0x7b                     }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x7f, 0x7b                         }, { vpcmpud k5,zmm30,DWORD rdx+0x1fc{1to16},0x7b               }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vpcmpud k5,zmm30,DWORD rdx+0x200{1to16},0x7b               }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x80, 0x7b                         }, { vpcmpud k5,zmm30,DWORD rdx-0x200{1to16},0x7b               }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vpcmpud k5,zmm30,DWORD rdx-0x204{1to16},0x7b               }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1e, 0xed, 0x00                               }, { vpcmpequd k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1e, 0xed, 0x00                               }, { vpcmpequd k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x29, 0x00                               }, { vpcmpequd k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vpcmpequd k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x29, 0x00                               }, { vpcmpequd k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x7f, 0x00                         }, { vpcmpequd k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x00       }, { vpcmpequd k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x80, 0x00                         }, { vpcmpequd k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x00       }, { vpcmpequd k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x7f, 0x00                         }, { vpcmpequd k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x00       }, { vpcmpequd k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x80, 0x00                         }, { vpcmpequd k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x00       }, { vpcmpequd k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1e, 0xed, 0x01                               }, { vpcmpltud k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1e, 0xed, 0x01                               }, { vpcmpltud k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x29, 0x01                               }, { vpcmpltud k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vpcmpltud k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x29, 0x01                               }, { vpcmpltud k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x7f, 0x01                         }, { vpcmpltud k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x01       }, { vpcmpltud k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x80, 0x01                         }, { vpcmpltud k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x01       }, { vpcmpltud k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x7f, 0x01                         }, { vpcmpltud k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x01       }, { vpcmpltud k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x80, 0x01                         }, { vpcmpltud k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x01       }, { vpcmpltud k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1e, 0xed, 0x02                               }, { vpcmpleud k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1e, 0xed, 0x02                               }, { vpcmpleud k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x29, 0x02                               }, { vpcmpleud k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vpcmpleud k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x29, 0x02                               }, { vpcmpleud k5,zmm30,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x7f, 0x02                         }, { vpcmpleud k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x02       }, { vpcmpleud k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x80, 0x02                         }, { vpcmpleud k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x02       }, { vpcmpleud k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x7f, 0x02                         }, { vpcmpleud k5,zmm30,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x02       }, { vpcmpleud k5,zmm30,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x80, 0x02                         }, { vpcmpleud k5,zmm30,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x02       }, { vpcmpleud k5,zmm30,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1e, 0xed, 0x04                               }, { vpcmpnequd k5,zmm30,zmm29                                    }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1e, 0xed, 0x04                               }, { vpcmpnequd k5{k7},zmm30,zmm29                                }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x29, 0x04                               }, { vpcmpnequd k5,zmm30,ZWORD rcx                              }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vpcmpnequd k5,zmm30,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x29, 0x04                               }, { vpcmpnequd k5,zmm30,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x7f, 0x04                         }, { vpcmpnequd k5,zmm30,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x04       }, { vpcmpnequd k5,zmm30,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x80, 0x04                         }, { vpcmpnequd k5,zmm30,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x04       }, { vpcmpnequd k5,zmm30,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x7f, 0x04                         }, { vpcmpnequd k5,zmm30,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x04       }, { vpcmpnequd k5,zmm30,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x80, 0x04                         }, { vpcmpnequd k5,zmm30,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x04       }, { vpcmpnequd k5,zmm30,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1e, 0xed, 0x05                               }, { vpcmpnltud k5,zmm30,zmm29                                    }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1e, 0xed, 0x05                               }, { vpcmpnltud k5{k7},zmm30,zmm29                                }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x29, 0x05                               }, { vpcmpnltud k5,zmm30,ZWORD rcx                              }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vpcmpnltud k5,zmm30,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x29, 0x05                               }, { vpcmpnltud k5,zmm30,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x7f, 0x05                         }, { vpcmpnltud k5,zmm30,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x05       }, { vpcmpnltud k5,zmm30,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x80, 0x05                         }, { vpcmpnltud k5,zmm30,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x05       }, { vpcmpnltud k5,zmm30,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x7f, 0x05                         }, { vpcmpnltud k5,zmm30,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x05       }, { vpcmpnltud k5,zmm30,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x80, 0x05                         }, { vpcmpnltud k5,zmm30,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x05       }, { vpcmpnltud k5,zmm30,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x93, 0x0d, 0x40, 0x1e, 0xed, 0x06                               }, { vpcmpnleud k5,zmm30,zmm29                                    }
+testcase	{ 0x62, 0x93, 0x0d, 0x47, 0x1e, 0xed, 0x06                               }, { vpcmpnleud k5{k7},zmm30,zmm29                                }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x29, 0x06                               }, { vpcmpnleud k5,zmm30,ZWORD rcx                              }
+testcase	{ 0x62, 0xb3, 0x0d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vpcmpnleud k5,zmm30,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x29, 0x06                               }, { vpcmpnleud k5,zmm30,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x7f, 0x06                         }, { vpcmpnleud k5,zmm30,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x06       }, { vpcmpnleud k5,zmm30,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x80, 0x06                         }, { vpcmpnleud k5,zmm30,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x06       }, { vpcmpnleud k5,zmm30,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x7f, 0x06                         }, { vpcmpnleud k5,zmm30,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x06       }, { vpcmpnleud k5,zmm30,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x80, 0x06                         }, { vpcmpnleud k5,zmm30,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x06       }, { vpcmpnleud k5,zmm30,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1e, 0xed, 0xab                               }, { vpcmpuq k5,zmm30,zmm29,0xab                                  }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1e, 0xed, 0xab                               }, { vpcmpuq k5{k7},zmm30,zmm29,0xab                              }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1e, 0xed, 0x7b                               }, { vpcmpuq k5,zmm30,zmm29,0x7b                                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x29, 0x7b                               }, { vpcmpuq k5,zmm30,ZWORD rcx,0x7b                            }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpcmpuq k5,zmm30,ZWORD rax+r14*8+0x123,0x7b                }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x29, 0x7b                               }, { vpcmpuq k5,zmm30,QWORD rcx{1to8},0x7b                      }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x7f, 0x7b                         }, { vpcmpuq k5,zmm30,ZWORD rdx+0x1fc0,0x7b                     }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpcmpuq k5,zmm30,ZWORD rdx+0x2000,0x7b                     }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x80, 0x7b                         }, { vpcmpuq k5,zmm30,ZWORD rdx-0x2000,0x7b                     }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpcmpuq k5,zmm30,ZWORD rdx-0x2040,0x7b                     }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x7f, 0x7b                         }, { vpcmpuq k5,zmm30,QWORD rdx+0x3f8{1to8},0x7b                }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vpcmpuq k5,zmm30,QWORD rdx+0x400{1to8},0x7b                }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x80, 0x7b                         }, { vpcmpuq k5,zmm30,QWORD rdx-0x400{1to8},0x7b                }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vpcmpuq k5,zmm30,QWORD rdx-0x408{1to8},0x7b                }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1e, 0xed, 0x00                               }, { vpcmpequq k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1e, 0xed, 0x00                               }, { vpcmpequq k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x29, 0x00                               }, { vpcmpequq k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vpcmpequq k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x29, 0x00                               }, { vpcmpequq k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x7f, 0x00                         }, { vpcmpequq k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x00       }, { vpcmpequq k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x80, 0x00                         }, { vpcmpequq k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x00       }, { vpcmpequq k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x7f, 0x00                         }, { vpcmpequq k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x00       }, { vpcmpequq k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x80, 0x00                         }, { vpcmpequq k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x00       }, { vpcmpequq k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1e, 0xed, 0x01                               }, { vpcmpltuq k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1e, 0xed, 0x01                               }, { vpcmpltuq k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x29, 0x01                               }, { vpcmpltuq k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vpcmpltuq k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x29, 0x01                               }, { vpcmpltuq k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x7f, 0x01                         }, { vpcmpltuq k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x01       }, { vpcmpltuq k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x80, 0x01                         }, { vpcmpltuq k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x01       }, { vpcmpltuq k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x7f, 0x01                         }, { vpcmpltuq k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x01       }, { vpcmpltuq k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x80, 0x01                         }, { vpcmpltuq k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x01       }, { vpcmpltuq k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1e, 0xed, 0x02                               }, { vpcmpleuq k5,zmm30,zmm29                                     }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1e, 0xed, 0x02                               }, { vpcmpleuq k5{k7},zmm30,zmm29                                 }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x29, 0x02                               }, { vpcmpleuq k5,zmm30,ZWORD rcx                               }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vpcmpleuq k5,zmm30,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x29, 0x02                               }, { vpcmpleuq k5,zmm30,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x7f, 0x02                         }, { vpcmpleuq k5,zmm30,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x02       }, { vpcmpleuq k5,zmm30,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x80, 0x02                         }, { vpcmpleuq k5,zmm30,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x02       }, { vpcmpleuq k5,zmm30,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x7f, 0x02                         }, { vpcmpleuq k5,zmm30,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x02       }, { vpcmpleuq k5,zmm30,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x80, 0x02                         }, { vpcmpleuq k5,zmm30,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x02       }, { vpcmpleuq k5,zmm30,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1e, 0xed, 0x04                               }, { vpcmpnequq k5,zmm30,zmm29                                    }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1e, 0xed, 0x04                               }, { vpcmpnequq k5{k7},zmm30,zmm29                                }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x29, 0x04                               }, { vpcmpnequq k5,zmm30,ZWORD rcx                              }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vpcmpnequq k5,zmm30,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x29, 0x04                               }, { vpcmpnequq k5,zmm30,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x7f, 0x04                         }, { vpcmpnequq k5,zmm30,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x04       }, { vpcmpnequq k5,zmm30,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x80, 0x04                         }, { vpcmpnequq k5,zmm30,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x04       }, { vpcmpnequq k5,zmm30,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x7f, 0x04                         }, { vpcmpnequq k5,zmm30,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x04       }, { vpcmpnequq k5,zmm30,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x80, 0x04                         }, { vpcmpnequq k5,zmm30,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x04       }, { vpcmpnequq k5,zmm30,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1e, 0xed, 0x05                               }, { vpcmpnltuq k5,zmm30,zmm29                                    }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1e, 0xed, 0x05                               }, { vpcmpnltuq k5{k7},zmm30,zmm29                                }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x29, 0x05                               }, { vpcmpnltuq k5,zmm30,ZWORD rcx                              }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vpcmpnltuq k5,zmm30,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x29, 0x05                               }, { vpcmpnltuq k5,zmm30,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x7f, 0x05                         }, { vpcmpnltuq k5,zmm30,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x05       }, { vpcmpnltuq k5,zmm30,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x80, 0x05                         }, { vpcmpnltuq k5,zmm30,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x05       }, { vpcmpnltuq k5,zmm30,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x7f, 0x05                         }, { vpcmpnltuq k5,zmm30,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x05       }, { vpcmpnltuq k5,zmm30,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x80, 0x05                         }, { vpcmpnltuq k5,zmm30,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x05       }, { vpcmpnltuq k5,zmm30,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x93, 0x8d, 0x40, 0x1e, 0xed, 0x06                               }, { vpcmpnleuq k5,zmm30,zmm29                                    }
+testcase	{ 0x62, 0x93, 0x8d, 0x47, 0x1e, 0xed, 0x06                               }, { vpcmpnleuq k5{k7},zmm30,zmm29                                }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x29, 0x06                               }, { vpcmpnleuq k5,zmm30,ZWORD rcx                              }
+testcase	{ 0x62, 0xb3, 0x8d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vpcmpnleuq k5,zmm30,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x29, 0x06                               }, { vpcmpnleuq k5,zmm30,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x7f, 0x06                         }, { vpcmpnleuq k5,zmm30,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x06       }, { vpcmpnleuq k5,zmm30,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x80, 0x06                         }, { vpcmpnleuq k5,zmm30,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x06       }, { vpcmpnleuq k5,zmm30,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x7f, 0x06                         }, { vpcmpnleuq k5,zmm30,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x06       }, { vpcmpnleuq k5,zmm30,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x80, 0x06                         }, { vpcmpnleuq k5,zmm30,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x06       }, { vpcmpnleuq k5,zmm30,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x64, 0xf4                                     }, { vpblendmq zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x64, 0xf4                                     }, { vpblendmq zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x64, 0xf4                                     }, { vpblendmq zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x64, 0x31                                     }, { vpblendmq zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x64, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpblendmq zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x64, 0x31                                     }, { vpblendmq zmm30,zmm29,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x64, 0x72, 0x7f                               }, { vpblendmq zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x64, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpblendmq zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x64, 0x72, 0x80                               }, { vpblendmq zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x64, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpblendmq zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x64, 0x72, 0x7f                               }, { vpblendmq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x64, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpblendmq zmm30,zmm29,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x64, 0x72, 0x80                               }, { vpblendmq zmm30,zmm29,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x64, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpblendmq zmm30,zmm29,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x8b, 0x31                                     }, { vpcompressd ZWORD rcx,zmm30                                }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x8b, 0x31                                     }, { vpcompressd ZWORD rcx{k7},zmm30                            }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x8b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpcompressd ZWORD rax+r14*8+0x123,zmm30                    }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x8b, 0x72, 0x7f                               }, { vpcompressd ZWORD rdx+0x1fc,zmm30                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x8b, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpcompressd ZWORD rdx+0x200,zmm30                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x8b, 0x72, 0x80                               }, { vpcompressd ZWORD rdx-0x200,zmm30                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x8b, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpcompressd ZWORD rdx-0x204,zmm30                          }
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0x8b, 0xee                                     }, { vpcompressd zmm30,zmm29                                      }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x8b, 0xee                                     }, { vpcompressd zmm30{k7},zmm29                                  }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x8b, 0xee                                     }, { vpcompressd zmm30{k7}{z},zmm29                               }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x36, 0xf4                                     }, { vpermd zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x36, 0xf4                                     }, { vpermd zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x36, 0xf4                                     }, { vpermd zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x36, 0x31                                     }, { vpermd zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x36, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermd zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x36, 0x31                                     }, { vpermd zmm30,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x36, 0x72, 0x7f                               }, { vpermd zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x36, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermd zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x36, 0x72, 0x80                               }, { vpermd zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x36, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermd zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x36, 0x72, 0x7f                               }, { vpermd zmm30,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x36, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpermd zmm30,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x36, 0x72, 0x80                               }, { vpermd zmm30,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x36, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpermd zmm30,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x03, 0xfd, 0x48, 0x05, 0xf5, 0xab                               }, { vpermilpd zmm30,zmm29,0xab                                   }
+testcase	{ 0x62, 0x03, 0xfd, 0x4f, 0x05, 0xf5, 0xab                               }, { vpermilpd zmm30{k7},zmm29,0xab                               }
+testcase	{ 0x62, 0x03, 0xfd, 0xcf, 0x05, 0xf5, 0xab                               }, { vpermilpd zmm30{k7}{z},zmm29,0xab                            }
+testcase	{ 0x62, 0x03, 0xfd, 0x48, 0x05, 0xf5, 0x7b                               }, { vpermilpd zmm30,zmm29,0x7b                                   }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x05, 0x31, 0x7b                               }, { vpermilpd zmm30,ZWORD rcx,0x7b                             }
+testcase	{ 0x62, 0x23, 0xfd, 0x48, 0x05, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpermilpd zmm30,ZWORD rax+r14*8+0x123,0x7b                 }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x05, 0x31, 0x7b                               }, { vpermilpd zmm30,QWORD rcx{1to8},0x7b                       }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x05, 0x72, 0x7f, 0x7b                         }, { vpermilpd zmm30,ZWORD rdx+0x1fc0,0x7b                      }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x05, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpermilpd zmm30,ZWORD rdx+0x2000,0x7b                      }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x05, 0x72, 0x80, 0x7b                         }, { vpermilpd zmm30,ZWORD rdx-0x2000,0x7b                      }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x05, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpermilpd zmm30,ZWORD rdx-0x2040,0x7b                      }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x05, 0x72, 0x7f, 0x7b                         }, { vpermilpd zmm30,QWORD rdx+0x3f8{1to8},0x7b                 }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x05, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vpermilpd zmm30,QWORD rdx+0x400{1to8},0x7b                 }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x05, 0x72, 0x80, 0x7b                         }, { vpermilpd zmm30,QWORD rdx-0x400{1to8},0x7b                 }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x05, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vpermilpd zmm30,QWORD rdx-0x408{1to8},0x7b                 }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x0d, 0xf4                                     }, { vpermilpd zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x0d, 0xf4                                     }, { vpermilpd zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x0d, 0xf4                                     }, { vpermilpd zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x0d, 0x31                                     }, { vpermilpd zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x0d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermilpd zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x0d, 0x31                                     }, { vpermilpd zmm30,zmm29,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x0d, 0x72, 0x7f                               }, { vpermilpd zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x0d, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermilpd zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x0d, 0x72, 0x80                               }, { vpermilpd zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x0d, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermilpd zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x0d, 0x72, 0x7f                               }, { vpermilpd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x0d, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpermilpd zmm30,zmm29,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x0d, 0x72, 0x80                               }, { vpermilpd zmm30,zmm29,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x0d, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpermilpd zmm30,zmm29,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x03, 0x7d, 0x48, 0x04, 0xf5, 0xab                               }, { vpermilps zmm30,zmm29,0xab                                   }
+testcase	{ 0x62, 0x03, 0x7d, 0x4f, 0x04, 0xf5, 0xab                               }, { vpermilps zmm30{k7},zmm29,0xab                               }
+testcase	{ 0x62, 0x03, 0x7d, 0xcf, 0x04, 0xf5, 0xab                               }, { vpermilps zmm30{k7}{z},zmm29,0xab                            }
+testcase	{ 0x62, 0x03, 0x7d, 0x48, 0x04, 0xf5, 0x7b                               }, { vpermilps zmm30,zmm29,0x7b                                   }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x04, 0x31, 0x7b                               }, { vpermilps zmm30,ZWORD rcx,0x7b                             }
+testcase	{ 0x62, 0x23, 0x7d, 0x48, 0x04, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpermilps zmm30,ZWORD rax+r14*8+0x123,0x7b                 }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x04, 0x31, 0x7b                               }, { vpermilps zmm30,DWORD rcx{1to16},0x7b                      }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x04, 0x72, 0x7f, 0x7b                         }, { vpermilps zmm30,ZWORD rdx+0x1fc0,0x7b                      }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x04, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpermilps zmm30,ZWORD rdx+0x2000,0x7b                      }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x04, 0x72, 0x80, 0x7b                         }, { vpermilps zmm30,ZWORD rdx-0x2000,0x7b                      }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x04, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpermilps zmm30,ZWORD rdx-0x2040,0x7b                      }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x04, 0x72, 0x7f, 0x7b                         }, { vpermilps zmm30,DWORD rdx+0x1fc{1to16},0x7b                }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x04, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vpermilps zmm30,DWORD rdx+0x200{1to16},0x7b                }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x04, 0x72, 0x80, 0x7b                         }, { vpermilps zmm30,DWORD rdx-0x200{1to16},0x7b                }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x04, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vpermilps zmm30,DWORD rdx-0x204{1to16},0x7b                }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x0c, 0xf4                                     }, { vpermilps zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x0c, 0xf4                                     }, { vpermilps zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x0c, 0xf4                                     }, { vpermilps zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x0c, 0x31                                     }, { vpermilps zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x0c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermilps zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x0c, 0x31                                     }, { vpermilps zmm30,zmm29,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x0c, 0x72, 0x7f                               }, { vpermilps zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x0c, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermilps zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x0c, 0x72, 0x80                               }, { vpermilps zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x0c, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermilps zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x0c, 0x72, 0x7f                               }, { vpermilps zmm30,zmm29,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x0c, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpermilps zmm30,zmm29,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x0c, 0x72, 0x80                               }, { vpermilps zmm30,zmm29,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x0c, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpermilps zmm30,zmm29,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x03, 0xfd, 0x48, 0x01, 0xf5, 0xab                               }, { vpermpd zmm30,zmm29,0xab                                     }
+testcase	{ 0x62, 0x03, 0xfd, 0x4f, 0x01, 0xf5, 0xab                               }, { vpermpd zmm30{k7},zmm29,0xab                                 }
+testcase	{ 0x62, 0x03, 0xfd, 0xcf, 0x01, 0xf5, 0xab                               }, { vpermpd zmm30{k7}{z},zmm29,0xab                              }
+testcase	{ 0x62, 0x03, 0xfd, 0x48, 0x01, 0xf5, 0x7b                               }, { vpermpd zmm30,zmm29,0x7b                                     }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x01, 0x31, 0x7b                               }, { vpermpd zmm30,ZWORD rcx,0x7b                               }
+testcase	{ 0x62, 0x23, 0xfd, 0x48, 0x01, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpermpd zmm30,ZWORD rax+r14*8+0x123,0x7b                   }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x01, 0x31, 0x7b                               }, { vpermpd zmm30,QWORD rcx{1to8},0x7b                         }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x01, 0x72, 0x7f, 0x7b                         }, { vpermpd zmm30,ZWORD rdx+0x1fc0,0x7b                        }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x01, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpermpd zmm30,ZWORD rdx+0x2000,0x7b                        }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x01, 0x72, 0x80, 0x7b                         }, { vpermpd zmm30,ZWORD rdx-0x2000,0x7b                        }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x01, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpermpd zmm30,ZWORD rdx-0x2040,0x7b                        }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x01, 0x72, 0x7f, 0x7b                         }, { vpermpd zmm30,QWORD rdx+0x3f8{1to8},0x7b                   }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x01, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vpermpd zmm30,QWORD rdx+0x400{1to8},0x7b                   }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x01, 0x72, 0x80, 0x7b                         }, { vpermpd zmm30,QWORD rdx-0x400{1to8},0x7b                   }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x01, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vpermpd zmm30,QWORD rdx-0x408{1to8},0x7b                   }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x16, 0xf4                                     }, { vpermps zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x16, 0xf4                                     }, { vpermps zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x16, 0xf4                                     }, { vpermps zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x16, 0x31                                     }, { vpermps zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x16, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermps zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x16, 0x31                                     }, { vpermps zmm30,zmm29,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x16, 0x72, 0x7f                               }, { vpermps zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x16, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermps zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x16, 0x72, 0x80                               }, { vpermps zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x16, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermps zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x16, 0x72, 0x7f                               }, { vpermps zmm30,zmm29,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x16, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpermps zmm30,zmm29,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x16, 0x72, 0x80                               }, { vpermps zmm30,zmm29,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x16, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpermps zmm30,zmm29,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x03, 0xfd, 0x48, 0x00, 0xf5, 0xab                               }, { vpermq zmm30,zmm29,0xab                                      }
+testcase	{ 0x62, 0x03, 0xfd, 0x4f, 0x00, 0xf5, 0xab                               }, { vpermq zmm30{k7},zmm29,0xab                                  }
+testcase	{ 0x62, 0x03, 0xfd, 0xcf, 0x00, 0xf5, 0xab                               }, { vpermq zmm30{k7}{z},zmm29,0xab                               }
+testcase	{ 0x62, 0x03, 0xfd, 0x48, 0x00, 0xf5, 0x7b                               }, { vpermq zmm30,zmm29,0x7b                                      }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x00, 0x31, 0x7b                               }, { vpermq zmm30,ZWORD rcx,0x7b                                }
+testcase	{ 0x62, 0x23, 0xfd, 0x48, 0x00, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpermq zmm30,ZWORD rax+r14*8+0x123,0x7b                    }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x00, 0x31, 0x7b                               }, { vpermq zmm30,QWORD rcx{1to8},0x7b                          }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x00, 0x72, 0x7f, 0x7b                         }, { vpermq zmm30,ZWORD rdx+0x1fc0,0x7b                         }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x00, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpermq zmm30,ZWORD rdx+0x2000,0x7b                         }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x00, 0x72, 0x80, 0x7b                         }, { vpermq zmm30,ZWORD rdx-0x2000,0x7b                         }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x00, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpermq zmm30,ZWORD rdx-0x2040,0x7b                         }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x00, 0x72, 0x7f, 0x7b                         }, { vpermq zmm30,QWORD rdx+0x3f8{1to8},0x7b                    }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x00, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vpermq zmm30,QWORD rdx+0x400{1to8},0x7b                    }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x00, 0x72, 0x80, 0x7b                         }, { vpermq zmm30,QWORD rdx-0x400{1to8},0x7b                    }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x00, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vpermq zmm30,QWORD rdx-0x408{1to8},0x7b                    }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x89, 0x31                                     }, { vpexpandd zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x89, 0x31                                     }, { vpexpandd zmm30{k7},ZWORD rcx                              }
+testcase	{ 0x62, 0x62, 0x7d, 0xcf, 0x89, 0x31                                     }, { vpexpandd zmm30{k7}{z},ZWORD rcx                           }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x89, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpexpandd zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x89, 0x72, 0x7f                               }, { vpexpandd zmm30,ZWORD rdx+0x1fc                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x89, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpexpandd zmm30,ZWORD rdx+0x200                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x89, 0x72, 0x80                               }, { vpexpandd zmm30,ZWORD rdx-0x200                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x89, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpexpandd zmm30,ZWORD rdx-0x204                            }
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0x89, 0xf5                                     }, { vpexpandd zmm30,zmm29                                        }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x89, 0xf5                                     }, { vpexpandd zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x89, 0xf5                                     }, { vpexpandd zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x89, 0x31                                     }, { vpexpandq zmm30,ZWORD rcx                                  }
+testcase	{ 0x62, 0x62, 0xfd, 0x4f, 0x89, 0x31                                     }, { vpexpandq zmm30{k7},ZWORD rcx                              }
+testcase	{ 0x62, 0x62, 0xfd, 0xcf, 0x89, 0x31                                     }, { vpexpandq zmm30{k7}{z},ZWORD rcx                           }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x89, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpexpandq zmm30,ZWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x89, 0x72, 0x7f                               }, { vpexpandq zmm30,ZWORD rdx+0x3f8                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x89, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpexpandq zmm30,ZWORD rdx+0x400                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x89, 0x72, 0x80                               }, { vpexpandq zmm30,ZWORD rdx-0x400                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x89, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpexpandq zmm30,ZWORD rdx-0x408                            }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0x89, 0xf5                                     }, { vpexpandq zmm30,zmm29                                        }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0x89, 0xf5                                     }, { vpexpandq zmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0x89, 0xf5                                     }, { vpexpandq zmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x02, 0x7d, 0x41, 0x90, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vpgatherdd zmm30{k1}, r14+zmm31*8+0x7b                     }
+testcase	{ 0x62, 0x02, 0x7d, 0x41, 0x90, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vpgatherdd zmm30{k1}, r14+zmm31*8+0x7b                     }
+testcase	{ 0x62, 0x02, 0x7d, 0x41, 0x90, 0x74, 0x39, 0x40                         }, { vpgatherdd zmm30{k1}, r9+zmm31*1+0x100                     }
+testcase	{ 0x62, 0x22, 0x7d, 0x41, 0x90, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vpgatherdd zmm30{k1}, rcx+zmm31*4+0x400                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0x90, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vpgatherdq zmm30{k1}, r14+ymm31*8+0x7b                     }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0x90, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vpgatherdq zmm30{k1}, r14+ymm31*8+0x7b                     }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0x90, 0x74, 0x39, 0x20                         }, { vpgatherdq zmm30{k1}, r9+ymm31*1+0x100                     }
+testcase	{ 0x62, 0x22, 0xfd, 0x41, 0x90, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vpgatherdq zmm30{k1}, rcx+ymm31*4+0x400                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0x91, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vpgatherqq zmm30{k1}, r14+zmm31*8+0x7b                     }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0x91, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vpgatherqq zmm30{k1}, r14+zmm31*8+0x7b                     }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0x91, 0x74, 0x39, 0x20                         }, { vpgatherqq zmm30{k1}, r9+zmm31*1+0x100                     }
+testcase	{ 0x62, 0x22, 0xfd, 0x41, 0x91, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vpgatherqq zmm30{k1}, rcx+zmm31*4+0x400                    }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x3d, 0xf4                                     }, { vpmaxsd zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x3d, 0xf4                                     }, { vpmaxsd zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x3d, 0xf4                                     }, { vpmaxsd zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3d, 0x31                                     }, { vpmaxsd zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x3d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmaxsd zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3d, 0x31                                     }, { vpmaxsd zmm30,zmm29,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3d, 0x72, 0x7f                               }, { vpmaxsd zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3d, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpmaxsd zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3d, 0x72, 0x80                               }, { vpmaxsd zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3d, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpmaxsd zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3d, 0x72, 0x7f                               }, { vpmaxsd zmm30,zmm29,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3d, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpmaxsd zmm30,zmm29,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3d, 0x72, 0x80                               }, { vpmaxsd zmm30,zmm29,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3d, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpmaxsd zmm30,zmm29,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x3d, 0xf4                                     }, { vpmaxsq zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x3d, 0xf4                                     }, { vpmaxsq zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x3d, 0xf4                                     }, { vpmaxsq zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3d, 0x31                                     }, { vpmaxsq zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x3d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmaxsq zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3d, 0x31                                     }, { vpmaxsq zmm30,zmm29,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3d, 0x72, 0x7f                               }, { vpmaxsq zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3d, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpmaxsq zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3d, 0x72, 0x80                               }, { vpmaxsq zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3d, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpmaxsq zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3d, 0x72, 0x7f                               }, { vpmaxsq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3d, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpmaxsq zmm30,zmm29,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3d, 0x72, 0x80                               }, { vpmaxsq zmm30,zmm29,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3d, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpmaxsq zmm30,zmm29,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x3f, 0xf4                                     }, { vpmaxud zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x3f, 0xf4                                     }, { vpmaxud zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x3f, 0xf4                                     }, { vpmaxud zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3f, 0x31                                     }, { vpmaxud zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x3f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmaxud zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3f, 0x31                                     }, { vpmaxud zmm30,zmm29,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3f, 0x72, 0x7f                               }, { vpmaxud zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpmaxud zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3f, 0x72, 0x80                               }, { vpmaxud zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpmaxud zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3f, 0x72, 0x7f                               }, { vpmaxud zmm30,zmm29,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3f, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpmaxud zmm30,zmm29,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3f, 0x72, 0x80                               }, { vpmaxud zmm30,zmm29,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3f, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpmaxud zmm30,zmm29,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x3f, 0xf4                                     }, { vpmaxuq zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x3f, 0xf4                                     }, { vpmaxuq zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x3f, 0xf4                                     }, { vpmaxuq zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3f, 0x31                                     }, { vpmaxuq zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x3f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmaxuq zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3f, 0x31                                     }, { vpmaxuq zmm30,zmm29,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3f, 0x72, 0x7f                               }, { vpmaxuq zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpmaxuq zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3f, 0x72, 0x80                               }, { vpmaxuq zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpmaxuq zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3f, 0x72, 0x7f                               }, { vpmaxuq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3f, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpmaxuq zmm30,zmm29,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3f, 0x72, 0x80                               }, { vpmaxuq zmm30,zmm29,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3f, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpmaxuq zmm30,zmm29,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x39, 0xf4                                     }, { vpminsd zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x39, 0xf4                                     }, { vpminsd zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x39, 0xf4                                     }, { vpminsd zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x39, 0x31                                     }, { vpminsd zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x39, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpminsd zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x39, 0x31                                     }, { vpminsd zmm30,zmm29,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x39, 0x72, 0x7f                               }, { vpminsd zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x39, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpminsd zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x39, 0x72, 0x80                               }, { vpminsd zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x39, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpminsd zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x39, 0x72, 0x7f                               }, { vpminsd zmm30,zmm29,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x39, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpminsd zmm30,zmm29,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x39, 0x72, 0x80                               }, { vpminsd zmm30,zmm29,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x39, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpminsd zmm30,zmm29,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x39, 0xf4                                     }, { vpminsq zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x39, 0xf4                                     }, { vpminsq zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x39, 0xf4                                     }, { vpminsq zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x39, 0x31                                     }, { vpminsq zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x39, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpminsq zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x39, 0x31                                     }, { vpminsq zmm30,zmm29,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x39, 0x72, 0x7f                               }, { vpminsq zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x39, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpminsq zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x39, 0x72, 0x80                               }, { vpminsq zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x39, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpminsq zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x39, 0x72, 0x7f                               }, { vpminsq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x39, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpminsq zmm30,zmm29,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x39, 0x72, 0x80                               }, { vpminsq zmm30,zmm29,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x39, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpminsq zmm30,zmm29,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x3b, 0xf4                                     }, { vpminud zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x3b, 0xf4                                     }, { vpminud zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x3b, 0xf4                                     }, { vpminud zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3b, 0x31                                     }, { vpminud zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x3b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpminud zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3b, 0x31                                     }, { vpminud zmm30,zmm29,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3b, 0x72, 0x7f                               }, { vpminud zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3b, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpminud zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3b, 0x72, 0x80                               }, { vpminud zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x3b, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpminud zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3b, 0x72, 0x7f                               }, { vpminud zmm30,zmm29,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3b, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpminud zmm30,zmm29,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3b, 0x72, 0x80                               }, { vpminud zmm30,zmm29,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x3b, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpminud zmm30,zmm29,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x3b, 0xf4                                     }, { vpminuq zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x3b, 0xf4                                     }, { vpminuq zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x3b, 0xf4                                     }, { vpminuq zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3b, 0x31                                     }, { vpminuq zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x3b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpminuq zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3b, 0x31                                     }, { vpminuq zmm30,zmm29,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3b, 0x72, 0x7f                               }, { vpminuq zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3b, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpminuq zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3b, 0x72, 0x80                               }, { vpminuq zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x3b, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpminuq zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3b, 0x72, 0x7f                               }, { vpminuq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3b, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpminuq zmm30,zmm29,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3b, 0x72, 0x80                               }, { vpminuq zmm30,zmm29,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x3b, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpminuq zmm30,zmm29,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x21, 0xf5                                     }, { vpmovsxbd zmm30{k7},xmm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x21, 0xf5                                     }, { vpmovsxbd zmm30{k7}{z},xmm29                                 }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x21, 0x31                                     }, { vpmovsxbd zmm30{k7},OWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x7d, 0x4f, 0x21, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovsxbd zmm30{k7},OWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x21, 0x72, 0x7f                               }, { vpmovsxbd zmm30{k7},OWORD rdx+0x7f0                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x21, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpmovsxbd zmm30{k7},OWORD rdx+0x800                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x21, 0x72, 0x80                               }, { vpmovsxbd zmm30{k7},OWORD rdx-0x800                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x21, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpmovsxbd zmm30{k7},OWORD rdx-0x810                        }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x22, 0xf5                                     }, { vpmovsxbq zmm30{k7},xmm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x22, 0xf5                                     }, { vpmovsxbq zmm30{k7}{z},xmm29                                 }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x22, 0x31                                     }, { vpmovsxbq zmm30{k7},QWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x7d, 0x4f, 0x22, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovsxbq zmm30{k7},QWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x22, 0x72, 0x7f                               }, { vpmovsxbq zmm30{k7},QWORD rdx+0x3f8                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x22, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpmovsxbq zmm30{k7},QWORD rdx+0x400                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x22, 0x72, 0x80                               }, { vpmovsxbq zmm30{k7},QWORD rdx-0x400                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x22, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpmovsxbq zmm30{k7},QWORD rdx-0x408                        }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x25, 0xf5                                     }, { vpmovsxdq zmm30{k7},ymm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x25, 0xf5                                     }, { vpmovsxdq zmm30{k7}{z},ymm29                                 }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x25, 0x31                                     }, { vpmovsxdq zmm30{k7},YWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x7d, 0x4f, 0x25, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovsxdq zmm30{k7},YWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x25, 0x72, 0x7f                               }, { vpmovsxdq zmm30{k7},YWORD rdx+0xfe0                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x25, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vpmovsxdq zmm30{k7},YWORD rdx+0x1000                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x25, 0x72, 0x80                               }, { vpmovsxdq zmm30{k7},YWORD rdx-0x1000                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x25, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vpmovsxdq zmm30{k7},YWORD rdx-0x1020                       }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x23, 0xf5                                     }, { vpmovsxwd zmm30{k7},ymm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x23, 0xf5                                     }, { vpmovsxwd zmm30{k7}{z},ymm29                                 }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x23, 0x31                                     }, { vpmovsxwd zmm30{k7},YWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x7d, 0x4f, 0x23, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovsxwd zmm30{k7},YWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x23, 0x72, 0x7f                               }, { vpmovsxwd zmm30{k7},YWORD rdx+0xfe0                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x23, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vpmovsxwd zmm30{k7},YWORD rdx+0x1000                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x23, 0x72, 0x80                               }, { vpmovsxwd zmm30{k7},YWORD rdx-0x1000                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x23, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vpmovsxwd zmm30{k7},YWORD rdx-0x1020                       }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x24, 0xf5                                     }, { vpmovsxwq zmm30{k7},xmm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x24, 0xf5                                     }, { vpmovsxwq zmm30{k7}{z},xmm29                                 }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x24, 0x31                                     }, { vpmovsxwq zmm30{k7},OWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x7d, 0x4f, 0x24, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovsxwq zmm30{k7},OWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x24, 0x72, 0x7f                               }, { vpmovsxwq zmm30{k7},OWORD rdx+0x7f0                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x24, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpmovsxwq zmm30{k7},OWORD rdx+0x800                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x24, 0x72, 0x80                               }, { vpmovsxwq zmm30{k7},OWORD rdx-0x800                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x24, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpmovsxwq zmm30{k7},OWORD rdx-0x810                        }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x31, 0xf5                                     }, { vpmovzxbd zmm30{k7},xmm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x31, 0xf5                                     }, { vpmovzxbd zmm30{k7}{z},xmm29                                 }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x31, 0x31                                     }, { vpmovzxbd zmm30{k7},OWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x7d, 0x4f, 0x31, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovzxbd zmm30{k7},OWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x31, 0x72, 0x7f                               }, { vpmovzxbd zmm30{k7},OWORD rdx+0x7f0                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x31, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpmovzxbd zmm30{k7},OWORD rdx+0x800                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x31, 0x72, 0x80                               }, { vpmovzxbd zmm30{k7},OWORD rdx-0x800                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x31, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpmovzxbd zmm30{k7},OWORD rdx-0x810                        }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x32, 0xf5                                     }, { vpmovzxbq zmm30{k7},xmm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x32, 0xf5                                     }, { vpmovzxbq zmm30{k7}{z},xmm29                                 }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x32, 0x31                                     }, { vpmovzxbq zmm30{k7},QWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x7d, 0x4f, 0x32, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovzxbq zmm30{k7},QWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x32, 0x72, 0x7f                               }, { vpmovzxbq zmm30{k7},QWORD rdx+0x3f8                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x32, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpmovzxbq zmm30{k7},QWORD rdx+0x400                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x32, 0x72, 0x80                               }, { vpmovzxbq zmm30{k7},QWORD rdx-0x400                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x32, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpmovzxbq zmm30{k7},QWORD rdx-0x408                        }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x35, 0xf5                                     }, { vpmovzxdq zmm30{k7},ymm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x35, 0xf5                                     }, { vpmovzxdq zmm30{k7}{z},ymm29                                 }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x35, 0x31                                     }, { vpmovzxdq zmm30{k7},YWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x7d, 0x4f, 0x35, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovzxdq zmm30{k7},YWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x35, 0x72, 0x7f                               }, { vpmovzxdq zmm30{k7},YWORD rdx+0xfe0                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x35, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vpmovzxdq zmm30{k7},YWORD rdx+0x1000                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x35, 0x72, 0x80                               }, { vpmovzxdq zmm30{k7},YWORD rdx-0x1000                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x35, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vpmovzxdq zmm30{k7},YWORD rdx-0x1020                       }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x33, 0xf5                                     }, { vpmovzxwd zmm30{k7},ymm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x33, 0xf5                                     }, { vpmovzxwd zmm30{k7}{z},ymm29                                 }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x33, 0x31                                     }, { vpmovzxwd zmm30{k7},YWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x7d, 0x4f, 0x33, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovzxwd zmm30{k7},YWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x33, 0x72, 0x7f                               }, { vpmovzxwd zmm30{k7},YWORD rdx+0xfe0                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x33, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vpmovzxwd zmm30{k7},YWORD rdx+0x1000                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x33, 0x72, 0x80                               }, { vpmovzxwd zmm30{k7},YWORD rdx-0x1000                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x33, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vpmovzxwd zmm30{k7},YWORD rdx-0x1020                       }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x34, 0xf5                                     }, { vpmovzxwq zmm30{k7},xmm29                                    }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x34, 0xf5                                     }, { vpmovzxwq zmm30{k7}{z},xmm29                                 }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x34, 0x31                                     }, { vpmovzxwq zmm30{k7},OWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x7d, 0x4f, 0x34, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovzxwq zmm30{k7},OWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x34, 0x72, 0x7f                               }, { vpmovzxwq zmm30{k7},OWORD rdx+0x7f0                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x34, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpmovzxwq zmm30{k7},OWORD rdx+0x800                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x34, 0x72, 0x80                               }, { vpmovzxwq zmm30{k7},OWORD rdx-0x800                        }
+testcase	{ 0x62, 0x62, 0x7d, 0x4f, 0x34, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpmovzxwq zmm30{k7},OWORD rdx-0x810                        }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x28, 0xf4                                     }, { vpmuldq zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x28, 0xf4                                     }, { vpmuldq zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x28, 0xf4                                     }, { vpmuldq zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x28, 0x31                                     }, { vpmuldq zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x28, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmuldq zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x28, 0x31                                     }, { vpmuldq zmm30,zmm29,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x28, 0x72, 0x7f                               }, { vpmuldq zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x28, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpmuldq zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x28, 0x72, 0x80                               }, { vpmuldq zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x28, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpmuldq zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x28, 0x72, 0x7f                               }, { vpmuldq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x28, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpmuldq zmm30,zmm29,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x28, 0x72, 0x80                               }, { vpmuldq zmm30,zmm29,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x28, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpmuldq zmm30,zmm29,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x40, 0xf4                                     }, { vpmulld zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x40, 0xf4                                     }, { vpmulld zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x40, 0xf4                                     }, { vpmulld zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x40, 0x31                                     }, { vpmulld zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x40, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmulld zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x40, 0x31                                     }, { vpmulld zmm30,zmm29,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x40, 0x72, 0x7f                               }, { vpmulld zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x40, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpmulld zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x40, 0x72, 0x80                               }, { vpmulld zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x40, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpmulld zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x40, 0x72, 0x7f                               }, { vpmulld zmm30,zmm29,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x40, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpmulld zmm30,zmm29,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x40, 0x72, 0x80                               }, { vpmulld zmm30,zmm29,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x40, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpmulld zmm30,zmm29,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0xf4, 0xf4                                     }, { vpmuludq zmm30,zmm29,zmm28                                   }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0xf4, 0xf4                                     }, { vpmuludq zmm30{k7},zmm29,zmm28                               }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0xf4, 0xf4                                     }, { vpmuludq zmm30{k7}{z},zmm29,zmm28                            }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xf4, 0x31                                     }, { vpmuludq zmm30,zmm29,ZWORD rcx                             }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0xf4, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmuludq zmm30,zmm29,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xf4, 0x31                                     }, { vpmuludq zmm30,zmm29,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xf4, 0x72, 0x7f                               }, { vpmuludq zmm30,zmm29,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xf4, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpmuludq zmm30,zmm29,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xf4, 0x72, 0x80                               }, { vpmuludq zmm30,zmm29,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xf4, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpmuludq zmm30,zmm29,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xf4, 0x72, 0x7f                               }, { vpmuludq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xf4, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpmuludq zmm30,zmm29,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xf4, 0x72, 0x80                               }, { vpmuludq zmm30,zmm29,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xf4, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpmuludq zmm30,zmm29,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x01, 0x15, 0x40, 0xeb, 0xf4                                     }, { vpord  zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x15, 0x47, 0xeb, 0xf4                                     }, { vpord  zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x15, 0xc7, 0xeb, 0xf4                                     }, { vpord  zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xeb, 0x31                                     }, { vpord  zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x15, 0x40, 0xeb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpord  zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xeb, 0x31                                     }, { vpord  zmm30,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xeb, 0x72, 0x7f                               }, { vpord  zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xeb, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpord  zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xeb, 0x72, 0x80                               }, { vpord  zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xeb, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpord  zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xeb, 0x72, 0x7f                               }, { vpord  zmm30,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xeb, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpord  zmm30,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xeb, 0x72, 0x80                               }, { vpord  zmm30,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xeb, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpord  zmm30,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0xeb, 0xf4                                     }, { vporq  zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0xeb, 0xf4                                     }, { vporq  zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0xeb, 0xf4                                     }, { vporq  zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xeb, 0x31                                     }, { vporq  zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0xeb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vporq  zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xeb, 0x31                                     }, { vporq  zmm30,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xeb, 0x72, 0x7f                               }, { vporq  zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xeb, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vporq  zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xeb, 0x72, 0x80                               }, { vporq  zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xeb, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vporq  zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xeb, 0x72, 0x7f                               }, { vporq  zmm30,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xeb, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vporq  zmm30,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xeb, 0x72, 0x80                               }, { vporq  zmm30,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xeb, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vporq  zmm30,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x02, 0x7d, 0x41, 0xa0, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vpscatterdd  r14+zmm31*8+0x7b{k1},zmm30                    }
+testcase	{ 0x62, 0x02, 0x7d, 0x41, 0xa0, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vpscatterdd  r14+zmm31*8+0x7b{k1},zmm30                    }
+testcase	{ 0x62, 0x02, 0x7d, 0x41, 0xa0, 0x74, 0x39, 0x40                         }, { vpscatterdd  r9+zmm31*1+0x100{k1},zmm30                    }
+testcase	{ 0x62, 0x22, 0x7d, 0x41, 0xa0, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vpscatterdd  rcx+zmm31*4+0x400{k1},zmm30                   }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0xa0, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vpscatterdq  r14+ymm31*8+0x7b{k1},zmm30                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0xa0, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vpscatterdq  r14+ymm31*8+0x7b{k1},zmm30                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0xa0, 0x74, 0x39, 0x20                         }, { vpscatterdq  r9+ymm31*1+0x100{k1},zmm30                    }
+testcase	{ 0x62, 0x22, 0xfd, 0x41, 0xa0, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vpscatterdq  rcx+ymm31*4+0x400{k1},zmm30                   }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0xa1, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vpscatterqq  r14+zmm31*8+0x7b{k1},zmm30                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0xa1, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vpscatterqq  r14+zmm31*8+0x7b{k1},zmm30                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0xa1, 0x74, 0x39, 0x20                         }, { vpscatterqq  r9+zmm31*1+0x100{k1},zmm30                    }
+testcase	{ 0x62, 0x22, 0xfd, 0x41, 0xa1, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vpscatterqq  rcx+zmm31*4+0x400{k1},zmm30                   }
+testcase	{ 0x62, 0x01, 0x7d, 0x48, 0x70, 0xf5, 0xab                               }, { vpshufd zmm30,zmm29,0xab                                     }
+testcase	{ 0x62, 0x01, 0x7d, 0x4f, 0x70, 0xf5, 0xab                               }, { vpshufd zmm30{k7},zmm29,0xab                                 }
+testcase	{ 0x62, 0x01, 0x7d, 0xcf, 0x70, 0xf5, 0xab                               }, { vpshufd zmm30{k7}{z},zmm29,0xab                              }
+testcase	{ 0x62, 0x01, 0x7d, 0x48, 0x70, 0xf5, 0x7b                               }, { vpshufd zmm30,zmm29,0x7b                                     }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x70, 0x31, 0x7b                               }, { vpshufd zmm30,ZWORD rcx,0x7b                               }
+testcase	{ 0x62, 0x21, 0x7d, 0x48, 0x70, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpshufd zmm30,ZWORD rax+r14*8+0x123,0x7b                   }
+testcase	{ 0x62, 0x61, 0x7d, 0x58, 0x70, 0x31, 0x7b                               }, { vpshufd zmm30,DWORD rcx{1to16},0x7b                        }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x70, 0x72, 0x7f, 0x7b                         }, { vpshufd zmm30,ZWORD rdx+0x1fc0,0x7b                        }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x70, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpshufd zmm30,ZWORD rdx+0x2000,0x7b                        }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x70, 0x72, 0x80, 0x7b                         }, { vpshufd zmm30,ZWORD rdx-0x2000,0x7b                        }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x70, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpshufd zmm30,ZWORD rdx-0x2040,0x7b                        }
+testcase	{ 0x62, 0x61, 0x7d, 0x58, 0x70, 0x72, 0x7f, 0x7b                         }, { vpshufd zmm30,DWORD rdx+0x1fc{1to16},0x7b                  }
+testcase	{ 0x62, 0x61, 0x7d, 0x58, 0x70, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vpshufd zmm30,DWORD rdx+0x200{1to16},0x7b                  }
+testcase	{ 0x62, 0x61, 0x7d, 0x58, 0x70, 0x72, 0x80, 0x7b                         }, { vpshufd zmm30,DWORD rdx-0x200{1to16},0x7b                  }
+testcase	{ 0x62, 0x61, 0x7d, 0x58, 0x70, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vpshufd zmm30,DWORD rdx-0x204{1to16},0x7b                  }
+testcase	{ 0x62, 0x01, 0x15, 0x47, 0xf2, 0xf4                                     }, { vpslld zmm30{k7},zmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x15, 0xc7, 0xf2, 0xf4                                     }, { vpslld zmm30{k7}{z},zmm29,xmm28                              }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xf2, 0x31                                     }, { vpslld zmm30{k7},zmm29,OWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x15, 0x47, 0xf2, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpslld zmm30{k7},zmm29,OWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xf2, 0x72, 0x7f                               }, { vpslld zmm30{k7},zmm29,OWORD rdx+0x7f0                     }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xf2, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpslld zmm30{k7},zmm29,OWORD rdx+0x800                     }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xf2, 0x72, 0x80                               }, { vpslld zmm30{k7},zmm29,OWORD rdx-0x800                     }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xf2, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpslld zmm30{k7},zmm29,OWORD rdx-0x810                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0xf3, 0xf4                                     }, { vpsllq zmm30{k7},zmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0xf3, 0xf4                                     }, { vpsllq zmm30{k7}{z},zmm29,xmm28                              }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xf3, 0x31                                     }, { vpsllq zmm30{k7},zmm29,OWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x95, 0x47, 0xf3, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsllq zmm30{k7},zmm29,OWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xf3, 0x72, 0x7f                               }, { vpsllq zmm30{k7},zmm29,OWORD rdx+0x7f0                     }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xf3, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpsllq zmm30{k7},zmm29,OWORD rdx+0x800                     }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xf3, 0x72, 0x80                               }, { vpsllq zmm30{k7},zmm29,OWORD rdx-0x800                     }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xf3, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpsllq zmm30{k7},zmm29,OWORD rdx-0x810                     }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x47, 0xf4                                     }, { vpsllvd zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x47, 0xf4                                     }, { vpsllvd zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x47, 0xf4                                     }, { vpsllvd zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x47, 0x31                                     }, { vpsllvd zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x47, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsllvd zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x47, 0x31                                     }, { vpsllvd zmm30,zmm29,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x47, 0x72, 0x7f                               }, { vpsllvd zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x47, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpsllvd zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x47, 0x72, 0x80                               }, { vpsllvd zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x47, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpsllvd zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x47, 0x72, 0x7f                               }, { vpsllvd zmm30,zmm29,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x47, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpsllvd zmm30,zmm29,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x47, 0x72, 0x80                               }, { vpsllvd zmm30,zmm29,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x47, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpsllvd zmm30,zmm29,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x47, 0xf4                                     }, { vpsllvq zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x47, 0xf4                                     }, { vpsllvq zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x47, 0xf4                                     }, { vpsllvq zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x47, 0x31                                     }, { vpsllvq zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x47, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsllvq zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x47, 0x31                                     }, { vpsllvq zmm30,zmm29,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x47, 0x72, 0x7f                               }, { vpsllvq zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x47, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpsllvq zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x47, 0x72, 0x80                               }, { vpsllvq zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x47, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpsllvq zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x47, 0x72, 0x7f                               }, { vpsllvq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x47, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpsllvq zmm30,zmm29,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x47, 0x72, 0x80                               }, { vpsllvq zmm30,zmm29,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x47, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpsllvq zmm30,zmm29,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x01, 0x15, 0x47, 0xe2, 0xf4                                     }, { vpsrad zmm30{k7},zmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x15, 0xc7, 0xe2, 0xf4                                     }, { vpsrad zmm30{k7}{z},zmm29,xmm28                              }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xe2, 0x31                                     }, { vpsrad zmm30{k7},zmm29,OWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x15, 0x47, 0xe2, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsrad zmm30{k7},zmm29,OWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xe2, 0x72, 0x7f                               }, { vpsrad zmm30{k7},zmm29,OWORD rdx+0x7f0                     }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xe2, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpsrad zmm30{k7},zmm29,OWORD rdx+0x800                     }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xe2, 0x72, 0x80                               }, { vpsrad zmm30{k7},zmm29,OWORD rdx-0x800                     }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xe2, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpsrad zmm30{k7},zmm29,OWORD rdx-0x810                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0xe2, 0xf4                                     }, { vpsraq zmm30{k7},zmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0xe2, 0xf4                                     }, { vpsraq zmm30{k7}{z},zmm29,xmm28                              }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xe2, 0x31                                     }, { vpsraq zmm30{k7},zmm29,OWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x95, 0x47, 0xe2, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsraq zmm30{k7},zmm29,OWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xe2, 0x72, 0x7f                               }, { vpsraq zmm30{k7},zmm29,OWORD rdx+0x7f0                     }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xe2, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpsraq zmm30{k7},zmm29,OWORD rdx+0x800                     }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xe2, 0x72, 0x80                               }, { vpsraq zmm30{k7},zmm29,OWORD rdx-0x800                     }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xe2, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpsraq zmm30{k7},zmm29,OWORD rdx-0x810                     }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x46, 0xf4                                     }, { vpsravd zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x46, 0xf4                                     }, { vpsravd zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x46, 0xf4                                     }, { vpsravd zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x46, 0x31                                     }, { vpsravd zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x46, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsravd zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x46, 0x31                                     }, { vpsravd zmm30,zmm29,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x46, 0x72, 0x7f                               }, { vpsravd zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x46, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpsravd zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x46, 0x72, 0x80                               }, { vpsravd zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x46, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpsravd zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x46, 0x72, 0x7f                               }, { vpsravd zmm30,zmm29,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x46, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpsravd zmm30,zmm29,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x46, 0x72, 0x80                               }, { vpsravd zmm30,zmm29,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x46, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpsravd zmm30,zmm29,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x46, 0xf4                                     }, { vpsravq zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x46, 0xf4                                     }, { vpsravq zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x46, 0xf4                                     }, { vpsravq zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x46, 0x31                                     }, { vpsravq zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x46, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsravq zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x46, 0x31                                     }, { vpsravq zmm30,zmm29,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x46, 0x72, 0x7f                               }, { vpsravq zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x46, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpsravq zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x46, 0x72, 0x80                               }, { vpsravq zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x46, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpsravq zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x46, 0x72, 0x7f                               }, { vpsravq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x46, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpsravq zmm30,zmm29,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x46, 0x72, 0x80                               }, { vpsravq zmm30,zmm29,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x46, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpsravq zmm30,zmm29,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x01, 0x15, 0x47, 0xd2, 0xf4                                     }, { vpsrld zmm30{k7},zmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x15, 0xc7, 0xd2, 0xf4                                     }, { vpsrld zmm30{k7}{z},zmm29,xmm28                              }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xd2, 0x31                                     }, { vpsrld zmm30{k7},zmm29,OWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x15, 0x47, 0xd2, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsrld zmm30{k7},zmm29,OWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xd2, 0x72, 0x7f                               }, { vpsrld zmm30{k7},zmm29,OWORD rdx+0x7f0                     }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xd2, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpsrld zmm30{k7},zmm29,OWORD rdx+0x800                     }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xd2, 0x72, 0x80                               }, { vpsrld zmm30{k7},zmm29,OWORD rdx-0x800                     }
+testcase	{ 0x62, 0x61, 0x15, 0x47, 0xd2, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpsrld zmm30{k7},zmm29,OWORD rdx-0x810                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0xd3, 0xf4                                     }, { vpsrlq zmm30{k7},zmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0xd3, 0xf4                                     }, { vpsrlq zmm30{k7}{z},zmm29,xmm28                              }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xd3, 0x31                                     }, { vpsrlq zmm30{k7},zmm29,OWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x95, 0x47, 0xd3, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsrlq zmm30{k7},zmm29,OWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xd3, 0x72, 0x7f                               }, { vpsrlq zmm30{k7},zmm29,OWORD rdx+0x7f0                     }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xd3, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpsrlq zmm30{k7},zmm29,OWORD rdx+0x800                     }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xd3, 0x72, 0x80                               }, { vpsrlq zmm30{k7},zmm29,OWORD rdx-0x800                     }
+testcase	{ 0x62, 0x61, 0x95, 0x47, 0xd3, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpsrlq zmm30{k7},zmm29,OWORD rdx-0x810                     }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x45, 0xf4                                     }, { vpsrlvd zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x45, 0xf4                                     }, { vpsrlvd zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x45, 0xf4                                     }, { vpsrlvd zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x45, 0x31                                     }, { vpsrlvd zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x45, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsrlvd zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x45, 0x31                                     }, { vpsrlvd zmm30,zmm29,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x45, 0x72, 0x7f                               }, { vpsrlvd zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x45, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpsrlvd zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x45, 0x72, 0x80                               }, { vpsrlvd zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x45, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpsrlvd zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x45, 0x72, 0x7f                               }, { vpsrlvd zmm30,zmm29,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x45, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpsrlvd zmm30,zmm29,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x45, 0x72, 0x80                               }, { vpsrlvd zmm30,zmm29,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x45, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpsrlvd zmm30,zmm29,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x45, 0xf4                                     }, { vpsrlvq zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x45, 0xf4                                     }, { vpsrlvq zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x45, 0xf4                                     }, { vpsrlvq zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x45, 0x31                                     }, { vpsrlvq zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x45, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsrlvq zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x45, 0x31                                     }, { vpsrlvq zmm30,zmm29,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x45, 0x72, 0x7f                               }, { vpsrlvq zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x45, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpsrlvq zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x45, 0x72, 0x80                               }, { vpsrlvq zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x45, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpsrlvq zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x45, 0x72, 0x7f                               }, { vpsrlvq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x45, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpsrlvq zmm30,zmm29,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x45, 0x72, 0x80                               }, { vpsrlvq zmm30,zmm29,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x45, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpsrlvq zmm30,zmm29,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x91, 0x0d, 0x40, 0x72, 0xd5, 0xab                               }, { vpsrld zmm30,zmm29,0xab                                      }
+testcase	{ 0x62, 0x91, 0x0d, 0x47, 0x72, 0xd5, 0xab                               }, { vpsrld zmm30{k7},zmm29,0xab                                  }
+testcase	{ 0x62, 0x91, 0x0d, 0xc7, 0x72, 0xd5, 0xab                               }, { vpsrld zmm30{k7}{z},zmm29,0xab                               }
+testcase	{ 0x62, 0x91, 0x0d, 0x40, 0x72, 0xd5, 0x7b                               }, { vpsrld zmm30,zmm29,0x7b                                      }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x11, 0x7b                               }, { vpsrld zmm30,ZWORD rcx,0x7b                                }
+testcase	{ 0x62, 0xb1, 0x0d, 0x40, 0x72, 0x94, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpsrld zmm30,ZWORD rax+r14*8+0x123,0x7b                    }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x11, 0x7b                               }, { vpsrld zmm30,DWORD rcx{1to16},0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x52, 0x7f, 0x7b                         }, { vpsrld zmm30,ZWORD rdx+0x1fc0,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x92, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpsrld zmm30,ZWORD rdx+0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x52, 0x80, 0x7b                         }, { vpsrld zmm30,ZWORD rdx-0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x92, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpsrld zmm30,ZWORD rdx-0x2040,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x52, 0x7f, 0x7b                         }, { vpsrld zmm30,DWORD rdx+0x1fc{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x92, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vpsrld zmm30,DWORD rdx+0x200{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x52, 0x80, 0x7b                         }, { vpsrld zmm30,DWORD rdx-0x200{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x92, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vpsrld zmm30,DWORD rdx-0x204{1to16},0x7b                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0x73, 0xd5, 0xab                               }, { vpsrlq zmm30,zmm29,0xab                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0x73, 0xd5, 0xab                               }, { vpsrlq zmm30{k7},zmm29,0xab                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0xc7, 0x73, 0xd5, 0xab                               }, { vpsrlq zmm30{k7}{z},zmm29,0xab                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0x73, 0xd5, 0x7b                               }, { vpsrlq zmm30,zmm29,0x7b                                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x73, 0x11, 0x7b                               }, { vpsrlq zmm30,ZWORD rcx,0x7b                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0x73, 0x94, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpsrlq zmm30,ZWORD rax+r14*8+0x123,0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x73, 0x11, 0x7b                               }, { vpsrlq zmm30,QWORD rcx{1to8},0x7b                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x73, 0x52, 0x7f, 0x7b                         }, { vpsrlq zmm30,ZWORD rdx+0x1fc0,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x73, 0x92, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpsrlq zmm30,ZWORD rdx+0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x73, 0x52, 0x80, 0x7b                         }, { vpsrlq zmm30,ZWORD rdx-0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x73, 0x92, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpsrlq zmm30,ZWORD rdx-0x2040,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x73, 0x52, 0x7f, 0x7b                         }, { vpsrlq zmm30,QWORD rdx+0x3f8{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x73, 0x92, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vpsrlq zmm30,QWORD rdx+0x400{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x73, 0x52, 0x80, 0x7b                         }, { vpsrlq zmm30,QWORD rdx-0x400{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x73, 0x92, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vpsrlq zmm30,QWORD rdx-0x408{1to8},0x7b                    }
+testcase	{ 0x62, 0x01, 0x15, 0x40, 0xfa, 0xf4                                     }, { vpsubd zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x15, 0x47, 0xfa, 0xf4                                     }, { vpsubd zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x15, 0xc7, 0xfa, 0xf4                                     }, { vpsubd zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xfa, 0x31                                     }, { vpsubd zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x15, 0x40, 0xfa, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsubd zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xfa, 0x31                                     }, { vpsubd zmm30,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xfa, 0x72, 0x7f                               }, { vpsubd zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xfa, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpsubd zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xfa, 0x72, 0x80                               }, { vpsubd zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xfa, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpsubd zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xfa, 0x72, 0x7f                               }, { vpsubd zmm30,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xfa, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpsubd zmm30,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xfa, 0x72, 0x80                               }, { vpsubd zmm30,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xfa, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpsubd zmm30,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0xfb, 0xf4                                     }, { vpsubq zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0xfb, 0xf4                                     }, { vpsubq zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0xfb, 0xf4                                     }, { vpsubq zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xfb, 0x31                                     }, { vpsubq zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0xfb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpsubq zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xfb, 0x31                                     }, { vpsubq zmm30,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xfb, 0x72, 0x7f                               }, { vpsubq zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xfb, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpsubq zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xfb, 0x72, 0x80                               }, { vpsubq zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xfb, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpsubq zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xfb, 0x72, 0x7f                               }, { vpsubq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xfb, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpsubq zmm30,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xfb, 0x72, 0x80                               }, { vpsubq zmm30,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xfb, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpsubq zmm30,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x92, 0x0d, 0x40, 0x27, 0xed                                     }, { vptestmd k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x92, 0x0d, 0x47, 0x27, 0xed                                     }, { vptestmd k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0xf2, 0x0d, 0x40, 0x27, 0x29                                     }, { vptestmd k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb2, 0x0d, 0x40, 0x27, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vptestmd k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf2, 0x0d, 0x50, 0x27, 0x29                                     }, { vptestmd k5,zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0xf2, 0x0d, 0x40, 0x27, 0x6a, 0x7f                               }, { vptestmd k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf2, 0x0d, 0x40, 0x27, 0xaa, 0x00, 0x20, 0x00, 0x00             }, { vptestmd k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf2, 0x0d, 0x40, 0x27, 0x6a, 0x80                               }, { vptestmd k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf2, 0x0d, 0x40, 0x27, 0xaa, 0xc0, 0xdf, 0xff, 0xff             }, { vptestmd k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf2, 0x0d, 0x50, 0x27, 0x6a, 0x7f                               }, { vptestmd k5,zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0xf2, 0x0d, 0x50, 0x27, 0xaa, 0x00, 0x02, 0x00, 0x00             }, { vptestmd k5,zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0xf2, 0x0d, 0x50, 0x27, 0x6a, 0x80                               }, { vptestmd k5,zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0xf2, 0x0d, 0x50, 0x27, 0xaa, 0xfc, 0xfd, 0xff, 0xff             }, { vptestmd k5,zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x92, 0x8d, 0x40, 0x27, 0xed                                     }, { vptestmq k5,zmm30,zmm29                                      }
+testcase	{ 0x62, 0x92, 0x8d, 0x47, 0x27, 0xed                                     }, { vptestmq k5{k7},zmm30,zmm29                                  }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x27, 0x29                                     }, { vptestmq k5,zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0xb2, 0x8d, 0x40, 0x27, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vptestmq k5,zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x27, 0x29                                     }, { vptestmq k5,zmm30,QWORD rcx{1to8}                          }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x27, 0x6a, 0x7f                               }, { vptestmq k5,zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x27, 0xaa, 0x00, 0x20, 0x00, 0x00             }, { vptestmq k5,zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x27, 0x6a, 0x80                               }, { vptestmq k5,zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0xf2, 0x8d, 0x40, 0x27, 0xaa, 0xc0, 0xdf, 0xff, 0xff             }, { vptestmq k5,zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x27, 0x6a, 0x7f                               }, { vptestmq k5,zmm30,QWORD rdx+0x3f8{1to8}                    }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x27, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vptestmq k5,zmm30,QWORD rdx+0x400{1to8}                    }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x27, 0x6a, 0x80                               }, { vptestmq k5,zmm30,QWORD rdx-0x400{1to8}                    }
+testcase	{ 0x62, 0xf2, 0x8d, 0x50, 0x27, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vptestmq k5,zmm30,QWORD rdx-0x408{1to8}                    }
+testcase	{ 0x62, 0x01, 0x15, 0x40, 0x6a, 0xf4                                     }, { vpunpckhdq zmm30,zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x15, 0x47, 0x6a, 0xf4                                     }, { vpunpckhdq zmm30{k7},zmm29,zmm28                             }
+testcase	{ 0x62, 0x01, 0x15, 0xc7, 0x6a, 0xf4                                     }, { vpunpckhdq zmm30{k7}{z},zmm29,zmm28                          }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0x6a, 0x31                                     }, { vpunpckhdq zmm30,zmm29,ZWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x15, 0x40, 0x6a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpunpckhdq zmm30,zmm29,ZWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0x6a, 0x31                                     }, { vpunpckhdq zmm30,zmm29,DWORD rcx{1to16}                    }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0x6a, 0x72, 0x7f                               }, { vpunpckhdq zmm30,zmm29,ZWORD rdx+0x1fc0                    }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0x6a, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpunpckhdq zmm30,zmm29,ZWORD rdx+0x2000                    }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0x6a, 0x72, 0x80                               }, { vpunpckhdq zmm30,zmm29,ZWORD rdx-0x2000                    }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0x6a, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpunpckhdq zmm30,zmm29,ZWORD rdx-0x2040                    }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0x6a, 0x72, 0x7f                               }, { vpunpckhdq zmm30,zmm29,DWORD rdx+0x1fc{1to16}              }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0x6a, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpunpckhdq zmm30,zmm29,DWORD rdx+0x200{1to16}              }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0x6a, 0x72, 0x80                               }, { vpunpckhdq zmm30,zmm29,DWORD rdx-0x200{1to16}              }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0x6a, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpunpckhdq zmm30,zmm29,DWORD rdx-0x204{1to16}              }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0x6d, 0xf4                                     }, { vpunpckhqdq zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0x6d, 0xf4                                     }, { vpunpckhqdq zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0x6d, 0xf4                                     }, { vpunpckhqdq zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x6d, 0x31                                     }, { vpunpckhqdq zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0x6d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpunpckhqdq zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x6d, 0x31                                     }, { vpunpckhqdq zmm30,zmm29,QWORD rcx{1to8}                    }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x6d, 0x72, 0x7f                               }, { vpunpckhqdq zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x6d, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpunpckhqdq zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x6d, 0x72, 0x80                               }, { vpunpckhqdq zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x6d, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpunpckhqdq zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x6d, 0x72, 0x7f                               }, { vpunpckhqdq zmm30,zmm29,QWORD rdx+0x3f8{1to8}              }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x6d, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpunpckhqdq zmm30,zmm29,QWORD rdx+0x400{1to8}              }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x6d, 0x72, 0x80                               }, { vpunpckhqdq zmm30,zmm29,QWORD rdx-0x400{1to8}              }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x6d, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpunpckhqdq zmm30,zmm29,QWORD rdx-0x408{1to8}              }
+testcase	{ 0x62, 0x01, 0x15, 0x40, 0x62, 0xf4                                     }, { vpunpckldq zmm30,zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x15, 0x47, 0x62, 0xf4                                     }, { vpunpckldq zmm30{k7},zmm29,zmm28                             }
+testcase	{ 0x62, 0x01, 0x15, 0xc7, 0x62, 0xf4                                     }, { vpunpckldq zmm30{k7}{z},zmm29,zmm28                          }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0x62, 0x31                                     }, { vpunpckldq zmm30,zmm29,ZWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x15, 0x40, 0x62, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpunpckldq zmm30,zmm29,ZWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0x62, 0x31                                     }, { vpunpckldq zmm30,zmm29,DWORD rcx{1to16}                    }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0x62, 0x72, 0x7f                               }, { vpunpckldq zmm30,zmm29,ZWORD rdx+0x1fc0                    }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0x62, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpunpckldq zmm30,zmm29,ZWORD rdx+0x2000                    }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0x62, 0x72, 0x80                               }, { vpunpckldq zmm30,zmm29,ZWORD rdx-0x2000                    }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0x62, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpunpckldq zmm30,zmm29,ZWORD rdx-0x2040                    }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0x62, 0x72, 0x7f                               }, { vpunpckldq zmm30,zmm29,DWORD rdx+0x1fc{1to16}              }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0x62, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpunpckldq zmm30,zmm29,DWORD rdx+0x200{1to16}              }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0x62, 0x72, 0x80                               }, { vpunpckldq zmm30,zmm29,DWORD rdx-0x200{1to16}              }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0x62, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpunpckldq zmm30,zmm29,DWORD rdx-0x204{1to16}              }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0x6c, 0xf4                                     }, { vpunpcklqdq zmm30,zmm29,zmm28                                }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0x6c, 0xf4                                     }, { vpunpcklqdq zmm30{k7},zmm29,zmm28                            }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0x6c, 0xf4                                     }, { vpunpcklqdq zmm30{k7}{z},zmm29,zmm28                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x6c, 0x31                                     }, { vpunpcklqdq zmm30,zmm29,ZWORD rcx                          }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0x6c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpunpcklqdq zmm30,zmm29,ZWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x6c, 0x31                                     }, { vpunpcklqdq zmm30,zmm29,QWORD rcx{1to8}                    }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x6c, 0x72, 0x7f                               }, { vpunpcklqdq zmm30,zmm29,ZWORD rdx+0x1fc0                   }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x6c, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpunpcklqdq zmm30,zmm29,ZWORD rdx+0x2000                   }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x6c, 0x72, 0x80                               }, { vpunpcklqdq zmm30,zmm29,ZWORD rdx-0x2000                   }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x6c, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpunpcklqdq zmm30,zmm29,ZWORD rdx-0x2040                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x6c, 0x72, 0x7f                               }, { vpunpcklqdq zmm30,zmm29,QWORD rdx+0x3f8{1to8}              }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x6c, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpunpcklqdq zmm30,zmm29,QWORD rdx+0x400{1to8}              }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x6c, 0x72, 0x80                               }, { vpunpcklqdq zmm30,zmm29,QWORD rdx-0x400{1to8}              }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x6c, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpunpcklqdq zmm30,zmm29,QWORD rdx-0x408{1to8}              }
+testcase	{ 0x62, 0x01, 0x15, 0x40, 0xef, 0xf4                                     }, { vpxord zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x15, 0x47, 0xef, 0xf4                                     }, { vpxord zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x15, 0xc7, 0xef, 0xf4                                     }, { vpxord zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xef, 0x31                                     }, { vpxord zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x15, 0x40, 0xef, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpxord zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xef, 0x31                                     }, { vpxord zmm30,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xef, 0x72, 0x7f                               }, { vpxord zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xef, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpxord zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xef, 0x72, 0x80                               }, { vpxord zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x15, 0x40, 0xef, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpxord zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xef, 0x72, 0x7f                               }, { vpxord zmm30,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xef, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpxord zmm30,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xef, 0x72, 0x80                               }, { vpxord zmm30,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x15, 0x50, 0xef, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpxord zmm30,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0xef, 0xf4                                     }, { vpxorq zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0xef, 0xf4                                     }, { vpxorq zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0xef, 0xf4                                     }, { vpxorq zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xef, 0x31                                     }, { vpxorq zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0xef, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpxorq zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xef, 0x31                                     }, { vpxorq zmm30,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xef, 0x72, 0x7f                               }, { vpxorq zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xef, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpxorq zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xef, 0x72, 0x80                               }, { vpxorq zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xef, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpxorq zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xef, 0x72, 0x7f                               }, { vpxorq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xef, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpxorq zmm30,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xef, 0x72, 0x80                               }, { vpxorq zmm30,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xef, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpxorq zmm30,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0x4c, 0xf5                                     }, { vrcp14pd zmm30,zmm29                                         }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0x4c, 0xf5                                     }, { vrcp14pd zmm30{k7},zmm29                                     }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0x4c, 0xf5                                     }, { vrcp14pd zmm30{k7}{z},zmm29                                  }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x4c, 0x31                                     }, { vrcp14pd zmm30,ZWORD rcx                                   }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x4c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrcp14pd zmm30,ZWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x4c, 0x31                                     }, { vrcp14pd zmm30,QWORD rcx{1to8}                             }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x4c, 0x72, 0x7f                               }, { vrcp14pd zmm30,ZWORD rdx+0x1fc0                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x4c, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vrcp14pd zmm30,ZWORD rdx+0x2000                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x4c, 0x72, 0x80                               }, { vrcp14pd zmm30,ZWORD rdx-0x2000                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x4c, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vrcp14pd zmm30,ZWORD rdx-0x2040                            }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x4c, 0x72, 0x7f                               }, { vrcp14pd zmm30,QWORD rdx+0x3f8{1to8}                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x4c, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vrcp14pd zmm30,QWORD rdx+0x400{1to8}                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x4c, 0x72, 0x80                               }, { vrcp14pd zmm30,QWORD rdx-0x400{1to8}                       }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x4c, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vrcp14pd zmm30,QWORD rdx-0x408{1to8}                       }
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0x4c, 0xf5                                     }, { vrcp14ps zmm30,zmm29                                         }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x4c, 0xf5                                     }, { vrcp14ps zmm30{k7},zmm29                                     }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x4c, 0xf5                                     }, { vrcp14ps zmm30{k7}{z},zmm29                                  }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x4c, 0x31                                     }, { vrcp14ps zmm30,ZWORD rcx                                   }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x4c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrcp14ps zmm30,ZWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x4c, 0x31                                     }, { vrcp14ps zmm30,DWORD rcx{1to16}                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x4c, 0x72, 0x7f                               }, { vrcp14ps zmm30,ZWORD rdx+0x1fc0                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x4c, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vrcp14ps zmm30,ZWORD rdx+0x2000                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x4c, 0x72, 0x80                               }, { vrcp14ps zmm30,ZWORD rdx-0x2000                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x4c, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vrcp14ps zmm30,ZWORD rdx-0x2040                            }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x4c, 0x72, 0x7f                               }, { vrcp14ps zmm30,DWORD rdx+0x1fc{1to16}                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x4c, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vrcp14ps zmm30,DWORD rdx+0x200{1to16}                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x4c, 0x72, 0x80                               }, { vrcp14ps zmm30,DWORD rdx-0x200{1to16}                      }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x4c, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vrcp14ps zmm30,DWORD rdx-0x204{1to16}                      }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0x4d, 0xf4                                     }, { vrcp14sd xmm30{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0x4d, 0xf4                                     }, { vrcp14sd xmm30{k7}{z},xmm29,xmm28                            }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x4d, 0x31                                     }, { vrcp14sd xmm30{k7},xmm29,QWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0x4d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrcp14sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x4d, 0x72, 0x7f                               }, { vrcp14sd xmm30{k7},xmm29,QWORD rdx+0x3f8                   }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x4d, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vrcp14sd xmm30{k7},xmm29,QWORD rdx+0x400                   }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x4d, 0x72, 0x80                               }, { vrcp14sd xmm30{k7},xmm29,QWORD rdx-0x400                   }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x4d, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vrcp14sd xmm30{k7},xmm29,QWORD rdx-0x408                   }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0x4d, 0xf4                                     }, { vrcp14ss xmm30{k7},xmm29,xmm28                               }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0x4d, 0xf4                                     }, { vrcp14ss xmm30{k7}{z},xmm29,xmm28                            }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x4d, 0x31                                     }, { vrcp14ss xmm30{k7},xmm29,DWORD rcx                         }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0x4d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrcp14ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123             }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x4d, 0x72, 0x7f                               }, { vrcp14ss xmm30{k7},xmm29,DWORD rdx+0x1fc                   }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x4d, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vrcp14ss xmm30{k7},xmm29,DWORD rdx+0x200                   }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x4d, 0x72, 0x80                               }, { vrcp14ss xmm30{k7},xmm29,DWORD rdx-0x200                   }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x4d, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vrcp14ss xmm30{k7},xmm29,DWORD rdx-0x204                   }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0x4e, 0xf5                                     }, { vrsqrt14pd zmm30,zmm29                                       }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0x4e, 0xf5                                     }, { vrsqrt14pd zmm30{k7},zmm29                                   }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0x4e, 0xf5                                     }, { vrsqrt14pd zmm30{k7}{z},zmm29                                }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x4e, 0x31                                     }, { vrsqrt14pd zmm30,ZWORD rcx                                 }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x4e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrsqrt14pd zmm30,ZWORD rax+r14*8+0x123                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x4e, 0x31                                     }, { vrsqrt14pd zmm30,QWORD rcx{1to8}                           }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x4e, 0x72, 0x7f                               }, { vrsqrt14pd zmm30,ZWORD rdx+0x1fc0                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x4e, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vrsqrt14pd zmm30,ZWORD rdx+0x2000                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x4e, 0x72, 0x80                               }, { vrsqrt14pd zmm30,ZWORD rdx-0x2000                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x4e, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vrsqrt14pd zmm30,ZWORD rdx-0x2040                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x4e, 0x72, 0x7f                               }, { vrsqrt14pd zmm30,QWORD rdx+0x3f8{1to8}                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x4e, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vrsqrt14pd zmm30,QWORD rdx+0x400{1to8}                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x4e, 0x72, 0x80                               }, { vrsqrt14pd zmm30,QWORD rdx-0x400{1to8}                     }
+testcase	{ 0x62, 0x62, 0xfd, 0x58, 0x4e, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vrsqrt14pd zmm30,QWORD rdx-0x408{1to8}                     }
+testcase	{ 0x62, 0x02, 0x7d, 0x48, 0x4e, 0xf5                                     }, { vrsqrt14ps zmm30,zmm29                                       }
+testcase	{ 0x62, 0x02, 0x7d, 0x4f, 0x4e, 0xf5                                     }, { vrsqrt14ps zmm30{k7},zmm29                                   }
+testcase	{ 0x62, 0x02, 0x7d, 0xcf, 0x4e, 0xf5                                     }, { vrsqrt14ps zmm30{k7}{z},zmm29                                }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x4e, 0x31                                     }, { vrsqrt14ps zmm30,ZWORD rcx                                 }
+testcase	{ 0x62, 0x22, 0x7d, 0x48, 0x4e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrsqrt14ps zmm30,ZWORD rax+r14*8+0x123                     }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x4e, 0x31                                     }, { vrsqrt14ps zmm30,DWORD rcx{1to16}                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x4e, 0x72, 0x7f                               }, { vrsqrt14ps zmm30,ZWORD rdx+0x1fc0                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x4e, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vrsqrt14ps zmm30,ZWORD rdx+0x2000                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x4e, 0x72, 0x80                               }, { vrsqrt14ps zmm30,ZWORD rdx-0x2000                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x48, 0x4e, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vrsqrt14ps zmm30,ZWORD rdx-0x2040                          }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x4e, 0x72, 0x7f                               }, { vrsqrt14ps zmm30,DWORD rdx+0x1fc{1to16}                    }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x4e, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vrsqrt14ps zmm30,DWORD rdx+0x200{1to16}                    }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x4e, 0x72, 0x80                               }, { vrsqrt14ps zmm30,DWORD rdx-0x200{1to16}                    }
+testcase	{ 0x62, 0x62, 0x7d, 0x58, 0x4e, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vrsqrt14ps zmm30,DWORD rdx-0x204{1to16}                    }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0x4f, 0xf4                                     }, { vrsqrt14sd xmm30{k7},xmm29,xmm28                             }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0x4f, 0xf4                                     }, { vrsqrt14sd xmm30{k7}{z},xmm29,xmm28                          }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x4f, 0x31                                     }, { vrsqrt14sd xmm30{k7},xmm29,QWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0x4f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrsqrt14sd xmm30{k7},xmm29,QWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x4f, 0x72, 0x7f                               }, { vrsqrt14sd xmm30{k7},xmm29,QWORD rdx+0x3f8                 }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x4f, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vrsqrt14sd xmm30{k7},xmm29,QWORD rdx+0x400                 }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x4f, 0x72, 0x80                               }, { vrsqrt14sd xmm30{k7},xmm29,QWORD rdx-0x400                 }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x4f, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vrsqrt14sd xmm30{k7},xmm29,QWORD rdx-0x408                 }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0x4f, 0xf4                                     }, { vrsqrt14ss xmm30{k7},xmm29,xmm28                             }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0x4f, 0xf4                                     }, { vrsqrt14ss xmm30{k7}{z},xmm29,xmm28                          }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x4f, 0x31                                     }, { vrsqrt14ss xmm30{k7},xmm29,DWORD rcx                       }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0x4f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vrsqrt14ss xmm30{k7},xmm29,DWORD rax+r14*8+0x123           }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x4f, 0x72, 0x7f                               }, { vrsqrt14ss xmm30{k7},xmm29,DWORD rdx+0x1fc                 }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x4f, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vrsqrt14ss xmm30{k7},xmm29,DWORD rdx+0x200                 }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x4f, 0x72, 0x80                               }, { vrsqrt14ss xmm30{k7},xmm29,DWORD rdx-0x200                 }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x4f, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vrsqrt14ss xmm30{k7},xmm29,DWORD rdx-0x204                 }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0xa2, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterdpd  r14+ymm31*8+0x7b{k1},zmm30                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0xa2, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterdpd  r14+ymm31*8+0x7b{k1},zmm30                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0xa2, 0x74, 0x39, 0x20                         }, { vscatterdpd  r9+ymm31*1+0x100{k1},zmm30                    }
+testcase	{ 0x62, 0x22, 0xfd, 0x41, 0xa2, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vscatterdpd  rcx+ymm31*4+0x400{k1},zmm30                   }
+testcase	{ 0x62, 0x02, 0x7d, 0x41, 0xa2, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterdps  r14+zmm31*8+0x7b{k1},zmm30                    }
+testcase	{ 0x62, 0x02, 0x7d, 0x41, 0xa2, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterdps  r14+zmm31*8+0x7b{k1},zmm30                    }
+testcase	{ 0x62, 0x02, 0x7d, 0x41, 0xa2, 0x74, 0x39, 0x40                         }, { vscatterdps  r9+zmm31*1+0x100{k1},zmm30                    }
+testcase	{ 0x62, 0x22, 0x7d, 0x41, 0xa2, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vscatterdps  rcx+zmm31*4+0x400{k1},zmm30                   }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0xa3, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterqpd  r14+zmm31*8+0x7b{k1},zmm30                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0xa3, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterqpd  r14+zmm31*8+0x7b{k1},zmm30                    }
+testcase	{ 0x62, 0x02, 0xfd, 0x41, 0xa3, 0x74, 0x39, 0x20                         }, { vscatterqpd  r9+zmm31*1+0x100{k1},zmm30                    }
+testcase	{ 0x62, 0x22, 0xfd, 0x41, 0xa3, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vscatterqpd  rcx+zmm31*4+0x400{k1},zmm30                   }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0xc6, 0xf4, 0xab                               }, { vshufpd zmm30,zmm29,zmm28,0xab                               }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0xc6, 0xf4, 0xab                               }, { vshufpd zmm30{k7},zmm29,zmm28,0xab                           }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0xc6, 0xf4, 0xab                               }, { vshufpd zmm30{k7}{z},zmm29,zmm28,0xab                        }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0xc6, 0xf4, 0x7b                               }, { vshufpd zmm30,zmm29,zmm28,0x7b                               }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xc6, 0x31, 0x7b                               }, { vshufpd zmm30,zmm29,ZWORD rcx,0x7b                         }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0xc6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vshufpd zmm30,zmm29,ZWORD rax+r14*8+0x123,0x7b             }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xc6, 0x31, 0x7b                               }, { vshufpd zmm30,zmm29,QWORD rcx{1to8},0x7b                   }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xc6, 0x72, 0x7f, 0x7b                         }, { vshufpd zmm30,zmm29,ZWORD rdx+0x1fc0,0x7b                  }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xc6, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vshufpd zmm30,zmm29,ZWORD rdx+0x2000,0x7b                  }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xc6, 0x72, 0x80, 0x7b                         }, { vshufpd zmm30,zmm29,ZWORD rdx-0x2000,0x7b                  }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0xc6, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vshufpd zmm30,zmm29,ZWORD rdx-0x2040,0x7b                  }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xc6, 0x72, 0x7f, 0x7b                         }, { vshufpd zmm30,zmm29,QWORD rdx+0x3f8{1to8},0x7b             }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xc6, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vshufpd zmm30,zmm29,QWORD rdx+0x400{1to8},0x7b             }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xc6, 0x72, 0x80, 0x7b                         }, { vshufpd zmm30,zmm29,QWORD rdx-0x400{1to8},0x7b             }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0xc6, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vshufpd zmm30,zmm29,QWORD rdx-0x408{1to8},0x7b             }
+testcase	{ 0x62, 0x01, 0x14, 0x40, 0xc6, 0xf4, 0xab                               }, { vshufps zmm30,zmm29,zmm28,0xab                               }
+testcase	{ 0x62, 0x01, 0x14, 0x47, 0xc6, 0xf4, 0xab                               }, { vshufps zmm30{k7},zmm29,zmm28,0xab                           }
+testcase	{ 0x62, 0x01, 0x14, 0xc7, 0xc6, 0xf4, 0xab                               }, { vshufps zmm30{k7}{z},zmm29,zmm28,0xab                        }
+testcase	{ 0x62, 0x01, 0x14, 0x40, 0xc6, 0xf4, 0x7b                               }, { vshufps zmm30,zmm29,zmm28,0x7b                               }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0xc6, 0x31, 0x7b                               }, { vshufps zmm30,zmm29,ZWORD rcx,0x7b                         }
+testcase	{ 0x62, 0x21, 0x14, 0x40, 0xc6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vshufps zmm30,zmm29,ZWORD rax+r14*8+0x123,0x7b             }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0xc6, 0x31, 0x7b                               }, { vshufps zmm30,zmm29,DWORD rcx{1to16},0x7b                  }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0xc6, 0x72, 0x7f, 0x7b                         }, { vshufps zmm30,zmm29,ZWORD rdx+0x1fc0,0x7b                  }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0xc6, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vshufps zmm30,zmm29,ZWORD rdx+0x2000,0x7b                  }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0xc6, 0x72, 0x80, 0x7b                         }, { vshufps zmm30,zmm29,ZWORD rdx-0x2000,0x7b                  }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0xc6, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vshufps zmm30,zmm29,ZWORD rdx-0x2040,0x7b                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0xc6, 0x72, 0x7f, 0x7b                         }, { vshufps zmm30,zmm29,DWORD rdx+0x1fc{1to16},0x7b            }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0xc6, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vshufps zmm30,zmm29,DWORD rdx+0x200{1to16},0x7b            }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0xc6, 0x72, 0x80, 0x7b                         }, { vshufps zmm30,zmm29,DWORD rdx-0x200{1to16},0x7b            }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0xc6, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vshufps zmm30,zmm29,DWORD rdx-0x204{1to16},0x7b            }
+testcase	{ 0x62, 0x01, 0xfd, 0x48, 0x51, 0xf5                                     }, { vsqrtpd zmm30,zmm29                                          }
+testcase	{ 0x62, 0x01, 0xfd, 0x4f, 0x51, 0xf5                                     }, { vsqrtpd zmm30{k7},zmm29                                      }
+testcase	{ 0x62, 0x01, 0xfd, 0xcf, 0x51, 0xf5                                     }, { vsqrtpd zmm30{k7}{z},zmm29                                   }
+testcase	{ 0x62, 0x01, 0xfd, 0x18, 0x51, 0xf5                                     }, { vsqrtpd zmm30,zmm29,{rn-sae}                                 }
+testcase	{ 0x62, 0x01, 0xfd, 0x58, 0x51, 0xf5                                     }, { vsqrtpd zmm30,zmm29,{ru-sae}                                 }
+testcase	{ 0x62, 0x01, 0xfd, 0x38, 0x51, 0xf5                                     }, { vsqrtpd zmm30,zmm29,{rd-sae}                                 }
+testcase	{ 0x62, 0x01, 0xfd, 0x78, 0x51, 0xf5                                     }, { vsqrtpd zmm30,zmm29,{rz-sae}                                 }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x51, 0x31                                     }, { vsqrtpd zmm30,ZWORD rcx                                    }
+testcase	{ 0x62, 0x21, 0xfd, 0x48, 0x51, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vsqrtpd zmm30,ZWORD rax+r14*8+0x123                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x58, 0x51, 0x31                                     }, { vsqrtpd zmm30,QWORD rcx{1to8}                              }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x51, 0x72, 0x7f                               }, { vsqrtpd zmm30,ZWORD rdx+0x1fc0                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x51, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vsqrtpd zmm30,ZWORD rdx+0x2000                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x51, 0x72, 0x80                               }, { vsqrtpd zmm30,ZWORD rdx-0x2000                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x51, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vsqrtpd zmm30,ZWORD rdx-0x2040                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x58, 0x51, 0x72, 0x7f                               }, { vsqrtpd zmm30,QWORD rdx+0x3f8{1to8}                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x58, 0x51, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vsqrtpd zmm30,QWORD rdx+0x400{1to8}                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x58, 0x51, 0x72, 0x80                               }, { vsqrtpd zmm30,QWORD rdx-0x400{1to8}                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x58, 0x51, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vsqrtpd zmm30,QWORD rdx-0x408{1to8}                        }
+testcase	{ 0x62, 0x01, 0x7c, 0x48, 0x51, 0xf5                                     }, { vsqrtps zmm30,zmm29                                          }
+testcase	{ 0x62, 0x01, 0x7c, 0x4f, 0x51, 0xf5                                     }, { vsqrtps zmm30{k7},zmm29                                      }
+testcase	{ 0x62, 0x01, 0x7c, 0xcf, 0x51, 0xf5                                     }, { vsqrtps zmm30{k7}{z},zmm29                                   }
+testcase	{ 0x62, 0x01, 0x7c, 0x18, 0x51, 0xf5                                     }, { vsqrtps zmm30,zmm29,{rn-sae}                                 }
+testcase	{ 0x62, 0x01, 0x7c, 0x58, 0x51, 0xf5                                     }, { vsqrtps zmm30,zmm29,{ru-sae}                                 }
+testcase	{ 0x62, 0x01, 0x7c, 0x38, 0x51, 0xf5                                     }, { vsqrtps zmm30,zmm29,{rd-sae}                                 }
+testcase	{ 0x62, 0x01, 0x7c, 0x78, 0x51, 0xf5                                     }, { vsqrtps zmm30,zmm29,{rz-sae}                                 }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x51, 0x31                                     }, { vsqrtps zmm30,ZWORD rcx                                    }
+testcase	{ 0x62, 0x21, 0x7c, 0x48, 0x51, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vsqrtps zmm30,ZWORD rax+r14*8+0x123                        }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x51, 0x31                                     }, { vsqrtps zmm30,DWORD rcx{1to16}                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x51, 0x72, 0x7f                               }, { vsqrtps zmm30,ZWORD rdx+0x1fc0                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x51, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vsqrtps zmm30,ZWORD rdx+0x2000                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x51, 0x72, 0x80                               }, { vsqrtps zmm30,ZWORD rdx-0x2000                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x51, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vsqrtps zmm30,ZWORD rdx-0x2040                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x51, 0x72, 0x7f                               }, { vsqrtps zmm30,DWORD rdx+0x1fc{1to16}                       }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x51, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vsqrtps zmm30,DWORD rdx+0x200{1to16}                       }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x51, 0x72, 0x80                               }, { vsqrtps zmm30,DWORD rdx-0x200{1to16}                       }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x51, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vsqrtps zmm30,DWORD rdx-0x204{1to16}                       }
+testcase	{ 0x62, 0x01, 0x97, 0x07, 0x51, 0xf4                                     }, { vsqrtsd xmm30{k7},xmm29,xmm28                                }
+testcase	{ 0x62, 0x01, 0x97, 0x87, 0x51, 0xf4                                     }, { vsqrtsd xmm30{k7}{z},xmm29,xmm28                             }
+testcase	{ 0x62, 0x01, 0x97, 0x17, 0x51, 0xf4                                     }, { vsqrtsd xmm30{k7},xmm29,xmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x01, 0x97, 0x57, 0x51, 0xf4                                     }, { vsqrtsd xmm30{k7},xmm29,xmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x01, 0x97, 0x37, 0x51, 0xf4                                     }, { vsqrtsd xmm30{k7},xmm29,xmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x01, 0x97, 0x77, 0x51, 0xf4                                     }, { vsqrtsd xmm30{k7},xmm29,xmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x51, 0x31                                     }, { vsqrtsd xmm30{k7},xmm29,QWORD rcx                          }
+testcase	{ 0x62, 0x21, 0x97, 0x07, 0x51, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vsqrtsd xmm30{k7},xmm29,QWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x51, 0x72, 0x7f                               }, { vsqrtsd xmm30{k7},xmm29,QWORD rdx+0x3f8                    }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x51, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vsqrtsd xmm30{k7},xmm29,QWORD rdx+0x400                    }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x51, 0x72, 0x80                               }, { vsqrtsd xmm30{k7},xmm29,QWORD rdx-0x400                    }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x51, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vsqrtsd xmm30{k7},xmm29,QWORD rdx-0x408                    }
+testcase	{ 0x62, 0x01, 0x16, 0x07, 0x51, 0xf4                                     }, { vsqrtss xmm30{k7},xmm29,xmm28                                }
+testcase	{ 0x62, 0x01, 0x16, 0x87, 0x51, 0xf4                                     }, { vsqrtss xmm30{k7}{z},xmm29,xmm28                             }
+testcase	{ 0x62, 0x01, 0x16, 0x17, 0x51, 0xf4                                     }, { vsqrtss xmm30{k7},xmm29,xmm28,{rn-sae}                       }
+testcase	{ 0x62, 0x01, 0x16, 0x57, 0x51, 0xf4                                     }, { vsqrtss xmm30{k7},xmm29,xmm28,{ru-sae}                       }
+testcase	{ 0x62, 0x01, 0x16, 0x37, 0x51, 0xf4                                     }, { vsqrtss xmm30{k7},xmm29,xmm28,{rd-sae}                       }
+testcase	{ 0x62, 0x01, 0x16, 0x77, 0x51, 0xf4                                     }, { vsqrtss xmm30{k7},xmm29,xmm28,{rz-sae}                       }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x51, 0x31                                     }, { vsqrtss xmm30{k7},xmm29,DWORD rcx                          }
+testcase	{ 0x62, 0x21, 0x16, 0x07, 0x51, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vsqrtss xmm30{k7},xmm29,DWORD rax+r14*8+0x123              }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x51, 0x72, 0x7f                               }, { vsqrtss xmm30{k7},xmm29,DWORD rdx+0x1fc                    }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x51, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vsqrtss xmm30{k7},xmm29,DWORD rdx+0x200                    }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x51, 0x72, 0x80                               }, { vsqrtss xmm30{k7},xmm29,DWORD rdx-0x200                    }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x51, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vsqrtss xmm30{k7},xmm29,DWORD rdx-0x204                    }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0x5c, 0xf4                                     }, { vsubpd zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0x5c, 0xf4                                     }, { vsubpd zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0x5c, 0xf4                                     }, { vsubpd zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x95, 0x10, 0x5c, 0xf4                                     }, { vsubpd zmm30,zmm29,zmm28,{rn-sae}                            }
+testcase	{ 0x62, 0x01, 0x95, 0x50, 0x5c, 0xf4                                     }, { vsubpd zmm30,zmm29,zmm28,{ru-sae}                            }
+testcase	{ 0x62, 0x01, 0x95, 0x30, 0x5c, 0xf4                                     }, { vsubpd zmm30,zmm29,zmm28,{rd-sae}                            }
+testcase	{ 0x62, 0x01, 0x95, 0x70, 0x5c, 0xf4                                     }, { vsubpd zmm30,zmm29,zmm28,{rz-sae}                            }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5c, 0x31                                     }, { vsubpd zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0x5c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vsubpd zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5c, 0x31                                     }, { vsubpd zmm30,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5c, 0x72, 0x7f                               }, { vsubpd zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5c, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vsubpd zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5c, 0x72, 0x80                               }, { vsubpd zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x5c, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vsubpd zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5c, 0x72, 0x7f                               }, { vsubpd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5c, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vsubpd zmm30,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5c, 0x72, 0x80                               }, { vsubpd zmm30,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x5c, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vsubpd zmm30,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x01, 0x14, 0x40, 0x5c, 0xf4                                     }, { vsubps zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x01, 0x14, 0x47, 0x5c, 0xf4                                     }, { vsubps zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x01, 0x14, 0xc7, 0x5c, 0xf4                                     }, { vsubps zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x14, 0x10, 0x5c, 0xf4                                     }, { vsubps zmm30,zmm29,zmm28,{rn-sae}                            }
+testcase	{ 0x62, 0x01, 0x14, 0x50, 0x5c, 0xf4                                     }, { vsubps zmm30,zmm29,zmm28,{ru-sae}                            }
+testcase	{ 0x62, 0x01, 0x14, 0x30, 0x5c, 0xf4                                     }, { vsubps zmm30,zmm29,zmm28,{rd-sae}                            }
+testcase	{ 0x62, 0x01, 0x14, 0x70, 0x5c, 0xf4                                     }, { vsubps zmm30,zmm29,zmm28,{rz-sae}                            }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5c, 0x31                                     }, { vsubps zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x21, 0x14, 0x40, 0x5c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vsubps zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5c, 0x31                                     }, { vsubps zmm30,zmm29,DWORD rcx{1to16}                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5c, 0x72, 0x7f                               }, { vsubps zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5c, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vsubps zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5c, 0x72, 0x80                               }, { vsubps zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x5c, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vsubps zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5c, 0x72, 0x7f                               }, { vsubps zmm30,zmm29,DWORD rdx+0x1fc{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5c, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vsubps zmm30,zmm29,DWORD rdx+0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5c, 0x72, 0x80                               }, { vsubps zmm30,zmm29,DWORD rdx-0x200{1to16}                  }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x5c, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vsubps zmm30,zmm29,DWORD rdx-0x204{1to16}                  }
+testcase	{ 0x62, 0x01, 0x97, 0x07, 0x5c, 0xf4                                     }, { vsubsd xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x97, 0x87, 0x5c, 0xf4                                     }, { vsubsd xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x97, 0x17, 0x5c, 0xf4                                     }, { vsubsd xmm30{k7},xmm29,xmm28,{rn-sae}                        }
+testcase	{ 0x62, 0x01, 0x97, 0x57, 0x5c, 0xf4                                     }, { vsubsd xmm30{k7},xmm29,xmm28,{ru-sae}                        }
+testcase	{ 0x62, 0x01, 0x97, 0x37, 0x5c, 0xf4                                     }, { vsubsd xmm30{k7},xmm29,xmm28,{rd-sae}                        }
+testcase	{ 0x62, 0x01, 0x97, 0x77, 0x5c, 0xf4                                     }, { vsubsd xmm30{k7},xmm29,xmm28,{rz-sae}                        }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5c, 0x31                                     }, { vsubsd xmm30{k7},xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x97, 0x07, 0x5c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vsubsd xmm30{k7},xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5c, 0x72, 0x7f                               }, { vsubsd xmm30{k7},xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5c, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vsubsd xmm30{k7},xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5c, 0x72, 0x80                               }, { vsubsd xmm30{k7},xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x07, 0x5c, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vsubsd xmm30{k7},xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x01, 0x16, 0x07, 0x5c, 0xf4                                     }, { vsubss xmm30{k7},xmm29,xmm28                                 }
+testcase	{ 0x62, 0x01, 0x16, 0x87, 0x5c, 0xf4                                     }, { vsubss xmm30{k7}{z},xmm29,xmm28                              }
+testcase	{ 0x62, 0x01, 0x16, 0x17, 0x5c, 0xf4                                     }, { vsubss xmm30{k7},xmm29,xmm28,{rn-sae}                        }
+testcase	{ 0x62, 0x01, 0x16, 0x57, 0x5c, 0xf4                                     }, { vsubss xmm30{k7},xmm29,xmm28,{ru-sae}                        }
+testcase	{ 0x62, 0x01, 0x16, 0x37, 0x5c, 0xf4                                     }, { vsubss xmm30{k7},xmm29,xmm28,{rd-sae}                        }
+testcase	{ 0x62, 0x01, 0x16, 0x77, 0x5c, 0xf4                                     }, { vsubss xmm30{k7},xmm29,xmm28,{rz-sae}                        }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5c, 0x31                                     }, { vsubss xmm30{k7},xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x16, 0x07, 0x5c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vsubss xmm30{k7},xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5c, 0x72, 0x7f                               }, { vsubss xmm30{k7},xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5c, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vsubss xmm30{k7},xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5c, 0x72, 0x80                               }, { vsubss xmm30{k7},xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x07, 0x5c, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vsubss xmm30{k7},xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x01, 0xfd, 0x08, 0x2e, 0xf5                                     }, { vucomisd xmm30,xmm29                                         }
+testcase	{ 0x62, 0x01, 0xfd, 0x18, 0x2e, 0xf5                                     }, { vucomisd xmm30,xmm29,{sae}                                   }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x2e, 0x31                                     }, { vucomisd xmm30,QWORD rcx                                   }
+testcase	{ 0x62, 0x21, 0xfd, 0x08, 0x2e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vucomisd xmm30,QWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x2e, 0x72, 0x7f                               }, { vucomisd xmm30,QWORD rdx+0x3f8                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x2e, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vucomisd xmm30,QWORD rdx+0x400                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x2e, 0x72, 0x80                               }, { vucomisd xmm30,QWORD rdx-0x400                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x08, 0x2e, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vucomisd xmm30,QWORD rdx-0x408                             }
+testcase	{ 0x62, 0x01, 0x7c, 0x08, 0x2e, 0xf5                                     }, { vucomiss xmm30,xmm29                                         }
+testcase	{ 0x62, 0x01, 0x7c, 0x18, 0x2e, 0xf5                                     }, { vucomiss xmm30,xmm29,{sae}                                   }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x2e, 0x31                                     }, { vucomiss xmm30,DWORD rcx                                   }
+testcase	{ 0x62, 0x21, 0x7c, 0x08, 0x2e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vucomiss xmm30,DWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x2e, 0x72, 0x7f                               }, { vucomiss xmm30,DWORD rdx+0x1fc                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x2e, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vucomiss xmm30,DWORD rdx+0x200                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x2e, 0x72, 0x80                               }, { vucomiss xmm30,DWORD rdx-0x200                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x08, 0x2e, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vucomiss xmm30,DWORD rdx-0x204                             }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0x15, 0xf4                                     }, { vunpckhpd zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0x15, 0xf4                                     }, { vunpckhpd zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0x15, 0xf4                                     }, { vunpckhpd zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x15, 0x31                                     }, { vunpckhpd zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0x15, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vunpckhpd zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x15, 0x31                                     }, { vunpckhpd zmm30,zmm29,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x15, 0x72, 0x7f                               }, { vunpckhpd zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x15, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vunpckhpd zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x15, 0x72, 0x80                               }, { vunpckhpd zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x15, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vunpckhpd zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x15, 0x72, 0x7f                               }, { vunpckhpd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x15, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vunpckhpd zmm30,zmm29,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x15, 0x72, 0x80                               }, { vunpckhpd zmm30,zmm29,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x15, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vunpckhpd zmm30,zmm29,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x01, 0x14, 0x40, 0x15, 0xf4                                     }, { vunpckhps zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x01, 0x14, 0x47, 0x15, 0xf4                                     }, { vunpckhps zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x14, 0xc7, 0x15, 0xf4                                     }, { vunpckhps zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x15, 0x31                                     }, { vunpckhps zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x21, 0x14, 0x40, 0x15, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vunpckhps zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x15, 0x31                                     }, { vunpckhps zmm30,zmm29,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x15, 0x72, 0x7f                               }, { vunpckhps zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x15, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vunpckhps zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x15, 0x72, 0x80                               }, { vunpckhps zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x15, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vunpckhps zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x15, 0x72, 0x7f                               }, { vunpckhps zmm30,zmm29,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x15, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vunpckhps zmm30,zmm29,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x15, 0x72, 0x80                               }, { vunpckhps zmm30,zmm29,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x15, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vunpckhps zmm30,zmm29,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x01, 0x95, 0x40, 0x14, 0xf4                                     }, { vunpcklpd zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x01, 0x95, 0x47, 0x14, 0xf4                                     }, { vunpcklpd zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x95, 0xc7, 0x14, 0xf4                                     }, { vunpcklpd zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x14, 0x31                                     }, { vunpcklpd zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x21, 0x95, 0x40, 0x14, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vunpcklpd zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x14, 0x31                                     }, { vunpcklpd zmm30,zmm29,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x14, 0x72, 0x7f                               }, { vunpcklpd zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x14, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vunpcklpd zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x14, 0x72, 0x80                               }, { vunpcklpd zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x61, 0x95, 0x40, 0x14, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vunpcklpd zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x14, 0x72, 0x7f                               }, { vunpcklpd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x14, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vunpcklpd zmm30,zmm29,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x14, 0x72, 0x80                               }, { vunpcklpd zmm30,zmm29,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0x61, 0x95, 0x50, 0x14, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vunpcklpd zmm30,zmm29,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x01, 0x14, 0x40, 0x14, 0xf4                                     }, { vunpcklps zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x01, 0x14, 0x47, 0x14, 0xf4                                     }, { vunpcklps zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x01, 0x14, 0xc7, 0x14, 0xf4                                     }, { vunpcklps zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x14, 0x31                                     }, { vunpcklps zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x21, 0x14, 0x40, 0x14, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vunpcklps zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x14, 0x31                                     }, { vunpcklps zmm30,zmm29,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x14, 0x72, 0x7f                               }, { vunpcklps zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x14, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vunpcklps zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x14, 0x72, 0x80                               }, { vunpcklps zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x61, 0x14, 0x40, 0x14, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vunpcklps zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x14, 0x72, 0x7f                               }, { vunpcklps zmm30,zmm29,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x14, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vunpcklps zmm30,zmm29,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x14, 0x72, 0x80                               }, { vunpcklps zmm30,zmm29,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0x61, 0x14, 0x50, 0x14, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vunpcklps zmm30,zmm29,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x03, 0x15, 0x40, 0x25, 0xf4, 0xab                               }, { vpternlogd zmm30,zmm29,zmm28,0xab                            }
+testcase	{ 0x62, 0x03, 0x15, 0x47, 0x25, 0xf4, 0xab                               }, { vpternlogd zmm30{k7},zmm29,zmm28,0xab                        }
+testcase	{ 0x62, 0x03, 0x15, 0xc7, 0x25, 0xf4, 0xab                               }, { vpternlogd zmm30{k7}{z},zmm29,zmm28,0xab                     }
+testcase	{ 0x62, 0x03, 0x15, 0x40, 0x25, 0xf4, 0x7b                               }, { vpternlogd zmm30,zmm29,zmm28,0x7b                            }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x25, 0x31, 0x7b                               }, { vpternlogd zmm30,zmm29,ZWORD rcx,0x7b                      }
+testcase	{ 0x62, 0x23, 0x15, 0x40, 0x25, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpternlogd zmm30,zmm29,ZWORD rax+r14*8+0x123,0x7b          }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x25, 0x31, 0x7b                               }, { vpternlogd zmm30,zmm29,DWORD rcx{1to16},0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x25, 0x72, 0x7f, 0x7b                         }, { vpternlogd zmm30,zmm29,ZWORD rdx+0x1fc0,0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x25, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpternlogd zmm30,zmm29,ZWORD rdx+0x2000,0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x25, 0x72, 0x80, 0x7b                         }, { vpternlogd zmm30,zmm29,ZWORD rdx-0x2000,0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x25, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpternlogd zmm30,zmm29,ZWORD rdx-0x2040,0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x25, 0x72, 0x7f, 0x7b                         }, { vpternlogd zmm30,zmm29,DWORD rdx+0x1fc{1to16},0x7b         }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x25, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vpternlogd zmm30,zmm29,DWORD rdx+0x200{1to16},0x7b         }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x25, 0x72, 0x80, 0x7b                         }, { vpternlogd zmm30,zmm29,DWORD rdx-0x200{1to16},0x7b         }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x25, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vpternlogd zmm30,zmm29,DWORD rdx-0x204{1to16},0x7b         }
+testcase	{ 0x62, 0x03, 0x95, 0x40, 0x25, 0xf4, 0xab                               }, { vpternlogq zmm30,zmm29,zmm28,0xab                            }
+testcase	{ 0x62, 0x03, 0x95, 0x47, 0x25, 0xf4, 0xab                               }, { vpternlogq zmm30{k7},zmm29,zmm28,0xab                        }
+testcase	{ 0x62, 0x03, 0x95, 0xc7, 0x25, 0xf4, 0xab                               }, { vpternlogq zmm30{k7}{z},zmm29,zmm28,0xab                     }
+testcase	{ 0x62, 0x03, 0x95, 0x40, 0x25, 0xf4, 0x7b                               }, { vpternlogq zmm30,zmm29,zmm28,0x7b                            }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x25, 0x31, 0x7b                               }, { vpternlogq zmm30,zmm29,ZWORD rcx,0x7b                      }
+testcase	{ 0x62, 0x23, 0x95, 0x40, 0x25, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpternlogq zmm30,zmm29,ZWORD rax+r14*8+0x123,0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x25, 0x31, 0x7b                               }, { vpternlogq zmm30,zmm29,QWORD rcx{1to8},0x7b                }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x25, 0x72, 0x7f, 0x7b                         }, { vpternlogq zmm30,zmm29,ZWORD rdx+0x1fc0,0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x25, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpternlogq zmm30,zmm29,ZWORD rdx+0x2000,0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x25, 0x72, 0x80, 0x7b                         }, { vpternlogq zmm30,zmm29,ZWORD rdx-0x2000,0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x25, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpternlogq zmm30,zmm29,ZWORD rdx-0x2040,0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x25, 0x72, 0x7f, 0x7b                         }, { vpternlogq zmm30,zmm29,QWORD rdx+0x3f8{1to8},0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x25, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vpternlogq zmm30,zmm29,QWORD rdx+0x400{1to8},0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x25, 0x72, 0x80, 0x7b                         }, { vpternlogq zmm30,zmm29,QWORD rdx-0x400{1to8},0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x25, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vpternlogq zmm30,zmm29,QWORD rdx-0x408{1to8},0x7b          }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x32, 0xee                                     }, { vpmovqb xmm30{k7},zmm29                                      }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x32, 0xee                                     }, { vpmovqb xmm30{k7}{z},zmm29                                   }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x22, 0xee                                     }, { vpmovsqb xmm30{k7},zmm29                                     }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x22, 0xee                                     }, { vpmovsqb xmm30{k7}{z},zmm29                                  }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x12, 0xee                                     }, { vpmovusqb xmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x12, 0xee                                     }, { vpmovusqb xmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x34, 0xee                                     }, { vpmovqw xmm30{k7},zmm29                                      }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x34, 0xee                                     }, { vpmovqw xmm30{k7}{z},zmm29                                   }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x24, 0xee                                     }, { vpmovsqw xmm30{k7},zmm29                                     }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x24, 0xee                                     }, { vpmovsqw xmm30{k7}{z},zmm29                                  }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x14, 0xee                                     }, { vpmovusqw xmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x14, 0xee                                     }, { vpmovusqw xmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x35, 0xee                                     }, { vpmovqd ymm30{k7},zmm29                                      }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x35, 0xee                                     }, { vpmovqd ymm30{k7}{z},zmm29                                   }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x25, 0xee                                     }, { vpmovsqd ymm30{k7},zmm29                                     }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x25, 0xee                                     }, { vpmovsqd ymm30{k7}{z},zmm29                                  }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x15, 0xee                                     }, { vpmovusqd ymm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x15, 0xee                                     }, { vpmovusqd ymm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x31, 0xee                                     }, { vpmovdb xmm30{k7},zmm29                                      }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x31, 0xee                                     }, { vpmovdb xmm30{k7}{z},zmm29                                   }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x21, 0xee                                     }, { vpmovsdb xmm30{k7},zmm29                                     }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x21, 0xee                                     }, { vpmovsdb xmm30{k7}{z},zmm29                                  }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x11, 0xee                                     }, { vpmovusdb xmm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x11, 0xee                                     }, { vpmovusdb xmm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x33, 0xee                                     }, { vpmovdw ymm30{k7},zmm29                                      }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x33, 0xee                                     }, { vpmovdw ymm30{k7}{z},zmm29                                   }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x23, 0xee                                     }, { vpmovsdw ymm30{k7},zmm29                                     }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x23, 0xee                                     }, { vpmovsdw ymm30{k7}{z},zmm29                                  }
+testcase	{ 0x62, 0x02, 0x7e, 0x4f, 0x13, 0xee                                     }, { vpmovusdw ymm30{k7},zmm29                                    }
+testcase	{ 0x62, 0x02, 0x7e, 0xcf, 0x13, 0xee                                     }, { vpmovusdw ymm30{k7}{z},zmm29                                 }
+testcase	{ 0x62, 0x03, 0x15, 0x40, 0x23, 0xf4, 0xab                               }, { vshuff32x4 zmm30,zmm29,zmm28,0xab                            }
+testcase	{ 0x62, 0x03, 0x15, 0x47, 0x23, 0xf4, 0xab                               }, { vshuff32x4 zmm30{k7},zmm29,zmm28,0xab                        }
+testcase	{ 0x62, 0x03, 0x15, 0xc7, 0x23, 0xf4, 0xab                               }, { vshuff32x4 zmm30{k7}{z},zmm29,zmm28,0xab                     }
+testcase	{ 0x62, 0x03, 0x15, 0x40, 0x23, 0xf4, 0x7b                               }, { vshuff32x4 zmm30,zmm29,zmm28,0x7b                            }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x23, 0x31, 0x7b                               }, { vshuff32x4 zmm30,zmm29,ZWORD rcx,0x7b                      }
+testcase	{ 0x62, 0x23, 0x15, 0x40, 0x23, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vshuff32x4 zmm30,zmm29,ZWORD rax+r14*8+0x123,0x7b          }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x23, 0x31, 0x7b                               }, { vshuff32x4 zmm30,zmm29,DWORD rcx{1to16},0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x23, 0x72, 0x7f, 0x7b                         }, { vshuff32x4 zmm30,zmm29,ZWORD rdx+0x1fc0,0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x23, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vshuff32x4 zmm30,zmm29,ZWORD rdx+0x2000,0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x23, 0x72, 0x80, 0x7b                         }, { vshuff32x4 zmm30,zmm29,ZWORD rdx-0x2000,0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x23, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vshuff32x4 zmm30,zmm29,ZWORD rdx-0x2040,0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x23, 0x72, 0x7f, 0x7b                         }, { vshuff32x4 zmm30,zmm29,DWORD rdx+0x1fc{1to16},0x7b         }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x23, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vshuff32x4 zmm30,zmm29,DWORD rdx+0x200{1to16},0x7b         }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x23, 0x72, 0x80, 0x7b                         }, { vshuff32x4 zmm30,zmm29,DWORD rdx-0x200{1to16},0x7b         }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x23, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vshuff32x4 zmm30,zmm29,DWORD rdx-0x204{1to16},0x7b         }
+testcase	{ 0x62, 0x03, 0x95, 0x40, 0x23, 0xf4, 0xab                               }, { vshuff64x2 zmm30,zmm29,zmm28,0xab                            }
+testcase	{ 0x62, 0x03, 0x95, 0x47, 0x23, 0xf4, 0xab                               }, { vshuff64x2 zmm30{k7},zmm29,zmm28,0xab                        }
+testcase	{ 0x62, 0x03, 0x95, 0xc7, 0x23, 0xf4, 0xab                               }, { vshuff64x2 zmm30{k7}{z},zmm29,zmm28,0xab                     }
+testcase	{ 0x62, 0x03, 0x95, 0x40, 0x23, 0xf4, 0x7b                               }, { vshuff64x2 zmm30,zmm29,zmm28,0x7b                            }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x23, 0x31, 0x7b                               }, { vshuff64x2 zmm30,zmm29,ZWORD rcx,0x7b                      }
+testcase	{ 0x62, 0x23, 0x95, 0x40, 0x23, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vshuff64x2 zmm30,zmm29,ZWORD rax+r14*8+0x123,0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x23, 0x31, 0x7b                               }, { vshuff64x2 zmm30,zmm29,QWORD rcx{1to8},0x7b                }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x23, 0x72, 0x7f, 0x7b                         }, { vshuff64x2 zmm30,zmm29,ZWORD rdx+0x1fc0,0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x23, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vshuff64x2 zmm30,zmm29,ZWORD rdx+0x2000,0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x23, 0x72, 0x80, 0x7b                         }, { vshuff64x2 zmm30,zmm29,ZWORD rdx-0x2000,0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x23, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vshuff64x2 zmm30,zmm29,ZWORD rdx-0x2040,0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x23, 0x72, 0x7f, 0x7b                         }, { vshuff64x2 zmm30,zmm29,QWORD rdx+0x3f8{1to8},0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x23, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vshuff64x2 zmm30,zmm29,QWORD rdx+0x400{1to8},0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x23, 0x72, 0x80, 0x7b                         }, { vshuff64x2 zmm30,zmm29,QWORD rdx-0x400{1to8},0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x23, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vshuff64x2 zmm30,zmm29,QWORD rdx-0x408{1to8},0x7b          }
+testcase	{ 0x62, 0x03, 0x15, 0x40, 0x43, 0xf4, 0xab                               }, { vshufi32x4 zmm30,zmm29,zmm28,0xab                            }
+testcase	{ 0x62, 0x03, 0x15, 0x47, 0x43, 0xf4, 0xab                               }, { vshufi32x4 zmm30{k7},zmm29,zmm28,0xab                        }
+testcase	{ 0x62, 0x03, 0x15, 0xc7, 0x43, 0xf4, 0xab                               }, { vshufi32x4 zmm30{k7}{z},zmm29,zmm28,0xab                     }
+testcase	{ 0x62, 0x03, 0x15, 0x40, 0x43, 0xf4, 0x7b                               }, { vshufi32x4 zmm30,zmm29,zmm28,0x7b                            }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x43, 0x31, 0x7b                               }, { vshufi32x4 zmm30,zmm29,ZWORD rcx,0x7b                      }
+testcase	{ 0x62, 0x23, 0x15, 0x40, 0x43, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vshufi32x4 zmm30,zmm29,ZWORD rax+r14*8+0x123,0x7b          }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x43, 0x31, 0x7b                               }, { vshufi32x4 zmm30,zmm29,DWORD rcx{1to16},0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x43, 0x72, 0x7f, 0x7b                         }, { vshufi32x4 zmm30,zmm29,ZWORD rdx+0x1fc0,0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x43, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vshufi32x4 zmm30,zmm29,ZWORD rdx+0x2000,0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x43, 0x72, 0x80, 0x7b                         }, { vshufi32x4 zmm30,zmm29,ZWORD rdx-0x2000,0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x43, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vshufi32x4 zmm30,zmm29,ZWORD rdx-0x2040,0x7b               }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x43, 0x72, 0x7f, 0x7b                         }, { vshufi32x4 zmm30,zmm29,DWORD rdx+0x1fc{1to16},0x7b         }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x43, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vshufi32x4 zmm30,zmm29,DWORD rdx+0x200{1to16},0x7b         }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x43, 0x72, 0x80, 0x7b                         }, { vshufi32x4 zmm30,zmm29,DWORD rdx-0x200{1to16},0x7b         }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x43, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vshufi32x4 zmm30,zmm29,DWORD rdx-0x204{1to16},0x7b         }
+testcase	{ 0x62, 0x03, 0x95, 0x40, 0x43, 0xf4, 0xab                               }, { vshufi64x2 zmm30,zmm29,zmm28,0xab                            }
+testcase	{ 0x62, 0x03, 0x95, 0x47, 0x43, 0xf4, 0xab                               }, { vshufi64x2 zmm30{k7},zmm29,zmm28,0xab                        }
+testcase	{ 0x62, 0x03, 0x95, 0xc7, 0x43, 0xf4, 0xab                               }, { vshufi64x2 zmm30{k7}{z},zmm29,zmm28,0xab                     }
+testcase	{ 0x62, 0x03, 0x95, 0x40, 0x43, 0xf4, 0x7b                               }, { vshufi64x2 zmm30,zmm29,zmm28,0x7b                            }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x43, 0x31, 0x7b                               }, { vshufi64x2 zmm30,zmm29,ZWORD rcx,0x7b                      }
+testcase	{ 0x62, 0x23, 0x95, 0x40, 0x43, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vshufi64x2 zmm30,zmm29,ZWORD rax+r14*8+0x123,0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x43, 0x31, 0x7b                               }, { vshufi64x2 zmm30,zmm29,QWORD rcx{1to8},0x7b                }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x43, 0x72, 0x7f, 0x7b                         }, { vshufi64x2 zmm30,zmm29,ZWORD rdx+0x1fc0,0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x43, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vshufi64x2 zmm30,zmm29,ZWORD rdx+0x2000,0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x43, 0x72, 0x80, 0x7b                         }, { vshufi64x2 zmm30,zmm29,ZWORD rdx-0x2000,0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x43, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vshufi64x2 zmm30,zmm29,ZWORD rdx-0x2040,0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x43, 0x72, 0x7f, 0x7b                         }, { vshufi64x2 zmm30,zmm29,QWORD rdx+0x3f8{1to8},0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x43, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vshufi64x2 zmm30,zmm29,QWORD rdx+0x400{1to8},0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x43, 0x72, 0x80, 0x7b                         }, { vshufi64x2 zmm30,zmm29,QWORD rdx-0x400{1to8},0x7b          }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x43, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vshufi64x2 zmm30,zmm29,QWORD rdx-0x408{1to8},0x7b          }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x36, 0xf4                                     }, { vpermq zmm30,zmm29,zmm28                                     }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x36, 0xf4                                     }, { vpermq zmm30{k7},zmm29,zmm28                                 }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x36, 0xf4                                     }, { vpermq zmm30{k7}{z},zmm29,zmm28                              }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x36, 0x31                                     }, { vpermq zmm30,zmm29,ZWORD rcx                               }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x36, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermq zmm30,zmm29,ZWORD rax+r14*8+0x123                   }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x36, 0x31                                     }, { vpermq zmm30,zmm29,QWORD rcx{1to8}                         }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x36, 0x72, 0x7f                               }, { vpermq zmm30,zmm29,ZWORD rdx+0x1fc0                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x36, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermq zmm30,zmm29,ZWORD rdx+0x2000                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x36, 0x72, 0x80                               }, { vpermq zmm30,zmm29,ZWORD rdx-0x2000                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x36, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermq zmm30,zmm29,ZWORD rdx-0x2040                        }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x36, 0x72, 0x7f                               }, { vpermq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x36, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpermq zmm30,zmm29,QWORD rdx+0x400{1to8}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x36, 0x72, 0x80                               }, { vpermq zmm30,zmm29,QWORD rdx-0x400{1to8}                   }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x36, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpermq zmm30,zmm29,QWORD rdx-0x408{1to8}                   }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x16, 0xf4                                     }, { vpermpd zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x16, 0xf4                                     }, { vpermpd zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x16, 0xf4                                     }, { vpermpd zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x16, 0x31                                     }, { vpermpd zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x16, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermpd zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x16, 0x31                                     }, { vpermpd zmm30,zmm29,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x16, 0x72, 0x7f                               }, { vpermpd zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x16, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermpd zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x16, 0x72, 0x80                               }, { vpermpd zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x16, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermpd zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x16, 0x72, 0x7f                               }, { vpermpd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x16, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpermpd zmm30,zmm29,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x16, 0x72, 0x80                               }, { vpermpd zmm30,zmm29,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x16, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpermpd zmm30,zmm29,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x7e, 0xf4                                     }, { vpermt2d zmm30,zmm29,zmm28                                   }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x7e, 0xf4                                     }, { vpermt2d zmm30{k7},zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x7e, 0xf4                                     }, { vpermt2d zmm30{k7}{z},zmm29,zmm28                            }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x7e, 0x31                                     }, { vpermt2d zmm30,zmm29,ZWORD rcx                             }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x7e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermt2d zmm30,zmm29,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x7e, 0x31                                     }, { vpermt2d zmm30,zmm29,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x7e, 0x72, 0x7f                               }, { vpermt2d zmm30,zmm29,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x7e, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermt2d zmm30,zmm29,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x7e, 0x72, 0x80                               }, { vpermt2d zmm30,zmm29,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x7e, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermt2d zmm30,zmm29,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x7e, 0x72, 0x7f                               }, { vpermt2d zmm30,zmm29,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x7e, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpermt2d zmm30,zmm29,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x7e, 0x72, 0x80                               }, { vpermt2d zmm30,zmm29,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x7e, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpermt2d zmm30,zmm29,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x7e, 0xf4                                     }, { vpermt2q zmm30,zmm29,zmm28                                   }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x7e, 0xf4                                     }, { vpermt2q zmm30{k7},zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x7e, 0xf4                                     }, { vpermt2q zmm30{k7}{z},zmm29,zmm28                            }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x7e, 0x31                                     }, { vpermt2q zmm30,zmm29,ZWORD rcx                             }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x7e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermt2q zmm30,zmm29,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x7e, 0x31                                     }, { vpermt2q zmm30,zmm29,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x7e, 0x72, 0x7f                               }, { vpermt2q zmm30,zmm29,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x7e, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermt2q zmm30,zmm29,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x7e, 0x72, 0x80                               }, { vpermt2q zmm30,zmm29,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x7e, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermt2q zmm30,zmm29,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x7e, 0x72, 0x7f                               }, { vpermt2q zmm30,zmm29,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x7e, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpermt2q zmm30,zmm29,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x7e, 0x72, 0x80                               }, { vpermt2q zmm30,zmm29,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x7e, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpermt2q zmm30,zmm29,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x7f, 0xf4                                     }, { vpermt2ps zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x7f, 0xf4                                     }, { vpermt2ps zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x7f, 0xf4                                     }, { vpermt2ps zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x7f, 0x31                                     }, { vpermt2ps zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x7f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermt2ps zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x7f, 0x31                                     }, { vpermt2ps zmm30,zmm29,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x7f, 0x72, 0x7f                               }, { vpermt2ps zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x7f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermt2ps zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x7f, 0x72, 0x80                               }, { vpermt2ps zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x7f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermt2ps zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x7f, 0x72, 0x7f                               }, { vpermt2ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x7f, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpermt2ps zmm30,zmm29,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x7f, 0x72, 0x80                               }, { vpermt2ps zmm30,zmm29,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x7f, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpermt2ps zmm30,zmm29,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x7f, 0xf4                                     }, { vpermt2pd zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x7f, 0xf4                                     }, { vpermt2pd zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x7f, 0xf4                                     }, { vpermt2pd zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x7f, 0x31                                     }, { vpermt2pd zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x7f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermt2pd zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x7f, 0x31                                     }, { vpermt2pd zmm30,zmm29,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x7f, 0x72, 0x7f                               }, { vpermt2pd zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x7f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermt2pd zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x7f, 0x72, 0x80                               }, { vpermt2pd zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x7f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermt2pd zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x7f, 0x72, 0x7f                               }, { vpermt2pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x7f, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpermt2pd zmm30,zmm29,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x7f, 0x72, 0x80                               }, { vpermt2pd zmm30,zmm29,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x7f, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpermt2pd zmm30,zmm29,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x03, 0x95, 0x40, 0x03, 0xf4, 0xab                               }, { valignq zmm30,zmm29,zmm28,0xab                               }
+testcase	{ 0x62, 0x03, 0x95, 0x47, 0x03, 0xf4, 0xab                               }, { valignq zmm30{k7},zmm29,zmm28,0xab                           }
+testcase	{ 0x62, 0x03, 0x95, 0xc7, 0x03, 0xf4, 0xab                               }, { valignq zmm30{k7}{z},zmm29,zmm28,0xab                        }
+testcase	{ 0x62, 0x03, 0x95, 0x40, 0x03, 0xf4, 0x7b                               }, { valignq zmm30,zmm29,zmm28,0x7b                               }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x03, 0x31, 0x7b                               }, { valignq zmm30,zmm29,ZWORD rcx,0x7b                         }
+testcase	{ 0x62, 0x23, 0x95, 0x40, 0x03, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { valignq zmm30,zmm29,ZWORD rax+r14*8+0x123,0x7b             }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x03, 0x31, 0x7b                               }, { valignq zmm30,zmm29,QWORD rcx{1to8},0x7b                   }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x03, 0x72, 0x7f, 0x7b                         }, { valignq zmm30,zmm29,ZWORD rdx+0x1fc0,0x7b                  }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x03, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { valignq zmm30,zmm29,ZWORD rdx+0x2000,0x7b                  }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x03, 0x72, 0x80, 0x7b                         }, { valignq zmm30,zmm29,ZWORD rdx-0x2000,0x7b                  }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x03, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { valignq zmm30,zmm29,ZWORD rdx-0x2040,0x7b                  }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x03, 0x72, 0x7f, 0x7b                         }, { valignq zmm30,zmm29,QWORD rdx+0x3f8{1to8},0x7b             }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x03, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { valignq zmm30,zmm29,QWORD rdx+0x400{1to8},0x7b             }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x03, 0x72, 0x80, 0x7b                         }, { valignq zmm30,zmm29,QWORD rdx-0x400{1to8},0x7b             }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x03, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { valignq zmm30,zmm29,QWORD rdx-0x408{1to8},0x7b             }
+testcase	{ 0x62, 0x91, 0x7f, 0x08, 0x79, 0xc6                                     }, { vcvtsd2usi eax,xmm30                                         }
+testcase	{ 0x62, 0x91, 0x7f, 0x18, 0x79, 0xc6                                     }, { vcvtsd2usi eax,xmm30,{rn-sae}                                }
+testcase	{ 0x62, 0x91, 0x7f, 0x58, 0x79, 0xc6                                     }, { vcvtsd2usi eax,xmm30,{ru-sae}                                }
+testcase	{ 0x62, 0x91, 0x7f, 0x38, 0x79, 0xc6                                     }, { vcvtsd2usi eax,xmm30,{rd-sae}                                }
+testcase	{ 0x62, 0x91, 0x7f, 0x78, 0x79, 0xc6                                     }, { vcvtsd2usi eax,xmm30,{rz-sae}                                }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x79, 0x01                                     }, { vcvtsd2usi eax,QWORD rcx                                   }
+testcase	{ 0x62, 0xb1, 0x7f, 0x08, 0x79, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtsd2usi eax,QWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x79, 0x42, 0x7f                               }, { vcvtsd2usi eax,QWORD rdx+0x3f8                             }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x79, 0x82, 0x00, 0x04, 0x00, 0x00             }, { vcvtsd2usi eax,QWORD rdx+0x400                             }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x79, 0x42, 0x80                               }, { vcvtsd2usi eax,QWORD rdx-0x400                             }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x79, 0x82, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtsd2usi eax,QWORD rdx-0x408                             }
+testcase	{ 0x62, 0x91, 0x7f, 0x08, 0x79, 0xee                                     }, { vcvtsd2usi ebp,xmm30                                         }
+testcase	{ 0x62, 0x91, 0x7f, 0x18, 0x79, 0xee                                     }, { vcvtsd2usi ebp,xmm30,{rn-sae}                                }
+testcase	{ 0x62, 0x91, 0x7f, 0x58, 0x79, 0xee                                     }, { vcvtsd2usi ebp,xmm30,{ru-sae}                                }
+testcase	{ 0x62, 0x91, 0x7f, 0x38, 0x79, 0xee                                     }, { vcvtsd2usi ebp,xmm30,{rd-sae}                                }
+testcase	{ 0x62, 0x91, 0x7f, 0x78, 0x79, 0xee                                     }, { vcvtsd2usi ebp,xmm30,{rz-sae}                                }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x79, 0x29                                     }, { vcvtsd2usi ebp,QWORD rcx                                   }
+testcase	{ 0x62, 0xb1, 0x7f, 0x08, 0x79, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtsd2usi ebp,QWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x79, 0x6a, 0x7f                               }, { vcvtsd2usi ebp,QWORD rdx+0x3f8                             }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x79, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vcvtsd2usi ebp,QWORD rdx+0x400                             }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x79, 0x6a, 0x80                               }, { vcvtsd2usi ebp,QWORD rdx-0x400                             }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x79, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtsd2usi ebp,QWORD rdx-0x408                             }
+testcase	{ 0x62, 0x11, 0x7f, 0x08, 0x79, 0xee                                     }, { vcvtsd2usi r13d,xmm30                                        }
+testcase	{ 0x62, 0x11, 0x7f, 0x18, 0x79, 0xee                                     }, { vcvtsd2usi r13d,xmm30,{rn-sae}                               }
+testcase	{ 0x62, 0x11, 0x7f, 0x58, 0x79, 0xee                                     }, { vcvtsd2usi r13d,xmm30,{ru-sae}                               }
+testcase	{ 0x62, 0x11, 0x7f, 0x38, 0x79, 0xee                                     }, { vcvtsd2usi r13d,xmm30,{rd-sae}                               }
+testcase	{ 0x62, 0x11, 0x7f, 0x78, 0x79, 0xee                                     }, { vcvtsd2usi r13d,xmm30,{rz-sae}                               }
+testcase	{ 0x62, 0x71, 0x7f, 0x08, 0x79, 0x29                                     }, { vcvtsd2usi r13d,QWORD rcx                                  }
+testcase	{ 0x62, 0x31, 0x7f, 0x08, 0x79, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtsd2usi r13d,QWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x71, 0x7f, 0x08, 0x79, 0x6a, 0x7f                               }, { vcvtsd2usi r13d,QWORD rdx+0x3f8                            }
+testcase	{ 0x62, 0x71, 0x7f, 0x08, 0x79, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vcvtsd2usi r13d,QWORD rdx+0x400                            }
+testcase	{ 0x62, 0x71, 0x7f, 0x08, 0x79, 0x6a, 0x80                               }, { vcvtsd2usi r13d,QWORD rdx-0x400                            }
+testcase	{ 0x62, 0x71, 0x7f, 0x08, 0x79, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtsd2usi r13d,QWORD rdx-0x408                            }
+testcase	{ 0x62, 0x91, 0xff, 0x08, 0x79, 0xc6                                     }, { vcvtsd2usi rax,xmm30                                         }
+testcase	{ 0x62, 0x91, 0xff, 0x18, 0x79, 0xc6                                     }, { vcvtsd2usi rax,xmm30,{rn-sae}                                }
+testcase	{ 0x62, 0x91, 0xff, 0x58, 0x79, 0xc6                                     }, { vcvtsd2usi rax,xmm30,{ru-sae}                                }
+testcase	{ 0x62, 0x91, 0xff, 0x38, 0x79, 0xc6                                     }, { vcvtsd2usi rax,xmm30,{rd-sae}                                }
+testcase	{ 0x62, 0x91, 0xff, 0x78, 0x79, 0xc6                                     }, { vcvtsd2usi rax,xmm30,{rz-sae}                                }
+testcase	{ 0x62, 0xf1, 0xff, 0x08, 0x79, 0x01                                     }, { vcvtsd2usi rax,QWORD rcx                                   }
+testcase	{ 0x62, 0xb1, 0xff, 0x08, 0x79, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtsd2usi rax,QWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0xf1, 0xff, 0x08, 0x79, 0x42, 0x7f                               }, { vcvtsd2usi rax,QWORD rdx+0x3f8                             }
+testcase	{ 0x62, 0xf1, 0xff, 0x08, 0x79, 0x82, 0x00, 0x04, 0x00, 0x00             }, { vcvtsd2usi rax,QWORD rdx+0x400                             }
+testcase	{ 0x62, 0xf1, 0xff, 0x08, 0x79, 0x42, 0x80                               }, { vcvtsd2usi rax,QWORD rdx-0x400                             }
+testcase	{ 0x62, 0xf1, 0xff, 0x08, 0x79, 0x82, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtsd2usi rax,QWORD rdx-0x408                             }
+testcase	{ 0x62, 0x11, 0xff, 0x08, 0x79, 0xc6                                     }, { vcvtsd2usi r8,xmm30                                          }
+testcase	{ 0x62, 0x11, 0xff, 0x18, 0x79, 0xc6                                     }, { vcvtsd2usi r8,xmm30,{rn-sae}                                 }
+testcase	{ 0x62, 0x11, 0xff, 0x58, 0x79, 0xc6                                     }, { vcvtsd2usi r8,xmm30,{ru-sae}                                 }
+testcase	{ 0x62, 0x11, 0xff, 0x38, 0x79, 0xc6                                     }, { vcvtsd2usi r8,xmm30,{rd-sae}                                 }
+testcase	{ 0x62, 0x11, 0xff, 0x78, 0x79, 0xc6                                     }, { vcvtsd2usi r8,xmm30,{rz-sae}                                 }
+testcase	{ 0x62, 0x71, 0xff, 0x08, 0x79, 0x01                                     }, { vcvtsd2usi r8,QWORD rcx                                    }
+testcase	{ 0x62, 0x31, 0xff, 0x08, 0x79, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtsd2usi r8,QWORD rax+r14*8+0x123                        }
+testcase	{ 0x62, 0x71, 0xff, 0x08, 0x79, 0x42, 0x7f                               }, { vcvtsd2usi r8,QWORD rdx+0x3f8                              }
+testcase	{ 0x62, 0x71, 0xff, 0x08, 0x79, 0x82, 0x00, 0x04, 0x00, 0x00             }, { vcvtsd2usi r8,QWORD rdx+0x400                              }
+testcase	{ 0x62, 0x71, 0xff, 0x08, 0x79, 0x42, 0x80                               }, { vcvtsd2usi r8,QWORD rdx-0x400                              }
+testcase	{ 0x62, 0x71, 0xff, 0x08, 0x79, 0x82, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtsd2usi r8,QWORD rdx-0x408                              }
+testcase	{ 0x62, 0x91, 0x7e, 0x08, 0x79, 0xc6                                     }, { vcvtss2usi eax,xmm30                                         }
+testcase	{ 0x62, 0x91, 0x7e, 0x18, 0x79, 0xc6                                     }, { vcvtss2usi eax,xmm30,{rn-sae}                                }
+testcase	{ 0x62, 0x91, 0x7e, 0x58, 0x79, 0xc6                                     }, { vcvtss2usi eax,xmm30,{ru-sae}                                }
+testcase	{ 0x62, 0x91, 0x7e, 0x38, 0x79, 0xc6                                     }, { vcvtss2usi eax,xmm30,{rd-sae}                                }
+testcase	{ 0x62, 0x91, 0x7e, 0x78, 0x79, 0xc6                                     }, { vcvtss2usi eax,xmm30,{rz-sae}                                }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x79, 0x01                                     }, { vcvtss2usi eax,DWORD rcx                                   }
+testcase	{ 0x62, 0xb1, 0x7e, 0x08, 0x79, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtss2usi eax,DWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x79, 0x42, 0x7f                               }, { vcvtss2usi eax,DWORD rdx+0x1fc                             }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x79, 0x82, 0x00, 0x02, 0x00, 0x00             }, { vcvtss2usi eax,DWORD rdx+0x200                             }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x79, 0x42, 0x80                               }, { vcvtss2usi eax,DWORD rdx-0x200                             }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x79, 0x82, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtss2usi eax,DWORD rdx-0x204                             }
+testcase	{ 0x62, 0x91, 0x7e, 0x08, 0x79, 0xee                                     }, { vcvtss2usi ebp,xmm30                                         }
+testcase	{ 0x62, 0x91, 0x7e, 0x18, 0x79, 0xee                                     }, { vcvtss2usi ebp,xmm30,{rn-sae}                                }
+testcase	{ 0x62, 0x91, 0x7e, 0x58, 0x79, 0xee                                     }, { vcvtss2usi ebp,xmm30,{ru-sae}                                }
+testcase	{ 0x62, 0x91, 0x7e, 0x38, 0x79, 0xee                                     }, { vcvtss2usi ebp,xmm30,{rd-sae}                                }
+testcase	{ 0x62, 0x91, 0x7e, 0x78, 0x79, 0xee                                     }, { vcvtss2usi ebp,xmm30,{rz-sae}                                }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x79, 0x29                                     }, { vcvtss2usi ebp,DWORD rcx                                   }
+testcase	{ 0x62, 0xb1, 0x7e, 0x08, 0x79, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtss2usi ebp,DWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x79, 0x6a, 0x7f                               }, { vcvtss2usi ebp,DWORD rdx+0x1fc                             }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x79, 0xaa, 0x00, 0x02, 0x00, 0x00             }, { vcvtss2usi ebp,DWORD rdx+0x200                             }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x79, 0x6a, 0x80                               }, { vcvtss2usi ebp,DWORD rdx-0x200                             }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x79, 0xaa, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtss2usi ebp,DWORD rdx-0x204                             }
+testcase	{ 0x62, 0x11, 0x7e, 0x08, 0x79, 0xee                                     }, { vcvtss2usi r13d,xmm30                                        }
+testcase	{ 0x62, 0x11, 0x7e, 0x18, 0x79, 0xee                                     }, { vcvtss2usi r13d,xmm30,{rn-sae}                               }
+testcase	{ 0x62, 0x11, 0x7e, 0x58, 0x79, 0xee                                     }, { vcvtss2usi r13d,xmm30,{ru-sae}                               }
+testcase	{ 0x62, 0x11, 0x7e, 0x38, 0x79, 0xee                                     }, { vcvtss2usi r13d,xmm30,{rd-sae}                               }
+testcase	{ 0x62, 0x11, 0x7e, 0x78, 0x79, 0xee                                     }, { vcvtss2usi r13d,xmm30,{rz-sae}                               }
+testcase	{ 0x62, 0x71, 0x7e, 0x08, 0x79, 0x29                                     }, { vcvtss2usi r13d,DWORD rcx                                  }
+testcase	{ 0x62, 0x31, 0x7e, 0x08, 0x79, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtss2usi r13d,DWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0x71, 0x7e, 0x08, 0x79, 0x6a, 0x7f                               }, { vcvtss2usi r13d,DWORD rdx+0x1fc                            }
+testcase	{ 0x62, 0x71, 0x7e, 0x08, 0x79, 0xaa, 0x00, 0x02, 0x00, 0x00             }, { vcvtss2usi r13d,DWORD rdx+0x200                            }
+testcase	{ 0x62, 0x71, 0x7e, 0x08, 0x79, 0x6a, 0x80                               }, { vcvtss2usi r13d,DWORD rdx-0x200                            }
+testcase	{ 0x62, 0x71, 0x7e, 0x08, 0x79, 0xaa, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtss2usi r13d,DWORD rdx-0x204                            }
+testcase	{ 0x62, 0x91, 0xfe, 0x08, 0x79, 0xc6                                     }, { vcvtss2usi rax,xmm30                                         }
+testcase	{ 0x62, 0x91, 0xfe, 0x18, 0x79, 0xc6                                     }, { vcvtss2usi rax,xmm30,{rn-sae}                                }
+testcase	{ 0x62, 0x91, 0xfe, 0x58, 0x79, 0xc6                                     }, { vcvtss2usi rax,xmm30,{ru-sae}                                }
+testcase	{ 0x62, 0x91, 0xfe, 0x38, 0x79, 0xc6                                     }, { vcvtss2usi rax,xmm30,{rd-sae}                                }
+testcase	{ 0x62, 0x91, 0xfe, 0x78, 0x79, 0xc6                                     }, { vcvtss2usi rax,xmm30,{rz-sae}                                }
+testcase	{ 0x62, 0xf1, 0xfe, 0x08, 0x79, 0x01                                     }, { vcvtss2usi rax,DWORD rcx                                   }
+testcase	{ 0x62, 0xb1, 0xfe, 0x08, 0x79, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtss2usi rax,DWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0xf1, 0xfe, 0x08, 0x79, 0x42, 0x7f                               }, { vcvtss2usi rax,DWORD rdx+0x1fc                             }
+testcase	{ 0x62, 0xf1, 0xfe, 0x08, 0x79, 0x82, 0x00, 0x02, 0x00, 0x00             }, { vcvtss2usi rax,DWORD rdx+0x200                             }
+testcase	{ 0x62, 0xf1, 0xfe, 0x08, 0x79, 0x42, 0x80                               }, { vcvtss2usi rax,DWORD rdx-0x200                             }
+testcase	{ 0x62, 0xf1, 0xfe, 0x08, 0x79, 0x82, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtss2usi rax,DWORD rdx-0x204                             }
+testcase	{ 0x62, 0x11, 0xfe, 0x08, 0x79, 0xc6                                     }, { vcvtss2usi r8,xmm30                                          }
+testcase	{ 0x62, 0x11, 0xfe, 0x18, 0x79, 0xc6                                     }, { vcvtss2usi r8,xmm30,{rn-sae}                                 }
+testcase	{ 0x62, 0x11, 0xfe, 0x58, 0x79, 0xc6                                     }, { vcvtss2usi r8,xmm30,{ru-sae}                                 }
+testcase	{ 0x62, 0x11, 0xfe, 0x38, 0x79, 0xc6                                     }, { vcvtss2usi r8,xmm30,{rd-sae}                                 }
+testcase	{ 0x62, 0x11, 0xfe, 0x78, 0x79, 0xc6                                     }, { vcvtss2usi r8,xmm30,{rz-sae}                                 }
+testcase	{ 0x62, 0x71, 0xfe, 0x08, 0x79, 0x01                                     }, { vcvtss2usi r8,DWORD rcx                                    }
+testcase	{ 0x62, 0x31, 0xfe, 0x08, 0x79, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtss2usi r8,DWORD rax+r14*8+0x123                        }
+testcase	{ 0x62, 0x71, 0xfe, 0x08, 0x79, 0x42, 0x7f                               }, { vcvtss2usi r8,DWORD rdx+0x1fc                              }
+testcase	{ 0x62, 0x71, 0xfe, 0x08, 0x79, 0x82, 0x00, 0x02, 0x00, 0x00             }, { vcvtss2usi r8,DWORD rdx+0x200                              }
+testcase	{ 0x62, 0x71, 0xfe, 0x08, 0x79, 0x42, 0x80                               }, { vcvtss2usi r8,DWORD rdx-0x200                              }
+testcase	{ 0x62, 0x71, 0xfe, 0x08, 0x79, 0x82, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtss2usi r8,DWORD rdx-0x204                              }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x7b, 0xf0                                     }, { vcvtusi2sd xmm30,xmm29,eax                                   }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x7b, 0xf5                                     }, { vcvtusi2sd xmm30,xmm29,ebp                                   }
+testcase	{ 0x62, 0x41, 0x17, 0x00, 0x7b, 0xf5                                     }, { vcvtusi2sd xmm30,xmm29,r13d                                  }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x7b, 0x31                                     }, { vcvtusi2sd xmm30,xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x17, 0x00, 0x7b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtusi2sd xmm30,xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x7b, 0x72, 0x7f                               }, { vcvtusi2sd xmm30,xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x7b, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvtusi2sd xmm30,xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x7b, 0x72, 0x80                               }, { vcvtusi2sd xmm30,xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0x61, 0x17, 0x00, 0x7b, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtusi2sd xmm30,xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x61, 0x97, 0x00, 0x7b, 0xf0                                     }, { vcvtusi2sd xmm30,xmm29,rax                                   }
+testcase	{ 0x62, 0x61, 0x97, 0x10, 0x7b, 0xf0                                     }, { vcvtusi2sd xmm30,xmm29,{rn-sae},rax                          }
+testcase	{ 0x62, 0x61, 0x97, 0x50, 0x7b, 0xf0                                     }, { vcvtusi2sd xmm30,xmm29,{ru-sae},rax                          }
+testcase	{ 0x62, 0x61, 0x97, 0x30, 0x7b, 0xf0                                     }, { vcvtusi2sd xmm30,xmm29,{rd-sae},rax                          }
+testcase	{ 0x62, 0x61, 0x97, 0x70, 0x7b, 0xf0                                     }, { vcvtusi2sd xmm30,xmm29,{rz-sae},rax                          }
+testcase	{ 0x62, 0x41, 0x97, 0x00, 0x7b, 0xf0                                     }, { vcvtusi2sd xmm30,xmm29,r8                                    }
+testcase	{ 0x62, 0x41, 0x97, 0x10, 0x7b, 0xf0                                     }, { vcvtusi2sd xmm30,xmm29,{rn-sae},r8                           }
+testcase	{ 0x62, 0x41, 0x97, 0x50, 0x7b, 0xf0                                     }, { vcvtusi2sd xmm30,xmm29,{ru-sae},r8                           }
+testcase	{ 0x62, 0x41, 0x97, 0x30, 0x7b, 0xf0                                     }, { vcvtusi2sd xmm30,xmm29,{rd-sae},r8                           }
+testcase	{ 0x62, 0x41, 0x97, 0x70, 0x7b, 0xf0                                     }, { vcvtusi2sd xmm30,xmm29,{rz-sae},r8                           }
+testcase	{ 0x62, 0x61, 0x97, 0x00, 0x7b, 0x31                                     }, { vcvtusi2sd xmm30,xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x97, 0x00, 0x7b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtusi2sd xmm30,xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x97, 0x00, 0x7b, 0x72, 0x7f                               }, { vcvtusi2sd xmm30,xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0x61, 0x97, 0x00, 0x7b, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vcvtusi2sd xmm30,xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x00, 0x7b, 0x72, 0x80                               }, { vcvtusi2sd xmm30,xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0x61, 0x97, 0x00, 0x7b, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtusi2sd xmm30,xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,eax                                   }
+testcase	{ 0x62, 0x61, 0x16, 0x10, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,{rn-sae},eax                          }
+testcase	{ 0x62, 0x61, 0x16, 0x50, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,{ru-sae},eax                          }
+testcase	{ 0x62, 0x61, 0x16, 0x30, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,{rd-sae},eax                          }
+testcase	{ 0x62, 0x61, 0x16, 0x70, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,{rz-sae},eax                          }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x7b, 0xf5                                     }, { vcvtusi2ss xmm30,xmm29,ebp                                   }
+testcase	{ 0x62, 0x61, 0x16, 0x10, 0x7b, 0xf5                                     }, { vcvtusi2ss xmm30,xmm29,{rn-sae},ebp                          }
+testcase	{ 0x62, 0x61, 0x16, 0x50, 0x7b, 0xf5                                     }, { vcvtusi2ss xmm30,xmm29,{ru-sae},ebp                          }
+testcase	{ 0x62, 0x61, 0x16, 0x30, 0x7b, 0xf5                                     }, { vcvtusi2ss xmm30,xmm29,{rd-sae},ebp                          }
+testcase	{ 0x62, 0x61, 0x16, 0x70, 0x7b, 0xf5                                     }, { vcvtusi2ss xmm30,xmm29,{rz-sae},ebp                          }
+testcase	{ 0x62, 0x41, 0x16, 0x00, 0x7b, 0xf5                                     }, { vcvtusi2ss xmm30,xmm29,r13d                                  }
+testcase	{ 0x62, 0x41, 0x16, 0x10, 0x7b, 0xf5                                     }, { vcvtusi2ss xmm30,xmm29,{rn-sae},r13d                         }
+testcase	{ 0x62, 0x41, 0x16, 0x50, 0x7b, 0xf5                                     }, { vcvtusi2ss xmm30,xmm29,{ru-sae},r13d                         }
+testcase	{ 0x62, 0x41, 0x16, 0x30, 0x7b, 0xf5                                     }, { vcvtusi2ss xmm30,xmm29,{rd-sae},r13d                         }
+testcase	{ 0x62, 0x41, 0x16, 0x70, 0x7b, 0xf5                                     }, { vcvtusi2ss xmm30,xmm29,{rz-sae},r13d                         }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x7b, 0x31                                     }, { vcvtusi2ss xmm30,xmm29,DWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x16, 0x00, 0x7b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtusi2ss xmm30,xmm29,DWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x7b, 0x72, 0x7f                               }, { vcvtusi2ss xmm30,xmm29,DWORD rdx+0x1fc                     }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x7b, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvtusi2ss xmm30,xmm29,DWORD rdx+0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x7b, 0x72, 0x80                               }, { vcvtusi2ss xmm30,xmm29,DWORD rdx-0x200                     }
+testcase	{ 0x62, 0x61, 0x16, 0x00, 0x7b, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvtusi2ss xmm30,xmm29,DWORD rdx-0x204                     }
+testcase	{ 0x62, 0x61, 0x96, 0x00, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,rax                                   }
+testcase	{ 0x62, 0x61, 0x96, 0x10, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,{rn-sae},rax                          }
+testcase	{ 0x62, 0x61, 0x96, 0x50, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,{ru-sae},rax                          }
+testcase	{ 0x62, 0x61, 0x96, 0x30, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,{rd-sae},rax                          }
+testcase	{ 0x62, 0x61, 0x96, 0x70, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,{rz-sae},rax                          }
+testcase	{ 0x62, 0x41, 0x96, 0x00, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,r8                                    }
+testcase	{ 0x62, 0x41, 0x96, 0x10, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,{rn-sae},r8                           }
+testcase	{ 0x62, 0x41, 0x96, 0x50, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,{ru-sae},r8                           }
+testcase	{ 0x62, 0x41, 0x96, 0x30, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,{rd-sae},r8                           }
+testcase	{ 0x62, 0x41, 0x96, 0x70, 0x7b, 0xf0                                     }, { vcvtusi2ss xmm30,xmm29,{rz-sae},r8                           }
+testcase	{ 0x62, 0x61, 0x96, 0x00, 0x7b, 0x31                                     }, { vcvtusi2ss xmm30,xmm29,QWORD rcx                           }
+testcase	{ 0x62, 0x21, 0x96, 0x00, 0x7b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvtusi2ss xmm30,xmm29,QWORD rax+r14*8+0x123               }
+testcase	{ 0x62, 0x61, 0x96, 0x00, 0x7b, 0x72, 0x7f                               }, { vcvtusi2ss xmm30,xmm29,QWORD rdx+0x3f8                     }
+testcase	{ 0x62, 0x61, 0x96, 0x00, 0x7b, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vcvtusi2ss xmm30,xmm29,QWORD rdx+0x400                     }
+testcase	{ 0x62, 0x61, 0x96, 0x00, 0x7b, 0x72, 0x80                               }, { vcvtusi2ss xmm30,xmm29,QWORD rdx-0x400                     }
+testcase	{ 0x62, 0x61, 0x96, 0x00, 0x7b, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vcvtusi2ss xmm30,xmm29,QWORD rdx-0x408                     }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x2c, 0xf4                                     }, { vscalefpd zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x2c, 0xf4                                     }, { vscalefpd zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x2c, 0xf4                                     }, { vscalefpd zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0x10, 0x2c, 0xf4                                     }, { vscalefpd zmm30,zmm29,zmm28,{rn-sae}                         }
+testcase	{ 0x62, 0x02, 0x95, 0x50, 0x2c, 0xf4                                     }, { vscalefpd zmm30,zmm29,zmm28,{ru-sae}                         }
+testcase	{ 0x62, 0x02, 0x95, 0x30, 0x2c, 0xf4                                     }, { vscalefpd zmm30,zmm29,zmm28,{rd-sae}                         }
+testcase	{ 0x62, 0x02, 0x95, 0x70, 0x2c, 0xf4                                     }, { vscalefpd zmm30,zmm29,zmm28,{rz-sae}                         }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x2c, 0x31                                     }, { vscalefpd zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x2c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vscalefpd zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x2c, 0x31                                     }, { vscalefpd zmm30,zmm29,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x2c, 0x72, 0x7f                               }, { vscalefpd zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x2c, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vscalefpd zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x2c, 0x72, 0x80                               }, { vscalefpd zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x2c, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vscalefpd zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x2c, 0x72, 0x7f                               }, { vscalefpd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x2c, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vscalefpd zmm30,zmm29,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x2c, 0x72, 0x80                               }, { vscalefpd zmm30,zmm29,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x2c, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vscalefpd zmm30,zmm29,QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x2c, 0xf4                                     }, { vscalefps zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x2c, 0xf4                                     }, { vscalefps zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x2c, 0xf4                                     }, { vscalefps zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0x10, 0x2c, 0xf4                                     }, { vscalefps zmm30,zmm29,zmm28,{rn-sae}                         }
+testcase	{ 0x62, 0x02, 0x15, 0x50, 0x2c, 0xf4                                     }, { vscalefps zmm30,zmm29,zmm28,{ru-sae}                         }
+testcase	{ 0x62, 0x02, 0x15, 0x30, 0x2c, 0xf4                                     }, { vscalefps zmm30,zmm29,zmm28,{rd-sae}                         }
+testcase	{ 0x62, 0x02, 0x15, 0x70, 0x2c, 0xf4                                     }, { vscalefps zmm30,zmm29,zmm28,{rz-sae}                         }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x2c, 0x31                                     }, { vscalefps zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x2c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vscalefps zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x2c, 0x31                                     }, { vscalefps zmm30,zmm29,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x2c, 0x72, 0x7f                               }, { vscalefps zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x2c, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vscalefps zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x2c, 0x72, 0x80                               }, { vscalefps zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x2c, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vscalefps zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x2c, 0x72, 0x7f                               }, { vscalefps zmm30,zmm29,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x2c, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vscalefps zmm30,zmm29,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x2c, 0x72, 0x80                               }, { vscalefps zmm30,zmm29,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x2c, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vscalefps zmm30,zmm29,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x02, 0x95, 0x07, 0x2d, 0xf4                                     }, { vscalefsd xmm30{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x02, 0x95, 0x87, 0x2d, 0xf4                                     }, { vscalefsd xmm30{k7}{z},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x95, 0x17, 0x2d, 0xf4                                     }, { vscalefsd xmm30{k7},xmm29,xmm28,{rn-sae}                     }
+testcase	{ 0x62, 0x02, 0x95, 0x57, 0x2d, 0xf4                                     }, { vscalefsd xmm30{k7},xmm29,xmm28,{ru-sae}                     }
+testcase	{ 0x62, 0x02, 0x95, 0x37, 0x2d, 0xf4                                     }, { vscalefsd xmm30{k7},xmm29,xmm28,{rd-sae}                     }
+testcase	{ 0x62, 0x02, 0x95, 0x77, 0x2d, 0xf4                                     }, { vscalefsd xmm30{k7},xmm29,xmm28,{rz-sae}                     }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x2d, 0x31                                     }, { vscalefsd xmm30{k7},xmm29,QWORD rcx                        }
+testcase	{ 0x62, 0x22, 0x95, 0x07, 0x2d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vscalefsd xmm30{k7},xmm29,QWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x2d, 0x72, 0x7f                               }, { vscalefsd xmm30{k7},xmm29,QWORD rdx+0x3f8                  }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x2d, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vscalefsd xmm30{k7},xmm29,QWORD rdx+0x400                  }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x2d, 0x72, 0x80                               }, { vscalefsd xmm30{k7},xmm29,QWORD rdx-0x400                  }
+testcase	{ 0x62, 0x62, 0x95, 0x07, 0x2d, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vscalefsd xmm30{k7},xmm29,QWORD rdx-0x408                  }
+testcase	{ 0x62, 0x02, 0x15, 0x07, 0x2d, 0xf4                                     }, { vscalefss xmm30{k7},xmm29,xmm28                              }
+testcase	{ 0x62, 0x02, 0x15, 0x87, 0x2d, 0xf4                                     }, { vscalefss xmm30{k7}{z},xmm29,xmm28                           }
+testcase	{ 0x62, 0x02, 0x15, 0x17, 0x2d, 0xf4                                     }, { vscalefss xmm30{k7},xmm29,xmm28,{rn-sae}                     }
+testcase	{ 0x62, 0x02, 0x15, 0x57, 0x2d, 0xf4                                     }, { vscalefss xmm30{k7},xmm29,xmm28,{ru-sae}                     }
+testcase	{ 0x62, 0x02, 0x15, 0x37, 0x2d, 0xf4                                     }, { vscalefss xmm30{k7},xmm29,xmm28,{rd-sae}                     }
+testcase	{ 0x62, 0x02, 0x15, 0x77, 0x2d, 0xf4                                     }, { vscalefss xmm30{k7},xmm29,xmm28,{rz-sae}                     }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x2d, 0x31                                     }, { vscalefss xmm30{k7},xmm29,DWORD rcx                        }
+testcase	{ 0x62, 0x22, 0x15, 0x07, 0x2d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vscalefss xmm30{k7},xmm29,DWORD rax+r14*8+0x123            }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x2d, 0x72, 0x7f                               }, { vscalefss xmm30{k7},xmm29,DWORD rdx+0x1fc                  }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x2d, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vscalefss xmm30{k7},xmm29,DWORD rdx+0x200                  }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x2d, 0x72, 0x80                               }, { vscalefss xmm30{k7},xmm29,DWORD rdx-0x200                  }
+testcase	{ 0x62, 0x62, 0x15, 0x07, 0x2d, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vscalefss xmm30{k7},xmm29,DWORD rdx-0x204                  }
+testcase	{ 0x62, 0x03, 0x15, 0x40, 0x54, 0xf4, 0xab                               }, { vfixupimmps zmm30,zmm29,zmm28,0xab                           }
+testcase	{ 0x62, 0x03, 0x15, 0x47, 0x54, 0xf4, 0xab                               }, { vfixupimmps zmm30{k7},zmm29,zmm28,0xab                       }
+testcase	{ 0x62, 0x03, 0x15, 0xc7, 0x54, 0xf4, 0xab                               }, { vfixupimmps zmm30{k7}{z},zmm29,zmm28,0xab                    }
+testcase	{ 0x62, 0x03, 0x15, 0x10, 0x54, 0xf4, 0xab                               }, { vfixupimmps zmm30,zmm29,zmm28,{sae},0xab                     }
+testcase	{ 0x62, 0x03, 0x15, 0x40, 0x54, 0xf4, 0x7b                               }, { vfixupimmps zmm30,zmm29,zmm28,0x7b                           }
+testcase	{ 0x62, 0x03, 0x15, 0x10, 0x54, 0xf4, 0x7b                               }, { vfixupimmps zmm30,zmm29,zmm28,{sae},0x7b                     }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x54, 0x31, 0x7b                               }, { vfixupimmps zmm30,zmm29,ZWORD rcx,0x7b                     }
+testcase	{ 0x62, 0x23, 0x15, 0x40, 0x54, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vfixupimmps zmm30,zmm29,ZWORD rax+r14*8+0x123,0x7b         }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x54, 0x31, 0x7b                               }, { vfixupimmps zmm30,zmm29,DWORD rcx{1to16},0x7b              }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x54, 0x72, 0x7f, 0x7b                         }, { vfixupimmps zmm30,zmm29,ZWORD rdx+0x1fc0,0x7b              }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x54, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vfixupimmps zmm30,zmm29,ZWORD rdx+0x2000,0x7b              }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x54, 0x72, 0x80, 0x7b                         }, { vfixupimmps zmm30,zmm29,ZWORD rdx-0x2000,0x7b              }
+testcase	{ 0x62, 0x63, 0x15, 0x40, 0x54, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vfixupimmps zmm30,zmm29,ZWORD rdx-0x2040,0x7b              }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x54, 0x72, 0x7f, 0x7b                         }, { vfixupimmps zmm30,zmm29,DWORD rdx+0x1fc{1to16},0x7b        }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x54, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vfixupimmps zmm30,zmm29,DWORD rdx+0x200{1to16},0x7b        }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x54, 0x72, 0x80, 0x7b                         }, { vfixupimmps zmm30,zmm29,DWORD rdx-0x200{1to16},0x7b        }
+testcase	{ 0x62, 0x63, 0x15, 0x50, 0x54, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vfixupimmps zmm30,zmm29,DWORD rdx-0x204{1to16},0x7b        }
+testcase	{ 0x62, 0x03, 0x95, 0x40, 0x54, 0xf4, 0xab                               }, { vfixupimmpd zmm30,zmm29,zmm28,0xab                           }
+testcase	{ 0x62, 0x03, 0x95, 0x47, 0x54, 0xf4, 0xab                               }, { vfixupimmpd zmm30{k7},zmm29,zmm28,0xab                       }
+testcase	{ 0x62, 0x03, 0x95, 0xc7, 0x54, 0xf4, 0xab                               }, { vfixupimmpd zmm30{k7}{z},zmm29,zmm28,0xab                    }
+testcase	{ 0x62, 0x03, 0x95, 0x10, 0x54, 0xf4, 0xab                               }, { vfixupimmpd zmm30,zmm29,zmm28,{sae},0xab                     }
+testcase	{ 0x62, 0x03, 0x95, 0x40, 0x54, 0xf4, 0x7b                               }, { vfixupimmpd zmm30,zmm29,zmm28,0x7b                           }
+testcase	{ 0x62, 0x03, 0x95, 0x10, 0x54, 0xf4, 0x7b                               }, { vfixupimmpd zmm30,zmm29,zmm28,{sae},0x7b                     }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x54, 0x31, 0x7b                               }, { vfixupimmpd zmm30,zmm29,ZWORD rcx,0x7b                     }
+testcase	{ 0x62, 0x23, 0x95, 0x40, 0x54, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vfixupimmpd zmm30,zmm29,ZWORD rax+r14*8+0x123,0x7b         }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x54, 0x31, 0x7b                               }, { vfixupimmpd zmm30,zmm29,QWORD rcx{1to8},0x7b               }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x54, 0x72, 0x7f, 0x7b                         }, { vfixupimmpd zmm30,zmm29,ZWORD rdx+0x1fc0,0x7b              }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x54, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vfixupimmpd zmm30,zmm29,ZWORD rdx+0x2000,0x7b              }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x54, 0x72, 0x80, 0x7b                         }, { vfixupimmpd zmm30,zmm29,ZWORD rdx-0x2000,0x7b              }
+testcase	{ 0x62, 0x63, 0x95, 0x40, 0x54, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vfixupimmpd zmm30,zmm29,ZWORD rdx-0x2040,0x7b              }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x54, 0x72, 0x7f, 0x7b                         }, { vfixupimmpd zmm30,zmm29,QWORD rdx+0x3f8{1to8},0x7b         }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x54, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vfixupimmpd zmm30,zmm29,QWORD rdx+0x400{1to8},0x7b         }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x54, 0x72, 0x80, 0x7b                         }, { vfixupimmpd zmm30,zmm29,QWORD rdx-0x400{1to8},0x7b         }
+testcase	{ 0x62, 0x63, 0x95, 0x50, 0x54, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vfixupimmpd zmm30,zmm29,QWORD rdx-0x408{1to8},0x7b         }
+testcase	{ 0x62, 0x03, 0x15, 0x07, 0x55, 0xf4, 0xab                               }, { vfixupimmss xmm30{k7},xmm29,xmm28,0xab                       }
+testcase	{ 0x62, 0x03, 0x15, 0x87, 0x55, 0xf4, 0xab                               }, { vfixupimmss xmm30{k7}{z},xmm29,xmm28,0xab                    }
+testcase	{ 0x62, 0x03, 0x15, 0x17, 0x55, 0xf4, 0xab                               }, { vfixupimmss xmm30{k7},xmm29,xmm28,{sae},0xab                 }
+testcase	{ 0x62, 0x03, 0x15, 0x07, 0x55, 0xf4, 0x7b                               }, { vfixupimmss xmm30{k7},xmm29,xmm28,0x7b                       }
+testcase	{ 0x62, 0x03, 0x15, 0x17, 0x55, 0xf4, 0x7b                               }, { vfixupimmss xmm30{k7},xmm29,xmm28,{sae},0x7b                 }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x55, 0x31, 0x7b                               }, { vfixupimmss xmm30{k7},xmm29,DWORD rcx,0x7b                 }
+testcase	{ 0x62, 0x23, 0x15, 0x07, 0x55, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vfixupimmss xmm30{k7},xmm29,DWORD rax+r14*8+0x123,0x7b     }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x55, 0x72, 0x7f, 0x7b                         }, { vfixupimmss xmm30{k7},xmm29,DWORD rdx+0x1fc,0x7b           }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x55, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vfixupimmss xmm30{k7},xmm29,DWORD rdx+0x200,0x7b           }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x55, 0x72, 0x80, 0x7b                         }, { vfixupimmss xmm30{k7},xmm29,DWORD rdx-0x200,0x7b           }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x55, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vfixupimmss xmm30{k7},xmm29,DWORD rdx-0x204,0x7b           }
+testcase	{ 0x62, 0x03, 0x95, 0x07, 0x55, 0xf4, 0xab                               }, { vfixupimmsd xmm30{k7},xmm29,xmm28,0xab                       }
+testcase	{ 0x62, 0x03, 0x95, 0x87, 0x55, 0xf4, 0xab                               }, { vfixupimmsd xmm30{k7}{z},xmm29,xmm28,0xab                    }
+testcase	{ 0x62, 0x03, 0x95, 0x17, 0x55, 0xf4, 0xab                               }, { vfixupimmsd xmm30{k7},xmm29,xmm28,{sae},0xab                 }
+testcase	{ 0x62, 0x03, 0x95, 0x07, 0x55, 0xf4, 0x7b                               }, { vfixupimmsd xmm30{k7},xmm29,xmm28,0x7b                       }
+testcase	{ 0x62, 0x03, 0x95, 0x17, 0x55, 0xf4, 0x7b                               }, { vfixupimmsd xmm30{k7},xmm29,xmm28,{sae},0x7b                 }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x55, 0x31, 0x7b                               }, { vfixupimmsd xmm30{k7},xmm29,QWORD rcx,0x7b                 }
+testcase	{ 0x62, 0x23, 0x95, 0x07, 0x55, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vfixupimmsd xmm30{k7},xmm29,QWORD rax+r14*8+0x123,0x7b     }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x55, 0x72, 0x7f, 0x7b                         }, { vfixupimmsd xmm30{k7},xmm29,QWORD rdx+0x3f8,0x7b           }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x55, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vfixupimmsd xmm30{k7},xmm29,QWORD rdx+0x400,0x7b           }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x55, 0x72, 0x80, 0x7b                         }, { vfixupimmsd xmm30{k7},xmm29,QWORD rdx-0x400,0x7b           }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x55, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vfixupimmsd xmm30{k7},xmm29,QWORD rdx-0x408,0x7b           }
+testcase	{ 0x62, 0x91, 0x0d, 0x40, 0x72, 0xf5, 0xab                               }, { vpslld zmm30,zmm29,0xab                                      }
+testcase	{ 0x62, 0x91, 0x0d, 0x47, 0x72, 0xf5, 0xab                               }, { vpslld zmm30{k7},zmm29,0xab                                  }
+testcase	{ 0x62, 0x91, 0x0d, 0xc7, 0x72, 0xf5, 0xab                               }, { vpslld zmm30{k7}{z},zmm29,0xab                               }
+testcase	{ 0x62, 0x91, 0x0d, 0x40, 0x72, 0xf5, 0x7b                               }, { vpslld zmm30,zmm29,0x7b                                      }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x31, 0x7b                               }, { vpslld zmm30,ZWORD rcx,0x7b                                }
+testcase	{ 0x62, 0xb1, 0x0d, 0x40, 0x72, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpslld zmm30,ZWORD rax+r14*8+0x123,0x7b                    }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x31, 0x7b                               }, { vpslld zmm30,DWORD rcx{1to16},0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x72, 0x7f, 0x7b                         }, { vpslld zmm30,ZWORD rdx+0x1fc0,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpslld zmm30,ZWORD rdx+0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x72, 0x80, 0x7b                         }, { vpslld zmm30,ZWORD rdx-0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpslld zmm30,ZWORD rdx-0x2040,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x72, 0x7f, 0x7b                         }, { vpslld zmm30,DWORD rdx+0x1fc{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vpslld zmm30,DWORD rdx+0x200{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x72, 0x80, 0x7b                         }, { vpslld zmm30,DWORD rdx-0x200{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vpslld zmm30,DWORD rdx-0x204{1to16},0x7b                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0x73, 0xf5, 0xab                               }, { vpsllq zmm30,zmm29,0xab                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0x73, 0xf5, 0xab                               }, { vpsllq zmm30{k7},zmm29,0xab                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0xc7, 0x73, 0xf5, 0xab                               }, { vpsllq zmm30{k7}{z},zmm29,0xab                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0x73, 0xf5, 0x7b                               }, { vpsllq zmm30,zmm29,0x7b                                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x73, 0x31, 0x7b                               }, { vpsllq zmm30,ZWORD rcx,0x7b                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0x73, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpsllq zmm30,ZWORD rax+r14*8+0x123,0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x73, 0x31, 0x7b                               }, { vpsllq zmm30,QWORD rcx{1to8},0x7b                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x73, 0x72, 0x7f, 0x7b                         }, { vpsllq zmm30,ZWORD rdx+0x1fc0,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x73, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpsllq zmm30,ZWORD rdx+0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x73, 0x72, 0x80, 0x7b                         }, { vpsllq zmm30,ZWORD rdx-0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x73, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpsllq zmm30,ZWORD rdx-0x2040,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x73, 0x72, 0x7f, 0x7b                         }, { vpsllq zmm30,QWORD rdx+0x3f8{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x73, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vpsllq zmm30,QWORD rdx+0x400{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x73, 0x72, 0x80, 0x7b                         }, { vpsllq zmm30,QWORD rdx-0x400{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x73, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vpsllq zmm30,QWORD rdx-0x408{1to8},0x7b                    }
+testcase	{ 0x62, 0x91, 0x0d, 0x40, 0x72, 0xe5, 0xab                               }, { vpsrad zmm30,zmm29,0xab                                      }
+testcase	{ 0x62, 0x91, 0x0d, 0x47, 0x72, 0xe5, 0xab                               }, { vpsrad zmm30{k7},zmm29,0xab                                  }
+testcase	{ 0x62, 0x91, 0x0d, 0xc7, 0x72, 0xe5, 0xab                               }, { vpsrad zmm30{k7}{z},zmm29,0xab                               }
+testcase	{ 0x62, 0x91, 0x0d, 0x40, 0x72, 0xe5, 0x7b                               }, { vpsrad zmm30,zmm29,0x7b                                      }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x21, 0x7b                               }, { vpsrad zmm30,ZWORD rcx,0x7b                                }
+testcase	{ 0x62, 0xb1, 0x0d, 0x40, 0x72, 0xa4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpsrad zmm30,ZWORD rax+r14*8+0x123,0x7b                    }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x21, 0x7b                               }, { vpsrad zmm30,DWORD rcx{1to16},0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x62, 0x7f, 0x7b                         }, { vpsrad zmm30,ZWORD rdx+0x1fc0,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0xa2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpsrad zmm30,ZWORD rdx+0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x62, 0x80, 0x7b                         }, { vpsrad zmm30,ZWORD rdx-0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0xa2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpsrad zmm30,ZWORD rdx-0x2040,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x62, 0x7f, 0x7b                         }, { vpsrad zmm30,DWORD rdx+0x1fc{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0xa2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vpsrad zmm30,DWORD rdx+0x200{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x62, 0x80, 0x7b                         }, { vpsrad zmm30,DWORD rdx-0x200{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0xa2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vpsrad zmm30,DWORD rdx-0x204{1to16},0x7b                   }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0x72, 0xe5, 0xab                               }, { vpsraq zmm30,zmm29,0xab                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0x72, 0xe5, 0xab                               }, { vpsraq zmm30{k7},zmm29,0xab                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0xc7, 0x72, 0xe5, 0xab                               }, { vpsraq zmm30{k7}{z},zmm29,0xab                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0x72, 0xe5, 0x7b                               }, { vpsraq zmm30,zmm29,0x7b                                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x21, 0x7b                               }, { vpsraq zmm30,ZWORD rcx,0x7b                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0x72, 0xa4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpsraq zmm30,ZWORD rax+r14*8+0x123,0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x21, 0x7b                               }, { vpsraq zmm30,QWORD rcx{1to8},0x7b                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x62, 0x7f, 0x7b                         }, { vpsraq zmm30,ZWORD rdx+0x1fc0,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0xa2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vpsraq zmm30,ZWORD rdx+0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x62, 0x80, 0x7b                         }, { vpsraq zmm30,ZWORD rdx-0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0xa2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vpsraq zmm30,ZWORD rdx-0x2040,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x62, 0x7f, 0x7b                         }, { vpsraq zmm30,QWORD rdx+0x3f8{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0xa2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vpsraq zmm30,QWORD rdx+0x400{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x62, 0x80, 0x7b                         }, { vpsraq zmm30,QWORD rdx-0x400{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0xa2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vpsraq zmm30,QWORD rdx-0x408{1to8},0x7b                    }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x15, 0xf4                                     }, { vprolvd zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x15, 0xf4                                     }, { vprolvd zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x15, 0xf4                                     }, { vprolvd zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x15, 0x31                                     }, { vprolvd zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x15, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vprolvd zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x15, 0x31                                     }, { vprolvd zmm30,zmm29,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x15, 0x72, 0x7f                               }, { vprolvd zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x15, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vprolvd zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x15, 0x72, 0x80                               }, { vprolvd zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x15, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vprolvd zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x15, 0x72, 0x7f                               }, { vprolvd zmm30,zmm29,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x15, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vprolvd zmm30,zmm29,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x15, 0x72, 0x80                               }, { vprolvd zmm30,zmm29,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x15, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vprolvd zmm30,zmm29,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x91, 0x0d, 0x40, 0x72, 0xcd, 0xab                               }, { vprold zmm30,zmm29,0xab                                      }
+testcase	{ 0x62, 0x91, 0x0d, 0x47, 0x72, 0xcd, 0xab                               }, { vprold zmm30{k7},zmm29,0xab                                  }
+testcase	{ 0x62, 0x91, 0x0d, 0xc7, 0x72, 0xcd, 0xab                               }, { vprold zmm30{k7}{z},zmm29,0xab                               }
+testcase	{ 0x62, 0x91, 0x0d, 0x40, 0x72, 0xcd, 0x7b                               }, { vprold zmm30,zmm29,0x7b                                      }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x09, 0x7b                               }, { vprold zmm30,ZWORD rcx,0x7b                                }
+testcase	{ 0x62, 0xb1, 0x0d, 0x40, 0x72, 0x8c, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vprold zmm30,ZWORD rax+r14*8+0x123,0x7b                    }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x09, 0x7b                               }, { vprold zmm30,DWORD rcx{1to16},0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x4a, 0x7f, 0x7b                         }, { vprold zmm30,ZWORD rdx+0x1fc0,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x8a, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vprold zmm30,ZWORD rdx+0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x4a, 0x80, 0x7b                         }, { vprold zmm30,ZWORD rdx-0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x8a, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vprold zmm30,ZWORD rdx-0x2040,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x4a, 0x7f, 0x7b                         }, { vprold zmm30,DWORD rdx+0x1fc{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x8a, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vprold zmm30,DWORD rdx+0x200{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x4a, 0x80, 0x7b                         }, { vprold zmm30,DWORD rdx-0x200{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x8a, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vprold zmm30,DWORD rdx-0x204{1to16},0x7b                   }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x15, 0xf4                                     }, { vprolvq zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x15, 0xf4                                     }, { vprolvq zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x15, 0xf4                                     }, { vprolvq zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x15, 0x31                                     }, { vprolvq zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x15, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vprolvq zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x15, 0x31                                     }, { vprolvq zmm30,zmm29,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x15, 0x72, 0x7f                               }, { vprolvq zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x15, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vprolvq zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x15, 0x72, 0x80                               }, { vprolvq zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x15, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vprolvq zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x15, 0x72, 0x7f                               }, { vprolvq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x15, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vprolvq zmm30,zmm29,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x15, 0x72, 0x80                               }, { vprolvq zmm30,zmm29,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x15, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vprolvq zmm30,zmm29,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0x72, 0xcd, 0xab                               }, { vprolq zmm30,zmm29,0xab                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0x72, 0xcd, 0xab                               }, { vprolq zmm30{k7},zmm29,0xab                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0xc7, 0x72, 0xcd, 0xab                               }, { vprolq zmm30{k7}{z},zmm29,0xab                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0x72, 0xcd, 0x7b                               }, { vprolq zmm30,zmm29,0x7b                                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x09, 0x7b                               }, { vprolq zmm30,ZWORD rcx,0x7b                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0x72, 0x8c, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vprolq zmm30,ZWORD rax+r14*8+0x123,0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x09, 0x7b                               }, { vprolq zmm30,QWORD rcx{1to8},0x7b                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x4a, 0x7f, 0x7b                         }, { vprolq zmm30,ZWORD rdx+0x1fc0,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x8a, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vprolq zmm30,ZWORD rdx+0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x4a, 0x80, 0x7b                         }, { vprolq zmm30,ZWORD rdx-0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x8a, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vprolq zmm30,ZWORD rdx-0x2040,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x4a, 0x7f, 0x7b                         }, { vprolq zmm30,QWORD rdx+0x3f8{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x8a, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vprolq zmm30,QWORD rdx+0x400{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x4a, 0x80, 0x7b                         }, { vprolq zmm30,QWORD rdx-0x400{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x8a, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vprolq zmm30,QWORD rdx-0x408{1to8},0x7b                    }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x14, 0xf4                                     }, { vprorvd zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x14, 0xf4                                     }, { vprorvd zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x14, 0xf4                                     }, { vprorvd zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x14, 0x31                                     }, { vprorvd zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x14, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vprorvd zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x14, 0x31                                     }, { vprorvd zmm30,zmm29,DWORD rcx{1to16}                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x14, 0x72, 0x7f                               }, { vprorvd zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x14, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vprorvd zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x14, 0x72, 0x80                               }, { vprorvd zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x14, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vprorvd zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x14, 0x72, 0x7f                               }, { vprorvd zmm30,zmm29,DWORD rdx+0x1fc{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x14, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vprorvd zmm30,zmm29,DWORD rdx+0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x14, 0x72, 0x80                               }, { vprorvd zmm30,zmm29,DWORD rdx-0x200{1to16}                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x14, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vprorvd zmm30,zmm29,DWORD rdx-0x204{1to16}                 }
+testcase	{ 0x62, 0x91, 0x0d, 0x40, 0x72, 0xc5, 0xab                               }, { vprord zmm30,zmm29,0xab                                      }
+testcase	{ 0x62, 0x91, 0x0d, 0x47, 0x72, 0xc5, 0xab                               }, { vprord zmm30{k7},zmm29,0xab                                  }
+testcase	{ 0x62, 0x91, 0x0d, 0xc7, 0x72, 0xc5, 0xab                               }, { vprord zmm30{k7}{z},zmm29,0xab                               }
+testcase	{ 0x62, 0x91, 0x0d, 0x40, 0x72, 0xc5, 0x7b                               }, { vprord zmm30,zmm29,0x7b                                      }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x01, 0x7b                               }, { vprord zmm30,ZWORD rcx,0x7b                                }
+testcase	{ 0x62, 0xb1, 0x0d, 0x40, 0x72, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vprord zmm30,ZWORD rax+r14*8+0x123,0x7b                    }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x01, 0x7b                               }, { vprord zmm30,DWORD rcx{1to16},0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x42, 0x7f, 0x7b                         }, { vprord zmm30,ZWORD rdx+0x1fc0,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x82, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vprord zmm30,ZWORD rdx+0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x42, 0x80, 0x7b                         }, { vprord zmm30,ZWORD rdx-0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x82, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vprord zmm30,ZWORD rdx-0x2040,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x42, 0x7f, 0x7b                         }, { vprord zmm30,DWORD rdx+0x1fc{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x82, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vprord zmm30,DWORD rdx+0x200{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x42, 0x80, 0x7b                         }, { vprord zmm30,DWORD rdx-0x200{1to16},0x7b                   }
+testcase	{ 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x82, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vprord zmm30,DWORD rdx-0x204{1to16},0x7b                   }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x14, 0xf4                                     }, { vprorvq zmm30,zmm29,zmm28                                    }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x14, 0xf4                                     }, { vprorvq zmm30{k7},zmm29,zmm28                                }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x14, 0xf4                                     }, { vprorvq zmm30{k7}{z},zmm29,zmm28                             }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x14, 0x31                                     }, { vprorvq zmm30,zmm29,ZWORD rcx                              }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x14, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vprorvq zmm30,zmm29,ZWORD rax+r14*8+0x123                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x14, 0x31                                     }, { vprorvq zmm30,zmm29,QWORD rcx{1to8}                        }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x14, 0x72, 0x7f                               }, { vprorvq zmm30,zmm29,ZWORD rdx+0x1fc0                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x14, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vprorvq zmm30,zmm29,ZWORD rdx+0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x14, 0x72, 0x80                               }, { vprorvq zmm30,zmm29,ZWORD rdx-0x2000                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x14, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vprorvq zmm30,zmm29,ZWORD rdx-0x2040                       }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x14, 0x72, 0x7f                               }, { vprorvq zmm30,zmm29,QWORD rdx+0x3f8{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x14, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vprorvq zmm30,zmm29,QWORD rdx+0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x14, 0x72, 0x80                               }, { vprorvq zmm30,zmm29,QWORD rdx-0x400{1to8}                  }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x14, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vprorvq zmm30,zmm29,QWORD rdx-0x408{1to8}                  }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0x72, 0xc5, 0xab                               }, { vprorq zmm30,zmm29,0xab                                      }
+testcase	{ 0x62, 0x91, 0x8d, 0x47, 0x72, 0xc5, 0xab                               }, { vprorq zmm30{k7},zmm29,0xab                                  }
+testcase	{ 0x62, 0x91, 0x8d, 0xc7, 0x72, 0xc5, 0xab                               }, { vprorq zmm30{k7}{z},zmm29,0xab                               }
+testcase	{ 0x62, 0x91, 0x8d, 0x40, 0x72, 0xc5, 0x7b                               }, { vprorq zmm30,zmm29,0x7b                                      }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x01, 0x7b                               }, { vprorq zmm30,ZWORD rcx,0x7b                                }
+testcase	{ 0x62, 0xb1, 0x8d, 0x40, 0x72, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vprorq zmm30,ZWORD rax+r14*8+0x123,0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x01, 0x7b                               }, { vprorq zmm30,QWORD rcx{1to8},0x7b                          }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x42, 0x7f, 0x7b                         }, { vprorq zmm30,ZWORD rdx+0x1fc0,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x82, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vprorq zmm30,ZWORD rdx+0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x42, 0x80, 0x7b                         }, { vprorq zmm30,ZWORD rdx-0x2000,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x82, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vprorq zmm30,ZWORD rdx-0x2040,0x7b                         }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x42, 0x7f, 0x7b                         }, { vprorq zmm30,QWORD rdx+0x3f8{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x82, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vprorq zmm30,QWORD rdx+0x400{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x42, 0x80, 0x7b                         }, { vprorq zmm30,QWORD rdx-0x400{1to8},0x7b                    }
+testcase	{ 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x82, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vprorq zmm30,QWORD rdx-0x408{1to8},0x7b                    }
+testcase	{ 0x62, 0x03, 0xfd, 0x48, 0x09, 0xf5, 0xab                               }, { vrndscalepd zmm30,zmm29,0xab                                 }
+testcase	{ 0x62, 0x03, 0xfd, 0x4f, 0x09, 0xf5, 0xab                               }, { vrndscalepd zmm30{k7},zmm29,0xab                             }
+testcase	{ 0x62, 0x03, 0xfd, 0xcf, 0x09, 0xf5, 0xab                               }, { vrndscalepd zmm30{k7}{z},zmm29,0xab                          }
+testcase	{ 0x62, 0x03, 0xfd, 0x18, 0x09, 0xf5, 0xab                               }, { vrndscalepd zmm30,zmm29,{sae},0xab                           }
+testcase	{ 0x62, 0x03, 0xfd, 0x48, 0x09, 0xf5, 0x7b                               }, { vrndscalepd zmm30,zmm29,0x7b                                 }
+testcase	{ 0x62, 0x03, 0xfd, 0x18, 0x09, 0xf5, 0x7b                               }, { vrndscalepd zmm30,zmm29,{sae},0x7b                           }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x09, 0x31, 0x7b                               }, { vrndscalepd zmm30,ZWORD rcx,0x7b                           }
+testcase	{ 0x62, 0x23, 0xfd, 0x48, 0x09, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vrndscalepd zmm30,ZWORD rax+r14*8+0x123,0x7b               }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x09, 0x31, 0x7b                               }, { vrndscalepd zmm30,QWORD rcx{1to8},0x7b                     }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x09, 0x72, 0x7f, 0x7b                         }, { vrndscalepd zmm30,ZWORD rdx+0x1fc0,0x7b                    }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x09, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vrndscalepd zmm30,ZWORD rdx+0x2000,0x7b                    }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x09, 0x72, 0x80, 0x7b                         }, { vrndscalepd zmm30,ZWORD rdx-0x2000,0x7b                    }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x09, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vrndscalepd zmm30,ZWORD rdx-0x2040,0x7b                    }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x09, 0x72, 0x7f, 0x7b                         }, { vrndscalepd zmm30,QWORD rdx+0x3f8{1to8},0x7b               }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x09, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vrndscalepd zmm30,QWORD rdx+0x400{1to8},0x7b               }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x09, 0x72, 0x80, 0x7b                         }, { vrndscalepd zmm30,QWORD rdx-0x400{1to8},0x7b               }
+testcase	{ 0x62, 0x63, 0xfd, 0x58, 0x09, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vrndscalepd zmm30,QWORD rdx-0x408{1to8},0x7b               }
+testcase	{ 0x62, 0x03, 0x7d, 0x48, 0x08, 0xf5, 0xab                               }, { vrndscaleps zmm30,zmm29,0xab                                 }
+testcase	{ 0x62, 0x03, 0x7d, 0x4f, 0x08, 0xf5, 0xab                               }, { vrndscaleps zmm30{k7},zmm29,0xab                             }
+testcase	{ 0x62, 0x03, 0x7d, 0xcf, 0x08, 0xf5, 0xab                               }, { vrndscaleps zmm30{k7}{z},zmm29,0xab                          }
+testcase	{ 0x62, 0x03, 0x7d, 0x18, 0x08, 0xf5, 0xab                               }, { vrndscaleps zmm30,zmm29,{sae},0xab                           }
+testcase	{ 0x62, 0x03, 0x7d, 0x48, 0x08, 0xf5, 0x7b                               }, { vrndscaleps zmm30,zmm29,0x7b                                 }
+testcase	{ 0x62, 0x03, 0x7d, 0x18, 0x08, 0xf5, 0x7b                               }, { vrndscaleps zmm30,zmm29,{sae},0x7b                           }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x08, 0x31, 0x7b                               }, { vrndscaleps zmm30,ZWORD rcx,0x7b                           }
+testcase	{ 0x62, 0x23, 0x7d, 0x48, 0x08, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vrndscaleps zmm30,ZWORD rax+r14*8+0x123,0x7b               }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x08, 0x31, 0x7b                               }, { vrndscaleps zmm30,DWORD rcx{1to16},0x7b                    }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x08, 0x72, 0x7f, 0x7b                         }, { vrndscaleps zmm30,ZWORD rdx+0x1fc0,0x7b                    }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x08, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b       }, { vrndscaleps zmm30,ZWORD rdx+0x2000,0x7b                    }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x08, 0x72, 0x80, 0x7b                         }, { vrndscaleps zmm30,ZWORD rdx-0x2000,0x7b                    }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x08, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b       }, { vrndscaleps zmm30,ZWORD rdx-0x2040,0x7b                    }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x08, 0x72, 0x7f, 0x7b                         }, { vrndscaleps zmm30,DWORD rdx+0x1fc{1to16},0x7b              }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x08, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vrndscaleps zmm30,DWORD rdx+0x200{1to16},0x7b              }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x08, 0x72, 0x80, 0x7b                         }, { vrndscaleps zmm30,DWORD rdx-0x200{1to16},0x7b              }
+testcase	{ 0x62, 0x63, 0x7d, 0x58, 0x08, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vrndscaleps zmm30,DWORD rdx-0x204{1to16},0x7b              }
+testcase	{ 0x62, 0x03, 0x95, 0x07, 0x0b, 0xf4, 0xab                               }, { vrndscalesd xmm30{k7},xmm29,xmm28,0xab                       }
+testcase	{ 0x62, 0x03, 0x95, 0x87, 0x0b, 0xf4, 0xab                               }, { vrndscalesd xmm30{k7}{z},xmm29,xmm28,0xab                    }
+testcase	{ 0x62, 0x03, 0x95, 0x17, 0x0b, 0xf4, 0xab                               }, { vrndscalesd xmm30{k7},xmm29,xmm28,{sae},0xab                 }
+testcase	{ 0x62, 0x03, 0x95, 0x07, 0x0b, 0xf4, 0x7b                               }, { vrndscalesd xmm30{k7},xmm29,xmm28,0x7b                       }
+testcase	{ 0x62, 0x03, 0x95, 0x17, 0x0b, 0xf4, 0x7b                               }, { vrndscalesd xmm30{k7},xmm29,xmm28,{sae},0x7b                 }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x0b, 0x31, 0x7b                               }, { vrndscalesd xmm30{k7},xmm29,QWORD rcx,0x7b                 }
+testcase	{ 0x62, 0x23, 0x95, 0x07, 0x0b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vrndscalesd xmm30{k7},xmm29,QWORD rax+r14*8+0x123,0x7b     }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x0b, 0x72, 0x7f, 0x7b                         }, { vrndscalesd xmm30{k7},xmm29,QWORD rdx+0x3f8,0x7b           }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x0b, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b       }, { vrndscalesd xmm30{k7},xmm29,QWORD rdx+0x400,0x7b           }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x0b, 0x72, 0x80, 0x7b                         }, { vrndscalesd xmm30{k7},xmm29,QWORD rdx-0x400,0x7b           }
+testcase	{ 0x62, 0x63, 0x95, 0x07, 0x0b, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b       }, { vrndscalesd xmm30{k7},xmm29,QWORD rdx-0x408,0x7b           }
+testcase	{ 0x62, 0x03, 0x15, 0x07, 0x0a, 0xf4, 0xab                               }, { vrndscaless xmm30{k7},xmm29,xmm28,0xab                       }
+testcase	{ 0x62, 0x03, 0x15, 0x87, 0x0a, 0xf4, 0xab                               }, { vrndscaless xmm30{k7}{z},xmm29,xmm28,0xab                    }
+testcase	{ 0x62, 0x03, 0x15, 0x17, 0x0a, 0xf4, 0xab                               }, { vrndscaless xmm30{k7},xmm29,xmm28,{sae},0xab                 }
+testcase	{ 0x62, 0x03, 0x15, 0x07, 0x0a, 0xf4, 0x7b                               }, { vrndscaless xmm30{k7},xmm29,xmm28,0x7b                       }
+testcase	{ 0x62, 0x03, 0x15, 0x17, 0x0a, 0xf4, 0x7b                               }, { vrndscaless xmm30{k7},xmm29,xmm28,{sae},0x7b                 }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x0a, 0x31, 0x7b                               }, { vrndscaless xmm30{k7},xmm29,DWORD rcx,0x7b                 }
+testcase	{ 0x62, 0x23, 0x15, 0x07, 0x0a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vrndscaless xmm30{k7},xmm29,DWORD rax+r14*8+0x123,0x7b     }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x0a, 0x72, 0x7f, 0x7b                         }, { vrndscaless xmm30{k7},xmm29,DWORD rdx+0x1fc,0x7b           }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x0a, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b       }, { vrndscaless xmm30{k7},xmm29,DWORD rdx+0x200,0x7b           }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x0a, 0x72, 0x80, 0x7b                         }, { vrndscaless xmm30{k7},xmm29,DWORD rdx-0x200,0x7b           }
+testcase	{ 0x62, 0x63, 0x15, 0x07, 0x0a, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b       }, { vrndscaless xmm30{k7},xmm29,DWORD rdx-0x204,0x7b           }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x8b, 0x31                                     }, { vpcompressq ZWORD rcx,zmm30                                }
+testcase	{ 0x62, 0x62, 0xfd, 0x4f, 0x8b, 0x31                                     }, { vpcompressq ZWORD rcx{k7},zmm30                            }
+testcase	{ 0x62, 0x22, 0xfd, 0x48, 0x8b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpcompressq ZWORD rax+r14*8+0x123,zmm30                    }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x8b, 0x72, 0x7f                               }, { vpcompressq ZWORD rdx+0x3f8,zmm30                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x8b, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpcompressq ZWORD rdx+0x400,zmm30                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x8b, 0x72, 0x80                               }, { vpcompressq ZWORD rdx-0x400,zmm30                          }
+testcase	{ 0x62, 0x62, 0xfd, 0x48, 0x8b, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpcompressq ZWORD rdx-0x408,zmm30                          }
+testcase	{ 0x62, 0x02, 0xfd, 0x48, 0x8b, 0xee                                     }, { vpcompressq zmm30,zmm29                                      }
+testcase	{ 0x62, 0x02, 0xfd, 0x4f, 0x8b, 0xee                                     }, { vpcompressq zmm30{k7},zmm29                                  }
+testcase	{ 0x62, 0x02, 0xfd, 0xcf, 0x8b, 0xee                                     }, { vpcompressq zmm30{k7}{z},zmm29                               }
+testcase	{ 0xc5, 0xcc, 0x41, 0xef                                                 }, { kandw  k5,k6,k7                                              }
+testcase	{ 0xc5, 0xcc, 0x42, 0xef                                                 }, { kandnw k5,k6,k7                                              }
+testcase	{ 0xc5, 0xcc, 0x45, 0xef                                                 }, { korw   k5,k6,k7                                              }
+testcase	{ 0xc5, 0xcc, 0x46, 0xef                                                 }, { kxnorw k5,k6,k7                                              }
+testcase	{ 0xc5, 0xcc, 0x47, 0xef                                                 }, { kxorw  k5,k6,k7                                              }
+testcase	{ 0xc5, 0xf8, 0x44, 0xee                                                 }, { knotw  k5,k6                                                 }
+testcase	{ 0xc5, 0xf8, 0x98, 0xee                                                 }, { kortestw k5,k6                                               }
+testcase	{ 0xc4, 0xe3, 0xf9, 0x30, 0xee, 0xab                                     }, { kshiftrw k5,k6,0xab                                          }
+testcase	{ 0xc4, 0xe3, 0xf9, 0x30, 0xee, 0x7b                                     }, { kshiftrw k5,k6,0x7b                                          }
+testcase	{ 0xc4, 0xe3, 0xf9, 0x32, 0xee, 0xab                                     }, { kshiftlw k5,k6,0xab                                          }
+testcase	{ 0xc4, 0xe3, 0xf9, 0x32, 0xee, 0x7b                                     }, { kshiftlw k5,k6,0x7b                                          }
+testcase	{ 0xc5, 0xf8, 0x90, 0xee                                                 }, { kmovw  k5,k6                                                 }
+testcase	{ 0xc5, 0xf8, 0x90, 0x29                                                 }, { kmovw  k5,WORD rcx                                         }
+testcase	{ 0xc4, 0xa1, 0x78, 0x90, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00             }, { kmovw  k5,WORD rax+r14*8+0x123                             }
+testcase	{ 0xc5, 0xf8, 0x91, 0x29                                                 }, { kmovw  WORD rcx,k5                                         }
+testcase	{ 0xc4, 0xa1, 0x78, 0x91, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00             }, { kmovw  WORD rax+r14*8+0x123,k5                             }
+testcase	{ 0xc5, 0xf8, 0x92, 0xe8                                                 }, { kmovw  k5,eax                                                }
+testcase	{ 0xc5, 0xf8, 0x92, 0xed                                                 }, { kmovw  k5,ebp                                                }
+testcase	{ 0xc4, 0xc1, 0x78, 0x92, 0xed                                           }, { kmovw  k5,r13d                                               }
+testcase	{ 0xc5, 0xf8, 0x93, 0xc5                                                 }, { kmovw  eax,k5                                                }
+testcase	{ 0xc5, 0xf8, 0x93, 0xed                                                 }, { kmovw  ebp,k5                                                }
+testcase	{ 0xc5, 0x78, 0x93, 0xed                                                 }, { kmovw  r13d,k5                                               }
+testcase	{ 0xc5, 0xcd, 0x4b, 0xef                                                 }, { kunpckbw k5,k6,k7                                            }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x1d, 0x31, 0xab                               }, { vcvtps2ph YWORD rcx,zmm30,0xab                             }
+testcase	{ 0x62, 0x63, 0x7d, 0x4f, 0x1d, 0x31, 0xab                               }, { vcvtps2ph YWORD rcx{k7},zmm30,0xab                         }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x1d, 0x31, 0x7b                               }, { vcvtps2ph YWORD rcx,zmm30,0x7b                             }
+testcase	{ 0x62, 0x23, 0x7d, 0x48, 0x1d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vcvtps2ph YWORD rax+r14*8+0x123,zmm30,0x7b                 }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x1d, 0x72, 0x7f, 0x7b                         }, { vcvtps2ph YWORD rdx+0xfe0,zmm30,0x7b                       }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x1d, 0xb2, 0x00, 0x10, 0x00, 0x00, 0x7b       }, { vcvtps2ph YWORD rdx+0x1000,zmm30,0x7b                      }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x1d, 0x72, 0x80, 0x7b                         }, { vcvtps2ph YWORD rdx-0x1000,zmm30,0x7b                      }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x1d, 0xb2, 0xe0, 0xef, 0xff, 0xff, 0x7b       }, { vcvtps2ph YWORD rdx-0x1020,zmm30,0x7b                      }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x19, 0x31, 0xab                               }, { vextractf32x4 OWORD rcx,zmm30,0xab                         }
+testcase	{ 0x62, 0x63, 0x7d, 0x4f, 0x19, 0x31, 0xab                               }, { vextractf32x4 OWORD rcx{k7},zmm30,0xab                     }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x19, 0x31, 0x7b                               }, { vextractf32x4 OWORD rcx,zmm30,0x7b                         }
+testcase	{ 0x62, 0x23, 0x7d, 0x48, 0x19, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vextractf32x4 OWORD rax+r14*8+0x123,zmm30,0x7b             }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x19, 0x72, 0x7f, 0x7b                         }, { vextractf32x4 OWORD rdx+0x7f0,zmm30,0x7b                   }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x19, 0xb2, 0x00, 0x08, 0x00, 0x00, 0x7b       }, { vextractf32x4 OWORD rdx+0x800,zmm30,0x7b                   }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x19, 0x72, 0x80, 0x7b                         }, { vextractf32x4 OWORD rdx-0x800,zmm30,0x7b                   }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x19, 0xb2, 0xf0, 0xf7, 0xff, 0xff, 0x7b       }, { vextractf32x4 OWORD rdx-0x810,zmm30,0x7b                   }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x1b, 0x31, 0xab                               }, { vextractf64x4 YWORD rcx,zmm30,0xab                         }
+testcase	{ 0x62, 0x63, 0xfd, 0x4f, 0x1b, 0x31, 0xab                               }, { vextractf64x4 YWORD rcx{k7},zmm30,0xab                     }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x1b, 0x31, 0x7b                               }, { vextractf64x4 YWORD rcx,zmm30,0x7b                         }
+testcase	{ 0x62, 0x23, 0xfd, 0x48, 0x1b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vextractf64x4 YWORD rax+r14*8+0x123,zmm30,0x7b             }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x1b, 0x72, 0x7f, 0x7b                         }, { vextractf64x4 YWORD rdx+0xfe0,zmm30,0x7b                   }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x1b, 0xb2, 0x00, 0x10, 0x00, 0x00, 0x7b       }, { vextractf64x4 YWORD rdx+0x1000,zmm30,0x7b                  }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x1b, 0x72, 0x80, 0x7b                         }, { vextractf64x4 YWORD rdx-0x1000,zmm30,0x7b                  }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x1b, 0xb2, 0xe0, 0xef, 0xff, 0xff, 0x7b       }, { vextractf64x4 YWORD rdx-0x1020,zmm30,0x7b                  }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x39, 0x31, 0xab                               }, { vextracti32x4 OWORD rcx,zmm30,0xab                         }
+testcase	{ 0x62, 0x63, 0x7d, 0x4f, 0x39, 0x31, 0xab                               }, { vextracti32x4 OWORD rcx{k7},zmm30,0xab                     }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x39, 0x31, 0x7b                               }, { vextracti32x4 OWORD rcx,zmm30,0x7b                         }
+testcase	{ 0x62, 0x23, 0x7d, 0x48, 0x39, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vextracti32x4 OWORD rax+r14*8+0x123,zmm30,0x7b             }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x39, 0x72, 0x7f, 0x7b                         }, { vextracti32x4 OWORD rdx+0x7f0,zmm30,0x7b                   }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x39, 0xb2, 0x00, 0x08, 0x00, 0x00, 0x7b       }, { vextracti32x4 OWORD rdx+0x800,zmm30,0x7b                   }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x39, 0x72, 0x80, 0x7b                         }, { vextracti32x4 OWORD rdx-0x800,zmm30,0x7b                   }
+testcase	{ 0x62, 0x63, 0x7d, 0x48, 0x39, 0xb2, 0xf0, 0xf7, 0xff, 0xff, 0x7b       }, { vextracti32x4 OWORD rdx-0x810,zmm30,0x7b                   }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x3b, 0x31, 0xab                               }, { vextracti64x4 YWORD rcx,zmm30,0xab                         }
+testcase	{ 0x62, 0x63, 0xfd, 0x4f, 0x3b, 0x31, 0xab                               }, { vextracti64x4 YWORD rcx{k7},zmm30,0xab                     }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x3b, 0x31, 0x7b                               }, { vextracti64x4 YWORD rcx,zmm30,0x7b                         }
+testcase	{ 0x62, 0x23, 0xfd, 0x48, 0x3b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vextracti64x4 YWORD rax+r14*8+0x123,zmm30,0x7b             }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x3b, 0x72, 0x7f, 0x7b                         }, { vextracti64x4 YWORD rdx+0xfe0,zmm30,0x7b                   }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x3b, 0xb2, 0x00, 0x10, 0x00, 0x00, 0x7b       }, { vextracti64x4 YWORD rdx+0x1000,zmm30,0x7b                  }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x3b, 0x72, 0x80, 0x7b                         }, { vextracti64x4 YWORD rdx-0x1000,zmm30,0x7b                  }
+testcase	{ 0x62, 0x63, 0xfd, 0x48, 0x3b, 0xb2, 0xe0, 0xef, 0xff, 0xff, 0x7b       }, { vextracti64x4 YWORD rdx-0x1020,zmm30,0x7b                  }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x29, 0x31                                     }, { vmovapd ZWORD rcx,zmm30                                    }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0x29, 0x31                                     }, { vmovapd ZWORD rcx{k7},zmm30                                }
+testcase	{ 0x62, 0x21, 0xfd, 0x48, 0x29, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovapd ZWORD rax+r14*8+0x123,zmm30                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x29, 0x72, 0x7f                               }, { vmovapd ZWORD rdx+0x1fc0,zmm30                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x29, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovapd ZWORD rdx+0x2000,zmm30                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x29, 0x72, 0x80                               }, { vmovapd ZWORD rdx-0x2000,zmm30                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x29, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovapd ZWORD rdx-0x2040,zmm30                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x29, 0x31                                     }, { vmovaps ZWORD rcx,zmm30                                    }
+testcase	{ 0x62, 0x61, 0x7c, 0x4f, 0x29, 0x31                                     }, { vmovaps ZWORD rcx{k7},zmm30                                }
+testcase	{ 0x62, 0x21, 0x7c, 0x48, 0x29, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovaps ZWORD rax+r14*8+0x123,zmm30                        }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x29, 0x72, 0x7f                               }, { vmovaps ZWORD rdx+0x1fc0,zmm30                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x29, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovaps ZWORD rdx+0x2000,zmm30                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x29, 0x72, 0x80                               }, { vmovaps ZWORD rdx-0x2000,zmm30                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x29, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovaps ZWORD rdx-0x2040,zmm30                             }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x7f, 0x31                                     }, { vmovdqa32 ZWORD rcx,zmm30                                  }
+testcase	{ 0x62, 0x61, 0x7d, 0x4f, 0x7f, 0x31                                     }, { vmovdqa32 ZWORD rcx{k7},zmm30                              }
+testcase	{ 0x62, 0x21, 0x7d, 0x48, 0x7f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovdqa32 ZWORD rax+r14*8+0x123,zmm30                      }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x7f, 0x72, 0x7f                               }, { vmovdqa32 ZWORD rdx+0x1fc0,zmm30                           }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x7f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovdqa32 ZWORD rdx+0x2000,zmm30                           }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x7f, 0x72, 0x80                               }, { vmovdqa32 ZWORD rdx-0x2000,zmm30                           }
+testcase	{ 0x62, 0x61, 0x7d, 0x48, 0x7f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovdqa32 ZWORD rdx-0x2040,zmm30                           }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x7f, 0x31                                     }, { vmovdqa64 ZWORD rcx,zmm30                                  }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0x7f, 0x31                                     }, { vmovdqa64 ZWORD rcx{k7},zmm30                              }
+testcase	{ 0x62, 0x21, 0xfd, 0x48, 0x7f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovdqa64 ZWORD rax+r14*8+0x123,zmm30                      }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x7f, 0x72, 0x7f                               }, { vmovdqa64 ZWORD rdx+0x1fc0,zmm30                           }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x7f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovdqa64 ZWORD rdx+0x2000,zmm30                           }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x7f, 0x72, 0x80                               }, { vmovdqa64 ZWORD rdx-0x2000,zmm30                           }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x7f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovdqa64 ZWORD rdx-0x2040,zmm30                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x7f, 0x31                                     }, { vmovdqu32 ZWORD rcx,zmm30                                  }
+testcase	{ 0x62, 0x61, 0x7e, 0x4f, 0x7f, 0x31                                     }, { vmovdqu32 ZWORD rcx{k7},zmm30                              }
+testcase	{ 0x62, 0x21, 0x7e, 0x48, 0x7f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovdqu32 ZWORD rax+r14*8+0x123,zmm30                      }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x7f, 0x72, 0x7f                               }, { vmovdqu32 ZWORD rdx+0x1fc0,zmm30                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x7f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovdqu32 ZWORD rdx+0x2000,zmm30                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x7f, 0x72, 0x80                               }, { vmovdqu32 ZWORD rdx-0x2000,zmm30                           }
+testcase	{ 0x62, 0x61, 0x7e, 0x48, 0x7f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovdqu32 ZWORD rdx-0x2040,zmm30                           }
+testcase	{ 0x62, 0x61, 0xfe, 0x48, 0x7f, 0x31                                     }, { vmovdqu64 ZWORD rcx,zmm30                                  }
+testcase	{ 0x62, 0x61, 0xfe, 0x4f, 0x7f, 0x31                                     }, { vmovdqu64 ZWORD rcx{k7},zmm30                              }
+testcase	{ 0x62, 0x21, 0xfe, 0x48, 0x7f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovdqu64 ZWORD rax+r14*8+0x123,zmm30                      }
+testcase	{ 0x62, 0x61, 0xfe, 0x48, 0x7f, 0x72, 0x7f                               }, { vmovdqu64 ZWORD rdx+0x1fc0,zmm30                           }
+testcase	{ 0x62, 0x61, 0xfe, 0x48, 0x7f, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovdqu64 ZWORD rdx+0x2000,zmm30                           }
+testcase	{ 0x62, 0x61, 0xfe, 0x48, 0x7f, 0x72, 0x80                               }, { vmovdqu64 ZWORD rdx-0x2000,zmm30                           }
+testcase	{ 0x62, 0x61, 0xfe, 0x48, 0x7f, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovdqu64 ZWORD rdx-0x2040,zmm30                           }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x11, 0x31                                     }, { vmovupd ZWORD rcx,zmm30                                    }
+testcase	{ 0x62, 0x61, 0xfd, 0x4f, 0x11, 0x31                                     }, { vmovupd ZWORD rcx{k7},zmm30                                }
+testcase	{ 0x62, 0x21, 0xfd, 0x48, 0x11, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovupd ZWORD rax+r14*8+0x123,zmm30                        }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x11, 0x72, 0x7f                               }, { vmovupd ZWORD rdx+0x1fc0,zmm30                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x11, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovupd ZWORD rdx+0x2000,zmm30                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x11, 0x72, 0x80                               }, { vmovupd ZWORD rdx-0x2000,zmm30                             }
+testcase	{ 0x62, 0x61, 0xfd, 0x48, 0x11, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovupd ZWORD rdx-0x2040,zmm30                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x11, 0x31                                     }, { vmovups ZWORD rcx,zmm30                                    }
+testcase	{ 0x62, 0x61, 0x7c, 0x4f, 0x11, 0x31                                     }, { vmovups ZWORD rcx{k7},zmm30                                }
+testcase	{ 0x62, 0x21, 0x7c, 0x48, 0x11, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vmovups ZWORD rax+r14*8+0x123,zmm30                        }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x11, 0x72, 0x7f                               }, { vmovups ZWORD rdx+0x1fc0,zmm30                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x11, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vmovups ZWORD rdx+0x2000,zmm30                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x11, 0x72, 0x80                               }, { vmovups ZWORD rdx-0x2000,zmm30                             }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x11, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vmovups ZWORD rdx-0x2040,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x32, 0x31                                     }, { vpmovqb QWORD rcx,zmm30                                    }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x32, 0x31                                     }, { vpmovqb QWORD rcx{k7},zmm30                                }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x32, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovqb QWORD rax+r14*8+0x123,zmm30                        }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x32, 0x72, 0x7f                               }, { vpmovqb QWORD rdx+0x3f8,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x32, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpmovqb QWORD rdx+0x400,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x32, 0x72, 0x80                               }, { vpmovqb QWORD rdx-0x400,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x32, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpmovqb QWORD rdx-0x408,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x22, 0x31                                     }, { vpmovsqb QWORD rcx,zmm30                                   }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x22, 0x31                                     }, { vpmovsqb QWORD rcx{k7},zmm30                               }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x22, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovsqb QWORD rax+r14*8+0x123,zmm30                       }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x22, 0x72, 0x7f                               }, { vpmovsqb QWORD rdx+0x3f8,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x22, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpmovsqb QWORD rdx+0x400,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x22, 0x72, 0x80                               }, { vpmovsqb QWORD rdx-0x400,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x22, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpmovsqb QWORD rdx-0x408,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x12, 0x31                                     }, { vpmovusqb QWORD rcx,zmm30                                  }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x12, 0x31                                     }, { vpmovusqb QWORD rcx{k7},zmm30                              }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x12, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovusqb QWORD rax+r14*8+0x123,zmm30                      }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x12, 0x72, 0x7f                               }, { vpmovusqb QWORD rdx+0x3f8,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x12, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpmovusqb QWORD rdx+0x400,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x12, 0x72, 0x80                               }, { vpmovusqb QWORD rdx-0x400,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x12, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpmovusqb QWORD rdx-0x408,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x34, 0x31                                     }, { vpmovqw OWORD rcx,zmm30                                    }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x34, 0x31                                     }, { vpmovqw OWORD rcx{k7},zmm30                                }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x34, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovqw OWORD rax+r14*8+0x123,zmm30                        }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x34, 0x72, 0x7f                               }, { vpmovqw OWORD rdx+0x7f0,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x34, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpmovqw OWORD rdx+0x800,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x34, 0x72, 0x80                               }, { vpmovqw OWORD rdx-0x800,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x34, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpmovqw OWORD rdx-0x810,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x24, 0x31                                     }, { vpmovsqw OWORD rcx,zmm30                                   }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x24, 0x31                                     }, { vpmovsqw OWORD rcx{k7},zmm30                               }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x24, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovsqw OWORD rax+r14*8+0x123,zmm30                       }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x24, 0x72, 0x7f                               }, { vpmovsqw OWORD rdx+0x7f0,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x24, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpmovsqw OWORD rdx+0x800,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x24, 0x72, 0x80                               }, { vpmovsqw OWORD rdx-0x800,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x24, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpmovsqw OWORD rdx-0x810,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x14, 0x31                                     }, { vpmovusqw OWORD rcx,zmm30                                  }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x14, 0x31                                     }, { vpmovusqw OWORD rcx{k7},zmm30                              }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x14, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovusqw OWORD rax+r14*8+0x123,zmm30                      }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x14, 0x72, 0x7f                               }, { vpmovusqw OWORD rdx+0x7f0,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x14, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpmovusqw OWORD rdx+0x800,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x14, 0x72, 0x80                               }, { vpmovusqw OWORD rdx-0x800,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x14, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpmovusqw OWORD rdx-0x810,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x35, 0x31                                     }, { vpmovqd YWORD rcx,zmm30                                    }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x35, 0x31                                     }, { vpmovqd YWORD rcx{k7},zmm30                                }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x35, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovqd YWORD rax+r14*8+0x123,zmm30                        }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x35, 0x72, 0x7f                               }, { vpmovqd YWORD rdx+0xfe0,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x35, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vpmovqd YWORD rdx+0x1000,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x35, 0x72, 0x80                               }, { vpmovqd YWORD rdx-0x1000,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x35, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vpmovqd YWORD rdx-0x1020,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x25, 0x31                                     }, { vpmovsqd YWORD rcx,zmm30                                   }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x25, 0x31                                     }, { vpmovsqd YWORD rcx{k7},zmm30                               }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x25, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovsqd YWORD rax+r14*8+0x123,zmm30                       }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x25, 0x72, 0x7f                               }, { vpmovsqd YWORD rdx+0xfe0,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x25, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vpmovsqd YWORD rdx+0x1000,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x25, 0x72, 0x80                               }, { vpmovsqd YWORD rdx-0x1000,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x25, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vpmovsqd YWORD rdx-0x1020,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x15, 0x31                                     }, { vpmovusqd YWORD rcx,zmm30                                  }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x15, 0x31                                     }, { vpmovusqd YWORD rcx{k7},zmm30                              }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x15, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovusqd YWORD rax+r14*8+0x123,zmm30                      }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x15, 0x72, 0x7f                               }, { vpmovusqd YWORD rdx+0xfe0,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x15, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vpmovusqd YWORD rdx+0x1000,zmm30                           }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x15, 0x72, 0x80                               }, { vpmovusqd YWORD rdx-0x1000,zmm30                           }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x15, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vpmovusqd YWORD rdx-0x1020,zmm30                           }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x31, 0x31                                     }, { vpmovdb OWORD rcx,zmm30                                    }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x31, 0x31                                     }, { vpmovdb OWORD rcx{k7},zmm30                                }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x31, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovdb OWORD rax+r14*8+0x123,zmm30                        }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x31, 0x72, 0x7f                               }, { vpmovdb OWORD rdx+0x7f0,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x31, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpmovdb OWORD rdx+0x800,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x31, 0x72, 0x80                               }, { vpmovdb OWORD rdx-0x800,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x31, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpmovdb OWORD rdx-0x810,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x21, 0x31                                     }, { vpmovsdb OWORD rcx,zmm30                                   }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x21, 0x31                                     }, { vpmovsdb OWORD rcx{k7},zmm30                               }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x21, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovsdb OWORD rax+r14*8+0x123,zmm30                       }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x21, 0x72, 0x7f                               }, { vpmovsdb OWORD rdx+0x7f0,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x21, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpmovsdb OWORD rdx+0x800,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x21, 0x72, 0x80                               }, { vpmovsdb OWORD rdx-0x800,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x21, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpmovsdb OWORD rdx-0x810,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x11, 0x31                                     }, { vpmovusdb OWORD rcx,zmm30                                  }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x11, 0x31                                     }, { vpmovusdb OWORD rcx{k7},zmm30                              }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x11, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovusdb OWORD rax+r14*8+0x123,zmm30                      }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x11, 0x72, 0x7f                               }, { vpmovusdb OWORD rdx+0x7f0,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x11, 0xb2, 0x00, 0x08, 0x00, 0x00             }, { vpmovusdb OWORD rdx+0x800,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x11, 0x72, 0x80                               }, { vpmovusdb OWORD rdx-0x800,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x11, 0xb2, 0xf0, 0xf7, 0xff, 0xff             }, { vpmovusdb OWORD rdx-0x810,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x33, 0x31                                     }, { vpmovdw YWORD rcx,zmm30                                    }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x33, 0x31                                     }, { vpmovdw YWORD rcx{k7},zmm30                                }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x33, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovdw YWORD rax+r14*8+0x123,zmm30                        }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x33, 0x72, 0x7f                               }, { vpmovdw YWORD rdx+0xfe0,zmm30                              }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x33, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vpmovdw YWORD rdx+0x1000,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x33, 0x72, 0x80                               }, { vpmovdw YWORD rdx-0x1000,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x33, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vpmovdw YWORD rdx-0x1020,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x23, 0x31                                     }, { vpmovsdw YWORD rcx,zmm30                                   }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x23, 0x31                                     }, { vpmovsdw YWORD rcx{k7},zmm30                               }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x23, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovsdw YWORD rax+r14*8+0x123,zmm30                       }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x23, 0x72, 0x7f                               }, { vpmovsdw YWORD rdx+0xfe0,zmm30                             }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x23, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vpmovsdw YWORD rdx+0x1000,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x23, 0x72, 0x80                               }, { vpmovsdw YWORD rdx-0x1000,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x23, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vpmovsdw YWORD rdx-0x1020,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x13, 0x31                                     }, { vpmovusdw YWORD rcx,zmm30                                  }
+testcase	{ 0x62, 0x62, 0x7e, 0x4f, 0x13, 0x31                                     }, { vpmovusdw YWORD rcx{k7},zmm30                              }
+testcase	{ 0x62, 0x22, 0x7e, 0x48, 0x13, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpmovusdw YWORD rax+r14*8+0x123,zmm30                      }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x13, 0x72, 0x7f                               }, { vpmovusdw YWORD rdx+0xfe0,zmm30                            }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x13, 0xb2, 0x00, 0x10, 0x00, 0x00             }, { vpmovusdw YWORD rdx+0x1000,zmm30                           }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x13, 0x72, 0x80                               }, { vpmovusdw YWORD rdx-0x1000,zmm30                           }
+testcase	{ 0x62, 0x62, 0x7e, 0x48, 0x13, 0xb2, 0xe0, 0xef, 0xff, 0xff             }, { vpmovusdw YWORD rdx-0x1020,zmm30                           }
+testcase	{ 0x62, 0x01, 0xfc, 0x4f, 0x78, 0xf5                                     }, { vcvttpd2udq ymm30{k7},zmm29                                  }
+testcase	{ 0x62, 0x01, 0xfc, 0xcf, 0x78, 0xf5                                     }, { vcvttpd2udq ymm30{k7}{z},zmm29                               }
+testcase	{ 0x62, 0x01, 0xfc, 0x1f, 0x78, 0xf5                                     }, { vcvttpd2udq ymm30{k7},zmm29,{sae}                            }
+testcase	{ 0x62, 0x61, 0xfc, 0x4f, 0x78, 0x31                                     }, { vcvttpd2udq ymm30{k7},ZWORD rcx                            }
+testcase	{ 0x62, 0x21, 0xfc, 0x4f, 0x78, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttpd2udq ymm30{k7},ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x61, 0xfc, 0x5f, 0x78, 0x31                                     }, { vcvttpd2udq ymm30{k7},QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0x61, 0xfc, 0x4f, 0x78, 0x72, 0x7f                               }, { vcvttpd2udq ymm30{k7},ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x61, 0xfc, 0x4f, 0x78, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vcvttpd2udq ymm30{k7},ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x61, 0xfc, 0x4f, 0x78, 0x72, 0x80                               }, { vcvttpd2udq ymm30{k7},ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x61, 0xfc, 0x4f, 0x78, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vcvttpd2udq ymm30{k7},ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x61, 0xfc, 0x5f, 0x78, 0x72, 0x7f                               }, { vcvttpd2udq ymm30{k7},QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0x61, 0xfc, 0x5f, 0x78, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vcvttpd2udq ymm30{k7},QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0x61, 0xfc, 0x5f, 0x78, 0x72, 0x80                               }, { vcvttpd2udq ymm30{k7},QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0x61, 0xfc, 0x5f, 0x78, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vcvttpd2udq ymm30{k7},QWORD rdx-0x408{1to8}                }
+testcase	{ 0x62, 0x01, 0x7c, 0x48, 0x78, 0xf5                                     }, { vcvttps2udq zmm30,zmm29                                      }
+testcase	{ 0x62, 0x01, 0x7c, 0x4f, 0x78, 0xf5                                     }, { vcvttps2udq zmm30{k7},zmm29                                  }
+testcase	{ 0x62, 0x01, 0x7c, 0xcf, 0x78, 0xf5                                     }, { vcvttps2udq zmm30{k7}{z},zmm29                               }
+testcase	{ 0x62, 0x01, 0x7c, 0x18, 0x78, 0xf5                                     }, { vcvttps2udq zmm30,zmm29,{sae}                                }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x78, 0x31                                     }, { vcvttps2udq zmm30,ZWORD rcx                                }
+testcase	{ 0x62, 0x21, 0x7c, 0x48, 0x78, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttps2udq zmm30,ZWORD rax+r14*8+0x123                    }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x78, 0x31                                     }, { vcvttps2udq zmm30,DWORD rcx{1to16}                         }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x78, 0x72, 0x7f                               }, { vcvttps2udq zmm30,ZWORD rdx+0x1fc0                         }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x78, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vcvttps2udq zmm30,ZWORD rdx+0x2000                         }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x78, 0x72, 0x80                               }, { vcvttps2udq zmm30,ZWORD rdx-0x2000                         }
+testcase	{ 0x62, 0x61, 0x7c, 0x48, 0x78, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vcvttps2udq zmm30,ZWORD rdx-0x2040                         }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x78, 0x72, 0x7f                               }, { vcvttps2udq zmm30,DWORD rdx+0x1fc{1to16}                   }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x78, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vcvttps2udq zmm30,DWORD rdx+0x200{1to16}                   }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x78, 0x72, 0x80                               }, { vcvttps2udq zmm30,DWORD rdx-0x200{1to16}                   }
+testcase	{ 0x62, 0x61, 0x7c, 0x58, 0x78, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vcvttps2udq zmm30,DWORD rdx-0x204{1to16}                   }
+testcase	{ 0x62, 0x91, 0x7f, 0x08, 0x78, 0xc6                                     }, { vcvttsd2usi eax,xmm30                                        }
+testcase	{ 0x62, 0x91, 0x7f, 0x18, 0x78, 0xc6                                     }, { vcvttsd2usi eax,xmm30,{sae}                                  }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x78, 0x01                                     }, { vcvttsd2usi eax,QWORD rcx                                  }
+testcase	{ 0x62, 0xb1, 0x7f, 0x08, 0x78, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttsd2usi eax,QWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x78, 0x42, 0x7f                               }, { vcvttsd2usi eax,QWORD rdx+0x3f8                            }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x78, 0x82, 0x00, 0x04, 0x00, 0x00             }, { vcvttsd2usi eax,QWORD rdx+0x400                            }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x78, 0x42, 0x80                               }, { vcvttsd2usi eax,QWORD rdx-0x400                            }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x78, 0x82, 0xf8, 0xfb, 0xff, 0xff             }, { vcvttsd2usi eax,QWORD rdx-0x408                            }
+testcase	{ 0x62, 0x91, 0x7f, 0x08, 0x78, 0xee                                     }, { vcvttsd2usi ebp,xmm30                                        }
+testcase	{ 0x62, 0x91, 0x7f, 0x18, 0x78, 0xee                                     }, { vcvttsd2usi ebp,xmm30,{sae}                                  }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x78, 0x29                                     }, { vcvttsd2usi ebp,QWORD rcx                                  }
+testcase	{ 0x62, 0xb1, 0x7f, 0x08, 0x78, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttsd2usi ebp,QWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x78, 0x6a, 0x7f                               }, { vcvttsd2usi ebp,QWORD rdx+0x3f8                            }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x78, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vcvttsd2usi ebp,QWORD rdx+0x400                            }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x78, 0x6a, 0x80                               }, { vcvttsd2usi ebp,QWORD rdx-0x400                            }
+testcase	{ 0x62, 0xf1, 0x7f, 0x08, 0x78, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vcvttsd2usi ebp,QWORD rdx-0x408                            }
+testcase	{ 0x62, 0x11, 0x7f, 0x08, 0x78, 0xee                                     }, { vcvttsd2usi r13d,xmm30                                       }
+testcase	{ 0x62, 0x11, 0x7f, 0x18, 0x78, 0xee                                     }, { vcvttsd2usi r13d,xmm30,{sae}                                 }
+testcase	{ 0x62, 0x71, 0x7f, 0x08, 0x78, 0x29                                     }, { vcvttsd2usi r13d,QWORD rcx                                 }
+testcase	{ 0x62, 0x31, 0x7f, 0x08, 0x78, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttsd2usi r13d,QWORD rax+r14*8+0x123                     }
+testcase	{ 0x62, 0x71, 0x7f, 0x08, 0x78, 0x6a, 0x7f                               }, { vcvttsd2usi r13d,QWORD rdx+0x3f8                           }
+testcase	{ 0x62, 0x71, 0x7f, 0x08, 0x78, 0xaa, 0x00, 0x04, 0x00, 0x00             }, { vcvttsd2usi r13d,QWORD rdx+0x400                           }
+testcase	{ 0x62, 0x71, 0x7f, 0x08, 0x78, 0x6a, 0x80                               }, { vcvttsd2usi r13d,QWORD rdx-0x400                           }
+testcase	{ 0x62, 0x71, 0x7f, 0x08, 0x78, 0xaa, 0xf8, 0xfb, 0xff, 0xff             }, { vcvttsd2usi r13d,QWORD rdx-0x408                           }
+testcase	{ 0x62, 0x91, 0xff, 0x08, 0x78, 0xc6                                     }, { vcvttsd2usi rax,xmm30                                        }
+testcase	{ 0x62, 0x91, 0xff, 0x18, 0x78, 0xc6                                     }, { vcvttsd2usi rax,xmm30,{sae}                                  }
+testcase	{ 0x62, 0xf1, 0xff, 0x08, 0x78, 0x01                                     }, { vcvttsd2usi rax,QWORD rcx                                  }
+testcase	{ 0x62, 0xb1, 0xff, 0x08, 0x78, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttsd2usi rax,QWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0xf1, 0xff, 0x08, 0x78, 0x42, 0x7f                               }, { vcvttsd2usi rax,QWORD rdx+0x3f8                            }
+testcase	{ 0x62, 0xf1, 0xff, 0x08, 0x78, 0x82, 0x00, 0x04, 0x00, 0x00             }, { vcvttsd2usi rax,QWORD rdx+0x400                            }
+testcase	{ 0x62, 0xf1, 0xff, 0x08, 0x78, 0x42, 0x80                               }, { vcvttsd2usi rax,QWORD rdx-0x400                            }
+testcase	{ 0x62, 0xf1, 0xff, 0x08, 0x78, 0x82, 0xf8, 0xfb, 0xff, 0xff             }, { vcvttsd2usi rax,QWORD rdx-0x408                            }
+testcase	{ 0x62, 0x11, 0xff, 0x08, 0x78, 0xc6                                     }, { vcvttsd2usi r8,xmm30                                         }
+testcase	{ 0x62, 0x11, 0xff, 0x18, 0x78, 0xc6                                     }, { vcvttsd2usi r8,xmm30,{sae}                                   }
+testcase	{ 0x62, 0x71, 0xff, 0x08, 0x78, 0x01                                     }, { vcvttsd2usi r8,QWORD rcx                                   }
+testcase	{ 0x62, 0x31, 0xff, 0x08, 0x78, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttsd2usi r8,QWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0x71, 0xff, 0x08, 0x78, 0x42, 0x7f                               }, { vcvttsd2usi r8,QWORD rdx+0x3f8                             }
+testcase	{ 0x62, 0x71, 0xff, 0x08, 0x78, 0x82, 0x00, 0x04, 0x00, 0x00             }, { vcvttsd2usi r8,QWORD rdx+0x400                             }
+testcase	{ 0x62, 0x71, 0xff, 0x08, 0x78, 0x42, 0x80                               }, { vcvttsd2usi r8,QWORD rdx-0x400                             }
+testcase	{ 0x62, 0x71, 0xff, 0x08, 0x78, 0x82, 0xf8, 0xfb, 0xff, 0xff             }, { vcvttsd2usi r8,QWORD rdx-0x408                             }
+testcase	{ 0x62, 0x91, 0x7e, 0x08, 0x78, 0xc6                                     }, { vcvttss2usi eax,xmm30                                        }
+testcase	{ 0x62, 0x91, 0x7e, 0x18, 0x78, 0xc6                                     }, { vcvttss2usi eax,xmm30,{sae}                                  }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x78, 0x01                                     }, { vcvttss2usi eax,DWORD rcx                                  }
+testcase	{ 0x62, 0xb1, 0x7e, 0x08, 0x78, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttss2usi eax,DWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x78, 0x42, 0x7f                               }, { vcvttss2usi eax,DWORD rdx+0x1fc                            }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x78, 0x82, 0x00, 0x02, 0x00, 0x00             }, { vcvttss2usi eax,DWORD rdx+0x200                            }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x78, 0x42, 0x80                               }, { vcvttss2usi eax,DWORD rdx-0x200                            }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x78, 0x82, 0xfc, 0xfd, 0xff, 0xff             }, { vcvttss2usi eax,DWORD rdx-0x204                            }
+testcase	{ 0x62, 0x91, 0x7e, 0x08, 0x78, 0xee                                     }, { vcvttss2usi ebp,xmm30                                        }
+testcase	{ 0x62, 0x91, 0x7e, 0x18, 0x78, 0xee                                     }, { vcvttss2usi ebp,xmm30,{sae}                                  }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x78, 0x29                                     }, { vcvttss2usi ebp,DWORD rcx                                  }
+testcase	{ 0x62, 0xb1, 0x7e, 0x08, 0x78, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttss2usi ebp,DWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x78, 0x6a, 0x7f                               }, { vcvttss2usi ebp,DWORD rdx+0x1fc                            }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x78, 0xaa, 0x00, 0x02, 0x00, 0x00             }, { vcvttss2usi ebp,DWORD rdx+0x200                            }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x78, 0x6a, 0x80                               }, { vcvttss2usi ebp,DWORD rdx-0x200                            }
+testcase	{ 0x62, 0xf1, 0x7e, 0x08, 0x78, 0xaa, 0xfc, 0xfd, 0xff, 0xff             }, { vcvttss2usi ebp,DWORD rdx-0x204                            }
+testcase	{ 0x62, 0x11, 0x7e, 0x08, 0x78, 0xee                                     }, { vcvttss2usi r13d,xmm30                                       }
+testcase	{ 0x62, 0x11, 0x7e, 0x18, 0x78, 0xee                                     }, { vcvttss2usi r13d,xmm30,{sae}                                 }
+testcase	{ 0x62, 0x71, 0x7e, 0x08, 0x78, 0x29                                     }, { vcvttss2usi r13d,DWORD rcx                                 }
+testcase	{ 0x62, 0x31, 0x7e, 0x08, 0x78, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttss2usi r13d,DWORD rax+r14*8+0x123                     }
+testcase	{ 0x62, 0x71, 0x7e, 0x08, 0x78, 0x6a, 0x7f                               }, { vcvttss2usi r13d,DWORD rdx+0x1fc                           }
+testcase	{ 0x62, 0x71, 0x7e, 0x08, 0x78, 0xaa, 0x00, 0x02, 0x00, 0x00             }, { vcvttss2usi r13d,DWORD rdx+0x200                           }
+testcase	{ 0x62, 0x71, 0x7e, 0x08, 0x78, 0x6a, 0x80                               }, { vcvttss2usi r13d,DWORD rdx-0x200                           }
+testcase	{ 0x62, 0x71, 0x7e, 0x08, 0x78, 0xaa, 0xfc, 0xfd, 0xff, 0xff             }, { vcvttss2usi r13d,DWORD rdx-0x204                           }
+testcase	{ 0x62, 0x91, 0xfe, 0x08, 0x78, 0xc6                                     }, { vcvttss2usi rax,xmm30                                        }
+testcase	{ 0x62, 0x91, 0xfe, 0x18, 0x78, 0xc6                                     }, { vcvttss2usi rax,xmm30,{sae}                                  }
+testcase	{ 0x62, 0xf1, 0xfe, 0x08, 0x78, 0x01                                     }, { vcvttss2usi rax,DWORD rcx                                  }
+testcase	{ 0x62, 0xb1, 0xfe, 0x08, 0x78, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttss2usi rax,DWORD rax+r14*8+0x123                      }
+testcase	{ 0x62, 0xf1, 0xfe, 0x08, 0x78, 0x42, 0x7f                               }, { vcvttss2usi rax,DWORD rdx+0x1fc                            }
+testcase	{ 0x62, 0xf1, 0xfe, 0x08, 0x78, 0x82, 0x00, 0x02, 0x00, 0x00             }, { vcvttss2usi rax,DWORD rdx+0x200                            }
+testcase	{ 0x62, 0xf1, 0xfe, 0x08, 0x78, 0x42, 0x80                               }, { vcvttss2usi rax,DWORD rdx-0x200                            }
+testcase	{ 0x62, 0xf1, 0xfe, 0x08, 0x78, 0x82, 0xfc, 0xfd, 0xff, 0xff             }, { vcvttss2usi rax,DWORD rdx-0x204                            }
+testcase	{ 0x62, 0x11, 0xfe, 0x08, 0x78, 0xc6                                     }, { vcvttss2usi r8,xmm30                                         }
+testcase	{ 0x62, 0x11, 0xfe, 0x18, 0x78, 0xc6                                     }, { vcvttss2usi r8,xmm30,{sae}                                   }
+testcase	{ 0x62, 0x71, 0xfe, 0x08, 0x78, 0x01                                     }, { vcvttss2usi r8,DWORD rcx                                   }
+testcase	{ 0x62, 0x31, 0xfe, 0x08, 0x78, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vcvttss2usi r8,DWORD rax+r14*8+0x123                       }
+testcase	{ 0x62, 0x71, 0xfe, 0x08, 0x78, 0x42, 0x7f                               }, { vcvttss2usi r8,DWORD rdx+0x1fc                             }
+testcase	{ 0x62, 0x71, 0xfe, 0x08, 0x78, 0x82, 0x00, 0x02, 0x00, 0x00             }, { vcvttss2usi r8,DWORD rdx+0x200                             }
+testcase	{ 0x62, 0x71, 0xfe, 0x08, 0x78, 0x42, 0x80                               }, { vcvttss2usi r8,DWORD rdx-0x200                             }
+testcase	{ 0x62, 0x71, 0xfe, 0x08, 0x78, 0x82, 0xfc, 0xfd, 0xff, 0xff             }, { vcvttss2usi r8,DWORD rdx-0x204                             }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x76, 0xf4                                     }, { vpermi2d zmm30,zmm29,zmm28                                   }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x76, 0xf4                                     }, { vpermi2d zmm30{k7},zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x76, 0xf4                                     }, { vpermi2d zmm30{k7}{z},zmm29,zmm28                            }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x76, 0x31                                     }, { vpermi2d zmm30,zmm29,ZWORD rcx                             }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x76, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermi2d zmm30,zmm29,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x76, 0x31                                     }, { vpermi2d zmm30,zmm29,DWORD rcx{1to16}                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x76, 0x72, 0x7f                               }, { vpermi2d zmm30,zmm29,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x76, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermi2d zmm30,zmm29,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x76, 0x72, 0x80                               }, { vpermi2d zmm30,zmm29,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x76, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermi2d zmm30,zmm29,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x76, 0x72, 0x7f                               }, { vpermi2d zmm30,zmm29,DWORD rdx+0x1fc{1to16}                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x76, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpermi2d zmm30,zmm29,DWORD rdx+0x200{1to16}                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x76, 0x72, 0x80                               }, { vpermi2d zmm30,zmm29,DWORD rdx-0x200{1to16}                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x76, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpermi2d zmm30,zmm29,DWORD rdx-0x204{1to16}                }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x76, 0xf4                                     }, { vpermi2q zmm30,zmm29,zmm28                                   }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x76, 0xf4                                     }, { vpermi2q zmm30{k7},zmm29,zmm28                               }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x76, 0xf4                                     }, { vpermi2q zmm30{k7}{z},zmm29,zmm28                            }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x76, 0x31                                     }, { vpermi2q zmm30,zmm29,ZWORD rcx                             }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x76, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermi2q zmm30,zmm29,ZWORD rax+r14*8+0x123                 }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x76, 0x31                                     }, { vpermi2q zmm30,zmm29,QWORD rcx{1to8}                       }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x76, 0x72, 0x7f                               }, { vpermi2q zmm30,zmm29,ZWORD rdx+0x1fc0                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x76, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermi2q zmm30,zmm29,ZWORD rdx+0x2000                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x76, 0x72, 0x80                               }, { vpermi2q zmm30,zmm29,ZWORD rdx-0x2000                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x76, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermi2q zmm30,zmm29,ZWORD rdx-0x2040                      }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x76, 0x72, 0x7f                               }, { vpermi2q zmm30,zmm29,QWORD rdx+0x3f8{1to8}                 }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x76, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpermi2q zmm30,zmm29,QWORD rdx+0x400{1to8}                 }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x76, 0x72, 0x80                               }, { vpermi2q zmm30,zmm29,QWORD rdx-0x400{1to8}                 }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x76, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpermi2q zmm30,zmm29,QWORD rdx-0x408{1to8}                 }
+testcase	{ 0x62, 0x02, 0x15, 0x40, 0x77, 0xf4                                     }, { vpermi2ps zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x02, 0x15, 0x47, 0x77, 0xf4                                     }, { vpermi2ps zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x02, 0x15, 0xc7, 0x77, 0xf4                                     }, { vpermi2ps zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x77, 0x31                                     }, { vpermi2ps zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x22, 0x15, 0x40, 0x77, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermi2ps zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x77, 0x31                                     }, { vpermi2ps zmm30,zmm29,DWORD rcx{1to16}                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x77, 0x72, 0x7f                               }, { vpermi2ps zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x77, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermi2ps zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x77, 0x72, 0x80                               }, { vpermi2ps zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x62, 0x15, 0x40, 0x77, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermi2ps zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x77, 0x72, 0x7f                               }, { vpermi2ps zmm30,zmm29,DWORD rdx+0x1fc{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x77, 0xb2, 0x00, 0x02, 0x00, 0x00             }, { vpermi2ps zmm30,zmm29,DWORD rdx+0x200{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x77, 0x72, 0x80                               }, { vpermi2ps zmm30,zmm29,DWORD rdx-0x200{1to16}               }
+testcase	{ 0x62, 0x62, 0x15, 0x50, 0x77, 0xb2, 0xfc, 0xfd, 0xff, 0xff             }, { vpermi2ps zmm30,zmm29,DWORD rdx-0x204{1to16}               }
+testcase	{ 0x62, 0x02, 0x95, 0x40, 0x77, 0xf4                                     }, { vpermi2pd zmm30,zmm29,zmm28                                  }
+testcase	{ 0x62, 0x02, 0x95, 0x47, 0x77, 0xf4                                     }, { vpermi2pd zmm30{k7},zmm29,zmm28                              }
+testcase	{ 0x62, 0x02, 0x95, 0xc7, 0x77, 0xf4                                     }, { vpermi2pd zmm30{k7}{z},zmm29,zmm28                           }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x77, 0x31                                     }, { vpermi2pd zmm30,zmm29,ZWORD rcx                            }
+testcase	{ 0x62, 0x22, 0x95, 0x40, 0x77, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00       }, { vpermi2pd zmm30,zmm29,ZWORD rax+r14*8+0x123                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x77, 0x31                                     }, { vpermi2pd zmm30,zmm29,QWORD rcx{1to8}                      }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x77, 0x72, 0x7f                               }, { vpermi2pd zmm30,zmm29,ZWORD rdx+0x1fc0                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x77, 0xb2, 0x00, 0x20, 0x00, 0x00             }, { vpermi2pd zmm30,zmm29,ZWORD rdx+0x2000                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x77, 0x72, 0x80                               }, { vpermi2pd zmm30,zmm29,ZWORD rdx-0x2000                     }
+testcase	{ 0x62, 0x62, 0x95, 0x40, 0x77, 0xb2, 0xc0, 0xdf, 0xff, 0xff             }, { vpermi2pd zmm30,zmm29,ZWORD rdx-0x2040                     }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x77, 0x72, 0x7f                               }, { vpermi2pd zmm30,zmm29,QWORD rdx+0x3f8{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x77, 0xb2, 0x00, 0x04, 0x00, 0x00             }, { vpermi2pd zmm30,zmm29,QWORD rdx+0x400{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x77, 0x72, 0x80                               }, { vpermi2pd zmm30,zmm29,QWORD rdx-0x400{1to8}                }
+testcase	{ 0x62, 0x62, 0x95, 0x50, 0x77, 0xb2, 0xf8, 0xfb, 0xff, 0xff             }, { vpermi2pd zmm30,zmm29,QWORD rdx-0x408{1to8}                }

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/avx512f.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/avx512f.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/avx512pf.asm Added

@@ -0,0 +1,87 @@
+; AVX-512PF testcases from gas
+;------------------------
+;
+; This file is taken from there
+;     https://gnu.googlesource.com/binutils/+/master/gas/testsuite/gas/i386/x86-64-avx512pf-intel.d
+; So the original author is "H.J. Lu" <hongjiu dot lu at intel dot com>
+;
+; Jin Kyu Song converted it for the nasm testing suite using gas2nasm.py
+
+%macro testcase 2
+ %ifdef BIN
+  db %1
+ %endif
+ %ifdef SRC
+  %2
+ %endif
+%endmacro
+
+
+bits 64
+
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc6, 0x8c, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf0dpd  r14+ymm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc6, 0x8c, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf0dpd  r14+ymm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc6, 0x4c, 0x39, 0x20                         }, { vgatherpf0dpd  r9+ymm31*1+0x100{k1}                        }
+testcase	{ 0x62, 0xb2, 0xfd, 0x41, 0xc6, 0x8c, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vgatherpf0dpd  rcx+ymm31*4+0x400{k1}                       }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc6, 0x8c, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf0dps  r14+zmm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc6, 0x8c, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf0dps  r14+zmm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc6, 0x4c, 0x39, 0x40                         }, { vgatherpf0dps  r9+zmm31*1+0x100{k1}                        }
+testcase	{ 0x62, 0xb2, 0x7d, 0x41, 0xc6, 0x8c, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vgatherpf0dps  rcx+zmm31*4+0x400{k1}                       }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc7, 0x8c, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf0qpd  r14+zmm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc7, 0x8c, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf0qpd  r14+zmm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc7, 0x4c, 0x39, 0x20                         }, { vgatherpf0qpd  r9+zmm31*1+0x100{k1}                        }
+testcase	{ 0x62, 0xb2, 0xfd, 0x41, 0xc7, 0x8c, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vgatherpf0qpd  rcx+zmm31*4+0x400{k1}                       }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc7, 0x8c, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf0qps  r14+zmm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc7, 0x8c, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf0qps  r14+zmm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc7, 0x4c, 0x39, 0x40                         }, { vgatherpf0qps  r9+zmm31*1+0x100{k1}                        }
+testcase	{ 0x62, 0xb2, 0x7d, 0x41, 0xc7, 0x8c, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vgatherpf0qps  rcx+zmm31*4+0x400{k1}                       }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc6, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf1dpd  r14+ymm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc6, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf1dpd  r14+ymm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc6, 0x54, 0x39, 0x20                         }, { vgatherpf1dpd  r9+ymm31*1+0x100{k1}                        }
+testcase	{ 0x62, 0xb2, 0xfd, 0x41, 0xc6, 0x94, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vgatherpf1dpd  rcx+ymm31*4+0x400{k1}                       }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc6, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf1dps  r14+zmm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc6, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf1dps  r14+zmm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc6, 0x54, 0x39, 0x40                         }, { vgatherpf1dps  r9+zmm31*1+0x100{k1}                        }
+testcase	{ 0x62, 0xb2, 0x7d, 0x41, 0xc6, 0x94, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vgatherpf1dps  rcx+zmm31*4+0x400{k1}                       }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc7, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf1qpd  r14+zmm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc7, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf1qpd  r14+zmm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc7, 0x54, 0x39, 0x20                         }, { vgatherpf1qpd  r9+zmm31*1+0x100{k1}                        }
+testcase	{ 0x62, 0xb2, 0xfd, 0x41, 0xc7, 0x94, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vgatherpf1qpd  rcx+zmm31*4+0x400{k1}                       }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc7, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf1qps  r14+zmm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc7, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vgatherpf1qps  r14+zmm31*8+0x7b{k1}                        }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc7, 0x54, 0x39, 0x40                         }, { vgatherpf1qps  r9+zmm31*1+0x100{k1}                        }
+testcase	{ 0x62, 0xb2, 0x7d, 0x41, 0xc7, 0x94, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vgatherpf1qps  rcx+zmm31*4+0x400{k1}                       }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc6, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf0dpd  r14+ymm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc6, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf0dpd  r14+ymm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc6, 0x6c, 0x39, 0x20                         }, { vscatterpf0dpd  r9+ymm31*1+0x100{k1}                       }
+testcase	{ 0x62, 0xb2, 0xfd, 0x41, 0xc6, 0xac, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vscatterpf0dpd  rcx+ymm31*4+0x400{k1}                      }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc6, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf0dps  r14+zmm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc6, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf0dps  r14+zmm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc6, 0x6c, 0x39, 0x40                         }, { vscatterpf0dps  r9+zmm31*1+0x100{k1}                       }
+testcase	{ 0x62, 0xb2, 0x7d, 0x41, 0xc6, 0xac, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vscatterpf0dps  rcx+zmm31*4+0x400{k1}                      }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc7, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf0qpd  r14+zmm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc7, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf0qpd  r14+zmm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc7, 0x6c, 0x39, 0x20                         }, { vscatterpf0qpd  r9+zmm31*1+0x100{k1}                       }
+testcase	{ 0x62, 0xb2, 0xfd, 0x41, 0xc7, 0xac, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vscatterpf0qpd  rcx+zmm31*4+0x400{k1}                      }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc7, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf0qps  r14+zmm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc7, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf0qps  r14+zmm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc7, 0x6c, 0x39, 0x40                         }, { vscatterpf0qps  r9+zmm31*1+0x100{k1}                       }
+testcase	{ 0x62, 0xb2, 0x7d, 0x41, 0xc7, 0xac, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vscatterpf0qps  rcx+zmm31*4+0x400{k1}                      }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc6, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf1dpd  r14+ymm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc6, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf1dpd  r14+ymm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc6, 0x74, 0x39, 0x20                         }, { vscatterpf1dpd  r9+ymm31*1+0x100{k1}                       }
+testcase	{ 0x62, 0xb2, 0xfd, 0x41, 0xc6, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vscatterpf1dpd  rcx+ymm31*4+0x400{k1}                      }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc6, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf1dps  r14+zmm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc6, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf1dps  r14+zmm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc6, 0x74, 0x39, 0x40                         }, { vscatterpf1dps  r9+zmm31*1+0x100{k1}                       }
+testcase	{ 0x62, 0xb2, 0x7d, 0x41, 0xc6, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vscatterpf1dps  rcx+zmm31*4+0x400{k1}                      }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc7, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf1qpd  r14+zmm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc7, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf1qpd  r14+zmm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0xfd, 0x41, 0xc7, 0x74, 0x39, 0x20                         }, { vscatterpf1qpd  r9+zmm31*1+0x100{k1}                       }
+testcase	{ 0x62, 0xb2, 0xfd, 0x41, 0xc7, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vscatterpf1qpd  rcx+zmm31*4+0x400{k1}                      }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc7, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf1qps  r14+zmm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc7, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00       }, { vscatterpf1qps  r14+zmm31*8+0x7b{k1}                       }
+testcase	{ 0x62, 0x92, 0x7d, 0x41, 0xc7, 0x74, 0x39, 0x40                         }, { vscatterpf1qps  r9+zmm31*1+0x100{k1}                       }
+testcase	{ 0x62, 0xb2, 0x7d, 0x41, 0xc7, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00       }, { vscatterpf1qps  rcx+zmm31*4+0x400{k1}                      }
+testcase	{ 0x0f, 0x0d, 0x11                                                       }, { prefetchwt1 BYTE rcx                                       }
+testcase	{ 0x42, 0x0f, 0x0d, 0x94, 0xf0, 0x23, 0x01, 0x00, 0x00                   }, { prefetchwt1 BYTE rax+r14*8+0x123                           }

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/avx512pf.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/avx512pf.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/bcd.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/bcd.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/bcd.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/bcd.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/binexe.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/binexe.exe.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/binexe.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/bintest-o0.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/bintest-ox.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/bintest.asm Added

@@ -0,0 +1,56 @@
+; test source file for assembling to binary files
+; build with:
+;    nasm -f bin -o bintest.com bintest.asm
+
+; When run (as a DOS .COM file), this program should print
+;    hello, world
+; on two successive lines, then exit cleanly.
+
+; This file should test the following:
+; 1 Define a text-section symbol
+; 2 Define a data-section symbol
+; 3 Define a BSS-section symbol
+; 4 Define a NASM local label
+; 5 Reference a NASM local label
+; 6 Reference a text-section symbol in the text section
+; 7 Reference a data-section symbol in the text section
+; 8 Reference a BSS-section symbol in the text section
+; 9 Reference a text-section symbol in the data section
+; 10 Reference a data-section symbol in the data section
+; 11 Reference a BSS-section symbol in the data section
+
+	  BITS 16
+	  ORG 0x100
+
+	  SECTION .text
+
+	  jmp start		; 6
+
+endX	  mov ax,0x4c00		; 1
+	  int 0x21
+
+start	  mov byte bss_sym,',' ; 1 8
+	  mov bx,bssptr	; 7
+	  mov al,bx
+	  mov bx,dataptr	; 7
+	  mov bx,al
+	  mov cx,2
+.loop	  mov dx,datasym	; 1 4 7
+	  mov ah,9
+	  push cx
+	  int 0x21
+	  pop cx
+	  loop .loop		; 5 6
+	  mov bx,textptr	; 7
+	  jmp bx
+
+	  SECTION .data
+
+datasym	  db 'hello  world', 13, 10, '$' ; 2
+bssptr	  dw bss_sym		; 2 11
+dataptr	  dw datasym+5		; 2 10
+textptr	  dw endX		; 2 9
+
+	  SECTION .bss
+
+bss_sym	  resb 1		; 3

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/bintest.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br1879590.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br1879590.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br1879590.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br2003451.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br2003451.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br2003451.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br2030823.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br2030823.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br2030823.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br2148476.asm Added

@@ -0,0 +1,219 @@
+	bits 64
+
+	cvtdq2pd xmm0, xmm1
+	cvtdq2pd xmm0, rdi
+	cvtdq2pd xmm0, qword rdi
+
+	cvtdq2ps xmm0, xmm1
+	cvtdq2ps xmm0, rdi
+	cvtdq2ps xmm0, oword rdi
+
+	cvtpd2dq xmm0, xmm1
+	cvtpd2dq xmm0, rdi
+	cvtpd2dq xmm0, oword rdi
+
+	cvtpd2pi mm0, xmm1
+	cvtpd2pi mm0, rdi
+	cvtpd2pi mm0, oword rdi
+
+	cvtpd2ps xmm0, xmm1
+	cvtpd2ps xmm0, rdi
+	cvtpd2ps xmm0, oword rdi
+
+	cvtpi2pd xmm0, mm1
+	cvtpi2pd xmm0, rdi
+	cvtpi2pd xmm0, qword rdi
+
+	cvtpi2ps xmm0, mm1
+	cvtpi2ps xmm0, rdi
+	cvtpi2ps xmm0, qword rdi
+
+	cvtps2dq xmm0, xmm1
+	cvtps2dq xmm0, rdi
+	cvtps2dq xmm0, oword rdi
+
+	cvtps2pd xmm0, xmm1
+	cvtps2pd xmm0, rdi
+	cvtps2pd xmm0, qword rdi
+
+	cvtps2pi mm0, xmm1
+	cvtps2pi mm0, rdi
+	cvtps2pi mm0, qword rdi
+
+	cvtsd2si eax, xmm1
+	cvtsd2si eax, rdi
+	cvtsd2si eax, qword rdi
+	cvtsd2si rax, xmm1
+	cvtsd2si rax, rdi
+	cvtsd2si rax, qword rdi
+
+	cvtsd2ss xmm0, xmm1
+	cvtsd2ss xmm0, rdi
+	cvtsd2ss xmm0, qword rdi
+
+	cvtsi2sd xmm0, eax
+	cvtsi2sd xmm0, rdi	; Compatibility
+	cvtsi2sd xmm0, dword rdi
+	cvtsi2sd xmm0, rax
+	cvtsi2sd xmm0, qword rdi
+
+	cvtsi2ss xmm0, eax
+	cvtsi2ss xmm0, rdi	; Compatibility
+	cvtsi2ss xmm0, dword rdi
+	cvtsi2ss xmm0, rax
+	cvtsi2ss xmm0, qword rdi
+
+	cvtss2sd xmm0, xmm1
+	cvtss2sd xmm0, rdi
+	cvtss2sd xmm0, dword rdi
+
+	cvtss2si eax, xmm1
+	cvtss2si eax, rdi
+	cvtss2si eax, dword rdi
+	cvtss2si rax, xmm1
+	cvtss2si rax, rdi
+	cvtss2si rax, dword rdi
+
+	cvttpd2dq xmm0, xmm1
+	cvttpd2dq xmm0, rdi
+	cvttpd2dq xmm0, oword rdi
+
+	cvttpd2pi mm0, xmm1
+	cvttpd2pi mm0, rdi
+	cvttpd2pi mm0, oword rdi
+
+	cvttps2dq xmm0, xmm1
+	cvttps2dq xmm0, rdi
+	cvttps2dq xmm0, oword rdi
+
+	cvttps2pi mm0, xmm1
+	cvttps2pi mm0, rdi
+	cvttps2pi mm0, qword rdi
+
+	cvttsd2si eax, xmm1
+	cvttsd2si eax, rdi	; Compatibility
+	cvttsd2si eax, qword rdi
+	cvttsd2si rax, xmm1
+	cvttsd2si rax, rdi
+	cvttsd2si rax, qword rdi
+
+	cvttss2si eax, xmm1
+	cvttss2si eax, rdi 	; Compatibility
+	cvttss2si eax, dword rdi
+	cvttss2si rax, xmm1
+	cvttss2si rax, rdi
+	cvttss2si rax, dword rdi
+
+	vcvtdq2pd xmm0, xmm1
+	vcvtdq2pd xmm0, rdi
+	vcvtdq2pd xmm0, qword rdi
+	vcvtdq2pd ymm0, xmm1
+	vcvtdq2pd ymm0, rdi
+	vcvtdq2pd ymm0, oword rdi
+
+	vcvtdq2ps xmm0, xmm1
+	vcvtdq2ps xmm0, rdi
+	vcvtdq2ps xmm0, oword rdi
+	vcvtdq2ps ymm0, ymm1
+	vcvtdq2ps ymm0, rdi
+	vcvtdq2ps ymm0, yword rdi
+
+	vcvtpd2dq xmm0, xmm1
+	vcvtpd2dq xmm0, oword rdi
+	vcvtpd2dq xmm0, ymm1
+	vcvtpd2dq xmm0, yword rdi
+
+	vcvtpd2ps xmm0, xmm1
+	vcvtpd2ps xmm0, oword rdi
+	vcvtpd2ps xmm0, ymm1
+	vcvtpd2ps xmm0, yword rdi
+
+	vcvtps2dq xmm0, xmm1
+	vcvtps2dq xmm0, rdi
+	vcvtps2dq xmm0, oword rdi
+	vcvtps2dq ymm0, ymm1
+	vcvtps2dq ymm0, rdi
+	vcvtps2dq ymm0, yword rdi
+
+	vcvtps2pd xmm0, xmm1
+	vcvtps2pd xmm0, rdi
+	vcvtps2pd xmm0, qword rdi
+	vcvtps2pd ymm0, xmm1
+	vcvtps2pd ymm0, rdi
+	vcvtps2pd ymm0, oword rdi
+
+	vcvtsd2si eax, xmm1
+	vcvtsd2si eax, rdi
+	vcvtsd2si eax, qword rdi
+	vcvtsd2si rax, xmm1
+	vcvtsd2si rax, rdi
+	vcvtsd2si rax, qword rdi
+
+	vcvtsd2ss xmm0, xmm1
+	vcvtsd2ss xmm0, rdi
+	vcvtsd2ss xmm0, qword rdi
+	vcvtsd2ss xmm0, xmm1, xmm2
+	vcvtsd2ss xmm0, xmm1, rdi
+	vcvtsd2ss xmm0, xmm1, qword rdi
+
+	vcvtsi2sd xmm0, eax
+	vcvtsi2sd xmm0, rdi	; Compatibility
+	vcvtsi2sd xmm0, dword rdi
+	vcvtsi2sd xmm0, rax
+	vcvtsi2sd xmm0, qword rdi
+	vcvtsi2sd xmm0, xmm1, eax
+	vcvtsi2sd xmm0, xmm1, rdi	; Compatibility
+	vcvtsi2sd xmm0, xmm1, dword rdi
+	vcvtsi2sd xmm0, xmm1, rax
+	vcvtsi2sd xmm0, xmm1, qword rdi
+
+	vcvtsi2ss xmm0, eax
+	vcvtsi2ss xmm0, rdi	; Compatibility
+	vcvtsi2ss xmm0, dword rdi
+	vcvtsi2ss xmm0, rax
+	vcvtsi2ss xmm0, qword rdi
+	vcvtsi2ss xmm0, xmm1, eax
+	vcvtsi2ss xmm0, xmm1, rdi	; Compatibility
+	vcvtsi2ss xmm0, xmm1, dword rdi
+	vcvtsi2ss xmm0, xmm1, rax
+	vcvtsi2ss xmm0, xmm1, qword rdi
+
+	vcvtss2sd xmm0, xmm1
+	vcvtss2sd xmm0, rdi
+	vcvtss2sd xmm0, dword rdi
+	vcvtss2sd xmm0, xmm1, xmm2
+	vcvtss2sd xmm0, xmm1, rdi
+	vcvtss2sd xmm0, xmm1, dword rdi
+
+	vcvtss2si eax, xmm1
+	vcvtss2si eax, rdi
+	vcvtss2si eax, dword rdi
+	vcvtss2si rax, xmm1
+	vcvtss2si rax, rdi
+	vcvtss2si rax, dword rdi
+
+	vcvttpd2dq xmm0, xmm1
+	vcvttpd2dq xmm0, oword rdi
+	vcvttpd2dq xmm0, ymm1
+	vcvttpd2dq xmm0, yword rdi
+
+	vcvttps2dq xmm0, xmm1
+	vcvttps2dq xmm0, rdi
+	vcvttps2dq xmm0, oword rdi
+	vcvttps2dq ymm0, ymm1
+	vcvttps2dq ymm0, rdi
+	vcvttps2dq ymm0, yword rdi
+
+	vcvttsd2si eax, xmm1
+	vcvttsd2si eax, rdi	; Compatibility
+	vcvttsd2si eax, qword rdi
+	vcvttsd2si rax, xmm1
+	vcvttsd2si rax, rdi
+	vcvttsd2si rax, qword rdi
+
+	vcvttss2si eax, xmm1
+	vcvttss2si eax, rdi 	; Compatibility
+	vcvttss2si eax, dword rdi
+	vcvttss2si rax, xmm1
+	vcvttss2si rax, rdi
+	vcvttss2si rax, dword rdi

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br2148476.bin.t Added

@@ -0,0 +1 @@
+ó&#xf;æÁó&#xf;æ&#x7;ó&#xf;æ&#x7;&#xf;Á&#xf;&#x7;&#xf;&#x7;ò&#xf;æÁò&#xf;æ&#x7;ò&#xf;æ&#x7;f&#xf;-Áf&#xf;-&#x7;f&#xf;-&#x7;f&#xf;ZÁf&#xf;Z&#x7;f&#xf;Z&#x7;f&#xf;*Áf&#xf;*&#x7;f&#xf;*&#x7;&#xf;*Á&#xf;*&#x7;&#xf;*&#x7;f&#xf;Áf&#xf;&#x7;f&#xf;&#x7;&#xf;ZÁ&#xf;Z&#x7;&#xf;Z&#x7;&#xf;-Á&#xf;-&#x7;&#xf;-&#x7;ò&#xf;-Áò&#xf;-&#x7;ò&#xf;-&#x7;òH&#xf;-ÁòH&#xf;-&#x7;òH&#xf;-&#x7;ò&#xf;ZÁò&#xf;Z&#x7;ò&#xf;Z&#x7;ò&#xf;*Àò&#xf;*&#x7;ò&#xf;*&#x7;òH&#xf;*ÀòH&#xf;*&#x7;ó&#xf;*Àó&#xf;*&#x7;ó&#xf;*&#x7;óH&#xf;*ÀóH&#xf;*&#x7;ó&#xf;ZÁó&#xf;Z&#x7;ó&#xf;Z&#x7;ó&#xf;-Áó&#xf;-&#x7;ó&#xf;-&#x7;óH&#xf;-ÁóH&#xf;-&#x7;óH&#xf;-&#x7;f&#xf;æÁf&#xf;æ&#x7;f&#xf;æ&#x7;f&#xf;,Áf&#xf;,&#x7;f&#xf;,&#x7;ó&#xf;Áó&#xf;&#x7;ó&#xf;&#x7;&#xf;,Á&#xf;,&#x7;&#xf;,&#x7;ò&#xf;,Áò&#xf;,&#x7;ò&#xf;,&#x7;òH&#xf;,ÁòH&#xf;,&#x7;òH&#xf;,&#x7;ó&#xf;,Áó&#xf;,&#x7;ó&#xf;,&#x7;óH&#xf;,ÁóH&#xf;,&#x7;óH&#xf;,&#x7;ÅúæÁÅúæ&#x7;Åúæ&#x7;ÅþæÁÅþæ&#x7;Åþæ&#x7;ÅøÁÅø&#x7;Åø&#x7;ÅüÁÅü&#x7;Åü&#x7;ÅûæÁÅûæ&#x7;ÅÿæÁÅÿæ&#x7;ÅùZÁÅùZ&#x7;ÅýZÁÅýZ&#x7;ÅùÁÅù&#x7;Åù&#x7;ÅýÁÅý&#x7;Åý&#x7;ÅøZÁÅøZ&#x7;ÅøZ&#x7;ÅüZÁÅüZ&#x7;ÅüZ&#x7;Åû-ÁÅû-&#x7;Åû-&#x7;Äáû-ÁÄáû-&#x7;Äáû-&#x7;ÅûZÁÅûZ&#x7;ÅûZ&#x7;ÅóZÂÅóZ&#x7;ÅóZ&#x7;Åû*ÀÅû*&#x7;Åû*&#x7;Äáû*ÀÄáû*&#x7;Åó*ÀÅó*&#x7;Åó*&#x7;Äáó*ÀÄáó*&#x7;Åú*ÀÅú*&#x7;Åú*&#x7;Äáú*ÀÄáú*&#x7;Åò*ÀÅò*&#x7;Åò*&#x7;Äáò*ÀÄáò*&#x7;ÅúZÁÅúZ&#x7;ÅúZ&#x7;ÅòZÂÅòZ&#x7;ÅòZ&#x7;Åú-ÁÅú-&#x7;Åú-&#x7;Äáú-ÁÄáú-&#x7;Äáú-&#x7;ÅùæÁÅùæ&#x7;ÅýæÁÅýæ&#x7;ÅúÁÅú&#x7;Åú&#x7;ÅþÁÅþ&#x7;Åþ&#x7;Åû,ÁÅû,&#x7;Åû,&#x7;Äáû,ÁÄáû,&#x7;Äáû,&#x7;Åú,ÁÅú,&#x7;Åú,&#x7;Äáú,ÁÄáú,&#x7;Äáú,&#x7;
\ No newline at end of file

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br2148476.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br2222615.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br2222615.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br2222615.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br2222615.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br2496848.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br2496848.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br2496848.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br2496848.stderr Added

@@ -0,0 +1,25 @@
+./travis/test/br2496848.asm:8: warning: numeric constant 0x1ffffffffffffffff does not fit in 64 bits -w+number-overflow
+./travis/test/br2496848.asm:10: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/br2496848.asm:10: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/br2496848.asm:16: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/br2496848.asm:18: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/br2496848.asm:22: warning: byte data exceeds bounds -w+number-overflow
+./travis/test/br2496848.asm:22: warning: byte data exceeds bounds -w+number-overflow
+./travis/test/br2496848.asm:23: warning: byte data exceeds bounds -w+number-overflow
+./travis/test/br2496848.asm:23: warning: byte data exceeds bounds -w+number-overflow
+./travis/test/br2496848.asm:27: warning: byte data exceeds bounds -w+number-overflow
+./travis/test/br2496848.asm:28: warning: byte data exceeds bounds -w+number-overflow
+./travis/test/br2496848.asm:28: warning: byte data exceeds bounds -w+number-overflow
+./travis/test/br2496848.asm:29: warning: byte data exceeds bounds -w+number-overflow
+./travis/test/br2496848.asm:30: warning: byte data exceeds bounds -w+number-overflow
+./travis/test/br2496848.asm:30: warning: byte data exceeds bounds -w+number-overflow
+./travis/test/br2496848.asm:31: warning: byte data exceeds bounds -w+number-overflow
+./travis/test/br2496848.asm:31: warning: byte data exceeds bounds -w+number-overflow
+./travis/test/br2496848.asm:35: warning: byte data exceeds bounds -w+number-overflow
+./travis/test/br2496848.asm:36: warning: byte data exceeds bounds -w+number-overflow
+./travis/test/br2496848.asm:36: warning: byte data exceeds bounds -w+number-overflow
+./travis/test/br2496848.asm:37: warning: byte data exceeds bounds -w+number-overflow
+./travis/test/br2496848.asm:38: warning: byte data exceeds bounds -w+number-overflow
+./travis/test/br2496848.asm:38: warning: byte data exceeds bounds -w+number-overflow
+./travis/test/br2496848.asm:39: warning: byte data exceeds bounds -w+number-overflow
+./travis/test/br2496848.asm:39: warning: byte data exceeds bounds -w+number-overflow

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3005117.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3005117.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3005117.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3026808.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3026808.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3026808.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3028880.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3028880.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3028880.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3041451.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3041451.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3041451.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3041451.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3058845-o0.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3058845-ox.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3058845.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3058845.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3066383.asm Added

@@ -0,0 +1,68 @@
+;
+; this is a for BR3005117
+; http://sourceforge.net/tracker/?func=detail&aid=3005117&group_id=6208&atid=106208
+;
+%macro b_struc 1-*
+    %push foo
+        %define %$strucname %1
+%%top_%$strucname:
+        %rep %0 - 1
+            %rotate 1
+            resb %{$strucname}%1 - ($ - %%top_%$strucname)
+%1:
+        %endrep
+        resb %{$strucname}_size - ($ - %%top_%$strucname)
+    %pop
+%endmacro
+
+struc timeval
+    .tv_sec     resd    1
+    .tv_usec    resd    1
+endstruc
+
+section .text
+    mov timeval_struct.tv_sec, eax
+
+section .bss
+    timeval_struct b_struc timeval, .tv_sec, .tv_usec
+        timeval_struct_len equ $ - timeval_struct
+
+section .text
+
+;
+; this is a test for BR3026808
+; http://sourceforge.net/tracker/?func=detail&aid=3026808&group_id=6208&atid=106208
+;
+%imacro proc 1
+    %push proc
+    %assign %$arg 1
+%endmacro
+
+%imacro arg 0-1 1
+    %assign %$arg %1+%$arg
+%endmacro
+
+%imacro endproc 0
+    %pop
+%endmacro
+
+proc Test
+    %$ARG arg
+endproc
+
+;
+; this is a test for BR3066383
+; http://sourceforge.net/tracker/?func=detail&aid=3066383&group_id=6208&atid=106208
+;
+%macro pp_local 1
+    %push
+        %assign %$_uses 0
+        %rep 4
+            %assign %$_ur%$_uses %$_uses
+            mov ecx, %$_ur%$_uses
+            %assign %$_uses %$_uses+1
+        %endrep
+    %pop
+%endmacro
+
+pp_local 1

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3066383.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3066383.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3104312.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3104312.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3104312.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3109604.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3109604.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3109604.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3174983.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3174983.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3174983.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3187743.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3187743.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3187743.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3189064.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3189064.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3189064.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3200749.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3200749.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3200749.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3385573.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3385573.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3385573.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392252.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392252.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392252.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392259.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392259.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392259.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392275.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392275.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392275.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392278.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392278.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392278.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392363.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392363.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392363.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392392.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392392.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392392.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392392.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392396.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392396.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392396.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392411.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392411.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392411.out.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392442.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392442.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392442.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392442.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392528.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392528.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392528.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392531.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392531.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392531.stderr Added

@@ -0,0 +1,29 @@
+./travis/test/br3392531.asm:1: error: label or instruction expected at start of line
+./travis/test/br3392531.asm:4: error: invalid decorator token inside braces
+./travis/test/br3392531.asm:4: error: label or instruction expected at start of line
+./travis/test/br3392531.asm:5: error: parser: instruction expected
+./travis/test/br3392531.asm:7: error: `%macro' expects a parameter count
+./travis/test/br3392531.asm:11: warning: unterminated string (missing ``') -w+pp-open-string
+./travis/test/br3392531.asm:14: error: parser: instruction expected
+./travis/test/br3392531.asm:17: error: `%$LRG': context stack is empty
+./travis/test/br3392531.asm:17: error: `%$LRG': context stack is empty
+./travis/test/br3392531.asm:17: error: label or instruction expected at start of line
+./travis/test/br3392531.asm:18: error: label or instruction expected at start of line
+./travis/test/br3392531.asm:19: error: parser: instruction expected
+./travis/test/br3392531.asm:20: error: `%1': not in a macro call
+./travis/test/br3392531.asm:20: error: label or instruction expected at start of line
+./travis/test/br3392531.asm:21: error: label or instruction expected at start of line
+./travis/test/br3392531.asm:8: ... from macro `section' defined here
+./travis/test/br3392531.asm:21: error: parser: instruction expected
+./travis/test/br3392531.asm:9: ... from macro `section' defined here
+./travis/test/br3392531.asm:21: error: label or instruction expected at start of line
+./travis/test/br3392531.asm:10: ... from macro `section' defined here
+./travis/test/br3392531.asm:21: error: invalid macro parameter: `%4stru@namB'
+./travis/test/br3392531.asm:11: ... from macro `section' defined here
+./travis/test/br3392531.asm:21: error: parser: instruction expected
+./travis/test/br3392531.asm:11: ... from macro `section' defined here
+./travis/test/br3392531.asm:21: error: `%unmacro' expects a parameter count
+./travis/test/br3392531.asm:12: ... from macro `section' defined here
+./travis/test/br3392531.asm:21: error: `%unmacro' can't undefine the macro being expanded
+./travis/test/br3392531.asm:12: ... from macro `section' defined here
+./travis/test/br3392531.asm:22: error: parser: instruction expected

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392637.asm Added

@@ -0,0 +1,46 @@
+; -----------------------------------------------------------------------------
+; A 64-bit Linux application that writes the first 90 Fibonacci numbers. To
+; assemble and run:
+;
+;     nasm -felf64 fib.asm && gcc fib.o && ./a.out
+; -----------------------------------------------------------------------------
+
+        global  main
+        extern  printf
+
+        section .text
+main:
+        push    rbx                     ; we have to save this since we use it
+
+        mov     ecx, 90                 ; ecx will countdown to 0
+        xor     rax, rax                ; rax will hold the current number
+        xor     rbx, rbx                ; rbx will hold the next number
+        inc     rbx                     ; rbx is originally 1
+print:
+        ; We need to call printf, but we are using rax, rbx, and rcx.  printf
+        ; may destroy rax and rcx so we will save these before the call and
+        ; restore them afterwards.
+
+        push    rax                     ; caller-save register
+        push    rcx                     ; caller-save register
+
+        mov     rdi, format             ; set 1st parameter (format)
+        mov     rsi, rax                ; set 2nd parameter (current_number)
+        xor     rax, rax                ; because printf is varargs
+
+        ; Stack is already aligned because we pushed three 8 byte registers
+        call    printf                  ; printf(format, current_number)
+
+        pop     rcx                     ; restore caller-save register
+        pop     rax                     ; restore caller-save register
+
+        mov     rdx, rax                ; save the current number
+        mov     rax, rbx                ; next number is now current
+        add     rbx, rdx                ; get the new next number
+        dec     ecx                     ; count down
+        jnz     print                   ; if not done counting, do some more
+
+        pop     rbx                     ; restore rbx before returning
+        ret
+format:
+        db  "%20ld", 10, 0

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392637.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392637.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392637.stderr Added

@@ -0,0 +1,15 @@
+./travis/test/br3392637.asm:13: error: instruction not supported in 16-bit mode
+./travis/test/br3392637.asm:16: error: instruction not supported in 16-bit mode
+./travis/test/br3392637.asm:17: error: instruction not supported in 16-bit mode
+./travis/test/br3392637.asm:18: error: instruction not supported in 16-bit mode
+./travis/test/br3392637.asm:24: error: instruction not supported in 16-bit mode
+./travis/test/br3392637.asm:25: error: instruction not supported in 16-bit mode
+./travis/test/br3392637.asm:27: error: instruction not supported in 16-bit mode
+./travis/test/br3392637.asm:28: error: instruction not supported in 16-bit mode
+./travis/test/br3392637.asm:29: error: instruction not supported in 16-bit mode
+./travis/test/br3392637.asm:34: error: instruction not supported in 16-bit mode
+./travis/test/br3392637.asm:35: error: instruction not supported in 16-bit mode
+./travis/test/br3392637.asm:37: error: instruction not supported in 16-bit mode
+./travis/test/br3392637.asm:38: error: instruction not supported in 16-bit mode
+./travis/test/br3392637.asm:39: error: instruction not supported in 16-bit mode
+./travis/test/br3392637.asm:43: error: instruction not supported in 16-bit mode

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392643.asm Added

@@ -0,0 +1,4 @@
+;
+; Test long section name to be trimmed down to RECORD_MAX
+;
+section .name0123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392643.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392643.obj.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392643.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392707-error.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392707.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392707.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392707.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392707.stderr Added

@@ -0,0 +1,22 @@
+./travis/test/br3392707.asm:10: warning: byte data exceeds bounds -w+number-overflow
+./travis/test/br3392707.asm:12: warning: uninitialized space declared in .text section: zeroing -w+zeroing
+./travis/test/br3392707.asm:17: warning: uninitialized space declared in .text section: zeroing -w+zeroing
+./travis/test/br3392707.asm:18: warning: uninitialized space declared in .text section: zeroing -w+zeroing
+./travis/test/br3392707.asm:20: warning: uninitialized space declared in .text section: zeroing -w+zeroing
+./travis/test/br3392707.asm:22: warning: uninitialized space declared in .text section: zeroing -w+zeroing
+./travis/test/br3392707.asm:22: warning: uninitialized space declared in .text section: zeroing -w+zeroing
+./travis/test/br3392707.asm:22: warning: uninitialized space declared in .text section: zeroing -w+zeroing
+./travis/test/br3392707.asm:22: warning: uninitialized space declared in .text section: zeroing -w+zeroing
+./travis/test/br3392707.asm:22: warning: uninitialized space declared in .text section: zeroing -w+zeroing
+./travis/test/br3392707.asm:22: warning: uninitialized space declared in .text section: zeroing -w+zeroing
+./travis/test/br3392707.asm:22: warning: uninitialized space declared in .text section: zeroing -w+zeroing
+./travis/test/br3392707.asm:22: warning: uninitialized space declared in .text section: zeroing -w+zeroing
+./travis/test/br3392707.asm:22: warning: uninitialized space declared in .text section: zeroing -w+zeroing
+./travis/test/br3392707.asm:22: warning: uninitialized space declared in .text section: zeroing -w+zeroing
+./travis/test/br3392707.asm:22: warning: uninitialized space declared in .text section: zeroing -w+zeroing
+./travis/test/br3392707.asm:22: warning: uninitialized space declared in .text section: zeroing -w+zeroing
+./travis/test/br3392707.asm:22: warning: uninitialized space declared in .text section: zeroing -w+zeroing
+./travis/test/br3392707.asm:22: warning: uninitialized space declared in .text section: zeroing -w+zeroing
+./travis/test/br3392707.asm:22: warning: uninitialized space declared in .text section: zeroing -w+zeroing
+./travis/test/br3392707.asm:22: warning: uninitialized space declared in .text section: zeroing -w+zeroing
+./travis/test/br3392707.asm:23: warning: uninitialized space declared in .text section: zeroing -w+zeroing

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392711.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392711.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392711.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392716.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392716.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392716.stderr Added

@@ -0,0 +1,37 @@
+./travis/test/br3392716.asm:1: error: label or instruction expected at start of line
+./travis/test/br3392716.asm:2: error: `%unmacro' expects a parameter count
+./travis/test/br3392716.asm:3: warning: unterminated string (missing ``') -w+pp-open-string
+./travis/test/br3392716.asm:3: error: `%unmacro' expects a macro name
+./travis/test/br3392716.asm:4: warning: unterminated string (missing ``') -w+pp-open-string
+./travis/test/br3392716.asm:4: error: label or instruction expected at start of line
+./travis/test/br3392716.asm:5: error: `%macro' expects a parameter count
+./travis/test/br3392716.asm:15: warning: unterminated string (missing `'') -w+pp-open-string
+./travis/test/br3392716.asm:20: warning: unterminated string (missing `'') -w+pp-open-string
+./travis/test/br3392716.asm:20: warning: multi-line macro `sst' exists, but not taking 1 parameter -w+pp-macro-params-multi
+./travis/test/br3392716.asm:20: error: parser: instruction expected
+./travis/test/br3392716.asm:21: error: `%%cTo': not in a macro call
+./travis/test/br3392716.asm:21: error: label or instruction expected at start of line
+./travis/test/br3392716.asm:6: ... from macro `sst' defined here
+./travis/test/br3392716.asm:21: error: `%unmacro' expects a parameter count
+./travis/test/br3392716.asm:7: ... from macro `sst' defined here
+./travis/test/br3392716.asm:21: error: `%unmacro' can't undefine the macro being expanded
+./travis/test/br3392716.asm:7: ... from macro `sst' defined here
+./travis/test/br3392716.asm:21: error: label or instruction expected at start of line
+./travis/test/br3392716.asm:8: ... from macro `sst' defined here
+./travis/test/br3392716.asm:21: error: parser: instruction expected
+./travis/test/br3392716.asm:10: ... from macro `sst' defined here
+./travis/test/br3392716.asm:21: error: label or instruction expected at start of line
+./travis/test/br3392716.asm:11: ... from macro `sst' defined here
+./travis/test/br3392716.asm:21: error: `%unmacro' expects a parameter count
+./travis/test/br3392716.asm:12: ... from macro `sst' defined here
+./travis/test/br3392716.asm:21: error: `%unmacro' can't undefine the macro being expanded
+./travis/test/br3392716.asm:12: ... from macro `sst' defined here
+./travis/test/br3392716.asm:21: error: label or instruction expected at start of line
+./travis/test/br3392716.asm:13: ... from macro `sst' defined here
+./travis/test/br3392716.asm:21: error: parser: instruction expected
+./travis/test/br3392716.asm:15: ... from macro `sst' defined here
+./travis/test/br3392716.asm:21: error: `%macro' expects a macro name
+./travis/test/br3392716.asm:16: ... from macro `sst' defined here
+./travis/test/br3392716.asm:21: error: parser: instruction expected
+./travis/test/br3392716.asm:17: ... from macro `sst' defined here
+./travis/test/br3392716.asm:22: error: label or instruction expected at start of line

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392739.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392739.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392739.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392751.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392751.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br3392751.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br560575.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br560575.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br560575.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br890790.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br890790.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br890790.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br890790_i.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br978756.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br978756.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/br978756.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/clzero.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/clzero.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/clzero.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/clzero.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/coffalign.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/coffalign.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/coffalign.obj.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/cofftest.asm Added

@@ -0,0 +1,85 @@
+;Cannot be automatically tested because it differs every time,
+;I guess because of a date/time field.
+
+; test source file for assembling to COFF
+; build with (under DJGPP, for example):
+;    nasm -f coff cofftest.asm
+;    gcc -o cofftest cofftest.c cofftest.o
+
+; This file should test the following:
+; 1 Define and export a global text-section symbol
+; 2 Define and export a global data-section symbol
+; 3 Define and export a global BSS-section symbol
+; 4 Define a non-global text-section symbol
+; 5 Define a non-global data-section symbol
+; 6 Define a non-global BSS-section symbol
+; 7 Define a COMMON symbol
+; 8 Define a NASM local label
+; 9 Reference a NASM local label
+; 10 Import an external symbol
+; 11 Make a PC-relative call to an external symbol
+; 12 Reference a text-section symbol in the text section
+; 13 Reference a data-section symbol in the text section
+; 14 Reference a BSS-section symbol in the text section
+; 15 Reference a text-section symbol in the data section
+; 16 Reference a data-section symbol in the data section
+; 17 Reference a BSS-section symbol in the data section
+
+	  BITS 32
+	  GLOBAL _lrotate	; 1
+	  GLOBAL _greet		; 1
+	  GLOBAL _asmstr	; 2
+	  GLOBAL _textptr	; 2
+	  GLOBAL _selfptr	; 2
+	  GLOBAL _integer	; 3
+	  EXTERN _printf	; 10
+	  COMMON _commvar 4	; 7
+
+	  SECTION .text
+
+; prototype: long lrotate(long x, int num);
+_lrotate:			; 1
+	  push ebp
+	  mov ebp,esp
+	  mov eax,ebp+8
+	  mov ecx,ebp+12
+.label	  rol eax,1		; 4 8
+	  loop .label		; 9 12
+	  mov esp,ebp
+	  pop ebp
+	  ret
+
+; prototype: void greet(void);
+_greet	  mov eax,_integer	; 14
+	  inc eax
+	  mov localint,eax	; 14
+	  push dword _commvar
+	  mov eax,localptr	; 13
+	  push dword eax
+	  push dword _integer	; 1 14
+	  push dword _printfstr	; 13
+	  call _printf		; 11
+	  add esp,16
+	  ret
+
+	  SECTION .data
+
+; a string
+_asmstr	  db 'hello, world', 0	; 2
+
+; a string for Printf
+_printfstr db "integer==%d, localint==%d, commvar=%d"
+	  db 10, 0
+
+; some pointers
+localptr  dd localint		; 5 17
+_textptr  dd _greet		; 15
+_selfptr  dd _selfptr		; 16
+
+	  SECTION .bss
+
+; an integer
+_integer  resd 1		; 3
+
+; a local integer
+localint  resd 1		; 6

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/cofftest.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/cofftest.obj.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/crc32.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/crc32.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/crc32.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ctxlocal.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ctxlocal.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ctxlocal.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/dbxsize.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/dbxsize.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/dbxsize.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/elfso-o0.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/elfso-o0.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/elfso-ox.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/elfso-ox.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/elfso.asm Added

@@ -0,0 +1,100 @@
+;Testname=unoptimized; Arguments=-O0 -felf -oelfso.o; Files=stdout stderr elfso.o
+;Testname=optimized;   Arguments=-Ox -felf -oelfso.o; Files=stdout stderr elfso.o
+
+; test source file for assembling to ELF shared library
+; build with:
+;    nasm -f elf elfso.asm
+;    ld -shared -o elfso.so elfso.o
+; test with:
+;    gcc -o elfso elftest.c ./elfso.so
+;    ./elfso
+; (assuming your gcc is ELF, and you're running bash)
+
+; This file should test the following:
+; 1 Define and export a global text-section symbol
+; 2 Define and export a global data-section symbol
+; 3 Define and export a global BSS-section symbol
+; 4 Define a non-global text-section symbol
+; 5 Define a non-global data-section symbol
+; 6 Define a non-global BSS-section symbol
+; 7 Define a COMMON symbol
+; 8 Define a NASM local label
+; 9 Reference a NASM local label
+; 10 Import an external symbol
+; 11 Make a PC-relative call to an external symbol
+; 12 Reference a text-section symbol in the text section
+; 13 Reference a data-section symbol in the text section
+; 14 Reference a BSS-section symbol in the text section
+; 15 Reference a text-section symbol in the data section
+; 16 Reference a data-section symbol in the data section
+; 17 Reference a BSS-section symbol in the data section
+
+	  BITS 32
+	  GLOBAL lrotate:function ; 1
+	  GLOBAL greet:function	; 1
+	  GLOBAL asmstr:data asmstr.end-asmstr ; 2
+	  GLOBAL textptr:data 4	; 2
+	  GLOBAL selfptr:data 4	; 2
+	  GLOBAL integer:data 4	; 3
+	  EXTERN printf		; 10
+	  COMMON commvar 4:4	; 7
+	  EXTERN _GLOBAL_OFFSET_TABLE_
+
+	  SECTION .text
+
+; prototype: long lrotate(long x, int num);
+lrotate:			; 1
+	  push ebp
+	  mov ebp,esp
+	  mov eax,ebp+8
+	  mov ecx,ebp+12
+.label	  rol eax,1		; 4 8
+	  loop .label		; 9 12
+	  mov esp,ebp
+	  pop ebp
+	  ret
+
+; prototype: void greet(void);
+greet	  push ebx		; we'll use EBX for GOT, so save it
+	  call .getgot
+.getgot:  pop ebx
+	  add ebx,_GLOBAL_OFFSET_TABLE_ + $$ - .getgot wrt ..gotpc
+	  mov eax,ebx+integer wrt ..got ; 14
+	  mov eax,eax
+	  inc eax
+	  mov ebx+localint wrt ..gotoff,eax ; 14
+	  mov eax,ebx+commvar wrt ..got
+	  push dword eax
+	  mov eax,ebx+localptr wrt ..gotoff ; 13
+	  push dword eax
+	  mov eax,ebx+integer wrt ..got ; 1 14
+	  push dword eax
+	  lea eax,ebx+printfstr wrt ..gotoff
+	  push eax		; 13
+	  call printf wrt ..plt	; 11
+	  add esp,16
+	  pop ebx
+	  ret
+
+	  SECTION .data
+
+; a string
+asmstr	  db 'hello, world', 0	; 2
+.end
+
+; a string for Printf
+printfstr db "integer==%d, localint==%d, commvar=%d"
+	  db 10, 0
+
+; some pointers
+localptr  dd localint		; 5 17
+textptr	  dd greet wrt ..sym	; 15
+selfptr	  dd selfptr wrt ..sym	; 16
+
+	  SECTION .bss
+
+; an integer
+integer	  resd 1		; 3
+
+; a local integer
+localint  resd 1		; 6

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/elfso.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/elif.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/elif.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/elif.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/expimp-o0-error.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/expimp-o0.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/expimp-o0.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/expimp-o1.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/expimp-o1.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/expimp-ox-error.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/expimp-ox.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/expimp.asm Added

@@ -0,0 +1,90 @@
+;Testname=O0; Arguments=-O0 -fbin -oexpimp.bin; Files=stdout stderr expimp.bin
+;Testname=O1; Arguments=-O1 -fbin -oexpimp.bin; Files=stdout stderr expimp.bin
+;Testname=Ox; Arguments=-Ox -fbin -oexpimp.bin; Files=stdout stderr expimp.bin
+;Testname=error-O0; Arguments=-O0 -fbin -oexpimp.bin -DERROR; Files=stdout stderr expimp.bin
+;Testname=error-Ox; Arguments=-Ox -fbin -oexpimp.bin -DERROR; Files=stdout stderr expimp.bin
+
+;
+; Test of explicitly and implicitly sized operands
+;
+	BITS 32
+
+	add esi,2			; Implicit
+	add esi,123456h			; Implicit
+	add esi,byte 2			; Explicit
+	add esi,dword 2			; Explicit
+	add esi,dword 123456h		; Explicit
+	add esi,byte 123456h		; Explicit Truncation
+
+	add esi,strict 2		; Implicit Strict
+	add esi,strict 123456h		; Implicit Strict
+	add esi,strict byte 2		; Explicit Strict
+	add esi,strict dword 2		; Explicit Strict
+	add esi,strict dword 123456h	; Explicit Strict
+	add esi,strict byte 123456h	; Explicit Strict Truncation
+
+	add eax,2			; Implicit
+	add eax,123456h			; Implicit
+	add eax,byte 2			; Explicit
+	add eax,dword 2			; Explicit
+	add eax,dword 123456h		; Explicit
+	add eax,byte 123456h		; Explicit Truncation
+
+	add eax,strict 2		; Implicit Strict
+	add eax,strict 123456h		; Implicit Strict
+	add eax,strict byte 2		; Explicit Strict
+	add eax,strict dword 2		; Explicit Strict
+	add eax,strict dword 123456h	; Explicit Strict
+	add eax,strict byte 123456h	; Explicit Strict Truncation
+
+	imul dx,3			; Implicit
+	imul dx,byte 3			; Explicit
+	imul dx,word 3			; Explicit
+	imul dx,strict byte 3		; Explicit Strict
+	imul dx,strict word 3		; Explicit Strict
+
+;
+; Same thing with branches
+;
+start:
+	jmp short start			; Explicit
+	jmp near start			; Explicit
+	jmp word start			; Explicit
+	jmp dword start			; Explicit
+	jmp short forward		; Explicit
+	jmp near forward		; Explicit
+	jmp word forward		; Explicit
+	jmp dword forward		; Explicit
+%ifdef ERROR
+	jmp short faraway		; Explicit (ERROR)
+%endif
+	jmp near faraway		; Explicit
+	jmp word faraway		; Explicit
+	jmp dword faraway		; Explicit
+	jmp start			; Implicit
+	jmp forward			; Implicit
+	jmp faraway			; Implicit
+
+	jmp strict short start		; Explicit Strict
+	jmp strict near start		; Explicit Strict
+	jmp strict word start		; Explicit Strict
+	jmp strict dword start		; Explicit Strict
+	jmp strict short forward	; Explicit Strict
+	jmp strict near forward		; Explicit Strict
+	jmp strict word forward		; Explicit Strict
+	jmp strict dword forward	; Explicit Strict
+%ifdef ERROR
+	jmp strict short faraway	; Explicit (ERROR)
+%endif
+	jmp strict near faraway		; Explicit Strict
+	jmp strict word faraway		; Explicit Strict
+	jmp strict dword faraway	; Explicit Strict
+	jmp strict start		; Implicit Strict
+	jmp strict forward		; Implicit Strict
+	jmp strict faraway		; Implicit Strict
+forward:
+
+	times 256 nop
+faraway:
+
+

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/expimp.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/far64.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/far64.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/far64.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/float.asm Added

@@ -0,0 +1,217 @@
+;
+; Test of floating-point formats
+;
+
+%use fp
+
+; 8-bit
+	db 1.0
+	db +1.0
+	db -1.0
+	db 1.5
+	db +1.5
+	db -1.5
+	db 0.0
+	db +0.0
+	db -0.0
+	db 1.83203125
+	db +1.83203125
+	db -1.83203125
+	db 1.83203125e1
+	db +1.83203125e1
+	db -1.83203125e1
+	db 1.83203125e-1
+	db +1.83203125e-1
+	db -1.83203125e-1
+	db 1.13203125e-2		; Denormal!
+	db +1.13203125e-2		; Denormal!
+	db -1.13203125e-2		; Denormal!
+	db __Infinity__
+	db +__Infinity__
+	db -__Infinity__
+	db __NaN__
+	db __QNaN__
+	db __SNaN__
+	db 3.1415926535_8979323846_2643383279_5028841971_6939937510_5
+
+; 16-bit
+	dw 1.0
+	dw +1.0
+	dw -1.0
+	dw 1.5
+	dw +1.5
+	dw -1.5
+	dw 0.0
+	dw +0.0
+	dw -0.0
+	dw 1.83203125
+	dw +1.83203125
+	dw -1.83203125
+	dw 1.83203125e3
+	dw +1.83203125e3
+	dw -1.83203125e3
+	dw 1.83203125e-3
+	dw +1.83203125e-3
+	dw -1.83203125e-3
+	dw 1.83203125e-6		; Denormal!
+	dw +1.83203125e-6		; Denormal!
+	dw -1.83203125e-6		; Denormal!
+	dw __Infinity__
+	dw +__Infinity__
+	dw -__Infinity__
+	dw __NaN__
+	dw __QNaN__
+	dw __SNaN__
+	dw 3.1415926535_8979323846_2643383279_5028841971_6939937510_5
+
+; 16-bit bfloat
+	bf16 1.0
+	bf16 +1.0
+	bf16 -1.0
+	bf16 1.5
+	bf16 +1.5
+	bf16 -1.5
+	bf16 0.0
+	bf16 +0.0
+	bf16 -0.0
+	bf16 1.83203125
+	bf16 +1.83203125
+	bf16 -1.83203125
+	bf16 1.83203125e15
+	bf16 +1.83203125e15
+	bf16 -1.83203125e15
+	bf16 1.83203125e-15
+	bf16 +1.83203125e-15
+	bf16 -1.83203125e-15
+	bf16 1.83203125e-40		; Denormal!
+	bf16 +1.83203125e-40		; Denormal!
+	bf16 -1.83203125e-40		; Denormal!
+	bf16 __Infinity__
+	bf16 +__Infinity__
+	bf16 -__Infinity__
+	bf16 __NaN__
+	bf16 __QNaN__
+	bf16 __SNaN__
+	bf16 3.1415926535_8979323846_2643383279_5028841971_6939937510_5
+	bf16 -3.1415, NaN, 2000.0, +Inf
+
+; 32-bit
+	dd 1.0
+	dd +1.0
+	dd -1.0
+	dd 1.5
+	dd +1.5
+	dd -1.5
+	dd 0.0
+	dd +0.0
+	dd -0.0
+	dd 1.83203125
+	dd +1.83203125
+	dd -1.83203125
+	dd 1.83203125e15
+	dd +1.83203125e15
+	dd -1.83203125e15
+	dd 1.83203125e-15
+	dd +1.83203125e-15
+	dd -1.83203125e-15
+	dd 1.83203125e-40		; Denormal!
+	dd +1.83203125e-40		; Denormal!
+	dd -1.83203125e-40		; Denormal!
+	dd __Infinity__
+	dd +__Infinity__
+	dd -__Infinity__
+	dd __NaN__
+	dd __QNaN__
+	dd __SNaN__
+	dd 3.1415926535_8979323846_2643383279_5028841971_6939937510_5
+	dd -3.1415, NaN, 2000.0, +Inf
+
+; 64-bit
+	dq 1.0
+	dq +1.0
+	dq -1.0
+	dq 1.5
+	dq +1.5
+	dq -1.5
+	dq 0.0
+	dq +0.0
+	dq -0.0
+	dq 1.83203125
+	dq +1.83203125
+	dq -1.83203125
+	dq 1.83203125e300
+	dq +1.83203125e300
+	dq -1.83203125e300
+	dq 1.83203125e-300
+	dq +1.83203125e-300
+	dq -1.83203125e-300
+	dq 1.83203125e-320		; Denormal!
+	dq +1.83203125e-320		; Denormal!
+	dq -1.83203125e-320		; Denormal!
+	dq __Infinity__
+	dq +__Infinity__
+	dq -__Infinity__
+	dq __NaN__
+	dq __QNaN__
+	dq __SNaN__
+	dq 3.1415926535_8979323846_2643383279_5028841971_6939937510_5
+
+; 80-bit
+	dt 1.0
+	dt +1.0
+	dt -1.0
+	dt 1.5
+	dt +1.5
+	dt -1.5
+	dt 0.0
+	dt +0.0
+	dt -0.0
+	dt 1.83203125
+	dt +1.83203125
+	dt -1.83203125
+	dt 1.83203125e+4000
+	dt +1.83203125e+4000
+	dt -1.83203125e+4000
+	dt 1.83203125e-4000
+	dt +1.83203125e-4000
+	dt -1.83203125e-4000
+	dt 1.83203125e-4940		; Denormal!
+	dt +1.83203125e-4940		; Denormal!
+	dt -1.83203125e-4940		; Denormal!
+	dt __Infinity__
+	dt +__Infinity__
+	dt -__Infinity__
+	dt __NaN__
+	dt __QNaN__
+	dt __SNaN__
+	dt 3.1415926535_8979323846_2643383279_5028841971_6939937510_5
+
+; 128-bit
+	do 1.0
+	do +1.0
+	do -1.0
+	do 1.5
+	do +1.5
+	do -1.5
+	do 0.0
+	do +0.0
+	do -0.0
+	do 1.83203125
+	do +1.83203125
+	do -1.83203125
+	do 1.83203125e+4000
+	do +1.83203125e+4000
+	do -1.83203125e+4000
+	do 1.83203125e-4000
+	do +1.83203125e-4000
+	do -1.83203125e-4000
+	do 1.83203125e-4940		; Denormal!
+	do +1.83203125e-4940		; Denormal!
+	do -1.83203125e-4940		; Denormal!
+	do __Infinity__
+	do +__Infinity__
+	do -__Infinity__
+	do __NaN__
+	do __QNaN__
+	do __SNaN__
+	do 3.1415926535_8979323846_2643383279_5028841971_6939937510_5

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/float.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/float.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/float8.asm Added

@@ -0,0 +1,132 @@
+; Test of 8-bit floating-point constants
+
+	; Zero
+	db 0.0			; 00h
+
+	; Denorms
+	db 0.001953125		; 01h
+	db 0.00390625		; 02h
+	db 0.005859375		; 03h
+	db 0.0078125		; 04h
+	db 0.009765625		; 05h
+	db 0.01171875		; 06h
+	db 0.013671875		; 07h
+
+	; Normals
+	db 0.015625		; 08h
+	db 0.017578125		; 09h
+	db 0.01953125		; 0Ah
+	db 0.021484375		; 0Bh
+	db 0.0234375		; 0Ch
+	db 0.025390625		; 0Dh
+	db 0.02734375		; 0Eh
+	db 0.029296875		; 0Fh
+	db 0.03125		; 10h
+	db 0.03515625		; 11h
+	db 0.0390625		; 12h
+	db 0.04296875		; 13h
+	db 0.046875		; 14h
+	db 0.05078125		; 15h
+	db 0.0546875		; 16h
+	db 0.05859375		; 17h
+	db 0.0625		; 18h
+	db 0.0703125		; 19h
+	db 0.078125		; 1Ah
+	db 0.0859375		; 1Bh
+	db 0.09375		; 1Ch
+	db 0.1015625		; 1Dh
+	db 0.109375		; 1Eh
+	db 0.1171875		; 1Fh
+	db 0.125		; 20h
+	db 0.140625		; 21h
+	db 0.15625		; 22h
+	db 0.171875		; 23h
+	db 0.1875		; 24h
+	db 0.203125		; 25h
+	db 0.21875		; 26h
+	db 0.234375		; 27h
+	db 0.25			; 28h
+	db 0.28125		; 29h
+	db 0.3125		; 2Ah
+	db 0.34375		; 2Bh
+	db 0.375		; 2Ch
+	db 0.40625		; 2Dh
+	db 0.4375		; 2Eh
+	db 0.46875		; 2Fh
+	db 0.5			; 30h
+	db 0.5625		; 31h
+	db 0.625		; 32h
+	db 0.6875		; 33h
+	db 0.75			; 34h
+	db 0.8125		; 35h
+	db 0.875		; 36h
+	db 0.9375		; 37h
+	db 1.0			; 38h
+	db 1.125		; 39h
+	db 1.25			; 3Ah
+	db 1.375		; 3Bh
+	db 1.5			; 3Ch
+	db 1.625		; 3Dh
+	db 1.75			; 3Eh
+	db 1.875		; 3Fh
+	db 2.0			; 40h
+	db 2.25			; 41h
+	db 2.5			; 42h
+	db 2.75			; 43h
+	db 3.0			; 44h
+	db 3.25			; 45h
+	db 3.5			; 46h
+	db 3.75			; 47h
+	db 4.0			; 48h
+	db 4.5			; 49h
+	db 5.0			; 4Ah
+	db 5.5			; 4Bh
+	db 6.0			; 4Ch
+	db 6.5			; 4Dh
+	db 7.0			; 4Eh
+	db 7.5			; 4Fh
+	db 8.0			; 50h
+	db 9.0			; 51h
+	db 10.0			; 52h
+	db 11.0			; 53h
+	db 12.0			; 54h
+	db 13.0			; 55h
+	db 14.0			; 56h
+	db 15.0			; 57h
+	db 16.0			; 58h
+	db 18.0			; 59h
+	db 20.0			; 5Ah
+	db 22.0			; 5Bh
+	db 24.0			; 5Ch
+	db 26.0			; 5Dh
+	db 28.0			; 5Eh
+	db 30.0			; 5Fh
+	db 32.0			; 60h
+	db 36.0			; 61h
+	db 40.0			; 62h
+	db 44.0			; 63h
+	db 48.0			; 64h
+	db 52.0			; 65h
+	db 56.0			; 66h
+	db 60.0			; 67h
+	db 64.0			; 68h
+	db 72.0			; 69h
+	db 80.0			; 6Ah
+	db 88.0			; 6Bh
+	db 96.0			; 6Ch
+	db 104.0		; 6Dh
+	db 112.0		; 6Eh
+	db 120.0		; 6Fh
+	db 128.0		; 70h
+	db 144.0		; 71h
+	db 160.0		; 72h
+	db 176.0		; 73h
+	db 192.0		; 74h
+	db 208.0		; 75h
+	db 224.0		; 76h
+	db 240.0		; 77h
+
+	; Exceptionals
+	db __Infinity__		; 78h
+	db __SNaN__		; 79h
+	db __QNaN__		; 7Ch

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/float8.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/float8.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/floatb.asm Added

@@ -0,0 +1,56 @@
+	;; Known problematic floating-point numbers and their proper
+	;; encoding...
+
+	bits 64
+
+	dd 1.1e10
+	dd 0x5023e9ac	; Should be...
+
+	dd 50.40e9
+	dd 0x513bc130	; Should be...
+
+	dq 1.4e23
+	dq 0x44bda56a4b0835c0
+
+	dq 50.48e21
+	dq 0x44a5610d7502feae
+
+	dt 1.2e28
+	dq 0x9b18ab5df7180b6c
+	dw 0x405c
+
+	dt 50.46e25
+	dq 0xd0b29a67e95dcb60
+	dw 0x4057
+
+	do 0xf.ffffff8p-4
+	do 0q3.7777777774p-2
+	do 0b1.1111_1111_1111_1111_1111_1111_1111_111p-1
+
+	dt 0xf.ffffff8p-4
+	dt 0q3.7777777774p-2
+	dt 0b1.1111_1111_1111_1111_1111_1111_1111_111p-1
+
+	dq 0xf.ffffff8p-4
+	dq 0q3.7777777774p-2
+	dq 0b1.1111_1111_1111_1111_1111_1111_1111_111p-1
+
+	dd 0xf.ffffff8p-4
+	dd 0q3.7777777774p-2
+	dd 0b1.1111_1111_1111_1111_1111_1111_1111_111p-1
+
+	dw 0xf.ffffff8p-4
+	dw 0q3.7777777774p-2
+	dw 0b1.1111_1111_1111_1111_1111_1111_1111_111p-1
+
+	db 0xf.ffffff8p-4
+	db 0q3.7777777774p-2
+	db 0b1.1111_1111_1111_1111_1111_1111_1111_111p-1
+
+	;; Way too big numbers, should overflow to +Inf
+	dd 1.0E646456955
+	dd 1.0E646456956
+	dd 1.0E2147483646
+	dd 1.0E2147483647
+	dd 1.0E2147483648
+	dd 1.0E2147483649

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/floatb.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/floatb.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/floatb.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/floatexp-o0.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/floatexp-ox.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/floatexp.asm Added

@@ -0,0 +1,379 @@
+	bits 64
+;
+; Test of floating-point formats
+;
+
+; 8-bit
+	mov al,__float8__(1.0)
+	mov al,__float8__(+1.0)
+	mov al,__float8__(-1.0)
+	mov al,__float8__(0.0)
+	mov al,__float8__(+0.0)
+	mov al,__float8__(-0.0)
+	mov al,__float8__(1.83203125)
+	mov al,__float8__(+1.83203125)
+	mov al,__float8__(-1.83203125)
+	mov al,__float8__(1.83203125e1)
+	mov al,__float8__(+1.83203125e1)
+	mov al,__float8__(-1.83203125e1)
+	mov al,__float8__(1.83203125e-1)
+	mov al,__float8__(+1.83203125e-1)
+	mov al,__float8__(-1.83203125e-1)
+	mov al,__float8__(1.13203125e-2)		; Denormal!
+	mov al,__float8__(+1.13203125e-2)		; Denormal!
+	mov al,__float8__(-1.13203125e-2)		; Denormal!
+	mov al,__float8__(__Infinity__)
+	mov al,__float8__(+__Infinity__)
+	mov al,__float8__(-__Infinity__)
+	mov al,__float8__(__NaN__)
+	mov al,__float8__(__QNaN__)
+	mov al,__float8__(__SNaN__)
+
+; 16-bit
+	mov ax,__float16__(1.0)
+	mov ax,__float16__(+1.0)
+	mov ax,__float16__(-1.0)
+	mov ax,__float16__(0.0)
+	mov ax,__float16__(+0.0)
+	mov ax,__float16__(-0.0)
+	mov ax,__float16__(1.83203125)
+	mov ax,__float16__(+1.83203125)
+	mov ax,__float16__(-1.83203125)
+	mov ax,__float16__(1.83203125e3)
+	mov ax,__float16__(+1.83203125e3)
+	mov ax,__float16__(-1.83203125e3)
+	mov ax,__float16__(1.83203125e-3)
+	mov ax,__float16__(+1.83203125e-3)
+	mov ax,__float16__(-1.83203125e-3)
+	mov ax,__float16__(1.83203125e-6)		; Denormal!
+	mov ax,__float16__(+1.83203125e-6)		; Denormal!
+	mov ax,__float16__(-1.83203125e-6)		; Denormal!
+	mov ax,__float16__(__Infinity__)
+	mov ax,__float16__(+__Infinity__)
+	mov ax,__float16__(-__Infinity__)
+	mov ax,__float16__(__NaN__)
+	mov ax,__float16__(__QNaN__)
+	mov ax,__float16__(__SNaN__)
+
+; 32-bit
+	mov eax,__float32__(1.0)
+	mov eax,__float32__(+1.0)
+	mov eax,__float32__(-1.0)
+	mov eax,__float32__(0.0)
+	mov eax,__float32__(+0.0)
+	mov eax,__float32__(-0.0)
+	mov eax,__float32__(1.83203125)
+	mov eax,__float32__(+1.83203125)
+	mov eax,__float32__(-1.83203125)
+	mov eax,__float32__(1.83203125e15)
+	mov eax,__float32__(+1.83203125e15)
+	mov eax,__float32__(-1.83203125e15)
+	mov eax,__float32__(1.83203125e-15)
+	mov eax,__float32__(+1.83203125e-15)
+	mov eax,__float32__(-1.83203125e-15)
+	mov eax,__float32__(1.83203125e-40)		; Denormal!
+	mov eax,__float32__(+1.83203125e-40)		; Denormal!
+	mov eax,__float32__(-1.83203125e-40)		; Denormal!
+	mov eax,__float32__(__Infinity__)
+	mov eax,__float32__(+__Infinity__)
+	mov eax,__float32__(-__Infinity__)
+	mov eax,__float32__(__NaN__)
+	mov eax,__float32__(__QNaN__)
+	mov eax,__float32__(__SNaN__)
+
+; 64-bit
+	mov rax,__float64__(1.0)
+	mov rax,__float64__(+1.0)
+	mov rax,__float64__(-1.0)
+	mov rax,__float64__(0.0)
+	mov rax,__float64__(+0.0)
+	mov rax,__float64__(-0.0)
+	mov rax,__float64__(1.83203125)
+	mov rax,__float64__(+1.83203125)
+	mov rax,__float64__(-1.83203125)
+	mov rax,__float64__(1.83203125e300)
+	mov rax,__float64__(+1.83203125e300)
+	mov rax,__float64__(-1.83203125e300)
+	mov rax,__float64__(1.83203125e-300)
+	mov rax,__float64__(+1.83203125e-300)
+	mov rax,__float64__(-1.83203125e-300)
+	mov rax,__float64__(1.83203125e-320)		; Denormal!
+	mov rax,__float64__(+1.83203125e-320)		; Denormal!
+	mov rax,__float64__(-1.83203125e-320)		; Denormal!
+	mov rax,__float64__(__Infinity__)
+	mov rax,__float64__(+__Infinity__)
+	mov rax,__float64__(-__Infinity__)
+	mov rax,__float64__(__NaN__)
+	mov rax,__float64__(__QNaN__)
+	mov rax,__float64__(__SNaN__)
+
+; 80-bit
+	mov rax,__float80m__(1.0)
+	mov ax,__float80e__(1.0)
+	mov rax,__float80m__(+1.0)
+	mov ax,__float80e__(+1.0)
+	mov rax,__float80m__(-1.0)
+	mov ax,__float80e__(-1.0)
+	mov rax,__float80m__(0.0)
+	mov ax,__float80e__(0.0)
+	mov rax,__float80m__(+0.0)
+	mov ax,__float80e__(+0.0)
+	mov rax,__float80m__(-0.0)
+	mov ax,__float80e__(-0.0)
+	mov rax,__float80m__(1.83203125)
+	mov ax,__float80e__(1.83203125)
+	mov rax,__float80m__(+1.83203125)
+	mov ax,__float80e__(+1.83203125)
+	mov rax,__float80m__(-1.83203125)
+	mov ax,__float80e__(-1.83203125)
+	mov rax,__float80m__(1.83203125e+4000)
+	mov ax,__float80e__(1.83203125e+4000)
+	mov rax,__float80m__(+1.83203125e+4000)
+	mov ax,__float80e__(+1.83203125e+4000)
+	mov rax,__float80m__(-1.83203125e+4000)
+	mov ax,__float80e__(-1.83203125e+4000)
+	mov rax,__float80m__(1.83203125e-4000)
+	mov ax,__float80e__(1.83203125e-4000)
+	mov rax,__float80m__(+1.83203125e-4000)
+	mov ax,__float80e__(+1.83203125e-4000)
+	mov rax,__float80m__(-1.83203125e-4000)
+	mov ax,__float80e__(-1.83203125e-4000)
+	mov rax,__float80m__(1.83203125e-4940)		; Denormal!
+	mov ax,__float80e__(1.83203125e-4940)		; Denormal!
+	mov rax,__float80m__(+1.83203125e-4940)		; Denormal!
+	mov ax,__float80e__(+1.83203125e-4940)		; Denormal!
+	mov rax,__float80m__(-1.83203125e-4940)		; Denormal!
+	mov ax,__float80e__(-1.83203125e-4940)		; Denormal!
+	mov rax,__float80m__(__Infinity__)
+	mov ax,__float80e__(__Infinity__)
+	mov rax,__float80m__(+__Infinity__)
+	mov ax,__float80e__(+__Infinity__)
+	mov rax,__float80m__(-__Infinity__)
+	mov ax,__float80e__(-__Infinity__)
+	mov rax,__float80m__(__NaN__)
+	mov ax,__float80e__(__NaN__)
+	mov rax,__float80m__(__QNaN__)
+	mov ax,__float80e__(__QNaN__)
+	mov rax,__float80m__(__SNaN__)
+	mov ax,__float80e__(__SNaN__)
+
+; 128-bit
+	mov rax,__float128l__(1.0)
+	mov rax,__float128h__(1.0)
+	mov rax,__float128l__(+1.0)
+	mov rax,__float128h__(+1.0)
+	mov rax,__float128l__(-1.0)
+	mov rax,__float128h__(-1.0)
+	mov rax,__float128l__(0.0)
+	mov rax,__float128h__(0.0)
+	mov rax,__float128l__(+0.0)
+	mov rax,__float128h__(+0.0)
+	mov rax,__float128l__(-0.0)
+	mov rax,__float128h__(-0.0)
+	mov rax,__float128l__(1.83203125)
+	mov rax,__float128h__(1.83203125)
+	mov rax,__float128l__(+1.83203125)
+	mov rax,__float128h__(+1.83203125)
+	mov rax,__float128l__(-1.83203125)
+	mov rax,__float128h__(-1.83203125)
+	mov rax,__float128l__(1.83203125e+4000)
+	mov rax,__float128h__(1.83203125e+4000)
+	mov rax,__float128l__(+1.83203125e+4000)
+	mov rax,__float128h__(+1.83203125e+4000)
+	mov rax,__float128l__(-1.83203125e+4000)
+	mov rax,__float128h__(-1.83203125e+4000)
+	mov rax,__float128l__(1.83203125e-4000)
+	mov rax,__float128h__(1.83203125e-4000)
+	mov rax,__float128l__(+1.83203125e-4000)
+	mov rax,__float128h__(+1.83203125e-4000)
+	mov rax,__float128l__(-1.83203125e-4000)
+	mov rax,__float128h__(-1.83203125e-4000)
+	mov rax,__float128l__(1.83203125e-4940)		; Denormal!
+	mov rax,__float128h__(1.83203125e-4940)		; Denormal!
+	mov rax,__float128l__(+1.83203125e-4940)		; Denormal!
+	mov rax,__float128h__(+1.83203125e-4940)		; Denormal!
+	mov rax,__float128l__(-1.83203125e-4940)		; Denormal!
+	mov rax,__float128h__(-1.83203125e-4940)		; Denormal!
+	mov rax,__float128l__(__Infinity__)
+	mov rax,__float128h__(__Infinity__)
+	mov rax,__float128l__(+__Infinity__)
+	mov rax,__float128h__(+__Infinity__)
+	mov rax,__float128l__(-__Infinity__)
+	mov rax,__float128h__(-__Infinity__)
+	mov rax,__float128l__(__NaN__)
+	mov rax,__float128h__(__NaN__)
+	mov rax,__float128l__(__QNaN__)
+	mov rax,__float128h__(__QNaN__)
+	mov rax,__float128l__(__SNaN__)
+	mov rax,__float128h__(__SNaN__)
+
+;
+; Test hexadecimal floating-point numbers
+;
+
+; 16-bit
+	mov ax,__float16__(1.0)
+	mov ax,__float16__(0x1.0)
+	mov ax,__float16__(2.0)
+	mov ax,__float16__(0x2.0)
+	mov ax,__float16__(0x1.0p+1)
+	mov ax,__float16__(0x1.0p-1)
+	mov ax,__float16__(0x0.0)
+	mov ax,__float16__(0x1.23456789)
+	mov ax,__float16__(0x0.123456789)
+	mov ax,__float16__(0x0.0000123456789)
+	mov ax,__float16__(0x1.23456789p10)
+	mov ax,__float16__(0x1.23456789p+10)
+	mov ax,__float16__(0x1.23456789p-10)
+	mov ax,__float16__(0x0.123456789p10)
+	mov ax,__float16__(0x0.123456789p+10)
+	mov ax,__float16__(0x0.123456789abcdef0123456789abcdef012345p-10)
+	mov ax,__float16__(0x0.0000123456789)
+	mov ax,__float16__(0x0.0000123456789p+10)
+	mov ax,__float16__(0x0.0000123456789p-10)
+
+; 32-bit
+	mov eax,__float32__(1.0)
+	mov eax,__float32__(0x1.0)
+	mov eax,__float32__(2.0)
+	mov eax,__float32__(0x2.0)
+	mov eax,__float32__(0x1.0p+1)
+	mov eax,__float32__(0x1.0p-1)
+	mov eax,__float32__(0x0.0)
+	mov eax,__float32__(0x1.23456789)
+	mov eax,__float32__(0x0.123456789)
+	mov eax,__float32__(0x0.0000123456789)
+	mov eax,__float32__(0x1.23456789p10)
+	mov eax,__float32__(0x1.23456789p+10)
+	mov eax,__float32__(0x1.23456789p-10)
+	mov eax,__float32__(0x0.123456789p10)
+	mov eax,__float32__(0x0.123456789p+10)
+	mov eax,__float32__(0x0.123456789abcdef0123456789abcdef012345p-10)
+	mov eax,__float32__(0x0.0000123456789)
+	mov eax,__float32__(0x0.0000123456789p+10)
+	mov eax,__float32__(0x0.0000123456789p-10)
+	mov eax,__float32__(0x123456789.0)
+	mov eax,__float32__(0x0000123456789.0)
+	mov eax,__float32__(0x123456789.0p+0)
+	mov eax,__float32__(0x123456789.0p+64)
+
+; 64-bit
+	mov rax,__float64__(1.0)
+	mov rax,__float64__(0x1.0)
+	mov rax,__float64__(2.0)
+	mov rax,__float64__(0x2.0)
+	mov rax,__float64__(0x1.0p+1)
+	mov rax,__float64__(0x1.0p-1)
+	mov rax,__float64__(0x0.0)
+	mov rax,__float64__(0x1.23456789)
+	mov rax,__float64__(0x0.123456789)
+	mov rax,__float64__(0x0.0000123456789)
+	mov rax,__float64__(0x1.23456789p10)
+	mov rax,__float64__(0x1.23456789p+10)
+	mov rax,__float64__(0x1.23456789p-10)
+	mov rax,__float64__(0x0.123456789p10)
+	mov rax,__float64__(0x0.123456789p+10)
+	mov rax,__float64__(0x0.123456789abcdef0123456789abcdef012345p-10)
+	mov rax,__float64__(0x0.0000123456789)
+	mov rax,__float64__(0x0.0000123456789p+10)
+	mov rax,__float64__(0x0.0000123456789p-10)
+	mov rax,__float64__(0x123456789.0)
+	mov rax,__float64__(0x0000123456789.0)
+	mov rax,__float64__(0x123456789.0p+0)
+	mov rax,__float64__(0x123456789.0p+300)
+
+; 80-bit
+	mov rax,__float80m__(1.0)
+	mov ax,__float80e__(1.0)
+	mov rax,__float80m__(0x1.0)
+	mov ax,__float80e__(0x1.0)
+	mov rax,__float80m__(2.0)
+	mov ax,__float80e__(2.0)
+	mov rax,__float80m__(0x2.0)
+	mov ax,__float80e__(0x2.0)
+	mov rax,__float80m__(0x1.0p+1)
+	mov ax,__float80e__(0x1.0p+1)
+	mov rax,__float80m__(0x1.0p-1)
+	mov ax,__float80e__(0x1.0p-1)
+	mov rax,__float80m__(0x0.0)
+	mov ax,__float80e__(0x0.0)
+	mov rax,__float80m__(0x1.23456789)
+	mov ax,__float80e__(0x1.23456789)
+	mov rax,__float80m__(0x0.123456789)
+	mov ax,__float80e__(0x0.123456789)
+	mov rax,__float80m__(0x0.0000123456789)
+	mov ax,__float80e__(0x0.0000123456789)
+	mov rax,__float80m__(0x1.23456789p10)
+	mov ax,__float80e__(0x1.23456789p10)
+	mov rax,__float80m__(0x1.23456789p+10)
+	mov ax,__float80e__(0x1.23456789p+10)
+	mov rax,__float80m__(0x1.23456789p-10)
+	mov ax,__float80e__(0x1.23456789p-10)
+	mov rax,__float80m__(0x0.123456789p10)
+	mov ax,__float80e__(0x0.123456789p10)
+	mov rax,__float80m__(0x0.123456789p+10)
+	mov ax,__float80e__(0x0.123456789p+10)
+	mov rax,__float80m__(0x0.123456789abcdef0123456789abcdef012345p-10)
+	mov ax,__float80e__(0x0.123456789abcdef0123456789abcdef012345p-10)
+	mov rax,__float80m__(0x0.0000123456789)
+	mov ax,__float80e__(0x0.0000123456789)
+	mov rax,__float80m__(0x0.0000123456789p+10)
+	mov ax,__float80e__(0x0.0000123456789p+10)
+	mov rax,__float80m__(0x0.0000123456789p-10)
+	mov ax,__float80e__(0x0.0000123456789p-10)
+	mov rax,__float80m__(0x123456789.0)
+	mov ax,__float80e__(0x123456789.0)
+	mov rax,__float80m__(0x0000123456789.0)
+	mov ax,__float80e__(0x0000123456789.0)
+	mov rax,__float80m__(0x123456789.0p+0)
+	mov ax,__float80e__(0x123456789.0p+0)
+	mov rax,__float80m__(0x123456789.0p+1024)
+	mov ax,__float80e__(0x123456789.0p+1024)
+
+; 128-bit
+	mov rax,__float128l__(1.0)
+	mov rax,__float128h__(1.0)
+	mov rax,__float128l__(0x1.0)
+	mov rax,__float128h__(0x1.0)
+	mov rax,__float128l__(2.0)
+	mov rax,__float128h__(2.0)
+	mov rax,__float128l__(0x2.0)
+	mov rax,__float128h__(0x2.0)
+	mov rax,__float128l__(0x1.0p+1)
+	mov rax,__float128h__(0x1.0p+1)
+	mov rax,__float128l__(0x1.0p-1)
+	mov rax,__float128h__(0x1.0p-1)
+	mov rax,__float128l__(0x0.0)
+	mov rax,__float128h__(0x0.0)
+	mov rax,__float128l__(0x1.23456789)
+	mov rax,__float128h__(0x1.23456789)
+	mov rax,__float128l__(0x0.123456789)
+	mov rax,__float128h__(0x0.123456789)
+	mov rax,__float128l__(0x0.0000123456789)
+	mov rax,__float128h__(0x0.0000123456789)
+	mov rax,__float128l__(0x1.23456789p10)
+	mov rax,__float128h__(0x1.23456789p10)
+	mov rax,__float128l__(0x1.23456789p+10)
+	mov rax,__float128h__(0x1.23456789p+10)
+	mov rax,__float128l__(0x1.23456789p-10)
+	mov rax,__float128h__(0x1.23456789p-10)
+	mov rax,__float128l__(0x0.123456789p10)
+	mov rax,__float128h__(0x0.123456789p10)
+	mov rax,__float128l__(0x0.123456789p+10)
+	mov rax,__float128h__(0x0.123456789p+10)
+	mov rax,__float128l__(0x0.123456789abcdef0123456789abcdef012345p-10)
+	mov rax,__float128h__(0x0.123456789abcdef0123456789abcdef012345p-10)
+	mov rax,__float128l__(0x0.0000123456789)
+	mov rax,__float128h__(0x0.0000123456789)
+	mov rax,__float128l__(0x0.0000123456789p+10)
+	mov rax,__float128h__(0x0.0000123456789p+10)
+	mov rax,__float128l__(0x0.0000123456789p-10)
+	mov rax,__float128h__(0x0.0000123456789p-10)
+	mov rax,__float128l__(0x123456789.0)
+	mov rax,__float128h__(0x123456789.0)
+	mov rax,__float128l__(0x0000123456789.0)
+	mov rax,__float128h__(0x0000123456789.0)
+	mov rax,__float128l__(0x123456789.0p+0)
+	mov rax,__float128h__(0x123456789.0p+0)
+	mov rax,__float128l__(0x123456789.0p+1024)
+	mov rax,__float128h__(0x123456789.0p+1024)

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/floatexp.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/floatize.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/floatize.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/floatize.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/floattest.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/floattest.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/floattest.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/floatx.asm Added

@@ -0,0 +1,525 @@
+;
+; floatx.asm
+;
+; Test hexadecimal floating-point numbers
+
+%define Inf __Infinity__
+%define NaN __QNaN__
+
+; 16-bit
+	dw 1.0
+	dw 0x1.0
+	dw 2.0
+	dw 0x2.0
+	dw 0x1.0p+1
+	dw 0x1.0p-1
+	dw 0x0.0
+	dw 0x1.23456789
+	dw 0x0.123456789
+	dw 0x0.0000123456789
+	dw 0x1.23456789p10
+	dw 0x1.23456789p+10
+	dw 0x1.23456789p-10
+	dw 0x0.123456789p10
+	dw 0x0.123456789p+10
+	dw 0x0.123456789abcdef0123456789abcdef012345p-10
+	dw 0x0.0000123456789
+	dw 0x0.0000123456789p+10
+	dw 0x0.0000123456789p-10
+	dw 0x1.0p-25		; Underflow
+	dw 0x1.01p-25		; Rounds to denorm
+	dw 0x1.0p-24		; Smallest denorm
+	dw 0x1.ffffffffffffffffffffffffffffp-16	; Rounds to denorm
+	dw 0x1.0p-15		; Denorm
+	dw 0x1.ffffffffffffffffffffffffffffp-15	; Rounds to normal
+	dw 0x1.0p-14		; Smallest non-denorm
+	dw 0x1.0p+15		; Biggest possible exponent
+	dw 0x1.ffffffffffffffffffffffffffffp+15	; Rounds to infinity
+	dw Inf			; Infinity
+	dw NaN
+
+; 32-bit
+	dd 1.0
+	dd 0x1.0
+	dd 2.0
+	dd 0x2.0
+	dd 0x1.0p+1
+	dd 0x1.0p-1
+	dd 0x0.0
+	dd 0x1.23456789
+	dd 0x0.123456789
+	dd 0x0.0000123456789
+	dd 0x1.23456789p10
+	dd 0x1.23456789p+10
+	dd 0x1.23456789p-10
+	dd 0x0.123456789p10
+	dd 0x0.123456789p+10
+	dd 0x0.123456789abcdef0123456789abcdef012345p-10
+	dd 0x0.0000123456789
+	dd 0x0.0000123456789p+10
+	dd 0x0.0000123456789p-10
+	dd 0x123456789.0
+	dd 0x0000123456789.0
+	dd 0x123456789.0p+0
+	dd 0x123456789.0p+64
+	dd 0x1.0p-150		; Underflow
+	dd 0x1.01p-150		; Rounds to denorm
+	dd 0x1.0p-149		; Smallest denorm
+	dd 0x1.ffffffffffffffffffffffffffffp-128	; Rounds to denorm
+	dd 0x1.0p-127		; Denorm
+	dd 0x1.ffffffffffffffffffffffffffffp-127	; Rounds to normal
+	dd 0x1.0p-126		; Smallest non-denorm
+	dd 0x1.0p+127		; Biggest possible exponent
+	dd 0x1.ffffffffffffffffffffffffffffp+127	; Rounds to infinity
+	dd Inf			; Infinity
+	dd NaN
+
+; 64-bit
+	dq 1.0
+	dq 0x1.0
+	dq 2.0
+	dq 0x2.0
+	dq 0x1.0p+1
+	dq 0x1.0p-1
+	dq 0x0.0
+	dq 0x1.23456789
+	dq 0x0.123456789
+	dq 0x0.0000123456789
+	dq 0x1.23456789p10
+	dq 0x1.23456789p+10
+	dq 0x1.23456789p-10
+	dq 0x0.123456789p10
+	dq 0x0.123456789p+10
+	dq 0x0.123456789abcdef0123456789abcdef012345p-10
+	dq 0x0.0000123456789
+	dq 0x0.0000123456789p+10
+	dq 0x0.0000123456789p-10
+	dq 0x123456789.0
+	dq 0x0000123456789.0
+	dq 0x123456789.0p+0
+	dq 0x123456789.0p+300
+	dq 0x1.0p-1075		; Underflow
+	dq 0x1.01p-1075		; Rounds to denorm
+	dq 0x1.0p-1074		; Smallest denorm
+	dq 0x1.ffffffffffffffffffffffffffffp-1024	; Rounds to denorm
+	dq 0x1.0p-1023		; Denorm
+	dq 0x1.ffffffffffffffffffffffffffffp-1023	; Rounds to normal
+	dq 0x1.0p-1022		; Smallest non-denorm
+	dq 0x1.0p+1023		; Biggest possible exponent
+	dq 0x1.ffffffffffffffffffffffffffffp+1023	; Rounds to infinity
+	dq Inf			; Infinity
+	dq NaN
+
+; 80-bit
+	dt 1.0
+	dt 0x1.0
+	dt 2.0
+	dt 0x2.0
+	dt 0x1.0p+1
+	dt 0x1.0p-1
+	dt 0x0.0
+	dt 0x1.23456789
+	dt 0x0.123456789
+	dt 0x0.0000123456789
+	dt 0x1.23456789p10
+	dt 0x1.23456789p+10
+	dt 0x1.23456789p-10
+	dt 0x0.123456789p10
+	dt 0x0.123456789p+10
+	dt 0x0.123456789abcdef0123456789abcdef012345p-10
+	dt 0x0.0000123456789
+	dt 0x0.0000123456789p+10
+	dt 0x0.0000123456789p-10
+	dt 0x123456789.0
+	dt 0x0000123456789.0
+	dt 0x123456789.0p+0
+	dt 0x123456789.0p+1024
+	dt 0x1.0p-16446		; Underflow
+	dt 0x1.01p-16446	; Rounds to denorm
+	dt 0x1.0p-16445		; Smallest denorm
+	dt 0x1.ffffffffffffffffffffffffffffp-16384	; Rounds to denorm
+	dt 0x1.0p-16383		; Denorm
+	dt 0x1.ffffffffffffffffffffffffffffp-16383	; Rounds to normal
+	dt 0x1.0p-16382		; Smallest non-denorm
+	dt 0x1.0p+16383		; Biggest possible exponent
+	dt 0x1.ffffffffffffffffffffffffffffp+16383	; Rounds to infinity
+	dt Inf			; Infinity
+	dt NaN
+
+; 128-bit
+	do 1.0
+	do 0x1.0
+	do 2.0
+	do 0x2.0
+	do 0x1.0p+1
+	do 0x1.0p-1
+	do 0x0.0
+	do 0x1.23456789
+	do 0x0.123456789
+	do 0x0.0000123456789
+	do 0x1.23456789p10
+	do 0x1.23456789p+10
+	do 0x1.23456789p-10
+	do 0x0.123456789p10
+	do 0x0.123456789p+10
+	do 0x0.123456789abcdef0123456789abcdef012345p-10
+	do 0x0.0000123456789
+	do 0x0.0000123456789p+10
+	do 0x0.0000123456789p-10
+	do 0x123456789.0
+	do 0x0000123456789.0
+	do 0x123456789.0p+0
+	do 0x123456789.0p+1024
+	do 0x1.0p-16495		; Underflow
+	do 0x1.01p-16495	; Rounds to denorm
+	do 0x1.0p-16494		; Smallest denorm
+	do 0x1.ffffffffffffffffffffffffffffffffp-16384	; Rounds to denorm
+	do 0x1.0p-16383		; Denorm
+	do 0x1.ffffffffffffffffffffffffffffffffp-16383	; Rounds to normal
+	do 0x1.0p-16382		; Smallest non-denorm
+	do 0x1.0p+16383		; Biggest possible exponent
+	do 0x1.ffffffffffffffffffffffffffffffffp+16383	; Rounds to infinity
+	do Inf			; Infinity
+	do NaN
+
+; 16-bit
+	dw 1.0
+	dw 0h1.0
+	dw 2.0
+	dw 0h2.0
+	dw 0h1.0p+1
+	dw 0h1.0p-1
+	dw 0h0.0
+	dw 0h1.23456789
+	dw 0h0.123456789
+	dw 0h0.0000123456789
+	dw 0h1.23456789p10
+	dw 0h1.23456789p+10
+	dw 0h1.23456789p-10
+	dw 0h0.123456789p10
+	dw 0h0.123456789p+10
+	dw 0h0.123456789abcdef0123456789abcdef012345p-10
+	dw 0h0.0000123456789
+	dw 0h0.0000123456789p+10
+	dw 0h0.0000123456789p-10
+	dw 0h1.0p-25		; Underflow
+	dw 0h1.0p-24		; Smallest denorm
+	dw 0h1.ffffffffffffffffffffffffffffp-16	; Rounds to denorm
+	dw 0h1.0p-15		; Denorm
+	dw 0h1.ffffffffffffffffffffffffffffp-15	; Rounds to normal
+	dw 0h1.0p-14		; Smallest non-denorm
+	dw 0h1.0p+15		; Biggest possible exponent
+	dw 0h1.ffffffffffffffffffffffffffffp+15	; Rounds to infinity
+	dw Inf			; Infinity
+	dw NaN
+
+; 32-bit
+	dd 1.0
+	dd 0h1.0
+	dd 2.0
+	dd 0h2.0
+	dd 0h1.0p+1
+	dd 0h1.0p-1
+	dd 0h0.0
+	dd 0h1.23456789
+	dd 0h0.123456789
+	dd 0h0.0000123456789
+	dd 0h1.23456789p10
+	dd 0h1.23456789p+10
+	dd 0h1.23456789p-10
+	dd 0h0.123456789p10
+	dd 0h0.123456789p+10
+	dd 0h0.123456789abcdef0123456789abcdef012345p-10
+	dd 0h0.0000123456789
+	dd 0h0.0000123456789p+10
+	dd 0h0.0000123456789p-10
+	dd 0h123456789.0
+	dd 0h0000123456789.0
+	dd 0h123456789.0p+0
+	dd 0h123456789.0p+64
+	dd 0h1.0p-150		; Underflow
+	dd 0h1.0p-149		; Smallest denorm
+	dd 0h1.ffffffffffffffffffffffffffffp-128	; Rounds to denorm
+	dd 0h1.0p-127		; Denorm
+	dd 0h1.ffffffffffffffffffffffffffffp-127	; Rounds to normal
+	dd 0h1.0p-126		; Smallest non-denorm
+	dd 0h1.0p+127		; Biggest possible exponent
+	dd 0h1.ffffffffffffffffffffffffffffp+127	; Rounds to infinity
+	dd Inf			; Infinity
+	dd NaN
+
+; 64-bit
+	dq 1.0
+	dq 0h1.0
+	dq 2.0
+	dq 0h2.0
+	dq 0h1.0p+1
+	dq 0h1.0p-1
+	dq 0h0.0
+	dq 0h1.23456789
+	dq 0h0.123456789
+	dq 0h0.0000123456789
+	dq 0h1.23456789p10
+	dq 0h1.23456789p+10
+	dq 0h1.23456789p-10
+	dq 0h0.123456789p10
+	dq 0h0.123456789p+10
+	dq 0h0.123456789abcdef0123456789abcdef012345p-10
+	dq 0h0.0000123456789
+	dq 0h0.0000123456789p+10
+	dq 0h0.0000123456789p-10
+	dq 0h123456789.0
+	dq 0h0000123456789.0
+	dq 0h123456789.0p+0
+	dq 0h123456789.0p+300
+	dq 0h1.0p-1075		; Underflow
+	dq 0h1.0p-1074		; Smallest denorm
+	dq 0h1.ffffffffffffffffffffffffffffp-1024	; Rounds to denorm
+	dq 0h1.0p-1023		; Denorm
+	dq 0h1.ffffffffffffffffffffffffffffp-1023	; Rounds to normal
+	dq 0h1.0p-1022		; Smallest non-denorm
+	dq 0h1.0p+1023		; Biggest possible exponent
+	dq 0h1.ffffffffffffffffffffffffffffp+1023	; Rounds to infinity
+	dq Inf			; Infinity
+	dq NaN
+
+; 80-bit
+	dt 1.0
+	dt 0h1.0
+	dt 2.0
+	dt 0h2.0
+	dt 0h1.0p+1
+	dt 0h1.0p-1
+	dt 0h0.0
+	dt 0h1.23456789
+	dt 0h0.123456789
+	dt 0h0.0000123456789
+	dt 0h1.23456789p10
+	dt 0h1.23456789p+10
+	dt 0h1.23456789p-10
+	dt 0h0.123456789p10
+	dt 0h0.123456789p+10
+	dt 0h0.123456789abcdef0123456789abcdef012345p-10
+	dt 0h0.0000123456789
+	dt 0h0.0000123456789p+10
+	dt 0h0.0000123456789p-10
+	dt 0h123456789.0
+	dt 0h0000123456789.0
+	dt 0h123456789.0p+0
+	dt 0h123456789.0p+1024
+	dt 0h1.0p-16446		; Underflow
+	dt 0h1.0p-16445		; Smallest denorm
+	dt 0h1.ffffffffffffffffffffffffffffp-16384	; Rounds to denorm
+	dt 0h1.0p-16383		; Denorm
+	dt 0h1.ffffffffffffffffffffffffffffp-16383	; Rounds to normal
+	dt 0h1.0p-16382		; Smallest non-denorm
+	dt 0h1.0p+16383		; Biggest possible exponent
+	dt 0h1.ffffffffffffffffffffffffffffp+16383	; Rounds to infinity
+	dt Inf			; Infinity
+	dt NaN
+
+; 128-bit
+	do 1.0
+	do 0h1.0
+	do 2.0
+	do 0h2.0
+	do 0h1.0p+1
+	do 0h1.0p-1
+	do 0h0.0
+	do 0h1.23456789
+	do 0h0.123456789
+	do 0h0.0000123456789
+	do 0h1.23456789p10
+	do 0h1.23456789p+10
+	do 0h1.23456789p-10
+	do 0h0.123456789p10
+	do 0h0.123456789p+10
+	do 0h0.123456789abcdef0123456789abcdef012345p-10
+	do 0h0.0000123456789
+	do 0h0.0000123456789p+10
+	do 0h0.0000123456789p-10
+	do 0h123456789.0
+	do 0h0000123456789.0
+	do 0h123456789.0p+0
+	do 0h123456789.0p+1024
+	do 0h1.0p-16495		; Underflow
+	do 0h1.0p-16494		; Smallest denorm
+	do 0h1.ffffffffffffffffffffffffffffffffp-16384	; Rounds to denorm
+	do 0h1.0p-16383		; Denorm
+	do 0h1.ffffffffffffffffffffffffffffffffp-16383	; Rounds to normal
+	do 0h1.0p-16382		; Smallest non-denorm
+	do 0h1.0p+16383		; Biggest possible exponent
+	do 0h1.ffffffffffffffffffffffffffffffffp+16383	; Rounds to infinity
+	do Inf			; Infinity
+	do NaN
+
+; 16-bit
+	dw 1.0
+	dw $1.0
+	dw 2.0
+	dw $2.0
+	dw $1.0p+1
+	dw $1.0p-1
+	dw $0.0
+	dw $1.23456789
+	dw $0.123456789
+	dw $0.0000123456789
+	dw $1.23456789p10
+	dw $1.23456789p+10
+	dw $1.23456789p-10
+	dw $0.123456789p10
+	dw $0.123456789p+10
+	dw $0.123456789abcdef0123456789abcdef012345p-10
+	dw $0.0000123456789
+	dw $0.0000123456789p+10
+	dw $0.0000123456789p-10
+	dw $1.0p-25		; Underflow
+	dw $1.0p-24		; Smallest denorm
+	dw $1.ffffffffffffffffffffffffffffp-16	; Rounds to denorm
+	dw $1.0p-15		; Denorm
+	dw $1.ffffffffffffffffffffffffffffp-15	; Rounds to normal
+	dw $1.0p-14		; Smallest non-denorm
+	dw $1.0p+15		; Biggest possible exponent
+	dw $1.ffffffffffffffffffffffffffffp+15	; Rounds to infinity
+	dw Inf			; Infinity
+	dw NaN
+
+; 32-bit
+	dd 1.0
+	dd $1.0
+	dd 2.0
+	dd $2.0
+	dd $1.0p+1
+	dd $1.0p-1
+	dd $0.0
+	dd $1.23456789
+	dd $0.123456789
+	dd $0.0000123456789
+	dd $1.23456789p10
+	dd $1.23456789p+10
+	dd $1.23456789p-10
+	dd $0.123456789p10
+	dd $0.123456789p+10
+	dd $0.123456789abcdef0123456789abcdef012345p-10
+	dd $0.0000123456789
+	dd $0.0000123456789p+10
+	dd $0.0000123456789p-10
+	dd $123456789.0
+	dd $0000123456789.0
+	dd $123456789.0p+0
+	dd $123456789.0p+64
+	dd $1.0p-150		; Underflow
+	dd $1.0p-149		; Smallest denorm
+	dd $1.ffffffffffffffffffffffffffffp-128	; Rounds to denorm
+	dd $1.0p-127		; Denorm
+	dd $1.ffffffffffffffffffffffffffffp-127	; Rounds to normal
+	dd $1.0p-126		; Smallest non-denorm
+	dd $1.0p+127		; Biggest possible exponent
+	dd $1.ffffffffffffffffffffffffffffp+127	; Rounds to infinity
+	dd Inf			; Infinity
+	dd NaN
+
+; 64-bit
+	dq 1.0
+	dq $1.0
+	dq 2.0
+	dq $2.0
+	dq $1.0p+1
+	dq $1.0p-1
+	dq $0.0
+	dq $1.23456789
+	dq $0.123456789
+	dq $0.0000123456789
+	dq $1.23456789p10
+	dq $1.23456789p+10
+	dq $1.23456789p-10
+	dq $0.123456789p10
+	dq $0.123456789p+10
+	dq $0.123456789abcdef0123456789abcdef012345p-10
+	dq $0.0000123456789
+	dq $0.0000123456789p+10
+	dq $0.0000123456789p-10
+	dq $123456789.0
+	dq $0000123456789.0
+	dq $123456789.0p+0
+	dq $123456789.0p+300
+	dq $1.0p-1075		; Underflow
+	dq $1.0p-1074		; Smallest denorm
+	dq $1.ffffffffffffffffffffffffffffp-1024	; Rounds to denorm
+	dq $1.0p-1023		; Denorm
+	dq $1.ffffffffffffffffffffffffffffp-1023	; Rounds to normal
+	dq $1.0p-1022		; Smallest non-denorm
+	dq $1.0p+1023		; Biggest possible exponent
+	dq $1.ffffffffffffffffffffffffffffp+1023	; Rounds to infinity
+	dq Inf			; Infinity
+	dq NaN
+
+; 80-bit
+	dt 1.0
+	dt $1.0
+	dt 2.0
+	dt $2.0
+	dt $1.0p+1
+	dt $1.0p-1
+	dt $0.0
+	dt $1.23456789
+	dt $0.123456789
+	dt $0.0000123456789
+	dt $1.23456789p10
+	dt $1.23456789p+10
+	dt $1.23456789p-10
+	dt $0.123456789p10
+	dt $0.123456789p+10
+	dt $0.123456789abcdef0123456789abcdef012345p-10
+	dt $0.0000123456789
+	dt $0.0000123456789p+10
+	dt $0.0000123456789p-10
+	dt $123456789.0
+	dt $0000123456789.0
+	dt $123456789.0p+0
+	dt $123456789.0p+1024
+	dt $1.0p-16446		; Underflow
+	dt $1.0p-16445		; Smallest denorm
+	dt $1.ffffffffffffffffffffffffffffp-16384	; Rounds to denorm
+	dt $1.0p-16383		; Denorm
+	dt $1.ffffffffffffffffffffffffffffp-16383	; Rounds to normal
+	dt $1.0p-16382		; Smallest non-denorm
+	dt $1.0p+16383		; Biggest possible exponent
+	dt $1.ffffffffffffffffffffffffffffp+16383	; Rounds to infinity
+	dt Inf			; Infinity
+	dt NaN
+
+; 128-bit
+	do 1.0
+	do $1.0
+	do 2.0
+	do $2.0
+	do $1.0p+1
+	do $1.0p-1
+	do $0.0
+	do $1.23456789
+	do $0.123456789
+	do $0.0000123456789
+	do $1.23456789p10
+	do $1.23456789p+10
+	do $1.23456789p-10
+	do $0.123456789p10
+	do $0.123456789p+10
+	do $0.123456789abcdef0123456789abcdef012345p-10
+	do $0.0000123456789
+	do $0.0000123456789p+10
+	do $0.0000123456789p-10
+	do $123456789.0
+	do $0000123456789.0
+	do $123456789.0p+0
+	do $123456789.0p+1024
+	do $1.0p-16495		; Underflow
+	do $1.0p-16494		; Smallest denorm
+	do $1.ffffffffffffffffffffffffffffffffp-16384	; Rounds to denorm
+	do $1.0p-16383		; Denorm
+	do $1.ffffffffffffffffffffffffffffffffp-16383	; Rounds to normal
+	do $1.0p-16382		; Smallest non-denorm
+	do $1.0p+16383		; Biggest possible exponent
+	do $1.ffffffffffffffffffffffffffffffffp+16383	; Rounds to infinity
+	do Inf			; Infinity
+	do NaN

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/floatx.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/floatx.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/floatx.stderr Added

@@ -0,0 +1,15 @@
+./travis/test/floatx.asm:37: warning: overflow in floating-point constant -w+float-overflow
+./travis/test/floatx.asm:73: warning: overflow in floating-point constant -w+float-overflow
+./travis/test/floatx.asm:109: warning: overflow in floating-point constant -w+float-overflow
+./travis/test/floatx.asm:145: warning: overflow in floating-point constant -w+float-overflow
+./travis/test/floatx.asm:181: warning: overflow in floating-point constant -w+float-overflow
+./travis/test/floatx.asm:212: warning: overflow in floating-point constant -w+float-overflow
+./travis/test/floatx.asm:247: warning: overflow in floating-point constant -w+float-overflow
+./travis/test/floatx.asm:282: warning: overflow in floating-point constant -w+float-overflow
+./travis/test/floatx.asm:317: warning: overflow in floating-point constant -w+float-overflow
+./travis/test/floatx.asm:352: warning: overflow in floating-point constant -w+float-overflow
+./travis/test/floatx.asm:383: warning: overflow in floating-point constant -w+float-overflow
+./travis/test/floatx.asm:418: warning: overflow in floating-point constant -w+float-overflow
+./travis/test/floatx.asm:453: warning: overflow in floating-point constant -w+float-overflow
+./travis/test/floatx.asm:488: warning: overflow in floating-point constant -w+float-overflow
+./travis/test/floatx.asm:523: warning: overflow in floating-point constant -w+float-overflow

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/fpu.asm Added

@@ -0,0 +1,125 @@
+; relaxed encodings for FPU instructions, which NASM should support
+; -----------------------------------------------------------------
+
+%define void
+%define reg_fpu0 st0
+%define reg_fpu st1
+
+; no operands instead of one operand:
+
+  ; F(U)COM(P), FCOM2, FCOMP3, FCOMP5
+
+    FCOM            void
+    FCOMP           void
+    FUCOM           void
+    FUCOMP          void
+;    FCOM2           void
+;    FCOMP3          void
+;    FCOMP5          void
+
+  ; FLD, FST, FSTP, FSTP1, FSTP8, FSTP9
+
+    FLD             void
+    FST             void
+    FSTP            void
+;    FSTP1           void
+;    FSTP8           void
+;    FSTP9           void
+
+  ; FXCH, FXCH4, FXCH7, FFREE, FFREEP
+
+    FXCH            void
+;    FXCH4           void
+;    FXCH7           void
+    FFREE           void
+    FFREEP          void
+
+; no operands instead of two operands:
+
+  ; FADD(P), FMUL(P), FSUBR(P), FSUB(P), FDIVR(P), FDIV(P)
+
+    FADD            void
+    FADDP           void
+    FMUL            void
+    FMULP           void
+    FSUBR           void
+    FSUBRP          void
+    FSUB            void
+    FSUBP           void
+    FDIVR           void
+    FDIVRP          void
+    FDIV            void
+    FDIVP           void
+
+; one operand instead of two operands:
+
+  ; FADD, FMUL, FSUB, FSUBR, FDIV, FDIVR
+
+    FADD            reg_fpu
+    FMUL            reg_fpu
+    FSUB            reg_fpu
+    FSUBR           reg_fpu
+    FDIV            reg_fpu
+    FDIVR           reg_fpu
+
+  ; FADD, FMUL, FSUBR, FSUB, FDIVR, FDIV (with TO qualifier)
+
+    FADD            to reg_fpu
+    FMUL            to reg_fpu
+    FSUBR           to reg_fpu
+    FSUB            to reg_fpu
+    FDIVR           to reg_fpu
+    FDIV            to reg_fpu
+
+  ; FADDP, FMULP, FSUBRP, FSUBP, FDIVRP, FDIVP
+
+    FADDP           reg_fpu
+    FMULP           reg_fpu
+    FSUBRP          reg_fpu
+    FSUBP           reg_fpu
+    FDIVRP          reg_fpu
+    FDIVP           reg_fpu
+
+  ; FCMOV(N)B, FCMOV(N)E, FCMOV(N)BE, FCMOV(N)U, and F(U)COMI(P)
+
+    FCMOVB          reg_fpu
+    FCMOVNB         reg_fpu
+    FCMOVE          reg_fpu
+    FCMOVNE         reg_fpu
+    FCMOVBE         reg_fpu
+    FCMOVNBE        reg_fpu
+    FCMOVU          reg_fpu
+    FCMOVNU         reg_fpu
+    FCOMI           reg_fpu
+    FCOMIP          reg_fpu
+    FUCOMI          reg_fpu
+    FUCOMIP         reg_fpu
+
+; two operands instead of one operand:
+
+  ; these don't really exist, and thus are _NOT_ supported:
+
+;   FCOM            reg_fpu,reg_fpu0
+;   FCOM            reg_fpu0,reg_fpu
+;   FUCOM           reg_fpu,reg_fpu0
+;   FUCOM           reg_fpu0,reg_fpu
+;   FCOMP           reg_fpu,reg_fpu0
+;   FCOMP           reg_fpu0,reg_fpu
+;   FUCOMP          reg_fpu,reg_fpu0
+;   FUCOMP          reg_fpu0,reg_fpu
+
+;   FCOM2           reg_fpu,reg_fpu0
+;   FCOM2           reg_fpu0,reg_fpu
+;   FCOMP3          reg_fpu,reg_fpu0
+;   FCOMP3          reg_fpu0,reg_fpu
+;   FCOMP5          reg_fpu,reg_fpu0
+;   FCOMP5          reg_fpu0,reg_fpu
+
+;   FXCH            reg_fpu,reg_fpu0
+;   FXCH            reg_fpu0,reg_fpu
+;   FXCH4           reg_fpu,reg_fpu0
+;   FXCH4           reg_fpu0,reg_fpu
+;   FXCH7           reg_fpu,reg_fpu0
+;   FXCH7           reg_fpu0,reg_fpu
+
+; EOF

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/fpu.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/fpu.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/fwdopt.asm Added

@@ -0,0 +1,132 @@
+n0:	jmp n1
+n1:	jmp n2
+n2:	jmp n3
+n3:	jmp n4
+n4:	jmp n5
+n5:	jmp n6
+n6:	jmp n7
+n7:	jmp n8
+n8:	jmp n9
+n9:	jmp n10
+n10:	jmp n11
+n11:	jmp n12
+n12:	jmp n13
+n13:	jmp n14
+n14:	jmp n15
+n15:	jmp n16
+n16:	jmp n17
+n17:	jmp n18
+n18:	jmp n19
+n19:	jmp n20
+n20:	jmp n21
+n21:	jmp n22
+n22:	jmp n23
+n23:	jmp n24
+n24:	jmp n25
+n25:	jmp n26
+n26:	jmp n27
+n27:	jmp n28
+n28:	jmp n29
+n29:	jmp n30
+n30:	jmp n31
+n31:	jmp n32
+n32:	jmp n33
+n33:	jmp n34
+n34:	jmp n35
+n35:	jmp n36
+n36:	jmp n37
+n37:	jmp n38
+n38:	jmp n39
+n39:	jmp n40
+n40:	jmp n41
+n41:	jmp n42
+n42:	jmp n43
+n43:	jmp n44
+n44:	jmp n45
+n45:	jmp n46
+n46:	jmp n47
+n47:	jmp n48
+n48:	jmp n49
+n49:	jmp n50
+n50:	jmp n51
+n51:	jmp n52
+n52:	jmp n53
+n53:	jmp n54
+n54:	jmp n55
+n55:	jmp n56
+n56:	jmp n57
+n57:	jmp n58
+n58:	jmp n59
+n59:	jmp n60
+n60:	jmp n61
+n61:	jmp n62
+n62:	jmp n63
+n63:	jmp n64
+n64:	jmp n65
+n65:	jmp n66
+n66:	jmp n67
+n67:	jmp n68
+n68:	jmp n69
+n69:	jmp n70
+n70:	jmp n71
+n71:	jmp n72
+n72:	jmp n73
+n73:	jmp n74
+n74:	jmp n75
+n75:	jmp n76
+n76:	jmp n77
+n77:	jmp n78
+n78:	jmp n79
+n79:	jmp n80
+n80:	jmp n81
+n81:	jmp n82
+n82:	jmp n83
+n83:	jmp n84
+n84:	jmp n85
+n85:	jmp n86
+n86:	jmp n87
+n87:	jmp n88
+n88:	jmp n89
+n89:	jmp n90
+n90:	jmp n91
+n91:	jmp n92
+n92:	jmp n93
+n93:	jmp n94
+n94:	jmp n95
+n95:	jmp n96
+n96:	jmp n97
+n97:	jmp n98
+n98:	jmp n99
+n99:	jmp n100
+n100:	jmp n101
+n101:	jmp n102
+n102:	jmp n103
+n103:	jmp n104
+n104:	jmp n105
+n105:	jmp n106
+n106:	jmp n107
+n107:	jmp n108
+n108:	jmp n109
+n109:	jmp n110
+n110:	jmp n111
+n111:	jmp n112
+n112:	jmp n113
+n113:	jmp n114
+n114:	jmp n115
+n115:	jmp n116
+n116:	jmp n117
+n117:	jmp n118
+n118:	jmp n119
+n119:	jmp n120
+n120:	jmp n121
+n121:	jmp n122
+n122:	jmp n123
+n123:	jmp n124
+n124:	jmp n125
+n125:	jmp n126
+n126:	jmp n127
+n127:	jmp n0
+
+	;;  This should emit exactly 3 NOP bytes
+	times 260-($-$$) nop
+	hlt

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/fwdopt.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/fwdopt.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/fwdoptpp.asm Added

@@ -0,0 +1,146 @@
+%ifndef ERROR
+  %ifndef FATAL
+    %ifndef WARNING
+      %define ERROR 1
+    %endif
+  %endif
+%endif
+
+n0:	jmp n1
+n1:	jmp n2
+n2:	jmp n3
+n3:	jmp n4
+n4:	jmp n5
+n5:	jmp n6
+n6:	jmp n7
+n7:	jmp n8
+n8:	jmp n9
+n9:	jmp n10
+n10:	jmp n11
+n11:	jmp n12
+n12:	jmp n13
+n13:	jmp n14
+n14:	jmp n15
+n15:	jmp n16
+n16:	jmp n17
+n17:	jmp n18
+n18:	jmp n19
+n19:	jmp n20
+n20:	jmp n21
+n21:	jmp n22
+n22:	jmp n23
+n23:	jmp n24
+n24:	jmp n25
+n25:	jmp n26
+n26:	jmp n27
+n27:	jmp n28
+n28:	jmp n29
+n29:	jmp n30
+n30:	jmp n31
+n31:	jmp n32
+n32:	jmp n33
+n33:	jmp n34
+n34:	jmp n35
+n35:	jmp n36
+n36:	jmp n37
+n37:	jmp n38
+n38:	jmp n39
+n39:	jmp n40
+n40:	jmp n41
+n41:	jmp n42
+n42:	jmp n43
+n43:	jmp n44
+n44:	jmp n45
+n45:	jmp n46
+n46:	jmp n47
+n47:	jmp n48
+n48:	jmp n49
+n49:	jmp n50
+n50:	jmp n51
+n51:	jmp n52
+n52:	jmp n53
+n53:	jmp n54
+n54:	jmp n55
+n55:	jmp n56
+n56:	jmp n57
+n57:	jmp n58
+n58:	jmp n59
+n59:	jmp n60
+n60:	jmp n61
+n61:	jmp n62
+n62:	jmp n63
+n63:	jmp n64
+n64:	jmp n65
+n65:	jmp n66
+n66:	jmp n67
+n67:	jmp n68
+n68:	jmp n69
+n69:	jmp n70
+n70:	jmp n71
+n71:	jmp n72
+n72:	jmp n73
+n73:	jmp n74
+n74:	jmp n75
+n75:	jmp n76
+n76:	jmp n77
+n77:	jmp n78
+n78:	jmp n79
+n79:	jmp n80
+n80:	jmp n81
+n81:	jmp n82
+n82:	jmp n83
+n83:	jmp n84
+n84:	jmp n85
+n85:	jmp n86
+n86:	jmp n87
+n87:	jmp n88
+n88:	jmp n89
+n89:	jmp n90
+n90:	jmp n91
+n91:	jmp n92
+n92:	jmp n93
+n93:	jmp n94
+n94:	jmp n95
+n95:	jmp n96
+n96:	jmp n97
+n97:	jmp n98
+n98:	jmp n99
+n99:	jmp n100
+n100:	jmp n101
+n101:	jmp n102
+n102:	jmp n103
+n103:	jmp n104
+n104:	jmp n105
+n105:	jmp n106
+n106:	jmp n107
+n107:	jmp n108
+n108:	jmp n109
+n109:	jmp n110
+n110:	jmp n111
+n111:	jmp n112
+n112:	jmp n113
+n113:	jmp n114
+n114:	jmp n115
+n115:	jmp n116
+n116:	jmp n117
+n117:	jmp n118
+n118:	jmp n119
+n119:	jmp n120
+n120:	jmp n121
+n121:	jmp n122
+n122:	jmp n123
+n123:	jmp n124
+n124:	jmp n125
+n125:	jmp n126
+n126:	jmp n127
+n127:	jmp n0
+
+%if ($-$$) > 257
+  %ifdef FATAL
+    %fatal "Out of space!"
+  %elifdef ERROR
+    %error "Out of space!"
+  %elifdef WARNING
+    %warning "Out of space!"
+  %endif
+%endif

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/fwdoptpp.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/fwdoptpp.error.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/fwdoptpp.fatal.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/fwdoptpp.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/fwdoptpp.warning.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/fwdoptpp.warning.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/gather.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/gather.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/gather.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/gotoff64.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/gotoff64.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/gotoff64.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/gotoff64.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/hexfp.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/hexfp.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/hexfp.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/hle.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/hle.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/hle.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/hle.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ifelse.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ifelse.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ifelse.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ifelse.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ifid.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ifid.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ifid.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ifmacro.asm Added

@@ -0,0 +1,411 @@
+;
+; ifmacro.asm
+;
+; Test of the new ifmacro directive
+;
+; This file produces a human-readable text file when compiled
+; with -f bin
+;
+
+%define LF 10
+
+%macro dummy 2
+	db 'This is a dummy macro, '
+	db 'arg1 = ', %1, ', '
+	db 'arg2 = ', %2, LF
+%endmacro
+
+	dummy 'this', 'that'
+
+%ifdef CR
+	db '%ifdef CR', LF
+%endif
+
+%ifdef LF
+	db '%ifdef LF', LF
+%endif
+
+%ifmacro dummy 1
+	db '%ifmacro dummy 1', LF
+%endif
+
+%ifmacro dummy 2
+	db '%ifmacro dummy 2', LF
+%endif
+
+%ifmacro dummy 3
+	db '%ifmacro dummy 3', LF
+%endif
+
+%ifmacro dummy 1+
+	db '%ifmacro dummy 1+', LF
+%endif
+
+%ifmacro dummy 2+
+	db '%ifmacro dummy 2+', LF
+%endif
+
+%ifmacro dummy 3+
+	db '%ifmacro dummy 3+', LF
+%endif
+
+%ifmacro dummy
+	db '%ifmacro dummy', LF
+%endif
+
+%ifmacro dummy 0-1
+	db '%ifmacro dummy 0-1', LF
+%endif
+
+%ifmacro dummy 1-2
+	db '%ifmacro dummy 1-2', LF
+%endif
+
+%ifmacro dummy 2-3
+	db '%ifmacro dummy 2-3', LF
+%endif
+
+%ifmacro dummy 3-4
+	db '%ifmacro dummy 3-4', LF
+%endif
+
+%ifmacro LF
+	db '%ifmacro LF', LF
+%endif
+
+%ifndef CR
+	db '%ifndef CR', LF
+%endif
+
+%ifndef LF
+	db '%ifndef LF', LF
+%endif
+
+%ifnmacro dummy 1
+	db '%ifnmacro dummy 1', LF
+%endif
+
+%ifnmacro dummy 2
+	db '%ifnmacro dummy 2', LF
+%endif
+
+%ifnmacro dummy 3
+	db '%ifnmacro dummy 3', LF
+%endif
+
+%ifnmacro dummy 1+
+	db '%ifnmacro dummy 1+', LF
+%endif
+
+%ifnmacro dummy 2+
+	db '%ifnmacro dummy 2+', LF
+%endif
+
+%ifnmacro dummy 3+
+	db '%ifnmacro dummy 3+', LF
+%endif
+
+%ifnmacro dummy
+	db '%ifnmacro dummy', LF
+%endif
+
+%ifnmacro dummy 0-1
+	db '%ifnmacro dummy 0-1', LF
+%endif
+
+%ifnmacro dummy 1-2
+	db '%ifnmacro dummy 1-2', LF
+%endif
+
+%ifnmacro dummy 2-3
+	db '%ifnmacro dummy 2-3', LF
+%endif
+
+%ifnmacro dummy 3-4
+	db '%ifnmacro dummy 3-4', LF
+%endif
+
+%ifnmacro LF
+	db '%ifnmacro LF', LF
+%endif
+
+%if 0
+%elifdef CR
+	db '%elifdef CR', CR
+%endif
+
+%if 0
+%elifdef LF
+	db '%elifdef LF', LF
+%endif
+
+%if 0
+%elifmacro dummy 1
+	db '%elifmacro dummy 1', LF
+%endif
+
+%if 0
+%elifmacro dummy 2
+	db '%elifmacro dummy 2', LF
+%endif
+
+%if 0
+%elifmacro dummy 3
+	db '%elifmacro dummy 3', LF
+%endif
+
+%if 0
+%elifmacro dummy 1+
+	db '%elifmacro dummy 1+', LF
+%endif
+
+%if 0
+%elifmacro dummy 2+
+	db '%elifmacro dummy 2+', LF
+%endif
+
+%if 0
+%elifmacro dummy 3+
+	db '%elifmacro dummy 3+', LF
+%endif
+
+%if 0
+%elifmacro dummy
+	db '%elifmacro dummy', LF
+%endif
+
+%if 0
+%elifmacro dummy 0-1
+	db '%elifmacro dummy 0-1', LF
+%endif
+
+%if 0
+%elifmacro dummy 1-2
+	db '%elifmacro dummy 1-2', LF
+%endif
+
+%if 0
+%elifmacro dummy 2-3
+	db '%elifmacro dummy 2-3', LF
+%endif
+
+%if 0
+%elifmacro dummy 3-4
+	db '%elifmacro dummy 3-4', LF
+%endif
+
+%if 0
+%elifmacro LF
+	db '%elifmacro LF', LF
+%endif
+
+%if 0
+%elifndef CR
+	db '%elifndef CR', LF
+%endif
+
+%if 0
+%elifndef LF
+	db '%elifndef LF', LF
+%endif
+
+%if 0
+%elifnmacro dummy 1
+	db '%elifnmacro dummy 1', LF
+%endif
+
+%if 0
+%elifnmacro dummy 2
+	db '%elifnmacro dummy 2', LF
+%endif
+
+%if 0
+%elifnmacro dummy 3
+	db '%elifnmacro dummy 3', LF
+%endif
+
+%if 0
+%elifnmacro dummy 1+
+	db '%elifnmacro dummy 1+', LF
+%endif
+
+%if 0
+%elifnmacro dummy 2+
+	db '%elifnmacro dummy 2+', LF
+%endif
+
+%if 0
+%elifnmacro dummy 3+
+	db '%elifnmacro dummy 3+', LF
+%endif
+
+%if 0
+%elifnmacro dummy
+	db '%elifnmacro dummy', LF
+%endif
+
+%if 0
+%elifnmacro dummy 0-1
+	db '%elifnmacro dummy 0-1', LF
+%endif
+
+%if 0
+%elifnmacro dummy 1-2
+	db '%elifnmacro dummy 1-2', LF
+%endif
+
+%if 0
+%elifnmacro dummy 2-3
+	db '%elifnmacro dummy 2-3', LF
+%endif
+
+%if 0
+%elifnmacro dummy 3-4
+	db '%elifnmacro dummy 3-4', LF
+%endif
+
+%if 0
+%elifnmacro LF
+	db '%elifnmacro LF', LF
+%endif
+
+%if 1
+%elifdef CR
+	db 'bad %elifdef CR', LF
+%endif
+
+%if 1
+%elifdef LF
+	db 'bad %elifdef LF', LF
+%endif
+
+%if 1
+%elifmacro dummy 1
+	db 'bad %elifmacro dummy 1', LF
+%endif
+
+%if 1
+%elifmacro dummy 2
+	db 'bad %elifmacro dummy 2', LF
+%endif
+
+%if 1
+%elifmacro dummy 3
+	db 'bad %elifmacro dummy 3', LF
+%endif
+
+%if 1
+%elifmacro dummy 1+
+	db 'bad %elifmacro dummy 1+', LF
+%endif
+
+%if 1
+%elifmacro dummy 2+
+	db 'bad %elifmacro dummy 2+', LF
+%endif
+
+%if 1
+%elifmacro dummy 3+
+	db 'bad %elifmacro dummy 3+', LF
+%endif
+
+%if 1
+%elifmacro dummy
+	db 'bad %elifmacro dummy', LF
+%endif
+
+%if 1
+%elifmacro dummy 0-1
+	db 'bad %elifmacro dummy 0-1', LF
+%endif
+
+%if 1
+%elifmacro dummy 1-2
+	db 'bad %elifmacro dummy 1-2', LF
+%endif
+
+%if 1
+%elifmacro dummy 2-3
+	db 'bad %elifmacro dummy 2-3', LF
+%endif
+
+%if 1
+%elifmacro dummy 3-4
+	db 'bad %elifmacro dummy 3-4', LF
+%endif
+
+%if 1
+%elifmacro LF
+	db 'bad %elifmacro LF', LF
+%endif
+
+%if 1
+%elifndef CR
+	db 'bad %elifndef CR', LF
+%endif
+
+%if 1
+%elifndef LF
+	db 'bad %elifndef LF', LF
+%endif
+
+%if 1
+%elifnmacro dummy 1
+	db 'bad %elifnmacro dummy 1', LF
+%endif
+
+%if 1
+%elifnmacro dummy 2
+	db 'bad %elifnmacro dummy 2', LF
+%endif
+
+%if 1
+%elifnmacro dummy 3
+	db 'bad %elifnmacro dummy 3', LF
+%endif
+
+%if 1
+%elifnmacro dummy 1+
+	db 'bad %elifnmacro dummy 1+', LF
+%endif
+
+%if 1
+%elifnmacro dummy 2+
+	db 'bad %elifnmacro dummy 2+', LF
+%endif
+
+%if 1
+%elifnmacro dummy 3+
+	db 'bad %elifnmacro dummy 3+', LF
+%endif
+
+%if 1
+%elifnmacro dummy
+	db 'bad %elifnmacro dummy', LF
+%endif
+
+%if 1
+%elifnmacro dummy 0-1
+	db 'bad %elifnmacro dummy 0-1', LF
+%endif
+
+%if 1
+%elifnmacro dummy 1-2
+	db 'bad %elifnmacro dummy 1-2', LF
+%endif
+
+%if 1
+%elifnmacro dummy 2-3
+	db 'bad %elifnmacro dummy 2-3', LF
+%endif
+
+%if 1
+%elifnmacro dummy 3-4
+	db 'bad %elifnmacro dummy 3-4', LF
+%endif
+
+%if 1
+%elifnmacro LF
+	db 'bad %elifnmacro LF', LF
+%endif
+

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ifmacro.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ifmacro.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/iftoken.asm Added

@@ -0,0 +1,315 @@
+%define ZMACRO
+%define NMACRO 1
+%define TMACRO 1 2
+	db 'N "":'
+%iftoken
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "":'
+%iftoken  ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty  ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'N "ZMACRO":'
+%iftoken ZMACRO
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty ZMACRO
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "ZMACRO":'
+%iftoken ZMACRO ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty ZMACRO ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'N "NMACRO":'
+%iftoken NMACRO
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty NMACRO
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "NMACRO":'
+%iftoken NMACRO ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty NMACRO ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'N "TMACRO":'
+%iftoken TMACRO
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty TMACRO
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "TMACRO":'
+%iftoken TMACRO ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty TMACRO ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'N "1":'
+%iftoken 1
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty 1
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "1":'
+%iftoken 1 ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty 1 ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'N "+1":'
+%iftoken +1
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty +1
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "+1":'
+%iftoken +1 ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty +1 ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'N "1 2":'
+%iftoken 1 2
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty 1 2
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "1 2":'
+%iftoken 1 2 ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty 1 2 ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'N "1,2":'
+%iftoken 1,2
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty 1,2
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "1,2":'
+%iftoken 1,2 ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty 1,2 ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'N "foo":'
+%iftoken foo
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty foo
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "foo":'
+%iftoken foo ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty foo ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'N "foo bar":'
+%iftoken foo bar
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty foo bar
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "foo bar":'
+%iftoken foo bar ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty foo bar ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'N "%":'
+%iftoken %
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty %
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "%":'
+%iftoken % ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty % ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'N "+foo":'
+%iftoken +foo
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty +foo
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "+foo":'
+%iftoken +foo ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty +foo ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'N "<<":'
+%iftoken <<
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty <<
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10
+	db 'C "<<":'
+%iftoken << ; With a comment!
+	db ' token'
+%else
+	db ' ntoken'
+%endif
+%ifempty << ; With a comment!
+	db ' empty'
+%else
+	db ' nempty'
+%endif
+	db 10

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/iftoken.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/iftoken.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ilog-error.stderr Added

@@ -0,0 +1,25 @@
+./travis/test/ilog.asm:136: error: ilog2 argument is not a power of two
+./travis/test/ilog.asm:137: error: ilog2 argument is not a power of two
+./travis/test/ilog.asm:138: error: ilog2 argument is not a power of two
+./travis/test/ilog.asm:139: error: ilog2 argument is not a power of two
+./travis/test/ilog.asm:141: error: ilog2 argument is not a power of two
+./travis/test/ilog.asm:142: error: ilog2 argument is not a power of two
+./travis/test/ilog.asm:143: error: ilog2 argument is not a power of two
+./travis/test/ilog.asm:145: error: ilog2 argument is not a power of two
+./travis/test/ilog.asm:146: error: ilog2 argument is not a power of two
+./travis/test/ilog.asm:147: error: ilog2 argument is not a power of two
+./travis/test/ilog.asm:149: error: ilog2 argument is not a power of two
+./travis/test/ilog.asm:150: error: ilog2 argument is not a power of two
+./travis/test/ilog.asm:151: error: ilog2 argument is not a power of two
+./travis/test/ilog.asm:153: error: ilog2 argument is not a power of two
+./travis/test/ilog.asm:154: error: ilog2 argument is not a power of two
+./travis/test/ilog.asm:155: error: ilog2 argument is not a power of two
+./travis/test/ilog.asm:157: error: ilog2 argument is not a power of two
+./travis/test/ilog.asm:158: error: ilog2 argument is not a power of two
+./travis/test/ilog.asm:159: error: ilog2 argument is not a power of two
+./travis/test/ilog.asm:161: error: ilog2 argument is not a power of two
+./travis/test/ilog.asm:162: error: ilog2 argument is not a power of two
+./travis/test/ilog.asm:163: error: ilog2 argument is not a power of two
+./travis/test/ilog.asm:165: error: ilog2 argument is not a power of two
+./travis/test/ilog.asm:166: error: ilog2 argument is not a power of two
+./travis/test/ilog.asm:167: error: ilog2 argument is not a power of two

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ilog.asm Added

@@ -0,0 +1,271 @@
+%use ifunc
+
+	db ilog2(0x1)
+	db ilog2(0x2)
+	db ilog2(0x4)
+	db ilog2(0x8)
+	db ilog2(0x10)
+	db ilog2(0x20)
+	db ilog2(0x40)
+	db ilog2(0x80)
+	db ilog2(0x100)
+	db ilog2(0x200)
+	db ilog2(0x400)
+	db ilog2(0x800)
+	db ilog2(0x1000)
+	db ilog2(0x2000)
+	db ilog2(0x4000)
+	db ilog2(0x8000)
+	db ilog2(0x10000)
+	db ilog2(0x20000)
+	db ilog2(0x40000)
+	db ilog2(0x80000)
+	db ilog2(0x100000)
+	db ilog2(0x200000)
+	db ilog2(0x400000)
+	db ilog2(0x800000)
+	db ilog2(0x1000000)
+	db ilog2(0x2000000)
+	db ilog2(0x4000000)
+	db ilog2(0x8000000)
+	db ilog2(0x10000000)
+	db ilog2(0x20000000)
+	db ilog2(0x40000000)
+	db ilog2(0x80000000)
+
+	db ilog2w(0x1)
+	db ilog2w(0x2)
+	db ilog2w(0x4)
+	db ilog2w(0x8)
+	db ilog2w(0x10)
+	db ilog2w(0x20)
+	db ilog2w(0x40)
+	db ilog2w(0x80)
+	db ilog2w(0x100)
+	db ilog2w(0x200)
+	db ilog2w(0x400)
+	db ilog2w(0x800)
+	db ilog2w(0x1000)
+	db ilog2w(0x2000)
+	db ilog2w(0x4000)
+	db ilog2w(0x8000)
+	db ilog2w(0x10000)
+	db ilog2w(0x20000)
+	db ilog2w(0x40000)
+	db ilog2w(0x80000)
+	db ilog2w(0x100000)
+	db ilog2w(0x200000)
+	db ilog2w(0x400000)
+	db ilog2w(0x800000)
+	db ilog2w(0x1000000)
+	db ilog2w(0x2000000)
+	db ilog2w(0x4000000)
+	db ilog2w(0x8000000)
+	db ilog2w(0x10000000)
+	db ilog2w(0x20000000)
+	db ilog2w(0x40000000)
+	db ilog2w(0x80000000)
+
+	db ilog2f(0x1)
+	db ilog2f(0x2)
+	db ilog2f(0x4)
+	db ilog2f(0x8)
+	db ilog2f(0x10)
+	db ilog2f(0x20)
+	db ilog2f(0x40)
+	db ilog2f(0x80)
+	db ilog2f(0x100)
+	db ilog2f(0x200)
+	db ilog2f(0x400)
+	db ilog2f(0x800)
+	db ilog2f(0x1000)
+	db ilog2f(0x2000)
+	db ilog2f(0x4000)
+	db ilog2f(0x8000)
+	db ilog2f(0x10000)
+	db ilog2f(0x20000)
+	db ilog2f(0x40000)
+	db ilog2f(0x80000)
+	db ilog2f(0x100000)
+	db ilog2f(0x200000)
+	db ilog2f(0x400000)
+	db ilog2f(0x800000)
+	db ilog2f(0x1000000)
+	db ilog2f(0x2000000)
+	db ilog2f(0x4000000)
+	db ilog2f(0x8000000)
+	db ilog2f(0x10000000)
+	db ilog2f(0x20000000)
+	db ilog2f(0x40000000)
+	db ilog2f(0x80000000)
+
+	db ilog2c(0x1)
+	db ilog2c(0x2)
+	db ilog2c(0x4)
+	db ilog2c(0x8)
+	db ilog2c(0x10)
+	db ilog2c(0x20)
+	db ilog2c(0x40)
+	db ilog2c(0x80)
+	db ilog2c(0x100)
+	db ilog2c(0x200)
+	db ilog2c(0x400)
+	db ilog2c(0x800)
+	db ilog2c(0x1000)
+	db ilog2c(0x2000)
+	db ilog2c(0x4000)
+	db ilog2c(0x8000)
+	db ilog2c(0x10000)
+	db ilog2c(0x20000)
+	db ilog2c(0x40000)
+	db ilog2c(0x80000)
+	db ilog2c(0x100000)
+	db ilog2c(0x200000)
+	db ilog2c(0x400000)
+	db ilog2c(0x800000)
+	db ilog2c(0x1000000)
+	db ilog2c(0x2000000)
+	db ilog2c(0x4000000)
+	db ilog2c(0x8000000)
+	db ilog2c(0x10000000)
+	db ilog2c(0x20000000)
+	db ilog2c(0x40000000)
+	db ilog2c(0x80000000)
+
+%ifdef ERROR
+	db ilog2(0x0)
+	db ilog2(0x3)
+	db ilog2(0x5)
+	db ilog2(0x9)
+	db ilog2(0x10)
+	db ilog2(0x30)
+	db ilog2(0x50)
+	db ilog2(0x90)
+	db ilog2(0x100)
+	db ilog2(0x300)
+	db ilog2(0x500)
+	db ilog2(0x900)
+	db ilog2(0x1000)
+	db ilog2(0x3000)
+	db ilog2(0x5000)
+	db ilog2(0x9000)
+	db ilog2(0x10000)
+	db ilog2(0x30000)
+	db ilog2(0x50000)
+	db ilog2(0x90000)
+	db ilog2(0x100000)
+	db ilog2(0x300000)
+	db ilog2(0x500000)
+	db ilog2(0x900000)
+	db ilog2(0x1000000)
+	db ilog2(0x3000000)
+	db ilog2(0x5000000)
+	db ilog2(0x9000000)
+	db ilog2(0x10000000)
+	db ilog2(0x30000000)
+	db ilog2(0x50000000)
+	db ilog2(0x90000000)
+%endif
+
+%ifdef WARNING
+	db ilog2w(0x0)
+	db ilog2w(0x3)
+	db ilog2w(0x5)
+	db ilog2w(0x9)
+	db ilog2w(0x10)
+	db ilog2w(0x30)
+	db ilog2w(0x50)
+	db ilog2w(0x90)
+	db ilog2w(0x100)
+	db ilog2w(0x300)
+	db ilog2w(0x500)
+	db ilog2w(0x900)
+	db ilog2w(0x1000)
+	db ilog2w(0x3000)
+	db ilog2w(0x5000)
+	db ilog2w(0x9000)
+	db ilog2w(0x10000)
+	db ilog2w(0x30000)
+	db ilog2w(0x50000)
+	db ilog2w(0x90000)
+	db ilog2w(0x100000)
+	db ilog2w(0x300000)
+	db ilog2w(0x500000)
+	db ilog2w(0x900000)
+	db ilog2w(0x1000000)
+	db ilog2w(0x3000000)
+	db ilog2w(0x5000000)
+	db ilog2w(0x9000000)
+	db ilog2w(0x10000000)
+	db ilog2w(0x30000000)
+	db ilog2w(0x50000000)
+	db ilog2w(0x90000000)
+%endif
+
+	db ilog2f(0x0)
+	db ilog2f(0x1)
+	db ilog2f(0x3)
+	db ilog2f(0x5)
+	db ilog2f(0x9)
+	db ilog2f(0x10)
+	db ilog2f(0x30)
+	db ilog2f(0x50)
+	db ilog2f(0x90)
+	db ilog2f(0x100)
+	db ilog2f(0x300)
+	db ilog2f(0x500)
+	db ilog2f(0x900)
+	db ilog2f(0x1000)
+	db ilog2f(0x3000)
+	db ilog2f(0x5000)
+	db ilog2f(0x9000)
+	db ilog2f(0x10000)
+	db ilog2f(0x30000)
+	db ilog2f(0x50000)
+	db ilog2f(0x90000)
+	db ilog2f(0x100000)
+	db ilog2f(0x300000)
+	db ilog2f(0x500000)
+	db ilog2f(0x900000)
+	db ilog2f(0x1000000)
+	db ilog2f(0x3000000)
+	db ilog2f(0x5000000)
+	db ilog2f(0x9000000)
+	db ilog2f(0x10000000)
+	db ilog2f(0x30000000)
+	db ilog2f(0x50000000)
+	db ilog2f(0x90000000)
+
+	db ilog2c(0x0)
+	db ilog2c(0x1)
+	db ilog2c(0x3)
+	db ilog2c(0x5)
+	db ilog2c(0x9)
+	db ilog2c(0x10)
+	db ilog2c(0x30)
+	db ilog2c(0x50)
+	db ilog2c(0x90)
+	db ilog2c(0x100)
+	db ilog2c(0x300)
+	db ilog2c(0x500)
+	db ilog2c(0x900)
+	db ilog2c(0x1000)
+	db ilog2c(0x3000)
+	db ilog2c(0x5000)
+	db ilog2c(0x9000)
+	db ilog2c(0x10000)
+	db ilog2c(0x30000)
+	db ilog2c(0x50000)
+	db ilog2c(0x90000)
+	db ilog2c(0x100000)
+	db ilog2c(0x300000)
+	db ilog2c(0x500000)
+	db ilog2c(0x900000)
+	db ilog2c(0x1000000)
+	db ilog2c(0x3000000)
+	db ilog2c(0x5000000)
+	db ilog2c(0x9000000)
+	db ilog2c(0x10000000)
+	db ilog2c(0x30000000)
+	db ilog2c(0x50000000)
+	db ilog2c(0x90000000)

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ilog.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ilog.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ilog.stderr Added

@@ -0,0 +1,25 @@
+./travis/test/ilog.asm:171: warning: ilog2 argument is not a power of two -w+other
+./travis/test/ilog.asm:172: warning: ilog2 argument is not a power of two -w+other
+./travis/test/ilog.asm:173: warning: ilog2 argument is not a power of two -w+other
+./travis/test/ilog.asm:174: warning: ilog2 argument is not a power of two -w+other
+./travis/test/ilog.asm:176: warning: ilog2 argument is not a power of two -w+other
+./travis/test/ilog.asm:177: warning: ilog2 argument is not a power of two -w+other
+./travis/test/ilog.asm:178: warning: ilog2 argument is not a power of two -w+other
+./travis/test/ilog.asm:180: warning: ilog2 argument is not a power of two -w+other
+./travis/test/ilog.asm:181: warning: ilog2 argument is not a power of two -w+other
+./travis/test/ilog.asm:182: warning: ilog2 argument is not a power of two -w+other
+./travis/test/ilog.asm:184: warning: ilog2 argument is not a power of two -w+other
+./travis/test/ilog.asm:185: warning: ilog2 argument is not a power of two -w+other
+./travis/test/ilog.asm:186: warning: ilog2 argument is not a power of two -w+other
+./travis/test/ilog.asm:188: warning: ilog2 argument is not a power of two -w+other
+./travis/test/ilog.asm:189: warning: ilog2 argument is not a power of two -w+other
+./travis/test/ilog.asm:190: warning: ilog2 argument is not a power of two -w+other
+./travis/test/ilog.asm:192: warning: ilog2 argument is not a power of two -w+other
+./travis/test/ilog.asm:193: warning: ilog2 argument is not a power of two -w+other
+./travis/test/ilog.asm:194: warning: ilog2 argument is not a power of two -w+other
+./travis/test/ilog.asm:196: warning: ilog2 argument is not a power of two -w+other
+./travis/test/ilog.asm:197: warning: ilog2 argument is not a power of two -w+other
+./travis/test/ilog.asm:198: warning: ilog2 argument is not a power of two -w+other
+./travis/test/ilog.asm:200: warning: ilog2 argument is not a power of two -w+other
+./travis/test/ilog.asm:201: warning: ilog2 argument is not a power of two -w+other
+./travis/test/ilog.asm:202: warning: ilog2 argument is not a power of two -w+other

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/imacro.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/imacro.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/imacro.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/imm.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/imm.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/imm.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/imm64-o0.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/imm64-o0.stderr Added

@@ -0,0 +1,16 @@
+./travis/test/imm64.asm:24: warning: signed dword immediate exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:24: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:25: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:26: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:27: warning: signed dword immediate exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:27: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:28: warning: signed dword immediate exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:28: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:52: warning: signed dword immediate exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:52: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:53: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:54: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:55: warning: signed dword immediate exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:55: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:56: warning: signed dword immediate exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:56: warning: dword data exceeds bounds -w+number-overflow

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/imm64-o1.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/imm64-o1.stderr Added

@@ -0,0 +1,16 @@
+./travis/test/imm64.asm:24: warning: signed dword immediate exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:24: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:25: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:26: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:27: warning: signed dword immediate exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:27: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:28: warning: signed dword immediate exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:28: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:52: warning: signed dword immediate exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:52: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:53: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:54: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:55: warning: signed dword immediate exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:55: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:56: warning: signed dword immediate exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:56: warning: dword data exceeds bounds -w+number-overflow

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/imm64-ox.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/imm64-ox.stderr Added

@@ -0,0 +1,16 @@
+./travis/test/imm64.asm:24: warning: signed dword immediate exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:24: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:25: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:26: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:27: warning: signed dword immediate exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:27: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:28: warning: signed dword immediate exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:28: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:52: warning: signed dword immediate exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:52: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:53: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:54: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:55: warning: signed dword immediate exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:55: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:56: warning: signed dword immediate exceeds bounds -w+number-overflow
+./travis/test/imm64.asm:56: warning: dword data exceeds bounds -w+number-overflow

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/imm64.asm Added

@@ -0,0 +1,56 @@
+	bits 64
+	mov rax,11223344h
+	mov rax,dword 11223344h
+	mov eax,11223344h
+	mov rax,dword 11223344h		; 32-bit operation
+	mov qword rax,11223344h
+	mov qword rax,dword 11223344h
+
+	mov rax,0_ffffffff_8899aabbh
+	mov rax,dword 0_ffffffff_8899aabbh
+	mov eax,0_ffffffff_8899aabbh
+	mov rax,dword 0_ffffffff_8899aabbh	; 32-bit operation
+	mov qword rax,0_ffffffff_8899aabbh
+	mov qword rax,dword 0_ffffffff_8899aabbh
+
+	mov rax,7fffffffh
+	mov rax,80000000h
+	mov rax,0_ffffffffh
+	mov rax,1_00000000h
+	mov rax,0_ffffffff_7fffffffh
+	mov rax,0_ffffffff_80000000h
+
+	mov rax,0_11223344_8899aabbh
+	mov rax,dword 0_11223344_8899aabbh
+	mov eax,0_11223344_8899aabbh
+	mov rax,dword 0_11223344_8899aabbh	; 32-bit operation
+	mov qword rax,0_11223344_8899aabbh
+	mov qword rax,dword 0_11223344_8899aabbh
+
+	mov rax,strict 11223344h
+	mov rax,strict dword 11223344h
+	mov eax,strict 11223344h
+	mov rax,strict dword 11223344h		; 32-bit operation
+	mov qword rax,strict 11223344h
+	mov qword rax,strict dword 11223344h
+
+	mov rax,strict 0_ffffffff_8899aabbh
+	mov rax,strict dword 0_ffffffff_8899aabbh
+	mov eax,strict 0_ffffffff_8899aabbh
+	mov rax,strict dword 0_ffffffff_8899aabbh	; 32-bit operation
+	mov qword rax,strict 0_ffffffff_8899aabbh
+	mov qword rax,strict dword 0_ffffffff_8899aabbh
+
+	mov rax,strict 7fffffffh
+	mov rax,strict 80000000h
+	mov rax,strict 0_ffffffffh
+	mov rax,strict 1_00000000h
+	mov rax,strict 0_ffffffff_7fffffffh
+	mov rax,strict 0_ffffffff_80000000h
+
+	mov rax,strict 0_11223344_8899aabbh
+	mov rax,strict dword 0_11223344_8899aabbh
+	mov eax,strict 0_11223344_8899aabbh
+	mov rax,strict dword 0_11223344_8899aabbh	; 32-bit operation
+	mov qword rax,strict 0_11223344_8899aabbh
+	mov qword rax,strict dword 0_11223344_8899aabbh

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/imm64.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/immwarn-no.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/immwarn-o.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/immwarn-o.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/immwarn-ono.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/immwarn.asm Added

@@ -0,0 +1,91 @@
+;Testname=onowarn; Arguments=-Ox -DOPT=1 -DWARN=0 -fbin -oimmwarn.bin; Files=stdout stderr immwarn.bin
+;Testname=owarn; Arguments=-Ox -DOPT=1 -DWARN=1 -fbin -oimmwarn.bin; Files=stdout stderr immwarn.bin
+;Testname=nowarn; Arguments=-O0 -DOPT=0 -DWARN=0 -fbin -oimmwarn.bin; Files=stdout stderr immwarn.bin
+;Testname=warn; Arguments=-O0 -DOPT=1 -DWARN=1 -fbin -oimmwarn.bin; Files=stdout stderr immwarn.bin
+
+%ifndef WARN
+  %define WARN 1
+%endif
+
+	bits 16
+	push 1
+%if WARN
+	push 0ffffffffh
+%endif
+	push -1
+	push 0ffffh
+	push byte 0FFFFh
+
+	add ax,0FFFFh
+%if WARN
+	add ax,0FFFFFFFFh
+%endif
+	add ax,-1
+	add ax,byte 0FFFFh
+%if WARN
+	add ax,byte 0FFFFFFFFh
+%endif
+	add ax,-1
+
+	add cx,0FFFFh
+%if WARN
+	add cx,0FFFFFFFFh
+%endif
+	add cx,-1
+	add cx,byte 0FFFFh
+%if WARN
+	add cx,byte 0FFFFFFFFh
+%endif
+	add cx,-1
+
+	bits 32
+	push 1
+	push 0ffffffffh
+	push -1
+	push 0ffffh
+
+	push byte 1
+%if WARN
+	push byte 0ffffh
+%endif
+	push byte -1
+
+	push word 1
+	push word 0ffffh
+	push word -1
+
+	push dword 1
+	push dword 0ffffffffh
+	push dword -1
+
+	add eax,0FFFFh
+	add eax,0FFFFFFFFh
+	add eax,-1
+
+	add ecx,0FFFFh
+	add ecx,0FFFFFFFFh
+	add ecx,-1
+
+	bits 64
+	mov eax,7fffffffh
+	mov eax,80000000h
+	mov rax,7fffffffh
+	mov rax,80000000h
+%if WARN
+	mov rax,dword 80000000h
+%endif
+	add rcx,0FFFFh
+%if WARN
+	add rcx,0FFFFFFFFh
+%endif
+	add rcx,-1
+
+	add ecx,0FFFFh
+	add ecx,0FFFFFFFFh
+	add ecx,-1
+
+	push byte 1
+%if WARN
+	push byte 0ffffffffh
+%endif
+	push byte -1

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/immwarn.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/immwarn.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/immwarn.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/imul-nowarn.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/imul-warn.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/imul-warn.stderr Added

@@ -0,0 +1,76 @@
+./travis/test/imul.asm:111: warning: signed byte value exceeds bounds -w+number-overflow
+./travis/test/imul.asm:37: ... from macro `test' defined here
+./travis/test/imul.asm:111: warning: signed byte value exceeds bounds -w+number-overflow
+./travis/test/imul.asm:41: ... from macro `test' defined here
+./travis/test/imul.asm:111: warning: signed byte value exceeds bounds -w+number-overflow
+./travis/test/imul.asm:52: ... from macro `test' defined here
+./travis/test/imul.asm:111: warning: signed byte value exceeds bounds -w+number-overflow
+./travis/test/imul.asm:54: ... from macro `test' defined here
+./travis/test/imul.asm:112: warning: word data exceeds bounds -w+number-overflow
+./travis/test/imul.asm:36: ... from macro `test' defined here
+./travis/test/imul.asm:112: warning: signed byte value exceeds bounds -w+number-overflow
+./travis/test/imul.asm:37: ... from macro `test' defined here
+./travis/test/imul.asm:112: warning: word data exceeds bounds -w+number-overflow
+./travis/test/imul.asm:38: ... from macro `test' defined here
+./travis/test/imul.asm:112: warning: word data exceeds bounds -w+number-overflow
+./travis/test/imul.asm:39: ... from macro `test' defined here
+./travis/test/imul.asm:112: warning: signed byte value exceeds bounds -w+number-overflow
+./travis/test/imul.asm:41: ... from macro `test' defined here
+./travis/test/imul.asm:112: warning: word data exceeds bounds -w+number-overflow
+./travis/test/imul.asm:51: ... from macro `test' defined here
+./travis/test/imul.asm:112: warning: signed byte value exceeds bounds -w+number-overflow
+./travis/test/imul.asm:52: ... from macro `test' defined here
+./travis/test/imul.asm:112: warning: signed byte value exceeds bounds -w+number-overflow
+./travis/test/imul.asm:54: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: word data exceeds bounds -w+number-overflow
+./travis/test/imul.asm:36: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: signed byte value exceeds bounds -w+number-overflow
+./travis/test/imul.asm:37: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: word data exceeds bounds -w+number-overflow
+./travis/test/imul.asm:38: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: word data exceeds bounds -w+number-overflow
+./travis/test/imul.asm:39: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imul.asm:40: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: signed byte value exceeds bounds -w+number-overflow
+./travis/test/imul.asm:41: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imul.asm:42: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imul.asm:43: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: signed dword immediate exceeds bounds -w+number-overflow
+./travis/test/imul.asm:45: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imul.asm:45: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: signed byte value exceeds bounds -w+number-overflow
+./travis/test/imul.asm:46: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: signed dword immediate exceeds bounds -w+number-overflow
+./travis/test/imul.asm:47: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imul.asm:47: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: signed dword immediate exceeds bounds -w+number-overflow
+./travis/test/imul.asm:48: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imul.asm:48: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: word data exceeds bounds -w+number-overflow
+./travis/test/imul.asm:51: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: signed byte value exceeds bounds -w+number-overflow
+./travis/test/imul.asm:52: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imul.asm:53: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: signed byte value exceeds bounds -w+number-overflow
+./travis/test/imul.asm:54: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: signed dword immediate exceeds bounds -w+number-overflow
+./travis/test/imul.asm:56: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/imul.asm:56: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: signed byte value exceeds bounds -w+number-overflow
+./travis/test/imul.asm:57: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: signed dword value exceeds bounds -w+number-overflow
+./travis/test/imul.asm:91: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: signed dword value exceeds bounds -w+number-overflow
+./travis/test/imul.asm:92: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: signed dword value exceeds bounds -w+number-overflow
+./travis/test/imul.asm:93: ... from macro `test' defined here
+./travis/test/imul.asm:113: warning: signed dword value exceeds bounds -w+number-overflow
+./travis/test/imul.asm:102: ... from macro `test' defined here

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/imul.asm Added

@@ -0,0 +1,114 @@
+%macro test 1-3 5 -2
+	bits %1
+
+%undef MEM
+%if %1 == 16
+  %define MEM di
+%elif %1 == 32
+  %define MEM edi
+%elif %1 == 64
+  %define MEM rdi
+%endif
+
+	imul al
+	imul byte MEM
+	imul ax
+	imul word MEM
+	imul eax
+	imul dword MEM
+%if %1 == 64
+	imul rdx
+	imul qword MEM
+%endif
+
+	imul ax,cx
+	imul ax,MEM
+	imul ax,word MEM
+	imul eax,ecx
+	imul eax,MEM
+	imul eax,dword MEM
+%if %1 == 64
+	imul rax,rcx
+	imul rax,MEM
+	imul rax,qword MEM
+%endif
+
+	imul ax,cx,%2
+	imul ax,cx,byte %2
+	imul ax,MEM,%2
+	imul ax,word MEM,%2
+	imul eax,ecx,%2
+	imul eax,ecx,byte %2
+	imul eax,MEM,%2
+	imul eax,dword MEM,%2
+%if %1 == 64
+	imul rax,rcx,%2
+	imul rax,rcx,byte %2
+	imul rax,MEM,%2
+	imul rax,qword MEM,%2
+%endif
+
+	imul ax,%2
+	imul ax,byte %2
+	imul eax,%2
+	imul eax,byte %2
+%if %1 == 64
+	imul rax,%2
+	imul rax,byte %2
+%endif
+
+	imul ax,cx,0x1234
+	imul ax,MEM,0x1234
+	imul ax,word MEM,0x1234
+	imul eax,ecx,0x12345678
+	imul eax,MEM,0x12345678
+	imul eax,dword MEM,0x12345678
+%if %1 == 64
+	imul rax,rcx,0x12345678
+	imul rax,MEM,0x12345678
+	imul rax,qword MEM,0x12345678
+%endif
+
+	imul ax,0x1234
+	imul eax,0x12345678
+%if %1 == 64
+	imul rax,0x12345678
+%endif
+
+	imul ax,cx,0xfffe
+	imul ax,MEM,0xfffe
+	imul ax,word MEM,0xfffe
+	imul ax,cx,0xfe
+	imul ax,MEM,0xfe
+	imul ax,word MEM,0xfe
+	imul eax,ecx,0xfffffffe
+	imul eax,MEM,0xfffffffe
+	imul eax,dword MEM,0xfffffffe
+	imul eax,ecx,0xfffe
+	imul eax,MEM,0xfffe
+	imul eax,dword MEM,0xfffe
+%if %1 == 64
+	imul rax,rcx,%3
+	imul rax,MEM,%3
+	imul rax,qword MEM,%3
+	imul rax,rcx,0xfffe
+	imul rax,MEM,0xfffe
+	imul rax,qword MEM,0xfffe
+%endif
+
+	imul ax,0xfffe
+	imul eax,0xfffffffe
+%if %1 == 64
+	imul rax,%3
+%endif
+%endmacro
+
+	test 16
+	test 32
+	test 64
+
+%ifdef WARN
+	test 16,0x999
+	test 32,0x999999
+	test 64,0x999999999,0xfffffffe
+%endif

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/imul.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/inc1.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/inc2.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/inc3.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/inctest.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/inctest.com.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/inctest.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/insertps.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/insertps.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/insertps.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/insnlbl.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/insnlbl.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/insnlbl.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/invlpga.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/invlpga.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/invlpga.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/jmp64.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/jmp64.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/jmp64.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/lar_lsl.asm Added

@@ -0,0 +1,122 @@
+; LAR/LSL
+;---------
+
+; 1x ; = invalid due to lack of REX
+; 3x ; = invalid due to Mw
+
+%macro m 1
+
+  bits 16
+
+	%1  ax, ax
+	%1  ax,eax
+;	%1  ax,rax
+
+	%1 eax, ax
+	%1 eax,eax
+;	%1 eax,rax
+
+;	%1 rax, ax
+;	%1 rax,eax
+;	%1 rax,rax
+
+	%1  ax,      0
+	%1  ax, word 0
+;;;	%1  ax,dword 0
+;	%1  ax,qword 0
+
+	%1 eax,      0
+	%1 eax, word 0
+;;;	%1 eax,dword 0
+;	%1 eax,qword 0
+
+;	%1 rax,      0
+;	%1 rax, word 0
+;	%1 rax,dword 0
+;	%1 rax,qword 0
+
+  bits 32
+
+	%1  ax, ax
+	%1  ax,eax
+;	%1  ax,rax
+
+	%1 eax, ax
+	%1 eax,eax
+;	%1 eax,rax
+
+;	%1 rax, ax
+;	%1 rax,eax
+;	%1 rax,rax
+
+	%1  ax,      0
+	%1  ax, word 0
+;;;	%1  ax,dword 0
+;	%1  ax,qword 0
+
+	%1 eax,      0
+	%1 eax, word 0
+;;;	%1 eax,dword 0
+;	%1 eax,qword 0
+
+;	%1 rax,      0
+;	%1 rax, word 0
+;	%1 rax,dword 0
+;	%1 rax,qword 0
+
+  bits 64
+
+	%1  ax, ax
+	%1  ax,eax
+	%1  ax,rax	; $TODO: shouldn't emit REX.W $
+
+	%1 eax, ax
+	%1 eax,eax
+	%1 eax,rax	; $TODO: shouldn't emit REX.W $
+
+	%1 rax, ax
+	%1 rax,eax
+	%1 rax,rax
+
+	%1  ax,      0
+	%1  ax, word 0
+;;;	%1  ax,dword 0
+;;;	%1  ax,qword 0
+
+	%1 eax,      0
+	%1 eax, word 0
+;;;	%1 eax,dword 0
+;;;	%1 eax,qword 0
+
+	%1 rax,      0
+	%1 rax, word 0
+;;;	%1 rax,dword 0
+;;;	%1 rax,qword 0
+
+%endmacro
+
+m lar
+
+m lsl
+
+bits 16
+lar ax, si
+lar ax,esi
+bits 32
+lar ax, si
+lar ax,esi
+bits 64
+lar ax,esi
+lar ax,rsi
+
+bits 16
+lsl ax, si
+lsl ax,esi
+bits 32
+lsl ax, si
+lsl ax,esi
+bits 64
+lar ax,esi
+lsl ax,rsi
+
+; EOF

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/lar_lsl.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/lar_lsl.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/larlsl.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/larlsl.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/larlsl.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/lnxhello.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/lnxhello.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/lnxhello.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/local.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/local.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/local.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/loopoffs.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/loopoffs.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/loopoffs.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/lwp.asm Added

@@ -0,0 +1,213 @@
+; LWP testcases from 2010/03/22 binutils change: no more 16-bit variants
+;------------------------------------------------------------------------
+
+%define testcase3(x) x
+%define testcase3(x,y) y,x
+%define testcase3(x,y,z) z,y,x
+
+%macro testcase 3.nolist	; uncomment one of the two, and compare the -f bin and -l output between them
+%ifdef BIN
+    db %1
+%endif
+%ifdef SRC
+    %2 testcase3(%3)
+%endif
+%endmacro
+
+bits 32
+
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc0									  }, { llwpcb }, { eax }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc1									  }, { llwpcb }, { ecx }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc2									  }, { llwpcb }, { edx }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc3									  }, { llwpcb }, { ebx }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc4									  }, { llwpcb }, { esp }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc5									  }, { llwpcb }, { ebp }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc6									  }, { llwpcb }, { esi }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc7									  }, { llwpcb }, { edi }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xcf									  }, { slwpcb }, { edi }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xce									  }, { slwpcb }, { esi }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xcd									  }, { slwpcb }, { ebp }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xcc									  }, { slwpcb }, { esp }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xcb									  }, { slwpcb }, { ebx }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xca									  }, { slwpcb }, { edx }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc9									  }, { slwpcb }, { ecx }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc8									  }, { slwpcb }, { eax }
+testcase { 0x8f, 0xea, 0x78, 0x12, 0xc7, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,edi,eax }
+testcase { 0x8f, 0xea, 0x70, 0x12, 0xc6, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,esi,ecx }
+testcase { 0x8f, 0xea, 0x68, 0x12, 0xc5, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,ebp,edx }
+testcase { 0x8f, 0xea, 0x60, 0x12, 0xc4, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,esp,ebx }
+testcase { 0x8f, 0xea, 0x58, 0x12, 0xc3, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,ebx,esp }
+testcase { 0x8f, 0xea, 0x50, 0x12, 0xc2, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,edx,ebp }
+testcase { 0x8f, 0xea, 0x48, 0x12, 0xc1, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,ecx,esi }
+testcase { 0x8f, 0xea, 0x40, 0x12, 0xc0, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,eax,edi }
+testcase { 0x8f, 0xea, 0x78, 0x12, 0xcf, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,edi,eax }
+testcase { 0x8f, 0xea, 0x70, 0x12, 0xce, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,esi,ecx }
+testcase { 0x8f, 0xea, 0x68, 0x12, 0xcd, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,ebp,edx }
+testcase { 0x8f, 0xea, 0x60, 0x12, 0xcc, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,esp,ebx }
+testcase { 0x8f, 0xea, 0x58, 0x12, 0xcb, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,ebx,esp }
+testcase { 0x8f, 0xea, 0x50, 0x12, 0xca, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,edx,ebp }
+testcase { 0x8f, 0xea, 0x48, 0x12, 0xc9, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,ecx,esi }
+testcase { 0x8f, 0xea, 0x40, 0x12, 0xc8, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,eax,edi }
+testcase { 0x8f, 0xea, 0x78, 0x12, 0x07, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,edi,eax }
+testcase { 0x8f, 0xea, 0x70, 0x12, 0x06, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,esi,ecx }
+testcase { 0x8f, 0xea, 0x68, 0x12, 0x45, 0x00, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,ebp,edx }
+testcase { 0x8f, 0xea, 0x60, 0x12, 0x04, 0x24, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,esp,ebx }
+testcase { 0x8f, 0xea, 0x58, 0x12, 0x03, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,ebx,esp }
+testcase { 0x8f, 0xea, 0x50, 0x12, 0x02, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,edx,ebp }
+testcase { 0x8f, 0xea, 0x48, 0x12, 0x01, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,ecx,esi }
+testcase { 0x8f, 0xea, 0x40, 0x12, 0x00, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,eax,edi }
+testcase { 0x8f, 0xea, 0x78, 0x12, 0x0f, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,edi,eax }
+testcase { 0x8f, 0xea, 0x70, 0x12, 0x0e, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,esi,ecx }
+testcase { 0x8f, 0xea, 0x68, 0x12, 0x4d, 0x00, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,ebp,edx }
+testcase { 0x8f, 0xea, 0x60, 0x12, 0x0c, 0x24, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,esp,ebx }
+testcase { 0x8f, 0xea, 0x58, 0x12, 0x0b, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,ebx,esp }
+testcase { 0x8f, 0xea, 0x50, 0x12, 0x0a, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,edx,ebp }
+testcase { 0x8f, 0xea, 0x48, 0x12, 0x09, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,ecx,esi }
+testcase { 0x8f, 0xea, 0x40, 0x12, 0x08, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,eax,edi }
+testcase { 0x8f, 0xea, 0x78, 0x12, 0x87, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpins }, { 0x12345678,0xcafe+edi,eax }
+testcase { 0x8f, 0xea, 0x70, 0x12, 0x86, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpins }, { 0x12345678,0xcafe+esi,ecx }
+testcase { 0x8f, 0xea, 0x68, 0x12, 0x85, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpins }, { 0x12345678,0xcafe+ebp,edx }
+testcase { 0x8f, 0xea, 0x60, 0x12, 0x84, 0x24, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+esp,ebx }
+testcase { 0x8f, 0xea, 0x58, 0x12, 0x83, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpins }, { 0x12345678,0xcafe+ebx,esp }
+testcase { 0x8f, 0xea, 0x50, 0x12, 0x82, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpins }, { 0x12345678,0xcafe+edx,ebp }
+testcase { 0x8f, 0xea, 0x48, 0x12, 0x81, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpins }, { 0x12345678,0xcafe+ecx,esi }
+testcase { 0x8f, 0xea, 0x40, 0x12, 0x80, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpins }, { 0x12345678,0xcafe+eax,edi }
+testcase { 0x8f, 0xea, 0x78, 0x12, 0x8f, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpval }, { 0x12345678,0xcafe+edi,eax }
+testcase { 0x8f, 0xea, 0x70, 0x12, 0x8e, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpval }, { 0x12345678,0xcafe+esi,ecx }
+testcase { 0x8f, 0xea, 0x68, 0x12, 0x8d, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpval }, { 0x12345678,0xcafe+ebp,edx }
+testcase { 0x8f, 0xea, 0x60, 0x12, 0x8c, 0x24, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+esp,ebx }
+testcase { 0x8f, 0xea, 0x58, 0x12, 0x8b, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpval }, { 0x12345678,0xcafe+ebx,esp }
+testcase { 0x8f, 0xea, 0x50, 0x12, 0x8a, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpval }, { 0x12345678,0xcafe+edx,ebp }
+testcase { 0x8f, 0xea, 0x48, 0x12, 0x89, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpval }, { 0x12345678,0xcafe+ecx,esi }
+testcase { 0x8f, 0xea, 0x40, 0x12, 0x88, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12			  }, { lwpval }, { 0x12345678,0xcafe+eax,edi }
+
+bits 64
+
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc0									  }, { llwpcb }, { eax }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc1									  }, { llwpcb }, { ecx }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc2									  }, { llwpcb }, { edx }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc3									  }, { llwpcb }, { ebx }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc4									  }, { llwpcb }, { esp }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc5									  }, { llwpcb }, { ebp }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc6									  }, { llwpcb }, { esi }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc7									  }, { llwpcb }, { edi }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc0									  }, { llwpcb }, { r8d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc1									  }, { llwpcb }, { r9d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc2									  }, { llwpcb }, { r10d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc3									  }, { llwpcb }, { r11d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc4									  }, { llwpcb }, { r12d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc5									  }, { llwpcb }, { r13d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc6									  }, { llwpcb }, { r14d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc7									  }, { llwpcb }, { r15d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xcf									  }, { slwpcb }, { r15d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xce									  }, { slwpcb }, { r14d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xcd									  }, { slwpcb }, { r13d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xcc									  }, { slwpcb }, { r12d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xcb									  }, { slwpcb }, { r11d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xca									  }, { slwpcb }, { r10d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc9									  }, { slwpcb }, { r9d }
+testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc8									  }, { slwpcb }, { r8d }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xcf									  }, { slwpcb }, { edi }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xce									  }, { slwpcb }, { esi }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xcd									  }, { slwpcb }, { ebp }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xcc									  }, { slwpcb }, { esp }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xcb									  }, { slwpcb }, { ebx }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xca									  }, { slwpcb }, { edx }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc9									  }, { slwpcb }, { ecx }
+testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc8									  }, { slwpcb }, { eax }
+testcase { 0x8f, 0xca, 0x78, 0x12, 0xc7, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,r15d,eax }
+testcase { 0x8f, 0xca, 0x70, 0x12, 0xc6, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,r14d,ecx }
+testcase { 0x8f, 0xca, 0x68, 0x12, 0xc5, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,r13d,edx }
+testcase { 0x8f, 0xca, 0x60, 0x12, 0xc4, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,r12d,ebx }
+testcase { 0x8f, 0xca, 0x58, 0x12, 0xc3, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,r11d,esp }
+testcase { 0x8f, 0xca, 0x50, 0x12, 0xc2, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,r10d,ebp }
+testcase { 0x8f, 0xca, 0x48, 0x12, 0xc1, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,r9d,esi }
+testcase { 0x8f, 0xca, 0x40, 0x12, 0xc0, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,r8d,edi }
+testcase { 0x8f, 0xea, 0x38, 0x12, 0xc7, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,edi,r8d }
+testcase { 0x8f, 0xea, 0x30, 0x12, 0xc6, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,esi,r9d }
+testcase { 0x8f, 0xea, 0x28, 0x12, 0xc5, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,ebp,r10d }
+testcase { 0x8f, 0xea, 0x20, 0x12, 0xc4, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,esp,r11d }
+testcase { 0x8f, 0xea, 0x18, 0x12, 0xc3, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,ebx,r12d }
+testcase { 0x8f, 0xea, 0x10, 0x12, 0xc2, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,edx,r13d }
+testcase { 0x8f, 0xea, 0x08, 0x12, 0xc1, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,ecx,r14d }
+testcase { 0x8f, 0xea, 0x00, 0x12, 0xc0, 0x78, 0x56, 0x34, 0x12						  }, { lwpins }, { 0x12345678,eax,r15d }
+testcase { 0x8f, 0xca, 0x78, 0x12, 0xcf, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,r15d,eax }
+testcase { 0x8f, 0xca, 0x70, 0x12, 0xce, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,r14d,ecx }
+testcase { 0x8f, 0xca, 0x68, 0x12, 0xcd, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,r13d,edx }
+testcase { 0x8f, 0xca, 0x60, 0x12, 0xcc, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,r12d,ebx }
+testcase { 0x8f, 0xca, 0x58, 0x12, 0xcb, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,r11d,esp }
+testcase { 0x8f, 0xca, 0x50, 0x12, 0xca, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,r10d,ebp }
+testcase { 0x8f, 0xca, 0x48, 0x12, 0xc9, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,r9d,esi }
+testcase { 0x8f, 0xca, 0x40, 0x12, 0xc8, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,r8d,edi }
+testcase { 0x8f, 0xea, 0x38, 0x12, 0xcf, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,edi,r8d }
+testcase { 0x8f, 0xea, 0x30, 0x12, 0xce, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,esi,r9d }
+testcase { 0x8f, 0xea, 0x28, 0x12, 0xcd, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,ebp,r10d }
+testcase { 0x8f, 0xea, 0x20, 0x12, 0xcc, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,esp,r11d }
+testcase { 0x8f, 0xea, 0x18, 0x12, 0xcb, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,ebx,r12d }
+testcase { 0x8f, 0xea, 0x10, 0x12, 0xca, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,edx,r13d }
+testcase { 0x8f, 0xea, 0x08, 0x12, 0xc9, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,ecx,r14d }
+testcase { 0x8f, 0xea, 0x00, 0x12, 0xc8, 0x78, 0x56, 0x34, 0x12						  }, { lwpval }, { 0x12345678,eax,r15d }
+testcase { 0x67, 0x8f, 0xca, 0x78, 0x12, 0x07, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,r15d,eax }
+testcase { 0x67, 0x8f, 0xca, 0x70, 0x12, 0x06, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,r14d,ecx }
+testcase { 0x67, 0x8f, 0xca, 0x68, 0x12, 0x45, 0x00, 0x78, 0x56, 0x34, 0x12				  }, { lwpins }, { 0x12345678,r13d,edx }
+testcase { 0x67, 0x8f, 0xca, 0x60, 0x12, 0x04, 0x24, 0x78, 0x56, 0x34, 0x12				  }, { lwpins }, { 0x12345678,r12d,ebx }
+testcase { 0x67, 0x8f, 0xca, 0x58, 0x12, 0x03, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,r11d,esp }
+testcase { 0x67, 0x8f, 0xca, 0x50, 0x12, 0x02, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,r10d,ebp }
+testcase { 0x67, 0x8f, 0xca, 0x48, 0x12, 0x01, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,r9d,esi }
+testcase { 0x67, 0x8f, 0xca, 0x40, 0x12, 0x00, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,r8d,edi }
+testcase { 0x67, 0x8f, 0xea, 0x38, 0x12, 0x07, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,edi,r8d }
+testcase { 0x67, 0x8f, 0xea, 0x30, 0x12, 0x06, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,esi,r9d }
+testcase { 0x67, 0x8f, 0xea, 0x28, 0x12, 0x45, 0x00, 0x78, 0x56, 0x34, 0x12				  }, { lwpins }, { 0x12345678,ebp,r10d }
+testcase { 0x67, 0x8f, 0xea, 0x20, 0x12, 0x04, 0x24, 0x78, 0x56, 0x34, 0x12				  }, { lwpins }, { 0x12345678,esp,r11d }
+testcase { 0x67, 0x8f, 0xea, 0x18, 0x12, 0x03, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,ebx,r12d }
+testcase { 0x67, 0x8f, 0xea, 0x10, 0x12, 0x02, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,edx,r13d }
+testcase { 0x67, 0x8f, 0xea, 0x08, 0x12, 0x01, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,ecx,r14d }
+testcase { 0x67, 0x8f, 0xea, 0x00, 0x12, 0x00, 0x78, 0x56, 0x34, 0x12					  }, { lwpins }, { 0x12345678,eax,r15d }
+testcase { 0x67, 0x8f, 0xca, 0x78, 0x12, 0x0f, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,r15d,eax }
+testcase { 0x67, 0x8f, 0xca, 0x70, 0x12, 0x0e, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,r14d,ecx }
+testcase { 0x67, 0x8f, 0xca, 0x68, 0x12, 0x4d, 0x00, 0x78, 0x56, 0x34, 0x12				  }, { lwpval }, { 0x12345678,r13d,edx }
+testcase { 0x67, 0x8f, 0xca, 0x60, 0x12, 0x0c, 0x24, 0x78, 0x56, 0x34, 0x12				  }, { lwpval }, { 0x12345678,r12d,ebx }
+testcase { 0x67, 0x8f, 0xca, 0x58, 0x12, 0x0b, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,r11d,esp }
+testcase { 0x67, 0x8f, 0xca, 0x50, 0x12, 0x0a, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,r10d,ebp }
+testcase { 0x67, 0x8f, 0xca, 0x48, 0x12, 0x09, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,r9d,esi }
+testcase { 0x67, 0x8f, 0xca, 0x40, 0x12, 0x08, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,r8d,edi }
+testcase { 0x67, 0x8f, 0xea, 0x38, 0x12, 0x0f, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,edi,r8d }
+testcase { 0x67, 0x8f, 0xea, 0x30, 0x12, 0x0e, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,esi,r9d }
+testcase { 0x67, 0x8f, 0xea, 0x28, 0x12, 0x4d, 0x00, 0x78, 0x56, 0x34, 0x12				  }, { lwpval }, { 0x12345678,ebp,r10d }
+testcase { 0x67, 0x8f, 0xea, 0x20, 0x12, 0x0c, 0x24, 0x78, 0x56, 0x34, 0x12				  }, { lwpval }, { 0x12345678,esp,r11d }
+testcase { 0x67, 0x8f, 0xea, 0x18, 0x12, 0x0b, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,ebx,r12d }
+testcase { 0x67, 0x8f, 0xea, 0x10, 0x12, 0x0a, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,edx,r13d }
+testcase { 0x67, 0x8f, 0xea, 0x08, 0x12, 0x09, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,ecx,r14d }
+testcase { 0x67, 0x8f, 0xea, 0x00, 0x12, 0x08, 0x78, 0x56, 0x34, 0x12					  }, { lwpval }, { 0x12345678,eax,r15d }
+testcase { 0x67, 0x8f, 0xca, 0x78, 0x12, 0x87, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+r15d,eax }
+testcase { 0x67, 0x8f, 0xca, 0x70, 0x12, 0x86, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+r14d,ecx }
+testcase { 0x67, 0x8f, 0xca, 0x68, 0x12, 0x85, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+r13d,edx }
+testcase { 0x67, 0x8f, 0xca, 0x60, 0x12, 0x84, 0x24, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12	  }, { lwpins }, { 0x12345678,0xcafe+r12d,ebx }
+testcase { 0x67, 0x8f, 0xca, 0x58, 0x12, 0x83, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+r11d,esp }
+testcase { 0x67, 0x8f, 0xca, 0x50, 0x12, 0x82, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+r10d,ebp }
+testcase { 0x67, 0x8f, 0xca, 0x48, 0x12, 0x81, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+r9d,esi }
+testcase { 0x67, 0x8f, 0xca, 0x40, 0x12, 0x80, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+r8d,edi }
+testcase { 0x67, 0x8f, 0xea, 0x38, 0x12, 0x87, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+edi,r8d }
+testcase { 0x67, 0x8f, 0xea, 0x30, 0x12, 0x86, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+esi,r9d }
+testcase { 0x67, 0x8f, 0xea, 0x28, 0x12, 0x85, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+ebp,r10d }
+testcase { 0x67, 0x8f, 0xea, 0x20, 0x12, 0x84, 0x24, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12	  }, { lwpins }, { 0x12345678,0xcafe+esp,r11d }
+testcase { 0x67, 0x8f, 0xea, 0x18, 0x12, 0x83, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+ebx,r12d }
+testcase { 0x67, 0x8f, 0xea, 0x10, 0x12, 0x82, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+edx,r13d }
+testcase { 0x67, 0x8f, 0xea, 0x08, 0x12, 0x81, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+ecx,r14d }
+testcase { 0x67, 0x8f, 0xea, 0x00, 0x12, 0x80, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpins }, { 0x12345678,0xcafe+eax,r15d }
+testcase { 0x67, 0x8f, 0xca, 0x78, 0x12, 0x8f, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+r15d,eax }
+testcase { 0x67, 0x8f, 0xca, 0x70, 0x12, 0x8e, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+r14d,ecx }
+testcase { 0x67, 0x8f, 0xca, 0x68, 0x12, 0x8d, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+r13d,edx }
+testcase { 0x67, 0x8f, 0xca, 0x60, 0x12, 0x8c, 0x24, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12	  }, { lwpval }, { 0x12345678,0xcafe+r12d,ebx }
+testcase { 0x67, 0x8f, 0xca, 0x58, 0x12, 0x8b, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+r11d,esp }
+testcase { 0x67, 0x8f, 0xca, 0x50, 0x12, 0x8a, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+r10d,ebp }
+testcase { 0x67, 0x8f, 0xca, 0x48, 0x12, 0x89, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+r9d,esi }
+testcase { 0x67, 0x8f, 0xca, 0x40, 0x12, 0x88, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+r8d,edi }
+testcase { 0x67, 0x8f, 0xea, 0x38, 0x12, 0x8f, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+edi,r8d }
+testcase { 0x67, 0x8f, 0xea, 0x30, 0x12, 0x8e, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+esi,r9d }
+testcase { 0x67, 0x8f, 0xea, 0x28, 0x12, 0x8d, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+ebp,r10d }
+testcase { 0x67, 0x8f, 0xea, 0x20, 0x12, 0x8c, 0x24, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12	  }, { lwpval }, { 0x12345678,0xcafe+esp,r11d }
+testcase { 0x67, 0x8f, 0xea, 0x18, 0x12, 0x8b, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+ebx,r12d }
+testcase { 0x67, 0x8f, 0xea, 0x10, 0x12, 0x8a, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+edx,r13d }
+testcase { 0x67, 0x8f, 0xea, 0x08, 0x12, 0x89, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+ecx,r14d }
+testcase { 0x67, 0x8f, 0xea, 0x00, 0x12, 0x88, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12		  }, { lwpval }, { 0x12345678,0xcafe+eax,r15d }

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/lwp.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/lwp.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/macro-defaults-nowarn.stderr Added

@@ -0,0 +1,36 @@
+./travis/test/macro-defaults.asm:9: warning: 2 one a  -w+user
+./travis/test/macro-defaults.asm:7: ... from macro `mmac_fix' defined here
+./travis/test/macro-defaults.asm:16: warning: 3 one a b  -w+user
+./travis/test/macro-defaults.asm:14: ... from macro `mmac_var' defined here
+./travis/test/macro-defaults.asm:17: warning: 3 one two b  -w+user
+./travis/test/macro-defaults.asm:14: ... from macro `mmac_var' defined here
+./travis/test/macro-defaults.asm:27: warning: 2 one a,b  -w+user
+./travis/test/macro-defaults.asm:24: ... from macro `mmac_plus' defined here
+./travis/test/macro-defaults.asm:28: warning: 2 one two  -w+user
+./travis/test/macro-defaults.asm:24: ... from macro `mmac_plus' defined here
+./travis/test/macro-defaults.asm:29: warning: 2 one two,three  -w+user
+./travis/test/macro-defaults.asm:24: ... from macro `mmac_plus' defined here
+./travis/test/macro-defaults.asm:37: warning: 3 one a b  -w+user
+./travis/test/macro-defaults.asm:35: ... from macro `mmac_star' defined here
+./travis/test/macro-defaults.asm:38: warning: 3 one two b  -w+user
+./travis/test/macro-defaults.asm:35: ... from macro `mmac_star' defined here
+./travis/test/macro-defaults.asm:39: warning: 3 one two three  -w+user
+./travis/test/macro-defaults.asm:35: ... from macro `mmac_star' defined here
+./travis/test/macro-defaults.asm:47: warning: 2 a b  -w+user
+./travis/test/macro-defaults.asm:42: ... from macro `mmac_rotate' defined here
+./travis/test/macro-defaults.asm:47: warning: 2 b a  -w+user
+./travis/test/macro-defaults.asm:45: ... from macro `mmac_rotate' defined here
+./travis/test/macro-defaults.asm:48: warning: 2 one b  -w+user
+./travis/test/macro-defaults.asm:42: ... from macro `mmac_rotate' defined here
+./travis/test/macro-defaults.asm:48: warning: 2 b one  -w+user
+./travis/test/macro-defaults.asm:45: ... from macro `mmac_rotate' defined here
+./travis/test/macro-defaults.asm:49: warning: 2 one two  -w+user
+./travis/test/macro-defaults.asm:42: ... from macro `mmac_rotate' defined here
+./travis/test/macro-defaults.asm:49: warning: 2 two one  -w+user
+./travis/test/macro-defaults.asm:45: ... from macro `mmac_rotate' defined here
+./travis/test/macro-defaults.asm:50: warning: 3 one two three  -w+user
+./travis/test/macro-defaults.asm:42: ... from macro `mmac_rotate' defined here
+./travis/test/macro-defaults.asm:50: warning: 3 two three one  -w+user
+./travis/test/macro-defaults.asm:45: ... from macro `mmac_rotate' defined here
+./travis/test/macro-defaults.asm:64: warning: 0 0 0  -w+user
+./travis/test/macro-defaults.asm:58: ... from macro `mmac_scope' defined here

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/macro-defaults-warn.stderr Added

@@ -0,0 +1,39 @@
+./travis/test/macro-defaults.asm:4: warning: too many default macro parameters in macro `mmac_fix' -w+pp-macro-defaults
+./travis/test/macro-defaults.asm:9: warning: 2 one a  -w+user
+./travis/test/macro-defaults.asm:7: ... from macro `mmac_fix' defined here
+./travis/test/macro-defaults.asm:11: warning: too many default macro parameters in macro `mmac_var' -w+pp-macro-defaults
+./travis/test/macro-defaults.asm:16: warning: 3 one a b  -w+user
+./travis/test/macro-defaults.asm:14: ... from macro `mmac_var' defined here
+./travis/test/macro-defaults.asm:17: warning: 3 one two b  -w+user
+./travis/test/macro-defaults.asm:14: ... from macro `mmac_var' defined here
+./travis/test/macro-defaults.asm:27: warning: 2 one a,b  -w+user
+./travis/test/macro-defaults.asm:24: ... from macro `mmac_plus' defined here
+./travis/test/macro-defaults.asm:28: warning: 2 one two  -w+user
+./travis/test/macro-defaults.asm:24: ... from macro `mmac_plus' defined here
+./travis/test/macro-defaults.asm:29: warning: 2 one two,three  -w+user
+./travis/test/macro-defaults.asm:24: ... from macro `mmac_plus' defined here
+./travis/test/macro-defaults.asm:37: warning: 3 one a b  -w+user
+./travis/test/macro-defaults.asm:35: ... from macro `mmac_star' defined here
+./travis/test/macro-defaults.asm:38: warning: 3 one two b  -w+user
+./travis/test/macro-defaults.asm:35: ... from macro `mmac_star' defined here
+./travis/test/macro-defaults.asm:39: warning: 3 one two three  -w+user
+./travis/test/macro-defaults.asm:35: ... from macro `mmac_star' defined here
+./travis/test/macro-defaults.asm:47: warning: 2 a b  -w+user
+./travis/test/macro-defaults.asm:42: ... from macro `mmac_rotate' defined here
+./travis/test/macro-defaults.asm:47: warning: 2 b a  -w+user
+./travis/test/macro-defaults.asm:45: ... from macro `mmac_rotate' defined here
+./travis/test/macro-defaults.asm:48: warning: 2 one b  -w+user
+./travis/test/macro-defaults.asm:42: ... from macro `mmac_rotate' defined here
+./travis/test/macro-defaults.asm:48: warning: 2 b one  -w+user
+./travis/test/macro-defaults.asm:45: ... from macro `mmac_rotate' defined here
+./travis/test/macro-defaults.asm:49: warning: 2 one two  -w+user
+./travis/test/macro-defaults.asm:42: ... from macro `mmac_rotate' defined here
+./travis/test/macro-defaults.asm:49: warning: 2 two one  -w+user
+./travis/test/macro-defaults.asm:45: ... from macro `mmac_rotate' defined here
+./travis/test/macro-defaults.asm:50: warning: 3 one two three  -w+user
+./travis/test/macro-defaults.asm:42: ... from macro `mmac_rotate' defined here
+./travis/test/macro-defaults.asm:50: warning: 3 two three one  -w+user
+./travis/test/macro-defaults.asm:45: ... from macro `mmac_rotate' defined here
+./travis/test/macro-defaults.asm:57: warning: too many default macro parameters in macro `mmac_scope' -w+pp-macro-defaults
+./travis/test/macro-defaults.asm:64: warning: 0 0 0  -w+user
+./travis/test/macro-defaults.asm:58: ... from macro `mmac_scope' defined here

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/macro-defaults.asm Added

@@ -0,0 +1,64 @@
+;Testname=warning;    Arguments=-fbin -omacdef.bin -w+macro-defaults; Files=stdout stderr macdef.bin
+;Testname=nonwarning; Arguments=-fbin -omacdef.bin -w-macro-defaults; Files=stdout stderr macdef.bin
+
+%MACRO mmac_fix 1 a
+ ; While defined to take one parameter, any invocation will
+ ; see two, due to the default parameter.
+ %warning %0 %1 %2 %3 %4 %5
+%ENDMACRO
+mmac_fix one
+
+%MACRO mmac_var 1-2 a,b
+ ; While defined to take one or two parameters, invocations
+ ; will see three, due to the default parameters.
+ %warning %0 %1 %2 %3 %4 %5
+%ENDMACRO
+mmac_var one
+mmac_var one,two
+
+%MACRO mmac_plus 1-2+ a,b
+ ; This does not warn. Although this looks like two default
+ ; parameters, it ends up being only one: the "+" limits it
+ ; to two parameters; if invoked without a second parameter
+ ; the second parameter will be "a,b".
+ %warning %0 %1 %2 %3 %4 %5
+ ;Check rotating behaviour
+%ENDMACRO
+mmac_plus one
+mmac_plus one,two
+mmac_plus one,two,three
+
+%MACRO mmac_star 1-* a,b
+ ; This does not warn. Because the "*" extends the range of
+ ; parameters to infinity, the "a,b" default parameters can
+ ; not exceed that range.
+ %warning %0 %1 %2 %3 %4 %5
+%ENDMACRO
+mmac_star one
+mmac_star one,two
+mmac_star one,two,three
+
+%MACRO mmac_rotate 0-* a,b
+ %warning %0 %1 %2 %3 %4 %5
+ ;%rotate should rotate all parameters
+ %rotate 1
+ %warning %0 %1 %2 %3 %4 %5
+%ENDMACRO
+mmac_rotate
+mmac_rotate one
+mmac_rotate one,two
+mmac_rotate one,two,three
+
+;Scope / evaluation time test
+%define  I 0
+%assign  J 0
+%xdefine K 0
+
+%MACRO mmac_scope 0 I J K
+ %warning %1 %2 %3
+%ENDMACRO
+
+%define  I 1
+%assign  J 1
+%xdefine K 1
+mmac_scope

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/macro-defaults.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/masmdisp.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/masmdisp.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/masmdisp.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/mmxsize.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/mmxsize.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/mmxsize.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/mout.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/mout.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/movd.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/movd.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/movd.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/movd64.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/movd64.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/movd64.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/movd64.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/movhpd.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/movhpd.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/movhpd.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/movimm-o0.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/movimm-o0.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/movimm-ox.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/movimm-ox.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/movimm.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/movimm.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/movnti.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/movnti.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/movnti.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/mpx-64.asm Added

@@ -0,0 +1,119 @@
+BITS 64
+
+	bndmk bnd1, r11
+	bndmk bnd1, rax
+	bndmk bnd1, 0x399
+	bndmk bnd1, r9+0x3
+	bndmk bnd1, rax+0x3
+	bndmk bnd1, 3,1*r12
+	bndmk bnd1, rax+rcx
+	bndmk bnd1, r11+1*rax+0x3
+	bndmk bnd1, rbx+1*r9+0x3
+
+	; bndmov
+	bndmov bnd1, r11
+	bndmov bnd1, rax
+	bndmov bnd1, 0x399
+	bndmov bnd2, r9+0x3
+	bndmov bnd2, rax+0x3
+	bndmov bnd0, 1*r12+0x3
+	bndmov bnd2, rax+rdx
+	bndmov bnd1, r11+1*rax+0x3
+	bndmov bnd1, rbx+1*r9+0x3
+	bndmov bnd0, bnd2
+
+	bndmov r11, bnd1
+	bndmov rax, bnd1
+	bndmov 0x399, bnd1
+	bndmov r9+0x3, bnd2
+	bndmov rax+0x3, bnd2
+	bndmov 1*r12+0x3, bnd0
+	bndmov rax+rdx, bnd2
+	bndmov r11+1*rax+0x3, bnd1
+	bndmov rbx+1*r9+0x3, bnd1
+	bndmov bnd2, bnd0
+
+	; bndcl
+	bndcl bnd1, r11
+	bndcl bnd1, rax
+	bndcl bnd1, r11
+	bndcl bnd1, rcx
+	bndcl bnd1, 0x399
+	bndcl bnd1, r9+0x3
+	bndcl bnd1, rax+0x3
+	bndcl bnd1, 1*r12+0x3
+	bndcl bnd1, rax+rcx
+	bndcl bnd1, r11+1*rax+0x3
+	bndcl bnd1, rbx+1*r9+0x3
+
+	; bndcu
+	bndcu bnd1, r11
+	bndcu bnd1, rax
+	bndcu bnd1, r11
+	bndcu bnd1, rcx
+	bndcu bnd1, 0x399
+	bndcu bnd1, r9+0x3
+	bndcu bnd1, rax+0x3
+	bndcu bnd1, 1*r12+0x3
+	bndcu bnd1, rax+rcx
+	bndcu bnd1, r11+1*rax+0x3
+	bndcu bnd1, rbx+1*r9+0x3
+
+	; bndcn
+	bndcn bnd1, r11
+	bndcn bnd1, rax
+	bndcn bnd1, r11
+	bndcn bnd1, rcx
+	bndcn bnd1, 0x399
+	bndcn bnd1, r9+0x3
+	bndcn bnd1, rax+0x3
+	bndcn bnd1, 1*r9+0x3
+	bndcn bnd1, rax+rcx
+	bndcn bnd1, r11+1*rax+0x3
+	bndcn bnd1, rbx+1*r9+0x3
+
+	; bndstx
+	; next 5 lines should be parsed same
+	bndstx rax+0x3,rbx, bnd0	; NASM - split EA
+	bndstx rax+rbx*1+0x3, bnd0	; GAS
+	bndstx rax+rbx+3, bnd0	; GAS
+	bndstx rax+0x3, bnd0, rbx	; ICC-1
+	bndstx rax+0x3, rbx, bnd0	; ICC-2
+
+	; next 5 lines should be parsed same
+	bndstx ,rcx*1, bnd2		; NASM
+	bndstx 0,rcx*1, bnd2		; NASM
+	bndstx 0, bnd2, rcx		; ICC-1
+	bndstx 0, rcx, bnd2		; ICC-2
+	bndstx rcx*1, bnd2		; GAS - rcx is encoded as index only when it is mib
+
+	; next 3 lines should be parsed same
+	bndstx 3,1*r12, bnd2		; NASM
+	bndstx 1*r12+3, bnd2		; GAS
+	bndstx 3, r12, bnd2		; ICC
+
+	bndstx r12+0x399, bnd3
+	bndstx r11+0x1234, bnd1
+	bndstx rbx+0x1234, bnd2
+	bndstx rdx, bnd1
+
+	; bndldx
+	bndldx bnd0, rax+rbx*1+0x3
+	bndldx bnd2, rbx+rdx+3
+	bndldx bnd3, r12+0x399
+	bndldx bnd1, r11+0x1234
+	bndldx bnd2, rbx+0x1234
+	bndldx bnd2, 1*rbx+3
+	bndldx bnd2, 1*r12+3
+	bndldx bnd1, rdx
+
+	; bnd
+	bnd ret
+	bnd call      foo
+	bnd jmp       foo	; when it becomes a Jb form - short jmp (eb),
+				; bnd prefix is silently dropped
+	bnd jmp       near 0	; near jmp (opcode e9)
+;	bnd jmp       short 0	; explicit short jmp (opcode eb) : error
+	bnd jno       foo
+
+foo:	bnd ret

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/mpx-64.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/mpx-64.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/mpx.asm Added

@@ -0,0 +1,89 @@
+;Testname=mpx; Arguments=-felf -ompx.o -O0; Files=stdout stderr mpx.o
+BITS 32
+
+	bndmk bnd1, eax
+	bndmk bnd1, 0x399
+	bndmk bnd1, ecx+0x3
+	bndmk bnd1, eax+ecx
+	bndmk bnd1, ecx*1
+	bndmk bnd1, edx+1*eax+0x3
+
+	; bndmov
+	bndmov bnd1, eax
+	bndmov bnd1, 0x399
+	bndmov bnd1, ecx+0x3
+	bndmov bnd1, eax+ecx
+	bndmov bnd1, ecx*1
+	bndmov bnd1, edx+1*eax+0x3
+	bndmov bnd0, bnd1
+
+	bndmov eax, bnd1
+	bndmov 0x399, bnd1
+	bndmov ecx+0x3, bnd1
+	bndmov eax+ecx, bnd1
+	bndmov ecx*1, bnd1
+	bndmov edx+1*eax+0x3, bnd1
+	bndmov bnd1, bnd0
+
+	; bndcl
+	bndcl bnd1, eax
+	bndcl bnd1, ecx
+	bndcl bnd1, 0x399
+	bndcl bnd1, ecx+0x3
+	bndcl bnd1, eax+ecx
+	bndcl bnd1, ecx*1
+	bndcl bnd1, edx+1*eax+0x3
+
+	; bndcu
+	bndcu bnd1, eax
+	bndcu bnd1, ecx
+	bndcu bnd1, 0x399
+	bndcu bnd1, ecx+0x3
+	bndcu bnd1, eax+ecx
+	bndcu bnd1, ecx*1
+	bndcu bnd1, edx+1*eax+0x3
+
+	; bndcn
+	bndcn bnd1, eax
+	bndcn bnd1, ecx
+	bndcn bnd1, 0x399
+	bndcn bnd1, ecx+0x3
+	bndcn bnd1, eax+ecx
+	bndcn bnd1, ecx*1
+	bndcn bnd1, edx+1*eax+0x3
+
+	; bndstx
+	bndstx eax+ebx*1+0x3, bnd0
+	bndstx eax+0x3,ebx, bnd0
+	bndstx eax+0x3, bnd0, ebx
+	bndstx eax+0x3, ebx, bnd0
+	bndstx ecx*1, bnd2
+	bndstx ,ecx*1, bnd2
+	bndstx 0,ecx*1, bnd2
+	bndstx 0, bnd2, ecx
+	bndstx 0, ecx, bnd2
+	bndstx edx+0x399, bnd3
+	bndstx 1*ebx+3, bnd2
+	bndstx 3,1*ebx, bnd2
+	bndstx 3, ebx, bnd2
+	bndstx edx, bnd1
+
+	; bndldx
+	bndldx bnd0, eax+ebx*1+0x3
+	bndldx bnd2, ebx+edx+3
+	bndldx bnd2, ecx*1
+	bndldx bnd3, edx+0x399
+	bndldx bnd2, 1*ebx+3
+	bndldx bnd2, 3, ebx
+	bndldx bnd1, edx
+
+	; bnd
+	bnd ret
+	bnd call      foo
+	bnd jmp       foo	; when it becomes a Jb form - short jmp (eb),
+				; bnd prefix is silently dropped
+	bnd jmp       near 0	; near jmp (opcode e9)
+;	bnd jmp       short 0	; explicit short jmp (opcode eb) : error
+	bnd jno       foo
+
+foo:	bnd ret

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/mpx.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/mpx.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/multisection-elf32.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/multisection-elf32.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/multisection-elf64.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/multisection-elf64.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/multisection.asm Added

@@ -0,0 +1,96 @@
+;Testname=aout;  Arguments=-faout  -olnxhello.o -Ox; Files=stdout stderr lnxhello.o
+;Testname=aoutb; Arguments=-faoutb -olnxhello.o -Ox; Files=stdout stderr lnxhello.o
+;Testname=as86;  Arguments=-fas86  -olnxhello.o -Ox; Files=stdout stderr lnxhello.o
+;Testname=elf32; Arguments=-felf32 -olnxhello.o -Ox; Files=stdout stderr lnxhello.o
+;Testname=elf64; Arguments=-felf64 -olnxhello.o -Ox; Files=stdout stderr lnxhello.o
+;Testname=obj;   Arguments=-fobj   -olnxhello.o -Ox; Files=stdout stderr lnxhello.o
+;Testname=rdf;   Arguments=-frdf   -olnxhello.o -Ox; Files=stdout stderr lnxhello.o
+;Testname=win32; Arguments=-fwin32 -olnxhello.o -Ox; Files=stdout stderr lnxhello.o
+;Testname=win64; Arguments=-fwin64 -olnxhello.o -Ox; Files=stdout stderr lnxhello.o
+
+; To test where code that is placed before any explicit SECTION
+; gets placed, and what happens if a .text section has an ORG
+;statement, uncomment the following lines.
+;
+;	times	10h	nop
+;
+;section .text
+;org 0x300
+;	times	20h	inc ax
+
+; let's see which of these sections can be placed in the specified order.
+
+section .appspecific
+section .data
+section .stringdata
+section .mytext
+section .code
+section .extra_code
+
+
+section .stringdata
+mystr1: db "Hello, this is string 1", 13, 10, '$'
+
+section .extra_code
+;org 0x200
+bits 16
+more:
+   mov si, asciz1
+   mov ah, 0x0E
+   xor bx, bx
+.print:
+   lodsb
+   test al, al
+   jz .end
+   int  0x10
+   jmp short .print
+.end:
+
+   xor ax, ax
+   int 0x16
+
+   mov ax, 0x4c00
+   int 0x21
+
+section .appspecific
+asciz1: db "This is string 2", 0
+
+section .code
+;org 0x100
+bits 16
+
+start:
+   mov dx, mystr1
+   mov ah, 9
+   int 0x21
+
+   xor ax, ax
+   int 0x16
+
+   jmp more
+
+section .text
+	xor	eax,eax
+	times	50h nop
+
+section .mytext
+
+	xor	ebx,ebx
+
+section .data
+	db	95h,95h,95h,95h,95h,95h,95h,95h
+
+section .hmm
+	resd	2
+
+section .bss
+	resd	8
+
+section .final1
+	inc	ax
+
+section .final2
+	inc	bx
+
+section .final3
+	inc	cx

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/multisection.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/multisection.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/multisection.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/nasmformat-aout.stdout Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/nasmformat-bin.stdout Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/nasmformat-elf32.stdout Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/nasmformat-elf64.stdout Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/nasmformat-hex.stdout Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/nasmformat-ieee.stdout Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/nasmformat-macho32.stdout Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/nasmformat-macho64.stdout Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/nasmformat-obj.stdout Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/nasmformat-win32.stdout Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/nasmformat-win64.stdout Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/nasmformat.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/nasmformat.json Added

@@ -0,0 +1,84 @@
+
+	{
+		"description": "Test __OUTPUT_FORMAT__ directive (bin)",
+		"id": "nasmformat",
+		"format": "bin",
+		"source": "nasmformat.asm",
+		"option": "-E -Ox",
+		"target": 
+			{ "stdout": "nasmformat-bin.stdout" }
+		
+	},
+	{
+		"description": "Test __OUTPUT_FORMAT__ directive (elf32)",
+		"ref": "nasmformat",
+		"format": "elf32",
+		"target": 
+			{ "stdout": "nasmformat-elf32.stdout" }
+		
+	},
+	{
+		"description": "Test __OUTPUT_FORMAT__ directive (elf64)",
+		"ref": "nasmformat",
+		"format": "elf64",
+		"target": 
+			{ "stdout": "nasmformat-elf64.stdout" }
+		
+	},
+	{
+		"description": "Test __OUTPUT_FORMAT__ directive (macho32)",
+		"ref": "nasmformat",
+		"format": "macho32",
+		"target": 
+			{ "stdout": "nasmformat-macho32.stdout" }
+		
+	},
+	{
+		"description": "Test __OUTPUT_FORMAT__ directive (macho64)",
+		"ref": "nasmformat",
+		"format": "macho64",
+		"target": 
+			{ "stdout": "nasmformat-macho64.stdout" }
+		
+	},
+	{
+		"description": "Test __OUTPUT_FORMAT__ directive (aout)",
+		"ref": "nasmformat",
+		"format": "aout",
+		"target": 
+			{ "stdout": "nasmformat-aout.stdout" }
+		
+	},
+	{
+		"description": "Test __OUTPUT_FORMAT__ directive (win32)",
+		"ref": "nasmformat",
+		"format": "win32",
+		"target": 
+			{ "stdout": "nasmformat-win32.stdout" }
+		
+	},
+	{
+		"description": "Test __OUTPUT_FORMAT__ directive (win64)",
+		"ref": "nasmformat",
+		"format": "win64",
+		"target": 
+			{ "stdout": "nasmformat-win64.stdout" }
+		
+	},
+	{
+		"description": "Test __OUTPUT_FORMAT__ directive (obj)",
+		"ref": "nasmformat",
+		"format": "obj",
+		"target": 
+			{ "stdout": "nasmformat-obj.stdout" }
+		
+	},
+	{
+		"description": "Test __OUTPUT_FORMAT__ directive (ieee)",
+		"ref": "nasmformat",
+		"format": "ieee",
+		"target": 
+			{ "stdout": "nasmformat-ieee.stdout" }
+		
+	}
+

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/newrdwr.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/newrdwr.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/newrdwr.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/nop.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/nop.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/nop.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/null.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/null.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/null.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/nullfile.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/nullfile.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/nullfile.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/obj.asm Added

@@ -0,0 +1,87 @@
+;Testname=unoptimized; Arguments=-O0 -fobj -oobj.o; Files=stdout stderr obj.o
+;Testname=optimized;   Arguments=-Ox -fobj -oobj.o; Files=stdout stderr obj.o
+
+; test source file for assembling to Microsoft 16-bit .OBJ
+; build with (16-bit Microsoft C):
+;    nasm -f obj objtest.asm
+;    cl /AL objtest.obj objlink.c
+; other compilers should work too, provided they handle large
+; model in the same way as MS C
+
+; This file should test the following:
+; 1 Define and export a global symbol
+; 2 Define a non-global symbol
+; 3 Define a common symbol
+; 4 Define a NASM local label
+; 5 Reference a NASM local label
+; 6 Import an external symbol
+; 7 Make a PC-relative relocated reference
+; 8 Reference a symbol in the same section as itself
+; 9 Reference a symbol in a different segment from itself
+; 10 Define a segment group
+; 11 Take the offset of a symbol in a grouped segment w.r.t. its segment
+; 12 Reserve uninitialised data space in a segment
+; 13 Directly take the segment address of a segment
+; 14 Directly take the segment address of a group
+; 15 Use SEG on a non-external
+; 16 Use SEG on an external
+
+	  bits 16
+
+	  global _bsssym	; 1
+	  global _function	; 1
+	  global _selfptr	; 1
+	  global _selfptr2	; 1
+	  common _commvar 2	; 3
+	  extern _printf	; 6
+
+	  group mygroup mybss mydata
+	  group mygroup2 mycode mycode2
+
+	  segment mycode private
+
+_function push bp
+	  mov bp,sp
+	  push ds
+	  mov ax,mygroup	; 14
+	  mov ds,ax
+	  inc word _bsssym	; 9
+	  mov ax,seg _commvar
+	  mov ds,ax
+	  dec word _commvar
+	  pop ds
+	  mov ax,bp+6
+	  mov dx,bp+8
+	  push dx
+	  push ax
+	  push dx
+	  push ax
+	  call far cs:.printf	; 5 8
+	  pop ax
+	  pop ax
+	  call trampoline	; 7
+	  pop ax
+	  pop ax
+	  mov sp,bp
+	  pop bp
+	  retf
+
+.printf	  dw _printf, seg _printf ; 2 4 16
+.printfd  dd _printf, seg _printf ; 2 4 16
+.printfq  dq _printf, seg _printf ; 2 4 16
+
+	  segment mycode2 private
+
+trampoline: pop ax
+	  push cs
+	  push ax
+	  jmp far _printf
+
+	  segment mybss private
+
+_bsssym	  resw 64		; 12
+
+	  segment mydata private
+
+_selfptr  dw _selfptr, seg _selfptr ; 8 15
+_selfptr2 dw _selfptr2 wrt mydata, mydata ; 11 13

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/obj.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/obj.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/obj.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/objexe.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/objexe.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/objexe.obj.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/optimization-o0.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/optimization-o1.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/optimization-ox.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/optimization.asm Added

@@ -0,0 +1,100 @@
+BITS 32
+
+; Simple
+jmp foo
+times 124 nop
+foo:
+
+; Must start short to converge optimally
+jmp car
+times 127 nop
+car:
+
+; Always near
+jmp cdr
+times 128 nop
+cdr:
+
+
+; Simple
+add eax, quux2 - quux1
+quux1:
+times 127 nop
+quux2:
+
+; Must start short
+corge1:
+add eax, corge2 - corge1
+times 127 - 3 nop
+corge2:
+
+
+; Simple
+lea eax, bolug2-bolug1
+bolug1:
+times 127 nop
+bolug2:
+
+; Must start short
+calog1:
+lea eax, calog2-calog1
+times 127 - 3 nop
+calog2:
+
+
+; Simple
+lea eax, eax+dolug2-dolug1
+dolug1:
+times 127 nop
+dolug2:
+
+; Must start short
+ealog1:
+lea eax, eax+ealog2-ealog1
+times 127 - 3 nop
+ealog2:
+
+; Must stay long!
+lea eax, eax+folug2-folug1
+folug1:
+times 128 nop
+folug2:
+
+; Must stay long!
+galog1:
+lea eax, eax+galog2-galog1
+times 128 - 3 nop
+galog2:
+
+; Sbyte tests...
+onetwentysix	equ 126
+onetwentynine	equ 129
+
+add eax,onetwentyseven		; sbyte (forward)
+add eax,onetwentyeight		; not sbyte (forward)
+add eax,onetwentyseven		; sbyte (forward)
+add eax,onetwentysix		; sbyte (backward)
+add eax,onetwentynine		; not sbyte (backward)
+add ecx,onetwentyseven		; sbyte (forward)
+add ecx,onetwentyeight		; not sbyte (forward)
+add ecx,onetwentyseven		; sbyte (forward)
+add ecx,onetwentysix		; sbyte (backward)
+add ecx,onetwentynine		; not sbyte (backward)
+
+onetwentyseven	equ 127
+onetwentyeight	equ 128
+
+; Simple
+add eax, holug2-holug1
+holug1:
+times 127 nop
+holug2:
+
+; Must start short
+ialog1:
+add eax, ialog2-ialog1
+times 127 - 3 nop
+ialog2:
+
+; Do not confuse forward references and segmentless addresses!
+jmp 12345

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/optimization.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/org.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/org.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/org.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/pinsr.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/pinsr16.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/pinsr16.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/pinsr32.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/pinsr32.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/pinsr64.asm Added

@@ -0,0 +1,67 @@
+	bits 64
+
+	pinsrw mm0,eax,0
+	pinsrw mm1,si,0
+	pinsrw mm2,rcx,0
+	pinsrw mm3,word rcx,0
+
+	pinsrb xmm0,eax,0
+	pinsrb xmm1,sil,0
+;	pinsrb xmm1,bh,0
+	pinsrb xmm2,rcx,0
+	pinsrb xmm3,byte rcx,0
+
+	pinsrw xmm0,eax,0
+	pinsrw xmm1,si,0
+	pinsrw xmm2,rcx,0
+	pinsrw xmm3,word rcx,0
+
+	pinsrd xmm0,eax,0
+	pinsrd xmm1,esi,0
+	pinsrd xmm2,rcx,0
+	pinsrd xmm3,dword rcx,0
+
+	pinsrq xmm0,rax,0
+	pinsrq xmm1,rsi,0
+	pinsrq xmm2,rcx,0
+	pinsrq xmm3,qword rcx,0
+
+	vpinsrb xmm0,eax,0
+	vpinsrb xmm1,sil,0
+	vpinsrb xmm2,rcx,0
+	vpinsrb xmm3,byte rcx,0
+
+	vpinsrw xmm0,eax,0
+	vpinsrw xmm1,si,0
+	vpinsrw xmm2,rcx,0
+	vpinsrw xmm3,word rcx,0
+
+	vpinsrd xmm0,eax,0
+	vpinsrd xmm1,esi,0
+	vpinsrd xmm2,rcx,0
+	vpinsrd xmm3,dword rcx,0
+
+	vpinsrq xmm0,rax,0
+	vpinsrq xmm1,rsi,0
+	vpinsrq xmm2,rcx,0
+	vpinsrq xmm3,qword rcx,0
+
+	vpinsrb xmm4,xmm0,eax,0
+	vpinsrb xmm5,xmm1,sil,0
+	vpinsrb xmm6,xmm2,rcx,0
+	vpinsrb xmm7,xmm3,byte rcx,0
+
+	vpinsrw xmm4,xmm0,eax,0
+	vpinsrw xmm5,xmm1,si,0
+	vpinsrw xmm6,xmm2,rcx,0
+	vpinsrw xmm7,xmm3,word rcx,0
+
+	vpinsrd xmm4,xmm0,eax,0
+	vpinsrd xmm5,xmm1,esi,0
+	vpinsrd xmm6,xmm2,rcx,0
+	vpinsrd xmm7,xmm3,dword rcx,0
+
+	vpinsrq xmm4,xmm0,rax,0
+	vpinsrq xmm5,xmm1,rsi,0
+	vpinsrq xmm6,xmm2,rcx,0
+	vpinsrq xmm7,xmm3,qword rdx,0

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/pinsr64.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/popcnt.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/popcnt.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/popcnt.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ppindirect.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ppindirect.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ppindirect.stdout Added

@@ -0,0 +1,103 @@
+%line 3+1 ./travis/test/ppindirect.asm
+bits 64
+
+%line 12+1 ./travis/test/ppindirect.asm
+ dd 2222*100
+ dd 22*100
+
+
+
+ dd 11
+ dd 22
+ dd 33
+ dd 1111
+ dd 222200
+ dd 3333
+
+
+ dd 999999
+
+%line 35+1 ./travis/test/ppindirect.asm
+
+%line 32+1 ./travis/test/ppindirect.asm
+ db 1
+ db '1'
+%line 32+1 ./travis/test/ppindirect.asm
+ db 2
+ db '2'
+%line 32+1 ./travis/test/ppindirect.asm
+ db 3
+ db '3'
+%line 32+1 ./travis/test/ppindirect.asm
+ db 4
+ db '4'
+%line 32+1 ./travis/test/ppindirect.asm
+ db 5
+ db '5'
+%line 32+1 ./travis/test/ppindirect.asm
+ db 6
+ db '6'
+%line 32+1 ./travis/test/ppindirect.asm
+ db 7
+ db '7'
+%line 32+1 ./travis/test/ppindirect.asm
+ db 8
+ db '8'
+%line 32+1 ./travis/test/ppindirect.asm
+ db 9
+ db '9'
+%line 32+1 ./travis/test/ppindirect.asm
+ db 10
+ db '10'
+%line 32+1 ./travis/test/ppindirect.asm
+ db 11
+ db '11'
+%line 32+1 ./travis/test/ppindirect.asm
+ db 12
+ db '12'
+%line 32+1 ./travis/test/ppindirect.asm
+ db 13
+ db '13'
+%line 32+1 ./travis/test/ppindirect.asm
+ db 14
+ db '14'
+%line 32+1 ./travis/test/ppindirect.asm
+ db 15
+ db '15'
+%line 32+1 ./travis/test/ppindirect.asm
+ db 16
+ db '16'
+%line 32+1 ./travis/test/ppindirect.asm
+ db 17
+ db '17'
+%line 32+1 ./travis/test/ppindirect.asm
+ db 18
+ db '18'
+%line 32+1 ./travis/test/ppindirect.asm
+ db 19
+ db '19'
+%line 32+1 ./travis/test/ppindirect.asm
+ db 20
+ db '20'
+%line 40+1 ./travis/test/ppindirect.asm
+ db 20
+%line 40+0 ./travis/test/ppindirect.asm
+ db 19
+ db 18
+ db 17
+ db 16
+ db 15
+ db 14
+ db 13
+ db 12
+ db 11
+ db 10
+ db 9
+ db 8
+ db 7
+ db 6
+ db 5
+ db 4
+ db 3
+ db 2
+ db 1

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/pragma.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/pragma.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/pragma.stdout Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/prefix66.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/prefix66.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/prefix66.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/prefix66.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/pushseg.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/pushseg.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/pushseg.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/pushseg.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/r13.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/r13.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/r13.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/radix.asm Added

@@ -0,0 +1,52 @@
+	;;  Integer constants...
+
+	dd 1010_0101		; Decimal
+	dd 01010_0101		; Decimal (*not* octal!)
+	dd 0d1010_0101		; Decimal
+	dd 0t1010_0101		; Decimal
+	dd 1010_0101d		; Decimal
+	dd 1010_0101t		; Decimal
+
+	dd 0b1010_0101		; Binary
+	dd 0y1010_0101		; Binary
+	dd 1010_0101b		; Binary
+	dd 1010_0101y		; Binary
+
+	dd 0o1010_0101		; Octal
+	dd 0q1010_0101		; Octal
+	dd 1010_0101o		; Octal
+	dd 1010_0101q		; Octal
+
+	dd 0h1010_0101		; Hex
+	dd 0x1010_0101		; Hex
+	dd 1010_0101h		; Hex
+	dd 1010_0101x		; Hex
+	dd $1010_0101		; Hex
+
+	db 0h			; Zero!
+	db 0x			; Zero!
+	db 0b			; Zero!
+	db 0dh			; Hex
+	db 0bh			; Hex
+	db 0dx			; Hex
+	db 0bx			; Hex
+	db 0hd			; Hex
+	db 0hb			; Hex
+	db 0xd			; Hex
+	db 0xb			; Hex
+
+	;; Floating-point constants
+	;; All of these should output B4A21147
+	dd 3.7282705e+4		; Decimal
+	dd 00003.7282705e+4	; Decimal
+	dd 0d3.7282705e+4	; Decimal
+	dd 0t3.7282705e+4	; Decimal
+
+	dd 0x1.23456789p+15	; Hex
+	dd 0h1.23456789p+15	; Hex
+
+	dd 0o1.10642547422p+15	; Octal
+	dd 0q1.10642547422p+15	; Octal
+
+	dd 0b1.0010_0011_0100_0101_0110_0111_1000_1001p+15 ; Binary
+	dd 0y1.0010_0011_0100_0101_0110_0111_1000_1001p+15 ; Binary

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/radix.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/radix.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/rdpid.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/rdpid.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/rdpid.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/rdpid.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ret-16.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ret-32.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ret-64.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ret.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ret.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ret.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/riprel.asm Added

@@ -0,0 +1,5357 @@
+;Testname=unoptimized; Arguments=-fbin -oriprel.bin -O0; Files=stdout stderr riprel.bin
+;Testname=optimized;   Arguments=-fbin -oriprel.bin -Ox; Files=stdout stderr riprel.bin
+	bits 64
+
+	default abs
+
+	mov al,foo
+	mov bl,foo
+	mov ax,foo
+	mov bx,foo
+	mov eax,foo
+	mov ebx,foo
+	mov rax,foo
+	mov rbx,foo
+	mov al,0xaaaaaaaaaaaaaaaa
+	mov bl,0xaaaaaaaaaaaaaaaa
+	mov ax,0xaaaaaaaaaaaaaaaa
+	mov bx,0xaaaaaaaaaaaaaaaa
+	mov eax,0xaaaaaaaaaaaaaaaa
+	mov ebx,0xaaaaaaaaaaaaaaaa
+	mov rax,0xaaaaaaaaaaaaaaaa
+	mov rbx,0xaaaaaaaaaaaaaaaa
+	mov al,0xbbbbbbbb
+	mov bl,0xbbbbbbbb
+	mov ax,0xbbbbbbbb
+	mov bx,0xbbbbbbbb
+	mov eax,0xbbbbbbbb
+	mov ebx,0xbbbbbbbb
+	mov rax,0xbbbbbbbb
+	mov rbx,0xbbbbbbbb
+	mov al,0xffffffffcccccccc
+	mov bl,0xffffffffcccccccc
+	mov ax,0xffffffffcccccccc
+	mov bx,0xffffffffcccccccc
+	mov eax,0xffffffffcccccccc
+	mov ebx,0xffffffffcccccccc
+	mov rax,0xffffffffcccccccc
+	mov rbx,0xffffffffcccccccc
+
+	mov al,dword foo
+	mov bl,dword foo
+	mov ax,dword foo
+	mov bx,dword foo
+	mov eax,dword foo
+	mov ebx,dword foo
+	mov rax,dword foo
+	mov rbx,dword foo
+	mov al,dword 0xaaaaaaaaaaaaaaaa
+	mov bl,dword 0xaaaaaaaaaaaaaaaa
+	mov ax,dword 0xaaaaaaaaaaaaaaaa
+	mov bx,dword 0xaaaaaaaaaaaaaaaa
+	mov eax,dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,dword 0xaaaaaaaaaaaaaaaa
+	mov rax,dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,dword 0xaaaaaaaaaaaaaaaa
+	mov al,dword 0xbbbbbbbb
+	mov bl,dword 0xbbbbbbbb
+	mov ax,dword 0xbbbbbbbb
+	mov bx,dword 0xbbbbbbbb
+	mov eax,dword 0xbbbbbbbb
+	mov ebx,dword 0xbbbbbbbb
+	mov rax,dword 0xbbbbbbbb
+	mov rbx,dword 0xbbbbbbbb
+	mov al,dword 0xffffffffcccccccc
+	mov bl,dword 0xffffffffcccccccc
+	mov ax,dword 0xffffffffcccccccc
+	mov bx,dword 0xffffffffcccccccc
+	mov eax,dword 0xffffffffcccccccc
+	mov ebx,dword 0xffffffffcccccccc
+	mov rax,dword 0xffffffffcccccccc
+	mov rbx,dword 0xffffffffcccccccc
+
+	mov al,qword foo
+	mov bl,qword foo
+	mov ax,qword foo
+	mov bx,qword foo
+	mov eax,qword foo
+	mov ebx,qword foo
+	mov rax,qword foo
+	mov rbx,qword foo
+	mov al,qword 0xaaaaaaaaaaaaaaaa
+	mov bl,qword 0xaaaaaaaaaaaaaaaa
+	mov ax,qword 0xaaaaaaaaaaaaaaaa
+	mov bx,qword 0xaaaaaaaaaaaaaaaa
+	mov eax,qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,qword 0xaaaaaaaaaaaaaaaa
+	mov rax,qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,qword 0xaaaaaaaaaaaaaaaa
+	mov al,qword 0xbbbbbbbb
+	mov bl,qword 0xbbbbbbbb
+	mov ax,qword 0xbbbbbbbb
+	mov bx,qword 0xbbbbbbbb
+	mov eax,qword 0xbbbbbbbb
+	mov ebx,qword 0xbbbbbbbb
+	mov rax,qword 0xbbbbbbbb
+	mov rbx,qword 0xbbbbbbbb
+	mov al,qword 0xffffffffcccccccc
+	mov bl,qword 0xffffffffcccccccc
+	mov ax,qword 0xffffffffcccccccc
+	mov bx,qword 0xffffffffcccccccc
+	mov eax,qword 0xffffffffcccccccc
+	mov ebx,qword 0xffffffffcccccccc
+	mov rax,qword 0xffffffffcccccccc
+	mov rbx,qword 0xffffffffcccccccc
+
+	mov al,a64 foo
+	mov bl,a64 foo
+	mov ax,a64 foo
+	mov bx,a64 foo
+	mov eax,a64 foo
+	mov ebx,a64 foo
+	mov rax,a64 foo
+	mov rbx,a64 foo
+	mov al,a64 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 0xaaaaaaaaaaaaaaaa
+	mov al,a64 0xbbbbbbbb
+	mov bl,a64 0xbbbbbbbb
+	mov ax,a64 0xbbbbbbbb
+	mov bx,a64 0xbbbbbbbb
+	mov eax,a64 0xbbbbbbbb
+	mov ebx,a64 0xbbbbbbbb
+	mov rax,a64 0xbbbbbbbb
+	mov rbx,a64 0xbbbbbbbb
+	mov al,a64 0xffffffffcccccccc
+	mov bl,a64 0xffffffffcccccccc
+	mov ax,a64 0xffffffffcccccccc
+	mov bx,a64 0xffffffffcccccccc
+	mov eax,a64 0xffffffffcccccccc
+	mov ebx,a64 0xffffffffcccccccc
+	mov rax,a64 0xffffffffcccccccc
+	mov rbx,a64 0xffffffffcccccccc
+
+	mov al,a64 dword foo
+	mov bl,a64 dword foo
+	mov ax,a64 dword foo
+	mov bx,a64 dword foo
+	mov eax,a64 dword foo
+	mov ebx,a64 dword foo
+	mov rax,a64 dword foo
+	mov rbx,a64 dword foo
+	mov al,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov al,a64 dword 0xbbbbbbbb
+	mov bl,a64 dword 0xbbbbbbbb
+	mov ax,a64 dword 0xbbbbbbbb
+	mov bx,a64 dword 0xbbbbbbbb
+	mov eax,a64 dword 0xbbbbbbbb
+	mov ebx,a64 dword 0xbbbbbbbb
+	mov rax,a64 dword 0xbbbbbbbb
+	mov rbx,a64 dword 0xbbbbbbbb
+	mov al,a64 dword 0xffffffffcccccccc
+	mov bl,a64 dword 0xffffffffcccccccc
+	mov ax,a64 dword 0xffffffffcccccccc
+	mov bx,a64 dword 0xffffffffcccccccc
+	mov eax,a64 dword 0xffffffffcccccccc
+	mov ebx,a64 dword 0xffffffffcccccccc
+	mov rax,a64 dword 0xffffffffcccccccc
+	mov rbx,a64 dword 0xffffffffcccccccc
+
+	mov al,a64 qword foo
+	mov bl,a64 qword foo
+	mov ax,a64 qword foo
+	mov bx,a64 qword foo
+	mov eax,a64 qword foo
+	mov ebx,a64 qword foo
+	mov rax,a64 qword foo
+	mov rbx,a64 qword foo
+	mov al,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov al,a64 qword 0xbbbbbbbb
+	mov bl,a64 qword 0xbbbbbbbb
+	mov ax,a64 qword 0xbbbbbbbb
+	mov bx,a64 qword 0xbbbbbbbb
+	mov eax,a64 qword 0xbbbbbbbb
+	mov ebx,a64 qword 0xbbbbbbbb
+	mov rax,a64 qword 0xbbbbbbbb
+	mov rbx,a64 qword 0xbbbbbbbb
+	mov al,a64 qword 0xffffffffcccccccc
+	mov bl,a64 qword 0xffffffffcccccccc
+	mov ax,a64 qword 0xffffffffcccccccc
+	mov bx,a64 qword 0xffffffffcccccccc
+	mov eax,a64 qword 0xffffffffcccccccc
+	mov ebx,a64 qword 0xffffffffcccccccc
+	mov rax,a64 qword 0xffffffffcccccccc
+	mov rbx,a64 qword 0xffffffffcccccccc
+
+	mov al,a32 foo
+	mov bl,a32 foo
+	mov ax,a32 foo
+	mov bx,a32 foo
+	mov eax,a32 foo
+	mov ebx,a32 foo
+	mov rax,a32 foo
+	mov rbx,a32 foo
+	mov al,a32 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 0xaaaaaaaaaaaaaaaa
+	mov al,a32 0xbbbbbbbb
+	mov bl,a32 0xbbbbbbbb
+	mov ax,a32 0xbbbbbbbb
+	mov bx,a32 0xbbbbbbbb
+	mov eax,a32 0xbbbbbbbb
+	mov ebx,a32 0xbbbbbbbb
+	mov rax,a32 0xbbbbbbbb
+	mov rbx,a32 0xbbbbbbbb
+	mov al,a32 0xffffffffcccccccc
+	mov bl,a32 0xffffffffcccccccc
+	mov ax,a32 0xffffffffcccccccc
+	mov bx,a32 0xffffffffcccccccc
+	mov eax,a32 0xffffffffcccccccc
+	mov ebx,a32 0xffffffffcccccccc
+	mov rax,a32 0xffffffffcccccccc
+	mov rbx,a32 0xffffffffcccccccc
+
+	mov al,a32 dword foo
+	mov bl,a32 dword foo
+	mov ax,a32 dword foo
+	mov bx,a32 dword foo
+	mov eax,a32 dword foo
+	mov ebx,a32 dword foo
+	mov rax,a32 dword foo
+	mov rbx,a32 dword foo
+	mov al,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov al,a32 dword 0xbbbbbbbb
+	mov bl,a32 dword 0xbbbbbbbb
+	mov ax,a32 dword 0xbbbbbbbb
+	mov bx,a32 dword 0xbbbbbbbb
+	mov eax,a32 dword 0xbbbbbbbb
+	mov ebx,a32 dword 0xbbbbbbbb
+	mov rax,a32 dword 0xbbbbbbbb
+	mov rbx,a32 dword 0xbbbbbbbb
+	mov al,a32 dword 0xffffffffcccccccc
+	mov bl,a32 dword 0xffffffffcccccccc
+	mov ax,a32 dword 0xffffffffcccccccc
+	mov bx,a32 dword 0xffffffffcccccccc
+	mov eax,a32 dword 0xffffffffcccccccc
+	mov ebx,a32 dword 0xffffffffcccccccc
+	mov rax,a32 dword 0xffffffffcccccccc
+	mov rbx,a32 dword 0xffffffffcccccccc
+
+	mov al,a32 qword foo
+	mov bl,a32 qword foo
+	mov ax,a32 qword foo
+	mov bx,a32 qword foo
+	mov eax,a32 qword foo
+	mov ebx,a32 qword foo
+	mov rax,a32 qword foo
+	mov rbx,a32 qword foo
+	mov al,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov al,a32 qword 0xbbbbbbbb
+	mov bl,a32 qword 0xbbbbbbbb
+	mov ax,a32 qword 0xbbbbbbbb
+	mov bx,a32 qword 0xbbbbbbbb
+	mov eax,a32 qword 0xbbbbbbbb
+	mov ebx,a32 qword 0xbbbbbbbb
+	mov rax,a32 qword 0xbbbbbbbb
+	mov rbx,a32 qword 0xbbbbbbbb
+	mov al,a32 qword 0xffffffffcccccccc
+	mov bl,a32 qword 0xffffffffcccccccc
+	mov ax,a32 qword 0xffffffffcccccccc
+	mov bx,a32 qword 0xffffffffcccccccc
+	mov eax,a32 qword 0xffffffffcccccccc
+	mov ebx,a32 qword 0xffffffffcccccccc
+	mov rax,a32 qword 0xffffffffcccccccc
+	mov rbx,a32 qword 0xffffffffcccccccc
+
+	mov al,abs foo
+	mov bl,abs foo
+	mov ax,abs foo
+	mov bx,abs foo
+	mov eax,abs foo
+	mov ebx,abs foo
+	mov rax,abs foo
+	mov rbx,abs foo
+	mov al,abs 0xaaaaaaaaaaaaaaaa
+	mov bl,abs 0xaaaaaaaaaaaaaaaa
+	mov ax,abs 0xaaaaaaaaaaaaaaaa
+	mov bx,abs 0xaaaaaaaaaaaaaaaa
+	mov eax,abs 0xaaaaaaaaaaaaaaaa
+	mov ebx,abs 0xaaaaaaaaaaaaaaaa
+	mov rax,abs 0xaaaaaaaaaaaaaaaa
+	mov rbx,abs 0xaaaaaaaaaaaaaaaa
+	mov al,abs 0xbbbbbbbb
+	mov bl,abs 0xbbbbbbbb
+	mov ax,abs 0xbbbbbbbb
+	mov bx,abs 0xbbbbbbbb
+	mov eax,abs 0xbbbbbbbb
+	mov ebx,abs 0xbbbbbbbb
+	mov rax,abs 0xbbbbbbbb
+	mov rbx,abs 0xbbbbbbbb
+	mov al,abs 0xffffffffcccccccc
+	mov bl,abs 0xffffffffcccccccc
+	mov ax,abs 0xffffffffcccccccc
+	mov bx,abs 0xffffffffcccccccc
+	mov eax,abs 0xffffffffcccccccc
+	mov ebx,abs 0xffffffffcccccccc
+	mov rax,abs 0xffffffffcccccccc
+	mov rbx,abs 0xffffffffcccccccc
+
+	mov al,abs dword foo
+	mov bl,abs dword foo
+	mov ax,abs dword foo
+	mov bx,abs dword foo
+	mov eax,abs dword foo
+	mov ebx,abs dword foo
+	mov rax,abs dword foo
+	mov rbx,abs dword foo
+	mov al,abs dword 0xaaaaaaaaaaaaaaaa
+	mov bl,abs dword 0xaaaaaaaaaaaaaaaa
+	mov ax,abs dword 0xaaaaaaaaaaaaaaaa
+	mov bx,abs dword 0xaaaaaaaaaaaaaaaa
+	mov eax,abs dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,abs dword 0xaaaaaaaaaaaaaaaa
+	mov rax,abs dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,abs dword 0xaaaaaaaaaaaaaaaa
+	mov al,abs dword 0xbbbbbbbb
+	mov bl,abs dword 0xbbbbbbbb
+	mov ax,abs dword 0xbbbbbbbb
+	mov bx,abs dword 0xbbbbbbbb
+	mov eax,abs dword 0xbbbbbbbb
+	mov ebx,abs dword 0xbbbbbbbb
+	mov rax,abs dword 0xbbbbbbbb
+	mov rbx,abs dword 0xbbbbbbbb
+	mov al,abs dword 0xffffffffcccccccc
+	mov bl,abs dword 0xffffffffcccccccc
+	mov ax,abs dword 0xffffffffcccccccc
+	mov bx,abs dword 0xffffffffcccccccc
+	mov eax,abs dword 0xffffffffcccccccc
+	mov ebx,abs dword 0xffffffffcccccccc
+	mov rax,abs dword 0xffffffffcccccccc
+	mov rbx,abs dword 0xffffffffcccccccc
+
+	mov al,abs qword foo
+	mov bl,abs qword foo
+	mov ax,abs qword foo
+	mov bx,abs qword foo
+	mov eax,abs qword foo
+	mov ebx,abs qword foo
+	mov rax,abs qword foo
+	mov rbx,abs qword foo
+	mov al,abs qword 0xaaaaaaaaaaaaaaaa
+	mov bl,abs qword 0xaaaaaaaaaaaaaaaa
+	mov ax,abs qword 0xaaaaaaaaaaaaaaaa
+	mov bx,abs qword 0xaaaaaaaaaaaaaaaa
+	mov eax,abs qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,abs qword 0xaaaaaaaaaaaaaaaa
+	mov rax,abs qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,abs qword 0xaaaaaaaaaaaaaaaa
+	mov al,abs qword 0xbbbbbbbb
+	mov bl,abs qword 0xbbbbbbbb
+	mov ax,abs qword 0xbbbbbbbb
+	mov bx,abs qword 0xbbbbbbbb
+	mov eax,abs qword 0xbbbbbbbb
+	mov ebx,abs qword 0xbbbbbbbb
+	mov rax,abs qword 0xbbbbbbbb
+	mov rbx,abs qword 0xbbbbbbbb
+	mov al,abs qword 0xffffffffcccccccc
+	mov bl,abs qword 0xffffffffcccccccc
+	mov ax,abs qword 0xffffffffcccccccc
+	mov bx,abs qword 0xffffffffcccccccc
+	mov eax,abs qword 0xffffffffcccccccc
+	mov ebx,abs qword 0xffffffffcccccccc
+	mov rax,abs qword 0xffffffffcccccccc
+	mov rbx,abs qword 0xffffffffcccccccc
+
+	mov al,a64 abs foo
+	mov bl,a64 abs foo
+	mov ax,a64 abs foo
+	mov bx,a64 abs foo
+	mov eax,a64 abs foo
+	mov ebx,a64 abs foo
+	mov rax,a64 abs foo
+	mov rbx,a64 abs foo
+	mov al,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs 0xbbbbbbbb
+	mov bl,a64 abs 0xbbbbbbbb
+	mov ax,a64 abs 0xbbbbbbbb
+	mov bx,a64 abs 0xbbbbbbbb
+	mov eax,a64 abs 0xbbbbbbbb
+	mov ebx,a64 abs 0xbbbbbbbb
+	mov rax,a64 abs 0xbbbbbbbb
+	mov rbx,a64 abs 0xbbbbbbbb
+	mov al,a64 abs 0xffffffffcccccccc
+	mov bl,a64 abs 0xffffffffcccccccc
+	mov ax,a64 abs 0xffffffffcccccccc
+	mov bx,a64 abs 0xffffffffcccccccc
+	mov eax,a64 abs 0xffffffffcccccccc
+	mov ebx,a64 abs 0xffffffffcccccccc
+	mov rax,a64 abs 0xffffffffcccccccc
+	mov rbx,a64 abs 0xffffffffcccccccc
+
+	mov al,a64 abs dword foo
+	mov bl,a64 abs dword foo
+	mov ax,a64 abs dword foo
+	mov bx,a64 abs dword foo
+	mov eax,a64 abs dword foo
+	mov ebx,a64 abs dword foo
+	mov rax,a64 abs dword foo
+	mov rbx,a64 abs dword foo
+	mov al,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs dword 0xbbbbbbbb
+	mov bl,a64 abs dword 0xbbbbbbbb
+	mov ax,a64 abs dword 0xbbbbbbbb
+	mov bx,a64 abs dword 0xbbbbbbbb
+	mov eax,a64 abs dword 0xbbbbbbbb
+	mov ebx,a64 abs dword 0xbbbbbbbb
+	mov rax,a64 abs dword 0xbbbbbbbb
+	mov rbx,a64 abs dword 0xbbbbbbbb
+	mov al,a64 abs dword 0xffffffffcccccccc
+	mov bl,a64 abs dword 0xffffffffcccccccc
+	mov ax,a64 abs dword 0xffffffffcccccccc
+	mov bx,a64 abs dword 0xffffffffcccccccc
+	mov eax,a64 abs dword 0xffffffffcccccccc
+	mov ebx,a64 abs dword 0xffffffffcccccccc
+	mov rax,a64 abs dword 0xffffffffcccccccc
+	mov rbx,a64 abs dword 0xffffffffcccccccc
+
+	mov al,a64 abs qword foo
+	mov bl,a64 abs qword foo
+	mov ax,a64 abs qword foo
+	mov bx,a64 abs qword foo
+	mov eax,a64 abs qword foo
+	mov ebx,a64 abs qword foo
+	mov rax,a64 abs qword foo
+	mov rbx,a64 abs qword foo
+	mov al,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs qword 0xbbbbbbbb
+	mov bl,a64 abs qword 0xbbbbbbbb
+	mov ax,a64 abs qword 0xbbbbbbbb
+	mov bx,a64 abs qword 0xbbbbbbbb
+	mov eax,a64 abs qword 0xbbbbbbbb
+	mov ebx,a64 abs qword 0xbbbbbbbb
+	mov rax,a64 abs qword 0xbbbbbbbb
+	mov rbx,a64 abs qword 0xbbbbbbbb
+	mov al,a64 abs qword 0xffffffffcccccccc
+	mov bl,a64 abs qword 0xffffffffcccccccc
+	mov ax,a64 abs qword 0xffffffffcccccccc
+	mov bx,a64 abs qword 0xffffffffcccccccc
+	mov eax,a64 abs qword 0xffffffffcccccccc
+	mov ebx,a64 abs qword 0xffffffffcccccccc
+	mov rax,a64 abs qword 0xffffffffcccccccc
+	mov rbx,a64 abs qword 0xffffffffcccccccc
+
+	mov al,a32 abs foo
+	mov bl,a32 abs foo
+	mov ax,a32 abs foo
+	mov bx,a32 abs foo
+	mov eax,a32 abs foo
+	mov ebx,a32 abs foo
+	mov rax,a32 abs foo
+	mov rbx,a32 abs foo
+	mov al,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs 0xbbbbbbbb
+	mov bl,a32 abs 0xbbbbbbbb
+	mov ax,a32 abs 0xbbbbbbbb
+	mov bx,a32 abs 0xbbbbbbbb
+	mov eax,a32 abs 0xbbbbbbbb
+	mov ebx,a32 abs 0xbbbbbbbb
+	mov rax,a32 abs 0xbbbbbbbb
+	mov rbx,a32 abs 0xbbbbbbbb
+	mov al,a32 abs 0xffffffffcccccccc
+	mov bl,a32 abs 0xffffffffcccccccc
+	mov ax,a32 abs 0xffffffffcccccccc
+	mov bx,a32 abs 0xffffffffcccccccc
+	mov eax,a32 abs 0xffffffffcccccccc
+	mov ebx,a32 abs 0xffffffffcccccccc
+	mov rax,a32 abs 0xffffffffcccccccc
+	mov rbx,a32 abs 0xffffffffcccccccc
+
+	mov al,a32 abs dword foo
+	mov bl,a32 abs dword foo
+	mov ax,a32 abs dword foo
+	mov bx,a32 abs dword foo
+	mov eax,a32 abs dword foo
+	mov ebx,a32 abs dword foo
+	mov rax,a32 abs dword foo
+	mov rbx,a32 abs dword foo
+	mov al,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs dword 0xbbbbbbbb
+	mov bl,a32 abs dword 0xbbbbbbbb
+	mov ax,a32 abs dword 0xbbbbbbbb
+	mov bx,a32 abs dword 0xbbbbbbbb
+	mov eax,a32 abs dword 0xbbbbbbbb
+	mov ebx,a32 abs dword 0xbbbbbbbb
+	mov rax,a32 abs dword 0xbbbbbbbb
+	mov rbx,a32 abs dword 0xbbbbbbbb
+	mov al,a32 abs dword 0xffffffffcccccccc
+	mov bl,a32 abs dword 0xffffffffcccccccc
+	mov ax,a32 abs dword 0xffffffffcccccccc
+	mov bx,a32 abs dword 0xffffffffcccccccc
+	mov eax,a32 abs dword 0xffffffffcccccccc
+	mov ebx,a32 abs dword 0xffffffffcccccccc
+	mov rax,a32 abs dword 0xffffffffcccccccc
+	mov rbx,a32 abs dword 0xffffffffcccccccc
+
+	mov al,a32 abs qword foo
+	mov bl,a32 abs qword foo
+	mov ax,a32 abs qword foo
+	mov bx,a32 abs qword foo
+	mov eax,a32 abs qword foo
+	mov ebx,a32 abs qword foo
+	mov rax,a32 abs qword foo
+	mov rbx,a32 abs qword foo
+	mov al,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs qword 0xbbbbbbbb
+	mov bl,a32 abs qword 0xbbbbbbbb
+	mov ax,a32 abs qword 0xbbbbbbbb
+	mov bx,a32 abs qword 0xbbbbbbbb
+	mov eax,a32 abs qword 0xbbbbbbbb
+	mov ebx,a32 abs qword 0xbbbbbbbb
+	mov rax,a32 abs qword 0xbbbbbbbb
+	mov rbx,a32 abs qword 0xbbbbbbbb
+	mov al,a32 abs qword 0xffffffffcccccccc
+	mov bl,a32 abs qword 0xffffffffcccccccc
+	mov ax,a32 abs qword 0xffffffffcccccccc
+	mov bx,a32 abs qword 0xffffffffcccccccc
+	mov eax,a32 abs qword 0xffffffffcccccccc
+	mov ebx,a32 abs qword 0xffffffffcccccccc
+	mov rax,a32 abs qword 0xffffffffcccccccc
+	mov rbx,a32 abs qword 0xffffffffcccccccc
+
+	mov al,rel foo
+	mov bl,rel foo
+	mov ax,rel foo
+	mov bx,rel foo
+	mov eax,rel foo
+	mov ebx,rel foo
+	mov rax,rel foo
+	mov rbx,rel foo
+	mov al,rel 0xaaaaaaaaaaaaaaaa
+	mov bl,rel 0xaaaaaaaaaaaaaaaa
+	mov ax,rel 0xaaaaaaaaaaaaaaaa
+	mov bx,rel 0xaaaaaaaaaaaaaaaa
+	mov eax,rel 0xaaaaaaaaaaaaaaaa
+	mov ebx,rel 0xaaaaaaaaaaaaaaaa
+	mov rax,rel 0xaaaaaaaaaaaaaaaa
+	mov rbx,rel 0xaaaaaaaaaaaaaaaa
+	mov al,rel 0xbbbbbbbb
+	mov bl,rel 0xbbbbbbbb
+	mov ax,rel 0xbbbbbbbb
+	mov bx,rel 0xbbbbbbbb
+	mov eax,rel 0xbbbbbbbb
+	mov ebx,rel 0xbbbbbbbb
+	mov rax,rel 0xbbbbbbbb
+	mov rbx,rel 0xbbbbbbbb
+	mov al,rel 0xffffffffcccccccc
+	mov bl,rel 0xffffffffcccccccc
+	mov ax,rel 0xffffffffcccccccc
+	mov bx,rel 0xffffffffcccccccc
+	mov eax,rel 0xffffffffcccccccc
+	mov ebx,rel 0xffffffffcccccccc
+	mov rax,rel 0xffffffffcccccccc
+	mov rbx,rel 0xffffffffcccccccc
+
+	mov al,rel dword foo
+	mov bl,rel dword foo
+	mov ax,rel dword foo
+	mov bx,rel dword foo
+	mov eax,rel dword foo
+	mov ebx,rel dword foo
+	mov rax,rel dword foo
+	mov rbx,rel dword foo
+	mov al,rel dword 0xaaaaaaaaaaaaaaaa
+	mov bl,rel dword 0xaaaaaaaaaaaaaaaa
+	mov ax,rel dword 0xaaaaaaaaaaaaaaaa
+	mov bx,rel dword 0xaaaaaaaaaaaaaaaa
+	mov eax,rel dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,rel dword 0xaaaaaaaaaaaaaaaa
+	mov rax,rel dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,rel dword 0xaaaaaaaaaaaaaaaa
+	mov al,rel dword 0xbbbbbbbb
+	mov bl,rel dword 0xbbbbbbbb
+	mov ax,rel dword 0xbbbbbbbb
+	mov bx,rel dword 0xbbbbbbbb
+	mov eax,rel dword 0xbbbbbbbb
+	mov ebx,rel dword 0xbbbbbbbb
+	mov rax,rel dword 0xbbbbbbbb
+	mov rbx,rel dword 0xbbbbbbbb
+	mov al,rel dword 0xffffffffcccccccc
+	mov bl,rel dword 0xffffffffcccccccc
+	mov ax,rel dword 0xffffffffcccccccc
+	mov bx,rel dword 0xffffffffcccccccc
+	mov eax,rel dword 0xffffffffcccccccc
+	mov ebx,rel dword 0xffffffffcccccccc
+	mov rax,rel dword 0xffffffffcccccccc
+	mov rbx,rel dword 0xffffffffcccccccc
+
+	mov al,rel qword foo
+	mov bl,rel qword foo
+	mov ax,rel qword foo
+	mov bx,rel qword foo
+	mov eax,rel qword foo
+	mov ebx,rel qword foo
+	mov rax,rel qword foo
+	mov rbx,rel qword foo
+	mov al,rel qword 0xaaaaaaaaaaaaaaaa
+	mov bl,rel qword 0xaaaaaaaaaaaaaaaa
+	mov ax,rel qword 0xaaaaaaaaaaaaaaaa
+	mov bx,rel qword 0xaaaaaaaaaaaaaaaa
+	mov eax,rel qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,rel qword 0xaaaaaaaaaaaaaaaa
+	mov rax,rel qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,rel qword 0xaaaaaaaaaaaaaaaa
+	mov al,rel qword 0xbbbbbbbb
+	mov bl,rel qword 0xbbbbbbbb
+	mov ax,rel qword 0xbbbbbbbb
+	mov bx,rel qword 0xbbbbbbbb
+	mov eax,rel qword 0xbbbbbbbb
+	mov ebx,rel qword 0xbbbbbbbb
+	mov rax,rel qword 0xbbbbbbbb
+	mov rbx,rel qword 0xbbbbbbbb
+	mov al,rel qword 0xffffffffcccccccc
+	mov bl,rel qword 0xffffffffcccccccc
+	mov ax,rel qword 0xffffffffcccccccc
+	mov bx,rel qword 0xffffffffcccccccc
+	mov eax,rel qword 0xffffffffcccccccc
+	mov ebx,rel qword 0xffffffffcccccccc
+	mov rax,rel qword 0xffffffffcccccccc
+	mov rbx,rel qword 0xffffffffcccccccc
+
+	mov al,a64 rel foo
+	mov bl,a64 rel foo
+	mov ax,a64 rel foo
+	mov bx,a64 rel foo
+	mov eax,a64 rel foo
+	mov ebx,a64 rel foo
+	mov rax,a64 rel foo
+	mov rbx,a64 rel foo
+	mov al,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel 0xbbbbbbbb
+	mov bl,a64 rel 0xbbbbbbbb
+	mov ax,a64 rel 0xbbbbbbbb
+	mov bx,a64 rel 0xbbbbbbbb
+	mov eax,a64 rel 0xbbbbbbbb
+	mov ebx,a64 rel 0xbbbbbbbb
+	mov rax,a64 rel 0xbbbbbbbb
+	mov rbx,a64 rel 0xbbbbbbbb
+	mov al,a64 rel 0xffffffffcccccccc
+	mov bl,a64 rel 0xffffffffcccccccc
+	mov ax,a64 rel 0xffffffffcccccccc
+	mov bx,a64 rel 0xffffffffcccccccc
+	mov eax,a64 rel 0xffffffffcccccccc
+	mov ebx,a64 rel 0xffffffffcccccccc
+	mov rax,a64 rel 0xffffffffcccccccc
+	mov rbx,a64 rel 0xffffffffcccccccc
+
+	mov al,a64 rel dword foo
+	mov bl,a64 rel dword foo
+	mov ax,a64 rel dword foo
+	mov bx,a64 rel dword foo
+	mov eax,a64 rel dword foo
+	mov ebx,a64 rel dword foo
+	mov rax,a64 rel dword foo
+	mov rbx,a64 rel dword foo
+	mov al,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel dword 0xbbbbbbbb
+	mov bl,a64 rel dword 0xbbbbbbbb
+	mov ax,a64 rel dword 0xbbbbbbbb
+	mov bx,a64 rel dword 0xbbbbbbbb
+	mov eax,a64 rel dword 0xbbbbbbbb
+	mov ebx,a64 rel dword 0xbbbbbbbb
+	mov rax,a64 rel dword 0xbbbbbbbb
+	mov rbx,a64 rel dword 0xbbbbbbbb
+	mov al,a64 rel dword 0xffffffffcccccccc
+	mov bl,a64 rel dword 0xffffffffcccccccc
+	mov ax,a64 rel dword 0xffffffffcccccccc
+	mov bx,a64 rel dword 0xffffffffcccccccc
+	mov eax,a64 rel dword 0xffffffffcccccccc
+	mov ebx,a64 rel dword 0xffffffffcccccccc
+	mov rax,a64 rel dword 0xffffffffcccccccc
+	mov rbx,a64 rel dword 0xffffffffcccccccc
+
+	mov al,a64 rel qword foo
+	mov bl,a64 rel qword foo
+	mov ax,a64 rel qword foo
+	mov bx,a64 rel qword foo
+	mov eax,a64 rel qword foo
+	mov ebx,a64 rel qword foo
+	mov rax,a64 rel qword foo
+	mov rbx,a64 rel qword foo
+	mov al,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel qword 0xbbbbbbbb
+	mov bl,a64 rel qword 0xbbbbbbbb
+	mov ax,a64 rel qword 0xbbbbbbbb
+	mov bx,a64 rel qword 0xbbbbbbbb
+	mov eax,a64 rel qword 0xbbbbbbbb
+	mov ebx,a64 rel qword 0xbbbbbbbb
+	mov rax,a64 rel qword 0xbbbbbbbb
+	mov rbx,a64 rel qword 0xbbbbbbbb
+	mov al,a64 rel qword 0xffffffffcccccccc
+	mov bl,a64 rel qword 0xffffffffcccccccc
+	mov ax,a64 rel qword 0xffffffffcccccccc
+	mov bx,a64 rel qword 0xffffffffcccccccc
+	mov eax,a64 rel qword 0xffffffffcccccccc
+	mov ebx,a64 rel qword 0xffffffffcccccccc
+	mov rax,a64 rel qword 0xffffffffcccccccc
+	mov rbx,a64 rel qword 0xffffffffcccccccc
+
+	mov al,a32 rel foo
+	mov bl,a32 rel foo
+	mov ax,a32 rel foo
+	mov bx,a32 rel foo
+	mov eax,a32 rel foo
+	mov ebx,a32 rel foo
+	mov rax,a32 rel foo
+	mov rbx,a32 rel foo
+	mov al,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel 0xbbbbbbbb
+	mov bl,a32 rel 0xbbbbbbbb
+	mov ax,a32 rel 0xbbbbbbbb
+	mov bx,a32 rel 0xbbbbbbbb
+	mov eax,a32 rel 0xbbbbbbbb
+	mov ebx,a32 rel 0xbbbbbbbb
+	mov rax,a32 rel 0xbbbbbbbb
+	mov rbx,a32 rel 0xbbbbbbbb
+	mov al,a32 rel 0xffffffffcccccccc
+	mov bl,a32 rel 0xffffffffcccccccc
+	mov ax,a32 rel 0xffffffffcccccccc
+	mov bx,a32 rel 0xffffffffcccccccc
+	mov eax,a32 rel 0xffffffffcccccccc
+	mov ebx,a32 rel 0xffffffffcccccccc
+	mov rax,a32 rel 0xffffffffcccccccc
+	mov rbx,a32 rel 0xffffffffcccccccc
+
+	mov al,a32 rel dword foo
+	mov bl,a32 rel dword foo
+	mov ax,a32 rel dword foo
+	mov bx,a32 rel dword foo
+	mov eax,a32 rel dword foo
+	mov ebx,a32 rel dword foo
+	mov rax,a32 rel dword foo
+	mov rbx,a32 rel dword foo
+	mov al,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel dword 0xbbbbbbbb
+	mov bl,a32 rel dword 0xbbbbbbbb
+	mov ax,a32 rel dword 0xbbbbbbbb
+	mov bx,a32 rel dword 0xbbbbbbbb
+	mov eax,a32 rel dword 0xbbbbbbbb
+	mov ebx,a32 rel dword 0xbbbbbbbb
+	mov rax,a32 rel dword 0xbbbbbbbb
+	mov rbx,a32 rel dword 0xbbbbbbbb
+	mov al,a32 rel dword 0xffffffffcccccccc
+	mov bl,a32 rel dword 0xffffffffcccccccc
+	mov ax,a32 rel dword 0xffffffffcccccccc
+	mov bx,a32 rel dword 0xffffffffcccccccc
+	mov eax,a32 rel dword 0xffffffffcccccccc
+	mov ebx,a32 rel dword 0xffffffffcccccccc
+	mov rax,a32 rel dword 0xffffffffcccccccc
+	mov rbx,a32 rel dword 0xffffffffcccccccc
+
+	mov al,a32 rel qword foo
+	mov bl,a32 rel qword foo
+	mov ax,a32 rel qword foo
+	mov bx,a32 rel qword foo
+	mov eax,a32 rel qword foo
+	mov ebx,a32 rel qword foo
+	mov rax,a32 rel qword foo
+	mov rbx,a32 rel qword foo
+	mov al,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel qword 0xbbbbbbbb
+	mov bl,a32 rel qword 0xbbbbbbbb
+	mov ax,a32 rel qword 0xbbbbbbbb
+	mov bx,a32 rel qword 0xbbbbbbbb
+	mov eax,a32 rel qword 0xbbbbbbbb
+	mov ebx,a32 rel qword 0xbbbbbbbb
+	mov rax,a32 rel qword 0xbbbbbbbb
+	mov rbx,a32 rel qword 0xbbbbbbbb
+	mov al,a32 rel qword 0xffffffffcccccccc
+	mov bl,a32 rel qword 0xffffffffcccccccc
+	mov ax,a32 rel qword 0xffffffffcccccccc
+	mov bx,a32 rel qword 0xffffffffcccccccc
+	mov eax,a32 rel qword 0xffffffffcccccccc
+	mov ebx,a32 rel qword 0xffffffffcccccccc
+	mov rax,a32 rel qword 0xffffffffcccccccc
+	mov rbx,a32 rel qword 0xffffffffcccccccc
+
+	mov al,fs:foo
+	mov bl,fs:foo
+	mov ax,fs:foo
+	mov bx,fs:foo
+	mov eax,fs:foo
+	mov ebx,fs:foo
+	mov rax,fs:foo
+	mov rbx,fs:foo
+	mov al,fs:0xaaaaaaaaaaaaaaaa
+	mov bl,fs:0xaaaaaaaaaaaaaaaa
+	mov ax,fs:0xaaaaaaaaaaaaaaaa
+	mov bx,fs:0xaaaaaaaaaaaaaaaa
+	mov eax,fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,fs:0xaaaaaaaaaaaaaaaa
+	mov rax,fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,fs:0xaaaaaaaaaaaaaaaa
+	mov al,fs:0xbbbbbbbb
+	mov bl,fs:0xbbbbbbbb
+	mov ax,fs:0xbbbbbbbb
+	mov bx,fs:0xbbbbbbbb
+	mov eax,fs:0xbbbbbbbb
+	mov ebx,fs:0xbbbbbbbb
+	mov rax,fs:0xbbbbbbbb
+	mov rbx,fs:0xbbbbbbbb
+	mov al,fs:0xffffffffcccccccc
+	mov bl,fs:0xffffffffcccccccc
+	mov ax,fs:0xffffffffcccccccc
+	mov bx,fs:0xffffffffcccccccc
+	mov eax,fs:0xffffffffcccccccc
+	mov ebx,fs:0xffffffffcccccccc
+	mov rax,fs:0xffffffffcccccccc
+	mov rbx,fs:0xffffffffcccccccc
+
+	mov al,dword fs:foo
+	mov bl,dword fs:foo
+	mov ax,dword fs:foo
+	mov bx,dword fs:foo
+	mov eax,dword fs:foo
+	mov ebx,dword fs:foo
+	mov rax,dword fs:foo
+	mov rbx,dword fs:foo
+	mov al,dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,dword fs:0xbbbbbbbb
+	mov bl,dword fs:0xbbbbbbbb
+	mov ax,dword fs:0xbbbbbbbb
+	mov bx,dword fs:0xbbbbbbbb
+	mov eax,dword fs:0xbbbbbbbb
+	mov ebx,dword fs:0xbbbbbbbb
+	mov rax,dword fs:0xbbbbbbbb
+	mov rbx,dword fs:0xbbbbbbbb
+	mov al,dword fs:0xffffffffcccccccc
+	mov bl,dword fs:0xffffffffcccccccc
+	mov ax,dword fs:0xffffffffcccccccc
+	mov bx,dword fs:0xffffffffcccccccc
+	mov eax,dword fs:0xffffffffcccccccc
+	mov ebx,dword fs:0xffffffffcccccccc
+	mov rax,dword fs:0xffffffffcccccccc
+	mov rbx,dword fs:0xffffffffcccccccc
+
+	mov al,qword fs:foo
+	mov bl,qword fs:foo
+	mov ax,qword fs:foo
+	mov bx,qword fs:foo
+	mov eax,qword fs:foo
+	mov ebx,qword fs:foo
+	mov rax,qword fs:foo
+	mov rbx,qword fs:foo
+	mov al,qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,qword fs:0xbbbbbbbb
+	mov bl,qword fs:0xbbbbbbbb
+	mov ax,qword fs:0xbbbbbbbb
+	mov bx,qword fs:0xbbbbbbbb
+	mov eax,qword fs:0xbbbbbbbb
+	mov ebx,qword fs:0xbbbbbbbb
+	mov rax,qword fs:0xbbbbbbbb
+	mov rbx,qword fs:0xbbbbbbbb
+	mov al,qword fs:0xffffffffcccccccc
+	mov bl,qword fs:0xffffffffcccccccc
+	mov ax,qword fs:0xffffffffcccccccc
+	mov bx,qword fs:0xffffffffcccccccc
+	mov eax,qword fs:0xffffffffcccccccc
+	mov ebx,qword fs:0xffffffffcccccccc
+	mov rax,qword fs:0xffffffffcccccccc
+	mov rbx,qword fs:0xffffffffcccccccc
+
+	mov al,a64 fs:foo
+	mov bl,a64 fs:foo
+	mov ax,a64 fs:foo
+	mov bx,a64 fs:foo
+	mov eax,a64 fs:foo
+	mov ebx,a64 fs:foo
+	mov rax,a64 fs:foo
+	mov rbx,a64 fs:foo
+	mov al,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 fs:0xbbbbbbbb
+	mov bl,a64 fs:0xbbbbbbbb
+	mov ax,a64 fs:0xbbbbbbbb
+	mov bx,a64 fs:0xbbbbbbbb
+	mov eax,a64 fs:0xbbbbbbbb
+	mov ebx,a64 fs:0xbbbbbbbb
+	mov rax,a64 fs:0xbbbbbbbb
+	mov rbx,a64 fs:0xbbbbbbbb
+	mov al,a64 fs:0xffffffffcccccccc
+	mov bl,a64 fs:0xffffffffcccccccc
+	mov ax,a64 fs:0xffffffffcccccccc
+	mov bx,a64 fs:0xffffffffcccccccc
+	mov eax,a64 fs:0xffffffffcccccccc
+	mov ebx,a64 fs:0xffffffffcccccccc
+	mov rax,a64 fs:0xffffffffcccccccc
+	mov rbx,a64 fs:0xffffffffcccccccc
+
+	mov al,a64 dword fs:foo
+	mov bl,a64 dword fs:foo
+	mov ax,a64 dword fs:foo
+	mov bx,a64 dword fs:foo
+	mov eax,a64 dword fs:foo
+	mov ebx,a64 dword fs:foo
+	mov rax,a64 dword fs:foo
+	mov rbx,a64 dword fs:foo
+	mov al,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 dword fs:0xbbbbbbbb
+	mov bl,a64 dword fs:0xbbbbbbbb
+	mov ax,a64 dword fs:0xbbbbbbbb
+	mov bx,a64 dword fs:0xbbbbbbbb
+	mov eax,a64 dword fs:0xbbbbbbbb
+	mov ebx,a64 dword fs:0xbbbbbbbb
+	mov rax,a64 dword fs:0xbbbbbbbb
+	mov rbx,a64 dword fs:0xbbbbbbbb
+	mov al,a64 dword fs:0xffffffffcccccccc
+	mov bl,a64 dword fs:0xffffffffcccccccc
+	mov ax,a64 dword fs:0xffffffffcccccccc
+	mov bx,a64 dword fs:0xffffffffcccccccc
+	mov eax,a64 dword fs:0xffffffffcccccccc
+	mov ebx,a64 dword fs:0xffffffffcccccccc
+	mov rax,a64 dword fs:0xffffffffcccccccc
+	mov rbx,a64 dword fs:0xffffffffcccccccc
+
+	mov al,a64 qword fs:foo
+	mov bl,a64 qword fs:foo
+	mov ax,a64 qword fs:foo
+	mov bx,a64 qword fs:foo
+	mov eax,a64 qword fs:foo
+	mov ebx,a64 qword fs:foo
+	mov rax,a64 qword fs:foo
+	mov rbx,a64 qword fs:foo
+	mov al,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 qword fs:0xbbbbbbbb
+	mov bl,a64 qword fs:0xbbbbbbbb
+	mov ax,a64 qword fs:0xbbbbbbbb
+	mov bx,a64 qword fs:0xbbbbbbbb
+	mov eax,a64 qword fs:0xbbbbbbbb
+	mov ebx,a64 qword fs:0xbbbbbbbb
+	mov rax,a64 qword fs:0xbbbbbbbb
+	mov rbx,a64 qword fs:0xbbbbbbbb
+	mov al,a64 qword fs:0xffffffffcccccccc
+	mov bl,a64 qword fs:0xffffffffcccccccc
+	mov ax,a64 qword fs:0xffffffffcccccccc
+	mov bx,a64 qword fs:0xffffffffcccccccc
+	mov eax,a64 qword fs:0xffffffffcccccccc
+	mov ebx,a64 qword fs:0xffffffffcccccccc
+	mov rax,a64 qword fs:0xffffffffcccccccc
+	mov rbx,a64 qword fs:0xffffffffcccccccc
+
+	mov al,a32 fs:foo
+	mov bl,a32 fs:foo
+	mov ax,a32 fs:foo
+	mov bx,a32 fs:foo
+	mov eax,a32 fs:foo
+	mov ebx,a32 fs:foo
+	mov rax,a32 fs:foo
+	mov rbx,a32 fs:foo
+	mov al,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 fs:0xbbbbbbbb
+	mov bl,a32 fs:0xbbbbbbbb
+	mov ax,a32 fs:0xbbbbbbbb
+	mov bx,a32 fs:0xbbbbbbbb
+	mov eax,a32 fs:0xbbbbbbbb
+	mov ebx,a32 fs:0xbbbbbbbb
+	mov rax,a32 fs:0xbbbbbbbb
+	mov rbx,a32 fs:0xbbbbbbbb
+	mov al,a32 fs:0xffffffffcccccccc
+	mov bl,a32 fs:0xffffffffcccccccc
+	mov ax,a32 fs:0xffffffffcccccccc
+	mov bx,a32 fs:0xffffffffcccccccc
+	mov eax,a32 fs:0xffffffffcccccccc
+	mov ebx,a32 fs:0xffffffffcccccccc
+	mov rax,a32 fs:0xffffffffcccccccc
+	mov rbx,a32 fs:0xffffffffcccccccc
+
+	mov al,a32 dword fs:foo
+	mov bl,a32 dword fs:foo
+	mov ax,a32 dword fs:foo
+	mov bx,a32 dword fs:foo
+	mov eax,a32 dword fs:foo
+	mov ebx,a32 dword fs:foo
+	mov rax,a32 dword fs:foo
+	mov rbx,a32 dword fs:foo
+	mov al,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 dword fs:0xbbbbbbbb
+	mov bl,a32 dword fs:0xbbbbbbbb
+	mov ax,a32 dword fs:0xbbbbbbbb
+	mov bx,a32 dword fs:0xbbbbbbbb
+	mov eax,a32 dword fs:0xbbbbbbbb
+	mov ebx,a32 dword fs:0xbbbbbbbb
+	mov rax,a32 dword fs:0xbbbbbbbb
+	mov rbx,a32 dword fs:0xbbbbbbbb
+	mov al,a32 dword fs:0xffffffffcccccccc
+	mov bl,a32 dword fs:0xffffffffcccccccc
+	mov ax,a32 dword fs:0xffffffffcccccccc
+	mov bx,a32 dword fs:0xffffffffcccccccc
+	mov eax,a32 dword fs:0xffffffffcccccccc
+	mov ebx,a32 dword fs:0xffffffffcccccccc
+	mov rax,a32 dword fs:0xffffffffcccccccc
+	mov rbx,a32 dword fs:0xffffffffcccccccc
+
+	mov al,a32 qword fs:foo
+	mov bl,a32 qword fs:foo
+	mov ax,a32 qword fs:foo
+	mov bx,a32 qword fs:foo
+	mov eax,a32 qword fs:foo
+	mov ebx,a32 qword fs:foo
+	mov rax,a32 qword fs:foo
+	mov rbx,a32 qword fs:foo
+	mov al,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 qword fs:0xbbbbbbbb
+	mov bl,a32 qword fs:0xbbbbbbbb
+	mov ax,a32 qword fs:0xbbbbbbbb
+	mov bx,a32 qword fs:0xbbbbbbbb
+	mov eax,a32 qword fs:0xbbbbbbbb
+	mov ebx,a32 qword fs:0xbbbbbbbb
+	mov rax,a32 qword fs:0xbbbbbbbb
+	mov rbx,a32 qword fs:0xbbbbbbbb
+	mov al,a32 qword fs:0xffffffffcccccccc
+	mov bl,a32 qword fs:0xffffffffcccccccc
+	mov ax,a32 qword fs:0xffffffffcccccccc
+	mov bx,a32 qword fs:0xffffffffcccccccc
+	mov eax,a32 qword fs:0xffffffffcccccccc
+	mov ebx,a32 qword fs:0xffffffffcccccccc
+	mov rax,a32 qword fs:0xffffffffcccccccc
+	mov rbx,a32 qword fs:0xffffffffcccccccc
+
+	mov al,abs fs:foo
+	mov bl,abs fs:foo
+	mov ax,abs fs:foo
+	mov bx,abs fs:foo
+	mov eax,abs fs:foo
+	mov ebx,abs fs:foo
+	mov rax,abs fs:foo
+	mov rbx,abs fs:foo
+	mov al,abs fs:0xaaaaaaaaaaaaaaaa
+	mov bl,abs fs:0xaaaaaaaaaaaaaaaa
+	mov ax,abs fs:0xaaaaaaaaaaaaaaaa
+	mov bx,abs fs:0xaaaaaaaaaaaaaaaa
+	mov eax,abs fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,abs fs:0xaaaaaaaaaaaaaaaa
+	mov rax,abs fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,abs fs:0xaaaaaaaaaaaaaaaa
+	mov al,abs fs:0xbbbbbbbb
+	mov bl,abs fs:0xbbbbbbbb
+	mov ax,abs fs:0xbbbbbbbb
+	mov bx,abs fs:0xbbbbbbbb
+	mov eax,abs fs:0xbbbbbbbb
+	mov ebx,abs fs:0xbbbbbbbb
+	mov rax,abs fs:0xbbbbbbbb
+	mov rbx,abs fs:0xbbbbbbbb
+	mov al,abs fs:0xffffffffcccccccc
+	mov bl,abs fs:0xffffffffcccccccc
+	mov ax,abs fs:0xffffffffcccccccc
+	mov bx,abs fs:0xffffffffcccccccc
+	mov eax,abs fs:0xffffffffcccccccc
+	mov ebx,abs fs:0xffffffffcccccccc
+	mov rax,abs fs:0xffffffffcccccccc
+	mov rbx,abs fs:0xffffffffcccccccc
+
+	mov al,abs dword fs:foo
+	mov bl,abs dword fs:foo
+	mov ax,abs dword fs:foo
+	mov bx,abs dword fs:foo
+	mov eax,abs dword fs:foo
+	mov ebx,abs dword fs:foo
+	mov rax,abs dword fs:foo
+	mov rbx,abs dword fs:foo
+	mov al,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,abs dword fs:0xbbbbbbbb
+	mov bl,abs dword fs:0xbbbbbbbb
+	mov ax,abs dword fs:0xbbbbbbbb
+	mov bx,abs dword fs:0xbbbbbbbb
+	mov eax,abs dword fs:0xbbbbbbbb
+	mov ebx,abs dword fs:0xbbbbbbbb
+	mov rax,abs dword fs:0xbbbbbbbb
+	mov rbx,abs dword fs:0xbbbbbbbb
+	mov al,abs dword fs:0xffffffffcccccccc
+	mov bl,abs dword fs:0xffffffffcccccccc
+	mov ax,abs dword fs:0xffffffffcccccccc
+	mov bx,abs dword fs:0xffffffffcccccccc
+	mov eax,abs dword fs:0xffffffffcccccccc
+	mov ebx,abs dword fs:0xffffffffcccccccc
+	mov rax,abs dword fs:0xffffffffcccccccc
+	mov rbx,abs dword fs:0xffffffffcccccccc
+
+	mov al,abs qword fs:foo
+	mov bl,abs qword fs:foo
+	mov ax,abs qword fs:foo
+	mov bx,abs qword fs:foo
+	mov eax,abs qword fs:foo
+	mov ebx,abs qword fs:foo
+	mov rax,abs qword fs:foo
+	mov rbx,abs qword fs:foo
+	mov al,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,abs qword fs:0xbbbbbbbb
+	mov bl,abs qword fs:0xbbbbbbbb
+	mov ax,abs qword fs:0xbbbbbbbb
+	mov bx,abs qword fs:0xbbbbbbbb
+	mov eax,abs qword fs:0xbbbbbbbb
+	mov ebx,abs qword fs:0xbbbbbbbb
+	mov rax,abs qword fs:0xbbbbbbbb
+	mov rbx,abs qword fs:0xbbbbbbbb
+	mov al,abs qword fs:0xffffffffcccccccc
+	mov bl,abs qword fs:0xffffffffcccccccc
+	mov ax,abs qword fs:0xffffffffcccccccc
+	mov bx,abs qword fs:0xffffffffcccccccc
+	mov eax,abs qword fs:0xffffffffcccccccc
+	mov ebx,abs qword fs:0xffffffffcccccccc
+	mov rax,abs qword fs:0xffffffffcccccccc
+	mov rbx,abs qword fs:0xffffffffcccccccc
+
+	mov al,a64 abs fs:foo
+	mov bl,a64 abs fs:foo
+	mov ax,a64 abs fs:foo
+	mov bx,a64 abs fs:foo
+	mov eax,a64 abs fs:foo
+	mov ebx,a64 abs fs:foo
+	mov rax,a64 abs fs:foo
+	mov rbx,a64 abs fs:foo
+	mov al,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs fs:0xbbbbbbbb
+	mov bl,a64 abs fs:0xbbbbbbbb
+	mov ax,a64 abs fs:0xbbbbbbbb
+	mov bx,a64 abs fs:0xbbbbbbbb
+	mov eax,a64 abs fs:0xbbbbbbbb
+	mov ebx,a64 abs fs:0xbbbbbbbb
+	mov rax,a64 abs fs:0xbbbbbbbb
+	mov rbx,a64 abs fs:0xbbbbbbbb
+	mov al,a64 abs fs:0xffffffffcccccccc
+	mov bl,a64 abs fs:0xffffffffcccccccc
+	mov ax,a64 abs fs:0xffffffffcccccccc
+	mov bx,a64 abs fs:0xffffffffcccccccc
+	mov eax,a64 abs fs:0xffffffffcccccccc
+	mov ebx,a64 abs fs:0xffffffffcccccccc
+	mov rax,a64 abs fs:0xffffffffcccccccc
+	mov rbx,a64 abs fs:0xffffffffcccccccc
+
+	mov al,a64 abs dword fs:foo
+	mov bl,a64 abs dword fs:foo
+	mov ax,a64 abs dword fs:foo
+	mov bx,a64 abs dword fs:foo
+	mov eax,a64 abs dword fs:foo
+	mov ebx,a64 abs dword fs:foo
+	mov rax,a64 abs dword fs:foo
+	mov rbx,a64 abs dword fs:foo
+	mov al,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs dword fs:0xbbbbbbbb
+	mov bl,a64 abs dword fs:0xbbbbbbbb
+	mov ax,a64 abs dword fs:0xbbbbbbbb
+	mov bx,a64 abs dword fs:0xbbbbbbbb
+	mov eax,a64 abs dword fs:0xbbbbbbbb
+	mov ebx,a64 abs dword fs:0xbbbbbbbb
+	mov rax,a64 abs dword fs:0xbbbbbbbb
+	mov rbx,a64 abs dword fs:0xbbbbbbbb
+	mov al,a64 abs dword fs:0xffffffffcccccccc
+	mov bl,a64 abs dword fs:0xffffffffcccccccc
+	mov ax,a64 abs dword fs:0xffffffffcccccccc
+	mov bx,a64 abs dword fs:0xffffffffcccccccc
+	mov eax,a64 abs dword fs:0xffffffffcccccccc
+	mov ebx,a64 abs dword fs:0xffffffffcccccccc
+	mov rax,a64 abs dword fs:0xffffffffcccccccc
+	mov rbx,a64 abs dword fs:0xffffffffcccccccc
+
+	mov al,a64 abs qword fs:foo
+	mov bl,a64 abs qword fs:foo
+	mov ax,a64 abs qword fs:foo
+	mov bx,a64 abs qword fs:foo
+	mov eax,a64 abs qword fs:foo
+	mov ebx,a64 abs qword fs:foo
+	mov rax,a64 abs qword fs:foo
+	mov rbx,a64 abs qword fs:foo
+	mov al,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs qword fs:0xbbbbbbbb
+	mov bl,a64 abs qword fs:0xbbbbbbbb
+	mov ax,a64 abs qword fs:0xbbbbbbbb
+	mov bx,a64 abs qword fs:0xbbbbbbbb
+	mov eax,a64 abs qword fs:0xbbbbbbbb
+	mov ebx,a64 abs qword fs:0xbbbbbbbb
+	mov rax,a64 abs qword fs:0xbbbbbbbb
+	mov rbx,a64 abs qword fs:0xbbbbbbbb
+	mov al,a64 abs qword fs:0xffffffffcccccccc
+	mov bl,a64 abs qword fs:0xffffffffcccccccc
+	mov ax,a64 abs qword fs:0xffffffffcccccccc
+	mov bx,a64 abs qword fs:0xffffffffcccccccc
+	mov eax,a64 abs qword fs:0xffffffffcccccccc
+	mov ebx,a64 abs qword fs:0xffffffffcccccccc
+	mov rax,a64 abs qword fs:0xffffffffcccccccc
+	mov rbx,a64 abs qword fs:0xffffffffcccccccc
+
+	mov al,a32 abs fs:foo
+	mov bl,a32 abs fs:foo
+	mov ax,a32 abs fs:foo
+	mov bx,a32 abs fs:foo
+	mov eax,a32 abs fs:foo
+	mov ebx,a32 abs fs:foo
+	mov rax,a32 abs fs:foo
+	mov rbx,a32 abs fs:foo
+	mov al,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs fs:0xbbbbbbbb
+	mov bl,a32 abs fs:0xbbbbbbbb
+	mov ax,a32 abs fs:0xbbbbbbbb
+	mov bx,a32 abs fs:0xbbbbbbbb
+	mov eax,a32 abs fs:0xbbbbbbbb
+	mov ebx,a32 abs fs:0xbbbbbbbb
+	mov rax,a32 abs fs:0xbbbbbbbb
+	mov rbx,a32 abs fs:0xbbbbbbbb
+	mov al,a32 abs fs:0xffffffffcccccccc
+	mov bl,a32 abs fs:0xffffffffcccccccc
+	mov ax,a32 abs fs:0xffffffffcccccccc
+	mov bx,a32 abs fs:0xffffffffcccccccc
+	mov eax,a32 abs fs:0xffffffffcccccccc
+	mov ebx,a32 abs fs:0xffffffffcccccccc
+	mov rax,a32 abs fs:0xffffffffcccccccc
+	mov rbx,a32 abs fs:0xffffffffcccccccc
+
+	mov al,a32 abs dword fs:foo
+	mov bl,a32 abs dword fs:foo
+	mov ax,a32 abs dword fs:foo
+	mov bx,a32 abs dword fs:foo
+	mov eax,a32 abs dword fs:foo
+	mov ebx,a32 abs dword fs:foo
+	mov rax,a32 abs dword fs:foo
+	mov rbx,a32 abs dword fs:foo
+	mov al,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs dword fs:0xbbbbbbbb
+	mov bl,a32 abs dword fs:0xbbbbbbbb
+	mov ax,a32 abs dword fs:0xbbbbbbbb
+	mov bx,a32 abs dword fs:0xbbbbbbbb
+	mov eax,a32 abs dword fs:0xbbbbbbbb
+	mov ebx,a32 abs dword fs:0xbbbbbbbb
+	mov rax,a32 abs dword fs:0xbbbbbbbb
+	mov rbx,a32 abs dword fs:0xbbbbbbbb
+	mov al,a32 abs dword fs:0xffffffffcccccccc
+	mov bl,a32 abs dword fs:0xffffffffcccccccc
+	mov ax,a32 abs dword fs:0xffffffffcccccccc
+	mov bx,a32 abs dword fs:0xffffffffcccccccc
+	mov eax,a32 abs dword fs:0xffffffffcccccccc
+	mov ebx,a32 abs dword fs:0xffffffffcccccccc
+	mov rax,a32 abs dword fs:0xffffffffcccccccc
+	mov rbx,a32 abs dword fs:0xffffffffcccccccc
+
+	mov al,a32 abs qword fs:foo
+	mov bl,a32 abs qword fs:foo
+	mov ax,a32 abs qword fs:foo
+	mov bx,a32 abs qword fs:foo
+	mov eax,a32 abs qword fs:foo
+	mov ebx,a32 abs qword fs:foo
+	mov rax,a32 abs qword fs:foo
+	mov rbx,a32 abs qword fs:foo
+	mov al,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs qword fs:0xbbbbbbbb
+	mov bl,a32 abs qword fs:0xbbbbbbbb
+	mov ax,a32 abs qword fs:0xbbbbbbbb
+	mov bx,a32 abs qword fs:0xbbbbbbbb
+	mov eax,a32 abs qword fs:0xbbbbbbbb
+	mov ebx,a32 abs qword fs:0xbbbbbbbb
+	mov rax,a32 abs qword fs:0xbbbbbbbb
+	mov rbx,a32 abs qword fs:0xbbbbbbbb
+	mov al,a32 abs qword fs:0xffffffffcccccccc
+	mov bl,a32 abs qword fs:0xffffffffcccccccc
+	mov ax,a32 abs qword fs:0xffffffffcccccccc
+	mov bx,a32 abs qword fs:0xffffffffcccccccc
+	mov eax,a32 abs qword fs:0xffffffffcccccccc
+	mov ebx,a32 abs qword fs:0xffffffffcccccccc
+	mov rax,a32 abs qword fs:0xffffffffcccccccc
+	mov rbx,a32 abs qword fs:0xffffffffcccccccc
+
+	mov al,rel fs:foo
+	mov bl,rel fs:foo
+	mov ax,rel fs:foo
+	mov bx,rel fs:foo
+	mov eax,rel fs:foo
+	mov ebx,rel fs:foo
+	mov rax,rel fs:foo
+	mov rbx,rel fs:foo
+	mov al,rel fs:0xaaaaaaaaaaaaaaaa
+	mov bl,rel fs:0xaaaaaaaaaaaaaaaa
+	mov ax,rel fs:0xaaaaaaaaaaaaaaaa
+	mov bx,rel fs:0xaaaaaaaaaaaaaaaa
+	mov eax,rel fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,rel fs:0xaaaaaaaaaaaaaaaa
+	mov rax,rel fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,rel fs:0xaaaaaaaaaaaaaaaa
+	mov al,rel fs:0xbbbbbbbb
+	mov bl,rel fs:0xbbbbbbbb
+	mov ax,rel fs:0xbbbbbbbb
+	mov bx,rel fs:0xbbbbbbbb
+	mov eax,rel fs:0xbbbbbbbb
+	mov ebx,rel fs:0xbbbbbbbb
+	mov rax,rel fs:0xbbbbbbbb
+	mov rbx,rel fs:0xbbbbbbbb
+	mov al,rel fs:0xffffffffcccccccc
+	mov bl,rel fs:0xffffffffcccccccc
+	mov ax,rel fs:0xffffffffcccccccc
+	mov bx,rel fs:0xffffffffcccccccc
+	mov eax,rel fs:0xffffffffcccccccc
+	mov ebx,rel fs:0xffffffffcccccccc
+	mov rax,rel fs:0xffffffffcccccccc
+	mov rbx,rel fs:0xffffffffcccccccc
+
+	mov al,rel dword fs:foo
+	mov bl,rel dword fs:foo
+	mov ax,rel dword fs:foo
+	mov bx,rel dword fs:foo
+	mov eax,rel dword fs:foo
+	mov ebx,rel dword fs:foo
+	mov rax,rel dword fs:foo
+	mov rbx,rel dword fs:foo
+	mov al,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,rel dword fs:0xbbbbbbbb
+	mov bl,rel dword fs:0xbbbbbbbb
+	mov ax,rel dword fs:0xbbbbbbbb
+	mov bx,rel dword fs:0xbbbbbbbb
+	mov eax,rel dword fs:0xbbbbbbbb
+	mov ebx,rel dword fs:0xbbbbbbbb
+	mov rax,rel dword fs:0xbbbbbbbb
+	mov rbx,rel dword fs:0xbbbbbbbb
+	mov al,rel dword fs:0xffffffffcccccccc
+	mov bl,rel dword fs:0xffffffffcccccccc
+	mov ax,rel dword fs:0xffffffffcccccccc
+	mov bx,rel dword fs:0xffffffffcccccccc
+	mov eax,rel dword fs:0xffffffffcccccccc
+	mov ebx,rel dword fs:0xffffffffcccccccc
+	mov rax,rel dword fs:0xffffffffcccccccc
+	mov rbx,rel dword fs:0xffffffffcccccccc
+
+	mov al,rel qword fs:foo
+	mov bl,rel qword fs:foo
+	mov ax,rel qword fs:foo
+	mov bx,rel qword fs:foo
+	mov eax,rel qword fs:foo
+	mov ebx,rel qword fs:foo
+	mov rax,rel qword fs:foo
+	mov rbx,rel qword fs:foo
+	mov al,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,rel qword fs:0xbbbbbbbb
+	mov bl,rel qword fs:0xbbbbbbbb
+	mov ax,rel qword fs:0xbbbbbbbb
+	mov bx,rel qword fs:0xbbbbbbbb
+	mov eax,rel qword fs:0xbbbbbbbb
+	mov ebx,rel qword fs:0xbbbbbbbb
+	mov rax,rel qword fs:0xbbbbbbbb
+	mov rbx,rel qword fs:0xbbbbbbbb
+	mov al,rel qword fs:0xffffffffcccccccc
+	mov bl,rel qword fs:0xffffffffcccccccc
+	mov ax,rel qword fs:0xffffffffcccccccc
+	mov bx,rel qword fs:0xffffffffcccccccc
+	mov eax,rel qword fs:0xffffffffcccccccc
+	mov ebx,rel qword fs:0xffffffffcccccccc
+	mov rax,rel qword fs:0xffffffffcccccccc
+	mov rbx,rel qword fs:0xffffffffcccccccc
+
+	mov al,a64 rel fs:foo
+	mov bl,a64 rel fs:foo
+	mov ax,a64 rel fs:foo
+	mov bx,a64 rel fs:foo
+	mov eax,a64 rel fs:foo
+	mov ebx,a64 rel fs:foo
+	mov rax,a64 rel fs:foo
+	mov rbx,a64 rel fs:foo
+	mov al,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel fs:0xbbbbbbbb
+	mov bl,a64 rel fs:0xbbbbbbbb
+	mov ax,a64 rel fs:0xbbbbbbbb
+	mov bx,a64 rel fs:0xbbbbbbbb
+	mov eax,a64 rel fs:0xbbbbbbbb
+	mov ebx,a64 rel fs:0xbbbbbbbb
+	mov rax,a64 rel fs:0xbbbbbbbb
+	mov rbx,a64 rel fs:0xbbbbbbbb
+	mov al,a64 rel fs:0xffffffffcccccccc
+	mov bl,a64 rel fs:0xffffffffcccccccc
+	mov ax,a64 rel fs:0xffffffffcccccccc
+	mov bx,a64 rel fs:0xffffffffcccccccc
+	mov eax,a64 rel fs:0xffffffffcccccccc
+	mov ebx,a64 rel fs:0xffffffffcccccccc
+	mov rax,a64 rel fs:0xffffffffcccccccc
+	mov rbx,a64 rel fs:0xffffffffcccccccc
+
+	mov al,a64 rel dword fs:foo
+	mov bl,a64 rel dword fs:foo
+	mov ax,a64 rel dword fs:foo
+	mov bx,a64 rel dword fs:foo
+	mov eax,a64 rel dword fs:foo
+	mov ebx,a64 rel dword fs:foo
+	mov rax,a64 rel dword fs:foo
+	mov rbx,a64 rel dword fs:foo
+	mov al,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel dword fs:0xbbbbbbbb
+	mov bl,a64 rel dword fs:0xbbbbbbbb
+	mov ax,a64 rel dword fs:0xbbbbbbbb
+	mov bx,a64 rel dword fs:0xbbbbbbbb
+	mov eax,a64 rel dword fs:0xbbbbbbbb
+	mov ebx,a64 rel dword fs:0xbbbbbbbb
+	mov rax,a64 rel dword fs:0xbbbbbbbb
+	mov rbx,a64 rel dword fs:0xbbbbbbbb
+	mov al,a64 rel dword fs:0xffffffffcccccccc
+	mov bl,a64 rel dword fs:0xffffffffcccccccc
+	mov ax,a64 rel dword fs:0xffffffffcccccccc
+	mov bx,a64 rel dword fs:0xffffffffcccccccc
+	mov eax,a64 rel dword fs:0xffffffffcccccccc
+	mov ebx,a64 rel dword fs:0xffffffffcccccccc
+	mov rax,a64 rel dword fs:0xffffffffcccccccc
+	mov rbx,a64 rel dword fs:0xffffffffcccccccc
+
+	mov al,a64 rel qword fs:foo
+	mov bl,a64 rel qword fs:foo
+	mov ax,a64 rel qword fs:foo
+	mov bx,a64 rel qword fs:foo
+	mov eax,a64 rel qword fs:foo
+	mov ebx,a64 rel qword fs:foo
+	mov rax,a64 rel qword fs:foo
+	mov rbx,a64 rel qword fs:foo
+	mov al,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel qword fs:0xbbbbbbbb
+	mov bl,a64 rel qword fs:0xbbbbbbbb
+	mov ax,a64 rel qword fs:0xbbbbbbbb
+	mov bx,a64 rel qword fs:0xbbbbbbbb
+	mov eax,a64 rel qword fs:0xbbbbbbbb
+	mov ebx,a64 rel qword fs:0xbbbbbbbb
+	mov rax,a64 rel qword fs:0xbbbbbbbb
+	mov rbx,a64 rel qword fs:0xbbbbbbbb
+	mov al,a64 rel qword fs:0xffffffffcccccccc
+	mov bl,a64 rel qword fs:0xffffffffcccccccc
+	mov ax,a64 rel qword fs:0xffffffffcccccccc
+	mov bx,a64 rel qword fs:0xffffffffcccccccc
+	mov eax,a64 rel qword fs:0xffffffffcccccccc
+	mov ebx,a64 rel qword fs:0xffffffffcccccccc
+	mov rax,a64 rel qword fs:0xffffffffcccccccc
+	mov rbx,a64 rel qword fs:0xffffffffcccccccc
+
+	mov al,a32 rel fs:foo
+	mov bl,a32 rel fs:foo
+	mov ax,a32 rel fs:foo
+	mov bx,a32 rel fs:foo
+	mov eax,a32 rel fs:foo
+	mov ebx,a32 rel fs:foo
+	mov rax,a32 rel fs:foo
+	mov rbx,a32 rel fs:foo
+	mov al,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel fs:0xbbbbbbbb
+	mov bl,a32 rel fs:0xbbbbbbbb
+	mov ax,a32 rel fs:0xbbbbbbbb
+	mov bx,a32 rel fs:0xbbbbbbbb
+	mov eax,a32 rel fs:0xbbbbbbbb
+	mov ebx,a32 rel fs:0xbbbbbbbb
+	mov rax,a32 rel fs:0xbbbbbbbb
+	mov rbx,a32 rel fs:0xbbbbbbbb
+	mov al,a32 rel fs:0xffffffffcccccccc
+	mov bl,a32 rel fs:0xffffffffcccccccc
+	mov ax,a32 rel fs:0xffffffffcccccccc
+	mov bx,a32 rel fs:0xffffffffcccccccc
+	mov eax,a32 rel fs:0xffffffffcccccccc
+	mov ebx,a32 rel fs:0xffffffffcccccccc
+	mov rax,a32 rel fs:0xffffffffcccccccc
+	mov rbx,a32 rel fs:0xffffffffcccccccc
+
+	mov al,a32 rel dword fs:foo
+	mov bl,a32 rel dword fs:foo
+	mov ax,a32 rel dword fs:foo
+	mov bx,a32 rel dword fs:foo
+	mov eax,a32 rel dword fs:foo
+	mov ebx,a32 rel dword fs:foo
+	mov rax,a32 rel dword fs:foo
+	mov rbx,a32 rel dword fs:foo
+	mov al,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel dword fs:0xbbbbbbbb
+	mov bl,a32 rel dword fs:0xbbbbbbbb
+	mov ax,a32 rel dword fs:0xbbbbbbbb
+	mov bx,a32 rel dword fs:0xbbbbbbbb
+	mov eax,a32 rel dword fs:0xbbbbbbbb
+	mov ebx,a32 rel dword fs:0xbbbbbbbb
+	mov rax,a32 rel dword fs:0xbbbbbbbb
+	mov rbx,a32 rel dword fs:0xbbbbbbbb
+	mov al,a32 rel dword fs:0xffffffffcccccccc
+	mov bl,a32 rel dword fs:0xffffffffcccccccc
+	mov ax,a32 rel dword fs:0xffffffffcccccccc
+	mov bx,a32 rel dword fs:0xffffffffcccccccc
+	mov eax,a32 rel dword fs:0xffffffffcccccccc
+	mov ebx,a32 rel dword fs:0xffffffffcccccccc
+	mov rax,a32 rel dword fs:0xffffffffcccccccc
+	mov rbx,a32 rel dword fs:0xffffffffcccccccc
+
+	mov al,a32 rel qword fs:foo
+	mov bl,a32 rel qword fs:foo
+	mov ax,a32 rel qword fs:foo
+	mov bx,a32 rel qword fs:foo
+	mov eax,a32 rel qword fs:foo
+	mov ebx,a32 rel qword fs:foo
+	mov rax,a32 rel qword fs:foo
+	mov rbx,a32 rel qword fs:foo
+	mov al,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel qword fs:0xbbbbbbbb
+	mov bl,a32 rel qword fs:0xbbbbbbbb
+	mov ax,a32 rel qword fs:0xbbbbbbbb
+	mov bx,a32 rel qword fs:0xbbbbbbbb
+	mov eax,a32 rel qword fs:0xbbbbbbbb
+	mov ebx,a32 rel qword fs:0xbbbbbbbb
+	mov rax,a32 rel qword fs:0xbbbbbbbb
+	mov rbx,a32 rel qword fs:0xbbbbbbbb
+	mov al,a32 rel qword fs:0xffffffffcccccccc
+	mov bl,a32 rel qword fs:0xffffffffcccccccc
+	mov ax,a32 rel qword fs:0xffffffffcccccccc
+	mov bx,a32 rel qword fs:0xffffffffcccccccc
+	mov eax,a32 rel qword fs:0xffffffffcccccccc
+	mov ebx,a32 rel qword fs:0xffffffffcccccccc
+	mov rax,a32 rel qword fs:0xffffffffcccccccc
+	mov rbx,a32 rel qword fs:0xffffffffcccccccc
+
+	mov al,es:foo
+	mov bl,es:foo
+	mov ax,es:foo
+	mov bx,es:foo
+	mov eax,es:foo
+	mov ebx,es:foo
+	mov rax,es:foo
+	mov rbx,es:foo
+	mov al,es:0xaaaaaaaaaaaaaaaa
+	mov bl,es:0xaaaaaaaaaaaaaaaa
+	mov ax,es:0xaaaaaaaaaaaaaaaa
+	mov bx,es:0xaaaaaaaaaaaaaaaa
+	mov eax,es:0xaaaaaaaaaaaaaaaa
+	mov ebx,es:0xaaaaaaaaaaaaaaaa
+	mov rax,es:0xaaaaaaaaaaaaaaaa
+	mov rbx,es:0xaaaaaaaaaaaaaaaa
+	mov al,es:0xbbbbbbbb
+	mov bl,es:0xbbbbbbbb
+	mov ax,es:0xbbbbbbbb
+	mov bx,es:0xbbbbbbbb
+	mov eax,es:0xbbbbbbbb
+	mov ebx,es:0xbbbbbbbb
+	mov rax,es:0xbbbbbbbb
+	mov rbx,es:0xbbbbbbbb
+	mov al,es:0xffffffffcccccccc
+	mov bl,es:0xffffffffcccccccc
+	mov ax,es:0xffffffffcccccccc
+	mov bx,es:0xffffffffcccccccc
+	mov eax,es:0xffffffffcccccccc
+	mov ebx,es:0xffffffffcccccccc
+	mov rax,es:0xffffffffcccccccc
+	mov rbx,es:0xffffffffcccccccc
+
+	mov al,dword es:foo
+	mov bl,dword es:foo
+	mov ax,dword es:foo
+	mov bx,dword es:foo
+	mov eax,dword es:foo
+	mov ebx,dword es:foo
+	mov rax,dword es:foo
+	mov rbx,dword es:foo
+	mov al,dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,dword es:0xaaaaaaaaaaaaaaaa
+	mov al,dword es:0xbbbbbbbb
+	mov bl,dword es:0xbbbbbbbb
+	mov ax,dword es:0xbbbbbbbb
+	mov bx,dword es:0xbbbbbbbb
+	mov eax,dword es:0xbbbbbbbb
+	mov ebx,dword es:0xbbbbbbbb
+	mov rax,dword es:0xbbbbbbbb
+	mov rbx,dword es:0xbbbbbbbb
+	mov al,dword es:0xffffffffcccccccc
+	mov bl,dword es:0xffffffffcccccccc
+	mov ax,dword es:0xffffffffcccccccc
+	mov bx,dword es:0xffffffffcccccccc
+	mov eax,dword es:0xffffffffcccccccc
+	mov ebx,dword es:0xffffffffcccccccc
+	mov rax,dword es:0xffffffffcccccccc
+	mov rbx,dword es:0xffffffffcccccccc
+
+	mov al,qword es:foo
+	mov bl,qword es:foo
+	mov ax,qword es:foo
+	mov bx,qword es:foo
+	mov eax,qword es:foo
+	mov ebx,qword es:foo
+	mov rax,qword es:foo
+	mov rbx,qword es:foo
+	mov al,qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,qword es:0xaaaaaaaaaaaaaaaa
+	mov al,qword es:0xbbbbbbbb
+	mov bl,qword es:0xbbbbbbbb
+	mov ax,qword es:0xbbbbbbbb
+	mov bx,qword es:0xbbbbbbbb
+	mov eax,qword es:0xbbbbbbbb
+	mov ebx,qword es:0xbbbbbbbb
+	mov rax,qword es:0xbbbbbbbb
+	mov rbx,qword es:0xbbbbbbbb
+	mov al,qword es:0xffffffffcccccccc
+	mov bl,qword es:0xffffffffcccccccc
+	mov ax,qword es:0xffffffffcccccccc
+	mov bx,qword es:0xffffffffcccccccc
+	mov eax,qword es:0xffffffffcccccccc
+	mov ebx,qword es:0xffffffffcccccccc
+	mov rax,qword es:0xffffffffcccccccc
+	mov rbx,qword es:0xffffffffcccccccc
+
+	mov al,a64 es:foo
+	mov bl,a64 es:foo
+	mov ax,a64 es:foo
+	mov bx,a64 es:foo
+	mov eax,a64 es:foo
+	mov ebx,a64 es:foo
+	mov rax,a64 es:foo
+	mov rbx,a64 es:foo
+	mov al,a64 es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 es:0xbbbbbbbb
+	mov bl,a64 es:0xbbbbbbbb
+	mov ax,a64 es:0xbbbbbbbb
+	mov bx,a64 es:0xbbbbbbbb
+	mov eax,a64 es:0xbbbbbbbb
+	mov ebx,a64 es:0xbbbbbbbb
+	mov rax,a64 es:0xbbbbbbbb
+	mov rbx,a64 es:0xbbbbbbbb
+	mov al,a64 es:0xffffffffcccccccc
+	mov bl,a64 es:0xffffffffcccccccc
+	mov ax,a64 es:0xffffffffcccccccc
+	mov bx,a64 es:0xffffffffcccccccc
+	mov eax,a64 es:0xffffffffcccccccc
+	mov ebx,a64 es:0xffffffffcccccccc
+	mov rax,a64 es:0xffffffffcccccccc
+	mov rbx,a64 es:0xffffffffcccccccc
+
+	mov al,a64 dword es:foo
+	mov bl,a64 dword es:foo
+	mov ax,a64 dword es:foo
+	mov bx,a64 dword es:foo
+	mov eax,a64 dword es:foo
+	mov ebx,a64 dword es:foo
+	mov rax,a64 dword es:foo
+	mov rbx,a64 dword es:foo
+	mov al,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 dword es:0xbbbbbbbb
+	mov bl,a64 dword es:0xbbbbbbbb
+	mov ax,a64 dword es:0xbbbbbbbb
+	mov bx,a64 dword es:0xbbbbbbbb
+	mov eax,a64 dword es:0xbbbbbbbb
+	mov ebx,a64 dword es:0xbbbbbbbb
+	mov rax,a64 dword es:0xbbbbbbbb
+	mov rbx,a64 dword es:0xbbbbbbbb
+	mov al,a64 dword es:0xffffffffcccccccc
+	mov bl,a64 dword es:0xffffffffcccccccc
+	mov ax,a64 dword es:0xffffffffcccccccc
+	mov bx,a64 dword es:0xffffffffcccccccc
+	mov eax,a64 dword es:0xffffffffcccccccc
+	mov ebx,a64 dword es:0xffffffffcccccccc
+	mov rax,a64 dword es:0xffffffffcccccccc
+	mov rbx,a64 dword es:0xffffffffcccccccc
+
+	mov al,a64 qword es:foo
+	mov bl,a64 qword es:foo
+	mov ax,a64 qword es:foo
+	mov bx,a64 qword es:foo
+	mov eax,a64 qword es:foo
+	mov ebx,a64 qword es:foo
+	mov rax,a64 qword es:foo
+	mov rbx,a64 qword es:foo
+	mov al,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 qword es:0xbbbbbbbb
+	mov bl,a64 qword es:0xbbbbbbbb
+	mov ax,a64 qword es:0xbbbbbbbb
+	mov bx,a64 qword es:0xbbbbbbbb
+	mov eax,a64 qword es:0xbbbbbbbb
+	mov ebx,a64 qword es:0xbbbbbbbb
+	mov rax,a64 qword es:0xbbbbbbbb
+	mov rbx,a64 qword es:0xbbbbbbbb
+	mov al,a64 qword es:0xffffffffcccccccc
+	mov bl,a64 qword es:0xffffffffcccccccc
+	mov ax,a64 qword es:0xffffffffcccccccc
+	mov bx,a64 qword es:0xffffffffcccccccc
+	mov eax,a64 qword es:0xffffffffcccccccc
+	mov ebx,a64 qword es:0xffffffffcccccccc
+	mov rax,a64 qword es:0xffffffffcccccccc
+	mov rbx,a64 qword es:0xffffffffcccccccc
+
+	mov al,a32 es:foo
+	mov bl,a32 es:foo
+	mov ax,a32 es:foo
+	mov bx,a32 es:foo
+	mov eax,a32 es:foo
+	mov ebx,a32 es:foo
+	mov rax,a32 es:foo
+	mov rbx,a32 es:foo
+	mov al,a32 es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 es:0xbbbbbbbb
+	mov bl,a32 es:0xbbbbbbbb
+	mov ax,a32 es:0xbbbbbbbb
+	mov bx,a32 es:0xbbbbbbbb
+	mov eax,a32 es:0xbbbbbbbb
+	mov ebx,a32 es:0xbbbbbbbb
+	mov rax,a32 es:0xbbbbbbbb
+	mov rbx,a32 es:0xbbbbbbbb
+	mov al,a32 es:0xffffffffcccccccc
+	mov bl,a32 es:0xffffffffcccccccc
+	mov ax,a32 es:0xffffffffcccccccc
+	mov bx,a32 es:0xffffffffcccccccc
+	mov eax,a32 es:0xffffffffcccccccc
+	mov ebx,a32 es:0xffffffffcccccccc
+	mov rax,a32 es:0xffffffffcccccccc
+	mov rbx,a32 es:0xffffffffcccccccc
+
+	mov al,a32 dword es:foo
+	mov bl,a32 dword es:foo
+	mov ax,a32 dword es:foo
+	mov bx,a32 dword es:foo
+	mov eax,a32 dword es:foo
+	mov ebx,a32 dword es:foo
+	mov rax,a32 dword es:foo
+	mov rbx,a32 dword es:foo
+	mov al,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 dword es:0xbbbbbbbb
+	mov bl,a32 dword es:0xbbbbbbbb
+	mov ax,a32 dword es:0xbbbbbbbb
+	mov bx,a32 dword es:0xbbbbbbbb
+	mov eax,a32 dword es:0xbbbbbbbb
+	mov ebx,a32 dword es:0xbbbbbbbb
+	mov rax,a32 dword es:0xbbbbbbbb
+	mov rbx,a32 dword es:0xbbbbbbbb
+	mov al,a32 dword es:0xffffffffcccccccc
+	mov bl,a32 dword es:0xffffffffcccccccc
+	mov ax,a32 dword es:0xffffffffcccccccc
+	mov bx,a32 dword es:0xffffffffcccccccc
+	mov eax,a32 dword es:0xffffffffcccccccc
+	mov ebx,a32 dword es:0xffffffffcccccccc
+	mov rax,a32 dword es:0xffffffffcccccccc
+	mov rbx,a32 dword es:0xffffffffcccccccc
+
+	mov al,a32 qword es:foo
+	mov bl,a32 qword es:foo
+	mov ax,a32 qword es:foo
+	mov bx,a32 qword es:foo
+	mov eax,a32 qword es:foo
+	mov ebx,a32 qword es:foo
+	mov rax,a32 qword es:foo
+	mov rbx,a32 qword es:foo
+	mov al,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 qword es:0xbbbbbbbb
+	mov bl,a32 qword es:0xbbbbbbbb
+	mov ax,a32 qword es:0xbbbbbbbb
+	mov bx,a32 qword es:0xbbbbbbbb
+	mov eax,a32 qword es:0xbbbbbbbb
+	mov ebx,a32 qword es:0xbbbbbbbb
+	mov rax,a32 qword es:0xbbbbbbbb
+	mov rbx,a32 qword es:0xbbbbbbbb
+	mov al,a32 qword es:0xffffffffcccccccc
+	mov bl,a32 qword es:0xffffffffcccccccc
+	mov ax,a32 qword es:0xffffffffcccccccc
+	mov bx,a32 qword es:0xffffffffcccccccc
+	mov eax,a32 qword es:0xffffffffcccccccc
+	mov ebx,a32 qword es:0xffffffffcccccccc
+	mov rax,a32 qword es:0xffffffffcccccccc
+	mov rbx,a32 qword es:0xffffffffcccccccc
+
+	mov al,abs es:foo
+	mov bl,abs es:foo
+	mov ax,abs es:foo
+	mov bx,abs es:foo
+	mov eax,abs es:foo
+	mov ebx,abs es:foo
+	mov rax,abs es:foo
+	mov rbx,abs es:foo
+	mov al,abs es:0xaaaaaaaaaaaaaaaa
+	mov bl,abs es:0xaaaaaaaaaaaaaaaa
+	mov ax,abs es:0xaaaaaaaaaaaaaaaa
+	mov bx,abs es:0xaaaaaaaaaaaaaaaa
+	mov eax,abs es:0xaaaaaaaaaaaaaaaa
+	mov ebx,abs es:0xaaaaaaaaaaaaaaaa
+	mov rax,abs es:0xaaaaaaaaaaaaaaaa
+	mov rbx,abs es:0xaaaaaaaaaaaaaaaa
+	mov al,abs es:0xbbbbbbbb
+	mov bl,abs es:0xbbbbbbbb
+	mov ax,abs es:0xbbbbbbbb
+	mov bx,abs es:0xbbbbbbbb
+	mov eax,abs es:0xbbbbbbbb
+	mov ebx,abs es:0xbbbbbbbb
+	mov rax,abs es:0xbbbbbbbb
+	mov rbx,abs es:0xbbbbbbbb
+	mov al,abs es:0xffffffffcccccccc
+	mov bl,abs es:0xffffffffcccccccc
+	mov ax,abs es:0xffffffffcccccccc
+	mov bx,abs es:0xffffffffcccccccc
+	mov eax,abs es:0xffffffffcccccccc
+	mov ebx,abs es:0xffffffffcccccccc
+	mov rax,abs es:0xffffffffcccccccc
+	mov rbx,abs es:0xffffffffcccccccc
+
+	mov al,abs dword es:foo
+	mov bl,abs dword es:foo
+	mov ax,abs dword es:foo
+	mov bx,abs dword es:foo
+	mov eax,abs dword es:foo
+	mov ebx,abs dword es:foo
+	mov rax,abs dword es:foo
+	mov rbx,abs dword es:foo
+	mov al,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov al,abs dword es:0xbbbbbbbb
+	mov bl,abs dword es:0xbbbbbbbb
+	mov ax,abs dword es:0xbbbbbbbb
+	mov bx,abs dword es:0xbbbbbbbb
+	mov eax,abs dword es:0xbbbbbbbb
+	mov ebx,abs dword es:0xbbbbbbbb
+	mov rax,abs dword es:0xbbbbbbbb
+	mov rbx,abs dword es:0xbbbbbbbb
+	mov al,abs dword es:0xffffffffcccccccc
+	mov bl,abs dword es:0xffffffffcccccccc
+	mov ax,abs dword es:0xffffffffcccccccc
+	mov bx,abs dword es:0xffffffffcccccccc
+	mov eax,abs dword es:0xffffffffcccccccc
+	mov ebx,abs dword es:0xffffffffcccccccc
+	mov rax,abs dword es:0xffffffffcccccccc
+	mov rbx,abs dword es:0xffffffffcccccccc
+
+	mov al,abs qword es:foo
+	mov bl,abs qword es:foo
+	mov ax,abs qword es:foo
+	mov bx,abs qword es:foo
+	mov eax,abs qword es:foo
+	mov ebx,abs qword es:foo
+	mov rax,abs qword es:foo
+	mov rbx,abs qword es:foo
+	mov al,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov al,abs qword es:0xbbbbbbbb
+	mov bl,abs qword es:0xbbbbbbbb
+	mov ax,abs qword es:0xbbbbbbbb
+	mov bx,abs qword es:0xbbbbbbbb
+	mov eax,abs qword es:0xbbbbbbbb
+	mov ebx,abs qword es:0xbbbbbbbb
+	mov rax,abs qword es:0xbbbbbbbb
+	mov rbx,abs qword es:0xbbbbbbbb
+	mov al,abs qword es:0xffffffffcccccccc
+	mov bl,abs qword es:0xffffffffcccccccc
+	mov ax,abs qword es:0xffffffffcccccccc
+	mov bx,abs qword es:0xffffffffcccccccc
+	mov eax,abs qword es:0xffffffffcccccccc
+	mov ebx,abs qword es:0xffffffffcccccccc
+	mov rax,abs qword es:0xffffffffcccccccc
+	mov rbx,abs qword es:0xffffffffcccccccc
+
+	mov al,a64 abs es:foo
+	mov bl,a64 abs es:foo
+	mov ax,a64 abs es:foo
+	mov bx,a64 abs es:foo
+	mov eax,a64 abs es:foo
+	mov ebx,a64 abs es:foo
+	mov rax,a64 abs es:foo
+	mov rbx,a64 abs es:foo
+	mov al,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs es:0xbbbbbbbb
+	mov bl,a64 abs es:0xbbbbbbbb
+	mov ax,a64 abs es:0xbbbbbbbb
+	mov bx,a64 abs es:0xbbbbbbbb
+	mov eax,a64 abs es:0xbbbbbbbb
+	mov ebx,a64 abs es:0xbbbbbbbb
+	mov rax,a64 abs es:0xbbbbbbbb
+	mov rbx,a64 abs es:0xbbbbbbbb
+	mov al,a64 abs es:0xffffffffcccccccc
+	mov bl,a64 abs es:0xffffffffcccccccc
+	mov ax,a64 abs es:0xffffffffcccccccc
+	mov bx,a64 abs es:0xffffffffcccccccc
+	mov eax,a64 abs es:0xffffffffcccccccc
+	mov ebx,a64 abs es:0xffffffffcccccccc
+	mov rax,a64 abs es:0xffffffffcccccccc
+	mov rbx,a64 abs es:0xffffffffcccccccc
+
+	mov al,a64 abs dword es:foo
+	mov bl,a64 abs dword es:foo
+	mov ax,a64 abs dword es:foo
+	mov bx,a64 abs dword es:foo
+	mov eax,a64 abs dword es:foo
+	mov ebx,a64 abs dword es:foo
+	mov rax,a64 abs dword es:foo
+	mov rbx,a64 abs dword es:foo
+	mov al,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs dword es:0xbbbbbbbb
+	mov bl,a64 abs dword es:0xbbbbbbbb
+	mov ax,a64 abs dword es:0xbbbbbbbb
+	mov bx,a64 abs dword es:0xbbbbbbbb
+	mov eax,a64 abs dword es:0xbbbbbbbb
+	mov ebx,a64 abs dword es:0xbbbbbbbb
+	mov rax,a64 abs dword es:0xbbbbbbbb
+	mov rbx,a64 abs dword es:0xbbbbbbbb
+	mov al,a64 abs dword es:0xffffffffcccccccc
+	mov bl,a64 abs dword es:0xffffffffcccccccc
+	mov ax,a64 abs dword es:0xffffffffcccccccc
+	mov bx,a64 abs dword es:0xffffffffcccccccc
+	mov eax,a64 abs dword es:0xffffffffcccccccc
+	mov ebx,a64 abs dword es:0xffffffffcccccccc
+	mov rax,a64 abs dword es:0xffffffffcccccccc
+	mov rbx,a64 abs dword es:0xffffffffcccccccc
+
+	mov al,a64 abs qword es:foo
+	mov bl,a64 abs qword es:foo
+	mov ax,a64 abs qword es:foo
+	mov bx,a64 abs qword es:foo
+	mov eax,a64 abs qword es:foo
+	mov ebx,a64 abs qword es:foo
+	mov rax,a64 abs qword es:foo
+	mov rbx,a64 abs qword es:foo
+	mov al,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs qword es:0xbbbbbbbb
+	mov bl,a64 abs qword es:0xbbbbbbbb
+	mov ax,a64 abs qword es:0xbbbbbbbb
+	mov bx,a64 abs qword es:0xbbbbbbbb
+	mov eax,a64 abs qword es:0xbbbbbbbb
+	mov ebx,a64 abs qword es:0xbbbbbbbb
+	mov rax,a64 abs qword es:0xbbbbbbbb
+	mov rbx,a64 abs qword es:0xbbbbbbbb
+	mov al,a64 abs qword es:0xffffffffcccccccc
+	mov bl,a64 abs qword es:0xffffffffcccccccc
+	mov ax,a64 abs qword es:0xffffffffcccccccc
+	mov bx,a64 abs qword es:0xffffffffcccccccc
+	mov eax,a64 abs qword es:0xffffffffcccccccc
+	mov ebx,a64 abs qword es:0xffffffffcccccccc
+	mov rax,a64 abs qword es:0xffffffffcccccccc
+	mov rbx,a64 abs qword es:0xffffffffcccccccc
+
+	mov al,a32 abs es:foo
+	mov bl,a32 abs es:foo
+	mov ax,a32 abs es:foo
+	mov bx,a32 abs es:foo
+	mov eax,a32 abs es:foo
+	mov ebx,a32 abs es:foo
+	mov rax,a32 abs es:foo
+	mov rbx,a32 abs es:foo
+	mov al,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs es:0xbbbbbbbb
+	mov bl,a32 abs es:0xbbbbbbbb
+	mov ax,a32 abs es:0xbbbbbbbb
+	mov bx,a32 abs es:0xbbbbbbbb
+	mov eax,a32 abs es:0xbbbbbbbb
+	mov ebx,a32 abs es:0xbbbbbbbb
+	mov rax,a32 abs es:0xbbbbbbbb
+	mov rbx,a32 abs es:0xbbbbbbbb
+	mov al,a32 abs es:0xffffffffcccccccc
+	mov bl,a32 abs es:0xffffffffcccccccc
+	mov ax,a32 abs es:0xffffffffcccccccc
+	mov bx,a32 abs es:0xffffffffcccccccc
+	mov eax,a32 abs es:0xffffffffcccccccc
+	mov ebx,a32 abs es:0xffffffffcccccccc
+	mov rax,a32 abs es:0xffffffffcccccccc
+	mov rbx,a32 abs es:0xffffffffcccccccc
+
+	mov al,a32 abs dword es:foo
+	mov bl,a32 abs dword es:foo
+	mov ax,a32 abs dword es:foo
+	mov bx,a32 abs dword es:foo
+	mov eax,a32 abs dword es:foo
+	mov ebx,a32 abs dword es:foo
+	mov rax,a32 abs dword es:foo
+	mov rbx,a32 abs dword es:foo
+	mov al,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs dword es:0xbbbbbbbb
+	mov bl,a32 abs dword es:0xbbbbbbbb
+	mov ax,a32 abs dword es:0xbbbbbbbb
+	mov bx,a32 abs dword es:0xbbbbbbbb
+	mov eax,a32 abs dword es:0xbbbbbbbb
+	mov ebx,a32 abs dword es:0xbbbbbbbb
+	mov rax,a32 abs dword es:0xbbbbbbbb
+	mov rbx,a32 abs dword es:0xbbbbbbbb
+	mov al,a32 abs dword es:0xffffffffcccccccc
+	mov bl,a32 abs dword es:0xffffffffcccccccc
+	mov ax,a32 abs dword es:0xffffffffcccccccc
+	mov bx,a32 abs dword es:0xffffffffcccccccc
+	mov eax,a32 abs dword es:0xffffffffcccccccc
+	mov ebx,a32 abs dword es:0xffffffffcccccccc
+	mov rax,a32 abs dword es:0xffffffffcccccccc
+	mov rbx,a32 abs dword es:0xffffffffcccccccc
+
+	mov al,a32 abs qword es:foo
+	mov bl,a32 abs qword es:foo
+	mov ax,a32 abs qword es:foo
+	mov bx,a32 abs qword es:foo
+	mov eax,a32 abs qword es:foo
+	mov ebx,a32 abs qword es:foo
+	mov rax,a32 abs qword es:foo
+	mov rbx,a32 abs qword es:foo
+	mov al,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs qword es:0xbbbbbbbb
+	mov bl,a32 abs qword es:0xbbbbbbbb
+	mov ax,a32 abs qword es:0xbbbbbbbb
+	mov bx,a32 abs qword es:0xbbbbbbbb
+	mov eax,a32 abs qword es:0xbbbbbbbb
+	mov ebx,a32 abs qword es:0xbbbbbbbb
+	mov rax,a32 abs qword es:0xbbbbbbbb
+	mov rbx,a32 abs qword es:0xbbbbbbbb
+	mov al,a32 abs qword es:0xffffffffcccccccc
+	mov bl,a32 abs qword es:0xffffffffcccccccc
+	mov ax,a32 abs qword es:0xffffffffcccccccc
+	mov bx,a32 abs qword es:0xffffffffcccccccc
+	mov eax,a32 abs qword es:0xffffffffcccccccc
+	mov ebx,a32 abs qword es:0xffffffffcccccccc
+	mov rax,a32 abs qword es:0xffffffffcccccccc
+	mov rbx,a32 abs qword es:0xffffffffcccccccc
+
+	mov al,rel es:foo
+	mov bl,rel es:foo
+	mov ax,rel es:foo
+	mov bx,rel es:foo
+	mov eax,rel es:foo
+	mov ebx,rel es:foo
+	mov rax,rel es:foo
+	mov rbx,rel es:foo
+	mov al,rel es:0xaaaaaaaaaaaaaaaa
+	mov bl,rel es:0xaaaaaaaaaaaaaaaa
+	mov ax,rel es:0xaaaaaaaaaaaaaaaa
+	mov bx,rel es:0xaaaaaaaaaaaaaaaa
+	mov eax,rel es:0xaaaaaaaaaaaaaaaa
+	mov ebx,rel es:0xaaaaaaaaaaaaaaaa
+	mov rax,rel es:0xaaaaaaaaaaaaaaaa
+	mov rbx,rel es:0xaaaaaaaaaaaaaaaa
+	mov al,rel es:0xbbbbbbbb
+	mov bl,rel es:0xbbbbbbbb
+	mov ax,rel es:0xbbbbbbbb
+	mov bx,rel es:0xbbbbbbbb
+	mov eax,rel es:0xbbbbbbbb
+	mov ebx,rel es:0xbbbbbbbb
+	mov rax,rel es:0xbbbbbbbb
+	mov rbx,rel es:0xbbbbbbbb
+	mov al,rel es:0xffffffffcccccccc
+	mov bl,rel es:0xffffffffcccccccc
+	mov ax,rel es:0xffffffffcccccccc
+	mov bx,rel es:0xffffffffcccccccc
+	mov eax,rel es:0xffffffffcccccccc
+	mov ebx,rel es:0xffffffffcccccccc
+	mov rax,rel es:0xffffffffcccccccc
+	mov rbx,rel es:0xffffffffcccccccc
+
+	mov al,rel dword es:foo
+	mov bl,rel dword es:foo
+	mov ax,rel dword es:foo
+	mov bx,rel dword es:foo
+	mov eax,rel dword es:foo
+	mov ebx,rel dword es:foo
+	mov rax,rel dword es:foo
+	mov rbx,rel dword es:foo
+	mov al,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov al,rel dword es:0xbbbbbbbb
+	mov bl,rel dword es:0xbbbbbbbb
+	mov ax,rel dword es:0xbbbbbbbb
+	mov bx,rel dword es:0xbbbbbbbb
+	mov eax,rel dword es:0xbbbbbbbb
+	mov ebx,rel dword es:0xbbbbbbbb
+	mov rax,rel dword es:0xbbbbbbbb
+	mov rbx,rel dword es:0xbbbbbbbb
+	mov al,rel dword es:0xffffffffcccccccc
+	mov bl,rel dword es:0xffffffffcccccccc
+	mov ax,rel dword es:0xffffffffcccccccc
+	mov bx,rel dword es:0xffffffffcccccccc
+	mov eax,rel dword es:0xffffffffcccccccc
+	mov ebx,rel dword es:0xffffffffcccccccc
+	mov rax,rel dword es:0xffffffffcccccccc
+	mov rbx,rel dword es:0xffffffffcccccccc
+
+	mov al,rel qword es:foo
+	mov bl,rel qword es:foo
+	mov ax,rel qword es:foo
+	mov bx,rel qword es:foo
+	mov eax,rel qword es:foo
+	mov ebx,rel qword es:foo
+	mov rax,rel qword es:foo
+	mov rbx,rel qword es:foo
+	mov al,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov al,rel qword es:0xbbbbbbbb
+	mov bl,rel qword es:0xbbbbbbbb
+	mov ax,rel qword es:0xbbbbbbbb
+	mov bx,rel qword es:0xbbbbbbbb
+	mov eax,rel qword es:0xbbbbbbbb
+	mov ebx,rel qword es:0xbbbbbbbb
+	mov rax,rel qword es:0xbbbbbbbb
+	mov rbx,rel qword es:0xbbbbbbbb
+	mov al,rel qword es:0xffffffffcccccccc
+	mov bl,rel qword es:0xffffffffcccccccc
+	mov ax,rel qword es:0xffffffffcccccccc
+	mov bx,rel qword es:0xffffffffcccccccc
+	mov eax,rel qword es:0xffffffffcccccccc
+	mov ebx,rel qword es:0xffffffffcccccccc
+	mov rax,rel qword es:0xffffffffcccccccc
+	mov rbx,rel qword es:0xffffffffcccccccc
+
+	mov al,a64 rel es:foo
+	mov bl,a64 rel es:foo
+	mov ax,a64 rel es:foo
+	mov bx,a64 rel es:foo
+	mov eax,a64 rel es:foo
+	mov ebx,a64 rel es:foo
+	mov rax,a64 rel es:foo
+	mov rbx,a64 rel es:foo
+	mov al,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel es:0xbbbbbbbb
+	mov bl,a64 rel es:0xbbbbbbbb
+	mov ax,a64 rel es:0xbbbbbbbb
+	mov bx,a64 rel es:0xbbbbbbbb
+	mov eax,a64 rel es:0xbbbbbbbb
+	mov ebx,a64 rel es:0xbbbbbbbb
+	mov rax,a64 rel es:0xbbbbbbbb
+	mov rbx,a64 rel es:0xbbbbbbbb
+	mov al,a64 rel es:0xffffffffcccccccc
+	mov bl,a64 rel es:0xffffffffcccccccc
+	mov ax,a64 rel es:0xffffffffcccccccc
+	mov bx,a64 rel es:0xffffffffcccccccc
+	mov eax,a64 rel es:0xffffffffcccccccc
+	mov ebx,a64 rel es:0xffffffffcccccccc
+	mov rax,a64 rel es:0xffffffffcccccccc
+	mov rbx,a64 rel es:0xffffffffcccccccc
+
+	mov al,a64 rel dword es:foo
+	mov bl,a64 rel dword es:foo
+	mov ax,a64 rel dword es:foo
+	mov bx,a64 rel dword es:foo
+	mov eax,a64 rel dword es:foo
+	mov ebx,a64 rel dword es:foo
+	mov rax,a64 rel dword es:foo
+	mov rbx,a64 rel dword es:foo
+	mov al,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel dword es:0xbbbbbbbb
+	mov bl,a64 rel dword es:0xbbbbbbbb
+	mov ax,a64 rel dword es:0xbbbbbbbb
+	mov bx,a64 rel dword es:0xbbbbbbbb
+	mov eax,a64 rel dword es:0xbbbbbbbb
+	mov ebx,a64 rel dword es:0xbbbbbbbb
+	mov rax,a64 rel dword es:0xbbbbbbbb
+	mov rbx,a64 rel dword es:0xbbbbbbbb
+	mov al,a64 rel dword es:0xffffffffcccccccc
+	mov bl,a64 rel dword es:0xffffffffcccccccc
+	mov ax,a64 rel dword es:0xffffffffcccccccc
+	mov bx,a64 rel dword es:0xffffffffcccccccc
+	mov eax,a64 rel dword es:0xffffffffcccccccc
+	mov ebx,a64 rel dword es:0xffffffffcccccccc
+	mov rax,a64 rel dword es:0xffffffffcccccccc
+	mov rbx,a64 rel dword es:0xffffffffcccccccc
+
+	mov al,a64 rel qword es:foo
+	mov bl,a64 rel qword es:foo
+	mov ax,a64 rel qword es:foo
+	mov bx,a64 rel qword es:foo
+	mov eax,a64 rel qword es:foo
+	mov ebx,a64 rel qword es:foo
+	mov rax,a64 rel qword es:foo
+	mov rbx,a64 rel qword es:foo
+	mov al,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel qword es:0xbbbbbbbb
+	mov bl,a64 rel qword es:0xbbbbbbbb
+	mov ax,a64 rel qword es:0xbbbbbbbb
+	mov bx,a64 rel qword es:0xbbbbbbbb
+	mov eax,a64 rel qword es:0xbbbbbbbb
+	mov ebx,a64 rel qword es:0xbbbbbbbb
+	mov rax,a64 rel qword es:0xbbbbbbbb
+	mov rbx,a64 rel qword es:0xbbbbbbbb
+	mov al,a64 rel qword es:0xffffffffcccccccc
+	mov bl,a64 rel qword es:0xffffffffcccccccc
+	mov ax,a64 rel qword es:0xffffffffcccccccc
+	mov bx,a64 rel qword es:0xffffffffcccccccc
+	mov eax,a64 rel qword es:0xffffffffcccccccc
+	mov ebx,a64 rel qword es:0xffffffffcccccccc
+	mov rax,a64 rel qword es:0xffffffffcccccccc
+	mov rbx,a64 rel qword es:0xffffffffcccccccc
+
+	mov al,a32 rel es:foo
+	mov bl,a32 rel es:foo
+	mov ax,a32 rel es:foo
+	mov bx,a32 rel es:foo
+	mov eax,a32 rel es:foo
+	mov ebx,a32 rel es:foo
+	mov rax,a32 rel es:foo
+	mov rbx,a32 rel es:foo
+	mov al,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel es:0xbbbbbbbb
+	mov bl,a32 rel es:0xbbbbbbbb
+	mov ax,a32 rel es:0xbbbbbbbb
+	mov bx,a32 rel es:0xbbbbbbbb
+	mov eax,a32 rel es:0xbbbbbbbb
+	mov ebx,a32 rel es:0xbbbbbbbb
+	mov rax,a32 rel es:0xbbbbbbbb
+	mov rbx,a32 rel es:0xbbbbbbbb
+	mov al,a32 rel es:0xffffffffcccccccc
+	mov bl,a32 rel es:0xffffffffcccccccc
+	mov ax,a32 rel es:0xffffffffcccccccc
+	mov bx,a32 rel es:0xffffffffcccccccc
+	mov eax,a32 rel es:0xffffffffcccccccc
+	mov ebx,a32 rel es:0xffffffffcccccccc
+	mov rax,a32 rel es:0xffffffffcccccccc
+	mov rbx,a32 rel es:0xffffffffcccccccc
+
+	mov al,a32 rel dword es:foo
+	mov bl,a32 rel dword es:foo
+	mov ax,a32 rel dword es:foo
+	mov bx,a32 rel dword es:foo
+	mov eax,a32 rel dword es:foo
+	mov ebx,a32 rel dword es:foo
+	mov rax,a32 rel dword es:foo
+	mov rbx,a32 rel dword es:foo
+	mov al,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel dword es:0xbbbbbbbb
+	mov bl,a32 rel dword es:0xbbbbbbbb
+	mov ax,a32 rel dword es:0xbbbbbbbb
+	mov bx,a32 rel dword es:0xbbbbbbbb
+	mov eax,a32 rel dword es:0xbbbbbbbb
+	mov ebx,a32 rel dword es:0xbbbbbbbb
+	mov rax,a32 rel dword es:0xbbbbbbbb
+	mov rbx,a32 rel dword es:0xbbbbbbbb
+	mov al,a32 rel dword es:0xffffffffcccccccc
+	mov bl,a32 rel dword es:0xffffffffcccccccc
+	mov ax,a32 rel dword es:0xffffffffcccccccc
+	mov bx,a32 rel dword es:0xffffffffcccccccc
+	mov eax,a32 rel dword es:0xffffffffcccccccc
+	mov ebx,a32 rel dword es:0xffffffffcccccccc
+	mov rax,a32 rel dword es:0xffffffffcccccccc
+	mov rbx,a32 rel dword es:0xffffffffcccccccc
+
+	mov al,a32 rel qword es:foo
+	mov bl,a32 rel qword es:foo
+	mov ax,a32 rel qword es:foo
+	mov bx,a32 rel qword es:foo
+	mov eax,a32 rel qword es:foo
+	mov ebx,a32 rel qword es:foo
+	mov rax,a32 rel qword es:foo
+	mov rbx,a32 rel qword es:foo
+	mov al,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel qword es:0xbbbbbbbb
+	mov bl,a32 rel qword es:0xbbbbbbbb
+	mov ax,a32 rel qword es:0xbbbbbbbb
+	mov bx,a32 rel qword es:0xbbbbbbbb
+	mov eax,a32 rel qword es:0xbbbbbbbb
+	mov ebx,a32 rel qword es:0xbbbbbbbb
+	mov rax,a32 rel qword es:0xbbbbbbbb
+	mov rbx,a32 rel qword es:0xbbbbbbbb
+	mov al,a32 rel qword es:0xffffffffcccccccc
+	mov bl,a32 rel qword es:0xffffffffcccccccc
+	mov ax,a32 rel qword es:0xffffffffcccccccc
+	mov bx,a32 rel qword es:0xffffffffcccccccc
+	mov eax,a32 rel qword es:0xffffffffcccccccc
+	mov ebx,a32 rel qword es:0xffffffffcccccccc
+	mov rax,a32 rel qword es:0xffffffffcccccccc
+	mov rbx,a32 rel qword es:0xffffffffcccccccc
+
+
+	default rel
+
+	mov al,foo
+	mov bl,foo
+	mov ax,foo
+	mov bx,foo
+	mov eax,foo
+	mov ebx,foo
+	mov rax,foo
+	mov rbx,foo
+	mov al,0xaaaaaaaaaaaaaaaa
+	mov bl,0xaaaaaaaaaaaaaaaa
+	mov ax,0xaaaaaaaaaaaaaaaa
+	mov bx,0xaaaaaaaaaaaaaaaa
+	mov eax,0xaaaaaaaaaaaaaaaa
+	mov ebx,0xaaaaaaaaaaaaaaaa
+	mov rax,0xaaaaaaaaaaaaaaaa
+	mov rbx,0xaaaaaaaaaaaaaaaa
+	mov al,0xbbbbbbbb
+	mov bl,0xbbbbbbbb
+	mov ax,0xbbbbbbbb
+	mov bx,0xbbbbbbbb
+	mov eax,0xbbbbbbbb
+	mov ebx,0xbbbbbbbb
+	mov rax,0xbbbbbbbb
+	mov rbx,0xbbbbbbbb
+	mov al,0xffffffffcccccccc
+	mov bl,0xffffffffcccccccc
+	mov ax,0xffffffffcccccccc
+	mov bx,0xffffffffcccccccc
+	mov eax,0xffffffffcccccccc
+	mov ebx,0xffffffffcccccccc
+	mov rax,0xffffffffcccccccc
+	mov rbx,0xffffffffcccccccc
+
+	mov al,dword foo
+	mov bl,dword foo
+	mov ax,dword foo
+	mov bx,dword foo
+	mov eax,dword foo
+	mov ebx,dword foo
+	mov rax,dword foo
+	mov rbx,dword foo
+	mov al,dword 0xaaaaaaaaaaaaaaaa
+	mov bl,dword 0xaaaaaaaaaaaaaaaa
+	mov ax,dword 0xaaaaaaaaaaaaaaaa
+	mov bx,dword 0xaaaaaaaaaaaaaaaa
+	mov eax,dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,dword 0xaaaaaaaaaaaaaaaa
+	mov rax,dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,dword 0xaaaaaaaaaaaaaaaa
+	mov al,dword 0xbbbbbbbb
+	mov bl,dword 0xbbbbbbbb
+	mov ax,dword 0xbbbbbbbb
+	mov bx,dword 0xbbbbbbbb
+	mov eax,dword 0xbbbbbbbb
+	mov ebx,dword 0xbbbbbbbb
+	mov rax,dword 0xbbbbbbbb
+	mov rbx,dword 0xbbbbbbbb
+	mov al,dword 0xffffffffcccccccc
+	mov bl,dword 0xffffffffcccccccc
+	mov ax,dword 0xffffffffcccccccc
+	mov bx,dword 0xffffffffcccccccc
+	mov eax,dword 0xffffffffcccccccc
+	mov ebx,dword 0xffffffffcccccccc
+	mov rax,dword 0xffffffffcccccccc
+	mov rbx,dword 0xffffffffcccccccc
+
+	mov al,qword foo
+	mov bl,qword foo
+	mov ax,qword foo
+	mov bx,qword foo
+	mov eax,qword foo
+	mov ebx,qword foo
+	mov rax,qword foo
+	mov rbx,qword foo
+	mov al,qword 0xaaaaaaaaaaaaaaaa
+	mov bl,qword 0xaaaaaaaaaaaaaaaa
+	mov ax,qword 0xaaaaaaaaaaaaaaaa
+	mov bx,qword 0xaaaaaaaaaaaaaaaa
+	mov eax,qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,qword 0xaaaaaaaaaaaaaaaa
+	mov rax,qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,qword 0xaaaaaaaaaaaaaaaa
+	mov al,qword 0xbbbbbbbb
+	mov bl,qword 0xbbbbbbbb
+	mov ax,qword 0xbbbbbbbb
+	mov bx,qword 0xbbbbbbbb
+	mov eax,qword 0xbbbbbbbb
+	mov ebx,qword 0xbbbbbbbb
+	mov rax,qword 0xbbbbbbbb
+	mov rbx,qword 0xbbbbbbbb
+	mov al,qword 0xffffffffcccccccc
+	mov bl,qword 0xffffffffcccccccc
+	mov ax,qword 0xffffffffcccccccc
+	mov bx,qword 0xffffffffcccccccc
+	mov eax,qword 0xffffffffcccccccc
+	mov ebx,qword 0xffffffffcccccccc
+	mov rax,qword 0xffffffffcccccccc
+	mov rbx,qword 0xffffffffcccccccc
+
+	mov al,a64 foo
+	mov bl,a64 foo
+	mov ax,a64 foo
+	mov bx,a64 foo
+	mov eax,a64 foo
+	mov ebx,a64 foo
+	mov rax,a64 foo
+	mov rbx,a64 foo
+	mov al,a64 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 0xaaaaaaaaaaaaaaaa
+	mov al,a64 0xbbbbbbbb
+	mov bl,a64 0xbbbbbbbb
+	mov ax,a64 0xbbbbbbbb
+	mov bx,a64 0xbbbbbbbb
+	mov eax,a64 0xbbbbbbbb
+	mov ebx,a64 0xbbbbbbbb
+	mov rax,a64 0xbbbbbbbb
+	mov rbx,a64 0xbbbbbbbb
+	mov al,a64 0xffffffffcccccccc
+	mov bl,a64 0xffffffffcccccccc
+	mov ax,a64 0xffffffffcccccccc
+	mov bx,a64 0xffffffffcccccccc
+	mov eax,a64 0xffffffffcccccccc
+	mov ebx,a64 0xffffffffcccccccc
+	mov rax,a64 0xffffffffcccccccc
+	mov rbx,a64 0xffffffffcccccccc
+
+	mov al,a64 dword foo
+	mov bl,a64 dword foo
+	mov ax,a64 dword foo
+	mov bx,a64 dword foo
+	mov eax,a64 dword foo
+	mov ebx,a64 dword foo
+	mov rax,a64 dword foo
+	mov rbx,a64 dword foo
+	mov al,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 dword 0xaaaaaaaaaaaaaaaa
+	mov al,a64 dword 0xbbbbbbbb
+	mov bl,a64 dword 0xbbbbbbbb
+	mov ax,a64 dword 0xbbbbbbbb
+	mov bx,a64 dword 0xbbbbbbbb
+	mov eax,a64 dword 0xbbbbbbbb
+	mov ebx,a64 dword 0xbbbbbbbb
+	mov rax,a64 dword 0xbbbbbbbb
+	mov rbx,a64 dword 0xbbbbbbbb
+	mov al,a64 dword 0xffffffffcccccccc
+	mov bl,a64 dword 0xffffffffcccccccc
+	mov ax,a64 dword 0xffffffffcccccccc
+	mov bx,a64 dword 0xffffffffcccccccc
+	mov eax,a64 dword 0xffffffffcccccccc
+	mov ebx,a64 dword 0xffffffffcccccccc
+	mov rax,a64 dword 0xffffffffcccccccc
+	mov rbx,a64 dword 0xffffffffcccccccc
+
+	mov al,a64 qword foo
+	mov bl,a64 qword foo
+	mov ax,a64 qword foo
+	mov bx,a64 qword foo
+	mov eax,a64 qword foo
+	mov ebx,a64 qword foo
+	mov rax,a64 qword foo
+	mov rbx,a64 qword foo
+	mov al,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 qword 0xaaaaaaaaaaaaaaaa
+	mov al,a64 qword 0xbbbbbbbb
+	mov bl,a64 qword 0xbbbbbbbb
+	mov ax,a64 qword 0xbbbbbbbb
+	mov bx,a64 qword 0xbbbbbbbb
+	mov eax,a64 qword 0xbbbbbbbb
+	mov ebx,a64 qword 0xbbbbbbbb
+	mov rax,a64 qword 0xbbbbbbbb
+	mov rbx,a64 qword 0xbbbbbbbb
+	mov al,a64 qword 0xffffffffcccccccc
+	mov bl,a64 qword 0xffffffffcccccccc
+	mov ax,a64 qword 0xffffffffcccccccc
+	mov bx,a64 qword 0xffffffffcccccccc
+	mov eax,a64 qword 0xffffffffcccccccc
+	mov ebx,a64 qword 0xffffffffcccccccc
+	mov rax,a64 qword 0xffffffffcccccccc
+	mov rbx,a64 qword 0xffffffffcccccccc
+
+	mov al,a32 foo
+	mov bl,a32 foo
+	mov ax,a32 foo
+	mov bx,a32 foo
+	mov eax,a32 foo
+	mov ebx,a32 foo
+	mov rax,a32 foo
+	mov rbx,a32 foo
+	mov al,a32 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 0xaaaaaaaaaaaaaaaa
+	mov al,a32 0xbbbbbbbb
+	mov bl,a32 0xbbbbbbbb
+	mov ax,a32 0xbbbbbbbb
+	mov bx,a32 0xbbbbbbbb
+	mov eax,a32 0xbbbbbbbb
+	mov ebx,a32 0xbbbbbbbb
+	mov rax,a32 0xbbbbbbbb
+	mov rbx,a32 0xbbbbbbbb
+	mov al,a32 0xffffffffcccccccc
+	mov bl,a32 0xffffffffcccccccc
+	mov ax,a32 0xffffffffcccccccc
+	mov bx,a32 0xffffffffcccccccc
+	mov eax,a32 0xffffffffcccccccc
+	mov ebx,a32 0xffffffffcccccccc
+	mov rax,a32 0xffffffffcccccccc
+	mov rbx,a32 0xffffffffcccccccc
+
+	mov al,a32 dword foo
+	mov bl,a32 dword foo
+	mov ax,a32 dword foo
+	mov bx,a32 dword foo
+	mov eax,a32 dword foo
+	mov ebx,a32 dword foo
+	mov rax,a32 dword foo
+	mov rbx,a32 dword foo
+	mov al,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 dword 0xaaaaaaaaaaaaaaaa
+	mov al,a32 dword 0xbbbbbbbb
+	mov bl,a32 dword 0xbbbbbbbb
+	mov ax,a32 dword 0xbbbbbbbb
+	mov bx,a32 dword 0xbbbbbbbb
+	mov eax,a32 dword 0xbbbbbbbb
+	mov ebx,a32 dword 0xbbbbbbbb
+	mov rax,a32 dword 0xbbbbbbbb
+	mov rbx,a32 dword 0xbbbbbbbb
+	mov al,a32 dword 0xffffffffcccccccc
+	mov bl,a32 dword 0xffffffffcccccccc
+	mov ax,a32 dword 0xffffffffcccccccc
+	mov bx,a32 dword 0xffffffffcccccccc
+	mov eax,a32 dword 0xffffffffcccccccc
+	mov ebx,a32 dword 0xffffffffcccccccc
+	mov rax,a32 dword 0xffffffffcccccccc
+	mov rbx,a32 dword 0xffffffffcccccccc
+
+	mov al,a32 qword foo
+	mov bl,a32 qword foo
+	mov ax,a32 qword foo
+	mov bx,a32 qword foo
+	mov eax,a32 qword foo
+	mov ebx,a32 qword foo
+	mov rax,a32 qword foo
+	mov rbx,a32 qword foo
+	mov al,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 qword 0xaaaaaaaaaaaaaaaa
+	mov al,a32 qword 0xbbbbbbbb
+	mov bl,a32 qword 0xbbbbbbbb
+	mov ax,a32 qword 0xbbbbbbbb
+	mov bx,a32 qword 0xbbbbbbbb
+	mov eax,a32 qword 0xbbbbbbbb
+	mov ebx,a32 qword 0xbbbbbbbb
+	mov rax,a32 qword 0xbbbbbbbb
+	mov rbx,a32 qword 0xbbbbbbbb
+	mov al,a32 qword 0xffffffffcccccccc
+	mov bl,a32 qword 0xffffffffcccccccc
+	mov ax,a32 qword 0xffffffffcccccccc
+	mov bx,a32 qword 0xffffffffcccccccc
+	mov eax,a32 qword 0xffffffffcccccccc
+	mov ebx,a32 qword 0xffffffffcccccccc
+	mov rax,a32 qword 0xffffffffcccccccc
+	mov rbx,a32 qword 0xffffffffcccccccc
+
+	mov al,abs foo
+	mov bl,abs foo
+	mov ax,abs foo
+	mov bx,abs foo
+	mov eax,abs foo
+	mov ebx,abs foo
+	mov rax,abs foo
+	mov rbx,abs foo
+	mov al,abs 0xaaaaaaaaaaaaaaaa
+	mov bl,abs 0xaaaaaaaaaaaaaaaa
+	mov ax,abs 0xaaaaaaaaaaaaaaaa
+	mov bx,abs 0xaaaaaaaaaaaaaaaa
+	mov eax,abs 0xaaaaaaaaaaaaaaaa
+	mov ebx,abs 0xaaaaaaaaaaaaaaaa
+	mov rax,abs 0xaaaaaaaaaaaaaaaa
+	mov rbx,abs 0xaaaaaaaaaaaaaaaa
+	mov al,abs 0xbbbbbbbb
+	mov bl,abs 0xbbbbbbbb
+	mov ax,abs 0xbbbbbbbb
+	mov bx,abs 0xbbbbbbbb
+	mov eax,abs 0xbbbbbbbb
+	mov ebx,abs 0xbbbbbbbb
+	mov rax,abs 0xbbbbbbbb
+	mov rbx,abs 0xbbbbbbbb
+	mov al,abs 0xffffffffcccccccc
+	mov bl,abs 0xffffffffcccccccc
+	mov ax,abs 0xffffffffcccccccc
+	mov bx,abs 0xffffffffcccccccc
+	mov eax,abs 0xffffffffcccccccc
+	mov ebx,abs 0xffffffffcccccccc
+	mov rax,abs 0xffffffffcccccccc
+	mov rbx,abs 0xffffffffcccccccc
+
+	mov al,abs dword foo
+	mov bl,abs dword foo
+	mov ax,abs dword foo
+	mov bx,abs dword foo
+	mov eax,abs dword foo
+	mov ebx,abs dword foo
+	mov rax,abs dword foo
+	mov rbx,abs dword foo
+	mov al,abs dword 0xaaaaaaaaaaaaaaaa
+	mov bl,abs dword 0xaaaaaaaaaaaaaaaa
+	mov ax,abs dword 0xaaaaaaaaaaaaaaaa
+	mov bx,abs dword 0xaaaaaaaaaaaaaaaa
+	mov eax,abs dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,abs dword 0xaaaaaaaaaaaaaaaa
+	mov rax,abs dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,abs dword 0xaaaaaaaaaaaaaaaa
+	mov al,abs dword 0xbbbbbbbb
+	mov bl,abs dword 0xbbbbbbbb
+	mov ax,abs dword 0xbbbbbbbb
+	mov bx,abs dword 0xbbbbbbbb
+	mov eax,abs dword 0xbbbbbbbb
+	mov ebx,abs dword 0xbbbbbbbb
+	mov rax,abs dword 0xbbbbbbbb
+	mov rbx,abs dword 0xbbbbbbbb
+	mov al,abs dword 0xffffffffcccccccc
+	mov bl,abs dword 0xffffffffcccccccc
+	mov ax,abs dword 0xffffffffcccccccc
+	mov bx,abs dword 0xffffffffcccccccc
+	mov eax,abs dword 0xffffffffcccccccc
+	mov ebx,abs dword 0xffffffffcccccccc
+	mov rax,abs dword 0xffffffffcccccccc
+	mov rbx,abs dword 0xffffffffcccccccc
+
+	mov al,abs qword foo
+	mov bl,abs qword foo
+	mov ax,abs qword foo
+	mov bx,abs qword foo
+	mov eax,abs qword foo
+	mov ebx,abs qword foo
+	mov rax,abs qword foo
+	mov rbx,abs qword foo
+	mov al,abs qword 0xaaaaaaaaaaaaaaaa
+	mov bl,abs qword 0xaaaaaaaaaaaaaaaa
+	mov ax,abs qword 0xaaaaaaaaaaaaaaaa
+	mov bx,abs qword 0xaaaaaaaaaaaaaaaa
+	mov eax,abs qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,abs qword 0xaaaaaaaaaaaaaaaa
+	mov rax,abs qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,abs qword 0xaaaaaaaaaaaaaaaa
+	mov al,abs qword 0xbbbbbbbb
+	mov bl,abs qword 0xbbbbbbbb
+	mov ax,abs qword 0xbbbbbbbb
+	mov bx,abs qword 0xbbbbbbbb
+	mov eax,abs qword 0xbbbbbbbb
+	mov ebx,abs qword 0xbbbbbbbb
+	mov rax,abs qword 0xbbbbbbbb
+	mov rbx,abs qword 0xbbbbbbbb
+	mov al,abs qword 0xffffffffcccccccc
+	mov bl,abs qword 0xffffffffcccccccc
+	mov ax,abs qword 0xffffffffcccccccc
+	mov bx,abs qword 0xffffffffcccccccc
+	mov eax,abs qword 0xffffffffcccccccc
+	mov ebx,abs qword 0xffffffffcccccccc
+	mov rax,abs qword 0xffffffffcccccccc
+	mov rbx,abs qword 0xffffffffcccccccc
+
+	mov al,a64 abs foo
+	mov bl,a64 abs foo
+	mov ax,a64 abs foo
+	mov bx,a64 abs foo
+	mov eax,a64 abs foo
+	mov ebx,a64 abs foo
+	mov rax,a64 abs foo
+	mov rbx,a64 abs foo
+	mov al,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs 0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs 0xbbbbbbbb
+	mov bl,a64 abs 0xbbbbbbbb
+	mov ax,a64 abs 0xbbbbbbbb
+	mov bx,a64 abs 0xbbbbbbbb
+	mov eax,a64 abs 0xbbbbbbbb
+	mov ebx,a64 abs 0xbbbbbbbb
+	mov rax,a64 abs 0xbbbbbbbb
+	mov rbx,a64 abs 0xbbbbbbbb
+	mov al,a64 abs 0xffffffffcccccccc
+	mov bl,a64 abs 0xffffffffcccccccc
+	mov ax,a64 abs 0xffffffffcccccccc
+	mov bx,a64 abs 0xffffffffcccccccc
+	mov eax,a64 abs 0xffffffffcccccccc
+	mov ebx,a64 abs 0xffffffffcccccccc
+	mov rax,a64 abs 0xffffffffcccccccc
+	mov rbx,a64 abs 0xffffffffcccccccc
+
+	mov al,a64 abs dword foo
+	mov bl,a64 abs dword foo
+	mov ax,a64 abs dword foo
+	mov bx,a64 abs dword foo
+	mov eax,a64 abs dword foo
+	mov ebx,a64 abs dword foo
+	mov rax,a64 abs dword foo
+	mov rbx,a64 abs dword foo
+	mov al,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs dword 0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs dword 0xbbbbbbbb
+	mov bl,a64 abs dword 0xbbbbbbbb
+	mov ax,a64 abs dword 0xbbbbbbbb
+	mov bx,a64 abs dword 0xbbbbbbbb
+	mov eax,a64 abs dword 0xbbbbbbbb
+	mov ebx,a64 abs dword 0xbbbbbbbb
+	mov rax,a64 abs dword 0xbbbbbbbb
+	mov rbx,a64 abs dword 0xbbbbbbbb
+	mov al,a64 abs dword 0xffffffffcccccccc
+	mov bl,a64 abs dword 0xffffffffcccccccc
+	mov ax,a64 abs dword 0xffffffffcccccccc
+	mov bx,a64 abs dword 0xffffffffcccccccc
+	mov eax,a64 abs dword 0xffffffffcccccccc
+	mov ebx,a64 abs dword 0xffffffffcccccccc
+	mov rax,a64 abs dword 0xffffffffcccccccc
+	mov rbx,a64 abs dword 0xffffffffcccccccc
+
+	mov al,a64 abs qword foo
+	mov bl,a64 abs qword foo
+	mov ax,a64 abs qword foo
+	mov bx,a64 abs qword foo
+	mov eax,a64 abs qword foo
+	mov ebx,a64 abs qword foo
+	mov rax,a64 abs qword foo
+	mov rbx,a64 abs qword foo
+	mov al,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs qword 0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs qword 0xbbbbbbbb
+	mov bl,a64 abs qword 0xbbbbbbbb
+	mov ax,a64 abs qword 0xbbbbbbbb
+	mov bx,a64 abs qword 0xbbbbbbbb
+	mov eax,a64 abs qword 0xbbbbbbbb
+	mov ebx,a64 abs qword 0xbbbbbbbb
+	mov rax,a64 abs qword 0xbbbbbbbb
+	mov rbx,a64 abs qword 0xbbbbbbbb
+	mov al,a64 abs qword 0xffffffffcccccccc
+	mov bl,a64 abs qword 0xffffffffcccccccc
+	mov ax,a64 abs qword 0xffffffffcccccccc
+	mov bx,a64 abs qword 0xffffffffcccccccc
+	mov eax,a64 abs qword 0xffffffffcccccccc
+	mov ebx,a64 abs qword 0xffffffffcccccccc
+	mov rax,a64 abs qword 0xffffffffcccccccc
+	mov rbx,a64 abs qword 0xffffffffcccccccc
+
+	mov al,a32 abs foo
+	mov bl,a32 abs foo
+	mov ax,a32 abs foo
+	mov bx,a32 abs foo
+	mov eax,a32 abs foo
+	mov ebx,a32 abs foo
+	mov rax,a32 abs foo
+	mov rbx,a32 abs foo
+	mov al,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs 0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs 0xbbbbbbbb
+	mov bl,a32 abs 0xbbbbbbbb
+	mov ax,a32 abs 0xbbbbbbbb
+	mov bx,a32 abs 0xbbbbbbbb
+	mov eax,a32 abs 0xbbbbbbbb
+	mov ebx,a32 abs 0xbbbbbbbb
+	mov rax,a32 abs 0xbbbbbbbb
+	mov rbx,a32 abs 0xbbbbbbbb
+	mov al,a32 abs 0xffffffffcccccccc
+	mov bl,a32 abs 0xffffffffcccccccc
+	mov ax,a32 abs 0xffffffffcccccccc
+	mov bx,a32 abs 0xffffffffcccccccc
+	mov eax,a32 abs 0xffffffffcccccccc
+	mov ebx,a32 abs 0xffffffffcccccccc
+	mov rax,a32 abs 0xffffffffcccccccc
+	mov rbx,a32 abs 0xffffffffcccccccc
+
+	mov al,a32 abs dword foo
+	mov bl,a32 abs dword foo
+	mov ax,a32 abs dword foo
+	mov bx,a32 abs dword foo
+	mov eax,a32 abs dword foo
+	mov ebx,a32 abs dword foo
+	mov rax,a32 abs dword foo
+	mov rbx,a32 abs dword foo
+	mov al,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs dword 0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs dword 0xbbbbbbbb
+	mov bl,a32 abs dword 0xbbbbbbbb
+	mov ax,a32 abs dword 0xbbbbbbbb
+	mov bx,a32 abs dword 0xbbbbbbbb
+	mov eax,a32 abs dword 0xbbbbbbbb
+	mov ebx,a32 abs dword 0xbbbbbbbb
+	mov rax,a32 abs dword 0xbbbbbbbb
+	mov rbx,a32 abs dword 0xbbbbbbbb
+	mov al,a32 abs dword 0xffffffffcccccccc
+	mov bl,a32 abs dword 0xffffffffcccccccc
+	mov ax,a32 abs dword 0xffffffffcccccccc
+	mov bx,a32 abs dword 0xffffffffcccccccc
+	mov eax,a32 abs dword 0xffffffffcccccccc
+	mov ebx,a32 abs dword 0xffffffffcccccccc
+	mov rax,a32 abs dword 0xffffffffcccccccc
+	mov rbx,a32 abs dword 0xffffffffcccccccc
+
+	mov al,a32 abs qword foo
+	mov bl,a32 abs qword foo
+	mov ax,a32 abs qword foo
+	mov bx,a32 abs qword foo
+	mov eax,a32 abs qword foo
+	mov ebx,a32 abs qword foo
+	mov rax,a32 abs qword foo
+	mov rbx,a32 abs qword foo
+	mov al,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs qword 0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs qword 0xbbbbbbbb
+	mov bl,a32 abs qword 0xbbbbbbbb
+	mov ax,a32 abs qword 0xbbbbbbbb
+	mov bx,a32 abs qword 0xbbbbbbbb
+	mov eax,a32 abs qword 0xbbbbbbbb
+	mov ebx,a32 abs qword 0xbbbbbbbb
+	mov rax,a32 abs qword 0xbbbbbbbb
+	mov rbx,a32 abs qword 0xbbbbbbbb
+	mov al,a32 abs qword 0xffffffffcccccccc
+	mov bl,a32 abs qword 0xffffffffcccccccc
+	mov ax,a32 abs qword 0xffffffffcccccccc
+	mov bx,a32 abs qword 0xffffffffcccccccc
+	mov eax,a32 abs qword 0xffffffffcccccccc
+	mov ebx,a32 abs qword 0xffffffffcccccccc
+	mov rax,a32 abs qword 0xffffffffcccccccc
+	mov rbx,a32 abs qword 0xffffffffcccccccc
+
+	mov al,rel foo
+	mov bl,rel foo
+	mov ax,rel foo
+	mov bx,rel foo
+	mov eax,rel foo
+	mov ebx,rel foo
+	mov rax,rel foo
+	mov rbx,rel foo
+	mov al,rel 0xaaaaaaaaaaaaaaaa
+	mov bl,rel 0xaaaaaaaaaaaaaaaa
+	mov ax,rel 0xaaaaaaaaaaaaaaaa
+	mov bx,rel 0xaaaaaaaaaaaaaaaa
+	mov eax,rel 0xaaaaaaaaaaaaaaaa
+	mov ebx,rel 0xaaaaaaaaaaaaaaaa
+	mov rax,rel 0xaaaaaaaaaaaaaaaa
+	mov rbx,rel 0xaaaaaaaaaaaaaaaa
+	mov al,rel 0xbbbbbbbb
+	mov bl,rel 0xbbbbbbbb
+	mov ax,rel 0xbbbbbbbb
+	mov bx,rel 0xbbbbbbbb
+	mov eax,rel 0xbbbbbbbb
+	mov ebx,rel 0xbbbbbbbb
+	mov rax,rel 0xbbbbbbbb
+	mov rbx,rel 0xbbbbbbbb
+	mov al,rel 0xffffffffcccccccc
+	mov bl,rel 0xffffffffcccccccc
+	mov ax,rel 0xffffffffcccccccc
+	mov bx,rel 0xffffffffcccccccc
+	mov eax,rel 0xffffffffcccccccc
+	mov ebx,rel 0xffffffffcccccccc
+	mov rax,rel 0xffffffffcccccccc
+	mov rbx,rel 0xffffffffcccccccc
+
+	mov al,rel dword foo
+	mov bl,rel dword foo
+	mov ax,rel dword foo
+	mov bx,rel dword foo
+	mov eax,rel dword foo
+	mov ebx,rel dword foo
+	mov rax,rel dword foo
+	mov rbx,rel dword foo
+	mov al,rel dword 0xaaaaaaaaaaaaaaaa
+	mov bl,rel dword 0xaaaaaaaaaaaaaaaa
+	mov ax,rel dword 0xaaaaaaaaaaaaaaaa
+	mov bx,rel dword 0xaaaaaaaaaaaaaaaa
+	mov eax,rel dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,rel dword 0xaaaaaaaaaaaaaaaa
+	mov rax,rel dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,rel dword 0xaaaaaaaaaaaaaaaa
+	mov al,rel dword 0xbbbbbbbb
+	mov bl,rel dword 0xbbbbbbbb
+	mov ax,rel dword 0xbbbbbbbb
+	mov bx,rel dword 0xbbbbbbbb
+	mov eax,rel dword 0xbbbbbbbb
+	mov ebx,rel dword 0xbbbbbbbb
+	mov rax,rel dword 0xbbbbbbbb
+	mov rbx,rel dword 0xbbbbbbbb
+	mov al,rel dword 0xffffffffcccccccc
+	mov bl,rel dword 0xffffffffcccccccc
+	mov ax,rel dword 0xffffffffcccccccc
+	mov bx,rel dword 0xffffffffcccccccc
+	mov eax,rel dword 0xffffffffcccccccc
+	mov ebx,rel dword 0xffffffffcccccccc
+	mov rax,rel dword 0xffffffffcccccccc
+	mov rbx,rel dword 0xffffffffcccccccc
+
+	mov al,rel qword foo
+	mov bl,rel qword foo
+	mov ax,rel qword foo
+	mov bx,rel qword foo
+	mov eax,rel qword foo
+	mov ebx,rel qword foo
+	mov rax,rel qword foo
+	mov rbx,rel qword foo
+	mov al,rel qword 0xaaaaaaaaaaaaaaaa
+	mov bl,rel qword 0xaaaaaaaaaaaaaaaa
+	mov ax,rel qword 0xaaaaaaaaaaaaaaaa
+	mov bx,rel qword 0xaaaaaaaaaaaaaaaa
+	mov eax,rel qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,rel qword 0xaaaaaaaaaaaaaaaa
+	mov rax,rel qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,rel qword 0xaaaaaaaaaaaaaaaa
+	mov al,rel qword 0xbbbbbbbb
+	mov bl,rel qword 0xbbbbbbbb
+	mov ax,rel qword 0xbbbbbbbb
+	mov bx,rel qword 0xbbbbbbbb
+	mov eax,rel qword 0xbbbbbbbb
+	mov ebx,rel qword 0xbbbbbbbb
+	mov rax,rel qword 0xbbbbbbbb
+	mov rbx,rel qword 0xbbbbbbbb
+	mov al,rel qword 0xffffffffcccccccc
+	mov bl,rel qword 0xffffffffcccccccc
+	mov ax,rel qword 0xffffffffcccccccc
+	mov bx,rel qword 0xffffffffcccccccc
+	mov eax,rel qword 0xffffffffcccccccc
+	mov ebx,rel qword 0xffffffffcccccccc
+	mov rax,rel qword 0xffffffffcccccccc
+	mov rbx,rel qword 0xffffffffcccccccc
+
+	mov al,a64 rel foo
+	mov bl,a64 rel foo
+	mov ax,a64 rel foo
+	mov bx,a64 rel foo
+	mov eax,a64 rel foo
+	mov ebx,a64 rel foo
+	mov rax,a64 rel foo
+	mov rbx,a64 rel foo
+	mov al,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel 0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel 0xbbbbbbbb
+	mov bl,a64 rel 0xbbbbbbbb
+	mov ax,a64 rel 0xbbbbbbbb
+	mov bx,a64 rel 0xbbbbbbbb
+	mov eax,a64 rel 0xbbbbbbbb
+	mov ebx,a64 rel 0xbbbbbbbb
+	mov rax,a64 rel 0xbbbbbbbb
+	mov rbx,a64 rel 0xbbbbbbbb
+	mov al,a64 rel 0xffffffffcccccccc
+	mov bl,a64 rel 0xffffffffcccccccc
+	mov ax,a64 rel 0xffffffffcccccccc
+	mov bx,a64 rel 0xffffffffcccccccc
+	mov eax,a64 rel 0xffffffffcccccccc
+	mov ebx,a64 rel 0xffffffffcccccccc
+	mov rax,a64 rel 0xffffffffcccccccc
+	mov rbx,a64 rel 0xffffffffcccccccc
+
+	mov al,a64 rel dword foo
+	mov bl,a64 rel dword foo
+	mov ax,a64 rel dword foo
+	mov bx,a64 rel dword foo
+	mov eax,a64 rel dword foo
+	mov ebx,a64 rel dword foo
+	mov rax,a64 rel dword foo
+	mov rbx,a64 rel dword foo
+	mov al,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel dword 0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel dword 0xbbbbbbbb
+	mov bl,a64 rel dword 0xbbbbbbbb
+	mov ax,a64 rel dword 0xbbbbbbbb
+	mov bx,a64 rel dword 0xbbbbbbbb
+	mov eax,a64 rel dword 0xbbbbbbbb
+	mov ebx,a64 rel dword 0xbbbbbbbb
+	mov rax,a64 rel dword 0xbbbbbbbb
+	mov rbx,a64 rel dword 0xbbbbbbbb
+	mov al,a64 rel dword 0xffffffffcccccccc
+	mov bl,a64 rel dword 0xffffffffcccccccc
+	mov ax,a64 rel dword 0xffffffffcccccccc
+	mov bx,a64 rel dword 0xffffffffcccccccc
+	mov eax,a64 rel dword 0xffffffffcccccccc
+	mov ebx,a64 rel dword 0xffffffffcccccccc
+	mov rax,a64 rel dword 0xffffffffcccccccc
+	mov rbx,a64 rel dword 0xffffffffcccccccc
+
+	mov al,a64 rel qword foo
+	mov bl,a64 rel qword foo
+	mov ax,a64 rel qword foo
+	mov bx,a64 rel qword foo
+	mov eax,a64 rel qword foo
+	mov ebx,a64 rel qword foo
+	mov rax,a64 rel qword foo
+	mov rbx,a64 rel qword foo
+	mov al,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel qword 0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel qword 0xbbbbbbbb
+	mov bl,a64 rel qword 0xbbbbbbbb
+	mov ax,a64 rel qword 0xbbbbbbbb
+	mov bx,a64 rel qword 0xbbbbbbbb
+	mov eax,a64 rel qword 0xbbbbbbbb
+	mov ebx,a64 rel qword 0xbbbbbbbb
+	mov rax,a64 rel qword 0xbbbbbbbb
+	mov rbx,a64 rel qword 0xbbbbbbbb
+	mov al,a64 rel qword 0xffffffffcccccccc
+	mov bl,a64 rel qword 0xffffffffcccccccc
+	mov ax,a64 rel qword 0xffffffffcccccccc
+	mov bx,a64 rel qword 0xffffffffcccccccc
+	mov eax,a64 rel qword 0xffffffffcccccccc
+	mov ebx,a64 rel qword 0xffffffffcccccccc
+	mov rax,a64 rel qword 0xffffffffcccccccc
+	mov rbx,a64 rel qword 0xffffffffcccccccc
+
+	mov al,a32 rel foo
+	mov bl,a32 rel foo
+	mov ax,a32 rel foo
+	mov bx,a32 rel foo
+	mov eax,a32 rel foo
+	mov ebx,a32 rel foo
+	mov rax,a32 rel foo
+	mov rbx,a32 rel foo
+	mov al,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel 0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel 0xbbbbbbbb
+	mov bl,a32 rel 0xbbbbbbbb
+	mov ax,a32 rel 0xbbbbbbbb
+	mov bx,a32 rel 0xbbbbbbbb
+	mov eax,a32 rel 0xbbbbbbbb
+	mov ebx,a32 rel 0xbbbbbbbb
+	mov rax,a32 rel 0xbbbbbbbb
+	mov rbx,a32 rel 0xbbbbbbbb
+	mov al,a32 rel 0xffffffffcccccccc
+	mov bl,a32 rel 0xffffffffcccccccc
+	mov ax,a32 rel 0xffffffffcccccccc
+	mov bx,a32 rel 0xffffffffcccccccc
+	mov eax,a32 rel 0xffffffffcccccccc
+	mov ebx,a32 rel 0xffffffffcccccccc
+	mov rax,a32 rel 0xffffffffcccccccc
+	mov rbx,a32 rel 0xffffffffcccccccc
+
+	mov al,a32 rel dword foo
+	mov bl,a32 rel dword foo
+	mov ax,a32 rel dword foo
+	mov bx,a32 rel dword foo
+	mov eax,a32 rel dword foo
+	mov ebx,a32 rel dword foo
+	mov rax,a32 rel dword foo
+	mov rbx,a32 rel dword foo
+	mov al,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel dword 0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel dword 0xbbbbbbbb
+	mov bl,a32 rel dword 0xbbbbbbbb
+	mov ax,a32 rel dword 0xbbbbbbbb
+	mov bx,a32 rel dword 0xbbbbbbbb
+	mov eax,a32 rel dword 0xbbbbbbbb
+	mov ebx,a32 rel dword 0xbbbbbbbb
+	mov rax,a32 rel dword 0xbbbbbbbb
+	mov rbx,a32 rel dword 0xbbbbbbbb
+	mov al,a32 rel dword 0xffffffffcccccccc
+	mov bl,a32 rel dword 0xffffffffcccccccc
+	mov ax,a32 rel dword 0xffffffffcccccccc
+	mov bx,a32 rel dword 0xffffffffcccccccc
+	mov eax,a32 rel dword 0xffffffffcccccccc
+	mov ebx,a32 rel dword 0xffffffffcccccccc
+	mov rax,a32 rel dword 0xffffffffcccccccc
+	mov rbx,a32 rel dword 0xffffffffcccccccc
+
+	mov al,a32 rel qword foo
+	mov bl,a32 rel qword foo
+	mov ax,a32 rel qword foo
+	mov bx,a32 rel qword foo
+	mov eax,a32 rel qword foo
+	mov ebx,a32 rel qword foo
+	mov rax,a32 rel qword foo
+	mov rbx,a32 rel qword foo
+	mov al,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel qword 0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel qword 0xbbbbbbbb
+	mov bl,a32 rel qword 0xbbbbbbbb
+	mov ax,a32 rel qword 0xbbbbbbbb
+	mov bx,a32 rel qword 0xbbbbbbbb
+	mov eax,a32 rel qword 0xbbbbbbbb
+	mov ebx,a32 rel qword 0xbbbbbbbb
+	mov rax,a32 rel qword 0xbbbbbbbb
+	mov rbx,a32 rel qword 0xbbbbbbbb
+	mov al,a32 rel qword 0xffffffffcccccccc
+	mov bl,a32 rel qword 0xffffffffcccccccc
+	mov ax,a32 rel qword 0xffffffffcccccccc
+	mov bx,a32 rel qword 0xffffffffcccccccc
+	mov eax,a32 rel qword 0xffffffffcccccccc
+	mov ebx,a32 rel qword 0xffffffffcccccccc
+	mov rax,a32 rel qword 0xffffffffcccccccc
+	mov rbx,a32 rel qword 0xffffffffcccccccc
+
+	mov al,fs:foo
+	mov bl,fs:foo
+	mov ax,fs:foo
+	mov bx,fs:foo
+	mov eax,fs:foo
+	mov ebx,fs:foo
+	mov rax,fs:foo
+	mov rbx,fs:foo
+	mov al,fs:0xaaaaaaaaaaaaaaaa
+	mov bl,fs:0xaaaaaaaaaaaaaaaa
+	mov ax,fs:0xaaaaaaaaaaaaaaaa
+	mov bx,fs:0xaaaaaaaaaaaaaaaa
+	mov eax,fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,fs:0xaaaaaaaaaaaaaaaa
+	mov rax,fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,fs:0xaaaaaaaaaaaaaaaa
+	mov al,fs:0xbbbbbbbb
+	mov bl,fs:0xbbbbbbbb
+	mov ax,fs:0xbbbbbbbb
+	mov bx,fs:0xbbbbbbbb
+	mov eax,fs:0xbbbbbbbb
+	mov ebx,fs:0xbbbbbbbb
+	mov rax,fs:0xbbbbbbbb
+	mov rbx,fs:0xbbbbbbbb
+	mov al,fs:0xffffffffcccccccc
+	mov bl,fs:0xffffffffcccccccc
+	mov ax,fs:0xffffffffcccccccc
+	mov bx,fs:0xffffffffcccccccc
+	mov eax,fs:0xffffffffcccccccc
+	mov ebx,fs:0xffffffffcccccccc
+	mov rax,fs:0xffffffffcccccccc
+	mov rbx,fs:0xffffffffcccccccc
+
+	mov al,dword fs:foo
+	mov bl,dword fs:foo
+	mov ax,dword fs:foo
+	mov bx,dword fs:foo
+	mov eax,dword fs:foo
+	mov ebx,dword fs:foo
+	mov rax,dword fs:foo
+	mov rbx,dword fs:foo
+	mov al,dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,dword fs:0xbbbbbbbb
+	mov bl,dword fs:0xbbbbbbbb
+	mov ax,dword fs:0xbbbbbbbb
+	mov bx,dword fs:0xbbbbbbbb
+	mov eax,dword fs:0xbbbbbbbb
+	mov ebx,dword fs:0xbbbbbbbb
+	mov rax,dword fs:0xbbbbbbbb
+	mov rbx,dword fs:0xbbbbbbbb
+	mov al,dword fs:0xffffffffcccccccc
+	mov bl,dword fs:0xffffffffcccccccc
+	mov ax,dword fs:0xffffffffcccccccc
+	mov bx,dword fs:0xffffffffcccccccc
+	mov eax,dword fs:0xffffffffcccccccc
+	mov ebx,dword fs:0xffffffffcccccccc
+	mov rax,dword fs:0xffffffffcccccccc
+	mov rbx,dword fs:0xffffffffcccccccc
+
+	mov al,qword fs:foo
+	mov bl,qword fs:foo
+	mov ax,qword fs:foo
+	mov bx,qword fs:foo
+	mov eax,qword fs:foo
+	mov ebx,qword fs:foo
+	mov rax,qword fs:foo
+	mov rbx,qword fs:foo
+	mov al,qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,qword fs:0xbbbbbbbb
+	mov bl,qword fs:0xbbbbbbbb
+	mov ax,qword fs:0xbbbbbbbb
+	mov bx,qword fs:0xbbbbbbbb
+	mov eax,qword fs:0xbbbbbbbb
+	mov ebx,qword fs:0xbbbbbbbb
+	mov rax,qword fs:0xbbbbbbbb
+	mov rbx,qword fs:0xbbbbbbbb
+	mov al,qword fs:0xffffffffcccccccc
+	mov bl,qword fs:0xffffffffcccccccc
+	mov ax,qword fs:0xffffffffcccccccc
+	mov bx,qword fs:0xffffffffcccccccc
+	mov eax,qword fs:0xffffffffcccccccc
+	mov ebx,qword fs:0xffffffffcccccccc
+	mov rax,qword fs:0xffffffffcccccccc
+	mov rbx,qword fs:0xffffffffcccccccc
+
+	mov al,a64 fs:foo
+	mov bl,a64 fs:foo
+	mov ax,a64 fs:foo
+	mov bx,a64 fs:foo
+	mov eax,a64 fs:foo
+	mov ebx,a64 fs:foo
+	mov rax,a64 fs:foo
+	mov rbx,a64 fs:foo
+	mov al,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 fs:0xbbbbbbbb
+	mov bl,a64 fs:0xbbbbbbbb
+	mov ax,a64 fs:0xbbbbbbbb
+	mov bx,a64 fs:0xbbbbbbbb
+	mov eax,a64 fs:0xbbbbbbbb
+	mov ebx,a64 fs:0xbbbbbbbb
+	mov rax,a64 fs:0xbbbbbbbb
+	mov rbx,a64 fs:0xbbbbbbbb
+	mov al,a64 fs:0xffffffffcccccccc
+	mov bl,a64 fs:0xffffffffcccccccc
+	mov ax,a64 fs:0xffffffffcccccccc
+	mov bx,a64 fs:0xffffffffcccccccc
+	mov eax,a64 fs:0xffffffffcccccccc
+	mov ebx,a64 fs:0xffffffffcccccccc
+	mov rax,a64 fs:0xffffffffcccccccc
+	mov rbx,a64 fs:0xffffffffcccccccc
+
+	mov al,a64 dword fs:foo
+	mov bl,a64 dword fs:foo
+	mov ax,a64 dword fs:foo
+	mov bx,a64 dword fs:foo
+	mov eax,a64 dword fs:foo
+	mov ebx,a64 dword fs:foo
+	mov rax,a64 dword fs:foo
+	mov rbx,a64 dword fs:foo
+	mov al,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 dword fs:0xbbbbbbbb
+	mov bl,a64 dword fs:0xbbbbbbbb
+	mov ax,a64 dword fs:0xbbbbbbbb
+	mov bx,a64 dword fs:0xbbbbbbbb
+	mov eax,a64 dword fs:0xbbbbbbbb
+	mov ebx,a64 dword fs:0xbbbbbbbb
+	mov rax,a64 dword fs:0xbbbbbbbb
+	mov rbx,a64 dword fs:0xbbbbbbbb
+	mov al,a64 dword fs:0xffffffffcccccccc
+	mov bl,a64 dword fs:0xffffffffcccccccc
+	mov ax,a64 dword fs:0xffffffffcccccccc
+	mov bx,a64 dword fs:0xffffffffcccccccc
+	mov eax,a64 dword fs:0xffffffffcccccccc
+	mov ebx,a64 dword fs:0xffffffffcccccccc
+	mov rax,a64 dword fs:0xffffffffcccccccc
+	mov rbx,a64 dword fs:0xffffffffcccccccc
+
+	mov al,a64 qword fs:foo
+	mov bl,a64 qword fs:foo
+	mov ax,a64 qword fs:foo
+	mov bx,a64 qword fs:foo
+	mov eax,a64 qword fs:foo
+	mov ebx,a64 qword fs:foo
+	mov rax,a64 qword fs:foo
+	mov rbx,a64 qword fs:foo
+	mov al,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 qword fs:0xbbbbbbbb
+	mov bl,a64 qword fs:0xbbbbbbbb
+	mov ax,a64 qword fs:0xbbbbbbbb
+	mov bx,a64 qword fs:0xbbbbbbbb
+	mov eax,a64 qword fs:0xbbbbbbbb
+	mov ebx,a64 qword fs:0xbbbbbbbb
+	mov rax,a64 qword fs:0xbbbbbbbb
+	mov rbx,a64 qword fs:0xbbbbbbbb
+	mov al,a64 qword fs:0xffffffffcccccccc
+	mov bl,a64 qword fs:0xffffffffcccccccc
+	mov ax,a64 qword fs:0xffffffffcccccccc
+	mov bx,a64 qword fs:0xffffffffcccccccc
+	mov eax,a64 qword fs:0xffffffffcccccccc
+	mov ebx,a64 qword fs:0xffffffffcccccccc
+	mov rax,a64 qword fs:0xffffffffcccccccc
+	mov rbx,a64 qword fs:0xffffffffcccccccc
+
+	mov al,a32 fs:foo
+	mov bl,a32 fs:foo
+	mov ax,a32 fs:foo
+	mov bx,a32 fs:foo
+	mov eax,a32 fs:foo
+	mov ebx,a32 fs:foo
+	mov rax,a32 fs:foo
+	mov rbx,a32 fs:foo
+	mov al,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 fs:0xbbbbbbbb
+	mov bl,a32 fs:0xbbbbbbbb
+	mov ax,a32 fs:0xbbbbbbbb
+	mov bx,a32 fs:0xbbbbbbbb
+	mov eax,a32 fs:0xbbbbbbbb
+	mov ebx,a32 fs:0xbbbbbbbb
+	mov rax,a32 fs:0xbbbbbbbb
+	mov rbx,a32 fs:0xbbbbbbbb
+	mov al,a32 fs:0xffffffffcccccccc
+	mov bl,a32 fs:0xffffffffcccccccc
+	mov ax,a32 fs:0xffffffffcccccccc
+	mov bx,a32 fs:0xffffffffcccccccc
+	mov eax,a32 fs:0xffffffffcccccccc
+	mov ebx,a32 fs:0xffffffffcccccccc
+	mov rax,a32 fs:0xffffffffcccccccc
+	mov rbx,a32 fs:0xffffffffcccccccc
+
+	mov al,a32 dword fs:foo
+	mov bl,a32 dword fs:foo
+	mov ax,a32 dword fs:foo
+	mov bx,a32 dword fs:foo
+	mov eax,a32 dword fs:foo
+	mov ebx,a32 dword fs:foo
+	mov rax,a32 dword fs:foo
+	mov rbx,a32 dword fs:foo
+	mov al,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 dword fs:0xbbbbbbbb
+	mov bl,a32 dword fs:0xbbbbbbbb
+	mov ax,a32 dword fs:0xbbbbbbbb
+	mov bx,a32 dword fs:0xbbbbbbbb
+	mov eax,a32 dword fs:0xbbbbbbbb
+	mov ebx,a32 dword fs:0xbbbbbbbb
+	mov rax,a32 dword fs:0xbbbbbbbb
+	mov rbx,a32 dword fs:0xbbbbbbbb
+	mov al,a32 dword fs:0xffffffffcccccccc
+	mov bl,a32 dword fs:0xffffffffcccccccc
+	mov ax,a32 dword fs:0xffffffffcccccccc
+	mov bx,a32 dword fs:0xffffffffcccccccc
+	mov eax,a32 dword fs:0xffffffffcccccccc
+	mov ebx,a32 dword fs:0xffffffffcccccccc
+	mov rax,a32 dword fs:0xffffffffcccccccc
+	mov rbx,a32 dword fs:0xffffffffcccccccc
+
+	mov al,a32 qword fs:foo
+	mov bl,a32 qword fs:foo
+	mov ax,a32 qword fs:foo
+	mov bx,a32 qword fs:foo
+	mov eax,a32 qword fs:foo
+	mov ebx,a32 qword fs:foo
+	mov rax,a32 qword fs:foo
+	mov rbx,a32 qword fs:foo
+	mov al,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 qword fs:0xbbbbbbbb
+	mov bl,a32 qword fs:0xbbbbbbbb
+	mov ax,a32 qword fs:0xbbbbbbbb
+	mov bx,a32 qword fs:0xbbbbbbbb
+	mov eax,a32 qword fs:0xbbbbbbbb
+	mov ebx,a32 qword fs:0xbbbbbbbb
+	mov rax,a32 qword fs:0xbbbbbbbb
+	mov rbx,a32 qword fs:0xbbbbbbbb
+	mov al,a32 qword fs:0xffffffffcccccccc
+	mov bl,a32 qword fs:0xffffffffcccccccc
+	mov ax,a32 qword fs:0xffffffffcccccccc
+	mov bx,a32 qword fs:0xffffffffcccccccc
+	mov eax,a32 qword fs:0xffffffffcccccccc
+	mov ebx,a32 qword fs:0xffffffffcccccccc
+	mov rax,a32 qword fs:0xffffffffcccccccc
+	mov rbx,a32 qword fs:0xffffffffcccccccc
+
+	mov al,abs fs:foo
+	mov bl,abs fs:foo
+	mov ax,abs fs:foo
+	mov bx,abs fs:foo
+	mov eax,abs fs:foo
+	mov ebx,abs fs:foo
+	mov rax,abs fs:foo
+	mov rbx,abs fs:foo
+	mov al,abs fs:0xaaaaaaaaaaaaaaaa
+	mov bl,abs fs:0xaaaaaaaaaaaaaaaa
+	mov ax,abs fs:0xaaaaaaaaaaaaaaaa
+	mov bx,abs fs:0xaaaaaaaaaaaaaaaa
+	mov eax,abs fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,abs fs:0xaaaaaaaaaaaaaaaa
+	mov rax,abs fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,abs fs:0xaaaaaaaaaaaaaaaa
+	mov al,abs fs:0xbbbbbbbb
+	mov bl,abs fs:0xbbbbbbbb
+	mov ax,abs fs:0xbbbbbbbb
+	mov bx,abs fs:0xbbbbbbbb
+	mov eax,abs fs:0xbbbbbbbb
+	mov ebx,abs fs:0xbbbbbbbb
+	mov rax,abs fs:0xbbbbbbbb
+	mov rbx,abs fs:0xbbbbbbbb
+	mov al,abs fs:0xffffffffcccccccc
+	mov bl,abs fs:0xffffffffcccccccc
+	mov ax,abs fs:0xffffffffcccccccc
+	mov bx,abs fs:0xffffffffcccccccc
+	mov eax,abs fs:0xffffffffcccccccc
+	mov ebx,abs fs:0xffffffffcccccccc
+	mov rax,abs fs:0xffffffffcccccccc
+	mov rbx,abs fs:0xffffffffcccccccc
+
+	mov al,abs dword fs:foo
+	mov bl,abs dword fs:foo
+	mov ax,abs dword fs:foo
+	mov bx,abs dword fs:foo
+	mov eax,abs dword fs:foo
+	mov ebx,abs dword fs:foo
+	mov rax,abs dword fs:foo
+	mov rbx,abs dword fs:foo
+	mov al,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,abs dword fs:0xbbbbbbbb
+	mov bl,abs dword fs:0xbbbbbbbb
+	mov ax,abs dword fs:0xbbbbbbbb
+	mov bx,abs dword fs:0xbbbbbbbb
+	mov eax,abs dword fs:0xbbbbbbbb
+	mov ebx,abs dword fs:0xbbbbbbbb
+	mov rax,abs dword fs:0xbbbbbbbb
+	mov rbx,abs dword fs:0xbbbbbbbb
+	mov al,abs dword fs:0xffffffffcccccccc
+	mov bl,abs dword fs:0xffffffffcccccccc
+	mov ax,abs dword fs:0xffffffffcccccccc
+	mov bx,abs dword fs:0xffffffffcccccccc
+	mov eax,abs dword fs:0xffffffffcccccccc
+	mov ebx,abs dword fs:0xffffffffcccccccc
+	mov rax,abs dword fs:0xffffffffcccccccc
+	mov rbx,abs dword fs:0xffffffffcccccccc
+
+	mov al,abs qword fs:foo
+	mov bl,abs qword fs:foo
+	mov ax,abs qword fs:foo
+	mov bx,abs qword fs:foo
+	mov eax,abs qword fs:foo
+	mov ebx,abs qword fs:foo
+	mov rax,abs qword fs:foo
+	mov rbx,abs qword fs:foo
+	mov al,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,abs qword fs:0xbbbbbbbb
+	mov bl,abs qword fs:0xbbbbbbbb
+	mov ax,abs qword fs:0xbbbbbbbb
+	mov bx,abs qword fs:0xbbbbbbbb
+	mov eax,abs qword fs:0xbbbbbbbb
+	mov ebx,abs qword fs:0xbbbbbbbb
+	mov rax,abs qword fs:0xbbbbbbbb
+	mov rbx,abs qword fs:0xbbbbbbbb
+	mov al,abs qword fs:0xffffffffcccccccc
+	mov bl,abs qword fs:0xffffffffcccccccc
+	mov ax,abs qword fs:0xffffffffcccccccc
+	mov bx,abs qword fs:0xffffffffcccccccc
+	mov eax,abs qword fs:0xffffffffcccccccc
+	mov ebx,abs qword fs:0xffffffffcccccccc
+	mov rax,abs qword fs:0xffffffffcccccccc
+	mov rbx,abs qword fs:0xffffffffcccccccc
+
+	mov al,a64 abs fs:foo
+	mov bl,a64 abs fs:foo
+	mov ax,a64 abs fs:foo
+	mov bx,a64 abs fs:foo
+	mov eax,a64 abs fs:foo
+	mov ebx,a64 abs fs:foo
+	mov rax,a64 abs fs:foo
+	mov rbx,a64 abs fs:foo
+	mov al,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs fs:0xbbbbbbbb
+	mov bl,a64 abs fs:0xbbbbbbbb
+	mov ax,a64 abs fs:0xbbbbbbbb
+	mov bx,a64 abs fs:0xbbbbbbbb
+	mov eax,a64 abs fs:0xbbbbbbbb
+	mov ebx,a64 abs fs:0xbbbbbbbb
+	mov rax,a64 abs fs:0xbbbbbbbb
+	mov rbx,a64 abs fs:0xbbbbbbbb
+	mov al,a64 abs fs:0xffffffffcccccccc
+	mov bl,a64 abs fs:0xffffffffcccccccc
+	mov ax,a64 abs fs:0xffffffffcccccccc
+	mov bx,a64 abs fs:0xffffffffcccccccc
+	mov eax,a64 abs fs:0xffffffffcccccccc
+	mov ebx,a64 abs fs:0xffffffffcccccccc
+	mov rax,a64 abs fs:0xffffffffcccccccc
+	mov rbx,a64 abs fs:0xffffffffcccccccc
+
+	mov al,a64 abs dword fs:foo
+	mov bl,a64 abs dword fs:foo
+	mov ax,a64 abs dword fs:foo
+	mov bx,a64 abs dword fs:foo
+	mov eax,a64 abs dword fs:foo
+	mov ebx,a64 abs dword fs:foo
+	mov rax,a64 abs dword fs:foo
+	mov rbx,a64 abs dword fs:foo
+	mov al,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs dword fs:0xbbbbbbbb
+	mov bl,a64 abs dword fs:0xbbbbbbbb
+	mov ax,a64 abs dword fs:0xbbbbbbbb
+	mov bx,a64 abs dword fs:0xbbbbbbbb
+	mov eax,a64 abs dword fs:0xbbbbbbbb
+	mov ebx,a64 abs dword fs:0xbbbbbbbb
+	mov rax,a64 abs dword fs:0xbbbbbbbb
+	mov rbx,a64 abs dword fs:0xbbbbbbbb
+	mov al,a64 abs dword fs:0xffffffffcccccccc
+	mov bl,a64 abs dword fs:0xffffffffcccccccc
+	mov ax,a64 abs dword fs:0xffffffffcccccccc
+	mov bx,a64 abs dword fs:0xffffffffcccccccc
+	mov eax,a64 abs dword fs:0xffffffffcccccccc
+	mov ebx,a64 abs dword fs:0xffffffffcccccccc
+	mov rax,a64 abs dword fs:0xffffffffcccccccc
+	mov rbx,a64 abs dword fs:0xffffffffcccccccc
+
+	mov al,a64 abs qword fs:foo
+	mov bl,a64 abs qword fs:foo
+	mov ax,a64 abs qword fs:foo
+	mov bx,a64 abs qword fs:foo
+	mov eax,a64 abs qword fs:foo
+	mov ebx,a64 abs qword fs:foo
+	mov rax,a64 abs qword fs:foo
+	mov rbx,a64 abs qword fs:foo
+	mov al,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs qword fs:0xbbbbbbbb
+	mov bl,a64 abs qword fs:0xbbbbbbbb
+	mov ax,a64 abs qword fs:0xbbbbbbbb
+	mov bx,a64 abs qword fs:0xbbbbbbbb
+	mov eax,a64 abs qword fs:0xbbbbbbbb
+	mov ebx,a64 abs qword fs:0xbbbbbbbb
+	mov rax,a64 abs qword fs:0xbbbbbbbb
+	mov rbx,a64 abs qword fs:0xbbbbbbbb
+	mov al,a64 abs qword fs:0xffffffffcccccccc
+	mov bl,a64 abs qword fs:0xffffffffcccccccc
+	mov ax,a64 abs qword fs:0xffffffffcccccccc
+	mov bx,a64 abs qword fs:0xffffffffcccccccc
+	mov eax,a64 abs qword fs:0xffffffffcccccccc
+	mov ebx,a64 abs qword fs:0xffffffffcccccccc
+	mov rax,a64 abs qword fs:0xffffffffcccccccc
+	mov rbx,a64 abs qword fs:0xffffffffcccccccc
+
+	mov al,a32 abs fs:foo
+	mov bl,a32 abs fs:foo
+	mov ax,a32 abs fs:foo
+	mov bx,a32 abs fs:foo
+	mov eax,a32 abs fs:foo
+	mov ebx,a32 abs fs:foo
+	mov rax,a32 abs fs:foo
+	mov rbx,a32 abs fs:foo
+	mov al,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs fs:0xbbbbbbbb
+	mov bl,a32 abs fs:0xbbbbbbbb
+	mov ax,a32 abs fs:0xbbbbbbbb
+	mov bx,a32 abs fs:0xbbbbbbbb
+	mov eax,a32 abs fs:0xbbbbbbbb
+	mov ebx,a32 abs fs:0xbbbbbbbb
+	mov rax,a32 abs fs:0xbbbbbbbb
+	mov rbx,a32 abs fs:0xbbbbbbbb
+	mov al,a32 abs fs:0xffffffffcccccccc
+	mov bl,a32 abs fs:0xffffffffcccccccc
+	mov ax,a32 abs fs:0xffffffffcccccccc
+	mov bx,a32 abs fs:0xffffffffcccccccc
+	mov eax,a32 abs fs:0xffffffffcccccccc
+	mov ebx,a32 abs fs:0xffffffffcccccccc
+	mov rax,a32 abs fs:0xffffffffcccccccc
+	mov rbx,a32 abs fs:0xffffffffcccccccc
+
+	mov al,a32 abs dword fs:foo
+	mov bl,a32 abs dword fs:foo
+	mov ax,a32 abs dword fs:foo
+	mov bx,a32 abs dword fs:foo
+	mov eax,a32 abs dword fs:foo
+	mov ebx,a32 abs dword fs:foo
+	mov rax,a32 abs dword fs:foo
+	mov rbx,a32 abs dword fs:foo
+	mov al,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs dword fs:0xbbbbbbbb
+	mov bl,a32 abs dword fs:0xbbbbbbbb
+	mov ax,a32 abs dword fs:0xbbbbbbbb
+	mov bx,a32 abs dword fs:0xbbbbbbbb
+	mov eax,a32 abs dword fs:0xbbbbbbbb
+	mov ebx,a32 abs dword fs:0xbbbbbbbb
+	mov rax,a32 abs dword fs:0xbbbbbbbb
+	mov rbx,a32 abs dword fs:0xbbbbbbbb
+	mov al,a32 abs dword fs:0xffffffffcccccccc
+	mov bl,a32 abs dword fs:0xffffffffcccccccc
+	mov ax,a32 abs dword fs:0xffffffffcccccccc
+	mov bx,a32 abs dword fs:0xffffffffcccccccc
+	mov eax,a32 abs dword fs:0xffffffffcccccccc
+	mov ebx,a32 abs dword fs:0xffffffffcccccccc
+	mov rax,a32 abs dword fs:0xffffffffcccccccc
+	mov rbx,a32 abs dword fs:0xffffffffcccccccc
+
+	mov al,a32 abs qword fs:foo
+	mov bl,a32 abs qword fs:foo
+	mov ax,a32 abs qword fs:foo
+	mov bx,a32 abs qword fs:foo
+	mov eax,a32 abs qword fs:foo
+	mov ebx,a32 abs qword fs:foo
+	mov rax,a32 abs qword fs:foo
+	mov rbx,a32 abs qword fs:foo
+	mov al,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs qword fs:0xbbbbbbbb
+	mov bl,a32 abs qword fs:0xbbbbbbbb
+	mov ax,a32 abs qword fs:0xbbbbbbbb
+	mov bx,a32 abs qword fs:0xbbbbbbbb
+	mov eax,a32 abs qword fs:0xbbbbbbbb
+	mov ebx,a32 abs qword fs:0xbbbbbbbb
+	mov rax,a32 abs qword fs:0xbbbbbbbb
+	mov rbx,a32 abs qword fs:0xbbbbbbbb
+	mov al,a32 abs qword fs:0xffffffffcccccccc
+	mov bl,a32 abs qword fs:0xffffffffcccccccc
+	mov ax,a32 abs qword fs:0xffffffffcccccccc
+	mov bx,a32 abs qword fs:0xffffffffcccccccc
+	mov eax,a32 abs qword fs:0xffffffffcccccccc
+	mov ebx,a32 abs qword fs:0xffffffffcccccccc
+	mov rax,a32 abs qword fs:0xffffffffcccccccc
+	mov rbx,a32 abs qword fs:0xffffffffcccccccc
+
+	mov al,rel fs:foo
+	mov bl,rel fs:foo
+	mov ax,rel fs:foo
+	mov bx,rel fs:foo
+	mov eax,rel fs:foo
+	mov ebx,rel fs:foo
+	mov rax,rel fs:foo
+	mov rbx,rel fs:foo
+	mov al,rel fs:0xaaaaaaaaaaaaaaaa
+	mov bl,rel fs:0xaaaaaaaaaaaaaaaa
+	mov ax,rel fs:0xaaaaaaaaaaaaaaaa
+	mov bx,rel fs:0xaaaaaaaaaaaaaaaa
+	mov eax,rel fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,rel fs:0xaaaaaaaaaaaaaaaa
+	mov rax,rel fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,rel fs:0xaaaaaaaaaaaaaaaa
+	mov al,rel fs:0xbbbbbbbb
+	mov bl,rel fs:0xbbbbbbbb
+	mov ax,rel fs:0xbbbbbbbb
+	mov bx,rel fs:0xbbbbbbbb
+	mov eax,rel fs:0xbbbbbbbb
+	mov ebx,rel fs:0xbbbbbbbb
+	mov rax,rel fs:0xbbbbbbbb
+	mov rbx,rel fs:0xbbbbbbbb
+	mov al,rel fs:0xffffffffcccccccc
+	mov bl,rel fs:0xffffffffcccccccc
+	mov ax,rel fs:0xffffffffcccccccc
+	mov bx,rel fs:0xffffffffcccccccc
+	mov eax,rel fs:0xffffffffcccccccc
+	mov ebx,rel fs:0xffffffffcccccccc
+	mov rax,rel fs:0xffffffffcccccccc
+	mov rbx,rel fs:0xffffffffcccccccc
+
+	mov al,rel dword fs:foo
+	mov bl,rel dword fs:foo
+	mov ax,rel dword fs:foo
+	mov bx,rel dword fs:foo
+	mov eax,rel dword fs:foo
+	mov ebx,rel dword fs:foo
+	mov rax,rel dword fs:foo
+	mov rbx,rel dword fs:foo
+	mov al,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,rel dword fs:0xbbbbbbbb
+	mov bl,rel dword fs:0xbbbbbbbb
+	mov ax,rel dword fs:0xbbbbbbbb
+	mov bx,rel dword fs:0xbbbbbbbb
+	mov eax,rel dword fs:0xbbbbbbbb
+	mov ebx,rel dword fs:0xbbbbbbbb
+	mov rax,rel dword fs:0xbbbbbbbb
+	mov rbx,rel dword fs:0xbbbbbbbb
+	mov al,rel dword fs:0xffffffffcccccccc
+	mov bl,rel dword fs:0xffffffffcccccccc
+	mov ax,rel dword fs:0xffffffffcccccccc
+	mov bx,rel dword fs:0xffffffffcccccccc
+	mov eax,rel dword fs:0xffffffffcccccccc
+	mov ebx,rel dword fs:0xffffffffcccccccc
+	mov rax,rel dword fs:0xffffffffcccccccc
+	mov rbx,rel dword fs:0xffffffffcccccccc
+
+	mov al,rel qword fs:foo
+	mov bl,rel qword fs:foo
+	mov ax,rel qword fs:foo
+	mov bx,rel qword fs:foo
+	mov eax,rel qword fs:foo
+	mov ebx,rel qword fs:foo
+	mov rax,rel qword fs:foo
+	mov rbx,rel qword fs:foo
+	mov al,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,rel qword fs:0xbbbbbbbb
+	mov bl,rel qword fs:0xbbbbbbbb
+	mov ax,rel qword fs:0xbbbbbbbb
+	mov bx,rel qword fs:0xbbbbbbbb
+	mov eax,rel qword fs:0xbbbbbbbb
+	mov ebx,rel qword fs:0xbbbbbbbb
+	mov rax,rel qword fs:0xbbbbbbbb
+	mov rbx,rel qword fs:0xbbbbbbbb
+	mov al,rel qword fs:0xffffffffcccccccc
+	mov bl,rel qword fs:0xffffffffcccccccc
+	mov ax,rel qword fs:0xffffffffcccccccc
+	mov bx,rel qword fs:0xffffffffcccccccc
+	mov eax,rel qword fs:0xffffffffcccccccc
+	mov ebx,rel qword fs:0xffffffffcccccccc
+	mov rax,rel qword fs:0xffffffffcccccccc
+	mov rbx,rel qword fs:0xffffffffcccccccc
+
+	mov al,a64 rel fs:foo
+	mov bl,a64 rel fs:foo
+	mov ax,a64 rel fs:foo
+	mov bx,a64 rel fs:foo
+	mov eax,a64 rel fs:foo
+	mov ebx,a64 rel fs:foo
+	mov rax,a64 rel fs:foo
+	mov rbx,a64 rel fs:foo
+	mov al,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel fs:0xbbbbbbbb
+	mov bl,a64 rel fs:0xbbbbbbbb
+	mov ax,a64 rel fs:0xbbbbbbbb
+	mov bx,a64 rel fs:0xbbbbbbbb
+	mov eax,a64 rel fs:0xbbbbbbbb
+	mov ebx,a64 rel fs:0xbbbbbbbb
+	mov rax,a64 rel fs:0xbbbbbbbb
+	mov rbx,a64 rel fs:0xbbbbbbbb
+	mov al,a64 rel fs:0xffffffffcccccccc
+	mov bl,a64 rel fs:0xffffffffcccccccc
+	mov ax,a64 rel fs:0xffffffffcccccccc
+	mov bx,a64 rel fs:0xffffffffcccccccc
+	mov eax,a64 rel fs:0xffffffffcccccccc
+	mov ebx,a64 rel fs:0xffffffffcccccccc
+	mov rax,a64 rel fs:0xffffffffcccccccc
+	mov rbx,a64 rel fs:0xffffffffcccccccc
+
+	mov al,a64 rel dword fs:foo
+	mov bl,a64 rel dword fs:foo
+	mov ax,a64 rel dword fs:foo
+	mov bx,a64 rel dword fs:foo
+	mov eax,a64 rel dword fs:foo
+	mov ebx,a64 rel dword fs:foo
+	mov rax,a64 rel dword fs:foo
+	mov rbx,a64 rel dword fs:foo
+	mov al,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel dword fs:0xbbbbbbbb
+	mov bl,a64 rel dword fs:0xbbbbbbbb
+	mov ax,a64 rel dword fs:0xbbbbbbbb
+	mov bx,a64 rel dword fs:0xbbbbbbbb
+	mov eax,a64 rel dword fs:0xbbbbbbbb
+	mov ebx,a64 rel dword fs:0xbbbbbbbb
+	mov rax,a64 rel dword fs:0xbbbbbbbb
+	mov rbx,a64 rel dword fs:0xbbbbbbbb
+	mov al,a64 rel dword fs:0xffffffffcccccccc
+	mov bl,a64 rel dword fs:0xffffffffcccccccc
+	mov ax,a64 rel dword fs:0xffffffffcccccccc
+	mov bx,a64 rel dword fs:0xffffffffcccccccc
+	mov eax,a64 rel dword fs:0xffffffffcccccccc
+	mov ebx,a64 rel dword fs:0xffffffffcccccccc
+	mov rax,a64 rel dword fs:0xffffffffcccccccc
+	mov rbx,a64 rel dword fs:0xffffffffcccccccc
+
+	mov al,a64 rel qword fs:foo
+	mov bl,a64 rel qword fs:foo
+	mov ax,a64 rel qword fs:foo
+	mov bx,a64 rel qword fs:foo
+	mov eax,a64 rel qword fs:foo
+	mov ebx,a64 rel qword fs:foo
+	mov rax,a64 rel qword fs:foo
+	mov rbx,a64 rel qword fs:foo
+	mov al,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel qword fs:0xbbbbbbbb
+	mov bl,a64 rel qword fs:0xbbbbbbbb
+	mov ax,a64 rel qword fs:0xbbbbbbbb
+	mov bx,a64 rel qword fs:0xbbbbbbbb
+	mov eax,a64 rel qword fs:0xbbbbbbbb
+	mov ebx,a64 rel qword fs:0xbbbbbbbb
+	mov rax,a64 rel qword fs:0xbbbbbbbb
+	mov rbx,a64 rel qword fs:0xbbbbbbbb
+	mov al,a64 rel qword fs:0xffffffffcccccccc
+	mov bl,a64 rel qword fs:0xffffffffcccccccc
+	mov ax,a64 rel qword fs:0xffffffffcccccccc
+	mov bx,a64 rel qword fs:0xffffffffcccccccc
+	mov eax,a64 rel qword fs:0xffffffffcccccccc
+	mov ebx,a64 rel qword fs:0xffffffffcccccccc
+	mov rax,a64 rel qword fs:0xffffffffcccccccc
+	mov rbx,a64 rel qword fs:0xffffffffcccccccc
+
+	mov al,a32 rel fs:foo
+	mov bl,a32 rel fs:foo
+	mov ax,a32 rel fs:foo
+	mov bx,a32 rel fs:foo
+	mov eax,a32 rel fs:foo
+	mov ebx,a32 rel fs:foo
+	mov rax,a32 rel fs:foo
+	mov rbx,a32 rel fs:foo
+	mov al,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel fs:0xbbbbbbbb
+	mov bl,a32 rel fs:0xbbbbbbbb
+	mov ax,a32 rel fs:0xbbbbbbbb
+	mov bx,a32 rel fs:0xbbbbbbbb
+	mov eax,a32 rel fs:0xbbbbbbbb
+	mov ebx,a32 rel fs:0xbbbbbbbb
+	mov rax,a32 rel fs:0xbbbbbbbb
+	mov rbx,a32 rel fs:0xbbbbbbbb
+	mov al,a32 rel fs:0xffffffffcccccccc
+	mov bl,a32 rel fs:0xffffffffcccccccc
+	mov ax,a32 rel fs:0xffffffffcccccccc
+	mov bx,a32 rel fs:0xffffffffcccccccc
+	mov eax,a32 rel fs:0xffffffffcccccccc
+	mov ebx,a32 rel fs:0xffffffffcccccccc
+	mov rax,a32 rel fs:0xffffffffcccccccc
+	mov rbx,a32 rel fs:0xffffffffcccccccc
+
+	mov al,a32 rel dword fs:foo
+	mov bl,a32 rel dword fs:foo
+	mov ax,a32 rel dword fs:foo
+	mov bx,a32 rel dword fs:foo
+	mov eax,a32 rel dword fs:foo
+	mov ebx,a32 rel dword fs:foo
+	mov rax,a32 rel dword fs:foo
+	mov rbx,a32 rel dword fs:foo
+	mov al,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel dword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel dword fs:0xbbbbbbbb
+	mov bl,a32 rel dword fs:0xbbbbbbbb
+	mov ax,a32 rel dword fs:0xbbbbbbbb
+	mov bx,a32 rel dword fs:0xbbbbbbbb
+	mov eax,a32 rel dword fs:0xbbbbbbbb
+	mov ebx,a32 rel dword fs:0xbbbbbbbb
+	mov rax,a32 rel dword fs:0xbbbbbbbb
+	mov rbx,a32 rel dword fs:0xbbbbbbbb
+	mov al,a32 rel dword fs:0xffffffffcccccccc
+	mov bl,a32 rel dword fs:0xffffffffcccccccc
+	mov ax,a32 rel dword fs:0xffffffffcccccccc
+	mov bx,a32 rel dword fs:0xffffffffcccccccc
+	mov eax,a32 rel dword fs:0xffffffffcccccccc
+	mov ebx,a32 rel dword fs:0xffffffffcccccccc
+	mov rax,a32 rel dword fs:0xffffffffcccccccc
+	mov rbx,a32 rel dword fs:0xffffffffcccccccc
+
+	mov al,a32 rel qword fs:foo
+	mov bl,a32 rel qword fs:foo
+	mov ax,a32 rel qword fs:foo
+	mov bx,a32 rel qword fs:foo
+	mov eax,a32 rel qword fs:foo
+	mov ebx,a32 rel qword fs:foo
+	mov rax,a32 rel qword fs:foo
+	mov rbx,a32 rel qword fs:foo
+	mov al,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel qword fs:0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel qword fs:0xbbbbbbbb
+	mov bl,a32 rel qword fs:0xbbbbbbbb
+	mov ax,a32 rel qword fs:0xbbbbbbbb
+	mov bx,a32 rel qword fs:0xbbbbbbbb
+	mov eax,a32 rel qword fs:0xbbbbbbbb
+	mov ebx,a32 rel qword fs:0xbbbbbbbb
+	mov rax,a32 rel qword fs:0xbbbbbbbb
+	mov rbx,a32 rel qword fs:0xbbbbbbbb
+	mov al,a32 rel qword fs:0xffffffffcccccccc
+	mov bl,a32 rel qword fs:0xffffffffcccccccc
+	mov ax,a32 rel qword fs:0xffffffffcccccccc
+	mov bx,a32 rel qword fs:0xffffffffcccccccc
+	mov eax,a32 rel qword fs:0xffffffffcccccccc
+	mov ebx,a32 rel qword fs:0xffffffffcccccccc
+	mov rax,a32 rel qword fs:0xffffffffcccccccc
+	mov rbx,a32 rel qword fs:0xffffffffcccccccc
+
+	mov al,es:foo
+	mov bl,es:foo
+	mov ax,es:foo
+	mov bx,es:foo
+	mov eax,es:foo
+	mov ebx,es:foo
+	mov rax,es:foo
+	mov rbx,es:foo
+	mov al,es:0xaaaaaaaaaaaaaaaa
+	mov bl,es:0xaaaaaaaaaaaaaaaa
+	mov ax,es:0xaaaaaaaaaaaaaaaa
+	mov bx,es:0xaaaaaaaaaaaaaaaa
+	mov eax,es:0xaaaaaaaaaaaaaaaa
+	mov ebx,es:0xaaaaaaaaaaaaaaaa
+	mov rax,es:0xaaaaaaaaaaaaaaaa
+	mov rbx,es:0xaaaaaaaaaaaaaaaa
+	mov al,es:0xbbbbbbbb
+	mov bl,es:0xbbbbbbbb
+	mov ax,es:0xbbbbbbbb
+	mov bx,es:0xbbbbbbbb
+	mov eax,es:0xbbbbbbbb
+	mov ebx,es:0xbbbbbbbb
+	mov rax,es:0xbbbbbbbb
+	mov rbx,es:0xbbbbbbbb
+	mov al,es:0xffffffffcccccccc
+	mov bl,es:0xffffffffcccccccc
+	mov ax,es:0xffffffffcccccccc
+	mov bx,es:0xffffffffcccccccc
+	mov eax,es:0xffffffffcccccccc
+	mov ebx,es:0xffffffffcccccccc
+	mov rax,es:0xffffffffcccccccc
+	mov rbx,es:0xffffffffcccccccc
+
+	mov al,dword es:foo
+	mov bl,dword es:foo
+	mov ax,dword es:foo
+	mov bx,dword es:foo
+	mov eax,dword es:foo
+	mov ebx,dword es:foo
+	mov rax,dword es:foo
+	mov rbx,dword es:foo
+	mov al,dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,dword es:0xaaaaaaaaaaaaaaaa
+	mov al,dword es:0xbbbbbbbb
+	mov bl,dword es:0xbbbbbbbb
+	mov ax,dword es:0xbbbbbbbb
+	mov bx,dword es:0xbbbbbbbb
+	mov eax,dword es:0xbbbbbbbb
+	mov ebx,dword es:0xbbbbbbbb
+	mov rax,dword es:0xbbbbbbbb
+	mov rbx,dword es:0xbbbbbbbb
+	mov al,dword es:0xffffffffcccccccc
+	mov bl,dword es:0xffffffffcccccccc
+	mov ax,dword es:0xffffffffcccccccc
+	mov bx,dword es:0xffffffffcccccccc
+	mov eax,dword es:0xffffffffcccccccc
+	mov ebx,dword es:0xffffffffcccccccc
+	mov rax,dword es:0xffffffffcccccccc
+	mov rbx,dword es:0xffffffffcccccccc
+
+	mov al,qword es:foo
+	mov bl,qword es:foo
+	mov ax,qword es:foo
+	mov bx,qword es:foo
+	mov eax,qword es:foo
+	mov ebx,qword es:foo
+	mov rax,qword es:foo
+	mov rbx,qword es:foo
+	mov al,qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,qword es:0xaaaaaaaaaaaaaaaa
+	mov al,qword es:0xbbbbbbbb
+	mov bl,qword es:0xbbbbbbbb
+	mov ax,qword es:0xbbbbbbbb
+	mov bx,qword es:0xbbbbbbbb
+	mov eax,qword es:0xbbbbbbbb
+	mov ebx,qword es:0xbbbbbbbb
+	mov rax,qword es:0xbbbbbbbb
+	mov rbx,qword es:0xbbbbbbbb
+	mov al,qword es:0xffffffffcccccccc
+	mov bl,qword es:0xffffffffcccccccc
+	mov ax,qword es:0xffffffffcccccccc
+	mov bx,qword es:0xffffffffcccccccc
+	mov eax,qword es:0xffffffffcccccccc
+	mov ebx,qword es:0xffffffffcccccccc
+	mov rax,qword es:0xffffffffcccccccc
+	mov rbx,qword es:0xffffffffcccccccc
+
+	mov al,a64 es:foo
+	mov bl,a64 es:foo
+	mov ax,a64 es:foo
+	mov bx,a64 es:foo
+	mov eax,a64 es:foo
+	mov ebx,a64 es:foo
+	mov rax,a64 es:foo
+	mov rbx,a64 es:foo
+	mov al,a64 es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 es:0xbbbbbbbb
+	mov bl,a64 es:0xbbbbbbbb
+	mov ax,a64 es:0xbbbbbbbb
+	mov bx,a64 es:0xbbbbbbbb
+	mov eax,a64 es:0xbbbbbbbb
+	mov ebx,a64 es:0xbbbbbbbb
+	mov rax,a64 es:0xbbbbbbbb
+	mov rbx,a64 es:0xbbbbbbbb
+	mov al,a64 es:0xffffffffcccccccc
+	mov bl,a64 es:0xffffffffcccccccc
+	mov ax,a64 es:0xffffffffcccccccc
+	mov bx,a64 es:0xffffffffcccccccc
+	mov eax,a64 es:0xffffffffcccccccc
+	mov ebx,a64 es:0xffffffffcccccccc
+	mov rax,a64 es:0xffffffffcccccccc
+	mov rbx,a64 es:0xffffffffcccccccc
+
+	mov al,a64 dword es:foo
+	mov bl,a64 dword es:foo
+	mov ax,a64 dword es:foo
+	mov bx,a64 dword es:foo
+	mov eax,a64 dword es:foo
+	mov ebx,a64 dword es:foo
+	mov rax,a64 dword es:foo
+	mov rbx,a64 dword es:foo
+	mov al,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 dword es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 dword es:0xbbbbbbbb
+	mov bl,a64 dword es:0xbbbbbbbb
+	mov ax,a64 dword es:0xbbbbbbbb
+	mov bx,a64 dword es:0xbbbbbbbb
+	mov eax,a64 dword es:0xbbbbbbbb
+	mov ebx,a64 dword es:0xbbbbbbbb
+	mov rax,a64 dword es:0xbbbbbbbb
+	mov rbx,a64 dword es:0xbbbbbbbb
+	mov al,a64 dword es:0xffffffffcccccccc
+	mov bl,a64 dword es:0xffffffffcccccccc
+	mov ax,a64 dword es:0xffffffffcccccccc
+	mov bx,a64 dword es:0xffffffffcccccccc
+	mov eax,a64 dword es:0xffffffffcccccccc
+	mov ebx,a64 dword es:0xffffffffcccccccc
+	mov rax,a64 dword es:0xffffffffcccccccc
+	mov rbx,a64 dword es:0xffffffffcccccccc
+
+	mov al,a64 qword es:foo
+	mov bl,a64 qword es:foo
+	mov ax,a64 qword es:foo
+	mov bx,a64 qword es:foo
+	mov eax,a64 qword es:foo
+	mov ebx,a64 qword es:foo
+	mov rax,a64 qword es:foo
+	mov rbx,a64 qword es:foo
+	mov al,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 qword es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 qword es:0xbbbbbbbb
+	mov bl,a64 qword es:0xbbbbbbbb
+	mov ax,a64 qword es:0xbbbbbbbb
+	mov bx,a64 qword es:0xbbbbbbbb
+	mov eax,a64 qword es:0xbbbbbbbb
+	mov ebx,a64 qword es:0xbbbbbbbb
+	mov rax,a64 qword es:0xbbbbbbbb
+	mov rbx,a64 qword es:0xbbbbbbbb
+	mov al,a64 qword es:0xffffffffcccccccc
+	mov bl,a64 qword es:0xffffffffcccccccc
+	mov ax,a64 qword es:0xffffffffcccccccc
+	mov bx,a64 qword es:0xffffffffcccccccc
+	mov eax,a64 qword es:0xffffffffcccccccc
+	mov ebx,a64 qword es:0xffffffffcccccccc
+	mov rax,a64 qword es:0xffffffffcccccccc
+	mov rbx,a64 qword es:0xffffffffcccccccc
+
+	mov al,a32 es:foo
+	mov bl,a32 es:foo
+	mov ax,a32 es:foo
+	mov bx,a32 es:foo
+	mov eax,a32 es:foo
+	mov ebx,a32 es:foo
+	mov rax,a32 es:foo
+	mov rbx,a32 es:foo
+	mov al,a32 es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 es:0xbbbbbbbb
+	mov bl,a32 es:0xbbbbbbbb
+	mov ax,a32 es:0xbbbbbbbb
+	mov bx,a32 es:0xbbbbbbbb
+	mov eax,a32 es:0xbbbbbbbb
+	mov ebx,a32 es:0xbbbbbbbb
+	mov rax,a32 es:0xbbbbbbbb
+	mov rbx,a32 es:0xbbbbbbbb
+	mov al,a32 es:0xffffffffcccccccc
+	mov bl,a32 es:0xffffffffcccccccc
+	mov ax,a32 es:0xffffffffcccccccc
+	mov bx,a32 es:0xffffffffcccccccc
+	mov eax,a32 es:0xffffffffcccccccc
+	mov ebx,a32 es:0xffffffffcccccccc
+	mov rax,a32 es:0xffffffffcccccccc
+	mov rbx,a32 es:0xffffffffcccccccc
+
+	mov al,a32 dword es:foo
+	mov bl,a32 dword es:foo
+	mov ax,a32 dword es:foo
+	mov bx,a32 dword es:foo
+	mov eax,a32 dword es:foo
+	mov ebx,a32 dword es:foo
+	mov rax,a32 dword es:foo
+	mov rbx,a32 dword es:foo
+	mov al,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 dword es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 dword es:0xbbbbbbbb
+	mov bl,a32 dword es:0xbbbbbbbb
+	mov ax,a32 dword es:0xbbbbbbbb
+	mov bx,a32 dword es:0xbbbbbbbb
+	mov eax,a32 dword es:0xbbbbbbbb
+	mov ebx,a32 dword es:0xbbbbbbbb
+	mov rax,a32 dword es:0xbbbbbbbb
+	mov rbx,a32 dword es:0xbbbbbbbb
+	mov al,a32 dword es:0xffffffffcccccccc
+	mov bl,a32 dword es:0xffffffffcccccccc
+	mov ax,a32 dword es:0xffffffffcccccccc
+	mov bx,a32 dword es:0xffffffffcccccccc
+	mov eax,a32 dword es:0xffffffffcccccccc
+	mov ebx,a32 dword es:0xffffffffcccccccc
+	mov rax,a32 dword es:0xffffffffcccccccc
+	mov rbx,a32 dword es:0xffffffffcccccccc
+
+	mov al,a32 qword es:foo
+	mov bl,a32 qword es:foo
+	mov ax,a32 qword es:foo
+	mov bx,a32 qword es:foo
+	mov eax,a32 qword es:foo
+	mov ebx,a32 qword es:foo
+	mov rax,a32 qword es:foo
+	mov rbx,a32 qword es:foo
+	mov al,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 qword es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 qword es:0xbbbbbbbb
+	mov bl,a32 qword es:0xbbbbbbbb
+	mov ax,a32 qword es:0xbbbbbbbb
+	mov bx,a32 qword es:0xbbbbbbbb
+	mov eax,a32 qword es:0xbbbbbbbb
+	mov ebx,a32 qword es:0xbbbbbbbb
+	mov rax,a32 qword es:0xbbbbbbbb
+	mov rbx,a32 qword es:0xbbbbbbbb
+	mov al,a32 qword es:0xffffffffcccccccc
+	mov bl,a32 qword es:0xffffffffcccccccc
+	mov ax,a32 qword es:0xffffffffcccccccc
+	mov bx,a32 qword es:0xffffffffcccccccc
+	mov eax,a32 qword es:0xffffffffcccccccc
+	mov ebx,a32 qword es:0xffffffffcccccccc
+	mov rax,a32 qword es:0xffffffffcccccccc
+	mov rbx,a32 qword es:0xffffffffcccccccc
+
+	mov al,abs es:foo
+	mov bl,abs es:foo
+	mov ax,abs es:foo
+	mov bx,abs es:foo
+	mov eax,abs es:foo
+	mov ebx,abs es:foo
+	mov rax,abs es:foo
+	mov rbx,abs es:foo
+	mov al,abs es:0xaaaaaaaaaaaaaaaa
+	mov bl,abs es:0xaaaaaaaaaaaaaaaa
+	mov ax,abs es:0xaaaaaaaaaaaaaaaa
+	mov bx,abs es:0xaaaaaaaaaaaaaaaa
+	mov eax,abs es:0xaaaaaaaaaaaaaaaa
+	mov ebx,abs es:0xaaaaaaaaaaaaaaaa
+	mov rax,abs es:0xaaaaaaaaaaaaaaaa
+	mov rbx,abs es:0xaaaaaaaaaaaaaaaa
+	mov al,abs es:0xbbbbbbbb
+	mov bl,abs es:0xbbbbbbbb
+	mov ax,abs es:0xbbbbbbbb
+	mov bx,abs es:0xbbbbbbbb
+	mov eax,abs es:0xbbbbbbbb
+	mov ebx,abs es:0xbbbbbbbb
+	mov rax,abs es:0xbbbbbbbb
+	mov rbx,abs es:0xbbbbbbbb
+	mov al,abs es:0xffffffffcccccccc
+	mov bl,abs es:0xffffffffcccccccc
+	mov ax,abs es:0xffffffffcccccccc
+	mov bx,abs es:0xffffffffcccccccc
+	mov eax,abs es:0xffffffffcccccccc
+	mov ebx,abs es:0xffffffffcccccccc
+	mov rax,abs es:0xffffffffcccccccc
+	mov rbx,abs es:0xffffffffcccccccc
+
+	mov al,abs dword es:foo
+	mov bl,abs dword es:foo
+	mov ax,abs dword es:foo
+	mov bx,abs dword es:foo
+	mov eax,abs dword es:foo
+	mov ebx,abs dword es:foo
+	mov rax,abs dword es:foo
+	mov rbx,abs dword es:foo
+	mov al,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,abs dword es:0xaaaaaaaaaaaaaaaa
+	mov al,abs dword es:0xbbbbbbbb
+	mov bl,abs dword es:0xbbbbbbbb
+	mov ax,abs dword es:0xbbbbbbbb
+	mov bx,abs dword es:0xbbbbbbbb
+	mov eax,abs dword es:0xbbbbbbbb
+	mov ebx,abs dword es:0xbbbbbbbb
+	mov rax,abs dword es:0xbbbbbbbb
+	mov rbx,abs dword es:0xbbbbbbbb
+	mov al,abs dword es:0xffffffffcccccccc
+	mov bl,abs dword es:0xffffffffcccccccc
+	mov ax,abs dword es:0xffffffffcccccccc
+	mov bx,abs dword es:0xffffffffcccccccc
+	mov eax,abs dword es:0xffffffffcccccccc
+	mov ebx,abs dword es:0xffffffffcccccccc
+	mov rax,abs dword es:0xffffffffcccccccc
+	mov rbx,abs dword es:0xffffffffcccccccc
+
+	mov al,abs qword es:foo
+	mov bl,abs qword es:foo
+	mov ax,abs qword es:foo
+	mov bx,abs qword es:foo
+	mov eax,abs qword es:foo
+	mov ebx,abs qword es:foo
+	mov rax,abs qword es:foo
+	mov rbx,abs qword es:foo
+	mov al,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,abs qword es:0xaaaaaaaaaaaaaaaa
+	mov al,abs qword es:0xbbbbbbbb
+	mov bl,abs qword es:0xbbbbbbbb
+	mov ax,abs qword es:0xbbbbbbbb
+	mov bx,abs qword es:0xbbbbbbbb
+	mov eax,abs qword es:0xbbbbbbbb
+	mov ebx,abs qword es:0xbbbbbbbb
+	mov rax,abs qword es:0xbbbbbbbb
+	mov rbx,abs qword es:0xbbbbbbbb
+	mov al,abs qword es:0xffffffffcccccccc
+	mov bl,abs qword es:0xffffffffcccccccc
+	mov ax,abs qword es:0xffffffffcccccccc
+	mov bx,abs qword es:0xffffffffcccccccc
+	mov eax,abs qword es:0xffffffffcccccccc
+	mov ebx,abs qword es:0xffffffffcccccccc
+	mov rax,abs qword es:0xffffffffcccccccc
+	mov rbx,abs qword es:0xffffffffcccccccc
+
+	mov al,a64 abs es:foo
+	mov bl,a64 abs es:foo
+	mov ax,a64 abs es:foo
+	mov bx,a64 abs es:foo
+	mov eax,a64 abs es:foo
+	mov ebx,a64 abs es:foo
+	mov rax,a64 abs es:foo
+	mov rbx,a64 abs es:foo
+	mov al,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs es:0xbbbbbbbb
+	mov bl,a64 abs es:0xbbbbbbbb
+	mov ax,a64 abs es:0xbbbbbbbb
+	mov bx,a64 abs es:0xbbbbbbbb
+	mov eax,a64 abs es:0xbbbbbbbb
+	mov ebx,a64 abs es:0xbbbbbbbb
+	mov rax,a64 abs es:0xbbbbbbbb
+	mov rbx,a64 abs es:0xbbbbbbbb
+	mov al,a64 abs es:0xffffffffcccccccc
+	mov bl,a64 abs es:0xffffffffcccccccc
+	mov ax,a64 abs es:0xffffffffcccccccc
+	mov bx,a64 abs es:0xffffffffcccccccc
+	mov eax,a64 abs es:0xffffffffcccccccc
+	mov ebx,a64 abs es:0xffffffffcccccccc
+	mov rax,a64 abs es:0xffffffffcccccccc
+	mov rbx,a64 abs es:0xffffffffcccccccc
+
+	mov al,a64 abs dword es:foo
+	mov bl,a64 abs dword es:foo
+	mov ax,a64 abs dword es:foo
+	mov bx,a64 abs dword es:foo
+	mov eax,a64 abs dword es:foo
+	mov ebx,a64 abs dword es:foo
+	mov rax,a64 abs dword es:foo
+	mov rbx,a64 abs dword es:foo
+	mov al,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs dword es:0xbbbbbbbb
+	mov bl,a64 abs dword es:0xbbbbbbbb
+	mov ax,a64 abs dword es:0xbbbbbbbb
+	mov bx,a64 abs dword es:0xbbbbbbbb
+	mov eax,a64 abs dword es:0xbbbbbbbb
+	mov ebx,a64 abs dword es:0xbbbbbbbb
+	mov rax,a64 abs dword es:0xbbbbbbbb
+	mov rbx,a64 abs dword es:0xbbbbbbbb
+	mov al,a64 abs dword es:0xffffffffcccccccc
+	mov bl,a64 abs dword es:0xffffffffcccccccc
+	mov ax,a64 abs dword es:0xffffffffcccccccc
+	mov bx,a64 abs dword es:0xffffffffcccccccc
+	mov eax,a64 abs dword es:0xffffffffcccccccc
+	mov ebx,a64 abs dword es:0xffffffffcccccccc
+	mov rax,a64 abs dword es:0xffffffffcccccccc
+	mov rbx,a64 abs dword es:0xffffffffcccccccc
+
+	mov al,a64 abs qword es:foo
+	mov bl,a64 abs qword es:foo
+	mov ax,a64 abs qword es:foo
+	mov bx,a64 abs qword es:foo
+	mov eax,a64 abs qword es:foo
+	mov ebx,a64 abs qword es:foo
+	mov rax,a64 abs qword es:foo
+	mov rbx,a64 abs qword es:foo
+	mov al,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 abs qword es:0xbbbbbbbb
+	mov bl,a64 abs qword es:0xbbbbbbbb
+	mov ax,a64 abs qword es:0xbbbbbbbb
+	mov bx,a64 abs qword es:0xbbbbbbbb
+	mov eax,a64 abs qword es:0xbbbbbbbb
+	mov ebx,a64 abs qword es:0xbbbbbbbb
+	mov rax,a64 abs qword es:0xbbbbbbbb
+	mov rbx,a64 abs qword es:0xbbbbbbbb
+	mov al,a64 abs qword es:0xffffffffcccccccc
+	mov bl,a64 abs qword es:0xffffffffcccccccc
+	mov ax,a64 abs qword es:0xffffffffcccccccc
+	mov bx,a64 abs qword es:0xffffffffcccccccc
+	mov eax,a64 abs qword es:0xffffffffcccccccc
+	mov ebx,a64 abs qword es:0xffffffffcccccccc
+	mov rax,a64 abs qword es:0xffffffffcccccccc
+	mov rbx,a64 abs qword es:0xffffffffcccccccc
+
+	mov al,a32 abs es:foo
+	mov bl,a32 abs es:foo
+	mov ax,a32 abs es:foo
+	mov bx,a32 abs es:foo
+	mov eax,a32 abs es:foo
+	mov ebx,a32 abs es:foo
+	mov rax,a32 abs es:foo
+	mov rbx,a32 abs es:foo
+	mov al,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs es:0xbbbbbbbb
+	mov bl,a32 abs es:0xbbbbbbbb
+	mov ax,a32 abs es:0xbbbbbbbb
+	mov bx,a32 abs es:0xbbbbbbbb
+	mov eax,a32 abs es:0xbbbbbbbb
+	mov ebx,a32 abs es:0xbbbbbbbb
+	mov rax,a32 abs es:0xbbbbbbbb
+	mov rbx,a32 abs es:0xbbbbbbbb
+	mov al,a32 abs es:0xffffffffcccccccc
+	mov bl,a32 abs es:0xffffffffcccccccc
+	mov ax,a32 abs es:0xffffffffcccccccc
+	mov bx,a32 abs es:0xffffffffcccccccc
+	mov eax,a32 abs es:0xffffffffcccccccc
+	mov ebx,a32 abs es:0xffffffffcccccccc
+	mov rax,a32 abs es:0xffffffffcccccccc
+	mov rbx,a32 abs es:0xffffffffcccccccc
+
+	mov al,a32 abs dword es:foo
+	mov bl,a32 abs dword es:foo
+	mov ax,a32 abs dword es:foo
+	mov bx,a32 abs dword es:foo
+	mov eax,a32 abs dword es:foo
+	mov ebx,a32 abs dword es:foo
+	mov rax,a32 abs dword es:foo
+	mov rbx,a32 abs dword es:foo
+	mov al,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs dword es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs dword es:0xbbbbbbbb
+	mov bl,a32 abs dword es:0xbbbbbbbb
+	mov ax,a32 abs dword es:0xbbbbbbbb
+	mov bx,a32 abs dword es:0xbbbbbbbb
+	mov eax,a32 abs dword es:0xbbbbbbbb
+	mov ebx,a32 abs dword es:0xbbbbbbbb
+	mov rax,a32 abs dword es:0xbbbbbbbb
+	mov rbx,a32 abs dword es:0xbbbbbbbb
+	mov al,a32 abs dword es:0xffffffffcccccccc
+	mov bl,a32 abs dword es:0xffffffffcccccccc
+	mov ax,a32 abs dword es:0xffffffffcccccccc
+	mov bx,a32 abs dword es:0xffffffffcccccccc
+	mov eax,a32 abs dword es:0xffffffffcccccccc
+	mov ebx,a32 abs dword es:0xffffffffcccccccc
+	mov rax,a32 abs dword es:0xffffffffcccccccc
+	mov rbx,a32 abs dword es:0xffffffffcccccccc
+
+	mov al,a32 abs qword es:foo
+	mov bl,a32 abs qword es:foo
+	mov ax,a32 abs qword es:foo
+	mov bx,a32 abs qword es:foo
+	mov eax,a32 abs qword es:foo
+	mov ebx,a32 abs qword es:foo
+	mov rax,a32 abs qword es:foo
+	mov rbx,a32 abs qword es:foo
+	mov al,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 abs qword es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 abs qword es:0xbbbbbbbb
+	mov bl,a32 abs qword es:0xbbbbbbbb
+	mov ax,a32 abs qword es:0xbbbbbbbb
+	mov bx,a32 abs qword es:0xbbbbbbbb
+	mov eax,a32 abs qword es:0xbbbbbbbb
+	mov ebx,a32 abs qword es:0xbbbbbbbb
+	mov rax,a32 abs qword es:0xbbbbbbbb
+	mov rbx,a32 abs qword es:0xbbbbbbbb
+	mov al,a32 abs qword es:0xffffffffcccccccc
+	mov bl,a32 abs qword es:0xffffffffcccccccc
+	mov ax,a32 abs qword es:0xffffffffcccccccc
+	mov bx,a32 abs qword es:0xffffffffcccccccc
+	mov eax,a32 abs qword es:0xffffffffcccccccc
+	mov ebx,a32 abs qword es:0xffffffffcccccccc
+	mov rax,a32 abs qword es:0xffffffffcccccccc
+	mov rbx,a32 abs qword es:0xffffffffcccccccc
+
+	mov al,rel es:foo
+	mov bl,rel es:foo
+	mov ax,rel es:foo
+	mov bx,rel es:foo
+	mov eax,rel es:foo
+	mov ebx,rel es:foo
+	mov rax,rel es:foo
+	mov rbx,rel es:foo
+	mov al,rel es:0xaaaaaaaaaaaaaaaa
+	mov bl,rel es:0xaaaaaaaaaaaaaaaa
+	mov ax,rel es:0xaaaaaaaaaaaaaaaa
+	mov bx,rel es:0xaaaaaaaaaaaaaaaa
+	mov eax,rel es:0xaaaaaaaaaaaaaaaa
+	mov ebx,rel es:0xaaaaaaaaaaaaaaaa
+	mov rax,rel es:0xaaaaaaaaaaaaaaaa
+	mov rbx,rel es:0xaaaaaaaaaaaaaaaa
+	mov al,rel es:0xbbbbbbbb
+	mov bl,rel es:0xbbbbbbbb
+	mov ax,rel es:0xbbbbbbbb
+	mov bx,rel es:0xbbbbbbbb
+	mov eax,rel es:0xbbbbbbbb
+	mov ebx,rel es:0xbbbbbbbb
+	mov rax,rel es:0xbbbbbbbb
+	mov rbx,rel es:0xbbbbbbbb
+	mov al,rel es:0xffffffffcccccccc
+	mov bl,rel es:0xffffffffcccccccc
+	mov ax,rel es:0xffffffffcccccccc
+	mov bx,rel es:0xffffffffcccccccc
+	mov eax,rel es:0xffffffffcccccccc
+	mov ebx,rel es:0xffffffffcccccccc
+	mov rax,rel es:0xffffffffcccccccc
+	mov rbx,rel es:0xffffffffcccccccc
+
+	mov al,rel dword es:foo
+	mov bl,rel dword es:foo
+	mov ax,rel dword es:foo
+	mov bx,rel dword es:foo
+	mov eax,rel dword es:foo
+	mov ebx,rel dword es:foo
+	mov rax,rel dword es:foo
+	mov rbx,rel dword es:foo
+	mov al,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,rel dword es:0xaaaaaaaaaaaaaaaa
+	mov al,rel dword es:0xbbbbbbbb
+	mov bl,rel dword es:0xbbbbbbbb
+	mov ax,rel dword es:0xbbbbbbbb
+	mov bx,rel dword es:0xbbbbbbbb
+	mov eax,rel dword es:0xbbbbbbbb
+	mov ebx,rel dword es:0xbbbbbbbb
+	mov rax,rel dword es:0xbbbbbbbb
+	mov rbx,rel dword es:0xbbbbbbbb
+	mov al,rel dword es:0xffffffffcccccccc
+	mov bl,rel dword es:0xffffffffcccccccc
+	mov ax,rel dword es:0xffffffffcccccccc
+	mov bx,rel dword es:0xffffffffcccccccc
+	mov eax,rel dword es:0xffffffffcccccccc
+	mov ebx,rel dword es:0xffffffffcccccccc
+	mov rax,rel dword es:0xffffffffcccccccc
+	mov rbx,rel dword es:0xffffffffcccccccc
+
+	mov al,rel qword es:foo
+	mov bl,rel qword es:foo
+	mov ax,rel qword es:foo
+	mov bx,rel qword es:foo
+	mov eax,rel qword es:foo
+	mov ebx,rel qword es:foo
+	mov rax,rel qword es:foo
+	mov rbx,rel qword es:foo
+	mov al,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,rel qword es:0xaaaaaaaaaaaaaaaa
+	mov al,rel qword es:0xbbbbbbbb
+	mov bl,rel qword es:0xbbbbbbbb
+	mov ax,rel qword es:0xbbbbbbbb
+	mov bx,rel qword es:0xbbbbbbbb
+	mov eax,rel qword es:0xbbbbbbbb
+	mov ebx,rel qword es:0xbbbbbbbb
+	mov rax,rel qword es:0xbbbbbbbb
+	mov rbx,rel qword es:0xbbbbbbbb
+	mov al,rel qword es:0xffffffffcccccccc
+	mov bl,rel qword es:0xffffffffcccccccc
+	mov ax,rel qword es:0xffffffffcccccccc
+	mov bx,rel qword es:0xffffffffcccccccc
+	mov eax,rel qword es:0xffffffffcccccccc
+	mov ebx,rel qword es:0xffffffffcccccccc
+	mov rax,rel qword es:0xffffffffcccccccc
+	mov rbx,rel qword es:0xffffffffcccccccc
+
+	mov al,a64 rel es:foo
+	mov bl,a64 rel es:foo
+	mov ax,a64 rel es:foo
+	mov bx,a64 rel es:foo
+	mov eax,a64 rel es:foo
+	mov ebx,a64 rel es:foo
+	mov rax,a64 rel es:foo
+	mov rbx,a64 rel es:foo
+	mov al,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel es:0xbbbbbbbb
+	mov bl,a64 rel es:0xbbbbbbbb
+	mov ax,a64 rel es:0xbbbbbbbb
+	mov bx,a64 rel es:0xbbbbbbbb
+	mov eax,a64 rel es:0xbbbbbbbb
+	mov ebx,a64 rel es:0xbbbbbbbb
+	mov rax,a64 rel es:0xbbbbbbbb
+	mov rbx,a64 rel es:0xbbbbbbbb
+	mov al,a64 rel es:0xffffffffcccccccc
+	mov bl,a64 rel es:0xffffffffcccccccc
+	mov ax,a64 rel es:0xffffffffcccccccc
+	mov bx,a64 rel es:0xffffffffcccccccc
+	mov eax,a64 rel es:0xffffffffcccccccc
+	mov ebx,a64 rel es:0xffffffffcccccccc
+	mov rax,a64 rel es:0xffffffffcccccccc
+	mov rbx,a64 rel es:0xffffffffcccccccc
+
+	mov al,a64 rel dword es:foo
+	mov bl,a64 rel dword es:foo
+	mov ax,a64 rel dword es:foo
+	mov bx,a64 rel dword es:foo
+	mov eax,a64 rel dword es:foo
+	mov ebx,a64 rel dword es:foo
+	mov rax,a64 rel dword es:foo
+	mov rbx,a64 rel dword es:foo
+	mov al,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel dword es:0xbbbbbbbb
+	mov bl,a64 rel dword es:0xbbbbbbbb
+	mov ax,a64 rel dword es:0xbbbbbbbb
+	mov bx,a64 rel dword es:0xbbbbbbbb
+	mov eax,a64 rel dword es:0xbbbbbbbb
+	mov ebx,a64 rel dword es:0xbbbbbbbb
+	mov rax,a64 rel dword es:0xbbbbbbbb
+	mov rbx,a64 rel dword es:0xbbbbbbbb
+	mov al,a64 rel dword es:0xffffffffcccccccc
+	mov bl,a64 rel dword es:0xffffffffcccccccc
+	mov ax,a64 rel dword es:0xffffffffcccccccc
+	mov bx,a64 rel dword es:0xffffffffcccccccc
+	mov eax,a64 rel dword es:0xffffffffcccccccc
+	mov ebx,a64 rel dword es:0xffffffffcccccccc
+	mov rax,a64 rel dword es:0xffffffffcccccccc
+	mov rbx,a64 rel dword es:0xffffffffcccccccc
+
+	mov al,a64 rel qword es:foo
+	mov bl,a64 rel qword es:foo
+	mov ax,a64 rel qword es:foo
+	mov bx,a64 rel qword es:foo
+	mov eax,a64 rel qword es:foo
+	mov ebx,a64 rel qword es:foo
+	mov rax,a64 rel qword es:foo
+	mov rbx,a64 rel qword es:foo
+	mov al,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a64 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov al,a64 rel qword es:0xbbbbbbbb
+	mov bl,a64 rel qword es:0xbbbbbbbb
+	mov ax,a64 rel qword es:0xbbbbbbbb
+	mov bx,a64 rel qword es:0xbbbbbbbb
+	mov eax,a64 rel qword es:0xbbbbbbbb
+	mov ebx,a64 rel qword es:0xbbbbbbbb
+	mov rax,a64 rel qword es:0xbbbbbbbb
+	mov rbx,a64 rel qword es:0xbbbbbbbb
+	mov al,a64 rel qword es:0xffffffffcccccccc
+	mov bl,a64 rel qword es:0xffffffffcccccccc
+	mov ax,a64 rel qword es:0xffffffffcccccccc
+	mov bx,a64 rel qword es:0xffffffffcccccccc
+	mov eax,a64 rel qword es:0xffffffffcccccccc
+	mov ebx,a64 rel qword es:0xffffffffcccccccc
+	mov rax,a64 rel qword es:0xffffffffcccccccc
+	mov rbx,a64 rel qword es:0xffffffffcccccccc
+
+	mov al,a32 rel es:foo
+	mov bl,a32 rel es:foo
+	mov ax,a32 rel es:foo
+	mov bx,a32 rel es:foo
+	mov eax,a32 rel es:foo
+	mov ebx,a32 rel es:foo
+	mov rax,a32 rel es:foo
+	mov rbx,a32 rel es:foo
+	mov al,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel es:0xbbbbbbbb
+	mov bl,a32 rel es:0xbbbbbbbb
+	mov ax,a32 rel es:0xbbbbbbbb
+	mov bx,a32 rel es:0xbbbbbbbb
+	mov eax,a32 rel es:0xbbbbbbbb
+	mov ebx,a32 rel es:0xbbbbbbbb
+	mov rax,a32 rel es:0xbbbbbbbb
+	mov rbx,a32 rel es:0xbbbbbbbb
+	mov al,a32 rel es:0xffffffffcccccccc
+	mov bl,a32 rel es:0xffffffffcccccccc
+	mov ax,a32 rel es:0xffffffffcccccccc
+	mov bx,a32 rel es:0xffffffffcccccccc
+	mov eax,a32 rel es:0xffffffffcccccccc
+	mov ebx,a32 rel es:0xffffffffcccccccc
+	mov rax,a32 rel es:0xffffffffcccccccc
+	mov rbx,a32 rel es:0xffffffffcccccccc
+
+	mov al,a32 rel dword es:foo
+	mov bl,a32 rel dword es:foo
+	mov ax,a32 rel dword es:foo
+	mov bx,a32 rel dword es:foo
+	mov eax,a32 rel dword es:foo
+	mov ebx,a32 rel dword es:foo
+	mov rax,a32 rel dword es:foo
+	mov rbx,a32 rel dword es:foo
+	mov al,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel dword es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel dword es:0xbbbbbbbb
+	mov bl,a32 rel dword es:0xbbbbbbbb
+	mov ax,a32 rel dword es:0xbbbbbbbb
+	mov bx,a32 rel dword es:0xbbbbbbbb
+	mov eax,a32 rel dword es:0xbbbbbbbb
+	mov ebx,a32 rel dword es:0xbbbbbbbb
+	mov rax,a32 rel dword es:0xbbbbbbbb
+	mov rbx,a32 rel dword es:0xbbbbbbbb
+	mov al,a32 rel dword es:0xffffffffcccccccc
+	mov bl,a32 rel dword es:0xffffffffcccccccc
+	mov ax,a32 rel dword es:0xffffffffcccccccc
+	mov bx,a32 rel dword es:0xffffffffcccccccc
+	mov eax,a32 rel dword es:0xffffffffcccccccc
+	mov ebx,a32 rel dword es:0xffffffffcccccccc
+	mov rax,a32 rel dword es:0xffffffffcccccccc
+	mov rbx,a32 rel dword es:0xffffffffcccccccc
+
+	mov al,a32 rel qword es:foo
+	mov bl,a32 rel qword es:foo
+	mov ax,a32 rel qword es:foo
+	mov bx,a32 rel qword es:foo
+	mov eax,a32 rel qword es:foo
+	mov ebx,a32 rel qword es:foo
+	mov rax,a32 rel qword es:foo
+	mov rbx,a32 rel qword es:foo
+	mov al,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov bl,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov ax,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov bx,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov eax,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov ebx,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov rax,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov rbx,a32 rel qword es:0xaaaaaaaaaaaaaaaa
+	mov al,a32 rel qword es:0xbbbbbbbb
+	mov bl,a32 rel qword es:0xbbbbbbbb
+	mov ax,a32 rel qword es:0xbbbbbbbb
+	mov bx,a32 rel qword es:0xbbbbbbbb
+	mov eax,a32 rel qword es:0xbbbbbbbb
+	mov ebx,a32 rel qword es:0xbbbbbbbb
+	mov rax,a32 rel qword es:0xbbbbbbbb
+	mov rbx,a32 rel qword es:0xbbbbbbbb
+	mov al,a32 rel qword es:0xffffffffcccccccc
+	mov bl,a32 rel qword es:0xffffffffcccccccc
+	mov ax,a32 rel qword es:0xffffffffcccccccc
+	mov bx,a32 rel qword es:0xffffffffcccccccc
+	mov eax,a32 rel qword es:0xffffffffcccccccc
+	mov ebx,a32 rel qword es:0xffffffffcccccccc
+	mov rax,a32 rel qword es:0xffffffffcccccccc
+	mov rbx,a32 rel qword es:0xffffffffcccccccc
+
+
+foo:

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/riprel.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/riprel.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/riprel.stderr Added

@@ -0,0 +1,11920 @@
+./travis/test/riprel.asm:15: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:15: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:16: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:16: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:17: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:17: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:18: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:18: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:19: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:19: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:20: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:20: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:21: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:21: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:22: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:22: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:23: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:23: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:24: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:24: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:25: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:25: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:26: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:26: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:27: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:27: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:28: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:28: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:29: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:29: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:30: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:30: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:48: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:48: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:49: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:49: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:50: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:50: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:51: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:51: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:52: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:52: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:53: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:53: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:54: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:54: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:55: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:55: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:56: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:56: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:57: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:57: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:58: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:58: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:59: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:59: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:60: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:60: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:61: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:61: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:62: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:62: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:63: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:63: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:74: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:74: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:76: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:76: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:78: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:78: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:80: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:80: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:82: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:82: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:82: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:82: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:84: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:84: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:84: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:84: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:86: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:86: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:86: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:86: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:88: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:88: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:88: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:88: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:90: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:90: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:90: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:90: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:92: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:92: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:92: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:92: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:94: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:94: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:94: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:94: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:96: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:96: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:96: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:96: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:98: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:98: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:100: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:100: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:102: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:102: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:104: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:104: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:114: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:114: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:115: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:115: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:116: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:116: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:117: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:117: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:118: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:118: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:119: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:119: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:120: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:120: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:121: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:121: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:122: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:122: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:123: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:123: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:124: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:124: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:125: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:125: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:126: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:126: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:127: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:127: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:128: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:128: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:129: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:129: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:147: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:147: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:148: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:148: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:149: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:149: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:150: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:150: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:151: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:151: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:152: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:152: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:153: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:153: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:154: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:154: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:155: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:155: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:156: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:156: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:157: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:157: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:158: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:158: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:159: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:159: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:160: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:160: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:161: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:161: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:162: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:162: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:173: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:173: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:175: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:175: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:177: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:177: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:179: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:179: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:181: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:181: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:181: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:181: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:183: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:183: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:183: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:183: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:185: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:185: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:185: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:185: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:187: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:187: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:187: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:187: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:189: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:189: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:189: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:189: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:191: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:191: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:191: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:191: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:193: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:193: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:193: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:193: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:195: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:195: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:195: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:195: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:197: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:197: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:199: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:199: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:201: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:201: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:203: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:203: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:213: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:214: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:214: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:215: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:216: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:216: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:217: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:218: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:218: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:219: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:220: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:220: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:246: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:247: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:247: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:248: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:249: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:249: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:250: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:251: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:251: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:252: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:253: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:253: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:271: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:271: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:272: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:272: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:273: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:273: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:274: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:274: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:275: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:275: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:276: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:276: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:277: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:277: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:278: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:278: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:279: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:279: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:279: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:279: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:280: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:280: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:280: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:280: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:281: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:281: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:281: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:281: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:282: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:282: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:282: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:282: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:283: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:283: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:283: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:283: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:284: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:284: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:284: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:284: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:285: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:285: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:285: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:285: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:286: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:286: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:286: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:286: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:287: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:287: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:288: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:288: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:289: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:289: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:290: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:290: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:291: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:291: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:292: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:292: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:293: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:293: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:294: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:294: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:295: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:295: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:296: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:296: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:297: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:297: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:298: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:298: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:299: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:299: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:300: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:300: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:301: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:301: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:302: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:302: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:312: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:312: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:313: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:313: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:314: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:314: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:315: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:315: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:316: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:316: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:317: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:317: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:318: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:318: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:319: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:319: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:320: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:320: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:321: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:321: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:322: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:322: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:323: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:323: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:324: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:324: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:325: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:325: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:326: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:326: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:327: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:327: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:345: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:345: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:346: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:346: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:347: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:347: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:348: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:348: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:349: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:349: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:350: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:350: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:351: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:351: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:352: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:352: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:353: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:353: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:354: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:354: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:355: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:355: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:356: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:356: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:357: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:357: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:358: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:358: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:359: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:359: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:360: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:360: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:371: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:371: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:373: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:373: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:375: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:375: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:377: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:377: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:379: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:379: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:379: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:379: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:381: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:381: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:381: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:381: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:383: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:383: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:383: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:383: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:385: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:385: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:385: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:385: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:387: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:387: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:387: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:387: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:389: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:389: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:389: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:389: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:391: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:391: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:391: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:391: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:393: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:393: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:393: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:393: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:395: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:395: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:397: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:397: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:399: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:399: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:401: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:401: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:411: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:411: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:412: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:412: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:413: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:413: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:414: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:414: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:415: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:415: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:416: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:416: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:417: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:417: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:418: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:418: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:419: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:419: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:420: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:420: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:421: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:421: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:422: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:422: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:423: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:423: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:424: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:424: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:425: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:425: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:426: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:426: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:444: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:444: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:445: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:445: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:446: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:446: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:447: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:447: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:448: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:448: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:449: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:449: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:450: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:450: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:451: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:451: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:452: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:452: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:453: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:453: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:454: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:454: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:455: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:455: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:456: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:456: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:457: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:457: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:458: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:458: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:459: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:459: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:470: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:470: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:472: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:472: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:474: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:474: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:476: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:476: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:478: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:478: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:478: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:478: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:480: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:480: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:480: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:480: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:482: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:482: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:482: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:482: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:484: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:484: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:484: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:484: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:486: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:486: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:486: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:486: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:488: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:488: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:488: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:488: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:490: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:490: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:490: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:490: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:492: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:492: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:492: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:492: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:494: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:494: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:496: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:496: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:498: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:498: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:500: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:500: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:510: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:511: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:511: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:512: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:513: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:513: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:514: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:515: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:515: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:516: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:517: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:517: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:543: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:544: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:544: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:545: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:546: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:546: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:547: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:548: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:548: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:549: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:550: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:550: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:568: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:568: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:569: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:569: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:570: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:570: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:571: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:571: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:572: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:572: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:573: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:573: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:574: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:574: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:575: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:575: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:576: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:576: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:576: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:576: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:577: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:577: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:577: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:577: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:578: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:578: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:578: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:578: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:579: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:579: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:579: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:579: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:580: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:580: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:580: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:580: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:581: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:581: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:581: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:581: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:582: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:582: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:582: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:582: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:583: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:583: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:583: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:583: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:584: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:584: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:585: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:585: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:586: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:586: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:587: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:587: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:588: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:588: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:589: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:589: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:590: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:590: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:591: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:591: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:592: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:592: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:593: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:593: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:594: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:594: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:595: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:595: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:596: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:596: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:597: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:597: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:598: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:598: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:599: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:599: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:609: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:609: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:609: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:610: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:610: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:610: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:611: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:611: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:611: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:612: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:612: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:612: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:613: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:613: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:613: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:614: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:614: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:614: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:615: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:615: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:615: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:616: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:616: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:616: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:617: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:617: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:617: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:618: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:618: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:618: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:619: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:619: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:619: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:620: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:620: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:620: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:621: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:621: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:621: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:622: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:622: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:622: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:623: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:623: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:623: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:624: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:624: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:624: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:625: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:626: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:627: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:628: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:629: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:630: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:631: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:632: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:642: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:642: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:642: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:643: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:643: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:643: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:644: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:644: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:644: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:645: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:645: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:645: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:646: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:646: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:646: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:647: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:647: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:647: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:648: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:648: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:648: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:649: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:649: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:649: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:650: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:650: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:650: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:651: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:651: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:651: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:652: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:652: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:652: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:653: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:653: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:653: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:654: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:654: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:654: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:655: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:655: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:655: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:656: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:656: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:656: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:657: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:657: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:657: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:658: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:659: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:660: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:661: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:662: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:663: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:664: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:665: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:667: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:667: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:668: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:668: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:669: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:669: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:670: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:670: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:671: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:671: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:672: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:672: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:673: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:673: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:674: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:674: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:675: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:675: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:675: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:675: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:675: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:676: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:676: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:676: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:676: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:676: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:677: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:677: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:677: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:677: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:677: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:678: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:678: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:678: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:678: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:678: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:679: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:679: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:679: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:679: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:679: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:680: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:680: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:680: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:680: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:680: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:681: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:681: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:681: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:681: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:681: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:682: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:682: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:682: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:682: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:682: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:683: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:683: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:683: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:683: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:683: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:684: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:684: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:684: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:684: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:684: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:685: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:685: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:685: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:685: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:685: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:686: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:686: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:686: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:686: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:686: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:687: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:687: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:687: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:687: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:687: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:688: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:688: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:688: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:688: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:688: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:689: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:689: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:689: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:689: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:689: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:690: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:690: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:690: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:690: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:690: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:691: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:691: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:691: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:692: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:692: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:692: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:693: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:693: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:693: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:694: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:694: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:694: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:695: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:695: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:695: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:696: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:696: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:696: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:697: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:697: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:697: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:698: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:698: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:698: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:708: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:708: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:708: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:709: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:709: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:709: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:710: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:710: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:710: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:711: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:711: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:711: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:712: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:712: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:712: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:713: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:713: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:713: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:714: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:714: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:714: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:715: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:715: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:715: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:716: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:716: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:716: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:717: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:717: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:717: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:718: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:718: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:718: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:719: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:719: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:719: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:720: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:720: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:720: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:721: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:721: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:721: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:722: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:722: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:722: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:723: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:723: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:723: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:724: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:725: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:726: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:727: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:728: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:729: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:730: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:731: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:741: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:741: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:741: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:742: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:742: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:742: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:743: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:743: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:743: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:744: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:744: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:744: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:745: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:745: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:745: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:746: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:746: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:746: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:747: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:747: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:747: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:748: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:748: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:748: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:749: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:749: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:749: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:750: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:750: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:750: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:751: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:751: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:751: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:752: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:752: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:752: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:753: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:753: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:753: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:754: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:754: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:754: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:755: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:755: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:755: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:756: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:756: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:756: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:757: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:758: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:759: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:760: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:761: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:762: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:763: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:764: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:766: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:766: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:767: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:767: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:768: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:768: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:769: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:769: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:770: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:770: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:771: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:771: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:772: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:772: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:773: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:773: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:774: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:774: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:774: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:774: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:774: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:775: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:775: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:775: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:775: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:775: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:776: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:776: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:776: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:776: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:776: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:777: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:777: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:777: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:777: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:777: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:778: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:778: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:778: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:778: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:778: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:779: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:779: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:779: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:779: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:779: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:780: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:780: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:780: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:780: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:780: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:781: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:781: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:781: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:781: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:781: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:782: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:782: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:782: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:782: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:782: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:783: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:783: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:783: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:783: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:783: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:784: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:784: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:784: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:784: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:784: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:785: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:785: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:785: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:785: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:785: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:786: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:786: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:786: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:786: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:786: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:787: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:787: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:787: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:787: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:787: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:788: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:788: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:788: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:788: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:788: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:789: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:789: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:789: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:789: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:789: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:790: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:790: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:790: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:791: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:791: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:791: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:792: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:792: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:792: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:793: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:793: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:793: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:794: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:794: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:794: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:795: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:795: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:795: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:796: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:796: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:796: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:797: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:797: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:797: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:807: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:807: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:807: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:808: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:808: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:808: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:809: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:809: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:809: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:810: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:810: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:810: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:811: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:811: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:811: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:812: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:812: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:812: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:813: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:813: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:813: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:814: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:814: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:814: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:815: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:816: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:817: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:818: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:819: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:820: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:821: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:822: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:823: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:824: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:825: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:826: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:827: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:828: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:829: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:830: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:840: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:840: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:840: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:841: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:841: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:841: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:842: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:842: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:842: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:843: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:843: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:843: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:844: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:844: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:844: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:845: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:845: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:845: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:846: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:846: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:846: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:847: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:847: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:847: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:848: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:849: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:850: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:851: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:852: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:853: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:854: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:855: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:856: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:857: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:858: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:859: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:860: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:861: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:862: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:863: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:865: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:865: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:866: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:866: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:867: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:867: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:868: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:868: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:869: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:869: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:870: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:870: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:871: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:871: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:872: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:872: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:873: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:873: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:873: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:873: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:873: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:874: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:874: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:874: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:874: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:874: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:875: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:875: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:875: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:875: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:875: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:876: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:876: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:876: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:876: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:876: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:877: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:877: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:877: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:877: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:877: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:878: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:878: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:878: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:878: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:878: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:879: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:879: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:879: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:879: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:879: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:880: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:880: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:880: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:880: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:880: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:881: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:881: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:881: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:882: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:882: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:882: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:883: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:883: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:883: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:884: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:884: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:884: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:885: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:885: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:885: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:886: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:886: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:886: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:887: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:887: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:887: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:888: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:888: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:888: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:889: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:889: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:889: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:890: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:890: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:890: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:891: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:891: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:891: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:892: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:892: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:892: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:893: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:893: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:893: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:894: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:894: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:894: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:895: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:895: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:895: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:896: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:896: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:896: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:906: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:906: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:907: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:907: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:908: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:908: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:909: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:909: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:910: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:910: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:911: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:911: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:912: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:912: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:913: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:913: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:914: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:914: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:915: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:915: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:916: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:916: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:917: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:917: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:918: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:918: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:919: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:919: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:920: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:920: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:921: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:921: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:939: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:939: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:940: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:940: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:941: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:941: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:942: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:942: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:943: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:943: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:944: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:944: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:945: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:945: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:946: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:946: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:947: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:947: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:948: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:948: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:949: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:949: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:950: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:950: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:951: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:951: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:952: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:952: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:953: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:953: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:954: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:954: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:965: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:965: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:967: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:967: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:969: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:969: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:971: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:971: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:973: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:973: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:973: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:973: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:975: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:975: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:975: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:975: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:977: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:977: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:977: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:977: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:979: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:979: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:979: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:979: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:981: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:981: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:981: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:981: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:983: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:983: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:983: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:983: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:985: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:985: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:985: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:985: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:987: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:987: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:987: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:987: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:989: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:989: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:991: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:991: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:993: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:993: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:995: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:995: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1005: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1005: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1006: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1006: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1007: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1007: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1008: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1008: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1009: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1009: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1010: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1010: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1011: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1011: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1012: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1012: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1013: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1013: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1014: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1014: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1015: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1015: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1016: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1016: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1017: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1017: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1018: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1018: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1019: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1019: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1020: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1020: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1038: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1038: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1039: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1039: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1040: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1040: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1041: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1041: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1042: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1042: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1043: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1043: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1044: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1044: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1045: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1045: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1046: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1046: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1047: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1047: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1048: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1048: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1049: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1049: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1050: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1050: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1051: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1051: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1052: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1052: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1053: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1053: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1064: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1064: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1066: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1066: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1068: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1068: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1070: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1070: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1072: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1072: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1072: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1072: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1074: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1074: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1074: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1074: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1076: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1076: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1076: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1076: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1078: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1078: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1078: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1078: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1080: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1080: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1080: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1080: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1082: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1082: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1082: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1082: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1084: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1084: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1084: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1084: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1086: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1086: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1086: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1086: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1088: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1088: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1090: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1090: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1092: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1092: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1094: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1094: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1104: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1105: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1105: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1106: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1107: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1107: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1108: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1109: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1109: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1110: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1111: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1111: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1137: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1138: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1138: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1139: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1140: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1140: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1141: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1142: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1142: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1143: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1144: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1144: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1162: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1162: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1163: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1163: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1164: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1164: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1165: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1165: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1166: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1166: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1167: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1167: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1168: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1168: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1169: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1169: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1170: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1170: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1170: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1170: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1171: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1171: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1171: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1171: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1172: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1172: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1172: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1172: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1173: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1173: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1173: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1173: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1174: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1174: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1174: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1174: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1175: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1175: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1175: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1175: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1176: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1176: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1176: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1176: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1177: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1177: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1177: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1177: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1178: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1178: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1179: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1179: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1180: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1180: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1181: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1181: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1182: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1182: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1183: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1183: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1184: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1184: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1185: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1185: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1186: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1186: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1187: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1187: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1188: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1188: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1189: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1189: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1190: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1190: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1191: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1191: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1192: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1192: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1193: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1193: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1203: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1203: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1204: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1204: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1205: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1205: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1206: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1206: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1207: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1207: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1208: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1208: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1209: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1209: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1210: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1210: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1211: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1211: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1212: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1212: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1213: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1213: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1214: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1214: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1215: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1215: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1216: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1216: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1217: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1217: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1218: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1218: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1236: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1236: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1237: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1237: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1238: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1238: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1239: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1239: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1240: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1240: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1241: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1241: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1242: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1242: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1243: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1243: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1244: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1244: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1245: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1245: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1246: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1246: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1247: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1247: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1248: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1248: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1249: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1249: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1250: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1250: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1251: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1251: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1262: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1262: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1264: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1264: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1266: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1266: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1268: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1268: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1270: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1270: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1270: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1270: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1272: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1272: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1272: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1272: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1274: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1274: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1274: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1274: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1276: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1276: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1276: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1276: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1278: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1278: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1278: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1278: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1280: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1280: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1280: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1280: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1282: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1282: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1282: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1282: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1284: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1284: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1284: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1284: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1286: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1286: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1288: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1288: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1290: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1290: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1292: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1292: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1302: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1302: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1303: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1303: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1304: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1304: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1305: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1305: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1306: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1306: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1307: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1307: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1308: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1308: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1309: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1309: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1310: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1310: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1311: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1311: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1312: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1312: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1313: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1313: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1314: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1314: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1315: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1315: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1316: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1316: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1317: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1317: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1335: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1335: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1336: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1336: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1337: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1337: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1338: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1338: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1339: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1339: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1340: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1340: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1341: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1341: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1342: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1342: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1343: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1343: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1344: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1344: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1345: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1345: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1346: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1346: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1347: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1347: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1348: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1348: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1349: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1349: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1350: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1350: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1361: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1361: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1363: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1363: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1365: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1365: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1367: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1367: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1369: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1369: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1369: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1369: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1371: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1371: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1371: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1371: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1373: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1373: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1373: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1373: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1375: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1375: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1375: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1375: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1377: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1377: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1377: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1377: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1379: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1379: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1379: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1379: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1381: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1381: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1381: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1381: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1383: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1383: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1383: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1383: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1385: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1385: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1387: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1387: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1389: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1389: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1391: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1391: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1401: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1402: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1402: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1403: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1404: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1404: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1405: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1406: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1406: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1407: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1408: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1408: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1434: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1435: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1435: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1436: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1437: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1437: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1438: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1439: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1439: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1440: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1441: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1441: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1459: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1459: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1460: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1460: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1461: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1461: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1462: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1462: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1463: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1463: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1464: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1464: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1465: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1465: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1466: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1466: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1467: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1467: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1467: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1467: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1468: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1468: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1468: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1468: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1469: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1469: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1469: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1469: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1470: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1470: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1470: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1470: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1471: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1471: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1471: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1471: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1472: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1472: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1472: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1472: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1473: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1473: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1473: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1473: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1474: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1474: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1474: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1474: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1475: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1475: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1476: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1476: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1477: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1477: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1478: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1478: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1479: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1479: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1480: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1480: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1481: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1481: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1482: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1482: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1483: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1483: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1484: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1484: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1485: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1485: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1486: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1486: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1487: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1487: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1488: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1488: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1489: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1489: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1490: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1490: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1500: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1500: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1500: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1501: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1501: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1501: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1502: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1502: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1502: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1503: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1503: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1503: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1504: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1504: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1504: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1505: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1505: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1505: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1506: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1506: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1506: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1507: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1507: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1507: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1508: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1508: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1508: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1509: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1509: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1509: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1510: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1510: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1510: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1511: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1511: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1511: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1512: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1512: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1512: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1513: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1513: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1513: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1514: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1514: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1514: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1515: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1515: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1515: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1516: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1517: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1518: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1519: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1520: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1521: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1522: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1523: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1533: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1533: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1533: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1534: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1534: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1534: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1535: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1535: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1535: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1536: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1536: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1536: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1537: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1537: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1537: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1538: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1538: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1538: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1539: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1539: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1539: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1540: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1540: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1540: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1541: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1541: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1541: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1542: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1542: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1542: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1543: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1543: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1543: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1544: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1544: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1544: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1545: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1545: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1545: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1546: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1546: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1546: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1547: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1547: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1547: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1548: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1548: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1548: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1549: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1550: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1551: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1552: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1553: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1554: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1555: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1556: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1558: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1558: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1559: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1559: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1560: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1560: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1561: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1561: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1562: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1562: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1563: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1563: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1564: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1564: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1565: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1565: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1566: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1566: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1566: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1566: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1566: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1567: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1567: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1567: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1567: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1567: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1568: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1568: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1568: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1568: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1568: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1569: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1569: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1569: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1569: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1569: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1570: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1570: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1570: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1570: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1570: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1571: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1571: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1571: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1571: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1571: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1572: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1572: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1572: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1572: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1572: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1573: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1573: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1573: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1573: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1573: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1574: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1574: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1574: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1574: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1574: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1575: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1575: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1575: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1575: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1575: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1576: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1576: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1576: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1576: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1576: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1577: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1577: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1577: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1577: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1577: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1578: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1578: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1578: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1578: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1578: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1579: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1579: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1579: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1579: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1579: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1580: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1580: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1580: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1580: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1580: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1581: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1581: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1581: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1581: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1581: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1582: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1582: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1582: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1583: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1583: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1583: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1584: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1584: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1584: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1585: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1585: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1585: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1586: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1586: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1586: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1587: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1587: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1587: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1588: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1588: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1588: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1589: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1589: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1589: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1599: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1599: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1599: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1600: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1600: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1600: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1601: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1601: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1601: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1602: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1602: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1602: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1603: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1603: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1603: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1604: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1604: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1604: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1605: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1605: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1605: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1606: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1606: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1606: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1607: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1607: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1607: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1608: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1608: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1608: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1609: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1609: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1609: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1610: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1610: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1610: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1611: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1611: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1611: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1612: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1612: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1612: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1613: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1613: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1613: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1614: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1614: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1614: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1615: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1616: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1617: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1618: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1619: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1620: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1621: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1622: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1632: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1632: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1632: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1633: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1633: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1633: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1634: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1634: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1634: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1635: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1635: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1635: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1636: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1636: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1636: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1637: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1637: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1637: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1638: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1638: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1638: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1639: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1639: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1639: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1640: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1640: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1640: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1641: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1641: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1641: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1642: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1642: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1642: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1643: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1643: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1643: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1644: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1644: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1644: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1645: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1645: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1645: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1646: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1646: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1646: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1647: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1647: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1647: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1648: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1649: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1650: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1651: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1652: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1653: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1654: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1655: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1657: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1657: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1658: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1658: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1659: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1659: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1660: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1660: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1661: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1661: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1662: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1662: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1663: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1663: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1664: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1664: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1665: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1665: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1665: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1665: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1665: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1666: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1666: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1666: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1666: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1666: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1667: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1667: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1667: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1667: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1667: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1668: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1668: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1668: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1668: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1668: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1669: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1669: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1669: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1669: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1669: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1670: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1670: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1670: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1670: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1670: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1671: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1671: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1671: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1671: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1671: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1672: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1672: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1672: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1672: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1672: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1673: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1673: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1673: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1673: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1673: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1674: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1674: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1674: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1674: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1674: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1675: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1675: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1675: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1675: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1675: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1676: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1676: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1676: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1676: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1676: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1677: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1677: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1677: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1677: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1677: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1678: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1678: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1678: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1678: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1678: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1679: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1679: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1679: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1679: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1679: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1680: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1680: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1680: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1680: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1680: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1681: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1681: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1681: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1682: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1682: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1682: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1683: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1683: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1683: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1684: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1684: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1684: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1685: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1685: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1685: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1686: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1686: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1686: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1687: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1687: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1687: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1688: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1688: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1688: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1698: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1698: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1698: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1699: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1699: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1699: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1700: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1700: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1700: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1701: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1701: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1701: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1702: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1702: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1702: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1703: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1703: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1703: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1704: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1704: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1704: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1705: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1705: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1705: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1706: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1707: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1708: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1709: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1710: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1711: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1712: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1713: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1714: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1715: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1716: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1717: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1718: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1719: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1720: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1721: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1731: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1731: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1731: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1732: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1732: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1732: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1733: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1733: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1733: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1734: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1734: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1734: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1735: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1735: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1735: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1736: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1736: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1736: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1737: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1737: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1737: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1738: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1738: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1738: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1739: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1740: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1741: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1742: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1743: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1744: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1745: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1746: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1747: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1748: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1749: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1750: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1751: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1752: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1753: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1754: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1756: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1756: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1757: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1757: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1758: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1758: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1759: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1759: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1760: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1760: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1761: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1761: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1762: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1762: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1763: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1763: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1764: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1764: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1764: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1764: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1764: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1765: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1765: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1765: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1765: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1765: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1766: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1766: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1766: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1766: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1766: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1767: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1767: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1767: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1767: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1767: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1768: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1768: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1768: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1768: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1768: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1769: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1769: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1769: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1769: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1769: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1770: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1770: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1770: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1770: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1770: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1771: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1771: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1771: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1771: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1771: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1772: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1772: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1772: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1773: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1773: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1773: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1774: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1774: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1774: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1775: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1775: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1775: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1776: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1776: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1776: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1777: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1777: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1777: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1778: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1778: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1778: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1779: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1779: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1779: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1780: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1780: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1780: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1781: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1781: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1781: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1782: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1782: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1782: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1783: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1783: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1783: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1784: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1784: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1784: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1785: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1785: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1785: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1786: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1786: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1786: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1787: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:1787: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1787: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1789: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1789: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1790: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1790: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1791: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1791: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1792: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1792: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1793: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1793: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1794: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1794: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1795: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1795: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1796: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1796: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1797: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1797: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1797: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1797: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1798: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1798: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1798: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1798: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1799: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1799: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1799: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1799: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1800: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1800: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1800: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1800: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1801: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1801: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1801: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1801: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1802: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1802: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1802: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1802: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1803: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1803: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1803: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1803: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1804: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1804: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1804: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1804: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1805: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1805: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1805: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1805: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1806: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1806: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1806: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1806: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1807: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1807: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1807: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1807: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1808: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1808: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1808: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1808: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1809: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1809: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1809: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1809: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1810: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1810: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1810: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1810: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1811: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1811: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1811: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1811: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1812: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1812: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1812: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1812: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1813: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1813: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1814: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1814: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1815: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1815: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1816: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1816: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1817: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1817: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1818: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1818: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1819: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1819: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1820: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1820: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1822: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1822: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1823: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1823: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1824: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1824: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1825: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1825: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1826: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1826: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1827: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1827: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1828: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1828: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1829: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1829: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1830: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1830: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1830: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1830: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1831: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1831: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1831: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1831: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1832: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1832: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1832: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1832: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1833: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1833: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1833: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1833: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1834: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1834: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1834: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1834: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1835: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1835: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1835: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1835: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1836: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1836: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1836: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1836: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1837: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1837: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1837: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1837: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1838: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1838: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1838: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1838: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1839: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1839: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1839: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1839: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1840: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1840: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1840: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1840: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1841: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1841: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1841: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1841: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1842: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1842: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1842: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1842: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1843: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1843: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1843: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1843: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1844: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1844: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1844: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1844: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1845: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1845: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1845: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1845: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1846: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1846: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1847: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1847: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1848: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1848: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1849: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1849: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1850: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1850: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1851: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1851: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1852: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1852: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1853: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1853: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1855: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1855: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1856: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1856: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1856: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1856: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1857: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1857: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1858: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1858: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1858: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1858: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1859: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1859: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1860: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1860: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1860: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1860: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1861: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1861: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1862: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1862: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1862: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1862: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1863: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1863: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1864: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1864: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1864: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1864: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1864: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1864: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1865: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1865: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1866: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1866: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1866: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1866: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1866: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1866: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1867: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1867: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1868: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1868: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1868: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1868: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1868: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1868: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1869: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1869: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1870: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1870: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1870: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1870: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1870: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1870: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1871: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1871: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1872: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1872: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1872: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1872: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1872: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1872: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1873: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1873: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1874: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1874: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1874: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1874: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1874: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1874: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1875: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1875: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1876: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1876: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1876: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1876: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1876: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1876: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1877: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1877: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1878: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1878: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1878: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1878: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1878: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1878: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1879: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1879: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1880: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1880: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1880: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1880: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1881: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1881: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1882: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1882: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1882: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1882: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1883: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1883: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1884: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1884: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1884: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1884: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1885: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1885: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1886: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1886: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1886: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1886: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1888: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1888: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1889: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1889: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1890: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1890: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1891: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1891: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1892: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1892: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1893: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1893: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1894: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1894: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1895: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1895: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1896: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1896: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1896: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1896: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1897: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1897: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1897: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1897: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1898: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1898: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1898: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1898: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1899: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1899: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1899: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1899: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1900: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1900: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1900: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1900: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1901: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1901: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1901: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1901: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1902: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1902: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1902: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1902: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1903: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1903: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1903: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1903: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1904: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1904: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1904: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1904: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1905: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1905: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1905: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1905: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1906: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1906: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1906: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1906: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1907: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1907: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1907: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1907: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1908: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1908: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1908: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1908: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1909: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1909: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1909: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1909: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1910: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1910: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1910: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1910: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1911: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1911: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1911: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1911: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1912: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1912: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1913: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1913: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1914: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1914: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1915: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1915: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1916: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1916: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1917: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1917: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1918: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1918: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1919: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1919: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1921: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1921: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1922: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1922: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1923: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1923: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1924: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1924: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1925: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1925: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1926: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1926: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1927: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1927: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1928: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1928: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1929: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1929: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1929: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1929: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1930: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1930: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1930: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1930: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1931: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1931: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1931: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1931: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1932: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1932: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1932: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1932: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1933: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1933: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1933: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1933: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1934: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1934: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1934: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1934: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1935: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1935: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1935: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1935: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1936: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1936: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1936: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1936: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1937: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1937: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1937: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1937: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1938: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1938: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1938: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1938: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1939: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1939: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1939: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1939: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1940: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1940: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1940: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1940: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1941: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1941: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1941: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1941: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1942: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1942: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1942: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1942: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1943: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1943: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1943: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1943: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1944: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1944: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1944: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1944: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1945: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1945: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1946: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1946: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1947: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1947: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1948: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1948: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1949: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1949: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1950: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1950: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1951: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1951: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1952: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1952: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1954: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1954: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1955: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1955: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1955: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1955: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1956: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1956: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1957: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1957: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1957: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1957: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1958: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1958: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1959: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1959: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1959: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1959: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1960: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1960: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1961: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1961: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1961: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1961: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1962: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1962: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1963: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1963: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1963: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1963: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1963: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1963: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1964: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1964: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1965: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1965: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1965: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1965: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1965: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1965: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1966: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1966: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1967: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1967: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1967: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1967: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1967: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1967: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1968: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1968: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1969: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1969: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1969: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1969: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1969: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1969: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1970: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1970: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1971: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1971: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1971: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1971: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1971: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1971: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1972: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1972: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1973: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1973: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1973: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1973: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1973: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1973: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1974: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1974: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1975: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1975: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1975: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1975: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1975: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1975: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1976: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1976: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1977: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1977: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1977: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1977: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1977: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1977: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1978: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1978: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1979: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1979: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1979: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1979: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1980: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1980: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1981: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1981: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1981: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1981: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1982: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1982: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1983: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1983: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1983: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1983: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1984: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1984: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1985: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1985: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1985: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1985: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:1987: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1987: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1988: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1988: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1989: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1989: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1990: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1990: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1991: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1991: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1992: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1992: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1993: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1993: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1994: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1994: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1995: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1995: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1995: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1996: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1996: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1996: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1996: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1997: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1997: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1997: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1998: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1998: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1998: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1998: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:1999: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1999: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:1999: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2000: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2000: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2000: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2000: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2001: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2001: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2001: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2002: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2002: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2002: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2002: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2003: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2003: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2004: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2004: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2005: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2005: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2006: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2006: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2007: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2007: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2008: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2008: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2009: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2009: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2010: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2010: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2011: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2011: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2012: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2012: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2013: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2013: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2014: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2014: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2015: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2015: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2016: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2016: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2017: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2017: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2018: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2018: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2020: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2020: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2021: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2021: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2022: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2022: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2023: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2023: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2024: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2024: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2025: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2025: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2026: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2026: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2027: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2027: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2028: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2028: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2028: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2029: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2029: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2029: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2029: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2030: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2030: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2030: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2031: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2031: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2031: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2031: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2032: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2032: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2032: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2033: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2033: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2033: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2033: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2034: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2034: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2034: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2035: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2035: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2035: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2035: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2036: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2036: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2037: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2037: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2038: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2038: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2039: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2039: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2040: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2040: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2041: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2041: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2042: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2042: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2043: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2043: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2044: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2044: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2045: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2045: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2046: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2046: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2047: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2047: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2048: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2048: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2049: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2049: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2050: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2050: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2051: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2051: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2053: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2053: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2053: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2053: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2054: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2054: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2054: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2054: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2055: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2055: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2055: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2055: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2056: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2056: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2056: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2056: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2057: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2057: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2057: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2057: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2058: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2058: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2058: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2058: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2059: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2059: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2059: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2059: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2060: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2060: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2060: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2060: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2061: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2061: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2061: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2061: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2061: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2061: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2062: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2062: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2062: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2062: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2062: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2062: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2063: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2063: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2063: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2063: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2063: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2063: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2064: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2064: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2064: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2064: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2064: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2064: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2065: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2065: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2065: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2065: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2065: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2065: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2066: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2066: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2066: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2066: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2066: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2066: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2067: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2067: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2067: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2067: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2067: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2067: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2068: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2068: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2068: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2068: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2068: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2068: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2069: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2069: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2069: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2069: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2070: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2070: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2070: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2070: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2071: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2071: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2071: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2071: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2072: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2072: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2072: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2072: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2073: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2073: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2073: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2073: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2074: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2074: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2074: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2074: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2075: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2075: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2075: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2075: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2076: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2076: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2076: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2076: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2077: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2077: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2077: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2077: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2078: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2078: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2078: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2078: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2079: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2079: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2079: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2079: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2080: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2080: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2080: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2080: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2081: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2081: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2081: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2081: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2082: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2082: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2082: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2082: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2083: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2083: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2083: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2083: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2084: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2084: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2084: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2084: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2086: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2086: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2087: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2087: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2088: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2088: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2089: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2089: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2090: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2090: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2091: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2091: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2092: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2092: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2093: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2093: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2094: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2094: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2094: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2094: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2095: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2095: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2095: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2095: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2096: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2096: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2096: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2096: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2097: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2097: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2097: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2097: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2098: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2098: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2098: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2098: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2099: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2099: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2099: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2099: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2100: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2100: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2100: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2100: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2101: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2101: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2101: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2101: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2102: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2102: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2102: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2102: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2103: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2103: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2103: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2103: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2104: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2104: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2104: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2104: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2105: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2105: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2105: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2105: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2106: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2106: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2106: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2106: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2107: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2107: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2107: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2107: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2108: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2108: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2108: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2108: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2109: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2109: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2109: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2109: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2110: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2110: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2111: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2111: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2112: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2112: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2113: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2113: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2114: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2114: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2115: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2115: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2116: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2116: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2117: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2117: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2119: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2119: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2120: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2120: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2121: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2121: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2122: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2122: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2123: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2123: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2124: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2124: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2125: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2125: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2126: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2126: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2127: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2127: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2127: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2127: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2128: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2128: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2128: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2128: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2129: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2129: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2129: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2129: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2130: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2130: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2130: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2130: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2131: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2131: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2131: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2131: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2132: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2132: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2132: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2132: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2133: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2133: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2133: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2133: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2134: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2134: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2134: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2134: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2135: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2135: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2135: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2135: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2136: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2136: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2136: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2136: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2137: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2137: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2137: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2137: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2138: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2138: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2138: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2138: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2139: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2139: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2139: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2139: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2140: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2140: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2140: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2140: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2141: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2141: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2141: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2141: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2142: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2142: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2142: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2142: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2143: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2143: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2144: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2144: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2145: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2145: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2146: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2146: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2147: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2147: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2148: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2148: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2149: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2149: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2150: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2150: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2152: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2152: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2153: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2153: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2153: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2153: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2154: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2154: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2155: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2155: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2155: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2155: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2156: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2156: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2157: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2157: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2157: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2157: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2158: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2158: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2159: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2159: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2159: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2159: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2160: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2160: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2161: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2161: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2161: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2161: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2161: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2161: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2162: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2162: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2163: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2163: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2163: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2163: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2163: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2163: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2164: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2164: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2165: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2165: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2165: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2165: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2165: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2165: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2166: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2166: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2167: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2167: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2167: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2167: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2167: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2167: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2168: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2168: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2169: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2169: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2169: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2169: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2169: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2169: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2170: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2170: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2171: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2171: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2171: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2171: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2171: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2171: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2172: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2172: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2173: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2173: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2173: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2173: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2173: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2173: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2174: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2174: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2175: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2175: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2175: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2175: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2175: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2175: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2176: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2176: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2177: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2177: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2177: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2177: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2178: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2178: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2179: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2179: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2179: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2179: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2180: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2180: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2181: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2181: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2181: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2181: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2182: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2182: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2183: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2183: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2183: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2183: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2185: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2185: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2186: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2186: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2187: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2187: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2188: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2188: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2189: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2189: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2190: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2190: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2191: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2191: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2192: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2192: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2193: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2193: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2193: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2193: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2194: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2194: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2194: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2194: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2195: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2195: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2195: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2195: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2196: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2196: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2196: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2196: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2197: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2197: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2197: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2197: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2198: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2198: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2198: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2198: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2199: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2199: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2199: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2199: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2200: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2200: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2200: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2200: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2201: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2201: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2201: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2201: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2202: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2202: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2202: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2202: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2203: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2203: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2203: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2203: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2204: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2204: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2204: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2204: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2205: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2205: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2205: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2205: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2206: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2206: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2206: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2206: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2207: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2207: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2207: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2207: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2208: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2208: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2208: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2208: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2209: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2209: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2210: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2210: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2211: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2211: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2212: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2212: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2213: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2213: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2214: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2214: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2215: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2215: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2216: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2216: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2218: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2218: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2219: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2219: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2220: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2220: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2221: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2221: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2222: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2222: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2223: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2223: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2224: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2224: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2225: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2225: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2226: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2226: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2226: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2226: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2227: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2227: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2227: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2227: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2228: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2228: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2228: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2228: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2229: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2229: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2229: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2229: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2230: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2230: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2230: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2230: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2231: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2231: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2231: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2231: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2232: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2232: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2232: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2232: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2233: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2233: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2233: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2233: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2234: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2234: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2234: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2234: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2235: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2235: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2235: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2235: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2236: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2236: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2236: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2236: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2237: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2237: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2237: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2237: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2238: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2238: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2238: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2238: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2239: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2239: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2239: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2239: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2240: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2240: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2240: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2240: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2241: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2241: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2241: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2241: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2242: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2242: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2243: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2243: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2244: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2244: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2245: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2245: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2246: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2246: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2247: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2247: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2248: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2248: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2249: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2249: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2251: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2251: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2252: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2252: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2252: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2252: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2253: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2253: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2254: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2254: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2254: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2254: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2255: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2255: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2256: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2256: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2256: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2256: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2257: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2257: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2258: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2258: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2258: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2258: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2259: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2259: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2260: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2260: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2260: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2260: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2260: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2260: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2261: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2261: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2262: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2262: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2262: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2262: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2262: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2262: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2263: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2263: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2264: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2264: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2264: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2264: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2264: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2264: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2265: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2265: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2266: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2266: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2266: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2266: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2266: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2266: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2267: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2267: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2268: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2268: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2268: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2268: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2268: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2268: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2269: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2269: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2270: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2270: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2270: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2270: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2270: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2270: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2271: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2271: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2272: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2272: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2272: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2272: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2272: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2272: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2273: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2273: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2274: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2274: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2274: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2274: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2274: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2274: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2275: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2275: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2276: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2276: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2276: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2276: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2277: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2277: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2278: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2278: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2278: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2278: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2279: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2279: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2280: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2280: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2280: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2280: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2281: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2281: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2282: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2282: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2282: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2282: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2284: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2284: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2285: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2285: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2286: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2286: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2287: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2287: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2288: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2288: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2289: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2289: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2290: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2290: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2291: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2291: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2292: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2292: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2292: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2293: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2293: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2293: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2293: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2294: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2294: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2294: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2295: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2295: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2295: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2295: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2296: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2296: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2296: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2297: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2297: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2297: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2297: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2298: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2298: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2298: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2299: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2299: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2299: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2299: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2300: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2300: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2301: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2301: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2302: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2302: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2303: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2303: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2304: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2304: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2305: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2305: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2306: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2306: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2307: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2307: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2308: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2308: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2309: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2309: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2310: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2310: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2311: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2311: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2312: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2312: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2313: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2313: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2314: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2314: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2315: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2315: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2317: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2317: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2318: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2318: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2319: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2319: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2320: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2320: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2321: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2321: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2322: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2322: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2323: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2323: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2324: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2324: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2325: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2325: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2325: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2326: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2326: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2326: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2326: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2327: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2327: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2327: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2328: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2328: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2328: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2328: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2329: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2329: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2329: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2330: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2330: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2330: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2330: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2331: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2331: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2331: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2332: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2332: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2332: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2332: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2333: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2333: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2334: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2334: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2335: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2335: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2336: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2336: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2337: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2337: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2338: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2338: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2339: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2339: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2340: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2340: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2341: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2341: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2342: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2342: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2343: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2343: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2344: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2344: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2345: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2345: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2346: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2346: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2347: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2347: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2348: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2348: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2350: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2350: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2350: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2350: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2351: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2351: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2351: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2351: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2352: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2352: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2352: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2352: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2353: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2353: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2353: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2353: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2354: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2354: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2354: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2354: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2355: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2355: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2355: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2355: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2356: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2356: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2356: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2356: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2357: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2357: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2357: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2357: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2358: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2358: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2358: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2358: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2358: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2358: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2359: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2359: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2359: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2359: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2359: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2359: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2360: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2360: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2360: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2360: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2360: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2360: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2361: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2361: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2361: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2361: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2361: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2361: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2362: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2362: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2362: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2362: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2362: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2362: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2363: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2363: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2363: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2363: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2363: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2363: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2364: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2364: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2364: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2364: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2364: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2364: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2365: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2365: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2365: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2365: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2365: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2365: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2366: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2366: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2366: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2366: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2367: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2367: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2367: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2367: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2368: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2368: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2368: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2368: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2369: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2369: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2369: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2369: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2370: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2370: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2370: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2370: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2371: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2371: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2371: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2371: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2372: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2372: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2372: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2372: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2373: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2373: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2373: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2373: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2374: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2374: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2374: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2374: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2375: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2375: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2375: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2375: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2376: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2376: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2376: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2376: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2377: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2377: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2377: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2377: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2378: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2378: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2378: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2378: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2379: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2379: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2379: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2379: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2380: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2380: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2380: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2380: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2381: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2381: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2381: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2381: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2383: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2383: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2384: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2384: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2385: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2385: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2386: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2386: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2387: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2387: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2388: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2388: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2389: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2389: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2390: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2390: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2391: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2391: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2391: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2391: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2391: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2392: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2392: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2392: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2392: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2392: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2393: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2393: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2393: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2393: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2393: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2394: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2394: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2394: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2394: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2394: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2395: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2395: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2395: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2395: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2395: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2396: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2396: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2396: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2396: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2396: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2397: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2397: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2397: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2397: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2397: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2398: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2398: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2398: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2398: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2398: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2399: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2399: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2399: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2399: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2399: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2400: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2400: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2400: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2400: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2400: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2401: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2401: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2401: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2401: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2401: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2402: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2402: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2402: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2402: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2402: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2403: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2403: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2403: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2403: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2403: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2404: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2404: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2404: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2404: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2404: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2405: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2405: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2405: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2405: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2405: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2406: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2406: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2406: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2406: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2406: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2407: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2407: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2407: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2408: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2408: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2408: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2409: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2409: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2409: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2410: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2410: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2410: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2411: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2411: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2411: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2412: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2412: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2412: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2413: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2413: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2413: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2414: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2414: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2414: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2416: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2416: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2417: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2417: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2418: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2418: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2419: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2419: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2420: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2420: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2421: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2421: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2422: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2422: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2423: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2423: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2424: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2424: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2424: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2424: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2424: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2425: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2425: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2425: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2425: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2425: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2426: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2426: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2426: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2426: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2426: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2427: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2427: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2427: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2427: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2427: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2428: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2428: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2428: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2428: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2428: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2429: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2429: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2429: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2429: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2429: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2430: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2430: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2430: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2430: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2430: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2431: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2431: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2431: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2431: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2431: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2432: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2432: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2432: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2432: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2432: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2433: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2433: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2433: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2433: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2433: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2434: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2434: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2434: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2434: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2434: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2435: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2435: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2435: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2435: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2435: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2436: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2436: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2436: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2436: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2436: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2437: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2437: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2437: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2437: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2437: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2438: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2438: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2438: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2438: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2438: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2439: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2439: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2439: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2439: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2439: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2440: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2440: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2440: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2441: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2441: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2441: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2442: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2442: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2442: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2443: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2443: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2443: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2444: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2444: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2444: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2445: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2445: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2445: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2446: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2446: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2446: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2447: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2447: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2447: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2449: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2449: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2449: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2449: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2450: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2450: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2450: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2450: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2451: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2451: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2451: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2451: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2452: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2452: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2452: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2452: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2453: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2453: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2453: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2453: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2454: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2454: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2454: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2454: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2455: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2455: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2455: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2455: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2456: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2456: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2456: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2456: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2457: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2457: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2457: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2457: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2457: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2457: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2457: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2458: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2458: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2458: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2458: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2458: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2458: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2458: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2459: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2459: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2459: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2459: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2459: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2459: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2459: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2460: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2460: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2460: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2460: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2460: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2460: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2460: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2461: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2461: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2461: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2461: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2461: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2461: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2461: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2462: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2462: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2462: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2462: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2462: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2462: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2462: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2463: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2463: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2463: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2463: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2463: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2463: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2463: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2464: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2464: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2464: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2464: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2464: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2464: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2464: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2465: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2465: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2465: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2465: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2465: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2465: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2465: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2466: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2466: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2466: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2466: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2466: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2466: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2466: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2467: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2467: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2467: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2467: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2467: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2467: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2467: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2468: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2468: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2468: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2468: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2468: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2468: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2468: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2469: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2469: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2469: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2469: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2469: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2469: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2469: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2470: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2470: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2470: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2470: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2470: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2470: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2470: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2471: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2471: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2471: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2471: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2471: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2471: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2471: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2472: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2472: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2472: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2472: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2472: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2472: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2472: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2473: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2473: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2473: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2473: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2473: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2474: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2474: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2474: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2474: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2474: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2475: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2475: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2475: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2475: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2475: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2476: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2476: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2476: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2476: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2476: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2477: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2477: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2477: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2477: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2477: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2478: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2478: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2478: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2478: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2478: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2479: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2479: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2479: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2479: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2479: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2480: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2480: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2480: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2480: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2480: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2482: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2482: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2483: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2483: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2484: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2484: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2485: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2485: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2486: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2486: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2487: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2487: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2488: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2488: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2489: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2489: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2490: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2490: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2490: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2490: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2490: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2491: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2491: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2491: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2491: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2491: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2492: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2492: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2492: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2492: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2492: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2493: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2493: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2493: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2493: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2493: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2494: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2494: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2494: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2494: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2494: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2495: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2495: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2495: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2495: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2495: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2496: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2496: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2496: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2496: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2496: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2497: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2497: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2497: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2497: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2497: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2498: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2498: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2498: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2498: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2498: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2499: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2499: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2499: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2499: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2499: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2500: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2500: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2500: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2500: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2500: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2501: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2501: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2501: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2501: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2501: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2502: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2502: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2502: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2502: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2502: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2503: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2503: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2503: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2503: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2503: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2504: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2504: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2504: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2504: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2504: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2505: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2505: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2505: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2505: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2505: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2506: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2506: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2506: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2507: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2507: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2507: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2508: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2508: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2508: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2509: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2509: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2509: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2510: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2510: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2510: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2511: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2511: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2511: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2512: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2512: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2512: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2513: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2513: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2513: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2515: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2515: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2516: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2516: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2517: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2517: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2518: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2518: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2519: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2519: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2520: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2520: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2521: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2521: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2522: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2522: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2523: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2523: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2523: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2523: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2523: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2524: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2524: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2524: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2524: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2524: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2525: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2525: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2525: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2525: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2525: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2526: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2526: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2526: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2526: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2526: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2527: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2527: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2527: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2527: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2527: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2528: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2528: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2528: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2528: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2528: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2529: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2529: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2529: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2529: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2529: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2530: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2530: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2530: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2530: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2530: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2531: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2531: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2531: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2531: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2531: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2532: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2532: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2532: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2532: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2532: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2533: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2533: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2533: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2533: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2533: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2534: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2534: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2534: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2534: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2534: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2535: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2535: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2535: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2535: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2535: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2536: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2536: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2536: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2536: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2536: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2537: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2537: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2537: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2537: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2537: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2538: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2538: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2538: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2538: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2538: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2539: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2539: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2539: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2540: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2540: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2540: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2541: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2541: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2541: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2542: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2542: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2542: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2543: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2543: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2543: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2544: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2544: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2544: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2545: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2545: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2545: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2546: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2546: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2546: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2548: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2548: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2548: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2548: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2549: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2549: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2549: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2549: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2550: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2550: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2550: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2550: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2551: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2551: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2551: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2551: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2552: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2552: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2552: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2552: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2553: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2553: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2553: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2553: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2554: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2554: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2554: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2554: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2555: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2555: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2555: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2555: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2556: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2556: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2556: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2556: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2556: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2556: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2556: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2557: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2557: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2557: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2557: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2557: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2557: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2557: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2558: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2558: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2558: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2558: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2558: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2558: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2558: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2559: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2559: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2559: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2559: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2559: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2559: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2559: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2560: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2560: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2560: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2560: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2560: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2560: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2560: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2561: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2561: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2561: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2561: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2561: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2561: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2561: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2562: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2562: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2562: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2562: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2562: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2562: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2562: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2563: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2563: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2563: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2563: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2563: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2563: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2563: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2564: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2564: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2564: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2564: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2564: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2564: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2564: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2565: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2565: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2565: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2565: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2565: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2565: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2565: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2566: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2566: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2566: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2566: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2566: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2566: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2566: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2567: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2567: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2567: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2567: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2567: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2567: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2567: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2568: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2568: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2568: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2568: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2568: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2568: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2568: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2569: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2569: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2569: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2569: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2569: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2569: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2569: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2570: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2570: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2570: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2570: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2570: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2570: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2570: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2571: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2571: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2571: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2571: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2571: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2571: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2571: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2572: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2572: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2572: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2572: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2572: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2573: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2573: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2573: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2573: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2573: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2574: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2574: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2574: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2574: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2574: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2575: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2575: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2575: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2575: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2575: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2576: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2576: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2576: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2576: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2576: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2577: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2577: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2577: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2577: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2577: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2578: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2578: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2578: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2578: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2578: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2579: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2579: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2579: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2579: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2579: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2581: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2581: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2582: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2582: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2583: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2583: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2584: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2584: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2585: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2585: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2586: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2586: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2587: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2587: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2588: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2588: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2589: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2589: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2589: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2589: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2589: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2590: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2590: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2590: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2590: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2590: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2591: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2591: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2591: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2591: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2591: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2592: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2592: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2592: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2592: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2592: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2593: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2593: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2593: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2593: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2593: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2594: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2594: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2594: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2594: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2594: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2595: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2595: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2595: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2595: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2595: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2596: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2596: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2596: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2596: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2596: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2597: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2597: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2597: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2598: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2598: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2598: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2599: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2599: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2599: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2600: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2600: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2600: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2601: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2601: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2601: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2602: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2602: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2602: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2603: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2603: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2603: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2604: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2604: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2604: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2605: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2605: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2605: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2606: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2606: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2606: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2607: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2607: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2607: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2608: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2608: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2608: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2609: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2609: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2609: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2610: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2610: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2610: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2611: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2611: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2611: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2612: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2612: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2612: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2614: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2614: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2615: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2615: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2616: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2616: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2617: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2617: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2618: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2618: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2619: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2619: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2620: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2620: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2621: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2621: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2622: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2622: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2622: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2622: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2622: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2623: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2623: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2623: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2623: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2623: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2624: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2624: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2624: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2624: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2624: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2625: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2625: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2625: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2625: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2625: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2626: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2626: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2626: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2626: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2626: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2627: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2627: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2627: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2627: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2627: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2628: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2628: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2628: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2628: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2628: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2629: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2629: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2629: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2629: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2629: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2630: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2630: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2630: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2631: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2631: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2631: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2632: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2632: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2632: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2633: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2633: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2633: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2634: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2634: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2634: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2635: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2635: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2635: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2636: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2636: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2636: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2637: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2637: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2637: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2638: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2638: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2638: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2639: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2639: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2639: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2640: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2640: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2640: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2641: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2641: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2641: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2642: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2642: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2642: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2643: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2643: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2643: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2644: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2644: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2644: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2645: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2645: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2645: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2647: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2647: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2647: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2647: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2648: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2648: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2648: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2648: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2649: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2649: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2649: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2649: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2650: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2650: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2650: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2650: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2651: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2651: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2651: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2651: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2652: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2652: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2652: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2652: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2653: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2653: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2653: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2653: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2654: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2654: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2654: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2654: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2655: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2655: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2655: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2655: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2655: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2655: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2655: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2656: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2656: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2656: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2656: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2656: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2656: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2656: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2657: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2657: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2657: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2657: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2657: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2657: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2657: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2658: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2658: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2658: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2658: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2658: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2658: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2658: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2659: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2659: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2659: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2659: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2659: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2659: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2659: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2660: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2660: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2660: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2660: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2660: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2660: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2660: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2661: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2661: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2661: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2661: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2661: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2661: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2661: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2662: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2662: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2662: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2662: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2662: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2662: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2662: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2663: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2663: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2663: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2663: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2663: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2664: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2664: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2664: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2664: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2664: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2665: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2665: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2665: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2665: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2665: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2666: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2666: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2666: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2666: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2666: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2667: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2667: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2667: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2667: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2667: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2668: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2668: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2668: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2668: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2668: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2669: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2669: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2669: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2669: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2669: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2670: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2670: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2670: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2670: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2670: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2671: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2671: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2671: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2671: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2671: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2672: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2672: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2672: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2672: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2672: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2673: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2673: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2673: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2673: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2673: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2674: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2674: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2674: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2674: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2674: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2675: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2675: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2675: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2675: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2675: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2676: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2676: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2676: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2676: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2676: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2677: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2677: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2677: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2677: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2677: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2678: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2678: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2678: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2678: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:2678: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2691: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2691: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2691: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2692: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2692: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2692: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2693: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2693: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2693: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2694: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2694: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2694: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2695: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2695: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2695: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2696: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2696: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2696: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2697: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2697: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2697: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2698: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2698: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2698: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2699: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2699: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2699: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2700: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2700: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2700: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2701: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2701: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2701: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2702: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2702: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2702: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2703: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2703: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2703: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2704: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2704: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2704: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2705: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2705: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2705: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2706: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2706: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2706: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2707: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2708: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2709: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2710: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2711: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2712: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2713: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2714: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2724: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2724: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2724: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2725: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2725: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2725: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2726: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2726: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2726: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2727: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2727: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2727: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2728: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2728: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2728: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2729: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2729: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2729: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2730: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2730: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2730: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2731: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2731: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2731: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2732: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2732: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2732: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2733: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2733: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2733: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2734: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2734: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2734: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2735: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2735: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2735: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2736: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2736: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2736: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2737: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2737: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2737: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2738: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2738: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2738: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2739: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2739: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2739: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2740: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2741: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2742: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2743: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2744: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2745: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2746: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2747: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2749: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2749: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2750: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2750: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2751: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2751: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2752: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2752: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2753: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2753: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2754: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2754: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2755: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2755: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2756: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2756: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2757: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2757: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2757: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2757: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2757: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2758: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2758: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2758: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2758: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2758: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2759: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2759: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2759: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2759: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2759: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2760: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2760: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2760: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2760: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2760: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2761: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2761: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2761: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2761: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2761: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2762: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2762: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2762: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2762: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2762: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2763: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2763: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2763: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2763: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2763: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2764: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2764: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2764: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2764: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2764: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2765: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2765: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2765: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2765: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2765: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2766: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2766: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2766: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2766: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2766: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2767: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2767: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2767: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2767: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2767: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2768: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2768: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2768: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2768: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2768: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2769: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2769: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2769: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2769: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2769: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2770: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2770: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2770: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2770: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2770: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2771: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2771: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2771: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2771: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2771: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2772: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2772: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2772: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2772: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2772: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2773: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2773: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2773: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2774: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2774: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2774: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2775: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2775: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2775: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2776: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2776: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2776: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2777: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2777: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2777: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2778: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2778: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2778: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2779: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2779: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2779: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2780: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2780: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2780: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2790: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2790: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2790: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2791: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2791: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2791: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2792: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2792: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2792: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2793: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2793: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2793: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2794: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2794: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2794: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2795: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2795: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2795: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2796: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2796: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2796: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2797: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2797: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2797: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2798: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2798: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2798: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2799: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2799: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2799: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2800: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2800: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2800: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2801: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2801: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2801: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2802: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2802: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2802: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2803: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2803: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2803: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2804: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2804: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2804: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2805: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2805: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2805: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2806: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2807: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2808: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2809: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2810: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2811: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2812: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2813: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2823: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2823: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2823: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2824: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2824: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2824: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2825: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2825: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2825: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2826: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2826: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2826: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2827: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2827: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2827: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2828: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2828: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2828: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2829: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2829: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2829: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2830: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2830: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2830: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2831: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2831: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2831: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2832: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2832: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2832: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2833: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2833: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2833: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2834: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2834: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2834: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2835: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2835: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2835: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2836: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2836: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2836: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2837: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2837: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2837: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2838: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2838: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2838: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2839: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2840: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2841: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2842: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2843: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2844: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2845: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2846: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2848: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2848: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2849: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2849: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2850: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2850: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2851: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2851: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2852: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2852: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2853: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2853: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2854: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2854: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2855: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2855: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2856: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2856: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2856: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2856: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2856: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2857: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2857: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2857: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2857: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2857: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2858: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2858: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2858: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2858: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2858: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2859: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2859: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2859: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2859: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2859: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2860: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2860: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2860: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2860: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2860: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2861: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2861: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2861: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2861: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2861: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2862: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2862: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2862: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2862: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2862: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2863: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2863: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2863: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2863: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2863: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2864: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2864: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2864: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2864: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2864: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2865: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2865: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2865: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2865: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2865: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2866: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2866: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2866: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2866: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2866: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2867: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2867: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2867: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2867: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2867: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2868: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2868: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2868: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2868: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2868: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2869: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2869: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2869: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2869: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2869: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2870: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2870: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2870: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2870: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2870: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2871: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2871: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2871: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2871: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2871: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2872: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2872: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2872: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2873: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2873: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2873: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2874: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2874: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2874: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2875: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2875: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2875: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2876: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2876: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2876: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2877: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2877: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2877: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2878: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2878: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2878: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2879: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2879: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2879: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2889: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2889: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2889: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2890: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2890: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2890: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2891: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2891: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2891: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2892: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2892: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2892: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2893: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2893: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2893: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2894: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2894: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2894: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2895: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2895: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2895: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2896: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2896: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2896: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2897: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2898: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2899: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2900: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2901: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2902: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2903: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2904: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2905: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2906: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2907: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2908: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2909: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2910: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2911: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2912: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2922: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2922: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2922: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2923: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2923: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2923: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2924: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2924: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2924: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2925: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2925: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2925: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2926: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2926: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2926: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2927: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2927: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2927: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2928: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2928: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2928: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2929: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2929: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2929: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2930: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2931: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2932: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2933: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2934: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2935: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2936: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2937: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2938: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2939: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2940: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2941: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2942: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2943: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2944: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2945: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2947: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2947: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2948: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2948: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2949: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2949: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2950: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2950: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2951: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2951: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2952: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2952: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2953: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2953: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2954: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2954: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2955: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2955: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2955: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2955: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2955: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2956: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2956: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2956: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2956: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2956: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2957: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2957: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2957: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2957: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2957: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2958: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2958: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2958: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2958: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2958: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2959: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2959: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2959: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2959: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2959: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2960: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2960: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2960: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2960: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2960: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2961: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2961: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2961: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2961: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2961: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2962: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2962: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2962: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2962: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2962: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2963: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2963: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2963: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2964: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2964: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2964: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2965: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2965: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2965: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2966: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2966: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2966: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2967: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2967: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2967: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2968: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2968: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2968: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2969: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2969: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2969: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2970: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2970: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2970: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2971: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2971: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2971: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2972: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2972: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2972: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2973: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2973: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2973: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2974: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2974: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2974: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2975: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2975: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2975: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2976: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2976: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2976: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2977: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2977: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2977: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2978: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:2978: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2978: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:2988: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2988: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2989: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2989: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2990: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2990: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2991: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2991: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2992: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2992: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2993: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2993: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2994: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2994: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2995: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2995: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2996: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2996: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2997: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2997: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2998: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2998: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2999: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:2999: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3000: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3000: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3001: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3001: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3002: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3002: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3003: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3003: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3021: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3021: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3022: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3022: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3023: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3023: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3024: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3024: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3025: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3025: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3026: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3026: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3027: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3027: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3028: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3028: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3029: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3029: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3030: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3030: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3031: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3031: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3032: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3032: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3033: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3033: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3034: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3034: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3035: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3035: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3036: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3036: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3047: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3047: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3049: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3049: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3051: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3051: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3053: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3053: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3055: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3055: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3055: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3055: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3057: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3057: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3057: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3057: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3059: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3059: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3059: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3059: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3061: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3061: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3061: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3061: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3063: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3063: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3063: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3063: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3065: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3065: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3065: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3065: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3067: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3067: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3067: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3067: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3069: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3069: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3069: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3069: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3071: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3071: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3073: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3073: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3075: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3075: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3077: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3077: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3087: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3087: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3088: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3088: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3089: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3089: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3090: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3090: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3091: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3091: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3092: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3092: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3093: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3093: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3094: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3094: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3095: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3095: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3096: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3096: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3097: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3097: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3098: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3098: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3099: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3099: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3100: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3100: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3101: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3101: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3102: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3102: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3120: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3120: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3121: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3121: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3122: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3122: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3123: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3123: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3124: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3124: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3125: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3125: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3126: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3126: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3127: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3127: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3128: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3128: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3129: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3129: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3130: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3130: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3131: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3131: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3132: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3132: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3133: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3133: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3134: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3134: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3135: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3135: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3146: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3146: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3148: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3148: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3150: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3150: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3152: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3152: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3154: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3154: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3154: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3154: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3156: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3156: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3156: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3156: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3158: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3158: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3158: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3158: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3160: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3160: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3160: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3160: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3162: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3162: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3162: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3162: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3164: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3164: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3164: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3164: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3166: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3166: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3166: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3166: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3168: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3168: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3168: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3168: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3170: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3170: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3172: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3172: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3174: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3174: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3176: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3176: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3186: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3187: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3187: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3188: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3189: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3189: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3190: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3191: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3191: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3192: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3193: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3193: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3219: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3220: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3220: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3221: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3222: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3222: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3223: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3224: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3224: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3225: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3226: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3226: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3244: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3244: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3245: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3245: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3246: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3246: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3247: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3247: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3248: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3248: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3249: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3249: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3250: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3250: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3251: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3251: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3252: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3252: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3252: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3252: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3253: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3253: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3253: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3253: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3254: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3254: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3254: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3254: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3255: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3255: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3255: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3255: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3256: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3256: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3256: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3256: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3257: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3257: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3257: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3257: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3258: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3258: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3258: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3258: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3259: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3259: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3259: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3259: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3260: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3260: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3261: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3261: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3262: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3262: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3263: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3263: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3264: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3264: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3265: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3265: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3266: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3266: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3267: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3267: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3268: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3268: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3269: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3269: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3270: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3270: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3271: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3271: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3272: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3272: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3273: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3273: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3274: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3274: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3275: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3275: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3285: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3285: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3285: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3286: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3286: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3286: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3287: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3287: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3287: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3288: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3288: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3288: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3289: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3289: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3289: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3290: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3290: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3290: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3291: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3291: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3291: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3292: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3292: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3292: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3293: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3293: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3293: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3294: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3294: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3294: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3295: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3295: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3295: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3296: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3296: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3296: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3297: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3297: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3297: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3298: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3298: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3298: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3299: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3299: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3299: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3300: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3300: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3300: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3301: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3302: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3303: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3304: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3305: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3306: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3307: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3308: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3318: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3318: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3318: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3319: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3319: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3319: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3320: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3320: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3320: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3321: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3321: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3321: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3322: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3322: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3322: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3323: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3323: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3323: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3324: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3324: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3324: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3325: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3325: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3325: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3326: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3326: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3326: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3327: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3327: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3327: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3328: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3328: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3328: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3329: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3329: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3329: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3330: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3330: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3330: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3331: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3331: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3331: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3332: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3332: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3332: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3333: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3333: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3333: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3334: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3335: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3336: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3337: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3338: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3339: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3340: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3341: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3343: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3343: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3344: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3344: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3345: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3345: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3346: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3346: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3347: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3347: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3348: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3348: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3349: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3349: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3350: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3350: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3351: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3351: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3351: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3351: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3351: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3352: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3352: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3352: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3352: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3352: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3353: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3353: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3353: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3353: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3353: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3354: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3354: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3354: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3354: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3354: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3355: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3355: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3355: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3355: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3355: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3356: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3356: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3356: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3356: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3356: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3357: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3357: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3357: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3357: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3357: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3358: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3358: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3358: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3358: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3358: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3359: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3359: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3359: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3359: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3359: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3360: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3360: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3360: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3360: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3360: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3361: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3361: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3361: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3361: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3361: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3362: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3362: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3362: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3362: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3362: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3363: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3363: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3363: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3363: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3363: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3364: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3364: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3364: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3364: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3364: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3365: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3365: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3365: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3365: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3365: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3366: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3366: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3366: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3366: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3366: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3367: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3367: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3367: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3368: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3368: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3368: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3369: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3369: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3369: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3370: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3370: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3370: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3371: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3371: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3371: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3372: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3372: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3372: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3373: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3373: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3373: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3374: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3374: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3374: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3384: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3384: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3384: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3385: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3385: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3385: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3386: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3386: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3386: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3387: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3387: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3387: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3388: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3388: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3388: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3389: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3389: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3389: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3390: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3390: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3390: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3391: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3391: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3391: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3392: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3392: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3392: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3393: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3393: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3393: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3394: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3394: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3394: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3395: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3395: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3395: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3396: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3396: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3396: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3397: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3397: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3397: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3398: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3398: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3398: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3399: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3399: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3399: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3400: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3401: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3402: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3403: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3404: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3405: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3406: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3407: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3417: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3417: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3417: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3418: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3418: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3418: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3419: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3419: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3419: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3420: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3420: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3420: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3421: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3421: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3421: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3422: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3422: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3422: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3423: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3423: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3423: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3424: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3424: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3424: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3425: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3425: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3425: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3426: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3426: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3426: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3427: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3427: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3427: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3428: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3428: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3428: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3429: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3429: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3429: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3430: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3430: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3430: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3431: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3431: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3431: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3432: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3432: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3432: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3433: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3434: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3435: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3436: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3437: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3438: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3439: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3440: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3442: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3442: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3443: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3443: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3444: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3444: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3445: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3445: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3446: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3446: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3447: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3447: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3448: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3448: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3449: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3449: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3450: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3450: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3450: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3450: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3450: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3451: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3451: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3451: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3451: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3451: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3452: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3452: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3452: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3452: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3452: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3453: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3453: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3453: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3453: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3453: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3454: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3454: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3454: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3454: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3454: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3455: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3455: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3455: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3455: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3455: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3456: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3456: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3456: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3456: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3456: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3457: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3457: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3457: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3457: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3457: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3458: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3458: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3458: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3458: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3458: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3459: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3459: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3459: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3459: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3459: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3460: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3460: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3460: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3460: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3460: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3461: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3461: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3461: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3461: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3461: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3462: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3462: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3462: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3462: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3462: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3463: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3463: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3463: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3463: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3463: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3464: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3464: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3464: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3464: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3464: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3465: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3465: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3465: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3465: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3465: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3466: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3466: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3466: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3467: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3467: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3467: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3468: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3468: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3468: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3469: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3469: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3469: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3470: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3470: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3470: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3471: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3471: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3471: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3472: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3472: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3472: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3473: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3473: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3473: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3483: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3483: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3483: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3484: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3484: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3484: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3485: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3485: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3485: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3486: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3486: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3486: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3487: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3487: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3487: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3488: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3488: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3488: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3489: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3489: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3489: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3490: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3490: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3490: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3491: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3492: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3493: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3494: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3495: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3496: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3497: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3498: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3499: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3500: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3501: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3502: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3503: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3504: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3505: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3506: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3516: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3516: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3516: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3517: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3517: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3517: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3518: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3518: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3518: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3519: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3519: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3519: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3520: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3520: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3520: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3521: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3521: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3521: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3522: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3522: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3522: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3523: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3523: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3523: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3524: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3525: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3526: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3527: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3528: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3529: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3530: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3531: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3532: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3533: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3534: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3535: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3536: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3537: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3538: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3539: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3541: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3541: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3542: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3542: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3543: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3543: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3544: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3544: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3545: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3545: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3546: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3546: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3547: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3547: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3548: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3548: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3549: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3549: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3549: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3549: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3549: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3550: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3550: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3550: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3550: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3550: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3551: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3551: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3551: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3551: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3551: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3552: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3552: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3552: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3552: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3552: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3553: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3553: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3553: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3553: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3553: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3554: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3554: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3554: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3554: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3554: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3555: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3555: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3555: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3555: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3555: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3556: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3556: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3556: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3556: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3556: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3557: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3557: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3557: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3558: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3558: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3558: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3559: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3559: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3559: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3560: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3560: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3560: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3561: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3561: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3561: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3562: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3562: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3562: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3563: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3563: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3563: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3564: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3564: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3564: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3565: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3565: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3565: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3566: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3566: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3566: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3567: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3567: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3567: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3568: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3568: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3568: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3569: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3569: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3569: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3570: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3570: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3570: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3571: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3571: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3571: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3572: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:3572: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3572: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3582: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3582: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3583: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3583: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3584: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3584: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3585: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3585: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3586: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3586: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3587: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3587: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3588: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3588: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3589: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3589: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3590: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3590: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3591: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3591: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3592: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3592: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3593: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3593: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3594: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3594: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3595: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3595: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3596: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3596: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3597: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3597: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3615: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3615: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3616: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3616: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3617: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3617: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3618: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3618: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3619: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3619: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3620: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3620: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3621: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3621: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3622: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3622: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3623: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3623: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3624: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3624: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3625: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3625: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3626: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3626: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3627: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3627: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3628: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3628: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3629: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3629: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3630: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3630: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3641: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3641: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3643: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3643: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3645: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3645: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3647: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3647: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3649: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3649: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3649: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3649: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3651: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3651: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3651: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3651: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3653: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3653: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3653: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3653: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3655: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3655: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3655: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3655: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3657: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3657: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3657: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3657: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3659: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3659: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3659: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3659: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3661: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3661: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3661: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3661: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3663: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3663: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3663: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3663: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3665: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3665: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3667: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3667: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3669: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3669: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3671: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3671: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3681: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3681: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3682: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3682: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3683: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3683: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3684: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3684: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3685: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3685: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3686: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3686: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3687: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3687: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3688: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3688: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3689: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3689: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3690: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3690: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3691: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3691: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3692: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3692: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3693: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3693: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3694: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3694: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3695: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3695: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3696: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3696: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3714: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3714: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3715: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3715: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3716: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3716: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3717: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3717: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3718: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3718: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3719: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3719: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3720: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3720: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3721: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3721: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3722: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3722: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3723: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3723: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3724: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3724: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3725: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3725: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3726: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3726: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3727: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3727: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3728: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3728: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3729: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3729: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3740: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3740: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3742: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3742: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3744: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3744: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3746: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3746: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3748: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3748: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3748: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3748: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3750: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3750: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3750: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3750: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3752: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3752: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3752: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3752: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3754: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3754: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3754: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3754: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3756: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3756: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3756: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3756: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3758: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3758: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3758: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3758: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3760: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3760: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3760: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3760: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3762: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3762: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3762: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3762: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3764: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3764: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3766: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3766: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3768: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3768: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3770: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3770: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3780: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3781: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3781: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3782: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3783: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3783: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3784: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3785: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3785: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3786: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3787: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3787: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3813: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3814: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3814: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3815: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3816: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3816: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3817: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3818: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3818: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3819: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3820: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3820: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3838: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3838: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3839: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3839: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3840: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3840: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3841: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3841: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3842: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3842: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3843: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3843: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3844: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3844: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3845: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3845: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3846: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3846: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3846: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3846: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3847: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3847: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3847: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3847: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3848: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3848: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3848: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3848: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3849: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3849: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3849: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3849: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3850: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3850: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3850: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3850: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3851: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3851: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3851: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3851: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3852: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3852: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3852: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3852: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3853: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3853: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3853: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3853: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3854: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3854: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3855: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3855: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3856: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3856: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3857: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3857: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3858: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3858: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3859: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3859: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3860: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3860: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3861: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3861: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3862: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3862: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3863: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3863: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3864: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3864: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3865: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3865: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3866: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3866: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3867: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3867: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3868: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3868: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3869: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3869: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3879: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3879: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3880: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3880: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3881: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3881: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3882: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3882: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3883: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3883: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3884: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3884: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3885: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3885: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3886: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3886: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3887: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3887: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3888: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3888: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3889: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3889: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3890: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3890: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3891: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3891: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3892: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3892: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3893: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3893: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3894: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3894: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3912: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3912: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3913: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3913: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3914: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3914: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3915: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3915: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3916: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3916: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3917: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3917: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3918: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3918: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3919: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3919: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3920: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3920: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3921: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3921: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3922: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3922: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3923: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3923: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3924: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3924: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3925: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3925: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3926: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3926: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3927: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3927: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3938: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3938: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3940: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3940: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3942: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3942: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3944: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3944: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3946: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3946: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3946: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3946: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3948: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3948: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3948: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3948: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3950: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3950: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3950: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3950: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3952: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3952: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3952: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3952: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3954: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3954: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3954: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3954: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3956: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3956: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3956: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3956: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3958: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3958: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3958: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3958: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3960: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3960: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3960: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3960: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3962: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3962: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3964: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3964: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3966: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3966: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3968: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3968: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:3978: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3978: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3979: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3979: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3980: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3980: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3981: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3981: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3982: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3982: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3983: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3983: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3984: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3984: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3985: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3985: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3986: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3986: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3987: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3987: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3988: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3988: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3989: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3989: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3990: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3990: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3991: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3991: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3992: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3992: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3993: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:3993: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4011: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4011: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4012: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4012: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4013: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4013: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4014: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4014: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4015: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4015: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4016: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4016: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4017: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4017: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4018: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4018: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4019: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4019: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4020: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4020: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4021: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4021: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4022: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4022: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4023: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4023: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4024: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4024: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4025: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4025: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4026: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4026: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4037: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4037: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4039: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4039: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4041: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4041: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4043: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4043: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4045: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4045: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4045: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4045: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4047: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4047: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4047: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4047: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4049: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4049: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4049: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4049: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4051: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4051: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4051: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4051: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4053: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4053: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4053: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4053: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4055: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4055: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4055: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4055: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4057: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4057: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4057: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4057: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4059: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4059: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4059: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4059: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4061: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4061: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4063: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4063: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4065: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4065: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4067: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4067: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4077: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4078: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4078: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4079: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4080: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4080: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4081: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4082: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4082: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4083: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4084: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4084: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4110: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4111: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4111: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4112: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4113: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4113: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4114: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4115: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4115: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4116: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4117: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4117: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4135: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4135: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4136: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4136: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4137: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4137: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4138: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4138: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4139: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4139: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4140: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4140: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4141: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4141: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4142: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4142: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4143: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4143: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4143: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4143: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4144: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4144: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4144: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4144: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4145: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4145: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4145: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4145: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4146: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4146: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4146: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4146: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4147: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4147: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4147: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4147: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4148: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4148: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4148: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4148: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4149: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4149: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4149: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4149: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4150: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4150: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4150: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4150: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4151: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4151: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4152: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4152: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4153: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4153: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4154: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4154: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4155: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4155: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4156: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4156: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4157: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4157: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4158: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4158: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4159: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4159: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4160: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4160: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4161: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4161: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4162: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4162: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4163: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4163: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4164: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4164: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4165: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4165: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4166: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4166: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4176: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4176: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4176: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4177: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4177: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4177: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4178: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4178: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4178: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4179: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4179: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4179: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4180: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4180: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4180: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4181: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4181: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4181: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4182: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4182: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4182: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4183: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4183: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4183: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4184: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4184: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4184: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4185: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4185: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4185: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4186: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4186: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4186: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4187: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4187: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4187: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4188: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4188: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4188: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4189: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4189: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4189: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4190: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4190: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4190: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4191: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4191: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4191: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4192: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4193: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4194: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4195: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4196: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4197: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4198: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4199: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4209: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4209: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4209: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4210: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4210: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4210: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4211: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4211: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4211: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4212: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4212: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4212: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4213: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4213: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4213: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4214: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4214: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4214: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4215: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4215: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4215: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4216: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4216: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4216: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4217: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4217: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4217: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4218: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4218: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4218: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4219: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4219: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4219: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4220: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4220: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4220: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4221: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4221: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4221: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4222: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4222: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4222: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4223: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4223: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4223: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4224: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4224: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4224: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4225: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4226: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4227: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4228: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4229: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4230: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4231: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4232: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4234: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4234: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4235: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4235: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4236: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4236: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4237: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4237: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4238: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4238: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4239: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4239: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4240: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4240: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4241: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4241: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4242: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4242: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4242: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4242: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4242: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4243: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4243: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4243: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4243: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4243: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4244: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4244: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4244: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4244: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4244: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4245: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4245: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4245: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4245: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4245: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4246: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4246: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4246: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4246: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4246: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4247: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4247: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4247: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4247: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4247: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4248: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4248: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4248: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4248: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4248: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4249: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4249: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4249: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4249: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4249: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4250: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4250: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4250: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4250: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4250: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4251: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4251: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4251: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4251: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4251: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4252: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4252: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4252: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4252: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4252: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4253: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4253: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4253: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4253: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4253: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4254: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4254: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4254: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4254: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4254: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4255: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4255: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4255: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4255: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4255: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4256: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4256: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4256: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4256: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4256: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4257: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4257: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4257: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4257: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4257: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4258: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4258: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4258: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4259: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4259: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4259: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4260: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4260: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4260: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4261: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4261: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4261: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4262: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4262: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4262: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4263: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4263: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4263: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4264: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4264: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4264: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4265: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4265: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4265: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4275: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4275: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4275: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4276: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4276: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4276: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4277: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4277: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4277: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4278: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4278: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4278: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4279: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4279: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4279: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4280: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4280: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4280: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4281: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4281: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4281: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4282: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4282: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4282: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4283: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4283: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4283: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4284: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4284: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4284: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4285: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4285: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4285: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4286: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4286: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4286: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4287: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4287: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4287: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4288: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4288: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4288: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4289: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4289: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4289: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4290: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4290: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4290: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4291: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4292: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4293: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4294: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4295: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4296: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4297: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4298: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4308: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4308: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4308: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4309: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4309: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4309: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4310: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4310: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4310: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4311: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4311: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4311: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4312: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4312: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4312: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4313: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4313: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4313: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4314: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4314: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4314: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4315: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4315: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4315: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4316: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4316: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4316: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4317: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4317: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4317: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4318: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4318: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4318: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4319: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4319: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4319: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4320: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4320: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4320: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4321: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4321: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4321: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4322: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4322: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4322: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4323: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4323: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4323: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4324: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4325: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4326: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4327: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4328: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4329: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4330: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4331: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4333: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4333: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4334: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4334: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4335: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4335: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4336: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4336: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4337: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4337: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4338: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4338: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4339: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4339: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4340: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4340: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4341: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4341: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4341: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4341: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4341: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4342: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4342: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4342: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4342: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4342: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4343: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4343: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4343: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4343: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4343: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4344: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4344: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4344: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4344: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4344: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4345: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4345: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4345: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4345: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4345: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4346: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4346: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4346: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4346: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4346: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4347: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4347: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4347: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4347: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4347: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4348: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4348: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4348: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4348: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4348: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4349: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4349: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4349: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4349: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4349: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4350: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4350: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4350: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4350: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4350: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4351: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4351: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4351: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4351: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4351: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4352: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4352: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4352: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4352: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4352: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4353: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4353: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4353: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4353: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4353: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4354: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4354: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4354: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4354: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4354: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4355: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4355: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4355: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4355: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4355: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4356: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4356: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4356: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4356: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4356: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4357: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4357: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4357: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4358: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4358: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4358: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4359: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4359: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4359: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4360: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4360: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4360: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4361: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4361: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4361: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4362: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4362: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4362: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4363: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4363: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4363: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4364: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4364: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4364: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4374: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4374: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4374: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4375: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4375: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4375: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4376: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4376: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4376: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4377: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4377: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4377: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4378: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4378: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4378: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4379: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4379: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4379: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4380: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4380: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4380: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4381: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4381: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4381: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4382: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4383: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4384: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4385: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4386: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4387: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4388: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4389: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4390: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4391: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4392: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4393: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4394: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4395: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4396: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4397: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4407: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4407: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4407: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4408: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4408: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4408: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4409: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4409: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4409: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4410: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4410: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4410: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4411: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4411: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4411: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4412: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4412: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4412: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4413: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4413: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4413: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4414: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4414: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4414: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4415: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4416: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4417: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4418: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4419: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4420: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4421: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4422: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4423: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4424: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4425: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4426: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4427: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4428: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4429: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4430: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4432: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4432: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4433: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4433: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4434: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4434: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4435: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4435: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4436: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4436: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4437: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4437: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4438: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4438: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4439: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4439: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4440: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4440: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4440: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4440: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4440: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4441: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4441: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4441: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4441: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4441: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4442: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4442: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4442: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4442: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4442: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4443: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4443: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4443: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4443: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4443: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4444: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4444: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4444: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4444: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4444: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4445: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4445: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4445: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4445: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4445: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4446: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4446: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4446: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4446: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4446: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4447: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4447: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4447: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4447: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4447: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4448: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4448: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4448: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4449: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4449: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4449: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4450: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4450: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4450: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4451: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4451: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4451: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4452: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4452: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4452: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4453: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4453: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4453: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4454: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4454: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4454: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4455: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4455: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4455: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4456: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4456: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4456: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4457: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4457: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4457: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4458: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4458: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4458: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4459: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4459: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4459: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4460: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4460: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4460: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4461: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4461: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4461: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4462: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4462: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4462: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4463: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4463: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4463: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4465: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4465: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4466: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4466: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4467: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4467: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4468: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4468: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4469: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4469: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4470: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4470: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4471: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4471: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4472: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4472: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4473: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4473: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4473: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4473: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4473: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4474: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4474: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4474: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4474: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4474: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4475: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4475: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4475: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4475: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4475: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4476: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4476: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4476: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4476: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4476: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4477: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4477: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4477: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4477: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4477: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4478: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4478: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4478: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4478: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4478: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4479: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4479: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4479: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4479: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4479: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4480: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4480: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4480: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4480: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4480: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4481: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4481: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4481: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4481: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4481: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4482: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4482: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4482: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4482: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4482: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4483: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4483: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4483: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4483: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4483: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4484: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4484: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4484: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4484: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4484: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4485: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4485: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4485: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4485: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4485: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4486: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4486: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4486: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4486: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4486: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4487: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4487: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4487: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4487: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4487: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4488: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4488: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4488: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4488: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4488: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4489: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4489: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4489: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4490: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4490: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4490: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4491: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4491: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4491: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4492: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4492: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4492: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4493: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4493: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4493: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4494: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4494: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4494: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4495: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4495: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4495: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4496: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4496: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4496: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4498: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4498: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4499: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4499: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4500: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4500: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4501: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4501: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4502: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4502: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4503: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4503: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4504: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4504: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4505: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4505: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4506: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4506: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4506: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4506: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4506: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4507: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4507: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4507: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4507: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4507: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4508: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4508: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4508: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4508: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4508: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4509: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4509: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4509: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4509: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4509: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4510: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4510: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4510: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4510: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4510: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4511: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4511: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4511: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4511: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4511: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4512: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4512: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4512: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4512: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4512: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4513: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4513: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4513: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4513: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4513: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4514: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4514: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4514: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4514: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4514: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4515: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4515: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4515: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4515: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4515: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4516: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4516: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4516: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4516: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4516: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4517: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4517: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4517: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4517: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4517: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4518: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4518: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4518: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4518: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4518: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4519: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4519: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4519: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4519: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4519: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4520: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4520: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4520: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4520: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4520: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4521: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4521: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4521: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4521: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4521: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4522: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4522: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4522: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4523: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4523: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4523: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4524: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4524: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4524: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4525: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4525: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4525: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4526: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4526: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4526: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4527: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4527: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4527: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4528: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4528: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4528: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4529: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4529: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4529: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4531: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4531: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4531: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4531: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4532: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4532: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4532: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4532: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4533: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4533: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4533: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4533: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4534: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4534: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4534: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4534: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4535: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4535: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4535: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4535: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4536: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4536: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4536: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4536: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4537: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4537: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4537: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4537: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4538: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4538: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4538: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4538: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4539: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4539: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4539: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4539: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4539: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4539: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4539: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4540: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4540: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4540: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4540: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4540: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4540: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4540: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4541: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4541: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4541: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4541: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4541: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4541: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4541: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4542: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4542: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4542: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4542: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4542: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4542: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4542: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4543: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4543: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4543: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4543: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4543: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4543: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4543: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4544: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4544: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4544: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4544: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4544: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4544: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4544: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4545: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4545: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4545: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4545: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4545: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4545: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4545: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4546: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4546: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4546: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4546: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4546: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4546: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4546: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4547: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4547: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4547: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4547: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4547: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4547: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4547: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4548: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4548: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4548: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4548: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4548: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4548: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4548: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4549: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4549: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4549: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4549: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4549: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4549: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4549: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4550: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4550: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4550: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4550: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4550: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4550: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4550: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4551: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4551: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4551: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4551: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4551: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4551: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4551: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4552: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4552: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4552: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4552: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4552: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4552: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4552: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4553: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4553: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4553: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4553: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4553: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4553: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4553: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4554: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4554: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4554: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4554: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4554: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4554: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4554: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4555: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4555: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4555: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4555: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4555: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4556: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4556: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4556: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4556: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4556: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4557: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4557: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4557: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4557: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4557: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4558: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4558: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4558: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4558: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4558: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4559: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4559: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4559: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4559: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4559: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4560: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4560: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4560: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4560: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4560: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4561: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4561: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4561: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4561: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4561: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4562: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4562: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4562: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4562: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4562: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4564: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4564: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4565: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4565: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4566: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4566: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4567: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4567: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4568: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4568: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4569: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4569: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4570: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4570: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4571: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4571: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4572: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4572: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4572: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4572: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4572: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4573: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4573: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4573: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4573: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4573: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4574: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4574: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4574: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4574: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4574: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4575: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4575: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4575: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4575: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4575: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4576: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4576: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4576: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4576: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4576: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4577: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4577: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4577: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4577: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4577: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4578: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4578: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4578: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4578: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4578: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4579: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4579: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4579: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4579: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4579: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4580: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4580: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4580: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4580: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4580: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4581: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4581: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4581: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4581: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4581: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4582: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4582: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4582: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4582: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4582: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4583: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4583: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4583: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4583: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4583: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4584: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4584: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4584: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4584: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4584: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4585: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4585: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4585: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4585: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4585: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4586: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4586: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4586: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4586: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4586: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4587: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4587: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4587: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4587: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4587: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4588: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4588: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4588: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4589: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4589: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4589: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4590: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4590: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4590: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4591: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4591: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4591: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4592: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4592: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4592: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4593: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4593: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4593: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4594: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4594: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4594: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4595: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4595: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4595: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4597: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4597: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4598: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4598: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4599: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4599: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4600: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4600: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4601: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4601: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4602: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4602: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4603: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4603: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4604: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4604: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4605: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4605: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4605: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4605: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4605: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4606: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4606: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4606: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4606: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4606: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4607: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4607: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4607: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4607: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4607: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4608: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4608: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4608: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4608: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4608: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4609: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4609: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4609: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4609: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4609: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4610: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4610: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4610: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4610: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4610: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4611: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4611: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4611: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4611: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4611: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4612: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4612: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4612: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4612: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4612: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4613: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4613: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4613: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4613: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4613: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4614: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4614: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4614: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4614: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4614: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4615: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4615: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4615: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4615: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4615: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4616: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4616: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4616: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4616: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4616: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4617: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4617: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4617: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4617: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4617: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4618: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4618: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4618: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4618: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4618: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4619: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4619: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4619: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4619: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4619: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4620: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4620: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4620: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4620: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4620: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4621: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4621: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4621: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4622: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4622: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4622: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4623: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4623: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4623: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4624: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4624: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4624: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4625: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4625: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4625: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4626: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4626: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4626: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4627: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4627: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4627: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4628: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4628: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4628: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4630: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4630: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4630: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4630: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4631: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4631: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4631: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4631: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4632: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4632: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4632: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4632: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4633: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4633: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4633: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4633: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4634: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4634: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4634: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4634: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4635: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4635: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4635: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4635: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4636: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4636: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4636: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4636: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4637: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4637: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4637: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4637: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4638: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4638: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4638: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4638: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4638: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4638: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4638: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4639: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4639: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4639: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4639: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4639: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4639: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4639: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4640: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4640: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4640: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4640: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4640: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4640: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4640: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4641: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4641: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4641: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4641: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4641: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4641: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4641: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4642: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4642: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4642: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4642: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4642: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4642: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4642: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4643: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4643: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4643: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4643: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4643: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4643: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4643: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4644: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4644: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4644: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4644: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4644: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4644: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4644: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4645: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4645: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4645: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4645: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4645: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4645: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4645: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4646: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4646: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4646: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4646: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4646: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4646: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4646: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4647: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4647: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4647: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4647: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4647: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4647: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4647: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4648: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4648: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4648: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4648: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4648: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4648: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4648: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4649: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4649: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4649: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4649: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4649: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4649: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4649: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4650: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4650: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4650: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4650: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4650: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4650: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4650: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4651: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4651: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4651: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4651: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4651: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4651: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4651: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4652: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4652: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4652: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4652: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4652: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4652: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4652: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4653: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4653: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4653: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4653: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4653: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4653: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4653: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4654: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4654: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4654: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4654: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4654: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4655: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4655: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4655: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4655: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4655: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4656: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4656: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4656: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4656: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4656: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4657: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4657: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4657: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4657: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4657: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4658: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4658: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4658: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4658: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4658: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4659: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4659: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4659: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4659: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4659: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4660: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4660: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4660: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4660: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4660: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4661: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4661: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4661: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4661: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4661: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4663: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4663: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4664: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4664: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4665: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4665: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4666: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4666: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4667: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4667: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4668: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4668: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4669: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4669: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4670: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4670: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4671: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4671: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4671: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4671: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4671: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4672: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4672: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4672: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4672: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4672: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4673: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4673: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4673: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4673: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4673: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4674: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4674: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4674: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4674: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4674: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4675: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4675: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4675: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4675: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4675: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4676: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4676: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4676: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4676: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4676: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4677: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4677: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4677: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4677: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4677: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4678: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4678: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4678: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4678: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4678: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4679: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4679: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4679: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4680: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4680: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4680: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4681: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4681: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4681: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4682: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4682: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4682: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4683: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4683: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4683: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4684: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4684: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4684: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4685: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4685: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4685: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4686: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4686: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4686: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4687: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4687: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4687: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4688: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4688: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4688: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4689: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4689: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4689: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4690: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4690: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4690: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4691: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4691: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4691: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4692: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4692: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4692: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4693: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4693: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4693: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4694: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4694: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4694: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4696: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4696: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4697: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4697: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4698: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4698: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4699: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4699: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4700: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4700: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4701: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4701: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4702: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4702: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4703: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4703: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4704: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4704: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4704: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4704: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4704: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4705: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4705: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4705: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4705: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4705: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4706: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4706: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4706: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4706: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4706: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4707: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4707: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4707: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4707: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4707: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4708: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4708: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4708: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4708: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4708: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4709: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4709: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4709: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4709: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4709: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4710: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4710: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4710: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4710: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4710: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4711: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4711: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4711: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4711: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4711: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4712: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4712: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4712: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4713: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4713: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4713: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4714: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4714: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4714: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4715: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4715: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4715: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4716: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4716: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4716: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4717: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4717: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4717: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4718: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4718: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4718: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4719: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4719: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4719: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4720: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4720: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4720: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4721: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4721: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4721: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4722: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4722: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4722: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4723: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4723: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4723: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4724: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4724: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4724: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4725: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4725: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4725: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4726: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4726: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4726: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4727: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4727: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4727: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4729: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4729: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4729: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4729: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4730: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4730: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4730: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4730: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4731: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4731: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4731: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4731: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4732: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4732: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4732: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4732: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4733: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4733: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4733: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4733: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4734: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4734: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4734: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4734: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4735: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4735: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4735: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4735: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4736: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4736: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4736: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4736: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4737: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4737: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4737: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4737: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4737: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4737: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4737: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4738: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4738: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4738: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4738: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4738: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4738: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4738: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4739: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4739: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4739: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4739: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4739: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4739: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4739: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4740: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4740: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4740: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4740: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4740: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4740: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4740: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4741: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4741: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4741: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4741: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4741: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4741: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4741: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4742: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4742: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4742: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4742: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4742: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4742: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4742: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4743: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4743: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4743: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4743: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4743: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4743: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4743: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4744: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4744: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4744: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4744: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4744: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4744: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4744: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4745: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4745: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4745: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4745: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4745: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4746: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4746: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4746: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4746: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4746: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4747: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4747: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4747: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4747: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4747: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4748: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4748: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4748: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4748: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4748: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4749: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4749: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4749: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4749: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4749: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4750: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4750: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4750: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4750: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4750: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4751: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4751: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4751: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4751: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4751: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4752: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4752: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4752: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4752: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4752: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4753: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4753: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4753: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4753: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4753: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4754: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4754: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4754: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4754: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4754: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4755: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4755: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4755: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4755: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4755: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4756: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4756: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4756: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4756: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4756: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4757: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4757: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4757: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4757: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4757: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4758: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4758: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4758: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4758: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4758: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4759: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4759: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4759: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4759: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4759: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4760: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:4760: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4760: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4760: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4760: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4762: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4762: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4763: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4763: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4764: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4764: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4765: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4765: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4766: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4766: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4767: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4767: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4768: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4768: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4769: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4769: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4770: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4770: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4770: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4770: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4771: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4771: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4771: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4771: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4772: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4772: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4772: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4772: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4773: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4773: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4773: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4773: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4774: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4774: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4774: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4774: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4775: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4775: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4775: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4775: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4776: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4776: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4776: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4776: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4777: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4777: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4777: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4777: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4778: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4778: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4778: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4778: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4779: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4779: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4779: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4779: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4780: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4780: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4780: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4780: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4781: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4781: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4781: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4781: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4782: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4782: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4782: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4782: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4783: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4783: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4783: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4783: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4784: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4784: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4784: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4784: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4785: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4785: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4785: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4785: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4786: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4786: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4787: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4787: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4788: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4788: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4789: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4789: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4790: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4790: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4791: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4791: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4792: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4792: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4793: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4793: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4795: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4795: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4796: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4796: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4797: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4797: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4798: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4798: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4799: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4799: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4800: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4800: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4801: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4801: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4802: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4802: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4803: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4803: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4803: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4803: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4804: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4804: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4804: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4804: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4805: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4805: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4805: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4805: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4806: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4806: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4806: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4806: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4807: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4807: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4807: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4807: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4808: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4808: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4808: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4808: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4809: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4809: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4809: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4809: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4810: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4810: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4810: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4810: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4811: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4811: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4811: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4811: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4812: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4812: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4812: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4812: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4813: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4813: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4813: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4813: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4814: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4814: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4814: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4814: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4815: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4815: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4815: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4815: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4816: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4816: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4816: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4816: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4817: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4817: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4817: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4817: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4818: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4818: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4818: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4818: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4819: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4819: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4820: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4820: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4821: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4821: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4822: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4822: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4823: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4823: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4824: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4824: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4825: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4825: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4826: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4826: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4828: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4828: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4829: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4829: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4829: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4829: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4830: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4830: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4831: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4831: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4831: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4831: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4832: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4832: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4833: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4833: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4833: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4833: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4834: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4834: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4835: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4835: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4835: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4835: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4836: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4836: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4837: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4837: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4837: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4837: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4837: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4837: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4838: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4838: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4839: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4839: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4839: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4839: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4839: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4839: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4840: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4840: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4841: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4841: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4841: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4841: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4841: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4841: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4842: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4842: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4843: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4843: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4843: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4843: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4843: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4843: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4844: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4844: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4845: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4845: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4845: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4845: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4845: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4845: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4846: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4846: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4847: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4847: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4847: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4847: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4847: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4847: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4848: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4848: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4849: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4849: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4849: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4849: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4849: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4849: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4850: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4850: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4851: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4851: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4851: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4851: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4851: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4851: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4852: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4852: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4853: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4853: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4853: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4853: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4854: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4854: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4855: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4855: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4855: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4855: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4856: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4856: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4857: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4857: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4857: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4857: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4858: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4858: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4859: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4859: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4859: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4859: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4861: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4861: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4862: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4862: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4863: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4863: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4864: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4864: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4865: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4865: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4866: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4866: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4867: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4867: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4868: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4868: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4869: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4869: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4869: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4869: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4870: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4870: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4870: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4870: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4871: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4871: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4871: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4871: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4872: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4872: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4872: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4872: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4873: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4873: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4873: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4873: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4874: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4874: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4874: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4874: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4875: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4875: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4875: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4875: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4876: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4876: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4876: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4876: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4877: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4877: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4877: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4877: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4878: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4878: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4878: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4878: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4879: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4879: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4879: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4879: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4880: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4880: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4880: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4880: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4881: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4881: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4881: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4881: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4882: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4882: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4882: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4882: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4883: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4883: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4883: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4883: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4884: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4884: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4884: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4884: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4885: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4885: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4886: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4886: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4887: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4887: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4888: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4888: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4889: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4889: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4890: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4890: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4891: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4891: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4892: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4892: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4894: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4894: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4895: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4895: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4896: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4896: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4897: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4897: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4898: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4898: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4899: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4899: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4900: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4900: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4901: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4901: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4902: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4902: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4902: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4902: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4903: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4903: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4903: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4903: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4904: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4904: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4904: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4904: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4905: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4905: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4905: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4905: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4906: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4906: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4906: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4906: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4907: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4907: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4907: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4907: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4908: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4908: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4908: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4908: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4909: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4909: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4909: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4909: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4910: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4910: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4910: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4910: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4911: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4911: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4911: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4911: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4912: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4912: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4912: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4912: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4913: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4913: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4913: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4913: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4914: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4914: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4914: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4914: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4915: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4915: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4915: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4915: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4916: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4916: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4916: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4916: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4917: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4917: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4917: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4917: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4918: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4918: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4919: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4919: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4920: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4920: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4921: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4921: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4922: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4922: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4923: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4923: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4924: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4924: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4925: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4925: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4927: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4927: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4928: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4928: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4928: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4928: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4929: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4929: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4930: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4930: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4930: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4930: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4931: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4931: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4932: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4932: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4932: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4932: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4933: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4933: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4934: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4934: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4934: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4934: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4935: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4935: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4936: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4936: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4936: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4936: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4936: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4936: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4937: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4937: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4938: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4938: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4938: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4938: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4938: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4938: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4939: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4939: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4940: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4940: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4940: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4940: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4940: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4940: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4941: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4941: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4942: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4942: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4942: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4942: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4942: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4942: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4943: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4943: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4944: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4944: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4944: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4944: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4944: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4944: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4945: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4945: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4946: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4946: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4946: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4946: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4946: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4946: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4947: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4947: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4948: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4948: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4948: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4948: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4948: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4948: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4949: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4949: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4950: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4950: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4950: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4950: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4950: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4950: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4951: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4951: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4952: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4952: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4952: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4952: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4953: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4953: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4954: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4954: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4954: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4954: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4955: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4955: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4956: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4956: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4956: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4956: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4957: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4957: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4958: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4958: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4958: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4958: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:4960: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4960: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4961: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4961: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4962: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4962: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4963: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4963: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4964: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4964: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4965: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4965: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4966: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4966: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4967: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4967: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4968: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4968: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4968: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4969: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4969: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4969: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4969: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4970: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4970: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4970: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4971: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4971: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4971: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4971: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4972: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4972: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4972: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4973: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4973: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4973: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4973: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4974: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4974: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4974: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4975: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4975: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4975: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4975: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:4976: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4976: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4977: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4977: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4978: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4978: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4979: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4979: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4980: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4980: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4981: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4981: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4982: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4982: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4983: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4983: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4984: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4984: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4985: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4985: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4986: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4986: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4987: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4987: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4988: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4988: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4989: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4989: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4990: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4990: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4991: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4991: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4993: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4993: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4994: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4994: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4995: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4995: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4996: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4996: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4997: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4997: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4998: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4998: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4999: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:4999: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5000: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5000: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5001: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5001: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5001: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5002: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5002: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5002: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5002: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5003: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5003: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5003: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5004: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5004: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5004: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5004: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5005: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5005: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5005: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5006: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5006: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5006: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5006: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5007: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5007: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5007: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5008: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5008: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5008: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5008: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5009: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5009: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5010: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5010: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5011: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5011: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5012: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5012: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5013: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5013: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5014: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5014: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5015: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5015: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5016: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5016: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5017: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5017: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5018: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5018: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5019: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5019: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5020: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5020: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5021: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5021: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5022: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5022: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5023: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5023: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5024: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5024: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5026: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5026: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5026: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5026: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5027: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5027: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5027: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5027: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5028: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5028: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5028: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5028: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5029: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5029: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5029: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5029: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5030: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5030: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5030: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5030: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5031: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5031: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5031: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5031: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5032: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5032: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5032: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5032: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5033: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5033: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5033: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5033: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5034: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5034: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5034: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5034: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5034: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5034: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5035: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5035: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5035: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5035: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5035: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5035: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5036: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5036: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5036: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5036: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5036: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5036: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5037: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5037: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5037: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5037: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5037: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5037: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5038: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5038: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5038: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5038: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5038: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5038: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5039: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5039: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5039: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5039: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5039: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5039: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5040: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5040: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5040: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5040: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5040: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5040: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5041: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5041: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5041: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5041: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5041: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5041: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5042: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5042: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5042: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5042: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5043: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5043: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5043: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5043: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5044: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5044: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5044: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5044: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5045: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5045: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5045: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5045: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5046: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5046: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5046: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5046: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5047: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5047: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5047: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5047: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5048: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5048: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5048: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5048: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5049: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5049: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5049: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5049: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5050: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5050: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5050: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5050: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5051: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5051: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5051: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5051: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5052: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5052: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5052: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5052: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5053: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5053: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5053: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5053: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5054: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5054: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5054: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5054: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5055: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5055: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5055: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5055: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5056: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5056: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5056: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5056: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5057: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5057: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5057: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5057: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5059: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5059: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5060: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5060: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5061: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5061: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5062: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5062: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5063: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5063: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5064: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5064: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5065: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5065: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5066: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5066: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5067: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5067: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5067: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5067: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5067: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5068: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5068: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5068: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5068: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5068: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5069: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5069: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5069: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5069: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5069: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5070: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5070: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5070: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5070: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5070: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5071: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5071: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5071: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5071: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5071: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5072: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5072: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5072: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5072: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5072: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5073: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5073: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5073: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5073: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5073: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5074: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5074: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5074: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5074: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5074: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5075: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5075: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5075: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5075: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5075: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5076: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5076: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5076: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5076: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5076: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5077: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5077: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5077: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5077: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5077: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5078: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5078: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5078: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5078: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5078: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5079: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5079: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5079: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5079: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5079: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5080: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5080: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5080: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5080: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5080: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5081: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5081: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5081: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5081: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5081: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5082: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5082: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5082: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5082: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5082: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5083: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5083: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5083: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5084: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5084: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5084: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5085: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5085: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5085: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5086: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5086: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5086: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5087: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5087: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5087: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5088: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5088: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5088: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5089: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5089: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5089: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5090: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5090: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5090: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5092: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5092: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5093: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5093: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5094: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5094: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5095: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5095: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5096: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5096: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5097: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5097: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5098: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5098: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5099: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5099: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5100: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5100: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5100: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5100: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5100: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5101: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5101: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5101: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5101: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5101: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5102: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5102: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5102: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5102: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5102: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5103: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5103: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5103: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5103: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5103: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5104: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5104: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5104: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5104: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5104: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5105: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5105: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5105: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5105: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5105: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5106: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5106: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5106: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5106: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5106: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5107: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5107: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5107: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5107: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5107: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5108: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5108: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5108: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5108: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5108: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5109: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5109: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5109: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5109: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5109: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5110: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5110: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5110: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5110: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5110: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5111: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5111: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5111: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5111: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5111: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5112: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5112: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5112: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5112: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5112: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5113: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5113: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5113: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5113: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5113: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5114: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5114: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5114: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5114: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5114: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5115: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5115: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5115: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5115: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5115: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5116: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5116: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5116: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5117: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5117: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5117: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5118: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5118: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5118: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5119: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5119: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5119: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5120: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5120: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5120: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5121: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5121: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5121: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5122: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5122: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5122: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5123: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5123: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5123: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5125: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5125: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5125: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5125: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5126: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5126: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5126: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5126: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5127: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5127: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5127: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5127: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5128: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5128: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5128: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5128: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5129: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5129: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5129: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5129: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5130: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5130: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5130: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5130: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5131: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5131: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5131: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5131: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5132: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5132: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5132: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5132: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5133: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5133: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5133: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5133: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5133: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5133: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5133: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5134: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5134: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5134: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5134: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5134: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5134: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5134: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5135: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5135: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5135: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5135: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5135: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5135: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5135: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5136: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5136: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5136: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5136: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5136: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5136: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5136: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5137: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5137: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5137: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5137: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5137: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5137: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5137: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5138: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5138: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5138: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5138: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5138: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5138: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5138: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5139: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5139: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5139: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5139: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5139: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5139: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5139: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5140: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5140: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5140: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5140: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5140: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5140: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5140: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5141: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5141: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5141: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5141: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5141: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5141: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5141: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5142: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5142: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5142: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5142: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5142: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5142: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5142: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5143: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5143: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5143: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5143: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5143: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5143: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5143: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5144: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5144: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5144: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5144: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5144: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5144: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5144: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5145: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5145: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5145: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5145: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5145: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5145: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5145: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5146: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5146: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5146: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5146: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5146: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5146: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5146: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5147: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5147: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5147: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5147: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5147: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5147: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5147: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5148: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5148: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5148: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5148: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5148: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5148: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5148: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5149: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5149: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5149: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5149: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5149: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5150: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5150: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5150: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5150: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5150: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5151: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5151: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5151: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5151: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5151: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5152: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5152: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5152: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5152: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5152: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5153: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5153: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5153: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5153: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5153: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5154: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5154: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5154: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5154: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5154: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5155: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5155: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5155: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5155: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5155: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5156: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5156: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5156: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5156: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5156: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5158: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5158: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5159: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5159: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5160: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5160: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5161: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5161: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5162: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5162: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5163: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5163: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5164: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5164: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5165: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5165: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5166: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5166: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5166: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5166: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5166: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5167: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5167: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5167: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5167: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5167: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5168: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5168: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5168: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5168: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5168: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5169: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5169: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5169: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5169: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5169: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5170: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5170: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5170: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5170: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5170: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5171: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5171: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5171: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5171: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5171: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5172: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5172: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5172: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5172: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5172: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5173: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5173: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5173: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5173: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5173: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5174: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5174: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5174: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5174: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5174: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5175: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5175: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5175: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5175: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5175: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5176: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5176: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5176: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5176: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5176: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5177: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5177: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5177: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5177: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5177: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5178: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5178: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5178: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5178: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5178: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5179: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5179: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5179: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5179: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5179: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5180: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5180: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5180: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5180: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5180: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5181: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5181: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5181: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5181: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5181: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5182: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5182: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5182: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5183: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5183: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5183: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5184: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5184: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5184: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5185: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5185: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5185: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5186: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5186: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5186: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5187: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5187: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5187: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5188: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5188: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5188: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5189: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5189: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5189: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5191: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5191: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5192: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5192: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5193: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5193: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5194: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5194: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5195: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5195: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5196: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5196: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5197: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5197: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5198: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5198: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5199: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5199: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5199: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5199: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5199: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5200: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5200: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5200: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5200: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5200: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5201: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5201: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5201: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5201: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5201: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5202: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5202: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5202: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5202: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5202: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5203: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5203: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5203: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5203: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5203: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5204: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5204: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5204: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5204: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5204: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5205: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5205: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5205: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5205: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5205: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5206: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5206: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5206: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5206: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5206: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5207: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5207: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5207: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5207: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5207: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5208: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5208: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5208: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5208: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5208: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5209: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5209: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5209: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5209: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5209: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5210: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5210: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5210: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5210: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5210: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5211: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5211: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5211: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5211: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5211: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5212: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5212: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5212: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5212: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5212: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5213: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5213: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5213: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5213: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5213: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5214: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5214: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5214: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5214: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5214: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5215: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5215: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5215: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5216: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5216: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5216: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5217: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5217: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5217: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5218: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5218: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5218: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5219: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5219: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5219: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5220: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5220: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5220: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5221: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5221: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5221: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5222: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5222: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5222: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5224: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5224: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5224: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5224: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5225: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5225: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5225: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5225: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5226: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5226: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5226: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5226: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5227: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5227: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5227: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5227: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5228: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5228: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5228: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5228: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5229: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5229: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5229: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5229: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5230: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5230: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5230: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5230: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5231: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5231: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5231: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5231: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5232: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5232: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5232: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5232: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5232: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5232: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5232: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5233: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5233: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5233: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5233: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5233: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5233: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5233: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5234: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5234: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5234: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5234: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5234: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5234: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5234: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5235: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5235: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5235: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5235: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5235: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5235: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5235: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5236: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5236: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5236: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5236: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5236: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5236: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5236: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5237: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5237: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5237: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5237: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5237: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5237: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5237: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5238: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5238: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5238: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5238: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5238: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5238: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5238: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5239: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5239: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5239: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5239: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5239: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5239: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5239: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5240: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5240: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5240: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5240: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5240: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5240: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5240: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5241: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5241: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5241: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5241: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5241: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5241: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5241: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5242: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5242: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5242: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5242: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5242: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5242: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5242: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5243: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5243: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5243: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5243: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5243: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5243: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5243: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5244: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5244: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5244: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5244: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5244: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5244: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5244: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5245: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5245: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5245: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5245: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5245: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5245: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5245: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5246: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5246: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5246: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5246: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5246: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5246: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5246: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5247: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5247: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5247: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5247: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5247: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5247: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5247: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5248: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5248: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5248: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5248: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5248: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5249: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5249: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5249: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5249: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5249: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5250: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5250: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5250: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5250: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5250: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5251: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5251: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5251: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5251: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5251: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5252: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5252: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5252: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5252: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5252: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5253: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5253: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5253: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5253: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5253: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5254: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5254: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5254: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5254: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5254: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5255: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5255: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5255: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5255: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5255: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5257: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5257: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5258: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5258: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5259: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5259: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5260: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5260: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5261: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5261: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5262: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5262: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5263: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5263: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5264: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5264: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5265: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5265: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5265: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5265: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5265: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5266: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5266: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5266: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5266: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5266: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5267: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5267: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5267: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5267: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5267: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5268: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5268: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5268: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5268: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5268: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5269: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5269: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5269: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5269: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5269: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5270: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5270: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5270: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5270: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5270: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5271: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5271: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5271: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5271: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5271: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5272: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5272: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5272: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5272: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5272: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5273: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5273: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5273: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5274: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5274: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5274: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5275: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5275: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5275: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5276: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5276: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5276: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5277: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5277: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5277: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5278: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5278: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5278: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5279: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5279: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5279: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5280: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5280: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5280: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5281: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5281: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5281: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5282: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5282: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5282: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5283: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5283: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5283: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5284: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5284: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5284: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5285: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5285: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5285: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5286: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5286: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5286: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5287: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5287: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5287: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5288: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5288: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5288: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5290: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5290: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5291: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5291: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5292: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5292: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5293: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5293: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5294: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5294: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5295: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5295: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5296: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5296: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5297: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5297: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5298: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5298: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5298: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5298: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5298: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5299: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5299: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5299: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5299: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5299: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5300: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5300: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5300: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5300: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5300: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5301: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5301: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5301: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5301: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5301: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5302: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5302: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5302: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5302: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5302: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5303: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5303: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5303: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5303: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5303: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5304: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5304: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5304: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5304: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5304: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5305: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5305: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5305: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5305: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5305: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5306: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5306: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5306: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5307: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5307: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5307: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5308: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5308: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5308: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5309: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5309: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5309: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5310: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5310: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5310: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5311: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5311: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5311: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5312: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5312: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5312: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5313: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5313: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5313: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5314: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5314: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5314: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5315: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5315: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5315: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5316: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5316: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5316: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5317: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5317: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5317: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5318: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5318: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5318: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5319: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5319: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5319: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5320: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5320: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5320: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5321: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5321: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5321: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5323: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5323: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5323: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5323: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5324: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5324: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5324: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5324: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5325: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5325: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5325: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5325: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5326: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5326: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5326: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5326: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5327: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5327: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5327: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5327: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5328: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5328: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5328: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5328: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5329: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5329: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5329: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5329: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5330: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5330: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5330: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5330: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5331: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5331: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5331: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5331: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5331: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5331: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5331: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5332: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5332: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5332: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5332: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5332: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5332: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5332: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5333: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5333: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5333: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5333: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5333: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5333: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5333: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5334: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5334: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5334: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5334: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5334: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5334: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5334: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5335: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5335: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5335: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5335: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5335: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5335: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5335: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5336: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5336: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5336: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5336: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5336: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5336: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5336: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5337: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5337: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5337: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5337: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5337: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5337: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5337: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5338: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5338: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5338: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5338: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5338: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5338: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5338: warning: dword data exceeds bounds -w+number-overflow
+./travis/test/riprel.asm:5339: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5339: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5339: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5339: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5339: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5340: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5340: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5340: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5340: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5340: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5341: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5341: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5341: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5341: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5341: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5342: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5342: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5342: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5342: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5342: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5343: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5343: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5343: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5343: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5343: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5344: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5344: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5344: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5344: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5344: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5345: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5345: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5345: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5345: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5345: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5346: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5346: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5346: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5346: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5346: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5347: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5347: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5347: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5347: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5347: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5348: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5348: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5348: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5348: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5348: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5349: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5349: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5349: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5349: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5349: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5350: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5350: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5350: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5350: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5350: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5351: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5351: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5351: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5351: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5351: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5352: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5352: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5352: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5352: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5352: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5353: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5353: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5353: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5353: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5353: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5354: warning: absolute address can not be RIP-relative -w+ea-absolute
+./travis/test/riprel.asm:5354: warning: displacement size ignored on absolute address -w+ea-dispsize
+./travis/test/riprel.asm:5354: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5354: warning: es segment base generated, but will be ignored in 64-bit mode -w+prefix-seg
+./travis/test/riprel.asm:5354: warning: displacement size ignored on absolute address -w+ea-dispsize

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/riprel2.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/riprel2.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/riprel2.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/selfref.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/selfref.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/selfref.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/sha-64.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/sha-64.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/sha-64.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/sha.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/sha.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/sha.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/smartalign.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/smartalign16.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/smartalign16.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/smartalign32.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/smartalign32.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/smartalign64.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/smartalign64.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/splitea.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/splitea.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/splitea.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/sreg.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/sreg.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/sreg.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ssesize.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ssesize.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/ssesize.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/strlen.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/strlen.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/strlen.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/struc.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/struc.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/struc.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/test67.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/test67.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/test67.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/testdos.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/testdos.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/testdos.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/testnos3.asm Added

@@ -0,0 +1,971 @@
+; Double-precision floating point tests, derived from Fred Tydeman's posting
+; of 26 February 1996 to comp.arch.arithmetic, via David M. Gay's gdtoa
+; package.
+;
+	bits 64
+
+	dq	9.e0306
+	dq	0x7fa9a2028368022e
+
+	dq	4.e-079
+	dq	0x2fa7b6d71d20b96c
+
+	dq	7.e-261
+	dq	0x09eb8d7e32be6396
+
+	dq	6.e-025
+	dq	0x3ae7361cb863de62
+
+	dq	7.e-161
+	dq	0x1eaf7e0db3799aa3
+
+	dq	7.e0289
+	dq	0x7c1cbb547777a285
+
+	dq	5.e0079
+	dq	0x507afcef51f0fb5f
+
+	dq	1.e0080
+	dq	0x508afcef51f0fb5f
+
+	dq	7.e-303
+	dq	0x0133339131c46f8b
+
+	dq	5.e0152
+	dq	0x5fa317e5ef3ab327
+
+	dq	5.e0125
+	dq	0x5a07a2ecc414a03f
+
+	dq	2.e0126
+	dq	0x5a27a2ecc414a03f
+
+	dq	7.e-141
+	dq	0x22d5570f59bd178c
+
+	dq	4.e-192
+	dq	0x18323ff06eea847a
+
+	dq	9.e0043
+	dq	0x49102498ea6df0c4
+
+	dq	1.e0303
+	dq	0x7ed754e31cd072da
+
+	dq	95.e-089
+	dq	0x2dde3cbc9907fdc8
+
+	dq	85.e0194
+	dq	0x689d1c26db7d0dae
+
+	dq	69.e0267
+	dq	0x77c0b7cb60c994da
+
+	dq	97.e-019
+	dq	0x3c665dde8e688ba6
+
+	dq	37.e0046
+	dq	0x49d033d7eca0adef
+
+	dq	74.e0046
+	dq	0x49e033d7eca0adef
+
+	dq	61.e-099
+	dq	0x2bc0ad836f269a17
+
+	dq	53.e-208
+	dq	0x151b39ae1909c31b
+
+	dq	93.e-234
+	dq	0x0fc27b2e4f210075
+
+	dq	79.e-095
+	dq	0x2c9a5db812948281
+
+	dq	87.e-274
+	dq	0x0772d36cf48e7abd
+
+	dq	83.e0025
+	dq	0x4585747ab143e353
+
+	dq	17.e-036
+	dq	0x38b698ccdc60015a
+
+	dq	53.e0033
+	dq	0x47246a3418629ef6
+
+	dq	51.e-074
+	dq	0x30ecd5bee57763e6
+
+	dq	63.e-022
+	dq	0x3bbdc03b8fd7016a
+
+	dq	839.e0143
+	dq	0x5e3ae03f245703e2
+
+	dq	749.e-182
+	dq	0x1abf14727744c63e
+
+	dq	999.e-026
+	dq	0x3b282782afe1869e
+
+	dq	345.e0266
+	dq	0x77b0b7cb60c994da
+
+	dq	914.e-102
+	dq	0x2b5ffc81bc29f02b
+
+	dq	829.e0102
+	dq	0x55b7221a79cdd1d9
+
+	dq	307.e0090
+	dq	0x5322d6b183fe4b55
+
+	dq	859.e0182
+	dq	0x6654374d8b87ac63
+
+	dq	283.e0085
+	dq	0x5216c309024bab4b
+
+	dq	589.e0187
+	dq	0x675526be9c22eb17
+
+	dq	302.e0176
+	dq	0x64fdcf7df8f573b7
+
+	dq	604.e0176
+	dq	0x650dcf7df8f573b7
+
+	dq	761.e-244
+	dq	0x0de03cea3586452e
+
+	dq	647.e0230
+	dq	0x7044d64d4079150c
+
+	dq	755.e0174
+	dq	0x64a7d93193f78fc6
+
+	dq	255.e-075
+	dq	0x30dcd5bee57763e6
+
+	dq	3391.e0055
+	dq	0x4c159bd3ad46e346
+
+	dq	4147.e-015
+	dq	0x3d923d1b5eb1d778
+
+	dq	3996.e-026
+	dq	0x3b482782afe1869e
+
+	dq	1998.e-026
+	dq	0x3b382782afe1869e
+
+	dq	3338.e-296
+	dq	0x0335519ac5142aab
+
+	dq	1669.e-296
+	dq	0x0325519ac5142aab
+
+	dq	8699.e-276
+	dq	0x0772d2df246ecd2d
+
+	dq	5311.e0243
+	dq	0x73284e91f4aa0fdb
+
+	dq	7903.e-096
+	dq	0x2cd07c2d27a5b989
+
+	dq	7611.e-226
+	dq	0x11d19b8744033457
+
+	dq	3257.e0058
+	dq	0x4cb444b34a6fb3eb
+
+	dq	6514.e0058
+	dq	0x4cc444b34a6fb3eb
+
+	dq	3571.e0263
+	dq	0x77462644c61d41aa
+
+	dq	7142.e0263
+	dq	0x77562644c61d41aa
+
+	dq	5311.e0242
+	dq	0x72f3720e5d54d97c
+
+	dq	1617.e-063
+	dq	0x3384c98fce16152e
+
+	dq	51881.e0037
+	dq	0x4897d2950dc76da4
+
+	dq	31441.e-118
+	dq	0x285ef890f5de4c86
+
+	dq	30179.e0079
+	dq	0x5143e272a77478e8
+
+	dq	60358.e0079
+	dq	0x5153e272a77478e8
+
+	dq	63876.e-020
+	dq	0x3cc703856844bdbf
+
+	dq	31938.e-020
+	dq	0x3cb703856844bdbf
+
+	dq	46073.e-032
+	dq	0x3a42405b773fbdf3
+
+	dq	32941.e0051
+	dq	0x4b757eb8ad52a5c9
+
+	dq	82081.e0041
+	dq	0x49770105df3d47cb
+
+	dq	38701.e-215
+	dq	0x1440492a4a8a37fd
+
+	dq	62745.e0047
+	dq	0x4ab0c52fe6dc6a1b
+
+	dq	12549.e0048
+	dq	0x4ac0c52fe6dc6a1b
+
+	dq	64009.e-183
+	dq	0x1af099b393b84832
+
+	dq	89275.e0261
+	dq	0x77262644c61d41aa
+
+	dq	75859.e0025
+	dq	0x46232645e1ba93f0
+
+	dq	57533.e0287
+	dq	0x7c8272ed2307f56a
+
+	dq	584169.e0229
+	dq	0x70ad657059dc79aa
+
+	dq	940189.e-112
+	dq	0x29eb99d6240c1a28
+
+	dq	416121.e0197
+	dq	0x6a00fd07ed297f80
+
+	dq	832242.e0197
+	dq	0x6a10fd07ed297f80
+
+	dq	584738.e0076
+	dq	0x50e8a85eb277e645
+
+	dq	933587.e-140
+	dq	0x241b248728b9c117
+
+	dq	252601.e0121
+	dq	0x5a2dda592e398dd7
+
+	dq	358423.e0274
+	dq	0x79f9463b59b8f2bd
+
+	dq	892771.e-213
+	dq	0x14f25818c7294f27
+
+	dq	410405.e0040
+	dq	0x49670105df3d47cb
+
+	dq	928609.e-261
+	dq	0x0afbe2dd66200bef
+
+	dq	302276.e-254
+	dq	0x0c55a462d91c6ab3
+
+	dq	920657.e-023
+	dq	0x3c653a9985dbde6c
+
+	dq	609019.e-025
+	dq	0x3bf1f99e11ea0a24
+
+	dq	252601.e0120
+	dq	0x59f7e1e0f1c7a4ac
+
+	dq	654839.e-060
+	dq	0x34b00e7db3b3f242
+
+	dq	8823691.e0130
+	dq	0x5c5e597c0b94b7ae
+
+	dq	2920845.e0228
+	dq	0x709d657059dc79aa
+
+	dq	9210917.e0080
+	dq	0x51fda232347e6032
+
+	dq	5800419.e-303
+	dq	0x026e58ffa48f4fce
+
+	dq	6119898.e-243
+	dq	0x0ee3ecf22ea07863
+
+	dq	3059949.e-243
+	dq	0x0ed3ecf22ea07863
+
+	dq	2572231.e0223
+	dq	0x6f90f73be1dff9ad
+
+	dq	5444097.e-021
+	dq	0x3cf8849dd33c95af
+
+	dq	5783893.e-127
+	dq	0x26f7e5902ce0e151
+
+	dq	3865421.e-225
+	dq	0x1295d4fe53afec65
+
+	dq	4590831.e0156
+	dq	0x61b4689b4a5fa201
+
+	dq	9181662.e0156
+	dq	0x61c4689b4a5fa201
+
+	dq	5906361.e-027
+	dq	0x3bbbe45a312d08a0
+
+	dq	7315057.e0235
+	dq	0x7225f0d408362a72
+
+	dq	9088115.e0106
+	dq	0x5762e51a84a3c6a0
+
+	dq	1817623.e0107
+	dq	0x5772e51a84a3c6a0
+
+	dq	44118455.e0129
+	dq	0x5c4e597c0b94b7ae
+
+	dq	35282041.e0293
+	dq	0x7e5512d5273e62e8
+
+	dq	31279898.e-291
+	dq	0x05129b01b6885d36
+
+	dq	15639949.e-291
+	dq	0x05029b01b6885d36
+
+	dq	27966061.e0145
+	dq	0x5f955bcf72fd10f9
+
+	dq	55932122.e0145
+	dq	0x5fa55bcf72fd10f9
+
+	dq	70176353.e-053
+	dq	0x36900683a21de855
+
+	dq	40277543.e-032
+	dq	0x3adf29ca0ff893b1
+
+	dq	50609263.e0157
+	dq	0x622193aff1f1c8e3
+
+	dq	66094077.e0077
+	dq	0x518b37c4b7928317
+
+	dq	84863171.e0114
+	dq	0x59406e98f5ec8f37
+
+	dq	89396333.e0264
+	dq	0x786526f061ca9053
+
+	dq	87575437.e-309
+	dq	0x016e07320602056c
+
+	dq	78693511.e-044
+	dq	0x3870bc7b7603a2ca
+
+	dq	90285923.e-206
+	dq	0x16d1470083f89d48
+
+	dq	30155207.e-030
+	dq	0x3b423a4ad20748a2
+
+	dq	245540327.e0121
+	dq	0x5acc569e968e0944
+
+	dq	263125459.e0287
+	dq	0x7d44997a298b2f2e
+
+	dq	566446538.e-257
+	dq	0x0c64472ba9550e86
+
+	dq	283223269.e-257
+	dq	0x0c54472ba9550e86
+
+	dq	245540327.e0122
+	dq	0x5b01b6231e18c5cb
+
+	dq	491080654.e0122
+	dq	0x5b11b6231e18c5cb
+
+	dq	971212611.e-126
+	dq	0x27a397d3c9745d2f
+
+	dq	229058583.e0052
+	dq	0x4c76ce94febdc7a5
+
+	dq	325270231.e0039
+	dq	0x49cc7ccf90c9f8ab
+
+	dq	989648089.e-035
+	dq	0x3a8880a3d515e849
+
+	dq	653777767.e0273
+	dq	0x7a720223f2b3a881
+
+	dq	923091487.e0209
+	dq	0x6d30bc60e6896717
+
+	dq	526250918.e0288
+	dq	0x7d89bfd8b3edfafa
+
+	dq	350301748.e-309
+	dq	0x018e07320602056c
+
+	dq	741111169.e-203
+	dq	0x17a14fe7daf8f3ae
+
+	dq	667284113.e-240
+	dq	0x0ff09355f8050c02
+
+	dq	1227701635.e0120
+	dq	0x5abc569e968e0944
+
+	dq	9981396317.e-182
+	dq	0x1c38afe10a2a66aa
+
+	dq	5232604057.e-298
+	dq	0x041465b896c24520
+
+	dq	5572170023.e-088
+	dq	0x2fb0847822f765b2
+
+	dq	1964322616.e0122
+	dq	0x5b31b6231e18c5cb
+
+	dq	3928645232.e0122
+	dq	0x5b41b6231e18c5cb
+
+	dq	8715380633.e-058
+	dq	0x35f4614c3219891f
+
+	dq	4856063055.e-127
+	dq	0x279397d3c9745d2f
+
+	dq	8336960483.e-153
+	dq	0x223a06a1024b95e1
+
+	dq	1007046393.e-155
+	dq	0x21a01891fc4717fd
+
+	dq	5378822089.e-176
+	dq	0x1d695fd4c88d4b1b
+
+	dq	5981342308.e-190
+	dq	0x1a83db11ac608107
+
+	dq	7214782613.e-086
+	dq	0x3020b552d2edcdea
+
+	dq	5458466829.e0142
+	dq	0x5f70acde6a98eb4c
+
+	dq	9078555839.e-109
+	dq	0x2b5fc575867314ee
+
+	dq	6418488827.e0079
+	dq	0x526021f14ed7b3fa
+
+	dq	65325840981.e0069
+	dq	0x5081a151ddbd3c4a
+
+	dq	49573485983.e0089
+	dq	0x54a221bd871d2cf4
+
+	dq	46275205733.e0074
+	dq	0x51830e6c7d4e3480
+
+	dq	92550411466.e0074
+	dq	0x51930e6c7d4e3480
+
+	dq	41129842097.e-202
+	dq	0x1832c3e72d179607
+
+	dq	93227267727.e-049
+	dq	0x380960fe08d5847f
+
+	dq	41297294357.e0185
+	dq	0x688c49437fccfadb
+
+	dq	41534892987.e-067
+	dq	0x343a12666477886d
+
+	dq	42333842451.e0201
+	dq	0x6be0189a26df575f
+
+	dq	78564021519.e-227
+	dq	0x131155515fd37265
+
+	dq	53587107423.e-061
+	dq	0x35800a19a3ffd981
+
+	dq	53827010643.e-200
+	dq	0x18a32fa69a69bd6d
+
+	dq	83356057653.e0193
+	dq	0x6a4544e6daee2a18
+
+	dq	45256834646.e-118
+	dq	0x29a541ecdfd48694
+
+	dq	45392779195.e-110
+	dq	0x2b4fc575867314ee
+
+	dq	23934638219.e0291
+	dq	0x7e81deaf40ead9a0
+
+	dq	995779191233.e0113
+	dq	0x59e2d44edcc51304
+
+	dq	997422852243.e-265
+	dq	0x0b676688faee99bc
+
+	dq	653532977297.e-123
+	dq	0x28d925a0aabcdc68
+
+	dq	938885684947.e0147
+	dq	0x60f11894b202e9f4
+
+	dq	619534293513.e0124
+	dq	0x5c210c20303fe0f1
+
+	dq	539879452414.e-042
+	dq	0x39a5e66dc3d6bdb5
+
+	dq	742522891517.e0259
+	dq	0x782c1c352fc3c309
+
+	dq	254901016865.e-022
+	dq	0x3dbc06d366394441
+
+	dq	685763015669.e0280
+	dq	0x7c85fd7aa44d9477
+
+	dq	384865004907.e-285
+	dq	0x072aa65b58639e69
+
+	dq	286556458711.e0081
+	dq	0x5321958b36c5102b
+
+	dq	573112917422.e0081
+	dq	0x5331958b36c5102b
+
+	dq	769525178383.e-150
+	dq	0x234253ec0e161420
+
+	dq	416780288265.e0192
+	dq	0x6a3544e6daee2a18
+
+	dq	226963895975.e-111
+	dq	0x2b3fc575867314ee
+
+	dq	665592809339.e0063
+	dq	0x4f778b6516c2b478
+
+	dq	3891901811465.e0217
+	dq	0x6f99ab8261990292
+
+	dq	4764593340755.e0069
+	dq	0x50e4177a9915fbf8
+
+	dq	6336156586177.e0269
+	dq	0x7a7173f76c63b792
+
+	dq	8233559360849.e0095
+	dq	0x56566fee05649a7a
+
+	dq	3662265515198.e-107
+	dq	0x2c538e6edd48f2a3
+
+	dq	1831132757599.e-107
+	dq	0x2c438e6edd48f2a3
+
+	dq	7812878489261.e-179
+	dq	0x1d726dae7bbeda75
+
+	dq	6363857920591.e0145
+	dq	0x60b28a61cf9483b7
+
+	dq	8811915538555.e0082
+	dq	0x53a51f508b287ae7
+
+	dq	9997878507563.e-195
+	dq	0x1a253db2fea1ea31
+
+	dq	9224786422069.e-291
+	dq	0x0634ee5d56b32957
+
+	dq	6284426329974.e-294
+	dq	0x058d3409dfbca26f
+
+	dq	9199302046091.e-062
+	dq	0x35c135972630774c
+
+	dq	6070482281213.e-122
+	dq	0x29423fa9e6fcf47e
+
+	dq	2780161250963.e-301
+	dq	0x0405acc2053064c2
+
+	dq	8233559360849.e0094
+	dq	0x5621f324d11d4862
+
+	dq	72027097041701.e0206
+	dq	0x6d94677812d3a606
+
+	dq	97297545286625.e0215
+	dq	0x6f79ab8261990292
+
+	dq	99021992302453.e-025
+	dq	0x3da5c6714def374c
+
+	dq	54104687080198.e-022
+	dq	0x3e373cdf8db7a7bc
+
+	dq	33519685743233.e0089
+	dq	0x5537f203339c9629
+
+	dq	67039371486466.e0089
+	dq	0x5547f203339c9629
+
+	dq	39064392446305.e-180
+	dq	0x1d626dae7bbeda75
+
+	dq	17796979903653.e0261
+	dq	0x78e072f3819c1321
+
+	dq	28921916763211.e0038
+	dq	0x4a9eebabe0957af3
+
+	dq	87605699161665.e0155
+	dq	0x6302920f96e7f9ef
+
+	dq	41921560615349.e-067
+	dq	0x34d9b2a5c4041e4b
+
+	dq	80527976643809.e0061
+	dq	0x4f7c7c5aea080a49
+
+	dq	72335858886654.e-159
+	dq	0x21cce77c2b3328fc
+
+	dq	52656615219377.e0102
+	dq	0x57f561def4a9ee32
+
+	dq	15400733123779.e-072
+	dq	0x33b8bf7e7fa6f02a
+
+	dq	77003665618895.e-073
+	dq	0x33a8bf7e7fa6f02a
+
+	dq	475603213226859.e-042
+	dq	0x3a42d73088f4050a
+
+	dq	972708181182949.e0116
+	dq	0x5b218a7f36172332
+
+	dq	246411729980464.e-071
+	dq	0x342eef5e1f90ac34
+
+	dq	123205864990232.e-071
+	dq	0x341eef5e1f90ac34
+
+	dq	609610927149051.e-255
+	dq	0x0e104273b18918b1
+
+	dq	475603213226859.e-041
+	dq	0x3a778cfcab31064d
+
+	dq	672574798934795.e0065
+	dq	0x508226c684c87261
+
+	dq	134514959786959.e0066
+	dq	0x509226c684c87261
+
+	dq	294897574603217.e-151
+	dq	0x2395f2df5e675a0f
+
+	dq	723047919080275.e0036
+	dq	0x4a7eebabe0957af3
+
+	dq	660191429952702.e-088
+	dq	0x30bddc7e975c5045
+
+	dq	330095714976351.e-088
+	dq	0x30addc7e975c5045
+
+	dq	578686871093232.e-159
+	dq	0x21fce77c2b3328fc
+
+	dq	144671717773308.e-159
+	dq	0x21dce77c2b3328fc
+
+	dq	385018328094475.e-074
+	dq	0x3398bf7e7fa6f02a
+
+	dq	330095714976351.e-089
+	dq	0x3077e3987916a69e
+
+	dq	2215901545757777.e-212
+	dq	0x171a80a6e566428c
+
+	dq	1702061899637397.e-276
+	dq	0x09cacc46749dccfe
+
+	dq	1864950924021923.e0213
+	dq	0x6f53ae60753af6ca
+
+	dq	3729901848043846.e0213
+	dq	0x6f63ae60753af6ca
+
+	dq	7487252720986826.e-165
+	dq	0x20f8823a57adbef9
+
+	dq	3743626360493413.e-165
+	dq	0x20e8823a57adbef9
+
+	dq	4988915232824583.e0119
+	dq	0x5be5f6de9d5d6b5b
+
+	dq	3771476185376383.e0277
+	dq	0x7cae3c14d6916ce9
+
+	dq	6182410494241627.e-119
+	dq	0x2a81b96458445d07
+
+	dq	2572981889477453.e0142
+	dq	0x609dfc11fbf46087
+
+	dq	7793560217139653.e0051
+	dq	0x4dd280461b856ec5
+
+	dq	9163942927285259.e-202
+	dq	0x194fe601457dce4d
+
+	dq	6353227084707473.e0155
+	dq	0x63650aff653ffe8a
+
+	dq	4431803091515554.e-211
+	dq	0x176090684f5fe998
+
+	dq	9324754620109615.e0211
+	dq	0x6f0f7d6721f7f144
+
+	dq	8870461176410409.e0263
+	dq	0x79d90529a37b7e22
+
+	dq	90372559027740405.e0143
+	dq	0x612491daad0ba280
+
+	dq	18074511805548081.e0146
+	dq	0x61a011f2d73116f4
+
+	dq	54897030182071313.e0029
+	dq	0x496ec55666d8f9ec
+
+	dq	76232626624829156.e-032
+	dq	0x3ccb7738011e75fe
+
+	dq	59898021767894608.e-165
+	dq	0x2128823a57adbef9
+
+	dq	29949010883947304.e-165
+	dq	0x2118823a57adbef9
+
+	dq	26153245263757307.e0049
+	dq	0x4d83de005bd620df
+
+	dq	27176258005319167.e-261
+	dq	0x0d27c0747bd76fa1
+
+	dq	18074511805548081.e0147
+	dq	0x61d4166f8cfd5cb1
+
+	dq	24691002732654881.e-115
+	dq	0x2b759a2783ce70ab
+
+	dq	58483921078398283.e0057
+	dq	0x4f408ce499519ce3
+
+	dq	64409240769861689.e-159
+	dq	0x22692238f7987779
+
+	dq	94080055902682397.e-242
+	dq	0x11364981e39e66ca
+
+	dq	31766135423537365.e0154
+	dq	0x63550aff653ffe8a
+
+	dq	68985865317742005.e0164
+	dq	0x657a999ddec72aca
+
+	dq	13797173063548401.e0165
+	dq	0x658a999ddec72aca
+
+	dq	902042358290366539.e-281
+	dq	0x09522dc01ca1cb8c
+
+	dq	238296178309629163.e0272
+	dq	0x7c038fd93f1f5342
+
+	dq	783308178698887621.e0226
+	dq	0x72925ae62cb346d8
+
+	dq	439176241456570504.e0029
+	dq	0x499ec55666d8f9ec
+
+	dq	899810892172646163.e0283
+	dq	0x7e6adf51fa055e03
+
+	dq	926145344610700019.e-225
+	dq	0x14f307a67f1f69ff
+
+	dq	653831131593932675.e0047
+	dq	0x4d63de005bd620df
+
+	dq	130766226318786535.e0048
+	dq	0x4d73de005bd620df
+
+	dq	557035730189854663.e-294
+	dq	0x0693bfac6bc4767b
+
+	dq	902042358290366539.e-280
+	dq	0x0986b93023ca3e6f
+
+	dq	272104041512242479.e0200
+	dq	0x6d13bbb4bf05f087
+
+	dq	544208083024484958.e0200
+	dq	0x6d23bbb4bf05f087
+
+	dq	680429695511221511.e0192
+	dq	0x6b808ebc116f8a20
+
+	dq	308975121073410857.e0236
+	dq	0x7490db75cc001072
+
+	dq	792644927852378159.e0078
+	dq	0x53d7bff336d8ff06
+
+	dq	783308178698887621.e0223
+	dq	0x71f2cbac35f71140
+
+	dq	8396094300569779681.e-252
+	dq	0x0f8ab223efcee35a
+
+	dq	3507665085003296281.e-074
+	dq	0x346b85c026a264e4
+
+	dq	7322325862592278999.e0074
+	dq	0x5336775b6caa5ae0
+
+	dq	6014546754280072926.e0209
+	dq	0x6f396397b06732a4
+
+	dq	7120190517612959703.e0120
+	dq	0x5cc3220dcd5899fd
+
+	dq	3507665085003296281.e-073
+	dq	0x34a1339818257f0f
+
+	dq	4345544743100783551.e-218
+	dq	0x168a9c42e5b6d89f
+
+	dq	9778613303868468131.e-090
+	dq	0x313146fe1075e1ef
+
+	dq	7539204280836061195.e-082
+	dq	0x32d3d969e3dbe723
+
+	dq	7862637540082247119.e-202
+	dq	0x19eaba3262ee707b
+
+	dq	2176832332097939832.e0200
+	dq	0x6d43bbb4bf05f087
+
+	dq	8643988913946659879.e0115
+	dq	0x5bbe71ec1ed0a4f9
+
+	dq	5529436763613147623.e0138
+	dq	0x6079c677be6f236e
+
+	dq	6764958008109694533.e-173
+	dq	0x1fed06692e6f5ef6
+
+	dq	6802601037806061975.e0197
+	dq	0x6cbf92bacb3cb40c
+
+	dq	1360520207561212395.e0198
+	dq	0x6ccf92bacb3cb40c
+
+	dq	62259110684423957791.e0047
+	dq	0x4dcd8f2cfc20d6e8
+
+	dq	88800290202542652011.e-226
+	dq	0x1526cec51a43f41a
+
+	dq	41010852717673354694.e-221
+	dq	0x162012954b6aabba
+
+	dq	20505426358836677347.e-221
+	dq	0x161012954b6aabba
+
+	dq	66102447903809911604.e0055
+	dq	0x4f7762068a24fd55
+
+	dq	35600952588064798515.e0119
+	dq	0x5cb3220dcd5899fd
+
+	dq	14371240869903838702.e0205
+	dq	0x6e78d92d2bcc7a81
+
+	dq	57500690832492901689.e0043
+	dq	0x4cf65d3e2acd616b
+
+	dq	23432630639573022093.e-107
+	dq	0x2dbdd54c40a2f25f
+
+	dq	62259110684423957791.e0048
+	dq	0x4e02797c1d948651
+
+	dq	35620497849450218807.e-306
+	dq	0x0475b22082529425
+
+	dq	69658634627134074624.e0200
+	dq	0x6d93bbb4bf05f087
+
+	dq	99440755792436956989.e-062
+	dq	0x37362d10462a26f4
+
+	dq	55277197169490210673.e0081
+	dq	0x54d945bfa911e32a
+
+	dq	36992084760177624177.e-318
+	dq	0x01f8c5f9551c2f9a
+
+	dq	30888265282878466443.e-111
+	dq	0x2cf01b8ef28251fc
+
+	dq	2.4703282292062327208828439643411068618252990130716238221279284125033775363510437593264991818081799618989828234772285886546332835517796989819938739800539093906315035659515570226392290858392449105184435931802849936536152500319370457678249219365623669863658480757001585769269903706311928279558551332927834338409351978015531246597263579574622766465272827220056374006485499977096599470454020828166226237857393450736339007967761930577506740176324673600968951340535537458516661134223766678604162159680461914467291840300530057530849048765391711386591646239524912623653881879636239373280423891018672348497668235089863388587925628302755995657524455507255189313690836254779186948667994968324049705821028513185451396213837722826145437693412532098591327667236328125e-324
+	dq	0x0000000000000000
+
+	dq	2.47032822920623272e-324
+	dq	0x0000000000000000

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/testnos3.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/testnos3.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/testnos3.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/time.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/time.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/timesneg.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/timesneg.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/timesneg.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/tmap.asm Added

@@ -0,0 +1,1448 @@
+;; NASM note: this file abuses the section flags in such a way that
+;; NASM 0.98.37 broke when this was compiled with:
+;; nasm -o tmap.o -f elf -DLINUX tmap.nas
+
+;;-----------------------------------------------------------------------------
+;;
+;; $Id$
+;;
+;; Copyright (C) 1998-2000 by DooM Legacy Team.
+;;
+;; This program is free software; you can redistribute it and/or
+;; modify it under the terms of the GNU General Public License
+;; as published by the Free Software Foundation; either version 2
+;; of the License, or (at your option) any later version.
+;;
+;; This program is distributed in the hope that it will be useful,
+;; but WITHOUT ANY WARRANTY; without even the implied warranty of
+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+;; GNU General Public License for more details.
+;;
+;;
+;; $Log$
+;; Revision 1.2  2003/09/10 23:33:38  hpa
+;; Use the version of tmap.nas that actually caused problems
+;;
+;; Revision 1.10  2001/02/24 13:35:21  bpereira
+;; no message
+;;
+;; Revision 1.9  2001/02/10 15:24:19  hurdler
+;; Apply Rob's patch for Linux version
+;;
+;; Revision 1.8  2000/11/12 09:48:15  bpereira
+;; no message
+;;
+;; Revision 1.7  2000/11/06 20:52:16  bpereira
+;; no message
+;;
+;; Revision 1.6  2000/11/03 11:48:40  hurdler
+;; Fix compiling problem under win32 with 3D-Floors and FragglScript (to verify!)
+;;
+;; Revision 1.5  2000/11/03 03:27:17  stroggonmeth
+;; Again with the bug fixing...
+;;
+;; Revision 1.4  2000/11/02 17:50:10  stroggonmeth
+;; Big 3Dfloors & FraggleScript commit!!
+;;
+;; Revision 1.3  2000/04/24 20:24:38  bpereira
+;; no message
+;;
+;; Revision 1.2  2000/02/27 00:42:11  hurdler
+;; fix CR+LF problem
+;;
+;; Revision 1.1.1.1  2000/02/22 20:32:32  hurdler
+;; Initial import into CVS (v1.29 pr3)
+;;
+;;
+;; DESCRIPTION:
+;;      assembler optimised rendering code for software mode
+;;      draw floor spans, and wall columns.
+;;
+;;-----------------------------------------------------------------------------
+
+
+BITS 32
+
+%ifdef LINUX
+%macro cextern 1
+extern %1
+%endmacro
+
+%macro cglobal 1
+global %1
+%endmacro
+
+%define CODE_SEG .data
+%else
+%macro cextern 1
+%define %1 _%1
+extern %1
+%endmacro
+
+%macro cglobal 1
+%define %1 _%1
+global %1
+%endmacro
+
+%define CODE_SEG .text                         
+%endif
+
+
+;; externs
+;; columns
+cextern dc_x
+cextern dc_yl
+cextern dc_yh
+cextern ylookup
+cextern columnofs
+cextern dc_source
+cextern dc_texturemid
+cextern dc_iscale
+cextern centery
+cextern dc_colormap
+cextern dc_transmap
+cextern colormaps
+
+;; spans
+cextern ds_x1
+cextern ds_x2
+cextern ds_y
+cextern ds_xfrac
+cextern ds_yfrac
+cextern ds_xstep
+cextern ds_ystep
+cextern ds_source
+cextern ds_colormap
+;cextern ds_textureheight
+
+; polygon edge rasterizer
+cextern prastertab
+
+
+;;----------------------------------------------------------------------
+;;
+;; R_DrawColumn
+;;
+;; New  optimised version 10-01-1998 by D.Fabrice and P.Boris
+;; TO DO: optimise it much farther... should take at most 3 cycles/pix
+;;      once it's fixed, add code to patch the offsets so that it
+;;      works in every screen width.
+;;
+;;----------------------------------------------------------------------
+
+SECTION .data
+
+;;.align        4
+loopcount       dd      0
+pixelcount      dd      0
+tystep          dd      0
+
+SECTION CODE_SEG write
+
+;----------------------------------------------------------------------------
+;fixed_t FixedMul (fixed_t a, fixed_t b)
+;----------------------------------------------------------------------------
+cglobal FixedMul
+;       align   16
+FixedMul:
+        mov     eax,esp+4
+        imul    dword esp+8
+        shrd    eax,edx,16
+        ret
+
+;----------------------------------------------------------------------------
+;fixed_t FixedDiv2 (fixed_t a, fixed_t b);
+;----------------------------------------------------------------------------
+cglobal FixedDiv2
+;       align   16
+FixedDiv2:
+        mov     eax,esp+4
+        mov     edx,eax                 ;; these two instructions allow the next
+        sar     edx,31                  ;; two to pair, on the Pentium processor.
+        shld    edx,eax,16
+        sal     eax,16
+        idiv    dword esp+8
+        ret
+
+;----------------------------------------------------------------------------
+; void  ASM_PatchRowBytes (int rowbytes);
+;----------------------------------------------------------------------------
+cglobal ASM_PatchRowBytes
+;       align   16
+ASM_PatchRowBytes:
+        mov     eax,esp+4
+        mov     p1+2,eax
+        mov     p2+2,eax
+        mov     p3+2,eax
+        mov     p4+2,eax
+        mov     p5+2,eax
+        mov     p6+2,eax
+        mov     p7+2,eax
+        mov     p8+2,eax
+        mov     p9+2,eax
+        mov     pa+2,eax
+        mov     pb+2,eax
+        mov     pc+2,eax
+        mov     pd+2,eax
+        mov     pe+2,eax
+        mov     pf+2,eax
+        mov     pg+2,eax
+        mov     ph+2,eax
+        mov     pi+2,eax
+        mov     pj+2,eax
+        mov     pk+2,eax
+        mov     pl+2,eax
+        mov     pm+2,eax
+        mov     pn+2,eax
+        mov     po+2,eax
+        mov     pp+2,eax
+        mov     pq+2,eax
+        add     eax,eax
+        mov     q1+2,eax
+        mov     q2+2,eax
+        mov     q3+2,eax
+        mov     q4+2,eax
+        mov     q5+2,eax
+        mov     q6+2,eax
+        mov     q7+2,eax
+        mov     q8+2,eax
+        ret
+
+
+;----------------------------------------------------------------------------
+; 8bpp column drawer
+;----------------------------------------------------------------------------
+
+cglobal R_DrawColumn_8
+;       align   16
+R_DrawColumn_8:
+        push    ebp                     ;; preserve caller's stack frame pointer
+        push    esi                     ;; preserve register variables
+        push    edi
+        push    ebx
+;;
+;; dest = ylookupdc_yl + columnofsdc_x;
+;;
+        mov     ebp,dc_yl
+        mov     ebx,ebp
+        mov     edi,ylookup+ebx*4
+        mov     ebx,dc_x
+        add     edi,columnofs+ebx*4  ;; edi = dest
+;;
+;; pixelcount = yh - yl + 1
+;;
+        mov     eax,dc_yh
+        inc     eax
+        sub     eax,ebp                 ;; pixel count
+        mov     pixelcount,eax        ;; save for final pixel
+        jle     near vdone                   ;; nothing to scale
+;;
+;; frac = dc_texturemid - (centery-dc_yl)*fracstep;
+;;
+        mov     ecx,dc_iscale        ;; fracstep
+        mov     eax,centery
+        sub     eax,ebp
+        imul    eax,ecx
+        mov     edx,dc_texturemid
+        sub     edx,eax
+        mov     ebx,edx
+        shr     ebx,16                  ;; frac int.
+        and     ebx,0x7f
+        shl     edx,16                  ;; y frac up
+
+        mov     ebp,ecx
+        shl     ebp,16                  ;; fracstep f. up
+        shr     ecx,16                  ;; fracstep i. ->cl
+        and     cl,0x7f
+        mov     esi,dc_source
+;;
+;; lets rock :) !
+;;
+        mov     eax,pixelcount
+        mov     dh,al
+        shr     eax,2
+        mov     ch,al                   ;; quad count
+        mov     eax,dc_colormap
+        test    dh,0x3
+        je      near v4quadloop
+;;
+;;  do un-even pixel
+;;
+        test    dh,0x1
+        je      two_uneven
+
+        mov     al,esi+ebx            ;; prep un-even loops
+        add     edx,ebp                 ;; ypos f += ystep f
+        adc     bl,cl                   ;; ypos i += ystep i
+        mov     dl,eax                ;; colormap texel
+        and     bl,0x7f                 ;; mask 0-127 texture index
+        mov     edi,dl                ;; output pixel
+p1:     add     edi,0x12345678
+;;
+;;  do two non-quad-aligned pixels
+;;
+two_uneven:
+        test    dh,0x2
+        je      f3
+
+        mov     al,esi+ebx            ;; fetch source texel
+        add     edx,ebp                 ;; ypos f += ystep f
+        adc     bl,cl                   ;; ypos i += ystep i
+        mov     dl,eax                ;; colormap texel
+        and     bl,0x7f                 ;; mask 0-127 texture index
+        mov     edi,dl                ;; output pixel
+        mov     al,esi+ebx
+        add     edx,ebp                 ;; fetch source texel
+        adc     bl,cl                   ;; ypos f += ystep f
+        mov     dl,eax                ;; ypos i += ystep i
+        and     bl,0x7f                 ;; colormap texel
+p2:     add     edi,0x12345678          ;; mask 0-127 texture index
+        mov     edi,dl
+p3:     add     edi,0x12345678          ;; output pixel
+;;
+;;  test if there was at least 4 pixels
+;;
+f3:
+        test    ch,0xff                 ;; test quad count
+        je      near vdone
+;;
+;; ebp : ystep frac. upper 16 bits
+;; edx : y     frac. upper 16 bits
+;; ebx : y     i.    lower 7 bits,  masked for index
+;; ecx : ch = counter, cl = y step i.
+;; eax : colormap aligned 256
+;; esi : source texture column
+;; edi : dest screen
+;;
+v4quadloop:
+        mov     dh,0x7f                 ;; prep mask
+align 4
+vquadloop:
+        mov     al,esi+ebx            ;; prep loop
+        add     edx,ebp                 ;; ypos f += ystep f
+        adc     bl,cl                   ;; ypos i += ystep i
+        mov     dl,eax                ;; colormap texel
+        mov     edi,dl                ;; output pixel
+        and     bl,0x7f                 ;; mask 0-127 texture index
+
+        mov     al,esi+ebx            ;; fetch source texel
+        add     edx,ebp
+        adc     bl,cl
+p4:     add     edi,0x12345678
+        mov     dl,eax
+        and     bl,0x7f
+        mov     edi,dl
+
+        mov     al,esi+ebx            ;; fetch source texel
+        add     edx,ebp
+        adc     bl,cl
+p5:     add     edi,0x12345678
+        mov     dl,eax
+        and     bl,0x7f
+        mov     edi,dl
+
+        mov     al,esi+ebx            ;; fetch source texel
+        add     edx,ebp
+        adc     bl,cl
+p6:     add     edi,0x12345678
+        mov     dl,eax
+        and     bl,0x7f
+        mov     edi,dl
+
+p7:     add     edi,0x12345678
+
+        dec     ch
+        jne     vquadloop
+
+vdone:
+        pop     ebx                     ;; restore register variables
+        pop     edi
+        pop     esi
+        pop     ebp                     ;; restore caller's stack frame pointer
+        ret
+
+;;----------------------------------------------------------------------
+;;13-02-98:
+;;      R_DrawSkyColumn : same as R_DrawColumn but:
+;;
+;;      - wrap around 256 instead of 127.
+;;      this is needed because we have a higher texture for mouselook,
+;;      we need at least 200 lines for the sky.
+;;
+;;      NOTE: the sky should never wrap, so it could use a faster method.
+;;            for the moment, we'll still use a wrapping method...
+;;
+;;      IT S JUST A QUICK CUT N PASTE, WAS NOT OPTIMISED AS IT SHOULD BE !!!
+;;
+;;----------------------------------------------------------------------
+
+cglobal R_DrawSkyColumn_8
+;       align   16
+R_DrawSkyColumn_8:
+        push    ebp
+        push    esi
+        push    edi
+        push    ebx
+;;
+;; dest = ylookupdc_yl + columnofsdc_x;
+;;
+        mov     ebp,dc_yl
+        mov     ebx,ebp
+        mov     edi,ylookup+ebx*4
+        mov     ebx,dc_x
+        add     edi,columnofs+ebx*4   ;; edi = dest
+;;
+;; pixelcount = yh - yl + 1
+;;
+        mov     eax,dc_yh
+        inc     eax
+        sub     eax,ebp                 ;; pixel count
+        mov     pixelcount,eax        ;; save for final pixel
+        jle     near    vskydone        ;; nothing to scale
+;;
+;; frac = dc_texturemid - (centery-dc_yl)*fracstep;
+;;
+        mov     ecx,dc_iscale        ;; fracstep
+        mov     eax,centery
+        sub     eax,ebp
+        imul    eax,ecx
+        mov     edx,dc_texturemid
+        sub     edx,eax
+        mov     ebx,edx
+        shr     ebx,16                  ;; frac int.
+        and     ebx,0xff
+        shl     edx,16                  ;; y frac up
+        mov     ebp,ecx
+        shl     ebp,16                  ;; fracstep f. up
+        shr     ecx,16                  ;; fracstep i. ->cl
+        mov     esi,dc_source
+;;
+;; lets rock :) !
+;;
+        mov     eax,pixelcount
+        mov     dh,al
+        shr     eax,0x2
+        mov     ch,al                   ;; quad count
+        mov     eax,dc_colormap
+        test    dh,0x3
+        je      vskyquadloop
+;;
+;;  do un-even pixel
+;;
+        test    dh,0x1
+        je      f2
+        mov     al,esi+ebx            ;; prep un-even loops
+        add     edx,ebp                 ;; ypos f += ystep f
+        adc     bl,cl                   ;; ypos i += ystep i
+        mov     dl,eax                ;; colormap texel
+        mov     edi,dl                ;; output pixel
+p8:     add     edi,0x12345678
+;;
+;;  do two non-quad-aligned pixels
+;;
+f2:     test    dh,0x2
+        je      skyf3
+
+        mov     al,esi+ebx            ;; fetch source texel
+        add     edx,ebp                 ;; ypos f += ystep f
+        adc     bl,cl                   ;; ypos i += ystep i
+        mov     dl,eax                ;; colormap texel
+        mov     edi,dl                ;; output pixel
+
+        mov     al,esi+ebx            ;; fetch source texel
+        add     edx,ebp                 ;; ypos f += ystep f
+        adc     bl,cl                   ;; ypos i += ystep i
+        mov     dl,eax                ;; colormap texel
+p9:     add     edi,0x12345678
+        mov     edi,dl                ;; output pixel
+
+pa:     add     edi,0x12345678
+;;
+;;  test if there was at least 4 pixels
+;;
+skyf3:  test    ch,0xff                 ;; test quad count
+        je      vskydone
+;;
+;; ebp : ystep frac. upper 24 bits
+;; edx : y     frac. upper 24 bits
+;; ebx : y     i.    lower 7 bits,  masked for index
+;; ecx : ch = counter, cl = y step i.
+;; eax : colormap aligned 256
+;; esi : source texture column
+;; edi : dest screen
+;;
+align 4
+vskyquadloop:
+        mov     al,esi+ebx            ;; prep loop
+        add     edx,ebp                 ;; ypos f += ystep f
+        mov     dl,eax                ;; colormap texel
+        adc     bl,cl                   ;; ypos i += ystep i
+        mov     edi,dl                ;; output pixel
+
+        mov     al,esi+ebx            ;; fetch source texel
+        add     edx,ebp
+        adc     bl,cl
+pb:     add     edi,0x12345678
+        mov     dl,eax
+        mov     edi,dl
+
+        mov     al,esi+ebx            ;; fetch source texel
+        add     edx,ebp
+        adc     bl,cl
+pc:     add     edi,0x12345678
+        mov     dl,eax
+        mov     edi,dl
+
+        mov     al,esi+ebx            ;; fetch source texel
+        add     edx,ebp
+        adc     bl,cl
+pd:     add     edi,0x12345678
+        mov     dl,eax
+        mov     edi,dl
+
+pe:     add     edi,0x12345678
+
+        dec     ch
+        jne     vskyquadloop
+vskydone:
+        pop     ebx
+        pop     edi
+        pop     esi
+        pop     ebp
+        ret
+
+
+;;----------------------------------------------------------------------
+;; R_DrawTranslucentColumn_8
+;;
+;; Vertical column texture drawer, with transparency. Replaces Doom2's
+;; 'fuzz' effect, which was not so beautiful.
+;; Transparency is always impressive in some way, don't know why...
+;;----------------------------------------------------------------------
+
+cglobal R_DrawTranslucentColumn_8
+R_DrawTranslucentColumn_8:
+        push    ebp                     ;; preserve caller's stack frame pointer
+        push    esi                     ;; preserve register variables
+        push    edi
+        push    ebx
+;;
+;; dest = ylookupdc_yl + columnofsdc_x;
+;;
+        mov     ebp,dc_yl
+        mov     ebx,ebp
+        mov     edi,ylookup+ebx*4
+        mov     ebx,dc_x
+        add     edi,columnofs+ebx*4   ;; edi = dest
+;;
+;; pixelcount = yh - yl + 1
+;;
+        mov     eax,dc_yh
+        inc     eax
+        sub     eax,ebp                 ;; pixel count
+        mov     pixelcount,eax        ;; save for final pixel
+        jle     near    vtdone         ;; nothing to scale
+;;
+;; frac = dc_texturemid - (centery-dc_yl)*fracstep;
+;;
+        mov     ecx,dc_iscale        ;; fracstep
+        mov     eax,centery
+        sub     eax,ebp
+        imul    eax,ecx
+        mov     edx,dc_texturemid
+        sub     edx,eax
+        mov     ebx,edx
+
+        shr     ebx,16                  ;; frac int.
+        and     ebx,0x7f
+        shl     edx,16                  ;; y frac up
+
+        mov     ebp,ecx
+        shl     ebp,16                  ;; fracstep f. up
+        shr     ecx,16                  ;; fracstep i. ->cl
+        and     cl,0x7f
+        push    cx
+        mov     ecx,edx
+        pop     cx
+        mov     edx,dc_colormap
+        mov     esi,dc_source
+;;
+;; lets rock :) !
+;;
+        mov     eax,pixelcount
+        shr     eax,0x2
+        test    byte pixelcount,0x3
+        mov     ch,al                   ;; quad count
+        mov     eax,dc_transmap
+        je      vt4quadloop
+;;
+;;  do un-even pixel
+;;
+        test    byte pixelcount,0x1
+        je      trf2
+
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        add     ecx,ebp
+        adc     bl,cl
+        mov     al,edi                ;; fetch dest  : index into colormap
+        and     bl,0x7f
+        mov     dl,eax
+        mov     dl,edx
+        mov     edi,dl
+pf:     add     edi,0x12345678
+;;
+;;  do two non-quad-aligned pixels
+;;
+trf2:    test    byte pixelcount,0x2
+        je      trf3
+
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        add     ecx,ebp
+        adc     bl,cl
+        mov     al,edi                ;; fetch dest  : index into colormap
+        and     bl,0x7f
+        mov     dl,eax
+        mov     dl,edx
+        mov     edi,dl
+pg:     add     edi,0x12345678
+
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        add     ecx,ebp
+        adc     bl,cl
+        mov     al,edi                ;; fetch dest  : index into colormap
+        and     bl,0x7f
+        mov     dl,eax
+        mov     dl,edx
+        mov     edi,dl
+ph:     add     edi,0x12345678
+;;
+;;  test if there was at least 4 pixels
+;;
+trf3:   test    ch,0xff                 ;; test quad count
+        je near vtdone
+
+;;
+;; ebp : ystep frac. upper 24 bits
+;; edx : y     frac. upper 24 bits
+;; ebx : y     i.    lower 7 bits,  masked for index
+;; ecx : ch = counter, cl = y step i.
+;; eax : colormap aligned 256
+;; esi : source texture column
+;; edi : dest screen
+;;
+vt4quadloop:
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        mov     tystep,ebp
+pi:     add     edi,0x12345678
+        mov     al,edi                ;; fetch dest  : index into colormap
+pj:     sub     edi,0x12345678
+        mov     ebp,edi
+pk:     sub     edi,0x12345678
+        jmp short inloop
+align 4
+vtquadloop:
+        add     ecx,tystep
+        adc     bl,cl
+q1:     add     ebp,0x23456789
+        and     bl,0x7f
+        mov     dl,eax
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        mov     dl,edx
+        mov     edi,dl
+        mov     al,ebp                ;; fetch dest   : index into colormap
+inloop:
+        add     ecx,tystep
+        adc     bl,cl
+q2:     add     edi,0x23456789
+        and     bl,0x7f
+        mov     dl,eax
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        mov     dl,edx
+        mov     ebp+0x0,dl
+        mov     al,edi                ;; fetch dest   : index into colormap
+
+        add     ecx,tystep
+        adc     bl,cl
+q3:     add     ebp,0x23456789
+        and     bl,0x7f
+        mov     dl,eax
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        mov     dl,edx
+        mov     edi,dl
+        mov     al,ebp                ;; fetch dest   : index into colormap
+
+        add     ecx,tystep
+        adc     bl,cl
+q4:     add     edi,0x23456789
+        and     bl,0x7f
+        mov     dl,eax
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        mov     dl,edx
+        mov     ebp,dl
+        mov     al,edi                ;; fetch dest   : index into colormap
+
+        dec     ch
+        jne     vtquadloop
+vtdone:
+        pop     ebx
+        pop     edi
+        pop     esi
+        pop     ebp
+        ret
+
+
+;;----------------------------------------------------------------------
+;; R_DrawShadeColumn
+;;
+;;   for smoke..etc.. test.
+;;----------------------------------------------------------------------
+cglobal R_DrawShadeColumn_8
+R_DrawShadeColumn_8:
+        push    ebp                     ;; preserve caller's stack frame pointer
+        push    esi                     ;; preserve register variables
+        push    edi
+        push    ebx
+
+;;
+;; dest = ylookupdc_yl + columnofsdc_x;
+;;
+        mov     ebp,dc_yl
+        mov     ebx,ebp
+        mov     edi,ylookup+ebx*4
+        mov     ebx,dc_x
+        add     edi,columnofs+ebx*4  ;; edi = dest
+;;
+;; pixelcount = yh - yl + 1
+;;
+        mov     eax,dc_yh
+        inc     eax
+        sub     eax,ebp                 ;; pixel count
+        mov     pixelcount,eax       ;; save for final pixel
+        jle near shdone                ;; nothing to scale
+;;
+;; frac = dc_texturemid - (centery-dc_yl)*fracstep;
+;;
+        mov     ecx,dc_iscale        ;; fracstep
+        mov     eax,centery
+        sub     eax,ebp
+        imul    eax,ecx
+        mov     edx,dc_texturemid
+        sub     edx,eax
+        mov     ebx,edx
+        shr     ebx,16                  ;; frac int.
+        and     ebx,byte +0x7f
+        shl     edx,16                  ;; y frac up
+
+        mov     ebp,ecx
+        shl     ebp,16                  ;; fracstep f. up
+        shr     ecx,16                  ;; fracstep i. ->cl
+        and     cl,0x7f
+
+        mov     esi,dc_source
+;;
+;; lets rock :) !
+;;
+        mov     eax,pixelcount
+        mov     dh,al
+        shr     eax,2
+        mov     ch,al                   ;; quad count
+        mov     eax,colormaps
+        test    dh,3
+        je      sh4quadloop
+;;
+;;  do un-even pixel
+;;
+        test    dh,0x1
+        je      shf2
+
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        add     edx,ebp
+        adc     bl,cl
+        mov     al,edi                ;; fetch dest  : index into colormap
+        and     bl,0x7f
+        mov     dl,eax
+        mov     edi,dl
+pl:     add     edi,0x12345678
+;;
+;;  do two non-quad-aligned pixels
+;;
+shf2:
+        test    dh,0x2
+        je      shf3
+
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        add     edx,ebp
+        adc     bl,cl
+        mov     al,edi                ;; fetch dest  : index into colormap
+        and     bl,0x7f
+        mov     dl,eax
+        mov     edi,dl
+pm:     add     edi,0x12345678
+
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        add     edx,ebp
+        adc     bl,cl
+        mov     al,edi                ;; fetch dest  : index into colormap
+        and     bl,0x7f
+        mov     dl,eax
+        mov     edi,dl
+pn:     add     edi,0x12345678
+;;
+;;  test if there was at least 4 pixels
+;;
+shf3:
+        test    ch,0xff                 ;; test quad count
+        je near shdone
+
+;;
+;; ebp : ystep frac. upper 24 bits
+;; edx : y     frac. upper 24 bits
+;; ebx : y     i.    lower 7 bits,  masked for index
+;; ecx : ch = counter, cl = y step i.
+;; eax : colormap aligned 256
+;; esi : source texture column
+;; edi : dest screen
+;;
+sh4quadloop:
+        mov     dh,0x7f                 ;; prep mask
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        mov     tystep,ebp
+po:     add     edi,0x12345678
+        mov     al,edi                ;; fetch dest  : index into colormap
+pp:     sub     edi,0x12345678
+        mov     ebp,edi
+pq:     sub     edi,0x12345678
+        jmp short shinloop
+
+align  4
+shquadloop:
+        add     edx,tystep
+        adc     bl,cl
+        and     bl,dh
+q5:     add     ebp,0x12345678
+        mov     dl,eax
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        mov     edi,dl
+        mov     al,ebp                ;; fetch dest : index into colormap
+shinloop:
+        add     edx,tystep
+        adc     bl,cl
+        and     bl,dh
+q6:     add     edi,0x12345678
+        mov     dl,eax
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        mov     ebp,dl
+        mov     al,edi                ;; fetch dest : index into colormap
+
+        add     edx,tystep
+        adc     bl,cl
+        and     bl,dh
+q7:     add     ebp,0x12345678
+        mov     dl,eax
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        mov     edi,dl
+        mov     al,ebp                ;; fetch dest : index into colormap
+
+        add     edx,tystep
+        adc     bl,cl
+        and     bl,dh
+q8:     add     edi,0x12345678
+        mov     dl,eax
+        mov     ah,esi+ebx            ;; fetch texel : colormap number
+        mov     ebp,dl
+        mov     al,edi                ;; fetch dest : index into colormap
+
+        dec     ch
+        jne     shquadloop
+
+shdone:
+        pop     ebx                     ;; restore register variables
+        pop     edi
+        pop     esi
+        pop     ebp                     ;; restore caller's stack frame pointer
+        ret
+
+
+
+;;----------------------------------------------------------------------
+;;
+;;      R_DrawSpan
+;;
+;;      Horizontal texture mapping
+;;
+;;----------------------------------------------------------------------
+
+
+SECTION .data
+
+oldcolormap     dd      0
+
+SECTION CODE_SEG write
+
+cglobal R_DrawSpan_8
+R_DrawSpan_8:
+        push    ebp                     ;; preserve caller's stack frame pointer
+        push    esi                     ;; preserve register variables
+        push    edi
+        push    ebx
+;;
+;; initilise registers
+;;
+  
+        mov     edx, ds_xfrac
+        mov     eax, ds_ystep
+        ror     edx, 14
+        ror     eax, 15
+        mov      bl, dl
+        mov     ecx, ds_xstep
+        mov      dh, al
+        mov      ax, 1
+        mov     tystep, eax
+
+
+        mov     eax, ds_yfrac
+        ror     ecx, 13
+        ror     eax, 16
+        mov      dl, cl
+        mov      bh, al
+        xor      cx, cx
+        and     ebx, 0x3fff
+        mov     pixelcount,ecx
+
+        mov     ecx, ds_x2
+        mov     edi, ds_y
+        mov     esi, ds_x1
+        mov     edi, ylookup+edi*4
+        mov     ebp, ebx
+        add     edi, columnofs+esi*4
+        sub     esi, ecx                ;; pixel count
+        shr     ebp, 2
+        mov     ecx, ds_colormap
+        mov      ax, si
+        mov     esi, ds_source
+        sar      ax,1
+        jnc     near .midloop           ;; check parity
+
+;   summary
+; edx = high16bit xfrac0..13, ah=ystep16..24 al=xtep14..21
+; ebx = high16bit =0, bh=yfrac16..24, bl=xfrac14..21 
+; ecx = colormap table cl=0 (colormap is aligned 8 bits)
+; eax = high16bit yfrac0..15, dx = count
+; esi = flat texture source
+; edi = screeen buffer destination
+; ebp = work register
+; pixelcount = high16bit xstep0..13 rest to 0
+; tystep     = high16bit ystep0..15 low 16 bit = 2 (increment of count)
+
+align 4
+.loop
+        add     eax, tystep
+         mov      cl, esi+ebp
+        adc      bh, dh
+         mov      cl, ecx
+        and      bh, 0x3f 
+         mov   edi, cl
+        mov     ebp, ebx        
+         inc     edi
+         shr     ebp, 2
+
+.midloop:
+        add     edx, pixelcount
+         mov      cl, esi+ebp
+        adc      bl, dl
+         mov      cl, ecx
+        mov     ebp, ebx 
+         mov   edi, cl
+        inc     edi
+         shr     ebp, 2
+
+        test    eax, 0xffff
+        jnz     near .loop
+
+.hdone: pop     ebx                     ;; restore register variables
+        pop     edi
+        pop     esi
+        pop     ebp                     ;; restore caller's stack frame pointer
+        ret
+
+
+SECTION .data
+
+obelix          dd      0
+etaussi         dd      0
+
+SECTION CODE_SEG
+
+cglobal R_DrawSpan_8_old
+R_DrawSpan_8_old:
+        push    ebp                     ;; preserve caller's stack frame pointer
+        push    esi                     ;; preserve register variables
+        push    edi
+        push    ebx
+;;
+;; find loop count
+;;
+        mov     eax,ds_x2
+        inc     eax
+        sub     eax,ds_x1             ;; pixel count
+        mov     pixelcount,eax        ;; save for final pixel
+        js near .hdone                  ;; nothing to scale
+        shr     eax,0x1                 ;; double pixel count
+        mov     loopcount,eax
+;;
+;; build composite position
+;;
+        mov     ebp,ds_xfrac
+        shl     ebp,10
+        and     ebp,0xffff0000
+        mov     eax,ds_yfrac
+        shr     eax,6
+        and     eax,0xffff
+        mov     edi,ds_y
+        or      ebp,eax
+
+        mov     esi,ds_source
+;;
+;; calculate screen dest
+;;
+        mov     edi,ylookup+edi*4
+        mov     eax,ds_x1
+        add     edi,columnofs+eax*4
+;;
+;; build composite step
+;;
+        mov     ebx,ds_xstep
+        shl     ebx,10
+        and     ebx,0xffff0000
+        mov     eax,ds_ystep
+        shr     eax,6
+        and     eax,0xffff
+        or      ebx,eax
+
+        mov     obelix,ebx
+        mov     etaussi,esi
+
+;; %eax      aligned colormap
+;; %ebx      aligned colormap
+;; %ecx,%edx  scratch
+;; %esi      virtual source
+;; %edi      moving destination pointer
+;; %ebp      frac
+
+        mov     eax,ds_colormap
+        mov     ecx,ebp
+        add     ebp,ebx                 ;; advance frac pointer
+        shr     cx,10
+        rol     ecx,6
+        and     ecx,4095                ;; finish calculation for third pixel
+        mov     edx,ebp
+        shr     dx,10
+        rol     edx,6
+        add     ebp,ebx                 ;; advance frac pointer
+        and     edx,4095                ;; finish calculation for fourth pixel
+        mov     ebx,eax
+        mov     al,esi+ecx            ;; get first pixel
+        mov     bl,esi+edx            ;; get second pixel
+
+        test dword pixelcount,0xfffffffe
+
+        mov     dl,eax                ;; color translate first pixel
+
+;;      movw    $0xf0f0,%dx             ;;see visplanes start
+
+        je      .hchecklast
+
+        mov     dh,ebx                ;; color translate second pixel
+        mov     esi,loopcount
+align 4
+.hdoubleloop:
+        mov     ecx,ebp
+        shr     cx,10
+        rol     ecx,6
+         add     ebp,obelix            ;; advance frac pointer
+        mov     edi,dx                ;; write first pixel
+         and     ecx,4095                ;; finish calculation for third pixel
+        mov     edx,ebp
+        shr     dx,10
+        rol     edx,6
+         add     ecx,etaussi
+        and     edx,4095                ;; finish calculation for fourth pixel
+         mov     al,ecx                ;; get third pixel
+        add     ebp,obelix            ;; advance frac pointer
+         add     edx,etaussi
+        mov     bl,edx                ;; get fourth pixel
+         mov     dl,eax                ;; color translate third pixel
+        add     edi,byte +0x2           ;; advance to third pixel destination
+         dec     esi                     ;; done with loop?
+        mov     dh,ebx                ;; color translate fourth pixel
+         jne     .hdoubleloop
+;; check for final pixel
+.hchecklast:
+        test dword pixelcount,0x1
+        je      .hdone
+        mov     edi,dl                ;; write final pixel
+.hdone: pop     ebx                     ;; restore register variables
+        pop     edi
+        pop     esi
+        pop     ebp                     ;; restore caller's stack frame pointer
+        ret
+
+
+;; ========================================================================
+;;  Rasterization des segments d'un polygne textur de manire LINEAIRE.
+;;  Il s'agit donc d'interpoler les coordonnes aux bords de la texture en
+;;  mme temps que les abscisses minx/maxx pour chaque ligne.
+;;  L'argument 'dir' indique quels bords de la texture sont interpolés:
+;;    0 : segments associs aux bord SUPERIEUR et INFERIEUR ( TY constant )
+;;    1 : segments associs aux bord GAUCHE    et DROITE    ( TX constant )
+;; ========================================================================
+;;
+;;  void   rasterize_segment_tex( LONG x1, LONG y1, LONG x2, LONG y2, LONG tv1, LONG tv2, LONG tc, LONG dir );
+;;                                   ARG1     ARG2     ARG3     ARG4      ARG5      ARG6     ARG7       ARG8
+;;
+;;  Pour dir = 0, (tv1,tv2) = (tX1,tX2), tc = tY, en effet TY est constant.
+;;
+;;  Pour dir = 1, (tv1,tv2) = (tY1,tY2), tc = tX, en effet TX est constant.
+;;
+;;
+;;  Uses:  extern struct rastery *_rastertab;
+;;
+
+SECTION CODE_SEG write
+
+MINX            EQU    0
+MAXX            EQU    4
+TX1             EQU    8
+TY1             EQU    12
+TX2             EQU    16
+TY2             EQU    20
+RASTERY_SIZEOF  EQU    24
+
+cglobal rasterize_segment_tex
+rasterize_segment_tex:
+        push    ebp
+        mov     ebp,esp
+
+        sub     esp,byte +0x8           ;; alloue les variables locales
+
+        push    ebx
+        push    esi
+        push    edi
+        o16 mov ax,es
+        push    eax
+
+;;        #define DX       ebp-4
+;;        #define TD       ebp-8
+
+        mov     eax,ebp+0xc           ;; y1
+        mov     ebx,ebp+0x14          ;; y2
+        cmp     ebx,eax
+        je near .L_finished             ;; special (y1==y2) segment horizontal, exit!
+
+        jg near .L_rasterize_right
+
+;;rasterize_left:       ;; on rasterize un segment  la GAUCHE du polygne
+
+        mov     ecx,eax
+        sub     ecx,ebx
+        inc     ecx                     ;; y1-y2+1
+
+        mov     eax,RASTERY_SIZEOF
+        mul     ebx                     ;; * y2
+        mov     esi,prastertab
+        add     esi,eax                 ;; point into rastertaby2
+
+        mov     eax,ebp+0x8           ;; ARG1
+        sub     eax,ebp+0x10          ;; ARG3
+        shl     eax,0x10                ;;     ((x1-x2)<<PRE) ...
+        cdq
+        idiv    ecx                     ;; dx =     ...        / (y1-y2+1)
+        mov     ebp-0x4,eax           ;; DX
+
+        mov     eax,ebp+0x18          ;; ARG5
+        sub     eax,ebp+0x1c          ;; ARG6
+        shl     eax,0x10
+        cdq
+        idiv    ecx                     ;;      tdx =((tx1-tx2)<<PRE) / (y1-y2+1)
+        mov     ebp-0x8,eax           ;; idem tdy =((ty1-ty2)<<PRE) / (y1-y2+1)
+
+        mov     eax,ebp+0x10          ;; ARG3
+        shl     eax,0x10                ;; x = x2<<PRE
+
+        mov     ebx,ebp+0x1c          ;; ARG6
+        shl     ebx,0x10                ;; tx = tx2<<PRE    d0
+                                        ;; ty = ty2<<PRE    d1
+        mov     edx,ebp+0x20          ;; ARG7
+        shl     edx,0x10                ;; ty = ty<<PRE     d0
+                                        ;; tx = tx<<PRE     d1
+        push    ebp
+        mov     edi,ebp-0x4           ;; DX
+        cmp     dword ebp+0x24,byte +0x0      ;; ARG8   direction ?
+
+        mov     ebp,ebp-0x8           ;; TD
+        je      .L_rleft_h_loop
+;;
+;; TY varie, TX est constant
+;;
+.L_rleft_v_loop:
+        mov     esi+MINX,eax           ;; rastertaby.minx = x
+          add     ebx,ebp
+        mov     esi+TX1,edx           ;;             .tx1  = tx
+          add     eax,edi
+        mov     esi+TY1,ebx           ;;             .ty1  = ty
+
+        ;;addl    DX, %eax        // x     += dx
+        ;;addl    TD, %ebx        // ty    += tdy
+
+        add     esi,RASTERY_SIZEOF      ;; next raster line into rastertab
+        dec     ecx
+        jne     .L_rleft_v_loop
+        pop     ebp
+        jmp     .L_finished
+;;
+;; TX varie, TY est constant
+;;
+.L_rleft_h_loop:
+        mov     esi+MINX,eax           ;; rastertaby.minx = x
+          add     eax,edi
+        mov     esi+TX1,ebx           ;;             .tx1  = tx
+          add     ebx,ebp
+        mov     esi+TY1,edx           ;;             .ty1  = ty
+
+        ;;addl    DX, %eax        // x     += dx
+        ;;addl    TD, %ebx        // tx    += tdx
+
+        add     esi,RASTERY_SIZEOF      ;; next raster line into rastertab
+        dec     ecx
+        jne     .L_rleft_h_loop
+        pop     ebp
+        jmp     .L_finished
+;;
+;; on rasterize un segment  la DROITE du polygne
+;;
+.L_rasterize_right:
+        mov     ecx,ebx
+        sub     ecx,eax
+        inc     ecx                     ;; y2-y1+1
+
+        mov     ebx,RASTERY_SIZEOF
+        mul     ebx                     ;;   * y1
+        mov     esi,prastertab
+        add     esi,eax                 ;;  point into rastertaby1
+
+        mov     eax,ebp+0x10          ;; ARG3
+        sub     eax,ebp+0x8           ;; ARG1
+        shl     eax,0x10                ;; ((x2-x1)<<PRE) ...
+        cdq
+        idiv    ecx                     ;;  dx =     ...        / (y2-y1+1)
+        mov     ebp-0x4,eax           ;; DX
+
+        mov     eax,ebp+0x1c          ;; ARG6
+        sub     eax,ebp+0x18          ;; ARG5
+        shl     eax,0x10
+        cdq
+        idiv    ecx                     ;;       tdx =((tx2-tx1)<<PRE) / (y2-y1+1)
+        mov     ebp-0x8,eax           ;;  idem tdy =((ty2-ty1)<<PRE) / (y2-y1+1)
+
+        mov     eax,ebp+0x8           ;; ARG1
+        shl     eax,0x10                ;; x  = x1<<PRE
+
+        mov     ebx,ebp+0x18          ;; ARG5
+        shl     ebx,0x10                ;; tx = tx1<<PRE    d0
+                                        ;; ty = ty1<<PRE    d1
+        mov     edx,ebp+0x20          ;; ARG7
+        shl     edx,0x10                ;; ty = ty<<PRE     d0
+                                        ;; tx = tx<<PRE     d1
+        push    ebp
+        mov     edi,ebp-0x4           ;; DX
+
+        cmp     dword ebp+0x24, 0     ;; direction ?
+
+         mov     ebp,ebp-0x8          ;; TD
+        je      .L_rright_h_loop
+;;
+;; TY varie, TX est constant
+;;
+.L_rright_v_loop:
+
+        mov     esi+MAXX,eax           ;; rastertaby.maxx = x
+          add     ebx,ebp
+        mov     esi+TX2,edx          ;;             .tx2  = tx
+          add     eax,edi
+        mov     esi+TY2,ebx          ;;             .ty2  = ty
+
+        ;;addl    DX, %eax        // x     += dx
+        ;;addl    TD, %ebx        // ty    += tdy
+
+        add     esi,RASTERY_SIZEOF
+        dec     ecx
+        jne     .L_rright_v_loop
+
+        pop     ebp
+
+        jmp     short .L_finished
+;;
+;; TX varie, TY est constant
+;;
+.L_rright_h_loop:
+        mov     esi+MAXX,eax           ;; rastertaby.maxx = x
+          add     eax,edi
+        mov     esi+TX2,ebx          ;;             .tx2  = tx
+          add     ebx,ebp
+        mov     esi+TY2,edx          ;;             .ty2  = ty
+
+        ;;addl    DX, %eax        // x     += dx
+        ;;addl    TD, %ebx        // tx    += tdx
+
+        add     esi,RASTERY_SIZEOF
+        dec     ecx
+        jne     .L_rright_h_loop
+
+        pop     ebp
+
+.L_finished:
+        pop     eax
+        o16 mov es,ax
+        pop     edi
+        pop     esi
+        pop     ebx
+
+        mov     esp,ebp
+        pop     ebp
+        ret
+
+
+;;; this version can draw 64x64 tiles, but they would have to be arranged 4 per row,
+;; so that the stride from one line to the next is 256
+;;
+;; .data
+;;xstep         dd      0
+;;ystep         dd      0
+;;texwidth      dd      64              ;; texture width
+;; .text
+;; this code is kept in case we add high-detail floor textures for example (256x256)
+;       align   16
+;_R_DrawSpan_8:
+;       push ebp                        ;; preserve caller's stack frame pointer
+;       push esi                        ;; preserve register variables
+;       push edi
+;       push ebx
+;;
+;; find loop count
+;;
+;       mov eax,ds_x2
+;       inc eax
+;       sub eax,ds_x1                 ;; pixel count
+;       mov pixelcount,eax            ;; save for final pixel
+;       js near .hdone                  ;; nothing to scale
+;;
+;; calculate screen dest
+;;
+;       mov edi,ds_y
+;       mov edi,ylookup+edi*4
+;       mov eax,ds_x1
+;       add edi,columnofs+eax*4
+;;
+;; prepare registers for inner loop
+;;
+;       xor eax,eax
+;       mov edx,ds_xfrac
+;       ror edx,16
+;       mov al,dl
+;       mov ecx,ds_yfrac
+;       ror ecx,16
+;       mov ah,cl
+;
+;       mov ebx,ds_xstep
+;       ror ebx,16
+;       mov ch,bl
+;       and ebx,0xffff0000
+;       mov xstep,ebx
+;       mov ebx,ds_ystep
+;       ror ebx,16
+;       mov dh,bl
+;       and ebx,0xffff0000
+;       mov ystep,ebx
+;
+;       mov esi,ds_source
+;
+;;; %eax      Yi,Xi in %ah,%al
+;;; %ebx      aligned colormap
+;;; %ecx      Yfrac upper, dXi in %ch, %cl is counter (upto 1024pels, =4x256)
+;;; %edx      Xfrac upper, dYi in %dh, %dl receives mapped pixels from (ebx)
+;;;  ystep    dYfrac, add to %ecx, low word is 0
+;;;  xstep    dXfrac, add to %edx, low word is 0
+;;; %ebp      temporary register serves as offset like %eax
+;;; %esi      virtual source
+;;; %edi      moving destination pointer
+;
+;       mov ebx,pixelcount
+;       shr ebx,0x2                     ;; 4 pixels per loop
+;       test bl,0xff
+;       je near .hchecklast
+;       mov cl,bl
+;
+;       mov ebx,dc_colormap
+;;;
+;;; prepare loop with first pixel
+;;;
+;       add ecx,ystep                 ;;pra1
+;       adc ah,dh
+;       add edx,xstep
+;       adc al,ch
+;       and eax,0x3f3f
+;       mov bl,esi+eax                ;;prb1
+;       mov dl,ebx                    ;;prc1
+;
+;       add ecx,ystep                 ;;a2
+;        adc ah,dh
+;
+;.hdoubleloop:
+;       mov edi+1,dl
+;        add edx,xstep
+;       adc al,ch
+;        add edi,byte +0x2
+;       mov ebp,eax
+;        add ecx,ystep
+;       adc ah,dh
+;        and ebp,0x3f3f
+;       add edx,xstep
+;        mov bl,esi+ebp
+;       adc al,ch
+;        mov dl,ebx
+;       and eax,0x3f3f
+;        mov edi,dl
+;       mov bl,esi+eax
+;        add ecx,ystep
+;       adc ah,dh
+;        add edx,xstep
+;       adc al,ch
+;        mov dl,ebx
+;       mov ebp,eax
+;        mov edi+1,dl
+;       and ebp,0x3f3f
+;        add ecx,ystep
+;       adc ah,dh
+;        mov bl,esi+ebp
+;       add edi,byte +0x2
+;        add edx,xstep
+;       adc al,ch
+;        mov dl,ebx
+;       and eax,0x3f3f
+;        mov edi,dl
+;       mov bl,esi+eax
+;        add ecx,ystep
+;       adc ah,dh
+;        mov dl,ebx
+;       dec cl
+;        jne near .hdoubleloop
+;;; check for final pixel
+;.hchecklast:
+;;; to do
+;.hdone:
+;       pop ebx
+;       pop edi
+;       pop esi
+;       pop ebp
+;       ret
+

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/tmap.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/tmap.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/tmap.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/uscore.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/uscore.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/uscore.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/utf-error.stderr Added

@@ -0,0 +1,15 @@
+./travis/test/utf.asm:63: error: __?utf16?__ must be followed by a string constant, got `33'
+./travis/test/utf.asm:64: error: __?utf16?__ must be followed by a string constant, got `,'
+./travis/test/utf.asm:65: error: unterminated __?utf16?__ function
+./travis/test/utf.asm:66: error: unterminated __?utf16?__ function
+./travis/test/utf.asm:67: error: invalid input string to __?utf16?__
+./travis/test/utf.asm:69: error: __?utf16le?__ must be followed by a string constant, got `33'
+./travis/test/utf.asm:70: error: __?utf16le?__ must be followed by a string constant, got `,'
+./travis/test/utf.asm:71: error: unterminated __?utf16le?__ function
+./travis/test/utf.asm:72: error: unterminated __?utf16le?__ function
+./travis/test/utf.asm:73: error: invalid input string to __?utf16le?__
+./travis/test/utf.asm:75: error: __?utf16be?__ must be followed by a string constant, got `33'
+./travis/test/utf.asm:76: error: __?utf16be?__ must be followed by a string constant, got `,'
+./travis/test/utf.asm:77: error: unterminated __?utf16be?__ function
+./travis/test/utf.asm:78: error: unterminated __?utf16be?__ function
+./travis/test/utf.asm:79: error: invalid input string to __?utf16be?__

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/utf.asm Added

@@ -0,0 +1,80 @@
+%define u(x) __utf16__(x)
+%define w(x) __utf32__(x)
+%define ul(x) __utf16le__(x)
+%define wl(x) __utf32le__(x)
+%define ub(x) __utf16be__(x)
+%define wb(x) __utf32be__(x)
+
+	db `Test \u306a\U0001abcd\n`
+	dw u(`Test \u306a\U0001abcd\n`)
+	dd w(`Test \u306a\U0001abcd\n`)
+
+	db `\u306a`
+	db `\xe3\x81\xaa`
+
+	dw __utf16__ "Hello, World!"
+
+	nop
+
+	mov ax,u(`a`)
+	mov bx,u(`\u306a`)
+	mov cx,u(`\xe3\x81\xaa`)
+	mov eax,u(`ab`)
+	mov ebx,u(`\U0001abcd`)
+	mov ecx,w(`\U0001abcd`)
+
+	db `Test \u306a\U0001abcd\n`
+	dw ul(`Test \u306a\U0001abcd\n`)
+	dd wl(`Test \u306a\U0001abcd\n`)
+
+	db `\u306a`
+	db `\xe3\x81\xaa`
+
+	dw __utf16le__ "Hello, World!"
+
+	nop
+
+	mov ax,ul(`a`)
+	mov bx,ul(`\u306a`)
+	mov cx,ul(`\xe3\x81\xaa`)
+	mov eax,ul(`ab`)
+	mov ebx,ul(`\U0001abcd`)
+	mov ecx,wl(`\U0001abcd`)
+
+	db `Test \u306a\U0001abcd\n`
+	dw ub(`Test \u306a\U0001abcd\n`)
+	dd wb(`Test \u306a\U0001abcd\n`)
+
+	db `\u306a`
+	db `\xe3\x81\xaa`
+
+	dw __utf16be__ "Hello, World!"
+
+	nop
+
+	mov ax,ub(`a`)
+	mov bx,ub(`\u306a`)
+	mov cx,ub(`\xe3\x81\xaa`)
+	mov eax,ub(`ab`)
+	mov ebx,ub(`\U0001abcd`)
+	mov ecx,wb(`\U0001abcd`)
+
+%ifdef ERROR
+	dw __utf16__ 33
+	dw __utf16__, 46
+	dw __utf16__("Hello, World!",16)
+	dw __utf16__("Hello, World!",16
+	dw u(`\xff`)
+
+	dw __utf16le__ 33
+	dw __utf16le__, 46
+	dw __utf16le__("Hello, World!",16)
+	dw __utf16le__("Hello, World!",16
+	dw ul(`\xff`)
+
+	dw __utf16be__ 33
+	dw __utf16be__, 46
+	dw __utf16be__("Hello, World!",16)
+	dw __utf16be__("Hello, World!",16
+	dw ub(`\xff`)
+%endif

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/utf.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/utf.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/v4.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/v4.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/v4.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/v4.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/vaesenc.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/vaesenc.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/vaesenc.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/vex.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/vex.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/vex.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/vex1.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/vex2.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/vgather.asm Added

@@ -0,0 +1,76 @@
+	bits 64
+
+	vgatherdpd xmm0,rcx+xmm2,xmm3
+	vgatherqpd xmm0,rcx+xmm2,xmm3
+	vgatherdpd ymm0,rcx+xmm2,ymm3
+	vgatherqpd ymm0,rcx+ymm2,ymm3
+
+	vgatherdpd xmm0,rcx+xmm2*1,xmm3
+	vgatherqpd xmm0,rcx+xmm2*1,xmm3
+	vgatherdpd ymm0,rcx+xmm2*1,ymm3
+	vgatherqpd ymm0,rcx+ymm2*1,ymm3
+
+	vgatherdpd xmm0,rcx+xmm2*2,xmm3
+	vgatherqpd xmm0,rcx+xmm2*2,xmm3
+	vgatherdpd ymm0,rcx+xmm2*2,ymm3
+	vgatherqpd ymm0,rcx+ymm2*2,ymm3
+
+	vgatherdpd xmm0,rcx+xmm2*4,xmm3
+	vgatherqpd xmm0,rcx+xmm2*4,xmm3
+	vgatherdpd ymm0,rcx+xmm2*4,ymm3
+	vgatherqpd ymm0,rcx+ymm2*4,ymm3
+
+	vgatherdpd xmm0,rcx+xmm2*8,xmm3
+	vgatherqpd xmm0,rcx+xmm2*8,xmm3
+	vgatherdpd ymm0,rcx+xmm2*8,ymm3
+	vgatherqpd ymm0,rcx+ymm2*8,ymm3
+
+	vgatherdpd xmm0,xmm2,xmm3
+	vgatherqpd xmm0,xmm2,xmm3
+	vgatherdpd ymm0,xmm2,ymm3
+	vgatherqpd ymm0,ymm2,ymm3
+
+	vgatherdpd xmm0,xmm2*1,xmm3
+	vgatherqpd xmm0,xmm2*1,xmm3
+	vgatherdpd ymm0,xmm2*1,ymm3
+	vgatherqpd ymm0,ymm2*1,ymm3
+
+	vgatherdpd xmm0,xmm2*2,xmm3
+	vgatherqpd xmm0,xmm2*2,xmm3
+	vgatherdpd ymm0,xmm2*2,ymm3
+	vgatherqpd ymm0,ymm2*2,ymm3
+
+	vgatherdpd xmm0,xmm2*4,xmm3
+	vgatherqpd xmm0,xmm2*4,xmm3
+	vgatherdpd ymm0,xmm2*4,ymm3
+	vgatherqpd ymm0,ymm2*4,ymm3
+
+	vgatherdpd xmm0,xmm2*8,xmm3
+	vgatherqpd xmm0,xmm2*8,xmm3
+	vgatherdpd ymm0,xmm2*8,ymm3
+	vgatherqpd ymm0,ymm2*8,ymm3
+
+	vgatherdpd xmm0,xmm2+rcx,xmm3
+	vgatherqpd xmm0,xmm2+rcx,xmm3
+	vgatherdpd ymm0,xmm2+rcx,ymm3
+	vgatherqpd ymm0,ymm2+rcx,ymm3
+
+	vgatherdpd xmm0,xmm2*1+rcx,xmm3
+	vgatherqpd xmm0,xmm2*1+rcx,xmm3
+	vgatherdpd ymm0,xmm2*1+rcx,ymm3
+	vgatherqpd ymm0,ymm2*1+rcx,ymm3
+
+	vgatherdpd xmm0,xmm2*2+rcx,xmm3
+	vgatherqpd xmm0,xmm2*2+rcx,xmm3
+	vgatherdpd ymm0,xmm2*2+rcx,ymm3
+	vgatherqpd ymm0,ymm2*2+rcx,ymm3
+
+	vgatherdpd xmm0,xmm2*4+rcx,xmm3
+	vgatherqpd xmm0,xmm2*4+rcx,xmm3
+	vgatherdpd ymm0,xmm2*4+rcx,ymm3
+	vgatherqpd ymm0,ymm2*4+rcx,ymm3
+
+	vgatherdpd xmm0,xmm2*8+rcx,xmm3
+	vgatherqpd xmm0,xmm2*8+rcx,xmm3
+	vgatherdpd ymm0,xmm2*8+rcx,ymm3
+	vgatherqpd ymm0,ymm2*8+rcx,ymm3

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/vgather.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/vgather.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/vmread.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/vmread.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/vmread.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/vmread.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/vmx.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/vmx.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/vmx.o.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/vpcmp.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/vpcmp.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/vpcmp.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/warnstack.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/warnstack.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/warnstack.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/warnstack.stderr Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/weirdpaste.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/weirdpaste.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/weirdpaste.i.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/weirdpaste.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/winalign.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/winalign.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/winalign.obj.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/xchg.asm Added

@@ -0,0 +1,93 @@
+%macro x 2
+	xchg %1,%2
+	xchg %2,%1
+%endmacro
+
+	bits 16
+
+	x ax,ax
+	x ax,cx
+	x ax,dx
+	x ax,bx
+	x ax,sp
+	x ax,bp
+	x ax,si
+	x ax,di
+	x eax,eax
+	x eax,ecx
+	x eax,edx
+	x eax,ebx
+	x eax,esp
+	x eax,ebp
+	x eax,esi
+	x eax,edi
+
+	bits 32
+
+	x ax,ax
+	x ax,cx
+	x ax,dx
+	x ax,bx
+	x ax,sp
+	x ax,bp
+	x ax,si
+	x ax,di
+	x eax,eax
+	x eax,ecx
+	x eax,edx
+	x eax,ebx
+	x eax,esp
+	x eax,ebp
+	x eax,esi
+	x eax,edi
+
+	bits 64
+
+	x ax,ax
+	x ax,cx
+	x ax,dx
+	x ax,bx
+	x ax,sp
+	x ax,bp
+	x ax,si
+	x ax,di
+	x ax,r8w
+	x ax,r9w
+	x ax,r10w
+	x ax,r11w
+	x ax,r12w
+	x ax,r13w
+	x ax,r14w
+	x ax,r15w
+	x eax,eax
+	x eax,ecx
+	x eax,edx
+	x eax,ebx
+	x eax,esp
+	x eax,ebp
+	x eax,esi
+	x eax,edi
+	x eax,r8d
+	x eax,r9d
+	x eax,r10d
+	x eax,r11d
+	x eax,r12d
+	x eax,r13d
+	x eax,r14d
+	x eax,r15d
+	x rax,rax
+	x rax,rcx
+	x rax,rdx
+	x rax,rbx
+	x rax,rsp
+	x rax,rbp
+	x rax,rsi
+	x rax,rdi
+	x rax,r8
+	x rax,r9
+	x rax,r10
+	x rax,r11
+	x rax,r12
+	x rax,r13
+	x rax,r14
+	x rax,r15

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/xchg.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/xchg.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/xcrypt.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/xcrypt.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/xcrypt.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/xdefine.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/xdefine.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/xdefine.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/xpaste.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/xpaste.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/xpaste.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/zerobyte.asm Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/zerobyte.bin.t Added

_service:tar_scm:nasm-2.16.03.tar.xz/travis/test/zerobyte.json Added

_service:tar_scm:nasm-2.16.03.tar.xz/version Added

_service:tar_scm:nasm-2.16.03.tar.xz/version.h Added

_service:tar_scm:nasm-2.16.03.tar.xz/version.mac Added

_service:tar_scm:nasm-2.16.03.tar.xz/version.mak Added

_service:tar_scm:nasm-2.16.03.tar.xz/version.pl Added

@@ -0,0 +1,193 @@
+#!/usr/bin/perl
+## --------------------------------------------------------------------------
+##   
+##   Copyright 1996-2016 The NASM Authors - All Rights Reserved
+##   See the file AUTHORS included with the NASM distribution for
+##   the specific copyright holders.
+##
+##   Redistribution and use in source and binary forms, with or without
+##   modification, are permitted provided that the following
+##   conditions are met:
+##
+##   * Redistributions of source code must retain the above copyright
+##     notice, this list of conditions and the following disclaimer.
+##   * Redistributions in binary form must reproduce the above
+##     copyright notice, this list of conditions and the following
+##     disclaimer in the documentation and/or other materials provided
+##     with the distribution.
+##     
+##     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+##     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+##     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+##     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+##     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+##     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+##     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+##     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+##     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+##     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+##     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+##     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+##     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+##
+## --------------------------------------------------------------------------
+
+#
+# version.pl
+#
+# Parse the NASM version file and produce appropriate macros
+#
+# The NASM version number is assumed to consist of:
+#
+# <major>.<minor>.<subminor>pl<patchlevel><tail>
+#
+# ... where <tail> is not necessarily numeric, but if it is of the form
+# -<digits> it is assumed to be a snapshot release.
+#
+# This defines the following macros:
+#
+# version.h:
+# NASM_MAJOR_VER
+# NASM_MINOR_VER
+# NASM_SUBMINOR_VER	-- this is zero if no subminor
+# NASM_PATCHLEVEL_VER	-- this is zero is no patchlevel
+# NASM_SNAPSHOT		-- if snapshot
+# NASM_VERSION_ID       -- version number encoded
+# NASM_VER		-- whole version number as a string
+#
+# version.mac:
+# __?NASM_MAJOR?__
+# __?NASM_MINOR?__
+# __?NASM_SUBMINOR?__
+# __?NASM_PATCHLEVEL?__
+# __?NASM_SNAPSHOT?__
+# __?NASM_VERSION_ID?__
+# __?NASM_VER?__
+#
+
+($what) = @ARGV;
+
+$line = <STDIN>;
+chomp $line;
+
+undef $maj;
+undef $min;
+undef $smin;
+undef $plvl;
+undef $tail;
+$is_rc = 0;
+
+if ( $line =~ /^(0-9+)\.(0-9+)(.*)$/ ) {
+    $maj  = $1;
+    $min  = $2;
+    $tail = $3;
+    if ( $tail =~ /^\.(0-9+)(.*)$/ ) {
+	$smin = $1;
+	$tail = $2;
+    }
+    if ( $tail =~ /^(pl|\.)(0-9+)(.*)$/ ) {
+	$plvl = $2;
+	$tail = $3;
+    } elsif ( $tail =~ /^rc(0-9+)(.*)$/ ) {
+	$is_rc = 1;
+	$plvl = $1;
+	$tail = $2;
+    }
+} else {
+    die "$0: Invalid input format\n";
+}
+
+if ($tail =~ /^\-(0-9+)$/) {
+    $snapshot = $1;
+} else {
+    undef $snapshot;
+}
+
+$nmaj = $maj+0;   $nmin = $min+0;
+$nsmin = $smin+0; $nplvl = $plvl+0;
+
+if ($is_rc) {
+    $nplvl += 90;
+    if ($nsmin > 0) {
+	$nsmin--;
+    } else {
+	$nsmin = 99;
+	if ($nmin > 0) {
+	    $nmin--;
+	} else {
+	    $nmin = 99;
+	    $nmaj--;
+	}
+    }
+}
+
+$nasm_id = ($nmaj << 24)+($nmin << 16)+($nsmin << 8)+$nplvl;
+
+$mangled_ver = sprintf("%d.%02d", $nmaj, $nmin);
+if ($nsmin || $nplvl || defined($snapshot)) {
+    $mangled_ver .= sprintf(".%02d", $nsmin);
+    if ($nplvl || defined($snapshot)) {
+	$mangled_ver .= '.'.$nplvl;
+    }
+}
+($mtail = $tail) =~ tr/-/./;
+$mangled_ver .= $mtail;
+
+if ( $what eq 'h' ) {
+    print  "#ifndef NASM_VERSION_H\n";
+    print  "#define NASM_VERSION_H\n";
+    printf "#define NASM_MAJOR_VER      %d\n", $nmaj;
+    printf "#define NASM_MINOR_VER      %d\n", $nmin;
+    printf "#define NASM_SUBMINOR_VER   %d\n", $nsmin;
+    printf "#define NASM_PATCHLEVEL_VER %d\n", $nplvl;
+    if (defined($snapshot)) {
+	printf "#define NASM_SNAPSHOT       %d\n", $snapshot;
+    }
+    printf "#define NASM_VERSION_ID     0x%08x\n", $nasm_id;
+    printf "#define NASM_VER            \"%s\"\n", $line;
+    print  "#endif /* NASM_VERSION_H */\n";
+} elsif ( $what eq 'mac' ) {
+    print  "STD: version\n";
+    printf "%%define __?NASM_MAJOR?__ %d\n", $nmaj;
+    printf "%%define __?NASM_MINOR?__ %d\n", $nmin;
+    printf "%%define __?NASM_SUBMINOR?__ %d\n", $nsmin;
+    printf "%%define __?NASM_PATCHLEVEL?__ %d\n", $nplvl;
+    if (defined($snapshot)) {
+	printf "%%define __?NASM_SNAPSHOT?__ %d\n", $snapshot;
+    }
+    printf "%%define __?NASM_VERSION_ID?__ 0%08Xh\n", $nasm_id;
+    printf "%%define __?NASM_VER?__ \"%s\"\n", $line;
+} elsif ( $what eq 'sed' ) {
+    printf "s/\@\@NASM_MAJOR\@\@/%d/g\n", $nmaj;
+    printf "s/\@\@NASM_MINOR\@\@/%d/g\n", $nmin;
+    printf "s/\@\@NASM_SUBMINOR\@\@/%d/g\n", $nsmin;
+    printf "s/\@\@NASM_PATCHLEVEL\@\@/%d/g\n", $nplvl;
+    printf "s/\@\@NASM_SNAPSHOT\@\@/%d/g\n", $snapshot;	# Possibly empty
+    printf "s/\@\@NASM_VERSION_ID\@\@/%d/g\n", $nasm_id;
+    printf "s/\@\@NASM_VERSION_XID\@\@/0x%08x/g\n", $nasm_id;
+    printf "s/\@\@NASM_VER\@\@/%s/g\n", $line;
+    printf "s/\@\@NASM_MANGLED_VER\@\@/%s/g\n", $mangled_ver;
+} elsif ( $what eq 'make' ) {
+    printf "NASM_VER=%s\n", $line;
+    printf "NASM_MAJOR_VER=%d\n", $nmaj;
+    printf "NASM_MINOR_VER=%d\n", $nmin;
+    printf "NASM_SUBMINOR_VER=%d\n", $nsmin;
+    printf "NASM_PATCHLEVEL_VER=%d\n", $nplvl;
+} elsif ( $what eq 'nsis' ) {
+    printf "!define VERSION \"%s\"\n", $line;
+    printf "!define MAJOR_VER %d\n", $nmin;
+    printf "!define MINOR_VER %d\n", $nmin;
+    printf "!define SUBMINOR_VER %d\n", $nsmin;
+    printf "!define PATCHLEVEL_VER %d\n", $nplvl;
+} elsif ( $what eq 'id' ) {
+    print $nasm_id, "\n";	 # Print ID in decimal
+} elsif ( $what eq 'xid' ) {
+    printf "0x%08x\n", $nasm_id; # Print ID in hexadecimal
+} elsif ( $what eq 'docsrc' ) {
+    printf "\\M{version}{%s}\n", $line;
+    printf "\\M{subtitle}{version %s}\n", $line;
+} else {
+    die "$0: Unknown output: $what\n";
+}
+
+exit 0;

_service:tar_scm:nasm-2.16.03.tar.xz/version.sed Added

_service:tar_scm:nasm-2.16.03.tar.xz/win Added

_service:tar_scm:nasm-2.16.03.tar.xz/win/.gitignore Added

_service:tar_scm:nasm-2.16.03.tar.xz/win/manifest.rc Added

_service:tar_scm:nasm-2.16.03.tar.xz/win/manifest.xml Added

@@ -0,0 +1,24 @@
+<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
+<assembly manifestVersion="1.0" xmlns="urn:schemas-microsoft-com:asm.v1">
+  <trustInfo xmlns="urn:schemas-microsoft-com:asm.v3">
+    <security>
+      <requestedPrivileges>
+	<requestedExecutionLevel level="asInvoker" />
+      </requestedPrivileges>
+    </security>
+  </trustInfo>
+  <application xmlns="urn:schemas-microsoft-com:asm.v3">
+    <windowsSettings xmlns="http://schemas.microsoft.com/SMI/2016/WindowsSettings">
+      <longPathAware>true</longPathAware>
+    </windowsSettings>
+  </application>
+  <compatibility xmlns="urn:schemas-microsoft-com:compatibility.v1">
+    <application>
+      <supportedOS Id="{e2011457-1546-43c5-a5fe-008deee3d3f0}" />
+      <supportedOS Id="{35138b9a-5d96-4fbd-8e2d-a2440225f93a}" />
+      <supportedOS Id="{4a2f28e3-53b9-4441-ba9c-d69d4a4a6e38}" />
+      <supportedOS Id="{1f676c76-80e1-4239-95bb-83d0f6d0da78}" />
+      <supportedOS Id="{8e0f7a12-bfb3-4fe8-b9a5-48fd50a15a9a}" />
+    </application>
+  </compatibility>
+</assembly>

_service:tar_scm:nasm-2.16.03.tar.xz/x86 Added

_service:tar_scm:nasm-2.16.03.tar.xz/x86/disp8.c Added

@@ -0,0 +1,131 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *   Copyright 1996-2013 The NASM Authors - All Rights Reserved
+ *   See the file AUTHORS included with the NASM distribution for
+ *   the specific copyright holders.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following
+ *   conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * disp8.c   : Contains a common logic for EVEX compressed displacement
+ */
+
+#include "disp8.h"
+
+/*
+ * Find N value for compressed displacement (disp8 * N)
+ */
+uint8_t get_disp8N(insn *ins)
+{
+    static const uint8_t fv_n22VLMAX = {{{16, 32, 64}, {4, 4, 4}},
+                                              {{16, 32, 64}, {8, 8, 8}}};
+    static const uint8_t hv_n2VLMAX    =  {{8, 16, 32}, {4, 4, 4}};
+    static const uint8_t dup_nVLMAX      =   {8, 32, 64};
+
+    bool evex_b           = (ins->evex_p2 & EVEX_P2B) >> 4;
+    enum ttypes   tuple   = ins->evex_tuple;
+    enum vectlens vectlen = (ins->evex_p2 & EVEX_P2LL) >> 5;
+    bool evex_w           = (ins->evex_p1 & EVEX_P1W) >> 7;
+    uint8_t n = 0;
+
+    switch(tuple) {
+    case FV:
+        n = fv_nevex_wevex_bvectlen;
+        break;
+    case HV:
+        n = hv_nevex_bvectlen;
+        break;
+
+    case FVM:
+        /* 16, 32, 64 for VL 128, 256, 512 respectively*/
+        n = 1 << (vectlen + 4);
+        break;
+    case T1S8:  /* N = 1 */
+    case T1S16: /* N = 2 */
+        n = tuple - T1S8 + 1;
+        break;
+    case T1S:
+        /* N = 4 for 32bit, 8 for 64bit */
+        n = evex_w ? 8 : 4;
+        break;
+    case T1F32:
+    case T1F64:
+        /* N = 4 for 32bit, 8 for 64bit */
+        n = (tuple == T1F32 ? 4 : 8);
+        break;
+    case T2:
+    case T4:
+    case T8:
+        if (vectlen + 7 <= (evex_w + 5) + (tuple - T2 + 1))
+            n = 0;
+        else
+            n = 1 << (tuple - T2 + evex_w + 3);
+        break;
+    case HVM:
+    case QVM:
+    case OVM:
+        n = 1 << (OVM - tuple + vectlen + 1);
+        break;
+    case M128:
+        n = 16;
+        break;
+    case DUP:
+        n = dup_nvectlen;
+        break;
+
+    default:
+        break;
+    }
+
+    return n;
+}
+
+/*
+ * Check if offset is a multiple of N with corresponding tuple type
+ * if Disp8*N is available, compressed displacement is stored in compdisp
+ */
+bool is_disp8n(operand *input, insn *ins, int8_t *compdisp)
+{
+    int32_t off           = input->offset;
+    uint8_t n;
+    int32_t disp8;
+
+    n = get_disp8N(ins);
+
+    if (n && !(off & (n - 1))) {
+        disp8 = off / n;
+        /* if it fits in Disp8 */
+        if (disp8 >= -128 && disp8 <= 127) {
+            *compdisp = disp8;
+            return true;
+        }
+    }
+
+    *compdisp = 0;
+    return false;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/x86/iflag.c Added

@@ -0,0 +1,325 @@
+/* This file is auto-generated. Don't edit. */
+#include "iflag.h"
+
+/* All combinations of instruction flags used in instruction patterns */
+const iflag_t insns_flags319 = {
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /*   0 : 8086 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /*   1 : 8086,NOLONG */
+    {{UINT32_C(0x00000004),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /*   2 : 8086,NOLONG,SB */
+    {{UINT32_C(0x00000001),UINT32_C(0x00000008),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /*   3 : 8086,LOCK,SM */
+    {{UINT32_C(0x00000001),UINT32_C(0x00000008),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /*   4 : 386,LOCK,SM */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /*   5 : 386 */
+    {{UINT32_C(0x00000001),UINT32_C(0x00000048),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /*   6 : LOCK,LONG,SM,X86_64 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /*   7 : LONG,X86_64 */
+    {{UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /*   8 : 8086,SM */
+    {{UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /*   9 : 386,SM */
+    {{UINT32_C(0x00000001),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /*  10 : LONG,SM,X86_64 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000008),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /*  11 : 8086,LOCK */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000008),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /*  12 : 386,LOCK */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000048),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /*  13 : LOCK,LONG,X86_64 */
+    {{UINT32_C(0x00000001),UINT32_C(0x00000028),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /*  14 : 8086,LOCK,NOLONG,SM */
+    {{UINT32_C(0x00000001),UINT32_C(0x00000024),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004)}}, /*  15 : 286,NOLONG,PROT,SM */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000024),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004)}}, /*  16 : 286,NOLONG,PROT */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00200000),UINT32_C(0x00040020)}}, /*  17 : CYRIX,OBSOLETE,PENT */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000002)}}, /*  18 : 186,NOLONG */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /*  19 : 386,NOLONG */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000010)}}, /*  20 : 486 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /*  21 : 8086,BND */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000420),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /*  22 : 8086,BND,NOLONG */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000420),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /*  23 : 386,BND,NOLONG */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000440),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /*  24 : BND,LONG,X86_64 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004)}}, /*  25 : 286,PRIV */
+    {{UINT32_C(0x00000001),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /*  26 : 8086,NOLONG,SM */
+    {{UINT32_C(0x00000001),UINT32_C(0x00000008),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020)}}, /*  27 : LOCK,PENT,SM */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020)}}, /*  28 : PENT */
+    {{UINT32_C(0x00000001),UINT32_C(0x00000808),UINT32_C(0x00000000),UINT32_C(0x00200000),UINT32_C(0x00000010)}}, /*  29 : 486,LOCK,OBSOLETE,SM,UNDOC */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000800),UINT32_C(0x00000000),UINT32_C(0x00200000),UINT32_C(0x00000010)}}, /*  30 : 486,OBSOLETE,UNDOC */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000008),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020)}}, /*  31 : LOCK,PENT */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00040020)}}, /*  32 : CYRIX,PENT */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00040040)}}, /*  33 : CYRIX,P6 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00004000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020)}}, /*  34 : MMX,PENT */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000002)}}, /*  35 : 186 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /*  36 : 8086,FPU */
+    {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000040)}}, /*  37 : FPU,P6 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /*  38 : 386,FPU */
+    {{UINT32_C(0x00000000),UINT32_C(0x00008000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020)}}, /*  39 : 3DNOW,PENT */
+    {{UINT32_C(0x00000000),UINT32_C(0x00002800),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004)}}, /*  40 : 286,FPU,UNDOC */
+    {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000200)}}, /*  41 : FPU,PRESCOTT */
+    {{UINT32_C(0x00000008),UINT32_C(0x00002000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /*  42 : 8086,FPU,SW */
+    {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004)}}, /*  43 : 286,FPU */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /*  44 : 8086,PRIV */
+    {{UINT32_C(0x00000008),UINT32_C(0x00000800),UINT32_C(0x00000000),UINT32_C(0x00200000),UINT32_C(0x00000008)}}, /*  45 : 386,OBSOLETE,SW,UNDOC */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000800),UINT32_C(0x00000000),UINT32_C(0x00200000),UINT32_C(0x00000008)}}, /*  46 : 386,OBSOLETE,UNDOC */
+    {{UINT32_C(0x00000010),UINT32_C(0x00000800),UINT32_C(0x00000000),UINT32_C(0x00200000),UINT32_C(0x00000008)}}, /*  47 : 386,OBSOLETE,SD,UNDOC */
+    {{UINT32_C(0x00000002),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000002)}}, /*  48 : 186,SM2 */
+    {{UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000002)}}, /*  49 : 186,SM */
+    {{UINT32_C(0x00000002),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /*  50 : 386,SM2 */
+    {{UINT32_C(0x00000002),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /*  51 : LONG,SM2,X86_64 */
+    {{UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /*  52 : 8086,SB */
+    {{UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /*  53 : 386,SB */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000010)}}, /*  54 : 486,PRIV */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000021),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /*  55 : FUTURE,INVPCID,NOLONG,PRIV */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000041),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /*  56 : FUTURE,INVPCID,LONG,PRIV */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080400)}}, /*  57 : AMD,NOLONG,X86_64 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080400)}}, /*  58 : AMD,X86_64 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080400)}}, /*  59 : AMD,LONG,X86_64 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /*  60 : IA64 */
+    {{UINT32_C(0x00000008),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004)}}, /*  61 : 286,PROT,SW */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004)}}, /*  62 : 286,PROT */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /*  63 : 386,PROT */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000044),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /*  64 : LONG,PROT,X86_64 */
+    {{UINT32_C(0x00000008),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /*  65 : 386,PROT,SW */
+    {{UINT32_C(0x00000008),UINT32_C(0x00000044),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /*  66 : LONG,PROT,SW,X86_64 */
+    {{UINT32_C(0x00000800),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /*  67 : 8086,ANYSIZE */
+    {{UINT32_C(0x00000800),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /*  68 : 386,ANYSIZE */
+    {{UINT32_C(0x00000800),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /*  69 : ANYSIZE,LONG,X86_64 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000005),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004)}}, /*  70 : 286,PRIV,PROT */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000800),UINT32_C(0x00000000),UINT32_C(0x00200000),UINT32_C(0x00000004)}}, /*  71 : 286,OBSOLETE,UNDOC */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000200)}}, /*  72 : PRESCOTT */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000200)}}, /*  73 : NOLONG,PRESCOTT */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000)}}, /*  74 : AMD */
+    {{UINT32_C(0x00000008),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /*  75 : 8086,SW */
+    {{UINT32_C(0x00020000),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /*  76 : LONG,OPT,X86_64 */
+    {{UINT32_C(0x00020000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /*  77 : 8086,OPT */
+    {{UINT32_C(0x00020000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /*  78 : 386,OPT */
+    {{UINT32_C(0x00000001),UINT32_C(0x00000080),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /*  79 : 8086,NOHLE,SM */
+    {{UINT32_C(0x00000001),UINT32_C(0x00000080),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /*  80 : 386,NOHLE,SM */
+    {{UINT32_C(0x00000001),UINT32_C(0x000000c0),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /*  81 : LONG,NOHLE,SM,X86_64 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000021),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /*  82 : 386,NOLONG,PRIV */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000041),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /*  83 : LONG,PRIV,X86_64 */
+    {{UINT32_C(0x00020001),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /*  84 : LONG,OPT,SM,X86_64 */
+    {{UINT32_C(0x00000010),UINT32_C(0x00004000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020)}}, /*  85 : MMX,PENT,SD */
+    {{UINT32_C(0x00000400),UINT32_C(0x00004040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /*  86 : LONG,MMX,SX,X86_64 */
+    {{UINT32_C(0x00000020),UINT32_C(0x00004000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020)}}, /*  87 : MMX,PENT,SQ */
+    {{UINT32_C(0x00000000),UINT32_C(0x00004040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /*  88 : LONG,MMX,X86_64 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000040)}}, /*  89 : P6 */
+    {{UINT32_C(0x00000020),UINT32_C(0x00004000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00040020)}}, /*  90 : CYRIX,MMX,PENT,SQ */
+    {{UINT32_C(0x00000020),UINT32_C(0x00008000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020)}}, /*  91 : 3DNOW,PENT,SQ */
+    {{UINT32_C(0x00000001),UINT32_C(0x00004000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00040020)}}, /*  92 : CYRIX,MMX,PENT,SM */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000800),UINT32_C(0x00000000),UINT32_C(0x00200000),UINT32_C(0x00000001)}}, /*  93 : 8086,OBSOLETE,UNDOC */
+    {{UINT32_C(0x00001200),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000002)}}, /*  94 : 186,AR0,SIZE */
+    {{UINT32_C(0x00001200),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /*  95 : 386,AR0,NOLONG,SIZE */
+    {{UINT32_C(0x00000010),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /*  96 : 386,NOLONG,SD */
+    {{UINT32_C(0x00001200),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /*  97 : AR0,LONG,SIZE,X86_64 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000002),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00040040)}}, /*  98 : CYRIX,P6,SMM */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020)}}, /*  99 : PENT,PRIV */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /* 100 : X86_64 */
+    {{UINT32_C(0x00000008),UINT32_C(0x00000400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 101 : 8086,BND,SW */
+    {{UINT32_C(0x00000008),UINT32_C(0x00000420),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 102 : 8086,BND,NOLONG,SW */
+    {{UINT32_C(0x00000008),UINT32_C(0x00000440),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /* 103 : BND,LONG,SW,X86_64 */
+    {{UINT32_C(0x00000008),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /* 104 : LONG,SW,X86_64 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000002),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00040010)}}, /* 105 : 486,CYRIX,SMM */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000002),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020)}}, /* 106 : PENT,SMM */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000800),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 107 : 8086,UNDOC */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004)}}, /* 108 : 286 */
+    {{UINT32_C(0x00004006),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 109 : 386,AR2,SB,SM2 */
+    {{UINT32_C(0x00004006),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /* 110 : AR2,LONG,SB,SM2,X86_64 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000800),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 111 : 386,UNDOC */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00200000),UINT32_C(0x00040010)}}, /* 112 : 486,CYRIX,OBSOLETE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080040)}}, /* 113 : AMD,P6 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000040)}}, /* 114 : P6,PRIV */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080040)}}, /* 115 : AMD,P6,PRIV */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00200000),UINT32_C(0x00000002)}}, /* 116 : 186,OBSOLETE */
+    {{UINT32_C(0x00000001),UINT32_C(0x00000800),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 117 : 386,SM,UNDOC */
+    {{UINT32_C(0x00000001),UINT32_C(0x00000008),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000010)}}, /* 118 : 486,LOCK,SM */
+    {{UINT32_C(0x00000008),UINT32_C(0x00000800),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 119 : 386,SW,UNDOC */
+    {{UINT32_C(0x00000010),UINT32_C(0x00000800),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 120 : 386,SD,UNDOC */
+    {{UINT32_C(0x00000001),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 121 : 8086,LOCK1,SM */
+    {{UINT32_C(0x00000001),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 122 : 386,LOCK1,SM */
+    {{UINT32_C(0x00000001),UINT32_C(0x00000050),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /* 123 : LOCK1,LONG,SM,X86_64 */
+    {{UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000040)}}, /* 124 : P6,SM */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 125 : 386,BND */
+    {{UINT32_C(0x00000000),UINT32_C(0x00010000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000080)}}, /* 126 : KATMAI,SSE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00014000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000080)}}, /* 127 : KATMAI,MMX,SSE */
+    {{UINT32_C(0x00002010),UINT32_C(0x00010000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000080)}}, /* 128 : AR1,KATMAI,SD,SSE */
+    {{UINT32_C(0x00002020),UINT32_C(0x00010040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /* 129 : AR1,LONG,SQ,SSE,X86_64 */
+    {{UINT32_C(0x00002010),UINT32_C(0x00010040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /* 130 : AR1,LONG,SD,SSE,X86_64 */
+    {{UINT32_C(0x00000020),UINT32_C(0x00014000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000080)}}, /* 131 : KATMAI,MMX,SQ,SSE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00010040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /* 132 : LONG,SSE,X86_64 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00012000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000040)}}, /* 133 : FPU,P6,SSE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00012040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /* 134 : FPU,LONG,SSE,X86_64 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 135 : NEHALEM */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 136 : NEHALEM,PRIV */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 137 : LONG,NEHALEM */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 138 : FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 139 : FUTURE,LONG */
+    {{UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000080)}}, /* 140 : KATMAI,SB */
+    {{UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400),UINT32_C(0x00004000)}}, /* 141 : FUTURE,PREFETCHI,SB */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000080)}}, /* 142 : KATMAI */
+    {{UINT32_C(0x00000000),UINT32_C(0x00004000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000080)}}, /* 143 : KATMAI,MMX */
+    {{UINT32_C(0x00000020),UINT32_C(0x00004000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000080)}}, /* 144 : KATMAI,MMX,SQ */
+    {{UINT32_C(0x00004004),UINT32_C(0x00004000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000080)}}, /* 145 : AR2,KATMAI,MMX,SB */
+    {{UINT32_C(0x00004006),UINT32_C(0x00004000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000080)}}, /* 146 : AR2,KATMAI,MMX,SB,SM2 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00020000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000100)}}, /* 147 : SSE2,WILLAMETTE */
+    {{UINT32_C(0x00000040),UINT32_C(0x00020000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000100)}}, /* 148 : SO,SSE2,WILLAMETTE */
+    {{UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000100)}}, /* 149 : SD,WILLAMETTE */
+    {{UINT32_C(0x00000020),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /* 150 : LONG,SQ,X86_64 */
+    {{UINT32_C(0x00000010),UINT32_C(0x00020000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000100)}}, /* 151 : SD,SSE2,WILLAMETTE */
+    {{UINT32_C(0x00000020),UINT32_C(0x00020000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000100)}}, /* 152 : SQ,SSE2,WILLAMETTE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00020040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /* 153 : LONG,SSE2,X86_64 */
+    {{UINT32_C(0x00000020),UINT32_C(0x00004000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000100)}}, /* 154 : MMX,SQ,WILLAMETTE */
+    {{UINT32_C(0x00004004),UINT32_C(0x00020000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000100)}}, /* 155 : AR2,SB,SSE2,WILLAMETTE */
+    {{UINT32_C(0x00004004),UINT32_C(0x00020040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /* 156 : AR2,LONG,SB,SSE2,X86_64 */
+    {{UINT32_C(0x00004006),UINT32_C(0x00020000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000100)}}, /* 157 : AR2,SB,SM2,SSE2,WILLAMETTE */
+    {{UINT32_C(0x00002004),UINT32_C(0x00020000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000100)}}, /* 158 : AR1,SB,SSE2,WILLAMETTE */
+    {{UINT32_C(0x00002020),UINT32_C(0x00020000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000100)}}, /* 159 : AR1,SQ,SSE2,WILLAMETTE */
+    {{UINT32_C(0x00002020),UINT32_C(0x00020040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /* 160 : AR1,LONG,SQ,SSE2,X86_64 */
+    {{UINT32_C(0x00002010),UINT32_C(0x00020000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000100)}}, /* 161 : AR1,SD,SSE2,WILLAMETTE */
+    {{UINT32_C(0x00000040),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000200)}}, /* 162 : PRESCOTT,SO,SSE3 */
+    {{UINT32_C(0x00000020),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000200)}}, /* 163 : PRESCOTT,SQ,SSE3 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000200)}}, /* 164 : PRESCOTT,SSE3 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000)}}, /* 165 : AMD,VMX */
+    {{UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000)}}, /* 166 : VMX */
+    {{UINT32_C(0x00000010),UINT32_C(0x00080020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000)}}, /* 167 : NOLONG,SD,VMX */
+    {{UINT32_C(0x00000020),UINT32_C(0x00080040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /* 168 : LONG,SQ,VMX,X86_64 */
+    {{UINT32_C(0x00000040),UINT32_C(0x00080020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000)}}, /* 169 : NOLONG,SO,VMX */
+    {{UINT32_C(0x00000040),UINT32_C(0x00080040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000)}}, /* 170 : LONG,SO,VMX */
+    {{UINT32_C(0x00000020),UINT32_C(0x00104000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000)}}, /* 171 : MMX,SQ,SSSE3 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00100000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000)}}, /* 172 : SSSE3 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00200000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000)}}, /* 173 : AMD,SSE4A */
+    {{UINT32_C(0x00000020),UINT32_C(0x00200000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000)}}, /* 174 : AMD,SQ,SSE4A */
+    {{UINT32_C(0x00000010),UINT32_C(0x00200000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000)}}, /* 175 : AMD,SD,SSE4A */
+    {{UINT32_C(0x00000000),UINT32_C(0x00400000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000)}}, /* 176 : SSE41 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00400040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /* 177 : LONG,SSE41,X86_64 */
+    {{UINT32_C(0x00004004),UINT32_C(0x00400000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000)}}, /* 178 : AR2,SB,SSE41 */
+    {{UINT32_C(0x00004004),UINT32_C(0x00400040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /* 179 : AR2,LONG,SB,SSE41,X86_64 */
+    {{UINT32_C(0x00000020),UINT32_C(0x00400000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000)}}, /* 180 : SQ,SSE41 */
+    {{UINT32_C(0x00000010),UINT32_C(0x00400000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000)}}, /* 181 : SD,SSE41 */
+    {{UINT32_C(0x00000008),UINT32_C(0x00400000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000)}}, /* 182 : SSE41,SW */
+    {{UINT32_C(0x00000000),UINT32_C(0x00800000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000)}}, /* 183 : SSE42 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00800040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /* 184 : LONG,SSE42,X86_64 */
+    {{UINT32_C(0x00000008),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 185 : NEHALEM,SW */
+    {{UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 186 : NEHALEM,SD */
+    {{UINT32_C(0x00000020),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 187 : LONG,NEHALEM,SQ */
+    {{UINT32_C(0x00000020),UINT32_C(0x00008000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00040020)}}, /* 188 : 3DNOW,CYRIX,PENT,SQ */
+    {{UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 189 : NEHALEM,SM */
+    {{UINT32_C(0x00000000),UINT32_C(0x00010000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00001000)}}, /* 190 : SSE,WESTMERE */
+    {{UINT32_C(0x00000000),UINT32_C(0x02000000),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00002000)}}, /* 191 : AVX,SANDYBRIDGE,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000),UINT32_C(0x01000000),UINT32_C(0x00004000)}}, /* 192 : FUTURE,VAES,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004102),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 193 : AVX512,AVX512VL,EVEX,FUTURE,VAES */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004002),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 194 : AVX512,EVEX,FUTURE,VAES */
+    {{UINT32_C(0x00000040),UINT32_C(0x02000000),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00002000)}}, /* 195 : AVX,SANDYBRIDGE,SO,VEX */
+    {{UINT32_C(0x00000080),UINT32_C(0x02000000),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00002000)}}, /* 196 : AVX,SANDYBRIDGE,SY,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x02000040),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00002000)}}, /* 197 : AVX,LONG,SANDYBRIDGE,VEX */
+    {{UINT32_C(0x00000010),UINT32_C(0x02000000),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00002000)}}, /* 198 : AVX,SANDYBRIDGE,SD,VEX */
+    {{UINT32_C(0x00000020),UINT32_C(0x02000040),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00002000)}}, /* 199 : AVX,LONG,SANDYBRIDGE,SQ,VEX */
+    {{UINT32_C(0x00000020),UINT32_C(0x02000000),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00002000)}}, /* 200 : AVX,SANDYBRIDGE,SQ,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000),UINT32_C(0x01000000),UINT32_C(0x00004000)}}, /* 201 : FUTURE,VEX,VPCLMULQDQ */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008100),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 202 : AVX512VL,EVEX,FUTURE,VPCLMULQDQ */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008002),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 203 : AVX512,EVEX,FUTURE,VPCLMULQDQ */
+    {{UINT32_C(0x00000000),UINT32_C(0x08000000),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00004000)}}, /* 204 : FMA,FUTURE,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x02000000),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00004000)}}, /* 205 : AVX,FUTURE,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00020000),UINT32_C(0x00004000)}}, /* 206 : FUTURE,PRIV,SMAP */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00080008)}}, /* 207 : 386,AMD,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00080400)}}, /* 208 : AMD,LONG,VEX,X86_64 */
+    {{UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00080000)}}, /* 209 : AMD,SSE5,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x04000000),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00004000)}}, /* 210 : AVX2,FUTURE,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x80000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 211 : FUTURE,RTM */
+    {{UINT32_C(0x00000000),UINT32_C(0x80000020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 212 : FUTURE,NOLONG,RTM */
+    {{UINT32_C(0x00000000),UINT32_C(0x80000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 213 : FUTURE,LONG,RTM */
+    {{UINT32_C(0x00000000),UINT32_C(0x80001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 214 : FUTURE,HLE,RTM */
+    {{UINT32_C(0x00000000),UINT32_C(0x10000000),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00004000)}}, /* 215 : BMI1,FUTURE,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x10000040),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00004000)}}, /* 216 : BMI1,FUTURE,LONG,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00004000)}}, /* 217 : FUTURE,TBM,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x40000040),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00004000)}}, /* 218 : FUTURE,LONG,TBM,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x20000000),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00004000)}}, /* 219 : BMI2,FUTURE,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x20000040),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00004000)}}, /* 220 : BMI2,FUTURE,LONG,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x10000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 221 : BMI1,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x10000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 222 : BMI1,FUTURE,LONG */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000080),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 223 : FUTURE,PREFETCHWT1 */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000100),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 224 : FUTURE,MIB,MPX */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 225 : FUTURE,MPX */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000020),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 226 : FUTURE,MPX,NOLONG */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 227 : FUTURE,LONG,MPX */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000120),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 228 : FUTURE,MIB,MPX,NOLONG */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000140),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 229 : FUTURE,LONG,MIB,MPX */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 230 : FUTURE,SHA */
+    {{UINT32_C(0x00000000),UINT32_C(0x02000000),UINT32_C(0x00000000),UINT32_C(0x01040000),UINT32_C(0x00004000)}}, /* 231 : AVX,FUTURE,SHA512,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x02000000),UINT32_C(0x00000000),UINT32_C(0x01080000),UINT32_C(0x00004000)}}, /* 232 : AVX,FUTURE,SM3,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x02000000),UINT32_C(0x00000000),UINT32_C(0x01100000),UINT32_C(0x00004000)}}, /* 233 : AVX,FUTURE,SM4,VEX */
+    {{UINT32_C(0x00040008),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x01002000),UINT32_C(0x00004000)}}, /* 234 : AVXNECONVERT,FUTURE,LATEVEX,SW,VEX */
+    {{UINT32_C(0x00040400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x01002000),UINT32_C(0x00004000)}}, /* 235 : AVXNECONVERT,FUTURE,LATEVEX,SX,VEX */
+    {{UINT32_C(0x00040080),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x01002000),UINT32_C(0x00004000)}}, /* 236 : AVXNECONVERT,FUTURE,LATEVEX,SY,VEX */
+    {{UINT32_C(0x00040400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x01004000),UINT32_C(0x00004000)}}, /* 237 : AVXVNNIINT8,FUTURE,LATEVEX,SX,VEX */
+    {{UINT32_C(0x00040080),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x01004000),UINT32_C(0x00004000)}}, /* 238 : AVXVNNIINT8,FUTURE,LATEVEX,SY,VEX */
+    {{UINT32_C(0x00040400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x01008000),UINT32_C(0x00004000)}}, /* 239 : AVXIFMA,FUTURE,LATEVEX,SX,VEX */
+    {{UINT32_C(0x00040080),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x01008000),UINT32_C(0x00004000)}}, /* 240 : AVXIFMA,FUTURE,LATEVEX,SY,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00004000)}}, /* 241 : FUTURE,VEX */
+    {{UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00004000)}}, /* 242 : FUTURE,SM,VEX */
+    {{UINT32_C(0x00000005),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00004000)}}, /* 243 : FUTURE,SB,SM,VEX */
+    {{UINT32_C(0x00000400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00004000)}}, /* 244 : FUTURE,SX,VEX */
+    {{UINT32_C(0x00000002),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00004000)}}, /* 245 : FUTURE,SM2,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000102),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 246 : AVX512,AVX512VL,EVEX,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000002),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 247 : AVX512,EVEX,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000300),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 248 : AVX512DQ,AVX512VL,EVEX,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000200),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 249 : AVX512DQ,EVEX,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000500),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 250 : AVX512BW,AVX512VL,EVEX,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 251 : AVX512BW,EVEX,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 252 : AVX512ER,EVEX,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000010),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 253 : AVX512PF,EVEX,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000104),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 254 : AVX512CD,AVX512VL,EVEX,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 255 : AVX512CD,EVEX,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00001100),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 256 : AVX512VBMI,AVX512VL,EVEX,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00001000),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 257 : AVX512VBMI,EVEX,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000900),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 258 : AVX512IFMA,AVX512VL,EVEX,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 259 : AVX512IFMA,EVEX,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 260 : FUTURE,NOLONG */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000840),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 261 : FUTURE,LONG,UNDOC */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00e00000),UINT32_C(0x00004000)}}, /* 262 : FUTURE,NEVER,NOP,OBSOLETE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00084000)}}, /* 263 : AMD,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00084000)}}, /* 264 : AMD,FUTURE,NOLONG */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00084000)}}, /* 265 : AMD,FUTURE,LONG */
+    {{UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 266 : FUTURE,SD */
+    {{UINT32_C(0x00000020),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 267 : FUTURE,LONG,SQ */
+    {{UINT32_C(0x00000000),UINT32_C(0x00010000),UINT32_C(0x00010000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 268 : FUTURE,GFNI,SSE */
+    {{UINT32_C(0x00000000),UINT32_C(0x02000000),UINT32_C(0x00010000),UINT32_C(0x01000000),UINT32_C(0x00004000)}}, /* 269 : AVX,FUTURE,GFNI,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00010100),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 270 : AVX512VL,EVEX,FUTURE,GFNI */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00010002),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 271 : AVX512,EVEX,FUTURE,GFNI */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00020100),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 272 : AVX512VBMI2,AVX512VL,EVEX,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00020000),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 273 : AVX512VBMI2,EVEX,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00040100),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 274 : AVX512VL,AVX512VNNI,EVEX,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 275 : AVX512VNNI,EVEX,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080100),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 276 : AVX512BITALG,AVX512VL,EVEX,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 277 : AVX512BITALG,EVEX,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00100100),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 278 : AVX512VL,AVX512VPOPCNTDQ,EVEX,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00100000),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 279 : AVX512VPOPCNTDQ,EVEX,FUTURE */
+    {{UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00200000),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 280 : AVX5124FMAPS,EVEX,FUTURE,SO */
+    {{UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00400000),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 281 : AVX5124VNNIW,EVEX,FUTURE,SO */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x02000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 282 : FUTURE,SGX */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x04000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 283 : CET,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x04000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 284 : CET,FUTURE,LONG */
+    {{UINT32_C(0x00000100),UINT32_C(0x00000020),UINT32_C(0x08000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 285 : ENQCMD,FUTURE,NOLONG,SZ */
+    {{UINT32_C(0x00000100),UINT32_C(0x00000000),UINT32_C(0x08000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 286 : ENQCMD,FUTURE,SZ */
+    {{UINT32_C(0x00000100),UINT32_C(0x00000040),UINT32_C(0x08000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 287 : ENQCMD,FUTURE,LONG,SZ */
+    {{UINT32_C(0x00000100),UINT32_C(0x00000021),UINT32_C(0x08000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 288 : ENQCMD,FUTURE,NOLONG,PRIV,SZ */
+    {{UINT32_C(0x00000100),UINT32_C(0x00000001),UINT32_C(0x08000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 289 : ENQCMD,FUTURE,PRIV,SZ */
+    {{UINT32_C(0x00000100),UINT32_C(0x00000041),UINT32_C(0x08000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 290 : ENQCMD,FUTURE,LONG,PRIV,SZ */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x10000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 291 : FUTURE,PCONFIG,PRIV */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x80000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 292 : FUTURE,SERIALIZE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x20000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 293 : FUTURE,PRIV,WBNOINVD */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 294 : FUTURE,TSXLDTRK */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x02000001),UINT32_C(0x00004000)}}, /* 295 : AVX512BF16,EVEX,FUTURE */
+    {{UINT32_C(0x00000100),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x01000004),UINT32_C(0x00004000)}}, /* 296 : AMXTILE,FUTURE,LONG,SZ,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x01000008),UINT32_C(0x00004000)}}, /* 297 : AMXBF16,FUTURE,LONG,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x01000010),UINT32_C(0x00004000)}}, /* 298 : AMXINT8,FUTURE,LONG,VEX */
+    {{UINT32_C(0x00000400),UINT32_C(0x00000340),UINT32_C(0x00000000),UINT32_C(0x01000004),UINT32_C(0x00004000)}}, /* 299 : AMXTILE,FUTURE,LONG,MIB,SIB,SX,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x01000004),UINT32_C(0x00004000)}}, /* 300 : AMXTILE,FUTURE,LONG,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00800100),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 301 : AVX512FP16,AVX512VL,EVEX,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00800000),UINT32_C(0x02000000),UINT32_C(0x00004000)}}, /* 302 : AVX512FP16,EVEX,FUTURE */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x01000000),UINT32_C(0x00004000)}}, /* 303 : AVX512FC16,FUTURE,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x01000100),UINT32_C(0x01000000),UINT32_C(0x00004000)}}, /* 304 : AVX512FC16,AVX512VL,FUTURE,VEX */
+    {{UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000080),UINT32_C(0x00004000)}}, /* 305 : FUTURE,RAOINT,SD */
+    {{UINT32_C(0x00000020),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000080),UINT32_C(0x00004000)}}, /* 306 : FUTURE,LONG,RAOINT,SQ */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000100),UINT32_C(0x00004000)}}, /* 307 : FUTURE,LONG,UINTR */
+    {{UINT32_C(0x00000010),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x01000200),UINT32_C(0x00004000)}}, /* 308 : CMPCCXADD,FUTURE,LONG,SD,VEX */
+    {{UINT32_C(0x00000020),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x01000200),UINT32_C(0x00004000)}}, /* 309 : CMPCCXADD,FUTURE,LONG,SQ,VEX */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000041),UINT32_C(0x00000000),UINT32_C(0x00000020),UINT32_C(0x00004000)}}, /* 310 : FRED,FUTURE,LONG,PRIV */
+    {{UINT32_C(0x00000008),UINT32_C(0x00000041),UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00004000)}}, /* 311 : FUTURE,LKGS,LONG,PRIV,SW */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000041),UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00004000)}}, /* 312 : FUTURE,LKGS,LONG,PRIV */
+    {{UINT32_C(0x00020000),UINT32_C(0x00000041),UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00004000)}}, /* 313 : FUTURE,LKGS,LONG,OPT,PRIV */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000041),UINT32_C(0x00000000),UINT32_C(0x00000800),UINT32_C(0x00004000)}}, /* 314 : FUTURE,LONG,PRIV,WRMSRNS */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000041),UINT32_C(0x00000000),UINT32_C(0x00001000),UINT32_C(0x00004000)}}, /* 315 : FUTURE,LONG,MSRLIST,PRIV */
+    {{UINT32_C(0x00000004),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00010000),UINT32_C(0x00004000)}}, /* 316 : FUTURE,HRESET,PRIV,SB */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000800),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000040)}}, /* 317 : P6,UNDOC */
+    {{UINT32_C(0x00000000),UINT32_C(0x00000840),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /* 318 : LONG,UNDOC,X86_64 */
+};

_service:tar_scm:nasm-2.16.03.tar.xz/x86/iflaggen.h Added

@@ -0,0 +1,299 @@
+/* This file is auto-generated. Don't edit. */
+#ifndef NASM_IFLAGGEN_H
+#define NASM_IFLAGGEN_H 1
+
+#define IF_SM                 0 /* Size match                                                       */
+#define IF_SM2                1 /* Size match first two operands                                    */
+#define IF_SB                 2 /* Unsized operands can't be non-byte                               */
+#define IF_SW                 3 /* Unsized operands can't be non-word                               */
+#define IF_SD                 4 /* Unsized operands can't be non-dword                              */
+#define IF_SQ                 5 /* Unsized operands can't be non-qword                              */
+#define IF_SO                 6 /* Unsized operands can't be non-oword                              */
+#define IF_SY                 7 /* Unsized operands can't be non-yword                              */
+#define IF_SZ                 8 /* Unsized operands can't be non-zword                              */
+#define IF_SIZE               9 /* Unsized operands must match the bitsize                          */
+#define IF_SX                10 /* Unsized operands not allowed                                     */
+#define IF_ANYSIZE           11 /* Ignore operand size even if explicit                             */
+#define IF_AR0               12 /* SB, SW, SD applies to argument 0                                 */
+#define IF_AR1               13 /* SB, SW, SD applies to argument 1                                 */
+#define IF_AR2               14 /* SB, SW, SD applies to argument 2                                 */
+#define IF_AR3               15 /* SB, SW, SD applies to argument 3                                 */
+#define IF_AR4               16 /* SB, SW, SD applies to argument 4                                 */
+#define IF_OPT               17 /* Optimizing assembly only                                         */
+#define IF_LATEVEX           18 /* Only if EVEX instructions are disabled                           */
+                                /* 18...31 reserved                                                 */
+#define IF_PRIV              32 /* Privileged instruction                                           */
+#define IF_SMM               33 /* Only valid in SMM                                                */
+#define IF_PROT              34 /* Protected mode only                                              */
+#define IF_LOCK              35 /* Lockable if operand 0 is memory                                  */
+#define IF_LOCK1             36 /* Lockable if operand 1 is memory                                  */
+#define IF_NOLONG            37 /* Not available in long mode                                       */
+#define IF_LONG              38 /* Long mode                                                        */
+#define IF_NOHLE             39 /* HLE prefixes forbidden                                           */
+#define IF_MIB               40 /* split base/index EA                                              */
+#define IF_SIB               41 /* SIB encoding required                                            */
+#define IF_BND               42 /* BND (0xF2) prefix available                                      */
+#define IF_UNDOC             43 /* Undocumented                                                     */
+#define IF_HLE               44 /* HLE prefixed                                                     */
+#define IF_FPU               45 /* FPU                                                              */
+#define IF_MMX               46 /* MMX                                                              */
+#define IF_3DNOW             47 /* 3DNow!                                                           */
+#define IF_SSE               48 /* SSE (KNI, MMX2)                                                  */
+#define IF_SSE2              49 /* SSE2                                                             */
+#define IF_SSE3              50 /* SSE3 (PNI)                                                       */
+#define IF_VMX               51 /* VMX                                                              */
+#define IF_SSSE3             52 /* SSSE3                                                            */
+#define IF_SSE4A             53 /* AMD SSE4a                                                        */
+#define IF_SSE41             54 /* SSE4.1                                                           */
+#define IF_SSE42             55 /* SSE4.2                                                           */
+#define IF_SSE5              56 /* SSE5                                                             */
+#define IF_AVX               57 /* AVX  (256-bit floating point)                                    */
+#define IF_AVX2              58 /* AVX2 (256-bit integer)                                           */
+#define IF_FMA               59 /*                                                                  */
+#define IF_BMI1              60 /*                                                                  */
+#define IF_BMI2              61 /*                                                                  */
+#define IF_TBM               62 /*                                                                  */
+#define IF_RTM               63 /*                                                                  */
+#define IF_INVPCID           64 /*                                                                  */
+#define IF_AVX512            65 /* AVX-512F (512-bit base architecture)                             */
+#define IF_AVX512CD          66 /* AVX-512 Conflict Detection                                       */
+#define IF_AVX512ER          67 /* AVX-512 Exponential and Reciprocal                               */
+#define IF_AVX512PF          68 /* AVX-512 Prefetch                                                 */
+#define IF_MPX               69 /* MPX                                                              */
+#define IF_SHA               70 /* SHA                                                              */
+#define IF_PREFETCHWT1       71 /* PREFETCHWT1                                                      */
+#define IF_AVX512VL          72 /* AVX-512 Vector Length Orthogonality                              */
+#define IF_AVX512DQ          73 /* AVX-512 Dword and Qword                                          */
+#define IF_AVX512BW          74 /* AVX-512 Byte and Word                                            */
+#define IF_AVX512IFMA        75 /* AVX-512 IFMA instructions                                        */
+#define IF_AVX512VBMI        76 /* AVX-512 VBMI instructions                                        */
+#define IF_AES               77 /* AES instructions                                                 */
+#define IF_VAES              78 /* AES AVX instructions                                             */
+#define IF_VPCLMULQDQ        79 /* AVX Carryless Multiplication                                     */
+#define IF_GFNI              80 /* Galois Field instructions                                        */
+#define IF_AVX512VBMI2       81 /* AVX-512 VBMI2 instructions                                       */
+#define IF_AVX512VNNI        82 /* AVX-512 VNNI instructions                                        */
+#define IF_AVX512BITALG      83 /* AVX-512 Bit Algorithm instructions                               */
+#define IF_AVX512VPOPCNTDQ   84 /* AVX-512 VPOPCNTD/VPOPCNTQ                                        */
+#define IF_AVX5124FMAPS      85 /* AVX-512 4-iteration multiply-add                                 */
+#define IF_AVX5124VNNIW      86 /* AVX-512 4-iteration dot product                                  */
+#define IF_AVX512FP16        87 /* AVX-512 FP16 instructions                                        */
+#define IF_AVX512FC16        88 /* AVX-512 FC16 instructions                                        */
+#define IF_SGX               89 /* Intel Software Guard Extensions (SGX)                            */
+#define IF_CET               90 /* Intel Control-Flow Enforcement Technology (CET)                  */
+#define IF_ENQCMD            91 /* Enqueue command instructions                                     */
+#define IF_PCONFIG           92 /* Platform configuration instruction                               */
+#define IF_WBNOINVD          93 /* Writeback and do not invalidate instruction                      */
+#define IF_TSXLDTRK          94 /* TSX suspend load address tracking                                */
+#define IF_SERIALIZE         95 /* SERIALIZE instruction                                            */
+#define IF_AVX512BF16        96 /* AVX-512 bfloat16                                                 */
+#define IF_AVX512VP2INTERSECT  97 /* AVX-512 VP2INTERSECT instructions                                */
+#define IF_AMXTILE           98 /* AMX tile configuration instructions                              */
+#define IF_AMXBF16           99 /* AMX bfloat16 multiplication                                      */
+#define IF_AMXINT8          100 /* AMX 8-bit integer multiplication                                 */
+#define IF_FRED             101 /* Flexible Return and Exception Delivery (FRED)                    */
+#define IF_LKGS             102 /* Load User GS from Kernel (LKGS)                                  */
+#define IF_RAOINT           103 /* Remote atomic operations (RAO-INT)                               */
+#define IF_UINTR            104 /* User interrupts                                                  */
+#define IF_CMPCCXADD        105 /* CMPccXADD instructions                                           */
+#define IF_PREFETCHI        106 /* PREFETCHI0 and PREFETCHI1                                        */
+#define IF_WRMSRNS          107 /* WRMSRNS                                                          */
+#define IF_MSRLIST          108 /* RDMSRLIST and WRMSRLIST                                          */
+#define IF_AVXNECONVERT     109 /* AVX exceptionless floating-point conversions                     */
+#define IF_AVXVNNIINT8      110 /* AVX Vector Neural Network 8-bit integer instructions             */
+#define IF_AVXIFMA          111 /* AVX integer multiply and add                                     */
+#define IF_HRESET           112 /* History reset                                                    */
+#define IF_SMAP             113 /* Supervisor Mode Access Prevention (SMAP)                         */
+#define IF_SHA512           114 /* SHA512 instructions                                              */
+#define IF_SM3              115 /* SM3 instructions                                                 */
+#define IF_SM4              116 /* SM4 instructions                                                 */
+#define IF_OBSOLETE         117 /* Instruction removed from architecture                            */
+#define IF_NEVER            118 /* Instruction never implemented                                    */
+#define IF_NOP              119 /* Instruction is always a (nonintentional) NOP                     */
+#define IF_VEX              120 /* VEX or XOP encoded instruction                                   */
+#define IF_EVEX             121 /* EVEX encoded instruction                                         */
+                                /* 121...127 reserved                                               */
+#define IF_8086             128 /* 8086                                                             */
+#define IF_186              129 /* 186+                                                             */
+#define IF_286              130 /* 286+                                                             */
+#define IF_386              131 /* 386+                                                             */
+#define IF_486              132 /* 486+                                                             */
+#define IF_PENT             133 /* Pentium                                                          */
+#define IF_P6               134 /* P6                                                               */
+#define IF_KATMAI           135 /* Katmai                                                           */
+#define IF_WILLAMETTE       136 /* Willamette                                                       */
+#define IF_PRESCOTT         137 /* Prescott                                                         */
+#define IF_X86_64           138 /* x86-64 (long or legacy mode)                                     */
+#define IF_NEHALEM          139 /* Nehalem                                                          */
+#define IF_WESTMERE         140 /* Westmere                                                         */
+#define IF_SANDYBRIDGE      141 /* Sandy Bridge                                                     */
+#define IF_FUTURE           142 /* Ivy Bridge or newer                                              */
+#define IF_IA64             143 /* IA64 (in x86 mode)                                               */
+#define IF_DEFAULT          144 /* Default CPU level                                                */
+#define IF_ANY              145 /* Allow any known instruction                                      */
+#define IF_CYRIX            146 /* Cyrix-specific                                                   */
+#define IF_AMD              147 /* AMD-specific                                                     */
+                                /* 147...159 reserved                                               */
+
+/* Mask bits for field 0 : 0...31 */
+#define IFM_SM              UINT32_C(0x00000001)     /*   0 */
+#define IFM_SM2             UINT32_C(0x00000002)     /*   1 */
+#define IFM_SB              UINT32_C(0x00000004)     /*   2 */
+#define IFM_SW              UINT32_C(0x00000008)     /*   3 */
+#define IFM_SD              UINT32_C(0x00000010)     /*   4 */
+#define IFM_SQ              UINT32_C(0x00000020)     /*   5 */
+#define IFM_SO              UINT32_C(0x00000040)     /*   6 */
+#define IFM_SY              UINT32_C(0x00000080)     /*   7 */
+#define IFM_SZ              UINT32_C(0x00000100)     /*   8 */
+#define IFM_SIZE            UINT32_C(0x00000200)     /*   9 */
+#define IFM_SX              UINT32_C(0x00000400)     /*  10 */
+#define IFM_ANYSIZE         UINT32_C(0x00000800)     /*  11 */
+#define IFM_AR0             UINT32_C(0x00001000)     /*  12 */
+#define IFM_AR1             UINT32_C(0x00002000)     /*  13 */
+#define IFM_AR2             UINT32_C(0x00004000)     /*  14 */
+#define IFM_AR3             UINT32_C(0x00008000)     /*  15 */
+#define IFM_AR4             UINT32_C(0x00010000)     /*  16 */
+#define IFM_OPT             UINT32_C(0x00020000)     /*  17 */
+#define IFM_LATEVEX         UINT32_C(0x00040000)     /*  18 */
+/* Mask bits for field 1 : 32...63 */
+#define IFM_PRIV            UINT32_C(0x00000001)     /*  32 */
+#define IFM_SMM             UINT32_C(0x00000002)     /*  33 */
+#define IFM_PROT            UINT32_C(0x00000004)     /*  34 */
+#define IFM_LOCK            UINT32_C(0x00000008)     /*  35 */
+#define IFM_LOCK1           UINT32_C(0x00000010)     /*  36 */
+#define IFM_NOLONG          UINT32_C(0x00000020)     /*  37 */
+#define IFM_LONG            UINT32_C(0x00000040)     /*  38 */
+#define IFM_NOHLE           UINT32_C(0x00000080)     /*  39 */
+#define IFM_MIB             UINT32_C(0x00000100)     /*  40 */
+#define IFM_SIB             UINT32_C(0x00000200)     /*  41 */
+#define IFM_BND             UINT32_C(0x00000400)     /*  42 */
+#define IFM_UNDOC           UINT32_C(0x00000800)     /*  43 */
+#define IFM_HLE             UINT32_C(0x00001000)     /*  44 */
+#define IFM_FPU             UINT32_C(0x00002000)     /*  45 */
+#define IFM_MMX             UINT32_C(0x00004000)     /*  46 */
+#define IFM_3DNOW           UINT32_C(0x00008000)     /*  47 */
+#define IFM_SSE             UINT32_C(0x00010000)     /*  48 */
+#define IFM_SSE2            UINT32_C(0x00020000)     /*  49 */
+#define IFM_SSE3            UINT32_C(0x00040000)     /*  50 */
+#define IFM_VMX             UINT32_C(0x00080000)     /*  51 */
+#define IFM_SSSE3           UINT32_C(0x00100000)     /*  52 */
+#define IFM_SSE4A           UINT32_C(0x00200000)     /*  53 */
+#define IFM_SSE41           UINT32_C(0x00400000)     /*  54 */
+#define IFM_SSE42           UINT32_C(0x00800000)     /*  55 */
+#define IFM_SSE5            UINT32_C(0x01000000)     /*  56 */
+#define IFM_AVX             UINT32_C(0x02000000)     /*  57 */
+#define IFM_AVX2            UINT32_C(0x04000000)     /*  58 */
+#define IFM_FMA             UINT32_C(0x08000000)     /*  59 */
+#define IFM_BMI1            UINT32_C(0x10000000)     /*  60 */
+#define IFM_BMI2            UINT32_C(0x20000000)     /*  61 */
+#define IFM_TBM             UINT32_C(0x40000000)     /*  62 */
+#define IFM_RTM             UINT32_C(0x80000000)     /*  63 */
+/* Mask bits for field 2 : 64...95 */
+#define IFM_INVPCID         UINT32_C(0x00000001)     /*  64 */
+#define IFM_AVX512          UINT32_C(0x00000002)     /*  65 */
+#define IFM_AVX512CD        UINT32_C(0x00000004)     /*  66 */
+#define IFM_AVX512ER        UINT32_C(0x00000008)     /*  67 */
+#define IFM_AVX512PF        UINT32_C(0x00000010)     /*  68 */
+#define IFM_MPX             UINT32_C(0x00000020)     /*  69 */
+#define IFM_SHA             UINT32_C(0x00000040)     /*  70 */
+#define IFM_PREFETCHWT1     UINT32_C(0x00000080)     /*  71 */
+#define IFM_AVX512VL        UINT32_C(0x00000100)     /*  72 */
+#define IFM_AVX512DQ        UINT32_C(0x00000200)     /*  73 */
+#define IFM_AVX512BW        UINT32_C(0x00000400)     /*  74 */
+#define IFM_AVX512IFMA      UINT32_C(0x00000800)     /*  75 */
+#define IFM_AVX512VBMI      UINT32_C(0x00001000)     /*  76 */
+#define IFM_AES             UINT32_C(0x00002000)     /*  77 */
+#define IFM_VAES            UINT32_C(0x00004000)     /*  78 */
+#define IFM_VPCLMULQDQ      UINT32_C(0x00008000)     /*  79 */
+#define IFM_GFNI            UINT32_C(0x00010000)     /*  80 */
+#define IFM_AVX512VBMI2     UINT32_C(0x00020000)     /*  81 */
+#define IFM_AVX512VNNI      UINT32_C(0x00040000)     /*  82 */
+#define IFM_AVX512BITALG    UINT32_C(0x00080000)     /*  83 */
+#define IFM_AVX512VPOPCNTDQ UINT32_C(0x00100000)     /*  84 */
+#define IFM_AVX5124FMAPS    UINT32_C(0x00200000)     /*  85 */
+#define IFM_AVX5124VNNIW    UINT32_C(0x00400000)     /*  86 */
+#define IFM_AVX512FP16      UINT32_C(0x00800000)     /*  87 */
+#define IFM_AVX512FC16      UINT32_C(0x01000000)     /*  88 */
+#define IFM_SGX             UINT32_C(0x02000000)     /*  89 */
+#define IFM_CET             UINT32_C(0x04000000)     /*  90 */
+#define IFM_ENQCMD          UINT32_C(0x08000000)     /*  91 */
+#define IFM_PCONFIG         UINT32_C(0x10000000)     /*  92 */
+#define IFM_WBNOINVD        UINT32_C(0x20000000)     /*  93 */
+#define IFM_TSXLDTRK        UINT32_C(0x40000000)     /*  94 */
+#define IFM_SERIALIZE       UINT32_C(0x80000000)     /*  95 */
+/* Mask bits for field 3 : 96...127 */
+#define IFM_AVX512BF16      UINT32_C(0x00000001)     /*  96 */
+#define IFM_AVX512VP2INTERSECT UINT32_C(0x00000002)     /*  97 */
+#define IFM_AMXTILE         UINT32_C(0x00000004)     /*  98 */
+#define IFM_AMXBF16         UINT32_C(0x00000008)     /*  99 */
+#define IFM_AMXINT8         UINT32_C(0x00000010)     /* 100 */
+#define IFM_FRED            UINT32_C(0x00000020)     /* 101 */
+#define IFM_LKGS            UINT32_C(0x00000040)     /* 102 */
+#define IFM_RAOINT          UINT32_C(0x00000080)     /* 103 */
+#define IFM_UINTR           UINT32_C(0x00000100)     /* 104 */
+#define IFM_CMPCCXADD       UINT32_C(0x00000200)     /* 105 */
+#define IFM_PREFETCHI       UINT32_C(0x00000400)     /* 106 */
+#define IFM_WRMSRNS         UINT32_C(0x00000800)     /* 107 */
+#define IFM_MSRLIST         UINT32_C(0x00001000)     /* 108 */
+#define IFM_AVXNECONVERT    UINT32_C(0x00002000)     /* 109 */
+#define IFM_AVXVNNIINT8     UINT32_C(0x00004000)     /* 110 */
+#define IFM_AVXIFMA         UINT32_C(0x00008000)     /* 111 */
+#define IFM_HRESET          UINT32_C(0x00010000)     /* 112 */
+#define IFM_SMAP            UINT32_C(0x00020000)     /* 113 */
+#define IFM_SHA512          UINT32_C(0x00040000)     /* 114 */
+#define IFM_SM3             UINT32_C(0x00080000)     /* 115 */
+#define IFM_SM4             UINT32_C(0x00100000)     /* 116 */
+#define IFM_OBSOLETE        UINT32_C(0x00200000)     /* 117 */
+#define IFM_NEVER           UINT32_C(0x00400000)     /* 118 */
+#define IFM_NOP             UINT32_C(0x00800000)     /* 119 */
+#define IFM_VEX             UINT32_C(0x01000000)     /* 120 */
+#define IFM_EVEX            UINT32_C(0x02000000)     /* 121 */
+/* Mask bits for field 4 : 128...159 */
+#define IFM_8086            UINT32_C(0x00000001)     /* 128 */
+#define IFM_186             UINT32_C(0x00000002)     /* 129 */
+#define IFM_286             UINT32_C(0x00000004)     /* 130 */
+#define IFM_386             UINT32_C(0x00000008)     /* 131 */
+#define IFM_486             UINT32_C(0x00000010)     /* 132 */
+#define IFM_PENT            UINT32_C(0x00000020)     /* 133 */
+#define IFM_P6              UINT32_C(0x00000040)     /* 134 */
+#define IFM_KATMAI          UINT32_C(0x00000080)     /* 135 */
+#define IFM_WILLAMETTE      UINT32_C(0x00000100)     /* 136 */
+#define IFM_PRESCOTT        UINT32_C(0x00000200)     /* 137 */
+#define IFM_X86_64          UINT32_C(0x00000400)     /* 138 */
+#define IFM_NEHALEM         UINT32_C(0x00000800)     /* 139 */
+#define IFM_WESTMERE        UINT32_C(0x00001000)     /* 140 */
+#define IFM_SANDYBRIDGE     UINT32_C(0x00002000)     /* 141 */
+#define IFM_FUTURE          UINT32_C(0x00004000)     /* 142 */
+#define IFM_IA64            UINT32_C(0x00008000)     /* 143 */
+#define IFM_DEFAULT         UINT32_C(0x00010000)     /* 144 */
+#define IFM_ANY             UINT32_C(0x00020000)     /* 145 */
+#define IFM_CYRIX           UINT32_C(0x00040000)     /* 146 */
+#define IFM_AMD             UINT32_C(0x00080000)     /* 147 */
+
+/* IF_SM (0) ... IF_LATEVEX (18) */
+#define IF_IGEN_FIRST         0
+#define IF_IGEN_COUNT        19
+#define IF_IGEN_FIELD         0
+#define IF_IGEN_NFIELDS       1
+
+/* IF_PRIV (32) ... IF_EVEX (121) */
+#define IF_FEATURE_FIRST     32
+#define IF_FEATURE_COUNT     90
+#define IF_FEATURE_FIELD      1
+#define IF_FEATURE_NFIELDS    3
+
+/* IF_8086 (128) ... IF_AMD (147) */
+#define IF_CPU_FIRST        128
+#define IF_CPU_COUNT         20
+#define IF_CPU_FIELD          4
+#define IF_CPU_NFIELDS        1
+
+#define IF_FIELD_COUNT 5
+typedef struct {
+    uint32_t fieldIF_FIELD_COUNT;
+} iflag_t;
+
+/* All combinations of instruction flags used in instruction patterns */
+extern const iflag_t insns_flags319;
+
+#endif /* NASM_IFLAGGEN_H */

_service:tar_scm:nasm-2.16.03.tar.xz/x86/iflags.ph Added

@@ -0,0 +1,159 @@
+# -*- perl -*-
+
+#
+# dword bound, index 0 - specific flags
+#
+if_align('IGEN');
+
+if_("SM",                "Size match");
+if_("SM2",               "Size match first two operands");
+if_("SB",                "Unsized operands can't be non-byte");
+if_("SW",                "Unsized operands can't be non-word");
+if_("SD",                "Unsized operands can't be non-dword");
+if_("SQ",                "Unsized operands can't be non-qword");
+if_("SO",                "Unsized operands can't be non-oword");
+if_("SY",                "Unsized operands can't be non-yword");
+if_("SZ",                "Unsized operands can't be non-zword");
+if_("SIZE",              "Unsized operands must match the bitsize");
+if_("SX",                "Unsized operands not allowed");
+if_("ANYSIZE",           "Ignore operand size even if explicit");
+if_("AR0",               "SB, SW, SD applies to argument 0");
+if_("AR1",               "SB, SW, SD applies to argument 1");
+if_("AR2",               "SB, SW, SD applies to argument 2");
+if_("AR3",               "SB, SW, SD applies to argument 3");
+if_("AR4",               "SB, SW, SD applies to argument 4");
+if_("OPT",               "Optimizing assembly only");
+if_("LATEVEX",            "Only if EVEX instructions are disabled");
+
+#
+# dword bound - instruction feature filtering flags
+#
+if_align('FEATURE');
+
+if_("PRIV",              "Privileged instruction");
+if_("SMM",               "Only valid in SMM");
+if_("PROT",              "Protected mode only");
+if_("LOCK",              "Lockable if operand 0 is memory");
+if_("LOCK1",             "Lockable if operand 1 is memory");
+if_("NOLONG",            "Not available in long mode");
+if_("LONG",              "Long mode");
+if_("NOHLE",             "HLE prefixes forbidden");
+if_("MIB",               "split base/index EA");
+if_("SIB",               "SIB encoding required");
+if_("BND",               "BND (0xF2) prefix available");
+if_("UNDOC",             "Undocumented");
+if_("HLE",               "HLE prefixed");
+if_("FPU",               "FPU");
+if_("MMX",               "MMX");
+if_("3DNOW",             "3DNow!");
+if_("SSE",               "SSE (KNI, MMX2)");
+if_("SSE2",              "SSE2");
+if_("SSE3",              "SSE3 (PNI)");
+if_("VMX",               "VMX");
+if_("SSSE3",             "SSSE3");
+if_("SSE4A",             "AMD SSE4a");
+if_("SSE41",             "SSE4.1");
+if_("SSE42",             "SSE4.2");
+if_("SSE5",              "SSE5");
+if_("AVX",               "AVX  (256-bit floating point)");
+if_("AVX2",              "AVX2 (256-bit integer)");
+if_("FMA",               "");
+if_("BMI1",              "");
+if_("BMI2",              "");
+if_("TBM",               "");
+if_("RTM",               "");
+if_("INVPCID",           "");
+if_("AVX512",            "AVX-512F (512-bit base architecture)");
+if_("AVX512CD",          "AVX-512 Conflict Detection");
+if_("AVX512ER",          "AVX-512 Exponential and Reciprocal");
+if_("AVX512PF",          "AVX-512 Prefetch");
+if_("MPX",               "MPX");
+if_("SHA",               "SHA");
+if_("PREFETCHWT1",       "PREFETCHWT1");
+if_("AVX512VL",          "AVX-512 Vector Length Orthogonality");
+if_("AVX512DQ",          "AVX-512 Dword and Qword");
+if_("AVX512BW",          "AVX-512 Byte and Word");
+if_("AVX512IFMA",        "AVX-512 IFMA instructions");
+if_("AVX512VBMI",        "AVX-512 VBMI instructions");
+if_("AES",               "AES instructions");
+if_("VAES",              "AES AVX instructions");
+if_("VPCLMULQDQ",        "AVX Carryless Multiplication");
+if_("GFNI",              "Galois Field instructions");
+if_("AVX512VBMI2",       "AVX-512 VBMI2 instructions");
+if_("AVX512VNNI",        "AVX-512 VNNI instructions");
+if_("AVX512BITALG",      "AVX-512 Bit Algorithm instructions");
+if_("AVX512VPOPCNTDQ",   "AVX-512 VPOPCNTD/VPOPCNTQ");
+if_("AVX5124FMAPS",      "AVX-512 4-iteration multiply-add");
+if_("AVX5124VNNIW",      "AVX-512 4-iteration dot product");
+if_("AVX512FP16",        "AVX-512 FP16 instructions");
+if_("AVX512FC16",        "AVX-512 FC16 instructions");
+if_("SGX",               "Intel Software Guard Extensions (SGX)");
+if_("CET",               "Intel Control-Flow Enforcement Technology (CET)");
+if_("ENQCMD",            "Enqueue command instructions");
+if_("PCONFIG",           "Platform configuration instruction");
+if_("WBNOINVD",          "Writeback and do not invalidate instruction");
+if_("TSXLDTRK",          "TSX suspend load address tracking");
+if_("SERIALIZE",         "SERIALIZE instruction");
+if_("AVX512BF16",        "AVX-512 bfloat16");
+if_("AVX512VP2INTERSECT", "AVX-512 VP2INTERSECT instructions");
+if_("AMXTILE",           "AMX tile configuration instructions");
+if_("AMXBF16",           "AMX bfloat16 multiplication");
+if_("AMXINT8",           "AMX 8-bit integer multiplication");
+if_("FRED",              "Flexible Return and Exception Delivery (FRED)");
+if_("LKGS",              "Load User GS from Kernel (LKGS)");
+if_("RAOINT",		 "Remote atomic operations (RAO-INT)");
+if_("UINTR",		 "User interrupts");
+if_("CMPCCXADD",         "CMPccXADD instructions");
+if_("PREFETCHI",         "PREFETCHI0 and PREFETCHI1");
+if_("WRMSRNS",		 "WRMSRNS");
+if_("MSRLIST",           "RDMSRLIST and WRMSRLIST");
+if_("AVXNECONVERT",	 "AVX exceptionless floating-point conversions");
+if_("AVXVNNIINT8",       "AVX Vector Neural Network 8-bit integer instructions");
+if_("AVXIFMA",           "AVX integer multiply and add");
+if_("HRESET",            "History reset");
+if_("SMAP",		 "Supervisor Mode Access Prevention (SMAP)");
+if_("SHA512",            "SHA512 instructions");
+if_("SM3",               "SM3 instructions");
+if_("SM4",               "SM4 instructions");
+
+# Put these last to minimize their relevance
+if_("OBSOLETE",          "Instruction removed from architecture");
+if_("NEVER",             "Instruction never implemented");
+if_("NOP",               "Instruction is always a (nonintentional) NOP");
+if_("VEX",               "VEX or XOP encoded instruction");
+if_("EVEX",              "EVEX encoded instruction");
+
+#
+# dword bound - cpu type flags
+#
+# The CYRIX and AMD flags should have the highest bit values; the
+# disassembler selection algorithm depends on it.
+#
+if_align('CPU');
+
+if_("8086",              "8086");
+if_("186",               "186+");
+if_("286",               "286+");
+if_("386",               "386+");
+if_("486",               "486+");
+if_("PENT",              "Pentium");
+if_("P6",                "P6");
+if_("KATMAI",            "Katmai");
+if_("WILLAMETTE",        "Willamette");
+if_("PRESCOTT",          "Prescott");
+if_("X86_64",            "x86-64 (long or legacy mode)");
+if_("NEHALEM",           "Nehalem");
+if_("WESTMERE",          "Westmere");
+if_("SANDYBRIDGE",       "Sandy Bridge");
+if_("FUTURE",            "Ivy Bridge or newer");
+if_("IA64",              "IA64 (in x86 mode)");
+
+# Default CPU level
+if_("DEFAULT",           "Default CPU level");
+
+# Must be the last CPU definition
+if_("ANY",               "Allow any known instruction");
+
+# These must come after the CPU definitions proper
+if_("CYRIX",             "Cyrix-specific");
+if_("AMD",               "AMD-specific");

_service:tar_scm:nasm-2.16.03.tar.xz/x86/insns-iflags.ph Added

@@ -0,0 +1,251 @@
+#!/usr/bin/perl
+## --------------------------------------------------------------------------
+##
+##   Copyright 1996-2018 The NASM Authors - All Rights Reserved
+##   See the file AUTHORS included with the NASM distribution for
+##   the specific copyright holders.
+##
+##   Redistribution and use in source and binary forms, with or without
+##   modification, are permitted provided that the following
+##   conditions are met:
+##
+##   * Redistributions of source code must retain the above copyright
+##     notice, this list of conditions and the following disclaimer.
+##   * Redistributions in binary form must reproduce the above
+##     copyright notice, this list of conditions and the following
+##     disclaimer in the documentation and/or other materials provided
+##     with the distribution.
+##
+##     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+##     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+##     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+##     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+##     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+##     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+##     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+##     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+##     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+##     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+##     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+##     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+##     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+##
+## --------------------------------------------------------------------------
+
+#
+# Instruction template flags. These specify which processor
+# targets the instruction is eligible for, whether it is
+# privileged or undocumented, and also specify extra error
+# checking on the matching of the instruction.
+#
+# IF_SM stands for Size Match: any operand whose size is not
+# explicitly specified by the template is `really' intended to be
+# the same size as the first size-specified operand.
+# Non-specification is tolerated in the input instruction, but
+# _wrong_ specification is not.
+#
+# IF_SM2 invokes Size Match on only the first _two_ operands, for
+# three-operand instructions such as SHLD: it implies that the
+# first two operands must match in size, but that the third is
+# required to be _unspecified_.
+#
+# IF_SB invokes Size Byte: operands with unspecified size in the
+# template are really bytes, and so no non-byte specification in
+# the input instruction will be tolerated. IF_SW similarly invokes
+# Size Word, and IF_SD invokes Size Doubleword.
+#
+# (The default state if neither IF_SM nor IF_SM2 is specified is
+# that any operand with unspecified size in the template is
+# required to have unspecified size in the instruction too...)
+#
+# iflag_t is defined to store these flags.
+#
+# The order does matter here. We use some predefined masks to quick test
+# for a set of flags, so be careful moving bits (and
+# don't forget to update C code generation then).
+#
+sub dword_align($) {
+    my($n) = @_;
+
+    $$n = ($$n + 31) & ~31;
+    return $n;
+}
+
+
+my $n_iflags = 0;
+my %flag_byname;
+my @flag_bynum;
+my @flag_fields;
+my $iflag_words;
+
+sub if_($$) {
+    my($name, $def) = @_;
+    my $num = $n_iflags++;
+    my $v = $num, $name, $def;
+
+    $flag_byname{$name}  = $v;
+    $flag_bynum$num = $v;
+
+    return 1;
+}
+sub if_align($) {
+    my($name) = @_;
+
+    if ($#flag_fields >= 0) {
+	$flag_fields$#flag_fields->2 = $n_iflags-1;
+    }
+    $n_iflags = ($n_iflags + 31) & ~31;
+
+    if (defined($name)) {
+	push(@flag_fields, $name, $n_iflags, undef);
+    }
+
+    return 1;
+}
+
+sub if_end() {
+    if_align(undef);
+    $iflag_words = $n_iflags >> 5;
+}
+
+# The actual flags definitions
+require 'x86/iflags.ph';
+if_end();
+
+# Compute the combinations of instruction flags actually used in templates
+
+my %insns_flag_hash = ();
+my @insns_flag_values = ();
+my @insns_flag_lists = ();
+
+sub insns_flag_index(@) {
+    return undef if $_0 eq "ignore";
+
+    my @prekey = sort(@_);
+    my $key = join(',', @prekey);
+    my $flag_index = $insns_flag_hash{$key};
+
+    unless (defined($flag_index)) {
+        my @newkey = (0) x $iflag_words;
+
+        foreach my $i (@prekey) {
+	    my $flag = $flag_byname{$i};
+            die "No key for $i (in $key)\n" if not defined($flag);
+	    $newkey$flag->0 >> 5 |= (1 << ($flag->0 & 31));
+        }
+
+	my $str = join(',', map { sprintf("UINT32_C(0x%08x)",$_) } @newkey);
+
+        push @insns_flag_values, $str;
+	push @insns_flag_lists, $key;
+        $insns_flag_hash{$key} = $flag_index = $#insns_flag_values;
+    }
+
+    return $flag_index;
+}
+
+sub write_iflaggen_h() {
+    print STDERR "Writing $oname...\n";
+
+    open(N, '>', $oname) or die "$0: $!\n";
+
+    print N "/* This file is auto-generated. Don't edit. */\n";
+    print N "#ifndef NASM_IFLAGGEN_H\n";
+    print N "#define NASM_IFLAGGEN_H 1\n\n";
+
+    # The flag numbers; the <= in the loop is intentional
+
+    my $next = 0;
+    for ($i = 0; $i <= $n_iflags; $i++) {
+	if ((defined($flag_bynum$i) || $i >= $n_iflags) &&
+	    $next != $i) {
+	    printf N "%-31s /* %-64s */\n", '',
+		($next < $i-1) ?
+		sprintf("%d...%d reserved", $next-1, $i-1) :
+		sprintf("%d reserved", $i-1);
+	}
+
+	if (defined($flag_bynum$i)) {
+	    printf N "#define IF_%-16s %3d /* %-64s */\n",
+		$flag_bynum$i->1, $i, $flag_bynum$i->2;
+	    $next = $i+1;
+	}
+    }
+    print N "\n";
+
+    # The flag masks for individual bits
+
+    $next = 0;
+    for ($i = 0; $i < $n_iflags; $i++) {
+	if (($i & 31) == 0) {
+	    printf N "/* Mask bits for field %d : %d...%d */\n",
+		$i >> 5, $i, $i+31;
+	}
+	if (defined(my $v = $flag_bynum$i)) {
+	    printf N "#define IFM_%-15s UINT32_C(0x%08x)     /* %3d */\n",
+		$v->1, 1 << ($i & 31), $i;
+	    $next = $i+1;
+	}
+    }
+    print N "\n";
+
+    # The names of flag groups
+
+    for ($i = 0; $i <= $#flag_fields; $i++) {
+	printf N "/* IF_%s (%d) ... IF_%s (%d) */\n",
+		    $flag_bynum$flag_fields$i->1->1,
+		    $flag_bynum$flag_fields$i->1->0,
+		    $flag_bynum$flag_fields$i->2->1,
+		    $flag_bynum$flag_fields$i->2->0;
+
+	# Bit definitions
+	printf N "#define %-19s %3d\n",
+	    'IF_'.$flag_fields$i->0.'_FIRST',
+	    $flag_fields$i->1;
+	printf N "#define %-19s %3d\n",
+	    'IF_'.$flag_fields$i->0.'_COUNT',
+	    ($flag_fields$i->2 - $flag_fields$i->1 + 1);
+
+	# Field (uint32) definitions
+	printf N "#define %-19s %3d\n",
+	    'IF_'.$flag_fields$i->0.'_FIELD',
+	    $flag_fields$i->1 >> 5;
+	printf N "#define %-19s %3d\n",
+	    'IF_'.$flag_fields$i->0.'_NFIELDS',
+	    ($flag_fields$i->2 - $flag_fields$i->1 + 31) >> 5;
+	print N "\n";
+    }
+
+    printf N "#define IF_FIELD_COUNT %d\n", $iflag_words;
+    print N "typedef struct {\n";
+    print N "    uint32_t fieldIF_FIELD_COUNT;\n";
+    print N "} iflag_t;\n";
+
+    print N "\n";
+    print N "/* All combinations of instruction flags used in instruction patterns */\n";
+    printf N "extern const iflag_t insns_flags%d;\n\n",
+	$#insns_flag_values + 1;
+
+    print N "#endif /* NASM_IFLAGGEN_H */\n";
+    close N;
+}
+
+sub write_iflag_c() {
+    print STDERR "Writing $oname...\n";
+
+    open(N, '>', $oname) or die "$0: $!\n";
+
+    print N "/* This file is auto-generated. Don't edit. */\n";
+    print N "#include \"iflag.h\"\n\n";
+    print N "/* All combinations of instruction flags used in instruction patterns */\n";
+    printf N "const iflag_t insns_flags%d = {\n",
+        $#insns_flag_values + 1;
+    foreach my $i (0 .. $#insns_flag_values) {
+        printf N "    {{%s}}, /* %3d : %s */\n",
+	    $insns_flag_values$i, $i, $insns_flag_lists$i;
+    }
+    print N "};\n";
+    close N;
+}
+
+1;

_service:tar_scm:nasm-2.16.03.tar.xz/x86/insns.dat Added

@@ -0,0 +1,6589 @@
+;; --------------------------------------------------------------------------
+;;
+;;   Copyright 1996-2024 The NASM Authors - All Rights Reserved
+;;   See the file AUTHORS included with the NASM distribution for
+;;   the specific copyright holders.
+;;
+;;   Redistribution and use in source and binary forms, with or without
+;;   modification, are permitted provided that the following
+;;   conditions are met:
+;;
+;;   * Redistributions of source code must retain the above copyright
+;;     notice, this list of conditions and the following disclaimer.
+;;   * Redistributions in binary form must reproduce the above
+;;     copyright notice, this list of conditions and the following
+;;     disclaimer in the documentation and/or other materials provided
+;;     with the distribution.
+;;
+;;     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+;;     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+;;     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+;;     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;;     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+;;     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;;     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+;;     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+;;     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+;;     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+;;     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+;;     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;;     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+;; --------------------------------------------------------------------------
+
+;
+; insns.dat    table of instructions for the Netwide Assembler
+;
+; Format of file: All four fields must be present on every functional
+; line. Hence `void' for no-operand instructions, and `\0' for such
+; as EQU. If the last three fields are all `ignore', no action is
+; taken except to register the opcode as being present.
+;
+; For a detailed description of the code string (third field), please
+; see insns.pl and the comment at the top of assemble.c. For a detailed
+; description of the flags (fourth field), please see insns-iflags.ph.
+;
+; Comments with a pound sign after the semicolon generate section
+; subheaders in the NASM documentation.
+;
+
+;# Special instructions (pseudo-ops)
+; These MUST be first in this file and must maintain the pattern of
+; Dx by size, RESx by size, and INCBIN in that order.
+DB		ignore				ignore						ignore
+DW		ignore				ignore						ignore
+DD		ignore				ignore						ignore
+DQ		ignore				ignore						ignore
+DT		ignore				ignore						ignore
+DO		ignore				ignore						ignore
+DY		ignore				ignore						ignore
+DZ		ignore				ignore						ignore
+RESB		imm					resb					8086
+RESW		imm					resb					8086
+RESD		imm					resb					8086
+RESQ		imm					resb					8086
+REST		imm					resb					8086
+RESO		imm					resb					8086
+RESY		imm					resb					8086
+RESZ		imm					resb					8086
+INCBIN		ignore				ignore						ignore
+
+;# Conventional instructions
+AAA		void					37					8086,NOLONG
+AAD		void					d5 0a					8086,NOLONG
+AAD		imm				i:	d5 ib,u				8086,SB,NOLONG
+AAM		void					d4 0a					8086,NOLONG
+AAM		imm				i:	d4 ib,u				8086,SB,NOLONG
+AAS		void					3f					8086,NOLONG
+ADC		mem,reg8			mr:	hle 10 /r				8086,SM,LOCK
+ADC		reg8,reg8			mr:	10 /r					8086
+ADC		mem,reg16			mr:	hle o16 11 /r				8086,SM,LOCK
+ADC		reg16,reg16			mr:	o16 11 /r				8086
+ADC		mem,reg32			mr:	hle o32 11 /r				386,SM,LOCK
+ADC		reg32,reg32			mr:	o32 11 /r				386
+ADC		mem,reg64			mr:	hle o64 11 /r				X86_64,LONG,SM,LOCK
+ADC		reg64,reg64			mr:	o64 11 /r				X86_64,LONG
+ADC		reg8,mem			rm:	12 /r					8086,SM
+ADC		reg8,reg8			rm:	12 /r					8086
+ADC		reg16,mem			rm:	o16 13 /r				8086,SM
+ADC		reg16,reg16			rm:	o16 13 /r				8086
+ADC		reg32,mem			rm:	o32 13 /r				386,SM
+ADC		reg32,reg32			rm:	o32 13 /r				386
+ADC		reg64,mem			rm:	o64 13 /r				X86_64,LONG,SM
+ADC		reg64,reg64			rm:	o64 13 /r				X86_64,LONG
+ADC		rm16,imm8			mi:	hle o16 83 /2 ib,s			8086,LOCK
+ADC		rm32,imm8			mi:	hle o32 83 /2 ib,s			386,LOCK
+ADC		rm64,imm8			mi:	hle o64 83 /2 ib,s			X86_64,LONG,LOCK
+ADC		reg_al,imm			-i:	14 ib					8086,SM
+ADC		reg_ax,sbyteword		mi:	o16 83 /2 ib,s				8086,SM,ND
+ADC		reg_ax,imm			-i:	o16 15 iw				8086,SM
+ADC		reg_eax,sbytedword		mi:	o32 83 /2 ib,s				386,SM,ND
+ADC		reg_eax,imm			-i:	o32 15 id				386,SM
+ADC		reg_rax,sbytedword		mi:	o64 83 /2 ib,s				X86_64,LONG,SM,ND
+ADC		reg_rax,imm			-i:	o64 15 id,s				X86_64,LONG,SM
+ADC		rm8,imm				mi:	hle 80 /2 ib				8086,SM,LOCK
+ADC		rm16,sbyteword			mi:	hle o16 83 /2 ib,s			8086,SM,LOCK,ND
+ADC		rm16,imm			mi:	hle o16 81 /2 iw			8086,SM,LOCK
+ADC		rm32,sbytedword			mi:	hle o32 83 /2 ib,s			386,SM,LOCK,ND
+ADC		rm32,imm			mi:	hle o32 81 /2 id			386,SM,LOCK
+ADC		rm64,sbytedword			mi:	hle o64 83 /2 ib,s			X86_64,LONG,SM,LOCK,ND
+ADC		rm64,imm			mi:	hle o64 81 /2 id,s			X86_64,LONG,SM,LOCK
+ADC		mem,imm8			mi:	hle 80 /2 ib				8086,SM,LOCK,ND
+ADC		mem,sbyteword16			mi:	hle o16 83 /2 ib,s			8086,SM,LOCK,ND
+ADC		mem,imm16			mi:	hle o16 81 /2 iw			8086,SM,LOCK
+ADC		mem,sbytedword32		mi:	hle o32 83 /2 ib,s			386,SM,LOCK,ND
+ADC		mem,imm32			mi:	hle o32 81 /2 id			386,SM,LOCK
+ADC		rm8,imm				mi:	hle 82 /2 ib				8086,SM,LOCK,ND,NOLONG
+ADD		mem,reg8			mr:	hle 00 /r				8086,SM,LOCK
+ADD		reg8,reg8			mr:	00 /r					8086
+ADD		mem,reg16			mr:	hle o16 01 /r				8086,SM,LOCK
+ADD		reg16,reg16			mr:	o16 01 /r				8086
+ADD		mem,reg32			mr:	hle o32 01 /r				386,SM,LOCK
+ADD		reg32,reg32			mr:	o32 01 /r				386
+ADD		mem,reg64			mr:	hle o64 01 /r				X86_64,LONG,SM,LOCK
+ADD		reg64,reg64			mr:	o64 01 /r				X86_64,LONG
+ADD		reg8,mem			rm:	02 /r					8086,SM
+ADD		reg8,reg8			rm:	02 /r					8086
+ADD		reg16,mem			rm:	o16 03 /r				8086,SM
+ADD		reg16,reg16			rm:	o16 03 /r				8086
+ADD		reg32,mem			rm:	o32 03 /r				386,SM
+ADD		reg32,reg32			rm:	o32 03 /r				386
+ADD		reg64,mem			rm:	o64 03 /r				X86_64,LONG,SM
+ADD		reg64,reg64			rm:	o64 03 /r				X86_64,LONG
+ADD		rm16,imm8			mi:	hle o16 83 /0 ib,s			8086,LOCK
+ADD		rm32,imm8			mi:	hle o32 83 /0 ib,s			386,LOCK
+ADD		rm64,imm8			mi:	hle o64 83 /0 ib,s			X86_64,LONG,LOCK
+ADD		reg_al,imm			-i:	04 ib					8086,SM
+ADD		reg_ax,sbyteword		mi:	o16 83 /0 ib,s				8086,SM,ND
+ADD		reg_ax,imm			-i:	o16 05 iw				8086,SM
+ADD		reg_eax,sbytedword		mi:	o32 83 /0 ib,s				386,SM,ND
+ADD		reg_eax,imm			-i:	o32 05 id				386,SM
+ADD		reg_rax,sbytedword		mi:	o64 83 /0 ib,s				X86_64,LONG,SM,ND
+ADD		reg_rax,imm			-i:	o64 05 id,s				X86_64,LONG,SM
+ADD		rm8,imm				mi:	hle 80 /0 ib				8086,SM,LOCK
+ADD		rm16,sbyteword			mi:	hle o16 83 /0 ib,s			8086,SM,LOCK,ND
+ADD		rm16,imm			mi:	hle o16 81 /0 iw			8086,SM,LOCK
+ADD		rm32,sbytedword			mi:	hle o32 83 /0 ib,s			386,SM,LOCK,ND
+ADD		rm32,imm			mi:	hle o32 81 /0 id			386,SM,LOCK
+ADD		rm64,sbytedword			mi:	hle o64 83 /0 ib,s			X86_64,LONG,SM,LOCK,ND
+ADD		rm64,imm			mi:	hle o64 81 /0 id,s			X86_64,LONG,SM,LOCK
+ADD		mem,imm8			mi:	hle 80 /0 ib				8086,SM,LOCK
+ADD		mem,sbyteword16			mi:	hle o16 83 /0 ib,s			8086,SM,LOCK,ND
+ADD		mem,imm16			mi:	hle o16 81 /0 iw			8086,SM,LOCK
+ADD		mem,sbytedword32		mi:	hle o32 83 /0 ib,s			386,SM,LOCK,ND
+ADD		mem,imm32			mi:	hle o32 81 /0 id			386,SM,LOCK
+ADD		rm8,imm				mi:	hle 82 /0 ib				8086,SM,LOCK,ND,NOLONG
+AND		mem,reg8			mr:	hle 20 /r				8086,SM,LOCK
+AND		reg8,reg8			mr:	20 /r					8086
+AND		mem,reg16			mr:	hle o16 21 /r				8086,SM,LOCK
+AND		reg16,reg16			mr:	o16 21 /r				8086
+AND		mem,reg32			mr:	hle o32 21 /r				386,SM,LOCK
+AND		reg32,reg32			mr:	o32 21 /r				386
+AND		mem,reg64			mr:	hle o64 21 /r				X86_64,LONG,SM,LOCK
+AND		reg64,reg64			mr:	o64 21 /r				X86_64,LONG
+AND		reg8,mem			rm:	22 /r					8086,SM
+AND		reg8,reg8			rm:	22 /r					8086
+AND		reg16,mem			rm:	o16 23 /r				8086,SM
+AND		reg16,reg16			rm:	o16 23 /r				8086
+AND		reg32,mem			rm:	o32 23 /r				386,SM
+AND		reg32,reg32			rm:	o32 23 /r				386
+AND		reg64,mem			rm:	o64 23 /r				X86_64,LONG,SM
+AND		reg64,reg64			rm:	o64 23 /r				X86_64,LONG
+AND		rm16,imm8			mi:	hle o16 83 /4 ib,s			8086,LOCK
+AND		rm32,imm8			mi:	hle o32 83 /4 ib,s			386,LOCK
+AND		rm64,imm8			mi:	hle o64 83 /4 ib,s			X86_64,LONG,LOCK
+AND		reg_al,imm			-i:	24 ib					8086,SM
+AND		reg_ax,sbyteword		mi:	o16 83 /4 ib,s				8086,SM,ND
+AND		reg_ax,imm			-i:	o16 25 iw				8086,SM
+AND		reg_eax,sbytedword		mi:	o32 83 /4 ib,s				386,SM,ND
+AND		reg_eax,imm			-i:	o32 25 id				386,SM
+AND		reg_rax,sbytedword		mi:	o64 83 /4 ib,s				X86_64,LONG,SM,ND
+AND		reg_rax,imm			-i:	o64 25 id,s				X86_64,LONG,SM
+AND		rm8,imm				mi:	hle 80 /4 ib				8086,SM,LOCK
+AND		rm16,sbyteword			mi:	hle o16 83 /4 ib,s			8086,SM,LOCK,ND
+AND		rm16,imm			mi:	hle o16 81 /4 iw			8086,SM,LOCK
+AND		rm32,sbytedword			mi:	hle o32 83 /4 ib,s			386,SM,LOCK,ND
+AND		rm32,imm			mi:	hle o32 81 /4 id			386,SM,LOCK
+AND		rm64,sbytedword			mi:	hle o64 83 /4 ib,s			X86_64,LONG,SM,LOCK,ND
+AND		rm64,imm			mi:	hle o64 81 /4 id,s			X86_64,LONG,SM,LOCK
+AND		mem,imm8			mi:	hle 80 /4 ib				8086,SM,LOCK
+AND		mem,sbyteword16			mi:	hle o16 83 /4 ib,s			8086,SM,LOCK,ND
+AND		mem,imm16			mi:	hle o16 81 /4 iw			8086,SM,LOCK
+AND		mem,sbytedword32		mi:	hle o32 83 /4 ib,s			386,SM,LOCK,ND
+AND		mem,imm32			mi:	hle o32 81 /4 id			386,SM,LOCK
+AND		rm8,imm				mi:	hle 82 /4 ib				8086,SM,LOCK,ND,NOLONG
+ARPL		mem,reg16			mr:	63 /r					286,PROT,SM,NOLONG
+ARPL		reg16,reg16			mr:	63 /r					286,PROT,NOLONG
+BB0_RESET	void					0f 3a					PENT,CYRIX,ND,OBSOLETE
+BB1_RESET	void					0f 3b					PENT,CYRIX,ND,OBSOLETE
+BOUND		reg16,mem			rm:	o16 62 /r				186,NOLONG
+BOUND		reg32,mem			rm:	o32 62 /r				386,NOLONG
+BSF		reg16,mem			rm:	o16 nof3 0f bc /r			386,SM
+BSF		reg16,reg16			rm:	o16 nof3 0f bc /r			386
+BSF		reg32,mem			rm:	o32 nof3 0f bc /r			386,SM
+BSF		reg32,reg32			rm:	o32 nof3 0f bc /r			386
+BSF		reg64,mem			rm:	o64 nof3 0f bc /r			X86_64,LONG,SM
+BSF		reg64,reg64			rm:	o64 nof3 0f bc /r			X86_64,LONG
+BSR		reg16,mem			rm:	o16 nof3 0f bd /r			386,SM
+BSR		reg16,reg16			rm:	o16 nof3 0f bd /r			386
+BSR		reg32,mem			rm:	o32 nof3 0f bd /r			386,SM
+BSR		reg32,reg32			rm:	o32 nof3 0f bd /r			386
+BSR		reg64,mem			rm:	o64 nof3 0f bd /r			X86_64,LONG,SM
+BSR		reg64,reg64			rm:	o64 nof3 0f bd /r			X86_64,LONG
+BSWAP		reg32				r:	o32 0f c8+r				486
+BSWAP		reg64				r:	o64 0f c8+r				X86_64,LONG
+BT		mem,reg16			mr:	o16 0f a3 /r				386,SM
+BT		reg16,reg16			mr:	o16 0f a3 /r				386
+BT		mem,reg32			mr:	o32 0f a3 /r				386,SM
+BT		reg32,reg32			mr:	o32 0f a3 /r				386
+BT		mem,reg64			mr:	o64 0f a3 /r				X86_64,LONG,SM
+BT		reg64,reg64			mr:	o64 0f a3 /r				X86_64,LONG
+BT		rm16,imm8			mi:	o16 0f ba /4 ib,u			386
+BT		rm32,imm8			mi:	o32 0f ba /4 ib,u			386
+BT		rm64,imm8			mi:	o64 0f ba /4 ib,u			X86_64,LONG
+BTC		mem,reg16			mr:	hle o16 0f bb /r			386,SM,LOCK
+BTC		reg16,reg16			mr:	o16 0f bb /r				386
+BTC		mem,reg32			mr:	hle o32 0f bb /r			386,SM,LOCK
+BTC		reg32,reg32			mr:	o32 0f bb /r				386
+BTC		mem,reg64			mr:	hle o64 0f bb /r			X86_64,LONG,SM,LOCK
+BTC		reg64,reg64			mr:	o64 0f bb /r				X86_64,LONG
+BTC		rm16,imm8			mi:	hle o16 0f ba /7 ib,u			386,LOCK
+BTC		rm32,imm8			mi:	hle o32 0f ba /7 ib,u			386,LOCK
+BTC		rm64,imm8			mi:	hle o64 0f ba /7 ib,u			X86_64,LONG,LOCK
+BTR		mem,reg16			mr:	hle o16 0f b3 /r			386,SM,LOCK
+BTR		reg16,reg16			mr:	o16 0f b3 /r				386
+BTR		mem,reg32			mr:	hle o32 0f b3 /r			386,SM,LOCK
+BTR		reg32,reg32			mr:	o32 0f b3 /r				386
+BTR		mem,reg64			mr:	hle o64 0f b3 /r			X86_64,LONG,SM,LOCK
+BTR		reg64,reg64			mr:	o64 0f b3 /r				X86_64,LONG
+BTR		rm16,imm8			mi:	hle o16 0f ba /6 ib,u			386,LOCK
+BTR		rm32,imm8			mi:	hle o32 0f ba /6 ib,u			386,LOCK
+BTR		rm64,imm8			mi:	hle o64 0f ba /6 ib,u			X86_64,LONG,LOCK
+BTS		mem,reg16			mr:	hle o16 0f ab /r			386,SM,LOCK
+BTS		reg16,reg16			mr:	o16 0f ab /r				386
+BTS		mem,reg32			mr:	hle o32 0f ab /r			386,SM,LOCK
+BTS		reg32,reg32			mr:	o32 0f ab /r				386
+BTS		mem,reg64			mr:	hle o64 0f ab /r			X86_64,LONG,SM,LOCK
+BTS		reg64,reg64			mr:	o64 0f ab /r				X86_64,LONG
+BTS		rm16,imm8			mi:	hle o16 0f ba /5 ib,u			386,LOCK
+BTS		rm32,imm8			mi:	hle o32 0f ba /5 ib,u			386,LOCK
+BTS		rm64,imm8			mi:	hle o64 0f ba /5 ib,u			X86_64,LONG,LOCK
+CALL		imm				i:	odf e8 rel				8086,BND
+CALL		imm|near			i:	odf e8 rel				8086,ND,BND
+CALL		imm|far				i:	odf 9a iwd seg				8086,ND,NOLONG
+; Call/jmp near imm/reg/mem is always 64-bit in long mode.
+CALL		imm16				i:	o16 e8 rel				8086,NOLONG,BND
+CALL		imm16|near			i:	o16 e8 rel				8086,ND,NOLONG,BND
+CALL		imm16|far			i:	o16 9a iwd seg				8086,ND,NOLONG
+CALL		imm32				i:	o32 e8 rel				386,NOLONG,BND
+CALL		imm32|near			i:	o32 e8 rel				386,ND,NOLONG,BND
+CALL		imm32|far			i:	o32 9a iwd seg				386,ND,NOLONG
+CALL		imm64				i:	o64nw e8 rel				X86_64,LONG,BND
+CALL		imm64|near			i:	o64nw e8 rel				X86_64,LONG,ND,BND
+CALL		imm:imm				ji:	odf 9a iwd iw				8086,NOLONG
+CALL		imm16:imm			ji:	o16 9a iw iw				8086,NOLONG
+CALL		imm:imm16			ji:	o16 9a iw iw				8086,NOLONG
+CALL		imm32:imm			ji:	o32 9a id iw				386,NOLONG
+CALL		imm:imm32			ji:	o32 9a id iw				386,NOLONG
+CALL		mem|far				m:	odf ff /3				8086,NOLONG
+CALL		mem|far				m:	o64 ff /3				X86_64,LONG
+CALL		mem16|far			m:	o16 ff /3				8086
+CALL		mem32|far			m:	o32 ff /3				386
+CALL		mem64|far			m:	o64 ff /3				X86_64,LONG
+CALL		mem|near			m:	odf ff /2				8086,ND,BND
+CALL		rm16|near			m:	o16 ff /2				8086,NOLONG,ND,BND
+CALL		rm32|near			m:	o32 ff /2				386,NOLONG,ND,BND
+CALL		rm64|near			m:	o64nw ff /2				X86_64,LONG,ND,BND
+CALL		mem				m:	odf ff /2				8086,BND
+CALL		rm16				m:	o16 ff /2				8086,NOLONG,BND
+CALL		rm32				m:	o32 ff /2				386,NOLONG,BND
+CALL		rm64				m:	o64nw ff /2				X86_64,LONG,BND
+
+CBW		void					o16 98					8086
+CDQ		void					o32 99					386
+CDQE		void					o64 98					X86_64,LONG
+CLC		void					f8					8086
+CLD		void					fc					8086
+CLI		void					fa					8086
+CLTS		void					0f 06					286,PRIV
+CMC		void					f5					8086
+CMP		mem,reg8			mr:	38 /r					8086,SM
+CMP		reg8,reg8			mr:	38 /r					8086
+CMP		mem,reg16			mr:	o16 39 /r				8086,SM
+CMP		reg16,reg16			mr:	o16 39 /r				8086
+CMP		mem,reg32			mr:	o32 39 /r				386,SM
+CMP		reg32,reg32			mr:	o32 39 /r				386
+CMP		mem,reg64			mr:	o64 39 /r				X86_64,LONG,SM
+CMP		reg64,reg64			mr:	o64 39 /r				X86_64,LONG
+CMP		reg8,mem			rm:	3a /r					8086,SM
+CMP		reg8,reg8			rm:	3a /r					8086
+CMP		reg16,mem			rm:	o16 3b /r				8086,SM
+CMP		reg16,reg16			rm:	o16 3b /r				8086
+CMP		reg32,mem			rm:	o32 3b /r				386,SM
+CMP		reg32,reg32			rm:	o32 3b /r				386
+CMP		reg64,mem			rm:	o64 3b /r				X86_64,LONG,SM
+CMP		reg64,reg64			rm:	o64 3b /r				X86_64,LONG
+CMP		rm16,imm8			mi:	o16 83 /7 ib,s				8086
+CMP		rm32,imm8			mi:	o32 83 /7 ib,s				386
+CMP		rm64,imm8			mi:	o64 83 /7 ib,s				X86_64,LONG
+CMP		reg_al,imm			-i:	3c ib					8086,SM
+CMP		reg_ax,sbyteword		mi:	o16 83 /7 ib,s				8086,SM,ND
+CMP		reg_ax,imm			-i:	o16 3d iw				8086,SM
+CMP		reg_eax,sbytedword		mi:	o32 83 /7 ib,s				386,SM,ND
+CMP		reg_eax,imm			-i:	o32 3d id				386,SM
+CMP		reg_rax,sbytedword		mi:	o64 83 /7 ib,s				X86_64,LONG,SM,ND
+CMP		reg_rax,imm			-i:	o64 3d id,s				X86_64,LONG,SM
+CMP		rm8,imm				mi:	80 /7 ib				8086,SM
+CMP		rm16,sbyteword			mi:	o16 83 /7 ib,s				8086,SM,ND
+CMP		rm16,imm			mi:	o16 81 /7 iw				8086,SM
+CMP		rm32,sbytedword			mi:	o32 83 /7 ib,s				386,SM,ND
+CMP		rm32,imm			mi:	o32 81 /7 id				386,SM
+CMP		rm64,sbytedword			mi:	o64 83 /7 ib,s				X86_64,LONG,SM,ND
+CMP		rm64,imm			mi:	o64 81 /7 id,s				X86_64,LONG,SM
+CMP		mem,imm8			mi:	80 /7 ib				8086,SM
+CMP		mem,sbyteword16			mi:	o16 83 /7 ib,s				8086,SM,ND
+CMP		mem,imm16			mi:	o16 81 /7 iw				8086,SM
+CMP		mem,sbytedword32		mi:	o32 83 /7 ib,s				386,SM,ND
+CMP		mem,imm32			mi:	o32 81 /7 id				386,SM
+CMP		rm8,imm				mi:	82 /7 ib				8086,SM,ND,NOLONG
+CMPSB		void					repe a6				8086
+CMPSD		void					repe o32 a7				386
+CMPSQ		void					repe o64 a7				X86_64,LONG
+CMPSW		void					repe o16 a7				8086
+CMPXCHG		mem,reg8			mr:	hle 0f b0 /r				PENT,SM,LOCK
+CMPXCHG		reg8,reg8			mr:	0f b0 /r				PENT
+CMPXCHG		mem,reg16			mr:	hle o16 0f b1 /r			PENT,SM,LOCK
+CMPXCHG		reg16,reg16			mr:	o16 0f b1 /r				PENT
+CMPXCHG		mem,reg32			mr:	hle o32 0f b1 /r			PENT,SM,LOCK
+CMPXCHG		reg32,reg32			mr:	o32 0f b1 /r				PENT
+CMPXCHG		mem,reg64			mr:	hle o64 0f b1 /r			X86_64,LONG,SM,LOCK
+CMPXCHG		reg64,reg64			mr:	o64 0f b1 /r				X86_64,LONG
+CMPXCHG486	mem,reg8			mr:	0f a6 /r				486,SM,UNDOC,ND,LOCK,OBSOLETE
+CMPXCHG486	reg8,reg8			mr:	0f a6 /r				486,UNDOC,ND,OBSOLETE
+CMPXCHG486	mem,reg16			mr:	o16 0f a7 /r				486,SM,UNDOC,ND,LOCK,OBSOLETE
+CMPXCHG486	reg16,reg16			mr:	o16 0f a7 /r				486,UNDOC,ND,OBSOLETE
+CMPXCHG486	mem,reg32			mr:	o32 0f a7 /r				486,SM,UNDOC,ND,LOCK,OBSOLETE
+CMPXCHG486	reg32,reg32			mr:	o32 0f a7 /r				486,UNDOC,ND,OBSOLETE
+CMPXCHG8B	mem64				m:	hle norexw 0f c7 /1			PENT,LOCK
+CMPXCHG16B	mem128				m:	o64 0f c7 /1				X86_64,LONG,LOCK
+CPUID		void					0f a2					PENT
+CPU_READ	void					0f 3d					PENT,CYRIX
+CPU_WRITE	void					0f 3c					PENT,CYRIX
+CQO		void					o64 99					X86_64,LONG
+CWD		void					o16 99					8086
+CWDE		void					o32 98					386
+DAA		void					27					8086,NOLONG
+DAS		void					2f					8086,NOLONG
+DEC		reg16				r:	o16 48+r				8086,NOLONG
+DEC		reg32				r:	o32 48+r				386,NOLONG
+DEC		rm8				m:	hle fe /1				8086,LOCK
+DEC		rm16				m:	hle o16 ff /1				8086,LOCK
+DEC		rm32				m:	hle o32 ff /1				386,LOCK
+DEC		rm64				m:	hle o64 ff /1				X86_64,LONG,LOCK
+DIV		rm8				m:	f6 /6					8086
+DIV		rm16				m:	o16 f7 /6				8086
+DIV		rm32				m:	o32 f7 /6				386
+DIV		rm64				m:	o64 f7 /6				X86_64,LONG
+DMINT		void					0f 39					P6,CYRIX
+EMMS		void					0f 77					PENT,MMX
+ENTER		imm,imm				ij:	c8 iw ib,u				186
+EQU		imm				ignore						8086
+EQU		imm:imm				ignore						8086
+F2XM1		void					d9 f0					8086,FPU
+FABS		void					d9 e1					8086,FPU
+FADD		mem32				m:	d8 /0					8086,FPU
+FADD		mem64				m:	dc /0					8086,FPU
+FADD		fpureg|to			r:	dc c0+r				8086,FPU
+FADD		fpureg				r:	d8 c0+r				8086,FPU
+FADD		fpureg,fpu0			r-:	dc c0+r				8086,FPU
+FADD		fpu0,fpureg			-r:	d8 c0+r				8086,FPU
+FADD		void					de c1					8086,FPU,ND
+FADDP		fpureg				r:	de c0+r				8086,FPU
+FADDP		fpureg,fpu0			r-:	de c0+r				8086,FPU
+FADDP		void					de c1					8086,FPU,ND
+FBLD		mem80				m:	df /4					8086,FPU
+FBLD		mem				m:	df /4					8086,FPU
+FBSTP		mem80				m:	df /6					8086,FPU
+FBSTP		mem				m:	df /6					8086,FPU
+FCHS		void					d9 e0					8086,FPU
+FCLEX		void					wait db e2				8086,FPU
+FCMOVB		fpureg				r:	da c0+r				P6,FPU
+FCMOVB		fpu0,fpureg			-r:	da c0+r				P6,FPU
+FCMOVB		void					da c1					P6,FPU,ND
+FCMOVBE		fpureg				r:	da d0+r				P6,FPU
+FCMOVBE		fpu0,fpureg			-r:	da d0+r				P6,FPU
+FCMOVBE		void					da d1					P6,FPU,ND
+FCMOVE		fpureg				r:	da c8+r				P6,FPU
+FCMOVE		fpu0,fpureg			-r:	da c8+r				P6,FPU
+FCMOVE		void					da c9					P6,FPU,ND
+FCMOVNB		fpureg				r:	db c0+r				P6,FPU
+FCMOVNB		fpu0,fpureg			-r:	db c0+r				P6,FPU
+FCMOVNB		void					db c1					P6,FPU,ND
+FCMOVNBE	fpureg				r:	db d0+r				P6,FPU
+FCMOVNBE	fpu0,fpureg			-r:	db d0+r				P6,FPU
+FCMOVNBE	void					db d1					P6,FPU,ND
+FCMOVNE		fpureg				r:	db c8+r				P6,FPU
+FCMOVNE		fpu0,fpureg			-r:	db c8+r				P6,FPU
+FCMOVNE		void					db c9					P6,FPU,ND
+FCMOVNU		fpureg				r:	db d8+r				P6,FPU
+FCMOVNU		fpu0,fpureg			-r:	db d8+r				P6,FPU
+FCMOVNU		void					db d9					P6,FPU,ND
+FCMOVU		fpureg				r:	da d8+r				P6,FPU
+FCMOVU		fpu0,fpureg			-r:	da d8+r				P6,FPU
+FCMOVU		void					da d9					P6,FPU,ND
+FCOM		mem32				m:	d8 /2					8086,FPU
+FCOM		mem64				m:	dc /2					8086,FPU
+FCOM		fpureg				r:	d8 d0+r				8086,FPU
+FCOM		fpu0,fpureg			-r:	d8 d0+r				8086,FPU
+FCOM		void					d8 d1					8086,FPU,ND
+FCOMI		fpureg				r:	db f0+r				P6,FPU
+FCOMI		fpu0,fpureg			-r:	db f0+r				P6,FPU
+FCOMI		void					db f1					P6,FPU,ND
+FCOMIP		fpureg				r:	df f0+r				P6,FPU
+FCOMIP		fpu0,fpureg			-r:	df f0+r				P6,FPU
+FCOMIP		void					df f1					P6,FPU,ND
+FCOMP		mem32				m:	d8 /3					8086,FPU
+FCOMP		mem64				m:	dc /3					8086,FPU
+FCOMP		fpureg				r:	d8 d8+r				8086,FPU
+FCOMP		fpu0,fpureg			-r:	d8 d8+r				8086,FPU
+FCOMP		void					d8 d9					8086,FPU,ND
+FCOMPP		void					de d9					8086,FPU
+FCOS		void					d9 ff					386,FPU
+FDECSTP		void					d9 f6					8086,FPU
+FDISI		void					wait db e1				8086,FPU
+FDIV		mem32				m:	d8 /6					8086,FPU
+FDIV		mem64				m:	dc /6					8086,FPU
+FDIV		fpureg|to			r:	dc f8+r				8086,FPU
+FDIV		fpureg				r:	d8 f0+r				8086,FPU
+FDIV		fpureg,fpu0			r-:	dc f8+r				8086,FPU
+FDIV		fpu0,fpureg			-r:	d8 f0+r				8086,FPU
+FDIV		void					de f9					8086,FPU,ND
+FDIVP		fpureg				r:	de f8+r				8086,FPU
+FDIVP		fpureg,fpu0			r-:	de f8+r				8086,FPU
+FDIVP		void					de f9					8086,FPU,ND
+FDIVR		mem32				m:	d8 /7					8086,FPU
+FDIVR		mem64				m:	dc /7					8086,FPU
+FDIVR		fpureg|to			r:	dc f0+r				8086,FPU
+FDIVR		fpureg,fpu0			r-:	dc f0+r				8086,FPU
+FDIVR		fpureg				r:	d8 f8+r				8086,FPU
+FDIVR		fpu0,fpureg			-r:	d8 f8+r				8086,FPU
+FDIVR		void					de f1					8086,FPU,ND
+FDIVRP		fpureg				r:	de f0+r				8086,FPU
+FDIVRP		fpureg,fpu0			r-:	de f0+r				8086,FPU
+FDIVRP		void					de f1					8086,FPU,ND
+FEMMS		void					0f 0e					PENT,3DNOW
+FENI		void					wait db e0				8086,FPU
+FFREE		fpureg				r:	dd c0+r				8086,FPU
+FFREE		void					dd c1					8086,FPU
+FFREEP		fpureg				r:	df c0+r				286,FPU,UNDOC
+FFREEP		void					df c1					286,FPU,UNDOC
+FIADD		mem32				m:	da /0					8086,FPU
+FIADD		mem16				m:	de /0					8086,FPU
+FICOM		mem32				m:	da /2					8086,FPU
+FICOM		mem16				m:	de /2					8086,FPU
+FICOMP		mem32				m:	da /3					8086,FPU
+FICOMP		mem16				m:	de /3					8086,FPU
+FIDIV		mem32				m:	da /6					8086,FPU
+FIDIV		mem16				m:	de /6					8086,FPU
+FIDIVR		mem32				m:	da /7					8086,FPU
+FIDIVR		mem16				m:	de /7					8086,FPU
+FILD		mem32				m:	db /0					8086,FPU
+FILD		mem16				m:	df /0					8086,FPU
+FILD		mem64				m:	df /5					8086,FPU
+FIMUL		mem32				m:	da /1					8086,FPU
+FIMUL		mem16				m:	de /1					8086,FPU
+FINCSTP		void					d9 f7					8086,FPU
+FINIT		void					wait db e3				8086,FPU
+FIST		mem32				m:	db /2					8086,FPU
+FIST		mem16				m:	df /2					8086,FPU
+FISTP		mem32				m:	db /3					8086,FPU
+FISTP		mem16				m:	df /3					8086,FPU
+FISTP		mem64				m:	df /7					8086,FPU
+FISTTP		mem16				m:	df /1					PRESCOTT,FPU
+FISTTP		mem32				m:	db /1					PRESCOTT,FPU
+FISTTP		mem64				m:	dd /1					PRESCOTT,FPU
+FISUB		mem32				m:	da /4					8086,FPU
+FISUB		mem16				m:	de /4					8086,FPU
+FISUBR		mem32				m:	da /5					8086,FPU
+FISUBR		mem16				m:	de /5					8086,FPU
+FLD		mem32				m:	d9 /0					8086,FPU
+FLD		mem64				m:	dd /0					8086,FPU
+FLD		mem80				m:	db /5					8086,FPU
+FLD		fpureg				r:	d9 c0+r				8086,FPU
+FLD		void					d9 c1					8086,FPU,ND
+FLD1		void					d9 e8					8086,FPU
+FLDCW		mem				m:	d9 /5					8086,FPU,SW
+FLDENV		mem				m:	d9 /4					8086,FPU
+FLDL2E		void					d9 ea					8086,FPU
+FLDL2T		void					d9 e9					8086,FPU
+FLDLG2		void					d9 ec					8086,FPU
+FLDLN2		void					d9 ed					8086,FPU
+FLDPI		void					d9 eb					8086,FPU
+FLDZ		void					d9 ee					8086,FPU
+FMUL		mem32				m:	d8 /1					8086,FPU
+FMUL		mem64				m:	dc /1					8086,FPU
+FMUL		fpureg|to			r:	dc c8+r				8086,FPU
+FMUL		fpureg,fpu0			r-:	dc c8+r				8086,FPU
+FMUL		fpureg				r:	d8 c8+r				8086,FPU
+FMUL		fpu0,fpureg			-r:	d8 c8+r				8086,FPU
+FMUL		void					de c9					8086,FPU,ND
+FMULP		fpureg				r:	de c8+r				8086,FPU
+FMULP		fpureg,fpu0			r-:	de c8+r				8086,FPU
+FMULP		void					de c9					8086,FPU,ND
+FNCLEX		void					db e2					8086,FPU
+FNDISI		void					db e1					8086,FPU
+FNENI		void					db e0					8086,FPU
+FNINIT		void					db e3					8086,FPU
+FNOP		void					d9 d0					8086,FPU
+FNSAVE		mem				m:	dd /6					8086,FPU
+FNSTCW		mem				m:	d9 /7					8086,FPU,SW
+FNSTENV		mem				m:	d9 /6					8086,FPU
+FNSTSW		mem				m:	dd /7					8086,FPU,SW
+FNSTSW		reg_ax				-:	df e0					286,FPU
+FPATAN		void					d9 f3					8086,FPU
+FPREM		void					d9 f8					8086,FPU
+FPREM1		void					d9 f5					386,FPU
+FPTAN		void					d9 f2					8086,FPU
+FRNDINT		void					d9 fc					8086,FPU
+FRSTOR		mem				m:	dd /4					8086,FPU
+FSAVE		mem				m:	wait dd /6				8086,FPU
+FSCALE		void					d9 fd					8086,FPU
+FSETPM		void					db e4					286,FPU
+FSIN		void					d9 fe					386,FPU
+FSINCOS		void					d9 fb					386,FPU
+FSQRT		void					d9 fa					8086,FPU
+FST		mem32				m:	d9 /2					8086,FPU
+FST		mem64				m:	dd /2					8086,FPU
+FST		fpureg				r:	dd d0+r				8086,FPU
+FST		void					dd d1					8086,FPU,ND
+FSTCW		mem				m:	wait d9 /7				8086,FPU,SW
+FSTENV		mem				m:	wait d9 /6				8086,FPU
+FSTP		mem32				m:	d9 /3					8086,FPU
+FSTP		mem64				m:	dd /3					8086,FPU
+FSTP		mem80				m:	db /7					8086,FPU
+FSTP		fpureg				r:	dd d8+r				8086,FPU
+FSTP		void					dd d9					8086,FPU,ND
+FSTSW		mem				m:	wait dd /7				8086,FPU,SW
+FSTSW		reg_ax				-:	wait df e0				286,FPU
+FSUB		mem32				m:	d8 /4					8086,FPU
+FSUB		mem64				m:	dc /4					8086,FPU
+FSUB		fpureg|to			r:	dc e8+r				8086,FPU
+FSUB		fpureg,fpu0			r-:	dc e8+r				8086,FPU
+FSUB		fpureg				r:	d8 e0+r				8086,FPU
+FSUB		fpu0,fpureg			-r:	d8 e0+r				8086,FPU
+FSUB		void					de e9					8086,FPU,ND
+FSUBP		fpureg				r:	de e8+r				8086,FPU
+FSUBP		fpureg,fpu0			r-:	de e8+r				8086,FPU
+FSUBP		void					de e9					8086,FPU,ND
+FSUBR		mem32				m:	d8 /5					8086,FPU
+FSUBR		mem64				m:	dc /5					8086,FPU
+FSUBR		fpureg|to			r:	dc e0+r				8086,FPU
+FSUBR		fpureg,fpu0			r-:	dc e0+r				8086,FPU
+FSUBR		fpureg				r:	d8 e8+r				8086,FPU
+FSUBR		fpu0,fpureg			-r:	d8 e8+r				8086,FPU
+FSUBR		void					de e1					8086,FPU,ND
+FSUBRP		fpureg				r:	de e0+r				8086,FPU
+FSUBRP		fpureg,fpu0			r-:	de e0+r				8086,FPU
+FSUBRP		void					de e1					8086,FPU,ND
+FTST		void					d9 e4					8086,FPU
+FUCOM		fpureg				r:	dd e0+r				386,FPU
+FUCOM		fpu0,fpureg			-r:	dd e0+r				386,FPU
+FUCOM		void					dd e1					386,FPU,ND
+FUCOMI		fpureg				r:	db e8+r				P6,FPU
+FUCOMI		fpu0,fpureg			-r:	db e8+r				P6,FPU
+FUCOMI		void					db e9					P6,FPU,ND
+FUCOMIP		fpureg				r:	df e8+r				P6,FPU
+FUCOMIP		fpu0,fpureg			-r:	df e8+r				P6,FPU
+FUCOMIP		void					df e9					P6,FPU,ND
+FUCOMP		fpureg				r:	dd e8+r				386,FPU
+FUCOMP		fpu0,fpureg			-r:	dd e8+r				386,FPU
+FUCOMP		void					dd e9					386,FPU,ND
+FUCOMPP		void					da e9					386,FPU
+FXAM		void					d9 e5					8086,FPU
+FXCH		fpureg				r:	d9 c8+r				8086,FPU
+FXCH		fpureg,fpu0			r-:	d9 c8+r				8086,FPU
+FXCH		fpu0,fpureg			-r:	d9 c8+r				8086,FPU
+FXCH		void					d9 c9					8086,FPU,ND
+FXTRACT		void					d9 f4					8086,FPU
+FYL2X		void					d9 f1					8086,FPU
+FYL2XP1		void					d9 f9					8086,FPU
+HLT		void					f4					8086,PRIV
+IBTS		mem,reg16			mr:	o16 0f a7 /r				386,SW,UNDOC,ND,OBSOLETE
+IBTS		reg16,reg16			mr:	o16 0f a7 /r				386,UNDOC,ND,OBSOLETE
+IBTS		mem,reg32			mr:	o32 0f a7 /r				386,SD,UNDOC,ND,OBSOLETE
+IBTS		reg32,reg32			mr:	o32 0f a7 /r				386,UNDOC,ND,OBSOLETE
+ICEBP		void					f1					386,ND
+IDIV		rm8				m:	f6 /7					8086
+IDIV		rm16				m:	o16 f7 /7				8086
+IDIV		rm32				m:	o32 f7 /7				386
+IDIV		rm64				m:	o64 f7 /7				X86_64,LONG
+IMUL		rm8				m:	f6 /5					8086
+IMUL		rm16				m:	o16 f7 /5				8086
+IMUL		rm32				m:	o32 f7 /5				386
+IMUL		rm64				m:	o64 f7 /5				X86_64,LONG
+IMUL		reg16,mem			rm:	o16 0f af /r				386,SM
+IMUL		reg16,reg16			rm:	o16 0f af /r				386
+IMUL		reg32,mem			rm:	o32 0f af /r				386,SM
+IMUL		reg32,reg32			rm:	o32 0f af /r				386
+IMUL		reg64,mem			rm:	o64 0f af /r				X86_64,LONG,SM
+IMUL		reg64,reg64			rm:	o64 0f af /r				X86_64,LONG
+IMUL		reg16,mem,imm8			rmi:	o16 6b /r ib,s				186,SM2
+IMUL		reg16,mem,sbyteword		rmi:	o16 6b /r ib,s				186,SM,ND
+IMUL		reg16,mem,imm16			rmi:	o16 69 /r iw				186,SM
+IMUL		reg16,mem,imm			rmi:	o16 69 /r iw				186,SM,ND
+IMUL		reg16,reg16,imm8		rmi:	o16 6b /r ib,s				186
+IMUL		reg16,reg16,sbyteword		rmi:	o16 6b /r ib,s				186,SM,ND
+IMUL		reg16,reg16,imm16		rmi:	o16 69 /r iw				186
+IMUL		reg16,reg16,imm			rmi:	o16 69 /r iw				186,SM,ND
+IMUL		reg32,mem,imm8			rmi:	o32 6b /r ib,s				386,SM2
+IMUL		reg32,mem,sbytedword		rmi:	o32 6b /r ib,s				386,SM,ND
+IMUL		reg32,mem,imm32			rmi:	o32 69 /r id				386,SM
+IMUL		reg32,mem,imm			rmi:	o32 69 /r id				386,SM,ND
+IMUL		reg32,reg32,imm8		rmi:	o32 6b /r ib,s				386
+IMUL		reg32,reg32,sbytedword		rmi:	o32 6b /r ib,s				386,SM,ND
+IMUL		reg32,reg32,imm32		rmi:	o32 69 /r id				386
+IMUL		reg32,reg32,imm			rmi:	o32 69 /r id				386,SM,ND
+IMUL		reg64,mem,imm8			rmi:	o64 6b /r ib,s				X86_64,LONG,SM2
+IMUL		reg64,mem,sbytedword		rmi:	o64 6b /r ib,s				X86_64,LONG,SM,ND
+IMUL		reg64,mem,imm32			rmi:	o64 69 /r id				X86_64,LONG,SM2
+IMUL		reg64,mem,imm			rmi:	o64 69 /r id,s				X86_64,LONG,SM,ND
+IMUL		reg64,reg64,imm8		rmi:	o64 6b /r ib,s				X86_64,LONG
+IMUL		reg64,reg64,sbytedword		rmi:	o64 6b /r ib,s				X86_64,LONG,SM,ND
+IMUL		reg64,reg64,imm32		rmi:	o64 69 /r id				X86_64,LONG
+IMUL		reg64,reg64,imm			rmi:	o64 69 /r id,s				X86_64,LONG,SM,ND
+IMUL		reg16,imm8			r+mi:	o16 6b /r ib,s				186
+IMUL		reg16,sbyteword			r+mi:	o16 6b /r ib,s				186,SM,ND
+IMUL		reg16,imm16			r+mi:	o16 69 /r iw				186
+IMUL		reg16,imm			r+mi:	o16 69 /r iw				186,SM,ND
+IMUL		reg32,imm8			r+mi:	o32 6b /r ib,s				386
+IMUL		reg32,sbytedword		r+mi:	o32 6b /r ib,s				386,SM,ND
+IMUL		reg32,imm32			r+mi:	o32 69 /r id				386
+IMUL		reg32,imm			r+mi:	o32 69 /r id				386,SM,ND
+IMUL		reg64,imm8			r+mi:	o64 6b /r ib,s				X86_64,LONG
+IMUL		reg64,sbytedword		r+mi:	o64 6b /r ib,s				X86_64,LONG,SM,ND
+IMUL		reg64,imm32			r+mi:	o64 69 /r id,s				X86_64,LONG
+IMUL		reg64,imm			r+mi:	o64 69 /r id,s				X86_64,LONG,SM,ND
+IN		reg_al,imm			-i:	e4 ib,u				8086,SB
+IN		reg_ax,imm			-i:	o16 e5 ib,u				8086,SB
+IN		reg_eax,imm			-i:	o32 e5 ib,u				386,SB
+IN		reg_al,reg_dx			--:	ec					8086
+IN		reg_ax,reg_dx			--:	o16 ed					8086
+IN		reg_eax,reg_dx			--:	o32 ed					386
+INC		reg16				r:	o16 40+r				8086,NOLONG
+INC		reg32				r:	o32 40+r				386,NOLONG
+INC		rm8				m:	hle fe /0				8086,LOCK
+INC		rm16				m:	hle o16 ff /0				8086,LOCK
+INC		rm32				m:	hle o32 ff /0				386,LOCK
+INC		rm64				m:	hle o64 ff /0				X86_64,LONG,LOCK
+INSB		void					6c					186
+INSD		void					o32 6d					386
+INSW		void					o16 6d					186
+INT		imm				i:	cd ib,u				8086,SB
+INT01		void					f1					386,ND
+INT1		void					f1					386
+INT03		void					cc					8086,ND
+INT3		void					cc					8086
+INTO		void					ce					8086,NOLONG
+INVD		void					0f 08					486,PRIV
+INVPCID		reg32,mem128			rm:	66 0f 38 82 /r				FUTURE,INVPCID,PRIV,NOLONG
+INVPCID		reg64,mem128			rm:	66 0f 38 82 /r				FUTURE,INVPCID,PRIV,LONG
+INVLPG		mem				m:	0f 01 /7				486,PRIV
+INVLPGA		reg_ax,reg_ecx			--:	a16 0f 01 df				X86_64,AMD,NOLONG
+INVLPGA		reg_eax,reg_ecx			--:	a32 0f 01 df				X86_64,AMD
+INVLPGA		reg_rax,reg_ecx			--:	o64nw a64 0f 01 df			X86_64,LONG,AMD
+INVLPGA		void					0f 01 df				X86_64,AMD
+IRET		void					odf cf					8086
+IRETD		void					o32 cf					386
+IRETQ		void					o64 cf					X86_64,LONG
+IRETW		void					o16 cf					8086
+JCXZ		imm				i:	a16 e3 rel8				8086,NOLONG
+JECXZ		imm				i:	a32 e3 rel8				386
+JRCXZ		imm				i:	o64nw a64 e3 rel8			X86_64,LONG
+JMP		imm|short			i:	eb rel8				8086
+JMP		imm				i:	jmp8 eb rel8				8086,ND
+JMP		imm				i:	odf e9 rel				8086,BND
+JMP		imm|near			i:	odf e9 rel				8086,ND,BND
+JMP		imm|far				i:	odf ea iwd seg				8086,ND,NOLONG
+; Call/jmp near imm/reg/mem is always 64-bit in long mode.
+JMP		imm16				i:	o16 e9 rel				8086,NOLONG,BND
+JMP		imm16|near			i:	o16 e9 rel				8086,ND,NOLONG,BND
+JMP		imm16|far			i:	o16 ea iwd seg				8086,ND,NOLONG
+JMP		imm32				i:	o32 e9 rel				386,NOLONG,BND
+JMP		imm32|near			i:	o32 e9 rel				386,ND,NOLONG,BND
+JMP		imm32|far			i:	o32 ea iwd seg				386,ND,NOLONG
+JMP		imm64				i:	o64nw e9 rel				X86_64,LONG,BND
+JMP		imm64|near			i:	o64nw e9 rel				X86_64,LONG,ND,BND
+JMP		imm:imm				ji:	odf ea iwd iw				8086,NOLONG
+JMP		imm16:imm			ji:	o16 ea iw iw				8086,NOLONG
+JMP		imm:imm16			ji:	o16 ea iw iw				8086,NOLONG
+JMP		imm32:imm			ji:	o32 ea id iw				386,NOLONG
+JMP		imm:imm32			ji:	o32 ea id iw				386,NOLONG
+JMP		mem|far				m:	odf ff /5				8086,NOLONG
+JMP		mem|far				m:	o64 ff /5				X86_64,LONG
+JMP		mem16|far			m:	o16 ff /5				8086
+JMP		mem32|far			m:	o32 ff /5				386
+JMP		mem64|far			m:	o64 ff /5				X86_64,LONG
+JMP		mem|near			m:	odf ff /4				8086,ND,BND
+JMP		rm16|near			m:	o16 ff /4				8086,NOLONG,ND,BND
+JMP		rm32|near			m:	o32 ff /4				386,NOLONG,ND,BND
+JMP		rm64|near			m:	o64nw ff /4				X86_64,LONG,ND,BND
+JMP		mem				m:	odf ff /4				8086,BND
+JMP		rm16				m:	o16 ff /4				8086,NOLONG,BND
+JMP		rm32				m:	o32 ff /4				386,NOLONG,BND
+JMP		rm64				m:	o64nw ff /4				X86_64,LONG,BND
+
+JMPE		imm				i:	odf 0f b8 rel				IA64
+JMPE		imm16				i:	o16 0f b8 rel				IA64
+JMPE		imm32				i:	o32 0f b8 rel				IA64
+JMPE		rm16				m:	o16 0f 00 /6				IA64
+JMPE		rm32				m:	o32 0f 00 /6				IA64
+LAHF		void					9f					8086
+LAR		reg16,mem			rm:	o16 0f 02 /r				286,PROT,SW
+LAR		reg16,reg16			rm:	o16 0f 02 /r				286,PROT
+LAR		reg16,reg32			rm:	o16 0f 02 /r				386,PROT
+LAR		reg16,reg64			rm:	o16 o64nw 0f 02 /r			X86_64,LONG,PROT,ND
+LAR		reg32,mem			rm:	o32 0f 02 /r				386,PROT,SW
+LAR		reg32,reg16			rm:	o32 0f 02 /r				386,PROT
+LAR		reg32,reg32			rm:	o32 0f 02 /r				386,PROT
+LAR		reg32,reg64			rm:	o32 o64nw 0f 02 /r			X86_64,LONG,PROT,ND
+LAR		reg64,mem			rm:	o64 0f 02 /r				X86_64,LONG,PROT,SW
+LAR		reg64,reg16			rm:	o64 0f 02 /r				X86_64,LONG,PROT
+LAR		reg64,reg32			rm:	o64 0f 02 /r				X86_64,LONG,PROT
+LAR		reg64,reg64			rm:	o64 0f 02 /r				X86_64,LONG,PROT
+LDS		reg16,mem			rm:	o16 c5 /r				8086,NOLONG
+LDS		reg32,mem			rm:	o32 c5 /r				386,NOLONG
+LEA		reg16,mem			rm:	o16 8d /r				8086,ANYSIZE
+LEA		reg32,mem			rm:	o32 8d /r				386,ANYSIZE
+LEA		reg64,mem			rm:	o64 8d /r				X86_64,LONG,ANYSIZE
+LEA		reg16,imm			rm:	o16 8d /r				8086,ND,ANYSIZE
+LEA		reg32,imm			rm:	o32 8d /r				386,ND,ANYSIZE
+LEA		reg64,imm			rm:	o64 8d /r				X86_64,LONG,ND,ANYSIZE
+LEAVE		void					c9					186
+LES		reg16,mem			rm:	o16 c4 /r				8086,NOLONG
+LES		reg32,mem			rm:	o32 c4 /r				386,NOLONG
+LFENCE		void					np 0f ae e8				X86_64,LONG,AMD
+LFS		reg16,mem			rm:	o16 0f b4 /r				386
+LFS		reg32,mem			rm:	o32 0f b4 /r				386
+LFS		reg64,mem			rm:	o64 0f b4 /r				X86_64,LONG
+LGDT		mem				m:	0f 01 /2				286,PRIV
+LGS		reg16,mem			rm:	o16 0f b5 /r				386
+LGS		reg32,mem			rm:	o32 0f b5 /r				386
+LGS		reg64,mem			rm:	o64 0f b5 /r				X86_64,LONG
+LIDT		mem				m:	0f 01 /3				286,PRIV
+LLDT		mem				m:	0f 00 /2				286,PROT,PRIV
+LLDT		mem16				m:	0f 00 /2				286,PROT,PRIV
+LLDT		reg16				m:	0f 00 /2				286,PROT,PRIV
+LMSW		mem				m:	0f 01 /6				286,PRIV
+LMSW		mem16				m:	0f 01 /6				286,PRIV
+LMSW		reg16				m:	0f 01 /6				286,PRIV
+LOADALL		void					0f 07					386,UNDOC,ND,OBSOLETE
+LOADALL286	void					0f 05					286,UNDOC,ND,OBSOLETE
+LODSB		void					ac					8086
+LODSD		void					o32 ad					386
+LODSQ		void					o64 ad					X86_64,LONG
+LODSW		void					o16 ad					8086
+LOOP		imm				i:	adf e2 rel8				8086
+LOOP		imm,reg_cx			i-:	a16 e2 rel8				8086,NOLONG
+LOOP		imm,reg_ecx			i-:	a32 e2 rel8				386
+LOOP		imm,reg_rcx			i-:	a64 e2 rel8				X86_64,LONG
+LOOPE		imm				i:	adf e1 rel8				8086
+LOOPE		imm,reg_cx			i-:	a16 e1 rel8				8086,NOLONG
+LOOPE		imm,reg_ecx			i-:	a32 e1 rel8				386
+LOOPE		imm,reg_rcx			i-:	a64 e1 rel8				X86_64,LONG
+LOOPNE		imm				i:	adf e0 rel8				8086
+LOOPNE		imm,reg_cx			i-:	a16 e0 rel8				8086,NOLONG
+LOOPNE		imm,reg_ecx			i-:	a32 e0 rel8				386
+LOOPNE		imm,reg_rcx			i-:	a64 e0 rel8				X86_64,LONG
+LOOPNZ		imm				i:	adf e0 rel8				8086
+LOOPNZ		imm,reg_cx			i-:	a16 e0 rel8				8086,NOLONG
+LOOPNZ		imm,reg_ecx			i-:	a32 e0 rel8				386
+LOOPNZ		imm,reg_rcx			i-:	a64 e0 rel8				X86_64,LONG
+LOOPZ		imm				i:	adf e1 rel8				8086
+LOOPZ		imm,reg_cx			i-:	a16 e1 rel8				8086,NOLONG
+LOOPZ		imm,reg_ecx			i-:	a32 e1 rel8				386
+LOOPZ		imm,reg_rcx			i-:	a64 e1 rel8				X86_64,LONG
+LSL		reg16,mem			rm:	o16 0f 03 /r				286,PROT,SW
+LSL		reg16,reg16			rm:	o16 0f 03 /r				286,PROT
+LSL		reg16,reg32			rm:	o16 0f 03 /r				386,PROT
+LSL		reg16,reg64			rm:	o16 o64nw 0f 03 /r			X86_64,LONG,PROT,ND
+LSL		reg32,mem			rm:	o32 0f 03 /r				386,PROT,SW
+LSL		reg32,reg16			rm:	o32 0f 03 /r				386,PROT
+LSL		reg32,reg32			rm:	o32 0f 03 /r				386,PROT
+LSL		reg32,reg64			rm:	o32 o64nw 0f 03 /r			X86_64,LONG,PROT,ND
+LSL		reg64,mem			rm:	o64 0f 03 /r				X86_64,LONG,PROT,SW
+LSL		reg64,reg16			rm:	o64 0f 03 /r				X86_64,LONG,PROT
+LSL		reg64,reg32			rm:	o64 0f 03 /r				X86_64,LONG,PROT
+LSL		reg64,reg64			rm:	o64 0f 03 /r				X86_64,LONG,PROT
+LSS		reg16,mem			rm:	o16 0f b2 /r				386
+LSS		reg32,mem			rm:	o32 0f b2 /r				386
+LSS		reg64,mem			rm:	o64 0f b2 /r				X86_64,LONG
+LTR		mem				m:	0f 00 /3				286,PROT,PRIV
+LTR		mem16				m:	0f 00 /3				286,PROT,PRIV
+LTR		reg16				m:	0f 00 /3				286,PROT,PRIV
+MFENCE		void					np 0f ae f0				X86_64,LONG,AMD
+MONITOR		void					0f 01 c8				PRESCOTT
+MONITOR		reg_eax,reg_ecx,reg_edx		---:	0f 01 c8				PRESCOTT,NOLONG,ND
+MONITOR		reg_rax,reg_ecx,reg_edx		---:	0f 01 c8				X86_64,LONG,ND
+MONITORX	void					0f 01 fa				AMD
+MONITORX	reg_rax,reg_ecx,reg_edx		---:	0f 01 fa				X86_64,LONG,AMD,ND
+MONITORX	reg_eax,reg_ecx,reg_edx		---:	0f 01 fa				AMD,ND
+MONITORX	reg_ax,reg_ecx,reg_edx		---:	0f 01 fa				AMD,ND
+MOV		mem,reg_sreg			mr:	8c /r					8086,SW
+MOV		reg16,reg_sreg			mr:	o16 8c /r				8086
+MOV		reg32,reg_sreg			mr:	o32 8c /r				386
+MOV		reg64,reg_sreg			mr:	o64nw 8c /r				X86_64,LONG,OPT,ND
+MOV		rm64,reg_sreg			mr:	o64 8c /r				X86_64,LONG
+MOV		reg_sreg,mem			rm:	8e /r					8086,SW
+MOV		reg_sreg,reg16			rm:	8e /r					8086,OPT,ND
+MOV		reg_sreg,reg32			rm:	8e /r					386,OPT,ND
+MOV		reg_sreg,reg64			rm:	o64nw 8e /r				X86_64,LONG,OPT,ND
+MOV		reg_sreg,reg16			rm:	o16 8e /r				8086
+MOV		reg_sreg,reg32			rm:	o32 8e /r				386
+MOV		reg_sreg,rm64			rm:	o64 8e /r				X86_64,LONG
+MOV		reg_al,mem_offs			-i:	a0 iwdq				8086,SM
+MOV		reg_ax,mem_offs			-i:	o16 a1 iwdq				8086,SM
+MOV		reg_eax,mem_offs		-i:	o32 a1 iwdq				386,SM
+MOV		reg_rax,mem_offs		-i:	o64 a1 iwdq				X86_64,LONG,SM
+MOV		mem_offs,reg_al			i-:	a2 iwdq				8086,SM,NOHLE
+MOV		mem_offs,reg_ax			i-:	o16 a3 iwdq				8086,SM,NOHLE
+MOV		mem_offs,reg_eax		i-:	o32 a3 iwdq				386,SM,NOHLE
+MOV		mem_offs,reg_rax		i-:	o64 a3 iwdq				X86_64,LONG,SM,NOHLE
+MOV		reg32,reg_creg			mr:	rex.l 0f 20 /r				386,PRIV,NOLONG
+MOV		reg64,reg_creg			mr:	o64nw 0f 20 /r				X86_64,LONG,PRIV
+MOV		reg_creg,reg32			rm:	rex.l 0f 22 /r				386,PRIV,NOLONG
+MOV		reg_creg,reg64			rm:	o64nw 0f 22 /r				X86_64,LONG,PRIV
+MOV		reg32,reg_dreg			mr:	0f 21 /r				386,PRIV,NOLONG
+MOV		reg64,reg_dreg			mr:	o64nw 0f 21 /r				X86_64,LONG,PRIV
+MOV		reg_dreg,reg32			rm:	0f 23 /r				386,PRIV,NOLONG
+MOV		reg_dreg,reg64			rm:	o64nw 0f 23 /r				X86_64,LONG,PRIV
+MOV		reg32,reg_treg			mr:	0f 24 /r				386,NOLONG,ND
+MOV		reg_treg,reg32			rm:	0f 26 /r				386,NOLONG,ND
+MOV		mem,reg8			mr:	hlexr 88 /r				8086,SM
+MOV		reg8,reg8			mr:	88 /r					8086
+MOV		mem,reg16			mr:	hlexr o16 89 /r			8086,SM
+MOV		reg16,reg16			mr:	o16 89 /r				8086
+MOV		mem,reg32			mr:	hlexr o32 89 /r			386,SM
+MOV		reg32,reg32			mr:	o32 89 /r				386
+MOV		mem,reg64			mr:	hlexr o64 89 /r			X86_64,LONG,SM
+MOV		reg64,reg64			mr:	o64 89 /r				X86_64,LONG
+MOV		reg8,mem			rm:	8a /r					8086,SM
+MOV		reg8,reg8			rm:	8a /r					8086
+MOV		reg16,mem			rm:	o16 8b /r				8086,SM
+MOV		reg16,reg16			rm:	o16 8b /r				8086
+MOV		reg32,mem			rm:	o32 8b /r				386,SM
+MOV		reg32,reg32			rm:	o32 8b /r				386
+MOV		reg64,mem			rm:	o64 8b /r				X86_64,LONG,SM
+MOV		reg64,reg64			rm:	o64 8b /r				X86_64,LONG
+MOV		reg8,imm			ri:	b0+r ib				8086,SM
+MOV		reg16,imm			ri:	o16 b8+r iw				8086,SM
+MOV		reg32,imm			ri:	o32 b8+r id				386,SM
+MOV		reg64,udword			ri:	o64nw b8+r id				X86_64,LONG,SM,OPT,ND
+MOV		reg64,sdword			mi:	o64 c7 /0 id,s				X86_64,LONG,SM,OPT,ND
+MOV		reg64,imm			ri:	o64 b8+r iq				X86_64,LONG,SM
+MOV		rm8,imm				mi:	hlexr c6 /0 ib				8086,SM
+MOV		rm16,imm			mi:	hlexr o16 c7 /0 iw			8086,SM
+MOV		rm32,imm			mi:	hlexr o32 c7 /0 id			386,SM
+MOV		rm64,imm			mi:	hlexr o64 c7 /0 id,s			X86_64,LONG,SM
+MOV		rm64,imm32			mi:	hlexr o64 c7 /0 id,s			X86_64,LONG
+MOV		mem,imm8			mi:	hlexr c6 /0 ib				8086,SM
+MOV		mem,imm16			mi:	hlexr o16 c7 /0 iw			8086,SM
+MOV		mem,imm32			mi:	hlexr o32 c7 /0 id			386,SM
+MOVD		mmxreg,rm32			rm:	np 0f 6e /r				PENT,MMX,SD
+MOVD		rm32,mmxreg			mr:	np 0f 7e /r				PENT,MMX,SD
+MOVD		mmxreg,rm64			rm:	np o64 0f 6e /r			X86_64,LONG,MMX,SX,ND
+MOVD		rm64,mmxreg			mr:	np o64 0f 7e /r			X86_64,LONG,MMX,SX,ND
+MOVQ		mmxreg,mmxrm			rm:	np 0f 6f /r				PENT,MMX,SQ
+MOVQ		mmxrm,mmxreg			mr:	np 0f 7f /r				PENT,MMX,SQ
+MOVQ		mmxreg,rm64			rm:	np o64 0f 6e /r			X86_64,LONG,MMX
+MOVQ		rm64,mmxreg			mr:	np o64 0f 7e /r			X86_64,LONG,MMX
+MOVSB		void					a4					8086
+MOVSD		void					o32 a5					386
+MOVSQ		void					o64 a5					X86_64,LONG
+MOVSW		void					o16 a5					8086
+MOVSX		reg16,mem			rm:	o16 0f be /r				386,SB
+MOVSX		reg16,reg8			rm:	o16 0f be /r				386
+MOVSX		reg32,rm8			rm:	o32 0f be /r				386
+MOVSX		reg32,rm16			rm:	o32 0f bf /r				386
+MOVSX		reg64,rm8			rm:	o64 0f be /r				X86_64,LONG
+MOVSX		reg64,rm16			rm:	o64 0f bf /r				X86_64,LONG
+MOVSXD		reg64,rm32			rm:	o64 63 /r				X86_64,LONG
+MOVSX		reg64,rm32			rm:	o64 63 /r				X86_64,LONG,ND
+MOVZX		reg16,mem			rm:	o16 0f b6 /r				386,SB
+MOVZX		reg16,reg8			rm:	o16 0f b6 /r				386
+MOVZX		reg32,rm8			rm:	o32 0f b6 /r				386
+MOVZX		reg32,rm16			rm:	o32 0f b7 /r				386
+MOVZX		reg64,rm8			rm:	o64 0f b6 /r				X86_64,LONG
+MOVZX		reg64,rm16			rm:	o64 0f b7 /r				X86_64,LONG
+MUL		rm8				m:	f6 /4					8086
+MUL		rm16				m:	o16 f7 /4				8086
+MUL		rm32				m:	o32 f7 /4				386
+MUL		rm64				m:	o64 f7 /4				X86_64,LONG
+MWAIT		void					0f 01 c9				PRESCOTT
+MWAIT		reg_eax,reg_ecx			--:	0f 01 c9				PRESCOTT,ND
+MWAITX		void					0f 01 fb				AMD
+MWAITX		reg_eax,reg_ecx			--:	0f 01 fb				AMD,ND
+NEG		rm8				m:	hle f6 /3				8086,LOCK
+NEG		rm16				m:	hle o16 f7 /3				8086,LOCK
+NEG		rm32				m:	hle o32 f7 /3				386,LOCK
+NEG		rm64				m:	hle o64 f7 /3				X86_64,LONG,LOCK
+NOP		void					norexb nof3 90				8086
+NOP		rm16				m:	o16 0f 1f /0				P6
+NOP		rm32				m:	o32 0f 1f /0				P6
+NOP		rm64				m:	o64 0f 1f /0				X86_64,LONG
+NOT		rm8				m:	hle f6 /2				8086,LOCK
+NOT		rm16				m:	hle o16 f7 /2				8086,LOCK
+NOT		rm32				m:	hle o32 f7 /2				386,LOCK
+NOT		rm64				m:	hle o64 f7 /2				X86_64,LONG,LOCK
+OR		mem,reg8			mr:	hle 08 /r				8086,SM,LOCK
+OR		reg8,reg8			mr:	08 /r					8086
+OR		mem,reg16			mr:	hle o16 09 /r				8086,SM,LOCK
+OR		reg16,reg16			mr:	o16 09 /r				8086
+OR		mem,reg32			mr:	hle o32 09 /r				386,SM,LOCK
+OR		reg32,reg32			mr:	o32 09 /r				386
+OR		mem,reg64			mr:	hle o64 09 /r				X86_64,LONG,SM,LOCK
+OR		reg64,reg64			mr:	o64 09 /r				X86_64,LONG
+OR		reg8,mem			rm:	0a /r					8086,SM
+OR		reg8,reg8			rm:	0a /r					8086
+OR		reg16,mem			rm:	o16 0b /r				8086,SM
+OR		reg16,reg16			rm:	o16 0b /r				8086
+OR		reg32,mem			rm:	o32 0b /r				386,SM
+OR		reg32,reg32			rm:	o32 0b /r				386
+OR		reg64,mem			rm:	o64 0b /r				X86_64,LONG,SM
+OR		reg64,reg64			rm:	o64 0b /r				X86_64,LONG
+OR		rm16,imm8			mi:	hle o16 83 /1 ib,s			8086,LOCK
+OR		rm32,imm8			mi:	hle o32 83 /1 ib,s			386,LOCK
+OR		rm64,imm8			mi:	hle o64 83 /1 ib,s			X86_64,LONG,LOCK
+OR		reg_al,imm			-i:	0c ib					8086,SM
+OR		reg_ax,sbyteword		mi:	o16 83 /1 ib,s				8086,SM,ND
+OR		reg_ax,imm			-i:	o16 0d iw				8086,SM
+OR		reg_eax,sbytedword		mi:	o32 83 /1 ib,s				386,SM,ND
+OR		reg_eax,imm			-i:	o32 0d id				386,SM
+OR		reg_rax,sbytedword		mi:	o64 83 /1 ib,s				X86_64,LONG,SM,ND
+OR		reg_rax,imm			-i:	o64 0d id,s				X86_64,LONG,SM
+OR		rm8,imm				mi:	hle 80 /1 ib				8086,SM,LOCK
+OR		rm16,sbyteword			mi:	hle o16 83 /1 ib,s			8086,SM,LOCK,ND
+OR		rm16,imm			mi:	hle o16 81 /1 iw			8086,SM,LOCK
+OR		rm32,sbytedword			mi:	hle o32 83 /1 ib,s			386,SM,LOCK,ND
+OR		rm32,imm			mi:	hle o32 81 /1 id			386,SM,LOCK
+OR		rm64,sbytedword			mi:	hle o64 83 /1 ib,s			X86_64,LONG,SM,LOCK,ND
+OR		rm64,imm			mi:	hle o64 81 /1 id,s			X86_64,LONG,SM,LOCK
+OR		mem,imm8			mi:	hle 80 /1 ib				8086,SM,LOCK
+OR		mem,sbyteword16			mi:	hle o16 83 /1 ib,s			8086,SM,LOCK,ND
+OR		mem,imm16			mi:	hle o16 81 /1 iw			8086,SM,LOCK
+OR		mem,sbytedword32		mi:	hle o32 83 /1 ib,s			386,SM,LOCK,ND
+OR		mem,imm32			mi:	hle o32 81 /1 id			386,SM,LOCK
+OR		rm8,imm				mi:	hle 82 /1 ib				8086,SM,LOCK,ND,NOLONG
+OUT		imm,reg_al			i-:	e6 ib,u				8086,SB
+OUT		imm,reg_ax			i-:	o16 e7 ib,u				8086,SB
+OUT		imm,reg_eax			i-:	o32 e7 ib,u				386,SB
+OUT		reg_dx,reg_al			--:	ee					8086
+OUT		reg_dx,reg_ax			--:	o16 ef					8086
+OUT		reg_dx,reg_eax			--:	o32 ef					386
+OUTSB		void					6e					186
+OUTSD		void					o32 6f					386
+OUTSW		void					o16 6f					186
+PACKSSDW	mmxreg,mmxrm			rm:	np o64nw 0f 6b /r			PENT,MMX,SQ
+PACKSSWB	mmxreg,mmxrm			rm:	np o64nw 0f 63 /r			PENT,MMX,SQ
+PACKUSWB	mmxreg,mmxrm			rm:	np o64nw 0f 67 /r			PENT,MMX,SQ
+PADDB		mmxreg,mmxrm			rm:	np o64nw 0f fc /r			PENT,MMX,SQ
+PADDD		mmxreg,mmxrm			rm:	np o64nw 0f fe /r			PENT,MMX,SQ
+PADDSB		mmxreg,mmxrm			rm:	np o64nw 0f ec /r			PENT,MMX,SQ
+PADDSIW		mmxreg,mmxrm			rm:	o64nw 0f 51 /r				PENT,MMX,SQ,CYRIX
+PADDSW		mmxreg,mmxrm			rm:	np o64nw 0f ed /r			PENT,MMX,SQ
+PADDUSB		mmxreg,mmxrm			rm:	np o64nw 0f dc /r			PENT,MMX,SQ
+PADDUSW		mmxreg,mmxrm			rm:	np o64nw 0f dd /r			PENT,MMX,SQ
+PADDW		mmxreg,mmxrm			rm:	np o64nw 0f fd /r			PENT,MMX,SQ
+PAND		mmxreg,mmxrm			rm:	np o64nw 0f db /r			PENT,MMX,SQ
+PANDN		mmxreg,mmxrm			rm:	np o64nw 0f df /r			PENT,MMX,SQ
+PAUSE		void					f3i 90					8086
+PAVEB		mmxreg,mmxrm			rm:	o64nw 0f 50 /r				PENT,MMX,SQ,CYRIX
+PAVGUSB		mmxreg,mmxrm			rm:	o64nw 0f 0f /r bf			PENT,3DNOW,SQ
+PCMPEQB		mmxreg,mmxrm			rm:	np o64nw 0f 74 /r			PENT,MMX,SQ
+PCMPEQD		mmxreg,mmxrm			rm:	np o64nw 0f 76 /r			PENT,MMX,SQ
+PCMPEQW		mmxreg,mmxrm			rm:	np o64nw 0f 75 /r			PENT,MMX,SQ
+PCMPGTB		mmxreg,mmxrm			rm:	np o64nw 0f 64 /r			PENT,MMX,SQ
+PCMPGTD		mmxreg,mmxrm			rm:	np o64nw 0f 66 /r			PENT,MMX,SQ
+PCMPGTW		mmxreg,mmxrm			rm:	np o64nw 0f 65 /r			PENT,MMX,SQ
+PDISTIB		mmxreg,mem			rm:	0f 54 /r				PENT,MMX,SM,CYRIX
+PF2ID		mmxreg,mmxrm			rm:	o64nw 0f 0f /r 1d			PENT,3DNOW,SQ
+PFACC		mmxreg,mmxrm			rm:	o64nw 0f 0f /r ae			PENT,3DNOW,SQ
+PFADD		mmxreg,mmxrm			rm:	o64nw 0f 0f /r 9e			PENT,3DNOW,SQ
+PFCMPEQ		mmxreg,mmxrm			rm:	o64nw 0f 0f /r b0			PENT,3DNOW,SQ
+PFCMPGE		mmxreg,mmxrm			rm:	o64nw 0f 0f /r 90			PENT,3DNOW,SQ
+PFCMPGT		mmxreg,mmxrm			rm:	o64nw 0f 0f /r a0			PENT,3DNOW,SQ
+PFMAX		mmxreg,mmxrm			rm:	o64nw 0f 0f /r a4			PENT,3DNOW,SQ
+PFMIN		mmxreg,mmxrm			rm:	o64nw 0f 0f /r 94			PENT,3DNOW,SQ
+PFMUL		mmxreg,mmxrm			rm:	o64nw 0f 0f /r b4			PENT,3DNOW,SQ
+PFRCP		mmxreg,mmxrm			rm:	o64nw 0f 0f /r 96			PENT,3DNOW,SQ
+PFRCPIT1	mmxreg,mmxrm			rm:	o64nw 0f 0f /r a6			PENT,3DNOW,SQ
+PFRCPIT2	mmxreg,mmxrm			rm:	o64nw 0f 0f /r b6			PENT,3DNOW,SQ
+PFRSQIT1	mmxreg,mmxrm			rm:	o64nw 0f 0f /r a7			PENT,3DNOW,SQ
+PFRSQRT		mmxreg,mmxrm			rm:	o64nw 0f 0f /r 97			PENT,3DNOW,SQ
+PFSUB		mmxreg,mmxrm			rm:	o64nw 0f 0f /r 9a			PENT,3DNOW,SQ
+PFSUBR		mmxreg,mmxrm			rm:	o64nw 0f 0f /r aa			PENT,3DNOW,SQ
+PI2FD		mmxreg,mmxrm			rm:	o64nw 0f 0f /r 0d			PENT,3DNOW,SQ
+PMACHRIW	mmxreg,mem			rm:	0f 5e /r				PENT,MMX,SM,CYRIX
+PMADDWD		mmxreg,mmxrm			rm:	np o64nw 0f f5 /r			PENT,MMX,SQ
+PMAGW		mmxreg,mmxrm			rm:	o64nw 0f 52 /r				PENT,MMX,SQ,CYRIX
+PMULHRIW	mmxreg,mmxrm			rm:	o64nw 0f 5d /r				PENT,MMX,SQ,CYRIX
+PMULHRWA	mmxreg,mmxrm			rm:	o64nw 0f 0f /r b7			PENT,3DNOW,SQ
+PMULHRWC	mmxreg,mmxrm			rm:	o64nw 0f 59 /r				PENT,MMX,SQ,CYRIX
+PMULHW		mmxreg,mmxrm			rm:	np o64nw 0f e5 /r			PENT,MMX,SQ
+PMULLW		mmxreg,mmxrm			rm:	np o64nw 0f d5 /r			PENT,MMX,SQ
+PMVGEZB		mmxreg,mem			rm:	0f 5c /r				PENT,MMX,SQ,CYRIX
+PMVLZB		mmxreg,mem			rm:	0f 5b /r				PENT,MMX,SQ,CYRIX
+PMVNZB		mmxreg,mem			rm:	0f 5a /r				PENT,MMX,SQ,CYRIX
+PMVZB		mmxreg,mem			rm:	0f 58 /r				PENT,MMX,SQ,CYRIX
+POP		reg16				r:	o16 58+r				8086
+POP		reg32				r:	o32 58+r				386,NOLONG
+POP		reg64				r:	o64nw 58+r				X86_64,LONG
+POP		rm16				m:	o16 8f /0				8086
+POP		rm32				m:	o32 8f /0				386,NOLONG
+POP		rm64				m:	o64nw 8f /0				X86_64,LONG
+POP		reg_es				-:	07					8086,NOLONG
+POP		reg_cs				-:	0f					8086,UNDOC,ND,OBSOLETE
+POP		reg_ss				-:	17					8086,NOLONG
+POP		reg_ds				-:	1f					8086,NOLONG
+POP		reg_fs				-:	0f a1					386
+POP		reg_gs				-:	0f a9					386
+POPA		void					odf 61					186,NOLONG
+POPAD		void					o32 61					386,NOLONG
+POPAW		void					o16 61					186,NOLONG
+POPF		void					odf 9d					8086
+POPFD		void					o32 9d					386,NOLONG
+POPFQ		void					o32 9d					X86_64,LONG
+POPFW		void					o16 9d					8086
+POR		mmxreg,mmxrm			rm:	np o64nw 0f eb /r			PENT,MMX,SQ
+PREFETCH	mem				m:	0f 0d /0				PENT,3DNOW,SQ
+PREFETCHW	mem				m:	0f 0d /1				PENT,3DNOW,SQ
+PSLLD		mmxreg,mmxrm			rm:	np o64nw 0f f2 /r			PENT,MMX,SQ
+PSLLD		mmxreg,imm			mi:	np 0f 72 /6 ib,u			PENT,MMX
+PSLLQ		mmxreg,mmxrm			rm:	np o64nw 0f f3 /r			PENT,MMX,SQ
+PSLLQ		mmxreg,imm			mi:	np 0f 73 /6 ib,u			PENT,MMX
+PSLLW		mmxreg,mmxrm			rm:	np o64nw 0f f1 /r			PENT,MMX,SQ
+PSLLW		mmxreg,imm			mi:	np 0f 71 /6 ib,u			PENT,MMX
+PSRAD		mmxreg,mmxrm			rm:	np o64nw 0f e2 /r			PENT,MMX,SQ
+PSRAD		mmxreg,imm			mi:	np 0f 72 /4 ib,u			PENT,MMX
+PSRAW		mmxreg,mmxrm			rm:	np o64nw 0f e1 /r			PENT,MMX,SQ
+PSRAW		mmxreg,imm			mi:	np 0f 71 /4 ib,u			PENT,MMX
+PSRLD		mmxreg,mmxrm			rm:	np o64nw 0f d2 /r			PENT,MMX,SQ
+PSRLD		mmxreg,imm			mi:	np 0f 72 /2 ib,u			PENT,MMX
+PSRLQ		mmxreg,mmxrm			rm:	np o64nw 0f d3 /r			PENT,MMX,SQ
+PSRLQ		mmxreg,imm			mi:	np 0f 73 /2 ib,u			PENT,MMX
+PSRLW		mmxreg,mmxrm			rm:	np o64nw 0f d1 /r			PENT,MMX,SQ
+PSRLW		mmxreg,imm			mi:	np 0f 71 /2 ib,u			PENT,MMX
+PSUBB		mmxreg,mmxrm			rm:	np o64nw 0f f8 /r			PENT,MMX,SQ
+PSUBD		mmxreg,mmxrm			rm:	np o64nw 0f fa /r			PENT,MMX,SQ
+PSUBSB		mmxreg,mmxrm			rm:	np o64nw 0f e8 /r			PENT,MMX,SQ
+PSUBSIW		mmxreg,mmxrm			rm:	o64nw 0f 55 /r				PENT,MMX,SQ,CYRIX
+PSUBSW		mmxreg,mmxrm			rm:	np o64nw 0f e9 /r			PENT,MMX,SQ
+PSUBUSB		mmxreg,mmxrm			rm:	np o64nw 0f d8 /r			PENT,MMX,SQ
+PSUBUSW		mmxreg,mmxrm			rm:	np o64nw 0f d9 /r			PENT,MMX,SQ
+PSUBW		mmxreg,mmxrm			rm:	np o64nw 0f f9 /r			PENT,MMX,SQ
+PUNPCKHBW	mmxreg,mmxrm			rm:	np o64nw 0f 68 /r			PENT,MMX,SQ
+PUNPCKHDQ	mmxreg,mmxrm			rm:	np o64nw 0f 6a /r			PENT,MMX,SQ
+PUNPCKHWD	mmxreg,mmxrm			rm:	np o64nw 0f 69 /r			PENT,MMX,SQ
+PUNPCKLBW	mmxreg,mmxrm			rm:	np o64nw 0f 60 /r			PENT,MMX,SQ
+PUNPCKLDQ	mmxreg,mmxrm			rm:	np o64nw 0f 62 /r			PENT,MMX,SQ
+PUNPCKLWD	mmxreg,mmxrm			rm:	np o64nw 0f 61 /r			PENT,MMX,SQ
+PUSH		reg16				r:	o16 50+r				8086
+PUSH		reg32				r:	o32 50+r				386,NOLONG
+PUSH		reg64				r:	o64nw 50+r				X86_64,LONG
+PUSH		rm16				m:	o16 ff /6				8086
+PUSH		rm32				m:	o32 ff /6				386,NOLONG
+PUSH		rm64				m:	o64nw ff /6				X86_64,LONG
+PUSH		reg_es				-:	06					8086,NOLONG
+PUSH		reg_cs				-:	0e					8086,NOLONG
+PUSH		reg_ss				-:	16					8086,NOLONG
+PUSH		reg_ds				-:	1e					8086,NOLONG
+PUSH		reg_fs				-:	0f a0					386
+PUSH		reg_gs				-:	0f a8					386
+PUSH		imm8				i:	6a ib,s					186
+PUSH		sbyteword16			i:	o16 6a ib,s				186,AR0,SIZE,ND
+PUSH		imm16				i:	o16 68 iw				186,AR0,SIZE
+PUSH		sbytedword32			i:	o32 6a ib,s				386,NOLONG,AR0,SIZE,ND
+PUSH		imm32				i:	o32 68 id				386,NOLONG,AR0,SIZE
+PUSH		sbytedword32			i:	o32 6a ib,s				386,NOLONG,SD,ND
+PUSH		imm32				i:	o32 68 id				386,NOLONG,SD
+PUSH		sbytedword64			i:	o64nw 6a ib,s				X86_64,LONG,AR0,SIZE,ND
+PUSH		imm64				i:	o64nw 68 id,s				X86_64,LONG,AR0,SIZE
+PUSH		sbytedword32			i:	o64nw 6a ib,s				X86_64,LONG,AR0,SIZE,ND
+PUSH		imm32				i:	o64nw 68 id,s				X86_64,LONG,AR0,SIZE
+PUSHA		void					odf 60					186,NOLONG
+PUSHAD		void					o32 60					386,NOLONG
+PUSHAW		void					o16 60					186,NOLONG
+PUSHF		void					odf 9c					8086
+PUSHFD		void					o32 9c					386,NOLONG
+PUSHFQ		void					o32 9c					X86_64,LONG
+PUSHFW		void					o16 9c					8086
+PXOR		mmxreg,mmxrm			rm:	np o64nw 0f ef /r			PENT,MMX,SQ
+RCL		rm8,unity			m-:	d0 /2					8086
+RCL		rm8,reg_cl			m-:	d2 /2					8086
+RCL		rm8,imm8			mi:	c0 /2 ib,u				186
+RCL		rm16,unity			m-:	o16 d1 /2				8086
+RCL		rm16,reg_cl			m-:	o16 d3 /2				8086
+RCL		rm16,imm8			mi:	o16 c1 /2 ib,u				186
+RCL		rm32,unity			m-:	o32 d1 /2				386
+RCL		rm32,reg_cl			m-:	o32 d3 /2				386
+RCL		rm32,imm8			mi:	o32 c1 /2 ib,u				386
+RCL		rm64,unity			m-:	o64 d1 /2				X86_64,LONG
+RCL		rm64,reg_cl			m-:	o64 d3 /2				X86_64,LONG
+RCL		rm64,imm8			mi:	o64 c1 /2 ib,u				X86_64,LONG
+RCR		rm8,unity			m-:	d0 /3					8086
+RCR		rm8,reg_cl			m-:	d2 /3					8086
+RCR		rm8,imm8			mi:	c0 /3 ib,u				186
+RCR		rm16,unity			m-:	o16 d1 /3				8086
+RCR		rm16,reg_cl			m-:	o16 d3 /3				8086
+RCR		rm16,imm8			mi:	o16 c1 /3 ib,u				186
+RCR		rm32,unity			m-:	o32 d1 /3				386
+RCR		rm32,reg_cl			m-:	o32 d3 /3				386
+RCR		rm32,imm8			mi:	o32 c1 /3 ib,u				386
+RCR		rm64,unity			m-:	o64 d1 /3				X86_64,LONG
+RCR		rm64,reg_cl			m-:	o64 d3 /3				X86_64,LONG
+RCR		rm64,imm8			mi:	o64 c1 /3 ib,u				X86_64,LONG
+RDSHR		rm32				m:	o32 0f 36 /0				P6,CYRIX,SMM
+RDMSR		void					0f 32					PENT,PRIV
+RDPMC		void					0f 33					P6
+RDTSC		void					0f 31					PENT
+RDTSCP		void					0f 01 f9				X86_64
+RET		void					c3					8086,BND
+RET		imm				i:	c2 iw					8086,SW,BND
+RETF		void					cb					8086
+RETF		imm				i:	ca iw					8086,SW
+RETN		void					c3					8086,BND
+RETN		imm				i:	c2 iw					8086,SW,BND
+RETW		void					o16 c3					8086,BND
+RETW		imm				i:	c2 iw					8086,SW,BND
+RETFW		void					o16 cb					8086
+RETFW		imm				i:	o16 ca iw				8086,SW
+RETNW		void					o16 c3					8086,BND
+RETNW		imm				i:	o16 c2 iw				8086,SW,BND
+RETD		void					o32 c3					8086,BND,NOLONG
+RETD		imm				i:	o32 c2 iw				8086,SW,BND,NOLONG
+RETFD		void					o32 cb					8086
+RETFD		imm				i:	o32 ca iw				8086,SW
+RETND		void					o32 c3					8086,BND,NOLONG
+RETND		imm				i:	o32 c2 iw				8086,SW,BND,NOLONG
+RETQ		void					o64nw c3				X86_64,LONG,BND
+RETQ		imm				i:	o64nw c2 iw				X86_64,LONG,SW,BND
+RETFQ		void					o64 cb					X86_64,LONG
+RETFQ		imm				i:	o64 ca iw				X86_64,LONG,SW
+RETNQ		void					o64nw c3				X86_64,LONG,BND
+RETNQ		imm				i:	o64nw c2 iw				X86_64,LONG,SW,BND
+
+ROL		rm8,unity			m-:	d0 /0					8086
+ROL		rm8,reg_cl			m-:	d2 /0					8086
+ROL		rm8,imm8			mi:	c0 /0 ib,u				186
+ROL		rm16,unity			m-:	o16 d1 /0				8086
+ROL		rm16,reg_cl			m-:	o16 d3 /0				8086
+ROL		rm16,imm8			mi:	o16 c1 /0 ib,u				186
+ROL		rm32,unity			m-:	o32 d1 /0				386
+ROL		rm32,reg_cl			m-:	o32 d3 /0				386
+ROL		rm32,imm8			mi:	o32 c1 /0 ib,u				386
+ROL		rm64,unity			m-:	o64 d1 /0				X86_64,LONG
+ROL		rm64,reg_cl			m-:	o64 d3 /0				X86_64,LONG
+ROL		rm64,imm8			mi:	o64 c1 /0 ib,u				X86_64,LONG
+ROR		rm8,unity			m-:	d0 /1					8086
+ROR		rm8,reg_cl			m-:	d2 /1					8086
+ROR		rm8,imm8			mi:	c0 /1 ib,u				186
+ROR		rm16,unity			m-:	o16 d1 /1				8086
+ROR		rm16,reg_cl			m-:	o16 d3 /1				8086
+ROR		rm16,imm8			mi:	o16 c1 /1 ib,u				186
+ROR		rm32,unity			m-:	o32 d1 /1				386
+ROR		rm32,reg_cl			m-:	o32 d3 /1				386
+ROR		rm32,imm8			mi:	o32 c1 /1 ib,u				386
+ROR		rm64,unity			m-:	o64 d1 /1				X86_64,LONG
+ROR		rm64,reg_cl			m-:	o64 d3 /1				X86_64,LONG
+ROR		rm64,imm8			mi:	o64 c1 /1 ib,u				X86_64,LONG
+RDM		void					0f 3a					P6,CYRIX,ND
+RSDC		reg_sreg,mem80			rm:	0f 79 /r				486,CYRIX,SMM
+RSLDT		mem80				m:	0f 7b /0				486,CYRIX,SMM
+RSM		void					0f aa					PENT,SMM
+RSTS		mem80				m:	0f 7d /0				486,CYRIX,SMM
+SAHF		void					9e					8086
+SAL		rm8,unity			m-:	d0 /4					8086,ND
+SAL		rm8,reg_cl			m-:	d2 /4					8086,ND
+SAL		rm8,imm8			mi:	c0 /4 ib,u				186,ND
+SAL		rm16,unity			m-:	o16 d1 /4				8086,ND
+SAL		rm16,reg_cl			m-:	o16 d3 /4				8086,ND
+SAL		rm16,imm8			mi:	o16 c1 /4 ib,u				186,ND
+SAL		rm32,unity			m-:	o32 d1 /4				386,ND
+SAL		rm32,reg_cl			m-:	o32 d3 /4				386,ND
+SAL		rm32,imm8			mi:	o32 c1 /4 ib,u				386,ND
+SAL		rm64,unity			m-:	o64 d1 /4				X86_64,LONG,ND
+SAL		rm64,reg_cl			m-:	o64 d3 /4				X86_64,LONG,ND
+SAL		rm64,imm8			mi:	o64 c1 /4 ib,u				X86_64,LONG,ND
+SALC		void					d6					8086,UNDOC
+SAR		rm8,unity			m-:	d0 /7					8086
+SAR		rm8,reg_cl			m-:	d2 /7					8086
+SAR		rm8,imm8			mi:	c0 /7 ib,u				186
+SAR		rm16,unity			m-:	o16 d1 /7				8086
+SAR		rm16,reg_cl			m-:	o16 d3 /7				8086
+SAR		rm16,imm8			mi:	o16 c1 /7 ib,u				186
+SAR		rm32,unity			m-:	o32 d1 /7				386
+SAR		rm32,reg_cl			m-:	o32 d3 /7				386
+SAR		rm32,imm8			mi:	o32 c1 /7 ib,u				386
+SAR		rm64,unity			m-:	o64 d1 /7				X86_64,LONG
+SAR		rm64,reg_cl			m-:	o64 d3 /7				X86_64,LONG
+SAR		rm64,imm8			mi:	o64 c1 /7 ib,u				X86_64,LONG
+SBB		mem,reg8			mr:	hle 18 /r				8086,SM,LOCK
+SBB		reg8,reg8			mr:	18 /r					8086
+SBB		mem,reg16			mr:	hle o16 19 /r				8086,SM,LOCK
+SBB		reg16,reg16			mr:	o16 19 /r				8086
+SBB		mem,reg32			mr:	hle o32 19 /r				386,SM,LOCK
+SBB		reg32,reg32			mr:	o32 19 /r				386
+SBB		mem,reg64			mr:	hle o64 19 /r				X86_64,LONG,SM,LOCK
+SBB		reg64,reg64			mr:	o64 19 /r				X86_64,LONG
+SBB		reg8,mem			rm:	1a /r					8086,SM
+SBB		reg8,reg8			rm:	1a /r					8086
+SBB		reg16,mem			rm:	o16 1b /r				8086,SM
+SBB		reg16,reg16			rm:	o16 1b /r				8086
+SBB		reg32,mem			rm:	o32 1b /r				386,SM
+SBB		reg32,reg32			rm:	o32 1b /r				386
+SBB		reg64,mem			rm:	o64 1b /r				X86_64,LONG,SM
+SBB		reg64,reg64			rm:	o64 1b /r				X86_64,LONG
+SBB		rm16,imm8			mi:	hle o16 83 /3 ib,s			8086,LOCK
+SBB		rm32,imm8			mi:	hle o32 83 /3 ib,s			386,LOCK
+SBB		rm64,imm8			mi:	hle o64 83 /3 ib,s			X86_64,LONG,LOCK
+SBB		reg_al,imm			-i:	1c ib					8086,SM
+SBB		reg_ax,sbyteword		mi:	o16 83 /3 ib,s				8086,SM,ND
+SBB		reg_ax,imm			-i:	o16 1d iw				8086,SM
+SBB		reg_eax,sbytedword		mi:	o32 83 /3 ib,s				386,SM,ND
+SBB		reg_eax,imm			-i:	o32 1d id				386,SM
+SBB		reg_rax,sbytedword		mi:	o64 83 /3 ib,s				X86_64,LONG,SM,ND
+SBB		reg_rax,imm			-i:	o64 1d id,s				X86_64,LONG,SM
+SBB		rm8,imm				mi:	hle 80 /3 ib				8086,SM,LOCK
+SBB		rm16,sbyteword			mi:	hle o16 83 /3 ib,s			8086,SM,LOCK,ND
+SBB		rm16,imm			mi:	hle o16 81 /3 iw			8086,SM,LOCK
+SBB		rm32,sbytedword			mi:	hle o32 83 /3 ib,s			386,SM,LOCK,ND
+SBB		rm32,imm			mi:	hle o32 81 /3 id			386,SM,LOCK
+SBB		rm64,sbytedword			mi:	hle o64 83 /3 ib,s			X86_64,LONG,SM,LOCK,ND
+SBB		rm64,imm			mi:	hle o64 81 /3 id,s			X86_64,LONG,SM,LOCK
+SBB		mem,imm8			mi:	hle 80 /3 ib				8086,SM,LOCK
+SBB		mem,sbyteword16			mi:	hle o16 83 /3 ib,s			8086,SM,LOCK,ND
+SBB		mem,imm16			mi:	hle o16 81 /3 iw			8086,SM,LOCK
+SBB		mem,sbytedword32		mi:	hle o32 83 /3 ib,s			386,SM,LOCK,ND
+SBB		mem,imm32			mi:	hle o32 81 /3 id			386,SM,LOCK
+SBB		rm8,imm				mi:	hle 82 /3 ib				8086,SM,LOCK,ND,NOLONG
+SCASB		void					repe ae				8086
+SCASD		void					repe o32 af				386
+SCASQ		void					repe o64 af				X86_64,LONG
+SCASW		void					repe o16 af				8086
+SFENCE		void					np 0f ae f8				X86_64,LONG,AMD
+SGDT		mem				m:	0f 01 /0				286
+SHL		rm8,unity			m-:	d0 /4					8086
+SHL		rm8,reg_cl			m-:	d2 /4					8086
+SHL		rm8,imm8			mi:	c0 /4 ib,u				186
+SHL		rm16,unity			m-:	o16 d1 /4				8086
+SHL		rm16,reg_cl			m-:	o16 d3 /4				8086
+SHL		rm16,imm8			mi:	o16 c1 /4 ib,u				186
+SHL		rm32,unity			m-:	o32 d1 /4				386
+SHL		rm32,reg_cl			m-:	o32 d3 /4				386
+SHL		rm32,imm8			mi:	o32 c1 /4 ib,u				386
+SHL		rm64,unity			m-:	o64 d1 /4				X86_64,LONG
+SHL		rm64,reg_cl			m-:	o64 d3 /4				X86_64,LONG
+SHL		rm64,imm8			mi:	o64 c1 /4 ib,u				X86_64,LONG
+SHLD		mem,reg16,imm			mri:	o16 0f a4 /r ib,u			386,SM2,SB,AR2
+SHLD		reg16,reg16,imm			mri:	o16 0f a4 /r ib,u			386,SM2,SB,AR2
+SHLD		mem,reg32,imm			mri:	o32 0f a4 /r ib,u			386,SM2,SB,AR2
+SHLD		reg32,reg32,imm			mri:	o32 0f a4 /r ib,u			386,SM2,SB,AR2
+SHLD		mem,reg64,imm			mri:	o64 0f a4 /r ib,u			X86_64,LONG,SM2,SB,AR2
+SHLD		reg64,reg64,imm			mri:	o64 0f a4 /r ib,u			X86_64,LONG,SM2,SB,AR2
+SHLD		mem,reg16,reg_cl		mr-:	o16 0f a5 /r				386,SM
+SHLD		reg16,reg16,reg_cl		mr-:	o16 0f a5 /r				386
+SHLD		mem,reg32,reg_cl		mr-:	o32 0f a5 /r				386,SM
+SHLD		reg32,reg32,reg_cl		mr-:	o32 0f a5 /r				386
+SHLD		mem,reg64,reg_cl		mr-:	o64 0f a5 /r				X86_64,LONG,SM
+SHLD		reg64,reg64,reg_cl		mr-:	o64 0f a5 /r				X86_64,LONG
+SHR		rm8,unity			m-:	d0 /5					8086
+SHR		rm8,reg_cl			m-:	d2 /5					8086
+SHR		rm8,imm8			mi:	c0 /5 ib,u				186
+SHR		rm16,unity			m-:	o16 d1 /5				8086
+SHR		rm16,reg_cl			m-:	o16 d3 /5				8086
+SHR		rm16,imm8			mi:	o16 c1 /5 ib,u				186
+SHR		rm32,unity			m-:	o32 d1 /5				386
+SHR		rm32,reg_cl			m-:	o32 d3 /5				386
+SHR		rm32,imm8			mi:	o32 c1 /5 ib,u				386
+SHR		rm64,unity			m-:	o64 d1 /5				X86_64,LONG
+SHR		rm64,reg_cl			m-:	o64 d3 /5				X86_64,LONG
+SHR		rm64,imm8			mi:	o64 c1 /5 ib,u				X86_64,LONG
+SHRD		mem,reg16,imm			mri:	o16 0f ac /r ib,u			386,SM2,SB,AR2
+SHRD		reg16,reg16,imm			mri:	o16 0f ac /r ib,u			386,SM2,SB,AR2
+SHRD		mem,reg32,imm			mri:	o32 0f ac /r ib,u			386,SM2,SB,AR2
+SHRD		reg32,reg32,imm			mri:	o32 0f ac /r ib,u			386,SM2,SB,AR2
+SHRD		mem,reg64,imm			mri:	o64 0f ac /r ib,u			X86_64,LONG,SM2,SB,AR2
+SHRD		reg64,reg64,imm			mri:	o64 0f ac /r ib,u			X86_64,LONG,SM2,SB,AR2
+SHRD		mem,reg16,reg_cl		mr-:	o16 0f ad /r				386,SM
+SHRD		reg16,reg16,reg_cl		mr-:	o16 0f ad /r				386
+SHRD		mem,reg32,reg_cl		mr-:	o32 0f ad /r				386,SM
+SHRD		reg32,reg32,reg_cl		mr-:	o32 0f ad /r				386
+SHRD		mem,reg64,reg_cl		mr-:	o64 0f ad /r				X86_64,LONG,SM
+SHRD		reg64,reg64,reg_cl		mr-:	o64 0f ad /r				X86_64,LONG
+SIDT		mem				m:	0f 01 /1				286
+SLDT		mem				m:	0f 00 /0				286
+SLDT		mem16				m:	0f 00 /0				286
+SLDT		reg16				m:	o16 0f 00 /0				286
+SLDT		reg32				m:	o32 0f 00 /0				386
+SLDT		reg64				m:	o64nw 0f 00 /0				X86_64,LONG,ND
+SLDT		reg64				m:	o64 0f 00 /0				X86_64,LONG
+SKINIT		void					0f 01 de				X86_64,LONG
+SMI		void					f1					386,UNDOC
+SMINT		void					0f 38					P6,CYRIX,ND
+; Older Cyrix chips had this; they had to move due to conflict with MMX
+SMINTOLD	void					0f 7e					486,CYRIX,ND,OBSOLETE
+SMSW		mem				m:	0f 01 /4				286
+SMSW		mem16				m:	0f 01 /4				286
+SMSW		reg16				m:	o16 0f 01 /4				286
+SMSW		reg32				m:	o32 0f 01 /4				386
+SMSW		reg64				m:	o64 0f 01 /4				X86_64,LONG
+STC		void					f9					8086
+STD		void					fd					8086
+STI		void					fb					8086
+STOSB		void					aa					8086
+STOSD		void					o32 ab					386
+STOSQ		void					o64 ab					X86_64,LONG
+STOSW		void					o16 ab					8086
+STR		mem				m:	0f 00 /1				286,PROT
+STR		mem16				m:	0f 00 /1				286,PROT
+STR		reg16				m:	o16 0f 00 /1				286,PROT
+STR		reg32				m:	o32 0f 00 /1				386,PROT
+STR		reg64				m:	o64 0f 00 /1				X86_64,LONG
+SUB		mem,reg8			mr:	hle 28 /r				8086,SM,LOCK
+SUB		reg8,reg8			mr:	28 /r					8086
+SUB		mem,reg16			mr:	hle o16 29 /r				8086,SM,LOCK
+SUB		reg16,reg16			mr:	o16 29 /r				8086
+SUB		mem,reg32			mr:	hle o32 29 /r				386,SM,LOCK
+SUB		reg32,reg32			mr:	o32 29 /r				386
+SUB		mem,reg64			mr:	hle o64 29 /r				X86_64,LONG,SM,LOCK
+SUB		reg64,reg64			mr:	o64 29 /r				X86_64,LONG
+SUB		reg8,mem			rm:	2a /r					8086,SM
+SUB		reg8,reg8			rm:	2a /r					8086
+SUB		reg16,mem			rm:	o16 2b /r				8086,SM
+SUB		reg16,reg16			rm:	o16 2b /r				8086
+SUB		reg32,mem			rm:	o32 2b /r				386,SM
+SUB		reg32,reg32			rm:	o32 2b /r				386
+SUB		reg64,mem			rm:	o64 2b /r				X86_64,LONG,SM
+SUB		reg64,reg64			rm:	o64 2b /r				X86_64,LONG
+SUB		rm16,imm8			mi:	hle o16 83 /5 ib,s			8086,LOCK
+SUB		rm32,imm8			mi:	hle o32 83 /5 ib,s			386,LOCK
+SUB		rm64,imm8			mi:	hle o64 83 /5 ib,s			X86_64,LONG,LOCK
+SUB		reg_al,imm			-i:	2c ib					8086,SM
+SUB		reg_ax,sbyteword		mi:	o16 83 /5 ib,s				8086,SM,ND
+SUB		reg_ax,imm			-i:	o16 2d iw				8086,SM
+SUB		reg_eax,sbytedword		mi:	o32 83 /5 ib,s				386,SM,ND
+SUB		reg_eax,imm			-i:	o32 2d id				386,SM
+SUB		reg_rax,sbytedword		mi:	o64 83 /5 ib,s				X86_64,LONG,SM,ND
+SUB		reg_rax,imm			-i:	o64 2d id,s				X86_64,LONG,SM
+SUB		rm8,imm				mi:	hle 80 /5 ib				8086,SM,LOCK
+SUB		rm16,sbyteword			mi:	hle o16 83 /5 ib,s			8086,SM,LOCK,ND
+SUB		rm16,imm			mi:	hle o16 81 /5 iw			8086,SM,LOCK
+SUB		rm32,sbytedword			mi:	hle o32 83 /5 ib,s			386,SM,LOCK,ND
+SUB		rm32,imm			mi:	hle o32 81 /5 id			386,SM,LOCK
+SUB		rm64,sbytedword			mi:	hle o64 83 /5 ib,s			X86_64,LONG,SM,LOCK,ND
+SUB		rm64,imm			mi:	hle o64 81 /5 id,s			X86_64,LONG,SM,LOCK
+SUB		mem,imm8			mi:	hle 80 /5 ib				8086,SM,LOCK
+SUB		mem,sbyteword16			mi:	hle o16 83 /5 ib,s			8086,SM,LOCK,ND
+SUB		mem,imm16			mi:	hle o16 81 /5 iw			8086,SM,LOCK
+SUB		mem,sbytedword32		mi:	hle o32 83 /5 ib,s			386,SM,LOCK,ND
+SUB		mem,imm32			mi:	hle o32 81 /5 id			386,SM,LOCK
+SUB		rm8,imm				mi:	hle 82 /5 ib				8086,SM,LOCK,ND,NOLONG
+SVDC		mem80,reg_sreg			mr:	0f 78 /r				486,CYRIX,SMM
+SVLDT		mem80				m:	0f 7a /0				486,CYRIX,SMM,ND
+SVTS		mem80				m:	0f 7c /0				486,CYRIX,SMM
+SWAPGS		void					0f 01 f8				X86_64,LONG
+SYSCALL		void					0f 05					P6,AMD
+SYSENTER	void					0f 34					P6
+SYSEXIT		void					0f 35					P6,PRIV
+SYSRET		void					0f 07					P6,PRIV,AMD
+TEST		mem,reg8			mr:	84 /r					8086,SM
+TEST		reg8,reg8			mr:	84 /r					8086
+TEST		mem,reg16			mr:	o16 85 /r				8086,SM
+TEST		reg16,reg16			mr:	o16 85 /r				8086
+TEST		mem,reg32			mr:	o32 85 /r				386,SM
+TEST		reg32,reg32			mr:	o32 85 /r				386
+TEST		mem,reg64			mr:	o64 85 /r				X86_64,LONG,SM
+TEST		reg64,reg64			mr:	o64 85 /r				X86_64,LONG
+TEST		reg8,mem			rm:	84 /r					8086,SM
+TEST		reg16,mem			rm:	o16 85 /r				8086,SM
+TEST		reg32,mem			rm:	o32 85 /r				386,SM
+TEST		reg64,mem			rm:	o64 85 /r				X86_64,LONG,SM
+TEST		reg_al,imm			-i:	a8 ib					8086,SM
+TEST		reg_ax,imm			-i:	o16 a9 iw				8086,SM
+TEST		reg_eax,imm			-i:	o32 a9 id				386,SM
+TEST		reg_rax,imm			-i:	o64 a9 id,s				X86_64,LONG,SM
+TEST		rm8,imm				mi:	f6 /0 ib				8086,SM
+TEST		rm16,imm			mi:	o16 f7 /0 iw				8086,SM
+TEST		rm32,imm			mi:	o32 f7 /0 id				386,SM
+TEST		rm64,imm			mi:	o64 f7 /0 id,s				X86_64,LONG,SM
+TEST		mem,imm8			mi:	f6 /0 ib				8086,SM
+TEST		mem,imm16			mi:	o16 f7 /0 iw				8086,SM
+TEST		mem,imm32			mi:	o32 f7 /0 id				386,SM
+UD0		void					0f ff					186,OBSOLETE
+UD0		reg16,rm16			rm:	o16 0f ff /r				186
+UD0		reg32,rm32			rm:	o32 0f ff /r				186
+UD0		reg64,rm64			rm:	o64 0f ff /r				186
+UD1		reg16,rm16			rm:	o16 0f b9 /r				186
+UD1		reg32,rm32			rm:	o32 0f b9 /r				186
+UD1		reg64,rm64			rm:	o64 0f b9 /r				186
+UD1		void					0f b9					186,ND
+UD2B		void					0f b9					186,ND
+UD2B		reg16,rm16			rm:	o16 0f b9 /r				186,ND
+UD2B		reg32,rm32			rm:	o32 0f b9 /r				186,ND
+UD2B		reg64,rm64			rm:	o64 0f b9 /r				186,ND
+UD2		void					0f 0b					186
+UD2A		void					0f 0b					186,ND
+UMOV		mem,reg8			mr:	np 0f 10 /r				386,UNDOC,SM,ND
+UMOV		reg8,reg8			mr:	np 0f 10 /r				386,UNDOC,ND
+UMOV		mem,reg16			mr:	np o16 0f 11 /r			386,UNDOC,SM,ND
+UMOV		reg16,reg16			mr:	np o16 0f 11 /r			386,UNDOC,ND
+UMOV		mem,reg32			mr:	np o32 0f 11 /r			386,UNDOC,SM,ND
+UMOV		reg32,reg32			mr:	np o32 0f 11 /r			386,UNDOC,ND
+UMOV		reg8,mem			rm:	np 0f 12 /r				386,UNDOC,SM,ND
+UMOV		reg8,reg8			rm:	np 0f 12 /r				386,UNDOC,ND
+UMOV		reg16,mem			rm:	np o16 0f 13 /r			386,UNDOC,SM,ND
+UMOV		reg16,reg16			rm:	np o16 0f 13 /r			386,UNDOC,ND
+UMOV		reg32,mem			rm:	np o32 0f 13 /r			386,UNDOC,SM,ND
+UMOV		reg32,reg32			rm:	np o32 0f 13 /r			386,UNDOC,ND
+VERR		mem				m:	0f 00 /4				286,PROT
+VERR		mem16				m:	0f 00 /4				286,PROT
+VERR		reg16				m:	0f 00 /4				286,PROT
+VERW		mem				m:	0f 00 /5				286,PROT
+VERW		mem16				m:	0f 00 /5				286,PROT
+VERW		reg16				m:	0f 00 /5				286,PROT
+FWAIT		void					wait					8086
+WBINVD		void					0f 09					486,PRIV
+WRSHR		rm32				m:	o32 0f 37 /0				P6,CYRIX,SMM
+WRMSR		void					0f 30					PENT,PRIV
+XADD		mem,reg8			mr:	hle 0f c0 /r				486,SM,LOCK
+XADD		reg8,reg8			mr:	0f c0 /r				486
+XADD		mem,reg16			mr:	hle o16 0f c1 /r			486,SM,LOCK
+XADD		reg16,reg16			mr:	o16 0f c1 /r				486
+XADD		mem,reg32			mr:	hle o32 0f c1 /r			486,SM,LOCK
+XADD		reg32,reg32			mr:	o32 0f c1 /r				486
+XADD		mem,reg64			mr:	hle o64 0f c1 /r			X86_64,LONG,SM,LOCK
+XADD		reg64,reg64			mr:	o64 0f c1 /r				X86_64,LONG
+XBTS		reg16,mem			rm:	o16 0f a6 /r				386,SW,UNDOC,ND
+XBTS		reg16,reg16			rm:	o16 0f a6 /r				386,UNDOC,ND
+XBTS		reg32,mem			rm:	o32 0f a6 /r				386,SD,UNDOC,ND
+XBTS		reg32,reg32			rm:	o32 0f a6 /r				386,UNDOC,ND
+XCHG		reg_ax,reg16			-r:	o16 90+r				8086
+XCHG		reg_eax,reg32na			-r:	o32 90+r				386
+XCHG		reg_rax,reg64			-r:	o64 90+r				X86_64,LONG
+XCHG		reg16,reg_ax			r-:	o16 90+r				8086
+XCHG		reg32na,reg_eax			r-:	o32 90+r				386
+XCHG		reg64,reg_rax			r-:	o64 90+r				X86_64,LONG
+; This must be NOLONG since opcode 90 is NOP, and in 64-bit mode
+; "xchg eax,eax" is *not* a NOP.
+XCHG		reg_eax,reg_eax			--:	o32 90					386,NOLONG
+XCHG		reg8,reg8			mr:	86 /r					8086
+XCHG		reg16,reg16			mr:	o16 87 /r				8086
+XCHG		reg32,reg32			mr:	o32 87 /r				386
+XCHG		reg64,reg64			mr:	o64 87 /r				X86_64,LONG
+XCHG		mem,reg8			mr:	hlenl 86 /r				8086,SM,LOCK
+XCHG		mem,reg16			mr:	hlenl o16 87 /r			8086,SM,LOCK
+XCHG		mem,reg32			mr:	hlenl o32 87 /r			386,SM,LOCK
+XCHG		mem,reg64			mr:	hlenl o64 87 /r			X86_64,LONG,SM,LOCK
+XCHG		reg8,mem			rm:	hlenl 86 /r				8086,SM,LOCK1
+XCHG		reg16,mem			rm:	hlenl o16 87 /r			8086,SM,LOCK1
+XCHG		reg32,mem			rm:	hlenl o32 87 /r			386,SM,LOCK1
+XCHG		reg64,mem			rm:	hlenl o64 87 /r			X86_64,LONG,SM,LOCK1
+XLATB		void					d7					8086
+XLAT		void					d7					8086
+XOR		mem,reg8			mr:	hle 30 /r				8086,SM,LOCK
+XOR		reg8,reg8			mr:	30 /r					8086
+XOR		mem,reg16			mr:	hle o16 31 /r				8086,SM,LOCK
+XOR		reg16,reg16			mr:	o16 31 /r				8086
+XOR		mem,reg32			mr:	hle o32 31 /r				386,SM,LOCK
+XOR		reg32,reg32			mr:	o32 31 /r				386
+XOR		mem,reg64			mr:	hle o64 31 /r				X86_64,LONG,SM,LOCK
+XOR		reg64,reg64			mr:	o64 31 /r				X86_64,LONG
+XOR		reg8,mem			rm:	32 /r					8086,SM
+XOR		reg8,reg8			rm:	32 /r					8086
+XOR		reg16,mem			rm:	o16 33 /r				8086,SM
+XOR		reg16,reg16			rm:	o16 33 /r				8086
+XOR		reg32,mem			rm:	o32 33 /r				386,SM
+XOR		reg32,reg32			rm:	o32 33 /r				386
+XOR		reg64,mem			rm:	o64 33 /r				X86_64,LONG,SM
+XOR		reg64,reg64			rm:	o64 33 /r				X86_64,LONG
+XOR		rm16,imm8			mi:	hle o16 83 /6 ib,s			8086,LOCK
+XOR		rm32,imm8			mi:	hle o32 83 /6 ib,s			386,LOCK
+XOR		rm64,imm8			mi:	hle o64 83 /6 ib,s			X86_64,LONG,LOCK
+XOR		reg_al,imm			-i:	34 ib					8086,SM
+XOR		reg_ax,sbyteword		mi:	o16 83 /6 ib,s				8086,SM,ND
+XOR		reg_ax,imm			-i:	o16 35 iw				8086,SM
+XOR		reg_eax,sbytedword		mi:	o32 83 /6 ib,s				386,SM,ND
+XOR		reg_eax,imm			-i:	o32 35 id				386,SM
+XOR		reg_rax,sbytedword		mi:	o64 83 /6 ib,s				X86_64,LONG,SM,ND
+XOR		reg_rax,imm			-i:	o64 35 id,s				X86_64,LONG,SM
+XOR		rm8,imm				mi:	hle 80 /6 ib				8086,SM,LOCK
+XOR		rm16,sbyteword			mi:	hle o16 83 /6 ib,s			8086,SM,LOCK,ND
+XOR		rm16,imm			mi:	hle o16 81 /6 iw			8086,SM,LOCK
+XOR		rm32,sbytedword			mi:	hle o32 83 /6 ib,s			386,SM,LOCK,ND
+XOR		rm32,imm			mi:	hle o32 81 /6 id			386,SM,LOCK
+XOR		rm64,sbytedword			mi:	hle o64 83 /6 ib,s			X86_64,LONG,SM,LOCK,ND
+XOR		rm64,imm			mi:	hle o64 81 /6 id,s			X86_64,LONG,SM,LOCK
+XOR		mem,imm8			mi:	hle 80 /6 ib				8086,SM,LOCK
+XOR		mem,sbyteword16			mi:	hle o16 83 /6 ib,s			8086,SM,LOCK,ND
+XOR		mem,imm16			mi:	hle o16 81 /6 iw			8086,SM,LOCK
+XOR		mem,sbytedword32		mi:	hle o32 83 /6 ib,s			386,SM,LOCK,ND
+XOR		mem,imm32			mi:	hle o32 81 /6 id			386,SM,LOCK
+XOR		rm8,imm				mi:	hle 82 /6 ib				8086,SM,LOCK,ND,NOLONG
+CMOVcc		reg16,mem			rm:	o16 0f 40+c /r				P6,SM
+CMOVcc		reg16,reg16			rm:	o16 0f 40+c /r				P6
+CMOVcc		reg32,mem			rm:	o32 0f 40+c /r				P6,SM
+CMOVcc		reg32,reg32			rm:	o32 0f 40+c /r				P6
+CMOVcc		reg64,mem			rm:	o64 0f 40+c /r				X86_64,LONG,SM
+CMOVcc		reg64,reg64			rm:	o64 0f 40+c /r				X86_64,LONG
+Jcc		imm|near			i:	odf 0f 80+c rel			386,BND
+Jcc		imm16|near			i:	o16 0f 80+c rel			386,NOLONG,BND
+Jcc		imm32|near			i:	o32 0f 80+c rel			386,NOLONG,BND
+Jcc		imm64|near			i:	o64nw 0f 80+c rel			X86_64,LONG,BND
+Jcc		imm|short			i:	70+c rel8				8086,ND,BND
+Jcc		imm				i:	jcc8 70+c rel8				8086,ND,BND
+Jcc		imm				i:	0f 80+c rel				386,ND,BND
+Jcc		imm				i:	71+c jlen e9 rel			8086,ND,BND
+Jcc		imm				i:	70+c rel8				8086,BND
+
+SETcc		mem				m:	0f 90+c /0				386,SB
+SETcc		reg8				m:	0f 90+c /0				386
+
+;# Katmai Streaming SIMD instructions (SSE -- a.k.a. KNI, XMM, MMX2)
+ADDPS		xmmreg,xmmrm128			rm:	np 0f 58 /r				KATMAI,SSE
+ADDSS		xmmreg,xmmrm32			rm:	f3 0f 58 /r				KATMAI,SSE
+ANDNPS		xmmreg,xmmrm128			rm:	np 0f 55 /r				KATMAI,SSE
+ANDPS		xmmreg,xmmrm128			rm:	np 0f 54 /r				KATMAI,SSE
+CMPEQPS		xmmreg,xmmrm128			rm:	np 0f c2 /r 00				KATMAI,SSE
+CMPEQSS		xmmreg,xmmrm32			rm:	f3 0f c2 /r 00				KATMAI,SSE
+CMPLEPS		xmmreg,xmmrm128			rm:	np 0f c2 /r 02				KATMAI,SSE
+CMPLESS		xmmreg,xmmrm32			rm:	f3 0f c2 /r 02				KATMAI,SSE
+CMPLTPS		xmmreg,xmmrm128			rm:	np 0f c2 /r 01				KATMAI,SSE
+CMPLTSS		xmmreg,xmmrm32			rm:	f3 0f c2 /r 01				KATMAI,SSE
+CMPNEQPS	xmmreg,xmmrm128			rm:	np 0f c2 /r 04				KATMAI,SSE
+CMPNEQSS	xmmreg,xmmrm32			rm:	f3 0f c2 /r 04				KATMAI,SSE
+CMPNLEPS	xmmreg,xmmrm128			rm:	np 0f c2 /r 06				KATMAI,SSE
+CMPNLESS	xmmreg,xmmrm32			rm:	f3 0f c2 /r 06				KATMAI,SSE
+CMPNLTPS	xmmreg,xmmrm128			rm:	np 0f c2 /r 05				KATMAI,SSE
+CMPNLTSS	xmmreg,xmmrm32			rm:	f3 0f c2 /r 05				KATMAI,SSE
+CMPORDPS	xmmreg,xmmrm128			rm:	np 0f c2 /r 07				KATMAI,SSE
+CMPORDSS	xmmreg,xmmrm32			rm:	f3 0f c2 /r 07				KATMAI,SSE
+CMPUNORDPS	xmmreg,xmmrm128			rm:	np 0f c2 /r 03				KATMAI,SSE
+CMPUNORDSS	xmmreg,xmmrm32			rm:	f3 0f c2 /r 03				KATMAI,SSE
+; CMPPS/CMPSS must come after the specific ops; that way the disassembler will find the
+; specific ops first and only disassemble illegal ones as cmpps/cmpss.
+CMPPS		xmmreg,xmmrm128,imm8		rmi:	np 0f c2 /r ib,u			KATMAI,SSE
+CMPSS		xmmreg,xmmrm32,imm8		rmi:	f3 0f c2 /r ib,u			KATMAI,SSE
+COMISS		xmmreg,xmmrm32			rm:	np 0f 2f /r				KATMAI,SSE
+CVTPI2PS	xmmreg,mmxrm64			rm:	np 0f 2a /r				KATMAI,SSE,MMX
+CVTPS2PI	mmxreg,xmmrm64			rm:	np 0f 2d /r				KATMAI,SSE,MMX
+CVTSI2SS	xmmreg,mem			rm:	f3 0f 2a /r				KATMAI,SSE,SD,AR1,ND
+CVTSI2SS	xmmreg,rm32			rm:	f3 0f 2a /r				KATMAI,SSE,SD,AR1
+CVTSI2SS	xmmreg,rm64			rm:	o64 f3 0f 2a /r			X86_64,LONG,SSE,SQ,AR1
+CVTSS2SI	reg32,xmmreg			rm:	f3 0f 2d /r				KATMAI,SSE,SD,AR1
+CVTSS2SI	reg32,mem			rm:	f3 0f 2d /r				KATMAI,SSE,SD,AR1
+CVTSS2SI	reg64,xmmreg			rm:	o64 f3 0f 2d /r			X86_64,LONG,SSE,SD,AR1
+CVTSS2SI	reg64,mem			rm:	o64 f3 0f 2d /r			X86_64,LONG,SSE,SD,AR1
+CVTTPS2PI	mmxreg,xmmrm			rm:	np 0f 2c /r				KATMAI,SSE,MMX,SQ
+CVTTSS2SI	reg32,xmmrm			rm:	f3 0f 2c /r				KATMAI,SSE,SD,AR1
+CVTTSS2SI	reg64,xmmrm			rm:	o64 f3 0f 2c /r			X86_64,LONG,SSE,SD,AR1
+DIVPS		xmmreg,xmmrm128			rm:	np 0f 5e /r				KATMAI,SSE
+DIVSS		xmmreg,xmmrm32			rm:	f3 0f 5e /r				KATMAI,SSE
+LDMXCSR		mem32				m:	np 0f ae /2				KATMAI,SSE
+MAXPS		xmmreg,xmmrm128			rm:	np 0f 5f /r				KATMAI,SSE
+MAXSS		xmmreg,xmmrm32			rm:	f3 0f 5f /r				KATMAI,SSE
+MINPS		xmmreg,xmmrm128			rm:	np 0f 5d /r				KATMAI,SSE
+MINSS		xmmreg,xmmrm32			rm:	f3 0f 5d /r				KATMAI,SSE
+MOVAPS		xmmreg,xmmrm128			rm:	np 0f 28 /r				KATMAI,SSE
+MOVAPS		xmmrm128,xmmreg			mr:	np 0f 29 /r				KATMAI,SSE
+MOVHPS		xmmreg,mem64			rm:	np 0f 16 /r				KATMAI,SSE
+MOVHPS		mem64,xmmreg			mr:	np 0f 17 /r				KATMAI,SSE
+MOVLHPS		xmmreg,xmmreg			rm:	np 0f 16 /r				KATMAI,SSE
+MOVLPS		xmmreg,mem64			rm:	np 0f 12 /r				KATMAI,SSE
+MOVLPS		mem64,xmmreg			mr:	np 0f 13 /r				KATMAI,SSE
+MOVHLPS		xmmreg,xmmreg			rm:	np 0f 12 /r				KATMAI,SSE
+MOVMSKPS	reg32,xmmreg			rm:	np 0f 50 /r				KATMAI,SSE
+MOVMSKPS	reg64,xmmreg			rm:	np o64 0f 50 /r			X86_64,LONG,SSE
+MOVNTPS		mem128,xmmreg			mr:	np 0f 2b /r				KATMAI,SSE
+MOVSS		xmmreg,xmmrm32			rm:	f3 0f 10 /r				KATMAI,SSE
+MOVSS		xmmrm32,xmmreg			mr:	f3 0f 11 /r				KATMAI,SSE
+MOVUPS		xmmreg,xmmrm128			rm:	np 0f 10 /r				KATMAI,SSE
+MOVUPS		xmmrm128,xmmreg			mr:	np 0f 11 /r				KATMAI,SSE
+MULPS		xmmreg,xmmrm128			rm:	np 0f 59 /r				KATMAI,SSE
+MULSS		xmmreg,xmmrm32			rm:	f3 0f 59 /r				KATMAI,SSE
+ORPS		xmmreg,xmmrm128			rm:	np 0f 56 /r				KATMAI,SSE
+RCPPS		xmmreg,xmmrm128			rm:	np 0f 53 /r				KATMAI,SSE
+RCPSS		xmmreg,xmmrm32			rm:	f3 0f 53 /r				KATMAI,SSE
+RSQRTPS		xmmreg,xmmrm128			rm:	np 0f 52 /r				KATMAI,SSE
+RSQRTSS		xmmreg,xmmrm32			rm:	f3 0f 52 /r				KATMAI,SSE
+SHUFPS		xmmreg,xmmrm128,imm8		rmi:	np 0f c6 /r ib,u			KATMAI,SSE
+SQRTPS		xmmreg,xmmrm128			rm:	np 0f 51 /r				KATMAI,SSE
+SQRTSS		xmmreg,xmmrm32			rm:	f3 0f 51 /r				KATMAI,SSE
+STMXCSR		mem32				m:	np 0f ae /3				KATMAI,SSE
+SUBPS		xmmreg,xmmrm128			rm:	np 0f 5c /r				KATMAI,SSE
+SUBSS		xmmreg,xmmrm32			rm:	f3 0f 5c /r				KATMAI,SSE
+UCOMISS		xmmreg,xmmrm32			rm:	np 0f 2e /r				KATMAI,SSE
+UNPCKHPS	xmmreg,xmmrm128			rm:	np 0f 15 /r				KATMAI,SSE
+UNPCKLPS	xmmreg,xmmrm128			rm:	np 0f 14 /r				KATMAI,SSE
+XORPS		xmmreg,xmmrm128			rm:	np 0f 57 /r				KATMAI,SSE
+
+;# Introduced in Deschutes but necessary for SSE support
+FXRSTOR		mem				m:	np 0f ae /1				P6,SSE,FPU
+FXRSTOR64	mem				m:	o64 np 0f ae /1			X86_64,LONG,SSE,FPU
+FXSAVE		mem				m:	np 0f ae /0				P6,SSE,FPU
+FXSAVE64	mem				m:	o64 np 0f ae /0			X86_64,LONG,SSE,FPU
+
+;# XSAVE group (AVX and extended state)
+; Introduced in late Penryn ... we really need to clean up the handling
+; of CPU feature bits.
+XGETBV		void					0f 01 d0				NEHALEM
+XSETBV		void					0f 01 d1				NEHALEM,PRIV
+XSAVE		mem				m:	np 0f ae /4				NEHALEM
+XSAVE64		mem				m:	o64 np 0f ae /4			LONG,NEHALEM
+XSAVEC		mem				m:	np 0f c7 /4				FUTURE
+XSAVEC64	mem				m:	o64 np 0f c7 /4			LONG,FUTURE
+XSAVEOPT	mem				m:	np 0f ae /6				FUTURE
+XSAVEOPT64	mem				m:	o64 np 0f ae /6			LONG,FUTURE
+XSAVES		mem				m:	np 0f c7 /5				FUTURE
+XSAVES64	mem				m:	o64 np 0f c7 /5			LONG,FUTURE
+XRSTOR		mem				m:	np 0f ae /5				NEHALEM
+XRSTOR64	mem				m:	o64 np 0f ae /5			LONG,NEHALEM
+XRSTORS		mem				m:	np 0f c7 /3				FUTURE
+XRSTORS64	mem				m:	o64 np 0f c7 /3			LONG,FUTURE
+
+; These instructions are not SSE-specific; they are
+;# Generic memory operations
+; and work even if CR4.OSFXFR == 0
+PREFETCHNTA	mem8				m:	0f 18 /0				KATMAI,SB
+PREFETCHT0	mem8				m:	0f 18 /1				KATMAI,SB
+PREFETCHT1	mem8				m:	0f 18 /2				KATMAI,SB
+PREFETCHT2	mem8				m:	0f 18 /3				KATMAI,SB
+PREFETCHIT0	mem8				m:	0f 18 /7				FUTURE,PREFETCHI,SB
+PREFETCHIT1	mem8				m:	0f 18 /6				FUTURE,PREFETCHI,SB
+SFENCE		void					np 0f ae f8				KATMAI
+
+;# New MMX instructions introduced in Katmai
+MASKMOVQ	mmxreg,mmxreg			rm:	np 0f f7 /r				KATMAI,MMX
+MOVNTQ		mem,mmxreg			mr:	np 0f e7 /r				KATMAI,MMX,SQ
+PAVGB		mmxreg,mmxrm			rm:	np o64nw 0f e0 /r			KATMAI,MMX,SQ
+PAVGW		mmxreg,mmxrm			rm:	np o64nw 0f e3 /r			KATMAI,MMX,SQ
+PEXTRW		reg32,mmxreg,imm		rmi:	np 0f c5 /r ib,u			KATMAI,MMX,SB,AR2
+; PINSRW is documented as using a reg32, but it's really using only 16 bit
+; -- accept either, but be truthful in disassembly
+PINSRW		mmxreg,mem,imm			rmi:	np 0f c4 /r ib,u			KATMAI,MMX,SB,AR2
+PINSRW		mmxreg,rm16,imm			rmi:	np 0f c4 /r ib,u			KATMAI,MMX,SB,AR2
+PINSRW		mmxreg,reg32,imm		rmi:	np 0f c4 /r ib,u			KATMAI,MMX,SB,AR2
+PMAXSW		mmxreg,mmxrm			rm:	np o64nw 0f ee /r			KATMAI,MMX,SQ
+PMAXUB		mmxreg,mmxrm			rm:	np o64nw 0f de /r			KATMAI,MMX,SQ
+PMINSW		mmxreg,mmxrm			rm:	np o64nw 0f ea /r			KATMAI,MMX,SQ
+PMINUB		mmxreg,mmxrm			rm:	np o64nw 0f da /r			KATMAI,MMX,SQ
+PMOVMSKB	reg32,mmxreg			rm:	np 0f d7 /r				KATMAI,MMX
+PMULHUW		mmxreg,mmxrm			rm:	np o64nw 0f e4 /r			KATMAI,MMX,SQ
+PSADBW		mmxreg,mmxrm			rm:	np o64nw 0f f6 /r			KATMAI,MMX,SQ
+PSHUFW		mmxreg,mmxrm,imm		rmi:	np o64nw 0f 70 /r ib			KATMAI,MMX,SM2,SB,AR2
+
+;# AMD Enhanced 3DNow! (Athlon) instructions
+PF2IW		mmxreg,mmxrm			rm:	o64nw 0f 0f /r 1c			PENT,3DNOW,SQ
+PFNACC		mmxreg,mmxrm			rm:	o64nw 0f 0f /r 8a			PENT,3DNOW,SQ
+PFPNACC		mmxreg,mmxrm			rm:	o64nw 0f 0f /r 8e			PENT,3DNOW,SQ
+PI2FW		mmxreg,mmxrm			rm:	o64nw 0f 0f /r 0c			PENT,3DNOW,SQ
+PSWAPD		mmxreg,mmxrm			rm:	o64nw 0f 0f /r bb			PENT,3DNOW,SQ
+
+;# Willamette SSE2 Cacheability Instructions
+MASKMOVDQU	xmmreg,xmmreg			rm:	66 0f f7 /r				WILLAMETTE,SSE2
+; CLFLUSH needs its own feature flag implemented one day
+CLFLUSH		mem				m:	np 0f ae /7				WILLAMETTE,SSE2
+MOVNTDQ		mem,xmmreg			mr:	66 0f e7 /r				WILLAMETTE,SSE2,SO
+MOVNTI		mem,reg32			mr:	np 0f c3 /r				WILLAMETTE,SD
+MOVNTI		mem,reg64			mr:	o64 np 0f c3 /r			X86_64,LONG,SQ
+MOVNTPD		mem,xmmreg			mr:	66 0f 2b /r				WILLAMETTE,SSE2,SO
+LFENCE		void					np 0f ae e8				WILLAMETTE,SSE2
+MFENCE		void					np 0f ae f0				WILLAMETTE,SSE2
+
+;# Willamette MMX instructions (SSE2 SIMD Integer Instructions)
+MOVD		mem,xmmreg			mr:	66 norexw 0f 7e /r			WILLAMETTE,SSE2,SD
+MOVD		xmmreg,mem			rm:	66 norexw 0f 6e /r			WILLAMETTE,SSE2,SD
+MOVD		xmmreg,rm32			rm:	66 norexw 0f 6e /r			WILLAMETTE,SSE2
+MOVD		rm32,xmmreg			mr:	66 norexw 0f 7e /r			WILLAMETTE,SSE2
+MOVDQA		xmmreg,xmmrm128			rm:	66 0f 6f /r				WILLAMETTE,SSE2,SO
+MOVDQA		xmmrm128,xmmreg			mr:	66 0f 7f /r				WILLAMETTE,SSE2,SO
+MOVDQU		xmmreg,xmmrm128			rm:	f3 0f 6f /r				WILLAMETTE,SSE2,SO
+MOVDQU		xmmrm128,xmmreg			mr:	f3 0f 7f /r				WILLAMETTE,SSE2,SO
+MOVDQ2Q		mmxreg,xmmreg			rm:	f2 0f d6 /r				WILLAMETTE,SSE2
+MOVQ		xmmreg,xmmreg			rm:	f3 0f 7e /r				WILLAMETTE,SSE2
+MOVQ		xmmreg,xmmreg			mr:	66 0f d6 /r				WILLAMETTE,SSE2
+MOVQ		mem,xmmreg			mr:	66 0f d6 /r				WILLAMETTE,SSE2,SQ
+MOVQ		xmmreg,mem			rm:	f3 0f 7e /r				WILLAMETTE,SSE2,SQ
+MOVQ		xmmreg,rm64			rm:	66 o64 0f 6e /r			X86_64,LONG,SSE2
+MOVQ		rm64,xmmreg			mr:	66 o64 0f 7e /r			X86_64,LONG,SSE2
+MOVQ2DQ		xmmreg,mmxreg			rm:	f3 0f d6 /r				WILLAMETTE,SSE2
+PACKSSWB	xmmreg,xmmrm			rm:	66 0f 63 /r				WILLAMETTE,SSE2,SO
+PACKSSDW	xmmreg,xmmrm			rm:	66 0f 6b /r				WILLAMETTE,SSE2,SO
+PACKUSWB	xmmreg,xmmrm			rm:	66 0f 67 /r				WILLAMETTE,SSE2,SO
+PADDB		xmmreg,xmmrm			rm:	66 0f fc /r				WILLAMETTE,SSE2,SO
+PADDW		xmmreg,xmmrm			rm:	66 0f fd /r				WILLAMETTE,SSE2,SO
+PADDD		xmmreg,xmmrm			rm:	66 0f fe /r				WILLAMETTE,SSE2,SO
+PADDQ		mmxreg,mmxrm			rm:	np 0f d4 /r				WILLAMETTE,MMX,SQ
+PADDQ		xmmreg,xmmrm			rm:	66 0f d4 /r				WILLAMETTE,SSE2,SO
+PADDSB		xmmreg,xmmrm			rm:	66 0f ec /r				WILLAMETTE,SSE2,SO
+PADDSW		xmmreg,xmmrm			rm:	66 0f ed /r				WILLAMETTE,SSE2,SO
+PADDUSB		xmmreg,xmmrm			rm:	66 0f dc /r				WILLAMETTE,SSE2,SO
+PADDUSW		xmmreg,xmmrm			rm:	66 0f dd /r				WILLAMETTE,SSE2,SO
+PAND		xmmreg,xmmrm			rm:	66 0f db /r				WILLAMETTE,SSE2,SO
+PANDN		xmmreg,xmmrm			rm:	66 0f df /r				WILLAMETTE,SSE2,SO
+PAVGB		xmmreg,xmmrm			rm:	66 0f e0 /r				WILLAMETTE,SSE2,SO
+PAVGW		xmmreg,xmmrm			rm:	66 0f e3 /r				WILLAMETTE,SSE2,SO
+PCMPEQB		xmmreg,xmmrm			rm:	66 0f 74 /r				WILLAMETTE,SSE2,SO
+PCMPEQW		xmmreg,xmmrm			rm:	66 0f 75 /r				WILLAMETTE,SSE2,SO
+PCMPEQD		xmmreg,xmmrm			rm:	66 0f 76 /r				WILLAMETTE,SSE2,SO
+PCMPGTB		xmmreg,xmmrm			rm:	66 0f 64 /r				WILLAMETTE,SSE2,SO
+PCMPGTW		xmmreg,xmmrm			rm:	66 0f 65 /r				WILLAMETTE,SSE2,SO
+PCMPGTD		xmmreg,xmmrm			rm:	66 0f 66 /r				WILLAMETTE,SSE2,SO
+PEXTRW		reg32,xmmreg,imm		rmi:	66 0f c5 /r ib,u			WILLAMETTE,SSE2,SB,AR2
+PEXTRW		reg64,xmmreg,imm		rmi:	66 0f c5 /r ib,u			X86_64,LONG,SSE2,SB,AR2,ND
+PINSRW		xmmreg,reg16,imm		rmi:	66 0f c4 /r ib,u			WILLAMETTE,SSE2,SB,AR2
+PINSRW		xmmreg,reg32,imm		rmi:	66 0f c4 /r ib,u			WILLAMETTE,SSE2,SB,AR2,ND
+PINSRW		xmmreg,reg64,imm		rmi:	66 0f c4 /r ib,u			X86_64,LONG,SSE2,SB,AR2,ND
+PINSRW		xmmreg,mem,imm			rmi:	66 0f c4 /r ib,u			WILLAMETTE,SSE2,SB,AR2
+PINSRW		xmmreg,mem16,imm		rmi:	66 0f c4 /r ib,u			WILLAMETTE,SSE2,SB,AR2
+PMADDWD		xmmreg,xmmrm			rm:	66 0f f5 /r				WILLAMETTE,SSE2,SO
+PMAXSW		xmmreg,xmmrm			rm:	66 0f ee /r				WILLAMETTE,SSE2,SO
+PMAXUB		xmmreg,xmmrm			rm:	66 0f de /r				WILLAMETTE,SSE2,SO
+PMINSW		xmmreg,xmmrm			rm:	66 0f ea /r				WILLAMETTE,SSE2,SO
+PMINUB		xmmreg,xmmrm			rm:	66 0f da /r				WILLAMETTE,SSE2,SO
+PMOVMSKB	reg32,xmmreg			rm:	66 0f d7 /r				WILLAMETTE,SSE2
+PMULHUW		xmmreg,xmmrm			rm:	66 0f e4 /r				WILLAMETTE,SSE2,SO
+PMULHW		xmmreg,xmmrm			rm:	66 0f e5 /r				WILLAMETTE,SSE2,SO
+PMULLW		xmmreg,xmmrm			rm:	66 0f d5 /r				WILLAMETTE,SSE2,SO
+PMULUDQ		mmxreg,mmxrm			rm:	np o64nw 0f f4 /r			WILLAMETTE,SSE2,SO
+PMULUDQ		xmmreg,xmmrm			rm:	66 0f f4 /r				WILLAMETTE,SSE2,SO
+POR		xmmreg,xmmrm			rm:	66 0f eb /r				WILLAMETTE,SSE2,SO
+PSADBW		xmmreg,xmmrm			rm:	66 0f f6 /r				WILLAMETTE,SSE2,SO
+PSHUFD		xmmreg,xmmreg,imm		rmi:	66 0f 70 /r ib				WILLAMETTE,SSE2,SB,AR2
+PSHUFD		xmmreg,mem,imm			rmi:	66 0f 70 /r ib				WILLAMETTE,SSE2,SM2,SB,AR2
+PSHUFHW		xmmreg,xmmreg,imm		rmi:	f3 0f 70 /r ib				WILLAMETTE,SSE2,SB,AR2
+PSHUFHW		xmmreg,mem,imm			rmi:	f3 0f 70 /r ib				WILLAMETTE,SSE2,SM2,SB,AR2
+PSHUFLW		xmmreg,xmmreg,imm		rmi:	f2 0f 70 /r ib				WILLAMETTE,SSE2,SB,AR2
+PSHUFLW		xmmreg,mem,imm			rmi:	f2 0f 70 /r ib				WILLAMETTE,SSE2,SM2,SB,AR2
+PSLLDQ		xmmreg,imm			mi:	66 0f 73 /7 ib,u			WILLAMETTE,SSE2,SB,AR1
+PSLLW		xmmreg,xmmrm			rm:	66 0f f1 /r				WILLAMETTE,SSE2,SO
+PSLLW		xmmreg,imm			mi:	66 0f 71 /6 ib,u			WILLAMETTE,SSE2,SB,AR1
+PSLLD		xmmreg,xmmrm			rm:	66 0f f2 /r				WILLAMETTE,SSE2,SO
+PSLLD		xmmreg,imm			mi:	66 0f 72 /6 ib,u			WILLAMETTE,SSE2,SB,AR1
+PSLLQ		xmmreg,xmmrm			rm:	66 0f f3 /r				WILLAMETTE,SSE2,SO
+PSLLQ		xmmreg,imm			mi:	66 0f 73 /6 ib,u			WILLAMETTE,SSE2,SB,AR1
+PSRAW		xmmreg,xmmrm			rm:	66 0f e1 /r				WILLAMETTE,SSE2,SO
+PSRAW		xmmreg,imm			mi:	66 0f 71 /4 ib,u			WILLAMETTE,SSE2,SB,AR1
+PSRAD		xmmreg,xmmrm			rm:	66 0f e2 /r				WILLAMETTE,SSE2,SO
+PSRAD		xmmreg,imm			mi:	66 0f 72 /4 ib,u			WILLAMETTE,SSE2,SB,AR1
+PSRLDQ		xmmreg,imm			mi:	66 0f 73 /3 ib,u			WILLAMETTE,SSE2,SB,AR1
+PSRLW		xmmreg,xmmrm			rm:	66 0f d1 /r				WILLAMETTE,SSE2,SO
+PSRLW		xmmreg,imm			mi:	66 0f 71 /2 ib,u			WILLAMETTE,SSE2,SB,AR1
+PSRLD		xmmreg,xmmrm			rm:	66 0f d2 /r				WILLAMETTE,SSE2,SO
+PSRLD		xmmreg,imm			mi:	66 0f 72 /2 ib,u			WILLAMETTE,SSE2,SB,AR1
+PSRLQ		xmmreg,xmmrm			rm:	66 0f d3 /r				WILLAMETTE,SSE2,SO
+PSRLQ		xmmreg,imm			mi:	66 0f 73 /2 ib,u			WILLAMETTE,SSE2,SB,AR1
+PSUBB		xmmreg,xmmrm			rm:	66 0f f8 /r				WILLAMETTE,SSE2,SO
+PSUBW		xmmreg,xmmrm			rm:	66 0f f9 /r				WILLAMETTE,SSE2,SO
+PSUBD		xmmreg,xmmrm			rm:	66 0f fa /r				WILLAMETTE,SSE2,SO
+PSUBQ		mmxreg,mmxrm			rm:	np o64nw 0f fb /r			WILLAMETTE,SSE2,SO
+PSUBQ		xmmreg,xmmrm			rm:	66 0f fb /r				WILLAMETTE,SSE2,SO
+PSUBSB		xmmreg,xmmrm			rm:	66 0f e8 /r				WILLAMETTE,SSE2,SO
+PSUBSW		xmmreg,xmmrm			rm:	66 0f e9 /r				WILLAMETTE,SSE2,SO
+PSUBUSB		xmmreg,xmmrm			rm:	66 0f d8 /r				WILLAMETTE,SSE2,SO
+PSUBUSW		xmmreg,xmmrm			rm:	66 0f d9 /r				WILLAMETTE,SSE2,SO
+PUNPCKHBW	xmmreg,xmmrm			rm:	66 0f 68 /r				WILLAMETTE,SSE2,SO
+PUNPCKHWD	xmmreg,xmmrm			rm:	66 0f 69 /r				WILLAMETTE,SSE2,SO
+PUNPCKHDQ	xmmreg,xmmrm			rm:	66 0f 6a /r				WILLAMETTE,SSE2,SO
+PUNPCKHQDQ	xmmreg,xmmrm			rm:	66 0f 6d /r				WILLAMETTE,SSE2,SO
+PUNPCKLBW	xmmreg,xmmrm			rm:	66 0f 60 /r				WILLAMETTE,SSE2,SO
+PUNPCKLWD	xmmreg,xmmrm			rm:	66 0f 61 /r				WILLAMETTE,SSE2,SO
+PUNPCKLDQ	xmmreg,xmmrm			rm:	66 0f 62 /r				WILLAMETTE,SSE2,SO
+PUNPCKLQDQ	xmmreg,xmmrm			rm:	66 0f 6c /r				WILLAMETTE,SSE2,SO
+PXOR		xmmreg,xmmrm			rm:	66 0f ef /r				WILLAMETTE,SSE2,SO
+
+;# Willamette Streaming SIMD instructions (SSE2)
+ADDPD		xmmreg,xmmrm			rm:	66 0f 58 /r				WILLAMETTE,SSE2,SO
+ADDSD		xmmreg,xmmrm			rm:	f2 0f 58 /r				WILLAMETTE,SSE2,SQ
+ANDNPD		xmmreg,xmmrm			rm:	66 0f 55 /r				WILLAMETTE,SSE2,SO
+ANDPD		xmmreg,xmmrm			rm:	66 0f 54 /r				WILLAMETTE,SSE2,SO
+CMPEQPD		xmmreg,xmmrm			rm:	66 0f c2 /r 00				WILLAMETTE,SSE2,SO
+CMPEQSD		xmmreg,xmmrm			rm:	f2 0f c2 /r 00				WILLAMETTE,SSE2,SQ
+CMPLEPD		xmmreg,xmmrm			rm:	66 0f c2 /r 02				WILLAMETTE,SSE2,SO
+CMPLESD		xmmreg,xmmrm			rm:	f2 0f c2 /r 02				WILLAMETTE,SSE2,SQ
+CMPLTPD		xmmreg,xmmrm			rm:	66 0f c2 /r 01				WILLAMETTE,SSE2,SO
+CMPLTSD		xmmreg,xmmrm			rm:	f2 0f c2 /r 01				WILLAMETTE,SSE2,SQ
+CMPNEQPD	xmmreg,xmmrm			rm:	66 0f c2 /r 04				WILLAMETTE,SSE2,SO
+CMPNEQSD	xmmreg,xmmrm			rm:	f2 0f c2 /r 04				WILLAMETTE,SSE2,SQ
+CMPNLEPD	xmmreg,xmmrm			rm:	66 0f c2 /r 06				WILLAMETTE,SSE2,SO
+CMPNLESD	xmmreg,xmmrm			rm:	f2 0f c2 /r 06				WILLAMETTE,SSE2,SQ
+CMPNLTPD	xmmreg,xmmrm			rm:	66 0f c2 /r 05				WILLAMETTE,SSE2,SO
+CMPNLTSD	xmmreg,xmmrm			rm:	f2 0f c2 /r 05				WILLAMETTE,SSE2,SQ
+CMPORDPD	xmmreg,xmmrm			rm:	66 0f c2 /r 07				WILLAMETTE,SSE2,SO
+CMPORDSD	xmmreg,xmmrm			rm:	f2 0f c2 /r 07				WILLAMETTE,SSE2,SQ
+CMPUNORDPD	xmmreg,xmmrm			rm:	66 0f c2 /r 03				WILLAMETTE,SSE2,SO
+CMPUNORDSD	xmmreg,xmmrm			rm:	f2 0f c2 /r 03				WILLAMETTE,SSE2,SQ
+; CMPPD/CMPSD must come after the specific ops; that way the disassembler will find the
+; specific ops first and only disassemble illegal ones as cmppd/cmpsd.
+CMPPD		xmmreg,xmmrm128,imm8		rmi:	66 0f c2 /r ib,u			WILLAMETTE,SSE2
+CMPSD		xmmreg,xmmrm128,imm8		rmi:	f2 0f c2 /r ib,u			WILLAMETTE,SSE2
+COMISD		xmmreg,xmmrm64			rm:	66 0f 2f /r				WILLAMETTE,SSE2
+CVTDQ2PD	xmmreg,xmmrm			rm:	f3 0f e6 /r				WILLAMETTE,SSE2,SQ
+CVTDQ2PS	xmmreg,xmmrm			rm:	np 0f 5b /r				WILLAMETTE,SSE2,SO
+CVTPD2DQ	xmmreg,xmmrm			rm:	f2 0f e6 /r				WILLAMETTE,SSE2,SO
+CVTPD2PI	mmxreg,xmmrm			rm:	66 0f 2d /r				WILLAMETTE,SSE2,SO
+CVTPD2PS	xmmreg,xmmrm			rm:	66 0f 5a /r				WILLAMETTE,SSE2,SO
+CVTPI2PD	xmmreg,mmxrm			rm:	66 0f 2a /r				WILLAMETTE,SSE2,SQ
+CVTPS2DQ	xmmreg,xmmrm			rm:	66 0f 5b /r				WILLAMETTE,SSE2,SO
+CVTPS2PD	xmmreg,xmmrm			rm:	np 0f 5a /r				WILLAMETTE,SSE2,SQ
+CVTSD2SI	reg32,xmmreg			rm:	norexw f2 0f 2d /r			WILLAMETTE,SSE2,SQ,AR1
+CVTSD2SI	reg32,mem			rm:	norexw f2 0f 2d /r			WILLAMETTE,SSE2,SQ,AR1
+CVTSD2SI	reg64,xmmreg			rm:	o64 f2 0f 2d /r			X86_64,LONG,SSE2,SQ,AR1
+CVTSD2SI	reg64,mem			rm:	o64 f2 0f 2d /r			X86_64,LONG,SSE2,SQ,AR1
+CVTSD2SS	xmmreg,xmmrm			rm:	f2 0f 5a /r				WILLAMETTE,SSE2,SQ
+CVTSI2SD	xmmreg,mem			rm:	f2 0f 2a /r				WILLAMETTE,SSE2,SD,AR1,ND
+CVTSI2SD	xmmreg,rm32			rm:	norexw f2 0f 2a /r			WILLAMETTE,SSE2,SD,AR1
+CVTSI2SD	xmmreg,rm64			rm:	o64 f2 0f 2a /r			X86_64,LONG,SSE2,SQ,AR1
+CVTSS2SD	xmmreg,xmmrm			rm:	f3 0f 5a /r				WILLAMETTE,SSE2,SD
+CVTTPD2PI	mmxreg,xmmrm			rm:	66 0f 2c /r				WILLAMETTE,SSE2,SO
+CVTTPD2DQ	xmmreg,xmmrm			rm:	66 0f e6 /r				WILLAMETTE,SSE2,SO
+CVTTPS2DQ	xmmreg,xmmrm			rm:	f3 0f 5b /r				WILLAMETTE,SSE2,SO
+CVTTSD2SI	reg32,xmmreg			rm:	norexw f2 0f 2c /r			WILLAMETTE,SSE2,SQ,AR1
+CVTTSD2SI	reg32,mem			rm:	norexw f2 0f 2c /r			WILLAMETTE,SSE2,SQ,AR1
+CVTTSD2SI	reg64,xmmreg			rm:	o64 f2 0f 2c /r			X86_64,LONG,SSE2,SQ,AR1
+CVTTSD2SI	reg64,mem			rm:	o64 f2 0f 2c /r			X86_64,LONG,SSE2,SQ,AR1
+DIVPD		xmmreg,xmmrm			rm:	66 0f 5e /r				WILLAMETTE,SSE2,SO
+DIVSD		xmmreg,xmmrm			rm:	f2 0f 5e /r				WILLAMETTE,SSE2,SQ
+MAXPD		xmmreg,xmmrm			rm:	66 0f 5f /r				WILLAMETTE,SSE2,SO
+MAXSD		xmmreg,xmmrm			rm:	f2 0f 5f /r				WILLAMETTE,SSE2,SQ
+MINPD		xmmreg,xmmrm			rm:	66 0f 5d /r				WILLAMETTE,SSE2,SO
+MINSD		xmmreg,xmmrm			rm:	f2 0f 5d /r				WILLAMETTE,SSE2,SQ
+MOVAPD		xmmreg,xmmrm128			rm:	66 0f 28 /r				WILLAMETTE,SSE2
+MOVAPD		xmmrm128,xmmreg			mr:	66 0f 29 /r				WILLAMETTE,SSE2
+MOVHPD		mem64,xmmreg			mr:	66 0f 17 /r				WILLAMETTE,SSE2
+MOVHPD		xmmreg,mem64			rm:	66 0f 16 /r				WILLAMETTE,SSE2
+MOVLPD		mem64,xmmreg			mr:	66 0f 13 /r				WILLAMETTE,SSE2
+MOVLPD		xmmreg,mem64			rm:	66 0f 12 /r				WILLAMETTE,SSE2
+MOVMSKPD	reg32,xmmreg			rm:	66 0f 50 /r				WILLAMETTE,SSE2
+MOVMSKPD	reg64,xmmreg			rm:	66 o64 0f 50 /r			X86_64,LONG,SSE2
+MOVSD		xmmreg,xmmrm64			rm:	f2 0f 10 /r				WILLAMETTE,SSE2
+MOVSD		xmmrm64,xmmreg			mr:	f2 0f 11 /r				WILLAMETTE,SSE2
+MOVUPD		xmmreg,xmmrm128			rm:	66 0f 10 /r				WILLAMETTE,SSE2
+MOVUPD		xmmrm128,xmmreg			mr:	66 0f 11 /r				WILLAMETTE,SSE2
+MULPD		xmmreg,xmmrm128			rm:	66 0f 59 /r				WILLAMETTE,SSE2,SO
+MULSD		xmmreg,xmmrm64			rm:	f2 0f 59 /r				WILLAMETTE,SSE2,SQ
+ORPD		xmmreg,xmmrm128			rm:	66 0f 56 /r				WILLAMETTE,SSE2,SO
+SHUFPD		xmmreg,xmmrm128,imm8		rmi:	66 0f c6 /r ib,u			WILLAMETTE,SSE2
+SQRTPD		xmmreg,xmmrm128			rm:	66 0f 51 /r				WILLAMETTE,SSE2,SO
+SQRTSD		xmmreg,xmmrm64			rm:	f2 0f 51 /r				WILLAMETTE,SSE2
+SUBPD		xmmreg,xmmrm128			rm:	66 0f 5c /r				WILLAMETTE,SSE2,SO
+SUBSD		xmmreg,xmmrm64			rm:	f2 0f 5c /r				WILLAMETTE,SSE2
+UCOMISD		xmmreg,xmmrm64			rm:	66 0f 2e /r				WILLAMETTE,SSE2
+UNPCKHPD	xmmreg,xmmrm128			rm:	66 0f 15 /r				WILLAMETTE,SSE2
+UNPCKLPD	xmmreg,xmmrm128			rm:	66 0f 14 /r				WILLAMETTE,SSE2
+XORPD		xmmreg,xmmrm128			rm:	66 0f 57 /r				WILLAMETTE,SSE2
+
+;# Prescott New Instructions (SSE3)
+ADDSUBPD	xmmreg,xmmrm128			rm:	66 0f d0 /r				PRESCOTT,SSE3,SO
+ADDSUBPS	xmmreg,xmmrm128			rm:	f2 0f d0 /r				PRESCOTT,SSE3,SO
+HADDPD		xmmreg,xmmrm128			rm:	66 0f 7c /r				PRESCOTT,SSE3,SO
+HADDPS		xmmreg,xmmrm128			rm:	f2 0f 7c /r				PRESCOTT,SSE3,SO
+HSUBPD		xmmreg,xmmrm128			rm:	66 0f 7d /r				PRESCOTT,SSE3,SO
+HSUBPS		xmmreg,xmmrm128			rm:	f2 0f 7d /r				PRESCOTT,SSE3,SO
+LDDQU		xmmreg,mem128			rm:	f2 0f f0 /r				PRESCOTT,SSE3,SO
+MOVDDUP		xmmreg,xmmrm64			rm:	f2 0f 12 /r				PRESCOTT,SSE3,SQ
+MOVSHDUP	xmmreg,xmmrm128			rm:	f3 0f 16 /r				PRESCOTT,SSE3
+MOVSLDUP	xmmreg,xmmrm128			rm:	f3 0f 12 /r				PRESCOTT,SSE3
+
+;# VMX/SVM Instructions
+CLGI		void					0f 01 dd				VMX,AMD
+STGI		void					0f 01 dc				VMX,AMD
+VMCALL		void					0f 01 c1				VMX
+VMCLEAR		mem				m:	66 0f c7 /6				VMX
+VMFUNC		void					0f 01 d4				VMX
+VMLAUNCH	void					0f 01 c2				VMX
+VMLOAD		void					0f 01 da				VMX,AMD
+VMMCALL		void					0f 01 d9				VMX,AMD
+VMPTRLD		mem				m:	np 0f c7 /6				VMX
+VMPTRST		mem				m:	np 0f c7 /7				VMX
+VMREAD		rm32,reg32			mr:	np 0f 78 /r				VMX,NOLONG,SD
+VMREAD		rm64,reg64			mr:	o64nw np 0f 78 /r			X86_64,LONG,VMX,SQ
+VMRESUME	void					0f 01 c3				VMX
+VMRUN		void					0f 01 d8				VMX,AMD
+VMSAVE		void					0f 01 db				VMX,AMD
+VMWRITE		reg32,rm32			rm:	np 0f 79 /r				VMX,NOLONG,SD
+VMWRITE		reg64,rm64			rm:	o64nw np 0f 79 /r			X86_64,LONG,VMX,SQ
+VMXOFF		void					0f 01 c4				VMX
+VMXON		mem				m:	f3 0f c7 /6				VMX
+;# Extended Page Tables VMX instructions
+INVEPT		reg32,mem			rm: 66 0f 38 80 /r				VMX,SO,NOLONG
+INVEPT		reg64,mem			rm: o64nw 66 0f 38 80 /r			VMX,SO,LONG
+INVVPID		reg32,mem			rm: 66 0f 38 81 /r				VMX,SO,NOLONG
+INVVPID		reg64,mem			rm: o64nw 66 0f 38 81 /r			VMX,SO,LONG
+;# SEV-SNP AMD instructions
+PVALIDATE	void				       f2 0f 01 ff				VMX,AMD
+RMPADJUST	void				       f3 0f 01 fe				VMX,AMD
+VMGEXIT		void				       f2 0f 01 c1				VMX,AMD
+VMGEXIT		void				       f3 0f 01 c1				VMX,AMD
+
+;# Tejas New Instructions (SSSE3)
+PABSB		mmxreg,mmxrm			rm:	np 0f 38 1c /r				SSSE3,MMX,SQ
+PABSB		xmmreg,xmmrm128			rm:	66 0f 38 1c /r				SSSE3
+PABSW		mmxreg,mmxrm			rm:	np 0f 38 1d /r				SSSE3,MMX,SQ
+PABSW		xmmreg,xmmrm128			rm:	66 0f 38 1d /r				SSSE3
+PABSD		mmxreg,mmxrm			rm:	np 0f 38 1e /r				SSSE3,MMX,SQ
+PABSD		xmmreg,xmmrm128			rm:	66 0f 38 1e /r				SSSE3
+PALIGNR		mmxreg,mmxrm,imm		rmi:	np 0f 3a 0f /r ib,u			SSSE3,MMX,SQ
+PALIGNR		xmmreg,xmmrm,imm		rmi:	66 0f 3a 0f /r ib,u			SSSE3
+PHADDW		mmxreg,mmxrm			rm:	np 0f 38 01 /r				SSSE3,MMX,SQ
+PHADDW		xmmreg,xmmrm128			rm:	66 0f 38 01 /r				SSSE3
+PHADDD		mmxreg,mmxrm			rm:	np 0f 38 02 /r				SSSE3,MMX,SQ
+PHADDD		xmmreg,xmmrm128			rm:	66 0f 38 02 /r				SSSE3
+PHADDSW		mmxreg,mmxrm			rm:	np 0f 38 03 /r				SSSE3,MMX,SQ
+PHADDSW		xmmreg,xmmrm128			rm:	66 0f 38 03 /r				SSSE3
+PHSUBW		mmxreg,mmxrm			rm:	np 0f 38 05 /r				SSSE3,MMX,SQ
+PHSUBW		xmmreg,xmmrm128			rm:	66 0f 38 05 /r				SSSE3
+PHSUBD		mmxreg,mmxrm			rm:	np 0f 38 06 /r				SSSE3,MMX,SQ
+PHSUBD		xmmreg,xmmrm128			rm:	66 0f 38 06 /r				SSSE3
+PHSUBSW		mmxreg,mmxrm			rm:	np 0f 38 07 /r				SSSE3,MMX,SQ
+PHSUBSW		xmmreg,xmmrm128			rm:	66 0f 38 07 /r				SSSE3
+PMADDUBSW	mmxreg,mmxrm			rm:	np 0f 38 04 /r				SSSE3,MMX,SQ
+PMADDUBSW	xmmreg,xmmrm128			rm:	66 0f 38 04 /r				SSSE3
+PMULHRSW	mmxreg,mmxrm			rm:	np 0f 38 0b /r				SSSE3,MMX,SQ
+PMULHRSW	xmmreg,xmmrm128			rm:	66 0f 38 0b /r				SSSE3
+PSHUFB		mmxreg,mmxrm			rm:	np 0f 38 00 /r				SSSE3,MMX,SQ
+PSHUFB		xmmreg,xmmrm128			rm:	66 0f 38 00 /r				SSSE3
+PSIGNB		mmxreg,mmxrm			rm:	np 0f 38 08 /r				SSSE3,MMX,SQ
+PSIGNB		xmmreg,xmmrm128			rm:	66 0f 38 08 /r				SSSE3
+PSIGNW		mmxreg,mmxrm			rm:	np 0f 38 09 /r				SSSE3,MMX,SQ
+PSIGNW		xmmreg,xmmrm128			rm:	66 0f 38 09 /r				SSSE3
+PSIGND		mmxreg,mmxrm			rm:	np 0f 38 0a /r				SSSE3,MMX,SQ
+PSIGND		xmmreg,xmmrm128			rm:	66 0f 38 0a /r				SSSE3
+
+;# AMD SSE4A
+EXTRQ		xmmreg,imm,imm			mij:	66 0f 78 /0 ib,u ib,u			SSE4A,AMD
+EXTRQ		xmmreg,xmmreg			rm:	66 0f 79 /r				SSE4A,AMD
+INSERTQ		xmmreg,xmmreg,imm,imm		rmij:	f2 0f 78 /r ib,u ib,u			SSE4A,AMD
+INSERTQ		xmmreg,xmmreg			rm:	f2 0f 79 /r				SSE4A,AMD
+MOVNTSD		mem64,xmmreg			mr:	f2 0f 2b /r				SSE4A,AMD,SQ
+MOVNTSS		mem32,xmmreg			mr:	f3 0f 2b /r				SSE4A,AMD,SD
+
+;# New instructions in Barcelona
+LZCNT		reg16,rm16			rm:	o16 f3i 0f bd /r			P6,AMD
+LZCNT		reg32,rm32			rm:	o32 f3i 0f bd /r			P6,AMD
+LZCNT		reg64,rm64			rm:	o64 f3i 0f bd /r			X86_64,LONG,AMD
+
+;# Penryn New Instructions (SSE4.1)
+BLENDPD		xmmreg,xmmrm128,imm8		rmi:	66 0f 3a 0d /r ib,u			SSE41
+BLENDPS		xmmreg,xmmrm128,imm8		rmi:	66 0f 3a 0c /r ib,u			SSE41
+BLENDVPD	xmmreg,xmmrm128,xmm0		rm-:	66 0f 38 15 /r				SSE41
+BLENDVPD	xmmreg,xmmrm128			rm:	66 0f 38 15 /r				SSE41
+BLENDVPS	xmmreg,xmmrm128,xmm0		rm-:	66 0f 38 14 /r				SSE41
+BLENDVPS	xmmreg,xmmrm128			rm:	66 0f 38 14 /r				SSE41
+DPPD		xmmreg,xmmrm128,imm8		rmi:	66 0f 3a 41 /r ib,u			SSE41
+DPPS		xmmreg,xmmrm128,imm8		rmi:	66 0f 3a 40 /r ib,u			SSE41
+EXTRACTPS	rm32,xmmreg,imm8		mri:	66 0f 3a 17 /r ib,u			SSE41
+EXTRACTPS	reg64,xmmreg,imm8		mri:	o64 66 0f 3a 17 /r ib,u		SSE41,X86_64,LONG
+INSERTPS	xmmreg,xmmrm32,imm8		rmi:	66 0f 3a 21 /r ib,u			SSE41
+MOVNTDQA	xmmreg,mem128			rm:	66 0f 38 2a /r				SSE41
+MPSADBW		xmmreg,xmmrm128,imm8		rmi:	66 0f 3a 42 /r ib,u			SSE41
+PACKUSDW	xmmreg,xmmrm128			rm:	66 0f 38 2b /r				SSE41
+PBLENDVB	xmmreg,xmmrm,xmm0		rm-:	66 0f 38 10 /r				SSE41
+PBLENDVB	xmmreg,xmmrm128			rm:	66 0f 38 10 /r				SSE41
+PBLENDW		xmmreg,xmmrm128,imm8		rmi:	66 0f 3a 0e /r ib,u			SSE41
+PCMPEQQ		xmmreg,xmmrm128			rm:	66 0f 38 29 /r				SSE41
+PEXTRB		reg32,xmmreg,imm8		mri:	66 0f 3a 14 /r ib,u			SSE41
+PEXTRB		mem8,xmmreg,imm8		mri:	66 0f 3a 14 /r ib,u			SSE41
+PEXTRB		reg64,xmmreg,imm8		mri:	o64nw 66 0f 3a 14 /r ib,u		SSE41,X86_64,LONG
+PEXTRD		rm32,xmmreg,imm8		mri:	norexw 66 0f 3a 16 /r ib,u		SSE41
+PEXTRQ		rm64,xmmreg,imm8		mri:	o64 66 0f 3a 16 /r ib,u		SSE41,X86_64,LONG
+PEXTRW		reg32,xmmreg,imm8		mri:	66 0f 3a 15 /r ib,u			SSE41
+PEXTRW		mem16,xmmreg,imm8		mri:	66 0f 3a 15 /r ib,u			SSE41
+PEXTRW		reg64,xmmreg,imm8		mri:	o64 66 0f 3a 15 /r ib,u		SSE41,X86_64,LONG
+PHMINPOSUW	xmmreg,xmmrm128			rm:	66 0f 38 41 /r				SSE41
+PINSRB		xmmreg,mem,imm8			rmi:	66 0f 3a 20 /r ib,u			SSE41,SB,AR2
+PINSRB		xmmreg,rm8,imm8			rmi:	nohi 66 0f 3a 20 /r ib,u		SSE41,SB,AR2
+PINSRB		xmmreg,reg32,imm8		rmi:	66 0f 3a 20 /r ib,u			SSE41,SB,AR2
+PINSRD		xmmreg,rm32,imm8		rmi:	norexw 66 0f 3a 22 /r ib,u		SSE41,SB,AR2
+PINSRQ		xmmreg,rm64,imm8		rmi:	o64 66 0f 3a 22 /r ib,u		SSE41,X86_64,LONG,SB,AR2
+PMAXSB		xmmreg,xmmrm128			rm:	66 0f 38 3c /r				SSE41
+PMAXSD		xmmreg,xmmrm128			rm:	66 0f 38 3d /r				SSE41
+PMAXUD		xmmreg,xmmrm128			rm:	66 0f 38 3f /r				SSE41
+PMAXUW		xmmreg,xmmrm128			rm:	66 0f 38 3e /r				SSE41
+PMINSB		xmmreg,xmmrm128			rm:	66 0f 38 38 /r				SSE41
+PMINSD		xmmreg,xmmrm128			rm:	66 0f 38 39 /r				SSE41
+PMINUD		xmmreg,xmmrm128			rm:	66 0f 38 3b /r				SSE41
+PMINUW		xmmreg,xmmrm128			rm:	66 0f 38 3a /r				SSE41
+PMOVSXBW	xmmreg,xmmrm64			rm:	66 0f 38 20 /r				SSE41,SQ
+PMOVSXBD	xmmreg,xmmrm32			rm:	66 0f 38 21 /r				SSE41,SD
+PMOVSXBQ	xmmreg,xmmrm16			rm:	66 0f 38 22 /r				SSE41,SW
+PMOVSXWD	xmmreg,xmmrm64			rm:	66 0f 38 23 /r				SSE41,SQ
+PMOVSXWQ	xmmreg,xmmrm32			rm:	66 0f 38 24 /r				SSE41,SD
+PMOVSXDQ	xmmreg,xmmrm64			rm:	66 0f 38 25 /r				SSE41,SQ
+PMOVZXBW	xmmreg,xmmrm64			rm:	66 0f 38 30 /r				SSE41,SQ
+PMOVZXBD	xmmreg,xmmrm32			rm:	66 0f 38 31 /r				SSE41,SD
+PMOVZXBQ	xmmreg,xmmrm16			rm:	66 0f 38 32 /r				SSE41,SW
+PMOVZXWD	xmmreg,xmmrm64			rm:	66 0f 38 33 /r				SSE41,SQ
+PMOVZXWQ	xmmreg,xmmrm32			rm:	66 0f 38 34 /r				SSE41,SD
+PMOVZXDQ	xmmreg,xmmrm64			rm:	66 0f 38 35 /r				SSE41,SQ
+PMULDQ		xmmreg,xmmrm128			rm:	66 0f 38 28 /r				SSE41
+PMULLD		xmmreg,xmmrm128			rm:	66 0f 38 40 /r				SSE41
+PTEST		xmmreg,xmmrm128			rm:	66 0f 38 17 /r				SSE41
+ROUNDPD		xmmreg,xmmrm128,imm8		rmi:	66 0f 3a 09 /r ib,u			SSE41
+ROUNDPS		xmmreg,xmmrm128,imm8		rmi:	66 0f 3a 08 /r ib,u			SSE41
+ROUNDSD		xmmreg,xmmrm64,imm8		rmi:	66 0f 3a 0b /r ib,u			SSE41
+ROUNDSS		xmmreg,xmmrm32,imm8		rmi:	66 0f 3a 0a /r ib,u			SSE41
+
+;# Nehalem New Instructions (SSE4.2)
+CRC32		reg32,rm8			rm:	f2i 0f 38 f0 /r			SSE42
+CRC32		reg32,rm16			rm:	o16 f2i 0f 38 f1 /r			SSE42
+CRC32		reg32,rm32			rm:	o32 f2i 0f 38 f1 /r			SSE42
+CRC32		reg64,rm8			rm:	o64 f2i 0f 38 f0 /r			SSE42,X86_64,LONG
+CRC32		reg64,rm64			rm:	o64 f2i 0f 38 f1 /r			SSE42,X86_64,LONG
+PCMPESTRI	xmmreg,xmmrm128,imm8		rmi:	66 0f 3a 61 /r ib,u			SSE42
+PCMPESTRM	xmmreg,xmmrm128,imm8		rmi:	66 0f 3a 60 /r ib,u			SSE42
+PCMPISTRI	xmmreg,xmmrm128,imm8		rmi:	66 0f 3a 63 /r ib,u			SSE42
+PCMPISTRM	xmmreg,xmmrm128,imm8		rmi:	66 0f 3a 62 /r ib,u			SSE42
+PCMPGTQ		xmmreg,xmmrm128			rm:	66 0f 38 37 /r				SSE42
+POPCNT		reg16,rm16			rm:	o16 f3i 0f b8 /r			NEHALEM,SW
+POPCNT		reg32,rm32			rm:	o32 f3i 0f b8 /r			NEHALEM,SD
+POPCNT		reg64,rm64			rm:	o64 f3i 0f b8 /r			NEHALEM,SQ,LONG
+
+;# Intel SMX
+GETSEC		void					0f 37					KATMAI
+
+;# Geode (Cyrix) 3DNow! additions
+PFRCPV		mmxreg,mmxrm			rm:	o64nw 0f 0f /r 86			PENT,3DNOW,SQ,CYRIX
+PFRSQRTV	mmxreg,mmxrm			rm:	o64nw 0f 0f /r 87			PENT,3DNOW,SQ,CYRIX
+
+;# Intel new instructions in ???
+; Is NEHALEM right here?
+MOVBE		reg16,mem16			rm:	o16 norep 0f 38 f0 /r			NEHALEM,SM
+MOVBE		reg32,mem32			rm:	o32 norep 0f 38 f0 /r			NEHALEM,SM
+MOVBE		reg64,mem64			rm:	o64 norep 0f 38 f0 /r			NEHALEM,SM
+MOVBE		mem16,reg16			mr:	o16 norep 0f 38 f1 /r			NEHALEM,SM
+MOVBE		mem32,reg32			mr:	o32 norep 0f 38 f1 /r			NEHALEM,SM
+MOVBE		mem64,reg64			mr:	o64 norep 0f 38 f1 /r			NEHALEM,SM
+
+;# Intel AES instructions
+AESENC		xmmreg,xmmrm128			rm:	66 0f 38 dc /r				SSE,WESTMERE
+AESENCLAST	xmmreg,xmmrm128			rm:	66 0f 38 dd /r				SSE,WESTMERE
+AESDEC		xmmreg,xmmrm128			rm:	66 0f 38 de /r				SSE,WESTMERE
+AESDECLAST	xmmreg,xmmrm128			rm:	66 0f 38 df /r				SSE,WESTMERE
+AESIMC		xmmreg,xmmrm128			rm:	66 0f 38 db /r				SSE,WESTMERE
+AESKEYGENASSIST	xmmreg,xmmrm128,imm8		rmi:	66 0f 3a df /r ib			SSE,WESTMERE
+
+;# Intel AVX AES instructions
+VAESENC		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 dc /r		AVX,SANDYBRIDGE
+VAESENCLAST	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 dd /r		AVX,SANDYBRIDGE
+VAESDEC		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 de /r		AVX,SANDYBRIDGE
+VAESDECLAST	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 df /r		AVX,SANDYBRIDGE
+VAESIMC		xmmreg,xmmrm128			rm:	vex.128.66.0f38 db /r			AVX,SANDYBRIDGE
+VAESKEYGENASSIST xmmreg,xmmrm128,imm8		rmi:	vex.128.66.0f3a df /r ib		AVX,SANDYBRIDGE
+
+;# Intel instruction extension based on pub number 319433-030 dated October 2017
+
+; Intel VAES instructions
+VAESENC		ymmreg,ymmreg*,ymmrm256		rvm:   vex.nds.256.66.0f38.wig dc /r		VAES,FUTURE
+VAESENCLAST	ymmreg,ymmreg*,ymmrm256		rvm:   vex.nds.256.66.0f38.wig dd /r		VAES,FUTURE
+VAESDEC		ymmreg,ymmreg*,ymmrm256		rvm:   vex.nds.256.66.0f38.wig de /r		VAES,FUTURE
+VAESDECLAST	ymmreg,ymmreg*,ymmrm256		rvm:   vex.nds.256.66.0f38.wig df /r		VAES,FUTURE
+
+; Intel VAES + AVX512VL instructions
+VAESENC		xmmreg,xmmreg*,xmmrm128		rvm:fv: evex.nds.128.66.0f38.wig dc /r	AVX512VL,AVX512,VAES,FUTURE
+VAESENC		ymmreg,ymmreg*,ymmrm256		rvm:fv: evex.nds.256.66.0f38.wig dc /r	AVX512VL,AVX512,VAES,FUTURE
+VAESENCLAST	xmmreg,xmmreg*,xmmrm128		rvm:fv: evex.nds.128.66.0f38.wig dd /r	AVX512VL,AVX512,VAES,FUTURE
+VAESENCLAST	ymmreg,ymmreg*,ymmrm256		rvm:fv: evex.nds.256.66.0f38.wig dd /r	AVX512VL,AVX512,VAES,FUTURE
+VAESDEC		xmmreg,xmmreg*,xmmrm128		rvm:fv: evex.nds.128.66.0f38.wig de /r	AVX512VL,AVX512,VAES,FUTURE
+VAESDEC		ymmreg,ymmreg*,ymmrm256		rvm:fv: evex.nds.256.66.0f38.wig de /r	AVX512VL,AVX512,VAES,FUTURE
+VAESDECLAST	xmmreg,xmmreg*,xmmrm128		rvm:fv: evex.nds.128.66.0f38.wig df /r	AVX512VL,AVX512,VAES,FUTURE
+VAESDECLAST	ymmreg,ymmreg*,ymmrm256		rvm:fv: evex.nds.256.66.0f38.wig df /r	AVX512VL,AVX512,VAES,FUTURE
+
+; Intel VAES + AVX512F instructions
+VAESENC		zmmreg,zmmreg*,zmmrm512		rvm:fv: evex.nds.512.66.0f38.wig dc /r	AVX512,VAES,FUTURE
+VAESENCLAST	zmmreg,zmmreg*,zmmrm512		rvm:fv: evex.nds.512.66.0f38.wig dd /r	AVX512,VAES,FUTURE
+VAESDEC		zmmreg,zmmreg*,zmmrm512		rvm:fv: evex.nds.512.66.0f38.wig de /r	AVX512,VAES,FUTURE
+VAESDECLAST	zmmreg,zmmreg*,zmmrm512		rvm:fv: evex.nds.512.66.0f38.wig df /r	AVX512,VAES,FUTURE
+
+;# Intel AVX instructions
+VADDPD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 58 /r		AVX,SANDYBRIDGE
+VADDPD		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 58 /r		AVX,SANDYBRIDGE
+VADDPS		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f 58 /r			AVX,SANDYBRIDGE
+VADDPS		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f 58 /r			AVX,SANDYBRIDGE
+VADDSD		xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f 58 /r		AVX,SANDYBRIDGE
+VADDSS		xmmreg,xmmreg*,xmmrm32		rvm:	vex.nds.lig.f3.0f 58 /r		AVX,SANDYBRIDGE
+VADDSUBPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f d0 /r		AVX,SANDYBRIDGE
+VADDSUBPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f d0 /r		AVX,SANDYBRIDGE
+VADDSUBPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.f2.0f d0 /r		AVX,SANDYBRIDGE
+VADDSUBPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.f2.0f d0 /r		AVX,SANDYBRIDGE
+VANDPD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 54 /r		AVX,SANDYBRIDGE
+VANDPD		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 54 /r		AVX,SANDYBRIDGE
+VANDPS		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f 54 /r			AVX,SANDYBRIDGE
+VANDPS		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f 54 /r			AVX,SANDYBRIDGE
+VANDNPD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 55 /r		AVX,SANDYBRIDGE
+VANDNPD		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 55 /r		AVX,SANDYBRIDGE
+VANDNPS		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f 55 /r			AVX,SANDYBRIDGE
+VANDNPS		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f 55 /r			AVX,SANDYBRIDGE
+VBLENDPD	xmmreg,xmmreg*,xmmrm128,imm8	rvmi:	vex.nds.128.66.0f3a 0d /r ib		AVX,SANDYBRIDGE
+VBLENDPD	ymmreg,ymmreg*,ymmrm256,imm8	rvmi:	vex.nds.256.66.0f3a 0d /r ib		AVX,SANDYBRIDGE
+VBLENDPS	xmmreg,xmmreg*,xmmrm128,imm8	rvmi:	vex.nds.128.66.0f3a 0c /r ib		AVX,SANDYBRIDGE
+VBLENDPS	ymmreg,ymmreg*,ymmrm256,imm8	rvmi:	vex.nds.256.66.0f3a 0c /r ib		AVX,SANDYBRIDGE
+VBLENDVPD	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	vex.nds.128.66.0f3a.w0 4b /r /is4	AVX,SANDYBRIDGE
+VBLENDVPD	ymmreg,ymmreg*,ymmrm256,ymmreg	rvms:	vex.nds.256.66.0f3a.w0 4b /r /is4	AVX,SANDYBRIDGE
+VBLENDVPS	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	vex.nds.128.66.0f3a.w0 4a /r /is4	AVX,SANDYBRIDGE
+VBLENDVPS	ymmreg,ymmreg*,ymmrm256,ymmreg	rvms:	vex.nds.256.66.0f3a.w0 4a /r /is4	AVX,SANDYBRIDGE
+VBROADCASTSS	xmmreg,mem32			rm:	vex.128.66.0f38.w0 18 /r		AVX,SANDYBRIDGE
+VBROADCASTSS	ymmreg,mem32			rm:	vex.256.66.0f38.w0 18 /r		AVX,SANDYBRIDGE
+VBROADCASTSD	ymmreg,mem64			rm:	vex.256.66.0f38.w0 19 /r		AVX,SANDYBRIDGE
+VBROADCASTF128	ymmreg,mem128			rm:	vex.256.66.0f38.w0 1a /r		AVX,SANDYBRIDGE
+; Specific aliases first, then the generic version, to keep the disassembler happy...
+VCMPEQ_OSPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 10		AVX,SANDYBRIDGE
+VCMPEQ_OSPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 10		AVX,SANDYBRIDGE
+VCMPEQPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 00		AVX,SANDYBRIDGE
+VCMPEQPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 00		AVX,SANDYBRIDGE
+VCMPLT_OSPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 01		AVX,SANDYBRIDGE
+VCMPLT_OSPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 01		AVX,SANDYBRIDGE
+VCMPLTPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 01		AVX,SANDYBRIDGE
+VCMPLTPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 01		AVX,SANDYBRIDGE
+VCMPLE_OSPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 02		AVX,SANDYBRIDGE
+VCMPLE_OSPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 02		AVX,SANDYBRIDGE
+VCMPLEPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 02		AVX,SANDYBRIDGE
+VCMPLEPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 02		AVX,SANDYBRIDGE
+VCMPUNORD_QPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 03		AVX,SANDYBRIDGE
+VCMPUNORD_QPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 03		AVX,SANDYBRIDGE
+VCMPUNORDPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 03		AVX,SANDYBRIDGE
+VCMPUNORDPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 03		AVX,SANDYBRIDGE
+VCMPNEQ_UQPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 04		AVX,SANDYBRIDGE
+VCMPNEQ_UQPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 04		AVX,SANDYBRIDGE
+VCMPNEQPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 04		AVX,SANDYBRIDGE
+VCMPNEQPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 04		AVX,SANDYBRIDGE
+VCMPNLT_USPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 05		AVX,SANDYBRIDGE
+VCMPNLT_USPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 05		AVX,SANDYBRIDGE
+VCMPNLTPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 05		AVX,SANDYBRIDGE
+VCMPNLTPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 05		AVX,SANDYBRIDGE
+VCMPNLE_USPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 06		AVX,SANDYBRIDGE
+VCMPNLE_USPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 06		AVX,SANDYBRIDGE
+VCMPNLEPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 06		AVX,SANDYBRIDGE
+VCMPNLEPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 06		AVX,SANDYBRIDGE
+VCMPORD_QPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 07		AVX,SANDYBRIDGE
+VCMPORD_QPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 07		AVX,SANDYBRIDGE
+VCMPORDPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 07		AVX,SANDYBRIDGE
+VCMPORDPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 07		AVX,SANDYBRIDGE
+VCMPEQ_UQPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 08		AVX,SANDYBRIDGE
+VCMPEQ_UQPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 08		AVX,SANDYBRIDGE
+VCMPNGE_USPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 09		AVX,SANDYBRIDGE
+VCMPNGE_USPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 09		AVX,SANDYBRIDGE
+VCMPNGEPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 09		AVX,SANDYBRIDGE
+VCMPNGEPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 09		AVX,SANDYBRIDGE
+VCMPNGT_USPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 0a		AVX,SANDYBRIDGE
+VCMPNGT_USPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 0a		AVX,SANDYBRIDGE
+VCMPNGTPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 0a		AVX,SANDYBRIDGE
+VCMPNGTPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 0a		AVX,SANDYBRIDGE
+VCMPFALSE_OQPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 0b		AVX,SANDYBRIDGE
+VCMPFALSE_OQPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 0b		AVX,SANDYBRIDGE
+VCMPFALSEPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 0b		AVX,SANDYBRIDGE
+VCMPFALSEPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 0b		AVX,SANDYBRIDGE
+VCMPNEQ_OQPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 0c		AVX,SANDYBRIDGE
+VCMPNEQ_OQPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 0c		AVX,SANDYBRIDGE
+VCMPGE_OSPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 0d		AVX,SANDYBRIDGE
+VCMPGE_OSPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 0d		AVX,SANDYBRIDGE
+VCMPGEPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 0d		AVX,SANDYBRIDGE
+VCMPGEPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 0d		AVX,SANDYBRIDGE
+VCMPGT_OSPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 0e		AVX,SANDYBRIDGE
+VCMPGT_OSPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 0e		AVX,SANDYBRIDGE
+VCMPGTPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 0e		AVX,SANDYBRIDGE
+VCMPGTPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 0e		AVX,SANDYBRIDGE
+VCMPTRUE_UQPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 0f		AVX,SANDYBRIDGE
+VCMPTRUE_UQPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 0f		AVX,SANDYBRIDGE
+VCMPTRUEPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 0f		AVX,SANDYBRIDGE
+VCMPTRUEPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 0f		AVX,SANDYBRIDGE
+VCMPEQ_OSPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 10		AVX,SANDYBRIDGE
+VCMPEQ_OSPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 10		AVX,SANDYBRIDGE
+VCMPLT_OQPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 11		AVX,SANDYBRIDGE
+VCMPLT_OQPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 11		AVX,SANDYBRIDGE
+VCMPLE_OQPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 12		AVX,SANDYBRIDGE
+VCMPLE_OQPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 12		AVX,SANDYBRIDGE
+VCMPUNORD_SPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 13		AVX,SANDYBRIDGE
+VCMPUNORD_SPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 13		AVX,SANDYBRIDGE
+VCMPNEQ_USPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 14		AVX,SANDYBRIDGE
+VCMPNEQ_USPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 14		AVX,SANDYBRIDGE
+VCMPNLT_UQPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 15		AVX,SANDYBRIDGE
+VCMPNLT_UQPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 15		AVX,SANDYBRIDGE
+VCMPNLE_UQPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 16		AVX,SANDYBRIDGE
+VCMPNLE_UQPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 16		AVX,SANDYBRIDGE
+VCMPORD_SPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 17		AVX,SANDYBRIDGE
+VCMPORD_SPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 17		AVX,SANDYBRIDGE
+VCMPEQ_USPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 18		AVX,SANDYBRIDGE
+VCMPEQ_USPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 18		AVX,SANDYBRIDGE
+VCMPNGE_UQPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 19		AVX,SANDYBRIDGE
+VCMPNGE_UQPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 19		AVX,SANDYBRIDGE
+VCMPNGT_UQPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 1a		AVX,SANDYBRIDGE
+VCMPNGT_UQPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 1a		AVX,SANDYBRIDGE
+VCMPFALSE_OSPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 1b		AVX,SANDYBRIDGE
+VCMPFALSE_OSPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 1b		AVX,SANDYBRIDGE
+VCMPNEQ_OSPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 1c		AVX,SANDYBRIDGE
+VCMPNEQ_OSPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 1c		AVX,SANDYBRIDGE
+VCMPGE_OQPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 1d		AVX,SANDYBRIDGE
+VCMPGE_OQPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 1d		AVX,SANDYBRIDGE
+VCMPGT_OQPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 1e		AVX,SANDYBRIDGE
+VCMPGT_OQPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 1e		AVX,SANDYBRIDGE
+VCMPTRUE_USPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f c2 /r 1f		AVX,SANDYBRIDGE
+VCMPTRUE_USPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f c2 /r 1f		AVX,SANDYBRIDGE
+VCMPPD		xmmreg,xmmreg*,xmmrm128,imm8	rvmi:	vex.nds.128.66.0f c2 /r ib		AVX,SANDYBRIDGE
+VCMPPD		ymmreg,ymmreg*,ymmrm256,imm8	rvmi:	vex.nds.256.66.0f c2 /r ib		AVX,SANDYBRIDGE
+; Specific aliases first, then the generic version, to keep the disassembler happy...
+VCMPEQ_OSPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 10		AVX,SANDYBRIDGE
+VCMPEQ_OSPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 10		AVX,SANDYBRIDGE
+VCMPEQPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 00		AVX,SANDYBRIDGE
+VCMPEQPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 00		AVX,SANDYBRIDGE
+VCMPLT_OSPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 01		AVX,SANDYBRIDGE
+VCMPLT_OSPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 01		AVX,SANDYBRIDGE
+VCMPLTPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 01		AVX,SANDYBRIDGE
+VCMPLTPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 01		AVX,SANDYBRIDGE
+VCMPLE_OSPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 02		AVX,SANDYBRIDGE
+VCMPLE_OSPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 02		AVX,SANDYBRIDGE
+VCMPLEPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 02		AVX,SANDYBRIDGE
+VCMPLEPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 02		AVX,SANDYBRIDGE
+VCMPUNORD_QPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 03		AVX,SANDYBRIDGE
+VCMPUNORD_QPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 03		AVX,SANDYBRIDGE
+VCMPUNORDPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 03		AVX,SANDYBRIDGE
+VCMPUNORDPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 03		AVX,SANDYBRIDGE
+VCMPNEQ_UQPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 04		AVX,SANDYBRIDGE
+VCMPNEQ_UQPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 04		AVX,SANDYBRIDGE
+VCMPNEQPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 04		AVX,SANDYBRIDGE
+VCMPNEQPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 04		AVX,SANDYBRIDGE
+VCMPNLT_USPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 05		AVX,SANDYBRIDGE
+VCMPNLT_USPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 05		AVX,SANDYBRIDGE
+VCMPNLTPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 05		AVX,SANDYBRIDGE
+VCMPNLTPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 05		AVX,SANDYBRIDGE
+VCMPNLE_USPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 06		AVX,SANDYBRIDGE
+VCMPNLE_USPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 06		AVX,SANDYBRIDGE
+VCMPNLEPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 06		AVX,SANDYBRIDGE
+VCMPNLEPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 06		AVX,SANDYBRIDGE
+VCMPORD_QPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 07		AVX,SANDYBRIDGE
+VCMPORD_QPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 07		AVX,SANDYBRIDGE
+VCMPORDPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 07		AVX,SANDYBRIDGE
+VCMPORDPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 07		AVX,SANDYBRIDGE
+VCMPEQ_UQPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 08		AVX,SANDYBRIDGE
+VCMPEQ_UQPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 08		AVX,SANDYBRIDGE
+VCMPNGE_USPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 09		AVX,SANDYBRIDGE
+VCMPNGE_USPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 09		AVX,SANDYBRIDGE
+VCMPNGEPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 09		AVX,SANDYBRIDGE
+VCMPNGEPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 09		AVX,SANDYBRIDGE
+VCMPNGT_USPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 0a		AVX,SANDYBRIDGE
+VCMPNGT_USPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 0a		AVX,SANDYBRIDGE
+VCMPNGTPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 0a		AVX,SANDYBRIDGE
+VCMPNGTPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 0a		AVX,SANDYBRIDGE
+VCMPFALSE_OQPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 0b		AVX,SANDYBRIDGE
+VCMPFALSE_OQPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 0b		AVX,SANDYBRIDGE
+VCMPFALSEPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 0b		AVX,SANDYBRIDGE
+VCMPFALSEPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 0b		AVX,SANDYBRIDGE
+VCMPNEQ_OQPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 0c		AVX,SANDYBRIDGE
+VCMPNEQ_OQPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 0c		AVX,SANDYBRIDGE
+VCMPGE_OSPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 0d		AVX,SANDYBRIDGE
+VCMPGE_OSPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 0d		AVX,SANDYBRIDGE
+VCMPGEPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 0d		AVX,SANDYBRIDGE
+VCMPGEPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 0d		AVX,SANDYBRIDGE
+VCMPGT_OSPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 0e		AVX,SANDYBRIDGE
+VCMPGT_OSPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 0e		AVX,SANDYBRIDGE
+VCMPGTPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 0e		AVX,SANDYBRIDGE
+VCMPGTPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 0e		AVX,SANDYBRIDGE
+VCMPTRUE_UQPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 0f		AVX,SANDYBRIDGE
+VCMPTRUE_UQPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 0f		AVX,SANDYBRIDGE
+VCMPTRUEPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 0f		AVX,SANDYBRIDGE
+VCMPTRUEPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 0f		AVX,SANDYBRIDGE
+VCMPEQ_OSPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 10		AVX,SANDYBRIDGE
+VCMPEQ_OSPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 10		AVX,SANDYBRIDGE
+VCMPLT_OQPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 11		AVX,SANDYBRIDGE
+VCMPLT_OQPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 11		AVX,SANDYBRIDGE
+VCMPLE_OQPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 12		AVX,SANDYBRIDGE
+VCMPLE_OQPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 12		AVX,SANDYBRIDGE
+VCMPUNORD_SPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 13		AVX,SANDYBRIDGE
+VCMPUNORD_SPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 13		AVX,SANDYBRIDGE
+VCMPNEQ_USPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 14		AVX,SANDYBRIDGE
+VCMPNEQ_USPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 14		AVX,SANDYBRIDGE
+VCMPNLT_UQPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 15		AVX,SANDYBRIDGE
+VCMPNLT_UQPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 15		AVX,SANDYBRIDGE
+VCMPNLE_UQPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 16		AVX,SANDYBRIDGE
+VCMPNLE_UQPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 16		AVX,SANDYBRIDGE
+VCMPORD_SPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 17		AVX,SANDYBRIDGE
+VCMPORD_SPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 17		AVX,SANDYBRIDGE
+VCMPEQ_USPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 18		AVX,SANDYBRIDGE
+VCMPEQ_USPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 18		AVX,SANDYBRIDGE
+VCMPNGE_UQPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 19		AVX,SANDYBRIDGE
+VCMPNGE_UQPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 19		AVX,SANDYBRIDGE
+VCMPNGT_UQPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 1a		AVX,SANDYBRIDGE
+VCMPNGT_UQPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 1a		AVX,SANDYBRIDGE
+VCMPFALSE_OSPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 1b		AVX,SANDYBRIDGE
+VCMPFALSE_OSPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 1b		AVX,SANDYBRIDGE
+VCMPNEQ_OSPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 1c		AVX,SANDYBRIDGE
+VCMPNEQ_OSPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 1c		AVX,SANDYBRIDGE
+VCMPGE_OQPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 1d		AVX,SANDYBRIDGE
+VCMPGE_OQPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 1d		AVX,SANDYBRIDGE
+VCMPGT_OQPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 1e		AVX,SANDYBRIDGE
+VCMPGT_OQPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 1e		AVX,SANDYBRIDGE
+VCMPTRUE_USPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f c2 /r 1f		AVX,SANDYBRIDGE
+VCMPTRUE_USPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f c2 /r 1f		AVX,SANDYBRIDGE
+VCMPPS		xmmreg,xmmreg*,xmmrm128,imm8	rvmi:	vex.nds.128.0f c2 /r ib		AVX,SANDYBRIDGE
+VCMPPS		ymmreg,ymmreg*,ymmrm256,imm8	rvmi:	vex.nds.256.0f c2 /r ib		AVX,SANDYBRIDGE
+; Specific aliases first, then the generic version, to keep the disassembler happy...
+VCMPEQ_OSSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 10		AVX,SANDYBRIDGE
+VCMPEQSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 00		AVX,SANDYBRIDGE
+VCMPLT_OSSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 01		AVX,SANDYBRIDGE
+VCMPLTSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 01		AVX,SANDYBRIDGE
+VCMPLE_OSSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 02		AVX,SANDYBRIDGE
+VCMPLESD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 02		AVX,SANDYBRIDGE
+VCMPUNORD_QSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 03		AVX,SANDYBRIDGE
+VCMPUNORDSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 03		AVX,SANDYBRIDGE
+VCMPNEQ_UQSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 04		AVX,SANDYBRIDGE
+VCMPNEQSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 04		AVX,SANDYBRIDGE
+VCMPNLT_USSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 05		AVX,SANDYBRIDGE
+VCMPNLTSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 05		AVX,SANDYBRIDGE
+VCMPNLE_USSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 06		AVX,SANDYBRIDGE
+VCMPNLESD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 06		AVX,SANDYBRIDGE
+VCMPORD_QSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 07		AVX,SANDYBRIDGE
+VCMPORDSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 07		AVX,SANDYBRIDGE
+VCMPEQ_UQSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 08		AVX,SANDYBRIDGE
+VCMPNGE_USSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 09		AVX,SANDYBRIDGE
+VCMPNGESD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 09		AVX,SANDYBRIDGE
+VCMPNGT_USSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 0a		AVX,SANDYBRIDGE
+VCMPNGTSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 0a		AVX,SANDYBRIDGE
+VCMPFALSE_OQSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 0b		AVX,SANDYBRIDGE
+VCMPFALSESD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 0b		AVX,SANDYBRIDGE
+VCMPNEQ_OQSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 0c		AVX,SANDYBRIDGE
+VCMPGE_OSSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 0d		AVX,SANDYBRIDGE
+VCMPGESD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 0d		AVX,SANDYBRIDGE
+VCMPGT_OSSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 0e		AVX,SANDYBRIDGE
+VCMPGTSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 0e		AVX,SANDYBRIDGE
+VCMPTRUE_UQSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 0f		AVX,SANDYBRIDGE
+VCMPTRUESD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 0f		AVX,SANDYBRIDGE
+VCMPEQ_OSSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 10		AVX,SANDYBRIDGE
+VCMPLT_OQSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 11		AVX,SANDYBRIDGE
+VCMPLE_OQSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 12		AVX,SANDYBRIDGE
+VCMPUNORD_SSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 13		AVX,SANDYBRIDGE
+VCMPNEQ_USSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 14		AVX,SANDYBRIDGE
+VCMPNLT_UQSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 15		AVX,SANDYBRIDGE
+VCMPNLE_UQSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 16		AVX,SANDYBRIDGE
+VCMPORD_SSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 17		AVX,SANDYBRIDGE
+VCMPEQ_USSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 18		AVX,SANDYBRIDGE
+VCMPNGE_UQSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 19		AVX,SANDYBRIDGE
+VCMPNGT_UQSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 1a		AVX,SANDYBRIDGE
+VCMPFALSE_OSSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 1b		AVX,SANDYBRIDGE
+VCMPNEQ_OSSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 1c		AVX,SANDYBRIDGE
+VCMPGE_OQSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 1d		AVX,SANDYBRIDGE
+VCMPGT_OQSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 1e		AVX,SANDYBRIDGE
+VCMPTRUE_USSD	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f c2 /r 1f		AVX,SANDYBRIDGE
+VCMPSD		xmmreg,xmmreg*,xmmrm64,imm8	rvmi:	vex.nds.lig.f2.0f c2 /r ib		AVX,SANDYBRIDGE
+; Specific aliases first, then the generic version, to keep the disassembler happy...
+VCMPEQ_OSSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 10		AVX,SANDYBRIDGE
+VCMPEQSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 00		AVX,SANDYBRIDGE
+VCMPLT_OSSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 01		AVX,SANDYBRIDGE
+VCMPLTSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 01		AVX,SANDYBRIDGE
+VCMPLE_OSSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 02		AVX,SANDYBRIDGE
+VCMPLESS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 02		AVX,SANDYBRIDGE
+VCMPUNORD_QSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 03		AVX,SANDYBRIDGE
+VCMPUNORDSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 03		AVX,SANDYBRIDGE
+VCMPNEQ_UQSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 04		AVX,SANDYBRIDGE
+VCMPNEQSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 04		AVX,SANDYBRIDGE
+VCMPNLT_USSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 05		AVX,SANDYBRIDGE
+VCMPNLTSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 05		AVX,SANDYBRIDGE
+VCMPNLE_USSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 06		AVX,SANDYBRIDGE
+VCMPNLESS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 06		AVX,SANDYBRIDGE
+VCMPORD_QSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 07		AVX,SANDYBRIDGE
+VCMPORDSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 07		AVX,SANDYBRIDGE
+VCMPEQ_UQSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 08		AVX,SANDYBRIDGE
+VCMPNGE_USSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 09		AVX,SANDYBRIDGE
+VCMPNGESS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 09		AVX,SANDYBRIDGE
+VCMPNGT_USSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 0a		AVX,SANDYBRIDGE
+VCMPNGTSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 0a		AVX,SANDYBRIDGE
+VCMPFALSE_OQSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 0b		AVX,SANDYBRIDGE
+VCMPFALSESS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 0b		AVX,SANDYBRIDGE
+VCMPNEQ_OQSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 0c		AVX,SANDYBRIDGE
+VCMPGE_OSSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 0d		AVX,SANDYBRIDGE
+VCMPGESS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 0d		AVX,SANDYBRIDGE
+VCMPGT_OSSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 0e		AVX,SANDYBRIDGE
+VCMPGTSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 0e		AVX,SANDYBRIDGE
+VCMPTRUE_UQSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 0f		AVX,SANDYBRIDGE
+VCMPTRUESS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 0f		AVX,SANDYBRIDGE
+VCMPEQ_OSSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 10		AVX,SANDYBRIDGE
+VCMPLT_OQSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 11		AVX,SANDYBRIDGE
+VCMPLE_OQSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 12		AVX,SANDYBRIDGE
+VCMPUNORD_SSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 13		AVX,SANDYBRIDGE
+VCMPNEQ_USSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 14		AVX,SANDYBRIDGE
+VCMPNLT_UQSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 15		AVX,SANDYBRIDGE
+VCMPNLE_UQSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 16		AVX,SANDYBRIDGE
+VCMPORD_SSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 17		AVX,SANDYBRIDGE
+VCMPEQ_USSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 18		AVX,SANDYBRIDGE
+VCMPNGE_UQSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 19		AVX,SANDYBRIDGE
+VCMPNGT_UQSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 1a		AVX,SANDYBRIDGE
+VCMPFALSE_OSSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 1b		AVX,SANDYBRIDGE
+VCMPNEQ_OSSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 1c		AVX,SANDYBRIDGE
+VCMPGE_OQSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 1d		AVX,SANDYBRIDGE
+VCMPGT_OQSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 1e		AVX,SANDYBRIDGE
+VCMPTRUE_USSS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f3.0f c2 /r 1f		AVX,SANDYBRIDGE
+VCMPSS		xmmreg,xmmreg*,xmmrm64,imm8	rvmi:	vex.nds.lig.f3.0f c2 /r ib		AVX,SANDYBRIDGE
+VCOMISD		xmmreg,xmmrm64			rm:	vex.lig.66.0f 2f /r			AVX,SANDYBRIDGE
+VCOMISS		xmmreg,xmmrm32			rm:	vex.lig.0f 2f /r			AVX,SANDYBRIDGE
+VCVTDQ2PD	xmmreg,xmmrm64			rm:	vex.128.f3.0f e6 /r			AVX,SANDYBRIDGE
+VCVTDQ2PD	ymmreg,xmmrm128			rm:	vex.256.f3.0f e6 /r			AVX,SANDYBRIDGE
+VCVTDQ2PS	xmmreg,xmmrm128			rm:	vex.128.0f 5b /r			AVX,SANDYBRIDGE
+VCVTDQ2PS	ymmreg,ymmrm256			rm:	vex.256.0f 5b /r			AVX,SANDYBRIDGE
+VCVTPD2DQ	xmmreg,xmmreg			rm:	vex.128.f2.0f e6 /r			AVX,SANDYBRIDGE
+VCVTPD2DQ	xmmreg,mem128			rm:	vex.128.f2.0f e6 /r			AVX,SANDYBRIDGE,SO
+VCVTPD2DQ	xmmreg,ymmreg			rm:	vex.256.f2.0f e6 /r			AVX,SANDYBRIDGE
+VCVTPD2DQ	xmmreg,mem256			rm:	vex.256.f2.0f e6 /r			AVX,SANDYBRIDGE,SY
+VCVTPD2PS	xmmreg,xmmreg			rm:	vex.128.66.0f 5a /r			AVX,SANDYBRIDGE
+VCVTPD2PS	xmmreg,mem128			rm:	vex.128.66.0f 5a /r			AVX,SANDYBRIDGE,SO
+VCVTPD2PS	xmmreg,ymmreg			rm:	vex.256.66.0f 5a /r			AVX,SANDYBRIDGE
+VCVTPD2PS	xmmreg,mem256			rm:	vex.256.66.0f 5a /r			AVX,SANDYBRIDGE,SY
+VCVTPS2DQ	xmmreg,xmmrm128			rm:	vex.128.66.0f 5b /r			AVX,SANDYBRIDGE
+VCVTPS2DQ	ymmreg,ymmrm256			rm:	vex.256.66.0f 5b /r			AVX,SANDYBRIDGE
+VCVTPS2PD	xmmreg,xmmrm64			rm:	vex.128.0f 5a /r			AVX,SANDYBRIDGE
+VCVTPS2PD	ymmreg,xmmrm128			rm:	vex.256.0f 5a /r			AVX,SANDYBRIDGE
+VCVTSD2SI	reg32,xmmrm64			rm:	vex.lig.f2.0f.w0 2d /r			AVX,SANDYBRIDGE
+VCVTSD2SI	reg64,xmmrm64			rm:	vex.lig.f2.0f.w1 2d /r			AVX,SANDYBRIDGE,LONG
+VCVTSD2SS	xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f 5a /r		AVX,SANDYBRIDGE
+VCVTSI2SD	xmmreg,xmmreg*,rm32		rvm:	vex.nds.lig.f2.0f.w0 2a /r		AVX,SANDYBRIDGE,SD
+VCVTSI2SD	xmmreg,xmmreg*,mem32		rvm:	vex.nds.lig.f2.0f.w0 2a /r		AVX,SANDYBRIDGE,ND,SD
+VCVTSI2SD	xmmreg,xmmreg*,rm64		rvm:	vex.nds.lig.f2.0f.w1 2a /r		AVX,SANDYBRIDGE,LONG,SQ
+VCVTSI2SS	xmmreg,xmmreg*,rm32		rvm:	vex.nds.lig.f3.0f.w0 2a /r		AVX,SANDYBRIDGE,SD
+VCVTSI2SS	xmmreg,xmmreg*,mem32		rvm:	vex.nds.lig.f3.0f.w0 2a /r		AVX,SANDYBRIDGE,ND,SD
+VCVTSI2SS	xmmreg,xmmreg*,rm64		rvm:	vex.nds.lig.f3.0f.w1 2a /r		AVX,SANDYBRIDGE,LONG,SQ
+VCVTSS2SD	xmmreg,xmmreg*,xmmrm32		rvm:	vex.nds.lig.f3.0f 5a /r		AVX,SANDYBRIDGE
+VCVTSS2SI	reg32,xmmrm32			rm:	vex.lig.f3.0f.w0 2d /r			AVX,SANDYBRIDGE
+VCVTSS2SI	reg64,xmmrm32			rm:	vex.lig.f3.0f.w1 2d /r			AVX,SANDYBRIDGE,LONG
+VCVTTPD2DQ	xmmreg,xmmreg			rm:	vex.128.66.0f e6 /r			AVX,SANDYBRIDGE
+VCVTTPD2DQ	xmmreg,mem128			rm:	vex.128.66.0f e6 /r			AVX,SANDYBRIDGE,SO
+VCVTTPD2DQ	xmmreg,ymmreg			rm:	vex.256.66.0f e6 /r			AVX,SANDYBRIDGE
+VCVTTPD2DQ	xmmreg,mem256			rm:	vex.256.66.0f e6 /r			AVX,SANDYBRIDGE,SY
+VCVTTPS2DQ	xmmreg,xmmrm128			rm:	vex.128.f3.0f 5b /r			AVX,SANDYBRIDGE
+VCVTTPS2DQ	ymmreg,ymmrm256			rm:	vex.256.f3.0f 5b /r			AVX,SANDYBRIDGE
+VCVTTSD2SI	reg32,xmmrm64			rm:	vex.lig.f2.0f.w0 2c /r			AVX,SANDYBRIDGE
+VCVTTSD2SI	reg64,xmmrm64			rm:	vex.lig.f2.0f.w1 2c /r			AVX,SANDYBRIDGE,LONG
+VCVTTSS2SI	reg32,xmmrm32			rm:	vex.lig.f3.0f.w0 2c /r			AVX,SANDYBRIDGE
+VCVTTSS2SI	reg64,xmmrm32			rm:	vex.lig.f3.0f.w1 2c /r			AVX,SANDYBRIDGE,LONG
+VDIVPD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 5e /r		AVX,SANDYBRIDGE
+VDIVPD		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 5e /r		AVX,SANDYBRIDGE
+VDIVPS		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f 5e /r			AVX,SANDYBRIDGE
+VDIVPS		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f 5e /r			AVX,SANDYBRIDGE
+VDIVSD		xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f 5e /r		AVX,SANDYBRIDGE
+VDIVSS		xmmreg,xmmreg*,xmmrm32		rvm:	vex.nds.lig.f3.0f 5e /r		AVX,SANDYBRIDGE
+VDPPD		xmmreg,xmmreg*,xmmrm128,imm8	rvmi:	vex.nds.128.66.0f3a 41 /r ib		AVX,SANDYBRIDGE
+VDPPS		xmmreg,xmmreg*,xmmrm128,imm8	rvmi:	vex.nds.128.66.0f3a 40 /r ib		AVX,SANDYBRIDGE
+VDPPS		ymmreg,ymmreg*,ymmrm256,imm8	rvmi:	vex.nds.256.66.0f3a 40 /r ib		AVX,SANDYBRIDGE
+VEXTRACTF128	xmmrm128,ymmreg,imm8		mri:	vex.256.66.0f3a.w0 19 /r ib		AVX,SANDYBRIDGE
+VEXTRACTPS	rm32,xmmreg,imm8		mri:	vex.128.66.0f3a 17 /r ib		AVX,SANDYBRIDGE
+VHADDPD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 7c /r		AVX,SANDYBRIDGE
+VHADDPD		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 7c /r		AVX,SANDYBRIDGE
+VHADDPS		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.f2.0f 7c /r		AVX,SANDYBRIDGE
+VHADDPS		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.f2.0f 7c /r		AVX,SANDYBRIDGE
+VHSUBPD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 7d /r		AVX,SANDYBRIDGE
+VHSUBPD		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 7d /r		AVX,SANDYBRIDGE
+VHSUBPS		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.f2.0f 7d /r		AVX,SANDYBRIDGE
+VHSUBPS		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.f2.0f 7d /r		AVX,SANDYBRIDGE
+VINSERTF128	ymmreg,ymmreg*,xmmrm128,imm8	rvmi:	vex.nds.256.66.0f3a.w0 18 /r ib	AVX,SANDYBRIDGE
+VINSERTPS	xmmreg,xmmreg*,xmmrm32,imm8	rvmi:	vex.nds.128.66.0f3a 21 /r ib		AVX,SANDYBRIDGE
+VLDDQU		xmmreg,mem128			rm:	vex.128.f2.0f f0 /r			AVX,SANDYBRIDGE
+VLDQQU		ymmreg,mem256			rm:	vex.256.f2.0f f0 /r			AVX,SANDYBRIDGE
+VLDDQU		ymmreg,mem256			rm:	vex.256.f2.0f f0 /r			AVX,SANDYBRIDGE
+VLDMXCSR	mem32				m:	vex.lz.0f ae /2			AVX,SANDYBRIDGE
+VMASKMOVDQU	xmmreg,xmmreg			rm:	vex.128.66.0f f7 /r			AVX,SANDYBRIDGE
+VMASKMOVPS	xmmreg,xmmreg,mem128		rvm:	vex.nds.128.66.0f38.w0 2c /r		AVX,SANDYBRIDGE
+VMASKMOVPS	ymmreg,ymmreg,mem256		rvm:	vex.nds.256.66.0f38.w0 2c /r		AVX,SANDYBRIDGE
+VMASKMOVPS	mem128,xmmreg,xmmreg		mvr:	vex.nds.128.66.0f38.w0 2e /r		AVX,SANDYBRIDGE,SO
+VMASKMOVPS	mem256,ymmreg,ymmreg		mvr:	vex.nds.256.66.0f38.w0 2e /r		AVX,SANDYBRIDGE,SY
+VMASKMOVPD	xmmreg,xmmreg,mem128		rvm:	vex.nds.128.66.0f38.w0 2d /r		AVX,SANDYBRIDGE
+VMASKMOVPD	ymmreg,ymmreg,mem256		rvm:	vex.nds.256.66.0f38.w0 2d /r		AVX,SANDYBRIDGE
+VMASKMOVPD	mem128,xmmreg,xmmreg		mvr:	vex.nds.128.66.0f38.w0 2f /r		AVX,SANDYBRIDGE
+VMASKMOVPD	mem256,ymmreg,ymmreg		mvr:	vex.nds.256.66.0f38.w0 2f /r		AVX,SANDYBRIDGE
+VMAXPD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 5f /r		AVX,SANDYBRIDGE
+VMAXPD		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 5f /r		AVX,SANDYBRIDGE
+VMAXPS		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f 5f /r			AVX,SANDYBRIDGE
+VMAXPS		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f 5f /r			AVX,SANDYBRIDGE
+VMAXSD		xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f 5f /r		AVX,SANDYBRIDGE
+VMAXSS		xmmreg,xmmreg*,xmmrm32		rvm:	vex.nds.lig.f3.0f 5f /r		AVX,SANDYBRIDGE
+VMINPD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 5d /r		AVX,SANDYBRIDGE
+VMINPD		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 5d /r		AVX,SANDYBRIDGE
+VMINPS		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f 5d /r			AVX,SANDYBRIDGE
+VMINPS		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f 5d /r			AVX,SANDYBRIDGE
+VMINSD		xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f 5d /r		AVX,SANDYBRIDGE
+VMINSS		xmmreg,xmmreg*,xmmrm32		rvm:	vex.nds.lig.f3.0f 5d /r		AVX,SANDYBRIDGE
+VMOVAPD		xmmreg,xmmrm128			rm:	vex.128.66.0f 28 /r			AVX,SANDYBRIDGE
+VMOVAPD		xmmrm128,xmmreg			mr:	vex.128.66.0f 29 /r			AVX,SANDYBRIDGE
+VMOVAPD		ymmreg,ymmrm256			rm:	vex.256.66.0f 28 /r			AVX,SANDYBRIDGE
+VMOVAPD		ymmrm256,ymmreg			mr:	vex.256.66.0f 29 /r			AVX,SANDYBRIDGE
+VMOVAPS		xmmreg,xmmrm128			rm:	vex.128.0f 28 /r			AVX,SANDYBRIDGE
+VMOVAPS		xmmrm128,xmmreg			mr:	vex.128.0f 29 /r			AVX,SANDYBRIDGE
+VMOVAPS		ymmreg,ymmrm256			rm:	vex.256.0f 28 /r			AVX,SANDYBRIDGE
+VMOVAPS		ymmrm256,ymmreg			mr:	vex.256.0f 29 /r			AVX,SANDYBRIDGE
+VMOVD		xmmreg,rm32			rm:	vex.128.66.0f.w0 6e /r			AVX,SANDYBRIDGE
+VMOVD		rm32,xmmreg			mr:	vex.128.66.0f.w0 7e /r			AVX,SANDYBRIDGE
+VMOVQ		xmmreg,xmmrm64			rm:	vex.128.f3.0f 7e /r			AVX,SANDYBRIDGE,SQ
+VMOVQ		xmmrm64,xmmreg			mr:	vex.128.66.0f d6 /r			AVX,SANDYBRIDGE,SQ
+VMOVQ		xmmreg,rm64			rm:	vex.128.66.0f.w1 6e /r			AVX,SANDYBRIDGE,LONG,SQ
+VMOVQ		rm64,xmmreg			mr:	vex.128.66.0f.w1 7e /r			AVX,SANDYBRIDGE,LONG,SQ
+VMOVDDUP	xmmreg,xmmrm64			rm:	vex.128.f2.0f 12 /r			AVX,SANDYBRIDGE
+VMOVDDUP	ymmreg,ymmrm256			rm:	vex.256.f2.0f 12 /r			AVX,SANDYBRIDGE
+VMOVDQA		xmmreg,xmmrm128			rm:	vex.128.66.0f 6f /r			AVX,SANDYBRIDGE
+VMOVDQA		xmmrm128,xmmreg			mr:	vex.128.66.0f 7f /r			AVX,SANDYBRIDGE
+; These are officially documented as VMOVDQA, but VMOVQQA seems more logical to me...
+VMOVQQA		ymmreg,ymmrm256			rm:	vex.256.66.0f 6f /r			AVX,SANDYBRIDGE
+VMOVQQA		ymmrm256,ymmreg			mr:	vex.256.66.0f 7f /r			AVX,SANDYBRIDGE
+VMOVDQA		ymmreg,ymmrm256			rm:	vex.256.66.0f 6f /r			AVX,SANDYBRIDGE
+VMOVDQA		ymmrm256,ymmreg			mr:	vex.256.66.0f 7f /r			AVX,SANDYBRIDGE
+VMOVDQU		xmmreg,xmmrm128			rm:	vex.128.f3.0f 6f /r			AVX,SANDYBRIDGE
+VMOVDQU		xmmrm128,xmmreg			mr:	vex.128.f3.0f 7f /r			AVX,SANDYBRIDGE
+; These are officially documented as VMOVDQU, but VMOVQQU seems more logical to me...
+VMOVQQU		ymmreg,ymmrm256			rm:	vex.256.f3.0f 6f /r			AVX,SANDYBRIDGE
+VMOVQQU		ymmrm256,ymmreg			mr:	vex.256.f3.0f 7f /r			AVX,SANDYBRIDGE
+VMOVDQU		ymmreg,ymmrm256			rm:	vex.256.f3.0f 6f /r			AVX,SANDYBRIDGE
+VMOVDQU		ymmrm256,ymmreg			mr:	vex.256.f3.0f 7f /r			AVX,SANDYBRIDGE
+VMOVHLPS	xmmreg,xmmreg*,xmmreg		rvm:	vex.nds.128.0f 12 /r			AVX,SANDYBRIDGE
+VMOVHPD		xmmreg,xmmreg*,mem64		rvm:	vex.nds.128.66.0f 16 /r		AVX,SANDYBRIDGE
+VMOVHPD		mem64,xmmreg			mr:	vex.128.66.0f 17 /r			AVX,SANDYBRIDGE
+VMOVHPS		xmmreg,xmmreg*,mem64		rvm:	vex.nds.128.0f 16 /r			AVX,SANDYBRIDGE
+VMOVHPS		mem64,xmmreg			mr:	vex.128.0f 17 /r			AVX,SANDYBRIDGE
+VMOVLHPS	xmmreg,xmmreg*,xmmreg		rvm:	vex.nds.128.0f 16 /r			AVX,SANDYBRIDGE
+VMOVLPD		xmmreg,xmmreg*,mem64		rvm:	vex.nds.128.66.0f 12 /r		AVX,SANDYBRIDGE
+VMOVLPD		mem64,xmmreg			mr:	vex.128.66.0f 13 /r			AVX,SANDYBRIDGE
+VMOVLPS		xmmreg,xmmreg*,mem64		rvm:	vex.nds.128.0f 12 /r			AVX,SANDYBRIDGE
+VMOVLPS		mem64,xmmreg			mr:	vex.128.0f 13 /r			AVX,SANDYBRIDGE
+VMOVMSKPD	reg64,xmmreg			rm:	vex.128.66.0f 50 /r			AVX,SANDYBRIDGE,LONG
+VMOVMSKPD	reg32,xmmreg			rm:	vex.128.66.0f 50 /r			AVX,SANDYBRIDGE
+VMOVMSKPD	reg64,ymmreg			rm:	vex.256.66.0f 50 /r			AVX,SANDYBRIDGE,LONG
+VMOVMSKPD	reg32,ymmreg			rm:	vex.256.66.0f 50 /r			AVX,SANDYBRIDGE
+VMOVMSKPS	reg64,xmmreg			rm:	vex.128.0f 50 /r			AVX,SANDYBRIDGE,LONG
+VMOVMSKPS	reg32,xmmreg			rm:	vex.128.0f 50 /r			AVX,SANDYBRIDGE
+VMOVMSKPS	reg64,ymmreg			rm:	vex.256.0f 50 /r			AVX,SANDYBRIDGE,LONG
+VMOVMSKPS	reg32,ymmreg			rm:	vex.256.0f 50 /r			AVX,SANDYBRIDGE
+VMOVNTDQ	mem128,xmmreg			mr:	vex.128.66.0f e7 /r			AVX,SANDYBRIDGE
+; Officially VMOVNTDQ, but VMOVNTQQ seems more logical to me...
+VMOVNTQQ	mem256,ymmreg			mr:	vex.256.66.0f e7 /r			AVX,SANDYBRIDGE
+VMOVNTDQ	mem256,ymmreg			mr:	vex.256.66.0f e7 /r			AVX,SANDYBRIDGE
+VMOVNTDQA	xmmreg,mem128			rm:	vex.128.66.0f38 2a /r			AVX,SANDYBRIDGE
+VMOVNTPD	mem128,xmmreg			mr:	vex.128.66.0f 2b /r			AVX,SANDYBRIDGE
+VMOVNTPD	mem256,ymmreg			mr:	vex.256.66.0f 2b /r			AVX,SANDYBRIDGE
+VMOVNTPS	mem128,xmmreg			mr:	vex.128.0f 2b /r			AVX,SANDYBRIDGE
+VMOVNTPS	mem256,ymmreg			mr:	vex.256.0f 2b /r			AVX,SANDYBRIDGE
+VMOVSD		xmmreg,xmmreg*,xmmreg		rvm:	vex.nds.lig.f2.0f 10 /r		AVX,SANDYBRIDGE
+VMOVSD		xmmreg,mem64			rm:	vex.lig.f2.0f 10 /r			AVX,SANDYBRIDGE
+VMOVSD		xmmreg,xmmreg*,xmmreg		mvr:	vex.nds.lig.f2.0f 11 /r		AVX,SANDYBRIDGE
+VMOVSD		mem64,xmmreg			mr:	vex.lig.f2.0f 11 /r			AVX,SANDYBRIDGE
+VMOVSHDUP	xmmreg,xmmrm128			rm:	vex.128.f3.0f 16 /r			AVX,SANDYBRIDGE
+VMOVSHDUP	ymmreg,ymmrm256			rm:	vex.256.f3.0f 16 /r			AVX,SANDYBRIDGE
+VMOVSLDUP	xmmreg,xmmrm128			rm:	vex.128.f3.0f 12 /r			AVX,SANDYBRIDGE
+VMOVSLDUP	ymmreg,ymmrm256			rm:	vex.256.f3.0f 12 /r			AVX,SANDYBRIDGE
+VMOVSS		xmmreg,xmmreg*,xmmreg		rvm:	vex.nds.lig.f3.0f 10 /r		AVX,SANDYBRIDGE
+VMOVSS		xmmreg,mem32			rm:	vex.lig.f3.0f 10 /r			AVX,SANDYBRIDGE
+VMOVSS		xmmreg,xmmreg*,xmmreg		mvr:	vex.nds.lig.f3.0f 11 /r		AVX,SANDYBRIDGE
+VMOVSS		mem32,xmmreg			mr:	vex.lig.f3.0f 11 /r			AVX,SANDYBRIDGE
+VMOVUPD		xmmreg,xmmrm128			rm:	vex.128.66.0f 10 /r			AVX,SANDYBRIDGE
+VMOVUPD		xmmrm128,xmmreg			mr:	vex.128.66.0f 11 /r			AVX,SANDYBRIDGE
+VMOVUPD		ymmreg,ymmrm256			rm:	vex.256.66.0f 10 /r			AVX,SANDYBRIDGE
+VMOVUPD		ymmrm256,ymmreg			mr:	vex.256.66.0f 11 /r			AVX,SANDYBRIDGE
+VMOVUPS		xmmreg,xmmrm128			rm:	vex.128.0f 10 /r			AVX,SANDYBRIDGE
+VMOVUPS		xmmrm128,xmmreg			mr:	vex.128.0f 11 /r			AVX,SANDYBRIDGE
+VMOVUPS		ymmreg,ymmrm256			rm:	vex.256.0f 10 /r			AVX,SANDYBRIDGE
+VMOVUPS		ymmrm256,ymmreg			mr:	vex.256.0f 11 /r			AVX,SANDYBRIDGE
+VMPSADBW	xmmreg,xmmreg*,xmmrm128,imm8	rvmi:	vex.nds.128.66.0f3a 42 /r ib		AVX,SANDYBRIDGE
+VMULPD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 59 /r		AVX,SANDYBRIDGE
+VMULPD		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 59 /r		AVX,SANDYBRIDGE
+VMULPS		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f 59 /r			AVX,SANDYBRIDGE
+VMULPS		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f 59 /r			AVX,SANDYBRIDGE
+VMULSD		xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f 59 /r		AVX,SANDYBRIDGE
+VMULSS		xmmreg,xmmreg*,xmmrm32		rvm:	vex.nds.lig.f3.0f 59 /r		AVX,SANDYBRIDGE
+VORPD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 56 /r		AVX,SANDYBRIDGE
+VORPD		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 56 /r		AVX,SANDYBRIDGE
+VORPS		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f 56 /r			AVX,SANDYBRIDGE
+VORPS		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f 56 /r			AVX,SANDYBRIDGE
+VPABSB		xmmreg,xmmrm128			rm:	vex.128.66.0f38 1c /r			AVX,SANDYBRIDGE
+VPABSW		xmmreg,xmmrm128			rm:	vex.128.66.0f38 1d /r			AVX,SANDYBRIDGE
+VPABSD		xmmreg,xmmrm128			rm:	vex.128.66.0f38 1e /r			AVX,SANDYBRIDGE
+VPACKSSWB	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 63 /r		AVX,SANDYBRIDGE
+VPACKSSDW	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 6b /r		AVX,SANDYBRIDGE
+VPACKUSWB	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 67 /r		AVX,SANDYBRIDGE
+VPACKUSDW	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 2b /r		AVX,SANDYBRIDGE
+VPADDB		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f fc /r		AVX,SANDYBRIDGE
+VPADDW		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f fd /r		AVX,SANDYBRIDGE
+VPADDD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f fe /r		AVX,SANDYBRIDGE
+VPADDQ		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f d4 /r		AVX,SANDYBRIDGE
+VPADDSB		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f ec /r		AVX,SANDYBRIDGE
+VPADDSW		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f ed /r		AVX,SANDYBRIDGE
+VPADDUSB	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f dc /r		AVX,SANDYBRIDGE
+VPADDUSW	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f dd /r		AVX,SANDYBRIDGE
+VPALIGNR	xmmreg,xmmreg*,xmmrm128,imm8	rvmi:	vex.nds.128.66.0f3a 0f /r ib		AVX,SANDYBRIDGE
+VPAND		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f db /r		AVX,SANDYBRIDGE
+VPANDN		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f df /r		AVX,SANDYBRIDGE
+VPAVGB		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f e0 /r		AVX,SANDYBRIDGE
+VPAVGW		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f e3 /r		AVX,SANDYBRIDGE
+VPBLENDVB	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	vex.nds.128.66.0f3a.w0 4c /r /is4	AVX,SANDYBRIDGE
+VPBLENDW	xmmreg,xmmreg*,xmmrm128,imm8	rvmi:	vex.nds.128.66.0f3a 0e /r ib		AVX,SANDYBRIDGE
+VPCMPESTRI	xmmreg,xmmrm128,imm8		rmi:	vex.128.66.0f3a 61 /r ib		AVX,SANDYBRIDGE
+VPCMPESTRM	xmmreg,xmmrm128,imm8		rmi:	vex.128.66.0f3a 60 /r ib		AVX,SANDYBRIDGE
+VPCMPISTRI	xmmreg,xmmrm128,imm8		rmi:	vex.128.66.0f3a 63 /r ib		AVX,SANDYBRIDGE
+VPCMPISTRM	xmmreg,xmmrm128,imm8		rmi:	vex.128.66.0f3a 62 /r ib		AVX,SANDYBRIDGE
+VPCMPEQB	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 74 /r		AVX,SANDYBRIDGE
+VPCMPEQW	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 75 /r		AVX,SANDYBRIDGE
+VPCMPEQD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 76 /r		AVX,SANDYBRIDGE
+VPCMPEQQ	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 29 /r		AVX,SANDYBRIDGE
+VPCMPGTB	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 64 /r		AVX,SANDYBRIDGE
+VPCMPGTW	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 65 /r		AVX,SANDYBRIDGE
+VPCMPGTD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 66 /r		AVX,SANDYBRIDGE
+VPCMPGTQ	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 37 /r		AVX,SANDYBRIDGE
+VPERMILPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38.w0 0d /r		AVX,SANDYBRIDGE
+VPERMILPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38.w0 0d /r		AVX,SANDYBRIDGE
+VPERMILPD	xmmreg,xmmrm128,imm8		rmi:	vex.128.66.0f3a.w0 05 /r ib		AVX,SANDYBRIDGE
+VPERMILPD	ymmreg,ymmrm256,imm8		rmi:	vex.256.66.0f3a.w0 05 /r ib		AVX,SANDYBRIDGE
+VPERMILPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38.w0 0c /r		AVX,SANDYBRIDGE
+VPERMILPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38.w0 0c /r		AVX,SANDYBRIDGE
+VPERMILPS	xmmreg,xmmrm128,imm8		rmi:	vex.128.66.0f3a.w0 04 /r ib		AVX,SANDYBRIDGE
+VPERMILPS	ymmreg,ymmrm256,imm8		rmi:	vex.256.66.0f3a.w0 04 /r ib		AVX,SANDYBRIDGE
+VPERM2F128	ymmreg,ymmreg*,ymmrm256,imm8	rvmi:	vex.nds.256.66.0f3a.w0 06 /r ib	AVX,SANDYBRIDGE
+VPEXTRB		reg64,xmmreg,imm8		mri:	vex.128.66.0f3a.w0 14 /r ib		AVX,SANDYBRIDGE,LONG
+VPEXTRB		reg32,xmmreg,imm8		mri:	vex.128.66.0f3a.w0 14 /r ib		AVX,SANDYBRIDGE
+VPEXTRB		mem8,xmmreg,imm8		mri:	vex.128.66.0f3a.w0 14 /r ib		AVX,SANDYBRIDGE
+VPEXTRW		reg64,xmmreg,imm8		rmi:	vex.128.66.0f.w0 c5 /r ib		AVX,SANDYBRIDGE,LONG
+VPEXTRW		reg32,xmmreg,imm8		rmi:	vex.128.66.0f.w0 c5 /r ib		AVX,SANDYBRIDGE
+VPEXTRW		reg64,xmmreg,imm8		mri:	vex.128.66.0f3a.w0 15 /r ib		AVX,SANDYBRIDGE,LONG
+VPEXTRW		reg32,xmmreg,imm8		mri:	vex.128.66.0f3a.w0 15 /r ib		AVX,SANDYBRIDGE
+VPEXTRW		mem16,xmmreg,imm8		mri:	vex.128.66.0f3a.w0 15 /r ib		AVX,SANDYBRIDGE
+VPEXTRD		reg64,xmmreg,imm8		mri:	vex.128.66.0f3a.w0 16 /r ib		AVX,SANDYBRIDGE,LONG
+VPEXTRD		rm32,xmmreg,imm8		mri:	vex.128.66.0f3a.w0 16 /r ib		AVX,SANDYBRIDGE
+VPEXTRQ		rm64,xmmreg,imm8		mri:	vex.128.66.0f3a.w1 16 /r ib		AVX,SANDYBRIDGE,LONG
+VPHADDW		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 01 /r		AVX,SANDYBRIDGE
+VPHADDD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 02 /r		AVX,SANDYBRIDGE
+VPHADDSW	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 03 /r		AVX,SANDYBRIDGE
+VPHMINPOSUW	xmmreg,xmmrm128			rm:	vex.128.66.0f38 41 /r			AVX,SANDYBRIDGE
+VPHSUBW		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 05 /r		AVX,SANDYBRIDGE
+VPHSUBD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 06 /r		AVX,SANDYBRIDGE
+VPHSUBSW	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 07 /r		AVX,SANDYBRIDGE
+VPINSRB		xmmreg,xmmreg*,mem8,imm8	rvmi:	vex.nds.128.66.0f3a 20 /r ib		AVX,SANDYBRIDGE
+VPINSRB		xmmreg,xmmreg*,rm8,imm8		rvmi:	vex.nds.128.66.0f3a 20 /r ib		AVX,SANDYBRIDGE
+VPINSRB		xmmreg,xmmreg*,reg32,imm8	rvmi:	vex.nds.128.66.0f3a 20 /r ib		AVX,SANDYBRIDGE
+VPINSRW		xmmreg,xmmreg*,mem16,imm8	rvmi:	vex.nds.128.66.0f c4 /r ib		AVX,SANDYBRIDGE
+VPINSRW		xmmreg,xmmreg*,rm16,imm8	rvmi:	vex.nds.128.66.0f c4 /r ib		AVX,SANDYBRIDGE
+VPINSRW		xmmreg,xmmreg*,reg32,imm8	rvmi:	vex.nds.128.66.0f c4 /r ib		AVX,SANDYBRIDGE
+VPINSRD		xmmreg,xmmreg*,mem32,imm8	rvmi:	vex.nds.128.66.0f3a.w0 22 /r ib	AVX,SANDYBRIDGE
+VPINSRD		xmmreg,xmmreg*,rm32,imm8	rvmi:	vex.nds.128.66.0f3a.w0 22 /r ib	AVX,SANDYBRIDGE
+VPINSRQ		xmmreg,xmmreg*,mem64,imm8	rvmi:	vex.nds.128.66.0f3a.w1 22 /r ib	AVX,SANDYBRIDGE,LONG
+VPINSRQ		xmmreg,xmmreg*,rm64,imm8	rvmi:	vex.nds.128.66.0f3a.w1 22 /r ib	AVX,SANDYBRIDGE,LONG
+VPMADDWD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f f5 /r		AVX,SANDYBRIDGE
+VPMADDUBSW	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 04 /r		AVX,SANDYBRIDGE
+VPMAXSB		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 3c /r		AVX,SANDYBRIDGE
+VPMAXSW		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f ee /r		AVX,SANDYBRIDGE
+VPMAXSD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 3d /r		AVX,SANDYBRIDGE
+VPMAXUB		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f de /r		AVX,SANDYBRIDGE
+VPMAXUW		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 3e /r		AVX,SANDYBRIDGE
+VPMAXUD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 3f /r		AVX,SANDYBRIDGE
+VPMINSB		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 38 /r		AVX,SANDYBRIDGE
+VPMINSW		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f ea /r		AVX,SANDYBRIDGE
+VPMINSD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 39 /r		AVX,SANDYBRIDGE
+VPMINUB		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f da /r		AVX,SANDYBRIDGE
+VPMINUW		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 3a /r		AVX,SANDYBRIDGE
+VPMINUD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 3b /r		AVX,SANDYBRIDGE
+VPMOVMSKB	reg64,xmmreg			rm:	vex.128.66.0f d7 /r			AVX,SANDYBRIDGE,LONG
+VPMOVMSKB	reg32,xmmreg			rm:	vex.128.66.0f d7 /r			AVX,SANDYBRIDGE
+VPMOVSXBW	xmmreg,xmmrm64			rm:	vex.128.66.0f38 20 /r			AVX,SANDYBRIDGE
+VPMOVSXBD	xmmreg,xmmrm32			rm:	vex.128.66.0f38 21 /r			AVX,SANDYBRIDGE
+VPMOVSXBQ	xmmreg,xmmrm16			rm:	vex.128.66.0f38 22 /r			AVX,SANDYBRIDGE
+VPMOVSXWD	xmmreg,xmmrm64			rm:	vex.128.66.0f38 23 /r			AVX,SANDYBRIDGE
+VPMOVSXWQ	xmmreg,xmmrm32			rm:	vex.128.66.0f38 24 /r			AVX,SANDYBRIDGE
+VPMOVSXDQ	xmmreg,xmmrm64			rm:	vex.128.66.0f38 25 /r			AVX,SANDYBRIDGE
+VPMOVZXBW	xmmreg,xmmrm64			rm:	vex.128.66.0f38 30 /r			AVX,SANDYBRIDGE
+VPMOVZXBD	xmmreg,xmmrm32			rm:	vex.128.66.0f38 31 /r			AVX,SANDYBRIDGE
+VPMOVZXBQ	xmmreg,xmmrm16			rm:	vex.128.66.0f38 32 /r			AVX,SANDYBRIDGE
+VPMOVZXWD	xmmreg,xmmrm64			rm:	vex.128.66.0f38 33 /r			AVX,SANDYBRIDGE
+VPMOVZXWQ	xmmreg,xmmrm32			rm:	vex.128.66.0f38 34 /r			AVX,SANDYBRIDGE
+VPMOVZXDQ	xmmreg,xmmrm64			rm:	vex.128.66.0f38 35 /r			AVX,SANDYBRIDGE
+VPMULHUW	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f e4 /r		AVX,SANDYBRIDGE
+VPMULHRSW	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 0b /r		AVX,SANDYBRIDGE
+VPMULHW		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f e5 /r		AVX,SANDYBRIDGE
+VPMULLW		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f d5 /r		AVX,SANDYBRIDGE
+VPMULLD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 40 /r		AVX,SANDYBRIDGE
+VPMULUDQ	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f f4 /r		AVX,SANDYBRIDGE
+VPMULDQ		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 28 /r		AVX,SANDYBRIDGE
+VPOR		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f eb /r		AVX,SANDYBRIDGE
+VPSADBW		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f f6 /r		AVX,SANDYBRIDGE
+VPSHUFB		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 00 /r		AVX,SANDYBRIDGE
+VPSHUFD		xmmreg,xmmrm128,imm8		rmi:	vex.128.66.0f 70 /r ib			AVX,SANDYBRIDGE
+VPSHUFHW	xmmreg,xmmrm128,imm8		rmi:	vex.128.f3.0f 70 /r ib			AVX,SANDYBRIDGE
+VPSHUFLW	xmmreg,xmmrm128,imm8		rmi:	vex.128.f2.0f 70 /r ib			AVX,SANDYBRIDGE
+VPSIGNB		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 08 /r		AVX,SANDYBRIDGE
+VPSIGNW		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 09 /r		AVX,SANDYBRIDGE
+VPSIGND		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38 0a /r		AVX,SANDYBRIDGE
+VPSLLDQ		xmmreg,xmmreg*,imm8		vmi:	vex.ndd.128.66.0f 73 /7 ib		AVX,SANDYBRIDGE
+VPSRLDQ		xmmreg,xmmreg*,imm8		vmi:	vex.ndd.128.66.0f 73 /3 ib		AVX,SANDYBRIDGE
+VPSLLW		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f f1 /r		AVX,SANDYBRIDGE
+VPSLLW		xmmreg,xmmreg*,imm8		vmi:	vex.ndd.128.66.0f 71 /6 ib		AVX,SANDYBRIDGE
+VPSLLD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f f2 /r		AVX,SANDYBRIDGE
+VPSLLD		xmmreg,xmmreg*,imm8		vmi:	vex.ndd.128.66.0f 72 /6 ib		AVX,SANDYBRIDGE
+VPSLLQ		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f f3 /r		AVX,SANDYBRIDGE
+VPSLLQ		xmmreg,xmmreg*,imm8		vmi:	vex.ndd.128.66.0f 73 /6 ib		AVX,SANDYBRIDGE
+VPSRAW		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f e1 /r		AVX,SANDYBRIDGE
+VPSRAW		xmmreg,xmmreg*,imm8		vmi:	vex.ndd.128.66.0f 71 /4 ib		AVX,SANDYBRIDGE
+VPSRAD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f e2 /r		AVX,SANDYBRIDGE
+VPSRAD		xmmreg,xmmreg*,imm8		vmi:	vex.ndd.128.66.0f 72 /4 ib		AVX,SANDYBRIDGE
+VPSRLW		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f d1 /r		AVX,SANDYBRIDGE
+VPSRLW		xmmreg,xmmreg*,imm8		vmi:	vex.ndd.128.66.0f 71 /2 ib		AVX,SANDYBRIDGE
+VPSRLD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f d2 /r		AVX,SANDYBRIDGE
+VPSRLD		xmmreg,xmmreg*,imm8		vmi:	vex.ndd.128.66.0f 72 /2 ib		AVX,SANDYBRIDGE
+VPSRLQ		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f d3 /r		AVX,SANDYBRIDGE
+VPSRLQ		xmmreg,xmmreg*,imm8		vmi:	vex.ndd.128.66.0f 73 /2 ib		AVX,SANDYBRIDGE
+VPTEST		xmmreg,xmmrm128			rm:	vex.128.66.0f38 17 /r			AVX,SANDYBRIDGE
+VPTEST		ymmreg,ymmrm256			rm:	vex.256.66.0f38 17 /r			AVX,SANDYBRIDGE
+VPSUBB		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f f8 /r		AVX,SANDYBRIDGE
+VPSUBW		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f f9 /r		AVX,SANDYBRIDGE
+VPSUBD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f fa /r		AVX,SANDYBRIDGE
+VPSUBQ		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f fb /r		AVX,SANDYBRIDGE
+VPSUBSB		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f e8 /r		AVX,SANDYBRIDGE
+VPSUBSW		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f e9 /r		AVX,SANDYBRIDGE
+VPSUBUSB	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f d8 /r		AVX,SANDYBRIDGE
+VPSUBUSW	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f d9 /r		AVX,SANDYBRIDGE
+VPUNPCKHBW	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 68 /r		AVX,SANDYBRIDGE
+VPUNPCKHWD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 69 /r		AVX,SANDYBRIDGE
+VPUNPCKHDQ	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 6a /r		AVX,SANDYBRIDGE
+VPUNPCKHQDQ	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 6d /r		AVX,SANDYBRIDGE
+VPUNPCKLBW	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 60 /r		AVX,SANDYBRIDGE
+VPUNPCKLWD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 61 /r		AVX,SANDYBRIDGE
+VPUNPCKLDQ	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 62 /r		AVX,SANDYBRIDGE
+VPUNPCKLQDQ	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 6c /r		AVX,SANDYBRIDGE
+VPXOR		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f ef /r		AVX,SANDYBRIDGE
+VRCPPS		xmmreg,xmmrm128			rm:	vex.128.0f 53 /r			AVX,SANDYBRIDGE
+VRCPPS		ymmreg,ymmrm256			rm:	vex.256.0f 53 /r			AVX,SANDYBRIDGE
+VRCPSS		xmmreg,xmmreg*,xmmrm32		rvm:	vex.nds.lig.f3.0f 53 /r		AVX,SANDYBRIDGE
+VRSQRTPS	xmmreg,xmmrm128			rm:	vex.128.0f 52 /r			AVX,SANDYBRIDGE
+VRSQRTPS	ymmreg,ymmrm256			rm:	vex.256.0f 52 /r			AVX,SANDYBRIDGE
+VRSQRTSS	xmmreg,xmmreg*,xmmrm32		rvm:	vex.nds.lig.f3.0f 52 /r		AVX,SANDYBRIDGE
+VROUNDPD	xmmreg,xmmrm128,imm8		rmi:	vex.128.66.0f3a 09 /r ib		AVX,SANDYBRIDGE
+VROUNDPD	ymmreg,ymmrm256,imm8		rmi:	vex.256.66.0f3a 09 /r ib		AVX,SANDYBRIDGE
+VROUNDPS	xmmreg,xmmrm128,imm8		rmi:	vex.128.66.0f3a 08 /r ib		AVX,SANDYBRIDGE
+VROUNDPS	ymmreg,ymmrm256,imm8		rmi:	vex.256.66.0f3a 08 /r ib		AVX,SANDYBRIDGE
+VROUNDSD	xmmreg,xmmreg*,xmmrm64,imm8	rvmi:	vex.nds.128.66.0f3a 0b /r ib		AVX,SANDYBRIDGE
+VROUNDSS	xmmreg,xmmreg*,xmmrm32,imm8	rvmi:	vex.nds.128.66.0f3a 0a /r ib		AVX,SANDYBRIDGE
+VSHUFPD		xmmreg,xmmreg*,xmmrm128,imm8	rvmi:	vex.nds.128.66.0f c6 /r ib		AVX,SANDYBRIDGE
+VSHUFPD		ymmreg,ymmreg*,ymmrm256,imm8	rvmi:	vex.nds.256.66.0f c6 /r ib		AVX,SANDYBRIDGE
+VSHUFPS		xmmreg,xmmreg*,xmmrm128,imm8	rvmi:	vex.nds.128.0f c6 /r ib		AVX,SANDYBRIDGE
+VSHUFPS		ymmreg,ymmreg*,ymmrm256,imm8	rvmi:	vex.nds.256.0f c6 /r ib		AVX,SANDYBRIDGE
+VSQRTPD		xmmreg,xmmrm128			rm:	vex.128.66.0f 51 /r			AVX,SANDYBRIDGE
+VSQRTPD		ymmreg,ymmrm256			rm:	vex.256.66.0f 51 /r			AVX,SANDYBRIDGE
+VSQRTPS		xmmreg,xmmrm128			rm:	vex.128.0f 51 /r			AVX,SANDYBRIDGE
+VSQRTPS		ymmreg,ymmrm256			rm:	vex.256.0f 51 /r			AVX,SANDYBRIDGE
+VSQRTSD		xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f 51 /r		AVX,SANDYBRIDGE
+VSQRTSS		xmmreg,xmmreg*,xmmrm32		rvm:	vex.nds.lig.f3.0f 51 /r		AVX,SANDYBRIDGE
+VSTMXCSR	mem32				m:	vex.128.0f ae /3			AVX,SANDYBRIDGE
+VSUBPD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 5c /r		AVX,SANDYBRIDGE
+VSUBPD		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 5c /r		AVX,SANDYBRIDGE
+VSUBPS		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f 5c /r			AVX,SANDYBRIDGE
+VSUBPS		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f 5c /r			AVX,SANDYBRIDGE
+VSUBSD		xmmreg,xmmreg*,xmmrm64		rvm:	vex.nds.lig.f2.0f 5c /r		AVX,SANDYBRIDGE
+VSUBSS		xmmreg,xmmreg*,xmmrm32		rvm:	vex.nds.lig.f3.0f 5c /r		AVX,SANDYBRIDGE
+VTESTPS		xmmreg,xmmrm128			rm:	vex.128.66.0f38.w0 0e /r		AVX,SANDYBRIDGE
+VTESTPS		ymmreg,ymmrm256			rm:	vex.256.66.0f38.w0 0e /r		AVX,SANDYBRIDGE
+VTESTPD		xmmreg,xmmrm128			rm:	vex.128.66.0f38.w0 0f /r		AVX,SANDYBRIDGE
+VTESTPD		ymmreg,ymmrm256			rm:	vex.256.66.0f38.w0 0f /r		AVX,SANDYBRIDGE
+VUCOMISD	xmmreg,xmmrm64			rm:	vex.lig.66.0f 2e /r			AVX,SANDYBRIDGE
+VUCOMISS	xmmreg,xmmrm32			rm:	vex.lig.0f 2e /r			AVX,SANDYBRIDGE
+VUNPCKHPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 15 /r		AVX,SANDYBRIDGE
+VUNPCKHPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 15 /r		AVX,SANDYBRIDGE
+VUNPCKHPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f 15 /r			AVX,SANDYBRIDGE
+VUNPCKHPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f 15 /r			AVX,SANDYBRIDGE
+VUNPCKLPD	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 14 /r		AVX,SANDYBRIDGE
+VUNPCKLPD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 14 /r		AVX,SANDYBRIDGE
+VUNPCKLPS	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f 14 /r			AVX,SANDYBRIDGE
+VUNPCKLPS	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f 14 /r			AVX,SANDYBRIDGE
+VXORPD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f 57 /r		AVX,SANDYBRIDGE
+VXORPD		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 57 /r		AVX,SANDYBRIDGE
+VXORPS		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.0f 57 /r			AVX,SANDYBRIDGE
+VXORPS		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.0f 57 /r			AVX,SANDYBRIDGE
+VZEROALL	void					vex.256.0f.w0 77			AVX,SANDYBRIDGE
+VZEROUPPER	void					vex.128.0f.w0 77			AVX,SANDYBRIDGE
+
+;# Intel Carry-Less Multiplication instructions (CLMUL)
+PCLMULLQLQDQ	xmmreg,xmmrm128			rm:	66 0f 3a 44 /r 00			SSE,WESTMERE
+PCLMULHQLQDQ	xmmreg,xmmrm128			rm:	66 0f 3a 44 /r 01			SSE,WESTMERE
+PCLMULLQHQDQ	xmmreg,xmmrm128			rm:	66 0f 3a 44 /r 10			SSE,WESTMERE
+PCLMULHQHQDQ	xmmreg,xmmrm128			rm:	66 0f 3a 44 /r 11			SSE,WESTMERE
+PCLMULQDQ	xmmreg,xmmrm128,imm8		rmi:	66 0f 3a 44 /r ib			SSE,WESTMERE
+
+;# Intel AVX Carry-Less Multiplication instructions (CLMUL)
+VPCLMULLQLQDQ	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f3a 44 /r 00		AVX,SANDYBRIDGE
+VPCLMULHQLQDQ	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f3a 44 /r 01		AVX,SANDYBRIDGE
+VPCLMULLQHQDQ	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f3a 44 /r 10		AVX,SANDYBRIDGE
+VPCLMULHQHQDQ	xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f3a 44 /r 11		AVX,SANDYBRIDGE
+VPCLMULQDQ	xmmreg,xmmreg*,xmmrm128,imm8	rvmi:	vex.nds.128.66.0f3a 44 /r ib		AVX,SANDYBRIDGE
+
+; Intel VPCLMULQDQ instructions
+VPCLMULLQLQDQ	ymmreg,ymmreg*,ymmrm256		rvm:fv:  vex.nds.256.66.0f3a.wig 44 /r 00	VPCLMULQDQ,FUTURE
+VPCLMULHQLQDQ	ymmreg,ymmreg*,ymmrm256		rvm:fv:  vex.nds.256.66.0f3a.wig 44 /r 01	VPCLMULQDQ,FUTURE
+VPCLMULLQHQDQ	ymmreg,ymmreg*,ymmrm256		rvm:fv:  vex.nds.256.66.0f3a.wig 44 /r 10	VPCLMULQDQ,FUTURE
+VPCLMULHQHQDQ	ymmreg,ymmreg*,ymmrm256		rvm:fv:  vex.nds.256.66.0f3a.wig 44 /r 11	VPCLMULQDQ,FUTURE
+VPCLMULQDQ	ymmreg,ymmreg*,ymmrm256,imm8	rvmi:fv: vex.nds.256.66.0f3a.wig 44 /r ib	VPCLMULQDQ,FUTURE
+
+; Intel VPCLMULQDQ + AVX512VL instructions
+VPCLMULLQLQDQ	xmmreg,xmmreg*,xmmrm128		rvm:fv:  evex.nds.128.66.0f3a.wig 44 /r 00	AVX512VL,VPCLMULQDQ,FUTURE
+VPCLMULHQLQDQ	xmmreg,xmmreg*,xmmrm128		rvm:fv:  evex.nds.128.66.0f3a.wig 44 /r 01	AVX512VL,VPCLMULQDQ,FUTURE
+VPCLMULLQHQDQ	xmmreg,xmmreg*,xmmrm128		rvm:fv:  evex.nds.128.66.0f3a.wig 44 /r 10	AVX512VL,VPCLMULQDQ,FUTURE
+VPCLMULHQHQDQ	xmmreg,xmmreg*,xmmrm128		rvm:fv:  evex.nds.128.66.0f3a.wig 44 /r 11	AVX512VL,VPCLMULQDQ,FUTURE
+VPCLMULQDQ	xmmreg,xmmreg*,xmmrm128,imm8	rvmi:fv: evex.nds.128.66.0f3a.wig 44 /r ib	AVX512VL,VPCLMULQDQ,FUTURE
+
+VPCLMULLQLQDQ	ymmreg,ymmreg*,ymmrm256		rvm:fv:  evex.nds.256.66.0f3a.wig 44 /r 00	AVX512VL,VPCLMULQDQ,FUTURE
+VPCLMULHQLQDQ	ymmreg,ymmreg*,ymmrm256		rvm:fv:  evex.nds.256.66.0f3a.wig 44 /r 01	AVX512VL,VPCLMULQDQ,FUTURE
+VPCLMULLQHQDQ	ymmreg,ymmreg*,ymmrm256		rvm:fv:  evex.nds.256.66.0f3a.wig 44 /r 10	AVX512VL,VPCLMULQDQ,FUTURE
+VPCLMULHQHQDQ	ymmreg,ymmreg*,ymmrm256		rvm:fv:  evex.nds.256.66.0f3a.wig 44 /r 11	AVX512VL,VPCLMULQDQ,FUTURE
+VPCLMULQDQ	ymmreg,ymmreg*,ymmrm256,imm8	rvmi:fv: evex.nds.256.66.0f3a.wig 44 /r ib	AVX512VL,VPCLMULQDQ,FUTURE
+
+; Intel VPCLMULQDQ + AVX512F instructions
+VPCLMULLQLQDQ	zmmreg,zmmreg*,zmmrm512		rvm:fv:  evex.nds.512.66.0f3a.wig 44 /r 00	AVX512,VPCLMULQDQ,FUTURE
+VPCLMULHQLQDQ	zmmreg,zmmreg*,zmmrm512		rvm:fv:  evex.nds.512.66.0f3a.wig 44 /r 01	AVX512,VPCLMULQDQ,FUTURE
+VPCLMULLQHQDQ	zmmreg,zmmreg*,zmmrm512		rvm:fv:  evex.nds.512.66.0f3a.wig 44 /r 10	AVX512,VPCLMULQDQ,FUTURE
+VPCLMULHQHQDQ	zmmreg,zmmreg*,zmmrm512		rvm:fv:  evex.nds.512.66.0f3a.wig 44 /r 11	AVX512,VPCLMULQDQ,FUTURE
+VPCLMULQDQ	zmmreg,zmmreg*,zmmrm512,imm8	rvmi:fv: evex.nds.512.66.0f3a.wig 44 /r ib	AVX512,VPCLMULQDQ,FUTURE
+
+;# Intel Fused Multiply-Add instructions (FMA)
+VFMADD132PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 98 /r		FMA,FUTURE
+VFMADD132PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 98 /r		FMA,FUTURE
+VFMADD132PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 98 /r		FMA,FUTURE
+VFMADD132PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 98 /r		FMA,FUTURE
+VFMADD312PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 98 /r		FMA,FUTURE
+VFMADD312PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 98 /r		FMA,FUTURE
+VFMADD312PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 98 /r		FMA,FUTURE
+VFMADD312PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 98 /r		FMA,FUTURE
+VFMADD213PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 a8 /r		FMA,FUTURE
+VFMADD213PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 a8 /r		FMA,FUTURE
+VFMADD213PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 a8 /r		FMA,FUTURE
+VFMADD213PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 a8 /r		FMA,FUTURE
+VFMADD123PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 a8 /r		FMA,FUTURE
+VFMADD123PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 a8 /r		FMA,FUTURE
+VFMADD123PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 a8 /r		FMA,FUTURE
+VFMADD123PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 a8 /r		FMA,FUTURE
+VFMADD231PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 b8 /r		FMA,FUTURE
+VFMADD231PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 b8 /r		FMA,FUTURE
+VFMADD231PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 b8 /r		FMA,FUTURE
+VFMADD231PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 b8 /r		FMA,FUTURE
+VFMADD321PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 b8 /r		FMA,FUTURE
+VFMADD321PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 b8 /r		FMA,FUTURE
+VFMADD321PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 b8 /r		FMA,FUTURE
+VFMADD321PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 b8 /r		FMA,FUTURE
+VFMADDSUB132PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 96 /r		FMA,FUTURE
+VFMADDSUB132PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 96 /r		FMA,FUTURE
+VFMADDSUB132PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 96 /r		FMA,FUTURE
+VFMADDSUB132PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 96 /r		FMA,FUTURE
+VFMADDSUB312PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 96 /r		FMA,FUTURE
+VFMADDSUB312PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 96 /r		FMA,FUTURE
+VFMADDSUB312PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 96 /r		FMA,FUTURE
+VFMADDSUB312PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 96 /r		FMA,FUTURE
+VFMADDSUB213PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 a6 /r		FMA,FUTURE
+VFMADDSUB213PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 a6 /r		FMA,FUTURE
+VFMADDSUB213PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 a6 /r		FMA,FUTURE
+VFMADDSUB213PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 a6 /r		FMA,FUTURE
+VFMADDSUB123PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 a6 /r		FMA,FUTURE
+VFMADDSUB123PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 a6 /r		FMA,FUTURE
+VFMADDSUB123PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 a6 /r		FMA,FUTURE
+VFMADDSUB123PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 a6 /r		FMA,FUTURE
+VFMADDSUB231PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 b6 /r		FMA,FUTURE
+VFMADDSUB231PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 b6 /r		FMA,FUTURE
+VFMADDSUB231PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 b6 /r		FMA,FUTURE
+VFMADDSUB231PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 b6 /r		FMA,FUTURE
+VFMADDSUB321PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 b6 /r		FMA,FUTURE
+VFMADDSUB321PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 b6 /r		FMA,FUTURE
+VFMADDSUB321PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 b6 /r		FMA,FUTURE
+VFMADDSUB321PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 b6 /r		FMA,FUTURE
+VFMSUB132PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 9a /r		FMA,FUTURE
+VFMSUB132PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 9a /r		FMA,FUTURE
+VFMSUB132PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 9a /r		FMA,FUTURE
+VFMSUB132PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 9a /r		FMA,FUTURE
+VFMSUB312PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 9a /r		FMA,FUTURE
+VFMSUB312PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 9a /r		FMA,FUTURE
+VFMSUB312PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 9a /r		FMA,FUTURE
+VFMSUB312PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 9a /r		FMA,FUTURE
+VFMSUB213PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 aa /r		FMA,FUTURE
+VFMSUB213PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 aa /r		FMA,FUTURE
+VFMSUB213PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 aa /r		FMA,FUTURE
+VFMSUB213PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 aa /r		FMA,FUTURE
+VFMSUB123PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 aa /r		FMA,FUTURE
+VFMSUB123PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 aa /r		FMA,FUTURE
+VFMSUB123PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 aa /r		FMA,FUTURE
+VFMSUB123PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 aa /r		FMA,FUTURE
+VFMSUB231PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 ba /r		FMA,FUTURE
+VFMSUB231PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 ba /r		FMA,FUTURE
+VFMSUB231PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 ba /r		FMA,FUTURE
+VFMSUB231PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 ba /r		FMA,FUTURE
+VFMSUB321PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 ba /r		FMA,FUTURE
+VFMSUB321PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 ba /r		FMA,FUTURE
+VFMSUB321PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 ba /r		FMA,FUTURE
+VFMSUB321PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 ba /r		FMA,FUTURE
+VFMSUBADD132PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 97 /r		FMA,FUTURE
+VFMSUBADD132PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 97 /r		FMA,FUTURE
+VFMSUBADD132PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 97 /r		FMA,FUTURE
+VFMSUBADD132PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 97 /r		FMA,FUTURE
+VFMSUBADD312PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 97 /r		FMA,FUTURE
+VFMSUBADD312PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 97 /r		FMA,FUTURE
+VFMSUBADD312PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 97 /r		FMA,FUTURE
+VFMSUBADD312PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 97 /r		FMA,FUTURE
+VFMSUBADD213PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 a7 /r		FMA,FUTURE
+VFMSUBADD213PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 a7 /r		FMA,FUTURE
+VFMSUBADD213PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 a7 /r		FMA,FUTURE
+VFMSUBADD213PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 a7 /r		FMA,FUTURE
+VFMSUBADD123PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 a7 /r		FMA,FUTURE
+VFMSUBADD123PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 a7 /r		FMA,FUTURE
+VFMSUBADD123PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 a7 /r		FMA,FUTURE
+VFMSUBADD123PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 a7 /r		FMA,FUTURE
+VFMSUBADD231PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 b7 /r		FMA,FUTURE
+VFMSUBADD231PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 b7 /r		FMA,FUTURE
+VFMSUBADD231PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 b7 /r		FMA,FUTURE
+VFMSUBADD231PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 b7 /r		FMA,FUTURE
+VFMSUBADD321PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 b7 /r		FMA,FUTURE
+VFMSUBADD321PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 b7 /r		FMA,FUTURE
+VFMSUBADD321PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 b7 /r		FMA,FUTURE
+VFMSUBADD321PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 b7 /r		FMA,FUTURE
+VFNMADD132PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 9c /r		FMA,FUTURE
+VFNMADD132PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 9c /r		FMA,FUTURE
+VFNMADD132PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 9c /r		FMA,FUTURE
+VFNMADD132PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 9c /r		FMA,FUTURE
+VFNMADD312PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 9c /r		FMA,FUTURE
+VFNMADD312PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 9c /r		FMA,FUTURE
+VFNMADD312PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 9c /r		FMA,FUTURE
+VFNMADD312PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 9c /r		FMA,FUTURE
+VFNMADD213PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 ac /r		FMA,FUTURE
+VFNMADD213PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 ac /r		FMA,FUTURE
+VFNMADD213PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 ac /r		FMA,FUTURE
+VFNMADD213PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 ac /r		FMA,FUTURE
+VFNMADD123PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 ac /r		FMA,FUTURE
+VFNMADD123PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 ac /r		FMA,FUTURE
+VFNMADD123PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 ac /r		FMA,FUTURE
+VFNMADD123PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 ac /r		FMA,FUTURE
+VFNMADD231PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 bc /r		FMA,FUTURE
+VFNMADD231PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 bc /r		FMA,FUTURE
+VFNMADD231PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 bc /r		FMA,FUTURE
+VFNMADD231PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 bc /r		FMA,FUTURE
+VFNMADD321PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 bc /r		FMA,FUTURE
+VFNMADD321PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 bc /r		FMA,FUTURE
+VFNMADD321PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 bc /r		FMA,FUTURE
+VFNMADD321PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 bc /r		FMA,FUTURE
+VFNMSUB132PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 9e /r		FMA,FUTURE
+VFNMSUB132PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 9e /r		FMA,FUTURE
+VFNMSUB132PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 9e /r		FMA,FUTURE
+VFNMSUB132PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 9e /r		FMA,FUTURE
+VFNMSUB312PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 9e /r		FMA,FUTURE
+VFNMSUB312PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 9e /r		FMA,FUTURE
+VFNMSUB312PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 9e /r		FMA,FUTURE
+VFNMSUB312PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 9e /r		FMA,FUTURE
+VFNMSUB213PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 ae /r		FMA,FUTURE
+VFNMSUB213PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 ae /r		FMA,FUTURE
+VFNMSUB213PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 ae /r		FMA,FUTURE
+VFNMSUB213PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 ae /r		FMA,FUTURE
+VFNMSUB123PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 ae /r		FMA,FUTURE
+VFNMSUB123PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 ae /r		FMA,FUTURE
+VFNMSUB123PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 ae /r		FMA,FUTURE
+VFNMSUB123PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 ae /r		FMA,FUTURE
+VFNMSUB231PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 be /r		FMA,FUTURE
+VFNMSUB231PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 be /r		FMA,FUTURE
+VFNMSUB231PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 be /r		FMA,FUTURE
+VFNMSUB231PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 be /r		FMA,FUTURE
+VFNMSUB321PS	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w0 be /r		FMA,FUTURE
+VFNMSUB321PS	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w0 be /r		FMA,FUTURE
+VFNMSUB321PD	xmmreg,xmmreg,xmmrm128		rvm:	vex.dds.128.66.0f38.w1 be /r		FMA,FUTURE
+VFNMSUB321PD	ymmreg,ymmreg,ymmrm256		rvm:	vex.dds.256.66.0f38.w1 be /r		FMA,FUTURE
+VFMADD132SS	xmmreg,xmmreg,xmmrm32		rvm:	vex.dds.128.66.0f38.w0 99 /r		FMA,FUTURE
+VFMADD132SD	xmmreg,xmmreg,xmmrm64		rvm:	vex.dds.128.66.0f38.w1 99 /r		FMA,FUTURE
+VFMADD312SS	xmmreg,xmmreg,xmmrm32		rvm:	vex.dds.128.66.0f38.w0 99 /r		FMA,FUTURE
+VFMADD312SD	xmmreg,xmmreg,xmmrm64		rvm:	vex.dds.128.66.0f38.w1 99 /r		FMA,FUTURE
+VFMADD213SS	xmmreg,xmmreg,xmmrm32		rvm:	vex.dds.128.66.0f38.w0 a9 /r		FMA,FUTURE
+VFMADD213SD	xmmreg,xmmreg,xmmrm64		rvm:	vex.dds.128.66.0f38.w1 a9 /r		FMA,FUTURE
+VFMADD123SS	xmmreg,xmmreg,xmmrm32		rvm:	vex.dds.128.66.0f38.w0 a9 /r		FMA,FUTURE
+VFMADD123SD	xmmreg,xmmreg,xmmrm64		rvm:	vex.dds.128.66.0f38.w1 a9 /r		FMA,FUTURE
+VFMADD231SS	xmmreg,xmmreg,xmmrm32		rvm:	vex.dds.128.66.0f38.w0 b9 /r		FMA,FUTURE
+VFMADD231SD	xmmreg,xmmreg,xmmrm64		rvm:	vex.dds.128.66.0f38.w1 b9 /r		FMA,FUTURE
+VFMADD321SS	xmmreg,xmmreg,xmmrm32		rvm:	vex.dds.128.66.0f38.w0 b9 /r		FMA,FUTURE
+VFMADD321SD	xmmreg,xmmreg,xmmrm64		rvm:	vex.dds.128.66.0f38.w1 b9 /r		FMA,FUTURE
+VFMSUB132SS	xmmreg,xmmreg,xmmrm32		rvm:	vex.dds.128.66.0f38.w0 9b /r		FMA,FUTURE
+VFMSUB132SD	xmmreg,xmmreg,xmmrm64		rvm:	vex.dds.128.66.0f38.w1 9b /r		FMA,FUTURE
+VFMSUB312SS	xmmreg,xmmreg,xmmrm32		rvm:	vex.dds.128.66.0f38.w0 9b /r		FMA,FUTURE
+VFMSUB312SD	xmmreg,xmmreg,xmmrm64		rvm:	vex.dds.128.66.0f38.w1 9b /r		FMA,FUTURE
+VFMSUB213SS	xmmreg,xmmreg,xmmrm32		rvm:	vex.dds.128.66.0f38.w0 ab /r		FMA,FUTURE
+VFMSUB213SD	xmmreg,xmmreg,xmmrm64		rvm:	vex.dds.128.66.0f38.w1 ab /r		FMA,FUTURE
+VFMSUB123SS	xmmreg,xmmreg,xmmrm32		rvm:	vex.dds.128.66.0f38.w0 ab /r		FMA,FUTURE
+VFMSUB123SD	xmmreg,xmmreg,xmmrm64		rvm:	vex.dds.128.66.0f38.w1 ab /r		FMA,FUTURE
+VFMSUB231SS	xmmreg,xmmreg,xmmrm32		rvm:	vex.dds.128.66.0f38.w0 bb /r		FMA,FUTURE
+VFMSUB231SD	xmmreg,xmmreg,xmmrm64		rvm:	vex.dds.128.66.0f38.w1 bb /r		FMA,FUTURE
+VFMSUB321SS	xmmreg,xmmreg,xmmrm32		rvm:	vex.dds.128.66.0f38.w0 bb /r		FMA,FUTURE
+VFMSUB321SD	xmmreg,xmmreg,xmmrm64		rvm:	vex.dds.128.66.0f38.w1 bb /r		FMA,FUTURE
+VFNMADD132SS	xmmreg,xmmreg,xmmrm32		rvm:	vex.dds.128.66.0f38.w0 9d /r		FMA,FUTURE
+VFNMADD132SD	xmmreg,xmmreg,xmmrm64		rvm:	vex.dds.128.66.0f38.w1 9d /r		FMA,FUTURE
+VFNMADD312SS	xmmreg,xmmreg,xmmrm32		rvm:	vex.dds.128.66.0f38.w0 9d /r		FMA,FUTURE
+VFNMADD312SD	xmmreg,xmmreg,xmmrm64		rvm:	vex.dds.128.66.0f38.w1 9d /r		FMA,FUTURE
+VFNMADD213SS	xmmreg,xmmreg,xmmrm32		rvm:	vex.dds.128.66.0f38.w0 ad /r		FMA,FUTURE
+VFNMADD213SD	xmmreg,xmmreg,xmmrm64		rvm:	vex.dds.128.66.0f38.w1 ad /r		FMA,FUTURE
+VFNMADD123SS	xmmreg,xmmreg,xmmrm32		rvm:	vex.dds.128.66.0f38.w0 ad /r		FMA,FUTURE
+VFNMADD123SD	xmmreg,xmmreg,xmmrm64		rvm:	vex.dds.128.66.0f38.w1 ad /r		FMA,FUTURE
+VFNMADD231SS	xmmreg,xmmreg,xmmrm32		rvm:	vex.dds.128.66.0f38.w0 bd /r		FMA,FUTURE
+VFNMADD231SD	xmmreg,xmmreg,xmmrm64		rvm:	vex.dds.128.66.0f38.w1 bd /r		FMA,FUTURE
+VFNMADD321SS	xmmreg,xmmreg,xmmrm32		rvm:	vex.dds.128.66.0f38.w0 bd /r		FMA,FUTURE
+VFNMADD321SD	xmmreg,xmmreg,xmmrm64		rvm:	vex.dds.128.66.0f38.w1 bd /r		FMA,FUTURE
+VFNMSUB132SS	xmmreg,xmmreg,xmmrm32		rvm:	vex.dds.128.66.0f38.w0 9f /r		FMA,FUTURE
+VFNMSUB132SD	xmmreg,xmmreg,xmmrm64		rvm:	vex.dds.128.66.0f38.w1 9f /r		FMA,FUTURE
+VFNMSUB312SS	xmmreg,xmmreg,xmmrm32		rvm:	vex.dds.128.66.0f38.w0 9f /r		FMA,FUTURE
+VFNMSUB312SD	xmmreg,xmmreg,xmmrm64		rvm:	vex.dds.128.66.0f38.w1 9f /r		FMA,FUTURE
+VFNMSUB213SS	xmmreg,xmmreg,xmmrm32		rvm:	vex.dds.128.66.0f38.w0 af /r		FMA,FUTURE
+VFNMSUB213SD	xmmreg,xmmreg,xmmrm64		rvm:	vex.dds.128.66.0f38.w1 af /r		FMA,FUTURE
+VFNMSUB123SS	xmmreg,xmmreg,xmmrm32		rvm:	vex.dds.128.66.0f38.w0 af /r		FMA,FUTURE
+VFNMSUB123SD	xmmreg,xmmreg,xmmrm64		rvm:	vex.dds.128.66.0f38.w1 af /r		FMA,FUTURE
+VFNMSUB231SS	xmmreg,xmmreg,xmmrm32		rvm:	vex.dds.128.66.0f38.w0 bf /r		FMA,FUTURE
+VFNMSUB231SD	xmmreg,xmmreg,xmmrm64		rvm:	vex.dds.128.66.0f38.w1 bf /r		FMA,FUTURE
+VFNMSUB321SS	xmmreg,xmmreg,xmmrm32		rvm:	vex.dds.128.66.0f38.w0 bf /r		FMA,FUTURE
+VFNMSUB321SD	xmmreg,xmmreg,xmmrm64		rvm:	vex.dds.128.66.0f38.w1 bf /r		FMA,FUTURE
+
+;# Intel post-32 nm processor instructions
+;
+; Per AVX spec revision 7, document 319433-007
+RDFSBASE	reg32				m:	norexw f3 0f ae /0			LONG,FUTURE
+RDFSBASE	reg64				m:	o64 f3 0f ae /0			LONG,FUTURE
+RDGSBASE	reg32				m:	norexw f3 0f ae /1			LONG,FUTURE
+RDGSBASE	reg64				m:	o64 f3 0f ae /1			LONG,FUTURE
+RDRAND		reg16				m:	o16 0f c7 /6				FUTURE
+RDRAND		reg32				m:	o32 0f c7 /6				FUTURE
+RDRAND		reg64				m:	o64 0f c7 /6				LONG,FUTURE
+WRFSBASE	reg32				m:	norexw f3 0f ae /2			LONG,FUTURE
+WRFSBASE	reg64				m:	o64 f3 0f ae /2			LONG,FUTURE
+WRGSBASE	reg32				m:	norexw f3 0f ae /3			LONG,FUTURE
+WRGSBASE	reg64				m:	o64 f3 0f ae /3			LONG,FUTURE
+VCVTPH2PS	ymmreg,xmmrm128			rm:	vex.256.66.0f38.w0 13 /r		AVX,FUTURE
+VCVTPH2PS	xmmreg,xmmrm64			rm:	vex.128.66.0f38.w0 13 /r		AVX,FUTURE
+VCVTPS2PH	xmmrm128,ymmreg,imm8		mri:	vex.256.66.0f3a.w0 1d /r ib		AVX,FUTURE
+VCVTPS2PH	xmmrm64,xmmreg,imm8		mri:	vex.128.66.0f3a.w0 1d /r ib		AVX,FUTURE
+
+; Per AVX spec revision 13, document 319433-013
+ADCX		reg32,rm32			rm:	norexw 66 0f 38 f6 /r			FUTURE
+ADCX		reg64,rm64			rm:	o64 66 0f 38 f6 /r			LONG,FUTURE
+ADOX		reg32,rm32			rm:	norexw f3 0f 38 f6 /r			FUTURE
+ADOX		reg64,rm64			rm:	o64 f3 0f 38 f6 /r			LONG,FUTURE
+RDSEED		reg16				m:	o16 0f c7 /7				FUTURE
+RDSEED		reg32				m:	o32 0f c7 /7				FUTURE
+RDSEED		reg64				m:	o64 0f c7 /7				LONG,FUTURE
+
+;# Supervisor Mode Access Prevention (SMAP)
+CLAC		void					np 0f 01 ca				SMAP,PRIV,FUTURE
+STAC		void					np 0f 01 cb				SMAP,PRIV,FUTURE
+
+;# VIA (Centaur) security instructions
+XSTORE		void					0f a7 c0				PENT,CYRIX
+XCRYPTECB	void					mustrep 0f a7 c8			PENT,CYRIX
+XCRYPTCBC	void					mustrep 0f a7 d0			PENT,CYRIX
+XCRYPTCTR	void					mustrep 0f a7 d8			PENT,CYRIX
+XCRYPTCFB	void					mustrep 0f a7 e0			PENT,CYRIX
+XCRYPTOFB	void					mustrep 0f a7 e8			PENT,CYRIX
+MONTMUL		void					mustrep 0f a6 c0			PENT,CYRIX
+XSHA1		void					mustrep 0f a6 c8			PENT,CYRIX
+XSHA256		void					mustrep 0f a6 d0			PENT,CYRIX
+
+;# AMD Lightweight Profiling (LWP) instructions
+;
+; based on pub number 43724 revision 3.04 date August 2009
+;
+; updated to match draft from AMD developer (patch has been
+; sent to binutils
+; 2010-03-22 Quentin Neill <quentin.neill@amd.com>
+;	     Sebastian Pop  <sebastian.pop@amd.com>
+;
+LLWPCB		reg32				m: xop.m9.w0.l0.p0 12 /0			AMD,386
+LLWPCB		reg64				m: xop.m9.w1.l0.p0 12 /0			AMD,X86_64,LONG
+
+SLWPCB		reg32				m: xop.m9.w0.l0.p0 12 /1			AMD,386
+SLWPCB		reg64				m: xop.m9.w1.l0.p0 12 /1			AMD,X86_64,LONG
+
+LWPVAL		reg32,rm32,imm32		vmi: xop.m10.w0.ndd.l0.p0 12 /1 id		AMD,386
+LWPVAL		reg64,rm32,imm32		vmi: xop.m10.w1.ndd.l0.p0 12 /1 id		AMD,X86_64,LONG
+
+LWPINS		reg32,rm32,imm32		vmi: xop.m10.w0.ndd.l0.p0 12 /0 id		AMD,386
+LWPINS		reg64,rm32,imm32		vmi: xop.m10.w1.ndd.l0.p0 12 /0 id		AMD,X86_64,LONG
+
+;# AMD XOP and FMA4 instructions (SSE5)
+;
+; based on pub number 43479 revision 3.04 dated November 2009
+;
+VFMADDPD	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	vex.m3.w0.nds.l0.p1 69 /r /is4		AMD,SSE5
+VFMADDPD	ymmreg,ymmreg*,ymmrm256,ymmreg	rvms:	vex.m3.w0.nds.l1.p1 69 /r /is4		AMD,SSE5
+VFMADDPD	xmmreg,xmmreg*,xmmreg,xmmrm128	rvsm:	vex.m3.w1.nds.l0.p1 69 /r /is4		AMD,SSE5
+VFMADDPD	ymmreg,ymmreg*,ymmreg,ymmrm256	rvsm:	vex.m3.w1.nds.l1.p1 69 /r /is4		AMD,SSE5
+
+VFMADDPS	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	vex.m3.w0.nds.l0.p1 68 /r /is4		AMD,SSE5
+VFMADDPS	ymmreg,ymmreg*,ymmrm256,ymmreg	rvms:	vex.m3.w0.nds.l1.p1 68 /r /is4		AMD,SSE5
+VFMADDPS	xmmreg,xmmreg*,xmmreg,xmmrm128	rvsm:	vex.m3.w1.nds.l0.p1 68 /r /is4		AMD,SSE5
+VFMADDPS	ymmreg,ymmreg*,ymmreg,ymmrm256	rvsm:	vex.m3.w1.nds.l1.p1 68 /r /is4		AMD,SSE5
+
+VFMADDSD	xmmreg,xmmreg*,xmmrm64,xmmreg	rvms:	vex.m3.w0.nds.l0.p1 6b /r /is4		AMD,SSE5
+VFMADDSD	xmmreg,xmmreg*,xmmreg,xmmrm64	rvsm:	vex.m3.w1.nds.l0.p1 6b /r /is4		AMD,SSE5
+
+VFMADDSS	xmmreg,xmmreg*,xmmrm32,xmmreg	rvms:	vex.m3.w0.nds.l0.p1 6a /r /is4		AMD,SSE5
+VFMADDSS	xmmreg,xmmreg*,xmmreg,xmmrm32	rvsm:	vex.m3.w1.nds.l0.p1 6a /r /is4		AMD,SSE5
+
+VFMADDSUBPD	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	vex.m3.w0.nds.l0.p1 5d /r /is4		AMD,SSE5
+VFMADDSUBPD	ymmreg,ymmreg*,ymmrm256,ymmreg	rvms:	vex.m3.w0.nds.l1.p1 5d /r /is4		AMD,SSE5
+VFMADDSUBPD	xmmreg,xmmreg*,xmmreg,xmmrm128	rvsm:	vex.m3.w1.nds.l0.p1 5d /r /is4		AMD,SSE5
+VFMADDSUBPD	ymmreg,ymmreg*,ymmreg,ymmrm256	rvsm:	vex.m3.w1.nds.l1.p1 5d /r /is4		AMD,SSE5
+
+VFMADDSUBPS	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	vex.m3.w0.nds.l0.p1 5c /r /is4		AMD,SSE5
+VFMADDSUBPS	ymmreg,ymmreg*,ymmrm256,ymmreg	rvms:	vex.m3.w0.nds.l1.p1 5c /r /is4		AMD,SSE5
+VFMADDSUBPS	xmmreg,xmmreg*,xmmreg,xmmrm128	rvsm:	vex.m3.w1.nds.l0.p1 5c /r /is4		AMD,SSE5
+VFMADDSUBPS	ymmreg,ymmreg*,ymmreg,ymmrm256	rvsm:	vex.m3.w1.nds.l1.p1 5c /r /is4		AMD,SSE5
+
+VFMSUBADDPD	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	vex.m3.w0.nds.l0.p1 5f /r /is4		AMD,SSE5
+VFMSUBADDPD	ymmreg,ymmreg*,ymmrm256,ymmreg	rvms:	vex.m3.w0.nds.l1.p1 5f /r /is4		AMD,SSE5
+VFMSUBADDPD	xmmreg,xmmreg*,xmmreg,xmmrm128	rvsm:	vex.m3.w1.nds.l0.p1 5f /r /is4		AMD,SSE5
+VFMSUBADDPD	ymmreg,ymmreg*,ymmreg,ymmrm256	rvsm:	vex.m3.w1.nds.l1.p1 5f /r /is4		AMD,SSE5
+
+VFMSUBADDPS	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	vex.m3.w0.nds.l0.p1 5e /r /is4		AMD,SSE5
+VFMSUBADDPS	ymmreg,ymmreg*,ymmrm256,ymmreg	rvms:	vex.m3.w0.nds.l1.p1 5e /r /is4		AMD,SSE5
+VFMSUBADDPS	xmmreg,xmmreg*,xmmreg,xmmrm128	rvsm:	vex.m3.w1.nds.l0.p1 5e /r /is4		AMD,SSE5
+VFMSUBADDPS	ymmreg,ymmreg*,ymmreg,ymmrm256	rvsm:	vex.m3.w1.nds.l1.p1 5e /r /is4		AMD,SSE5
+
+VFMSUBPD	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	vex.m3.w0.nds.l0.p1 6d /r /is4		AMD,SSE5
+VFMSUBPD	ymmreg,ymmreg*,ymmrm256,ymmreg	rvms:	vex.m3.w0.nds.l1.p1 6d /r /is4		AMD,SSE5
+VFMSUBPD	xmmreg,xmmreg*,xmmreg,xmmrm128	rvsm:	vex.m3.w1.nds.l0.p1 6d /r /is4		AMD,SSE5
+VFMSUBPD	ymmreg,ymmreg*,ymmreg,ymmrm256	rvsm:	vex.m3.w1.nds.l1.p1 6d /r /is4		AMD,SSE5
+
+VFMSUBPS	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	vex.m3.w0.nds.l0.p1 6c /r /is4		AMD,SSE5
+VFMSUBPS	ymmreg,ymmreg*,ymmrm256,ymmreg	rvms:	vex.m3.w0.nds.l1.p1 6c /r /is4		AMD,SSE5
+VFMSUBPS	xmmreg,xmmreg*,xmmreg,xmmrm128	rvsm:	vex.m3.w1.nds.l0.p1 6c /r /is4		AMD,SSE5
+VFMSUBPS	ymmreg,ymmreg*,ymmreg,ymmrm256	rvsm:	vex.m3.w1.nds.l1.p1 6c /r /is4		AMD,SSE5
+
+VFMSUBSD	xmmreg,xmmreg*,xmmrm64,xmmreg	rvms:	vex.m3.w0.nds.l0.p1 6f /r /is4		AMD,SSE5
+VFMSUBSD	xmmreg,xmmreg*,xmmreg,xmmrm64	rvsm:	vex.m3.w1.nds.l0.p1 6f /r /is4		AMD,SSE5
+
+VFMSUBSS	xmmreg,xmmreg*,xmmrm32,xmmreg	rvms:	vex.m3.w0.nds.l0.p1 6e /r /is4		AMD,SSE5
+VFMSUBSS	xmmreg,xmmreg*,xmmreg,xmmrm32	rvsm:	vex.m3.w1.nds.l0.p1 6e /r /is4		AMD,SSE5
+
+VFNMADDPD	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	vex.m3.w0.nds.l0.p1 79 /r /is4		AMD,SSE5
+VFNMADDPD	ymmreg,ymmreg*,ymmrm256,ymmreg	rvms:	vex.m3.w0.nds.l1.p1 79 /r /is4		AMD,SSE5
+VFNMADDPD	xmmreg,xmmreg*,xmmreg,xmmrm128	rvsm:	vex.m3.w1.nds.l0.p1 79 /r /is4		AMD,SSE5
+VFNMADDPD	ymmreg,ymmreg*,ymmreg,ymmrm256	rvsm:	vex.m3.w1.nds.l1.p1 79 /r /is4		AMD,SSE5
+
+VFNMADDPS	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	vex.m3.w0.nds.l0.p1 78 /r /is4		AMD,SSE5
+VFNMADDPS	ymmreg,ymmreg*,ymmrm256,ymmreg	rvms:	vex.m3.w0.nds.l1.p1 78 /r /is4		AMD,SSE5
+VFNMADDPS	xmmreg,xmmreg*,xmmreg,xmmrm128	rvsm:	vex.m3.w1.nds.l0.p1 78 /r /is4		AMD,SSE5
+VFNMADDPS	ymmreg,ymmreg*,ymmreg,ymmrm256	rvsm:	vex.m3.w1.nds.l1.p1 78 /r /is4		AMD,SSE5
+
+VFNMADDSD	xmmreg,xmmreg*,xmmrm64,xmmreg	rvms:	vex.m3.w0.nds.l0.p1 7b /r /is4		AMD,SSE5
+VFNMADDSD	xmmreg,xmmreg*,xmmreg,xmmrm64	rvsm:	vex.m3.w1.nds.l0.p1 7b /r /is4		AMD,SSE5
+
+VFNMADDSS	xmmreg,xmmreg*,xmmrm32,xmmreg	rvms:	vex.m3.w0.nds.l0.p1 7a /r /is4		AMD,SSE5
+VFNMADDSS	xmmreg,xmmreg*,xmmreg,xmmrm32	rvsm:	vex.m3.w1.nds.l0.p1 7a /r /is4		AMD,SSE5
+
+VFNMSUBPD	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	vex.m3.w0.nds.l0.p1 7d /r /is4		AMD,SSE5
+VFNMSUBPD	ymmreg,ymmreg*,ymmrm256,ymmreg	rvms:	vex.m3.w0.nds.l1.p1 7d /r /is4		AMD,SSE5
+VFNMSUBPD	xmmreg,xmmreg*,xmmreg,xmmrm128	rvsm:	vex.m3.w1.nds.l0.p1 7d /r /is4		AMD,SSE5
+VFNMSUBPD	ymmreg,ymmreg*,ymmreg,ymmrm256	rvsm:	vex.m3.w1.nds.l1.p1 7d /r /is4		AMD,SSE5
+
+VFNMSUBPS	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	vex.m3.w0.nds.l0.p1 7c /r /is4		AMD,SSE5
+VFNMSUBPS	ymmreg,ymmreg*,ymmrm256,ymmreg	rvms:	vex.m3.w0.nds.l1.p1 7c /r /is4		AMD,SSE5
+VFNMSUBPS	xmmreg,xmmreg*,xmmreg,xmmrm128	rvsm:	vex.m3.w1.nds.l0.p1 7c /r /is4		AMD,SSE5
+VFNMSUBPS	ymmreg,ymmreg*,ymmreg,ymmrm256	rvsm:	vex.m3.w1.nds.l1.p1 7c /r /is4		AMD,SSE5
+
+VFNMSUBSD	xmmreg,xmmreg*,xmmrm64,xmmreg	rvms:	vex.m3.w0.nds.l0.p1 7f /r /is4		AMD,SSE5
+VFNMSUBSD	xmmreg,xmmreg*,xmmreg,xmmrm64	rvsm:	vex.m3.w1.nds.l0.p1 7f /r /is4		AMD,SSE5
+
+VFNMSUBSS	xmmreg,xmmreg*,xmmrm32,xmmreg	rvms:	vex.m3.w0.nds.l0.p1 7e /r /is4		AMD,SSE5
+VFNMSUBSS	xmmreg,xmmreg*,xmmreg,xmmrm32	rvsm:	vex.m3.w1.nds.l0.p1 7e /r /is4		AMD,SSE5
+
+VFRCZPD		xmmreg,xmmrm128*		rm:	xop.m9.w0.l0.p0 81 /r			AMD,SSE5
+VFRCZPD		ymmreg,ymmrm256*		rm:	xop.m9.w0.l1.p0 81 /r			AMD,SSE5
+
+VFRCZPS		xmmreg,xmmrm128*		rm:	xop.m9.w0.l0.p0 80 /r			AMD,SSE5
+VFRCZPS		ymmreg,ymmrm256*		rm:	xop.m9.w0.l1.p0 80 /r			AMD,SSE5
+
+VFRCZSD		xmmreg,xmmrm64*			rm:	xop.m9.w0.l0.p0 83 /r			AMD,SSE5
+
+VFRCZSS		xmmreg,xmmrm32*			rm:	xop.m9.w0.l0.p0 82 /r			AMD,SSE5
+;
+; fixed: spec mention imm7:4 though it should be /is4 even in spec
+VPCMOV		xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	xop.m8.w0.nds.l0.p0 a2 /r /is4		AMD,SSE5
+VPCMOV		ymmreg,ymmreg*,ymmrm256,ymmreg	rvms:	xop.m8.w0.nds.l1.p0 a2 /r /is4		AMD,SSE5
+VPCMOV		xmmreg,xmmreg*,xmmreg,xmmrm128	rvsm:	xop.m8.w1.nds.l0.p0 a2 /r /is4		AMD,SSE5
+VPCMOV		ymmreg,ymmreg*,ymmreg,ymmrm256	rvsm:	xop.m8.w1.nds.l1.p0 a2 /r /is4		AMD,SSE5
+
+VPCOMB		xmmreg,xmmreg*,xmmrm128,imm8	rvmi:	xop.m8.w0.nds.l0.p0 cc /r ib		AMD,SSE5
+VPCOMD		xmmreg,xmmreg*,xmmrm128,imm8	rvmi:	xop.m8.w0.nds.l0.p0 ce /r ib		AMD,SSE5
+VPCOMQ		xmmreg,xmmreg*,xmmrm128,imm8	rvmi:	xop.m8.w0.nds.l0.p0 cf /r ib		AMD,SSE5
+;
+; fixed: spec mention only 3 operands in mnemonics
+VPCOMUB		xmmreg,xmmreg*,xmmrm128,imm8	rvmi:	xop.m8.w0.nds.l0.p0 ec /r ib		AMD,SSE5
+VPCOMUD		xmmreg,xmmreg*,xmmrm128,imm8	rvmi:	xop.m8.w0.nds.l0.p0 ee /r ib		AMD,SSE5
+VPCOMUQ		xmmreg,xmmreg*,xmmrm128,imm8	rvmi:	xop.m8.w0.nds.l0.p0 ef /r ib		AMD,SSE5
+;
+; fixed: spec point wrong VPCOMB in mnemonic
+VPCOMUW		xmmreg,xmmreg*,xmmrm128,imm8	rvmi:	xop.m8.w0.nds.l0.p0 ed /r ib		AMD,SSE5
+VPCOMW		xmmreg,xmmreg*,xmmrm128,imm8	rvmi:	xop.m8.w0.nds.l0.p0 cd /r ib		AMD,SSE5
+
+VPHADDBD	xmmreg,xmmrm128*		rm:	xop.m9.w0.l0.p0 c2 /r			AMD,SSE5
+VPHADDBQ	xmmreg,xmmrm128*		rm:	xop.m9.w0.l0.p0 c3 /r			AMD,SSE5
+VPHADDBW	xmmreg,xmmrm128*		rm:	xop.m9.w0.l0.p0 c1 /r			AMD,SSE5
+VPHADDDQ	xmmreg,xmmrm128*		rm:	xop.m9.w0.l0.p0 cb /r			AMD,SSE5
+;
+; fixed: spec has ymmreg for l0
+VPHADDUBD	xmmreg,xmmrm128*		rm:	xop.m9.w0.l0.p0 d2 /r			AMD,SSE5
+VPHADDUBQ	xmmreg,xmmrm128*		rm:	xop.m9.w0.l0.p0 d3 /r			AMD,SSE5
+;
+; fixed: spec has VPHADDUBWD
+VPHADDUBW	xmmreg,xmmrm128*		rm:	xop.m9.w0.l0.p0 d1 /r			AMD,SSE5
+;
+; fixed: opcode db
+VPHADDUDQ	xmmreg,xmmrm128*		rm:	xop.m9.w0.l0.p0 db /r			AMD,SSE5
+VPHADDUWD	xmmreg,xmmrm128*		rm:	xop.m9.w0.l0.p0 d6 /r			AMD,SSE5
+VPHADDUWQ	xmmreg,xmmrm128*		rm:	xop.m9.w0.l0.p0 d7 /r			AMD,SSE5
+;
+; fixed: spec has ymmreg for l0
+VPHADDWD	xmmreg,xmmrm128*		rm:	xop.m9.w0.l0.p0 c6 /r			AMD,SSE5
+;
+; fixed: spec has d7 opcode
+VPHADDWQ	xmmreg,xmmrm128*		rm:	xop.m9.w0.l0.p0 c7 /r			AMD,SSE5
+
+VPHSUBBW	xmmreg,xmmrm128*		rm:	xop.m9.w0.l0.p0 e1 /r			AMD,SSE5
+VPHSUBDQ	xmmreg,xmmrm128*		rm:	xop.m9.w0.l0.p0 e3 /r			AMD,SSE5
+VPHSUBWD	xmmreg,xmmrm128*		rm:	xop.m9.w0.l0.p0 e2 /r			AMD,SSE5
+
+VPMACSDD	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	xop.m8.w0.nds.l0.p0 9e /r /is4		AMD,SSE5
+;
+; fixed: spec has 97,9f opcodes here
+VPMACSDQH	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	xop.m8.w0.nds.l0.p0 9f /r /is4		AMD,SSE5
+VPMACSDQL	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	xop.m8.w0.nds.l0.p0 97 /r /is4		AMD,SSE5
+VPMACSSDD	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	xop.m8.w0.nds.l0.p0 8e /r /is4		AMD,SSE5
+VPMACSSDQH	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	xop.m8.w0.nds.l0.p0 8f /r /is4		AMD,SSE5
+VPMACSSDQL	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	xop.m8.w0.nds.l0.p0 87 /r /is4		AMD,SSE5
+VPMACSSWD	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	xop.m8.w0.nds.l0.p0 86 /r /is4		AMD,SSE5
+VPMACSSWW	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	xop.m8.w0.nds.l0.p0 85 /r /is4		AMD,SSE5
+VPMACSWD	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	xop.m8.w0.nds.l0.p0 96 /r /is4		AMD,SSE5
+VPMACSWW	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	xop.m8.w0.nds.l0.p0 95 /r /is4		AMD,SSE5
+VPMADCSSWD	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	xop.m8.w0.nds.l0.p0 a6 /r /is4		AMD,SSE5
+VPMADCSWD	xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	xop.m8.w0.nds.l0.p0 b6 /r /is4		AMD,SSE5
+
+VPPERM		xmmreg,xmmreg*,xmmreg,xmmrm128	rvsm:	xop.m8.w1.nds.l0.p0 a3 /r /is4		AMD,SSE5
+VPPERM		xmmreg,xmmreg*,xmmrm128,xmmreg	rvms:	xop.m8.w0.nds.l0.p0 a3 /r /is4		AMD,SSE5
+
+VPROTB		xmmreg,xmmrm128*,xmmreg		rmv:	xop.m9.w0.nds.l0.p0 90 /r		AMD,SSE5
+VPROTB		xmmreg,xmmreg*,xmmrm128		rvm:	xop.m9.w1.nds.l0.p0 90 /r		AMD,SSE5
+;
+; fixed: spec point xmmreg instead of reg/mem
+VPROTB		xmmreg,xmmrm128*,imm8		rmi:	xop.m8.w0.l0.p0 c0 /r ib		AMD,SSE5
+
+VPROTD		xmmreg,xmmrm128*,xmmreg		rmv:	xop.m9.w0.nds.l0.p0 92 /r		AMD,SSE5
+VPROTD		xmmreg,xmmreg*,xmmrm128		rvm:	xop.m9.w1.nds.l0.p0 92 /r		AMD,SSE5
+;
+; fixed: spec error /r is needed
+VPROTD		xmmreg,xmmrm128*,imm8		rmi:	xop.m8.w0.l0.p0 c2 /r ib		AMD,SSE5
+VPROTQ		xmmreg,xmmrm128*,xmmreg		rmv:	xop.m9.w0.nds.l0.p0 93 /r		AMD,SSE5
+VPROTQ		xmmreg,xmmreg*,xmmrm128		rvm:	xop.m9.w1.nds.l0.p0 93 /r		AMD,SSE5
+;
+; fixed: spec error /r is needed
+VPROTQ		xmmreg,xmmrm128*,imm8		rmi:	xop.m8.w0.l0.p0 c3 /r ib		AMD,SSE5
+VPROTW		xmmreg,xmmrm128*,xmmreg		rmv:	xop.m9.w0.nds.l0.p0 91 /r		AMD,SSE5
+VPROTW		xmmreg,xmmreg*,xmmrm128		rvm:	xop.m9.w1.nds.l0.p0 91 /r		AMD,SSE5
+VPROTW		xmmreg,xmmrm128*,imm8		rmi:	xop.m8.w0.l0.p0 c1 /r ib		AMD,SSE5
+
+VPSHAB		xmmreg,xmmrm128*,xmmreg		rmv:	xop.m9.w0.nds.l0.p0 98 /r		AMD,SSE5
+VPSHAB		xmmreg,xmmreg*,xmmrm128		rvm:	xop.m9.w1.nds.l0.p0 98 /r		AMD,SSE5
+
+VPSHAD		xmmreg,xmmrm128*,xmmreg		rmv:	xop.m9.w0.nds.l0.p0 9a /r		AMD,SSE5
+VPSHAD		xmmreg,xmmreg*,xmmrm128		rvm:	xop.m9.w1.nds.l0.p0 9a /r		AMD,SSE5
+
+VPSHAQ		xmmreg,xmmrm128*,xmmreg		rmv:	xop.m9.w0.nds.l0.p0 9b /r		AMD,SSE5
+VPSHAQ		xmmreg,xmmreg*,xmmrm128		rvm:	xop.m9.w1.nds.l0.p0 9b /r		AMD,SSE5
+
+VPSHAW		xmmreg,xmmrm128*,xmmreg		rmv:	xop.m9.w0.nds.l0.p0 99 /r		AMD,SSE5
+VPSHAW		xmmreg,xmmreg*,xmmrm128		rvm:	xop.m9.w1.nds.l0.p0 99 /r		AMD,SSE5
+
+VPSHLB		xmmreg,xmmrm128*,xmmreg		rmv:	xop.m9.w0.nds.l0.p0 94 /r		AMD,SSE5
+VPSHLB		xmmreg,xmmreg*,xmmrm128		rvm:	xop.m9.w1.nds.l0.p0 94 /r		AMD,SSE5
+
+;
+; fixed: spec has ymmreg for l0
+VPSHLD		xmmreg,xmmrm128*,xmmreg		rmv:	xop.m9.w0.nds.l0.p0 96 /r		AMD,SSE5
+VPSHLD		xmmreg,xmmreg*,xmmrm128		rvm:	xop.m9.w1.nds.l0.p0 96 /r		AMD,SSE5
+
+VPSHLQ		xmmreg,xmmrm128*,xmmreg		rmv:	xop.m9.w0.nds.l0.p0 97 /r		AMD,SSE5
+VPSHLQ		xmmreg,xmmreg*,xmmrm128		rvm:	xop.m9.w1.nds.l0.p0 97 /r		AMD,SSE5
+
+VPSHLW		xmmreg,xmmrm128*,xmmreg		rmv:	xop.m9.w0.nds.l0.p0 95 /r		AMD,SSE5
+VPSHLW		xmmreg,xmmreg*,xmmrm128		rvm:	xop.m9.w1.nds.l0.p0 95 /r		AMD,SSE5
+
+;# Intel AVX2 instructions
+;
+; based on pub number 319433-011 dated July 2011
+;
+VMPSADBW	ymmreg,ymmreg*,ymmrm256,imm8	rvmi:	vex.nds.256.66.0f3a 42 /r ib		FUTURE,AVX2
+VPABSB		ymmreg,ymmrm256			rm:	vex.256.66.0f38 1c /r			FUTURE,AVX2
+VPABSW		ymmreg,ymmrm256			rm:	vex.256.66.0f38 1d /r			FUTURE,AVX2
+VPABSD		ymmreg,ymmrm256			rm:	vex.256.66.0f38 1e /r			FUTURE,AVX2
+VPACKSSWB	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 63 /r		FUTURE,AVX2
+VPACKSSDW	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 6b /r		FUTURE,AVX2
+VPACKUSDW	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38 2b /r		FUTURE,AVX2
+VPACKUSWB	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 67 /r		FUTURE,AVX2
+VPADDB		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f fc /r		FUTURE,AVX2
+VPADDW		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f fd /r		FUTURE,AVX2
+VPADDD		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f fe /r		FUTURE,AVX2
+VPADDQ		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f d4 /r		FUTURE,AVX2
+VPADDSB		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f ec /r		FUTURE,AVX2
+VPADDSW		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f ed /r		FUTURE,AVX2
+VPADDUSB	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f dc /r		FUTURE,AVX2
+VPADDUSW	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f dd /r		FUTURE,AVX2
+VPALIGNR	ymmreg,ymmreg*,ymmrm256,imm8	rvmi:	vex.nds.256.66.0f3a 0f /r ib		FUTURE,AVX2
+VPAND		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f db /r		FUTURE,AVX2
+VPANDN		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f df /r		FUTURE,AVX2
+VPAVGB		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f e0 /r		FUTURE,AVX2
+VPAVGW		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f e3 /r		FUTURE,AVX2
+VPBLENDVB	ymmreg,ymmreg*,ymmrm256,ymmreg	rvms:	vex.nds.256.66.0f3a 4c /r /is4		FUTURE,AVX2
+VPBLENDW	ymmreg,ymmreg*,ymmrm256,imm8	rvmi:	vex.nds.256.66.0f3a 0e /r ib		FUTURE,AVX2
+VPCMPEQB	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 74 /r		FUTURE,AVX2
+VPCMPEQW	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 75 /r		FUTURE,AVX2
+VPCMPEQD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 76 /r		FUTURE,AVX2
+VPCMPEQQ	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38 29 /r		FUTURE,AVX2
+VPCMPGTB	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 64 /r		FUTURE,AVX2
+VPCMPGTW	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 65 /r		FUTURE,AVX2
+VPCMPGTD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 66 /r		FUTURE,AVX2
+VPCMPGTQ	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38 37 /r		FUTURE,AVX2
+VPHADDW		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38 01 /r		FUTURE,AVX2
+VPHADDD		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38 02 /r		FUTURE,AVX2
+VPHADDSW	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38 03 /r		FUTURE,AVX2
+VPHSUBW		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38 05 /r		FUTURE,AVX2
+VPHSUBD		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38 06 /r		FUTURE,AVX2
+VPHSUBSW	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38 07 /r		FUTURE,AVX2
+VPMADDUBSW	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38 04 /r		FUTURE,AVX2
+VPMADDWD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f f5 /r		FUTURE,AVX2
+VPMAXSB		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38 3c /r		FUTURE,AVX2
+VPMAXSW		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f ee /r		FUTURE,AVX2
+VPMAXSD		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38 3d /r		FUTURE,AVX2
+VPMAXUB		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f de /r		FUTURE,AVX2
+VPMAXUW		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38 3e /r		FUTURE,AVX2
+VPMAXUD		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38 3f /r		FUTURE,AVX2
+VPMINSB		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38 38 /r		FUTURE,AVX2
+VPMINSW		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f ea /r		FUTURE,AVX2
+VPMINSD		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38 39 /r		FUTURE,AVX2
+VPMINUB		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f da /r		FUTURE,AVX2
+VPMINUW		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38 3a /r		FUTURE,AVX2
+VPMINUD		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38 3b /r		FUTURE,AVX2
+VPMOVMSKB	reg32,ymmreg			rm:	vex.256.66.0f d7 /r			FUTURE,AVX2
+VPMOVMSKB	reg64,ymmreg			rm:	vex.256.66.0f d7 /r			FUTURE,AVX2
+VPMOVSXBW	ymmreg,xmmrm128			rm:	vex.256.66.0f38 20 /r			FUTURE,AVX2
+VPMOVSXBD	ymmreg,mem64			rm:	vex.256.66.0f38 21 /r			FUTURE,AVX2
+VPMOVSXBD	ymmreg,xmmreg			rm:	vex.256.66.0f38 21 /r			FUTURE,AVX2
+VPMOVSXBQ	ymmreg,mem32			rm:	vex.256.66.0f38 22 /r			FUTURE,AVX2
+VPMOVSXBQ	ymmreg,xmmreg			rm:	vex.256.66.0f38 22 /r			FUTURE,AVX2
+VPMOVSXWD	ymmreg,xmmrm128			rm:	vex.256.66.0f38 23 /r			FUTURE,AVX2
+VPMOVSXWQ	ymmreg,mem64			rm:	vex.256.66.0f38 24 /r			FUTURE,AVX2
+VPMOVSXWQ	ymmreg,xmmreg			rm:	vex.256.66.0f38 24 /r			FUTURE,AVX2
+VPMOVSXDQ	ymmreg,xmmrm128			rm:	vex.256.66.0f38 25 /r			FUTURE,AVX2
+VPMOVZXBW	ymmreg,xmmrm128			rm:	vex.256.66.0f38 30 /r			FUTURE,AVX2
+VPMOVZXBD	ymmreg,mem64			rm:	vex.256.66.0f38 31 /r			FUTURE,AVX2
+VPMOVZXBD	ymmreg,xmmreg			rm:	vex.256.66.0f38 31 /r			FUTURE,AVX2
+VPMOVZXBQ	ymmreg,mem32			rm:	vex.256.66.0f38 32 /r			FUTURE,AVX2
+VPMOVZXBQ	ymmreg,xmmreg			rm:	vex.256.66.0f38 32 /r			FUTURE,AVX2
+VPMOVZXWD	ymmreg,xmmrm128			rm:	vex.256.66.0f38 33 /r			FUTURE,AVX2
+VPMOVZXWQ	ymmreg,mem64			rm:	vex.256.66.0f38 34 /r			FUTURE,AVX2
+VPMOVZXWQ	ymmreg,xmmreg			rm:	vex.256.66.0f38 34 /r			FUTURE,AVX2
+VPMOVZXDQ	ymmreg,xmmrm128			rm:	vex.256.66.0f38 35 /r			FUTURE,AVX2
+VPMULDQ		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38 28 /r		FUTURE,AVX2
+VPMULHRSW	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38 0b /r		FUTURE,AVX2
+VPMULHUW	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f e4 /r		FUTURE,AVX2
+VPMULHW		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f e5 /r		FUTURE,AVX2
+VPMULLW		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f d5 /r		FUTURE,AVX2
+VPMULLD		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38 40 /r		FUTURE,AVX2
+VPMULUDQ	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f f4 /r		FUTURE,AVX2
+VPOR		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f eb /r		FUTURE,AVX2
+VPSADBW		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f f6 /r		FUTURE,AVX2
+VPSHUFB		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38 00 /r		FUTURE,AVX2
+VPSHUFD		ymmreg,ymmrm256,imm8		rmi:	vex.256.66.0f 70 /r ib			FUTURE,AVX2
+VPSHUFHW	ymmreg,ymmrm256,imm8		rmi:	vex.256.f3.0f 70 /r ib			FUTURE,AVX2
+VPSHUFLW	ymmreg,ymmrm256,imm8		rmi:	vex.256.f2.0f 70 /r ib			FUTURE,AVX2
+VPSIGNB		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38 08 /r		FUTURE,AVX2
+VPSIGNW		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38 09 /r		FUTURE,AVX2
+VPSIGND		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38 0a /r		FUTURE,AVX2
+VPSLLDQ		ymmreg,ymmreg*,imm8		vmi:	vex.ndd.256.66.0f 73 /7 ib		FUTURE,AVX2
+VPSLLW		ymmreg,ymmreg*,xmmrm128		rvm:	vex.nds.256.66.0f f1 /r		FUTURE,AVX2
+VPSLLW		ymmreg,ymmreg*,imm8		vmi:	vex.ndd.256.66.0f 71 /6 ib		FUTURE,AVX2
+VPSLLD		ymmreg,ymmreg*,xmmrm128		rvm:	vex.nds.256.66.0f f2 /r		FUTURE,AVX2
+VPSLLD		ymmreg,ymmreg*,imm8		vmi:	vex.ndd.256.66.0f 72 /6 ib		FUTURE,AVX2
+VPSLLQ		ymmreg,ymmreg*,xmmrm128		rvm:	vex.nds.256.66.0f f3 /r		FUTURE,AVX2
+VPSLLQ		ymmreg,ymmreg*,imm8		vmi:	vex.ndd.256.66.0f 73 /6 ib		FUTURE,AVX2
+VPSRAW		ymmreg,ymmreg*,xmmrm128		rvm:	vex.nds.256.66.0f e1 /r		FUTURE,AVX2
+VPSRAW		ymmreg,ymmreg*,imm8		vmi:	vex.ndd.256.66.0f 71 /4 ib		FUTURE,AVX2
+VPSRAD		ymmreg,ymmreg*,xmmrm128		rvm:	vex.nds.256.66.0f e2 /r		FUTURE,AVX2
+VPSRAD		ymmreg,ymmreg*,imm8		vmi:	vex.ndd.256.66.0f 72 /4 ib		FUTURE,AVX2
+VPSRLDQ		ymmreg,ymmreg*,imm8		vmi:	vex.ndd.256.66.0f 73 /3 ib		FUTURE,AVX2
+VPSRLW		ymmreg,ymmreg*,xmmrm128		rvm:	vex.nds.256.66.0f d1 /r		FUTURE,AVX2
+VPSRLW		ymmreg,ymmreg*,imm8		vmi:	vex.ndd.256.66.0f 71 /2 ib		FUTURE,AVX2
+VPSRLD		ymmreg,ymmreg*,xmmrm128		rvm:	vex.nds.256.66.0f d2 /r		FUTURE,AVX2
+VPSRLD		ymmreg,ymmreg*,imm8		vmi:	vex.ndd.256.66.0f 72 /2 ib		FUTURE,AVX2
+VPSRLQ		ymmreg,ymmreg*,xmmrm128		rvm:	vex.nds.256.66.0f d3 /r		FUTURE,AVX2
+VPSRLQ		ymmreg,ymmreg*,imm8		vmi:	vex.ndd.256.66.0f.wig 73 /2 ib		FUTURE,AVX2
+VPSUBB		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f f8 /r		FUTURE,AVX2
+VPSUBW		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f f9 /r		FUTURE,AVX2
+VPSUBD		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f fa /r		FUTURE,AVX2
+VPSUBQ		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f fb /r		FUTURE,AVX2
+VPSUBSB		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f e8 /r		FUTURE,AVX2
+VPSUBSW		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f e9 /r		FUTURE,AVX2
+VPSUBUSB	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f d8 /r		FUTURE,AVX2
+VPSUBUSW	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f d9 /r		FUTURE,AVX2
+VPUNPCKHBW	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 68 /r		FUTURE,AVX2
+VPUNPCKHWD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 69 /r		FUTURE,AVX2
+VPUNPCKHDQ	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 6a /r		FUTURE,AVX2
+VPUNPCKHQDQ	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 6d /r		FUTURE,AVX2
+VPUNPCKLBW	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 60 /r		FUTURE,AVX2
+VPUNPCKLWD	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 61 /r		FUTURE,AVX2
+VPUNPCKLDQ	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 62 /r		FUTURE,AVX2
+VPUNPCKLQDQ	ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f 6c /r		FUTURE,AVX2
+VPXOR		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f ef /r		FUTURE,AVX2
+VMOVNTDQA	ymmreg,mem256			rm:	vex.256.66.0f38 2a /r			FUTURE,AVX2
+VBROADCASTSS	xmmreg,xmmreg			rm:	vex.128.66.0f38.w0 18 /r		FUTURE,AVX2
+VBROADCASTSS	ymmreg,xmmreg			rm:	vex.256.66.0f38.w0 18 /r		FUTURE,AVX2
+VBROADCASTSD	ymmreg,xmmreg			rm:	vex.256.66.0f38.w0 19 /r		FUTURE,AVX2
+VBROADCASTI128	ymmreg,mem128			rm:	vex.256.66.0f38.w0 5a /r		FUTURE,AVX2
+VPBLENDD	xmmreg,xmmreg*,xmmrm128,imm8	rvmi:	vex.nds.128.66.0f3a.w0 02 /r ib	FUTURE,AVX2
+VPBLENDD	ymmreg,ymmreg*,ymmrm256,imm8	rvmi:	vex.nds.256.66.0f3a.w0 02 /r ib	FUTURE,AVX2
+VPBROADCASTB	xmmreg,mem8			rm:	vex.128.66.0f38.w0 78 /r		FUTURE,AVX2
+VPBROADCASTB	xmmreg,xmmreg			rm:	vex.128.66.0f38.w0 78 /r		FUTURE,AVX2
+VPBROADCASTB	ymmreg,mem8			rm:	vex.256.66.0f38.w0 78 /r		FUTURE,AVX2
+VPBROADCASTB	ymmreg,xmmreg			rm:	vex.256.66.0f38.w0 78 /r		FUTURE,AVX2
+VPBROADCASTW	xmmreg,mem16			rm:	vex.128.66.0f38.w0 79 /r		FUTURE,AVX2
+VPBROADCASTW	xmmreg,xmmreg			rm:	vex.128.66.0f38.w0 79 /r		FUTURE,AVX2
+VPBROADCASTW	ymmreg,mem16			rm:	vex.256.66.0f38.w0 79 /r		FUTURE,AVX2
+VPBROADCASTW	ymmreg,xmmreg			rm:	vex.256.66.0f38.w0 79 /r		FUTURE,AVX2
+VPBROADCASTD	xmmreg,mem32			rm:	vex.128.66.0f38.w0 58 /r		FUTURE,AVX2
+VPBROADCASTD	xmmreg,xmmreg			rm:	vex.128.66.0f38.w0 58 /r		FUTURE,AVX2
+VPBROADCASTD	ymmreg,mem32			rm:	vex.256.66.0f38.w0 58 /r		FUTURE,AVX2
+VPBROADCASTD	ymmreg,xmmreg			rm:	vex.256.66.0f38.w0 58 /r		FUTURE,AVX2
+VPBROADCASTQ	xmmreg,mem64			rm:	vex.128.66.0f38.w0 59 /r		FUTURE,AVX2
+VPBROADCASTQ	xmmreg,xmmreg			rm:	vex.128.66.0f38.w0 59 /r		FUTURE,AVX2
+VPBROADCASTQ	ymmreg,mem64			rm:	vex.256.66.0f38.w0 59 /r		FUTURE,AVX2
+VPBROADCASTQ	ymmreg,xmmreg			rm:	vex.256.66.0f38.w0 59 /r		FUTURE,AVX2
+
+VPERMD		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38.w0 36 /r		FUTURE,AVX2
+VPERMPD		ymmreg,ymmrm256,imm8		rmi:	vex.256.66.0f3a.w1 01 /r ib		FUTURE,AVX2
+VPERMPS		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38.w0 16 /r		FUTURE,AVX2
+VPERMQ		ymmreg,ymmrm256,imm8		rmi:	vex.256.66.0f3a.w1 00 /r ib		FUTURE,AVX2
+VPERM2I128	ymmreg,ymmreg*,ymmrm256,imm8	rvmi:	vex.nds.256.66.0f3a.w0 46 /r ib	FUTURE,AVX2
+VEXTRACTI128	xmmrm128,ymmreg,imm8		mri:	vex.256.66.0f3a.w0 39 /r ib		FUTURE,AVX2
+
+VINSERTI128	ymmreg,ymmreg*,xmmrm128,imm8	rvmi:	vex.nds.256.66.0f3a.w0 38 /r ib	FUTURE,AVX2
+VPMASKMOVD	xmmreg,xmmreg*,mem128		rvm:	vex.nds.128.66.0f38.w0 8c /r		FUTURE,AVX2
+VPMASKMOVD	ymmreg,ymmreg*,mem256		rvm:	vex.nds.256.66.0f38.w0 8c /r		FUTURE,AVX2
+VPMASKMOVQ	xmmreg,xmmreg*,mem128		rvm:	vex.nds.128.66.0f38.w1 8c /r		FUTURE,AVX2
+VPMASKMOVQ	ymmreg,ymmreg*,mem256		rvm:	vex.nds.256.66.0f38.w1 8c /r		FUTURE,AVX2
+
+VPMASKMOVD	mem128,xmmreg*,xmmreg		mvr:	vex.nds.128.66.0f38.w0 8e /r		FUTURE,AVX2
+VPMASKMOVD	mem256,ymmreg*,ymmreg		mvr:	vex.nds.256.66.0f38.w0 8e /r		FUTURE,AVX2
+VPMASKMOVQ	mem128,xmmreg*,xmmreg		mvr:	vex.nds.128.66.0f38.w1 8e /r		FUTURE,AVX2
+VPMASKMOVQ	mem256,ymmreg*,ymmreg		mvr:	vex.nds.256.66.0f38.w1 8e /r		FUTURE,AVX2
+
+VPSLLVD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38.w0 47 /r		FUTURE,AVX2
+VPSLLVQ		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38.w1 47 /r		FUTURE,AVX2
+VPSLLVD		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38.w0 47 /r		FUTURE,AVX2
+VPSLLVQ		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38.w1 47 /r		FUTURE,AVX2
+
+VPSRAVD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38.w0 46 /r		FUTURE,AVX2
+VPSRAVD		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38.w0 46 /r		FUTURE,AVX2
+
+VPSRLVD		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38.w0 45 /r		FUTURE,AVX2
+VPSRLVQ		xmmreg,xmmreg*,xmmrm128		rvm:	vex.nds.128.66.0f38.w1 45 /r		FUTURE,AVX2
+VPSRLVD		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38.w0 45 /r		FUTURE,AVX2
+VPSRLVQ		ymmreg,ymmreg*,ymmrm256		rvm:	vex.nds.256.66.0f38.w1 45 /r		FUTURE,AVX2
+
+VGATHERDPD	xmmreg,xmem64,xmmreg		rmv:	vm32x vex.dds.128.66.0f38.w1 92 /r	FUTURE,AVX2
+VGATHERQPD	xmmreg,xmem64,xmmreg		rmv:	vm64x vex.dds.128.66.0f38.w1 93 /r	FUTURE,AVX2
+VGATHERDPD	ymmreg,xmem64,ymmreg		rmv:	vm32x vex.dds.256.66.0f38.w1 92 /r	FUTURE,AVX2
+VGATHERQPD	ymmreg,ymem64,ymmreg		rmv:	vm64y vex.dds.256.66.0f38.w1 93 /r	FUTURE,AVX2
+
+VGATHERDPS	xmmreg,xmem32,xmmreg		rmv:	vm32x vex.dds.128.66.0f38.w0 92 /r	FUTURE,AVX2
+VGATHERQPS	xmmreg,xmem32,xmmreg		rmv:	vm64x vex.dds.128.66.0f38.w0 93 /r	FUTURE,AVX2
+VGATHERDPS	ymmreg,ymem32,ymmreg		rmv:	vm32y vex.dds.256.66.0f38.w0 92 /r	FUTURE,AVX2
+VGATHERQPS	xmmreg,ymem32,xmmreg		rmv:	vm64y vex.dds.256.66.0f38.w0 93 /r	FUTURE,AVX2
+
+VPGATHERDD	xmmreg,xmem32,xmmreg		rmv:	vm32x vex.dds.128.66.0f38.w0 90 /r	FUTURE,AVX2
+VPGATHERQD	xmmreg,xmem32,xmmreg		rmv:	vm64x vex.dds.128.66.0f38.w0 91 /r	FUTURE,AVX2
+VPGATHERDD	ymmreg,ymem32,ymmreg		rmv:	vm32y vex.dds.256.66.0f38.w0 90 /r	FUTURE,AVX2
+VPGATHERQD	xmmreg,ymem32,xmmreg		rmv:	vm64y vex.dds.256.66.0f38.w0 91 /r	FUTURE,AVX2
+
+VPGATHERDQ	xmmreg,xmem64,xmmreg		rmv:	vm32x vex.dds.128.66.0f38.w1 90 /r	FUTURE,AVX2
+VPGATHERQQ	xmmreg,xmem64,xmmreg		rmv:	vm64x vex.dds.128.66.0f38.w1 91 /r	FUTURE,AVX2
+VPGATHERDQ	ymmreg,xmem64,ymmreg		rmv:	vm32x vex.dds.256.66.0f38.w1 90 /r	FUTURE,AVX2
+VPGATHERQQ	ymmreg,ymem64,ymmreg		rmv:	vm64y vex.dds.256.66.0f38.w1 91 /r	FUTURE,AVX2
+
+;# Intel Transactional Synchronization Extensions (TSX)
+XABORT		imm				i:	c6 f8 ib				FUTURE,RTM
+XABORT		imm8				i:	c6 f8 ib				FUTURE,RTM
+XBEGIN		imm				i:	odf c7 f8 rel				FUTURE,RTM
+XBEGIN		imm|near			i:	odf c7 f8 rel				FUTURE,RTM,ND
+XBEGIN		imm16				i:	o16 c7 f8 rel				FUTURE,RTM,NOLONG
+XBEGIN		imm16|near			i:	o16 c7 f8 rel				FUTURE,RTM,NOLONG,ND
+XBEGIN		imm32				i:	o32 c7 f8 rel				FUTURE,RTM,NOLONG
+XBEGIN		imm32|near			i:	o32 c7 f8 rel				FUTURE,RTM,NOLONG,ND
+XBEGIN		imm64				i:	o64nw c7 f8 rel				FUTURE,RTM,LONG
+XBEGIN		imm64|near			i:	o64nw c7 f8 rel				FUTURE,RTM,LONG,ND
+XEND		void					0f 01 d5				FUTURE,RTM
+XTEST		void					0f 01 d6				FUTURE,HLE,RTM
+
+;# Intel BMI1 and BMI2 instructions, AMD TBM instructions
+;
+; based on pub number 319433-011 dated July 2011
+;
+ANDN		reg32,reg32,rm32		rvm:	vex.nds.lz.0f38.w0 f2 /r		FUTURE,BMI1
+ANDN		reg64,reg64,rm64		rvm:	vex.nds.lz.0f38.w1 f2 /r		LONG,FUTURE,BMI1
+BEXTR		reg32,rm32,reg32		rmv:	vex.nds.lz.0f38.w0 f7 /r		FUTURE,BMI1
+BEXTR		reg64,rm64,reg64		rmv:	vex.nds.lz.0f38.w1 f7 /r		LONG,FUTURE,BMI1
+BEXTR		reg32,rm32,imm32		rmi:	xop.m10.lz.w0 10 /r id			FUTURE,TBM
+BEXTR		reg64,rm64,imm32		rmi:	xop.m10.lz.w1 10 /r id			LONG,FUTURE,TBM
+BLCI		reg32,rm32			vm:	xop.ndd.lz.m9.w0 02 /6			FUTURE,TBM
+BLCI		reg64,rm64			vm:	xop.ndd.lz.m9.w1 02 /6			LONG,FUTURE,TBM
+BLCIC		reg32,rm32			vm:	xop.ndd.lz.m9.w0 01 /5			FUTURE,TBM
+BLCIC		reg64,rm64			vm:	xop.ndd.lz.m9.w1 01 /5			LONG,FUTURE,TBM
+BLSI		reg32,rm32			vm:	vex.ndd.lz.0f38.w0 f3 /3		FUTURE,BMI1
+BLSI		reg64,rm64			vm:	vex.ndd.lz.0f38.w1 f3 /3		LONG,FUTURE,BMI1
+BLSIC		reg32,rm32			vm:	xop.ndd.lz.m9.w0 01 /6			FUTURE,TBM
+BLSIC		reg64,rm64			vm:	xop.ndd.lz.m9.w1 01 /6			LONG,FUTURE,TBM
+BLCFILL		reg32,rm32			vm:	xop.ndd.lz.m9.w0 01 /1			FUTURE,TBM
+BLCFILL		reg64,rm64			vm:	xop.ndd.lz.m9.w1 01 /1			LONG,FUTURE,TBM
+BLSFILL		reg32,rm32			vm:	xop.ndd.lz.m9.w0 01 /2			FUTURE,TBM
+BLSFILL		reg64,rm64			vm:	xop.ndd.lz.m9.w1 01 /2			LONG,FUTURE,TBM
+BLCMSK		reg32,rm32			vm:	xop.ndd.lz.m9.w0 02 /1			FUTURE,TBM
+BLCMSK		reg64,rm64			vm:	xop.ndd.lz.m9.w1 02 /1			LONG,FUTURE,TBM
+BLSMSK		reg32,rm32			vm:	vex.ndd.lz.0f38.w0 f3 /2		FUTURE,BMI1
+BLSMSK		reg64,rm64			vm:	vex.ndd.lz.0f38.w1 f3 /2		LONG,FUTURE,BMI1
+BLSR		reg32,rm32			vm:	vex.ndd.lz.0f38.w0 f3 /1		FUTURE,BMI1
+BLSR		reg64,rm64			vm:	vex.ndd.lz.0f38.w1 f3 /1		LONG,FUTURE,BMI1
+BLCS		reg32,rm32			vm:	xop.ndd.lz.m9.w0 01 /3			FUTURE,TBM
+BLCS		reg64,rm64			vm:	xop.ndd.lz.m9.w1 01 /3			LONG,FUTURE,TBM
+BZHI		reg32,rm32,reg32		rmv:	vex.nds.lz.0f38.w0 f5 /r		FUTURE,BMI2
+BZHI		reg64,rm64,reg64		rmv:	vex.nds.lz.0f38.w1 f5 /r		LONG,FUTURE,BMI2
+MULX		reg32,reg32,rm32		rvm:	vex.ndd.lz.f2.0f38.w0 f6 /r		FUTURE,BMI2
+MULX		reg64,reg64,rm64		rvm:	vex.ndd.lz.f2.0f38.w1 f6 /r		LONG,FUTURE,BMI2
+PDEP		reg32,reg32,rm32		rvm:	vex.nds.lz.f2.0f38.w0 f5 /r		FUTURE,BMI2
+PDEP		reg64,reg64,rm64		rvm:	vex.nds.lz.f2.0f38.w1 f5 /r		LONG,FUTURE,BMI2
+PEXT		reg32,reg32,rm32		rvm:	vex.nds.lz.f3.0f38.w0 f5 /r		FUTURE,BMI2
+PEXT		reg64,reg64,rm64		rvm:	vex.nds.lz.f3.0f38.w1 f5 /r		LONG,FUTURE,BMI2
+RORX		reg32,rm32,imm8			rmi:	vex.lz.f2.0f3a.w0 f0 /r ib		FUTURE,BMI2
+RORX		reg64,rm64,imm8			rmi:	vex.lz.f2.0f3a.w1 f0 /r ib		LONG,FUTURE,BMI2
+SARX		reg32,rm32,reg32		rmv:	vex.nds.lz.f3.0f38.w0 f7 /r		FUTURE,BMI2
+SARX		reg64,rm64,reg64		rmv:	vex.nds.lz.f3.0f38.w1 f7 /r		LONG,FUTURE,BMI2
+SHLX		reg32,rm32,reg32		rmv:	vex.nds.lz.66.0f38.w0 f7 /r		FUTURE,BMI2
+SHLX		reg64,rm64,reg64		rmv:	vex.nds.lz.66.0f38.w1 f7 /r		LONG,FUTURE,BMI2
+SHRX		reg32,rm32,reg32		rmv:	vex.nds.lz.f2.0f38.w0 f7 /r		FUTURE,BMI2
+SHRX		reg64,rm64,reg64		rmv:	vex.nds.lz.f2.0f38.w1 f7 /r		LONG,FUTURE,BMI2
+TZCNT		reg16,rm16			rm:	o16 f3i 0f bc /r			FUTURE,BMI1
+TZCNT		reg32,rm32			rm:	o32 f3i 0f bc /r			FUTURE,BMI1
+TZCNT		reg64,rm64			rm:	o64 f3i 0f bc /r			LONG,FUTURE,BMI1
+TZMSK		reg32,rm32			vm:	xop.ndd.lz.m9.w0 01 /4			FUTURE,TBM
+TZMSK		reg64,rm64			vm:	xop.ndd.lz.m9.w1 01 /4			LONG,FUTURE,TBM
+T1MSKC		reg32,rm32			vm:	xop.ndd.lz.m9.w0 01 /7			FUTURE,TBM
+T1MSKC		reg64,rm64			vm:	xop.ndd.lz.m9.w1 01 /7			LONG,FUTURE,TBM
+
+PREFETCHWT1     mem8         m:                               0f 0d /2   PREFETCHWT1,FUTURE
+
+;# Intel Memory Protection Extensions (MPX)
+BNDMK       bndreg,mem             rm:         f3 0f 1b /r   MPX,MIB,FUTURE
+BNDCL       bndreg,mem             rm:         f3 0f 1a /r   MPX,FUTURE
+BNDCL       bndreg,reg32           rm:         f3 0f 1a /r   MPX,NOLONG,FUTURE
+BNDCL       bndreg,reg64           rm:   o64nw f3 0f 1a /r   MPX,LONG,FUTURE
+BNDCU       bndreg,mem             rm:         f2 0f 1a /r   MPX,FUTURE
+BNDCU       bndreg,reg32           rm:         f2 0f 1a /r   MPX,NOLONG,FUTURE
+BNDCU       bndreg,reg64           rm:   o64nw f2 0f 1a /r   MPX,LONG,FUTURE
+BNDCN       bndreg,mem             rm:         f2 0f 1b /r   MPX,FUTURE
+BNDCN       bndreg,reg32           rm:         f2 0f 1b /r   MPX,NOLONG,FUTURE
+BNDCN       bndreg,reg64           rm:   o64nw f2 0f 1b /r   MPX,LONG,FUTURE
+BNDMOV      bndreg,bndreg          rm:         66 0f 1a /r   MPX,FUTURE
+BNDMOV      bndreg,mem             rm:         66 0f 1a /r   MPX,FUTURE
+BNDMOV      bndreg,bndreg          mr:         66 0f 1b /r   MPX,FUTURE
+BNDMOV      mem,bndreg             mr:         66 0f 1b /r   MPX,FUTURE
+BNDLDX      bndreg,mem             rm:            0f 1a /r   MPX,MIB,FUTURE
+BNDLDX      bndreg,mem,reg32       rmx:           0f 1a /r   MPX,MIB,NOLONG,FUTURE
+BNDLDX      bndreg,mem,reg64       rmx:           0f 1a /r   MPX,MIB,LONG,FUTURE
+BNDSTX      mem,bndreg             mr:            0f 1b /r   MPX,MIB,FUTURE
+BNDSTX      mem,reg32,bndreg       mxr:           0f 1b /r   MPX,MIB,NOLONG,FUTURE
+BNDSTX      mem,reg64,bndreg       mxr:           0f 1b /r   MPX,MIB,LONG,FUTURE
+BNDSTX      mem,bndreg,reg32       mrx:           0f 1b /r   MPX,MIB,NOLONG,FUTURE
+BNDSTX      mem,bndreg,reg64       mrx:           0f 1b /r   MPX,MIB,LONG,FUTURE
+
+;# Intel SHA acceleration instructions
+SHA1MSG1        xmmreg,xmmrm128                     rm: 0f 38 c9 /r  SHA,FUTURE
+SHA1MSG2        xmmreg,xmmrm128                     rm: 0f 38 ca /r  SHA,FUTURE
+SHA1NEXTE       xmmreg,xmmrm128                     rm: 0f 38 c8 /r  SHA,FUTURE
+SHA1RNDS4       xmmreg,xmmrm128,imm8                rmi: 0f 3a cc /r ib  SHA,FUTURE
+SHA256MSG1      xmmreg,xmmrm128                     rm: 0f 38 cc /r  SHA,FUTURE
+SHA256MSG2      xmmreg,xmmrm128                     rm: 0f 38 cd /r  SHA,FUTURE
+SHA256RNDS2     xmmreg,xmmrm128,xmm0                rm-: 0f 38 cb /r  SHA,FUTURE
+SHA256RNDS2     xmmreg,xmmrm128                     rm:  0f 38 cb /r  SHA,FUTURE
+VSHA512MSG1     ymmreg,xmmreg                       rm: vex.256.f2.0f38.w0 cc /r SHA512,AVX,FUTURE
+VSHA512MSG2     ymmreg,ymmreg                       rm: vex.256.f2.0f38.w0 cd /r SHA512,AVX,FUTURE
+VSHA512RNDS2    ymmreg,ymmreg,xmmreg                rvm: vex.nds.256.f2.0f38.w0 cb /r SHA512,AVX,FUTURE
+
+;# SM3
+VSM3MSG1        xmmreg,xmmreg,xmmreg                rvm: vex.nds.128.p0.0f38.w0 da /r SM3,AVX,FUTURE
+VSM3MSG2        xmmreg,xmmreg,xmmreg                rvm: vex.nds.128.66.0f38.w0 da /r SM3,AVX,FUTURE
+VSM3RNDS2       xmmreg,xmmreg,xmmreg,imm8           rvmi: vex.nds.128.66.0f3a.w0 de /r ib SM3,AVX,FUTURE
+
+;# SM4
+VSM4KEY4        xmmreg,xmmreg,xmmrm128              rvm: vex.nds.128.f3.0f38.w0 da /r SM4,AVX,FUTURE
+VSM4KEY4        ymmreg,ymmreg,ymmrm128              rvm: vex.nds.256.f3.0f38.w0 da /r SM4,AVX,FUTURE
+VSM4RNDS4       xmmreg,xmmreg,xmmrm128              rvm: vex.nds.128.f2.0f38.w0 da /r SM4,AVX,FUTURE
+VSM4RNDS4       ymmreg,ymmreg,ymmrm128              rvm: vex.nds.256.f2.0f38.w0 da /r SM4,AVX,FUTURE
+
+;# AVX no exception conversions
+; Must precede AVX-512 versions
+VBCSTNEBF16PS	xmmreg,mem16				rm:	vex.128.f3.0f38.w0 b1 /r	AVXNECONVERT,FUTURE,LATEVEX,SW
+VBCSTNEBF16PS	ymmreg,mem16				rm:	vex.256.f3.0f38.w0 b1 /r	AVXNECONVERT,FUTURE,LATEVEX,SW
+VBCSTNESH2PS	xmmreg,mem16				rm:	vex.128.66.0f38.w0 b1 /r	AVXNECONVERT,FUTURE,LATEVEX,SW
+VBCSTNESH2PS	ymmreg,mem16				rm:	vex.256.66.0f38.w0 b1 /r	AVXNECONVERT,FUTURE,LATEVEX,SW
+VCVTNEEBF162PS	xmmreg,mem128				rm:	vex.128.f3.0f38.w0 b0 /r	AVXNECONVERT,FUTURE,LATEVEX,SX
+VCVTNEEBF162PS	ymmreg,mem256				rm:	vex.256.f3.0f38.w0 b0 /r	AVXNECONVERT,FUTURE,LATEVEX,SY
+VCVTNEEPH2PS	xmmreg,mem128				rm:	vex.128.66.0f38.w0 b0 /r	AVXNECONVERT,FUTURE,LATEVEX,SX
+VCVTNEEPH2PS	ymmreg,mem256				rm:	vex.256.66.0f38.w0 b0 /r	AVXNECONVERT,FUTURE,LATEVEX,SY
+VCVTNEOBF162PS	xmmreg,mem128				rm:	vex.128.f2.0f38.w0 b0 /r	AVXNECONVERT,FUTURE,LATEVEX,SX
+VCVTNEOBF162PS	ymmreg,mem256				rm:	vex.256.f2.0f38.w0 b0 /r	AVXNECONVERT,FUTURE,LATEVEX,SY
+VCVTNEOPH2PS	xmmreg,mem128				rm:	vex.128.np.0f38.w0 b0 /r	AVXNECONVERT,FUTURE,LATEVEX,SX
+VCVTNEOPH2PS	ymmreg,mem256				rm:	vex.256.np.0f38.w0 b0 /r	AVXNECONVERT,FUTURE,LATEVEX,SY
+VCVTNEPS2BF16	xmmreg,xmmrm128				rm:	vex.128.f3.0f38.w0 72 /r	AVXNECONVERT,FUTURE,LATEVEX,SX
+VCVTNEPS2BF16	ymmreg,ymmrm256				rm:	vex.256.f3.0f38.w0 72 /r	AVXNECONVERT,FUTURE,LATEVEX,SY
+
+;# AVX Vector Neural Network Instructions
+; Must precede AVX-512 versions
+VPDPBSSD  	 xmmreg,xmmreg,xmmrm128			rvm:	vex.128.f2.0f38.w0 50 /r	AVXVNNIINT8,FUTURE,LATEVEX,SX
+VPDPBSSD  	 ymmreg,ymmreg,ymmrm256			rvm:	vex.256.f2.0f38.w0 50 /r	AVXVNNIINT8,FUTURE,LATEVEX,SY
+VPDPBSSDS  	 xmmreg,xmmreg,xmmrm128			rvm:	vex.128.f2.0f38.w0 51 /r	AVXVNNIINT8,FUTURE,LATEVEX,SX
+VPDPBSSDS  	 ymmreg,ymmreg,ymmrm256			rvm:	vex.256.f2.0f38.w0 51 /r	AVXVNNIINT8,FUTURE,LATEVEX,SY
+VPDPBSUD  	 xmmreg,xmmreg,xmmrm128			rvm:	vex.128.f3.0f38.w0 50 /r	AVXVNNIINT8,FUTURE,LATEVEX,SX
+VPDPBSUD  	 ymmreg,ymmreg,ymmrm256			rvm:	vex.256.f3.0f38.w0 50 /r	AVXVNNIINT8,FUTURE,LATEVEX,SY
+VPDPBSUDS  	 xmmreg,xmmreg,xmmrm128			rvm:	vex.128.f3.0f38.w0 51 /r	AVXVNNIINT8,FUTURE,LATEVEX,SX
+VPDPBSUDS  	 ymmreg,ymmreg,ymmrm256			rvm:	vex.256.f3.0f38.w0 51 /r	AVXVNNIINT8,FUTURE,LATEVEX,SY
+VPDPBUUD  	 xmmreg,xmmreg,xmmrm128			rvm:	vex.128.np.0f38.w0 50 /r	AVXVNNIINT8,FUTURE,LATEVEX,SX
+VPDPBUUD  	 ymmreg,ymmreg,ymmrm256			rvm:	vex.256.np.0f38.w0 50 /r	AVXVNNIINT8,FUTURE,LATEVEX,SY
+VPDPBUUDS  	 xmmreg,xmmreg,xmmrm128			rvm:	vex.128.np.0f38.w0 51 /r	AVXVNNIINT8,FUTURE,LATEVEX,SX
+VPDPBUUDS  	 ymmreg,ymmreg,ymmrm256			rvm:	vex.256.np.0f38.w0 51 /r	AVXVNNIINT8,FUTURE,LATEVEX,SY
+
+;# AVX Integer Fused Multiply-Add
+; Must precede AVX-512 versions
+VPMADD52HUQ     xmmreg,xmmreg,xmmrm128			rvm:	vex.128.66.0f38.w1 b5 /r	AVXIFMA,FUTURE,LATEVEX,SX
+VPMADD52HUQ     ymmreg,ymmreg,ymmrm256			rvm:	vex.256.66.0f38.w1 b5 /r	AVXIFMA,FUTURE,LATEVEX,SY
+VPMADD52LUQ     xmmreg,xmmreg,xmmrm128			rvm:	vex.128.66.0f38.w1 b4 /r	AVXIFMA,FUTURE,LATEVEX,SX
+VPMADD52LUQ     ymmreg,ymmreg,ymmrm256			rvm:	vex.256.66.0f38.w1 b4 /r	AVXIFMA,FUTURE,LATEVEX,SY
+
+;# AVX-512 mask register instructions
+KADDB           kreg,kreg,kreg                      rvm: vex.nds.l1.66.0f.w0 4a /r  FUTURE
+KADDD           kreg,kreg,kreg                      rvm: vex.nds.l1.66.0f.w1 4a /r  FUTURE
+KADDQ           kreg,kreg,kreg                      rvm: vex.nds.l1.0f.w1 4a /r  FUTURE
+KADDW           kreg,kreg,kreg                      rvm: vex.nds.l1.0f.w0 4a /r  FUTURE
+KANDB           kreg,kreg,kreg                      rvm: vex.nds.l1.66.0f.w0 41 /r  FUTURE
+KANDD           kreg,kreg,kreg                      rvm: vex.nds.l1.66.0f.w1 41 /r  FUTURE
+KANDNB          kreg,kreg,kreg                      rvm: vex.nds.l1.66.0f.w0 42 /r  FUTURE
+KANDND          kreg,kreg,kreg                      rvm: vex.nds.l1.66.0f.w1 42 /r  FUTURE
+KANDNQ          kreg,kreg,kreg                      rvm: vex.nds.l1.0f.w1 42 /r  FUTURE
+KANDNW          kreg,kreg,kreg                      rvm: vex.nds.l1.0f.w0 42 /r  FUTURE
+KANDQ           kreg,kreg,kreg                      rvm: vex.nds.l1.0f.w1 41 /r  FUTURE
+KANDW           kreg,kreg,kreg                      rvm: vex.nds.l1.0f.w0 41 /r  FUTURE
+KMOVB           kreg,krm8                           rm: vex.l0.66.0f.w0 90 /r  FUTURE
+KMOVB           mem8,kreg                           mr: vex.l0.66.0f.w0 91 /r  FUTURE
+KMOVB           kreg,reg32                          rm: vex.l0.66.0f.w0 92 /r  FUTURE
+KMOVB           kreg,reg8                           rm: vex.l0.66.0f.w0 92 nohi /r  FUTURE,ND
+KMOVB           reg32,kreg                          rm: vex.l0.66.0f.w0 93 /r  FUTURE
+KMOVD           kreg,krm32                          rm: vex.l0.66.0f.w1 90 /r  FUTURE
+KMOVD           mem32,kreg                          mr: vex.l0.66.0f.w1 91 /r  FUTURE
+KMOVD           kreg,reg32                          rm: vex.l0.f2.0f.w0 92 /r  FUTURE
+KMOVD           reg32,kreg                          rm: vex.l0.f2.0f.w0 93 /r  FUTURE
+KMOVQ           kreg,krm64                          rm: vex.l0.0f.w1 90 /r  FUTURE
+KMOVQ           mem64,kreg                          mr: vex.l0.0f.w1 91 /r  FUTURE
+KMOVQ           kreg,reg64                          rm: vex.l0.f2.0f.w1 92 /r  FUTURE
+KMOVQ           reg64,kreg                          rm: vex.l0.f2.0f.w1 93 /r  FUTURE
+KMOVW           kreg,krm16                          rm: vex.l0.0f.w0 90 /r  FUTURE
+KMOVW           mem16,kreg                          mr: vex.l0.0f.w0 91 /r  FUTURE
+KMOVW           kreg,reg32                          rm: vex.l0.0f.w0 92 /r  FUTURE
+KMOVW           kreg,reg16                          rm: vex.l0.0f.w0 92 /r  FUTURE,ND
+KMOVW           reg32,kreg                          rm: vex.l0.0f.w0 93 /r  FUTURE
+KNOTB           kreg,kreg                           rm: vex.l0.66.0f.w0 44 /r  FUTURE
+KNOTD           kreg,kreg                           rm: vex.l0.66.0f.w1 44 /r  FUTURE
+KNOTQ           kreg,kreg                           rm: vex.l0.0f.w1 44 /r  FUTURE
+KNOTW           kreg,kreg                           rm: vex.l0.0f.w0 44 /r  FUTURE
+KORB            kreg,kreg,kreg                      rvm: vex.nds.l1.66.0f.w0 45 /r  FUTURE
+KORD            kreg,kreg,kreg                      rvm: vex.nds.l1.66.0f.w1 45 /r  FUTURE
+KORQ            kreg,kreg,kreg                      rvm: vex.nds.l1.0f.w1 45 /r  FUTURE
+KORW            kreg,kreg,kreg                      rvm: vex.nds.l1.0f.w0 45 /r  FUTURE
+KORTESTB        kreg,kreg                           rm: vex.l0.66.0f.w0 98 /r  FUTURE
+KORTESTD        kreg,kreg                           rm: vex.l0.66.0f.w1 98 /r  FUTURE
+KORTESTQ        kreg,kreg                           rm: vex.l0.0f.w1 98 /r  FUTURE
+KORTESTW        kreg,kreg                           rm: vex.l0.0f.w0 98 /r  FUTURE
+KSHIFTLB        kreg,kreg,imm8                      rmi: vex.l0.66.0f3a.w0 32 /r ib  FUTURE
+KSHIFTLD        kreg,kreg,imm8                      rmi: vex.l0.66.0f3a.w0 33 /r ib  FUTURE
+KSHIFTLQ        kreg,kreg,imm8                      rmi: vex.l0.66.0f3a.w1 33 /r ib  FUTURE
+KSHIFTLW        kreg,kreg,imm8                      rmi: vex.l0.66.0f3a.w1 32 /r ib  FUTURE
+KSHIFTRB        kreg,kreg,imm8                      rmi: vex.l0.66.0f3a.w0 30 /r ib  FUTURE
+KSHIFTRD        kreg,kreg,imm8                      rmi: vex.l0.66.0f3a.w0 31 /r ib  FUTURE
+KSHIFTRQ        kreg,kreg,imm8                      rmi: vex.l0.66.0f3a.w1 31 /r ib  FUTURE
+KSHIFTRW        kreg,kreg,imm8                      rmi: vex.l0.66.0f3a.w1 30 /r ib  FUTURE
+KTESTB          kreg,kreg                           rm: vex.l0.66.0f.w0 99 /r  FUTURE
+KTESTD          kreg,kreg                           rm: vex.l0.66.0f.w1 99 /r  FUTURE
+KTESTQ          kreg,kreg                           rm: vex.l0.0f.w1 99 /r  FUTURE
+KTESTW          kreg,kreg                           rm: vex.l0.0f.w0 99 /r  FUTURE
+KUNPCKBW        kreg,kreg,kreg                      rvm: vex.nds.l1.66.0f.w0 4b /r  FUTURE
+KUNPCKDQ        kreg,kreg,kreg                      rvm: vex.nds.l1.0f.w1 4b /r  FUTURE
+KUNPCKWD        kreg,kreg,kreg                      rvm: vex.nds.l1.0f.w0 4b /r  FUTURE
+KXNORB          kreg,kreg,kreg                      rvm: vex.nds.l1.66.0f.w0 46 /r  FUTURE
+KXNORD          kreg,kreg,kreg                      rvm: vex.nds.l1.66.0f.w1 46 /r  FUTURE
+KXNORQ          kreg,kreg,kreg                      rvm: vex.nds.l1.0f.w1 46 /r  FUTURE
+KXNORW          kreg,kreg,kreg                      rvm: vex.nds.l1.0f.w0 46 /r  FUTURE
+KXORB           kreg,kreg,kreg                      rvm: vex.nds.l1.66.0f.w0 47 /r  FUTURE
+KXORD           kreg,kreg,kreg                      rvm: vex.nds.l1.66.0f.w1 47 /r  FUTURE
+KXORQ           kreg,kreg,kreg                      rvm: vex.nds.l1.0f.w1 47 /r  FUTURE
+KXORW           kreg,kreg,kreg                      rvm: vex.nds.l1.0f.w0 47 /r  FUTURE
+
+;# AVX-512 mask register instructions (aliases requiring explicit size support)
+KADD            kreg8,kreg,kreg                     rvm: vex.nds.l1.66.0f.w0 4a /r  FUTURE,ND,SM
+KADD            kreg32,kreg,kreg                    rvm: vex.nds.l1.66.0f.w1 4a /r  FUTURE,ND,SM
+KADD            kreg64,kreg,kreg                    rvm: vex.nds.l1.0f.w1 4a /r  FUTURE,ND,SM
+KADD            kreg16,kreg,kreg                    rvm: vex.nds.l1.0f.w0 4a /r  FUTURE,ND,SM
+KAND            kreg8,kreg,kreg                     rvm: vex.nds.l1.66.0f.w0 41 /r  FUTURE,ND,SM
+KAND            kreg32,kreg,kreg                    rvm: vex.nds.l1.66.0f.w1 41 /r  FUTURE,ND,SM
+KANDN           kreg64,kreg,kreg                    rvm: vex.nds.l1.66.0f.w0 42 /r  FUTURE,ND,SM
+KANDN           kreg16,kreg,kreg                    rvm: vex.nds.l1.66.0f.w1 42 /r  FUTURE,ND,SM
+KANDN           kreg8,kreg,kreg                     rvm: vex.nds.l1.0f.w1 42 /r  FUTURE,ND,SM
+KANDN           kreg32,kreg,kreg                    rvm: vex.nds.l1.0f.w0 42 /r  FUTURE,ND,SM
+KAND            kreg64,kreg,kreg                    rvm: vex.nds.l1.0f.w1 41 /r  FUTURE,ND,SM
+KAND            kreg16,kreg,kreg                    rvm: vex.nds.l1.0f.w0 41 /r  FUTURE,ND,SM
+KMOV            kreg8,krm8                          rm: vex.l0.66.0f.w0 90 /r  FUTURE,ND,SM
+KMOV            mem8,kreg8                          mr: vex.l0.66.0f.w0 91 /r  FUTURE,ND,SB,SM
+KMOV            kreg8,reg32                         rm: vex.l0.66.0f.w0 92 /r  FUTURE,ND,SX
+KMOV            kreg8,reg8                          rm: vex.l0.66.0f.w0 92 /r  FUTURE,ND,SM
+KMOV            reg32,kreg8                         rm: vex.l0.66.0f.w0 93 /r  FUTURE,ND,SX
+KMOV            kreg32,krm32                        rm: vex.l0.66.0f.w1 90 /r  FUTURE,ND,SM
+KMOV            mem32,kreg32                        mr: vex.l0.66.0f.w1 91 /r  FUTURE,ND,SM
+KMOV            kreg32,reg32                        rm: vex.l0.f2.0f.w0 92 /r  FUTURE,ND,SM
+KMOV            reg32,kreg32                        rm: vex.l0.f2.0f.w0 93 /r  FUTURE,ND,SM
+KMOV            kreg64,krm64                        rm: vex.l0.0f.w1 90 /r  FUTURE,ND,SM
+KMOV            mem64,kreg64                        mr: vex.l0.0f.w1 91 /r  FUTURE,ND,SM
+KMOV            kreg64,reg64                        rm: vex.l0.f2.0f.w1 92 /r  FUTURE,ND,SM
+KMOV            reg64,kreg64                        rm: vex.l0.f2.0f.w1 93 /r  FUTURE,ND,SM
+KMOV            kreg16,krm16                        rm: vex.l0.0f.w0 90 /r  FUTURE,ND,SM
+KMOV            mem16,kreg16                        mr: vex.l0.0f.w0 91 /r  FUTURE,ND,SM
+KMOV            kreg16,reg32                        rm: vex.l0.0f.w0 92 /r  FUTURE,ND,SX
+KMOV            reg32,kreg16                        rm: vex.l0.0f.w0 93 /r  FUTURE,ND,SX
+KMOV            kreg16,reg32                        rm: vex.l0.0f.w0 92 /r  FUTURE,ND,SX
+KMOV            kreg16,reg16                        rm: vex.l0.0f.w0 92 /r  FUTURE,ND,SM
+KNOT            kreg8,kreg8                         rm: vex.l0.66.0f.w0 44 /r  FUTURE,ND,SM
+KNOT            kreg32,kreg32                       rm: vex.l0.66.0f.w1 44 /r  FUTURE,ND,SM
+KNOT            kreg64,kreg64                       rm: vex.l0.0f.w1 44 /r  FUTURE,ND,SM
+KNOT            kreg16,kreg16                       rm: vex.l0.0f.w0 44 /r  FUTURE,ND,SM
+KOR             kreg8,kreg,kreg                     rvm: vex.nds.l1.66.0f.w0 45 /r  FUTURE,ND,SM
+KOR             kreg32,kreg,kreg                    rvm: vex.nds.l1.66.0f.w1 45 /r  FUTURE,ND,SM
+KOR             kreg64,kreg,kreg                    rvm: vex.nds.l1.0f.w1 45 /r  FUTURE,ND,SM
+KOR             kreg16,kreg,kreg                    rvm: vex.nds.l1.0f.w0 45 /r  FUTURE,ND,SM
+KORTEST         kreg8,kreg                          rm: vex.l0.66.0f.w0 98 /r  FUTURE,ND,SM
+KORTEST         kreg32,kreg                         rm: vex.l0.66.0f.w1 98 /r  FUTURE,ND,SM
+KORTEST         kreg64,kreg                         rm: vex.l0.0f.w1 98 /r  FUTURE,ND,SM
+KORTEST         kreg16,kreg                         rm: vex.l0.0f.w0 98 /r  FUTURE,ND,SM
+KSHIFTL         kreg8,kreg,imm8                     rmi: vex.l0.66.0f3a.w0 32 /r ib  FUTURE,ND,SM2
+KSHIFTL         kreg32,kreg,imm8                    rmi: vex.l0.66.0f3a.w0 33 /r ib  FUTURE,ND,SM2
+KSHIFTL         kreg64,kreg,imm8                    rmi: vex.l0.66.0f3a.w1 33 /r ib  FUTURE,ND,SM2
+KSHIFTL         kreg16,kreg,imm8                    rmi: vex.l0.66.0f3a.w1 32 /r ib  FUTURE,ND,SM2
+KSHIFTR         kreg8,kreg,imm8                     rmi: vex.l0.66.0f3a.w0 30 /r ib  FUTURE,ND,SM2
+KSHIFTR         kreg32,kreg,imm8                    rmi: vex.l0.66.0f3a.w0 31 /r ib  FUTURE,ND,SM2
+KSHIFTR         kreg64,kreg,imm8                    rmi: vex.l0.66.0f3a.w1 31 /r ib  FUTURE,ND,SM2
+KSHIFTR         kreg16,kreg,imm8                    rmi: vex.l0.66.0f3a.w1 30 /r ib  FUTURE,ND,SM2
+KTEST           kreg8,kreg                          rm: vex.l0.66.0f.w0 99 /r  FUTURE,ND,SM
+KTEST           kreg32,kreg                         rm: vex.l0.66.0f.w1 99 /r  FUTURE,ND,SM
+KTEST           kreg64,kreg                         rm: vex.l0.0f.w1 99 /r  FUTURE,ND,SM
+KTEST           kreg16,kreg                         rm: vex.l0.0f.w0 99 /r  FUTURE,ND,SM
+KUNPCK          kreg16,kreg8,kreg8                  rvm: vex.nds.l1.66.0f.w0 4b /r  FUTURE,ND
+KUNPCK          kreg64,kreg32,kreg32                rvm: vex.nds.l1.0f.w1 4b /r  FUTURE,ND
+KUNPCK          kreg32,kreg16,kreg16                rvm: vex.nds.l1.0f.w0 4b /r  FUTURE,ND
+KXNOR           kreg8,kreg,kreg                     rvm: vex.nds.l1.66.0f.w0 46 /r  FUTURE,ND,SM
+KXNOR           kreg32,kreg,kreg                    rvm: vex.nds.l1.66.0f.w1 46 /r  FUTURE,ND,SM
+KXNOR           kreg64,kreg,kreg                    rvm: vex.nds.l1.0f.w1 46 /r  FUTURE,ND,SM
+KXNOR           kreg16,kreg,kreg                    rvm: vex.nds.l1.0f.w0 46 /r  FUTURE,ND,SM
+KXOR            kreg8,kreg,kreg                     rvm: vex.nds.l1.66.0f.w0 47 /r  FUTURE,ND,SM
+KXOR            kreg32,kreg,kreg                    rvm: vex.nds.l1.66.0f.w1 47 /r  FUTURE,ND,SM
+KXOR            kreg64,kreg,kreg                    rvm: vex.nds.l1.0f.w1 47 /r  FUTURE,ND,SM
+KXOR            kreg16,kreg,kreg                    rvm: vex.nds.l1.0f.w0 47 /r  FUTURE,ND,SM
+
+;# AVX-512 instructions
+VADDPD          xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f.w1 58 /r  AVX512VL,AVX512,FUTURE
+VADDPD          ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f.w1 58 /r  AVX512VL,AVX512,FUTURE
+VADDPD          zmmreg|mask|z,zmmreg*,zmmrm512|b64|er rvm:fv: evex.nds.512.66.0f.w1 58 /r  AVX512,FUTURE
+VADDPS          xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.0f.w0 58 /r  AVX512VL,AVX512,FUTURE
+VADDPS          ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.0f.w0 58 /r  AVX512VL,AVX512,FUTURE
+VADDPS          zmmreg|mask|z,zmmreg*,zmmrm512|b32|er rvm:fv: evex.nds.512.0f.w0 58 /r  AVX512,FUTURE
+VADDSD          xmmreg|mask|z,xmmreg*,xmmrm64|er    rvm:t1s: evex.nds.128.f2.0f.w1 58 /r  AVX512,FUTURE
+VADDSS          xmmreg|mask|z,xmmreg*,xmmrm32|er    rvm:t1s: evex.nds.128.f3.0f.w0 58 /r  AVX512,FUTURE
+VALIGND         xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 rvmi:fv: evex.nds.128.66.0f3a.w0 03 /r ib  AVX512VL,AVX512,FUTURE
+VALIGND         ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 rvmi:fv: evex.nds.256.66.0f3a.w0 03 /r ib  AVX512VL,AVX512,FUTURE
+VALIGND         zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 rvmi:fv: evex.nds.512.66.0f3a.w0 03 /r ib  AVX512,FUTURE
+VALIGNQ         xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 rvmi:fv: evex.nds.128.66.0f3a.w1 03 /r ib  AVX512VL,AVX512,FUTURE
+VALIGNQ         ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 rvmi:fv: evex.nds.256.66.0f3a.w1 03 /r ib  AVX512VL,AVX512,FUTURE
+VALIGNQ         zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 rvmi:fv: evex.nds.512.66.0f3a.w1 03 /r ib  AVX512,FUTURE
+VANDNPD         xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f.w1 55 /r  AVX512VL,AVX512DQ,FUTURE
+VANDNPD         ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f.w1 55 /r  AVX512VL,AVX512DQ,FUTURE
+VANDNPD         zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f.w1 55 /r  AVX512DQ,FUTURE
+VANDNPS         xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.0f.w0 55 /r  AVX512VL,AVX512DQ,FUTURE
+VANDNPS         ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.0f.w0 55 /r  AVX512VL,AVX512DQ,FUTURE
+VANDNPS         zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.0f.w0 55 /r  AVX512DQ,FUTURE
+VANDPD          xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f.w1 54 /r  AVX512VL,AVX512DQ,FUTURE
+VANDPD          ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f.w1 54 /r  AVX512VL,AVX512DQ,FUTURE
+VANDPD          zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f.w1 54 /r  AVX512DQ,FUTURE
+VANDPS          xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.0f.w0 54 /r  AVX512VL,AVX512DQ,FUTURE
+VANDPS          ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.0f.w0 54 /r  AVX512VL,AVX512DQ,FUTURE
+VANDPS          zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.0f.w0 54 /r  AVX512DQ,FUTURE
+VBLENDMPD       xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 65 /r  AVX512VL,AVX512,FUTURE
+VBLENDMPD       ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 65 /r  AVX512VL,AVX512,FUTURE
+VBLENDMPD       zmmreg|mask|z,zmmreg,zmmrm512|b64   rvm:fv: evex.nds.512.66.0f38.w1 65 /r  AVX512,FUTURE
+VBLENDMPS       xmmreg|mask|z,xmmreg,xmmrm128|b32   rvm:fv: evex.nds.128.66.0f38.w0 65 /r  AVX512VL,AVX512,FUTURE
+VBLENDMPS       ymmreg|mask|z,ymmreg,ymmrm256|b32   rvm:fv: evex.nds.256.66.0f38.w0 65 /r  AVX512VL,AVX512,FUTURE
+VBLENDMPS       zmmreg|mask|z,zmmreg,zmmrm512|b32   rvm:fv: evex.nds.512.66.0f38.w0 65 /r  AVX512,FUTURE
+VBROADCASTF32X2 ymmreg|mask|z,xmmrm64               rm:t2: evex.256.66.0f38.w0 19 /r  AVX512VL,AVX512DQ,FUTURE
+VBROADCASTF32X2 zmmreg|mask|z,xmmrm64               rm:t2: evex.512.66.0f38.w0 19 /r  AVX512DQ,FUTURE
+VBROADCASTF32X4 ymmreg|mask|z,mem128                rm:t4: evex.256.66.0f38.w0 1a /r  AVX512VL,AVX512,FUTURE
+VBROADCASTF32X4 zmmreg|mask|z,mem128                rm:t4: evex.512.66.0f38.w0 1a /r  AVX512,FUTURE
+VBROADCASTF32X8 zmmreg|mask|z,mem256                rm:t8: evex.512.66.0f38.w0 1b /r  AVX512DQ,FUTURE
+VBROADCASTF64X2 ymmreg|mask|z,mem128                rm:t2: evex.256.66.0f38.w1 1a /r  AVX512VL,AVX512DQ,FUTURE
+VBROADCASTF64X2 zmmreg|mask|z,mem128                rm:t2: evex.512.66.0f38.w1 1a /r  AVX512DQ,FUTURE
+VBROADCASTF64X4 zmmreg|mask|z,mem256                rm:t4: evex.512.66.0f38.w1 1b /r  AVX512,FUTURE
+VBROADCASTI32X2 xmmreg|mask|z,xmmrm64               rm:t2: evex.128.66.0f38.w0 59 /r  AVX512VL,AVX512DQ,FUTURE
+VBROADCASTI32X2 ymmreg|mask|z,xmmrm64               rm:t2: evex.256.66.0f38.w0 59 /r  AVX512VL,AVX512DQ,FUTURE
+VBROADCASTI32X2 zmmreg|mask|z,xmmrm64               rm:t2: evex.512.66.0f38.w0 59 /r  AVX512DQ,FUTURE
+VBROADCASTI32X4 ymmreg|mask|z,mem128                rm:t4: evex.256.66.0f38.w0 5a /r  AVX512VL,AVX512,FUTURE
+VBROADCASTI32X4 zmmreg|mask|z,mem128                rm:t4: evex.512.66.0f38.w0 5a /r  AVX512,FUTURE
+VBROADCASTI32X8 zmmreg|mask|z,mem256                rm:t8: evex.512.66.0f38.w0 5b /r  AVX512DQ,FUTURE
+VBROADCASTI64X2 ymmreg|mask|z,mem128                rm:t2: evex.256.66.0f38.w1 5a /r  AVX512VL,AVX512DQ,FUTURE
+VBROADCASTI64X2 zmmreg|mask|z,mem128                rm:t2: evex.512.66.0f38.w1 5a /r  AVX512DQ,FUTURE
+VBROADCASTI64X4 zmmreg|mask|z,mem256                rm:t4: evex.512.66.0f38.w1 5b /r  AVX512,FUTURE
+VBROADCASTSD    ymmreg|mask|z,mem64                 rm:t1s: evex.256.66.0f38.w1 19 /r  AVX512VL,AVX512,FUTURE
+VBROADCASTSD    zmmreg|mask|z,mem64                 rm:t1s: evex.512.66.0f38.w1 19 /r  AVX512,FUTURE
+VBROADCASTSD    ymmreg|mask|z,xmmreg                rm: evex.256.66.0f38.w1 19 /r  AVX512VL,AVX512,FUTURE
+VBROADCASTSD    zmmreg|mask|z,xmmreg                rm: evex.512.66.0f38.w1 19 /r  AVX512,FUTURE
+VBROADCASTSS    xmmreg|mask|z,mem32                 rm:t1s: evex.128.66.0f38.w0 18 /r  AVX512VL,AVX512,FUTURE
+VBROADCASTSS    ymmreg|mask|z,mem32                 rm:t1s: evex.256.66.0f38.w0 18 /r  AVX512VL,AVX512,FUTURE
+VBROADCASTSS    zmmreg|mask|z,mem32                 rm:t1s: evex.512.66.0f38.w0 18 /r  AVX512,FUTURE
+VBROADCASTSS    xmmreg|mask|z,xmmreg                rm: evex.128.66.0f38.w0 18 /r  AVX512VL,AVX512,FUTURE
+VBROADCASTSS    ymmreg|mask|z,xmmreg                rm: evex.256.66.0f38.w0 18 /r  AVX512VL,AVX512,FUTURE
+VBROADCASTSS    zmmreg|mask|z,xmmreg                rm: evex.512.66.0f38.w0 18 /r  AVX512,FUTURE
+VCMPEQPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 00  AVX512VL,AVX512,FUTURE
+VCMPEQPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 00  AVX512VL,AVX512,FUTURE
+VCMPEQPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 00  AVX512,FUTURE
+VCMPEQPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 00  AVX512VL,AVX512,FUTURE
+VCMPEQPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 00  AVX512VL,AVX512,FUTURE
+VCMPEQPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 00  AVX512,FUTURE
+VCMPEQSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 00  AVX512,FUTURE
+VCMPEQSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 00  AVX512,FUTURE
+VCMPEQ_OQPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 00  AVX512VL,AVX512,FUTURE
+VCMPEQ_OQPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 00  AVX512VL,AVX512,FUTURE
+VCMPEQ_OQPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 00  AVX512,FUTURE
+VCMPEQ_OQPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 00  AVX512VL,AVX512,FUTURE
+VCMPEQ_OQPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 00  AVX512VL,AVX512,FUTURE
+VCMPEQ_OQPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 00  AVX512,FUTURE
+VCMPEQ_OQSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 00  AVX512,FUTURE
+VCMPEQ_OQSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 00  AVX512,FUTURE
+VCMPLTPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 01  AVX512VL,AVX512,FUTURE
+VCMPLTPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 01  AVX512VL,AVX512,FUTURE
+VCMPLTPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 01  AVX512,FUTURE
+VCMPLTPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 01  AVX512VL,AVX512,FUTURE
+VCMPLTPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 01  AVX512VL,AVX512,FUTURE
+VCMPLTPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 01  AVX512,FUTURE
+VCMPLTSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 01  AVX512,FUTURE
+VCMPLTSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 01  AVX512,FUTURE
+VCMPLT_OSPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 01  AVX512VL,AVX512,FUTURE
+VCMPLT_OSPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 01  AVX512VL,AVX512,FUTURE
+VCMPLT_OSPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 01  AVX512,FUTURE
+VCMPLT_OSPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 01  AVX512VL,AVX512,FUTURE
+VCMPLT_OSPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 01  AVX512VL,AVX512,FUTURE
+VCMPLT_OSPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 01  AVX512,FUTURE
+VCMPLT_OSSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 01  AVX512,FUTURE
+VCMPLT_OSSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 01  AVX512,FUTURE
+VCMPLEPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 02  AVX512VL,AVX512,FUTURE
+VCMPLEPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 02  AVX512VL,AVX512,FUTURE
+VCMPLEPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 02  AVX512,FUTURE
+VCMPLEPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 02  AVX512VL,AVX512,FUTURE
+VCMPLEPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 02  AVX512VL,AVX512,FUTURE
+VCMPLEPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 02  AVX512,FUTURE
+VCMPLESD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 02  AVX512,FUTURE
+VCMPLESS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 02  AVX512,FUTURE
+VCMPLE_OSPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 02  AVX512VL,AVX512,FUTURE
+VCMPLE_OSPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 02  AVX512VL,AVX512,FUTURE
+VCMPLE_OSPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 02  AVX512,FUTURE
+VCMPLE_OSPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 02  AVX512VL,AVX512,FUTURE
+VCMPLE_OSPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 02  AVX512VL,AVX512,FUTURE
+VCMPLE_OSPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 02  AVX512,FUTURE
+VCMPLE_OSSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 02  AVX512,FUTURE
+VCMPLE_OSSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 02  AVX512,FUTURE
+VCMPUNORDPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 03  AVX512VL,AVX512,FUTURE
+VCMPUNORDPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 03  AVX512VL,AVX512,FUTURE
+VCMPUNORDPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 03  AVX512,FUTURE
+VCMPUNORDPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 03  AVX512VL,AVX512,FUTURE
+VCMPUNORDPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 03  AVX512VL,AVX512,FUTURE
+VCMPUNORDPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 03  AVX512,FUTURE
+VCMPUNORDSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 03  AVX512,FUTURE
+VCMPUNORDSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 03  AVX512,FUTURE
+VCMPUNORD_QPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 03  AVX512VL,AVX512,FUTURE
+VCMPUNORD_QPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 03  AVX512VL,AVX512,FUTURE
+VCMPUNORD_QPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 03  AVX512,FUTURE
+VCMPUNORD_QPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 03  AVX512VL,AVX512,FUTURE
+VCMPUNORD_QPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 03  AVX512VL,AVX512,FUTURE
+VCMPUNORD_QPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 03  AVX512,FUTURE
+VCMPUNORD_QSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 03  AVX512,FUTURE
+VCMPUNORD_QSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 03  AVX512,FUTURE
+VCMPNEQPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 04  AVX512VL,AVX512,FUTURE
+VCMPNEQPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 04  AVX512VL,AVX512,FUTURE
+VCMPNEQPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 04  AVX512,FUTURE
+VCMPNEQPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 04  AVX512VL,AVX512,FUTURE
+VCMPNEQPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 04  AVX512VL,AVX512,FUTURE
+VCMPNEQPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 04  AVX512,FUTURE
+VCMPNEQSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 04  AVX512,FUTURE
+VCMPNEQSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 04  AVX512,FUTURE
+VCMPNEQ_UQPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 04  AVX512VL,AVX512,FUTURE
+VCMPNEQ_UQPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 04  AVX512VL,AVX512,FUTURE
+VCMPNEQ_UQPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 04  AVX512,FUTURE
+VCMPNEQ_UQPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 04  AVX512VL,AVX512,FUTURE
+VCMPNEQ_UQPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 04  AVX512VL,AVX512,FUTURE
+VCMPNEQ_UQPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 04  AVX512,FUTURE
+VCMPNEQ_UQSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 04  AVX512,FUTURE
+VCMPNEQ_UQSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 04  AVX512,FUTURE
+VCMPNLTPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 05  AVX512VL,AVX512,FUTURE
+VCMPNLTPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 05  AVX512VL,AVX512,FUTURE
+VCMPNLTPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 05  AVX512,FUTURE
+VCMPNLTPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 05  AVX512VL,AVX512,FUTURE
+VCMPNLTPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 05  AVX512VL,AVX512,FUTURE
+VCMPNLTPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 05  AVX512,FUTURE
+VCMPNLTSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 05  AVX512,FUTURE
+VCMPNLTSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 05  AVX512,FUTURE
+VCMPNLT_USPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 05  AVX512VL,AVX512,FUTURE
+VCMPNLT_USPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 05  AVX512VL,AVX512,FUTURE
+VCMPNLT_USPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 05  AVX512,FUTURE
+VCMPNLT_USPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 05  AVX512VL,AVX512,FUTURE
+VCMPNLT_USPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 05  AVX512VL,AVX512,FUTURE
+VCMPNLT_USPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 05  AVX512,FUTURE
+VCMPNLT_USSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 05  AVX512,FUTURE
+VCMPNLT_USSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 05  AVX512,FUTURE
+VCMPNLEPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 06  AVX512VL,AVX512,FUTURE
+VCMPNLEPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 06  AVX512VL,AVX512,FUTURE
+VCMPNLEPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 06  AVX512,FUTURE
+VCMPNLEPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 06  AVX512VL,AVX512,FUTURE
+VCMPNLEPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 06  AVX512VL,AVX512,FUTURE
+VCMPNLEPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 06  AVX512,FUTURE
+VCMPNLESD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 06  AVX512,FUTURE
+VCMPNLESS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 06  AVX512,FUTURE
+VCMPNLE_USPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 06  AVX512VL,AVX512,FUTURE
+VCMPNLE_USPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 06  AVX512VL,AVX512,FUTURE
+VCMPNLE_USPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 06  AVX512,FUTURE
+VCMPNLE_USPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 06  AVX512VL,AVX512,FUTURE
+VCMPNLE_USPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 06  AVX512VL,AVX512,FUTURE
+VCMPNLE_USPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 06  AVX512,FUTURE
+VCMPNLE_USSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 06  AVX512,FUTURE
+VCMPNLE_USSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 06  AVX512,FUTURE
+VCMPORDPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 07  AVX512VL,AVX512,FUTURE
+VCMPORDPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 07  AVX512VL,AVX512,FUTURE
+VCMPORDPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 07  AVX512,FUTURE
+VCMPORDPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 07  AVX512VL,AVX512,FUTURE
+VCMPORDPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 07  AVX512VL,AVX512,FUTURE
+VCMPORDPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 07  AVX512,FUTURE
+VCMPORDSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 07  AVX512,FUTURE
+VCMPORDSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 07  AVX512,FUTURE
+VCMPORD_QPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 07  AVX512VL,AVX512,FUTURE
+VCMPORD_QPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 07  AVX512VL,AVX512,FUTURE
+VCMPORD_QPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 07  AVX512,FUTURE
+VCMPORD_QPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 07  AVX512VL,AVX512,FUTURE
+VCMPORD_QPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 07  AVX512VL,AVX512,FUTURE
+VCMPORD_QPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 07  AVX512,FUTURE
+VCMPORD_QSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 07  AVX512,FUTURE
+VCMPORD_QSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 07  AVX512,FUTURE
+VCMPEQ_UQPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 08  AVX512VL,AVX512,FUTURE
+VCMPEQ_UQPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 08  AVX512VL,AVX512,FUTURE
+VCMPEQ_UQPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 08  AVX512,FUTURE
+VCMPEQ_UQPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 08  AVX512VL,AVX512,FUTURE
+VCMPEQ_UQPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 08  AVX512VL,AVX512,FUTURE
+VCMPEQ_UQPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 08  AVX512,FUTURE
+VCMPEQ_UQSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 08  AVX512,FUTURE
+VCMPEQ_UQSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 08  AVX512,FUTURE
+VCMPNGEPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 09  AVX512VL,AVX512,FUTURE
+VCMPNGEPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 09  AVX512VL,AVX512,FUTURE
+VCMPNGEPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 09  AVX512,FUTURE
+VCMPNGEPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 09  AVX512VL,AVX512,FUTURE
+VCMPNGEPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 09  AVX512VL,AVX512,FUTURE
+VCMPNGEPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 09  AVX512,FUTURE
+VCMPNGESD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 09  AVX512,FUTURE
+VCMPNGESS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 09  AVX512,FUTURE
+VCMPNGE_USPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 09  AVX512VL,AVX512,FUTURE
+VCMPNGE_USPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 09  AVX512VL,AVX512,FUTURE
+VCMPNGE_USPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 09  AVX512,FUTURE
+VCMPNGE_USPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 09  AVX512VL,AVX512,FUTURE
+VCMPNGE_USPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 09  AVX512VL,AVX512,FUTURE
+VCMPNGE_USPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 09  AVX512,FUTURE
+VCMPNGE_USSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 09  AVX512,FUTURE
+VCMPNGE_USSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 09  AVX512,FUTURE
+VCMPNGTPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0a  AVX512VL,AVX512,FUTURE
+VCMPNGTPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0a  AVX512VL,AVX512,FUTURE
+VCMPNGTPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0a  AVX512,FUTURE
+VCMPNGTPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 0a  AVX512VL,AVX512,FUTURE
+VCMPNGTPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 0a  AVX512VL,AVX512,FUTURE
+VCMPNGTPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 0a  AVX512,FUTURE
+VCMPNGTSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 0a  AVX512,FUTURE
+VCMPNGTSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 0a  AVX512,FUTURE
+VCMPNGT_USPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0a  AVX512VL,AVX512,FUTURE
+VCMPNGT_USPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0a  AVX512VL,AVX512,FUTURE
+VCMPNGT_USPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0a  AVX512,FUTURE
+VCMPNGT_USPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 0a  AVX512VL,AVX512,FUTURE
+VCMPNGT_USPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 0a  AVX512VL,AVX512,FUTURE
+VCMPNGT_USPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 0a  AVX512,FUTURE
+VCMPNGT_USSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 0a  AVX512,FUTURE
+VCMPNGT_USSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 0a  AVX512,FUTURE
+VCMPFALSEPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0b  AVX512VL,AVX512,FUTURE
+VCMPFALSEPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0b  AVX512VL,AVX512,FUTURE
+VCMPFALSEPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0b  AVX512,FUTURE
+VCMPFALSEPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 0b  AVX512VL,AVX512,FUTURE
+VCMPFALSEPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 0b  AVX512VL,AVX512,FUTURE
+VCMPFALSEPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 0b  AVX512,FUTURE
+VCMPFALSESD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 0b  AVX512,FUTURE
+VCMPFALSESS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 0b  AVX512,FUTURE
+VCMPFALSE_OQPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0b  AVX512VL,AVX512,FUTURE
+VCMPFALSE_OQPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0b  AVX512VL,AVX512,FUTURE
+VCMPFALSE_OQPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0b  AVX512,FUTURE
+VCMPFALSE_OQPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 0b  AVX512VL,AVX512,FUTURE
+VCMPFALSE_OQPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 0b  AVX512VL,AVX512,FUTURE
+VCMPFALSE_OQPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 0b  AVX512,FUTURE
+VCMPFALSE_OQSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 0b  AVX512,FUTURE
+VCMPFALSE_OQSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 0b  AVX512,FUTURE
+VCMPNEQ_OQPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0c  AVX512VL,AVX512,FUTURE
+VCMPNEQ_OQPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0c  AVX512VL,AVX512,FUTURE
+VCMPNEQ_OQPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0c  AVX512,FUTURE
+VCMPNEQ_OQPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 0c  AVX512VL,AVX512,FUTURE
+VCMPNEQ_OQPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 0c  AVX512VL,AVX512,FUTURE
+VCMPNEQ_OQPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 0c  AVX512,FUTURE
+VCMPNEQ_OQSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 0c  AVX512,FUTURE
+VCMPNEQ_OQSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 0c  AVX512,FUTURE
+VCMPGEPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0d  AVX512VL,AVX512,FUTURE
+VCMPGEPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0d  AVX512VL,AVX512,FUTURE
+VCMPGEPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0d  AVX512,FUTURE
+VCMPGEPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 0d  AVX512VL,AVX512,FUTURE
+VCMPGEPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 0d  AVX512VL,AVX512,FUTURE
+VCMPGEPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 0d  AVX512,FUTURE
+VCMPGESD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 0d  AVX512,FUTURE
+VCMPGESS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 0d  AVX512,FUTURE
+VCMPGE_OSPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0d  AVX512VL,AVX512,FUTURE
+VCMPGE_OSPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0d  AVX512VL,AVX512,FUTURE
+VCMPGE_OSPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0d  AVX512,FUTURE
+VCMPGE_OSPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 0d  AVX512VL,AVX512,FUTURE
+VCMPGE_OSPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 0d  AVX512VL,AVX512,FUTURE
+VCMPGE_OSPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 0d  AVX512,FUTURE
+VCMPGE_OSSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 0d  AVX512,FUTURE
+VCMPGE_OSSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 0d  AVX512,FUTURE
+VCMPGTPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0e  AVX512VL,AVX512,FUTURE
+VCMPGTPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0e  AVX512VL,AVX512,FUTURE
+VCMPGTPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0e  AVX512,FUTURE
+VCMPGTPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 0e  AVX512VL,AVX512,FUTURE
+VCMPGTPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 0e  AVX512VL,AVX512,FUTURE
+VCMPGTPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 0e  AVX512,FUTURE
+VCMPGTSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 0e  AVX512,FUTURE
+VCMPGTSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 0e  AVX512,FUTURE
+VCMPGT_OSPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0e  AVX512VL,AVX512,FUTURE
+VCMPGT_OSPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0e  AVX512VL,AVX512,FUTURE
+VCMPGT_OSPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0e  AVX512,FUTURE
+VCMPGT_OSPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 0e  AVX512VL,AVX512,FUTURE
+VCMPGT_OSPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 0e  AVX512VL,AVX512,FUTURE
+VCMPGT_OSPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 0e  AVX512,FUTURE
+VCMPGT_OSSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 0e  AVX512,FUTURE
+VCMPGT_OSSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 0e  AVX512,FUTURE
+VCMPTRUEPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0f  AVX512VL,AVX512,FUTURE
+VCMPTRUEPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0f  AVX512VL,AVX512,FUTURE
+VCMPTRUEPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0f  AVX512,FUTURE
+VCMPTRUEPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 0f  AVX512VL,AVX512,FUTURE
+VCMPTRUEPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 0f  AVX512VL,AVX512,FUTURE
+VCMPTRUEPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 0f  AVX512,FUTURE
+VCMPTRUESD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 0f  AVX512,FUTURE
+VCMPTRUESS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 0f  AVX512,FUTURE
+VCMPTRUE_UQPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0f  AVX512VL,AVX512,FUTURE
+VCMPTRUE_UQPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0f  AVX512VL,AVX512,FUTURE
+VCMPTRUE_UQPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0f  AVX512,FUTURE
+VCMPTRUE_UQPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 0f  AVX512VL,AVX512,FUTURE
+VCMPTRUE_UQPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 0f  AVX512VL,AVX512,FUTURE
+VCMPTRUE_UQPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 0f  AVX512,FUTURE
+VCMPTRUE_UQSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 0f  AVX512,FUTURE
+VCMPTRUE_UQSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 0f  AVX512,FUTURE
+VCMPEQ_OSPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 10  AVX512VL,AVX512,FUTURE
+VCMPEQ_OSPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 10  AVX512VL,AVX512,FUTURE
+VCMPEQ_OSPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 10  AVX512,FUTURE
+VCMPEQ_OSPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 10  AVX512VL,AVX512,FUTURE
+VCMPEQ_OSPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 10  AVX512VL,AVX512,FUTURE
+VCMPEQ_OSPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 10  AVX512,FUTURE
+VCMPEQ_OSSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 10  AVX512,FUTURE
+VCMPEQ_OSSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 10  AVX512,FUTURE
+VCMPLT_OQPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 11  AVX512VL,AVX512,FUTURE
+VCMPLT_OQPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 11  AVX512VL,AVX512,FUTURE
+VCMPLT_OQPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 11  AVX512,FUTURE
+VCMPLT_OQPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 11  AVX512VL,AVX512,FUTURE
+VCMPLT_OQPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 11  AVX512VL,AVX512,FUTURE
+VCMPLT_OQPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 11  AVX512,FUTURE
+VCMPLT_OQSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 11  AVX512,FUTURE
+VCMPLT_OQSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 11  AVX512,FUTURE
+VCMPLE_OQPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 12  AVX512VL,AVX512,FUTURE
+VCMPLE_OQPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 12  AVX512VL,AVX512,FUTURE
+VCMPLE_OQPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 12  AVX512,FUTURE
+VCMPLE_OQPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 12  AVX512VL,AVX512,FUTURE
+VCMPLE_OQPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 12  AVX512VL,AVX512,FUTURE
+VCMPLE_OQPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 12  AVX512,FUTURE
+VCMPLE_OQSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 12  AVX512,FUTURE
+VCMPLE_OQSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 12  AVX512,FUTURE
+VCMPUNORD_SPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 13  AVX512VL,AVX512,FUTURE
+VCMPUNORD_SPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 13  AVX512VL,AVX512,FUTURE
+VCMPUNORD_SPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 13  AVX512,FUTURE
+VCMPUNORD_SPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 13  AVX512VL,AVX512,FUTURE
+VCMPUNORD_SPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 13  AVX512VL,AVX512,FUTURE
+VCMPUNORD_SPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 13  AVX512,FUTURE
+VCMPUNORD_SSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 13  AVX512,FUTURE
+VCMPUNORD_SSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 13  AVX512,FUTURE
+VCMPNEQ_USPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 14  AVX512VL,AVX512,FUTURE
+VCMPNEQ_USPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 14  AVX512VL,AVX512,FUTURE
+VCMPNEQ_USPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 14  AVX512,FUTURE
+VCMPNEQ_USPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 14  AVX512VL,AVX512,FUTURE
+VCMPNEQ_USPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 14  AVX512VL,AVX512,FUTURE
+VCMPNEQ_USPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 14  AVX512,FUTURE
+VCMPNEQ_USSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 14  AVX512,FUTURE
+VCMPNEQ_USSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 14  AVX512,FUTURE
+VCMPNLT_UQPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 15  AVX512VL,AVX512,FUTURE
+VCMPNLT_UQPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 15  AVX512VL,AVX512,FUTURE
+VCMPNLT_UQPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 15  AVX512,FUTURE
+VCMPNLT_UQPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 15  AVX512VL,AVX512,FUTURE
+VCMPNLT_UQPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 15  AVX512VL,AVX512,FUTURE
+VCMPNLT_UQPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 15  AVX512,FUTURE
+VCMPNLT_UQSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 15  AVX512,FUTURE
+VCMPNLT_UQSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 15  AVX512,FUTURE
+VCMPNLE_UQPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 16  AVX512VL,AVX512,FUTURE
+VCMPNLE_UQPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 16  AVX512VL,AVX512,FUTURE
+VCMPNLE_UQPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 16  AVX512,FUTURE
+VCMPNLE_UQPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 16  AVX512VL,AVX512,FUTURE
+VCMPNLE_UQPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 16  AVX512VL,AVX512,FUTURE
+VCMPNLE_UQPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 16  AVX512,FUTURE
+VCMPNLE_UQSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 16  AVX512,FUTURE
+VCMPNLE_UQSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 16  AVX512,FUTURE
+VCMPORD_SPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 17  AVX512VL,AVX512,FUTURE
+VCMPORD_SPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 17  AVX512VL,AVX512,FUTURE
+VCMPORD_SPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 17  AVX512,FUTURE
+VCMPORD_SPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 17  AVX512VL,AVX512,FUTURE
+VCMPORD_SPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 17  AVX512VL,AVX512,FUTURE
+VCMPORD_SPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 17  AVX512,FUTURE
+VCMPORD_SSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 17  AVX512,FUTURE
+VCMPORD_SSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 17  AVX512,FUTURE
+VCMPEQ_USPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 18  AVX512VL,AVX512,FUTURE
+VCMPEQ_USPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 18  AVX512VL,AVX512,FUTURE
+VCMPEQ_USPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 18  AVX512,FUTURE
+VCMPEQ_USPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 18  AVX512VL,AVX512,FUTURE
+VCMPEQ_USPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 18  AVX512VL,AVX512,FUTURE
+VCMPEQ_USPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 18  AVX512,FUTURE
+VCMPEQ_USSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 18  AVX512,FUTURE
+VCMPEQ_USSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 18  AVX512,FUTURE
+VCMPNGE_UQPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 19  AVX512VL,AVX512,FUTURE
+VCMPNGE_UQPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 19  AVX512VL,AVX512,FUTURE
+VCMPNGE_UQPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 19  AVX512,FUTURE
+VCMPNGE_UQPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 19  AVX512VL,AVX512,FUTURE
+VCMPNGE_UQPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 19  AVX512VL,AVX512,FUTURE
+VCMPNGE_UQPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 19  AVX512,FUTURE
+VCMPNGE_UQSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 19  AVX512,FUTURE
+VCMPNGE_UQSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 19  AVX512,FUTURE
+VCMPNGT_UQPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 1a  AVX512VL,AVX512,FUTURE
+VCMPNGT_UQPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 1a  AVX512VL,AVX512,FUTURE
+VCMPNGT_UQPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 1a  AVX512,FUTURE
+VCMPNGT_UQPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 1a  AVX512VL,AVX512,FUTURE
+VCMPNGT_UQPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 1a  AVX512VL,AVX512,FUTURE
+VCMPNGT_UQPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 1a  AVX512,FUTURE
+VCMPNGT_UQSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 1a  AVX512,FUTURE
+VCMPNGT_UQSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 1a  AVX512,FUTURE
+VCMPFALSE_OSPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 1b  AVX512VL,AVX512,FUTURE
+VCMPFALSE_OSPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 1b  AVX512VL,AVX512,FUTURE
+VCMPFALSE_OSPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 1b  AVX512,FUTURE
+VCMPFALSE_OSPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 1b  AVX512VL,AVX512,FUTURE
+VCMPFALSE_OSPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 1b  AVX512VL,AVX512,FUTURE
+VCMPFALSE_OSPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 1b  AVX512,FUTURE
+VCMPFALSE_OSSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 1b  AVX512,FUTURE
+VCMPFALSE_OSSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 1b  AVX512,FUTURE
+VCMPNEQ_OSPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 1c  AVX512VL,AVX512,FUTURE
+VCMPNEQ_OSPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 1c  AVX512VL,AVX512,FUTURE
+VCMPNEQ_OSPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 1c  AVX512,FUTURE
+VCMPNEQ_OSPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 1c  AVX512VL,AVX512,FUTURE
+VCMPNEQ_OSPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 1c  AVX512VL,AVX512,FUTURE
+VCMPNEQ_OSPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 1c  AVX512,FUTURE
+VCMPNEQ_OSSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 1c  AVX512,FUTURE
+VCMPNEQ_OSSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 1c  AVX512,FUTURE
+VCMPGE_OQPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 1d  AVX512VL,AVX512,FUTURE
+VCMPGE_OQPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 1d  AVX512VL,AVX512,FUTURE
+VCMPGE_OQPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 1d  AVX512,FUTURE
+VCMPGE_OQPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 1d  AVX512VL,AVX512,FUTURE
+VCMPGE_OQPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 1d  AVX512VL,AVX512,FUTURE
+VCMPGE_OQPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 1d  AVX512,FUTURE
+VCMPGE_OQSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 1d  AVX512,FUTURE
+VCMPGE_OQSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 1d  AVX512,FUTURE
+VCMPGT_OQPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 1e  AVX512VL,AVX512,FUTURE
+VCMPGT_OQPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 1e  AVX512VL,AVX512,FUTURE
+VCMPGT_OQPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 1e  AVX512,FUTURE
+VCMPGT_OQPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 1e  AVX512VL,AVX512,FUTURE
+VCMPGT_OQPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 1e  AVX512VL,AVX512,FUTURE
+VCMPGT_OQPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 1e  AVX512,FUTURE
+VCMPGT_OQSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 1e  AVX512,FUTURE
+VCMPGT_OQSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 1e  AVX512,FUTURE
+VCMPTRUE_USPD          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 1f  AVX512VL,AVX512,FUTURE
+VCMPTRUE_USPD          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 1f  AVX512VL,AVX512,FUTURE
+VCMPTRUE_USPD          kreg|mask,zmmreg,zmmrm512|b64|sae rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 1f  AVX512,FUTURE
+VCMPTRUE_USPS          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.0f.w0 c2 /r 1f  AVX512VL,AVX512,FUTURE
+VCMPTRUE_USPS          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.0f.w0 c2 /r 1f  AVX512VL,AVX512,FUTURE
+VCMPTRUE_USPS          kreg|mask,zmmreg,zmmrm512|b32|sae rvmi:fv: evex.nds.512.0f.w0 c2 /r 1f  AVX512,FUTURE
+VCMPTRUE_USSD          kreg|mask,xmmreg,xmmrm64|sae   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r 1f  AVX512,FUTURE
+VCMPTRUE_USSS          kreg|mask,xmmreg,xmmrm32|sae   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r 1f  AVX512,FUTURE
+VCMPPD          kreg|mask,xmmreg,xmmrm128|b64,imm8  rvmi:fv: evex.nds.128.66.0f.w1 c2 /r ib  AVX512VL,AVX512,FUTURE
+VCMPPD          kreg|mask,ymmreg,ymmrm256|b64,imm8  rvmi:fv: evex.nds.256.66.0f.w1 c2 /r ib  AVX512VL,AVX512,FUTURE
+VCMPPD          kreg|mask,zmmreg,zmmrm512|b64|sae,imm8 rvmi:fv: evex.nds.512.66.0f.w1 c2 /r ib  AVX512,FUTURE
+VCMPPS          kreg|mask,xmmreg,xmmrm128|b32,imm8  rvmi:fv: evex.nds.128.0f.w0 c2 /r ib  AVX512VL,AVX512,FUTURE
+VCMPPS          kreg|mask,ymmreg,ymmrm256|b32,imm8  rvmi:fv: evex.nds.256.0f.w0 c2 /r ib  AVX512VL,AVX512,FUTURE
+VCMPPS          kreg|mask,zmmreg,zmmrm512|b32|sae,imm8 rvmi:fv: evex.nds.512.0f.w0 c2 /r ib  AVX512,FUTURE
+VCMPSD          kreg|mask,xmmreg,xmmrm64|sae,imm8   rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r ib  AVX512,FUTURE
+VCMPSS          kreg|mask,xmmreg,xmmrm32|sae,imm8   rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r ib  AVX512,FUTURE
+VCOMISD         xmmreg,xmmrm64|sae                  rm:t1s: evex.128.66.0f.w1 2f /r  AVX512,FUTURE
+VCOMISS         xmmreg,xmmrm32|sae                  rm:t1s: evex.128.0f.w0 2f /r  AVX512,FUTURE
+VCOMPRESSPD     mem128|mask,xmmreg                  mr:t1s: evex.128.66.0f38.w1 8a /r  AVX512VL,AVX512,FUTURE
+VCOMPRESSPD     mem256|mask,ymmreg                  mr:t1s: evex.256.66.0f38.w1 8a /r  AVX512VL,AVX512,FUTURE
+VCOMPRESSPD     mem512|mask,zmmreg                  mr:t1s: evex.512.66.0f38.w1 8a /r  AVX512,FUTURE
+VCOMPRESSPD     xmmreg|mask|z,xmmreg                mr: evex.128.66.0f38.w1 8a /r  AVX512VL,AVX512,FUTURE
+VCOMPRESSPD     ymmreg|mask|z,ymmreg                mr: evex.256.66.0f38.w1 8a /r  AVX512VL,AVX512,FUTURE
+VCOMPRESSPD     zmmreg|mask|z,zmmreg                mr: evex.512.66.0f38.w1 8a /r  AVX512,FUTURE
+VCOMPRESSPS     mem128|mask,xmmreg                  mr:t1s: evex.128.66.0f38.w0 8a /r  AVX512VL,AVX512,FUTURE
+VCOMPRESSPS     mem256|mask,ymmreg                  mr:t1s: evex.256.66.0f38.w0 8a /r  AVX512VL,AVX512,FUTURE
+VCOMPRESSPS     mem512|mask,zmmreg                  mr:t1s: evex.512.66.0f38.w0 8a /r  AVX512,FUTURE
+VCOMPRESSPS     xmmreg|mask|z,xmmreg                mr: evex.128.66.0f38.w0 8a /r  AVX512VL,AVX512,FUTURE
+VCOMPRESSPS     ymmreg|mask|z,ymmreg                mr: evex.256.66.0f38.w0 8a /r  AVX512VL,AVX512,FUTURE
+VCOMPRESSPS     zmmreg|mask|z,zmmreg                mr: evex.512.66.0f38.w0 8a /r  AVX512,FUTURE
+VCVTDQ2PD       xmmreg|mask|z,xmmrm64|b32           rm:hv: evex.128.f3.0f.w0 e6 /r  AVX512VL,AVX512,FUTURE
+VCVTDQ2PD       ymmreg|mask|z,xmmrm128|b32          rm:hv: evex.256.f3.0f.w0 e6 /r  AVX512VL,AVX512,FUTURE
+VCVTDQ2PD       zmmreg|mask|z,ymmrm256|b32|er       rm:hv: evex.512.f3.0f.w0 e6 /r  AVX512,FUTURE
+VCVTDQ2PS       xmmreg|mask|z,xmmrm128|b32          rm:fv: evex.128.0f.w0 5b /r  AVX512VL,AVX512,FUTURE
+VCVTDQ2PS       ymmreg|mask|z,ymmrm256|b32          rm:fv: evex.256.0f.w0 5b /r  AVX512VL,AVX512,FUTURE
+VCVTDQ2PS       zmmreg|mask|z,zmmrm512|b32|er       rm:fv: evex.512.0f.w0 5b /r  AVX512,FUTURE
+VCVTPD2DQ       xmmreg|mask|z,xmmrm128|b64          rm:fv: evex.128.f2.0f.w1 e6 /r  AVX512VL,AVX512,FUTURE
+VCVTPD2DQ       xmmreg|mask|z,ymmrm256|b64          rm:fv: evex.256.f2.0f.w1 e6 /r  AVX512VL,AVX512,FUTURE
+VCVTPD2DQ       ymmreg|mask|z,zmmrm512|b64|er       rm:fv: evex.512.f2.0f.w1 e6 /r  AVX512,FUTURE
+VCVTPD2PS       xmmreg|mask|z,xmmrm128|b64          rm:fv: evex.128.66.0f.w1 5a /r  AVX512VL,AVX512,FUTURE
+VCVTPD2PS       xmmreg|mask|z,ymmrm256|b64          rm:fv: evex.256.66.0f.w1 5a /r  AVX512VL,AVX512,FUTURE
+VCVTPD2PS       ymmreg|mask|z,zmmrm512|b64|er       rm:fv: evex.512.66.0f.w1 5a /r  AVX512,FUTURE
+VCVTPD2QQ       xmmreg|mask|z,xmmrm128|b64          rm:fv: evex.128.66.0f.w1 7b /r  AVX512VL,AVX512DQ,FUTURE
+VCVTPD2QQ       ymmreg|mask|z,ymmrm256|b64          rm:fv: evex.256.66.0f.w1 7b /r  AVX512VL,AVX512DQ,FUTURE
+VCVTPD2QQ       zmmreg|mask|z,zmmrm512|b64|er       rm:fv: evex.512.66.0f.w1 7b /r  AVX512DQ,FUTURE
+VCVTPD2UDQ      xmmreg|mask|z,xmmrm128|b64          rm:fv: evex.128.0f.w1 79 /r  AVX512VL,AVX512,FUTURE
+VCVTPD2UDQ      xmmreg|mask|z,ymmrm256|b64          rm:fv: evex.256.0f.w1 79 /r  AVX512VL,AVX512,FUTURE
+VCVTPD2UDQ      ymmreg|mask|z,zmmrm512|b64|er       rm:fv: evex.512.0f.w1 79 /r  AVX512,FUTURE
+VCVTPD2UQQ      xmmreg|mask|z,xmmrm128|b64          rm:fv: evex.128.66.0f.w1 79 /r  AVX512VL,AVX512DQ,FUTURE
+VCVTPD2UQQ      ymmreg|mask|z,ymmrm256|b64          rm:fv: evex.256.66.0f.w1 79 /r  AVX512VL,AVX512DQ,FUTURE
+VCVTPD2UQQ      zmmreg|mask|z,zmmrm512|b64|er       rm:fv: evex.512.66.0f.w1 79 /r  AVX512DQ,FUTURE
+VCVTPH2PS       xmmreg|mask|z,xmmrm64               rm:hvm: evex.128.66.0f38.w0 13 /r  AVX512VL,AVX512,FUTURE
+VCVTPH2PS       ymmreg|mask|z,xmmrm128              rm:hvm: evex.256.66.0f38.w0 13 /r  AVX512VL,AVX512,FUTURE
+VCVTPH2PS       zmmreg|mask|z,ymmrm256|sae          rm:hvm: evex.512.66.0f38.w0 13 /r  AVX512,FUTURE
+VCVTPS2DQ       xmmreg|mask|z,xmmrm128|b32          rm:fv: evex.128.66.0f.w0 5b /r  AVX512VL,AVX512,FUTURE
+VCVTPS2DQ       ymmreg|mask|z,ymmrm256|b32          rm:fv: evex.256.66.0f.w0 5b /r  AVX512VL,AVX512,FUTURE
+VCVTPS2DQ       zmmreg|mask|z,zmmrm512|b32|er       rm:fv: evex.512.66.0f.w0 5b /r  AVX512,FUTURE
+VCVTPS2PD       xmmreg|mask|z,xmmrm64|b32           rm:hv: evex.128.0f.w0 5a /r  AVX512VL,AVX512,FUTURE
+VCVTPS2PD       ymmreg|mask|z,xmmrm128|b32          rm:hv: evex.256.0f.w0 5a /r  AVX512VL,AVX512,FUTURE
+VCVTPS2PD       zmmreg|mask|z,ymmrm256|b32|sae      rm:hv: evex.512.0f.w0 5a /r  AVX512,FUTURE
+VCVTPS2PH       xmmreg|mask|z,xmmreg,imm8           mri:hvm: evex.128.66.0f3a.w0 1d /r ib  AVX512VL,AVX512,FUTURE
+VCVTPS2PH       xmmreg|mask|z,ymmreg,imm8           mri:hvm: evex.256.66.0f3a.w0 1d /r ib  AVX512VL,AVX512,FUTURE
+VCVTPS2PH       ymmreg|mask|z,zmmreg|sae,imm8       mri:hvm: evex.512.66.0f3a.w0 1d /r ib  AVX512,FUTURE
+VCVTPS2PH       mem64|mask,xmmreg,imm8              mri:hvm: evex.128.66.0f3a.w0 1d /r ib  AVX512VL,AVX512,FUTURE
+VCVTPS2PH       mem128|mask,ymmreg,imm8             mri:hvm: evex.256.66.0f3a.w0 1d /r ib  AVX512VL,AVX512,FUTURE
+VCVTPS2PH       mem256|mask,zmmreg|sae,imm8         mri:hvm: evex.512.66.0f3a.w0 1d /r ib  AVX512,FUTURE
+VCVTPS2QQ       xmmreg|mask|z,xmmrm64|b32           rm:hv: evex.128.66.0f.w0 7b /r  AVX512VL,AVX512DQ,FUTURE
+VCVTPS2QQ       ymmreg|mask|z,xmmrm128|b32          rm:hv: evex.256.66.0f.w0 7b /r  AVX512VL,AVX512DQ,FUTURE
+VCVTPS2QQ       zmmreg|mask|z,ymmrm256|b32|er       rm:hv: evex.512.66.0f.w0 7b /r  AVX512DQ,FUTURE
+VCVTPS2UDQ      xmmreg|mask|z,xmmrm128|b32          rm:fv: evex.128.0f.w0 79 /r  AVX512VL,AVX512,FUTURE
+VCVTPS2UDQ      ymmreg|mask|z,ymmrm256|b32          rm:fv: evex.256.0f.w0 79 /r  AVX512VL,AVX512,FUTURE
+VCVTPS2UDQ      zmmreg|mask|z,zmmrm512|b32|er       rm:fv: evex.512.0f.w0 79 /r  AVX512,FUTURE
+VCVTPS2UQQ      xmmreg|mask|z,xmmrm64|b32           rm:hv: evex.128.66.0f.w0 79 /r  AVX512VL,AVX512DQ,FUTURE
+VCVTPS2UQQ      ymmreg|mask|z,xmmrm128|b32          rm:hv: evex.256.66.0f.w0 79 /r  AVX512VL,AVX512DQ,FUTURE
+VCVTPS2UQQ      zmmreg|mask|z,ymmrm256|b32|er       rm:hv: evex.512.66.0f.w0 79 /r  AVX512DQ,FUTURE
+VCVTQQ2PD       xmmreg|mask|z,xmmrm128|b64          rm:fv: evex.128.f3.0f.w1 e6 /r  AVX512VL,AVX512DQ,FUTURE
+VCVTQQ2PD       ymmreg|mask|z,ymmrm256|b64          rm:fv: evex.256.f3.0f.w1 e6 /r  AVX512VL,AVX512DQ,FUTURE
+VCVTQQ2PD       zmmreg|mask|z,zmmrm512|b64|er       rm:fv: evex.512.f3.0f.w1 e6 /r  AVX512DQ,FUTURE
+VCVTQQ2PS       xmmreg|mask|z,xmmrm128|b64          rm:fv: evex.128.0f.w1 5b /r  AVX512VL,AVX512DQ,FUTURE
+VCVTQQ2PS       xmmreg|mask|z,ymmrm256|b64          rm:fv: evex.256.0f.w1 5b /r  AVX512VL,AVX512DQ,FUTURE
+VCVTQQ2PS       ymmreg|mask|z,zmmrm512|b64|er       rm:fv: evex.512.0f.w1 5b /r  AVX512DQ,FUTURE
+VCVTSD2SI       reg32,xmmrm64|er                    rm:t1f64: evex.128.f2.0f.w0 2d /r  AVX512,FUTURE
+VCVTSD2SI       reg64,xmmrm64|er                    rm:t1f64: evex.128.f2.0f.w1 2d /r  AVX512,FUTURE
+VCVTSD2SS       xmmreg|mask|z,xmmreg,xmmrm64|er     rvm:t1s: evex.nds.128.f2.0f.w1 5a /r  AVX512,FUTURE
+VCVTSD2USI      reg32,xmmrm64|er                    rm:t1f64: evex.128.f2.0f.w0 79 /r  AVX512,FUTURE
+VCVTSD2USI      reg64,xmmrm64|er                    rm:t1f64: evex.128.f2.0f.w1 79 /r  AVX512,FUTURE
+VCVTSI2SD       xmmreg,xmmreg|er,rm32               rvm:t1s: evex.nds.128.f2.0f.w0 2a /r  AVX512,FUTURE
+VCVTSI2SD       xmmreg,xmmreg|er,rm64               rvm:t1s: evex.nds.128.f2.0f.w1 2a /r  AVX512,FUTURE
+VCVTSI2SS       xmmreg,xmmreg|er,rm32               rvm:t1s: evex.nds.128.f3.0f.w0 2a /r  AVX512,FUTURE
+VCVTSI2SS       xmmreg,xmmreg|er,rm64               rvm:t1s: evex.nds.128.f3.0f.w1 2a /r  AVX512,FUTURE
+VCVTSS2SD       xmmreg|mask|z,xmmreg,xmmrm32|sae    rvm:t1s: evex.nds.128.f3.0f.w0 5a /r  AVX512,FUTURE
+VCVTSS2SI       reg32,xmmrm32|er                    rm:t1f32: evex.128.f3.0f.w0 2d /r  AVX512,FUTURE
+VCVTSS2SI       reg64,xmmrm32|er                    rm:t1f32: evex.128.f3.0f.w1 2d /r  AVX512,FUTURE
+VCVTSS2USI      reg32,xmmrm32|er                    rm:t1f32: evex.128.f3.0f.w0 79 /r  AVX512,FUTURE
+VCVTSS2USI      reg64,xmmrm32|er                    rm:t1f32: evex.128.f3.0f.w1 79 /r  AVX512,FUTURE
+VCVTTPD2DQ      xmmreg|mask|z,xmmrm128|b64          rm:fv: evex.128.66.0f.w1 e6 /r  AVX512VL,AVX512,FUTURE
+VCVTTPD2DQ      xmmreg|mask|z,ymmrm256|b64          rm:fv: evex.256.66.0f.w1 e6 /r  AVX512VL,AVX512,FUTURE
+VCVTTPD2DQ      ymmreg|mask|z,zmmrm512|b64|sae      rm:fv: evex.512.66.0f.w1 e6 /r  AVX512,FUTURE
+VCVTTPD2QQ      xmmreg|mask|z,xmmrm128|b64          rm:fv: evex.128.66.0f.w1 7a /r  AVX512VL,AVX512DQ,FUTURE
+VCVTTPD2QQ      ymmreg|mask|z,ymmrm256|b64          rm:fv: evex.256.66.0f.w1 7a /r  AVX512VL,AVX512DQ,FUTURE
+VCVTTPD2QQ      zmmreg|mask|z,zmmrm512|b64|sae      rm:fv: evex.512.66.0f.w1 7a /r  AVX512DQ,FUTURE
+VCVTTPD2UDQ     xmmreg|mask|z,xmmrm128|b64          rm:fv: evex.128.0f.w1 78 /r  AVX512VL,AVX512,FUTURE
+VCVTTPD2UDQ     xmmreg|mask|z,ymmrm256|b64          rm:fv: evex.256.0f.w1 78 /r  AVX512VL,AVX512,FUTURE
+VCVTTPD2UDQ     ymmreg|mask|z,zmmrm512|b64|sae      rm:fv: evex.512.0f.w1 78 /r  AVX512,FUTURE
+VCVTTPD2UQQ     xmmreg|mask|z,xmmrm128|b64          rm:fv: evex.128.66.0f.w1 78 /r  AVX512VL,AVX512DQ,FUTURE
+VCVTTPD2UQQ     ymmreg|mask|z,ymmrm256|b64          rm:fv: evex.256.66.0f.w1 78 /r  AVX512VL,AVX512DQ,FUTURE
+VCVTTPD2UQQ     zmmreg|mask|z,zmmrm512|b64|sae      rm:fv: evex.512.66.0f.w1 78 /r  AVX512DQ,FUTURE
+VCVTTPS2DQ      xmmreg|mask|z,xmmrm128|b32          rm:fv: evex.128.f3.0f.w0 5b /r  AVX512VL,AVX512,FUTURE
+VCVTTPS2DQ      ymmreg|mask|z,ymmrm256|b32          rm:fv: evex.256.f3.0f.w0 5b /r  AVX512VL,AVX512,FUTURE
+VCVTTPS2DQ      zmmreg|mask|z,zmmrm512|b32|sae      rm:fv: evex.512.f3.0f.w0 5b /r  AVX512,FUTURE
+VCVTTPS2QQ      xmmreg|mask|z,xmmrm64|b32           rm:hv: evex.128.66.0f.w0 7a /r  AVX512VL,AVX512DQ,FUTURE
+VCVTTPS2QQ      ymmreg|mask|z,xmmrm128|b32          rm:hv: evex.256.66.0f.w0 7a /r  AVX512VL,AVX512DQ,FUTURE
+VCVTTPS2QQ      zmmreg|mask|z,ymmrm256|b32|sae      rm:hv: evex.512.66.0f.w0 7a /r  AVX512DQ,FUTURE
+VCVTTPS2UDQ     xmmreg|mask|z,xmmrm128|b32          rm:fv: evex.128.0f.w0 78 /r  AVX512VL,AVX512,FUTURE
+VCVTTPS2UDQ     ymmreg|mask|z,ymmrm256|b32          rm:fv: evex.256.0f.w0 78 /r  AVX512VL,AVX512,FUTURE
+VCVTTPS2UDQ     zmmreg|mask|z,zmmrm512|b32|sae      rm:fv: evex.512.0f.w0 78 /r  AVX512,FUTURE
+VCVTTPS2UQQ     xmmreg|mask|z,xmmrm64|b32           rm:hv: evex.128.66.0f.w0 78 /r  AVX512VL,AVX512DQ,FUTURE
+VCVTTPS2UQQ     ymmreg|mask|z,xmmrm128|b32          rm:hv: evex.256.66.0f.w0 78 /r  AVX512VL,AVX512DQ,FUTURE
+VCVTTPS2UQQ     zmmreg|mask|z,ymmrm256|b32|sae      rm:hv: evex.512.66.0f.w0 78 /r  AVX512DQ,FUTURE
+VCVTTSD2SI      reg32,xmmrm64|sae                   rm:t1f64: evex.128.f2.0f.w0 2c /r  AVX512,FUTURE
+VCVTTSD2SI      reg64,xmmrm64|sae                   rm:t1f64: evex.128.f2.0f.w1 2c /r  AVX512,FUTURE
+VCVTTSD2USI     reg32,xmmrm64|sae                   rm:t1f64: evex.128.f2.0f.w0 78 /r  AVX512,FUTURE
+VCVTTSD2USI     reg64,xmmrm64|sae                   rm:t1f64: evex.128.f2.0f.w1 78 /r  AVX512,FUTURE
+VCVTTSS2SI      reg32,xmmrm32|sae                   rm:t1f32: evex.128.f3.0f.w0 2c /r  AVX512,FUTURE
+VCVTTSS2SI      reg64,xmmrm32|sae                   rm:t1f32: evex.128.f3.0f.w1 2c /r  AVX512,FUTURE
+VCVTTSS2USI     reg32,xmmrm32|sae                   rm:t1f32: evex.128.f3.0f.w0 78 /r  AVX512,FUTURE
+VCVTTSS2USI     reg64,xmmrm32|sae                   rm:t1f32: evex.128.f3.0f.w1 78 /r  AVX512,FUTURE
+VCVTUDQ2PD      xmmreg|mask|z,xmmrm64|b32           rm:hv: evex.128.f3.0f.w0 7a /r  AVX512VL,AVX512,FUTURE
+VCVTUDQ2PD      ymmreg|mask|z,xmmrm128|b32          rm:hv: evex.256.f3.0f.w0 7a /r  AVX512VL,AVX512,FUTURE
+VCVTUDQ2PD      zmmreg|mask|z,ymmrm256|b32|er       rm:hv: evex.512.f3.0f.w0 7a /r  AVX512,FUTURE
+VCVTUDQ2PS      xmmreg|mask|z,xmmrm128|b32          rm:fv: evex.128.f2.0f.w0 7a /r  AVX512VL,AVX512,FUTURE
+VCVTUDQ2PS      ymmreg|mask|z,ymmrm256|b32          rm:fv: evex.256.f2.0f.w0 7a /r  AVX512VL,AVX512,FUTURE
+VCVTUDQ2PS      zmmreg|mask|z,zmmrm512|b32|er       rm:fv: evex.512.f2.0f.w0 7a /r  AVX512,FUTURE
+VCVTUQQ2PD      xmmreg|mask|z,xmmrm128|b64          rm:fv: evex.128.f3.0f.w1 7a /r  AVX512VL,AVX512DQ,FUTURE
+VCVTUQQ2PD      ymmreg|mask|z,ymmrm256|b64          rm:fv: evex.256.f3.0f.w1 7a /r  AVX512VL,AVX512DQ,FUTURE
+VCVTUQQ2PD      zmmreg|mask|z,zmmrm512|b64|er       rm:fv: evex.512.f3.0f.w1 7a /r  AVX512DQ,FUTURE
+VCVTUQQ2PS      xmmreg|mask|z,xmmrm128|b64          rm:fv: evex.128.f2.0f.w1 7a /r  AVX512VL,AVX512DQ,FUTURE
+VCVTUQQ2PS      xmmreg|mask|z,ymmrm256|b64          rm:fv: evex.256.f2.0f.w1 7a /r  AVX512VL,AVX512DQ,FUTURE
+VCVTUQQ2PS      ymmreg|mask|z,zmmrm512|b64|er       rm:fv: evex.512.f2.0f.w1 7a /r  AVX512DQ,FUTURE
+VCVTUSI2SD      xmmreg,xmmreg|er,rm32               rvm:t1s: evex.nds.128.f2.0f.w0 7b /r  AVX512,FUTURE
+VCVTUSI2SD      xmmreg,xmmreg|er,rm64               rvm:t1s: evex.nds.128.f2.0f.w1 7b /r  AVX512,FUTURE
+VCVTUSI2SS      xmmreg,xmmreg|er,rm32               rvm:t1s: evex.nds.128.f3.0f.w0 7b /r  AVX512,FUTURE
+VCVTUSI2SS      xmmreg,xmmreg|er,rm64               rvm:t1s: evex.nds.128.f3.0f.w1 7b /r  AVX512,FUTURE
+VDBPSADBW       xmmreg|mask|z,xmmreg*,xmmrm128,imm8 rvmi:fvm: evex.nds.128.66.0f3a.w0 42 /r ib  AVX512VL,AVX512BW,FUTURE
+VDBPSADBW       ymmreg|mask|z,ymmreg*,ymmrm256,imm8 rvmi:fvm: evex.nds.256.66.0f3a.w0 42 /r ib  AVX512VL,AVX512BW,FUTURE
+VDBPSADBW       zmmreg|mask|z,zmmreg*,zmmrm512,imm8 rvmi:fvm: evex.nds.512.66.0f3a.w0 42 /r ib  AVX512BW,FUTURE
+VDIVPD          xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f.w1 5e /r  AVX512VL,AVX512,FUTURE
+VDIVPD          ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f.w1 5e /r  AVX512VL,AVX512,FUTURE
+VDIVPD          zmmreg|mask|z,zmmreg*,zmmrm512|b64|er rvm:fv: evex.nds.512.66.0f.w1 5e /r  AVX512,FUTURE
+VDIVPS          xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.0f.w0 5e /r  AVX512VL,AVX512,FUTURE
+VDIVPS          ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.0f.w0 5e /r  AVX512VL,AVX512,FUTURE
+VDIVPS          zmmreg|mask|z,zmmreg*,zmmrm512|b32|er rvm:fv: evex.nds.512.0f.w0 5e /r  AVX512,FUTURE
+VDIVSD          xmmreg|mask|z,xmmreg*,xmmrm64|er    rvm:t1s: evex.nds.128.f2.0f.w1 5e /r  AVX512,FUTURE
+VDIVSS          xmmreg|mask|z,xmmreg*,xmmrm32|er    rvm:t1s: evex.nds.128.f3.0f.w0 5e /r  AVX512,FUTURE
+VEXP2PD         zmmreg|mask|z,zmmrm512|b64|sae      rm:fv: evex.512.66.0f38.w1 c8 /r  AVX512ER,FUTURE
+VEXP2PS         zmmreg|mask|z,zmmrm512|b32|sae      rm:fv: evex.512.66.0f38.w0 c8 /r  AVX512ER,FUTURE
+VEXPANDPD       xmmreg|mask|z,mem128                rm:t1s: evex.128.66.0f38.w1 88 /r  AVX512VL,AVX512,FUTURE
+VEXPANDPD       ymmreg|mask|z,mem256                rm:t1s: evex.256.66.0f38.w1 88 /r  AVX512VL,AVX512,FUTURE
+VEXPANDPD       zmmreg|mask|z,mem512                rm:t1s: evex.512.66.0f38.w1 88 /r  AVX512,FUTURE
+VEXPANDPD       xmmreg|mask|z,xmmreg                rm:t1s: evex.128.66.0f38.w1 88 /r  AVX512VL,AVX512,FUTURE
+VEXPANDPD       ymmreg|mask|z,ymmreg                rm:t1s: evex.256.66.0f38.w1 88 /r  AVX512VL,AVX512,FUTURE
+VEXPANDPD       zmmreg|mask|z,zmmreg                rm:t1s: evex.512.66.0f38.w1 88 /r  AVX512,FUTURE
+VEXPANDPS       xmmreg|mask|z,mem128                rm:t1s: evex.128.66.0f38.w0 88 /r  AVX512VL,AVX512,FUTURE
+VEXPANDPS       ymmreg|mask|z,mem256                rm:t1s: evex.256.66.0f38.w0 88 /r  AVX512VL,AVX512,FUTURE
+VEXPANDPS       zmmreg|mask|z,mem512                rm:t1s: evex.512.66.0f38.w0 88 /r  AVX512,FUTURE
+VEXPANDPS       xmmreg|mask|z,xmmreg                rm:t1s: evex.128.66.0f38.w0 88 /r  AVX512VL,AVX512,FUTURE
+VEXPANDPS       ymmreg|mask|z,ymmreg                rm:t1s: evex.256.66.0f38.w0 88 /r  AVX512VL,AVX512,FUTURE
+VEXPANDPS       zmmreg|mask|z,zmmreg                rm:t1s: evex.512.66.0f38.w0 88 /r  AVX512,FUTURE
+VEXTRACTF32X4   xmmreg|mask|z,ymmreg,imm8           mri: evex.256.66.0f3a.w0 19 /r ib  AVX512VL,AVX512,FUTURE
+VEXTRACTF32X4   xmmreg|mask|z,zmmreg,imm8           mri: evex.512.66.0f3a.w0 19 /r ib  AVX512,FUTURE
+VEXTRACTF32X4   mem128|mask,ymmreg,imm8             mri:t4: evex.256.66.0f3a.w0 19 /r ib  AVX512VL,AVX512,FUTURE
+VEXTRACTF32X4   mem128|mask,zmmreg,imm8             mri:t4: evex.512.66.0f3a.w0 19 /r ib  AVX512,FUTURE
+VEXTRACTF32X8   ymmreg|mask|z,zmmreg,imm8           mri: evex.512.66.0f3a.w0 1b /r ib  AVX512DQ,FUTURE
+VEXTRACTF32X8   mem256|mask,zmmreg,imm8             mri:t8: evex.512.66.0f3a.w0 1b /r ib  AVX512DQ,FUTURE
+VEXTRACTF64X2   xmmreg|mask|z,ymmreg,imm8           mri: evex.256.66.0f3a.w1 19 /r ib  AVX512VL,AVX512DQ,FUTURE
+VEXTRACTF64X2   xmmreg|mask|z,zmmreg,imm8           mri: evex.512.66.0f3a.w1 19 /r ib  AVX512DQ,FUTURE
+VEXTRACTF64X2   mem128|mask,ymmreg,imm8             mri:t2: evex.256.66.0f3a.w1 19 /r ib  AVX512VL,AVX512DQ,FUTURE
+VEXTRACTF64X2   mem128|mask,zmmreg,imm8             mri:t2: evex.512.66.0f3a.w1 19 /r ib  AVX512DQ,FUTURE
+VEXTRACTF64X4   ymmreg|mask|z,zmmreg,imm8           mri: evex.512.66.0f3a.w1 1b /r ib  AVX512,FUTURE
+VEXTRACTF64X4   mem256|mask,zmmreg,imm8             mri:t4: evex.512.66.0f3a.w1 1b /r ib  AVX512,FUTURE
+VEXTRACTI32X4   xmmreg|mask|z,ymmreg,imm8           mri: evex.256.66.0f3a.w0 39 /r ib  AVX512VL,AVX512,FUTURE
+VEXTRACTI32X4   xmmreg|mask|z,zmmreg,imm8           mri: evex.512.66.0f3a.w0 39 /r ib  AVX512,FUTURE
+VEXTRACTI32X4   mem128|mask,ymmreg,imm8             mri:t4: evex.256.66.0f3a.w0 39 /r ib  AVX512VL,AVX512,FUTURE
+VEXTRACTI32X4   mem128|mask,zmmreg,imm8             mri:t4: evex.512.66.0f3a.w0 39 /r ib  AVX512,FUTURE
+VEXTRACTI32X8   ymmreg|mask|z,zmmreg,imm8           mri: evex.512.66.0f3a.w0 3b /r ib  AVX512DQ,FUTURE
+VEXTRACTI32X8   mem256|mask,zmmreg,imm8             mri:t8: evex.512.66.0f3a.w0 3b /r ib  AVX512DQ,FUTURE
+VEXTRACTI64X2   xmmreg|mask|z,ymmreg,imm8           mri: evex.256.66.0f3a.w1 39 /r ib  AVX512VL,AVX512DQ,FUTURE
+VEXTRACTI64X2   xmmreg|mask|z,zmmreg,imm8           mri: evex.512.66.0f3a.w1 39 /r ib  AVX512DQ,FUTURE
+VEXTRACTI64X2   mem128|mask,ymmreg,imm8             mri:t2: evex.256.66.0f3a.w1 39 /r ib  AVX512VL,AVX512DQ,FUTURE
+VEXTRACTI64X2   mem128|mask,zmmreg,imm8             mri:t2: evex.512.66.0f3a.w1 39 /r ib  AVX512DQ,FUTURE
+VEXTRACTI64X4   ymmreg|mask|z,zmmreg,imm8           mri: evex.512.66.0f3a.w1 3b /r ib  AVX512,FUTURE
+VEXTRACTI64X4   mem256|mask,zmmreg,imm8             mri:t4: evex.512.66.0f3a.w1 3b /r ib  AVX512,FUTURE
+VEXTRACTPS      reg32,xmmreg,imm8                   mri:t1s: evex.128.66.0f3a.wig 17 /r ib  AVX512,FUTURE
+VEXTRACTPS      reg64,xmmreg,imm8                   mri:t1s: evex.128.66.0f3a.wig 17 /r ib  AVX512,FUTURE
+VEXTRACTPS      mem32,xmmreg,imm8                   mri:t1s: evex.128.66.0f3a.wig 17 /r ib  AVX512,FUTURE
+VFIXUPIMMPD     xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 rvmi:fv: evex.nds.128.66.0f3a.w1 54 /r ib  AVX512VL,AVX512,FUTURE
+VFIXUPIMMPD     ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 rvmi:fv: evex.nds.256.66.0f3a.w1 54 /r ib  AVX512VL,AVX512,FUTURE
+VFIXUPIMMPD     zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae,imm8 rvmi:fv: evex.nds.512.66.0f3a.w1 54 /r ib  AVX512,FUTURE
+VFIXUPIMMPS     xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 rvmi:fv: evex.nds.128.66.0f3a.w0 54 /r ib  AVX512VL,AVX512,FUTURE
+VFIXUPIMMPS     ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 rvmi:fv: evex.nds.256.66.0f3a.w0 54 /r ib  AVX512VL,AVX512,FUTURE
+VFIXUPIMMPS     zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae,imm8 rvmi:fv: evex.nds.512.66.0f3a.w0 54 /r ib  AVX512,FUTURE
+VFIXUPIMMSD     xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 rvmi:t1s: evex.nds.128.66.0f3a.w1 55 /r ib  AVX512,FUTURE
+VFIXUPIMMSS     xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 rvmi:t1s: evex.nds.128.66.0f3a.w0 55 /r ib  AVX512,FUTURE
+VFMADD132PD     xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 98 /r  AVX512VL,AVX512,FUTURE
+VFMADD132PD     ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 98 /r  AVX512VL,AVX512,FUTURE
+VFMADD132PD     zmmreg|mask|z,zmmreg,zmmrm512|b64|er rvm:fv: evex.nds.512.66.0f38.w1 98 /r  AVX512,FUTURE
+VFMADD132PS     xmmreg|mask|z,xmmreg,xmmrm128|b32   rvm:fv: evex.nds.128.66.0f38.w0 98 /r  AVX512VL,AVX512,FUTURE
+VFMADD132PS     ymmreg|mask|z,ymmreg,ymmrm256|b32   rvm:fv: evex.nds.256.66.0f38.w0 98 /r  AVX512VL,AVX512,FUTURE
+VFMADD132PS     zmmreg|mask|z,zmmreg,zmmrm512|b32|er rvm:fv: evex.nds.512.66.0f38.w0 98 /r  AVX512,FUTURE
+VFMADD132SD     xmmreg|mask|z,xmmreg,xmmrm64|er     rvm:t1s: evex.nds.128.66.0f38.w1 99 /r  AVX512,FUTURE
+VFMADD132SS     xmmreg|mask|z,xmmreg,xmmrm32|er     rvm:t1s: evex.nds.128.66.0f38.w0 99 /r  AVX512,FUTURE
+VFMADD213PD     xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 a8 /r  AVX512VL,AVX512,FUTURE
+VFMADD213PD     ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 a8 /r  AVX512VL,AVX512,FUTURE
+VFMADD213PD     zmmreg|mask|z,zmmreg,zmmrm512|b64|er rvm:fv: evex.nds.512.66.0f38.w1 a8 /r  AVX512,FUTURE
+VFMADD213PS     xmmreg|mask|z,xmmreg,xmmrm128|b32   rvm:fv: evex.nds.128.66.0f38.w0 a8 /r  AVX512VL,AVX512,FUTURE
+VFMADD213PS     ymmreg|mask|z,ymmreg,ymmrm256|b32   rvm:fv: evex.nds.256.66.0f38.w0 a8 /r  AVX512VL,AVX512,FUTURE
+VFMADD213PS     zmmreg|mask|z,zmmreg,zmmrm512|b32|er rvm:fv: evex.nds.512.66.0f38.w0 a8 /r  AVX512,FUTURE
+VFMADD213SD     xmmreg|mask|z,xmmreg,xmmrm64|er     rvm:t1s: evex.nds.128.66.0f38.w1 a9 /r  AVX512,FUTURE
+VFMADD213SS     xmmreg|mask|z,xmmreg,xmmrm32|er     rvm:t1s: evex.nds.128.66.0f38.w0 a9 /r  AVX512,FUTURE
+VFMADD231PD     xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 b8 /r  AVX512VL,AVX512,FUTURE
+VFMADD231PD     ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 b8 /r  AVX512VL,AVX512,FUTURE
+VFMADD231PD     zmmreg|mask|z,zmmreg,zmmrm512|b64|er rvm:fv: evex.nds.512.66.0f38.w1 b8 /r  AVX512,FUTURE
+VFMADD231PS     xmmreg|mask|z,xmmreg,xmmrm128|b32   rvm:fv: evex.nds.128.66.0f38.w0 b8 /r  AVX512VL,AVX512,FUTURE
+VFMADD231PS     ymmreg|mask|z,ymmreg,ymmrm256|b32   rvm:fv: evex.nds.256.66.0f38.w0 b8 /r  AVX512VL,AVX512,FUTURE
+VFMADD231PS     zmmreg|mask|z,zmmreg,zmmrm512|b32|er rvm:fv: evex.nds.512.66.0f38.w0 b8 /r  AVX512,FUTURE
+VFMADD231SD     xmmreg|mask|z,xmmreg,xmmrm64|er     rvm:t1s: evex.nds.128.66.0f38.w1 b9 /r  AVX512,FUTURE
+VFMADD231SS     xmmreg|mask|z,xmmreg,xmmrm32|er     rvm:t1s: evex.nds.128.66.0f38.w0 b9 /r  AVX512,FUTURE
+VFMADDSUB132PD  xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 96 /r  AVX512VL,AVX512,FUTURE
+VFMADDSUB132PD  ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 96 /r  AVX512VL,AVX512,FUTURE
+VFMADDSUB132PD  zmmreg|mask|z,zmmreg,zmmrm512|b64|er rvm:fv: evex.nds.512.66.0f38.w1 96 /r  AVX512,FUTURE
+VFMADDSUB132PS  xmmreg|mask|z,xmmreg,xmmrm128|b32   rvm:fv: evex.nds.128.66.0f38.w0 96 /r  AVX512VL,AVX512,FUTURE
+VFMADDSUB132PS  ymmreg|mask|z,ymmreg,ymmrm256|b32   rvm:fv: evex.nds.256.66.0f38.w0 96 /r  AVX512VL,AVX512,FUTURE
+VFMADDSUB132PS  zmmreg|mask|z,zmmreg,zmmrm512|b32|er rvm:fv: evex.nds.512.66.0f38.w0 96 /r  AVX512,FUTURE
+VFMADDSUB213PD  xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 a6 /r  AVX512VL,AVX512,FUTURE
+VFMADDSUB213PD  ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 a6 /r  AVX512VL,AVX512,FUTURE
+VFMADDSUB213PD  zmmreg|mask|z,zmmreg,zmmrm512|b64|er rvm:fv: evex.nds.512.66.0f38.w1 a6 /r  AVX512,FUTURE
+VFMADDSUB213PS  xmmreg|mask|z,xmmreg,xmmrm128|b32   rvm:fv: evex.nds.128.66.0f38.w0 a6 /r  AVX512VL,AVX512,FUTURE
+VFMADDSUB213PS  ymmreg|mask|z,ymmreg,ymmrm256|b32   rvm:fv: evex.nds.256.66.0f38.w0 a6 /r  AVX512VL,AVX512,FUTURE
+VFMADDSUB213PS  zmmreg|mask|z,zmmreg,zmmrm512|b32|er rvm:fv: evex.nds.512.66.0f38.w0 a6 /r  AVX512,FUTURE
+VFMADDSUB231PD  xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 b6 /r  AVX512VL,AVX512,FUTURE
+VFMADDSUB231PD  ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 b6 /r  AVX512VL,AVX512,FUTURE
+VFMADDSUB231PD  zmmreg|mask|z,zmmreg,zmmrm512|b64|er rvm:fv: evex.nds.512.66.0f38.w1 b6 /r  AVX512,FUTURE
+VFMADDSUB231PS  xmmreg|mask|z,xmmreg,xmmrm128|b32   rvm:fv: evex.nds.128.66.0f38.w0 b6 /r  AVX512VL,AVX512,FUTURE
+VFMADDSUB231PS  ymmreg|mask|z,ymmreg,ymmrm256|b32   rvm:fv: evex.nds.256.66.0f38.w0 b6 /r  AVX512VL,AVX512,FUTURE
+VFMADDSUB231PS  zmmreg|mask|z,zmmreg,zmmrm512|b32|er rvm:fv: evex.nds.512.66.0f38.w0 b6 /r  AVX512,FUTURE
+VFMSUB132PD     xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 9a /r  AVX512VL,AVX512,FUTURE
+VFMSUB132PD     ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 9a /r  AVX512VL,AVX512,FUTURE
+VFMSUB132PD     zmmreg|mask|z,zmmreg,zmmrm512|b64|er rvm:fv: evex.nds.512.66.0f38.w1 9a /r  AVX512,FUTURE
+VFMSUB132PS     xmmreg|mask|z,xmmreg,xmmrm128|b32   rvm:fv: evex.nds.128.66.0f38.w0 9a /r  AVX512VL,AVX512,FUTURE
+VFMSUB132PS     ymmreg|mask|z,ymmreg,ymmrm256|b32   rvm:fv: evex.nds.256.66.0f38.w0 9a /r  AVX512VL,AVX512,FUTURE
+VFMSUB132PS     zmmreg|mask|z,zmmreg,zmmrm512|b32|er rvm:fv: evex.nds.512.66.0f38.w0 9a /r  AVX512,FUTURE
+VFMSUB132SD     xmmreg|mask|z,xmmreg,xmmrm64|er     rvm:t1s: evex.nds.128.66.0f38.w1 9b /r  AVX512,FUTURE
+VFMSUB132SS     xmmreg|mask|z,xmmreg,xmmrm32|er     rvm:t1s: evex.nds.128.66.0f38.w0 9b /r  AVX512,FUTURE
+VFMSUB213PD     xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 aa /r  AVX512VL,AVX512,FUTURE
+VFMSUB213PD     ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 aa /r  AVX512VL,AVX512,FUTURE
+VFMSUB213PD     zmmreg|mask|z,zmmreg,zmmrm512|b64|er rvm:fv: evex.nds.512.66.0f38.w1 aa /r  AVX512,FUTURE
+VFMSUB213PS     xmmreg|mask|z,xmmreg,xmmrm128|b32   rvm:fv: evex.nds.128.66.0f38.w0 aa /r  AVX512VL,AVX512,FUTURE
+VFMSUB213PS     ymmreg|mask|z,ymmreg,ymmrm256|b32   rvm:fv: evex.nds.256.66.0f38.w0 aa /r  AVX512VL,AVX512,FUTURE
+VFMSUB213PS     zmmreg|mask|z,zmmreg,zmmrm512|b32|er rvm:fv: evex.nds.512.66.0f38.w0 aa /r  AVX512,FUTURE
+VFMSUB213SD     xmmreg|mask|z,xmmreg,xmmrm64|er     rvm:t1s: evex.nds.128.66.0f38.w1 ab /r  AVX512,FUTURE
+VFMSUB213SS     xmmreg|mask|z,xmmreg,xmmrm32|er     rvm:t1s: evex.nds.128.66.0f38.w0 ab /r  AVX512,FUTURE
+VFMSUB231PD     xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 ba /r  AVX512VL,AVX512,FUTURE
+VFMSUB231PD     ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 ba /r  AVX512VL,AVX512,FUTURE
+VFMSUB231PD     zmmreg|mask|z,zmmreg,zmmrm512|b64|er rvm:fv: evex.nds.512.66.0f38.w1 ba /r  AVX512,FUTURE
+VFMSUB231PS     xmmreg|mask|z,xmmreg,xmmrm128|b32   rvm:fv: evex.nds.128.66.0f38.w0 ba /r  AVX512VL,AVX512,FUTURE
+VFMSUB231PS     ymmreg|mask|z,ymmreg,ymmrm256|b32   rvm:fv: evex.nds.256.66.0f38.w0 ba /r  AVX512VL,AVX512,FUTURE
+VFMSUB231PS     zmmreg|mask|z,zmmreg,zmmrm512|b32|er rvm:fv: evex.nds.512.66.0f38.w0 ba /r  AVX512,FUTURE
+VFMSUB231SD     xmmreg|mask|z,xmmreg,xmmrm64|er     rvm:t1s: evex.nds.128.66.0f38.w1 bb /r  AVX512,FUTURE
+VFMSUB231SS     xmmreg|mask|z,xmmreg,xmmrm32|er     rvm:t1s: evex.nds.128.66.0f38.w0 bb /r  AVX512,FUTURE
+VFMSUBADD132PD  xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 97 /r  AVX512VL,AVX512,FUTURE
+VFMSUBADD132PD  ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 97 /r  AVX512VL,AVX512,FUTURE
+VFMSUBADD132PD  zmmreg|mask|z,zmmreg,zmmrm512|b64|er rvm:fv: evex.nds.512.66.0f38.w1 97 /r  AVX512,FUTURE
+VFMSUBADD132PS  xmmreg|mask|z,xmmreg,xmmrm128|b32   rvm:fv: evex.nds.128.66.0f38.w0 97 /r  AVX512VL,AVX512,FUTURE
+VFMSUBADD132PS  ymmreg|mask|z,ymmreg,ymmrm256|b32   rvm:fv: evex.nds.256.66.0f38.w0 97 /r  AVX512VL,AVX512,FUTURE
+VFMSUBADD132PS  zmmreg|mask|z,zmmreg,zmmrm512|b32|er rvm:fv: evex.nds.512.66.0f38.w0 97 /r  AVX512,FUTURE
+VFMSUBADD213PD  xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 a7 /r  AVX512VL,AVX512,FUTURE
+VFMSUBADD213PD  ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 a7 /r  AVX512VL,AVX512,FUTURE
+VFMSUBADD213PD  zmmreg|mask|z,zmmreg,zmmrm512|b64|er rvm:fv: evex.nds.512.66.0f38.w1 a7 /r  AVX512,FUTURE
+VFMSUBADD213PS  xmmreg|mask|z,xmmreg,xmmrm128|b32   rvm:fv: evex.nds.128.66.0f38.w0 a7 /r  AVX512VL,AVX512,FUTURE
+VFMSUBADD213PS  ymmreg|mask|z,ymmreg,ymmrm256|b32   rvm:fv: evex.nds.256.66.0f38.w0 a7 /r  AVX512VL,AVX512,FUTURE
+VFMSUBADD213PS  zmmreg|mask|z,zmmreg,zmmrm512|b32|er rvm:fv: evex.nds.512.66.0f38.w0 a7 /r  AVX512,FUTURE
+VFMSUBADD231PD  xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 b7 /r  AVX512VL,AVX512,FUTURE
+VFMSUBADD231PD  ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 b7 /r  AVX512VL,AVX512,FUTURE
+VFMSUBADD231PD  zmmreg|mask|z,zmmreg,zmmrm512|b64|er rvm:fv: evex.nds.512.66.0f38.w1 b7 /r  AVX512,FUTURE
+VFMSUBADD231PS  xmmreg|mask|z,xmmreg,xmmrm128|b32   rvm:fv: evex.nds.128.66.0f38.w0 b7 /r  AVX512VL,AVX512,FUTURE
+VFMSUBADD231PS  ymmreg|mask|z,ymmreg,ymmrm256|b32   rvm:fv: evex.nds.256.66.0f38.w0 b7 /r  AVX512VL,AVX512,FUTURE
+VFMSUBADD231PS  zmmreg|mask|z,zmmreg,zmmrm512|b32|er rvm:fv: evex.nds.512.66.0f38.w0 b7 /r  AVX512,FUTURE
+VFNMADD132PD    xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 9c /r  AVX512VL,AVX512,FUTURE
+VFNMADD132PD    ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 9c /r  AVX512VL,AVX512,FUTURE
+VFNMADD132PD    zmmreg|mask|z,zmmreg,zmmrm512|b64|er rvm:fv: evex.nds.512.66.0f38.w1 9c /r  AVX512,FUTURE
+VFNMADD132PS    xmmreg|mask|z,xmmreg,xmmrm128|b32   rvm:fv: evex.nds.128.66.0f38.w0 9c /r  AVX512VL,AVX512,FUTURE
+VFNMADD132PS    ymmreg|mask|z,ymmreg,ymmrm256|b32   rvm:fv: evex.nds.256.66.0f38.w0 9c /r  AVX512VL,AVX512,FUTURE
+VFNMADD132PS    zmmreg|mask|z,zmmreg,zmmrm512|b32|er rvm:fv: evex.nds.512.66.0f38.w0 9c /r  AVX512,FUTURE
+VFNMADD132SD    xmmreg|mask|z,xmmreg,xmmrm64|er     rvm:t1s: evex.nds.128.66.0f38.w1 9d /r  AVX512,FUTURE
+VFNMADD132SS    xmmreg|mask|z,xmmreg,xmmrm32|er     rvm:t1s: evex.nds.128.66.0f38.w0 9d /r  AVX512,FUTURE
+VFNMADD213PD    xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 ac /r  AVX512VL,AVX512,FUTURE
+VFNMADD213PD    ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 ac /r  AVX512VL,AVX512,FUTURE
+VFNMADD213PD    zmmreg|mask|z,zmmreg,zmmrm512|b64|er rvm:fv: evex.nds.512.66.0f38.w1 ac /r  AVX512,FUTURE
+VFNMADD213PS    xmmreg|mask|z,xmmreg,xmmrm128|b32   rvm:fv: evex.nds.128.66.0f38.w0 ac /r  AVX512VL,AVX512,FUTURE
+VFNMADD213PS    ymmreg|mask|z,ymmreg,ymmrm256|b32   rvm:fv: evex.nds.256.66.0f38.w0 ac /r  AVX512VL,AVX512,FUTURE
+VFNMADD213PS    zmmreg|mask|z,zmmreg,zmmrm512|b32|er rvm:fv: evex.nds.512.66.0f38.w0 ac /r  AVX512,FUTURE
+VFNMADD213SD    xmmreg|mask|z,xmmreg,xmmrm64|er     rvm:t1s: evex.nds.128.66.0f38.w1 ad /r  AVX512,FUTURE
+VFNMADD213SS    xmmreg|mask|z,xmmreg,xmmrm32|er     rvm:t1s: evex.nds.128.66.0f38.w0 ad /r  AVX512,FUTURE
+VFNMADD231PD    xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 bc /r  AVX512VL,AVX512,FUTURE
+VFNMADD231PD    ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 bc /r  AVX512VL,AVX512,FUTURE
+VFNMADD231PD    zmmreg|mask|z,zmmreg,zmmrm512|b64|er rvm:fv: evex.nds.512.66.0f38.w1 bc /r  AVX512,FUTURE
+VFNMADD231PS    xmmreg|mask|z,xmmreg,xmmrm128|b32   rvm:fv: evex.nds.128.66.0f38.w0 bc /r  AVX512VL,AVX512,FUTURE
+VFNMADD231PS    ymmreg|mask|z,ymmreg,ymmrm256|b32   rvm:fv: evex.nds.256.66.0f38.w0 bc /r  AVX512VL,AVX512,FUTURE
+VFNMADD231PS    zmmreg|mask|z,zmmreg,zmmrm512|b32|er rvm:fv: evex.nds.512.66.0f38.w0 bc /r  AVX512,FUTURE
+VFNMADD231SD    xmmreg|mask|z,xmmreg,xmmrm64|er     rvm:t1s: evex.nds.128.66.0f38.w1 bd /r  AVX512,FUTURE
+VFNMADD231SS    xmmreg|mask|z,xmmreg,xmmrm32|er     rvm:t1s: evex.nds.128.66.0f38.w0 bd /r  AVX512,FUTURE
+VFNMSUB132PD    xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 9e /r  AVX512VL,AVX512,FUTURE
+VFNMSUB132PD    ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 9e /r  AVX512VL,AVX512,FUTURE
+VFNMSUB132PD    zmmreg|mask|z,zmmreg,zmmrm512|b64|er rvm:fv: evex.nds.512.66.0f38.w1 9e /r  AVX512,FUTURE
+VFNMSUB132PS    xmmreg|mask|z,xmmreg,xmmrm128|b32   rvm:fv: evex.nds.128.66.0f38.w0 9e /r  AVX512VL,AVX512,FUTURE
+VFNMSUB132PS    ymmreg|mask|z,ymmreg,ymmrm256|b32   rvm:fv: evex.nds.256.66.0f38.w0 9e /r  AVX512VL,AVX512,FUTURE
+VFNMSUB132PS    zmmreg|mask|z,zmmreg,zmmrm512|b32|er rvm:fv: evex.nds.512.66.0f38.w0 9e /r  AVX512,FUTURE
+VFNMSUB132SD    xmmreg|mask|z,xmmreg,xmmrm64|er     rvm:t1s: evex.nds.128.66.0f38.w1 9f /r  AVX512,FUTURE
+VFNMSUB132SS    xmmreg|mask|z,xmmreg,xmmrm32|er     rvm:t1s: evex.nds.128.66.0f38.w0 9f /r  AVX512,FUTURE
+VFNMSUB213PD    xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 ae /r  AVX512VL,AVX512,FUTURE
+VFNMSUB213PD    ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 ae /r  AVX512VL,AVX512,FUTURE
+VFNMSUB213PD    zmmreg|mask|z,zmmreg,zmmrm512|b64|er rvm:fv: evex.nds.512.66.0f38.w1 ae /r  AVX512,FUTURE
+VFNMSUB213PS    xmmreg|mask|z,xmmreg,xmmrm128|b32   rvm:fv: evex.nds.128.66.0f38.w0 ae /r  AVX512VL,AVX512,FUTURE
+VFNMSUB213PS    ymmreg|mask|z,ymmreg,ymmrm256|b32   rvm:fv: evex.nds.256.66.0f38.w0 ae /r  AVX512VL,AVX512,FUTURE
+VFNMSUB213PS    zmmreg|mask|z,zmmreg,zmmrm512|b32|er rvm:fv: evex.nds.512.66.0f38.w0 ae /r  AVX512,FUTURE
+VFNMSUB213SD    xmmreg|mask|z,xmmreg,xmmrm64|er     rvm:t1s: evex.nds.128.66.0f38.w1 af /r  AVX512,FUTURE
+VFNMSUB213SS    xmmreg|mask|z,xmmreg,xmmrm32|er     rvm:t1s: evex.nds.128.66.0f38.w0 af /r  AVX512,FUTURE
+VFNMSUB231PD    xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 be /r  AVX512VL,AVX512,FUTURE
+VFNMSUB231PD    ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 be /r  AVX512VL,AVX512,FUTURE
+VFNMSUB231PD    zmmreg|mask|z,zmmreg,zmmrm512|b64|er rvm:fv: evex.nds.512.66.0f38.w1 be /r  AVX512,FUTURE
+VFNMSUB231PS    xmmreg|mask|z,xmmreg,xmmrm128|b32   rvm:fv: evex.nds.128.66.0f38.w0 be /r  AVX512VL,AVX512,FUTURE
+VFNMSUB231PS    ymmreg|mask|z,ymmreg,ymmrm256|b32   rvm:fv: evex.nds.256.66.0f38.w0 be /r  AVX512VL,AVX512,FUTURE
+VFNMSUB231PS    zmmreg|mask|z,zmmreg,zmmrm512|b32|er rvm:fv: evex.nds.512.66.0f38.w0 be /r  AVX512,FUTURE
+VFNMSUB231SD    xmmreg|mask|z,xmmreg,xmmrm64|er     rvm:t1s: evex.nds.128.66.0f38.w1 bf /r  AVX512,FUTURE
+VFNMSUB231SS    xmmreg|mask|z,xmmreg,xmmrm32|er     rvm:t1s: evex.nds.128.66.0f38.w0 bf /r  AVX512,FUTURE
+VFPCLASSPD      kreg|mask,xmmrm128|b64,imm8         rmi:fv: evex.128.66.0f3a.w1 66 /r ib  AVX512VL,AVX512DQ,FUTURE
+VFPCLASSPD      kreg|mask,ymmrm256|b64,imm8         rmi:fv: evex.256.66.0f3a.w1 66 /r ib  AVX512VL,AVX512DQ,FUTURE
+VFPCLASSPD      kreg|mask,zmmrm512|b64,imm8         rmi:fv: evex.512.66.0f3a.w1 66 /r ib  AVX512DQ,FUTURE
+VFPCLASSPS      kreg|mask,xmmrm128|b32,imm8         rmi:fv: evex.128.66.0f3a.w0 66 /r ib  AVX512VL,AVX512DQ,FUTURE
+VFPCLASSPS      kreg|mask,ymmrm256|b32,imm8         rmi:fv: evex.256.66.0f3a.w0 66 /r ib  AVX512VL,AVX512DQ,FUTURE
+VFPCLASSPS      kreg|mask,zmmrm512|b32,imm8         rmi:fv: evex.512.66.0f3a.w0 66 /r ib  AVX512DQ,FUTURE
+VFPCLASSSD      kreg|mask,xmmrm64,imm8              rmi:t1s: evex.128.66.0f3a.w1 67 /r ib  AVX512DQ,FUTURE
+VFPCLASSSS      kreg|mask,xmmrm32,imm8              rmi:t1s: evex.128.66.0f3a.w0 67 /r ib  AVX512DQ,FUTURE
+VGATHERDPD      xmmreg|mask,xmem64                  rm:t1s: vsibx evex.128.66.0f38.w1 92 /r  AVX512VL,AVX512,FUTURE
+VGATHERDPD      ymmreg|mask,xmem64                  rm:t1s: vsibx evex.256.66.0f38.w1 92 /r  AVX512VL,AVX512,FUTURE
+VGATHERDPD      zmmreg|mask,ymem64                  rm:t1s: vsiby evex.512.66.0f38.w1 92 /r  AVX512,FUTURE
+VGATHERDPS      xmmreg|mask,xmem32                  rm:t1s: vsibx evex.128.66.0f38.w0 92 /r  AVX512VL,AVX512,FUTURE
+VGATHERDPS      ymmreg|mask,ymem32                  rm:t1s: vsiby evex.256.66.0f38.w0 92 /r  AVX512VL,AVX512,FUTURE
+VGATHERDPS      zmmreg|mask,zmem32                  rm:t1s: vsibz evex.512.66.0f38.w0 92 /r  AVX512,FUTURE
+VGATHERPF0DPD   ymem64|mask                         m:t1s: vsiby evex.512.66.0f38.w1 c6 /1  AVX512PF,FUTURE
+VGATHERPF0DPS   zmem32|mask                         m:t1s: vsibz evex.512.66.0f38.w0 c6 /1  AVX512PF,FUTURE
+VGATHERPF0QPD   zmem64|mask                         m:t1s: vsibz evex.512.66.0f38.w1 c7 /1  AVX512PF,FUTURE
+VGATHERPF0QPS   zmem32|mask                         m:t1s: vsibz evex.512.66.0f38.w0 c7 /1  AVX512PF,FUTURE
+VGATHERPF1DPD   ymem64|mask                         m:t1s: vsiby evex.512.66.0f38.w1 c6 /2  AVX512PF,FUTURE
+VGATHERPF1DPS   zmem32|mask                         m:t1s: vsibz evex.512.66.0f38.w0 c6 /2  AVX512PF,FUTURE
+VGATHERPF1QPD   zmem64|mask                         m:t1s: vsibz evex.512.66.0f38.w1 c7 /2  AVX512PF,FUTURE
+VGATHERPF1QPS   zmem32|mask                         m:t1s: vsibz evex.512.66.0f38.w0 c7 /2  AVX512PF,FUTURE
+VGATHERQPD      xmmreg|mask,xmem64                  rm:t1s: vsibx evex.128.66.0f38.w1 93 /r  AVX512VL,AVX512,FUTURE
+VGATHERQPD      ymmreg|mask,ymem64                  rm:t1s: vsiby evex.256.66.0f38.w1 93 /r  AVX512VL,AVX512,FUTURE
+VGATHERQPD      zmmreg|mask,zmem64                  rm:t1s: vsibz evex.512.66.0f38.w1 93 /r  AVX512,FUTURE
+VGATHERQPS      xmmreg|mask,xmem32                  rm:t1s: vsibx evex.128.66.0f38.w0 93 /r  AVX512VL,AVX512,FUTURE
+VGATHERQPS      xmmreg|mask,ymem32                  rm:t1s: vsiby evex.256.66.0f38.w0 93 /r  AVX512VL,AVX512,FUTURE
+VGATHERQPS      ymmreg|mask,zmem32                  rm:t1s: vsibz evex.512.66.0f38.w0 93 /r  AVX512,FUTURE
+VGETEXPPD       xmmreg|mask|z,xmmrm128|b64          rm:fv: evex.128.66.0f38.w1 42 /r  AVX512VL,AVX512,FUTURE
+VGETEXPPD       ymmreg|mask|z,ymmrm256|b64          rm:fv: evex.256.66.0f38.w1 42 /r  AVX512VL,AVX512,FUTURE
+VGETEXPPD       zmmreg|mask|z,zmmrm512|b64|sae      rm:fv: evex.512.66.0f38.w1 42 /r  AVX512,FUTURE
+VGETEXPPS       xmmreg|mask|z,xmmrm128|b32          rm:fv: evex.128.66.0f38.w0 42 /r  AVX512VL,AVX512,FUTURE
+VGETEXPPS       ymmreg|mask|z,ymmrm256|b32          rm:fv: evex.256.66.0f38.w0 42 /r  AVX512VL,AVX512,FUTURE
+VGETEXPPS       zmmreg|mask|z,zmmrm512|b32|sae      rm:fv: evex.512.66.0f38.w0 42 /r  AVX512,FUTURE
+VGETEXPSD       xmmreg|mask|z,xmmreg,xmmrm64|sae    rvm:t1s: evex.nds.128.66.0f38.w1 43 /r  AVX512,FUTURE
+VGETEXPSS       xmmreg|mask|z,xmmreg,xmmrm32|sae    rvm:t1s: evex.nds.128.66.0f38.w0 43 /r  AVX512,FUTURE
+VGETMANTPD      xmmreg|mask|z,xmmrm128|b64,imm8     rmi:fv: evex.128.66.0f3a.w1 26 /r ib  AVX512VL,AVX512,FUTURE
+VGETMANTPD      ymmreg|mask|z,ymmrm256|b64,imm8     rmi:fv: evex.256.66.0f3a.w1 26 /r ib  AVX512VL,AVX512,FUTURE
+VGETMANTPD      zmmreg|mask|z,zmmrm512|b64|sae,imm8 rmi:fv: evex.512.66.0f3a.w1 26 /r ib  AVX512,FUTURE
+VGETMANTPS      xmmreg|mask|z,xmmrm128|b32,imm8     rmi:fv: evex.128.66.0f3a.w0 26 /r ib  AVX512VL,AVX512,FUTURE
+VGETMANTPS      ymmreg|mask|z,ymmrm256|b32,imm8     rmi:fv: evex.256.66.0f3a.w0 26 /r ib  AVX512VL,AVX512,FUTURE
+VGETMANTPS      zmmreg|mask|z,zmmrm512|b32|sae,imm8 rmi:fv: evex.512.66.0f3a.w0 26 /r ib  AVX512,FUTURE
+VGETMANTSD      xmmreg|mask|z,xmmreg,xmmrm64|sae,imm8 rvmi:t1s: evex.nds.128.66.0f3a.w1 27 /r ib  AVX512,FUTURE
+VGETMANTSS      xmmreg|mask|z,xmmreg,xmmrm32|sae,imm8 rvmi:t1s: evex.nds.128.66.0f3a.w0 27 /r ib  AVX512,FUTURE
+VINSERTF32X4    ymmreg|mask|z,ymmreg*,xmmrm128,imm8 rvmi:t4: evex.nds.256.66.0f3a.w0 18 /r ib  AVX512VL,AVX512,FUTURE
+VINSERTF32X4    zmmreg|mask|z,zmmreg*,xmmrm128,imm8 rvmi:t4: evex.nds.512.66.0f3a.w0 18 /r ib  AVX512,FUTURE
+VINSERTF32X8    zmmreg|mask|z,zmmreg*,ymmrm256,imm8 rvmi:t8: evex.nds.512.66.0f3a.w0 1a /r ib  AVX512DQ,FUTURE
+VINSERTF64X2    ymmreg|mask|z,ymmreg*,xmmrm128,imm8 rvmi:t2: evex.nds.256.66.0f3a.w1 18 /r ib  AVX512VL,AVX512DQ,FUTURE
+VINSERTF64X2    zmmreg|mask|z,zmmreg*,xmmrm128,imm8 rvmi:t2: evex.nds.512.66.0f3a.w1 18 /r ib  AVX512DQ,FUTURE
+VINSERTF64X4    zmmreg|mask|z,zmmreg*,ymmrm256,imm8 rvmi:t4: evex.nds.512.66.0f3a.w1 1a /r ib  AVX512,FUTURE
+VINSERTI32X4    ymmreg|mask|z,ymmreg*,xmmrm128,imm8 rvmi:t4: evex.nds.256.66.0f3a.w0 38 /r ib  AVX512VL,AVX512,FUTURE
+VINSERTI32X4    zmmreg|mask|z,zmmreg*,xmmrm128,imm8 rvmi:t4: evex.nds.512.66.0f3a.w0 38 /r ib  AVX512,FUTURE
+VINSERTI32X8    zmmreg|mask|z,zmmreg*,ymmrm256,imm8 rvmi:t8: evex.nds.512.66.0f3a.w0 3a /r ib  AVX512DQ,FUTURE
+VINSERTI64X2    ymmreg|mask|z,ymmreg*,xmmrm128,imm8 rvmi:t2: evex.nds.256.66.0f3a.w1 38 /r ib  AVX512VL,AVX512DQ,FUTURE
+VINSERTI64X2    zmmreg|mask|z,zmmreg*,xmmrm128,imm8 rvmi:t2: evex.nds.512.66.0f3a.w1 38 /r ib  AVX512DQ,FUTURE
+VINSERTI64X4    zmmreg|mask|z,zmmreg*,ymmrm256,imm8 rvmi:t4: evex.nds.512.66.0f3a.w1 3a /r ib  AVX512,FUTURE
+VINSERTPS       xmmreg,xmmreg*,xmmrm32,imm8         rvmi:t1s: evex.nds.128.66.0f3a.w0 21 /r ib  AVX512,FUTURE
+VMAXPD          xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f.w1 5f /r  AVX512VL,AVX512,FUTURE
+VMAXPD          ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f.w1 5f /r  AVX512VL,AVX512,FUTURE
+VMAXPD          zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae rvm:fv: evex.nds.512.66.0f.w1 5f /r  AVX512,FUTURE
+VMAXPS          xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.0f.w0 5f /r  AVX512VL,AVX512,FUTURE
+VMAXPS          ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.0f.w0 5f /r  AVX512VL,AVX512,FUTURE
+VMAXPS          zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae rvm:fv: evex.nds.512.0f.w0 5f /r  AVX512,FUTURE
+VMAXSD          xmmreg|mask|z,xmmreg*,xmmrm64|sae   rvm:t1s: evex.nds.128.f2.0f.w1 5f /r  AVX512,FUTURE
+VMAXSS          xmmreg|mask|z,xmmreg*,xmmrm32|sae   rvm:t1s: evex.nds.128.f3.0f.w0 5f /r  AVX512,FUTURE
+VMINPD          xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f.w1 5d /r  AVX512VL,AVX512,FUTURE
+VMINPD          ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f.w1 5d /r  AVX512VL,AVX512,FUTURE
+VMINPD          zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae rvm:fv: evex.nds.512.66.0f.w1 5d /r  AVX512,FUTURE
+VMINPS          xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.0f.w0 5d /r  AVX512VL,AVX512,FUTURE
+VMINPS          ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.0f.w0 5d /r  AVX512VL,AVX512,FUTURE
+VMINPS          zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae rvm:fv: evex.nds.512.0f.w0 5d /r  AVX512,FUTURE
+VMINSD          xmmreg|mask|z,xmmreg*,xmmrm64|sae   rvm:t1s: evex.nds.128.f2.0f.w1 5d /r  AVX512,FUTURE
+VMINSS          xmmreg|mask|z,xmmreg*,xmmrm32|sae   rvm:t1s: evex.nds.128.f3.0f.w0 5d /r  AVX512,FUTURE
+VMOVAPD         xmmreg|mask|z,xmmrm128              rm:fvm: evex.128.66.0f.w1 28 /r  AVX512VL,AVX512,FUTURE
+VMOVAPD         ymmreg|mask|z,ymmrm256              rm:fvm: evex.256.66.0f.w1 28 /r  AVX512VL,AVX512,FUTURE
+VMOVAPD         zmmreg|mask|z,zmmrm512              rm:fvm: evex.512.66.0f.w1 28 /r  AVX512,FUTURE
+VMOVAPD         xmmreg|mask|z,xmmreg                mr: evex.128.66.0f.w1 29 /r  AVX512VL,AVX512,FUTURE
+VMOVAPD         ymmreg|mask|z,ymmreg                mr: evex.256.66.0f.w1 29 /r  AVX512VL,AVX512,FUTURE
+VMOVAPD         zmmreg|mask|z,zmmreg                mr: evex.512.66.0f.w1 29 /r  AVX512,FUTURE
+VMOVAPD         mem128|mask,xmmreg                  mr:fvm: evex.128.66.0f.w1 29 /r  AVX512VL,AVX512,FUTURE
+VMOVAPD         mem256|mask,ymmreg                  mr:fvm: evex.256.66.0f.w1 29 /r  AVX512VL,AVX512,FUTURE
+VMOVAPD         mem512|mask,zmmreg                  mr:fvm: evex.512.66.0f.w1 29 /r  AVX512,FUTURE
+VMOVAPS         xmmreg|mask|z,xmmrm128              rm:fvm: evex.128.0f.w0 28 /r  AVX512VL,AVX512,FUTURE
+VMOVAPS         ymmreg|mask|z,ymmrm256              rm:fvm: evex.256.0f.w0 28 /r  AVX512VL,AVX512,FUTURE
+VMOVAPS         zmmreg|mask|z,zmmrm512              rm:fvm: evex.512.0f.w0 28 /r  AVX512,FUTURE
+VMOVAPS         xmmreg|mask|z,xmmreg                mr: evex.128.0f.w0 29 /r  AVX512VL,AVX512,FUTURE
+VMOVAPS         ymmreg|mask|z,ymmreg                mr: evex.256.0f.w0 29 /r  AVX512VL,AVX512,FUTURE
+VMOVAPS         zmmreg|mask|z,zmmreg                mr: evex.512.0f.w0 29 /r  AVX512,FUTURE
+VMOVAPS         mem128|mask,xmmreg                  mr:fvm: evex.128.0f.w0 29 /r  AVX512VL,AVX512,FUTURE
+VMOVAPS         mem256|mask,ymmreg                  mr:fvm: evex.256.0f.w0 29 /r  AVX512VL,AVX512,FUTURE
+VMOVAPS         mem512|mask,zmmreg                  mr:fvm: evex.512.0f.w0 29 /r  AVX512,FUTURE
+VMOVD           xmmreg,rm32                         rm:t1s: evex.128.66.0f.w0 6e /r  AVX512,FUTURE
+VMOVD           rm32,xmmreg                         mr:t1s: evex.128.66.0f.w0 7e /r  AVX512,FUTURE
+VMOVDDUP        xmmreg|mask|z,xmmrm64               rm:dup: evex.128.f2.0f.w1 12 /r  AVX512VL,AVX512,FUTURE
+VMOVDDUP        ymmreg|mask|z,ymmrm256              rm:dup: evex.256.f2.0f.w1 12 /r  AVX512VL,AVX512,FUTURE
+VMOVDDUP        zmmreg|mask|z,zmmrm512              rm:dup: evex.512.f2.0f.w1 12 /r  AVX512,FUTURE
+VMOVDQA32       xmmreg|mask|z,xmmrm128              rm:fvm: evex.128.66.0f.w0 6f /r  AVX512VL,AVX512,FUTURE
+VMOVDQA32       ymmreg|mask|z,ymmrm256              rm:fvm: evex.256.66.0f.w0 6f /r  AVX512VL,AVX512,FUTURE
+VMOVDQA32       zmmreg|mask|z,zmmrm512              rm:fvm: evex.512.66.0f.w0 6f /r  AVX512,FUTURE
+VMOVDQA32       xmmrm128|mask|z,xmmreg              mr:fvm: evex.128.66.0f.w0 7f /r  AVX512VL,AVX512,FUTURE
+VMOVDQA32       ymmrm256|mask|z,ymmreg              mr:fvm: evex.256.66.0f.w0 7f /r  AVX512VL,AVX512,FUTURE
+VMOVDQA32       zmmrm512|mask|z,zmmreg              mr:fvm: evex.512.66.0f.w0 7f /r  AVX512,FUTURE
+VMOVDQA64       xmmreg|mask|z,xmmrm128              rm:fvm: evex.128.66.0f.w1 6f /r  AVX512VL,AVX512,FUTURE
+VMOVDQA64       ymmreg|mask|z,ymmrm256              rm:fvm: evex.256.66.0f.w1 6f /r  AVX512VL,AVX512,FUTURE
+VMOVDQA64       zmmreg|mask|z,zmmrm512              rm:fvm: evex.512.66.0f.w1 6f /r  AVX512,FUTURE
+VMOVDQA64       xmmrm128|mask|z,xmmreg              mr:fvm: evex.128.66.0f.w1 7f /r  AVX512VL,AVX512,FUTURE
+VMOVDQA64       ymmrm256|mask|z,ymmreg              mr:fvm: evex.256.66.0f.w1 7f /r  AVX512VL,AVX512,FUTURE
+VMOVDQA64       zmmrm512|mask|z,zmmreg              mr:fvm: evex.512.66.0f.w1 7f /r  AVX512,FUTURE
+VMOVDQU16       xmmreg|mask|z,xmmrm128              rm:fvm: evex.128.f2.0f.w1 6f /r  AVX512VL,AVX512BW,FUTURE
+VMOVDQU16       ymmreg|mask|z,ymmrm256              rm:fvm: evex.256.f2.0f.w1 6f /r  AVX512VL,AVX512BW,FUTURE
+VMOVDQU16       zmmreg|mask|z,zmmrm512              rm:fvm: evex.512.f2.0f.w1 6f /r  AVX512BW,FUTURE
+VMOVDQU16       xmmrm128|mask|z,xmmreg              mr:fvm: evex.128.f2.0f.w1 7f /r  AVX512VL,AVX512BW,FUTURE
+VMOVDQU16       ymmrm256|mask|z,ymmreg              mr:fvm: evex.256.f2.0f.w1 7f /r  AVX512VL,AVX512BW,FUTURE
+VMOVDQU16       zmmrm512|mask|z,zmmreg              mr:fvm: evex.512.f2.0f.w1 7f /r  AVX512BW,FUTURE
+VMOVDQU32       xmmreg|mask|z,xmmrm128              rm:fvm: evex.128.f3.0f.w0 6f /r  AVX512VL,AVX512,FUTURE
+VMOVDQU32       ymmreg|mask|z,ymmrm256              rm:fvm: evex.256.f3.0f.w0 6f /r  AVX512VL,AVX512,FUTURE
+VMOVDQU32       zmmreg|mask|z,zmmrm512              rm:fvm: evex.512.f3.0f.w0 6f /r  AVX512,FUTURE
+VMOVDQU32       xmmrm128|mask|z,xmmreg              mr:fvm: evex.128.f3.0f.w0 7f /r  AVX512VL,AVX512,FUTURE
+VMOVDQU32       ymmrm256|mask|z,ymmreg              mr:fvm: evex.256.f3.0f.w0 7f /r  AVX512VL,AVX512,FUTURE
+VMOVDQU32       zmmrm512|mask|z,zmmreg              mr:fvm: evex.512.f3.0f.w0 7f /r  AVX512,FUTURE
+VMOVDQU64       xmmreg|mask|z,xmmrm128              rm:fvm: evex.128.f3.0f.w1 6f /r  AVX512VL,AVX512,FUTURE
+VMOVDQU64       ymmreg|mask|z,ymmrm256              rm:fvm: evex.256.f3.0f.w1 6f /r  AVX512VL,AVX512,FUTURE
+VMOVDQU64       zmmreg|mask|z,zmmrm512              rm:fvm: evex.512.f3.0f.w1 6f /r  AVX512,FUTURE
+VMOVDQU64       xmmrm128|mask|z,xmmreg              mr:fvm: evex.128.f3.0f.w1 7f /r  AVX512VL,AVX512,FUTURE
+VMOVDQU64       ymmrm256|mask|z,ymmreg              mr:fvm: evex.256.f3.0f.w1 7f /r  AVX512VL,AVX512,FUTURE
+VMOVDQU64       zmmrm512|mask|z,zmmreg              mr:fvm: evex.512.f3.0f.w1 7f /r  AVX512,FUTURE
+VMOVDQU8        xmmreg|mask|z,xmmrm128              rm:fvm: evex.128.f2.0f.w0 6f /r  AVX512VL,AVX512BW,FUTURE
+VMOVDQU8        ymmreg|mask|z,ymmrm256              rm:fvm: evex.256.f2.0f.w0 6f /r  AVX512VL,AVX512BW,FUTURE
+VMOVDQU8        zmmreg|mask|z,zmmrm512              rm:fvm: evex.512.f2.0f.w0 6f /r  AVX512BW,FUTURE
+VMOVDQU8        xmmrm128|mask|z,xmmreg              mr:fvm: evex.128.f2.0f.w0 7f /r  AVX512VL,AVX512BW,FUTURE
+VMOVDQU8        ymmrm256|mask|z,ymmreg              mr:fvm: evex.256.f2.0f.w0 7f /r  AVX512VL,AVX512BW,FUTURE
+VMOVDQU8        zmmrm512|mask|z,zmmreg              mr:fvm: evex.512.f2.0f.w0 7f /r  AVX512BW,FUTURE
+VMOVHLPS        xmmreg,xmmreg*,xmmreg               rvm: evex.nds.128.0f.w0 12 /r  AVX512,FUTURE
+VMOVHPD         xmmreg,xmmreg*,mem64                rvm:t1s: evex.nds.128.66.0f.w1 16 /r  AVX512,FUTURE
+VMOVHPD         mem64,xmmreg                        mr:t1s: evex.128.66.0f.w1 17 /r  AVX512,FUTURE
+VMOVHPS         xmmreg,xmmreg*,mem64                rvm:t2: evex.nds.128.0f.w0 16 /r  AVX512,FUTURE
+VMOVHPS         mem64,xmmreg                        mr:t2: evex.128.0f.w0 17 /r  AVX512,FUTURE
+VMOVLHPS        xmmreg,xmmreg*,xmmreg               rvm: evex.nds.128.0f.w0 16 /r  AVX512,FUTURE
+VMOVLPD         xmmreg,xmmreg*,mem64                rvm:t1s: evex.nds.128.66.0f.w1 12 /r  AVX512,FUTURE
+VMOVLPD         mem64,xmmreg                        mr:t1s: evex.128.66.0f.w1 13 /r  AVX512,FUTURE
+VMOVLPS         xmmreg,xmmreg*,mem64                rvm:t2: evex.nds.128.0f.w0 12 /r  AVX512,FUTURE
+VMOVLPS         mem64,xmmreg                        mr:t2: evex.128.0f.w0 13 /r  AVX512,FUTURE
+VMOVNTDQ        mem128,xmmreg                       mr:fvm: evex.128.66.0f.w0 e7 /r  AVX512VL,AVX512,FUTURE
+VMOVNTDQ        mem256,ymmreg                       mr:fvm: evex.256.66.0f.w0 e7 /r  AVX512VL,AVX512,FUTURE
+VMOVNTDQ        mem512,zmmreg                       mr:fvm: evex.512.66.0f.w0 e7 /r  AVX512,FUTURE
+VMOVNTDQA       xmmreg,mem128                       rm:fvm: evex.128.66.0f38.w0 2a /r  AVX512VL,AVX512,FUTURE
+VMOVNTDQA       ymmreg,mem256                       rm:fvm: evex.256.66.0f38.w0 2a /r  AVX512VL,AVX512,FUTURE
+VMOVNTDQA       zmmreg,mem512                       rm:fvm: evex.512.66.0f38.w0 2a /r  AVX512,FUTURE
+VMOVNTPD        mem128,xmmreg                       mr:fvm: evex.128.66.0f.w1 2b /r  AVX512VL,AVX512,FUTURE
+VMOVNTPD        mem256,ymmreg                       mr:fvm: evex.256.66.0f.w1 2b /r  AVX512VL,AVX512,FUTURE
+VMOVNTPD        mem512,zmmreg                       mr:fvm: evex.512.66.0f.w1 2b /r  AVX512,FUTURE
+VMOVNTPS        mem128,xmmreg                       mr:fvm: evex.128.0f.w0 2b /r  AVX512VL,AVX512,FUTURE
+VMOVNTPS        mem256,ymmreg                       mr:fvm: evex.256.0f.w0 2b /r  AVX512VL,AVX512,FUTURE
+VMOVNTPS        mem512,zmmreg                       mr:fvm: evex.512.0f.w0 2b /r  AVX512,FUTURE
+VMOVQ           xmmreg,rm64                         rm:t1s: evex.128.66.0f.w1 6e /r  AVX512,FUTURE
+VMOVQ           rm64,xmmreg                         mr:t1s: evex.128.66.0f.w1 7e /r  AVX512,FUTURE
+VMOVQ           xmmreg,xmmrm64                      rm:t1s: evex.128.f3.0f.w1 7e /r  AVX512,FUTURE
+VMOVQ           xmmrm64,xmmreg                      mr:t1s: evex.128.66.0f.w1 d6 /r  AVX512,FUTURE
+VMOVSD          xmmreg|mask|z,mem64                 rm:t1s: evex.128.f2.0f.w1 10 /r  AVX512,FUTURE
+VMOVSD          mem64|mask,xmmreg                   mr:t1s: evex.128.f2.0f.w1 11 /r  AVX512,FUTURE
+VMOVSD          xmmreg|mask|z,xmmreg*,xmmreg        rvm: evex.nds.128.f2.0f.w1 10 /r  AVX512,FUTURE
+VMOVSD          xmmreg|mask|z,xmmreg*,xmmreg        mvr: evex.nds.128.f2.0f.w1 11 /r  AVX512,FUTURE
+VMOVSHDUP       xmmreg|mask|z,xmmrm128              rm:fvm: evex.128.f3.0f.w0 16 /r  AVX512VL,AVX512,FUTURE
+VMOVSHDUP       ymmreg|mask|z,ymmrm256              rm:fvm: evex.256.f3.0f.w0 16 /r  AVX512VL,AVX512,FUTURE
+VMOVSHDUP       zmmreg|mask|z,zmmrm512              rm:fvm: evex.512.f3.0f.w0 16 /r  AVX512,FUTURE
+VMOVSLDUP       xmmreg|mask|z,xmmrm128              rm:fvm: evex.128.f3.0f.w0 12 /r  AVX512VL,AVX512,FUTURE
+VMOVSLDUP       ymmreg|mask|z,ymmrm256              rm:fvm: evex.256.f3.0f.w0 12 /r  AVX512VL,AVX512,FUTURE
+VMOVSLDUP       zmmreg|mask|z,zmmrm512              rm:fvm: evex.512.f3.0f.w0 12 /r  AVX512,FUTURE
+VMOVSS          xmmreg|mask|z,mem32                 rm:t1s: evex.128.f3.0f.w0 10 /r  AVX512,FUTURE
+VMOVSS          mem32|mask,xmmreg                   mr:t1s: evex.128.f3.0f.w0 11 /r  AVX512,FUTURE
+VMOVSS          xmmreg|mask|z,xmmreg*,xmmreg        rvm: evex.nds.128.f3.0f.w0 10 /r  AVX512,FUTURE
+VMOVSS          xmmreg|mask|z,xmmreg*,xmmreg        mvr: evex.nds.128.f3.0f.w0 11 /r  AVX512,FUTURE
+VMOVUPD         xmmreg|mask|z,xmmrm128              rm:fvm: evex.128.66.0f.w1 10 /r  AVX512VL,AVX512,FUTURE
+VMOVUPD         ymmreg|mask|z,ymmrm256              rm:fvm: evex.256.66.0f.w1 10 /r  AVX512VL,AVX512,FUTURE
+VMOVUPD         zmmreg|mask|z,zmmrm512              rm:fvm: evex.512.66.0f.w1 10 /r  AVX512,FUTURE
+VMOVUPD         xmmreg|mask|z,xmmreg                mr: evex.128.66.0f.w1 11 /r  AVX512VL,AVX512,FUTURE
+VMOVUPD         ymmreg|mask|z,ymmreg                mr: evex.256.66.0f.w1 11 /r  AVX512VL,AVX512,FUTURE
+VMOVUPD         zmmreg|mask|z,zmmreg                mr: evex.512.66.0f.w1 11 /r  AVX512,FUTURE
+VMOVUPD         mem128|mask,xmmreg                  mr:fvm: evex.128.66.0f.w1 11 /r  AVX512VL,AVX512,FUTURE
+VMOVUPD         mem256|mask,ymmreg                  mr:fvm: evex.256.66.0f.w1 11 /r  AVX512VL,AVX512,FUTURE
+VMOVUPD         mem512|mask,zmmreg                  mr:fvm: evex.512.66.0f.w1 11 /r  AVX512,FUTURE
+VMOVUPS         xmmreg|mask|z,xmmrm128              rm:fvm: evex.128.0f.w0 10 /r  AVX512VL,AVX512,FUTURE
+VMOVUPS         ymmreg|mask|z,ymmrm256              rm:fvm: evex.256.0f.w0 10 /r  AVX512VL,AVX512,FUTURE
+VMOVUPS         zmmreg|mask|z,zmmrm512              rm:fvm: evex.512.0f.w0 10 /r  AVX512,FUTURE
+VMOVUPS         xmmreg|mask|z,xmmreg                mr: evex.128.0f.w0 11 /r  AVX512VL,AVX512,FUTURE
+VMOVUPS         ymmreg|mask|z,ymmreg                mr: evex.256.0f.w0 11 /r  AVX512VL,AVX512,FUTURE
+VMOVUPS         zmmreg|mask|z,zmmreg                mr: evex.512.0f.w0 11 /r  AVX512,FUTURE
+VMOVUPS         mem128|mask,xmmreg                  mr:fvm: evex.128.0f.w0 11 /r  AVX512VL,AVX512,FUTURE
+VMOVUPS         mem256|mask,ymmreg                  mr:fvm: evex.256.0f.w0 11 /r  AVX512VL,AVX512,FUTURE
+VMOVUPS         mem512|mask,zmmreg                  mr:fvm: evex.512.0f.w0 11 /r  AVX512,FUTURE
+VMULPD          xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f.w1 59 /r  AVX512VL,AVX512,FUTURE
+VMULPD          ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f.w1 59 /r  AVX512VL,AVX512,FUTURE
+VMULPD          zmmreg|mask|z,zmmreg*,zmmrm512|b64|er rvm:fv: evex.nds.512.66.0f.w1 59 /r  AVX512,FUTURE
+VMULPS          xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.0f.w0 59 /r  AVX512VL,AVX512,FUTURE
+VMULPS          ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.0f.w0 59 /r  AVX512VL,AVX512,FUTURE
+VMULPS          zmmreg|mask|z,zmmreg*,zmmrm512|b32|er rvm:fv: evex.nds.512.0f.w0 59 /r  AVX512,FUTURE
+VMULSD          xmmreg|mask|z,xmmreg*,xmmrm64|er    rvm:t1s: evex.nds.128.f2.0f.w1 59 /r  AVX512,FUTURE
+VMULSS          xmmreg|mask|z,xmmreg*,xmmrm32|er    rvm:t1s: evex.nds.128.f3.0f.w0 59 /r  AVX512,FUTURE
+VORPD           xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f.w1 56 /r  AVX512VL,AVX512DQ,FUTURE
+VORPD           ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f.w1 56 /r  AVX512VL,AVX512DQ,FUTURE
+VORPD           zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f.w1 56 /r  AVX512DQ,FUTURE
+VORPS           xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.0f.w0 56 /r  AVX512VL,AVX512DQ,FUTURE
+VORPS           ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.0f.w0 56 /r  AVX512VL,AVX512DQ,FUTURE
+VORPS           zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.0f.w0 56 /r  AVX512DQ,FUTURE
+VPABSB          xmmreg|mask|z,xmmrm128              rm:fvm: evex.128.66.0f38.wig 1c /r  AVX512VL,AVX512BW,FUTURE
+VPABSB          ymmreg|mask|z,ymmrm256              rm:fvm: evex.256.66.0f38.wig 1c /r  AVX512VL,AVX512BW,FUTURE
+VPABSB          zmmreg|mask|z,zmmrm512              rm:fvm: evex.512.66.0f38.wig 1c /r  AVX512BW,FUTURE
+VPABSD          xmmreg|mask|z,xmmrm128|b32          rm:fv: evex.128.66.0f38.w0 1e /r  AVX512VL,AVX512,FUTURE
+VPABSD          ymmreg|mask|z,ymmrm256|b32          rm:fv: evex.256.66.0f38.w0 1e /r  AVX512VL,AVX512,FUTURE
+VPABSD          zmmreg|mask|z,zmmrm512|b32          rm:fv: evex.512.66.0f38.w0 1e /r  AVX512,FUTURE
+VPABSQ          xmmreg|mask|z,xmmrm128|b64          rm:fv: evex.128.66.0f38.w1 1f /r  AVX512VL,AVX512,FUTURE
+VPABSQ          ymmreg|mask|z,ymmrm256|b64          rm:fv: evex.256.66.0f38.w1 1f /r  AVX512VL,AVX512,FUTURE
+VPABSQ          zmmreg|mask|z,zmmrm512|b64          rm:fv: evex.512.66.0f38.w1 1f /r  AVX512,FUTURE
+VPABSW          xmmreg|mask|z,xmmrm128              rm:fvm: evex.128.66.0f38.wig 1d /r  AVX512VL,AVX512BW,FUTURE
+VPABSW          ymmreg|mask|z,ymmrm256              rm:fvm: evex.256.66.0f38.wig 1d /r  AVX512VL,AVX512BW,FUTURE
+VPABSW          zmmreg|mask|z,zmmrm512              rm:fvm: evex.512.66.0f38.wig 1d /r  AVX512BW,FUTURE
+VPACKSSDW       xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.66.0f.w0 6b /r  AVX512VL,AVX512BW,FUTURE
+VPACKSSDW       ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.66.0f.w0 6b /r  AVX512VL,AVX512BW,FUTURE
+VPACKSSDW       zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.66.0f.w0 6b /r  AVX512BW,FUTURE
+VPACKSSWB       xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig 63 /r  AVX512VL,AVX512BW,FUTURE
+VPACKSSWB       ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig 63 /r  AVX512VL,AVX512BW,FUTURE
+VPACKSSWB       zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig 63 /r  AVX512BW,FUTURE
+VPACKUSDW       xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.66.0f38.w0 2b /r  AVX512VL,AVX512BW,FUTURE
+VPACKUSDW       ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.66.0f38.w0 2b /r  AVX512VL,AVX512BW,FUTURE
+VPACKUSDW       zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.66.0f38.w0 2b /r  AVX512BW,FUTURE
+VPACKUSWB       xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig 67 /r  AVX512VL,AVX512BW,FUTURE
+VPACKUSWB       ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig 67 /r  AVX512VL,AVX512BW,FUTURE
+VPACKUSWB       zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig 67 /r  AVX512BW,FUTURE
+VPADDB          xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig fc /r  AVX512VL,AVX512BW,FUTURE
+VPADDB          ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig fc /r  AVX512VL,AVX512BW,FUTURE
+VPADDB          zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig fc /r  AVX512BW,FUTURE
+VPADDD          xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.66.0f.w0 fe /r  AVX512VL,AVX512,FUTURE
+VPADDD          ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.66.0f.w0 fe /r  AVX512VL,AVX512,FUTURE
+VPADDD          zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.66.0f.w0 fe /r  AVX512,FUTURE
+VPADDQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f.w1 d4 /r  AVX512VL,AVX512,FUTURE
+VPADDQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f.w1 d4 /r  AVX512VL,AVX512,FUTURE
+VPADDQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f.w1 d4 /r  AVX512,FUTURE
+VPADDSB         xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig ec /r  AVX512VL,AVX512BW,FUTURE
+VPADDSB         ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig ec /r  AVX512VL,AVX512BW,FUTURE
+VPADDSB         zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig ec /r  AVX512BW,FUTURE
+VPADDSW         xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig ed /r  AVX512VL,AVX512BW,FUTURE
+VPADDSW         ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig ed /r  AVX512VL,AVX512BW,FUTURE
+VPADDSW         zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig ed /r  AVX512BW,FUTURE
+VPADDUSB        xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig dc /r  AVX512VL,AVX512BW,FUTURE
+VPADDUSB        ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig dc /r  AVX512VL,AVX512BW,FUTURE
+VPADDUSB        zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig dc /r  AVX512BW,FUTURE
+VPADDUSW        xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig dd /r  AVX512VL,AVX512BW,FUTURE
+VPADDUSW        ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig dd /r  AVX512VL,AVX512BW,FUTURE
+VPADDUSW        zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig dd /r  AVX512BW,FUTURE
+VPADDW          xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig fd /r  AVX512VL,AVX512BW,FUTURE
+VPADDW          ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig fd /r  AVX512VL,AVX512BW,FUTURE
+VPADDW          zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig fd /r  AVX512BW,FUTURE
+VPALIGNR        xmmreg|mask|z,xmmreg*,xmmrm128,imm8 rvmi:fvm: evex.nds.128.66.0f3a.wig 0f /r ib  AVX512VL,AVX512BW,FUTURE
+VPALIGNR        ymmreg|mask|z,ymmreg*,ymmrm256,imm8 rvmi:fvm: evex.nds.256.66.0f3a.wig 0f /r ib  AVX512VL,AVX512BW,FUTURE
+VPALIGNR        zmmreg|mask|z,zmmreg*,zmmrm512,imm8 rvmi:fvm: evex.nds.512.66.0f3a.wig 0f /r ib  AVX512BW,FUTURE
+VPANDD          xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.66.0f.w0 db /r  AVX512VL,AVX512,FUTURE
+VPANDD          ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.66.0f.w0 db /r  AVX512VL,AVX512,FUTURE
+VPANDD          zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.66.0f.w0 db /r  AVX512,FUTURE
+VPANDND         xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.66.0f.w0 df /r  AVX512VL,AVX512,FUTURE
+VPANDND         ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.66.0f.w0 df /r  AVX512VL,AVX512,FUTURE
+VPANDND         zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.66.0f.w0 df /r  AVX512,FUTURE
+VPANDNQ         xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f.w1 df /r  AVX512VL,AVX512,FUTURE
+VPANDNQ         ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f.w1 df /r  AVX512VL,AVX512,FUTURE
+VPANDNQ         zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f.w1 df /r  AVX512,FUTURE
+VPANDQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f.w1 db /r  AVX512VL,AVX512,FUTURE
+VPANDQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f.w1 db /r  AVX512VL,AVX512,FUTURE
+VPANDQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f.w1 db /r  AVX512,FUTURE
+VPAVGB          xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig e0 /r  AVX512VL,AVX512BW,FUTURE
+VPAVGB          ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig e0 /r  AVX512VL,AVX512BW,FUTURE
+VPAVGB          zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig e0 /r  AVX512BW,FUTURE
+VPAVGW          xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig e3 /r  AVX512VL,AVX512BW,FUTURE
+VPAVGW          ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig e3 /r  AVX512VL,AVX512BW,FUTURE
+VPAVGW          zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig e3 /r  AVX512BW,FUTURE
+VPBLENDMB       xmmreg|mask|z,xmmreg,xmmrm128       rvm:fvm: evex.nds.128.66.0f38.w0 66 /r  AVX512VL,AVX512BW,FUTURE
+VPBLENDMB       ymmreg|mask|z,ymmreg,ymmrm256       rvm:fvm: evex.nds.256.66.0f38.w0 66 /r  AVX512VL,AVX512BW,FUTURE
+VPBLENDMB       zmmreg|mask|z,zmmreg,zmmrm512       rvm:fvm: evex.nds.512.66.0f38.w0 66 /r  AVX512BW,FUTURE
+VPBLENDMD       xmmreg|mask|z,xmmreg,xmmrm128|b32   rvm:fv: evex.nds.128.66.0f38.w0 64 /r  AVX512VL,AVX512,FUTURE
+VPBLENDMD       ymmreg|mask|z,ymmreg,ymmrm256|b32   rvm:fv: evex.nds.256.66.0f38.w0 64 /r  AVX512VL,AVX512,FUTURE
+VPBLENDMD       zmmreg|mask|z,zmmreg,zmmrm512|b32   rvm:fv: evex.nds.512.66.0f38.w0 64 /r  AVX512,FUTURE
+VPBLENDMQ       xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 64 /r  AVX512VL,AVX512,FUTURE
+VPBLENDMQ       ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 64 /r  AVX512VL,AVX512,FUTURE
+VPBLENDMQ       zmmreg|mask|z,zmmreg,zmmrm512|b64   rvm:fv: evex.nds.512.66.0f38.w1 64 /r  AVX512,FUTURE
+VPBLENDMW       xmmreg|mask|z,xmmreg,xmmrm128       rvm:fvm: evex.nds.128.66.0f38.w1 66 /r  AVX512VL,AVX512BW,FUTURE
+VPBLENDMW       ymmreg|mask|z,ymmreg,ymmrm256       rvm:fvm: evex.nds.256.66.0f38.w1 66 /r  AVX512VL,AVX512BW,FUTURE
+VPBLENDMW       zmmreg|mask|z,zmmreg,zmmrm512       rvm:fvm: evex.nds.512.66.0f38.w1 66 /r  AVX512BW,FUTURE
+VPBROADCASTB    xmmreg|mask|z,xmmrm8                rm:t1s8: evex.128.66.0f38.w0 78 /r  AVX512VL,AVX512BW,FUTURE
+VPBROADCASTB    ymmreg|mask|z,xmmrm8                rm:t1s8: evex.256.66.0f38.w0 78 /r  AVX512VL,AVX512BW,FUTURE
+VPBROADCASTB    zmmreg|mask|z,xmmrm8                rm:t1s8: evex.512.66.0f38.w0 78 /r  AVX512BW,FUTURE
+VPBROADCASTB    xmmreg|mask|z,reg8                  rm: evex.128.66.0f38.w0 7a /r  AVX512VL,AVX512BW,FUTURE
+VPBROADCASTB    xmmreg|mask|z,reg16                 rm: evex.128.66.0f38.w0 7a /r  AVX512VL,AVX512BW,FUTURE
+VPBROADCASTB    xmmreg|mask|z,reg32                 rm: evex.128.66.0f38.w0 7a /r  AVX512VL,AVX512BW,FUTURE
+VPBROADCASTB    xmmreg|mask|z,reg64                 rm: evex.128.66.0f38.w0 7a /r  AVX512VL,AVX512BW,FUTURE
+VPBROADCASTB    ymmreg|mask|z,reg8                  rm: evex.256.66.0f38.w0 7a /r  AVX512VL,AVX512BW,FUTURE
+VPBROADCASTB    ymmreg|mask|z,reg16                 rm: evex.256.66.0f38.w0 7a /r  AVX512VL,AVX512BW,FUTURE
+VPBROADCASTB    ymmreg|mask|z,reg32                 rm: evex.256.66.0f38.w0 7a /r  AVX512VL,AVX512BW,FUTURE
+VPBROADCASTB    ymmreg|mask|z,reg64                 rm: evex.256.66.0f38.w0 7a /r  AVX512VL,AVX512BW,FUTURE
+VPBROADCASTB    zmmreg|mask|z,reg8                  rm: evex.512.66.0f38.w0 7a /r  AVX512BW,FUTURE
+VPBROADCASTB    zmmreg|mask|z,reg16                 rm: evex.512.66.0f38.w0 7a /r  AVX512BW,FUTURE
+VPBROADCASTB    zmmreg|mask|z,reg32                 rm: evex.512.66.0f38.w0 7a /r  AVX512BW,FUTURE
+VPBROADCASTB    zmmreg|mask|z,reg64                 rm: evex.512.66.0f38.w0 7a /r  AVX512BW,FUTURE
+VPBROADCASTD    xmmreg|mask|z,mem32                 rm:t1s: evex.128.66.0f38.w0 58 /r  AVX512VL,AVX512,FUTURE
+VPBROADCASTD    ymmreg|mask|z,mem32                 rm:t1s: evex.256.66.0f38.w0 58 /r  AVX512VL,AVX512,FUTURE
+VPBROADCASTD    zmmreg|mask|z,mem32                 rm:t1s: evex.512.66.0f38.w0 58 /r  AVX512,FUTURE
+VPBROADCASTD    xmmreg|mask|z,xmmreg                rm: evex.128.66.0f38.w0 58 /r  AVX512VL,AVX512,FUTURE
+VPBROADCASTD    ymmreg|mask|z,xmmreg                rm: evex.256.66.0f38.w0 58 /r  AVX512VL,AVX512,FUTURE
+VPBROADCASTD    zmmreg|mask|z,xmmreg                rm: evex.512.66.0f38.w0 58 /r  AVX512,FUTURE
+VPBROADCASTD    xmmreg|mask|z,reg32                 rm: evex.128.66.0f38.w0 7c /r  AVX512VL,AVX512,FUTURE
+VPBROADCASTD    ymmreg|mask|z,reg32                 rm: evex.256.66.0f38.w0 7c /r  AVX512VL,AVX512,FUTURE
+VPBROADCASTD    zmmreg|mask|z,reg32                 rm: evex.512.66.0f38.w0 7c /r  AVX512,FUTURE
+VPBROADCASTMB2Q xmmreg,kreg                         rm: evex.128.f3.0f38.w1 2a /r  AVX512VL,AVX512CD,FUTURE
+VPBROADCASTMB2Q ymmreg,kreg                         rm: evex.256.f3.0f38.w1 2a /r  AVX512VL,AVX512CD,FUTURE
+VPBROADCASTMB2Q zmmreg,kreg                         rm: evex.512.f3.0f38.w1 2a /r  AVX512CD,FUTURE
+VPBROADCASTMW2D xmmreg,kreg                         rm: evex.128.f3.0f38.w0 3a /r  AVX512VL,AVX512CD,FUTURE
+VPBROADCASTMW2D ymmreg,kreg                         rm: evex.256.f3.0f38.w0 3a /r  AVX512VL,AVX512CD,FUTURE
+VPBROADCASTMW2D zmmreg,kreg                         rm: evex.512.f3.0f38.w0 3a /r  AVX512CD,FUTURE
+VPBROADCASTQ    xmmreg|mask|z,mem64                 rm:t1s: evex.128.66.0f38.w1 59 /r  AVX512VL,AVX512,FUTURE
+VPBROADCASTQ    ymmreg|mask|z,mem64                 rm:t1s: evex.256.66.0f38.w1 59 /r  AVX512VL,AVX512,FUTURE
+VPBROADCASTQ    zmmreg|mask|z,mem64                 rm:t1s: evex.512.66.0f38.w1 59 /r  AVX512,FUTURE
+VPBROADCASTQ    xmmreg|mask|z,xmmreg                rm: evex.128.66.0f38.w1 59 /r  AVX512VL,AVX512,FUTURE
+VPBROADCASTQ    ymmreg|mask|z,xmmreg                rm: evex.256.66.0f38.w1 59 /r  AVX512VL,AVX512,FUTURE
+VPBROADCASTQ    zmmreg|mask|z,xmmreg                rm: evex.512.66.0f38.w1 59 /r  AVX512,FUTURE
+VPBROADCASTQ    xmmreg|mask|z,reg64                 rm: evex.128.66.0f38.w1 7c /r  AVX512VL,AVX512,FUTURE
+VPBROADCASTQ    ymmreg|mask|z,reg64                 rm: evex.256.66.0f38.w1 7c /r  AVX512VL,AVX512,FUTURE
+VPBROADCASTQ    zmmreg|mask|z,reg64                 rm: evex.512.66.0f38.w1 7c /r  AVX512,FUTURE
+VPBROADCASTW    xmmreg|mask|z,xmmrm16               rm:t1s16: evex.128.66.0f38.w0 79 /r  AVX512VL,AVX512BW,FUTURE
+VPBROADCASTW    ymmreg|mask|z,xmmrm16               rm:t1s16: evex.256.66.0f38.w0 79 /r  AVX512VL,AVX512BW,FUTURE
+VPBROADCASTW    zmmreg|mask|z,xmmrm16               rm:t1s16: evex.512.66.0f38.w0 79 /r  AVX512BW,FUTURE
+VPBROADCASTW    xmmreg|mask|z,reg16                 rm: evex.128.66.0f38.w0 7b /r  AVX512VL,AVX512BW,FUTURE
+VPBROADCASTW    xmmreg|mask|z,reg32                 rm: evex.128.66.0f38.w0 7b /r  AVX512VL,AVX512BW,FUTURE
+VPBROADCASTW    xmmreg|mask|z,reg64                 rm: evex.128.66.0f38.w0 7b /r  AVX512VL,AVX512BW,FUTURE
+VPBROADCASTW    ymmreg|mask|z,reg16                 rm: evex.256.66.0f38.w0 7b /r  AVX512VL,AVX512BW,FUTURE
+VPBROADCASTW    ymmreg|mask|z,reg32                 rm: evex.256.66.0f38.w0 7b /r  AVX512VL,AVX512BW,FUTURE
+VPBROADCASTW    ymmreg|mask|z,reg64                 rm: evex.256.66.0f38.w0 7b /r  AVX512VL,AVX512BW,FUTURE
+VPBROADCASTW    zmmreg|mask|z,reg16                 rm: evex.512.66.0f38.w0 7b /r  AVX512BW,FUTURE
+VPBROADCASTW    zmmreg|mask|z,reg32                 rm: evex.512.66.0f38.w0 7b /r  AVX512BW,FUTURE
+VPBROADCASTW    zmmreg|mask|z,reg64                 rm: evex.512.66.0f38.w0 7b /r  AVX512BW,FUTURE
+; VPCMPEQx and VPCMPGTx come in two flavors: SSE-like, and VPCMP with immediate. They are both
+; valid, but prefer the SSE version as it is one byte shorter.
+VPCMPEQB        kreg|mask,xmmreg,xmmrm128           rvm:fvm: evex.nds.128.66.0f.wig 74 /r  AVX512VL,AVX512BW,FUTURE
+VPCMPEQB        kreg|mask,ymmreg,ymmrm256           rvm:fvm: evex.nds.256.66.0f.wig 74 /r  AVX512VL,AVX512BW,FUTURE
+VPCMPEQB        kreg|mask,zmmreg,zmmrm512           rvm:fvm: evex.nds.512.66.0f.wig 74 /r  AVX512BW,FUTURE
+VPCMPEQD        kreg|mask,xmmreg,xmmrm128|b32       rvm:fv: evex.nds.128.66.0f.w0 76 /r  AVX512VL,AVX512,FUTURE
+VPCMPEQD        kreg|mask,ymmreg,ymmrm256|b32       rvm:fv: evex.nds.256.66.0f.w0 76 /r  AVX512VL,AVX512,FUTURE
+VPCMPEQD        kreg|mask,zmmreg,zmmrm512|b32       rvm:fv: evex.nds.512.66.0f.w0 76 /r  AVX512,FUTURE
+VPCMPEQQ        kreg|mask,xmmreg,xmmrm128|b64       rvm:fv: evex.nds.128.66.0f38.w1 29 /r  AVX512VL,AVX512,FUTURE
+VPCMPEQQ        kreg|mask,ymmreg,ymmrm256|b64       rvm:fv: evex.nds.256.66.0f38.w1 29 /r  AVX512VL,AVX512,FUTURE
+VPCMPEQQ        kreg|mask,zmmreg,zmmrm512|b64       rvm:fv: evex.nds.512.66.0f38.w1 29 /r  AVX512,FUTURE
+VPCMPEQW        kreg|mask,xmmreg,xmmrm128           rvm:fvm: evex.nds.128.66.0f.wig 75 /r  AVX512VL,AVX512BW,FUTURE
+VPCMPEQW        kreg|mask,ymmreg,ymmrm256           rvm:fvm: evex.nds.256.66.0f.wig 75 /r  AVX512VL,AVX512BW,FUTURE
+VPCMPEQW        kreg|mask,zmmreg,zmmrm512           rvm:fvm: evex.nds.512.66.0f.wig 75 /r  AVX512BW,FUTURE
+VPCMPGTB        kreg|mask,xmmreg,xmmrm128           rvm:fvm: evex.nds.128.66.0f.wig 64 /r  AVX512VL,AVX512BW,FUTURE
+VPCMPGTB        kreg|mask,ymmreg,ymmrm256           rvm:fvm: evex.nds.256.66.0f.wig 64 /r  AVX512VL,AVX512BW,FUTURE
+VPCMPGTB        kreg|mask,zmmreg,zmmrm512           rvm:fvm: evex.nds.512.66.0f.wig 64 /r  AVX512BW,FUTURE
+VPCMPGTD        kreg|mask,xmmreg,xmmrm128|b32       rvm:fv: evex.nds.128.66.0f.w0 66 /r  AVX512VL,AVX512,FUTURE
+VPCMPGTD        kreg|mask,ymmreg,ymmrm256|b32       rvm:fv: evex.nds.256.66.0f.w0 66 /r  AVX512VL,AVX512,FUTURE
+VPCMPGTD        kreg|mask,zmmreg,zmmrm512|b32       rvm:fv: evex.nds.512.66.0f.w0 66 /r  AVX512,FUTURE
+VPCMPGTQ        kreg|mask,xmmreg,xmmrm128|b64       rvm:fv: evex.nds.128.66.0f38.w1 37 /r  AVX512VL,AVX512,FUTURE
+VPCMPGTQ        kreg|mask,ymmreg,ymmrm256|b64       rvm:fv: evex.nds.256.66.0f38.w1 37 /r  AVX512VL,AVX512,FUTURE
+VPCMPGTQ        kreg|mask,zmmreg,zmmrm512|b64       rvm:fv: evex.nds.512.66.0f38.w1 37 /r  AVX512,FUTURE
+VPCMPGTW        kreg|mask,xmmreg,xmmrm128           rvm:fvm: evex.nds.128.66.0f.wig 65 /r  AVX512VL,AVX512BW,FUTURE
+VPCMPGTW        kreg|mask,ymmreg,ymmrm256           rvm:fvm: evex.nds.256.66.0f.wig 65 /r  AVX512VL,AVX512BW,FUTURE
+VPCMPGTW        kreg|mask,zmmreg,zmmrm512           rvm:fvm: evex.nds.512.66.0f.wig 65 /r  AVX512BW,FUTURE
+; The systematic VPCMP with immediate instructions
+VPCMPEQB          kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 00  AVX512VL,AVX512BW,FUTURE
+VPCMPEQB          kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 00  AVX512VL,AVX512BW,FUTURE
+VPCMPEQB          kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 00  AVX512BW,FUTURE
+VPCMPEQD          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 00  AVX512VL,AVX512,FUTURE
+VPCMPEQD          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 00  AVX512VL,AVX512,FUTURE
+VPCMPEQD          kreg|mask,zmmreg,zmmrm512|b32  rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 00  AVX512,FUTURE
+VPCMPEQQ          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 00  AVX512VL,AVX512,FUTURE
+VPCMPEQQ          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 00  AVX512VL,AVX512,FUTURE
+VPCMPEQQ          kreg|mask,zmmreg,zmmrm512|b64  rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 00  AVX512,FUTURE
+VPCMPEQUB         kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 00  AVX512VL,AVX512BW,FUTURE
+VPCMPEQUB         kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 00  AVX512VL,AVX512BW,FUTURE
+VPCMPEQUB         kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 00  AVX512BW,FUTURE
+VPCMPEQUD         kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 00  AVX512VL,AVX512,FUTURE
+VPCMPEQUD         kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 00  AVX512VL,AVX512,FUTURE
+VPCMPEQUD         kreg|mask,zmmreg,zmmrm512|b32  rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 00  AVX512,FUTURE
+VPCMPEQUQ         kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 00  AVX512VL,AVX512,FUTURE
+VPCMPEQUQ         kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 00  AVX512VL,AVX512,FUTURE
+VPCMPEQUQ         kreg|mask,zmmreg,zmmrm512|b64  rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 00  AVX512,FUTURE
+VPCMPEQUW         kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 00  AVX512VL,AVX512BW,FUTURE
+VPCMPEQUW         kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 00  AVX512VL,AVX512BW,FUTURE
+VPCMPEQUW         kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 00  AVX512BW,FUTURE
+VPCMPEQW          kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 00  AVX512VL,AVX512BW,FUTURE
+VPCMPEQW          kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 00  AVX512VL,AVX512BW,FUTURE
+VPCMPEQW          kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 00  AVX512BW,FUTURE
+VPCMPGEB          kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 05  AVX512VL,AVX512BW,FUTURE
+VPCMPGEB          kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 05  AVX512VL,AVX512BW,FUTURE
+VPCMPGEB          kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 05  AVX512BW,FUTURE
+VPCMPGED          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 05  AVX512VL,AVX512,FUTURE
+VPCMPGED          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 05  AVX512VL,AVX512,FUTURE
+VPCMPGED          kreg|mask,zmmreg,zmmrm512|b32  rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 05  AVX512,FUTURE
+VPCMPGEQ          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 05  AVX512VL,AVX512,FUTURE
+VPCMPGEQ          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 05  AVX512VL,AVX512,FUTURE
+VPCMPGEQ          kreg|mask,zmmreg,zmmrm512|b64  rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 05  AVX512,FUTURE
+VPCMPGEUB         kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 05  AVX512VL,AVX512BW,FUTURE
+VPCMPGEUB         kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 05  AVX512VL,AVX512BW,FUTURE
+VPCMPGEUB         kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 05  AVX512BW,FUTURE
+VPCMPGEUD         kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 05  AVX512VL,AVX512,FUTURE
+VPCMPGEUD         kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 05  AVX512VL,AVX512,FUTURE
+VPCMPGEUD         kreg|mask,zmmreg,zmmrm512|b32  rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 05  AVX512,FUTURE
+VPCMPGEUQ         kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 05  AVX512VL,AVX512,FUTURE
+VPCMPGEUQ         kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 05  AVX512VL,AVX512,FUTURE
+VPCMPGEUQ         kreg|mask,zmmreg,zmmrm512|b64  rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 05  AVX512,FUTURE
+VPCMPGEUW         kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 05  AVX512VL,AVX512BW,FUTURE
+VPCMPGEUW         kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 05  AVX512VL,AVX512BW,FUTURE
+VPCMPGEUW         kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 05  AVX512BW,FUTURE
+VPCMPGEW          kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 05  AVX512VL,AVX512BW,FUTURE
+VPCMPGEW          kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 05  AVX512VL,AVX512BW,FUTURE
+VPCMPGEW          kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 05  AVX512BW,FUTURE
+VPCMPGTB          kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 06  AVX512VL,AVX512BW,FUTURE
+VPCMPGTB          kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 06  AVX512VL,AVX512BW,FUTURE
+VPCMPGTB          kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 06  AVX512BW,FUTURE
+VPCMPGTD          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 06  AVX512VL,AVX512,FUTURE
+VPCMPGTD          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 06  AVX512VL,AVX512,FUTURE
+VPCMPGTD          kreg|mask,zmmreg,zmmrm512|b32  rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 06  AVX512,FUTURE
+VPCMPGTQ          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 06  AVX512VL,AVX512,FUTURE
+VPCMPGTQ          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 06  AVX512VL,AVX512,FUTURE
+VPCMPGTQ          kreg|mask,zmmreg,zmmrm512|b64  rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 06  AVX512,FUTURE
+VPCMPGTUB         kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 06  AVX512VL,AVX512BW,FUTURE
+VPCMPGTUB         kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 06  AVX512VL,AVX512BW,FUTURE
+VPCMPGTUB         kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 06  AVX512BW,FUTURE
+VPCMPGTUD         kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 06  AVX512VL,AVX512,FUTURE
+VPCMPGTUD         kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 06  AVX512VL,AVX512,FUTURE
+VPCMPGTUD         kreg|mask,zmmreg,zmmrm512|b32  rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 06  AVX512,FUTURE
+VPCMPGTUQ         kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 06  AVX512VL,AVX512,FUTURE
+VPCMPGTUQ         kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 06  AVX512VL,AVX512,FUTURE
+VPCMPGTUQ         kreg|mask,zmmreg,zmmrm512|b64  rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 06  AVX512,FUTURE
+VPCMPGTUW         kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 06  AVX512VL,AVX512BW,FUTURE
+VPCMPGTUW         kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 06  AVX512VL,AVX512BW,FUTURE
+VPCMPGTUW         kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 06  AVX512BW,FUTURE
+VPCMPGTW          kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 06  AVX512VL,AVX512BW,FUTURE
+VPCMPGTW          kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 06  AVX512VL,AVX512BW,FUTURE
+VPCMPGTW          kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 06  AVX512BW,FUTURE
+VPCMPLEB          kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 02  AVX512VL,AVX512BW,FUTURE
+VPCMPLEB          kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 02  AVX512VL,AVX512BW,FUTURE
+VPCMPLEB          kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 02  AVX512BW,FUTURE
+VPCMPLED          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 02  AVX512VL,AVX512,FUTURE
+VPCMPLED          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 02  AVX512VL,AVX512,FUTURE
+VPCMPLED          kreg|mask,zmmreg,zmmrm512|b32  rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 02  AVX512,FUTURE
+VPCMPLEQ          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 02  AVX512VL,AVX512,FUTURE
+VPCMPLEQ          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 02  AVX512VL,AVX512,FUTURE
+VPCMPLEQ          kreg|mask,zmmreg,zmmrm512|b64  rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 02  AVX512,FUTURE
+VPCMPLEUB         kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 02  AVX512VL,AVX512BW,FUTURE
+VPCMPLEUB         kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 02  AVX512VL,AVX512BW,FUTURE
+VPCMPLEUB         kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 02  AVX512BW,FUTURE
+VPCMPLEUD         kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 02  AVX512VL,AVX512,FUTURE
+VPCMPLEUD         kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 02  AVX512VL,AVX512,FUTURE
+VPCMPLEUD         kreg|mask,zmmreg,zmmrm512|b32  rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 02  AVX512,FUTURE
+VPCMPLEUQ         kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 02  AVX512VL,AVX512,FUTURE
+VPCMPLEUQ         kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 02  AVX512VL,AVX512,FUTURE
+VPCMPLEUQ         kreg|mask,zmmreg,zmmrm512|b64  rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 02  AVX512,FUTURE
+VPCMPLEUW         kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 02  AVX512VL,AVX512BW,FUTURE
+VPCMPLEUW         kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 02  AVX512VL,AVX512BW,FUTURE
+VPCMPLEUW         kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 02  AVX512BW,FUTURE
+VPCMPLEW          kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 02  AVX512VL,AVX512BW,FUTURE
+VPCMPLEW          kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 02  AVX512VL,AVX512BW,FUTURE
+VPCMPLEW          kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 02  AVX512BW,FUTURE
+VPCMPLTB          kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 01  AVX512VL,AVX512BW,FUTURE
+VPCMPLTB          kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 01  AVX512VL,AVX512BW,FUTURE
+VPCMPLTB          kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 01  AVX512BW,FUTURE
+VPCMPLTD          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 01  AVX512VL,AVX512,FUTURE
+VPCMPLTD          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 01  AVX512VL,AVX512,FUTURE
+VPCMPLTD          kreg|mask,zmmreg,zmmrm512|b32  rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 01  AVX512,FUTURE
+VPCMPLTQ          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 01  AVX512VL,AVX512,FUTURE
+VPCMPLTQ          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 01  AVX512VL,AVX512,FUTURE
+VPCMPLTQ          kreg|mask,zmmreg,zmmrm512|b64  rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 01  AVX512,FUTURE
+VPCMPLTUB         kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 01  AVX512VL,AVX512BW,FUTURE
+VPCMPLTUB         kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 01  AVX512VL,AVX512BW,FUTURE
+VPCMPLTUB         kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 01  AVX512BW,FUTURE
+VPCMPLTUD         kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 01  AVX512VL,AVX512,FUTURE
+VPCMPLTUD         kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 01  AVX512VL,AVX512,FUTURE
+VPCMPLTUD         kreg|mask,zmmreg,zmmrm512|b32  rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 01  AVX512,FUTURE
+VPCMPLTUQ         kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 01  AVX512VL,AVX512,FUTURE
+VPCMPLTUQ         kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 01  AVX512VL,AVX512,FUTURE
+VPCMPLTUQ         kreg|mask,zmmreg,zmmrm512|b64  rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 01  AVX512,FUTURE
+VPCMPLTUW         kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 01  AVX512VL,AVX512BW,FUTURE
+VPCMPLTUW         kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 01  AVX512VL,AVX512BW,FUTURE
+VPCMPLTUW         kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 01  AVX512BW,FUTURE
+VPCMPLTW          kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 01  AVX512VL,AVX512BW,FUTURE
+VPCMPLTW          kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 01  AVX512VL,AVX512BW,FUTURE
+VPCMPLTW          kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 01  AVX512BW,FUTURE
+VPCMPNEQB          kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 04  AVX512VL,AVX512BW,FUTURE
+VPCMPNEQB          kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 04  AVX512VL,AVX512BW,FUTURE
+VPCMPNEQB          kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 04  AVX512BW,FUTURE
+VPCMPNEQD          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 04  AVX512VL,AVX512,FUTURE
+VPCMPNEQD          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 04  AVX512VL,AVX512,FUTURE
+VPCMPNEQD          kreg|mask,zmmreg,zmmrm512|b32  rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 04  AVX512,FUTURE
+VPCMPNEQQ          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 04  AVX512VL,AVX512,FUTURE
+VPCMPNEQQ          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 04  AVX512VL,AVX512,FUTURE
+VPCMPNEQQ          kreg|mask,zmmreg,zmmrm512|b64  rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 04  AVX512,FUTURE
+VPCMPNEQUB         kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 04  AVX512VL,AVX512BW,FUTURE
+VPCMPNEQUB         kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 04  AVX512VL,AVX512BW,FUTURE
+VPCMPNEQUB         kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 04  AVX512BW,FUTURE
+VPCMPNEQUD         kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 04  AVX512VL,AVX512,FUTURE
+VPCMPNEQUD         kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 04  AVX512VL,AVX512,FUTURE
+VPCMPNEQUD         kreg|mask,zmmreg,zmmrm512|b32  rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 04  AVX512,FUTURE
+VPCMPNEQUQ         kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 04  AVX512VL,AVX512,FUTURE
+VPCMPNEQUQ         kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 04  AVX512VL,AVX512,FUTURE
+VPCMPNEQUQ         kreg|mask,zmmreg,zmmrm512|b64  rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 04  AVX512,FUTURE
+VPCMPNEQUW         kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 04  AVX512VL,AVX512BW,FUTURE
+VPCMPNEQUW         kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 04  AVX512VL,AVX512BW,FUTURE
+VPCMPNEQUW         kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 04  AVX512BW,FUTURE
+VPCMPNEQW          kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 04  AVX512VL,AVX512BW,FUTURE
+VPCMPNEQW          kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 04  AVX512VL,AVX512BW,FUTURE
+VPCMPNEQW          kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 04  AVX512BW,FUTURE
+VPCMPNGTB          kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 02  AVX512VL,AVX512BW,FUTURE
+VPCMPNGTB          kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 02  AVX512VL,AVX512BW,FUTURE
+VPCMPNGTB          kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 02  AVX512BW,FUTURE
+VPCMPNGTD          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 02  AVX512VL,AVX512,FUTURE
+VPCMPNGTD          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 02  AVX512VL,AVX512,FUTURE
+VPCMPNGTD          kreg|mask,zmmreg,zmmrm512|b32  rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 02  AVX512,FUTURE
+VPCMPNGTQ          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 02  AVX512VL,AVX512,FUTURE
+VPCMPNGTQ          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 02  AVX512VL,AVX512,FUTURE
+VPCMPNGTQ          kreg|mask,zmmreg,zmmrm512|b64  rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 02  AVX512,FUTURE
+VPCMPNGTUB         kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 02  AVX512VL,AVX512BW,FUTURE
+VPCMPNGTUB         kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 02  AVX512VL,AVX512BW,FUTURE
+VPCMPNGTUB         kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 02  AVX512BW,FUTURE
+VPCMPNGTUD         kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 02  AVX512VL,AVX512,FUTURE
+VPCMPNGTUD         kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 02  AVX512VL,AVX512,FUTURE
+VPCMPNGTUD         kreg|mask,zmmreg,zmmrm512|b32  rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 02  AVX512,FUTURE
+VPCMPNGTUQ         kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 02  AVX512VL,AVX512,FUTURE
+VPCMPNGTUQ         kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 02  AVX512VL,AVX512,FUTURE
+VPCMPNGTUQ         kreg|mask,zmmreg,zmmrm512|b64  rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 02  AVX512,FUTURE
+VPCMPNGTUW         kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 02  AVX512VL,AVX512BW,FUTURE
+VPCMPNGTUW         kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 02  AVX512VL,AVX512BW,FUTURE
+VPCMPNGTUW         kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 02  AVX512BW,FUTURE
+VPCMPNGTW          kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 02  AVX512VL,AVX512BW,FUTURE
+VPCMPNGTW          kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 02  AVX512VL,AVX512BW,FUTURE
+VPCMPNGTW          kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 02  AVX512BW,FUTURE
+VPCMPNLEB          kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 06  AVX512VL,AVX512BW,FUTURE
+VPCMPNLEB          kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 06  AVX512VL,AVX512BW,FUTURE
+VPCMPNLEB          kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 06  AVX512BW,FUTURE
+VPCMPNLED          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 06  AVX512VL,AVX512,FUTURE
+VPCMPNLED          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 06  AVX512VL,AVX512,FUTURE
+VPCMPNLED          kreg|mask,zmmreg,zmmrm512|b32  rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 06  AVX512,FUTURE
+VPCMPNLEQ          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 06  AVX512VL,AVX512,FUTURE
+VPCMPNLEQ          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 06  AVX512VL,AVX512,FUTURE
+VPCMPNLEQ          kreg|mask,zmmreg,zmmrm512|b64  rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 06  AVX512,FUTURE
+VPCMPNLEUB         kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 06  AVX512VL,AVX512BW,FUTURE
+VPCMPNLEUB         kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 06  AVX512VL,AVX512BW,FUTURE
+VPCMPNLEUB         kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 06  AVX512BW,FUTURE
+VPCMPNLEUD         kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 06  AVX512VL,AVX512,FUTURE
+VPCMPNLEUD         kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 06  AVX512VL,AVX512,FUTURE
+VPCMPNLEUD         kreg|mask,zmmreg,zmmrm512|b32  rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 06  AVX512,FUTURE
+VPCMPNLEUQ         kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 06  AVX512VL,AVX512,FUTURE
+VPCMPNLEUQ         kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 06  AVX512VL,AVX512,FUTURE
+VPCMPNLEUQ         kreg|mask,zmmreg,zmmrm512|b64  rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 06  AVX512,FUTURE
+VPCMPNLEUW         kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 06  AVX512VL,AVX512BW,FUTURE
+VPCMPNLEUW         kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 06  AVX512VL,AVX512BW,FUTURE
+VPCMPNLEUW         kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 06  AVX512BW,FUTURE
+VPCMPNLEW          kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 06  AVX512VL,AVX512BW,FUTURE
+VPCMPNLEW          kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 06  AVX512VL,AVX512BW,FUTURE
+VPCMPNLEW          kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 06  AVX512BW,FUTURE
+VPCMPNLTB          kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 05  AVX512VL,AVX512BW,FUTURE
+VPCMPNLTB          kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 05  AVX512VL,AVX512BW,FUTURE
+VPCMPNLTB          kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 05  AVX512BW,FUTURE
+VPCMPNLTD          kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 05  AVX512VL,AVX512,FUTURE
+VPCMPNLTD          kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 05  AVX512VL,AVX512,FUTURE
+VPCMPNLTD          kreg|mask,zmmreg,zmmrm512|b32  rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 05  AVX512,FUTURE
+VPCMPNLTQ          kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 05  AVX512VL,AVX512,FUTURE
+VPCMPNLTQ          kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 05  AVX512VL,AVX512,FUTURE
+VPCMPNLTQ          kreg|mask,zmmreg,zmmrm512|b64  rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 05  AVX512,FUTURE
+VPCMPNLTUB         kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 05  AVX512VL,AVX512BW,FUTURE
+VPCMPNLTUB         kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 05  AVX512VL,AVX512BW,FUTURE
+VPCMPNLTUB         kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 05  AVX512BW,FUTURE
+VPCMPNLTUD         kreg|mask,xmmreg,xmmrm128|b32  rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 05  AVX512VL,AVX512,FUTURE
+VPCMPNLTUD         kreg|mask,ymmreg,ymmrm256|b32  rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 05  AVX512VL,AVX512,FUTURE
+VPCMPNLTUD         kreg|mask,zmmreg,zmmrm512|b32  rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 05  AVX512,FUTURE
+VPCMPNLTUQ         kreg|mask,xmmreg,xmmrm128|b64  rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 05  AVX512VL,AVX512,FUTURE
+VPCMPNLTUQ         kreg|mask,ymmreg,ymmrm256|b64  rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 05  AVX512VL,AVX512,FUTURE
+VPCMPNLTUQ         kreg|mask,zmmreg,zmmrm512|b64  rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 05  AVX512,FUTURE
+VPCMPNLTUW         kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 05  AVX512VL,AVX512BW,FUTURE
+VPCMPNLTUW         kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 05  AVX512VL,AVX512BW,FUTURE
+VPCMPNLTUW         kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 05  AVX512BW,FUTURE
+VPCMPNLTW          kreg|mask,xmmreg,xmmrm128      rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 05  AVX512VL,AVX512BW,FUTURE
+VPCMPNLTW          kreg|mask,ymmreg,ymmrm256      rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 05  AVX512VL,AVX512BW,FUTURE
+VPCMPNLTW          kreg|mask,zmmreg,zmmrm512      rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 05  AVX512BW,FUTURE
+VPCMPB          kreg|mask,xmmreg,xmmrm128,imm8      rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r ib  AVX512VL,AVX512BW,FUTURE
+VPCMPB          kreg|mask,ymmreg,ymmrm256,imm8      rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r ib  AVX512VL,AVX512BW,FUTURE
+VPCMPB          kreg|mask,zmmreg,zmmrm512,imm8      rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r ib  AVX512BW,FUTURE
+VPCMPD          kreg|mask,xmmreg,xmmrm128|b32,imm8  rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r ib  AVX512VL,AVX512,FUTURE
+VPCMPD          kreg|mask,ymmreg,ymmrm256|b32,imm8  rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r ib  AVX512VL,AVX512,FUTURE
+VPCMPD          kreg|mask,zmmreg,zmmrm512|b32,imm8  rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r ib  AVX512,FUTURE
+VPCMPQ          kreg|mask,xmmreg,xmmrm128|b64,imm8  rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r ib  AVX512VL,AVX512,FUTURE
+VPCMPQ          kreg|mask,ymmreg,ymmrm256|b64,imm8  rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r ib  AVX512VL,AVX512,FUTURE
+VPCMPQ          kreg|mask,zmmreg,zmmrm512|b64,imm8  rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r ib  AVX512,FUTURE
+VPCMPUB         kreg|mask,xmmreg,xmmrm128,imm8      rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r ib  AVX512VL,AVX512BW,FUTURE
+VPCMPUB         kreg|mask,ymmreg,ymmrm256,imm8      rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r ib  AVX512VL,AVX512BW,FUTURE
+VPCMPUB         kreg|mask,zmmreg,zmmrm512,imm8      rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r ib  AVX512BW,FUTURE
+VPCMPUD         kreg|mask,xmmreg,xmmrm128|b32,imm8  rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r ib  AVX512VL,AVX512,FUTURE
+VPCMPUD         kreg|mask,ymmreg,ymmrm256|b32,imm8  rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r ib  AVX512VL,AVX512,FUTURE
+VPCMPUD         kreg|mask,zmmreg,zmmrm512|b32,imm8  rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r ib  AVX512,FUTURE
+VPCMPUQ         kreg|mask,xmmreg,xmmrm128|b64,imm8  rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r ib  AVX512VL,AVX512,FUTURE
+VPCMPUQ         kreg|mask,ymmreg,ymmrm256|b64,imm8  rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r ib  AVX512VL,AVX512,FUTURE
+VPCMPUQ         kreg|mask,zmmreg,zmmrm512|b64,imm8  rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r ib  AVX512,FUTURE
+VPCMPUW         kreg|mask,xmmreg,xmmrm128,imm8      rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r ib  AVX512VL,AVX512BW,FUTURE
+VPCMPUW         kreg|mask,ymmreg,ymmrm256,imm8      rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r ib  AVX512VL,AVX512BW,FUTURE
+VPCMPUW         kreg|mask,zmmreg,zmmrm512,imm8      rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r ib  AVX512BW,FUTURE
+VPCMPW          kreg|mask,xmmreg,xmmrm128,imm8      rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r ib  AVX512VL,AVX512BW,FUTURE
+VPCMPW          kreg|mask,ymmreg,ymmrm256,imm8      rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r ib  AVX512VL,AVX512BW,FUTURE
+VPCMPW          kreg|mask,zmmreg,zmmrm512,imm8      rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r ib  AVX512BW,FUTURE
+VPCOMPRESSD     mem128|mask,xmmreg                  mr:t1s: evex.128.66.0f38.w0 8b /r  AVX512VL,AVX512,FUTURE
+VPCOMPRESSD     mem256|mask,ymmreg                  mr:t1s: evex.256.66.0f38.w0 8b /r  AVX512VL,AVX512,FUTURE
+VPCOMPRESSD     mem512|mask,zmmreg                  mr:t1s: evex.512.66.0f38.w0 8b /r  AVX512,FUTURE
+VPCOMPRESSD     xmmreg|mask|z,xmmreg                mr: evex.128.66.0f38.w0 8b /r  AVX512VL,AVX512,FUTURE
+VPCOMPRESSD     ymmreg|mask|z,ymmreg                mr: evex.256.66.0f38.w0 8b /r  AVX512VL,AVX512,FUTURE
+VPCOMPRESSD     zmmreg|mask|z,zmmreg                mr: evex.512.66.0f38.w0 8b /r  AVX512,FUTURE
+VPCOMPRESSQ     mem128|mask,xmmreg                  mr:t1s: evex.128.66.0f38.w1 8b /r  AVX512VL,AVX512,FUTURE
+VPCOMPRESSQ     mem256|mask,ymmreg                  mr:t1s: evex.256.66.0f38.w1 8b /r  AVX512VL,AVX512,FUTURE
+VPCOMPRESSQ     mem512|mask,zmmreg                  mr:t1s: evex.512.66.0f38.w1 8b /r  AVX512,FUTURE
+VPCOMPRESSQ     xmmreg|mask|z,xmmreg                mr: evex.128.66.0f38.w1 8b /r  AVX512VL,AVX512,FUTURE
+VPCOMPRESSQ     ymmreg|mask|z,ymmreg                mr: evex.256.66.0f38.w1 8b /r  AVX512VL,AVX512,FUTURE
+VPCOMPRESSQ     zmmreg|mask|z,zmmreg                mr: evex.512.66.0f38.w1 8b /r  AVX512,FUTURE
+VPCONFLICTD     xmmreg|mask|z,xmmrm128|b32          rm:fv: evex.128.66.0f38.w0 c4 /r  AVX512VL,AVX512CD,FUTURE
+VPCONFLICTD     ymmreg|mask|z,ymmrm256|b32          rm:fv: evex.256.66.0f38.w0 c4 /r  AVX512VL,AVX512CD,FUTURE
+VPCONFLICTD     zmmreg|mask|z,zmmrm512|b32          rm:fv: evex.512.66.0f38.w0 c4 /r  AVX512CD,FUTURE
+VPCONFLICTQ     xmmreg|mask|z,xmmrm128|b64          rm:fv: evex.128.66.0f38.w1 c4 /r  AVX512VL,AVX512CD,FUTURE
+VPCONFLICTQ     ymmreg|mask|z,ymmrm256|b64          rm:fv: evex.256.66.0f38.w1 c4 /r  AVX512VL,AVX512CD,FUTURE
+VPCONFLICTQ     zmmreg|mask|z,zmmrm512|b64          rm:fv: evex.512.66.0f38.w1 c4 /r  AVX512CD,FUTURE
+VPERMB          xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f38.w0 8d /r  AVX512VL,AVX512VBMI,FUTURE
+VPERMB          ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f38.w0 8d /r  AVX512VL,AVX512VBMI,FUTURE
+VPERMB          zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f38.w0 8d /r  AVX512VBMI,FUTURE
+VPERMD          ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.66.0f38.w0 36 /r  AVX512VL,AVX512,FUTURE
+VPERMD          zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.66.0f38.w0 36 /r  AVX512,FUTURE
+VPERMI2B        xmmreg|mask|z,xmmreg,xmmrm128       rvm:fvm: evex.nds.128.66.0f38.w0 75 /r  AVX512VL,AVX512VBMI,FUTURE
+VPERMI2B        ymmreg|mask|z,ymmreg,ymmrm256       rvm:fvm: evex.nds.256.66.0f38.w0 75 /r  AVX512VL,AVX512VBMI,FUTURE
+VPERMI2B        zmmreg|mask|z,zmmreg,zmmrm512       rvm:fvm: evex.nds.512.66.0f38.w0 75 /r  AVX512VBMI,FUTURE
+VPERMI2D        xmmreg|mask|z,xmmreg,xmmrm128|b32   rvm:fv: evex.nds.128.66.0f38.w0 76 /r  AVX512VL,AVX512,FUTURE
+VPERMI2D        ymmreg|mask|z,ymmreg,ymmrm256|b32   rvm:fv: evex.nds.256.66.0f38.w0 76 /r  AVX512VL,AVX512,FUTURE
+VPERMI2D        zmmreg|mask|z,zmmreg,zmmrm512|b32   rvm:fv: evex.nds.512.66.0f38.w0 76 /r  AVX512,FUTURE
+VPERMI2PD       xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 77 /r  AVX512VL,AVX512,FUTURE
+VPERMI2PD       ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 77 /r  AVX512VL,AVX512,FUTURE
+VPERMI2PD       zmmreg|mask|z,zmmreg,zmmrm512|b64   rvm:fv: evex.nds.512.66.0f38.w1 77 /r  AVX512,FUTURE
+VPERMI2PS       xmmreg|mask|z,xmmreg,xmmrm128|b32   rvm:fv: evex.nds.128.66.0f38.w0 77 /r  AVX512VL,AVX512,FUTURE
+VPERMI2PS       ymmreg|mask|z,ymmreg,ymmrm256|b32   rvm:fv: evex.nds.256.66.0f38.w0 77 /r  AVX512VL,AVX512,FUTURE
+VPERMI2PS       zmmreg|mask|z,zmmreg,zmmrm512|b32   rvm:fv: evex.nds.512.66.0f38.w0 77 /r  AVX512,FUTURE
+VPERMI2Q        xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 76 /r  AVX512VL,AVX512,FUTURE
+VPERMI2Q        ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 76 /r  AVX512VL,AVX512,FUTURE
+VPERMI2Q        zmmreg|mask|z,zmmreg,zmmrm512|b64   rvm:fv: evex.nds.512.66.0f38.w1 76 /r  AVX512,FUTURE
+VPERMI2W        xmmreg|mask|z,xmmreg,xmmrm128       rvm:fvm: evex.nds.128.66.0f38.w1 75 /r  AVX512VL,AVX512BW,FUTURE
+VPERMI2W        ymmreg|mask|z,ymmreg,ymmrm256       rvm:fvm: evex.nds.256.66.0f38.w1 75 /r  AVX512VL,AVX512BW,FUTURE
+VPERMI2W        zmmreg|mask|z,zmmreg,zmmrm512       rvm:fvm: evex.nds.512.66.0f38.w1 75 /r  AVX512BW,FUTURE
+VPERMILPD       xmmreg|mask|z,xmmrm128|b64,imm8     rmi:fv: evex.128.66.0f3a.w1 05 /r ib  AVX512VL,AVX512,FUTURE
+VPERMILPD       ymmreg|mask|z,ymmrm256|b64,imm8     rmi:fv: evex.256.66.0f3a.w1 05 /r ib  AVX512VL,AVX512,FUTURE
+VPERMILPD       zmmreg|mask|z,zmmrm512|b64,imm8     rmi:fv: evex.512.66.0f3a.w1 05 /r ib  AVX512,FUTURE
+VPERMILPD       xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f38.w1 0d /r  AVX512VL,AVX512,FUTURE
+VPERMILPD       ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f38.w1 0d /r  AVX512VL,AVX512,FUTURE
+VPERMILPD       zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f38.w1 0d /r  AVX512,FUTURE
+VPERMILPS       xmmreg|mask|z,xmmrm128|b32,imm8     rmi:fv: evex.128.66.0f3a.w0 04 /r ib  AVX512VL,AVX512,FUTURE
+VPERMILPS       ymmreg|mask|z,ymmrm256|b32,imm8     rmi:fv: evex.256.66.0f3a.w0 04 /r ib  AVX512VL,AVX512,FUTURE
+VPERMILPS       zmmreg|mask|z,zmmrm512|b32,imm8     rmi:fv: evex.512.66.0f3a.w0 04 /r ib  AVX512,FUTURE
+VPERMILPS       xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.66.0f38.w0 0c /r  AVX512VL,AVX512,FUTURE
+VPERMILPS       ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.66.0f38.w0 0c /r  AVX512VL,AVX512,FUTURE
+VPERMILPS       zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.66.0f38.w0 0c /r  AVX512,FUTURE
+VPERMPD         ymmreg|mask|z,ymmrm256|b64,imm8     rmi:fv: evex.256.66.0f3a.w1 01 /r ib  AVX512VL,AVX512,FUTURE
+VPERMPD         zmmreg|mask|z,zmmrm512|b64,imm8     rmi:fv: evex.512.66.0f3a.w1 01 /r ib  AVX512,FUTURE
+VPERMPD         ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f38.w1 16 /r  AVX512VL,AVX512,FUTURE
+VPERMPD         zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f38.w1 16 /r  AVX512,FUTURE
+VPERMPS         ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.66.0f38.w0 16 /r  AVX512VL,AVX512,FUTURE
+VPERMPS         zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.66.0f38.w0 16 /r  AVX512,FUTURE
+VPERMQ          ymmreg|mask|z,ymmrm256|b64,imm8     rmi:fv: evex.256.66.0f3a.w1 00 /r ib  AVX512VL,AVX512,FUTURE
+VPERMQ          zmmreg|mask|z,zmmrm512|b64,imm8     rmi:fv: evex.512.66.0f3a.w1 00 /r ib  AVX512,FUTURE
+VPERMQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f38.w1 36 /r  AVX512VL,AVX512,FUTURE
+VPERMQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f38.w1 36 /r  AVX512,FUTURE
+VPERMT2B        xmmreg|mask|z,xmmreg,xmmrm128       rvm:fvm: evex.nds.128.66.0f38.w0 7d /r  AVX512VL,AVX512VBMI,FUTURE
+VPERMT2B        ymmreg|mask|z,ymmreg,ymmrm256       rvm:fvm: evex.nds.256.66.0f38.w0 7d /r  AVX512VL,AVX512VBMI,FUTURE
+VPERMT2B        zmmreg|mask|z,zmmreg,zmmrm512       rvm:fvm: evex.nds.512.66.0f38.w0 7d /r  AVX512VBMI,FUTURE
+VPERMT2D        xmmreg|mask|z,xmmreg,xmmrm128|b32   rvm:fv: evex.nds.128.66.0f38.w0 7e /r  AVX512VL,AVX512,FUTURE
+VPERMT2D        ymmreg|mask|z,ymmreg,ymmrm256|b32   rvm:fv: evex.nds.256.66.0f38.w0 7e /r  AVX512VL,AVX512,FUTURE
+VPERMT2D        zmmreg|mask|z,zmmreg,zmmrm512|b32   rvm:fv: evex.nds.512.66.0f38.w0 7e /r  AVX512,FUTURE
+VPERMT2PD       xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 7f /r  AVX512VL,AVX512,FUTURE
+VPERMT2PD       ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 7f /r  AVX512VL,AVX512,FUTURE
+VPERMT2PD       zmmreg|mask|z,zmmreg,zmmrm512|b64   rvm:fv: evex.nds.512.66.0f38.w1 7f /r  AVX512,FUTURE
+VPERMT2PS       xmmreg|mask|z,xmmreg,xmmrm128|b32   rvm:fv: evex.nds.128.66.0f38.w0 7f /r  AVX512VL,AVX512,FUTURE
+VPERMT2PS       ymmreg|mask|z,ymmreg,ymmrm256|b32   rvm:fv: evex.nds.256.66.0f38.w0 7f /r  AVX512VL,AVX512,FUTURE
+VPERMT2PS       zmmreg|mask|z,zmmreg,zmmrm512|b32   rvm:fv: evex.nds.512.66.0f38.w0 7f /r  AVX512,FUTURE
+VPERMT2Q        xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 7e /r  AVX512VL,AVX512,FUTURE
+VPERMT2Q        ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 7e /r  AVX512VL,AVX512,FUTURE
+VPERMT2Q        zmmreg|mask|z,zmmreg,zmmrm512|b64   rvm:fv: evex.nds.512.66.0f38.w1 7e /r  AVX512,FUTURE
+VPERMT2W        xmmreg|mask|z,xmmreg,xmmrm128       rvm:fvm: evex.nds.128.66.0f38.w1 7d /r  AVX512VL,AVX512BW,FUTURE
+VPERMT2W        ymmreg|mask|z,ymmreg,ymmrm256       rvm:fvm: evex.nds.256.66.0f38.w1 7d /r  AVX512VL,AVX512BW,FUTURE
+VPERMT2W        zmmreg|mask|z,zmmreg,zmmrm512       rvm:fvm: evex.nds.512.66.0f38.w1 7d /r  AVX512BW,FUTURE
+VPERMW          xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f38.w1 8d /r  AVX512VL,AVX512BW,FUTURE
+VPERMW          ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f38.w1 8d /r  AVX512VL,AVX512BW,FUTURE
+VPERMW          zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f38.w1 8d /r  AVX512BW,FUTURE
+VPEXPANDD       xmmreg|mask|z,mem128                rm:t1s: evex.128.66.0f38.w0 89 /r  AVX512VL,AVX512,FUTURE
+VPEXPANDD       ymmreg|mask|z,mem256                rm:t1s: evex.256.66.0f38.w0 89 /r  AVX512VL,AVX512,FUTURE
+VPEXPANDD       zmmreg|mask|z,mem512                rm:t1s: evex.512.66.0f38.w0 89 /r  AVX512,FUTURE
+VPEXPANDD       xmmreg|mask|z,xmmreg                rm:t1s: evex.128.66.0f38.w0 89 /r  AVX512VL,AVX512,FUTURE
+VPEXPANDD       ymmreg|mask|z,ymmreg                rm:t1s: evex.256.66.0f38.w0 89 /r  AVX512VL,AVX512,FUTURE
+VPEXPANDD       zmmreg|mask|z,zmmreg                rm:t1s: evex.512.66.0f38.w0 89 /r  AVX512,FUTURE
+VPEXPANDQ       xmmreg|mask|z,mem128                rm:t1s: evex.128.66.0f38.w1 89 /r  AVX512VL,AVX512,FUTURE
+VPEXPANDQ       ymmreg|mask|z,mem256                rm:t1s: evex.256.66.0f38.w1 89 /r  AVX512VL,AVX512,FUTURE
+VPEXPANDQ       zmmreg|mask|z,mem512                rm:t1s: evex.512.66.0f38.w1 89 /r  AVX512,FUTURE
+VPEXPANDQ       xmmreg|mask|z,xmmreg                rm:t1s: evex.128.66.0f38.w1 89 /r  AVX512VL,AVX512,FUTURE
+VPEXPANDQ       ymmreg|mask|z,ymmreg                rm:t1s: evex.256.66.0f38.w1 89 /r  AVX512VL,AVX512,FUTURE
+VPEXPANDQ       zmmreg|mask|z,zmmreg                rm:t1s: evex.512.66.0f38.w1 89 /r  AVX512,FUTURE
+VPEXTRB         reg8,xmmreg,imm8                    mri:t1s8: evex.128.66.0f3a.wig 14 /r ib  AVX512BW,FUTURE
+VPEXTRB         reg16,xmmreg,imm8                   mri:t1s8: evex.128.66.0f3a.wig 14 /r ib  AVX512BW,FUTURE
+VPEXTRB         reg32,xmmreg,imm8                   mri:t1s8: evex.128.66.0f3a.wig 14 /r ib  AVX512BW,FUTURE
+VPEXTRB         reg64,xmmreg,imm8                   mri:t1s8: evex.128.66.0f3a.wig 14 /r ib  AVX512BW,FUTURE
+VPEXTRB         mem8,xmmreg,imm8                    mri:t1s8: evex.128.66.0f3a.wig 14 /r ib  AVX512BW,FUTURE
+VPEXTRD         rm32,xmmreg,imm8                    mri:t1s: evex.128.66.0f3a.w0 16 /r ib  AVX512DQ,FUTURE
+VPEXTRQ         rm64,xmmreg,imm8                    mri:t1s: evex.128.66.0f3a.w1 16 /r ib  AVX512DQ,FUTURE
+VPEXTRW         reg16,xmmreg,imm8                   mri:t1s16: evex.128.66.0f3a.wig 15 /r ib  AVX512BW,FUTURE
+VPEXTRW         reg32,xmmreg,imm8                   mri:t1s16: evex.128.66.0f3a.wig 15 /r ib  AVX512BW,FUTURE
+VPEXTRW         reg64,xmmreg,imm8                   mri:t1s16: evex.128.66.0f3a.wig 15 /r ib  AVX512BW,FUTURE
+VPEXTRW         mem16,xmmreg,imm8                   mri:t1s16: evex.128.66.0f3a.wig 15 /r ib  AVX512BW,FUTURE
+VPEXTRW         reg16,xmmreg,imm8                   rmi: evex.128.66.0f.wig c5 /r ib  AVX512BW,FUTURE
+VPEXTRW         reg32,xmmreg,imm8                   rmi: evex.128.66.0f.wig c5 /r ib  AVX512BW,FUTURE
+VPEXTRW         reg64,xmmreg,imm8                   rmi: evex.128.66.0f.wig c5 /r ib  AVX512BW,FUTURE
+VPGATHERDD      xmmreg|mask,xmem32                  rm:t1s: vsibx evex.128.66.0f38.w0 90 /r  AVX512VL,AVX512,FUTURE
+VPGATHERDD      ymmreg|mask,ymem32                  rm:t1s: vsiby evex.256.66.0f38.w0 90 /r  AVX512VL,AVX512,FUTURE
+VPGATHERDD      zmmreg|mask,zmem32                  rm:t1s: vsibz evex.512.66.0f38.w0 90 /r  AVX512,FUTURE
+VPGATHERDQ      xmmreg|mask,xmem64                  rm:t1s: vsibx evex.128.66.0f38.w1 90 /r  AVX512VL,AVX512,FUTURE
+VPGATHERDQ      ymmreg|mask,xmem64                  rm:t1s: vsibx evex.256.66.0f38.w1 90 /r  AVX512VL,AVX512,FUTURE
+VPGATHERDQ      zmmreg|mask,ymem64                  rm:t1s: vsiby evex.512.66.0f38.w1 90 /r  AVX512,FUTURE
+VPGATHERQD      xmmreg|mask,xmem32                  rm:t1s: vsibx evex.128.66.0f38.w0 91 /r  AVX512VL,AVX512,FUTURE
+VPGATHERQD      xmmreg|mask,ymem32                  rm:t1s: vsiby evex.256.66.0f38.w0 91 /r  AVX512VL,AVX512,FUTURE
+VPGATHERQD      ymmreg|mask,zmem32                  rm:t1s: vsibz evex.512.66.0f38.w0 91 /r  AVX512,FUTURE
+VPGATHERQQ      xmmreg|mask,xmem64                  rm:t1s: vsibx evex.128.66.0f38.w1 91 /r  AVX512VL,AVX512,FUTURE
+VPGATHERQQ      ymmreg|mask,ymem64                  rm:t1s: vsiby evex.256.66.0f38.w1 91 /r  AVX512VL,AVX512,FUTURE
+VPGATHERQQ      zmmreg|mask,zmem64                  rm:t1s: vsibz evex.512.66.0f38.w1 91 /r  AVX512,FUTURE
+VPINSRB         xmmreg,xmmreg*,reg32,imm8           rvmi:t1s8: evex.nds.128.66.0f3a.wig 20 /r ib  AVX512BW,FUTURE
+VPINSRB         xmmreg,xmmreg*,mem8,imm8            rvmi:t1s8: evex.nds.128.66.0f3a.wig 20 /r ib  AVX512BW,FUTURE
+VPINSRD         xmmreg,xmmreg*,rm32,imm8            rvmi:t1s: evex.nds.128.66.0f3a.w0 22 /r ib  AVX512DQ,FUTURE
+VPINSRQ         xmmreg,xmmreg*,rm64,imm8            rvmi:t1s: evex.nds.128.66.0f3a.w1 22 /r ib  AVX512DQ,FUTURE
+VPINSRW         xmmreg,xmmreg*,reg32,imm8           rvmi:t1s16: evex.nds.128.66.0f.wig c4 /r ib  AVX512BW,FUTURE
+VPINSRW         xmmreg,xmmreg*,mem16,imm8           rvmi:t1s16: evex.nds.128.66.0f.wig c4 /r ib  AVX512BW,FUTURE
+VPLZCNTD        xmmreg|mask|z,xmmrm128|b32          rm:fv: evex.128.66.0f38.w0 44 /r  AVX512VL,AVX512CD,FUTURE
+VPLZCNTD        ymmreg|mask|z,ymmrm256|b32          rm:fv: evex.256.66.0f38.w0 44 /r  AVX512VL,AVX512CD,FUTURE
+VPLZCNTD        zmmreg|mask|z,zmmrm512|b32          rm:fv: evex.512.66.0f38.w0 44 /r  AVX512CD,FUTURE
+VPLZCNTQ        xmmreg|mask|z,xmmrm128|b64          rm:fv: evex.128.66.0f38.w1 44 /r  AVX512VL,AVX512CD,FUTURE
+VPLZCNTQ        ymmreg|mask|z,ymmrm256|b64          rm:fv: evex.256.66.0f38.w1 44 /r  AVX512VL,AVX512CD,FUTURE
+VPLZCNTQ        zmmreg|mask|z,zmmrm512|b64          rm:fv: evex.512.66.0f38.w1 44 /r  AVX512CD,FUTURE
+VPMADD52HUQ     xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 b5 /r  AVX512VL,AVX512IFMA,FUTURE
+VPMADD52HUQ     ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 b5 /r  AVX512VL,AVX512IFMA,FUTURE
+VPMADD52HUQ     zmmreg|mask|z,zmmreg,zmmrm512|b64   rvm:fv: evex.nds.512.66.0f38.w1 b5 /r  AVX512IFMA,FUTURE
+VPMADD52LUQ     xmmreg|mask|z,xmmreg,xmmrm128|b64   rvm:fv: evex.nds.128.66.0f38.w1 b4 /r  AVX512VL,AVX512IFMA,FUTURE
+VPMADD52LUQ     ymmreg|mask|z,ymmreg,ymmrm256|b64   rvm:fv: evex.nds.256.66.0f38.w1 b4 /r  AVX512VL,AVX512IFMA,FUTURE
+VPMADD52LUQ     zmmreg|mask|z,zmmreg,zmmrm512|b64   rvm:fv: evex.nds.512.66.0f38.w1 b4 /r  AVX512IFMA,FUTURE
+VPMADDUBSW      xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f38.wig 04 /r  AVX512VL,AVX512BW,FUTURE
+VPMADDUBSW      ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f38.wig 04 /r  AVX512VL,AVX512BW,FUTURE
+VPMADDUBSW      zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f38.wig 04 /r  AVX512BW,FUTURE
+VPMADDWD        xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig f5 /r  AVX512VL,AVX512BW,FUTURE
+VPMADDWD        ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig f5 /r  AVX512VL,AVX512BW,FUTURE
+VPMADDWD        zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig f5 /r  AVX512BW,FUTURE
+VPMAXSB         xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f38.wig 3c /r  AVX512VL,AVX512BW,FUTURE
+VPMAXSB         ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f38.wig 3c /r  AVX512VL,AVX512BW,FUTURE
+VPMAXSB         zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f38.wig 3c /r  AVX512BW,FUTURE
+VPMAXSD         xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.66.0f38.w0 3d /r  AVX512VL,AVX512,FUTURE
+VPMAXSD         ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.66.0f38.w0 3d /r  AVX512VL,AVX512,FUTURE
+VPMAXSD         zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.66.0f38.w0 3d /r  AVX512,FUTURE
+VPMAXSQ         xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f38.w1 3d /r  AVX512VL,AVX512,FUTURE
+VPMAXSQ         ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f38.w1 3d /r  AVX512VL,AVX512,FUTURE
+VPMAXSQ         zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f38.w1 3d /r  AVX512,FUTURE
+VPMAXSW         xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig ee /r  AVX512VL,AVX512BW,FUTURE
+VPMAXSW         ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig ee /r  AVX512VL,AVX512BW,FUTURE
+VPMAXSW         zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig ee /r  AVX512BW,FUTURE
+VPMAXUB         xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig de /r  AVX512VL,AVX512BW,FUTURE
+VPMAXUB         ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig de /r  AVX512VL,AVX512BW,FUTURE
+VPMAXUB         zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig de /r  AVX512BW,FUTURE
+VPMAXUD         xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.66.0f38.w0 3f /r  AVX512VL,AVX512,FUTURE
+VPMAXUD         ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.66.0f38.w0 3f /r  AVX512VL,AVX512,FUTURE
+VPMAXUD         zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.66.0f38.w0 3f /r  AVX512,FUTURE
+VPMAXUQ         xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f38.w1 3f /r  AVX512VL,AVX512,FUTURE
+VPMAXUQ         ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f38.w1 3f /r  AVX512VL,AVX512,FUTURE
+VPMAXUQ         zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f38.w1 3f /r  AVX512,FUTURE
+VPMAXUW         xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f38.wig 3e /r  AVX512VL,AVX512BW,FUTURE
+VPMAXUW         ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f38.wig 3e /r  AVX512VL,AVX512BW,FUTURE
+VPMAXUW         zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f38.wig 3e /r  AVX512BW,FUTURE
+VPMINSB         xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f38.wig 38 /r  AVX512VL,AVX512BW,FUTURE
+VPMINSB         ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f38.wig 38 /r  AVX512VL,AVX512BW,FUTURE
+VPMINSB         zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f38.wig 38 /r  AVX512BW,FUTURE
+VPMINSD         xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.66.0f38.w0 39 /r  AVX512VL,AVX512,FUTURE
+VPMINSD         ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.66.0f38.w0 39 /r  AVX512VL,AVX512,FUTURE
+VPMINSD         zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.66.0f38.w0 39 /r  AVX512,FUTURE
+VPMINSQ         xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f38.w1 39 /r  AVX512VL,AVX512,FUTURE
+VPMINSQ         ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f38.w1 39 /r  AVX512VL,AVX512,FUTURE
+VPMINSQ         zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f38.w1 39 /r  AVX512,FUTURE
+VPMINSW         xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig ea /r  AVX512VL,AVX512BW,FUTURE
+VPMINSW         ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig ea /r  AVX512VL,AVX512BW,FUTURE
+VPMINSW         zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig ea /r  AVX512BW,FUTURE
+VPMINUB         xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig da /r  AVX512VL,AVX512BW,FUTURE
+VPMINUB         ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig da /r  AVX512VL,AVX512BW,FUTURE
+VPMINUB         zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig da /r  AVX512BW,FUTURE
+VPMINUD         xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.66.0f38.w0 3b /r  AVX512VL,AVX512,FUTURE
+VPMINUD         ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.66.0f38.w0 3b /r  AVX512VL,AVX512,FUTURE
+VPMINUD         zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.66.0f38.w0 3b /r  AVX512,FUTURE
+VPMINUQ         xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f38.w1 3b /r  AVX512VL,AVX512,FUTURE
+VPMINUQ         ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f38.w1 3b /r  AVX512VL,AVX512,FUTURE
+VPMINUQ         zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f38.w1 3b /r  AVX512,FUTURE
+VPMINUW         xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f38.wig 3a /r  AVX512VL,AVX512BW,FUTURE
+VPMINUW         ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f38.wig 3a /r  AVX512VL,AVX512BW,FUTURE
+VPMINUW         zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f38.wig 3a /r  AVX512BW,FUTURE
+VPMOVB2M        kreg,xmmreg                         rm: evex.128.f3.0f38.w0 29 /r  AVX512VL,AVX512BW,FUTURE
+VPMOVB2M        kreg,ymmreg                         rm: evex.256.f3.0f38.w0 29 /r  AVX512VL,AVX512BW,FUTURE
+VPMOVB2M        kreg,zmmreg                         rm: evex.512.f3.0f38.w0 29 /r  AVX512BW,FUTURE
+VPMOVD2M        kreg,xmmreg                         rm: evex.128.f3.0f38.w0 39 /r  AVX512VL,AVX512DQ,FUTURE
+VPMOVD2M        kreg,ymmreg                         rm: evex.256.f3.0f38.w0 39 /r  AVX512VL,AVX512DQ,FUTURE
+VPMOVD2M        kreg,zmmreg                         rm: evex.512.f3.0f38.w0 39 /r  AVX512DQ,FUTURE
+VPMOVDB         xmmreg|mask|z,xmmreg                mr: evex.128.f3.0f38.w0 31 /r  AVX512VL,AVX512,FUTURE
+VPMOVDB         xmmreg|mask|z,ymmreg                mr: evex.256.f3.0f38.w0 31 /r  AVX512VL,AVX512,FUTURE
+VPMOVDB         xmmreg|mask|z,zmmreg                mr: evex.512.f3.0f38.w0 31 /r  AVX512,FUTURE
+VPMOVDB         mem32|mask,xmmreg                   mr:qvm: evex.128.f3.0f38.w0 31 /r  AVX512VL,AVX512,FUTURE
+VPMOVDB         mem64|mask,ymmreg                   mr:qvm: evex.256.f3.0f38.w0 31 /r  AVX512VL,AVX512,FUTURE
+VPMOVDB         mem128|mask,zmmreg                  mr:qvm: evex.512.f3.0f38.w0 31 /r  AVX512,FUTURE
+VPMOVDW         xmmreg|mask|z,xmmreg                mr: evex.128.f3.0f38.w0 33 /r  AVX512VL,AVX512,FUTURE
+VPMOVDW         xmmreg|mask|z,ymmreg                mr: evex.256.f3.0f38.w0 33 /r  AVX512VL,AVX512,FUTURE
+VPMOVDW         ymmreg|mask|z,zmmreg                mr: evex.512.f3.0f38.w0 33 /r  AVX512,FUTURE
+VPMOVDW         mem64|mask,xmmreg                   mr:hvm: evex.128.f3.0f38.w0 33 /r  AVX512VL,AVX512,FUTURE
+VPMOVDW         mem128|mask,ymmreg                  mr:hvm: evex.256.f3.0f38.w0 33 /r  AVX512VL,AVX512,FUTURE
+VPMOVDW         mem256|mask,zmmreg                  mr:hvm: evex.512.f3.0f38.w0 33 /r  AVX512,FUTURE
+VPMOVM2B        xmmreg,kreg                         rm: evex.128.f3.0f38.w0 28 /r  AVX512VL,AVX512BW,FUTURE
+VPMOVM2B        ymmreg,kreg                         rm: evex.256.f3.0f38.w0 28 /r  AVX512VL,AVX512BW,FUTURE
+VPMOVM2B        zmmreg,kreg                         rm: evex.512.f3.0f38.w0 28 /r  AVX512BW,FUTURE
+VPMOVM2D        xmmreg,kreg                         rm: evex.128.f3.0f38.w0 38 /r  AVX512VL,AVX512DQ,FUTURE
+VPMOVM2D        ymmreg,kreg                         rm: evex.256.f3.0f38.w0 38 /r  AVX512VL,AVX512DQ,FUTURE
+VPMOVM2D        zmmreg,kreg                         rm: evex.512.f3.0f38.w0 38 /r  AVX512DQ,FUTURE
+VPMOVM2Q        xmmreg,kreg                         rm: evex.128.f3.0f38.w1 38 /r  AVX512VL,AVX512DQ,FUTURE
+VPMOVM2Q        ymmreg,kreg                         rm: evex.256.f3.0f38.w1 38 /r  AVX512VL,AVX512DQ,FUTURE
+VPMOVM2Q        zmmreg,kreg                         rm: evex.512.f3.0f38.w1 38 /r  AVX512DQ,FUTURE
+VPMOVM2W        xmmreg,kreg                         rm: evex.128.f3.0f38.w1 28 /r  AVX512VL,AVX512BW,FUTURE
+VPMOVM2W        ymmreg,kreg                         rm: evex.256.f3.0f38.w1 28 /r  AVX512VL,AVX512BW,FUTURE
+VPMOVM2W        zmmreg,kreg                         rm: evex.512.f3.0f38.w1 28 /r  AVX512BW,FUTURE
+VPMOVQ2M        kreg,xmmreg                         rm: evex.128.f3.0f38.w1 39 /r  AVX512VL,AVX512DQ,FUTURE
+VPMOVQ2M        kreg,ymmreg                         rm: evex.256.f3.0f38.w1 39 /r  AVX512VL,AVX512DQ,FUTURE
+VPMOVQ2M        kreg,zmmreg                         rm: evex.512.f3.0f38.w1 39 /r  AVX512DQ,FUTURE
+VPMOVQB         xmmreg|mask|z,xmmreg                mr: evex.128.f3.0f38.w0 32 /r  AVX512VL,AVX512,FUTURE
+VPMOVQB         xmmreg|mask|z,ymmreg                mr: evex.256.f3.0f38.w0 32 /r  AVX512VL,AVX512,FUTURE
+VPMOVQB         xmmreg|mask|z,zmmreg                mr: evex.512.f3.0f38.w0 32 /r  AVX512,FUTURE
+VPMOVQB         mem16|mask,xmmreg                   mr:ovm: evex.128.f3.0f38.w0 32 /r  AVX512VL,AVX512,FUTURE
+VPMOVQB         mem32|mask,ymmreg                   mr:ovm: evex.256.f3.0f38.w0 32 /r  AVX512VL,AVX512,FUTURE
+VPMOVQB         mem64|mask,zmmreg                   mr:ovm: evex.512.f3.0f38.w0 32 /r  AVX512,FUTURE
+VPMOVQD         xmmreg|mask|z,xmmreg                mr: evex.128.f3.0f38.w0 35 /r  AVX512VL,AVX512,FUTURE
+VPMOVQD         xmmreg|mask|z,ymmreg                mr: evex.256.f3.0f38.w0 35 /r  AVX512VL,AVX512,FUTURE
+VPMOVQD         ymmreg|mask|z,zmmreg                mr: evex.512.f3.0f38.w0 35 /r  AVX512,FUTURE
+VPMOVQD         mem64|mask,xmmreg                   mr:hvm: evex.128.f3.0f38.w0 35 /r  AVX512VL,AVX512,FUTURE
+VPMOVQD         mem128|mask,ymmreg                  mr:hvm: evex.256.f3.0f38.w0 35 /r  AVX512VL,AVX512,FUTURE
+VPMOVQD         mem256|mask,zmmreg                  mr:hvm: evex.512.f3.0f38.w0 35 /r  AVX512,FUTURE
+VPMOVQW         xmmreg|mask|z,xmmreg                mr: evex.128.f3.0f38.w0 34 /r  AVX512VL,AVX512,FUTURE
+VPMOVQW         xmmreg|mask|z,ymmreg                mr: evex.256.f3.0f38.w0 34 /r  AVX512VL,AVX512,FUTURE
+VPMOVQW         xmmreg|mask|z,zmmreg                mr: evex.512.f3.0f38.w0 34 /r  AVX512,FUTURE
+VPMOVQW         mem32|mask,xmmreg                   mr:qvm: evex.128.f3.0f38.w0 34 /r  AVX512VL,AVX512,FUTURE
+VPMOVQW         mem64|mask,ymmreg                   mr:qvm: evex.256.f3.0f38.w0 34 /r  AVX512VL,AVX512,FUTURE
+VPMOVQW         mem128|mask,zmmreg                  mr:qvm: evex.512.f3.0f38.w0 34 /r  AVX512,FUTURE
+VPMOVSDB        xmmreg|mask|z,xmmreg                mr: evex.128.f3.0f38.w0 21 /r  AVX512VL,AVX512,FUTURE
+VPMOVSDB        xmmreg|mask|z,ymmreg                mr: evex.256.f3.0f38.w0 21 /r  AVX512VL,AVX512,FUTURE
+VPMOVSDB        xmmreg|mask|z,zmmreg                mr: evex.512.f3.0f38.w0 21 /r  AVX512,FUTURE
+VPMOVSDB        mem32|mask,xmmreg                   mr:qvm: evex.128.f3.0f38.w0 21 /r  AVX512VL,AVX512,FUTURE
+VPMOVSDB        mem64|mask,ymmreg                   mr:qvm: evex.256.f3.0f38.w0 21 /r  AVX512VL,AVX512,FUTURE
+VPMOVSDB        mem128|mask,zmmreg                  mr:qvm: evex.512.f3.0f38.w0 21 /r  AVX512,FUTURE
+VPMOVSDW        xmmreg|mask|z,xmmreg                mr: evex.128.f3.0f38.w0 23 /r  AVX512VL,AVX512,FUTURE
+VPMOVSDW        xmmreg|mask|z,ymmreg                mr: evex.256.f3.0f38.w0 23 /r  AVX512VL,AVX512,FUTURE
+VPMOVSDW        ymmreg|mask|z,zmmreg                mr: evex.512.f3.0f38.w0 23 /r  AVX512,FUTURE
+VPMOVSDW        mem64|mask,xmmreg                   mr:hvm: evex.128.f3.0f38.w0 23 /r  AVX512VL,AVX512,FUTURE
+VPMOVSDW        mem128|mask,ymmreg                  mr:hvm: evex.256.f3.0f38.w0 23 /r  AVX512VL,AVX512,FUTURE
+VPMOVSDW        mem256|mask,zmmreg                  mr:hvm: evex.512.f3.0f38.w0 23 /r  AVX512,FUTURE
+VPMOVSQB        xmmreg|mask|z,xmmreg                mr: evex.128.f3.0f38.w0 22 /r  AVX512VL,AVX512,FUTURE
+VPMOVSQB        xmmreg|mask|z,ymmreg                mr: evex.256.f3.0f38.w0 22 /r  AVX512VL,AVX512,FUTURE
+VPMOVSQB        xmmreg|mask|z,zmmreg                mr: evex.512.f3.0f38.w0 22 /r  AVX512,FUTURE
+VPMOVSQB        mem16|mask,xmmreg                   mr:ovm: evex.128.f3.0f38.w0 22 /r  AVX512VL,AVX512,FUTURE
+VPMOVSQB        mem32|mask,ymmreg                   mr:ovm: evex.256.f3.0f38.w0 22 /r  AVX512VL,AVX512,FUTURE
+VPMOVSQB        mem64|mask,zmmreg                   mr:ovm: evex.512.f3.0f38.w0 22 /r  AVX512,FUTURE
+VPMOVSQD        xmmreg|mask|z,xmmreg                mr: evex.128.f3.0f38.w0 25 /r  AVX512VL,AVX512,FUTURE
+VPMOVSQD        xmmreg|mask|z,ymmreg                mr: evex.256.f3.0f38.w0 25 /r  AVX512VL,AVX512,FUTURE
+VPMOVSQD        ymmreg|mask|z,zmmreg                mr: evex.512.f3.0f38.w0 25 /r  AVX512,FUTURE
+VPMOVSQD        mem64|mask,xmmreg                   mr:hvm: evex.128.f3.0f38.w0 25 /r  AVX512VL,AVX512,FUTURE
+VPMOVSQD        mem128|mask,ymmreg                  mr:hvm: evex.256.f3.0f38.w0 25 /r  AVX512VL,AVX512,FUTURE
+VPMOVSQD        mem256|mask,zmmreg                  mr:hvm: evex.512.f3.0f38.w0 25 /r  AVX512,FUTURE
+VPMOVSQW        xmmreg|mask|z,xmmreg                mr: evex.128.f3.0f38.w0 24 /r  AVX512VL,AVX512,FUTURE
+VPMOVSQW        xmmreg|mask|z,ymmreg                mr: evex.256.f3.0f38.w0 24 /r  AVX512VL,AVX512,FUTURE
+VPMOVSQW        xmmreg|mask|z,zmmreg                mr: evex.512.f3.0f38.w0 24 /r  AVX512,FUTURE
+VPMOVSQW        mem32|mask,xmmreg                   mr:qvm: evex.128.f3.0f38.w0 24 /r  AVX512VL,AVX512,FUTURE
+VPMOVSQW        mem64|mask,ymmreg                   mr:qvm: evex.256.f3.0f38.w0 24 /r  AVX512VL,AVX512,FUTURE
+VPMOVSQW        mem128|mask,zmmreg                  mr:qvm: evex.512.f3.0f38.w0 24 /r  AVX512,FUTURE
+VPMOVSWB        xmmreg|mask|z,xmmreg                mr: evex.128.f3.0f38.w0 20 /r  AVX512VL,AVX512BW,FUTURE
+VPMOVSWB        xmmreg|mask|z,ymmreg                mr: evex.256.f3.0f38.w0 20 /r  AVX512VL,AVX512BW,FUTURE
+VPMOVSWB        ymmreg|mask|z,zmmreg                mr: evex.512.f3.0f38.w0 20 /r  AVX512BW,FUTURE
+VPMOVSWB        mem64|mask,xmmreg                   mr:hvm: evex.128.f3.0f38.w0 20 /r  AVX512VL,AVX512BW,FUTURE
+VPMOVSWB        mem128|mask,ymmreg                  mr:hvm: evex.256.f3.0f38.w0 20 /r  AVX512VL,AVX512BW,FUTURE
+VPMOVSWB        mem256|mask,zmmreg                  mr:hvm: evex.512.f3.0f38.w0 20 /r  AVX512BW,FUTURE
+VPMOVSXBD       xmmreg|mask|z,xmmrm32               rm:qvm: evex.128.66.0f38.wig 21 /r  AVX512VL,AVX512,FUTURE
+VPMOVSXBD       ymmreg|mask|z,xmmrm64               rm:qvm: evex.256.66.0f38.wig 21 /r  AVX512VL,AVX512,FUTURE
+VPMOVSXBD       zmmreg|mask|z,xmmrm128              rm:qvm: evex.512.66.0f38.wig 21 /r  AVX512,FUTURE
+VPMOVSXBQ       xmmreg|mask|z,xmmrm16               rm:ovm: evex.128.66.0f38.wig 22 /r  AVX512VL,AVX512,FUTURE
+VPMOVSXBQ       ymmreg|mask|z,xmmrm32               rm:ovm: evex.256.66.0f38.wig 22 /r  AVX512VL,AVX512,FUTURE
+VPMOVSXBQ       zmmreg|mask|z,xmmrm64               rm:ovm: evex.512.66.0f38.wig 22 /r  AVX512,FUTURE
+VPMOVSXBW       xmmreg|mask|z,xmmrm64               rm:hvm: evex.128.66.0f38.wig 20 /r  AVX512VL,AVX512BW,FUTURE
+VPMOVSXBW       ymmreg|mask|z,xmmrm128              rm:hvm: evex.256.66.0f38.wig 20 /r  AVX512VL,AVX512BW,FUTURE
+VPMOVSXBW       zmmreg|mask|z,ymmrm256              rm:hvm: evex.512.66.0f38.wig 20 /r  AVX512BW,FUTURE
+VPMOVSXDQ       xmmreg|mask|z,xmmrm64               rm:hvm: evex.128.66.0f38.w0 25 /r  AVX512VL,AVX512,FUTURE
+VPMOVSXDQ       ymmreg|mask|z,xmmrm128              rm:hvm: evex.256.66.0f38.w0 25 /r  AVX512VL,AVX512,FUTURE
+VPMOVSXDQ       zmmreg|mask|z,ymmrm256              rm:hvm: evex.512.66.0f38.w0 25 /r  AVX512,FUTURE
+VPMOVSXWD       xmmreg|mask|z,xmmrm64               rm:hvm: evex.128.66.0f38.wig 23 /r  AVX512VL,AVX512,FUTURE
+VPMOVSXWD       ymmreg|mask|z,xmmrm128              rm:hvm: evex.256.66.0f38.wig 23 /r  AVX512VL,AVX512,FUTURE
+VPMOVSXWD       zmmreg|mask|z,ymmrm256              rm:hvm: evex.512.66.0f38.wig 23 /r  AVX512,FUTURE
+VPMOVSXWQ       xmmreg|mask|z,xmmrm32               rm:qvm: evex.128.66.0f38.wig 24 /r  AVX512VL,AVX512,FUTURE
+VPMOVSXWQ       ymmreg|mask|z,xmmrm64               rm:qvm: evex.256.66.0f38.wig 24 /r  AVX512VL,AVX512,FUTURE
+VPMOVSXWQ       zmmreg|mask|z,xmmrm128              rm:qvm: evex.512.66.0f38.wig 24 /r  AVX512,FUTURE
+VPMOVUSDB       xmmreg|mask|z,xmmreg                mr: evex.128.f3.0f38.w0 11 /r  AVX512VL,AVX512,FUTURE
+VPMOVUSDB       xmmreg|mask|z,ymmreg                mr: evex.256.f3.0f38.w0 11 /r  AVX512VL,AVX512,FUTURE
+VPMOVUSDB       xmmreg|mask|z,zmmreg                mr: evex.512.f3.0f38.w0 11 /r  AVX512,FUTURE
+VPMOVUSDB       mem32|mask,xmmreg                   mr:qvm: evex.128.f3.0f38.w0 11 /r  AVX512VL,AVX512,FUTURE
+VPMOVUSDB       mem64|mask,ymmreg                   mr:qvm: evex.256.f3.0f38.w0 11 /r  AVX512VL,AVX512,FUTURE
+VPMOVUSDB       mem128|mask,zmmreg                  mr:qvm: evex.512.f3.0f38.w0 11 /r  AVX512,FUTURE
+VPMOVUSDW       xmmreg|mask|z,xmmreg                mr: evex.128.f3.0f38.w0 13 /r  AVX512VL,AVX512,FUTURE
+VPMOVUSDW       xmmreg|mask|z,ymmreg                mr: evex.256.f3.0f38.w0 13 /r  AVX512VL,AVX512,FUTURE
+VPMOVUSDW       ymmreg|mask|z,zmmreg                mr: evex.512.f3.0f38.w0 13 /r  AVX512,FUTURE
+VPMOVUSDW       mem64|mask,xmmreg                   mr:hvm: evex.128.f3.0f38.w0 13 /r  AVX512VL,AVX512,FUTURE
+VPMOVUSDW       mem128|mask,ymmreg                  mr:hvm: evex.256.f3.0f38.w0 13 /r  AVX512VL,AVX512,FUTURE
+VPMOVUSDW       mem256|mask,zmmreg                  mr:hvm: evex.512.f3.0f38.w0 13 /r  AVX512,FUTURE
+VPMOVUSQB       xmmreg|mask|z,xmmreg                mr: evex.128.f3.0f38.w0 12 /r  AVX512VL,AVX512,FUTURE
+VPMOVUSQB       xmmreg|mask|z,ymmreg                mr: evex.256.f3.0f38.w0 12 /r  AVX512VL,AVX512,FUTURE
+VPMOVUSQB       xmmreg|mask|z,zmmreg                mr: evex.512.f3.0f38.w0 12 /r  AVX512,FUTURE
+VPMOVUSQB       mem16|mask,xmmreg                   mr:ovm: evex.128.f3.0f38.w0 12 /r  AVX512VL,AVX512,FUTURE
+VPMOVUSQB       mem32|mask,ymmreg                   mr:ovm: evex.256.f3.0f38.w0 12 /r  AVX512VL,AVX512,FUTURE
+VPMOVUSQB       mem64|mask,zmmreg                   mr:ovm: evex.512.f3.0f38.w0 12 /r  AVX512,FUTURE
+VPMOVUSQD       xmmreg|mask|z,xmmreg                mr: evex.128.f3.0f38.w0 15 /r  AVX512VL,AVX512,FUTURE
+VPMOVUSQD       xmmreg|mask|z,ymmreg                mr: evex.256.f3.0f38.w0 15 /r  AVX512VL,AVX512,FUTURE
+VPMOVUSQD       ymmreg|mask|z,zmmreg                mr: evex.512.f3.0f38.w0 15 /r  AVX512,FUTURE
+VPMOVUSQD       mem64|mask,xmmreg                   mr:hvm: evex.128.f3.0f38.w0 15 /r  AVX512VL,AVX512,FUTURE
+VPMOVUSQD       mem128|mask,ymmreg                  mr:hvm: evex.256.f3.0f38.w0 15 /r  AVX512VL,AVX512,FUTURE
+VPMOVUSQD       mem256|mask,zmmreg                  mr:hvm: evex.512.f3.0f38.w0 15 /r  AVX512,FUTURE
+VPMOVUSQW       xmmreg|mask|z,xmmreg                mr: evex.128.f3.0f38.w0 14 /r  AVX512VL,AVX512,FUTURE
+VPMOVUSQW       xmmreg|mask|z,ymmreg                mr: evex.256.f3.0f38.w0 14 /r  AVX512VL,AVX512,FUTURE
+VPMOVUSQW       xmmreg|mask|z,zmmreg                mr: evex.512.f3.0f38.w0 14 /r  AVX512,FUTURE
+VPMOVUSQW       mem32|mask,xmmreg                   mr:qvm: evex.128.f3.0f38.w0 14 /r  AVX512VL,AVX512,FUTURE
+VPMOVUSQW       mem64|mask,ymmreg                   mr:qvm: evex.256.f3.0f38.w0 14 /r  AVX512VL,AVX512,FUTURE
+VPMOVUSQW       mem128|mask,zmmreg                  mr:qvm: evex.512.f3.0f38.w0 14 /r  AVX512,FUTURE
+VPMOVUSWB       xmmreg|mask|z,xmmreg                mr: evex.128.f3.0f38.w0 10 /r  AVX512VL,AVX512BW,FUTURE
+VPMOVUSWB       xmmreg|mask|z,ymmreg                mr: evex.256.f3.0f38.w0 10 /r  AVX512VL,AVX512BW,FUTURE
+VPMOVUSWB       ymmreg|mask|z,zmmreg                mr: evex.512.f3.0f38.w0 10 /r  AVX512BW,FUTURE
+VPMOVUSWB       mem64|mask,xmmreg                   mr:hvm: evex.128.f3.0f38.w0 10 /r  AVX512VL,AVX512BW,FUTURE
+VPMOVUSWB       mem128|mask,ymmreg                  mr:hvm: evex.256.f3.0f38.w0 10 /r  AVX512VL,AVX512BW,FUTURE
+VPMOVUSWB       mem256|mask,zmmreg                  mr:hvm: evex.512.f3.0f38.w0 10 /r  AVX512BW,FUTURE
+VPMOVW2M        kreg,xmmreg                         rm: evex.128.f3.0f38.w1 29 /r  AVX512VL,AVX512BW,FUTURE
+VPMOVW2M        kreg,ymmreg                         rm: evex.256.f3.0f38.w1 29 /r  AVX512VL,AVX512BW,FUTURE
+VPMOVW2M        kreg,zmmreg                         rm: evex.512.f3.0f38.w1 29 /r  AVX512BW,FUTURE
+VPMOVWB         xmmreg|mask|z,xmmreg                mr: evex.128.f3.0f38.w0 30 /r  AVX512VL,AVX512BW,FUTURE
+VPMOVWB         xmmreg|mask|z,ymmreg                mr: evex.256.f3.0f38.w0 30 /r  AVX512VL,AVX512BW,FUTURE
+VPMOVWB         ymmreg|mask|z,zmmreg                mr: evex.512.f3.0f38.w0 30 /r  AVX512BW,FUTURE
+VPMOVWB         mem64|mask,xmmreg                   mr:hvm: evex.128.f3.0f38.w0 30 /r  AVX512VL,AVX512BW,FUTURE
+VPMOVWB         mem128|mask,ymmreg                  mr:hvm: evex.256.f3.0f38.w0 30 /r  AVX512VL,AVX512BW,FUTURE
+VPMOVWB         mem256|mask,zmmreg                  mr:hvm: evex.512.f3.0f38.w0 30 /r  AVX512BW,FUTURE
+VPMOVZXBD       xmmreg|mask|z,xmmrm32               rm:qvm: evex.128.66.0f38.wig 31 /r  AVX512VL,AVX512,FUTURE
+VPMOVZXBD       ymmreg|mask|z,xmmrm64               rm:qvm: evex.256.66.0f38.wig 31 /r  AVX512VL,AVX512,FUTURE
+VPMOVZXBD       zmmreg|mask|z,xmmrm128              rm:qvm: evex.512.66.0f38.wig 31 /r  AVX512,FUTURE
+VPMOVZXBQ       xmmreg|mask|z,xmmrm16               rm:ovm: evex.128.66.0f38.wig 32 /r  AVX512VL,AVX512,FUTURE
+VPMOVZXBQ       ymmreg|mask|z,xmmrm32               rm:ovm: evex.256.66.0f38.wig 32 /r  AVX512VL,AVX512,FUTURE
+VPMOVZXBQ       zmmreg|mask|z,xmmrm64               rm:ovm: evex.512.66.0f38.wig 32 /r  AVX512,FUTURE
+VPMOVZXBW       xmmreg|mask|z,xmmrm64               rm:hvm: evex.128.66.0f38.wig 30 /r  AVX512VL,AVX512BW,FUTURE
+VPMOVZXBW       ymmreg|mask|z,xmmrm128              rm:hvm: evex.256.66.0f38.wig 30 /r  AVX512VL,AVX512BW,FUTURE
+VPMOVZXBW       zmmreg|mask|z,ymmrm256              rm:hvm: evex.512.66.0f38.wig 30 /r  AVX512BW,FUTURE
+VPMOVZXDQ       xmmreg|mask|z,xmmrm64               rm:hvm: evex.128.66.0f38.w0 35 /r  AVX512VL,AVX512,FUTURE
+VPMOVZXDQ       ymmreg|mask|z,xmmrm128              rm:hvm: evex.256.66.0f38.w0 35 /r  AVX512VL,AVX512,FUTURE
+VPMOVZXDQ       zmmreg|mask|z,ymmrm256              rm:hvm: evex.512.66.0f38.w0 35 /r  AVX512,FUTURE
+VPMOVZXWD       xmmreg|mask|z,xmmrm64               rm:hvm: evex.128.66.0f38.wig 33 /r  AVX512VL,AVX512,FUTURE
+VPMOVZXWD       ymmreg|mask|z,xmmrm128              rm:hvm: evex.256.66.0f38.wig 33 /r  AVX512VL,AVX512,FUTURE
+VPMOVZXWD       zmmreg|mask|z,ymmrm256              rm:hvm: evex.512.66.0f38.wig 33 /r  AVX512,FUTURE
+VPMOVZXWQ       xmmreg|mask|z,xmmrm32               rm:qvm: evex.128.66.0f38.wig 34 /r  AVX512VL,AVX512,FUTURE
+VPMOVZXWQ       ymmreg|mask|z,xmmrm64               rm:qvm: evex.256.66.0f38.wig 34 /r  AVX512VL,AVX512,FUTURE
+VPMOVZXWQ       zmmreg|mask|z,xmmrm128              rm:qvm: evex.512.66.0f38.wig 34 /r  AVX512,FUTURE
+VPMULDQ         xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f38.w1 28 /r  AVX512VL,AVX512,FUTURE
+VPMULDQ         ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f38.w1 28 /r  AVX512VL,AVX512,FUTURE
+VPMULDQ         zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f38.w1 28 /r  AVX512,FUTURE
+VPMULHRSW       xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f38.wig 0b /r  AVX512VL,AVX512BW,FUTURE
+VPMULHRSW       ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f38.wig 0b /r  AVX512VL,AVX512BW,FUTURE
+VPMULHRSW       zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f38.wig 0b /r  AVX512BW,FUTURE
+VPMULHUW        xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig e4 /r  AVX512VL,AVX512BW,FUTURE
+VPMULHUW        ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig e4 /r  AVX512VL,AVX512BW,FUTURE
+VPMULHUW        zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig e4 /r  AVX512BW,FUTURE
+VPMULHW         xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig e5 /r  AVX512VL,AVX512BW,FUTURE
+VPMULHW         ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig e5 /r  AVX512VL,AVX512BW,FUTURE
+VPMULHW         zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig e5 /r  AVX512BW,FUTURE
+VPMULLD         xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.66.0f38.w0 40 /r  AVX512VL,AVX512,FUTURE
+VPMULLD         ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.66.0f38.w0 40 /r  AVX512VL,AVX512,FUTURE
+VPMULLD         zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.66.0f38.w0 40 /r  AVX512,FUTURE
+VPMULLQ         xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f38.w1 40 /r  AVX512VL,AVX512DQ,FUTURE
+VPMULLQ         ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f38.w1 40 /r  AVX512VL,AVX512DQ,FUTURE
+VPMULLQ         zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f38.w1 40 /r  AVX512DQ,FUTURE
+VPMULLW         xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig d5 /r  AVX512VL,AVX512BW,FUTURE
+VPMULLW         ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig d5 /r  AVX512VL,AVX512BW,FUTURE
+VPMULLW         zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig d5 /r  AVX512BW,FUTURE
+VPMULTISHIFTQB  xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f38.w1 83 /r  AVX512VL,AVX512VBMI,FUTURE
+VPMULTISHIFTQB  ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f38.w1 83 /r  AVX512VL,AVX512VBMI,FUTURE
+VPMULTISHIFTQB  zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f38.w1 83 /r  AVX512VBMI,FUTURE
+VPMULUDQ        xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f.w1 f4 /r  AVX512VL,AVX512,FUTURE
+VPMULUDQ        ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f.w1 f4 /r  AVX512VL,AVX512,FUTURE
+VPMULUDQ        zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f.w1 f4 /r  AVX512,FUTURE
+VPORD           xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.66.0f.w0 eb /r  AVX512VL,AVX512,FUTURE
+VPORD           ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.66.0f.w0 eb /r  AVX512VL,AVX512,FUTURE
+VPORD           zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.66.0f.w0 eb /r  AVX512,FUTURE
+VPORQ           xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f.w1 eb /r  AVX512VL,AVX512,FUTURE
+VPORQ           ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f.w1 eb /r  AVX512VL,AVX512,FUTURE
+VPORQ           zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f.w1 eb /r  AVX512,FUTURE
+VPROLD          xmmreg|mask|z,xmmrm128|b32*,imm8    vmi:fv: evex.nds.128.66.0f.w0 72 /1 ib  AVX512VL,AVX512,FUTURE
+VPROLD          ymmreg|mask|z,ymmrm256|b32*,imm8    vmi:fv: evex.nds.256.66.0f.w0 72 /1 ib  AVX512VL,AVX512,FUTURE
+VPROLD          zmmreg|mask|z,zmmrm512|b32*,imm8    vmi:fv: evex.nds.512.66.0f.w0 72 /1 ib  AVX512,FUTURE
+VPROLQ          xmmreg|mask|z,xmmrm128|b64*,imm8    vmi:fv: evex.nds.128.66.0f.w1 72 /1 ib  AVX512VL,AVX512,FUTURE
+VPROLQ          ymmreg|mask|z,ymmrm256|b64*,imm8    vmi:fv: evex.nds.256.66.0f.w1 72 /1 ib  AVX512VL,AVX512,FUTURE
+VPROLQ          zmmreg|mask|z,zmmrm512|b64*,imm8    vmi:fv: evex.nds.512.66.0f.w1 72 /1 ib  AVX512,FUTURE
+VPROLVD         xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.66.0f38.w0 15 /r  AVX512VL,AVX512,FUTURE
+VPROLVD         ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.66.0f38.w0 15 /r  AVX512VL,AVX512,FUTURE
+VPROLVD         zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.66.0f38.w0 15 /r  AVX512,FUTURE
+VPROLVQ         xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f38.w1 15 /r  AVX512VL,AVX512,FUTURE
+VPROLVQ         ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f38.w1 15 /r  AVX512VL,AVX512,FUTURE
+VPROLVQ         zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f38.w1 15 /r  AVX512,FUTURE
+VPRORD          xmmreg|mask|z,xmmrm128|b32*,imm8    vmi:fv: evex.nds.128.66.0f.w0 72 /0 ib  AVX512VL,AVX512,FUTURE
+VPRORD          ymmreg|mask|z,ymmrm256|b32*,imm8    vmi:fv: evex.nds.256.66.0f.w0 72 /0 ib  AVX512VL,AVX512,FUTURE
+VPRORD          zmmreg|mask|z,zmmrm512|b32*,imm8    vmi:fv: evex.nds.512.66.0f.w0 72 /0 ib  AVX512,FUTURE
+VPRORQ          xmmreg|mask|z,xmmrm128|b64*,imm8    vmi:fv: evex.nds.128.66.0f.w1 72 /0 ib  AVX512VL,AVX512,FUTURE
+VPRORQ          ymmreg|mask|z,ymmrm256|b64*,imm8    vmi:fv: evex.nds.256.66.0f.w1 72 /0 ib  AVX512VL,AVX512,FUTURE
+VPRORQ          zmmreg|mask|z,zmmrm512|b64*,imm8    vmi:fv: evex.nds.512.66.0f.w1 72 /0 ib  AVX512,FUTURE
+VPRORVD         xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.66.0f38.w0 14 /r  AVX512VL,AVX512,FUTURE
+VPRORVD         ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.66.0f38.w0 14 /r  AVX512VL,AVX512,FUTURE
+VPRORVD         zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.66.0f38.w0 14 /r  AVX512,FUTURE
+VPRORVQ         xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f38.w1 14 /r  AVX512VL,AVX512,FUTURE
+VPRORVQ         ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f38.w1 14 /r  AVX512VL,AVX512,FUTURE
+VPRORVQ         zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f38.w1 14 /r  AVX512,FUTURE
+VPSADBW         xmmreg,xmmreg*,xmmrm128             rvm:fvm: evex.nds.128.66.0f.wig f6 /r  AVX512VL,AVX512BW,FUTURE
+VPSADBW         ymmreg,ymmreg*,ymmrm256             rvm:fvm: evex.nds.256.66.0f.wig f6 /r  AVX512VL,AVX512BW,FUTURE
+VPSADBW         zmmreg,zmmreg*,zmmrm512             rvm:fvm: evex.nds.512.66.0f.wig f6 /r  AVX512BW,FUTURE
+VPSCATTERDD     xmem32|mask,xmmreg                  mr:t1s: vsibx evex.128.66.0f38.w0 a0 /r  AVX512VL,AVX512,FUTURE
+VPSCATTERDD     ymem32|mask,ymmreg                  mr:t1s: vsiby evex.256.66.0f38.w0 a0 /r  AVX512VL,AVX512,FUTURE
+VPSCATTERDD     zmem32|mask,zmmreg                  mr:t1s: vsibz evex.512.66.0f38.w0 a0 /r  AVX512,FUTURE
+VPSCATTERDQ     xmem64|mask,xmmreg                  mr:t1s: vsibx evex.128.66.0f38.w1 a0 /r  AVX512VL,AVX512,FUTURE
+VPSCATTERDQ     xmem64|mask,ymmreg                  mr:t1s: vsibx evex.256.66.0f38.w1 a0 /r  AVX512VL,AVX512,FUTURE
+VPSCATTERDQ     ymem64|mask,zmmreg                  mr:t1s: vsiby evex.512.66.0f38.w1 a0 /r  AVX512,FUTURE
+VPSCATTERQD     xmem32|mask,xmmreg                  mr:t1s: vsibx evex.128.66.0f38.w0 a1 /r  AVX512VL,AVX512,FUTURE
+VPSCATTERQD     ymem32|mask,xmmreg                  mr:t1s: vsiby evex.256.66.0f38.w0 a1 /r  AVX512VL,AVX512,FUTURE
+VPSCATTERQD     zmem32|mask,ymmreg                  mr:t1s: vsibz evex.512.66.0f38.w0 a1 /r  AVX512,FUTURE
+VPSCATTERQQ     xmem64|mask,xmmreg                  mr:t1s: vsibx evex.128.66.0f38.w1 a1 /r  AVX512VL,AVX512,FUTURE
+VPSCATTERQQ     ymem64|mask,ymmreg                  mr:t1s: vsiby evex.256.66.0f38.w1 a1 /r  AVX512VL,AVX512,FUTURE
+VPSCATTERQQ     zmem64|mask,zmmreg                  mr:t1s: vsibz evex.512.66.0f38.w1 a1 /r  AVX512,FUTURE
+VPSHUFB         xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f38.wig 00 /r  AVX512VL,AVX512BW,FUTURE
+VPSHUFB         ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f38.wig 00 /r  AVX512VL,AVX512BW,FUTURE
+VPSHUFB         zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f38.wig 00 /r  AVX512BW,FUTURE
+VPSHUFD         xmmreg|mask|z,xmmrm128|b32,imm8     rmi:fv: evex.128.66.0f.w0 70 /r ib  AVX512VL,AVX512,FUTURE
+VPSHUFD         ymmreg|mask|z,ymmrm256|b32,imm8     rmi:fv: evex.256.66.0f.w0 70 /r ib  AVX512VL,AVX512,FUTURE
+VPSHUFD         zmmreg|mask|z,zmmrm512|b32,imm8     rmi:fv: evex.512.66.0f.w0 70 /r ib  AVX512,FUTURE
+VPSHUFHW        xmmreg|mask|z,xmmrm128,imm8         rmi:fvm: evex.128.f3.0f.wig 70 /r ib  AVX512VL,AVX512BW,FUTURE
+VPSHUFHW        ymmreg|mask|z,ymmrm256,imm8         rmi:fvm: evex.256.f3.0f.wig 70 /r ib  AVX512VL,AVX512BW,FUTURE
+VPSHUFHW        zmmreg|mask|z,zmmrm512,imm8         rmi:fvm: evex.512.f3.0f.wig 70 /r ib  AVX512BW,FUTURE
+VPSHUFLW        xmmreg|mask|z,xmmrm128,imm8         rmi:fvm: evex.128.f2.0f.wig 70 /r ib  AVX512VL,AVX512BW,FUTURE
+VPSHUFLW        ymmreg|mask|z,ymmrm256,imm8         rmi:fvm: evex.256.f2.0f.wig 70 /r ib  AVX512VL,AVX512BW,FUTURE
+VPSHUFLW        zmmreg|mask|z,zmmrm512,imm8         rmi:fvm: evex.512.f2.0f.wig 70 /r ib  AVX512BW,FUTURE
+VPSLLD          xmmreg|mask|z,xmmreg*,xmmrm128      rvm:m128: evex.nds.128.66.0f.w0 f2 /r  AVX512VL,AVX512,FUTURE
+VPSLLD          ymmreg|mask|z,ymmreg*,xmmrm128      rvm:m128: evex.nds.256.66.0f.w0 f2 /r  AVX512VL,AVX512,FUTURE
+VPSLLD          zmmreg|mask|z,zmmreg*,xmmrm128      rvm:m128: evex.nds.512.66.0f.w0 f2 /r  AVX512,FUTURE
+VPSLLD          xmmreg|mask|z,xmmrm128|b32*,imm8    vmi:fv: evex.nds.128.66.0f.w0 72 /6 ib  AVX512VL,AVX512,FUTURE
+VPSLLD          ymmreg|mask|z,ymmrm256|b32*,imm8    vmi:fv: evex.nds.256.66.0f.w0 72 /6 ib  AVX512VL,AVX512,FUTURE
+VPSLLD          zmmreg|mask|z,zmmrm512|b32*,imm8    vmi:fv: evex.nds.512.66.0f.w0 72 /6 ib  AVX512,FUTURE
+VPSLLDQ         xmmreg,xmmrm128*,imm8               vmi:fvm: evex.nds.128.66.0f.wig 73 /7 ib  AVX512VL,AVX512BW,FUTURE
+VPSLLDQ         ymmreg,ymmrm256*,imm8               vmi:fvm: evex.nds.256.66.0f.wig 73 /7 ib  AVX512VL,AVX512BW,FUTURE
+VPSLLDQ         zmmreg,zmmrm512*,imm8               vmi:fvm: evex.nds.512.66.0f.wig 73 /7 ib  AVX512BW,FUTURE
+VPSLLQ          xmmreg|mask|z,xmmreg*,xmmrm128      rvm:m128: evex.nds.128.66.0f.w1 f3 /r  AVX512VL,AVX512,FUTURE
+VPSLLQ          ymmreg|mask|z,ymmreg*,xmmrm128      rvm:m128: evex.nds.256.66.0f.w1 f3 /r  AVX512VL,AVX512,FUTURE
+VPSLLQ          zmmreg|mask|z,zmmreg*,xmmrm128      rvm:m128: evex.nds.512.66.0f.w1 f3 /r  AVX512,FUTURE
+VPSLLQ          xmmreg|mask|z,xmmrm128|b64*,imm8    vmi:fv: evex.nds.128.66.0f.w1 73 /6 ib  AVX512VL,AVX512,FUTURE
+VPSLLQ          ymmreg|mask|z,ymmrm256|b64*,imm8    vmi:fv: evex.nds.256.66.0f.w1 73 /6 ib  AVX512VL,AVX512,FUTURE
+VPSLLQ          zmmreg|mask|z,zmmrm512|b64*,imm8    vmi:fv: evex.nds.512.66.0f.w1 73 /6 ib  AVX512,FUTURE
+VPSLLVD         xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.66.0f38.w0 47 /r  AVX512VL,AVX512,FUTURE
+VPSLLVD         ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.66.0f38.w0 47 /r  AVX512VL,AVX512,FUTURE
+VPSLLVD         zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.66.0f38.w0 47 /r  AVX512,FUTURE
+VPSLLVQ         xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f38.w1 47 /r  AVX512VL,AVX512,FUTURE
+VPSLLVQ         ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f38.w1 47 /r  AVX512VL,AVX512,FUTURE
+VPSLLVQ         zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f38.w1 47 /r  AVX512,FUTURE
+VPSLLVW         xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f38.w1 12 /r  AVX512VL,AVX512BW,FUTURE
+VPSLLVW         ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f38.w1 12 /r  AVX512VL,AVX512BW,FUTURE
+VPSLLVW         zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f38.w1 12 /r  AVX512BW,FUTURE
+VPSLLW          xmmreg|mask|z,xmmreg*,xmmrm128      rvm:m128: evex.nds.128.66.0f.wig f1 /r  AVX512VL,AVX512BW,FUTURE
+VPSLLW          ymmreg|mask|z,ymmreg*,xmmrm128      rvm:m128: evex.nds.256.66.0f.wig f1 /r  AVX512VL,AVX512BW,FUTURE
+VPSLLW          zmmreg|mask|z,zmmreg*,xmmrm128      rvm:m128: evex.nds.512.66.0f.wig f1 /r  AVX512BW,FUTURE
+VPSLLW          xmmreg|mask|z,xmmrm128*,imm8        vmi:fvm: evex.nds.128.66.0f.wig 71 /6 ib  AVX512VL,AVX512BW,FUTURE
+VPSLLW          ymmreg|mask|z,ymmrm256*,imm8        vmi:fvm: evex.nds.256.66.0f.wig 71 /6 ib  AVX512VL,AVX512BW,FUTURE
+VPSLLW          zmmreg|mask|z,zmmrm512*,imm8        vmi:fvm: evex.nds.512.66.0f.wig 71 /6 ib  AVX512BW,FUTURE
+VPSRAD          xmmreg|mask|z,xmmreg*,xmmrm128      rvm:m128: evex.nds.128.66.0f.w0 e2 /r  AVX512VL,AVX512,FUTURE
+VPSRAD          ymmreg|mask|z,ymmreg*,xmmrm128      rvm:m128: evex.nds.256.66.0f.w0 e2 /r  AVX512VL,AVX512,FUTURE
+VPSRAD          zmmreg|mask|z,zmmreg*,xmmrm128      rvm:m128: evex.nds.512.66.0f.w0 e2 /r  AVX512,FUTURE
+VPSRAD          xmmreg|mask|z,xmmrm128|b32*,imm8    vmi:fv: evex.nds.128.66.0f.w0 72 /4 ib  AVX512VL,AVX512,FUTURE
+VPSRAD          ymmreg|mask|z,ymmrm256|b32*,imm8    vmi:fv: evex.nds.256.66.0f.w0 72 /4 ib  AVX512VL,AVX512,FUTURE
+VPSRAD          zmmreg|mask|z,zmmrm512|b32*,imm8    vmi:fv: evex.nds.512.66.0f.w0 72 /4 ib  AVX512,FUTURE
+VPSRAQ          xmmreg|mask|z,xmmreg*,xmmrm128      rvm:m128: evex.nds.128.66.0f.w1 e2 /r  AVX512VL,AVX512,FUTURE
+VPSRAQ          ymmreg|mask|z,ymmreg*,xmmrm128      rvm:m128: evex.nds.256.66.0f.w1 e2 /r  AVX512VL,AVX512,FUTURE
+VPSRAQ          zmmreg|mask|z,zmmreg*,xmmrm128      rvm:m128: evex.nds.512.66.0f.w1 e2 /r  AVX512,FUTURE
+VPSRAQ          xmmreg|mask|z,xmmrm128|b64*,imm8    vmi:fv: evex.nds.128.66.0f.w1 72 /4 ib  AVX512VL,AVX512,FUTURE
+VPSRAQ          ymmreg|mask|z,ymmrm256|b64*,imm8    vmi:fv: evex.nds.256.66.0f.w1 72 /4 ib  AVX512VL,AVX512,FUTURE
+VPSRAQ          zmmreg|mask|z,zmmrm512|b64*,imm8    vmi:fv: evex.nds.512.66.0f.w1 72 /4 ib  AVX512,FUTURE
+VPSRAVD         xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.66.0f38.w0 46 /r  AVX512VL,AVX512,FUTURE
+VPSRAVD         ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.66.0f38.w0 46 /r  AVX512VL,AVX512,FUTURE
+VPSRAVD         zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.66.0f38.w0 46 /r  AVX512,FUTURE
+VPSRAVQ         xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f38.w1 46 /r  AVX512VL,AVX512,FUTURE
+VPSRAVQ         ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f38.w1 46 /r  AVX512VL,AVX512,FUTURE
+VPSRAVQ         zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f38.w1 46 /r  AVX512,FUTURE
+VPSRAVW         xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f38.w1 11 /r  AVX512VL,AVX512BW,FUTURE
+VPSRAVW         ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f38.w1 11 /r  AVX512VL,AVX512BW,FUTURE
+VPSRAVW         zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f38.w1 11 /r  AVX512BW,FUTURE
+VPSRAW          xmmreg|mask|z,xmmreg*,xmmrm128      rvm:m128: evex.nds.128.66.0f.wig e1 /r  AVX512VL,AVX512BW,FUTURE
+VPSRAW          ymmreg|mask|z,ymmreg*,xmmrm128      rvm:m128: evex.nds.256.66.0f.wig e1 /r  AVX512VL,AVX512BW,FUTURE
+VPSRAW          zmmreg|mask|z,zmmreg*,xmmrm128      rvm:m128: evex.nds.512.66.0f.wig e1 /r  AVX512BW,FUTURE
+VPSRAW          xmmreg|mask|z,xmmrm128*,imm8        vmi:fvm: evex.nds.128.66.0f.wig 71 /4 ib  AVX512VL,AVX512BW,FUTURE
+VPSRAW          ymmreg|mask|z,ymmrm256*,imm8        vmi:fvm: evex.nds.256.66.0f.wig 71 /4 ib  AVX512VL,AVX512BW,FUTURE
+VPSRAW          zmmreg|mask|z,zmmrm512*,imm8        vmi:fvm: evex.nds.512.66.0f.wig 71 /4 ib  AVX512BW,FUTURE
+VPSRLD          xmmreg|mask|z,xmmreg*,xmmrm128      rvm:m128: evex.nds.128.66.0f.w0 d2 /r  AVX512VL,AVX512,FUTURE
+VPSRLD          ymmreg|mask|z,ymmreg*,xmmrm128      rvm:m128: evex.nds.256.66.0f.w0 d2 /r  AVX512VL,AVX512,FUTURE
+VPSRLD          zmmreg|mask|z,zmmreg*,xmmrm128      rvm:m128: evex.nds.512.66.0f.w0 d2 /r  AVX512,FUTURE
+VPSRLD          xmmreg|mask|z,xmmrm128|b32*,imm8    vmi:fv: evex.nds.128.66.0f.w0 72 /2 ib  AVX512VL,AVX512,FUTURE
+VPSRLD          ymmreg|mask|z,ymmrm256|b32*,imm8    vmi:fv: evex.nds.256.66.0f.w0 72 /2 ib  AVX512VL,AVX512,FUTURE
+VPSRLD          zmmreg|mask|z,zmmrm512|b32*,imm8    vmi:fv: evex.nds.512.66.0f.w0 72 /2 ib  AVX512,FUTURE
+VPSRLDQ         xmmreg,xmmrm128*,imm8               vmi:fvm: evex.nds.128.66.0f.wig 73 /3 ib  AVX512VL,AVX512BW,FUTURE
+VPSRLDQ         ymmreg,ymmrm256*,imm8               vmi:fvm: evex.nds.256.66.0f.wig 73 /3 ib  AVX512VL,AVX512BW,FUTURE
+VPSRLDQ         zmmreg,zmmrm512*,imm8               vmi:fvm: evex.nds.512.66.0f.wig 73 /3 ib  AVX512BW,FUTURE
+VPSRLQ          xmmreg|mask|z,xmmreg*,xmmrm128      rvm:m128: evex.nds.128.66.0f.w1 d3 /r  AVX512VL,AVX512,FUTURE
+VPSRLQ          ymmreg|mask|z,ymmreg*,xmmrm128      rvm:m128: evex.nds.256.66.0f.w1 d3 /r  AVX512VL,AVX512,FUTURE
+VPSRLQ          zmmreg|mask|z,zmmreg*,xmmrm128      rvm:m128: evex.nds.512.66.0f.w1 d3 /r  AVX512,FUTURE
+VPSRLQ          xmmreg|mask|z,xmmrm128|b64*,imm8    vmi:fv: evex.nds.128.66.0f.w1 73 /2 ib  AVX512VL,AVX512,FUTURE
+VPSRLQ          ymmreg|mask|z,ymmrm256|b64*,imm8    vmi:fv: evex.nds.256.66.0f.w1 73 /2 ib  AVX512VL,AVX512,FUTURE
+VPSRLQ          zmmreg|mask|z,zmmrm512|b64*,imm8    vmi:fv: evex.nds.512.66.0f.w1 73 /2 ib  AVX512,FUTURE
+VPSRLVD         xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.66.0f38.w0 45 /r  AVX512VL,AVX512,FUTURE
+VPSRLVD         ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.66.0f38.w0 45 /r  AVX512VL,AVX512,FUTURE
+VPSRLVD         zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.66.0f38.w0 45 /r  AVX512,FUTURE
+VPSRLVQ         xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f38.w1 45 /r  AVX512VL,AVX512,FUTURE
+VPSRLVQ         ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f38.w1 45 /r  AVX512VL,AVX512,FUTURE
+VPSRLVQ         zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f38.w1 45 /r  AVX512,FUTURE
+VPSRLVW         xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f38.w1 10 /r  AVX512VL,AVX512BW,FUTURE
+VPSRLVW         ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f38.w1 10 /r  AVX512VL,AVX512BW,FUTURE
+VPSRLVW         zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f38.w1 10 /r  AVX512BW,FUTURE
+VPSRLW          xmmreg|mask|z,xmmreg*,xmmrm128      rvm:m128: evex.nds.128.66.0f.wig d1 /r  AVX512VL,AVX512BW,FUTURE
+VPSRLW          ymmreg|mask|z,ymmreg*,xmmrm128      rvm:m128: evex.nds.256.66.0f.wig d1 /r  AVX512VL,AVX512BW,FUTURE
+VPSRLW          zmmreg|mask|z,zmmreg*,xmmrm128      rvm:m128: evex.nds.512.66.0f.wig d1 /r  AVX512BW,FUTURE
+VPSRLW          xmmreg|mask|z,xmmrm128*,imm8        vmi:fvm: evex.nds.128.66.0f.wig 71 /2 ib  AVX512VL,AVX512BW,FUTURE
+VPSRLW          ymmreg|mask|z,ymmrm256*,imm8        vmi:fvm: evex.nds.256.66.0f.wig 71 /2 ib  AVX512VL,AVX512BW,FUTURE
+VPSRLW          zmmreg|mask|z,zmmrm512*,imm8        vmi:fvm: evex.nds.512.66.0f.wig 71 /2 ib  AVX512BW,FUTURE
+VPSUBB          xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig f8 /r  AVX512VL,AVX512BW,FUTURE
+VPSUBB          ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig f8 /r  AVX512VL,AVX512BW,FUTURE
+VPSUBB          zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig f8 /r  AVX512BW,FUTURE
+VPSUBD          xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.66.0f.w0 fa /r  AVX512VL,AVX512,FUTURE
+VPSUBD          ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.66.0f.w0 fa /r  AVX512VL,AVX512,FUTURE
+VPSUBD          zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.66.0f.w0 fa /r  AVX512,FUTURE
+VPSUBQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f.w1 fb /r  AVX512VL,AVX512,FUTURE
+VPSUBQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f.w1 fb /r  AVX512VL,AVX512,FUTURE
+VPSUBQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f.w1 fb /r  AVX512,FUTURE
+VPSUBSB         xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig e8 /r  AVX512VL,AVX512BW,FUTURE
+VPSUBSB         ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig e8 /r  AVX512VL,AVX512BW,FUTURE
+VPSUBSB         zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig e8 /r  AVX512BW,FUTURE
+VPSUBSW         xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig e9 /r  AVX512VL,AVX512BW,FUTURE
+VPSUBSW         ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig e9 /r  AVX512VL,AVX512BW,FUTURE
+VPSUBSW         zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig e9 /r  AVX512BW,FUTURE
+VPSUBUSB        xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig d8 /r  AVX512VL,AVX512BW,FUTURE
+VPSUBUSB        ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig d8 /r  AVX512VL,AVX512BW,FUTURE
+VPSUBUSB        zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig d8 /r  AVX512BW,FUTURE
+VPSUBUSW        xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig d9 /r  AVX512VL,AVX512BW,FUTURE
+VPSUBUSW        ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig d9 /r  AVX512VL,AVX512BW,FUTURE
+VPSUBUSW        zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig d9 /r  AVX512BW,FUTURE
+VPSUBW          xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig f9 /r  AVX512VL,AVX512BW,FUTURE
+VPSUBW          ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig f9 /r  AVX512VL,AVX512BW,FUTURE
+VPSUBW          zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig f9 /r  AVX512BW,FUTURE
+VPTERNLOGD      xmmreg|mask|z,xmmreg,xmmrm128|b32,imm8 rvmi:fv: evex.nds.128.66.0f3a.w0 25 /r ib  AVX512VL,AVX512,FUTURE
+VPTERNLOGD      ymmreg|mask|z,ymmreg,ymmrm256|b32,imm8 rvmi:fv: evex.nds.256.66.0f3a.w0 25 /r ib  AVX512VL,AVX512,FUTURE
+VPTERNLOGD      zmmreg|mask|z,zmmreg,zmmrm512|b32,imm8 rvmi:fv: evex.nds.512.66.0f3a.w0 25 /r ib  AVX512,FUTURE
+VPTERNLOGQ      xmmreg|mask|z,xmmreg,xmmrm128|b64,imm8 rvmi:fv: evex.nds.128.66.0f3a.w1 25 /r ib  AVX512VL,AVX512,FUTURE
+VPTERNLOGQ      ymmreg|mask|z,ymmreg,ymmrm256|b64,imm8 rvmi:fv: evex.nds.256.66.0f3a.w1 25 /r ib  AVX512VL,AVX512,FUTURE
+VPTERNLOGQ      zmmreg|mask|z,zmmreg,zmmrm512|b64,imm8 rvmi:fv: evex.nds.512.66.0f3a.w1 25 /r ib  AVX512,FUTURE
+VPTESTMB        kreg|mask,xmmreg,xmmrm128           rvm:fvm: evex.nds.128.66.0f38.w0 26 /r  AVX512VL,AVX512BW,FUTURE
+VPTESTMB        kreg|mask,ymmreg,ymmrm256           rvm:fvm: evex.nds.256.66.0f38.w0 26 /r  AVX512VL,AVX512BW,FUTURE
+VPTESTMB        kreg|mask,zmmreg,zmmrm512           rvm:fvm: evex.nds.512.66.0f38.w0 26 /r  AVX512BW,FUTURE
+VPTESTMD        kreg|mask,xmmreg,xmmrm128|b32       rvm:fv: evex.nds.128.66.0f38.w0 27 /r  AVX512VL,AVX512,FUTURE
+VPTESTMD        kreg|mask,ymmreg,ymmrm256|b32       rvm:fv: evex.nds.256.66.0f38.w0 27 /r  AVX512VL,AVX512,FUTURE
+VPTESTMD        kreg|mask,zmmreg,zmmrm512|b32       rvm:fv: evex.nds.512.66.0f38.w0 27 /r  AVX512,FUTURE
+VPTESTMQ        kreg|mask,xmmreg,xmmrm128|b64       rvm:fv: evex.nds.128.66.0f38.w1 27 /r  AVX512VL,AVX512,FUTURE
+VPTESTMQ        kreg|mask,ymmreg,ymmrm256|b64       rvm:fv: evex.nds.256.66.0f38.w1 27 /r  AVX512VL,AVX512,FUTURE
+VPTESTMQ        kreg|mask,zmmreg,zmmrm512|b64       rvm:fv: evex.nds.512.66.0f38.w1 27 /r  AVX512,FUTURE
+VPTESTMW        kreg|mask,xmmreg,xmmrm128           rvm:fvm: evex.nds.128.66.0f38.w1 26 /r  AVX512VL,AVX512BW,FUTURE
+VPTESTMW        kreg|mask,ymmreg,ymmrm256           rvm:fvm: evex.nds.256.66.0f38.w1 26 /r  AVX512VL,AVX512BW,FUTURE
+VPTESTMW        kreg|mask,zmmreg,zmmrm512           rvm:fvm: evex.nds.512.66.0f38.w1 26 /r  AVX512BW,FUTURE
+VPTESTNMB       kreg|mask,xmmreg,xmmrm128           rvm:fvm: evex.nds.128.f3.0f38.w0 26 /r  AVX512VL,AVX512BW,FUTURE
+VPTESTNMB       kreg|mask,ymmreg,ymmrm256           rvm:fvm: evex.nds.256.f3.0f38.w0 26 /r  AVX512VL,AVX512BW,FUTURE
+VPTESTNMB       kreg|mask,zmmreg,zmmrm512           rvm:fvm: evex.nds.512.f3.0f38.w0 26 /r  AVX512BW,FUTURE
+VPTESTNMD       kreg|mask,xmmreg,xmmrm128|b32       rvm:fv: evex.nds.128.f3.0f38.w0 27 /r  AVX512VL,AVX512,FUTURE
+VPTESTNMD       kreg|mask,ymmreg,ymmrm256|b32       rvm:fv: evex.nds.256.f3.0f38.w0 27 /r  AVX512VL,AVX512,FUTURE
+VPTESTNMD       kreg|mask,zmmreg,zmmrm512|b32       rvm:fv: evex.nds.512.f3.0f38.w0 27 /r  AVX512,FUTURE
+VPTESTNMQ       kreg|mask,xmmreg,xmmrm128|b64       rvm:fv: evex.nds.128.f3.0f38.w1 27 /r  AVX512VL,AVX512,FUTURE
+VPTESTNMQ       kreg|mask,ymmreg,ymmrm256|b64       rvm:fv: evex.nds.256.f3.0f38.w1 27 /r  AVX512VL,AVX512,FUTURE
+VPTESTNMQ       kreg|mask,zmmreg,zmmrm512|b64       rvm:fv: evex.nds.512.f3.0f38.w1 27 /r  AVX512,FUTURE
+VPTESTNMW       kreg|mask,xmmreg,xmmrm128           rvm:fvm: evex.nds.128.f3.0f38.w1 26 /r  AVX512VL,AVX512BW,FUTURE
+VPTESTNMW       kreg|mask,ymmreg,ymmrm256           rvm:fvm: evex.nds.256.f3.0f38.w1 26 /r  AVX512VL,AVX512BW,FUTURE
+VPTESTNMW       kreg|mask,zmmreg,zmmrm512           rvm:fvm: evex.nds.512.f3.0f38.w1 26 /r  AVX512BW,FUTURE
+VPUNPCKHBW      xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig 68 /r  AVX512VL,AVX512BW,FUTURE
+VPUNPCKHBW      ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig 68 /r  AVX512VL,AVX512BW,FUTURE
+VPUNPCKHBW      zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig 68 /r  AVX512BW,FUTURE
+VPUNPCKHDQ      xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.66.0f.w0 6a /r  AVX512VL,AVX512,FUTURE
+VPUNPCKHDQ      ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.66.0f.w0 6a /r  AVX512VL,AVX512,FUTURE
+VPUNPCKHDQ      zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.66.0f.w0 6a /r  AVX512,FUTURE
+VPUNPCKHQDQ     xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f.w1 6d /r  AVX512VL,AVX512,FUTURE
+VPUNPCKHQDQ     ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f.w1 6d /r  AVX512VL,AVX512,FUTURE
+VPUNPCKHQDQ     zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f.w1 6d /r  AVX512,FUTURE
+VPUNPCKHWD      xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig 69 /r  AVX512VL,AVX512BW,FUTURE
+VPUNPCKHWD      ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig 69 /r  AVX512VL,AVX512BW,FUTURE
+VPUNPCKHWD      zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig 69 /r  AVX512BW,FUTURE
+VPUNPCKLBW      xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig 60 /r  AVX512VL,AVX512BW,FUTURE
+VPUNPCKLBW      ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig 60 /r  AVX512VL,AVX512BW,FUTURE
+VPUNPCKLBW      zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig 60 /r  AVX512BW,FUTURE
+VPUNPCKLDQ      xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.66.0f.w0 62 /r  AVX512VL,AVX512,FUTURE
+VPUNPCKLDQ      ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.66.0f.w0 62 /r  AVX512VL,AVX512,FUTURE
+VPUNPCKLDQ      zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.66.0f.w0 62 /r  AVX512,FUTURE
+VPUNPCKLQDQ     xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f.w1 6c /r  AVX512VL,AVX512,FUTURE
+VPUNPCKLQDQ     ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f.w1 6c /r  AVX512VL,AVX512,FUTURE
+VPUNPCKLQDQ     zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f.w1 6c /r  AVX512,FUTURE
+VPUNPCKLWD      xmmreg|mask|z,xmmreg*,xmmrm128      rvm:fvm: evex.nds.128.66.0f.wig 61 /r  AVX512VL,AVX512BW,FUTURE
+VPUNPCKLWD      ymmreg|mask|z,ymmreg*,ymmrm256      rvm:fvm: evex.nds.256.66.0f.wig 61 /r  AVX512VL,AVX512BW,FUTURE
+VPUNPCKLWD      zmmreg|mask|z,zmmreg*,zmmrm512      rvm:fvm: evex.nds.512.66.0f.wig 61 /r  AVX512BW,FUTURE
+VPXORD          xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.66.0f.w0 ef /r  AVX512VL,AVX512,FUTURE
+VPXORD          ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.66.0f.w0 ef /r  AVX512VL,AVX512,FUTURE
+VPXORD          zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.66.0f.w0 ef /r  AVX512,FUTURE
+VPXORQ          xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f.w1 ef /r  AVX512VL,AVX512,FUTURE
+VPXORQ          ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f.w1 ef /r  AVX512VL,AVX512,FUTURE
+VPXORQ          zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f.w1 ef /r  AVX512,FUTURE
+VRANGEPD        xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 rvmi:fv: evex.nds.128.66.0f3a.w1 50 /r ib  AVX512VL,AVX512DQ,FUTURE
+VRANGEPD        ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 rvmi:fv: evex.nds.256.66.0f3a.w1 50 /r ib  AVX512VL,AVX512DQ,FUTURE
+VRANGEPD        zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae,imm8 rvmi:fv: evex.nds.512.66.0f3a.w1 50 /r ib  AVX512DQ,FUTURE
+VRANGEPS        xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 rvmi:fv: evex.nds.128.66.0f3a.w0 50 /r ib  AVX512VL,AVX512DQ,FUTURE
+VRANGEPS        ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 rvmi:fv: evex.nds.256.66.0f3a.w0 50 /r ib  AVX512VL,AVX512DQ,FUTURE
+VRANGEPS        zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae,imm8 rvmi:fv: evex.nds.512.66.0f3a.w0 50 /r ib  AVX512DQ,FUTURE
+VRANGESD        xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 rvmi:t1s: evex.nds.128.66.0f3a.w1 51 /r ib  AVX512DQ,FUTURE
+VRANGESS        xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 rvmi:t1s: evex.nds.128.66.0f3a.w0 51 /r ib  AVX512DQ,FUTURE
+VRCP14PD        xmmreg|mask|z,xmmrm128|b64          rm:fv: evex.128.66.0f38.w1 4c /r  AVX512VL,AVX512,FUTURE
+VRCP14PD        ymmreg|mask|z,ymmrm256|b64          rm:fv: evex.256.66.0f38.w1 4c /r  AVX512VL,AVX512,FUTURE
+VRCP14PD        zmmreg|mask|z,zmmrm512|b64          rm:fv: evex.512.66.0f38.w1 4c /r  AVX512,FUTURE
+VRCP14PS        xmmreg|mask|z,xmmrm128|b32          rm:fv: evex.128.66.0f38.w0 4c /r  AVX512VL,AVX512,FUTURE
+VRCP14PS        ymmreg|mask|z,ymmrm256|b32          rm:fv: evex.256.66.0f38.w0 4c /r  AVX512VL,AVX512,FUTURE
+VRCP14PS        zmmreg|mask|z,zmmrm512|b32          rm:fv: evex.512.66.0f38.w0 4c /r  AVX512,FUTURE
+VRCP14SD        xmmreg|mask|z,xmmreg*,xmmrm64       rvm:t1s: evex.nds.128.66.0f38.w1 4d /r  AVX512,FUTURE
+VRCP14SS        xmmreg|mask|z,xmmreg*,xmmrm32       rvm:t1s: evex.nds.128.66.0f38.w0 4d /r  AVX512,FUTURE
+VRCP28PD        zmmreg|mask|z,zmmrm512|b64|sae      rm:fv: evex.512.66.0f38.w1 ca /r  AVX512ER,FUTURE
+VRCP28PS        zmmreg|mask|z,zmmrm512|b32|sae      rm:fv: evex.512.66.0f38.w0 ca /r  AVX512ER,FUTURE
+VRCP28SD        xmmreg|mask|z,xmmreg*,xmmrm64|sae   rvm:t1s: evex.nds.128.66.0f38.w1 cb /r  AVX512ER,FUTURE
+VRCP28SS        xmmreg|mask|z,xmmreg*,xmmrm32|sae   rvm:t1s: evex.nds.128.66.0f38.w0 cb /r  AVX512ER,FUTURE
+VREDUCEPD       xmmreg|mask|z,xmmrm128|b64,imm8     rmi:fv: evex.128.66.0f3a.w1 56 /r ib  AVX512VL,AVX512DQ,FUTURE
+VREDUCEPD       ymmreg|mask|z,ymmrm256|b64,imm8     rmi:fv: evex.256.66.0f3a.w1 56 /r ib  AVX512VL,AVX512DQ,FUTURE
+VREDUCEPD       zmmreg|mask|z,zmmrm512|b64|sae,imm8 rmi:fv: evex.512.66.0f3a.w1 56 /r ib  AVX512DQ,FUTURE
+VREDUCEPS       xmmreg|mask|z,xmmrm128|b32,imm8     rmi:fv: evex.128.66.0f3a.w0 56 /r ib  AVX512VL,AVX512DQ,FUTURE
+VREDUCEPS       ymmreg|mask|z,ymmrm256|b32,imm8     rmi:fv: evex.256.66.0f3a.w0 56 /r ib  AVX512VL,AVX512DQ,FUTURE
+VREDUCEPS       zmmreg|mask|z,zmmrm512|b32|sae,imm8 rmi:fv: evex.512.66.0f3a.w0 56 /r ib  AVX512DQ,FUTURE
+VREDUCESD       xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 rvmi:t1s: evex.nds.128.66.0f3a.w1 57 /r ib  AVX512DQ,FUTURE
+VREDUCESS       xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 rvmi:t1s: evex.nds.128.66.0f3a.w0 57 /r ib  AVX512DQ,FUTURE
+VRNDSCALEPD     xmmreg|mask|z,xmmrm128|b64,imm8     rmi:fv: evex.128.66.0f3a.w1 09 /r ib  AVX512VL,AVX512,FUTURE
+VRNDSCALEPD     ymmreg|mask|z,ymmrm256|b64,imm8     rmi:fv: evex.256.66.0f3a.w1 09 /r ib  AVX512VL,AVX512,FUTURE
+VRNDSCALEPD     zmmreg|mask|z,zmmrm512|b64|sae,imm8 rmi:fv: evex.512.66.0f3a.w1 09 /r ib  AVX512,FUTURE
+VRNDSCALEPS     xmmreg|mask|z,xmmrm128|b32,imm8     rmi:fv: evex.128.66.0f3a.w0 08 /r ib  AVX512VL,AVX512,FUTURE
+VRNDSCALEPS     ymmreg|mask|z,ymmrm256|b32,imm8     rmi:fv: evex.256.66.0f3a.w0 08 /r ib  AVX512VL,AVX512,FUTURE
+VRNDSCALEPS     zmmreg|mask|z,zmmrm512|b32|sae,imm8 rmi:fv: evex.512.66.0f3a.w0 08 /r ib  AVX512,FUTURE
+VRNDSCALESD     xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 rvmi:t1s: evex.nds.128.66.0f3a.w1 0b /r ib  AVX512,FUTURE
+VRNDSCALESS     xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 rvmi:t1s: evex.nds.128.66.0f3a.w0 0a /r ib  AVX512,FUTURE
+VRSQRT14PD      xmmreg|mask|z,xmmrm128|b64          rm:fv: evex.128.66.0f38.w1 4e /r  AVX512VL,AVX512,FUTURE
+VRSQRT14PD      ymmreg|mask|z,ymmrm256|b64          rm:fv: evex.256.66.0f38.w1 4e /r  AVX512VL,AVX512,FUTURE
+VRSQRT14PD      zmmreg|mask|z,zmmrm512|b64          rm:fv: evex.512.66.0f38.w1 4e /r  AVX512,FUTURE
+VRSQRT14PS      xmmreg|mask|z,xmmrm128|b32          rm:fv: evex.128.66.0f38.w0 4e /r  AVX512VL,AVX512,FUTURE
+VRSQRT14PS      ymmreg|mask|z,ymmrm256|b32          rm:fv: evex.256.66.0f38.w0 4e /r  AVX512VL,AVX512,FUTURE
+VRSQRT14PS      zmmreg|mask|z,zmmrm512|b32          rm:fv: evex.512.66.0f38.w0 4e /r  AVX512,FUTURE
+VRSQRT14SD      xmmreg|mask|z,xmmreg*,xmmrm64       rvm:t1s: evex.nds.128.66.0f38.w1 4f /r  AVX512,FUTURE
+VRSQRT14SS      xmmreg|mask|z,xmmreg*,xmmrm32       rvm:t1s: evex.nds.128.66.0f38.w0 4f /r  AVX512,FUTURE
+VRSQRT28PD      zmmreg|mask|z,zmmrm512|b64|sae      rm:fv: evex.512.66.0f38.w1 cc /r  AVX512ER,FUTURE
+VRSQRT28PS      zmmreg|mask|z,zmmrm512|b32|sae      rm:fv: evex.512.66.0f38.w0 cc /r  AVX512ER,FUTURE
+VRSQRT28SD      xmmreg|mask|z,xmmreg*,xmmrm64|sae   rvm:t1s: evex.nds.128.66.0f38.w1 cd /r  AVX512ER,FUTURE
+VRSQRT28SS      xmmreg|mask|z,xmmreg*,xmmrm32|sae   rvm:t1s: evex.nds.128.66.0f38.w0 cd /r  AVX512ER,FUTURE
+VSCALEFPD       xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f38.w1 2c /r  AVX512VL,AVX512,FUTURE
+VSCALEFPD       ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f38.w1 2c /r  AVX512VL,AVX512,FUTURE
+VSCALEFPD       zmmreg|mask|z,zmmreg*,zmmrm512|b64|er rvm:fv: evex.nds.512.66.0f38.w1 2c /r  AVX512,FUTURE
+VSCALEFPS       xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.66.0f38.w0 2c /r  AVX512VL,AVX512,FUTURE
+VSCALEFPS       ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.66.0f38.w0 2c /r  AVX512VL,AVX512,FUTURE
+VSCALEFPS       zmmreg|mask|z,zmmreg*,zmmrm512|b32|er rvm:fv: evex.nds.512.66.0f38.w0 2c /r  AVX512,FUTURE
+VSCALEFSD       xmmreg|mask|z,xmmreg*,xmmrm64|er    rvm:t1s: evex.nds.128.66.0f38.w1 2d /r  AVX512,FUTURE
+VSCALEFSS       xmmreg|mask|z,xmmreg*,xmmrm32|er    rvm:t1s: evex.nds.128.66.0f38.w0 2d /r  AVX512,FUTURE
+VSCATTERDPD     xmem64|mask,xmmreg                  mr:t1s: vsibx evex.128.66.0f38.w1 a2 /r  AVX512VL,AVX512,FUTURE
+VSCATTERDPD     xmem64|mask,ymmreg                  mr:t1s: vsibx evex.256.66.0f38.w1 a2 /r  AVX512VL,AVX512,FUTURE
+VSCATTERDPD     ymem64|mask,zmmreg                  mr:t1s: vsiby evex.512.66.0f38.w1 a2 /r  AVX512,FUTURE
+VSCATTERDPS     xmem32|mask,xmmreg                  mr:t1s: vsibx evex.128.66.0f38.w0 a2 /r  AVX512VL,AVX512,FUTURE
+VSCATTERDPS     ymem32|mask,ymmreg                  mr:t1s: vsiby evex.256.66.0f38.w0 a2 /r  AVX512VL,AVX512,FUTURE
+VSCATTERDPS     zmem32|mask,zmmreg                  mr:t1s: vsibz evex.512.66.0f38.w0 a2 /r  AVX512,FUTURE
+VSCATTERPF0DPD  ymem64|mask                         m:t1s: vsiby evex.512.66.0f38.w1 c6 /5  AVX512PF,FUTURE
+VSCATTERPF0DPS  zmem32|mask                         m:t1s: vsibz evex.512.66.0f38.w0 c6 /5  AVX512PF,FUTURE
+VSCATTERPF0QPD  zmem64|mask                         m:t1s: vsibz evex.512.66.0f38.w1 c7 /5  AVX512PF,FUTURE
+VSCATTERPF0QPS  zmem32|mask                         m:t1s: vsibz evex.512.66.0f38.w0 c7 /5  AVX512PF,FUTURE
+VSCATTERPF1DPD  ymem64|mask                         m:t1s: vsiby evex.512.66.0f38.w1 c6 /6  AVX512PF,FUTURE
+VSCATTERPF1DPS  zmem32|mask                         m:t1s: vsibz evex.512.66.0f38.w0 c6 /6  AVX512PF,FUTURE
+VSCATTERPF1QPD  zmem64|mask                         m:t1s: vsibz evex.512.66.0f38.w1 c7 /6  AVX512PF,FUTURE
+VSCATTERPF1QPS  zmem32|mask                         m:t1s: vsibz evex.512.66.0f38.w0 c7 /6  AVX512PF,FUTURE
+VSCATTERQPD     xmem64|mask,xmmreg                  mr:t1s: vsibx evex.128.66.0f38.w1 a3 /r  AVX512VL,AVX512,FUTURE
+VSCATTERQPD     ymem64|mask,ymmreg                  mr:t1s: vsiby evex.256.66.0f38.w1 a3 /r  AVX512VL,AVX512,FUTURE
+VSCATTERQPD     zmem64|mask,zmmreg                  mr:t1s: vsibz evex.512.66.0f38.w1 a3 /r  AVX512,FUTURE
+VSCATTERQPS     xmem32|mask,xmmreg                  mr:t1s: vsibx evex.128.66.0f38.w0 a3 /r  AVX512VL,AVX512,FUTURE
+VSCATTERQPS     ymem32|mask,xmmreg                  mr:t1s: vsiby evex.256.66.0f38.w0 a3 /r  AVX512VL,AVX512,FUTURE
+VSCATTERQPS     zmem32|mask,ymmreg                  mr:t1s: vsibz evex.512.66.0f38.w0 a3 /r  AVX512,FUTURE
+VSHUFF32X4      ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 rvmi:fv: evex.nds.256.66.0f3a.w0 23 /r ib  AVX512VL,AVX512,FUTURE
+VSHUFF32X4      zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 rvmi:fv: evex.nds.512.66.0f3a.w0 23 /r ib  AVX512,FUTURE
+VSHUFF64X2      ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 rvmi:fv: evex.nds.256.66.0f3a.w1 23 /r ib  AVX512VL,AVX512,FUTURE
+VSHUFF64X2      zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 rvmi:fv: evex.nds.512.66.0f3a.w1 23 /r ib  AVX512,FUTURE
+VSHUFI32X4      ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 rvmi:fv: evex.nds.256.66.0f3a.w0 43 /r ib  AVX512VL,AVX512,FUTURE
+VSHUFI32X4      zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 rvmi:fv: evex.nds.512.66.0f3a.w0 43 /r ib  AVX512,FUTURE
+VSHUFI64X2      ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 rvmi:fv: evex.nds.256.66.0f3a.w1 43 /r ib  AVX512VL,AVX512,FUTURE
+VSHUFI64X2      zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 rvmi:fv: evex.nds.512.66.0f3a.w1 43 /r ib  AVX512,FUTURE
+VSHUFPD         xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 rvmi:fv: evex.nds.128.66.0f.w1 c6 /r ib  AVX512VL,AVX512,FUTURE
+VSHUFPD         ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 rvmi:fv: evex.nds.256.66.0f.w1 c6 /r ib  AVX512VL,AVX512,FUTURE
+VSHUFPD         zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 rvmi:fv: evex.nds.512.66.0f.w1 c6 /r ib  AVX512,FUTURE
+VSHUFPS         xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 rvmi:fv: evex.nds.128.0f.w0 c6 /r ib  AVX512VL,AVX512,FUTURE
+VSHUFPS         ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 rvmi:fv: evex.nds.256.0f.w0 c6 /r ib  AVX512VL,AVX512,FUTURE
+VSHUFPS         zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 rvmi:fv: evex.nds.512.0f.w0 c6 /r ib  AVX512,FUTURE
+VSQRTPD         xmmreg|mask|z,xmmrm128|b64          rm:fv: evex.128.66.0f.w1 51 /r  AVX512VL,AVX512,FUTURE
+VSQRTPD         ymmreg|mask|z,ymmrm256|b64          rm:fv: evex.256.66.0f.w1 51 /r  AVX512VL,AVX512,FUTURE
+VSQRTPD         zmmreg|mask|z,zmmrm512|b64|er       rm:fv: evex.512.66.0f.w1 51 /r  AVX512,FUTURE
+VSQRTPS         xmmreg|mask|z,xmmrm128|b32          rm:fv: evex.128.0f.w0 51 /r  AVX512VL,AVX512,FUTURE
+VSQRTPS         ymmreg|mask|z,ymmrm256|b32          rm:fv: evex.256.0f.w0 51 /r  AVX512VL,AVX512,FUTURE
+VSQRTPS         zmmreg|mask|z,zmmrm512|b32|er       rm:fv: evex.512.0f.w0 51 /r  AVX512,FUTURE
+VSQRTSD         xmmreg|mask|z,xmmreg*,xmmrm64|er    rvm:t1s: evex.nds.128.f2.0f.w1 51 /r  AVX512,FUTURE
+VSQRTSS         xmmreg|mask|z,xmmreg*,xmmrm32|er    rvm:t1s: evex.nds.128.f3.0f.w0 51 /r  AVX512,FUTURE
+VSUBPD          xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f.w1 5c /r  AVX512VL,AVX512,FUTURE
+VSUBPD          ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f.w1 5c /r  AVX512VL,AVX512,FUTURE
+VSUBPD          zmmreg|mask|z,zmmreg*,zmmrm512|b64|er rvm:fv: evex.nds.512.66.0f.w1 5c /r  AVX512,FUTURE
+VSUBPS          xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.0f.w0 5c /r  AVX512VL,AVX512,FUTURE
+VSUBPS          ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.0f.w0 5c /r  AVX512VL,AVX512,FUTURE
+VSUBPS          zmmreg|mask|z,zmmreg*,zmmrm512|b32|er rvm:fv: evex.nds.512.0f.w0 5c /r  AVX512,FUTURE
+VSUBSD          xmmreg|mask|z,xmmreg*,xmmrm64|er    rvm:t1s: evex.nds.128.f2.0f.w1 5c /r  AVX512,FUTURE
+VSUBSS          xmmreg|mask|z,xmmreg*,xmmrm32|er    rvm:t1s: evex.nds.128.f3.0f.w0 5c /r  AVX512,FUTURE
+VUCOMISD        xmmreg,xmmrm64|sae                  rm:t1s: evex.128.66.0f.w1 2e /r  AVX512,FUTURE
+VUCOMISS        xmmreg,xmmrm32|sae                  rm:t1s: evex.128.0f.w0 2e /r  AVX512,FUTURE
+VUNPCKHPD       xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f.w1 15 /r  AVX512VL,AVX512,FUTURE
+VUNPCKHPD       ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f.w1 15 /r  AVX512VL,AVX512,FUTURE
+VUNPCKHPD       zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f.w1 15 /r  AVX512,FUTURE
+VUNPCKHPS       xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.0f.w0 15 /r  AVX512VL,AVX512,FUTURE
+VUNPCKHPS       ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.0f.w0 15 /r  AVX512VL,AVX512,FUTURE
+VUNPCKHPS       zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.0f.w0 15 /r  AVX512,FUTURE
+VUNPCKLPD       xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f.w1 14 /r  AVX512VL,AVX512,FUTURE
+VUNPCKLPD       ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f.w1 14 /r  AVX512VL,AVX512,FUTURE
+VUNPCKLPD       zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f.w1 14 /r  AVX512,FUTURE
+VUNPCKLPS       xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.0f.w0 14 /r  AVX512VL,AVX512,FUTURE
+VUNPCKLPS       ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.0f.w0 14 /r  AVX512VL,AVX512,FUTURE
+VUNPCKLPS       zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.0f.w0 14 /r  AVX512,FUTURE
+VXORPD          xmmreg|mask|z,xmmreg*,xmmrm128|b64  rvm:fv: evex.nds.128.66.0f.w1 57 /r  AVX512VL,AVX512DQ,FUTURE
+VXORPD          ymmreg|mask|z,ymmreg*,ymmrm256|b64  rvm:fv: evex.nds.256.66.0f.w1 57 /r  AVX512VL,AVX512DQ,FUTURE
+VXORPD          zmmreg|mask|z,zmmreg*,zmmrm512|b64  rvm:fv: evex.nds.512.66.0f.w1 57 /r  AVX512DQ,FUTURE
+VXORPS          xmmreg|mask|z,xmmreg*,xmmrm128|b32  rvm:fv: evex.nds.128.0f.w0 57 /r  AVX512VL,AVX512DQ,FUTURE
+VXORPS          ymmreg|mask|z,ymmreg*,ymmrm256|b32  rvm:fv: evex.nds.256.0f.w0 57 /r  AVX512VL,AVX512DQ,FUTURE
+VXORPS          zmmreg|mask|z,zmmreg*,zmmrm512|b32  rvm:fv: evex.nds.512.0f.w0 57 /r  AVX512DQ,FUTURE
+; MJC PUBLIC END
+
+;# Intel memory protection keys for userspace (PKU aka PKEYs)
+RDPKRU		void					0f 01 ee				LONG,FUTURE
+WRPKRU		void					0f 01 ef				LONG,FUTURE
+
+;# Read Processor ID
+RDPID		reg32				m:	f3 0f c7 /7				NOLONG,FUTURE
+RDPID		reg64				m:	o64nw f3 0f c7 /7			LONG,FUTURE
+RDPID		reg32				m:	f3 0f c7 /7				LONG,UNDOC,FUTURE
+
+;# New memory instructions
+CLFLUSHOPT	mem				m:	66 0f ae /7				FUTURE
+CLWB            mem                             m:     66 0f ae /6                            FUTURE
+; This one was killed before it saw the light of day
+PCOMMIT         void                                   66 0f ae f8                            FUTURE,NEVER,NOP
+
+; AMD Zen v1
+CLZERO		void					0f 01 fc				FUTURE,AMD
+CLZERO		reg_ax				-:	a16 0f 01 fc				FUTURE,AMD,ND,NOLONG
+CLZERO		reg_eax				-:	a32 0f 01 fc				FUTURE,AMD,ND
+CLZERO		reg_rax				-:	a64 0f 01 fc				FUTURE,AMD,ND,LONG
+
+;# Processor trace write
+PTWRITE		rm32				m:	f3 0f ae /4				FUTURE
+PTWRITE		rm64				m:	o64 f3 0f ae /4			LONG,FUTURE
+
+;# Instructions from the Intel Instruction Set Extensions,
+;# doc 319433-034 May 2018
+CLDEMOTE	mem				m:	np 0f 1c /0				FUTURE
+MOVDIRI		mem32,reg32			mr:	np 0f 38 f9 /r				FUTURE,SD
+MOVDIRI		mem64,reg64			mr:	o64 0f 38 f9 /r			FUTURE,LONG,SQ
+MOVDIR64B	reg16,mem512			rm:	a16 66 0f 38 f8 /r			FUTURE,NOLONG
+MOVDIR64B	reg32,mem512			rm:	a32 66 0f 38 f8 /r			FUTURE
+MOVDIR64B	reg64,mem512			rm:	o64nw a64 66 0f 38 f8 /r		FUTURE,LONG
+PCONFIG		void					np 0f 01 c5				FUTURE
+TPAUSE		reg32				m:	66 0f ae /6				FUTURE
+TPAUSE		reg32,reg_edx,reg_eax		m--:	66 0f ae /6				FUTURE,ND
+UMONITOR	reg16				m:	a16 f3 0f ae /6			FUTURE,NOLONG
+UMONITOR	reg32				m:	a32 f3 0f ae /6			FUTURE
+UMONITOR	reg64				m:	o64nw a64 f3 0f ae /6			FUTURE,LONG
+UMWAIT		reg32				m:	f2 0f ae /6				FUTURE
+UMWAIT		reg32,reg_edx,reg_eax		m--:	f2 0f ae /6				FUTURE,ND
+WBNOINVD	void					f3 0f 09				FUTURE
+
+;# Galois field operations (GFNI)
+GF2P8AFFINEINVQB	xmmreg,xmmrm128,imm8			rmi:	  66 0f 3a cf /r ib			GFNI,SSE,FUTURE
+VGF2P8AFFINEINVQB	xmmreg,xmmreg*,xmmrm128,imm8		rvmi:	  vex.nds.128.66.0f3a.w1 cf /r ib	GFNI,AVX,FUTURE
+VGF2P8AFFINEINVQB	ymmreg,ymmreg*,ymmrm256,imm8		rvmi:	  vex.nds.256.66.0f3a.w1 cf /r ib	GFNI,AVX,FUTURE
+VGF2P8AFFINEINVQB	xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8	rvmi:fv: evex.nds.128.66.0f3a.w1 cf /r ib	GFNI,AVX512VL,FUTURE
+VGF2P8AFFINEINVQB	ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8	rvmi:fv: evex.nds.256.66.0f3a.w1 cf /r ib	GFNI,AVX512VL,FUTURE
+VGF2P8AFFINEINVQB	zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8	rvmi:fv: evex.nds.512.66.0f3a.w1 cf /r ib	GFNI,AVX512,FUTURE
+GF2P8AFFINEQB   	xmmreg,xmmrm128,imm8			rmi:	  66 0f 3a ce /r ib			GFNI,SSE,FUTURE
+VGF2P8AFFINEQB   	xmmreg,xmmreg*,xmmrm128,imm8		rvmi:	  vex.nds.128.66.0f3a.w1 ce /r ib	GFNI,AVX,FUTURE
+VGF2P8AFFINEQB   	ymmreg,ymmreg*,ymmrm256,imm8		rvmi:	  vex.nds.256.66.0f3a.w1 ce /r ib	GFNI,AVX,FUTURE
+VGF2P8AFFINEQB   	xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8	rvmi:fv: evex.nds.128.66.0f3a.w1 ce /r ib	GFNI,AVX512VL,FUTURE
+VGF2P8AFFINEQB   	ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8	rvmi:fv: evex.nds.256.66.0f3a.w1 ce /r ib	GFNI,AVX512VL,FUTURE
+VGF2P8AFFINEQB   	zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8	rvmi:fv: evex.nds.512.66.0f3a.w1 ce /r ib	GFNI,AVX512,FUTURE
+GF2P8MULB		xmmreg,xmmrm128				rm:      66 0f 38 cf /r			GFNI,SSE,FUTURE
+VGF2P8MULB		xmmreg,xmmreg*,xmmrm128			rvm:     vex.nds.128.66.0f38.w0 cf /r		GFNI,AVX,FUTURE
+VGF2P8MULB		ymmreg,ymmreg*,ymmrm256			rvm:     vex.nds.256.66.0f38.w0 cf /r		GFNI,AVX,FUTURE
+VGF2P8MULB		xmmreg|mask|z,xmmreg*,xmmrm128		rvm:fvm: evex.nds.128.66.0f38.w0 cf /r	GFNI,AVX512VL,FUTURE
+VGF2P8MULB		ymmreg|mask|z,ymmreg*,ymmrm256		rvm:fvm: evex.nds.256.66.0f38.w0 cf /r	GFNI,AVX512VL,FUTURE
+VGF2P8MULB		zmmreg|mask|z,zmmreg*,zmmrm512		rvm:fvm: evex.nds.512.66.0f38.w0 cf /r	GFNI,AVX512,FUTURE
+
+;# AVX512 Vector Bit Manipulation Instructions 2
+VPCOMPRESSB     mem128|mask,xmmreg                      mr:t1s8:  evex.128.66.0f38.w0 63 /r		AVX512VBMI2,AVX512VL,FUTURE
+VPCOMPRESSB     mem256|mask,ymmreg                      mr:t1s8:  evex.256.66.0f38.w0 63 /r		AVX512VBMI2,AVX512VL,FUTURE
+VPCOMPRESSB     mem512|mask,zmmreg                      mr:t1s8:  evex.512.66.0f38.w0 63 /r		AVX512VBMI2,FUTURE
+VPCOMPRESSB     xmmreg|mask|z,xmmreg                    mr:       evex.128.66.0f38.w0 63 /r		AVX512VBMI2,AVX512VL,FUTURE
+VPCOMPRESSB     ymmreg|mask|z,ymmreg                    mr:       evex.256.66.0f38.w0 63 /r		AVX512VBMI2,AVX512VL,FUTURE
+VPCOMPRESSB     zmmreg|mask|z,zmmreg                    mr:       evex.512.66.0f38.w0 63 /r		AVX512VBMI2,FUTURE
+VPCOMPRESSW     mem128|mask,xmmreg                      mr:t1s16: evex.128.66.0f38.w1 63 /r		AVX512VBMI2,AVX512VL,FUTURE
+VPCOMPRESSW     mem256|mask,ymmreg                      mr:t1s16: evex.256.66.0f38.w1 63 /r		AVX512VBMI2,AVX512VL,FUTURE
+VPCOMPRESSW     mem512|mask,zmmreg                      mr:t1s16: evex.512.66.0f38.w1 63 /r		AVX512VBMI2,FUTURE
+VPCOMPRESSW     xmmreg|mask|z,xmmreg                    mr:       evex.128.66.0f38.w1 63 /r		AVX512VBMI2,AVX512VL,FUTURE
+VPCOMPRESSW     ymmreg|mask|z,ymmreg                    mr:       evex.256.66.0f38.w1 63 /r		AVX512VBMI2,AVX512VL,FUTURE
+VPCOMPRESSW     zmmreg|mask|z,zmmreg                    mr:       evex.512.66.0f38.w1 63 /r		AVX512VBMI2,FUTURE
+VPEXPANDB       xmmreg|mask|z,xmmrm128                  rm:t1s8:  evex.128.66.0f38.w0 62 /r		AVX512VBMI2,AVX512VL,FUTURE
+VPEXPANDB       ymmreg|mask|z,ymmrm256                  rm:t1s8:  evex.256.66.0f38.w0 62 /r		AVX512VBMI2,AVX512VL,FUTURE
+VPEXPANDB       zmmreg|mask|z,zmmrm512                  rm:t1s8:  evex.512.66.0f38.w0 62 /r		AVX512VBMI2,FUTURE
+VPEXPANDW       xmmreg|mask|z,xmmrm128                  rm:t1s16: evex.128.66.0f38.w1 62 /r		AVX512VBMI2,AVX512VL,FUTURE
+VPEXPANDW       ymmreg|mask|z,ymmrm256                  rm:t1s16: evex.256.66.0f38.w1 62 /r		AVX512VBMI2,AVX512VL,FUTURE
+VPEXPANDW       zmmreg|mask|z,zmmrm512                  rm:t1s16: evex.512.66.0f38.w1 62 /r		AVX512VBMI2,FUTURE
+VPSHLDW		xmmreg|mask|z,xmmreg*,xmmrm128,imm8	rvmi:fvm: evex.nds.128.66.0f3a.w1 70 /r ib	AVX512VBMI2,AVX512VL,FUTURE
+VPSHLDW		ymmreg|mask|z,ymmreg*,ymmrm256,imm8	rvmi:fvm: evex.nds.256.66.0f3a.w1 70 /r ib	AVX512VBMI2,AVX512VL,FUTURE
+VPSHLDW		zmmreg|mask|z,zmmreg*,zmmrm512,imm8	rvmi:fvm: evex.nds.512.66.0f3a.w1 70 /r ib	AVX512VBMI2,FUTURE
+VPSHLDD		xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8	rvmi:fv:  evex.nds.128.66.0f3a.w0 71 /r ib	AVX512VBMI2,AVX512VL,FUTURE
+VPSHLDD		ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8	rvmi:fv:  evex.nds.256.66.0f3a.w0 71 /r ib	AVX512VBMI2,AVX512VL,FUTURE
+VPSHLDD		zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8	rvmi:fv:  evex.nds.512.66.0f3a.w0 71 /r ib	AVX512VBMI2,FUTURE
+VPSHLDQ		xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8	rvmi:fv:  evex.nds.128.66.0f3a.w1 71 /r ib	AVX512VBMI2,AVX512VL,FUTURE
+VPSHLDQ		ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8	rvmi:fv:  evex.nds.256.66.0f3a.w1 71 /r ib	AVX512VBMI2,AVX512VL,FUTURE
+VPSHLDQ		zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8	rvmi:fv:  evex.nds.512.66.0f3a.w1 71 /r ib	AVX512VBMI2,FUTURE
+VPSHLDVW	xmmreg|mask|z,xmmreg*,xmmrm128		rvmi:fvm: evex.dds.128.66.0f38.w1 70 /r	AVX512VBMI2,AVX512VL,FUTURE
+VPSHLDVW	ymmreg|mask|z,ymmreg*,ymmrm256		rvmi:fvm: evex.dds.256.66.0f38.w1 70 /r	AVX512VBMI2,AVX512VL,FUTURE
+VPSHLDVW	zmmreg|mask|z,zmmreg*,zmmrm512		rvmi:fvm: evex.dds.512.66.0f38.w1 70 /r	AVX512VBMI2,FUTURE
+VPSHLDVD	xmmreg|mask|z,xmmreg*,xmmrm128|b32	rvmi:fv:  evex.dds.128.66.0f38.w0 71 /r	AVX512VBMI2,AVX512VL,FUTURE
+VPSHLDVD	ymmreg|mask|z,ymmreg*,ymmrm256|b32	rvmi:fv:  evex.dds.256.66.0f38.w0 71 /r	AVX512VBMI2,AVX512VL,FUTURE
+VPSHLDVD	zmmreg|mask|z,zmmreg*,zmmrm512|b32	rvmi:fv:  evex.dds.512.66.0f38.w0 71 /r	AVX512VBMI2,FUTURE
+VPSHLDVQ	xmmreg|mask|z,xmmreg*,xmmrm128|b64	rvmi:fv:  evex.dds.128.66.0f38.w1 71 /r	AVX512VBMI2,AVX512VL,FUTURE
+VPSHLDVQ	ymmreg|mask|z,ymmreg*,ymmrm256|b64	rvmi:fv:  evex.dds.256.66.0f38.w1 71 /r	AVX512VBMI2,AVX512VL,FUTURE
+VPSHLDVQ	zmmreg|mask|z,zmmreg*,zmmrm512|b64	rvmi:fv:  evex.dds.512.66.0f38.w1 71 /r	AVX512VBMI2,FUTURE
+VPSHRDW		xmmreg|mask|z,xmmreg*,xmmrm128,imm8	rvmi:fvm: evex.nds.128.66.0f3a.w1 72 /r ib	AVX512VBMI2,AVX512VL,FUTURE
+VPSHRDW		ymmreg|mask|z,ymmreg*,ymmrm256,imm8	rvmi:fvm: evex.nds.256.66.0f3a.w1 72 /r ib	AVX512VBMI2,AVX512VL,FUTURE
+VPSHRDW		zmmreg|mask|z,zmmreg*,zmmrm512,imm8	rvmi:fvm: evex.nds.512.66.0f3a.w1 72 /r ib	AVX512VBMI2,FUTURE
+VPSHRDD		xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8	rvmi:fv:  evex.nds.128.66.0f3a.w0 73 /r ib	AVX512VBMI2,AVX512VL,FUTURE
+VPSHRDD		ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8	rvmi:fv:  evex.nds.256.66.0f3a.w0 73 /r ib	AVX512VBMI2,AVX512VL,FUTURE
+VPSHRDD		zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8	rvmi:fv:  evex.nds.512.66.0f3a.w0 73 /r ib	AVX512VBMI2,FUTURE
+VPSHRDQ		xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8	rvmi:fv:  evex.nds.128.66.0f3a.w1 73 /r ib	AVX512VBMI2,AVX512VL,FUTURE
+VPSHRDQ		ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8	rvmi:fv:  evex.nds.256.66.0f3a.w1 73 /r ib	AVX512VBMI2,AVX512VL,FUTURE
+VPSHRDQ		zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8	rvmi:fv:  evex.nds.512.66.0f3a.w1 73 /r ib	AVX512VBMI2,FUTURE
+VPSHRDVW	xmmreg|mask|z,xmmreg*,xmmrm128    	rvmi:fvm: evex.dds.128.66.0f38.w1 72 /r	AVX512VBMI2,AVX512VL,FUTURE
+VPSHRDVW	ymmreg|mask|z,ymmreg*,ymmrm256		rvmi:fvm: evex.dds.256.66.0f38.w1 72 /r	AVX512VBMI2,AVX512VL,FUTURE
+VPSHRDVW	zmmreg|mask|z,zmmreg*,zmmrm512		rvmi:fvm: evex.dds.512.66.0f38.w1 72 /r	AVX512VBMI2,FUTURE
+VPSHRDVD	xmmreg|mask|z,xmmreg*,xmmrm128|b32	rvmi:fv:  evex.dds.128.66.0f38.w0 73 /r	AVX512VBMI2,AVX512VL,FUTURE
+VPSHRDVD	ymmreg|mask|z,ymmreg*,ymmrm256|b32	rvmi:fv:  evex.dds.256.66.0f38.w0 73 /r	AVX512VBMI2,AVX512VL,FUTURE
+VPSHRDVD	zmmreg|mask|z,zmmreg*,zmmrm512|b32	rvmi:fv:  evex.dds.512.66.0f38.w0 73 /r	AVX512VBMI2,FUTURE
+VPSHRDVQ	xmmreg|mask|z,xmmreg*,xmmrm128|b64	rvmi:fv:  evex.dds.128.66.0f38.w1 73 /r	AVX512VBMI2,AVX512VL,FUTURE
+VPSHRDVQ	ymmreg|mask|z,ymmreg*,ymmrm256|b64	rvmi:fv:  evex.dds.256.66.0f38.w1 73 /r	AVX512VBMI2,AVX512VL,FUTURE
+VPSHRDVQ	zmmreg|mask|z,zmmreg*,zmmrm512|b64	rvmi:fv:  evex.dds.512.66.0f38.w1 73 /r	AVX512VBMI2,FUTURE
+
+;# AVX512 VNNI
+VPDPBUSD		xmmreg|mask|z,xmmreg*,xmmrm128|b32	rvm:fv:  evex.dds.128.66.0f38.w0 50 /r	AVX512VNNI,AVX512VL,FUTURE
+VPDPBUSD		ymmreg|mask|z,ymmreg*,ymmrm256|b32	rvm:fv:  evex.dds.256.66.0f38.w0 50 /r	AVX512VNNI,AVX512VL,FUTURE
+VPDPBUSD		zmmreg|mask|z,zmmreg*,zmmrm512|b32	rvm:fv:  evex.dds.512.66.0f38.w0 50 /r	AVX512VNNI,FUTURE
+VPDPBUSDS		xmmreg|mask|z,xmmreg*,xmmrm128|b32	rvm:fv:  evex.dds.128.66.0f38.w0 51 /r	AVX512VNNI,AVX512VL,FUTURE
+VPDPBUSDS		ymmreg|mask|z,ymmreg*,ymmrm256|b32	rvm:fv:  evex.dds.256.66.0f38.w0 51 /r	AVX512VNNI,AVX512VL,FUTURE
+VPDPBUSDS		zmmreg|mask|z,zmmreg*,zmmrm512|b32	rvm:fv:  evex.dds.512.66.0f38.w0 51 /r	AVX512VNNI,FUTURE
+VPDPWSSD		xmmreg|mask|z,xmmreg*,xmmrm128|b32	rvm:fv:  evex.dds.128.66.0f38.w0 52 /r	AVX512VNNI,AVX512VL,FUTURE
+VPDPWSSD		ymmreg|mask|z,ymmreg*,ymmrm256|b32	rvm:fv:  evex.dds.256.66.0f38.w0 52 /r	AVX512VNNI,AVX512VL,FUTURE
+VPDPWSSD		zmmreg|mask|z,zmmreg*,zmmrm512|b32	rvm:fv:  evex.dds.512.66.0f38.w0 52 /r	AVX512VNNI,FUTURE
+VPDPWSSDS		xmmreg|mask|z,xmmreg*,xmmrm128|b32	rvm:fv:  evex.dds.128.66.0f38.w0 53 /r	AVX512VNNI,AVX512VL,FUTURE
+VPDPWSSDS		ymmreg|mask|z,ymmreg*,ymmrm256|b32	rvm:fv:  evex.dds.256.66.0f38.w0 53 /r	AVX512VNNI,AVX512VL,FUTURE
+VPDPWSSDS		zmmreg|mask|z,zmmreg*,zmmrm512|b32	rvm:fv:  evex.dds.512.66.0f38.w0 53 /r	AVX512VNNI,FUTURE
+
+;# AVX512 Bit Algorithms
+VPOPCNTB		xmmreg|mask|z,xmmrm128			rm:fvm:  evex.128.66.0f38.w0 54 /r		AVX512BITALG,AVX512VL,FUTURE
+VPOPCNTB		ymmreg|mask|z,ymmrm256			rm:fvm:  evex.256.66.0f38.w0 54 /r		AVX512BITALG,AVX512VL,FUTURE
+VPOPCNTB		zmmreg|mask|z,zmmrm512			rm:fvm:  evex.512.66.0f38.w0 54 /r		AVX512BITALG,FUTURE
+VPOPCNTW		xmmreg|mask|z,xmmrm128			rm:fvm:  evex.128.66.0f38.w1 54 /r		AVX512BITALG,AVX512VL,FUTURE
+VPOPCNTW		ymmreg|mask|z,ymmrm256			rm:fvm:  evex.256.66.0f38.w1 54 /r		AVX512BITALG,AVX512VL,FUTURE
+VPOPCNTW		zmmreg|mask|z,zmmrm512			rm:fvm:  evex.512.66.0f38.w1 54 /r		AVX512BITALG,FUTURE
+VPOPCNTD		xmmreg|mask|z,xmmrm128			rm:fv:   evex.128.66.0f38.w0 55 /r		AVX512VPOPCNTDQ,AVX512VL,FUTURE
+VPOPCNTD		ymmreg|mask|z,ymmrm256			rm:fv:   evex.256.66.0f38.w0 55 /r		AVX512VPOPCNTDQ,AVX512VL,FUTURE
+VPOPCNTD		zmmreg|mask|z,zmmrm512			rm:fv:   evex.512.66.0f38.w0 55 /r		AVX512VPOPCNTDQ,FUTURE
+VPOPCNTQ		xmmreg|mask|z,xmmrm128			rm:fv:   evex.128.66.0f38.w1 55 /r		AVX512VPOPCNTDQ,AVX512VL,FUTURE
+VPOPCNTQ		ymmreg|mask|z,ymmrm256			rm:fv:   evex.256.66.0f38.w1 55 /r		AVX512VPOPCNTDQ,AVX512VL,FUTURE
+VPOPCNTQ		zmmreg|mask|z,zmmrm512			rm:fv:   evex.512.66.0f38.w1 55 /r		AVX512VPOPCNTDQ,FUTURE
+VPSHUFBITQMB		kreg|mask,xmmreg,xmmrm128		rvm:fvm: evex.nds.128.66.0f38.w0 8f /r	AVX512BITALG,AVX512VL,FUTURE
+VPSHUFBITQMB		kreg|mask,ymmreg,ymmrm256		rvm:fvm: evex.nds.256.66.0f38.w0 8f /r	AVX512BITALG,AVX512VL,FUTURE
+VPSHUFBITQMB		kreg|mask,zmmreg,zmmrm512		rvm:fvm: evex.nds.512.66.0f38.w0 8f /r	AVX512BITALG,FUTURE
+
+;# AVX512 4-iteration Multiply-Add
+V4FMADDPS		zmmreg|mask|z,zmmreg|rs4,mem		rvm:m128:evex.dds.512.f2.0f38.w0 9a /r	AVX5124FMAPS,FUTURE,SO
+V4FNMADDPS		zmmreg|mask|z,zmmreg|rs4,mem		rvm:m128:evex.dds.512.f2.0f38.w0 aa /r	AVX5124FMAPS,FUTURE,SO
+V4FMADDSS		zmmreg|mask|z,zmmreg|rs4,mem		rvm:m128:evex.dds.lig.f2.0f38.w0 9b /r	AVX5124FMAPS,FUTURE,SO
+V4FNMADDSS		zmmreg|mask|z,zmmreg|rs4,mem		rvm:m128:evex.dds.lig.f2.0f38.w0 ab /r	AVX5124FMAPS,FUTURE,SO
+
+;# AVX512 4-iteration Dot Product
+V4DPWSSDS		zmmreg|mask|z,zmmreg|rs4,mem		rvm:m128:evex.dds.512.f2.0f38.w0 53 /r	AVX5124VNNIW,FUTURE,SO
+V4DPWSSD		zmmreg|mask|z,zmmreg|rs4,mem		rvm:m128:evex.dds.512.f2.0f38.w0 52 /r	AVX5124VNNIW,FUTURE,SO
+
+;# Intel Software Guard Extensions (SGX)
+ENCLS			void					         np 0f 01 cf				SGX,FUTURE
+ENCLU			void					 	  np 0f 01 d7				SGX,FUTURE
+ENCLV			void						  np 0f 01 c0				SGX,FUTURE
+
+;# Intel Control-Flow Enforcement Technology (CET)
+CLRSSBSY	mem64				m:	f3 0f ae /6				CET,FUTURE
+ENDBR32		void					f3 0f 1e fb				CET,FUTURE
+ENDBR64		void					f3 0f 1e fa				CET,FUTURE
+INCSSPD		reg32				m:	o32 f3 0f ae /5			CET,FUTURE
+INCSSPQ		reg64				m:	o64 f3 0f ae /5			CET,FUTURE,LONG
+RDSSPD		reg32				m:	o32 f3 0f 1e /1			CET,FUTURE
+RDSSPQ		reg64				m:	o64 f3 0f 1e /1			CET,FUTURE,LONG
+RSTORSSP	mem64				m:	f3 0f 01 /5				CET,FUTURE
+SAVEPREVSSP	void					f3 0f 01 ea				CET,FUTURE
+SETSSBSY	void					f3 0f 01 e8				CET,FUTURE
+WRUSSD		mem32,reg32			mr:	o32 66 0f 38 f5 /r			CET,FUTURE
+WRUSSQ		mem64,reg64			mr:	o64 66 0f 38 f5 /r			CET,FUTURE,LONG
+WRSSD		mem32,reg32			mr:	o32 0f 38 f6 /r			CET,FUTURE
+WRSSQ		mem64,reg64			mr:	o64 0f 38 f6 /r			CET,FUTURE,LONG
+
+;# Instructions from ISE doc 319433-040, June 2020
+ENQCMD		reg16,mem512			rm:	a16 f2 0f 38 f8 /r			ENQCMD,FUTURE,SZ,NOLONG
+ENQCMD		reg32,mem512			rm:	a16 f2 0f 38 f8 /r			ENQCMD,FUTURE,SZ,NOLONG,ND
+ENQCMD		reg32,mem512			rm:	a32 f2 0f 38 f8 /r			ENQCMD,FUTURE,SZ
+ENQCMD		reg64,mem512			rm:	a64 f2 0f 38 f8 /r			ENQCMD,FUTURE,SZ,LONG
+ENQCMDS		reg16,mem512			rm:	a16 f3 0f 38 f8 /r			ENQCMD,FUTURE,SZ,NOLONG,PRIV
+ENQCMDS		reg32,mem512			rm:	a16 f3 0f 38 f8 /r			ENQCMD,FUTURE,SZ,NOLONG,PRIV,ND
+ENQCMDS		reg32,mem512			rm:	a32 f3 0f 38 f8 /r			ENQCMD,FUTURE,SZ,PRIV
+ENQCMDS		reg64,mem512			rm:	a64 f3 0f 38 f8 /r			ENQCMD,FUTURE,SZ,PRIV,LONG
+PCONFIG		void					np 0f 01 c5				PCONFIG,FUTURE,PRIV
+SERIALIZE	void					np 0f 01 e8				SERIALIZE,FUTURE
+WBNOINVD	void					f3 0f 09				WBNOINVD,FUTURE,PRIV
+XRESLDTRK	void					f2 0f 01 e9				TSXLDTRK,FUTURE
+XSUSLDTRK	void					f2 0f 01 e8				TSXLDTRK,FUTURE
+
+;# AVX512 Bfloat16 instructions
+VCVTNE2PS2BF16	xmmreg|mask|z,xmmreg*,xmmrm128|b32	rvm:fv:	evex.128.f2.0f38.w0 72 /r	AVX512BF16,FUTURE
+VCVTNE2PS2BF16	ymmreg|mask|z,ymmreg*,ymmrm256|b32	rvm:fv:	evex.256.f2.0f38.w0 72 /r	AVX512BF16,FUTURE
+VCVTNE2PS2BF16	zmmreg|mask|z,zmmreg*,zmmrm512|b32	rvm:fv:	evex.512.f2.0f38.w0 72 /r	AVX512BF16,FUTURE
+VCVTNEPS2BF16	xmmreg|mask|z,xmmreg*,xmmrm128|b32	rvm:fv:	evex.128.f3.0f38.w0 72 /r	AVX512BF16,FUTURE
+VCVTNEPS2BF16	ymmreg|mask|z,ymmreg*,ymmrm256|b32	rvm:fv:	evex.256.f3.0f38.w0 72 /r	AVX512BF16,FUTURE
+VCVTNEPS2BF16	zmmreg|mask|z,zmmreg*,zmmrm512|b32	rvm:fv:	evex.512.f3.0f38.w0 72 /r	AVX512BF16,FUTURE
+VDPBF16PS	xmmreg|mask|z,xmmreg*,xmmrm128|b32	rvm:fv:	evex.128.f3.0f38.w0 52 /r	AVX512BF16,FUTURE
+VDPBF16PS	ymmreg|mask|z,ymmreg*,ymmrm128|b32	rvm:fv:	evex.256.f3.0f38.w0 52 /r	AVX512BF16,FUTURE
+VDPBF16PS	zmmreg|mask|z,zmmreg*,zmmrm128|b32	rvm:fv:	evex.512.f3.0f38.w0 52 /r	AVX512BF16,FUTURE
+
+;# AVX512 mask intersect instructions
+VP2INTERSECTD	kreg|rs2,xmmreg,xmmrm128|b32		rvm:fv:	evex.nds.128.f2.0f38.w0 68 /r	AVX512BF16,FUTURE
+VP2INTERSECTD	kreg|rs2,ymmreg,ymmrm128|b32		rvm:fv:	evex.nds.256.f2.0f38.w0 68 /r	AVX512BF16,FUTURE
+VP2INTERSECTD	kreg|rs2,zmmreg,zmmrm128|b32		rvm:fv:	evex.nds.512.f2.0f38.w0 68 /r	AVX512BF16,FUTURE
+
+;# Intel Advanced Matrix Extensions (AMX)
+LDTILECFG	mem512				m:	vex.128.np.0f38.w0 49 /0		AMXTILE,FUTURE,SZ,LONG
+STTILECFG	mem512				m:	vex.128.66.0f38.w0 49 /0		AMXTILE,FUTURE,SZ,LONG
+TDPBF16PS	tmmreg,tmmreg,tmmreg		rmv:	vex.128.f3.0f38.w0 5c /r		AMXBF16,FUTURE,LONG
+TDPBSSD		tmmreg,tmmreg,tmmreg		rmv:	vex.128.f2.0f38.w0 5e /r		AMXINT8,FUTURE,LONG
+TDPBSUD		tmmreg,tmmreg,tmmreg		rmv:	vex.128.f3.0f38.w0 5e /r		AMXINT8,FUTURE,LONG
+TDPBUSD		tmmreg,tmmreg,tmmreg		rmv:	vex.128.66.0f38.w0 5e /r		AMXINT8,FUTURE,LONG
+TDPBUUD		tmmreg,tmmreg,tmmreg		rmv:	vex.128.np.0f38.w0 5e /r		AMXINT8,FUTURE,LONG
+TILELOADD	tmmreg,mem			rm:	vex.128.f2.0f38.w0 4b /r		AMXTILE,MIB,SIB,FUTURE,SX,LONG
+TILELOADDT1	tmmreg,mem			rm:	vex.128.66.0f38.w0 4b /r		AMXTILE,MIB,SIB,FUTURE,SX,LONG
+TILERELEASE	void					vex.128.np.0f38.w0 49 c0		AMXTILE,FUTURE,LONG
+TILESTORED	mem,tmmreg			mr:	vex.128.f3.0f38.w0 4b /r		AMXTILE,MIB,SIB,FUTURE,SX,LONG
+TILEZERO	tmmreg				r:	vex.128.f2.0f38.w0 49 /3r0		AMXTILE,FUTURE,LONG
+
+;# Intel AVX512-FP16 instructions
+VADDPH		xmmreg|mask|z,xmmreg*,xmmrm16|b16	rvm:fv:  evex.nds.128.np.map5.w0 58 /r    AVX512FP16,AVX512VL,FUTURE
+VADDPH		ymmreg|mask|z,ymmreg*,ymmrm16|b16	rvm:fv:  evex.nds.256.np.map5.w0 58 /r    AVX512FP16,AVX512VL,FUTURE
+VADDPH		zmmreg|mask|z,zmmreg*,zmmrm16|b16|er	rvm:fv:  evex.nds.512.np.map5.w0 58 /r    AVX512FP16,FUTURE
+VADDSH		xmmreg|mask|z,xmmreg*,xmmrm16|er	rvm:t1s: evex.nds.lig.f3.map5.w0 58 /r    AVX512FP16,FUTURE
+VCMPPH		kreg|mask,xmmreg*,xmmrm16|b16,imm8	rvmi:fv: evex.nds.128.np.0f3a.w0 C2 /r ib AVX512FP16,AVX512VL,FUTURE
+VCMPPH		kreg|mask,ymmreg*,ymmrm16|b16,imm8	rvmi:fv: evex.nds.256.np.0f3a.w0 C2 /r ib AVX512FP16,AVX512VL,FUTURE
+VCMPPH		kreg|mask,zmmreg*,zmmrm16|b16|sae,imm8	rvmi:fv: evex.nds.512.np.0f3a.w0 C2 /r ib AVX512FP16,FUTURE
+VCMPSH		kreg|mask,xmmreg*,xmmrm16|sae,imm8	rvmi:t1s: evex.nds.lig.f3.0f3a.w0 C2 /r ib AVX512FP16,FUTURE
+VCOMISH		xmmreg,xmmrm16|sae			rm:fv:	  evex.lig.np.map5.w0 2F /r	    AVX512FP16,FUTURE
+VCVTDQ2PH	xmmreg|mask|z,xmmrm128|b32		rm:fv:	  evex.128.np.map5.w0 5B /r	    AVX512FP16,AVX512VL,FUTURE
+VCVTDQ2PH	ymmreg|mask|z,ymmrm256|b32		rm:fv:	  evex.256.np.map5.w0 5B /r	    AVX512FP16,AVX512VL,FUTURE
+VCVTDQ2PH	zmmreg|mask|z,zmmrm512|b32|er		rm:fv:	  evex.512.np.map5.w0 5B /r	    AVX512FP16,FUTURE
+VCVTPD2PH	xmmreg|mask|z,xmmrm128|b64		rm:fv:	  evex.128.66.map5.w1 5A /r	    AVX512FP16,AVX512VL,FUTURE
+VCVTPD2PH	ymmreg|mask|z,ymmrm256|b64		rm:fv:	  evex.256.66.map5.w1 5A /r	    AVX512FP16,AVX512VL,FUTURE
+VCVTPD2PH	zmmreg|mask|z,zmmrm512|b64|er		rm:fv:	  evex.512.66.map5.w1 5A /r	    AVX512FP16,FUTURE
+VCVTPH2DQ	xmmreg|mask|z,xmmrm64|b16		rm:hv:	  evex.128.66.map5.w0 5B /r	    AVX512FP16,AVX512VL,FUTURE
+VCVTPH2DQ	ymmreg|mask|z,xmmrm128|b16		rm:hv:	  evex.256.66.map5.w0 5B /r	    AVX512FP16,AVX512VL,FUTURE
+VCVTPH2DQ	zmmreg|mask|z,ymmrm256|b16|er		rm:hv:	  evex.512.66.map5.w0 5B /r	    AVX512FP16,FUTURE
+VCVTPH2PD	xmmreg|mask|z,xmmrm32|b16		rm:qvm:  evex.128.np.map5.w0 5A /r	    AVX512FP16,AVX512VL,FUTURE
+VCVTPH2PD	ymmreg|mask|z,xmmrm64|b16		rm:qvm:  evex.256.np.map5.w0 5A /r	    AVX512FP16,AVX512VL,FUTURE
+VCVTPH2PD	zmmreg|mask|z,xmmrm128|b16|sae		rm:qvm:  evex.512.np.map5.w0 5A /r	    AVX512FP16,FUTURE
+VCVTPH2PS	xmmreg,xmmrm64			rm:	vex.128.66.0f38.w0 13 /r	AVX512FC16,FUTURE
+VCVTPH2PS	ymmreg,xmmrm128			rm:	vex.256.66.0f38.w0 13 /r	AVX512FC16,FUTURE
+VCVTPH2PS	xmmreg|mask|z,xmmrm64		rm:hvm:evex.128.66.0f38.w0 13 /r	AVX512,AVX512VL,FUTURE
+VCVTPH2PS	ymmreg|mask|z,xmmrm128		rm:hvm:evex.256.66.0f38.w0 13 /r	AVX512,AVX512VL,FUTURE
+VCVTPH2PS	zmmreg|mask|z,ymmrm256|sae	rm:hvm:evex.512.66.0f38.w0 13 /r	AVX512,FUTURE
+VCVTPH2PSX	xmmreg|mask|z,xmmrm64|b16	rm:hv: evex.128.66.map6.w0 13 /r	AVX512FP16,AVX512VL,FUTURE
+VCVTPH2PSX	ymmreg|mask|z,xmmrm128|b16	rm:hv: evex.256.66.map6.w0 13 /r	AVX512FP16,AVX512VL,FUTURE
+VCVTPH2PSX	zmmreg|mask|z,ymmrm256|b16|sae	rm:hv: evex.512.66.map6.w0 13 /r	AVX512FP16,FUTURE
+VCVTPH2QQ	xmmreg|mask|z,xmmrm32|b16	rm:qvm:evex.128.66.map5.w0 7b /r	AVX512FP16,AVX512VL,FUTURE
+VCVTPH2QQ	ymmreg|mask|z,xmmrm64|b16	rm:qvm:evex.256.66.map5.w0 7b /r	AVX512FP16,AVX512VL,FUTURE
+VCVTPH2QQ	zmmreg|mask|z,xmmrm128|b16|er	rm:qvm:evex.512.66.map5.w0 7b /r	AVX512FP16,FUTURE
+VCVTPH2UDQ	xmmreg|mask|z,xmmrm32|b16	rm:hv: evex.128.map5.w0 79 /r	AVX512FP16,AVX512VL,FUTURE
+VCVTPH2UDQ	ymmreg|mask|z,xmmrm64|b16	rm:hv: evex.256.map5.w0 79 /r	AVX512FP16,AVX512VL,FUTURE
+VCVTPH2UDQ	zmmreg|mask|z,xmmrm128|b16|er	rm:hv: evex.512.map5.w0 79 /r	AVX512FP16,FUTURE
+VCVTPH2UQQ	xmmreg|mask|z,xmmrm32|b16	rm:qvm:evex.128.66.map5.w0 79 /r	AVX512FP16,AVX512VL,FUTURE
+VCVTPH2UQQ	ymmreg|mask|z,xmmrm64|b16	rm:qvm:evex.256.66.map5.w0 79 /r	AVX512FP16,AVX512VL,FUTURE
+VCVTPH2UQQ	zmmreg|mask|z,xmmrm128|b16|er	rm:qvm:evex.512.66.map5.w0 79 /r	AVX512FP16,FUTURE
+VCVTPH2UW	xmmreg|mask|z,xmmrm128|b16	rm:fv: evex.128.np.map5.w0 7d /r	AVX512FP16,AVX512VL,FUTURE
+VCVTPH2UW	ymmreg|mask|z,ymmrm256|b16	rm:fv: evex.256.np.map5.w0 7d /r	AVX512FP16,AVX512VL,FUTURE
+VCVTPH2UW	zmmreg|mask|z,zmmrm512|b16|er	rm:fv: evex.512.np.map5.w0 7d /r	AVX512FP16,FUTURE
+VCVTPH2W	xmmreg|mask|z,xmmrm128|b16	rm:fv: evex.128.66.map5.w0 7d /r	AVX512FP16,AVX512VL,FUTURE
+VCVTPH2W	ymmreg|mask|z,ymmrm256|b16	rm:fv: evex.256.66.map5.w0 7d /r	AVX512FP16,AVX512VL,FUTURE
+VCVTPH2W	zmmreg|mask|z,zmmrm512|b16|er	rm:fv: evex.512.66.map5.w0 7d /r	AVX512FP16,FUTURE
+VCVTPS2PH	xmmrm64,xmmreg,imm8		mri:	vex.128.66.0f3a.w0 1d /r ib	AVX512FC16,AVX512VL,FUTURE
+VCVTPS2PH	xmmrm128,ymmreg,imm8		mri:	vex.256.66.0f3a.w0 1d /r ib	AVX512FC16,AVX512VL,FUTURE
+VCVTPS2PH	xmmreg|mask|z,xmmreg,imm8	mri:hvm: evex.128.66.0f3a.w0 1d /r ib	AVX512,AVX512VL,FUTURE
+VCVTPS2PH	mem64|mask,xmmreg,imm8		mri:hvm: evex.128.66.0f3a.w0 1d /r ib AVX512,AVX512VL,FUTURE
+VCVTPS2PH	xmmreg|mask|z,ymmreg,imm8	mri:hvm: evex.256.66.0f3a.w0 1d /r ib	AVX512,AVX512VL,FUTURE
+VCVTPS2PH	mem128|mask,ymmreg,imm8		mri:hvm: evex.256.66.0f3a.w0 1d /r ib AVX512,AVX512VL,FUTURE
+VCVTPS2PH	ymmreg|mask|z,zmmreg|sae,imm8	mri:hvm: evex.512.66.0f3a.w0 1d /r ib	AVX512,FUTURE
+VCVTPS2PH	mem256|mask,zmmreg|sae,imm8	mri:hvm: evex.512.66.0f3a.w0 1d /r ib AVX512,FUTURE
+VCVTPS2PH	xmmreg|mask|z,xmmrm128|b32	rm:fv: evex.128.66.map5.w0 1d /r	AVX512FP16,AVX512VL,FUTURE
+VCVTPS2PH	ymmreg|mask|z,ymmrm256|b32	rm:fv: evex.256.66.map5.w0 1d /r	AVX512FP16,AVX512VL,FUTURE
+VCVTPS2PH	zmmreg|mask|z,zmmrm512|b32|er	rm:fv: evex.512.66.map5.w0 1d /r	AVX512FP16,FUTURE
+VCVTQQ2PH	xmmreg|mask|z,xmmrm128|b64	rm:fv: evex.128.np.map5.w1 5b /r	AVX512FP16,AVX512VL,FUTURE
+VCVTQQ2PH	ymmreg|mask|z,ymmrm256|b64	rm:fv: evex.256.np.map5.w1 5b /r	AVX512FP16,AVX512VL,FUTURE
+VCVTQQ2PH	zmmreg|mask|z,zmmrm512|b64|er	rm:fv: evex.512.np.map5.w1 5b /r	AVX512FP16,AVX512VL,FUTURE
+VCVTSD2SH	xmmreg|mask|z,xmmreg*,xmmrm64|er rvm:t1s: evex.nds.lig.f2.map5.w1 5a /r	AVX512FP16,FUTURE
+VCVTSH2SD	xmmreg,xmmreg*,xmmrm16|sae	rvm:t1s: evex.nds.lig.f3.map5.w0 5a /r	AVX512FP16,FUTURE
+VCVTSH2SI	reg32,xmmrm16|er		rm:t1s:evex.lig.f3.map5.w0 2d /r	AVX512FP16,FUTURE
+VCVTSH2SI	reg64,xmmrm16|er		rm:t1s:evex.lig.f3.map5.w1 2d /r	AVX512FP16,FUTURE
+VCVTSH2SS	xmmreg|mask|z,xmmreg*,xmmrm16|sae rvm:t1s: evex.nds.lig.map6.w0 13 /r	AVX512FP16,FUTURE
+VCVTSH2USI	reg32,xmmrm16|er		rm:t1s:evex.lig.f3.map5.w0 79 /r	AVX512FP16,FUTURE
+VCVTSH2USI	reg64,xmmrm16|er		rm:t1s:evex.lig.f3.map5.w1 79 /r	AVX512FP16,FUTURE
+VCVTSI2SH	xmmreg,xmmreg*,rm32|er		rvm:t1s: evex.nds.lig.f3.map5.w0 2a /r	AVX512FP16,FUTURE
+VCVTSI2SH	xmmreg,xmmreg*,rm64|er		rvm:t1s: evex.nds.lig.f3.map5.w1 2a /r	AVX512FP16,FUTURE
+VCVTSS2SH	xmmreg,xmmreg*,xmmrm32|er	rvm:t1s: evex.nds.lig.np.map5 1d /r	AVX512FP16,FUTURE
+VCVTTPH2DQ	xmmreg|mask|z,xmmrm64|b16	rm:hv:	evex.128.f3.map5.w0 5b /r	AVX512FP16,AVX512VL,FUTURE
+VCVTTPH2DQ	ymmreg|mask|z,xmmrm128|b16	rm:hv:	evex.256.f3.map5.w0 5b /r	AVX512FP16,AVX512VL,FUTURE
+VCVTTPH2DQ	zmmreg|mask|z,ymmrm256|b16|sae	rm:hv:	evex.512.f3.map5.w0 5b /r	AVX512FP16,FUTURE
+VCVTTPH2QQ	xmmreg|mask|z,xmmrm32|b16	rm:t1s:evex.128.66.map5.w0 7a /r	AVX512FP16,AVX512VL,FUTURE
+VCVTTPH2QQ	ymmreg|mask|z,xmmrm64|b16	rm:t1s:evex.256.66.map5.w0 7a /r	AVX512FP16,AVX512VL,FUTURE
+VCVTTPH2QQ	zmmreg|mask|z,xmmrm128|b16|sae	rm:t1s:evex.512.66.map5.w0 7a /r	AVX512FP16,FUTURE
+VCVTTPH2UDQ	xmmreg|mask|z,xmmrm64|b16	rm:hv:	evex.128.np.map5.w0 78 /r	AVX512FP16,AVX512VL,FUTURE
+VCVTTPH2UDQ	ymmreg|mask|z,xmmrm128|b16	rm:hv:	evex.256.np.map5.w0 78 /r	AVX512FP16,AVX512VL,FUTURE
+VCVTTPH2UDQ	zmmreg|mask|z,ymmrm256|b16|sae	rm:hv:	evex.512.np.map5.w0 78 /r	AVX512FP16,FUTURE
+VCVTTPH2UQQ	xmmreg|mask|z,xmmrm32|b16	rm:t1s:	evex.128.66.map5.w0 78 /r	AVX512FP16,AVX512VL,FUTURE
+VCVTTPH2UQQ	ymmreg|mask|z,xmmrm64|b16	rm:t1s:	evex.256.66.map5.w0 78 /r	AVX512FP16,AVX512VL,FUTURE
+VCVTTPH2UQQ	zmmreg|mask|z,xmmrm128|b16|sae	rm:t1s:	evex.512.66.map5.w0 78 /r	AVX512FP16,FUTURE
+VCVTTPH2UW	xmmreg|mask|z,xmmrm128|b16	rm:fv:	evex.128.np.map5.w0 7c /r	AVX512FP16,AVX512VL,FUTURE
+VCVTTPH2UW	ymmreg|mask|z,ymmrm256|b16	rm:fv:	evex.256.np.map5.w0 7c /r	AVX512FP16,AVX512VL,FUTURE
+VCVTTPH2UW	zmmreg|mask|z,zmmrm512|b16|sae	rm:fv:	evex.512.np.map5.w0 7c /r	AVX512FP16,FUTURE
+VCVTTPH2W	xmmreg|mask|z,xmmrm128|b16	rm:fv:	evex.128.66.map5.w0 7c /r	AVX512FP16,AVX512VL,FUTURE
+VCVTTPH2W	ymmreg|mask|z,ymmrm256|b16	rm:fv:	evex.256.66.map5.w0 7c /r	AVX512FP16,AVX512VL,FUTURE
+VCVTTPH2W	zmmreg|mask|z,zmmrm512|b16|sae	rm:fv:	evex.512.66.map5.w0 7c /r	AVX512FP16,FUTURE
+VCVTTSH2SI	reg32,xmmrm16|sae		rm:t1s:evex.lig.f3.map5.w0 2c /r	AVX512FP16,FUTURE
+VCVTTSH2SI	reg64,xmmrm16|sae		rm:t1s:evex.lig.f3.map5.w1 2c /r	AVX512FP16,FUTURE
+VCVTTSH2USI	reg32,xmmrm16|sae		rm:t1s:evex.lig.f3.map5.w0 78 /r	AVX512FP16,FUTURE
+VCVTTSH2USI	reg64,xmmrm16|sae		rm:t1s:evex.lig.f3.map5.w1 78 /r	AVX512FP16,FUTURE
+VCVTUDQ2PH	xmmreg|mask|z,xmmrm128|b32	rm:fv:	evex.128.f2.map5.w0 7a /r	AVX512FP16,AVX512VL,FUTURE
+VCVTUDQ2PH	ymmreg|mask|z,ymmrm256|b32	rm:fv:	evex.256.f2.map5.w0 7a /r	AVX512FP16,AVX512VL,FUTURE
+VCVTUDQ2PH	zmmreg|mask|z,zmmrm512|b32	rm:fv:	evex.512.f2.map5.w0 7a /r	AVX512FP16,FUTURE
+VCVTUQQ2PH	xmmreg|mask|z,xmmrm128|b32	rm:fv:	evex.128.f2.map5.w1 7a /r	AVX512FP16,AVX512VL,FUTURE
+VCVTUQQ2PH	ymmreg|mask|z,ymmrm256|b32	rm:fv:	evex.256.f2.map5.w1 7a /r	AVX512FP16,AVX512VL,FUTURE
+VCVTUQQ2PH	zmmreg|mask|z,zmmrm512|b32	rm:fv:	evex.512.f2.map5.w1 7a /r	AVX512FP16,FUTURE
+VCVTUSI2SH	xmmreg,xmmreg|er,rm32|er	rvm:t1s: evex.nds.lig.f3.map5.w0 7b /r AVX512FP16,FUTURE
+VCVTUSI2SS	xmmreg,xmmreg|er,rm64|er	rvm:t1s: evex.nds.lig.f3.map5.w1 7b /r AVX512FP16,FUTURE
+VCVTUW2PH	xmmreg|mask|z,xmmrm128|b16	rm:fv: evex.128.f2.map5.w0 7d /r	AVX512FP16,AVX512VL,FUTURE
+VCVTUW2PH	ymmreg|mask|z,ymmrm256|b16	rm:fv: evex.256.f2.map5.w0 7d /r	AVX512FP16,AVX512VL,FUTURE
+VCVTUW2PH	zmmreg|mask|z,zmmrm512|b16|er	rm:fv: evex.512.f2.map5.w0 7d /r	AVX512FP16,FUTURE
+VCVTW2PH	xmmreg|mask|z,xmmrm128|b16	rm:fv: evex.128.f3.map5.w0 7d /r	AVX512FP16,AVX512VL,FUTURE
+VCVTW2PH	ymmreg|mask|z,ymmrm256|b16	rm:fv: evex.256.f3.map5.w0 7d /r	AVX512FP16,AVX512VL,FUTURE
+VCVTW2PH	zmmreg|mask|z,zmmrm512|b16|er	rm:fv: evex.512.f3.map5.w0 7d /r	AVX512FP16,FUTURE
+VDIVPH		xmmreg|mask|z,xmmreg*,xmmrm128|b16	rvm:fv: evex.nds.128.np.map5 5e /r	AVX512FP16,AVX512VL,FUTURE
+VDIVPH		ymmreg|mask|z,ymmreg*,ymmrm256|b16	rvm:fv: evex.nds.256.np.map5 5e /r	AVX512FP16,AVX512VL,FUTURE
+VDIVPH		zmmreg|mask|z,zmmreg*,zmmrm512|b16|er	rvm:fv: evex.nds.512.np.map5 5e /r	AVX512FP16,FUTURE
+VDIVSH		xmmreg|mask|z,xmmreg*,xmmrm16|er	rvm:t1s: evex.nds.lig.f3.map5 5e /r	AVX512FP16,FUTURE
+VFCMADDCPH	xmmreg|mask|z,xmmreg*,xmmrm128|b32	rvm:fv: evex.nds.128.f2.map6.w0 56 /r	AVX512FP16,AVX512VL,FUTURE
+VFCMADDCPH	ymmreg|mask|z,ymmreg*,ymmrm256|b32	rvm:fv: evex.nds.256.f2.map6.w0 56 /r	AVX512FP16,AVX512VL,FUTURE
+VFCMADDCPH	zmmreg|mask|z,zmmreg*,zmmrm512|b32|er	rvm:fv: evex.nds.512.f2.map6.w0 56 /r	AVX512FP16,AVX512VL,FUTURE
+VFMADDCPH	xmmreg|mask|z,xmmreg*,xmmrm128|b32	rvm:fv: evex.nds.128.f3.map6.w0 56 /r	AVX512FP16,AVX512VL,FUTURE
+VFMADDCPH	ymmreg|mask|z,ymmreg*,ymmrm256|b32	rvm:fv: evex.nds.256.f3.map6.w0 56 /r	AVX512FP16,AVX512VL,FUTURE
+VFMADDCPH	zmmreg|mask|z,zmmreg*,zmmrm512|b32|er	rvm:fv: evex.nds.512.f3.map6.w0 56 /r	AVX512FP16,AVX512VL,FUTURE
+VFCMADDCSH	xmmreg|mask|z,xmmreg*,xmmrm32|er	rvm:t1s: evex.nds.lig.f2.map6.w0 57 /r	AVX512FP16,FUTURE
+VFMADDCSH	xmmreg|mask|z,xmmreg*,xmmrm32|er	rvm:t1s: evex.nds.lig.f3.map6.w0 57 /r	AVX512FP16,FUTURE
+VFCMULCPCH	xmmreg|mask|z,xmmreg*,xmmrm128|b32	rvm:fv: evex.nds.128.f2.map6.w0 d6 /r	AVX512FP16,AVX512VL,FUTURE
+VFCMULCPCH	ymmreg|mask|z,ymmreg*,ymmrm256|b32	rvm:fv: evex.nds.256.f2.map6.w0 d6 /r	AVX512FP16,AVX512VL,FUTURE
+VFCMULCPCH	zmmreg|mask|z,zmmreg*,zmmrm512|b32|er	rvm:fv: evex.nds.512.f2.map6.w0 d6 /r	AVX512FP16,AVX512VL,FUTURE
+VFMULCPCH	xmmreg|mask|z,xmmreg*,xmmrm128|b32	rvm:fv: evex.nds.128.f3.map6.w0 d6 /r	AVX512FP16,AVX512VL,FUTURE
+VFMULCPCH	ymmreg|mask|z,ymmreg*,ymmrm256|b32	rvm:fv: evex.nds.256.f3.map6.w0 d6 /r	AVX512FP16,AVX512VL,FUTURE
+VFMULCPCH	zmmreg|mask|z,zmmreg*,zmmrm512|b32|er	rvm:fv: evex.nds.512.f3.map6.w0 d6 /r	AVX512FP16,AVX512VL,FUTURE
+VFCMULCSH	xmmreg|mask|z,xmmreg*,xmmrm32|er	rvm:t1s: evex.nds.lig.f2.map6.w0 d7 /r	AVX512FP16,FUTURE
+VFMULCSH	xmmreg|mask|z,xmmreg*,xmmrm32|er	rvm:t1s: evex.nds.lig.f3.map6.w0 d7 /r	AVX512FP16,FUTURE
+VFMADDSUB132PH	xmmreg|mask|z,xmmreg*,xmmrm128|b16	rvm:fv: evex.nds.128.66.map6.w0 96 /r	AVX512FP16,AVX512VL,FUTURE
+VFMADDSUB132PH	ymmreg|mask|z,ymmreg*,ymmrm256|b16	rvm:fv: evex.nds.256.66.map6.w0 96 /r	AVX512FP16,AVX512VL,FUTURE
+VFMADDSUB132PH	zmmreg|mask|z,zmmreg*,zmmrm512|b16|er	rvm:fv: evex.nds.512.66.map6.w0 96 /r	AVX512FP16,FUTURE
+VFMADDSUB213PH	xmmreg|mask|z,xmmreg*,xmmrm128|b16	rvm:fv: evex.nds.128.66.map6.w0 a6 /r	AVX512FP16,AVX512VL,FUTURE
+VFMADDSUB213PH	ymmreg|mask|z,ymmreg*,ymmrm256|b16	rvm:fv: evex.nds.256.66.map6.w0 a6 /r	AVX512FP16,AVX512VL,FUTURE
+VFMADDSUB213PH	zmmreg|mask|z,zmmreg*,zmmrm512|b16|er	rvm:fv: evex.nds.512.66.map6.w0 a6 /r	AVX512FP16,FUTURE
+VFMADDSUB231PH	xmmreg|mask|z,xmmreg*,xmmrm128|b16	rvm:fv: evex.nds.128.66.map6.w0 b6 /r	AVX512FP16,AVX512VL,FUTURE
+VFMADDSUB231PH	ymmreg|mask|z,ymmreg*,ymmrm256|b16	rvm:fv: evex.nds.256.66.map6.w0 b6 /r	AVX512FP16,AVX512VL,FUTURE
+VFMADDSUB231PH	zmmreg|mask|z,zmmreg*,zmmrm512|b16|er	rvm:fv: evex.nds.512.66.map6.w0 b6 /r	AVX512FP16,FUTURE
+VFMSUBADD132PH	xmmreg|mask|z,xmmreg*,xmmrm128|b16	rvm:fv: evex.nds.128.66.map6.w0 97 /r	AVX512FP16,AVX512VL,FUTURE
+VFMSUBADD132PH	ymmreg|mask|z,ymmreg*,ymmrm256|b16	rvm:fv: evex.nds.256.66.map6.w0 97 /r	AVX512FP16,AVX512VL,FUTURE
+VFMSUBADD132PH	zmmreg|mask|z,zmmreg*,zmmrm512|b16|er	rvm:fv: evex.nds.512.66.map6.w0 97 /r	AVX512FP16,FUTURE
+VFMSUBADD213PH	xmmreg|mask|z,xmmreg*,xmmrm128|b16	rvm:fv: evex.nds.128.66.map6.w0 a7 /r	AVX512FP16,AVX512VL,FUTURE
+VFMSUBADD213PH	ymmreg|mask|z,ymmreg*,ymmrm256|b16	rvm:fv: evex.nds.256.66.map6.w0 a7 /r	AVX512FP16,AVX512VL,FUTURE
+VFMSUBADD213PH	zmmreg|mask|z,zmmreg*,zmmrm512|b16|er	rvm:fv: evex.nds.512.66.map6.w0 a7 /r	AVX512FP16,FUTURE
+VFMSUBADD231PH	xmmreg|mask|z,xmmreg*,xmmrm128|b16	rvm:fv: evex.nds.128.66.map6.w0 b7 /r	AVX512FP16,AVX512VL,FUTURE
+VFMSUBADD231PH	ymmreg|mask|z,ymmreg*,ymmrm256|b16	rvm:fv: evex.nds.256.66.map6.w0 b7 /r	AVX512FP16,AVX512VL,FUTURE
+VFMSUBADD231PH	zmmreg|mask|z,zmmreg*,zmmrm512|b16|er	rvm:fv: evex.nds.512.66.map6.w0 b7 /r	AVX512FP16,FUTURE
+VPMADD132PH	xmmreg|mask|z,xmmreg*,xmmrm128|b16	rvm:fv: evex.nds.128.66.map6.w0 98 /r	AVX512FP16,AVX512VL,FUTURE
+VPMADD132PH	ymmreg|mask|z,ymmreg*,ymmrm256|b16	rvm:fv: evex.nds.256.66.map6.w0 98 /r	AVX512FP16,AVX512VL,FUTURE
+VPMADD132PH	zmmreg|mask|z,zmmreg*,zmmrm512|b16|er	rvm:fv: evex.nds.512.66.map6.w0 98 /r	AVX512FP16,FUTURE
+VPMADD213PH	xmmreg|mask|z,xmmreg*,xmmrm128|b16	rvm:fv: evex.nds.128.66.map6.w0 a8 /r	AVX512FP16,AVX512VL,FUTURE
+VPMADD213PH	ymmreg|mask|z,ymmreg*,ymmrm256|b16	rvm:fv: evex.nds.256.66.map6.w0 a8 /r	AVX512FP16,AVX512VL,FUTURE
+VPMADD213PH	zmmreg|mask|z,zmmreg*,zmmrm512|b16|er	rvm:fv: evex.nds.512.66.map6.w0 a8 /r	AVX512FP16,FUTURE
+VPMADD231PH	xmmreg|mask|z,xmmreg*,xmmrm128|b16	rvm:fv: evex.nds.128.66.map6.w0 b8 /r	AVX512FP16,AVX512VL,FUTURE
+VPMADD231PH	ymmreg|mask|z,ymmreg*,ymmrm256|b16	rvm:fv: evex.nds.256.66.map6.w0 b8 /r	AVX512FP16,AVX512VL,FUTURE
+VPMADD231PH	zmmreg|mask|z,zmmreg*,zmmrm512|b16|er	rvm:fv: evex.nds.512.66.map6.w0 b8 /r	AVX512FP16,FUTURE
+VFMADD132PH	xmmreg|mask|z,xmmreg*,xmmrm128|b16	rvm:fv: evex.nds.128.66.map6.w0 9c /r	AVX512FP16,AVX512VL,FUTURE
+VFMADD132PH	ymmreg|mask|z,ymmreg*,ymmrm256|b16	rvm:fv: evex.nds.256.66.map6.w0 9c /r	AVX512FP16,AVX512VL,FUTURE
+VFMADD132PH	zmmreg|mask|z,zmmreg*,zmmrm512|b16|er	rvm:fv: evex.nds.512.66.map6.w0 9c /r	AVX512FP16,FUTURE
+VFMADD213PH	xmmreg|mask|z,xmmreg*,xmmrm128|b16	rvm:fv: evex.nds.128.66.map6.w0 ac /r	AVX512FP16,AVX512VL,FUTURE
+VFMADD213PH	ymmreg|mask|z,ymmreg*,ymmrm256|b16	rvm:fv: evex.nds.256.66.map6.w0 ac /r	AVX512FP16,AVX512VL,FUTURE
+VFMADD213PH	zmmreg|mask|z,zmmreg*,zmmrm512|b16|er	rvm:fv: evex.nds.512.66.map6.w0 ac /r	AVX512FP16,FUTURE
+VFMADD231PH	xmmreg|mask|z,xmmreg*,xmmrm128|b16	rvm:fv: evex.nds.128.66.map6.w0 bc /r	AVX512FP16,AVX512VL,FUTURE
+VFMADD231PH	ymmreg|mask|z,ymmreg*,ymmrm256|b16	rvm:fv: evex.nds.256.66.map6.w0 bc /r	AVX512FP16,AVX512VL,FUTURE
+VFMADD231PH	zmmreg|mask|z,zmmreg*,zmmrm512|b16|er	rvm:fv: evex.nds.512.66.map6.w0 bc /r	AVX512FP16,FUTURE
+VPMADD132SH	xmmreg|mask|z,xmmreg*,xmmrm16|er	rvm:t1s: evex.nds.lig.66.map6.w0 99 /r	AVX512FP16,FUTURE
+VPMADD213SH	xmmreg|mask|z,xmmreg*,xmmrm16|er	rvm:t1s: evex.nds.lig.66.map6.w0 a9 /r	AVX512FP16,FUTURE
+VPMADD231SH	xmmreg|mask|z,xmmreg*,xmmrm16|er	rvm:t1s: evex.nds.lig.66.map6.w0 b9 /r	AVX512FP16,FUTURE
+VPNMADD132SH	xmmreg|mask|z,xmmreg*,xmmrm16|er	rvm:t1s: evex.nds.lig.66.map6.w0 9d /r	AVX512FP16,FUTURE
+VPNMADD213SH	xmmreg|mask|z,xmmreg*,xmmrm16|er	rvm:t1s: evex.nds.lig.66.map6.w0 ad /r	AVX512FP16,FUTURE
+VPNMADD231SH	xmmreg|mask|z,xmmreg*,xmmrm16|er	rvm:t1s: evex.nds.lig.66.map6.w0 bd /r	AVX512FP16,FUTURE
+VPMSUB132PH	xmmreg|mask|z,xmmreg*,xmmrm128|b16	rvm:fv: evex.nds.128.66.map6.w0 9a /r	AVX512FP16,AVX512VL,FUTURE
+VPMSUB132PH	ymmreg|mask|z,ymmreg*,ymmrm256|b16	rvm:fv: evex.nds.256.66.map6.w0 9a /r	AVX512FP16,AVX512VL,FUTURE
+VPMSUB132PH	zmmreg|mask|z,zmmreg*,zmmrm512|b16|er	rvm:fv: evex.nds.512.66.map6.w0 9a /r	AVX512FP16,FUTURE
+VPMSUB213PH	xmmreg|mask|z,xmmreg*,xmmrm128|b16	rvm:fv: evex.nds.128.66.map6.w0 aa /r	AVX512FP16,AVX512VL,FUTURE
+VPMSUB213PH	ymmreg|mask|z,ymmreg*,ymmrm256|b16	rvm:fv: evex.nds.256.66.map6.w0 aa /r	AVX512FP16,AVX512VL,FUTURE
+VPMSUB213PH	zmmreg|mask|z,zmmreg*,zmmrm512|b16|er	rvm:fv: evex.nds.512.66.map6.w0 aa /r	AVX512FP16,FUTURE
+VPMSUB231PH	xmmreg|mask|z,xmmreg*,xmmrm128|b16	rvm:fv: evex.nds.128.66.map6.w0 ba /r	AVX512FP16,AVX512VL,FUTURE
+VPMSUB231PH	ymmreg|mask|z,ymmreg*,ymmrm256|b16	rvm:fv: evex.nds.256.66.map6.w0 ba /r	AVX512FP16,AVX512VL,FUTURE
+VPMSUB231PH	zmmreg|mask|z,zmmreg*,zmmrm512|b16|er	rvm:fv: evex.nds.512.66.map6.w0 ba /r	AVX512FP16,FUTURE
+VFMSUB132PH	xmmreg|mask|z,xmmreg*,xmmrm128|b16	rvm:fv: evex.nds.128.66.map6.w0 9e /r	AVX512FP16,AVX512VL,FUTURE
+VFMSUB132PH	ymmreg|mask|z,ymmreg*,ymmrm256|b16	rvm:fv: evex.nds.256.66.map6.w0 9e /r	AVX512FP16,AVX512VL,FUTURE
+VFMSUB132PH	zmmreg|mask|z,zmmreg*,zmmrm512|b16|er	rvm:fv: evex.nds.512.66.map6.w0 9e /r	AVX512FP16,FUTURE
+VFMSUB213PH	xmmreg|mask|z,xmmreg*,xmmrm128|b16	rvm:fv: evex.nds.128.66.map6.w0 ae /r	AVX512FP16,AVX512VL,FUTURE
+VFMSUB213PH	ymmreg|mask|z,ymmreg*,ymmrm256|b16	rvm:fv: evex.nds.256.66.map6.w0 ae /r	AVX512FP16,AVX512VL,FUTURE
+VFMSUB213PH	zmmreg|mask|z,zmmreg*,zmmrm512|b16|er	rvm:fv: evex.nds.512.66.map6.w0 ae /r	AVX512FP16,FUTURE
+VFMSUB231PH	xmmreg|mask|z,xmmreg*,xmmrm128|b16	rvm:fv: evex.nds.128.66.map6.w0 be /r	AVX512FP16,AVX512VL,FUTURE
+VFMSUB231PH	ymmreg|mask|z,ymmreg*,ymmrm256|b16	rvm:fv: evex.nds.256.66.map6.w0 be /r	AVX512FP16,AVX512VL,FUTURE
+VFMSUB231PH	zmmreg|mask|z,zmmreg*,zmmrm512|b16|er	rvm:fv: evex.nds.512.66.map6.w0 be /r	AVX512FP16,FUTURE
+VPMSUB132SH	xmmreg|mask|z,xmmreg*,xmmrm16|er	rvm:t1s: evex.nds.lig.66.map6.w0 9b /r	AVX512FP16,FUTURE
+VPMSUB213SH	xmmreg|mask|z,xmmreg*,xmmrm16|er	rvm:t1s: evex.nds.lig.66.map6.w0 ab /r	AVX512FP16,FUTURE
+VPMSUB231SH	xmmreg|mask|z,xmmreg*,xmmrm16|er	rvm:t1s: evex.nds.lig.66.map6.w0 bb /r	AVX512FP16,FUTURE
+VPNMSUB132SH	xmmreg|mask|z,xmmreg*,xmmrm16|er	rvm:t1s: evex.nds.lig.66.map6.w0 9f /r	AVX512FP16,FUTURE
+VPNMSUB213SH	xmmreg|mask|z,xmmreg*,xmmrm16|er	rvm:t1s: evex.nds.lig.66.map6.w0 af /r	AVX512FP16,FUTURE
+VPNMSUB231SH	xmmreg|mask|z,xmmreg*,xmmrm16|er	rvm:t1s: evex.nds.lig.66.map6.w0 bf /r	AVX512FP16,FUTURE
+VFPCLASSPH	kreg|mask,xmmrm128|b16,imm8		rmi:fv: evex.128.np.0f3a.w0 66 /r ib	AVX512FP16,AVX512VL,FUTURE
+VFPCLASSPH	kreg|mask,ymmrm256|b16,imm8		rmi:fv: evex.256.np.0f3a.w0 66 /r ib	AVX512FP16,AVX512VL,FUTURE
+VFPCLASSPH	kreg|mask,zmmrm512|b16,imm8		rmi:fv: evex.512.np.0f3a.w0 66 /r ib	AVX512FP16,FUTURE
+VFPCLASSSH	kreg|mask,xmmrm16,imm8			rmi:t1s: evex.lig.np.0f3a.w0 67 /r ib	AVX512FP16,FUTURE
+VGETEXPPH	xmmreg|mask|z,xmmrm128|b16		rm:fv:	evex.128.66.map6.w0 42 /r	AVX512FP16,AVX512VL,FUTURE
+VGETEXPPH	ymmreg|mask|z,ymmrm256|b16		rm:fv:	evex.256.66.map6.w0 42 /r	AVX512FP16,AVX512VL,FUTURE
+VGETEXPPH	zmmreg|mask|z,zmmrm512|b16|sae		rm:fv:	evex.512.66.map6.w0 42 /r	AVX512FP16,FUTURE
+VGETEXPSH	xmmreg|mask|z,xmmrm16|sae		rm:t1s: evex.128.66.map6.w0 43 /r	AVX512FP16,FUTURE
+VGETMANTPH	xmmreg|mask|z,xmmrm128|b16,imm8		rmi:fv: evex.128.np.0f3a.w0 25 /r ib	AVX512FP16,AVX512VL,FUTURE
+VGETMANTPH	ymmreg|mask|z,ymmrm256|b16,imm8		rmi:fv: evex.256.np.0f3a.w0 25 /r ib	AVX512FP16,AVX512VL,FUTURE
+VGETMANTPH	zmmreg|mask|z,zmmrm512|b16|sae,imm8	rmi:fv: evex.512.np.0f3a.w0 25 /r ib	AVX512FP16,FUTURE
+VGETMANTSH	xmmreg|mask|z,xmmrm16|sae,imm8		rmi:t1s: evex.128.np.0f3a.w0 27 /r ib	AVX512FP16,FUTURE
+VGETMAXPH	xmmreg|mask|z,xmmrm128|b16		rm:fv:	evex.128.np.map5.w0 5f /r	AVX512FP16,AVX512VL,FUTURE
+VGETMAXPH	ymmreg|mask|z,ymmrm256|b16		rm:fv:	evex.256.np.map5.w0 5f /r	AVX512FP16,AVX512VL,FUTURE
+VGETMAXPH	zmmreg|mask|z,zmmrm512|b16|sae		rm:fv:	evex.512.np.map5.w0 5f /r	AVX512FP16,FUTURE
+VGETMAXSH	xmmreg|mask|z,xmmrm16|sae		rm:t1s: evex.lig.f3.map5.w0 5f /r	AVX512FP16,FUTURE
+VGETMINPH	xmmreg|mask|z,xmmrm128|b16		rm:fv:	evex.128.np.map5.w0 5d /r	AVX512FP16,AVX512VL,FUTURE
+VGETMINPH	ymmreg|mask|z,xmmrm256|b16		rm:fv:	evex.256.np.map5.w0 5d /r	AVX512FP16,AVX512VL,FUTURE
+VGETMINPH	zmmreg|mask|z,zmmrm512|b16|sae		rm:fv:	evex.512.np.map5.w0 5d /r	AVX512FP16,FUTURE
+VGETMINSH	xmmreg|mask|z,xmmrm16|sae		rm:t1s: evex.lig.f3.map5.w0 5d /r	AVX512FP16,FUTURE
+VMOVSH		xmmreg|mask|z,mem16			rm:t1s: evex.lig.f3.map5.w0 10 /r	AVX512FP16,FUTURE
+VMOVSH		mem16|mask,xmmreg			mr:t1s: evex.lig.f3.map5.w0 11 /r	AVX512FP16,FUTURE
+VMOVSH		xmmreg|mask|z,xmmreg*,xmmreg		rvm:	evex.nds.lig.f3.map5.w0 10 /r	AVX512FP16,FUTURE
+VMOVSH		xmmreg|mask|z,xmmreg*,xmmreg		rvm:	evex.nds.lig.f3.map5.w0 11 /r	AVX512FP16,FUTURE
+VMOVW		xmmreg|mask|z,rm16			rm:t1s: evex.128.66.map5.wig 6e /r	AVX512FP16,FUTURE
+VMOVW		rm16,xmmreg				mr:t1s: evex.128.66.map5.wig 7e /r	AVX512FP16,FUTURE
+VMULPH		xmmreg|mask|z,xmmreg*,xmmrm128|b16	rvm:fv: evex.nds.128.np.map5.w0 59 /r	AVX512FP16,AVX512VL,FUTURE
+VMULPH		ymmreg|mask|z,ymmreg*,ymmrm256|b16	rvm:fv: evex.nds.256.np.map5.w0 59 /r	AVX512FP16,AVX512VL,FUTURE
+VMULPH		zmmreg|mask|z,zmmreg*,zmmrm512|b16	rvm:fv: evex.nds.512.np.map5.w0 59 /r	AVX512FP16,FUTURE
+VMULSH		xmmreg|mask|z,xmmreg*,xmmrm16|er	rvm:t1s: evex.nds.lig.f3.map5.w0 59 /r	AVX512FP16,FUTURE
+VRCPPH		xmmreg|mask|z,xmmreg*,xmmrm128|b16	rvm:fv: evex.nds.128.66.map6.w0 4c /r	AVX512FP16,AVX512VL,FUTURE
+VRCPPH		ymmreg|mask|z,ymmreg*,ymmrm256|b16	rvm:fv: evex.nds.256.66.map6.w0 4c /r	AVX512FP16,AVX512VL,FUTURE
+VRCPPH		zmmreg|mask|z,zmmreg*,zmmrm512|b16	rvm:fv: evex.nds.512.66.map6.w0 4c /r	AVX512FP16,FUTURE
+VRCPSH		xmmreg|mask|z,xmmreg*,xmmrm16|sae	rvm:t1s: evex.nds.lig.66.map6.w0 4d /r	AVX512FP16,FUTURE
+VREDUCEPH	xmmreg|mask|z,xmmrm128|b16,imm8		rmi:fv: evex.128.np.0f3a.w0 56 /r ib	AVX512FP16,AVX512VL,FUTURE
+VREDUCEPH	ymmreg|mask|z,ymmrm256|b16,imm8		rmi:fv: evex.256.np.0f3a.w0 56 /r ib	AVX512FP16,AVX512VL,FUTURE
+VREDUCEPH	zmmreg|mask|z,zmmrm512|b16|sae,imm8	rmi:fv: evex.512.np.0f3a.w0 56 /r ib	AVX512FP16,FUTURE
+VREDUCESH	xmmreg|mask|z,xmmreg*,xmmrm16|sae,imm8	rmvi:t1s: evex.nds.lig.np.0f3a.w0 57 /r ib	AVX512FP16,FUTURE
+VENDSCALEPH	xmmreg|mask|z,xmmrm128|b16,imm8		rmi:fv: evex.128.np.0f3a.w0 08 /r ib	AVX512FP16,AVX512VL,FUTURE
+VENDSCALEPH	ymmreg|mask|z,ymmrm256|b16,imm8		rmi:fv: evex.256.np.0f3a.w0 08 /r ib	AVX512FP16,AVX512VL,FUTURE
+VENDSCALEPH	zmmreg|mask|z,zmmrm512|b16|sae,imm8	rmi:fv: evex.512.np.0f3a.w0 08 /r ib	AVX512FP16,FUTURE
+VENDSCALESH	xmmreg|mask|z,xmmreg*,xmmrm16|sae,imm8	rvmi:t1s: evex.nds.lig.np.0f3a.w0 0a /r ib	AVX512FP16,FUTURE
+VRSQRTPH	xmmreg|mask|z,xmmrm128|b16,imm8		rmi:fv: evex.128.66.map6.w0 4e /r ib	AVX512FP16,AVX512VL,FUTURE
+VRSQRTPH	ymmreg|mask|z,ymmrm256|b16,imm8		rmi:fv: evex.256.66.map6.w0 4e /r ib	AVX512FP16,AVX512VL,FUTURE
+VRSQRTPH	zmmreg|mask|z,zmmrm512|b16|sae,imm8	rmi:fv: evex.512.66.map6.w0 4e /r ib	AVX512FP16,FUTURE
+VRSQRTSH	xmmreg|mask|z,xmmreg*,xmmrm16|sae,imm8	rvmi:t1s: evex.nds.lig.66.map6.w0 4f /r ib	AVX512FP16,FUTURE
+VSCALEFPH	xmmreg|mask|z,xmmreg*,xmmrm128|b16	rvm:fv: evex.nds.128.66.map6.w0 2c /r	AVX512FP16,AVX512VL,FUTURE
+VSCALEFPH	ymmreg|mask|z,ymmreg*,ymmrm256|b16	rvm:fv: evex.nds.256.66.map6.w0 2c /r	AVX512FP16,AVX512VL,FUTURE
+VSCALEFPH	zmmreg|mask|z,zmmreg*,zmmrm512|b16|er	rvm:fv: evex.nds.512.66.map6.w0 2c /r	AVX512FP16,FUTURE
+VSCALEFSH	xmmreg|mask|z,xmmreg*,xmmrm16|er	rvm:t1s: evex.nds.lig.66.map6.w0 2d /r	AVX512FP16,FUTURE
+VSQRTPH		xmmreg|mask|z,xmmrm128|b16		rm:fv: evex.128.np.map5.w0 51 /r	AVX512FP16,AVX512VL,FUTURE
+VSQRTPH		ymmreg|mask|z,ymmrm256|b16		rm:fv: evex.256.np.map5.w0 51 /r	AVX512FP16,AVX512VL,FUTURE
+VSQRTPH		zmmreg|mask|z,zmmrm512|b16|er		rm:fv: evex.512.np.map5.w0 51 /r	AVX512FP16,FUTURE
+VSQRTSH		xmmreg|mask|z,xmmreg*,xmmrm16|er	rvm:t1s: evex.nds.lig.f3.map5.w0 51 /r	AVX512FP16,FUTURE
+VSUBPH		xmmreg|mask|z,xmmreg*,xmmrm128|b16	rvm:fv: evex.nds.128.np.map5.w0 5c /r	AVX512FP16,AVX512VL,FUTURE
+VSUBPH		ymmreg|mask|z,ymmreg*,ymmrm256|b16	rvm:fv: evex.nds.256.np.map5.w0 5c /r	AVX512FP16,AVX512VL,FUTURE
+VSUBPH		zmmreg|mask|z,zmmreg*,zmmrm512|b16|er	rvm:fv: evex.nds.512.np.map5.w0 5c /r	AVX512FP16,FUTURE
+VSUBSH		xmmreg|mask|z,xmmreg*,xmmrm16|er	rvm:t1s: evex.nds.lig.f3.map5.w0 5c /r	AVX512FP16,FUTURE
+VUCOMISH	xmmreg,xmmrm16|sae			rm:t1s: evex.lig.np.map5.w0 2e /r	AVX512FP16,FUTURE
+
+;# RAO-INT weakly ordered atomic operations
+AADD	   	mem32,reg32				mr:	norexw np 0f 38 fc /r		RAOINT,FUTURE,SD
+AADD	   	mem64,reg64				mr:	o64 np 0f 38 fc /r		RAOINT,FUTURE,SQ,LONG
+AAND	   	mem32,reg32				mr:	norexw 66 0f 38 fc /r		RAOINT,FUTURE,SD
+AAND	   	mem64,reg64				mr:	o64 66 0f 38 fc /r		RAOINT,FUTURE,SQ,LONG
+AXOR	   	mem32,reg32				mr:	norexw f3 0f 38 fc /r		RAOINT,FUTURE,SD
+AXOR	   	mem64,reg64				mr:	o64 f3 0f 38 fc /r		RAOINT,FUTURE,SQ,LONG
+
+;# User interrupts
+CLUI		void						f3 0f 01 ee			UINTR,FUTURE,LONG
+SENDUIPI	reg64					m:	o64nw f3 0f c7 /6		UINTR,FUTURE,LONG
+STUI		void						f3 0f 01 ef			UINTR,FUTURE,LONG
+TESTUI		void						f3 0f 01 ed			UINTR,FUTURE,LONG
+UIRET		void						f3 0f 01 ec			UINTR,FUTURE,LONG
+
+;# Compare, exchange and add conditional
+CMPccXADD       mem32,reg32,reg32			mrv:	vex.128.66.0f38.w0 e0+c /r	CMPCCXADD,FUTURE,LONG,SD
+CMPccXADD       mem64,reg64,reg64			mrv:	vex.128.66.0f38.w1 e0+c /r	CMPCCXADD,FUTURE,LONG,SQ
+
+;# Flexible Return and Exception Delivery
+ERETS           void						f2 0f 01 ca			FRED,FUTURE,PRIV,LONG
+ERETU		void						f3 0f 01 ca			FRED,FUTURE,PRIV,LONG
+LKGS		mem					m:	f2 0f 00 /6			LKGS,FUTURE,PRIV,LONG,SW
+LKGS		reg16					m:	f2 0f 00 /6			LKGS,FUTURE,PRIV,LONG
+LKGS		reg32					m:	f2 0f 00 /6			LKGS,FUTURE,PRIV,LONG,ND
+LKGS		reg64					m:	o64nw f2 0f 00 /6		LKGS,FUTURE,PRIV,LONG,ND,OPT
+LKGS		reg64					m:	o64 f2 0f 00 /6			LKGS,FUTURE,PRIV,LONG
+
+;# WRMSRNS and MSRLIST instructions
+WRMSRNS		void						np 0f 01 c6			WRMSRNS,FUTURE,PRIV,LONG
+RDMSRLIST	void						f2 0f 01 c6			MSRLIST,FUTURE,PRIV,LONG
+WRMSRLIST	void						f3 0f 01 c6			MSRLIST,FUTURE,PRIV,LONG
+
+;# History reset
+HRESET		imm,reg_eax				i-:	f3 0f 3a f0 c0 ib		HRESET,FUTURE,PRIV,SB
+HRESET		imm					i:	f3 0f 3a f0 c0 ib		HRESET,FUTURE,PRIV,SB,ND
+
+;# Systematic names for the hinting nop instructions
+; These should be last in the file
+HINT_NOP0	rm16				m:	o16 0f 18 /0				P6,UNDOC
+HINT_NOP0	rm32				m:	o32 0f 18 /0				P6,UNDOC
+HINT_NOP0	rm64				m:	o64 0f 18 /0				X86_64,LONG,UNDOC
+HINT_NOP1	rm16				m:	o16 0f 18 /1				P6,UNDOC
+HINT_NOP1	rm32				m:	o32 0f 18 /1				P6,UNDOC
+HINT_NOP1	rm64				m:	o64 0f 18 /1				X86_64,LONG,UNDOC
+HINT_NOP2	rm16				m:	o16 0f 18 /2				P6,UNDOC
+HINT_NOP2	rm32				m:	o32 0f 18 /2				P6,UNDOC
+HINT_NOP2	rm64				m:	o64 0f 18 /2				X86_64,LONG,UNDOC
+HINT_NOP3	rm16				m:	o16 0f 18 /3				P6,UNDOC
+HINT_NOP3	rm32				m:	o32 0f 18 /3				P6,UNDOC
+HINT_NOP3	rm64				m:	o64 0f 18 /3				X86_64,LONG,UNDOC
+HINT_NOP4	rm16				m:	o16 0f 18 /4				P6,UNDOC
+HINT_NOP4	rm32				m:	o32 0f 18 /4				P6,UNDOC
+HINT_NOP4	rm64				m:	o64 0f 18 /4				X86_64,LONG,UNDOC
+HINT_NOP5	rm16				m:	o16 0f 18 /5				P6,UNDOC
+HINT_NOP5	rm32				m:	o32 0f 18 /5				P6,UNDOC
+HINT_NOP5	rm64				m:	o64 0f 18 /5				X86_64,LONG,UNDOC
+HINT_NOP6	rm16				m:	o16 0f 18 /6				P6,UNDOC
+HINT_NOP6	rm32				m:	o32 0f 18 /6				P6,UNDOC
+HINT_NOP6	rm64				m:	o64 0f 18 /6				X86_64,LONG,UNDOC
+HINT_NOP7	rm16				m:	o16 0f 18 /7				P6,UNDOC
+HINT_NOP7	rm32				m:	o32 0f 18 /7				P6,UNDOC
+HINT_NOP7	rm64				m:	o64 0f 18 /7				X86_64,LONG,UNDOC
+HINT_NOP8	rm16				m:	o16 0f 19 /0				P6,UNDOC
+HINT_NOP8	rm32				m:	o32 0f 19 /0				P6,UNDOC
+HINT_NOP8	rm64				m:	o64 0f 19 /0				X86_64,LONG,UNDOC
+HINT_NOP9	rm16				m:	o16 0f 19 /1				P6,UNDOC
+HINT_NOP9	rm32				m:	o32 0f 19 /1				P6,UNDOC
+HINT_NOP9	rm64				m:	o64 0f 19 /1				X86_64,LONG,UNDOC
+HINT_NOP10	rm16				m:	o16 0f 19 /2				P6,UNDOC
+HINT_NOP10	rm32				m:	o32 0f 19 /2				P6,UNDOC
+HINT_NOP10	rm64				m:	o64 0f 19 /2				X86_64,LONG,UNDOC
+HINT_NOP11	rm16				m:	o16 0f 19 /3				P6,UNDOC
+HINT_NOP11	rm32				m:	o32 0f 19 /3				P6,UNDOC
+HINT_NOP11	rm64				m:	o64 0f 19 /3				X86_64,LONG,UNDOC
+HINT_NOP12	rm16				m:	o16 0f 19 /4				P6,UNDOC
+HINT_NOP12	rm32				m:	o32 0f 19 /4				P6,UNDOC
+HINT_NOP12	rm64				m:	o64 0f 19 /4				X86_64,LONG,UNDOC
+HINT_NOP13	rm16				m:	o16 0f 19 /5				P6,UNDOC
+HINT_NOP13	rm32				m:	o32 0f 19 /5				P6,UNDOC
+HINT_NOP13	rm64				m:	o64 0f 19 /5				X86_64,LONG,UNDOC
+HINT_NOP14	rm16				m:	o16 0f 19 /6				P6,UNDOC
+HINT_NOP14	rm32				m:	o32 0f 19 /6				P6,UNDOC
+HINT_NOP14	rm64				m:	o64 0f 19 /6				X86_64,LONG,UNDOC
+HINT_NOP15	rm16				m:	o16 0f 19 /7				P6,UNDOC
+HINT_NOP15	rm32				m:	o32 0f 19 /7				P6,UNDOC
+HINT_NOP15	rm64				m:	o64 0f 19 /7				X86_64,LONG,UNDOC
+HINT_NOP16	rm16				m:	o16 0f 1a /0				P6,UNDOC
+HINT_NOP16	rm32				m:	o32 0f 1a /0				P6,UNDOC
+HINT_NOP16	rm64				m:	o64 0f 1a /0				X86_64,LONG,UNDOC
+HINT_NOP17	rm16				m:	o16 0f 1a /1				P6,UNDOC
+HINT_NOP17	rm32				m:	o32 0f 1a /1				P6,UNDOC
+HINT_NOP17	rm64				m:	o64 0f 1a /1				X86_64,LONG,UNDOC
+HINT_NOP18	rm16				m:	o16 0f 1a /2				P6,UNDOC
+HINT_NOP18	rm32				m:	o32 0f 1a /2				P6,UNDOC
+HINT_NOP18	rm64				m:	o64 0f 1a /2				X86_64,LONG,UNDOC
+HINT_NOP19	rm16				m:	o16 0f 1a /3				P6,UNDOC
+HINT_NOP19	rm32				m:	o32 0f 1a /3				P6,UNDOC
+HINT_NOP19	rm64				m:	o64 0f 1a /3				X86_64,LONG,UNDOC
+HINT_NOP20	rm16				m:	o16 0f 1a /4				P6,UNDOC
+HINT_NOP20	rm32				m:	o32 0f 1a /4				P6,UNDOC
+HINT_NOP20	rm64				m:	o64 0f 1a /4				X86_64,LONG,UNDOC
+HINT_NOP21	rm16				m:	o16 0f 1a /5				P6,UNDOC
+HINT_NOP21	rm32				m:	o32 0f 1a /5				P6,UNDOC
+HINT_NOP21	rm64				m:	o64 0f 1a /5				X86_64,LONG,UNDOC
+HINT_NOP22	rm16				m:	o16 0f 1a /6				P6,UNDOC
+HINT_NOP22	rm32				m:	o32 0f 1a /6				P6,UNDOC
+HINT_NOP22	rm64				m:	o64 0f 1a /6				X86_64,LONG,UNDOC
+HINT_NOP23	rm16				m:	o16 0f 1a /7				P6,UNDOC
+HINT_NOP23	rm32				m:	o32 0f 1a /7				P6,UNDOC
+HINT_NOP23	rm64				m:	o64 0f 1a /7				X86_64,LONG,UNDOC
+HINT_NOP24	rm16				m:	o16 0f 1b /0				P6,UNDOC
+HINT_NOP24	rm32				m:	o32 0f 1b /0				P6,UNDOC
+HINT_NOP24	rm64				m:	o64 0f 1b /0				X86_64,LONG,UNDOC
+HINT_NOP25	rm16				m:	o16 0f 1b /1				P6,UNDOC
+HINT_NOP25	rm32				m:	o32 0f 1b /1				P6,UNDOC
+HINT_NOP25	rm64				m:	o64 0f 1b /1				X86_64,LONG,UNDOC
+HINT_NOP26	rm16				m:	o16 0f 1b /2				P6,UNDOC
+HINT_NOP26	rm32				m:	o32 0f 1b /2				P6,UNDOC
+HINT_NOP26	rm64				m:	o64 0f 1b /2				X86_64,LONG,UNDOC
+HINT_NOP27	rm16				m:	o16 0f 1b /3				P6,UNDOC
+HINT_NOP27	rm32				m:	o32 0f 1b /3				P6,UNDOC
+HINT_NOP27	rm64				m:	o64 0f 1b /3				X86_64,LONG,UNDOC
+HINT_NOP28	rm16				m:	o16 0f 1b /4				P6,UNDOC
+HINT_NOP28	rm32				m:	o32 0f 1b /4				P6,UNDOC
+HINT_NOP28	rm64				m:	o64 0f 1b /4				X86_64,LONG,UNDOC
+HINT_NOP29	rm16				m:	o16 0f 1b /5				P6,UNDOC
+HINT_NOP29	rm32				m:	o32 0f 1b /5				P6,UNDOC
+HINT_NOP29	rm64				m:	o64 0f 1b /5				X86_64,LONG,UNDOC
+HINT_NOP30	rm16				m:	o16 0f 1b /6				P6,UNDOC
+HINT_NOP30	rm32				m:	o32 0f 1b /6				P6,UNDOC
+HINT_NOP30	rm64				m:	o64 0f 1b /6				X86_64,LONG,UNDOC
+HINT_NOP31	rm16				m:	o16 0f 1b /7				P6,UNDOC
+HINT_NOP31	rm32				m:	o32 0f 1b /7				P6,UNDOC
+HINT_NOP31	rm64				m:	o64 0f 1b /7				X86_64,LONG,UNDOC
+HINT_NOP32	rm16				m:	o16 0f 1c /0				P6,UNDOC
+HINT_NOP32	rm32				m:	o32 0f 1c /0				P6,UNDOC
+HINT_NOP32	rm64				m:	o64 0f 1c /0				X86_64,LONG,UNDOC
+HINT_NOP33	rm16				m:	o16 0f 1c /1				P6,UNDOC
+HINT_NOP33	rm32				m:	o32 0f 1c /1				P6,UNDOC
+HINT_NOP33	rm64				m:	o64 0f 1c /1				X86_64,LONG,UNDOC
+HINT_NOP34	rm16				m:	o16 0f 1c /2				P6,UNDOC
+HINT_NOP34	rm32				m:	o32 0f 1c /2				P6,UNDOC
+HINT_NOP34	rm64				m:	o64 0f 1c /2				X86_64,LONG,UNDOC
+HINT_NOP35	rm16				m:	o16 0f 1c /3				P6,UNDOC
+HINT_NOP35	rm32				m:	o32 0f 1c /3				P6,UNDOC
+HINT_NOP35	rm64				m:	o64 0f 1c /3				X86_64,LONG,UNDOC
+HINT_NOP36	rm16				m:	o16 0f 1c /4				P6,UNDOC
+HINT_NOP36	rm32				m:	o32 0f 1c /4				P6,UNDOC
+HINT_NOP36	rm64				m:	o64 0f 1c /4				X86_64,LONG,UNDOC
+HINT_NOP37	rm16				m:	o16 0f 1c /5				P6,UNDOC
+HINT_NOP37	rm32				m:	o32 0f 1c /5				P6,UNDOC
+HINT_NOP37	rm64				m:	o64 0f 1c /5				X86_64,LONG,UNDOC
+HINT_NOP38	rm16				m:	o16 0f 1c /6				P6,UNDOC
+HINT_NOP38	rm32				m:	o32 0f 1c /6				P6,UNDOC
+HINT_NOP38	rm64				m:	o64 0f 1c /6				X86_64,LONG,UNDOC
+HINT_NOP39	rm16				m:	o16 0f 1c /7				P6,UNDOC
+HINT_NOP39	rm32				m:	o32 0f 1c /7				P6,UNDOC
+HINT_NOP39	rm64				m:	o64 0f 1c /7				X86_64,LONG,UNDOC
+HINT_NOP40	rm16				m:	o16 0f 1d /0				P6,UNDOC
+HINT_NOP40	rm32				m:	o32 0f 1d /0				P6,UNDOC
+HINT_NOP40	rm64				m:	o64 0f 1d /0				X86_64,LONG,UNDOC
+HINT_NOP41	rm16				m:	o16 0f 1d /1				P6,UNDOC
+HINT_NOP41	rm32				m:	o32 0f 1d /1				P6,UNDOC
+HINT_NOP41	rm64				m:	o64 0f 1d /1				X86_64,LONG,UNDOC
+HINT_NOP42	rm16				m:	o16 0f 1d /2				P6,UNDOC
+HINT_NOP42	rm32				m:	o32 0f 1d /2				P6,UNDOC
+HINT_NOP42	rm64				m:	o64 0f 1d /2				X86_64,LONG,UNDOC
+HINT_NOP43	rm16				m:	o16 0f 1d /3				P6,UNDOC
+HINT_NOP43	rm32				m:	o32 0f 1d /3				P6,UNDOC
+HINT_NOP43	rm64				m:	o64 0f 1d /3				X86_64,LONG,UNDOC
+HINT_NOP44	rm16				m:	o16 0f 1d /4				P6,UNDOC
+HINT_NOP44	rm32				m:	o32 0f 1d /4				P6,UNDOC
+HINT_NOP44	rm64				m:	o64 0f 1d /4				X86_64,LONG,UNDOC
+HINT_NOP45	rm16				m:	o16 0f 1d /5				P6,UNDOC
+HINT_NOP45	rm32				m:	o32 0f 1d /5				P6,UNDOC
+HINT_NOP45	rm64				m:	o64 0f 1d /5				X86_64,LONG,UNDOC
+HINT_NOP46	rm16				m:	o16 0f 1d /6				P6,UNDOC
+HINT_NOP46	rm32				m:	o32 0f 1d /6				P6,UNDOC
+HINT_NOP46	rm64				m:	o64 0f 1d /6				X86_64,LONG,UNDOC
+HINT_NOP47	rm16				m:	o16 0f 1d /7				P6,UNDOC
+HINT_NOP47	rm32				m:	o32 0f 1d /7				P6,UNDOC
+HINT_NOP47	rm64				m:	o64 0f 1d /7				X86_64,LONG,UNDOC
+HINT_NOP48	rm16				m:	o16 0f 1e /0				P6,UNDOC
+HINT_NOP48	rm32				m:	o32 0f 1e /0				P6,UNDOC
+HINT_NOP48	rm64				m:	o64 0f 1e /0				X86_64,LONG,UNDOC
+HINT_NOP49	rm16				m:	o16 0f 1e /1				P6,UNDOC
+HINT_NOP49	rm32				m:	o32 0f 1e /1				P6,UNDOC
+HINT_NOP49	rm64				m:	o64 0f 1e /1				X86_64,LONG,UNDOC
+HINT_NOP50	rm16				m:	o16 0f 1e /2				P6,UNDOC
+HINT_NOP50	rm32				m:	o32 0f 1e /2				P6,UNDOC
+HINT_NOP50	rm64				m:	o64 0f 1e /2				X86_64,LONG,UNDOC
+HINT_NOP51	rm16				m:	o16 0f 1e /3				P6,UNDOC
+HINT_NOP51	rm32				m:	o32 0f 1e /3				P6,UNDOC
+HINT_NOP51	rm64				m:	o64 0f 1e /3				X86_64,LONG,UNDOC
+HINT_NOP52	rm16				m:	o16 0f 1e /4				P6,UNDOC
+HINT_NOP52	rm32				m:	o32 0f 1e /4				P6,UNDOC
+HINT_NOP52	rm64				m:	o64 0f 1e /4				X86_64,LONG,UNDOC
+HINT_NOP53	rm16				m:	o16 0f 1e /5				P6,UNDOC
+HINT_NOP53	rm32				m:	o32 0f 1e /5				P6,UNDOC
+HINT_NOP53	rm64				m:	o64 0f 1e /5				X86_64,LONG,UNDOC
+HINT_NOP54	rm16				m:	o16 0f 1e /6				P6,UNDOC
+HINT_NOP54	rm32				m:	o32 0f 1e /6				P6,UNDOC
+HINT_NOP54	rm64				m:	o64 0f 1e /6				X86_64,LONG,UNDOC
+HINT_NOP55	rm16				m:	o16 0f 1e /7				P6,UNDOC
+HINT_NOP55	rm32				m:	o32 0f 1e /7				P6,UNDOC
+HINT_NOP55	rm64				m:	o64 0f 1e /7				X86_64,LONG,UNDOC
+HINT_NOP56	rm16				m:	o16 0f 1f /0				P6,UNDOC
+HINT_NOP56	rm32				m:	o32 0f 1f /0				P6,UNDOC
+HINT_NOP56	rm64				m:	o64 0f 1f /0				X86_64,LONG,UNDOC
+HINT_NOP57	rm16				m:	o16 0f 1f /1				P6,UNDOC
+HINT_NOP57	rm32				m:	o32 0f 1f /1				P6,UNDOC
+HINT_NOP57	rm64				m:	o64 0f 1f /1				X86_64,LONG,UNDOC
+HINT_NOP58	rm16				m:	o16 0f 1f /2				P6,UNDOC
+HINT_NOP58	rm32				m:	o32 0f 1f /2				P6,UNDOC
+HINT_NOP58	rm64				m:	o64 0f 1f /2				X86_64,LONG,UNDOC
+HINT_NOP59	rm16				m:	o16 0f 1f /3				P6,UNDOC
+HINT_NOP59	rm32				m:	o32 0f 1f /3				P6,UNDOC
+HINT_NOP59	rm64				m:	o64 0f 1f /3				X86_64,LONG,UNDOC
+HINT_NOP60	rm16				m:	o16 0f 1f /4				P6,UNDOC
+HINT_NOP60	rm32				m:	o32 0f 1f /4				P6,UNDOC
+HINT_NOP60	rm64				m:	o64 0f 1f /4				X86_64,LONG,UNDOC
+HINT_NOP61	rm16				m:	o16 0f 1f /5				P6,UNDOC
+HINT_NOP61	rm32				m:	o32 0f 1f /5				P6,UNDOC
+HINT_NOP61	rm64				m:	o64 0f 1f /5				X86_64,LONG,UNDOC
+HINT_NOP62	rm16				m:	o16 0f 1f /6				P6,UNDOC
+HINT_NOP62	rm32				m:	o32 0f 1f /6				P6,UNDOC
+HINT_NOP62	rm64				m:	o64 0f 1f /6				X86_64,LONG,UNDOC
+HINT_NOP63	rm16				m:	o16 0f 1f /7				P6,UNDOC
+HINT_NOP63	rm32				m:	o32 0f 1f /7				P6,UNDOC
+HINT_NOP63	rm64				m:	o64 0f 1f /7				X86_64,LONG,UNDOC

_service:tar_scm:nasm-2.16.03.tar.xz/x86/insns.pl Added

@@ -0,0 +1,1167 @@
+#!/usr/bin/perl
+## --------------------------------------------------------------------------
+##
+##   Copyright 1996-2020 The NASM Authors - All Rights Reserved
+##   See the file AUTHORS included with the NASM distribution for
+##   the specific copyright holders.
+##
+##   Redistribution and use in source and binary forms, with or without
+##   modification, are permitted provided that the following
+##   conditions are met:
+##
+##   * Redistributions of source code must retain the above copyright
+##     notice, this list of conditions and the following disclaimer.
+##   * Redistributions in binary form must reproduce the above
+##     copyright notice, this list of conditions and the following
+##     disclaimer in the documentation and/or other materials provided
+##     with the distribution.
+##
+##     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+##     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+##     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+##     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+##     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+##     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+##     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+##     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+##     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+##     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+##     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+##     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+##     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+##
+## --------------------------------------------------------------------------
+
+#
+# insns.pl
+#
+# Parse insns.dat and produce generated source code files
+
+require 'x86/insns-iflags.ph';
+
+# Opcode prefixes which need their own opcode tables
+# LONGER PREFIXES FIRST!
+@disasm_prefixes = qw(0F24 0F25 0F38 0F3A 0F7A 0FA6 0FA7 0F);
+
+# This should match MAX_OPERANDS from nasm.h
+$MAX_OPERANDS = 5;
+
+# Add VEX/XOP prefixes
+@vex_class = ( 'vex', 'xop', 'evex' );
+$vex_classes = scalar(@vex_class);
+@vexlist = ();
+%vexmap = ();
+for ($c = 0; $c < $vex_classes; $c++) {
+    $vexmap{$vex_class$c} = $c;
+    for ($m = 0; $m < 32; $m++) {
+        for ($p = 0; $p < 4; $p++) {
+            push(@vexlist, sprintf("%s%02X%01X", $vex_class$c, $m, $p));
+        }
+    }
+}
+@disasm_prefixes = (@vexlist, @disasm_prefixes, '');
+%disasm_prefixes = map { $_ => 1 } @disasm_prefixes;
+
+@bytecode_count = (0) x 256;
+
+# Push to an array reference, creating the array if needed
+sub xpush($@) {
+    my $ref = shift @_;
+
+    $$ref =  unless (defined($$ref));
+    return push(@$$ref, @_);
+}
+
+# Generate relaxed form patterns if applicable
+sub relaxed_forms(@) {
+    my @field_list = @_;
+
+    foreach my $fields (@_) {
+	next unless ($fields->1 =~ /\*/);
+
+	# This instruction has relaxed form(s)
+	if ($fields->2 !~ /^\/) {
+	    warn "$fname:$line: has an * operand but uses raw bytecodes\n";
+	    next;
+	}
+
+	my $opmask = 0;
+	my @ops = split(/,/, $fields->1);
+	for (my $oi = 0; $oi < scalar @ops; $oi++) {
+	    if ($ops$oi =~ /\*$/) {
+		if ($oi == 0) {
+		    warn "$fname:$line: has a first operand with a *\n";
+		    next;
+		}
+		$opmask |= 1 << $oi;
+	    }
+	}
+
+	for (my $oi = 1; $oi < (1 << scalar @ops); $oi++) {
+	    if (($oi & ~$opmask) == 0) {
+		my @xops = ();
+		my $omask = ~$oi;
+		for ($oj = 0; $oj < scalar(@ops); $oj++) {
+		    if ($omask & 1) {
+			push(@xops, $ops$oj);
+		    }
+		    $omask >>= 1;
+		}
+		my @ff = @$fields;
+		$ff1 = join(',', @xops);
+		$ff4 = $oi;
+		push(@field_list, @ff);
+	    }
+	}
+    }
+
+    return @field_list;
+}
+
+# Condition codes used by the disassembler
+my %condd = ( 'o'   =>  0, 'no'  =>  1, 'c'   =>  2,  'nc'  =>  3,
+	      'z'   =>  4, 'nz'  =>  5, 'na'  =>  6,  'a'   =>  7,
+	      's'   =>  8, 'ns'  =>  9, 'pe'  => 10,  'po'  => 11,
+	      'l'   => 12, 'nl'  => 13, 'ng'  => 14,  'g'   => 15 );
+
+# All condition code aliases
+my %conds = ( %condd,
+	      'ae'  =>  3, 'b'   =>  2, 'be'  =>  6,  'e'   =>  4,
+	      'ge'  => 13, 'le'  => 14, 'nae' =>  2,  'nb'  =>  3,
+	      'nbe' =>  7, 'ne'  =>  5, 'nge' => 12,  'nle' => 15,
+	      'np'  => 11, 'p'   => 10 );
+
+my @conds = sort keys(%conds);
+
+# Generate conditional form patterns if applicable
+sub conditional_forms(@) {
+    my @field_list = ();
+
+    foreach my $fields (@_) {
+	# This is a case sensitive match!
+	if ($fields->0 !~ /cc/) {
+	    # Not a conditional instruction pattern
+	    push(@field_list, $fields);
+	    next;
+	}
+
+	if ($fields->2 !~ /^\/) {
+	    warn "$fname:$line: conditional instruction using raw bytecodes\n";
+	    next;
+	}
+
+	foreach my $cc (@conds) {
+	    my @ff = @$fields;
+
+	    $ff0 =~ s/cc/\U$cc/;
+
+	    unless ($ff2 =~ /^(\.*?)\b(0-9a-f{2})\+c\b(.*\)$/) {
+		warn "$fname:$line: invalid conditional encoding";
+		next;
+	    }
+	    $ff2 = $1.sprintf('%02x', hex($2)^$conds{$cc}).$3;
+
+	    unless (defined($condd{$cc}) || $ff3 =~ /\bND\b/) {
+		$ff3 .= ',ND';
+	    }
+
+	    push(@field_list, @ff);
+	}
+    }
+    return @field_list;
+}
+
+print STDERR "Reading insns.dat...\n";
+
+@args   = ();
+undef $output;
+foreach $arg ( @ARGV ) {
+    if ( $arg =~ /^\-/ ) {
+        if  ( $arg =~ /^\-(abdin|fhc)$/ ) {
+            $output = $1;
+        } else {
+            die "$0: Unknown option: ${arg}\n";
+        }
+    } else {
+        push (@args, $arg);
+    }
+}
+
+die if (scalar(@args) != 2);	# input output
+($fname, $oname) = @args;
+
+open(F, '<', $fname) || die "unable to open $fname";
+
+%dinstables = ();
+@bytecode_list = ();
+%aname = ();
+
+$line = 0;
+$insns = 0;
+$n_opcodes = 0;
+my @allpatterns = ();
+
+while (<F>) {
+    $line++;
+    chomp;
+    next if ( /^\s*(\;.*|)$/ );   # comments or blank lines
+
+    unless (/^\s*(\S+)\s+(\S+)\s+(\S+|\.*\)\s+(\S+)\s*$/) {
+        warn "line $line does not contain four fields\n";
+        next;
+    }
+    my @field_list = ($1, $2, $3, $4, 0);
+    @field_list = relaxed_forms(@field_list);
+    @field_list = conditional_forms(@field_list);
+
+    foreach my $fields (@field_list) {
+        ($formatted, $nd) = format_insn(@$fields);
+        if ($formatted) {
+            $insns++;
+	    xpush(\$aname{$fields->0}, $formatted);
+        }
+	if (!defined($k_opcodes{$fields->0})) {
+	    $k_opcodes{$fields->0} = $n_opcodes++;
+	}
+        if ($formatted && !$nd) {
+            push @big, $formatted;
+            my @sseq = startseq($fields->2, $fields->4);
+            foreach my $i (@sseq) {
+                xpush(\$dinstables{$i}, $#big);
+            }
+        }
+    }
+}
+
+close F;
+
+#
+# Generate the bytecode array.  At this point, @bytecode_list contains
+# the full set of bytecodes.
+#
+
+# Sort by descending length
+@bytecode_list = sort { scalar(@$b) <=> scalar(@$a) } @bytecode_list;
+@bytecode_array = ();
+%bytecode_pos = ();
+$bytecode_next = 0;
+foreach $bl (@bytecode_list) {
+    my $h = hexstr(@$bl);
+    next if (defined($bytecode_pos{$h}));
+
+    push(@bytecode_array, $bl);
+    while ($h ne '') {
+        $bytecode_pos{$h} = $bytecode_next;
+        $h = substr($h, 2);
+        $bytecode_next++;
+    }
+}
+undef @bytecode_list;
+
+@opcodes = sort { $k_opcodes{$a} <=> $k_opcodes{$b} } keys(%k_opcodes);
+
+if ( $output eq 'b') {
+    print STDERR "Writing $oname...\n";
+
+    open(B, '>', $oname);
+
+    print B "/* This file auto-generated from insns.dat by insns.pl" .
+        " - don't edit it */\n\n";
+
+    print B "#include \"nasm.h\"\n";
+    print B "#include \"insns.h\"\n\n";
+
+    print B "const uint8_t nasm_bytecodes$bytecode_next = {\n";
+
+    $p = 0;
+    foreach $bl (@bytecode_array) {
+        printf B "    /* %5d */ ", $p;
+        foreach $d (@$bl) {
+            printf B "%#o,", $d;
+            $p++;
+        }
+        printf B "\n";
+    }
+    print B "};\n";
+
+    print B "\n";
+    print B "/*\n";
+    print B " * Bytecode frequencies (including reuse):\n";
+    print B " *\n";
+    for ($i = 0; $i < 32; $i++) {
+        print B " *";
+        for ($j = 0; $j < 256; $j += 32) {
+            print B " |" if ($j);
+            printf B " %3o:%4d", $i+$j, $bytecode_count$i+$j;
+        }
+        print B "\n";
+    }
+    print B " */\n";
+
+    close B;
+}
+
+if ( $output eq 'a' ) {
+    print STDERR "Writing $oname...\n";
+
+    open(A, '>', $oname);
+
+    print A "/* This file auto-generated from insns.dat by insns.pl" .
+        " - don't edit it */\n\n";
+
+    print A "#include \"nasm.h\"\n";
+    print A "#include \"insns.h\"\n\n";
+
+    foreach $i (@opcodes) {
+        print A "static const struct itemplate instrux_${i} = {\n";
+        foreach $j (@{$aname{$i}}) {
+            print A "    ", codesubst($j), "\n";
+        }
+        print A "    ITEMPLATE_END\n};\n\n";
+    }
+    print A "const struct itemplate * const nasm_instructions = {\n";
+    foreach $i (@opcodes) {
+        print A "    instrux_${i},\n";
+    }
+    print A "};\n";
+
+    close A;
+}
+
+if ( $output eq 'd' ) {
+    print STDERR "Writing $oname...\n";
+
+    open(D, '>', $oname);
+
+    print D "/* This file auto-generated from insns.dat by insns.pl" .
+        " - don't edit it */\n\n";
+
+    print D "#include \"nasm.h\"\n";
+    print D "#include \"insns.h\"\n\n";
+
+    print D "static const struct itemplate instrux = {\n";
+    $n = 0;
+    foreach $j (@big) {
+        printf D "    /* %4d */ %s\n", $n++, codesubst($j);
+    }
+    print D "};\n";
+
+    foreach $h (sort(keys(%dinstables))) {
+        next if ($h eq ''); # Skip pseudo-instructions
+	print D "\nstatic const struct itemplate * const itable_${h} = {\n";
+        foreach $j (@{$dinstables{$h}}) {
+            print D "    instrux + $j,\n";
+        }
+        print D "};\n";
+    }
+
+    @prefix_list = ();
+    foreach $h (@disasm_prefixes) {
+        for ($c = 0; $c < 256; $c++) {
+            $nn = sprintf("%s%02X", $h, $c);
+            if ($is_prefix{$nn} || defined($dinstables{$nn})) {
+                # At least one entry in this prefix table
+                push(@prefix_list, $h);
+                $is_prefix{$h} = 1;
+                last;
+            }
+        }
+    }
+
+    foreach $h (@prefix_list) {
+        print D "\n";
+        print D "static " unless ($h eq '');
+        print D "const struct disasm_index ";
+        print D ($h eq '') ? 'itable' : "itable_$h";
+        print D "256 = {\n";
+        for ($c = 0; $c < 256; $c++) {
+            $nn = sprintf("%s%02X", $h, $c);
+            if ($is_prefix{$nn}) {
+		if ($dinstables{$nn}) {
+		    print STDERR "$fname: ambiguous decoding, prefix $nn aliases:\n";
+		    foreach my $dc (@{$dinstables{$nn}}) {
+			print STDERR codesubst($big$dc), "\n";
+		    }
+		    exit 1;
+		}
+                printf D "    /* 0x%02x */ { itable_%s, -1 },\n", $c, $nn;
+            } elsif ($dinstables{$nn}) {
+                printf D "    /* 0x%02x */ { itable_%s, %u },\n", $c,
+                       $nn, scalar(@{$dinstables{$nn}});
+            } else {
+                printf D "    /* 0x%02x */ { NULL, 0 },\n", $c;
+            }
+        }
+        print D "};\n";
+    }
+
+    printf D "\nconst struct disasm_index * const itable_vexNASM_VEX_CLASSES324 =\n";
+    print D "{\n";
+    for ($c = 0; $c < $vex_classes; $c++) {
+        print D "    {\n";
+        for ($m = 0; $m < 32; $m++) {
+            print D "        { ";
+            for ($p = 0; $p < 4; $p++) {
+                $vp = sprintf("%s%02X%01X", $vex_class$c, $m, $p);
+                printf D "%-15s",
+                       ($is_prefix{$vp} ? sprintf("itable_%s,", $vp) : 'NULL,');
+            }
+            print D "},\n";
+        }
+        print D "    },\n";
+    }
+    print D "};\n";
+
+    close D;
+}
+
+if ( $output eq 'i' ) {
+    print STDERR "Writing $oname...\n";
+
+    open(I, '>', $oname);
+
+    print I "/* This file is auto-generated from insns.dat by insns.pl" .
+        " - don't edit it */\n\n";
+    print I "/* This file in included by nasm.h */\n\n";
+
+    print I "/* Instruction names */\n\n";
+    print I "#ifndef NASM_INSNSI_H\n";
+    print I "#define NASM_INSNSI_H 1\n\n";
+    print I "enum opcode {\n";
+    $maxlen = 0;
+    foreach $i (@opcodes) {
+        print I "\tI_${i},\n";
+        $len = length($i);
+        $maxlen = $len if ( $len > $maxlen );
+    }
+    print I "\tI_none = -1\n";
+    print I "};\n\n";
+    print I "#define MAX_INSLEN ", $maxlen, "\n";
+    print I "#define NASM_VEX_CLASSES ", $vex_classes, "\n";
+    print I "#define NO_DECORATOR\t{", join(',',(0) x $MAX_OPERANDS), "}\n";
+    print I "#endif /* NASM_INSNSI_H */\n";
+
+    close I;
+}
+
+if ( $output eq 'n' ) {
+    print STDERR "Writing $oname...\n";
+
+    open(N, '>', $oname);
+
+    print N "/* This file is auto-generated from insns.dat by insns.pl" .
+        " - don't edit it */\n\n";
+    print N "#include \"tables.h\"\n\n";
+
+    print N "const char * const nasm_insn_names = {";
+    foreach $i (@opcodes) {
+        print N "\n\t\"\L$i\"";
+	print N ',' if ($i < $#opcodes);
+    }
+    print N "\n};\n";
+    close N;
+}
+
+if ( $output eq 'fh') {
+    write_iflaggen_h();
+}
+
+if ( $output eq 'fc') {
+    write_iflag_c();
+}
+
+printf STDERR "Done: %d instructions\n", $insns;
+
+# Count primary bytecodes, for statistics
+sub count_bytecodes(@) {
+    my $skip = 0;
+    foreach my $bc (@_) {
+        if ($skip) {
+            $skip--;
+            next;
+        }
+        $bytecode_count$bc++;
+        if ($bc >= 01 && $bc <= 04) {
+            $skip = $bc;
+        } elsif (($bc & ~03) == 010) {
+            $skip = 1;
+        } elsif (($bc & ~013) == 0144) {
+            $skip = 1;
+        } elsif ($bc == 0172 || $bc == 0173) {
+            $skip = 1;
+        } elsif (($bc & ~3) == 0260 || $bc == 0270) {   # VEX
+            $skip = 2;
+        } elsif (($bc & ~3) == 0240 || $bc == 0250) {   # EVEX
+            $skip = 3;
+        } elsif ($bc == 0330) {
+            $skip = 1;
+        }
+    }
+}
+
+sub format_insn($$$$$) {
+    my ($opcode, $operands, $codes, $flags, $relax) = @_;
+    my $nd = 0;
+    my ($num, $flagsindex);
+    my @bytecode;
+    my ($op, @ops, @opsize, $opp, @opx, @oppx, @decos, @opevex);
+
+    return (undef, undef) if $operands eq "ignore";
+
+    # format the operands
+    $operands =~ s/\*//g;
+    $operands =~ s/:/|colon,/g;
+    @ops = ();
+    @opsize = ();
+    @decos = ();
+    if ($operands ne 'void') {
+        foreach $op (split(/,/, $operands)) {
+	    my $opsz = 0;
+            @opx = ();
+            @opevex = ();
+            foreach $opp (split(/\|/, $op)) {
+                @oppx = ();
+                if ($opp =~ s/^(b(16|32|64)|mask|z|er|sae)$//) {
+                    push(@opevex, $1);
+                }
+
+                if ($opp =~ s/(?<!\d)(8|16|32|64|80|128|256|512)$//) {
+                    push(@oppx, "bits$1");
+		    $opsz = $1 + 0;
+                }
+                $opp =~ s/^mem$/memory/;
+                $opp =~ s/^memory_offs$/mem_offs/;
+                $opp =~ s/^imm$/immediate/;
+                $opp =~ s/^(a-z+)rm$/rm_$1/;
+                $opp =~ s/^rm$/rm_gpr/;
+                $opp =~ s/^reg$/reg_gpr/;
+                # only for evex insns, high-16 regs are allowed
+                if ($codes !~ /(^|\s)evex\./) {
+                    $opp =~ s/^(rm_xyzmm)$/$1_l16/;
+                    $opp =~ s/^(xyzmm)reg$/$1_l16/;
+                }
+                push(@opx, $opp, @oppx) if $opp;
+            }
+            $op = join('|', @opx);
+            push(@ops, $op);
+	    push(@opsize, $opsz);
+            push(@decos, (@opevex ? join('|', @opevex) : '0'));
+        }
+    }
+
+    $num = scalar(@ops);
+    while (scalar(@ops) < $MAX_OPERANDS) {
+        push(@ops, '0');
+	push(@opsize, 0);
+        push(@decos, '0');
+    }
+    $operands = join(',', @ops);
+    $operands =~ tr/a-z/A-Z/;
+
+    $decorators = "{" . join(',', @decos) . "}";
+    if ($decorators =~ /^{(0,)+0}$/) {
+        $decorators = "NO_DECORATOR";
+    }
+    $decorators =~ tr/a-z/A-Z/;
+
+    # Remember if we have an ARx flag
+    my $arx = undef;
+
+    # expand and uniqify the flags
+    my %flags;
+    foreach my $flag (split(',', $flags)) {
+	next if ($flag eq '');
+
+	if ($flag eq 'ND') {
+	    $nd = 1;
+	} else {
+	    $flags{$flag}++;
+	}
+
+	if ($flag eq 'NEVER' || $flag eq 'NOP') {
+	    # These flags imply OBSOLETE
+	    $flags{'OBSOLETE'}++;
+	}
+
+	if ($flag =~ /^AR(0-9+)$/) {
+	    $arx = $1+0;
+	}
+    }
+
+    if ($codes =~ /evex\./) {
+	$flags{'EVEX'}++;
+    } elsif ($codes =~ /(vex|xop)\./) {
+	$flags{'VEX'}++;
+    }
+
+    # Look for SM flags clearly inconsistent with operand bitsizes
+    if ($flags{'SM'} || $flags{'SM2'}) {
+	my $ssize = 0;
+	my $e = $flags{'SM2'} ? 2 : $MAX_OPERANDS;
+	for (my $i = 0; $i < $e; $i++) {
+	    next if (!$opsize$i);
+	    if (!$ssize) {
+		$ssize = $opsize$i;
+	    } elsif ($opsize$i != $ssize) {
+		die "$fname:$line: inconsistent SM flag for argument $i\n";
+	    }
+	}
+    }
+
+    # Look for Sx flags that can never match operand bitsizes. If the
+    # intent is to never match (require explicit sizes), use the SX flag.
+    # This doesn't apply to registers that pre-define specific sizes;
+    # this should really be derived from include/opflags.h...
+    my %sflags = ( 'SB' => 8, 'SW' => 16, 'SD' => 32, 'SQ' => 64,
+		   'SO' => 128, 'SY' => 256, 'SZ' => 512 );
+    my $s = defined($arx) ? $arx : 0;
+    my $e = defined($arx) ? $arx : $MAX_OPERANDS - 1;
+
+    foreach my $sf (keys(%sflags)) {
+	next if (!$flags{$sf});
+	for (my $i = $s; $i <= $e; $i++) {
+	    if ($opsize$i && $ops$i !~ /\breg_(gpr|cdtsreg)\b/) {
+		die "$fname:$line: inconsistent $sf flag for argument $i ($ops$i)\n"
+		    if ($opsize$i != $sflags{$sf});
+	    }
+	}
+    }
+
+    $flagsindex = insns_flag_index(keys %flags);
+    die "$fname:$line: error in flags $flags\n" unless (defined($flagsindex));
+
+    @bytecode = (decodify($codes, $relax), 0);
+    push(@bytecode_list, @bytecode);
+    $codes = hexstr(@bytecode);
+    count_bytecodes(@bytecode);
+
+    ("{I_$opcode, $num, {$operands}, $decorators, \@\@CODES-$codes\@\@, $flagsindex},", $nd);
+}
+
+#
+# Look for @@CODES-xxx@@ sequences and replace them with the appropriate
+# offset into nasm_bytecodes
+#
+sub codesubst($) {
+    my($s) = @_;
+    my $n;
+
+    while ($s =~ /\@\@CODES-(0-9A-F+)\@\@/) {
+        my $pos = $bytecode_pos{$1};
+        if (!defined($pos)) {
+            die "$fname:$line: no position assigned to byte code $1\n";
+        }
+        $s = $` . "nasm_bytecodes+${pos}" . "$'";
+    }
+    return $s;
+}
+
+sub addprefix ($@) {
+    my ($prefix, @list) = @_;
+    my $x;
+    my @l = ();
+
+    foreach $x (@list) {
+        push(@l, sprintf("%s%02X", $prefix, $x));
+    }
+
+    return @l;
+}
+
+#
+# Turn a code string into a sequence of bytes
+#
+sub decodify($$) {
+  # Although these are C-syntax strings, by convention they should have
+  # only octal escapes (for directives) and hexadecimal escapes
+  # (for verbatim bytes)
+    my($codestr, $relax) = @_;
+
+    if ($codestr =~ /^\s*\(^\*)\\s*$/) {
+        return byte_code_compile($1, $relax);
+    }
+
+    my $c = $codestr;
+    my @codes = ();
+
+    unless ($codestr eq 'ignore') {
+        while ($c ne '') {
+            if ($c =~ /^\\x(0-9a-f+)(.*)$/i) {
+                push(@codes, hex $1);
+                $c = $2;
+                next;
+            } elsif ($c =~ /^\\(0-7{1,3})(.*)$/) {
+                push(@codes, oct $1);
+                $c = $2;
+                next;
+            } else {
+                die "$fname:$line: unknown code format in \"$codestr\"\n";
+            }
+        }
+    }
+
+    return @codes;
+}
+
+# Turn a numeric list into a hex string
+sub hexstr(@) {
+    my $s = '';
+    my $c;
+
+    foreach $c (@_) {
+        $s .= sprintf("%02X", $c);
+    }
+    return $s;
+}
+
+# Here we determine the range of possible starting bytes for a given
+# instruction. We need only consider the codes:
+# \1234      mean literal bytes, of course
+# \10123     mean byte plus register value
+# \0 or \340   mean give up and return empty set
+# \344567    mean PUSH/POP of segment registers: special case
+# \17234     skip is4 control byte
+# \26x \270    skip VEX control bytes
+# \24x \250    skip EVEX control bytes
+sub startseq($$) {
+    my ($codestr, $relax) = @_;
+    my $word;
+    my @codes = ();
+    my $c = $codestr;
+    my($c0, $c1, $i);
+    my $prefix = '';
+
+    @codes = decodify($codestr, $relax);
+
+    while (defined($c0 = shift(@codes))) {
+        $c1 = $codes0;
+        if ($c0 >= 01 && $c0 <= 04) {
+            # Fixed byte string
+            my $fbs = $prefix;
+            while (defined($c0)) {
+                if ($c0 >= 01 && $c0 <= 04) {
+                    while ($c0--) {
+                        $fbs .= sprintf("%02X", shift(@codes));
+                    }
+                } else {
+                    last;
+                }
+                $c0 = shift(@codes);
+            }
+
+            foreach $pfx (@disasm_prefixes) {
+		my $len = length($pfx);
+                if (substr($fbs, 0, $len) eq $pfx) {
+                    $prefix = $pfx;
+                    $fbs = substr($fbs, $len, 2);
+                    last;
+                }
+            }
+
+            if ($fbs ne '') {
+                return ($prefix.$fbs);
+            }
+
+            unshift(@codes, $c0);
+        } elsif ($c0 >= 010 && $c0 <= 013) {
+            return addprefix($prefix, $c1..($c1+7));
+        } elsif (($c0 & ~013) == 0144) {
+            return addprefix($prefix, $c1, $c1|2);
+        } elsif ($c0 == 0 || $c0 == 0340) {
+            return $prefix;
+        } elsif (($c0 & ~3) == 0260 || $c0 == 0270 ||
+                 ($c0 & ~3) == 0240 || $c0 == 0250) {
+            my($c,$m,$wlp);
+            $m   = shift(@codes);
+            $wlp = shift(@codes);
+            $c = ($m >> 6);
+            $m = $m & 31;
+            $prefix .= sprintf('%s%02X%01X', $vex_class$c, $m, $wlp & 3);
+            if ($c0 < 0260) {
+                my $tuple = shift(@codes);
+            }
+        } elsif ($c0 >= 0172 && $c0 <= 173) {
+            shift(@codes);      # Skip is4 control byte
+        } else {
+            # We really need to be able to distinguish "forbidden"
+            # and "ignorable" codes here
+        }
+    }
+    return ();
+}
+
+# EVEX tuple types offset is 0300. e.g. 0301 is for full vector(fv).
+sub tupletype($) {
+    my ($tuplestr) = @_;
+    my %tuple_codes = (
+        ''      => 000,
+        'fv'    => 001,
+        'hv'    => 002,
+        'fvm'   => 003,
+        't1s8'  => 004,
+        't1s16' => 005,
+        't1s'   => 006,
+        't1f32' => 007,
+        't1f64' => 010,
+        't2'    => 011,
+        't4'    => 012,
+        't8'    => 013,
+        'hvm'   => 014,
+        'qvm'   => 015,
+        'ovm'   => 016,
+        'm128'  => 017,
+        'dup'   => 020,
+    );
+
+    if (defined $tuple_codes{$tuplestr}) {
+        return 0300 + $tuple_codes{$tuplestr};
+    } else {
+        die "$fname:$line: undefined tuple type : $tuplestr\n";
+    }
+}
+
+#
+# This function takes a series of byte codes in a format which is more
+# typical of the Intel documentation, and encode it.
+#
+# The format looks like:
+#
+# operands: opcodes
+#
+# The operands word lists the order of the operands:
+#
+# r = register field in the modr/m
+# m = modr/m
+# v = VEX "v" field
+# i = immediate
+# s = register field of is4/imz2 field
+# - = implicit (unencoded) operand
+# x = indeX register of mib. 014..017 bytecodes are used.
+#
+# For an operand that should be filled into more than one field,
+# enter it as e.g. "r+v".
+#
+sub byte_code_compile($$) {
+    my($str, $relax) = @_;
+    my $opr;
+    my $opc;
+    my @codes = ();
+    my $litix = undef;
+    my %oppos = ();
+    my $i;
+    my ($op, $oq);
+    my $opex;
+
+    my %imm_codes = (
+        'ib'        => 020,     # imm8
+        'ib,u'      => 024,     # Unsigned imm8
+        'iw'        => 030,     # imm16
+        'ib,s'      => 0274,    # imm8 sign-extended to opsize or bits
+        'iwd'       => 034,     # imm16 or imm32, depending on opsize
+        'id'        => 040,     # imm32
+        'id,s'      => 0254,    # imm32 sign-extended to 64 bits
+        'iwdq'      => 044,     # imm16/32/64, depending on addrsize
+        'rel8'      => 050,
+        'iq'        => 054,
+        'rel16'     => 060,
+        'rel'       => 064,     # 16 or 32 bit relative operand
+        'rel32'     => 070,
+        'seg'       => 074,
+    );
+    my %plain_codes = (
+        'o16'       => 0320,    # 16-bit operand size
+        'o32'       => 0321,    # 32-bit operand size
+        'odf'       => 0322,    # Operand size is default
+        'o64'       => 0324,    # 64-bit operand size requiring REX.W
+        'o64nw'     => 0323,    # Implied 64-bit operand size (no REX.W)
+        'a16'       => 0310,
+        'a32'       => 0311,
+        'adf'       => 0312,    # Address size is default
+        'a64'       => 0313,
+        '!osp'      => 0364,
+        '!asp'      => 0365,
+        'f2i'       => 0332,    # F2 prefix, but 66 for operand size is OK
+        'f3i'       => 0333,    # F3 prefix, but 66 for operand size is OK
+        'mustrep'   => 0336,
+        'mustrepne' => 0337,
+        'rex.l'     => 0334,
+        'norexb'    => 0314,
+        'norexx'    => 0315,
+        'norexr'    => 0316,
+        'norexw'    => 0317,
+        'repe'      => 0335,
+        'nohi'      => 0325,    # Use spl/bpl/sil/dil even without REX
+        'nof3'      => 0326,    # No REP 0xF3 prefix permitted
+        'norep'     => 0331,    # No REP prefix permitted
+        'wait'      => 0341,    # Needs a wait prefix
+        'resb'      => 0340,
+        'np'        => 0360,    # No prefix
+        'jcc8'      => 0370,    # Match only if Jcc possible with single byte
+        'jmp8'      => 0371,    # Match only if JMP possible with single byte
+        'jlen'      => 0373,    # Length of jump
+        'hlexr'     => 0271,
+        'hlenl'     => 0272,
+        'hle'       => 0273,
+
+        # This instruction takes XMM VSIB
+        'vsibx'     => 0374,
+        'vm32x'     => 0374,
+        'vm64x'     => 0374,
+
+        # This instruction takes YMM VSIB
+        'vsiby'     => 0375,
+        'vm32y'     => 0375,
+        'vm64y'     => 0375,
+
+        # This instruction takes ZMM VSIB
+        'vsibz'     => 0376,
+        'vm32z'     => 0376,
+        'vm64z'     => 0376,
+    );
+
+    unless ($str =~ /^((^\s:*)\:*(^\s:*)\:|)\s*(.*\S)\s*$/) {
+        die "$fname:$line: cannot parse: $str\n";
+    }
+    $opr = lc($2);
+    $tuple = lc($3);    # Tuple type for AVX512
+    $opc = lc($4);
+
+    $op = 0;
+    for ($i = 0; $i < length($opr); $i++) {
+        my $c = substr($opr,$i,1);
+        if ($c eq '+') {
+            $op--;
+        } else {
+            if ($relax & 1) {
+                $op--;
+            }
+            $relax >>= 1;
+            $oppos{$c} = $op++;
+        }
+    }
+    $tup = tupletype($tuple);
+
+    my $last_imm = 'h';
+    my $prefix_ok = 1;
+    foreach $op (split(/\s*(?:\s|(?=\/\\))/, $opc)) {
+        my $pc = $plain_codes{$op};
+
+        if (defined $pc) {
+            # Plain code
+            push(@codes, $pc);
+        } elsif ($prefix_ok && $op =~ /^(66|f2|f3)$/) {
+            # 66/F2/F3 prefix used as an opcode extension
+            if ($op eq '66') {
+                push(@codes, 0361);
+            } elsif ($op eq 'f2') {
+                push(@codes, 0332);
+            } else {
+                push(@codes, 0333);
+            }
+        } elsif ($op =~ /^0-9a-f{2}$/) {
+            if (defined($litix) && $litix+$codes$litix+1 == scalar @codes &&
+                $codes$litix < 4) {
+                $codes$litix++;
+                push(@codes, hex $op);
+            } else {
+                $litix = scalar(@codes);
+                push(@codes, 01, hex $op);
+            }
+            $prefix_ok = 0;
+        } elsif ($op eq '/r') {
+            if (!defined($oppos{'r'}) || !defined($oppos{'m'})) {
+                die "$fname:$line: $op requires r and m operands\n";
+            }
+            $opex = (($oppos{'m'} & 4) ? 06 : 0) |
+                (($oppos{'r'} & 4) ? 05 : 0);
+            push(@codes, $opex) if ($opex);
+            # if mib is composed with two separate operands - ICC style
+            push(@codes, 014 + ($oppos{'x'} & 3)) if (defined($oppos{'x'}));
+            push(@codes, 0100 + (($oppos{'m'} & 3) << 3) + ($oppos{'r'} & 3));
+            $prefix_ok = 0;
+        } elsif ($op =~ m:^/(0-7)$:) {
+            if (!defined($oppos{'m'})) {
+                die "$fname:$line: $op requires an m operand\n";
+            }
+            push(@codes, 06) if ($oppos{'m'} & 4);
+            push(@codes, 0200 + (($oppos{'m'} & 3) << 3) + $1);
+            $prefix_ok = 0;
+	} elsif ($op =~ m:^/(0-3?)r(0-7)$:) {
+	    if (!defined($oppos{'r'})) {
+                die "$fname:$line: $op requires an r operand\n";
+	    }
+	    push(@codes, 05) if ($oppos{'r'} & 4);
+	    push(@codes, 0171);
+	    push(@codes, (($1+0) << 6) + (($oppos{'r'} & 3) << 3) + $2);
+	    $prefix_ok = 0;
+        } elsif ($op =~ /^(vex|xop)(|\..*)$/) {
+            my $vexname = $1;
+            my $c = $vexmap{$vexname};
+            my ($m,$w,$l,$p) = (undef,2,undef,0);
+            my $has_nds = 0;
+            my @subops = split(/\./, $op);
+            shift @subops;      # Drop prefix
+                foreach $oq (@subops) {
+                    if ($oq eq '128' || $oq eq 'l0' || $oq eq 'lz') {
+                        $l = 0;
+                    } elsif ($oq eq '256' || $oq eq 'l1') {
+                        $l = 1;
+                    } elsif ($oq eq 'lig') {
+                        $l = 2;
+                    } elsif ($oq eq 'w0') {
+                        $w = 0;
+                    } elsif ($oq eq 'w1') {
+                        $w = 1;
+                    } elsif ($oq eq 'wig') {
+                        $w = 2;
+                    } elsif ($oq eq 'ww') {
+                        $w = 3;
+                    } elsif ($oq eq 'np' || $oq eq 'p0') {
+                        $p = 0;
+                    } elsif ($oq eq '66' || $oq eq 'p1') {
+                        $p = 1;
+                    } elsif ($oq eq 'f3' || $oq eq 'p2') {
+                        $p = 2;
+                    } elsif ($oq eq 'f2' || $oq eq 'p3') {
+                        $p = 3;
+                    } elsif ($oq eq '0f') {
+                        $m = 1;
+                    } elsif ($oq eq '0f38') {
+                        $m = 2;
+                    } elsif ($oq eq '0f3a') {
+                        $m = 3;
+                    } elsif ($oq =~ /^(m|map)(0-9+)$/) {
+                        $m = $2+0;
+                    } elsif ($oq eq 'nds' || $oq eq 'ndd' || $oq eq 'dds') {
+                        if (!defined($oppos{'v'})) {
+                            die "$fname:$line: $vexname.$oq without 'v' operand\n";
+                        }
+                        $has_nds = 1;
+                    } else {
+                        die "$fname:$line: undefined \U$vexname\E subcode: $oq\n";
+                    }
+                }
+            if (!defined($m) || !defined($w) || !defined($l) || !defined($p)) {
+                die "$fname:$line: missing fields in \U$vexname\E specification\n";
+            }
+	    my $minmap = ($c == 1) ? 8 : 0; # 0-31 for VEX, 8-31 for XOP
+	    if ($m < $minmap || $m > 31) {
+		die "$fname:$line: Only maps ${minmap}-31 are valid for \U${vexname}\n";
+	    }
+            push(@codes, defined($oppos{'v'}) ? 0260+($oppos{'v'} & 3) : 0270,
+                 ($c << 6)+$m, ($w << 4)+($l << 2)+$p);
+            $prefix_ok = 0;
+        } elsif ($op =~ /^(evex)(|\..*)$/) {
+            my $c = $vexmap{$1};
+            my ($m,$w,$l,$p) = (undef,2,undef,0);
+            my $has_nds = 0;
+            my @subops = split(/\./, $op);
+            shift @subops;      # Drop prefix
+                foreach $oq (@subops) {
+                    if ($oq eq '128' || $oq eq 'l0' || $oq eq 'lz' || $oq eq 'lig') {
+                        $l = 0;
+                    } elsif ($oq eq '256' || $oq eq 'l1') {
+                        $l = 1;
+                    } elsif ($oq eq '512' || $oq eq 'l2') {
+                        $l = 2;
+                    } elsif ($oq eq 'w0') {
+                        $w = 0;
+                    } elsif ($oq eq 'w1') {
+                        $w = 1;
+                    } elsif ($oq eq 'wig') {
+                        $w = 2;
+                    } elsif ($oq eq 'ww') {
+                        $w = 3;
+                    } elsif ($oq eq 'np' || $oq eq 'p0') {
+                        $p = 0;
+                    } elsif ($oq eq '66' || $oq eq 'p1') {
+                        $p = 1;
+                    } elsif ($oq eq 'f3' || $oq eq 'p2') {
+                        $p = 2;
+                    } elsif ($oq eq 'f2' || $oq eq 'p3') {
+                        $p = 3;
+                    } elsif ($oq eq '0f') {
+                        $m = 1;
+                    } elsif ($oq eq '0f38') {
+                        $m = 2;
+                    } elsif ($oq eq '0f3a') {
+                        $m = 3;
+                    } elsif ($oq eq 'map5') {
+                        $m = 5;
+                    } elsif ($oq eq 'map6') {
+                        $m = 6;
+                    } elsif ($oq =~ /^m(0-9+)$/) {
+                        $m = $1+0;
+                    } elsif ($oq eq 'nds' || $oq eq 'ndd' || $oq eq 'dds') {
+                        if (!defined($oppos{'v'})) {
+                            die "$fname:$line: evex.$oq without 'v' operand\n";
+                        }
+                        $has_nds = 1;
+                    } else {
+                        die "$fname:$line: undefined EVEX subcode: $oq\n";
+                    }
+                }
+            if (!defined($m) || !defined($w) || !defined($l) || !defined($p)) {
+                die "$fname:$line: missing fields in EVEX specification\n";
+            }
+	    if ($m > 15) {
+		die "$fname:$line: Only maps 0-15 are valid for EVEX\n";
+	    }
+            push(@codes, defined($oppos{'v'}) ? 0240+($oppos{'v'} & 3) : 0250,
+                 ($c << 6)+$m, ($w << 4)+($l << 2)+$p, $tup);
+            $prefix_ok = 0;
+        } elsif (defined $imm_codes{$op}) {
+            if ($op eq 'seg') {
+                if ($last_imm lt 'i') {
+                    die "$fname:$line: seg without an immediate operand\n";
+                }
+            } else {
+                $last_imm++;
+                if ($last_imm gt 'j') {
+                    die "$fname:$line: too many immediate operands\n";
+                }
+            }
+            if (!defined($oppos{$last_imm})) {
+                die "$fname:$line: $op without '$last_imm' operand\n";
+            }
+            push(@codes, 05) if ($oppos{$last_imm} & 4);
+            push(@codes, $imm_codes{$op} + ($oppos{$last_imm} & 3));
+            $prefix_ok = 0;
+        } elsif ($op eq '/is4') {
+            if (!defined($oppos{'s'})) {
+                die "$fname:$line: $op without 's' operand\n";
+            }
+            if (defined($oppos{'i'})) {
+                push(@codes, 0172, ($oppos{'s'} << 3)+$oppos{'i'});
+            } else {
+                push(@codes, 05) if ($oppos{'s'} & 4);
+                push(@codes, 0174+($oppos{'s'} & 3));
+            }
+            $prefix_ok = 0;
+        } elsif ($op =~ /^\/is4\=(0-9+)$/) {
+            my $imm = $1;
+            if (!defined($oppos{'s'})) {
+                die "$fname:$line: $op without 's' operand\n";
+            }
+            if ($imm < 0 || $imm > 15) {
+                die "$fname:$line: invalid imm4 value for $op: $imm\n";
+            }
+            push(@codes, 0173, ($oppos{'s'} << 4) + $imm);
+            $prefix_ok = 0;
+        } elsif ($op =~ /^(0-9a-f{2})\+r$/) {
+            if (!defined($oppos{'r'})) {
+                die "$fname:$line: $op without 'r' operand\n";
+            }
+            push(@codes, 05) if ($oppos{'r'} & 4);
+            push(@codes, 010 + ($oppos{'r'} & 3), hex $1);
+            $prefix_ok = 0;
+        } elsif ($op =~ /^\\(0-7+|x0-9a-f{2})$/) {
+            # Escape to enter literal bytecodes
+            push(@codes, oct $1);
+        } else {
+            die "$fname:$line: unknown operation: $op\n";
+        }
+    }
+
+    return @codes;
+}

_service:tar_scm:nasm-2.16.03.tar.xz/x86/insnsa.c Added

@@ -0,0 +1,19600 @@
+/* This file auto-generated from insns.dat by insns.pl - don't edit it */
+
+#include "nasm.h"
+#include "insns.h"
+
+static const struct itemplate instrux_DB = {
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_DW = {
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_DD = {
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_DQ = {
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_DT = {
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_DO = {
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_DY = {
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_DZ = {
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RESB = {
+    {I_RESB, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49431, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RESW = {
+    {I_RESW, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49431, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RESD = {
+    {I_RESD, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49431, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RESQ = {
+    {I_RESQ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49431, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_REST = {
+    {I_REST, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49431, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RESO = {
+    {I_RESO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49431, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RESY = {
+    {I_RESY, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49431, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RESZ = {
+    {I_RESZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49431, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_INCBIN = {
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_AAA = {
+    {I_AAA, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50293, 1},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_AAD = {
+    {I_AAD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49293, 1},
+    {I_AAD, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49297, 2},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_AAM = {
+    {I_AAM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49301, 1},
+    {I_AAM, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49305, 2},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_AAS = {
+    {I_AAS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50296, 1},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ADC = {
+    {I_ADC, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+47363, 3},
+    {I_ADC, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+47364, 0},
+    {I_ADC, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42833, 3},
+    {I_ADC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42834, 0},
+    {I_ADC, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42839, 4},
+    {I_ADC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42840, 5},
+    {I_ADC, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42845, 6},
+    {I_ADC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42846, 7},
+    {I_ADC, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+36389, 8},
+    {I_ADC, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+36389, 0},
+    {I_ADC, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47368, 8},
+    {I_ADC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+47368, 0},
+    {I_ADC, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47373, 9},
+    {I_ADC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+47373, 5},
+    {I_ADC, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47378, 10},
+    {I_ADC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+47378, 7},
+    {I_ADC, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32872, 11},
+    {I_ADC, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32879, 12},
+    {I_ADC, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32886, 13},
+    {I_ADC, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49309, 8},
+    {I_ADC, 2, {REG_AX,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32873, 8},
+    {I_ADC, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47383, 8},
+    {I_ADC, 2, {REG_EAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32880, 9},
+    {I_ADC, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47388, 9},
+    {I_ADC, 2, {REG_RAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32887, 10},
+    {I_ADC, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47393, 10},
+    {I_ADC, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42851, 3},
+    {I_ADC, 2, {RM_GPR|BITS16,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32872, 3},
+    {I_ADC, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32893, 3},
+    {I_ADC, 2, {RM_GPR|BITS32,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32879, 4},
+    {I_ADC, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32900, 4},
+    {I_ADC, 2, {RM_GPR|BITS64,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32886, 6},
+    {I_ADC, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32907, 6},
+    {I_ADC, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42851, 3},
+    {I_ADC, 2, {MEMORY,SBYTEWORD|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+32872, 3},
+    {I_ADC, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+32893, 3},
+    {I_ADC, 2, {MEMORY,SBYTEDWORD|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+32879, 4},
+    {I_ADC, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+32900, 4},
+    {I_ADC, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42857, 14},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ADD = {
+    {I_ADD, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+47398, 3},
+    {I_ADD, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+47399, 0},
+    {I_ADD, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42863, 3},
+    {I_ADD, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42864, 0},
+    {I_ADD, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42869, 4},
+    {I_ADD, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42870, 5},
+    {I_ADD, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42875, 6},
+    {I_ADD, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42876, 7},
+    {I_ADD, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+40162, 8},
+    {I_ADD, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+40162, 0},
+    {I_ADD, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47403, 8},
+    {I_ADD, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+47403, 0},
+    {I_ADD, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47408, 9},
+    {I_ADD, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+47408, 5},
+    {I_ADD, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47413, 10},
+    {I_ADD, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+47413, 7},
+    {I_ADD, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32914, 11},
+    {I_ADD, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32921, 12},
+    {I_ADD, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32928, 13},
+    {I_ADD, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49313, 8},
+    {I_ADD, 2, {REG_AX,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32915, 8},
+    {I_ADD, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47418, 8},
+    {I_ADD, 2, {REG_EAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32922, 9},
+    {I_ADD, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47423, 9},
+    {I_ADD, 2, {REG_RAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32929, 10},
+    {I_ADD, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47428, 10},
+    {I_ADD, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42881, 3},
+    {I_ADD, 2, {RM_GPR|BITS16,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32914, 3},
+    {I_ADD, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32935, 3},
+    {I_ADD, 2, {RM_GPR|BITS32,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32921, 4},
+    {I_ADD, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32942, 4},
+    {I_ADD, 2, {RM_GPR|BITS64,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32928, 6},
+    {I_ADD, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32949, 6},
+    {I_ADD, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42881, 3},
+    {I_ADD, 2, {MEMORY,SBYTEWORD|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+32914, 3},
+    {I_ADD, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+32935, 3},
+    {I_ADD, 2, {MEMORY,SBYTEDWORD|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+32921, 4},
+    {I_ADD, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+32942, 4},
+    {I_ADD, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42887, 14},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_AND = {
+    {I_AND, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+47433, 3},
+    {I_AND, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+47434, 0},
+    {I_AND, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42893, 3},
+    {I_AND, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42894, 0},
+    {I_AND, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42899, 4},
+    {I_AND, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42900, 5},
+    {I_AND, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42905, 6},
+    {I_AND, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42906, 7},
+    {I_AND, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+40442, 8},
+    {I_AND, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+40442, 0},
+    {I_AND, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47438, 8},
+    {I_AND, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+47438, 0},
+    {I_AND, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47443, 9},
+    {I_AND, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+47443, 5},
+    {I_AND, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47448, 10},
+    {I_AND, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+47448, 7},
+    {I_AND, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32956, 11},
+    {I_AND, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32963, 12},
+    {I_AND, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32970, 13},
+    {I_AND, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49317, 8},
+    {I_AND, 2, {REG_AX,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32957, 8},
+    {I_AND, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47453, 8},
+    {I_AND, 2, {REG_EAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32964, 9},
+    {I_AND, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47458, 9},
+    {I_AND, 2, {REG_RAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32971, 10},
+    {I_AND, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47463, 10},
+    {I_AND, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42911, 3},
+    {I_AND, 2, {RM_GPR|BITS16,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32956, 3},
+    {I_AND, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32977, 3},
+    {I_AND, 2, {RM_GPR|BITS32,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32963, 4},
+    {I_AND, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32984, 4},
+    {I_AND, 2, {RM_GPR|BITS64,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32970, 6},
+    {I_AND, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32991, 6},
+    {I_AND, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42911, 3},
+    {I_AND, 2, {MEMORY,SBYTEWORD|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+32956, 3},
+    {I_AND, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+32977, 3},
+    {I_AND, 2, {MEMORY,SBYTEDWORD|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+32963, 4},
+    {I_AND, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+32984, 4},
+    {I_AND, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42917, 14},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ARPL = {
+    {I_ARPL, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29260, 15},
+    {I_ARPL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29260, 16},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BB0_RESET = {
+    {I_BB0_RESET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49321, 17},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BB1_RESET = {
+    {I_BB1_RESET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49325, 17},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BOUND = {
+    {I_BOUND, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47468, 18},
+    {I_BOUND, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47473, 19},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BSF = {
+    {I_BSF, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+32998, 9},
+    {I_BSF, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+32998, 5},
+    {I_BSF, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33005, 9},
+    {I_BSF, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33005, 5},
+    {I_BSF, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33012, 10},
+    {I_BSF, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33012, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BSR = {
+    {I_BSR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33019, 9},
+    {I_BSR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33019, 5},
+    {I_BSR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33026, 9},
+    {I_BSR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33026, 5},
+    {I_BSR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33033, 10},
+    {I_BSR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33033, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BSWAP = {
+    {I_BSWAP, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42923, 20},
+    {I_BSWAP, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42929, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BT = {
+    {I_BT, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42935, 9},
+    {I_BT, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42935, 5},
+    {I_BT, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42941, 9},
+    {I_BT, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42941, 5},
+    {I_BT, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42947, 10},
+    {I_BT, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42947, 7},
+    {I_BT, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33040, 5},
+    {I_BT, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33047, 5},
+    {I_BT, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33054, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BTC = {
+    {I_BTC, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33061, 4},
+    {I_BTC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33062, 5},
+    {I_BTC, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33068, 4},
+    {I_BTC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33069, 5},
+    {I_BTC, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33075, 6},
+    {I_BTC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33076, 7},
+    {I_BTC, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12304, 12},
+    {I_BTC, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12312, 12},
+    {I_BTC, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12320, 13},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BTR = {
+    {I_BTR, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33082, 4},
+    {I_BTR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33083, 5},
+    {I_BTR, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33089, 4},
+    {I_BTR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33090, 5},
+    {I_BTR, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33096, 6},
+    {I_BTR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33097, 7},
+    {I_BTR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12328, 12},
+    {I_BTR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12336, 12},
+    {I_BTR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12344, 13},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BTS = {
+    {I_BTS, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33103, 4},
+    {I_BTS, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33104, 5},
+    {I_BTS, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33110, 4},
+    {I_BTS, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33111, 5},
+    {I_BTS, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33117, 6},
+    {I_BTS, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33118, 7},
+    {I_BTS, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12352, 12},
+    {I_BTS, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12360, 12},
+    {I_BTS, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12368, 13},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CALL = {
+    {I_CALL, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47478, 21},
+    {I_CALL, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47478, 21},
+    {I_CALL, 1, {IMMEDIATE|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42953, 1},
+    {I_CALL, 1, {IMMEDIATE|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47483, 22},
+    {I_CALL, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47483, 22},
+    {I_CALL, 1, {IMMEDIATE|BITS16|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42959, 1},
+    {I_CALL, 1, {IMMEDIATE|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47488, 23},
+    {I_CALL, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47488, 23},
+    {I_CALL, 1, {IMMEDIATE|BITS32|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42965, 19},
+    {I_CALL, 1, {IMMEDIATE|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47493, 24},
+    {I_CALL, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47493, 24},
+    {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42971, 1},
+    {I_CALL, 2, {IMMEDIATE|BITS16|COLON,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42977, 1},
+    {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42977, 1},
+    {I_CALL, 2, {IMMEDIATE|BITS32|COLON,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42983, 19},
+    {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42983, 19},
+    {I_CALL, 1, {MEMORY|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47498, 1},
+    {I_CALL, 1, {MEMORY|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47503, 7},
+    {I_CALL, 1, {MEMORY|BITS16|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47508, 0},
+    {I_CALL, 1, {MEMORY|BITS32|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47513, 5},
+    {I_CALL, 1, {MEMORY|BITS64|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47503, 7},
+    {I_CALL, 1, {MEMORY|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47518, 21},
+    {I_CALL, 1, {RM_GPR|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47523, 22},
+    {I_CALL, 1, {RM_GPR|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47528, 23},
+    {I_CALL, 1, {RM_GPR|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47533, 24},
+    {I_CALL, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47518, 21},
+    {I_CALL, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47523, 22},
+    {I_CALL, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47528, 23},
+    {I_CALL, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47533, 24},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CBW = {
+    {I_CBW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49329, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CDQ = {
+    {I_CDQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49333, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CDQE = {
+    {I_CDQE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49337, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CLC = {
+    {I_CLC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48935, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CLD = {
+    {I_CLD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46088, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CLI = {
+    {I_CLI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48250, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CLTS = {
+    {I_CLTS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49341, 25},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMC = {
+    {I_CMC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50299, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMP = {
+    {I_CMP, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+49345, 8},
+    {I_CMP, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+49345, 0},
+    {I_CMP, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+47538, 8},
+    {I_CMP, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+47538, 0},
+    {I_CMP, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+47543, 9},
+    {I_CMP, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+47543, 5},
+    {I_CMP, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+47548, 10},
+    {I_CMP, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+47548, 7},
+    {I_CMP, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+40400, 8},
+    {I_CMP, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+40400, 0},
+    {I_CMP, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47553, 8},
+    {I_CMP, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+47553, 0},
+    {I_CMP, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47558, 9},
+    {I_CMP, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+47558, 5},
+    {I_CMP, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47563, 10},
+    {I_CMP, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+47563, 7},
+    {I_CMP, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42989, 0},
+    {I_CMP, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42995, 5},
+    {I_CMP, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43001, 7},
+    {I_CMP, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49349, 8},
+    {I_CMP, 2, {REG_AX,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+42989, 8},
+    {I_CMP, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47568, 8},
+    {I_CMP, 2, {REG_EAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+42995, 9},
+    {I_CMP, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47573, 9},
+    {I_CMP, 2, {REG_RAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+43001, 10},
+    {I_CMP, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47578, 10},
+    {I_CMP, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47583, 8},
+    {I_CMP, 2, {RM_GPR|BITS16,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+42989, 8},
+    {I_CMP, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43007, 8},
+    {I_CMP, 2, {RM_GPR|BITS32,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+42995, 9},
+    {I_CMP, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43013, 9},
+    {I_CMP, 2, {RM_GPR|BITS64,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+43001, 10},
+    {I_CMP, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43019, 10},
+    {I_CMP, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+47583, 8},
+    {I_CMP, 2, {MEMORY,SBYTEWORD|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42989, 8},
+    {I_CMP, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43007, 8},
+    {I_CMP, 2, {MEMORY,SBYTEDWORD|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42995, 9},
+    {I_CMP, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43013, 9},
+    {I_CMP, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47588, 26},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPSB = {
+    {I_CMPSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49353, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPSD = {
+    {I_CMPSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47593, 5},
+    {I_CMPSD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+34300, 147},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPSQ = {
+    {I_CMPSQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47598, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPSW = {
+    {I_CMPSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47603, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPXCHG = {
+    {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43025, 27},
+    {I_CMPXCHG, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43026, 28},
+    {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33124, 27},
+    {I_CMPXCHG, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33125, 28},
+    {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33131, 27},
+    {I_CMPXCHG, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33132, 28},
+    {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33138, 6},
+    {I_CMPXCHG, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33139, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPXCHG486 = {
+    {I_CMPXCHG486, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+47608, 29},
+    {I_CMPXCHG486, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+47608, 30},
+    {I_CMPXCHG486, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43031, 29},
+    {I_CMPXCHG486, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43031, 30},
+    {I_CMPXCHG486, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43037, 29},
+    {I_CMPXCHG486, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43037, 30},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPXCHG8B = {
+    {I_CMPXCHG8B, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33145, 31},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPXCHG16B = {
+    {I_CMPXCHG16B, 1, {MEMORY|BITS128,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43043, 13},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CPUID = {
+    {I_CPUID, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49357, 28},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CPU_READ = {
+    {I_CPU_READ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49361, 32},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CPU_WRITE = {
+    {I_CPU_WRITE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49365, 32},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CQO = {
+    {I_CQO, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49369, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CWD = {
+    {I_CWD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49373, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CWDE = {
+    {I_CWDE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49377, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_DAA = {
+    {I_DAA, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50302, 1},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_DAS = {
+    {I_DAS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50305, 1},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_DEC = {
+    {I_DEC, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49381, 1},
+    {I_DEC, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49385, 19},
+    {I_DEC, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47613, 11},
+    {I_DEC, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43049, 11},
+    {I_DEC, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43055, 12},
+    {I_DEC, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43061, 13},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_DIV = {
+    {I_DIV, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49389, 0},
+    {I_DIV, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47618, 0},
+    {I_DIV, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47623, 5},
+    {I_DIV, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47628, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_DMINT = {
+    {I_DMINT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49393, 33},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_EMMS = {
+    {I_EMMS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49397, 34},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ENTER = {
+    {I_ENTER, 2, {IMMEDIATE,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47633, 35},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_EQU = {
+    {I_EQU, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50334, 0},
+    {I_EQU, 2, {IMMEDIATE|COLON,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+50334, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_F2XM1 = {
+    {I_F2XM1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49401, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FABS = {
+    {I_FABS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49405, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FADD = {
+    {I_FADD, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49409, 36},
+    {I_FADD, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49413, 36},
+    {I_FADD, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47638, 36},
+    {I_FADD, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47643, 36},
+    {I_FADD, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47638, 36},
+    {I_FADD, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47648, 36},
+    {I_FADD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49417, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FADDP = {
+    {I_FADDP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47653, 36},
+    {I_FADDP, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47653, 36},
+    {I_FADDP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49417, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FBLD = {
+    {I_FBLD, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49421, 36},
+    {I_FBLD, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49421, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FBSTP = {
+    {I_FBSTP, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49425, 36},
+    {I_FBSTP, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49425, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FCHS = {
+    {I_FCHS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49429, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FCLEX = {
+    {I_FCLEX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47658, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FCMOVB = {
+    {I_FCMOVB, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47663, 37},
+    {I_FCMOVB, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47668, 37},
+    {I_FCMOVB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49433, 37},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FCMOVBE = {
+    {I_FCMOVBE, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47673, 37},
+    {I_FCMOVBE, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47678, 37},
+    {I_FCMOVBE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49437, 37},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FCMOVE = {
+    {I_FCMOVE, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47683, 37},
+    {I_FCMOVE, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47688, 37},
+    {I_FCMOVE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49441, 37},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FCMOVNB = {
+    {I_FCMOVNB, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47693, 37},
+    {I_FCMOVNB, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47698, 37},
+    {I_FCMOVNB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49445, 37},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FCMOVNBE = {
+    {I_FCMOVNBE, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47703, 37},
+    {I_FCMOVNBE, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47708, 37},
+    {I_FCMOVNBE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49449, 37},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FCMOVNE = {
+    {I_FCMOVNE, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47713, 37},
+    {I_FCMOVNE, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47718, 37},
+    {I_FCMOVNE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49453, 37},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FCMOVNU = {
+    {I_FCMOVNU, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47723, 37},
+    {I_FCMOVNU, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47728, 37},
+    {I_FCMOVNU, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49457, 37},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FCMOVU = {
+    {I_FCMOVU, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47733, 37},
+    {I_FCMOVU, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47738, 37},
+    {I_FCMOVU, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49461, 37},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FCOM = {
+    {I_FCOM, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49465, 36},
+    {I_FCOM, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49469, 36},
+    {I_FCOM, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47743, 36},
+    {I_FCOM, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47748, 36},
+    {I_FCOM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49473, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FCOMI = {
+    {I_FCOMI, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47753, 37},
+    {I_FCOMI, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47758, 37},
+    {I_FCOMI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49477, 37},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FCOMIP = {
+    {I_FCOMIP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47763, 37},
+    {I_FCOMIP, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47768, 37},
+    {I_FCOMIP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49481, 37},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FCOMP = {
+    {I_FCOMP, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49485, 36},
+    {I_FCOMP, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49489, 36},
+    {I_FCOMP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47773, 36},
+    {I_FCOMP, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47778, 36},
+    {I_FCOMP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49493, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FCOMPP = {
+    {I_FCOMPP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49497, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FCOS = {
+    {I_FCOS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49501, 38},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FDECSTP = {
+    {I_FDECSTP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49505, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FDISI = {
+    {I_FDISI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47783, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FDIV = {
+    {I_FDIV, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49509, 36},
+    {I_FDIV, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49513, 36},
+    {I_FDIV, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47788, 36},
+    {I_FDIV, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47793, 36},
+    {I_FDIV, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47788, 36},
+    {I_FDIV, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47798, 36},
+    {I_FDIV, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49517, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FDIVP = {
+    {I_FDIVP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47803, 36},
+    {I_FDIVP, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47803, 36},
+    {I_FDIVP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49517, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FDIVR = {
+    {I_FDIVR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49521, 36},
+    {I_FDIVR, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49525, 36},
+    {I_FDIVR, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47808, 36},
+    {I_FDIVR, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47808, 36},
+    {I_FDIVR, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47813, 36},
+    {I_FDIVR, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47818, 36},
+    {I_FDIVR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49529, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FDIVRP = {
+    {I_FDIVRP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47823, 36},
+    {I_FDIVRP, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47823, 36},
+    {I_FDIVRP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49529, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FEMMS = {
+    {I_FEMMS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49533, 39},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FENI = {
+    {I_FENI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47828, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FFREE = {
+    {I_FFREE, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47833, 36},
+    {I_FFREE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49537, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FFREEP = {
+    {I_FFREEP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47838, 40},
+    {I_FFREEP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49541, 40},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FIADD = {
+    {I_FIADD, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49545, 36},
+    {I_FIADD, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49549, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FICOM = {
+    {I_FICOM, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49553, 36},
+    {I_FICOM, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49557, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FICOMP = {
+    {I_FICOMP, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49561, 36},
+    {I_FICOMP, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49565, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FIDIV = {
+    {I_FIDIV, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49569, 36},
+    {I_FIDIV, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49573, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FIDIVR = {
+    {I_FIDIVR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49577, 36},
+    {I_FIDIVR, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49581, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FILD = {
+    {I_FILD, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49585, 36},
+    {I_FILD, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49589, 36},
+    {I_FILD, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49593, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FIMUL = {
+    {I_FIMUL, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49597, 36},
+    {I_FIMUL, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49601, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FINCSTP = {
+    {I_FINCSTP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49605, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FINIT = {
+    {I_FINIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47843, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FIST = {
+    {I_FIST, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49609, 36},
+    {I_FIST, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49613, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FISTP = {
+    {I_FISTP, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49617, 36},
+    {I_FISTP, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49621, 36},
+    {I_FISTP, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49625, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FISTTP = {
+    {I_FISTTP, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49629, 41},
+    {I_FISTTP, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49633, 41},
+    {I_FISTTP, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49637, 41},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FISUB = {
+    {I_FISUB, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49641, 36},
+    {I_FISUB, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49645, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FISUBR = {
+    {I_FISUBR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49649, 36},
+    {I_FISUBR, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49653, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FLD = {
+    {I_FLD, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49657, 36},
+    {I_FLD, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49661, 36},
+    {I_FLD, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49665, 36},
+    {I_FLD, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47848, 36},
+    {I_FLD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49669, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FLD1 = {
+    {I_FLD1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49673, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FLDCW = {
+    {I_FLDCW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49677, 42},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FLDENV = {
+    {I_FLDENV, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49681, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FLDL2E = {
+    {I_FLDL2E, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49685, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FLDL2T = {
+    {I_FLDL2T, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49689, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FLDLG2 = {
+    {I_FLDLG2, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49693, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FLDLN2 = {
+    {I_FLDLN2, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49697, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FLDPI = {
+    {I_FLDPI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49701, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FLDZ = {
+    {I_FLDZ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49705, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FMUL = {
+    {I_FMUL, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49709, 36},
+    {I_FMUL, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49713, 36},
+    {I_FMUL, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47853, 36},
+    {I_FMUL, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47853, 36},
+    {I_FMUL, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47858, 36},
+    {I_FMUL, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47863, 36},
+    {I_FMUL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49717, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FMULP = {
+    {I_FMULP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47868, 36},
+    {I_FMULP, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47868, 36},
+    {I_FMULP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49717, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FNCLEX = {
+    {I_FNCLEX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47659, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FNDISI = {
+    {I_FNDISI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47784, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FNENI = {
+    {I_FNENI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47829, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FNINIT = {
+    {I_FNINIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47844, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FNOP = {
+    {I_FNOP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49721, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FNSAVE = {
+    {I_FNSAVE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47874, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FNSTCW = {
+    {I_FNSTCW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47884, 42},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FNSTENV = {
+    {I_FNSTENV, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47889, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FNSTSW = {
+    {I_FNSTSW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47899, 42},
+    {I_FNSTSW, 1, {REG_AX,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47904, 43},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FPATAN = {
+    {I_FPATAN, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49725, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FPREM = {
+    {I_FPREM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49729, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FPREM1 = {
+    {I_FPREM1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49733, 38},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FPTAN = {
+    {I_FPTAN, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49737, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FRNDINT = {
+    {I_FRNDINT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49741, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FRSTOR = {
+    {I_FRSTOR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49745, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FSAVE = {
+    {I_FSAVE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47873, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FSCALE = {
+    {I_FSCALE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49749, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FSETPM = {
+    {I_FSETPM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49753, 43},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FSIN = {
+    {I_FSIN, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49757, 38},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FSINCOS = {
+    {I_FSINCOS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49761, 38},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FSQRT = {
+    {I_FSQRT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49765, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FST = {
+    {I_FST, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49769, 36},
+    {I_FST, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49773, 36},
+    {I_FST, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47878, 36},
+    {I_FST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49777, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FSTCW = {
+    {I_FSTCW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47883, 42},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FSTENV = {
+    {I_FSTENV, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47888, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FSTP = {
+    {I_FSTP, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49781, 36},
+    {I_FSTP, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49785, 36},
+    {I_FSTP, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49789, 36},
+    {I_FSTP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47893, 36},
+    {I_FSTP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49793, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FSTSW = {
+    {I_FSTSW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47898, 42},
+    {I_FSTSW, 1, {REG_AX,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47903, 43},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FSUB = {
+    {I_FSUB, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49797, 36},
+    {I_FSUB, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49801, 36},
+    {I_FSUB, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47908, 36},
+    {I_FSUB, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47908, 36},
+    {I_FSUB, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47913, 36},
+    {I_FSUB, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47918, 36},
+    {I_FSUB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49805, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FSUBP = {
+    {I_FSUBP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47923, 36},
+    {I_FSUBP, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47923, 36},
+    {I_FSUBP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49805, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FSUBR = {
+    {I_FSUBR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49809, 36},
+    {I_FSUBR, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49813, 36},
+    {I_FSUBR, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47928, 36},
+    {I_FSUBR, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47928, 36},
+    {I_FSUBR, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47933, 36},
+    {I_FSUBR, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47938, 36},
+    {I_FSUBR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49817, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FSUBRP = {
+    {I_FSUBRP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47943, 36},
+    {I_FSUBRP, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47943, 36},
+    {I_FSUBRP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49817, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FTST = {
+    {I_FTST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49821, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FUCOM = {
+    {I_FUCOM, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47948, 38},
+    {I_FUCOM, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47953, 38},
+    {I_FUCOM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49825, 38},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FUCOMI = {
+    {I_FUCOMI, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47958, 37},
+    {I_FUCOMI, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47963, 37},
+    {I_FUCOMI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49829, 37},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FUCOMIP = {
+    {I_FUCOMIP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47968, 37},
+    {I_FUCOMIP, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47973, 37},
+    {I_FUCOMIP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49833, 37},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FUCOMP = {
+    {I_FUCOMP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47978, 38},
+    {I_FUCOMP, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47983, 38},
+    {I_FUCOMP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49837, 38},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FUCOMPP = {
+    {I_FUCOMPP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49841, 38},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FXAM = {
+    {I_FXAM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49845, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FXCH = {
+    {I_FXCH, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47988, 36},
+    {I_FXCH, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47988, 36},
+    {I_FXCH, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47993, 36},
+    {I_FXCH, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49849, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FXTRACT = {
+    {I_FXTRACT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49853, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FYL2X = {
+    {I_FYL2X, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49857, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FYL2XP1 = {
+    {I_FYL2XP1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49861, 36},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HLT = {
+    {I_HLT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50308, 44},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_IBTS = {
+    {I_IBTS, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43031, 45},
+    {I_IBTS, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43031, 46},
+    {I_IBTS, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43037, 47},
+    {I_IBTS, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43037, 46},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ICEBP = {
+    {I_ICEBP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50311, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_IDIV = {
+    {I_IDIV, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49865, 0},
+    {I_IDIV, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47998, 0},
+    {I_IDIV, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48003, 5},
+    {I_IDIV, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48008, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_IMUL = {
+    {I_IMUL, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49869, 0},
+    {I_IMUL, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48013, 0},
+    {I_IMUL, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48018, 5},
+    {I_IMUL, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48023, 7},
+    {I_IMUL, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43067, 9},
+    {I_IMUL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43067, 5},
+    {I_IMUL, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43073, 9},
+    {I_IMUL, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43073, 5},
+    {I_IMUL, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43079, 10},
+    {I_IMUL, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43079, 7},
+    {I_IMUL, 3, {REG_GPR|BITS16,MEMORY,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+43085, 48},
+    {I_IMUL, 3, {REG_GPR|BITS16,MEMORY,SBYTEWORD,0,0}, NO_DECORATOR, nasm_bytecodes+43085, 49},
+    {I_IMUL, 3, {REG_GPR|BITS16,MEMORY,IMMEDIATE|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+43091, 49},
+    {I_IMUL, 3, {REG_GPR|BITS16,MEMORY,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+43091, 49},
+    {I_IMUL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+43085, 35},
+    {I_IMUL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,SBYTEWORD,0,0}, NO_DECORATOR, nasm_bytecodes+43085, 49},
+    {I_IMUL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+43091, 35},
+    {I_IMUL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+43091, 49},
+    {I_IMUL, 3, {REG_GPR|BITS32,MEMORY,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+43097, 50},
+    {I_IMUL, 3, {REG_GPR|BITS32,MEMORY,SBYTEDWORD,0,0}, NO_DECORATOR, nasm_bytecodes+43097, 9},
+    {I_IMUL, 3, {REG_GPR|BITS32,MEMORY,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+43103, 9},
+    {I_IMUL, 3, {REG_GPR|BITS32,MEMORY,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+43103, 9},
+    {I_IMUL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+43097, 5},
+    {I_IMUL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,SBYTEDWORD,0,0}, NO_DECORATOR, nasm_bytecodes+43097, 9},
+    {I_IMUL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+43103, 5},
+    {I_IMUL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+43103, 9},
+    {I_IMUL, 3, {REG_GPR|BITS64,MEMORY,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+43109, 51},
+    {I_IMUL, 3, {REG_GPR|BITS64,MEMORY,SBYTEDWORD,0,0}, NO_DECORATOR, nasm_bytecodes+43109, 10},
+    {I_IMUL, 3, {REG_GPR|BITS64,MEMORY,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+43115, 51},
+    {I_IMUL, 3, {REG_GPR|BITS64,MEMORY,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+43121, 10},
+    {I_IMUL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+43109, 7},
+    {I_IMUL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,SBYTEDWORD,0,0}, NO_DECORATOR, nasm_bytecodes+43109, 10},
+    {I_IMUL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+43115, 7},
+    {I_IMUL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+43121, 10},
+    {I_IMUL, 2, {REG_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43127, 35},
+    {I_IMUL, 2, {REG_GPR|BITS16,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+43127, 49},
+    {I_IMUL, 2, {REG_GPR|BITS16,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43133, 35},
+    {I_IMUL, 2, {REG_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43133, 49},
+    {I_IMUL, 2, {REG_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43139, 5},
+    {I_IMUL, 2, {REG_GPR|BITS32,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+43139, 9},
+    {I_IMUL, 2, {REG_GPR|BITS32,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43145, 5},
+    {I_IMUL, 2, {REG_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43145, 9},
+    {I_IMUL, 2, {REG_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43151, 7},
+    {I_IMUL, 2, {REG_GPR|BITS64,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+43151, 10},
+    {I_IMUL, 2, {REG_GPR|BITS64,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43157, 7},
+    {I_IMUL, 2, {REG_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43157, 10},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_IN = {
+    {I_IN, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49873, 52},
+    {I_IN, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48028, 52},
+    {I_IN, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48033, 53},
+    {I_IN, 2, {REG_AL,REG_DX,0,0,0}, NO_DECORATOR, nasm_bytecodes+46196, 0},
+    {I_IN, 2, {REG_AX,REG_DX,0,0,0}, NO_DECORATOR, nasm_bytecodes+49877, 0},
+    {I_IN, 2, {REG_EAX,REG_DX,0,0,0}, NO_DECORATOR, nasm_bytecodes+49881, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_INC = {
+    {I_INC, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49885, 1},
+    {I_INC, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49889, 19},
+    {I_INC, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48038, 11},
+    {I_INC, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43163, 11},
+    {I_INC, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43169, 12},
+    {I_INC, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43175, 13},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_INSB = {
+    {I_INSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50314, 35},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_INSD = {
+    {I_INSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49893, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_INSW = {
+    {I_INSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49897, 35},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_INT = {
+    {I_INT, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49901, 52},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_INT01 = {
+    {I_INT01, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50311, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_INT1 = {
+    {I_INT1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50311, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_INT03 = {
+    {I_INT03, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50317, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_INT3 = {
+    {I_INT3, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50317, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_INTO = {
+    {I_INTO, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50320, 1},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_INVD = {
+    {I_INVD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49905, 54},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_INVPCID = {
+    {I_INVPCID, 2, {REG_GPR|BITS32,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+33152, 55},
+    {I_INVPCID, 2, {REG_GPR|BITS64,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+33152, 56},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_INVLPG = {
+    {I_INVLPG, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48043, 54},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_INVLPGA = {
+    {I_INVLPGA, 2, {REG_AX,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43181, 57},
+    {I_INVLPGA, 2, {REG_EAX,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43187, 58},
+    {I_INVLPGA, 2, {REG_RAX,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33159, 59},
+    {I_INVLPGA, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43188, 58},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_IRET = {
+    {I_IRET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49909, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_IRETD = {
+    {I_IRETD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49913, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_IRETQ = {
+    {I_IRETQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49917, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_IRETW = {
+    {I_IRETW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49921, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JCXZ = {
+    {I_JCXZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48048, 1},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JECXZ = {
+    {I_JECXZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48053, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JRCXZ = {
+    {I_JRCXZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43193, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JMP = {
+    {I_JMP, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48059, 0},
+    {I_JMP, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48058, 0},
+    {I_JMP, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48063, 21},
+    {I_JMP, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48063, 21},
+    {I_JMP, 1, {IMMEDIATE|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43199, 1},
+    {I_JMP, 1, {IMMEDIATE|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48068, 22},
+    {I_JMP, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48068, 22},
+    {I_JMP, 1, {IMMEDIATE|BITS16|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43205, 1},
+    {I_JMP, 1, {IMMEDIATE|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48073, 23},
+    {I_JMP, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48073, 23},
+    {I_JMP, 1, {IMMEDIATE|BITS32|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43211, 19},
+    {I_JMP, 1, {IMMEDIATE|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48078, 24},
+    {I_JMP, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48078, 24},
+    {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43217, 1},
+    {I_JMP, 2, {IMMEDIATE|BITS16|COLON,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43223, 1},
+    {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43223, 1},
+    {I_JMP, 2, {IMMEDIATE|BITS32|COLON,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43229, 19},
+    {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43229, 19},
+    {I_JMP, 1, {MEMORY|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48083, 1},
+    {I_JMP, 1, {MEMORY|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48088, 7},
+    {I_JMP, 1, {MEMORY|BITS16|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48093, 0},
+    {I_JMP, 1, {MEMORY|BITS32|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48098, 5},
+    {I_JMP, 1, {MEMORY|BITS64|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48088, 7},
+    {I_JMP, 1, {MEMORY|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48103, 21},
+    {I_JMP, 1, {RM_GPR|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48108, 22},
+    {I_JMP, 1, {RM_GPR|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48113, 23},
+    {I_JMP, 1, {RM_GPR|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48118, 24},
+    {I_JMP, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48103, 21},
+    {I_JMP, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48108, 22},
+    {I_JMP, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48113, 23},
+    {I_JMP, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48118, 24},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JMPE = {
+    {I_JMPE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43235, 60},
+    {I_JMPE, 1, {IMMEDIATE|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43241, 60},
+    {I_JMPE, 1, {IMMEDIATE|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43247, 60},
+    {I_JMPE, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43253, 60},
+    {I_JMPE, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43259, 60},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LAHF = {
+    {I_LAHF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50323, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LAR = {
+    {I_LAR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43265, 61},
+    {I_LAR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43265, 62},
+    {I_LAR, 2, {REG_GPR|BITS16,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43265, 63},
+    {I_LAR, 2, {REG_GPR|BITS16,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33166, 64},
+    {I_LAR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43271, 65},
+    {I_LAR, 2, {REG_GPR|BITS32,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43271, 63},
+    {I_LAR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43271, 63},
+    {I_LAR, 2, {REG_GPR|BITS32,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33173, 64},
+    {I_LAR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43277, 66},
+    {I_LAR, 2, {REG_GPR|BITS64,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43277, 64},
+    {I_LAR, 2, {REG_GPR|BITS64,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43277, 64},
+    {I_LAR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43277, 64},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LDS = {
+    {I_LDS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48123, 1},
+    {I_LDS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48128, 19},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LEA = {
+    {I_LEA, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48133, 67},
+    {I_LEA, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48138, 68},
+    {I_LEA, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48143, 69},
+    {I_LEA, 2, {REG_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48133, 67},
+    {I_LEA, 2, {REG_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48138, 68},
+    {I_LEA, 2, {REG_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48143, 69},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LEAVE = {
+    {I_LEAVE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48395, 35},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LES = {
+    {I_LES, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48148, 1},
+    {I_LES, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48153, 19},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LFENCE = {
+    {I_LFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43283, 59},
+    {I_LFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43283, 147},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LFS = {
+    {I_LFS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43289, 5},
+    {I_LFS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43295, 5},
+    {I_LFS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43301, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LGDT = {
+    {I_LGDT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48158, 25},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LGS = {
+    {I_LGS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43307, 5},
+    {I_LGS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43313, 5},
+    {I_LGS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43319, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LIDT = {
+    {I_LIDT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48163, 25},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LLDT = {
+    {I_LLDT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48168, 70},
+    {I_LLDT, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48168, 70},
+    {I_LLDT, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48168, 70},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LMSW = {
+    {I_LMSW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48173, 25},
+    {I_LMSW, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48173, 25},
+    {I_LMSW, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48173, 25},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LOADALL = {
+    {I_LOADALL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49925, 46},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LOADALL286 = {
+    {I_LOADALL286, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49929, 71},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LODSB = {
+    {I_LODSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50326, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LODSD = {
+    {I_LODSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49933, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LODSQ = {
+    {I_LODSQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49937, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LODSW = {
+    {I_LODSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49941, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LOOP = {
+    {I_LOOP, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48178, 0},
+    {I_LOOP, 2, {IMMEDIATE,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48183, 1},
+    {I_LOOP, 2, {IMMEDIATE,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48188, 5},
+    {I_LOOP, 2, {IMMEDIATE,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48193, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LOOPE = {
+    {I_LOOPE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48198, 0},
+    {I_LOOPE, 2, {IMMEDIATE,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48203, 1},
+    {I_LOOPE, 2, {IMMEDIATE,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48208, 5},
+    {I_LOOPE, 2, {IMMEDIATE,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48213, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LOOPNE = {
+    {I_LOOPNE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48218, 0},
+    {I_LOOPNE, 2, {IMMEDIATE,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48223, 1},
+    {I_LOOPNE, 2, {IMMEDIATE,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48228, 5},
+    {I_LOOPNE, 2, {IMMEDIATE,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48233, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LOOPNZ = {
+    {I_LOOPNZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48218, 0},
+    {I_LOOPNZ, 2, {IMMEDIATE,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48223, 1},
+    {I_LOOPNZ, 2, {IMMEDIATE,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48228, 5},
+    {I_LOOPNZ, 2, {IMMEDIATE,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48233, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LOOPZ = {
+    {I_LOOPZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48198, 0},
+    {I_LOOPZ, 2, {IMMEDIATE,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48203, 1},
+    {I_LOOPZ, 2, {IMMEDIATE,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48208, 5},
+    {I_LOOPZ, 2, {IMMEDIATE,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48213, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LSL = {
+    {I_LSL, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43325, 61},
+    {I_LSL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43325, 62},
+    {I_LSL, 2, {REG_GPR|BITS16,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43325, 63},
+    {I_LSL, 2, {REG_GPR|BITS16,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33180, 64},
+    {I_LSL, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43331, 65},
+    {I_LSL, 2, {REG_GPR|BITS32,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43331, 63},
+    {I_LSL, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43331, 63},
+    {I_LSL, 2, {REG_GPR|BITS32,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33187, 64},
+    {I_LSL, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43337, 66},
+    {I_LSL, 2, {REG_GPR|BITS64,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43337, 64},
+    {I_LSL, 2, {REG_GPR|BITS64,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43337, 64},
+    {I_LSL, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43337, 64},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LSS = {
+    {I_LSS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43343, 5},
+    {I_LSS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43349, 5},
+    {I_LSS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43355, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LTR = {
+    {I_LTR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48238, 70},
+    {I_LTR, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48238, 70},
+    {I_LTR, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48238, 70},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MFENCE = {
+    {I_MFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43361, 59},
+    {I_MFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43361, 147},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MONITOR = {
+    {I_MONITOR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48243, 72},
+    {I_MONITOR, 3, {REG_EAX,REG_ECX,REG_EDX,0,0}, NO_DECORATOR, nasm_bytecodes+48243, 73},
+    {I_MONITOR, 3, {REG_RAX,REG_ECX,REG_EDX,0,0}, NO_DECORATOR, nasm_bytecodes+48243, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MONITORX = {
+    {I_MONITORX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48248, 74},
+    {I_MONITORX, 3, {REG_RAX,REG_ECX,REG_EDX,0,0}, NO_DECORATOR, nasm_bytecodes+48248, 59},
+    {I_MONITORX, 3, {REG_EAX,REG_ECX,REG_EDX,0,0}, NO_DECORATOR, nasm_bytecodes+48248, 74},
+    {I_MONITORX, 3, {REG_AX,REG_ECX,REG_EDX,0,0}, NO_DECORATOR, nasm_bytecodes+48248, 74},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOV = {
+    {I_MOV, 2, {MEMORY,REG_SREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+48269, 75},
+    {I_MOV, 2, {REG_GPR|BITS16,REG_SREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+48253, 0},
+    {I_MOV, 2, {REG_GPR|BITS32,REG_SREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+48258, 5},
+    {I_MOV, 2, {REG_GPR|BITS64,REG_SREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+48263, 76},
+    {I_MOV, 2, {RM_GPR|BITS64,REG_SREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+48268, 7},
+    {I_MOV, 2, {REG_SREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48289, 75},
+    {I_MOV, 2, {REG_SREG,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+48289, 77},
+    {I_MOV, 2, {REG_SREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48289, 78},
+    {I_MOV, 2, {REG_SREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+48273, 76},
+    {I_MOV, 2, {REG_SREG,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+48278, 0},
+    {I_MOV, 2, {REG_SREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48283, 5},
+    {I_MOV, 2, {REG_SREG,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+48288, 7},
+    {I_MOV, 2, {REG_AL,MEM_OFFS,0,0,0}, NO_DECORATOR, nasm_bytecodes+49945, 8},
+    {I_MOV, 2, {REG_AX,MEM_OFFS,0,0,0}, NO_DECORATOR, nasm_bytecodes+48293, 8},
+    {I_MOV, 2, {REG_EAX,MEM_OFFS,0,0,0}, NO_DECORATOR, nasm_bytecodes+48298, 9},
+    {I_MOV, 2, {REG_RAX,MEM_OFFS,0,0,0}, NO_DECORATOR, nasm_bytecodes+48303, 10},
+    {I_MOV, 2, {MEM_OFFS,REG_AL,0,0,0}, NO_DECORATOR, nasm_bytecodes+49949, 79},
+    {I_MOV, 2, {MEM_OFFS,REG_AX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48308, 79},
+    {I_MOV, 2, {MEM_OFFS,REG_EAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48313, 80},
+    {I_MOV, 2, {MEM_OFFS,REG_RAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48318, 81},
+    {I_MOV, 2, {REG_GPR|BITS32,REG_CREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+43367, 82},
+    {I_MOV, 2, {REG_GPR|BITS64,REG_CREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+43373, 83},
+    {I_MOV, 2, {REG_CREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43379, 82},
+    {I_MOV, 2, {REG_CREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43385, 83},
+    {I_MOV, 2, {REG_GPR|BITS32,REG_DREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+43392, 82},
+    {I_MOV, 2, {REG_GPR|BITS64,REG_DREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+43391, 83},
+    {I_MOV, 2, {REG_DREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43398, 82},
+    {I_MOV, 2, {REG_DREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43397, 83},
+    {I_MOV, 2, {REG_GPR|BITS32,REG_TREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+48323, 19},
+    {I_MOV, 2, {REG_TREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48328, 19},
+    {I_MOV, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48333, 8},
+    {I_MOV, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48334, 0},
+    {I_MOV, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43403, 8},
+    {I_MOV, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43404, 0},
+    {I_MOV, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43409, 9},
+    {I_MOV, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43410, 5},
+    {I_MOV, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43415, 10},
+    {I_MOV, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43416, 7},
+    {I_MOV, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+49953, 8},
+    {I_MOV, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+49953, 0},
+    {I_MOV, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48338, 8},
+    {I_MOV, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+48338, 0},
+    {I_MOV, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48343, 9},
+    {I_MOV, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48343, 5},
+    {I_MOV, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48348, 10},
+    {I_MOV, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+48348, 7},
+    {I_MOV, 2, {REG_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49957, 8},
+    {I_MOV, 2, {REG_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48353, 8},
+    {I_MOV, 2, {REG_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48358, 9},
+    {I_MOV, 2, {REG_GPR|BITS64,UDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+48363, 84},
+    {I_MOV, 2, {REG_GPR|BITS64,SDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33209, 84},
+    {I_MOV, 2, {REG_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48368, 10},
+    {I_MOV, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43421, 8},
+    {I_MOV, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33194, 8},
+    {I_MOV, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33201, 9},
+    {I_MOV, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33208, 10},
+    {I_MOV, 2, {RM_GPR|BITS64,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33208, 7},
+    {I_MOV, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43421, 8},
+    {I_MOV, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33194, 8},
+    {I_MOV, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33201, 9},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVD = {
+    {I_MOVD, 2, {MMXREG,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43427, 85},
+    {I_MOVD, 2, {RM_GPR|BITS32,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+43433, 85},
+    {I_MOVD, 2, {MMXREG,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33215, 86},
+    {I_MOVD, 2, {RM_GPR|BITS64,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+33222, 86},
+    {I_MOVD, 2, {MEMORY,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34146, 151},
+    {I_MOVD, 2, {XMM_L16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+34153, 151},
+    {I_MOVD, 2, {XMM_L16,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34153, 147},
+    {I_MOVD, 2, {RM_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34146, 147},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVQ = {
+    {I_MOVQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43439, 87},
+    {I_MOVQ, 2, {RM_MMX,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+43445, 87},
+    {I_MOVQ, 2, {MMXREG,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33215, 88},
+    {I_MOVQ, 2, {RM_GPR|BITS64,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+33222, 88},
+    {I_MOVQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45077, 147},
+    {I_MOVQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45083, 147},
+    {I_MOVQ, 2, {MEMORY,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45083, 152},
+    {I_MOVQ, 2, {XMM_L16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45077, 152},
+    {I_MOVQ, 2, {XMM_L16,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34160, 153},
+    {I_MOVQ, 2, {RM_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34167, 153},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVSB = {
+    {I_MOVSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12437, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVSD = {
+    {I_MOVSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49961, 5},
+    {I_MOVSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45635, 147},
+    {I_MOVSD, 2, {RM_XMM_L16|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45641, 147},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVSQ = {
+    {I_MOVSQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49965, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVSW = {
+    {I_MOVSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49969, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVSX = {
+    {I_MOVSX, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43451, 53},
+    {I_MOVSX, 2, {REG_GPR|BITS16,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43451, 5},
+    {I_MOVSX, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43457, 5},
+    {I_MOVSX, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43463, 5},
+    {I_MOVSX, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43469, 7},
+    {I_MOVSX, 2, {REG_GPR|BITS64,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43475, 7},
+    {I_MOVSX, 2, {REG_GPR|BITS64,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48373, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVSXD = {
+    {I_MOVSXD, 2, {REG_GPR|BITS64,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48373, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVZX = {
+    {I_MOVZX, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43481, 53},
+    {I_MOVZX, 2, {REG_GPR|BITS16,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43481, 5},
+    {I_MOVZX, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43487, 5},
+    {I_MOVZX, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43493, 5},
+    {I_MOVZX, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43499, 7},
+    {I_MOVZX, 2, {REG_GPR|BITS64,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43505, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MUL = {
+    {I_MUL, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49973, 0},
+    {I_MUL, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48378, 0},
+    {I_MUL, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48383, 5},
+    {I_MUL, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48388, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MWAIT = {
+    {I_MWAIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48393, 72},
+    {I_MWAIT, 2, {REG_EAX,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48393, 72},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MWAITX = {
+    {I_MWAITX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48398, 74},
+    {I_MWAITX, 2, {REG_EAX,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48398, 74},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_NEG = {
+    {I_NEG, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48403, 11},
+    {I_NEG, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43511, 11},
+    {I_NEG, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43517, 12},
+    {I_NEG, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43523, 13},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_NOP = {
+    {I_NOP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48408, 0},
+    {I_NOP, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43529, 89},
+    {I_NOP, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43535, 89},
+    {I_NOP, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43541, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_NOT = {
+    {I_NOT, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48413, 11},
+    {I_NOT, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43547, 11},
+    {I_NOT, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43553, 12},
+    {I_NOT, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43559, 13},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_OR = {
+    {I_OR, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48418, 3},
+    {I_OR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48419, 0},
+    {I_OR, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43565, 3},
+    {I_OR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43566, 0},
+    {I_OR, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43571, 4},
+    {I_OR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43572, 5},
+    {I_OR, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43577, 6},
+    {I_OR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43578, 7},
+    {I_OR, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+40687, 8},
+    {I_OR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+40687, 0},
+    {I_OR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48423, 8},
+    {I_OR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+48423, 0},
+    {I_OR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48428, 9},
+    {I_OR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48428, 5},
+    {I_OR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48433, 10},
+    {I_OR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+48433, 7},
+    {I_OR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33229, 11},
+    {I_OR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33236, 12},
+    {I_OR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33243, 13},
+    {I_OR, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49977, 8},
+    {I_OR, 2, {REG_AX,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33230, 8},
+    {I_OR, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48438, 8},
+    {I_OR, 2, {REG_EAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33237, 9},
+    {I_OR, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48443, 9},
+    {I_OR, 2, {REG_RAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33244, 10},
+    {I_OR, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48448, 10},
+    {I_OR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43583, 3},
+    {I_OR, 2, {RM_GPR|BITS16,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33229, 3},
+    {I_OR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33250, 3},
+    {I_OR, 2, {RM_GPR|BITS32,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33236, 4},
+    {I_OR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33257, 4},
+    {I_OR, 2, {RM_GPR|BITS64,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33243, 6},
+    {I_OR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33264, 6},
+    {I_OR, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43583, 3},
+    {I_OR, 2, {MEMORY,SBYTEWORD|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33229, 3},
+    {I_OR, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33250, 3},
+    {I_OR, 2, {MEMORY,SBYTEDWORD|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33236, 4},
+    {I_OR, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33257, 4},
+    {I_OR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43589, 14},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_OUT = {
+    {I_OUT, 2, {IMMEDIATE,REG_AL,0,0,0}, NO_DECORATOR, nasm_bytecodes+49981, 52},
+    {I_OUT, 2, {IMMEDIATE,REG_AX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48453, 52},
+    {I_OUT, 2, {IMMEDIATE,REG_EAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48458, 53},
+    {I_OUT, 2, {REG_DX,REG_AL,0,0,0}, NO_DECORATOR, nasm_bytecodes+46178, 0},
+    {I_OUT, 2, {REG_DX,REG_AX,0,0,0}, NO_DECORATOR, nasm_bytecodes+49985, 0},
+    {I_OUT, 2, {REG_DX,REG_EAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+49989, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_OUTSB = {
+    {I_OUTSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50329, 35},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_OUTSD = {
+    {I_OUTSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49993, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_OUTSW = {
+    {I_OUTSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49997, 35},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PACKSSDW = {
+    {I_PACKSSDW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33271, 87},
+    {I_PACKSSDW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45101, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PACKSSWB = {
+    {I_PACKSSWB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33278, 87},
+    {I_PACKSSWB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45095, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PACKUSWB = {
+    {I_PACKUSWB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33285, 87},
+    {I_PACKUSWB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45107, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PADDB = {
+    {I_PADDB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33292, 87},
+    {I_PADDB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45113, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PADDD = {
+    {I_PADDD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33299, 87},
+    {I_PADDD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45125, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PADDSB = {
+    {I_PADDSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33306, 87},
+    {I_PADDSB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45143, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PADDSIW = {
+    {I_PADDSIW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43595, 90},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PADDSW = {
+    {I_PADDSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33313, 87},
+    {I_PADDSW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45149, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PADDUSB = {
+    {I_PADDUSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33320, 87},
+    {I_PADDUSB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45155, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PADDUSW = {
+    {I_PADDUSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33327, 87},
+    {I_PADDUSW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45161, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PADDW = {
+    {I_PADDW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33334, 87},
+    {I_PADDW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45119, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PAND = {
+    {I_PAND, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33341, 87},
+    {I_PAND, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45167, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PANDN = {
+    {I_PANDN, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33348, 87},
+    {I_PANDN, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45173, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PAUSE = {
+    {I_PAUSE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50001, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PAVEB = {
+    {I_PAVEB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43601, 90},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PAVGUSB = {
+    {I_PAVGUSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12376, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PCMPEQB = {
+    {I_PCMPEQB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33355, 87},
+    {I_PCMPEQB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45191, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PCMPEQD = {
+    {I_PCMPEQD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33362, 87},
+    {I_PCMPEQD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45203, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PCMPEQW = {
+    {I_PCMPEQW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33369, 87},
+    {I_PCMPEQW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45197, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PCMPGTB = {
+    {I_PCMPGTB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33376, 87},
+    {I_PCMPGTB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45209, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PCMPGTD = {
+    {I_PCMPGTD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33383, 87},
+    {I_PCMPGTD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45221, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PCMPGTW = {
+    {I_PCMPGTW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33390, 87},
+    {I_PCMPGTW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45215, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PDISTIB = {
+    {I_PDISTIB, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45468, 92},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PF2ID = {
+    {I_PF2ID, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12384, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PFACC = {
+    {I_PFACC, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12392, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PFADD = {
+    {I_PFADD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12400, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PFCMPEQ = {
+    {I_PFCMPEQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12408, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PFCMPGE = {
+    {I_PFCMPGE, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12416, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PFCMPGT = {
+    {I_PFCMPGT, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12424, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PFMAX = {
+    {I_PFMAX, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12432, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PFMIN = {
+    {I_PFMIN, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12440, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PFMUL = {
+    {I_PFMUL, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12448, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PFRCP = {
+    {I_PFRCP, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12456, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PFRCPIT1 = {
+    {I_PFRCPIT1, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12464, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PFRCPIT2 = {
+    {I_PFRCPIT2, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12472, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PFRSQIT1 = {
+    {I_PFRSQIT1, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12480, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PFRSQRT = {
+    {I_PFRSQRT, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12488, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PFSUB = {
+    {I_PFSUB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12496, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PFSUBR = {
+    {I_PFSUBR, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12504, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PI2FD = {
+    {I_PI2FD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12512, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMACHRIW = {
+    {I_PMACHRIW, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45564, 92},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMADDWD = {
+    {I_PMADDWD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33397, 87},
+    {I_PMADDWD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45227, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMAGW = {
+    {I_PMAGW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43607, 90},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMULHRIW = {
+    {I_PMULHRIW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43613, 90},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMULHRWA = {
+    {I_PMULHRWA, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12520, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMULHRWC = {
+    {I_PMULHRWC, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43619, 90},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMULHW = {
+    {I_PMULHW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33404, 87},
+    {I_PMULHW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45269, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMULLW = {
+    {I_PMULLW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33411, 87},
+    {I_PMULLW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45275, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMVGEZB = {
+    {I_PMVGEZB, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45696, 90},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMVLZB = {
+    {I_PMVLZB, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45552, 90},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMVNZB = {
+    {I_PMVNZB, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45534, 90},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMVZB = {
+    {I_PMVZB, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45456, 90},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_POP = {
+    {I_POP, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50005, 0},
+    {I_POP, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50009, 19},
+    {I_POP, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50013, 7},
+    {I_POP, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48463, 0},
+    {I_POP, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48468, 19},
+    {I_POP, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48473, 7},
+    {I_POP, 1, {REG_ES,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12813, 1},
+    {I_POP, 1, {REG_CS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+7495, 93},
+    {I_POP, 1, {REG_SS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+7621, 1},
+    {I_POP, 1, {REG_DS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+7765, 1},
+    {I_POP, 1, {REG_FS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50017, 5},
+    {I_POP, 1, {REG_GS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50021, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_POPA = {
+    {I_POPA, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50025, 18},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_POPAD = {
+    {I_POPAD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50029, 19},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_POPAW = {
+    {I_POPAW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50033, 18},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_POPF = {
+    {I_POPF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50037, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_POPFD = {
+    {I_POPFD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50041, 19},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_POPFQ = {
+    {I_POPFQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50041, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_POPFW = {
+    {I_POPFW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50045, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_POR = {
+    {I_POR, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33418, 87},
+    {I_POR, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45287, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PREFETCH = {
+    {I_PREFETCH, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48478, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PREFETCHW = {
+    {I_PREFETCHW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48483, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSLLD = {
+    {I_PSLLD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33425, 87},
+    {I_PSLLD, 2, {MMXREG,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33432, 34},
+    {I_PSLLD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45305, 148},
+    {I_PSLLD, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34230, 158},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSLLQ = {
+    {I_PSLLQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33439, 87},
+    {I_PSLLQ, 2, {MMXREG,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33446, 34},
+    {I_PSLLQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45311, 148},
+    {I_PSLLQ, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34237, 158},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSLLW = {
+    {I_PSLLW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33453, 87},
+    {I_PSLLW, 2, {MMXREG,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33460, 34},
+    {I_PSLLW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45299, 148},
+    {I_PSLLW, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34223, 158},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSRAD = {
+    {I_PSRAD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33467, 87},
+    {I_PSRAD, 2, {MMXREG,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33474, 34},
+    {I_PSRAD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45323, 148},
+    {I_PSRAD, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34251, 158},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSRAW = {
+    {I_PSRAW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33481, 87},
+    {I_PSRAW, 2, {MMXREG,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33488, 34},
+    {I_PSRAW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45317, 148},
+    {I_PSRAW, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34244, 158},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSRLD = {
+    {I_PSRLD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33495, 87},
+    {I_PSRLD, 2, {MMXREG,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33502, 34},
+    {I_PSRLD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45335, 148},
+    {I_PSRLD, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34272, 158},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSRLQ = {
+    {I_PSRLQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33509, 87},
+    {I_PSRLQ, 2, {MMXREG,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33516, 34},
+    {I_PSRLQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45341, 148},
+    {I_PSRLQ, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34279, 158},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSRLW = {
+    {I_PSRLW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33523, 87},
+    {I_PSRLW, 2, {MMXREG,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33530, 34},
+    {I_PSRLW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45329, 148},
+    {I_PSRLW, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34265, 158},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSUBB = {
+    {I_PSUBB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33537, 87},
+    {I_PSUBB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45347, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSUBD = {
+    {I_PSUBD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33544, 87},
+    {I_PSUBD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45359, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSUBSB = {
+    {I_PSUBSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33551, 87},
+    {I_PSUBSB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45371, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSUBSIW = {
+    {I_PSUBSIW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43625, 90},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSUBSW = {
+    {I_PSUBSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33558, 87},
+    {I_PSUBSW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45377, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSUBUSB = {
+    {I_PSUBUSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33565, 87},
+    {I_PSUBUSB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45383, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSUBUSW = {
+    {I_PSUBUSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33572, 87},
+    {I_PSUBUSW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45389, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSUBW = {
+    {I_PSUBW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33579, 87},
+    {I_PSUBW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45353, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PUNPCKHBW = {
+    {I_PUNPCKHBW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33586, 87},
+    {I_PUNPCKHBW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45395, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PUNPCKHDQ = {
+    {I_PUNPCKHDQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33593, 87},
+    {I_PUNPCKHDQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45407, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PUNPCKHWD = {
+    {I_PUNPCKHWD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33600, 87},
+    {I_PUNPCKHWD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45401, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PUNPCKLBW = {
+    {I_PUNPCKLBW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33607, 87},
+    {I_PUNPCKLBW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45419, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PUNPCKLDQ = {
+    {I_PUNPCKLDQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33614, 87},
+    {I_PUNPCKLDQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45431, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PUNPCKLWD = {
+    {I_PUNPCKLWD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33621, 87},
+    {I_PUNPCKLWD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45425, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PUSH = {
+    {I_PUSH, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50049, 0},
+    {I_PUSH, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50053, 19},
+    {I_PUSH, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50057, 7},
+    {I_PUSH, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48488, 0},
+    {I_PUSH, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48493, 19},
+    {I_PUSH, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48498, 7},
+    {I_PUSH, 1, {REG_ES,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12781, 1},
+    {I_PUSH, 1, {REG_CS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+7477, 1},
+    {I_PUSH, 1, {REG_SS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+7603, 1},
+    {I_PUSH, 1, {REG_DS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+7747, 1},
+    {I_PUSH, 1, {REG_FS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50061, 5},
+    {I_PUSH, 1, {REG_GS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50065, 5},
+    {I_PUSH, 1, {IMMEDIATE|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48524, 35},
+    {I_PUSH, 1, {SBYTEWORD|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48503, 94},
+    {I_PUSH, 1, {IMMEDIATE|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48508, 94},
+    {I_PUSH, 1, {SBYTEDWORD|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48513, 95},
+    {I_PUSH, 1, {IMMEDIATE|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48518, 95},
+    {I_PUSH, 1, {SBYTEDWORD|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48513, 96},
+    {I_PUSH, 1, {IMMEDIATE|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48518, 96},
+    {I_PUSH, 1, {SBYTEDWORD|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48523, 97},
+    {I_PUSH, 1, {IMMEDIATE|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48528, 97},
+    {I_PUSH, 1, {SBYTEDWORD|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48523, 97},
+    {I_PUSH, 1, {IMMEDIATE|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48528, 97},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PUSHA = {
+    {I_PUSHA, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50069, 18},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PUSHAD = {
+    {I_PUSHAD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50073, 19},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PUSHAW = {
+    {I_PUSHAW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50077, 18},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PUSHF = {
+    {I_PUSHF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50081, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PUSHFD = {
+    {I_PUSHFD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50085, 19},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PUSHFQ = {
+    {I_PUSHFQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50085, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PUSHFW = {
+    {I_PUSHFW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50089, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PXOR = {
+    {I_PXOR, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33628, 87},
+    {I_PXOR, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45443, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RCL = {
+    {I_RCL, 2, {RM_GPR|BITS8,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+50093, 0},
+    {I_RCL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+50097, 0},
+    {I_RCL, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48533, 35},
+    {I_RCL, 2, {RM_GPR|BITS16,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48538, 0},
+    {I_RCL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48543, 0},
+    {I_RCL, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43631, 35},
+    {I_RCL, 2, {RM_GPR|BITS32,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48548, 5},
+    {I_RCL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48553, 5},
+    {I_RCL, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43637, 5},
+    {I_RCL, 2, {RM_GPR|BITS64,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48558, 7},
+    {I_RCL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48563, 7},
+    {I_RCL, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43643, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RCR = {
+    {I_RCR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+50101, 0},
+    {I_RCR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+50105, 0},
+    {I_RCR, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48568, 35},
+    {I_RCR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48573, 0},
+    {I_RCR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48578, 0},
+    {I_RCR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43649, 35},
+    {I_RCR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48583, 5},
+    {I_RCR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48588, 5},
+    {I_RCR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43655, 5},
+    {I_RCR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48593, 7},
+    {I_RCR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48598, 7},
+    {I_RCR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43661, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RDSHR = {
+    {I_RDSHR, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43667, 98},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RDMSR = {
+    {I_RDMSR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50109, 99},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RDPMC = {
+    {I_RDPMC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50113, 89},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RDTSC = {
+    {I_RDTSC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50117, 28},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RDTSCP = {
+    {I_RDTSCP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48603, 100},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RET = {
+    {I_RET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50138, 21},
+    {I_RET, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48629, 101},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RETF = {
+    {I_RETF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50142, 0},
+    {I_RETF, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48634, 75},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RETN = {
+    {I_RETN, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50138, 21},
+    {I_RETN, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48629, 101},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RETW = {
+    {I_RETW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50121, 21},
+    {I_RETW, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48629, 101},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RETFW = {
+    {I_RETFW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50125, 0},
+    {I_RETFW, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48608, 75},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RETNW = {
+    {I_RETNW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50121, 21},
+    {I_RETNW, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48613, 101},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RETD = {
+    {I_RETD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50129, 22},
+    {I_RETD, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48618, 102},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RETFD = {
+    {I_RETFD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50133, 0},
+    {I_RETFD, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48623, 75},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RETND = {
+    {I_RETND, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50129, 22},
+    {I_RETND, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48618, 102},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RETQ = {
+    {I_RETQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50137, 24},
+    {I_RETQ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48628, 103},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RETFQ = {
+    {I_RETFQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50141, 7},
+    {I_RETFQ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48633, 104},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RETNQ = {
+    {I_RETNQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50137, 24},
+    {I_RETNQ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48628, 103},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ROL = {
+    {I_ROL, 2, {RM_GPR|BITS8,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+50145, 0},
+    {I_ROL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+50149, 0},
+    {I_ROL, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48638, 35},
+    {I_ROL, 2, {RM_GPR|BITS16,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48643, 0},
+    {I_ROL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48648, 0},
+    {I_ROL, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43673, 35},
+    {I_ROL, 2, {RM_GPR|BITS32,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48653, 5},
+    {I_ROL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48658, 5},
+    {I_ROL, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43679, 5},
+    {I_ROL, 2, {RM_GPR|BITS64,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48663, 7},
+    {I_ROL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48668, 7},
+    {I_ROL, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43685, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ROR = {
+    {I_ROR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+50153, 0},
+    {I_ROR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+50157, 0},
+    {I_ROR, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48673, 35},
+    {I_ROR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48678, 0},
+    {I_ROR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48683, 0},
+    {I_ROR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43691, 35},
+    {I_ROR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48688, 5},
+    {I_ROR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48693, 5},
+    {I_ROR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43697, 5},
+    {I_ROR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48698, 7},
+    {I_ROR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48703, 7},
+    {I_ROR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43703, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RDM = {
+    {I_RDM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49321, 33},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RSDC = {
+    {I_RSDC, 2, {REG_SREG,MEMORY|BITS80,0,0,0}, NO_DECORATOR, nasm_bytecodes+45834, 105},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RSLDT = {
+    {I_RSLDT, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48708, 105},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RSM = {
+    {I_RSM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50161, 106},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RSTS = {
+    {I_RSTS, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48713, 105},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SAHF = {
+    {I_SAHF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12405, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SAL = {
+    {I_SAL, 2, {RM_GPR|BITS8,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+50165, 0},
+    {I_SAL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+50169, 0},
+    {I_SAL, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48718, 35},
+    {I_SAL, 2, {RM_GPR|BITS16,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48723, 0},
+    {I_SAL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48728, 0},
+    {I_SAL, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43709, 35},
+    {I_SAL, 2, {RM_GPR|BITS32,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48733, 5},
+    {I_SAL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48738, 5},
+    {I_SAL, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43715, 5},
+    {I_SAL, 2, {RM_GPR|BITS64,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48743, 7},
+    {I_SAL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48748, 7},
+    {I_SAL, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43721, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SALC = {
+    {I_SALC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49280, 107},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SAR = {
+    {I_SAR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+50173, 0},
+    {I_SAR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+50177, 0},
+    {I_SAR, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48753, 35},
+    {I_SAR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48758, 0},
+    {I_SAR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48763, 0},
+    {I_SAR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43727, 35},
+    {I_SAR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48768, 5},
+    {I_SAR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48773, 5},
+    {I_SAR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43733, 5},
+    {I_SAR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48778, 7},
+    {I_SAR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48783, 7},
+    {I_SAR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43739, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SBB = {
+    {I_SBB, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48788, 3},
+    {I_SBB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48789, 0},
+    {I_SBB, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43745, 3},
+    {I_SBB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43746, 0},
+    {I_SBB, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43751, 4},
+    {I_SBB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43752, 5},
+    {I_SBB, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43757, 6},
+    {I_SBB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43758, 7},
+    {I_SBB, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+35276, 8},
+    {I_SBB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+35276, 0},
+    {I_SBB, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48793, 8},
+    {I_SBB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+48793, 0},
+    {I_SBB, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48798, 9},
+    {I_SBB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48798, 5},
+    {I_SBB, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48803, 10},
+    {I_SBB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+48803, 7},
+    {I_SBB, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33635, 11},
+    {I_SBB, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33642, 12},
+    {I_SBB, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33649, 13},
+    {I_SBB, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+50181, 8},
+    {I_SBB, 2, {REG_AX,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33636, 8},
+    {I_SBB, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48808, 8},
+    {I_SBB, 2, {REG_EAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33643, 9},
+    {I_SBB, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48813, 9},
+    {I_SBB, 2, {REG_RAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33650, 10},
+    {I_SBB, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48818, 10},
+    {I_SBB, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43763, 3},
+    {I_SBB, 2, {RM_GPR|BITS16,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33635, 3},
+    {I_SBB, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33656, 3},
+    {I_SBB, 2, {RM_GPR|BITS32,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33642, 4},
+    {I_SBB, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33663, 4},
+    {I_SBB, 2, {RM_GPR|BITS64,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33649, 6},
+    {I_SBB, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33670, 6},
+    {I_SBB, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43763, 3},
+    {I_SBB, 2, {MEMORY,SBYTEWORD|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33635, 3},
+    {I_SBB, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33656, 3},
+    {I_SBB, 2, {MEMORY,SBYTEDWORD|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33642, 4},
+    {I_SBB, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33663, 4},
+    {I_SBB, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43769, 14},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SCASB = {
+    {I_SCASB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50185, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SCASD = {
+    {I_SCASD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48823, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SCASQ = {
+    {I_SCASQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48828, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SCASW = {
+    {I_SCASW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48833, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SFENCE = {
+    {I_SFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43775, 59},
+    {I_SFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43775, 142},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SGDT = {
+    {I_SGDT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48838, 108},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SHL = {
+    {I_SHL, 2, {RM_GPR|BITS8,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+50165, 0},
+    {I_SHL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+50169, 0},
+    {I_SHL, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48718, 35},
+    {I_SHL, 2, {RM_GPR|BITS16,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48723, 0},
+    {I_SHL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48728, 0},
+    {I_SHL, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43709, 35},
+    {I_SHL, 2, {RM_GPR|BITS32,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48733, 5},
+    {I_SHL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48738, 5},
+    {I_SHL, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43715, 5},
+    {I_SHL, 2, {RM_GPR|BITS64,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48743, 7},
+    {I_SHL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48748, 7},
+    {I_SHL, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43721, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SHLD = {
+    {I_SHLD, 3, {MEMORY,REG_GPR|BITS16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33677, 109},
+    {I_SHLD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33677, 109},
+    {I_SHLD, 3, {MEMORY,REG_GPR|BITS32,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33684, 109},
+    {I_SHLD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33684, 109},
+    {I_SHLD, 3, {MEMORY,REG_GPR|BITS64,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33691, 110},
+    {I_SHLD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33691, 110},
+    {I_SHLD, 3, {MEMORY,REG_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43781, 9},
+    {I_SHLD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43781, 5},
+    {I_SHLD, 3, {MEMORY,REG_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43787, 9},
+    {I_SHLD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43787, 5},
+    {I_SHLD, 3, {MEMORY,REG_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43793, 10},
+    {I_SHLD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43793, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SHR = {
+    {I_SHR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+50189, 0},
+    {I_SHR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+50193, 0},
+    {I_SHR, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48843, 35},
+    {I_SHR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48848, 0},
+    {I_SHR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48853, 0},
+    {I_SHR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43799, 35},
+    {I_SHR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48858, 5},
+    {I_SHR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48863, 5},
+    {I_SHR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43805, 5},
+    {I_SHR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48868, 7},
+    {I_SHR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48873, 7},
+    {I_SHR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43811, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SHRD = {
+    {I_SHRD, 3, {MEMORY,REG_GPR|BITS16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33698, 109},
+    {I_SHRD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33698, 109},
+    {I_SHRD, 3, {MEMORY,REG_GPR|BITS32,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33705, 109},
+    {I_SHRD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33705, 109},
+    {I_SHRD, 3, {MEMORY,REG_GPR|BITS64,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33712, 110},
+    {I_SHRD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33712, 110},
+    {I_SHRD, 3, {MEMORY,REG_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43817, 9},
+    {I_SHRD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43817, 5},
+    {I_SHRD, 3, {MEMORY,REG_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43823, 9},
+    {I_SHRD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43823, 5},
+    {I_SHRD, 3, {MEMORY,REG_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43829, 10},
+    {I_SHRD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43829, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SIDT = {
+    {I_SIDT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48878, 108},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SLDT = {
+    {I_SLDT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43854, 108},
+    {I_SLDT, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43854, 108},
+    {I_SLDT, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43835, 108},
+    {I_SLDT, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43841, 5},
+    {I_SLDT, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43847, 7},
+    {I_SLDT, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43853, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SKINIT = {
+    {I_SKINIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48883, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SMI = {
+    {I_SMI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50311, 111},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SMINT = {
+    {I_SMINT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50197, 33},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SMINTOLD = {
+    {I_SMINTOLD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50201, 112},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SMSW = {
+    {I_SMSW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43872, 108},
+    {I_SMSW, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43872, 108},
+    {I_SMSW, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43859, 108},
+    {I_SMSW, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43865, 5},
+    {I_SMSW, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43871, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_STC = {
+    {I_STC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48605, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_STD = {
+    {I_STD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50332, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_STI = {
+    {I_STI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48400, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_STOSB = {
+    {I_STOSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12509, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_STOSD = {
+    {I_STOSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50205, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_STOSQ = {
+    {I_STOSQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50209, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_STOSW = {
+    {I_STOSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50213, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_STR = {
+    {I_STR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43890, 62},
+    {I_STR, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43890, 62},
+    {I_STR, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43877, 62},
+    {I_STR, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43883, 63},
+    {I_STR, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43889, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SUB = {
+    {I_SUB, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48888, 3},
+    {I_SUB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48889, 0},
+    {I_SUB, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43895, 3},
+    {I_SUB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43896, 0},
+    {I_SUB, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43901, 4},
+    {I_SUB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43902, 5},
+    {I_SUB, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43907, 6},
+    {I_SUB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43908, 7},
+    {I_SUB, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+41044, 8},
+    {I_SUB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+41044, 0},
+    {I_SUB, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48893, 8},
+    {I_SUB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+48893, 0},
+    {I_SUB, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48898, 9},
+    {I_SUB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48898, 5},
+    {I_SUB, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48903, 10},
+    {I_SUB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+48903, 7},
+    {I_SUB, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33719, 11},
+    {I_SUB, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33726, 12},
+    {I_SUB, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33733, 13},
+    {I_SUB, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+50217, 8},
+    {I_SUB, 2, {REG_AX,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33720, 8},
+    {I_SUB, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48908, 8},
+    {I_SUB, 2, {REG_EAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33727, 9},
+    {I_SUB, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48913, 9},
+    {I_SUB, 2, {REG_RAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33734, 10},
+    {I_SUB, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48918, 10},
+    {I_SUB, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43913, 3},
+    {I_SUB, 2, {RM_GPR|BITS16,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33719, 3},
+    {I_SUB, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33740, 3},
+    {I_SUB, 2, {RM_GPR|BITS32,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33726, 4},
+    {I_SUB, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33747, 4},
+    {I_SUB, 2, {RM_GPR|BITS64,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33733, 6},
+    {I_SUB, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33754, 6},
+    {I_SUB, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43913, 3},
+    {I_SUB, 2, {MEMORY,SBYTEWORD|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33719, 3},
+    {I_SUB, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33740, 3},
+    {I_SUB, 2, {MEMORY,SBYTEDWORD|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33726, 4},
+    {I_SUB, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33747, 4},
+    {I_SUB, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43919, 14},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SVDC = {
+    {I_SVDC, 2, {MEMORY|BITS80,REG_SREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34365, 105},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SVLDT = {
+    {I_SVLDT, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48923, 105},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SVTS = {
+    {I_SVTS, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48928, 105},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SWAPGS = {
+    {I_SWAPGS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48933, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SYSCALL = {
+    {I_SYSCALL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49929, 113},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SYSENTER = {
+    {I_SYSENTER, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50221, 89},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SYSEXIT = {
+    {I_SYSEXIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50225, 114},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SYSRET = {
+    {I_SYSRET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49925, 115},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_TEST = {
+    {I_TEST, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+50229, 8},
+    {I_TEST, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+50229, 0},
+    {I_TEST, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+48938, 8},
+    {I_TEST, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+48938, 0},
+    {I_TEST, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48943, 9},
+    {I_TEST, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48943, 5},
+    {I_TEST, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+48948, 10},
+    {I_TEST, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+48948, 7},
+    {I_TEST, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+50233, 8},
+    {I_TEST, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48953, 8},
+    {I_TEST, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48958, 9},
+    {I_TEST, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48963, 10},
+    {I_TEST, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+50237, 8},
+    {I_TEST, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48968, 8},
+    {I_TEST, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48973, 9},
+    {I_TEST, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48978, 10},
+    {I_TEST, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48983, 8},
+    {I_TEST, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43925, 8},
+    {I_TEST, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43931, 9},
+    {I_TEST, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43937, 10},
+    {I_TEST, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48983, 8},
+    {I_TEST, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43925, 8},
+    {I_TEST, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43931, 9},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_UD0 = {
+    {I_UD0, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50241, 116},
+    {I_UD0, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43943, 35},
+    {I_UD0, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43949, 35},
+    {I_UD0, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43955, 35},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_UD1 = {
+    {I_UD1, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43961, 35},
+    {I_UD1, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43967, 35},
+    {I_UD1, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43973, 35},
+    {I_UD1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50245, 35},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_UD2B = {
+    {I_UD2B, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50245, 35},
+    {I_UD2B, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43961, 35},
+    {I_UD2B, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43967, 35},
+    {I_UD2B, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43973, 35},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_UD2 = {
+    {I_UD2, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50249, 35},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_UD2A = {
+    {I_UD2A, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50249, 35},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_UMOV = {
+    {I_UMOV, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43979, 117},
+    {I_UMOV, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43979, 111},
+    {I_UMOV, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33761, 117},
+    {I_UMOV, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33761, 111},
+    {I_UMOV, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33768, 117},
+    {I_UMOV, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33768, 111},
+    {I_UMOV, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43985, 117},
+    {I_UMOV, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43985, 111},
+    {I_UMOV, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33775, 117},
+    {I_UMOV, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33775, 111},
+    {I_UMOV, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33782, 117},
+    {I_UMOV, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33782, 111},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VERR = {
+    {I_VERR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48988, 62},
+    {I_VERR, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48988, 62},
+    {I_VERR, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48988, 62},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VERW = {
+    {I_VERW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48993, 62},
+    {I_VERW, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48993, 62},
+    {I_VERW, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48993, 62},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FWAIT = {
+    {I_FWAIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49827, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_WBINVD = {
+    {I_WBINVD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49289, 54},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_WRSHR = {
+    {I_WRSHR, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43991, 98},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_WRMSR = {
+    {I_WRMSR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50253, 99},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XADD = {
+    {I_XADD, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43997, 118},
+    {I_XADD, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43998, 20},
+    {I_XADD, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33789, 118},
+    {I_XADD, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33790, 20},
+    {I_XADD, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33796, 118},
+    {I_XADD, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33797, 20},
+    {I_XADD, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33803, 6},
+    {I_XADD, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33804, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XBTS = {
+    {I_XBTS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44003, 119},
+    {I_XBTS, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44003, 111},
+    {I_XBTS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44009, 120},
+    {I_XBTS, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44009, 111},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XCHG = {
+    {I_XCHG, 2, {REG_AX,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+50257, 0},
+    {I_XCHG, 2, {REG_EAX,REG32NA,0,0,0}, NO_DECORATOR, nasm_bytecodes+50261, 5},
+    {I_XCHG, 2, {REG_RAX,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+50265, 7},
+    {I_XCHG, 2, {REG_GPR|BITS16,REG_AX,0,0,0}, NO_DECORATOR, nasm_bytecodes+50269, 0},
+    {I_XCHG, 2, {REG32NA,REG_EAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+50273, 5},
+    {I_XCHG, 2, {REG_GPR|BITS64,REG_RAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+50277, 7},
+    {I_XCHG, 2, {REG_EAX,REG_EAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+50281, 19},
+    {I_XCHG, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48999, 0},
+    {I_XCHG, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44016, 0},
+    {I_XCHG, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44022, 5},
+    {I_XCHG, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44028, 7},
+    {I_XCHG, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48998, 3},
+    {I_XCHG, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44015, 3},
+    {I_XCHG, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44021, 4},
+    {I_XCHG, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44027, 6},
+    {I_XCHG, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+49003, 121},
+    {I_XCHG, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44033, 121},
+    {I_XCHG, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44039, 122},
+    {I_XCHG, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44045, 123},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XLATB = {
+    {I_XLATB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46118, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XLAT = {
+    {I_XLAT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46118, 0},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XOR = {
+    {I_XOR, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+49008, 3},
+    {I_XOR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+49009, 0},
+    {I_XOR, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44051, 3},
+    {I_XOR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44052, 0},
+    {I_XOR, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44057, 4},
+    {I_XOR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44058, 5},
+    {I_XOR, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44063, 6},
+    {I_XOR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44064, 7},
+    {I_XOR, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+40484, 8},
+    {I_XOR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+40484, 0},
+    {I_XOR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+49013, 8},
+    {I_XOR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+49013, 0},
+    {I_XOR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+49018, 9},
+    {I_XOR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+49018, 5},
+    {I_XOR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+49023, 10},
+    {I_XOR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+49023, 7},
+    {I_XOR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33810, 11},
+    {I_XOR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33817, 12},
+    {I_XOR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33824, 13},
+    {I_XOR, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+50285, 8},
+    {I_XOR, 2, {REG_AX,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33811, 8},
+    {I_XOR, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49028, 8},
+    {I_XOR, 2, {REG_EAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33818, 9},
+    {I_XOR, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49033, 9},
+    {I_XOR, 2, {REG_RAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33825, 10},
+    {I_XOR, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49038, 10},
+    {I_XOR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+44069, 3},
+    {I_XOR, 2, {RM_GPR|BITS16,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33810, 3},
+    {I_XOR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33831, 3},
+    {I_XOR, 2, {RM_GPR|BITS32,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33817, 4},
+    {I_XOR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33838, 4},
+    {I_XOR, 2, {RM_GPR|BITS64,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33824, 6},
+    {I_XOR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33845, 6},
+    {I_XOR, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+44069, 3},
+    {I_XOR, 2, {MEMORY,SBYTEWORD|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33810, 3},
+    {I_XOR, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33831, 3},
+    {I_XOR, 2, {MEMORY,SBYTEDWORD|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33817, 4},
+    {I_XOR, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33838, 4},
+    {I_XOR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+44075, 14},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVA = {
+    {I_CMOVA, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44081, 124},
+    {I_CMOVA, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44081, 89},
+    {I_CMOVA, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44177, 124},
+    {I_CMOVA, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44177, 89},
+    {I_CMOVA, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44273, 10},
+    {I_CMOVA, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44273, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVAE = {
+    {I_CMOVAE, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44087, 124},
+    {I_CMOVAE, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44087, 89},
+    {I_CMOVAE, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44183, 124},
+    {I_CMOVAE, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44183, 89},
+    {I_CMOVAE, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44279, 10},
+    {I_CMOVAE, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44279, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVB = {
+    {I_CMOVB, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44093, 124},
+    {I_CMOVB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44093, 89},
+    {I_CMOVB, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44189, 124},
+    {I_CMOVB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44189, 89},
+    {I_CMOVB, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44285, 10},
+    {I_CMOVB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44285, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVBE = {
+    {I_CMOVBE, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44099, 124},
+    {I_CMOVBE, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44099, 89},
+    {I_CMOVBE, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44195, 124},
+    {I_CMOVBE, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44195, 89},
+    {I_CMOVBE, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44291, 10},
+    {I_CMOVBE, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44291, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVC = {
+    {I_CMOVC, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44093, 124},
+    {I_CMOVC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44093, 89},
+    {I_CMOVC, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44189, 124},
+    {I_CMOVC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44189, 89},
+    {I_CMOVC, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44285, 10},
+    {I_CMOVC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44285, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVE = {
+    {I_CMOVE, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44105, 124},
+    {I_CMOVE, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44105, 89},
+    {I_CMOVE, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44201, 124},
+    {I_CMOVE, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44201, 89},
+    {I_CMOVE, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44297, 10},
+    {I_CMOVE, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44297, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVG = {
+    {I_CMOVG, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44111, 124},
+    {I_CMOVG, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44111, 89},
+    {I_CMOVG, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44207, 124},
+    {I_CMOVG, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44207, 89},
+    {I_CMOVG, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44303, 10},
+    {I_CMOVG, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44303, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVGE = {
+    {I_CMOVGE, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44117, 124},
+    {I_CMOVGE, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44117, 89},
+    {I_CMOVGE, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44213, 124},
+    {I_CMOVGE, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44213, 89},
+    {I_CMOVGE, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44309, 10},
+    {I_CMOVGE, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44309, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVL = {
+    {I_CMOVL, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44123, 124},
+    {I_CMOVL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44123, 89},
+    {I_CMOVL, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44219, 124},
+    {I_CMOVL, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44219, 89},
+    {I_CMOVL, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44315, 10},
+    {I_CMOVL, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44315, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVLE = {
+    {I_CMOVLE, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44129, 124},
+    {I_CMOVLE, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44129, 89},
+    {I_CMOVLE, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44225, 124},
+    {I_CMOVLE, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44225, 89},
+    {I_CMOVLE, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44321, 10},
+    {I_CMOVLE, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44321, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVNA = {
+    {I_CMOVNA, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44099, 124},
+    {I_CMOVNA, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44099, 89},
+    {I_CMOVNA, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44195, 124},
+    {I_CMOVNA, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44195, 89},
+    {I_CMOVNA, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44291, 10},
+    {I_CMOVNA, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44291, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVNAE = {
+    {I_CMOVNAE, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44093, 124},
+    {I_CMOVNAE, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44093, 89},
+    {I_CMOVNAE, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44189, 124},
+    {I_CMOVNAE, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44189, 89},
+    {I_CMOVNAE, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44285, 10},
+    {I_CMOVNAE, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44285, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVNB = {
+    {I_CMOVNB, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44087, 124},
+    {I_CMOVNB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44087, 89},
+    {I_CMOVNB, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44183, 124},
+    {I_CMOVNB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44183, 89},
+    {I_CMOVNB, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44279, 10},
+    {I_CMOVNB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44279, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVNBE = {
+    {I_CMOVNBE, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44081, 124},
+    {I_CMOVNBE, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44081, 89},
+    {I_CMOVNBE, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44177, 124},
+    {I_CMOVNBE, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44177, 89},
+    {I_CMOVNBE, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44273, 10},
+    {I_CMOVNBE, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44273, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVNC = {
+    {I_CMOVNC, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44087, 124},
+    {I_CMOVNC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44087, 89},
+    {I_CMOVNC, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44183, 124},
+    {I_CMOVNC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44183, 89},
+    {I_CMOVNC, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44279, 10},
+    {I_CMOVNC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44279, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVNE = {
+    {I_CMOVNE, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44135, 124},
+    {I_CMOVNE, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44135, 89},
+    {I_CMOVNE, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44231, 124},
+    {I_CMOVNE, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44231, 89},
+    {I_CMOVNE, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44327, 10},
+    {I_CMOVNE, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44327, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVNG = {
+    {I_CMOVNG, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44129, 124},
+    {I_CMOVNG, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44129, 89},
+    {I_CMOVNG, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44225, 124},
+    {I_CMOVNG, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44225, 89},
+    {I_CMOVNG, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44321, 10},
+    {I_CMOVNG, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44321, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVNGE = {
+    {I_CMOVNGE, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44123, 124},
+    {I_CMOVNGE, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44123, 89},
+    {I_CMOVNGE, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44219, 124},
+    {I_CMOVNGE, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44219, 89},
+    {I_CMOVNGE, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44315, 10},
+    {I_CMOVNGE, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44315, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVNL = {
+    {I_CMOVNL, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44117, 124},
+    {I_CMOVNL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44117, 89},
+    {I_CMOVNL, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44213, 124},
+    {I_CMOVNL, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44213, 89},
+    {I_CMOVNL, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44309, 10},
+    {I_CMOVNL, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44309, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVNLE = {
+    {I_CMOVNLE, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44111, 124},
+    {I_CMOVNLE, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44111, 89},
+    {I_CMOVNLE, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44207, 124},
+    {I_CMOVNLE, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44207, 89},
+    {I_CMOVNLE, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44303, 10},
+    {I_CMOVNLE, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44303, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVNO = {
+    {I_CMOVNO, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44141, 124},
+    {I_CMOVNO, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44141, 89},
+    {I_CMOVNO, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44237, 124},
+    {I_CMOVNO, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44237, 89},
+    {I_CMOVNO, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44333, 10},
+    {I_CMOVNO, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44333, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVNP = {
+    {I_CMOVNP, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44147, 124},
+    {I_CMOVNP, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44147, 89},
+    {I_CMOVNP, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44243, 124},
+    {I_CMOVNP, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44243, 89},
+    {I_CMOVNP, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44339, 10},
+    {I_CMOVNP, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44339, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVNS = {
+    {I_CMOVNS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44153, 124},
+    {I_CMOVNS, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44153, 89},
+    {I_CMOVNS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44249, 124},
+    {I_CMOVNS, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44249, 89},
+    {I_CMOVNS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44345, 10},
+    {I_CMOVNS, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44345, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVNZ = {
+    {I_CMOVNZ, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44135, 124},
+    {I_CMOVNZ, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44135, 89},
+    {I_CMOVNZ, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44231, 124},
+    {I_CMOVNZ, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44231, 89},
+    {I_CMOVNZ, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44327, 10},
+    {I_CMOVNZ, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44327, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVO = {
+    {I_CMOVO, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44159, 124},
+    {I_CMOVO, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44159, 89},
+    {I_CMOVO, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44255, 124},
+    {I_CMOVO, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44255, 89},
+    {I_CMOVO, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44351, 10},
+    {I_CMOVO, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44351, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVP = {
+    {I_CMOVP, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44165, 124},
+    {I_CMOVP, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44165, 89},
+    {I_CMOVP, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44261, 124},
+    {I_CMOVP, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44261, 89},
+    {I_CMOVP, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44357, 10},
+    {I_CMOVP, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44357, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVPE = {
+    {I_CMOVPE, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44165, 124},
+    {I_CMOVPE, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44165, 89},
+    {I_CMOVPE, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44261, 124},
+    {I_CMOVPE, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44261, 89},
+    {I_CMOVPE, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44357, 10},
+    {I_CMOVPE, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44357, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVPO = {
+    {I_CMOVPO, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44147, 124},
+    {I_CMOVPO, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44147, 89},
+    {I_CMOVPO, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44243, 124},
+    {I_CMOVPO, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44243, 89},
+    {I_CMOVPO, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44339, 10},
+    {I_CMOVPO, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44339, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVS = {
+    {I_CMOVS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44171, 124},
+    {I_CMOVS, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44171, 89},
+    {I_CMOVS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44267, 124},
+    {I_CMOVS, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44267, 89},
+    {I_CMOVS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44363, 10},
+    {I_CMOVS, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44363, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMOVZ = {
+    {I_CMOVZ, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44105, 124},
+    {I_CMOVZ, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44105, 89},
+    {I_CMOVZ, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44201, 124},
+    {I_CMOVZ, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44201, 89},
+    {I_CMOVZ, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44297, 10},
+    {I_CMOVZ, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44297, 7},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JA = {
+    {I_JA, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44369, 125},
+    {I_JA, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44465, 23},
+    {I_JA, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44561, 23},
+    {I_JA, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44657, 24},
+    {I_JA, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49044, 21},
+    {I_JA, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49043, 21},
+    {I_JA, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44658, 125},
+    {I_JA, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33852, 21},
+    {I_JA, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49044, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JAE = {
+    {I_JAE, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44375, 125},
+    {I_JAE, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44471, 23},
+    {I_JAE, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44567, 23},
+    {I_JAE, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44663, 24},
+    {I_JAE, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49049, 21},
+    {I_JAE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49048, 21},
+    {I_JAE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44664, 125},
+    {I_JAE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33859, 21},
+    {I_JAE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49049, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JB = {
+    {I_JB, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44381, 125},
+    {I_JB, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44477, 23},
+    {I_JB, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44573, 23},
+    {I_JB, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44669, 24},
+    {I_JB, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49054, 21},
+    {I_JB, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49053, 21},
+    {I_JB, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44670, 125},
+    {I_JB, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33866, 21},
+    {I_JB, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49054, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JBE = {
+    {I_JBE, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44387, 125},
+    {I_JBE, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44483, 23},
+    {I_JBE, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44579, 23},
+    {I_JBE, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44675, 24},
+    {I_JBE, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49059, 21},
+    {I_JBE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49058, 21},
+    {I_JBE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44676, 125},
+    {I_JBE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33873, 21},
+    {I_JBE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49059, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JC = {
+    {I_JC, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44381, 125},
+    {I_JC, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44477, 23},
+    {I_JC, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44573, 23},
+    {I_JC, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44669, 24},
+    {I_JC, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49054, 21},
+    {I_JC, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49053, 21},
+    {I_JC, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44670, 125},
+    {I_JC, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33866, 21},
+    {I_JC, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49054, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JE = {
+    {I_JE, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44393, 125},
+    {I_JE, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44489, 23},
+    {I_JE, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44585, 23},
+    {I_JE, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44681, 24},
+    {I_JE, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49064, 21},
+    {I_JE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49063, 21},
+    {I_JE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44682, 125},
+    {I_JE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33880, 21},
+    {I_JE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49064, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JG = {
+    {I_JG, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44399, 125},
+    {I_JG, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44495, 23},
+    {I_JG, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44591, 23},
+    {I_JG, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44687, 24},
+    {I_JG, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49069, 21},
+    {I_JG, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49068, 21},
+    {I_JG, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44688, 125},
+    {I_JG, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33887, 21},
+    {I_JG, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49069, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JGE = {
+    {I_JGE, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44405, 125},
+    {I_JGE, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44501, 23},
+    {I_JGE, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44597, 23},
+    {I_JGE, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44693, 24},
+    {I_JGE, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49074, 21},
+    {I_JGE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49073, 21},
+    {I_JGE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44694, 125},
+    {I_JGE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33894, 21},
+    {I_JGE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49074, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JL = {
+    {I_JL, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44411, 125},
+    {I_JL, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44507, 23},
+    {I_JL, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44603, 23},
+    {I_JL, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44699, 24},
+    {I_JL, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49079, 21},
+    {I_JL, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49078, 21},
+    {I_JL, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44700, 125},
+    {I_JL, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33901, 21},
+    {I_JL, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49079, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JLE = {
+    {I_JLE, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44417, 125},
+    {I_JLE, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44513, 23},
+    {I_JLE, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44609, 23},
+    {I_JLE, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44705, 24},
+    {I_JLE, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49084, 21},
+    {I_JLE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49083, 21},
+    {I_JLE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44706, 125},
+    {I_JLE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33908, 21},
+    {I_JLE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49084, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JNA = {
+    {I_JNA, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44387, 125},
+    {I_JNA, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44483, 23},
+    {I_JNA, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44579, 23},
+    {I_JNA, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44675, 24},
+    {I_JNA, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49059, 21},
+    {I_JNA, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49058, 21},
+    {I_JNA, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44676, 125},
+    {I_JNA, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33873, 21},
+    {I_JNA, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49059, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JNAE = {
+    {I_JNAE, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44381, 125},
+    {I_JNAE, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44477, 23},
+    {I_JNAE, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44573, 23},
+    {I_JNAE, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44669, 24},
+    {I_JNAE, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49054, 21},
+    {I_JNAE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49053, 21},
+    {I_JNAE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44670, 125},
+    {I_JNAE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33866, 21},
+    {I_JNAE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49054, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JNB = {
+    {I_JNB, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44375, 125},
+    {I_JNB, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44471, 23},
+    {I_JNB, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44567, 23},
+    {I_JNB, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44663, 24},
+    {I_JNB, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49049, 21},
+    {I_JNB, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49048, 21},
+    {I_JNB, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44664, 125},
+    {I_JNB, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33859, 21},
+    {I_JNB, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49049, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JNBE = {
+    {I_JNBE, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44369, 125},
+    {I_JNBE, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44465, 23},
+    {I_JNBE, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44561, 23},
+    {I_JNBE, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44657, 24},
+    {I_JNBE, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49044, 21},
+    {I_JNBE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49043, 21},
+    {I_JNBE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44658, 125},
+    {I_JNBE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33852, 21},
+    {I_JNBE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49044, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JNC = {
+    {I_JNC, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44375, 125},
+    {I_JNC, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44471, 23},
+    {I_JNC, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44567, 23},
+    {I_JNC, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44663, 24},
+    {I_JNC, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49049, 21},
+    {I_JNC, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49048, 21},
+    {I_JNC, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44664, 125},
+    {I_JNC, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33859, 21},
+    {I_JNC, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49049, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JNE = {
+    {I_JNE, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44423, 125},
+    {I_JNE, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44519, 23},
+    {I_JNE, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44615, 23},
+    {I_JNE, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44711, 24},
+    {I_JNE, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49089, 21},
+    {I_JNE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49088, 21},
+    {I_JNE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44712, 125},
+    {I_JNE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33915, 21},
+    {I_JNE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49089, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JNG = {
+    {I_JNG, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44417, 125},
+    {I_JNG, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44513, 23},
+    {I_JNG, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44609, 23},
+    {I_JNG, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44705, 24},
+    {I_JNG, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49084, 21},
+    {I_JNG, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49083, 21},
+    {I_JNG, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44706, 125},
+    {I_JNG, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33908, 21},
+    {I_JNG, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49084, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JNGE = {
+    {I_JNGE, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44411, 125},
+    {I_JNGE, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44507, 23},
+    {I_JNGE, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44603, 23},
+    {I_JNGE, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44699, 24},
+    {I_JNGE, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49079, 21},
+    {I_JNGE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49078, 21},
+    {I_JNGE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44700, 125},
+    {I_JNGE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33901, 21},
+    {I_JNGE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49079, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JNL = {
+    {I_JNL, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44405, 125},
+    {I_JNL, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44501, 23},
+    {I_JNL, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44597, 23},
+    {I_JNL, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44693, 24},
+    {I_JNL, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49074, 21},
+    {I_JNL, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49073, 21},
+    {I_JNL, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44694, 125},
+    {I_JNL, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33894, 21},
+    {I_JNL, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49074, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JNLE = {
+    {I_JNLE, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44399, 125},
+    {I_JNLE, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44495, 23},
+    {I_JNLE, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44591, 23},
+    {I_JNLE, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44687, 24},
+    {I_JNLE, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49069, 21},
+    {I_JNLE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49068, 21},
+    {I_JNLE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44688, 125},
+    {I_JNLE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33887, 21},
+    {I_JNLE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49069, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JNO = {
+    {I_JNO, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44429, 125},
+    {I_JNO, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44525, 23},
+    {I_JNO, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44621, 23},
+    {I_JNO, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44717, 24},
+    {I_JNO, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49094, 21},
+    {I_JNO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49093, 21},
+    {I_JNO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44718, 125},
+    {I_JNO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33922, 21},
+    {I_JNO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49094, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JNP = {
+    {I_JNP, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44435, 125},
+    {I_JNP, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44531, 23},
+    {I_JNP, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44627, 23},
+    {I_JNP, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44723, 24},
+    {I_JNP, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49099, 21},
+    {I_JNP, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49098, 21},
+    {I_JNP, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44724, 125},
+    {I_JNP, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33929, 21},
+    {I_JNP, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49099, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JNS = {
+    {I_JNS, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44441, 125},
+    {I_JNS, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44537, 23},
+    {I_JNS, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44633, 23},
+    {I_JNS, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44729, 24},
+    {I_JNS, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49104, 21},
+    {I_JNS, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49103, 21},
+    {I_JNS, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44730, 125},
+    {I_JNS, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33936, 21},
+    {I_JNS, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49104, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JNZ = {
+    {I_JNZ, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44423, 125},
+    {I_JNZ, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44519, 23},
+    {I_JNZ, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44615, 23},
+    {I_JNZ, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44711, 24},
+    {I_JNZ, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49089, 21},
+    {I_JNZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49088, 21},
+    {I_JNZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44712, 125},
+    {I_JNZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33915, 21},
+    {I_JNZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49089, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JO = {
+    {I_JO, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44447, 125},
+    {I_JO, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44543, 23},
+    {I_JO, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44639, 23},
+    {I_JO, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44735, 24},
+    {I_JO, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49109, 21},
+    {I_JO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49108, 21},
+    {I_JO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44736, 125},
+    {I_JO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33943, 21},
+    {I_JO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49109, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JP = {
+    {I_JP, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44453, 125},
+    {I_JP, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44549, 23},
+    {I_JP, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44645, 23},
+    {I_JP, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44741, 24},
+    {I_JP, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49114, 21},
+    {I_JP, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49113, 21},
+    {I_JP, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44742, 125},
+    {I_JP, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33950, 21},
+    {I_JP, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49114, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JPE = {
+    {I_JPE, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44453, 125},
+    {I_JPE, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44549, 23},
+    {I_JPE, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44645, 23},
+    {I_JPE, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44741, 24},
+    {I_JPE, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49114, 21},
+    {I_JPE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49113, 21},
+    {I_JPE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44742, 125},
+    {I_JPE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33950, 21},
+    {I_JPE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49114, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JPO = {
+    {I_JPO, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44435, 125},
+    {I_JPO, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44531, 23},
+    {I_JPO, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44627, 23},
+    {I_JPO, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44723, 24},
+    {I_JPO, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49099, 21},
+    {I_JPO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49098, 21},
+    {I_JPO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44724, 125},
+    {I_JPO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33929, 21},
+    {I_JPO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49099, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JS = {
+    {I_JS, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44459, 125},
+    {I_JS, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44555, 23},
+    {I_JS, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44651, 23},
+    {I_JS, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44747, 24},
+    {I_JS, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49119, 21},
+    {I_JS, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49118, 21},
+    {I_JS, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44748, 125},
+    {I_JS, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33957, 21},
+    {I_JS, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49119, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_JZ = {
+    {I_JZ, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44393, 125},
+    {I_JZ, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44489, 23},
+    {I_JZ, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44585, 23},
+    {I_JZ, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44681, 24},
+    {I_JZ, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49064, 21},
+    {I_JZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49063, 21},
+    {I_JZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44682, 125},
+    {I_JZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33880, 21},
+    {I_JZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49064, 21},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETA = {
+    {I_SETA, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49123, 53},
+    {I_SETA, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49123, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETAE = {
+    {I_SETAE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49128, 53},
+    {I_SETAE, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49128, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETB = {
+    {I_SETB, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49133, 53},
+    {I_SETB, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49133, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETBE = {
+    {I_SETBE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49138, 53},
+    {I_SETBE, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49138, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETC = {
+    {I_SETC, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49133, 53},
+    {I_SETC, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49133, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETE = {
+    {I_SETE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49143, 53},
+    {I_SETE, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49143, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETG = {
+    {I_SETG, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49148, 53},
+    {I_SETG, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49148, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETGE = {
+    {I_SETGE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49153, 53},
+    {I_SETGE, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49153, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETL = {
+    {I_SETL, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49158, 53},
+    {I_SETL, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49158, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETLE = {
+    {I_SETLE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49163, 53},
+    {I_SETLE, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49163, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETNA = {
+    {I_SETNA, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49138, 53},
+    {I_SETNA, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49138, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETNAE = {
+    {I_SETNAE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49133, 53},
+    {I_SETNAE, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49133, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETNB = {
+    {I_SETNB, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49128, 53},
+    {I_SETNB, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49128, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETNBE = {
+    {I_SETNBE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49123, 53},
+    {I_SETNBE, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49123, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETNC = {
+    {I_SETNC, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49128, 53},
+    {I_SETNC, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49128, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETNE = {
+    {I_SETNE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49168, 53},
+    {I_SETNE, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49168, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETNG = {
+    {I_SETNG, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49163, 53},
+    {I_SETNG, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49163, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETNGE = {
+    {I_SETNGE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49158, 53},
+    {I_SETNGE, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49158, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETNL = {
+    {I_SETNL, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49153, 53},
+    {I_SETNL, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49153, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETNLE = {
+    {I_SETNLE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49148, 53},
+    {I_SETNLE, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49148, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETNO = {
+    {I_SETNO, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49173, 53},
+    {I_SETNO, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49173, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETNP = {
+    {I_SETNP, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49178, 53},
+    {I_SETNP, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49178, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETNS = {
+    {I_SETNS, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49183, 53},
+    {I_SETNS, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49183, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETNZ = {
+    {I_SETNZ, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49168, 53},
+    {I_SETNZ, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49168, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETO = {
+    {I_SETO, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49188, 53},
+    {I_SETO, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49188, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETP = {
+    {I_SETP, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49193, 53},
+    {I_SETP, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49193, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETPE = {
+    {I_SETPE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49193, 53},
+    {I_SETPE, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49193, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETPO = {
+    {I_SETPO, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49178, 53},
+    {I_SETPO, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49178, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETS = {
+    {I_SETS, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49198, 53},
+    {I_SETS, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49198, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETZ = {
+    {I_SETZ, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49143, 53},
+    {I_SETZ, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49143, 5},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ADDPS = {
+    {I_ADDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44753, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ADDSS = {
+    {I_ADDSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44759, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ANDNPS = {
+    {I_ANDNPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44765, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ANDPS = {
+    {I_ANDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44771, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPEQPS = {
+    {I_CMPEQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+12528, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPEQSS = {
+    {I_CMPEQSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12536, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPLEPS = {
+    {I_CMPLEPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+12544, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPLESS = {
+    {I_CMPLESS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12552, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPLTPS = {
+    {I_CMPLTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+12560, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPLTSS = {
+    {I_CMPLTSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12568, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNEQPS = {
+    {I_CMPNEQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+12576, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNEQSS = {
+    {I_CMPNEQSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12584, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNLEPS = {
+    {I_CMPNLEPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+12592, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNLESS = {
+    {I_CMPNLESS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12600, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNLTPS = {
+    {I_CMPNLTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+12608, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNLTSS = {
+    {I_CMPNLTSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12616, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPORDPS = {
+    {I_CMPORDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+12624, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPORDSS = {
+    {I_CMPORDSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12632, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPUNORDPS = {
+    {I_CMPUNORDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+12640, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPUNORDSS = {
+    {I_CMPUNORDSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12648, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPPS = {
+    {I_CMPPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+33964, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPSS = {
+    {I_CMPSS, 3, {XMM_L16,RM_XMM_L16|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+33971, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_COMISS = {
+    {I_COMISS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44777, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CVTPI2PS = {
+    {I_CVTPI2PS, 2, {XMM_L16,RM_MMX|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44783, 127},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CVTPS2PI = {
+    {I_CVTPS2PI, 2, {MMXREG,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44789, 127},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CVTSI2SS = {
+    {I_CVTSI2SS, 2, {XMM_L16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33979, 128},
+    {I_CVTSI2SS, 2, {XMM_L16,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33979, 128},
+    {I_CVTSI2SS, 2, {XMM_L16,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33978, 129},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CVTSS2SI = {
+    {I_CVTSS2SI, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33986, 128},
+    {I_CVTSS2SI, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33986, 128},
+    {I_CVTSS2SI, 2, {REG_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33985, 130},
+    {I_CVTSS2SI, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33985, 130},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CVTTPS2PI = {
+    {I_CVTTPS2PI, 2, {MMXREG,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44795, 131},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CVTTSS2SI = {
+    {I_CVTTSS2SI, 2, {REG_GPR|BITS32,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33993, 128},
+    {I_CVTTSS2SI, 2, {REG_GPR|BITS64,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33992, 130},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_DIVPS = {
+    {I_DIVPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44801, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_DIVSS = {
+    {I_DIVSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44807, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LDMXCSR = {
+    {I_LDMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44813, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MAXPS = {
+    {I_MAXPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44819, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MAXSS = {
+    {I_MAXSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44825, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MINPS = {
+    {I_MINPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44831, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MINSS = {
+    {I_MINSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44837, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVAPS = {
+    {I_MOVAPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44843, 126},
+    {I_MOVAPS, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44849, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVHPS = {
+    {I_MOVHPS, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44855, 126},
+    {I_MOVHPS, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44861, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVLHPS = {
+    {I_MOVLHPS, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44855, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVLPS = {
+    {I_MOVLPS, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43985, 126},
+    {I_MOVLPS, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44867, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVHLPS = {
+    {I_MOVHLPS, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43985, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVMSKPS = {
+    {I_MOVMSKPS, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44873, 126},
+    {I_MOVMSKPS, 2, {REG_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33999, 132},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVNTPS = {
+    {I_MOVNTPS, 2, {MEMORY|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44879, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVSS = {
+    {I_MOVSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44885, 126},
+    {I_MOVSS, 2, {RM_XMM_L16|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44891, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVUPS = {
+    {I_MOVUPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44897, 126},
+    {I_MOVUPS, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44903, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MULPS = {
+    {I_MULPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44909, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MULSS = {
+    {I_MULSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44915, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ORPS = {
+    {I_ORPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44921, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RCPPS = {
+    {I_RCPPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44927, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RCPSS = {
+    {I_RCPSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44933, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RSQRTPS = {
+    {I_RSQRTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44939, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RSQRTSS = {
+    {I_RSQRTSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44945, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SHUFPS = {
+    {I_SHUFPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+34006, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SQRTPS = {
+    {I_SQRTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44951, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SQRTSS = {
+    {I_SQRTSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44957, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_STMXCSR = {
+    {I_STMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44963, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SUBPS = {
+    {I_SUBPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44969, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SUBSS = {
+    {I_SUBSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44975, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_UCOMISS = {
+    {I_UCOMISS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44981, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_UNPCKHPS = {
+    {I_UNPCKHPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44987, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_UNPCKLPS = {
+    {I_UNPCKLPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44993, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XORPS = {
+    {I_XORPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44999, 126},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FXRSTOR = {
+    {I_FXRSTOR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34014, 133},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FXRSTOR64 = {
+    {I_FXRSTOR64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34013, 134},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FXSAVE = {
+    {I_FXSAVE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34021, 133},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_FXSAVE64 = {
+    {I_FXSAVE64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34020, 134},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XGETBV = {
+    {I_XGETBV, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49203, 135},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XSETBV = {
+    {I_XSETBV, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49208, 136},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XSAVE = {
+    {I_XSAVE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34028, 135},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XSAVE64 = {
+    {I_XSAVE64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34027, 137},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XSAVEC = {
+    {I_XSAVEC, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34035, 138},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XSAVEC64 = {
+    {I_XSAVEC64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34034, 139},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XSAVEOPT = {
+    {I_XSAVEOPT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34042, 138},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XSAVEOPT64 = {
+    {I_XSAVEOPT64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34041, 139},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XSAVES = {
+    {I_XSAVES, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34049, 138},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XSAVES64 = {
+    {I_XSAVES64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34048, 139},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XRSTOR = {
+    {I_XRSTOR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34056, 135},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XRSTOR64 = {
+    {I_XRSTOR64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34055, 137},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XRSTORS = {
+    {I_XRSTORS, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34063, 138},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XRSTORS64 = {
+    {I_XRSTORS64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34062, 139},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PREFETCHNTA = {
+    {I_PREFETCHNTA, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46242, 140},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PREFETCHT0 = {
+    {I_PREFETCHT0, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46260, 140},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PREFETCHT1 = {
+    {I_PREFETCHT1, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46278, 140},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PREFETCHT2 = {
+    {I_PREFETCHT2, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46296, 140},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PREFETCHIT0 = {
+    {I_PREFETCHIT0, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46368, 141},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PREFETCHIT1 = {
+    {I_PREFETCHIT1, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46350, 141},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MASKMOVQ = {
+    {I_MASKMOVQ, 2, {MMXREG,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+45005, 143},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVNTQ = {
+    {I_MOVNTQ, 2, {MEMORY,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+45011, 144},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PAVGB = {
+    {I_PAVGB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34069, 144},
+    {I_PAVGB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45179, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PAVGW = {
+    {I_PAVGW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34076, 144},
+    {I_PAVGW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45185, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PEXTRW = {
+    {I_PEXTRW, 3, {REG_GPR|BITS32,MMXREG,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34083, 145},
+    {I_PEXTRW, 3, {REG_GPR|BITS32,XMM_L16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34174, 155},
+    {I_PEXTRW, 3, {REG_GPR|BITS64,XMM_L16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34174, 156},
+    {I_PEXTRW, 3, {REG_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4277, 176},
+    {I_PEXTRW, 3, {MEMORY|BITS16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4277, 176},
+    {I_PEXTRW, 3, {REG_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4276, 177},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PINSRW = {
+    {I_PINSRW, 3, {MMXREG,MEMORY,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34090, 145},
+    {I_PINSRW, 3, {MMXREG,RM_GPR|BITS16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34090, 145},
+    {I_PINSRW, 3, {MMXREG,REG_GPR|BITS32,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34090, 145},
+    {I_PINSRW, 3, {XMM_L16,REG_GPR|BITS16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34181, 155},
+    {I_PINSRW, 3, {XMM_L16,REG_GPR|BITS32,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34181, 155},
+    {I_PINSRW, 3, {XMM_L16,REG_GPR|BITS64,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34181, 156},
+    {I_PINSRW, 3, {XMM_L16,MEMORY,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34181, 155},
+    {I_PINSRW, 3, {XMM_L16,MEMORY|BITS16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34181, 155},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMAXSW = {
+    {I_PMAXSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34097, 144},
+    {I_PMAXSW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45233, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMAXUB = {
+    {I_PMAXUB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34104, 144},
+    {I_PMAXUB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45239, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMINSW = {
+    {I_PMINSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34111, 144},
+    {I_PMINSW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45245, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMINUB = {
+    {I_PMINUB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34118, 144},
+    {I_PMINUB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45251, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMOVMSKB = {
+    {I_PMOVMSKB, 2, {REG_GPR|BITS32,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+45017, 143},
+    {I_PMOVMSKB, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45257, 147},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMULHUW = {
+    {I_PMULHUW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34125, 144},
+    {I_PMULHUW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45263, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSADBW = {
+    {I_PSADBW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34132, 144},
+    {I_PSADBW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45293, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSHUFW = {
+    {I_PSHUFW, 3, {MMXREG,RM_MMX,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+12656, 146},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PF2IW = {
+    {I_PF2IW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12664, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PFNACC = {
+    {I_PFNACC, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12672, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PFPNACC = {
+    {I_PFPNACC, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12680, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PI2FW = {
+    {I_PI2FW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12688, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSWAPD = {
+    {I_PSWAPD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12696, 91},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MASKMOVDQU = {
+    {I_MASKMOVDQU, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45023, 147},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CLFLUSH = {
+    {I_CLFLUSH, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45029, 147},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVNTDQ = {
+    {I_MOVNTDQ, 2, {MEMORY,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45035, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVNTI = {
+    {I_MOVNTI, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34140, 149},
+    {I_MOVNTI, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34139, 150},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVNTPD = {
+    {I_MOVNTPD, 2, {MEMORY,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45041, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVDQA = {
+    {I_MOVDQA, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45047, 148},
+    {I_MOVDQA, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45053, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVDQU = {
+    {I_MOVDQU, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45059, 148},
+    {I_MOVDQU, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45065, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVDQ2Q = {
+    {I_MOVDQ2Q, 2, {MMXREG,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45071, 147},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVQ2DQ = {
+    {I_MOVQ2DQ, 2, {XMM_L16,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+45089, 147},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PADDQ = {
+    {I_PADDQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+45131, 154},
+    {I_PADDQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45137, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMULUDQ = {
+    {I_PMULUDQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34188, 148},
+    {I_PMULUDQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45281, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSHUFD = {
+    {I_PSHUFD, 3, {XMM_L16,XMM_L16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34195, 155},
+    {I_PSHUFD, 3, {XMM_L16,MEMORY,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34195, 157},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSHUFHW = {
+    {I_PSHUFHW, 3, {XMM_L16,XMM_L16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34202, 155},
+    {I_PSHUFHW, 3, {XMM_L16,MEMORY,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34202, 157},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSHUFLW = {
+    {I_PSHUFLW, 3, {XMM_L16,XMM_L16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34209, 155},
+    {I_PSHUFLW, 3, {XMM_L16,MEMORY,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34209, 157},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSLLDQ = {
+    {I_PSLLDQ, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34216, 158},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSRLDQ = {
+    {I_PSRLDQ, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34258, 158},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSUBQ = {
+    {I_PSUBQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34286, 148},
+    {I_PSUBQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45365, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PUNPCKHQDQ = {
+    {I_PUNPCKHQDQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45413, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PUNPCKLQDQ = {
+    {I_PUNPCKLQDQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45437, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ADDPD = {
+    {I_ADDPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45449, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ADDSD = {
+    {I_ADDSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45455, 152},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ANDNPD = {
+    {I_ANDNPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45461, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ANDPD = {
+    {I_ANDPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45467, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPEQPD = {
+    {I_CMPEQPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12704, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPEQSD = {
+    {I_CMPEQSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12712, 152},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPLEPD = {
+    {I_CMPLEPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12720, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPLESD = {
+    {I_CMPLESD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12728, 152},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPLTPD = {
+    {I_CMPLTPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12736, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPLTSD = {
+    {I_CMPLTSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12744, 152},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNEQPD = {
+    {I_CMPNEQPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12752, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNEQSD = {
+    {I_CMPNEQSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12760, 152},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNLEPD = {
+    {I_CMPNLEPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12768, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNLESD = {
+    {I_CMPNLESD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12776, 152},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNLTPD = {
+    {I_CMPNLTPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12784, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNLTSD = {
+    {I_CMPNLTSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12792, 152},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPORDPD = {
+    {I_CMPORDPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12800, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPORDSD = {
+    {I_CMPORDSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12808, 152},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPUNORDPD = {
+    {I_CMPUNORDPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12816, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPUNORDSD = {
+    {I_CMPUNORDSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12824, 152},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPPD = {
+    {I_CMPPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+34293, 147},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_COMISD = {
+    {I_COMISD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45473, 147},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CVTDQ2PD = {
+    {I_CVTDQ2PD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45479, 152},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CVTDQ2PS = {
+    {I_CVTDQ2PS, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45485, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CVTPD2DQ = {
+    {I_CVTPD2DQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45491, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CVTPD2PI = {
+    {I_CVTPD2PI, 2, {MMXREG,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45497, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CVTPD2PS = {
+    {I_CVTPD2PS, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45503, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CVTPI2PD = {
+    {I_CVTPI2PD, 2, {XMM_L16,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+45509, 152},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CVTPS2DQ = {
+    {I_CVTPS2DQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45515, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CVTPS2PD = {
+    {I_CVTPS2PD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45521, 152},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CVTSD2SI = {
+    {I_CVTSD2SI, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34307, 159},
+    {I_CVTSD2SI, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+34307, 159},
+    {I_CVTSD2SI, 2, {REG_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34314, 160},
+    {I_CVTSD2SI, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+34314, 160},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CVTSD2SS = {
+    {I_CVTSD2SS, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45527, 152},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CVTSI2SD = {
+    {I_CVTSI2SD, 2, {XMM_L16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+34329, 161},
+    {I_CVTSI2SD, 2, {XMM_L16,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34321, 161},
+    {I_CVTSI2SD, 2, {XMM_L16,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34328, 160},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CVTSS2SD = {
+    {I_CVTSS2SD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45533, 151},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CVTTPD2PI = {
+    {I_CVTTPD2PI, 2, {MMXREG,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45539, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CVTTPD2DQ = {
+    {I_CVTTPD2DQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45545, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CVTTPS2DQ = {
+    {I_CVTTPS2DQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45551, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CVTTSD2SI = {
+    {I_CVTTSD2SI, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34335, 159},
+    {I_CVTTSD2SI, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+34335, 159},
+    {I_CVTTSD2SI, 2, {REG_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34342, 160},
+    {I_CVTTSD2SI, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+34342, 160},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_DIVPD = {
+    {I_DIVPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45557, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_DIVSD = {
+    {I_DIVSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45563, 152},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MAXPD = {
+    {I_MAXPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45569, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MAXSD = {
+    {I_MAXSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45575, 152},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MINPD = {
+    {I_MINPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45581, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MINSD = {
+    {I_MINSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45587, 152},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVAPD = {
+    {I_MOVAPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45593, 147},
+    {I_MOVAPD, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45599, 147},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVHPD = {
+    {I_MOVHPD, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45605, 147},
+    {I_MOVHPD, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45611, 147},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVLPD = {
+    {I_MOVLPD, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45617, 147},
+    {I_MOVLPD, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45623, 147},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVMSKPD = {
+    {I_MOVMSKPD, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45629, 147},
+    {I_MOVMSKPD, 2, {REG_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34349, 153},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVUPD = {
+    {I_MOVUPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45647, 147},
+    {I_MOVUPD, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45653, 147},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MULPD = {
+    {I_MULPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45659, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MULSD = {
+    {I_MULSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45665, 152},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ORPD = {
+    {I_ORPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45671, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SHUFPD = {
+    {I_SHUFPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+34356, 147},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SQRTPD = {
+    {I_SQRTPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45677, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SQRTSD = {
+    {I_SQRTSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45683, 147},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SUBPD = {
+    {I_SUBPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45689, 148},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SUBSD = {
+    {I_SUBSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45695, 147},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_UCOMISD = {
+    {I_UCOMISD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45701, 147},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_UNPCKHPD = {
+    {I_UNPCKHPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45707, 147},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_UNPCKLPD = {
+    {I_UNPCKLPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45713, 147},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XORPD = {
+    {I_XORPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45719, 147},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ADDSUBPD = {
+    {I_ADDSUBPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45725, 162},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ADDSUBPS = {
+    {I_ADDSUBPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45731, 162},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HADDPD = {
+    {I_HADDPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45737, 162},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HADDPS = {
+    {I_HADDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45743, 162},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HSUBPD = {
+    {I_HSUBPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45749, 162},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HSUBPS = {
+    {I_HSUBPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45755, 162},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LDDQU = {
+    {I_LDDQU, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45761, 162},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVDDUP = {
+    {I_MOVDDUP, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45767, 163},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVSHDUP = {
+    {I_MOVSHDUP, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45773, 164},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVSLDUP = {
+    {I_MOVSLDUP, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45779, 164},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CLGI = {
+    {I_CLGI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49213, 165},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_STGI = {
+    {I_STGI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49218, 165},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMCALL = {
+    {I_VMCALL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45822, 166},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMCLEAR = {
+    {I_VMCLEAR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45785, 166},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMFUNC = {
+    {I_VMFUNC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49223, 166},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMLAUNCH = {
+    {I_VMLAUNCH, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49228, 166},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMLOAD = {
+    {I_VMLOAD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49233, 165},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMMCALL = {
+    {I_VMMCALL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49238, 165},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMPTRLD = {
+    {I_VMPTRLD, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45791, 166},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMPTRST = {
+    {I_VMPTRST, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45797, 166},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMREAD = {
+    {I_VMREAD, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34364, 167},
+    {I_VMREAD, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34363, 168},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMRESUME = {
+    {I_VMRESUME, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49243, 166},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMRUN = {
+    {I_VMRUN, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49248, 165},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMSAVE = {
+    {I_VMSAVE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49253, 165},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMWRITE = {
+    {I_VMWRITE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34371, 167},
+    {I_VMWRITE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34370, 168},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMXOFF = {
+    {I_VMXOFF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49258, 166},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMXON = {
+    {I_VMXON, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42589, 166},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_INVEPT = {
+    {I_INVEPT, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+12833, 169},
+    {I_INVEPT, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+12832, 170},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_INVVPID = {
+    {I_INVVPID, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+12841, 169},
+    {I_INVVPID, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+12840, 170},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PVALIDATE = {
+    {I_PVALIDATE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45803, 165},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RMPADJUST = {
+    {I_RMPADJUST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45809, 165},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMGEXIT = {
+    {I_VMGEXIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45815, 165},
+    {I_VMGEXIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45821, 165},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PABSB = {
+    {I_PABSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34377, 171},
+    {I_PABSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34384, 172},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PABSW = {
+    {I_PABSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34391, 171},
+    {I_PABSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34398, 172},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PABSD = {
+    {I_PABSD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34405, 171},
+    {I_PABSD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34412, 172},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PALIGNR = {
+    {I_PALIGNR, 3, {MMXREG,RM_MMX,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+12848, 171},
+    {I_PALIGNR, 3, {XMM_L16,RM_XMM_L16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+12856, 172},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PHADDW = {
+    {I_PHADDW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34419, 171},
+    {I_PHADDW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34426, 172},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PHADDD = {
+    {I_PHADDD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34433, 171},
+    {I_PHADDD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34440, 172},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PHADDSW = {
+    {I_PHADDSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34447, 171},
+    {I_PHADDSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34454, 172},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PHSUBW = {
+    {I_PHSUBW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34461, 171},
+    {I_PHSUBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34468, 172},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PHSUBD = {
+    {I_PHSUBD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34475, 171},
+    {I_PHSUBD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34482, 172},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PHSUBSW = {
+    {I_PHSUBSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34489, 171},
+    {I_PHSUBSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34496, 172},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMADDUBSW = {
+    {I_PMADDUBSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34503, 171},
+    {I_PMADDUBSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34510, 172},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMULHRSW = {
+    {I_PMULHRSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34517, 171},
+    {I_PMULHRSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34524, 172},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSHUFB = {
+    {I_PSHUFB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34531, 171},
+    {I_PSHUFB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34538, 172},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSIGNB = {
+    {I_PSIGNB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34545, 171},
+    {I_PSIGNB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34552, 172},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSIGNW = {
+    {I_PSIGNW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34559, 171},
+    {I_PSIGNW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34566, 172},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PSIGND = {
+    {I_PSIGND, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34573, 171},
+    {I_PSIGND, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34580, 172},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_EXTRQ = {
+    {I_EXTRQ, 3, {XMM_L16,IMMEDIATE,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+12864, 173},
+    {I_EXTRQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45827, 173},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_INSERTQ = {
+    {I_INSERTQ, 4, {XMM_L16,XMM_L16,IMMEDIATE,IMMEDIATE,0}, NO_DECORATOR, nasm_bytecodes+12872, 173},
+    {I_INSERTQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45833, 173},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVNTSD = {
+    {I_MOVNTSD, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45839, 174},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVNTSS = {
+    {I_MOVNTSS, 2, {MEMORY|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45845, 175},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LZCNT = {
+    {I_LZCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34587, 113},
+    {I_LZCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34594, 113},
+    {I_LZCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34601, 59},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BLENDPD = {
+    {I_BLENDPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12880, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BLENDPS = {
+    {I_BLENDPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12888, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BLENDVPD = {
+    {I_BLENDVPD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM0,0,0}, NO_DECORATOR, nasm_bytecodes+34608, 176},
+    {I_BLENDVPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34608, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BLENDVPS = {
+    {I_BLENDVPS, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM0,0,0}, NO_DECORATOR, nasm_bytecodes+34615, 176},
+    {I_BLENDVPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34615, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_DPPD = {
+    {I_DPPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12896, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_DPPS = {
+    {I_DPPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12904, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_EXTRACTPS = {
+    {I_EXTRACTPS, 3, {RM_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4241, 176},
+    {I_EXTRACTPS, 3, {REG_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4240, 177},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_INSERTPS = {
+    {I_INSERTPS, 3, {XMM_L16,RM_XMM_L16|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12912, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVNTDQA = {
+    {I_MOVNTDQA, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34622, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MPSADBW = {
+    {I_MPSADBW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12920, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PACKUSDW = {
+    {I_PACKUSDW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34629, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PBLENDVB = {
+    {I_PBLENDVB, 3, {XMM_L16,RM_XMM_L16,XMM0,0,0}, NO_DECORATOR, nasm_bytecodes+34636, 176},
+    {I_PBLENDVB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34636, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PBLENDW = {
+    {I_PBLENDW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12928, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PCMPEQQ = {
+    {I_PCMPEQQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34643, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PEXTRB = {
+    {I_PEXTRB, 3, {REG_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4250, 176},
+    {I_PEXTRB, 3, {MEMORY|BITS8,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4250, 176},
+    {I_PEXTRB, 3, {REG_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4249, 177},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PEXTRD = {
+    {I_PEXTRD, 3, {RM_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4258, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PEXTRQ = {
+    {I_PEXTRQ, 3, {RM_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4267, 177},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PHMINPOSUW = {
+    {I_PHMINPOSUW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34650, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PINSRB = {
+    {I_PINSRB, 3, {XMM_L16,MEMORY,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4286, 178},
+    {I_PINSRB, 3, {XMM_L16,RM_GPR|BITS8,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4285, 178},
+    {I_PINSRB, 3, {XMM_L16,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4286, 178},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PINSRD = {
+    {I_PINSRD, 3, {XMM_L16,RM_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4294, 178},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PINSRQ = {
+    {I_PINSRQ, 3, {XMM_L16,RM_GPR|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4303, 179},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMAXSB = {
+    {I_PMAXSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34657, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMAXSD = {
+    {I_PMAXSD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34664, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMAXUD = {
+    {I_PMAXUD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34671, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMAXUW = {
+    {I_PMAXUW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34678, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMINSB = {
+    {I_PMINSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34685, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMINSD = {
+    {I_PMINSD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34692, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMINUD = {
+    {I_PMINUD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34699, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMINUW = {
+    {I_PMINUW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34706, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMOVSXBW = {
+    {I_PMOVSXBW, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34713, 180},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMOVSXBD = {
+    {I_PMOVSXBD, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34720, 181},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMOVSXBQ = {
+    {I_PMOVSXBQ, 2, {XMM_L16,RM_XMM_L16|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34727, 182},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMOVSXWD = {
+    {I_PMOVSXWD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34734, 180},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMOVSXWQ = {
+    {I_PMOVSXWQ, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34741, 181},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMOVSXDQ = {
+    {I_PMOVSXDQ, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34748, 180},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMOVZXBW = {
+    {I_PMOVZXBW, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34755, 180},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMOVZXBD = {
+    {I_PMOVZXBD, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34762, 181},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMOVZXBQ = {
+    {I_PMOVZXBQ, 2, {XMM_L16,RM_XMM_L16|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34769, 182},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMOVZXWD = {
+    {I_PMOVZXWD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34776, 180},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMOVZXWQ = {
+    {I_PMOVZXWQ, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34783, 181},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMOVZXDQ = {
+    {I_PMOVZXDQ, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34790, 180},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMULDQ = {
+    {I_PMULDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34797, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PMULLD = {
+    {I_PMULLD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34804, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PTEST = {
+    {I_PTEST, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34811, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ROUNDPD = {
+    {I_ROUNDPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12936, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ROUNDPS = {
+    {I_ROUNDPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12944, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ROUNDSD = {
+    {I_ROUNDSD, 3, {XMM_L16,RM_XMM_L16|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12952, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ROUNDSS = {
+    {I_ROUNDSS, 3, {XMM_L16,RM_XMM_L16|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12960, 176},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CRC32 = {
+    {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12985, 183},
+    {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12968, 183},
+    {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12976, 183},
+    {I_CRC32, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12984, 184},
+    {I_CRC32, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+12992, 184},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PCMPESTRI = {
+    {I_PCMPESTRI, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13000, 183},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PCMPESTRM = {
+    {I_PCMPESTRM, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13008, 183},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PCMPISTRI = {
+    {I_PCMPISTRI, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13016, 183},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PCMPISTRM = {
+    {I_PCMPISTRM, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13024, 183},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PCMPGTQ = {
+    {I_PCMPGTQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34818, 183},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_POPCNT = {
+    {I_POPCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34825, 185},
+    {I_POPCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34832, 186},
+    {I_POPCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34839, 187},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_GETSEC = {
+    {I_GETSEC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50289, 142},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PFRCPV = {
+    {I_PFRCPV, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+13032, 188},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PFRSQRTV = {
+    {I_PFRSQRTV, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+13040, 188},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVBE = {
+    {I_MOVBE, 2, {REG_GPR|BITS16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+13048, 189},
+    {I_MOVBE, 2, {REG_GPR|BITS32,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+13056, 189},
+    {I_MOVBE, 2, {REG_GPR|BITS64,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13064, 189},
+    {I_MOVBE, 2, {MEMORY|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+13072, 189},
+    {I_MOVBE, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+13080, 189},
+    {I_MOVBE, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13088, 189},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_AESENC = {
+    {I_AESENC, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34846, 190},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_AESENCLAST = {
+    {I_AESENCLAST, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34853, 190},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_AESDEC = {
+    {I_AESDEC, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34860, 190},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_AESDECLAST = {
+    {I_AESDECLAST, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34867, 190},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_AESIMC = {
+    {I_AESIMC, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34874, 190},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_AESKEYGENASSIST = {
+    {I_AESKEYGENASSIST, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13096, 190},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VAESENC = {
+    {I_VAESENC, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+34881, 191},
+    {I_VAESENC, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34888, 191},
+    {I_VAESENC, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+34944, 192},
+    {I_VAESENC, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+34951, 192},
+    {I_VAESENC, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+13112, 193},
+    {I_VAESENC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+13120, 193},
+    {I_VAESENC, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+13128, 193},
+    {I_VAESENC, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+13136, 193},
+    {I_VAESENC, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+13240, 194},
+    {I_VAESENC, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+13248, 194},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VAESENCLAST = {
+    {I_VAESENCLAST, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+34895, 191},
+    {I_VAESENCLAST, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34902, 191},
+    {I_VAESENCLAST, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+34958, 192},
+    {I_VAESENCLAST, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+34965, 192},
+    {I_VAESENCLAST, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+13144, 193},
+    {I_VAESENCLAST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+13152, 193},
+    {I_VAESENCLAST, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+13160, 193},
+    {I_VAESENCLAST, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+13168, 193},
+    {I_VAESENCLAST, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+13256, 194},
+    {I_VAESENCLAST, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+13264, 194},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VAESDEC = {
+    {I_VAESDEC, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+34909, 191},
+    {I_VAESDEC, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34916, 191},
+    {I_VAESDEC, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+34972, 192},
+    {I_VAESDEC, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+34979, 192},
+    {I_VAESDEC, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+13176, 193},
+    {I_VAESDEC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+13184, 193},
+    {I_VAESDEC, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+13192, 193},
+    {I_VAESDEC, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+13200, 193},
+    {I_VAESDEC, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+13272, 194},
+    {I_VAESDEC, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+13280, 194},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VAESDECLAST = {
+    {I_VAESDECLAST, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+34923, 191},
+    {I_VAESDECLAST, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34930, 191},
+    {I_VAESDECLAST, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+34986, 192},
+    {I_VAESDECLAST, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+34993, 192},
+    {I_VAESDECLAST, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+13208, 193},
+    {I_VAESDECLAST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+13216, 193},
+    {I_VAESDECLAST, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+13224, 193},
+    {I_VAESDECLAST, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+13232, 193},
+    {I_VAESDECLAST, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+13288, 194},
+    {I_VAESDECLAST, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+13296, 194},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VAESIMC = {
+    {I_VAESIMC, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34937, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VAESKEYGENASSIST = {
+    {I_VAESKEYGENASSIST, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13104, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VADDPD = {
+    {I_VADDPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35000, 191},
+    {I_VADDPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35007, 191},
+    {I_VADDPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35014, 191},
+    {I_VADDPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35021, 191},
+    {I_VADDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16384, 246},
+    {I_VADDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+16392, 246},
+    {I_VADDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16400, 246},
+    {I_VADDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+16408, 246},
+    {I_VADDPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+16416, 247},
+    {I_VADDPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+16424, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VADDPS = {
+    {I_VADDPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35028, 191},
+    {I_VADDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35035, 191},
+    {I_VADDPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35042, 191},
+    {I_VADDPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35049, 191},
+    {I_VADDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16432, 246},
+    {I_VADDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+16440, 246},
+    {I_VADDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16448, 246},
+    {I_VADDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+16456, 246},
+    {I_VADDPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+16464, 247},
+    {I_VADDPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+16472, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VADDSD = {
+    {I_VADDSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+35056, 191},
+    {I_VADDSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35063, 191},
+    {I_VADDSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+16480, 247},
+    {I_VADDSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+16488, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VADDSS = {
+    {I_VADDSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+35070, 191},
+    {I_VADDSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35077, 191},
+    {I_VADDSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+16496, 247},
+    {I_VADDSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+16504, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VADDSUBPD = {
+    {I_VADDSUBPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35084, 191},
+    {I_VADDSUBPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35091, 191},
+    {I_VADDSUBPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35098, 191},
+    {I_VADDSUBPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35105, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VADDSUBPS = {
+    {I_VADDSUBPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35112, 191},
+    {I_VADDSUBPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35119, 191},
+    {I_VADDSUBPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35126, 191},
+    {I_VADDSUBPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35133, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VANDPD = {
+    {I_VANDPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35140, 191},
+    {I_VANDPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35147, 191},
+    {I_VANDPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35154, 191},
+    {I_VANDPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35161, 191},
+    {I_VANDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16608, 248},
+    {I_VANDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+16616, 248},
+    {I_VANDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16624, 248},
+    {I_VANDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+16632, 248},
+    {I_VANDPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16640, 249},
+    {I_VANDPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+16648, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VANDPS = {
+    {I_VANDPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35168, 191},
+    {I_VANDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35175, 191},
+    {I_VANDPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35182, 191},
+    {I_VANDPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35189, 191},
+    {I_VANDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16656, 248},
+    {I_VANDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+16664, 248},
+    {I_VANDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16672, 248},
+    {I_VANDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+16680, 248},
+    {I_VANDPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16688, 249},
+    {I_VANDPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+16696, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VANDNPD = {
+    {I_VANDNPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35196, 191},
+    {I_VANDNPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35203, 191},
+    {I_VANDNPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35210, 191},
+    {I_VANDNPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35217, 191},
+    {I_VANDNPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16512, 248},
+    {I_VANDNPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+16520, 248},
+    {I_VANDNPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16528, 248},
+    {I_VANDNPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+16536, 248},
+    {I_VANDNPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16544, 249},
+    {I_VANDNPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+16552, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VANDNPS = {
+    {I_VANDNPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35224, 191},
+    {I_VANDNPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35231, 191},
+    {I_VANDNPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35238, 191},
+    {I_VANDNPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35245, 191},
+    {I_VANDNPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16560, 248},
+    {I_VANDNPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+16568, 248},
+    {I_VANDNPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16576, 248},
+    {I_VANDNPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+16584, 248},
+    {I_VANDNPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16592, 249},
+    {I_VANDNPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+16600, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VBLENDPD = {
+    {I_VBLENDPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13304, 191},
+    {I_VBLENDPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13312, 191},
+    {I_VBLENDPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13320, 191},
+    {I_VBLENDPD, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13328, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VBLENDPS = {
+    {I_VBLENDPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13336, 191},
+    {I_VBLENDPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13344, 191},
+    {I_VBLENDPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13352, 191},
+    {I_VBLENDPS, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13360, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VBLENDVPD = {
+    {I_VBLENDVPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+13368, 191},
+    {I_VBLENDVPD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+13376, 191},
+    {I_VBLENDVPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+13384, 191},
+    {I_VBLENDVPD, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+13392, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VBLENDVPS = {
+    {I_VBLENDVPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+13400, 191},
+    {I_VBLENDVPS, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+13408, 191},
+    {I_VBLENDVPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+13416, 191},
+    {I_VBLENDVPS, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+13424, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VBROADCASTSS = {
+    {I_VBROADCASTSS, 2, {XMM_L16,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35252, 191},
+    {I_VBROADCASTSS, 2, {YMM_L16,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35259, 191},
+    {I_VBROADCASTSS, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35252, 210},
+    {I_VBROADCASTSS, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35259, 210},
+    {I_VBROADCASTSS, 2, {XMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16920, 246},
+    {I_VBROADCASTSS, 2, {YMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16928, 246},
+    {I_VBROADCASTSS, 2, {ZMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16936, 247},
+    {I_VBROADCASTSS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16944, 246},
+    {I_VBROADCASTSS, 2, {YMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16952, 246},
+    {I_VBROADCASTSS, 2, {ZMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16960, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VBROADCASTSD = {
+    {I_VBROADCASTSD, 2, {YMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35266, 191},
+    {I_VBROADCASTSD, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35266, 210},
+    {I_VBROADCASTSD, 2, {YMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16888, 246},
+    {I_VBROADCASTSD, 2, {ZMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16896, 247},
+    {I_VBROADCASTSD, 2, {YMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16904, 246},
+    {I_VBROADCASTSD, 2, {ZMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16912, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VBROADCASTF128 = {
+    {I_VBROADCASTF128, 2, {YMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35273, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPEQ_OSPD = {
+    {I_VCMPEQ_OSPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4312, 191},
+    {I_VCMPEQ_OSPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4321, 191},
+    {I_VCMPEQ_OSPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4330, 191},
+    {I_VCMPEQ_OSPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4339, 191},
+    {I_VCMPEQ_OSPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4312, 191},
+    {I_VCMPEQ_OSPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4321, 191},
+    {I_VCMPEQ_OSPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4330, 191},
+    {I_VCMPEQ_OSPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4339, 191},
+    {I_VCMPEQ_OSPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1520, 246},
+    {I_VCMPEQ_OSPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1530, 246},
+    {I_VCMPEQ_OSPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1540, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPEQPD = {
+    {I_VCMPEQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4348, 191},
+    {I_VCMPEQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4357, 191},
+    {I_VCMPEQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4366, 191},
+    {I_VCMPEQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4375, 191},
+    {I_VCMPEQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+240, 246},
+    {I_VCMPEQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+250, 246},
+    {I_VCMPEQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+260, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPLT_OSPD = {
+    {I_VCMPLT_OSPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4384, 191},
+    {I_VCMPLT_OSPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4393, 191},
+    {I_VCMPLT_OSPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4402, 191},
+    {I_VCMPLT_OSPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4411, 191},
+    {I_VCMPLT_OSPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+320, 246},
+    {I_VCMPLT_OSPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+330, 246},
+    {I_VCMPLT_OSPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+340, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPLTPD = {
+    {I_VCMPLTPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4384, 191},
+    {I_VCMPLTPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4393, 191},
+    {I_VCMPLTPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4402, 191},
+    {I_VCMPLTPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4411, 191},
+    {I_VCMPLTPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+320, 246},
+    {I_VCMPLTPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+330, 246},
+    {I_VCMPLTPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+340, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPLE_OSPD = {
+    {I_VCMPLE_OSPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4420, 191},
+    {I_VCMPLE_OSPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4429, 191},
+    {I_VCMPLE_OSPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4438, 191},
+    {I_VCMPLE_OSPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4447, 191},
+    {I_VCMPLE_OSPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+400, 246},
+    {I_VCMPLE_OSPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+410, 246},
+    {I_VCMPLE_OSPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+420, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPLEPD = {
+    {I_VCMPLEPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4420, 191},
+    {I_VCMPLEPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4429, 191},
+    {I_VCMPLEPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4438, 191},
+    {I_VCMPLEPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4447, 191},
+    {I_VCMPLEPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+400, 246},
+    {I_VCMPLEPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+410, 246},
+    {I_VCMPLEPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+420, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPUNORD_QPD = {
+    {I_VCMPUNORD_QPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4456, 191},
+    {I_VCMPUNORD_QPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4465, 191},
+    {I_VCMPUNORD_QPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4474, 191},
+    {I_VCMPUNORD_QPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4483, 191},
+    {I_VCMPUNORD_QPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+480, 246},
+    {I_VCMPUNORD_QPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+490, 246},
+    {I_VCMPUNORD_QPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+500, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPUNORDPD = {
+    {I_VCMPUNORDPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4456, 191},
+    {I_VCMPUNORDPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4465, 191},
+    {I_VCMPUNORDPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4474, 191},
+    {I_VCMPUNORDPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4483, 191},
+    {I_VCMPUNORDPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+480, 246},
+    {I_VCMPUNORDPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+490, 246},
+    {I_VCMPUNORDPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+500, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNEQ_UQPD = {
+    {I_VCMPNEQ_UQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4492, 191},
+    {I_VCMPNEQ_UQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4501, 191},
+    {I_VCMPNEQ_UQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4510, 191},
+    {I_VCMPNEQ_UQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4519, 191},
+    {I_VCMPNEQ_UQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+560, 246},
+    {I_VCMPNEQ_UQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+570, 246},
+    {I_VCMPNEQ_UQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+580, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNEQPD = {
+    {I_VCMPNEQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4492, 191},
+    {I_VCMPNEQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4501, 191},
+    {I_VCMPNEQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4510, 191},
+    {I_VCMPNEQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4519, 191},
+    {I_VCMPNEQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+560, 246},
+    {I_VCMPNEQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+570, 246},
+    {I_VCMPNEQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+580, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNLT_USPD = {
+    {I_VCMPNLT_USPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4528, 191},
+    {I_VCMPNLT_USPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4537, 191},
+    {I_VCMPNLT_USPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4546, 191},
+    {I_VCMPNLT_USPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4555, 191},
+    {I_VCMPNLT_USPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+640, 246},
+    {I_VCMPNLT_USPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+650, 246},
+    {I_VCMPNLT_USPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+660, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNLTPD = {
+    {I_VCMPNLTPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4528, 191},
+    {I_VCMPNLTPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4537, 191},
+    {I_VCMPNLTPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4546, 191},
+    {I_VCMPNLTPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4555, 191},
+    {I_VCMPNLTPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+640, 246},
+    {I_VCMPNLTPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+650, 246},
+    {I_VCMPNLTPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+660, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNLE_USPD = {
+    {I_VCMPNLE_USPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4564, 191},
+    {I_VCMPNLE_USPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4573, 191},
+    {I_VCMPNLE_USPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4582, 191},
+    {I_VCMPNLE_USPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4591, 191},
+    {I_VCMPNLE_USPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+720, 246},
+    {I_VCMPNLE_USPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+730, 246},
+    {I_VCMPNLE_USPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+740, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNLEPD = {
+    {I_VCMPNLEPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4564, 191},
+    {I_VCMPNLEPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4573, 191},
+    {I_VCMPNLEPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4582, 191},
+    {I_VCMPNLEPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4591, 191},
+    {I_VCMPNLEPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+720, 246},
+    {I_VCMPNLEPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+730, 246},
+    {I_VCMPNLEPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+740, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPORD_QPD = {
+    {I_VCMPORD_QPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4600, 191},
+    {I_VCMPORD_QPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4609, 191},
+    {I_VCMPORD_QPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4618, 191},
+    {I_VCMPORD_QPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4627, 191},
+    {I_VCMPORD_QPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+800, 246},
+    {I_VCMPORD_QPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+810, 246},
+    {I_VCMPORD_QPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+820, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPORDPD = {
+    {I_VCMPORDPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4600, 191},
+    {I_VCMPORDPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4609, 191},
+    {I_VCMPORDPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4618, 191},
+    {I_VCMPORDPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4627, 191},
+    {I_VCMPORDPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+800, 246},
+    {I_VCMPORDPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+810, 246},
+    {I_VCMPORDPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+820, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPEQ_UQPD = {
+    {I_VCMPEQ_UQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4636, 191},
+    {I_VCMPEQ_UQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4645, 191},
+    {I_VCMPEQ_UQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4654, 191},
+    {I_VCMPEQ_UQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4663, 191},
+    {I_VCMPEQ_UQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+880, 246},
+    {I_VCMPEQ_UQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+890, 246},
+    {I_VCMPEQ_UQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+900, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNGE_USPD = {
+    {I_VCMPNGE_USPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4672, 191},
+    {I_VCMPNGE_USPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4681, 191},
+    {I_VCMPNGE_USPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4690, 191},
+    {I_VCMPNGE_USPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4699, 191},
+    {I_VCMPNGE_USPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+960, 246},
+    {I_VCMPNGE_USPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+970, 246},
+    {I_VCMPNGE_USPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+980, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNGEPD = {
+    {I_VCMPNGEPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4672, 191},
+    {I_VCMPNGEPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4681, 191},
+    {I_VCMPNGEPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4690, 191},
+    {I_VCMPNGEPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4699, 191},
+    {I_VCMPNGEPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+960, 246},
+    {I_VCMPNGEPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+970, 246},
+    {I_VCMPNGEPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+980, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNGT_USPD = {
+    {I_VCMPNGT_USPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4708, 191},
+    {I_VCMPNGT_USPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4717, 191},
+    {I_VCMPNGT_USPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4726, 191},
+    {I_VCMPNGT_USPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4735, 191},
+    {I_VCMPNGT_USPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1040, 246},
+    {I_VCMPNGT_USPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1050, 246},
+    {I_VCMPNGT_USPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1060, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNGTPD = {
+    {I_VCMPNGTPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4708, 191},
+    {I_VCMPNGTPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4717, 191},
+    {I_VCMPNGTPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4726, 191},
+    {I_VCMPNGTPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4735, 191},
+    {I_VCMPNGTPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1040, 246},
+    {I_VCMPNGTPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1050, 246},
+    {I_VCMPNGTPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1060, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPFALSE_OQPD = {
+    {I_VCMPFALSE_OQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4744, 191},
+    {I_VCMPFALSE_OQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4753, 191},
+    {I_VCMPFALSE_OQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4762, 191},
+    {I_VCMPFALSE_OQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4771, 191},
+    {I_VCMPFALSE_OQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1120, 246},
+    {I_VCMPFALSE_OQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1130, 246},
+    {I_VCMPFALSE_OQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1140, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPFALSEPD = {
+    {I_VCMPFALSEPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4744, 191},
+    {I_VCMPFALSEPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4753, 191},
+    {I_VCMPFALSEPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4762, 191},
+    {I_VCMPFALSEPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4771, 191},
+    {I_VCMPFALSEPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1120, 246},
+    {I_VCMPFALSEPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1130, 246},
+    {I_VCMPFALSEPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1140, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNEQ_OQPD = {
+    {I_VCMPNEQ_OQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4780, 191},
+    {I_VCMPNEQ_OQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4789, 191},
+    {I_VCMPNEQ_OQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4798, 191},
+    {I_VCMPNEQ_OQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4807, 191},
+    {I_VCMPNEQ_OQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1200, 246},
+    {I_VCMPNEQ_OQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1210, 246},
+    {I_VCMPNEQ_OQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1220, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPGE_OSPD = {
+    {I_VCMPGE_OSPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4816, 191},
+    {I_VCMPGE_OSPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4825, 191},
+    {I_VCMPGE_OSPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4834, 191},
+    {I_VCMPGE_OSPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4843, 191},
+    {I_VCMPGE_OSPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1280, 246},
+    {I_VCMPGE_OSPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1290, 246},
+    {I_VCMPGE_OSPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1300, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPGEPD = {
+    {I_VCMPGEPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4816, 191},
+    {I_VCMPGEPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4825, 191},
+    {I_VCMPGEPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4834, 191},
+    {I_VCMPGEPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4843, 191},
+    {I_VCMPGEPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1280, 246},
+    {I_VCMPGEPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1290, 246},
+    {I_VCMPGEPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1300, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPGT_OSPD = {
+    {I_VCMPGT_OSPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4852, 191},
+    {I_VCMPGT_OSPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4861, 191},
+    {I_VCMPGT_OSPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4870, 191},
+    {I_VCMPGT_OSPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4879, 191},
+    {I_VCMPGT_OSPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1360, 246},
+    {I_VCMPGT_OSPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1370, 246},
+    {I_VCMPGT_OSPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1380, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPGTPD = {
+    {I_VCMPGTPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4852, 191},
+    {I_VCMPGTPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4861, 191},
+    {I_VCMPGTPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4870, 191},
+    {I_VCMPGTPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4879, 191},
+    {I_VCMPGTPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1360, 246},
+    {I_VCMPGTPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1370, 246},
+    {I_VCMPGTPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1380, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPTRUE_UQPD = {
+    {I_VCMPTRUE_UQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4888, 191},
+    {I_VCMPTRUE_UQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4897, 191},
+    {I_VCMPTRUE_UQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4906, 191},
+    {I_VCMPTRUE_UQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4915, 191},
+    {I_VCMPTRUE_UQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1440, 246},
+    {I_VCMPTRUE_UQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1450, 246},
+    {I_VCMPTRUE_UQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1460, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPTRUEPD = {
+    {I_VCMPTRUEPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4888, 191},
+    {I_VCMPTRUEPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4897, 191},
+    {I_VCMPTRUEPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4906, 191},
+    {I_VCMPTRUEPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4915, 191},
+    {I_VCMPTRUEPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1440, 246},
+    {I_VCMPTRUEPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1450, 246},
+    {I_VCMPTRUEPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1460, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPLT_OQPD = {
+    {I_VCMPLT_OQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4924, 191},
+    {I_VCMPLT_OQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4933, 191},
+    {I_VCMPLT_OQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4942, 191},
+    {I_VCMPLT_OQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4951, 191},
+    {I_VCMPLT_OQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1600, 246},
+    {I_VCMPLT_OQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1610, 246},
+    {I_VCMPLT_OQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1620, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPLE_OQPD = {
+    {I_VCMPLE_OQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4960, 191},
+    {I_VCMPLE_OQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4969, 191},
+    {I_VCMPLE_OQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4978, 191},
+    {I_VCMPLE_OQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4987, 191},
+    {I_VCMPLE_OQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1680, 246},
+    {I_VCMPLE_OQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1690, 246},
+    {I_VCMPLE_OQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1700, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPUNORD_SPD = {
+    {I_VCMPUNORD_SPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4996, 191},
+    {I_VCMPUNORD_SPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5005, 191},
+    {I_VCMPUNORD_SPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5014, 191},
+    {I_VCMPUNORD_SPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5023, 191},
+    {I_VCMPUNORD_SPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1760, 246},
+    {I_VCMPUNORD_SPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1770, 246},
+    {I_VCMPUNORD_SPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1780, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNEQ_USPD = {
+    {I_VCMPNEQ_USPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5032, 191},
+    {I_VCMPNEQ_USPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5041, 191},
+    {I_VCMPNEQ_USPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5050, 191},
+    {I_VCMPNEQ_USPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5059, 191},
+    {I_VCMPNEQ_USPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1840, 246},
+    {I_VCMPNEQ_USPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1850, 246},
+    {I_VCMPNEQ_USPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1860, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNLT_UQPD = {
+    {I_VCMPNLT_UQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5068, 191},
+    {I_VCMPNLT_UQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5077, 191},
+    {I_VCMPNLT_UQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5086, 191},
+    {I_VCMPNLT_UQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5095, 191},
+    {I_VCMPNLT_UQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1920, 246},
+    {I_VCMPNLT_UQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1930, 246},
+    {I_VCMPNLT_UQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1940, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNLE_UQPD = {
+    {I_VCMPNLE_UQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5104, 191},
+    {I_VCMPNLE_UQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5113, 191},
+    {I_VCMPNLE_UQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5122, 191},
+    {I_VCMPNLE_UQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5131, 191},
+    {I_VCMPNLE_UQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2000, 246},
+    {I_VCMPNLE_UQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2010, 246},
+    {I_VCMPNLE_UQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2020, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPORD_SPD = {
+    {I_VCMPORD_SPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5140, 191},
+    {I_VCMPORD_SPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5149, 191},
+    {I_VCMPORD_SPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5158, 191},
+    {I_VCMPORD_SPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5167, 191},
+    {I_VCMPORD_SPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2080, 246},
+    {I_VCMPORD_SPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2090, 246},
+    {I_VCMPORD_SPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2100, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPEQ_USPD = {
+    {I_VCMPEQ_USPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5176, 191},
+    {I_VCMPEQ_USPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5185, 191},
+    {I_VCMPEQ_USPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5194, 191},
+    {I_VCMPEQ_USPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5203, 191},
+    {I_VCMPEQ_USPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2160, 246},
+    {I_VCMPEQ_USPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2170, 246},
+    {I_VCMPEQ_USPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2180, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNGE_UQPD = {
+    {I_VCMPNGE_UQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5212, 191},
+    {I_VCMPNGE_UQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5221, 191},
+    {I_VCMPNGE_UQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5230, 191},
+    {I_VCMPNGE_UQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5239, 191},
+    {I_VCMPNGE_UQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2240, 246},
+    {I_VCMPNGE_UQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2250, 246},
+    {I_VCMPNGE_UQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2260, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNGT_UQPD = {
+    {I_VCMPNGT_UQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5248, 191},
+    {I_VCMPNGT_UQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5257, 191},
+    {I_VCMPNGT_UQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5266, 191},
+    {I_VCMPNGT_UQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5275, 191},
+    {I_VCMPNGT_UQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2320, 246},
+    {I_VCMPNGT_UQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2330, 246},
+    {I_VCMPNGT_UQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2340, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPFALSE_OSPD = {
+    {I_VCMPFALSE_OSPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5284, 191},
+    {I_VCMPFALSE_OSPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5293, 191},
+    {I_VCMPFALSE_OSPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5302, 191},
+    {I_VCMPFALSE_OSPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5311, 191},
+    {I_VCMPFALSE_OSPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2400, 246},
+    {I_VCMPFALSE_OSPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2410, 246},
+    {I_VCMPFALSE_OSPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2420, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNEQ_OSPD = {
+    {I_VCMPNEQ_OSPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5320, 191},
+    {I_VCMPNEQ_OSPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5329, 191},
+    {I_VCMPNEQ_OSPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5338, 191},
+    {I_VCMPNEQ_OSPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5347, 191},
+    {I_VCMPNEQ_OSPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2480, 246},
+    {I_VCMPNEQ_OSPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2490, 246},
+    {I_VCMPNEQ_OSPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2500, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPGE_OQPD = {
+    {I_VCMPGE_OQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5356, 191},
+    {I_VCMPGE_OQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5365, 191},
+    {I_VCMPGE_OQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5374, 191},
+    {I_VCMPGE_OQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5383, 191},
+    {I_VCMPGE_OQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2560, 246},
+    {I_VCMPGE_OQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2570, 246},
+    {I_VCMPGE_OQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2580, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPGT_OQPD = {
+    {I_VCMPGT_OQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5392, 191},
+    {I_VCMPGT_OQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5401, 191},
+    {I_VCMPGT_OQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5410, 191},
+    {I_VCMPGT_OQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5419, 191},
+    {I_VCMPGT_OQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2640, 246},
+    {I_VCMPGT_OQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2650, 246},
+    {I_VCMPGT_OQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2660, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPTRUE_USPD = {
+    {I_VCMPTRUE_USPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5428, 191},
+    {I_VCMPTRUE_USPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5437, 191},
+    {I_VCMPTRUE_USPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5446, 191},
+    {I_VCMPTRUE_USPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5455, 191},
+    {I_VCMPTRUE_USPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2720, 246},
+    {I_VCMPTRUE_USPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2730, 246},
+    {I_VCMPTRUE_USPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2740, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPPD = {
+    {I_VCMPPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13432, 191},
+    {I_VCMPPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13440, 191},
+    {I_VCMPPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13448, 191},
+    {I_VCMPPD, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13456, 191},
+    {I_VCMPPD, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8110, 246},
+    {I_VCMPPD, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8119, 246},
+    {I_VCMPPD, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+8128, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPEQ_OSPS = {
+    {I_VCMPEQ_OSPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5464, 191},
+    {I_VCMPEQ_OSPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5473, 191},
+    {I_VCMPEQ_OSPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5482, 191},
+    {I_VCMPEQ_OSPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5491, 191},
+    {I_VCMPEQ_OSPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5464, 191},
+    {I_VCMPEQ_OSPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5473, 191},
+    {I_VCMPEQ_OSPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5482, 191},
+    {I_VCMPEQ_OSPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5491, 191},
+    {I_VCMPEQ_OSPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1550, 246},
+    {I_VCMPEQ_OSPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1560, 246},
+    {I_VCMPEQ_OSPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1570, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPEQPS = {
+    {I_VCMPEQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5500, 191},
+    {I_VCMPEQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5509, 191},
+    {I_VCMPEQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5518, 191},
+    {I_VCMPEQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5527, 191},
+    {I_VCMPEQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+270, 246},
+    {I_VCMPEQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+280, 246},
+    {I_VCMPEQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+290, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPLT_OSPS = {
+    {I_VCMPLT_OSPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5536, 191},
+    {I_VCMPLT_OSPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5545, 191},
+    {I_VCMPLT_OSPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5554, 191},
+    {I_VCMPLT_OSPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5563, 191},
+    {I_VCMPLT_OSPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+350, 246},
+    {I_VCMPLT_OSPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+360, 246},
+    {I_VCMPLT_OSPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+370, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPLTPS = {
+    {I_VCMPLTPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5536, 191},
+    {I_VCMPLTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5545, 191},
+    {I_VCMPLTPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5554, 191},
+    {I_VCMPLTPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5563, 191},
+    {I_VCMPLTPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+350, 246},
+    {I_VCMPLTPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+360, 246},
+    {I_VCMPLTPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+370, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPLE_OSPS = {
+    {I_VCMPLE_OSPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5572, 191},
+    {I_VCMPLE_OSPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5581, 191},
+    {I_VCMPLE_OSPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5590, 191},
+    {I_VCMPLE_OSPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5599, 191},
+    {I_VCMPLE_OSPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+430, 246},
+    {I_VCMPLE_OSPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+440, 246},
+    {I_VCMPLE_OSPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+450, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPLEPS = {
+    {I_VCMPLEPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5572, 191},
+    {I_VCMPLEPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5581, 191},
+    {I_VCMPLEPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5590, 191},
+    {I_VCMPLEPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5599, 191},
+    {I_VCMPLEPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+430, 246},
+    {I_VCMPLEPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+440, 246},
+    {I_VCMPLEPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+450, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPUNORD_QPS = {
+    {I_VCMPUNORD_QPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5608, 191},
+    {I_VCMPUNORD_QPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5617, 191},
+    {I_VCMPUNORD_QPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5626, 191},
+    {I_VCMPUNORD_QPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5635, 191},
+    {I_VCMPUNORD_QPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+510, 246},
+    {I_VCMPUNORD_QPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+520, 246},
+    {I_VCMPUNORD_QPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+530, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPUNORDPS = {
+    {I_VCMPUNORDPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5608, 191},
+    {I_VCMPUNORDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5617, 191},
+    {I_VCMPUNORDPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5626, 191},
+    {I_VCMPUNORDPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5635, 191},
+    {I_VCMPUNORDPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+510, 246},
+    {I_VCMPUNORDPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+520, 246},
+    {I_VCMPUNORDPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+530, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNEQ_UQPS = {
+    {I_VCMPNEQ_UQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5644, 191},
+    {I_VCMPNEQ_UQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5653, 191},
+    {I_VCMPNEQ_UQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5662, 191},
+    {I_VCMPNEQ_UQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5671, 191},
+    {I_VCMPNEQ_UQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+590, 246},
+    {I_VCMPNEQ_UQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+600, 246},
+    {I_VCMPNEQ_UQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+610, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNEQPS = {
+    {I_VCMPNEQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5644, 191},
+    {I_VCMPNEQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5653, 191},
+    {I_VCMPNEQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5662, 191},
+    {I_VCMPNEQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5671, 191},
+    {I_VCMPNEQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+590, 246},
+    {I_VCMPNEQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+600, 246},
+    {I_VCMPNEQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+610, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNLT_USPS = {
+    {I_VCMPNLT_USPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5680, 191},
+    {I_VCMPNLT_USPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5689, 191},
+    {I_VCMPNLT_USPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5698, 191},
+    {I_VCMPNLT_USPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5707, 191},
+    {I_VCMPNLT_USPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+670, 246},
+    {I_VCMPNLT_USPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+680, 246},
+    {I_VCMPNLT_USPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+690, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNLTPS = {
+    {I_VCMPNLTPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5680, 191},
+    {I_VCMPNLTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5689, 191},
+    {I_VCMPNLTPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5698, 191},
+    {I_VCMPNLTPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5707, 191},
+    {I_VCMPNLTPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+670, 246},
+    {I_VCMPNLTPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+680, 246},
+    {I_VCMPNLTPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+690, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNLE_USPS = {
+    {I_VCMPNLE_USPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5716, 191},
+    {I_VCMPNLE_USPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5725, 191},
+    {I_VCMPNLE_USPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5734, 191},
+    {I_VCMPNLE_USPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5743, 191},
+    {I_VCMPNLE_USPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+750, 246},
+    {I_VCMPNLE_USPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+760, 246},
+    {I_VCMPNLE_USPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+770, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNLEPS = {
+    {I_VCMPNLEPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5716, 191},
+    {I_VCMPNLEPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5725, 191},
+    {I_VCMPNLEPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5734, 191},
+    {I_VCMPNLEPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5743, 191},
+    {I_VCMPNLEPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+750, 246},
+    {I_VCMPNLEPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+760, 246},
+    {I_VCMPNLEPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+770, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPORD_QPS = {
+    {I_VCMPORD_QPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5752, 191},
+    {I_VCMPORD_QPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5761, 191},
+    {I_VCMPORD_QPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5770, 191},
+    {I_VCMPORD_QPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5779, 191},
+    {I_VCMPORD_QPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+830, 246},
+    {I_VCMPORD_QPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+840, 246},
+    {I_VCMPORD_QPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+850, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPORDPS = {
+    {I_VCMPORDPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5752, 191},
+    {I_VCMPORDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5761, 191},
+    {I_VCMPORDPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5770, 191},
+    {I_VCMPORDPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5779, 191},
+    {I_VCMPORDPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+830, 246},
+    {I_VCMPORDPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+840, 246},
+    {I_VCMPORDPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+850, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPEQ_UQPS = {
+    {I_VCMPEQ_UQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5788, 191},
+    {I_VCMPEQ_UQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5797, 191},
+    {I_VCMPEQ_UQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5806, 191},
+    {I_VCMPEQ_UQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5815, 191},
+    {I_VCMPEQ_UQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+910, 246},
+    {I_VCMPEQ_UQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+920, 246},
+    {I_VCMPEQ_UQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+930, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNGE_USPS = {
+    {I_VCMPNGE_USPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5824, 191},
+    {I_VCMPNGE_USPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5833, 191},
+    {I_VCMPNGE_USPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5842, 191},
+    {I_VCMPNGE_USPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5851, 191},
+    {I_VCMPNGE_USPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+990, 246},
+    {I_VCMPNGE_USPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1000, 246},
+    {I_VCMPNGE_USPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1010, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNGEPS = {
+    {I_VCMPNGEPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5824, 191},
+    {I_VCMPNGEPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5833, 191},
+    {I_VCMPNGEPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5842, 191},
+    {I_VCMPNGEPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5851, 191},
+    {I_VCMPNGEPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+990, 246},
+    {I_VCMPNGEPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1000, 246},
+    {I_VCMPNGEPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1010, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNGT_USPS = {
+    {I_VCMPNGT_USPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5860, 191},
+    {I_VCMPNGT_USPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5869, 191},
+    {I_VCMPNGT_USPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5878, 191},
+    {I_VCMPNGT_USPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5887, 191},
+    {I_VCMPNGT_USPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1070, 246},
+    {I_VCMPNGT_USPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1080, 246},
+    {I_VCMPNGT_USPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1090, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNGTPS = {
+    {I_VCMPNGTPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5860, 191},
+    {I_VCMPNGTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5869, 191},
+    {I_VCMPNGTPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5878, 191},
+    {I_VCMPNGTPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5887, 191},
+    {I_VCMPNGTPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1070, 246},
+    {I_VCMPNGTPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1080, 246},
+    {I_VCMPNGTPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1090, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPFALSE_OQPS = {
+    {I_VCMPFALSE_OQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5896, 191},
+    {I_VCMPFALSE_OQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5905, 191},
+    {I_VCMPFALSE_OQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5914, 191},
+    {I_VCMPFALSE_OQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5923, 191},
+    {I_VCMPFALSE_OQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1150, 246},
+    {I_VCMPFALSE_OQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1160, 246},
+    {I_VCMPFALSE_OQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1170, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPFALSEPS = {
+    {I_VCMPFALSEPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5896, 191},
+    {I_VCMPFALSEPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5905, 191},
+    {I_VCMPFALSEPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5914, 191},
+    {I_VCMPFALSEPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5923, 191},
+    {I_VCMPFALSEPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1150, 246},
+    {I_VCMPFALSEPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1160, 246},
+    {I_VCMPFALSEPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1170, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNEQ_OQPS = {
+    {I_VCMPNEQ_OQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5932, 191},
+    {I_VCMPNEQ_OQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5941, 191},
+    {I_VCMPNEQ_OQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5950, 191},
+    {I_VCMPNEQ_OQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5959, 191},
+    {I_VCMPNEQ_OQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1230, 246},
+    {I_VCMPNEQ_OQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1240, 246},
+    {I_VCMPNEQ_OQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1250, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPGE_OSPS = {
+    {I_VCMPGE_OSPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5968, 191},
+    {I_VCMPGE_OSPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5977, 191},
+    {I_VCMPGE_OSPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5986, 191},
+    {I_VCMPGE_OSPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5995, 191},
+    {I_VCMPGE_OSPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1310, 246},
+    {I_VCMPGE_OSPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1320, 246},
+    {I_VCMPGE_OSPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1330, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPGEPS = {
+    {I_VCMPGEPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5968, 191},
+    {I_VCMPGEPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5977, 191},
+    {I_VCMPGEPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5986, 191},
+    {I_VCMPGEPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5995, 191},
+    {I_VCMPGEPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1310, 246},
+    {I_VCMPGEPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1320, 246},
+    {I_VCMPGEPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1330, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPGT_OSPS = {
+    {I_VCMPGT_OSPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6004, 191},
+    {I_VCMPGT_OSPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6013, 191},
+    {I_VCMPGT_OSPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6022, 191},
+    {I_VCMPGT_OSPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6031, 191},
+    {I_VCMPGT_OSPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1390, 246},
+    {I_VCMPGT_OSPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1400, 246},
+    {I_VCMPGT_OSPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1410, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPGTPS = {
+    {I_VCMPGTPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6004, 191},
+    {I_VCMPGTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6013, 191},
+    {I_VCMPGTPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6022, 191},
+    {I_VCMPGTPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6031, 191},
+    {I_VCMPGTPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1390, 246},
+    {I_VCMPGTPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1400, 246},
+    {I_VCMPGTPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1410, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPTRUE_UQPS = {
+    {I_VCMPTRUE_UQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6040, 191},
+    {I_VCMPTRUE_UQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6049, 191},
+    {I_VCMPTRUE_UQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6058, 191},
+    {I_VCMPTRUE_UQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6067, 191},
+    {I_VCMPTRUE_UQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1470, 246},
+    {I_VCMPTRUE_UQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1480, 246},
+    {I_VCMPTRUE_UQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1490, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPTRUEPS = {
+    {I_VCMPTRUEPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6040, 191},
+    {I_VCMPTRUEPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6049, 191},
+    {I_VCMPTRUEPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6058, 191},
+    {I_VCMPTRUEPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6067, 191},
+    {I_VCMPTRUEPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1470, 246},
+    {I_VCMPTRUEPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1480, 246},
+    {I_VCMPTRUEPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1490, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPLT_OQPS = {
+    {I_VCMPLT_OQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6076, 191},
+    {I_VCMPLT_OQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6085, 191},
+    {I_VCMPLT_OQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6094, 191},
+    {I_VCMPLT_OQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6103, 191},
+    {I_VCMPLT_OQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1630, 246},
+    {I_VCMPLT_OQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1640, 246},
+    {I_VCMPLT_OQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1650, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPLE_OQPS = {
+    {I_VCMPLE_OQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6112, 191},
+    {I_VCMPLE_OQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6121, 191},
+    {I_VCMPLE_OQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6130, 191},
+    {I_VCMPLE_OQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6139, 191},
+    {I_VCMPLE_OQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1710, 246},
+    {I_VCMPLE_OQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1720, 246},
+    {I_VCMPLE_OQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1730, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPUNORD_SPS = {
+    {I_VCMPUNORD_SPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6148, 191},
+    {I_VCMPUNORD_SPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6157, 191},
+    {I_VCMPUNORD_SPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6166, 191},
+    {I_VCMPUNORD_SPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6175, 191},
+    {I_VCMPUNORD_SPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1790, 246},
+    {I_VCMPUNORD_SPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1800, 246},
+    {I_VCMPUNORD_SPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1810, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNEQ_USPS = {
+    {I_VCMPNEQ_USPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6184, 191},
+    {I_VCMPNEQ_USPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6193, 191},
+    {I_VCMPNEQ_USPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6202, 191},
+    {I_VCMPNEQ_USPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6211, 191},
+    {I_VCMPNEQ_USPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1870, 246},
+    {I_VCMPNEQ_USPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1880, 246},
+    {I_VCMPNEQ_USPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1890, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNLT_UQPS = {
+    {I_VCMPNLT_UQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6220, 191},
+    {I_VCMPNLT_UQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6229, 191},
+    {I_VCMPNLT_UQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6238, 191},
+    {I_VCMPNLT_UQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6247, 191},
+    {I_VCMPNLT_UQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1950, 246},
+    {I_VCMPNLT_UQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1960, 246},
+    {I_VCMPNLT_UQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1970, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNLE_UQPS = {
+    {I_VCMPNLE_UQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6256, 191},
+    {I_VCMPNLE_UQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6265, 191},
+    {I_VCMPNLE_UQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6274, 191},
+    {I_VCMPNLE_UQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6283, 191},
+    {I_VCMPNLE_UQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2030, 246},
+    {I_VCMPNLE_UQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2040, 246},
+    {I_VCMPNLE_UQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2050, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPORD_SPS = {
+    {I_VCMPORD_SPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6292, 191},
+    {I_VCMPORD_SPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6301, 191},
+    {I_VCMPORD_SPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6310, 191},
+    {I_VCMPORD_SPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6319, 191},
+    {I_VCMPORD_SPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2110, 246},
+    {I_VCMPORD_SPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2120, 246},
+    {I_VCMPORD_SPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2130, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPEQ_USPS = {
+    {I_VCMPEQ_USPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6328, 191},
+    {I_VCMPEQ_USPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6337, 191},
+    {I_VCMPEQ_USPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6346, 191},
+    {I_VCMPEQ_USPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6355, 191},
+    {I_VCMPEQ_USPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2190, 246},
+    {I_VCMPEQ_USPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2200, 246},
+    {I_VCMPEQ_USPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2210, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNGE_UQPS = {
+    {I_VCMPNGE_UQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6364, 191},
+    {I_VCMPNGE_UQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6373, 191},
+    {I_VCMPNGE_UQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6382, 191},
+    {I_VCMPNGE_UQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6391, 191},
+    {I_VCMPNGE_UQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2270, 246},
+    {I_VCMPNGE_UQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2280, 246},
+    {I_VCMPNGE_UQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2290, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNGT_UQPS = {
+    {I_VCMPNGT_UQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6400, 191},
+    {I_VCMPNGT_UQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6409, 191},
+    {I_VCMPNGT_UQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6418, 191},
+    {I_VCMPNGT_UQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6427, 191},
+    {I_VCMPNGT_UQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2350, 246},
+    {I_VCMPNGT_UQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2360, 246},
+    {I_VCMPNGT_UQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2370, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPFALSE_OSPS = {
+    {I_VCMPFALSE_OSPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6436, 191},
+    {I_VCMPFALSE_OSPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6445, 191},
+    {I_VCMPFALSE_OSPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6454, 191},
+    {I_VCMPFALSE_OSPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6463, 191},
+    {I_VCMPFALSE_OSPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2430, 246},
+    {I_VCMPFALSE_OSPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2440, 246},
+    {I_VCMPFALSE_OSPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2450, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNEQ_OSPS = {
+    {I_VCMPNEQ_OSPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6472, 191},
+    {I_VCMPNEQ_OSPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6481, 191},
+    {I_VCMPNEQ_OSPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6490, 191},
+    {I_VCMPNEQ_OSPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6499, 191},
+    {I_VCMPNEQ_OSPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2510, 246},
+    {I_VCMPNEQ_OSPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2520, 246},
+    {I_VCMPNEQ_OSPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2530, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPGE_OQPS = {
+    {I_VCMPGE_OQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6508, 191},
+    {I_VCMPGE_OQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6517, 191},
+    {I_VCMPGE_OQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6526, 191},
+    {I_VCMPGE_OQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6535, 191},
+    {I_VCMPGE_OQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2590, 246},
+    {I_VCMPGE_OQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2600, 246},
+    {I_VCMPGE_OQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2610, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPGT_OQPS = {
+    {I_VCMPGT_OQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6544, 191},
+    {I_VCMPGT_OQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6553, 191},
+    {I_VCMPGT_OQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6562, 191},
+    {I_VCMPGT_OQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6571, 191},
+    {I_VCMPGT_OQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2670, 246},
+    {I_VCMPGT_OQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2680, 246},
+    {I_VCMPGT_OQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2690, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPTRUE_USPS = {
+    {I_VCMPTRUE_USPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6580, 191},
+    {I_VCMPTRUE_USPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6589, 191},
+    {I_VCMPTRUE_USPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6598, 191},
+    {I_VCMPTRUE_USPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6607, 191},
+    {I_VCMPTRUE_USPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2750, 246},
+    {I_VCMPTRUE_USPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2760, 246},
+    {I_VCMPTRUE_USPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2770, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPPS = {
+    {I_VCMPPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13464, 191},
+    {I_VCMPPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13472, 191},
+    {I_VCMPPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13480, 191},
+    {I_VCMPPS, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13488, 191},
+    {I_VCMPPS, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8137, 246},
+    {I_VCMPPS, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8146, 246},
+    {I_VCMPPS, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+8155, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPEQ_OSSD = {
+    {I_VCMPEQ_OSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6616, 191},
+    {I_VCMPEQ_OSSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6625, 191},
+    {I_VCMPEQ_OSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6616, 191},
+    {I_VCMPEQ_OSSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6625, 191},
+    {I_VCMPEQ_OSSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1580, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPEQSD = {
+    {I_VCMPEQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6634, 191},
+    {I_VCMPEQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6643, 191},
+    {I_VCMPEQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+300, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPLT_OSSD = {
+    {I_VCMPLT_OSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6652, 191},
+    {I_VCMPLT_OSSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6661, 191},
+    {I_VCMPLT_OSSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+380, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPLTSD = {
+    {I_VCMPLTSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6652, 191},
+    {I_VCMPLTSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6661, 191},
+    {I_VCMPLTSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+380, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPLE_OSSD = {
+    {I_VCMPLE_OSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6670, 191},
+    {I_VCMPLE_OSSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6679, 191},
+    {I_VCMPLE_OSSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+460, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPLESD = {
+    {I_VCMPLESD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6670, 191},
+    {I_VCMPLESD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6679, 191},
+    {I_VCMPLESD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+460, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPUNORD_QSD = {
+    {I_VCMPUNORD_QSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6688, 191},
+    {I_VCMPUNORD_QSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6697, 191},
+    {I_VCMPUNORD_QSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+540, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPUNORDSD = {
+    {I_VCMPUNORDSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6688, 191},
+    {I_VCMPUNORDSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6697, 191},
+    {I_VCMPUNORDSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+540, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNEQ_UQSD = {
+    {I_VCMPNEQ_UQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6706, 191},
+    {I_VCMPNEQ_UQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6715, 191},
+    {I_VCMPNEQ_UQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+620, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNEQSD = {
+    {I_VCMPNEQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6706, 191},
+    {I_VCMPNEQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6715, 191},
+    {I_VCMPNEQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+620, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNLT_USSD = {
+    {I_VCMPNLT_USSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6724, 191},
+    {I_VCMPNLT_USSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6733, 191},
+    {I_VCMPNLT_USSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+700, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNLTSD = {
+    {I_VCMPNLTSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6724, 191},
+    {I_VCMPNLTSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6733, 191},
+    {I_VCMPNLTSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+700, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNLE_USSD = {
+    {I_VCMPNLE_USSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6742, 191},
+    {I_VCMPNLE_USSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6751, 191},
+    {I_VCMPNLE_USSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+780, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNLESD = {
+    {I_VCMPNLESD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6742, 191},
+    {I_VCMPNLESD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6751, 191},
+    {I_VCMPNLESD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+780, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPORD_QSD = {
+    {I_VCMPORD_QSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6760, 191},
+    {I_VCMPORD_QSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6769, 191},
+    {I_VCMPORD_QSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+860, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPORDSD = {
+    {I_VCMPORDSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6760, 191},
+    {I_VCMPORDSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6769, 191},
+    {I_VCMPORDSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+860, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPEQ_UQSD = {
+    {I_VCMPEQ_UQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6778, 191},
+    {I_VCMPEQ_UQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6787, 191},
+    {I_VCMPEQ_UQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+940, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNGE_USSD = {
+    {I_VCMPNGE_USSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6796, 191},
+    {I_VCMPNGE_USSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6805, 191},
+    {I_VCMPNGE_USSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1020, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNGESD = {
+    {I_VCMPNGESD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6796, 191},
+    {I_VCMPNGESD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6805, 191},
+    {I_VCMPNGESD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1020, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNGT_USSD = {
+    {I_VCMPNGT_USSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6814, 191},
+    {I_VCMPNGT_USSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6823, 191},
+    {I_VCMPNGT_USSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1100, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNGTSD = {
+    {I_VCMPNGTSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6814, 191},
+    {I_VCMPNGTSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6823, 191},
+    {I_VCMPNGTSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1100, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPFALSE_OQSD = {
+    {I_VCMPFALSE_OQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6832, 191},
+    {I_VCMPFALSE_OQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6841, 191},
+    {I_VCMPFALSE_OQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1180, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPFALSESD = {
+    {I_VCMPFALSESD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6832, 191},
+    {I_VCMPFALSESD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6841, 191},
+    {I_VCMPFALSESD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1180, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNEQ_OQSD = {
+    {I_VCMPNEQ_OQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6850, 191},
+    {I_VCMPNEQ_OQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6859, 191},
+    {I_VCMPNEQ_OQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1260, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPGE_OSSD = {
+    {I_VCMPGE_OSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6868, 191},
+    {I_VCMPGE_OSSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6877, 191},
+    {I_VCMPGE_OSSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1340, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPGESD = {
+    {I_VCMPGESD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6868, 191},
+    {I_VCMPGESD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6877, 191},
+    {I_VCMPGESD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1340, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPGT_OSSD = {
+    {I_VCMPGT_OSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6886, 191},
+    {I_VCMPGT_OSSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6895, 191},
+    {I_VCMPGT_OSSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1420, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPGTSD = {
+    {I_VCMPGTSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6886, 191},
+    {I_VCMPGTSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6895, 191},
+    {I_VCMPGTSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1420, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPTRUE_UQSD = {
+    {I_VCMPTRUE_UQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6904, 191},
+    {I_VCMPTRUE_UQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6913, 191},
+    {I_VCMPTRUE_UQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1500, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPTRUESD = {
+    {I_VCMPTRUESD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6904, 191},
+    {I_VCMPTRUESD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6913, 191},
+    {I_VCMPTRUESD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1500, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPLT_OQSD = {
+    {I_VCMPLT_OQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6922, 191},
+    {I_VCMPLT_OQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6931, 191},
+    {I_VCMPLT_OQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1660, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPLE_OQSD = {
+    {I_VCMPLE_OQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6940, 191},
+    {I_VCMPLE_OQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6949, 191},
+    {I_VCMPLE_OQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1740, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPUNORD_SSD = {
+    {I_VCMPUNORD_SSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6958, 191},
+    {I_VCMPUNORD_SSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6967, 191},
+    {I_VCMPUNORD_SSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1820, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNEQ_USSD = {
+    {I_VCMPNEQ_USSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6976, 191},
+    {I_VCMPNEQ_USSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6985, 191},
+    {I_VCMPNEQ_USSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1900, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNLT_UQSD = {
+    {I_VCMPNLT_UQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6994, 191},
+    {I_VCMPNLT_UQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7003, 191},
+    {I_VCMPNLT_UQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1980, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNLE_UQSD = {
+    {I_VCMPNLE_UQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7012, 191},
+    {I_VCMPNLE_UQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7021, 191},
+    {I_VCMPNLE_UQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2060, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPORD_SSD = {
+    {I_VCMPORD_SSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7030, 191},
+    {I_VCMPORD_SSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7039, 191},
+    {I_VCMPORD_SSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2140, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPEQ_USSD = {
+    {I_VCMPEQ_USSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7048, 191},
+    {I_VCMPEQ_USSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7057, 191},
+    {I_VCMPEQ_USSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2220, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNGE_UQSD = {
+    {I_VCMPNGE_UQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7066, 191},
+    {I_VCMPNGE_UQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7075, 191},
+    {I_VCMPNGE_UQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2300, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNGT_UQSD = {
+    {I_VCMPNGT_UQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7084, 191},
+    {I_VCMPNGT_UQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7093, 191},
+    {I_VCMPNGT_UQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2380, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPFALSE_OSSD = {
+    {I_VCMPFALSE_OSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7102, 191},
+    {I_VCMPFALSE_OSSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7111, 191},
+    {I_VCMPFALSE_OSSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2460, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNEQ_OSSD = {
+    {I_VCMPNEQ_OSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7120, 191},
+    {I_VCMPNEQ_OSSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7129, 191},
+    {I_VCMPNEQ_OSSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2540, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPGE_OQSD = {
+    {I_VCMPGE_OQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7138, 191},
+    {I_VCMPGE_OQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7147, 191},
+    {I_VCMPGE_OQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2620, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPGT_OQSD = {
+    {I_VCMPGT_OQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7156, 191},
+    {I_VCMPGT_OQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7165, 191},
+    {I_VCMPGT_OQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2700, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPTRUE_USSD = {
+    {I_VCMPTRUE_USSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7174, 191},
+    {I_VCMPTRUE_USSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7183, 191},
+    {I_VCMPTRUE_USSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2780, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPSD = {
+    {I_VCMPSD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13496, 191},
+    {I_VCMPSD, 3, {XMM_L16,RM_XMM_L16|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13504, 191},
+    {I_VCMPSD, 4, {KREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+8164, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPEQ_OSSS = {
+    {I_VCMPEQ_OSSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7192, 191},
+    {I_VCMPEQ_OSSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7201, 191},
+    {I_VCMPEQ_OSSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7192, 191},
+    {I_VCMPEQ_OSSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7201, 191},
+    {I_VCMPEQ_OSSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1590, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPEQSS = {
+    {I_VCMPEQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7210, 191},
+    {I_VCMPEQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7219, 191},
+    {I_VCMPEQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+310, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPLT_OSSS = {
+    {I_VCMPLT_OSSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7228, 191},
+    {I_VCMPLT_OSSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7237, 191},
+    {I_VCMPLT_OSSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+390, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPLTSS = {
+    {I_VCMPLTSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7228, 191},
+    {I_VCMPLTSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7237, 191},
+    {I_VCMPLTSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+390, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPLE_OSSS = {
+    {I_VCMPLE_OSSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7246, 191},
+    {I_VCMPLE_OSSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7255, 191},
+    {I_VCMPLE_OSSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+470, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPLESS = {
+    {I_VCMPLESS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7246, 191},
+    {I_VCMPLESS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7255, 191},
+    {I_VCMPLESS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+470, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPUNORD_QSS = {
+    {I_VCMPUNORD_QSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7264, 191},
+    {I_VCMPUNORD_QSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7273, 191},
+    {I_VCMPUNORD_QSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+550, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPUNORDSS = {
+    {I_VCMPUNORDSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7264, 191},
+    {I_VCMPUNORDSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7273, 191},
+    {I_VCMPUNORDSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+550, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNEQ_UQSS = {
+    {I_VCMPNEQ_UQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7282, 191},
+    {I_VCMPNEQ_UQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7291, 191},
+    {I_VCMPNEQ_UQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+630, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNEQSS = {
+    {I_VCMPNEQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7282, 191},
+    {I_VCMPNEQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7291, 191},
+    {I_VCMPNEQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+630, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNLT_USSS = {
+    {I_VCMPNLT_USSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7300, 191},
+    {I_VCMPNLT_USSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7309, 191},
+    {I_VCMPNLT_USSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+710, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNLTSS = {
+    {I_VCMPNLTSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7300, 191},
+    {I_VCMPNLTSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7309, 191},
+    {I_VCMPNLTSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+710, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNLE_USSS = {
+    {I_VCMPNLE_USSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7318, 191},
+    {I_VCMPNLE_USSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7327, 191},
+    {I_VCMPNLE_USSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+790, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNLESS = {
+    {I_VCMPNLESS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7318, 191},
+    {I_VCMPNLESS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7327, 191},
+    {I_VCMPNLESS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+790, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPORD_QSS = {
+    {I_VCMPORD_QSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7336, 191},
+    {I_VCMPORD_QSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7345, 191},
+    {I_VCMPORD_QSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+870, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPORDSS = {
+    {I_VCMPORDSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7336, 191},
+    {I_VCMPORDSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7345, 191},
+    {I_VCMPORDSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+870, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPEQ_UQSS = {
+    {I_VCMPEQ_UQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7354, 191},
+    {I_VCMPEQ_UQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7363, 191},
+    {I_VCMPEQ_UQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+950, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNGE_USSS = {
+    {I_VCMPNGE_USSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7372, 191},
+    {I_VCMPNGE_USSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7381, 191},
+    {I_VCMPNGE_USSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1030, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNGESS = {
+    {I_VCMPNGESS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7372, 191},
+    {I_VCMPNGESS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7381, 191},
+    {I_VCMPNGESS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1030, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNGT_USSS = {
+    {I_VCMPNGT_USSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7390, 191},
+    {I_VCMPNGT_USSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7399, 191},
+    {I_VCMPNGT_USSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1110, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNGTSS = {
+    {I_VCMPNGTSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7390, 191},
+    {I_VCMPNGTSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7399, 191},
+    {I_VCMPNGTSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1110, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPFALSE_OQSS = {
+    {I_VCMPFALSE_OQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7408, 191},
+    {I_VCMPFALSE_OQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7417, 191},
+    {I_VCMPFALSE_OQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1190, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPFALSESS = {
+    {I_VCMPFALSESS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7408, 191},
+    {I_VCMPFALSESS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7417, 191},
+    {I_VCMPFALSESS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1190, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNEQ_OQSS = {
+    {I_VCMPNEQ_OQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7426, 191},
+    {I_VCMPNEQ_OQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7435, 191},
+    {I_VCMPNEQ_OQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1270, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPGE_OSSS = {
+    {I_VCMPGE_OSSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7444, 191},
+    {I_VCMPGE_OSSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7453, 191},
+    {I_VCMPGE_OSSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1350, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPGESS = {
+    {I_VCMPGESS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7444, 191},
+    {I_VCMPGESS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7453, 191},
+    {I_VCMPGESS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1350, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPGT_OSSS = {
+    {I_VCMPGT_OSSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7462, 191},
+    {I_VCMPGT_OSSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7471, 191},
+    {I_VCMPGT_OSSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1430, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPGTSS = {
+    {I_VCMPGTSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7462, 191},
+    {I_VCMPGTSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7471, 191},
+    {I_VCMPGTSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1430, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPTRUE_UQSS = {
+    {I_VCMPTRUE_UQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7480, 191},
+    {I_VCMPTRUE_UQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7489, 191},
+    {I_VCMPTRUE_UQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1510, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPTRUESS = {
+    {I_VCMPTRUESS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7480, 191},
+    {I_VCMPTRUESS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7489, 191},
+    {I_VCMPTRUESS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1510, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPLT_OQSS = {
+    {I_VCMPLT_OQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7498, 191},
+    {I_VCMPLT_OQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7507, 191},
+    {I_VCMPLT_OQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1670, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPLE_OQSS = {
+    {I_VCMPLE_OQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7516, 191},
+    {I_VCMPLE_OQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7525, 191},
+    {I_VCMPLE_OQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1750, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPUNORD_SSS = {
+    {I_VCMPUNORD_SSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7534, 191},
+    {I_VCMPUNORD_SSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7543, 191},
+    {I_VCMPUNORD_SSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1830, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNEQ_USSS = {
+    {I_VCMPNEQ_USSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7552, 191},
+    {I_VCMPNEQ_USSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7561, 191},
+    {I_VCMPNEQ_USSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1910, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNLT_UQSS = {
+    {I_VCMPNLT_UQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7570, 191},
+    {I_VCMPNLT_UQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7579, 191},
+    {I_VCMPNLT_UQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1990, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNLE_UQSS = {
+    {I_VCMPNLE_UQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7588, 191},
+    {I_VCMPNLE_UQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7597, 191},
+    {I_VCMPNLE_UQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2070, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPORD_SSS = {
+    {I_VCMPORD_SSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7606, 191},
+    {I_VCMPORD_SSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7615, 191},
+    {I_VCMPORD_SSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2150, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPEQ_USSS = {
+    {I_VCMPEQ_USSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7624, 191},
+    {I_VCMPEQ_USSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7633, 191},
+    {I_VCMPEQ_USSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2230, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNGE_UQSS = {
+    {I_VCMPNGE_UQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7642, 191},
+    {I_VCMPNGE_UQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7651, 191},
+    {I_VCMPNGE_UQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2310, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNGT_UQSS = {
+    {I_VCMPNGT_UQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7660, 191},
+    {I_VCMPNGT_UQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7669, 191},
+    {I_VCMPNGT_UQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2390, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPFALSE_OSSS = {
+    {I_VCMPFALSE_OSSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7678, 191},
+    {I_VCMPFALSE_OSSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7687, 191},
+    {I_VCMPFALSE_OSSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2470, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPNEQ_OSSS = {
+    {I_VCMPNEQ_OSSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7696, 191},
+    {I_VCMPNEQ_OSSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7705, 191},
+    {I_VCMPNEQ_OSSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2550, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPGE_OQSS = {
+    {I_VCMPGE_OQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7714, 191},
+    {I_VCMPGE_OQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7723, 191},
+    {I_VCMPGE_OQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2630, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPGT_OQSS = {
+    {I_VCMPGT_OQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7732, 191},
+    {I_VCMPGT_OQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7741, 191},
+    {I_VCMPGT_OQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2710, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPTRUE_USSS = {
+    {I_VCMPTRUE_USSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7750, 191},
+    {I_VCMPTRUE_USSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7759, 191},
+    {I_VCMPTRUE_USSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2790, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPSS = {
+    {I_VCMPSS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13512, 191},
+    {I_VCMPSS, 3, {XMM_L16,RM_XMM_L16|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13520, 191},
+    {I_VCMPSS, 4, {KREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+8173, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCOMISD = {
+    {I_VCOMISD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35280, 191},
+    {I_VCOMISD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+16968, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCOMISS = {
+    {I_VCOMISS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35287, 191},
+    {I_VCOMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+16976, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTDQ2PD = {
+    {I_VCVTDQ2PD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35294, 191},
+    {I_VCVTDQ2PD, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35301, 191},
+    {I_VCVTDQ2PD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17080, 246},
+    {I_VCVTDQ2PD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17088, 246},
+    {I_VCVTDQ2PD, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+17096, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTDQ2PS = {
+    {I_VCVTDQ2PS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35308, 191},
+    {I_VCVTDQ2PS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35315, 191},
+    {I_VCVTDQ2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17104, 246},
+    {I_VCVTDQ2PS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17112, 246},
+    {I_VCVTDQ2PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+17120, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTPD2DQ = {
+    {I_VCVTPD2DQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35322, 191},
+    {I_VCVTPD2DQ, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35322, 195},
+    {I_VCVTPD2DQ, 2, {XMM_L16,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35329, 191},
+    {I_VCVTPD2DQ, 2, {XMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35329, 196},
+    {I_VCVTPD2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17128, 246},
+    {I_VCVTPD2DQ, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17136, 246},
+    {I_VCVTPD2DQ, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17144, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTPD2PS = {
+    {I_VCVTPD2PS, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35336, 191},
+    {I_VCVTPD2PS, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35336, 195},
+    {I_VCVTPD2PS, 2, {XMM_L16,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35343, 191},
+    {I_VCVTPD2PS, 2, {XMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35343, 196},
+    {I_VCVTPD2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17152, 246},
+    {I_VCVTPD2PS, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17160, 246},
+    {I_VCVTPD2PS, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17168, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTPS2DQ = {
+    {I_VCVTPS2DQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35350, 191},
+    {I_VCVTPS2DQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35357, 191},
+    {I_VCVTPS2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17272, 246},
+    {I_VCVTPS2DQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17280, 246},
+    {I_VCVTPS2DQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+17288, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTPS2PD = {
+    {I_VCVTPS2PD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35364, 191},
+    {I_VCVTPS2PD, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35371, 191},
+    {I_VCVTPS2PD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17296, 246},
+    {I_VCVTPS2PD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17304, 246},
+    {I_VCVTPS2PD, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+17312, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTSD2SI = {
+    {I_VCVTSD2SI, 2, {REG_GPR|BITS32,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35378, 191},
+    {I_VCVTSD2SI, 2, {REG_GPR|BITS64,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35385, 197},
+    {I_VCVTSD2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17440, 247},
+    {I_VCVTSD2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17448, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTSD2SS = {
+    {I_VCVTSD2SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+35392, 191},
+    {I_VCVTSD2SS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35399, 191},
+    {I_VCVTSD2SS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+17456, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTSI2SD = {
+    {I_VCVTSI2SD, 3, {XMM_L16,XMM_L16,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+35406, 198},
+    {I_VCVTSI2SD, 2, {XMM_L16,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35413, 198},
+    {I_VCVTSI2SD, 3, {XMM_L16,XMM_L16,MEMORY|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+35406, 198},
+    {I_VCVTSI2SD, 2, {XMM_L16,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35413, 198},
+    {I_VCVTSI2SD, 3, {XMM_L16,XMM_L16,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+35420, 199},
+    {I_VCVTSI2SD, 2, {XMM_L16,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35427, 199},
+    {I_VCVTSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17480, 247},
+    {I_VCVTSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17488, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTSI2SS = {
+    {I_VCVTSI2SS, 3, {XMM_L16,XMM_L16,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+35434, 198},
+    {I_VCVTSI2SS, 2, {XMM_L16,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35441, 198},
+    {I_VCVTSI2SS, 3, {XMM_L16,XMM_L16,MEMORY|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+35434, 198},
+    {I_VCVTSI2SS, 2, {XMM_L16,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35441, 198},
+    {I_VCVTSI2SS, 3, {XMM_L16,XMM_L16,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+35448, 199},
+    {I_VCVTSI2SS, 2, {XMM_L16,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35455, 199},
+    {I_VCVTSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17496, 247},
+    {I_VCVTSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17504, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTSS2SD = {
+    {I_VCVTSS2SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+35462, 191},
+    {I_VCVTSS2SD, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35469, 191},
+    {I_VCVTSS2SD, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+17512, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTSS2SI = {
+    {I_VCVTSS2SI, 2, {REG_GPR|BITS32,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35476, 191},
+    {I_VCVTSS2SI, 2, {REG_GPR|BITS64,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35483, 197},
+    {I_VCVTSS2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17520, 247},
+    {I_VCVTSS2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17528, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTTPD2DQ = {
+    {I_VCVTTPD2DQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35490, 191},
+    {I_VCVTTPD2DQ, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35490, 195},
+    {I_VCVTTPD2DQ, 2, {XMM_L16,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35497, 191},
+    {I_VCVTTPD2DQ, 2, {XMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35497, 196},
+    {I_VCVTTPD2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17552, 246},
+    {I_VCVTTPD2DQ, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17560, 246},
+    {I_VCVTTPD2DQ, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+17568, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTTPS2DQ = {
+    {I_VCVTTPS2DQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35504, 191},
+    {I_VCVTTPS2DQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35511, 191},
+    {I_VCVTTPS2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17648, 246},
+    {I_VCVTTPS2DQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17656, 246},
+    {I_VCVTTPS2DQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+17664, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTTSD2SI = {
+    {I_VCVTTSD2SI, 2, {REG_GPR|BITS32,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35518, 191},
+    {I_VCVTTSD2SI, 2, {REG_GPR|BITS64,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35525, 197},
+    {I_VCVTTSD2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+17744, 247},
+    {I_VCVTTSD2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+17752, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTTSS2SI = {
+    {I_VCVTTSS2SI, 2, {REG_GPR|BITS32,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35532, 191},
+    {I_VCVTTSS2SI, 2, {REG_GPR|BITS64,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35539, 197},
+    {I_VCVTTSS2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+17776, 247},
+    {I_VCVTTSS2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+17784, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VDIVPD = {
+    {I_VDIVPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35546, 191},
+    {I_VDIVPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35553, 191},
+    {I_VDIVPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35560, 191},
+    {I_VDIVPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35567, 191},
+    {I_VDIVPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+17936, 246},
+    {I_VDIVPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17944, 246},
+    {I_VDIVPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+17952, 246},
+    {I_VDIVPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17960, 246},
+    {I_VDIVPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+17968, 247},
+    {I_VDIVPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17976, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VDIVPS = {
+    {I_VDIVPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35574, 191},
+    {I_VDIVPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35581, 191},
+    {I_VDIVPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35588, 191},
+    {I_VDIVPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35595, 191},
+    {I_VDIVPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+17984, 246},
+    {I_VDIVPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17992, 246},
+    {I_VDIVPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18000, 246},
+    {I_VDIVPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+18008, 246},
+    {I_VDIVPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18016, 247},
+    {I_VDIVPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+18024, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VDIVSD = {
+    {I_VDIVSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+35602, 191},
+    {I_VDIVSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35609, 191},
+    {I_VDIVSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18032, 247},
+    {I_VDIVSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+18040, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VDIVSS = {
+    {I_VDIVSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+35616, 191},
+    {I_VDIVSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35623, 191},
+    {I_VDIVSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18048, 247},
+    {I_VDIVSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+18056, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VDPPD = {
+    {I_VDPPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13528, 191},
+    {I_VDPPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13536, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VDPPS = {
+    {I_VDPPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13544, 191},
+    {I_VDPPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13552, 191},
+    {I_VDPPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13560, 191},
+    {I_VDPPS, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13568, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VEXTRACTF128 = {
+    {I_VEXTRACTF128, 3, {RM_XMM_L16|BITS128,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13576, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VEXTRACTPS = {
+    {I_VEXTRACTPS, 3, {RM_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13584, 191},
+    {I_VEXTRACTPS, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+8479, 247},
+    {I_VEXTRACTPS, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+8479, 247},
+    {I_VEXTRACTPS, 3, {MEMORY|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+8479, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VHADDPD = {
+    {I_VHADDPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35630, 191},
+    {I_VHADDPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35637, 191},
+    {I_VHADDPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35644, 191},
+    {I_VHADDPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35651, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VHADDPS = {
+    {I_VHADDPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35658, 191},
+    {I_VHADDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35665, 191},
+    {I_VHADDPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35672, 191},
+    {I_VHADDPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35679, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VHSUBPD = {
+    {I_VHSUBPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35686, 191},
+    {I_VHSUBPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35693, 191},
+    {I_VHSUBPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35700, 191},
+    {I_VHSUBPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35707, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VHSUBPS = {
+    {I_VHSUBPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35714, 191},
+    {I_VHSUBPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35721, 191},
+    {I_VHSUBPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35728, 191},
+    {I_VHSUBPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35735, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VINSERTF128 = {
+    {I_VINSERTF128, 4, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13592, 191},
+    {I_VINSERTF128, 3, {YMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13600, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VINSERTPS = {
+    {I_VINSERTPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13608, 191},
+    {I_VINSERTPS, 3, {XMM_L16,RM_XMM_L16|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13616, 191},
+    {I_VINSERTPS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+9172, 247},
+    {I_VINSERTPS, 3, {XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9181, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VLDDQU = {
+    {I_VLDDQU, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35742, 191},
+    {I_VLDDQU, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35749, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VLDQQU = {
+    {I_VLDQQU, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35749, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VLDMXCSR = {
+    {I_VLDMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+35756, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMASKMOVDQU = {
+    {I_VMASKMOVDQU, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35763, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMASKMOVPS = {
+    {I_VMASKMOVPS, 3, {XMM_L16,XMM_L16,MEMORY|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35770, 191},
+    {I_VMASKMOVPS, 3, {YMM_L16,YMM_L16,MEMORY|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35777, 191},
+    {I_VMASKMOVPS, 3, {MEMORY|BITS128,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+35784, 195},
+    {I_VMASKMOVPS, 3, {MEMORY|BITS256,YMM_L16,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+35791, 196},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMASKMOVPD = {
+    {I_VMASKMOVPD, 3, {XMM_L16,XMM_L16,MEMORY|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35798, 191},
+    {I_VMASKMOVPD, 3, {YMM_L16,YMM_L16,MEMORY|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35805, 191},
+    {I_VMASKMOVPD, 3, {MEMORY|BITS128,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+35812, 191},
+    {I_VMASKMOVPD, 3, {MEMORY|BITS256,YMM_L16,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+35819, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMAXPD = {
+    {I_VMAXPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35826, 191},
+    {I_VMAXPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35833, 191},
+    {I_VMAXPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35840, 191},
+    {I_VMAXPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35847, 191},
+    {I_VMAXPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19248, 246},
+    {I_VMAXPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19256, 246},
+    {I_VMAXPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19264, 246},
+    {I_VMAXPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19272, 246},
+    {I_VMAXPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|SAE,0,0}, nasm_bytecodes+19280, 247},
+    {I_VMAXPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+19288, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMAXPS = {
+    {I_VMAXPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35854, 191},
+    {I_VMAXPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35861, 191},
+    {I_VMAXPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35868, 191},
+    {I_VMAXPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35875, 191},
+    {I_VMAXPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19296, 246},
+    {I_VMAXPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19304, 246},
+    {I_VMAXPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19312, 246},
+    {I_VMAXPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19320, 246},
+    {I_VMAXPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|SAE,0,0}, nasm_bytecodes+19328, 247},
+    {I_VMAXPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+19336, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMAXSD = {
+    {I_VMAXSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+35882, 191},
+    {I_VMAXSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35889, 191},
+    {I_VMAXSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+19344, 247},
+    {I_VMAXSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+19352, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMAXSS = {
+    {I_VMAXSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+35896, 191},
+    {I_VMAXSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35903, 191},
+    {I_VMAXSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+19360, 247},
+    {I_VMAXSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+19368, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMINPD = {
+    {I_VMINPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35910, 191},
+    {I_VMINPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35917, 191},
+    {I_VMINPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35924, 191},
+    {I_VMINPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35931, 191},
+    {I_VMINPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19376, 246},
+    {I_VMINPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19384, 246},
+    {I_VMINPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19392, 246},
+    {I_VMINPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19400, 246},
+    {I_VMINPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|SAE,0,0}, nasm_bytecodes+19408, 247},
+    {I_VMINPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+19416, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMINPS = {
+    {I_VMINPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35938, 191},
+    {I_VMINPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35945, 191},
+    {I_VMINPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35952, 191},
+    {I_VMINPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35959, 191},
+    {I_VMINPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19424, 246},
+    {I_VMINPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19432, 246},
+    {I_VMINPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19440, 246},
+    {I_VMINPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19448, 246},
+    {I_VMINPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|SAE,0,0}, nasm_bytecodes+19456, 247},
+    {I_VMINPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+19464, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMINSD = {
+    {I_VMINSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+35966, 191},
+    {I_VMINSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35973, 191},
+    {I_VMINSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+19472, 247},
+    {I_VMINSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+19480, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMINSS = {
+    {I_VMINSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+35980, 191},
+    {I_VMINSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35987, 191},
+    {I_VMINSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+19488, 247},
+    {I_VMINSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+19496, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVAPD = {
+    {I_VMOVAPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35994, 191},
+    {I_VMOVAPD, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36001, 191},
+    {I_VMOVAPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36008, 191},
+    {I_VMOVAPD, 2, {RM_YMM_L16|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36015, 191},
+    {I_VMOVAPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19504, 246},
+    {I_VMOVAPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19512, 246},
+    {I_VMOVAPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19520, 247},
+    {I_VMOVAPD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19528, 246},
+    {I_VMOVAPD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19536, 246},
+    {I_VMOVAPD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19544, 247},
+    {I_VMOVAPD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19552, 246},
+    {I_VMOVAPD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19560, 246},
+    {I_VMOVAPD, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19568, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVAPS = {
+    {I_VMOVAPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36022, 191},
+    {I_VMOVAPS, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36029, 191},
+    {I_VMOVAPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36036, 191},
+    {I_VMOVAPS, 2, {RM_YMM_L16|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36043, 191},
+    {I_VMOVAPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19576, 246},
+    {I_VMOVAPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19584, 246},
+    {I_VMOVAPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19592, 247},
+    {I_VMOVAPS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19600, 246},
+    {I_VMOVAPS, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19608, 246},
+    {I_VMOVAPS, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19616, 247},
+    {I_VMOVAPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19624, 246},
+    {I_VMOVAPS, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19632, 246},
+    {I_VMOVAPS, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19640, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVD = {
+    {I_VMOVD, 2, {XMM_L16,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+36050, 191},
+    {I_VMOVD, 2, {RM_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36057, 191},
+    {I_VMOVD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+19648, 247},
+    {I_VMOVD, 2, {RM_GPR|BITS32,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+19656, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVQ = {
+    {I_VMOVQ, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36064, 200},
+    {I_VMOVQ, 2, {RM_XMM_L16|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36071, 200},
+    {I_VMOVQ, 2, {XMM_L16,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36078, 199},
+    {I_VMOVQ, 2, {RM_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36085, 199},
+    {I_VMOVQ, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+20200, 247},
+    {I_VMOVQ, 2, {RM_GPR|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20208, 247},
+    {I_VMOVQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+20216, 247},
+    {I_VMOVQ, 2, {RM_XMM|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20224, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVDDUP = {
+    {I_VMOVDDUP, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36092, 191},
+    {I_VMOVDDUP, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36099, 191},
+    {I_VMOVDDUP, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19664, 246},
+    {I_VMOVDDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19672, 246},
+    {I_VMOVDDUP, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19680, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVDQA = {
+    {I_VMOVDQA, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36106, 191},
+    {I_VMOVDQA, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36113, 191},
+    {I_VMOVDQA, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36120, 191},
+    {I_VMOVDQA, 2, {RM_YMM_L16|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36127, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVQQA = {
+    {I_VMOVQQA, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36120, 191},
+    {I_VMOVQQA, 2, {RM_YMM_L16|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36127, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVDQU = {
+    {I_VMOVDQU, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36134, 191},
+    {I_VMOVDQU, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36141, 191},
+    {I_VMOVDQU, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36148, 191},
+    {I_VMOVDQU, 2, {RM_YMM_L16|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36155, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVQQU = {
+    {I_VMOVQQU, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36148, 191},
+    {I_VMOVQQU, 2, {RM_YMM_L16|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36155, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVHLPS = {
+    {I_VMOVHLPS, 3, {XMM_L16,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+36162, 191},
+    {I_VMOVHLPS, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36169, 191},
+    {I_VMOVHLPS, 3, {XMMREG,XMMREG,XMMREG,0,0}, NO_DECORATOR, nasm_bytecodes+19976, 247},
+    {I_VMOVHLPS, 2, {XMMREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+19984, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVHPD = {
+    {I_VMOVHPD, 3, {XMM_L16,XMM_L16,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+36176, 191},
+    {I_VMOVHPD, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36183, 191},
+    {I_VMOVHPD, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36190, 191},
+    {I_VMOVHPD, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+19992, 247},
+    {I_VMOVHPD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+20000, 247},
+    {I_VMOVHPD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20008, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVHPS = {
+    {I_VMOVHPS, 3, {XMM_L16,XMM_L16,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+36197, 191},
+    {I_VMOVHPS, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36204, 191},
+    {I_VMOVHPS, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36211, 191},
+    {I_VMOVHPS, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+20016, 247},
+    {I_VMOVHPS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+20024, 247},
+    {I_VMOVHPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20032, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVLHPS = {
+    {I_VMOVLHPS, 3, {XMM_L16,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+36197, 191},
+    {I_VMOVLHPS, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36204, 191},
+    {I_VMOVLHPS, 3, {XMMREG,XMMREG,XMMREG,0,0}, NO_DECORATOR, nasm_bytecodes+20040, 247},
+    {I_VMOVLHPS, 2, {XMMREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20048, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVLPD = {
+    {I_VMOVLPD, 3, {XMM_L16,XMM_L16,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+36218, 191},
+    {I_VMOVLPD, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36225, 191},
+    {I_VMOVLPD, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36232, 191},
+    {I_VMOVLPD, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+20056, 247},
+    {I_VMOVLPD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+20064, 247},
+    {I_VMOVLPD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20072, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVLPS = {
+    {I_VMOVLPS, 3, {XMM_L16,XMM_L16,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+36162, 191},
+    {I_VMOVLPS, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36169, 191},
+    {I_VMOVLPS, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36239, 191},
+    {I_VMOVLPS, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+20080, 247},
+    {I_VMOVLPS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+20088, 247},
+    {I_VMOVLPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20096, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVMSKPD = {
+    {I_VMOVMSKPD, 2, {REG_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36246, 197},
+    {I_VMOVMSKPD, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36246, 191},
+    {I_VMOVMSKPD, 2, {REG_GPR|BITS64,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36253, 197},
+    {I_VMOVMSKPD, 2, {REG_GPR|BITS32,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36253, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVMSKPS = {
+    {I_VMOVMSKPS, 2, {REG_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36260, 197},
+    {I_VMOVMSKPS, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36260, 191},
+    {I_VMOVMSKPS, 2, {REG_GPR|BITS64,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36267, 197},
+    {I_VMOVMSKPS, 2, {REG_GPR|BITS32,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36267, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVNTDQ = {
+    {I_VMOVNTDQ, 2, {MEMORY|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36274, 191},
+    {I_VMOVNTDQ, 2, {MEMORY|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36281, 191},
+    {I_VMOVNTDQ, 2, {MEMORY|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20104, 246},
+    {I_VMOVNTDQ, 2, {MEMORY|BITS256,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20112, 246},
+    {I_VMOVNTDQ, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20120, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVNTQQ = {
+    {I_VMOVNTQQ, 2, {MEMORY|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36281, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVNTDQA = {
+    {I_VMOVNTDQA, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36288, 191},
+    {I_VMOVNTDQA, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41041, 210},
+    {I_VMOVNTDQA, 2, {XMMREG,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+20128, 246},
+    {I_VMOVNTDQA, 2, {YMMREG,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+20136, 246},
+    {I_VMOVNTDQA, 2, {ZMMREG,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+20144, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVNTPD = {
+    {I_VMOVNTPD, 2, {MEMORY|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36295, 191},
+    {I_VMOVNTPD, 2, {MEMORY|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36302, 191},
+    {I_VMOVNTPD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20152, 246},
+    {I_VMOVNTPD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20160, 246},
+    {I_VMOVNTPD, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20168, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVNTPS = {
+    {I_VMOVNTPS, 2, {MEMORY|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36309, 191},
+    {I_VMOVNTPS, 2, {MEMORY|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36316, 191},
+    {I_VMOVNTPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20176, 246},
+    {I_VMOVNTPS, 2, {MEMORY|BITS256,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20184, 246},
+    {I_VMOVNTPS, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20192, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVSD = {
+    {I_VMOVSD, 3, {XMM_L16,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+36323, 191},
+    {I_VMOVSD, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36330, 191},
+    {I_VMOVSD, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36337, 191},
+    {I_VMOVSD, 3, {XMM_L16,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+36344, 191},
+    {I_VMOVSD, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36351, 191},
+    {I_VMOVSD, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36358, 191},
+    {I_VMOVSD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20232, 247},
+    {I_VMOVSD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20240, 247},
+    {I_VMOVSD, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20248, 247},
+    {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20256, 247},
+    {I_VMOVSD, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20264, 247},
+    {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20272, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVSHDUP = {
+    {I_VMOVSHDUP, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36365, 191},
+    {I_VMOVSHDUP, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36372, 191},
+    {I_VMOVSHDUP, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20280, 246},
+    {I_VMOVSHDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20288, 246},
+    {I_VMOVSHDUP, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20296, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVSLDUP = {
+    {I_VMOVSLDUP, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36379, 191},
+    {I_VMOVSLDUP, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36386, 191},
+    {I_VMOVSLDUP, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20304, 246},
+    {I_VMOVSLDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20312, 246},
+    {I_VMOVSLDUP, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20320, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVSS = {
+    {I_VMOVSS, 3, {XMM_L16,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+36393, 191},
+    {I_VMOVSS, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36400, 191},
+    {I_VMOVSS, 2, {XMM_L16,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+36407, 191},
+    {I_VMOVSS, 3, {XMM_L16,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+36414, 191},
+    {I_VMOVSS, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36421, 191},
+    {I_VMOVSS, 2, {MEMORY|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36428, 191},
+    {I_VMOVSS, 2, {XMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20328, 247},
+    {I_VMOVSS, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20336, 247},
+    {I_VMOVSS, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20344, 247},
+    {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20352, 247},
+    {I_VMOVSS, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20360, 247},
+    {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20368, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVUPD = {
+    {I_VMOVUPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36435, 191},
+    {I_VMOVUPD, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36442, 191},
+    {I_VMOVUPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36449, 191},
+    {I_VMOVUPD, 2, {RM_YMM_L16|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36456, 191},
+    {I_VMOVUPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20376, 246},
+    {I_VMOVUPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20384, 246},
+    {I_VMOVUPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20392, 247},
+    {I_VMOVUPD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20400, 246},
+    {I_VMOVUPD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20408, 246},
+    {I_VMOVUPD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20416, 247},
+    {I_VMOVUPD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20424, 246},
+    {I_VMOVUPD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20432, 246},
+    {I_VMOVUPD, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20440, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVUPS = {
+    {I_VMOVUPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36463, 191},
+    {I_VMOVUPS, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36470, 191},
+    {I_VMOVUPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36477, 191},
+    {I_VMOVUPS, 2, {RM_YMM_L16|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36484, 191},
+    {I_VMOVUPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20448, 246},
+    {I_VMOVUPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20456, 246},
+    {I_VMOVUPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20464, 247},
+    {I_VMOVUPS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20472, 246},
+    {I_VMOVUPS, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20480, 246},
+    {I_VMOVUPS, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20488, 247},
+    {I_VMOVUPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20496, 246},
+    {I_VMOVUPS, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20504, 246},
+    {I_VMOVUPS, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20512, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMPSADBW = {
+    {I_VMPSADBW, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13624, 191},
+    {I_VMPSADBW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13632, 191},
+    {I_VMPSADBW, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15808, 210},
+    {I_VMPSADBW, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15816, 210},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMULPD = {
+    {I_VMULPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36491, 191},
+    {I_VMULPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36498, 191},
+    {I_VMULPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+36505, 191},
+    {I_VMULPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36512, 191},
+    {I_VMULPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+20520, 246},
+    {I_VMULPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20528, 246},
+    {I_VMULPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+20536, 246},
+    {I_VMULPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20544, 246},
+    {I_VMULPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+20552, 247},
+    {I_VMULPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+20560, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMULPS = {
+    {I_VMULPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36519, 191},
+    {I_VMULPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36526, 191},
+    {I_VMULPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+36533, 191},
+    {I_VMULPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36540, 191},
+    {I_VMULPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20568, 246},
+    {I_VMULPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20576, 246},
+    {I_VMULPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20584, 246},
+    {I_VMULPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20592, 246},
+    {I_VMULPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+20600, 247},
+    {I_VMULPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+20608, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMULSD = {
+    {I_VMULSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+36547, 191},
+    {I_VMULSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36554, 191},
+    {I_VMULSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+20616, 247},
+    {I_VMULSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+20624, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMULSS = {
+    {I_VMULSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+36561, 191},
+    {I_VMULSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+36568, 191},
+    {I_VMULSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+20632, 247},
+    {I_VMULSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+20640, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VORPD = {
+    {I_VORPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36575, 191},
+    {I_VORPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36582, 191},
+    {I_VORPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+36589, 191},
+    {I_VORPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36596, 191},
+    {I_VORPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+20648, 248},
+    {I_VORPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20656, 248},
+    {I_VORPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+20664, 248},
+    {I_VORPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20672, 248},
+    {I_VORPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+20680, 249},
+    {I_VORPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20688, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VORPS = {
+    {I_VORPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36603, 191},
+    {I_VORPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36610, 191},
+    {I_VORPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+36617, 191},
+    {I_VORPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36624, 191},
+    {I_VORPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20696, 248},
+    {I_VORPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20704, 248},
+    {I_VORPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20712, 248},
+    {I_VORPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20720, 248},
+    {I_VORPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20728, 249},
+    {I_VORPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20736, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPABSB = {
+    {I_VPABSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36631, 191},
+    {I_VPABSB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39781, 210},
+    {I_VPABSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20744, 250},
+    {I_VPABSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20752, 250},
+    {I_VPABSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20760, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPABSW = {
+    {I_VPABSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36638, 191},
+    {I_VPABSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39788, 210},
+    {I_VPABSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20816, 250},
+    {I_VPABSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20824, 250},
+    {I_VPABSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20832, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPABSD = {
+    {I_VPABSD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36645, 191},
+    {I_VPABSD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39795, 210},
+    {I_VPABSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20768, 246},
+    {I_VPABSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20776, 246},
+    {I_VPABSD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20784, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPACKSSWB = {
+    {I_VPACKSSWB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36652, 191},
+    {I_VPACKSSWB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36659, 191},
+    {I_VPACKSSWB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39802, 210},
+    {I_VPACKSSWB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39809, 210},
+    {I_VPACKSSWB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20888, 250},
+    {I_VPACKSSWB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20896, 250},
+    {I_VPACKSSWB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20904, 250},
+    {I_VPACKSSWB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20912, 250},
+    {I_VPACKSSWB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20920, 251},
+    {I_VPACKSSWB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20928, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPACKSSDW = {
+    {I_VPACKSSDW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36666, 191},
+    {I_VPACKSSDW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36673, 191},
+    {I_VPACKSSDW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39816, 210},
+    {I_VPACKSSDW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39823, 210},
+    {I_VPACKSSDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20840, 250},
+    {I_VPACKSSDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20848, 250},
+    {I_VPACKSSDW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20856, 250},
+    {I_VPACKSSDW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20864, 250},
+    {I_VPACKSSDW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20872, 251},
+    {I_VPACKSSDW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20880, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPACKUSWB = {
+    {I_VPACKUSWB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36680, 191},
+    {I_VPACKUSWB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36687, 191},
+    {I_VPACKUSWB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39844, 210},
+    {I_VPACKUSWB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39851, 210},
+    {I_VPACKUSWB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20984, 250},
+    {I_VPACKUSWB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20992, 250},
+    {I_VPACKUSWB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21000, 250},
+    {I_VPACKUSWB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21008, 250},
+    {I_VPACKUSWB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21016, 251},
+    {I_VPACKUSWB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21024, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPACKUSDW = {
+    {I_VPACKUSDW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36694, 191},
+    {I_VPACKUSDW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36701, 191},
+    {I_VPACKUSDW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39830, 210},
+    {I_VPACKUSDW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39837, 210},
+    {I_VPACKUSDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20936, 250},
+    {I_VPACKUSDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20944, 250},
+    {I_VPACKUSDW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20952, 250},
+    {I_VPACKUSDW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20960, 250},
+    {I_VPACKUSDW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20968, 251},
+    {I_VPACKUSDW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20976, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPADDB = {
+    {I_VPADDB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36708, 191},
+    {I_VPADDB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36715, 191},
+    {I_VPADDB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39858, 210},
+    {I_VPADDB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39865, 210},
+    {I_VPADDB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21032, 250},
+    {I_VPADDB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21040, 250},
+    {I_VPADDB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21048, 250},
+    {I_VPADDB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21056, 250},
+    {I_VPADDB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21064, 251},
+    {I_VPADDB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21072, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPADDW = {
+    {I_VPADDW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36722, 191},
+    {I_VPADDW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36729, 191},
+    {I_VPADDW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39872, 210},
+    {I_VPADDW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39879, 210},
+    {I_VPADDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21368, 250},
+    {I_VPADDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21376, 250},
+    {I_VPADDW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21384, 250},
+    {I_VPADDW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21392, 250},
+    {I_VPADDW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21400, 251},
+    {I_VPADDW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21408, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPADDD = {
+    {I_VPADDD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36736, 191},
+    {I_VPADDD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36743, 191},
+    {I_VPADDD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39886, 210},
+    {I_VPADDD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39893, 210},
+    {I_VPADDD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21080, 246},
+    {I_VPADDD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21088, 246},
+    {I_VPADDD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21096, 246},
+    {I_VPADDD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21104, 246},
+    {I_VPADDD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21112, 247},
+    {I_VPADDD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21120, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPADDQ = {
+    {I_VPADDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36750, 191},
+    {I_VPADDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36757, 191},
+    {I_VPADDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39900, 210},
+    {I_VPADDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39907, 210},
+    {I_VPADDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21128, 246},
+    {I_VPADDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21136, 246},
+    {I_VPADDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21144, 246},
+    {I_VPADDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21152, 246},
+    {I_VPADDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21160, 247},
+    {I_VPADDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21168, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPADDSB = {
+    {I_VPADDSB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36764, 191},
+    {I_VPADDSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36771, 191},
+    {I_VPADDSB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39914, 210},
+    {I_VPADDSB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39921, 210},
+    {I_VPADDSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21176, 250},
+    {I_VPADDSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21184, 250},
+    {I_VPADDSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21192, 250},
+    {I_VPADDSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21200, 250},
+    {I_VPADDSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21208, 251},
+    {I_VPADDSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21216, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPADDSW = {
+    {I_VPADDSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36778, 191},
+    {I_VPADDSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36785, 191},
+    {I_VPADDSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39928, 210},
+    {I_VPADDSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39935, 210},
+    {I_VPADDSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21224, 250},
+    {I_VPADDSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21232, 250},
+    {I_VPADDSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21240, 250},
+    {I_VPADDSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21248, 250},
+    {I_VPADDSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21256, 251},
+    {I_VPADDSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21264, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPADDUSB = {
+    {I_VPADDUSB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36792, 191},
+    {I_VPADDUSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36799, 191},
+    {I_VPADDUSB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39942, 210},
+    {I_VPADDUSB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39949, 210},
+    {I_VPADDUSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21272, 250},
+    {I_VPADDUSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21280, 250},
+    {I_VPADDUSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21288, 250},
+    {I_VPADDUSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21296, 250},
+    {I_VPADDUSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21304, 251},
+    {I_VPADDUSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21312, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPADDUSW = {
+    {I_VPADDUSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36806, 191},
+    {I_VPADDUSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36813, 191},
+    {I_VPADDUSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39956, 210},
+    {I_VPADDUSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39963, 210},
+    {I_VPADDUSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21320, 250},
+    {I_VPADDUSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21328, 250},
+    {I_VPADDUSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21336, 250},
+    {I_VPADDUSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21344, 250},
+    {I_VPADDUSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21352, 251},
+    {I_VPADDUSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21360, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPALIGNR = {
+    {I_VPALIGNR, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13640, 191},
+    {I_VPALIGNR, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13648, 191},
+    {I_VPALIGNR, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15824, 210},
+    {I_VPALIGNR, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15832, 210},
+    {I_VPALIGNR, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9190, 250},
+    {I_VPALIGNR, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9199, 250},
+    {I_VPALIGNR, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9208, 250},
+    {I_VPALIGNR, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9217, 250},
+    {I_VPALIGNR, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9226, 251},
+    {I_VPALIGNR, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9235, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPAND = {
+    {I_VPAND, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36820, 191},
+    {I_VPAND, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36827, 191},
+    {I_VPAND, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39970, 210},
+    {I_VPAND, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39977, 210},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPANDN = {
+    {I_VPANDN, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36834, 191},
+    {I_VPANDN, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36841, 191},
+    {I_VPANDN, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39984, 210},
+    {I_VPANDN, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39991, 210},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPAVGB = {
+    {I_VPAVGB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36848, 191},
+    {I_VPAVGB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36855, 191},
+    {I_VPAVGB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39998, 210},
+    {I_VPAVGB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40005, 210},
+    {I_VPAVGB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21608, 250},
+    {I_VPAVGB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21616, 250},
+    {I_VPAVGB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21624, 250},
+    {I_VPAVGB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21632, 250},
+    {I_VPAVGB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21640, 251},
+    {I_VPAVGB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21648, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPAVGW = {
+    {I_VPAVGW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36862, 191},
+    {I_VPAVGW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36869, 191},
+    {I_VPAVGW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40012, 210},
+    {I_VPAVGW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40019, 210},
+    {I_VPAVGW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21656, 250},
+    {I_VPAVGW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21664, 250},
+    {I_VPAVGW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21672, 250},
+    {I_VPAVGW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21680, 250},
+    {I_VPAVGW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21688, 251},
+    {I_VPAVGW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21696, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPBLENDVB = {
+    {I_VPBLENDVB, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+13656, 191},
+    {I_VPBLENDVB, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+13664, 191},
+    {I_VPBLENDVB, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15840, 210},
+    {I_VPBLENDVB, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15848, 210},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPBLENDW = {
+    {I_VPBLENDW, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13672, 191},
+    {I_VPBLENDW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13680, 191},
+    {I_VPBLENDW, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15856, 210},
+    {I_VPBLENDW, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15864, 210},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPESTRI = {
+    {I_VPCMPESTRI, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13688, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPESTRM = {
+    {I_VPCMPESTRM, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13696, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPISTRI = {
+    {I_VPCMPISTRI, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13704, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPISTRM = {
+    {I_VPCMPISTRM, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13712, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPEQB = {
+    {I_VPCMPEQB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36876, 191},
+    {I_VPCMPEQB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36883, 191},
+    {I_VPCMPEQB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40026, 210},
+    {I_VPCMPEQB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40033, 210},
+    {I_VPCMPEQB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22088, 250},
+    {I_VPCMPEQB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22096, 250},
+    {I_VPCMPEQB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22104, 251},
+    {I_VPCMPEQB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+2800, 250},
+    {I_VPCMPEQB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+2810, 250},
+    {I_VPCMPEQB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+2820, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPEQW = {
+    {I_VPCMPEQW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36890, 191},
+    {I_VPCMPEQW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36897, 191},
+    {I_VPCMPEQW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40040, 210},
+    {I_VPCMPEQW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40047, 210},
+    {I_VPCMPEQW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22160, 250},
+    {I_VPCMPEQW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22168, 250},
+    {I_VPCMPEQW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22176, 251},
+    {I_VPCMPEQW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3010, 250},
+    {I_VPCMPEQW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3020, 250},
+    {I_VPCMPEQW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3030, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPEQD = {
+    {I_VPCMPEQD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36904, 191},
+    {I_VPCMPEQD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36911, 191},
+    {I_VPCMPEQD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40054, 210},
+    {I_VPCMPEQD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40061, 210},
+    {I_VPCMPEQD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+22112, 246},
+    {I_VPCMPEQD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+22120, 246},
+    {I_VPCMPEQD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+22128, 247},
+    {I_VPCMPEQD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2830, 246},
+    {I_VPCMPEQD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2840, 246},
+    {I_VPCMPEQD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2850, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPEQQ = {
+    {I_VPCMPEQQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36918, 191},
+    {I_VPCMPEQQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36925, 191},
+    {I_VPCMPEQQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40068, 210},
+    {I_VPCMPEQQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40075, 210},
+    {I_VPCMPEQQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+22136, 246},
+    {I_VPCMPEQQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+22144, 246},
+    {I_VPCMPEQQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+22152, 247},
+    {I_VPCMPEQQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2860, 246},
+    {I_VPCMPEQQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2870, 246},
+    {I_VPCMPEQQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2880, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPGTB = {
+    {I_VPCMPGTB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36932, 191},
+    {I_VPCMPGTB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36939, 191},
+    {I_VPCMPGTB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40082, 210},
+    {I_VPCMPGTB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40089, 210},
+    {I_VPCMPGTB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22184, 250},
+    {I_VPCMPGTB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22192, 250},
+    {I_VPCMPGTB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22200, 251},
+    {I_VPCMPGTB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3280, 250},
+    {I_VPCMPGTB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3290, 250},
+    {I_VPCMPGTB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3300, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPGTW = {
+    {I_VPCMPGTW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36946, 191},
+    {I_VPCMPGTW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36953, 191},
+    {I_VPCMPGTW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40096, 210},
+    {I_VPCMPGTW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40103, 210},
+    {I_VPCMPGTW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22256, 250},
+    {I_VPCMPGTW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22264, 250},
+    {I_VPCMPGTW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22272, 251},
+    {I_VPCMPGTW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3490, 250},
+    {I_VPCMPGTW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3500, 250},
+    {I_VPCMPGTW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3510, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPGTD = {
+    {I_VPCMPGTD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36960, 191},
+    {I_VPCMPGTD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36967, 191},
+    {I_VPCMPGTD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40110, 210},
+    {I_VPCMPGTD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40117, 210},
+    {I_VPCMPGTD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+22208, 246},
+    {I_VPCMPGTD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+22216, 246},
+    {I_VPCMPGTD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+22224, 247},
+    {I_VPCMPGTD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3310, 246},
+    {I_VPCMPGTD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3320, 246},
+    {I_VPCMPGTD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3330, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPGTQ = {
+    {I_VPCMPGTQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36974, 191},
+    {I_VPCMPGTQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36981, 191},
+    {I_VPCMPGTQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40124, 210},
+    {I_VPCMPGTQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40131, 210},
+    {I_VPCMPGTQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+22232, 246},
+    {I_VPCMPGTQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+22240, 246},
+    {I_VPCMPGTQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+22248, 247},
+    {I_VPCMPGTQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3340, 246},
+    {I_VPCMPGTQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3350, 246},
+    {I_VPCMPGTQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3360, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERMILPD = {
+    {I_VPERMILPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36988, 191},
+    {I_VPERMILPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36995, 191},
+    {I_VPERMILPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+37002, 191},
+    {I_VPERMILPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+37009, 191},
+    {I_VPERMILPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13720, 191},
+    {I_VPERMILPD, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13728, 191},
+    {I_VPERMILPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9460, 246},
+    {I_VPERMILPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9469, 246},
+    {I_VPERMILPD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9478, 247},
+    {I_VPERMILPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22648, 246},
+    {I_VPERMILPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22656, 246},
+    {I_VPERMILPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22664, 246},
+    {I_VPERMILPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22672, 246},
+    {I_VPERMILPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22680, 247},
+    {I_VPERMILPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22688, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERMILPS = {
+    {I_VPERMILPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37016, 191},
+    {I_VPERMILPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37023, 191},
+    {I_VPERMILPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+37030, 191},
+    {I_VPERMILPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+37037, 191},
+    {I_VPERMILPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13736, 191},
+    {I_VPERMILPS, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13744, 191},
+    {I_VPERMILPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9487, 246},
+    {I_VPERMILPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9496, 246},
+    {I_VPERMILPS, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9505, 247},
+    {I_VPERMILPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22696, 246},
+    {I_VPERMILPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22704, 246},
+    {I_VPERMILPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22712, 246},
+    {I_VPERMILPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22720, 246},
+    {I_VPERMILPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22728, 247},
+    {I_VPERMILPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22736, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERM2F128 = {
+    {I_VPERM2F128, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13752, 191},
+    {I_VPERM2F128, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13760, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPEXTRB = {
+    {I_VPEXTRB, 3, {REG_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13768, 197},
+    {I_VPEXTRB, 3, {REG_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13768, 191},
+    {I_VPEXTRB, 3, {MEMORY|BITS8,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13768, 191},
+    {I_VPEXTRB, 3, {REG_GPR|BITS8,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9550, 251},
+    {I_VPEXTRB, 3, {REG_GPR|BITS16,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9550, 251},
+    {I_VPEXTRB, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9550, 251},
+    {I_VPEXTRB, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9550, 251},
+    {I_VPEXTRB, 3, {MEMORY|BITS8,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9550, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPEXTRW = {
+    {I_VPEXTRW, 3, {REG_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13776, 197},
+    {I_VPEXTRW, 3, {REG_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13776, 191},
+    {I_VPEXTRW, 3, {REG_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13784, 197},
+    {I_VPEXTRW, 3, {REG_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13784, 191},
+    {I_VPEXTRW, 3, {MEMORY|BITS16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13784, 191},
+    {I_VPEXTRW, 3, {REG_GPR|BITS16,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9577, 251},
+    {I_VPEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9577, 251},
+    {I_VPEXTRW, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9577, 251},
+    {I_VPEXTRW, 3, {MEMORY|BITS16,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9577, 251},
+    {I_VPEXTRW, 3, {REG_GPR|BITS16,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9586, 251},
+    {I_VPEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9586, 251},
+    {I_VPEXTRW, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9586, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPEXTRD = {
+    {I_VPEXTRD, 3, {REG_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13792, 197},
+    {I_VPEXTRD, 3, {RM_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13792, 191},
+    {I_VPEXTRD, 3, {RM_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9559, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPEXTRQ = {
+    {I_VPEXTRQ, 3, {RM_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13800, 197},
+    {I_VPEXTRQ, 3, {RM_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9568, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPHADDW = {
+    {I_VPHADDW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37044, 191},
+    {I_VPHADDW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37051, 191},
+    {I_VPHADDW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40138, 210},
+    {I_VPHADDW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40145, 210},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPHADDD = {
+    {I_VPHADDD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37058, 191},
+    {I_VPHADDD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37065, 191},
+    {I_VPHADDD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40152, 210},
+    {I_VPHADDD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40159, 210},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPHADDSW = {
+    {I_VPHADDSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37072, 191},
+    {I_VPHADDSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37079, 191},
+    {I_VPHADDSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40166, 210},
+    {I_VPHADDSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40173, 210},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPHMINPOSUW = {
+    {I_VPHMINPOSUW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37086, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPHSUBW = {
+    {I_VPHSUBW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37093, 191},
+    {I_VPHSUBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37100, 191},
+    {I_VPHSUBW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40180, 210},
+    {I_VPHSUBW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40187, 210},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPHSUBD = {
+    {I_VPHSUBD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37107, 191},
+    {I_VPHSUBD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37114, 191},
+    {I_VPHSUBD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40194, 210},
+    {I_VPHSUBD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40201, 210},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPHSUBSW = {
+    {I_VPHSUBSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37121, 191},
+    {I_VPHSUBSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37128, 191},
+    {I_VPHSUBSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40208, 210},
+    {I_VPHSUBSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40215, 210},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPINSRB = {
+    {I_VPINSRB, 4, {XMM_L16,XMM_L16,MEMORY|BITS8,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13808, 191},
+    {I_VPINSRB, 3, {XMM_L16,MEMORY|BITS8,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13816, 191},
+    {I_VPINSRB, 4, {XMM_L16,XMM_L16,RM_GPR|BITS8,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13808, 191},
+    {I_VPINSRB, 3, {XMM_L16,RM_GPR|BITS8,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13816, 191},
+    {I_VPINSRB, 4, {XMM_L16,XMM_L16,REG_GPR|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13808, 191},
+    {I_VPINSRB, 3, {XMM_L16,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13816, 191},
+    {I_VPINSRB, 4, {XMMREG,XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+9703, 251},
+    {I_VPINSRB, 3, {XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9712, 251},
+    {I_VPINSRB, 4, {XMMREG,XMMREG,MEMORY|BITS8,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+9703, 251},
+    {I_VPINSRB, 3, {XMMREG,MEMORY|BITS8,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9712, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPINSRW = {
+    {I_VPINSRW, 4, {XMM_L16,XMM_L16,MEMORY|BITS16,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13824, 191},
+    {I_VPINSRW, 3, {XMM_L16,MEMORY|BITS16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13832, 191},
+    {I_VPINSRW, 4, {XMM_L16,XMM_L16,RM_GPR|BITS16,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13824, 191},
+    {I_VPINSRW, 3, {XMM_L16,RM_GPR|BITS16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13832, 191},
+    {I_VPINSRW, 4, {XMM_L16,XMM_L16,REG_GPR|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13824, 191},
+    {I_VPINSRW, 3, {XMM_L16,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13832, 191},
+    {I_VPINSRW, 4, {XMMREG,XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+9757, 251},
+    {I_VPINSRW, 3, {XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9766, 251},
+    {I_VPINSRW, 4, {XMMREG,XMMREG,MEMORY|BITS16,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+9757, 251},
+    {I_VPINSRW, 3, {XMMREG,MEMORY|BITS16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9766, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPINSRD = {
+    {I_VPINSRD, 4, {XMM_L16,XMM_L16,MEMORY|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13840, 191},
+    {I_VPINSRD, 3, {XMM_L16,MEMORY|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13848, 191},
+    {I_VPINSRD, 4, {XMM_L16,XMM_L16,RM_GPR|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13840, 191},
+    {I_VPINSRD, 3, {XMM_L16,RM_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13848, 191},
+    {I_VPINSRD, 4, {XMMREG,XMMREG,RM_GPR|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+9721, 249},
+    {I_VPINSRD, 3, {XMMREG,RM_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9730, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPINSRQ = {
+    {I_VPINSRQ, 4, {XMM_L16,XMM_L16,MEMORY|BITS64,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13856, 197},
+    {I_VPINSRQ, 3, {XMM_L16,MEMORY|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13864, 197},
+    {I_VPINSRQ, 4, {XMM_L16,XMM_L16,RM_GPR|BITS64,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13856, 197},
+    {I_VPINSRQ, 3, {XMM_L16,RM_GPR|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13864, 197},
+    {I_VPINSRQ, 4, {XMMREG,XMMREG,RM_GPR|BITS64,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+9739, 249},
+    {I_VPINSRQ, 3, {XMMREG,RM_GPR|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9748, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMADDWD = {
+    {I_VPMADDWD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37135, 191},
+    {I_VPMADDWD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37142, 191},
+    {I_VPMADDWD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40236, 210},
+    {I_VPMADDWD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40243, 210},
+    {I_VPMADDWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23224, 250},
+    {I_VPMADDWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23232, 250},
+    {I_VPMADDWD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23240, 250},
+    {I_VPMADDWD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23248, 250},
+    {I_VPMADDWD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23256, 251},
+    {I_VPMADDWD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23264, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMADDUBSW = {
+    {I_VPMADDUBSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37149, 191},
+    {I_VPMADDUBSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37156, 191},
+    {I_VPMADDUBSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40222, 210},
+    {I_VPMADDUBSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40229, 210},
+    {I_VPMADDUBSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23176, 250},
+    {I_VPMADDUBSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23184, 250},
+    {I_VPMADDUBSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23192, 250},
+    {I_VPMADDUBSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23200, 250},
+    {I_VPMADDUBSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23208, 251},
+    {I_VPMADDUBSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23216, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMAXSB = {
+    {I_VPMAXSB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37163, 191},
+    {I_VPMAXSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37170, 191},
+    {I_VPMAXSB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40250, 210},
+    {I_VPMAXSB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40257, 210},
+    {I_VPMAXSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23272, 250},
+    {I_VPMAXSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23280, 250},
+    {I_VPMAXSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23288, 250},
+    {I_VPMAXSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23296, 250},
+    {I_VPMAXSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23304, 251},
+    {I_VPMAXSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23312, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMAXSW = {
+    {I_VPMAXSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37177, 191},
+    {I_VPMAXSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37184, 191},
+    {I_VPMAXSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40264, 210},
+    {I_VPMAXSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40271, 210},
+    {I_VPMAXSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23416, 250},
+    {I_VPMAXSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23424, 250},
+    {I_VPMAXSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23432, 250},
+    {I_VPMAXSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23440, 250},
+    {I_VPMAXSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23448, 251},
+    {I_VPMAXSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23456, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMAXSD = {
+    {I_VPMAXSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37191, 191},
+    {I_VPMAXSD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37198, 191},
+    {I_VPMAXSD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40278, 210},
+    {I_VPMAXSD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40285, 210},
+    {I_VPMAXSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23320, 246},
+    {I_VPMAXSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23328, 246},
+    {I_VPMAXSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23336, 246},
+    {I_VPMAXSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23344, 246},
+    {I_VPMAXSD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23352, 247},
+    {I_VPMAXSD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23360, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMAXUB = {
+    {I_VPMAXUB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37205, 191},
+    {I_VPMAXUB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37212, 191},
+    {I_VPMAXUB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40292, 210},
+    {I_VPMAXUB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40299, 210},
+    {I_VPMAXUB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23464, 250},
+    {I_VPMAXUB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23472, 250},
+    {I_VPMAXUB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23480, 250},
+    {I_VPMAXUB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23488, 250},
+    {I_VPMAXUB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23496, 251},
+    {I_VPMAXUB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23504, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMAXUW = {
+    {I_VPMAXUW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37219, 191},
+    {I_VPMAXUW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37226, 191},
+    {I_VPMAXUW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40306, 210},
+    {I_VPMAXUW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40313, 210},
+    {I_VPMAXUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23608, 250},
+    {I_VPMAXUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23616, 250},
+    {I_VPMAXUW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23624, 250},
+    {I_VPMAXUW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23632, 250},
+    {I_VPMAXUW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23640, 251},
+    {I_VPMAXUW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23648, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMAXUD = {
+    {I_VPMAXUD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37233, 191},
+    {I_VPMAXUD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37240, 191},
+    {I_VPMAXUD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40320, 210},
+    {I_VPMAXUD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40327, 210},
+    {I_VPMAXUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23512, 246},
+    {I_VPMAXUD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23520, 246},
+    {I_VPMAXUD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23528, 246},
+    {I_VPMAXUD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23536, 246},
+    {I_VPMAXUD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23544, 247},
+    {I_VPMAXUD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23552, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMINSB = {
+    {I_VPMINSB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37247, 191},
+    {I_VPMINSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37254, 191},
+    {I_VPMINSB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40334, 210},
+    {I_VPMINSB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40341, 210},
+    {I_VPMINSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23656, 250},
+    {I_VPMINSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23664, 250},
+    {I_VPMINSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23672, 250},
+    {I_VPMINSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23680, 250},
+    {I_VPMINSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23688, 251},
+    {I_VPMINSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23696, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMINSW = {
+    {I_VPMINSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37261, 191},
+    {I_VPMINSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37268, 191},
+    {I_VPMINSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40348, 210},
+    {I_VPMINSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40355, 210},
+    {I_VPMINSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23800, 250},
+    {I_VPMINSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23808, 250},
+    {I_VPMINSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23816, 250},
+    {I_VPMINSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23824, 250},
+    {I_VPMINSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23832, 251},
+    {I_VPMINSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23840, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMINSD = {
+    {I_VPMINSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37275, 191},
+    {I_VPMINSD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37282, 191},
+    {I_VPMINSD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40362, 210},
+    {I_VPMINSD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40369, 210},
+    {I_VPMINSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23704, 246},
+    {I_VPMINSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23712, 246},
+    {I_VPMINSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23720, 246},
+    {I_VPMINSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23728, 246},
+    {I_VPMINSD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23736, 247},
+    {I_VPMINSD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23744, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMINUB = {
+    {I_VPMINUB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37289, 191},
+    {I_VPMINUB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37296, 191},
+    {I_VPMINUB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40376, 210},
+    {I_VPMINUB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40383, 210},
+    {I_VPMINUB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23848, 250},
+    {I_VPMINUB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23856, 250},
+    {I_VPMINUB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23864, 250},
+    {I_VPMINUB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23872, 250},
+    {I_VPMINUB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23880, 251},
+    {I_VPMINUB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23888, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMINUW = {
+    {I_VPMINUW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37303, 191},
+    {I_VPMINUW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37310, 191},
+    {I_VPMINUW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40390, 210},
+    {I_VPMINUW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40397, 210},
+    {I_VPMINUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23992, 250},
+    {I_VPMINUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24000, 250},
+    {I_VPMINUW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24008, 250},
+    {I_VPMINUW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24016, 250},
+    {I_VPMINUW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24024, 251},
+    {I_VPMINUW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24032, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMINUD = {
+    {I_VPMINUD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37317, 191},
+    {I_VPMINUD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37324, 191},
+    {I_VPMINUD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40404, 210},
+    {I_VPMINUD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40411, 210},
+    {I_VPMINUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23896, 246},
+    {I_VPMINUD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23904, 246},
+    {I_VPMINUD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23912, 246},
+    {I_VPMINUD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23920, 246},
+    {I_VPMINUD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23928, 247},
+    {I_VPMINUD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23936, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVMSKB = {
+    {I_VPMOVMSKB, 2, {REG_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+37331, 197},
+    {I_VPMOVMSKB, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+37331, 191},
+    {I_VPMOVMSKB, 2, {REG_GPR|BITS32,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+40418, 210},
+    {I_VPMOVMSKB, 2, {REG_GPR|BITS64,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+40418, 210},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVSXBW = {
+    {I_VPMOVSXBW, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+37338, 191},
+    {I_VPMOVSXBW, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40425, 210},
+    {I_VPMOVSXBW, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24784, 250},
+    {I_VPMOVSXBW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24792, 250},
+    {I_VPMOVSXBW, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24800, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVSXBD = {
+    {I_VPMOVSXBD, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+37345, 191},
+    {I_VPMOVSXBD, 2, {YMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+40432, 210},
+    {I_VPMOVSXBD, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+40432, 210},
+    {I_VPMOVSXBD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24736, 246},
+    {I_VPMOVSXBD, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24744, 246},
+    {I_VPMOVSXBD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24752, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVSXBQ = {
+    {I_VPMOVSXBQ, 2, {XMM_L16,RM_XMM_L16|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+37352, 191},
+    {I_VPMOVSXBQ, 2, {YMM_L16,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+40439, 210},
+    {I_VPMOVSXBQ, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+40439, 210},
+    {I_VPMOVSXBQ, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24760, 246},
+    {I_VPMOVSXBQ, 2, {YMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24768, 246},
+    {I_VPMOVSXBQ, 2, {ZMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24776, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVSXWD = {
+    {I_VPMOVSXWD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+37359, 191},
+    {I_VPMOVSXWD, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40446, 210},
+    {I_VPMOVSXWD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24832, 246},
+    {I_VPMOVSXWD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24840, 246},
+    {I_VPMOVSXWD, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24848, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVSXWQ = {
+    {I_VPMOVSXWQ, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+37366, 191},
+    {I_VPMOVSXWQ, 2, {YMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+40453, 210},
+    {I_VPMOVSXWQ, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+40453, 210},
+    {I_VPMOVSXWQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24856, 246},
+    {I_VPMOVSXWQ, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24864, 246},
+    {I_VPMOVSXWQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24872, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVSXDQ = {
+    {I_VPMOVSXDQ, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+37373, 191},
+    {I_VPMOVSXDQ, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40460, 210},
+    {I_VPMOVSXDQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24808, 246},
+    {I_VPMOVSXDQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24816, 246},
+    {I_VPMOVSXDQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24824, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVZXBW = {
+    {I_VPMOVZXBW, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+37380, 191},
+    {I_VPMOVZXBW, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40467, 210},
+    {I_VPMOVZXBW, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25288, 250},
+    {I_VPMOVZXBW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25296, 250},
+    {I_VPMOVZXBW, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25304, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVZXBD = {
+    {I_VPMOVZXBD, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+37387, 191},
+    {I_VPMOVZXBD, 2, {YMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+40474, 210},
+    {I_VPMOVZXBD, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+40474, 210},
+    {I_VPMOVZXBD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25240, 246},
+    {I_VPMOVZXBD, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25248, 246},
+    {I_VPMOVZXBD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25256, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVZXBQ = {
+    {I_VPMOVZXBQ, 2, {XMM_L16,RM_XMM_L16|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+37394, 191},
+    {I_VPMOVZXBQ, 2, {YMM_L16,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+40481, 210},
+    {I_VPMOVZXBQ, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+40481, 210},
+    {I_VPMOVZXBQ, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25264, 246},
+    {I_VPMOVZXBQ, 2, {YMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25272, 246},
+    {I_VPMOVZXBQ, 2, {ZMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25280, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVZXWD = {
+    {I_VPMOVZXWD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+37401, 191},
+    {I_VPMOVZXWD, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40488, 210},
+    {I_VPMOVZXWD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25336, 246},
+    {I_VPMOVZXWD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25344, 246},
+    {I_VPMOVZXWD, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25352, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVZXWQ = {
+    {I_VPMOVZXWQ, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+37408, 191},
+    {I_VPMOVZXWQ, 2, {YMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+40495, 210},
+    {I_VPMOVZXWQ, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+40495, 210},
+    {I_VPMOVZXWQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25360, 246},
+    {I_VPMOVZXWQ, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25368, 246},
+    {I_VPMOVZXWQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25376, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVZXDQ = {
+    {I_VPMOVZXDQ, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+37415, 191},
+    {I_VPMOVZXDQ, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40502, 210},
+    {I_VPMOVZXDQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25312, 246},
+    {I_VPMOVZXDQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25320, 246},
+    {I_VPMOVZXDQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25328, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMULHUW = {
+    {I_VPMULHUW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37422, 191},
+    {I_VPMULHUW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37429, 191},
+    {I_VPMULHUW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40537, 210},
+    {I_VPMULHUW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40544, 210},
+    {I_VPMULHUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25480, 250},
+    {I_VPMULHUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25488, 250},
+    {I_VPMULHUW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25496, 250},
+    {I_VPMULHUW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25504, 250},
+    {I_VPMULHUW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25512, 251},
+    {I_VPMULHUW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25520, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMULHRSW = {
+    {I_VPMULHRSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37436, 191},
+    {I_VPMULHRSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37443, 191},
+    {I_VPMULHRSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40523, 210},
+    {I_VPMULHRSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40530, 210},
+    {I_VPMULHRSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25432, 250},
+    {I_VPMULHRSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25440, 250},
+    {I_VPMULHRSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25448, 250},
+    {I_VPMULHRSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25456, 250},
+    {I_VPMULHRSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25464, 251},
+    {I_VPMULHRSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25472, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMULHW = {
+    {I_VPMULHW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37450, 191},
+    {I_VPMULHW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37457, 191},
+    {I_VPMULHW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40551, 210},
+    {I_VPMULHW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40558, 210},
+    {I_VPMULHW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25528, 250},
+    {I_VPMULHW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25536, 250},
+    {I_VPMULHW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25544, 250},
+    {I_VPMULHW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25552, 250},
+    {I_VPMULHW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25560, 251},
+    {I_VPMULHW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25568, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMULLW = {
+    {I_VPMULLW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37464, 191},
+    {I_VPMULLW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37471, 191},
+    {I_VPMULLW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40565, 210},
+    {I_VPMULLW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40572, 210},
+    {I_VPMULLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25672, 250},
+    {I_VPMULLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25680, 250},
+    {I_VPMULLW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25688, 250},
+    {I_VPMULLW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25696, 250},
+    {I_VPMULLW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25704, 251},
+    {I_VPMULLW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25712, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMULLD = {
+    {I_VPMULLD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37478, 191},
+    {I_VPMULLD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37485, 191},
+    {I_VPMULLD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40579, 210},
+    {I_VPMULLD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40586, 210},
+    {I_VPMULLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25576, 246},
+    {I_VPMULLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25584, 246},
+    {I_VPMULLD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25592, 246},
+    {I_VPMULLD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25600, 246},
+    {I_VPMULLD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25608, 247},
+    {I_VPMULLD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25616, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMULUDQ = {
+    {I_VPMULUDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37492, 191},
+    {I_VPMULUDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37499, 191},
+    {I_VPMULUDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40593, 210},
+    {I_VPMULUDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40600, 210},
+    {I_VPMULUDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25768, 246},
+    {I_VPMULUDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25776, 246},
+    {I_VPMULUDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25784, 246},
+    {I_VPMULUDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25792, 246},
+    {I_VPMULUDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25800, 247},
+    {I_VPMULUDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25808, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMULDQ = {
+    {I_VPMULDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37506, 191},
+    {I_VPMULDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37513, 191},
+    {I_VPMULDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40509, 210},
+    {I_VPMULDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40516, 210},
+    {I_VPMULDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25384, 246},
+    {I_VPMULDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25392, 246},
+    {I_VPMULDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25400, 246},
+    {I_VPMULDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25408, 246},
+    {I_VPMULDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25416, 247},
+    {I_VPMULDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25424, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPOR = {
+    {I_VPOR, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37520, 191},
+    {I_VPOR, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37527, 191},
+    {I_VPOR, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40607, 210},
+    {I_VPOR, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40614, 210},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSADBW = {
+    {I_VPSADBW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37534, 191},
+    {I_VPSADBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37541, 191},
+    {I_VPSADBW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40621, 210},
+    {I_VPSADBW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40628, 210},
+    {I_VPSADBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+26104, 250},
+    {I_VPSADBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+26112, 250},
+    {I_VPSADBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+26120, 250},
+    {I_VPSADBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+26128, 250},
+    {I_VPSADBW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+26136, 251},
+    {I_VPSADBW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+26144, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSHUFB = {
+    {I_VPSHUFB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37548, 191},
+    {I_VPSHUFB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37555, 191},
+    {I_VPSHUFB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40635, 210},
+    {I_VPSHUFB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40642, 210},
+    {I_VPSHUFB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26152, 250},
+    {I_VPSHUFB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26160, 250},
+    {I_VPSHUFB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26168, 250},
+    {I_VPSHUFB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26176, 250},
+    {I_VPSHUFB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26184, 251},
+    {I_VPSHUFB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26192, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSHUFD = {
+    {I_VPSHUFD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13872, 191},
+    {I_VPSHUFD, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15872, 210},
+    {I_VPSHUFD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10099, 246},
+    {I_VPSHUFD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10108, 246},
+    {I_VPSHUFD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10117, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSHUFHW = {
+    {I_VPSHUFHW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13880, 191},
+    {I_VPSHUFHW, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15880, 210},
+    {I_VPSHUFHW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10126, 250},
+    {I_VPSHUFHW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10135, 250},
+    {I_VPSHUFHW, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10144, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSHUFLW = {
+    {I_VPSHUFLW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13888, 191},
+    {I_VPSHUFLW, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15888, 210},
+    {I_VPSHUFLW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10153, 250},
+    {I_VPSHUFLW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10162, 250},
+    {I_VPSHUFLW, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10171, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSIGNB = {
+    {I_VPSIGNB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37562, 191},
+    {I_VPSIGNB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37569, 191},
+    {I_VPSIGNB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40649, 210},
+    {I_VPSIGNB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40656, 210},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSIGNW = {
+    {I_VPSIGNW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37576, 191},
+    {I_VPSIGNW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37583, 191},
+    {I_VPSIGNW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40663, 210},
+    {I_VPSIGNW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40670, 210},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSIGND = {
+    {I_VPSIGND, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37590, 191},
+    {I_VPSIGND, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37597, 191},
+    {I_VPSIGND, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40677, 210},
+    {I_VPSIGND, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40684, 210},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSLLDQ = {
+    {I_VPSLLDQ, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13896, 191},
+    {I_VPSLLDQ, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+13904, 191},
+    {I_VPSLLDQ, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15896, 210},
+    {I_VPSLLDQ, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15904, 210},
+    {I_VPSLLDQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10234, 250},
+    {I_VPSLLDQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10243, 250},
+    {I_VPSLLDQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10252, 250},
+    {I_VPSLLDQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10261, 250},
+    {I_VPSLLDQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10270, 251},
+    {I_VPSLLDQ, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10279, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSRLDQ = {
+    {I_VPSRLDQ, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13912, 191},
+    {I_VPSRLDQ, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+13920, 191},
+    {I_VPSRLDQ, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15992, 210},
+    {I_VPSRLDQ, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+16000, 210},
+    {I_VPSRLDQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10612, 250},
+    {I_VPSRLDQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10621, 250},
+    {I_VPSRLDQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10630, 250},
+    {I_VPSRLDQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10639, 250},
+    {I_VPSRLDQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10648, 251},
+    {I_VPSRLDQ, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10657, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSLLW = {
+    {I_VPSLLW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37604, 191},
+    {I_VPSLLW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37611, 191},
+    {I_VPSLLW, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13928, 191},
+    {I_VPSLLW, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+13936, 191},
+    {I_VPSLLW, 3, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40691, 210},
+    {I_VPSLLW, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40698, 210},
+    {I_VPSLLW, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15912, 210},
+    {I_VPSLLW, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15920, 210},
+    {I_VPSLLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26440, 250},
+    {I_VPSLLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26448, 250},
+    {I_VPSLLW, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26456, 250},
+    {I_VPSLLW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26464, 250},
+    {I_VPSLLW, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26472, 251},
+    {I_VPSLLW, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26480, 251},
+    {I_VPSLLW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10342, 250},
+    {I_VPSLLW, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10351, 250},
+    {I_VPSLLW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10360, 250},
+    {I_VPSLLW, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10369, 250},
+    {I_VPSLLW, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10378, 251},
+    {I_VPSLLW, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10387, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSLLD = {
+    {I_VPSLLD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37618, 191},
+    {I_VPSLLD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37625, 191},
+    {I_VPSLLD, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13944, 191},
+    {I_VPSLLD, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+13952, 191},
+    {I_VPSLLD, 3, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40705, 210},
+    {I_VPSLLD, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40712, 210},
+    {I_VPSLLD, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15928, 210},
+    {I_VPSLLD, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15936, 210},
+    {I_VPSLLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26200, 246},
+    {I_VPSLLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26208, 246},
+    {I_VPSLLD, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26216, 246},
+    {I_VPSLLD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26224, 246},
+    {I_VPSLLD, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26232, 247},
+    {I_VPSLLD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26240, 247},
+    {I_VPSLLD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10180, 246},
+    {I_VPSLLD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10189, 246},
+    {I_VPSLLD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10198, 246},
+    {I_VPSLLD, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10207, 246},
+    {I_VPSLLD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10216, 247},
+    {I_VPSLLD, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10225, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSLLQ = {
+    {I_VPSLLQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37632, 191},
+    {I_VPSLLQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37639, 191},
+    {I_VPSLLQ, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13960, 191},
+    {I_VPSLLQ, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+13968, 191},
+    {I_VPSLLQ, 3, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40719, 210},
+    {I_VPSLLQ, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40726, 210},
+    {I_VPSLLQ, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15944, 210},
+    {I_VPSLLQ, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15952, 210},
+    {I_VPSLLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26248, 246},
+    {I_VPSLLQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26256, 246},
+    {I_VPSLLQ, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26264, 246},
+    {I_VPSLLQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26272, 246},
+    {I_VPSLLQ, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26280, 247},
+    {I_VPSLLQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26288, 247},
+    {I_VPSLLQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10288, 246},
+    {I_VPSLLQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10297, 246},
+    {I_VPSLLQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10306, 246},
+    {I_VPSLLQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10315, 246},
+    {I_VPSLLQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10324, 247},
+    {I_VPSLLQ, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10333, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSRAW = {
+    {I_VPSRAW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37646, 191},
+    {I_VPSRAW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37653, 191},
+    {I_VPSRAW, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13976, 191},
+    {I_VPSRAW, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+13984, 191},
+    {I_VPSRAW, 3, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40733, 210},
+    {I_VPSRAW, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40740, 210},
+    {I_VPSRAW, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15960, 210},
+    {I_VPSRAW, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15968, 210},
+    {I_VPSRAW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26728, 250},
+    {I_VPSRAW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26736, 250},
+    {I_VPSRAW, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26744, 250},
+    {I_VPSRAW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26752, 250},
+    {I_VPSRAW, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26760, 251},
+    {I_VPSRAW, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26768, 251},
+    {I_VPSRAW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10504, 250},
+    {I_VPSRAW, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10513, 250},
+    {I_VPSRAW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10522, 250},
+    {I_VPSRAW, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10531, 250},
+    {I_VPSRAW, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10540, 251},
+    {I_VPSRAW, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10549, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSRAD = {
+    {I_VPSRAD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37660, 191},
+    {I_VPSRAD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37667, 191},
+    {I_VPSRAD, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13992, 191},
+    {I_VPSRAD, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+14000, 191},
+    {I_VPSRAD, 3, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40747, 210},
+    {I_VPSRAD, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40754, 210},
+    {I_VPSRAD, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15976, 210},
+    {I_VPSRAD, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15984, 210},
+    {I_VPSRAD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26488, 246},
+    {I_VPSRAD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26496, 246},
+    {I_VPSRAD, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26504, 246},
+    {I_VPSRAD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26512, 246},
+    {I_VPSRAD, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26520, 247},
+    {I_VPSRAD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26528, 247},
+    {I_VPSRAD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10396, 246},
+    {I_VPSRAD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10405, 246},
+    {I_VPSRAD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10414, 246},
+    {I_VPSRAD, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10423, 246},
+    {I_VPSRAD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10432, 247},
+    {I_VPSRAD, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10441, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSRLW = {
+    {I_VPSRLW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37674, 191},
+    {I_VPSRLW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37681, 191},
+    {I_VPSRLW, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14008, 191},
+    {I_VPSRLW, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+14016, 191},
+    {I_VPSRLW, 3, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40761, 210},
+    {I_VPSRLW, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40768, 210},
+    {I_VPSRLW, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16008, 210},
+    {I_VPSRLW, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+16016, 210},
+    {I_VPSRLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27016, 250},
+    {I_VPSRLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27024, 250},
+    {I_VPSRLW, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27032, 250},
+    {I_VPSRLW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27040, 250},
+    {I_VPSRLW, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27048, 251},
+    {I_VPSRLW, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27056, 251},
+    {I_VPSRLW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10720, 250},
+    {I_VPSRLW, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10729, 250},
+    {I_VPSRLW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10738, 250},
+    {I_VPSRLW, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10747, 250},
+    {I_VPSRLW, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10756, 251},
+    {I_VPSRLW, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10765, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSRLD = {
+    {I_VPSRLD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37688, 191},
+    {I_VPSRLD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37695, 191},
+    {I_VPSRLD, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14024, 191},
+    {I_VPSRLD, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+14032, 191},
+    {I_VPSRLD, 3, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40775, 210},
+    {I_VPSRLD, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40782, 210},
+    {I_VPSRLD, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16024, 210},
+    {I_VPSRLD, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+16032, 210},
+    {I_VPSRLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26776, 246},
+    {I_VPSRLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26784, 246},
+    {I_VPSRLD, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26792, 246},
+    {I_VPSRLD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26800, 246},
+    {I_VPSRLD, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26808, 247},
+    {I_VPSRLD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26816, 247},
+    {I_VPSRLD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10558, 246},
+    {I_VPSRLD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10567, 246},
+    {I_VPSRLD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10576, 246},
+    {I_VPSRLD, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10585, 246},
+    {I_VPSRLD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10594, 247},
+    {I_VPSRLD, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10603, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSRLQ = {
+    {I_VPSRLQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37702, 191},
+    {I_VPSRLQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37709, 191},
+    {I_VPSRLQ, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14040, 191},
+    {I_VPSRLQ, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+14048, 191},
+    {I_VPSRLQ, 3, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40789, 210},
+    {I_VPSRLQ, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40796, 210},
+    {I_VPSRLQ, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16040, 210},
+    {I_VPSRLQ, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+16048, 210},
+    {I_VPSRLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26824, 246},
+    {I_VPSRLQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26832, 246},
+    {I_VPSRLQ, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26840, 246},
+    {I_VPSRLQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26848, 246},
+    {I_VPSRLQ, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26856, 247},
+    {I_VPSRLQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26864, 247},
+    {I_VPSRLQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10666, 246},
+    {I_VPSRLQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10675, 246},
+    {I_VPSRLQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10684, 246},
+    {I_VPSRLQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10693, 246},
+    {I_VPSRLQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10702, 247},
+    {I_VPSRLQ, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10711, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPTEST = {
+    {I_VPTEST, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37716, 191},
+    {I_VPTEST, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+37723, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSUBB = {
+    {I_VPSUBB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37730, 191},
+    {I_VPSUBB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37737, 191},
+    {I_VPSUBB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40803, 210},
+    {I_VPSUBB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40810, 210},
+    {I_VPSUBB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27064, 250},
+    {I_VPSUBB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27072, 250},
+    {I_VPSUBB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27080, 250},
+    {I_VPSUBB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27088, 250},
+    {I_VPSUBB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27096, 251},
+    {I_VPSUBB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27104, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSUBW = {
+    {I_VPSUBW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37744, 191},
+    {I_VPSUBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37751, 191},
+    {I_VPSUBW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40817, 210},
+    {I_VPSUBW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40824, 210},
+    {I_VPSUBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27400, 250},
+    {I_VPSUBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27408, 250},
+    {I_VPSUBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27416, 250},
+    {I_VPSUBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27424, 250},
+    {I_VPSUBW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27432, 251},
+    {I_VPSUBW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27440, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSUBD = {
+    {I_VPSUBD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37758, 191},
+    {I_VPSUBD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37765, 191},
+    {I_VPSUBD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40831, 210},
+    {I_VPSUBD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40838, 210},
+    {I_VPSUBD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27112, 246},
+    {I_VPSUBD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27120, 246},
+    {I_VPSUBD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27128, 246},
+    {I_VPSUBD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27136, 246},
+    {I_VPSUBD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27144, 247},
+    {I_VPSUBD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27152, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSUBQ = {
+    {I_VPSUBQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37772, 191},
+    {I_VPSUBQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37779, 191},
+    {I_VPSUBQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40845, 210},
+    {I_VPSUBQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40852, 210},
+    {I_VPSUBQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27160, 246},
+    {I_VPSUBQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27168, 246},
+    {I_VPSUBQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27176, 246},
+    {I_VPSUBQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27184, 246},
+    {I_VPSUBQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27192, 247},
+    {I_VPSUBQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27200, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSUBSB = {
+    {I_VPSUBSB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37786, 191},
+    {I_VPSUBSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37793, 191},
+    {I_VPSUBSB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40859, 210},
+    {I_VPSUBSB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40866, 210},
+    {I_VPSUBSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27208, 250},
+    {I_VPSUBSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27216, 250},
+    {I_VPSUBSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27224, 250},
+    {I_VPSUBSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27232, 250},
+    {I_VPSUBSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27240, 251},
+    {I_VPSUBSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27248, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSUBSW = {
+    {I_VPSUBSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37800, 191},
+    {I_VPSUBSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37807, 191},
+    {I_VPSUBSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40873, 210},
+    {I_VPSUBSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40880, 210},
+    {I_VPSUBSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27256, 250},
+    {I_VPSUBSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27264, 250},
+    {I_VPSUBSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27272, 250},
+    {I_VPSUBSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27280, 250},
+    {I_VPSUBSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27288, 251},
+    {I_VPSUBSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27296, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSUBUSB = {
+    {I_VPSUBUSB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37814, 191},
+    {I_VPSUBUSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37821, 191},
+    {I_VPSUBUSB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40887, 210},
+    {I_VPSUBUSB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40894, 210},
+    {I_VPSUBUSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27304, 250},
+    {I_VPSUBUSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27312, 250},
+    {I_VPSUBUSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27320, 250},
+    {I_VPSUBUSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27328, 250},
+    {I_VPSUBUSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27336, 251},
+    {I_VPSUBUSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27344, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSUBUSW = {
+    {I_VPSUBUSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37828, 191},
+    {I_VPSUBUSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37835, 191},
+    {I_VPSUBUSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40901, 210},
+    {I_VPSUBUSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40908, 210},
+    {I_VPSUBUSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27352, 250},
+    {I_VPSUBUSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27360, 250},
+    {I_VPSUBUSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27368, 250},
+    {I_VPSUBUSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27376, 250},
+    {I_VPSUBUSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27384, 251},
+    {I_VPSUBUSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27392, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPUNPCKHBW = {
+    {I_VPUNPCKHBW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37842, 191},
+    {I_VPUNPCKHBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37849, 191},
+    {I_VPUNPCKHBW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40915, 210},
+    {I_VPUNPCKHBW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40922, 210},
+    {I_VPUNPCKHBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27640, 250},
+    {I_VPUNPCKHBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27648, 250},
+    {I_VPUNPCKHBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27656, 250},
+    {I_VPUNPCKHBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27664, 250},
+    {I_VPUNPCKHBW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27672, 251},
+    {I_VPUNPCKHBW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27680, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPUNPCKHWD = {
+    {I_VPUNPCKHWD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37856, 191},
+    {I_VPUNPCKHWD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37863, 191},
+    {I_VPUNPCKHWD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40929, 210},
+    {I_VPUNPCKHWD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40936, 210},
+    {I_VPUNPCKHWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27784, 250},
+    {I_VPUNPCKHWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27792, 250},
+    {I_VPUNPCKHWD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27800, 250},
+    {I_VPUNPCKHWD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27808, 250},
+    {I_VPUNPCKHWD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27816, 251},
+    {I_VPUNPCKHWD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27824, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPUNPCKHDQ = {
+    {I_VPUNPCKHDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37870, 191},
+    {I_VPUNPCKHDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37877, 191},
+    {I_VPUNPCKHDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40943, 210},
+    {I_VPUNPCKHDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40950, 210},
+    {I_VPUNPCKHDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27688, 246},
+    {I_VPUNPCKHDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27696, 246},
+    {I_VPUNPCKHDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27704, 246},
+    {I_VPUNPCKHDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27712, 246},
+    {I_VPUNPCKHDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27720, 247},
+    {I_VPUNPCKHDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27728, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPUNPCKHQDQ = {
+    {I_VPUNPCKHQDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37884, 191},
+    {I_VPUNPCKHQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37891, 191},
+    {I_VPUNPCKHQDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40957, 210},
+    {I_VPUNPCKHQDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40964, 210},
+    {I_VPUNPCKHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27736, 246},
+    {I_VPUNPCKHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27744, 246},
+    {I_VPUNPCKHQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27752, 246},
+    {I_VPUNPCKHQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27760, 246},
+    {I_VPUNPCKHQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27768, 247},
+    {I_VPUNPCKHQDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27776, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPUNPCKLBW = {
+    {I_VPUNPCKLBW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37898, 191},
+    {I_VPUNPCKLBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37905, 191},
+    {I_VPUNPCKLBW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40971, 210},
+    {I_VPUNPCKLBW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40978, 210},
+    {I_VPUNPCKLBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27832, 250},
+    {I_VPUNPCKLBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27840, 250},
+    {I_VPUNPCKLBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27848, 250},
+    {I_VPUNPCKLBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27856, 250},
+    {I_VPUNPCKLBW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27864, 251},
+    {I_VPUNPCKLBW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27872, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPUNPCKLWD = {
+    {I_VPUNPCKLWD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37912, 191},
+    {I_VPUNPCKLWD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37919, 191},
+    {I_VPUNPCKLWD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40985, 210},
+    {I_VPUNPCKLWD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40992, 210},
+    {I_VPUNPCKLWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27976, 250},
+    {I_VPUNPCKLWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27984, 250},
+    {I_VPUNPCKLWD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27992, 250},
+    {I_VPUNPCKLWD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28000, 250},
+    {I_VPUNPCKLWD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28008, 251},
+    {I_VPUNPCKLWD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28016, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPUNPCKLDQ = {
+    {I_VPUNPCKLDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37926, 191},
+    {I_VPUNPCKLDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37933, 191},
+    {I_VPUNPCKLDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40999, 210},
+    {I_VPUNPCKLDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41006, 210},
+    {I_VPUNPCKLDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27880, 246},
+    {I_VPUNPCKLDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27888, 246},
+    {I_VPUNPCKLDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27896, 246},
+    {I_VPUNPCKLDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27904, 246},
+    {I_VPUNPCKLDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27912, 247},
+    {I_VPUNPCKLDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27920, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPUNPCKLQDQ = {
+    {I_VPUNPCKLQDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37940, 191},
+    {I_VPUNPCKLQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37947, 191},
+    {I_VPUNPCKLQDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41013, 210},
+    {I_VPUNPCKLQDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41020, 210},
+    {I_VPUNPCKLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27928, 246},
+    {I_VPUNPCKLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27936, 246},
+    {I_VPUNPCKLQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27944, 246},
+    {I_VPUNPCKLQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27952, 246},
+    {I_VPUNPCKLQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27960, 247},
+    {I_VPUNPCKLQDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27968, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPXOR = {
+    {I_VPXOR, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37954, 191},
+    {I_VPXOR, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37961, 191},
+    {I_VPXOR, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41027, 210},
+    {I_VPXOR, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41034, 210},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRCPPS = {
+    {I_VRCPPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37968, 191},
+    {I_VRCPPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+37975, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRCPSS = {
+    {I_VRCPSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+37982, 191},
+    {I_VRCPSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+37989, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRSQRTPS = {
+    {I_VRSQRTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37996, 191},
+    {I_VRSQRTPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38003, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRSQRTSS = {
+    {I_VRSQRTSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38010, 191},
+    {I_VRSQRTSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+38017, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VROUNDPD = {
+    {I_VROUNDPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14056, 191},
+    {I_VROUNDPD, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14064, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VROUNDPS = {
+    {I_VROUNDPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14072, 191},
+    {I_VROUNDPS, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14080, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VROUNDSD = {
+    {I_VROUNDSD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+14088, 191},
+    {I_VROUNDSD, 3, {XMM_L16,RM_XMM_L16|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14096, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VROUNDSS = {
+    {I_VROUNDSS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+14104, 191},
+    {I_VROUNDSS, 3, {XMM_L16,RM_XMM_L16|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14112, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSHUFPD = {
+    {I_VSHUFPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+14120, 191},
+    {I_VSHUFPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14128, 191},
+    {I_VSHUFPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+14136, 191},
+    {I_VSHUFPD, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14144, 191},
+    {I_VSHUFPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11476, 246},
+    {I_VSHUFPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11485, 246},
+    {I_VSHUFPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11494, 246},
+    {I_VSHUFPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11503, 246},
+    {I_VSHUFPD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11512, 247},
+    {I_VSHUFPD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11521, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSHUFPS = {
+    {I_VSHUFPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+14152, 191},
+    {I_VSHUFPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14160, 191},
+    {I_VSHUFPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+14168, 191},
+    {I_VSHUFPS, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14176, 191},
+    {I_VSHUFPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11530, 246},
+    {I_VSHUFPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11539, 246},
+    {I_VSHUFPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11548, 246},
+    {I_VSHUFPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11557, 246},
+    {I_VSHUFPS, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11566, 247},
+    {I_VSHUFPS, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11575, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSQRTPD = {
+    {I_VSQRTPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38024, 191},
+    {I_VSQRTPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38031, 191},
+    {I_VSQRTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28504, 246},
+    {I_VSQRTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28512, 246},
+    {I_VSQRTPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+28520, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSQRTPS = {
+    {I_VSQRTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38038, 191},
+    {I_VSQRTPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38045, 191},
+    {I_VSQRTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28528, 246},
+    {I_VSQRTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28536, 246},
+    {I_VSQRTPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+28544, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSQRTSD = {
+    {I_VSQRTSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38052, 191},
+    {I_VSQRTSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+38059, 191},
+    {I_VSQRTSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+28552, 247},
+    {I_VSQRTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+28560, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSQRTSS = {
+    {I_VSQRTSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38066, 191},
+    {I_VSQRTSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+38073, 191},
+    {I_VSQRTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+28568, 247},
+    {I_VSQRTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+28576, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSTMXCSR = {
+    {I_VSTMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+38080, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSUBPD = {
+    {I_VSUBPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38087, 191},
+    {I_VSUBPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38094, 191},
+    {I_VSUBPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38101, 191},
+    {I_VSUBPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38108, 191},
+    {I_VSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28584, 246},
+    {I_VSUBPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28592, 246},
+    {I_VSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28600, 246},
+    {I_VSUBPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28608, 246},
+    {I_VSUBPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+28616, 247},
+    {I_VSUBPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+28624, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSUBPS = {
+    {I_VSUBPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38115, 191},
+    {I_VSUBPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38122, 191},
+    {I_VSUBPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38129, 191},
+    {I_VSUBPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38136, 191},
+    {I_VSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28632, 246},
+    {I_VSUBPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28640, 246},
+    {I_VSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28648, 246},
+    {I_VSUBPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28656, 246},
+    {I_VSUBPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+28664, 247},
+    {I_VSUBPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+28672, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSUBSD = {
+    {I_VSUBSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38143, 191},
+    {I_VSUBSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+38150, 191},
+    {I_VSUBSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+28680, 247},
+    {I_VSUBSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+28688, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSUBSS = {
+    {I_VSUBSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38157, 191},
+    {I_VSUBSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+38164, 191},
+    {I_VSUBSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+28696, 247},
+    {I_VSUBSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+28704, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VTESTPS = {
+    {I_VTESTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38171, 191},
+    {I_VTESTPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38178, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VTESTPD = {
+    {I_VTESTPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38185, 191},
+    {I_VTESTPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38192, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VUCOMISD = {
+    {I_VUCOMISD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+38199, 191},
+    {I_VUCOMISD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+28712, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VUCOMISS = {
+    {I_VUCOMISS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+38206, 191},
+    {I_VUCOMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+28720, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VUNPCKHPD = {
+    {I_VUNPCKHPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38213, 191},
+    {I_VUNPCKHPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38220, 191},
+    {I_VUNPCKHPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38227, 191},
+    {I_VUNPCKHPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38234, 191},
+    {I_VUNPCKHPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28728, 246},
+    {I_VUNPCKHPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28736, 246},
+    {I_VUNPCKHPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28744, 246},
+    {I_VUNPCKHPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28752, 246},
+    {I_VUNPCKHPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28760, 247},
+    {I_VUNPCKHPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28768, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VUNPCKHPS = {
+    {I_VUNPCKHPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38241, 191},
+    {I_VUNPCKHPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38248, 191},
+    {I_VUNPCKHPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38255, 191},
+    {I_VUNPCKHPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38262, 191},
+    {I_VUNPCKHPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28776, 246},
+    {I_VUNPCKHPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28784, 246},
+    {I_VUNPCKHPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28792, 246},
+    {I_VUNPCKHPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28800, 246},
+    {I_VUNPCKHPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28808, 247},
+    {I_VUNPCKHPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28816, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VUNPCKLPD = {
+    {I_VUNPCKLPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38269, 191},
+    {I_VUNPCKLPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38276, 191},
+    {I_VUNPCKLPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38283, 191},
+    {I_VUNPCKLPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38290, 191},
+    {I_VUNPCKLPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28824, 246},
+    {I_VUNPCKLPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28832, 246},
+    {I_VUNPCKLPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28840, 246},
+    {I_VUNPCKLPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28848, 246},
+    {I_VUNPCKLPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28856, 247},
+    {I_VUNPCKLPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28864, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VUNPCKLPS = {
+    {I_VUNPCKLPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38297, 191},
+    {I_VUNPCKLPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38304, 191},
+    {I_VUNPCKLPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38311, 191},
+    {I_VUNPCKLPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38318, 191},
+    {I_VUNPCKLPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28872, 246},
+    {I_VUNPCKLPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28880, 246},
+    {I_VUNPCKLPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28888, 246},
+    {I_VUNPCKLPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28896, 246},
+    {I_VUNPCKLPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28904, 247},
+    {I_VUNPCKLPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28912, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VXORPD = {
+    {I_VXORPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38325, 191},
+    {I_VXORPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38332, 191},
+    {I_VXORPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38339, 191},
+    {I_VXORPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38346, 191},
+    {I_VXORPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28920, 248},
+    {I_VXORPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28928, 248},
+    {I_VXORPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28936, 248},
+    {I_VXORPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28944, 248},
+    {I_VXORPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28952, 249},
+    {I_VXORPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28960, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VXORPS = {
+    {I_VXORPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38353, 191},
+    {I_VXORPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38360, 191},
+    {I_VXORPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38367, 191},
+    {I_VXORPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38374, 191},
+    {I_VXORPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28968, 248},
+    {I_VXORPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28976, 248},
+    {I_VXORPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28984, 248},
+    {I_VXORPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28992, 248},
+    {I_VXORPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29000, 249},
+    {I_VXORPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29008, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VZEROALL = {
+    {I_VZEROALL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45851, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VZEROUPPER = {
+    {I_VZEROUPPER, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45857, 191},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PCLMULLQLQDQ = {
+    {I_PCLMULLQLQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+7768, 190},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PCLMULHQLQDQ = {
+    {I_PCLMULHQLQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+7777, 190},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PCLMULLQHQDQ = {
+    {I_PCLMULLQHQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+7786, 190},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PCLMULHQHQDQ = {
+    {I_PCLMULHQHQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+7795, 190},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PCLMULQDQ = {
+    {I_PCLMULQDQ, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14184, 190},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCLMULLQLQDQ = {
+    {I_VPCLMULLQLQDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+7804, 191},
+    {I_VPCLMULLQLQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+7813, 191},
+    {I_VPCLMULLQLQDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+7876, 201},
+    {I_VPCLMULLQLQDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+7885, 201},
+    {I_VPCLMULLQLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+0, 202},
+    {I_VPCLMULLQLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+10, 202},
+    {I_VPCLMULLQLQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+80, 202},
+    {I_VPCLMULLQLQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+90, 202},
+    {I_VPCLMULLQLQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+160, 203},
+    {I_VPCLMULLQLQDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+170, 203},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCLMULHQLQDQ = {
+    {I_VPCLMULHQLQDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+7822, 191},
+    {I_VPCLMULHQLQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+7831, 191},
+    {I_VPCLMULHQLQDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+7894, 201},
+    {I_VPCLMULHQLQDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+7903, 201},
+    {I_VPCLMULHQLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+20, 202},
+    {I_VPCLMULHQLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+30, 202},
+    {I_VPCLMULHQLQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+100, 202},
+    {I_VPCLMULHQLQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+110, 202},
+    {I_VPCLMULHQLQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+180, 203},
+    {I_VPCLMULHQLQDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+190, 203},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCLMULLQHQDQ = {
+    {I_VPCLMULLQHQDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+7840, 191},
+    {I_VPCLMULLQHQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+7849, 191},
+    {I_VPCLMULLQHQDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+7912, 201},
+    {I_VPCLMULLQHQDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+7921, 201},
+    {I_VPCLMULLQHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40, 202},
+    {I_VPCLMULLQHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+50, 202},
+    {I_VPCLMULLQHQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+120, 202},
+    {I_VPCLMULLQHQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+130, 202},
+    {I_VPCLMULLQHQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+200, 203},
+    {I_VPCLMULLQHQDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+210, 203},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCLMULHQHQDQ = {
+    {I_VPCLMULHQHQDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+7858, 191},
+    {I_VPCLMULHQHQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+7867, 191},
+    {I_VPCLMULHQHQDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+7930, 201},
+    {I_VPCLMULHQHQDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+7939, 201},
+    {I_VPCLMULHQHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+60, 202},
+    {I_VPCLMULHQHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+70, 202},
+    {I_VPCLMULHQHQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+140, 202},
+    {I_VPCLMULHQHQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+150, 202},
+    {I_VPCLMULHQHQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+220, 203},
+    {I_VPCLMULHQHQDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+230, 203},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCLMULQDQ = {
+    {I_VPCLMULQDQ, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+14192, 191},
+    {I_VPCLMULQDQ, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14200, 191},
+    {I_VPCLMULQDQ, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+14208, 201},
+    {I_VPCLMULQDQ, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14216, 201},
+    {I_VPCLMULQDQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+7948, 202},
+    {I_VPCLMULQDQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+7957, 202},
+    {I_VPCLMULQDQ, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+7966, 202},
+    {I_VPCLMULQDQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+7975, 202},
+    {I_VPCLMULQDQ, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+7984, 203},
+    {I_VPCLMULQDQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+7993, 203},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD132PS = {
+    {I_VFMADD132PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38381, 204},
+    {I_VFMADD132PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38388, 204},
+    {I_VFMADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18152, 246},
+    {I_VFMADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18160, 246},
+    {I_VFMADD132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18168, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD132PD = {
+    {I_VFMADD132PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38395, 204},
+    {I_VFMADD132PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38402, 204},
+    {I_VFMADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18128, 246},
+    {I_VFMADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18136, 246},
+    {I_VFMADD132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18144, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD312PS = {
+    {I_VFMADD312PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38381, 204},
+    {I_VFMADD312PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38388, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD312PD = {
+    {I_VFMADD312PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38395, 204},
+    {I_VFMADD312PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38402, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD213PS = {
+    {I_VFMADD213PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38409, 204},
+    {I_VFMADD213PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38416, 204},
+    {I_VFMADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18216, 246},
+    {I_VFMADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18224, 246},
+    {I_VFMADD213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18232, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD213PD = {
+    {I_VFMADD213PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38423, 204},
+    {I_VFMADD213PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38430, 204},
+    {I_VFMADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18192, 246},
+    {I_VFMADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18200, 246},
+    {I_VFMADD213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18208, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD123PS = {
+    {I_VFMADD123PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38409, 204},
+    {I_VFMADD123PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38416, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD123PD = {
+    {I_VFMADD123PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38423, 204},
+    {I_VFMADD123PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38430, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD231PS = {
+    {I_VFMADD231PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38437, 204},
+    {I_VFMADD231PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38444, 204},
+    {I_VFMADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18280, 246},
+    {I_VFMADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18288, 246},
+    {I_VFMADD231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18296, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD231PD = {
+    {I_VFMADD231PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38451, 204},
+    {I_VFMADD231PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38458, 204},
+    {I_VFMADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18256, 246},
+    {I_VFMADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18264, 246},
+    {I_VFMADD231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18272, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD321PS = {
+    {I_VFMADD321PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38437, 204},
+    {I_VFMADD321PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38444, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD321PD = {
+    {I_VFMADD321PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38451, 204},
+    {I_VFMADD321PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38458, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADDSUB132PS = {
+    {I_VFMADDSUB132PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38465, 204},
+    {I_VFMADDSUB132PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38472, 204},
+    {I_VFMADDSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18344, 246},
+    {I_VFMADDSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18352, 246},
+    {I_VFMADDSUB132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18360, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADDSUB132PD = {
+    {I_VFMADDSUB132PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38479, 204},
+    {I_VFMADDSUB132PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38486, 204},
+    {I_VFMADDSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18320, 246},
+    {I_VFMADDSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18328, 246},
+    {I_VFMADDSUB132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18336, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADDSUB312PS = {
+    {I_VFMADDSUB312PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38465, 204},
+    {I_VFMADDSUB312PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38472, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADDSUB312PD = {
+    {I_VFMADDSUB312PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38479, 204},
+    {I_VFMADDSUB312PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38486, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADDSUB213PS = {
+    {I_VFMADDSUB213PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38493, 204},
+    {I_VFMADDSUB213PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38500, 204},
+    {I_VFMADDSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18392, 246},
+    {I_VFMADDSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18400, 246},
+    {I_VFMADDSUB213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18408, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADDSUB213PD = {
+    {I_VFMADDSUB213PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38507, 204},
+    {I_VFMADDSUB213PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38514, 204},
+    {I_VFMADDSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18368, 246},
+    {I_VFMADDSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18376, 246},
+    {I_VFMADDSUB213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18384, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADDSUB123PS = {
+    {I_VFMADDSUB123PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38493, 204},
+    {I_VFMADDSUB123PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38500, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADDSUB123PD = {
+    {I_VFMADDSUB123PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38507, 204},
+    {I_VFMADDSUB123PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38514, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADDSUB231PS = {
+    {I_VFMADDSUB231PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38521, 204},
+    {I_VFMADDSUB231PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38528, 204},
+    {I_VFMADDSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18440, 246},
+    {I_VFMADDSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18448, 246},
+    {I_VFMADDSUB231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18456, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADDSUB231PD = {
+    {I_VFMADDSUB231PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38535, 204},
+    {I_VFMADDSUB231PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38542, 204},
+    {I_VFMADDSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18416, 246},
+    {I_VFMADDSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18424, 246},
+    {I_VFMADDSUB231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18432, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADDSUB321PS = {
+    {I_VFMADDSUB321PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38521, 204},
+    {I_VFMADDSUB321PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38528, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADDSUB321PD = {
+    {I_VFMADDSUB321PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38535, 204},
+    {I_VFMADDSUB321PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38542, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB132PS = {
+    {I_VFMSUB132PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38549, 204},
+    {I_VFMSUB132PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38556, 204},
+    {I_VFMSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18488, 246},
+    {I_VFMSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18496, 246},
+    {I_VFMSUB132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18504, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB132PD = {
+    {I_VFMSUB132PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38563, 204},
+    {I_VFMSUB132PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38570, 204},
+    {I_VFMSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18464, 246},
+    {I_VFMSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18472, 246},
+    {I_VFMSUB132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18480, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB312PS = {
+    {I_VFMSUB312PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38549, 204},
+    {I_VFMSUB312PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38556, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB312PD = {
+    {I_VFMSUB312PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38563, 204},
+    {I_VFMSUB312PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38570, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB213PS = {
+    {I_VFMSUB213PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38577, 204},
+    {I_VFMSUB213PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38584, 204},
+    {I_VFMSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18552, 246},
+    {I_VFMSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18560, 246},
+    {I_VFMSUB213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18568, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB213PD = {
+    {I_VFMSUB213PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38591, 204},
+    {I_VFMSUB213PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38598, 204},
+    {I_VFMSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18528, 246},
+    {I_VFMSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18536, 246},
+    {I_VFMSUB213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18544, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB123PS = {
+    {I_VFMSUB123PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38577, 204},
+    {I_VFMSUB123PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38584, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB123PD = {
+    {I_VFMSUB123PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38591, 204},
+    {I_VFMSUB123PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38598, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB231PS = {
+    {I_VFMSUB231PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38605, 204},
+    {I_VFMSUB231PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38612, 204},
+    {I_VFMSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18616, 246},
+    {I_VFMSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18624, 246},
+    {I_VFMSUB231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18632, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB231PD = {
+    {I_VFMSUB231PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38619, 204},
+    {I_VFMSUB231PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38626, 204},
+    {I_VFMSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18592, 246},
+    {I_VFMSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18600, 246},
+    {I_VFMSUB231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18608, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB321PS = {
+    {I_VFMSUB321PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38605, 204},
+    {I_VFMSUB321PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38612, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB321PD = {
+    {I_VFMSUB321PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38619, 204},
+    {I_VFMSUB321PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38626, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUBADD132PS = {
+    {I_VFMSUBADD132PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38633, 204},
+    {I_VFMSUBADD132PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38640, 204},
+    {I_VFMSUBADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18680, 246},
+    {I_VFMSUBADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18688, 246},
+    {I_VFMSUBADD132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18696, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUBADD132PD = {
+    {I_VFMSUBADD132PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38647, 204},
+    {I_VFMSUBADD132PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38654, 204},
+    {I_VFMSUBADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18656, 246},
+    {I_VFMSUBADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18664, 246},
+    {I_VFMSUBADD132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18672, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUBADD312PS = {
+    {I_VFMSUBADD312PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38633, 204},
+    {I_VFMSUBADD312PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38640, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUBADD312PD = {
+    {I_VFMSUBADD312PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38647, 204},
+    {I_VFMSUBADD312PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38654, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUBADD213PS = {
+    {I_VFMSUBADD213PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38661, 204},
+    {I_VFMSUBADD213PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38668, 204},
+    {I_VFMSUBADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18728, 246},
+    {I_VFMSUBADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18736, 246},
+    {I_VFMSUBADD213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18744, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUBADD213PD = {
+    {I_VFMSUBADD213PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38675, 204},
+    {I_VFMSUBADD213PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38682, 204},
+    {I_VFMSUBADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18704, 246},
+    {I_VFMSUBADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18712, 246},
+    {I_VFMSUBADD213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18720, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUBADD123PS = {
+    {I_VFMSUBADD123PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38661, 204},
+    {I_VFMSUBADD123PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38668, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUBADD123PD = {
+    {I_VFMSUBADD123PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38675, 204},
+    {I_VFMSUBADD123PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38682, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUBADD231PS = {
+    {I_VFMSUBADD231PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38689, 204},
+    {I_VFMSUBADD231PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38696, 204},
+    {I_VFMSUBADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18776, 246},
+    {I_VFMSUBADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18784, 246},
+    {I_VFMSUBADD231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18792, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUBADD231PD = {
+    {I_VFMSUBADD231PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38703, 204},
+    {I_VFMSUBADD231PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38710, 204},
+    {I_VFMSUBADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18752, 246},
+    {I_VFMSUBADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18760, 246},
+    {I_VFMSUBADD231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18768, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUBADD321PS = {
+    {I_VFMSUBADD321PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38689, 204},
+    {I_VFMSUBADD321PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38696, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUBADD321PD = {
+    {I_VFMSUBADD321PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38703, 204},
+    {I_VFMSUBADD321PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38710, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADD132PS = {
+    {I_VFNMADD132PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38717, 204},
+    {I_VFNMADD132PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38724, 204},
+    {I_VFNMADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18824, 246},
+    {I_VFNMADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18832, 246},
+    {I_VFNMADD132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18840, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADD132PD = {
+    {I_VFNMADD132PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38731, 204},
+    {I_VFNMADD132PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38738, 204},
+    {I_VFNMADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18800, 246},
+    {I_VFNMADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18808, 246},
+    {I_VFNMADD132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18816, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADD312PS = {
+    {I_VFNMADD312PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38717, 204},
+    {I_VFNMADD312PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38724, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADD312PD = {
+    {I_VFNMADD312PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38731, 204},
+    {I_VFNMADD312PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38738, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADD213PS = {
+    {I_VFNMADD213PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38745, 204},
+    {I_VFNMADD213PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38752, 204},
+    {I_VFNMADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18888, 246},
+    {I_VFNMADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18896, 246},
+    {I_VFNMADD213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18904, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADD213PD = {
+    {I_VFNMADD213PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38759, 204},
+    {I_VFNMADD213PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38766, 204},
+    {I_VFNMADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18864, 246},
+    {I_VFNMADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18872, 246},
+    {I_VFNMADD213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18880, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADD123PS = {
+    {I_VFNMADD123PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38745, 204},
+    {I_VFNMADD123PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38752, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADD123PD = {
+    {I_VFNMADD123PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38759, 204},
+    {I_VFNMADD123PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38766, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADD231PS = {
+    {I_VFNMADD231PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38773, 204},
+    {I_VFNMADD231PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38780, 204},
+    {I_VFNMADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18952, 246},
+    {I_VFNMADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18960, 246},
+    {I_VFNMADD231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18968, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADD231PD = {
+    {I_VFNMADD231PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38787, 204},
+    {I_VFNMADD231PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38794, 204},
+    {I_VFNMADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18928, 246},
+    {I_VFNMADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18936, 246},
+    {I_VFNMADD231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18944, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADD321PS = {
+    {I_VFNMADD321PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38773, 204},
+    {I_VFNMADD321PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38780, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADD321PD = {
+    {I_VFNMADD321PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38787, 204},
+    {I_VFNMADD321PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38794, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUB132PS = {
+    {I_VFNMSUB132PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38801, 204},
+    {I_VFNMSUB132PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38808, 204},
+    {I_VFNMSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19016, 246},
+    {I_VFNMSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19024, 246},
+    {I_VFNMSUB132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+19032, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUB132PD = {
+    {I_VFNMSUB132PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38815, 204},
+    {I_VFNMSUB132PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38822, 204},
+    {I_VFNMSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18992, 246},
+    {I_VFNMSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19000, 246},
+    {I_VFNMSUB132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+19008, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUB312PS = {
+    {I_VFNMSUB312PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38801, 204},
+    {I_VFNMSUB312PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38808, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUB312PD = {
+    {I_VFNMSUB312PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38815, 204},
+    {I_VFNMSUB312PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38822, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUB213PS = {
+    {I_VFNMSUB213PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38829, 204},
+    {I_VFNMSUB213PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38836, 204},
+    {I_VFNMSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19080, 246},
+    {I_VFNMSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19088, 246},
+    {I_VFNMSUB213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+19096, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUB213PD = {
+    {I_VFNMSUB213PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38843, 204},
+    {I_VFNMSUB213PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38850, 204},
+    {I_VFNMSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19056, 246},
+    {I_VFNMSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19064, 246},
+    {I_VFNMSUB213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+19072, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUB123PS = {
+    {I_VFNMSUB123PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38829, 204},
+    {I_VFNMSUB123PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38836, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUB123PD = {
+    {I_VFNMSUB123PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38843, 204},
+    {I_VFNMSUB123PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38850, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUB231PS = {
+    {I_VFNMSUB231PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38857, 204},
+    {I_VFNMSUB231PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38864, 204},
+    {I_VFNMSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19144, 246},
+    {I_VFNMSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19152, 246},
+    {I_VFNMSUB231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+19160, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUB231PD = {
+    {I_VFNMSUB231PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38871, 204},
+    {I_VFNMSUB231PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38878, 204},
+    {I_VFNMSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19120, 246},
+    {I_VFNMSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19128, 246},
+    {I_VFNMSUB231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+19136, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUB321PS = {
+    {I_VFNMSUB321PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38857, 204},
+    {I_VFNMSUB321PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38864, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUB321PD = {
+    {I_VFNMSUB321PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38871, 204},
+    {I_VFNMSUB321PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38878, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD132SS = {
+    {I_VFMADD132SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38885, 204},
+    {I_VFMADD132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18184, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD132SD = {
+    {I_VFMADD132SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38892, 204},
+    {I_VFMADD132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18176, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD312SS = {
+    {I_VFMADD312SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38885, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD312SD = {
+    {I_VFMADD312SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38892, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD213SS = {
+    {I_VFMADD213SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38899, 204},
+    {I_VFMADD213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18248, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD213SD = {
+    {I_VFMADD213SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38906, 204},
+    {I_VFMADD213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18240, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD123SS = {
+    {I_VFMADD123SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38899, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD123SD = {
+    {I_VFMADD123SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38906, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD231SS = {
+    {I_VFMADD231SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38913, 204},
+    {I_VFMADD231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18312, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD231SD = {
+    {I_VFMADD231SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38920, 204},
+    {I_VFMADD231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18304, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD321SS = {
+    {I_VFMADD321SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38913, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD321SD = {
+    {I_VFMADD321SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38920, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB132SS = {
+    {I_VFMSUB132SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38927, 204},
+    {I_VFMSUB132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18520, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB132SD = {
+    {I_VFMSUB132SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38934, 204},
+    {I_VFMSUB132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18512, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB312SS = {
+    {I_VFMSUB312SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38927, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB312SD = {
+    {I_VFMSUB312SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38934, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB213SS = {
+    {I_VFMSUB213SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38941, 204},
+    {I_VFMSUB213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18584, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB213SD = {
+    {I_VFMSUB213SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38948, 204},
+    {I_VFMSUB213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18576, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB123SS = {
+    {I_VFMSUB123SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38941, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB123SD = {
+    {I_VFMSUB123SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38948, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB231SS = {
+    {I_VFMSUB231SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38955, 204},
+    {I_VFMSUB231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18648, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB231SD = {
+    {I_VFMSUB231SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38962, 204},
+    {I_VFMSUB231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18640, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB321SS = {
+    {I_VFMSUB321SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38955, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB321SD = {
+    {I_VFMSUB321SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38962, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADD132SS = {
+    {I_VFNMADD132SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38969, 204},
+    {I_VFNMADD132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18856, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADD132SD = {
+    {I_VFNMADD132SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38976, 204},
+    {I_VFNMADD132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18848, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADD312SS = {
+    {I_VFNMADD312SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38969, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADD312SD = {
+    {I_VFNMADD312SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38976, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADD213SS = {
+    {I_VFNMADD213SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38983, 204},
+    {I_VFNMADD213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18920, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADD213SD = {
+    {I_VFNMADD213SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38990, 204},
+    {I_VFNMADD213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18912, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADD123SS = {
+    {I_VFNMADD123SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38983, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADD123SD = {
+    {I_VFNMADD123SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38990, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADD231SS = {
+    {I_VFNMADD231SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38997, 204},
+    {I_VFNMADD231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18984, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADD231SD = {
+    {I_VFNMADD231SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+39004, 204},
+    {I_VFNMADD231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18976, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADD321SS = {
+    {I_VFNMADD321SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38997, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADD321SD = {
+    {I_VFNMADD321SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+39004, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUB132SS = {
+    {I_VFNMSUB132SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+39011, 204},
+    {I_VFNMSUB132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+19048, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUB132SD = {
+    {I_VFNMSUB132SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+39018, 204},
+    {I_VFNMSUB132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+19040, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUB312SS = {
+    {I_VFNMSUB312SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+39011, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUB312SD = {
+    {I_VFNMSUB312SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+39018, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUB213SS = {
+    {I_VFNMSUB213SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+39025, 204},
+    {I_VFNMSUB213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+19112, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUB213SD = {
+    {I_VFNMSUB213SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+39032, 204},
+    {I_VFNMSUB213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+19104, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUB123SS = {
+    {I_VFNMSUB123SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+39025, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUB123SD = {
+    {I_VFNMSUB123SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+39032, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUB231SS = {
+    {I_VFNMSUB231SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+39039, 204},
+    {I_VFNMSUB231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+19176, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUB231SD = {
+    {I_VFNMSUB231SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+39046, 204},
+    {I_VFNMSUB231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+19168, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUB321SS = {
+    {I_VFNMSUB321SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+39039, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUB321SD = {
+    {I_VFNMSUB321SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+39046, 204},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RDFSBASE = {
+    {I_RDFSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39053, 139},
+    {I_RDFSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39060, 139},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RDGSBASE = {
+    {I_RDGSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39067, 139},
+    {I_RDGSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39074, 139},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RDRAND = {
+    {I_RDRAND, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45863, 138},
+    {I_RDRAND, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45869, 138},
+    {I_RDRAND, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45875, 139},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_WRFSBASE = {
+    {I_WRFSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39081, 139},
+    {I_WRFSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39088, 139},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_WRGSBASE = {
+    {I_WRGSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39095, 139},
+    {I_WRGSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39102, 139},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTPH2PS = {
+    {I_VCVTPH2PS, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39109, 205},
+    {I_VCVTPH2PS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+39116, 205},
+    {I_VCVTPH2PS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17248, 246},
+    {I_VCVTPH2PS, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17256, 246},
+    {I_VCVTPH2PS, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+17264, 247},
+    {I_VCVTPH2PS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+39116, 303},
+    {I_VCVTPH2PS, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39109, 303},
+    {I_VCVTPH2PS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17248, 246},
+    {I_VCVTPH2PS, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17256, 246},
+    {I_VCVTPH2PS, 2, {ZMM_L16,RM_YMM_L16|BITS256,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+17264, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTPS2PH = {
+    {I_VCVTPS2PH, 3, {RM_XMM_L16|BITS128,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14224, 205},
+    {I_VCVTPS2PH, 3, {RM_XMM_L16|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14232, 205},
+    {I_VCVTPS2PH, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8182, 246},
+    {I_VCVTPS2PH, 3, {XMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8191, 246},
+    {I_VCVTPS2PH, 3, {YMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+8200, 247},
+    {I_VCVTPS2PH, 3, {MEMORY|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8182, 246},
+    {I_VCVTPS2PH, 3, {MEMORY|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8191, 246},
+    {I_VCVTPS2PH, 3, {MEMORY|BITS256,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,SAE,0,0,0}, nasm_bytecodes+8200, 247},
+    {I_VCVTPS2PH, 3, {RM_XMM_L16|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14232, 304},
+    {I_VCVTPS2PH, 3, {RM_XMM_L16|BITS128,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14224, 304},
+    {I_VCVTPS2PH, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8182, 246},
+    {I_VCVTPS2PH, 3, {MEMORY|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8182, 246},
+    {I_VCVTPS2PH, 3, {XMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8191, 246},
+    {I_VCVTPS2PH, 3, {MEMORY|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8191, 246},
+    {I_VCVTPS2PH, 3, {YMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+8200, 247},
+    {I_VCVTPS2PH, 3, {MEMORY|BITS256,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,SAE,0,0,0}, nasm_bytecodes+8200, 247},
+    {I_VCVTPS2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30512, 301},
+    {I_VCVTPS2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30520, 301},
+    {I_VCVTPS2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+30528, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ADCX = {
+    {I_ADCX, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+14240, 138},
+    {I_ADCX, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+14248, 139},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ADOX = {
+    {I_ADOX, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+14256, 138},
+    {I_ADOX, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+14264, 139},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RDSEED = {
+    {I_RDSEED, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45881, 138},
+    {I_RDSEED, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45887, 138},
+    {I_RDSEED, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45893, 139},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CLAC = {
+    {I_CLAC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45899, 206},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_STAC = {
+    {I_STAC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45905, 206},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XSTORE = {
+    {I_XSTORE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49263, 32},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XCRYPTECB = {
+    {I_XCRYPTECB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45911, 32},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XCRYPTCBC = {
+    {I_XCRYPTCBC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45917, 32},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XCRYPTCTR = {
+    {I_XCRYPTCTR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45923, 32},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XCRYPTCFB = {
+    {I_XCRYPTCFB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45929, 32},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XCRYPTOFB = {
+    {I_XCRYPTOFB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45935, 32},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MONTMUL = {
+    {I_MONTMUL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45941, 32},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XSHA1 = {
+    {I_XSHA1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45947, 32},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XSHA256 = {
+    {I_XSHA256, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45953, 32},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LLWPCB = {
+    {I_LLWPCB, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39123, 207},
+    {I_LLWPCB, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39130, 208},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SLWPCB = {
+    {I_SLWPCB, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39137, 207},
+    {I_SLWPCB, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39144, 208},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LWPVAL = {
+    {I_LWPVAL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14272, 207},
+    {I_LWPVAL, 3, {REG_GPR|BITS64,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14280, 208},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LWPINS = {
+    {I_LWPINS, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14288, 207},
+    {I_LWPINS, 3, {REG_GPR|BITS64,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14296, 208},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADDPD = {
+    {I_VFMADDPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14304, 209},
+    {I_VFMADDPD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14312, 209},
+    {I_VFMADDPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14320, 209},
+    {I_VFMADDPD, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14328, 209},
+    {I_VFMADDPD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14336, 209},
+    {I_VFMADDPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14344, 209},
+    {I_VFMADDPD, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14352, 209},
+    {I_VFMADDPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+14360, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADDPS = {
+    {I_VFMADDPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14368, 209},
+    {I_VFMADDPS, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14376, 209},
+    {I_VFMADDPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14384, 209},
+    {I_VFMADDPS, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14392, 209},
+    {I_VFMADDPS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14400, 209},
+    {I_VFMADDPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14408, 209},
+    {I_VFMADDPS, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14416, 209},
+    {I_VFMADDPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+14424, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADDSD = {
+    {I_VFMADDSD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14432, 209},
+    {I_VFMADDSD, 3, {XMM_L16,RM_XMM_L16|BITS64,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14440, 209},
+    {I_VFMADDSD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0}, NO_DECORATOR, nasm_bytecodes+14448, 209},
+    {I_VFMADDSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14456, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADDSS = {
+    {I_VFMADDSS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14464, 209},
+    {I_VFMADDSS, 3, {XMM_L16,RM_XMM_L16|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14472, 209},
+    {I_VFMADDSS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0}, NO_DECORATOR, nasm_bytecodes+14480, 209},
+    {I_VFMADDSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14488, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADDSUBPD = {
+    {I_VFMADDSUBPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14496, 209},
+    {I_VFMADDSUBPD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14504, 209},
+    {I_VFMADDSUBPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14512, 209},
+    {I_VFMADDSUBPD, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14520, 209},
+    {I_VFMADDSUBPD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14528, 209},
+    {I_VFMADDSUBPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14536, 209},
+    {I_VFMADDSUBPD, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14544, 209},
+    {I_VFMADDSUBPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+14552, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADDSUBPS = {
+    {I_VFMADDSUBPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14560, 209},
+    {I_VFMADDSUBPS, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14568, 209},
+    {I_VFMADDSUBPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14576, 209},
+    {I_VFMADDSUBPS, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14584, 209},
+    {I_VFMADDSUBPS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14592, 209},
+    {I_VFMADDSUBPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14600, 209},
+    {I_VFMADDSUBPS, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14608, 209},
+    {I_VFMADDSUBPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+14616, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUBADDPD = {
+    {I_VFMSUBADDPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14624, 209},
+    {I_VFMSUBADDPD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14632, 209},
+    {I_VFMSUBADDPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14640, 209},
+    {I_VFMSUBADDPD, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14648, 209},
+    {I_VFMSUBADDPD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14656, 209},
+    {I_VFMSUBADDPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14664, 209},
+    {I_VFMSUBADDPD, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14672, 209},
+    {I_VFMSUBADDPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+14680, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUBADDPS = {
+    {I_VFMSUBADDPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14688, 209},
+    {I_VFMSUBADDPS, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14696, 209},
+    {I_VFMSUBADDPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14704, 209},
+    {I_VFMSUBADDPS, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14712, 209},
+    {I_VFMSUBADDPS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14720, 209},
+    {I_VFMSUBADDPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14728, 209},
+    {I_VFMSUBADDPS, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14736, 209},
+    {I_VFMSUBADDPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+14744, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUBPD = {
+    {I_VFMSUBPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14752, 209},
+    {I_VFMSUBPD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14760, 209},
+    {I_VFMSUBPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14768, 209},
+    {I_VFMSUBPD, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14776, 209},
+    {I_VFMSUBPD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14784, 209},
+    {I_VFMSUBPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14792, 209},
+    {I_VFMSUBPD, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14800, 209},
+    {I_VFMSUBPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+14808, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUBPS = {
+    {I_VFMSUBPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14816, 209},
+    {I_VFMSUBPS, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14824, 209},
+    {I_VFMSUBPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14832, 209},
+    {I_VFMSUBPS, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14840, 209},
+    {I_VFMSUBPS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14848, 209},
+    {I_VFMSUBPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14856, 209},
+    {I_VFMSUBPS, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14864, 209},
+    {I_VFMSUBPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+14872, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUBSD = {
+    {I_VFMSUBSD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14880, 209},
+    {I_VFMSUBSD, 3, {XMM_L16,RM_XMM_L16|BITS64,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14888, 209},
+    {I_VFMSUBSD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0}, NO_DECORATOR, nasm_bytecodes+14896, 209},
+    {I_VFMSUBSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14904, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUBSS = {
+    {I_VFMSUBSS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14912, 209},
+    {I_VFMSUBSS, 3, {XMM_L16,RM_XMM_L16|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14920, 209},
+    {I_VFMSUBSS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0}, NO_DECORATOR, nasm_bytecodes+14928, 209},
+    {I_VFMSUBSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14936, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADDPD = {
+    {I_VFNMADDPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14944, 209},
+    {I_VFNMADDPD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14952, 209},
+    {I_VFNMADDPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14960, 209},
+    {I_VFNMADDPD, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14968, 209},
+    {I_VFNMADDPD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14976, 209},
+    {I_VFNMADDPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14984, 209},
+    {I_VFNMADDPD, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14992, 209},
+    {I_VFNMADDPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+15000, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADDPS = {
+    {I_VFNMADDPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15008, 209},
+    {I_VFNMADDPS, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15016, 209},
+    {I_VFNMADDPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15024, 209},
+    {I_VFNMADDPS, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15032, 209},
+    {I_VFNMADDPS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+15040, 209},
+    {I_VFNMADDPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+15048, 209},
+    {I_VFNMADDPS, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+15056, 209},
+    {I_VFNMADDPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+15064, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADDSD = {
+    {I_VFNMADDSD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15072, 209},
+    {I_VFNMADDSD, 3, {XMM_L16,RM_XMM_L16|BITS64,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15080, 209},
+    {I_VFNMADDSD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0}, NO_DECORATOR, nasm_bytecodes+15088, 209},
+    {I_VFNMADDSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15096, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMADDSS = {
+    {I_VFNMADDSS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15104, 209},
+    {I_VFNMADDSS, 3, {XMM_L16,RM_XMM_L16|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15112, 209},
+    {I_VFNMADDSS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0}, NO_DECORATOR, nasm_bytecodes+15120, 209},
+    {I_VFNMADDSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15128, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUBPD = {
+    {I_VFNMSUBPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15136, 209},
+    {I_VFNMSUBPD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15144, 209},
+    {I_VFNMSUBPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15152, 209},
+    {I_VFNMSUBPD, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15160, 209},
+    {I_VFNMSUBPD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+15168, 209},
+    {I_VFNMSUBPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+15176, 209},
+    {I_VFNMSUBPD, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+15184, 209},
+    {I_VFNMSUBPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+15192, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUBPS = {
+    {I_VFNMSUBPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15200, 209},
+    {I_VFNMSUBPS, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15208, 209},
+    {I_VFNMSUBPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15216, 209},
+    {I_VFNMSUBPS, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15224, 209},
+    {I_VFNMSUBPS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+15232, 209},
+    {I_VFNMSUBPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+15240, 209},
+    {I_VFNMSUBPS, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+15248, 209},
+    {I_VFNMSUBPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+15256, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUBSD = {
+    {I_VFNMSUBSD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15264, 209},
+    {I_VFNMSUBSD, 3, {XMM_L16,RM_XMM_L16|BITS64,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15272, 209},
+    {I_VFNMSUBSD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0}, NO_DECORATOR, nasm_bytecodes+15280, 209},
+    {I_VFNMSUBSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15288, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFNMSUBSS = {
+    {I_VFNMSUBSS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15296, 209},
+    {I_VFNMSUBSS, 3, {XMM_L16,RM_XMM_L16|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15304, 209},
+    {I_VFNMSUBSS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0}, NO_DECORATOR, nasm_bytecodes+15312, 209},
+    {I_VFNMSUBSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15320, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFRCZPD = {
+    {I_VFRCZPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39151, 209},
+    {I_VFRCZPD, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39158, 209},
+    {I_VFRCZPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39165, 209},
+    {I_VFRCZPD, 1, {YMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39172, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFRCZPS = {
+    {I_VFRCZPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39179, 209},
+    {I_VFRCZPS, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39186, 209},
+    {I_VFRCZPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39193, 209},
+    {I_VFRCZPS, 1, {YMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39200, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFRCZSD = {
+    {I_VFRCZSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+39207, 209},
+    {I_VFRCZSD, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39214, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFRCZSS = {
+    {I_VFRCZSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+39221, 209},
+    {I_VFRCZSS, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39228, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMOV = {
+    {I_VPCMOV, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15328, 209},
+    {I_VPCMOV, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15336, 209},
+    {I_VPCMOV, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15344, 209},
+    {I_VPCMOV, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15352, 209},
+    {I_VPCMOV, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+15360, 209},
+    {I_VPCMOV, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+15368, 209},
+    {I_VPCMOV, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+15376, 209},
+    {I_VPCMOV, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+15384, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCOMB = {
+    {I_VPCOMB, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15392, 209},
+    {I_VPCOMB, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15400, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCOMD = {
+    {I_VPCOMD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15408, 209},
+    {I_VPCOMD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15416, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCOMQ = {
+    {I_VPCOMQ, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15424, 209},
+    {I_VPCOMQ, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15432, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCOMUB = {
+    {I_VPCOMUB, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15440, 209},
+    {I_VPCOMUB, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15448, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCOMUD = {
+    {I_VPCOMUD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15456, 209},
+    {I_VPCOMUD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15464, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCOMUQ = {
+    {I_VPCOMUQ, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15472, 209},
+    {I_VPCOMUQ, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15480, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCOMUW = {
+    {I_VPCOMUW, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15488, 209},
+    {I_VPCOMUW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15496, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCOMW = {
+    {I_VPCOMW, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15504, 209},
+    {I_VPCOMW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15512, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPHADDBD = {
+    {I_VPHADDBD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39235, 209},
+    {I_VPHADDBD, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39242, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPHADDBQ = {
+    {I_VPHADDBQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39249, 209},
+    {I_VPHADDBQ, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39256, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPHADDBW = {
+    {I_VPHADDBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39263, 209},
+    {I_VPHADDBW, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39270, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPHADDDQ = {
+    {I_VPHADDDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39277, 209},
+    {I_VPHADDDQ, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39284, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPHADDUBD = {
+    {I_VPHADDUBD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39291, 209},
+    {I_VPHADDUBD, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39298, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPHADDUBQ = {
+    {I_VPHADDUBQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39305, 209},
+    {I_VPHADDUBQ, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39312, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPHADDUBW = {
+    {I_VPHADDUBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39319, 209},
+    {I_VPHADDUBW, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39326, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPHADDUDQ = {
+    {I_VPHADDUDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39333, 209},
+    {I_VPHADDUDQ, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39340, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPHADDUWD = {
+    {I_VPHADDUWD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39347, 209},
+    {I_VPHADDUWD, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39354, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPHADDUWQ = {
+    {I_VPHADDUWQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39361, 209},
+    {I_VPHADDUWQ, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39368, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPHADDWD = {
+    {I_VPHADDWD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39375, 209},
+    {I_VPHADDWD, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39382, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPHADDWQ = {
+    {I_VPHADDWQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39389, 209},
+    {I_VPHADDWQ, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39396, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPHSUBBW = {
+    {I_VPHSUBBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39403, 209},
+    {I_VPHSUBBW, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39410, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPHSUBDQ = {
+    {I_VPHSUBDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39417, 209},
+    {I_VPHSUBDQ, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39424, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPHSUBWD = {
+    {I_VPHSUBWD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39431, 209},
+    {I_VPHSUBWD, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39438, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMACSDD = {
+    {I_VPMACSDD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15520, 209},
+    {I_VPMACSDD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15528, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMACSDQH = {
+    {I_VPMACSDQH, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15536, 209},
+    {I_VPMACSDQH, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15544, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMACSDQL = {
+    {I_VPMACSDQL, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15552, 209},
+    {I_VPMACSDQL, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15560, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMACSSDD = {
+    {I_VPMACSSDD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15568, 209},
+    {I_VPMACSSDD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15576, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMACSSDQH = {
+    {I_VPMACSSDQH, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15584, 209},
+    {I_VPMACSSDQH, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15592, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMACSSDQL = {
+    {I_VPMACSSDQL, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15600, 209},
+    {I_VPMACSSDQL, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15608, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMACSSWD = {
+    {I_VPMACSSWD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15616, 209},
+    {I_VPMACSSWD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15624, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMACSSWW = {
+    {I_VPMACSSWW, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15632, 209},
+    {I_VPMACSSWW, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15640, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMACSWD = {
+    {I_VPMACSWD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15648, 209},
+    {I_VPMACSWD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15656, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMACSWW = {
+    {I_VPMACSWW, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15664, 209},
+    {I_VPMACSWW, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15672, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMADCSSWD = {
+    {I_VPMADCSSWD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15680, 209},
+    {I_VPMADCSSWD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15688, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMADCSWD = {
+    {I_VPMADCSWD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15696, 209},
+    {I_VPMADCSWD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15704, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPPERM = {
+    {I_VPPERM, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+15712, 209},
+    {I_VPPERM, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+15720, 209},
+    {I_VPPERM, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15728, 209},
+    {I_VPPERM, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15736, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPROTB = {
+    {I_VPROTB, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39445, 209},
+    {I_VPROTB, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39452, 209},
+    {I_VPROTB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39459, 209},
+    {I_VPROTB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39466, 209},
+    {I_VPROTB, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15744, 209},
+    {I_VPROTB, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15752, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPROTD = {
+    {I_VPROTD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39473, 209},
+    {I_VPROTD, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39480, 209},
+    {I_VPROTD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39487, 209},
+    {I_VPROTD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39494, 209},
+    {I_VPROTD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15760, 209},
+    {I_VPROTD, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15768, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPROTQ = {
+    {I_VPROTQ, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39501, 209},
+    {I_VPROTQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39508, 209},
+    {I_VPROTQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39515, 209},
+    {I_VPROTQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39522, 209},
+    {I_VPROTQ, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15776, 209},
+    {I_VPROTQ, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15784, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPROTW = {
+    {I_VPROTW, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39529, 209},
+    {I_VPROTW, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39536, 209},
+    {I_VPROTW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39543, 209},
+    {I_VPROTW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39550, 209},
+    {I_VPROTW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15792, 209},
+    {I_VPROTW, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15800, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSHAB = {
+    {I_VPSHAB, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39557, 209},
+    {I_VPSHAB, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39564, 209},
+    {I_VPSHAB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39571, 209},
+    {I_VPSHAB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39578, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSHAD = {
+    {I_VPSHAD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39585, 209},
+    {I_VPSHAD, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39592, 209},
+    {I_VPSHAD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39599, 209},
+    {I_VPSHAD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39606, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSHAQ = {
+    {I_VPSHAQ, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39613, 209},
+    {I_VPSHAQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39620, 209},
+    {I_VPSHAQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39627, 209},
+    {I_VPSHAQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39634, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSHAW = {
+    {I_VPSHAW, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39641, 209},
+    {I_VPSHAW, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39648, 209},
+    {I_VPSHAW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39655, 209},
+    {I_VPSHAW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39662, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSHLB = {
+    {I_VPSHLB, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39669, 209},
+    {I_VPSHLB, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39676, 209},
+    {I_VPSHLB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39683, 209},
+    {I_VPSHLB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39690, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSHLD = {
+    {I_VPSHLD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39697, 209},
+    {I_VPSHLD, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39704, 209},
+    {I_VPSHLD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39711, 209},
+    {I_VPSHLD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39718, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSHLQ = {
+    {I_VPSHLQ, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39725, 209},
+    {I_VPSHLQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39732, 209},
+    {I_VPSHLQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39739, 209},
+    {I_VPSHLQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39746, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSHLW = {
+    {I_VPSHLW, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39753, 209},
+    {I_VPSHLW, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39760, 209},
+    {I_VPSHLW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39767, 209},
+    {I_VPSHLW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39774, 209},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VBROADCASTI128 = {
+    {I_VBROADCASTI128, 2, {YMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41048, 210},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPBLENDD = {
+    {I_VPBLENDD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+16056, 210},
+    {I_VPBLENDD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16064, 210},
+    {I_VPBLENDD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+16072, 210},
+    {I_VPBLENDD, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16080, 210},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPBROADCASTB = {
+    {I_VPBROADCASTB, 2, {XMM_L16,MEMORY|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+41055, 210},
+    {I_VPBROADCASTB, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41055, 210},
+    {I_VPBROADCASTB, 2, {YMM_L16,MEMORY|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+41062, 210},
+    {I_VPBROADCASTB, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41062, 210},
+    {I_VPBROADCASTB, 2, {XMMREG,RM_XMM|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21800, 250},
+    {I_VPBROADCASTB, 2, {YMMREG,RM_XMM|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21808, 250},
+    {I_VPBROADCASTB, 2, {ZMMREG,RM_XMM|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21816, 251},
+    {I_VPBROADCASTB, 2, {XMMREG,REG_GPR|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21824, 250},
+    {I_VPBROADCASTB, 2, {XMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21824, 250},
+    {I_VPBROADCASTB, 2, {XMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21824, 250},
+    {I_VPBROADCASTB, 2, {XMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21824, 250},
+    {I_VPBROADCASTB, 2, {YMMREG,REG_GPR|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21832, 250},
+    {I_VPBROADCASTB, 2, {YMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21832, 250},
+    {I_VPBROADCASTB, 2, {YMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21832, 250},
+    {I_VPBROADCASTB, 2, {YMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21832, 250},
+    {I_VPBROADCASTB, 2, {ZMMREG,REG_GPR|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21840, 251},
+    {I_VPBROADCASTB, 2, {ZMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21840, 251},
+    {I_VPBROADCASTB, 2, {ZMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21840, 251},
+    {I_VPBROADCASTB, 2, {ZMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21840, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPBROADCASTW = {
+    {I_VPBROADCASTW, 2, {XMM_L16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41069, 210},
+    {I_VPBROADCASTW, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41069, 210},
+    {I_VPBROADCASTW, 2, {YMM_L16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41076, 210},
+    {I_VPBROADCASTW, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41076, 210},
+    {I_VPBROADCASTW, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22040, 250},
+    {I_VPBROADCASTW, 2, {YMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22048, 250},
+    {I_VPBROADCASTW, 2, {ZMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22056, 251},
+    {I_VPBROADCASTW, 2, {XMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22064, 250},
+    {I_VPBROADCASTW, 2, {XMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22064, 250},
+    {I_VPBROADCASTW, 2, {XMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22064, 250},
+    {I_VPBROADCASTW, 2, {YMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22072, 250},
+    {I_VPBROADCASTW, 2, {YMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22072, 250},
+    {I_VPBROADCASTW, 2, {YMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22072, 250},
+    {I_VPBROADCASTW, 2, {ZMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22080, 251},
+    {I_VPBROADCASTW, 2, {ZMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22080, 251},
+    {I_VPBROADCASTW, 2, {ZMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22080, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPBROADCASTD = {
+    {I_VPBROADCASTD, 2, {XMM_L16,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41083, 210},
+    {I_VPBROADCASTD, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41083, 210},
+    {I_VPBROADCASTD, 2, {YMM_L16,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41090, 210},
+    {I_VPBROADCASTD, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41090, 210},
+    {I_VPBROADCASTD, 2, {XMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21848, 246},
+    {I_VPBROADCASTD, 2, {YMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21856, 246},
+    {I_VPBROADCASTD, 2, {ZMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21864, 247},
+    {I_VPBROADCASTD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21872, 246},
+    {I_VPBROADCASTD, 2, {YMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21880, 246},
+    {I_VPBROADCASTD, 2, {ZMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21888, 247},
+    {I_VPBROADCASTD, 2, {XMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21896, 246},
+    {I_VPBROADCASTD, 2, {YMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21904, 246},
+    {I_VPBROADCASTD, 2, {ZMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21912, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPBROADCASTQ = {
+    {I_VPBROADCASTQ, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41097, 210},
+    {I_VPBROADCASTQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41097, 210},
+    {I_VPBROADCASTQ, 2, {YMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41104, 210},
+    {I_VPBROADCASTQ, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41104, 210},
+    {I_VPBROADCASTQ, 2, {XMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21968, 246},
+    {I_VPBROADCASTQ, 2, {YMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21976, 246},
+    {I_VPBROADCASTQ, 2, {ZMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21984, 247},
+    {I_VPBROADCASTQ, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21992, 246},
+    {I_VPBROADCASTQ, 2, {YMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22000, 246},
+    {I_VPBROADCASTQ, 2, {ZMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22008, 247},
+    {I_VPBROADCASTQ, 2, {XMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22016, 246},
+    {I_VPBROADCASTQ, 2, {YMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22024, 246},
+    {I_VPBROADCASTQ, 2, {ZMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22032, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERMD = {
+    {I_VPERMD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41111, 210},
+    {I_VPERMD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41118, 210},
+    {I_VPERMD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22472, 246},
+    {I_VPERMD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22480, 246},
+    {I_VPERMD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22488, 247},
+    {I_VPERMD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22496, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERMPD = {
+    {I_VPERMPD, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16088, 210},
+    {I_VPERMPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9514, 246},
+    {I_VPERMPD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9523, 247},
+    {I_VPERMPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22744, 246},
+    {I_VPERMPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22752, 246},
+    {I_VPERMPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22760, 247},
+    {I_VPERMPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22768, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERMPS = {
+    {I_VPERMPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41125, 210},
+    {I_VPERMPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41132, 210},
+    {I_VPERMPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22776, 246},
+    {I_VPERMPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22784, 246},
+    {I_VPERMPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22792, 247},
+    {I_VPERMPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22800, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERMQ = {
+    {I_VPERMQ, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16096, 210},
+    {I_VPERMQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9532, 246},
+    {I_VPERMQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9541, 247},
+    {I_VPERMQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22808, 246},
+    {I_VPERMQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22816, 246},
+    {I_VPERMQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22824, 247},
+    {I_VPERMQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22832, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERM2I128 = {
+    {I_VPERM2I128, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+16104, 210},
+    {I_VPERM2I128, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16112, 210},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VEXTRACTI128 = {
+    {I_VEXTRACTI128, 3, {RM_XMM_L16|BITS128,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16120, 210},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VINSERTI128 = {
+    {I_VINSERTI128, 4, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+16128, 210},
+    {I_VINSERTI128, 3, {YMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16136, 210},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMASKMOVD = {
+    {I_VPMASKMOVD, 3, {XMM_L16,XMM_L16,MEMORY|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41139, 210},
+    {I_VPMASKMOVD, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41146, 210},
+    {I_VPMASKMOVD, 3, {YMM_L16,YMM_L16,MEMORY|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41153, 210},
+    {I_VPMASKMOVD, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41160, 210},
+    {I_VPMASKMOVD, 3, {MEMORY|BITS128,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+41195, 210},
+    {I_VPMASKMOVD, 2, {MEMORY|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41202, 210},
+    {I_VPMASKMOVD, 3, {MEMORY|BITS256,YMM_L16,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+41209, 210},
+    {I_VPMASKMOVD, 2, {MEMORY|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41216, 210},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMASKMOVQ = {
+    {I_VPMASKMOVQ, 3, {XMM_L16,XMM_L16,MEMORY|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41167, 210},
+    {I_VPMASKMOVQ, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41174, 210},
+    {I_VPMASKMOVQ, 3, {YMM_L16,YMM_L16,MEMORY|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41181, 210},
+    {I_VPMASKMOVQ, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41188, 210},
+    {I_VPMASKMOVQ, 3, {MEMORY|BITS128,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+41223, 210},
+    {I_VPMASKMOVQ, 2, {MEMORY|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41230, 210},
+    {I_VPMASKMOVQ, 3, {MEMORY|BITS256,YMM_L16,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+41237, 210},
+    {I_VPMASKMOVQ, 2, {MEMORY|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41244, 210},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSLLVD = {
+    {I_VPSLLVD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41251, 210},
+    {I_VPSLLVD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41258, 210},
+    {I_VPSLLVD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41279, 210},
+    {I_VPSLLVD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41286, 210},
+    {I_VPSLLVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26296, 246},
+    {I_VPSLLVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26304, 246},
+    {I_VPSLLVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26312, 246},
+    {I_VPSLLVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26320, 246},
+    {I_VPSLLVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26328, 247},
+    {I_VPSLLVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26336, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSLLVQ = {
+    {I_VPSLLVQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41265, 210},
+    {I_VPSLLVQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41272, 210},
+    {I_VPSLLVQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41293, 210},
+    {I_VPSLLVQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41300, 210},
+    {I_VPSLLVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26344, 246},
+    {I_VPSLLVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26352, 246},
+    {I_VPSLLVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26360, 246},
+    {I_VPSLLVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26368, 246},
+    {I_VPSLLVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26376, 247},
+    {I_VPSLLVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26384, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSRAVD = {
+    {I_VPSRAVD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41307, 210},
+    {I_VPSRAVD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41314, 210},
+    {I_VPSRAVD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41321, 210},
+    {I_VPSRAVD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41328, 210},
+    {I_VPSRAVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26584, 246},
+    {I_VPSRAVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26592, 246},
+    {I_VPSRAVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26600, 246},
+    {I_VPSRAVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26608, 246},
+    {I_VPSRAVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26616, 247},
+    {I_VPSRAVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26624, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSRLVD = {
+    {I_VPSRLVD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41335, 210},
+    {I_VPSRLVD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41342, 210},
+    {I_VPSRLVD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41363, 210},
+    {I_VPSRLVD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41370, 210},
+    {I_VPSRLVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26872, 246},
+    {I_VPSRLVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26880, 246},
+    {I_VPSRLVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26888, 246},
+    {I_VPSRLVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26896, 246},
+    {I_VPSRLVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26904, 247},
+    {I_VPSRLVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26912, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSRLVQ = {
+    {I_VPSRLVQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41349, 210},
+    {I_VPSRLVQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41356, 210},
+    {I_VPSRLVQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41377, 210},
+    {I_VPSRLVQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41384, 210},
+    {I_VPSRLVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26920, 246},
+    {I_VPSRLVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26928, 246},
+    {I_VPSRLVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26936, 246},
+    {I_VPSRLVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26944, 246},
+    {I_VPSRLVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26952, 247},
+    {I_VPSRLVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26960, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGATHERDPD = {
+    {I_VGATHERDPD, 3, {XMM_L16,XMEM|BITS64,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16144, 210},
+    {I_VGATHERDPD, 3, {YMM_L16,XMEM|BITS64,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16160, 210},
+    {I_VGATHERDPD, 2, {XMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8704, 246},
+    {I_VGATHERDPD, 2, {YMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8713, 246},
+    {I_VGATHERDPD, 2, {ZMMREG,YMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8722, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGATHERQPD = {
+    {I_VGATHERQPD, 3, {XMM_L16,XMEM|BITS64,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16152, 210},
+    {I_VGATHERQPD, 3, {YMM_L16,YMEM|BITS64,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16168, 210},
+    {I_VGATHERQPD, 2, {XMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8830, 246},
+    {I_VGATHERQPD, 2, {YMMREG,YMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8839, 246},
+    {I_VGATHERQPD, 2, {ZMMREG,ZMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8848, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGATHERDPS = {
+    {I_VGATHERDPS, 3, {XMM_L16,XMEM|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16176, 210},
+    {I_VGATHERDPS, 3, {YMM_L16,YMEM|BITS32,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16192, 210},
+    {I_VGATHERDPS, 2, {XMMREG,XMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8731, 246},
+    {I_VGATHERDPS, 2, {YMMREG,YMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8740, 246},
+    {I_VGATHERDPS, 2, {ZMMREG,ZMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8749, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGATHERQPS = {
+    {I_VGATHERQPS, 3, {XMM_L16,XMEM|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16184, 210},
+    {I_VGATHERQPS, 3, {XMM_L16,YMEM|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16200, 210},
+    {I_VGATHERQPS, 2, {XMMREG,XMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8857, 246},
+    {I_VGATHERQPS, 2, {XMMREG,YMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8866, 246},
+    {I_VGATHERQPS, 2, {YMMREG,ZMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8875, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPGATHERDD = {
+    {I_VPGATHERDD, 3, {XMM_L16,XMEM|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16208, 210},
+    {I_VPGATHERDD, 3, {YMM_L16,YMEM|BITS32,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16224, 210},
+    {I_VPGATHERDD, 2, {XMMREG,XMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9595, 246},
+    {I_VPGATHERDD, 2, {YMMREG,YMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9604, 246},
+    {I_VPGATHERDD, 2, {ZMMREG,ZMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9613, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPGATHERQD = {
+    {I_VPGATHERQD, 3, {XMM_L16,XMEM|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16216, 210},
+    {I_VPGATHERQD, 3, {XMM_L16,YMEM|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16232, 210},
+    {I_VPGATHERQD, 2, {XMMREG,XMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9649, 246},
+    {I_VPGATHERQD, 2, {XMMREG,YMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9658, 246},
+    {I_VPGATHERQD, 2, {YMMREG,ZMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9667, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPGATHERDQ = {
+    {I_VPGATHERDQ, 3, {XMM_L16,XMEM|BITS64,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16240, 210},
+    {I_VPGATHERDQ, 3, {YMM_L16,XMEM|BITS64,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16256, 210},
+    {I_VPGATHERDQ, 2, {XMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9622, 246},
+    {I_VPGATHERDQ, 2, {YMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9631, 246},
+    {I_VPGATHERDQ, 2, {ZMMREG,YMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9640, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPGATHERQQ = {
+    {I_VPGATHERQQ, 3, {XMM_L16,XMEM|BITS64,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16248, 210},
+    {I_VPGATHERQQ, 3, {YMM_L16,YMEM|BITS64,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16264, 210},
+    {I_VPGATHERQQ, 2, {XMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9676, 246},
+    {I_VPGATHERQQ, 2, {YMMREG,YMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9685, 246},
+    {I_VPGATHERQQ, 2, {ZMMREG,ZMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9694, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XABORT = {
+    {I_XABORT, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49268, 211},
+    {I_XABORT, 1, {IMMEDIATE|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49268, 211},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XBEGIN = {
+    {I_XBEGIN, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45959, 211},
+    {I_XBEGIN, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45959, 211},
+    {I_XBEGIN, 1, {IMMEDIATE|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45965, 212},
+    {I_XBEGIN, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45965, 212},
+    {I_XBEGIN, 1, {IMMEDIATE|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45971, 212},
+    {I_XBEGIN, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45971, 212},
+    {I_XBEGIN, 1, {IMMEDIATE|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45977, 213},
+    {I_XBEGIN, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45977, 213},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XEND = {
+    {I_XEND, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49273, 211},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XTEST = {
+    {I_XTEST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49278, 214},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ANDN = {
+    {I_ANDN, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41391, 215},
+    {I_ANDN, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41398, 216},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BEXTR = {
+    {I_BEXTR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41405, 215},
+    {I_BEXTR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41412, 216},
+    {I_BEXTR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+16272, 217},
+    {I_BEXTR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+16280, 218},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BLCI = {
+    {I_BLCI, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41419, 217},
+    {I_BLCI, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41426, 218},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BLCIC = {
+    {I_BLCIC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41433, 217},
+    {I_BLCIC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41440, 218},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BLSI = {
+    {I_BLSI, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41447, 215},
+    {I_BLSI, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41454, 216},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BLSIC = {
+    {I_BLSIC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41461, 217},
+    {I_BLSIC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41468, 218},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BLCFILL = {
+    {I_BLCFILL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41475, 217},
+    {I_BLCFILL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41482, 218},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BLSFILL = {
+    {I_BLSFILL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41489, 217},
+    {I_BLSFILL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41496, 218},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BLCMSK = {
+    {I_BLCMSK, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41503, 217},
+    {I_BLCMSK, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41510, 218},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BLSMSK = {
+    {I_BLSMSK, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41517, 215},
+    {I_BLSMSK, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41524, 216},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BLSR = {
+    {I_BLSR, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41531, 215},
+    {I_BLSR, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41538, 216},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BLCS = {
+    {I_BLCS, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41545, 217},
+    {I_BLCS, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41552, 218},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BZHI = {
+    {I_BZHI, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41559, 219},
+    {I_BZHI, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41566, 220},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MULX = {
+    {I_MULX, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41573, 219},
+    {I_MULX, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41580, 220},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PDEP = {
+    {I_PDEP, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41587, 219},
+    {I_PDEP, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41594, 220},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PEXT = {
+    {I_PEXT, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41601, 219},
+    {I_PEXT, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41608, 220},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RORX = {
+    {I_RORX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16288, 219},
+    {I_RORX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16296, 220},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SARX = {
+    {I_SARX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41615, 219},
+    {I_SARX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41622, 220},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SHLX = {
+    {I_SHLX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41629, 219},
+    {I_SHLX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41636, 220},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SHRX = {
+    {I_SHRX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41643, 219},
+    {I_SHRX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41650, 220},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_TZCNT = {
+    {I_TZCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41657, 221},
+    {I_TZCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41664, 221},
+    {I_TZCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41671, 222},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_TZMSK = {
+    {I_TZMSK, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41678, 217},
+    {I_TZMSK, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41685, 218},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_T1MSKC = {
+    {I_T1MSKC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41692, 217},
+    {I_T1MSKC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41699, 218},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PREFETCHWT1 = {
+    {I_PREFETCHWT1, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49283, 223},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BNDMK = {
+    {I_BNDMK, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45983, 224},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BNDCL = {
+    {I_BNDCL, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+41707, 225},
+    {I_BNDCL, 2, {BNDREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41707, 226},
+    {I_BNDCL, 2, {BNDREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41706, 227},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BNDCU = {
+    {I_BNDCU, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+41714, 225},
+    {I_BNDCU, 2, {BNDREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41714, 226},
+    {I_BNDCU, 2, {BNDREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41713, 227},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BNDCN = {
+    {I_BNDCN, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+41721, 225},
+    {I_BNDCN, 2, {BNDREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41721, 226},
+    {I_BNDCN, 2, {BNDREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41720, 227},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BNDMOV = {
+    {I_BNDMOV, 2, {BNDREG,BNDREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+45989, 225},
+    {I_BNDMOV, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45989, 225},
+    {I_BNDMOV, 2, {BNDREG,BNDREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+45995, 225},
+    {I_BNDMOV, 2, {MEMORY,BNDREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+45995, 225},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BNDLDX = {
+    {I_BNDLDX, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45990, 224},
+    {I_BNDLDX, 3, {BNDREG,MEMORY,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+46001, 228},
+    {I_BNDLDX, 3, {BNDREG,MEMORY,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+46001, 229},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BNDSTX = {
+    {I_BNDSTX, 2, {MEMORY,BNDREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+45996, 224},
+    {I_BNDSTX, 3, {MEMORY,REG_GPR|BITS32,BNDREG,0,0}, NO_DECORATOR, nasm_bytecodes+46007, 228},
+    {I_BNDSTX, 3, {MEMORY,REG_GPR|BITS64,BNDREG,0,0}, NO_DECORATOR, nasm_bytecodes+46007, 229},
+    {I_BNDSTX, 3, {MEMORY,BNDREG,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+46013, 228},
+    {I_BNDSTX, 3, {MEMORY,BNDREG,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+46013, 229},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SHA1MSG1 = {
+    {I_SHA1MSG1, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+46019, 230},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SHA1MSG2 = {
+    {I_SHA1MSG2, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+46025, 230},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SHA1NEXTE = {
+    {I_SHA1NEXTE, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+46031, 230},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SHA1RNDS4 = {
+    {I_SHA1RNDS4, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+41727, 230},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SHA256MSG1 = {
+    {I_SHA256MSG1, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+46037, 230},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SHA256MSG2 = {
+    {I_SHA256MSG2, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+46043, 230},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SHA256RNDS2 = {
+    {I_SHA256RNDS2, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM0,0,0}, NO_DECORATOR, nasm_bytecodes+46049, 230},
+    {I_SHA256RNDS2, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+46049, 230},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSHA512MSG1 = {
+    {I_VSHA512MSG1, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41734, 231},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSHA512MSG2 = {
+    {I_VSHA512MSG2, 2, {YMM_L16,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41741, 231},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSHA512RNDS2 = {
+    {I_VSHA512RNDS2, 3, {YMM_L16,YMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+41748, 231},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSM3MSG1 = {
+    {I_VSM3MSG1, 3, {XMM_L16,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+41755, 232},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSM3MSG2 = {
+    {I_VSM3MSG2, 3, {XMM_L16,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+41762, 232},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSM3RNDS2 = {
+    {I_VSM3RNDS2, 4, {XMM_L16,XMM_L16,XMM_L16,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+16304, 232},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSM4KEY4 = {
+    {I_VSM4KEY4, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41769, 233},
+    {I_VSM4KEY4, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41776, 233},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSM4RNDS4 = {
+    {I_VSM4RNDS4, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41783, 233},
+    {I_VSM4RNDS4, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41790, 233},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VBCSTNEBF16PS = {
+    {I_VBCSTNEBF16PS, 2, {XMM_L16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41797, 234},
+    {I_VBCSTNEBF16PS, 2, {YMM_L16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41804, 234},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VBCSTNESH2PS = {
+    {I_VBCSTNESH2PS, 2, {XMM_L16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41811, 234},
+    {I_VBCSTNESH2PS, 2, {YMM_L16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41818, 234},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTNEEBF162PS = {
+    {I_VCVTNEEBF162PS, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41825, 235},
+    {I_VCVTNEEBF162PS, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41832, 236},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTNEEPH2PS = {
+    {I_VCVTNEEPH2PS, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41839, 235},
+    {I_VCVTNEEPH2PS, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41846, 236},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTNEOBF162PS = {
+    {I_VCVTNEOBF162PS, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41853, 235},
+    {I_VCVTNEOBF162PS, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41860, 236},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTNEOPH2PS = {
+    {I_VCVTNEOPH2PS, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41867, 235},
+    {I_VCVTNEOPH2PS, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41874, 236},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTNEPS2BF16 = {
+    {I_VCVTNEPS2BF16, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41881, 235},
+    {I_VCVTNEPS2BF16, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41888, 236},
+    {I_VCVTNEPS2BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30072, 295},
+    {I_VCVTNEPS2BF16, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30080, 295},
+    {I_VCVTNEPS2BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30088, 295},
+    {I_VCVTNEPS2BF16, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30096, 295},
+    {I_VCVTNEPS2BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30104, 295},
+    {I_VCVTNEPS2BF16, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30112, 295},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPDPBSSD = {
+    {I_VPDPBSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41895, 237},
+    {I_VPDPBSSD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41902, 238},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPDPBSSDS = {
+    {I_VPDPBSSDS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41909, 237},
+    {I_VPDPBSSDS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41916, 238},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPDPBSUD = {
+    {I_VPDPBSUD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41923, 237},
+    {I_VPDPBSUD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41930, 238},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPDPBSUDS = {
+    {I_VPDPBSUDS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41937, 237},
+    {I_VPDPBSUDS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41944, 238},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPDPBUUD = {
+    {I_VPDPBUUD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41951, 237},
+    {I_VPDPBUUD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41958, 238},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPDPBUUDS = {
+    {I_VPDPBUUDS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41965, 237},
+    {I_VPDPBUUDS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41972, 238},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMADD52HUQ = {
+    {I_VPMADD52HUQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41979, 239},
+    {I_VPMADD52HUQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41986, 240},
+    {I_VPMADD52HUQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23128, 258},
+    {I_VPMADD52HUQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23136, 258},
+    {I_VPMADD52HUQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23144, 259},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMADD52LUQ = {
+    {I_VPMADD52LUQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41993, 239},
+    {I_VPMADD52LUQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+42000, 240},
+    {I_VPMADD52LUQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23152, 258},
+    {I_VPMADD52LUQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23160, 258},
+    {I_VPMADD52LUQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23168, 259},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KADDB = {
+    {I_KADDB, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42007, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KADDD = {
+    {I_KADDD, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42014, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KADDQ = {
+    {I_KADDQ, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42021, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KADDW = {
+    {I_KADDW, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42028, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KANDB = {
+    {I_KANDB, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42035, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KANDD = {
+    {I_KANDD, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42042, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KANDNB = {
+    {I_KANDNB, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42049, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KANDND = {
+    {I_KANDND, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42056, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KANDNQ = {
+    {I_KANDNQ, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42063, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KANDNW = {
+    {I_KANDNW, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42070, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KANDQ = {
+    {I_KANDQ, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42077, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KANDW = {
+    {I_KANDW, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42084, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KMOVB = {
+    {I_KMOVB, 2, {KREG,RM_K|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42091, 241},
+    {I_KMOVB, 2, {MEMORY|BITS8,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42098, 241},
+    {I_KMOVB, 2, {KREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42105, 241},
+    {I_KMOVB, 2, {KREG,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+16312, 241},
+    {I_KMOVB, 2, {REG_GPR|BITS32,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42112, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KMOVD = {
+    {I_KMOVD, 2, {KREG,RM_K|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42119, 241},
+    {I_KMOVD, 2, {MEMORY|BITS32,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42126, 241},
+    {I_KMOVD, 2, {KREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42133, 241},
+    {I_KMOVD, 2, {REG_GPR|BITS32,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42140, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KMOVQ = {
+    {I_KMOVQ, 2, {KREG,RM_K|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42147, 241},
+    {I_KMOVQ, 2, {MEMORY|BITS64,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42154, 241},
+    {I_KMOVQ, 2, {KREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42161, 241},
+    {I_KMOVQ, 2, {REG_GPR|BITS64,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42168, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KMOVW = {
+    {I_KMOVW, 2, {KREG,RM_K|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42175, 241},
+    {I_KMOVW, 2, {MEMORY|BITS16,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42182, 241},
+    {I_KMOVW, 2, {KREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42189, 241},
+    {I_KMOVW, 2, {KREG,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42189, 241},
+    {I_KMOVW, 2, {REG_GPR|BITS32,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42196, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KNOTB = {
+    {I_KNOTB, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42203, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KNOTD = {
+    {I_KNOTD, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42210, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KNOTQ = {
+    {I_KNOTQ, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42217, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KNOTW = {
+    {I_KNOTW, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42224, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KORB = {
+    {I_KORB, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42231, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KORD = {
+    {I_KORD, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42238, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KORQ = {
+    {I_KORQ, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42245, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KORW = {
+    {I_KORW, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42252, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KORTESTB = {
+    {I_KORTESTB, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42259, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KORTESTD = {
+    {I_KORTESTD, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42266, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KORTESTQ = {
+    {I_KORTESTQ, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42273, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KORTESTW = {
+    {I_KORTESTW, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42280, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KSHIFTLB = {
+    {I_KSHIFTLB, 3, {KREG,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16320, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KSHIFTLD = {
+    {I_KSHIFTLD, 3, {KREG,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16328, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KSHIFTLQ = {
+    {I_KSHIFTLQ, 3, {KREG,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16336, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KSHIFTLW = {
+    {I_KSHIFTLW, 3, {KREG,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16344, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KSHIFTRB = {
+    {I_KSHIFTRB, 3, {KREG,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16352, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KSHIFTRD = {
+    {I_KSHIFTRD, 3, {KREG,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16360, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KSHIFTRQ = {
+    {I_KSHIFTRQ, 3, {KREG,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16368, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KSHIFTRW = {
+    {I_KSHIFTRW, 3, {KREG,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16376, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KTESTB = {
+    {I_KTESTB, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42287, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KTESTD = {
+    {I_KTESTD, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42294, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KTESTQ = {
+    {I_KTESTQ, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42301, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KTESTW = {
+    {I_KTESTW, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42308, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KUNPCKBW = {
+    {I_KUNPCKBW, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42315, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KUNPCKDQ = {
+    {I_KUNPCKDQ, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42322, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KUNPCKWD = {
+    {I_KUNPCKWD, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42329, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KXNORB = {
+    {I_KXNORB, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42336, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KXNORD = {
+    {I_KXNORD, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42343, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KXNORQ = {
+    {I_KXNORQ, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42350, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KXNORW = {
+    {I_KXNORW, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42357, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KXORB = {
+    {I_KXORB, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42364, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KXORD = {
+    {I_KXORD, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42371, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KXORQ = {
+    {I_KXORQ, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42378, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KXORW = {
+    {I_KXORW, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42385, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KADD = {
+    {I_KADD, 3, {KREG|BITS8,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42007, 242},
+    {I_KADD, 3, {KREG|BITS32,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42014, 242},
+    {I_KADD, 3, {KREG|BITS64,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42021, 242},
+    {I_KADD, 3, {KREG|BITS16,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42028, 242},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KAND = {
+    {I_KAND, 3, {KREG|BITS8,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42035, 242},
+    {I_KAND, 3, {KREG|BITS32,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42042, 242},
+    {I_KAND, 3, {KREG|BITS64,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42077, 242},
+    {I_KAND, 3, {KREG|BITS16,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42084, 242},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KANDN = {
+    {I_KANDN, 3, {KREG|BITS64,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42049, 242},
+    {I_KANDN, 3, {KREG|BITS16,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42056, 242},
+    {I_KANDN, 3, {KREG|BITS8,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42063, 242},
+    {I_KANDN, 3, {KREG|BITS32,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42070, 242},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KMOV = {
+    {I_KMOV, 2, {KREG|BITS8,RM_K|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42091, 242},
+    {I_KMOV, 2, {MEMORY|BITS8,KREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42098, 243},
+    {I_KMOV, 2, {KREG|BITS8,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42105, 244},
+    {I_KMOV, 2, {KREG|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42105, 242},
+    {I_KMOV, 2, {REG_GPR|BITS32,KREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42112, 244},
+    {I_KMOV, 2, {KREG|BITS32,RM_K|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42119, 242},
+    {I_KMOV, 2, {MEMORY|BITS32,KREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42126, 242},
+    {I_KMOV, 2, {KREG|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42133, 242},
+    {I_KMOV, 2, {REG_GPR|BITS32,KREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42140, 242},
+    {I_KMOV, 2, {KREG|BITS64,RM_K|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42147, 242},
+    {I_KMOV, 2, {MEMORY|BITS64,KREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42154, 242},
+    {I_KMOV, 2, {KREG|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42161, 242},
+    {I_KMOV, 2, {REG_GPR|BITS64,KREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42168, 242},
+    {I_KMOV, 2, {KREG|BITS16,RM_K|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42175, 242},
+    {I_KMOV, 2, {MEMORY|BITS16,KREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42182, 242},
+    {I_KMOV, 2, {KREG|BITS16,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42189, 244},
+    {I_KMOV, 2, {REG_GPR|BITS32,KREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42196, 244},
+    {I_KMOV, 2, {KREG|BITS16,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42189, 244},
+    {I_KMOV, 2, {KREG|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42189, 242},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KNOT = {
+    {I_KNOT, 2, {KREG|BITS8,KREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42203, 242},
+    {I_KNOT, 2, {KREG|BITS32,KREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42210, 242},
+    {I_KNOT, 2, {KREG|BITS64,KREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42217, 242},
+    {I_KNOT, 2, {KREG|BITS16,KREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42224, 242},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KOR = {
+    {I_KOR, 3, {KREG|BITS8,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42231, 242},
+    {I_KOR, 3, {KREG|BITS32,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42238, 242},
+    {I_KOR, 3, {KREG|BITS64,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42245, 242},
+    {I_KOR, 3, {KREG|BITS16,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42252, 242},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KORTEST = {
+    {I_KORTEST, 2, {KREG|BITS8,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42259, 242},
+    {I_KORTEST, 2, {KREG|BITS32,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42266, 242},
+    {I_KORTEST, 2, {KREG|BITS64,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42273, 242},
+    {I_KORTEST, 2, {KREG|BITS16,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42280, 242},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KSHIFTL = {
+    {I_KSHIFTL, 3, {KREG|BITS8,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16320, 245},
+    {I_KSHIFTL, 3, {KREG|BITS32,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16328, 245},
+    {I_KSHIFTL, 3, {KREG|BITS64,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16336, 245},
+    {I_KSHIFTL, 3, {KREG|BITS16,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16344, 245},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KSHIFTR = {
+    {I_KSHIFTR, 3, {KREG|BITS8,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16352, 245},
+    {I_KSHIFTR, 3, {KREG|BITS32,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16360, 245},
+    {I_KSHIFTR, 3, {KREG|BITS64,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16368, 245},
+    {I_KSHIFTR, 3, {KREG|BITS16,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16376, 245},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KTEST = {
+    {I_KTEST, 2, {KREG|BITS8,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42287, 242},
+    {I_KTEST, 2, {KREG|BITS32,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42294, 242},
+    {I_KTEST, 2, {KREG|BITS64,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42301, 242},
+    {I_KTEST, 2, {KREG|BITS16,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42308, 242},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KUNPCK = {
+    {I_KUNPCK, 3, {KREG|BITS16,KREG|BITS8,KREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+42315, 241},
+    {I_KUNPCK, 3, {KREG|BITS64,KREG|BITS32,KREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42322, 241},
+    {I_KUNPCK, 3, {KREG|BITS32,KREG|BITS16,KREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+42329, 241},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KXNOR = {
+    {I_KXNOR, 3, {KREG|BITS8,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42336, 242},
+    {I_KXNOR, 3, {KREG|BITS32,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42343, 242},
+    {I_KXNOR, 3, {KREG|BITS64,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42350, 242},
+    {I_KXNOR, 3, {KREG|BITS16,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42357, 242},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_KXOR = {
+    {I_KXOR, 3, {KREG|BITS8,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42364, 242},
+    {I_KXOR, 3, {KREG|BITS32,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42371, 242},
+    {I_KXOR, 3, {KREG|BITS64,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42378, 242},
+    {I_KXOR, 3, {KREG|BITS16,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42385, 242},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VALIGND = {
+    {I_VALIGND, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+8002, 246},
+    {I_VALIGND, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+8011, 246},
+    {I_VALIGND, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+8020, 246},
+    {I_VALIGND, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+8029, 246},
+    {I_VALIGND, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+8038, 247},
+    {I_VALIGND, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+8047, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VALIGNQ = {
+    {I_VALIGNQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+8056, 246},
+    {I_VALIGNQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+8065, 246},
+    {I_VALIGNQ, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+8074, 246},
+    {I_VALIGNQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+8083, 246},
+    {I_VALIGNQ, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+8092, 247},
+    {I_VALIGNQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+8101, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VBLENDMPD = {
+    {I_VBLENDMPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16704, 246},
+    {I_VBLENDMPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16712, 246},
+    {I_VBLENDMPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16720, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VBLENDMPS = {
+    {I_VBLENDMPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16728, 246},
+    {I_VBLENDMPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16736, 246},
+    {I_VBLENDMPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16744, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VBROADCASTF32X2 = {
+    {I_VBROADCASTF32X2, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16752, 248},
+    {I_VBROADCASTF32X2, 2, {ZMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16760, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VBROADCASTF32X4 = {
+    {I_VBROADCASTF32X4, 2, {YMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16768, 246},
+    {I_VBROADCASTF32X4, 2, {ZMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16776, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VBROADCASTF32X8 = {
+    {I_VBROADCASTF32X8, 2, {ZMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16784, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VBROADCASTF64X2 = {
+    {I_VBROADCASTF64X2, 2, {YMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16792, 248},
+    {I_VBROADCASTF64X2, 2, {ZMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16800, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VBROADCASTF64X4 = {
+    {I_VBROADCASTF64X4, 2, {ZMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16808, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VBROADCASTI32X2 = {
+    {I_VBROADCASTI32X2, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16816, 248},
+    {I_VBROADCASTI32X2, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16824, 248},
+    {I_VBROADCASTI32X2, 2, {ZMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16832, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VBROADCASTI32X4 = {
+    {I_VBROADCASTI32X4, 2, {YMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16840, 246},
+    {I_VBROADCASTI32X4, 2, {ZMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16848, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VBROADCASTI32X8 = {
+    {I_VBROADCASTI32X8, 2, {ZMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16856, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VBROADCASTI64X2 = {
+    {I_VBROADCASTI64X2, 2, {YMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16864, 248},
+    {I_VBROADCASTI64X2, 2, {ZMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16872, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VBROADCASTI64X4 = {
+    {I_VBROADCASTI64X4, 2, {ZMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16880, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPEQ_OQPD = {
+    {I_VCMPEQ_OQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+240, 246},
+    {I_VCMPEQ_OQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+250, 246},
+    {I_VCMPEQ_OQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+260, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPEQ_OQPS = {
+    {I_VCMPEQ_OQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+270, 246},
+    {I_VCMPEQ_OQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+280, 246},
+    {I_VCMPEQ_OQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+290, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPEQ_OQSD = {
+    {I_VCMPEQ_OQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+300, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPEQ_OQSS = {
+    {I_VCMPEQ_OQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+310, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCOMPRESSPD = {
+    {I_VCOMPRESSPD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+16984, 246},
+    {I_VCOMPRESSPD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+16992, 246},
+    {I_VCOMPRESSPD, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+17000, 247},
+    {I_VCOMPRESSPD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17008, 246},
+    {I_VCOMPRESSPD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17016, 246},
+    {I_VCOMPRESSPD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17024, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCOMPRESSPS = {
+    {I_VCOMPRESSPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+17032, 246},
+    {I_VCOMPRESSPS, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+17040, 246},
+    {I_VCOMPRESSPS, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+17048, 247},
+    {I_VCOMPRESSPS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17056, 246},
+    {I_VCOMPRESSPS, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17064, 246},
+    {I_VCOMPRESSPS, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17072, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTPD2QQ = {
+    {I_VCVTPD2QQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17176, 248},
+    {I_VCVTPD2QQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17184, 248},
+    {I_VCVTPD2QQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17192, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTPD2UDQ = {
+    {I_VCVTPD2UDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17200, 246},
+    {I_VCVTPD2UDQ, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17208, 246},
+    {I_VCVTPD2UDQ, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17216, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTPD2UQQ = {
+    {I_VCVTPD2UQQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17224, 248},
+    {I_VCVTPD2UQQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17232, 248},
+    {I_VCVTPD2UQQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17240, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTPS2QQ = {
+    {I_VCVTPS2QQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17320, 248},
+    {I_VCVTPS2QQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17328, 248},
+    {I_VCVTPS2QQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+17336, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTPS2UDQ = {
+    {I_VCVTPS2UDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17344, 246},
+    {I_VCVTPS2UDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17352, 246},
+    {I_VCVTPS2UDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+17360, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTPS2UQQ = {
+    {I_VCVTPS2UQQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17368, 248},
+    {I_VCVTPS2UQQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17376, 248},
+    {I_VCVTPS2UQQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+17384, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTQQ2PD = {
+    {I_VCVTQQ2PD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17392, 248},
+    {I_VCVTQQ2PD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17400, 248},
+    {I_VCVTQQ2PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17408, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTQQ2PS = {
+    {I_VCVTQQ2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17416, 248},
+    {I_VCVTQQ2PS, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17424, 248},
+    {I_VCVTQQ2PS, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17432, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTSD2USI = {
+    {I_VCVTSD2USI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17464, 247},
+    {I_VCVTSD2USI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17472, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTSS2USI = {
+    {I_VCVTSS2USI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17536, 247},
+    {I_VCVTSS2USI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17544, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTTPD2QQ = {
+    {I_VCVTTPD2QQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17576, 248},
+    {I_VCVTTPD2QQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17584, 248},
+    {I_VCVTTPD2QQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+17592, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTTPD2UDQ = {
+    {I_VCVTTPD2UDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17600, 246},
+    {I_VCVTTPD2UDQ, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17608, 246},
+    {I_VCVTTPD2UDQ, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+17616, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTTPD2UQQ = {
+    {I_VCVTTPD2UQQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17624, 248},
+    {I_VCVTTPD2UQQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17632, 248},
+    {I_VCVTTPD2UQQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+17640, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTTPS2QQ = {
+    {I_VCVTTPS2QQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17672, 248},
+    {I_VCVTTPS2QQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17680, 248},
+    {I_VCVTTPS2QQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+17688, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTTPS2UDQ = {
+    {I_VCVTTPS2UDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17696, 246},
+    {I_VCVTTPS2UDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17704, 246},
+    {I_VCVTTPS2UDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+17712, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTTPS2UQQ = {
+    {I_VCVTTPS2UQQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17720, 248},
+    {I_VCVTTPS2UQQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17728, 248},
+    {I_VCVTTPS2UQQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+17736, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTTSD2USI = {
+    {I_VCVTTSD2USI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+17760, 247},
+    {I_VCVTTSD2USI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+17768, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTTSS2USI = {
+    {I_VCVTTSS2USI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+17792, 247},
+    {I_VCVTTSS2USI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+17800, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTUDQ2PD = {
+    {I_VCVTUDQ2PD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17808, 246},
+    {I_VCVTUDQ2PD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17816, 246},
+    {I_VCVTUDQ2PD, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+17824, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTUDQ2PS = {
+    {I_VCVTUDQ2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17832, 246},
+    {I_VCVTUDQ2PS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17840, 246},
+    {I_VCVTUDQ2PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+17848, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTUQQ2PD = {
+    {I_VCVTUQQ2PD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17856, 248},
+    {I_VCVTUQQ2PD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17864, 248},
+    {I_VCVTUQQ2PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17872, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTUQQ2PS = {
+    {I_VCVTUQQ2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17880, 248},
+    {I_VCVTUQQ2PS, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17888, 248},
+    {I_VCVTUQQ2PS, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17896, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTUSI2SD = {
+    {I_VCVTUSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17904, 247},
+    {I_VCVTUSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17912, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTUSI2SS = {
+    {I_VCVTUSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17920, 247},
+    {I_VCVTUSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17928, 247},
+    {I_VCVTUSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,ER,ER,0,0}, nasm_bytecodes+30920, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VDBPSADBW = {
+    {I_VDBPSADBW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8209, 250},
+    {I_VDBPSADBW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8218, 250},
+    {I_VDBPSADBW, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8227, 250},
+    {I_VDBPSADBW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8236, 250},
+    {I_VDBPSADBW, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8245, 251},
+    {I_VDBPSADBW, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8254, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VEXP2PD = {
+    {I_VEXP2PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+18064, 252},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VEXP2PS = {
+    {I_VEXP2PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+18072, 252},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VEXPANDPD = {
+    {I_VEXPANDPD, 2, {XMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18080, 246},
+    {I_VEXPANDPD, 2, {YMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18088, 246},
+    {I_VEXPANDPD, 2, {ZMMREG,MEMORY|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18096, 247},
+    {I_VEXPANDPD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18080, 246},
+    {I_VEXPANDPD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18088, 246},
+    {I_VEXPANDPD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18096, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VEXPANDPS = {
+    {I_VEXPANDPS, 2, {XMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18104, 246},
+    {I_VEXPANDPS, 2, {YMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18112, 246},
+    {I_VEXPANDPS, 2, {ZMMREG,MEMORY|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18120, 247},
+    {I_VEXPANDPS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18104, 246},
+    {I_VEXPANDPS, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18112, 246},
+    {I_VEXPANDPS, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18120, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VEXTRACTF32X4 = {
+    {I_VEXTRACTF32X4, 3, {XMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8263, 246},
+    {I_VEXTRACTF32X4, 3, {XMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8272, 247},
+    {I_VEXTRACTF32X4, 3, {MEMORY|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8281, 246},
+    {I_VEXTRACTF32X4, 3, {MEMORY|BITS128,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8290, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VEXTRACTF32X8 = {
+    {I_VEXTRACTF32X8, 3, {YMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8299, 249},
+    {I_VEXTRACTF32X8, 3, {MEMORY|BITS256,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8308, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VEXTRACTF64X2 = {
+    {I_VEXTRACTF64X2, 3, {XMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8317, 248},
+    {I_VEXTRACTF64X2, 3, {XMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8326, 249},
+    {I_VEXTRACTF64X2, 3, {MEMORY|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8335, 248},
+    {I_VEXTRACTF64X2, 3, {MEMORY|BITS128,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8344, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VEXTRACTF64X4 = {
+    {I_VEXTRACTF64X4, 3, {YMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8353, 247},
+    {I_VEXTRACTF64X4, 3, {MEMORY|BITS256,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8362, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VEXTRACTI32X4 = {
+    {I_VEXTRACTI32X4, 3, {XMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8371, 246},
+    {I_VEXTRACTI32X4, 3, {XMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8380, 247},
+    {I_VEXTRACTI32X4, 3, {MEMORY|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8389, 246},
+    {I_VEXTRACTI32X4, 3, {MEMORY|BITS128,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8398, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VEXTRACTI32X8 = {
+    {I_VEXTRACTI32X8, 3, {YMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8407, 249},
+    {I_VEXTRACTI32X8, 3, {MEMORY|BITS256,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8416, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VEXTRACTI64X2 = {
+    {I_VEXTRACTI64X2, 3, {XMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8425, 248},
+    {I_VEXTRACTI64X2, 3, {XMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8434, 249},
+    {I_VEXTRACTI64X2, 3, {MEMORY|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8443, 248},
+    {I_VEXTRACTI64X2, 3, {MEMORY|BITS128,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8452, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VEXTRACTI64X4 = {
+    {I_VEXTRACTI64X4, 3, {YMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8461, 247},
+    {I_VEXTRACTI64X4, 3, {MEMORY|BITS256,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8470, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFIXUPIMMPD = {
+    {I_VFIXUPIMMPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+8488, 246},
+    {I_VFIXUPIMMPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+8497, 246},
+    {I_VFIXUPIMMPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+8506, 246},
+    {I_VFIXUPIMMPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+8515, 246},
+    {I_VFIXUPIMMPD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64|SAE,0,0}, nasm_bytecodes+8524, 247},
+    {I_VFIXUPIMMPD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+8533, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFIXUPIMMPS = {
+    {I_VFIXUPIMMPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+8542, 246},
+    {I_VFIXUPIMMPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+8551, 246},
+    {I_VFIXUPIMMPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+8560, 246},
+    {I_VFIXUPIMMPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+8569, 246},
+    {I_VFIXUPIMMPS, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32|SAE,0,0}, nasm_bytecodes+8578, 247},
+    {I_VFIXUPIMMPS, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+8587, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFIXUPIMMSD = {
+    {I_VFIXUPIMMSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+8596, 247},
+    {I_VFIXUPIMMSD, 3, {XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+8605, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFIXUPIMMSS = {
+    {I_VFIXUPIMMSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+8614, 247},
+    {I_VFIXUPIMMSS, 3, {XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+8623, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFPCLASSPD = {
+    {I_VFPCLASSPD, 3, {KREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK,B64,0,0,0}, nasm_bytecodes+8632, 248},
+    {I_VFPCLASSPD, 3, {KREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK,B64,0,0,0}, nasm_bytecodes+8641, 248},
+    {I_VFPCLASSPD, 3, {KREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK,B64,0,0,0}, nasm_bytecodes+8650, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFPCLASSPS = {
+    {I_VFPCLASSPS, 3, {KREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK,B32,0,0,0}, nasm_bytecodes+8659, 248},
+    {I_VFPCLASSPS, 3, {KREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK,B32,0,0,0}, nasm_bytecodes+8668, 248},
+    {I_VFPCLASSPS, 3, {KREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK,B32,0,0,0}, nasm_bytecodes+8677, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFPCLASSSD = {
+    {I_VFPCLASSSD, 3, {KREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8686, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFPCLASSSS = {
+    {I_VFPCLASSSS, 3, {KREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8695, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGATHERPF0DPD = {
+    {I_VGATHERPF0DPD, 1, {YMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8758, 253},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGATHERPF0DPS = {
+    {I_VGATHERPF0DPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8767, 253},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGATHERPF0QPD = {
+    {I_VGATHERPF0QPD, 1, {ZMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8776, 253},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGATHERPF0QPS = {
+    {I_VGATHERPF0QPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8785, 253},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGATHERPF1DPD = {
+    {I_VGATHERPF1DPD, 1, {YMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8794, 253},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGATHERPF1DPS = {
+    {I_VGATHERPF1DPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8803, 253},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGATHERPF1QPD = {
+    {I_VGATHERPF1QPD, 1, {ZMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8812, 253},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGATHERPF1QPS = {
+    {I_VGATHERPF1QPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8821, 253},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGETEXPPD = {
+    {I_VGETEXPPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19184, 246},
+    {I_VGETEXPPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19192, 246},
+    {I_VGETEXPPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+19200, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGETEXPPS = {
+    {I_VGETEXPPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19208, 246},
+    {I_VGETEXPPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19216, 246},
+    {I_VGETEXPPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+19224, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGETEXPSD = {
+    {I_VGETEXPSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+19232, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGETEXPSS = {
+    {I_VGETEXPSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+19240, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGETMANTPD = {
+    {I_VGETMANTPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+8884, 246},
+    {I_VGETMANTPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+8893, 246},
+    {I_VGETMANTPD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+8902, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGETMANTPS = {
+    {I_VGETMANTPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+8911, 246},
+    {I_VGETMANTPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+8920, 246},
+    {I_VGETMANTPS, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+8929, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGETMANTSD = {
+    {I_VGETMANTSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+8938, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGETMANTSS = {
+    {I_VGETMANTSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+8947, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VINSERTF32X4 = {
+    {I_VINSERTF32X4, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8956, 246},
+    {I_VINSERTF32X4, 3, {YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8965, 246},
+    {I_VINSERTF32X4, 4, {ZMMREG,ZMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8974, 247},
+    {I_VINSERTF32X4, 3, {ZMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8983, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VINSERTF32X8 = {
+    {I_VINSERTF32X8, 4, {ZMMREG,ZMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8992, 249},
+    {I_VINSERTF32X8, 3, {ZMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9001, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VINSERTF64X2 = {
+    {I_VINSERTF64X2, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9010, 248},
+    {I_VINSERTF64X2, 3, {YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9019, 248},
+    {I_VINSERTF64X2, 4, {ZMMREG,ZMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9028, 249},
+    {I_VINSERTF64X2, 3, {ZMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9037, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VINSERTF64X4 = {
+    {I_VINSERTF64X4, 4, {ZMMREG,ZMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9046, 247},
+    {I_VINSERTF64X4, 3, {ZMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9055, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VINSERTI32X4 = {
+    {I_VINSERTI32X4, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9064, 246},
+    {I_VINSERTI32X4, 3, {YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9073, 246},
+    {I_VINSERTI32X4, 4, {ZMMREG,ZMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9082, 247},
+    {I_VINSERTI32X4, 3, {ZMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9091, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VINSERTI32X8 = {
+    {I_VINSERTI32X8, 4, {ZMMREG,ZMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9100, 249},
+    {I_VINSERTI32X8, 3, {ZMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9109, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VINSERTI64X2 = {
+    {I_VINSERTI64X2, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9118, 248},
+    {I_VINSERTI64X2, 3, {YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9127, 248},
+    {I_VINSERTI64X2, 4, {ZMMREG,ZMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9136, 249},
+    {I_VINSERTI64X2, 3, {ZMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9145, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VINSERTI64X4 = {
+    {I_VINSERTI64X4, 4, {ZMMREG,ZMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9154, 247},
+    {I_VINSERTI64X4, 3, {ZMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9163, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVDQA32 = {
+    {I_VMOVDQA32, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19688, 246},
+    {I_VMOVDQA32, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19696, 246},
+    {I_VMOVDQA32, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19704, 247},
+    {I_VMOVDQA32, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19712, 246},
+    {I_VMOVDQA32, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19720, 246},
+    {I_VMOVDQA32, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19728, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVDQA64 = {
+    {I_VMOVDQA64, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19736, 246},
+    {I_VMOVDQA64, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19744, 246},
+    {I_VMOVDQA64, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19752, 247},
+    {I_VMOVDQA64, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19760, 246},
+    {I_VMOVDQA64, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19768, 246},
+    {I_VMOVDQA64, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19776, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVDQU16 = {
+    {I_VMOVDQU16, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19784, 250},
+    {I_VMOVDQU16, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19792, 250},
+    {I_VMOVDQU16, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19800, 251},
+    {I_VMOVDQU16, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19808, 250},
+    {I_VMOVDQU16, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19816, 250},
+    {I_VMOVDQU16, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19824, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVDQU32 = {
+    {I_VMOVDQU32, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19832, 246},
+    {I_VMOVDQU32, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19840, 246},
+    {I_VMOVDQU32, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19848, 247},
+    {I_VMOVDQU32, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19856, 246},
+    {I_VMOVDQU32, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19864, 246},
+    {I_VMOVDQU32, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19872, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVDQU64 = {
+    {I_VMOVDQU64, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19880, 246},
+    {I_VMOVDQU64, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19888, 246},
+    {I_VMOVDQU64, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19896, 247},
+    {I_VMOVDQU64, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19904, 246},
+    {I_VMOVDQU64, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19912, 246},
+    {I_VMOVDQU64, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19920, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVDQU8 = {
+    {I_VMOVDQU8, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19928, 250},
+    {I_VMOVDQU8, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19936, 250},
+    {I_VMOVDQU8, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19944, 251},
+    {I_VMOVDQU8, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19952, 250},
+    {I_VMOVDQU8, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19960, 250},
+    {I_VMOVDQU8, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19968, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPABSQ = {
+    {I_VPABSQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20792, 246},
+    {I_VPABSQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20800, 246},
+    {I_VPABSQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20808, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPANDD = {
+    {I_VPANDD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21416, 246},
+    {I_VPANDD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21424, 246},
+    {I_VPANDD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21432, 246},
+    {I_VPANDD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21440, 246},
+    {I_VPANDD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21448, 247},
+    {I_VPANDD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21456, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPANDND = {
+    {I_VPANDND, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21464, 246},
+    {I_VPANDND, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21472, 246},
+    {I_VPANDND, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21480, 246},
+    {I_VPANDND, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21488, 246},
+    {I_VPANDND, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21496, 247},
+    {I_VPANDND, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21504, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPANDNQ = {
+    {I_VPANDNQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21512, 246},
+    {I_VPANDNQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21520, 246},
+    {I_VPANDNQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21528, 246},
+    {I_VPANDNQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21536, 246},
+    {I_VPANDNQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21544, 247},
+    {I_VPANDNQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21552, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPANDQ = {
+    {I_VPANDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21560, 246},
+    {I_VPANDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21568, 246},
+    {I_VPANDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21576, 246},
+    {I_VPANDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21584, 246},
+    {I_VPANDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21592, 247},
+    {I_VPANDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21600, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPBLENDMB = {
+    {I_VPBLENDMB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21704, 250},
+    {I_VPBLENDMB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21712, 250},
+    {I_VPBLENDMB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21720, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPBLENDMD = {
+    {I_VPBLENDMD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21728, 246},
+    {I_VPBLENDMD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21736, 246},
+    {I_VPBLENDMD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21744, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPBLENDMQ = {
+    {I_VPBLENDMQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21752, 246},
+    {I_VPBLENDMQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21760, 246},
+    {I_VPBLENDMQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21768, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPBLENDMW = {
+    {I_VPBLENDMW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21776, 250},
+    {I_VPBLENDMW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21784, 250},
+    {I_VPBLENDMW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21792, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPBROADCASTMB2Q = {
+    {I_VPBROADCASTMB2Q, 2, {XMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+21920, 254},
+    {I_VPBROADCASTMB2Q, 2, {YMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+21928, 254},
+    {I_VPBROADCASTMB2Q, 2, {ZMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+21936, 255},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPBROADCASTMW2D = {
+    {I_VPBROADCASTMW2D, 2, {XMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+21944, 254},
+    {I_VPBROADCASTMW2D, 2, {YMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+21952, 254},
+    {I_VPBROADCASTMW2D, 2, {ZMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+21960, 255},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPEQUB = {
+    {I_VPCMPEQUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+2890, 250},
+    {I_VPCMPEQUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+2900, 250},
+    {I_VPCMPEQUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+2910, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPEQUD = {
+    {I_VPCMPEQUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2920, 246},
+    {I_VPCMPEQUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2930, 246},
+    {I_VPCMPEQUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2940, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPEQUQ = {
+    {I_VPCMPEQUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2950, 246},
+    {I_VPCMPEQUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2960, 246},
+    {I_VPCMPEQUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2970, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPEQUW = {
+    {I_VPCMPEQUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+2980, 250},
+    {I_VPCMPEQUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+2990, 250},
+    {I_VPCMPEQUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3000, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPGEB = {
+    {I_VPCMPGEB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3040, 250},
+    {I_VPCMPGEB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3050, 250},
+    {I_VPCMPGEB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3060, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPGED = {
+    {I_VPCMPGED, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3070, 246},
+    {I_VPCMPGED, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3080, 246},
+    {I_VPCMPGED, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3090, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPGEQ = {
+    {I_VPCMPGEQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3100, 246},
+    {I_VPCMPGEQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3110, 246},
+    {I_VPCMPGEQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3120, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPGEUB = {
+    {I_VPCMPGEUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3130, 250},
+    {I_VPCMPGEUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3140, 250},
+    {I_VPCMPGEUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3150, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPGEUD = {
+    {I_VPCMPGEUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3160, 246},
+    {I_VPCMPGEUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3170, 246},
+    {I_VPCMPGEUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3180, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPGEUQ = {
+    {I_VPCMPGEUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3190, 246},
+    {I_VPCMPGEUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3200, 246},
+    {I_VPCMPGEUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3210, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPGEUW = {
+    {I_VPCMPGEUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3220, 250},
+    {I_VPCMPGEUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3230, 250},
+    {I_VPCMPGEUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3240, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPGEW = {
+    {I_VPCMPGEW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3250, 250},
+    {I_VPCMPGEW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3260, 250},
+    {I_VPCMPGEW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3270, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPGTUB = {
+    {I_VPCMPGTUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3370, 250},
+    {I_VPCMPGTUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3380, 250},
+    {I_VPCMPGTUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3390, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPGTUD = {
+    {I_VPCMPGTUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3400, 246},
+    {I_VPCMPGTUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3410, 246},
+    {I_VPCMPGTUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3420, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPGTUQ = {
+    {I_VPCMPGTUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3430, 246},
+    {I_VPCMPGTUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3440, 246},
+    {I_VPCMPGTUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3450, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPGTUW = {
+    {I_VPCMPGTUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3460, 250},
+    {I_VPCMPGTUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3470, 250},
+    {I_VPCMPGTUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3480, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPLEB = {
+    {I_VPCMPLEB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3520, 250},
+    {I_VPCMPLEB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3530, 250},
+    {I_VPCMPLEB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3540, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPLED = {
+    {I_VPCMPLED, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3550, 246},
+    {I_VPCMPLED, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3560, 246},
+    {I_VPCMPLED, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3570, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPLEQ = {
+    {I_VPCMPLEQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3580, 246},
+    {I_VPCMPLEQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3590, 246},
+    {I_VPCMPLEQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3600, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPLEUB = {
+    {I_VPCMPLEUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3610, 250},
+    {I_VPCMPLEUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3620, 250},
+    {I_VPCMPLEUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3630, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPLEUD = {
+    {I_VPCMPLEUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3640, 246},
+    {I_VPCMPLEUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3650, 246},
+    {I_VPCMPLEUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3660, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPLEUQ = {
+    {I_VPCMPLEUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3670, 246},
+    {I_VPCMPLEUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3680, 246},
+    {I_VPCMPLEUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3690, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPLEUW = {
+    {I_VPCMPLEUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3700, 250},
+    {I_VPCMPLEUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3710, 250},
+    {I_VPCMPLEUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3720, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPLEW = {
+    {I_VPCMPLEW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3730, 250},
+    {I_VPCMPLEW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3740, 250},
+    {I_VPCMPLEW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3750, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPLTB = {
+    {I_VPCMPLTB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3760, 250},
+    {I_VPCMPLTB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3770, 250},
+    {I_VPCMPLTB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3780, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPLTD = {
+    {I_VPCMPLTD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3790, 246},
+    {I_VPCMPLTD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3800, 246},
+    {I_VPCMPLTD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3810, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPLTQ = {
+    {I_VPCMPLTQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3820, 246},
+    {I_VPCMPLTQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3830, 246},
+    {I_VPCMPLTQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3840, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPLTUB = {
+    {I_VPCMPLTUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3850, 250},
+    {I_VPCMPLTUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3860, 250},
+    {I_VPCMPLTUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3870, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPLTUD = {
+    {I_VPCMPLTUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3880, 246},
+    {I_VPCMPLTUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3890, 246},
+    {I_VPCMPLTUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3900, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPLTUQ = {
+    {I_VPCMPLTUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3910, 246},
+    {I_VPCMPLTUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3920, 246},
+    {I_VPCMPLTUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3930, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPLTUW = {
+    {I_VPCMPLTUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3940, 250},
+    {I_VPCMPLTUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3950, 250},
+    {I_VPCMPLTUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3960, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPLTW = {
+    {I_VPCMPLTW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3970, 250},
+    {I_VPCMPLTW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3980, 250},
+    {I_VPCMPLTW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3990, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNEQB = {
+    {I_VPCMPNEQB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4000, 250},
+    {I_VPCMPNEQB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4010, 250},
+    {I_VPCMPNEQB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4020, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNEQD = {
+    {I_VPCMPNEQD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4030, 246},
+    {I_VPCMPNEQD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4040, 246},
+    {I_VPCMPNEQD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4050, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNEQQ = {
+    {I_VPCMPNEQQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4060, 246},
+    {I_VPCMPNEQQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4070, 246},
+    {I_VPCMPNEQQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4080, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNEQUB = {
+    {I_VPCMPNEQUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4090, 250},
+    {I_VPCMPNEQUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4100, 250},
+    {I_VPCMPNEQUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4110, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNEQUD = {
+    {I_VPCMPNEQUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4120, 246},
+    {I_VPCMPNEQUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4130, 246},
+    {I_VPCMPNEQUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4140, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNEQUQ = {
+    {I_VPCMPNEQUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4150, 246},
+    {I_VPCMPNEQUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4160, 246},
+    {I_VPCMPNEQUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4170, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNEQUW = {
+    {I_VPCMPNEQUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4180, 250},
+    {I_VPCMPNEQUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4190, 250},
+    {I_VPCMPNEQUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4200, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNEQW = {
+    {I_VPCMPNEQW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4210, 250},
+    {I_VPCMPNEQW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4220, 250},
+    {I_VPCMPNEQW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4230, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNGTB = {
+    {I_VPCMPNGTB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3520, 250},
+    {I_VPCMPNGTB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3530, 250},
+    {I_VPCMPNGTB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3540, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNGTD = {
+    {I_VPCMPNGTD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3550, 246},
+    {I_VPCMPNGTD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3560, 246},
+    {I_VPCMPNGTD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3570, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNGTQ = {
+    {I_VPCMPNGTQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3580, 246},
+    {I_VPCMPNGTQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3590, 246},
+    {I_VPCMPNGTQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3600, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNGTUB = {
+    {I_VPCMPNGTUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3610, 250},
+    {I_VPCMPNGTUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3620, 250},
+    {I_VPCMPNGTUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3630, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNGTUD = {
+    {I_VPCMPNGTUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3640, 246},
+    {I_VPCMPNGTUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3650, 246},
+    {I_VPCMPNGTUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3660, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNGTUQ = {
+    {I_VPCMPNGTUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3670, 246},
+    {I_VPCMPNGTUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3680, 246},
+    {I_VPCMPNGTUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3690, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNGTUW = {
+    {I_VPCMPNGTUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3700, 250},
+    {I_VPCMPNGTUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3710, 250},
+    {I_VPCMPNGTUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3720, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNGTW = {
+    {I_VPCMPNGTW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3730, 250},
+    {I_VPCMPNGTW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3740, 250},
+    {I_VPCMPNGTW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3750, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNLEB = {
+    {I_VPCMPNLEB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3280, 250},
+    {I_VPCMPNLEB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3290, 250},
+    {I_VPCMPNLEB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3300, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNLED = {
+    {I_VPCMPNLED, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3310, 246},
+    {I_VPCMPNLED, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3320, 246},
+    {I_VPCMPNLED, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3330, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNLEQ = {
+    {I_VPCMPNLEQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3340, 246},
+    {I_VPCMPNLEQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3350, 246},
+    {I_VPCMPNLEQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3360, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNLEUB = {
+    {I_VPCMPNLEUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3370, 250},
+    {I_VPCMPNLEUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3380, 250},
+    {I_VPCMPNLEUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3390, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNLEUD = {
+    {I_VPCMPNLEUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3400, 246},
+    {I_VPCMPNLEUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3410, 246},
+    {I_VPCMPNLEUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3420, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNLEUQ = {
+    {I_VPCMPNLEUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3430, 246},
+    {I_VPCMPNLEUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3440, 246},
+    {I_VPCMPNLEUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3450, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNLEUW = {
+    {I_VPCMPNLEUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3460, 250},
+    {I_VPCMPNLEUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3470, 250},
+    {I_VPCMPNLEUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3480, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNLEW = {
+    {I_VPCMPNLEW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3490, 250},
+    {I_VPCMPNLEW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3500, 250},
+    {I_VPCMPNLEW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3510, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNLTB = {
+    {I_VPCMPNLTB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3040, 250},
+    {I_VPCMPNLTB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3050, 250},
+    {I_VPCMPNLTB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3060, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNLTD = {
+    {I_VPCMPNLTD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3070, 246},
+    {I_VPCMPNLTD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3080, 246},
+    {I_VPCMPNLTD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3090, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNLTQ = {
+    {I_VPCMPNLTQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3100, 246},
+    {I_VPCMPNLTQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3110, 246},
+    {I_VPCMPNLTQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3120, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNLTUB = {
+    {I_VPCMPNLTUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3130, 250},
+    {I_VPCMPNLTUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3140, 250},
+    {I_VPCMPNLTUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3150, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNLTUD = {
+    {I_VPCMPNLTUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3160, 246},
+    {I_VPCMPNLTUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3170, 246},
+    {I_VPCMPNLTUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3180, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNLTUQ = {
+    {I_VPCMPNLTUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3190, 246},
+    {I_VPCMPNLTUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3200, 246},
+    {I_VPCMPNLTUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3210, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNLTUW = {
+    {I_VPCMPNLTUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3220, 250},
+    {I_VPCMPNLTUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3230, 250},
+    {I_VPCMPNLTUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3240, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPNLTW = {
+    {I_VPCMPNLTW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3250, 250},
+    {I_VPCMPNLTW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3260, 250},
+    {I_VPCMPNLTW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3270, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPB = {
+    {I_VPCMPB, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9244, 250},
+    {I_VPCMPB, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9253, 250},
+    {I_VPCMPB, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9262, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPD = {
+    {I_VPCMPD, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+9271, 246},
+    {I_VPCMPD, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+9280, 246},
+    {I_VPCMPD, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+9289, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPQ = {
+    {I_VPCMPQ, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+9298, 246},
+    {I_VPCMPQ, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+9307, 246},
+    {I_VPCMPQ, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+9316, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPUB = {
+    {I_VPCMPUB, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9325, 250},
+    {I_VPCMPUB, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9334, 250},
+    {I_VPCMPUB, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9343, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPUD = {
+    {I_VPCMPUD, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+9352, 246},
+    {I_VPCMPUD, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+9361, 246},
+    {I_VPCMPUD, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+9370, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPUQ = {
+    {I_VPCMPUQ, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+9379, 246},
+    {I_VPCMPUQ, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+9388, 246},
+    {I_VPCMPUQ, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+9397, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPUW = {
+    {I_VPCMPUW, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9406, 250},
+    {I_VPCMPUW, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9415, 250},
+    {I_VPCMPUW, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9424, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCMPW = {
+    {I_VPCMPW, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9433, 250},
+    {I_VPCMPW, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9442, 250},
+    {I_VPCMPW, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9451, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCOMPRESSD = {
+    {I_VPCOMPRESSD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22280, 246},
+    {I_VPCOMPRESSD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22288, 246},
+    {I_VPCOMPRESSD, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22296, 247},
+    {I_VPCOMPRESSD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22304, 246},
+    {I_VPCOMPRESSD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22312, 246},
+    {I_VPCOMPRESSD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22320, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCOMPRESSQ = {
+    {I_VPCOMPRESSQ, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22328, 246},
+    {I_VPCOMPRESSQ, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22336, 246},
+    {I_VPCOMPRESSQ, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22344, 247},
+    {I_VPCOMPRESSQ, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22352, 246},
+    {I_VPCOMPRESSQ, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22360, 246},
+    {I_VPCOMPRESSQ, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22368, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCONFLICTD = {
+    {I_VPCONFLICTD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22376, 254},
+    {I_VPCONFLICTD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22384, 254},
+    {I_VPCONFLICTD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22392, 255},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCONFLICTQ = {
+    {I_VPCONFLICTQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22400, 254},
+    {I_VPCONFLICTQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22408, 254},
+    {I_VPCONFLICTQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22416, 255},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERMB = {
+    {I_VPERMB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22424, 256},
+    {I_VPERMB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22432, 256},
+    {I_VPERMB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22440, 256},
+    {I_VPERMB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22448, 256},
+    {I_VPERMB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22456, 257},
+    {I_VPERMB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22464, 257},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERMI2B = {
+    {I_VPERMI2B, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22504, 256},
+    {I_VPERMI2B, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22512, 256},
+    {I_VPERMI2B, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22520, 257},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERMI2D = {
+    {I_VPERMI2D, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22528, 246},
+    {I_VPERMI2D, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22536, 246},
+    {I_VPERMI2D, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22544, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERMI2PD = {
+    {I_VPERMI2PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22552, 246},
+    {I_VPERMI2PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22560, 246},
+    {I_VPERMI2PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22568, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERMI2PS = {
+    {I_VPERMI2PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22576, 246},
+    {I_VPERMI2PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22584, 246},
+    {I_VPERMI2PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22592, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERMI2Q = {
+    {I_VPERMI2Q, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22600, 246},
+    {I_VPERMI2Q, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22608, 246},
+    {I_VPERMI2Q, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22616, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERMI2W = {
+    {I_VPERMI2W, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22624, 250},
+    {I_VPERMI2W, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22632, 250},
+    {I_VPERMI2W, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22640, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERMT2B = {
+    {I_VPERMT2B, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22840, 256},
+    {I_VPERMT2B, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22848, 256},
+    {I_VPERMT2B, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22856, 257},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERMT2D = {
+    {I_VPERMT2D, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22864, 246},
+    {I_VPERMT2D, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22872, 246},
+    {I_VPERMT2D, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22880, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERMT2PD = {
+    {I_VPERMT2PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22888, 246},
+    {I_VPERMT2PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22896, 246},
+    {I_VPERMT2PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22904, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERMT2PS = {
+    {I_VPERMT2PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22912, 246},
+    {I_VPERMT2PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22920, 246},
+    {I_VPERMT2PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22928, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERMT2Q = {
+    {I_VPERMT2Q, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22936, 246},
+    {I_VPERMT2Q, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22944, 246},
+    {I_VPERMT2Q, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22952, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERMT2W = {
+    {I_VPERMT2W, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22960, 250},
+    {I_VPERMT2W, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22968, 250},
+    {I_VPERMT2W, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22976, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERMW = {
+    {I_VPERMW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22984, 250},
+    {I_VPERMW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22992, 250},
+    {I_VPERMW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23000, 250},
+    {I_VPERMW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23008, 250},
+    {I_VPERMW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23016, 251},
+    {I_VPERMW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23024, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPEXPANDD = {
+    {I_VPEXPANDD, 2, {XMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23032, 246},
+    {I_VPEXPANDD, 2, {YMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23040, 246},
+    {I_VPEXPANDD, 2, {ZMMREG,MEMORY|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23048, 247},
+    {I_VPEXPANDD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23032, 246},
+    {I_VPEXPANDD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23040, 246},
+    {I_VPEXPANDD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23048, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPEXPANDQ = {
+    {I_VPEXPANDQ, 2, {XMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23056, 246},
+    {I_VPEXPANDQ, 2, {YMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23064, 246},
+    {I_VPEXPANDQ, 2, {ZMMREG,MEMORY|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23072, 247},
+    {I_VPEXPANDQ, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23056, 246},
+    {I_VPEXPANDQ, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23064, 246},
+    {I_VPEXPANDQ, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23072, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPLZCNTD = {
+    {I_VPLZCNTD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23080, 254},
+    {I_VPLZCNTD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23088, 254},
+    {I_VPLZCNTD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23096, 255},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPLZCNTQ = {
+    {I_VPLZCNTQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23104, 254},
+    {I_VPLZCNTQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23112, 254},
+    {I_VPLZCNTQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23120, 255},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMAXSQ = {
+    {I_VPMAXSQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23368, 246},
+    {I_VPMAXSQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23376, 246},
+    {I_VPMAXSQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23384, 246},
+    {I_VPMAXSQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23392, 246},
+    {I_VPMAXSQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23400, 247},
+    {I_VPMAXSQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23408, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMAXUQ = {
+    {I_VPMAXUQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23560, 246},
+    {I_VPMAXUQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23568, 246},
+    {I_VPMAXUQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23576, 246},
+    {I_VPMAXUQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23584, 246},
+    {I_VPMAXUQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23592, 247},
+    {I_VPMAXUQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23600, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMINSQ = {
+    {I_VPMINSQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23752, 246},
+    {I_VPMINSQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23760, 246},
+    {I_VPMINSQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23768, 246},
+    {I_VPMINSQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23776, 246},
+    {I_VPMINSQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23784, 247},
+    {I_VPMINSQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23792, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMINUQ = {
+    {I_VPMINUQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23944, 246},
+    {I_VPMINUQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23952, 246},
+    {I_VPMINUQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23960, 246},
+    {I_VPMINUQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23968, 246},
+    {I_VPMINUQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23976, 247},
+    {I_VPMINUQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23984, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVB2M = {
+    {I_VPMOVB2M, 2, {KREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24040, 250},
+    {I_VPMOVB2M, 2, {KREG,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24048, 250},
+    {I_VPMOVB2M, 2, {KREG,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24056, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVD2M = {
+    {I_VPMOVD2M, 2, {KREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24064, 248},
+    {I_VPMOVD2M, 2, {KREG,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24072, 248},
+    {I_VPMOVD2M, 2, {KREG,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24080, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVDB = {
+    {I_VPMOVDB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24088, 246},
+    {I_VPMOVDB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24096, 246},
+    {I_VPMOVDB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24104, 247},
+    {I_VPMOVDB, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24112, 246},
+    {I_VPMOVDB, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24120, 246},
+    {I_VPMOVDB, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24128, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVDW = {
+    {I_VPMOVDW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24136, 246},
+    {I_VPMOVDW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24144, 246},
+    {I_VPMOVDW, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24152, 247},
+    {I_VPMOVDW, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24160, 246},
+    {I_VPMOVDW, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24168, 246},
+    {I_VPMOVDW, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24176, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVM2B = {
+    {I_VPMOVM2B, 2, {XMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24184, 250},
+    {I_VPMOVM2B, 2, {YMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24192, 250},
+    {I_VPMOVM2B, 2, {ZMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24200, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVM2D = {
+    {I_VPMOVM2D, 2, {XMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24208, 248},
+    {I_VPMOVM2D, 2, {YMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24216, 248},
+    {I_VPMOVM2D, 2, {ZMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24224, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVM2Q = {
+    {I_VPMOVM2Q, 2, {XMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24232, 248},
+    {I_VPMOVM2Q, 2, {YMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24240, 248},
+    {I_VPMOVM2Q, 2, {ZMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24248, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVM2W = {
+    {I_VPMOVM2W, 2, {XMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24256, 250},
+    {I_VPMOVM2W, 2, {YMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24264, 250},
+    {I_VPMOVM2W, 2, {ZMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24272, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVQ2M = {
+    {I_VPMOVQ2M, 2, {KREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24280, 248},
+    {I_VPMOVQ2M, 2, {KREG,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24288, 248},
+    {I_VPMOVQ2M, 2, {KREG,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24296, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVQB = {
+    {I_VPMOVQB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24304, 246},
+    {I_VPMOVQB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24312, 246},
+    {I_VPMOVQB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24320, 247},
+    {I_VPMOVQB, 2, {MEMORY|BITS16,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24328, 246},
+    {I_VPMOVQB, 2, {MEMORY|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24336, 246},
+    {I_VPMOVQB, 2, {MEMORY|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24344, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVQD = {
+    {I_VPMOVQD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24352, 246},
+    {I_VPMOVQD, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24360, 246},
+    {I_VPMOVQD, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24368, 247},
+    {I_VPMOVQD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24376, 246},
+    {I_VPMOVQD, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24384, 246},
+    {I_VPMOVQD, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24392, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVQW = {
+    {I_VPMOVQW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24400, 246},
+    {I_VPMOVQW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24408, 246},
+    {I_VPMOVQW, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24416, 247},
+    {I_VPMOVQW, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24424, 246},
+    {I_VPMOVQW, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24432, 246},
+    {I_VPMOVQW, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24440, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVSDB = {
+    {I_VPMOVSDB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24448, 246},
+    {I_VPMOVSDB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24456, 246},
+    {I_VPMOVSDB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24464, 247},
+    {I_VPMOVSDB, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24472, 246},
+    {I_VPMOVSDB, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24480, 246},
+    {I_VPMOVSDB, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24488, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVSDW = {
+    {I_VPMOVSDW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24496, 246},
+    {I_VPMOVSDW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24504, 246},
+    {I_VPMOVSDW, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24512, 247},
+    {I_VPMOVSDW, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24520, 246},
+    {I_VPMOVSDW, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24528, 246},
+    {I_VPMOVSDW, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24536, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVSQB = {
+    {I_VPMOVSQB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24544, 246},
+    {I_VPMOVSQB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24552, 246},
+    {I_VPMOVSQB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24560, 247},
+    {I_VPMOVSQB, 2, {MEMORY|BITS16,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24568, 246},
+    {I_VPMOVSQB, 2, {MEMORY|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24576, 246},
+    {I_VPMOVSQB, 2, {MEMORY|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24584, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVSQD = {
+    {I_VPMOVSQD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24592, 246},
+    {I_VPMOVSQD, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24600, 246},
+    {I_VPMOVSQD, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24608, 247},
+    {I_VPMOVSQD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24616, 246},
+    {I_VPMOVSQD, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24624, 246},
+    {I_VPMOVSQD, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24632, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVSQW = {
+    {I_VPMOVSQW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24640, 246},
+    {I_VPMOVSQW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24648, 246},
+    {I_VPMOVSQW, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24656, 247},
+    {I_VPMOVSQW, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24664, 246},
+    {I_VPMOVSQW, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24672, 246},
+    {I_VPMOVSQW, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24680, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVSWB = {
+    {I_VPMOVSWB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24688, 250},
+    {I_VPMOVSWB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24696, 250},
+    {I_VPMOVSWB, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24704, 251},
+    {I_VPMOVSWB, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24712, 250},
+    {I_VPMOVSWB, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24720, 250},
+    {I_VPMOVSWB, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24728, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVUSDB = {
+    {I_VPMOVUSDB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24880, 246},
+    {I_VPMOVUSDB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24888, 246},
+    {I_VPMOVUSDB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24896, 247},
+    {I_VPMOVUSDB, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24904, 246},
+    {I_VPMOVUSDB, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24912, 246},
+    {I_VPMOVUSDB, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24920, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVUSDW = {
+    {I_VPMOVUSDW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24928, 246},
+    {I_VPMOVUSDW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24936, 246},
+    {I_VPMOVUSDW, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24944, 247},
+    {I_VPMOVUSDW, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24952, 246},
+    {I_VPMOVUSDW, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24960, 246},
+    {I_VPMOVUSDW, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24968, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVUSQB = {
+    {I_VPMOVUSQB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24976, 246},
+    {I_VPMOVUSQB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24984, 246},
+    {I_VPMOVUSQB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24992, 247},
+    {I_VPMOVUSQB, 2, {MEMORY|BITS16,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25000, 246},
+    {I_VPMOVUSQB, 2, {MEMORY|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25008, 246},
+    {I_VPMOVUSQB, 2, {MEMORY|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25016, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVUSQD = {
+    {I_VPMOVUSQD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25024, 246},
+    {I_VPMOVUSQD, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25032, 246},
+    {I_VPMOVUSQD, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25040, 247},
+    {I_VPMOVUSQD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25048, 246},
+    {I_VPMOVUSQD, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25056, 246},
+    {I_VPMOVUSQD, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25064, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVUSQW = {
+    {I_VPMOVUSQW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25072, 246},
+    {I_VPMOVUSQW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25080, 246},
+    {I_VPMOVUSQW, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25088, 247},
+    {I_VPMOVUSQW, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25096, 246},
+    {I_VPMOVUSQW, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25104, 246},
+    {I_VPMOVUSQW, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25112, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVUSWB = {
+    {I_VPMOVUSWB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25120, 250},
+    {I_VPMOVUSWB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25128, 250},
+    {I_VPMOVUSWB, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25136, 251},
+    {I_VPMOVUSWB, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25144, 250},
+    {I_VPMOVUSWB, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25152, 250},
+    {I_VPMOVUSWB, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25160, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVW2M = {
+    {I_VPMOVW2M, 2, {KREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+25168, 250},
+    {I_VPMOVW2M, 2, {KREG,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+25176, 250},
+    {I_VPMOVW2M, 2, {KREG,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+25184, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMOVWB = {
+    {I_VPMOVWB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25192, 250},
+    {I_VPMOVWB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25200, 250},
+    {I_VPMOVWB, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25208, 251},
+    {I_VPMOVWB, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25216, 250},
+    {I_VPMOVWB, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25224, 250},
+    {I_VPMOVWB, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25232, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMULLQ = {
+    {I_VPMULLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25624, 248},
+    {I_VPMULLQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25632, 248},
+    {I_VPMULLQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25640, 248},
+    {I_VPMULLQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25648, 248},
+    {I_VPMULLQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25656, 249},
+    {I_VPMULLQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25664, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMULTISHIFTQB = {
+    {I_VPMULTISHIFTQB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25720, 256},
+    {I_VPMULTISHIFTQB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25728, 256},
+    {I_VPMULTISHIFTQB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25736, 256},
+    {I_VPMULTISHIFTQB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25744, 256},
+    {I_VPMULTISHIFTQB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25752, 257},
+    {I_VPMULTISHIFTQB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25760, 257},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPORD = {
+    {I_VPORD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25816, 246},
+    {I_VPORD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25824, 246},
+    {I_VPORD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25832, 246},
+    {I_VPORD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25840, 246},
+    {I_VPORD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25848, 247},
+    {I_VPORD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25856, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPORQ = {
+    {I_VPORQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25864, 246},
+    {I_VPORQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25872, 246},
+    {I_VPORQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25880, 246},
+    {I_VPORQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25888, 246},
+    {I_VPORQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25896, 247},
+    {I_VPORQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25904, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPROLD = {
+    {I_VPROLD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9775, 246},
+    {I_VPROLD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9784, 246},
+    {I_VPROLD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9793, 246},
+    {I_VPROLD, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9802, 246},
+    {I_VPROLD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9811, 247},
+    {I_VPROLD, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9820, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPROLQ = {
+    {I_VPROLQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9829, 246},
+    {I_VPROLQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9838, 246},
+    {I_VPROLQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9847, 246},
+    {I_VPROLQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9856, 246},
+    {I_VPROLQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9865, 247},
+    {I_VPROLQ, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9874, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPROLVD = {
+    {I_VPROLVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25912, 246},
+    {I_VPROLVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25920, 246},
+    {I_VPROLVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25928, 246},
+    {I_VPROLVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25936, 246},
+    {I_VPROLVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25944, 247},
+    {I_VPROLVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25952, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPROLVQ = {
+    {I_VPROLVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25960, 246},
+    {I_VPROLVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25968, 246},
+    {I_VPROLVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25976, 246},
+    {I_VPROLVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25984, 246},
+    {I_VPROLVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25992, 247},
+    {I_VPROLVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26000, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPRORD = {
+    {I_VPRORD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9883, 246},
+    {I_VPRORD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9892, 246},
+    {I_VPRORD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9901, 246},
+    {I_VPRORD, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9910, 246},
+    {I_VPRORD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9919, 247},
+    {I_VPRORD, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9928, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPRORQ = {
+    {I_VPRORQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9937, 246},
+    {I_VPRORQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9946, 246},
+    {I_VPRORQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9955, 246},
+    {I_VPRORQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9964, 246},
+    {I_VPRORQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9973, 247},
+    {I_VPRORQ, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9982, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPRORVD = {
+    {I_VPRORVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26008, 246},
+    {I_VPRORVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26016, 246},
+    {I_VPRORVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26024, 246},
+    {I_VPRORVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26032, 246},
+    {I_VPRORVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26040, 247},
+    {I_VPRORVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26048, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPRORVQ = {
+    {I_VPRORVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26056, 246},
+    {I_VPRORVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26064, 246},
+    {I_VPRORVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26072, 246},
+    {I_VPRORVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26080, 246},
+    {I_VPRORVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26088, 247},
+    {I_VPRORVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26096, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSCATTERDD = {
+    {I_VPSCATTERDD, 2, {XMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9991, 246},
+    {I_VPSCATTERDD, 2, {YMEM|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10000, 246},
+    {I_VPSCATTERDD, 2, {ZMEM|BITS32,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10009, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSCATTERDQ = {
+    {I_VPSCATTERDQ, 2, {XMEM|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10018, 246},
+    {I_VPSCATTERDQ, 2, {XMEM|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10027, 246},
+    {I_VPSCATTERDQ, 2, {YMEM|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10036, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSCATTERQD = {
+    {I_VPSCATTERQD, 2, {XMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10045, 246},
+    {I_VPSCATTERQD, 2, {YMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10054, 246},
+    {I_VPSCATTERQD, 2, {ZMEM|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10063, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSCATTERQQ = {
+    {I_VPSCATTERQQ, 2, {XMEM|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10072, 246},
+    {I_VPSCATTERQQ, 2, {YMEM|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10081, 246},
+    {I_VPSCATTERQQ, 2, {ZMEM|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10090, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSLLVW = {
+    {I_VPSLLVW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26392, 250},
+    {I_VPSLLVW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26400, 250},
+    {I_VPSLLVW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26408, 250},
+    {I_VPSLLVW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26416, 250},
+    {I_VPSLLVW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26424, 251},
+    {I_VPSLLVW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26432, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSRAQ = {
+    {I_VPSRAQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26536, 246},
+    {I_VPSRAQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26544, 246},
+    {I_VPSRAQ, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26552, 246},
+    {I_VPSRAQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26560, 246},
+    {I_VPSRAQ, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26568, 247},
+    {I_VPSRAQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26576, 247},
+    {I_VPSRAQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10450, 246},
+    {I_VPSRAQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10459, 246},
+    {I_VPSRAQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10468, 246},
+    {I_VPSRAQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10477, 246},
+    {I_VPSRAQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10486, 247},
+    {I_VPSRAQ, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10495, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSRAVQ = {
+    {I_VPSRAVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26632, 246},
+    {I_VPSRAVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26640, 246},
+    {I_VPSRAVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26648, 246},
+    {I_VPSRAVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26656, 246},
+    {I_VPSRAVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26664, 247},
+    {I_VPSRAVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26672, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSRAVW = {
+    {I_VPSRAVW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26680, 250},
+    {I_VPSRAVW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26688, 250},
+    {I_VPSRAVW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26696, 250},
+    {I_VPSRAVW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26704, 250},
+    {I_VPSRAVW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26712, 251},
+    {I_VPSRAVW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26720, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSRLVW = {
+    {I_VPSRLVW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26968, 250},
+    {I_VPSRLVW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26976, 250},
+    {I_VPSRLVW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26984, 250},
+    {I_VPSRLVW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26992, 250},
+    {I_VPSRLVW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27000, 251},
+    {I_VPSRLVW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27008, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPTERNLOGD = {
+    {I_VPTERNLOGD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+10774, 246},
+    {I_VPTERNLOGD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+10783, 246},
+    {I_VPTERNLOGD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+10792, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPTERNLOGQ = {
+    {I_VPTERNLOGQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+10801, 246},
+    {I_VPTERNLOGQ, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+10810, 246},
+    {I_VPTERNLOGQ, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+10819, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPTESTMB = {
+    {I_VPTESTMB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27448, 250},
+    {I_VPTESTMB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27456, 250},
+    {I_VPTESTMB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27464, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPTESTMD = {
+    {I_VPTESTMD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+27472, 246},
+    {I_VPTESTMD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+27480, 246},
+    {I_VPTESTMD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+27488, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPTESTMQ = {
+    {I_VPTESTMQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+27496, 246},
+    {I_VPTESTMQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+27504, 246},
+    {I_VPTESTMQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+27512, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPTESTMW = {
+    {I_VPTESTMW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27520, 250},
+    {I_VPTESTMW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27528, 250},
+    {I_VPTESTMW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27536, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPTESTNMB = {
+    {I_VPTESTNMB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27544, 250},
+    {I_VPTESTNMB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27552, 250},
+    {I_VPTESTNMB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27560, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPTESTNMD = {
+    {I_VPTESTNMD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+27568, 246},
+    {I_VPTESTNMD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+27576, 246},
+    {I_VPTESTNMD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+27584, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPTESTNMQ = {
+    {I_VPTESTNMQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+27592, 246},
+    {I_VPTESTNMQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+27600, 246},
+    {I_VPTESTNMQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+27608, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPTESTNMW = {
+    {I_VPTESTNMW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27616, 250},
+    {I_VPTESTNMW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27624, 250},
+    {I_VPTESTNMW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27632, 251},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPXORD = {
+    {I_VPXORD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28024, 246},
+    {I_VPXORD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28032, 246},
+    {I_VPXORD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28040, 246},
+    {I_VPXORD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28048, 246},
+    {I_VPXORD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28056, 247},
+    {I_VPXORD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28064, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPXORQ = {
+    {I_VPXORQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28072, 246},
+    {I_VPXORQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28080, 246},
+    {I_VPXORQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28088, 246},
+    {I_VPXORQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28096, 246},
+    {I_VPXORQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28104, 247},
+    {I_VPXORQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28112, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRANGEPD = {
+    {I_VRANGEPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+10828, 248},
+    {I_VRANGEPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10837, 248},
+    {I_VRANGEPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+10846, 248},
+    {I_VRANGEPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10855, 248},
+    {I_VRANGEPD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64|SAE,0,0}, nasm_bytecodes+10864, 249},
+    {I_VRANGEPD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+10873, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRANGEPS = {
+    {I_VRANGEPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+10882, 248},
+    {I_VRANGEPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10891, 248},
+    {I_VRANGEPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+10900, 248},
+    {I_VRANGEPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10909, 248},
+    {I_VRANGEPS, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32|SAE,0,0}, nasm_bytecodes+10918, 249},
+    {I_VRANGEPS, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+10927, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRANGESD = {
+    {I_VRANGESD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+10936, 249},
+    {I_VRANGESD, 3, {XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+10945, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRANGESS = {
+    {I_VRANGESS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+10954, 249},
+    {I_VRANGESS, 3, {XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+10963, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRCP14PD = {
+    {I_VRCP14PD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28120, 246},
+    {I_VRCP14PD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28128, 246},
+    {I_VRCP14PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28136, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRCP14PS = {
+    {I_VRCP14PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28144, 246},
+    {I_VRCP14PS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28152, 246},
+    {I_VRCP14PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28160, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRCP14SD = {
+    {I_VRCP14SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28168, 247},
+    {I_VRCP14SD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28176, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRCP14SS = {
+    {I_VRCP14SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28184, 247},
+    {I_VRCP14SS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28192, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRCP28PD = {
+    {I_VRCP28PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+28200, 252},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRCP28PS = {
+    {I_VRCP28PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+28208, 252},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRCP28SD = {
+    {I_VRCP28SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+28216, 252},
+    {I_VRCP28SD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+28224, 252},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRCP28SS = {
+    {I_VRCP28SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+28232, 252},
+    {I_VRCP28SS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+28240, 252},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VREDUCEPD = {
+    {I_VREDUCEPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10972, 248},
+    {I_VREDUCEPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10981, 248},
+    {I_VREDUCEPD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+10990, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VREDUCEPS = {
+    {I_VREDUCEPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10999, 248},
+    {I_VREDUCEPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11008, 248},
+    {I_VREDUCEPS, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+11017, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VREDUCESD = {
+    {I_VREDUCESD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+11026, 249},
+    {I_VREDUCESD, 3, {XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+11035, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VREDUCESS = {
+    {I_VREDUCESS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+11044, 249},
+    {I_VREDUCESS, 3, {XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+11053, 249},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRNDSCALEPD = {
+    {I_VRNDSCALEPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11062, 246},
+    {I_VRNDSCALEPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11071, 246},
+    {I_VRNDSCALEPD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+11080, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRNDSCALEPS = {
+    {I_VRNDSCALEPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11089, 246},
+    {I_VRNDSCALEPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11098, 246},
+    {I_VRNDSCALEPS, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+11107, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRNDSCALESD = {
+    {I_VRNDSCALESD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+11116, 247},
+    {I_VRNDSCALESD, 3, {XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+11125, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRNDSCALESS = {
+    {I_VRNDSCALESS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+11134, 247},
+    {I_VRNDSCALESS, 3, {XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+11143, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRSQRT14PD = {
+    {I_VRSQRT14PD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28248, 246},
+    {I_VRSQRT14PD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28256, 246},
+    {I_VRSQRT14PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28264, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRSQRT14PS = {
+    {I_VRSQRT14PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28272, 246},
+    {I_VRSQRT14PS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28280, 246},
+    {I_VRSQRT14PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28288, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRSQRT14SD = {
+    {I_VRSQRT14SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28296, 247},
+    {I_VRSQRT14SD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28304, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRSQRT14SS = {
+    {I_VRSQRT14SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28312, 247},
+    {I_VRSQRT14SS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28320, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRSQRT28PD = {
+    {I_VRSQRT28PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+28328, 252},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRSQRT28PS = {
+    {I_VRSQRT28PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+28336, 252},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRSQRT28SD = {
+    {I_VRSQRT28SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+28344, 252},
+    {I_VRSQRT28SD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+28352, 252},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRSQRT28SS = {
+    {I_VRSQRT28SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+28360, 252},
+    {I_VRSQRT28SS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+28368, 252},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSCALEFPD = {
+    {I_VSCALEFPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28376, 246},
+    {I_VSCALEFPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28384, 246},
+    {I_VSCALEFPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28392, 246},
+    {I_VSCALEFPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28400, 246},
+    {I_VSCALEFPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+28408, 247},
+    {I_VSCALEFPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+28416, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSCALEFPS = {
+    {I_VSCALEFPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28424, 246},
+    {I_VSCALEFPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28432, 246},
+    {I_VSCALEFPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28440, 246},
+    {I_VSCALEFPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28448, 246},
+    {I_VSCALEFPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+28456, 247},
+    {I_VSCALEFPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+28464, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSCALEFSD = {
+    {I_VSCALEFSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+28472, 247},
+    {I_VSCALEFSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+28480, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSCALEFSS = {
+    {I_VSCALEFSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+28488, 247},
+    {I_VSCALEFSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+28496, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSCATTERDPD = {
+    {I_VSCATTERDPD, 2, {XMEM|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11152, 246},
+    {I_VSCATTERDPD, 2, {XMEM|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11161, 246},
+    {I_VSCATTERDPD, 2, {YMEM|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11170, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSCATTERDPS = {
+    {I_VSCATTERDPS, 2, {XMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11179, 246},
+    {I_VSCATTERDPS, 2, {YMEM|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11188, 246},
+    {I_VSCATTERDPS, 2, {ZMEM|BITS32,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11197, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSCATTERPF0DPD = {
+    {I_VSCATTERPF0DPD, 1, {YMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11206, 253},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSCATTERPF0DPS = {
+    {I_VSCATTERPF0DPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11215, 253},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSCATTERPF0QPD = {
+    {I_VSCATTERPF0QPD, 1, {ZMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11224, 253},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSCATTERPF0QPS = {
+    {I_VSCATTERPF0QPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11233, 253},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSCATTERPF1DPD = {
+    {I_VSCATTERPF1DPD, 1, {YMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11242, 253},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSCATTERPF1DPS = {
+    {I_VSCATTERPF1DPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11251, 253},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSCATTERPF1QPD = {
+    {I_VSCATTERPF1QPD, 1, {ZMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11260, 253},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSCATTERPF1QPS = {
+    {I_VSCATTERPF1QPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11269, 253},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSCATTERQPD = {
+    {I_VSCATTERQPD, 2, {XMEM|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11278, 246},
+    {I_VSCATTERQPD, 2, {YMEM|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11287, 246},
+    {I_VSCATTERQPD, 2, {ZMEM|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11296, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSCATTERQPS = {
+    {I_VSCATTERQPS, 2, {XMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11305, 246},
+    {I_VSCATTERQPS, 2, {YMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11314, 246},
+    {I_VSCATTERQPS, 2, {ZMEM|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11323, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSHUFF32X4 = {
+    {I_VSHUFF32X4, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11332, 246},
+    {I_VSHUFF32X4, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11341, 246},
+    {I_VSHUFF32X4, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11350, 247},
+    {I_VSHUFF32X4, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11359, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSHUFF64X2 = {
+    {I_VSHUFF64X2, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11368, 246},
+    {I_VSHUFF64X2, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11377, 246},
+    {I_VSHUFF64X2, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11386, 247},
+    {I_VSHUFF64X2, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11395, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSHUFI32X4 = {
+    {I_VSHUFI32X4, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11404, 246},
+    {I_VSHUFI32X4, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11413, 246},
+    {I_VSHUFI32X4, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11422, 247},
+    {I_VSHUFI32X4, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11431, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSHUFI64X2 = {
+    {I_VSHUFI64X2, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11440, 246},
+    {I_VSHUFI64X2, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11449, 246},
+    {I_VSHUFI64X2, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11458, 247},
+    {I_VSHUFI64X2, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11467, 247},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RDPKRU = {
+    {I_RDPKRU, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46176, 139},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_WRPKRU = {
+    {I_WRPKRU, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46182, 139},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RDPID = {
+    {I_RDPID, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42393, 260},
+    {I_RDPID, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42392, 139},
+    {I_RDPID, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42393, 261},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CLFLUSHOPT = {
+    {I_CLFLUSHOPT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46055, 138},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CLWB = {
+    {I_CLWB, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46061, 138},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PCOMMIT = {
+    {I_PCOMMIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46067, 262},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CLZERO = {
+    {I_CLZERO, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46086, 263},
+    {I_CLZERO, 1, {REG_AX,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46073, 264},
+    {I_CLZERO, 1, {REG_EAX,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46079, 263},
+    {I_CLZERO, 1, {REG_RAX,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46085, 265},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PTWRITE = {
+    {I_PTWRITE, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42400, 138},
+    {I_PTWRITE, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42399, 139},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CLDEMOTE = {
+    {I_CLDEMOTE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46091, 138},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVDIRI = {
+    {I_MOVDIRI, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42406, 266},
+    {I_MOVDIRI, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42413, 267},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MOVDIR64B = {
+    {I_MOVDIR64B, 2, {REG_GPR|BITS16,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+29016, 260},
+    {I_MOVDIR64B, 2, {REG_GPR|BITS32,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+29024, 138},
+    {I_MOVDIR64B, 2, {REG_GPR|BITS64,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+11584, 139},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PCONFIG = {
+    {I_PCONFIG, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46097, 138},
+    {I_PCONFIG, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46097, 291},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_TPAUSE = {
+    {I_TPAUSE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46061, 138},
+    {I_TPAUSE, 3, {REG_GPR|BITS32,REG_EDX,REG_EAX,0,0}, NO_DECORATOR, nasm_bytecodes+46061, 138},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_UMONITOR = {
+    {I_UMONITOR, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42420, 260},
+    {I_UMONITOR, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42427, 138},
+    {I_UMONITOR, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+29032, 139},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_UMWAIT = {
+    {I_UMWAIT, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46103, 138},
+    {I_UMWAIT, 3, {REG_GPR|BITS32,REG_EDX,REG_EAX,0,0}, NO_DECORATOR, nasm_bytecodes+46103, 138},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_WBNOINVD = {
+    {I_WBNOINVD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49288, 138},
+    {I_WBNOINVD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49288, 293},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_GF2P8AFFINEINVQB = {
+    {I_GF2P8AFFINEINVQB, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29040, 268},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGF2P8AFFINEINVQB = {
+    {I_VGF2P8AFFINEINVQB, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+29048, 269},
+    {I_VGF2P8AFFINEINVQB, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29056, 269},
+    {I_VGF2P8AFFINEINVQB, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+29064, 269},
+    {I_VGF2P8AFFINEINVQB, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29072, 269},
+    {I_VGF2P8AFFINEINVQB, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11593, 270},
+    {I_VGF2P8AFFINEINVQB, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11602, 270},
+    {I_VGF2P8AFFINEINVQB, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11611, 270},
+    {I_VGF2P8AFFINEINVQB, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11620, 270},
+    {I_VGF2P8AFFINEINVQB, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11629, 271},
+    {I_VGF2P8AFFINEINVQB, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11638, 271},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_GF2P8AFFINEQB = {
+    {I_GF2P8AFFINEQB, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29080, 268},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGF2P8AFFINEQB = {
+    {I_VGF2P8AFFINEQB, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+29088, 269},
+    {I_VGF2P8AFFINEQB, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29096, 269},
+    {I_VGF2P8AFFINEQB, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+29104, 269},
+    {I_VGF2P8AFFINEQB, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29112, 269},
+    {I_VGF2P8AFFINEQB, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11647, 270},
+    {I_VGF2P8AFFINEQB, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11656, 270},
+    {I_VGF2P8AFFINEQB, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11665, 270},
+    {I_VGF2P8AFFINEQB, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11674, 270},
+    {I_VGF2P8AFFINEQB, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11683, 271},
+    {I_VGF2P8AFFINEQB, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11692, 271},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_GF2P8MULB = {
+    {I_GF2P8MULB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+42434, 268},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGF2P8MULB = {
+    {I_VGF2P8MULB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+42441, 269},
+    {I_VGF2P8MULB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+42448, 269},
+    {I_VGF2P8MULB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+42455, 269},
+    {I_VGF2P8MULB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+42462, 269},
+    {I_VGF2P8MULB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29120, 270},
+    {I_VGF2P8MULB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29128, 270},
+    {I_VGF2P8MULB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29136, 270},
+    {I_VGF2P8MULB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29144, 270},
+    {I_VGF2P8MULB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29152, 271},
+    {I_VGF2P8MULB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29160, 271},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCOMPRESSB = {
+    {I_VPCOMPRESSB, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29168, 272},
+    {I_VPCOMPRESSB, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29176, 272},
+    {I_VPCOMPRESSB, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29184, 273},
+    {I_VPCOMPRESSB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29192, 272},
+    {I_VPCOMPRESSB, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29200, 272},
+    {I_VPCOMPRESSB, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29208, 273},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPCOMPRESSW = {
+    {I_VPCOMPRESSW, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29216, 272},
+    {I_VPCOMPRESSW, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29224, 272},
+    {I_VPCOMPRESSW, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29232, 273},
+    {I_VPCOMPRESSW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29240, 272},
+    {I_VPCOMPRESSW, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29248, 272},
+    {I_VPCOMPRESSW, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29256, 273},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPEXPANDB = {
+    {I_VPEXPANDB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29264, 272},
+    {I_VPEXPANDB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29272, 272},
+    {I_VPEXPANDB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29280, 273},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPEXPANDW = {
+    {I_VPEXPANDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29288, 272},
+    {I_VPEXPANDW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29296, 272},
+    {I_VPEXPANDW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29304, 273},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSHLDW = {
+    {I_VPSHLDW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11701, 272},
+    {I_VPSHLDW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11710, 272},
+    {I_VPSHLDW, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11719, 272},
+    {I_VPSHLDW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11728, 272},
+    {I_VPSHLDW, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11737, 273},
+    {I_VPSHLDW, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11746, 273},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSHLDD = {
+    {I_VPSHLDD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11755, 272},
+    {I_VPSHLDD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11764, 272},
+    {I_VPSHLDD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11773, 272},
+    {I_VPSHLDD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11782, 272},
+    {I_VPSHLDD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11791, 273},
+    {I_VPSHLDD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11800, 273},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSHLDQ = {
+    {I_VPSHLDQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11809, 272},
+    {I_VPSHLDQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11818, 272},
+    {I_VPSHLDQ, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11827, 272},
+    {I_VPSHLDQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11836, 272},
+    {I_VPSHLDQ, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11845, 273},
+    {I_VPSHLDQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11854, 273},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSHLDVW = {
+    {I_VPSHLDVW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29312, 272},
+    {I_VPSHLDVW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29320, 272},
+    {I_VPSHLDVW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29328, 272},
+    {I_VPSHLDVW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29336, 272},
+    {I_VPSHLDVW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29344, 273},
+    {I_VPSHLDVW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29352, 273},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSHLDVD = {
+    {I_VPSHLDVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29360, 272},
+    {I_VPSHLDVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29368, 272},
+    {I_VPSHLDVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29376, 272},
+    {I_VPSHLDVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29384, 272},
+    {I_VPSHLDVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29392, 273},
+    {I_VPSHLDVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29400, 273},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSHLDVQ = {
+    {I_VPSHLDVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+29408, 272},
+    {I_VPSHLDVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+29416, 272},
+    {I_VPSHLDVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+29424, 272},
+    {I_VPSHLDVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+29432, 272},
+    {I_VPSHLDVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+29440, 273},
+    {I_VPSHLDVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+29448, 273},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSHRDW = {
+    {I_VPSHRDW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11863, 272},
+    {I_VPSHRDW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11872, 272},
+    {I_VPSHRDW, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11881, 272},
+    {I_VPSHRDW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11890, 272},
+    {I_VPSHRDW, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11899, 273},
+    {I_VPSHRDW, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11908, 273},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSHRDD = {
+    {I_VPSHRDD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11917, 272},
+    {I_VPSHRDD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11926, 272},
+    {I_VPSHRDD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11935, 272},
+    {I_VPSHRDD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11944, 272},
+    {I_VPSHRDD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11953, 273},
+    {I_VPSHRDD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11962, 273},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSHRDQ = {
+    {I_VPSHRDQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11971, 272},
+    {I_VPSHRDQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11980, 272},
+    {I_VPSHRDQ, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11989, 272},
+    {I_VPSHRDQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11998, 272},
+    {I_VPSHRDQ, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+12007, 273},
+    {I_VPSHRDQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+12016, 273},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSHRDVW = {
+    {I_VPSHRDVW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29456, 272},
+    {I_VPSHRDVW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29464, 272},
+    {I_VPSHRDVW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29472, 272},
+    {I_VPSHRDVW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29480, 272},
+    {I_VPSHRDVW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29488, 273},
+    {I_VPSHRDVW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29496, 273},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSHRDVD = {
+    {I_VPSHRDVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29504, 272},
+    {I_VPSHRDVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29512, 272},
+    {I_VPSHRDVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29520, 272},
+    {I_VPSHRDVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29528, 272},
+    {I_VPSHRDVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29536, 273},
+    {I_VPSHRDVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29544, 273},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSHRDVQ = {
+    {I_VPSHRDVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+29552, 272},
+    {I_VPSHRDVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+29560, 272},
+    {I_VPSHRDVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+29568, 272},
+    {I_VPSHRDVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+29576, 272},
+    {I_VPSHRDVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+29584, 273},
+    {I_VPSHRDVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+29592, 273},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPDPBUSD = {
+    {I_VPDPBUSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29600, 274},
+    {I_VPDPBUSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29608, 274},
+    {I_VPDPBUSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29616, 274},
+    {I_VPDPBUSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29624, 274},
+    {I_VPDPBUSD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29632, 275},
+    {I_VPDPBUSD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29640, 275},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPDPBUSDS = {
+    {I_VPDPBUSDS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29648, 274},
+    {I_VPDPBUSDS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29656, 274},
+    {I_VPDPBUSDS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29664, 274},
+    {I_VPDPBUSDS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29672, 274},
+    {I_VPDPBUSDS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29680, 275},
+    {I_VPDPBUSDS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29688, 275},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPDPWSSD = {
+    {I_VPDPWSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29696, 274},
+    {I_VPDPWSSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29704, 274},
+    {I_VPDPWSSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29712, 274},
+    {I_VPDPWSSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29720, 274},
+    {I_VPDPWSSD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29728, 275},
+    {I_VPDPWSSD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29736, 275},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPDPWSSDS = {
+    {I_VPDPWSSDS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29744, 274},
+    {I_VPDPWSSDS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29752, 274},
+    {I_VPDPWSSDS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29760, 274},
+    {I_VPDPWSSDS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29768, 274},
+    {I_VPDPWSSDS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29776, 275},
+    {I_VPDPWSSDS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29784, 275},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPOPCNTB = {
+    {I_VPOPCNTB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29792, 276},
+    {I_VPOPCNTB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29800, 276},
+    {I_VPOPCNTB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29808, 277},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPOPCNTW = {
+    {I_VPOPCNTW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29816, 276},
+    {I_VPOPCNTW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29824, 276},
+    {I_VPOPCNTW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29832, 277},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPOPCNTD = {
+    {I_VPOPCNTD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29840, 278},
+    {I_VPOPCNTD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29848, 278},
+    {I_VPOPCNTD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29856, 279},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPOPCNTQ = {
+    {I_VPOPCNTQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29864, 278},
+    {I_VPOPCNTQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29872, 278},
+    {I_VPOPCNTQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29880, 279},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSHUFBITQMB = {
+    {I_VPSHUFBITQMB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29888, 276},
+    {I_VPSHUFBITQMB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29896, 276},
+    {I_VPSHUFBITQMB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29904, 277},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_V4FMADDPS = {
+    {I_V4FMADDPS, 3, {ZMM_L16,ZMM_L16|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29912, 280},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_V4FNMADDPS = {
+    {I_V4FNMADDPS, 3, {ZMM_L16,ZMM_L16|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29920, 280},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_V4FMADDSS = {
+    {I_V4FMADDSS, 3, {ZMM_L16,ZMM_L16|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29928, 280},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_V4FNMADDSS = {
+    {I_V4FNMADDSS, 3, {ZMM_L16,ZMM_L16|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29936, 280},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_V4DPWSSDS = {
+    {I_V4DPWSSDS, 3, {ZMM_L16,ZMM_L16|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29944, 281},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_V4DPWSSD = {
+    {I_V4DPWSSD, 3, {ZMM_L16,ZMM_L16|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29952, 281},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ENCLS = {
+    {I_ENCLS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46109, 282},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ENCLU = {
+    {I_ENCLU, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46115, 282},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ENCLV = {
+    {I_ENCLV, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46121, 282},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CLRSSBSY = {
+    {I_CLRSSBSY, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42428, 283},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ENDBR32 = {
+    {I_ENDBR32, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46127, 283},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ENDBR64 = {
+    {I_ENDBR64, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46133, 283},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_INCSSPD = {
+    {I_INCSSPD, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42469, 283},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_INCSSPQ = {
+    {I_INCSSPQ, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42476, 284},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RDSSPD = {
+    {I_RDSSPD, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42483, 283},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RDSSPQ = {
+    {I_RDSSPQ, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42490, 284},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RSTORSSP = {
+    {I_RSTORSSP, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46139, 283},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SAVEPREVSSP = {
+    {I_SAVEPREVSSP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46145, 283},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SETSSBSY = {
+    {I_SETSSBSY, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46151, 283},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_WRUSSD = {
+    {I_WRUSSD, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29960, 283},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_WRUSSQ = {
+    {I_WRUSSQ, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29968, 284},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_WRSSD = {
+    {I_WRSSD, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42497, 283},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_WRSSQ = {
+    {I_WRSSQ, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42504, 284},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ENQCMD = {
+    {I_ENQCMD, 2, {REG_GPR|BITS16,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+29976, 285},
+    {I_ENQCMD, 2, {REG_GPR|BITS32,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+29976, 285},
+    {I_ENQCMD, 2, {REG_GPR|BITS32,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+29984, 286},
+    {I_ENQCMD, 2, {REG_GPR|BITS64,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+29992, 287},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ENQCMDS = {
+    {I_ENQCMDS, 2, {REG_GPR|BITS16,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+30000, 288},
+    {I_ENQCMDS, 2, {REG_GPR|BITS32,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+30000, 288},
+    {I_ENQCMDS, 2, {REG_GPR|BITS32,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+30008, 289},
+    {I_ENQCMDS, 2, {REG_GPR|BITS64,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+30016, 290},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SERIALIZE = {
+    {I_SERIALIZE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46157, 292},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XRESLDTRK = {
+    {I_XRESLDTRK, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46163, 294},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XSUSLDTRK = {
+    {I_XSUSLDTRK, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46169, 294},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTNE2PS2BF16 = {
+    {I_VCVTNE2PS2BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30024, 295},
+    {I_VCVTNE2PS2BF16, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30032, 295},
+    {I_VCVTNE2PS2BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30040, 295},
+    {I_VCVTNE2PS2BF16, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30048, 295},
+    {I_VCVTNE2PS2BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30056, 295},
+    {I_VCVTNE2PS2BF16, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30064, 295},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VDPBF16PS = {
+    {I_VDPBF16PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30120, 295},
+    {I_VDPBF16PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30128, 295},
+    {I_VDPBF16PS, 3, {YMMREG,YMMREG,RM_YMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30136, 295},
+    {I_VDPBF16PS, 2, {YMMREG,RM_YMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30144, 295},
+    {I_VDPBF16PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30152, 295},
+    {I_VDPBF16PS, 2, {ZMMREG,RM_ZMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30160, 295},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VP2INTERSECTD = {
+    {I_VP2INTERSECTD, 3, {KREG|RS2,XMMREG,RM_XMM|BITS128,0,0}, {0,0,B32,0,0}, nasm_bytecodes+30168, 295},
+    {I_VP2INTERSECTD, 3, {KREG|RS2,YMMREG,RM_YMM|BITS128,0,0}, {0,0,B32,0,0}, nasm_bytecodes+30176, 295},
+    {I_VP2INTERSECTD, 3, {KREG|RS2,ZMMREG,RM_ZMM|BITS128,0,0}, {0,0,B32,0,0}, nasm_bytecodes+30184, 295},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LDTILECFG = {
+    {I_LDTILECFG, 1, {MEMORY|BITS512,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42511, 296},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_STTILECFG = {
+    {I_STTILECFG, 1, {MEMORY|BITS512,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42518, 296},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_TDPBF16PS = {
+    {I_TDPBF16PS, 3, {TMMREG,TMMREG,TMMREG,0,0}, NO_DECORATOR, nasm_bytecodes+42525, 297},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_TDPBSSD = {
+    {I_TDPBSSD, 3, {TMMREG,TMMREG,TMMREG,0,0}, NO_DECORATOR, nasm_bytecodes+42532, 298},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_TDPBSUD = {
+    {I_TDPBSUD, 3, {TMMREG,TMMREG,TMMREG,0,0}, NO_DECORATOR, nasm_bytecodes+42539, 298},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_TDPBUSD = {
+    {I_TDPBUSD, 3, {TMMREG,TMMREG,TMMREG,0,0}, NO_DECORATOR, nasm_bytecodes+42546, 298},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_TDPBUUD = {
+    {I_TDPBUUD, 3, {TMMREG,TMMREG,TMMREG,0,0}, NO_DECORATOR, nasm_bytecodes+42553, 298},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_TILELOADD = {
+    {I_TILELOADD, 2, {TMMREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+42560, 299},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_TILELOADDT1 = {
+    {I_TILELOADDT1, 2, {TMMREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+42567, 299},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_TILERELEASE = {
+    {I_TILERELEASE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42574, 300},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_TILESTORED = {
+    {I_TILESTORED, 2, {MEMORY,TMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42581, 299},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_TILEZERO = {
+    {I_TILEZERO, 1, {TMMREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+30192, 300},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VADDPH = {
+    {I_VADDPH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+30200, 301},
+    {I_VADDPH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30208, 301},
+    {I_VADDPH, 3, {YMMREG,YMMREG,RM_YMM|BITS16,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+30216, 301},
+    {I_VADDPH, 2, {YMMREG,RM_YMM|BITS16,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30224, 301},
+    {I_VADDPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS16,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+30232, 302},
+    {I_VADDPH, 2, {ZMMREG,RM_ZMM|BITS16,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30240, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VADDSH = {
+    {I_VADDSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+30248, 302},
+    {I_VADDSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+30256, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPPH = {
+    {I_VCMPPH, 4, {KREG,XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0}, {MASK,0,B16,0,0}, nasm_bytecodes+12025, 301},
+    {I_VCMPPH, 3, {KREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+12034, 301},
+    {I_VCMPPH, 4, {KREG,YMMREG,RM_YMM|BITS16,IMMEDIATE|BITS8,0}, {MASK,0,B16,0,0}, nasm_bytecodes+12043, 301},
+    {I_VCMPPH, 3, {KREG,RM_YMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+12052, 301},
+    {I_VCMPPH, 4, {KREG,ZMMREG,RM_ZMM|BITS16,IMMEDIATE|BITS8,0}, {MASK,0,B16|SAE,0,0}, nasm_bytecodes+12061, 302},
+    {I_VCMPPH, 3, {KREG,RM_ZMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK,B16|SAE,0,0,0}, nasm_bytecodes+12070, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCMPSH = {
+    {I_VCMPSH, 4, {KREG,XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+12079, 302},
+    {I_VCMPSH, 3, {KREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK,SAE,0,0,0}, nasm_bytecodes+12088, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCOMISH = {
+    {I_VCOMISH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+30264, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTDQ2PH = {
+    {I_VCVTDQ2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30272, 301},
+    {I_VCVTDQ2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30280, 301},
+    {I_VCVTDQ2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+30288, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTPD2PH = {
+    {I_VCVTPD2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+30296, 301},
+    {I_VCVTPD2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+30304, 301},
+    {I_VCVTPD2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+30312, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTPH2DQ = {
+    {I_VCVTPH2DQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30320, 301},
+    {I_VCVTPH2DQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30328, 301},
+    {I_VCVTPH2DQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30336, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTPH2PD = {
+    {I_VCVTPH2PD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30344, 301},
+    {I_VCVTPH2PD, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30352, 301},
+    {I_VCVTPH2PD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+30360, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTPH2PSX = {
+    {I_VCVTPH2PSX, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30368, 301},
+    {I_VCVTPH2PSX, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30376, 301},
+    {I_VCVTPH2PSX, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+30384, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTPH2QQ = {
+    {I_VCVTPH2QQ, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30392, 301},
+    {I_VCVTPH2QQ, 2, {YMM_L16,RM_XMM_L16|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30400, 301},
+    {I_VCVTPH2QQ, 2, {ZMM_L16,RM_XMM_L16|BITS128,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30408, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTPH2UDQ = {
+    {I_VCVTPH2UDQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30416, 301},
+    {I_VCVTPH2UDQ, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30424, 301},
+    {I_VCVTPH2UDQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30432, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTPH2UQQ = {
+    {I_VCVTPH2UQQ, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30440, 301},
+    {I_VCVTPH2UQQ, 2, {YMM_L16,RM_XMM_L16|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30448, 301},
+    {I_VCVTPH2UQQ, 2, {ZMM_L16,RM_XMM_L16|BITS128,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30456, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTPH2UW = {
+    {I_VCVTPH2UW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30464, 301},
+    {I_VCVTPH2UW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30472, 301},
+    {I_VCVTPH2UW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30480, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTPH2W = {
+    {I_VCVTPH2W, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30488, 301},
+    {I_VCVTPH2W, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30496, 301},
+    {I_VCVTPH2W, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30504, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTQQ2PH = {
+    {I_VCVTQQ2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+30536, 301},
+    {I_VCVTQQ2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+30544, 301},
+    {I_VCVTQQ2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+30552, 301},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTSD2SH = {
+    {I_VCVTSD2SH, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+30560, 302},
+    {I_VCVTSD2SH, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+30568, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTSH2SD = {
+    {I_VCVTSH2SD, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {0,0,SAE,0,0}, nasm_bytecodes+30576, 302},
+    {I_VCVTSH2SD, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+30584, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTSH2SI = {
+    {I_VCVTSH2SI, 2, {REG_GPR|BITS32,RM_XMM_L16|BITS16,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+30592, 302},
+    {I_VCVTSH2SI, 2, {REG_GPR|BITS64,RM_XMM_L16|BITS16,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+30600, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTSH2SS = {
+    {I_VCVTSH2SS, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+30608, 302},
+    {I_VCVTSH2SS, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+30616, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTSH2USI = {
+    {I_VCVTSH2USI, 2, {REG_GPR|BITS32,RM_XMM_L16|BITS16,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+30624, 302},
+    {I_VCVTSH2USI, 2, {REG_GPR|BITS64,RM_XMM_L16|BITS16,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+30632, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTSI2SH = {
+    {I_VCVTSI2SH, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,0,ER,0,0}, nasm_bytecodes+30640, 302},
+    {I_VCVTSI2SH, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+30648, 302},
+    {I_VCVTSI2SH, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,0,ER,0,0}, nasm_bytecodes+30656, 302},
+    {I_VCVTSI2SH, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+30664, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTSS2SH = {
+    {I_VCVTSS2SH, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {0,0,ER,0,0}, nasm_bytecodes+30672, 302},
+    {I_VCVTSS2SH, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+30680, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTTPH2DQ = {
+    {I_VCVTTPH2DQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30688, 301},
+    {I_VCVTTPH2DQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30696, 301},
+    {I_VCVTTPH2DQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+30704, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTTPH2QQ = {
+    {I_VCVTTPH2QQ, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30712, 301},
+    {I_VCVTTPH2QQ, 2, {YMM_L16,RM_XMM_L16|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30720, 301},
+    {I_VCVTTPH2QQ, 2, {ZMM_L16,RM_XMM_L16|BITS128,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+30728, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTTPH2UDQ = {
+    {I_VCVTTPH2UDQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30736, 301},
+    {I_VCVTTPH2UDQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30744, 301},
+    {I_VCVTTPH2UDQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+30752, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTTPH2UQQ = {
+    {I_VCVTTPH2UQQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30760, 301},
+    {I_VCVTTPH2UQQ, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30768, 301},
+    {I_VCVTTPH2UQQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+30776, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTTPH2UW = {
+    {I_VCVTTPH2UW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30784, 301},
+    {I_VCVTTPH2UW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30792, 301},
+    {I_VCVTTPH2UW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+30800, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTTPH2W = {
+    {I_VCVTTPH2W, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30808, 301},
+    {I_VCVTTPH2W, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30816, 301},
+    {I_VCVTTPH2W, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+30824, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTTSH2SI = {
+    {I_VCVTTSH2SI, 2, {REG_GPR|BITS32,RM_XMM_L16|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+30832, 302},
+    {I_VCVTTSH2SI, 2, {REG_GPR|BITS64,RM_XMM_L16|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+30840, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTTSH2USI = {
+    {I_VCVTTSH2USI, 2, {REG_GPR|BITS32,RM_XMM_L16|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+30848, 302},
+    {I_VCVTTSH2USI, 2, {REG_GPR|BITS64,RM_XMM_L16|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+30856, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTUDQ2PH = {
+    {I_VCVTUDQ2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30864, 301},
+    {I_VCVTUDQ2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30872, 301},
+    {I_VCVTUDQ2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30880, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTUQQ2PH = {
+    {I_VCVTUQQ2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30888, 301},
+    {I_VCVTUQQ2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30896, 301},
+    {I_VCVTUQQ2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30904, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTUSI2SH = {
+    {I_VCVTUSI2SH, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,ER,ER,0,0}, nasm_bytecodes+30912, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTUW2PH = {
+    {I_VCVTUW2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30928, 301},
+    {I_VCVTUW2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30936, 301},
+    {I_VCVTUW2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30944, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VCVTW2PH = {
+    {I_VCVTW2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30952, 301},
+    {I_VCVTW2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30960, 301},
+    {I_VCVTW2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30968, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VDIVPH = {
+    {I_VDIVPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+30976, 301},
+    {I_VDIVPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30984, 301},
+    {I_VDIVPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+30992, 301},
+    {I_VDIVPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31000, 301},
+    {I_VDIVPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31008, 302},
+    {I_VDIVPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31016, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VDIVSH = {
+    {I_VDIVSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31024, 302},
+    {I_VDIVSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31032, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFCMADDCPH = {
+    {I_VFCMADDCPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+31040, 301},
+    {I_VFCMADDCPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31048, 301},
+    {I_VFCMADDCPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+31056, 301},
+    {I_VFCMADDCPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31064, 301},
+    {I_VFCMADDCPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+31072, 301},
+    {I_VFCMADDCPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+31080, 301},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADDCPH = {
+    {I_VFMADDCPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+31088, 301},
+    {I_VFMADDCPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31096, 301},
+    {I_VFMADDCPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+31104, 301},
+    {I_VFMADDCPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31112, 301},
+    {I_VFMADDCPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+31120, 301},
+    {I_VFMADDCPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+31128, 301},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFCMADDCSH = {
+    {I_VFCMADDCSH, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31136, 302},
+    {I_VFCMADDCSH, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31144, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADDCSH = {
+    {I_VFMADDCSH, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31152, 302},
+    {I_VFMADDCSH, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31160, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFCMULCPCH = {
+    {I_VFCMULCPCH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+31168, 301},
+    {I_VFCMULCPCH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31176, 301},
+    {I_VFCMULCPCH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+31184, 301},
+    {I_VFCMULCPCH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31192, 301},
+    {I_VFCMULCPCH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+31200, 301},
+    {I_VFCMULCPCH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+31208, 301},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMULCPCH = {
+    {I_VFMULCPCH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+31216, 301},
+    {I_VFMULCPCH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31224, 301},
+    {I_VFMULCPCH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+31232, 301},
+    {I_VFMULCPCH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31240, 301},
+    {I_VFMULCPCH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+31248, 301},
+    {I_VFMULCPCH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+31256, 301},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFCMULCSH = {
+    {I_VFCMULCSH, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31264, 302},
+    {I_VFCMULCSH, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31272, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMULCSH = {
+    {I_VFMULCSH, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31280, 302},
+    {I_VFMULCSH, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31288, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADDSUB132PH = {
+    {I_VFMADDSUB132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31296, 301},
+    {I_VFMADDSUB132PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31304, 301},
+    {I_VFMADDSUB132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31312, 301},
+    {I_VFMADDSUB132PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31320, 301},
+    {I_VFMADDSUB132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31328, 302},
+    {I_VFMADDSUB132PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31336, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADDSUB213PH = {
+    {I_VFMADDSUB213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31344, 301},
+    {I_VFMADDSUB213PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31352, 301},
+    {I_VFMADDSUB213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31360, 301},
+    {I_VFMADDSUB213PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31368, 301},
+    {I_VFMADDSUB213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31376, 302},
+    {I_VFMADDSUB213PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31384, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADDSUB231PH = {
+    {I_VFMADDSUB231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31392, 301},
+    {I_VFMADDSUB231PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31400, 301},
+    {I_VFMADDSUB231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31408, 301},
+    {I_VFMADDSUB231PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31416, 301},
+    {I_VFMADDSUB231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31424, 302},
+    {I_VFMADDSUB231PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31432, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUBADD132PH = {
+    {I_VFMSUBADD132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31440, 301},
+    {I_VFMSUBADD132PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31448, 301},
+    {I_VFMSUBADD132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31456, 301},
+    {I_VFMSUBADD132PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31464, 301},
+    {I_VFMSUBADD132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31472, 302},
+    {I_VFMSUBADD132PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31480, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUBADD213PH = {
+    {I_VFMSUBADD213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31488, 301},
+    {I_VFMSUBADD213PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31496, 301},
+    {I_VFMSUBADD213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31504, 301},
+    {I_VFMSUBADD213PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31512, 301},
+    {I_VFMSUBADD213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31520, 302},
+    {I_VFMSUBADD213PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31528, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUBADD231PH = {
+    {I_VFMSUBADD231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31536, 301},
+    {I_VFMSUBADD231PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31544, 301},
+    {I_VFMSUBADD231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31552, 301},
+    {I_VFMSUBADD231PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31560, 301},
+    {I_VFMSUBADD231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31568, 302},
+    {I_VFMSUBADD231PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31576, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMADD132PH = {
+    {I_VPMADD132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31584, 301},
+    {I_VPMADD132PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31592, 301},
+    {I_VPMADD132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31600, 301},
+    {I_VPMADD132PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31608, 301},
+    {I_VPMADD132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31616, 302},
+    {I_VPMADD132PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31624, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMADD213PH = {
+    {I_VPMADD213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31632, 301},
+    {I_VPMADD213PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31640, 301},
+    {I_VPMADD213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31648, 301},
+    {I_VPMADD213PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31656, 301},
+    {I_VPMADD213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31664, 302},
+    {I_VPMADD213PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31672, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMADD231PH = {
+    {I_VPMADD231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31680, 301},
+    {I_VPMADD231PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31688, 301},
+    {I_VPMADD231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31696, 301},
+    {I_VPMADD231PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31704, 301},
+    {I_VPMADD231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31712, 302},
+    {I_VPMADD231PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31720, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD132PH = {
+    {I_VFMADD132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31728, 301},
+    {I_VFMADD132PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31736, 301},
+    {I_VFMADD132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31744, 301},
+    {I_VFMADD132PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31752, 301},
+    {I_VFMADD132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31760, 302},
+    {I_VFMADD132PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31768, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD213PH = {
+    {I_VFMADD213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31776, 301},
+    {I_VFMADD213PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31784, 301},
+    {I_VFMADD213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31792, 301},
+    {I_VFMADD213PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31800, 301},
+    {I_VFMADD213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31808, 302},
+    {I_VFMADD213PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31816, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMADD231PH = {
+    {I_VFMADD231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31824, 301},
+    {I_VFMADD231PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31832, 301},
+    {I_VFMADD231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31840, 301},
+    {I_VFMADD231PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31848, 301},
+    {I_VFMADD231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31856, 302},
+    {I_VFMADD231PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31864, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMADD132SH = {
+    {I_VPMADD132SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31872, 302},
+    {I_VPMADD132SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31880, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMADD213SH = {
+    {I_VPMADD213SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31888, 302},
+    {I_VPMADD213SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31896, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMADD231SH = {
+    {I_VPMADD231SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31904, 302},
+    {I_VPMADD231SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31912, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPNMADD132SH = {
+    {I_VPNMADD132SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31920, 302},
+    {I_VPNMADD132SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31928, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPNMADD213SH = {
+    {I_VPNMADD213SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31936, 302},
+    {I_VPNMADD213SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31944, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPNMADD231SH = {
+    {I_VPNMADD231SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31952, 302},
+    {I_VPNMADD231SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31960, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMSUB132PH = {
+    {I_VPMSUB132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31968, 301},
+    {I_VPMSUB132PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31976, 301},
+    {I_VPMSUB132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31984, 301},
+    {I_VPMSUB132PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31992, 301},
+    {I_VPMSUB132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+32000, 302},
+    {I_VPMSUB132PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32008, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMSUB213PH = {
+    {I_VPMSUB213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32016, 301},
+    {I_VPMSUB213PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32024, 301},
+    {I_VPMSUB213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32032, 301},
+    {I_VPMSUB213PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32040, 301},
+    {I_VPMSUB213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+32048, 302},
+    {I_VPMSUB213PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32056, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMSUB231PH = {
+    {I_VPMSUB231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32064, 301},
+    {I_VPMSUB231PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32072, 301},
+    {I_VPMSUB231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32080, 301},
+    {I_VPMSUB231PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32088, 301},
+    {I_VPMSUB231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+32096, 302},
+    {I_VPMSUB231PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32104, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB132PH = {
+    {I_VFMSUB132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32112, 301},
+    {I_VFMSUB132PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32120, 301},
+    {I_VFMSUB132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32128, 301},
+    {I_VFMSUB132PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32136, 301},
+    {I_VFMSUB132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+32144, 302},
+    {I_VFMSUB132PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32152, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB213PH = {
+    {I_VFMSUB213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32160, 301},
+    {I_VFMSUB213PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32168, 301},
+    {I_VFMSUB213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32176, 301},
+    {I_VFMSUB213PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32184, 301},
+    {I_VFMSUB213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+32192, 302},
+    {I_VFMSUB213PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32200, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFMSUB231PH = {
+    {I_VFMSUB231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32208, 301},
+    {I_VFMSUB231PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32216, 301},
+    {I_VFMSUB231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32224, 301},
+    {I_VFMSUB231PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32232, 301},
+    {I_VFMSUB231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+32240, 302},
+    {I_VFMSUB231PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32248, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMSUB132SH = {
+    {I_VPMSUB132SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32256, 302},
+    {I_VPMSUB132SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32264, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMSUB213SH = {
+    {I_VPMSUB213SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32272, 302},
+    {I_VPMSUB213SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32280, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMSUB231SH = {
+    {I_VPMSUB231SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32288, 302},
+    {I_VPMSUB231SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32296, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPNMSUB132SH = {
+    {I_VPNMSUB132SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32304, 302},
+    {I_VPNMSUB132SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32312, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPNMSUB213SH = {
+    {I_VPNMSUB213SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32320, 302},
+    {I_VPNMSUB213SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32328, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPNMSUB231SH = {
+    {I_VPNMSUB231SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32336, 302},
+    {I_VPNMSUB231SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32344, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFPCLASSPH = {
+    {I_VFPCLASSPH, 3, {KREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+12097, 301},
+    {I_VFPCLASSPH, 3, {KREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+12106, 301},
+    {I_VFPCLASSPH, 3, {KREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+12115, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VFPCLASSSH = {
+    {I_VFPCLASSSH, 3, {KREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+12124, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGETEXPPH = {
+    {I_VGETEXPPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32352, 301},
+    {I_VGETEXPPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32360, 301},
+    {I_VGETEXPPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+32368, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGETEXPSH = {
+    {I_VGETEXPSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+32376, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGETMANTPH = {
+    {I_VGETMANTPH, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+12133, 301},
+    {I_VGETMANTPH, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+12142, 301},
+    {I_VGETMANTPH, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+12151, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGETMANTSH = {
+    {I_VGETMANTSH, 3, {XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+12160, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGETMAXPH = {
+    {I_VGETMAXPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32384, 301},
+    {I_VGETMAXPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32392, 301},
+    {I_VGETMAXPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+32400, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGETMAXSH = {
+    {I_VGETMAXSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+32408, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGETMINPH = {
+    {I_VGETMINPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32416, 301},
+    {I_VGETMINPH, 2, {YMMREG,RM_XMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32424, 301},
+    {I_VGETMINPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+32432, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGETMINSH = {
+    {I_VGETMINSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+32440, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVSH = {
+    {I_VMOVSH, 2, {XMMREG,MEMORY|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32448, 302},
+    {I_VMOVSH, 2, {MEMORY|BITS16,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+32456, 302},
+    {I_VMOVSH, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32464, 302},
+    {I_VMOVSH, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32472, 302},
+    {I_VMOVSH, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32480, 302},
+    {I_VMOVSH, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32488, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMOVW = {
+    {I_VMOVW, 2, {XMMREG,RM_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32496, 302},
+    {I_VMOVW, 2, {RM_GPR|BITS16,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+32504, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMULPH = {
+    {I_VMULPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32512, 301},
+    {I_VMULPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32520, 301},
+    {I_VMULPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32528, 301},
+    {I_VMULPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32536, 301},
+    {I_VMULPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32544, 302},
+    {I_VMULPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32552, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMULSH = {
+    {I_VMULSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32560, 302},
+    {I_VMULSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32568, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRCPPH = {
+    {I_VRCPPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32576, 301},
+    {I_VRCPPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32584, 301},
+    {I_VRCPPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32592, 301},
+    {I_VRCPPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32600, 301},
+    {I_VRCPPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32608, 302},
+    {I_VRCPPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32616, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRCPSH = {
+    {I_VRCPSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+32624, 302},
+    {I_VRCPSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+32632, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VREDUCEPH = {
+    {I_VREDUCEPH, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+12169, 301},
+    {I_VREDUCEPH, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+12178, 301},
+    {I_VREDUCEPH, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+12187, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VREDUCESH = {
+    {I_VREDUCESH, 4, {XMMREG,XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+12196, 302},
+    {I_VREDUCESH, 3, {XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+12205, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VENDSCALEPH = {
+    {I_VENDSCALEPH, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+12214, 301},
+    {I_VENDSCALEPH, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+12223, 301},
+    {I_VENDSCALEPH, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+12232, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VENDSCALESH = {
+    {I_VENDSCALESH, 4, {XMMREG,XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+12241, 302},
+    {I_VENDSCALESH, 3, {XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+12250, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRSQRTPH = {
+    {I_VRSQRTPH, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+12259, 301},
+    {I_VRSQRTPH, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+12268, 301},
+    {I_VRSQRTPH, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+12277, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VRSQRTSH = {
+    {I_VRSQRTSH, 4, {XMMREG,XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+12286, 302},
+    {I_VRSQRTSH, 3, {XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+12295, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSCALEFPH = {
+    {I_VSCALEFPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32640, 301},
+    {I_VSCALEFPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32648, 301},
+    {I_VSCALEFPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32656, 301},
+    {I_VSCALEFPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32664, 301},
+    {I_VSCALEFPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+32672, 302},
+    {I_VSCALEFPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32680, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSCALEFSH = {
+    {I_VSCALEFSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32688, 302},
+    {I_VSCALEFSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32696, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSQRTPH = {
+    {I_VSQRTPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32704, 301},
+    {I_VSQRTPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32712, 301},
+    {I_VSQRTPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32720, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSQRTSH = {
+    {I_VSQRTSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32728, 302},
+    {I_VSQRTSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32736, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSUBPH = {
+    {I_VSUBPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32744, 301},
+    {I_VSUBPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32752, 301},
+    {I_VSUBPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32760, 301},
+    {I_VSUBPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32768, 301},
+    {I_VSUBPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+32776, 302},
+    {I_VSUBPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32784, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VSUBSH = {
+    {I_VSUBSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32792, 302},
+    {I_VSUBSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32800, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VUCOMISH = {
+    {I_VUCOMISH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+32808, 302},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_AADD = {
+    {I_AADD, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+32816, 305},
+    {I_AADD, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+32824, 306},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_AAND = {
+    {I_AAND, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+32832, 305},
+    {I_AAND, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+32840, 306},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_AXOR = {
+    {I_AXOR, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+32848, 305},
+    {I_AXOR, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+32856, 306},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CLUI = {
+    {I_CLUI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46175, 307},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SENDUIPI = {
+    {I_SENDUIPI, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42588, 307},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_STUI = {
+    {I_STUI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46181, 307},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_TESTUI = {
+    {I_TESTUI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46187, 307},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_UIRET = {
+    {I_UIRET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46193, 307},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPAXADD = {
+    {I_CMPAXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42595, 308},
+    {I_CMPAXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42707, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPAEXADD = {
+    {I_CMPAEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42602, 308},
+    {I_CMPAEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42714, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPBXADD = {
+    {I_CMPBXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42609, 308},
+    {I_CMPBXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42721, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPBEXADD = {
+    {I_CMPBEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42616, 308},
+    {I_CMPBEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42728, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPCXADD = {
+    {I_CMPCXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42609, 308},
+    {I_CMPCXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42721, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPEXADD = {
+    {I_CMPEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42623, 308},
+    {I_CMPEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42735, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPGXADD = {
+    {I_CMPGXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42630, 308},
+    {I_CMPGXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42742, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPGEXADD = {
+    {I_CMPGEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42637, 308},
+    {I_CMPGEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42749, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPLXADD = {
+    {I_CMPLXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42644, 308},
+    {I_CMPLXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42756, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPLEXADD = {
+    {I_CMPLEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42651, 308},
+    {I_CMPLEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42763, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNAXADD = {
+    {I_CMPNAXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42616, 308},
+    {I_CMPNAXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42728, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNAEXADD = {
+    {I_CMPNAEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42609, 308},
+    {I_CMPNAEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42721, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNBXADD = {
+    {I_CMPNBXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42602, 308},
+    {I_CMPNBXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42714, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNBEXADD = {
+    {I_CMPNBEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42595, 308},
+    {I_CMPNBEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42707, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNCXADD = {
+    {I_CMPNCXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42602, 308},
+    {I_CMPNCXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42714, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNEXADD = {
+    {I_CMPNEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42658, 308},
+    {I_CMPNEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42770, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNGXADD = {
+    {I_CMPNGXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42651, 308},
+    {I_CMPNGXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42763, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNGEXADD = {
+    {I_CMPNGEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42644, 308},
+    {I_CMPNGEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42756, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNLXADD = {
+    {I_CMPNLXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42637, 308},
+    {I_CMPNLXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42749, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNLEXADD = {
+    {I_CMPNLEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42630, 308},
+    {I_CMPNLEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42742, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNOXADD = {
+    {I_CMPNOXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42665, 308},
+    {I_CMPNOXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42777, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNPXADD = {
+    {I_CMPNPXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42672, 308},
+    {I_CMPNPXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42784, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNSXADD = {
+    {I_CMPNSXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42679, 308},
+    {I_CMPNSXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42791, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPNZXADD = {
+    {I_CMPNZXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42658, 308},
+    {I_CMPNZXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42770, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPOXADD = {
+    {I_CMPOXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42686, 308},
+    {I_CMPOXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42798, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPPXADD = {
+    {I_CMPPXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42693, 308},
+    {I_CMPPXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42805, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPPEXADD = {
+    {I_CMPPEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42693, 308},
+    {I_CMPPEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42805, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPPOXADD = {
+    {I_CMPPOXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42672, 308},
+    {I_CMPPOXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42784, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPSXADD = {
+    {I_CMPSXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42700, 308},
+    {I_CMPSXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42812, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CMPZXADD = {
+    {I_CMPZXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42623, 308},
+    {I_CMPZXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42735, 309},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ERETS = {
+    {I_ERETS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46199, 310},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ERETU = {
+    {I_ERETU, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46205, 310},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_LKGS = {
+    {I_LKGS, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42827, 311},
+    {I_LKGS, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42827, 312},
+    {I_LKGS, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42827, 312},
+    {I_LKGS, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42819, 313},
+    {I_LKGS, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42826, 312},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_WRMSRNS = {
+    {I_WRMSRNS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46211, 314},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RDMSRLIST = {
+    {I_RDMSRLIST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46217, 315},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_WRMSRLIST = {
+    {I_WRMSRLIST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46223, 315},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HRESET = {
+    {I_HRESET, 2, {IMMEDIATE,REG_EAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+32864, 316},
+    {I_HRESET, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+32864, 316},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP0 = {
+    {I_HINT_NOP0, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46229, 317},
+    {I_HINT_NOP0, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46235, 317},
+    {I_HINT_NOP0, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46241, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP1 = {
+    {I_HINT_NOP1, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46247, 317},
+    {I_HINT_NOP1, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46253, 317},
+    {I_HINT_NOP1, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46259, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP2 = {
+    {I_HINT_NOP2, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46265, 317},
+    {I_HINT_NOP2, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46271, 317},
+    {I_HINT_NOP2, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46277, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP3 = {
+    {I_HINT_NOP3, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46283, 317},
+    {I_HINT_NOP3, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46289, 317},
+    {I_HINT_NOP3, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46295, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP4 = {
+    {I_HINT_NOP4, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46301, 317},
+    {I_HINT_NOP4, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46307, 317},
+    {I_HINT_NOP4, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46313, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP5 = {
+    {I_HINT_NOP5, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46319, 317},
+    {I_HINT_NOP5, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46325, 317},
+    {I_HINT_NOP5, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46331, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP6 = {
+    {I_HINT_NOP6, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46337, 317},
+    {I_HINT_NOP6, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46343, 317},
+    {I_HINT_NOP6, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46349, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP7 = {
+    {I_HINT_NOP7, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46355, 317},
+    {I_HINT_NOP7, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46361, 317},
+    {I_HINT_NOP7, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46367, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP8 = {
+    {I_HINT_NOP8, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46373, 317},
+    {I_HINT_NOP8, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46379, 317},
+    {I_HINT_NOP8, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46385, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP9 = {
+    {I_HINT_NOP9, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46391, 317},
+    {I_HINT_NOP9, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46397, 317},
+    {I_HINT_NOP9, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46403, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP10 = {
+    {I_HINT_NOP10, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46409, 317},
+    {I_HINT_NOP10, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46415, 317},
+    {I_HINT_NOP10, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46421, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP11 = {
+    {I_HINT_NOP11, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46427, 317},
+    {I_HINT_NOP11, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46433, 317},
+    {I_HINT_NOP11, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46439, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP12 = {
+    {I_HINT_NOP12, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46445, 317},
+    {I_HINT_NOP12, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46451, 317},
+    {I_HINT_NOP12, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46457, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP13 = {
+    {I_HINT_NOP13, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46463, 317},
+    {I_HINT_NOP13, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46469, 317},
+    {I_HINT_NOP13, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46475, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP14 = {
+    {I_HINT_NOP14, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46481, 317},
+    {I_HINT_NOP14, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46487, 317},
+    {I_HINT_NOP14, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46493, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP15 = {
+    {I_HINT_NOP15, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46499, 317},
+    {I_HINT_NOP15, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46505, 317},
+    {I_HINT_NOP15, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46511, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP16 = {
+    {I_HINT_NOP16, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46517, 317},
+    {I_HINT_NOP16, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46523, 317},
+    {I_HINT_NOP16, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46529, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP17 = {
+    {I_HINT_NOP17, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46535, 317},
+    {I_HINT_NOP17, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46541, 317},
+    {I_HINT_NOP17, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46547, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP18 = {
+    {I_HINT_NOP18, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46553, 317},
+    {I_HINT_NOP18, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46559, 317},
+    {I_HINT_NOP18, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46565, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP19 = {
+    {I_HINT_NOP19, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46571, 317},
+    {I_HINT_NOP19, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46577, 317},
+    {I_HINT_NOP19, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46583, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP20 = {
+    {I_HINT_NOP20, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46589, 317},
+    {I_HINT_NOP20, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46595, 317},
+    {I_HINT_NOP20, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46601, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP21 = {
+    {I_HINT_NOP21, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46607, 317},
+    {I_HINT_NOP21, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46613, 317},
+    {I_HINT_NOP21, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46619, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP22 = {
+    {I_HINT_NOP22, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46625, 317},
+    {I_HINT_NOP22, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46631, 317},
+    {I_HINT_NOP22, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46637, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP23 = {
+    {I_HINT_NOP23, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46643, 317},
+    {I_HINT_NOP23, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46649, 317},
+    {I_HINT_NOP23, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46655, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP24 = {
+    {I_HINT_NOP24, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46661, 317},
+    {I_HINT_NOP24, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46667, 317},
+    {I_HINT_NOP24, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46673, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP25 = {
+    {I_HINT_NOP25, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46679, 317},
+    {I_HINT_NOP25, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46685, 317},
+    {I_HINT_NOP25, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46691, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP26 = {
+    {I_HINT_NOP26, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46697, 317},
+    {I_HINT_NOP26, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46703, 317},
+    {I_HINT_NOP26, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46709, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP27 = {
+    {I_HINT_NOP27, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46715, 317},
+    {I_HINT_NOP27, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46721, 317},
+    {I_HINT_NOP27, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46727, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP28 = {
+    {I_HINT_NOP28, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46733, 317},
+    {I_HINT_NOP28, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46739, 317},
+    {I_HINT_NOP28, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46745, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP29 = {
+    {I_HINT_NOP29, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46751, 317},
+    {I_HINT_NOP29, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46757, 317},
+    {I_HINT_NOP29, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46763, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP30 = {
+    {I_HINT_NOP30, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46769, 317},
+    {I_HINT_NOP30, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46775, 317},
+    {I_HINT_NOP30, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46781, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP31 = {
+    {I_HINT_NOP31, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46787, 317},
+    {I_HINT_NOP31, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46793, 317},
+    {I_HINT_NOP31, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46799, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP32 = {
+    {I_HINT_NOP32, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46805, 317},
+    {I_HINT_NOP32, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46811, 317},
+    {I_HINT_NOP32, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46817, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP33 = {
+    {I_HINT_NOP33, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46823, 317},
+    {I_HINT_NOP33, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46829, 317},
+    {I_HINT_NOP33, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46835, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP34 = {
+    {I_HINT_NOP34, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46841, 317},
+    {I_HINT_NOP34, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46847, 317},
+    {I_HINT_NOP34, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46853, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP35 = {
+    {I_HINT_NOP35, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46859, 317},
+    {I_HINT_NOP35, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46865, 317},
+    {I_HINT_NOP35, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46871, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP36 = {
+    {I_HINT_NOP36, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46877, 317},
+    {I_HINT_NOP36, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46883, 317},
+    {I_HINT_NOP36, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46889, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP37 = {
+    {I_HINT_NOP37, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46895, 317},
+    {I_HINT_NOP37, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46901, 317},
+    {I_HINT_NOP37, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46907, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP38 = {
+    {I_HINT_NOP38, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46913, 317},
+    {I_HINT_NOP38, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46919, 317},
+    {I_HINT_NOP38, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46925, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP39 = {
+    {I_HINT_NOP39, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46931, 317},
+    {I_HINT_NOP39, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46937, 317},
+    {I_HINT_NOP39, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46943, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP40 = {
+    {I_HINT_NOP40, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46949, 317},
+    {I_HINT_NOP40, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46955, 317},
+    {I_HINT_NOP40, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46961, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP41 = {
+    {I_HINT_NOP41, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46967, 317},
+    {I_HINT_NOP41, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46973, 317},
+    {I_HINT_NOP41, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46979, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP42 = {
+    {I_HINT_NOP42, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46985, 317},
+    {I_HINT_NOP42, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46991, 317},
+    {I_HINT_NOP42, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46997, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP43 = {
+    {I_HINT_NOP43, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47003, 317},
+    {I_HINT_NOP43, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47009, 317},
+    {I_HINT_NOP43, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47015, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP44 = {
+    {I_HINT_NOP44, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47021, 317},
+    {I_HINT_NOP44, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47027, 317},
+    {I_HINT_NOP44, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47033, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP45 = {
+    {I_HINT_NOP45, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47039, 317},
+    {I_HINT_NOP45, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47045, 317},
+    {I_HINT_NOP45, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47051, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP46 = {
+    {I_HINT_NOP46, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47057, 317},
+    {I_HINT_NOP46, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47063, 317},
+    {I_HINT_NOP46, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47069, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP47 = {
+    {I_HINT_NOP47, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47075, 317},
+    {I_HINT_NOP47, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47081, 317},
+    {I_HINT_NOP47, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47087, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP48 = {
+    {I_HINT_NOP48, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47093, 317},
+    {I_HINT_NOP48, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47099, 317},
+    {I_HINT_NOP48, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47105, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP49 = {
+    {I_HINT_NOP49, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47111, 317},
+    {I_HINT_NOP49, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47117, 317},
+    {I_HINT_NOP49, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47123, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP50 = {
+    {I_HINT_NOP50, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47129, 317},
+    {I_HINT_NOP50, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47135, 317},
+    {I_HINT_NOP50, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47141, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP51 = {
+    {I_HINT_NOP51, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47147, 317},
+    {I_HINT_NOP51, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47153, 317},
+    {I_HINT_NOP51, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47159, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP52 = {
+    {I_HINT_NOP52, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47165, 317},
+    {I_HINT_NOP52, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47171, 317},
+    {I_HINT_NOP52, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47177, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP53 = {
+    {I_HINT_NOP53, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47183, 317},
+    {I_HINT_NOP53, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47189, 317},
+    {I_HINT_NOP53, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47195, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP54 = {
+    {I_HINT_NOP54, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47201, 317},
+    {I_HINT_NOP54, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47207, 317},
+    {I_HINT_NOP54, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47213, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP55 = {
+    {I_HINT_NOP55, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47219, 317},
+    {I_HINT_NOP55, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47225, 317},
+    {I_HINT_NOP55, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47231, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP56 = {
+    {I_HINT_NOP56, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43529, 317},
+    {I_HINT_NOP56, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43535, 317},
+    {I_HINT_NOP56, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43541, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP57 = {
+    {I_HINT_NOP57, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47237, 317},
+    {I_HINT_NOP57, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47243, 317},
+    {I_HINT_NOP57, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47249, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP58 = {
+    {I_HINT_NOP58, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47255, 317},
+    {I_HINT_NOP58, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47261, 317},
+    {I_HINT_NOP58, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47267, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP59 = {
+    {I_HINT_NOP59, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47273, 317},
+    {I_HINT_NOP59, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47279, 317},
+    {I_HINT_NOP59, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47285, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP60 = {
+    {I_HINT_NOP60, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47291, 317},
+    {I_HINT_NOP60, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47297, 317},
+    {I_HINT_NOP60, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47303, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP61 = {
+    {I_HINT_NOP61, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47309, 317},
+    {I_HINT_NOP61, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47315, 317},
+    {I_HINT_NOP61, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47321, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP62 = {
+    {I_HINT_NOP62, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47327, 317},
+    {I_HINT_NOP62, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47333, 317},
+    {I_HINT_NOP62, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47339, 318},
+    ITEMPLATE_END
+};
+
+static const struct itemplate instrux_HINT_NOP63 = {
+    {I_HINT_NOP63, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47345, 317},
+    {I_HINT_NOP63, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47351, 317},
+    {I_HINT_NOP63, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47357, 318},
+    ITEMPLATE_END
+};
+
+const struct itemplate * const nasm_instructions = {
+    instrux_DB,
+    instrux_DW,
+    instrux_DD,
+    instrux_DQ,
+    instrux_DT,
+    instrux_DO,
+    instrux_DY,
+    instrux_DZ,
+    instrux_RESB,
+    instrux_RESW,
+    instrux_RESD,
+    instrux_RESQ,
+    instrux_REST,
+    instrux_RESO,
+    instrux_RESY,
+    instrux_RESZ,
+    instrux_INCBIN,
+    instrux_AAA,
+    instrux_AAD,
+    instrux_AAM,
+    instrux_AAS,
+    instrux_ADC,
+    instrux_ADD,
+    instrux_AND,
+    instrux_ARPL,
+    instrux_BB0_RESET,
+    instrux_BB1_RESET,
+    instrux_BOUND,
+    instrux_BSF,
+    instrux_BSR,
+    instrux_BSWAP,
+    instrux_BT,
+    instrux_BTC,
+    instrux_BTR,
+    instrux_BTS,
+    instrux_CALL,
+    instrux_CBW,
+    instrux_CDQ,
+    instrux_CDQE,
+    instrux_CLC,
+    instrux_CLD,
+    instrux_CLI,
+    instrux_CLTS,
+    instrux_CMC,
+    instrux_CMP,
+    instrux_CMPSB,
+    instrux_CMPSD,
+    instrux_CMPSQ,
+    instrux_CMPSW,
+    instrux_CMPXCHG,
+    instrux_CMPXCHG486,
+    instrux_CMPXCHG8B,
+    instrux_CMPXCHG16B,
+    instrux_CPUID,
+    instrux_CPU_READ,
+    instrux_CPU_WRITE,
+    instrux_CQO,
+    instrux_CWD,
+    instrux_CWDE,
+    instrux_DAA,
+    instrux_DAS,
+    instrux_DEC,
+    instrux_DIV,
+    instrux_DMINT,
+    instrux_EMMS,
+    instrux_ENTER,
+    instrux_EQU,
+    instrux_F2XM1,
+    instrux_FABS,
+    instrux_FADD,
+    instrux_FADDP,
+    instrux_FBLD,
+    instrux_FBSTP,
+    instrux_FCHS,
+    instrux_FCLEX,
+    instrux_FCMOVB,
+    instrux_FCMOVBE,
+    instrux_FCMOVE,
+    instrux_FCMOVNB,
+    instrux_FCMOVNBE,
+    instrux_FCMOVNE,
+    instrux_FCMOVNU,
+    instrux_FCMOVU,
+    instrux_FCOM,
+    instrux_FCOMI,
+    instrux_FCOMIP,
+    instrux_FCOMP,
+    instrux_FCOMPP,
+    instrux_FCOS,
+    instrux_FDECSTP,
+    instrux_FDISI,
+    instrux_FDIV,
+    instrux_FDIVP,
+    instrux_FDIVR,
+    instrux_FDIVRP,
+    instrux_FEMMS,
+    instrux_FENI,
+    instrux_FFREE,
+    instrux_FFREEP,
+    instrux_FIADD,
+    instrux_FICOM,
+    instrux_FICOMP,
+    instrux_FIDIV,
+    instrux_FIDIVR,
+    instrux_FILD,
+    instrux_FIMUL,
+    instrux_FINCSTP,
+    instrux_FINIT,
+    instrux_FIST,
+    instrux_FISTP,
+    instrux_FISTTP,
+    instrux_FISUB,
+    instrux_FISUBR,
+    instrux_FLD,
+    instrux_FLD1,
+    instrux_FLDCW,
+    instrux_FLDENV,
+    instrux_FLDL2E,
+    instrux_FLDL2T,
+    instrux_FLDLG2,
+    instrux_FLDLN2,
+    instrux_FLDPI,
+    instrux_FLDZ,
+    instrux_FMUL,
+    instrux_FMULP,
+    instrux_FNCLEX,
+    instrux_FNDISI,
+    instrux_FNENI,
+    instrux_FNINIT,
+    instrux_FNOP,
+    instrux_FNSAVE,
+    instrux_FNSTCW,
+    instrux_FNSTENV,
+    instrux_FNSTSW,
+    instrux_FPATAN,
+    instrux_FPREM,
+    instrux_FPREM1,
+    instrux_FPTAN,
+    instrux_FRNDINT,
+    instrux_FRSTOR,
+    instrux_FSAVE,
+    instrux_FSCALE,
+    instrux_FSETPM,
+    instrux_FSIN,
+    instrux_FSINCOS,
+    instrux_FSQRT,
+    instrux_FST,
+    instrux_FSTCW,
+    instrux_FSTENV,
+    instrux_FSTP,
+    instrux_FSTSW,
+    instrux_FSUB,
+    instrux_FSUBP,
+    instrux_FSUBR,
+    instrux_FSUBRP,
+    instrux_FTST,
+    instrux_FUCOM,
+    instrux_FUCOMI,
+    instrux_FUCOMIP,
+    instrux_FUCOMP,
+    instrux_FUCOMPP,
+    instrux_FXAM,
+    instrux_FXCH,
+    instrux_FXTRACT,
+    instrux_FYL2X,
+    instrux_FYL2XP1,
+    instrux_HLT,
+    instrux_IBTS,
+    instrux_ICEBP,
+    instrux_IDIV,
+    instrux_IMUL,
+    instrux_IN,
+    instrux_INC,
+    instrux_INSB,
+    instrux_INSD,
+    instrux_INSW,
+    instrux_INT,
+    instrux_INT01,
+    instrux_INT1,
+    instrux_INT03,
+    instrux_INT3,
+    instrux_INTO,
+    instrux_INVD,
+    instrux_INVPCID,
+    instrux_INVLPG,
+    instrux_INVLPGA,
+    instrux_IRET,
+    instrux_IRETD,
+    instrux_IRETQ,
+    instrux_IRETW,
+    instrux_JCXZ,
+    instrux_JECXZ,
+    instrux_JRCXZ,
+    instrux_JMP,
+    instrux_JMPE,
+    instrux_LAHF,
+    instrux_LAR,
+    instrux_LDS,
+    instrux_LEA,
+    instrux_LEAVE,
+    instrux_LES,
+    instrux_LFENCE,
+    instrux_LFS,
+    instrux_LGDT,
+    instrux_LGS,
+    instrux_LIDT,
+    instrux_LLDT,
+    instrux_LMSW,
+    instrux_LOADALL,
+    instrux_LOADALL286,
+    instrux_LODSB,
+    instrux_LODSD,
+    instrux_LODSQ,
+    instrux_LODSW,
+    instrux_LOOP,
+    instrux_LOOPE,
+    instrux_LOOPNE,
+    instrux_LOOPNZ,
+    instrux_LOOPZ,
+    instrux_LSL,
+    instrux_LSS,
+    instrux_LTR,
+    instrux_MFENCE,
+    instrux_MONITOR,
+    instrux_MONITORX,
+    instrux_MOV,
+    instrux_MOVD,
+    instrux_MOVQ,
+    instrux_MOVSB,
+    instrux_MOVSD,
+    instrux_MOVSQ,
+    instrux_MOVSW,
+    instrux_MOVSX,
+    instrux_MOVSXD,
+    instrux_MOVZX,
+    instrux_MUL,
+    instrux_MWAIT,
+    instrux_MWAITX,
+    instrux_NEG,
+    instrux_NOP,
+    instrux_NOT,
+    instrux_OR,
+    instrux_OUT,
+    instrux_OUTSB,
+    instrux_OUTSD,
+    instrux_OUTSW,
+    instrux_PACKSSDW,
+    instrux_PACKSSWB,
+    instrux_PACKUSWB,
+    instrux_PADDB,
+    instrux_PADDD,
+    instrux_PADDSB,
+    instrux_PADDSIW,
+    instrux_PADDSW,
+    instrux_PADDUSB,
+    instrux_PADDUSW,
+    instrux_PADDW,
+    instrux_PAND,
+    instrux_PANDN,
+    instrux_PAUSE,
+    instrux_PAVEB,
+    instrux_PAVGUSB,
+    instrux_PCMPEQB,
+    instrux_PCMPEQD,
+    instrux_PCMPEQW,
+    instrux_PCMPGTB,
+    instrux_PCMPGTD,
+    instrux_PCMPGTW,
+    instrux_PDISTIB,
+    instrux_PF2ID,
+    instrux_PFACC,
+    instrux_PFADD,
+    instrux_PFCMPEQ,
+    instrux_PFCMPGE,
+    instrux_PFCMPGT,
+    instrux_PFMAX,
+    instrux_PFMIN,
+    instrux_PFMUL,
+    instrux_PFRCP,
+    instrux_PFRCPIT1,
+    instrux_PFRCPIT2,
+    instrux_PFRSQIT1,
+    instrux_PFRSQRT,
+    instrux_PFSUB,
+    instrux_PFSUBR,
+    instrux_PI2FD,
+    instrux_PMACHRIW,
+    instrux_PMADDWD,
+    instrux_PMAGW,
+    instrux_PMULHRIW,
+    instrux_PMULHRWA,
+    instrux_PMULHRWC,
+    instrux_PMULHW,
+    instrux_PMULLW,
+    instrux_PMVGEZB,
+    instrux_PMVLZB,
+    instrux_PMVNZB,
+    instrux_PMVZB,
+    instrux_POP,
+    instrux_POPA,
+    instrux_POPAD,
+    instrux_POPAW,
+    instrux_POPF,
+    instrux_POPFD,
+    instrux_POPFQ,
+    instrux_POPFW,
+    instrux_POR,
+    instrux_PREFETCH,
+    instrux_PREFETCHW,
+    instrux_PSLLD,
+    instrux_PSLLQ,
+    instrux_PSLLW,
+    instrux_PSRAD,
+    instrux_PSRAW,
+    instrux_PSRLD,
+    instrux_PSRLQ,
+    instrux_PSRLW,
+    instrux_PSUBB,
+    instrux_PSUBD,
+    instrux_PSUBSB,
+    instrux_PSUBSIW,
+    instrux_PSUBSW,
+    instrux_PSUBUSB,
+    instrux_PSUBUSW,
+    instrux_PSUBW,
+    instrux_PUNPCKHBW,
+    instrux_PUNPCKHDQ,
+    instrux_PUNPCKHWD,
+    instrux_PUNPCKLBW,
+    instrux_PUNPCKLDQ,
+    instrux_PUNPCKLWD,
+    instrux_PUSH,
+    instrux_PUSHA,
+    instrux_PUSHAD,
+    instrux_PUSHAW,
+    instrux_PUSHF,
+    instrux_PUSHFD,
+    instrux_PUSHFQ,
+    instrux_PUSHFW,
+    instrux_PXOR,
+    instrux_RCL,
+    instrux_RCR,
+    instrux_RDSHR,
+    instrux_RDMSR,
+    instrux_RDPMC,
+    instrux_RDTSC,
+    instrux_RDTSCP,
+    instrux_RET,
+    instrux_RETF,
+    instrux_RETN,
+    instrux_RETW,
+    instrux_RETFW,
+    instrux_RETNW,
+    instrux_RETD,
+    instrux_RETFD,
+    instrux_RETND,
+    instrux_RETQ,
+    instrux_RETFQ,
+    instrux_RETNQ,
+    instrux_ROL,
+    instrux_ROR,
+    instrux_RDM,
+    instrux_RSDC,
+    instrux_RSLDT,
+    instrux_RSM,
+    instrux_RSTS,
+    instrux_SAHF,
+    instrux_SAL,
+    instrux_SALC,
+    instrux_SAR,
+    instrux_SBB,
+    instrux_SCASB,
+    instrux_SCASD,
+    instrux_SCASQ,
+    instrux_SCASW,
+    instrux_SFENCE,
+    instrux_SGDT,
+    instrux_SHL,
+    instrux_SHLD,
+    instrux_SHR,
+    instrux_SHRD,
+    instrux_SIDT,
+    instrux_SLDT,
+    instrux_SKINIT,
+    instrux_SMI,
+    instrux_SMINT,
+    instrux_SMINTOLD,
+    instrux_SMSW,
+    instrux_STC,
+    instrux_STD,
+    instrux_STI,
+    instrux_STOSB,
+    instrux_STOSD,
+    instrux_STOSQ,
+    instrux_STOSW,
+    instrux_STR,
+    instrux_SUB,
+    instrux_SVDC,
+    instrux_SVLDT,
+    instrux_SVTS,
+    instrux_SWAPGS,
+    instrux_SYSCALL,
+    instrux_SYSENTER,
+    instrux_SYSEXIT,
+    instrux_SYSRET,
+    instrux_TEST,
+    instrux_UD0,
+    instrux_UD1,
+    instrux_UD2B,
+    instrux_UD2,
+    instrux_UD2A,
+    instrux_UMOV,
+    instrux_VERR,
+    instrux_VERW,
+    instrux_FWAIT,
+    instrux_WBINVD,
+    instrux_WRSHR,
+    instrux_WRMSR,
+    instrux_XADD,
+    instrux_XBTS,
+    instrux_XCHG,
+    instrux_XLATB,
+    instrux_XLAT,
+    instrux_XOR,
+    instrux_CMOVA,
+    instrux_CMOVAE,
+    instrux_CMOVB,
+    instrux_CMOVBE,
+    instrux_CMOVC,
+    instrux_CMOVE,
+    instrux_CMOVG,
+    instrux_CMOVGE,
+    instrux_CMOVL,
+    instrux_CMOVLE,
+    instrux_CMOVNA,
+    instrux_CMOVNAE,
+    instrux_CMOVNB,
+    instrux_CMOVNBE,
+    instrux_CMOVNC,
+    instrux_CMOVNE,
+    instrux_CMOVNG,
+    instrux_CMOVNGE,
+    instrux_CMOVNL,
+    instrux_CMOVNLE,
+    instrux_CMOVNO,
+    instrux_CMOVNP,
+    instrux_CMOVNS,
+    instrux_CMOVNZ,
+    instrux_CMOVO,
+    instrux_CMOVP,
+    instrux_CMOVPE,
+    instrux_CMOVPO,
+    instrux_CMOVS,
+    instrux_CMOVZ,
+    instrux_JA,
+    instrux_JAE,
+    instrux_JB,
+    instrux_JBE,
+    instrux_JC,
+    instrux_JE,
+    instrux_JG,
+    instrux_JGE,
+    instrux_JL,
+    instrux_JLE,
+    instrux_JNA,
+    instrux_JNAE,
+    instrux_JNB,
+    instrux_JNBE,
+    instrux_JNC,
+    instrux_JNE,
+    instrux_JNG,
+    instrux_JNGE,
+    instrux_JNL,
+    instrux_JNLE,
+    instrux_JNO,
+    instrux_JNP,
+    instrux_JNS,
+    instrux_JNZ,
+    instrux_JO,
+    instrux_JP,
+    instrux_JPE,
+    instrux_JPO,
+    instrux_JS,
+    instrux_JZ,
+    instrux_SETA,
+    instrux_SETAE,
+    instrux_SETB,
+    instrux_SETBE,
+    instrux_SETC,
+    instrux_SETE,
+    instrux_SETG,
+    instrux_SETGE,
+    instrux_SETL,
+    instrux_SETLE,
+    instrux_SETNA,
+    instrux_SETNAE,
+    instrux_SETNB,
+    instrux_SETNBE,
+    instrux_SETNC,
+    instrux_SETNE,
+    instrux_SETNG,
+    instrux_SETNGE,
+    instrux_SETNL,
+    instrux_SETNLE,
+    instrux_SETNO,
+    instrux_SETNP,
+    instrux_SETNS,
+    instrux_SETNZ,
+    instrux_SETO,
+    instrux_SETP,
+    instrux_SETPE,
+    instrux_SETPO,
+    instrux_SETS,
+    instrux_SETZ,
+    instrux_ADDPS,
+    instrux_ADDSS,
+    instrux_ANDNPS,
+    instrux_ANDPS,
+    instrux_CMPEQPS,
+    instrux_CMPEQSS,
+    instrux_CMPLEPS,
+    instrux_CMPLESS,
+    instrux_CMPLTPS,
+    instrux_CMPLTSS,
+    instrux_CMPNEQPS,
+    instrux_CMPNEQSS,
+    instrux_CMPNLEPS,
+    instrux_CMPNLESS,
+    instrux_CMPNLTPS,
+    instrux_CMPNLTSS,
+    instrux_CMPORDPS,
+    instrux_CMPORDSS,
+    instrux_CMPUNORDPS,
+    instrux_CMPUNORDSS,
+    instrux_CMPPS,
+    instrux_CMPSS,
+    instrux_COMISS,
+    instrux_CVTPI2PS,
+    instrux_CVTPS2PI,
+    instrux_CVTSI2SS,
+    instrux_CVTSS2SI,
+    instrux_CVTTPS2PI,
+    instrux_CVTTSS2SI,
+    instrux_DIVPS,
+    instrux_DIVSS,
+    instrux_LDMXCSR,
+    instrux_MAXPS,
+    instrux_MAXSS,
+    instrux_MINPS,
+    instrux_MINSS,
+    instrux_MOVAPS,
+    instrux_MOVHPS,
+    instrux_MOVLHPS,
+    instrux_MOVLPS,
+    instrux_MOVHLPS,
+    instrux_MOVMSKPS,
+    instrux_MOVNTPS,
+    instrux_MOVSS,
+    instrux_MOVUPS,
+    instrux_MULPS,
+    instrux_MULSS,
+    instrux_ORPS,
+    instrux_RCPPS,
+    instrux_RCPSS,
+    instrux_RSQRTPS,
+    instrux_RSQRTSS,
+    instrux_SHUFPS,
+    instrux_SQRTPS,
+    instrux_SQRTSS,
+    instrux_STMXCSR,
+    instrux_SUBPS,
+    instrux_SUBSS,
+    instrux_UCOMISS,
+    instrux_UNPCKHPS,
+    instrux_UNPCKLPS,
+    instrux_XORPS,
+    instrux_FXRSTOR,
+    instrux_FXRSTOR64,
+    instrux_FXSAVE,
+    instrux_FXSAVE64,
+    instrux_XGETBV,
+    instrux_XSETBV,
+    instrux_XSAVE,
+    instrux_XSAVE64,
+    instrux_XSAVEC,
+    instrux_XSAVEC64,
+    instrux_XSAVEOPT,
+    instrux_XSAVEOPT64,
+    instrux_XSAVES,
+    instrux_XSAVES64,
+    instrux_XRSTOR,
+    instrux_XRSTOR64,
+    instrux_XRSTORS,
+    instrux_XRSTORS64,
+    instrux_PREFETCHNTA,
+    instrux_PREFETCHT0,
+    instrux_PREFETCHT1,
+    instrux_PREFETCHT2,
+    instrux_PREFETCHIT0,
+    instrux_PREFETCHIT1,
+    instrux_MASKMOVQ,
+    instrux_MOVNTQ,
+    instrux_PAVGB,
+    instrux_PAVGW,
+    instrux_PEXTRW,
+    instrux_PINSRW,
+    instrux_PMAXSW,
+    instrux_PMAXUB,
+    instrux_PMINSW,
+    instrux_PMINUB,
+    instrux_PMOVMSKB,
+    instrux_PMULHUW,
+    instrux_PSADBW,
+    instrux_PSHUFW,
+    instrux_PF2IW,
+    instrux_PFNACC,
+    instrux_PFPNACC,
+    instrux_PI2FW,
+    instrux_PSWAPD,
+    instrux_MASKMOVDQU,
+    instrux_CLFLUSH,
+    instrux_MOVNTDQ,
+    instrux_MOVNTI,
+    instrux_MOVNTPD,
+    instrux_MOVDQA,
+    instrux_MOVDQU,
+    instrux_MOVDQ2Q,
+    instrux_MOVQ2DQ,
+    instrux_PADDQ,
+    instrux_PMULUDQ,
+    instrux_PSHUFD,
+    instrux_PSHUFHW,
+    instrux_PSHUFLW,
+    instrux_PSLLDQ,
+    instrux_PSRLDQ,
+    instrux_PSUBQ,
+    instrux_PUNPCKHQDQ,
+    instrux_PUNPCKLQDQ,
+    instrux_ADDPD,
+    instrux_ADDSD,
+    instrux_ANDNPD,
+    instrux_ANDPD,
+    instrux_CMPEQPD,
+    instrux_CMPEQSD,
+    instrux_CMPLEPD,
+    instrux_CMPLESD,
+    instrux_CMPLTPD,
+    instrux_CMPLTSD,
+    instrux_CMPNEQPD,
+    instrux_CMPNEQSD,
+    instrux_CMPNLEPD,
+    instrux_CMPNLESD,
+    instrux_CMPNLTPD,
+    instrux_CMPNLTSD,
+    instrux_CMPORDPD,
+    instrux_CMPORDSD,
+    instrux_CMPUNORDPD,
+    instrux_CMPUNORDSD,
+    instrux_CMPPD,
+    instrux_COMISD,
+    instrux_CVTDQ2PD,
+    instrux_CVTDQ2PS,
+    instrux_CVTPD2DQ,
+    instrux_CVTPD2PI,
+    instrux_CVTPD2PS,
+    instrux_CVTPI2PD,
+    instrux_CVTPS2DQ,
+    instrux_CVTPS2PD,
+    instrux_CVTSD2SI,
+    instrux_CVTSD2SS,
+    instrux_CVTSI2SD,
+    instrux_CVTSS2SD,
+    instrux_CVTTPD2PI,
+    instrux_CVTTPD2DQ,
+    instrux_CVTTPS2DQ,
+    instrux_CVTTSD2SI,
+    instrux_DIVPD,
+    instrux_DIVSD,
+    instrux_MAXPD,
+    instrux_MAXSD,
+    instrux_MINPD,
+    instrux_MINSD,
+    instrux_MOVAPD,
+    instrux_MOVHPD,
+    instrux_MOVLPD,
+    instrux_MOVMSKPD,
+    instrux_MOVUPD,
+    instrux_MULPD,
+    instrux_MULSD,
+    instrux_ORPD,
+    instrux_SHUFPD,
+    instrux_SQRTPD,
+    instrux_SQRTSD,
+    instrux_SUBPD,
+    instrux_SUBSD,
+    instrux_UCOMISD,
+    instrux_UNPCKHPD,
+    instrux_UNPCKLPD,
+    instrux_XORPD,
+    instrux_ADDSUBPD,
+    instrux_ADDSUBPS,
+    instrux_HADDPD,
+    instrux_HADDPS,
+    instrux_HSUBPD,
+    instrux_HSUBPS,
+    instrux_LDDQU,
+    instrux_MOVDDUP,
+    instrux_MOVSHDUP,
+    instrux_MOVSLDUP,
+    instrux_CLGI,
+    instrux_STGI,
+    instrux_VMCALL,
+    instrux_VMCLEAR,
+    instrux_VMFUNC,
+    instrux_VMLAUNCH,
+    instrux_VMLOAD,
+    instrux_VMMCALL,
+    instrux_VMPTRLD,
+    instrux_VMPTRST,
+    instrux_VMREAD,
+    instrux_VMRESUME,
+    instrux_VMRUN,
+    instrux_VMSAVE,
+    instrux_VMWRITE,
+    instrux_VMXOFF,
+    instrux_VMXON,
+    instrux_INVEPT,
+    instrux_INVVPID,
+    instrux_PVALIDATE,
+    instrux_RMPADJUST,
+    instrux_VMGEXIT,
+    instrux_PABSB,
+    instrux_PABSW,
+    instrux_PABSD,
+    instrux_PALIGNR,
+    instrux_PHADDW,
+    instrux_PHADDD,
+    instrux_PHADDSW,
+    instrux_PHSUBW,
+    instrux_PHSUBD,
+    instrux_PHSUBSW,
+    instrux_PMADDUBSW,
+    instrux_PMULHRSW,
+    instrux_PSHUFB,
+    instrux_PSIGNB,
+    instrux_PSIGNW,
+    instrux_PSIGND,
+    instrux_EXTRQ,
+    instrux_INSERTQ,
+    instrux_MOVNTSD,
+    instrux_MOVNTSS,
+    instrux_LZCNT,
+    instrux_BLENDPD,
+    instrux_BLENDPS,
+    instrux_BLENDVPD,
+    instrux_BLENDVPS,
+    instrux_DPPD,
+    instrux_DPPS,
+    instrux_EXTRACTPS,
+    instrux_INSERTPS,
+    instrux_MOVNTDQA,
+    instrux_MPSADBW,
+    instrux_PACKUSDW,
+    instrux_PBLENDVB,
+    instrux_PBLENDW,
+    instrux_PCMPEQQ,
+    instrux_PEXTRB,
+    instrux_PEXTRD,
+    instrux_PEXTRQ,
+    instrux_PHMINPOSUW,
+    instrux_PINSRB,
+    instrux_PINSRD,
+    instrux_PINSRQ,
+    instrux_PMAXSB,
+    instrux_PMAXSD,
+    instrux_PMAXUD,
+    instrux_PMAXUW,
+    instrux_PMINSB,
+    instrux_PMINSD,
+    instrux_PMINUD,
+    instrux_PMINUW,
+    instrux_PMOVSXBW,
+    instrux_PMOVSXBD,
+    instrux_PMOVSXBQ,
+    instrux_PMOVSXWD,
+    instrux_PMOVSXWQ,
+    instrux_PMOVSXDQ,
+    instrux_PMOVZXBW,
+    instrux_PMOVZXBD,
+    instrux_PMOVZXBQ,
+    instrux_PMOVZXWD,
+    instrux_PMOVZXWQ,
+    instrux_PMOVZXDQ,
+    instrux_PMULDQ,
+    instrux_PMULLD,
+    instrux_PTEST,
+    instrux_ROUNDPD,
+    instrux_ROUNDPS,
+    instrux_ROUNDSD,
+    instrux_ROUNDSS,
+    instrux_CRC32,
+    instrux_PCMPESTRI,
+    instrux_PCMPESTRM,
+    instrux_PCMPISTRI,
+    instrux_PCMPISTRM,
+    instrux_PCMPGTQ,
+    instrux_POPCNT,
+    instrux_GETSEC,
+    instrux_PFRCPV,
+    instrux_PFRSQRTV,
+    instrux_MOVBE,
+    instrux_AESENC,
+    instrux_AESENCLAST,
+    instrux_AESDEC,
+    instrux_AESDECLAST,
+    instrux_AESIMC,
+    instrux_AESKEYGENASSIST,
+    instrux_VAESENC,
+    instrux_VAESENCLAST,
+    instrux_VAESDEC,
+    instrux_VAESDECLAST,
+    instrux_VAESIMC,
+    instrux_VAESKEYGENASSIST,
+    instrux_VADDPD,
+    instrux_VADDPS,
+    instrux_VADDSD,
+    instrux_VADDSS,
+    instrux_VADDSUBPD,
+    instrux_VADDSUBPS,
+    instrux_VANDPD,
+    instrux_VANDPS,
+    instrux_VANDNPD,
+    instrux_VANDNPS,
+    instrux_VBLENDPD,
+    instrux_VBLENDPS,
+    instrux_VBLENDVPD,
+    instrux_VBLENDVPS,
+    instrux_VBROADCASTSS,
+    instrux_VBROADCASTSD,
+    instrux_VBROADCASTF128,
+    instrux_VCMPEQ_OSPD,
+    instrux_VCMPEQPD,
+    instrux_VCMPLT_OSPD,
+    instrux_VCMPLTPD,
+    instrux_VCMPLE_OSPD,
+    instrux_VCMPLEPD,
+    instrux_VCMPUNORD_QPD,
+    instrux_VCMPUNORDPD,
+    instrux_VCMPNEQ_UQPD,
+    instrux_VCMPNEQPD,
+    instrux_VCMPNLT_USPD,
+    instrux_VCMPNLTPD,
+    instrux_VCMPNLE_USPD,
+    instrux_VCMPNLEPD,
+    instrux_VCMPORD_QPD,
+    instrux_VCMPORDPD,
+    instrux_VCMPEQ_UQPD,
+    instrux_VCMPNGE_USPD,
+    instrux_VCMPNGEPD,
+    instrux_VCMPNGT_USPD,
+    instrux_VCMPNGTPD,
+    instrux_VCMPFALSE_OQPD,
+    instrux_VCMPFALSEPD,
+    instrux_VCMPNEQ_OQPD,
+    instrux_VCMPGE_OSPD,
+    instrux_VCMPGEPD,
+    instrux_VCMPGT_OSPD,
+    instrux_VCMPGTPD,
+    instrux_VCMPTRUE_UQPD,
+    instrux_VCMPTRUEPD,
+    instrux_VCMPLT_OQPD,
+    instrux_VCMPLE_OQPD,
+    instrux_VCMPUNORD_SPD,
+    instrux_VCMPNEQ_USPD,
+    instrux_VCMPNLT_UQPD,
+    instrux_VCMPNLE_UQPD,
+    instrux_VCMPORD_SPD,
+    instrux_VCMPEQ_USPD,
+    instrux_VCMPNGE_UQPD,
+    instrux_VCMPNGT_UQPD,
+    instrux_VCMPFALSE_OSPD,
+    instrux_VCMPNEQ_OSPD,
+    instrux_VCMPGE_OQPD,
+    instrux_VCMPGT_OQPD,
+    instrux_VCMPTRUE_USPD,
+    instrux_VCMPPD,
+    instrux_VCMPEQ_OSPS,
+    instrux_VCMPEQPS,
+    instrux_VCMPLT_OSPS,
+    instrux_VCMPLTPS,
+    instrux_VCMPLE_OSPS,
+    instrux_VCMPLEPS,
+    instrux_VCMPUNORD_QPS,
+    instrux_VCMPUNORDPS,
+    instrux_VCMPNEQ_UQPS,
+    instrux_VCMPNEQPS,
+    instrux_VCMPNLT_USPS,
+    instrux_VCMPNLTPS,
+    instrux_VCMPNLE_USPS,
+    instrux_VCMPNLEPS,
+    instrux_VCMPORD_QPS,
+    instrux_VCMPORDPS,
+    instrux_VCMPEQ_UQPS,
+    instrux_VCMPNGE_USPS,
+    instrux_VCMPNGEPS,
+    instrux_VCMPNGT_USPS,
+    instrux_VCMPNGTPS,
+    instrux_VCMPFALSE_OQPS,
+    instrux_VCMPFALSEPS,
+    instrux_VCMPNEQ_OQPS,
+    instrux_VCMPGE_OSPS,
+    instrux_VCMPGEPS,
+    instrux_VCMPGT_OSPS,
+    instrux_VCMPGTPS,
+    instrux_VCMPTRUE_UQPS,
+    instrux_VCMPTRUEPS,
+    instrux_VCMPLT_OQPS,
+    instrux_VCMPLE_OQPS,
+    instrux_VCMPUNORD_SPS,
+    instrux_VCMPNEQ_USPS,
+    instrux_VCMPNLT_UQPS,
+    instrux_VCMPNLE_UQPS,
+    instrux_VCMPORD_SPS,
+    instrux_VCMPEQ_USPS,
+    instrux_VCMPNGE_UQPS,
+    instrux_VCMPNGT_UQPS,
+    instrux_VCMPFALSE_OSPS,
+    instrux_VCMPNEQ_OSPS,
+    instrux_VCMPGE_OQPS,
+    instrux_VCMPGT_OQPS,
+    instrux_VCMPTRUE_USPS,
+    instrux_VCMPPS,
+    instrux_VCMPEQ_OSSD,
+    instrux_VCMPEQSD,
+    instrux_VCMPLT_OSSD,
+    instrux_VCMPLTSD,
+    instrux_VCMPLE_OSSD,
+    instrux_VCMPLESD,
+    instrux_VCMPUNORD_QSD,
+    instrux_VCMPUNORDSD,
+    instrux_VCMPNEQ_UQSD,
+    instrux_VCMPNEQSD,
+    instrux_VCMPNLT_USSD,
+    instrux_VCMPNLTSD,
+    instrux_VCMPNLE_USSD,
+    instrux_VCMPNLESD,
+    instrux_VCMPORD_QSD,
+    instrux_VCMPORDSD,
+    instrux_VCMPEQ_UQSD,
+    instrux_VCMPNGE_USSD,
+    instrux_VCMPNGESD,
+    instrux_VCMPNGT_USSD,
+    instrux_VCMPNGTSD,
+    instrux_VCMPFALSE_OQSD,
+    instrux_VCMPFALSESD,
+    instrux_VCMPNEQ_OQSD,
+    instrux_VCMPGE_OSSD,
+    instrux_VCMPGESD,
+    instrux_VCMPGT_OSSD,
+    instrux_VCMPGTSD,
+    instrux_VCMPTRUE_UQSD,
+    instrux_VCMPTRUESD,
+    instrux_VCMPLT_OQSD,
+    instrux_VCMPLE_OQSD,
+    instrux_VCMPUNORD_SSD,
+    instrux_VCMPNEQ_USSD,
+    instrux_VCMPNLT_UQSD,
+    instrux_VCMPNLE_UQSD,
+    instrux_VCMPORD_SSD,
+    instrux_VCMPEQ_USSD,
+    instrux_VCMPNGE_UQSD,
+    instrux_VCMPNGT_UQSD,
+    instrux_VCMPFALSE_OSSD,
+    instrux_VCMPNEQ_OSSD,
+    instrux_VCMPGE_OQSD,
+    instrux_VCMPGT_OQSD,
+    instrux_VCMPTRUE_USSD,
+    instrux_VCMPSD,
+    instrux_VCMPEQ_OSSS,
+    instrux_VCMPEQSS,
+    instrux_VCMPLT_OSSS,
+    instrux_VCMPLTSS,
+    instrux_VCMPLE_OSSS,
+    instrux_VCMPLESS,
+    instrux_VCMPUNORD_QSS,
+    instrux_VCMPUNORDSS,
+    instrux_VCMPNEQ_UQSS,
+    instrux_VCMPNEQSS,
+    instrux_VCMPNLT_USSS,
+    instrux_VCMPNLTSS,
+    instrux_VCMPNLE_USSS,
+    instrux_VCMPNLESS,
+    instrux_VCMPORD_QSS,
+    instrux_VCMPORDSS,
+    instrux_VCMPEQ_UQSS,
+    instrux_VCMPNGE_USSS,
+    instrux_VCMPNGESS,
+    instrux_VCMPNGT_USSS,
+    instrux_VCMPNGTSS,
+    instrux_VCMPFALSE_OQSS,
+    instrux_VCMPFALSESS,
+    instrux_VCMPNEQ_OQSS,
+    instrux_VCMPGE_OSSS,
+    instrux_VCMPGESS,
+    instrux_VCMPGT_OSSS,
+    instrux_VCMPGTSS,
+    instrux_VCMPTRUE_UQSS,
+    instrux_VCMPTRUESS,
+    instrux_VCMPLT_OQSS,
+    instrux_VCMPLE_OQSS,
+    instrux_VCMPUNORD_SSS,
+    instrux_VCMPNEQ_USSS,
+    instrux_VCMPNLT_UQSS,
+    instrux_VCMPNLE_UQSS,
+    instrux_VCMPORD_SSS,
+    instrux_VCMPEQ_USSS,
+    instrux_VCMPNGE_UQSS,
+    instrux_VCMPNGT_UQSS,
+    instrux_VCMPFALSE_OSSS,
+    instrux_VCMPNEQ_OSSS,
+    instrux_VCMPGE_OQSS,
+    instrux_VCMPGT_OQSS,
+    instrux_VCMPTRUE_USSS,
+    instrux_VCMPSS,
+    instrux_VCOMISD,
+    instrux_VCOMISS,
+    instrux_VCVTDQ2PD,
+    instrux_VCVTDQ2PS,
+    instrux_VCVTPD2DQ,
+    instrux_VCVTPD2PS,
+    instrux_VCVTPS2DQ,
+    instrux_VCVTPS2PD,
+    instrux_VCVTSD2SI,
+    instrux_VCVTSD2SS,
+    instrux_VCVTSI2SD,
+    instrux_VCVTSI2SS,
+    instrux_VCVTSS2SD,
+    instrux_VCVTSS2SI,
+    instrux_VCVTTPD2DQ,
+    instrux_VCVTTPS2DQ,
+    instrux_VCVTTSD2SI,
+    instrux_VCVTTSS2SI,
+    instrux_VDIVPD,
+    instrux_VDIVPS,
+    instrux_VDIVSD,
+    instrux_VDIVSS,
+    instrux_VDPPD,
+    instrux_VDPPS,
+    instrux_VEXTRACTF128,
+    instrux_VEXTRACTPS,
+    instrux_VHADDPD,
+    instrux_VHADDPS,
+    instrux_VHSUBPD,
+    instrux_VHSUBPS,
+    instrux_VINSERTF128,
+    instrux_VINSERTPS,
+    instrux_VLDDQU,
+    instrux_VLDQQU,
+    instrux_VLDMXCSR,
+    instrux_VMASKMOVDQU,
+    instrux_VMASKMOVPS,
+    instrux_VMASKMOVPD,
+    instrux_VMAXPD,
+    instrux_VMAXPS,
+    instrux_VMAXSD,
+    instrux_VMAXSS,
+    instrux_VMINPD,
+    instrux_VMINPS,
+    instrux_VMINSD,
+    instrux_VMINSS,
+    instrux_VMOVAPD,
+    instrux_VMOVAPS,
+    instrux_VMOVD,
+    instrux_VMOVQ,
+    instrux_VMOVDDUP,
+    instrux_VMOVDQA,
+    instrux_VMOVQQA,
+    instrux_VMOVDQU,
+    instrux_VMOVQQU,
+    instrux_VMOVHLPS,
+    instrux_VMOVHPD,
+    instrux_VMOVHPS,
+    instrux_VMOVLHPS,
+    instrux_VMOVLPD,
+    instrux_VMOVLPS,
+    instrux_VMOVMSKPD,
+    instrux_VMOVMSKPS,
+    instrux_VMOVNTDQ,
+    instrux_VMOVNTQQ,
+    instrux_VMOVNTDQA,
+    instrux_VMOVNTPD,
+    instrux_VMOVNTPS,
+    instrux_VMOVSD,
+    instrux_VMOVSHDUP,
+    instrux_VMOVSLDUP,
+    instrux_VMOVSS,
+    instrux_VMOVUPD,
+    instrux_VMOVUPS,
+    instrux_VMPSADBW,
+    instrux_VMULPD,
+    instrux_VMULPS,
+    instrux_VMULSD,
+    instrux_VMULSS,
+    instrux_VORPD,
+    instrux_VORPS,
+    instrux_VPABSB,
+    instrux_VPABSW,
+    instrux_VPABSD,
+    instrux_VPACKSSWB,
+    instrux_VPACKSSDW,
+    instrux_VPACKUSWB,
+    instrux_VPACKUSDW,
+    instrux_VPADDB,
+    instrux_VPADDW,
+    instrux_VPADDD,
+    instrux_VPADDQ,
+    instrux_VPADDSB,
+    instrux_VPADDSW,
+    instrux_VPADDUSB,
+    instrux_VPADDUSW,
+    instrux_VPALIGNR,
+    instrux_VPAND,
+    instrux_VPANDN,
+    instrux_VPAVGB,
+    instrux_VPAVGW,
+    instrux_VPBLENDVB,
+    instrux_VPBLENDW,
+    instrux_VPCMPESTRI,
+    instrux_VPCMPESTRM,
+    instrux_VPCMPISTRI,
+    instrux_VPCMPISTRM,
+    instrux_VPCMPEQB,
+    instrux_VPCMPEQW,
+    instrux_VPCMPEQD,
+    instrux_VPCMPEQQ,
+    instrux_VPCMPGTB,
+    instrux_VPCMPGTW,
+    instrux_VPCMPGTD,
+    instrux_VPCMPGTQ,
+    instrux_VPERMILPD,
+    instrux_VPERMILPS,
+    instrux_VPERM2F128,
+    instrux_VPEXTRB,
+    instrux_VPEXTRW,
+    instrux_VPEXTRD,
+    instrux_VPEXTRQ,
+    instrux_VPHADDW,
+    instrux_VPHADDD,
+    instrux_VPHADDSW,
+    instrux_VPHMINPOSUW,
+    instrux_VPHSUBW,
+    instrux_VPHSUBD,
+    instrux_VPHSUBSW,
+    instrux_VPINSRB,
+    instrux_VPINSRW,
+    instrux_VPINSRD,
+    instrux_VPINSRQ,
+    instrux_VPMADDWD,
+    instrux_VPMADDUBSW,
+    instrux_VPMAXSB,
+    instrux_VPMAXSW,
+    instrux_VPMAXSD,
+    instrux_VPMAXUB,
+    instrux_VPMAXUW,
+    instrux_VPMAXUD,
+    instrux_VPMINSB,
+    instrux_VPMINSW,
+    instrux_VPMINSD,
+    instrux_VPMINUB,
+    instrux_VPMINUW,
+    instrux_VPMINUD,
+    instrux_VPMOVMSKB,
+    instrux_VPMOVSXBW,
+    instrux_VPMOVSXBD,
+    instrux_VPMOVSXBQ,
+    instrux_VPMOVSXWD,
+    instrux_VPMOVSXWQ,
+    instrux_VPMOVSXDQ,
+    instrux_VPMOVZXBW,
+    instrux_VPMOVZXBD,
+    instrux_VPMOVZXBQ,
+    instrux_VPMOVZXWD,
+    instrux_VPMOVZXWQ,
+    instrux_VPMOVZXDQ,
+    instrux_VPMULHUW,
+    instrux_VPMULHRSW,
+    instrux_VPMULHW,
+    instrux_VPMULLW,
+    instrux_VPMULLD,
+    instrux_VPMULUDQ,
+    instrux_VPMULDQ,
+    instrux_VPOR,
+    instrux_VPSADBW,
+    instrux_VPSHUFB,
+    instrux_VPSHUFD,
+    instrux_VPSHUFHW,
+    instrux_VPSHUFLW,
+    instrux_VPSIGNB,
+    instrux_VPSIGNW,
+    instrux_VPSIGND,
+    instrux_VPSLLDQ,
+    instrux_VPSRLDQ,
+    instrux_VPSLLW,
+    instrux_VPSLLD,
+    instrux_VPSLLQ,
+    instrux_VPSRAW,
+    instrux_VPSRAD,
+    instrux_VPSRLW,
+    instrux_VPSRLD,
+    instrux_VPSRLQ,
+    instrux_VPTEST,
+    instrux_VPSUBB,
+    instrux_VPSUBW,
+    instrux_VPSUBD,
+    instrux_VPSUBQ,
+    instrux_VPSUBSB,
+    instrux_VPSUBSW,
+    instrux_VPSUBUSB,
+    instrux_VPSUBUSW,
+    instrux_VPUNPCKHBW,
+    instrux_VPUNPCKHWD,
+    instrux_VPUNPCKHDQ,
+    instrux_VPUNPCKHQDQ,
+    instrux_VPUNPCKLBW,
+    instrux_VPUNPCKLWD,
+    instrux_VPUNPCKLDQ,
+    instrux_VPUNPCKLQDQ,
+    instrux_VPXOR,
+    instrux_VRCPPS,
+    instrux_VRCPSS,
+    instrux_VRSQRTPS,
+    instrux_VRSQRTSS,
+    instrux_VROUNDPD,
+    instrux_VROUNDPS,
+    instrux_VROUNDSD,
+    instrux_VROUNDSS,
+    instrux_VSHUFPD,
+    instrux_VSHUFPS,
+    instrux_VSQRTPD,
+    instrux_VSQRTPS,
+    instrux_VSQRTSD,
+    instrux_VSQRTSS,
+    instrux_VSTMXCSR,
+    instrux_VSUBPD,
+    instrux_VSUBPS,
+    instrux_VSUBSD,
+    instrux_VSUBSS,
+    instrux_VTESTPS,
+    instrux_VTESTPD,
+    instrux_VUCOMISD,
+    instrux_VUCOMISS,
+    instrux_VUNPCKHPD,
+    instrux_VUNPCKHPS,
+    instrux_VUNPCKLPD,
+    instrux_VUNPCKLPS,
+    instrux_VXORPD,
+    instrux_VXORPS,
+    instrux_VZEROALL,
+    instrux_VZEROUPPER,
+    instrux_PCLMULLQLQDQ,
+    instrux_PCLMULHQLQDQ,
+    instrux_PCLMULLQHQDQ,
+    instrux_PCLMULHQHQDQ,
+    instrux_PCLMULQDQ,
+    instrux_VPCLMULLQLQDQ,
+    instrux_VPCLMULHQLQDQ,
+    instrux_VPCLMULLQHQDQ,
+    instrux_VPCLMULHQHQDQ,
+    instrux_VPCLMULQDQ,
+    instrux_VFMADD132PS,
+    instrux_VFMADD132PD,
+    instrux_VFMADD312PS,
+    instrux_VFMADD312PD,
+    instrux_VFMADD213PS,
+    instrux_VFMADD213PD,
+    instrux_VFMADD123PS,
+    instrux_VFMADD123PD,
+    instrux_VFMADD231PS,
+    instrux_VFMADD231PD,
+    instrux_VFMADD321PS,
+    instrux_VFMADD321PD,
+    instrux_VFMADDSUB132PS,
+    instrux_VFMADDSUB132PD,
+    instrux_VFMADDSUB312PS,
+    instrux_VFMADDSUB312PD,
+    instrux_VFMADDSUB213PS,
+    instrux_VFMADDSUB213PD,
+    instrux_VFMADDSUB123PS,
+    instrux_VFMADDSUB123PD,
+    instrux_VFMADDSUB231PS,
+    instrux_VFMADDSUB231PD,
+    instrux_VFMADDSUB321PS,
+    instrux_VFMADDSUB321PD,
+    instrux_VFMSUB132PS,
+    instrux_VFMSUB132PD,
+    instrux_VFMSUB312PS,
+    instrux_VFMSUB312PD,
+    instrux_VFMSUB213PS,
+    instrux_VFMSUB213PD,
+    instrux_VFMSUB123PS,
+    instrux_VFMSUB123PD,
+    instrux_VFMSUB231PS,
+    instrux_VFMSUB231PD,
+    instrux_VFMSUB321PS,
+    instrux_VFMSUB321PD,
+    instrux_VFMSUBADD132PS,
+    instrux_VFMSUBADD132PD,
+    instrux_VFMSUBADD312PS,
+    instrux_VFMSUBADD312PD,
+    instrux_VFMSUBADD213PS,
+    instrux_VFMSUBADD213PD,
+    instrux_VFMSUBADD123PS,
+    instrux_VFMSUBADD123PD,
+    instrux_VFMSUBADD231PS,
+    instrux_VFMSUBADD231PD,
+    instrux_VFMSUBADD321PS,
+    instrux_VFMSUBADD321PD,
+    instrux_VFNMADD132PS,
+    instrux_VFNMADD132PD,
+    instrux_VFNMADD312PS,
+    instrux_VFNMADD312PD,
+    instrux_VFNMADD213PS,
+    instrux_VFNMADD213PD,
+    instrux_VFNMADD123PS,
+    instrux_VFNMADD123PD,
+    instrux_VFNMADD231PS,
+    instrux_VFNMADD231PD,
+    instrux_VFNMADD321PS,
+    instrux_VFNMADD321PD,
+    instrux_VFNMSUB132PS,
+    instrux_VFNMSUB132PD,
+    instrux_VFNMSUB312PS,
+    instrux_VFNMSUB312PD,
+    instrux_VFNMSUB213PS,
+    instrux_VFNMSUB213PD,
+    instrux_VFNMSUB123PS,
+    instrux_VFNMSUB123PD,
+    instrux_VFNMSUB231PS,
+    instrux_VFNMSUB231PD,
+    instrux_VFNMSUB321PS,
+    instrux_VFNMSUB321PD,
+    instrux_VFMADD132SS,
+    instrux_VFMADD132SD,
+    instrux_VFMADD312SS,
+    instrux_VFMADD312SD,
+    instrux_VFMADD213SS,
+    instrux_VFMADD213SD,
+    instrux_VFMADD123SS,
+    instrux_VFMADD123SD,
+    instrux_VFMADD231SS,
+    instrux_VFMADD231SD,
+    instrux_VFMADD321SS,
+    instrux_VFMADD321SD,
+    instrux_VFMSUB132SS,
+    instrux_VFMSUB132SD,
+    instrux_VFMSUB312SS,
+    instrux_VFMSUB312SD,
+    instrux_VFMSUB213SS,
+    instrux_VFMSUB213SD,
+    instrux_VFMSUB123SS,
+    instrux_VFMSUB123SD,
+    instrux_VFMSUB231SS,
+    instrux_VFMSUB231SD,
+    instrux_VFMSUB321SS,
+    instrux_VFMSUB321SD,
+    instrux_VFNMADD132SS,
+    instrux_VFNMADD132SD,
+    instrux_VFNMADD312SS,
+    instrux_VFNMADD312SD,
+    instrux_VFNMADD213SS,
+    instrux_VFNMADD213SD,
+    instrux_VFNMADD123SS,
+    instrux_VFNMADD123SD,
+    instrux_VFNMADD231SS,
+    instrux_VFNMADD231SD,
+    instrux_VFNMADD321SS,
+    instrux_VFNMADD321SD,
+    instrux_VFNMSUB132SS,
+    instrux_VFNMSUB132SD,
+    instrux_VFNMSUB312SS,
+    instrux_VFNMSUB312SD,
+    instrux_VFNMSUB213SS,
+    instrux_VFNMSUB213SD,
+    instrux_VFNMSUB123SS,
+    instrux_VFNMSUB123SD,
+    instrux_VFNMSUB231SS,
+    instrux_VFNMSUB231SD,
+    instrux_VFNMSUB321SS,
+    instrux_VFNMSUB321SD,
+    instrux_RDFSBASE,
+    instrux_RDGSBASE,
+    instrux_RDRAND,
+    instrux_WRFSBASE,
+    instrux_WRGSBASE,
+    instrux_VCVTPH2PS,
+    instrux_VCVTPS2PH,
+    instrux_ADCX,
+    instrux_ADOX,
+    instrux_RDSEED,
+    instrux_CLAC,
+    instrux_STAC,
+    instrux_XSTORE,
+    instrux_XCRYPTECB,
+    instrux_XCRYPTCBC,
+    instrux_XCRYPTCTR,
+    instrux_XCRYPTCFB,
+    instrux_XCRYPTOFB,
+    instrux_MONTMUL,
+    instrux_XSHA1,
+    instrux_XSHA256,
+    instrux_LLWPCB,
+    instrux_SLWPCB,
+    instrux_LWPVAL,
+    instrux_LWPINS,
+    instrux_VFMADDPD,
+    instrux_VFMADDPS,
+    instrux_VFMADDSD,
+    instrux_VFMADDSS,
+    instrux_VFMADDSUBPD,
+    instrux_VFMADDSUBPS,
+    instrux_VFMSUBADDPD,
+    instrux_VFMSUBADDPS,
+    instrux_VFMSUBPD,
+    instrux_VFMSUBPS,
+    instrux_VFMSUBSD,
+    instrux_VFMSUBSS,
+    instrux_VFNMADDPD,
+    instrux_VFNMADDPS,
+    instrux_VFNMADDSD,
+    instrux_VFNMADDSS,
+    instrux_VFNMSUBPD,
+    instrux_VFNMSUBPS,
+    instrux_VFNMSUBSD,
+    instrux_VFNMSUBSS,
+    instrux_VFRCZPD,
+    instrux_VFRCZPS,
+    instrux_VFRCZSD,
+    instrux_VFRCZSS,
+    instrux_VPCMOV,
+    instrux_VPCOMB,
+    instrux_VPCOMD,
+    instrux_VPCOMQ,
+    instrux_VPCOMUB,
+    instrux_VPCOMUD,
+    instrux_VPCOMUQ,
+    instrux_VPCOMUW,
+    instrux_VPCOMW,
+    instrux_VPHADDBD,
+    instrux_VPHADDBQ,
+    instrux_VPHADDBW,
+    instrux_VPHADDDQ,
+    instrux_VPHADDUBD,
+    instrux_VPHADDUBQ,
+    instrux_VPHADDUBW,
+    instrux_VPHADDUDQ,
+    instrux_VPHADDUWD,
+    instrux_VPHADDUWQ,
+    instrux_VPHADDWD,
+    instrux_VPHADDWQ,
+    instrux_VPHSUBBW,
+    instrux_VPHSUBDQ,
+    instrux_VPHSUBWD,
+    instrux_VPMACSDD,
+    instrux_VPMACSDQH,
+    instrux_VPMACSDQL,
+    instrux_VPMACSSDD,
+    instrux_VPMACSSDQH,
+    instrux_VPMACSSDQL,
+    instrux_VPMACSSWD,
+    instrux_VPMACSSWW,
+    instrux_VPMACSWD,
+    instrux_VPMACSWW,
+    instrux_VPMADCSSWD,
+    instrux_VPMADCSWD,
+    instrux_VPPERM,
+    instrux_VPROTB,
+    instrux_VPROTD,
+    instrux_VPROTQ,
+    instrux_VPROTW,
+    instrux_VPSHAB,
+    instrux_VPSHAD,
+    instrux_VPSHAQ,
+    instrux_VPSHAW,
+    instrux_VPSHLB,
+    instrux_VPSHLD,
+    instrux_VPSHLQ,
+    instrux_VPSHLW,
+    instrux_VBROADCASTI128,
+    instrux_VPBLENDD,
+    instrux_VPBROADCASTB,
+    instrux_VPBROADCASTW,
+    instrux_VPBROADCASTD,
+    instrux_VPBROADCASTQ,
+    instrux_VPERMD,
+    instrux_VPERMPD,
+    instrux_VPERMPS,
+    instrux_VPERMQ,
+    instrux_VPERM2I128,
+    instrux_VEXTRACTI128,
+    instrux_VINSERTI128,
+    instrux_VPMASKMOVD,
+    instrux_VPMASKMOVQ,
+    instrux_VPSLLVD,
+    instrux_VPSLLVQ,
+    instrux_VPSRAVD,
+    instrux_VPSRLVD,
+    instrux_VPSRLVQ,
+    instrux_VGATHERDPD,
+    instrux_VGATHERQPD,
+    instrux_VGATHERDPS,
+    instrux_VGATHERQPS,
+    instrux_VPGATHERDD,
+    instrux_VPGATHERQD,
+    instrux_VPGATHERDQ,
+    instrux_VPGATHERQQ,
+    instrux_XABORT,
+    instrux_XBEGIN,
+    instrux_XEND,
+    instrux_XTEST,
+    instrux_ANDN,
+    instrux_BEXTR,
+    instrux_BLCI,
+    instrux_BLCIC,
+    instrux_BLSI,
+    instrux_BLSIC,
+    instrux_BLCFILL,
+    instrux_BLSFILL,
+    instrux_BLCMSK,
+    instrux_BLSMSK,
+    instrux_BLSR,
+    instrux_BLCS,
+    instrux_BZHI,
+    instrux_MULX,
+    instrux_PDEP,
+    instrux_PEXT,
+    instrux_RORX,
+    instrux_SARX,
+    instrux_SHLX,
+    instrux_SHRX,
+    instrux_TZCNT,
+    instrux_TZMSK,
+    instrux_T1MSKC,
+    instrux_PREFETCHWT1,
+    instrux_BNDMK,
+    instrux_BNDCL,
+    instrux_BNDCU,
+    instrux_BNDCN,
+    instrux_BNDMOV,
+    instrux_BNDLDX,
+    instrux_BNDSTX,
+    instrux_SHA1MSG1,
+    instrux_SHA1MSG2,
+    instrux_SHA1NEXTE,
+    instrux_SHA1RNDS4,
+    instrux_SHA256MSG1,
+    instrux_SHA256MSG2,
+    instrux_SHA256RNDS2,
+    instrux_VSHA512MSG1,
+    instrux_VSHA512MSG2,
+    instrux_VSHA512RNDS2,
+    instrux_VSM3MSG1,
+    instrux_VSM3MSG2,
+    instrux_VSM3RNDS2,
+    instrux_VSM4KEY4,
+    instrux_VSM4RNDS4,
+    instrux_VBCSTNEBF16PS,
+    instrux_VBCSTNESH2PS,
+    instrux_VCVTNEEBF162PS,
+    instrux_VCVTNEEPH2PS,
+    instrux_VCVTNEOBF162PS,
+    instrux_VCVTNEOPH2PS,
+    instrux_VCVTNEPS2BF16,
+    instrux_VPDPBSSD,
+    instrux_VPDPBSSDS,
+    instrux_VPDPBSUD,
+    instrux_VPDPBSUDS,
+    instrux_VPDPBUUD,
+    instrux_VPDPBUUDS,
+    instrux_VPMADD52HUQ,
+    instrux_VPMADD52LUQ,
+    instrux_KADDB,
+    instrux_KADDD,
+    instrux_KADDQ,
+    instrux_KADDW,
+    instrux_KANDB,
+    instrux_KANDD,
+    instrux_KANDNB,
+    instrux_KANDND,
+    instrux_KANDNQ,
+    instrux_KANDNW,
+    instrux_KANDQ,
+    instrux_KANDW,
+    instrux_KMOVB,
+    instrux_KMOVD,
+    instrux_KMOVQ,
+    instrux_KMOVW,
+    instrux_KNOTB,
+    instrux_KNOTD,
+    instrux_KNOTQ,
+    instrux_KNOTW,
+    instrux_KORB,
+    instrux_KORD,
+    instrux_KORQ,
+    instrux_KORW,
+    instrux_KORTESTB,
+    instrux_KORTESTD,
+    instrux_KORTESTQ,
+    instrux_KORTESTW,
+    instrux_KSHIFTLB,
+    instrux_KSHIFTLD,
+    instrux_KSHIFTLQ,
+    instrux_KSHIFTLW,
+    instrux_KSHIFTRB,
+    instrux_KSHIFTRD,
+    instrux_KSHIFTRQ,
+    instrux_KSHIFTRW,
+    instrux_KTESTB,
+    instrux_KTESTD,
+    instrux_KTESTQ,
+    instrux_KTESTW,
+    instrux_KUNPCKBW,
+    instrux_KUNPCKDQ,
+    instrux_KUNPCKWD,
+    instrux_KXNORB,
+    instrux_KXNORD,
+    instrux_KXNORQ,
+    instrux_KXNORW,
+    instrux_KXORB,
+    instrux_KXORD,
+    instrux_KXORQ,
+    instrux_KXORW,
+    instrux_KADD,
+    instrux_KAND,
+    instrux_KANDN,
+    instrux_KMOV,
+    instrux_KNOT,
+    instrux_KOR,
+    instrux_KORTEST,
+    instrux_KSHIFTL,
+    instrux_KSHIFTR,
+    instrux_KTEST,
+    instrux_KUNPCK,
+    instrux_KXNOR,
+    instrux_KXOR,
+    instrux_VALIGND,
+    instrux_VALIGNQ,
+    instrux_VBLENDMPD,
+    instrux_VBLENDMPS,
+    instrux_VBROADCASTF32X2,
+    instrux_VBROADCASTF32X4,
+    instrux_VBROADCASTF32X8,
+    instrux_VBROADCASTF64X2,
+    instrux_VBROADCASTF64X4,
+    instrux_VBROADCASTI32X2,
+    instrux_VBROADCASTI32X4,
+    instrux_VBROADCASTI32X8,
+    instrux_VBROADCASTI64X2,
+    instrux_VBROADCASTI64X4,
+    instrux_VCMPEQ_OQPD,
+    instrux_VCMPEQ_OQPS,
+    instrux_VCMPEQ_OQSD,
+    instrux_VCMPEQ_OQSS,
+    instrux_VCOMPRESSPD,
+    instrux_VCOMPRESSPS,
+    instrux_VCVTPD2QQ,
+    instrux_VCVTPD2UDQ,
+    instrux_VCVTPD2UQQ,
+    instrux_VCVTPS2QQ,
+    instrux_VCVTPS2UDQ,
+    instrux_VCVTPS2UQQ,
+    instrux_VCVTQQ2PD,
+    instrux_VCVTQQ2PS,
+    instrux_VCVTSD2USI,
+    instrux_VCVTSS2USI,
+    instrux_VCVTTPD2QQ,
+    instrux_VCVTTPD2UDQ,
+    instrux_VCVTTPD2UQQ,
+    instrux_VCVTTPS2QQ,
+    instrux_VCVTTPS2UDQ,
+    instrux_VCVTTPS2UQQ,
+    instrux_VCVTTSD2USI,
+    instrux_VCVTTSS2USI,
+    instrux_VCVTUDQ2PD,
+    instrux_VCVTUDQ2PS,
+    instrux_VCVTUQQ2PD,
+    instrux_VCVTUQQ2PS,
+    instrux_VCVTUSI2SD,
+    instrux_VCVTUSI2SS,
+    instrux_VDBPSADBW,
+    instrux_VEXP2PD,
+    instrux_VEXP2PS,
+    instrux_VEXPANDPD,
+    instrux_VEXPANDPS,
+    instrux_VEXTRACTF32X4,
+    instrux_VEXTRACTF32X8,
+    instrux_VEXTRACTF64X2,
+    instrux_VEXTRACTF64X4,
+    instrux_VEXTRACTI32X4,
+    instrux_VEXTRACTI32X8,
+    instrux_VEXTRACTI64X2,
+    instrux_VEXTRACTI64X4,
+    instrux_VFIXUPIMMPD,
+    instrux_VFIXUPIMMPS,
+    instrux_VFIXUPIMMSD,
+    instrux_VFIXUPIMMSS,
+    instrux_VFPCLASSPD,
+    instrux_VFPCLASSPS,
+    instrux_VFPCLASSSD,
+    instrux_VFPCLASSSS,
+    instrux_VGATHERPF0DPD,
+    instrux_VGATHERPF0DPS,
+    instrux_VGATHERPF0QPD,
+    instrux_VGATHERPF0QPS,
+    instrux_VGATHERPF1DPD,
+    instrux_VGATHERPF1DPS,
+    instrux_VGATHERPF1QPD,
+    instrux_VGATHERPF1QPS,
+    instrux_VGETEXPPD,
+    instrux_VGETEXPPS,
+    instrux_VGETEXPSD,
+    instrux_VGETEXPSS,
+    instrux_VGETMANTPD,
+    instrux_VGETMANTPS,
+    instrux_VGETMANTSD,
+    instrux_VGETMANTSS,
+    instrux_VINSERTF32X4,
+    instrux_VINSERTF32X8,
+    instrux_VINSERTF64X2,
+    instrux_VINSERTF64X4,
+    instrux_VINSERTI32X4,
+    instrux_VINSERTI32X8,
+    instrux_VINSERTI64X2,
+    instrux_VINSERTI64X4,
+    instrux_VMOVDQA32,
+    instrux_VMOVDQA64,
+    instrux_VMOVDQU16,
+    instrux_VMOVDQU32,
+    instrux_VMOVDQU64,
+    instrux_VMOVDQU8,
+    instrux_VPABSQ,
+    instrux_VPANDD,
+    instrux_VPANDND,
+    instrux_VPANDNQ,
+    instrux_VPANDQ,
+    instrux_VPBLENDMB,
+    instrux_VPBLENDMD,
+    instrux_VPBLENDMQ,
+    instrux_VPBLENDMW,
+    instrux_VPBROADCASTMB2Q,
+    instrux_VPBROADCASTMW2D,
+    instrux_VPCMPEQUB,
+    instrux_VPCMPEQUD,
+    instrux_VPCMPEQUQ,
+    instrux_VPCMPEQUW,
+    instrux_VPCMPGEB,
+    instrux_VPCMPGED,
+    instrux_VPCMPGEQ,
+    instrux_VPCMPGEUB,
+    instrux_VPCMPGEUD,
+    instrux_VPCMPGEUQ,
+    instrux_VPCMPGEUW,
+    instrux_VPCMPGEW,
+    instrux_VPCMPGTUB,
+    instrux_VPCMPGTUD,
+    instrux_VPCMPGTUQ,
+    instrux_VPCMPGTUW,
+    instrux_VPCMPLEB,
+    instrux_VPCMPLED,
+    instrux_VPCMPLEQ,
+    instrux_VPCMPLEUB,
+    instrux_VPCMPLEUD,
+    instrux_VPCMPLEUQ,
+    instrux_VPCMPLEUW,
+    instrux_VPCMPLEW,
+    instrux_VPCMPLTB,
+    instrux_VPCMPLTD,
+    instrux_VPCMPLTQ,
+    instrux_VPCMPLTUB,
+    instrux_VPCMPLTUD,
+    instrux_VPCMPLTUQ,
+    instrux_VPCMPLTUW,
+    instrux_VPCMPLTW,
+    instrux_VPCMPNEQB,
+    instrux_VPCMPNEQD,
+    instrux_VPCMPNEQQ,
+    instrux_VPCMPNEQUB,
+    instrux_VPCMPNEQUD,
+    instrux_VPCMPNEQUQ,
+    instrux_VPCMPNEQUW,
+    instrux_VPCMPNEQW,
+    instrux_VPCMPNGTB,
+    instrux_VPCMPNGTD,
+    instrux_VPCMPNGTQ,
+    instrux_VPCMPNGTUB,
+    instrux_VPCMPNGTUD,
+    instrux_VPCMPNGTUQ,
+    instrux_VPCMPNGTUW,
+    instrux_VPCMPNGTW,
+    instrux_VPCMPNLEB,
+    instrux_VPCMPNLED,
+    instrux_VPCMPNLEQ,
+    instrux_VPCMPNLEUB,
+    instrux_VPCMPNLEUD,
+    instrux_VPCMPNLEUQ,
+    instrux_VPCMPNLEUW,
+    instrux_VPCMPNLEW,
+    instrux_VPCMPNLTB,
+    instrux_VPCMPNLTD,
+    instrux_VPCMPNLTQ,
+    instrux_VPCMPNLTUB,
+    instrux_VPCMPNLTUD,
+    instrux_VPCMPNLTUQ,
+    instrux_VPCMPNLTUW,
+    instrux_VPCMPNLTW,
+    instrux_VPCMPB,
+    instrux_VPCMPD,
+    instrux_VPCMPQ,
+    instrux_VPCMPUB,
+    instrux_VPCMPUD,
+    instrux_VPCMPUQ,
+    instrux_VPCMPUW,
+    instrux_VPCMPW,
+    instrux_VPCOMPRESSD,
+    instrux_VPCOMPRESSQ,
+    instrux_VPCONFLICTD,
+    instrux_VPCONFLICTQ,
+    instrux_VPERMB,
+    instrux_VPERMI2B,
+    instrux_VPERMI2D,
+    instrux_VPERMI2PD,
+    instrux_VPERMI2PS,
+    instrux_VPERMI2Q,
+    instrux_VPERMI2W,
+    instrux_VPERMT2B,
+    instrux_VPERMT2D,
+    instrux_VPERMT2PD,
+    instrux_VPERMT2PS,
+    instrux_VPERMT2Q,
+    instrux_VPERMT2W,
+    instrux_VPERMW,
+    instrux_VPEXPANDD,
+    instrux_VPEXPANDQ,
+    instrux_VPLZCNTD,
+    instrux_VPLZCNTQ,
+    instrux_VPMAXSQ,
+    instrux_VPMAXUQ,
+    instrux_VPMINSQ,
+    instrux_VPMINUQ,
+    instrux_VPMOVB2M,
+    instrux_VPMOVD2M,
+    instrux_VPMOVDB,
+    instrux_VPMOVDW,
+    instrux_VPMOVM2B,
+    instrux_VPMOVM2D,
+    instrux_VPMOVM2Q,
+    instrux_VPMOVM2W,
+    instrux_VPMOVQ2M,
+    instrux_VPMOVQB,
+    instrux_VPMOVQD,
+    instrux_VPMOVQW,
+    instrux_VPMOVSDB,
+    instrux_VPMOVSDW,
+    instrux_VPMOVSQB,
+    instrux_VPMOVSQD,
+    instrux_VPMOVSQW,
+    instrux_VPMOVSWB,
+    instrux_VPMOVUSDB,
+    instrux_VPMOVUSDW,
+    instrux_VPMOVUSQB,
+    instrux_VPMOVUSQD,
+    instrux_VPMOVUSQW,
+    instrux_VPMOVUSWB,
+    instrux_VPMOVW2M,
+    instrux_VPMOVWB,
+    instrux_VPMULLQ,
+    instrux_VPMULTISHIFTQB,
+    instrux_VPORD,
+    instrux_VPORQ,
+    instrux_VPROLD,
+    instrux_VPROLQ,
+    instrux_VPROLVD,
+    instrux_VPROLVQ,
+    instrux_VPRORD,
+    instrux_VPRORQ,
+    instrux_VPRORVD,
+    instrux_VPRORVQ,
+    instrux_VPSCATTERDD,
+    instrux_VPSCATTERDQ,
+    instrux_VPSCATTERQD,
+    instrux_VPSCATTERQQ,
+    instrux_VPSLLVW,
+    instrux_VPSRAQ,
+    instrux_VPSRAVQ,
+    instrux_VPSRAVW,
+    instrux_VPSRLVW,
+    instrux_VPTERNLOGD,
+    instrux_VPTERNLOGQ,
+    instrux_VPTESTMB,
+    instrux_VPTESTMD,
+    instrux_VPTESTMQ,
+    instrux_VPTESTMW,
+    instrux_VPTESTNMB,
+    instrux_VPTESTNMD,
+    instrux_VPTESTNMQ,
+    instrux_VPTESTNMW,
+    instrux_VPXORD,
+    instrux_VPXORQ,
+    instrux_VRANGEPD,
+    instrux_VRANGEPS,
+    instrux_VRANGESD,
+    instrux_VRANGESS,
+    instrux_VRCP14PD,
+    instrux_VRCP14PS,
+    instrux_VRCP14SD,
+    instrux_VRCP14SS,
+    instrux_VRCP28PD,
+    instrux_VRCP28PS,
+    instrux_VRCP28SD,
+    instrux_VRCP28SS,
+    instrux_VREDUCEPD,
+    instrux_VREDUCEPS,
+    instrux_VREDUCESD,
+    instrux_VREDUCESS,
+    instrux_VRNDSCALEPD,
+    instrux_VRNDSCALEPS,
+    instrux_VRNDSCALESD,
+    instrux_VRNDSCALESS,
+    instrux_VRSQRT14PD,
+    instrux_VRSQRT14PS,
+    instrux_VRSQRT14SD,
+    instrux_VRSQRT14SS,
+    instrux_VRSQRT28PD,
+    instrux_VRSQRT28PS,
+    instrux_VRSQRT28SD,
+    instrux_VRSQRT28SS,
+    instrux_VSCALEFPD,
+    instrux_VSCALEFPS,
+    instrux_VSCALEFSD,
+    instrux_VSCALEFSS,
+    instrux_VSCATTERDPD,
+    instrux_VSCATTERDPS,
+    instrux_VSCATTERPF0DPD,
+    instrux_VSCATTERPF0DPS,
+    instrux_VSCATTERPF0QPD,
+    instrux_VSCATTERPF0QPS,
+    instrux_VSCATTERPF1DPD,
+    instrux_VSCATTERPF1DPS,
+    instrux_VSCATTERPF1QPD,
+    instrux_VSCATTERPF1QPS,
+    instrux_VSCATTERQPD,
+    instrux_VSCATTERQPS,
+    instrux_VSHUFF32X4,
+    instrux_VSHUFF64X2,
+    instrux_VSHUFI32X4,
+    instrux_VSHUFI64X2,
+    instrux_RDPKRU,
+    instrux_WRPKRU,
+    instrux_RDPID,
+    instrux_CLFLUSHOPT,
+    instrux_CLWB,
+    instrux_PCOMMIT,
+    instrux_CLZERO,
+    instrux_PTWRITE,
+    instrux_CLDEMOTE,
+    instrux_MOVDIRI,
+    instrux_MOVDIR64B,
+    instrux_PCONFIG,
+    instrux_TPAUSE,
+    instrux_UMONITOR,
+    instrux_UMWAIT,
+    instrux_WBNOINVD,
+    instrux_GF2P8AFFINEINVQB,
+    instrux_VGF2P8AFFINEINVQB,
+    instrux_GF2P8AFFINEQB,
+    instrux_VGF2P8AFFINEQB,
+    instrux_GF2P8MULB,
+    instrux_VGF2P8MULB,
+    instrux_VPCOMPRESSB,
+    instrux_VPCOMPRESSW,
+    instrux_VPEXPANDB,
+    instrux_VPEXPANDW,
+    instrux_VPSHLDW,
+    instrux_VPSHLDD,
+    instrux_VPSHLDQ,
+    instrux_VPSHLDVW,
+    instrux_VPSHLDVD,
+    instrux_VPSHLDVQ,
+    instrux_VPSHRDW,
+    instrux_VPSHRDD,
+    instrux_VPSHRDQ,
+    instrux_VPSHRDVW,
+    instrux_VPSHRDVD,
+    instrux_VPSHRDVQ,
+    instrux_VPDPBUSD,
+    instrux_VPDPBUSDS,
+    instrux_VPDPWSSD,
+    instrux_VPDPWSSDS,
+    instrux_VPOPCNTB,
+    instrux_VPOPCNTW,
+    instrux_VPOPCNTD,
+    instrux_VPOPCNTQ,
+    instrux_VPSHUFBITQMB,
+    instrux_V4FMADDPS,
+    instrux_V4FNMADDPS,
+    instrux_V4FMADDSS,
+    instrux_V4FNMADDSS,
+    instrux_V4DPWSSDS,
+    instrux_V4DPWSSD,
+    instrux_ENCLS,
+    instrux_ENCLU,
+    instrux_ENCLV,
+    instrux_CLRSSBSY,
+    instrux_ENDBR32,
+    instrux_ENDBR64,
+    instrux_INCSSPD,
+    instrux_INCSSPQ,
+    instrux_RDSSPD,
+    instrux_RDSSPQ,
+    instrux_RSTORSSP,
+    instrux_SAVEPREVSSP,
+    instrux_SETSSBSY,
+    instrux_WRUSSD,
+    instrux_WRUSSQ,
+    instrux_WRSSD,
+    instrux_WRSSQ,
+    instrux_ENQCMD,
+    instrux_ENQCMDS,
+    instrux_SERIALIZE,
+    instrux_XRESLDTRK,
+    instrux_XSUSLDTRK,
+    instrux_VCVTNE2PS2BF16,
+    instrux_VDPBF16PS,
+    instrux_VP2INTERSECTD,
+    instrux_LDTILECFG,
+    instrux_STTILECFG,
+    instrux_TDPBF16PS,
+    instrux_TDPBSSD,
+    instrux_TDPBSUD,
+    instrux_TDPBUSD,
+    instrux_TDPBUUD,
+    instrux_TILELOADD,
+    instrux_TILELOADDT1,
+    instrux_TILERELEASE,
+    instrux_TILESTORED,
+    instrux_TILEZERO,
+    instrux_VADDPH,
+    instrux_VADDSH,
+    instrux_VCMPPH,
+    instrux_VCMPSH,
+    instrux_VCOMISH,
+    instrux_VCVTDQ2PH,
+    instrux_VCVTPD2PH,
+    instrux_VCVTPH2DQ,
+    instrux_VCVTPH2PD,
+    instrux_VCVTPH2PSX,
+    instrux_VCVTPH2QQ,
+    instrux_VCVTPH2UDQ,
+    instrux_VCVTPH2UQQ,
+    instrux_VCVTPH2UW,
+    instrux_VCVTPH2W,
+    instrux_VCVTQQ2PH,
+    instrux_VCVTSD2SH,
+    instrux_VCVTSH2SD,
+    instrux_VCVTSH2SI,
+    instrux_VCVTSH2SS,
+    instrux_VCVTSH2USI,
+    instrux_VCVTSI2SH,
+    instrux_VCVTSS2SH,
+    instrux_VCVTTPH2DQ,
+    instrux_VCVTTPH2QQ,
+    instrux_VCVTTPH2UDQ,
+    instrux_VCVTTPH2UQQ,
+    instrux_VCVTTPH2UW,
+    instrux_VCVTTPH2W,
+    instrux_VCVTTSH2SI,
+    instrux_VCVTTSH2USI,
+    instrux_VCVTUDQ2PH,
+    instrux_VCVTUQQ2PH,
+    instrux_VCVTUSI2SH,
+    instrux_VCVTUW2PH,
+    instrux_VCVTW2PH,
+    instrux_VDIVPH,
+    instrux_VDIVSH,
+    instrux_VFCMADDCPH,
+    instrux_VFMADDCPH,
+    instrux_VFCMADDCSH,
+    instrux_VFMADDCSH,
+    instrux_VFCMULCPCH,
+    instrux_VFMULCPCH,
+    instrux_VFCMULCSH,
+    instrux_VFMULCSH,
+    instrux_VFMADDSUB132PH,
+    instrux_VFMADDSUB213PH,
+    instrux_VFMADDSUB231PH,
+    instrux_VFMSUBADD132PH,
+    instrux_VFMSUBADD213PH,
+    instrux_VFMSUBADD231PH,
+    instrux_VPMADD132PH,
+    instrux_VPMADD213PH,
+    instrux_VPMADD231PH,
+    instrux_VFMADD132PH,
+    instrux_VFMADD213PH,
+    instrux_VFMADD231PH,
+    instrux_VPMADD132SH,
+    instrux_VPMADD213SH,
+    instrux_VPMADD231SH,
+    instrux_VPNMADD132SH,
+    instrux_VPNMADD213SH,
+    instrux_VPNMADD231SH,
+    instrux_VPMSUB132PH,
+    instrux_VPMSUB213PH,
+    instrux_VPMSUB231PH,
+    instrux_VFMSUB132PH,
+    instrux_VFMSUB213PH,
+    instrux_VFMSUB231PH,
+    instrux_VPMSUB132SH,
+    instrux_VPMSUB213SH,
+    instrux_VPMSUB231SH,
+    instrux_VPNMSUB132SH,
+    instrux_VPNMSUB213SH,
+    instrux_VPNMSUB231SH,
+    instrux_VFPCLASSPH,
+    instrux_VFPCLASSSH,
+    instrux_VGETEXPPH,
+    instrux_VGETEXPSH,
+    instrux_VGETMANTPH,
+    instrux_VGETMANTSH,
+    instrux_VGETMAXPH,
+    instrux_VGETMAXSH,
+    instrux_VGETMINPH,
+    instrux_VGETMINSH,
+    instrux_VMOVSH,
+    instrux_VMOVW,
+    instrux_VMULPH,
+    instrux_VMULSH,
+    instrux_VRCPPH,
+    instrux_VRCPSH,
+    instrux_VREDUCEPH,
+    instrux_VREDUCESH,
+    instrux_VENDSCALEPH,
+    instrux_VENDSCALESH,
+    instrux_VRSQRTPH,
+    instrux_VRSQRTSH,
+    instrux_VSCALEFPH,
+    instrux_VSCALEFSH,
+    instrux_VSQRTPH,
+    instrux_VSQRTSH,
+    instrux_VSUBPH,
+    instrux_VSUBSH,
+    instrux_VUCOMISH,
+    instrux_AADD,
+    instrux_AAND,
+    instrux_AXOR,
+    instrux_CLUI,
+    instrux_SENDUIPI,
+    instrux_STUI,
+    instrux_TESTUI,
+    instrux_UIRET,
+    instrux_CMPAXADD,
+    instrux_CMPAEXADD,
+    instrux_CMPBXADD,
+    instrux_CMPBEXADD,
+    instrux_CMPCXADD,
+    instrux_CMPEXADD,
+    instrux_CMPGXADD,
+    instrux_CMPGEXADD,
+    instrux_CMPLXADD,
+    instrux_CMPLEXADD,
+    instrux_CMPNAXADD,
+    instrux_CMPNAEXADD,
+    instrux_CMPNBXADD,
+    instrux_CMPNBEXADD,
+    instrux_CMPNCXADD,
+    instrux_CMPNEXADD,
+    instrux_CMPNGXADD,
+    instrux_CMPNGEXADD,
+    instrux_CMPNLXADD,
+    instrux_CMPNLEXADD,
+    instrux_CMPNOXADD,
+    instrux_CMPNPXADD,
+    instrux_CMPNSXADD,
+    instrux_CMPNZXADD,
+    instrux_CMPOXADD,
+    instrux_CMPPXADD,
+    instrux_CMPPEXADD,
+    instrux_CMPPOXADD,
+    instrux_CMPSXADD,
+    instrux_CMPZXADD,
+    instrux_ERETS,
+    instrux_ERETU,
+    instrux_LKGS,
+    instrux_WRMSRNS,
+    instrux_RDMSRLIST,
+    instrux_WRMSRLIST,
+    instrux_HRESET,
+    instrux_HINT_NOP0,
+    instrux_HINT_NOP1,
+    instrux_HINT_NOP2,
+    instrux_HINT_NOP3,
+    instrux_HINT_NOP4,
+    instrux_HINT_NOP5,
+    instrux_HINT_NOP6,
+    instrux_HINT_NOP7,
+    instrux_HINT_NOP8,
+    instrux_HINT_NOP9,
+    instrux_HINT_NOP10,
+    instrux_HINT_NOP11,
+    instrux_HINT_NOP12,
+    instrux_HINT_NOP13,
+    instrux_HINT_NOP14,
+    instrux_HINT_NOP15,
+    instrux_HINT_NOP16,
+    instrux_HINT_NOP17,
+    instrux_HINT_NOP18,
+    instrux_HINT_NOP19,
+    instrux_HINT_NOP20,
+    instrux_HINT_NOP21,
+    instrux_HINT_NOP22,
+    instrux_HINT_NOP23,
+    instrux_HINT_NOP24,
+    instrux_HINT_NOP25,
+    instrux_HINT_NOP26,
+    instrux_HINT_NOP27,
+    instrux_HINT_NOP28,
+    instrux_HINT_NOP29,
+    instrux_HINT_NOP30,
+    instrux_HINT_NOP31,
+    instrux_HINT_NOP32,
+    instrux_HINT_NOP33,
+    instrux_HINT_NOP34,
+    instrux_HINT_NOP35,
+    instrux_HINT_NOP36,
+    instrux_HINT_NOP37,
+    instrux_HINT_NOP38,
+    instrux_HINT_NOP39,
+    instrux_HINT_NOP40,
+    instrux_HINT_NOP41,
+    instrux_HINT_NOP42,
+    instrux_HINT_NOP43,
+    instrux_HINT_NOP44,
+    instrux_HINT_NOP45,
+    instrux_HINT_NOP46,
+    instrux_HINT_NOP47,
+    instrux_HINT_NOP48,
+    instrux_HINT_NOP49,
+    instrux_HINT_NOP50,
+    instrux_HINT_NOP51,
+    instrux_HINT_NOP52,
+    instrux_HINT_NOP53,
+    instrux_HINT_NOP54,
+    instrux_HINT_NOP55,
+    instrux_HINT_NOP56,
+    instrux_HINT_NOP57,
+    instrux_HINT_NOP58,
+    instrux_HINT_NOP59,
+    instrux_HINT_NOP60,
+    instrux_HINT_NOP61,
+    instrux_HINT_NOP62,
+    instrux_HINT_NOP63,
+};

_service:tar_scm:nasm-2.16.03.tar.xz/x86/insnsb.c Added

@@ -0,0 +1,6763 @@
+/* This file auto-generated from insns.dat by insns.pl - don't edit it */
+
+#include "nasm.h"
+#include "insns.h"
+
+const uint8_t nasm_bytecodes50335 = {
+    /*     0 */ 0241,0203,041,0301,01,0104,0120,01,0,0,
+    /*    10 */ 0240,0203,041,0301,01,0104,0110,01,0,0,
+    /*    20 */ 0241,0203,041,0301,01,0104,0120,01,01,0,
+    /*    30 */ 0240,0203,041,0301,01,0104,0110,01,01,0,
+    /*    40 */ 0241,0203,041,0301,01,0104,0120,01,020,0,
+    /*    50 */ 0240,0203,041,0301,01,0104,0110,01,020,0,
+    /*    60 */ 0241,0203,041,0301,01,0104,0120,01,021,0,
+    /*    70 */ 0240,0203,041,0301,01,0104,0110,01,021,0,
+    /*    80 */ 0241,0203,045,0301,01,0104,0120,01,0,0,
+    /*    90 */ 0240,0203,045,0301,01,0104,0110,01,0,0,
+    /*   100 */ 0241,0203,045,0301,01,0104,0120,01,01,0,
+    /*   110 */ 0240,0203,045,0301,01,0104,0110,01,01,0,
+    /*   120 */ 0241,0203,045,0301,01,0104,0120,01,020,0,
+    /*   130 */ 0240,0203,045,0301,01,0104,0110,01,020,0,
+    /*   140 */ 0241,0203,045,0301,01,0104,0120,01,021,0,
+    /*   150 */ 0240,0203,045,0301,01,0104,0110,01,021,0,
+    /*   160 */ 0241,0203,051,0301,01,0104,0120,01,0,0,
+    /*   170 */ 0240,0203,051,0301,01,0104,0110,01,0,0,
+    /*   180 */ 0241,0203,051,0301,01,0104,0120,01,01,0,
+    /*   190 */ 0240,0203,051,0301,01,0104,0110,01,01,0,
+    /*   200 */ 0241,0203,051,0301,01,0104,0120,01,020,0,
+    /*   210 */ 0240,0203,051,0301,01,0104,0110,01,020,0,
+    /*   220 */ 0241,0203,051,0301,01,0104,0120,01,021,0,
+    /*   230 */ 0240,0203,051,0301,01,0104,0110,01,021,0,
+    /*   240 */ 0241,0201,021,0301,01,0302,0120,01,0,0,
+    /*   250 */ 0241,0201,025,0301,01,0302,0120,01,0,0,
+    /*   260 */ 0241,0201,031,0301,01,0302,0120,01,0,0,
+    /*   270 */ 0241,0201,0,0301,01,0302,0120,01,0,0,
+    /*   280 */ 0241,0201,04,0301,01,0302,0120,01,0,0,
+    /*   290 */ 0241,0201,010,0301,01,0302,0120,01,0,0,
+    /*   300 */ 0241,0201,023,0306,01,0302,0120,01,0,0,
+    /*   310 */ 0241,0201,02,0306,01,0302,0120,01,0,0,
+    /*   320 */ 0241,0201,021,0301,01,0302,0120,01,01,0,
+    /*   330 */ 0241,0201,025,0301,01,0302,0120,01,01,0,
+    /*   340 */ 0241,0201,031,0301,01,0302,0120,01,01,0,
+    /*   350 */ 0241,0201,0,0301,01,0302,0120,01,01,0,
+    /*   360 */ 0241,0201,04,0301,01,0302,0120,01,01,0,
+    /*   370 */ 0241,0201,010,0301,01,0302,0120,01,01,0,
+    /*   380 */ 0241,0201,023,0306,01,0302,0120,01,01,0,
+    /*   390 */ 0241,0201,02,0306,01,0302,0120,01,01,0,
+    /*   400 */ 0241,0201,021,0301,01,0302,0120,01,02,0,
+    /*   410 */ 0241,0201,025,0301,01,0302,0120,01,02,0,
+    /*   420 */ 0241,0201,031,0301,01,0302,0120,01,02,0,
+    /*   430 */ 0241,0201,0,0301,01,0302,0120,01,02,0,
+    /*   440 */ 0241,0201,04,0301,01,0302,0120,01,02,0,
+    /*   450 */ 0241,0201,010,0301,01,0302,0120,01,02,0,
+    /*   460 */ 0241,0201,023,0306,01,0302,0120,01,02,0,
+    /*   470 */ 0241,0201,02,0306,01,0302,0120,01,02,0,
+    /*   480 */ 0241,0201,021,0301,01,0302,0120,01,03,0,
+    /*   490 */ 0241,0201,025,0301,01,0302,0120,01,03,0,
+    /*   500 */ 0241,0201,031,0301,01,0302,0120,01,03,0,
+    /*   510 */ 0241,0201,0,0301,01,0302,0120,01,03,0,
+    /*   520 */ 0241,0201,04,0301,01,0302,0120,01,03,0,
+    /*   530 */ 0241,0201,010,0301,01,0302,0120,01,03,0,
+    /*   540 */ 0241,0201,023,0306,01,0302,0120,01,03,0,
+    /*   550 */ 0241,0201,02,0306,01,0302,0120,01,03,0,
+    /*   560 */ 0241,0201,021,0301,01,0302,0120,01,04,0,
+    /*   570 */ 0241,0201,025,0301,01,0302,0120,01,04,0,
+    /*   580 */ 0241,0201,031,0301,01,0302,0120,01,04,0,
+    /*   590 */ 0241,0201,0,0301,01,0302,0120,01,04,0,
+    /*   600 */ 0241,0201,04,0301,01,0302,0120,01,04,0,
+    /*   610 */ 0241,0201,010,0301,01,0302,0120,01,04,0,
+    /*   620 */ 0241,0201,023,0306,01,0302,0120,01,04,0,
+    /*   630 */ 0241,0201,02,0306,01,0302,0120,01,04,0,
+    /*   640 */ 0241,0201,021,0301,01,0302,0120,01,05,0,
+    /*   650 */ 0241,0201,025,0301,01,0302,0120,01,05,0,
+    /*   660 */ 0241,0201,031,0301,01,0302,0120,01,05,0,
+    /*   670 */ 0241,0201,0,0301,01,0302,0120,01,05,0,
+    /*   680 */ 0241,0201,04,0301,01,0302,0120,01,05,0,
+    /*   690 */ 0241,0201,010,0301,01,0302,0120,01,05,0,
+    /*   700 */ 0241,0201,023,0306,01,0302,0120,01,05,0,
+    /*   710 */ 0241,0201,02,0306,01,0302,0120,01,05,0,
+    /*   720 */ 0241,0201,021,0301,01,0302,0120,01,06,0,
+    /*   730 */ 0241,0201,025,0301,01,0302,0120,01,06,0,
+    /*   740 */ 0241,0201,031,0301,01,0302,0120,01,06,0,
+    /*   750 */ 0241,0201,0,0301,01,0302,0120,01,06,0,
+    /*   760 */ 0241,0201,04,0301,01,0302,0120,01,06,0,
+    /*   770 */ 0241,0201,010,0301,01,0302,0120,01,06,0,
+    /*   780 */ 0241,0201,023,0306,01,0302,0120,01,06,0,
+    /*   790 */ 0241,0201,02,0306,01,0302,0120,01,06,0,
+    /*   800 */ 0241,0201,021,0301,01,0302,0120,01,07,0,
+    /*   810 */ 0241,0201,025,0301,01,0302,0120,01,07,0,
+    /*   820 */ 0241,0201,031,0301,01,0302,0120,01,07,0,
+    /*   830 */ 0241,0201,0,0301,01,0302,0120,01,07,0,
+    /*   840 */ 0241,0201,04,0301,01,0302,0120,01,07,0,
+    /*   850 */ 0241,0201,010,0301,01,0302,0120,01,07,0,
+    /*   860 */ 0241,0201,023,0306,01,0302,0120,01,07,0,
+    /*   870 */ 0241,0201,02,0306,01,0302,0120,01,07,0,
+    /*   880 */ 0241,0201,021,0301,01,0302,0120,01,010,0,
+    /*   890 */ 0241,0201,025,0301,01,0302,0120,01,010,0,
+    /*   900 */ 0241,0201,031,0301,01,0302,0120,01,010,0,
+    /*   910 */ 0241,0201,0,0301,01,0302,0120,01,010,0,
+    /*   920 */ 0241,0201,04,0301,01,0302,0120,01,010,0,
+    /*   930 */ 0241,0201,010,0301,01,0302,0120,01,010,0,
+    /*   940 */ 0241,0201,023,0306,01,0302,0120,01,010,0,
+    /*   950 */ 0241,0201,02,0306,01,0302,0120,01,010,0,
+    /*   960 */ 0241,0201,021,0301,01,0302,0120,01,011,0,
+    /*   970 */ 0241,0201,025,0301,01,0302,0120,01,011,0,
+    /*   980 */ 0241,0201,031,0301,01,0302,0120,01,011,0,
+    /*   990 */ 0241,0201,0,0301,01,0302,0120,01,011,0,
+    /*  1000 */ 0241,0201,04,0301,01,0302,0120,01,011,0,
+    /*  1010 */ 0241,0201,010,0301,01,0302,0120,01,011,0,
+    /*  1020 */ 0241,0201,023,0306,01,0302,0120,01,011,0,
+    /*  1030 */ 0241,0201,02,0306,01,0302,0120,01,011,0,
+    /*  1040 */ 0241,0201,021,0301,01,0302,0120,01,012,0,
+    /*  1050 */ 0241,0201,025,0301,01,0302,0120,01,012,0,
+    /*  1060 */ 0241,0201,031,0301,01,0302,0120,01,012,0,
+    /*  1070 */ 0241,0201,0,0301,01,0302,0120,01,012,0,
+    /*  1080 */ 0241,0201,04,0301,01,0302,0120,01,012,0,
+    /*  1090 */ 0241,0201,010,0301,01,0302,0120,01,012,0,
+    /*  1100 */ 0241,0201,023,0306,01,0302,0120,01,012,0,
+    /*  1110 */ 0241,0201,02,0306,01,0302,0120,01,012,0,
+    /*  1120 */ 0241,0201,021,0301,01,0302,0120,01,013,0,
+    /*  1130 */ 0241,0201,025,0301,01,0302,0120,01,013,0,
+    /*  1140 */ 0241,0201,031,0301,01,0302,0120,01,013,0,
+    /*  1150 */ 0241,0201,0,0301,01,0302,0120,01,013,0,
+    /*  1160 */ 0241,0201,04,0301,01,0302,0120,01,013,0,
+    /*  1170 */ 0241,0201,010,0301,01,0302,0120,01,013,0,
+    /*  1180 */ 0241,0201,023,0306,01,0302,0120,01,013,0,
+    /*  1190 */ 0241,0201,02,0306,01,0302,0120,01,013,0,
+    /*  1200 */ 0241,0201,021,0301,01,0302,0120,01,014,0,
+    /*  1210 */ 0241,0201,025,0301,01,0302,0120,01,014,0,
+    /*  1220 */ 0241,0201,031,0301,01,0302,0120,01,014,0,
+    /*  1230 */ 0241,0201,0,0301,01,0302,0120,01,014,0,
+    /*  1240 */ 0241,0201,04,0301,01,0302,0120,01,014,0,
+    /*  1250 */ 0241,0201,010,0301,01,0302,0120,01,014,0,
+    /*  1260 */ 0241,0201,023,0306,01,0302,0120,01,014,0,
+    /*  1270 */ 0241,0201,02,0306,01,0302,0120,01,014,0,
+    /*  1280 */ 0241,0201,021,0301,01,0302,0120,01,015,0,
+    /*  1290 */ 0241,0201,025,0301,01,0302,0120,01,015,0,
+    /*  1300 */ 0241,0201,031,0301,01,0302,0120,01,015,0,
+    /*  1310 */ 0241,0201,0,0301,01,0302,0120,01,015,0,
+    /*  1320 */ 0241,0201,04,0301,01,0302,0120,01,015,0,
+    /*  1330 */ 0241,0201,010,0301,01,0302,0120,01,015,0,
+    /*  1340 */ 0241,0201,023,0306,01,0302,0120,01,015,0,
+    /*  1350 */ 0241,0201,02,0306,01,0302,0120,01,015,0,
+    /*  1360 */ 0241,0201,021,0301,01,0302,0120,01,016,0,
+    /*  1370 */ 0241,0201,025,0301,01,0302,0120,01,016,0,
+    /*  1380 */ 0241,0201,031,0301,01,0302,0120,01,016,0,
+    /*  1390 */ 0241,0201,0,0301,01,0302,0120,01,016,0,
+    /*  1400 */ 0241,0201,04,0301,01,0302,0120,01,016,0,
+    /*  1410 */ 0241,0201,010,0301,01,0302,0120,01,016,0,
+    /*  1420 */ 0241,0201,023,0306,01,0302,0120,01,016,0,
+    /*  1430 */ 0241,0201,02,0306,01,0302,0120,01,016,0,
+    /*  1440 */ 0241,0201,021,0301,01,0302,0120,01,017,0,
+    /*  1450 */ 0241,0201,025,0301,01,0302,0120,01,017,0,
+    /*  1460 */ 0241,0201,031,0301,01,0302,0120,01,017,0,
+    /*  1470 */ 0241,0201,0,0301,01,0302,0120,01,017,0,
+    /*  1480 */ 0241,0201,04,0301,01,0302,0120,01,017,0,
+    /*  1490 */ 0241,0201,010,0301,01,0302,0120,01,017,0,
+    /*  1500 */ 0241,0201,023,0306,01,0302,0120,01,017,0,
+    /*  1510 */ 0241,0201,02,0306,01,0302,0120,01,017,0,
+    /*  1520 */ 0241,0201,021,0301,01,0302,0120,01,020,0,
+    /*  1530 */ 0241,0201,025,0301,01,0302,0120,01,020,0,
+    /*  1540 */ 0241,0201,031,0301,01,0302,0120,01,020,0,
+    /*  1550 */ 0241,0201,0,0301,01,0302,0120,01,020,0,
+    /*  1560 */ 0241,0201,04,0301,01,0302,0120,01,020,0,
+    /*  1570 */ 0241,0201,010,0301,01,0302,0120,01,020,0,
+    /*  1580 */ 0241,0201,023,0306,01,0302,0120,01,020,0,
+    /*  1590 */ 0241,0201,02,0306,01,0302,0120,01,020,0,
+    /*  1600 */ 0241,0201,021,0301,01,0302,0120,01,021,0,
+    /*  1610 */ 0241,0201,025,0301,01,0302,0120,01,021,0,
+    /*  1620 */ 0241,0201,031,0301,01,0302,0120,01,021,0,
+    /*  1630 */ 0241,0201,0,0301,01,0302,0120,01,021,0,
+    /*  1640 */ 0241,0201,04,0301,01,0302,0120,01,021,0,
+    /*  1650 */ 0241,0201,010,0301,01,0302,0120,01,021,0,
+    /*  1660 */ 0241,0201,023,0306,01,0302,0120,01,021,0,
+    /*  1670 */ 0241,0201,02,0306,01,0302,0120,01,021,0,
+    /*  1680 */ 0241,0201,021,0301,01,0302,0120,01,022,0,
+    /*  1690 */ 0241,0201,025,0301,01,0302,0120,01,022,0,
+    /*  1700 */ 0241,0201,031,0301,01,0302,0120,01,022,0,
+    /*  1710 */ 0241,0201,0,0301,01,0302,0120,01,022,0,
+    /*  1720 */ 0241,0201,04,0301,01,0302,0120,01,022,0,
+    /*  1730 */ 0241,0201,010,0301,01,0302,0120,01,022,0,
+    /*  1740 */ 0241,0201,023,0306,01,0302,0120,01,022,0,
+    /*  1750 */ 0241,0201,02,0306,01,0302,0120,01,022,0,
+    /*  1760 */ 0241,0201,021,0301,01,0302,0120,01,023,0,
+    /*  1770 */ 0241,0201,025,0301,01,0302,0120,01,023,0,
+    /*  1780 */ 0241,0201,031,0301,01,0302,0120,01,023,0,
+    /*  1790 */ 0241,0201,0,0301,01,0302,0120,01,023,0,
+    /*  1800 */ 0241,0201,04,0301,01,0302,0120,01,023,0,
+    /*  1810 */ 0241,0201,010,0301,01,0302,0120,01,023,0,
+    /*  1820 */ 0241,0201,023,0306,01,0302,0120,01,023,0,
+    /*  1830 */ 0241,0201,02,0306,01,0302,0120,01,023,0,
+    /*  1840 */ 0241,0201,021,0301,01,0302,0120,01,024,0,
+    /*  1850 */ 0241,0201,025,0301,01,0302,0120,01,024,0,
+    /*  1860 */ 0241,0201,031,0301,01,0302,0120,01,024,0,
+    /*  1870 */ 0241,0201,0,0301,01,0302,0120,01,024,0,
+    /*  1880 */ 0241,0201,04,0301,01,0302,0120,01,024,0,
+    /*  1890 */ 0241,0201,010,0301,01,0302,0120,01,024,0,
+    /*  1900 */ 0241,0201,023,0306,01,0302,0120,01,024,0,
+    /*  1910 */ 0241,0201,02,0306,01,0302,0120,01,024,0,
+    /*  1920 */ 0241,0201,021,0301,01,0302,0120,01,025,0,
+    /*  1930 */ 0241,0201,025,0301,01,0302,0120,01,025,0,
+    /*  1940 */ 0241,0201,031,0301,01,0302,0120,01,025,0,
+    /*  1950 */ 0241,0201,0,0301,01,0302,0120,01,025,0,
+    /*  1960 */ 0241,0201,04,0301,01,0302,0120,01,025,0,
+    /*  1970 */ 0241,0201,010,0301,01,0302,0120,01,025,0,
+    /*  1980 */ 0241,0201,023,0306,01,0302,0120,01,025,0,
+    /*  1990 */ 0241,0201,02,0306,01,0302,0120,01,025,0,
+    /*  2000 */ 0241,0201,021,0301,01,0302,0120,01,026,0,
+    /*  2010 */ 0241,0201,025,0301,01,0302,0120,01,026,0,
+    /*  2020 */ 0241,0201,031,0301,01,0302,0120,01,026,0,
+    /*  2030 */ 0241,0201,0,0301,01,0302,0120,01,026,0,
+    /*  2040 */ 0241,0201,04,0301,01,0302,0120,01,026,0,
+    /*  2050 */ 0241,0201,010,0301,01,0302,0120,01,026,0,
+    /*  2060 */ 0241,0201,023,0306,01,0302,0120,01,026,0,
+    /*  2070 */ 0241,0201,02,0306,01,0302,0120,01,026,0,
+    /*  2080 */ 0241,0201,021,0301,01,0302,0120,01,027,0,
+    /*  2090 */ 0241,0201,025,0301,01,0302,0120,01,027,0,
+    /*  2100 */ 0241,0201,031,0301,01,0302,0120,01,027,0,
+    /*  2110 */ 0241,0201,0,0301,01,0302,0120,01,027,0,
+    /*  2120 */ 0241,0201,04,0301,01,0302,0120,01,027,0,
+    /*  2130 */ 0241,0201,010,0301,01,0302,0120,01,027,0,
+    /*  2140 */ 0241,0201,023,0306,01,0302,0120,01,027,0,
+    /*  2150 */ 0241,0201,02,0306,01,0302,0120,01,027,0,
+    /*  2160 */ 0241,0201,021,0301,01,0302,0120,01,030,0,
+    /*  2170 */ 0241,0201,025,0301,01,0302,0120,01,030,0,
+    /*  2180 */ 0241,0201,031,0301,01,0302,0120,01,030,0,
+    /*  2190 */ 0241,0201,0,0301,01,0302,0120,01,030,0,
+    /*  2200 */ 0241,0201,04,0301,01,0302,0120,01,030,0,
+    /*  2210 */ 0241,0201,010,0301,01,0302,0120,01,030,0,
+    /*  2220 */ 0241,0201,023,0306,01,0302,0120,01,030,0,
+    /*  2230 */ 0241,0201,02,0306,01,0302,0120,01,030,0,
+    /*  2240 */ 0241,0201,021,0301,01,0302,0120,01,031,0,
+    /*  2250 */ 0241,0201,025,0301,01,0302,0120,01,031,0,
+    /*  2260 */ 0241,0201,031,0301,01,0302,0120,01,031,0,
+    /*  2270 */ 0241,0201,0,0301,01,0302,0120,01,031,0,
+    /*  2280 */ 0241,0201,04,0301,01,0302,0120,01,031,0,
+    /*  2290 */ 0241,0201,010,0301,01,0302,0120,01,031,0,
+    /*  2300 */ 0241,0201,023,0306,01,0302,0120,01,031,0,
+    /*  2310 */ 0241,0201,02,0306,01,0302,0120,01,031,0,
+    /*  2320 */ 0241,0201,021,0301,01,0302,0120,01,032,0,
+    /*  2330 */ 0241,0201,025,0301,01,0302,0120,01,032,0,
+    /*  2340 */ 0241,0201,031,0301,01,0302,0120,01,032,0,
+    /*  2350 */ 0241,0201,0,0301,01,0302,0120,01,032,0,
+    /*  2360 */ 0241,0201,04,0301,01,0302,0120,01,032,0,
+    /*  2370 */ 0241,0201,010,0301,01,0302,0120,01,032,0,
+    /*  2380 */ 0241,0201,023,0306,01,0302,0120,01,032,0,
+    /*  2390 */ 0241,0201,02,0306,01,0302,0120,01,032,0,
+    /*  2400 */ 0241,0201,021,0301,01,0302,0120,01,033,0,
+    /*  2410 */ 0241,0201,025,0301,01,0302,0120,01,033,0,
+    /*  2420 */ 0241,0201,031,0301,01,0302,0120,01,033,0,
+    /*  2430 */ 0241,0201,0,0301,01,0302,0120,01,033,0,
+    /*  2440 */ 0241,0201,04,0301,01,0302,0120,01,033,0,
+    /*  2450 */ 0241,0201,010,0301,01,0302,0120,01,033,0,
+    /*  2460 */ 0241,0201,023,0306,01,0302,0120,01,033,0,
+    /*  2470 */ 0241,0201,02,0306,01,0302,0120,01,033,0,
+    /*  2480 */ 0241,0201,021,0301,01,0302,0120,01,034,0,
+    /*  2490 */ 0241,0201,025,0301,01,0302,0120,01,034,0,
+    /*  2500 */ 0241,0201,031,0301,01,0302,0120,01,034,0,
+    /*  2510 */ 0241,0201,0,0301,01,0302,0120,01,034,0,
+    /*  2520 */ 0241,0201,04,0301,01,0302,0120,01,034,0,
+    /*  2530 */ 0241,0201,010,0301,01,0302,0120,01,034,0,
+    /*  2540 */ 0241,0201,023,0306,01,0302,0120,01,034,0,
+    /*  2550 */ 0241,0201,02,0306,01,0302,0120,01,034,0,
+    /*  2560 */ 0241,0201,021,0301,01,0302,0120,01,035,0,
+    /*  2570 */ 0241,0201,025,0301,01,0302,0120,01,035,0,
+    /*  2580 */ 0241,0201,031,0301,01,0302,0120,01,035,0,
+    /*  2590 */ 0241,0201,0,0301,01,0302,0120,01,035,0,
+    /*  2600 */ 0241,0201,04,0301,01,0302,0120,01,035,0,
+    /*  2610 */ 0241,0201,010,0301,01,0302,0120,01,035,0,
+    /*  2620 */ 0241,0201,023,0306,01,0302,0120,01,035,0,
+    /*  2630 */ 0241,0201,02,0306,01,0302,0120,01,035,0,
+    /*  2640 */ 0241,0201,021,0301,01,0302,0120,01,036,0,
+    /*  2650 */ 0241,0201,025,0301,01,0302,0120,01,036,0,
+    /*  2660 */ 0241,0201,031,0301,01,0302,0120,01,036,0,
+    /*  2670 */ 0241,0201,0,0301,01,0302,0120,01,036,0,
+    /*  2680 */ 0241,0201,04,0301,01,0302,0120,01,036,0,
+    /*  2690 */ 0241,0201,010,0301,01,0302,0120,01,036,0,
+    /*  2700 */ 0241,0201,023,0306,01,0302,0120,01,036,0,
+    /*  2710 */ 0241,0201,02,0306,01,0302,0120,01,036,0,
+    /*  2720 */ 0241,0201,021,0301,01,0302,0120,01,037,0,
+    /*  2730 */ 0241,0201,025,0301,01,0302,0120,01,037,0,
+    /*  2740 */ 0241,0201,031,0301,01,0302,0120,01,037,0,
+    /*  2750 */ 0241,0201,0,0301,01,0302,0120,01,037,0,
+    /*  2760 */ 0241,0201,04,0301,01,0302,0120,01,037,0,
+    /*  2770 */ 0241,0201,010,0301,01,0302,0120,01,037,0,
+    /*  2780 */ 0241,0201,023,0306,01,0302,0120,01,037,0,
+    /*  2790 */ 0241,0201,02,0306,01,0302,0120,01,037,0,
+    /*  2800 */ 0241,0203,01,0303,01,077,0120,01,0,0,
+    /*  2810 */ 0241,0203,05,0303,01,077,0120,01,0,0,
+    /*  2820 */ 0241,0203,011,0303,01,077,0120,01,0,0,
+    /*  2830 */ 0241,0203,01,0301,01,037,0120,01,0,0,
+    /*  2840 */ 0241,0203,05,0301,01,037,0120,01,0,0,
+    /*  2850 */ 0241,0203,011,0301,01,037,0120,01,0,0,
+    /*  2860 */ 0241,0203,021,0301,01,037,0120,01,0,0,
+    /*  2870 */ 0241,0203,025,0301,01,037,0120,01,0,0,
+    /*  2880 */ 0241,0203,031,0301,01,037,0120,01,0,0,
+    /*  2890 */ 0241,0203,01,0303,01,076,0120,01,0,0,
+    /*  2900 */ 0241,0203,05,0303,01,076,0120,01,0,0,
+    /*  2910 */ 0241,0203,011,0303,01,076,0120,01,0,0,
+    /*  2920 */ 0241,0203,01,0301,01,036,0120,01,0,0,
+    /*  2930 */ 0241,0203,05,0301,01,036,0120,01,0,0,
+    /*  2940 */ 0241,0203,011,0301,01,036,0120,01,0,0,
+    /*  2950 */ 0241,0203,021,0301,01,036,0120,01,0,0,
+    /*  2960 */ 0241,0203,025,0301,01,036,0120,01,0,0,
+    /*  2970 */ 0241,0203,031,0301,01,036,0120,01,0,0,
+    /*  2980 */ 0241,0203,021,0303,01,076,0120,01,0,0,
+    /*  2990 */ 0241,0203,025,0303,01,076,0120,01,0,0,
+    /*  3000 */ 0241,0203,031,0303,01,076,0120,01,0,0,
+    /*  3010 */ 0241,0203,021,0303,01,077,0120,01,0,0,
+    /*  3020 */ 0241,0203,025,0303,01,077,0120,01,0,0,
+    /*  3030 */ 0241,0203,031,0303,01,077,0120,01,0,0,
+    /*  3040 */ 0241,0203,01,0303,01,077,0120,01,05,0,
+    /*  3050 */ 0241,0203,05,0303,01,077,0120,01,05,0,
+    /*  3060 */ 0241,0203,011,0303,01,077,0120,01,05,0,
+    /*  3070 */ 0241,0203,01,0301,01,037,0120,01,05,0,
+    /*  3080 */ 0241,0203,05,0301,01,037,0120,01,05,0,
+    /*  3090 */ 0241,0203,011,0301,01,037,0120,01,05,0,
+    /*  3100 */ 0241,0203,021,0301,01,037,0120,01,05,0,
+    /*  3110 */ 0241,0203,025,0301,01,037,0120,01,05,0,
+    /*  3120 */ 0241,0203,031,0301,01,037,0120,01,05,0,
+    /*  3130 */ 0241,0203,01,0303,01,076,0120,01,05,0,
+    /*  3140 */ 0241,0203,05,0303,01,076,0120,01,05,0,
+    /*  3150 */ 0241,0203,011,0303,01,076,0120,01,05,0,
+    /*  3160 */ 0241,0203,01,0301,01,036,0120,01,05,0,
+    /*  3170 */ 0241,0203,05,0301,01,036,0120,01,05,0,
+    /*  3180 */ 0241,0203,011,0301,01,036,0120,01,05,0,
+    /*  3190 */ 0241,0203,021,0301,01,036,0120,01,05,0,
+    /*  3200 */ 0241,0203,025,0301,01,036,0120,01,05,0,
+    /*  3210 */ 0241,0203,031,0301,01,036,0120,01,05,0,
+    /*  3220 */ 0241,0203,021,0303,01,076,0120,01,05,0,
+    /*  3230 */ 0241,0203,025,0303,01,076,0120,01,05,0,
+    /*  3240 */ 0241,0203,031,0303,01,076,0120,01,05,0,
+    /*  3250 */ 0241,0203,021,0303,01,077,0120,01,05,0,
+    /*  3260 */ 0241,0203,025,0303,01,077,0120,01,05,0,
+    /*  3270 */ 0241,0203,031,0303,01,077,0120,01,05,0,
+    /*  3280 */ 0241,0203,01,0303,01,077,0120,01,06,0,
+    /*  3290 */ 0241,0203,05,0303,01,077,0120,01,06,0,
+    /*  3300 */ 0241,0203,011,0303,01,077,0120,01,06,0,
+    /*  3310 */ 0241,0203,01,0301,01,037,0120,01,06,0,
+    /*  3320 */ 0241,0203,05,0301,01,037,0120,01,06,0,
+    /*  3330 */ 0241,0203,011,0301,01,037,0120,01,06,0,
+    /*  3340 */ 0241,0203,021,0301,01,037,0120,01,06,0,
+    /*  3350 */ 0241,0203,025,0301,01,037,0120,01,06,0,
+    /*  3360 */ 0241,0203,031,0301,01,037,0120,01,06,0,
+    /*  3370 */ 0241,0203,01,0303,01,076,0120,01,06,0,
+    /*  3380 */ 0241,0203,05,0303,01,076,0120,01,06,0,
+    /*  3390 */ 0241,0203,011,0303,01,076,0120,01,06,0,
+    /*  3400 */ 0241,0203,01,0301,01,036,0120,01,06,0,
+    /*  3410 */ 0241,0203,05,0301,01,036,0120,01,06,0,
+    /*  3420 */ 0241,0203,011,0301,01,036,0120,01,06,0,
+    /*  3430 */ 0241,0203,021,0301,01,036,0120,01,06,0,
+    /*  3440 */ 0241,0203,025,0301,01,036,0120,01,06,0,
+    /*  3450 */ 0241,0203,031,0301,01,036,0120,01,06,0,
+    /*  3460 */ 0241,0203,021,0303,01,076,0120,01,06,0,
+    /*  3470 */ 0241,0203,025,0303,01,076,0120,01,06,0,
+    /*  3480 */ 0241,0203,031,0303,01,076,0120,01,06,0,
+    /*  3490 */ 0241,0203,021,0303,01,077,0120,01,06,0,
+    /*  3500 */ 0241,0203,025,0303,01,077,0120,01,06,0,
+    /*  3510 */ 0241,0203,031,0303,01,077,0120,01,06,0,
+    /*  3520 */ 0241,0203,01,0303,01,077,0120,01,02,0,
+    /*  3530 */ 0241,0203,05,0303,01,077,0120,01,02,0,
+    /*  3540 */ 0241,0203,011,0303,01,077,0120,01,02,0,
+    /*  3550 */ 0241,0203,01,0301,01,037,0120,01,02,0,
+    /*  3560 */ 0241,0203,05,0301,01,037,0120,01,02,0,
+    /*  3570 */ 0241,0203,011,0301,01,037,0120,01,02,0,
+    /*  3580 */ 0241,0203,021,0301,01,037,0120,01,02,0,
+    /*  3590 */ 0241,0203,025,0301,01,037,0120,01,02,0,
+    /*  3600 */ 0241,0203,031,0301,01,037,0120,01,02,0,
+    /*  3610 */ 0241,0203,01,0303,01,076,0120,01,02,0,
+    /*  3620 */ 0241,0203,05,0303,01,076,0120,01,02,0,
+    /*  3630 */ 0241,0203,011,0303,01,076,0120,01,02,0,
+    /*  3640 */ 0241,0203,01,0301,01,036,0120,01,02,0,
+    /*  3650 */ 0241,0203,05,0301,01,036,0120,01,02,0,
+    /*  3660 */ 0241,0203,011,0301,01,036,0120,01,02,0,
+    /*  3670 */ 0241,0203,021,0301,01,036,0120,01,02,0,
+    /*  3680 */ 0241,0203,025,0301,01,036,0120,01,02,0,
+    /*  3690 */ 0241,0203,031,0301,01,036,0120,01,02,0,
+    /*  3700 */ 0241,0203,021,0303,01,076,0120,01,02,0,
+    /*  3710 */ 0241,0203,025,0303,01,076,0120,01,02,0,
+    /*  3720 */ 0241,0203,031,0303,01,076,0120,01,02,0,
+    /*  3730 */ 0241,0203,021,0303,01,077,0120,01,02,0,
+    /*  3740 */ 0241,0203,025,0303,01,077,0120,01,02,0,
+    /*  3750 */ 0241,0203,031,0303,01,077,0120,01,02,0,
+    /*  3760 */ 0241,0203,01,0303,01,077,0120,01,01,0,
+    /*  3770 */ 0241,0203,05,0303,01,077,0120,01,01,0,
+    /*  3780 */ 0241,0203,011,0303,01,077,0120,01,01,0,
+    /*  3790 */ 0241,0203,01,0301,01,037,0120,01,01,0,
+    /*  3800 */ 0241,0203,05,0301,01,037,0120,01,01,0,
+    /*  3810 */ 0241,0203,011,0301,01,037,0120,01,01,0,
+    /*  3820 */ 0241,0203,021,0301,01,037,0120,01,01,0,
+    /*  3830 */ 0241,0203,025,0301,01,037,0120,01,01,0,
+    /*  3840 */ 0241,0203,031,0301,01,037,0120,01,01,0,
+    /*  3850 */ 0241,0203,01,0303,01,076,0120,01,01,0,
+    /*  3860 */ 0241,0203,05,0303,01,076,0120,01,01,0,
+    /*  3870 */ 0241,0203,011,0303,01,076,0120,01,01,0,
+    /*  3880 */ 0241,0203,01,0301,01,036,0120,01,01,0,
+    /*  3890 */ 0241,0203,05,0301,01,036,0120,01,01,0,
+    /*  3900 */ 0241,0203,011,0301,01,036,0120,01,01,0,
+    /*  3910 */ 0241,0203,021,0301,01,036,0120,01,01,0,
+    /*  3920 */ 0241,0203,025,0301,01,036,0120,01,01,0,
+    /*  3930 */ 0241,0203,031,0301,01,036,0120,01,01,0,
+    /*  3940 */ 0241,0203,021,0303,01,076,0120,01,01,0,
+    /*  3950 */ 0241,0203,025,0303,01,076,0120,01,01,0,
+    /*  3960 */ 0241,0203,031,0303,01,076,0120,01,01,0,
+    /*  3970 */ 0241,0203,021,0303,01,077,0120,01,01,0,
+    /*  3980 */ 0241,0203,025,0303,01,077,0120,01,01,0,
+    /*  3990 */ 0241,0203,031,0303,01,077,0120,01,01,0,
+    /*  4000 */ 0241,0203,01,0303,01,077,0120,01,04,0,
+    /*  4010 */ 0241,0203,05,0303,01,077,0120,01,04,0,
+    /*  4020 */ 0241,0203,011,0303,01,077,0120,01,04,0,
+    /*  4030 */ 0241,0203,01,0301,01,037,0120,01,04,0,
+    /*  4040 */ 0241,0203,05,0301,01,037,0120,01,04,0,
+    /*  4050 */ 0241,0203,011,0301,01,037,0120,01,04,0,
+    /*  4060 */ 0241,0203,021,0301,01,037,0120,01,04,0,
+    /*  4070 */ 0241,0203,025,0301,01,037,0120,01,04,0,
+    /*  4080 */ 0241,0203,031,0301,01,037,0120,01,04,0,
+    /*  4090 */ 0241,0203,01,0303,01,076,0120,01,04,0,
+    /*  4100 */ 0241,0203,05,0303,01,076,0120,01,04,0,
+    /*  4110 */ 0241,0203,011,0303,01,076,0120,01,04,0,
+    /*  4120 */ 0241,0203,01,0301,01,036,0120,01,04,0,
+    /*  4130 */ 0241,0203,05,0301,01,036,0120,01,04,0,
+    /*  4140 */ 0241,0203,011,0301,01,036,0120,01,04,0,
+    /*  4150 */ 0241,0203,021,0301,01,036,0120,01,04,0,
+    /*  4160 */ 0241,0203,025,0301,01,036,0120,01,04,0,
+    /*  4170 */ 0241,0203,031,0301,01,036,0120,01,04,0,
+    /*  4180 */ 0241,0203,021,0303,01,076,0120,01,04,0,
+    /*  4190 */ 0241,0203,025,0303,01,076,0120,01,04,0,
+    /*  4200 */ 0241,0203,031,0303,01,076,0120,01,04,0,
+    /*  4210 */ 0241,0203,021,0303,01,077,0120,01,04,0,
+    /*  4220 */ 0241,0203,025,0303,01,077,0120,01,04,0,
+    /*  4230 */ 0241,0203,031,0303,01,077,0120,01,04,0,
+    /*  4240 */ 0324,0361,03,017,072,027,0101,026,0,
+    /*  4249 */ 0323,0361,03,017,072,024,0101,026,0,
+    /*  4258 */ 0317,0361,03,017,072,026,0101,026,0,
+    /*  4267 */ 0324,0361,03,017,072,026,0101,026,0,
+    /*  4276 */ 0324,0361,03,017,072,025,0101,026,0,
+    /*  4285 */ 0325,0361,03,017,072,040,0110,026,0,
+    /*  4294 */ 0317,0361,03,017,072,042,0110,026,0,
+    /*  4303 */ 0324,0361,03,017,072,042,0110,026,0,
+    /*  4312 */ 0261,01,041,01,0302,0120,01,020,0,
+    /*  4321 */ 0260,01,041,01,0302,0110,01,020,0,
+    /*  4330 */ 0261,01,045,01,0302,0120,01,020,0,
+    /*  4339 */ 0260,01,045,01,0302,0110,01,020,0,
+    /*  4348 */ 0261,01,041,01,0302,0120,01,0,0,
+    /*  4357 */ 0260,01,041,01,0302,0110,01,0,0,
+    /*  4366 */ 0261,01,045,01,0302,0120,01,0,0,
+    /*  4375 */ 0260,01,045,01,0302,0110,01,0,0,
+    /*  4384 */ 0261,01,041,01,0302,0120,01,01,0,
+    /*  4393 */ 0260,01,041,01,0302,0110,01,01,0,
+    /*  4402 */ 0261,01,045,01,0302,0120,01,01,0,
+    /*  4411 */ 0260,01,045,01,0302,0110,01,01,0,
+    /*  4420 */ 0261,01,041,01,0302,0120,01,02,0,
+    /*  4429 */ 0260,01,041,01,0302,0110,01,02,0,
+    /*  4438 */ 0261,01,045,01,0302,0120,01,02,0,
+    /*  4447 */ 0260,01,045,01,0302,0110,01,02,0,
+    /*  4456 */ 0261,01,041,01,0302,0120,01,03,0,
+    /*  4465 */ 0260,01,041,01,0302,0110,01,03,0,
+    /*  4474 */ 0261,01,045,01,0302,0120,01,03,0,
+    /*  4483 */ 0260,01,045,01,0302,0110,01,03,0,
+    /*  4492 */ 0261,01,041,01,0302,0120,01,04,0,
+    /*  4501 */ 0260,01,041,01,0302,0110,01,04,0,
+    /*  4510 */ 0261,01,045,01,0302,0120,01,04,0,
+    /*  4519 */ 0260,01,045,01,0302,0110,01,04,0,
+    /*  4528 */ 0261,01,041,01,0302,0120,01,05,0,
+    /*  4537 */ 0260,01,041,01,0302,0110,01,05,0,
+    /*  4546 */ 0261,01,045,01,0302,0120,01,05,0,
+    /*  4555 */ 0260,01,045,01,0302,0110,01,05,0,
+    /*  4564 */ 0261,01,041,01,0302,0120,01,06,0,
+    /*  4573 */ 0260,01,041,01,0302,0110,01,06,0,
+    /*  4582 */ 0261,01,045,01,0302,0120,01,06,0,
+    /*  4591 */ 0260,01,045,01,0302,0110,01,06,0,
+    /*  4600 */ 0261,01,041,01,0302,0120,01,07,0,
+    /*  4609 */ 0260,01,041,01,0302,0110,01,07,0,
+    /*  4618 */ 0261,01,045,01,0302,0120,01,07,0,
+    /*  4627 */ 0260,01,045,01,0302,0110,01,07,0,
+    /*  4636 */ 0261,01,041,01,0302,0120,01,010,0,
+    /*  4645 */ 0260,01,041,01,0302,0110,01,010,0,
+    /*  4654 */ 0261,01,045,01,0302,0120,01,010,0,
+    /*  4663 */ 0260,01,045,01,0302,0110,01,010,0,
+    /*  4672 */ 0261,01,041,01,0302,0120,01,011,0,
+    /*  4681 */ 0260,01,041,01,0302,0110,01,011,0,
+    /*  4690 */ 0261,01,045,01,0302,0120,01,011,0,
+    /*  4699 */ 0260,01,045,01,0302,0110,01,011,0,
+    /*  4708 */ 0261,01,041,01,0302,0120,01,012,0,
+    /*  4717 */ 0260,01,041,01,0302,0110,01,012,0,
+    /*  4726 */ 0261,01,045,01,0302,0120,01,012,0,
+    /*  4735 */ 0260,01,045,01,0302,0110,01,012,0,
+    /*  4744 */ 0261,01,041,01,0302,0120,01,013,0,
+    /*  4753 */ 0260,01,041,01,0302,0110,01,013,0,
+    /*  4762 */ 0261,01,045,01,0302,0120,01,013,0,
+    /*  4771 */ 0260,01,045,01,0302,0110,01,013,0,
+    /*  4780 */ 0261,01,041,01,0302,0120,01,014,0,
+    /*  4789 */ 0260,01,041,01,0302,0110,01,014,0,
+    /*  4798 */ 0261,01,045,01,0302,0120,01,014,0,
+    /*  4807 */ 0260,01,045,01,0302,0110,01,014,0,
+    /*  4816 */ 0261,01,041,01,0302,0120,01,015,0,
+    /*  4825 */ 0260,01,041,01,0302,0110,01,015,0,
+    /*  4834 */ 0261,01,045,01,0302,0120,01,015,0,
+    /*  4843 */ 0260,01,045,01,0302,0110,01,015,0,
+    /*  4852 */ 0261,01,041,01,0302,0120,01,016,0,
+    /*  4861 */ 0260,01,041,01,0302,0110,01,016,0,
+    /*  4870 */ 0261,01,045,01,0302,0120,01,016,0,
+    /*  4879 */ 0260,01,045,01,0302,0110,01,016,0,
+    /*  4888 */ 0261,01,041,01,0302,0120,01,017,0,
+    /*  4897 */ 0260,01,041,01,0302,0110,01,017,0,
+    /*  4906 */ 0261,01,045,01,0302,0120,01,017,0,
+    /*  4915 */ 0260,01,045,01,0302,0110,01,017,0,
+    /*  4924 */ 0261,01,041,01,0302,0120,01,021,0,
+    /*  4933 */ 0260,01,041,01,0302,0110,01,021,0,
+    /*  4942 */ 0261,01,045,01,0302,0120,01,021,0,
+    /*  4951 */ 0260,01,045,01,0302,0110,01,021,0,
+    /*  4960 */ 0261,01,041,01,0302,0120,01,022,0,
+    /*  4969 */ 0260,01,041,01,0302,0110,01,022,0,
+    /*  4978 */ 0261,01,045,01,0302,0120,01,022,0,
+    /*  4987 */ 0260,01,045,01,0302,0110,01,022,0,
+    /*  4996 */ 0261,01,041,01,0302,0120,01,023,0,
+    /*  5005 */ 0260,01,041,01,0302,0110,01,023,0,
+    /*  5014 */ 0261,01,045,01,0302,0120,01,023,0,
+    /*  5023 */ 0260,01,045,01,0302,0110,01,023,0,
+    /*  5032 */ 0261,01,041,01,0302,0120,01,024,0,
+    /*  5041 */ 0260,01,041,01,0302,0110,01,024,0,
+    /*  5050 */ 0261,01,045,01,0302,0120,01,024,0,
+    /*  5059 */ 0260,01,045,01,0302,0110,01,024,0,
+    /*  5068 */ 0261,01,041,01,0302,0120,01,025,0,
+    /*  5077 */ 0260,01,041,01,0302,0110,01,025,0,
+    /*  5086 */ 0261,01,045,01,0302,0120,01,025,0,
+    /*  5095 */ 0260,01,045,01,0302,0110,01,025,0,
+    /*  5104 */ 0261,01,041,01,0302,0120,01,026,0,
+    /*  5113 */ 0260,01,041,01,0302,0110,01,026,0,
+    /*  5122 */ 0261,01,045,01,0302,0120,01,026,0,
+    /*  5131 */ 0260,01,045,01,0302,0110,01,026,0,
+    /*  5140 */ 0261,01,041,01,0302,0120,01,027,0,
+    /*  5149 */ 0260,01,041,01,0302,0110,01,027,0,
+    /*  5158 */ 0261,01,045,01,0302,0120,01,027,0,
+    /*  5167 */ 0260,01,045,01,0302,0110,01,027,0,
+    /*  5176 */ 0261,01,041,01,0302,0120,01,030,0,
+    /*  5185 */ 0260,01,041,01,0302,0110,01,030,0,
+    /*  5194 */ 0261,01,045,01,0302,0120,01,030,0,
+    /*  5203 */ 0260,01,045,01,0302,0110,01,030,0,
+    /*  5212 */ 0261,01,041,01,0302,0120,01,031,0,
+    /*  5221 */ 0260,01,041,01,0302,0110,01,031,0,
+    /*  5230 */ 0261,01,045,01,0302,0120,01,031,0,
+    /*  5239 */ 0260,01,045,01,0302,0110,01,031,0,
+    /*  5248 */ 0261,01,041,01,0302,0120,01,032,0,
+    /*  5257 */ 0260,01,041,01,0302,0110,01,032,0,
+    /*  5266 */ 0261,01,045,01,0302,0120,01,032,0,
+    /*  5275 */ 0260,01,045,01,0302,0110,01,032,0,
+    /*  5284 */ 0261,01,041,01,0302,0120,01,033,0,
+    /*  5293 */ 0260,01,041,01,0302,0110,01,033,0,
+    /*  5302 */ 0261,01,045,01,0302,0120,01,033,0,
+    /*  5311 */ 0260,01,045,01,0302,0110,01,033,0,
+    /*  5320 */ 0261,01,041,01,0302,0120,01,034,0,
+    /*  5329 */ 0260,01,041,01,0302,0110,01,034,0,
+    /*  5338 */ 0261,01,045,01,0302,0120,01,034,0,
+    /*  5347 */ 0260,01,045,01,0302,0110,01,034,0,
+    /*  5356 */ 0261,01,041,01,0302,0120,01,035,0,
+    /*  5365 */ 0260,01,041,01,0302,0110,01,035,0,
+    /*  5374 */ 0261,01,045,01,0302,0120,01,035,0,
+    /*  5383 */ 0260,01,045,01,0302,0110,01,035,0,
+    /*  5392 */ 0261,01,041,01,0302,0120,01,036,0,
+    /*  5401 */ 0260,01,041,01,0302,0110,01,036,0,
+    /*  5410 */ 0261,01,045,01,0302,0120,01,036,0,
+    /*  5419 */ 0260,01,045,01,0302,0110,01,036,0,
+    /*  5428 */ 0261,01,041,01,0302,0120,01,037,0,
+    /*  5437 */ 0260,01,041,01,0302,0110,01,037,0,
+    /*  5446 */ 0261,01,045,01,0302,0120,01,037,0,
+    /*  5455 */ 0260,01,045,01,0302,0110,01,037,0,
+    /*  5464 */ 0261,01,040,01,0302,0120,01,020,0,
+    /*  5473 */ 0260,01,040,01,0302,0110,01,020,0,
+    /*  5482 */ 0261,01,044,01,0302,0120,01,020,0,
+    /*  5491 */ 0260,01,044,01,0302,0110,01,020,0,
+    /*  5500 */ 0261,01,040,01,0302,0120,01,0,0,
+    /*  5509 */ 0260,01,040,01,0302,0110,01,0,0,
+    /*  5518 */ 0261,01,044,01,0302,0120,01,0,0,
+    /*  5527 */ 0260,01,044,01,0302,0110,01,0,0,
+    /*  5536 */ 0261,01,040,01,0302,0120,01,01,0,
+    /*  5545 */ 0260,01,040,01,0302,0110,01,01,0,
+    /*  5554 */ 0261,01,044,01,0302,0120,01,01,0,
+    /*  5563 */ 0260,01,044,01,0302,0110,01,01,0,
+    /*  5572 */ 0261,01,040,01,0302,0120,01,02,0,
+    /*  5581 */ 0260,01,040,01,0302,0110,01,02,0,
+    /*  5590 */ 0261,01,044,01,0302,0120,01,02,0,
+    /*  5599 */ 0260,01,044,01,0302,0110,01,02,0,
+    /*  5608 */ 0261,01,040,01,0302,0120,01,03,0,
+    /*  5617 */ 0260,01,040,01,0302,0110,01,03,0,
+    /*  5626 */ 0261,01,044,01,0302,0120,01,03,0,
+    /*  5635 */ 0260,01,044,01,0302,0110,01,03,0,
+    /*  5644 */ 0261,01,040,01,0302,0120,01,04,0,
+    /*  5653 */ 0260,01,040,01,0302,0110,01,04,0,
+    /*  5662 */ 0261,01,044,01,0302,0120,01,04,0,
+    /*  5671 */ 0260,01,044,01,0302,0110,01,04,0,
+    /*  5680 */ 0261,01,040,01,0302,0120,01,05,0,
+    /*  5689 */ 0260,01,040,01,0302,0110,01,05,0,
+    /*  5698 */ 0261,01,044,01,0302,0120,01,05,0,
+    /*  5707 */ 0260,01,044,01,0302,0110,01,05,0,
+    /*  5716 */ 0261,01,040,01,0302,0120,01,06,0,
+    /*  5725 */ 0260,01,040,01,0302,0110,01,06,0,
+    /*  5734 */ 0261,01,044,01,0302,0120,01,06,0,
+    /*  5743 */ 0260,01,044,01,0302,0110,01,06,0,
+    /*  5752 */ 0261,01,040,01,0302,0120,01,07,0,
+    /*  5761 */ 0260,01,040,01,0302,0110,01,07,0,
+    /*  5770 */ 0261,01,044,01,0302,0120,01,07,0,
+    /*  5779 */ 0260,01,044,01,0302,0110,01,07,0,
+    /*  5788 */ 0261,01,040,01,0302,0120,01,010,0,
+    /*  5797 */ 0260,01,040,01,0302,0110,01,010,0,
+    /*  5806 */ 0261,01,044,01,0302,0120,01,010,0,
+    /*  5815 */ 0260,01,044,01,0302,0110,01,010,0,
+    /*  5824 */ 0261,01,040,01,0302,0120,01,011,0,
+    /*  5833 */ 0260,01,040,01,0302,0110,01,011,0,
+    /*  5842 */ 0261,01,044,01,0302,0120,01,011,0,
+    /*  5851 */ 0260,01,044,01,0302,0110,01,011,0,
+    /*  5860 */ 0261,01,040,01,0302,0120,01,012,0,
+    /*  5869 */ 0260,01,040,01,0302,0110,01,012,0,
+    /*  5878 */ 0261,01,044,01,0302,0120,01,012,0,
+    /*  5887 */ 0260,01,044,01,0302,0110,01,012,0,
+    /*  5896 */ 0261,01,040,01,0302,0120,01,013,0,
+    /*  5905 */ 0260,01,040,01,0302,0110,01,013,0,
+    /*  5914 */ 0261,01,044,01,0302,0120,01,013,0,
+    /*  5923 */ 0260,01,044,01,0302,0110,01,013,0,
+    /*  5932 */ 0261,01,040,01,0302,0120,01,014,0,
+    /*  5941 */ 0260,01,040,01,0302,0110,01,014,0,
+    /*  5950 */ 0261,01,044,01,0302,0120,01,014,0,
+    /*  5959 */ 0260,01,044,01,0302,0110,01,014,0,
+    /*  5968 */ 0261,01,040,01,0302,0120,01,015,0,
+    /*  5977 */ 0260,01,040,01,0302,0110,01,015,0,
+    /*  5986 */ 0261,01,044,01,0302,0120,01,015,0,
+    /*  5995 */ 0260,01,044,01,0302,0110,01,015,0,
+    /*  6004 */ 0261,01,040,01,0302,0120,01,016,0,
+    /*  6013 */ 0260,01,040,01,0302,0110,01,016,0,
+    /*  6022 */ 0261,01,044,01,0302,0120,01,016,0,
+    /*  6031 */ 0260,01,044,01,0302,0110,01,016,0,
+    /*  6040 */ 0261,01,040,01,0302,0120,01,017,0,
+    /*  6049 */ 0260,01,040,01,0302,0110,01,017,0,
+    /*  6058 */ 0261,01,044,01,0302,0120,01,017,0,
+    /*  6067 */ 0260,01,044,01,0302,0110,01,017,0,
+    /*  6076 */ 0261,01,040,01,0302,0120,01,021,0,
+    /*  6085 */ 0260,01,040,01,0302,0110,01,021,0,
+    /*  6094 */ 0261,01,044,01,0302,0120,01,021,0,
+    /*  6103 */ 0260,01,044,01,0302,0110,01,021,0,
+    /*  6112 */ 0261,01,040,01,0302,0120,01,022,0,
+    /*  6121 */ 0260,01,040,01,0302,0110,01,022,0,
+    /*  6130 */ 0261,01,044,01,0302,0120,01,022,0,
+    /*  6139 */ 0260,01,044,01,0302,0110,01,022,0,
+    /*  6148 */ 0261,01,040,01,0302,0120,01,023,0,
+    /*  6157 */ 0260,01,040,01,0302,0110,01,023,0,
+    /*  6166 */ 0261,01,044,01,0302,0120,01,023,0,
+    /*  6175 */ 0260,01,044,01,0302,0110,01,023,0,
+    /*  6184 */ 0261,01,040,01,0302,0120,01,024,0,
+    /*  6193 */ 0260,01,040,01,0302,0110,01,024,0,
+    /*  6202 */ 0261,01,044,01,0302,0120,01,024,0,
+    /*  6211 */ 0260,01,044,01,0302,0110,01,024,0,
+    /*  6220 */ 0261,01,040,01,0302,0120,01,025,0,
+    /*  6229 */ 0260,01,040,01,0302,0110,01,025,0,
+    /*  6238 */ 0261,01,044,01,0302,0120,01,025,0,
+    /*  6247 */ 0260,01,044,01,0302,0110,01,025,0,
+    /*  6256 */ 0261,01,040,01,0302,0120,01,026,0,
+    /*  6265 */ 0260,01,040,01,0302,0110,01,026,0,
+    /*  6274 */ 0261,01,044,01,0302,0120,01,026,0,
+    /*  6283 */ 0260,01,044,01,0302,0110,01,026,0,
+    /*  6292 */ 0261,01,040,01,0302,0120,01,027,0,
+    /*  6301 */ 0260,01,040,01,0302,0110,01,027,0,
+    /*  6310 */ 0261,01,044,01,0302,0120,01,027,0,
+    /*  6319 */ 0260,01,044,01,0302,0110,01,027,0,
+    /*  6328 */ 0261,01,040,01,0302,0120,01,030,0,
+    /*  6337 */ 0260,01,040,01,0302,0110,01,030,0,
+    /*  6346 */ 0261,01,044,01,0302,0120,01,030,0,
+    /*  6355 */ 0260,01,044,01,0302,0110,01,030,0,
+    /*  6364 */ 0261,01,040,01,0302,0120,01,031,0,
+    /*  6373 */ 0260,01,040,01,0302,0110,01,031,0,
+    /*  6382 */ 0261,01,044,01,0302,0120,01,031,0,
+    /*  6391 */ 0260,01,044,01,0302,0110,01,031,0,
+    /*  6400 */ 0261,01,040,01,0302,0120,01,032,0,
+    /*  6409 */ 0260,01,040,01,0302,0110,01,032,0,
+    /*  6418 */ 0261,01,044,01,0302,0120,01,032,0,
+    /*  6427 */ 0260,01,044,01,0302,0110,01,032,0,
+    /*  6436 */ 0261,01,040,01,0302,0120,01,033,0,
+    /*  6445 */ 0260,01,040,01,0302,0110,01,033,0,
+    /*  6454 */ 0261,01,044,01,0302,0120,01,033,0,
+    /*  6463 */ 0260,01,044,01,0302,0110,01,033,0,
+    /*  6472 */ 0261,01,040,01,0302,0120,01,034,0,
+    /*  6481 */ 0260,01,040,01,0302,0110,01,034,0,
+    /*  6490 */ 0261,01,044,01,0302,0120,01,034,0,
+    /*  6499 */ 0260,01,044,01,0302,0110,01,034,0,
+    /*  6508 */ 0261,01,040,01,0302,0120,01,035,0,
+    /*  6517 */ 0260,01,040,01,0302,0110,01,035,0,
+    /*  6526 */ 0261,01,044,01,0302,0120,01,035,0,
+    /*  6535 */ 0260,01,044,01,0302,0110,01,035,0,
+    /*  6544 */ 0261,01,040,01,0302,0120,01,036,0,
+    /*  6553 */ 0260,01,040,01,0302,0110,01,036,0,
+    /*  6562 */ 0261,01,044,01,0302,0120,01,036,0,
+    /*  6571 */ 0260,01,044,01,0302,0110,01,036,0,
+    /*  6580 */ 0261,01,040,01,0302,0120,01,037,0,
+    /*  6589 */ 0260,01,040,01,0302,0110,01,037,0,
+    /*  6598 */ 0261,01,044,01,0302,0120,01,037,0,
+    /*  6607 */ 0260,01,044,01,0302,0110,01,037,0,
+    /*  6616 */ 0261,01,053,01,0302,0120,01,020,0,
+    /*  6625 */ 0260,01,053,01,0302,0110,01,020,0,
+    /*  6634 */ 0261,01,053,01,0302,0120,01,0,0,
+    /*  6643 */ 0260,01,053,01,0302,0110,01,0,0,
+    /*  6652 */ 0261,01,053,01,0302,0120,01,01,0,
+    /*  6661 */ 0260,01,053,01,0302,0110,01,01,0,
+    /*  6670 */ 0261,01,053,01,0302,0120,01,02,0,
+    /*  6679 */ 0260,01,053,01,0302,0110,01,02,0,
+    /*  6688 */ 0261,01,053,01,0302,0120,01,03,0,
+    /*  6697 */ 0260,01,053,01,0302,0110,01,03,0,
+    /*  6706 */ 0261,01,053,01,0302,0120,01,04,0,
+    /*  6715 */ 0260,01,053,01,0302,0110,01,04,0,
+    /*  6724 */ 0261,01,053,01,0302,0120,01,05,0,
+    /*  6733 */ 0260,01,053,01,0302,0110,01,05,0,
+    /*  6742 */ 0261,01,053,01,0302,0120,01,06,0,
+    /*  6751 */ 0260,01,053,01,0302,0110,01,06,0,
+    /*  6760 */ 0261,01,053,01,0302,0120,01,07,0,
+    /*  6769 */ 0260,01,053,01,0302,0110,01,07,0,
+    /*  6778 */ 0261,01,053,01,0302,0120,01,010,0,
+    /*  6787 */ 0260,01,053,01,0302,0110,01,010,0,
+    /*  6796 */ 0261,01,053,01,0302,0120,01,011,0,
+    /*  6805 */ 0260,01,053,01,0302,0110,01,011,0,
+    /*  6814 */ 0261,01,053,01,0302,0120,01,012,0,
+    /*  6823 */ 0260,01,053,01,0302,0110,01,012,0,
+    /*  6832 */ 0261,01,053,01,0302,0120,01,013,0,
+    /*  6841 */ 0260,01,053,01,0302,0110,01,013,0,
+    /*  6850 */ 0261,01,053,01,0302,0120,01,014,0,
+    /*  6859 */ 0260,01,053,01,0302,0110,01,014,0,
+    /*  6868 */ 0261,01,053,01,0302,0120,01,015,0,
+    /*  6877 */ 0260,01,053,01,0302,0110,01,015,0,
+    /*  6886 */ 0261,01,053,01,0302,0120,01,016,0,
+    /*  6895 */ 0260,01,053,01,0302,0110,01,016,0,
+    /*  6904 */ 0261,01,053,01,0302,0120,01,017,0,
+    /*  6913 */ 0260,01,053,01,0302,0110,01,017,0,
+    /*  6922 */ 0261,01,053,01,0302,0120,01,021,0,
+    /*  6931 */ 0260,01,053,01,0302,0110,01,021,0,
+    /*  6940 */ 0261,01,053,01,0302,0120,01,022,0,
+    /*  6949 */ 0260,01,053,01,0302,0110,01,022,0,
+    /*  6958 */ 0261,01,053,01,0302,0120,01,023,0,
+    /*  6967 */ 0260,01,053,01,0302,0110,01,023,0,
+    /*  6976 */ 0261,01,053,01,0302,0120,01,024,0,
+    /*  6985 */ 0260,01,053,01,0302,0110,01,024,0,
+    /*  6994 */ 0261,01,053,01,0302,0120,01,025,0,
+    /*  7003 */ 0260,01,053,01,0302,0110,01,025,0,
+    /*  7012 */ 0261,01,053,01,0302,0120,01,026,0,
+    /*  7021 */ 0260,01,053,01,0302,0110,01,026,0,
+    /*  7030 */ 0261,01,053,01,0302,0120,01,027,0,
+    /*  7039 */ 0260,01,053,01,0302,0110,01,027,0,
+    /*  7048 */ 0261,01,053,01,0302,0120,01,030,0,
+    /*  7057 */ 0260,01,053,01,0302,0110,01,030,0,
+    /*  7066 */ 0261,01,053,01,0302,0120,01,031,0,
+    /*  7075 */ 0260,01,053,01,0302,0110,01,031,0,
+    /*  7084 */ 0261,01,053,01,0302,0120,01,032,0,
+    /*  7093 */ 0260,01,053,01,0302,0110,01,032,0,
+    /*  7102 */ 0261,01,053,01,0302,0120,01,033,0,
+    /*  7111 */ 0260,01,053,01,0302,0110,01,033,0,
+    /*  7120 */ 0261,01,053,01,0302,0120,01,034,0,
+    /*  7129 */ 0260,01,053,01,0302,0110,01,034,0,
+    /*  7138 */ 0261,01,053,01,0302,0120,01,035,0,
+    /*  7147 */ 0260,01,053,01,0302,0110,01,035,0,
+    /*  7156 */ 0261,01,053,01,0302,0120,01,036,0,
+    /*  7165 */ 0260,01,053,01,0302,0110,01,036,0,
+    /*  7174 */ 0261,01,053,01,0302,0120,01,037,0,
+    /*  7183 */ 0260,01,053,01,0302,0110,01,037,0,
+    /*  7192 */ 0261,01,052,01,0302,0120,01,020,0,
+    /*  7201 */ 0260,01,052,01,0302,0110,01,020,0,
+    /*  7210 */ 0261,01,052,01,0302,0120,01,0,0,
+    /*  7219 */ 0260,01,052,01,0302,0110,01,0,0,
+    /*  7228 */ 0261,01,052,01,0302,0120,01,01,0,
+    /*  7237 */ 0260,01,052,01,0302,0110,01,01,0,
+    /*  7246 */ 0261,01,052,01,0302,0120,01,02,0,
+    /*  7255 */ 0260,01,052,01,0302,0110,01,02,0,
+    /*  7264 */ 0261,01,052,01,0302,0120,01,03,0,
+    /*  7273 */ 0260,01,052,01,0302,0110,01,03,0,
+    /*  7282 */ 0261,01,052,01,0302,0120,01,04,0,
+    /*  7291 */ 0260,01,052,01,0302,0110,01,04,0,
+    /*  7300 */ 0261,01,052,01,0302,0120,01,05,0,
+    /*  7309 */ 0260,01,052,01,0302,0110,01,05,0,
+    /*  7318 */ 0261,01,052,01,0302,0120,01,06,0,
+    /*  7327 */ 0260,01,052,01,0302,0110,01,06,0,
+    /*  7336 */ 0261,01,052,01,0302,0120,01,07,0,
+    /*  7345 */ 0260,01,052,01,0302,0110,01,07,0,
+    /*  7354 */ 0261,01,052,01,0302,0120,01,010,0,
+    /*  7363 */ 0260,01,052,01,0302,0110,01,010,0,
+    /*  7372 */ 0261,01,052,01,0302,0120,01,011,0,
+    /*  7381 */ 0260,01,052,01,0302,0110,01,011,0,
+    /*  7390 */ 0261,01,052,01,0302,0120,01,012,0,
+    /*  7399 */ 0260,01,052,01,0302,0110,01,012,0,
+    /*  7408 */ 0261,01,052,01,0302,0120,01,013,0,
+    /*  7417 */ 0260,01,052,01,0302,0110,01,013,0,
+    /*  7426 */ 0261,01,052,01,0302,0120,01,014,0,
+    /*  7435 */ 0260,01,052,01,0302,0110,01,014,0,
+    /*  7444 */ 0261,01,052,01,0302,0120,01,015,0,
+    /*  7453 */ 0260,01,052,01,0302,0110,01,015,0,
+    /*  7462 */ 0261,01,052,01,0302,0120,01,016,0,
+    /*  7471 */ 0260,01,052,01,0302,0110,01,016,0,
+    /*  7480 */ 0261,01,052,01,0302,0120,01,017,0,
+    /*  7489 */ 0260,01,052,01,0302,0110,01,017,0,
+    /*  7498 */ 0261,01,052,01,0302,0120,01,021,0,
+    /*  7507 */ 0260,01,052,01,0302,0110,01,021,0,
+    /*  7516 */ 0261,01,052,01,0302,0120,01,022,0,
+    /*  7525 */ 0260,01,052,01,0302,0110,01,022,0,
+    /*  7534 */ 0261,01,052,01,0302,0120,01,023,0,
+    /*  7543 */ 0260,01,052,01,0302,0110,01,023,0,
+    /*  7552 */ 0261,01,052,01,0302,0120,01,024,0,
+    /*  7561 */ 0260,01,052,01,0302,0110,01,024,0,
+    /*  7570 */ 0261,01,052,01,0302,0120,01,025,0,
+    /*  7579 */ 0260,01,052,01,0302,0110,01,025,0,
+    /*  7588 */ 0261,01,052,01,0302,0120,01,026,0,
+    /*  7597 */ 0260,01,052,01,0302,0110,01,026,0,
+    /*  7606 */ 0261,01,052,01,0302,0120,01,027,0,
+    /*  7615 */ 0260,01,052,01,0302,0110,01,027,0,
+    /*  7624 */ 0261,01,052,01,0302,0120,01,030,0,
+    /*  7633 */ 0260,01,052,01,0302,0110,01,030,0,
+    /*  7642 */ 0261,01,052,01,0302,0120,01,031,0,
+    /*  7651 */ 0260,01,052,01,0302,0110,01,031,0,
+    /*  7660 */ 0261,01,052,01,0302,0120,01,032,0,
+    /*  7669 */ 0260,01,052,01,0302,0110,01,032,0,
+    /*  7678 */ 0261,01,052,01,0302,0120,01,033,0,
+    /*  7687 */ 0260,01,052,01,0302,0110,01,033,0,
+    /*  7696 */ 0261,01,052,01,0302,0120,01,034,0,
+    /*  7705 */ 0260,01,052,01,0302,0110,01,034,0,
+    /*  7714 */ 0261,01,052,01,0302,0120,01,035,0,
+    /*  7723 */ 0260,01,052,01,0302,0110,01,035,0,
+    /*  7732 */ 0261,01,052,01,0302,0120,01,036,0,
+    /*  7741 */ 0260,01,052,01,0302,0110,01,036,0,
+    /*  7750 */ 0261,01,052,01,0302,0120,01,037,0,
+    /*  7759 */ 0260,01,052,01,0302,0110,01,037,0,
+    /*  7768 */ 0361,03,017,072,0104,0110,01,0,0,
+    /*  7777 */ 0361,03,017,072,0104,0110,01,01,0,
+    /*  7786 */ 0361,03,017,072,0104,0110,01,020,0,
+    /*  7795 */ 0361,03,017,072,0104,0110,01,021,0,
+    /*  7804 */ 0261,03,041,01,0104,0120,01,0,0,
+    /*  7813 */ 0260,03,041,01,0104,0110,01,0,0,
+    /*  7822 */ 0261,03,041,01,0104,0120,01,01,0,
+    /*  7831 */ 0260,03,041,01,0104,0110,01,01,0,
+    /*  7840 */ 0261,03,041,01,0104,0120,01,020,0,
+    /*  7849 */ 0260,03,041,01,0104,0110,01,020,0,
+    /*  7858 */ 0261,03,041,01,0104,0120,01,021,0,
+    /*  7867 */ 0260,03,041,01,0104,0110,01,021,0,
+    /*  7876 */ 0261,03,045,01,0104,0120,01,0,0,
+    /*  7885 */ 0260,03,045,01,0104,0110,01,0,0,
+    /*  7894 */ 0261,03,045,01,0104,0120,01,01,0,
+    /*  7903 */ 0260,03,045,01,0104,0110,01,01,0,
+    /*  7912 */ 0261,03,045,01,0104,0120,01,020,0,
+    /*  7921 */ 0260,03,045,01,0104,0110,01,020,0,
+    /*  7930 */ 0261,03,045,01,0104,0120,01,021,0,
+    /*  7939 */ 0260,03,045,01,0104,0110,01,021,0,
+    /*  7948 */ 0241,0203,041,0301,01,0104,0120,023,0,
+    /*  7957 */ 0240,0203,041,0301,01,0104,0110,022,0,
+    /*  7966 */ 0241,0203,045,0301,01,0104,0120,023,0,
+    /*  7975 */ 0240,0203,045,0301,01,0104,0110,022,0,
+    /*  7984 */ 0241,0203,051,0301,01,0104,0120,023,0,
+    /*  7993 */ 0240,0203,051,0301,01,0104,0110,022,0,
+    /*  8002 */ 0241,0203,01,0301,01,03,0120,023,0,
+    /*  8011 */ 0240,0203,01,0301,01,03,0110,022,0,
+    /*  8020 */ 0241,0203,05,0301,01,03,0120,023,0,
+    /*  8029 */ 0240,0203,05,0301,01,03,0110,022,0,
+    /*  8038 */ 0241,0203,011,0301,01,03,0120,023,0,
+    /*  8047 */ 0240,0203,011,0301,01,03,0110,022,0,
+    /*  8056 */ 0241,0203,021,0301,01,03,0120,023,0,
+    /*  8065 */ 0240,0203,021,0301,01,03,0110,022,0,
+    /*  8074 */ 0241,0203,025,0301,01,03,0120,023,0,
+    /*  8083 */ 0240,0203,025,0301,01,03,0110,022,0,
+    /*  8092 */ 0241,0203,031,0301,01,03,0120,023,0,
+    /*  8101 */ 0240,0203,031,0301,01,03,0110,022,0,
+    /*  8110 */ 0241,0201,021,0301,01,0302,0120,023,0,
+    /*  8119 */ 0241,0201,025,0301,01,0302,0120,023,0,
+    /*  8128 */ 0241,0201,031,0301,01,0302,0120,023,0,
+    /*  8137 */ 0241,0201,0,0301,01,0302,0120,023,0,
+    /*  8146 */ 0241,0201,04,0301,01,0302,0120,023,0,
+    /*  8155 */ 0241,0201,010,0301,01,0302,0120,023,0,
+    /*  8164 */ 0241,0201,023,0306,01,0302,0120,023,0,
+    /*  8173 */ 0241,0201,02,0306,01,0302,0120,023,0,
+    /*  8182 */ 0250,0203,01,0314,01,035,0101,022,0,
+    /*  8191 */ 0250,0203,05,0314,01,035,0101,022,0,
+    /*  8200 */ 0250,0203,011,0314,01,035,0101,022,0,
+    /*  8209 */ 0241,0203,01,0303,01,0102,0120,023,0,
+    /*  8218 */ 0240,0203,01,0303,01,0102,0110,022,0,
+    /*  8227 */ 0241,0203,05,0303,01,0102,0120,023,0,
+    /*  8236 */ 0240,0203,05,0303,01,0102,0110,022,0,
+    /*  8245 */ 0241,0203,011,0303,01,0102,0120,023,0,
+    /*  8254 */ 0240,0203,011,0303,01,0102,0110,022,0,
+    /*  8263 */ 0250,0203,05,0300,01,031,0101,022,0,
+    /*  8272 */ 0250,0203,011,0300,01,031,0101,022,0,
+    /*  8281 */ 0250,0203,05,0312,01,031,0101,022,0,
+    /*  8290 */ 0250,0203,011,0312,01,031,0101,022,0,
+    /*  8299 */ 0250,0203,011,0300,01,033,0101,022,0,
+    /*  8308 */ 0250,0203,011,0313,01,033,0101,022,0,
+    /*  8317 */ 0250,0203,025,0300,01,031,0101,022,0,
+    /*  8326 */ 0250,0203,031,0300,01,031,0101,022,0,
+    /*  8335 */ 0250,0203,025,0311,01,031,0101,022,0,
+    /*  8344 */ 0250,0203,031,0311,01,031,0101,022,0,
+    /*  8353 */ 0250,0203,031,0300,01,033,0101,022,0,
+    /*  8362 */ 0250,0203,031,0312,01,033,0101,022,0,
+    /*  8371 */ 0250,0203,05,0300,01,071,0101,022,0,
+    /*  8380 */ 0250,0203,011,0300,01,071,0101,022,0,
+    /*  8389 */ 0250,0203,05,0312,01,071,0101,022,0,
+    /*  8398 */ 0250,0203,011,0312,01,071,0101,022,0,
+    /*  8407 */ 0250,0203,011,0300,01,073,0101,022,0,
+    /*  8416 */ 0250,0203,011,0313,01,073,0101,022,0,
+    /*  8425 */ 0250,0203,025,0300,01,071,0101,022,0,
+    /*  8434 */ 0250,0203,031,0300,01,071,0101,022,0,
+    /*  8443 */ 0250,0203,025,0311,01,071,0101,022,0,
+    /*  8452 */ 0250,0203,031,0311,01,071,0101,022,0,
+    /*  8461 */ 0250,0203,031,0300,01,073,0101,022,0,
+    /*  8470 */ 0250,0203,031,0312,01,073,0101,022,0,
+    /*  8479 */ 0250,0203,041,0306,01,027,0101,022,0,
+    /*  8488 */ 0241,0203,021,0301,01,0124,0120,023,0,
+    /*  8497 */ 0240,0203,021,0301,01,0124,0110,022,0,
+    /*  8506 */ 0241,0203,025,0301,01,0124,0120,023,0,
+    /*  8515 */ 0240,0203,025,0301,01,0124,0110,022,0,
+    /*  8524 */ 0241,0203,031,0301,01,0124,0120,023,0,
+    /*  8533 */ 0240,0203,031,0301,01,0124,0110,022,0,
+    /*  8542 */ 0241,0203,01,0301,01,0124,0120,023,0,
+    /*  8551 */ 0240,0203,01,0301,01,0124,0110,022,0,
+    /*  8560 */ 0241,0203,05,0301,01,0124,0120,023,0,
+    /*  8569 */ 0240,0203,05,0301,01,0124,0110,022,0,
+    /*  8578 */ 0241,0203,011,0301,01,0124,0120,023,0,
+    /*  8587 */ 0240,0203,011,0301,01,0124,0110,022,0,
+    /*  8596 */ 0241,0203,021,0306,01,0125,0120,023,0,
+    /*  8605 */ 0240,0203,021,0306,01,0125,0110,022,0,
+    /*  8614 */ 0241,0203,01,0306,01,0125,0120,023,0,
+    /*  8623 */ 0240,0203,01,0306,01,0125,0110,022,0,
+    /*  8632 */ 0250,0203,021,0301,01,0146,0110,022,0,
+    /*  8641 */ 0250,0203,025,0301,01,0146,0110,022,0,
+    /*  8650 */ 0250,0203,031,0301,01,0146,0110,022,0,
+    /*  8659 */ 0250,0203,01,0301,01,0146,0110,022,0,
+    /*  8668 */ 0250,0203,05,0301,01,0146,0110,022,0,
+    /*  8677 */ 0250,0203,011,0301,01,0146,0110,022,0,
+    /*  8686 */ 0250,0203,021,0306,01,0147,0110,022,0,
+    /*  8695 */ 0250,0203,01,0306,01,0147,0110,022,0,
+    /*  8704 */ 0374,0250,0202,021,0306,01,0222,0110,0,
+    /*  8713 */ 0374,0250,0202,025,0306,01,0222,0110,0,
+    /*  8722 */ 0375,0250,0202,031,0306,01,0222,0110,0,
+    /*  8731 */ 0374,0250,0202,01,0306,01,0222,0110,0,
+    /*  8740 */ 0375,0250,0202,05,0306,01,0222,0110,0,
+    /*  8749 */ 0376,0250,0202,011,0306,01,0222,0110,0,
+    /*  8758 */ 0375,0250,0202,031,0306,01,0306,0201,0,
+    /*  8767 */ 0376,0250,0202,011,0306,01,0306,0201,0,
+    /*  8776 */ 0376,0250,0202,031,0306,01,0307,0201,0,
+    /*  8785 */ 0376,0250,0202,011,0306,01,0307,0201,0,
+    /*  8794 */ 0375,0250,0202,031,0306,01,0306,0202,0,
+    /*  8803 */ 0376,0250,0202,011,0306,01,0306,0202,0,
+    /*  8812 */ 0376,0250,0202,031,0306,01,0307,0202,0,
+    /*  8821 */ 0376,0250,0202,011,0306,01,0307,0202,0,
+    /*  8830 */ 0374,0250,0202,021,0306,01,0223,0110,0,
+    /*  8839 */ 0375,0250,0202,025,0306,01,0223,0110,0,
+    /*  8848 */ 0376,0250,0202,031,0306,01,0223,0110,0,
+    /*  8857 */ 0374,0250,0202,01,0306,01,0223,0110,0,
+    /*  8866 */ 0375,0250,0202,05,0306,01,0223,0110,0,
+    /*  8875 */ 0376,0250,0202,011,0306,01,0223,0110,0,
+    /*  8884 */ 0250,0203,021,0301,01,046,0110,022,0,
+    /*  8893 */ 0250,0203,025,0301,01,046,0110,022,0,
+    /*  8902 */ 0250,0203,031,0301,01,046,0110,022,0,
+    /*  8911 */ 0250,0203,01,0301,01,046,0110,022,0,
+    /*  8920 */ 0250,0203,05,0301,01,046,0110,022,0,
+    /*  8929 */ 0250,0203,011,0301,01,046,0110,022,0,
+    /*  8938 */ 0241,0203,021,0306,01,047,0120,023,0,
+    /*  8947 */ 0241,0203,01,0306,01,047,0120,023,0,
+    /*  8956 */ 0241,0203,05,0312,01,030,0120,023,0,
+    /*  8965 */ 0240,0203,05,0312,01,030,0110,022,0,
+    /*  8974 */ 0241,0203,011,0312,01,030,0120,023,0,
+    /*  8983 */ 0240,0203,011,0312,01,030,0110,022,0,
+    /*  8992 */ 0241,0203,011,0313,01,032,0120,023,0,
+    /*  9001 */ 0240,0203,011,0313,01,032,0110,022,0,
+    /*  9010 */ 0241,0203,025,0311,01,030,0120,023,0,
+    /*  9019 */ 0240,0203,025,0311,01,030,0110,022,0,
+    /*  9028 */ 0241,0203,031,0311,01,030,0120,023,0,
+    /*  9037 */ 0240,0203,031,0311,01,030,0110,022,0,
+    /*  9046 */ 0241,0203,031,0312,01,032,0120,023,0,
+    /*  9055 */ 0240,0203,031,0312,01,032,0110,022,0,
+    /*  9064 */ 0241,0203,05,0312,01,070,0120,023,0,
+    /*  9073 */ 0240,0203,05,0312,01,070,0110,022,0,
+    /*  9082 */ 0241,0203,011,0312,01,070,0120,023,0,
+    /*  9091 */ 0240,0203,011,0312,01,070,0110,022,0,
+    /*  9100 */ 0241,0203,011,0313,01,072,0120,023,0,
+    /*  9109 */ 0240,0203,011,0313,01,072,0110,022,0,
+    /*  9118 */ 0241,0203,025,0311,01,070,0120,023,0,
+    /*  9127 */ 0240,0203,025,0311,01,070,0110,022,0,
+    /*  9136 */ 0241,0203,031,0311,01,070,0120,023,0,
+    /*  9145 */ 0240,0203,031,0311,01,070,0110,022,0,
+    /*  9154 */ 0241,0203,031,0312,01,072,0120,023,0,
+    /*  9163 */ 0240,0203,031,0312,01,072,0110,022,0,
+    /*  9172 */ 0241,0203,01,0306,01,041,0120,023,0,
+    /*  9181 */ 0240,0203,01,0306,01,041,0110,022,0,
+    /*  9190 */ 0241,0203,041,0303,01,017,0120,023,0,
+    /*  9199 */ 0240,0203,041,0303,01,017,0110,022,0,
+    /*  9208 */ 0241,0203,045,0303,01,017,0120,023,0,
+    /*  9217 */ 0240,0203,045,0303,01,017,0110,022,0,
+    /*  9226 */ 0241,0203,051,0303,01,017,0120,023,0,
+    /*  9235 */ 0240,0203,051,0303,01,017,0110,022,0,
+    /*  9244 */ 0241,0203,01,0303,01,077,0120,023,0,
+    /*  9253 */ 0241,0203,05,0303,01,077,0120,023,0,
+    /*  9262 */ 0241,0203,011,0303,01,077,0120,023,0,
+    /*  9271 */ 0241,0203,01,0301,01,037,0120,023,0,
+    /*  9280 */ 0241,0203,05,0301,01,037,0120,023,0,
+    /*  9289 */ 0241,0203,011,0301,01,037,0120,023,0,
+    /*  9298 */ 0241,0203,021,0301,01,037,0120,023,0,
+    /*  9307 */ 0241,0203,025,0301,01,037,0120,023,0,
+    /*  9316 */ 0241,0203,031,0301,01,037,0120,023,0,
+    /*  9325 */ 0241,0203,01,0303,01,076,0120,023,0,
+    /*  9334 */ 0241,0203,05,0303,01,076,0120,023,0,
+    /*  9343 */ 0241,0203,011,0303,01,076,0120,023,0,
+    /*  9352 */ 0241,0203,01,0301,01,036,0120,023,0,
+    /*  9361 */ 0241,0203,05,0301,01,036,0120,023,0,
+    /*  9370 */ 0241,0203,011,0301,01,036,0120,023,0,
+    /*  9379 */ 0241,0203,021,0301,01,036,0120,023,0,
+    /*  9388 */ 0241,0203,025,0301,01,036,0120,023,0,
+    /*  9397 */ 0241,0203,031,0301,01,036,0120,023,0,
+    /*  9406 */ 0241,0203,021,0303,01,076,0120,023,0,
+    /*  9415 */ 0241,0203,025,0303,01,076,0120,023,0,
+    /*  9424 */ 0241,0203,031,0303,01,076,0120,023,0,
+    /*  9433 */ 0241,0203,021,0303,01,077,0120,023,0,
+    /*  9442 */ 0241,0203,025,0303,01,077,0120,023,0,
+    /*  9451 */ 0241,0203,031,0303,01,077,0120,023,0,
+    /*  9460 */ 0250,0203,021,0301,01,05,0110,022,0,
+    /*  9469 */ 0250,0203,025,0301,01,05,0110,022,0,
+    /*  9478 */ 0250,0203,031,0301,01,05,0110,022,0,
+    /*  9487 */ 0250,0203,01,0301,01,04,0110,022,0,
+    /*  9496 */ 0250,0203,05,0301,01,04,0110,022,0,
+    /*  9505 */ 0250,0203,011,0301,01,04,0110,022,0,
+    /*  9514 */ 0250,0203,025,0301,01,01,0110,022,0,
+    /*  9523 */ 0250,0203,031,0301,01,01,0110,022,0,
+    /*  9532 */ 0250,0203,025,0301,01,0,0110,022,0,
+    /*  9541 */ 0250,0203,031,0301,01,0,0110,022,0,
+    /*  9550 */ 0250,0203,041,0304,01,024,0101,022,0,
+    /*  9559 */ 0250,0203,01,0306,01,026,0101,022,0,
+    /*  9568 */ 0250,0203,021,0306,01,026,0101,022,0,
+    /*  9577 */ 0250,0203,041,0305,01,025,0101,022,0,
+    /*  9586 */ 0250,0201,041,0300,01,0305,0110,022,0,
+    /*  9595 */ 0374,0250,0202,01,0306,01,0220,0110,0,
+    /*  9604 */ 0375,0250,0202,05,0306,01,0220,0110,0,
+    /*  9613 */ 0376,0250,0202,011,0306,01,0220,0110,0,
+    /*  9622 */ 0374,0250,0202,021,0306,01,0220,0110,0,
+    /*  9631 */ 0374,0250,0202,025,0306,01,0220,0110,0,
+    /*  9640 */ 0375,0250,0202,031,0306,01,0220,0110,0,
+    /*  9649 */ 0374,0250,0202,01,0306,01,0221,0110,0,
+    /*  9658 */ 0375,0250,0202,05,0306,01,0221,0110,0,
+    /*  9667 */ 0376,0250,0202,011,0306,01,0221,0110,0,
+    /*  9676 */ 0374,0250,0202,021,0306,01,0221,0110,0,
+    /*  9685 */ 0375,0250,0202,025,0306,01,0221,0110,0,
+    /*  9694 */ 0376,0250,0202,031,0306,01,0221,0110,0,
+    /*  9703 */ 0241,0203,041,0304,01,040,0120,023,0,
+    /*  9712 */ 0240,0203,041,0304,01,040,0110,022,0,
+    /*  9721 */ 0241,0203,01,0306,01,042,0120,023,0,
+    /*  9730 */ 0240,0203,01,0306,01,042,0110,022,0,
+    /*  9739 */ 0241,0203,021,0306,01,042,0120,023,0,
+    /*  9748 */ 0240,0203,021,0306,01,042,0110,022,0,
+    /*  9757 */ 0241,0201,041,0305,01,0304,0120,023,0,
+    /*  9766 */ 0240,0201,041,0305,01,0304,0110,022,0,
+    /*  9775 */ 0240,0201,01,0301,01,0162,0211,022,0,
+    /*  9784 */ 0240,0201,01,0301,01,0162,0201,021,0,
+    /*  9793 */ 0240,0201,05,0301,01,0162,0211,022,0,
+    /*  9802 */ 0240,0201,05,0301,01,0162,0201,021,0,
+    /*  9811 */ 0240,0201,011,0301,01,0162,0211,022,0,
+    /*  9820 */ 0240,0201,011,0301,01,0162,0201,021,0,
+    /*  9829 */ 0240,0201,021,0301,01,0162,0211,022,0,
+    /*  9838 */ 0240,0201,021,0301,01,0162,0201,021,0,
+    /*  9847 */ 0240,0201,025,0301,01,0162,0211,022,0,
+    /*  9856 */ 0240,0201,025,0301,01,0162,0201,021,0,
+    /*  9865 */ 0240,0201,031,0301,01,0162,0211,022,0,
+    /*  9874 */ 0240,0201,031,0301,01,0162,0201,021,0,
+    /*  9883 */ 0240,0201,01,0301,01,0162,0210,022,0,
+    /*  9892 */ 0240,0201,01,0301,01,0162,0200,021,0,
+    /*  9901 */ 0240,0201,05,0301,01,0162,0210,022,0,
+    /*  9910 */ 0240,0201,05,0301,01,0162,0200,021,0,
+    /*  9919 */ 0240,0201,011,0301,01,0162,0210,022,0,
+    /*  9928 */ 0240,0201,011,0301,01,0162,0200,021,0,
+    /*  9937 */ 0240,0201,021,0301,01,0162,0210,022,0,
+    /*  9946 */ 0240,0201,021,0301,01,0162,0200,021,0,
+    /*  9955 */ 0240,0201,025,0301,01,0162,0210,022,0,
+    /*  9964 */ 0240,0201,025,0301,01,0162,0200,021,0,
+    /*  9973 */ 0240,0201,031,0301,01,0162,0210,022,0,
+    /*  9982 */ 0240,0201,031,0301,01,0162,0200,021,0,
+    /*  9991 */ 0374,0250,0202,01,0306,01,0240,0101,0,
+    /* 10000 */ 0375,0250,0202,05,0306,01,0240,0101,0,
+    /* 10009 */ 0376,0250,0202,011,0306,01,0240,0101,0,
+    /* 10018 */ 0374,0250,0202,021,0306,01,0240,0101,0,
+    /* 10027 */ 0374,0250,0202,025,0306,01,0240,0101,0,
+    /* 10036 */ 0375,0250,0202,031,0306,01,0240,0101,0,
+    /* 10045 */ 0374,0250,0202,01,0306,01,0241,0101,0,
+    /* 10054 */ 0375,0250,0202,05,0306,01,0241,0101,0,
+    /* 10063 */ 0376,0250,0202,011,0306,01,0241,0101,0,
+    /* 10072 */ 0374,0250,0202,021,0306,01,0241,0101,0,
+    /* 10081 */ 0375,0250,0202,025,0306,01,0241,0101,0,
+    /* 10090 */ 0376,0250,0202,031,0306,01,0241,0101,0,
+    /* 10099 */ 0250,0201,01,0301,01,0160,0110,022,0,
+    /* 10108 */ 0250,0201,05,0301,01,0160,0110,022,0,
+    /* 10117 */ 0250,0201,011,0301,01,0160,0110,022,0,
+    /* 10126 */ 0250,0201,042,0303,01,0160,0110,022,0,
+    /* 10135 */ 0250,0201,046,0303,01,0160,0110,022,0,
+    /* 10144 */ 0250,0201,052,0303,01,0160,0110,022,0,
+    /* 10153 */ 0250,0201,043,0303,01,0160,0110,022,0,
+    /* 10162 */ 0250,0201,047,0303,01,0160,0110,022,0,
+    /* 10171 */ 0250,0201,053,0303,01,0160,0110,022,0,
+    /* 10180 */ 0240,0201,01,0301,01,0162,0216,022,0,
+    /* 10189 */ 0240,0201,01,0301,01,0162,0206,021,0,
+    /* 10198 */ 0240,0201,05,0301,01,0162,0216,022,0,
+    /* 10207 */ 0240,0201,05,0301,01,0162,0206,021,0,
+    /* 10216 */ 0240,0201,011,0301,01,0162,0216,022,0,
+    /* 10225 */ 0240,0201,011,0301,01,0162,0206,021,0,
+    /* 10234 */ 0240,0201,041,0303,01,0163,0217,022,0,
+    /* 10243 */ 0240,0201,041,0303,01,0163,0207,021,0,
+    /* 10252 */ 0240,0201,045,0303,01,0163,0217,022,0,
+    /* 10261 */ 0240,0201,045,0303,01,0163,0207,021,0,
+    /* 10270 */ 0240,0201,051,0303,01,0163,0217,022,0,
+    /* 10279 */ 0240,0201,051,0303,01,0163,0207,021,0,
+    /* 10288 */ 0240,0201,021,0301,01,0163,0216,022,0,
+    /* 10297 */ 0240,0201,021,0301,01,0163,0206,021,0,
+    /* 10306 */ 0240,0201,025,0301,01,0163,0216,022,0,
+    /* 10315 */ 0240,0201,025,0301,01,0163,0206,021,0,
+    /* 10324 */ 0240,0201,031,0301,01,0163,0216,022,0,
+    /* 10333 */ 0240,0201,031,0301,01,0163,0206,021,0,
+    /* 10342 */ 0240,0201,041,0303,01,0161,0216,022,0,
+    /* 10351 */ 0240,0201,041,0303,01,0161,0206,021,0,
+    /* 10360 */ 0240,0201,045,0303,01,0161,0216,022,0,
+    /* 10369 */ 0240,0201,045,0303,01,0161,0206,021,0,
+    /* 10378 */ 0240,0201,051,0303,01,0161,0216,022,0,
+    /* 10387 */ 0240,0201,051,0303,01,0161,0206,021,0,
+    /* 10396 */ 0240,0201,01,0301,01,0162,0214,022,0,
+    /* 10405 */ 0240,0201,01,0301,01,0162,0204,021,0,
+    /* 10414 */ 0240,0201,05,0301,01,0162,0214,022,0,
+    /* 10423 */ 0240,0201,05,0301,01,0162,0204,021,0,
+    /* 10432 */ 0240,0201,011,0301,01,0162,0214,022,0,
+    /* 10441 */ 0240,0201,011,0301,01,0162,0204,021,0,
+    /* 10450 */ 0240,0201,021,0301,01,0162,0214,022,0,
+    /* 10459 */ 0240,0201,021,0301,01,0162,0204,021,0,
+    /* 10468 */ 0240,0201,025,0301,01,0162,0214,022,0,
+    /* 10477 */ 0240,0201,025,0301,01,0162,0204,021,0,
+    /* 10486 */ 0240,0201,031,0301,01,0162,0214,022,0,
+    /* 10495 */ 0240,0201,031,0301,01,0162,0204,021,0,
+    /* 10504 */ 0240,0201,041,0303,01,0161,0214,022,0,
+    /* 10513 */ 0240,0201,041,0303,01,0161,0204,021,0,
+    /* 10522 */ 0240,0201,045,0303,01,0161,0214,022,0,
+    /* 10531 */ 0240,0201,045,0303,01,0161,0204,021,0,
+    /* 10540 */ 0240,0201,051,0303,01,0161,0214,022,0,
+    /* 10549 */ 0240,0201,051,0303,01,0161,0204,021,0,
+    /* 10558 */ 0240,0201,01,0301,01,0162,0212,022,0,
+    /* 10567 */ 0240,0201,01,0301,01,0162,0202,021,0,
+    /* 10576 */ 0240,0201,05,0301,01,0162,0212,022,0,
+    /* 10585 */ 0240,0201,05,0301,01,0162,0202,021,0,
+    /* 10594 */ 0240,0201,011,0301,01,0162,0212,022,0,
+    /* 10603 */ 0240,0201,011,0301,01,0162,0202,021,0,
+    /* 10612 */ 0240,0201,041,0303,01,0163,0213,022,0,
+    /* 10621 */ 0240,0201,041,0303,01,0163,0203,021,0,
+    /* 10630 */ 0240,0201,045,0303,01,0163,0213,022,0,
+    /* 10639 */ 0240,0201,045,0303,01,0163,0203,021,0,
+    /* 10648 */ 0240,0201,051,0303,01,0163,0213,022,0,
+    /* 10657 */ 0240,0201,051,0303,01,0163,0203,021,0,
+    /* 10666 */ 0240,0201,021,0301,01,0163,0212,022,0,
+    /* 10675 */ 0240,0201,021,0301,01,0163,0202,021,0,
+    /* 10684 */ 0240,0201,025,0301,01,0163,0212,022,0,
+    /* 10693 */ 0240,0201,025,0301,01,0163,0202,021,0,
+    /* 10702 */ 0240,0201,031,0301,01,0163,0212,022,0,
+    /* 10711 */ 0240,0201,031,0301,01,0163,0202,021,0,
+    /* 10720 */ 0240,0201,041,0303,01,0161,0212,022,0,
+    /* 10729 */ 0240,0201,041,0303,01,0161,0202,021,0,
+    /* 10738 */ 0240,0201,045,0303,01,0161,0212,022,0,
+    /* 10747 */ 0240,0201,045,0303,01,0161,0202,021,0,
+    /* 10756 */ 0240,0201,051,0303,01,0161,0212,022,0,
+    /* 10765 */ 0240,0201,051,0303,01,0161,0202,021,0,
+    /* 10774 */ 0241,0203,01,0301,01,045,0120,023,0,
+    /* 10783 */ 0241,0203,05,0301,01,045,0120,023,0,
+    /* 10792 */ 0241,0203,011,0301,01,045,0120,023,0,
+    /* 10801 */ 0241,0203,021,0301,01,045,0120,023,0,
+    /* 10810 */ 0241,0203,025,0301,01,045,0120,023,0,
+    /* 10819 */ 0241,0203,031,0301,01,045,0120,023,0,
+    /* 10828 */ 0241,0203,021,0301,01,0120,0120,023,0,
+    /* 10837 */ 0240,0203,021,0301,01,0120,0110,022,0,
+    /* 10846 */ 0241,0203,025,0301,01,0120,0120,023,0,
+    /* 10855 */ 0240,0203,025,0301,01,0120,0110,022,0,
+    /* 10864 */ 0241,0203,031,0301,01,0120,0120,023,0,
+    /* 10873 */ 0240,0203,031,0301,01,0120,0110,022,0,
+    /* 10882 */ 0241,0203,01,0301,01,0120,0120,023,0,
+    /* 10891 */ 0240,0203,01,0301,01,0120,0110,022,0,
+    /* 10900 */ 0241,0203,05,0301,01,0120,0120,023,0,
+    /* 10909 */ 0240,0203,05,0301,01,0120,0110,022,0,
+    /* 10918 */ 0241,0203,011,0301,01,0120,0120,023,0,
+    /* 10927 */ 0240,0203,011,0301,01,0120,0110,022,0,
+    /* 10936 */ 0241,0203,021,0306,01,0121,0120,023,0,
+    /* 10945 */ 0240,0203,021,0306,01,0121,0110,022,0,
+    /* 10954 */ 0241,0203,01,0306,01,0121,0120,023,0,
+    /* 10963 */ 0240,0203,01,0306,01,0121,0110,022,0,
+    /* 10972 */ 0250,0203,021,0301,01,0126,0110,022,0,
+    /* 10981 */ 0250,0203,025,0301,01,0126,0110,022,0,
+    /* 10990 */ 0250,0203,031,0301,01,0126,0110,022,0,
+    /* 10999 */ 0250,0203,01,0301,01,0126,0110,022,0,
+    /* 11008 */ 0250,0203,05,0301,01,0126,0110,022,0,
+    /* 11017 */ 0250,0203,011,0301,01,0126,0110,022,0,
+    /* 11026 */ 0241,0203,021,0306,01,0127,0120,023,0,
+    /* 11035 */ 0240,0203,021,0306,01,0127,0110,022,0,
+    /* 11044 */ 0241,0203,01,0306,01,0127,0120,023,0,
+    /* 11053 */ 0240,0203,01,0306,01,0127,0110,022,0,
+    /* 11062 */ 0250,0203,021,0301,01,011,0110,022,0,
+    /* 11071 */ 0250,0203,025,0301,01,011,0110,022,0,
+    /* 11080 */ 0250,0203,031,0301,01,011,0110,022,0,
+    /* 11089 */ 0250,0203,01,0301,01,010,0110,022,0,
+    /* 11098 */ 0250,0203,05,0301,01,010,0110,022,0,
+    /* 11107 */ 0250,0203,011,0301,01,010,0110,022,0,
+    /* 11116 */ 0241,0203,021,0306,01,013,0120,023,0,
+    /* 11125 */ 0240,0203,021,0306,01,013,0110,022,0,
+    /* 11134 */ 0241,0203,01,0306,01,012,0120,023,0,
+    /* 11143 */ 0240,0203,01,0306,01,012,0110,022,0,
+    /* 11152 */ 0374,0250,0202,021,0306,01,0242,0101,0,
+    /* 11161 */ 0374,0250,0202,025,0306,01,0242,0101,0,
+    /* 11170 */ 0375,0250,0202,031,0306,01,0242,0101,0,
+    /* 11179 */ 0374,0250,0202,01,0306,01,0242,0101,0,
+    /* 11188 */ 0375,0250,0202,05,0306,01,0242,0101,0,
+    /* 11197 */ 0376,0250,0202,011,0306,01,0242,0101,0,
+    /* 11206 */ 0375,0250,0202,031,0306,01,0306,0205,0,
+    /* 11215 */ 0376,0250,0202,011,0306,01,0306,0205,0,
+    /* 11224 */ 0376,0250,0202,031,0306,01,0307,0205,0,
+    /* 11233 */ 0376,0250,0202,011,0306,01,0307,0205,0,
+    /* 11242 */ 0375,0250,0202,031,0306,01,0306,0206,0,
+    /* 11251 */ 0376,0250,0202,011,0306,01,0306,0206,0,
+    /* 11260 */ 0376,0250,0202,031,0306,01,0307,0206,0,
+    /* 11269 */ 0376,0250,0202,011,0306,01,0307,0206,0,
+    /* 11278 */ 0374,0250,0202,021,0306,01,0243,0101,0,
+    /* 11287 */ 0375,0250,0202,025,0306,01,0243,0101,0,
+    /* 11296 */ 0376,0250,0202,031,0306,01,0243,0101,0,
+    /* 11305 */ 0374,0250,0202,01,0306,01,0243,0101,0,
+    /* 11314 */ 0375,0250,0202,05,0306,01,0243,0101,0,
+    /* 11323 */ 0376,0250,0202,011,0306,01,0243,0101,0,
+    /* 11332 */ 0241,0203,05,0301,01,043,0120,023,0,
+    /* 11341 */ 0240,0203,05,0301,01,043,0110,022,0,
+    /* 11350 */ 0241,0203,011,0301,01,043,0120,023,0,
+    /* 11359 */ 0240,0203,011,0301,01,043,0110,022,0,
+    /* 11368 */ 0241,0203,025,0301,01,043,0120,023,0,
+    /* 11377 */ 0240,0203,025,0301,01,043,0110,022,0,
+    /* 11386 */ 0241,0203,031,0301,01,043,0120,023,0,
+    /* 11395 */ 0240,0203,031,0301,01,043,0110,022,0,
+    /* 11404 */ 0241,0203,05,0301,01,0103,0120,023,0,
+    /* 11413 */ 0240,0203,05,0301,01,0103,0110,022,0,
+    /* 11422 */ 0241,0203,011,0301,01,0103,0120,023,0,
+    /* 11431 */ 0240,0203,011,0301,01,0103,0110,022,0,
+    /* 11440 */ 0241,0203,025,0301,01,0103,0120,023,0,
+    /* 11449 */ 0240,0203,025,0301,01,0103,0110,022,0,
+    /* 11458 */ 0241,0203,031,0301,01,0103,0120,023,0,
+    /* 11467 */ 0240,0203,031,0301,01,0103,0110,022,0,
+    /* 11476 */ 0241,0201,021,0301,01,0306,0120,023,0,
+    /* 11485 */ 0240,0201,021,0301,01,0306,0110,022,0,
+    /* 11494 */ 0241,0201,025,0301,01,0306,0120,023,0,
+    /* 11503 */ 0240,0201,025,0301,01,0306,0110,022,0,
+    /* 11512 */ 0241,0201,031,0301,01,0306,0120,023,0,
+    /* 11521 */ 0240,0201,031,0301,01,0306,0110,022,0,
+    /* 11530 */ 0241,0201,0,0301,01,0306,0120,023,0,
+    /* 11539 */ 0240,0201,0,0301,01,0306,0110,022,0,
+    /* 11548 */ 0241,0201,04,0301,01,0306,0120,023,0,
+    /* 11557 */ 0240,0201,04,0301,01,0306,0110,022,0,
+    /* 11566 */ 0241,0201,010,0301,01,0306,0120,023,0,
+    /* 11575 */ 0240,0201,010,0301,01,0306,0110,022,0,
+    /* 11584 */ 0323,0313,0361,03,017,070,0370,0110,0,
+    /* 11593 */ 0241,0203,021,0301,01,0317,0120,023,0,
+    /* 11602 */ 0240,0203,021,0301,01,0317,0110,022,0,
+    /* 11611 */ 0241,0203,025,0301,01,0317,0120,023,0,
+    /* 11620 */ 0240,0203,025,0301,01,0317,0110,022,0,
+    /* 11629 */ 0241,0203,031,0301,01,0317,0120,023,0,
+    /* 11638 */ 0240,0203,031,0301,01,0317,0110,022,0,
+    /* 11647 */ 0241,0203,021,0301,01,0316,0120,023,0,
+    /* 11656 */ 0240,0203,021,0301,01,0316,0110,022,0,
+    /* 11665 */ 0241,0203,025,0301,01,0316,0120,023,0,
+    /* 11674 */ 0240,0203,025,0301,01,0316,0110,022,0,
+    /* 11683 */ 0241,0203,031,0301,01,0316,0120,023,0,
+    /* 11692 */ 0240,0203,031,0301,01,0316,0110,022,0,
+    /* 11701 */ 0241,0203,021,0303,01,0160,0120,023,0,
+    /* 11710 */ 0240,0203,021,0303,01,0160,0110,022,0,
+    /* 11719 */ 0241,0203,025,0303,01,0160,0120,023,0,
+    /* 11728 */ 0240,0203,025,0303,01,0160,0110,022,0,
+    /* 11737 */ 0241,0203,031,0303,01,0160,0120,023,0,
+    /* 11746 */ 0240,0203,031,0303,01,0160,0110,022,0,
+    /* 11755 */ 0241,0203,01,0301,01,0161,0120,023,0,
+    /* 11764 */ 0240,0203,01,0301,01,0161,0110,022,0,
+    /* 11773 */ 0241,0203,05,0301,01,0161,0120,023,0,
+    /* 11782 */ 0240,0203,05,0301,01,0161,0110,022,0,
+    /* 11791 */ 0241,0203,011,0301,01,0161,0120,023,0,
+    /* 11800 */ 0240,0203,011,0301,01,0161,0110,022,0,
+    /* 11809 */ 0241,0203,021,0301,01,0161,0120,023,0,
+    /* 11818 */ 0240,0203,021,0301,01,0161,0110,022,0,
+    /* 11827 */ 0241,0203,025,0301,01,0161,0120,023,0,
+    /* 11836 */ 0240,0203,025,0301,01,0161,0110,022,0,
+    /* 11845 */ 0241,0203,031,0301,01,0161,0120,023,0,
+    /* 11854 */ 0240,0203,031,0301,01,0161,0110,022,0,
+    /* 11863 */ 0241,0203,021,0303,01,0162,0120,023,0,
+    /* 11872 */ 0240,0203,021,0303,01,0162,0110,022,0,
+    /* 11881 */ 0241,0203,025,0303,01,0162,0120,023,0,
+    /* 11890 */ 0240,0203,025,0303,01,0162,0110,022,0,
+    /* 11899 */ 0241,0203,031,0303,01,0162,0120,023,0,
+    /* 11908 */ 0240,0203,031,0303,01,0162,0110,022,0,
+    /* 11917 */ 0241,0203,01,0301,01,0163,0120,023,0,
+    /* 11926 */ 0240,0203,01,0301,01,0163,0110,022,0,
+    /* 11935 */ 0241,0203,05,0301,01,0163,0120,023,0,
+    /* 11944 */ 0240,0203,05,0301,01,0163,0110,022,0,
+    /* 11953 */ 0241,0203,011,0301,01,0163,0120,023,0,
+    /* 11962 */ 0240,0203,011,0301,01,0163,0110,022,0,
+    /* 11971 */ 0241,0203,021,0301,01,0163,0120,023,0,
+    /* 11980 */ 0240,0203,021,0301,01,0163,0110,022,0,
+    /* 11989 */ 0241,0203,025,0301,01,0163,0120,023,0,
+    /* 11998 */ 0240,0203,025,0301,01,0163,0110,022,0,
+    /* 12007 */ 0241,0203,031,0301,01,0163,0120,023,0,
+    /* 12016 */ 0240,0203,031,0301,01,0163,0110,022,0,
+    /* 12025 */ 0241,0203,0,0301,01,0302,0120,023,0,
+    /* 12034 */ 0240,0203,0,0301,01,0302,0110,022,0,
+    /* 12043 */ 0241,0203,04,0301,01,0302,0120,023,0,
+    /* 12052 */ 0240,0203,04,0301,01,0302,0110,022,0,
+    /* 12061 */ 0241,0203,010,0301,01,0302,0120,023,0,
+    /* 12070 */ 0240,0203,010,0301,01,0302,0110,022,0,
+    /* 12079 */ 0241,0203,02,0306,01,0302,0120,023,0,
+    /* 12088 */ 0240,0203,02,0306,01,0302,0110,022,0,
+    /* 12097 */ 0250,0203,0,0301,01,0146,0110,022,0,
+    /* 12106 */ 0250,0203,04,0301,01,0146,0110,022,0,
+    /* 12115 */ 0250,0203,010,0301,01,0146,0110,022,0,
+    /* 12124 */ 0250,0203,0,0306,01,0147,0110,022,0,
+    /* 12133 */ 0250,0203,0,0301,01,045,0110,022,0,
+    /* 12142 */ 0250,0203,04,0301,01,045,0110,022,0,
+    /* 12151 */ 0250,0203,010,0301,01,045,0110,022,0,
+    /* 12160 */ 0250,0203,0,0306,01,047,0110,022,0,
+    /* 12169 */ 0250,0203,0,0301,01,0126,0110,022,0,
+    /* 12178 */ 0250,0203,04,0301,01,0126,0110,022,0,
+    /* 12187 */ 0250,0203,010,0301,01,0126,0110,022,0,
+    /* 12196 */ 0242,0203,0,0306,01,0127,0110,023,0,
+    /* 12205 */ 0241,0203,0,0306,01,0127,0100,022,0,
+    /* 12214 */ 0250,0203,0,0301,01,010,0110,022,0,
+    /* 12223 */ 0250,0203,04,0301,01,010,0110,022,0,
+    /* 12232 */ 0250,0203,010,0301,01,010,0110,022,0,
+    /* 12241 */ 0241,0203,0,0306,01,012,0120,023,0,
+    /* 12250 */ 0240,0203,0,0306,01,012,0110,022,0,
+    /* 12259 */ 0250,0206,01,0301,01,0116,0110,022,0,
+    /* 12268 */ 0250,0206,05,0301,01,0116,0110,022,0,
+    /* 12277 */ 0250,0206,011,0301,01,0116,0110,022,0,
+    /* 12286 */ 0241,0206,01,0306,01,0117,0120,023,0,
+    /* 12295 */ 0240,0206,01,0306,01,0117,0110,022,0,
+    /* 12304 */ 0273,0320,02,017,0272,0207,025,0,
+    /* 12312 */ 0273,0321,02,017,0272,0207,025,0,
+    /* 12320 */ 0273,0324,02,017,0272,0207,025,0,
+    /* 12328 */ 0273,0320,02,017,0272,0206,025,0,
+    /* 12336 */ 0273,0321,02,017,0272,0206,025,0,
+    /* 12344 */ 0273,0324,02,017,0272,0206,025,0,
+    /* 12352 */ 0273,0320,02,017,0272,0205,025,0,
+    /* 12360 */ 0273,0321,02,017,0272,0205,025,0,
+    /* 12368 */ 0273,0324,02,017,0272,0205,025,0,
+    /* 12376 */ 0323,02,017,017,0110,01,0277,0,
+    /* 12384 */ 0323,02,017,017,0110,01,035,0,
+    /* 12392 */ 0323,02,017,017,0110,01,0256,0,
+    /* 12400 */ 0323,02,017,017,0110,01,0236,0,
+    /* 12408 */ 0323,02,017,017,0110,01,0260,0,
+    /* 12416 */ 0323,02,017,017,0110,01,0220,0,
+    /* 12424 */ 0323,02,017,017,0110,01,0240,0,
+    /* 12432 */ 0323,02,017,017,0110,01,0244,0,
+    /* 12440 */ 0323,02,017,017,0110,01,0224,0,
+    /* 12448 */ 0323,02,017,017,0110,01,0264,0,
+    /* 12456 */ 0323,02,017,017,0110,01,0226,0,
+    /* 12464 */ 0323,02,017,017,0110,01,0246,0,
+    /* 12472 */ 0323,02,017,017,0110,01,0266,0,
+    /* 12480 */ 0323,02,017,017,0110,01,0247,0,
+    /* 12488 */ 0323,02,017,017,0110,01,0227,0,
+    /* 12496 */ 0323,02,017,017,0110,01,0232,0,
+    /* 12504 */ 0323,02,017,017,0110,01,0252,0,
+    /* 12512 */ 0323,02,017,017,0110,01,015,0,
+    /* 12520 */ 0323,02,017,017,0110,01,0267,0,
+    /* 12528 */ 0360,02,017,0302,0110,01,0,0,
+    /* 12536 */ 0333,02,017,0302,0110,01,0,0,
+    /* 12544 */ 0360,02,017,0302,0110,01,02,0,
+    /* 12552 */ 0333,02,017,0302,0110,01,02,0,
+    /* 12560 */ 0360,02,017,0302,0110,01,01,0,
+    /* 12568 */ 0333,02,017,0302,0110,01,01,0,
+    /* 12576 */ 0360,02,017,0302,0110,01,04,0,
+    /* 12584 */ 0333,02,017,0302,0110,01,04,0,
+    /* 12592 */ 0360,02,017,0302,0110,01,06,0,
+    /* 12600 */ 0333,02,017,0302,0110,01,06,0,
+    /* 12608 */ 0360,02,017,0302,0110,01,05,0,
+    /* 12616 */ 0333,02,017,0302,0110,01,05,0,
+    /* 12624 */ 0360,02,017,0302,0110,01,07,0,
+    /* 12632 */ 0333,02,017,0302,0110,01,07,0,
+    /* 12640 */ 0360,02,017,0302,0110,01,03,0,
+    /* 12648 */ 0333,02,017,0302,0110,01,03,0,
+    /* 12656 */ 0360,0323,02,017,0160,0110,022,0,
+    /* 12664 */ 0323,02,017,017,0110,01,034,0,
+    /* 12672 */ 0323,02,017,017,0110,01,0212,0,
+    /* 12680 */ 0323,02,017,017,0110,01,0216,0,
+    /* 12688 */ 0323,02,017,017,0110,01,014,0,
+    /* 12696 */ 0323,02,017,017,0110,01,0273,0,
+    /* 12704 */ 0361,02,017,0302,0110,01,0,0,
+    /* 12712 */ 0332,02,017,0302,0110,01,0,0,
+    /* 12720 */ 0361,02,017,0302,0110,01,02,0,
+    /* 12728 */ 0332,02,017,0302,0110,01,02,0,
+    /* 12736 */ 0361,02,017,0302,0110,01,01,0,
+    /* 12744 */ 0332,02,017,0302,0110,01,01,0,
+    /* 12752 */ 0361,02,017,0302,0110,01,04,0,
+    /* 12760 */ 0332,02,017,0302,0110,01,04,0,
+    /* 12768 */ 0361,02,017,0302,0110,01,06,0,
+    /* 12776 */ 0332,02,017,0302,0110,01,06,0,
+    /* 12784 */ 0361,02,017,0302,0110,01,05,0,
+    /* 12792 */ 0332,02,017,0302,0110,01,05,0,
+    /* 12800 */ 0361,02,017,0302,0110,01,07,0,
+    /* 12808 */ 0332,02,017,0302,0110,01,07,0,
+    /* 12816 */ 0361,02,017,0302,0110,01,03,0,
+    /* 12824 */ 0332,02,017,0302,0110,01,03,0,
+    /* 12832 */ 0323,0361,03,017,070,0200,0110,0,
+    /* 12840 */ 0323,0361,03,017,070,0201,0110,0,
+    /* 12848 */ 0360,03,017,072,017,0110,026,0,
+    /* 12856 */ 0361,03,017,072,017,0110,026,0,
+    /* 12864 */ 0361,02,017,0170,0200,025,026,0,
+    /* 12872 */ 0332,02,017,0170,0110,026,027,0,
+    /* 12880 */ 0361,03,017,072,015,0110,026,0,
+    /* 12888 */ 0361,03,017,072,014,0110,026,0,
+    /* 12896 */ 0361,03,017,072,0101,0110,026,0,
+    /* 12904 */ 0361,03,017,072,0100,0110,026,0,
+    /* 12912 */ 0361,03,017,072,041,0110,026,0,
+    /* 12920 */ 0361,03,017,072,0102,0110,026,0,
+    /* 12928 */ 0361,03,017,072,016,0110,026,0,
+    /* 12936 */ 0361,03,017,072,011,0110,026,0,
+    /* 12944 */ 0361,03,017,072,010,0110,026,0,
+    /* 12952 */ 0361,03,017,072,013,0110,026,0,
+    /* 12960 */ 0361,03,017,072,012,0110,026,0,
+    /* 12968 */ 0320,0332,03,017,070,0361,0110,0,
+    /* 12976 */ 0321,0332,03,017,070,0361,0110,0,
+    /* 12984 */ 0324,0332,03,017,070,0360,0110,0,
+    /* 12992 */ 0324,0332,03,017,070,0361,0110,0,
+    /* 13000 */ 0361,03,017,072,0141,0110,026,0,
+    /* 13008 */ 0361,03,017,072,0140,0110,026,0,
+    /* 13016 */ 0361,03,017,072,0143,0110,026,0,
+    /* 13024 */ 0361,03,017,072,0142,0110,026,0,
+    /* 13032 */ 0323,02,017,017,0110,01,0206,0,
+    /* 13040 */ 0323,02,017,017,0110,01,0207,0,
+    /* 13048 */ 0320,0331,03,017,070,0360,0110,0,
+    /* 13056 */ 0321,0331,03,017,070,0360,0110,0,
+    /* 13064 */ 0324,0331,03,017,070,0360,0110,0,
+    /* 13072 */ 0320,0331,03,017,070,0361,0101,0,
+    /* 13080 */ 0321,0331,03,017,070,0361,0101,0,
+    /* 13088 */ 0324,0331,03,017,070,0361,0101,0,
+    /* 13096 */ 0361,03,017,072,0337,0110,022,0,
+    /* 13104 */ 0270,03,041,01,0337,0110,022,0,
+    /* 13112 */ 0241,0202,041,0301,01,0334,0120,0,
+    /* 13120 */ 0240,0202,041,0301,01,0334,0110,0,
+    /* 13128 */ 0241,0202,045,0301,01,0334,0120,0,
+    /* 13136 */ 0240,0202,045,0301,01,0334,0110,0,
+    /* 13144 */ 0241,0202,041,0301,01,0335,0120,0,
+    /* 13152 */ 0240,0202,041,0301,01,0335,0110,0,
+    /* 13160 */ 0241,0202,045,0301,01,0335,0120,0,
+    /* 13168 */ 0240,0202,045,0301,01,0335,0110,0,
+    /* 13176 */ 0241,0202,041,0301,01,0336,0120,0,
+    /* 13184 */ 0240,0202,041,0301,01,0336,0110,0,
+    /* 13192 */ 0241,0202,045,0301,01,0336,0120,0,
+    /* 13200 */ 0240,0202,045,0301,01,0336,0110,0,
+    /* 13208 */ 0241,0202,041,0301,01,0337,0120,0,
+    /* 13216 */ 0240,0202,041,0301,01,0337,0110,0,
+    /* 13224 */ 0241,0202,045,0301,01,0337,0120,0,
+    /* 13232 */ 0240,0202,045,0301,01,0337,0110,0,
+    /* 13240 */ 0241,0202,051,0301,01,0334,0120,0,
+    /* 13248 */ 0240,0202,051,0301,01,0334,0110,0,
+    /* 13256 */ 0241,0202,051,0301,01,0335,0120,0,
+    /* 13264 */ 0240,0202,051,0301,01,0335,0110,0,
+    /* 13272 */ 0241,0202,051,0301,01,0336,0120,0,
+    /* 13280 */ 0240,0202,051,0301,01,0336,0110,0,
+    /* 13288 */ 0241,0202,051,0301,01,0337,0120,0,
+    /* 13296 */ 0240,0202,051,0301,01,0337,0110,0,
+    /* 13304 */ 0261,03,041,01,015,0120,023,0,
+    /* 13312 */ 0260,03,041,01,015,0110,022,0,
+    /* 13320 */ 0261,03,045,01,015,0120,023,0,
+    /* 13328 */ 0260,03,045,01,015,0110,022,0,
+    /* 13336 */ 0261,03,041,01,014,0120,023,0,
+    /* 13344 */ 0260,03,041,01,014,0110,022,0,
+    /* 13352 */ 0261,03,045,01,014,0120,023,0,
+    /* 13360 */ 0260,03,045,01,014,0110,022,0,
+    /* 13368 */ 0261,03,01,01,0113,0120,0177,0,
+    /* 13376 */ 0260,03,01,01,0113,0110,0176,0,
+    /* 13384 */ 0261,03,05,01,0113,0120,0177,0,
+    /* 13392 */ 0260,03,05,01,0113,0110,0176,0,
+    /* 13400 */ 0261,03,01,01,0112,0120,0177,0,
+    /* 13408 */ 0260,03,01,01,0112,0110,0176,0,
+    /* 13416 */ 0261,03,05,01,0112,0120,0177,0,
+    /* 13424 */ 0260,03,05,01,0112,0110,0176,0,
+    /* 13432 */ 0261,01,041,01,0302,0120,023,0,
+    /* 13440 */ 0260,01,041,01,0302,0110,022,0,
+    /* 13448 */ 0261,01,045,01,0302,0120,023,0,
+    /* 13456 */ 0260,01,045,01,0302,0110,022,0,
+    /* 13464 */ 0261,01,040,01,0302,0120,023,0,
+    /* 13472 */ 0260,01,040,01,0302,0110,022,0,
+    /* 13480 */ 0261,01,044,01,0302,0120,023,0,
+    /* 13488 */ 0260,01,044,01,0302,0110,022,0,
+    /* 13496 */ 0261,01,053,01,0302,0120,023,0,
+    /* 13504 */ 0260,01,053,01,0302,0110,022,0,
+    /* 13512 */ 0261,01,052,01,0302,0120,023,0,
+    /* 13520 */ 0260,01,052,01,0302,0110,022,0,
+    /* 13528 */ 0261,03,041,01,0101,0120,023,0,
+    /* 13536 */ 0260,03,041,01,0101,0110,022,0,
+    /* 13544 */ 0261,03,041,01,0100,0120,023,0,
+    /* 13552 */ 0260,03,041,01,0100,0110,022,0,
+    /* 13560 */ 0261,03,045,01,0100,0120,023,0,
+    /* 13568 */ 0260,03,045,01,0100,0110,022,0,
+    /* 13576 */ 0270,03,05,01,031,0101,022,0,
+    /* 13584 */ 0270,03,041,01,027,0101,022,0,
+    /* 13592 */ 0261,03,05,01,030,0120,023,0,
+    /* 13600 */ 0260,03,05,01,030,0110,022,0,
+    /* 13608 */ 0261,03,041,01,041,0120,023,0,
+    /* 13616 */ 0260,03,041,01,041,0110,022,0,
+    /* 13624 */ 0261,03,041,01,0102,0120,023,0,
+    /* 13632 */ 0260,03,041,01,0102,0110,022,0,
+    /* 13640 */ 0261,03,041,01,017,0120,023,0,
+    /* 13648 */ 0260,03,041,01,017,0110,022,0,
+    /* 13656 */ 0261,03,01,01,0114,0120,0177,0,
+    /* 13664 */ 0260,03,01,01,0114,0110,0176,0,
+    /* 13672 */ 0261,03,041,01,016,0120,023,0,
+    /* 13680 */ 0260,03,041,01,016,0110,022,0,
+    /* 13688 */ 0270,03,041,01,0141,0110,022,0,
+    /* 13696 */ 0270,03,041,01,0140,0110,022,0,
+    /* 13704 */ 0270,03,041,01,0143,0110,022,0,
+    /* 13712 */ 0270,03,041,01,0142,0110,022,0,
+    /* 13720 */ 0270,03,01,01,05,0110,022,0,
+    /* 13728 */ 0270,03,05,01,05,0110,022,0,
+    /* 13736 */ 0270,03,01,01,04,0110,022,0,
+    /* 13744 */ 0270,03,05,01,04,0110,022,0,
+    /* 13752 */ 0261,03,05,01,06,0120,023,0,
+    /* 13760 */ 0260,03,05,01,06,0110,022,0,
+    /* 13768 */ 0270,03,01,01,024,0101,022,0,
+    /* 13776 */ 0270,01,01,01,0305,0110,022,0,
+    /* 13784 */ 0270,03,01,01,025,0101,022,0,
+    /* 13792 */ 0270,03,01,01,026,0101,022,0,
+    /* 13800 */ 0270,03,021,01,026,0101,022,0,
+    /* 13808 */ 0261,03,041,01,040,0120,023,0,
+    /* 13816 */ 0260,03,041,01,040,0110,022,0,
+    /* 13824 */ 0261,01,041,01,0304,0120,023,0,
+    /* 13832 */ 0260,01,041,01,0304,0110,022,0,
+    /* 13840 */ 0261,03,01,01,042,0120,023,0,
+    /* 13848 */ 0260,03,01,01,042,0110,022,0,
+    /* 13856 */ 0261,03,021,01,042,0120,023,0,
+    /* 13864 */ 0260,03,021,01,042,0110,022,0,
+    /* 13872 */ 0270,01,041,01,0160,0110,022,0,
+    /* 13880 */ 0270,01,042,01,0160,0110,022,0,
+    /* 13888 */ 0270,01,043,01,0160,0110,022,0,
+    /* 13896 */ 0260,01,041,01,0163,0217,022,0,
+    /* 13904 */ 0260,01,041,01,0163,0207,021,0,
+    /* 13912 */ 0260,01,041,01,0163,0213,022,0,
+    /* 13920 */ 0260,01,041,01,0163,0203,021,0,
+    /* 13928 */ 0260,01,041,01,0161,0216,022,0,
+    /* 13936 */ 0260,01,041,01,0161,0206,021,0,
+    /* 13944 */ 0260,01,041,01,0162,0216,022,0,
+    /* 13952 */ 0260,01,041,01,0162,0206,021,0,
+    /* 13960 */ 0260,01,041,01,0163,0216,022,0,
+    /* 13968 */ 0260,01,041,01,0163,0206,021,0,
+    /* 13976 */ 0260,01,041,01,0161,0214,022,0,
+    /* 13984 */ 0260,01,041,01,0161,0204,021,0,
+    /* 13992 */ 0260,01,041,01,0162,0214,022,0,
+    /* 14000 */ 0260,01,041,01,0162,0204,021,0,
+    /* 14008 */ 0260,01,041,01,0161,0212,022,0,
+    /* 14016 */ 0260,01,041,01,0161,0202,021,0,
+    /* 14024 */ 0260,01,041,01,0162,0212,022,0,
+    /* 14032 */ 0260,01,041,01,0162,0202,021,0,
+    /* 14040 */ 0260,01,041,01,0163,0212,022,0,
+    /* 14048 */ 0260,01,041,01,0163,0202,021,0,
+    /* 14056 */ 0270,03,041,01,011,0110,022,0,
+    /* 14064 */ 0270,03,045,01,011,0110,022,0,
+    /* 14072 */ 0270,03,041,01,010,0110,022,0,
+    /* 14080 */ 0270,03,045,01,010,0110,022,0,
+    /* 14088 */ 0261,03,041,01,013,0120,023,0,
+    /* 14096 */ 0260,03,041,01,013,0110,022,0,
+    /* 14104 */ 0261,03,041,01,012,0120,023,0,
+    /* 14112 */ 0260,03,041,01,012,0110,022,0,
+    /* 14120 */ 0261,01,041,01,0306,0120,023,0,
+    /* 14128 */ 0260,01,041,01,0306,0110,022,0,
+    /* 14136 */ 0261,01,045,01,0306,0120,023,0,
+    /* 14144 */ 0260,01,045,01,0306,0110,022,0,
+    /* 14152 */ 0261,01,040,01,0306,0120,023,0,
+    /* 14160 */ 0260,01,040,01,0306,0110,022,0,
+    /* 14168 */ 0261,01,044,01,0306,0120,023,0,
+    /* 14176 */ 0260,01,044,01,0306,0110,022,0,
+    /* 14184 */ 0361,03,017,072,0104,0110,022,0,
+    /* 14192 */ 0261,03,041,01,0104,0120,023,0,
+    /* 14200 */ 0260,03,041,01,0104,0110,022,0,
+    /* 14208 */ 0261,03,045,01,0104,0120,023,0,
+    /* 14216 */ 0260,03,045,01,0104,0110,022,0,
+    /* 14224 */ 0270,03,05,01,035,0101,022,0,
+    /* 14232 */ 0270,03,01,01,035,0101,022,0,
+    /* 14240 */ 0317,0361,03,017,070,0366,0110,0,
+    /* 14248 */ 0324,0361,03,017,070,0366,0110,0,
+    /* 14256 */ 0317,0333,03,017,070,0366,0110,0,
+    /* 14264 */ 0324,0333,03,017,070,0366,0110,0,
+    /* 14272 */ 0260,0112,0,01,022,0211,042,0,
+    /* 14280 */ 0260,0112,020,01,022,0211,042,0,
+    /* 14288 */ 0260,0112,0,01,022,0210,042,0,
+    /* 14296 */ 0260,0112,020,01,022,0210,042,0,
+    /* 14304 */ 0261,03,01,01,0151,0120,0177,0,
+    /* 14312 */ 0260,03,01,01,0151,0110,0176,0,
+    /* 14320 */ 0261,03,05,01,0151,0120,0177,0,
+    /* 14328 */ 0260,03,05,01,0151,0110,0176,0,
+    /* 14336 */ 0261,03,021,01,0151,0130,0176,0,
+    /* 14344 */ 0260,03,021,01,0151,0120,0175,0,
+    /* 14352 */ 0261,03,025,01,0151,0130,0176,0,
+    /* 14360 */ 0260,03,025,01,0151,0120,0175,0,
+    /* 14368 */ 0261,03,01,01,0150,0120,0177,0,
+    /* 14376 */ 0260,03,01,01,0150,0110,0176,0,
+    /* 14384 */ 0261,03,05,01,0150,0120,0177,0,
+    /* 14392 */ 0260,03,05,01,0150,0110,0176,0,
+    /* 14400 */ 0261,03,021,01,0150,0130,0176,0,
+    /* 14408 */ 0260,03,021,01,0150,0120,0175,0,
+    /* 14416 */ 0261,03,025,01,0150,0130,0176,0,
+    /* 14424 */ 0260,03,025,01,0150,0120,0175,0,
+    /* 14432 */ 0261,03,01,01,0153,0120,0177,0,
+    /* 14440 */ 0260,03,01,01,0153,0110,0176,0,
+    /* 14448 */ 0261,03,021,01,0153,0130,0176,0,
+    /* 14456 */ 0260,03,021,01,0153,0120,0175,0,
+    /* 14464 */ 0261,03,01,01,0152,0120,0177,0,
+    /* 14472 */ 0260,03,01,01,0152,0110,0176,0,
+    /* 14480 */ 0261,03,021,01,0152,0130,0176,0,
+    /* 14488 */ 0260,03,021,01,0152,0120,0175,0,
+    /* 14496 */ 0261,03,01,01,0135,0120,0177,0,
+    /* 14504 */ 0260,03,01,01,0135,0110,0176,0,
+    /* 14512 */ 0261,03,05,01,0135,0120,0177,0,
+    /* 14520 */ 0260,03,05,01,0135,0110,0176,0,
+    /* 14528 */ 0261,03,021,01,0135,0130,0176,0,
+    /* 14536 */ 0260,03,021,01,0135,0120,0175,0,
+    /* 14544 */ 0261,03,025,01,0135,0130,0176,0,
+    /* 14552 */ 0260,03,025,01,0135,0120,0175,0,
+    /* 14560 */ 0261,03,01,01,0134,0120,0177,0,
+    /* 14568 */ 0260,03,01,01,0134,0110,0176,0,
+    /* 14576 */ 0261,03,05,01,0134,0120,0177,0,
+    /* 14584 */ 0260,03,05,01,0134,0110,0176,0,
+    /* 14592 */ 0261,03,021,01,0134,0130,0176,0,
+    /* 14600 */ 0260,03,021,01,0134,0120,0175,0,
+    /* 14608 */ 0261,03,025,01,0134,0130,0176,0,
+    /* 14616 */ 0260,03,025,01,0134,0120,0175,0,
+    /* 14624 */ 0261,03,01,01,0137,0120,0177,0,
+    /* 14632 */ 0260,03,01,01,0137,0110,0176,0,
+    /* 14640 */ 0261,03,05,01,0137,0120,0177,0,
+    /* 14648 */ 0260,03,05,01,0137,0110,0176,0,
+    /* 14656 */ 0261,03,021,01,0137,0130,0176,0,
+    /* 14664 */ 0260,03,021,01,0137,0120,0175,0,
+    /* 14672 */ 0261,03,025,01,0137,0130,0176,0,
+    /* 14680 */ 0260,03,025,01,0137,0120,0175,0,
+    /* 14688 */ 0261,03,01,01,0136,0120,0177,0,
+    /* 14696 */ 0260,03,01,01,0136,0110,0176,0,
+    /* 14704 */ 0261,03,05,01,0136,0120,0177,0,
+    /* 14712 */ 0260,03,05,01,0136,0110,0176,0,
+    /* 14720 */ 0261,03,021,01,0136,0130,0176,0,
+    /* 14728 */ 0260,03,021,01,0136,0120,0175,0,
+    /* 14736 */ 0261,03,025,01,0136,0130,0176,0,
+    /* 14744 */ 0260,03,025,01,0136,0120,0175,0,
+    /* 14752 */ 0261,03,01,01,0155,0120,0177,0,
+    /* 14760 */ 0260,03,01,01,0155,0110,0176,0,
+    /* 14768 */ 0261,03,05,01,0155,0120,0177,0,
+    /* 14776 */ 0260,03,05,01,0155,0110,0176,0,
+    /* 14784 */ 0261,03,021,01,0155,0130,0176,0,
+    /* 14792 */ 0260,03,021,01,0155,0120,0175,0,
+    /* 14800 */ 0261,03,025,01,0155,0130,0176,0,
+    /* 14808 */ 0260,03,025,01,0155,0120,0175,0,
+    /* 14816 */ 0261,03,01,01,0154,0120,0177,0,
+    /* 14824 */ 0260,03,01,01,0154,0110,0176,0,
+    /* 14832 */ 0261,03,05,01,0154,0120,0177,0,
+    /* 14840 */ 0260,03,05,01,0154,0110,0176,0,
+    /* 14848 */ 0261,03,021,01,0154,0130,0176,0,
+    /* 14856 */ 0260,03,021,01,0154,0120,0175,0,
+    /* 14864 */ 0261,03,025,01,0154,0130,0176,0,
+    /* 14872 */ 0260,03,025,01,0154,0120,0175,0,
+    /* 14880 */ 0261,03,01,01,0157,0120,0177,0,
+    /* 14888 */ 0260,03,01,01,0157,0110,0176,0,
+    /* 14896 */ 0261,03,021,01,0157,0130,0176,0,
+    /* 14904 */ 0260,03,021,01,0157,0120,0175,0,
+    /* 14912 */ 0261,03,01,01,0156,0120,0177,0,
+    /* 14920 */ 0260,03,01,01,0156,0110,0176,0,
+    /* 14928 */ 0261,03,021,01,0156,0130,0176,0,
+    /* 14936 */ 0260,03,021,01,0156,0120,0175,0,
+    /* 14944 */ 0261,03,01,01,0171,0120,0177,0,
+    /* 14952 */ 0260,03,01,01,0171,0110,0176,0,
+    /* 14960 */ 0261,03,05,01,0171,0120,0177,0,
+    /* 14968 */ 0260,03,05,01,0171,0110,0176,0,
+    /* 14976 */ 0261,03,021,01,0171,0130,0176,0,
+    /* 14984 */ 0260,03,021,01,0171,0120,0175,0,
+    /* 14992 */ 0261,03,025,01,0171,0130,0176,0,
+    /* 15000 */ 0260,03,025,01,0171,0120,0175,0,
+    /* 15008 */ 0261,03,01,01,0170,0120,0177,0,
+    /* 15016 */ 0260,03,01,01,0170,0110,0176,0,
+    /* 15024 */ 0261,03,05,01,0170,0120,0177,0,
+    /* 15032 */ 0260,03,05,01,0170,0110,0176,0,
+    /* 15040 */ 0261,03,021,01,0170,0130,0176,0,
+    /* 15048 */ 0260,03,021,01,0170,0120,0175,0,
+    /* 15056 */ 0261,03,025,01,0170,0130,0176,0,
+    /* 15064 */ 0260,03,025,01,0170,0120,0175,0,
+    /* 15072 */ 0261,03,01,01,0173,0120,0177,0,
+    /* 15080 */ 0260,03,01,01,0173,0110,0176,0,
+    /* 15088 */ 0261,03,021,01,0173,0130,0176,0,
+    /* 15096 */ 0260,03,021,01,0173,0120,0175,0,
+    /* 15104 */ 0261,03,01,01,0172,0120,0177,0,
+    /* 15112 */ 0260,03,01,01,0172,0110,0176,0,
+    /* 15120 */ 0261,03,021,01,0172,0130,0176,0,
+    /* 15128 */ 0260,03,021,01,0172,0120,0175,0,
+    /* 15136 */ 0261,03,01,01,0175,0120,0177,0,
+    /* 15144 */ 0260,03,01,01,0175,0110,0176,0,
+    /* 15152 */ 0261,03,05,01,0175,0120,0177,0,
+    /* 15160 */ 0260,03,05,01,0175,0110,0176,0,
+    /* 15168 */ 0261,03,021,01,0175,0130,0176,0,
+    /* 15176 */ 0260,03,021,01,0175,0120,0175,0,
+    /* 15184 */ 0261,03,025,01,0175,0130,0176,0,
+    /* 15192 */ 0260,03,025,01,0175,0120,0175,0,
+    /* 15200 */ 0261,03,01,01,0174,0120,0177,0,
+    /* 15208 */ 0260,03,01,01,0174,0110,0176,0,
+    /* 15216 */ 0261,03,05,01,0174,0120,0177,0,
+    /* 15224 */ 0260,03,05,01,0174,0110,0176,0,
+    /* 15232 */ 0261,03,021,01,0174,0130,0176,0,
+    /* 15240 */ 0260,03,021,01,0174,0120,0175,0,
+    /* 15248 */ 0261,03,025,01,0174,0130,0176,0,
+    /* 15256 */ 0260,03,025,01,0174,0120,0175,0,
+    /* 15264 */ 0261,03,01,01,0177,0120,0177,0,
+    /* 15272 */ 0260,03,01,01,0177,0110,0176,0,
+    /* 15280 */ 0261,03,021,01,0177,0130,0176,0,
+    /* 15288 */ 0260,03,021,01,0177,0120,0175,0,
+    /* 15296 */ 0261,03,01,01,0176,0120,0177,0,
+    /* 15304 */ 0260,03,01,01,0176,0110,0176,0,
+    /* 15312 */ 0261,03,021,01,0176,0130,0176,0,
+    /* 15320 */ 0260,03,021,01,0176,0120,0175,0,
+    /* 15328 */ 0261,0110,0,01,0242,0120,0177,0,
+    /* 15336 */ 0260,0110,0,01,0242,0110,0176,0,
+    /* 15344 */ 0261,0110,04,01,0242,0120,0177,0,
+    /* 15352 */ 0260,0110,04,01,0242,0110,0176,0,
+    /* 15360 */ 0261,0110,020,01,0242,0130,0176,0,
+    /* 15368 */ 0260,0110,020,01,0242,0120,0175,0,
+    /* 15376 */ 0261,0110,024,01,0242,0130,0176,0,
+    /* 15384 */ 0260,0110,024,01,0242,0120,0175,0,
+    /* 15392 */ 0261,0110,0,01,0314,0120,023,0,
+    /* 15400 */ 0260,0110,0,01,0314,0110,022,0,
+    /* 15408 */ 0261,0110,0,01,0316,0120,023,0,
+    /* 15416 */ 0260,0110,0,01,0316,0110,022,0,
+    /* 15424 */ 0261,0110,0,01,0317,0120,023,0,
+    /* 15432 */ 0260,0110,0,01,0317,0110,022,0,
+    /* 15440 */ 0261,0110,0,01,0354,0120,023,0,
+    /* 15448 */ 0260,0110,0,01,0354,0110,022,0,
+    /* 15456 */ 0261,0110,0,01,0356,0120,023,0,
+    /* 15464 */ 0260,0110,0,01,0356,0110,022,0,
+    /* 15472 */ 0261,0110,0,01,0357,0120,023,0,
+    /* 15480 */ 0260,0110,0,01,0357,0110,022,0,
+    /* 15488 */ 0261,0110,0,01,0355,0120,023,0,
+    /* 15496 */ 0260,0110,0,01,0355,0110,022,0,
+    /* 15504 */ 0261,0110,0,01,0315,0120,023,0,
+    /* 15512 */ 0260,0110,0,01,0315,0110,022,0,
+    /* 15520 */ 0261,0110,0,01,0236,0120,0177,0,
+    /* 15528 */ 0260,0110,0,01,0236,0110,0176,0,
+    /* 15536 */ 0261,0110,0,01,0237,0120,0177,0,
+    /* 15544 */ 0260,0110,0,01,0237,0110,0176,0,
+    /* 15552 */ 0261,0110,0,01,0227,0120,0177,0,
+    /* 15560 */ 0260,0110,0,01,0227,0110,0176,0,
+    /* 15568 */ 0261,0110,0,01,0216,0120,0177,0,
+    /* 15576 */ 0260,0110,0,01,0216,0110,0176,0,
+    /* 15584 */ 0261,0110,0,01,0217,0120,0177,0,
+    /* 15592 */ 0260,0110,0,01,0217,0110,0176,0,
+    /* 15600 */ 0261,0110,0,01,0207,0120,0177,0,
+    /* 15608 */ 0260,0110,0,01,0207,0110,0176,0,
+    /* 15616 */ 0261,0110,0,01,0206,0120,0177,0,
+    /* 15624 */ 0260,0110,0,01,0206,0110,0176,0,
+    /* 15632 */ 0261,0110,0,01,0205,0120,0177,0,
+    /* 15640 */ 0260,0110,0,01,0205,0110,0176,0,
+    /* 15648 */ 0261,0110,0,01,0226,0120,0177,0,
+    /* 15656 */ 0260,0110,0,01,0226,0110,0176,0,
+    /* 15664 */ 0261,0110,0,01,0225,0120,0177,0,
+    /* 15672 */ 0260,0110,0,01,0225,0110,0176,0,
+    /* 15680 */ 0261,0110,0,01,0246,0120,0177,0,
+    /* 15688 */ 0260,0110,0,01,0246,0110,0176,0,
+    /* 15696 */ 0261,0110,0,01,0266,0120,0177,0,
+    /* 15704 */ 0260,0110,0,01,0266,0110,0176,0,
+    /* 15712 */ 0261,0110,020,01,0243,0130,0176,0,
+    /* 15720 */ 0260,0110,020,01,0243,0120,0175,0,
+    /* 15728 */ 0261,0110,0,01,0243,0120,0177,0,
+    /* 15736 */ 0260,0110,0,01,0243,0110,0176,0,
+    /* 15744 */ 0270,0110,0,01,0300,0110,022,0,
+    /* 15752 */ 0270,0110,0,01,0300,0100,021,0,
+    /* 15760 */ 0270,0110,0,01,0302,0110,022,0,
+    /* 15768 */ 0270,0110,0,01,0302,0100,021,0,
+    /* 15776 */ 0270,0110,0,01,0303,0110,022,0,
+    /* 15784 */ 0270,0110,0,01,0303,0100,021,0,
+    /* 15792 */ 0270,0110,0,01,0301,0110,022,0,
+    /* 15800 */ 0270,0110,0,01,0301,0100,021,0,
+    /* 15808 */ 0261,03,045,01,0102,0120,023,0,
+    /* 15816 */ 0260,03,045,01,0102,0110,022,0,
+    /* 15824 */ 0261,03,045,01,017,0120,023,0,
+    /* 15832 */ 0260,03,045,01,017,0110,022,0,
+    /* 15840 */ 0261,03,045,01,0114,0120,0177,0,
+    /* 15848 */ 0260,03,045,01,0114,0110,0176,0,
+    /* 15856 */ 0261,03,045,01,016,0120,023,0,
+    /* 15864 */ 0260,03,045,01,016,0110,022,0,
+    /* 15872 */ 0270,01,045,01,0160,0110,022,0,
+    /* 15880 */ 0270,01,046,01,0160,0110,022,0,
+    /* 15888 */ 0270,01,047,01,0160,0110,022,0,
+    /* 15896 */ 0260,01,045,01,0163,0217,022,0,
+    /* 15904 */ 0260,01,045,01,0163,0207,021,0,
+    /* 15912 */ 0260,01,045,01,0161,0216,022,0,
+    /* 15920 */ 0260,01,045,01,0161,0206,021,0,
+    /* 15928 */ 0260,01,045,01,0162,0216,022,0,
+    /* 15936 */ 0260,01,045,01,0162,0206,021,0,
+    /* 15944 */ 0260,01,045,01,0163,0216,022,0,
+    /* 15952 */ 0260,01,045,01,0163,0206,021,0,
+    /* 15960 */ 0260,01,045,01,0161,0214,022,0,
+    /* 15968 */ 0260,01,045,01,0161,0204,021,0,
+    /* 15976 */ 0260,01,045,01,0162,0214,022,0,
+    /* 15984 */ 0260,01,045,01,0162,0204,021,0,
+    /* 15992 */ 0260,01,045,01,0163,0213,022,0,
+    /* 16000 */ 0260,01,045,01,0163,0203,021,0,
+    /* 16008 */ 0260,01,045,01,0161,0212,022,0,
+    /* 16016 */ 0260,01,045,01,0161,0202,021,0,
+    /* 16024 */ 0260,01,045,01,0162,0212,022,0,
+    /* 16032 */ 0260,01,045,01,0162,0202,021,0,
+    /* 16040 */ 0260,01,045,01,0163,0212,022,0,
+    /* 16048 */ 0260,01,045,01,0163,0202,021,0,
+    /* 16056 */ 0261,03,01,01,02,0120,023,0,
+    /* 16064 */ 0260,03,01,01,02,0110,022,0,
+    /* 16072 */ 0261,03,05,01,02,0120,023,0,
+    /* 16080 */ 0260,03,05,01,02,0110,022,0,
+    /* 16088 */ 0270,03,025,01,01,0110,022,0,
+    /* 16096 */ 0270,03,025,01,0,0110,022,0,
+    /* 16104 */ 0261,03,05,01,0106,0120,023,0,
+    /* 16112 */ 0260,03,05,01,0106,0110,022,0,
+    /* 16120 */ 0270,03,05,01,071,0101,022,0,
+    /* 16128 */ 0261,03,05,01,070,0120,023,0,
+    /* 16136 */ 0260,03,05,01,070,0110,022,0,
+    /* 16144 */ 0374,0262,02,021,01,0222,0110,0,
+    /* 16152 */ 0374,0262,02,021,01,0223,0110,0,
+    /* 16160 */ 0374,0262,02,025,01,0222,0110,0,
+    /* 16168 */ 0375,0262,02,025,01,0223,0110,0,
+    /* 16176 */ 0374,0262,02,01,01,0222,0110,0,
+    /* 16184 */ 0374,0262,02,01,01,0223,0110,0,
+    /* 16192 */ 0375,0262,02,05,01,0222,0110,0,
+    /* 16200 */ 0375,0262,02,05,01,0223,0110,0,
+    /* 16208 */ 0374,0262,02,01,01,0220,0110,0,
+    /* 16216 */ 0374,0262,02,01,01,0221,0110,0,
+    /* 16224 */ 0375,0262,02,05,01,0220,0110,0,
+    /* 16232 */ 0375,0262,02,05,01,0221,0110,0,
+    /* 16240 */ 0374,0262,02,021,01,0220,0110,0,
+    /* 16248 */ 0374,0262,02,021,01,0221,0110,0,
+    /* 16256 */ 0374,0262,02,025,01,0220,0110,0,
+    /* 16264 */ 0375,0262,02,025,01,0221,0110,0,
+    /* 16272 */ 0270,0112,0,01,020,0110,042,0,
+    /* 16280 */ 0270,0112,020,01,020,0110,042,0,
+    /* 16288 */ 0270,03,03,01,0360,0110,022,0,
+    /* 16296 */ 0270,03,023,01,0360,0110,022,0,
+    /* 16304 */ 0261,03,01,01,0336,0120,023,0,
+    /* 16312 */ 0270,01,01,01,0222,0325,0110,0,
+    /* 16320 */ 0270,03,01,01,062,0110,022,0,
+    /* 16328 */ 0270,03,01,01,063,0110,022,0,
+    /* 16336 */ 0270,03,021,01,063,0110,022,0,
+    /* 16344 */ 0270,03,021,01,062,0110,022,0,
+    /* 16352 */ 0270,03,01,01,060,0110,022,0,
+    /* 16360 */ 0270,03,01,01,061,0110,022,0,
+    /* 16368 */ 0270,03,021,01,061,0110,022,0,
+    /* 16376 */ 0270,03,021,01,060,0110,022,0,
+    /* 16384 */ 0241,0201,021,0301,01,0130,0120,0,
+    /* 16392 */ 0240,0201,021,0301,01,0130,0110,0,
+    /* 16400 */ 0241,0201,025,0301,01,0130,0120,0,
+    /* 16408 */ 0240,0201,025,0301,01,0130,0110,0,
+    /* 16416 */ 0241,0201,031,0301,01,0130,0120,0,
+    /* 16424 */ 0240,0201,031,0301,01,0130,0110,0,
+    /* 16432 */ 0241,0201,0,0301,01,0130,0120,0,
+    /* 16440 */ 0240,0201,0,0301,01,0130,0110,0,
+    /* 16448 */ 0241,0201,04,0301,01,0130,0120,0,
+    /* 16456 */ 0240,0201,04,0301,01,0130,0110,0,
+    /* 16464 */ 0241,0201,010,0301,01,0130,0120,0,
+    /* 16472 */ 0240,0201,010,0301,01,0130,0110,0,
+    /* 16480 */ 0241,0201,023,0306,01,0130,0120,0,
+    /* 16488 */ 0240,0201,023,0306,01,0130,0110,0,
+    /* 16496 */ 0241,0201,02,0306,01,0130,0120,0,
+    /* 16504 */ 0240,0201,02,0306,01,0130,0110,0,
+    /* 16512 */ 0241,0201,021,0301,01,0125,0120,0,
+    /* 16520 */ 0240,0201,021,0301,01,0125,0110,0,
+    /* 16528 */ 0241,0201,025,0301,01,0125,0120,0,
+    /* 16536 */ 0240,0201,025,0301,01,0125,0110,0,
+    /* 16544 */ 0241,0201,031,0301,01,0125,0120,0,
+    /* 16552 */ 0240,0201,031,0301,01,0125,0110,0,
+    /* 16560 */ 0241,0201,0,0301,01,0125,0120,0,
+    /* 16568 */ 0240,0201,0,0301,01,0125,0110,0,
+    /* 16576 */ 0241,0201,04,0301,01,0125,0120,0,
+    /* 16584 */ 0240,0201,04,0301,01,0125,0110,0,
+    /* 16592 */ 0241,0201,010,0301,01,0125,0120,0,
+    /* 16600 */ 0240,0201,010,0301,01,0125,0110,0,
+    /* 16608 */ 0241,0201,021,0301,01,0124,0120,0,
+    /* 16616 */ 0240,0201,021,0301,01,0124,0110,0,
+    /* 16624 */ 0241,0201,025,0301,01,0124,0120,0,
+    /* 16632 */ 0240,0201,025,0301,01,0124,0110,0,
+    /* 16640 */ 0241,0201,031,0301,01,0124,0120,0,
+    /* 16648 */ 0240,0201,031,0301,01,0124,0110,0,
+    /* 16656 */ 0241,0201,0,0301,01,0124,0120,0,
+    /* 16664 */ 0240,0201,0,0301,01,0124,0110,0,
+    /* 16672 */ 0241,0201,04,0301,01,0124,0120,0,
+    /* 16680 */ 0240,0201,04,0301,01,0124,0110,0,
+    /* 16688 */ 0241,0201,010,0301,01,0124,0120,0,
+    /* 16696 */ 0240,0201,010,0301,01,0124,0110,0,
+    /* 16704 */ 0241,0202,021,0301,01,0145,0120,0,
+    /* 16712 */ 0241,0202,025,0301,01,0145,0120,0,
+    /* 16720 */ 0241,0202,031,0301,01,0145,0120,0,
+    /* 16728 */ 0241,0202,01,0301,01,0145,0120,0,
+    /* 16736 */ 0241,0202,05,0301,01,0145,0120,0,
+    /* 16744 */ 0241,0202,011,0301,01,0145,0120,0,
+    /* 16752 */ 0250,0202,05,0311,01,031,0110,0,
+    /* 16760 */ 0250,0202,011,0311,01,031,0110,0,
+    /* 16768 */ 0250,0202,05,0312,01,032,0110,0,
+    /* 16776 */ 0250,0202,011,0312,01,032,0110,0,
+    /* 16784 */ 0250,0202,011,0313,01,033,0110,0,
+    /* 16792 */ 0250,0202,025,0311,01,032,0110,0,
+    /* 16800 */ 0250,0202,031,0311,01,032,0110,0,
+    /* 16808 */ 0250,0202,031,0312,01,033,0110,0,
+    /* 16816 */ 0250,0202,01,0311,01,0131,0110,0,
+    /* 16824 */ 0250,0202,05,0311,01,0131,0110,0,
+    /* 16832 */ 0250,0202,011,0311,01,0131,0110,0,
+    /* 16840 */ 0250,0202,05,0312,01,0132,0110,0,
+    /* 16848 */ 0250,0202,011,0312,01,0132,0110,0,
+    /* 16856 */ 0250,0202,011,0313,01,0133,0110,0,
+    /* 16864 */ 0250,0202,025,0311,01,0132,0110,0,
+    /* 16872 */ 0250,0202,031,0311,01,0132,0110,0,
+    /* 16880 */ 0250,0202,031,0312,01,0133,0110,0,
+    /* 16888 */ 0250,0202,025,0306,01,031,0110,0,
+    /* 16896 */ 0250,0202,031,0306,01,031,0110,0,
+    /* 16904 */ 0250,0202,025,0300,01,031,0110,0,
+    /* 16912 */ 0250,0202,031,0300,01,031,0110,0,
+    /* 16920 */ 0250,0202,01,0306,01,030,0110,0,
+    /* 16928 */ 0250,0202,05,0306,01,030,0110,0,
+    /* 16936 */ 0250,0202,011,0306,01,030,0110,0,
+    /* 16944 */ 0250,0202,01,0300,01,030,0110,0,
+    /* 16952 */ 0250,0202,05,0300,01,030,0110,0,
+    /* 16960 */ 0250,0202,011,0300,01,030,0110,0,
+    /* 16968 */ 0250,0201,021,0306,01,057,0110,0,
+    /* 16976 */ 0250,0201,0,0306,01,057,0110,0,
+    /* 16984 */ 0250,0202,021,0306,01,0212,0101,0,
+    /* 16992 */ 0250,0202,025,0306,01,0212,0101,0,
+    /* 17000 */ 0250,0202,031,0306,01,0212,0101,0,
+    /* 17008 */ 0250,0202,021,0300,01,0212,0101,0,
+    /* 17016 */ 0250,0202,025,0300,01,0212,0101,0,
+    /* 17024 */ 0250,0202,031,0300,01,0212,0101,0,
+    /* 17032 */ 0250,0202,01,0306,01,0212,0101,0,
+    /* 17040 */ 0250,0202,05,0306,01,0212,0101,0,
+    /* 17048 */ 0250,0202,011,0306,01,0212,0101,0,
+    /* 17056 */ 0250,0202,01,0300,01,0212,0101,0,
+    /* 17064 */ 0250,0202,05,0300,01,0212,0101,0,
+    /* 17072 */ 0250,0202,011,0300,01,0212,0101,0,
+    /* 17080 */ 0250,0201,02,0302,01,0346,0110,0,
+    /* 17088 */ 0250,0201,06,0302,01,0346,0110,0,
+    /* 17096 */ 0250,0201,012,0302,01,0346,0110,0,
+    /* 17104 */ 0250,0201,0,0301,01,0133,0110,0,
+    /* 17112 */ 0250,0201,04,0301,01,0133,0110,0,
+    /* 17120 */ 0250,0201,010,0301,01,0133,0110,0,
+    /* 17128 */ 0250,0201,023,0301,01,0346,0110,0,
+    /* 17136 */ 0250,0201,027,0301,01,0346,0110,0,
+    /* 17144 */ 0250,0201,033,0301,01,0346,0110,0,
+    /* 17152 */ 0250,0201,021,0301,01,0132,0110,0,
+    /* 17160 */ 0250,0201,025,0301,01,0132,0110,0,
+    /* 17168 */ 0250,0201,031,0301,01,0132,0110,0,
+    /* 17176 */ 0250,0201,021,0301,01,0173,0110,0,
+    /* 17184 */ 0250,0201,025,0301,01,0173,0110,0,
+    /* 17192 */ 0250,0201,031,0301,01,0173,0110,0,
+    /* 17200 */ 0250,0201,020,0301,01,0171,0110,0,
+    /* 17208 */ 0250,0201,024,0301,01,0171,0110,0,
+    /* 17216 */ 0250,0201,030,0301,01,0171,0110,0,
+    /* 17224 */ 0250,0201,021,0301,01,0171,0110,0,
+    /* 17232 */ 0250,0201,025,0301,01,0171,0110,0,
+    /* 17240 */ 0250,0201,031,0301,01,0171,0110,0,
+    /* 17248 */ 0250,0202,01,0314,01,023,0110,0,
+    /* 17256 */ 0250,0202,05,0314,01,023,0110,0,
+    /* 17264 */ 0250,0202,011,0314,01,023,0110,0,
+    /* 17272 */ 0250,0201,01,0301,01,0133,0110,0,
+    /* 17280 */ 0250,0201,05,0301,01,0133,0110,0,
+    /* 17288 */ 0250,0201,011,0301,01,0133,0110,0,
+    /* 17296 */ 0250,0201,0,0302,01,0132,0110,0,
+    /* 17304 */ 0250,0201,04,0302,01,0132,0110,0,
+    /* 17312 */ 0250,0201,010,0302,01,0132,0110,0,
+    /* 17320 */ 0250,0201,01,0302,01,0173,0110,0,
+    /* 17328 */ 0250,0201,05,0302,01,0173,0110,0,
+    /* 17336 */ 0250,0201,011,0302,01,0173,0110,0,
+    /* 17344 */ 0250,0201,0,0301,01,0171,0110,0,
+    /* 17352 */ 0250,0201,04,0301,01,0171,0110,0,
+    /* 17360 */ 0250,0201,010,0301,01,0171,0110,0,
+    /* 17368 */ 0250,0201,01,0302,01,0171,0110,0,
+    /* 17376 */ 0250,0201,05,0302,01,0171,0110,0,
+    /* 17384 */ 0250,0201,011,0302,01,0171,0110,0,
+    /* 17392 */ 0250,0201,022,0301,01,0346,0110,0,
+    /* 17400 */ 0250,0201,026,0301,01,0346,0110,0,
+    /* 17408 */ 0250,0201,032,0301,01,0346,0110,0,
+    /* 17416 */ 0250,0201,020,0301,01,0133,0110,0,
+    /* 17424 */ 0250,0201,024,0301,01,0133,0110,0,
+    /* 17432 */ 0250,0201,030,0301,01,0133,0110,0,
+    /* 17440 */ 0250,0201,03,0310,01,055,0110,0,
+    /* 17448 */ 0250,0201,023,0310,01,055,0110,0,
+    /* 17456 */ 0241,0201,023,0306,01,0132,0120,0,
+    /* 17464 */ 0250,0201,03,0310,01,0171,0110,0,
+    /* 17472 */ 0250,0201,023,0310,01,0171,0110,0,
+    /* 17480 */ 0241,0201,03,0306,01,052,0120,0,
+    /* 17488 */ 0241,0201,023,0306,01,052,0120,0,
+    /* 17496 */ 0241,0201,02,0306,01,052,0120,0,
+    /* 17504 */ 0241,0201,022,0306,01,052,0120,0,
+    /* 17512 */ 0241,0201,02,0306,01,0132,0120,0,
+    /* 17520 */ 0250,0201,02,0307,01,055,0110,0,
+    /* 17528 */ 0250,0201,022,0307,01,055,0110,0,
+    /* 17536 */ 0250,0201,02,0307,01,0171,0110,0,
+    /* 17544 */ 0250,0201,022,0307,01,0171,0110,0,
+    /* 17552 */ 0250,0201,021,0301,01,0346,0110,0,
+    /* 17560 */ 0250,0201,025,0301,01,0346,0110,0,
+    /* 17568 */ 0250,0201,031,0301,01,0346,0110,0,
+    /* 17576 */ 0250,0201,021,0301,01,0172,0110,0,
+    /* 17584 */ 0250,0201,025,0301,01,0172,0110,0,
+    /* 17592 */ 0250,0201,031,0301,01,0172,0110,0,
+    /* 17600 */ 0250,0201,020,0301,01,0170,0110,0,
+    /* 17608 */ 0250,0201,024,0301,01,0170,0110,0,
+    /* 17616 */ 0250,0201,030,0301,01,0170,0110,0,
+    /* 17624 */ 0250,0201,021,0301,01,0170,0110,0,
+    /* 17632 */ 0250,0201,025,0301,01,0170,0110,0,
+    /* 17640 */ 0250,0201,031,0301,01,0170,0110,0,
+    /* 17648 */ 0250,0201,02,0301,01,0133,0110,0,
+    /* 17656 */ 0250,0201,06,0301,01,0133,0110,0,
+    /* 17664 */ 0250,0201,012,0301,01,0133,0110,0,
+    /* 17672 */ 0250,0201,01,0302,01,0172,0110,0,
+    /* 17680 */ 0250,0201,05,0302,01,0172,0110,0,
+    /* 17688 */ 0250,0201,011,0302,01,0172,0110,0,
+    /* 17696 */ 0250,0201,0,0301,01,0170,0110,0,
+    /* 17704 */ 0250,0201,04,0301,01,0170,0110,0,
+    /* 17712 */ 0250,0201,010,0301,01,0170,0110,0,
+    /* 17720 */ 0250,0201,01,0302,01,0170,0110,0,
+    /* 17728 */ 0250,0201,05,0302,01,0170,0110,0,
+    /* 17736 */ 0250,0201,011,0302,01,0170,0110,0,
+    /* 17744 */ 0250,0201,03,0310,01,054,0110,0,
+    /* 17752 */ 0250,0201,023,0310,01,054,0110,0,
+    /* 17760 */ 0250,0201,03,0310,01,0170,0110,0,
+    /* 17768 */ 0250,0201,023,0310,01,0170,0110,0,
+    /* 17776 */ 0250,0201,02,0307,01,054,0110,0,
+    /* 17784 */ 0250,0201,022,0307,01,054,0110,0,
+    /* 17792 */ 0250,0201,02,0307,01,0170,0110,0,
+    /* 17800 */ 0250,0201,022,0307,01,0170,0110,0,
+    /* 17808 */ 0250,0201,02,0302,01,0172,0110,0,
+    /* 17816 */ 0250,0201,06,0302,01,0172,0110,0,
+    /* 17824 */ 0250,0201,012,0302,01,0172,0110,0,
+    /* 17832 */ 0250,0201,03,0301,01,0172,0110,0,
+    /* 17840 */ 0250,0201,07,0301,01,0172,0110,0,
+    /* 17848 */ 0250,0201,013,0301,01,0172,0110,0,
+    /* 17856 */ 0250,0201,022,0301,01,0172,0110,0,
+    /* 17864 */ 0250,0201,026,0301,01,0172,0110,0,
+    /* 17872 */ 0250,0201,032,0301,01,0172,0110,0,
+    /* 17880 */ 0250,0201,023,0301,01,0172,0110,0,
+    /* 17888 */ 0250,0201,027,0301,01,0172,0110,0,
+    /* 17896 */ 0250,0201,033,0301,01,0172,0110,0,
+    /* 17904 */ 0241,0201,03,0306,01,0173,0120,0,
+    /* 17912 */ 0241,0201,023,0306,01,0173,0120,0,
+    /* 17920 */ 0241,0201,02,0306,01,0173,0120,0,
+    /* 17928 */ 0241,0201,022,0306,01,0173,0120,0,
+    /* 17936 */ 0241,0201,021,0301,01,0136,0120,0,
+    /* 17944 */ 0240,0201,021,0301,01,0136,0110,0,
+    /* 17952 */ 0241,0201,025,0301,01,0136,0120,0,
+    /* 17960 */ 0240,0201,025,0301,01,0136,0110,0,
+    /* 17968 */ 0241,0201,031,0301,01,0136,0120,0,
+    /* 17976 */ 0240,0201,031,0301,01,0136,0110,0,
+    /* 17984 */ 0241,0201,0,0301,01,0136,0120,0,
+    /* 17992 */ 0240,0201,0,0301,01,0136,0110,0,
+    /* 18000 */ 0241,0201,04,0301,01,0136,0120,0,
+    /* 18008 */ 0240,0201,04,0301,01,0136,0110,0,
+    /* 18016 */ 0241,0201,010,0301,01,0136,0120,0,
+    /* 18024 */ 0240,0201,010,0301,01,0136,0110,0,
+    /* 18032 */ 0241,0201,023,0306,01,0136,0120,0,
+    /* 18040 */ 0240,0201,023,0306,01,0136,0110,0,
+    /* 18048 */ 0241,0201,02,0306,01,0136,0120,0,
+    /* 18056 */ 0240,0201,02,0306,01,0136,0110,0,
+    /* 18064 */ 0250,0202,031,0301,01,0310,0110,0,
+    /* 18072 */ 0250,0202,011,0301,01,0310,0110,0,
+    /* 18080 */ 0250,0202,021,0306,01,0210,0110,0,
+    /* 18088 */ 0250,0202,025,0306,01,0210,0110,0,
+    /* 18096 */ 0250,0202,031,0306,01,0210,0110,0,
+    /* 18104 */ 0250,0202,01,0306,01,0210,0110,0,
+    /* 18112 */ 0250,0202,05,0306,01,0210,0110,0,
+    /* 18120 */ 0250,0202,011,0306,01,0210,0110,0,
+    /* 18128 */ 0241,0202,021,0301,01,0230,0120,0,
+    /* 18136 */ 0241,0202,025,0301,01,0230,0120,0,
+    /* 18144 */ 0241,0202,031,0301,01,0230,0120,0,
+    /* 18152 */ 0241,0202,01,0301,01,0230,0120,0,
+    /* 18160 */ 0241,0202,05,0301,01,0230,0120,0,
+    /* 18168 */ 0241,0202,011,0301,01,0230,0120,0,
+    /* 18176 */ 0241,0202,021,0306,01,0231,0120,0,
+    /* 18184 */ 0241,0202,01,0306,01,0231,0120,0,
+    /* 18192 */ 0241,0202,021,0301,01,0250,0120,0,
+    /* 18200 */ 0241,0202,025,0301,01,0250,0120,0,
+    /* 18208 */ 0241,0202,031,0301,01,0250,0120,0,
+    /* 18216 */ 0241,0202,01,0301,01,0250,0120,0,
+    /* 18224 */ 0241,0202,05,0301,01,0250,0120,0,
+    /* 18232 */ 0241,0202,011,0301,01,0250,0120,0,
+    /* 18240 */ 0241,0202,021,0306,01,0251,0120,0,
+    /* 18248 */ 0241,0202,01,0306,01,0251,0120,0,
+    /* 18256 */ 0241,0202,021,0301,01,0270,0120,0,
+    /* 18264 */ 0241,0202,025,0301,01,0270,0120,0,
+    /* 18272 */ 0241,0202,031,0301,01,0270,0120,0,
+    /* 18280 */ 0241,0202,01,0301,01,0270,0120,0,
+    /* 18288 */ 0241,0202,05,0301,01,0270,0120,0,
+    /* 18296 */ 0241,0202,011,0301,01,0270,0120,0,
+    /* 18304 */ 0241,0202,021,0306,01,0271,0120,0,
+    /* 18312 */ 0241,0202,01,0306,01,0271,0120,0,
+    /* 18320 */ 0241,0202,021,0301,01,0226,0120,0,
+    /* 18328 */ 0241,0202,025,0301,01,0226,0120,0,
+    /* 18336 */ 0241,0202,031,0301,01,0226,0120,0,
+    /* 18344 */ 0241,0202,01,0301,01,0226,0120,0,
+    /* 18352 */ 0241,0202,05,0301,01,0226,0120,0,
+    /* 18360 */ 0241,0202,011,0301,01,0226,0120,0,
+    /* 18368 */ 0241,0202,021,0301,01,0246,0120,0,
+    /* 18376 */ 0241,0202,025,0301,01,0246,0120,0,
+    /* 18384 */ 0241,0202,031,0301,01,0246,0120,0,
+    /* 18392 */ 0241,0202,01,0301,01,0246,0120,0,
+    /* 18400 */ 0241,0202,05,0301,01,0246,0120,0,
+    /* 18408 */ 0241,0202,011,0301,01,0246,0120,0,
+    /* 18416 */ 0241,0202,021,0301,01,0266,0120,0,
+    /* 18424 */ 0241,0202,025,0301,01,0266,0120,0,
+    /* 18432 */ 0241,0202,031,0301,01,0266,0120,0,
+    /* 18440 */ 0241,0202,01,0301,01,0266,0120,0,
+    /* 18448 */ 0241,0202,05,0301,01,0266,0120,0,
+    /* 18456 */ 0241,0202,011,0301,01,0266,0120,0,
+    /* 18464 */ 0241,0202,021,0301,01,0232,0120,0,
+    /* 18472 */ 0241,0202,025,0301,01,0232,0120,0,
+    /* 18480 */ 0241,0202,031,0301,01,0232,0120,0,
+    /* 18488 */ 0241,0202,01,0301,01,0232,0120,0,
+    /* 18496 */ 0241,0202,05,0301,01,0232,0120,0,
+    /* 18504 */ 0241,0202,011,0301,01,0232,0120,0,
+    /* 18512 */ 0241,0202,021,0306,01,0233,0120,0,
+    /* 18520 */ 0241,0202,01,0306,01,0233,0120,0,
+    /* 18528 */ 0241,0202,021,0301,01,0252,0120,0,
+    /* 18536 */ 0241,0202,025,0301,01,0252,0120,0,
+    /* 18544 */ 0241,0202,031,0301,01,0252,0120,0,
+    /* 18552 */ 0241,0202,01,0301,01,0252,0120,0,
+    /* 18560 */ 0241,0202,05,0301,01,0252,0120,0,
+    /* 18568 */ 0241,0202,011,0301,01,0252,0120,0,
+    /* 18576 */ 0241,0202,021,0306,01,0253,0120,0,
+    /* 18584 */ 0241,0202,01,0306,01,0253,0120,0,
+    /* 18592 */ 0241,0202,021,0301,01,0272,0120,0,
+    /* 18600 */ 0241,0202,025,0301,01,0272,0120,0,
+    /* 18608 */ 0241,0202,031,0301,01,0272,0120,0,
+    /* 18616 */ 0241,0202,01,0301,01,0272,0120,0,
+    /* 18624 */ 0241,0202,05,0301,01,0272,0120,0,
+    /* 18632 */ 0241,0202,011,0301,01,0272,0120,0,
+    /* 18640 */ 0241,0202,021,0306,01,0273,0120,0,
+    /* 18648 */ 0241,0202,01,0306,01,0273,0120,0,
+    /* 18656 */ 0241,0202,021,0301,01,0227,0120,0,
+    /* 18664 */ 0241,0202,025,0301,01,0227,0120,0,
+    /* 18672 */ 0241,0202,031,0301,01,0227,0120,0,
+    /* 18680 */ 0241,0202,01,0301,01,0227,0120,0,
+    /* 18688 */ 0241,0202,05,0301,01,0227,0120,0,
+    /* 18696 */ 0241,0202,011,0301,01,0227,0120,0,
+    /* 18704 */ 0241,0202,021,0301,01,0247,0120,0,
+    /* 18712 */ 0241,0202,025,0301,01,0247,0120,0,
+    /* 18720 */ 0241,0202,031,0301,01,0247,0120,0,
+    /* 18728 */ 0241,0202,01,0301,01,0247,0120,0,
+    /* 18736 */ 0241,0202,05,0301,01,0247,0120,0,
+    /* 18744 */ 0241,0202,011,0301,01,0247,0120,0,
+    /* 18752 */ 0241,0202,021,0301,01,0267,0120,0,
+    /* 18760 */ 0241,0202,025,0301,01,0267,0120,0,
+    /* 18768 */ 0241,0202,031,0301,01,0267,0120,0,
+    /* 18776 */ 0241,0202,01,0301,01,0267,0120,0,
+    /* 18784 */ 0241,0202,05,0301,01,0267,0120,0,
+    /* 18792 */ 0241,0202,011,0301,01,0267,0120,0,
+    /* 18800 */ 0241,0202,021,0301,01,0234,0120,0,
+    /* 18808 */ 0241,0202,025,0301,01,0234,0120,0,
+    /* 18816 */ 0241,0202,031,0301,01,0234,0120,0,
+    /* 18824 */ 0241,0202,01,0301,01,0234,0120,0,
+    /* 18832 */ 0241,0202,05,0301,01,0234,0120,0,
+    /* 18840 */ 0241,0202,011,0301,01,0234,0120,0,
+    /* 18848 */ 0241,0202,021,0306,01,0235,0120,0,
+    /* 18856 */ 0241,0202,01,0306,01,0235,0120,0,
+    /* 18864 */ 0241,0202,021,0301,01,0254,0120,0,
+    /* 18872 */ 0241,0202,025,0301,01,0254,0120,0,
+    /* 18880 */ 0241,0202,031,0301,01,0254,0120,0,
+    /* 18888 */ 0241,0202,01,0301,01,0254,0120,0,
+    /* 18896 */ 0241,0202,05,0301,01,0254,0120,0,
+    /* 18904 */ 0241,0202,011,0301,01,0254,0120,0,
+    /* 18912 */ 0241,0202,021,0306,01,0255,0120,0,
+    /* 18920 */ 0241,0202,01,0306,01,0255,0120,0,
+    /* 18928 */ 0241,0202,021,0301,01,0274,0120,0,
+    /* 18936 */ 0241,0202,025,0301,01,0274,0120,0,
+    /* 18944 */ 0241,0202,031,0301,01,0274,0120,0,
+    /* 18952 */ 0241,0202,01,0301,01,0274,0120,0,
+    /* 18960 */ 0241,0202,05,0301,01,0274,0120,0,
+    /* 18968 */ 0241,0202,011,0301,01,0274,0120,0,
+    /* 18976 */ 0241,0202,021,0306,01,0275,0120,0,
+    /* 18984 */ 0241,0202,01,0306,01,0275,0120,0,
+    /* 18992 */ 0241,0202,021,0301,01,0236,0120,0,
+    /* 19000 */ 0241,0202,025,0301,01,0236,0120,0,
+    /* 19008 */ 0241,0202,031,0301,01,0236,0120,0,
+    /* 19016 */ 0241,0202,01,0301,01,0236,0120,0,
+    /* 19024 */ 0241,0202,05,0301,01,0236,0120,0,
+    /* 19032 */ 0241,0202,011,0301,01,0236,0120,0,
+    /* 19040 */ 0241,0202,021,0306,01,0237,0120,0,
+    /* 19048 */ 0241,0202,01,0306,01,0237,0120,0,
+    /* 19056 */ 0241,0202,021,0301,01,0256,0120,0,
+    /* 19064 */ 0241,0202,025,0301,01,0256,0120,0,
+    /* 19072 */ 0241,0202,031,0301,01,0256,0120,0,
+    /* 19080 */ 0241,0202,01,0301,01,0256,0120,0,
+    /* 19088 */ 0241,0202,05,0301,01,0256,0120,0,
+    /* 19096 */ 0241,0202,011,0301,01,0256,0120,0,
+    /* 19104 */ 0241,0202,021,0306,01,0257,0120,0,
+    /* 19112 */ 0241,0202,01,0306,01,0257,0120,0,
+    /* 19120 */ 0241,0202,021,0301,01,0276,0120,0,
+    /* 19128 */ 0241,0202,025,0301,01,0276,0120,0,
+    /* 19136 */ 0241,0202,031,0301,01,0276,0120,0,
+    /* 19144 */ 0241,0202,01,0301,01,0276,0120,0,
+    /* 19152 */ 0241,0202,05,0301,01,0276,0120,0,
+    /* 19160 */ 0241,0202,011,0301,01,0276,0120,0,
+    /* 19168 */ 0241,0202,021,0306,01,0277,0120,0,
+    /* 19176 */ 0241,0202,01,0306,01,0277,0120,0,
+    /* 19184 */ 0250,0202,021,0301,01,0102,0110,0,
+    /* 19192 */ 0250,0202,025,0301,01,0102,0110,0,
+    /* 19200 */ 0250,0202,031,0301,01,0102,0110,0,
+    /* 19208 */ 0250,0202,01,0301,01,0102,0110,0,
+    /* 19216 */ 0250,0202,05,0301,01,0102,0110,0,
+    /* 19224 */ 0250,0202,011,0301,01,0102,0110,0,
+    /* 19232 */ 0241,0202,021,0306,01,0103,0120,0,
+    /* 19240 */ 0241,0202,01,0306,01,0103,0120,0,
+    /* 19248 */ 0241,0201,021,0301,01,0137,0120,0,
+    /* 19256 */ 0240,0201,021,0301,01,0137,0110,0,
+    /* 19264 */ 0241,0201,025,0301,01,0137,0120,0,
+    /* 19272 */ 0240,0201,025,0301,01,0137,0110,0,
+    /* 19280 */ 0241,0201,031,0301,01,0137,0120,0,
+    /* 19288 */ 0240,0201,031,0301,01,0137,0110,0,
+    /* 19296 */ 0241,0201,0,0301,01,0137,0120,0,
+    /* 19304 */ 0240,0201,0,0301,01,0137,0110,0,
+    /* 19312 */ 0241,0201,04,0301,01,0137,0120,0,
+    /* 19320 */ 0240,0201,04,0301,01,0137,0110,0,
+    /* 19328 */ 0241,0201,010,0301,01,0137,0120,0,
+    /* 19336 */ 0240,0201,010,0301,01,0137,0110,0,
+    /* 19344 */ 0241,0201,023,0306,01,0137,0120,0,
+    /* 19352 */ 0240,0201,023,0306,01,0137,0110,0,
+    /* 19360 */ 0241,0201,02,0306,01,0137,0120,0,
+    /* 19368 */ 0240,0201,02,0306,01,0137,0110,0,
+    /* 19376 */ 0241,0201,021,0301,01,0135,0120,0,
+    /* 19384 */ 0240,0201,021,0301,01,0135,0110,0,
+    /* 19392 */ 0241,0201,025,0301,01,0135,0120,0,
+    /* 19400 */ 0240,0201,025,0301,01,0135,0110,0,
+    /* 19408 */ 0241,0201,031,0301,01,0135,0120,0,
+    /* 19416 */ 0240,0201,031,0301,01,0135,0110,0,
+    /* 19424 */ 0241,0201,0,0301,01,0135,0120,0,
+    /* 19432 */ 0240,0201,0,0301,01,0135,0110,0,
+    /* 19440 */ 0241,0201,04,0301,01,0135,0120,0,
+    /* 19448 */ 0240,0201,04,0301,01,0135,0110,0,
+    /* 19456 */ 0241,0201,010,0301,01,0135,0120,0,
+    /* 19464 */ 0240,0201,010,0301,01,0135,0110,0,
+    /* 19472 */ 0241,0201,023,0306,01,0135,0120,0,
+    /* 19480 */ 0240,0201,023,0306,01,0135,0110,0,
+    /* 19488 */ 0241,0201,02,0306,01,0135,0120,0,
+    /* 19496 */ 0240,0201,02,0306,01,0135,0110,0,
+    /* 19504 */ 0250,0201,021,0303,01,050,0110,0,
+    /* 19512 */ 0250,0201,025,0303,01,050,0110,0,
+    /* 19520 */ 0250,0201,031,0303,01,050,0110,0,
+    /* 19528 */ 0250,0201,021,0300,01,051,0101,0,
+    /* 19536 */ 0250,0201,025,0300,01,051,0101,0,
+    /* 19544 */ 0250,0201,031,0300,01,051,0101,0,
+    /* 19552 */ 0250,0201,021,0303,01,051,0101,0,
+    /* 19560 */ 0250,0201,025,0303,01,051,0101,0,
+    /* 19568 */ 0250,0201,031,0303,01,051,0101,0,
+    /* 19576 */ 0250,0201,0,0303,01,050,0110,0,
+    /* 19584 */ 0250,0201,04,0303,01,050,0110,0,
+    /* 19592 */ 0250,0201,010,0303,01,050,0110,0,
+    /* 19600 */ 0250,0201,0,0300,01,051,0101,0,
+    /* 19608 */ 0250,0201,04,0300,01,051,0101,0,
+    /* 19616 */ 0250,0201,010,0300,01,051,0101,0,
+    /* 19624 */ 0250,0201,0,0303,01,051,0101,0,
+    /* 19632 */ 0250,0201,04,0303,01,051,0101,0,
+    /* 19640 */ 0250,0201,010,0303,01,051,0101,0,
+    /* 19648 */ 0250,0201,01,0306,01,0156,0110,0,
+    /* 19656 */ 0250,0201,01,0306,01,0176,0101,0,
+    /* 19664 */ 0250,0201,023,0320,01,022,0110,0,
+    /* 19672 */ 0250,0201,027,0320,01,022,0110,0,
+    /* 19680 */ 0250,0201,033,0320,01,022,0110,0,
+    /* 19688 */ 0250,0201,01,0303,01,0157,0110,0,
+    /* 19696 */ 0250,0201,05,0303,01,0157,0110,0,
+    /* 19704 */ 0250,0201,011,0303,01,0157,0110,0,
+    /* 19712 */ 0250,0201,01,0303,01,0177,0101,0,
+    /* 19720 */ 0250,0201,05,0303,01,0177,0101,0,
+    /* 19728 */ 0250,0201,011,0303,01,0177,0101,0,
+    /* 19736 */ 0250,0201,021,0303,01,0157,0110,0,
+    /* 19744 */ 0250,0201,025,0303,01,0157,0110,0,
+    /* 19752 */ 0250,0201,031,0303,01,0157,0110,0,
+    /* 19760 */ 0250,0201,021,0303,01,0177,0101,0,
+    /* 19768 */ 0250,0201,025,0303,01,0177,0101,0,
+    /* 19776 */ 0250,0201,031,0303,01,0177,0101,0,
+    /* 19784 */ 0250,0201,023,0303,01,0157,0110,0,
+    /* 19792 */ 0250,0201,027,0303,01,0157,0110,0,
+    /* 19800 */ 0250,0201,033,0303,01,0157,0110,0,
+    /* 19808 */ 0250,0201,023,0303,01,0177,0101,0,
+    /* 19816 */ 0250,0201,027,0303,01,0177,0101,0,
+    /* 19824 */ 0250,0201,033,0303,01,0177,0101,0,
+    /* 19832 */ 0250,0201,02,0303,01,0157,0110,0,
+    /* 19840 */ 0250,0201,06,0303,01,0157,0110,0,
+    /* 19848 */ 0250,0201,012,0303,01,0157,0110,0,
+    /* 19856 */ 0250,0201,02,0303,01,0177,0101,0,
+    /* 19864 */ 0250,0201,06,0303,01,0177,0101,0,
+    /* 19872 */ 0250,0201,012,0303,01,0177,0101,0,
+    /* 19880 */ 0250,0201,022,0303,01,0157,0110,0,
+    /* 19888 */ 0250,0201,026,0303,01,0157,0110,0,
+    /* 19896 */ 0250,0201,032,0303,01,0157,0110,0,
+    /* 19904 */ 0250,0201,022,0303,01,0177,0101,0,
+    /* 19912 */ 0250,0201,026,0303,01,0177,0101,0,
+    /* 19920 */ 0250,0201,032,0303,01,0177,0101,0,
+    /* 19928 */ 0250,0201,03,0303,01,0157,0110,0,
+    /* 19936 */ 0250,0201,07,0303,01,0157,0110,0,
+    /* 19944 */ 0250,0201,013,0303,01,0157,0110,0,
+    /* 19952 */ 0250,0201,03,0303,01,0177,0101,0,
+    /* 19960 */ 0250,0201,07,0303,01,0177,0101,0,
+    /* 19968 */ 0250,0201,013,0303,01,0177,0101,0,
+    /* 19976 */ 0241,0201,0,0300,01,022,0120,0,
+    /* 19984 */ 0240,0201,0,0300,01,022,0110,0,
+    /* 19992 */ 0241,0201,021,0306,01,026,0120,0,
+    /* 20000 */ 0240,0201,021,0306,01,026,0110,0,
+    /* 20008 */ 0250,0201,021,0306,01,027,0101,0,
+    /* 20016 */ 0241,0201,0,0311,01,026,0120,0,
+    /* 20024 */ 0240,0201,0,0311,01,026,0110,0,
+    /* 20032 */ 0250,0201,0,0311,01,027,0101,0,
+    /* 20040 */ 0241,0201,0,0300,01,026,0120,0,
+    /* 20048 */ 0240,0201,0,0300,01,026,0110,0,
+    /* 20056 */ 0241,0201,021,0306,01,022,0120,0,
+    /* 20064 */ 0240,0201,021,0306,01,022,0110,0,
+    /* 20072 */ 0250,0201,021,0306,01,023,0101,0,
+    /* 20080 */ 0241,0201,0,0311,01,022,0120,0,
+    /* 20088 */ 0240,0201,0,0311,01,022,0110,0,
+    /* 20096 */ 0250,0201,0,0311,01,023,0101,0,
+    /* 20104 */ 0250,0201,01,0303,01,0347,0101,0,
+    /* 20112 */ 0250,0201,05,0303,01,0347,0101,0,
+    /* 20120 */ 0250,0201,011,0303,01,0347,0101,0,
+    /* 20128 */ 0250,0202,01,0303,01,052,0110,0,
+    /* 20136 */ 0250,0202,05,0303,01,052,0110,0,
+    /* 20144 */ 0250,0202,011,0303,01,052,0110,0,
+    /* 20152 */ 0250,0201,021,0303,01,053,0101,0,
+    /* 20160 */ 0250,0201,025,0303,01,053,0101,0,
+    /* 20168 */ 0250,0201,031,0303,01,053,0101,0,
+    /* 20176 */ 0250,0201,0,0303,01,053,0101,0,
+    /* 20184 */ 0250,0201,04,0303,01,053,0101,0,
+    /* 20192 */ 0250,0201,010,0303,01,053,0101,0,
+    /* 20200 */ 0250,0201,021,0306,01,0156,0110,0,
+    /* 20208 */ 0250,0201,021,0306,01,0176,0101,0,
+    /* 20216 */ 0250,0201,022,0306,01,0176,0110,0,
+    /* 20224 */ 0250,0201,021,0306,01,0326,0101,0,
+    /* 20232 */ 0250,0201,023,0306,01,020,0110,0,
+    /* 20240 */ 0250,0201,023,0306,01,021,0101,0,
+    /* 20248 */ 0241,0201,023,0300,01,020,0120,0,
+    /* 20256 */ 0240,0201,023,0300,01,020,0110,0,
+    /* 20264 */ 0241,0201,023,0300,01,021,0102,0,
+    /* 20272 */ 0240,0201,023,0300,01,021,0101,0,
+    /* 20280 */ 0250,0201,02,0303,01,026,0110,0,
+    /* 20288 */ 0250,0201,06,0303,01,026,0110,0,
+    /* 20296 */ 0250,0201,012,0303,01,026,0110,0,
+    /* 20304 */ 0250,0201,02,0303,01,022,0110,0,
+    /* 20312 */ 0250,0201,06,0303,01,022,0110,0,
+    /* 20320 */ 0250,0201,012,0303,01,022,0110,0,
+    /* 20328 */ 0250,0201,02,0306,01,020,0110,0,
+    /* 20336 */ 0250,0201,02,0306,01,021,0101,0,
+    /* 20344 */ 0241,0201,02,0300,01,020,0120,0,
+    /* 20352 */ 0240,0201,02,0300,01,020,0110,0,
+    /* 20360 */ 0241,0201,02,0300,01,021,0102,0,
+    /* 20368 */ 0240,0201,02,0300,01,021,0101,0,
+    /* 20376 */ 0250,0201,021,0303,01,020,0110,0,
+    /* 20384 */ 0250,0201,025,0303,01,020,0110,0,
+    /* 20392 */ 0250,0201,031,0303,01,020,0110,0,
+    /* 20400 */ 0250,0201,021,0300,01,021,0101,0,
+    /* 20408 */ 0250,0201,025,0300,01,021,0101,0,
+    /* 20416 */ 0250,0201,031,0300,01,021,0101,0,
+    /* 20424 */ 0250,0201,021,0303,01,021,0101,0,
+    /* 20432 */ 0250,0201,025,0303,01,021,0101,0,
+    /* 20440 */ 0250,0201,031,0303,01,021,0101,0,
+    /* 20448 */ 0250,0201,0,0303,01,020,0110,0,
+    /* 20456 */ 0250,0201,04,0303,01,020,0110,0,
+    /* 20464 */ 0250,0201,010,0303,01,020,0110,0,
+    /* 20472 */ 0250,0201,0,0300,01,021,0101,0,
+    /* 20480 */ 0250,0201,04,0300,01,021,0101,0,
+    /* 20488 */ 0250,0201,010,0300,01,021,0101,0,
+    /* 20496 */ 0250,0201,0,0303,01,021,0101,0,
+    /* 20504 */ 0250,0201,04,0303,01,021,0101,0,
+    /* 20512 */ 0250,0201,010,0303,01,021,0101,0,
+    /* 20520 */ 0241,0201,021,0301,01,0131,0120,0,
+    /* 20528 */ 0240,0201,021,0301,01,0131,0110,0,
+    /* 20536 */ 0241,0201,025,0301,01,0131,0120,0,
+    /* 20544 */ 0240,0201,025,0301,01,0131,0110,0,
+    /* 20552 */ 0241,0201,031,0301,01,0131,0120,0,
+    /* 20560 */ 0240,0201,031,0301,01,0131,0110,0,
+    /* 20568 */ 0241,0201,0,0301,01,0131,0120,0,
+    /* 20576 */ 0240,0201,0,0301,01,0131,0110,0,
+    /* 20584 */ 0241,0201,04,0301,01,0131,0120,0,
+    /* 20592 */ 0240,0201,04,0301,01,0131,0110,0,
+    /* 20600 */ 0241,0201,010,0301,01,0131,0120,0,
+    /* 20608 */ 0240,0201,010,0301,01,0131,0110,0,
+    /* 20616 */ 0241,0201,023,0306,01,0131,0120,0,
+    /* 20624 */ 0240,0201,023,0306,01,0131,0110,0,
+    /* 20632 */ 0241,0201,02,0306,01,0131,0120,0,
+    /* 20640 */ 0240,0201,02,0306,01,0131,0110,0,
+    /* 20648 */ 0241,0201,021,0301,01,0126,0120,0,
+    /* 20656 */ 0240,0201,021,0301,01,0126,0110,0,
+    /* 20664 */ 0241,0201,025,0301,01,0126,0120,0,
+    /* 20672 */ 0240,0201,025,0301,01,0126,0110,0,
+    /* 20680 */ 0241,0201,031,0301,01,0126,0120,0,
+    /* 20688 */ 0240,0201,031,0301,01,0126,0110,0,
+    /* 20696 */ 0241,0201,0,0301,01,0126,0120,0,
+    /* 20704 */ 0240,0201,0,0301,01,0126,0110,0,
+    /* 20712 */ 0241,0201,04,0301,01,0126,0120,0,
+    /* 20720 */ 0240,0201,04,0301,01,0126,0110,0,
+    /* 20728 */ 0241,0201,010,0301,01,0126,0120,0,
+    /* 20736 */ 0240,0201,010,0301,01,0126,0110,0,
+    /* 20744 */ 0250,0202,041,0303,01,034,0110,0,
+    /* 20752 */ 0250,0202,045,0303,01,034,0110,0,
+    /* 20760 */ 0250,0202,051,0303,01,034,0110,0,
+    /* 20768 */ 0250,0202,01,0301,01,036,0110,0,
+    /* 20776 */ 0250,0202,05,0301,01,036,0110,0,
+    /* 20784 */ 0250,0202,011,0301,01,036,0110,0,
+    /* 20792 */ 0250,0202,021,0301,01,037,0110,0,
+    /* 20800 */ 0250,0202,025,0301,01,037,0110,0,
+    /* 20808 */ 0250,0202,031,0301,01,037,0110,0,
+    /* 20816 */ 0250,0202,041,0303,01,035,0110,0,
+    /* 20824 */ 0250,0202,045,0303,01,035,0110,0,
+    /* 20832 */ 0250,0202,051,0303,01,035,0110,0,
+    /* 20840 */ 0241,0201,01,0301,01,0153,0120,0,
+    /* 20848 */ 0240,0201,01,0301,01,0153,0110,0,
+    /* 20856 */ 0241,0201,05,0301,01,0153,0120,0,
+    /* 20864 */ 0240,0201,05,0301,01,0153,0110,0,
+    /* 20872 */ 0241,0201,011,0301,01,0153,0120,0,
+    /* 20880 */ 0240,0201,011,0301,01,0153,0110,0,
+    /* 20888 */ 0241,0201,041,0303,01,0143,0120,0,
+    /* 20896 */ 0240,0201,041,0303,01,0143,0110,0,
+    /* 20904 */ 0241,0201,045,0303,01,0143,0120,0,
+    /* 20912 */ 0240,0201,045,0303,01,0143,0110,0,
+    /* 20920 */ 0241,0201,051,0303,01,0143,0120,0,
+    /* 20928 */ 0240,0201,051,0303,01,0143,0110,0,
+    /* 20936 */ 0241,0202,01,0301,01,053,0120,0,
+    /* 20944 */ 0240,0202,01,0301,01,053,0110,0,
+    /* 20952 */ 0241,0202,05,0301,01,053,0120,0,
+    /* 20960 */ 0240,0202,05,0301,01,053,0110,0,
+    /* 20968 */ 0241,0202,011,0301,01,053,0120,0,
+    /* 20976 */ 0240,0202,011,0301,01,053,0110,0,
+    /* 20984 */ 0241,0201,041,0303,01,0147,0120,0,
+    /* 20992 */ 0240,0201,041,0303,01,0147,0110,0,
+    /* 21000 */ 0241,0201,045,0303,01,0147,0120,0,
+    /* 21008 */ 0240,0201,045,0303,01,0147,0110,0,
+    /* 21016 */ 0241,0201,051,0303,01,0147,0120,0,
+    /* 21024 */ 0240,0201,051,0303,01,0147,0110,0,
+    /* 21032 */ 0241,0201,041,0303,01,0374,0120,0,
+    /* 21040 */ 0240,0201,041,0303,01,0374,0110,0,
+    /* 21048 */ 0241,0201,045,0303,01,0374,0120,0,
+    /* 21056 */ 0240,0201,045,0303,01,0374,0110,0,
+    /* 21064 */ 0241,0201,051,0303,01,0374,0120,0,
+    /* 21072 */ 0240,0201,051,0303,01,0374,0110,0,
+    /* 21080 */ 0241,0201,01,0301,01,0376,0120,0,
+    /* 21088 */ 0240,0201,01,0301,01,0376,0110,0,
+    /* 21096 */ 0241,0201,05,0301,01,0376,0120,0,
+    /* 21104 */ 0240,0201,05,0301,01,0376,0110,0,
+    /* 21112 */ 0241,0201,011,0301,01,0376,0120,0,
+    /* 21120 */ 0240,0201,011,0301,01,0376,0110,0,
+    /* 21128 */ 0241,0201,021,0301,01,0324,0120,0,
+    /* 21136 */ 0240,0201,021,0301,01,0324,0110,0,
+    /* 21144 */ 0241,0201,025,0301,01,0324,0120,0,
+    /* 21152 */ 0240,0201,025,0301,01,0324,0110,0,
+    /* 21160 */ 0241,0201,031,0301,01,0324,0120,0,
+    /* 21168 */ 0240,0201,031,0301,01,0324,0110,0,
+    /* 21176 */ 0241,0201,041,0303,01,0354,0120,0,
+    /* 21184 */ 0240,0201,041,0303,01,0354,0110,0,
+    /* 21192 */ 0241,0201,045,0303,01,0354,0120,0,
+    /* 21200 */ 0240,0201,045,0303,01,0354,0110,0,
+    /* 21208 */ 0241,0201,051,0303,01,0354,0120,0,
+    /* 21216 */ 0240,0201,051,0303,01,0354,0110,0,
+    /* 21224 */ 0241,0201,041,0303,01,0355,0120,0,
+    /* 21232 */ 0240,0201,041,0303,01,0355,0110,0,
+    /* 21240 */ 0241,0201,045,0303,01,0355,0120,0,
+    /* 21248 */ 0240,0201,045,0303,01,0355,0110,0,
+    /* 21256 */ 0241,0201,051,0303,01,0355,0120,0,
+    /* 21264 */ 0240,0201,051,0303,01,0355,0110,0,
+    /* 21272 */ 0241,0201,041,0303,01,0334,0120,0,
+    /* 21280 */ 0240,0201,041,0303,01,0334,0110,0,
+    /* 21288 */ 0241,0201,045,0303,01,0334,0120,0,
+    /* 21296 */ 0240,0201,045,0303,01,0334,0110,0,
+    /* 21304 */ 0241,0201,051,0303,01,0334,0120,0,
+    /* 21312 */ 0240,0201,051,0303,01,0334,0110,0,
+    /* 21320 */ 0241,0201,041,0303,01,0335,0120,0,
+    /* 21328 */ 0240,0201,041,0303,01,0335,0110,0,
+    /* 21336 */ 0241,0201,045,0303,01,0335,0120,0,
+    /* 21344 */ 0240,0201,045,0303,01,0335,0110,0,
+    /* 21352 */ 0241,0201,051,0303,01,0335,0120,0,
+    /* 21360 */ 0240,0201,051,0303,01,0335,0110,0,
+    /* 21368 */ 0241,0201,041,0303,01,0375,0120,0,
+    /* 21376 */ 0240,0201,041,0303,01,0375,0110,0,
+    /* 21384 */ 0241,0201,045,0303,01,0375,0120,0,
+    /* 21392 */ 0240,0201,045,0303,01,0375,0110,0,
+    /* 21400 */ 0241,0201,051,0303,01,0375,0120,0,
+    /* 21408 */ 0240,0201,051,0303,01,0375,0110,0,
+    /* 21416 */ 0241,0201,01,0301,01,0333,0120,0,
+    /* 21424 */ 0240,0201,01,0301,01,0333,0110,0,
+    /* 21432 */ 0241,0201,05,0301,01,0333,0120,0,
+    /* 21440 */ 0240,0201,05,0301,01,0333,0110,0,
+    /* 21448 */ 0241,0201,011,0301,01,0333,0120,0,
+    /* 21456 */ 0240,0201,011,0301,01,0333,0110,0,
+    /* 21464 */ 0241,0201,01,0301,01,0337,0120,0,
+    /* 21472 */ 0240,0201,01,0301,01,0337,0110,0,
+    /* 21480 */ 0241,0201,05,0301,01,0337,0120,0,
+    /* 21488 */ 0240,0201,05,0301,01,0337,0110,0,
+    /* 21496 */ 0241,0201,011,0301,01,0337,0120,0,
+    /* 21504 */ 0240,0201,011,0301,01,0337,0110,0,
+    /* 21512 */ 0241,0201,021,0301,01,0337,0120,0,
+    /* 21520 */ 0240,0201,021,0301,01,0337,0110,0,
+    /* 21528 */ 0241,0201,025,0301,01,0337,0120,0,
+    /* 21536 */ 0240,0201,025,0301,01,0337,0110,0,
+    /* 21544 */ 0241,0201,031,0301,01,0337,0120,0,
+    /* 21552 */ 0240,0201,031,0301,01,0337,0110,0,
+    /* 21560 */ 0241,0201,021,0301,01,0333,0120,0,
+    /* 21568 */ 0240,0201,021,0301,01,0333,0110,0,
+    /* 21576 */ 0241,0201,025,0301,01,0333,0120,0,
+    /* 21584 */ 0240,0201,025,0301,01,0333,0110,0,
+    /* 21592 */ 0241,0201,031,0301,01,0333,0120,0,
+    /* 21600 */ 0240,0201,031,0301,01,0333,0110,0,
+    /* 21608 */ 0241,0201,041,0303,01,0340,0120,0,
+    /* 21616 */ 0240,0201,041,0303,01,0340,0110,0,
+    /* 21624 */ 0241,0201,045,0303,01,0340,0120,0,
+    /* 21632 */ 0240,0201,045,0303,01,0340,0110,0,
+    /* 21640 */ 0241,0201,051,0303,01,0340,0120,0,
+    /* 21648 */ 0240,0201,051,0303,01,0340,0110,0,
+    /* 21656 */ 0241,0201,041,0303,01,0343,0120,0,
+    /* 21664 */ 0240,0201,041,0303,01,0343,0110,0,
+    /* 21672 */ 0241,0201,045,0303,01,0343,0120,0,
+    /* 21680 */ 0240,0201,045,0303,01,0343,0110,0,
+    /* 21688 */ 0241,0201,051,0303,01,0343,0120,0,
+    /* 21696 */ 0240,0201,051,0303,01,0343,0110,0,
+    /* 21704 */ 0241,0202,01,0303,01,0146,0120,0,
+    /* 21712 */ 0241,0202,05,0303,01,0146,0120,0,
+    /* 21720 */ 0241,0202,011,0303,01,0146,0120,0,
+    /* 21728 */ 0241,0202,01,0301,01,0144,0120,0,
+    /* 21736 */ 0241,0202,05,0301,01,0144,0120,0,
+    /* 21744 */ 0241,0202,011,0301,01,0144,0120,0,
+    /* 21752 */ 0241,0202,021,0301,01,0144,0120,0,
+    /* 21760 */ 0241,0202,025,0301,01,0144,0120,0,
+    /* 21768 */ 0241,0202,031,0301,01,0144,0120,0,
+    /* 21776 */ 0241,0202,021,0303,01,0146,0120,0,
+    /* 21784 */ 0241,0202,025,0303,01,0146,0120,0,
+    /* 21792 */ 0241,0202,031,0303,01,0146,0120,0,
+    /* 21800 */ 0250,0202,01,0304,01,0170,0110,0,
+    /* 21808 */ 0250,0202,05,0304,01,0170,0110,0,
+    /* 21816 */ 0250,0202,011,0304,01,0170,0110,0,
+    /* 21824 */ 0250,0202,01,0300,01,0172,0110,0,
+    /* 21832 */ 0250,0202,05,0300,01,0172,0110,0,
+    /* 21840 */ 0250,0202,011,0300,01,0172,0110,0,
+    /* 21848 */ 0250,0202,01,0306,01,0130,0110,0,
+    /* 21856 */ 0250,0202,05,0306,01,0130,0110,0,
+    /* 21864 */ 0250,0202,011,0306,01,0130,0110,0,
+    /* 21872 */ 0250,0202,01,0300,01,0130,0110,0,
+    /* 21880 */ 0250,0202,05,0300,01,0130,0110,0,
+    /* 21888 */ 0250,0202,011,0300,01,0130,0110,0,
+    /* 21896 */ 0250,0202,01,0300,01,0174,0110,0,
+    /* 21904 */ 0250,0202,05,0300,01,0174,0110,0,
+    /* 21912 */ 0250,0202,011,0300,01,0174,0110,0,
+    /* 21920 */ 0250,0202,022,0300,01,052,0110,0,
+    /* 21928 */ 0250,0202,026,0300,01,052,0110,0,
+    /* 21936 */ 0250,0202,032,0300,01,052,0110,0,
+    /* 21944 */ 0250,0202,02,0300,01,072,0110,0,
+    /* 21952 */ 0250,0202,06,0300,01,072,0110,0,
+    /* 21960 */ 0250,0202,012,0300,01,072,0110,0,
+    /* 21968 */ 0250,0202,021,0306,01,0131,0110,0,
+    /* 21976 */ 0250,0202,025,0306,01,0131,0110,0,
+    /* 21984 */ 0250,0202,031,0306,01,0131,0110,0,
+    /* 21992 */ 0250,0202,021,0300,01,0131,0110,0,
+    /* 22000 */ 0250,0202,025,0300,01,0131,0110,0,
+    /* 22008 */ 0250,0202,031,0300,01,0131,0110,0,
+    /* 22016 */ 0250,0202,021,0300,01,0174,0110,0,
+    /* 22024 */ 0250,0202,025,0300,01,0174,0110,0,
+    /* 22032 */ 0250,0202,031,0300,01,0174,0110,0,
+    /* 22040 */ 0250,0202,01,0305,01,0171,0110,0,
+    /* 22048 */ 0250,0202,05,0305,01,0171,0110,0,
+    /* 22056 */ 0250,0202,011,0305,01,0171,0110,0,
+    /* 22064 */ 0250,0202,01,0300,01,0173,0110,0,
+    /* 22072 */ 0250,0202,05,0300,01,0173,0110,0,
+    /* 22080 */ 0250,0202,011,0300,01,0173,0110,0,
+    /* 22088 */ 0241,0201,041,0303,01,0164,0120,0,
+    /* 22096 */ 0241,0201,045,0303,01,0164,0120,0,
+    /* 22104 */ 0241,0201,051,0303,01,0164,0120,0,
+    /* 22112 */ 0241,0201,01,0301,01,0166,0120,0,
+    /* 22120 */ 0241,0201,05,0301,01,0166,0120,0,
+    /* 22128 */ 0241,0201,011,0301,01,0166,0120,0,
+    /* 22136 */ 0241,0202,021,0301,01,051,0120,0,
+    /* 22144 */ 0241,0202,025,0301,01,051,0120,0,
+    /* 22152 */ 0241,0202,031,0301,01,051,0120,0,
+    /* 22160 */ 0241,0201,041,0303,01,0165,0120,0,
+    /* 22168 */ 0241,0201,045,0303,01,0165,0120,0,
+    /* 22176 */ 0241,0201,051,0303,01,0165,0120,0,
+    /* 22184 */ 0241,0201,041,0303,01,0144,0120,0,
+    /* 22192 */ 0241,0201,045,0303,01,0144,0120,0,
+    /* 22200 */ 0241,0201,051,0303,01,0144,0120,0,
+    /* 22208 */ 0241,0201,01,0301,01,0146,0120,0,
+    /* 22216 */ 0241,0201,05,0301,01,0146,0120,0,
+    /* 22224 */ 0241,0201,011,0301,01,0146,0120,0,
+    /* 22232 */ 0241,0202,021,0301,01,067,0120,0,
+    /* 22240 */ 0241,0202,025,0301,01,067,0120,0,
+    /* 22248 */ 0241,0202,031,0301,01,067,0120,0,
+    /* 22256 */ 0241,0201,041,0303,01,0145,0120,0,
+    /* 22264 */ 0241,0201,045,0303,01,0145,0120,0,
+    /* 22272 */ 0241,0201,051,0303,01,0145,0120,0,
+    /* 22280 */ 0250,0202,01,0306,01,0213,0101,0,
+    /* 22288 */ 0250,0202,05,0306,01,0213,0101,0,
+    /* 22296 */ 0250,0202,011,0306,01,0213,0101,0,
+    /* 22304 */ 0250,0202,01,0300,01,0213,0101,0,
+    /* 22312 */ 0250,0202,05,0300,01,0213,0101,0,
+    /* 22320 */ 0250,0202,011,0300,01,0213,0101,0,
+    /* 22328 */ 0250,0202,021,0306,01,0213,0101,0,
+    /* 22336 */ 0250,0202,025,0306,01,0213,0101,0,
+    /* 22344 */ 0250,0202,031,0306,01,0213,0101,0,
+    /* 22352 */ 0250,0202,021,0300,01,0213,0101,0,
+    /* 22360 */ 0250,0202,025,0300,01,0213,0101,0,
+    /* 22368 */ 0250,0202,031,0300,01,0213,0101,0,
+    /* 22376 */ 0250,0202,01,0301,01,0304,0110,0,
+    /* 22384 */ 0250,0202,05,0301,01,0304,0110,0,
+    /* 22392 */ 0250,0202,011,0301,01,0304,0110,0,
+    /* 22400 */ 0250,0202,021,0301,01,0304,0110,0,
+    /* 22408 */ 0250,0202,025,0301,01,0304,0110,0,
+    /* 22416 */ 0250,0202,031,0301,01,0304,0110,0,
+    /* 22424 */ 0241,0202,01,0303,01,0215,0120,0,
+    /* 22432 */ 0240,0202,01,0303,01,0215,0110,0,
+    /* 22440 */ 0241,0202,05,0303,01,0215,0120,0,
+    /* 22448 */ 0240,0202,05,0303,01,0215,0110,0,
+    /* 22456 */ 0241,0202,011,0303,01,0215,0120,0,
+    /* 22464 */ 0240,0202,011,0303,01,0215,0110,0,
+    /* 22472 */ 0241,0202,05,0301,01,066,0120,0,
+    /* 22480 */ 0240,0202,05,0301,01,066,0110,0,
+    /* 22488 */ 0241,0202,011,0301,01,066,0120,0,
+    /* 22496 */ 0240,0202,011,0301,01,066,0110,0,
+    /* 22504 */ 0241,0202,01,0303,01,0165,0120,0,
+    /* 22512 */ 0241,0202,05,0303,01,0165,0120,0,
+    /* 22520 */ 0241,0202,011,0303,01,0165,0120,0,
+    /* 22528 */ 0241,0202,01,0301,01,0166,0120,0,
+    /* 22536 */ 0241,0202,05,0301,01,0166,0120,0,
+    /* 22544 */ 0241,0202,011,0301,01,0166,0120,0,
+    /* 22552 */ 0241,0202,021,0301,01,0167,0120,0,
+    /* 22560 */ 0241,0202,025,0301,01,0167,0120,0,
+    /* 22568 */ 0241,0202,031,0301,01,0167,0120,0,
+    /* 22576 */ 0241,0202,01,0301,01,0167,0120,0,
+    /* 22584 */ 0241,0202,05,0301,01,0167,0120,0,
+    /* 22592 */ 0241,0202,011,0301,01,0167,0120,0,
+    /* 22600 */ 0241,0202,021,0301,01,0166,0120,0,
+    /* 22608 */ 0241,0202,025,0301,01,0166,0120,0,
+    /* 22616 */ 0241,0202,031,0301,01,0166,0120,0,
+    /* 22624 */ 0241,0202,021,0303,01,0165,0120,0,
+    /* 22632 */ 0241,0202,025,0303,01,0165,0120,0,
+    /* 22640 */ 0241,0202,031,0303,01,0165,0120,0,
+    /* 22648 */ 0241,0202,021,0301,01,015,0120,0,
+    /* 22656 */ 0240,0202,021,0301,01,015,0110,0,
+    /* 22664 */ 0241,0202,025,0301,01,015,0120,0,
+    /* 22672 */ 0240,0202,025,0301,01,015,0110,0,
+    /* 22680 */ 0241,0202,031,0301,01,015,0120,0,
+    /* 22688 */ 0240,0202,031,0301,01,015,0110,0,
+    /* 22696 */ 0241,0202,01,0301,01,014,0120,0,
+    /* 22704 */ 0240,0202,01,0301,01,014,0110,0,
+    /* 22712 */ 0241,0202,05,0301,01,014,0120,0,
+    /* 22720 */ 0240,0202,05,0301,01,014,0110,0,
+    /* 22728 */ 0241,0202,011,0301,01,014,0120,0,
+    /* 22736 */ 0240,0202,011,0301,01,014,0110,0,
+    /* 22744 */ 0241,0202,025,0301,01,026,0120,0,
+    /* 22752 */ 0240,0202,025,0301,01,026,0110,0,
+    /* 22760 */ 0241,0202,031,0301,01,026,0120,0,
+    /* 22768 */ 0240,0202,031,0301,01,026,0110,0,
+    /* 22776 */ 0241,0202,05,0301,01,026,0120,0,
+    /* 22784 */ 0240,0202,05,0301,01,026,0110,0,
+    /* 22792 */ 0241,0202,011,0301,01,026,0120,0,
+    /* 22800 */ 0240,0202,011,0301,01,026,0110,0,
+    /* 22808 */ 0241,0202,025,0301,01,066,0120,0,
+    /* 22816 */ 0240,0202,025,0301,01,066,0110,0,
+    /* 22824 */ 0241,0202,031,0301,01,066,0120,0,
+    /* 22832 */ 0240,0202,031,0301,01,066,0110,0,
+    /* 22840 */ 0241,0202,01,0303,01,0175,0120,0,
+    /* 22848 */ 0241,0202,05,0303,01,0175,0120,0,
+    /* 22856 */ 0241,0202,011,0303,01,0175,0120,0,
+    /* 22864 */ 0241,0202,01,0301,01,0176,0120,0,
+    /* 22872 */ 0241,0202,05,0301,01,0176,0120,0,
+    /* 22880 */ 0241,0202,011,0301,01,0176,0120,0,
+    /* 22888 */ 0241,0202,021,0301,01,0177,0120,0,
+    /* 22896 */ 0241,0202,025,0301,01,0177,0120,0,
+    /* 22904 */ 0241,0202,031,0301,01,0177,0120,0,
+    /* 22912 */ 0241,0202,01,0301,01,0177,0120,0,
+    /* 22920 */ 0241,0202,05,0301,01,0177,0120,0,
+    /* 22928 */ 0241,0202,011,0301,01,0177,0120,0,
+    /* 22936 */ 0241,0202,021,0301,01,0176,0120,0,
+    /* 22944 */ 0241,0202,025,0301,01,0176,0120,0,
+    /* 22952 */ 0241,0202,031,0301,01,0176,0120,0,
+    /* 22960 */ 0241,0202,021,0303,01,0175,0120,0,
+    /* 22968 */ 0241,0202,025,0303,01,0175,0120,0,
+    /* 22976 */ 0241,0202,031,0303,01,0175,0120,0,
+    /* 22984 */ 0241,0202,021,0303,01,0215,0120,0,
+    /* 22992 */ 0240,0202,021,0303,01,0215,0110,0,
+    /* 23000 */ 0241,0202,025,0303,01,0215,0120,0,
+    /* 23008 */ 0240,0202,025,0303,01,0215,0110,0,
+    /* 23016 */ 0241,0202,031,0303,01,0215,0120,0,
+    /* 23024 */ 0240,0202,031,0303,01,0215,0110,0,
+    /* 23032 */ 0250,0202,01,0306,01,0211,0110,0,
+    /* 23040 */ 0250,0202,05,0306,01,0211,0110,0,
+    /* 23048 */ 0250,0202,011,0306,01,0211,0110,0,
+    /* 23056 */ 0250,0202,021,0306,01,0211,0110,0,
+    /* 23064 */ 0250,0202,025,0306,01,0211,0110,0,
+    /* 23072 */ 0250,0202,031,0306,01,0211,0110,0,
+    /* 23080 */ 0250,0202,01,0301,01,0104,0110,0,
+    /* 23088 */ 0250,0202,05,0301,01,0104,0110,0,
+    /* 23096 */ 0250,0202,011,0301,01,0104,0110,0,
+    /* 23104 */ 0250,0202,021,0301,01,0104,0110,0,
+    /* 23112 */ 0250,0202,025,0301,01,0104,0110,0,
+    /* 23120 */ 0250,0202,031,0301,01,0104,0110,0,
+    /* 23128 */ 0241,0202,021,0301,01,0265,0120,0,
+    /* 23136 */ 0241,0202,025,0301,01,0265,0120,0,
+    /* 23144 */ 0241,0202,031,0301,01,0265,0120,0,
+    /* 23152 */ 0241,0202,021,0301,01,0264,0120,0,
+    /* 23160 */ 0241,0202,025,0301,01,0264,0120,0,
+    /* 23168 */ 0241,0202,031,0301,01,0264,0120,0,
+    /* 23176 */ 0241,0202,041,0303,01,04,0120,0,
+    /* 23184 */ 0240,0202,041,0303,01,04,0110,0,
+    /* 23192 */ 0241,0202,045,0303,01,04,0120,0,
+    /* 23200 */ 0240,0202,045,0303,01,04,0110,0,
+    /* 23208 */ 0241,0202,051,0303,01,04,0120,0,
+    /* 23216 */ 0240,0202,051,0303,01,04,0110,0,
+    /* 23224 */ 0241,0201,041,0303,01,0365,0120,0,
+    /* 23232 */ 0240,0201,041,0303,01,0365,0110,0,
+    /* 23240 */ 0241,0201,045,0303,01,0365,0120,0,
+    /* 23248 */ 0240,0201,045,0303,01,0365,0110,0,
+    /* 23256 */ 0241,0201,051,0303,01,0365,0120,0,
+    /* 23264 */ 0240,0201,051,0303,01,0365,0110,0,
+    /* 23272 */ 0241,0202,041,0303,01,074,0120,0,
+    /* 23280 */ 0240,0202,041,0303,01,074,0110,0,
+    /* 23288 */ 0241,0202,045,0303,01,074,0120,0,
+    /* 23296 */ 0240,0202,045,0303,01,074,0110,0,
+    /* 23304 */ 0241,0202,051,0303,01,074,0120,0,
+    /* 23312 */ 0240,0202,051,0303,01,074,0110,0,
+    /* 23320 */ 0241,0202,01,0301,01,075,0120,0,
+    /* 23328 */ 0240,0202,01,0301,01,075,0110,0,
+    /* 23336 */ 0241,0202,05,0301,01,075,0120,0,
+    /* 23344 */ 0240,0202,05,0301,01,075,0110,0,
+    /* 23352 */ 0241,0202,011,0301,01,075,0120,0,
+    /* 23360 */ 0240,0202,011,0301,01,075,0110,0,
+    /* 23368 */ 0241,0202,021,0301,01,075,0120,0,
+    /* 23376 */ 0240,0202,021,0301,01,075,0110,0,
+    /* 23384 */ 0241,0202,025,0301,01,075,0120,0,
+    /* 23392 */ 0240,0202,025,0301,01,075,0110,0,
+    /* 23400 */ 0241,0202,031,0301,01,075,0120,0,
+    /* 23408 */ 0240,0202,031,0301,01,075,0110,0,
+    /* 23416 */ 0241,0201,041,0303,01,0356,0120,0,
+    /* 23424 */ 0240,0201,041,0303,01,0356,0110,0,
+    /* 23432 */ 0241,0201,045,0303,01,0356,0120,0,
+    /* 23440 */ 0240,0201,045,0303,01,0356,0110,0,
+    /* 23448 */ 0241,0201,051,0303,01,0356,0120,0,
+    /* 23456 */ 0240,0201,051,0303,01,0356,0110,0,
+    /* 23464 */ 0241,0201,041,0303,01,0336,0120,0,
+    /* 23472 */ 0240,0201,041,0303,01,0336,0110,0,
+    /* 23480 */ 0241,0201,045,0303,01,0336,0120,0,
+    /* 23488 */ 0240,0201,045,0303,01,0336,0110,0,
+    /* 23496 */ 0241,0201,051,0303,01,0336,0120,0,
+    /* 23504 */ 0240,0201,051,0303,01,0336,0110,0,
+    /* 23512 */ 0241,0202,01,0301,01,077,0120,0,
+    /* 23520 */ 0240,0202,01,0301,01,077,0110,0,
+    /* 23528 */ 0241,0202,05,0301,01,077,0120,0,
+    /* 23536 */ 0240,0202,05,0301,01,077,0110,0,
+    /* 23544 */ 0241,0202,011,0301,01,077,0120,0,
+    /* 23552 */ 0240,0202,011,0301,01,077,0110,0,
+    /* 23560 */ 0241,0202,021,0301,01,077,0120,0,
+    /* 23568 */ 0240,0202,021,0301,01,077,0110,0,
+    /* 23576 */ 0241,0202,025,0301,01,077,0120,0,
+    /* 23584 */ 0240,0202,025,0301,01,077,0110,0,
+    /* 23592 */ 0241,0202,031,0301,01,077,0120,0,
+    /* 23600 */ 0240,0202,031,0301,01,077,0110,0,
+    /* 23608 */ 0241,0202,041,0303,01,076,0120,0,
+    /* 23616 */ 0240,0202,041,0303,01,076,0110,0,
+    /* 23624 */ 0241,0202,045,0303,01,076,0120,0,
+    /* 23632 */ 0240,0202,045,0303,01,076,0110,0,
+    /* 23640 */ 0241,0202,051,0303,01,076,0120,0,
+    /* 23648 */ 0240,0202,051,0303,01,076,0110,0,
+    /* 23656 */ 0241,0202,041,0303,01,070,0120,0,
+    /* 23664 */ 0240,0202,041,0303,01,070,0110,0,
+    /* 23672 */ 0241,0202,045,0303,01,070,0120,0,
+    /* 23680 */ 0240,0202,045,0303,01,070,0110,0,
+    /* 23688 */ 0241,0202,051,0303,01,070,0120,0,
+    /* 23696 */ 0240,0202,051,0303,01,070,0110,0,
+    /* 23704 */ 0241,0202,01,0301,01,071,0120,0,
+    /* 23712 */ 0240,0202,01,0301,01,071,0110,0,
+    /* 23720 */ 0241,0202,05,0301,01,071,0120,0,
+    /* 23728 */ 0240,0202,05,0301,01,071,0110,0,
+    /* 23736 */ 0241,0202,011,0301,01,071,0120,0,
+    /* 23744 */ 0240,0202,011,0301,01,071,0110,0,
+    /* 23752 */ 0241,0202,021,0301,01,071,0120,0,
+    /* 23760 */ 0240,0202,021,0301,01,071,0110,0,
+    /* 23768 */ 0241,0202,025,0301,01,071,0120,0,
+    /* 23776 */ 0240,0202,025,0301,01,071,0110,0,
+    /* 23784 */ 0241,0202,031,0301,01,071,0120,0,
+    /* 23792 */ 0240,0202,031,0301,01,071,0110,0,
+    /* 23800 */ 0241,0201,041,0303,01,0352,0120,0,
+    /* 23808 */ 0240,0201,041,0303,01,0352,0110,0,
+    /* 23816 */ 0241,0201,045,0303,01,0352,0120,0,
+    /* 23824 */ 0240,0201,045,0303,01,0352,0110,0,
+    /* 23832 */ 0241,0201,051,0303,01,0352,0120,0,
+    /* 23840 */ 0240,0201,051,0303,01,0352,0110,0,
+    /* 23848 */ 0241,0201,041,0303,01,0332,0120,0,
+    /* 23856 */ 0240,0201,041,0303,01,0332,0110,0,
+    /* 23864 */ 0241,0201,045,0303,01,0332,0120,0,
+    /* 23872 */ 0240,0201,045,0303,01,0332,0110,0,
+    /* 23880 */ 0241,0201,051,0303,01,0332,0120,0,
+    /* 23888 */ 0240,0201,051,0303,01,0332,0110,0,
+    /* 23896 */ 0241,0202,01,0301,01,073,0120,0,
+    /* 23904 */ 0240,0202,01,0301,01,073,0110,0,
+    /* 23912 */ 0241,0202,05,0301,01,073,0120,0,
+    /* 23920 */ 0240,0202,05,0301,01,073,0110,0,
+    /* 23928 */ 0241,0202,011,0301,01,073,0120,0,
+    /* 23936 */ 0240,0202,011,0301,01,073,0110,0,
+    /* 23944 */ 0241,0202,021,0301,01,073,0120,0,
+    /* 23952 */ 0240,0202,021,0301,01,073,0110,0,
+    /* 23960 */ 0241,0202,025,0301,01,073,0120,0,
+    /* 23968 */ 0240,0202,025,0301,01,073,0110,0,
+    /* 23976 */ 0241,0202,031,0301,01,073,0120,0,
+    /* 23984 */ 0240,0202,031,0301,01,073,0110,0,
+    /* 23992 */ 0241,0202,041,0303,01,072,0120,0,
+    /* 24000 */ 0240,0202,041,0303,01,072,0110,0,
+    /* 24008 */ 0241,0202,045,0303,01,072,0120,0,
+    /* 24016 */ 0240,0202,045,0303,01,072,0110,0,
+    /* 24024 */ 0241,0202,051,0303,01,072,0120,0,
+    /* 24032 */ 0240,0202,051,0303,01,072,0110,0,
+    /* 24040 */ 0250,0202,02,0300,01,051,0110,0,
+    /* 24048 */ 0250,0202,06,0300,01,051,0110,0,
+    /* 24056 */ 0250,0202,012,0300,01,051,0110,0,
+    /* 24064 */ 0250,0202,02,0300,01,071,0110,0,
+    /* 24072 */ 0250,0202,06,0300,01,071,0110,0,
+    /* 24080 */ 0250,0202,012,0300,01,071,0110,0,
+    /* 24088 */ 0250,0202,02,0300,01,061,0101,0,
+    /* 24096 */ 0250,0202,06,0300,01,061,0101,0,
+    /* 24104 */ 0250,0202,012,0300,01,061,0101,0,
+    /* 24112 */ 0250,0202,02,0315,01,061,0101,0,
+    /* 24120 */ 0250,0202,06,0315,01,061,0101,0,
+    /* 24128 */ 0250,0202,012,0315,01,061,0101,0,
+    /* 24136 */ 0250,0202,02,0300,01,063,0101,0,
+    /* 24144 */ 0250,0202,06,0300,01,063,0101,0,
+    /* 24152 */ 0250,0202,012,0300,01,063,0101,0,
+    /* 24160 */ 0250,0202,02,0314,01,063,0101,0,
+    /* 24168 */ 0250,0202,06,0314,01,063,0101,0,
+    /* 24176 */ 0250,0202,012,0314,01,063,0101,0,
+    /* 24184 */ 0250,0202,02,0300,01,050,0110,0,
+    /* 24192 */ 0250,0202,06,0300,01,050,0110,0,
+    /* 24200 */ 0250,0202,012,0300,01,050,0110,0,
+    /* 24208 */ 0250,0202,02,0300,01,070,0110,0,
+    /* 24216 */ 0250,0202,06,0300,01,070,0110,0,
+    /* 24224 */ 0250,0202,012,0300,01,070,0110,0,
+    /* 24232 */ 0250,0202,022,0300,01,070,0110,0,
+    /* 24240 */ 0250,0202,026,0300,01,070,0110,0,
+    /* 24248 */ 0250,0202,032,0300,01,070,0110,0,
+    /* 24256 */ 0250,0202,022,0300,01,050,0110,0,
+    /* 24264 */ 0250,0202,026,0300,01,050,0110,0,
+    /* 24272 */ 0250,0202,032,0300,01,050,0110,0,
+    /* 24280 */ 0250,0202,022,0300,01,071,0110,0,
+    /* 24288 */ 0250,0202,026,0300,01,071,0110,0,
+    /* 24296 */ 0250,0202,032,0300,01,071,0110,0,
+    /* 24304 */ 0250,0202,02,0300,01,062,0101,0,
+    /* 24312 */ 0250,0202,06,0300,01,062,0101,0,
+    /* 24320 */ 0250,0202,012,0300,01,062,0101,0,
+    /* 24328 */ 0250,0202,02,0316,01,062,0101,0,
+    /* 24336 */ 0250,0202,06,0316,01,062,0101,0,
+    /* 24344 */ 0250,0202,012,0316,01,062,0101,0,
+    /* 24352 */ 0250,0202,02,0300,01,065,0101,0,
+    /* 24360 */ 0250,0202,06,0300,01,065,0101,0,
+    /* 24368 */ 0250,0202,012,0300,01,065,0101,0,
+    /* 24376 */ 0250,0202,02,0314,01,065,0101,0,
+    /* 24384 */ 0250,0202,06,0314,01,065,0101,0,
+    /* 24392 */ 0250,0202,012,0314,01,065,0101,0,
+    /* 24400 */ 0250,0202,02,0300,01,064,0101,0,
+    /* 24408 */ 0250,0202,06,0300,01,064,0101,0,
+    /* 24416 */ 0250,0202,012,0300,01,064,0101,0,
+    /* 24424 */ 0250,0202,02,0315,01,064,0101,0,
+    /* 24432 */ 0250,0202,06,0315,01,064,0101,0,
+    /* 24440 */ 0250,0202,012,0315,01,064,0101,0,
+    /* 24448 */ 0250,0202,02,0300,01,041,0101,0,
+    /* 24456 */ 0250,0202,06,0300,01,041,0101,0,
+    /* 24464 */ 0250,0202,012,0300,01,041,0101,0,
+    /* 24472 */ 0250,0202,02,0315,01,041,0101,0,
+    /* 24480 */ 0250,0202,06,0315,01,041,0101,0,
+    /* 24488 */ 0250,0202,012,0315,01,041,0101,0,
+    /* 24496 */ 0250,0202,02,0300,01,043,0101,0,
+    /* 24504 */ 0250,0202,06,0300,01,043,0101,0,
+    /* 24512 */ 0250,0202,012,0300,01,043,0101,0,
+    /* 24520 */ 0250,0202,02,0314,01,043,0101,0,
+    /* 24528 */ 0250,0202,06,0314,01,043,0101,0,
+    /* 24536 */ 0250,0202,012,0314,01,043,0101,0,
+    /* 24544 */ 0250,0202,02,0300,01,042,0101,0,
+    /* 24552 */ 0250,0202,06,0300,01,042,0101,0,
+    /* 24560 */ 0250,0202,012,0300,01,042,0101,0,
+    /* 24568 */ 0250,0202,02,0316,01,042,0101,0,
+    /* 24576 */ 0250,0202,06,0316,01,042,0101,0,
+    /* 24584 */ 0250,0202,012,0316,01,042,0101,0,
+    /* 24592 */ 0250,0202,02,0300,01,045,0101,0,
+    /* 24600 */ 0250,0202,06,0300,01,045,0101,0,
+    /* 24608 */ 0250,0202,012,0300,01,045,0101,0,
+    /* 24616 */ 0250,0202,02,0314,01,045,0101,0,
+    /* 24624 */ 0250,0202,06,0314,01,045,0101,0,
+    /* 24632 */ 0250,0202,012,0314,01,045,0101,0,
+    /* 24640 */ 0250,0202,02,0300,01,044,0101,0,
+    /* 24648 */ 0250,0202,06,0300,01,044,0101,0,
+    /* 24656 */ 0250,0202,012,0300,01,044,0101,0,
+    /* 24664 */ 0250,0202,02,0315,01,044,0101,0,
+    /* 24672 */ 0250,0202,06,0315,01,044,0101,0,
+    /* 24680 */ 0250,0202,012,0315,01,044,0101,0,
+    /* 24688 */ 0250,0202,02,0300,01,040,0101,0,
+    /* 24696 */ 0250,0202,06,0300,01,040,0101,0,
+    /* 24704 */ 0250,0202,012,0300,01,040,0101,0,
+    /* 24712 */ 0250,0202,02,0314,01,040,0101,0,
+    /* 24720 */ 0250,0202,06,0314,01,040,0101,0,
+    /* 24728 */ 0250,0202,012,0314,01,040,0101,0,
+    /* 24736 */ 0250,0202,041,0315,01,041,0110,0,
+    /* 24744 */ 0250,0202,045,0315,01,041,0110,0,
+    /* 24752 */ 0250,0202,051,0315,01,041,0110,0,
+    /* 24760 */ 0250,0202,041,0316,01,042,0110,0,
+    /* 24768 */ 0250,0202,045,0316,01,042,0110,0,
+    /* 24776 */ 0250,0202,051,0316,01,042,0110,0,
+    /* 24784 */ 0250,0202,041,0314,01,040,0110,0,
+    /* 24792 */ 0250,0202,045,0314,01,040,0110,0,
+    /* 24800 */ 0250,0202,051,0314,01,040,0110,0,
+    /* 24808 */ 0250,0202,01,0314,01,045,0110,0,
+    /* 24816 */ 0250,0202,05,0314,01,045,0110,0,
+    /* 24824 */ 0250,0202,011,0314,01,045,0110,0,
+    /* 24832 */ 0250,0202,041,0314,01,043,0110,0,
+    /* 24840 */ 0250,0202,045,0314,01,043,0110,0,
+    /* 24848 */ 0250,0202,051,0314,01,043,0110,0,
+    /* 24856 */ 0250,0202,041,0315,01,044,0110,0,
+    /* 24864 */ 0250,0202,045,0315,01,044,0110,0,
+    /* 24872 */ 0250,0202,051,0315,01,044,0110,0,
+    /* 24880 */ 0250,0202,02,0300,01,021,0101,0,
+    /* 24888 */ 0250,0202,06,0300,01,021,0101,0,
+    /* 24896 */ 0250,0202,012,0300,01,021,0101,0,
+    /* 24904 */ 0250,0202,02,0315,01,021,0101,0,
+    /* 24912 */ 0250,0202,06,0315,01,021,0101,0,
+    /* 24920 */ 0250,0202,012,0315,01,021,0101,0,
+    /* 24928 */ 0250,0202,02,0300,01,023,0101,0,
+    /* 24936 */ 0250,0202,06,0300,01,023,0101,0,
+    /* 24944 */ 0250,0202,012,0300,01,023,0101,0,
+    /* 24952 */ 0250,0202,02,0314,01,023,0101,0,
+    /* 24960 */ 0250,0202,06,0314,01,023,0101,0,
+    /* 24968 */ 0250,0202,012,0314,01,023,0101,0,
+    /* 24976 */ 0250,0202,02,0300,01,022,0101,0,
+    /* 24984 */ 0250,0202,06,0300,01,022,0101,0,
+    /* 24992 */ 0250,0202,012,0300,01,022,0101,0,
+    /* 25000 */ 0250,0202,02,0316,01,022,0101,0,
+    /* 25008 */ 0250,0202,06,0316,01,022,0101,0,
+    /* 25016 */ 0250,0202,012,0316,01,022,0101,0,
+    /* 25024 */ 0250,0202,02,0300,01,025,0101,0,
+    /* 25032 */ 0250,0202,06,0300,01,025,0101,0,
+    /* 25040 */ 0250,0202,012,0300,01,025,0101,0,
+    /* 25048 */ 0250,0202,02,0314,01,025,0101,0,
+    /* 25056 */ 0250,0202,06,0314,01,025,0101,0,
+    /* 25064 */ 0250,0202,012,0314,01,025,0101,0,
+    /* 25072 */ 0250,0202,02,0300,01,024,0101,0,
+    /* 25080 */ 0250,0202,06,0300,01,024,0101,0,
+    /* 25088 */ 0250,0202,012,0300,01,024,0101,0,
+    /* 25096 */ 0250,0202,02,0315,01,024,0101,0,
+    /* 25104 */ 0250,0202,06,0315,01,024,0101,0,
+    /* 25112 */ 0250,0202,012,0315,01,024,0101,0,
+    /* 25120 */ 0250,0202,02,0300,01,020,0101,0,
+    /* 25128 */ 0250,0202,06,0300,01,020,0101,0,
+    /* 25136 */ 0250,0202,012,0300,01,020,0101,0,
+    /* 25144 */ 0250,0202,02,0314,01,020,0101,0,
+    /* 25152 */ 0250,0202,06,0314,01,020,0101,0,
+    /* 25160 */ 0250,0202,012,0314,01,020,0101,0,
+    /* 25168 */ 0250,0202,022,0300,01,051,0110,0,
+    /* 25176 */ 0250,0202,026,0300,01,051,0110,0,
+    /* 25184 */ 0250,0202,032,0300,01,051,0110,0,
+    /* 25192 */ 0250,0202,02,0300,01,060,0101,0,
+    /* 25200 */ 0250,0202,06,0300,01,060,0101,0,
+    /* 25208 */ 0250,0202,012,0300,01,060,0101,0,
+    /* 25216 */ 0250,0202,02,0314,01,060,0101,0,
+    /* 25224 */ 0250,0202,06,0314,01,060,0101,0,
+    /* 25232 */ 0250,0202,012,0314,01,060,0101,0,
+    /* 25240 */ 0250,0202,041,0315,01,061,0110,0,
+    /* 25248 */ 0250,0202,045,0315,01,061,0110,0,
+    /* 25256 */ 0250,0202,051,0315,01,061,0110,0,
+    /* 25264 */ 0250,0202,041,0316,01,062,0110,0,
+    /* 25272 */ 0250,0202,045,0316,01,062,0110,0,
+    /* 25280 */ 0250,0202,051,0316,01,062,0110,0,
+    /* 25288 */ 0250,0202,041,0314,01,060,0110,0,
+    /* 25296 */ 0250,0202,045,0314,01,060,0110,0,
+    /* 25304 */ 0250,0202,051,0314,01,060,0110,0,
+    /* 25312 */ 0250,0202,01,0314,01,065,0110,0,
+    /* 25320 */ 0250,0202,05,0314,01,065,0110,0,
+    /* 25328 */ 0250,0202,011,0314,01,065,0110,0,
+    /* 25336 */ 0250,0202,041,0314,01,063,0110,0,
+    /* 25344 */ 0250,0202,045,0314,01,063,0110,0,
+    /* 25352 */ 0250,0202,051,0314,01,063,0110,0,
+    /* 25360 */ 0250,0202,041,0315,01,064,0110,0,
+    /* 25368 */ 0250,0202,045,0315,01,064,0110,0,
+    /* 25376 */ 0250,0202,051,0315,01,064,0110,0,
+    /* 25384 */ 0241,0202,021,0301,01,050,0120,0,
+    /* 25392 */ 0240,0202,021,0301,01,050,0110,0,
+    /* 25400 */ 0241,0202,025,0301,01,050,0120,0,
+    /* 25408 */ 0240,0202,025,0301,01,050,0110,0,
+    /* 25416 */ 0241,0202,031,0301,01,050,0120,0,
+    /* 25424 */ 0240,0202,031,0301,01,050,0110,0,
+    /* 25432 */ 0241,0202,041,0303,01,013,0120,0,
+    /* 25440 */ 0240,0202,041,0303,01,013,0110,0,
+    /* 25448 */ 0241,0202,045,0303,01,013,0120,0,
+    /* 25456 */ 0240,0202,045,0303,01,013,0110,0,
+    /* 25464 */ 0241,0202,051,0303,01,013,0120,0,
+    /* 25472 */ 0240,0202,051,0303,01,013,0110,0,
+    /* 25480 */ 0241,0201,041,0303,01,0344,0120,0,
+    /* 25488 */ 0240,0201,041,0303,01,0344,0110,0,
+    /* 25496 */ 0241,0201,045,0303,01,0344,0120,0,
+    /* 25504 */ 0240,0201,045,0303,01,0344,0110,0,
+    /* 25512 */ 0241,0201,051,0303,01,0344,0120,0,
+    /* 25520 */ 0240,0201,051,0303,01,0344,0110,0,
+    /* 25528 */ 0241,0201,041,0303,01,0345,0120,0,
+    /* 25536 */ 0240,0201,041,0303,01,0345,0110,0,
+    /* 25544 */ 0241,0201,045,0303,01,0345,0120,0,
+    /* 25552 */ 0240,0201,045,0303,01,0345,0110,0,
+    /* 25560 */ 0241,0201,051,0303,01,0345,0120,0,
+    /* 25568 */ 0240,0201,051,0303,01,0345,0110,0,
+    /* 25576 */ 0241,0202,01,0301,01,0100,0120,0,
+    /* 25584 */ 0240,0202,01,0301,01,0100,0110,0,
+    /* 25592 */ 0241,0202,05,0301,01,0100,0120,0,
+    /* 25600 */ 0240,0202,05,0301,01,0100,0110,0,
+    /* 25608 */ 0241,0202,011,0301,01,0100,0120,0,
+    /* 25616 */ 0240,0202,011,0301,01,0100,0110,0,
+    /* 25624 */ 0241,0202,021,0301,01,0100,0120,0,
+    /* 25632 */ 0240,0202,021,0301,01,0100,0110,0,
+    /* 25640 */ 0241,0202,025,0301,01,0100,0120,0,
+    /* 25648 */ 0240,0202,025,0301,01,0100,0110,0,
+    /* 25656 */ 0241,0202,031,0301,01,0100,0120,0,
+    /* 25664 */ 0240,0202,031,0301,01,0100,0110,0,
+    /* 25672 */ 0241,0201,041,0303,01,0325,0120,0,
+    /* 25680 */ 0240,0201,041,0303,01,0325,0110,0,
+    /* 25688 */ 0241,0201,045,0303,01,0325,0120,0,
+    /* 25696 */ 0240,0201,045,0303,01,0325,0110,0,
+    /* 25704 */ 0241,0201,051,0303,01,0325,0120,0,
+    /* 25712 */ 0240,0201,051,0303,01,0325,0110,0,
+    /* 25720 */ 0241,0202,021,0301,01,0203,0120,0,
+    /* 25728 */ 0240,0202,021,0301,01,0203,0110,0,
+    /* 25736 */ 0241,0202,025,0301,01,0203,0120,0,
+    /* 25744 */ 0240,0202,025,0301,01,0203,0110,0,
+    /* 25752 */ 0241,0202,031,0301,01,0203,0120,0,
+    /* 25760 */ 0240,0202,031,0301,01,0203,0110,0,
+    /* 25768 */ 0241,0201,021,0301,01,0364,0120,0,
+    /* 25776 */ 0240,0201,021,0301,01,0364,0110,0,
+    /* 25784 */ 0241,0201,025,0301,01,0364,0120,0,
+    /* 25792 */ 0240,0201,025,0301,01,0364,0110,0,
+    /* 25800 */ 0241,0201,031,0301,01,0364,0120,0,
+    /* 25808 */ 0240,0201,031,0301,01,0364,0110,0,
+    /* 25816 */ 0241,0201,01,0301,01,0353,0120,0,
+    /* 25824 */ 0240,0201,01,0301,01,0353,0110,0,
+    /* 25832 */ 0241,0201,05,0301,01,0353,0120,0,
+    /* 25840 */ 0240,0201,05,0301,01,0353,0110,0,
+    /* 25848 */ 0241,0201,011,0301,01,0353,0120,0,
+    /* 25856 */ 0240,0201,011,0301,01,0353,0110,0,
+    /* 25864 */ 0241,0201,021,0301,01,0353,0120,0,
+    /* 25872 */ 0240,0201,021,0301,01,0353,0110,0,
+    /* 25880 */ 0241,0201,025,0301,01,0353,0120,0,
+    /* 25888 */ 0240,0201,025,0301,01,0353,0110,0,
+    /* 25896 */ 0241,0201,031,0301,01,0353,0120,0,
+    /* 25904 */ 0240,0201,031,0301,01,0353,0110,0,
+    /* 25912 */ 0241,0202,01,0301,01,025,0120,0,
+    /* 25920 */ 0240,0202,01,0301,01,025,0110,0,
+    /* 25928 */ 0241,0202,05,0301,01,025,0120,0,
+    /* 25936 */ 0240,0202,05,0301,01,025,0110,0,
+    /* 25944 */ 0241,0202,011,0301,01,025,0120,0,
+    /* 25952 */ 0240,0202,011,0301,01,025,0110,0,
+    /* 25960 */ 0241,0202,021,0301,01,025,0120,0,
+    /* 25968 */ 0240,0202,021,0301,01,025,0110,0,
+    /* 25976 */ 0241,0202,025,0301,01,025,0120,0,
+    /* 25984 */ 0240,0202,025,0301,01,025,0110,0,
+    /* 25992 */ 0241,0202,031,0301,01,025,0120,0,
+    /* 26000 */ 0240,0202,031,0301,01,025,0110,0,
+    /* 26008 */ 0241,0202,01,0301,01,024,0120,0,
+    /* 26016 */ 0240,0202,01,0301,01,024,0110,0,
+    /* 26024 */ 0241,0202,05,0301,01,024,0120,0,
+    /* 26032 */ 0240,0202,05,0301,01,024,0110,0,
+    /* 26040 */ 0241,0202,011,0301,01,024,0120,0,
+    /* 26048 */ 0240,0202,011,0301,01,024,0110,0,
+    /* 26056 */ 0241,0202,021,0301,01,024,0120,0,
+    /* 26064 */ 0240,0202,021,0301,01,024,0110,0,
+    /* 26072 */ 0241,0202,025,0301,01,024,0120,0,
+    /* 26080 */ 0240,0202,025,0301,01,024,0110,0,
+    /* 26088 */ 0241,0202,031,0301,01,024,0120,0,
+    /* 26096 */ 0240,0202,031,0301,01,024,0110,0,
+    /* 26104 */ 0241,0201,041,0303,01,0366,0120,0,
+    /* 26112 */ 0240,0201,041,0303,01,0366,0110,0,
+    /* 26120 */ 0241,0201,045,0303,01,0366,0120,0,
+    /* 26128 */ 0240,0201,045,0303,01,0366,0110,0,
+    /* 26136 */ 0241,0201,051,0303,01,0366,0120,0,
+    /* 26144 */ 0240,0201,051,0303,01,0366,0110,0,
+    /* 26152 */ 0241,0202,041,0303,01,0,0120,0,
+    /* 26160 */ 0240,0202,041,0303,01,0,0110,0,
+    /* 26168 */ 0241,0202,045,0303,01,0,0120,0,
+    /* 26176 */ 0240,0202,045,0303,01,0,0110,0,
+    /* 26184 */ 0241,0202,051,0303,01,0,0120,0,
+    /* 26192 */ 0240,0202,051,0303,01,0,0110,0,
+    /* 26200 */ 0241,0201,01,0317,01,0362,0120,0,
+    /* 26208 */ 0240,0201,01,0317,01,0362,0110,0,
+    /* 26216 */ 0241,0201,05,0317,01,0362,0120,0,
+    /* 26224 */ 0240,0201,05,0317,01,0362,0110,0,
+    /* 26232 */ 0241,0201,011,0317,01,0362,0120,0,
+    /* 26240 */ 0240,0201,011,0317,01,0362,0110,0,
+    /* 26248 */ 0241,0201,021,0317,01,0363,0120,0,
+    /* 26256 */ 0240,0201,021,0317,01,0363,0110,0,
+    /* 26264 */ 0241,0201,025,0317,01,0363,0120,0,
+    /* 26272 */ 0240,0201,025,0317,01,0363,0110,0,
+    /* 26280 */ 0241,0201,031,0317,01,0363,0120,0,
+    /* 26288 */ 0240,0201,031,0317,01,0363,0110,0,
+    /* 26296 */ 0241,0202,01,0301,01,0107,0120,0,
+    /* 26304 */ 0240,0202,01,0301,01,0107,0110,0,
+    /* 26312 */ 0241,0202,05,0301,01,0107,0120,0,
+    /* 26320 */ 0240,0202,05,0301,01,0107,0110,0,
+    /* 26328 */ 0241,0202,011,0301,01,0107,0120,0,
+    /* 26336 */ 0240,0202,011,0301,01,0107,0110,0,
+    /* 26344 */ 0241,0202,021,0301,01,0107,0120,0,
+    /* 26352 */ 0240,0202,021,0301,01,0107,0110,0,
+    /* 26360 */ 0241,0202,025,0301,01,0107,0120,0,
+    /* 26368 */ 0240,0202,025,0301,01,0107,0110,0,
+    /* 26376 */ 0241,0202,031,0301,01,0107,0120,0,
+    /* 26384 */ 0240,0202,031,0301,01,0107,0110,0,
+    /* 26392 */ 0241,0202,021,0303,01,022,0120,0,
+    /* 26400 */ 0240,0202,021,0303,01,022,0110,0,
+    /* 26408 */ 0241,0202,025,0303,01,022,0120,0,
+    /* 26416 */ 0240,0202,025,0303,01,022,0110,0,
+    /* 26424 */ 0241,0202,031,0303,01,022,0120,0,
+    /* 26432 */ 0240,0202,031,0303,01,022,0110,0,
+    /* 26440 */ 0241,0201,041,0317,01,0361,0120,0,
+    /* 26448 */ 0240,0201,041,0317,01,0361,0110,0,
+    /* 26456 */ 0241,0201,045,0317,01,0361,0120,0,
+    /* 26464 */ 0240,0201,045,0317,01,0361,0110,0,
+    /* 26472 */ 0241,0201,051,0317,01,0361,0120,0,
+    /* 26480 */ 0240,0201,051,0317,01,0361,0110,0,
+    /* 26488 */ 0241,0201,01,0317,01,0342,0120,0,
+    /* 26496 */ 0240,0201,01,0317,01,0342,0110,0,
+    /* 26504 */ 0241,0201,05,0317,01,0342,0120,0,
+    /* 26512 */ 0240,0201,05,0317,01,0342,0110,0,
+    /* 26520 */ 0241,0201,011,0317,01,0342,0120,0,
+    /* 26528 */ 0240,0201,011,0317,01,0342,0110,0,
+    /* 26536 */ 0241,0201,021,0317,01,0342,0120,0,
+    /* 26544 */ 0240,0201,021,0317,01,0342,0110,0,
+    /* 26552 */ 0241,0201,025,0317,01,0342,0120,0,
+    /* 26560 */ 0240,0201,025,0317,01,0342,0110,0,
+    /* 26568 */ 0241,0201,031,0317,01,0342,0120,0,
+    /* 26576 */ 0240,0201,031,0317,01,0342,0110,0,
+    /* 26584 */ 0241,0202,01,0301,01,0106,0120,0,
+    /* 26592 */ 0240,0202,01,0301,01,0106,0110,0,
+    /* 26600 */ 0241,0202,05,0301,01,0106,0120,0,
+    /* 26608 */ 0240,0202,05,0301,01,0106,0110,0,
+    /* 26616 */ 0241,0202,011,0301,01,0106,0120,0,
+    /* 26624 */ 0240,0202,011,0301,01,0106,0110,0,
+    /* 26632 */ 0241,0202,021,0301,01,0106,0120,0,
+    /* 26640 */ 0240,0202,021,0301,01,0106,0110,0,
+    /* 26648 */ 0241,0202,025,0301,01,0106,0120,0,
+    /* 26656 */ 0240,0202,025,0301,01,0106,0110,0,
+    /* 26664 */ 0241,0202,031,0301,01,0106,0120,0,
+    /* 26672 */ 0240,0202,031,0301,01,0106,0110,0,
+    /* 26680 */ 0241,0202,021,0303,01,021,0120,0,
+    /* 26688 */ 0240,0202,021,0303,01,021,0110,0,
+    /* 26696 */ 0241,0202,025,0303,01,021,0120,0,
+    /* 26704 */ 0240,0202,025,0303,01,021,0110,0,
+    /* 26712 */ 0241,0202,031,0303,01,021,0120,0,
+    /* 26720 */ 0240,0202,031,0303,01,021,0110,0,
+    /* 26728 */ 0241,0201,041,0317,01,0341,0120,0,
+    /* 26736 */ 0240,0201,041,0317,01,0341,0110,0,
+    /* 26744 */ 0241,0201,045,0317,01,0341,0120,0,
+    /* 26752 */ 0240,0201,045,0317,01,0341,0110,0,
+    /* 26760 */ 0241,0201,051,0317,01,0341,0120,0,
+    /* 26768 */ 0240,0201,051,0317,01,0341,0110,0,
+    /* 26776 */ 0241,0201,01,0317,01,0322,0120,0,
+    /* 26784 */ 0240,0201,01,0317,01,0322,0110,0,
+    /* 26792 */ 0241,0201,05,0317,01,0322,0120,0,
+    /* 26800 */ 0240,0201,05,0317,01,0322,0110,0,
+    /* 26808 */ 0241,0201,011,0317,01,0322,0120,0,
+    /* 26816 */ 0240,0201,011,0317,01,0322,0110,0,
+    /* 26824 */ 0241,0201,021,0317,01,0323,0120,0,
+    /* 26832 */ 0240,0201,021,0317,01,0323,0110,0,
+    /* 26840 */ 0241,0201,025,0317,01,0323,0120,0,
+    /* 26848 */ 0240,0201,025,0317,01,0323,0110,0,
+    /* 26856 */ 0241,0201,031,0317,01,0323,0120,0,
+    /* 26864 */ 0240,0201,031,0317,01,0323,0110,0,
+    /* 26872 */ 0241,0202,01,0301,01,0105,0120,0,
+    /* 26880 */ 0240,0202,01,0301,01,0105,0110,0,
+    /* 26888 */ 0241,0202,05,0301,01,0105,0120,0,
+    /* 26896 */ 0240,0202,05,0301,01,0105,0110,0,
+    /* 26904 */ 0241,0202,011,0301,01,0105,0120,0,
+    /* 26912 */ 0240,0202,011,0301,01,0105,0110,0,
+    /* 26920 */ 0241,0202,021,0301,01,0105,0120,0,
+    /* 26928 */ 0240,0202,021,0301,01,0105,0110,0,
+    /* 26936 */ 0241,0202,025,0301,01,0105,0120,0,
+    /* 26944 */ 0240,0202,025,0301,01,0105,0110,0,
+    /* 26952 */ 0241,0202,031,0301,01,0105,0120,0,
+    /* 26960 */ 0240,0202,031,0301,01,0105,0110,0,
+    /* 26968 */ 0241,0202,021,0303,01,020,0120,0,
+    /* 26976 */ 0240,0202,021,0303,01,020,0110,0,
+    /* 26984 */ 0241,0202,025,0303,01,020,0120,0,
+    /* 26992 */ 0240,0202,025,0303,01,020,0110,0,
+    /* 27000 */ 0241,0202,031,0303,01,020,0120,0,
+    /* 27008 */ 0240,0202,031,0303,01,020,0110,0,
+    /* 27016 */ 0241,0201,041,0317,01,0321,0120,0,
+    /* 27024 */ 0240,0201,041,0317,01,0321,0110,0,
+    /* 27032 */ 0241,0201,045,0317,01,0321,0120,0,
+    /* 27040 */ 0240,0201,045,0317,01,0321,0110,0,
+    /* 27048 */ 0241,0201,051,0317,01,0321,0120,0,
+    /* 27056 */ 0240,0201,051,0317,01,0321,0110,0,
+    /* 27064 */ 0241,0201,041,0303,01,0370,0120,0,
+    /* 27072 */ 0240,0201,041,0303,01,0370,0110,0,
+    /* 27080 */ 0241,0201,045,0303,01,0370,0120,0,
+    /* 27088 */ 0240,0201,045,0303,01,0370,0110,0,
+    /* 27096 */ 0241,0201,051,0303,01,0370,0120,0,
+    /* 27104 */ 0240,0201,051,0303,01,0370,0110,0,
+    /* 27112 */ 0241,0201,01,0301,01,0372,0120,0,
+    /* 27120 */ 0240,0201,01,0301,01,0372,0110,0,
+    /* 27128 */ 0241,0201,05,0301,01,0372,0120,0,
+    /* 27136 */ 0240,0201,05,0301,01,0372,0110,0,
+    /* 27144 */ 0241,0201,011,0301,01,0372,0120,0,
+    /* 27152 */ 0240,0201,011,0301,01,0372,0110,0,
+    /* 27160 */ 0241,0201,021,0301,01,0373,0120,0,
+    /* 27168 */ 0240,0201,021,0301,01,0373,0110,0,
+    /* 27176 */ 0241,0201,025,0301,01,0373,0120,0,
+    /* 27184 */ 0240,0201,025,0301,01,0373,0110,0,
+    /* 27192 */ 0241,0201,031,0301,01,0373,0120,0,
+    /* 27200 */ 0240,0201,031,0301,01,0373,0110,0,
+    /* 27208 */ 0241,0201,041,0303,01,0350,0120,0,
+    /* 27216 */ 0240,0201,041,0303,01,0350,0110,0,
+    /* 27224 */ 0241,0201,045,0303,01,0350,0120,0,
+    /* 27232 */ 0240,0201,045,0303,01,0350,0110,0,
+    /* 27240 */ 0241,0201,051,0303,01,0350,0120,0,
+    /* 27248 */ 0240,0201,051,0303,01,0350,0110,0,
+    /* 27256 */ 0241,0201,041,0303,01,0351,0120,0,
+    /* 27264 */ 0240,0201,041,0303,01,0351,0110,0,
+    /* 27272 */ 0241,0201,045,0303,01,0351,0120,0,
+    /* 27280 */ 0240,0201,045,0303,01,0351,0110,0,
+    /* 27288 */ 0241,0201,051,0303,01,0351,0120,0,
+    /* 27296 */ 0240,0201,051,0303,01,0351,0110,0,
+    /* 27304 */ 0241,0201,041,0303,01,0330,0120,0,
+    /* 27312 */ 0240,0201,041,0303,01,0330,0110,0,
+    /* 27320 */ 0241,0201,045,0303,01,0330,0120,0,
+    /* 27328 */ 0240,0201,045,0303,01,0330,0110,0,
+    /* 27336 */ 0241,0201,051,0303,01,0330,0120,0,
+    /* 27344 */ 0240,0201,051,0303,01,0330,0110,0,
+    /* 27352 */ 0241,0201,041,0303,01,0331,0120,0,
+    /* 27360 */ 0240,0201,041,0303,01,0331,0110,0,
+    /* 27368 */ 0241,0201,045,0303,01,0331,0120,0,
+    /* 27376 */ 0240,0201,045,0303,01,0331,0110,0,
+    /* 27384 */ 0241,0201,051,0303,01,0331,0120,0,
+    /* 27392 */ 0240,0201,051,0303,01,0331,0110,0,
+    /* 27400 */ 0241,0201,041,0303,01,0371,0120,0,
+    /* 27408 */ 0240,0201,041,0303,01,0371,0110,0,
+    /* 27416 */ 0241,0201,045,0303,01,0371,0120,0,
+    /* 27424 */ 0240,0201,045,0303,01,0371,0110,0,
+    /* 27432 */ 0241,0201,051,0303,01,0371,0120,0,
+    /* 27440 */ 0240,0201,051,0303,01,0371,0110,0,
+    /* 27448 */ 0241,0202,01,0303,01,046,0120,0,
+    /* 27456 */ 0241,0202,05,0303,01,046,0120,0,
+    /* 27464 */ 0241,0202,011,0303,01,046,0120,0,
+    /* 27472 */ 0241,0202,01,0301,01,047,0120,0,
+    /* 27480 */ 0241,0202,05,0301,01,047,0120,0,
+    /* 27488 */ 0241,0202,011,0301,01,047,0120,0,
+    /* 27496 */ 0241,0202,021,0301,01,047,0120,0,
+    /* 27504 */ 0241,0202,025,0301,01,047,0120,0,
+    /* 27512 */ 0241,0202,031,0301,01,047,0120,0,
+    /* 27520 */ 0241,0202,021,0303,01,046,0120,0,
+    /* 27528 */ 0241,0202,025,0303,01,046,0120,0,
+    /* 27536 */ 0241,0202,031,0303,01,046,0120,0,
+    /* 27544 */ 0241,0202,02,0303,01,046,0120,0,
+    /* 27552 */ 0241,0202,06,0303,01,046,0120,0,
+    /* 27560 */ 0241,0202,012,0303,01,046,0120,0,
+    /* 27568 */ 0241,0202,02,0301,01,047,0120,0,
+    /* 27576 */ 0241,0202,06,0301,01,047,0120,0,
+    /* 27584 */ 0241,0202,012,0301,01,047,0120,0,
+    /* 27592 */ 0241,0202,022,0301,01,047,0120,0,
+    /* 27600 */ 0241,0202,026,0301,01,047,0120,0,
+    /* 27608 */ 0241,0202,032,0301,01,047,0120,0,
+    /* 27616 */ 0241,0202,022,0303,01,046,0120,0,
+    /* 27624 */ 0241,0202,026,0303,01,046,0120,0,
+    /* 27632 */ 0241,0202,032,0303,01,046,0120,0,
+    /* 27640 */ 0241,0201,041,0303,01,0150,0120,0,
+    /* 27648 */ 0240,0201,041,0303,01,0150,0110,0,
+    /* 27656 */ 0241,0201,045,0303,01,0150,0120,0,
+    /* 27664 */ 0240,0201,045,0303,01,0150,0110,0,
+    /* 27672 */ 0241,0201,051,0303,01,0150,0120,0,
+    /* 27680 */ 0240,0201,051,0303,01,0150,0110,0,
+    /* 27688 */ 0241,0201,01,0301,01,0152,0120,0,
+    /* 27696 */ 0240,0201,01,0301,01,0152,0110,0,
+    /* 27704 */ 0241,0201,05,0301,01,0152,0120,0,
+    /* 27712 */ 0240,0201,05,0301,01,0152,0110,0,
+    /* 27720 */ 0241,0201,011,0301,01,0152,0120,0,
+    /* 27728 */ 0240,0201,011,0301,01,0152,0110,0,
+    /* 27736 */ 0241,0201,021,0301,01,0155,0120,0,
+    /* 27744 */ 0240,0201,021,0301,01,0155,0110,0,
+    /* 27752 */ 0241,0201,025,0301,01,0155,0120,0,
+    /* 27760 */ 0240,0201,025,0301,01,0155,0110,0,
+    /* 27768 */ 0241,0201,031,0301,01,0155,0120,0,
+    /* 27776 */ 0240,0201,031,0301,01,0155,0110,0,
+    /* 27784 */ 0241,0201,041,0303,01,0151,0120,0,
+    /* 27792 */ 0240,0201,041,0303,01,0151,0110,0,
+    /* 27800 */ 0241,0201,045,0303,01,0151,0120,0,
+    /* 27808 */ 0240,0201,045,0303,01,0151,0110,0,
+    /* 27816 */ 0241,0201,051,0303,01,0151,0120,0,
+    /* 27824 */ 0240,0201,051,0303,01,0151,0110,0,
+    /* 27832 */ 0241,0201,041,0303,01,0140,0120,0,
+    /* 27840 */ 0240,0201,041,0303,01,0140,0110,0,
+    /* 27848 */ 0241,0201,045,0303,01,0140,0120,0,
+    /* 27856 */ 0240,0201,045,0303,01,0140,0110,0,
+    /* 27864 */ 0241,0201,051,0303,01,0140,0120,0,
+    /* 27872 */ 0240,0201,051,0303,01,0140,0110,0,
+    /* 27880 */ 0241,0201,01,0301,01,0142,0120,0,
+    /* 27888 */ 0240,0201,01,0301,01,0142,0110,0,
+    /* 27896 */ 0241,0201,05,0301,01,0142,0120,0,
+    /* 27904 */ 0240,0201,05,0301,01,0142,0110,0,
+    /* 27912 */ 0241,0201,011,0301,01,0142,0120,0,
+    /* 27920 */ 0240,0201,011,0301,01,0142,0110,0,
+    /* 27928 */ 0241,0201,021,0301,01,0154,0120,0,
+    /* 27936 */ 0240,0201,021,0301,01,0154,0110,0,
+    /* 27944 */ 0241,0201,025,0301,01,0154,0120,0,
+    /* 27952 */ 0240,0201,025,0301,01,0154,0110,0,
+    /* 27960 */ 0241,0201,031,0301,01,0154,0120,0,
+    /* 27968 */ 0240,0201,031,0301,01,0154,0110,0,
+    /* 27976 */ 0241,0201,041,0303,01,0141,0120,0,
+    /* 27984 */ 0240,0201,041,0303,01,0141,0110,0,
+    /* 27992 */ 0241,0201,045,0303,01,0141,0120,0,
+    /* 28000 */ 0240,0201,045,0303,01,0141,0110,0,
+    /* 28008 */ 0241,0201,051,0303,01,0141,0120,0,
+    /* 28016 */ 0240,0201,051,0303,01,0141,0110,0,
+    /* 28024 */ 0241,0201,01,0301,01,0357,0120,0,
+    /* 28032 */ 0240,0201,01,0301,01,0357,0110,0,
+    /* 28040 */ 0241,0201,05,0301,01,0357,0120,0,
+    /* 28048 */ 0240,0201,05,0301,01,0357,0110,0,
+    /* 28056 */ 0241,0201,011,0301,01,0357,0120,0,
+    /* 28064 */ 0240,0201,011,0301,01,0357,0110,0,
+    /* 28072 */ 0241,0201,021,0301,01,0357,0120,0,
+    /* 28080 */ 0240,0201,021,0301,01,0357,0110,0,
+    /* 28088 */ 0241,0201,025,0301,01,0357,0120,0,
+    /* 28096 */ 0240,0201,025,0301,01,0357,0110,0,
+    /* 28104 */ 0241,0201,031,0301,01,0357,0120,0,
+    /* 28112 */ 0240,0201,031,0301,01,0357,0110,0,
+    /* 28120 */ 0250,0202,021,0301,01,0114,0110,0,
+    /* 28128 */ 0250,0202,025,0301,01,0114,0110,0,
+    /* 28136 */ 0250,0202,031,0301,01,0114,0110,0,
+    /* 28144 */ 0250,0202,01,0301,01,0114,0110,0,
+    /* 28152 */ 0250,0202,05,0301,01,0114,0110,0,
+    /* 28160 */ 0250,0202,011,0301,01,0114,0110,0,
+    /* 28168 */ 0241,0202,021,0306,01,0115,0120,0,
+    /* 28176 */ 0240,0202,021,0306,01,0115,0110,0,
+    /* 28184 */ 0241,0202,01,0306,01,0115,0120,0,
+    /* 28192 */ 0240,0202,01,0306,01,0115,0110,0,
+    /* 28200 */ 0250,0202,031,0301,01,0312,0110,0,
+    /* 28208 */ 0250,0202,011,0301,01,0312,0110,0,
+    /* 28216 */ 0241,0202,021,0306,01,0313,0120,0,
+    /* 28224 */ 0240,0202,021,0306,01,0313,0110,0,
+    /* 28232 */ 0241,0202,01,0306,01,0313,0120,0,
+    /* 28240 */ 0240,0202,01,0306,01,0313,0110,0,
+    /* 28248 */ 0250,0202,021,0301,01,0116,0110,0,
+    /* 28256 */ 0250,0202,025,0301,01,0116,0110,0,
+    /* 28264 */ 0250,0202,031,0301,01,0116,0110,0,
+    /* 28272 */ 0250,0202,01,0301,01,0116,0110,0,
+    /* 28280 */ 0250,0202,05,0301,01,0116,0110,0,
+    /* 28288 */ 0250,0202,011,0301,01,0116,0110,0,
+    /* 28296 */ 0241,0202,021,0306,01,0117,0120,0,
+    /* 28304 */ 0240,0202,021,0306,01,0117,0110,0,
+    /* 28312 */ 0241,0202,01,0306,01,0117,0120,0,
+    /* 28320 */ 0240,0202,01,0306,01,0117,0110,0,
+    /* 28328 */ 0250,0202,031,0301,01,0314,0110,0,
+    /* 28336 */ 0250,0202,011,0301,01,0314,0110,0,
+    /* 28344 */ 0241,0202,021,0306,01,0315,0120,0,
+    /* 28352 */ 0240,0202,021,0306,01,0315,0110,0,
+    /* 28360 */ 0241,0202,01,0306,01,0315,0120,0,
+    /* 28368 */ 0240,0202,01,0306,01,0315,0110,0,
+    /* 28376 */ 0241,0202,021,0301,01,054,0120,0,
+    /* 28384 */ 0240,0202,021,0301,01,054,0110,0,
+    /* 28392 */ 0241,0202,025,0301,01,054,0120,0,
+    /* 28400 */ 0240,0202,025,0301,01,054,0110,0,
+    /* 28408 */ 0241,0202,031,0301,01,054,0120,0,
+    /* 28416 */ 0240,0202,031,0301,01,054,0110,0,
+    /* 28424 */ 0241,0202,01,0301,01,054,0120,0,
+    /* 28432 */ 0240,0202,01,0301,01,054,0110,0,
+    /* 28440 */ 0241,0202,05,0301,01,054,0120,0,
+    /* 28448 */ 0240,0202,05,0301,01,054,0110,0,
+    /* 28456 */ 0241,0202,011,0301,01,054,0120,0,
+    /* 28464 */ 0240,0202,011,0301,01,054,0110,0,
+    /* 28472 */ 0241,0202,021,0306,01,055,0120,0,
+    /* 28480 */ 0240,0202,021,0306,01,055,0110,0,
+    /* 28488 */ 0241,0202,01,0306,01,055,0120,0,
+    /* 28496 */ 0240,0202,01,0306,01,055,0110,0,
+    /* 28504 */ 0250,0201,021,0301,01,0121,0110,0,
+    /* 28512 */ 0250,0201,025,0301,01,0121,0110,0,
+    /* 28520 */ 0250,0201,031,0301,01,0121,0110,0,
+    /* 28528 */ 0250,0201,0,0301,01,0121,0110,0,
+    /* 28536 */ 0250,0201,04,0301,01,0121,0110,0,
+    /* 28544 */ 0250,0201,010,0301,01,0121,0110,0,
+    /* 28552 */ 0241,0201,023,0306,01,0121,0120,0,
+    /* 28560 */ 0240,0201,023,0306,01,0121,0110,0,
+    /* 28568 */ 0241,0201,02,0306,01,0121,0120,0,
+    /* 28576 */ 0240,0201,02,0306,01,0121,0110,0,
+    /* 28584 */ 0241,0201,021,0301,01,0134,0120,0,
+    /* 28592 */ 0240,0201,021,0301,01,0134,0110,0,
+    /* 28600 */ 0241,0201,025,0301,01,0134,0120,0,
+    /* 28608 */ 0240,0201,025,0301,01,0134,0110,0,
+    /* 28616 */ 0241,0201,031,0301,01,0134,0120,0,
+    /* 28624 */ 0240,0201,031,0301,01,0134,0110,0,
+    /* 28632 */ 0241,0201,0,0301,01,0134,0120,0,
+    /* 28640 */ 0240,0201,0,0301,01,0134,0110,0,
+    /* 28648 */ 0241,0201,04,0301,01,0134,0120,0,
+    /* 28656 */ 0240,0201,04,0301,01,0134,0110,0,
+    /* 28664 */ 0241,0201,010,0301,01,0134,0120,0,
+    /* 28672 */ 0240,0201,010,0301,01,0134,0110,0,
+    /* 28680 */ 0241,0201,023,0306,01,0134,0120,0,
+    /* 28688 */ 0240,0201,023,0306,01,0134,0110,0,
+    /* 28696 */ 0241,0201,02,0306,01,0134,0120,0,
+    /* 28704 */ 0240,0201,02,0306,01,0134,0110,0,
+    /* 28712 */ 0250,0201,021,0306,01,056,0110,0,
+    /* 28720 */ 0250,0201,0,0306,01,056,0110,0,
+    /* 28728 */ 0241,0201,021,0301,01,025,0120,0,
+    /* 28736 */ 0240,0201,021,0301,01,025,0110,0,
+    /* 28744 */ 0241,0201,025,0301,01,025,0120,0,
+    /* 28752 */ 0240,0201,025,0301,01,025,0110,0,
+    /* 28760 */ 0241,0201,031,0301,01,025,0120,0,
+    /* 28768 */ 0240,0201,031,0301,01,025,0110,0,
+    /* 28776 */ 0241,0201,0,0301,01,025,0120,0,
+    /* 28784 */ 0240,0201,0,0301,01,025,0110,0,
+    /* 28792 */ 0241,0201,04,0301,01,025,0120,0,
+    /* 28800 */ 0240,0201,04,0301,01,025,0110,0,
+    /* 28808 */ 0241,0201,010,0301,01,025,0120,0,
+    /* 28816 */ 0240,0201,010,0301,01,025,0110,0,
+    /* 28824 */ 0241,0201,021,0301,01,024,0120,0,
+    /* 28832 */ 0240,0201,021,0301,01,024,0110,0,
+    /* 28840 */ 0241,0201,025,0301,01,024,0120,0,
+    /* 28848 */ 0240,0201,025,0301,01,024,0110,0,
+    /* 28856 */ 0241,0201,031,0301,01,024,0120,0,
+    /* 28864 */ 0240,0201,031,0301,01,024,0110,0,
+    /* 28872 */ 0241,0201,0,0301,01,024,0120,0,
+    /* 28880 */ 0240,0201,0,0301,01,024,0110,0,
+    /* 28888 */ 0241,0201,04,0301,01,024,0120,0,
+    /* 28896 */ 0240,0201,04,0301,01,024,0110,0,
+    /* 28904 */ 0241,0201,010,0301,01,024,0120,0,
+    /* 28912 */ 0240,0201,010,0301,01,024,0110,0,
+    /* 28920 */ 0241,0201,021,0301,01,0127,0120,0,
+    /* 28928 */ 0240,0201,021,0301,01,0127,0110,0,
+    /* 28936 */ 0241,0201,025,0301,01,0127,0120,0,
+    /* 28944 */ 0240,0201,025,0301,01,0127,0110,0,
+    /* 28952 */ 0241,0201,031,0301,01,0127,0120,0,
+    /* 28960 */ 0240,0201,031,0301,01,0127,0110,0,
+    /* 28968 */ 0241,0201,0,0301,01,0127,0120,0,
+    /* 28976 */ 0240,0201,0,0301,01,0127,0110,0,
+    /* 28984 */ 0241,0201,04,0301,01,0127,0120,0,
+    /* 28992 */ 0240,0201,04,0301,01,0127,0110,0,
+    /* 29000 */ 0241,0201,010,0301,01,0127,0120,0,
+    /* 29008 */ 0240,0201,010,0301,01,0127,0110,0,
+    /* 29016 */ 0310,0361,03,017,070,0370,0110,0,
+    /* 29024 */ 0311,0361,03,017,070,0370,0110,0,
+    /* 29032 */ 0323,0313,0333,02,017,0256,0206,0,
+    /* 29040 */ 0361,03,017,072,0317,0110,022,0,
+    /* 29048 */ 0261,03,021,01,0317,0120,023,0,
+    /* 29056 */ 0260,03,021,01,0317,0110,022,0,
+    /* 29064 */ 0261,03,025,01,0317,0120,023,0,
+    /* 29072 */ 0260,03,025,01,0317,0110,022,0,
+    /* 29080 */ 0361,03,017,072,0316,0110,022,0,
+    /* 29088 */ 0261,03,021,01,0316,0120,023,0,
+    /* 29096 */ 0260,03,021,01,0316,0110,022,0,
+    /* 29104 */ 0261,03,025,01,0316,0120,023,0,
+    /* 29112 */ 0260,03,025,01,0316,0110,022,0,
+    /* 29120 */ 0241,0202,01,0303,01,0317,0120,0,
+    /* 29128 */ 0240,0202,01,0303,01,0317,0110,0,
+    /* 29136 */ 0241,0202,05,0303,01,0317,0120,0,
+    /* 29144 */ 0240,0202,05,0303,01,0317,0110,0,
+    /* 29152 */ 0241,0202,011,0303,01,0317,0120,0,
+    /* 29160 */ 0240,0202,011,0303,01,0317,0110,0,
+    /* 29168 */ 0250,0202,01,0304,01,0143,0101,0,
+    /* 29176 */ 0250,0202,05,0304,01,0143,0101,0,
+    /* 29184 */ 0250,0202,011,0304,01,0143,0101,0,
+    /* 29192 */ 0250,0202,01,0300,01,0143,0101,0,
+    /* 29200 */ 0250,0202,05,0300,01,0143,0101,0,
+    /* 29208 */ 0250,0202,011,0300,01,0143,0101,0,
+    /* 29216 */ 0250,0202,021,0305,01,0143,0101,0,
+    /* 29224 */ 0250,0202,025,0305,01,0143,0101,0,
+    /* 29232 */ 0250,0202,031,0305,01,0143,0101,0,
+    /* 29240 */ 0250,0202,021,0300,01,0143,0101,0,
+    /* 29248 */ 0250,0202,025,0300,01,0143,0101,0,
+    /* 29256 */ 0250,0202,031,0300,01,0143,0101,0,
+    /* 29264 */ 0250,0202,01,0304,01,0142,0110,0,
+    /* 29272 */ 0250,0202,05,0304,01,0142,0110,0,
+    /* 29280 */ 0250,0202,011,0304,01,0142,0110,0,
+    /* 29288 */ 0250,0202,021,0305,01,0142,0110,0,
+    /* 29296 */ 0250,0202,025,0305,01,0142,0110,0,
+    /* 29304 */ 0250,0202,031,0305,01,0142,0110,0,
+    /* 29312 */ 0241,0202,021,0303,01,0160,0120,0,
+    /* 29320 */ 0240,0202,021,0303,01,0160,0110,0,
+    /* 29328 */ 0241,0202,025,0303,01,0160,0120,0,
+    /* 29336 */ 0240,0202,025,0303,01,0160,0110,0,
+    /* 29344 */ 0241,0202,031,0303,01,0160,0120,0,
+    /* 29352 */ 0240,0202,031,0303,01,0160,0110,0,
+    /* 29360 */ 0241,0202,01,0301,01,0161,0120,0,
+    /* 29368 */ 0240,0202,01,0301,01,0161,0110,0,
+    /* 29376 */ 0241,0202,05,0301,01,0161,0120,0,
+    /* 29384 */ 0240,0202,05,0301,01,0161,0110,0,
+    /* 29392 */ 0241,0202,011,0301,01,0161,0120,0,
+    /* 29400 */ 0240,0202,011,0301,01,0161,0110,0,
+    /* 29408 */ 0241,0202,021,0301,01,0161,0120,0,
+    /* 29416 */ 0240,0202,021,0301,01,0161,0110,0,
+    /* 29424 */ 0241,0202,025,0301,01,0161,0120,0,
+    /* 29432 */ 0240,0202,025,0301,01,0161,0110,0,
+    /* 29440 */ 0241,0202,031,0301,01,0161,0120,0,
+    /* 29448 */ 0240,0202,031,0301,01,0161,0110,0,
+    /* 29456 */ 0241,0202,021,0303,01,0162,0120,0,
+    /* 29464 */ 0240,0202,021,0303,01,0162,0110,0,
+    /* 29472 */ 0241,0202,025,0303,01,0162,0120,0,
+    /* 29480 */ 0240,0202,025,0303,01,0162,0110,0,
+    /* 29488 */ 0241,0202,031,0303,01,0162,0120,0,
+    /* 29496 */ 0240,0202,031,0303,01,0162,0110,0,
+    /* 29504 */ 0241,0202,01,0301,01,0163,0120,0,
+    /* 29512 */ 0240,0202,01,0301,01,0163,0110,0,
+    /* 29520 */ 0241,0202,05,0301,01,0163,0120,0,
+    /* 29528 */ 0240,0202,05,0301,01,0163,0110,0,
+    /* 29536 */ 0241,0202,011,0301,01,0163,0120,0,
+    /* 29544 */ 0240,0202,011,0301,01,0163,0110,0,
+    /* 29552 */ 0241,0202,021,0301,01,0163,0120,0,
+    /* 29560 */ 0240,0202,021,0301,01,0163,0110,0,
+    /* 29568 */ 0241,0202,025,0301,01,0163,0120,0,
+    /* 29576 */ 0240,0202,025,0301,01,0163,0110,0,
+    /* 29584 */ 0241,0202,031,0301,01,0163,0120,0,
+    /* 29592 */ 0240,0202,031,0301,01,0163,0110,0,
+    /* 29600 */ 0241,0202,01,0301,01,0120,0120,0,
+    /* 29608 */ 0240,0202,01,0301,01,0120,0110,0,
+    /* 29616 */ 0241,0202,05,0301,01,0120,0120,0,
+    /* 29624 */ 0240,0202,05,0301,01,0120,0110,0,
+    /* 29632 */ 0241,0202,011,0301,01,0120,0120,0,
+    /* 29640 */ 0240,0202,011,0301,01,0120,0110,0,
+    /* 29648 */ 0241,0202,01,0301,01,0121,0120,0,
+    /* 29656 */ 0240,0202,01,0301,01,0121,0110,0,
+    /* 29664 */ 0241,0202,05,0301,01,0121,0120,0,
+    /* 29672 */ 0240,0202,05,0301,01,0121,0110,0,
+    /* 29680 */ 0241,0202,011,0301,01,0121,0120,0,
+    /* 29688 */ 0240,0202,011,0301,01,0121,0110,0,
+    /* 29696 */ 0241,0202,01,0301,01,0122,0120,0,
+    /* 29704 */ 0240,0202,01,0301,01,0122,0110,0,
+    /* 29712 */ 0241,0202,05,0301,01,0122,0120,0,
+    /* 29720 */ 0240,0202,05,0301,01,0122,0110,0,
+    /* 29728 */ 0241,0202,011,0301,01,0122,0120,0,
+    /* 29736 */ 0240,0202,011,0301,01,0122,0110,0,
+    /* 29744 */ 0241,0202,01,0301,01,0123,0120,0,
+    /* 29752 */ 0240,0202,01,0301,01,0123,0110,0,
+    /* 29760 */ 0241,0202,05,0301,01,0123,0120,0,
+    /* 29768 */ 0240,0202,05,0301,01,0123,0110,0,
+    /* 29776 */ 0241,0202,011,0301,01,0123,0120,0,
+    /* 29784 */ 0240,0202,011,0301,01,0123,0110,0,
+    /* 29792 */ 0250,0202,01,0303,01,0124,0110,0,
+    /* 29800 */ 0250,0202,05,0303,01,0124,0110,0,
+    /* 29808 */ 0250,0202,011,0303,01,0124,0110,0,
+    /* 29816 */ 0250,0202,021,0303,01,0124,0110,0,
+    /* 29824 */ 0250,0202,025,0303,01,0124,0110,0,
+    /* 29832 */ 0250,0202,031,0303,01,0124,0110,0,
+    /* 29840 */ 0250,0202,01,0301,01,0125,0110,0,
+    /* 29848 */ 0250,0202,05,0301,01,0125,0110,0,
+    /* 29856 */ 0250,0202,011,0301,01,0125,0110,0,
+    /* 29864 */ 0250,0202,021,0301,01,0125,0110,0,
+    /* 29872 */ 0250,0202,025,0301,01,0125,0110,0,
+    /* 29880 */ 0250,0202,031,0301,01,0125,0110,0,
+    /* 29888 */ 0241,0202,01,0303,01,0217,0120,0,
+    /* 29896 */ 0241,0202,05,0303,01,0217,0120,0,
+    /* 29904 */ 0241,0202,011,0303,01,0217,0120,0,
+    /* 29912 */ 0241,0202,013,0317,01,0232,0120,0,
+    /* 29920 */ 0241,0202,013,0317,01,0252,0120,0,
+    /* 29928 */ 0241,0202,03,0317,01,0233,0120,0,
+    /* 29936 */ 0241,0202,03,0317,01,0253,0120,0,
+    /* 29944 */ 0241,0202,013,0317,01,0123,0120,0,
+    /* 29952 */ 0241,0202,013,0317,01,0122,0120,0,
+    /* 29960 */ 0321,0361,03,017,070,0365,0101,0,
+    /* 29968 */ 0324,0361,03,017,070,0365,0101,0,
+    /* 29976 */ 0310,0332,03,017,070,0370,0110,0,
+    /* 29984 */ 0311,0332,03,017,070,0370,0110,0,
+    /* 29992 */ 0313,0332,03,017,070,0370,0110,0,
+    /* 30000 */ 0310,0333,03,017,070,0370,0110,0,
+    /* 30008 */ 0311,0333,03,017,070,0370,0110,0,
+    /* 30016 */ 0313,0333,03,017,070,0370,0110,0,
+    /* 30024 */ 0241,0202,03,0301,01,0162,0120,0,
+    /* 30032 */ 0240,0202,03,0301,01,0162,0110,0,
+    /* 30040 */ 0241,0202,07,0301,01,0162,0120,0,
+    /* 30048 */ 0240,0202,07,0301,01,0162,0110,0,
+    /* 30056 */ 0241,0202,013,0301,01,0162,0120,0,
+    /* 30064 */ 0240,0202,013,0301,01,0162,0110,0,
+    /* 30072 */ 0241,0202,02,0301,01,0162,0120,0,
+    /* 30080 */ 0240,0202,02,0301,01,0162,0110,0,
+    /* 30088 */ 0241,0202,06,0301,01,0162,0120,0,
+    /* 30096 */ 0240,0202,06,0301,01,0162,0110,0,
+    /* 30104 */ 0241,0202,012,0301,01,0162,0120,0,
+    /* 30112 */ 0240,0202,012,0301,01,0162,0110,0,
+    /* 30120 */ 0241,0202,02,0301,01,0122,0120,0,
+    /* 30128 */ 0240,0202,02,0301,01,0122,0110,0,
+    /* 30136 */ 0241,0202,06,0301,01,0122,0120,0,
+    /* 30144 */ 0240,0202,06,0301,01,0122,0110,0,
+    /* 30152 */ 0241,0202,012,0301,01,0122,0120,0,
+    /* 30160 */ 0240,0202,012,0301,01,0122,0110,0,
+    /* 30168 */ 0241,0202,03,0301,01,0150,0120,0,
+    /* 30176 */ 0241,0202,07,0301,01,0150,0120,0,
+    /* 30184 */ 0241,0202,013,0301,01,0150,0120,0,
+    /* 30192 */ 0270,02,03,01,0111,0171,0300,0,
+    /* 30200 */ 0241,0205,0,0301,01,0130,0120,0,
+    /* 30208 */ 0240,0205,0,0301,01,0130,0110,0,
+    /* 30216 */ 0241,0205,04,0301,01,0130,0120,0,
+    /* 30224 */ 0240,0205,04,0301,01,0130,0110,0,
+    /* 30232 */ 0241,0205,010,0301,01,0130,0120,0,
+    /* 30240 */ 0240,0205,010,0301,01,0130,0110,0,
+    /* 30248 */ 0241,0205,02,0306,01,0130,0120,0,
+    /* 30256 */ 0240,0205,02,0306,01,0130,0110,0,
+    /* 30264 */ 0250,0205,0,0301,01,057,0110,0,
+    /* 30272 */ 0250,0205,0,0301,01,0133,0110,0,
+    /* 30280 */ 0250,0205,04,0301,01,0133,0110,0,
+    /* 30288 */ 0250,0205,010,0301,01,0133,0110,0,
+    /* 30296 */ 0250,0205,021,0301,01,0132,0110,0,
+    /* 30304 */ 0250,0205,025,0301,01,0132,0110,0,
+    /* 30312 */ 0250,0205,031,0301,01,0132,0110,0,
+    /* 30320 */ 0250,0205,01,0302,01,0133,0110,0,
+    /* 30328 */ 0250,0205,05,0302,01,0133,0110,0,
+    /* 30336 */ 0250,0205,011,0302,01,0133,0110,0,
+    /* 30344 */ 0250,0205,0,0315,01,0132,0110,0,
+    /* 30352 */ 0250,0205,04,0315,01,0132,0110,0,
+    /* 30360 */ 0250,0205,010,0315,01,0132,0110,0,
+    /* 30368 */ 0250,0206,01,0302,01,023,0110,0,
+    /* 30376 */ 0250,0206,05,0302,01,023,0110,0,
+    /* 30384 */ 0250,0206,011,0302,01,023,0110,0,
+    /* 30392 */ 0250,0205,01,0315,01,0173,0110,0,
+    /* 30400 */ 0250,0205,05,0315,01,0173,0110,0,
+    /* 30408 */ 0250,0205,011,0315,01,0173,0110,0,
+    /* 30416 */ 0250,0205,0,0302,01,0171,0110,0,
+    /* 30424 */ 0250,0205,04,0302,01,0171,0110,0,
+    /* 30432 */ 0250,0205,010,0302,01,0171,0110,0,
+    /* 30440 */ 0250,0205,01,0315,01,0171,0110,0,
+    /* 30448 */ 0250,0205,05,0315,01,0171,0110,0,
+    /* 30456 */ 0250,0205,011,0315,01,0171,0110,0,
+    /* 30464 */ 0250,0205,0,0301,01,0175,0110,0,
+    /* 30472 */ 0250,0205,04,0301,01,0175,0110,0,
+    /* 30480 */ 0250,0205,010,0301,01,0175,0110,0,
+    /* 30488 */ 0250,0205,01,0301,01,0175,0110,0,
+    /* 30496 */ 0250,0205,05,0301,01,0175,0110,0,
+    /* 30504 */ 0250,0205,011,0301,01,0175,0110,0,
+    /* 30512 */ 0250,0205,01,0301,01,035,0110,0,
+    /* 30520 */ 0250,0205,05,0301,01,035,0110,0,
+    /* 30528 */ 0250,0205,011,0301,01,035,0110,0,
+    /* 30536 */ 0250,0205,020,0301,01,0133,0110,0,
+    /* 30544 */ 0250,0205,024,0301,01,0133,0110,0,
+    /* 30552 */ 0250,0205,030,0301,01,0133,0110,0,
+    /* 30560 */ 0241,0205,023,0306,01,0132,0120,0,
+    /* 30568 */ 0240,0205,023,0306,01,0132,0110,0,
+    /* 30576 */ 0241,0205,02,0306,01,0132,0120,0,
+    /* 30584 */ 0240,0205,02,0306,01,0132,0110,0,
+    /* 30592 */ 0250,0205,02,0306,01,055,0110,0,
+    /* 30600 */ 0250,0205,022,0306,01,055,0110,0,
+    /* 30608 */ 0241,0206,0,0306,01,023,0120,0,
+    /* 30616 */ 0240,0206,0,0306,01,023,0110,0,
+    /* 30624 */ 0250,0205,02,0306,01,0171,0110,0,
+    /* 30632 */ 0250,0205,022,0306,01,0171,0110,0,
+    /* 30640 */ 0241,0205,02,0306,01,052,0120,0,
+    /* 30648 */ 0240,0205,02,0306,01,052,0110,0,
+    /* 30656 */ 0241,0205,022,0306,01,052,0120,0,
+    /* 30664 */ 0240,0205,022,0306,01,052,0110,0,
+    /* 30672 */ 0241,0205,040,0306,01,035,0120,0,
+    /* 30680 */ 0240,0205,040,0306,01,035,0110,0,
+    /* 30688 */ 0250,0205,02,0302,01,0133,0110,0,
+    /* 30696 */ 0250,0205,06,0302,01,0133,0110,0,
+    /* 30704 */ 0250,0205,012,0302,01,0133,0110,0,
+    /* 30712 */ 0250,0205,01,0306,01,0172,0110,0,
+    /* 30720 */ 0250,0205,05,0306,01,0172,0110,0,
+    /* 30728 */ 0250,0205,011,0306,01,0172,0110,0,
+    /* 30736 */ 0250,0205,0,0302,01,0170,0110,0,
+    /* 30744 */ 0250,0205,04,0302,01,0170,0110,0,
+    /* 30752 */ 0250,0205,010,0302,01,0170,0110,0,
+    /* 30760 */ 0250,0205,01,0306,01,0170,0110,0,
+    /* 30768 */ 0250,0205,05,0306,01,0170,0110,0,
+    /* 30776 */ 0250,0205,011,0306,01,0170,0110,0,
+    /* 30784 */ 0250,0205,0,0301,01,0174,0110,0,
+    /* 30792 */ 0250,0205,04,0301,01,0174,0110,0,
+    /* 30800 */ 0250,0205,010,0301,01,0174,0110,0,
+    /* 30808 */ 0250,0205,01,0301,01,0174,0110,0,
+    /* 30816 */ 0250,0205,05,0301,01,0174,0110,0,
+    /* 30824 */ 0250,0205,011,0301,01,0174,0110,0,
+    /* 30832 */ 0250,0205,02,0306,01,054,0110,0,
+    /* 30840 */ 0250,0205,022,0306,01,054,0110,0,
+    /* 30848 */ 0250,0205,02,0306,01,0170,0110,0,
+    /* 30856 */ 0250,0205,022,0306,01,0170,0110,0,
+    /* 30864 */ 0250,0205,03,0301,01,0172,0110,0,
+    /* 30872 */ 0250,0205,07,0301,01,0172,0110,0,
+    /* 30880 */ 0250,0205,013,0301,01,0172,0110,0,
+    /* 30888 */ 0250,0205,023,0301,01,0172,0110,0,
+    /* 30896 */ 0250,0205,027,0301,01,0172,0110,0,
+    /* 30904 */ 0250,0205,033,0301,01,0172,0110,0,
+    /* 30912 */ 0241,0205,02,0306,01,0173,0120,0,
+    /* 30920 */ 0241,0205,022,0306,01,0173,0120,0,
+    /* 30928 */ 0250,0205,03,0301,01,0175,0110,0,
+    /* 30936 */ 0250,0205,07,0301,01,0175,0110,0,
+    /* 30944 */ 0250,0205,013,0301,01,0175,0110,0,
+    /* 30952 */ 0250,0205,02,0301,01,0175,0110,0,
+    /* 30960 */ 0250,0205,06,0301,01,0175,0110,0,
+    /* 30968 */ 0250,0205,012,0301,01,0175,0110,0,
+    /* 30976 */ 0241,0205,040,0301,01,0136,0120,0,
+    /* 30984 */ 0240,0205,040,0301,01,0136,0110,0,
+    /* 30992 */ 0241,0205,044,0301,01,0136,0120,0,
+    /* 31000 */ 0240,0205,044,0301,01,0136,0110,0,
+    /* 31008 */ 0241,0205,050,0301,01,0136,0120,0,
+    /* 31016 */ 0240,0205,050,0301,01,0136,0110,0,
+    /* 31024 */ 0241,0205,042,0306,01,0136,0120,0,
+    /* 31032 */ 0240,0205,042,0306,01,0136,0110,0,
+    /* 31040 */ 0241,0206,03,0301,01,0126,0120,0,
+    /* 31048 */ 0240,0206,03,0301,01,0126,0110,0,
+    /* 31056 */ 0241,0206,07,0301,01,0126,0120,0,
+    /* 31064 */ 0240,0206,07,0301,01,0126,0110,0,
+    /* 31072 */ 0241,0206,013,0301,01,0126,0120,0,
+    /* 31080 */ 0240,0206,013,0301,01,0126,0110,0,
+    /* 31088 */ 0241,0206,02,0301,01,0126,0120,0,
+    /* 31096 */ 0240,0206,02,0301,01,0126,0110,0,
+    /* 31104 */ 0241,0206,06,0301,01,0126,0120,0,
+    /* 31112 */ 0240,0206,06,0301,01,0126,0110,0,
+    /* 31120 */ 0241,0206,012,0301,01,0126,0120,0,
+    /* 31128 */ 0240,0206,012,0301,01,0126,0110,0,
+    /* 31136 */ 0241,0206,03,0306,01,0127,0120,0,
+    /* 31144 */ 0240,0206,03,0306,01,0127,0110,0,
+    /* 31152 */ 0241,0206,02,0306,01,0127,0120,0,
+    /* 31160 */ 0240,0206,02,0306,01,0127,0110,0,
+    /* 31168 */ 0241,0206,03,0301,01,0326,0120,0,
+    /* 31176 */ 0240,0206,03,0301,01,0326,0110,0,
+    /* 31184 */ 0241,0206,07,0301,01,0326,0120,0,
+    /* 31192 */ 0240,0206,07,0301,01,0326,0110,0,
+    /* 31200 */ 0241,0206,013,0301,01,0326,0120,0,
+    /* 31208 */ 0240,0206,013,0301,01,0326,0110,0,
+    /* 31216 */ 0241,0206,02,0301,01,0326,0120,0,
+    /* 31224 */ 0240,0206,02,0301,01,0326,0110,0,
+    /* 31232 */ 0241,0206,06,0301,01,0326,0120,0,
+    /* 31240 */ 0240,0206,06,0301,01,0326,0110,0,
+    /* 31248 */ 0241,0206,012,0301,01,0326,0120,0,
+    /* 31256 */ 0240,0206,012,0301,01,0326,0110,0,
+    /* 31264 */ 0241,0206,03,0306,01,0327,0120,0,
+    /* 31272 */ 0240,0206,03,0306,01,0327,0110,0,
+    /* 31280 */ 0241,0206,02,0306,01,0327,0120,0,
+    /* 31288 */ 0240,0206,02,0306,01,0327,0110,0,
+    /* 31296 */ 0241,0206,01,0301,01,0226,0120,0,
+    /* 31304 */ 0240,0206,01,0301,01,0226,0110,0,
+    /* 31312 */ 0241,0206,05,0301,01,0226,0120,0,
+    /* 31320 */ 0240,0206,05,0301,01,0226,0110,0,
+    /* 31328 */ 0241,0206,011,0301,01,0226,0120,0,
+    /* 31336 */ 0240,0206,011,0301,01,0226,0110,0,
+    /* 31344 */ 0241,0206,01,0301,01,0246,0120,0,
+    /* 31352 */ 0240,0206,01,0301,01,0246,0110,0,
+    /* 31360 */ 0241,0206,05,0301,01,0246,0120,0,
+    /* 31368 */ 0240,0206,05,0301,01,0246,0110,0,
+    /* 31376 */ 0241,0206,011,0301,01,0246,0120,0,
+    /* 31384 */ 0240,0206,011,0301,01,0246,0110,0,
+    /* 31392 */ 0241,0206,01,0301,01,0266,0120,0,
+    /* 31400 */ 0240,0206,01,0301,01,0266,0110,0,
+    /* 31408 */ 0241,0206,05,0301,01,0266,0120,0,
+    /* 31416 */ 0240,0206,05,0301,01,0266,0110,0,
+    /* 31424 */ 0241,0206,011,0301,01,0266,0120,0,
+    /* 31432 */ 0240,0206,011,0301,01,0266,0110,0,
+    /* 31440 */ 0241,0206,01,0301,01,0227,0120,0,
+    /* 31448 */ 0240,0206,01,0301,01,0227,0110,0,
+    /* 31456 */ 0241,0206,05,0301,01,0227,0120,0,
+    /* 31464 */ 0240,0206,05,0301,01,0227,0110,0,
+    /* 31472 */ 0241,0206,011,0301,01,0227,0120,0,
+    /* 31480 */ 0240,0206,011,0301,01,0227,0110,0,
+    /* 31488 */ 0241,0206,01,0301,01,0247,0120,0,
+    /* 31496 */ 0240,0206,01,0301,01,0247,0110,0,
+    /* 31504 */ 0241,0206,05,0301,01,0247,0120,0,
+    /* 31512 */ 0240,0206,05,0301,01,0247,0110,0,
+    /* 31520 */ 0241,0206,011,0301,01,0247,0120,0,
+    /* 31528 */ 0240,0206,011,0301,01,0247,0110,0,
+    /* 31536 */ 0241,0206,01,0301,01,0267,0120,0,
+    /* 31544 */ 0240,0206,01,0301,01,0267,0110,0,
+    /* 31552 */ 0241,0206,05,0301,01,0267,0120,0,
+    /* 31560 */ 0240,0206,05,0301,01,0267,0110,0,
+    /* 31568 */ 0241,0206,011,0301,01,0267,0120,0,
+    /* 31576 */ 0240,0206,011,0301,01,0267,0110,0,
+    /* 31584 */ 0241,0206,01,0301,01,0230,0120,0,
+    /* 31592 */ 0240,0206,01,0301,01,0230,0110,0,
+    /* 31600 */ 0241,0206,05,0301,01,0230,0120,0,
+    /* 31608 */ 0240,0206,05,0301,01,0230,0110,0,
+    /* 31616 */ 0241,0206,011,0301,01,0230,0120,0,
+    /* 31624 */ 0240,0206,011,0301,01,0230,0110,0,
+    /* 31632 */ 0241,0206,01,0301,01,0250,0120,0,
+    /* 31640 */ 0240,0206,01,0301,01,0250,0110,0,
+    /* 31648 */ 0241,0206,05,0301,01,0250,0120,0,
+    /* 31656 */ 0240,0206,05,0301,01,0250,0110,0,
+    /* 31664 */ 0241,0206,011,0301,01,0250,0120,0,
+    /* 31672 */ 0240,0206,011,0301,01,0250,0110,0,
+    /* 31680 */ 0241,0206,01,0301,01,0270,0120,0,
+    /* 31688 */ 0240,0206,01,0301,01,0270,0110,0,
+    /* 31696 */ 0241,0206,05,0301,01,0270,0120,0,
+    /* 31704 */ 0240,0206,05,0301,01,0270,0110,0,
+    /* 31712 */ 0241,0206,011,0301,01,0270,0120,0,
+    /* 31720 */ 0240,0206,011,0301,01,0270,0110,0,
+    /* 31728 */ 0241,0206,01,0301,01,0234,0120,0,
+    /* 31736 */ 0240,0206,01,0301,01,0234,0110,0,
+    /* 31744 */ 0241,0206,05,0301,01,0234,0120,0,
+    /* 31752 */ 0240,0206,05,0301,01,0234,0110,0,
+    /* 31760 */ 0241,0206,011,0301,01,0234,0120,0,
+    /* 31768 */ 0240,0206,011,0301,01,0234,0110,0,
+    /* 31776 */ 0241,0206,01,0301,01,0254,0120,0,
+    /* 31784 */ 0240,0206,01,0301,01,0254,0110,0,
+    /* 31792 */ 0241,0206,05,0301,01,0254,0120,0,
+    /* 31800 */ 0240,0206,05,0301,01,0254,0110,0,
+    /* 31808 */ 0241,0206,011,0301,01,0254,0120,0,
+    /* 31816 */ 0240,0206,011,0301,01,0254,0110,0,
+    /* 31824 */ 0241,0206,01,0301,01,0274,0120,0,
+    /* 31832 */ 0240,0206,01,0301,01,0274,0110,0,
+    /* 31840 */ 0241,0206,05,0301,01,0274,0120,0,
+    /* 31848 */ 0240,0206,05,0301,01,0274,0110,0,
+    /* 31856 */ 0241,0206,011,0301,01,0274,0120,0,
+    /* 31864 */ 0240,0206,011,0301,01,0274,0110,0,
+    /* 31872 */ 0241,0206,01,0306,01,0231,0120,0,
+    /* 31880 */ 0240,0206,01,0306,01,0231,0110,0,
+    /* 31888 */ 0241,0206,01,0306,01,0251,0120,0,
+    /* 31896 */ 0240,0206,01,0306,01,0251,0110,0,
+    /* 31904 */ 0241,0206,01,0306,01,0271,0120,0,
+    /* 31912 */ 0240,0206,01,0306,01,0271,0110,0,
+    /* 31920 */ 0241,0206,01,0306,01,0235,0120,0,
+    /* 31928 */ 0240,0206,01,0306,01,0235,0110,0,
+    /* 31936 */ 0241,0206,01,0306,01,0255,0120,0,
+    /* 31944 */ 0240,0206,01,0306,01,0255,0110,0,
+    /* 31952 */ 0241,0206,01,0306,01,0275,0120,0,
+    /* 31960 */ 0240,0206,01,0306,01,0275,0110,0,
+    /* 31968 */ 0241,0206,01,0301,01,0232,0120,0,
+    /* 31976 */ 0240,0206,01,0301,01,0232,0110,0,
+    /* 31984 */ 0241,0206,05,0301,01,0232,0120,0,
+    /* 31992 */ 0240,0206,05,0301,01,0232,0110,0,
+    /* 32000 */ 0241,0206,011,0301,01,0232,0120,0,
+    /* 32008 */ 0240,0206,011,0301,01,0232,0110,0,
+    /* 32016 */ 0241,0206,01,0301,01,0252,0120,0,
+    /* 32024 */ 0240,0206,01,0301,01,0252,0110,0,
+    /* 32032 */ 0241,0206,05,0301,01,0252,0120,0,
+    /* 32040 */ 0240,0206,05,0301,01,0252,0110,0,
+    /* 32048 */ 0241,0206,011,0301,01,0252,0120,0,
+    /* 32056 */ 0240,0206,011,0301,01,0252,0110,0,
+    /* 32064 */ 0241,0206,01,0301,01,0272,0120,0,
+    /* 32072 */ 0240,0206,01,0301,01,0272,0110,0,
+    /* 32080 */ 0241,0206,05,0301,01,0272,0120,0,
+    /* 32088 */ 0240,0206,05,0301,01,0272,0110,0,
+    /* 32096 */ 0241,0206,011,0301,01,0272,0120,0,
+    /* 32104 */ 0240,0206,011,0301,01,0272,0110,0,
+    /* 32112 */ 0241,0206,01,0301,01,0236,0120,0,
+    /* 32120 */ 0240,0206,01,0301,01,0236,0110,0,
+    /* 32128 */ 0241,0206,05,0301,01,0236,0120,0,
+    /* 32136 */ 0240,0206,05,0301,01,0236,0110,0,
+    /* 32144 */ 0241,0206,011,0301,01,0236,0120,0,
+    /* 32152 */ 0240,0206,011,0301,01,0236,0110,0,
+    /* 32160 */ 0241,0206,01,0301,01,0256,0120,0,
+    /* 32168 */ 0240,0206,01,0301,01,0256,0110,0,
+    /* 32176 */ 0241,0206,05,0301,01,0256,0120,0,
+    /* 32184 */ 0240,0206,05,0301,01,0256,0110,0,
+    /* 32192 */ 0241,0206,011,0301,01,0256,0120,0,
+    /* 32200 */ 0240,0206,011,0301,01,0256,0110,0,
+    /* 32208 */ 0241,0206,01,0301,01,0276,0120,0,
+    /* 32216 */ 0240,0206,01,0301,01,0276,0110,0,
+    /* 32224 */ 0241,0206,05,0301,01,0276,0120,0,
+    /* 32232 */ 0240,0206,05,0301,01,0276,0110,0,
+    /* 32240 */ 0241,0206,011,0301,01,0276,0120,0,
+    /* 32248 */ 0240,0206,011,0301,01,0276,0110,0,
+    /* 32256 */ 0241,0206,01,0306,01,0233,0120,0,
+    /* 32264 */ 0240,0206,01,0306,01,0233,0110,0,
+    /* 32272 */ 0241,0206,01,0306,01,0253,0120,0,
+    /* 32280 */ 0240,0206,01,0306,01,0253,0110,0,
+    /* 32288 */ 0241,0206,01,0306,01,0273,0120,0,
+    /* 32296 */ 0240,0206,01,0306,01,0273,0110,0,
+    /* 32304 */ 0241,0206,01,0306,01,0237,0120,0,
+    /* 32312 */ 0240,0206,01,0306,01,0237,0110,0,
+    /* 32320 */ 0241,0206,01,0306,01,0257,0120,0,
+    /* 32328 */ 0240,0206,01,0306,01,0257,0110,0,
+    /* 32336 */ 0241,0206,01,0306,01,0277,0120,0,
+    /* 32344 */ 0240,0206,01,0306,01,0277,0110,0,
+    /* 32352 */ 0250,0206,01,0301,01,0102,0110,0,
+    /* 32360 */ 0250,0206,05,0301,01,0102,0110,0,
+    /* 32368 */ 0250,0206,011,0301,01,0102,0110,0,
+    /* 32376 */ 0250,0206,01,0306,01,0103,0110,0,
+    /* 32384 */ 0250,0205,0,0301,01,0137,0110,0,
+    /* 32392 */ 0250,0205,04,0301,01,0137,0110,0,
+    /* 32400 */ 0250,0205,010,0301,01,0137,0110,0,
+    /* 32408 */ 0250,0205,02,0306,01,0137,0110,0,
+    /* 32416 */ 0250,0205,0,0301,01,0135,0110,0,
+    /* 32424 */ 0250,0205,04,0301,01,0135,0110,0,
+    /* 32432 */ 0250,0205,010,0301,01,0135,0110,0,
+    /* 32440 */ 0250,0205,02,0306,01,0135,0110,0,
+    /* 32448 */ 0250,0205,02,0306,01,020,0110,0,
+    /* 32456 */ 0250,0205,02,0306,01,021,0101,0,
+    /* 32464 */ 0241,0205,02,0300,01,020,0120,0,
+    /* 32472 */ 0240,0205,02,0300,01,020,0110,0,
+    /* 32480 */ 0241,0205,02,0300,01,021,0120,0,
+    /* 32488 */ 0240,0205,02,0300,01,021,0110,0,
+    /* 32496 */ 0250,0205,041,0306,01,0156,0110,0,
+    /* 32504 */ 0250,0205,041,0306,01,0176,0101,0,
+    /* 32512 */ 0241,0205,0,0301,01,0131,0120,0,
+    /* 32520 */ 0240,0205,0,0301,01,0131,0110,0,
+    /* 32528 */ 0241,0205,04,0301,01,0131,0120,0,
+    /* 32536 */ 0240,0205,04,0301,01,0131,0110,0,
+    /* 32544 */ 0241,0205,010,0301,01,0131,0120,0,
+    /* 32552 */ 0240,0205,010,0301,01,0131,0110,0,
+    /* 32560 */ 0241,0205,02,0306,01,0131,0120,0,
+    /* 32568 */ 0240,0205,02,0306,01,0131,0110,0,
+    /* 32576 */ 0241,0206,01,0301,01,0114,0120,0,
+    /* 32584 */ 0240,0206,01,0301,01,0114,0110,0,
+    /* 32592 */ 0241,0206,05,0301,01,0114,0120,0,
+    /* 32600 */ 0240,0206,05,0301,01,0114,0110,0,
+    /* 32608 */ 0241,0206,011,0301,01,0114,0120,0,
+    /* 32616 */ 0240,0206,011,0301,01,0114,0110,0,
+    /* 32624 */ 0241,0206,01,0306,01,0115,0120,0,
+    /* 32632 */ 0240,0206,01,0306,01,0115,0110,0,
+    /* 32640 */ 0241,0206,01,0301,01,054,0120,0,
+    /* 32648 */ 0240,0206,01,0301,01,054,0110,0,
+    /* 32656 */ 0241,0206,05,0301,01,054,0120,0,
+    /* 32664 */ 0240,0206,05,0301,01,054,0110,0,
+    /* 32672 */ 0241,0206,011,0301,01,054,0120,0,
+    /* 32680 */ 0240,0206,011,0301,01,054,0110,0,
+    /* 32688 */ 0241,0206,01,0306,01,055,0120,0,
+    /* 32696 */ 0240,0206,01,0306,01,055,0110,0,
+    /* 32704 */ 0250,0205,0,0301,01,0121,0110,0,
+    /* 32712 */ 0250,0205,04,0301,01,0121,0110,0,
+    /* 32720 */ 0250,0205,010,0301,01,0121,0110,0,
+    /* 32728 */ 0241,0205,02,0306,01,0121,0120,0,
+    /* 32736 */ 0240,0205,02,0306,01,0121,0110,0,
+    /* 32744 */ 0241,0205,0,0301,01,0134,0120,0,
+    /* 32752 */ 0240,0205,0,0301,01,0134,0110,0,
+    /* 32760 */ 0241,0205,04,0301,01,0134,0120,0,
+    /* 32768 */ 0240,0205,04,0301,01,0134,0110,0,
+    /* 32776 */ 0241,0205,010,0301,01,0134,0120,0,
+    /* 32784 */ 0240,0205,010,0301,01,0134,0110,0,
+    /* 32792 */ 0241,0205,02,0306,01,0134,0120,0,
+    /* 32800 */ 0240,0205,02,0306,01,0134,0110,0,
+    /* 32808 */ 0250,0205,0,0306,01,056,0110,0,
+    /* 32816 */ 0317,0360,03,017,070,0374,0101,0,
+    /* 32824 */ 0324,0360,03,017,070,0374,0101,0,
+    /* 32832 */ 0317,0361,03,017,070,0374,0101,0,
+    /* 32840 */ 0324,0361,03,017,070,0374,0101,0,
+    /* 32848 */ 0317,0333,03,017,070,0374,0101,0,
+    /* 32856 */ 0324,0333,03,017,070,0374,0101,0,
+    /* 32864 */ 0333,04,017,072,0360,0300,020,0,
+    /* 32872 */ 0273,0320,01,0203,0202,0275,0,
+    /* 32879 */ 0273,0321,01,0203,0202,0275,0,
+    /* 32886 */ 0273,0324,01,0203,0202,0275,0,
+    /* 32893 */ 0273,0320,01,0201,0202,031,0,
+    /* 32900 */ 0273,0321,01,0201,0202,041,0,
+    /* 32907 */ 0273,0324,01,0201,0202,0255,0,
+    /* 32914 */ 0273,0320,01,0203,0200,0275,0,
+    /* 32921 */ 0273,0321,01,0203,0200,0275,0,
+    /* 32928 */ 0273,0324,01,0203,0200,0275,0,
+    /* 32935 */ 0273,0320,01,0201,0200,031,0,
+    /* 32942 */ 0273,0321,01,0201,0200,041,0,
+    /* 32949 */ 0273,0324,01,0201,0200,0255,0,
+    /* 32956 */ 0273,0320,01,0203,0204,0275,0,
+    /* 32963 */ 0273,0321,01,0203,0204,0275,0,
+    /* 32970 */ 0273,0324,01,0203,0204,0275,0,
+    /* 32977 */ 0273,0320,01,0201,0204,031,0,
+    /* 32984 */ 0273,0321,01,0201,0204,041,0,
+    /* 32991 */ 0273,0324,01,0201,0204,0255,0,
+    /* 32998 */ 0320,0326,02,017,0274,0110,0,
+    /* 33005 */ 0321,0326,02,017,0274,0110,0,
+    /* 33012 */ 0324,0326,02,017,0274,0110,0,
+    /* 33019 */ 0320,0326,02,017,0275,0110,0,
+    /* 33026 */ 0321,0326,02,017,0275,0110,0,
+    /* 33033 */ 0324,0326,02,017,0275,0110,0,
+    /* 33040 */ 0320,02,017,0272,0204,025,0,
+    /* 33047 */ 0321,02,017,0272,0204,025,0,
+    /* 33054 */ 0324,02,017,0272,0204,025,0,
+    /* 33061 */ 0273,0320,02,017,0273,0101,0,
+    /* 33068 */ 0273,0321,02,017,0273,0101,0,
+    /* 33075 */ 0273,0324,02,017,0273,0101,0,
+    /* 33082 */ 0273,0320,02,017,0263,0101,0,
+    /* 33089 */ 0273,0321,02,017,0263,0101,0,
+    /* 33096 */ 0273,0324,02,017,0263,0101,0,
+    /* 33103 */ 0273,0320,02,017,0253,0101,0,
+    /* 33110 */ 0273,0321,02,017,0253,0101,0,
+    /* 33117 */ 0273,0324,02,017,0253,0101,0,
+    /* 33124 */ 0273,0320,02,017,0261,0101,0,
+    /* 33131 */ 0273,0321,02,017,0261,0101,0,
+    /* 33138 */ 0273,0324,02,017,0261,0101,0,
+    /* 33145 */ 0273,0317,02,017,0307,0201,0,
+    /* 33152 */ 0361,03,017,070,0202,0110,0,
+    /* 33159 */ 0323,0313,03,017,01,0337,0,
+    /* 33166 */ 0320,0323,02,017,02,0110,0,
+    /* 33173 */ 0321,0323,02,017,02,0110,0,
+    /* 33180 */ 0320,0323,02,017,03,0110,0,
+    /* 33187 */ 0321,0323,02,017,03,0110,0,
+    /* 33194 */ 0271,0320,01,0307,0200,031,0,
+    /* 33201 */ 0271,0321,01,0307,0200,041,0,
+    /* 33208 */ 0271,0324,01,0307,0200,0255,0,
+    /* 33215 */ 0360,0324,02,017,0156,0110,0,
+    /* 33222 */ 0360,0324,02,017,0176,0101,0,
+    /* 33229 */ 0273,0320,01,0203,0201,0275,0,
+    /* 33236 */ 0273,0321,01,0203,0201,0275,0,
+    /* 33243 */ 0273,0324,01,0203,0201,0275,0,
+    /* 33250 */ 0273,0320,01,0201,0201,031,0,
+    /* 33257 */ 0273,0321,01,0201,0201,041,0,
+    /* 33264 */ 0273,0324,01,0201,0201,0255,0,
+    /* 33271 */ 0360,0323,02,017,0153,0110,0,
+    /* 33278 */ 0360,0323,02,017,0143,0110,0,
+    /* 33285 */ 0360,0323,02,017,0147,0110,0,
+    /* 33292 */ 0360,0323,02,017,0374,0110,0,
+    /* 33299 */ 0360,0323,02,017,0376,0110,0,
+    /* 33306 */ 0360,0323,02,017,0354,0110,0,
+    /* 33313 */ 0360,0323,02,017,0355,0110,0,
+    /* 33320 */ 0360,0323,02,017,0334,0110,0,
+    /* 33327 */ 0360,0323,02,017,0335,0110,0,
+    /* 33334 */ 0360,0323,02,017,0375,0110,0,
+    /* 33341 */ 0360,0323,02,017,0333,0110,0,
+    /* 33348 */ 0360,0323,02,017,0337,0110,0,
+    /* 33355 */ 0360,0323,02,017,0164,0110,0,
+    /* 33362 */ 0360,0323,02,017,0166,0110,0,
+    /* 33369 */ 0360,0323,02,017,0165,0110,0,
+    /* 33376 */ 0360,0323,02,017,0144,0110,0,
+    /* 33383 */ 0360,0323,02,017,0146,0110,0,
+    /* 33390 */ 0360,0323,02,017,0145,0110,0,
+    /* 33397 */ 0360,0323,02,017,0365,0110,0,
+    /* 33404 */ 0360,0323,02,017,0345,0110,0,
+    /* 33411 */ 0360,0323,02,017,0325,0110,0,
+    /* 33418 */ 0360,0323,02,017,0353,0110,0,
+    /* 33425 */ 0360,0323,02,017,0362,0110,0,
+    /* 33432 */ 0360,02,017,0162,0206,025,0,
+    /* 33439 */ 0360,0323,02,017,0363,0110,0,
+    /* 33446 */ 0360,02,017,0163,0206,025,0,
+    /* 33453 */ 0360,0323,02,017,0361,0110,0,
+    /* 33460 */ 0360,02,017,0161,0206,025,0,
+    /* 33467 */ 0360,0323,02,017,0342,0110,0,
+    /* 33474 */ 0360,02,017,0162,0204,025,0,
+    /* 33481 */ 0360,0323,02,017,0341,0110,0,
+    /* 33488 */ 0360,02,017,0161,0204,025,0,
+    /* 33495 */ 0360,0323,02,017,0322,0110,0,
+    /* 33502 */ 0360,02,017,0162,0202,025,0,
+    /* 33509 */ 0360,0323,02,017,0323,0110,0,
+    /* 33516 */ 0360,02,017,0163,0202,025,0,
+    /* 33523 */ 0360,0323,02,017,0321,0110,0,
+    /* 33530 */ 0360,02,017,0161,0202,025,0,
+    /* 33537 */ 0360,0323,02,017,0370,0110,0,
+    /* 33544 */ 0360,0323,02,017,0372,0110,0,
+    /* 33551 */ 0360,0323,02,017,0350,0110,0,
+    /* 33558 */ 0360,0323,02,017,0351,0110,0,
+    /* 33565 */ 0360,0323,02,017,0330,0110,0,
+    /* 33572 */ 0360,0323,02,017,0331,0110,0,
+    /* 33579 */ 0360,0323,02,017,0371,0110,0,
+    /* 33586 */ 0360,0323,02,017,0150,0110,0,
+    /* 33593 */ 0360,0323,02,017,0152,0110,0,
+    /* 33600 */ 0360,0323,02,017,0151,0110,0,
+    /* 33607 */ 0360,0323,02,017,0140,0110,0,
+    /* 33614 */ 0360,0323,02,017,0142,0110,0,
+    /* 33621 */ 0360,0323,02,017,0141,0110,0,
+    /* 33628 */ 0360,0323,02,017,0357,0110,0,
+    /* 33635 */ 0273,0320,01,0203,0203,0275,0,
+    /* 33642 */ 0273,0321,01,0203,0203,0275,0,
+    /* 33649 */ 0273,0324,01,0203,0203,0275,0,
+    /* 33656 */ 0273,0320,01,0201,0203,031,0,
+    /* 33663 */ 0273,0321,01,0201,0203,041,0,
+    /* 33670 */ 0273,0324,01,0201,0203,0255,0,
+    /* 33677 */ 0320,02,017,0244,0101,026,0,
+    /* 33684 */ 0321,02,017,0244,0101,026,0,
+    /* 33691 */ 0324,02,017,0244,0101,026,0,
+    /* 33698 */ 0320,02,017,0254,0101,026,0,
+    /* 33705 */ 0321,02,017,0254,0101,026,0,
+    /* 33712 */ 0324,02,017,0254,0101,026,0,
+    /* 33719 */ 0273,0320,01,0203,0205,0275,0,
+    /* 33726 */ 0273,0321,01,0203,0205,0275,0,
+    /* 33733 */ 0273,0324,01,0203,0205,0275,0,
+    /* 33740 */ 0273,0320,01,0201,0205,031,0,
+    /* 33747 */ 0273,0321,01,0201,0205,041,0,
+    /* 33754 */ 0273,0324,01,0201,0205,0255,0,
+    /* 33761 */ 0360,0320,02,017,021,0101,0,
+    /* 33768 */ 0360,0321,02,017,021,0101,0,
+    /* 33775 */ 0360,0320,02,017,023,0110,0,
+    /* 33782 */ 0360,0321,02,017,023,0110,0,
+    /* 33789 */ 0273,0320,02,017,0301,0101,0,
+    /* 33796 */ 0273,0321,02,017,0301,0101,0,
+    /* 33803 */ 0273,0324,02,017,0301,0101,0,
+    /* 33810 */ 0273,0320,01,0203,0206,0275,0,
+    /* 33817 */ 0273,0321,01,0203,0206,0275,0,
+    /* 33824 */ 0273,0324,01,0203,0206,0275,0,
+    /* 33831 */ 0273,0320,01,0201,0206,031,0,
+    /* 33838 */ 0273,0321,01,0201,0206,041,0,
+    /* 33845 */ 0273,0324,01,0201,0206,0255,0,
+    /* 33852 */ 01,0166,0373,01,0351,064,0,
+    /* 33859 */ 01,0162,0373,01,0351,064,0,
+    /* 33866 */ 01,0163,0373,01,0351,064,0,
+    /* 33873 */ 01,0167,0373,01,0351,064,0,
+    /* 33880 */ 01,0165,0373,01,0351,064,0,
+    /* 33887 */ 01,0176,0373,01,0351,064,0,
+    /* 33894 */ 01,0174,0373,01,0351,064,0,
+    /* 33901 */ 01,0175,0373,01,0351,064,0,
+    /* 33908 */ 01,0177,0373,01,0351,064,0,
+    /* 33915 */ 01,0164,0373,01,0351,064,0,
+    /* 33922 */ 01,0160,0373,01,0351,064,0,
+    /* 33929 */ 01,0172,0373,01,0351,064,0,
+    /* 33936 */ 01,0170,0373,01,0351,064,0,
+    /* 33943 */ 01,0161,0373,01,0351,064,0,
+    /* 33950 */ 01,0173,0373,01,0351,064,0,
+    /* 33957 */ 01,0171,0373,01,0351,064,0,
+    /* 33964 */ 0360,02,017,0302,0110,026,0,
+    /* 33971 */ 0333,02,017,0302,0110,026,0,
+    /* 33978 */ 0324,0333,02,017,052,0110,0,
+    /* 33985 */ 0324,0333,02,017,055,0110,0,
+    /* 33992 */ 0324,0333,02,017,054,0110,0,
+    /* 33999 */ 0360,0324,02,017,0120,0110,0,
+    /* 34006 */ 0360,02,017,0306,0110,026,0,
+    /* 34013 */ 0324,0360,02,017,0256,0201,0,
+    /* 34020 */ 0324,0360,02,017,0256,0200,0,
+    /* 34027 */ 0324,0360,02,017,0256,0204,0,
+    /* 34034 */ 0324,0360,02,017,0307,0204,0,
+    /* 34041 */ 0324,0360,02,017,0256,0206,0,
+    /* 34048 */ 0324,0360,02,017,0307,0205,0,
+    /* 34055 */ 0324,0360,02,017,0256,0205,0,
+    /* 34062 */ 0324,0360,02,017,0307,0203,0,
+    /* 34069 */ 0360,0323,02,017,0340,0110,0,
+    /* 34076 */ 0360,0323,02,017,0343,0110,0,
+    /* 34083 */ 0360,02,017,0305,0110,026,0,
+    /* 34090 */ 0360,02,017,0304,0110,026,0,
+    /* 34097 */ 0360,0323,02,017,0356,0110,0,
+    /* 34104 */ 0360,0323,02,017,0336,0110,0,
+    /* 34111 */ 0360,0323,02,017,0352,0110,0,
+    /* 34118 */ 0360,0323,02,017,0332,0110,0,
+    /* 34125 */ 0360,0323,02,017,0344,0110,0,
+    /* 34132 */ 0360,0323,02,017,0366,0110,0,
+    /* 34139 */ 0324,0360,02,017,0303,0101,0,
+    /* 34146 */ 0361,0317,02,017,0176,0101,0,
+    /* 34153 */ 0361,0317,02,017,0156,0110,0,
+    /* 34160 */ 0361,0324,02,017,0156,0110,0,
+    /* 34167 */ 0361,0324,02,017,0176,0101,0,
+    /* 34174 */ 0361,02,017,0305,0110,026,0,
+    /* 34181 */ 0361,02,017,0304,0110,026,0,
+    /* 34188 */ 0360,0323,02,017,0364,0110,0,
+    /* 34195 */ 0361,02,017,0160,0110,022,0,
+    /* 34202 */ 0333,02,017,0160,0110,022,0,
+    /* 34209 */ 0332,02,017,0160,0110,022,0,
+    /* 34216 */ 0361,02,017,0163,0207,025,0,
+    /* 34223 */ 0361,02,017,0161,0206,025,0,
+    /* 34230 */ 0361,02,017,0162,0206,025,0,
+    /* 34237 */ 0361,02,017,0163,0206,025,0,
+    /* 34244 */ 0361,02,017,0161,0204,025,0,
+    /* 34251 */ 0361,02,017,0162,0204,025,0,
+    /* 34258 */ 0361,02,017,0163,0203,025,0,
+    /* 34265 */ 0361,02,017,0161,0202,025,0,
+    /* 34272 */ 0361,02,017,0162,0202,025,0,
+    /* 34279 */ 0361,02,017,0163,0202,025,0,
+    /* 34286 */ 0360,0323,02,017,0373,0110,0,
+    /* 34293 */ 0361,02,017,0302,0110,026,0,
+    /* 34300 */ 0332,02,017,0302,0110,026,0,
+    /* 34307 */ 0317,0332,02,017,055,0110,0,
+    /* 34314 */ 0324,0332,02,017,055,0110,0,
+    /* 34321 */ 0317,0332,02,017,052,0110,0,
+    /* 34328 */ 0324,0332,02,017,052,0110,0,
+    /* 34335 */ 0317,0332,02,017,054,0110,0,
+    /* 34342 */ 0324,0332,02,017,054,0110,0,
+    /* 34349 */ 0361,0324,02,017,0120,0110,0,
+    /* 34356 */ 0361,02,017,0306,0110,026,0,
+    /* 34363 */ 0323,0360,02,017,0170,0101,0,
+    /* 34370 */ 0323,0360,02,017,0171,0110,0,
+    /* 34377 */ 0360,03,017,070,034,0110,0,
+    /* 34384 */ 0361,03,017,070,034,0110,0,
+    /* 34391 */ 0360,03,017,070,035,0110,0,
+    /* 34398 */ 0361,03,017,070,035,0110,0,
+    /* 34405 */ 0360,03,017,070,036,0110,0,
+    /* 34412 */ 0361,03,017,070,036,0110,0,
+    /* 34419 */ 0360,03,017,070,01,0110,0,
+    /* 34426 */ 0361,03,017,070,01,0110,0,
+    /* 34433 */ 0360,03,017,070,02,0110,0,
+    /* 34440 */ 0361,03,017,070,02,0110,0,
+    /* 34447 */ 0360,03,017,070,03,0110,0,
+    /* 34454 */ 0361,03,017,070,03,0110,0,
+    /* 34461 */ 0360,03,017,070,05,0110,0,
+    /* 34468 */ 0361,03,017,070,05,0110,0,
+    /* 34475 */ 0360,03,017,070,06,0110,0,
+    /* 34482 */ 0361,03,017,070,06,0110,0,
+    /* 34489 */ 0360,03,017,070,07,0110,0,
+    /* 34496 */ 0361,03,017,070,07,0110,0,
+    /* 34503 */ 0360,03,017,070,04,0110,0,
+    /* 34510 */ 0361,03,017,070,04,0110,0,
+    /* 34517 */ 0360,03,017,070,013,0110,0,
+    /* 34524 */ 0361,03,017,070,013,0110,0,
+    /* 34531 */ 0360,03,017,070,0,0110,0,
+    /* 34538 */ 0361,03,017,070,0,0110,0,
+    /* 34545 */ 0360,03,017,070,010,0110,0,
+    /* 34552 */ 0361,03,017,070,010,0110,0,
+    /* 34559 */ 0360,03,017,070,011,0110,0,
+    /* 34566 */ 0361,03,017,070,011,0110,0,
+    /* 34573 */ 0360,03,017,070,012,0110,0,
+    /* 34580 */ 0361,03,017,070,012,0110,0,
+    /* 34587 */ 0320,0333,02,017,0275,0110,0,
+    /* 34594 */ 0321,0333,02,017,0275,0110,0,
+    /* 34601 */ 0324,0333,02,017,0275,0110,0,
+    /* 34608 */ 0361,03,017,070,025,0110,0,
+    /* 34615 */ 0361,03,017,070,024,0110,0,
+    /* 34622 */ 0361,03,017,070,052,0110,0,
+    /* 34629 */ 0361,03,017,070,053,0110,0,
+    /* 34636 */ 0361,03,017,070,020,0110,0,
+    /* 34643 */ 0361,03,017,070,051,0110,0,
+    /* 34650 */ 0361,03,017,070,0101,0110,0,
+    /* 34657 */ 0361,03,017,070,074,0110,0,
+    /* 34664 */ 0361,03,017,070,075,0110,0,
+    /* 34671 */ 0361,03,017,070,077,0110,0,
+    /* 34678 */ 0361,03,017,070,076,0110,0,
+    /* 34685 */ 0361,03,017,070,070,0110,0,
+    /* 34692 */ 0361,03,017,070,071,0110,0,
+    /* 34699 */ 0361,03,017,070,073,0110,0,
+    /* 34706 */ 0361,03,017,070,072,0110,0,
+    /* 34713 */ 0361,03,017,070,040,0110,0,
+    /* 34720 */ 0361,03,017,070,041,0110,0,
+    /* 34727 */ 0361,03,017,070,042,0110,0,
+    /* 34734 */ 0361,03,017,070,043,0110,0,
+    /* 34741 */ 0361,03,017,070,044,0110,0,
+    /* 34748 */ 0361,03,017,070,045,0110,0,
+    /* 34755 */ 0361,03,017,070,060,0110,0,
+    /* 34762 */ 0361,03,017,070,061,0110,0,
+    /* 34769 */ 0361,03,017,070,062,0110,0,
+    /* 34776 */ 0361,03,017,070,063,0110,0,
+    /* 34783 */ 0361,03,017,070,064,0110,0,
+    /* 34790 */ 0361,03,017,070,065,0110,0,
+    /* 34797 */ 0361,03,017,070,050,0110,0,
+    /* 34804 */ 0361,03,017,070,0100,0110,0,
+    /* 34811 */ 0361,03,017,070,027,0110,0,
+    /* 34818 */ 0361,03,017,070,067,0110,0,
+    /* 34825 */ 0320,0333,02,017,0270,0110,0,
+    /* 34832 */ 0321,0333,02,017,0270,0110,0,
+    /* 34839 */ 0324,0333,02,017,0270,0110,0,
+    /* 34846 */ 0361,03,017,070,0334,0110,0,
+    /* 34853 */ 0361,03,017,070,0335,0110,0,
+    /* 34860 */ 0361,03,017,070,0336,0110,0,
+    /* 34867 */ 0361,03,017,070,0337,0110,0,
+    /* 34874 */ 0361,03,017,070,0333,0110,0,
+    /* 34881 */ 0261,02,041,01,0334,0120,0,
+    /* 34888 */ 0260,02,041,01,0334,0110,0,
+    /* 34895 */ 0261,02,041,01,0335,0120,0,
+    /* 34902 */ 0260,02,041,01,0335,0110,0,
+    /* 34909 */ 0261,02,041,01,0336,0120,0,
+    /* 34916 */ 0260,02,041,01,0336,0110,0,
+    /* 34923 */ 0261,02,041,01,0337,0120,0,
+    /* 34930 */ 0260,02,041,01,0337,0110,0,
+    /* 34937 */ 0270,02,041,01,0333,0110,0,
+    /* 34944 */ 0261,02,045,01,0334,0120,0,
+    /* 34951 */ 0260,02,045,01,0334,0110,0,
+    /* 34958 */ 0261,02,045,01,0335,0120,0,
+    /* 34965 */ 0260,02,045,01,0335,0110,0,
+    /* 34972 */ 0261,02,045,01,0336,0120,0,
+    /* 34979 */ 0260,02,045,01,0336,0110,0,
+    /* 34986 */ 0261,02,045,01,0337,0120,0,
+    /* 34993 */ 0260,02,045,01,0337,0110,0,
+    /* 35000 */ 0261,01,041,01,0130,0120,0,
+    /* 35007 */ 0260,01,041,01,0130,0110,0,
+    /* 35014 */ 0261,01,045,01,0130,0120,0,
+    /* 35021 */ 0260,01,045,01,0130,0110,0,
+    /* 35028 */ 0261,01,040,01,0130,0120,0,
+    /* 35035 */ 0260,01,040,01,0130,0110,0,
+    /* 35042 */ 0261,01,044,01,0130,0120,0,
+    /* 35049 */ 0260,01,044,01,0130,0110,0,
+    /* 35056 */ 0261,01,053,01,0130,0120,0,
+    /* 35063 */ 0260,01,053,01,0130,0110,0,
+    /* 35070 */ 0261,01,052,01,0130,0120,0,
+    /* 35077 */ 0260,01,052,01,0130,0110,0,
+    /* 35084 */ 0261,01,041,01,0320,0120,0,
+    /* 35091 */ 0260,01,041,01,0320,0110,0,
+    /* 35098 */ 0261,01,045,01,0320,0120,0,
+    /* 35105 */ 0260,01,045,01,0320,0110,0,
+    /* 35112 */ 0261,01,043,01,0320,0120,0,
+    /* 35119 */ 0260,01,043,01,0320,0110,0,
+    /* 35126 */ 0261,01,047,01,0320,0120,0,
+    /* 35133 */ 0260,01,047,01,0320,0110,0,
+    /* 35140 */ 0261,01,041,01,0124,0120,0,
+    /* 35147 */ 0260,01,041,01,0124,0110,0,
+    /* 35154 */ 0261,01,045,01,0124,0120,0,
+    /* 35161 */ 0260,01,045,01,0124,0110,0,
+    /* 35168 */ 0261,01,040,01,0124,0120,0,
+    /* 35175 */ 0260,01,040,01,0124,0110,0,
+    /* 35182 */ 0261,01,044,01,0124,0120,0,
+    /* 35189 */ 0260,01,044,01,0124,0110,0,
+    /* 35196 */ 0261,01,041,01,0125,0120,0,
+    /* 35203 */ 0260,01,041,01,0125,0110,0,
+    /* 35210 */ 0261,01,045,01,0125,0120,0,
+    /* 35217 */ 0260,01,045,01,0125,0110,0,
+    /* 35224 */ 0261,01,040,01,0125,0120,0,
+    /* 35231 */ 0260,01,040,01,0125,0110,0,
+    /* 35238 */ 0261,01,044,01,0125,0120,0,
+    /* 35245 */ 0260,01,044,01,0125,0110,0,
+    /* 35252 */ 0270,02,01,01,030,0110,0,
+    /* 35259 */ 0270,02,05,01,030,0110,0,
+    /* 35266 */ 0270,02,05,01,031,0110,0,
+    /* 35273 */ 0270,02,05,01,032,0110,0,
+    /* 35280 */ 0270,01,051,01,057,0110,0,
+    /* 35287 */ 0270,01,050,01,057,0110,0,
+    /* 35294 */ 0270,01,042,01,0346,0110,0,
+    /* 35301 */ 0270,01,046,01,0346,0110,0,
+    /* 35308 */ 0270,01,040,01,0133,0110,0,
+    /* 35315 */ 0270,01,044,01,0133,0110,0,
+    /* 35322 */ 0270,01,043,01,0346,0110,0,
+    /* 35329 */ 0270,01,047,01,0346,0110,0,
+    /* 35336 */ 0270,01,041,01,0132,0110,0,
+    /* 35343 */ 0270,01,045,01,0132,0110,0,
+    /* 35350 */ 0270,01,041,01,0133,0110,0,
+    /* 35357 */ 0270,01,045,01,0133,0110,0,
+    /* 35364 */ 0270,01,040,01,0132,0110,0,
+    /* 35371 */ 0270,01,044,01,0132,0110,0,
+    /* 35378 */ 0270,01,013,01,055,0110,0,
+    /* 35385 */ 0270,01,033,01,055,0110,0,
+    /* 35392 */ 0261,01,053,01,0132,0120,0,
+    /* 35399 */ 0260,01,053,01,0132,0110,0,
+    /* 35406 */ 0261,01,013,01,052,0120,0,
+    /* 35413 */ 0260,01,013,01,052,0110,0,
+    /* 35420 */ 0261,01,033,01,052,0120,0,
+    /* 35427 */ 0260,01,033,01,052,0110,0,
+    /* 35434 */ 0261,01,012,01,052,0120,0,
+    /* 35441 */ 0260,01,012,01,052,0110,0,
+    /* 35448 */ 0261,01,032,01,052,0120,0,
+    /* 35455 */ 0260,01,032,01,052,0110,0,
+    /* 35462 */ 0261,01,052,01,0132,0120,0,
+    /* 35469 */ 0260,01,052,01,0132,0110,0,
+    /* 35476 */ 0270,01,012,01,055,0110,0,
+    /* 35483 */ 0270,01,032,01,055,0110,0,
+    /* 35490 */ 0270,01,041,01,0346,0110,0,
+    /* 35497 */ 0270,01,045,01,0346,0110,0,
+    /* 35504 */ 0270,01,042,01,0133,0110,0,
+    /* 35511 */ 0270,01,046,01,0133,0110,0,
+    /* 35518 */ 0270,01,013,01,054,0110,0,
+    /* 35525 */ 0270,01,033,01,054,0110,0,
+    /* 35532 */ 0270,01,012,01,054,0110,0,
+    /* 35539 */ 0270,01,032,01,054,0110,0,
+    /* 35546 */ 0261,01,041,01,0136,0120,0,
+    /* 35553 */ 0260,01,041,01,0136,0110,0,
+    /* 35560 */ 0261,01,045,01,0136,0120,0,
+    /* 35567 */ 0260,01,045,01,0136,0110,0,
+    /* 35574 */ 0261,01,040,01,0136,0120,0,
+    /* 35581 */ 0260,01,040,01,0136,0110,0,
+    /* 35588 */ 0261,01,044,01,0136,0120,0,
+    /* 35595 */ 0260,01,044,01,0136,0110,0,
+    /* 35602 */ 0261,01,053,01,0136,0120,0,
+    /* 35609 */ 0260,01,053,01,0136,0110,0,
+    /* 35616 */ 0261,01,052,01,0136,0120,0,
+    /* 35623 */ 0260,01,052,01,0136,0110,0,
+    /* 35630 */ 0261,01,041,01,0174,0120,0,
+    /* 35637 */ 0260,01,041,01,0174,0110,0,
+    /* 35644 */ 0261,01,045,01,0174,0120,0,
+    /* 35651 */ 0260,01,045,01,0174,0110,0,
+    /* 35658 */ 0261,01,043,01,0174,0120,0,
+    /* 35665 */ 0260,01,043,01,0174,0110,0,
+    /* 35672 */ 0261,01,047,01,0174,0120,0,
+    /* 35679 */ 0260,01,047,01,0174,0110,0,
+    /* 35686 */ 0261,01,041,01,0175,0120,0,
+    /* 35693 */ 0260,01,041,01,0175,0110,0,
+    /* 35700 */ 0261,01,045,01,0175,0120,0,
+    /* 35707 */ 0260,01,045,01,0175,0110,0,
+    /* 35714 */ 0261,01,043,01,0175,0120,0,
+    /* 35721 */ 0260,01,043,01,0175,0110,0,
+    /* 35728 */ 0261,01,047,01,0175,0120,0,
+    /* 35735 */ 0260,01,047,01,0175,0110,0,
+    /* 35742 */ 0270,01,043,01,0360,0110,0,
+    /* 35749 */ 0270,01,047,01,0360,0110,0,
+    /* 35756 */ 0270,01,040,01,0256,0202,0,
+    /* 35763 */ 0270,01,041,01,0367,0110,0,
+    /* 35770 */ 0261,02,01,01,054,0120,0,
+    /* 35777 */ 0261,02,05,01,054,0120,0,
+    /* 35784 */ 0261,02,01,01,056,0102,0,
+    /* 35791 */ 0261,02,05,01,056,0102,0,
+    /* 35798 */ 0261,02,01,01,055,0120,0,
+    /* 35805 */ 0261,02,05,01,055,0120,0,
+    /* 35812 */ 0261,02,01,01,057,0102,0,
+    /* 35819 */ 0261,02,05,01,057,0102,0,
+    /* 35826 */ 0261,01,041,01,0137,0120,0,
+    /* 35833 */ 0260,01,041,01,0137,0110,0,
+    /* 35840 */ 0261,01,045,01,0137,0120,0,
+    /* 35847 */ 0260,01,045,01,0137,0110,0,
+    /* 35854 */ 0261,01,040,01,0137,0120,0,
+    /* 35861 */ 0260,01,040,01,0137,0110,0,
+    /* 35868 */ 0261,01,044,01,0137,0120,0,
+    /* 35875 */ 0260,01,044,01,0137,0110,0,
+    /* 35882 */ 0261,01,053,01,0137,0120,0,
+    /* 35889 */ 0260,01,053,01,0137,0110,0,
+    /* 35896 */ 0261,01,052,01,0137,0120,0,
+    /* 35903 */ 0260,01,052,01,0137,0110,0,
+    /* 35910 */ 0261,01,041,01,0135,0120,0,
+    /* 35917 */ 0260,01,041,01,0135,0110,0,
+    /* 35924 */ 0261,01,045,01,0135,0120,0,
+    /* 35931 */ 0260,01,045,01,0135,0110,0,
+    /* 35938 */ 0261,01,040,01,0135,0120,0,
+    /* 35945 */ 0260,01,040,01,0135,0110,0,
+    /* 35952 */ 0261,01,044,01,0135,0120,0,
+    /* 35959 */ 0260,01,044,01,0135,0110,0,
+    /* 35966 */ 0261,01,053,01,0135,0120,0,
+    /* 35973 */ 0260,01,053,01,0135,0110,0,
+    /* 35980 */ 0261,01,052,01,0135,0120,0,
+    /* 35987 */ 0260,01,052,01,0135,0110,0,
+    /* 35994 */ 0270,01,041,01,050,0110,0,
+    /* 36001 */ 0270,01,041,01,051,0101,0,
+    /* 36008 */ 0270,01,045,01,050,0110,0,
+    /* 36015 */ 0270,01,045,01,051,0101,0,
+    /* 36022 */ 0270,01,040,01,050,0110,0,
+    /* 36029 */ 0270,01,040,01,051,0101,0,
+    /* 36036 */ 0270,01,044,01,050,0110,0,
+    /* 36043 */ 0270,01,044,01,051,0101,0,
+    /* 36050 */ 0270,01,01,01,0156,0110,0,
+    /* 36057 */ 0270,01,01,01,0176,0101,0,
+    /* 36064 */ 0270,01,042,01,0176,0110,0,
+    /* 36071 */ 0270,01,041,01,0326,0101,0,
+    /* 36078 */ 0270,01,021,01,0156,0110,0,
+    /* 36085 */ 0270,01,021,01,0176,0101,0,
+    /* 36092 */ 0270,01,043,01,022,0110,0,
+    /* 36099 */ 0270,01,047,01,022,0110,0,
+    /* 36106 */ 0270,01,041,01,0157,0110,0,
+    /* 36113 */ 0270,01,041,01,0177,0101,0,
+    /* 36120 */ 0270,01,045,01,0157,0110,0,
+    /* 36127 */ 0270,01,045,01,0177,0101,0,
+    /* 36134 */ 0270,01,042,01,0157,0110,0,
+    /* 36141 */ 0270,01,042,01,0177,0101,0,
+    /* 36148 */ 0270,01,046,01,0157,0110,0,
+    /* 36155 */ 0270,01,046,01,0177,0101,0,
+    /* 36162 */ 0261,01,040,01,022,0120,0,
+    /* 36169 */ 0260,01,040,01,022,0110,0,
+    /* 36176 */ 0261,01,041,01,026,0120,0,
+    /* 36183 */ 0260,01,041,01,026,0110,0,
+    /* 36190 */ 0270,01,041,01,027,0101,0,
+    /* 36197 */ 0261,01,040,01,026,0120,0,
+    /* 36204 */ 0260,01,040,01,026,0110,0,
+    /* 36211 */ 0270,01,040,01,027,0101,0,
+    /* 36218 */ 0261,01,041,01,022,0120,0,
+    /* 36225 */ 0260,01,041,01,022,0110,0,
+    /* 36232 */ 0270,01,041,01,023,0101,0,
+    /* 36239 */ 0270,01,040,01,023,0101,0,
+    /* 36246 */ 0270,01,041,01,0120,0110,0,
+    /* 36253 */ 0270,01,045,01,0120,0110,0,
+    /* 36260 */ 0270,01,040,01,0120,0110,0,
+    /* 36267 */ 0270,01,044,01,0120,0110,0,
+    /* 36274 */ 0270,01,041,01,0347,0101,0,
+    /* 36281 */ 0270,01,045,01,0347,0101,0,
+    /* 36288 */ 0270,02,041,01,052,0110,0,
+    /* 36295 */ 0270,01,041,01,053,0101,0,
+    /* 36302 */ 0270,01,045,01,053,0101,0,
+    /* 36309 */ 0270,01,040,01,053,0101,0,
+    /* 36316 */ 0270,01,044,01,053,0101,0,
+    /* 36323 */ 0261,01,053,01,020,0120,0,
+    /* 36330 */ 0260,01,053,01,020,0110,0,
+    /* 36337 */ 0270,01,053,01,020,0110,0,
+    /* 36344 */ 0261,01,053,01,021,0102,0,
+    /* 36351 */ 0260,01,053,01,021,0101,0,
+    /* 36358 */ 0270,01,053,01,021,0101,0,
+    /* 36365 */ 0270,01,042,01,026,0110,0,
+    /* 36372 */ 0270,01,046,01,026,0110,0,
+    /* 36379 */ 0270,01,042,01,022,0110,0,
+    /* 36386 */ 0270,01,046,01,022,0110,0,
+    /* 36393 */ 0261,01,052,01,020,0120,0,
+    /* 36400 */ 0260,01,052,01,020,0110,0,
+    /* 36407 */ 0270,01,052,01,020,0110,0,
+    /* 36414 */ 0261,01,052,01,021,0102,0,
+    /* 36421 */ 0260,01,052,01,021,0101,0,
+    /* 36428 */ 0270,01,052,01,021,0101,0,
+    /* 36435 */ 0270,01,041,01,020,0110,0,
+    /* 36442 */ 0270,01,041,01,021,0101,0,
+    /* 36449 */ 0270,01,045,01,020,0110,0,
+    /* 36456 */ 0270,01,045,01,021,0101,0,
+    /* 36463 */ 0270,01,040,01,020,0110,0,
+    /* 36470 */ 0270,01,040,01,021,0101,0,
+    /* 36477 */ 0270,01,044,01,020,0110,0,
+    /* 36484 */ 0270,01,044,01,021,0101,0,
+    /* 36491 */ 0261,01,041,01,0131,0120,0,
+    /* 36498 */ 0260,01,041,01,0131,0110,0,
+    /* 36505 */ 0261,01,045,01,0131,0120,0,
+    /* 36512 */ 0260,01,045,01,0131,0110,0,
+    /* 36519 */ 0261,01,040,01,0131,0120,0,
+    /* 36526 */ 0260,01,040,01,0131,0110,0,
+    /* 36533 */ 0261,01,044,01,0131,0120,0,
+    /* 36540 */ 0260,01,044,01,0131,0110,0,
+    /* 36547 */ 0261,01,053,01,0131,0120,0,
+    /* 36554 */ 0260,01,053,01,0131,0110,0,
+    /* 36561 */ 0261,01,052,01,0131,0120,0,
+    /* 36568 */ 0260,01,052,01,0131,0110,0,
+    /* 36575 */ 0261,01,041,01,0126,0120,0,
+    /* 36582 */ 0260,01,041,01,0126,0110,0,
+    /* 36589 */ 0261,01,045,01,0126,0120,0,
+    /* 36596 */ 0260,01,045,01,0126,0110,0,
+    /* 36603 */ 0261,01,040,01,0126,0120,0,
+    /* 36610 */ 0260,01,040,01,0126,0110,0,
+    /* 36617 */ 0261,01,044,01,0126,0120,0,
+    /* 36624 */ 0260,01,044,01,0126,0110,0,
+    /* 36631 */ 0270,02,041,01,034,0110,0,
+    /* 36638 */ 0270,02,041,01,035,0110,0,
+    /* 36645 */ 0270,02,041,01,036,0110,0,
+    /* 36652 */ 0261,01,041,01,0143,0120,0,
+    /* 36659 */ 0260,01,041,01,0143,0110,0,
+    /* 36666 */ 0261,01,041,01,0153,0120,0,
+    /* 36673 */ 0260,01,041,01,0153,0110,0,
+    /* 36680 */ 0261,01,041,01,0147,0120,0,
+    /* 36687 */ 0260,01,041,01,0147,0110,0,
+    /* 36694 */ 0261,02,041,01,053,0120,0,
+    /* 36701 */ 0260,02,041,01,053,0110,0,
+    /* 36708 */ 0261,01,041,01,0374,0120,0,
+    /* 36715 */ 0260,01,041,01,0374,0110,0,
+    /* 36722 */ 0261,01,041,01,0375,0120,0,
+    /* 36729 */ 0260,01,041,01,0375,0110,0,
+    /* 36736 */ 0261,01,041,01,0376,0120,0,
+    /* 36743 */ 0260,01,041,01,0376,0110,0,
+    /* 36750 */ 0261,01,041,01,0324,0120,0,
+    /* 36757 */ 0260,01,041,01,0324,0110,0,
+    /* 36764 */ 0261,01,041,01,0354,0120,0,
+    /* 36771 */ 0260,01,041,01,0354,0110,0,
+    /* 36778 */ 0261,01,041,01,0355,0120,0,
+    /* 36785 */ 0260,01,041,01,0355,0110,0,
+    /* 36792 */ 0261,01,041,01,0334,0120,0,
+    /* 36799 */ 0260,01,041,01,0334,0110,0,
+    /* 36806 */ 0261,01,041,01,0335,0120,0,
+    /* 36813 */ 0260,01,041,01,0335,0110,0,
+    /* 36820 */ 0261,01,041,01,0333,0120,0,
+    /* 36827 */ 0260,01,041,01,0333,0110,0,
+    /* 36834 */ 0261,01,041,01,0337,0120,0,
+    /* 36841 */ 0260,01,041,01,0337,0110,0,
+    /* 36848 */ 0261,01,041,01,0340,0120,0,
+    /* 36855 */ 0260,01,041,01,0340,0110,0,
+    /* 36862 */ 0261,01,041,01,0343,0120,0,
+    /* 36869 */ 0260,01,041,01,0343,0110,0,
+    /* 36876 */ 0261,01,041,01,0164,0120,0,
+    /* 36883 */ 0260,01,041,01,0164,0110,0,
+    /* 36890 */ 0261,01,041,01,0165,0120,0,
+    /* 36897 */ 0260,01,041,01,0165,0110,0,
+    /* 36904 */ 0261,01,041,01,0166,0120,0,
+    /* 36911 */ 0260,01,041,01,0166,0110,0,
+    /* 36918 */ 0261,02,041,01,051,0120,0,
+    /* 36925 */ 0260,02,041,01,051,0110,0,
+    /* 36932 */ 0261,01,041,01,0144,0120,0,
+    /* 36939 */ 0260,01,041,01,0144,0110,0,
+    /* 36946 */ 0261,01,041,01,0145,0120,0,
+    /* 36953 */ 0260,01,041,01,0145,0110,0,
+    /* 36960 */ 0261,01,041,01,0146,0120,0,
+    /* 36967 */ 0260,01,041,01,0146,0110,0,
+    /* 36974 */ 0261,02,041,01,067,0120,0,
+    /* 36981 */ 0260,02,041,01,067,0110,0,
+    /* 36988 */ 0261,02,01,01,015,0120,0,
+    /* 36995 */ 0260,02,01,01,015,0110,0,
+    /* 37002 */ 0261,02,05,01,015,0120,0,
+    /* 37009 */ 0260,02,05,01,015,0110,0,
+    /* 37016 */ 0261,02,01,01,014,0120,0,
+    /* 37023 */ 0260,02,01,01,014,0110,0,
+    /* 37030 */ 0261,02,05,01,014,0120,0,
+    /* 37037 */ 0260,02,05,01,014,0110,0,
+    /* 37044 */ 0261,02,041,01,01,0120,0,
+    /* 37051 */ 0260,02,041,01,01,0110,0,
+    /* 37058 */ 0261,02,041,01,02,0120,0,
+    /* 37065 */ 0260,02,041,01,02,0110,0,
+    /* 37072 */ 0261,02,041,01,03,0120,0,
+    /* 37079 */ 0260,02,041,01,03,0110,0,
+    /* 37086 */ 0270,02,041,01,0101,0110,0,
+    /* 37093 */ 0261,02,041,01,05,0120,0,
+    /* 37100 */ 0260,02,041,01,05,0110,0,
+    /* 37107 */ 0261,02,041,01,06,0120,0,
+    /* 37114 */ 0260,02,041,01,06,0110,0,
+    /* 37121 */ 0261,02,041,01,07,0120,0,
+    /* 37128 */ 0260,02,041,01,07,0110,0,
+    /* 37135 */ 0261,01,041,01,0365,0120,0,
+    /* 37142 */ 0260,01,041,01,0365,0110,0,
+    /* 37149 */ 0261,02,041,01,04,0120,0,
+    /* 37156 */ 0260,02,041,01,04,0110,0,
+    /* 37163 */ 0261,02,041,01,074,0120,0,
+    /* 37170 */ 0260,02,041,01,074,0110,0,
+    /* 37177 */ 0261,01,041,01,0356,0120,0,
+    /* 37184 */ 0260,01,041,01,0356,0110,0,
+    /* 37191 */ 0261,02,041,01,075,0120,0,
+    /* 37198 */ 0260,02,041,01,075,0110,0,
+    /* 37205 */ 0261,01,041,01,0336,0120,0,
+    /* 37212 */ 0260,01,041,01,0336,0110,0,
+    /* 37219 */ 0261,02,041,01,076,0120,0,
+    /* 37226 */ 0260,02,041,01,076,0110,0,
+    /* 37233 */ 0261,02,041,01,077,0120,0,
+    /* 37240 */ 0260,02,041,01,077,0110,0,
+    /* 37247 */ 0261,02,041,01,070,0120,0,
+    /* 37254 */ 0260,02,041,01,070,0110,0,
+    /* 37261 */ 0261,01,041,01,0352,0120,0,
+    /* 37268 */ 0260,01,041,01,0352,0110,0,
+    /* 37275 */ 0261,02,041,01,071,0120,0,
+    /* 37282 */ 0260,02,041,01,071,0110,0,
+    /* 37289 */ 0261,01,041,01,0332,0120,0,
+    /* 37296 */ 0260,01,041,01,0332,0110,0,
+    /* 37303 */ 0261,02,041,01,072,0120,0,
+    /* 37310 */ 0260,02,041,01,072,0110,0,
+    /* 37317 */ 0261,02,041,01,073,0120,0,
+    /* 37324 */ 0260,02,041,01,073,0110,0,
+    /* 37331 */ 0270,01,041,01,0327,0110,0,
+    /* 37338 */ 0270,02,041,01,040,0110,0,
+    /* 37345 */ 0270,02,041,01,041,0110,0,
+    /* 37352 */ 0270,02,041,01,042,0110,0,
+    /* 37359 */ 0270,02,041,01,043,0110,0,
+    /* 37366 */ 0270,02,041,01,044,0110,0,
+    /* 37373 */ 0270,02,041,01,045,0110,0,
+    /* 37380 */ 0270,02,041,01,060,0110,0,
+    /* 37387 */ 0270,02,041,01,061,0110,0,
+    /* 37394 */ 0270,02,041,01,062,0110,0,
+    /* 37401 */ 0270,02,041,01,063,0110,0,
+    /* 37408 */ 0270,02,041,01,064,0110,0,
+    /* 37415 */ 0270,02,041,01,065,0110,0,
+    /* 37422 */ 0261,01,041,01,0344,0120,0,
+    /* 37429 */ 0260,01,041,01,0344,0110,0,
+    /* 37436 */ 0261,02,041,01,013,0120,0,
+    /* 37443 */ 0260,02,041,01,013,0110,0,
+    /* 37450 */ 0261,01,041,01,0345,0120,0,
+    /* 37457 */ 0260,01,041,01,0345,0110,0,
+    /* 37464 */ 0261,01,041,01,0325,0120,0,
+    /* 37471 */ 0260,01,041,01,0325,0110,0,
+    /* 37478 */ 0261,02,041,01,0100,0120,0,
+    /* 37485 */ 0260,02,041,01,0100,0110,0,
+    /* 37492 */ 0261,01,041,01,0364,0120,0,
+    /* 37499 */ 0260,01,041,01,0364,0110,0,
+    /* 37506 */ 0261,02,041,01,050,0120,0,
+    /* 37513 */ 0260,02,041,01,050,0110,0,
+    /* 37520 */ 0261,01,041,01,0353,0120,0,
+    /* 37527 */ 0260,01,041,01,0353,0110,0,
+    /* 37534 */ 0261,01,041,01,0366,0120,0,
+    /* 37541 */ 0260,01,041,01,0366,0110,0,
+    /* 37548 */ 0261,02,041,01,0,0120,0,
+    /* 37555 */ 0260,02,041,01,0,0110,0,
+    /* 37562 */ 0261,02,041,01,010,0120,0,
+    /* 37569 */ 0260,02,041,01,010,0110,0,
+    /* 37576 */ 0261,02,041,01,011,0120,0,
+    /* 37583 */ 0260,02,041,01,011,0110,0,
+    /* 37590 */ 0261,02,041,01,012,0120,0,
+    /* 37597 */ 0260,02,041,01,012,0110,0,
+    /* 37604 */ 0261,01,041,01,0361,0120,0,
+    /* 37611 */ 0260,01,041,01,0361,0110,0,
+    /* 37618 */ 0261,01,041,01,0362,0120,0,
+    /* 37625 */ 0260,01,041,01,0362,0110,0,
+    /* 37632 */ 0261,01,041,01,0363,0120,0,
+    /* 37639 */ 0260,01,041,01,0363,0110,0,
+    /* 37646 */ 0261,01,041,01,0341,0120,0,
+    /* 37653 */ 0260,01,041,01,0341,0110,0,
+    /* 37660 */ 0261,01,041,01,0342,0120,0,
+    /* 37667 */ 0260,01,041,01,0342,0110,0,
+    /* 37674 */ 0261,01,041,01,0321,0120,0,
+    /* 37681 */ 0260,01,041,01,0321,0110,0,
+    /* 37688 */ 0261,01,041,01,0322,0120,0,
+    /* 37695 */ 0260,01,041,01,0322,0110,0,
+    /* 37702 */ 0261,01,041,01,0323,0120,0,
+    /* 37709 */ 0260,01,041,01,0323,0110,0,
+    /* 37716 */ 0270,02,041,01,027,0110,0,
+    /* 37723 */ 0270,02,045,01,027,0110,0,
+    /* 37730 */ 0261,01,041,01,0370,0120,0,
+    /* 37737 */ 0260,01,041,01,0370,0110,0,
+    /* 37744 */ 0261,01,041,01,0371,0120,0,
+    /* 37751 */ 0260,01,041,01,0371,0110,0,
+    /* 37758 */ 0261,01,041,01,0372,0120,0,
+    /* 37765 */ 0260,01,041,01,0372,0110,0,
+    /* 37772 */ 0261,01,041,01,0373,0120,0,
+    /* 37779 */ 0260,01,041,01,0373,0110,0,
+    /* 37786 */ 0261,01,041,01,0350,0120,0,
+    /* 37793 */ 0260,01,041,01,0350,0110,0,
+    /* 37800 */ 0261,01,041,01,0351,0120,0,
+    /* 37807 */ 0260,01,041,01,0351,0110,0,
+    /* 37814 */ 0261,01,041,01,0330,0120,0,
+    /* 37821 */ 0260,01,041,01,0330,0110,0,
+    /* 37828 */ 0261,01,041,01,0331,0120,0,
+    /* 37835 */ 0260,01,041,01,0331,0110,0,
+    /* 37842 */ 0261,01,041,01,0150,0120,0,
+    /* 37849 */ 0260,01,041,01,0150,0110,0,
+    /* 37856 */ 0261,01,041,01,0151,0120,0,
+    /* 37863 */ 0260,01,041,01,0151,0110,0,
+    /* 37870 */ 0261,01,041,01,0152,0120,0,
+    /* 37877 */ 0260,01,041,01,0152,0110,0,
+    /* 37884 */ 0261,01,041,01,0155,0120,0,
+    /* 37891 */ 0260,01,041,01,0155,0110,0,
+    /* 37898 */ 0261,01,041,01,0140,0120,0,
+    /* 37905 */ 0260,01,041,01,0140,0110,0,
+    /* 37912 */ 0261,01,041,01,0141,0120,0,
+    /* 37919 */ 0260,01,041,01,0141,0110,0,
+    /* 37926 */ 0261,01,041,01,0142,0120,0,
+    /* 37933 */ 0260,01,041,01,0142,0110,0,
+    /* 37940 */ 0261,01,041,01,0154,0120,0,
+    /* 37947 */ 0260,01,041,01,0154,0110,0,
+    /* 37954 */ 0261,01,041,01,0357,0120,0,
+    /* 37961 */ 0260,01,041,01,0357,0110,0,
+    /* 37968 */ 0270,01,040,01,0123,0110,0,
+    /* 37975 */ 0270,01,044,01,0123,0110,0,
+    /* 37982 */ 0261,01,052,01,0123,0120,0,
+    /* 37989 */ 0260,01,052,01,0123,0110,0,
+    /* 37996 */ 0270,01,040,01,0122,0110,0,
+    /* 38003 */ 0270,01,044,01,0122,0110,0,
+    /* 38010 */ 0261,01,052,01,0122,0120,0,
+    /* 38017 */ 0260,01,052,01,0122,0110,0,
+    /* 38024 */ 0270,01,041,01,0121,0110,0,
+    /* 38031 */ 0270,01,045,01,0121,0110,0,
+    /* 38038 */ 0270,01,040,01,0121,0110,0,
+    /* 38045 */ 0270,01,044,01,0121,0110,0,
+    /* 38052 */ 0261,01,053,01,0121,0120,0,
+    /* 38059 */ 0260,01,053,01,0121,0110,0,
+    /* 38066 */ 0261,01,052,01,0121,0120,0,
+    /* 38073 */ 0260,01,052,01,0121,0110,0,
+    /* 38080 */ 0270,01,040,01,0256,0203,0,
+    /* 38087 */ 0261,01,041,01,0134,0120,0,
+    /* 38094 */ 0260,01,041,01,0134,0110,0,
+    /* 38101 */ 0261,01,045,01,0134,0120,0,
+    /* 38108 */ 0260,01,045,01,0134,0110,0,
+    /* 38115 */ 0261,01,040,01,0134,0120,0,
+    /* 38122 */ 0260,01,040,01,0134,0110,0,
+    /* 38129 */ 0261,01,044,01,0134,0120,0,
+    /* 38136 */ 0260,01,044,01,0134,0110,0,
+    /* 38143 */ 0261,01,053,01,0134,0120,0,
+    /* 38150 */ 0260,01,053,01,0134,0110,0,
+    /* 38157 */ 0261,01,052,01,0134,0120,0,
+    /* 38164 */ 0260,01,052,01,0134,0110,0,
+    /* 38171 */ 0270,02,01,01,016,0110,0,
+    /* 38178 */ 0270,02,05,01,016,0110,0,
+    /* 38185 */ 0270,02,01,01,017,0110,0,
+    /* 38192 */ 0270,02,05,01,017,0110,0,
+    /* 38199 */ 0270,01,051,01,056,0110,0,
+    /* 38206 */ 0270,01,050,01,056,0110,0,
+    /* 38213 */ 0261,01,041,01,025,0120,0,
+    /* 38220 */ 0260,01,041,01,025,0110,0,
+    /* 38227 */ 0261,01,045,01,025,0120,0,
+    /* 38234 */ 0260,01,045,01,025,0110,0,
+    /* 38241 */ 0261,01,040,01,025,0120,0,
+    /* 38248 */ 0260,01,040,01,025,0110,0,
+    /* 38255 */ 0261,01,044,01,025,0120,0,
+    /* 38262 */ 0260,01,044,01,025,0110,0,
+    /* 38269 */ 0261,01,041,01,024,0120,0,
+    /* 38276 */ 0260,01,041,01,024,0110,0,
+    /* 38283 */ 0261,01,045,01,024,0120,0,
+    /* 38290 */ 0260,01,045,01,024,0110,0,
+    /* 38297 */ 0261,01,040,01,024,0120,0,
+    /* 38304 */ 0260,01,040,01,024,0110,0,
+    /* 38311 */ 0261,01,044,01,024,0120,0,
+    /* 38318 */ 0260,01,044,01,024,0110,0,
+    /* 38325 */ 0261,01,041,01,0127,0120,0,
+    /* 38332 */ 0260,01,041,01,0127,0110,0,
+    /* 38339 */ 0261,01,045,01,0127,0120,0,
+    /* 38346 */ 0260,01,045,01,0127,0110,0,
+    /* 38353 */ 0261,01,040,01,0127,0120,0,
+    /* 38360 */ 0260,01,040,01,0127,0110,0,
+    /* 38367 */ 0261,01,044,01,0127,0120,0,
+    /* 38374 */ 0260,01,044,01,0127,0110,0,
+    /* 38381 */ 0261,02,01,01,0230,0120,0,
+    /* 38388 */ 0261,02,05,01,0230,0120,0,
+    /* 38395 */ 0261,02,021,01,0230,0120,0,
+    /* 38402 */ 0261,02,025,01,0230,0120,0,
+    /* 38409 */ 0261,02,01,01,0250,0120,0,
+    /* 38416 */ 0261,02,05,01,0250,0120,0,
+    /* 38423 */ 0261,02,021,01,0250,0120,0,
+    /* 38430 */ 0261,02,025,01,0250,0120,0,
+    /* 38437 */ 0261,02,01,01,0270,0120,0,
+    /* 38444 */ 0261,02,05,01,0270,0120,0,
+    /* 38451 */ 0261,02,021,01,0270,0120,0,
+    /* 38458 */ 0261,02,025,01,0270,0120,0,
+    /* 38465 */ 0261,02,01,01,0226,0120,0,
+    /* 38472 */ 0261,02,05,01,0226,0120,0,
+    /* 38479 */ 0261,02,021,01,0226,0120,0,
+    /* 38486 */ 0261,02,025,01,0226,0120,0,
+    /* 38493 */ 0261,02,01,01,0246,0120,0,
+    /* 38500 */ 0261,02,05,01,0246,0120,0,
+    /* 38507 */ 0261,02,021,01,0246,0120,0,
+    /* 38514 */ 0261,02,025,01,0246,0120,0,
+    /* 38521 */ 0261,02,01,01,0266,0120,0,
+    /* 38528 */ 0261,02,05,01,0266,0120,0,
+    /* 38535 */ 0261,02,021,01,0266,0120,0,
+    /* 38542 */ 0261,02,025,01,0266,0120,0,
+    /* 38549 */ 0261,02,01,01,0232,0120,0,
+    /* 38556 */ 0261,02,05,01,0232,0120,0,
+    /* 38563 */ 0261,02,021,01,0232,0120,0,
+    /* 38570 */ 0261,02,025,01,0232,0120,0,
+    /* 38577 */ 0261,02,01,01,0252,0120,0,
+    /* 38584 */ 0261,02,05,01,0252,0120,0,
+    /* 38591 */ 0261,02,021,01,0252,0120,0,
+    /* 38598 */ 0261,02,025,01,0252,0120,0,
+    /* 38605 */ 0261,02,01,01,0272,0120,0,
+    /* 38612 */ 0261,02,05,01,0272,0120,0,
+    /* 38619 */ 0261,02,021,01,0272,0120,0,
+    /* 38626 */ 0261,02,025,01,0272,0120,0,
+    /* 38633 */ 0261,02,01,01,0227,0120,0,
+    /* 38640 */ 0261,02,05,01,0227,0120,0,
+    /* 38647 */ 0261,02,021,01,0227,0120,0,
+    /* 38654 */ 0261,02,025,01,0227,0120,0,
+    /* 38661 */ 0261,02,01,01,0247,0120,0,
+    /* 38668 */ 0261,02,05,01,0247,0120,0,
+    /* 38675 */ 0261,02,021,01,0247,0120,0,
+    /* 38682 */ 0261,02,025,01,0247,0120,0,
+    /* 38689 */ 0261,02,01,01,0267,0120,0,
+    /* 38696 */ 0261,02,05,01,0267,0120,0,
+    /* 38703 */ 0261,02,021,01,0267,0120,0,
+    /* 38710 */ 0261,02,025,01,0267,0120,0,
+    /* 38717 */ 0261,02,01,01,0234,0120,0,
+    /* 38724 */ 0261,02,05,01,0234,0120,0,
+    /* 38731 */ 0261,02,021,01,0234,0120,0,
+    /* 38738 */ 0261,02,025,01,0234,0120,0,
+    /* 38745 */ 0261,02,01,01,0254,0120,0,
+    /* 38752 */ 0261,02,05,01,0254,0120,0,
+    /* 38759 */ 0261,02,021,01,0254,0120,0,
+    /* 38766 */ 0261,02,025,01,0254,0120,0,
+    /* 38773 */ 0261,02,01,01,0274,0120,0,
+    /* 38780 */ 0261,02,05,01,0274,0120,0,
+    /* 38787 */ 0261,02,021,01,0274,0120,0,
+    /* 38794 */ 0261,02,025,01,0274,0120,0,
+    /* 38801 */ 0261,02,01,01,0236,0120,0,
+    /* 38808 */ 0261,02,05,01,0236,0120,0,
+    /* 38815 */ 0261,02,021,01,0236,0120,0,
+    /* 38822 */ 0261,02,025,01,0236,0120,0,
+    /* 38829 */ 0261,02,01,01,0256,0120,0,
+    /* 38836 */ 0261,02,05,01,0256,0120,0,
+    /* 38843 */ 0261,02,021,01,0256,0120,0,
+    /* 38850 */ 0261,02,025,01,0256,0120,0,
+    /* 38857 */ 0261,02,01,01,0276,0120,0,
+    /* 38864 */ 0261,02,05,01,0276,0120,0,
+    /* 38871 */ 0261,02,021,01,0276,0120,0,
+    /* 38878 */ 0261,02,025,01,0276,0120,0,
+    /* 38885 */ 0261,02,01,01,0231,0120,0,
+    /* 38892 */ 0261,02,021,01,0231,0120,0,
+    /* 38899 */ 0261,02,01,01,0251,0120,0,
+    /* 38906 */ 0261,02,021,01,0251,0120,0,
+    /* 38913 */ 0261,02,01,01,0271,0120,0,
+    /* 38920 */ 0261,02,021,01,0271,0120,0,
+    /* 38927 */ 0261,02,01,01,0233,0120,0,
+    /* 38934 */ 0261,02,021,01,0233,0120,0,
+    /* 38941 */ 0261,02,01,01,0253,0120,0,
+    /* 38948 */ 0261,02,021,01,0253,0120,0,
+    /* 38955 */ 0261,02,01,01,0273,0120,0,
+    /* 38962 */ 0261,02,021,01,0273,0120,0,
+    /* 38969 */ 0261,02,01,01,0235,0120,0,
+    /* 38976 */ 0261,02,021,01,0235,0120,0,
+    /* 38983 */ 0261,02,01,01,0255,0120,0,
+    /* 38990 */ 0261,02,021,01,0255,0120,0,
+    /* 38997 */ 0261,02,01,01,0275,0120,0,
+    /* 39004 */ 0261,02,021,01,0275,0120,0,
+    /* 39011 */ 0261,02,01,01,0237,0120,0,
+    /* 39018 */ 0261,02,021,01,0237,0120,0,
+    /* 39025 */ 0261,02,01,01,0257,0120,0,
+    /* 39032 */ 0261,02,021,01,0257,0120,0,
+    /* 39039 */ 0261,02,01,01,0277,0120,0,
+    /* 39046 */ 0261,02,021,01,0277,0120,0,
+    /* 39053 */ 0317,0333,02,017,0256,0200,0,
+    /* 39060 */ 0324,0333,02,017,0256,0200,0,
+    /* 39067 */ 0317,0333,02,017,0256,0201,0,
+    /* 39074 */ 0324,0333,02,017,0256,0201,0,
+    /* 39081 */ 0317,0333,02,017,0256,0202,0,
+    /* 39088 */ 0324,0333,02,017,0256,0202,0,
+    /* 39095 */ 0317,0333,02,017,0256,0203,0,
+    /* 39102 */ 0324,0333,02,017,0256,0203,0,
+    /* 39109 */ 0270,02,05,01,023,0110,0,
+    /* 39116 */ 0270,02,01,01,023,0110,0,
+    /* 39123 */ 0270,0111,0,01,022,0200,0,
+    /* 39130 */ 0270,0111,020,01,022,0200,0,
+    /* 39137 */ 0270,0111,0,01,022,0201,0,
+    /* 39144 */ 0270,0111,020,01,022,0201,0,
+    /* 39151 */ 0270,0111,0,01,0201,0110,0,
+    /* 39158 */ 0270,0111,0,01,0201,0100,0,
+    /* 39165 */ 0270,0111,04,01,0201,0110,0,
+    /* 39172 */ 0270,0111,04,01,0201,0100,0,
+    /* 39179 */ 0270,0111,0,01,0200,0110,0,
+    /* 39186 */ 0270,0111,0,01,0200,0100,0,
+    /* 39193 */ 0270,0111,04,01,0200,0110,0,
+    /* 39200 */ 0270,0111,04,01,0200,0100,0,
+    /* 39207 */ 0270,0111,0,01,0203,0110,0,
+    /* 39214 */ 0270,0111,0,01,0203,0100,0,
+    /* 39221 */ 0270,0111,0,01,0202,0110,0,
+    /* 39228 */ 0270,0111,0,01,0202,0100,0,
+    /* 39235 */ 0270,0111,0,01,0302,0110,0,
+    /* 39242 */ 0270,0111,0,01,0302,0100,0,
+    /* 39249 */ 0270,0111,0,01,0303,0110,0,
+    /* 39256 */ 0270,0111,0,01,0303,0100,0,
+    /* 39263 */ 0270,0111,0,01,0301,0110,0,
+    /* 39270 */ 0270,0111,0,01,0301,0100,0,
+    /* 39277 */ 0270,0111,0,01,0313,0110,0,
+    /* 39284 */ 0270,0111,0,01,0313,0100,0,
+    /* 39291 */ 0270,0111,0,01,0322,0110,0,
+    /* 39298 */ 0270,0111,0,01,0322,0100,0,
+    /* 39305 */ 0270,0111,0,01,0323,0110,0,
+    /* 39312 */ 0270,0111,0,01,0323,0100,0,
+    /* 39319 */ 0270,0111,0,01,0321,0110,0,
+    /* 39326 */ 0270,0111,0,01,0321,0100,0,
+    /* 39333 */ 0270,0111,0,01,0333,0110,0,
+    /* 39340 */ 0270,0111,0,01,0333,0100,0,
+    /* 39347 */ 0270,0111,0,01,0326,0110,0,
+    /* 39354 */ 0270,0111,0,01,0326,0100,0,
+    /* 39361 */ 0270,0111,0,01,0327,0110,0,
+    /* 39368 */ 0270,0111,0,01,0327,0100,0,
+    /* 39375 */ 0270,0111,0,01,0306,0110,0,
+    /* 39382 */ 0270,0111,0,01,0306,0100,0,
+    /* 39389 */ 0270,0111,0,01,0307,0110,0,
+    /* 39396 */ 0270,0111,0,01,0307,0100,0,
+    /* 39403 */ 0270,0111,0,01,0341,0110,0,
+    /* 39410 */ 0270,0111,0,01,0341,0100,0,
+    /* 39417 */ 0270,0111,0,01,0343,0110,0,
+    /* 39424 */ 0270,0111,0,01,0343,0100,0,
+    /* 39431 */ 0270,0111,0,01,0342,0110,0,
+    /* 39438 */ 0270,0111,0,01,0342,0100,0,
+    /* 39445 */ 0262,0111,0,01,0220,0110,0,
+    /* 39452 */ 0261,0111,0,01,0220,0100,0,
+    /* 39459 */ 0261,0111,020,01,0220,0120,0,
+    /* 39466 */ 0260,0111,020,01,0220,0110,0,
+    /* 39473 */ 0262,0111,0,01,0222,0110,0,
+    /* 39480 */ 0261,0111,0,01,0222,0100,0,
+    /* 39487 */ 0261,0111,020,01,0222,0120,0,
+    /* 39494 */ 0260,0111,020,01,0222,0110,0,
+    /* 39501 */ 0262,0111,0,01,0223,0110,0,
+    /* 39508 */ 0261,0111,0,01,0223,0100,0,
+    /* 39515 */ 0261,0111,020,01,0223,0120,0,
+    /* 39522 */ 0260,0111,020,01,0223,0110,0,
+    /* 39529 */ 0262,0111,0,01,0221,0110,0,
+    /* 39536 */ 0261,0111,0,01,0221,0100,0,
+    /* 39543 */ 0261,0111,020,01,0221,0120,0,
+    /* 39550 */ 0260,0111,020,01,0221,0110,0,
+    /* 39557 */ 0262,0111,0,01,0230,0110,0,
+    /* 39564 */ 0261,0111,0,01,0230,0100,0,
+    /* 39571 */ 0261,0111,020,01,0230,0120,0,
+    /* 39578 */ 0260,0111,020,01,0230,0110,0,
+    /* 39585 */ 0262,0111,0,01,0232,0110,0,
+    /* 39592 */ 0261,0111,0,01,0232,0100,0,
+    /* 39599 */ 0261,0111,020,01,0232,0120,0,
+    /* 39606 */ 0260,0111,020,01,0232,0110,0,
+    /* 39613 */ 0262,0111,0,01,0233,0110,0,
+    /* 39620 */ 0261,0111,0,01,0233,0100,0,
+    /* 39627 */ 0261,0111,020,01,0233,0120,0,
+    /* 39634 */ 0260,0111,020,01,0233,0110,0,
+    /* 39641 */ 0262,0111,0,01,0231,0110,0,
+    /* 39648 */ 0261,0111,0,01,0231,0100,0,
+    /* 39655 */ 0261,0111,020,01,0231,0120,0,
+    /* 39662 */ 0260,0111,020,01,0231,0110,0,
+    /* 39669 */ 0262,0111,0,01,0224,0110,0,
+    /* 39676 */ 0261,0111,0,01,0224,0100,0,
+    /* 39683 */ 0261,0111,020,01,0224,0120,0,
+    /* 39690 */ 0260,0111,020,01,0224,0110,0,
+    /* 39697 */ 0262,0111,0,01,0226,0110,0,
+    /* 39704 */ 0261,0111,0,01,0226,0100,0,
+    /* 39711 */ 0261,0111,020,01,0226,0120,0,
+    /* 39718 */ 0260,0111,020,01,0226,0110,0,
+    /* 39725 */ 0262,0111,0,01,0227,0110,0,
+    /* 39732 */ 0261,0111,0,01,0227,0100,0,
+    /* 39739 */ 0261,0111,020,01,0227,0120,0,
+    /* 39746 */ 0260,0111,020,01,0227,0110,0,
+    /* 39753 */ 0262,0111,0,01,0225,0110,0,
+    /* 39760 */ 0261,0111,0,01,0225,0100,0,
+    /* 39767 */ 0261,0111,020,01,0225,0120,0,
+    /* 39774 */ 0260,0111,020,01,0225,0110,0,
+    /* 39781 */ 0270,02,045,01,034,0110,0,
+    /* 39788 */ 0270,02,045,01,035,0110,0,
+    /* 39795 */ 0270,02,045,01,036,0110,0,
+    /* 39802 */ 0261,01,045,01,0143,0120,0,
+    /* 39809 */ 0260,01,045,01,0143,0110,0,
+    /* 39816 */ 0261,01,045,01,0153,0120,0,
+    /* 39823 */ 0260,01,045,01,0153,0110,0,
+    /* 39830 */ 0261,02,045,01,053,0120,0,
+    /* 39837 */ 0260,02,045,01,053,0110,0,
+    /* 39844 */ 0261,01,045,01,0147,0120,0,
+    /* 39851 */ 0260,01,045,01,0147,0110,0,
+    /* 39858 */ 0261,01,045,01,0374,0120,0,
+    /* 39865 */ 0260,01,045,01,0374,0110,0,
+    /* 39872 */ 0261,01,045,01,0375,0120,0,
+    /* 39879 */ 0260,01,045,01,0375,0110,0,
+    /* 39886 */ 0261,01,045,01,0376,0120,0,
+    /* 39893 */ 0260,01,045,01,0376,0110,0,
+    /* 39900 */ 0261,01,045,01,0324,0120,0,
+    /* 39907 */ 0260,01,045,01,0324,0110,0,
+    /* 39914 */ 0261,01,045,01,0354,0120,0,
+    /* 39921 */ 0260,01,045,01,0354,0110,0,
+    /* 39928 */ 0261,01,045,01,0355,0120,0,
+    /* 39935 */ 0260,01,045,01,0355,0110,0,
+    /* 39942 */ 0261,01,045,01,0334,0120,0,
+    /* 39949 */ 0260,01,045,01,0334,0110,0,
+    /* 39956 */ 0261,01,045,01,0335,0120,0,
+    /* 39963 */ 0260,01,045,01,0335,0110,0,
+    /* 39970 */ 0261,01,045,01,0333,0120,0,
+    /* 39977 */ 0260,01,045,01,0333,0110,0,
+    /* 39984 */ 0261,01,045,01,0337,0120,0,
+    /* 39991 */ 0260,01,045,01,0337,0110,0,
+    /* 39998 */ 0261,01,045,01,0340,0120,0,
+    /* 40005 */ 0260,01,045,01,0340,0110,0,
+    /* 40012 */ 0261,01,045,01,0343,0120,0,
+    /* 40019 */ 0260,01,045,01,0343,0110,0,
+    /* 40026 */ 0261,01,045,01,0164,0120,0,
+    /* 40033 */ 0260,01,045,01,0164,0110,0,
+    /* 40040 */ 0261,01,045,01,0165,0120,0,
+    /* 40047 */ 0260,01,045,01,0165,0110,0,
+    /* 40054 */ 0261,01,045,01,0166,0120,0,
+    /* 40061 */ 0260,01,045,01,0166,0110,0,
+    /* 40068 */ 0261,02,045,01,051,0120,0,
+    /* 40075 */ 0260,02,045,01,051,0110,0,
+    /* 40082 */ 0261,01,045,01,0144,0120,0,
+    /* 40089 */ 0260,01,045,01,0144,0110,0,
+    /* 40096 */ 0261,01,045,01,0145,0120,0,
+    /* 40103 */ 0260,01,045,01,0145,0110,0,
+    /* 40110 */ 0261,01,045,01,0146,0120,0,
+    /* 40117 */ 0260,01,045,01,0146,0110,0,
+    /* 40124 */ 0261,02,045,01,067,0120,0,
+    /* 40131 */ 0260,02,045,01,067,0110,0,
+    /* 40138 */ 0261,02,045,01,01,0120,0,
+    /* 40145 */ 0260,02,045,01,01,0110,0,
+    /* 40152 */ 0261,02,045,01,02,0120,0,
+    /* 40159 */ 0260,02,045,01,02,0110,0,
+    /* 40166 */ 0261,02,045,01,03,0120,0,
+    /* 40173 */ 0260,02,045,01,03,0110,0,
+    /* 40180 */ 0261,02,045,01,05,0120,0,
+    /* 40187 */ 0260,02,045,01,05,0110,0,
+    /* 40194 */ 0261,02,045,01,06,0120,0,
+    /* 40201 */ 0260,02,045,01,06,0110,0,
+    /* 40208 */ 0261,02,045,01,07,0120,0,
+    /* 40215 */ 0260,02,045,01,07,0110,0,
+    /* 40222 */ 0261,02,045,01,04,0120,0,
+    /* 40229 */ 0260,02,045,01,04,0110,0,
+    /* 40236 */ 0261,01,045,01,0365,0120,0,
+    /* 40243 */ 0260,01,045,01,0365,0110,0,
+    /* 40250 */ 0261,02,045,01,074,0120,0,
+    /* 40257 */ 0260,02,045,01,074,0110,0,
+    /* 40264 */ 0261,01,045,01,0356,0120,0,
+    /* 40271 */ 0260,01,045,01,0356,0110,0,
+    /* 40278 */ 0261,02,045,01,075,0120,0,
+    /* 40285 */ 0260,02,045,01,075,0110,0,
+    /* 40292 */ 0261,01,045,01,0336,0120,0,
+    /* 40299 */ 0260,01,045,01,0336,0110,0,
+    /* 40306 */ 0261,02,045,01,076,0120,0,
+    /* 40313 */ 0260,02,045,01,076,0110,0,
+    /* 40320 */ 0261,02,045,01,077,0120,0,
+    /* 40327 */ 0260,02,045,01,077,0110,0,
+    /* 40334 */ 0261,02,045,01,070,0120,0,
+    /* 40341 */ 0260,02,045,01,070,0110,0,
+    /* 40348 */ 0261,01,045,01,0352,0120,0,
+    /* 40355 */ 0260,01,045,01,0352,0110,0,
+    /* 40362 */ 0261,02,045,01,071,0120,0,
+    /* 40369 */ 0260,02,045,01,071,0110,0,
+    /* 40376 */ 0261,01,045,01,0332,0120,0,
+    /* 40383 */ 0260,01,045,01,0332,0110,0,
+    /* 40390 */ 0261,02,045,01,072,0120,0,
+    /* 40397 */ 0260,02,045,01,072,0110,0,
+    /* 40404 */ 0261,02,045,01,073,0120,0,
+    /* 40411 */ 0260,02,045,01,073,0110,0,
+    /* 40418 */ 0270,01,045,01,0327,0110,0,
+    /* 40425 */ 0270,02,045,01,040,0110,0,
+    /* 40432 */ 0270,02,045,01,041,0110,0,
+    /* 40439 */ 0270,02,045,01,042,0110,0,
+    /* 40446 */ 0270,02,045,01,043,0110,0,
+    /* 40453 */ 0270,02,045,01,044,0110,0,
+    /* 40460 */ 0270,02,045,01,045,0110,0,
+    /* 40467 */ 0270,02,045,01,060,0110,0,
+    /* 40474 */ 0270,02,045,01,061,0110,0,
+    /* 40481 */ 0270,02,045,01,062,0110,0,
+    /* 40488 */ 0270,02,045,01,063,0110,0,
+    /* 40495 */ 0270,02,045,01,064,0110,0,
+    /* 40502 */ 0270,02,045,01,065,0110,0,
+    /* 40509 */ 0261,02,045,01,050,0120,0,
+    /* 40516 */ 0260,02,045,01,050,0110,0,
+    /* 40523 */ 0261,02,045,01,013,0120,0,
+    /* 40530 */ 0260,02,045,01,013,0110,0,
+    /* 40537 */ 0261,01,045,01,0344,0120,0,
+    /* 40544 */ 0260,01,045,01,0344,0110,0,
+    /* 40551 */ 0261,01,045,01,0345,0120,0,
+    /* 40558 */ 0260,01,045,01,0345,0110,0,
+    /* 40565 */ 0261,01,045,01,0325,0120,0,
+    /* 40572 */ 0260,01,045,01,0325,0110,0,
+    /* 40579 */ 0261,02,045,01,0100,0120,0,
+    /* 40586 */ 0260,02,045,01,0100,0110,0,
+    /* 40593 */ 0261,01,045,01,0364,0120,0,
+    /* 40600 */ 0260,01,045,01,0364,0110,0,
+    /* 40607 */ 0261,01,045,01,0353,0120,0,
+    /* 40614 */ 0260,01,045,01,0353,0110,0,
+    /* 40621 */ 0261,01,045,01,0366,0120,0,
+    /* 40628 */ 0260,01,045,01,0366,0110,0,
+    /* 40635 */ 0261,02,045,01,0,0120,0,
+    /* 40642 */ 0260,02,045,01,0,0110,0,
+    /* 40649 */ 0261,02,045,01,010,0120,0,
+    /* 40656 */ 0260,02,045,01,010,0110,0,
+    /* 40663 */ 0261,02,045,01,011,0120,0,
+    /* 40670 */ 0260,02,045,01,011,0110,0,
+    /* 40677 */ 0261,02,045,01,012,0120,0,
+    /* 40684 */ 0260,02,045,01,012,0110,0,
+    /* 40691 */ 0261,01,045,01,0361,0120,0,
+    /* 40698 */ 0260,01,045,01,0361,0110,0,
+    /* 40705 */ 0261,01,045,01,0362,0120,0,
+    /* 40712 */ 0260,01,045,01,0362,0110,0,
+    /* 40719 */ 0261,01,045,01,0363,0120,0,
+    /* 40726 */ 0260,01,045,01,0363,0110,0,
+    /* 40733 */ 0261,01,045,01,0341,0120,0,
+    /* 40740 */ 0260,01,045,01,0341,0110,0,
+    /* 40747 */ 0261,01,045,01,0342,0120,0,
+    /* 40754 */ 0260,01,045,01,0342,0110,0,
+    /* 40761 */ 0261,01,045,01,0321,0120,0,
+    /* 40768 */ 0260,01,045,01,0321,0110,0,
+    /* 40775 */ 0261,01,045,01,0322,0120,0,
+    /* 40782 */ 0260,01,045,01,0322,0110,0,
+    /* 40789 */ 0261,01,045,01,0323,0120,0,
+    /* 40796 */ 0260,01,045,01,0323,0110,0,
+    /* 40803 */ 0261,01,045,01,0370,0120,0,
+    /* 40810 */ 0260,01,045,01,0370,0110,0,
+    /* 40817 */ 0261,01,045,01,0371,0120,0,
+    /* 40824 */ 0260,01,045,01,0371,0110,0,
+    /* 40831 */ 0261,01,045,01,0372,0120,0,
+    /* 40838 */ 0260,01,045,01,0372,0110,0,
+    /* 40845 */ 0261,01,045,01,0373,0120,0,
+    /* 40852 */ 0260,01,045,01,0373,0110,0,
+    /* 40859 */ 0261,01,045,01,0350,0120,0,
+    /* 40866 */ 0260,01,045,01,0350,0110,0,
+    /* 40873 */ 0261,01,045,01,0351,0120,0,
+    /* 40880 */ 0260,01,045,01,0351,0110,0,
+    /* 40887 */ 0261,01,045,01,0330,0120,0,
+    /* 40894 */ 0260,01,045,01,0330,0110,0,
+    /* 40901 */ 0261,01,045,01,0331,0120,0,
+    /* 40908 */ 0260,01,045,01,0331,0110,0,
+    /* 40915 */ 0261,01,045,01,0150,0120,0,
+    /* 40922 */ 0260,01,045,01,0150,0110,0,
+    /* 40929 */ 0261,01,045,01,0151,0120,0,
+    /* 40936 */ 0260,01,045,01,0151,0110,0,
+    /* 40943 */ 0261,01,045,01,0152,0120,0,
+    /* 40950 */ 0260,01,045,01,0152,0110,0,
+    /* 40957 */ 0261,01,045,01,0155,0120,0,
+    /* 40964 */ 0260,01,045,01,0155,0110,0,
+    /* 40971 */ 0261,01,045,01,0140,0120,0,
+    /* 40978 */ 0260,01,045,01,0140,0110,0,
+    /* 40985 */ 0261,01,045,01,0141,0120,0,
+    /* 40992 */ 0260,01,045,01,0141,0110,0,
+    /* 40999 */ 0261,01,045,01,0142,0120,0,
+    /* 41006 */ 0260,01,045,01,0142,0110,0,
+    /* 41013 */ 0261,01,045,01,0154,0120,0,
+    /* 41020 */ 0260,01,045,01,0154,0110,0,
+    /* 41027 */ 0261,01,045,01,0357,0120,0,
+    /* 41034 */ 0260,01,045,01,0357,0110,0,
+    /* 41041 */ 0270,02,045,01,052,0110,0,
+    /* 41048 */ 0270,02,05,01,0132,0110,0,
+    /* 41055 */ 0270,02,01,01,0170,0110,0,
+    /* 41062 */ 0270,02,05,01,0170,0110,0,
+    /* 41069 */ 0270,02,01,01,0171,0110,0,
+    /* 41076 */ 0270,02,05,01,0171,0110,0,
+    /* 41083 */ 0270,02,01,01,0130,0110,0,
+    /* 41090 */ 0270,02,05,01,0130,0110,0,
+    /* 41097 */ 0270,02,01,01,0131,0110,0,
+    /* 41104 */ 0270,02,05,01,0131,0110,0,
+    /* 41111 */ 0261,02,05,01,066,0120,0,
+    /* 41118 */ 0260,02,05,01,066,0110,0,
+    /* 41125 */ 0261,02,05,01,026,0120,0,
+    /* 41132 */ 0260,02,05,01,026,0110,0,
+    /* 41139 */ 0261,02,01,01,0214,0120,0,
+    /* 41146 */ 0260,02,01,01,0214,0110,0,
+    /* 41153 */ 0261,02,05,01,0214,0120,0,
+    /* 41160 */ 0260,02,05,01,0214,0110,0,
+    /* 41167 */ 0261,02,021,01,0214,0120,0,
+    /* 41174 */ 0260,02,021,01,0214,0110,0,
+    /* 41181 */ 0261,02,025,01,0214,0120,0,
+    /* 41188 */ 0260,02,025,01,0214,0110,0,
+    /* 41195 */ 0261,02,01,01,0216,0102,0,
+    /* 41202 */ 0260,02,01,01,0216,0101,0,
+    /* 41209 */ 0261,02,05,01,0216,0102,0,
+    /* 41216 */ 0260,02,05,01,0216,0101,0,
+    /* 41223 */ 0261,02,021,01,0216,0102,0,
+    /* 41230 */ 0260,02,021,01,0216,0101,0,
+    /* 41237 */ 0261,02,025,01,0216,0102,0,
+    /* 41244 */ 0260,02,025,01,0216,0101,0,
+    /* 41251 */ 0261,02,01,01,0107,0120,0,
+    /* 41258 */ 0260,02,01,01,0107,0110,0,
+    /* 41265 */ 0261,02,021,01,0107,0120,0,
+    /* 41272 */ 0260,02,021,01,0107,0110,0,
+    /* 41279 */ 0261,02,05,01,0107,0120,0,
+    /* 41286 */ 0260,02,05,01,0107,0110,0,
+    /* 41293 */ 0261,02,025,01,0107,0120,0,
+    /* 41300 */ 0260,02,025,01,0107,0110,0,
+    /* 41307 */ 0261,02,01,01,0106,0120,0,
+    /* 41314 */ 0260,02,01,01,0106,0110,0,
+    /* 41321 */ 0261,02,05,01,0106,0120,0,
+    /* 41328 */ 0260,02,05,01,0106,0110,0,
+    /* 41335 */ 0261,02,01,01,0105,0120,0,
+    /* 41342 */ 0260,02,01,01,0105,0110,0,
+    /* 41349 */ 0261,02,021,01,0105,0120,0,
+    /* 41356 */ 0260,02,021,01,0105,0110,0,
+    /* 41363 */ 0261,02,05,01,0105,0120,0,
+    /* 41370 */ 0260,02,05,01,0105,0110,0,
+    /* 41377 */ 0261,02,025,01,0105,0120,0,
+    /* 41384 */ 0260,02,025,01,0105,0110,0,
+    /* 41391 */ 0261,02,0,01,0362,0120,0,
+    /* 41398 */ 0261,02,020,01,0362,0120,0,
+    /* 41405 */ 0262,02,0,01,0367,0110,0,
+    /* 41412 */ 0262,02,020,01,0367,0110,0,
+    /* 41419 */ 0260,0111,0,01,02,0216,0,
+    /* 41426 */ 0260,0111,020,01,02,0216,0,
+    /* 41433 */ 0260,0111,0,01,01,0215,0,
+    /* 41440 */ 0260,0111,020,01,01,0215,0,
+    /* 41447 */ 0260,02,0,01,0363,0213,0,
+    /* 41454 */ 0260,02,020,01,0363,0213,0,
+    /* 41461 */ 0260,0111,0,01,01,0216,0,
+    /* 41468 */ 0260,0111,020,01,01,0216,0,
+    /* 41475 */ 0260,0111,0,01,01,0211,0,
+    /* 41482 */ 0260,0111,020,01,01,0211,0,
+    /* 41489 */ 0260,0111,0,01,01,0212,0,
+    /* 41496 */ 0260,0111,020,01,01,0212,0,
+    /* 41503 */ 0260,0111,0,01,02,0211,0,
+    /* 41510 */ 0260,0111,020,01,02,0211,0,
+    /* 41517 */ 0260,02,0,01,0363,0212,0,
+    /* 41524 */ 0260,02,020,01,0363,0212,0,
+    /* 41531 */ 0260,02,0,01,0363,0211,0,
+    /* 41538 */ 0260,02,020,01,0363,0211,0,
+    /* 41545 */ 0260,0111,0,01,01,0213,0,
+    /* 41552 */ 0260,0111,020,01,01,0213,0,
+    /* 41559 */ 0262,02,0,01,0365,0110,0,
+    /* 41566 */ 0262,02,020,01,0365,0110,0,
+    /* 41573 */ 0261,02,03,01,0366,0120,0,
+    /* 41580 */ 0261,02,023,01,0366,0120,0,
+    /* 41587 */ 0261,02,03,01,0365,0120,0,
+    /* 41594 */ 0261,02,023,01,0365,0120,0,
+    /* 41601 */ 0261,02,02,01,0365,0120,0,
+    /* 41608 */ 0261,02,022,01,0365,0120,0,
+    /* 41615 */ 0262,02,02,01,0367,0110,0,
+    /* 41622 */ 0262,02,022,01,0367,0110,0,
+    /* 41629 */ 0262,02,01,01,0367,0110,0,
+    /* 41636 */ 0262,02,021,01,0367,0110,0,
+    /* 41643 */ 0262,02,03,01,0367,0110,0,
+    /* 41650 */ 0262,02,023,01,0367,0110,0,
+    /* 41657 */ 0320,0333,02,017,0274,0110,0,
+    /* 41664 */ 0321,0333,02,017,0274,0110,0,
+    /* 41671 */ 0324,0333,02,017,0274,0110,0,
+    /* 41678 */ 0260,0111,0,01,01,0214,0,
+    /* 41685 */ 0260,0111,020,01,01,0214,0,
+    /* 41692 */ 0260,0111,0,01,01,0217,0,
+    /* 41699 */ 0260,0111,020,01,01,0217,0,
+    /* 41706 */ 0323,0333,02,017,032,0110,0,
+    /* 41713 */ 0323,0332,02,017,032,0110,0,
+    /* 41720 */ 0323,0332,02,017,033,0110,0,
+    /* 41727 */ 03,017,072,0314,0110,022,0,
+    /* 41734 */ 0270,02,07,01,0314,0110,0,
+    /* 41741 */ 0270,02,07,01,0315,0110,0,
+    /* 41748 */ 0261,02,07,01,0313,0120,0,
+    /* 41755 */ 0261,02,0,01,0332,0120,0,
+    /* 41762 */ 0261,02,01,01,0332,0120,0,
+    /* 41769 */ 0261,02,02,01,0332,0120,0,
+    /* 41776 */ 0261,02,06,01,0332,0120,0,
+    /* 41783 */ 0261,02,03,01,0332,0120,0,
+    /* 41790 */ 0261,02,07,01,0332,0120,0,
+    /* 41797 */ 0270,02,02,01,0261,0110,0,
+    /* 41804 */ 0270,02,06,01,0261,0110,0,
+    /* 41811 */ 0270,02,01,01,0261,0110,0,
+    /* 41818 */ 0270,02,05,01,0261,0110,0,
+    /* 41825 */ 0270,02,02,01,0260,0110,0,
+    /* 41832 */ 0270,02,06,01,0260,0110,0,
+    /* 41839 */ 0270,02,01,01,0260,0110,0,
+    /* 41846 */ 0270,02,05,01,0260,0110,0,
+    /* 41853 */ 0270,02,03,01,0260,0110,0,
+    /* 41860 */ 0270,02,07,01,0260,0110,0,
+    /* 41867 */ 0270,02,0,01,0260,0110,0,
+    /* 41874 */ 0270,02,04,01,0260,0110,0,
+    /* 41881 */ 0270,02,02,01,0162,0110,0,
+    /* 41888 */ 0270,02,06,01,0162,0110,0,
+    /* 41895 */ 0261,02,03,01,0120,0120,0,
+    /* 41902 */ 0261,02,07,01,0120,0120,0,
+    /* 41909 */ 0261,02,03,01,0121,0120,0,
+    /* 41916 */ 0261,02,07,01,0121,0120,0,
+    /* 41923 */ 0261,02,02,01,0120,0120,0,
+    /* 41930 */ 0261,02,06,01,0120,0120,0,
+    /* 41937 */ 0261,02,02,01,0121,0120,0,
+    /* 41944 */ 0261,02,06,01,0121,0120,0,
+    /* 41951 */ 0261,02,0,01,0120,0120,0,
+    /* 41958 */ 0261,02,04,01,0120,0120,0,
+    /* 41965 */ 0261,02,0,01,0121,0120,0,
+    /* 41972 */ 0261,02,04,01,0121,0120,0,
+    /* 41979 */ 0261,02,021,01,0265,0120,0,
+    /* 41986 */ 0261,02,025,01,0265,0120,0,
+    /* 41993 */ 0261,02,021,01,0264,0120,0,
+    /* 42000 */ 0261,02,025,01,0264,0120,0,
+    /* 42007 */ 0261,01,05,01,0112,0120,0,
+    /* 42014 */ 0261,01,025,01,0112,0120,0,
+    /* 42021 */ 0261,01,024,01,0112,0120,0,
+    /* 42028 */ 0261,01,04,01,0112,0120,0,
+    /* 42035 */ 0261,01,05,01,0101,0120,0,
+    /* 42042 */ 0261,01,025,01,0101,0120,0,
+    /* 42049 */ 0261,01,05,01,0102,0120,0,
+    /* 42056 */ 0261,01,025,01,0102,0120,0,
+    /* 42063 */ 0261,01,024,01,0102,0120,0,
+    /* 42070 */ 0261,01,04,01,0102,0120,0,
+    /* 42077 */ 0261,01,024,01,0101,0120,0,
+    /* 42084 */ 0261,01,04,01,0101,0120,0,
+    /* 42091 */ 0270,01,01,01,0220,0110,0,
+    /* 42098 */ 0270,01,01,01,0221,0101,0,
+    /* 42105 */ 0270,01,01,01,0222,0110,0,
+    /* 42112 */ 0270,01,01,01,0223,0110,0,
+    /* 42119 */ 0270,01,021,01,0220,0110,0,
+    /* 42126 */ 0270,01,021,01,0221,0101,0,
+    /* 42133 */ 0270,01,03,01,0222,0110,0,
+    /* 42140 */ 0270,01,03,01,0223,0110,0,
+    /* 42147 */ 0270,01,020,01,0220,0110,0,
+    /* 42154 */ 0270,01,020,01,0221,0101,0,
+    /* 42161 */ 0270,01,023,01,0222,0110,0,
+    /* 42168 */ 0270,01,023,01,0223,0110,0,
+    /* 42175 */ 0270,01,0,01,0220,0110,0,
+    /* 42182 */ 0270,01,0,01,0221,0101,0,
+    /* 42189 */ 0270,01,0,01,0222,0110,0,
+    /* 42196 */ 0270,01,0,01,0223,0110,0,
+    /* 42203 */ 0270,01,01,01,0104,0110,0,
+    /* 42210 */ 0270,01,021,01,0104,0110,0,
+    /* 42217 */ 0270,01,020,01,0104,0110,0,
+    /* 42224 */ 0270,01,0,01,0104,0110,0,
+    /* 42231 */ 0261,01,05,01,0105,0120,0,
+    /* 42238 */ 0261,01,025,01,0105,0120,0,
+    /* 42245 */ 0261,01,024,01,0105,0120,0,
+    /* 42252 */ 0261,01,04,01,0105,0120,0,
+    /* 42259 */ 0270,01,01,01,0230,0110,0,
+    /* 42266 */ 0270,01,021,01,0230,0110,0,
+    /* 42273 */ 0270,01,020,01,0230,0110,0,
+    /* 42280 */ 0270,01,0,01,0230,0110,0,
+    /* 42287 */ 0270,01,01,01,0231,0110,0,
+    /* 42294 */ 0270,01,021,01,0231,0110,0,
+    /* 42301 */ 0270,01,020,01,0231,0110,0,
+    /* 42308 */ 0270,01,0,01,0231,0110,0,
+    /* 42315 */ 0261,01,05,01,0113,0120,0,
+    /* 42322 */ 0261,01,024,01,0113,0120,0,
+    /* 42329 */ 0261,01,04,01,0113,0120,0,
+    /* 42336 */ 0261,01,05,01,0106,0120,0,
+    /* 42343 */ 0261,01,025,01,0106,0120,0,
+    /* 42350 */ 0261,01,024,01,0106,0120,0,
+    /* 42357 */ 0261,01,04,01,0106,0120,0,
+    /* 42364 */ 0261,01,05,01,0107,0120,0,
+    /* 42371 */ 0261,01,025,01,0107,0120,0,
+    /* 42378 */ 0261,01,024,01,0107,0120,0,
+    /* 42385 */ 0261,01,04,01,0107,0120,0,
+    /* 42392 */ 0323,0333,02,017,0307,0207,0,
+    /* 42399 */ 0324,0333,02,017,0256,0204,0,
+    /* 42406 */ 0360,03,017,070,0371,0101,0,
+    /* 42413 */ 0324,03,017,070,0371,0101,0,
+    /* 42420 */ 0310,0333,02,017,0256,0206,0,
+    /* 42427 */ 0311,0333,02,017,0256,0206,0,
+    /* 42434 */ 0361,03,017,070,0317,0110,0,
+    /* 42441 */ 0261,02,01,01,0317,0120,0,
+    /* 42448 */ 0260,02,01,01,0317,0110,0,
+    /* 42455 */ 0261,02,05,01,0317,0120,0,
+    /* 42462 */ 0260,02,05,01,0317,0110,0,
+    /* 42469 */ 0321,0333,02,017,0256,0205,0,
+    /* 42476 */ 0324,0333,02,017,0256,0205,0,
+    /* 42483 */ 0321,0333,02,017,036,0201,0,
+    /* 42490 */ 0324,0333,02,017,036,0201,0,
+    /* 42497 */ 0321,03,017,070,0366,0101,0,
+    /* 42504 */ 0324,03,017,070,0366,0101,0,
+    /* 42511 */ 0270,02,0,01,0111,0200,0,
+    /* 42518 */ 0270,02,01,01,0111,0200,0,
+    /* 42525 */ 0262,02,02,01,0134,0110,0,
+    /* 42532 */ 0262,02,03,01,0136,0110,0,
+    /* 42539 */ 0262,02,02,01,0136,0110,0,
+    /* 42546 */ 0262,02,01,01,0136,0110,0,
+    /* 42553 */ 0262,02,0,01,0136,0110,0,
+    /* 42560 */ 0270,02,03,01,0113,0110,0,
+    /* 42567 */ 0270,02,01,01,0113,0110,0,
+    /* 42574 */ 0270,02,0,02,0111,0300,0,
+    /* 42581 */ 0270,02,02,01,0113,0101,0,
+    /* 42588 */ 0323,0333,02,017,0307,0206,0,
+    /* 42595 */ 0262,02,01,01,0347,0101,0,
+    /* 42602 */ 0262,02,01,01,0343,0101,0,
+    /* 42609 */ 0262,02,01,01,0342,0101,0,
+    /* 42616 */ 0262,02,01,01,0346,0101,0,
+    /* 42623 */ 0262,02,01,01,0344,0101,0,
+    /* 42630 */ 0262,02,01,01,0357,0101,0,
+    /* 42637 */ 0262,02,01,01,0355,0101,0,
+    /* 42644 */ 0262,02,01,01,0354,0101,0,
+    /* 42651 */ 0262,02,01,01,0356,0101,0,
+    /* 42658 */ 0262,02,01,01,0345,0101,0,
+    /* 42665 */ 0262,02,01,01,0341,0101,0,
+    /* 42672 */ 0262,02,01,01,0353,0101,0,
+    /* 42679 */ 0262,02,01,01,0351,0101,0,
+    /* 42686 */ 0262,02,01,01,0340,0101,0,
+    /* 42693 */ 0262,02,01,01,0352,0101,0,
+    /* 42700 */ 0262,02,01,01,0350,0101,0,
+    /* 42707 */ 0262,02,021,01,0347,0101,0,
+    /* 42714 */ 0262,02,021,01,0343,0101,0,
+    /* 42721 */ 0262,02,021,01,0342,0101,0,
+    /* 42728 */ 0262,02,021,01,0346,0101,0,
+    /* 42735 */ 0262,02,021,01,0344,0101,0,
+    /* 42742 */ 0262,02,021,01,0357,0101,0,
+    /* 42749 */ 0262,02,021,01,0355,0101,0,
+    /* 42756 */ 0262,02,021,01,0354,0101,0,
+    /* 42763 */ 0262,02,021,01,0356,0101,0,
+    /* 42770 */ 0262,02,021,01,0345,0101,0,
+    /* 42777 */ 0262,02,021,01,0341,0101,0,
+    /* 42784 */ 0262,02,021,01,0353,0101,0,
+    /* 42791 */ 0262,02,021,01,0351,0101,0,
+    /* 42798 */ 0262,02,021,01,0340,0101,0,
+    /* 42805 */ 0262,02,021,01,0352,0101,0,
+    /* 42812 */ 0262,02,021,01,0350,0101,0,
+    /* 42819 */ 0323,0332,02,017,0,0206,0,
+    /* 42826 */ 0324,0332,02,017,0,0206,0,
+    /* 42833 */ 0273,0320,01,021,0101,0,
+    /* 42839 */ 0273,0321,01,021,0101,0,
+    /* 42845 */ 0273,0324,01,021,0101,0,
+    /* 42851 */ 0273,01,0200,0202,021,0,
+    /* 42857 */ 0273,01,0202,0202,021,0,
+    /* 42863 */ 0273,0320,01,01,0101,0,
+    /* 42869 */ 0273,0321,01,01,0101,0,
+    /* 42875 */ 0273,0324,01,01,0101,0,
+    /* 42881 */ 0273,01,0200,0200,021,0,
+    /* 42887 */ 0273,01,0202,0200,021,0,
+    /* 42893 */ 0273,0320,01,041,0101,0,
+    /* 42899 */ 0273,0321,01,041,0101,0,
+    /* 42905 */ 0273,0324,01,041,0101,0,
+    /* 42911 */ 0273,01,0200,0204,021,0,
+    /* 42917 */ 0273,01,0202,0204,021,0,
+    /* 42923 */ 0321,01,017,010,0310,0,
+    /* 42929 */ 0324,01,017,010,0310,0,
+    /* 42935 */ 0320,02,017,0243,0101,0,
+    /* 42941 */ 0321,02,017,0243,0101,0,
+    /* 42947 */ 0324,02,017,0243,0101,0,
+    /* 42953 */ 0322,01,0232,034,074,0,
+    /* 42959 */ 0320,01,0232,034,074,0,
+    /* 42965 */ 0321,01,0232,034,074,0,
+    /* 42971 */ 0322,01,0232,035,030,0,
+    /* 42977 */ 0320,01,0232,031,030,0,
+    /* 42983 */ 0321,01,0232,041,030,0,
+    /* 42989 */ 0320,01,0203,0207,0275,0,
+    /* 42995 */ 0321,01,0203,0207,0275,0,
+    /* 43001 */ 0324,01,0203,0207,0275,0,
+    /* 43007 */ 0320,01,0201,0207,031,0,
+    /* 43013 */ 0321,01,0201,0207,041,0,
+    /* 43019 */ 0324,01,0201,0207,0255,0,
+    /* 43025 */ 0273,02,017,0260,0101,0,
+    /* 43031 */ 0320,02,017,0247,0101,0,
+    /* 43037 */ 0321,02,017,0247,0101,0,
+    /* 43043 */ 0324,02,017,0307,0201,0,
+    /* 43049 */ 0273,0320,01,0377,0201,0,
+    /* 43055 */ 0273,0321,01,0377,0201,0,
+    /* 43061 */ 0273,0324,01,0377,0201,0,
+    /* 43067 */ 0320,02,017,0257,0110,0,
+    /* 43073 */ 0321,02,017,0257,0110,0,
+    /* 43079 */ 0324,02,017,0257,0110,0,
+    /* 43085 */ 0320,01,0153,0110,0276,0,
+    /* 43091 */ 0320,01,0151,0110,032,0,
+    /* 43097 */ 0321,01,0153,0110,0276,0,
+    /* 43103 */ 0321,01,0151,0110,042,0,
+    /* 43109 */ 0324,01,0153,0110,0276,0,
+    /* 43115 */ 0324,01,0151,0110,042,0,
+    /* 43121 */ 0324,01,0151,0110,0256,0,
+    /* 43127 */ 0320,01,0153,0100,0275,0,
+    /* 43133 */ 0320,01,0151,0100,031,0,
+    /* 43139 */ 0321,01,0153,0100,0275,0,
+    /* 43145 */ 0321,01,0151,0100,041,0,
+    /* 43151 */ 0324,01,0153,0100,0275,0,
+    /* 43157 */ 0324,01,0151,0100,0255,0,
+    /* 43163 */ 0273,0320,01,0377,0200,0,
+    /* 43169 */ 0273,0321,01,0377,0200,0,
+    /* 43175 */ 0273,0324,01,0377,0200,0,
+    /* 43181 */ 0310,03,017,01,0337,0,
+    /* 43187 */ 0311,03,017,01,0337,0,
+    /* 43193 */ 0323,0313,01,0343,050,0,
+    /* 43199 */ 0322,01,0352,034,074,0,
+    /* 43205 */ 0320,01,0352,034,074,0,
+    /* 43211 */ 0321,01,0352,034,074,0,
+    /* 43217 */ 0322,01,0352,035,030,0,
+    /* 43223 */ 0320,01,0352,031,030,0,
+    /* 43229 */ 0321,01,0352,041,030,0,
+    /* 43235 */ 0322,02,017,0270,064,0,
+    /* 43241 */ 0320,02,017,0270,064,0,
+    /* 43247 */ 0321,02,017,0270,064,0,
+    /* 43253 */ 0320,02,017,0,0206,0,
+    /* 43259 */ 0321,02,017,0,0206,0,
+    /* 43265 */ 0320,02,017,02,0110,0,
+    /* 43271 */ 0321,02,017,02,0110,0,
+    /* 43277 */ 0324,02,017,02,0110,0,
+    /* 43283 */ 0360,03,017,0256,0350,0,
+    /* 43289 */ 0320,02,017,0264,0110,0,
+    /* 43295 */ 0321,02,017,0264,0110,0,
+    /* 43301 */ 0324,02,017,0264,0110,0,
+    /* 43307 */ 0320,02,017,0265,0110,0,
+    /* 43313 */ 0321,02,017,0265,0110,0,
+    /* 43319 */ 0324,02,017,0265,0110,0,
+    /* 43325 */ 0320,02,017,03,0110,0,
+    /* 43331 */ 0321,02,017,03,0110,0,
+    /* 43337 */ 0324,02,017,03,0110,0,
+    /* 43343 */ 0320,02,017,0262,0110,0,
+    /* 43349 */ 0321,02,017,0262,0110,0,
+    /* 43355 */ 0324,02,017,0262,0110,0,
+    /* 43361 */ 0360,03,017,0256,0360,0,
+    /* 43367 */ 0334,02,017,040,0101,0,
+    /* 43373 */ 0323,02,017,040,0101,0,
+    /* 43379 */ 0334,02,017,042,0110,0,
+    /* 43385 */ 0323,02,017,042,0110,0,
+    /* 43391 */ 0323,02,017,041,0101,0,
+    /* 43397 */ 0323,02,017,043,0110,0,
+    /* 43403 */ 0271,0320,01,0211,0101,0,
+    /* 43409 */ 0271,0321,01,0211,0101,0,
+    /* 43415 */ 0271,0324,01,0211,0101,0,
+    /* 43421 */ 0271,01,0306,0200,021,0,
+    /* 43427 */ 0360,02,017,0156,0110,0,
+    /* 43433 */ 0360,02,017,0176,0101,0,
+    /* 43439 */ 0360,02,017,0157,0110,0,
+    /* 43445 */ 0360,02,017,0177,0101,0,
+    /* 43451 */ 0320,02,017,0276,0110,0,
+    /* 43457 */ 0321,02,017,0276,0110,0,
+    /* 43463 */ 0321,02,017,0277,0110,0,
+    /* 43469 */ 0324,02,017,0276,0110,0,
+    /* 43475 */ 0324,02,017,0277,0110,0,
+    /* 43481 */ 0320,02,017,0266,0110,0,
+    /* 43487 */ 0321,02,017,0266,0110,0,
+    /* 43493 */ 0321,02,017,0267,0110,0,
+    /* 43499 */ 0324,02,017,0266,0110,0,
+    /* 43505 */ 0324,02,017,0267,0110,0,
+    /* 43511 */ 0273,0320,01,0367,0203,0,
+    /* 43517 */ 0273,0321,01,0367,0203,0,
+    /* 43523 */ 0273,0324,01,0367,0203,0,
+    /* 43529 */ 0320,02,017,037,0200,0,
+    /* 43535 */ 0321,02,017,037,0200,0,
+    /* 43541 */ 0324,02,017,037,0200,0,
+    /* 43547 */ 0273,0320,01,0367,0202,0,
+    /* 43553 */ 0273,0321,01,0367,0202,0,
+    /* 43559 */ 0273,0324,01,0367,0202,0,
+    /* 43565 */ 0273,0320,01,011,0101,0,
+    /* 43571 */ 0273,0321,01,011,0101,0,
+    /* 43577 */ 0273,0324,01,011,0101,0,
+    /* 43583 */ 0273,01,0200,0201,021,0,
+    /* 43589 */ 0273,01,0202,0201,021,0,
+    /* 43595 */ 0323,02,017,0121,0110,0,
+    /* 43601 */ 0323,02,017,0120,0110,0,
+    /* 43607 */ 0323,02,017,0122,0110,0,
+    /* 43613 */ 0323,02,017,0135,0110,0,
+    /* 43619 */ 0323,02,017,0131,0110,0,
+    /* 43625 */ 0323,02,017,0125,0110,0,
+    /* 43631 */ 0320,01,0301,0202,025,0,
+    /* 43637 */ 0321,01,0301,0202,025,0,
+    /* 43643 */ 0324,01,0301,0202,025,0,
+    /* 43649 */ 0320,01,0301,0203,025,0,
+    /* 43655 */ 0321,01,0301,0203,025,0,
+    /* 43661 */ 0324,01,0301,0203,025,0,
+    /* 43667 */ 0321,02,017,066,0200,0,
+    /* 43673 */ 0320,01,0301,0200,025,0,
+    /* 43679 */ 0321,01,0301,0200,025,0,
+    /* 43685 */ 0324,01,0301,0200,025,0,
+    /* 43691 */ 0320,01,0301,0201,025,0,
+    /* 43697 */ 0321,01,0301,0201,025,0,
+    /* 43703 */ 0324,01,0301,0201,025,0,
+    /* 43709 */ 0320,01,0301,0204,025,0,
+    /* 43715 */ 0321,01,0301,0204,025,0,
+    /* 43721 */ 0324,01,0301,0204,025,0,
+    /* 43727 */ 0320,01,0301,0207,025,0,
+    /* 43733 */ 0321,01,0301,0207,025,0,
+    /* 43739 */ 0324,01,0301,0207,025,0,
+    /* 43745 */ 0273,0320,01,031,0101,0,
+    /* 43751 */ 0273,0321,01,031,0101,0,
+    /* 43757 */ 0273,0324,01,031,0101,0,
+    /* 43763 */ 0273,01,0200,0203,021,0,
+    /* 43769 */ 0273,01,0202,0203,021,0,
+    /* 43775 */ 0360,03,017,0256,0370,0,
+    /* 43781 */ 0320,02,017,0245,0101,0,
+    /* 43787 */ 0321,02,017,0245,0101,0,
+    /* 43793 */ 0324,02,017,0245,0101,0,
+    /* 43799 */ 0320,01,0301,0205,025,0,
+    /* 43805 */ 0321,01,0301,0205,025,0,
+    /* 43811 */ 0324,01,0301,0205,025,0,
+    /* 43817 */ 0320,02,017,0255,0101,0,
+    /* 43823 */ 0321,02,017,0255,0101,0,
+    /* 43829 */ 0324,02,017,0255,0101,0,
+    /* 43835 */ 0320,02,017,0,0200,0,
+    /* 43841 */ 0321,02,017,0,0200,0,
+    /* 43847 */ 0323,02,017,0,0200,0,
+    /* 43853 */ 0324,02,017,0,0200,0,
+    /* 43859 */ 0320,02,017,01,0204,0,
+    /* 43865 */ 0321,02,017,01,0204,0,
+    /* 43871 */ 0324,02,017,01,0204,0,
+    /* 43877 */ 0320,02,017,0,0201,0,
+    /* 43883 */ 0321,02,017,0,0201,0,
+    /* 43889 */ 0324,02,017,0,0201,0,
+    /* 43895 */ 0273,0320,01,051,0101,0,
+    /* 43901 */ 0273,0321,01,051,0101,0,
+    /* 43907 */ 0273,0324,01,051,0101,0,
+    /* 43913 */ 0273,01,0200,0205,021,0,
+    /* 43919 */ 0273,01,0202,0205,021,0,
+    /* 43925 */ 0320,01,0367,0200,031,0,
+    /* 43931 */ 0321,01,0367,0200,041,0,
+    /* 43937 */ 0324,01,0367,0200,0255,0,
+    /* 43943 */ 0320,02,017,0377,0110,0,
+    /* 43949 */ 0321,02,017,0377,0110,0,
+    /* 43955 */ 0324,02,017,0377,0110,0,
+    /* 43961 */ 0320,02,017,0271,0110,0,
+    /* 43967 */ 0321,02,017,0271,0110,0,
+    /* 43973 */ 0324,02,017,0271,0110,0,
+    /* 43979 */ 0360,02,017,020,0101,0,
+    /* 43985 */ 0360,02,017,022,0110,0,
+    /* 43991 */ 0321,02,017,067,0200,0,
+    /* 43997 */ 0273,02,017,0300,0101,0,
+    /* 44003 */ 0320,02,017,0246,0110,0,
+    /* 44009 */ 0321,02,017,0246,0110,0,
+    /* 44015 */ 0272,0320,01,0207,0101,0,
+    /* 44021 */ 0272,0321,01,0207,0101,0,
+    /* 44027 */ 0272,0324,01,0207,0101,0,
+    /* 44033 */ 0272,0320,01,0207,0110,0,
+    /* 44039 */ 0272,0321,01,0207,0110,0,
+    /* 44045 */ 0272,0324,01,0207,0110,0,
+    /* 44051 */ 0273,0320,01,061,0101,0,
+    /* 44057 */ 0273,0321,01,061,0101,0,
+    /* 44063 */ 0273,0324,01,061,0101,0,
+    /* 44069 */ 0273,01,0200,0206,021,0,
+    /* 44075 */ 0273,01,0202,0206,021,0,
+    /* 44081 */ 0320,02,017,0107,0110,0,
+    /* 44087 */ 0320,02,017,0103,0110,0,
+    /* 44093 */ 0320,02,017,0102,0110,0,
+    /* 44099 */ 0320,02,017,0106,0110,0,
+    /* 44105 */ 0320,02,017,0104,0110,0,
+    /* 44111 */ 0320,02,017,0117,0110,0,
+    /* 44117 */ 0320,02,017,0115,0110,0,
+    /* 44123 */ 0320,02,017,0114,0110,0,
+    /* 44129 */ 0320,02,017,0116,0110,0,
+    /* 44135 */ 0320,02,017,0105,0110,0,
+    /* 44141 */ 0320,02,017,0101,0110,0,
+    /* 44147 */ 0320,02,017,0113,0110,0,
+    /* 44153 */ 0320,02,017,0111,0110,0,
+    /* 44159 */ 0320,02,017,0100,0110,0,
+    /* 44165 */ 0320,02,017,0112,0110,0,
+    /* 44171 */ 0320,02,017,0110,0110,0,
+    /* 44177 */ 0321,02,017,0107,0110,0,
+    /* 44183 */ 0321,02,017,0103,0110,0,
+    /* 44189 */ 0321,02,017,0102,0110,0,
+    /* 44195 */ 0321,02,017,0106,0110,0,
+    /* 44201 */ 0321,02,017,0104,0110,0,
+    /* 44207 */ 0321,02,017,0117,0110,0,
+    /* 44213 */ 0321,02,017,0115,0110,0,
+    /* 44219 */ 0321,02,017,0114,0110,0,
+    /* 44225 */ 0321,02,017,0116,0110,0,
+    /* 44231 */ 0321,02,017,0105,0110,0,
+    /* 44237 */ 0321,02,017,0101,0110,0,
+    /* 44243 */ 0321,02,017,0113,0110,0,
+    /* 44249 */ 0321,02,017,0111,0110,0,
+    /* 44255 */ 0321,02,017,0100,0110,0,
+    /* 44261 */ 0321,02,017,0112,0110,0,
+    /* 44267 */ 0321,02,017,0110,0110,0,
+    /* 44273 */ 0324,02,017,0107,0110,0,
+    /* 44279 */ 0324,02,017,0103,0110,0,
+    /* 44285 */ 0324,02,017,0102,0110,0,
+    /* 44291 */ 0324,02,017,0106,0110,0,
+    /* 44297 */ 0324,02,017,0104,0110,0,
+    /* 44303 */ 0324,02,017,0117,0110,0,
+    /* 44309 */ 0324,02,017,0115,0110,0,
+    /* 44315 */ 0324,02,017,0114,0110,0,
+    /* 44321 */ 0324,02,017,0116,0110,0,
+    /* 44327 */ 0324,02,017,0105,0110,0,
+    /* 44333 */ 0324,02,017,0101,0110,0,
+    /* 44339 */ 0324,02,017,0113,0110,0,
+    /* 44345 */ 0324,02,017,0111,0110,0,
+    /* 44351 */ 0324,02,017,0100,0110,0,
+    /* 44357 */ 0324,02,017,0112,0110,0,
+    /* 44363 */ 0324,02,017,0110,0110,0,
+    /* 44369 */ 0322,02,017,0207,064,0,
+    /* 44375 */ 0322,02,017,0203,064,0,
+    /* 44381 */ 0322,02,017,0202,064,0,
+    /* 44387 */ 0322,02,017,0206,064,0,
+    /* 44393 */ 0322,02,017,0204,064,0,
+    /* 44399 */ 0322,02,017,0217,064,0,
+    /* 44405 */ 0322,02,017,0215,064,0,
+    /* 44411 */ 0322,02,017,0214,064,0,
+    /* 44417 */ 0322,02,017,0216,064,0,
+    /* 44423 */ 0322,02,017,0205,064,0,
+    /* 44429 */ 0322,02,017,0201,064,0,
+    /* 44435 */ 0322,02,017,0213,064,0,
+    /* 44441 */ 0322,02,017,0211,064,0,
+    /* 44447 */ 0322,02,017,0200,064,0,
+    /* 44453 */ 0322,02,017,0212,064,0,
+    /* 44459 */ 0322,02,017,0210,064,0,
+    /* 44465 */ 0320,02,017,0207,064,0,
+    /* 44471 */ 0320,02,017,0203,064,0,
+    /* 44477 */ 0320,02,017,0202,064,0,
+    /* 44483 */ 0320,02,017,0206,064,0,
+    /* 44489 */ 0320,02,017,0204,064,0,
+    /* 44495 */ 0320,02,017,0217,064,0,
+    /* 44501 */ 0320,02,017,0215,064,0,
+    /* 44507 */ 0320,02,017,0214,064,0,
+    /* 44513 */ 0320,02,017,0216,064,0,
+    /* 44519 */ 0320,02,017,0205,064,0,
+    /* 44525 */ 0320,02,017,0201,064,0,
+    /* 44531 */ 0320,02,017,0213,064,0,
+    /* 44537 */ 0320,02,017,0211,064,0,
+    /* 44543 */ 0320,02,017,0200,064,0,
+    /* 44549 */ 0320,02,017,0212,064,0,
+    /* 44555 */ 0320,02,017,0210,064,0,
+    /* 44561 */ 0321,02,017,0207,064,0,
+    /* 44567 */ 0321,02,017,0203,064,0,
+    /* 44573 */ 0321,02,017,0202,064,0,
+    /* 44579 */ 0321,02,017,0206,064,0,
+    /* 44585 */ 0321,02,017,0204,064,0,
+    /* 44591 */ 0321,02,017,0217,064,0,
+    /* 44597 */ 0321,02,017,0215,064,0,
+    /* 44603 */ 0321,02,017,0214,064,0,
+    /* 44609 */ 0321,02,017,0216,064,0,
+    /* 44615 */ 0321,02,017,0205,064,0,
+    /* 44621 */ 0321,02,017,0201,064,0,
+    /* 44627 */ 0321,02,017,0213,064,0,
+    /* 44633 */ 0321,02,017,0211,064,0,
+    /* 44639 */ 0321,02,017,0200,064,0,
+    /* 44645 */ 0321,02,017,0212,064,0,
+    /* 44651 */ 0321,02,017,0210,064,0,
+    /* 44657 */ 0323,02,017,0207,064,0,
+    /* 44663 */ 0323,02,017,0203,064,0,
+    /* 44669 */ 0323,02,017,0202,064,0,
+    /* 44675 */ 0323,02,017,0206,064,0,
+    /* 44681 */ 0323,02,017,0204,064,0,
+    /* 44687 */ 0323,02,017,0217,064,0,
+    /* 44693 */ 0323,02,017,0215,064,0,
+    /* 44699 */ 0323,02,017,0214,064,0,
+    /* 44705 */ 0323,02,017,0216,064,0,
+    /* 44711 */ 0323,02,017,0205,064,0,
+    /* 44717 */ 0323,02,017,0201,064,0,
+    /* 44723 */ 0323,02,017,0213,064,0,
+    /* 44729 */ 0323,02,017,0211,064,0,
+    /* 44735 */ 0323,02,017,0200,064,0,
+    /* 44741 */ 0323,02,017,0212,064,0,
+    /* 44747 */ 0323,02,017,0210,064,0,
+    /* 44753 */ 0360,02,017,0130,0110,0,
+    /* 44759 */ 0333,02,017,0130,0110,0,
+    /* 44765 */ 0360,02,017,0125,0110,0,
+    /* 44771 */ 0360,02,017,0124,0110,0,
+    /* 44777 */ 0360,02,017,057,0110,0,
+    /* 44783 */ 0360,02,017,052,0110,0,
+    /* 44789 */ 0360,02,017,055,0110,0,
+    /* 44795 */ 0360,02,017,054,0110,0,
+    /* 44801 */ 0360,02,017,0136,0110,0,
+    /* 44807 */ 0333,02,017,0136,0110,0,
+    /* 44813 */ 0360,02,017,0256,0202,0,
+    /* 44819 */ 0360,02,017,0137,0110,0,
+    /* 44825 */ 0333,02,017,0137,0110,0,
+    /* 44831 */ 0360,02,017,0135,0110,0,
+    /* 44837 */ 0333,02,017,0135,0110,0,
+    /* 44843 */ 0360,02,017,050,0110,0,
+    /* 44849 */ 0360,02,017,051,0101,0,
+    /* 44855 */ 0360,02,017,026,0110,0,
+    /* 44861 */ 0360,02,017,027,0101,0,
+    /* 44867 */ 0360,02,017,023,0101,0,
+    /* 44873 */ 0360,02,017,0120,0110,0,
+    /* 44879 */ 0360,02,017,053,0101,0,
+    /* 44885 */ 0333,02,017,020,0110,0,
+    /* 44891 */ 0333,02,017,021,0101,0,
+    /* 44897 */ 0360,02,017,020,0110,0,
+    /* 44903 */ 0360,02,017,021,0101,0,
+    /* 44909 */ 0360,02,017,0131,0110,0,
+    /* 44915 */ 0333,02,017,0131,0110,0,
+    /* 44921 */ 0360,02,017,0126,0110,0,
+    /* 44927 */ 0360,02,017,0123,0110,0,
+    /* 44933 */ 0333,02,017,0123,0110,0,
+    /* 44939 */ 0360,02,017,0122,0110,0,
+    /* 44945 */ 0333,02,017,0122,0110,0,
+    /* 44951 */ 0360,02,017,0121,0110,0,
+    /* 44957 */ 0333,02,017,0121,0110,0,
+    /* 44963 */ 0360,02,017,0256,0203,0,
+    /* 44969 */ 0360,02,017,0134,0110,0,
+    /* 44975 */ 0333,02,017,0134,0110,0,
+    /* 44981 */ 0360,02,017,056,0110,0,
+    /* 44987 */ 0360,02,017,025,0110,0,
+    /* 44993 */ 0360,02,017,024,0110,0,
+    /* 44999 */ 0360,02,017,0127,0110,0,
+    /* 45005 */ 0360,02,017,0367,0110,0,
+    /* 45011 */ 0360,02,017,0347,0101,0,
+    /* 45017 */ 0360,02,017,0327,0110,0,
+    /* 45023 */ 0361,02,017,0367,0110,0,
+    /* 45029 */ 0360,02,017,0256,0207,0,
+    /* 45035 */ 0361,02,017,0347,0101,0,
+    /* 45041 */ 0361,02,017,053,0101,0,
+    /* 45047 */ 0361,02,017,0157,0110,0,
+    /* 45053 */ 0361,02,017,0177,0101,0,
+    /* 45059 */ 0333,02,017,0157,0110,0,
+    /* 45065 */ 0333,02,017,0177,0101,0,
+    /* 45071 */ 0332,02,017,0326,0110,0,
+    /* 45077 */ 0333,02,017,0176,0110,0,
+    /* 45083 */ 0361,02,017,0326,0101,0,
+    /* 45089 */ 0333,02,017,0326,0110,0,
+    /* 45095 */ 0361,02,017,0143,0110,0,
+    /* 45101 */ 0361,02,017,0153,0110,0,
+    /* 45107 */ 0361,02,017,0147,0110,0,
+    /* 45113 */ 0361,02,017,0374,0110,0,
+    /* 45119 */ 0361,02,017,0375,0110,0,
+    /* 45125 */ 0361,02,017,0376,0110,0,
+    /* 45131 */ 0360,02,017,0324,0110,0,
+    /* 45137 */ 0361,02,017,0324,0110,0,
+    /* 45143 */ 0361,02,017,0354,0110,0,
+    /* 45149 */ 0361,02,017,0355,0110,0,
+    /* 45155 */ 0361,02,017,0334,0110,0,
+    /* 45161 */ 0361,02,017,0335,0110,0,
+    /* 45167 */ 0361,02,017,0333,0110,0,
+    /* 45173 */ 0361,02,017,0337,0110,0,
+    /* 45179 */ 0361,02,017,0340,0110,0,
+    /* 45185 */ 0361,02,017,0343,0110,0,
+    /* 45191 */ 0361,02,017,0164,0110,0,
+    /* 45197 */ 0361,02,017,0165,0110,0,
+    /* 45203 */ 0361,02,017,0166,0110,0,
+    /* 45209 */ 0361,02,017,0144,0110,0,
+    /* 45215 */ 0361,02,017,0145,0110,0,
+    /* 45221 */ 0361,02,017,0146,0110,0,
+    /* 45227 */ 0361,02,017,0365,0110,0,
+    /* 45233 */ 0361,02,017,0356,0110,0,
+    /* 45239 */ 0361,02,017,0336,0110,0,
+    /* 45245 */ 0361,02,017,0352,0110,0,
+    /* 45251 */ 0361,02,017,0332,0110,0,
+    /* 45257 */ 0361,02,017,0327,0110,0,
+    /* 45263 */ 0361,02,017,0344,0110,0,
+    /* 45269 */ 0361,02,017,0345,0110,0,
+    /* 45275 */ 0361,02,017,0325,0110,0,
+    /* 45281 */ 0361,02,017,0364,0110,0,
+    /* 45287 */ 0361,02,017,0353,0110,0,
+    /* 45293 */ 0361,02,017,0366,0110,0,
+    /* 45299 */ 0361,02,017,0361,0110,0,
+    /* 45305 */ 0361,02,017,0362,0110,0,
+    /* 45311 */ 0361,02,017,0363,0110,0,
+    /* 45317 */ 0361,02,017,0341,0110,0,
+    /* 45323 */ 0361,02,017,0342,0110,0,
+    /* 45329 */ 0361,02,017,0321,0110,0,
+    /* 45335 */ 0361,02,017,0322,0110,0,
+    /* 45341 */ 0361,02,017,0323,0110,0,
+    /* 45347 */ 0361,02,017,0370,0110,0,
+    /* 45353 */ 0361,02,017,0371,0110,0,
+    /* 45359 */ 0361,02,017,0372,0110,0,
+    /* 45365 */ 0361,02,017,0373,0110,0,
+    /* 45371 */ 0361,02,017,0350,0110,0,
+    /* 45377 */ 0361,02,017,0351,0110,0,
+    /* 45383 */ 0361,02,017,0330,0110,0,
+    /* 45389 */ 0361,02,017,0331,0110,0,
+    /* 45395 */ 0361,02,017,0150,0110,0,
+    /* 45401 */ 0361,02,017,0151,0110,0,
+    /* 45407 */ 0361,02,017,0152,0110,0,
+    /* 45413 */ 0361,02,017,0155,0110,0,
+    /* 45419 */ 0361,02,017,0140,0110,0,
+    /* 45425 */ 0361,02,017,0141,0110,0,
+    /* 45431 */ 0361,02,017,0142,0110,0,
+    /* 45437 */ 0361,02,017,0154,0110,0,
+    /* 45443 */ 0361,02,017,0357,0110,0,
+    /* 45449 */ 0361,02,017,0130,0110,0,
+    /* 45455 */ 0332,02,017,0130,0110,0,
+    /* 45461 */ 0361,02,017,0125,0110,0,
+    /* 45467 */ 0361,02,017,0124,0110,0,
+    /* 45473 */ 0361,02,017,057,0110,0,
+    /* 45479 */ 0333,02,017,0346,0110,0,
+    /* 45485 */ 0360,02,017,0133,0110,0,
+    /* 45491 */ 0332,02,017,0346,0110,0,
+    /* 45497 */ 0361,02,017,055,0110,0,
+    /* 45503 */ 0361,02,017,0132,0110,0,
+    /* 45509 */ 0361,02,017,052,0110,0,
+    /* 45515 */ 0361,02,017,0133,0110,0,
+    /* 45521 */ 0360,02,017,0132,0110,0,
+    /* 45527 */ 0332,02,017,0132,0110,0,
+    /* 45533 */ 0333,02,017,0132,0110,0,
+    /* 45539 */ 0361,02,017,054,0110,0,
+    /* 45545 */ 0361,02,017,0346,0110,0,
+    /* 45551 */ 0333,02,017,0133,0110,0,
+    /* 45557 */ 0361,02,017,0136,0110,0,
+    /* 45563 */ 0332,02,017,0136,0110,0,
+    /* 45569 */ 0361,02,017,0137,0110,0,
+    /* 45575 */ 0332,02,017,0137,0110,0,
+    /* 45581 */ 0361,02,017,0135,0110,0,
+    /* 45587 */ 0332,02,017,0135,0110,0,
+    /* 45593 */ 0361,02,017,050,0110,0,
+    /* 45599 */ 0361,02,017,051,0101,0,
+    /* 45605 */ 0361,02,017,027,0101,0,
+    /* 45611 */ 0361,02,017,026,0110,0,
+    /* 45617 */ 0361,02,017,023,0101,0,
+    /* 45623 */ 0361,02,017,022,0110,0,
+    /* 45629 */ 0361,02,017,0120,0110,0,
+    /* 45635 */ 0332,02,017,020,0110,0,
+    /* 45641 */ 0332,02,017,021,0101,0,
+    /* 45647 */ 0361,02,017,020,0110,0,
+    /* 45653 */ 0361,02,017,021,0101,0,
+    /* 45659 */ 0361,02,017,0131,0110,0,
+    /* 45665 */ 0332,02,017,0131,0110,0,
+    /* 45671 */ 0361,02,017,0126,0110,0,
+    /* 45677 */ 0361,02,017,0121,0110,0,
+    /* 45683 */ 0332,02,017,0121,0110,0,
+    /* 45689 */ 0361,02,017,0134,0110,0,
+    /* 45695 */ 0332,02,017,0134,0110,0,
+    /* 45701 */ 0361,02,017,056,0110,0,
+    /* 45707 */ 0361,02,017,025,0110,0,
+    /* 45713 */ 0361,02,017,024,0110,0,
+    /* 45719 */ 0361,02,017,0127,0110,0,
+    /* 45725 */ 0361,02,017,0320,0110,0,
+    /* 45731 */ 0332,02,017,0320,0110,0,
+    /* 45737 */ 0361,02,017,0174,0110,0,
+    /* 45743 */ 0332,02,017,0174,0110,0,
+    /* 45749 */ 0361,02,017,0175,0110,0,
+    /* 45755 */ 0332,02,017,0175,0110,0,
+    /* 45761 */ 0332,02,017,0360,0110,0,
+    /* 45767 */ 0332,02,017,022,0110,0,
+    /* 45773 */ 0333,02,017,026,0110,0,
+    /* 45779 */ 0333,02,017,022,0110,0,
+    /* 45785 */ 0361,02,017,0307,0206,0,
+    /* 45791 */ 0360,02,017,0307,0206,0,
+    /* 45797 */ 0360,02,017,0307,0207,0,
+    /* 45803 */ 0332,03,017,01,0377,0,
+    /* 45809 */ 0333,03,017,01,0376,0,
+    /* 45815 */ 0332,03,017,01,0301,0,
+    /* 45821 */ 0333,03,017,01,0301,0,
+    /* 45827 */ 0361,02,017,0171,0110,0,
+    /* 45833 */ 0332,02,017,0171,0110,0,
+    /* 45839 */ 0332,02,017,053,0101,0,
+    /* 45845 */ 0333,02,017,053,0101,0,
+    /* 45851 */ 0270,01,04,01,0167,0,
+    /* 45857 */ 0270,01,0,01,0167,0,
+    /* 45863 */ 0320,02,017,0307,0206,0,
+    /* 45869 */ 0321,02,017,0307,0206,0,
+    /* 45875 */ 0324,02,017,0307,0206,0,
+    /* 45881 */ 0320,02,017,0307,0207,0,
+    /* 45887 */ 0321,02,017,0307,0207,0,
+    /* 45893 */ 0324,02,017,0307,0207,0,
+    /* 45899 */ 0360,03,017,01,0312,0,
+    /* 45905 */ 0360,03,017,01,0313,0,
+    /* 45911 */ 0336,03,017,0247,0310,0,
+    /* 45917 */ 0336,03,017,0247,0320,0,
+    /* 45923 */ 0336,03,017,0247,0330,0,
+    /* 45929 */ 0336,03,017,0247,0340,0,
+    /* 45935 */ 0336,03,017,0247,0350,0,
+    /* 45941 */ 0336,03,017,0246,0300,0,
+    /* 45947 */ 0336,03,017,0246,0310,0,
+    /* 45953 */ 0336,03,017,0246,0320,0,
+    /* 45959 */ 0322,02,0307,0370,064,0,
+    /* 45965 */ 0320,02,0307,0370,064,0,
+    /* 45971 */ 0321,02,0307,0370,064,0,
+    /* 45977 */ 0323,02,0307,0370,064,0,
+    /* 45983 */ 0333,02,017,033,0110,0,
+    /* 45989 */ 0361,02,017,032,0110,0,
+    /* 45995 */ 0361,02,017,033,0101,0,
+    /* 46001 */ 02,017,032,016,0110,0,
+    /* 46007 */ 02,017,033,015,0102,0,
+    /* 46013 */ 02,017,033,016,0101,0,
+    /* 46019 */ 03,017,070,0311,0110,0,
+    /* 46025 */ 03,017,070,0312,0110,0,
+    /* 46031 */ 03,017,070,0310,0110,0,
+    /* 46037 */ 03,017,070,0314,0110,0,
+    /* 46043 */ 03,017,070,0315,0110,0,
+    /* 46049 */ 03,017,070,0313,0110,0,
+    /* 46055 */ 0361,02,017,0256,0207,0,
+    /* 46061 */ 0361,02,017,0256,0206,0,
+    /* 46067 */ 0361,03,017,0256,0370,0,
+    /* 46073 */ 0310,03,017,01,0374,0,
+    /* 46079 */ 0311,03,017,01,0374,0,
+    /* 46085 */ 0313,03,017,01,0374,0,
+    /* 46091 */ 0360,02,017,034,0200,0,
+    /* 46097 */ 0360,03,017,01,0305,0,
+    /* 46103 */ 0332,02,017,0256,0206,0,
+    /* 46109 */ 0360,03,017,01,0317,0,
+    /* 46115 */ 0360,03,017,01,0327,0,
+    /* 46121 */ 0360,03,017,01,0300,0,
+    /* 46127 */ 0333,03,017,036,0373,0,
+    /* 46133 */ 0333,03,017,036,0372,0,
+    /* 46139 */ 0333,02,017,01,0205,0,
+    /* 46145 */ 0333,03,017,01,0352,0,
+    /* 46151 */ 0333,03,017,01,0350,0,
+    /* 46157 */ 0360,03,017,01,0350,0,
+    /* 46163 */ 0332,03,017,01,0351,0,
+    /* 46169 */ 0332,03,017,01,0350,0,
+    /* 46175 */ 0333,03,017,01,0356,0,
+    /* 46181 */ 0333,03,017,01,0357,0,
+    /* 46187 */ 0333,03,017,01,0355,0,
+    /* 46193 */ 0333,03,017,01,0354,0,
+    /* 46199 */ 0332,03,017,01,0312,0,
+    /* 46205 */ 0333,03,017,01,0312,0,
+    /* 46211 */ 0360,03,017,01,0306,0,
+    /* 46217 */ 0332,03,017,01,0306,0,
+    /* 46223 */ 0333,03,017,01,0306,0,
+    /* 46229 */ 0320,02,017,030,0200,0,
+    /* 46235 */ 0321,02,017,030,0200,0,
+    /* 46241 */ 0324,02,017,030,0200,0,
+    /* 46247 */ 0320,02,017,030,0201,0,
+    /* 46253 */ 0321,02,017,030,0201,0,
+    /* 46259 */ 0324,02,017,030,0201,0,
+    /* 46265 */ 0320,02,017,030,0202,0,
+    /* 46271 */ 0321,02,017,030,0202,0,
+    /* 46277 */ 0324,02,017,030,0202,0,
+    /* 46283 */ 0320,02,017,030,0203,0,
+    /* 46289 */ 0321,02,017,030,0203,0,
+    /* 46295 */ 0324,02,017,030,0203,0,
+    /* 46301 */ 0320,02,017,030,0204,0,
+    /* 46307 */ 0321,02,017,030,0204,0,
+    /* 46313 */ 0324,02,017,030,0204,0,
+    /* 46319 */ 0320,02,017,030,0205,0,
+    /* 46325 */ 0321,02,017,030,0205,0,
+    /* 46331 */ 0324,02,017,030,0205,0,
+    /* 46337 */ 0320,02,017,030,0206,0,
+    /* 46343 */ 0321,02,017,030,0206,0,
+    /* 46349 */ 0324,02,017,030,0206,0,
+    /* 46355 */ 0320,02,017,030,0207,0,
+    /* 46361 */ 0321,02,017,030,0207,0,
+    /* 46367 */ 0324,02,017,030,0207,0,
+    /* 46373 */ 0320,02,017,031,0200,0,
+    /* 46379 */ 0321,02,017,031,0200,0,
+    /* 46385 */ 0324,02,017,031,0200,0,
+    /* 46391 */ 0320,02,017,031,0201,0,
+    /* 46397 */ 0321,02,017,031,0201,0,
+    /* 46403 */ 0324,02,017,031,0201,0,
+    /* 46409 */ 0320,02,017,031,0202,0,
+    /* 46415 */ 0321,02,017,031,0202,0,
+    /* 46421 */ 0324,02,017,031,0202,0,
+    /* 46427 */ 0320,02,017,031,0203,0,
+    /* 46433 */ 0321,02,017,031,0203,0,
+    /* 46439 */ 0324,02,017,031,0203,0,
+    /* 46445 */ 0320,02,017,031,0204,0,
+    /* 46451 */ 0321,02,017,031,0204,0,
+    /* 46457 */ 0324,02,017,031,0204,0,
+    /* 46463 */ 0320,02,017,031,0205,0,
+    /* 46469 */ 0321,02,017,031,0205,0,
+    /* 46475 */ 0324,02,017,031,0205,0,
+    /* 46481 */ 0320,02,017,031,0206,0,
+    /* 46487 */ 0321,02,017,031,0206,0,
+    /* 46493 */ 0324,02,017,031,0206,0,
+    /* 46499 */ 0320,02,017,031,0207,0,
+    /* 46505 */ 0321,02,017,031,0207,0,
+    /* 46511 */ 0324,02,017,031,0207,0,
+    /* 46517 */ 0320,02,017,032,0200,0,
+    /* 46523 */ 0321,02,017,032,0200,0,
+    /* 46529 */ 0324,02,017,032,0200,0,
+    /* 46535 */ 0320,02,017,032,0201,0,
+    /* 46541 */ 0321,02,017,032,0201,0,
+    /* 46547 */ 0324,02,017,032,0201,0,
+    /* 46553 */ 0320,02,017,032,0202,0,
+    /* 46559 */ 0321,02,017,032,0202,0,
+    /* 46565 */ 0324,02,017,032,0202,0,
+    /* 46571 */ 0320,02,017,032,0203,0,
+    /* 46577 */ 0321,02,017,032,0203,0,
+    /* 46583 */ 0324,02,017,032,0203,0,
+    /* 46589 */ 0320,02,017,032,0204,0,
+    /* 46595 */ 0321,02,017,032,0204,0,
+    /* 46601 */ 0324,02,017,032,0204,0,
+    /* 46607 */ 0320,02,017,032,0205,0,
+    /* 46613 */ 0321,02,017,032,0205,0,
+    /* 46619 */ 0324,02,017,032,0205,0,
+    /* 46625 */ 0320,02,017,032,0206,0,
+    /* 46631 */ 0321,02,017,032,0206,0,
+    /* 46637 */ 0324,02,017,032,0206,0,
+    /* 46643 */ 0320,02,017,032,0207,0,
+    /* 46649 */ 0321,02,017,032,0207,0,
+    /* 46655 */ 0324,02,017,032,0207,0,
+    /* 46661 */ 0320,02,017,033,0200,0,
+    /* 46667 */ 0321,02,017,033,0200,0,
+    /* 46673 */ 0324,02,017,033,0200,0,
+    /* 46679 */ 0320,02,017,033,0201,0,
+    /* 46685 */ 0321,02,017,033,0201,0,
+    /* 46691 */ 0324,02,017,033,0201,0,
+    /* 46697 */ 0320,02,017,033,0202,0,
+    /* 46703 */ 0321,02,017,033,0202,0,
+    /* 46709 */ 0324,02,017,033,0202,0,
+    /* 46715 */ 0320,02,017,033,0203,0,
+    /* 46721 */ 0321,02,017,033,0203,0,
+    /* 46727 */ 0324,02,017,033,0203,0,
+    /* 46733 */ 0320,02,017,033,0204,0,
+    /* 46739 */ 0321,02,017,033,0204,0,
+    /* 46745 */ 0324,02,017,033,0204,0,
+    /* 46751 */ 0320,02,017,033,0205,0,
+    /* 46757 */ 0321,02,017,033,0205,0,
+    /* 46763 */ 0324,02,017,033,0205,0,
+    /* 46769 */ 0320,02,017,033,0206,0,
+    /* 46775 */ 0321,02,017,033,0206,0,
+    /* 46781 */ 0324,02,017,033,0206,0,
+    /* 46787 */ 0320,02,017,033,0207,0,
+    /* 46793 */ 0321,02,017,033,0207,0,
+    /* 46799 */ 0324,02,017,033,0207,0,
+    /* 46805 */ 0320,02,017,034,0200,0,
+    /* 46811 */ 0321,02,017,034,0200,0,
+    /* 46817 */ 0324,02,017,034,0200,0,
+    /* 46823 */ 0320,02,017,034,0201,0,
+    /* 46829 */ 0321,02,017,034,0201,0,
+    /* 46835 */ 0324,02,017,034,0201,0,
+    /* 46841 */ 0320,02,017,034,0202,0,
+    /* 46847 */ 0321,02,017,034,0202,0,
+    /* 46853 */ 0324,02,017,034,0202,0,
+    /* 46859 */ 0320,02,017,034,0203,0,
+    /* 46865 */ 0321,02,017,034,0203,0,
+    /* 46871 */ 0324,02,017,034,0203,0,
+    /* 46877 */ 0320,02,017,034,0204,0,
+    /* 46883 */ 0321,02,017,034,0204,0,
+    /* 46889 */ 0324,02,017,034,0204,0,
+    /* 46895 */ 0320,02,017,034,0205,0,
+    /* 46901 */ 0321,02,017,034,0205,0,
+    /* 46907 */ 0324,02,017,034,0205,0,
+    /* 46913 */ 0320,02,017,034,0206,0,
+    /* 46919 */ 0321,02,017,034,0206,0,
+    /* 46925 */ 0324,02,017,034,0206,0,
+    /* 46931 */ 0320,02,017,034,0207,0,
+    /* 46937 */ 0321,02,017,034,0207,0,
+    /* 46943 */ 0324,02,017,034,0207,0,
+    /* 46949 */ 0320,02,017,035,0200,0,
+    /* 46955 */ 0321,02,017,035,0200,0,
+    /* 46961 */ 0324,02,017,035,0200,0,
+    /* 46967 */ 0320,02,017,035,0201,0,
+    /* 46973 */ 0321,02,017,035,0201,0,
+    /* 46979 */ 0324,02,017,035,0201,0,
+    /* 46985 */ 0320,02,017,035,0202,0,
+    /* 46991 */ 0321,02,017,035,0202,0,
+    /* 46997 */ 0324,02,017,035,0202,0,
+    /* 47003 */ 0320,02,017,035,0203,0,
+    /* 47009 */ 0321,02,017,035,0203,0,
+    /* 47015 */ 0324,02,017,035,0203,0,
+    /* 47021 */ 0320,02,017,035,0204,0,
+    /* 47027 */ 0321,02,017,035,0204,0,
+    /* 47033 */ 0324,02,017,035,0204,0,
+    /* 47039 */ 0320,02,017,035,0205,0,
+    /* 47045 */ 0321,02,017,035,0205,0,
+    /* 47051 */ 0324,02,017,035,0205,0,
+    /* 47057 */ 0320,02,017,035,0206,0,
+    /* 47063 */ 0321,02,017,035,0206,0,
+    /* 47069 */ 0324,02,017,035,0206,0,
+    /* 47075 */ 0320,02,017,035,0207,0,
+    /* 47081 */ 0321,02,017,035,0207,0,
+    /* 47087 */ 0324,02,017,035,0207,0,
+    /* 47093 */ 0320,02,017,036,0200,0,
+    /* 47099 */ 0321,02,017,036,0200,0,
+    /* 47105 */ 0324,02,017,036,0200,0,
+    /* 47111 */ 0320,02,017,036,0201,0,
+    /* 47117 */ 0321,02,017,036,0201,0,
+    /* 47123 */ 0324,02,017,036,0201,0,
+    /* 47129 */ 0320,02,017,036,0202,0,
+    /* 47135 */ 0321,02,017,036,0202,0,
+    /* 47141 */ 0324,02,017,036,0202,0,
+    /* 47147 */ 0320,02,017,036,0203,0,
+    /* 47153 */ 0321,02,017,036,0203,0,
+    /* 47159 */ 0324,02,017,036,0203,0,
+    /* 47165 */ 0320,02,017,036,0204,0,
+    /* 47171 */ 0321,02,017,036,0204,0,
+    /* 47177 */ 0324,02,017,036,0204,0,
+    /* 47183 */ 0320,02,017,036,0205,0,
+    /* 47189 */ 0321,02,017,036,0205,0,
+    /* 47195 */ 0324,02,017,036,0205,0,
+    /* 47201 */ 0320,02,017,036,0206,0,
+    /* 47207 */ 0321,02,017,036,0206,0,
+    /* 47213 */ 0324,02,017,036,0206,0,
+    /* 47219 */ 0320,02,017,036,0207,0,
+    /* 47225 */ 0321,02,017,036,0207,0,
+    /* 47231 */ 0324,02,017,036,0207,0,
+    /* 47237 */ 0320,02,017,037,0201,0,
+    /* 47243 */ 0321,02,017,037,0201,0,
+    /* 47249 */ 0324,02,017,037,0201,0,
+    /* 47255 */ 0320,02,017,037,0202,0,
+    /* 47261 */ 0321,02,017,037,0202,0,
+    /* 47267 */ 0324,02,017,037,0202,0,
+    /* 47273 */ 0320,02,017,037,0203,0,
+    /* 47279 */ 0321,02,017,037,0203,0,
+    /* 47285 */ 0324,02,017,037,0203,0,
+    /* 47291 */ 0320,02,017,037,0204,0,
+    /* 47297 */ 0321,02,017,037,0204,0,
+    /* 47303 */ 0324,02,017,037,0204,0,
+    /* 47309 */ 0320,02,017,037,0205,0,
+    /* 47315 */ 0321,02,017,037,0205,0,
+    /* 47321 */ 0324,02,017,037,0205,0,
+    /* 47327 */ 0320,02,017,037,0206,0,
+    /* 47333 */ 0321,02,017,037,0206,0,
+    /* 47339 */ 0324,02,017,037,0206,0,
+    /* 47345 */ 0320,02,017,037,0207,0,
+    /* 47351 */ 0321,02,017,037,0207,0,
+    /* 47357 */ 0324,02,017,037,0207,0,
+    /* 47363 */ 0273,01,020,0101,0,
+    /* 47368 */ 0320,01,023,0110,0,
+    /* 47373 */ 0321,01,023,0110,0,
+    /* 47378 */ 0324,01,023,0110,0,
+    /* 47383 */ 0320,01,025,031,0,
+    /* 47388 */ 0321,01,025,041,0,
+    /* 47393 */ 0324,01,025,0255,0,
+    /* 47398 */ 0273,01,0,0101,0,
+    /* 47403 */ 0320,01,03,0110,0,
+    /* 47408 */ 0321,01,03,0110,0,
+    /* 47413 */ 0324,01,03,0110,0,
+    /* 47418 */ 0320,01,05,031,0,
+    /* 47423 */ 0321,01,05,041,0,
+    /* 47428 */ 0324,01,05,0255,0,
+    /* 47433 */ 0273,01,040,0101,0,
+    /* 47438 */ 0320,01,043,0110,0,
+    /* 47443 */ 0321,01,043,0110,0,
+    /* 47448 */ 0324,01,043,0110,0,
+    /* 47453 */ 0320,01,045,031,0,
+    /* 47458 */ 0321,01,045,041,0,
+    /* 47463 */ 0324,01,045,0255,0,
+    /* 47468 */ 0320,01,0142,0110,0,
+    /* 47473 */ 0321,01,0142,0110,0,
+    /* 47478 */ 0322,01,0350,064,0,
+    /* 47483 */ 0320,01,0350,064,0,
+    /* 47488 */ 0321,01,0350,064,0,
+    /* 47493 */ 0323,01,0350,064,0,
+    /* 47498 */ 0322,01,0377,0203,0,
+    /* 47503 */ 0324,01,0377,0203,0,
+    /* 47508 */ 0320,01,0377,0203,0,
+    /* 47513 */ 0321,01,0377,0203,0,
+    /* 47518 */ 0322,01,0377,0202,0,
+    /* 47523 */ 0320,01,0377,0202,0,
+    /* 47528 */ 0321,01,0377,0202,0,
+    /* 47533 */ 0323,01,0377,0202,0,
+    /* 47538 */ 0320,01,071,0101,0,
+    /* 47543 */ 0321,01,071,0101,0,
+    /* 47548 */ 0324,01,071,0101,0,
+    /* 47553 */ 0320,01,073,0110,0,
+    /* 47558 */ 0321,01,073,0110,0,
+    /* 47563 */ 0324,01,073,0110,0,
+    /* 47568 */ 0320,01,075,031,0,
+    /* 47573 */ 0321,01,075,041,0,
+    /* 47578 */ 0324,01,075,0255,0,
+    /* 47583 */ 01,0200,0207,021,0,
+    /* 47588 */ 01,0202,0207,021,0,
+    /* 47593 */ 0335,0321,01,0247,0,
+    /* 47598 */ 0335,0324,01,0247,0,
+    /* 47603 */ 0335,0320,01,0247,0,
+    /* 47608 */ 02,017,0246,0101,0,
+    /* 47613 */ 0273,01,0376,0201,0,
+    /* 47618 */ 0320,01,0367,0206,0,
+    /* 47623 */ 0321,01,0367,0206,0,
+    /* 47628 */ 0324,01,0367,0206,0,
+    /* 47633 */ 01,0310,030,025,0,
+    /* 47638 */ 01,0334,010,0300,0,
+    /* 47643 */ 01,0330,010,0300,0,
+    /* 47648 */ 01,0330,011,0300,0,
+    /* 47653 */ 01,0336,010,0300,0,
+    /* 47658 */ 0341,02,0333,0342,0,
+    /* 47663 */ 01,0332,010,0300,0,
+    /* 47668 */ 01,0332,011,0300,0,
+    /* 47673 */ 01,0332,010,0320,0,
+    /* 47678 */ 01,0332,011,0320,0,
+    /* 47683 */ 01,0332,010,0310,0,
+    /* 47688 */ 01,0332,011,0310,0,
+    /* 47693 */ 01,0333,010,0300,0,
+    /* 47698 */ 01,0333,011,0300,0,
+    /* 47703 */ 01,0333,010,0320,0,
+    /* 47708 */ 01,0333,011,0320,0,
+    /* 47713 */ 01,0333,010,0310,0,
+    /* 47718 */ 01,0333,011,0310,0,
+    /* 47723 */ 01,0333,010,0330,0,
+    /* 47728 */ 01,0333,011,0330,0,
+    /* 47733 */ 01,0332,010,0330,0,
+    /* 47738 */ 01,0332,011,0330,0,
+    /* 47743 */ 01,0330,010,0320,0,
+    /* 47748 */ 01,0330,011,0320,0,
+    /* 47753 */ 01,0333,010,0360,0,
+    /* 47758 */ 01,0333,011,0360,0,
+    /* 47763 */ 01,0337,010,0360,0,
+    /* 47768 */ 01,0337,011,0360,0,
+    /* 47773 */ 01,0330,010,0330,0,
+    /* 47778 */ 01,0330,011,0330,0,
+    /* 47783 */ 0341,02,0333,0341,0,
+    /* 47788 */ 01,0334,010,0370,0,
+    /* 47793 */ 01,0330,010,0360,0,
+    /* 47798 */ 01,0330,011,0360,0,
+    /* 47803 */ 01,0336,010,0370,0,
+    /* 47808 */ 01,0334,010,0360,0,
+    /* 47813 */ 01,0330,010,0370,0,
+    /* 47818 */ 01,0330,011,0370,0,
+    /* 47823 */ 01,0336,010,0360,0,
+    /* 47828 */ 0341,02,0333,0340,0,
+    /* 47833 */ 01,0335,010,0300,0,
+    /* 47838 */ 01,0337,010,0300,0,
+    /* 47843 */ 0341,02,0333,0343,0,
+    /* 47848 */ 01,0331,010,0300,0,
+    /* 47853 */ 01,0334,010,0310,0,
+    /* 47858 */ 01,0330,010,0310,0,
+    /* 47863 */ 01,0330,011,0310,0,
+    /* 47868 */ 01,0336,010,0310,0,
+    /* 47873 */ 0341,01,0335,0206,0,
+    /* 47878 */ 01,0335,010,0320,0,
+    /* 47883 */ 0341,01,0331,0207,0,
+    /* 47888 */ 0341,01,0331,0206,0,
+    /* 47893 */ 01,0335,010,0330,0,
+    /* 47898 */ 0341,01,0335,0207,0,
+    /* 47903 */ 0341,02,0337,0340,0,
+    /* 47908 */ 01,0334,010,0350,0,
+    /* 47913 */ 01,0330,010,0340,0,
+    /* 47918 */ 01,0330,011,0340,0,
+    /* 47923 */ 01,0336,010,0350,0,
+    /* 47928 */ 01,0334,010,0340,0,
+    /* 47933 */ 01,0330,010,0350,0,
+    /* 47938 */ 01,0330,011,0350,0,
+    /* 47943 */ 01,0336,010,0340,0,
+    /* 47948 */ 01,0335,010,0340,0,
+    /* 47953 */ 01,0335,011,0340,0,
+    /* 47958 */ 01,0333,010,0350,0,
+    /* 47963 */ 01,0333,011,0350,0,
+    /* 47968 */ 01,0337,010,0350,0,
+    /* 47973 */ 01,0337,011,0350,0,
+    /* 47978 */ 01,0335,010,0350,0,
+    /* 47983 */ 01,0335,011,0350,0,
+    /* 47988 */ 01,0331,010,0310,0,
+    /* 47993 */ 01,0331,011,0310,0,
+    /* 47998 */ 0320,01,0367,0207,0,
+    /* 48003 */ 0321,01,0367,0207,0,
+    /* 48008 */ 0324,01,0367,0207,0,
+    /* 48013 */ 0320,01,0367,0205,0,
+    /* 48018 */ 0321,01,0367,0205,0,
+    /* 48023 */ 0324,01,0367,0205,0,
+    /* 48028 */ 0320,01,0345,025,0,
+    /* 48033 */ 0321,01,0345,025,0,
+    /* 48038 */ 0273,01,0376,0200,0,
+    /* 48043 */ 02,017,01,0207,0,
+    /* 48048 */ 0310,01,0343,050,0,
+    /* 48053 */ 0311,01,0343,050,0,
+    /* 48058 */ 0371,01,0353,050,0,
+    /* 48063 */ 0322,01,0351,064,0,
+    /* 48068 */ 0320,01,0351,064,0,
+    /* 48073 */ 0321,01,0351,064,0,
+    /* 48078 */ 0323,01,0351,064,0,
+    /* 48083 */ 0322,01,0377,0205,0,
+    /* 48088 */ 0324,01,0377,0205,0,
+    /* 48093 */ 0320,01,0377,0205,0,
+    /* 48098 */ 0321,01,0377,0205,0,
+    /* 48103 */ 0322,01,0377,0204,0,
+    /* 48108 */ 0320,01,0377,0204,0,
+    /* 48113 */ 0321,01,0377,0204,0,
+    /* 48118 */ 0323,01,0377,0204,0,
+    /* 48123 */ 0320,01,0305,0110,0,
+    /* 48128 */ 0321,01,0305,0110,0,
+    /* 48133 */ 0320,01,0215,0110,0,
+    /* 48138 */ 0321,01,0215,0110,0,
+    /* 48143 */ 0324,01,0215,0110,0,
+    /* 48148 */ 0320,01,0304,0110,0,
+    /* 48153 */ 0321,01,0304,0110,0,
+    /* 48158 */ 02,017,01,0202,0,
+    /* 48163 */ 02,017,01,0203,0,
+    /* 48168 */ 02,017,0,0202,0,
+    /* 48173 */ 02,017,01,0206,0,
+    /* 48178 */ 0312,01,0342,050,0,
+    /* 48183 */ 0310,01,0342,050,0,
+    /* 48188 */ 0311,01,0342,050,0,
+    /* 48193 */ 0313,01,0342,050,0,
+    /* 48198 */ 0312,01,0341,050,0,
+    /* 48203 */ 0310,01,0341,050,0,
+    /* 48208 */ 0311,01,0341,050,0,
+    /* 48213 */ 0313,01,0341,050,0,
+    /* 48218 */ 0312,01,0340,050,0,
+    /* 48223 */ 0310,01,0340,050,0,
+    /* 48228 */ 0311,01,0340,050,0,
+    /* 48233 */ 0313,01,0340,050,0,
+    /* 48238 */ 02,017,0,0203,0,
+    /* 48243 */ 03,017,01,0310,0,
+    /* 48248 */ 03,017,01,0372,0,
+    /* 48253 */ 0320,01,0214,0101,0,
+    /* 48258 */ 0321,01,0214,0101,0,
+    /* 48263 */ 0323,01,0214,0101,0,
+    /* 48268 */ 0324,01,0214,0101,0,
+    /* 48273 */ 0323,01,0216,0110,0,
+    /* 48278 */ 0320,01,0216,0110,0,
+    /* 48283 */ 0321,01,0216,0110,0,
+    /* 48288 */ 0324,01,0216,0110,0,
+    /* 48293 */ 0320,01,0241,045,0,
+    /* 48298 */ 0321,01,0241,045,0,
+    /* 48303 */ 0324,01,0241,045,0,
+    /* 48308 */ 0320,01,0243,044,0,
+    /* 48313 */ 0321,01,0243,044,0,
+    /* 48318 */ 0324,01,0243,044,0,
+    /* 48323 */ 02,017,044,0101,0,
+    /* 48328 */ 02,017,046,0110,0,
+    /* 48333 */ 0271,01,0210,0101,0,
+    /* 48338 */ 0320,01,0213,0110,0,
+    /* 48343 */ 0321,01,0213,0110,0,
+    /* 48348 */ 0324,01,0213,0110,0,
+    /* 48353 */ 0320,010,0270,031,0,
+    /* 48358 */ 0321,010,0270,041,0,
+    /* 48363 */ 0323,010,0270,041,0,
+    /* 48368 */ 0324,010,0270,055,0,
+    /* 48373 */ 0324,01,0143,0110,0,
+    /* 48378 */ 0320,01,0367,0204,0,
+    /* 48383 */ 0321,01,0367,0204,0,
+    /* 48388 */ 0324,01,0367,0204,0,
+    /* 48393 */ 03,017,01,0311,0,
+    /* 48398 */ 03,017,01,0373,0,
+    /* 48403 */ 0273,01,0366,0203,0,
+    /* 48408 */ 0314,0326,01,0220,0,
+    /* 48413 */ 0273,01,0366,0202,0,
+    /* 48418 */ 0273,01,010,0101,0,
+    /* 48423 */ 0320,01,013,0110,0,
+    /* 48428 */ 0321,01,013,0110,0,
+    /* 48433 */ 0324,01,013,0110,0,
+    /* 48438 */ 0320,01,015,031,0,
+    /* 48443 */ 0321,01,015,041,0,
+    /* 48448 */ 0324,01,015,0255,0,
+    /* 48453 */ 0320,01,0347,024,0,
+    /* 48458 */ 0321,01,0347,024,0,
+    /* 48463 */ 0320,01,0217,0200,0,
+    /* 48468 */ 0321,01,0217,0200,0,
+    /* 48473 */ 0323,01,0217,0200,0,
+    /* 48478 */ 02,017,015,0200,0,
+    /* 48483 */ 02,017,015,0201,0,
+    /* 48488 */ 0320,01,0377,0206,0,
+    /* 48493 */ 0321,01,0377,0206,0,
+    /* 48498 */ 0323,01,0377,0206,0,
+    /* 48503 */ 0320,01,0152,0274,0,
+    /* 48508 */ 0320,01,0150,030,0,
+    /* 48513 */ 0321,01,0152,0274,0,
+    /* 48518 */ 0321,01,0150,040,0,
+    /* 48523 */ 0323,01,0152,0274,0,
+    /* 48528 */ 0323,01,0150,0254,0,
+    /* 48533 */ 01,0300,0202,025,0,
+    /* 48538 */ 0320,01,0321,0202,0,
+    /* 48543 */ 0320,01,0323,0202,0,
+    /* 48548 */ 0321,01,0321,0202,0,
+    /* 48553 */ 0321,01,0323,0202,0,
+    /* 48558 */ 0324,01,0321,0202,0,
+    /* 48563 */ 0324,01,0323,0202,0,
+    /* 48568 */ 01,0300,0203,025,0,
+    /* 48573 */ 0320,01,0321,0203,0,
+    /* 48578 */ 0320,01,0323,0203,0,
+    /* 48583 */ 0321,01,0321,0203,0,
+    /* 48588 */ 0321,01,0323,0203,0,
+    /* 48593 */ 0324,01,0321,0203,0,
+    /* 48598 */ 0324,01,0323,0203,0,
+    /* 48603 */ 03,017,01,0371,0,
+    /* 48608 */ 0320,01,0312,030,0,
+    /* 48613 */ 0320,01,0302,030,0,
+    /* 48618 */ 0321,01,0302,030,0,
+    /* 48623 */ 0321,01,0312,030,0,
+    /* 48628 */ 0323,01,0302,030,0,
+    /* 48633 */ 0324,01,0312,030,0,
+    /* 48638 */ 01,0300,0200,025,0,
+    /* 48643 */ 0320,01,0321,0200,0,
+    /* 48648 */ 0320,01,0323,0200,0,
+    /* 48653 */ 0321,01,0321,0200,0,
+    /* 48658 */ 0321,01,0323,0200,0,
+    /* 48663 */ 0324,01,0321,0200,0,
+    /* 48668 */ 0324,01,0323,0200,0,
+    /* 48673 */ 01,0300,0201,025,0,
+    /* 48678 */ 0320,01,0321,0201,0,
+    /* 48683 */ 0320,01,0323,0201,0,
+    /* 48688 */ 0321,01,0321,0201,0,
+    /* 48693 */ 0321,01,0323,0201,0,
+    /* 48698 */ 0324,01,0321,0201,0,
+    /* 48703 */ 0324,01,0323,0201,0,
+    /* 48708 */ 02,017,0173,0200,0,
+    /* 48713 */ 02,017,0175,0200,0,
+    /* 48718 */ 01,0300,0204,025,0,
+    /* 48723 */ 0320,01,0321,0204,0,
+    /* 48728 */ 0320,01,0323,0204,0,
+    /* 48733 */ 0321,01,0321,0204,0,
+    /* 48738 */ 0321,01,0323,0204,0,
+    /* 48743 */ 0324,01,0321,0204,0,
+    /* 48748 */ 0324,01,0323,0204,0,
+    /* 48753 */ 01,0300,0207,025,0,
+    /* 48758 */ 0320,01,0321,0207,0,
+    /* 48763 */ 0320,01,0323,0207,0,
+    /* 48768 */ 0321,01,0321,0207,0,
+    /* 48773 */ 0321,01,0323,0207,0,
+    /* 48778 */ 0324,01,0321,0207,0,
+    /* 48783 */ 0324,01,0323,0207,0,
+    /* 48788 */ 0273,01,030,0101,0,
+    /* 48793 */ 0320,01,033,0110,0,
+    /* 48798 */ 0321,01,033,0110,0,
+    /* 48803 */ 0324,01,033,0110,0,
+    /* 48808 */ 0320,01,035,031,0,
+    /* 48813 */ 0321,01,035,041,0,
+    /* 48818 */ 0324,01,035,0255,0,
+    /* 48823 */ 0335,0321,01,0257,0,
+    /* 48828 */ 0335,0324,01,0257,0,
+    /* 48833 */ 0335,0320,01,0257,0,
+    /* 48838 */ 02,017,01,0200,0,
+    /* 48843 */ 01,0300,0205,025,0,
+    /* 48848 */ 0320,01,0321,0205,0,
+    /* 48853 */ 0320,01,0323,0205,0,
+    /* 48858 */ 0321,01,0321,0205,0,
+    /* 48863 */ 0321,01,0323,0205,0,
+    /* 48868 */ 0324,01,0321,0205,0,
+    /* 48873 */ 0324,01,0323,0205,0,
+    /* 48878 */ 02,017,01,0201,0,
+    /* 48883 */ 03,017,01,0336,0,
+    /* 48888 */ 0273,01,050,0101,0,
+    /* 48893 */ 0320,01,053,0110,0,
+    /* 48898 */ 0321,01,053,0110,0,
+    /* 48903 */ 0324,01,053,0110,0,
+    /* 48908 */ 0320,01,055,031,0,
+    /* 48913 */ 0321,01,055,041,0,
+    /* 48918 */ 0324,01,055,0255,0,
+    /* 48923 */ 02,017,0172,0200,0,
+    /* 48928 */ 02,017,0174,0200,0,
+    /* 48933 */ 03,017,01,0370,0,
+    /* 48938 */ 0320,01,0205,0101,0,
+    /* 48943 */ 0321,01,0205,0101,0,
+    /* 48948 */ 0324,01,0205,0101,0,
+    /* 48953 */ 0320,01,0205,0110,0,
+    /* 48958 */ 0321,01,0205,0110,0,
+    /* 48963 */ 0324,01,0205,0110,0,
+    /* 48968 */ 0320,01,0251,031,0,
+    /* 48973 */ 0321,01,0251,041,0,
+    /* 48978 */ 0324,01,0251,0255,0,
+    /* 48983 */ 01,0366,0200,021,0,
+    /* 48988 */ 02,017,0,0204,0,
+    /* 48993 */ 02,017,0,0205,0,
+    /* 48998 */ 0272,01,0206,0101,0,
+    /* 49003 */ 0272,01,0206,0110,0,
+    /* 49008 */ 0273,01,060,0101,0,
+    /* 49013 */ 0320,01,063,0110,0,
+    /* 49018 */ 0321,01,063,0110,0,
+    /* 49023 */ 0324,01,063,0110,0,
+    /* 49028 */ 0320,01,065,031,0,
+    /* 49033 */ 0321,01,065,041,0,
+    /* 49038 */ 0324,01,065,0255,0,
+    /* 49043 */ 0370,01,0167,050,0,
+    /* 49048 */ 0370,01,0163,050,0,
+    /* 49053 */ 0370,01,0162,050,0,
+    /* 49058 */ 0370,01,0166,050,0,
+    /* 49063 */ 0370,01,0164,050,0,
+    /* 49068 */ 0370,01,0177,050,0,
+    /* 49073 */ 0370,01,0175,050,0,
+    /* 49078 */ 0370,01,0174,050,0,
+    /* 49083 */ 0370,01,0176,050,0,
+    /* 49088 */ 0370,01,0165,050,0,
+    /* 49093 */ 0370,01,0161,050,0,
+    /* 49098 */ 0370,01,0173,050,0,
+    /* 49103 */ 0370,01,0171,050,0,
+    /* 49108 */ 0370,01,0160,050,0,
+    /* 49113 */ 0370,01,0172,050,0,
+    /* 49118 */ 0370,01,0170,050,0,
+    /* 49123 */ 02,017,0227,0200,0,
+    /* 49128 */ 02,017,0223,0200,0,
+    /* 49133 */ 02,017,0222,0200,0,
+    /* 49138 */ 02,017,0226,0200,0,
+    /* 49143 */ 02,017,0224,0200,0,
+    /* 49148 */ 02,017,0237,0200,0,
+    /* 49153 */ 02,017,0235,0200,0,
+    /* 49158 */ 02,017,0234,0200,0,
+    /* 49163 */ 02,017,0236,0200,0,
+    /* 49168 */ 02,017,0225,0200,0,
+    /* 49173 */ 02,017,0221,0200,0,
+    /* 49178 */ 02,017,0233,0200,0,
+    /* 49183 */ 02,017,0231,0200,0,
+    /* 49188 */ 02,017,0220,0200,0,
+    /* 49193 */ 02,017,0232,0200,0,
+    /* 49198 */ 02,017,0230,0200,0,
+    /* 49203 */ 03,017,01,0320,0,
+    /* 49208 */ 03,017,01,0321,0,
+    /* 49213 */ 03,017,01,0335,0,
+    /* 49218 */ 03,017,01,0334,0,
+    /* 49223 */ 03,017,01,0324,0,
+    /* 49228 */ 03,017,01,0302,0,
+    /* 49233 */ 03,017,01,0332,0,
+    /* 49238 */ 03,017,01,0331,0,
+    /* 49243 */ 03,017,01,0303,0,
+    /* 49248 */ 03,017,01,0330,0,
+    /* 49253 */ 03,017,01,0333,0,
+    /* 49258 */ 03,017,01,0304,0,
+    /* 49263 */ 03,017,0247,0300,0,
+    /* 49268 */ 02,0306,0370,020,0,
+    /* 49273 */ 03,017,01,0325,0,
+    /* 49278 */ 03,017,01,0326,0,
+    /* 49283 */ 02,017,015,0202,0,
+    /* 49288 */ 0333,02,017,011,0,
+    /* 49293 */ 02,0325,012,0,
+    /* 49297 */ 01,0325,024,0,
+    /* 49301 */ 02,0324,012,0,
+    /* 49305 */ 01,0324,024,0,
+    /* 49309 */ 01,024,021,0,
+    /* 49313 */ 01,04,021,0,
+    /* 49317 */ 01,044,021,0,
+    /* 49321 */ 02,017,072,0,
+    /* 49325 */ 02,017,073,0,
+    /* 49329 */ 0320,01,0230,0,
+    /* 49333 */ 0321,01,0231,0,
+    /* 49337 */ 0324,01,0230,0,
+    /* 49341 */ 02,017,06,0,
+    /* 49345 */ 01,070,0101,0,
+    /* 49349 */ 01,074,021,0,
+    /* 49353 */ 0335,01,0246,0,
+    /* 49357 */ 02,017,0242,0,
+    /* 49361 */ 02,017,075,0,
+    /* 49365 */ 02,017,074,0,
+    /* 49369 */ 0324,01,0231,0,
+    /* 49373 */ 0320,01,0231,0,
+    /* 49377 */ 0321,01,0230,0,
+    /* 49381 */ 0320,010,0110,0,
+    /* 49385 */ 0321,010,0110,0,
+    /* 49389 */ 01,0366,0206,0,
+    /* 49393 */ 02,017,071,0,
+    /* 49397 */ 02,017,0167,0,
+    /* 49401 */ 02,0331,0360,0,
+    /* 49405 */ 02,0331,0341,0,
+    /* 49409 */ 01,0330,0200,0,
+    /* 49413 */ 01,0334,0200,0,
+    /* 49417 */ 02,0336,0301,0,
+    /* 49421 */ 01,0337,0204,0,
+    /* 49425 */ 01,0337,0206,0,
+    /* 49429 */ 02,0331,0340,0,
+    /* 49433 */ 02,0332,0301,0,
+    /* 49437 */ 02,0332,0321,0,
+    /* 49441 */ 02,0332,0311,0,
+    /* 49445 */ 02,0333,0301,0,
+    /* 49449 */ 02,0333,0321,0,
+    /* 49453 */ 02,0333,0311,0,
+    /* 49457 */ 02,0333,0331,0,
+    /* 49461 */ 02,0332,0331,0,
+    /* 49465 */ 01,0330,0202,0,
+    /* 49469 */ 01,0334,0202,0,
+    /* 49473 */ 02,0330,0321,0,
+    /* 49477 */ 02,0333,0361,0,
+    /* 49481 */ 02,0337,0361,0,
+    /* 49485 */ 01,0330,0203,0,
+    /* 49489 */ 01,0334,0203,0,
+    /* 49493 */ 02,0330,0331,0,
+    /* 49497 */ 02,0336,0331,0,
+    /* 49501 */ 02,0331,0377,0,
+    /* 49505 */ 02,0331,0366,0,
+    /* 49509 */ 01,0330,0206,0,
+    /* 49513 */ 01,0334,0206,0,
+    /* 49517 */ 02,0336,0371,0,
+    /* 49521 */ 01,0330,0207,0,
+    /* 49525 */ 01,0334,0207,0,
+    /* 49529 */ 02,0336,0361,0,
+    /* 49533 */ 02,017,016,0,
+    /* 49537 */ 02,0335,0301,0,
+    /* 49541 */ 02,0337,0301,0,
+    /* 49545 */ 01,0332,0200,0,
+    /* 49549 */ 01,0336,0200,0,
+    /* 49553 */ 01,0332,0202,0,
+    /* 49557 */ 01,0336,0202,0,
+    /* 49561 */ 01,0332,0203,0,
+    /* 49565 */ 01,0336,0203,0,
+    /* 49569 */ 01,0332,0206,0,
+    /* 49573 */ 01,0336,0206,0,
+    /* 49577 */ 01,0332,0207,0,
+    /* 49581 */ 01,0336,0207,0,
+    /* 49585 */ 01,0333,0200,0,
+    /* 49589 */ 01,0337,0200,0,
+    /* 49593 */ 01,0337,0205,0,
+    /* 49597 */ 01,0332,0201,0,
+    /* 49601 */ 01,0336,0201,0,
+    /* 49605 */ 02,0331,0367,0,
+    /* 49609 */ 01,0333,0202,0,
+    /* 49613 */ 01,0337,0202,0,
+    /* 49617 */ 01,0333,0203,0,
+    /* 49621 */ 01,0337,0203,0,
+    /* 49625 */ 01,0337,0207,0,
+    /* 49629 */ 01,0337,0201,0,
+    /* 49633 */ 01,0333,0201,0,
+    /* 49637 */ 01,0335,0201,0,
+    /* 49641 */ 01,0332,0204,0,
+    /* 49645 */ 01,0336,0204,0,
+    /* 49649 */ 01,0332,0205,0,
+    /* 49653 */ 01,0336,0205,0,
+    /* 49657 */ 01,0331,0200,0,
+    /* 49661 */ 01,0335,0200,0,
+    /* 49665 */ 01,0333,0205,0,
+    /* 49669 */ 02,0331,0301,0,
+    /* 49673 */ 02,0331,0350,0,
+    /* 49677 */ 01,0331,0205,0,
+    /* 49681 */ 01,0331,0204,0,
+    /* 49685 */ 02,0331,0352,0,
+    /* 49689 */ 02,0331,0351,0,
+    /* 49693 */ 02,0331,0354,0,
+    /* 49697 */ 02,0331,0355,0,
+    /* 49701 */ 02,0331,0353,0,
+    /* 49705 */ 02,0331,0356,0,
+    /* 49709 */ 01,0330,0201,0,
+    /* 49713 */ 01,0334,0201,0,
+    /* 49717 */ 02,0336,0311,0,
+    /* 49721 */ 02,0331,0320,0,
+    /* 49725 */ 02,0331,0363,0,
+    /* 49729 */ 02,0331,0370,0,
+    /* 49733 */ 02,0331,0365,0,
+    /* 49737 */ 02,0331,0362,0,
+    /* 49741 */ 02,0331,0374,0,
+    /* 49745 */ 01,0335,0204,0,
+    /* 49749 */ 02,0331,0375,0,
+    /* 49753 */ 02,0333,0344,0,
+    /* 49757 */ 02,0331,0376,0,
+    /* 49761 */ 02,0331,0373,0,
+    /* 49765 */ 02,0331,0372,0,
+    /* 49769 */ 01,0331,0202,0,
+    /* 49773 */ 01,0335,0202,0,
+    /* 49777 */ 02,0335,0321,0,
+    /* 49781 */ 01,0331,0203,0,
+    /* 49785 */ 01,0335,0203,0,
+    /* 49789 */ 01,0333,0207,0,
+    /* 49793 */ 02,0335,0331,0,
+    /* 49797 */ 01,0330,0204,0,
+    /* 49801 */ 01,0334,0204,0,
+    /* 49805 */ 02,0336,0351,0,
+    /* 49809 */ 01,0330,0205,0,
+    /* 49813 */ 01,0334,0205,0,
+    /* 49817 */ 02,0336,0341,0,
+    /* 49821 */ 02,0331,0344,0,
+    /* 49825 */ 02,0335,0341,0,
+    /* 49829 */ 02,0333,0351,0,
+    /* 49833 */ 02,0337,0351,0,
+    /* 49837 */ 02,0335,0351,0,
+    /* 49841 */ 02,0332,0351,0,
+    /* 49845 */ 02,0331,0345,0,
+    /* 49849 */ 02,0331,0311,0,
+    /* 49853 */ 02,0331,0364,0,
+    /* 49857 */ 02,0331,0361,0,
+    /* 49861 */ 02,0331,0371,0,
+    /* 49865 */ 01,0366,0207,0,
+    /* 49869 */ 01,0366,0205,0,
+    /* 49873 */ 01,0344,025,0,
+    /* 49877 */ 0320,01,0355,0,
+    /* 49881 */ 0321,01,0355,0,
+    /* 49885 */ 0320,010,0100,0,
+    /* 49889 */ 0321,010,0100,0,
+    /* 49893 */ 0321,01,0155,0,
+    /* 49897 */ 0320,01,0155,0,
+    /* 49901 */ 01,0315,024,0,
+    /* 49905 */ 02,017,010,0,
+    /* 49909 */ 0322,01,0317,0,
+    /* 49913 */ 0321,01,0317,0,
+    /* 49917 */ 0324,01,0317,0,
+    /* 49921 */ 0320,01,0317,0,
+    /* 49925 */ 02,017,07,0,
+    /* 49929 */ 02,017,05,0,
+    /* 49933 */ 0321,01,0255,0,
+    /* 49937 */ 0324,01,0255,0,
+    /* 49941 */ 0320,01,0255,0,
+    /* 49945 */ 01,0240,045,0,
+    /* 49949 */ 01,0242,044,0,
+    /* 49953 */ 01,0212,0110,0,
+    /* 49957 */ 010,0260,021,0,
+    /* 49961 */ 0321,01,0245,0,
+    /* 49965 */ 0324,01,0245,0,
+    /* 49969 */ 0320,01,0245,0,
+    /* 49973 */ 01,0366,0204,0,
+    /* 49977 */ 01,014,021,0,
+    /* 49981 */ 01,0346,024,0,
+    /* 49985 */ 0320,01,0357,0,
+    /* 49989 */ 0321,01,0357,0,
+    /* 49993 */ 0321,01,0157,0,
+    /* 49997 */ 0320,01,0157,0,
+    /* 50001 */ 0333,01,0220,0,
+    /* 50005 */ 0320,010,0130,0,
+    /* 50009 */ 0321,010,0130,0,
+    /* 50013 */ 0323,010,0130,0,
+    /* 50017 */ 02,017,0241,0,
+    /* 50021 */ 02,017,0251,0,
+    /* 50025 */ 0322,01,0141,0,
+    /* 50029 */ 0321,01,0141,0,
+    /* 50033 */ 0320,01,0141,0,
+    /* 50037 */ 0322,01,0235,0,
+    /* 50041 */ 0321,01,0235,0,
+    /* 50045 */ 0320,01,0235,0,
+    /* 50049 */ 0320,010,0120,0,
+    /* 50053 */ 0321,010,0120,0,
+    /* 50057 */ 0323,010,0120,0,
+    /* 50061 */ 02,017,0240,0,
+    /* 50065 */ 02,017,0250,0,
+    /* 50069 */ 0322,01,0140,0,
+    /* 50073 */ 0321,01,0140,0,
+    /* 50077 */ 0320,01,0140,0,
+    /* 50081 */ 0322,01,0234,0,
+    /* 50085 */ 0321,01,0234,0,
+    /* 50089 */ 0320,01,0234,0,
+    /* 50093 */ 01,0320,0202,0,
+    /* 50097 */ 01,0322,0202,0,
+    /* 50101 */ 01,0320,0203,0,
+    /* 50105 */ 01,0322,0203,0,
+    /* 50109 */ 02,017,062,0,
+    /* 50113 */ 02,017,063,0,
+    /* 50117 */ 02,017,061,0,
+    /* 50121 */ 0320,01,0303,0,
+    /* 50125 */ 0320,01,0313,0,
+    /* 50129 */ 0321,01,0303,0,
+    /* 50133 */ 0321,01,0313,0,
+    /* 50137 */ 0323,01,0303,0,
+    /* 50141 */ 0324,01,0313,0,
+    /* 50145 */ 01,0320,0200,0,
+    /* 50149 */ 01,0322,0200,0,
+    /* 50153 */ 01,0320,0201,0,
+    /* 50157 */ 01,0322,0201,0,
+    /* 50161 */ 02,017,0252,0,
+    /* 50165 */ 01,0320,0204,0,
+    /* 50169 */ 01,0322,0204,0,
+    /* 50173 */ 01,0320,0207,0,
+    /* 50177 */ 01,0322,0207,0,
+    /* 50181 */ 01,034,021,0,
+    /* 50185 */ 0335,01,0256,0,
+    /* 50189 */ 01,0320,0205,0,
+    /* 50193 */ 01,0322,0205,0,
+    /* 50197 */ 02,017,070,0,
+    /* 50201 */ 02,017,0176,0,
+    /* 50205 */ 0321,01,0253,0,
+    /* 50209 */ 0324,01,0253,0,
+    /* 50213 */ 0320,01,0253,0,
+    /* 50217 */ 01,054,021,0,
+    /* 50221 */ 02,017,064,0,
+    /* 50225 */ 02,017,065,0,
+    /* 50229 */ 01,0204,0101,0,
+    /* 50233 */ 01,0204,0110,0,
+    /* 50237 */ 01,0250,021,0,
+    /* 50241 */ 02,017,0377,0,
+    /* 50245 */ 02,017,0271,0,
+    /* 50249 */ 02,017,013,0,
+    /* 50253 */ 02,017,060,0,
+    /* 50257 */ 0320,011,0220,0,
+    /* 50261 */ 0321,011,0220,0,
+    /* 50265 */ 0324,011,0220,0,
+    /* 50269 */ 0320,010,0220,0,
+    /* 50273 */ 0321,010,0220,0,
+    /* 50277 */ 0324,010,0220,0,
+    /* 50281 */ 0321,01,0220,0,
+    /* 50285 */ 01,064,021,0,
+    /* 50289 */ 02,017,067,0,
+    /* 50293 */ 01,067,0,
+    /* 50296 */ 01,077,0,
+    /* 50299 */ 01,0365,0,
+    /* 50302 */ 01,047,0,
+    /* 50305 */ 01,057,0,
+    /* 50308 */ 01,0364,0,
+    /* 50311 */ 01,0361,0,
+    /* 50314 */ 01,0154,0,
+    /* 50317 */ 01,0314,0,
+    /* 50320 */ 01,0316,0,
+    /* 50323 */ 01,0237,0,
+    /* 50326 */ 01,0254,0,
+    /* 50329 */ 01,0156,0,
+    /* 50332 */ 01,0375,0,
+};
+
+/*
+ * Bytecode frequencies (including reuse):
+ *
+ *   0:8298 |  40:   2 | 100:  50 | 140:   0 | 200: 180 | 240: 768 | 300:   1 | 340:   8
+ *   1:7851 |  41:  37 | 101: 645 | 141:   0 | 201:  94 | 241:1569 | 301:   0 | 341:  10
+ *   2:1437 |  42:  12 | 102:  14 | 142:   0 | 202: 110 | 242:   1 | 302:   0 | 342:   0
+ *   3: 244 |  43:   0 | 103:   0 | 143:   0 | 203:  89 | 243:   0 | 303:   0 | 343:   0
+ *   4:   2 |  44:   4 | 104:   0 | 144:   0 | 204: 121 | 244:   0 | 304:   0 | 344:   0
+ *   5:   0 |  45:   4 | 105:   0 | 145:   0 | 205:  88 | 245:   0 | 305:   0 | 345:   0
+ *   6:   0 |  46:   0 | 106:   0 | 146:   0 | 206: 117 | 246:   0 | 306:   0 | 346:   0
+ *   7:   0 |  47:   0 | 107:   0 | 147:   0 | 207:  89 | 247:   0 | 307:   0 | 347:   0
+ *  10:  73 |  50: 115 | 110:3166 | 150:   0 | 210:   8 | 250: 863 | 310:  14 | 350:   0
+ *  11:  26 |  51:   0 | 111:   0 | 151:   0 | 211:  14 | 251:   0 | 311:  12 | 351:   0
+ *  12:   0 |  52:   0 | 112:   0 | 152:   0 | 212:  19 | 252:   0 | 312:   5 | 352:   0
+ *  13:   0 |  53:   0 | 113:   0 | 153:   0 | 213:   9 | 253:   0 | 313:  12 | 353:   0
+ *  14:   0 |  54:   0 | 114:   0 | 154:   0 | 214:  15 | 254:   2 | 314:   1 | 354:   0
+ *  15:   2 |  55:   1 | 115:   0 | 155:   0 | 215:   2 | 255:  23 | 315:   0 | 355:   0
+ *  16:   4 |  56:   0 | 116:   0 | 156:   0 | 216:  19 | 256:   2 | 316:   0 | 356:   0
+ *  17:   0 |  57:   0 | 117:   0 | 157:   0 | 217:   7 | 257:   0 | 317:  21 | 357:   0
+ *  20:   4 |  60:   0 | 120:2574 | 160:   0 | 220:   0 | 260: 800 | 320: 434 | 360: 198
+ *  21: 107 |  61:   0 | 121:   0 | 161:   0 | 221:   0 | 261:1030 | 321: 447 | 361: 255
+ *  22: 408 |  62:   0 | 122:   0 | 162:   0 | 222:   0 | 262: 103 | 322:  52 | 362:   0
+ *  23: 196 |  63:   0 | 123:   0 | 163:   0 | 223:   0 | 263:   0 | 323: 166 | 363:   0
+ *  24:   6 |  64: 207 | 124:   0 | 164:   0 | 224:   0 | 264:   0 | 324: 389 | 364:   0
+ *  25:  67 |  65:   0 | 125:   0 | 165:   0 | 225:   0 | 265:   0 | 325:   2 | 365:   0
+ *  26:  63 |  66:   0 | 126:   0 | 166:   0 | 226:   0 | 266:   0 | 326:  13 | 366:   0
+ *  27:   1 |  67:   0 | 127:   0 | 167:   0 | 227:   0 | 267:   0 | 327:   0 | 367:   0
+ *  30:  24 |  70:   0 | 130:  35 | 170:   0 | 230:   0 | 270: 388 | 330:   0 | 370:  30
+ *  31:  36 |  71:   0 | 131:   0 | 171:   1 | 231:   0 | 271:  12 | 331:   6 | 371:   1
+ *  32:   4 |  72:   0 | 132:   0 | 172:   0 | 232:   0 | 272:   8 | 332:  70 | 372:   0
+ *  33:   0 |  73:   0 | 133:   0 | 173:   0 | 233:   0 | 273: 183 | 333: 104 | 373:  30
+ *  34:   6 |  74:   6 | 134:   0 | 174:   0 | 234:   0 | 274:   6 | 334:   2 | 374:  30
+ *  35:   2 |  75:   0 | 135:   0 | 175:  35 | 235:   0 | 275:  94 | 335:   8 | 375:  26
+ *  36:   0 |  76:   0 | 136:   0 | 176:  88 | 236:   0 | 276:  12 | 336:   8 | 376:  24
+ *  37:   0 |  77:   0 | 137:   0 | 177:  53 | 237:   0 | 277:   0 | 337:   0 | 377:   0
+ */

_service:tar_scm:nasm-2.16.03.tar.xz/x86/insnsd.c Added

@@ -0,0 +1,29987 @@
+/* This file auto-generated from insns.dat by insns.pl - don't edit it */
+
+#include "nasm.h"
+#include "insns.h"
+
+static const struct itemplate instrux = {
+    /*    0 */ {I_RESB, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49431, 0},
+    /*    1 */ {I_RESW, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49431, 0},
+    /*    2 */ {I_RESD, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49431, 0},
+    /*    3 */ {I_RESQ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49431, 0},
+    /*    4 */ {I_REST, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49431, 0},
+    /*    5 */ {I_RESO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49431, 0},
+    /*    6 */ {I_RESY, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49431, 0},
+    /*    7 */ {I_RESZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49431, 0},
+    /*    8 */ {I_AAA, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50293, 1},
+    /*    9 */ {I_AAD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49293, 1},
+    /*   10 */ {I_AAD, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49297, 2},
+    /*   11 */ {I_AAM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49301, 1},
+    /*   12 */ {I_AAM, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49305, 2},
+    /*   13 */ {I_AAS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50296, 1},
+    /*   14 */ {I_ADC, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+47363, 3},
+    /*   15 */ {I_ADC, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+47364, 0},
+    /*   16 */ {I_ADC, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42833, 3},
+    /*   17 */ {I_ADC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42834, 0},
+    /*   18 */ {I_ADC, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42839, 4},
+    /*   19 */ {I_ADC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42840, 5},
+    /*   20 */ {I_ADC, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42845, 6},
+    /*   21 */ {I_ADC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42846, 7},
+    /*   22 */ {I_ADC, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+36389, 8},
+    /*   23 */ {I_ADC, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+36389, 0},
+    /*   24 */ {I_ADC, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47368, 8},
+    /*   25 */ {I_ADC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+47368, 0},
+    /*   26 */ {I_ADC, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47373, 9},
+    /*   27 */ {I_ADC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+47373, 5},
+    /*   28 */ {I_ADC, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47378, 10},
+    /*   29 */ {I_ADC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+47378, 7},
+    /*   30 */ {I_ADC, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32872, 11},
+    /*   31 */ {I_ADC, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32879, 12},
+    /*   32 */ {I_ADC, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32886, 13},
+    /*   33 */ {I_ADC, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49309, 8},
+    /*   34 */ {I_ADC, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47383, 8},
+    /*   35 */ {I_ADC, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47388, 9},
+    /*   36 */ {I_ADC, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47393, 10},
+    /*   37 */ {I_ADC, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42851, 3},
+    /*   38 */ {I_ADC, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32893, 3},
+    /*   39 */ {I_ADC, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32900, 4},
+    /*   40 */ {I_ADC, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32907, 6},
+    /*   41 */ {I_ADC, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+32893, 3},
+    /*   42 */ {I_ADC, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+32900, 4},
+    /*   43 */ {I_ADD, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+47398, 3},
+    /*   44 */ {I_ADD, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+47399, 0},
+    /*   45 */ {I_ADD, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42863, 3},
+    /*   46 */ {I_ADD, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42864, 0},
+    /*   47 */ {I_ADD, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42869, 4},
+    /*   48 */ {I_ADD, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42870, 5},
+    /*   49 */ {I_ADD, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42875, 6},
+    /*   50 */ {I_ADD, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42876, 7},
+    /*   51 */ {I_ADD, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+40162, 8},
+    /*   52 */ {I_ADD, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+40162, 0},
+    /*   53 */ {I_ADD, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47403, 8},
+    /*   54 */ {I_ADD, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+47403, 0},
+    /*   55 */ {I_ADD, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47408, 9},
+    /*   56 */ {I_ADD, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+47408, 5},
+    /*   57 */ {I_ADD, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47413, 10},
+    /*   58 */ {I_ADD, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+47413, 7},
+    /*   59 */ {I_ADD, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32914, 11},
+    /*   60 */ {I_ADD, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32921, 12},
+    /*   61 */ {I_ADD, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32928, 13},
+    /*   62 */ {I_ADD, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49313, 8},
+    /*   63 */ {I_ADD, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47418, 8},
+    /*   64 */ {I_ADD, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47423, 9},
+    /*   65 */ {I_ADD, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47428, 10},
+    /*   66 */ {I_ADD, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42881, 3},
+    /*   67 */ {I_ADD, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32935, 3},
+    /*   68 */ {I_ADD, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32942, 4},
+    /*   69 */ {I_ADD, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32949, 6},
+    /*   70 */ {I_ADD, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42881, 3},
+    /*   71 */ {I_ADD, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+32935, 3},
+    /*   72 */ {I_ADD, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+32942, 4},
+    /*   73 */ {I_AND, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+47433, 3},
+    /*   74 */ {I_AND, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+47434, 0},
+    /*   75 */ {I_AND, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42893, 3},
+    /*   76 */ {I_AND, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42894, 0},
+    /*   77 */ {I_AND, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42899, 4},
+    /*   78 */ {I_AND, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42900, 5},
+    /*   79 */ {I_AND, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42905, 6},
+    /*   80 */ {I_AND, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42906, 7},
+    /*   81 */ {I_AND, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+40442, 8},
+    /*   82 */ {I_AND, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+40442, 0},
+    /*   83 */ {I_AND, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47438, 8},
+    /*   84 */ {I_AND, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+47438, 0},
+    /*   85 */ {I_AND, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47443, 9},
+    /*   86 */ {I_AND, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+47443, 5},
+    /*   87 */ {I_AND, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47448, 10},
+    /*   88 */ {I_AND, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+47448, 7},
+    /*   89 */ {I_AND, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32956, 11},
+    /*   90 */ {I_AND, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32963, 12},
+    /*   91 */ {I_AND, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32970, 13},
+    /*   92 */ {I_AND, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49317, 8},
+    /*   93 */ {I_AND, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47453, 8},
+    /*   94 */ {I_AND, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47458, 9},
+    /*   95 */ {I_AND, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47463, 10},
+    /*   96 */ {I_AND, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42911, 3},
+    /*   97 */ {I_AND, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32977, 3},
+    /*   98 */ {I_AND, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32984, 4},
+    /*   99 */ {I_AND, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32991, 6},
+    /*  100 */ {I_AND, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42911, 3},
+    /*  101 */ {I_AND, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+32977, 3},
+    /*  102 */ {I_AND, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+32984, 4},
+    /*  103 */ {I_ARPL, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29260, 15},
+    /*  104 */ {I_ARPL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29260, 16},
+    /*  105 */ {I_BOUND, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47468, 18},
+    /*  106 */ {I_BOUND, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47473, 19},
+    /*  107 */ {I_BSF, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+32998, 9},
+    /*  108 */ {I_BSF, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+32998, 5},
+    /*  109 */ {I_BSF, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33005, 9},
+    /*  110 */ {I_BSF, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33005, 5},
+    /*  111 */ {I_BSF, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33012, 10},
+    /*  112 */ {I_BSF, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33012, 7},
+    /*  113 */ {I_BSR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33019, 9},
+    /*  114 */ {I_BSR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33019, 5},
+    /*  115 */ {I_BSR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33026, 9},
+    /*  116 */ {I_BSR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33026, 5},
+    /*  117 */ {I_BSR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33033, 10},
+    /*  118 */ {I_BSR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33033, 7},
+    /*  119 */ {I_BSWAP, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42923, 20},
+    /*  120 */ {I_BSWAP, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42929, 7},
+    /*  121 */ {I_BT, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42935, 9},
+    /*  122 */ {I_BT, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42935, 5},
+    /*  123 */ {I_BT, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42941, 9},
+    /*  124 */ {I_BT, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42941, 5},
+    /*  125 */ {I_BT, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42947, 10},
+    /*  126 */ {I_BT, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42947, 7},
+    /*  127 */ {I_BT, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33040, 5},
+    /*  128 */ {I_BT, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33047, 5},
+    /*  129 */ {I_BT, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33054, 7},
+    /*  130 */ {I_BTC, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33061, 4},
+    /*  131 */ {I_BTC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33062, 5},
+    /*  132 */ {I_BTC, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33068, 4},
+    /*  133 */ {I_BTC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33069, 5},
+    /*  134 */ {I_BTC, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33075, 6},
+    /*  135 */ {I_BTC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33076, 7},
+    /*  136 */ {I_BTC, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12304, 12},
+    /*  137 */ {I_BTC, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12312, 12},
+    /*  138 */ {I_BTC, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12320, 13},
+    /*  139 */ {I_BTR, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33082, 4},
+    /*  140 */ {I_BTR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33083, 5},
+    /*  141 */ {I_BTR, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33089, 4},
+    /*  142 */ {I_BTR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33090, 5},
+    /*  143 */ {I_BTR, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33096, 6},
+    /*  144 */ {I_BTR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33097, 7},
+    /*  145 */ {I_BTR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12328, 12},
+    /*  146 */ {I_BTR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12336, 12},
+    /*  147 */ {I_BTR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12344, 13},
+    /*  148 */ {I_BTS, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33103, 4},
+    /*  149 */ {I_BTS, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33104, 5},
+    /*  150 */ {I_BTS, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33110, 4},
+    /*  151 */ {I_BTS, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33111, 5},
+    /*  152 */ {I_BTS, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33117, 6},
+    /*  153 */ {I_BTS, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33118, 7},
+    /*  154 */ {I_BTS, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12352, 12},
+    /*  155 */ {I_BTS, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12360, 12},
+    /*  156 */ {I_BTS, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12368, 13},
+    /*  157 */ {I_CALL, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47478, 21},
+    /*  158 */ {I_CALL, 1, {IMMEDIATE|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47483, 22},
+    /*  159 */ {I_CALL, 1, {IMMEDIATE|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47488, 23},
+    /*  160 */ {I_CALL, 1, {IMMEDIATE|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47493, 24},
+    /*  161 */ {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42971, 1},
+    /*  162 */ {I_CALL, 2, {IMMEDIATE|BITS16|COLON,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42977, 1},
+    /*  163 */ {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42977, 1},
+    /*  164 */ {I_CALL, 2, {IMMEDIATE|BITS32|COLON,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42983, 19},
+    /*  165 */ {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42983, 19},
+    /*  166 */ {I_CALL, 1, {MEMORY|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47498, 1},
+    /*  167 */ {I_CALL, 1, {MEMORY|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47503, 7},
+    /*  168 */ {I_CALL, 1, {MEMORY|BITS16|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47508, 0},
+    /*  169 */ {I_CALL, 1, {MEMORY|BITS32|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47513, 5},
+    /*  170 */ {I_CALL, 1, {MEMORY|BITS64|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47503, 7},
+    /*  171 */ {I_CALL, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47518, 21},
+    /*  172 */ {I_CALL, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47523, 22},
+    /*  173 */ {I_CALL, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47528, 23},
+    /*  174 */ {I_CALL, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47533, 24},
+    /*  175 */ {I_CBW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49329, 0},
+    /*  176 */ {I_CDQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49333, 5},
+    /*  177 */ {I_CDQE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49337, 7},
+    /*  178 */ {I_CLC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48935, 0},
+    /*  179 */ {I_CLD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46088, 0},
+    /*  180 */ {I_CLI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48250, 0},
+    /*  181 */ {I_CLTS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49341, 25},
+    /*  182 */ {I_CMC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50299, 0},
+    /*  183 */ {I_CMP, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+49345, 8},
+    /*  184 */ {I_CMP, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+49345, 0},
+    /*  185 */ {I_CMP, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+47538, 8},
+    /*  186 */ {I_CMP, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+47538, 0},
+    /*  187 */ {I_CMP, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+47543, 9},
+    /*  188 */ {I_CMP, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+47543, 5},
+    /*  189 */ {I_CMP, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+47548, 10},
+    /*  190 */ {I_CMP, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+47548, 7},
+    /*  191 */ {I_CMP, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+40400, 8},
+    /*  192 */ {I_CMP, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+40400, 0},
+    /*  193 */ {I_CMP, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47553, 8},
+    /*  194 */ {I_CMP, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+47553, 0},
+    /*  195 */ {I_CMP, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47558, 9},
+    /*  196 */ {I_CMP, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+47558, 5},
+    /*  197 */ {I_CMP, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47563, 10},
+    /*  198 */ {I_CMP, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+47563, 7},
+    /*  199 */ {I_CMP, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42989, 0},
+    /*  200 */ {I_CMP, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42995, 5},
+    /*  201 */ {I_CMP, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43001, 7},
+    /*  202 */ {I_CMP, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49349, 8},
+    /*  203 */ {I_CMP, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47568, 8},
+    /*  204 */ {I_CMP, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47573, 9},
+    /*  205 */ {I_CMP, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47578, 10},
+    /*  206 */ {I_CMP, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47583, 8},
+    /*  207 */ {I_CMP, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43007, 8},
+    /*  208 */ {I_CMP, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43013, 9},
+    /*  209 */ {I_CMP, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43019, 10},
+    /*  210 */ {I_CMP, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+47583, 8},
+    /*  211 */ {I_CMP, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43007, 8},
+    /*  212 */ {I_CMP, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43013, 9},
+    /*  213 */ {I_CMPSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49353, 0},
+    /*  214 */ {I_CMPSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47593, 5},
+    /*  215 */ {I_CMPSQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47598, 7},
+    /*  216 */ {I_CMPSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47603, 0},
+    /*  217 */ {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43025, 27},
+    /*  218 */ {I_CMPXCHG, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43026, 28},
+    /*  219 */ {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33124, 27},
+    /*  220 */ {I_CMPXCHG, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33125, 28},
+    /*  221 */ {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33131, 27},
+    /*  222 */ {I_CMPXCHG, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33132, 28},
+    /*  223 */ {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33138, 6},
+    /*  224 */ {I_CMPXCHG, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33139, 7},
+    /*  225 */ {I_CMPXCHG8B, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33145, 31},
+    /*  226 */ {I_CMPXCHG16B, 1, {MEMORY|BITS128,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43043, 13},
+    /*  227 */ {I_CPUID, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49357, 28},
+    /*  228 */ {I_CPU_READ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49361, 32},
+    /*  229 */ {I_CPU_WRITE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49365, 32},
+    /*  230 */ {I_CQO, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49369, 7},
+    /*  231 */ {I_CWD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49373, 0},
+    /*  232 */ {I_CWDE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49377, 5},
+    /*  233 */ {I_DAA, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50302, 1},
+    /*  234 */ {I_DAS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50305, 1},
+    /*  235 */ {I_DEC, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49381, 1},
+    /*  236 */ {I_DEC, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49385, 19},
+    /*  237 */ {I_DEC, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47613, 11},
+    /*  238 */ {I_DEC, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43049, 11},
+    /*  239 */ {I_DEC, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43055, 12},
+    /*  240 */ {I_DEC, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43061, 13},
+    /*  241 */ {I_DIV, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49389, 0},
+    /*  242 */ {I_DIV, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47618, 0},
+    /*  243 */ {I_DIV, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47623, 5},
+    /*  244 */ {I_DIV, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47628, 7},
+    /*  245 */ {I_DMINT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49393, 33},
+    /*  246 */ {I_EMMS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49397, 34},
+    /*  247 */ {I_ENTER, 2, {IMMEDIATE,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47633, 35},
+    /*  248 */ {I_EQU, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50334, 0},
+    /*  249 */ {I_EQU, 2, {IMMEDIATE|COLON,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+50334, 0},
+    /*  250 */ {I_F2XM1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49401, 36},
+    /*  251 */ {I_FABS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49405, 36},
+    /*  252 */ {I_FADD, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49409, 36},
+    /*  253 */ {I_FADD, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49413, 36},
+    /*  254 */ {I_FADD, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47638, 36},
+    /*  255 */ {I_FADD, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47643, 36},
+    /*  256 */ {I_FADD, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47638, 36},
+    /*  257 */ {I_FADD, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47648, 36},
+    /*  258 */ {I_FADDP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47653, 36},
+    /*  259 */ {I_FADDP, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47653, 36},
+    /*  260 */ {I_FBLD, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49421, 36},
+    /*  261 */ {I_FBLD, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49421, 36},
+    /*  262 */ {I_FBSTP, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49425, 36},
+    /*  263 */ {I_FBSTP, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49425, 36},
+    /*  264 */ {I_FCHS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49429, 36},
+    /*  265 */ {I_FCLEX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47658, 36},
+    /*  266 */ {I_FCMOVB, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47663, 37},
+    /*  267 */ {I_FCMOVB, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47668, 37},
+    /*  268 */ {I_FCMOVBE, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47673, 37},
+    /*  269 */ {I_FCMOVBE, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47678, 37},
+    /*  270 */ {I_FCMOVE, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47683, 37},
+    /*  271 */ {I_FCMOVE, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47688, 37},
+    /*  272 */ {I_FCMOVNB, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47693, 37},
+    /*  273 */ {I_FCMOVNB, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47698, 37},
+    /*  274 */ {I_FCMOVNBE, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47703, 37},
+    /*  275 */ {I_FCMOVNBE, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47708, 37},
+    /*  276 */ {I_FCMOVNE, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47713, 37},
+    /*  277 */ {I_FCMOVNE, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47718, 37},
+    /*  278 */ {I_FCMOVNU, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47723, 37},
+    /*  279 */ {I_FCMOVNU, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47728, 37},
+    /*  280 */ {I_FCMOVU, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47733, 37},
+    /*  281 */ {I_FCMOVU, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47738, 37},
+    /*  282 */ {I_FCOM, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49465, 36},
+    /*  283 */ {I_FCOM, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49469, 36},
+    /*  284 */ {I_FCOM, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47743, 36},
+    /*  285 */ {I_FCOM, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47748, 36},
+    /*  286 */ {I_FCOMI, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47753, 37},
+    /*  287 */ {I_FCOMI, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47758, 37},
+    /*  288 */ {I_FCOMIP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47763, 37},
+    /*  289 */ {I_FCOMIP, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47768, 37},
+    /*  290 */ {I_FCOMP, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49485, 36},
+    /*  291 */ {I_FCOMP, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49489, 36},
+    /*  292 */ {I_FCOMP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47773, 36},
+    /*  293 */ {I_FCOMP, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47778, 36},
+    /*  294 */ {I_FCOMPP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49497, 36},
+    /*  295 */ {I_FCOS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49501, 38},
+    /*  296 */ {I_FDECSTP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49505, 36},
+    /*  297 */ {I_FDISI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47783, 36},
+    /*  298 */ {I_FDIV, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49509, 36},
+    /*  299 */ {I_FDIV, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49513, 36},
+    /*  300 */ {I_FDIV, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47788, 36},
+    /*  301 */ {I_FDIV, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47793, 36},
+    /*  302 */ {I_FDIV, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47788, 36},
+    /*  303 */ {I_FDIV, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47798, 36},
+    /*  304 */ {I_FDIVP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47803, 36},
+    /*  305 */ {I_FDIVP, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47803, 36},
+    /*  306 */ {I_FDIVR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49521, 36},
+    /*  307 */ {I_FDIVR, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49525, 36},
+    /*  308 */ {I_FDIVR, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47808, 36},
+    /*  309 */ {I_FDIVR, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47808, 36},
+    /*  310 */ {I_FDIVR, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47813, 36},
+    /*  311 */ {I_FDIVR, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47818, 36},
+    /*  312 */ {I_FDIVRP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47823, 36},
+    /*  313 */ {I_FDIVRP, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47823, 36},
+    /*  314 */ {I_FEMMS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49533, 39},
+    /*  315 */ {I_FENI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47828, 36},
+    /*  316 */ {I_FFREE, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47833, 36},
+    /*  317 */ {I_FFREE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49537, 36},
+    /*  318 */ {I_FFREEP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47838, 40},
+    /*  319 */ {I_FFREEP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49541, 40},
+    /*  320 */ {I_FIADD, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49545, 36},
+    /*  321 */ {I_FIADD, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49549, 36},
+    /*  322 */ {I_FICOM, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49553, 36},
+    /*  323 */ {I_FICOM, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49557, 36},
+    /*  324 */ {I_FICOMP, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49561, 36},
+    /*  325 */ {I_FICOMP, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49565, 36},
+    /*  326 */ {I_FIDIV, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49569, 36},
+    /*  327 */ {I_FIDIV, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49573, 36},
+    /*  328 */ {I_FIDIVR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49577, 36},
+    /*  329 */ {I_FIDIVR, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49581, 36},
+    /*  330 */ {I_FILD, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49585, 36},
+    /*  331 */ {I_FILD, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49589, 36},
+    /*  332 */ {I_FILD, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49593, 36},
+    /*  333 */ {I_FIMUL, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49597, 36},
+    /*  334 */ {I_FIMUL, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49601, 36},
+    /*  335 */ {I_FINCSTP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49605, 36},
+    /*  336 */ {I_FINIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47843, 36},
+    /*  337 */ {I_FIST, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49609, 36},
+    /*  338 */ {I_FIST, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49613, 36},
+    /*  339 */ {I_FISTP, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49617, 36},
+    /*  340 */ {I_FISTP, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49621, 36},
+    /*  341 */ {I_FISTP, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49625, 36},
+    /*  342 */ {I_FISTTP, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49629, 41},
+    /*  343 */ {I_FISTTP, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49633, 41},
+    /*  344 */ {I_FISTTP, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49637, 41},
+    /*  345 */ {I_FISUB, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49641, 36},
+    /*  346 */ {I_FISUB, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49645, 36},
+    /*  347 */ {I_FISUBR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49649, 36},
+    /*  348 */ {I_FISUBR, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49653, 36},
+    /*  349 */ {I_FLD, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49657, 36},
+    /*  350 */ {I_FLD, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49661, 36},
+    /*  351 */ {I_FLD, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49665, 36},
+    /*  352 */ {I_FLD, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47848, 36},
+    /*  353 */ {I_FLD1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49673, 36},
+    /*  354 */ {I_FLDCW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49677, 42},
+    /*  355 */ {I_FLDENV, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49681, 36},
+    /*  356 */ {I_FLDL2E, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49685, 36},
+    /*  357 */ {I_FLDL2T, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49689, 36},
+    /*  358 */ {I_FLDLG2, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49693, 36},
+    /*  359 */ {I_FLDLN2, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49697, 36},
+    /*  360 */ {I_FLDPI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49701, 36},
+    /*  361 */ {I_FLDZ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49705, 36},
+    /*  362 */ {I_FMUL, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49709, 36},
+    /*  363 */ {I_FMUL, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49713, 36},
+    /*  364 */ {I_FMUL, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47853, 36},
+    /*  365 */ {I_FMUL, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47853, 36},
+    /*  366 */ {I_FMUL, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47858, 36},
+    /*  367 */ {I_FMUL, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47863, 36},
+    /*  368 */ {I_FMULP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47868, 36},
+    /*  369 */ {I_FMULP, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47868, 36},
+    /*  370 */ {I_FNCLEX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47659, 36},
+    /*  371 */ {I_FNDISI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47784, 36},
+    /*  372 */ {I_FNENI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47829, 36},
+    /*  373 */ {I_FNINIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47844, 36},
+    /*  374 */ {I_FNOP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49721, 36},
+    /*  375 */ {I_FNSAVE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47874, 36},
+    /*  376 */ {I_FNSTCW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47884, 42},
+    /*  377 */ {I_FNSTENV, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47889, 36},
+    /*  378 */ {I_FNSTSW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47899, 42},
+    /*  379 */ {I_FNSTSW, 1, {REG_AX,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47904, 43},
+    /*  380 */ {I_FPATAN, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49725, 36},
+    /*  381 */ {I_FPREM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49729, 36},
+    /*  382 */ {I_FPREM1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49733, 38},
+    /*  383 */ {I_FPTAN, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49737, 36},
+    /*  384 */ {I_FRNDINT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49741, 36},
+    /*  385 */ {I_FRSTOR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49745, 36},
+    /*  386 */ {I_FSAVE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47873, 36},
+    /*  387 */ {I_FSCALE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49749, 36},
+    /*  388 */ {I_FSETPM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49753, 43},
+    /*  389 */ {I_FSIN, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49757, 38},
+    /*  390 */ {I_FSINCOS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49761, 38},
+    /*  391 */ {I_FSQRT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49765, 36},
+    /*  392 */ {I_FST, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49769, 36},
+    /*  393 */ {I_FST, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49773, 36},
+    /*  394 */ {I_FST, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47878, 36},
+    /*  395 */ {I_FSTCW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47883, 42},
+    /*  396 */ {I_FSTENV, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47888, 36},
+    /*  397 */ {I_FSTP, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49781, 36},
+    /*  398 */ {I_FSTP, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49785, 36},
+    /*  399 */ {I_FSTP, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49789, 36},
+    /*  400 */ {I_FSTP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47893, 36},
+    /*  401 */ {I_FSTSW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47898, 42},
+    /*  402 */ {I_FSTSW, 1, {REG_AX,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47903, 43},
+    /*  403 */ {I_FSUB, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49797, 36},
+    /*  404 */ {I_FSUB, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49801, 36},
+    /*  405 */ {I_FSUB, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47908, 36},
+    /*  406 */ {I_FSUB, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47908, 36},
+    /*  407 */ {I_FSUB, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47913, 36},
+    /*  408 */ {I_FSUB, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47918, 36},
+    /*  409 */ {I_FSUBP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47923, 36},
+    /*  410 */ {I_FSUBP, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47923, 36},
+    /*  411 */ {I_FSUBR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49809, 36},
+    /*  412 */ {I_FSUBR, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49813, 36},
+    /*  413 */ {I_FSUBR, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47928, 36},
+    /*  414 */ {I_FSUBR, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47928, 36},
+    /*  415 */ {I_FSUBR, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47933, 36},
+    /*  416 */ {I_FSUBR, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47938, 36},
+    /*  417 */ {I_FSUBRP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47943, 36},
+    /*  418 */ {I_FSUBRP, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47943, 36},
+    /*  419 */ {I_FTST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49821, 36},
+    /*  420 */ {I_FUCOM, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47948, 38},
+    /*  421 */ {I_FUCOM, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47953, 38},
+    /*  422 */ {I_FUCOMI, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47958, 37},
+    /*  423 */ {I_FUCOMI, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47963, 37},
+    /*  424 */ {I_FUCOMIP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47968, 37},
+    /*  425 */ {I_FUCOMIP, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47973, 37},
+    /*  426 */ {I_FUCOMP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47978, 38},
+    /*  427 */ {I_FUCOMP, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47983, 38},
+    /*  428 */ {I_FUCOMPP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49841, 38},
+    /*  429 */ {I_FXAM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49845, 36},
+    /*  430 */ {I_FXCH, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47988, 36},
+    /*  431 */ {I_FXCH, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47988, 36},
+    /*  432 */ {I_FXCH, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47993, 36},
+    /*  433 */ {I_FXTRACT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49853, 36},
+    /*  434 */ {I_FYL2X, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49857, 36},
+    /*  435 */ {I_FYL2XP1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49861, 36},
+    /*  436 */ {I_HLT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50308, 44},
+    /*  437 */ {I_IDIV, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49865, 0},
+    /*  438 */ {I_IDIV, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47998, 0},
+    /*  439 */ {I_IDIV, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48003, 5},
+    /*  440 */ {I_IDIV, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48008, 7},
+    /*  441 */ {I_IMUL, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49869, 0},
+    /*  442 */ {I_IMUL, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48013, 0},
+    /*  443 */ {I_IMUL, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48018, 5},
+    /*  444 */ {I_IMUL, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48023, 7},
+    /*  445 */ {I_IMUL, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43067, 9},
+    /*  446 */ {I_IMUL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43067, 5},
+    /*  447 */ {I_IMUL, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43073, 9},
+    /*  448 */ {I_IMUL, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43073, 5},
+    /*  449 */ {I_IMUL, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43079, 10},
+    /*  450 */ {I_IMUL, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43079, 7},
+    /*  451 */ {I_IMUL, 3, {REG_GPR|BITS16,MEMORY,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+43085, 48},
+    /*  452 */ {I_IMUL, 3, {REG_GPR|BITS16,MEMORY,IMMEDIATE|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+43091, 49},
+    /*  453 */ {I_IMUL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+43085, 35},
+    /*  454 */ {I_IMUL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+43091, 35},
+    /*  455 */ {I_IMUL, 3, {REG_GPR|BITS32,MEMORY,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+43097, 50},
+    /*  456 */ {I_IMUL, 3, {REG_GPR|BITS32,MEMORY,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+43103, 9},
+    /*  457 */ {I_IMUL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+43097, 5},
+    /*  458 */ {I_IMUL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+43103, 5},
+    /*  459 */ {I_IMUL, 3, {REG_GPR|BITS64,MEMORY,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+43109, 51},
+    /*  460 */ {I_IMUL, 3, {REG_GPR|BITS64,MEMORY,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+43115, 51},
+    /*  461 */ {I_IMUL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+43109, 7},
+    /*  462 */ {I_IMUL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+43115, 7},
+    /*  463 */ {I_IMUL, 2, {REG_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43127, 35},
+    /*  464 */ {I_IMUL, 2, {REG_GPR|BITS16,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43133, 35},
+    /*  465 */ {I_IMUL, 2, {REG_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43139, 5},
+    /*  466 */ {I_IMUL, 2, {REG_GPR|BITS32,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43145, 5},
+    /*  467 */ {I_IMUL, 2, {REG_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43151, 7},
+    /*  468 */ {I_IMUL, 2, {REG_GPR|BITS64,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43157, 7},
+    /*  469 */ {I_IN, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49873, 52},
+    /*  470 */ {I_IN, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48028, 52},
+    /*  471 */ {I_IN, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48033, 53},
+    /*  472 */ {I_IN, 2, {REG_AL,REG_DX,0,0,0}, NO_DECORATOR, nasm_bytecodes+46196, 0},
+    /*  473 */ {I_IN, 2, {REG_AX,REG_DX,0,0,0}, NO_DECORATOR, nasm_bytecodes+49877, 0},
+    /*  474 */ {I_IN, 2, {REG_EAX,REG_DX,0,0,0}, NO_DECORATOR, nasm_bytecodes+49881, 5},
+    /*  475 */ {I_INC, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49885, 1},
+    /*  476 */ {I_INC, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49889, 19},
+    /*  477 */ {I_INC, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48038, 11},
+    /*  478 */ {I_INC, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43163, 11},
+    /*  479 */ {I_INC, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43169, 12},
+    /*  480 */ {I_INC, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43175, 13},
+    /*  481 */ {I_INSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50314, 35},
+    /*  482 */ {I_INSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49893, 5},
+    /*  483 */ {I_INSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49897, 35},
+    /*  484 */ {I_INT, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49901, 52},
+    /*  485 */ {I_INT1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50311, 5},
+    /*  486 */ {I_INT3, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50317, 0},
+    /*  487 */ {I_INTO, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50320, 1},
+    /*  488 */ {I_INVD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49905, 54},
+    /*  489 */ {I_INVPCID, 2, {REG_GPR|BITS32,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+33152, 55},
+    /*  490 */ {I_INVPCID, 2, {REG_GPR|BITS64,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+33152, 56},
+    /*  491 */ {I_INVLPG, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48043, 54},
+    /*  492 */ {I_INVLPGA, 2, {REG_AX,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43181, 57},
+    /*  493 */ {I_INVLPGA, 2, {REG_EAX,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43187, 58},
+    /*  494 */ {I_INVLPGA, 2, {REG_RAX,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33159, 59},
+    /*  495 */ {I_INVLPGA, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43188, 58},
+    /*  496 */ {I_IRET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49909, 0},
+    /*  497 */ {I_IRETD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49913, 5},
+    /*  498 */ {I_IRETQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49917, 7},
+    /*  499 */ {I_IRETW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49921, 0},
+    /*  500 */ {I_JCXZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48048, 1},
+    /*  501 */ {I_JECXZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48053, 5},
+    /*  502 */ {I_JRCXZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43193, 7},
+    /*  503 */ {I_JMP, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48059, 0},
+    /*  504 */ {I_JMP, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48063, 21},
+    /*  505 */ {I_JMP, 1, {IMMEDIATE|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48068, 22},
+    /*  506 */ {I_JMP, 1, {IMMEDIATE|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48073, 23},
+    /*  507 */ {I_JMP, 1, {IMMEDIATE|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48078, 24},
+    /*  508 */ {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43217, 1},
+    /*  509 */ {I_JMP, 2, {IMMEDIATE|BITS16|COLON,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43223, 1},
+    /*  510 */ {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43223, 1},
+    /*  511 */ {I_JMP, 2, {IMMEDIATE|BITS32|COLON,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43229, 19},
+    /*  512 */ {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43229, 19},
+    /*  513 */ {I_JMP, 1, {MEMORY|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48083, 1},
+    /*  514 */ {I_JMP, 1, {MEMORY|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48088, 7},
+    /*  515 */ {I_JMP, 1, {MEMORY|BITS16|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48093, 0},
+    /*  516 */ {I_JMP, 1, {MEMORY|BITS32|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48098, 5},
+    /*  517 */ {I_JMP, 1, {MEMORY|BITS64|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48088, 7},
+    /*  518 */ {I_JMP, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48103, 21},
+    /*  519 */ {I_JMP, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48108, 22},
+    /*  520 */ {I_JMP, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48113, 23},
+    /*  521 */ {I_JMP, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48118, 24},
+    /*  522 */ {I_JMPE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43235, 60},
+    /*  523 */ {I_JMPE, 1, {IMMEDIATE|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43241, 60},
+    /*  524 */ {I_JMPE, 1, {IMMEDIATE|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43247, 60},
+    /*  525 */ {I_JMPE, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43253, 60},
+    /*  526 */ {I_JMPE, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43259, 60},
+    /*  527 */ {I_LAHF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50323, 0},
+    /*  528 */ {I_LAR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43265, 61},
+    /*  529 */ {I_LAR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43265, 62},
+    /*  530 */ {I_LAR, 2, {REG_GPR|BITS16,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43265, 63},
+    /*  531 */ {I_LAR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43271, 65},
+    /*  532 */ {I_LAR, 2, {REG_GPR|BITS32,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43271, 63},
+    /*  533 */ {I_LAR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43271, 63},
+    /*  534 */ {I_LAR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43277, 66},
+    /*  535 */ {I_LAR, 2, {REG_GPR|BITS64,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43277, 64},
+    /*  536 */ {I_LAR, 2, {REG_GPR|BITS64,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43277, 64},
+    /*  537 */ {I_LAR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43277, 64},
+    /*  538 */ {I_LDS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48123, 1},
+    /*  539 */ {I_LDS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48128, 19},
+    /*  540 */ {I_LEA, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48133, 67},
+    /*  541 */ {I_LEA, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48138, 68},
+    /*  542 */ {I_LEA, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48143, 69},
+    /*  543 */ {I_LEAVE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48395, 35},
+    /*  544 */ {I_LES, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48148, 1},
+    /*  545 */ {I_LES, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48153, 19},
+    /*  546 */ {I_LFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43283, 59},
+    /*  547 */ {I_LFS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43289, 5},
+    /*  548 */ {I_LFS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43295, 5},
+    /*  549 */ {I_LFS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43301, 7},
+    /*  550 */ {I_LGDT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48158, 25},
+    /*  551 */ {I_LGS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43307, 5},
+    /*  552 */ {I_LGS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43313, 5},
+    /*  553 */ {I_LGS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43319, 7},
+    /*  554 */ {I_LIDT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48163, 25},
+    /*  555 */ {I_LLDT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48168, 70},
+    /*  556 */ {I_LLDT, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48168, 70},
+    /*  557 */ {I_LLDT, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48168, 70},
+    /*  558 */ {I_LMSW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48173, 25},
+    /*  559 */ {I_LMSW, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48173, 25},
+    /*  560 */ {I_LMSW, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48173, 25},
+    /*  561 */ {I_LODSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50326, 0},
+    /*  562 */ {I_LODSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49933, 5},
+    /*  563 */ {I_LODSQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49937, 7},
+    /*  564 */ {I_LODSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49941, 0},
+    /*  565 */ {I_LOOP, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48178, 0},
+    /*  566 */ {I_LOOP, 2, {IMMEDIATE,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48183, 1},
+    /*  567 */ {I_LOOP, 2, {IMMEDIATE,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48188, 5},
+    /*  568 */ {I_LOOP, 2, {IMMEDIATE,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48193, 7},
+    /*  569 */ {I_LOOPE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48198, 0},
+    /*  570 */ {I_LOOPE, 2, {IMMEDIATE,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48203, 1},
+    /*  571 */ {I_LOOPE, 2, {IMMEDIATE,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48208, 5},
+    /*  572 */ {I_LOOPE, 2, {IMMEDIATE,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48213, 7},
+    /*  573 */ {I_LOOPNE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48218, 0},
+    /*  574 */ {I_LOOPNE, 2, {IMMEDIATE,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48223, 1},
+    /*  575 */ {I_LOOPNE, 2, {IMMEDIATE,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48228, 5},
+    /*  576 */ {I_LOOPNE, 2, {IMMEDIATE,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48233, 7},
+    /*  577 */ {I_LOOPNZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48218, 0},
+    /*  578 */ {I_LOOPNZ, 2, {IMMEDIATE,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48223, 1},
+    /*  579 */ {I_LOOPNZ, 2, {IMMEDIATE,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48228, 5},
+    /*  580 */ {I_LOOPNZ, 2, {IMMEDIATE,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48233, 7},
+    /*  581 */ {I_LOOPZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48198, 0},
+    /*  582 */ {I_LOOPZ, 2, {IMMEDIATE,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48203, 1},
+    /*  583 */ {I_LOOPZ, 2, {IMMEDIATE,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48208, 5},
+    /*  584 */ {I_LOOPZ, 2, {IMMEDIATE,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48213, 7},
+    /*  585 */ {I_LSL, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43325, 61},
+    /*  586 */ {I_LSL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43325, 62},
+    /*  587 */ {I_LSL, 2, {REG_GPR|BITS16,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43325, 63},
+    /*  588 */ {I_LSL, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43331, 65},
+    /*  589 */ {I_LSL, 2, {REG_GPR|BITS32,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43331, 63},
+    /*  590 */ {I_LSL, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43331, 63},
+    /*  591 */ {I_LSL, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43337, 66},
+    /*  592 */ {I_LSL, 2, {REG_GPR|BITS64,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43337, 64},
+    /*  593 */ {I_LSL, 2, {REG_GPR|BITS64,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43337, 64},
+    /*  594 */ {I_LSL, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43337, 64},
+    /*  595 */ {I_LSS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43343, 5},
+    /*  596 */ {I_LSS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43349, 5},
+    /*  597 */ {I_LSS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43355, 7},
+    /*  598 */ {I_LTR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48238, 70},
+    /*  599 */ {I_LTR, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48238, 70},
+    /*  600 */ {I_LTR, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48238, 70},
+    /*  601 */ {I_MFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43361, 59},
+    /*  602 */ {I_MONITOR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48243, 72},
+    /*  603 */ {I_MONITORX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48248, 74},
+    /*  604 */ {I_MOV, 2, {MEMORY,REG_SREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+48269, 75},
+    /*  605 */ {I_MOV, 2, {REG_GPR|BITS16,REG_SREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+48253, 0},
+    /*  606 */ {I_MOV, 2, {REG_GPR|BITS32,REG_SREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+48258, 5},
+    /*  607 */ {I_MOV, 2, {RM_GPR|BITS64,REG_SREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+48268, 7},
+    /*  608 */ {I_MOV, 2, {REG_SREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48289, 75},
+    /*  609 */ {I_MOV, 2, {REG_SREG,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+48278, 0},
+    /*  610 */ {I_MOV, 2, {REG_SREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48283, 5},
+    /*  611 */ {I_MOV, 2, {REG_SREG,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+48288, 7},
+    /*  612 */ {I_MOV, 2, {REG_AL,MEM_OFFS,0,0,0}, NO_DECORATOR, nasm_bytecodes+49945, 8},
+    /*  613 */ {I_MOV, 2, {REG_AX,MEM_OFFS,0,0,0}, NO_DECORATOR, nasm_bytecodes+48293, 8},
+    /*  614 */ {I_MOV, 2, {REG_EAX,MEM_OFFS,0,0,0}, NO_DECORATOR, nasm_bytecodes+48298, 9},
+    /*  615 */ {I_MOV, 2, {REG_RAX,MEM_OFFS,0,0,0}, NO_DECORATOR, nasm_bytecodes+48303, 10},
+    /*  616 */ {I_MOV, 2, {MEM_OFFS,REG_AL,0,0,0}, NO_DECORATOR, nasm_bytecodes+49949, 79},
+    /*  617 */ {I_MOV, 2, {MEM_OFFS,REG_AX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48308, 79},
+    /*  618 */ {I_MOV, 2, {MEM_OFFS,REG_EAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48313, 80},
+    /*  619 */ {I_MOV, 2, {MEM_OFFS,REG_RAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48318, 81},
+    /*  620 */ {I_MOV, 2, {REG_GPR|BITS32,REG_CREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+43367, 82},
+    /*  621 */ {I_MOV, 2, {REG_GPR|BITS64,REG_CREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+43373, 83},
+    /*  622 */ {I_MOV, 2, {REG_CREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43379, 82},
+    /*  623 */ {I_MOV, 2, {REG_CREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43385, 83},
+    /*  624 */ {I_MOV, 2, {REG_GPR|BITS32,REG_DREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+43392, 82},
+    /*  625 */ {I_MOV, 2, {REG_GPR|BITS64,REG_DREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+43391, 83},
+    /*  626 */ {I_MOV, 2, {REG_DREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43398, 82},
+    /*  627 */ {I_MOV, 2, {REG_DREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43397, 83},
+    /*  628 */ {I_MOV, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48333, 8},
+    /*  629 */ {I_MOV, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48334, 0},
+    /*  630 */ {I_MOV, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43403, 8},
+    /*  631 */ {I_MOV, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43404, 0},
+    /*  632 */ {I_MOV, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43409, 9},
+    /*  633 */ {I_MOV, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43410, 5},
+    /*  634 */ {I_MOV, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43415, 10},
+    /*  635 */ {I_MOV, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43416, 7},
+    /*  636 */ {I_MOV, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+49953, 8},
+    /*  637 */ {I_MOV, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+49953, 0},
+    /*  638 */ {I_MOV, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48338, 8},
+    /*  639 */ {I_MOV, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+48338, 0},
+    /*  640 */ {I_MOV, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48343, 9},
+    /*  641 */ {I_MOV, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48343, 5},
+    /*  642 */ {I_MOV, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48348, 10},
+    /*  643 */ {I_MOV, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+48348, 7},
+    /*  644 */ {I_MOV, 2, {REG_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49957, 8},
+    /*  645 */ {I_MOV, 2, {REG_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48353, 8},
+    /*  646 */ {I_MOV, 2, {REG_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48358, 9},
+    /*  647 */ {I_MOV, 2, {REG_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48368, 10},
+    /*  648 */ {I_MOV, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43421, 8},
+    /*  649 */ {I_MOV, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33194, 8},
+    /*  650 */ {I_MOV, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33201, 9},
+    /*  651 */ {I_MOV, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33208, 10},
+    /*  652 */ {I_MOV, 2, {RM_GPR|BITS64,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33208, 7},
+    /*  653 */ {I_MOV, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43421, 8},
+    /*  654 */ {I_MOV, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33194, 8},
+    /*  655 */ {I_MOV, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33201, 9},
+    /*  656 */ {I_MOVD, 2, {MMXREG,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43427, 85},
+    /*  657 */ {I_MOVD, 2, {RM_GPR|BITS32,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+43433, 85},
+    /*  658 */ {I_MOVQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43439, 87},
+    /*  659 */ {I_MOVQ, 2, {RM_MMX,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+43445, 87},
+    /*  660 */ {I_MOVQ, 2, {MMXREG,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33215, 88},
+    /*  661 */ {I_MOVQ, 2, {RM_GPR|BITS64,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+33222, 88},
+    /*  662 */ {I_MOVSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12437, 0},
+    /*  663 */ {I_MOVSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49961, 5},
+    /*  664 */ {I_MOVSQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49965, 7},
+    /*  665 */ {I_MOVSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49969, 0},
+    /*  666 */ {I_MOVSX, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43451, 53},
+    /*  667 */ {I_MOVSX, 2, {REG_GPR|BITS16,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43451, 5},
+    /*  668 */ {I_MOVSX, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43457, 5},
+    /*  669 */ {I_MOVSX, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43463, 5},
+    /*  670 */ {I_MOVSX, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43469, 7},
+    /*  671 */ {I_MOVSX, 2, {REG_GPR|BITS64,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43475, 7},
+    /*  672 */ {I_MOVSXD, 2, {REG_GPR|BITS64,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48373, 7},
+    /*  673 */ {I_MOVZX, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43481, 53},
+    /*  674 */ {I_MOVZX, 2, {REG_GPR|BITS16,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43481, 5},
+    /*  675 */ {I_MOVZX, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43487, 5},
+    /*  676 */ {I_MOVZX, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43493, 5},
+    /*  677 */ {I_MOVZX, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43499, 7},
+    /*  678 */ {I_MOVZX, 2, {REG_GPR|BITS64,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43505, 7},
+    /*  679 */ {I_MUL, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49973, 0},
+    /*  680 */ {I_MUL, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48378, 0},
+    /*  681 */ {I_MUL, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48383, 5},
+    /*  682 */ {I_MUL, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48388, 7},
+    /*  683 */ {I_MWAIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48393, 72},
+    /*  684 */ {I_MWAITX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48398, 74},
+    /*  685 */ {I_NEG, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48403, 11},
+    /*  686 */ {I_NEG, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43511, 11},
+    /*  687 */ {I_NEG, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43517, 12},
+    /*  688 */ {I_NEG, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43523, 13},
+    /*  689 */ {I_NOP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48408, 0},
+    /*  690 */ {I_NOP, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43529, 89},
+    /*  691 */ {I_NOP, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43535, 89},
+    /*  692 */ {I_NOP, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43541, 7},
+    /*  693 */ {I_NOT, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48413, 11},
+    /*  694 */ {I_NOT, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43547, 11},
+    /*  695 */ {I_NOT, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43553, 12},
+    /*  696 */ {I_NOT, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43559, 13},
+    /*  697 */ {I_OR, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48418, 3},
+    /*  698 */ {I_OR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48419, 0},
+    /*  699 */ {I_OR, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43565, 3},
+    /*  700 */ {I_OR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43566, 0},
+    /*  701 */ {I_OR, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43571, 4},
+    /*  702 */ {I_OR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43572, 5},
+    /*  703 */ {I_OR, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43577, 6},
+    /*  704 */ {I_OR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43578, 7},
+    /*  705 */ {I_OR, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+40687, 8},
+    /*  706 */ {I_OR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+40687, 0},
+    /*  707 */ {I_OR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48423, 8},
+    /*  708 */ {I_OR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+48423, 0},
+    /*  709 */ {I_OR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48428, 9},
+    /*  710 */ {I_OR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48428, 5},
+    /*  711 */ {I_OR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48433, 10},
+    /*  712 */ {I_OR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+48433, 7},
+    /*  713 */ {I_OR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33229, 11},
+    /*  714 */ {I_OR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33236, 12},
+    /*  715 */ {I_OR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33243, 13},
+    /*  716 */ {I_OR, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49977, 8},
+    /*  717 */ {I_OR, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48438, 8},
+    /*  718 */ {I_OR, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48443, 9},
+    /*  719 */ {I_OR, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48448, 10},
+    /*  720 */ {I_OR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43583, 3},
+    /*  721 */ {I_OR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33250, 3},
+    /*  722 */ {I_OR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33257, 4},
+    /*  723 */ {I_OR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33264, 6},
+    /*  724 */ {I_OR, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43583, 3},
+    /*  725 */ {I_OR, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33250, 3},
+    /*  726 */ {I_OR, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33257, 4},
+    /*  727 */ {I_OUT, 2, {IMMEDIATE,REG_AL,0,0,0}, NO_DECORATOR, nasm_bytecodes+49981, 52},
+    /*  728 */ {I_OUT, 2, {IMMEDIATE,REG_AX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48453, 52},
+    /*  729 */ {I_OUT, 2, {IMMEDIATE,REG_EAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48458, 53},
+    /*  730 */ {I_OUT, 2, {REG_DX,REG_AL,0,0,0}, NO_DECORATOR, nasm_bytecodes+46178, 0},
+    /*  731 */ {I_OUT, 2, {REG_DX,REG_AX,0,0,0}, NO_DECORATOR, nasm_bytecodes+49985, 0},
+    /*  732 */ {I_OUT, 2, {REG_DX,REG_EAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+49989, 5},
+    /*  733 */ {I_OUTSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50329, 35},
+    /*  734 */ {I_OUTSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49993, 5},
+    /*  735 */ {I_OUTSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49997, 35},
+    /*  736 */ {I_PACKSSDW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33271, 87},
+    /*  737 */ {I_PACKSSWB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33278, 87},
+    /*  738 */ {I_PACKUSWB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33285, 87},
+    /*  739 */ {I_PADDB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33292, 87},
+    /*  740 */ {I_PADDD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33299, 87},
+    /*  741 */ {I_PADDSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33306, 87},
+    /*  742 */ {I_PADDSIW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43595, 90},
+    /*  743 */ {I_PADDSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33313, 87},
+    /*  744 */ {I_PADDUSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33320, 87},
+    /*  745 */ {I_PADDUSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33327, 87},
+    /*  746 */ {I_PADDW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33334, 87},
+    /*  747 */ {I_PAND, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33341, 87},
+    /*  748 */ {I_PANDN, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33348, 87},
+    /*  749 */ {I_PAUSE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50001, 0},
+    /*  750 */ {I_PAVEB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43601, 90},
+    /*  751 */ {I_PAVGUSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12376, 91},
+    /*  752 */ {I_PCMPEQB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33355, 87},
+    /*  753 */ {I_PCMPEQD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33362, 87},
+    /*  754 */ {I_PCMPEQW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33369, 87},
+    /*  755 */ {I_PCMPGTB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33376, 87},
+    /*  756 */ {I_PCMPGTD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33383, 87},
+    /*  757 */ {I_PCMPGTW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33390, 87},
+    /*  758 */ {I_PDISTIB, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45468, 92},
+    /*  759 */ {I_PF2ID, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12384, 91},
+    /*  760 */ {I_PFACC, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12392, 91},
+    /*  761 */ {I_PFADD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12400, 91},
+    /*  762 */ {I_PFCMPEQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12408, 91},
+    /*  763 */ {I_PFCMPGE, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12416, 91},
+    /*  764 */ {I_PFCMPGT, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12424, 91},
+    /*  765 */ {I_PFMAX, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12432, 91},
+    /*  766 */ {I_PFMIN, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12440, 91},
+    /*  767 */ {I_PFMUL, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12448, 91},
+    /*  768 */ {I_PFRCP, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12456, 91},
+    /*  769 */ {I_PFRCPIT1, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12464, 91},
+    /*  770 */ {I_PFRCPIT2, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12472, 91},
+    /*  771 */ {I_PFRSQIT1, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12480, 91},
+    /*  772 */ {I_PFRSQRT, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12488, 91},
+    /*  773 */ {I_PFSUB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12496, 91},
+    /*  774 */ {I_PFSUBR, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12504, 91},
+    /*  775 */ {I_PI2FD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12512, 91},
+    /*  776 */ {I_PMACHRIW, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45564, 92},
+    /*  777 */ {I_PMADDWD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33397, 87},
+    /*  778 */ {I_PMAGW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43607, 90},
+    /*  779 */ {I_PMULHRIW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43613, 90},
+    /*  780 */ {I_PMULHRWA, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12520, 91},
+    /*  781 */ {I_PMULHRWC, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43619, 90},
+    /*  782 */ {I_PMULHW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33404, 87},
+    /*  783 */ {I_PMULLW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33411, 87},
+    /*  784 */ {I_PMVGEZB, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45696, 90},
+    /*  785 */ {I_PMVLZB, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45552, 90},
+    /*  786 */ {I_PMVNZB, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45534, 90},
+    /*  787 */ {I_PMVZB, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45456, 90},
+    /*  788 */ {I_POP, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50005, 0},
+    /*  789 */ {I_POP, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50009, 19},
+    /*  790 */ {I_POP, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50013, 7},
+    /*  791 */ {I_POP, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48463, 0},
+    /*  792 */ {I_POP, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48468, 19},
+    /*  793 */ {I_POP, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48473, 7},
+    /*  794 */ {I_POP, 1, {REG_ES,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12813, 1},
+    /*  795 */ {I_POP, 1, {REG_SS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+7621, 1},
+    /*  796 */ {I_POP, 1, {REG_DS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+7765, 1},
+    /*  797 */ {I_POP, 1, {REG_FS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50017, 5},
+    /*  798 */ {I_POP, 1, {REG_GS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50021, 5},
+    /*  799 */ {I_POPA, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50025, 18},
+    /*  800 */ {I_POPAD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50029, 19},
+    /*  801 */ {I_POPAW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50033, 18},
+    /*  802 */ {I_POPF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50037, 0},
+    /*  803 */ {I_POPFD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50041, 19},
+    /*  804 */ {I_POPFQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50041, 7},
+    /*  805 */ {I_POPFW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50045, 0},
+    /*  806 */ {I_POR, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33418, 87},
+    /*  807 */ {I_PREFETCH, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48478, 91},
+    /*  808 */ {I_PREFETCHW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48483, 91},
+    /*  809 */ {I_PSLLD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33425, 87},
+    /*  810 */ {I_PSLLD, 2, {MMXREG,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33432, 34},
+    /*  811 */ {I_PSLLQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33439, 87},
+    /*  812 */ {I_PSLLQ, 2, {MMXREG,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33446, 34},
+    /*  813 */ {I_PSLLW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33453, 87},
+    /*  814 */ {I_PSLLW, 2, {MMXREG,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33460, 34},
+    /*  815 */ {I_PSRAD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33467, 87},
+    /*  816 */ {I_PSRAD, 2, {MMXREG,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33474, 34},
+    /*  817 */ {I_PSRAW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33481, 87},
+    /*  818 */ {I_PSRAW, 2, {MMXREG,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33488, 34},
+    /*  819 */ {I_PSRLD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33495, 87},
+    /*  820 */ {I_PSRLD, 2, {MMXREG,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33502, 34},
+    /*  821 */ {I_PSRLQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33509, 87},
+    /*  822 */ {I_PSRLQ, 2, {MMXREG,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33516, 34},
+    /*  823 */ {I_PSRLW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33523, 87},
+    /*  824 */ {I_PSRLW, 2, {MMXREG,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33530, 34},
+    /*  825 */ {I_PSUBB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33537, 87},
+    /*  826 */ {I_PSUBD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33544, 87},
+    /*  827 */ {I_PSUBSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33551, 87},
+    /*  828 */ {I_PSUBSIW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43625, 90},
+    /*  829 */ {I_PSUBSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33558, 87},
+    /*  830 */ {I_PSUBUSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33565, 87},
+    /*  831 */ {I_PSUBUSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33572, 87},
+    /*  832 */ {I_PSUBW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33579, 87},
+    /*  833 */ {I_PUNPCKHBW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33586, 87},
+    /*  834 */ {I_PUNPCKHDQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33593, 87},
+    /*  835 */ {I_PUNPCKHWD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33600, 87},
+    /*  836 */ {I_PUNPCKLBW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33607, 87},
+    /*  837 */ {I_PUNPCKLDQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33614, 87},
+    /*  838 */ {I_PUNPCKLWD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33621, 87},
+    /*  839 */ {I_PUSH, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50049, 0},
+    /*  840 */ {I_PUSH, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50053, 19},
+    /*  841 */ {I_PUSH, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50057, 7},
+    /*  842 */ {I_PUSH, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48488, 0},
+    /*  843 */ {I_PUSH, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48493, 19},
+    /*  844 */ {I_PUSH, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48498, 7},
+    /*  845 */ {I_PUSH, 1, {REG_ES,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12781, 1},
+    /*  846 */ {I_PUSH, 1, {REG_CS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+7477, 1},
+    /*  847 */ {I_PUSH, 1, {REG_SS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+7603, 1},
+    /*  848 */ {I_PUSH, 1, {REG_DS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+7747, 1},
+    /*  849 */ {I_PUSH, 1, {REG_FS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50061, 5},
+    /*  850 */ {I_PUSH, 1, {REG_GS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50065, 5},
+    /*  851 */ {I_PUSH, 1, {IMMEDIATE|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48524, 35},
+    /*  852 */ {I_PUSH, 1, {IMMEDIATE|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48508, 94},
+    /*  853 */ {I_PUSH, 1, {IMMEDIATE|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48518, 95},
+    /*  854 */ {I_PUSH, 1, {IMMEDIATE|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48518, 96},
+    /*  855 */ {I_PUSH, 1, {IMMEDIATE|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48528, 97},
+    /*  856 */ {I_PUSH, 1, {IMMEDIATE|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48528, 97},
+    /*  857 */ {I_PUSHA, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50069, 18},
+    /*  858 */ {I_PUSHAD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50073, 19},
+    /*  859 */ {I_PUSHAW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50077, 18},
+    /*  860 */ {I_PUSHF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50081, 0},
+    /*  861 */ {I_PUSHFD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50085, 19},
+    /*  862 */ {I_PUSHFQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50085, 7},
+    /*  863 */ {I_PUSHFW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50089, 0},
+    /*  864 */ {I_PXOR, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33628, 87},
+    /*  865 */ {I_RCL, 2, {RM_GPR|BITS8,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+50093, 0},
+    /*  866 */ {I_RCL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+50097, 0},
+    /*  867 */ {I_RCL, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48533, 35},
+    /*  868 */ {I_RCL, 2, {RM_GPR|BITS16,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48538, 0},
+    /*  869 */ {I_RCL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48543, 0},
+    /*  870 */ {I_RCL, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43631, 35},
+    /*  871 */ {I_RCL, 2, {RM_GPR|BITS32,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48548, 5},
+    /*  872 */ {I_RCL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48553, 5},
+    /*  873 */ {I_RCL, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43637, 5},
+    /*  874 */ {I_RCL, 2, {RM_GPR|BITS64,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48558, 7},
+    /*  875 */ {I_RCL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48563, 7},
+    /*  876 */ {I_RCL, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43643, 7},
+    /*  877 */ {I_RCR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+50101, 0},
+    /*  878 */ {I_RCR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+50105, 0},
+    /*  879 */ {I_RCR, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48568, 35},
+    /*  880 */ {I_RCR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48573, 0},
+    /*  881 */ {I_RCR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48578, 0},
+    /*  882 */ {I_RCR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43649, 35},
+    /*  883 */ {I_RCR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48583, 5},
+    /*  884 */ {I_RCR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48588, 5},
+    /*  885 */ {I_RCR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43655, 5},
+    /*  886 */ {I_RCR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48593, 7},
+    /*  887 */ {I_RCR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48598, 7},
+    /*  888 */ {I_RCR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43661, 7},
+    /*  889 */ {I_RDSHR, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43667, 98},
+    /*  890 */ {I_RDMSR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50109, 99},
+    /*  891 */ {I_RDPMC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50113, 89},
+    /*  892 */ {I_RDTSC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50117, 28},
+    /*  893 */ {I_RDTSCP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48603, 100},
+    /*  894 */ {I_RET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50138, 21},
+    /*  895 */ {I_RET, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48629, 101},
+    /*  896 */ {I_RETF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50142, 0},
+    /*  897 */ {I_RETF, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48634, 75},
+    /*  898 */ {I_RETN, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50138, 21},
+    /*  899 */ {I_RETN, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48629, 101},
+    /*  900 */ {I_RETW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50121, 21},
+    /*  901 */ {I_RETW, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48629, 101},
+    /*  902 */ {I_RETFW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50125, 0},
+    /*  903 */ {I_RETFW, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48608, 75},
+    /*  904 */ {I_RETNW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50121, 21},
+    /*  905 */ {I_RETNW, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48613, 101},
+    /*  906 */ {I_RETD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50129, 22},
+    /*  907 */ {I_RETD, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48618, 102},
+    /*  908 */ {I_RETFD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50133, 0},
+    /*  909 */ {I_RETFD, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48623, 75},
+    /*  910 */ {I_RETND, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50129, 22},
+    /*  911 */ {I_RETND, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48618, 102},
+    /*  912 */ {I_RETQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50137, 24},
+    /*  913 */ {I_RETQ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48628, 103},
+    /*  914 */ {I_RETFQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50141, 7},
+    /*  915 */ {I_RETFQ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48633, 104},
+    /*  916 */ {I_RETNQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50137, 24},
+    /*  917 */ {I_RETNQ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48628, 103},
+    /*  918 */ {I_ROL, 2, {RM_GPR|BITS8,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+50145, 0},
+    /*  919 */ {I_ROL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+50149, 0},
+    /*  920 */ {I_ROL, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48638, 35},
+    /*  921 */ {I_ROL, 2, {RM_GPR|BITS16,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48643, 0},
+    /*  922 */ {I_ROL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48648, 0},
+    /*  923 */ {I_ROL, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43673, 35},
+    /*  924 */ {I_ROL, 2, {RM_GPR|BITS32,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48653, 5},
+    /*  925 */ {I_ROL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48658, 5},
+    /*  926 */ {I_ROL, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43679, 5},
+    /*  927 */ {I_ROL, 2, {RM_GPR|BITS64,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48663, 7},
+    /*  928 */ {I_ROL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48668, 7},
+    /*  929 */ {I_ROL, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43685, 7},
+    /*  930 */ {I_ROR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+50153, 0},
+    /*  931 */ {I_ROR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+50157, 0},
+    /*  932 */ {I_ROR, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48673, 35},
+    /*  933 */ {I_ROR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48678, 0},
+    /*  934 */ {I_ROR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48683, 0},
+    /*  935 */ {I_ROR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43691, 35},
+    /*  936 */ {I_ROR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48688, 5},
+    /*  937 */ {I_ROR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48693, 5},
+    /*  938 */ {I_ROR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43697, 5},
+    /*  939 */ {I_ROR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48698, 7},
+    /*  940 */ {I_ROR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48703, 7},
+    /*  941 */ {I_ROR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43703, 7},
+    /*  942 */ {I_RSDC, 2, {REG_SREG,MEMORY|BITS80,0,0,0}, NO_DECORATOR, nasm_bytecodes+45834, 105},
+    /*  943 */ {I_RSLDT, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48708, 105},
+    /*  944 */ {I_RSM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50161, 106},
+    /*  945 */ {I_RSTS, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48713, 105},
+    /*  946 */ {I_SAHF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12405, 0},
+    /*  947 */ {I_SALC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49280, 107},
+    /*  948 */ {I_SAR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+50173, 0},
+    /*  949 */ {I_SAR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+50177, 0},
+    /*  950 */ {I_SAR, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48753, 35},
+    /*  951 */ {I_SAR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48758, 0},
+    /*  952 */ {I_SAR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48763, 0},
+    /*  953 */ {I_SAR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43727, 35},
+    /*  954 */ {I_SAR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48768, 5},
+    /*  955 */ {I_SAR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48773, 5},
+    /*  956 */ {I_SAR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43733, 5},
+    /*  957 */ {I_SAR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48778, 7},
+    /*  958 */ {I_SAR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48783, 7},
+    /*  959 */ {I_SAR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43739, 7},
+    /*  960 */ {I_SBB, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48788, 3},
+    /*  961 */ {I_SBB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48789, 0},
+    /*  962 */ {I_SBB, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43745, 3},
+    /*  963 */ {I_SBB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43746, 0},
+    /*  964 */ {I_SBB, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43751, 4},
+    /*  965 */ {I_SBB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43752, 5},
+    /*  966 */ {I_SBB, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43757, 6},
+    /*  967 */ {I_SBB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43758, 7},
+    /*  968 */ {I_SBB, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+35276, 8},
+    /*  969 */ {I_SBB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+35276, 0},
+    /*  970 */ {I_SBB, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48793, 8},
+    /*  971 */ {I_SBB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+48793, 0},
+    /*  972 */ {I_SBB, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48798, 9},
+    /*  973 */ {I_SBB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48798, 5},
+    /*  974 */ {I_SBB, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48803, 10},
+    /*  975 */ {I_SBB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+48803, 7},
+    /*  976 */ {I_SBB, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33635, 11},
+    /*  977 */ {I_SBB, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33642, 12},
+    /*  978 */ {I_SBB, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33649, 13},
+    /*  979 */ {I_SBB, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+50181, 8},
+    /*  980 */ {I_SBB, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48808, 8},
+    /*  981 */ {I_SBB, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48813, 9},
+    /*  982 */ {I_SBB, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48818, 10},
+    /*  983 */ {I_SBB, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43763, 3},
+    /*  984 */ {I_SBB, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33656, 3},
+    /*  985 */ {I_SBB, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33663, 4},
+    /*  986 */ {I_SBB, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33670, 6},
+    /*  987 */ {I_SBB, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43763, 3},
+    /*  988 */ {I_SBB, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33656, 3},
+    /*  989 */ {I_SBB, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33663, 4},
+    /*  990 */ {I_SCASB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50185, 0},
+    /*  991 */ {I_SCASD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48823, 5},
+    /*  992 */ {I_SCASQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48828, 7},
+    /*  993 */ {I_SCASW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48833, 0},
+    /*  994 */ {I_SFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43775, 59},
+    /*  995 */ {I_SGDT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48838, 108},
+    /*  996 */ {I_SHL, 2, {RM_GPR|BITS8,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+50165, 0},
+    /*  997 */ {I_SHL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+50169, 0},
+    /*  998 */ {I_SHL, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48718, 35},
+    /*  999 */ {I_SHL, 2, {RM_GPR|BITS16,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48723, 0},
+    /* 1000 */ {I_SHL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48728, 0},
+    /* 1001 */ {I_SHL, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43709, 35},
+    /* 1002 */ {I_SHL, 2, {RM_GPR|BITS32,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48733, 5},
+    /* 1003 */ {I_SHL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48738, 5},
+    /* 1004 */ {I_SHL, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43715, 5},
+    /* 1005 */ {I_SHL, 2, {RM_GPR|BITS64,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48743, 7},
+    /* 1006 */ {I_SHL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48748, 7},
+    /* 1007 */ {I_SHL, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43721, 7},
+    /* 1008 */ {I_SHLD, 3, {MEMORY,REG_GPR|BITS16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33677, 109},
+    /* 1009 */ {I_SHLD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33677, 109},
+    /* 1010 */ {I_SHLD, 3, {MEMORY,REG_GPR|BITS32,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33684, 109},
+    /* 1011 */ {I_SHLD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33684, 109},
+    /* 1012 */ {I_SHLD, 3, {MEMORY,REG_GPR|BITS64,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33691, 110},
+    /* 1013 */ {I_SHLD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33691, 110},
+    /* 1014 */ {I_SHLD, 3, {MEMORY,REG_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43781, 9},
+    /* 1015 */ {I_SHLD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43781, 5},
+    /* 1016 */ {I_SHLD, 3, {MEMORY,REG_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43787, 9},
+    /* 1017 */ {I_SHLD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43787, 5},
+    /* 1018 */ {I_SHLD, 3, {MEMORY,REG_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43793, 10},
+    /* 1019 */ {I_SHLD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43793, 7},
+    /* 1020 */ {I_SHR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+50189, 0},
+    /* 1021 */ {I_SHR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+50193, 0},
+    /* 1022 */ {I_SHR, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48843, 35},
+    /* 1023 */ {I_SHR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48848, 0},
+    /* 1024 */ {I_SHR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48853, 0},
+    /* 1025 */ {I_SHR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43799, 35},
+    /* 1026 */ {I_SHR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48858, 5},
+    /* 1027 */ {I_SHR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48863, 5},
+    /* 1028 */ {I_SHR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43805, 5},
+    /* 1029 */ {I_SHR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48868, 7},
+    /* 1030 */ {I_SHR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48873, 7},
+    /* 1031 */ {I_SHR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43811, 7},
+    /* 1032 */ {I_SHRD, 3, {MEMORY,REG_GPR|BITS16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33698, 109},
+    /* 1033 */ {I_SHRD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33698, 109},
+    /* 1034 */ {I_SHRD, 3, {MEMORY,REG_GPR|BITS32,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33705, 109},
+    /* 1035 */ {I_SHRD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33705, 109},
+    /* 1036 */ {I_SHRD, 3, {MEMORY,REG_GPR|BITS64,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33712, 110},
+    /* 1037 */ {I_SHRD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33712, 110},
+    /* 1038 */ {I_SHRD, 3, {MEMORY,REG_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43817, 9},
+    /* 1039 */ {I_SHRD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43817, 5},
+    /* 1040 */ {I_SHRD, 3, {MEMORY,REG_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43823, 9},
+    /* 1041 */ {I_SHRD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43823, 5},
+    /* 1042 */ {I_SHRD, 3, {MEMORY,REG_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43829, 10},
+    /* 1043 */ {I_SHRD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43829, 7},
+    /* 1044 */ {I_SIDT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48878, 108},
+    /* 1045 */ {I_SLDT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43854, 108},
+    /* 1046 */ {I_SLDT, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43854, 108},
+    /* 1047 */ {I_SLDT, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43835, 108},
+    /* 1048 */ {I_SLDT, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43841, 5},
+    /* 1049 */ {I_SLDT, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43853, 7},
+    /* 1050 */ {I_SKINIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48883, 7},
+    /* 1051 */ {I_SMI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50311, 111},
+    /* 1052 */ {I_SMSW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43872, 108},
+    /* 1053 */ {I_SMSW, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43872, 108},
+    /* 1054 */ {I_SMSW, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43859, 108},
+    /* 1055 */ {I_SMSW, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43865, 5},
+    /* 1056 */ {I_SMSW, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43871, 7},
+    /* 1057 */ {I_STC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48605, 0},
+    /* 1058 */ {I_STD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50332, 0},
+    /* 1059 */ {I_STI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48400, 0},
+    /* 1060 */ {I_STOSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12509, 0},
+    /* 1061 */ {I_STOSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50205, 5},
+    /* 1062 */ {I_STOSQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50209, 7},
+    /* 1063 */ {I_STOSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50213, 0},
+    /* 1064 */ {I_STR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43890, 62},
+    /* 1065 */ {I_STR, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43890, 62},
+    /* 1066 */ {I_STR, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43877, 62},
+    /* 1067 */ {I_STR, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43883, 63},
+    /* 1068 */ {I_STR, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43889, 7},
+    /* 1069 */ {I_SUB, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48888, 3},
+    /* 1070 */ {I_SUB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48889, 0},
+    /* 1071 */ {I_SUB, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43895, 3},
+    /* 1072 */ {I_SUB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43896, 0},
+    /* 1073 */ {I_SUB, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43901, 4},
+    /* 1074 */ {I_SUB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43902, 5},
+    /* 1075 */ {I_SUB, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43907, 6},
+    /* 1076 */ {I_SUB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43908, 7},
+    /* 1077 */ {I_SUB, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+41044, 8},
+    /* 1078 */ {I_SUB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+41044, 0},
+    /* 1079 */ {I_SUB, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48893, 8},
+    /* 1080 */ {I_SUB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+48893, 0},
+    /* 1081 */ {I_SUB, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48898, 9},
+    /* 1082 */ {I_SUB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48898, 5},
+    /* 1083 */ {I_SUB, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48903, 10},
+    /* 1084 */ {I_SUB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+48903, 7},
+    /* 1085 */ {I_SUB, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33719, 11},
+    /* 1086 */ {I_SUB, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33726, 12},
+    /* 1087 */ {I_SUB, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33733, 13},
+    /* 1088 */ {I_SUB, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+50217, 8},
+    /* 1089 */ {I_SUB, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48908, 8},
+    /* 1090 */ {I_SUB, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48913, 9},
+    /* 1091 */ {I_SUB, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48918, 10},
+    /* 1092 */ {I_SUB, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43913, 3},
+    /* 1093 */ {I_SUB, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33740, 3},
+    /* 1094 */ {I_SUB, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33747, 4},
+    /* 1095 */ {I_SUB, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33754, 6},
+    /* 1096 */ {I_SUB, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43913, 3},
+    /* 1097 */ {I_SUB, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33740, 3},
+    /* 1098 */ {I_SUB, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33747, 4},
+    /* 1099 */ {I_SVDC, 2, {MEMORY|BITS80,REG_SREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34365, 105},
+    /* 1100 */ {I_SVTS, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48928, 105},
+    /* 1101 */ {I_SWAPGS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48933, 7},
+    /* 1102 */ {I_SYSCALL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49929, 113},
+    /* 1103 */ {I_SYSENTER, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50221, 89},
+    /* 1104 */ {I_SYSEXIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50225, 114},
+    /* 1105 */ {I_SYSRET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49925, 115},
+    /* 1106 */ {I_TEST, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+50229, 8},
+    /* 1107 */ {I_TEST, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+50229, 0},
+    /* 1108 */ {I_TEST, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+48938, 8},
+    /* 1109 */ {I_TEST, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+48938, 0},
+    /* 1110 */ {I_TEST, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48943, 9},
+    /* 1111 */ {I_TEST, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48943, 5},
+    /* 1112 */ {I_TEST, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+48948, 10},
+    /* 1113 */ {I_TEST, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+48948, 7},
+    /* 1114 */ {I_TEST, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+50233, 8},
+    /* 1115 */ {I_TEST, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48953, 8},
+    /* 1116 */ {I_TEST, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48958, 9},
+    /* 1117 */ {I_TEST, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48963, 10},
+    /* 1118 */ {I_TEST, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+50237, 8},
+    /* 1119 */ {I_TEST, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48968, 8},
+    /* 1120 */ {I_TEST, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48973, 9},
+    /* 1121 */ {I_TEST, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48978, 10},
+    /* 1122 */ {I_TEST, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48983, 8},
+    /* 1123 */ {I_TEST, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43925, 8},
+    /* 1124 */ {I_TEST, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43931, 9},
+    /* 1125 */ {I_TEST, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43937, 10},
+    /* 1126 */ {I_TEST, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48983, 8},
+    /* 1127 */ {I_TEST, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43925, 8},
+    /* 1128 */ {I_TEST, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43931, 9},
+    /* 1129 */ {I_UD0, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50241, 116},
+    /* 1130 */ {I_UD0, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43943, 35},
+    /* 1131 */ {I_UD0, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43949, 35},
+    /* 1132 */ {I_UD0, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43955, 35},
+    /* 1133 */ {I_UD1, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43961, 35},
+    /* 1134 */ {I_UD1, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43967, 35},
+    /* 1135 */ {I_UD1, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43973, 35},
+    /* 1136 */ {I_UD2, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50249, 35},
+    /* 1137 */ {I_VERR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48988, 62},
+    /* 1138 */ {I_VERR, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48988, 62},
+    /* 1139 */ {I_VERR, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48988, 62},
+    /* 1140 */ {I_VERW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48993, 62},
+    /* 1141 */ {I_VERW, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48993, 62},
+    /* 1142 */ {I_VERW, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48993, 62},
+    /* 1143 */ {I_FWAIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49827, 0},
+    /* 1144 */ {I_WBINVD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49289, 54},
+    /* 1145 */ {I_WRSHR, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43991, 98},
+    /* 1146 */ {I_WRMSR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50253, 99},
+    /* 1147 */ {I_XADD, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43997, 118},
+    /* 1148 */ {I_XADD, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43998, 20},
+    /* 1149 */ {I_XADD, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33789, 118},
+    /* 1150 */ {I_XADD, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33790, 20},
+    /* 1151 */ {I_XADD, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33796, 118},
+    /* 1152 */ {I_XADD, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33797, 20},
+    /* 1153 */ {I_XADD, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33803, 6},
+    /* 1154 */ {I_XADD, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33804, 7},
+    /* 1155 */ {I_XCHG, 2, {REG_AX,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+50257, 0},
+    /* 1156 */ {I_XCHG, 2, {REG_EAX,REG32NA,0,0,0}, NO_DECORATOR, nasm_bytecodes+50261, 5},
+    /* 1157 */ {I_XCHG, 2, {REG_RAX,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+50265, 7},
+    /* 1158 */ {I_XCHG, 2, {REG_GPR|BITS16,REG_AX,0,0,0}, NO_DECORATOR, nasm_bytecodes+50269, 0},
+    /* 1159 */ {I_XCHG, 2, {REG32NA,REG_EAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+50273, 5},
+    /* 1160 */ {I_XCHG, 2, {REG_GPR|BITS64,REG_RAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+50277, 7},
+    /* 1161 */ {I_XCHG, 2, {REG_EAX,REG_EAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+50281, 19},
+    /* 1162 */ {I_XCHG, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48999, 0},
+    /* 1163 */ {I_XCHG, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44016, 0},
+    /* 1164 */ {I_XCHG, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44022, 5},
+    /* 1165 */ {I_XCHG, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44028, 7},
+    /* 1166 */ {I_XCHG, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48998, 3},
+    /* 1167 */ {I_XCHG, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44015, 3},
+    /* 1168 */ {I_XCHG, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44021, 4},
+    /* 1169 */ {I_XCHG, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44027, 6},
+    /* 1170 */ {I_XCHG, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+49003, 121},
+    /* 1171 */ {I_XCHG, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44033, 121},
+    /* 1172 */ {I_XCHG, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44039, 122},
+    /* 1173 */ {I_XCHG, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44045, 123},
+    /* 1174 */ {I_XLATB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46118, 0},
+    /* 1175 */ {I_XLAT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46118, 0},
+    /* 1176 */ {I_XOR, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+49008, 3},
+    /* 1177 */ {I_XOR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+49009, 0},
+    /* 1178 */ {I_XOR, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44051, 3},
+    /* 1179 */ {I_XOR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44052, 0},
+    /* 1180 */ {I_XOR, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44057, 4},
+    /* 1181 */ {I_XOR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44058, 5},
+    /* 1182 */ {I_XOR, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44063, 6},
+    /* 1183 */ {I_XOR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44064, 7},
+    /* 1184 */ {I_XOR, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+40484, 8},
+    /* 1185 */ {I_XOR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+40484, 0},
+    /* 1186 */ {I_XOR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+49013, 8},
+    /* 1187 */ {I_XOR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+49013, 0},
+    /* 1188 */ {I_XOR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+49018, 9},
+    /* 1189 */ {I_XOR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+49018, 5},
+    /* 1190 */ {I_XOR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+49023, 10},
+    /* 1191 */ {I_XOR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+49023, 7},
+    /* 1192 */ {I_XOR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33810, 11},
+    /* 1193 */ {I_XOR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33817, 12},
+    /* 1194 */ {I_XOR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33824, 13},
+    /* 1195 */ {I_XOR, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+50285, 8},
+    /* 1196 */ {I_XOR, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49028, 8},
+    /* 1197 */ {I_XOR, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49033, 9},
+    /* 1198 */ {I_XOR, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49038, 10},
+    /* 1199 */ {I_XOR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+44069, 3},
+    /* 1200 */ {I_XOR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33831, 3},
+    /* 1201 */ {I_XOR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33838, 4},
+    /* 1202 */ {I_XOR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33845, 6},
+    /* 1203 */ {I_XOR, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+44069, 3},
+    /* 1204 */ {I_XOR, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33831, 3},
+    /* 1205 */ {I_XOR, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33838, 4},
+    /* 1206 */ {I_CMOVA, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44081, 124},
+    /* 1207 */ {I_CMOVC, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44093, 124},
+    /* 1208 */ {I_CMOVG, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44111, 124},
+    /* 1209 */ {I_CMOVL, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44123, 124},
+    /* 1210 */ {I_CMOVNA, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44099, 124},
+    /* 1211 */ {I_CMOVNC, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44087, 124},
+    /* 1212 */ {I_CMOVNG, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44129, 124},
+    /* 1213 */ {I_CMOVNL, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44117, 124},
+    /* 1214 */ {I_CMOVNO, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44141, 124},
+    /* 1215 */ {I_CMOVNS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44153, 124},
+    /* 1216 */ {I_CMOVNZ, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44135, 124},
+    /* 1217 */ {I_CMOVO, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44159, 124},
+    /* 1218 */ {I_CMOVPE, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44165, 124},
+    /* 1219 */ {I_CMOVPO, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44147, 124},
+    /* 1220 */ {I_CMOVS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44171, 124},
+    /* 1221 */ {I_CMOVZ, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44105, 124},
+    /* 1222 */ {I_CMOVA, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44081, 89},
+    /* 1223 */ {I_CMOVC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44093, 89},
+    /* 1224 */ {I_CMOVG, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44111, 89},
+    /* 1225 */ {I_CMOVL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44123, 89},
+    /* 1226 */ {I_CMOVNA, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44099, 89},
+    /* 1227 */ {I_CMOVNC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44087, 89},
+    /* 1228 */ {I_CMOVNG, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44129, 89},
+    /* 1229 */ {I_CMOVNL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44117, 89},
+    /* 1230 */ {I_CMOVNO, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44141, 89},
+    /* 1231 */ {I_CMOVNS, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44153, 89},
+    /* 1232 */ {I_CMOVNZ, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44135, 89},
+    /* 1233 */ {I_CMOVO, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44159, 89},
+    /* 1234 */ {I_CMOVPE, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44165, 89},
+    /* 1235 */ {I_CMOVPO, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44147, 89},
+    /* 1236 */ {I_CMOVS, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44171, 89},
+    /* 1237 */ {I_CMOVZ, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44105, 89},
+    /* 1238 */ {I_CMOVA, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44177, 124},
+    /* 1239 */ {I_CMOVC, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44189, 124},
+    /* 1240 */ {I_CMOVG, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44207, 124},
+    /* 1241 */ {I_CMOVL, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44219, 124},
+    /* 1242 */ {I_CMOVNA, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44195, 124},
+    /* 1243 */ {I_CMOVNC, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44183, 124},
+    /* 1244 */ {I_CMOVNG, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44225, 124},
+    /* 1245 */ {I_CMOVNL, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44213, 124},
+    /* 1246 */ {I_CMOVNO, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44237, 124},
+    /* 1247 */ {I_CMOVNS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44249, 124},
+    /* 1248 */ {I_CMOVNZ, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44231, 124},
+    /* 1249 */ {I_CMOVO, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44255, 124},
+    /* 1250 */ {I_CMOVPE, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44261, 124},
+    /* 1251 */ {I_CMOVPO, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44243, 124},
+    /* 1252 */ {I_CMOVS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44267, 124},
+    /* 1253 */ {I_CMOVZ, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44201, 124},
+    /* 1254 */ {I_CMOVA, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44177, 89},
+    /* 1255 */ {I_CMOVC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44189, 89},
+    /* 1256 */ {I_CMOVG, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44207, 89},
+    /* 1257 */ {I_CMOVL, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44219, 89},
+    /* 1258 */ {I_CMOVNA, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44195, 89},
+    /* 1259 */ {I_CMOVNC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44183, 89},
+    /* 1260 */ {I_CMOVNG, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44225, 89},
+    /* 1261 */ {I_CMOVNL, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44213, 89},
+    /* 1262 */ {I_CMOVNO, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44237, 89},
+    /* 1263 */ {I_CMOVNS, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44249, 89},
+    /* 1264 */ {I_CMOVNZ, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44231, 89},
+    /* 1265 */ {I_CMOVO, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44255, 89},
+    /* 1266 */ {I_CMOVPE, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44261, 89},
+    /* 1267 */ {I_CMOVPO, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44243, 89},
+    /* 1268 */ {I_CMOVS, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44267, 89},
+    /* 1269 */ {I_CMOVZ, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44201, 89},
+    /* 1270 */ {I_CMOVA, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44273, 10},
+    /* 1271 */ {I_CMOVC, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44285, 10},
+    /* 1272 */ {I_CMOVG, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44303, 10},
+    /* 1273 */ {I_CMOVL, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44315, 10},
+    /* 1274 */ {I_CMOVNA, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44291, 10},
+    /* 1275 */ {I_CMOVNC, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44279, 10},
+    /* 1276 */ {I_CMOVNG, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44321, 10},
+    /* 1277 */ {I_CMOVNL, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44309, 10},
+    /* 1278 */ {I_CMOVNO, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44333, 10},
+    /* 1279 */ {I_CMOVNS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44345, 10},
+    /* 1280 */ {I_CMOVNZ, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44327, 10},
+    /* 1281 */ {I_CMOVO, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44351, 10},
+    /* 1282 */ {I_CMOVPE, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44357, 10},
+    /* 1283 */ {I_CMOVPO, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44339, 10},
+    /* 1284 */ {I_CMOVS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44363, 10},
+    /* 1285 */ {I_CMOVZ, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44297, 10},
+    /* 1286 */ {I_CMOVA, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44273, 7},
+    /* 1287 */ {I_CMOVC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44285, 7},
+    /* 1288 */ {I_CMOVG, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44303, 7},
+    /* 1289 */ {I_CMOVL, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44315, 7},
+    /* 1290 */ {I_CMOVNA, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44291, 7},
+    /* 1291 */ {I_CMOVNC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44279, 7},
+    /* 1292 */ {I_CMOVNG, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44321, 7},
+    /* 1293 */ {I_CMOVNL, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44309, 7},
+    /* 1294 */ {I_CMOVNO, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44333, 7},
+    /* 1295 */ {I_CMOVNS, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44345, 7},
+    /* 1296 */ {I_CMOVNZ, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44327, 7},
+    /* 1297 */ {I_CMOVO, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44351, 7},
+    /* 1298 */ {I_CMOVPE, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44357, 7},
+    /* 1299 */ {I_CMOVPO, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44339, 7},
+    /* 1300 */ {I_CMOVS, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44363, 7},
+    /* 1301 */ {I_CMOVZ, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44297, 7},
+    /* 1302 */ {I_JA, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44369, 125},
+    /* 1303 */ {I_JC, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44381, 125},
+    /* 1304 */ {I_JG, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44399, 125},
+    /* 1305 */ {I_JL, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44411, 125},
+    /* 1306 */ {I_JNA, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44387, 125},
+    /* 1307 */ {I_JNC, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44375, 125},
+    /* 1308 */ {I_JNG, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44417, 125},
+    /* 1309 */ {I_JNL, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44405, 125},
+    /* 1310 */ {I_JNO, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44429, 125},
+    /* 1311 */ {I_JNS, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44441, 125},
+    /* 1312 */ {I_JNZ, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44423, 125},
+    /* 1313 */ {I_JO, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44447, 125},
+    /* 1314 */ {I_JPE, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44453, 125},
+    /* 1315 */ {I_JPO, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44435, 125},
+    /* 1316 */ {I_JS, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44459, 125},
+    /* 1317 */ {I_JZ, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44393, 125},
+    /* 1318 */ {I_JA, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44465, 23},
+    /* 1319 */ {I_JC, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44477, 23},
+    /* 1320 */ {I_JG, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44495, 23},
+    /* 1321 */ {I_JL, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44507, 23},
+    /* 1322 */ {I_JNA, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44483, 23},
+    /* 1323 */ {I_JNC, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44471, 23},
+    /* 1324 */ {I_JNG, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44513, 23},
+    /* 1325 */ {I_JNL, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44501, 23},
+    /* 1326 */ {I_JNO, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44525, 23},
+    /* 1327 */ {I_JNS, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44537, 23},
+    /* 1328 */ {I_JNZ, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44519, 23},
+    /* 1329 */ {I_JO, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44543, 23},
+    /* 1330 */ {I_JPE, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44549, 23},
+    /* 1331 */ {I_JPO, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44531, 23},
+    /* 1332 */ {I_JS, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44555, 23},
+    /* 1333 */ {I_JZ, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44489, 23},
+    /* 1334 */ {I_JA, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44561, 23},
+    /* 1335 */ {I_JC, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44573, 23},
+    /* 1336 */ {I_JG, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44591, 23},
+    /* 1337 */ {I_JL, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44603, 23},
+    /* 1338 */ {I_JNA, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44579, 23},
+    /* 1339 */ {I_JNC, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44567, 23},
+    /* 1340 */ {I_JNG, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44609, 23},
+    /* 1341 */ {I_JNL, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44597, 23},
+    /* 1342 */ {I_JNO, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44621, 23},
+    /* 1343 */ {I_JNS, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44633, 23},
+    /* 1344 */ {I_JNZ, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44615, 23},
+    /* 1345 */ {I_JO, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44639, 23},
+    /* 1346 */ {I_JPE, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44645, 23},
+    /* 1347 */ {I_JPO, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44627, 23},
+    /* 1348 */ {I_JS, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44651, 23},
+    /* 1349 */ {I_JZ, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44585, 23},
+    /* 1350 */ {I_JA, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44657, 24},
+    /* 1351 */ {I_JC, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44669, 24},
+    /* 1352 */ {I_JG, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44687, 24},
+    /* 1353 */ {I_JL, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44699, 24},
+    /* 1354 */ {I_JNA, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44675, 24},
+    /* 1355 */ {I_JNC, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44663, 24},
+    /* 1356 */ {I_JNG, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44705, 24},
+    /* 1357 */ {I_JNL, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44693, 24},
+    /* 1358 */ {I_JNO, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44717, 24},
+    /* 1359 */ {I_JNS, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44729, 24},
+    /* 1360 */ {I_JNZ, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44711, 24},
+    /* 1361 */ {I_JO, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44735, 24},
+    /* 1362 */ {I_JPE, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44741, 24},
+    /* 1363 */ {I_JPO, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44723, 24},
+    /* 1364 */ {I_JS, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44747, 24},
+    /* 1365 */ {I_JZ, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44681, 24},
+    /* 1366 */ {I_JA, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49044, 21},
+    /* 1367 */ {I_JC, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49054, 21},
+    /* 1368 */ {I_JG, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49069, 21},
+    /* 1369 */ {I_JL, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49079, 21},
+    /* 1370 */ {I_JNA, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49059, 21},
+    /* 1371 */ {I_JNC, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49049, 21},
+    /* 1372 */ {I_JNG, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49084, 21},
+    /* 1373 */ {I_JNL, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49074, 21},
+    /* 1374 */ {I_JNO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49094, 21},
+    /* 1375 */ {I_JNS, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49104, 21},
+    /* 1376 */ {I_JNZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49089, 21},
+    /* 1377 */ {I_JO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49109, 21},
+    /* 1378 */ {I_JPE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49114, 21},
+    /* 1379 */ {I_JPO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49099, 21},
+    /* 1380 */ {I_JS, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49119, 21},
+    /* 1381 */ {I_JZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49064, 21},
+    /* 1382 */ {I_SETA, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49123, 53},
+    /* 1383 */ {I_SETC, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49133, 53},
+    /* 1384 */ {I_SETG, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49148, 53},
+    /* 1385 */ {I_SETL, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49158, 53},
+    /* 1386 */ {I_SETNA, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49138, 53},
+    /* 1387 */ {I_SETNC, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49128, 53},
+    /* 1388 */ {I_SETNG, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49163, 53},
+    /* 1389 */ {I_SETNL, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49153, 53},
+    /* 1390 */ {I_SETNO, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49173, 53},
+    /* 1391 */ {I_SETNS, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49183, 53},
+    /* 1392 */ {I_SETNZ, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49168, 53},
+    /* 1393 */ {I_SETO, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49188, 53},
+    /* 1394 */ {I_SETPE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49193, 53},
+    /* 1395 */ {I_SETPO, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49178, 53},
+    /* 1396 */ {I_SETS, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49198, 53},
+    /* 1397 */ {I_SETZ, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49143, 53},
+    /* 1398 */ {I_SETA, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49123, 5},
+    /* 1399 */ {I_SETC, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49133, 5},
+    /* 1400 */ {I_SETG, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49148, 5},
+    /* 1401 */ {I_SETL, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49158, 5},
+    /* 1402 */ {I_SETNA, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49138, 5},
+    /* 1403 */ {I_SETNC, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49128, 5},
+    /* 1404 */ {I_SETNG, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49163, 5},
+    /* 1405 */ {I_SETNL, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49153, 5},
+    /* 1406 */ {I_SETNO, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49173, 5},
+    /* 1407 */ {I_SETNS, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49183, 5},
+    /* 1408 */ {I_SETNZ, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49168, 5},
+    /* 1409 */ {I_SETO, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49188, 5},
+    /* 1410 */ {I_SETPE, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49193, 5},
+    /* 1411 */ {I_SETPO, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49178, 5},
+    /* 1412 */ {I_SETS, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49198, 5},
+    /* 1413 */ {I_SETZ, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49143, 5},
+    /* 1414 */ {I_ADDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44753, 126},
+    /* 1415 */ {I_ADDSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44759, 126},
+    /* 1416 */ {I_ANDNPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44765, 126},
+    /* 1417 */ {I_ANDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44771, 126},
+    /* 1418 */ {I_CMPEQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+12528, 126},
+    /* 1419 */ {I_CMPEQSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12536, 126},
+    /* 1420 */ {I_CMPLEPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+12544, 126},
+    /* 1421 */ {I_CMPLESS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12552, 126},
+    /* 1422 */ {I_CMPLTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+12560, 126},
+    /* 1423 */ {I_CMPLTSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12568, 126},
+    /* 1424 */ {I_CMPNEQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+12576, 126},
+    /* 1425 */ {I_CMPNEQSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12584, 126},
+    /* 1426 */ {I_CMPNLEPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+12592, 126},
+    /* 1427 */ {I_CMPNLESS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12600, 126},
+    /* 1428 */ {I_CMPNLTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+12608, 126},
+    /* 1429 */ {I_CMPNLTSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12616, 126},
+    /* 1430 */ {I_CMPORDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+12624, 126},
+    /* 1431 */ {I_CMPORDSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12632, 126},
+    /* 1432 */ {I_CMPUNORDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+12640, 126},
+    /* 1433 */ {I_CMPUNORDSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12648, 126},
+    /* 1434 */ {I_CMPPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+33964, 126},
+    /* 1435 */ {I_CMPSS, 3, {XMM_L16,RM_XMM_L16|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+33971, 126},
+    /* 1436 */ {I_COMISS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44777, 126},
+    /* 1437 */ {I_CVTPI2PS, 2, {XMM_L16,RM_MMX|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44783, 127},
+    /* 1438 */ {I_CVTPS2PI, 2, {MMXREG,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44789, 127},
+    /* 1439 */ {I_CVTSI2SS, 2, {XMM_L16,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33979, 128},
+    /* 1440 */ {I_CVTSI2SS, 2, {XMM_L16,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33978, 129},
+    /* 1441 */ {I_CVTSS2SI, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33986, 128},
+    /* 1442 */ {I_CVTSS2SI, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33986, 128},
+    /* 1443 */ {I_CVTSS2SI, 2, {REG_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33985, 130},
+    /* 1444 */ {I_CVTSS2SI, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33985, 130},
+    /* 1445 */ {I_CVTTPS2PI, 2, {MMXREG,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44795, 131},
+    /* 1446 */ {I_CVTTSS2SI, 2, {REG_GPR|BITS32,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33993, 128},
+    /* 1447 */ {I_CVTTSS2SI, 2, {REG_GPR|BITS64,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33992, 130},
+    /* 1448 */ {I_DIVPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44801, 126},
+    /* 1449 */ {I_DIVSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44807, 126},
+    /* 1450 */ {I_LDMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44813, 126},
+    /* 1451 */ {I_MAXPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44819, 126},
+    /* 1452 */ {I_MAXSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44825, 126},
+    /* 1453 */ {I_MINPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44831, 126},
+    /* 1454 */ {I_MINSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44837, 126},
+    /* 1455 */ {I_MOVAPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44843, 126},
+    /* 1456 */ {I_MOVAPS, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44849, 126},
+    /* 1457 */ {I_MOVHPS, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44855, 126},
+    /* 1458 */ {I_MOVHPS, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44861, 126},
+    /* 1459 */ {I_MOVLHPS, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44855, 126},
+    /* 1460 */ {I_MOVLPS, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43985, 126},
+    /* 1461 */ {I_MOVLPS, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44867, 126},
+    /* 1462 */ {I_MOVHLPS, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43985, 126},
+    /* 1463 */ {I_MOVMSKPS, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44873, 126},
+    /* 1464 */ {I_MOVMSKPS, 2, {REG_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33999, 132},
+    /* 1465 */ {I_MOVNTPS, 2, {MEMORY|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44879, 126},
+    /* 1466 */ {I_MOVSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44885, 126},
+    /* 1467 */ {I_MOVSS, 2, {RM_XMM_L16|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44891, 126},
+    /* 1468 */ {I_MOVUPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44897, 126},
+    /* 1469 */ {I_MOVUPS, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44903, 126},
+    /* 1470 */ {I_MULPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44909, 126},
+    /* 1471 */ {I_MULSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44915, 126},
+    /* 1472 */ {I_ORPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44921, 126},
+    /* 1473 */ {I_RCPPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44927, 126},
+    /* 1474 */ {I_RCPSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44933, 126},
+    /* 1475 */ {I_RSQRTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44939, 126},
+    /* 1476 */ {I_RSQRTSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44945, 126},
+    /* 1477 */ {I_SHUFPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+34006, 126},
+    /* 1478 */ {I_SQRTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44951, 126},
+    /* 1479 */ {I_SQRTSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44957, 126},
+    /* 1480 */ {I_STMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44963, 126},
+    /* 1481 */ {I_SUBPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44969, 126},
+    /* 1482 */ {I_SUBSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44975, 126},
+    /* 1483 */ {I_UCOMISS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44981, 126},
+    /* 1484 */ {I_UNPCKHPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44987, 126},
+    /* 1485 */ {I_UNPCKLPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44993, 126},
+    /* 1486 */ {I_XORPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44999, 126},
+    /* 1487 */ {I_FXRSTOR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34014, 133},
+    /* 1488 */ {I_FXRSTOR64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34013, 134},
+    /* 1489 */ {I_FXSAVE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34021, 133},
+    /* 1490 */ {I_FXSAVE64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34020, 134},
+    /* 1491 */ {I_XGETBV, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49203, 135},
+    /* 1492 */ {I_XSETBV, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49208, 136},
+    /* 1493 */ {I_XSAVE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34028, 135},
+    /* 1494 */ {I_XSAVE64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34027, 137},
+    /* 1495 */ {I_XSAVEC, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34035, 138},
+    /* 1496 */ {I_XSAVEC64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34034, 139},
+    /* 1497 */ {I_XSAVEOPT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34042, 138},
+    /* 1498 */ {I_XSAVEOPT64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34041, 139},
+    /* 1499 */ {I_XSAVES, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34049, 138},
+    /* 1500 */ {I_XSAVES64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34048, 139},
+    /* 1501 */ {I_XRSTOR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34056, 135},
+    /* 1502 */ {I_XRSTOR64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34055, 137},
+    /* 1503 */ {I_XRSTORS, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34063, 138},
+    /* 1504 */ {I_XRSTORS64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34062, 139},
+    /* 1505 */ {I_PREFETCHNTA, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46242, 140},
+    /* 1506 */ {I_PREFETCHT0, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46260, 140},
+    /* 1507 */ {I_PREFETCHT1, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46278, 140},
+    /* 1508 */ {I_PREFETCHT2, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46296, 140},
+    /* 1509 */ {I_PREFETCHIT0, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46368, 141},
+    /* 1510 */ {I_PREFETCHIT1, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46350, 141},
+    /* 1511 */ {I_SFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43775, 142},
+    /* 1512 */ {I_MASKMOVQ, 2, {MMXREG,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+45005, 143},
+    /* 1513 */ {I_MOVNTQ, 2, {MEMORY,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+45011, 144},
+    /* 1514 */ {I_PAVGB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34069, 144},
+    /* 1515 */ {I_PAVGW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34076, 144},
+    /* 1516 */ {I_PEXTRW, 3, {REG_GPR|BITS32,MMXREG,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34083, 145},
+    /* 1517 */ {I_PINSRW, 3, {MMXREG,MEMORY,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34090, 145},
+    /* 1518 */ {I_PINSRW, 3, {MMXREG,RM_GPR|BITS16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34090, 145},
+    /* 1519 */ {I_PINSRW, 3, {MMXREG,REG_GPR|BITS32,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34090, 145},
+    /* 1520 */ {I_PMAXSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34097, 144},
+    /* 1521 */ {I_PMAXUB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34104, 144},
+    /* 1522 */ {I_PMINSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34111, 144},
+    /* 1523 */ {I_PMINUB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34118, 144},
+    /* 1524 */ {I_PMOVMSKB, 2, {REG_GPR|BITS32,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+45017, 143},
+    /* 1525 */ {I_PMULHUW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34125, 144},
+    /* 1526 */ {I_PSADBW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34132, 144},
+    /* 1527 */ {I_PSHUFW, 3, {MMXREG,RM_MMX,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+12656, 146},
+    /* 1528 */ {I_PF2IW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12664, 91},
+    /* 1529 */ {I_PFNACC, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12672, 91},
+    /* 1530 */ {I_PFPNACC, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12680, 91},
+    /* 1531 */ {I_PI2FW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12688, 91},
+    /* 1532 */ {I_PSWAPD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12696, 91},
+    /* 1533 */ {I_MASKMOVDQU, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45023, 147},
+    /* 1534 */ {I_CLFLUSH, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45029, 147},
+    /* 1535 */ {I_MOVNTDQ, 2, {MEMORY,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45035, 148},
+    /* 1536 */ {I_MOVNTI, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34140, 149},
+    /* 1537 */ {I_MOVNTI, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34139, 150},
+    /* 1538 */ {I_MOVNTPD, 2, {MEMORY,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45041, 148},
+    /* 1539 */ {I_LFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43283, 147},
+    /* 1540 */ {I_MFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43361, 147},
+    /* 1541 */ {I_MOVD, 2, {MEMORY,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34146, 151},
+    /* 1542 */ {I_MOVD, 2, {XMM_L16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+34153, 151},
+    /* 1543 */ {I_MOVD, 2, {XMM_L16,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34153, 147},
+    /* 1544 */ {I_MOVD, 2, {RM_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34146, 147},
+    /* 1545 */ {I_MOVDQA, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45047, 148},
+    /* 1546 */ {I_MOVDQA, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45053, 148},
+    /* 1547 */ {I_MOVDQU, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45059, 148},
+    /* 1548 */ {I_MOVDQU, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45065, 148},
+    /* 1549 */ {I_MOVDQ2Q, 2, {MMXREG,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45071, 147},
+    /* 1550 */ {I_MOVQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45077, 147},
+    /* 1551 */ {I_MOVQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45083, 147},
+    /* 1552 */ {I_MOVQ, 2, {MEMORY,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45083, 152},
+    /* 1553 */ {I_MOVQ, 2, {XMM_L16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45077, 152},
+    /* 1554 */ {I_MOVQ, 2, {XMM_L16,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34160, 153},
+    /* 1555 */ {I_MOVQ, 2, {RM_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34167, 153},
+    /* 1556 */ {I_MOVQ2DQ, 2, {XMM_L16,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+45089, 147},
+    /* 1557 */ {I_PACKSSWB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45095, 148},
+    /* 1558 */ {I_PACKSSDW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45101, 148},
+    /* 1559 */ {I_PACKUSWB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45107, 148},
+    /* 1560 */ {I_PADDB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45113, 148},
+    /* 1561 */ {I_PADDW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45119, 148},
+    /* 1562 */ {I_PADDD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45125, 148},
+    /* 1563 */ {I_PADDQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+45131, 154},
+    /* 1564 */ {I_PADDQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45137, 148},
+    /* 1565 */ {I_PADDSB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45143, 148},
+    /* 1566 */ {I_PADDSW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45149, 148},
+    /* 1567 */ {I_PADDUSB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45155, 148},
+    /* 1568 */ {I_PADDUSW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45161, 148},
+    /* 1569 */ {I_PAND, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45167, 148},
+    /* 1570 */ {I_PANDN, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45173, 148},
+    /* 1571 */ {I_PAVGB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45179, 148},
+    /* 1572 */ {I_PAVGW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45185, 148},
+    /* 1573 */ {I_PCMPEQB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45191, 148},
+    /* 1574 */ {I_PCMPEQW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45197, 148},
+    /* 1575 */ {I_PCMPEQD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45203, 148},
+    /* 1576 */ {I_PCMPGTB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45209, 148},
+    /* 1577 */ {I_PCMPGTW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45215, 148},
+    /* 1578 */ {I_PCMPGTD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45221, 148},
+    /* 1579 */ {I_PEXTRW, 3, {REG_GPR|BITS32,XMM_L16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34174, 155},
+    /* 1580 */ {I_PINSRW, 3, {XMM_L16,REG_GPR|BITS16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34181, 155},
+    /* 1581 */ {I_PINSRW, 3, {XMM_L16,MEMORY,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34181, 155},
+    /* 1582 */ {I_PINSRW, 3, {XMM_L16,MEMORY|BITS16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34181, 155},
+    /* 1583 */ {I_PMADDWD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45227, 148},
+    /* 1584 */ {I_PMAXSW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45233, 148},
+    /* 1585 */ {I_PMAXUB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45239, 148},
+    /* 1586 */ {I_PMINSW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45245, 148},
+    /* 1587 */ {I_PMINUB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45251, 148},
+    /* 1588 */ {I_PMOVMSKB, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45257, 147},
+    /* 1589 */ {I_PMULHUW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45263, 148},
+    /* 1590 */ {I_PMULHW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45269, 148},
+    /* 1591 */ {I_PMULLW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45275, 148},
+    /* 1592 */ {I_PMULUDQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34188, 148},
+    /* 1593 */ {I_PMULUDQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45281, 148},
+    /* 1594 */ {I_POR, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45287, 148},
+    /* 1595 */ {I_PSADBW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45293, 148},
+    /* 1596 */ {I_PSHUFD, 3, {XMM_L16,XMM_L16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34195, 155},
+    /* 1597 */ {I_PSHUFD, 3, {XMM_L16,MEMORY,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34195, 157},
+    /* 1598 */ {I_PSHUFHW, 3, {XMM_L16,XMM_L16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34202, 155},
+    /* 1599 */ {I_PSHUFHW, 3, {XMM_L16,MEMORY,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34202, 157},
+    /* 1600 */ {I_PSHUFLW, 3, {XMM_L16,XMM_L16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34209, 155},
+    /* 1601 */ {I_PSHUFLW, 3, {XMM_L16,MEMORY,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34209, 157},
+    /* 1602 */ {I_PSLLDQ, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34216, 158},
+    /* 1603 */ {I_PSLLW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45299, 148},
+    /* 1604 */ {I_PSLLW, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34223, 158},
+    /* 1605 */ {I_PSLLD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45305, 148},
+    /* 1606 */ {I_PSLLD, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34230, 158},
+    /* 1607 */ {I_PSLLQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45311, 148},
+    /* 1608 */ {I_PSLLQ, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34237, 158},
+    /* 1609 */ {I_PSRAW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45317, 148},
+    /* 1610 */ {I_PSRAW, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34244, 158},
+    /* 1611 */ {I_PSRAD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45323, 148},
+    /* 1612 */ {I_PSRAD, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34251, 158},
+    /* 1613 */ {I_PSRLDQ, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34258, 158},
+    /* 1614 */ {I_PSRLW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45329, 148},
+    /* 1615 */ {I_PSRLW, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34265, 158},
+    /* 1616 */ {I_PSRLD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45335, 148},
+    /* 1617 */ {I_PSRLD, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34272, 158},
+    /* 1618 */ {I_PSRLQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45341, 148},
+    /* 1619 */ {I_PSRLQ, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34279, 158},
+    /* 1620 */ {I_PSUBB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45347, 148},
+    /* 1621 */ {I_PSUBW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45353, 148},
+    /* 1622 */ {I_PSUBD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45359, 148},
+    /* 1623 */ {I_PSUBQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34286, 148},
+    /* 1624 */ {I_PSUBQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45365, 148},
+    /* 1625 */ {I_PSUBSB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45371, 148},
+    /* 1626 */ {I_PSUBSW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45377, 148},
+    /* 1627 */ {I_PSUBUSB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45383, 148},
+    /* 1628 */ {I_PSUBUSW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45389, 148},
+    /* 1629 */ {I_PUNPCKHBW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45395, 148},
+    /* 1630 */ {I_PUNPCKHWD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45401, 148},
+    /* 1631 */ {I_PUNPCKHDQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45407, 148},
+    /* 1632 */ {I_PUNPCKHQDQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45413, 148},
+    /* 1633 */ {I_PUNPCKLBW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45419, 148},
+    /* 1634 */ {I_PUNPCKLWD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45425, 148},
+    /* 1635 */ {I_PUNPCKLDQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45431, 148},
+    /* 1636 */ {I_PUNPCKLQDQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45437, 148},
+    /* 1637 */ {I_PXOR, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45443, 148},
+    /* 1638 */ {I_ADDPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45449, 148},
+    /* 1639 */ {I_ADDSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45455, 152},
+    /* 1640 */ {I_ANDNPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45461, 148},
+    /* 1641 */ {I_ANDPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45467, 148},
+    /* 1642 */ {I_CMPEQPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12704, 148},
+    /* 1643 */ {I_CMPEQSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12712, 152},
+    /* 1644 */ {I_CMPLEPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12720, 148},
+    /* 1645 */ {I_CMPLESD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12728, 152},
+    /* 1646 */ {I_CMPLTPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12736, 148},
+    /* 1647 */ {I_CMPLTSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12744, 152},
+    /* 1648 */ {I_CMPNEQPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12752, 148},
+    /* 1649 */ {I_CMPNEQSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12760, 152},
+    /* 1650 */ {I_CMPNLEPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12768, 148},
+    /* 1651 */ {I_CMPNLESD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12776, 152},
+    /* 1652 */ {I_CMPNLTPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12784, 148},
+    /* 1653 */ {I_CMPNLTSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12792, 152},
+    /* 1654 */ {I_CMPORDPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12800, 148},
+    /* 1655 */ {I_CMPORDSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12808, 152},
+    /* 1656 */ {I_CMPUNORDPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12816, 148},
+    /* 1657 */ {I_CMPUNORDSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12824, 152},
+    /* 1658 */ {I_CMPPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+34293, 147},
+    /* 1659 */ {I_CMPSD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+34300, 147},
+    /* 1660 */ {I_COMISD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45473, 147},
+    /* 1661 */ {I_CVTDQ2PD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45479, 152},
+    /* 1662 */ {I_CVTDQ2PS, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45485, 148},
+    /* 1663 */ {I_CVTPD2DQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45491, 148},
+    /* 1664 */ {I_CVTPD2PI, 2, {MMXREG,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45497, 148},
+    /* 1665 */ {I_CVTPD2PS, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45503, 148},
+    /* 1666 */ {I_CVTPI2PD, 2, {XMM_L16,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+45509, 152},
+    /* 1667 */ {I_CVTPS2DQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45515, 148},
+    /* 1668 */ {I_CVTPS2PD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45521, 152},
+    /* 1669 */ {I_CVTSD2SI, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34307, 159},
+    /* 1670 */ {I_CVTSD2SI, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+34307, 159},
+    /* 1671 */ {I_CVTSD2SI, 2, {REG_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34314, 160},
+    /* 1672 */ {I_CVTSD2SI, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+34314, 160},
+    /* 1673 */ {I_CVTSD2SS, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45527, 152},
+    /* 1674 */ {I_CVTSI2SD, 2, {XMM_L16,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34321, 161},
+    /* 1675 */ {I_CVTSI2SD, 2, {XMM_L16,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34328, 160},
+    /* 1676 */ {I_CVTSS2SD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45533, 151},
+    /* 1677 */ {I_CVTTPD2PI, 2, {MMXREG,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45539, 148},
+    /* 1678 */ {I_CVTTPD2DQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45545, 148},
+    /* 1679 */ {I_CVTTPS2DQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45551, 148},
+    /* 1680 */ {I_CVTTSD2SI, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34335, 159},
+    /* 1681 */ {I_CVTTSD2SI, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+34335, 159},
+    /* 1682 */ {I_CVTTSD2SI, 2, {REG_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34342, 160},
+    /* 1683 */ {I_CVTTSD2SI, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+34342, 160},
+    /* 1684 */ {I_DIVPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45557, 148},
+    /* 1685 */ {I_DIVSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45563, 152},
+    /* 1686 */ {I_MAXPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45569, 148},
+    /* 1687 */ {I_MAXSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45575, 152},
+    /* 1688 */ {I_MINPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45581, 148},
+    /* 1689 */ {I_MINSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45587, 152},
+    /* 1690 */ {I_MOVAPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45593, 147},
+    /* 1691 */ {I_MOVAPD, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45599, 147},
+    /* 1692 */ {I_MOVHPD, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45605, 147},
+    /* 1693 */ {I_MOVHPD, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45611, 147},
+    /* 1694 */ {I_MOVLPD, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45617, 147},
+    /* 1695 */ {I_MOVLPD, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45623, 147},
+    /* 1696 */ {I_MOVMSKPD, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45629, 147},
+    /* 1697 */ {I_MOVMSKPD, 2, {REG_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34349, 153},
+    /* 1698 */ {I_MOVSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45635, 147},
+    /* 1699 */ {I_MOVSD, 2, {RM_XMM_L16|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45641, 147},
+    /* 1700 */ {I_MOVUPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45647, 147},
+    /* 1701 */ {I_MOVUPD, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45653, 147},
+    /* 1702 */ {I_MULPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45659, 148},
+    /* 1703 */ {I_MULSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45665, 152},
+    /* 1704 */ {I_ORPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45671, 148},
+    /* 1705 */ {I_SHUFPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+34356, 147},
+    /* 1706 */ {I_SQRTPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45677, 148},
+    /* 1707 */ {I_SQRTSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45683, 147},
+    /* 1708 */ {I_SUBPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45689, 148},
+    /* 1709 */ {I_SUBSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45695, 147},
+    /* 1710 */ {I_UCOMISD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45701, 147},
+    /* 1711 */ {I_UNPCKHPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45707, 147},
+    /* 1712 */ {I_UNPCKLPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45713, 147},
+    /* 1713 */ {I_XORPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45719, 147},
+    /* 1714 */ {I_ADDSUBPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45725, 162},
+    /* 1715 */ {I_ADDSUBPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45731, 162},
+    /* 1716 */ {I_HADDPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45737, 162},
+    /* 1717 */ {I_HADDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45743, 162},
+    /* 1718 */ {I_HSUBPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45749, 162},
+    /* 1719 */ {I_HSUBPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45755, 162},
+    /* 1720 */ {I_LDDQU, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45761, 162},
+    /* 1721 */ {I_MOVDDUP, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45767, 163},
+    /* 1722 */ {I_MOVSHDUP, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45773, 164},
+    /* 1723 */ {I_MOVSLDUP, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45779, 164},
+    /* 1724 */ {I_CLGI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49213, 165},
+    /* 1725 */ {I_STGI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49218, 165},
+    /* 1726 */ {I_VMCALL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45822, 166},
+    /* 1727 */ {I_VMCLEAR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45785, 166},
+    /* 1728 */ {I_VMFUNC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49223, 166},
+    /* 1729 */ {I_VMLAUNCH, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49228, 166},
+    /* 1730 */ {I_VMLOAD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49233, 165},
+    /* 1731 */ {I_VMMCALL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49238, 165},
+    /* 1732 */ {I_VMPTRLD, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45791, 166},
+    /* 1733 */ {I_VMPTRST, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45797, 166},
+    /* 1734 */ {I_VMREAD, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34364, 167},
+    /* 1735 */ {I_VMREAD, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34363, 168},
+    /* 1736 */ {I_VMRESUME, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49243, 166},
+    /* 1737 */ {I_VMRUN, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49248, 165},
+    /* 1738 */ {I_VMSAVE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49253, 165},
+    /* 1739 */ {I_VMWRITE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34371, 167},
+    /* 1740 */ {I_VMWRITE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34370, 168},
+    /* 1741 */ {I_VMXOFF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49258, 166},
+    /* 1742 */ {I_VMXON, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42589, 166},
+    /* 1743 */ {I_INVEPT, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+12833, 169},
+    /* 1744 */ {I_INVEPT, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+12832, 170},
+    /* 1745 */ {I_INVVPID, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+12841, 169},
+    /* 1746 */ {I_INVVPID, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+12840, 170},
+    /* 1747 */ {I_PVALIDATE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45803, 165},
+    /* 1748 */ {I_RMPADJUST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45809, 165},
+    /* 1749 */ {I_VMGEXIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45815, 165},
+    /* 1750 */ {I_VMGEXIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45821, 165},
+    /* 1751 */ {I_PABSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34377, 171},
+    /* 1752 */ {I_PABSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34384, 172},
+    /* 1753 */ {I_PABSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34391, 171},
+    /* 1754 */ {I_PABSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34398, 172},
+    /* 1755 */ {I_PABSD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34405, 171},
+    /* 1756 */ {I_PABSD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34412, 172},
+    /* 1757 */ {I_PALIGNR, 3, {MMXREG,RM_MMX,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+12848, 171},
+    /* 1758 */ {I_PALIGNR, 3, {XMM_L16,RM_XMM_L16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+12856, 172},
+    /* 1759 */ {I_PHADDW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34419, 171},
+    /* 1760 */ {I_PHADDW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34426, 172},
+    /* 1761 */ {I_PHADDD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34433, 171},
+    /* 1762 */ {I_PHADDD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34440, 172},
+    /* 1763 */ {I_PHADDSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34447, 171},
+    /* 1764 */ {I_PHADDSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34454, 172},
+    /* 1765 */ {I_PHSUBW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34461, 171},
+    /* 1766 */ {I_PHSUBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34468, 172},
+    /* 1767 */ {I_PHSUBD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34475, 171},
+    /* 1768 */ {I_PHSUBD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34482, 172},
+    /* 1769 */ {I_PHSUBSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34489, 171},
+    /* 1770 */ {I_PHSUBSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34496, 172},
+    /* 1771 */ {I_PMADDUBSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34503, 171},
+    /* 1772 */ {I_PMADDUBSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34510, 172},
+    /* 1773 */ {I_PMULHRSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34517, 171},
+    /* 1774 */ {I_PMULHRSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34524, 172},
+    /* 1775 */ {I_PSHUFB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34531, 171},
+    /* 1776 */ {I_PSHUFB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34538, 172},
+    /* 1777 */ {I_PSIGNB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34545, 171},
+    /* 1778 */ {I_PSIGNB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34552, 172},
+    /* 1779 */ {I_PSIGNW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34559, 171},
+    /* 1780 */ {I_PSIGNW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34566, 172},
+    /* 1781 */ {I_PSIGND, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34573, 171},
+    /* 1782 */ {I_PSIGND, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34580, 172},
+    /* 1783 */ {I_EXTRQ, 3, {XMM_L16,IMMEDIATE,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+12864, 173},
+    /* 1784 */ {I_EXTRQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45827, 173},
+    /* 1785 */ {I_INSERTQ, 4, {XMM_L16,XMM_L16,IMMEDIATE,IMMEDIATE,0}, NO_DECORATOR, nasm_bytecodes+12872, 173},
+    /* 1786 */ {I_INSERTQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45833, 173},
+    /* 1787 */ {I_MOVNTSD, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45839, 174},
+    /* 1788 */ {I_MOVNTSS, 2, {MEMORY|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45845, 175},
+    /* 1789 */ {I_LZCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34587, 113},
+    /* 1790 */ {I_LZCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34594, 113},
+    /* 1791 */ {I_LZCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34601, 59},
+    /* 1792 */ {I_BLENDPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12880, 176},
+    /* 1793 */ {I_BLENDPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12888, 176},
+    /* 1794 */ {I_BLENDVPD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM0,0,0}, NO_DECORATOR, nasm_bytecodes+34608, 176},
+    /* 1795 */ {I_BLENDVPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34608, 176},
+    /* 1796 */ {I_BLENDVPS, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM0,0,0}, NO_DECORATOR, nasm_bytecodes+34615, 176},
+    /* 1797 */ {I_BLENDVPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34615, 176},
+    /* 1798 */ {I_DPPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12896, 176},
+    /* 1799 */ {I_DPPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12904, 176},
+    /* 1800 */ {I_EXTRACTPS, 3, {RM_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4241, 176},
+    /* 1801 */ {I_EXTRACTPS, 3, {REG_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4240, 177},
+    /* 1802 */ {I_INSERTPS, 3, {XMM_L16,RM_XMM_L16|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12912, 176},
+    /* 1803 */ {I_MOVNTDQA, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34622, 176},
+    /* 1804 */ {I_MPSADBW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12920, 176},
+    /* 1805 */ {I_PACKUSDW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34629, 176},
+    /* 1806 */ {I_PBLENDVB, 3, {XMM_L16,RM_XMM_L16,XMM0,0,0}, NO_DECORATOR, nasm_bytecodes+34636, 176},
+    /* 1807 */ {I_PBLENDVB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34636, 176},
+    /* 1808 */ {I_PBLENDW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12928, 176},
+    /* 1809 */ {I_PCMPEQQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34643, 176},
+    /* 1810 */ {I_PEXTRB, 3, {REG_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4250, 176},
+    /* 1811 */ {I_PEXTRB, 3, {MEMORY|BITS8,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4250, 176},
+    /* 1812 */ {I_PEXTRB, 3, {REG_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4249, 177},
+    /* 1813 */ {I_PEXTRD, 3, {RM_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4258, 176},
+    /* 1814 */ {I_PEXTRQ, 3, {RM_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4267, 177},
+    /* 1815 */ {I_PEXTRW, 3, {REG_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4277, 176},
+    /* 1816 */ {I_PEXTRW, 3, {MEMORY|BITS16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4277, 176},
+    /* 1817 */ {I_PEXTRW, 3, {REG_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4276, 177},
+    /* 1818 */ {I_PHMINPOSUW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34650, 176},
+    /* 1819 */ {I_PINSRB, 3, {XMM_L16,MEMORY,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4286, 178},
+    /* 1820 */ {I_PINSRB, 3, {XMM_L16,RM_GPR|BITS8,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4285, 178},
+    /* 1821 */ {I_PINSRB, 3, {XMM_L16,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4286, 178},
+    /* 1822 */ {I_PINSRD, 3, {XMM_L16,RM_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4294, 178},
+    /* 1823 */ {I_PINSRQ, 3, {XMM_L16,RM_GPR|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4303, 179},
+    /* 1824 */ {I_PMAXSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34657, 176},
+    /* 1825 */ {I_PMAXSD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34664, 176},
+    /* 1826 */ {I_PMAXUD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34671, 176},
+    /* 1827 */ {I_PMAXUW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34678, 176},
+    /* 1828 */ {I_PMINSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34685, 176},
+    /* 1829 */ {I_PMINSD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34692, 176},
+    /* 1830 */ {I_PMINUD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34699, 176},
+    /* 1831 */ {I_PMINUW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34706, 176},
+    /* 1832 */ {I_PMOVSXBW, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34713, 180},
+    /* 1833 */ {I_PMOVSXBD, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34720, 181},
+    /* 1834 */ {I_PMOVSXBQ, 2, {XMM_L16,RM_XMM_L16|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34727, 182},
+    /* 1835 */ {I_PMOVSXWD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34734, 180},
+    /* 1836 */ {I_PMOVSXWQ, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34741, 181},
+    /* 1837 */ {I_PMOVSXDQ, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34748, 180},
+    /* 1838 */ {I_PMOVZXBW, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34755, 180},
+    /* 1839 */ {I_PMOVZXBD, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34762, 181},
+    /* 1840 */ {I_PMOVZXBQ, 2, {XMM_L16,RM_XMM_L16|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34769, 182},
+    /* 1841 */ {I_PMOVZXWD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34776, 180},
+    /* 1842 */ {I_PMOVZXWQ, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34783, 181},
+    /* 1843 */ {I_PMOVZXDQ, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34790, 180},
+    /* 1844 */ {I_PMULDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34797, 176},
+    /* 1845 */ {I_PMULLD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34804, 176},
+    /* 1846 */ {I_PTEST, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34811, 176},
+    /* 1847 */ {I_ROUNDPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12936, 176},
+    /* 1848 */ {I_ROUNDPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12944, 176},
+    /* 1849 */ {I_ROUNDSD, 3, {XMM_L16,RM_XMM_L16|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12952, 176},
+    /* 1850 */ {I_ROUNDSS, 3, {XMM_L16,RM_XMM_L16|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12960, 176},
+    /* 1851 */ {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12985, 183},
+    /* 1852 */ {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12968, 183},
+    /* 1853 */ {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12976, 183},
+    /* 1854 */ {I_CRC32, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12984, 184},
+    /* 1855 */ {I_CRC32, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+12992, 184},
+    /* 1856 */ {I_PCMPESTRI, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13000, 183},
+    /* 1857 */ {I_PCMPESTRM, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13008, 183},
+    /* 1858 */ {I_PCMPISTRI, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13016, 183},
+    /* 1859 */ {I_PCMPISTRM, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13024, 183},
+    /* 1860 */ {I_PCMPGTQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34818, 183},
+    /* 1861 */ {I_POPCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34825, 185},
+    /* 1862 */ {I_POPCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34832, 186},
+    /* 1863 */ {I_POPCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34839, 187},
+    /* 1864 */ {I_GETSEC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50289, 142},
+    /* 1865 */ {I_PFRCPV, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+13032, 188},
+    /* 1866 */ {I_PFRSQRTV, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+13040, 188},
+    /* 1867 */ {I_MOVBE, 2, {REG_GPR|BITS16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+13048, 189},
+    /* 1868 */ {I_MOVBE, 2, {REG_GPR|BITS32,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+13056, 189},
+    /* 1869 */ {I_MOVBE, 2, {REG_GPR|BITS64,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13064, 189},
+    /* 1870 */ {I_MOVBE, 2, {MEMORY|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+13072, 189},
+    /* 1871 */ {I_MOVBE, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+13080, 189},
+    /* 1872 */ {I_MOVBE, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13088, 189},
+    /* 1873 */ {I_AESENC, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34846, 190},
+    /* 1874 */ {I_AESENCLAST, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34853, 190},
+    /* 1875 */ {I_AESDEC, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34860, 190},
+    /* 1876 */ {I_AESDECLAST, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34867, 190},
+    /* 1877 */ {I_AESIMC, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34874, 190},
+    /* 1878 */ {I_AESKEYGENASSIST, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13096, 190},
+    /* 1879 */ {I_VAESENC, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+34881, 191},
+    /* 1880 */ {I_VAESENC, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34888, 191},
+    /* 1881 */ {I_VAESENCLAST, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+34895, 191},
+    /* 1882 */ {I_VAESENCLAST, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34902, 191},
+    /* 1883 */ {I_VAESDEC, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+34909, 191},
+    /* 1884 */ {I_VAESDEC, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34916, 191},
+    /* 1885 */ {I_VAESDECLAST, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+34923, 191},
+    /* 1886 */ {I_VAESDECLAST, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34930, 191},
+    /* 1887 */ {I_VAESIMC, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34937, 191},
+    /* 1888 */ {I_VAESKEYGENASSIST, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13104, 191},
+    /* 1889 */ {I_VAESENC, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+34944, 192},
+    /* 1890 */ {I_VAESENC, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+34951, 192},
+    /* 1891 */ {I_VAESENCLAST, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+34958, 192},
+    /* 1892 */ {I_VAESENCLAST, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+34965, 192},
+    /* 1893 */ {I_VAESDEC, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+34972, 192},
+    /* 1894 */ {I_VAESDEC, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+34979, 192},
+    /* 1895 */ {I_VAESDECLAST, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+34986, 192},
+    /* 1896 */ {I_VAESDECLAST, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+34993, 192},
+    /* 1897 */ {I_VAESENC, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+13112, 193},
+    /* 1898 */ {I_VAESENC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+13120, 193},
+    /* 1899 */ {I_VAESENC, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+13128, 193},
+    /* 1900 */ {I_VAESENC, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+13136, 193},
+    /* 1901 */ {I_VAESENCLAST, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+13144, 193},
+    /* 1902 */ {I_VAESENCLAST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+13152, 193},
+    /* 1903 */ {I_VAESENCLAST, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+13160, 193},
+    /* 1904 */ {I_VAESENCLAST, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+13168, 193},
+    /* 1905 */ {I_VAESDEC, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+13176, 193},
+    /* 1906 */ {I_VAESDEC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+13184, 193},
+    /* 1907 */ {I_VAESDEC, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+13192, 193},
+    /* 1908 */ {I_VAESDEC, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+13200, 193},
+    /* 1909 */ {I_VAESDECLAST, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+13208, 193},
+    /* 1910 */ {I_VAESDECLAST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+13216, 193},
+    /* 1911 */ {I_VAESDECLAST, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+13224, 193},
+    /* 1912 */ {I_VAESDECLAST, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+13232, 193},
+    /* 1913 */ {I_VAESENC, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+13240, 194},
+    /* 1914 */ {I_VAESENC, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+13248, 194},
+    /* 1915 */ {I_VAESENCLAST, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+13256, 194},
+    /* 1916 */ {I_VAESENCLAST, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+13264, 194},
+    /* 1917 */ {I_VAESDEC, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+13272, 194},
+    /* 1918 */ {I_VAESDEC, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+13280, 194},
+    /* 1919 */ {I_VAESDECLAST, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+13288, 194},
+    /* 1920 */ {I_VAESDECLAST, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+13296, 194},
+    /* 1921 */ {I_VADDPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35000, 191},
+    /* 1922 */ {I_VADDPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35007, 191},
+    /* 1923 */ {I_VADDPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35014, 191},
+    /* 1924 */ {I_VADDPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35021, 191},
+    /* 1925 */ {I_VADDPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35028, 191},
+    /* 1926 */ {I_VADDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35035, 191},
+    /* 1927 */ {I_VADDPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35042, 191},
+    /* 1928 */ {I_VADDPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35049, 191},
+    /* 1929 */ {I_VADDSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+35056, 191},
+    /* 1930 */ {I_VADDSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35063, 191},
+    /* 1931 */ {I_VADDSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+35070, 191},
+    /* 1932 */ {I_VADDSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35077, 191},
+    /* 1933 */ {I_VADDSUBPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35084, 191},
+    /* 1934 */ {I_VADDSUBPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35091, 191},
+    /* 1935 */ {I_VADDSUBPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35098, 191},
+    /* 1936 */ {I_VADDSUBPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35105, 191},
+    /* 1937 */ {I_VADDSUBPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35112, 191},
+    /* 1938 */ {I_VADDSUBPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35119, 191},
+    /* 1939 */ {I_VADDSUBPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35126, 191},
+    /* 1940 */ {I_VADDSUBPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35133, 191},
+    /* 1941 */ {I_VANDPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35140, 191},
+    /* 1942 */ {I_VANDPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35147, 191},
+    /* 1943 */ {I_VANDPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35154, 191},
+    /* 1944 */ {I_VANDPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35161, 191},
+    /* 1945 */ {I_VANDPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35168, 191},
+    /* 1946 */ {I_VANDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35175, 191},
+    /* 1947 */ {I_VANDPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35182, 191},
+    /* 1948 */ {I_VANDPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35189, 191},
+    /* 1949 */ {I_VANDNPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35196, 191},
+    /* 1950 */ {I_VANDNPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35203, 191},
+    /* 1951 */ {I_VANDNPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35210, 191},
+    /* 1952 */ {I_VANDNPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35217, 191},
+    /* 1953 */ {I_VANDNPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35224, 191},
+    /* 1954 */ {I_VANDNPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35231, 191},
+    /* 1955 */ {I_VANDNPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35238, 191},
+    /* 1956 */ {I_VANDNPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35245, 191},
+    /* 1957 */ {I_VBLENDPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13304, 191},
+    /* 1958 */ {I_VBLENDPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13312, 191},
+    /* 1959 */ {I_VBLENDPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13320, 191},
+    /* 1960 */ {I_VBLENDPD, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13328, 191},
+    /* 1961 */ {I_VBLENDPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13336, 191},
+    /* 1962 */ {I_VBLENDPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13344, 191},
+    /* 1963 */ {I_VBLENDPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13352, 191},
+    /* 1964 */ {I_VBLENDPS, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13360, 191},
+    /* 1965 */ {I_VBLENDVPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+13368, 191},
+    /* 1966 */ {I_VBLENDVPD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+13376, 191},
+    /* 1967 */ {I_VBLENDVPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+13384, 191},
+    /* 1968 */ {I_VBLENDVPD, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+13392, 191},
+    /* 1969 */ {I_VBLENDVPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+13400, 191},
+    /* 1970 */ {I_VBLENDVPS, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+13408, 191},
+    /* 1971 */ {I_VBLENDVPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+13416, 191},
+    /* 1972 */ {I_VBLENDVPS, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+13424, 191},
+    /* 1973 */ {I_VBROADCASTSS, 2, {XMM_L16,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35252, 191},
+    /* 1974 */ {I_VBROADCASTSS, 2, {YMM_L16,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35259, 191},
+    /* 1975 */ {I_VBROADCASTSD, 2, {YMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35266, 191},
+    /* 1976 */ {I_VBROADCASTF128, 2, {YMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35273, 191},
+    /* 1977 */ {I_VCMPEQ_OSPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4312, 191},
+    /* 1978 */ {I_VCMPEQ_OSPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4321, 191},
+    /* 1979 */ {I_VCMPEQ_OSPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4330, 191},
+    /* 1980 */ {I_VCMPEQ_OSPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4339, 191},
+    /* 1981 */ {I_VCMPEQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4348, 191},
+    /* 1982 */ {I_VCMPEQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4357, 191},
+    /* 1983 */ {I_VCMPEQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4366, 191},
+    /* 1984 */ {I_VCMPEQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4375, 191},
+    /* 1985 */ {I_VCMPLT_OSPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4384, 191},
+    /* 1986 */ {I_VCMPLT_OSPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4393, 191},
+    /* 1987 */ {I_VCMPLT_OSPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4402, 191},
+    /* 1988 */ {I_VCMPLT_OSPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4411, 191},
+    /* 1989 */ {I_VCMPLTPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4384, 191},
+    /* 1990 */ {I_VCMPLTPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4393, 191},
+    /* 1991 */ {I_VCMPLTPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4402, 191},
+    /* 1992 */ {I_VCMPLTPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4411, 191},
+    /* 1993 */ {I_VCMPLE_OSPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4420, 191},
+    /* 1994 */ {I_VCMPLE_OSPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4429, 191},
+    /* 1995 */ {I_VCMPLE_OSPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4438, 191},
+    /* 1996 */ {I_VCMPLE_OSPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4447, 191},
+    /* 1997 */ {I_VCMPLEPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4420, 191},
+    /* 1998 */ {I_VCMPLEPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4429, 191},
+    /* 1999 */ {I_VCMPLEPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4438, 191},
+    /* 2000 */ {I_VCMPLEPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4447, 191},
+    /* 2001 */ {I_VCMPUNORD_QPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4456, 191},
+    /* 2002 */ {I_VCMPUNORD_QPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4465, 191},
+    /* 2003 */ {I_VCMPUNORD_QPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4474, 191},
+    /* 2004 */ {I_VCMPUNORD_QPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4483, 191},
+    /* 2005 */ {I_VCMPUNORDPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4456, 191},
+    /* 2006 */ {I_VCMPUNORDPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4465, 191},
+    /* 2007 */ {I_VCMPUNORDPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4474, 191},
+    /* 2008 */ {I_VCMPUNORDPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4483, 191},
+    /* 2009 */ {I_VCMPNEQ_UQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4492, 191},
+    /* 2010 */ {I_VCMPNEQ_UQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4501, 191},
+    /* 2011 */ {I_VCMPNEQ_UQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4510, 191},
+    /* 2012 */ {I_VCMPNEQ_UQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4519, 191},
+    /* 2013 */ {I_VCMPNEQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4492, 191},
+    /* 2014 */ {I_VCMPNEQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4501, 191},
+    /* 2015 */ {I_VCMPNEQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4510, 191},
+    /* 2016 */ {I_VCMPNEQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4519, 191},
+    /* 2017 */ {I_VCMPNLT_USPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4528, 191},
+    /* 2018 */ {I_VCMPNLT_USPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4537, 191},
+    /* 2019 */ {I_VCMPNLT_USPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4546, 191},
+    /* 2020 */ {I_VCMPNLT_USPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4555, 191},
+    /* 2021 */ {I_VCMPNLTPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4528, 191},
+    /* 2022 */ {I_VCMPNLTPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4537, 191},
+    /* 2023 */ {I_VCMPNLTPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4546, 191},
+    /* 2024 */ {I_VCMPNLTPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4555, 191},
+    /* 2025 */ {I_VCMPNLE_USPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4564, 191},
+    /* 2026 */ {I_VCMPNLE_USPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4573, 191},
+    /* 2027 */ {I_VCMPNLE_USPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4582, 191},
+    /* 2028 */ {I_VCMPNLE_USPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4591, 191},
+    /* 2029 */ {I_VCMPNLEPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4564, 191},
+    /* 2030 */ {I_VCMPNLEPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4573, 191},
+    /* 2031 */ {I_VCMPNLEPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4582, 191},
+    /* 2032 */ {I_VCMPNLEPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4591, 191},
+    /* 2033 */ {I_VCMPORD_QPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4600, 191},
+    /* 2034 */ {I_VCMPORD_QPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4609, 191},
+    /* 2035 */ {I_VCMPORD_QPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4618, 191},
+    /* 2036 */ {I_VCMPORD_QPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4627, 191},
+    /* 2037 */ {I_VCMPORDPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4600, 191},
+    /* 2038 */ {I_VCMPORDPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4609, 191},
+    /* 2039 */ {I_VCMPORDPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4618, 191},
+    /* 2040 */ {I_VCMPORDPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4627, 191},
+    /* 2041 */ {I_VCMPEQ_UQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4636, 191},
+    /* 2042 */ {I_VCMPEQ_UQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4645, 191},
+    /* 2043 */ {I_VCMPEQ_UQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4654, 191},
+    /* 2044 */ {I_VCMPEQ_UQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4663, 191},
+    /* 2045 */ {I_VCMPNGE_USPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4672, 191},
+    /* 2046 */ {I_VCMPNGE_USPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4681, 191},
+    /* 2047 */ {I_VCMPNGE_USPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4690, 191},
+    /* 2048 */ {I_VCMPNGE_USPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4699, 191},
+    /* 2049 */ {I_VCMPNGEPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4672, 191},
+    /* 2050 */ {I_VCMPNGEPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4681, 191},
+    /* 2051 */ {I_VCMPNGEPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4690, 191},
+    /* 2052 */ {I_VCMPNGEPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4699, 191},
+    /* 2053 */ {I_VCMPNGT_USPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4708, 191},
+    /* 2054 */ {I_VCMPNGT_USPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4717, 191},
+    /* 2055 */ {I_VCMPNGT_USPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4726, 191},
+    /* 2056 */ {I_VCMPNGT_USPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4735, 191},
+    /* 2057 */ {I_VCMPNGTPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4708, 191},
+    /* 2058 */ {I_VCMPNGTPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4717, 191},
+    /* 2059 */ {I_VCMPNGTPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4726, 191},
+    /* 2060 */ {I_VCMPNGTPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4735, 191},
+    /* 2061 */ {I_VCMPFALSE_OQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4744, 191},
+    /* 2062 */ {I_VCMPFALSE_OQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4753, 191},
+    /* 2063 */ {I_VCMPFALSE_OQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4762, 191},
+    /* 2064 */ {I_VCMPFALSE_OQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4771, 191},
+    /* 2065 */ {I_VCMPFALSEPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4744, 191},
+    /* 2066 */ {I_VCMPFALSEPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4753, 191},
+    /* 2067 */ {I_VCMPFALSEPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4762, 191},
+    /* 2068 */ {I_VCMPFALSEPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4771, 191},
+    /* 2069 */ {I_VCMPNEQ_OQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4780, 191},
+    /* 2070 */ {I_VCMPNEQ_OQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4789, 191},
+    /* 2071 */ {I_VCMPNEQ_OQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4798, 191},
+    /* 2072 */ {I_VCMPNEQ_OQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4807, 191},
+    /* 2073 */ {I_VCMPGE_OSPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4816, 191},
+    /* 2074 */ {I_VCMPGE_OSPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4825, 191},
+    /* 2075 */ {I_VCMPGE_OSPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4834, 191},
+    /* 2076 */ {I_VCMPGE_OSPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4843, 191},
+    /* 2077 */ {I_VCMPGEPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4816, 191},
+    /* 2078 */ {I_VCMPGEPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4825, 191},
+    /* 2079 */ {I_VCMPGEPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4834, 191},
+    /* 2080 */ {I_VCMPGEPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4843, 191},
+    /* 2081 */ {I_VCMPGT_OSPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4852, 191},
+    /* 2082 */ {I_VCMPGT_OSPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4861, 191},
+    /* 2083 */ {I_VCMPGT_OSPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4870, 191},
+    /* 2084 */ {I_VCMPGT_OSPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4879, 191},
+    /* 2085 */ {I_VCMPGTPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4852, 191},
+    /* 2086 */ {I_VCMPGTPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4861, 191},
+    /* 2087 */ {I_VCMPGTPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4870, 191},
+    /* 2088 */ {I_VCMPGTPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4879, 191},
+    /* 2089 */ {I_VCMPTRUE_UQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4888, 191},
+    /* 2090 */ {I_VCMPTRUE_UQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4897, 191},
+    /* 2091 */ {I_VCMPTRUE_UQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4906, 191},
+    /* 2092 */ {I_VCMPTRUE_UQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4915, 191},
+    /* 2093 */ {I_VCMPTRUEPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4888, 191},
+    /* 2094 */ {I_VCMPTRUEPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4897, 191},
+    /* 2095 */ {I_VCMPTRUEPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4906, 191},
+    /* 2096 */ {I_VCMPTRUEPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4915, 191},
+    /* 2097 */ {I_VCMPEQ_OSPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4312, 191},
+    /* 2098 */ {I_VCMPEQ_OSPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4321, 191},
+    /* 2099 */ {I_VCMPEQ_OSPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4330, 191},
+    /* 2100 */ {I_VCMPEQ_OSPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4339, 191},
+    /* 2101 */ {I_VCMPLT_OQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4924, 191},
+    /* 2102 */ {I_VCMPLT_OQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4933, 191},
+    /* 2103 */ {I_VCMPLT_OQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4942, 191},
+    /* 2104 */ {I_VCMPLT_OQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4951, 191},
+    /* 2105 */ {I_VCMPLE_OQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4960, 191},
+    /* 2106 */ {I_VCMPLE_OQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4969, 191},
+    /* 2107 */ {I_VCMPLE_OQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4978, 191},
+    /* 2108 */ {I_VCMPLE_OQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4987, 191},
+    /* 2109 */ {I_VCMPUNORD_SPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4996, 191},
+    /* 2110 */ {I_VCMPUNORD_SPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5005, 191},
+    /* 2111 */ {I_VCMPUNORD_SPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5014, 191},
+    /* 2112 */ {I_VCMPUNORD_SPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5023, 191},
+    /* 2113 */ {I_VCMPNEQ_USPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5032, 191},
+    /* 2114 */ {I_VCMPNEQ_USPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5041, 191},
+    /* 2115 */ {I_VCMPNEQ_USPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5050, 191},
+    /* 2116 */ {I_VCMPNEQ_USPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5059, 191},
+    /* 2117 */ {I_VCMPNLT_UQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5068, 191},
+    /* 2118 */ {I_VCMPNLT_UQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5077, 191},
+    /* 2119 */ {I_VCMPNLT_UQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5086, 191},
+    /* 2120 */ {I_VCMPNLT_UQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5095, 191},
+    /* 2121 */ {I_VCMPNLE_UQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5104, 191},
+    /* 2122 */ {I_VCMPNLE_UQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5113, 191},
+    /* 2123 */ {I_VCMPNLE_UQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5122, 191},
+    /* 2124 */ {I_VCMPNLE_UQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5131, 191},
+    /* 2125 */ {I_VCMPORD_SPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5140, 191},
+    /* 2126 */ {I_VCMPORD_SPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5149, 191},
+    /* 2127 */ {I_VCMPORD_SPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5158, 191},
+    /* 2128 */ {I_VCMPORD_SPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5167, 191},
+    /* 2129 */ {I_VCMPEQ_USPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5176, 191},
+    /* 2130 */ {I_VCMPEQ_USPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5185, 191},
+    /* 2131 */ {I_VCMPEQ_USPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5194, 191},
+    /* 2132 */ {I_VCMPEQ_USPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5203, 191},
+    /* 2133 */ {I_VCMPNGE_UQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5212, 191},
+    /* 2134 */ {I_VCMPNGE_UQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5221, 191},
+    /* 2135 */ {I_VCMPNGE_UQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5230, 191},
+    /* 2136 */ {I_VCMPNGE_UQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5239, 191},
+    /* 2137 */ {I_VCMPNGT_UQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5248, 191},
+    /* 2138 */ {I_VCMPNGT_UQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5257, 191},
+    /* 2139 */ {I_VCMPNGT_UQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5266, 191},
+    /* 2140 */ {I_VCMPNGT_UQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5275, 191},
+    /* 2141 */ {I_VCMPFALSE_OSPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5284, 191},
+    /* 2142 */ {I_VCMPFALSE_OSPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5293, 191},
+    /* 2143 */ {I_VCMPFALSE_OSPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5302, 191},
+    /* 2144 */ {I_VCMPFALSE_OSPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5311, 191},
+    /* 2145 */ {I_VCMPNEQ_OSPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5320, 191},
+    /* 2146 */ {I_VCMPNEQ_OSPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5329, 191},
+    /* 2147 */ {I_VCMPNEQ_OSPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5338, 191},
+    /* 2148 */ {I_VCMPNEQ_OSPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5347, 191},
+    /* 2149 */ {I_VCMPGE_OQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5356, 191},
+    /* 2150 */ {I_VCMPGE_OQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5365, 191},
+    /* 2151 */ {I_VCMPGE_OQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5374, 191},
+    /* 2152 */ {I_VCMPGE_OQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5383, 191},
+    /* 2153 */ {I_VCMPGT_OQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5392, 191},
+    /* 2154 */ {I_VCMPGT_OQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5401, 191},
+    /* 2155 */ {I_VCMPGT_OQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5410, 191},
+    /* 2156 */ {I_VCMPGT_OQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5419, 191},
+    /* 2157 */ {I_VCMPTRUE_USPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5428, 191},
+    /* 2158 */ {I_VCMPTRUE_USPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5437, 191},
+    /* 2159 */ {I_VCMPTRUE_USPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5446, 191},
+    /* 2160 */ {I_VCMPTRUE_USPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5455, 191},
+    /* 2161 */ {I_VCMPPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13432, 191},
+    /* 2162 */ {I_VCMPPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13440, 191},
+    /* 2163 */ {I_VCMPPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13448, 191},
+    /* 2164 */ {I_VCMPPD, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13456, 191},
+    /* 2165 */ {I_VCMPEQ_OSPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5464, 191},
+    /* 2166 */ {I_VCMPEQ_OSPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5473, 191},
+    /* 2167 */ {I_VCMPEQ_OSPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5482, 191},
+    /* 2168 */ {I_VCMPEQ_OSPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5491, 191},
+    /* 2169 */ {I_VCMPEQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5500, 191},
+    /* 2170 */ {I_VCMPEQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5509, 191},
+    /* 2171 */ {I_VCMPEQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5518, 191},
+    /* 2172 */ {I_VCMPEQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5527, 191},
+    /* 2173 */ {I_VCMPLT_OSPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5536, 191},
+    /* 2174 */ {I_VCMPLT_OSPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5545, 191},
+    /* 2175 */ {I_VCMPLT_OSPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5554, 191},
+    /* 2176 */ {I_VCMPLT_OSPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5563, 191},
+    /* 2177 */ {I_VCMPLTPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5536, 191},
+    /* 2178 */ {I_VCMPLTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5545, 191},
+    /* 2179 */ {I_VCMPLTPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5554, 191},
+    /* 2180 */ {I_VCMPLTPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5563, 191},
+    /* 2181 */ {I_VCMPLE_OSPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5572, 191},
+    /* 2182 */ {I_VCMPLE_OSPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5581, 191},
+    /* 2183 */ {I_VCMPLE_OSPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5590, 191},
+    /* 2184 */ {I_VCMPLE_OSPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5599, 191},
+    /* 2185 */ {I_VCMPLEPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5572, 191},
+    /* 2186 */ {I_VCMPLEPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5581, 191},
+    /* 2187 */ {I_VCMPLEPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5590, 191},
+    /* 2188 */ {I_VCMPLEPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5599, 191},
+    /* 2189 */ {I_VCMPUNORD_QPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5608, 191},
+    /* 2190 */ {I_VCMPUNORD_QPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5617, 191},
+    /* 2191 */ {I_VCMPUNORD_QPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5626, 191},
+    /* 2192 */ {I_VCMPUNORD_QPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5635, 191},
+    /* 2193 */ {I_VCMPUNORDPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5608, 191},
+    /* 2194 */ {I_VCMPUNORDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5617, 191},
+    /* 2195 */ {I_VCMPUNORDPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5626, 191},
+    /* 2196 */ {I_VCMPUNORDPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5635, 191},
+    /* 2197 */ {I_VCMPNEQ_UQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5644, 191},
+    /* 2198 */ {I_VCMPNEQ_UQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5653, 191},
+    /* 2199 */ {I_VCMPNEQ_UQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5662, 191},
+    /* 2200 */ {I_VCMPNEQ_UQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5671, 191},
+    /* 2201 */ {I_VCMPNEQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5644, 191},
+    /* 2202 */ {I_VCMPNEQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5653, 191},
+    /* 2203 */ {I_VCMPNEQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5662, 191},
+    /* 2204 */ {I_VCMPNEQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5671, 191},
+    /* 2205 */ {I_VCMPNLT_USPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5680, 191},
+    /* 2206 */ {I_VCMPNLT_USPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5689, 191},
+    /* 2207 */ {I_VCMPNLT_USPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5698, 191},
+    /* 2208 */ {I_VCMPNLT_USPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5707, 191},
+    /* 2209 */ {I_VCMPNLTPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5680, 191},
+    /* 2210 */ {I_VCMPNLTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5689, 191},
+    /* 2211 */ {I_VCMPNLTPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5698, 191},
+    /* 2212 */ {I_VCMPNLTPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5707, 191},
+    /* 2213 */ {I_VCMPNLE_USPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5716, 191},
+    /* 2214 */ {I_VCMPNLE_USPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5725, 191},
+    /* 2215 */ {I_VCMPNLE_USPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5734, 191},
+    /* 2216 */ {I_VCMPNLE_USPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5743, 191},
+    /* 2217 */ {I_VCMPNLEPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5716, 191},
+    /* 2218 */ {I_VCMPNLEPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5725, 191},
+    /* 2219 */ {I_VCMPNLEPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5734, 191},
+    /* 2220 */ {I_VCMPNLEPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5743, 191},
+    /* 2221 */ {I_VCMPORD_QPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5752, 191},
+    /* 2222 */ {I_VCMPORD_QPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5761, 191},
+    /* 2223 */ {I_VCMPORD_QPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5770, 191},
+    /* 2224 */ {I_VCMPORD_QPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5779, 191},
+    /* 2225 */ {I_VCMPORDPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5752, 191},
+    /* 2226 */ {I_VCMPORDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5761, 191},
+    /* 2227 */ {I_VCMPORDPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5770, 191},
+    /* 2228 */ {I_VCMPORDPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5779, 191},
+    /* 2229 */ {I_VCMPEQ_UQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5788, 191},
+    /* 2230 */ {I_VCMPEQ_UQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5797, 191},
+    /* 2231 */ {I_VCMPEQ_UQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5806, 191},
+    /* 2232 */ {I_VCMPEQ_UQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5815, 191},
+    /* 2233 */ {I_VCMPNGE_USPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5824, 191},
+    /* 2234 */ {I_VCMPNGE_USPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5833, 191},
+    /* 2235 */ {I_VCMPNGE_USPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5842, 191},
+    /* 2236 */ {I_VCMPNGE_USPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5851, 191},
+    /* 2237 */ {I_VCMPNGEPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5824, 191},
+    /* 2238 */ {I_VCMPNGEPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5833, 191},
+    /* 2239 */ {I_VCMPNGEPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5842, 191},
+    /* 2240 */ {I_VCMPNGEPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5851, 191},
+    /* 2241 */ {I_VCMPNGT_USPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5860, 191},
+    /* 2242 */ {I_VCMPNGT_USPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5869, 191},
+    /* 2243 */ {I_VCMPNGT_USPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5878, 191},
+    /* 2244 */ {I_VCMPNGT_USPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5887, 191},
+    /* 2245 */ {I_VCMPNGTPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5860, 191},
+    /* 2246 */ {I_VCMPNGTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5869, 191},
+    /* 2247 */ {I_VCMPNGTPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5878, 191},
+    /* 2248 */ {I_VCMPNGTPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5887, 191},
+    /* 2249 */ {I_VCMPFALSE_OQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5896, 191},
+    /* 2250 */ {I_VCMPFALSE_OQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5905, 191},
+    /* 2251 */ {I_VCMPFALSE_OQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5914, 191},
+    /* 2252 */ {I_VCMPFALSE_OQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5923, 191},
+    /* 2253 */ {I_VCMPFALSEPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5896, 191},
+    /* 2254 */ {I_VCMPFALSEPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5905, 191},
+    /* 2255 */ {I_VCMPFALSEPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5914, 191},
+    /* 2256 */ {I_VCMPFALSEPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5923, 191},
+    /* 2257 */ {I_VCMPNEQ_OQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5932, 191},
+    /* 2258 */ {I_VCMPNEQ_OQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5941, 191},
+    /* 2259 */ {I_VCMPNEQ_OQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5950, 191},
+    /* 2260 */ {I_VCMPNEQ_OQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5959, 191},
+    /* 2261 */ {I_VCMPGE_OSPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5968, 191},
+    /* 2262 */ {I_VCMPGE_OSPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5977, 191},
+    /* 2263 */ {I_VCMPGE_OSPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5986, 191},
+    /* 2264 */ {I_VCMPGE_OSPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5995, 191},
+    /* 2265 */ {I_VCMPGEPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5968, 191},
+    /* 2266 */ {I_VCMPGEPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5977, 191},
+    /* 2267 */ {I_VCMPGEPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5986, 191},
+    /* 2268 */ {I_VCMPGEPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5995, 191},
+    /* 2269 */ {I_VCMPGT_OSPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6004, 191},
+    /* 2270 */ {I_VCMPGT_OSPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6013, 191},
+    /* 2271 */ {I_VCMPGT_OSPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6022, 191},
+    /* 2272 */ {I_VCMPGT_OSPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6031, 191},
+    /* 2273 */ {I_VCMPGTPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6004, 191},
+    /* 2274 */ {I_VCMPGTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6013, 191},
+    /* 2275 */ {I_VCMPGTPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6022, 191},
+    /* 2276 */ {I_VCMPGTPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6031, 191},
+    /* 2277 */ {I_VCMPTRUE_UQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6040, 191},
+    /* 2278 */ {I_VCMPTRUE_UQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6049, 191},
+    /* 2279 */ {I_VCMPTRUE_UQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6058, 191},
+    /* 2280 */ {I_VCMPTRUE_UQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6067, 191},
+    /* 2281 */ {I_VCMPTRUEPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6040, 191},
+    /* 2282 */ {I_VCMPTRUEPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6049, 191},
+    /* 2283 */ {I_VCMPTRUEPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6058, 191},
+    /* 2284 */ {I_VCMPTRUEPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6067, 191},
+    /* 2285 */ {I_VCMPEQ_OSPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5464, 191},
+    /* 2286 */ {I_VCMPEQ_OSPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5473, 191},
+    /* 2287 */ {I_VCMPEQ_OSPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5482, 191},
+    /* 2288 */ {I_VCMPEQ_OSPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5491, 191},
+    /* 2289 */ {I_VCMPLT_OQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6076, 191},
+    /* 2290 */ {I_VCMPLT_OQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6085, 191},
+    /* 2291 */ {I_VCMPLT_OQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6094, 191},
+    /* 2292 */ {I_VCMPLT_OQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6103, 191},
+    /* 2293 */ {I_VCMPLE_OQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6112, 191},
+    /* 2294 */ {I_VCMPLE_OQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6121, 191},
+    /* 2295 */ {I_VCMPLE_OQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6130, 191},
+    /* 2296 */ {I_VCMPLE_OQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6139, 191},
+    /* 2297 */ {I_VCMPUNORD_SPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6148, 191},
+    /* 2298 */ {I_VCMPUNORD_SPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6157, 191},
+    /* 2299 */ {I_VCMPUNORD_SPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6166, 191},
+    /* 2300 */ {I_VCMPUNORD_SPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6175, 191},
+    /* 2301 */ {I_VCMPNEQ_USPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6184, 191},
+    /* 2302 */ {I_VCMPNEQ_USPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6193, 191},
+    /* 2303 */ {I_VCMPNEQ_USPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6202, 191},
+    /* 2304 */ {I_VCMPNEQ_USPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6211, 191},
+    /* 2305 */ {I_VCMPNLT_UQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6220, 191},
+    /* 2306 */ {I_VCMPNLT_UQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6229, 191},
+    /* 2307 */ {I_VCMPNLT_UQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6238, 191},
+    /* 2308 */ {I_VCMPNLT_UQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6247, 191},
+    /* 2309 */ {I_VCMPNLE_UQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6256, 191},
+    /* 2310 */ {I_VCMPNLE_UQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6265, 191},
+    /* 2311 */ {I_VCMPNLE_UQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6274, 191},
+    /* 2312 */ {I_VCMPNLE_UQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6283, 191},
+    /* 2313 */ {I_VCMPORD_SPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6292, 191},
+    /* 2314 */ {I_VCMPORD_SPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6301, 191},
+    /* 2315 */ {I_VCMPORD_SPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6310, 191},
+    /* 2316 */ {I_VCMPORD_SPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6319, 191},
+    /* 2317 */ {I_VCMPEQ_USPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6328, 191},
+    /* 2318 */ {I_VCMPEQ_USPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6337, 191},
+    /* 2319 */ {I_VCMPEQ_USPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6346, 191},
+    /* 2320 */ {I_VCMPEQ_USPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6355, 191},
+    /* 2321 */ {I_VCMPNGE_UQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6364, 191},
+    /* 2322 */ {I_VCMPNGE_UQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6373, 191},
+    /* 2323 */ {I_VCMPNGE_UQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6382, 191},
+    /* 2324 */ {I_VCMPNGE_UQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6391, 191},
+    /* 2325 */ {I_VCMPNGT_UQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6400, 191},
+    /* 2326 */ {I_VCMPNGT_UQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6409, 191},
+    /* 2327 */ {I_VCMPNGT_UQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6418, 191},
+    /* 2328 */ {I_VCMPNGT_UQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6427, 191},
+    /* 2329 */ {I_VCMPFALSE_OSPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6436, 191},
+    /* 2330 */ {I_VCMPFALSE_OSPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6445, 191},
+    /* 2331 */ {I_VCMPFALSE_OSPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6454, 191},
+    /* 2332 */ {I_VCMPFALSE_OSPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6463, 191},
+    /* 2333 */ {I_VCMPNEQ_OSPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6472, 191},
+    /* 2334 */ {I_VCMPNEQ_OSPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6481, 191},
+    /* 2335 */ {I_VCMPNEQ_OSPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6490, 191},
+    /* 2336 */ {I_VCMPNEQ_OSPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6499, 191},
+    /* 2337 */ {I_VCMPGE_OQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6508, 191},
+    /* 2338 */ {I_VCMPGE_OQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6517, 191},
+    /* 2339 */ {I_VCMPGE_OQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6526, 191},
+    /* 2340 */ {I_VCMPGE_OQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6535, 191},
+    /* 2341 */ {I_VCMPGT_OQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6544, 191},
+    /* 2342 */ {I_VCMPGT_OQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6553, 191},
+    /* 2343 */ {I_VCMPGT_OQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6562, 191},
+    /* 2344 */ {I_VCMPGT_OQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6571, 191},
+    /* 2345 */ {I_VCMPTRUE_USPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6580, 191},
+    /* 2346 */ {I_VCMPTRUE_USPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6589, 191},
+    /* 2347 */ {I_VCMPTRUE_USPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6598, 191},
+    /* 2348 */ {I_VCMPTRUE_USPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6607, 191},
+    /* 2349 */ {I_VCMPPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13464, 191},
+    /* 2350 */ {I_VCMPPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13472, 191},
+    /* 2351 */ {I_VCMPPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13480, 191},
+    /* 2352 */ {I_VCMPPS, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13488, 191},
+    /* 2353 */ {I_VCMPEQ_OSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6616, 191},
+    /* 2354 */ {I_VCMPEQ_OSSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6625, 191},
+    /* 2355 */ {I_VCMPEQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6634, 191},
+    /* 2356 */ {I_VCMPEQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6643, 191},
+    /* 2357 */ {I_VCMPLT_OSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6652, 191},
+    /* 2358 */ {I_VCMPLT_OSSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6661, 191},
+    /* 2359 */ {I_VCMPLTSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6652, 191},
+    /* 2360 */ {I_VCMPLTSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6661, 191},
+    /* 2361 */ {I_VCMPLE_OSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6670, 191},
+    /* 2362 */ {I_VCMPLE_OSSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6679, 191},
+    /* 2363 */ {I_VCMPLESD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6670, 191},
+    /* 2364 */ {I_VCMPLESD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6679, 191},
+    /* 2365 */ {I_VCMPUNORD_QSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6688, 191},
+    /* 2366 */ {I_VCMPUNORD_QSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6697, 191},
+    /* 2367 */ {I_VCMPUNORDSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6688, 191},
+    /* 2368 */ {I_VCMPUNORDSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6697, 191},
+    /* 2369 */ {I_VCMPNEQ_UQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6706, 191},
+    /* 2370 */ {I_VCMPNEQ_UQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6715, 191},
+    /* 2371 */ {I_VCMPNEQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6706, 191},
+    /* 2372 */ {I_VCMPNEQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6715, 191},
+    /* 2373 */ {I_VCMPNLT_USSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6724, 191},
+    /* 2374 */ {I_VCMPNLT_USSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6733, 191},
+    /* 2375 */ {I_VCMPNLTSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6724, 191},
+    /* 2376 */ {I_VCMPNLTSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6733, 191},
+    /* 2377 */ {I_VCMPNLE_USSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6742, 191},
+    /* 2378 */ {I_VCMPNLE_USSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6751, 191},
+    /* 2379 */ {I_VCMPNLESD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6742, 191},
+    /* 2380 */ {I_VCMPNLESD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6751, 191},
+    /* 2381 */ {I_VCMPORD_QSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6760, 191},
+    /* 2382 */ {I_VCMPORD_QSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6769, 191},
+    /* 2383 */ {I_VCMPORDSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6760, 191},
+    /* 2384 */ {I_VCMPORDSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6769, 191},
+    /* 2385 */ {I_VCMPEQ_UQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6778, 191},
+    /* 2386 */ {I_VCMPEQ_UQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6787, 191},
+    /* 2387 */ {I_VCMPNGE_USSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6796, 191},
+    /* 2388 */ {I_VCMPNGE_USSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6805, 191},
+    /* 2389 */ {I_VCMPNGESD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6796, 191},
+    /* 2390 */ {I_VCMPNGESD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6805, 191},
+    /* 2391 */ {I_VCMPNGT_USSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6814, 191},
+    /* 2392 */ {I_VCMPNGT_USSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6823, 191},
+    /* 2393 */ {I_VCMPNGTSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6814, 191},
+    /* 2394 */ {I_VCMPNGTSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6823, 191},
+    /* 2395 */ {I_VCMPFALSE_OQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6832, 191},
+    /* 2396 */ {I_VCMPFALSE_OQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6841, 191},
+    /* 2397 */ {I_VCMPFALSESD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6832, 191},
+    /* 2398 */ {I_VCMPFALSESD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6841, 191},
+    /* 2399 */ {I_VCMPNEQ_OQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6850, 191},
+    /* 2400 */ {I_VCMPNEQ_OQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6859, 191},
+    /* 2401 */ {I_VCMPGE_OSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6868, 191},
+    /* 2402 */ {I_VCMPGE_OSSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6877, 191},
+    /* 2403 */ {I_VCMPGESD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6868, 191},
+    /* 2404 */ {I_VCMPGESD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6877, 191},
+    /* 2405 */ {I_VCMPGT_OSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6886, 191},
+    /* 2406 */ {I_VCMPGT_OSSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6895, 191},
+    /* 2407 */ {I_VCMPGTSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6886, 191},
+    /* 2408 */ {I_VCMPGTSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6895, 191},
+    /* 2409 */ {I_VCMPTRUE_UQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6904, 191},
+    /* 2410 */ {I_VCMPTRUE_UQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6913, 191},
+    /* 2411 */ {I_VCMPTRUESD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6904, 191},
+    /* 2412 */ {I_VCMPTRUESD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6913, 191},
+    /* 2413 */ {I_VCMPEQ_OSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6616, 191},
+    /* 2414 */ {I_VCMPEQ_OSSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6625, 191},
+    /* 2415 */ {I_VCMPLT_OQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6922, 191},
+    /* 2416 */ {I_VCMPLT_OQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6931, 191},
+    /* 2417 */ {I_VCMPLE_OQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6940, 191},
+    /* 2418 */ {I_VCMPLE_OQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6949, 191},
+    /* 2419 */ {I_VCMPUNORD_SSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6958, 191},
+    /* 2420 */ {I_VCMPUNORD_SSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6967, 191},
+    /* 2421 */ {I_VCMPNEQ_USSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6976, 191},
+    /* 2422 */ {I_VCMPNEQ_USSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6985, 191},
+    /* 2423 */ {I_VCMPNLT_UQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6994, 191},
+    /* 2424 */ {I_VCMPNLT_UQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7003, 191},
+    /* 2425 */ {I_VCMPNLE_UQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7012, 191},
+    /* 2426 */ {I_VCMPNLE_UQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7021, 191},
+    /* 2427 */ {I_VCMPORD_SSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7030, 191},
+    /* 2428 */ {I_VCMPORD_SSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7039, 191},
+    /* 2429 */ {I_VCMPEQ_USSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7048, 191},
+    /* 2430 */ {I_VCMPEQ_USSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7057, 191},
+    /* 2431 */ {I_VCMPNGE_UQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7066, 191},
+    /* 2432 */ {I_VCMPNGE_UQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7075, 191},
+    /* 2433 */ {I_VCMPNGT_UQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7084, 191},
+    /* 2434 */ {I_VCMPNGT_UQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7093, 191},
+    /* 2435 */ {I_VCMPFALSE_OSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7102, 191},
+    /* 2436 */ {I_VCMPFALSE_OSSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7111, 191},
+    /* 2437 */ {I_VCMPNEQ_OSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7120, 191},
+    /* 2438 */ {I_VCMPNEQ_OSSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7129, 191},
+    /* 2439 */ {I_VCMPGE_OQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7138, 191},
+    /* 2440 */ {I_VCMPGE_OQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7147, 191},
+    /* 2441 */ {I_VCMPGT_OQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7156, 191},
+    /* 2442 */ {I_VCMPGT_OQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7165, 191},
+    /* 2443 */ {I_VCMPTRUE_USSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7174, 191},
+    /* 2444 */ {I_VCMPTRUE_USSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7183, 191},
+    /* 2445 */ {I_VCMPSD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13496, 191},
+    /* 2446 */ {I_VCMPSD, 3, {XMM_L16,RM_XMM_L16|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13504, 191},
+    /* 2447 */ {I_VCMPEQ_OSSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7192, 191},
+    /* 2448 */ {I_VCMPEQ_OSSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7201, 191},
+    /* 2449 */ {I_VCMPEQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7210, 191},
+    /* 2450 */ {I_VCMPEQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7219, 191},
+    /* 2451 */ {I_VCMPLT_OSSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7228, 191},
+    /* 2452 */ {I_VCMPLT_OSSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7237, 191},
+    /* 2453 */ {I_VCMPLTSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7228, 191},
+    /* 2454 */ {I_VCMPLTSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7237, 191},
+    /* 2455 */ {I_VCMPLE_OSSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7246, 191},
+    /* 2456 */ {I_VCMPLE_OSSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7255, 191},
+    /* 2457 */ {I_VCMPLESS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7246, 191},
+    /* 2458 */ {I_VCMPLESS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7255, 191},
+    /* 2459 */ {I_VCMPUNORD_QSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7264, 191},
+    /* 2460 */ {I_VCMPUNORD_QSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7273, 191},
+    /* 2461 */ {I_VCMPUNORDSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7264, 191},
+    /* 2462 */ {I_VCMPUNORDSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7273, 191},
+    /* 2463 */ {I_VCMPNEQ_UQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7282, 191},
+    /* 2464 */ {I_VCMPNEQ_UQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7291, 191},
+    /* 2465 */ {I_VCMPNEQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7282, 191},
+    /* 2466 */ {I_VCMPNEQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7291, 191},
+    /* 2467 */ {I_VCMPNLT_USSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7300, 191},
+    /* 2468 */ {I_VCMPNLT_USSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7309, 191},
+    /* 2469 */ {I_VCMPNLTSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7300, 191},
+    /* 2470 */ {I_VCMPNLTSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7309, 191},
+    /* 2471 */ {I_VCMPNLE_USSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7318, 191},
+    /* 2472 */ {I_VCMPNLE_USSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7327, 191},
+    /* 2473 */ {I_VCMPNLESS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7318, 191},
+    /* 2474 */ {I_VCMPNLESS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7327, 191},
+    /* 2475 */ {I_VCMPORD_QSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7336, 191},
+    /* 2476 */ {I_VCMPORD_QSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7345, 191},
+    /* 2477 */ {I_VCMPORDSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7336, 191},
+    /* 2478 */ {I_VCMPORDSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7345, 191},
+    /* 2479 */ {I_VCMPEQ_UQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7354, 191},
+    /* 2480 */ {I_VCMPEQ_UQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7363, 191},
+    /* 2481 */ {I_VCMPNGE_USSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7372, 191},
+    /* 2482 */ {I_VCMPNGE_USSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7381, 191},
+    /* 2483 */ {I_VCMPNGESS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7372, 191},
+    /* 2484 */ {I_VCMPNGESS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7381, 191},
+    /* 2485 */ {I_VCMPNGT_USSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7390, 191},
+    /* 2486 */ {I_VCMPNGT_USSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7399, 191},
+    /* 2487 */ {I_VCMPNGTSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7390, 191},
+    /* 2488 */ {I_VCMPNGTSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7399, 191},
+    /* 2489 */ {I_VCMPFALSE_OQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7408, 191},
+    /* 2490 */ {I_VCMPFALSE_OQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7417, 191},
+    /* 2491 */ {I_VCMPFALSESS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7408, 191},
+    /* 2492 */ {I_VCMPFALSESS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7417, 191},
+    /* 2493 */ {I_VCMPNEQ_OQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7426, 191},
+    /* 2494 */ {I_VCMPNEQ_OQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7435, 191},
+    /* 2495 */ {I_VCMPGE_OSSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7444, 191},
+    /* 2496 */ {I_VCMPGE_OSSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7453, 191},
+    /* 2497 */ {I_VCMPGESS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7444, 191},
+    /* 2498 */ {I_VCMPGESS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7453, 191},
+    /* 2499 */ {I_VCMPGT_OSSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7462, 191},
+    /* 2500 */ {I_VCMPGT_OSSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7471, 191},
+    /* 2501 */ {I_VCMPGTSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7462, 191},
+    /* 2502 */ {I_VCMPGTSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7471, 191},
+    /* 2503 */ {I_VCMPTRUE_UQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7480, 191},
+    /* 2504 */ {I_VCMPTRUE_UQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7489, 191},
+    /* 2505 */ {I_VCMPTRUESS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7480, 191},
+    /* 2506 */ {I_VCMPTRUESS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7489, 191},
+    /* 2507 */ {I_VCMPEQ_OSSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7192, 191},
+    /* 2508 */ {I_VCMPEQ_OSSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7201, 191},
+    /* 2509 */ {I_VCMPLT_OQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7498, 191},
+    /* 2510 */ {I_VCMPLT_OQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7507, 191},
+    /* 2511 */ {I_VCMPLE_OQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7516, 191},
+    /* 2512 */ {I_VCMPLE_OQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7525, 191},
+    /* 2513 */ {I_VCMPUNORD_SSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7534, 191},
+    /* 2514 */ {I_VCMPUNORD_SSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7543, 191},
+    /* 2515 */ {I_VCMPNEQ_USSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7552, 191},
+    /* 2516 */ {I_VCMPNEQ_USSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7561, 191},
+    /* 2517 */ {I_VCMPNLT_UQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7570, 191},
+    /* 2518 */ {I_VCMPNLT_UQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7579, 191},
+    /* 2519 */ {I_VCMPNLE_UQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7588, 191},
+    /* 2520 */ {I_VCMPNLE_UQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7597, 191},
+    /* 2521 */ {I_VCMPORD_SSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7606, 191},
+    /* 2522 */ {I_VCMPORD_SSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7615, 191},
+    /* 2523 */ {I_VCMPEQ_USSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7624, 191},
+    /* 2524 */ {I_VCMPEQ_USSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7633, 191},
+    /* 2525 */ {I_VCMPNGE_UQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7642, 191},
+    /* 2526 */ {I_VCMPNGE_UQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7651, 191},
+    /* 2527 */ {I_VCMPNGT_UQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7660, 191},
+    /* 2528 */ {I_VCMPNGT_UQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7669, 191},
+    /* 2529 */ {I_VCMPFALSE_OSSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7678, 191},
+    /* 2530 */ {I_VCMPFALSE_OSSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7687, 191},
+    /* 2531 */ {I_VCMPNEQ_OSSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7696, 191},
+    /* 2532 */ {I_VCMPNEQ_OSSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7705, 191},
+    /* 2533 */ {I_VCMPGE_OQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7714, 191},
+    /* 2534 */ {I_VCMPGE_OQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7723, 191},
+    /* 2535 */ {I_VCMPGT_OQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7732, 191},
+    /* 2536 */ {I_VCMPGT_OQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7741, 191},
+    /* 2537 */ {I_VCMPTRUE_USSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7750, 191},
+    /* 2538 */ {I_VCMPTRUE_USSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7759, 191},
+    /* 2539 */ {I_VCMPSS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13512, 191},
+    /* 2540 */ {I_VCMPSS, 3, {XMM_L16,RM_XMM_L16|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13520, 191},
+    /* 2541 */ {I_VCOMISD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35280, 191},
+    /* 2542 */ {I_VCOMISS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35287, 191},
+    /* 2543 */ {I_VCVTDQ2PD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35294, 191},
+    /* 2544 */ {I_VCVTDQ2PD, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35301, 191},
+    /* 2545 */ {I_VCVTDQ2PS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35308, 191},
+    /* 2546 */ {I_VCVTDQ2PS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35315, 191},
+    /* 2547 */ {I_VCVTPD2DQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35322, 191},
+    /* 2548 */ {I_VCVTPD2DQ, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35322, 195},
+    /* 2549 */ {I_VCVTPD2DQ, 2, {XMM_L16,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35329, 191},
+    /* 2550 */ {I_VCVTPD2DQ, 2, {XMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35329, 196},
+    /* 2551 */ {I_VCVTPD2PS, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35336, 191},
+    /* 2552 */ {I_VCVTPD2PS, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35336, 195},
+    /* 2553 */ {I_VCVTPD2PS, 2, {XMM_L16,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35343, 191},
+    /* 2554 */ {I_VCVTPD2PS, 2, {XMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35343, 196},
+    /* 2555 */ {I_VCVTPS2DQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35350, 191},
+    /* 2556 */ {I_VCVTPS2DQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35357, 191},
+    /* 2557 */ {I_VCVTPS2PD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35364, 191},
+    /* 2558 */ {I_VCVTPS2PD, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35371, 191},
+    /* 2559 */ {I_VCVTSD2SI, 2, {REG_GPR|BITS32,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35378, 191},
+    /* 2560 */ {I_VCVTSD2SI, 2, {REG_GPR|BITS64,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35385, 197},
+    /* 2561 */ {I_VCVTSD2SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+35392, 191},
+    /* 2562 */ {I_VCVTSD2SS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35399, 191},
+    /* 2563 */ {I_VCVTSI2SD, 3, {XMM_L16,XMM_L16,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+35406, 198},
+    /* 2564 */ {I_VCVTSI2SD, 2, {XMM_L16,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35413, 198},
+    /* 2565 */ {I_VCVTSI2SD, 3, {XMM_L16,XMM_L16,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+35420, 199},
+    /* 2566 */ {I_VCVTSI2SD, 2, {XMM_L16,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35427, 199},
+    /* 2567 */ {I_VCVTSI2SS, 3, {XMM_L16,XMM_L16,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+35434, 198},
+    /* 2568 */ {I_VCVTSI2SS, 2, {XMM_L16,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35441, 198},
+    /* 2569 */ {I_VCVTSI2SS, 3, {XMM_L16,XMM_L16,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+35448, 199},
+    /* 2570 */ {I_VCVTSI2SS, 2, {XMM_L16,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35455, 199},
+    /* 2571 */ {I_VCVTSS2SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+35462, 191},
+    /* 2572 */ {I_VCVTSS2SD, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35469, 191},
+    /* 2573 */ {I_VCVTSS2SI, 2, {REG_GPR|BITS32,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35476, 191},
+    /* 2574 */ {I_VCVTSS2SI, 2, {REG_GPR|BITS64,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35483, 197},
+    /* 2575 */ {I_VCVTTPD2DQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35490, 191},
+    /* 2576 */ {I_VCVTTPD2DQ, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35490, 195},
+    /* 2577 */ {I_VCVTTPD2DQ, 2, {XMM_L16,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35497, 191},
+    /* 2578 */ {I_VCVTTPD2DQ, 2, {XMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35497, 196},
+    /* 2579 */ {I_VCVTTPS2DQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35504, 191},
+    /* 2580 */ {I_VCVTTPS2DQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35511, 191},
+    /* 2581 */ {I_VCVTTSD2SI, 2, {REG_GPR|BITS32,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35518, 191},
+    /* 2582 */ {I_VCVTTSD2SI, 2, {REG_GPR|BITS64,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35525, 197},
+    /* 2583 */ {I_VCVTTSS2SI, 2, {REG_GPR|BITS32,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35532, 191},
+    /* 2584 */ {I_VCVTTSS2SI, 2, {REG_GPR|BITS64,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35539, 197},
+    /* 2585 */ {I_VDIVPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35546, 191},
+    /* 2586 */ {I_VDIVPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35553, 191},
+    /* 2587 */ {I_VDIVPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35560, 191},
+    /* 2588 */ {I_VDIVPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35567, 191},
+    /* 2589 */ {I_VDIVPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35574, 191},
+    /* 2590 */ {I_VDIVPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35581, 191},
+    /* 2591 */ {I_VDIVPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35588, 191},
+    /* 2592 */ {I_VDIVPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35595, 191},
+    /* 2593 */ {I_VDIVSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+35602, 191},
+    /* 2594 */ {I_VDIVSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35609, 191},
+    /* 2595 */ {I_VDIVSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+35616, 191},
+    /* 2596 */ {I_VDIVSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35623, 191},
+    /* 2597 */ {I_VDPPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13528, 191},
+    /* 2598 */ {I_VDPPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13536, 191},
+    /* 2599 */ {I_VDPPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13544, 191},
+    /* 2600 */ {I_VDPPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13552, 191},
+    /* 2601 */ {I_VDPPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13560, 191},
+    /* 2602 */ {I_VDPPS, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13568, 191},
+    /* 2603 */ {I_VEXTRACTF128, 3, {RM_XMM_L16|BITS128,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13576, 191},
+    /* 2604 */ {I_VEXTRACTPS, 3, {RM_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13584, 191},
+    /* 2605 */ {I_VHADDPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35630, 191},
+    /* 2606 */ {I_VHADDPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35637, 191},
+    /* 2607 */ {I_VHADDPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35644, 191},
+    /* 2608 */ {I_VHADDPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35651, 191},
+    /* 2609 */ {I_VHADDPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35658, 191},
+    /* 2610 */ {I_VHADDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35665, 191},
+    /* 2611 */ {I_VHADDPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35672, 191},
+    /* 2612 */ {I_VHADDPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35679, 191},
+    /* 2613 */ {I_VHSUBPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35686, 191},
+    /* 2614 */ {I_VHSUBPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35693, 191},
+    /* 2615 */ {I_VHSUBPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35700, 191},
+    /* 2616 */ {I_VHSUBPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35707, 191},
+    /* 2617 */ {I_VHSUBPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35714, 191},
+    /* 2618 */ {I_VHSUBPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35721, 191},
+    /* 2619 */ {I_VHSUBPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35728, 191},
+    /* 2620 */ {I_VHSUBPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35735, 191},
+    /* 2621 */ {I_VINSERTF128, 4, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13592, 191},
+    /* 2622 */ {I_VINSERTF128, 3, {YMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13600, 191},
+    /* 2623 */ {I_VINSERTPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13608, 191},
+    /* 2624 */ {I_VINSERTPS, 3, {XMM_L16,RM_XMM_L16|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13616, 191},
+    /* 2625 */ {I_VLDDQU, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35742, 191},
+    /* 2626 */ {I_VLDQQU, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35749, 191},
+    /* 2627 */ {I_VLDDQU, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35749, 191},
+    /* 2628 */ {I_VLDMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+35756, 191},
+    /* 2629 */ {I_VMASKMOVDQU, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35763, 191},
+    /* 2630 */ {I_VMASKMOVPS, 3, {XMM_L16,XMM_L16,MEMORY|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35770, 191},
+    /* 2631 */ {I_VMASKMOVPS, 3, {YMM_L16,YMM_L16,MEMORY|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35777, 191},
+    /* 2632 */ {I_VMASKMOVPS, 3, {MEMORY|BITS128,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+35784, 195},
+    /* 2633 */ {I_VMASKMOVPS, 3, {MEMORY|BITS256,YMM_L16,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+35791, 196},
+    /* 2634 */ {I_VMASKMOVPD, 3, {XMM_L16,XMM_L16,MEMORY|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35798, 191},
+    /* 2635 */ {I_VMASKMOVPD, 3, {YMM_L16,YMM_L16,MEMORY|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35805, 191},
+    /* 2636 */ {I_VMASKMOVPD, 3, {MEMORY|BITS128,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+35812, 191},
+    /* 2637 */ {I_VMASKMOVPD, 3, {MEMORY|BITS256,YMM_L16,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+35819, 191},
+    /* 2638 */ {I_VMAXPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35826, 191},
+    /* 2639 */ {I_VMAXPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35833, 191},
+    /* 2640 */ {I_VMAXPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35840, 191},
+    /* 2641 */ {I_VMAXPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35847, 191},
+    /* 2642 */ {I_VMAXPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35854, 191},
+    /* 2643 */ {I_VMAXPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35861, 191},
+    /* 2644 */ {I_VMAXPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35868, 191},
+    /* 2645 */ {I_VMAXPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35875, 191},
+    /* 2646 */ {I_VMAXSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+35882, 191},
+    /* 2647 */ {I_VMAXSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35889, 191},
+    /* 2648 */ {I_VMAXSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+35896, 191},
+    /* 2649 */ {I_VMAXSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35903, 191},
+    /* 2650 */ {I_VMINPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35910, 191},
+    /* 2651 */ {I_VMINPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35917, 191},
+    /* 2652 */ {I_VMINPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35924, 191},
+    /* 2653 */ {I_VMINPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35931, 191},
+    /* 2654 */ {I_VMINPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35938, 191},
+    /* 2655 */ {I_VMINPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35945, 191},
+    /* 2656 */ {I_VMINPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35952, 191},
+    /* 2657 */ {I_VMINPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35959, 191},
+    /* 2658 */ {I_VMINSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+35966, 191},
+    /* 2659 */ {I_VMINSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35973, 191},
+    /* 2660 */ {I_VMINSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+35980, 191},
+    /* 2661 */ {I_VMINSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35987, 191},
+    /* 2662 */ {I_VMOVAPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35994, 191},
+    /* 2663 */ {I_VMOVAPD, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36001, 191},
+    /* 2664 */ {I_VMOVAPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36008, 191},
+    /* 2665 */ {I_VMOVAPD, 2, {RM_YMM_L16|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36015, 191},
+    /* 2666 */ {I_VMOVAPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36022, 191},
+    /* 2667 */ {I_VMOVAPS, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36029, 191},
+    /* 2668 */ {I_VMOVAPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36036, 191},
+    /* 2669 */ {I_VMOVAPS, 2, {RM_YMM_L16|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36043, 191},
+    /* 2670 */ {I_VMOVD, 2, {XMM_L16,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+36050, 191},
+    /* 2671 */ {I_VMOVD, 2, {RM_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36057, 191},
+    /* 2672 */ {I_VMOVQ, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36064, 200},
+    /* 2673 */ {I_VMOVQ, 2, {RM_XMM_L16|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36071, 200},
+    /* 2674 */ {I_VMOVQ, 2, {XMM_L16,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36078, 199},
+    /* 2675 */ {I_VMOVQ, 2, {RM_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36085, 199},
+    /* 2676 */ {I_VMOVDDUP, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36092, 191},
+    /* 2677 */ {I_VMOVDDUP, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36099, 191},
+    /* 2678 */ {I_VMOVDQA, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36106, 191},
+    /* 2679 */ {I_VMOVDQA, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36113, 191},
+    /* 2680 */ {I_VMOVQQA, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36120, 191},
+    /* 2681 */ {I_VMOVQQA, 2, {RM_YMM_L16|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36127, 191},
+    /* 2682 */ {I_VMOVDQA, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36120, 191},
+    /* 2683 */ {I_VMOVDQA, 2, {RM_YMM_L16|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36127, 191},
+    /* 2684 */ {I_VMOVDQU, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36134, 191},
+    /* 2685 */ {I_VMOVDQU, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36141, 191},
+    /* 2686 */ {I_VMOVQQU, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36148, 191},
+    /* 2687 */ {I_VMOVQQU, 2, {RM_YMM_L16|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36155, 191},
+    /* 2688 */ {I_VMOVDQU, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36148, 191},
+    /* 2689 */ {I_VMOVDQU, 2, {RM_YMM_L16|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36155, 191},
+    /* 2690 */ {I_VMOVHLPS, 3, {XMM_L16,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+36162, 191},
+    /* 2691 */ {I_VMOVHLPS, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36169, 191},
+    /* 2692 */ {I_VMOVHPD, 3, {XMM_L16,XMM_L16,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+36176, 191},
+    /* 2693 */ {I_VMOVHPD, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36183, 191},
+    /* 2694 */ {I_VMOVHPD, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36190, 191},
+    /* 2695 */ {I_VMOVHPS, 3, {XMM_L16,XMM_L16,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+36197, 191},
+    /* 2696 */ {I_VMOVHPS, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36204, 191},
+    /* 2697 */ {I_VMOVHPS, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36211, 191},
+    /* 2698 */ {I_VMOVLHPS, 3, {XMM_L16,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+36197, 191},
+    /* 2699 */ {I_VMOVLHPS, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36204, 191},
+    /* 2700 */ {I_VMOVLPD, 3, {XMM_L16,XMM_L16,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+36218, 191},
+    /* 2701 */ {I_VMOVLPD, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36225, 191},
+    /* 2702 */ {I_VMOVLPD, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36232, 191},
+    /* 2703 */ {I_VMOVLPS, 3, {XMM_L16,XMM_L16,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+36162, 191},
+    /* 2704 */ {I_VMOVLPS, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36169, 191},
+    /* 2705 */ {I_VMOVLPS, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36239, 191},
+    /* 2706 */ {I_VMOVMSKPD, 2, {REG_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36246, 197},
+    /* 2707 */ {I_VMOVMSKPD, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36246, 191},
+    /* 2708 */ {I_VMOVMSKPD, 2, {REG_GPR|BITS64,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36253, 197},
+    /* 2709 */ {I_VMOVMSKPD, 2, {REG_GPR|BITS32,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36253, 191},
+    /* 2710 */ {I_VMOVMSKPS, 2, {REG_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36260, 197},
+    /* 2711 */ {I_VMOVMSKPS, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36260, 191},
+    /* 2712 */ {I_VMOVMSKPS, 2, {REG_GPR|BITS64,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36267, 197},
+    /* 2713 */ {I_VMOVMSKPS, 2, {REG_GPR|BITS32,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36267, 191},
+    /* 2714 */ {I_VMOVNTDQ, 2, {MEMORY|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36274, 191},
+    /* 2715 */ {I_VMOVNTQQ, 2, {MEMORY|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36281, 191},
+    /* 2716 */ {I_VMOVNTDQ, 2, {MEMORY|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36281, 191},
+    /* 2717 */ {I_VMOVNTDQA, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36288, 191},
+    /* 2718 */ {I_VMOVNTPD, 2, {MEMORY|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36295, 191},
+    /* 2719 */ {I_VMOVNTPD, 2, {MEMORY|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36302, 191},
+    /* 2720 */ {I_VMOVNTPS, 2, {MEMORY|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36309, 191},
+    /* 2721 */ {I_VMOVNTPS, 2, {MEMORY|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36316, 191},
+    /* 2722 */ {I_VMOVSD, 3, {XMM_L16,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+36323, 191},
+    /* 2723 */ {I_VMOVSD, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36330, 191},
+    /* 2724 */ {I_VMOVSD, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36337, 191},
+    /* 2725 */ {I_VMOVSD, 3, {XMM_L16,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+36344, 191},
+    /* 2726 */ {I_VMOVSD, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36351, 191},
+    /* 2727 */ {I_VMOVSD, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36358, 191},
+    /* 2728 */ {I_VMOVSHDUP, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36365, 191},
+    /* 2729 */ {I_VMOVSHDUP, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36372, 191},
+    /* 2730 */ {I_VMOVSLDUP, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36379, 191},
+    /* 2731 */ {I_VMOVSLDUP, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36386, 191},
+    /* 2732 */ {I_VMOVSS, 3, {XMM_L16,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+36393, 191},
+    /* 2733 */ {I_VMOVSS, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36400, 191},
+    /* 2734 */ {I_VMOVSS, 2, {XMM_L16,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+36407, 191},
+    /* 2735 */ {I_VMOVSS, 3, {XMM_L16,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+36414, 191},
+    /* 2736 */ {I_VMOVSS, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36421, 191},
+    /* 2737 */ {I_VMOVSS, 2, {MEMORY|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36428, 191},
+    /* 2738 */ {I_VMOVUPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36435, 191},
+    /* 2739 */ {I_VMOVUPD, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36442, 191},
+    /* 2740 */ {I_VMOVUPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36449, 191},
+    /* 2741 */ {I_VMOVUPD, 2, {RM_YMM_L16|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36456, 191},
+    /* 2742 */ {I_VMOVUPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36463, 191},
+    /* 2743 */ {I_VMOVUPS, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36470, 191},
+    /* 2744 */ {I_VMOVUPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36477, 191},
+    /* 2745 */ {I_VMOVUPS, 2, {RM_YMM_L16|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36484, 191},
+    /* 2746 */ {I_VMPSADBW, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13624, 191},
+    /* 2747 */ {I_VMPSADBW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13632, 191},
+    /* 2748 */ {I_VMULPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36491, 191},
+    /* 2749 */ {I_VMULPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36498, 191},
+    /* 2750 */ {I_VMULPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+36505, 191},
+    /* 2751 */ {I_VMULPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36512, 191},
+    /* 2752 */ {I_VMULPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36519, 191},
+    /* 2753 */ {I_VMULPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36526, 191},
+    /* 2754 */ {I_VMULPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+36533, 191},
+    /* 2755 */ {I_VMULPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36540, 191},
+    /* 2756 */ {I_VMULSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+36547, 191},
+    /* 2757 */ {I_VMULSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36554, 191},
+    /* 2758 */ {I_VMULSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+36561, 191},
+    /* 2759 */ {I_VMULSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+36568, 191},
+    /* 2760 */ {I_VORPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36575, 191},
+    /* 2761 */ {I_VORPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36582, 191},
+    /* 2762 */ {I_VORPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+36589, 191},
+    /* 2763 */ {I_VORPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36596, 191},
+    /* 2764 */ {I_VORPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36603, 191},
+    /* 2765 */ {I_VORPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36610, 191},
+    /* 2766 */ {I_VORPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+36617, 191},
+    /* 2767 */ {I_VORPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36624, 191},
+    /* 2768 */ {I_VPABSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36631, 191},
+    /* 2769 */ {I_VPABSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36638, 191},
+    /* 2770 */ {I_VPABSD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36645, 191},
+    /* 2771 */ {I_VPACKSSWB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36652, 191},
+    /* 2772 */ {I_VPACKSSWB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36659, 191},
+    /* 2773 */ {I_VPACKSSDW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36666, 191},
+    /* 2774 */ {I_VPACKSSDW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36673, 191},
+    /* 2775 */ {I_VPACKUSWB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36680, 191},
+    /* 2776 */ {I_VPACKUSWB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36687, 191},
+    /* 2777 */ {I_VPACKUSDW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36694, 191},
+    /* 2778 */ {I_VPACKUSDW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36701, 191},
+    /* 2779 */ {I_VPADDB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36708, 191},
+    /* 2780 */ {I_VPADDB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36715, 191},
+    /* 2781 */ {I_VPADDW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36722, 191},
+    /* 2782 */ {I_VPADDW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36729, 191},
+    /* 2783 */ {I_VPADDD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36736, 191},
+    /* 2784 */ {I_VPADDD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36743, 191},
+    /* 2785 */ {I_VPADDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36750, 191},
+    /* 2786 */ {I_VPADDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36757, 191},
+    /* 2787 */ {I_VPADDSB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36764, 191},
+    /* 2788 */ {I_VPADDSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36771, 191},
+    /* 2789 */ {I_VPADDSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36778, 191},
+    /* 2790 */ {I_VPADDSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36785, 191},
+    /* 2791 */ {I_VPADDUSB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36792, 191},
+    /* 2792 */ {I_VPADDUSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36799, 191},
+    /* 2793 */ {I_VPADDUSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36806, 191},
+    /* 2794 */ {I_VPADDUSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36813, 191},
+    /* 2795 */ {I_VPALIGNR, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13640, 191},
+    /* 2796 */ {I_VPALIGNR, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13648, 191},
+    /* 2797 */ {I_VPAND, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36820, 191},
+    /* 2798 */ {I_VPAND, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36827, 191},
+    /* 2799 */ {I_VPANDN, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36834, 191},
+    /* 2800 */ {I_VPANDN, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36841, 191},
+    /* 2801 */ {I_VPAVGB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36848, 191},
+    /* 2802 */ {I_VPAVGB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36855, 191},
+    /* 2803 */ {I_VPAVGW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36862, 191},
+    /* 2804 */ {I_VPAVGW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36869, 191},
+    /* 2805 */ {I_VPBLENDVB, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+13656, 191},
+    /* 2806 */ {I_VPBLENDVB, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+13664, 191},
+    /* 2807 */ {I_VPBLENDW, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13672, 191},
+    /* 2808 */ {I_VPBLENDW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13680, 191},
+    /* 2809 */ {I_VPCMPESTRI, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13688, 191},
+    /* 2810 */ {I_VPCMPESTRM, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13696, 191},
+    /* 2811 */ {I_VPCMPISTRI, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13704, 191},
+    /* 2812 */ {I_VPCMPISTRM, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13712, 191},
+    /* 2813 */ {I_VPCMPEQB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36876, 191},
+    /* 2814 */ {I_VPCMPEQB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36883, 191},
+    /* 2815 */ {I_VPCMPEQW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36890, 191},
+    /* 2816 */ {I_VPCMPEQW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36897, 191},
+    /* 2817 */ {I_VPCMPEQD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36904, 191},
+    /* 2818 */ {I_VPCMPEQD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36911, 191},
+    /* 2819 */ {I_VPCMPEQQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36918, 191},
+    /* 2820 */ {I_VPCMPEQQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36925, 191},
+    /* 2821 */ {I_VPCMPGTB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36932, 191},
+    /* 2822 */ {I_VPCMPGTB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36939, 191},
+    /* 2823 */ {I_VPCMPGTW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36946, 191},
+    /* 2824 */ {I_VPCMPGTW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36953, 191},
+    /* 2825 */ {I_VPCMPGTD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36960, 191},
+    /* 2826 */ {I_VPCMPGTD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36967, 191},
+    /* 2827 */ {I_VPCMPGTQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36974, 191},
+    /* 2828 */ {I_VPCMPGTQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36981, 191},
+    /* 2829 */ {I_VPERMILPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36988, 191},
+    /* 2830 */ {I_VPERMILPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36995, 191},
+    /* 2831 */ {I_VPERMILPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+37002, 191},
+    /* 2832 */ {I_VPERMILPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+37009, 191},
+    /* 2833 */ {I_VPERMILPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13720, 191},
+    /* 2834 */ {I_VPERMILPD, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13728, 191},
+    /* 2835 */ {I_VPERMILPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37016, 191},
+    /* 2836 */ {I_VPERMILPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37023, 191},
+    /* 2837 */ {I_VPERMILPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+37030, 191},
+    /* 2838 */ {I_VPERMILPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+37037, 191},
+    /* 2839 */ {I_VPERMILPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13736, 191},
+    /* 2840 */ {I_VPERMILPS, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13744, 191},
+    /* 2841 */ {I_VPERM2F128, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13752, 191},
+    /* 2842 */ {I_VPERM2F128, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13760, 191},
+    /* 2843 */ {I_VPEXTRB, 3, {REG_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13768, 197},
+    /* 2844 */ {I_VPEXTRB, 3, {REG_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13768, 191},
+    /* 2845 */ {I_VPEXTRB, 3, {MEMORY|BITS8,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13768, 191},
+    /* 2846 */ {I_VPEXTRW, 3, {REG_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13776, 197},
+    /* 2847 */ {I_VPEXTRW, 3, {REG_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13776, 191},
+    /* 2848 */ {I_VPEXTRW, 3, {REG_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13784, 197},
+    /* 2849 */ {I_VPEXTRW, 3, {REG_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13784, 191},
+    /* 2850 */ {I_VPEXTRW, 3, {MEMORY|BITS16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13784, 191},
+    /* 2851 */ {I_VPEXTRD, 3, {REG_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13792, 197},
+    /* 2852 */ {I_VPEXTRD, 3, {RM_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13792, 191},
+    /* 2853 */ {I_VPEXTRQ, 3, {RM_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13800, 197},
+    /* 2854 */ {I_VPHADDW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37044, 191},
+    /* 2855 */ {I_VPHADDW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37051, 191},
+    /* 2856 */ {I_VPHADDD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37058, 191},
+    /* 2857 */ {I_VPHADDD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37065, 191},
+    /* 2858 */ {I_VPHADDSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37072, 191},
+    /* 2859 */ {I_VPHADDSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37079, 191},
+    /* 2860 */ {I_VPHMINPOSUW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37086, 191},
+    /* 2861 */ {I_VPHSUBW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37093, 191},
+    /* 2862 */ {I_VPHSUBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37100, 191},
+    /* 2863 */ {I_VPHSUBD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37107, 191},
+    /* 2864 */ {I_VPHSUBD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37114, 191},
+    /* 2865 */ {I_VPHSUBSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37121, 191},
+    /* 2866 */ {I_VPHSUBSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37128, 191},
+    /* 2867 */ {I_VPINSRB, 4, {XMM_L16,XMM_L16,MEMORY|BITS8,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13808, 191},
+    /* 2868 */ {I_VPINSRB, 3, {XMM_L16,MEMORY|BITS8,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13816, 191},
+    /* 2869 */ {I_VPINSRB, 4, {XMM_L16,XMM_L16,RM_GPR|BITS8,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13808, 191},
+    /* 2870 */ {I_VPINSRB, 3, {XMM_L16,RM_GPR|BITS8,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13816, 191},
+    /* 2871 */ {I_VPINSRB, 4, {XMM_L16,XMM_L16,REG_GPR|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13808, 191},
+    /* 2872 */ {I_VPINSRB, 3, {XMM_L16,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13816, 191},
+    /* 2873 */ {I_VPINSRW, 4, {XMM_L16,XMM_L16,MEMORY|BITS16,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13824, 191},
+    /* 2874 */ {I_VPINSRW, 3, {XMM_L16,MEMORY|BITS16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13832, 191},
+    /* 2875 */ {I_VPINSRW, 4, {XMM_L16,XMM_L16,RM_GPR|BITS16,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13824, 191},
+    /* 2876 */ {I_VPINSRW, 3, {XMM_L16,RM_GPR|BITS16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13832, 191},
+    /* 2877 */ {I_VPINSRW, 4, {XMM_L16,XMM_L16,REG_GPR|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13824, 191},
+    /* 2878 */ {I_VPINSRW, 3, {XMM_L16,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13832, 191},
+    /* 2879 */ {I_VPINSRD, 4, {XMM_L16,XMM_L16,MEMORY|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13840, 191},
+    /* 2880 */ {I_VPINSRD, 3, {XMM_L16,MEMORY|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13848, 191},
+    /* 2881 */ {I_VPINSRD, 4, {XMM_L16,XMM_L16,RM_GPR|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13840, 191},
+    /* 2882 */ {I_VPINSRD, 3, {XMM_L16,RM_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13848, 191},
+    /* 2883 */ {I_VPINSRQ, 4, {XMM_L16,XMM_L16,MEMORY|BITS64,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13856, 197},
+    /* 2884 */ {I_VPINSRQ, 3, {XMM_L16,MEMORY|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13864, 197},
+    /* 2885 */ {I_VPINSRQ, 4, {XMM_L16,XMM_L16,RM_GPR|BITS64,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13856, 197},
+    /* 2886 */ {I_VPINSRQ, 3, {XMM_L16,RM_GPR|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13864, 197},
+    /* 2887 */ {I_VPMADDWD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37135, 191},
+    /* 2888 */ {I_VPMADDWD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37142, 191},
+    /* 2889 */ {I_VPMADDUBSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37149, 191},
+    /* 2890 */ {I_VPMADDUBSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37156, 191},
+    /* 2891 */ {I_VPMAXSB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37163, 191},
+    /* 2892 */ {I_VPMAXSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37170, 191},
+    /* 2893 */ {I_VPMAXSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37177, 191},
+    /* 2894 */ {I_VPMAXSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37184, 191},
+    /* 2895 */ {I_VPMAXSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37191, 191},
+    /* 2896 */ {I_VPMAXSD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37198, 191},
+    /* 2897 */ {I_VPMAXUB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37205, 191},
+    /* 2898 */ {I_VPMAXUB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37212, 191},
+    /* 2899 */ {I_VPMAXUW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37219, 191},
+    /* 2900 */ {I_VPMAXUW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37226, 191},
+    /* 2901 */ {I_VPMAXUD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37233, 191},
+    /* 2902 */ {I_VPMAXUD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37240, 191},
+    /* 2903 */ {I_VPMINSB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37247, 191},
+    /* 2904 */ {I_VPMINSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37254, 191},
+    /* 2905 */ {I_VPMINSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37261, 191},
+    /* 2906 */ {I_VPMINSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37268, 191},
+    /* 2907 */ {I_VPMINSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37275, 191},
+    /* 2908 */ {I_VPMINSD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37282, 191},
+    /* 2909 */ {I_VPMINUB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37289, 191},
+    /* 2910 */ {I_VPMINUB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37296, 191},
+    /* 2911 */ {I_VPMINUW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37303, 191},
+    /* 2912 */ {I_VPMINUW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37310, 191},
+    /* 2913 */ {I_VPMINUD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37317, 191},
+    /* 2914 */ {I_VPMINUD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37324, 191},
+    /* 2915 */ {I_VPMOVMSKB, 2, {REG_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+37331, 197},
+    /* 2916 */ {I_VPMOVMSKB, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+37331, 191},
+    /* 2917 */ {I_VPMOVSXBW, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+37338, 191},
+    /* 2918 */ {I_VPMOVSXBD, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+37345, 191},
+    /* 2919 */ {I_VPMOVSXBQ, 2, {XMM_L16,RM_XMM_L16|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+37352, 191},
+    /* 2920 */ {I_VPMOVSXWD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+37359, 191},
+    /* 2921 */ {I_VPMOVSXWQ, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+37366, 191},
+    /* 2922 */ {I_VPMOVSXDQ, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+37373, 191},
+    /* 2923 */ {I_VPMOVZXBW, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+37380, 191},
+    /* 2924 */ {I_VPMOVZXBD, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+37387, 191},
+    /* 2925 */ {I_VPMOVZXBQ, 2, {XMM_L16,RM_XMM_L16|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+37394, 191},
+    /* 2926 */ {I_VPMOVZXWD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+37401, 191},
+    /* 2927 */ {I_VPMOVZXWQ, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+37408, 191},
+    /* 2928 */ {I_VPMOVZXDQ, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+37415, 191},
+    /* 2929 */ {I_VPMULHUW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37422, 191},
+    /* 2930 */ {I_VPMULHUW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37429, 191},
+    /* 2931 */ {I_VPMULHRSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37436, 191},
+    /* 2932 */ {I_VPMULHRSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37443, 191},
+    /* 2933 */ {I_VPMULHW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37450, 191},
+    /* 2934 */ {I_VPMULHW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37457, 191},
+    /* 2935 */ {I_VPMULLW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37464, 191},
+    /* 2936 */ {I_VPMULLW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37471, 191},
+    /* 2937 */ {I_VPMULLD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37478, 191},
+    /* 2938 */ {I_VPMULLD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37485, 191},
+    /* 2939 */ {I_VPMULUDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37492, 191},
+    /* 2940 */ {I_VPMULUDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37499, 191},
+    /* 2941 */ {I_VPMULDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37506, 191},
+    /* 2942 */ {I_VPMULDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37513, 191},
+    /* 2943 */ {I_VPOR, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37520, 191},
+    /* 2944 */ {I_VPOR, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37527, 191},
+    /* 2945 */ {I_VPSADBW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37534, 191},
+    /* 2946 */ {I_VPSADBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37541, 191},
+    /* 2947 */ {I_VPSHUFB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37548, 191},
+    /* 2948 */ {I_VPSHUFB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37555, 191},
+    /* 2949 */ {I_VPSHUFD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13872, 191},
+    /* 2950 */ {I_VPSHUFHW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13880, 191},
+    /* 2951 */ {I_VPSHUFLW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13888, 191},
+    /* 2952 */ {I_VPSIGNB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37562, 191},
+    /* 2953 */ {I_VPSIGNB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37569, 191},
+    /* 2954 */ {I_VPSIGNW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37576, 191},
+    /* 2955 */ {I_VPSIGNW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37583, 191},
+    /* 2956 */ {I_VPSIGND, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37590, 191},
+    /* 2957 */ {I_VPSIGND, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37597, 191},
+    /* 2958 */ {I_VPSLLDQ, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13896, 191},
+    /* 2959 */ {I_VPSLLDQ, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+13904, 191},
+    /* 2960 */ {I_VPSRLDQ, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13912, 191},
+    /* 2961 */ {I_VPSRLDQ, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+13920, 191},
+    /* 2962 */ {I_VPSLLW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37604, 191},
+    /* 2963 */ {I_VPSLLW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37611, 191},
+    /* 2964 */ {I_VPSLLW, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13928, 191},
+    /* 2965 */ {I_VPSLLW, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+13936, 191},
+    /* 2966 */ {I_VPSLLD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37618, 191},
+    /* 2967 */ {I_VPSLLD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37625, 191},
+    /* 2968 */ {I_VPSLLD, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13944, 191},
+    /* 2969 */ {I_VPSLLD, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+13952, 191},
+    /* 2970 */ {I_VPSLLQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37632, 191},
+    /* 2971 */ {I_VPSLLQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37639, 191},
+    /* 2972 */ {I_VPSLLQ, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13960, 191},
+    /* 2973 */ {I_VPSLLQ, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+13968, 191},
+    /* 2974 */ {I_VPSRAW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37646, 191},
+    /* 2975 */ {I_VPSRAW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37653, 191},
+    /* 2976 */ {I_VPSRAW, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13976, 191},
+    /* 2977 */ {I_VPSRAW, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+13984, 191},
+    /* 2978 */ {I_VPSRAD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37660, 191},
+    /* 2979 */ {I_VPSRAD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37667, 191},
+    /* 2980 */ {I_VPSRAD, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13992, 191},
+    /* 2981 */ {I_VPSRAD, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+14000, 191},
+    /* 2982 */ {I_VPSRLW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37674, 191},
+    /* 2983 */ {I_VPSRLW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37681, 191},
+    /* 2984 */ {I_VPSRLW, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14008, 191},
+    /* 2985 */ {I_VPSRLW, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+14016, 191},
+    /* 2986 */ {I_VPSRLD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37688, 191},
+    /* 2987 */ {I_VPSRLD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37695, 191},
+    /* 2988 */ {I_VPSRLD, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14024, 191},
+    /* 2989 */ {I_VPSRLD, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+14032, 191},
+    /* 2990 */ {I_VPSRLQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37702, 191},
+    /* 2991 */ {I_VPSRLQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37709, 191},
+    /* 2992 */ {I_VPSRLQ, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14040, 191},
+    /* 2993 */ {I_VPSRLQ, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+14048, 191},
+    /* 2994 */ {I_VPTEST, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37716, 191},
+    /* 2995 */ {I_VPTEST, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+37723, 191},
+    /* 2996 */ {I_VPSUBB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37730, 191},
+    /* 2997 */ {I_VPSUBB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37737, 191},
+    /* 2998 */ {I_VPSUBW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37744, 191},
+    /* 2999 */ {I_VPSUBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37751, 191},
+    /* 3000 */ {I_VPSUBD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37758, 191},
+    /* 3001 */ {I_VPSUBD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37765, 191},
+    /* 3002 */ {I_VPSUBQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37772, 191},
+    /* 3003 */ {I_VPSUBQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37779, 191},
+    /* 3004 */ {I_VPSUBSB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37786, 191},
+    /* 3005 */ {I_VPSUBSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37793, 191},
+    /* 3006 */ {I_VPSUBSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37800, 191},
+    /* 3007 */ {I_VPSUBSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37807, 191},
+    /* 3008 */ {I_VPSUBUSB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37814, 191},
+    /* 3009 */ {I_VPSUBUSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37821, 191},
+    /* 3010 */ {I_VPSUBUSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37828, 191},
+    /* 3011 */ {I_VPSUBUSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37835, 191},
+    /* 3012 */ {I_VPUNPCKHBW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37842, 191},
+    /* 3013 */ {I_VPUNPCKHBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37849, 191},
+    /* 3014 */ {I_VPUNPCKHWD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37856, 191},
+    /* 3015 */ {I_VPUNPCKHWD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37863, 191},
+    /* 3016 */ {I_VPUNPCKHDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37870, 191},
+    /* 3017 */ {I_VPUNPCKHDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37877, 191},
+    /* 3018 */ {I_VPUNPCKHQDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37884, 191},
+    /* 3019 */ {I_VPUNPCKHQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37891, 191},
+    /* 3020 */ {I_VPUNPCKLBW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37898, 191},
+    /* 3021 */ {I_VPUNPCKLBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37905, 191},
+    /* 3022 */ {I_VPUNPCKLWD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37912, 191},
+    /* 3023 */ {I_VPUNPCKLWD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37919, 191},
+    /* 3024 */ {I_VPUNPCKLDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37926, 191},
+    /* 3025 */ {I_VPUNPCKLDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37933, 191},
+    /* 3026 */ {I_VPUNPCKLQDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37940, 191},
+    /* 3027 */ {I_VPUNPCKLQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37947, 191},
+    /* 3028 */ {I_VPXOR, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37954, 191},
+    /* 3029 */ {I_VPXOR, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37961, 191},
+    /* 3030 */ {I_VRCPPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37968, 191},
+    /* 3031 */ {I_VRCPPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+37975, 191},
+    /* 3032 */ {I_VRCPSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+37982, 191},
+    /* 3033 */ {I_VRCPSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+37989, 191},
+    /* 3034 */ {I_VRSQRTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37996, 191},
+    /* 3035 */ {I_VRSQRTPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38003, 191},
+    /* 3036 */ {I_VRSQRTSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38010, 191},
+    /* 3037 */ {I_VRSQRTSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+38017, 191},
+    /* 3038 */ {I_VROUNDPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14056, 191},
+    /* 3039 */ {I_VROUNDPD, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14064, 191},
+    /* 3040 */ {I_VROUNDPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14072, 191},
+    /* 3041 */ {I_VROUNDPS, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14080, 191},
+    /* 3042 */ {I_VROUNDSD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+14088, 191},
+    /* 3043 */ {I_VROUNDSD, 3, {XMM_L16,RM_XMM_L16|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14096, 191},
+    /* 3044 */ {I_VROUNDSS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+14104, 191},
+    /* 3045 */ {I_VROUNDSS, 3, {XMM_L16,RM_XMM_L16|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14112, 191},
+    /* 3046 */ {I_VSHUFPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+14120, 191},
+    /* 3047 */ {I_VSHUFPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14128, 191},
+    /* 3048 */ {I_VSHUFPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+14136, 191},
+    /* 3049 */ {I_VSHUFPD, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14144, 191},
+    /* 3050 */ {I_VSHUFPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+14152, 191},
+    /* 3051 */ {I_VSHUFPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14160, 191},
+    /* 3052 */ {I_VSHUFPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+14168, 191},
+    /* 3053 */ {I_VSHUFPS, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14176, 191},
+    /* 3054 */ {I_VSQRTPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38024, 191},
+    /* 3055 */ {I_VSQRTPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38031, 191},
+    /* 3056 */ {I_VSQRTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38038, 191},
+    /* 3057 */ {I_VSQRTPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38045, 191},
+    /* 3058 */ {I_VSQRTSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38052, 191},
+    /* 3059 */ {I_VSQRTSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+38059, 191},
+    /* 3060 */ {I_VSQRTSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38066, 191},
+    /* 3061 */ {I_VSQRTSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+38073, 191},
+    /* 3062 */ {I_VSTMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+38080, 191},
+    /* 3063 */ {I_VSUBPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38087, 191},
+    /* 3064 */ {I_VSUBPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38094, 191},
+    /* 3065 */ {I_VSUBPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38101, 191},
+    /* 3066 */ {I_VSUBPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38108, 191},
+    /* 3067 */ {I_VSUBPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38115, 191},
+    /* 3068 */ {I_VSUBPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38122, 191},
+    /* 3069 */ {I_VSUBPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38129, 191},
+    /* 3070 */ {I_VSUBPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38136, 191},
+    /* 3071 */ {I_VSUBSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38143, 191},
+    /* 3072 */ {I_VSUBSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+38150, 191},
+    /* 3073 */ {I_VSUBSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38157, 191},
+    /* 3074 */ {I_VSUBSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+38164, 191},
+    /* 3075 */ {I_VTESTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38171, 191},
+    /* 3076 */ {I_VTESTPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38178, 191},
+    /* 3077 */ {I_VTESTPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38185, 191},
+    /* 3078 */ {I_VTESTPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38192, 191},
+    /* 3079 */ {I_VUCOMISD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+38199, 191},
+    /* 3080 */ {I_VUCOMISS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+38206, 191},
+    /* 3081 */ {I_VUNPCKHPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38213, 191},
+    /* 3082 */ {I_VUNPCKHPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38220, 191},
+    /* 3083 */ {I_VUNPCKHPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38227, 191},
+    /* 3084 */ {I_VUNPCKHPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38234, 191},
+    /* 3085 */ {I_VUNPCKHPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38241, 191},
+    /* 3086 */ {I_VUNPCKHPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38248, 191},
+    /* 3087 */ {I_VUNPCKHPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38255, 191},
+    /* 3088 */ {I_VUNPCKHPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38262, 191},
+    /* 3089 */ {I_VUNPCKLPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38269, 191},
+    /* 3090 */ {I_VUNPCKLPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38276, 191},
+    /* 3091 */ {I_VUNPCKLPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38283, 191},
+    /* 3092 */ {I_VUNPCKLPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38290, 191},
+    /* 3093 */ {I_VUNPCKLPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38297, 191},
+    /* 3094 */ {I_VUNPCKLPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38304, 191},
+    /* 3095 */ {I_VUNPCKLPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38311, 191},
+    /* 3096 */ {I_VUNPCKLPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38318, 191},
+    /* 3097 */ {I_VXORPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38325, 191},
+    /* 3098 */ {I_VXORPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38332, 191},
+    /* 3099 */ {I_VXORPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38339, 191},
+    /* 3100 */ {I_VXORPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38346, 191},
+    /* 3101 */ {I_VXORPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38353, 191},
+    /* 3102 */ {I_VXORPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38360, 191},
+    /* 3103 */ {I_VXORPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38367, 191},
+    /* 3104 */ {I_VXORPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38374, 191},
+    /* 3105 */ {I_VZEROALL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45851, 191},
+    /* 3106 */ {I_VZEROUPPER, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45857, 191},
+    /* 3107 */ {I_PCLMULLQLQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+7768, 190},
+    /* 3108 */ {I_PCLMULHQLQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+7777, 190},
+    /* 3109 */ {I_PCLMULLQHQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+7786, 190},
+    /* 3110 */ {I_PCLMULHQHQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+7795, 190},
+    /* 3111 */ {I_PCLMULQDQ, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14184, 190},
+    /* 3112 */ {I_VPCLMULLQLQDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+7804, 191},
+    /* 3113 */ {I_VPCLMULLQLQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+7813, 191},
+    /* 3114 */ {I_VPCLMULHQLQDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+7822, 191},
+    /* 3115 */ {I_VPCLMULHQLQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+7831, 191},
+    /* 3116 */ {I_VPCLMULLQHQDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+7840, 191},
+    /* 3117 */ {I_VPCLMULLQHQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+7849, 191},
+    /* 3118 */ {I_VPCLMULHQHQDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+7858, 191},
+    /* 3119 */ {I_VPCLMULHQHQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+7867, 191},
+    /* 3120 */ {I_VPCLMULQDQ, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+14192, 191},
+    /* 3121 */ {I_VPCLMULQDQ, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14200, 191},
+    /* 3122 */ {I_VPCLMULLQLQDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+7876, 201},
+    /* 3123 */ {I_VPCLMULLQLQDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+7885, 201},
+    /* 3124 */ {I_VPCLMULHQLQDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+7894, 201},
+    /* 3125 */ {I_VPCLMULHQLQDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+7903, 201},
+    /* 3126 */ {I_VPCLMULLQHQDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+7912, 201},
+    /* 3127 */ {I_VPCLMULLQHQDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+7921, 201},
+    /* 3128 */ {I_VPCLMULHQHQDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+7930, 201},
+    /* 3129 */ {I_VPCLMULHQHQDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+7939, 201},
+    /* 3130 */ {I_VPCLMULQDQ, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+14208, 201},
+    /* 3131 */ {I_VPCLMULQDQ, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14216, 201},
+    /* 3132 */ {I_VPCLMULLQLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+0, 202},
+    /* 3133 */ {I_VPCLMULLQLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+10, 202},
+    /* 3134 */ {I_VPCLMULHQLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+20, 202},
+    /* 3135 */ {I_VPCLMULHQLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+30, 202},
+    /* 3136 */ {I_VPCLMULLQHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40, 202},
+    /* 3137 */ {I_VPCLMULLQHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+50, 202},
+    /* 3138 */ {I_VPCLMULHQHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+60, 202},
+    /* 3139 */ {I_VPCLMULHQHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+70, 202},
+    /* 3140 */ {I_VPCLMULQDQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+7948, 202},
+    /* 3141 */ {I_VPCLMULQDQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+7957, 202},
+    /* 3142 */ {I_VPCLMULLQLQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+80, 202},
+    /* 3143 */ {I_VPCLMULLQLQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+90, 202},
+    /* 3144 */ {I_VPCLMULHQLQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+100, 202},
+    /* 3145 */ {I_VPCLMULHQLQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+110, 202},
+    /* 3146 */ {I_VPCLMULLQHQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+120, 202},
+    /* 3147 */ {I_VPCLMULLQHQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+130, 202},
+    /* 3148 */ {I_VPCLMULHQHQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+140, 202},
+    /* 3149 */ {I_VPCLMULHQHQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+150, 202},
+    /* 3150 */ {I_VPCLMULQDQ, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+7966, 202},
+    /* 3151 */ {I_VPCLMULQDQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+7975, 202},
+    /* 3152 */ {I_VPCLMULLQLQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+160, 203},
+    /* 3153 */ {I_VPCLMULLQLQDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+170, 203},
+    /* 3154 */ {I_VPCLMULHQLQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+180, 203},
+    /* 3155 */ {I_VPCLMULHQLQDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+190, 203},
+    /* 3156 */ {I_VPCLMULLQHQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+200, 203},
+    /* 3157 */ {I_VPCLMULLQHQDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+210, 203},
+    /* 3158 */ {I_VPCLMULHQHQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+220, 203},
+    /* 3159 */ {I_VPCLMULHQHQDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+230, 203},
+    /* 3160 */ {I_VPCLMULQDQ, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+7984, 203},
+    /* 3161 */ {I_VPCLMULQDQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+7993, 203},
+    /* 3162 */ {I_VFMADD132PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38381, 204},
+    /* 3163 */ {I_VFMADD132PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38388, 204},
+    /* 3164 */ {I_VFMADD132PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38395, 204},
+    /* 3165 */ {I_VFMADD132PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38402, 204},
+    /* 3166 */ {I_VFMADD312PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38381, 204},
+    /* 3167 */ {I_VFMADD312PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38388, 204},
+    /* 3168 */ {I_VFMADD312PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38395, 204},
+    /* 3169 */ {I_VFMADD312PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38402, 204},
+    /* 3170 */ {I_VFMADD213PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38409, 204},
+    /* 3171 */ {I_VFMADD213PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38416, 204},
+    /* 3172 */ {I_VFMADD213PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38423, 204},
+    /* 3173 */ {I_VFMADD213PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38430, 204},
+    /* 3174 */ {I_VFMADD123PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38409, 204},
+    /* 3175 */ {I_VFMADD123PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38416, 204},
+    /* 3176 */ {I_VFMADD123PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38423, 204},
+    /* 3177 */ {I_VFMADD123PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38430, 204},
+    /* 3178 */ {I_VFMADD231PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38437, 204},
+    /* 3179 */ {I_VFMADD231PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38444, 204},
+    /* 3180 */ {I_VFMADD231PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38451, 204},
+    /* 3181 */ {I_VFMADD231PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38458, 204},
+    /* 3182 */ {I_VFMADD321PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38437, 204},
+    /* 3183 */ {I_VFMADD321PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38444, 204},
+    /* 3184 */ {I_VFMADD321PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38451, 204},
+    /* 3185 */ {I_VFMADD321PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38458, 204},
+    /* 3186 */ {I_VFMADDSUB132PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38465, 204},
+    /* 3187 */ {I_VFMADDSUB132PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38472, 204},
+    /* 3188 */ {I_VFMADDSUB132PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38479, 204},
+    /* 3189 */ {I_VFMADDSUB132PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38486, 204},
+    /* 3190 */ {I_VFMADDSUB312PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38465, 204},
+    /* 3191 */ {I_VFMADDSUB312PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38472, 204},
+    /* 3192 */ {I_VFMADDSUB312PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38479, 204},
+    /* 3193 */ {I_VFMADDSUB312PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38486, 204},
+    /* 3194 */ {I_VFMADDSUB213PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38493, 204},
+    /* 3195 */ {I_VFMADDSUB213PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38500, 204},
+    /* 3196 */ {I_VFMADDSUB213PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38507, 204},
+    /* 3197 */ {I_VFMADDSUB213PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38514, 204},
+    /* 3198 */ {I_VFMADDSUB123PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38493, 204},
+    /* 3199 */ {I_VFMADDSUB123PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38500, 204},
+    /* 3200 */ {I_VFMADDSUB123PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38507, 204},
+    /* 3201 */ {I_VFMADDSUB123PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38514, 204},
+    /* 3202 */ {I_VFMADDSUB231PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38521, 204},
+    /* 3203 */ {I_VFMADDSUB231PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38528, 204},
+    /* 3204 */ {I_VFMADDSUB231PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38535, 204},
+    /* 3205 */ {I_VFMADDSUB231PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38542, 204},
+    /* 3206 */ {I_VFMADDSUB321PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38521, 204},
+    /* 3207 */ {I_VFMADDSUB321PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38528, 204},
+    /* 3208 */ {I_VFMADDSUB321PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38535, 204},
+    /* 3209 */ {I_VFMADDSUB321PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38542, 204},
+    /* 3210 */ {I_VFMSUB132PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38549, 204},
+    /* 3211 */ {I_VFMSUB132PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38556, 204},
+    /* 3212 */ {I_VFMSUB132PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38563, 204},
+    /* 3213 */ {I_VFMSUB132PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38570, 204},
+    /* 3214 */ {I_VFMSUB312PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38549, 204},
+    /* 3215 */ {I_VFMSUB312PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38556, 204},
+    /* 3216 */ {I_VFMSUB312PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38563, 204},
+    /* 3217 */ {I_VFMSUB312PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38570, 204},
+    /* 3218 */ {I_VFMSUB213PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38577, 204},
+    /* 3219 */ {I_VFMSUB213PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38584, 204},
+    /* 3220 */ {I_VFMSUB213PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38591, 204},
+    /* 3221 */ {I_VFMSUB213PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38598, 204},
+    /* 3222 */ {I_VFMSUB123PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38577, 204},
+    /* 3223 */ {I_VFMSUB123PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38584, 204},
+    /* 3224 */ {I_VFMSUB123PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38591, 204},
+    /* 3225 */ {I_VFMSUB123PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38598, 204},
+    /* 3226 */ {I_VFMSUB231PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38605, 204},
+    /* 3227 */ {I_VFMSUB231PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38612, 204},
+    /* 3228 */ {I_VFMSUB231PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38619, 204},
+    /* 3229 */ {I_VFMSUB231PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38626, 204},
+    /* 3230 */ {I_VFMSUB321PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38605, 204},
+    /* 3231 */ {I_VFMSUB321PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38612, 204},
+    /* 3232 */ {I_VFMSUB321PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38619, 204},
+    /* 3233 */ {I_VFMSUB321PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38626, 204},
+    /* 3234 */ {I_VFMSUBADD132PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38633, 204},
+    /* 3235 */ {I_VFMSUBADD132PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38640, 204},
+    /* 3236 */ {I_VFMSUBADD132PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38647, 204},
+    /* 3237 */ {I_VFMSUBADD132PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38654, 204},
+    /* 3238 */ {I_VFMSUBADD312PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38633, 204},
+    /* 3239 */ {I_VFMSUBADD312PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38640, 204},
+    /* 3240 */ {I_VFMSUBADD312PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38647, 204},
+    /* 3241 */ {I_VFMSUBADD312PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38654, 204},
+    /* 3242 */ {I_VFMSUBADD213PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38661, 204},
+    /* 3243 */ {I_VFMSUBADD213PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38668, 204},
+    /* 3244 */ {I_VFMSUBADD213PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38675, 204},
+    /* 3245 */ {I_VFMSUBADD213PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38682, 204},
+    /* 3246 */ {I_VFMSUBADD123PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38661, 204},
+    /* 3247 */ {I_VFMSUBADD123PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38668, 204},
+    /* 3248 */ {I_VFMSUBADD123PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38675, 204},
+    /* 3249 */ {I_VFMSUBADD123PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38682, 204},
+    /* 3250 */ {I_VFMSUBADD231PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38689, 204},
+    /* 3251 */ {I_VFMSUBADD231PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38696, 204},
+    /* 3252 */ {I_VFMSUBADD231PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38703, 204},
+    /* 3253 */ {I_VFMSUBADD231PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38710, 204},
+    /* 3254 */ {I_VFMSUBADD321PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38689, 204},
+    /* 3255 */ {I_VFMSUBADD321PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38696, 204},
+    /* 3256 */ {I_VFMSUBADD321PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38703, 204},
+    /* 3257 */ {I_VFMSUBADD321PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38710, 204},
+    /* 3258 */ {I_VFNMADD132PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38717, 204},
+    /* 3259 */ {I_VFNMADD132PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38724, 204},
+    /* 3260 */ {I_VFNMADD132PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38731, 204},
+    /* 3261 */ {I_VFNMADD132PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38738, 204},
+    /* 3262 */ {I_VFNMADD312PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38717, 204},
+    /* 3263 */ {I_VFNMADD312PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38724, 204},
+    /* 3264 */ {I_VFNMADD312PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38731, 204},
+    /* 3265 */ {I_VFNMADD312PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38738, 204},
+    /* 3266 */ {I_VFNMADD213PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38745, 204},
+    /* 3267 */ {I_VFNMADD213PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38752, 204},
+    /* 3268 */ {I_VFNMADD213PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38759, 204},
+    /* 3269 */ {I_VFNMADD213PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38766, 204},
+    /* 3270 */ {I_VFNMADD123PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38745, 204},
+    /* 3271 */ {I_VFNMADD123PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38752, 204},
+    /* 3272 */ {I_VFNMADD123PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38759, 204},
+    /* 3273 */ {I_VFNMADD123PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38766, 204},
+    /* 3274 */ {I_VFNMADD231PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38773, 204},
+    /* 3275 */ {I_VFNMADD231PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38780, 204},
+    /* 3276 */ {I_VFNMADD231PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38787, 204},
+    /* 3277 */ {I_VFNMADD231PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38794, 204},
+    /* 3278 */ {I_VFNMADD321PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38773, 204},
+    /* 3279 */ {I_VFNMADD321PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38780, 204},
+    /* 3280 */ {I_VFNMADD321PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38787, 204},
+    /* 3281 */ {I_VFNMADD321PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38794, 204},
+    /* 3282 */ {I_VFNMSUB132PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38801, 204},
+    /* 3283 */ {I_VFNMSUB132PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38808, 204},
+    /* 3284 */ {I_VFNMSUB132PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38815, 204},
+    /* 3285 */ {I_VFNMSUB132PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38822, 204},
+    /* 3286 */ {I_VFNMSUB312PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38801, 204},
+    /* 3287 */ {I_VFNMSUB312PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38808, 204},
+    /* 3288 */ {I_VFNMSUB312PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38815, 204},
+    /* 3289 */ {I_VFNMSUB312PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38822, 204},
+    /* 3290 */ {I_VFNMSUB213PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38829, 204},
+    /* 3291 */ {I_VFNMSUB213PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38836, 204},
+    /* 3292 */ {I_VFNMSUB213PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38843, 204},
+    /* 3293 */ {I_VFNMSUB213PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38850, 204},
+    /* 3294 */ {I_VFNMSUB123PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38829, 204},
+    /* 3295 */ {I_VFNMSUB123PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38836, 204},
+    /* 3296 */ {I_VFNMSUB123PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38843, 204},
+    /* 3297 */ {I_VFNMSUB123PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38850, 204},
+    /* 3298 */ {I_VFNMSUB231PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38857, 204},
+    /* 3299 */ {I_VFNMSUB231PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38864, 204},
+    /* 3300 */ {I_VFNMSUB231PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38871, 204},
+    /* 3301 */ {I_VFNMSUB231PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38878, 204},
+    /* 3302 */ {I_VFNMSUB321PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38857, 204},
+    /* 3303 */ {I_VFNMSUB321PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38864, 204},
+    /* 3304 */ {I_VFNMSUB321PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38871, 204},
+    /* 3305 */ {I_VFNMSUB321PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38878, 204},
+    /* 3306 */ {I_VFMADD132SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38885, 204},
+    /* 3307 */ {I_VFMADD132SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38892, 204},
+    /* 3308 */ {I_VFMADD312SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38885, 204},
+    /* 3309 */ {I_VFMADD312SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38892, 204},
+    /* 3310 */ {I_VFMADD213SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38899, 204},
+    /* 3311 */ {I_VFMADD213SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38906, 204},
+    /* 3312 */ {I_VFMADD123SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38899, 204},
+    /* 3313 */ {I_VFMADD123SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38906, 204},
+    /* 3314 */ {I_VFMADD231SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38913, 204},
+    /* 3315 */ {I_VFMADD231SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38920, 204},
+    /* 3316 */ {I_VFMADD321SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38913, 204},
+    /* 3317 */ {I_VFMADD321SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38920, 204},
+    /* 3318 */ {I_VFMSUB132SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38927, 204},
+    /* 3319 */ {I_VFMSUB132SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38934, 204},
+    /* 3320 */ {I_VFMSUB312SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38927, 204},
+    /* 3321 */ {I_VFMSUB312SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38934, 204},
+    /* 3322 */ {I_VFMSUB213SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38941, 204},
+    /* 3323 */ {I_VFMSUB213SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38948, 204},
+    /* 3324 */ {I_VFMSUB123SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38941, 204},
+    /* 3325 */ {I_VFMSUB123SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38948, 204},
+    /* 3326 */ {I_VFMSUB231SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38955, 204},
+    /* 3327 */ {I_VFMSUB231SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38962, 204},
+    /* 3328 */ {I_VFMSUB321SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38955, 204},
+    /* 3329 */ {I_VFMSUB321SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38962, 204},
+    /* 3330 */ {I_VFNMADD132SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38969, 204},
+    /* 3331 */ {I_VFNMADD132SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38976, 204},
+    /* 3332 */ {I_VFNMADD312SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38969, 204},
+    /* 3333 */ {I_VFNMADD312SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38976, 204},
+    /* 3334 */ {I_VFNMADD213SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38983, 204},
+    /* 3335 */ {I_VFNMADD213SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38990, 204},
+    /* 3336 */ {I_VFNMADD123SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38983, 204},
+    /* 3337 */ {I_VFNMADD123SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38990, 204},
+    /* 3338 */ {I_VFNMADD231SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38997, 204},
+    /* 3339 */ {I_VFNMADD231SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+39004, 204},
+    /* 3340 */ {I_VFNMADD321SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38997, 204},
+    /* 3341 */ {I_VFNMADD321SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+39004, 204},
+    /* 3342 */ {I_VFNMSUB132SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+39011, 204},
+    /* 3343 */ {I_VFNMSUB132SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+39018, 204},
+    /* 3344 */ {I_VFNMSUB312SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+39011, 204},
+    /* 3345 */ {I_VFNMSUB312SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+39018, 204},
+    /* 3346 */ {I_VFNMSUB213SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+39025, 204},
+    /* 3347 */ {I_VFNMSUB213SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+39032, 204},
+    /* 3348 */ {I_VFNMSUB123SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+39025, 204},
+    /* 3349 */ {I_VFNMSUB123SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+39032, 204},
+    /* 3350 */ {I_VFNMSUB231SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+39039, 204},
+    /* 3351 */ {I_VFNMSUB231SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+39046, 204},
+    /* 3352 */ {I_VFNMSUB321SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+39039, 204},
+    /* 3353 */ {I_VFNMSUB321SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+39046, 204},
+    /* 3354 */ {I_RDFSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39053, 139},
+    /* 3355 */ {I_RDFSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39060, 139},
+    /* 3356 */ {I_RDGSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39067, 139},
+    /* 3357 */ {I_RDGSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39074, 139},
+    /* 3358 */ {I_RDRAND, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45863, 138},
+    /* 3359 */ {I_RDRAND, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45869, 138},
+    /* 3360 */ {I_RDRAND, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45875, 139},
+    /* 3361 */ {I_WRFSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39081, 139},
+    /* 3362 */ {I_WRFSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39088, 139},
+    /* 3363 */ {I_WRGSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39095, 139},
+    /* 3364 */ {I_WRGSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39102, 139},
+    /* 3365 */ {I_VCVTPH2PS, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39109, 205},
+    /* 3366 */ {I_VCVTPH2PS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+39116, 205},
+    /* 3367 */ {I_VCVTPS2PH, 3, {RM_XMM_L16|BITS128,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14224, 205},
+    /* 3368 */ {I_VCVTPS2PH, 3, {RM_XMM_L16|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14232, 205},
+    /* 3369 */ {I_ADCX, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+14240, 138},
+    /* 3370 */ {I_ADCX, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+14248, 139},
+    /* 3371 */ {I_ADOX, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+14256, 138},
+    /* 3372 */ {I_ADOX, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+14264, 139},
+    /* 3373 */ {I_RDSEED, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45881, 138},
+    /* 3374 */ {I_RDSEED, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45887, 138},
+    /* 3375 */ {I_RDSEED, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45893, 139},
+    /* 3376 */ {I_CLAC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45899, 206},
+    /* 3377 */ {I_STAC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45905, 206},
+    /* 3378 */ {I_XSTORE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49263, 32},
+    /* 3379 */ {I_XCRYPTECB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45911, 32},
+    /* 3380 */ {I_XCRYPTCBC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45917, 32},
+    /* 3381 */ {I_XCRYPTCTR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45923, 32},
+    /* 3382 */ {I_XCRYPTCFB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45929, 32},
+    /* 3383 */ {I_XCRYPTOFB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45935, 32},
+    /* 3384 */ {I_MONTMUL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45941, 32},
+    /* 3385 */ {I_XSHA1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45947, 32},
+    /* 3386 */ {I_XSHA256, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45953, 32},
+    /* 3387 */ {I_LLWPCB, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39123, 207},
+    /* 3388 */ {I_LLWPCB, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39130, 208},
+    /* 3389 */ {I_SLWPCB, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39137, 207},
+    /* 3390 */ {I_SLWPCB, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39144, 208},
+    /* 3391 */ {I_LWPVAL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14272, 207},
+    /* 3392 */ {I_LWPVAL, 3, {REG_GPR|BITS64,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14280, 208},
+    /* 3393 */ {I_LWPINS, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14288, 207},
+    /* 3394 */ {I_LWPINS, 3, {REG_GPR|BITS64,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14296, 208},
+    /* 3395 */ {I_VFMADDPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14304, 209},
+    /* 3396 */ {I_VFMADDPD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14312, 209},
+    /* 3397 */ {I_VFMADDPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14320, 209},
+    /* 3398 */ {I_VFMADDPD, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14328, 209},
+    /* 3399 */ {I_VFMADDPD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14336, 209},
+    /* 3400 */ {I_VFMADDPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14344, 209},
+    /* 3401 */ {I_VFMADDPD, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14352, 209},
+    /* 3402 */ {I_VFMADDPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+14360, 209},
+    /* 3403 */ {I_VFMADDPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14368, 209},
+    /* 3404 */ {I_VFMADDPS, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14376, 209},
+    /* 3405 */ {I_VFMADDPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14384, 209},
+    /* 3406 */ {I_VFMADDPS, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14392, 209},
+    /* 3407 */ {I_VFMADDPS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14400, 209},
+    /* 3408 */ {I_VFMADDPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14408, 209},
+    /* 3409 */ {I_VFMADDPS, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14416, 209},
+    /* 3410 */ {I_VFMADDPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+14424, 209},
+    /* 3411 */ {I_VFMADDSD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14432, 209},
+    /* 3412 */ {I_VFMADDSD, 3, {XMM_L16,RM_XMM_L16|BITS64,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14440, 209},
+    /* 3413 */ {I_VFMADDSD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0}, NO_DECORATOR, nasm_bytecodes+14448, 209},
+    /* 3414 */ {I_VFMADDSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14456, 209},
+    /* 3415 */ {I_VFMADDSS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14464, 209},
+    /* 3416 */ {I_VFMADDSS, 3, {XMM_L16,RM_XMM_L16|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14472, 209},
+    /* 3417 */ {I_VFMADDSS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0}, NO_DECORATOR, nasm_bytecodes+14480, 209},
+    /* 3418 */ {I_VFMADDSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14488, 209},
+    /* 3419 */ {I_VFMADDSUBPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14496, 209},
+    /* 3420 */ {I_VFMADDSUBPD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14504, 209},
+    /* 3421 */ {I_VFMADDSUBPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14512, 209},
+    /* 3422 */ {I_VFMADDSUBPD, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14520, 209},
+    /* 3423 */ {I_VFMADDSUBPD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14528, 209},
+    /* 3424 */ {I_VFMADDSUBPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14536, 209},
+    /* 3425 */ {I_VFMADDSUBPD, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14544, 209},
+    /* 3426 */ {I_VFMADDSUBPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+14552, 209},
+    /* 3427 */ {I_VFMADDSUBPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14560, 209},
+    /* 3428 */ {I_VFMADDSUBPS, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14568, 209},
+    /* 3429 */ {I_VFMADDSUBPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14576, 209},
+    /* 3430 */ {I_VFMADDSUBPS, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14584, 209},
+    /* 3431 */ {I_VFMADDSUBPS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14592, 209},
+    /* 3432 */ {I_VFMADDSUBPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14600, 209},
+    /* 3433 */ {I_VFMADDSUBPS, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14608, 209},
+    /* 3434 */ {I_VFMADDSUBPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+14616, 209},
+    /* 3435 */ {I_VFMSUBADDPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14624, 209},
+    /* 3436 */ {I_VFMSUBADDPD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14632, 209},
+    /* 3437 */ {I_VFMSUBADDPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14640, 209},
+    /* 3438 */ {I_VFMSUBADDPD, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14648, 209},
+    /* 3439 */ {I_VFMSUBADDPD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14656, 209},
+    /* 3440 */ {I_VFMSUBADDPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14664, 209},
+    /* 3441 */ {I_VFMSUBADDPD, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14672, 209},
+    /* 3442 */ {I_VFMSUBADDPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+14680, 209},
+    /* 3443 */ {I_VFMSUBADDPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14688, 209},
+    /* 3444 */ {I_VFMSUBADDPS, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14696, 209},
+    /* 3445 */ {I_VFMSUBADDPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14704, 209},
+    /* 3446 */ {I_VFMSUBADDPS, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14712, 209},
+    /* 3447 */ {I_VFMSUBADDPS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14720, 209},
+    /* 3448 */ {I_VFMSUBADDPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14728, 209},
+    /* 3449 */ {I_VFMSUBADDPS, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14736, 209},
+    /* 3450 */ {I_VFMSUBADDPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+14744, 209},
+    /* 3451 */ {I_VFMSUBPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14752, 209},
+    /* 3452 */ {I_VFMSUBPD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14760, 209},
+    /* 3453 */ {I_VFMSUBPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14768, 209},
+    /* 3454 */ {I_VFMSUBPD, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14776, 209},
+    /* 3455 */ {I_VFMSUBPD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14784, 209},
+    /* 3456 */ {I_VFMSUBPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14792, 209},
+    /* 3457 */ {I_VFMSUBPD, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14800, 209},
+    /* 3458 */ {I_VFMSUBPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+14808, 209},
+    /* 3459 */ {I_VFMSUBPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14816, 209},
+    /* 3460 */ {I_VFMSUBPS, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14824, 209},
+    /* 3461 */ {I_VFMSUBPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14832, 209},
+    /* 3462 */ {I_VFMSUBPS, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14840, 209},
+    /* 3463 */ {I_VFMSUBPS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14848, 209},
+    /* 3464 */ {I_VFMSUBPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14856, 209},
+    /* 3465 */ {I_VFMSUBPS, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14864, 209},
+    /* 3466 */ {I_VFMSUBPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+14872, 209},
+    /* 3467 */ {I_VFMSUBSD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14880, 209},
+    /* 3468 */ {I_VFMSUBSD, 3, {XMM_L16,RM_XMM_L16|BITS64,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14888, 209},
+    /* 3469 */ {I_VFMSUBSD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0}, NO_DECORATOR, nasm_bytecodes+14896, 209},
+    /* 3470 */ {I_VFMSUBSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14904, 209},
+    /* 3471 */ {I_VFMSUBSS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14912, 209},
+    /* 3472 */ {I_VFMSUBSS, 3, {XMM_L16,RM_XMM_L16|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14920, 209},
+    /* 3473 */ {I_VFMSUBSS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0}, NO_DECORATOR, nasm_bytecodes+14928, 209},
+    /* 3474 */ {I_VFMSUBSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14936, 209},
+    /* 3475 */ {I_VFNMADDPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14944, 209},
+    /* 3476 */ {I_VFNMADDPD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14952, 209},
+    /* 3477 */ {I_VFNMADDPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14960, 209},
+    /* 3478 */ {I_VFNMADDPD, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14968, 209},
+    /* 3479 */ {I_VFNMADDPD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14976, 209},
+    /* 3480 */ {I_VFNMADDPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14984, 209},
+    /* 3481 */ {I_VFNMADDPD, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14992, 209},
+    /* 3482 */ {I_VFNMADDPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+15000, 209},
+    /* 3483 */ {I_VFNMADDPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15008, 209},
+    /* 3484 */ {I_VFNMADDPS, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15016, 209},
+    /* 3485 */ {I_VFNMADDPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15024, 209},
+    /* 3486 */ {I_VFNMADDPS, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15032, 209},
+    /* 3487 */ {I_VFNMADDPS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+15040, 209},
+    /* 3488 */ {I_VFNMADDPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+15048, 209},
+    /* 3489 */ {I_VFNMADDPS, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+15056, 209},
+    /* 3490 */ {I_VFNMADDPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+15064, 209},
+    /* 3491 */ {I_VFNMADDSD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15072, 209},
+    /* 3492 */ {I_VFNMADDSD, 3, {XMM_L16,RM_XMM_L16|BITS64,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15080, 209},
+    /* 3493 */ {I_VFNMADDSD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0}, NO_DECORATOR, nasm_bytecodes+15088, 209},
+    /* 3494 */ {I_VFNMADDSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15096, 209},
+    /* 3495 */ {I_VFNMADDSS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15104, 209},
+    /* 3496 */ {I_VFNMADDSS, 3, {XMM_L16,RM_XMM_L16|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15112, 209},
+    /* 3497 */ {I_VFNMADDSS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0}, NO_DECORATOR, nasm_bytecodes+15120, 209},
+    /* 3498 */ {I_VFNMADDSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15128, 209},
+    /* 3499 */ {I_VFNMSUBPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15136, 209},
+    /* 3500 */ {I_VFNMSUBPD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15144, 209},
+    /* 3501 */ {I_VFNMSUBPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15152, 209},
+    /* 3502 */ {I_VFNMSUBPD, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15160, 209},
+    /* 3503 */ {I_VFNMSUBPD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+15168, 209},
+    /* 3504 */ {I_VFNMSUBPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+15176, 209},
+    /* 3505 */ {I_VFNMSUBPD, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+15184, 209},
+    /* 3506 */ {I_VFNMSUBPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+15192, 209},
+    /* 3507 */ {I_VFNMSUBPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15200, 209},
+    /* 3508 */ {I_VFNMSUBPS, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15208, 209},
+    /* 3509 */ {I_VFNMSUBPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15216, 209},
+    /* 3510 */ {I_VFNMSUBPS, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15224, 209},
+    /* 3511 */ {I_VFNMSUBPS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+15232, 209},
+    /* 3512 */ {I_VFNMSUBPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+15240, 209},
+    /* 3513 */ {I_VFNMSUBPS, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+15248, 209},
+    /* 3514 */ {I_VFNMSUBPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+15256, 209},
+    /* 3515 */ {I_VFNMSUBSD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15264, 209},
+    /* 3516 */ {I_VFNMSUBSD, 3, {XMM_L16,RM_XMM_L16|BITS64,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15272, 209},
+    /* 3517 */ {I_VFNMSUBSD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0}, NO_DECORATOR, nasm_bytecodes+15280, 209},
+    /* 3518 */ {I_VFNMSUBSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15288, 209},
+    /* 3519 */ {I_VFNMSUBSS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15296, 209},
+    /* 3520 */ {I_VFNMSUBSS, 3, {XMM_L16,RM_XMM_L16|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15304, 209},
+    /* 3521 */ {I_VFNMSUBSS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0}, NO_DECORATOR, nasm_bytecodes+15312, 209},
+    /* 3522 */ {I_VFNMSUBSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15320, 209},
+    /* 3523 */ {I_VFRCZPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39151, 209},
+    /* 3524 */ {I_VFRCZPD, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39158, 209},
+    /* 3525 */ {I_VFRCZPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39165, 209},
+    /* 3526 */ {I_VFRCZPD, 1, {YMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39172, 209},
+    /* 3527 */ {I_VFRCZPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39179, 209},
+    /* 3528 */ {I_VFRCZPS, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39186, 209},
+    /* 3529 */ {I_VFRCZPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39193, 209},
+    /* 3530 */ {I_VFRCZPS, 1, {YMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39200, 209},
+    /* 3531 */ {I_VFRCZSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+39207, 209},
+    /* 3532 */ {I_VFRCZSD, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39214, 209},
+    /* 3533 */ {I_VFRCZSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+39221, 209},
+    /* 3534 */ {I_VFRCZSS, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39228, 209},
+    /* 3535 */ {I_VPCMOV, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15328, 209},
+    /* 3536 */ {I_VPCMOV, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15336, 209},
+    /* 3537 */ {I_VPCMOV, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15344, 209},
+    /* 3538 */ {I_VPCMOV, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15352, 209},
+    /* 3539 */ {I_VPCMOV, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+15360, 209},
+    /* 3540 */ {I_VPCMOV, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+15368, 209},
+    /* 3541 */ {I_VPCMOV, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+15376, 209},
+    /* 3542 */ {I_VPCMOV, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+15384, 209},
+    /* 3543 */ {I_VPCOMB, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15392, 209},
+    /* 3544 */ {I_VPCOMB, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15400, 209},
+    /* 3545 */ {I_VPCOMD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15408, 209},
+    /* 3546 */ {I_VPCOMD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15416, 209},
+    /* 3547 */ {I_VPCOMQ, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15424, 209},
+    /* 3548 */ {I_VPCOMQ, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15432, 209},
+    /* 3549 */ {I_VPCOMUB, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15440, 209},
+    /* 3550 */ {I_VPCOMUB, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15448, 209},
+    /* 3551 */ {I_VPCOMUD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15456, 209},
+    /* 3552 */ {I_VPCOMUD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15464, 209},
+    /* 3553 */ {I_VPCOMUQ, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15472, 209},
+    /* 3554 */ {I_VPCOMUQ, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15480, 209},
+    /* 3555 */ {I_VPCOMUW, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15488, 209},
+    /* 3556 */ {I_VPCOMUW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15496, 209},
+    /* 3557 */ {I_VPCOMW, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15504, 209},
+    /* 3558 */ {I_VPCOMW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15512, 209},
+    /* 3559 */ {I_VPHADDBD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39235, 209},
+    /* 3560 */ {I_VPHADDBD, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39242, 209},
+    /* 3561 */ {I_VPHADDBQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39249, 209},
+    /* 3562 */ {I_VPHADDBQ, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39256, 209},
+    /* 3563 */ {I_VPHADDBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39263, 209},
+    /* 3564 */ {I_VPHADDBW, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39270, 209},
+    /* 3565 */ {I_VPHADDDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39277, 209},
+    /* 3566 */ {I_VPHADDDQ, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39284, 209},
+    /* 3567 */ {I_VPHADDUBD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39291, 209},
+    /* 3568 */ {I_VPHADDUBD, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39298, 209},
+    /* 3569 */ {I_VPHADDUBQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39305, 209},
+    /* 3570 */ {I_VPHADDUBQ, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39312, 209},
+    /* 3571 */ {I_VPHADDUBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39319, 209},
+    /* 3572 */ {I_VPHADDUBW, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39326, 209},
+    /* 3573 */ {I_VPHADDUDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39333, 209},
+    /* 3574 */ {I_VPHADDUDQ, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39340, 209},
+    /* 3575 */ {I_VPHADDUWD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39347, 209},
+    /* 3576 */ {I_VPHADDUWD, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39354, 209},
+    /* 3577 */ {I_VPHADDUWQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39361, 209},
+    /* 3578 */ {I_VPHADDUWQ, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39368, 209},
+    /* 3579 */ {I_VPHADDWD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39375, 209},
+    /* 3580 */ {I_VPHADDWD, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39382, 209},
+    /* 3581 */ {I_VPHADDWQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39389, 209},
+    /* 3582 */ {I_VPHADDWQ, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39396, 209},
+    /* 3583 */ {I_VPHSUBBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39403, 209},
+    /* 3584 */ {I_VPHSUBBW, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39410, 209},
+    /* 3585 */ {I_VPHSUBDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39417, 209},
+    /* 3586 */ {I_VPHSUBDQ, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39424, 209},
+    /* 3587 */ {I_VPHSUBWD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39431, 209},
+    /* 3588 */ {I_VPHSUBWD, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39438, 209},
+    /* 3589 */ {I_VPMACSDD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15520, 209},
+    /* 3590 */ {I_VPMACSDD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15528, 209},
+    /* 3591 */ {I_VPMACSDQH, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15536, 209},
+    /* 3592 */ {I_VPMACSDQH, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15544, 209},
+    /* 3593 */ {I_VPMACSDQL, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15552, 209},
+    /* 3594 */ {I_VPMACSDQL, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15560, 209},
+    /* 3595 */ {I_VPMACSSDD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15568, 209},
+    /* 3596 */ {I_VPMACSSDD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15576, 209},
+    /* 3597 */ {I_VPMACSSDQH, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15584, 209},
+    /* 3598 */ {I_VPMACSSDQH, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15592, 209},
+    /* 3599 */ {I_VPMACSSDQL, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15600, 209},
+    /* 3600 */ {I_VPMACSSDQL, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15608, 209},
+    /* 3601 */ {I_VPMACSSWD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15616, 209},
+    /* 3602 */ {I_VPMACSSWD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15624, 209},
+    /* 3603 */ {I_VPMACSSWW, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15632, 209},
+    /* 3604 */ {I_VPMACSSWW, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15640, 209},
+    /* 3605 */ {I_VPMACSWD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15648, 209},
+    /* 3606 */ {I_VPMACSWD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15656, 209},
+    /* 3607 */ {I_VPMACSWW, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15664, 209},
+    /* 3608 */ {I_VPMACSWW, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15672, 209},
+    /* 3609 */ {I_VPMADCSSWD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15680, 209},
+    /* 3610 */ {I_VPMADCSSWD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15688, 209},
+    /* 3611 */ {I_VPMADCSWD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15696, 209},
+    /* 3612 */ {I_VPMADCSWD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15704, 209},
+    /* 3613 */ {I_VPPERM, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+15712, 209},
+    /* 3614 */ {I_VPPERM, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+15720, 209},
+    /* 3615 */ {I_VPPERM, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15728, 209},
+    /* 3616 */ {I_VPPERM, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15736, 209},
+    /* 3617 */ {I_VPROTB, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39445, 209},
+    /* 3618 */ {I_VPROTB, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39452, 209},
+    /* 3619 */ {I_VPROTB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39459, 209},
+    /* 3620 */ {I_VPROTB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39466, 209},
+    /* 3621 */ {I_VPROTB, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15744, 209},
+    /* 3622 */ {I_VPROTB, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15752, 209},
+    /* 3623 */ {I_VPROTD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39473, 209},
+    /* 3624 */ {I_VPROTD, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39480, 209},
+    /* 3625 */ {I_VPROTD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39487, 209},
+    /* 3626 */ {I_VPROTD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39494, 209},
+    /* 3627 */ {I_VPROTD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15760, 209},
+    /* 3628 */ {I_VPROTD, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15768, 209},
+    /* 3629 */ {I_VPROTQ, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39501, 209},
+    /* 3630 */ {I_VPROTQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39508, 209},
+    /* 3631 */ {I_VPROTQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39515, 209},
+    /* 3632 */ {I_VPROTQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39522, 209},
+    /* 3633 */ {I_VPROTQ, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15776, 209},
+    /* 3634 */ {I_VPROTQ, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15784, 209},
+    /* 3635 */ {I_VPROTW, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39529, 209},
+    /* 3636 */ {I_VPROTW, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39536, 209},
+    /* 3637 */ {I_VPROTW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39543, 209},
+    /* 3638 */ {I_VPROTW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39550, 209},
+    /* 3639 */ {I_VPROTW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15792, 209},
+    /* 3640 */ {I_VPROTW, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15800, 209},
+    /* 3641 */ {I_VPSHAB, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39557, 209},
+    /* 3642 */ {I_VPSHAB, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39564, 209},
+    /* 3643 */ {I_VPSHAB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39571, 209},
+    /* 3644 */ {I_VPSHAB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39578, 209},
+    /* 3645 */ {I_VPSHAD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39585, 209},
+    /* 3646 */ {I_VPSHAD, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39592, 209},
+    /* 3647 */ {I_VPSHAD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39599, 209},
+    /* 3648 */ {I_VPSHAD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39606, 209},
+    /* 3649 */ {I_VPSHAQ, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39613, 209},
+    /* 3650 */ {I_VPSHAQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39620, 209},
+    /* 3651 */ {I_VPSHAQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39627, 209},
+    /* 3652 */ {I_VPSHAQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39634, 209},
+    /* 3653 */ {I_VPSHAW, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39641, 209},
+    /* 3654 */ {I_VPSHAW, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39648, 209},
+    /* 3655 */ {I_VPSHAW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39655, 209},
+    /* 3656 */ {I_VPSHAW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39662, 209},
+    /* 3657 */ {I_VPSHLB, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39669, 209},
+    /* 3658 */ {I_VPSHLB, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39676, 209},
+    /* 3659 */ {I_VPSHLB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39683, 209},
+    /* 3660 */ {I_VPSHLB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39690, 209},
+    /* 3661 */ {I_VPSHLD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39697, 209},
+    /* 3662 */ {I_VPSHLD, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39704, 209},
+    /* 3663 */ {I_VPSHLD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39711, 209},
+    /* 3664 */ {I_VPSHLD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39718, 209},
+    /* 3665 */ {I_VPSHLQ, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39725, 209},
+    /* 3666 */ {I_VPSHLQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39732, 209},
+    /* 3667 */ {I_VPSHLQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39739, 209},
+    /* 3668 */ {I_VPSHLQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39746, 209},
+    /* 3669 */ {I_VPSHLW, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39753, 209},
+    /* 3670 */ {I_VPSHLW, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39760, 209},
+    /* 3671 */ {I_VPSHLW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39767, 209},
+    /* 3672 */ {I_VPSHLW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39774, 209},
+    /* 3673 */ {I_VMPSADBW, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15808, 210},
+    /* 3674 */ {I_VMPSADBW, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15816, 210},
+    /* 3675 */ {I_VPABSB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39781, 210},
+    /* 3676 */ {I_VPABSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39788, 210},
+    /* 3677 */ {I_VPABSD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39795, 210},
+    /* 3678 */ {I_VPACKSSWB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39802, 210},
+    /* 3679 */ {I_VPACKSSWB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39809, 210},
+    /* 3680 */ {I_VPACKSSDW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39816, 210},
+    /* 3681 */ {I_VPACKSSDW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39823, 210},
+    /* 3682 */ {I_VPACKUSDW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39830, 210},
+    /* 3683 */ {I_VPACKUSDW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39837, 210},
+    /* 3684 */ {I_VPACKUSWB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39844, 210},
+    /* 3685 */ {I_VPACKUSWB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39851, 210},
+    /* 3686 */ {I_VPADDB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39858, 210},
+    /* 3687 */ {I_VPADDB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39865, 210},
+    /* 3688 */ {I_VPADDW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39872, 210},
+    /* 3689 */ {I_VPADDW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39879, 210},
+    /* 3690 */ {I_VPADDD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39886, 210},
+    /* 3691 */ {I_VPADDD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39893, 210},
+    /* 3692 */ {I_VPADDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39900, 210},
+    /* 3693 */ {I_VPADDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39907, 210},
+    /* 3694 */ {I_VPADDSB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39914, 210},
+    /* 3695 */ {I_VPADDSB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39921, 210},
+    /* 3696 */ {I_VPADDSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39928, 210},
+    /* 3697 */ {I_VPADDSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39935, 210},
+    /* 3698 */ {I_VPADDUSB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39942, 210},
+    /* 3699 */ {I_VPADDUSB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39949, 210},
+    /* 3700 */ {I_VPADDUSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39956, 210},
+    /* 3701 */ {I_VPADDUSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39963, 210},
+    /* 3702 */ {I_VPALIGNR, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15824, 210},
+    /* 3703 */ {I_VPALIGNR, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15832, 210},
+    /* 3704 */ {I_VPAND, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39970, 210},
+    /* 3705 */ {I_VPAND, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39977, 210},
+    /* 3706 */ {I_VPANDN, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39984, 210},
+    /* 3707 */ {I_VPANDN, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39991, 210},
+    /* 3708 */ {I_VPAVGB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39998, 210},
+    /* 3709 */ {I_VPAVGB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40005, 210},
+    /* 3710 */ {I_VPAVGW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40012, 210},
+    /* 3711 */ {I_VPAVGW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40019, 210},
+    /* 3712 */ {I_VPBLENDVB, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15840, 210},
+    /* 3713 */ {I_VPBLENDVB, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15848, 210},
+    /* 3714 */ {I_VPBLENDW, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15856, 210},
+    /* 3715 */ {I_VPBLENDW, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15864, 210},
+    /* 3716 */ {I_VPCMPEQB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40026, 210},
+    /* 3717 */ {I_VPCMPEQB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40033, 210},
+    /* 3718 */ {I_VPCMPEQW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40040, 210},
+    /* 3719 */ {I_VPCMPEQW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40047, 210},
+    /* 3720 */ {I_VPCMPEQD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40054, 210},
+    /* 3721 */ {I_VPCMPEQD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40061, 210},
+    /* 3722 */ {I_VPCMPEQQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40068, 210},
+    /* 3723 */ {I_VPCMPEQQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40075, 210},
+    /* 3724 */ {I_VPCMPGTB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40082, 210},
+    /* 3725 */ {I_VPCMPGTB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40089, 210},
+    /* 3726 */ {I_VPCMPGTW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40096, 210},
+    /* 3727 */ {I_VPCMPGTW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40103, 210},
+    /* 3728 */ {I_VPCMPGTD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40110, 210},
+    /* 3729 */ {I_VPCMPGTD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40117, 210},
+    /* 3730 */ {I_VPCMPGTQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40124, 210},
+    /* 3731 */ {I_VPCMPGTQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40131, 210},
+    /* 3732 */ {I_VPHADDW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40138, 210},
+    /* 3733 */ {I_VPHADDW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40145, 210},
+    /* 3734 */ {I_VPHADDD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40152, 210},
+    /* 3735 */ {I_VPHADDD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40159, 210},
+    /* 3736 */ {I_VPHADDSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40166, 210},
+    /* 3737 */ {I_VPHADDSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40173, 210},
+    /* 3738 */ {I_VPHSUBW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40180, 210},
+    /* 3739 */ {I_VPHSUBW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40187, 210},
+    /* 3740 */ {I_VPHSUBD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40194, 210},
+    /* 3741 */ {I_VPHSUBD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40201, 210},
+    /* 3742 */ {I_VPHSUBSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40208, 210},
+    /* 3743 */ {I_VPHSUBSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40215, 210},
+    /* 3744 */ {I_VPMADDUBSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40222, 210},
+    /* 3745 */ {I_VPMADDUBSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40229, 210},
+    /* 3746 */ {I_VPMADDWD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40236, 210},
+    /* 3747 */ {I_VPMADDWD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40243, 210},
+    /* 3748 */ {I_VPMAXSB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40250, 210},
+    /* 3749 */ {I_VPMAXSB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40257, 210},
+    /* 3750 */ {I_VPMAXSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40264, 210},
+    /* 3751 */ {I_VPMAXSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40271, 210},
+    /* 3752 */ {I_VPMAXSD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40278, 210},
+    /* 3753 */ {I_VPMAXSD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40285, 210},
+    /* 3754 */ {I_VPMAXUB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40292, 210},
+    /* 3755 */ {I_VPMAXUB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40299, 210},
+    /* 3756 */ {I_VPMAXUW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40306, 210},
+    /* 3757 */ {I_VPMAXUW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40313, 210},
+    /* 3758 */ {I_VPMAXUD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40320, 210},
+    /* 3759 */ {I_VPMAXUD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40327, 210},
+    /* 3760 */ {I_VPMINSB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40334, 210},
+    /* 3761 */ {I_VPMINSB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40341, 210},
+    /* 3762 */ {I_VPMINSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40348, 210},
+    /* 3763 */ {I_VPMINSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40355, 210},
+    /* 3764 */ {I_VPMINSD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40362, 210},
+    /* 3765 */ {I_VPMINSD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40369, 210},
+    /* 3766 */ {I_VPMINUB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40376, 210},
+    /* 3767 */ {I_VPMINUB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40383, 210},
+    /* 3768 */ {I_VPMINUW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40390, 210},
+    /* 3769 */ {I_VPMINUW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40397, 210},
+    /* 3770 */ {I_VPMINUD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40404, 210},
+    /* 3771 */ {I_VPMINUD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40411, 210},
+    /* 3772 */ {I_VPMOVMSKB, 2, {REG_GPR|BITS32,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+40418, 210},
+    /* 3773 */ {I_VPMOVMSKB, 2, {REG_GPR|BITS64,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+40418, 210},
+    /* 3774 */ {I_VPMOVSXBW, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40425, 210},
+    /* 3775 */ {I_VPMOVSXBD, 2, {YMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+40432, 210},
+    /* 3776 */ {I_VPMOVSXBD, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+40432, 210},
+    /* 3777 */ {I_VPMOVSXBQ, 2, {YMM_L16,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+40439, 210},
+    /* 3778 */ {I_VPMOVSXBQ, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+40439, 210},
+    /* 3779 */ {I_VPMOVSXWD, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40446, 210},
+    /* 3780 */ {I_VPMOVSXWQ, 2, {YMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+40453, 210},
+    /* 3781 */ {I_VPMOVSXWQ, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+40453, 210},
+    /* 3782 */ {I_VPMOVSXDQ, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40460, 210},
+    /* 3783 */ {I_VPMOVZXBW, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40467, 210},
+    /* 3784 */ {I_VPMOVZXBD, 2, {YMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+40474, 210},
+    /* 3785 */ {I_VPMOVZXBD, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+40474, 210},
+    /* 3786 */ {I_VPMOVZXBQ, 2, {YMM_L16,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+40481, 210},
+    /* 3787 */ {I_VPMOVZXBQ, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+40481, 210},
+    /* 3788 */ {I_VPMOVZXWD, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40488, 210},
+    /* 3789 */ {I_VPMOVZXWQ, 2, {YMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+40495, 210},
+    /* 3790 */ {I_VPMOVZXWQ, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+40495, 210},
+    /* 3791 */ {I_VPMOVZXDQ, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40502, 210},
+    /* 3792 */ {I_VPMULDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40509, 210},
+    /* 3793 */ {I_VPMULDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40516, 210},
+    /* 3794 */ {I_VPMULHRSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40523, 210},
+    /* 3795 */ {I_VPMULHRSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40530, 210},
+    /* 3796 */ {I_VPMULHUW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40537, 210},
+    /* 3797 */ {I_VPMULHUW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40544, 210},
+    /* 3798 */ {I_VPMULHW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40551, 210},
+    /* 3799 */ {I_VPMULHW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40558, 210},
+    /* 3800 */ {I_VPMULLW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40565, 210},
+    /* 3801 */ {I_VPMULLW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40572, 210},
+    /* 3802 */ {I_VPMULLD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40579, 210},
+    /* 3803 */ {I_VPMULLD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40586, 210},
+    /* 3804 */ {I_VPMULUDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40593, 210},
+    /* 3805 */ {I_VPMULUDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40600, 210},
+    /* 3806 */ {I_VPOR, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40607, 210},
+    /* 3807 */ {I_VPOR, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40614, 210},
+    /* 3808 */ {I_VPSADBW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40621, 210},
+    /* 3809 */ {I_VPSADBW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40628, 210},
+    /* 3810 */ {I_VPSHUFB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40635, 210},
+    /* 3811 */ {I_VPSHUFB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40642, 210},
+    /* 3812 */ {I_VPSHUFD, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15872, 210},
+    /* 3813 */ {I_VPSHUFHW, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15880, 210},
+    /* 3814 */ {I_VPSHUFLW, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15888, 210},
+    /* 3815 */ {I_VPSIGNB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40649, 210},
+    /* 3816 */ {I_VPSIGNB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40656, 210},
+    /* 3817 */ {I_VPSIGNW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40663, 210},
+    /* 3818 */ {I_VPSIGNW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40670, 210},
+    /* 3819 */ {I_VPSIGND, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40677, 210},
+    /* 3820 */ {I_VPSIGND, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40684, 210},
+    /* 3821 */ {I_VPSLLDQ, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15896, 210},
+    /* 3822 */ {I_VPSLLDQ, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15904, 210},
+    /* 3823 */ {I_VPSLLW, 3, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40691, 210},
+    /* 3824 */ {I_VPSLLW, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40698, 210},
+    /* 3825 */ {I_VPSLLW, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15912, 210},
+    /* 3826 */ {I_VPSLLW, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15920, 210},
+    /* 3827 */ {I_VPSLLD, 3, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40705, 210},
+    /* 3828 */ {I_VPSLLD, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40712, 210},
+    /* 3829 */ {I_VPSLLD, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15928, 210},
+    /* 3830 */ {I_VPSLLD, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15936, 210},
+    /* 3831 */ {I_VPSLLQ, 3, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40719, 210},
+    /* 3832 */ {I_VPSLLQ, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40726, 210},
+    /* 3833 */ {I_VPSLLQ, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15944, 210},
+    /* 3834 */ {I_VPSLLQ, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15952, 210},
+    /* 3835 */ {I_VPSRAW, 3, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40733, 210},
+    /* 3836 */ {I_VPSRAW, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40740, 210},
+    /* 3837 */ {I_VPSRAW, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15960, 210},
+    /* 3838 */ {I_VPSRAW, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15968, 210},
+    /* 3839 */ {I_VPSRAD, 3, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40747, 210},
+    /* 3840 */ {I_VPSRAD, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40754, 210},
+    /* 3841 */ {I_VPSRAD, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15976, 210},
+    /* 3842 */ {I_VPSRAD, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15984, 210},
+    /* 3843 */ {I_VPSRLDQ, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15992, 210},
+    /* 3844 */ {I_VPSRLDQ, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+16000, 210},
+    /* 3845 */ {I_VPSRLW, 3, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40761, 210},
+    /* 3846 */ {I_VPSRLW, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40768, 210},
+    /* 3847 */ {I_VPSRLW, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16008, 210},
+    /* 3848 */ {I_VPSRLW, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+16016, 210},
+    /* 3849 */ {I_VPSRLD, 3, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40775, 210},
+    /* 3850 */ {I_VPSRLD, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40782, 210},
+    /* 3851 */ {I_VPSRLD, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16024, 210},
+    /* 3852 */ {I_VPSRLD, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+16032, 210},
+    /* 3853 */ {I_VPSRLQ, 3, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40789, 210},
+    /* 3854 */ {I_VPSRLQ, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40796, 210},
+    /* 3855 */ {I_VPSRLQ, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16040, 210},
+    /* 3856 */ {I_VPSRLQ, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+16048, 210},
+    /* 3857 */ {I_VPSUBB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40803, 210},
+    /* 3858 */ {I_VPSUBB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40810, 210},
+    /* 3859 */ {I_VPSUBW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40817, 210},
+    /* 3860 */ {I_VPSUBW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40824, 210},
+    /* 3861 */ {I_VPSUBD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40831, 210},
+    /* 3862 */ {I_VPSUBD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40838, 210},
+    /* 3863 */ {I_VPSUBQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40845, 210},
+    /* 3864 */ {I_VPSUBQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40852, 210},
+    /* 3865 */ {I_VPSUBSB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40859, 210},
+    /* 3866 */ {I_VPSUBSB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40866, 210},
+    /* 3867 */ {I_VPSUBSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40873, 210},
+    /* 3868 */ {I_VPSUBSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40880, 210},
+    /* 3869 */ {I_VPSUBUSB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40887, 210},
+    /* 3870 */ {I_VPSUBUSB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40894, 210},
+    /* 3871 */ {I_VPSUBUSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40901, 210},
+    /* 3872 */ {I_VPSUBUSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40908, 210},
+    /* 3873 */ {I_VPUNPCKHBW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40915, 210},
+    /* 3874 */ {I_VPUNPCKHBW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40922, 210},
+    /* 3875 */ {I_VPUNPCKHWD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40929, 210},
+    /* 3876 */ {I_VPUNPCKHWD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40936, 210},
+    /* 3877 */ {I_VPUNPCKHDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40943, 210},
+    /* 3878 */ {I_VPUNPCKHDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40950, 210},
+    /* 3879 */ {I_VPUNPCKHQDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40957, 210},
+    /* 3880 */ {I_VPUNPCKHQDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40964, 210},
+    /* 3881 */ {I_VPUNPCKLBW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40971, 210},
+    /* 3882 */ {I_VPUNPCKLBW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40978, 210},
+    /* 3883 */ {I_VPUNPCKLWD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40985, 210},
+    /* 3884 */ {I_VPUNPCKLWD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40992, 210},
+    /* 3885 */ {I_VPUNPCKLDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40999, 210},
+    /* 3886 */ {I_VPUNPCKLDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41006, 210},
+    /* 3887 */ {I_VPUNPCKLQDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41013, 210},
+    /* 3888 */ {I_VPUNPCKLQDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41020, 210},
+    /* 3889 */ {I_VPXOR, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41027, 210},
+    /* 3890 */ {I_VPXOR, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41034, 210},
+    /* 3891 */ {I_VMOVNTDQA, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41041, 210},
+    /* 3892 */ {I_VBROADCASTSS, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35252, 210},
+    /* 3893 */ {I_VBROADCASTSS, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35259, 210},
+    /* 3894 */ {I_VBROADCASTSD, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35266, 210},
+    /* 3895 */ {I_VBROADCASTI128, 2, {YMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41048, 210},
+    /* 3896 */ {I_VPBLENDD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+16056, 210},
+    /* 3897 */ {I_VPBLENDD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16064, 210},
+    /* 3898 */ {I_VPBLENDD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+16072, 210},
+    /* 3899 */ {I_VPBLENDD, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16080, 210},
+    /* 3900 */ {I_VPBROADCASTB, 2, {XMM_L16,MEMORY|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+41055, 210},
+    /* 3901 */ {I_VPBROADCASTB, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41055, 210},
+    /* 3902 */ {I_VPBROADCASTB, 2, {YMM_L16,MEMORY|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+41062, 210},
+    /* 3903 */ {I_VPBROADCASTB, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41062, 210},
+    /* 3904 */ {I_VPBROADCASTW, 2, {XMM_L16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41069, 210},
+    /* 3905 */ {I_VPBROADCASTW, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41069, 210},
+    /* 3906 */ {I_VPBROADCASTW, 2, {YMM_L16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41076, 210},
+    /* 3907 */ {I_VPBROADCASTW, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41076, 210},
+    /* 3908 */ {I_VPBROADCASTD, 2, {XMM_L16,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41083, 210},
+    /* 3909 */ {I_VPBROADCASTD, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41083, 210},
+    /* 3910 */ {I_VPBROADCASTD, 2, {YMM_L16,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41090, 210},
+    /* 3911 */ {I_VPBROADCASTD, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41090, 210},
+    /* 3912 */ {I_VPBROADCASTQ, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41097, 210},
+    /* 3913 */ {I_VPBROADCASTQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41097, 210},
+    /* 3914 */ {I_VPBROADCASTQ, 2, {YMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41104, 210},
+    /* 3915 */ {I_VPBROADCASTQ, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41104, 210},
+    /* 3916 */ {I_VPERMD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41111, 210},
+    /* 3917 */ {I_VPERMD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41118, 210},
+    /* 3918 */ {I_VPERMPD, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16088, 210},
+    /* 3919 */ {I_VPERMPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41125, 210},
+    /* 3920 */ {I_VPERMPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41132, 210},
+    /* 3921 */ {I_VPERMQ, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16096, 210},
+    /* 3922 */ {I_VPERM2I128, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+16104, 210},
+    /* 3923 */ {I_VPERM2I128, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16112, 210},
+    /* 3924 */ {I_VEXTRACTI128, 3, {RM_XMM_L16|BITS128,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16120, 210},
+    /* 3925 */ {I_VINSERTI128, 4, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+16128, 210},
+    /* 3926 */ {I_VINSERTI128, 3, {YMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16136, 210},
+    /* 3927 */ {I_VPMASKMOVD, 3, {XMM_L16,XMM_L16,MEMORY|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41139, 210},
+    /* 3928 */ {I_VPMASKMOVD, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41146, 210},
+    /* 3929 */ {I_VPMASKMOVD, 3, {YMM_L16,YMM_L16,MEMORY|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41153, 210},
+    /* 3930 */ {I_VPMASKMOVD, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41160, 210},
+    /* 3931 */ {I_VPMASKMOVQ, 3, {XMM_L16,XMM_L16,MEMORY|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41167, 210},
+    /* 3932 */ {I_VPMASKMOVQ, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41174, 210},
+    /* 3933 */ {I_VPMASKMOVQ, 3, {YMM_L16,YMM_L16,MEMORY|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41181, 210},
+    /* 3934 */ {I_VPMASKMOVQ, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41188, 210},
+    /* 3935 */ {I_VPMASKMOVD, 3, {MEMORY|BITS128,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+41195, 210},
+    /* 3936 */ {I_VPMASKMOVD, 2, {MEMORY|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41202, 210},
+    /* 3937 */ {I_VPMASKMOVD, 3, {MEMORY|BITS256,YMM_L16,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+41209, 210},
+    /* 3938 */ {I_VPMASKMOVD, 2, {MEMORY|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41216, 210},
+    /* 3939 */ {I_VPMASKMOVQ, 3, {MEMORY|BITS128,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+41223, 210},
+    /* 3940 */ {I_VPMASKMOVQ, 2, {MEMORY|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41230, 210},
+    /* 3941 */ {I_VPMASKMOVQ, 3, {MEMORY|BITS256,YMM_L16,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+41237, 210},
+    /* 3942 */ {I_VPMASKMOVQ, 2, {MEMORY|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41244, 210},
+    /* 3943 */ {I_VPSLLVD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41251, 210},
+    /* 3944 */ {I_VPSLLVD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41258, 210},
+    /* 3945 */ {I_VPSLLVQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41265, 210},
+    /* 3946 */ {I_VPSLLVQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41272, 210},
+    /* 3947 */ {I_VPSLLVD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41279, 210},
+    /* 3948 */ {I_VPSLLVD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41286, 210},
+    /* 3949 */ {I_VPSLLVQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41293, 210},
+    /* 3950 */ {I_VPSLLVQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41300, 210},
+    /* 3951 */ {I_VPSRAVD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41307, 210},
+    /* 3952 */ {I_VPSRAVD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41314, 210},
+    /* 3953 */ {I_VPSRAVD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41321, 210},
+    /* 3954 */ {I_VPSRAVD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41328, 210},
+    /* 3955 */ {I_VPSRLVD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41335, 210},
+    /* 3956 */ {I_VPSRLVD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41342, 210},
+    /* 3957 */ {I_VPSRLVQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41349, 210},
+    /* 3958 */ {I_VPSRLVQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41356, 210},
+    /* 3959 */ {I_VPSRLVD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41363, 210},
+    /* 3960 */ {I_VPSRLVD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41370, 210},
+    /* 3961 */ {I_VPSRLVQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41377, 210},
+    /* 3962 */ {I_VPSRLVQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41384, 210},
+    /* 3963 */ {I_VGATHERDPD, 3, {XMM_L16,XMEM|BITS64,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16144, 210},
+    /* 3964 */ {I_VGATHERQPD, 3, {XMM_L16,XMEM|BITS64,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16152, 210},
+    /* 3965 */ {I_VGATHERDPD, 3, {YMM_L16,XMEM|BITS64,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16160, 210},
+    /* 3966 */ {I_VGATHERQPD, 3, {YMM_L16,YMEM|BITS64,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16168, 210},
+    /* 3967 */ {I_VGATHERDPS, 3, {XMM_L16,XMEM|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16176, 210},
+    /* 3968 */ {I_VGATHERQPS, 3, {XMM_L16,XMEM|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16184, 210},
+    /* 3969 */ {I_VGATHERDPS, 3, {YMM_L16,YMEM|BITS32,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16192, 210},
+    /* 3970 */ {I_VGATHERQPS, 3, {XMM_L16,YMEM|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16200, 210},
+    /* 3971 */ {I_VPGATHERDD, 3, {XMM_L16,XMEM|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16208, 210},
+    /* 3972 */ {I_VPGATHERQD, 3, {XMM_L16,XMEM|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16216, 210},
+    /* 3973 */ {I_VPGATHERDD, 3, {YMM_L16,YMEM|BITS32,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16224, 210},
+    /* 3974 */ {I_VPGATHERQD, 3, {XMM_L16,YMEM|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16232, 210},
+    /* 3975 */ {I_VPGATHERDQ, 3, {XMM_L16,XMEM|BITS64,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16240, 210},
+    /* 3976 */ {I_VPGATHERQQ, 3, {XMM_L16,XMEM|BITS64,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16248, 210},
+    /* 3977 */ {I_VPGATHERDQ, 3, {YMM_L16,XMEM|BITS64,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16256, 210},
+    /* 3978 */ {I_VPGATHERQQ, 3, {YMM_L16,YMEM|BITS64,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16264, 210},
+    /* 3979 */ {I_XABORT, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49268, 211},
+    /* 3980 */ {I_XABORT, 1, {IMMEDIATE|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49268, 211},
+    /* 3981 */ {I_XBEGIN, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45959, 211},
+    /* 3982 */ {I_XBEGIN, 1, {IMMEDIATE|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45965, 212},
+    /* 3983 */ {I_XBEGIN, 1, {IMMEDIATE|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45971, 212},
+    /* 3984 */ {I_XBEGIN, 1, {IMMEDIATE|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45977, 213},
+    /* 3985 */ {I_XEND, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49273, 211},
+    /* 3986 */ {I_XTEST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49278, 214},
+    /* 3987 */ {I_ANDN, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41391, 215},
+    /* 3988 */ {I_ANDN, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41398, 216},
+    /* 3989 */ {I_BEXTR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41405, 215},
+    /* 3990 */ {I_BEXTR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41412, 216},
+    /* 3991 */ {I_BEXTR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+16272, 217},
+    /* 3992 */ {I_BEXTR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+16280, 218},
+    /* 3993 */ {I_BLCI, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41419, 217},
+    /* 3994 */ {I_BLCI, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41426, 218},
+    /* 3995 */ {I_BLCIC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41433, 217},
+    /* 3996 */ {I_BLCIC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41440, 218},
+    /* 3997 */ {I_BLSI, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41447, 215},
+    /* 3998 */ {I_BLSI, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41454, 216},
+    /* 3999 */ {I_BLSIC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41461, 217},
+    /* 4000 */ {I_BLSIC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41468, 218},
+    /* 4001 */ {I_BLCFILL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41475, 217},
+    /* 4002 */ {I_BLCFILL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41482, 218},
+    /* 4003 */ {I_BLSFILL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41489, 217},
+    /* 4004 */ {I_BLSFILL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41496, 218},
+    /* 4005 */ {I_BLCMSK, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41503, 217},
+    /* 4006 */ {I_BLCMSK, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41510, 218},
+    /* 4007 */ {I_BLSMSK, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41517, 215},
+    /* 4008 */ {I_BLSMSK, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41524, 216},
+    /* 4009 */ {I_BLSR, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41531, 215},
+    /* 4010 */ {I_BLSR, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41538, 216},
+    /* 4011 */ {I_BLCS, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41545, 217},
+    /* 4012 */ {I_BLCS, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41552, 218},
+    /* 4013 */ {I_BZHI, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41559, 219},
+    /* 4014 */ {I_BZHI, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41566, 220},
+    /* 4015 */ {I_MULX, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41573, 219},
+    /* 4016 */ {I_MULX, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41580, 220},
+    /* 4017 */ {I_PDEP, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41587, 219},
+    /* 4018 */ {I_PDEP, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41594, 220},
+    /* 4019 */ {I_PEXT, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41601, 219},
+    /* 4020 */ {I_PEXT, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41608, 220},
+    /* 4021 */ {I_RORX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16288, 219},
+    /* 4022 */ {I_RORX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16296, 220},
+    /* 4023 */ {I_SARX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41615, 219},
+    /* 4024 */ {I_SARX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41622, 220},
+    /* 4025 */ {I_SHLX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41629, 219},
+    /* 4026 */ {I_SHLX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41636, 220},
+    /* 4027 */ {I_SHRX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41643, 219},
+    /* 4028 */ {I_SHRX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41650, 220},
+    /* 4029 */ {I_TZCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41657, 221},
+    /* 4030 */ {I_TZCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41664, 221},
+    /* 4031 */ {I_TZCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41671, 222},
+    /* 4032 */ {I_TZMSK, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41678, 217},
+    /* 4033 */ {I_TZMSK, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41685, 218},
+    /* 4034 */ {I_T1MSKC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41692, 217},
+    /* 4035 */ {I_T1MSKC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41699, 218},
+    /* 4036 */ {I_PREFETCHWT1, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49283, 223},
+    /* 4037 */ {I_BNDMK, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45983, 224},
+    /* 4038 */ {I_BNDCL, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+41707, 225},
+    /* 4039 */ {I_BNDCL, 2, {BNDREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41707, 226},
+    /* 4040 */ {I_BNDCL, 2, {BNDREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41706, 227},
+    /* 4041 */ {I_BNDCU, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+41714, 225},
+    /* 4042 */ {I_BNDCU, 2, {BNDREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41714, 226},
+    /* 4043 */ {I_BNDCU, 2, {BNDREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41713, 227},
+    /* 4044 */ {I_BNDCN, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+41721, 225},
+    /* 4045 */ {I_BNDCN, 2, {BNDREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41721, 226},
+    /* 4046 */ {I_BNDCN, 2, {BNDREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41720, 227},
+    /* 4047 */ {I_BNDMOV, 2, {BNDREG,BNDREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+45989, 225},
+    /* 4048 */ {I_BNDMOV, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45989, 225},
+    /* 4049 */ {I_BNDMOV, 2, {BNDREG,BNDREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+45995, 225},
+    /* 4050 */ {I_BNDMOV, 2, {MEMORY,BNDREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+45995, 225},
+    /* 4051 */ {I_BNDLDX, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45990, 224},
+    /* 4052 */ {I_BNDLDX, 3, {BNDREG,MEMORY,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+46001, 228},
+    /* 4053 */ {I_BNDLDX, 3, {BNDREG,MEMORY,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+46001, 229},
+    /* 4054 */ {I_BNDSTX, 2, {MEMORY,BNDREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+45996, 224},
+    /* 4055 */ {I_BNDSTX, 3, {MEMORY,REG_GPR|BITS32,BNDREG,0,0}, NO_DECORATOR, nasm_bytecodes+46007, 228},
+    /* 4056 */ {I_BNDSTX, 3, {MEMORY,REG_GPR|BITS64,BNDREG,0,0}, NO_DECORATOR, nasm_bytecodes+46007, 229},
+    /* 4057 */ {I_BNDSTX, 3, {MEMORY,BNDREG,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+46013, 228},
+    /* 4058 */ {I_BNDSTX, 3, {MEMORY,BNDREG,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+46013, 229},
+    /* 4059 */ {I_SHA1MSG1, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+46019, 230},
+    /* 4060 */ {I_SHA1MSG2, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+46025, 230},
+    /* 4061 */ {I_SHA1NEXTE, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+46031, 230},
+    /* 4062 */ {I_SHA1RNDS4, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+41727, 230},
+    /* 4063 */ {I_SHA256MSG1, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+46037, 230},
+    /* 4064 */ {I_SHA256MSG2, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+46043, 230},
+    /* 4065 */ {I_SHA256RNDS2, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM0,0,0}, NO_DECORATOR, nasm_bytecodes+46049, 230},
+    /* 4066 */ {I_SHA256RNDS2, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+46049, 230},
+    /* 4067 */ {I_VSHA512MSG1, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41734, 231},
+    /* 4068 */ {I_VSHA512MSG2, 2, {YMM_L16,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41741, 231},
+    /* 4069 */ {I_VSHA512RNDS2, 3, {YMM_L16,YMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+41748, 231},
+    /* 4070 */ {I_VSM3MSG1, 3, {XMM_L16,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+41755, 232},
+    /* 4071 */ {I_VSM3MSG2, 3, {XMM_L16,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+41762, 232},
+    /* 4072 */ {I_VSM3RNDS2, 4, {XMM_L16,XMM_L16,XMM_L16,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+16304, 232},
+    /* 4073 */ {I_VSM4KEY4, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41769, 233},
+    /* 4074 */ {I_VSM4KEY4, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41776, 233},
+    /* 4075 */ {I_VSM4RNDS4, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41783, 233},
+    /* 4076 */ {I_VSM4RNDS4, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41790, 233},
+    /* 4077 */ {I_VBCSTNEBF16PS, 2, {XMM_L16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41797, 234},
+    /* 4078 */ {I_VBCSTNEBF16PS, 2, {YMM_L16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41804, 234},
+    /* 4079 */ {I_VBCSTNESH2PS, 2, {XMM_L16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41811, 234},
+    /* 4080 */ {I_VBCSTNESH2PS, 2, {YMM_L16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41818, 234},
+    /* 4081 */ {I_VCVTNEEBF162PS, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41825, 235},
+    /* 4082 */ {I_VCVTNEEBF162PS, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41832, 236},
+    /* 4083 */ {I_VCVTNEEPH2PS, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41839, 235},
+    /* 4084 */ {I_VCVTNEEPH2PS, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41846, 236},
+    /* 4085 */ {I_VCVTNEOBF162PS, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41853, 235},
+    /* 4086 */ {I_VCVTNEOBF162PS, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41860, 236},
+    /* 4087 */ {I_VCVTNEOPH2PS, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41867, 235},
+    /* 4088 */ {I_VCVTNEOPH2PS, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41874, 236},
+    /* 4089 */ {I_VCVTNEPS2BF16, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41881, 235},
+    /* 4090 */ {I_VCVTNEPS2BF16, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41888, 236},
+    /* 4091 */ {I_VPDPBSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41895, 237},
+    /* 4092 */ {I_VPDPBSSD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41902, 238},
+    /* 4093 */ {I_VPDPBSSDS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41909, 237},
+    /* 4094 */ {I_VPDPBSSDS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41916, 238},
+    /* 4095 */ {I_VPDPBSUD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41923, 237},
+    /* 4096 */ {I_VPDPBSUD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41930, 238},
+    /* 4097 */ {I_VPDPBSUDS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41937, 237},
+    /* 4098 */ {I_VPDPBSUDS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41944, 238},
+    /* 4099 */ {I_VPDPBUUD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41951, 237},
+    /* 4100 */ {I_VPDPBUUD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41958, 238},
+    /* 4101 */ {I_VPDPBUUDS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41965, 237},
+    /* 4102 */ {I_VPDPBUUDS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41972, 238},
+    /* 4103 */ {I_VPMADD52HUQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41979, 239},
+    /* 4104 */ {I_VPMADD52HUQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41986, 240},
+    /* 4105 */ {I_VPMADD52LUQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41993, 239},
+    /* 4106 */ {I_VPMADD52LUQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+42000, 240},
+    /* 4107 */ {I_KADDB, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42007, 241},
+    /* 4108 */ {I_KADDD, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42014, 241},
+    /* 4109 */ {I_KADDQ, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42021, 241},
+    /* 4110 */ {I_KADDW, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42028, 241},
+    /* 4111 */ {I_KANDB, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42035, 241},
+    /* 4112 */ {I_KANDD, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42042, 241},
+    /* 4113 */ {I_KANDNB, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42049, 241},
+    /* 4114 */ {I_KANDND, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42056, 241},
+    /* 4115 */ {I_KANDNQ, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42063, 241},
+    /* 4116 */ {I_KANDNW, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42070, 241},
+    /* 4117 */ {I_KANDQ, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42077, 241},
+    /* 4118 */ {I_KANDW, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42084, 241},
+    /* 4119 */ {I_KMOVB, 2, {KREG,RM_K|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42091, 241},
+    /* 4120 */ {I_KMOVB, 2, {MEMORY|BITS8,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42098, 241},
+    /* 4121 */ {I_KMOVB, 2, {KREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42105, 241},
+    /* 4122 */ {I_KMOVB, 2, {REG_GPR|BITS32,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42112, 241},
+    /* 4123 */ {I_KMOVD, 2, {KREG,RM_K|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42119, 241},
+    /* 4124 */ {I_KMOVD, 2, {MEMORY|BITS32,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42126, 241},
+    /* 4125 */ {I_KMOVD, 2, {KREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42133, 241},
+    /* 4126 */ {I_KMOVD, 2, {REG_GPR|BITS32,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42140, 241},
+    /* 4127 */ {I_KMOVQ, 2, {KREG,RM_K|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42147, 241},
+    /* 4128 */ {I_KMOVQ, 2, {MEMORY|BITS64,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42154, 241},
+    /* 4129 */ {I_KMOVQ, 2, {KREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42161, 241},
+    /* 4130 */ {I_KMOVQ, 2, {REG_GPR|BITS64,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42168, 241},
+    /* 4131 */ {I_KMOVW, 2, {KREG,RM_K|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42175, 241},
+    /* 4132 */ {I_KMOVW, 2, {MEMORY|BITS16,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42182, 241},
+    /* 4133 */ {I_KMOVW, 2, {KREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42189, 241},
+    /* 4134 */ {I_KMOVW, 2, {REG_GPR|BITS32,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42196, 241},
+    /* 4135 */ {I_KNOTB, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42203, 241},
+    /* 4136 */ {I_KNOTD, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42210, 241},
+    /* 4137 */ {I_KNOTQ, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42217, 241},
+    /* 4138 */ {I_KNOTW, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42224, 241},
+    /* 4139 */ {I_KORB, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42231, 241},
+    /* 4140 */ {I_KORD, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42238, 241},
+    /* 4141 */ {I_KORQ, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42245, 241},
+    /* 4142 */ {I_KORW, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42252, 241},
+    /* 4143 */ {I_KORTESTB, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42259, 241},
+    /* 4144 */ {I_KORTESTD, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42266, 241},
+    /* 4145 */ {I_KORTESTQ, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42273, 241},
+    /* 4146 */ {I_KORTESTW, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42280, 241},
+    /* 4147 */ {I_KSHIFTLB, 3, {KREG,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16320, 241},
+    /* 4148 */ {I_KSHIFTLD, 3, {KREG,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16328, 241},
+    /* 4149 */ {I_KSHIFTLQ, 3, {KREG,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16336, 241},
+    /* 4150 */ {I_KSHIFTLW, 3, {KREG,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16344, 241},
+    /* 4151 */ {I_KSHIFTRB, 3, {KREG,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16352, 241},
+    /* 4152 */ {I_KSHIFTRD, 3, {KREG,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16360, 241},
+    /* 4153 */ {I_KSHIFTRQ, 3, {KREG,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16368, 241},
+    /* 4154 */ {I_KSHIFTRW, 3, {KREG,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16376, 241},
+    /* 4155 */ {I_KTESTB, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42287, 241},
+    /* 4156 */ {I_KTESTD, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42294, 241},
+    /* 4157 */ {I_KTESTQ, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42301, 241},
+    /* 4158 */ {I_KTESTW, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42308, 241},
+    /* 4159 */ {I_KUNPCKBW, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42315, 241},
+    /* 4160 */ {I_KUNPCKDQ, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42322, 241},
+    /* 4161 */ {I_KUNPCKWD, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42329, 241},
+    /* 4162 */ {I_KXNORB, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42336, 241},
+    /* 4163 */ {I_KXNORD, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42343, 241},
+    /* 4164 */ {I_KXNORQ, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42350, 241},
+    /* 4165 */ {I_KXNORW, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42357, 241},
+    /* 4166 */ {I_KXORB, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42364, 241},
+    /* 4167 */ {I_KXORD, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42371, 241},
+    /* 4168 */ {I_KXORQ, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42378, 241},
+    /* 4169 */ {I_KXORW, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42385, 241},
+    /* 4170 */ {I_VADDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16384, 246},
+    /* 4171 */ {I_VADDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+16392, 246},
+    /* 4172 */ {I_VADDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16400, 246},
+    /* 4173 */ {I_VADDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+16408, 246},
+    /* 4174 */ {I_VADDPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+16416, 247},
+    /* 4175 */ {I_VADDPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+16424, 247},
+    /* 4176 */ {I_VADDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16432, 246},
+    /* 4177 */ {I_VADDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+16440, 246},
+    /* 4178 */ {I_VADDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16448, 246},
+    /* 4179 */ {I_VADDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+16456, 246},
+    /* 4180 */ {I_VADDPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+16464, 247},
+    /* 4181 */ {I_VADDPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+16472, 247},
+    /* 4182 */ {I_VADDSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+16480, 247},
+    /* 4183 */ {I_VADDSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+16488, 247},
+    /* 4184 */ {I_VADDSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+16496, 247},
+    /* 4185 */ {I_VADDSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+16504, 247},
+    /* 4186 */ {I_VALIGND, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+8002, 246},
+    /* 4187 */ {I_VALIGND, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+8011, 246},
+    /* 4188 */ {I_VALIGND, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+8020, 246},
+    /* 4189 */ {I_VALIGND, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+8029, 246},
+    /* 4190 */ {I_VALIGND, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+8038, 247},
+    /* 4191 */ {I_VALIGND, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+8047, 247},
+    /* 4192 */ {I_VALIGNQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+8056, 246},
+    /* 4193 */ {I_VALIGNQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+8065, 246},
+    /* 4194 */ {I_VALIGNQ, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+8074, 246},
+    /* 4195 */ {I_VALIGNQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+8083, 246},
+    /* 4196 */ {I_VALIGNQ, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+8092, 247},
+    /* 4197 */ {I_VALIGNQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+8101, 247},
+    /* 4198 */ {I_VANDNPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16512, 248},
+    /* 4199 */ {I_VANDNPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+16520, 248},
+    /* 4200 */ {I_VANDNPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16528, 248},
+    /* 4201 */ {I_VANDNPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+16536, 248},
+    /* 4202 */ {I_VANDNPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16544, 249},
+    /* 4203 */ {I_VANDNPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+16552, 249},
+    /* 4204 */ {I_VANDNPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16560, 248},
+    /* 4205 */ {I_VANDNPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+16568, 248},
+    /* 4206 */ {I_VANDNPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16576, 248},
+    /* 4207 */ {I_VANDNPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+16584, 248},
+    /* 4208 */ {I_VANDNPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16592, 249},
+    /* 4209 */ {I_VANDNPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+16600, 249},
+    /* 4210 */ {I_VANDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16608, 248},
+    /* 4211 */ {I_VANDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+16616, 248},
+    /* 4212 */ {I_VANDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16624, 248},
+    /* 4213 */ {I_VANDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+16632, 248},
+    /* 4214 */ {I_VANDPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16640, 249},
+    /* 4215 */ {I_VANDPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+16648, 249},
+    /* 4216 */ {I_VANDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16656, 248},
+    /* 4217 */ {I_VANDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+16664, 248},
+    /* 4218 */ {I_VANDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16672, 248},
+    /* 4219 */ {I_VANDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+16680, 248},
+    /* 4220 */ {I_VANDPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16688, 249},
+    /* 4221 */ {I_VANDPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+16696, 249},
+    /* 4222 */ {I_VBLENDMPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16704, 246},
+    /* 4223 */ {I_VBLENDMPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16712, 246},
+    /* 4224 */ {I_VBLENDMPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16720, 247},
+    /* 4225 */ {I_VBLENDMPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16728, 246},
+    /* 4226 */ {I_VBLENDMPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16736, 246},
+    /* 4227 */ {I_VBLENDMPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16744, 247},
+    /* 4228 */ {I_VBROADCASTF32X2, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16752, 248},
+    /* 4229 */ {I_VBROADCASTF32X2, 2, {ZMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16760, 249},
+    /* 4230 */ {I_VBROADCASTF32X4, 2, {YMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16768, 246},
+    /* 4231 */ {I_VBROADCASTF32X4, 2, {ZMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16776, 247},
+    /* 4232 */ {I_VBROADCASTF32X8, 2, {ZMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16784, 249},
+    /* 4233 */ {I_VBROADCASTF64X2, 2, {YMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16792, 248},
+    /* 4234 */ {I_VBROADCASTF64X2, 2, {ZMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16800, 249},
+    /* 4235 */ {I_VBROADCASTF64X4, 2, {ZMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16808, 247},
+    /* 4236 */ {I_VBROADCASTI32X2, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16816, 248},
+    /* 4237 */ {I_VBROADCASTI32X2, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16824, 248},
+    /* 4238 */ {I_VBROADCASTI32X2, 2, {ZMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16832, 249},
+    /* 4239 */ {I_VBROADCASTI32X4, 2, {YMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16840, 246},
+    /* 4240 */ {I_VBROADCASTI32X4, 2, {ZMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16848, 247},
+    /* 4241 */ {I_VBROADCASTI32X8, 2, {ZMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16856, 249},
+    /* 4242 */ {I_VBROADCASTI64X2, 2, {YMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16864, 248},
+    /* 4243 */ {I_VBROADCASTI64X2, 2, {ZMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16872, 249},
+    /* 4244 */ {I_VBROADCASTI64X4, 2, {ZMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16880, 247},
+    /* 4245 */ {I_VBROADCASTSD, 2, {YMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16888, 246},
+    /* 4246 */ {I_VBROADCASTSD, 2, {ZMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16896, 247},
+    /* 4247 */ {I_VBROADCASTSD, 2, {YMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16904, 246},
+    /* 4248 */ {I_VBROADCASTSD, 2, {ZMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16912, 247},
+    /* 4249 */ {I_VBROADCASTSS, 2, {XMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16920, 246},
+    /* 4250 */ {I_VBROADCASTSS, 2, {YMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16928, 246},
+    /* 4251 */ {I_VBROADCASTSS, 2, {ZMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16936, 247},
+    /* 4252 */ {I_VBROADCASTSS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16944, 246},
+    /* 4253 */ {I_VBROADCASTSS, 2, {YMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16952, 246},
+    /* 4254 */ {I_VBROADCASTSS, 2, {ZMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16960, 247},
+    /* 4255 */ {I_VCMPEQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+240, 246},
+    /* 4256 */ {I_VCMPEQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+250, 246},
+    /* 4257 */ {I_VCMPEQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+260, 247},
+    /* 4258 */ {I_VCMPEQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+270, 246},
+    /* 4259 */ {I_VCMPEQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+280, 246},
+    /* 4260 */ {I_VCMPEQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+290, 247},
+    /* 4261 */ {I_VCMPEQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+300, 247},
+    /* 4262 */ {I_VCMPEQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+310, 247},
+    /* 4263 */ {I_VCMPEQ_OQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+240, 246},
+    /* 4264 */ {I_VCMPEQ_OQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+250, 246},
+    /* 4265 */ {I_VCMPEQ_OQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+260, 247},
+    /* 4266 */ {I_VCMPEQ_OQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+270, 246},
+    /* 4267 */ {I_VCMPEQ_OQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+280, 246},
+    /* 4268 */ {I_VCMPEQ_OQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+290, 247},
+    /* 4269 */ {I_VCMPEQ_OQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+300, 247},
+    /* 4270 */ {I_VCMPEQ_OQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+310, 247},
+    /* 4271 */ {I_VCMPLTPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+320, 246},
+    /* 4272 */ {I_VCMPLTPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+330, 246},
+    /* 4273 */ {I_VCMPLTPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+340, 247},
+    /* 4274 */ {I_VCMPLTPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+350, 246},
+    /* 4275 */ {I_VCMPLTPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+360, 246},
+    /* 4276 */ {I_VCMPLTPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+370, 247},
+    /* 4277 */ {I_VCMPLTSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+380, 247},
+    /* 4278 */ {I_VCMPLTSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+390, 247},
+    /* 4279 */ {I_VCMPLT_OSPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+320, 246},
+    /* 4280 */ {I_VCMPLT_OSPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+330, 246},
+    /* 4281 */ {I_VCMPLT_OSPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+340, 247},
+    /* 4282 */ {I_VCMPLT_OSPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+350, 246},
+    /* 4283 */ {I_VCMPLT_OSPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+360, 246},
+    /* 4284 */ {I_VCMPLT_OSPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+370, 247},
+    /* 4285 */ {I_VCMPLT_OSSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+380, 247},
+    /* 4286 */ {I_VCMPLT_OSSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+390, 247},
+    /* 4287 */ {I_VCMPLEPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+400, 246},
+    /* 4288 */ {I_VCMPLEPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+410, 246},
+    /* 4289 */ {I_VCMPLEPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+420, 247},
+    /* 4290 */ {I_VCMPLEPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+430, 246},
+    /* 4291 */ {I_VCMPLEPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+440, 246},
+    /* 4292 */ {I_VCMPLEPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+450, 247},
+    /* 4293 */ {I_VCMPLESD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+460, 247},
+    /* 4294 */ {I_VCMPLESS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+470, 247},
+    /* 4295 */ {I_VCMPLE_OSPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+400, 246},
+    /* 4296 */ {I_VCMPLE_OSPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+410, 246},
+    /* 4297 */ {I_VCMPLE_OSPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+420, 247},
+    /* 4298 */ {I_VCMPLE_OSPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+430, 246},
+    /* 4299 */ {I_VCMPLE_OSPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+440, 246},
+    /* 4300 */ {I_VCMPLE_OSPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+450, 247},
+    /* 4301 */ {I_VCMPLE_OSSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+460, 247},
+    /* 4302 */ {I_VCMPLE_OSSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+470, 247},
+    /* 4303 */ {I_VCMPUNORDPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+480, 246},
+    /* 4304 */ {I_VCMPUNORDPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+490, 246},
+    /* 4305 */ {I_VCMPUNORDPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+500, 247},
+    /* 4306 */ {I_VCMPUNORDPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+510, 246},
+    /* 4307 */ {I_VCMPUNORDPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+520, 246},
+    /* 4308 */ {I_VCMPUNORDPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+530, 247},
+    /* 4309 */ {I_VCMPUNORDSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+540, 247},
+    /* 4310 */ {I_VCMPUNORDSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+550, 247},
+    /* 4311 */ {I_VCMPUNORD_QPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+480, 246},
+    /* 4312 */ {I_VCMPUNORD_QPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+490, 246},
+    /* 4313 */ {I_VCMPUNORD_QPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+500, 247},
+    /* 4314 */ {I_VCMPUNORD_QPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+510, 246},
+    /* 4315 */ {I_VCMPUNORD_QPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+520, 246},
+    /* 4316 */ {I_VCMPUNORD_QPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+530, 247},
+    /* 4317 */ {I_VCMPUNORD_QSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+540, 247},
+    /* 4318 */ {I_VCMPUNORD_QSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+550, 247},
+    /* 4319 */ {I_VCMPNEQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+560, 246},
+    /* 4320 */ {I_VCMPNEQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+570, 246},
+    /* 4321 */ {I_VCMPNEQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+580, 247},
+    /* 4322 */ {I_VCMPNEQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+590, 246},
+    /* 4323 */ {I_VCMPNEQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+600, 246},
+    /* 4324 */ {I_VCMPNEQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+610, 247},
+    /* 4325 */ {I_VCMPNEQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+620, 247},
+    /* 4326 */ {I_VCMPNEQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+630, 247},
+    /* 4327 */ {I_VCMPNEQ_UQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+560, 246},
+    /* 4328 */ {I_VCMPNEQ_UQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+570, 246},
+    /* 4329 */ {I_VCMPNEQ_UQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+580, 247},
+    /* 4330 */ {I_VCMPNEQ_UQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+590, 246},
+    /* 4331 */ {I_VCMPNEQ_UQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+600, 246},
+    /* 4332 */ {I_VCMPNEQ_UQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+610, 247},
+    /* 4333 */ {I_VCMPNEQ_UQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+620, 247},
+    /* 4334 */ {I_VCMPNEQ_UQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+630, 247},
+    /* 4335 */ {I_VCMPNLTPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+640, 246},
+    /* 4336 */ {I_VCMPNLTPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+650, 246},
+    /* 4337 */ {I_VCMPNLTPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+660, 247},
+    /* 4338 */ {I_VCMPNLTPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+670, 246},
+    /* 4339 */ {I_VCMPNLTPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+680, 246},
+    /* 4340 */ {I_VCMPNLTPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+690, 247},
+    /* 4341 */ {I_VCMPNLTSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+700, 247},
+    /* 4342 */ {I_VCMPNLTSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+710, 247},
+    /* 4343 */ {I_VCMPNLT_USPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+640, 246},
+    /* 4344 */ {I_VCMPNLT_USPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+650, 246},
+    /* 4345 */ {I_VCMPNLT_USPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+660, 247},
+    /* 4346 */ {I_VCMPNLT_USPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+670, 246},
+    /* 4347 */ {I_VCMPNLT_USPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+680, 246},
+    /* 4348 */ {I_VCMPNLT_USPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+690, 247},
+    /* 4349 */ {I_VCMPNLT_USSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+700, 247},
+    /* 4350 */ {I_VCMPNLT_USSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+710, 247},
+    /* 4351 */ {I_VCMPNLEPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+720, 246},
+    /* 4352 */ {I_VCMPNLEPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+730, 246},
+    /* 4353 */ {I_VCMPNLEPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+740, 247},
+    /* 4354 */ {I_VCMPNLEPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+750, 246},
+    /* 4355 */ {I_VCMPNLEPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+760, 246},
+    /* 4356 */ {I_VCMPNLEPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+770, 247},
+    /* 4357 */ {I_VCMPNLESD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+780, 247},
+    /* 4358 */ {I_VCMPNLESS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+790, 247},
+    /* 4359 */ {I_VCMPNLE_USPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+720, 246},
+    /* 4360 */ {I_VCMPNLE_USPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+730, 246},
+    /* 4361 */ {I_VCMPNLE_USPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+740, 247},
+    /* 4362 */ {I_VCMPNLE_USPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+750, 246},
+    /* 4363 */ {I_VCMPNLE_USPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+760, 246},
+    /* 4364 */ {I_VCMPNLE_USPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+770, 247},
+    /* 4365 */ {I_VCMPNLE_USSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+780, 247},
+    /* 4366 */ {I_VCMPNLE_USSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+790, 247},
+    /* 4367 */ {I_VCMPORDPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+800, 246},
+    /* 4368 */ {I_VCMPORDPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+810, 246},
+    /* 4369 */ {I_VCMPORDPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+820, 247},
+    /* 4370 */ {I_VCMPORDPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+830, 246},
+    /* 4371 */ {I_VCMPORDPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+840, 246},
+    /* 4372 */ {I_VCMPORDPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+850, 247},
+    /* 4373 */ {I_VCMPORDSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+860, 247},
+    /* 4374 */ {I_VCMPORDSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+870, 247},
+    /* 4375 */ {I_VCMPORD_QPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+800, 246},
+    /* 4376 */ {I_VCMPORD_QPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+810, 246},
+    /* 4377 */ {I_VCMPORD_QPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+820, 247},
+    /* 4378 */ {I_VCMPORD_QPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+830, 246},
+    /* 4379 */ {I_VCMPORD_QPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+840, 246},
+    /* 4380 */ {I_VCMPORD_QPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+850, 247},
+    /* 4381 */ {I_VCMPORD_QSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+860, 247},
+    /* 4382 */ {I_VCMPORD_QSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+870, 247},
+    /* 4383 */ {I_VCMPEQ_UQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+880, 246},
+    /* 4384 */ {I_VCMPEQ_UQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+890, 246},
+    /* 4385 */ {I_VCMPEQ_UQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+900, 247},
+    /* 4386 */ {I_VCMPEQ_UQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+910, 246},
+    /* 4387 */ {I_VCMPEQ_UQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+920, 246},
+    /* 4388 */ {I_VCMPEQ_UQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+930, 247},
+    /* 4389 */ {I_VCMPEQ_UQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+940, 247},
+    /* 4390 */ {I_VCMPEQ_UQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+950, 247},
+    /* 4391 */ {I_VCMPNGEPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+960, 246},
+    /* 4392 */ {I_VCMPNGEPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+970, 246},
+    /* 4393 */ {I_VCMPNGEPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+980, 247},
+    /* 4394 */ {I_VCMPNGEPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+990, 246},
+    /* 4395 */ {I_VCMPNGEPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1000, 246},
+    /* 4396 */ {I_VCMPNGEPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1010, 247},
+    /* 4397 */ {I_VCMPNGESD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1020, 247},
+    /* 4398 */ {I_VCMPNGESS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1030, 247},
+    /* 4399 */ {I_VCMPNGE_USPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+960, 246},
+    /* 4400 */ {I_VCMPNGE_USPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+970, 246},
+    /* 4401 */ {I_VCMPNGE_USPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+980, 247},
+    /* 4402 */ {I_VCMPNGE_USPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+990, 246},
+    /* 4403 */ {I_VCMPNGE_USPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1000, 246},
+    /* 4404 */ {I_VCMPNGE_USPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1010, 247},
+    /* 4405 */ {I_VCMPNGE_USSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1020, 247},
+    /* 4406 */ {I_VCMPNGE_USSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1030, 247},
+    /* 4407 */ {I_VCMPNGTPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1040, 246},
+    /* 4408 */ {I_VCMPNGTPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1050, 246},
+    /* 4409 */ {I_VCMPNGTPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1060, 247},
+    /* 4410 */ {I_VCMPNGTPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1070, 246},
+    /* 4411 */ {I_VCMPNGTPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1080, 246},
+    /* 4412 */ {I_VCMPNGTPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1090, 247},
+    /* 4413 */ {I_VCMPNGTSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1100, 247},
+    /* 4414 */ {I_VCMPNGTSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1110, 247},
+    /* 4415 */ {I_VCMPNGT_USPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1040, 246},
+    /* 4416 */ {I_VCMPNGT_USPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1050, 246},
+    /* 4417 */ {I_VCMPNGT_USPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1060, 247},
+    /* 4418 */ {I_VCMPNGT_USPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1070, 246},
+    /* 4419 */ {I_VCMPNGT_USPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1080, 246},
+    /* 4420 */ {I_VCMPNGT_USPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1090, 247},
+    /* 4421 */ {I_VCMPNGT_USSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1100, 247},
+    /* 4422 */ {I_VCMPNGT_USSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1110, 247},
+    /* 4423 */ {I_VCMPFALSEPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1120, 246},
+    /* 4424 */ {I_VCMPFALSEPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1130, 246},
+    /* 4425 */ {I_VCMPFALSEPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1140, 247},
+    /* 4426 */ {I_VCMPFALSEPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1150, 246},
+    /* 4427 */ {I_VCMPFALSEPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1160, 246},
+    /* 4428 */ {I_VCMPFALSEPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1170, 247},
+    /* 4429 */ {I_VCMPFALSESD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1180, 247},
+    /* 4430 */ {I_VCMPFALSESS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1190, 247},
+    /* 4431 */ {I_VCMPFALSE_OQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1120, 246},
+    /* 4432 */ {I_VCMPFALSE_OQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1130, 246},
+    /* 4433 */ {I_VCMPFALSE_OQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1140, 247},
+    /* 4434 */ {I_VCMPFALSE_OQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1150, 246},
+    /* 4435 */ {I_VCMPFALSE_OQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1160, 246},
+    /* 4436 */ {I_VCMPFALSE_OQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1170, 247},
+    /* 4437 */ {I_VCMPFALSE_OQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1180, 247},
+    /* 4438 */ {I_VCMPFALSE_OQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1190, 247},
+    /* 4439 */ {I_VCMPNEQ_OQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1200, 246},
+    /* 4440 */ {I_VCMPNEQ_OQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1210, 246},
+    /* 4441 */ {I_VCMPNEQ_OQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1220, 247},
+    /* 4442 */ {I_VCMPNEQ_OQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1230, 246},
+    /* 4443 */ {I_VCMPNEQ_OQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1240, 246},
+    /* 4444 */ {I_VCMPNEQ_OQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1250, 247},
+    /* 4445 */ {I_VCMPNEQ_OQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1260, 247},
+    /* 4446 */ {I_VCMPNEQ_OQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1270, 247},
+    /* 4447 */ {I_VCMPGEPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1280, 246},
+    /* 4448 */ {I_VCMPGEPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1290, 246},
+    /* 4449 */ {I_VCMPGEPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1300, 247},
+    /* 4450 */ {I_VCMPGEPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1310, 246},
+    /* 4451 */ {I_VCMPGEPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1320, 246},
+    /* 4452 */ {I_VCMPGEPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1330, 247},
+    /* 4453 */ {I_VCMPGESD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1340, 247},
+    /* 4454 */ {I_VCMPGESS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1350, 247},
+    /* 4455 */ {I_VCMPGE_OSPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1280, 246},
+    /* 4456 */ {I_VCMPGE_OSPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1290, 246},
+    /* 4457 */ {I_VCMPGE_OSPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1300, 247},
+    /* 4458 */ {I_VCMPGE_OSPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1310, 246},
+    /* 4459 */ {I_VCMPGE_OSPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1320, 246},
+    /* 4460 */ {I_VCMPGE_OSPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1330, 247},
+    /* 4461 */ {I_VCMPGE_OSSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1340, 247},
+    /* 4462 */ {I_VCMPGE_OSSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1350, 247},
+    /* 4463 */ {I_VCMPGTPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1360, 246},
+    /* 4464 */ {I_VCMPGTPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1370, 246},
+    /* 4465 */ {I_VCMPGTPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1380, 247},
+    /* 4466 */ {I_VCMPGTPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1390, 246},
+    /* 4467 */ {I_VCMPGTPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1400, 246},
+    /* 4468 */ {I_VCMPGTPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1410, 247},
+    /* 4469 */ {I_VCMPGTSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1420, 247},
+    /* 4470 */ {I_VCMPGTSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1430, 247},
+    /* 4471 */ {I_VCMPGT_OSPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1360, 246},
+    /* 4472 */ {I_VCMPGT_OSPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1370, 246},
+    /* 4473 */ {I_VCMPGT_OSPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1380, 247},
+    /* 4474 */ {I_VCMPGT_OSPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1390, 246},
+    /* 4475 */ {I_VCMPGT_OSPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1400, 246},
+    /* 4476 */ {I_VCMPGT_OSPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1410, 247},
+    /* 4477 */ {I_VCMPGT_OSSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1420, 247},
+    /* 4478 */ {I_VCMPGT_OSSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1430, 247},
+    /* 4479 */ {I_VCMPTRUEPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1440, 246},
+    /* 4480 */ {I_VCMPTRUEPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1450, 246},
+    /* 4481 */ {I_VCMPTRUEPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1460, 247},
+    /* 4482 */ {I_VCMPTRUEPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1470, 246},
+    /* 4483 */ {I_VCMPTRUEPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1480, 246},
+    /* 4484 */ {I_VCMPTRUEPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1490, 247},
+    /* 4485 */ {I_VCMPTRUESD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1500, 247},
+    /* 4486 */ {I_VCMPTRUESS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1510, 247},
+    /* 4487 */ {I_VCMPTRUE_UQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1440, 246},
+    /* 4488 */ {I_VCMPTRUE_UQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1450, 246},
+    /* 4489 */ {I_VCMPTRUE_UQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1460, 247},
+    /* 4490 */ {I_VCMPTRUE_UQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1470, 246},
+    /* 4491 */ {I_VCMPTRUE_UQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1480, 246},
+    /* 4492 */ {I_VCMPTRUE_UQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1490, 247},
+    /* 4493 */ {I_VCMPTRUE_UQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1500, 247},
+    /* 4494 */ {I_VCMPTRUE_UQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1510, 247},
+    /* 4495 */ {I_VCMPEQ_OSPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1520, 246},
+    /* 4496 */ {I_VCMPEQ_OSPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1530, 246},
+    /* 4497 */ {I_VCMPEQ_OSPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1540, 247},
+    /* 4498 */ {I_VCMPEQ_OSPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1550, 246},
+    /* 4499 */ {I_VCMPEQ_OSPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1560, 246},
+    /* 4500 */ {I_VCMPEQ_OSPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1570, 247},
+    /* 4501 */ {I_VCMPEQ_OSSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1580, 247},
+    /* 4502 */ {I_VCMPEQ_OSSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1590, 247},
+    /* 4503 */ {I_VCMPLT_OQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1600, 246},
+    /* 4504 */ {I_VCMPLT_OQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1610, 246},
+    /* 4505 */ {I_VCMPLT_OQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1620, 247},
+    /* 4506 */ {I_VCMPLT_OQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1630, 246},
+    /* 4507 */ {I_VCMPLT_OQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1640, 246},
+    /* 4508 */ {I_VCMPLT_OQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1650, 247},
+    /* 4509 */ {I_VCMPLT_OQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1660, 247},
+    /* 4510 */ {I_VCMPLT_OQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1670, 247},
+    /* 4511 */ {I_VCMPLE_OQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1680, 246},
+    /* 4512 */ {I_VCMPLE_OQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1690, 246},
+    /* 4513 */ {I_VCMPLE_OQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1700, 247},
+    /* 4514 */ {I_VCMPLE_OQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1710, 246},
+    /* 4515 */ {I_VCMPLE_OQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1720, 246},
+    /* 4516 */ {I_VCMPLE_OQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1730, 247},
+    /* 4517 */ {I_VCMPLE_OQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1740, 247},
+    /* 4518 */ {I_VCMPLE_OQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1750, 247},
+    /* 4519 */ {I_VCMPUNORD_SPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1760, 246},
+    /* 4520 */ {I_VCMPUNORD_SPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1770, 246},
+    /* 4521 */ {I_VCMPUNORD_SPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1780, 247},
+    /* 4522 */ {I_VCMPUNORD_SPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1790, 246},
+    /* 4523 */ {I_VCMPUNORD_SPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1800, 246},
+    /* 4524 */ {I_VCMPUNORD_SPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1810, 247},
+    /* 4525 */ {I_VCMPUNORD_SSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1820, 247},
+    /* 4526 */ {I_VCMPUNORD_SSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1830, 247},
+    /* 4527 */ {I_VCMPNEQ_USPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1840, 246},
+    /* 4528 */ {I_VCMPNEQ_USPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1850, 246},
+    /* 4529 */ {I_VCMPNEQ_USPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1860, 247},
+    /* 4530 */ {I_VCMPNEQ_USPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1870, 246},
+    /* 4531 */ {I_VCMPNEQ_USPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1880, 246},
+    /* 4532 */ {I_VCMPNEQ_USPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1890, 247},
+    /* 4533 */ {I_VCMPNEQ_USSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1900, 247},
+    /* 4534 */ {I_VCMPNEQ_USSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1910, 247},
+    /* 4535 */ {I_VCMPNLT_UQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1920, 246},
+    /* 4536 */ {I_VCMPNLT_UQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1930, 246},
+    /* 4537 */ {I_VCMPNLT_UQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1940, 247},
+    /* 4538 */ {I_VCMPNLT_UQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1950, 246},
+    /* 4539 */ {I_VCMPNLT_UQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1960, 246},
+    /* 4540 */ {I_VCMPNLT_UQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1970, 247},
+    /* 4541 */ {I_VCMPNLT_UQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1980, 247},
+    /* 4542 */ {I_VCMPNLT_UQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1990, 247},
+    /* 4543 */ {I_VCMPNLE_UQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2000, 246},
+    /* 4544 */ {I_VCMPNLE_UQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2010, 246},
+    /* 4545 */ {I_VCMPNLE_UQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2020, 247},
+    /* 4546 */ {I_VCMPNLE_UQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2030, 246},
+    /* 4547 */ {I_VCMPNLE_UQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2040, 246},
+    /* 4548 */ {I_VCMPNLE_UQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2050, 247},
+    /* 4549 */ {I_VCMPNLE_UQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2060, 247},
+    /* 4550 */ {I_VCMPNLE_UQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2070, 247},
+    /* 4551 */ {I_VCMPORD_SPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2080, 246},
+    /* 4552 */ {I_VCMPORD_SPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2090, 246},
+    /* 4553 */ {I_VCMPORD_SPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2100, 247},
+    /* 4554 */ {I_VCMPORD_SPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2110, 246},
+    /* 4555 */ {I_VCMPORD_SPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2120, 246},
+    /* 4556 */ {I_VCMPORD_SPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2130, 247},
+    /* 4557 */ {I_VCMPORD_SSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2140, 247},
+    /* 4558 */ {I_VCMPORD_SSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2150, 247},
+    /* 4559 */ {I_VCMPEQ_USPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2160, 246},
+    /* 4560 */ {I_VCMPEQ_USPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2170, 246},
+    /* 4561 */ {I_VCMPEQ_USPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2180, 247},
+    /* 4562 */ {I_VCMPEQ_USPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2190, 246},
+    /* 4563 */ {I_VCMPEQ_USPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2200, 246},
+    /* 4564 */ {I_VCMPEQ_USPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2210, 247},
+    /* 4565 */ {I_VCMPEQ_USSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2220, 247},
+    /* 4566 */ {I_VCMPEQ_USSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2230, 247},
+    /* 4567 */ {I_VCMPNGE_UQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2240, 246},
+    /* 4568 */ {I_VCMPNGE_UQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2250, 246},
+    /* 4569 */ {I_VCMPNGE_UQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2260, 247},
+    /* 4570 */ {I_VCMPNGE_UQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2270, 246},
+    /* 4571 */ {I_VCMPNGE_UQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2280, 246},
+    /* 4572 */ {I_VCMPNGE_UQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2290, 247},
+    /* 4573 */ {I_VCMPNGE_UQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2300, 247},
+    /* 4574 */ {I_VCMPNGE_UQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2310, 247},
+    /* 4575 */ {I_VCMPNGT_UQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2320, 246},
+    /* 4576 */ {I_VCMPNGT_UQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2330, 246},
+    /* 4577 */ {I_VCMPNGT_UQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2340, 247},
+    /* 4578 */ {I_VCMPNGT_UQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2350, 246},
+    /* 4579 */ {I_VCMPNGT_UQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2360, 246},
+    /* 4580 */ {I_VCMPNGT_UQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2370, 247},
+    /* 4581 */ {I_VCMPNGT_UQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2380, 247},
+    /* 4582 */ {I_VCMPNGT_UQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2390, 247},
+    /* 4583 */ {I_VCMPFALSE_OSPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2400, 246},
+    /* 4584 */ {I_VCMPFALSE_OSPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2410, 246},
+    /* 4585 */ {I_VCMPFALSE_OSPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2420, 247},
+    /* 4586 */ {I_VCMPFALSE_OSPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2430, 246},
+    /* 4587 */ {I_VCMPFALSE_OSPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2440, 246},
+    /* 4588 */ {I_VCMPFALSE_OSPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2450, 247},
+    /* 4589 */ {I_VCMPFALSE_OSSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2460, 247},
+    /* 4590 */ {I_VCMPFALSE_OSSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2470, 247},
+    /* 4591 */ {I_VCMPNEQ_OSPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2480, 246},
+    /* 4592 */ {I_VCMPNEQ_OSPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2490, 246},
+    /* 4593 */ {I_VCMPNEQ_OSPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2500, 247},
+    /* 4594 */ {I_VCMPNEQ_OSPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2510, 246},
+    /* 4595 */ {I_VCMPNEQ_OSPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2520, 246},
+    /* 4596 */ {I_VCMPNEQ_OSPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2530, 247},
+    /* 4597 */ {I_VCMPNEQ_OSSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2540, 247},
+    /* 4598 */ {I_VCMPNEQ_OSSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2550, 247},
+    /* 4599 */ {I_VCMPGE_OQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2560, 246},
+    /* 4600 */ {I_VCMPGE_OQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2570, 246},
+    /* 4601 */ {I_VCMPGE_OQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2580, 247},
+    /* 4602 */ {I_VCMPGE_OQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2590, 246},
+    /* 4603 */ {I_VCMPGE_OQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2600, 246},
+    /* 4604 */ {I_VCMPGE_OQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2610, 247},
+    /* 4605 */ {I_VCMPGE_OQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2620, 247},
+    /* 4606 */ {I_VCMPGE_OQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2630, 247},
+    /* 4607 */ {I_VCMPGT_OQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2640, 246},
+    /* 4608 */ {I_VCMPGT_OQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2650, 246},
+    /* 4609 */ {I_VCMPGT_OQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2660, 247},
+    /* 4610 */ {I_VCMPGT_OQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2670, 246},
+    /* 4611 */ {I_VCMPGT_OQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2680, 246},
+    /* 4612 */ {I_VCMPGT_OQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2690, 247},
+    /* 4613 */ {I_VCMPGT_OQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2700, 247},
+    /* 4614 */ {I_VCMPGT_OQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2710, 247},
+    /* 4615 */ {I_VCMPTRUE_USPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2720, 246},
+    /* 4616 */ {I_VCMPTRUE_USPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2730, 246},
+    /* 4617 */ {I_VCMPTRUE_USPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2740, 247},
+    /* 4618 */ {I_VCMPTRUE_USPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2750, 246},
+    /* 4619 */ {I_VCMPTRUE_USPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2760, 246},
+    /* 4620 */ {I_VCMPTRUE_USPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2770, 247},
+    /* 4621 */ {I_VCMPTRUE_USSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2780, 247},
+    /* 4622 */ {I_VCMPTRUE_USSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2790, 247},
+    /* 4623 */ {I_VCMPPD, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8110, 246},
+    /* 4624 */ {I_VCMPPD, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8119, 246},
+    /* 4625 */ {I_VCMPPD, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+8128, 247},
+    /* 4626 */ {I_VCMPPS, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8137, 246},
+    /* 4627 */ {I_VCMPPS, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8146, 246},
+    /* 4628 */ {I_VCMPPS, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+8155, 247},
+    /* 4629 */ {I_VCMPSD, 4, {KREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+8164, 247},
+    /* 4630 */ {I_VCMPSS, 4, {KREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+8173, 247},
+    /* 4631 */ {I_VCOMISD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+16968, 247},
+    /* 4632 */ {I_VCOMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+16976, 247},
+    /* 4633 */ {I_VCOMPRESSPD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+16984, 246},
+    /* 4634 */ {I_VCOMPRESSPD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+16992, 246},
+    /* 4635 */ {I_VCOMPRESSPD, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+17000, 247},
+    /* 4636 */ {I_VCOMPRESSPD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17008, 246},
+    /* 4637 */ {I_VCOMPRESSPD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17016, 246},
+    /* 4638 */ {I_VCOMPRESSPD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17024, 247},
+    /* 4639 */ {I_VCOMPRESSPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+17032, 246},
+    /* 4640 */ {I_VCOMPRESSPS, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+17040, 246},
+    /* 4641 */ {I_VCOMPRESSPS, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+17048, 247},
+    /* 4642 */ {I_VCOMPRESSPS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17056, 246},
+    /* 4643 */ {I_VCOMPRESSPS, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17064, 246},
+    /* 4644 */ {I_VCOMPRESSPS, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17072, 247},
+    /* 4645 */ {I_VCVTDQ2PD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17080, 246},
+    /* 4646 */ {I_VCVTDQ2PD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17088, 246},
+    /* 4647 */ {I_VCVTDQ2PD, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+17096, 247},
+    /* 4648 */ {I_VCVTDQ2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17104, 246},
+    /* 4649 */ {I_VCVTDQ2PS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17112, 246},
+    /* 4650 */ {I_VCVTDQ2PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+17120, 247},
+    /* 4651 */ {I_VCVTPD2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17128, 246},
+    /* 4652 */ {I_VCVTPD2DQ, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17136, 246},
+    /* 4653 */ {I_VCVTPD2DQ, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17144, 247},
+    /* 4654 */ {I_VCVTPD2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17152, 246},
+    /* 4655 */ {I_VCVTPD2PS, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17160, 246},
+    /* 4656 */ {I_VCVTPD2PS, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17168, 247},
+    /* 4657 */ {I_VCVTPD2QQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17176, 248},
+    /* 4658 */ {I_VCVTPD2QQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17184, 248},
+    /* 4659 */ {I_VCVTPD2QQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17192, 249},
+    /* 4660 */ {I_VCVTPD2UDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17200, 246},
+    /* 4661 */ {I_VCVTPD2UDQ, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17208, 246},
+    /* 4662 */ {I_VCVTPD2UDQ, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17216, 247},
+    /* 4663 */ {I_VCVTPD2UQQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17224, 248},
+    /* 4664 */ {I_VCVTPD2UQQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17232, 248},
+    /* 4665 */ {I_VCVTPD2UQQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17240, 249},
+    /* 4666 */ {I_VCVTPH2PS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17248, 246},
+    /* 4667 */ {I_VCVTPH2PS, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17256, 246},
+    /* 4668 */ {I_VCVTPH2PS, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+17264, 247},
+    /* 4669 */ {I_VCVTPS2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17272, 246},
+    /* 4670 */ {I_VCVTPS2DQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17280, 246},
+    /* 4671 */ {I_VCVTPS2DQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+17288, 247},
+    /* 4672 */ {I_VCVTPS2PD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17296, 246},
+    /* 4673 */ {I_VCVTPS2PD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17304, 246},
+    /* 4674 */ {I_VCVTPS2PD, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+17312, 247},
+    /* 4675 */ {I_VCVTPS2PH, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8182, 246},
+    /* 4676 */ {I_VCVTPS2PH, 3, {XMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8191, 246},
+    /* 4677 */ {I_VCVTPS2PH, 3, {YMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+8200, 247},
+    /* 4678 */ {I_VCVTPS2PH, 3, {MEMORY|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8182, 246},
+    /* 4679 */ {I_VCVTPS2PH, 3, {MEMORY|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8191, 246},
+    /* 4680 */ {I_VCVTPS2PH, 3, {MEMORY|BITS256,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,SAE,0,0,0}, nasm_bytecodes+8200, 247},
+    /* 4681 */ {I_VCVTPS2QQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17320, 248},
+    /* 4682 */ {I_VCVTPS2QQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17328, 248},
+    /* 4683 */ {I_VCVTPS2QQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+17336, 249},
+    /* 4684 */ {I_VCVTPS2UDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17344, 246},
+    /* 4685 */ {I_VCVTPS2UDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17352, 246},
+    /* 4686 */ {I_VCVTPS2UDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+17360, 247},
+    /* 4687 */ {I_VCVTPS2UQQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17368, 248},
+    /* 4688 */ {I_VCVTPS2UQQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17376, 248},
+    /* 4689 */ {I_VCVTPS2UQQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+17384, 249},
+    /* 4690 */ {I_VCVTQQ2PD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17392, 248},
+    /* 4691 */ {I_VCVTQQ2PD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17400, 248},
+    /* 4692 */ {I_VCVTQQ2PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17408, 249},
+    /* 4693 */ {I_VCVTQQ2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17416, 248},
+    /* 4694 */ {I_VCVTQQ2PS, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17424, 248},
+    /* 4695 */ {I_VCVTQQ2PS, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17432, 249},
+    /* 4696 */ {I_VCVTSD2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17440, 247},
+    /* 4697 */ {I_VCVTSD2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17448, 247},
+    /* 4698 */ {I_VCVTSD2SS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+17456, 247},
+    /* 4699 */ {I_VCVTSD2USI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17464, 247},
+    /* 4700 */ {I_VCVTSD2USI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17472, 247},
+    /* 4701 */ {I_VCVTSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17480, 247},
+    /* 4702 */ {I_VCVTSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17488, 247},
+    /* 4703 */ {I_VCVTSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17496, 247},
+    /* 4704 */ {I_VCVTSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17504, 247},
+    /* 4705 */ {I_VCVTSS2SD, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+17512, 247},
+    /* 4706 */ {I_VCVTSS2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17520, 247},
+    /* 4707 */ {I_VCVTSS2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17528, 247},
+    /* 4708 */ {I_VCVTSS2USI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17536, 247},
+    /* 4709 */ {I_VCVTSS2USI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17544, 247},
+    /* 4710 */ {I_VCVTTPD2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17552, 246},
+    /* 4711 */ {I_VCVTTPD2DQ, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17560, 246},
+    /* 4712 */ {I_VCVTTPD2DQ, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+17568, 247},
+    /* 4713 */ {I_VCVTTPD2QQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17576, 248},
+    /* 4714 */ {I_VCVTTPD2QQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17584, 248},
+    /* 4715 */ {I_VCVTTPD2QQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+17592, 249},
+    /* 4716 */ {I_VCVTTPD2UDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17600, 246},
+    /* 4717 */ {I_VCVTTPD2UDQ, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17608, 246},
+    /* 4718 */ {I_VCVTTPD2UDQ, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+17616, 247},
+    /* 4719 */ {I_VCVTTPD2UQQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17624, 248},
+    /* 4720 */ {I_VCVTTPD2UQQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17632, 248},
+    /* 4721 */ {I_VCVTTPD2UQQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+17640, 249},
+    /* 4722 */ {I_VCVTTPS2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17648, 246},
+    /* 4723 */ {I_VCVTTPS2DQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17656, 246},
+    /* 4724 */ {I_VCVTTPS2DQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+17664, 247},
+    /* 4725 */ {I_VCVTTPS2QQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17672, 248},
+    /* 4726 */ {I_VCVTTPS2QQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17680, 248},
+    /* 4727 */ {I_VCVTTPS2QQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+17688, 249},
+    /* 4728 */ {I_VCVTTPS2UDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17696, 246},
+    /* 4729 */ {I_VCVTTPS2UDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17704, 246},
+    /* 4730 */ {I_VCVTTPS2UDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+17712, 247},
+    /* 4731 */ {I_VCVTTPS2UQQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17720, 248},
+    /* 4732 */ {I_VCVTTPS2UQQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17728, 248},
+    /* 4733 */ {I_VCVTTPS2UQQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+17736, 249},
+    /* 4734 */ {I_VCVTTSD2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+17744, 247},
+    /* 4735 */ {I_VCVTTSD2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+17752, 247},
+    /* 4736 */ {I_VCVTTSD2USI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+17760, 247},
+    /* 4737 */ {I_VCVTTSD2USI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+17768, 247},
+    /* 4738 */ {I_VCVTTSS2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+17776, 247},
+    /* 4739 */ {I_VCVTTSS2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+17784, 247},
+    /* 4740 */ {I_VCVTTSS2USI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+17792, 247},
+    /* 4741 */ {I_VCVTTSS2USI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+17800, 247},
+    /* 4742 */ {I_VCVTUDQ2PD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17808, 246},
+    /* 4743 */ {I_VCVTUDQ2PD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17816, 246},
+    /* 4744 */ {I_VCVTUDQ2PD, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+17824, 247},
+    /* 4745 */ {I_VCVTUDQ2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17832, 246},
+    /* 4746 */ {I_VCVTUDQ2PS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17840, 246},
+    /* 4747 */ {I_VCVTUDQ2PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+17848, 247},
+    /* 4748 */ {I_VCVTUQQ2PD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17856, 248},
+    /* 4749 */ {I_VCVTUQQ2PD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17864, 248},
+    /* 4750 */ {I_VCVTUQQ2PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17872, 249},
+    /* 4751 */ {I_VCVTUQQ2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17880, 248},
+    /* 4752 */ {I_VCVTUQQ2PS, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17888, 248},
+    /* 4753 */ {I_VCVTUQQ2PS, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17896, 249},
+    /* 4754 */ {I_VCVTUSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17904, 247},
+    /* 4755 */ {I_VCVTUSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17912, 247},
+    /* 4756 */ {I_VCVTUSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17920, 247},
+    /* 4757 */ {I_VCVTUSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17928, 247},
+    /* 4758 */ {I_VDBPSADBW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8209, 250},
+    /* 4759 */ {I_VDBPSADBW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8218, 250},
+    /* 4760 */ {I_VDBPSADBW, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8227, 250},
+    /* 4761 */ {I_VDBPSADBW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8236, 250},
+    /* 4762 */ {I_VDBPSADBW, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8245, 251},
+    /* 4763 */ {I_VDBPSADBW, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8254, 251},
+    /* 4764 */ {I_VDIVPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+17936, 246},
+    /* 4765 */ {I_VDIVPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17944, 246},
+    /* 4766 */ {I_VDIVPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+17952, 246},
+    /* 4767 */ {I_VDIVPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17960, 246},
+    /* 4768 */ {I_VDIVPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+17968, 247},
+    /* 4769 */ {I_VDIVPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17976, 247},
+    /* 4770 */ {I_VDIVPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+17984, 246},
+    /* 4771 */ {I_VDIVPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17992, 246},
+    /* 4772 */ {I_VDIVPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18000, 246},
+    /* 4773 */ {I_VDIVPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+18008, 246},
+    /* 4774 */ {I_VDIVPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18016, 247},
+    /* 4775 */ {I_VDIVPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+18024, 247},
+    /* 4776 */ {I_VDIVSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18032, 247},
+    /* 4777 */ {I_VDIVSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+18040, 247},
+    /* 4778 */ {I_VDIVSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18048, 247},
+    /* 4779 */ {I_VDIVSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+18056, 247},
+    /* 4780 */ {I_VEXP2PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+18064, 252},
+    /* 4781 */ {I_VEXP2PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+18072, 252},
+    /* 4782 */ {I_VEXPANDPD, 2, {XMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18080, 246},
+    /* 4783 */ {I_VEXPANDPD, 2, {YMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18088, 246},
+    /* 4784 */ {I_VEXPANDPD, 2, {ZMMREG,MEMORY|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18096, 247},
+    /* 4785 */ {I_VEXPANDPD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18080, 246},
+    /* 4786 */ {I_VEXPANDPD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18088, 246},
+    /* 4787 */ {I_VEXPANDPD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18096, 247},
+    /* 4788 */ {I_VEXPANDPS, 2, {XMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18104, 246},
+    /* 4789 */ {I_VEXPANDPS, 2, {YMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18112, 246},
+    /* 4790 */ {I_VEXPANDPS, 2, {ZMMREG,MEMORY|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18120, 247},
+    /* 4791 */ {I_VEXPANDPS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18104, 246},
+    /* 4792 */ {I_VEXPANDPS, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18112, 246},
+    /* 4793 */ {I_VEXPANDPS, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18120, 247},
+    /* 4794 */ {I_VEXTRACTF32X4, 3, {XMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8263, 246},
+    /* 4795 */ {I_VEXTRACTF32X4, 3, {XMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8272, 247},
+    /* 4796 */ {I_VEXTRACTF32X4, 3, {MEMORY|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8281, 246},
+    /* 4797 */ {I_VEXTRACTF32X4, 3, {MEMORY|BITS128,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8290, 247},
+    /* 4798 */ {I_VEXTRACTF32X8, 3, {YMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8299, 249},
+    /* 4799 */ {I_VEXTRACTF32X8, 3, {MEMORY|BITS256,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8308, 249},
+    /* 4800 */ {I_VEXTRACTF64X2, 3, {XMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8317, 248},
+    /* 4801 */ {I_VEXTRACTF64X2, 3, {XMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8326, 249},
+    /* 4802 */ {I_VEXTRACTF64X2, 3, {MEMORY|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8335, 248},
+    /* 4803 */ {I_VEXTRACTF64X2, 3, {MEMORY|BITS128,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8344, 249},
+    /* 4804 */ {I_VEXTRACTF64X4, 3, {YMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8353, 247},
+    /* 4805 */ {I_VEXTRACTF64X4, 3, {MEMORY|BITS256,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8362, 247},
+    /* 4806 */ {I_VEXTRACTI32X4, 3, {XMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8371, 246},
+    /* 4807 */ {I_VEXTRACTI32X4, 3, {XMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8380, 247},
+    /* 4808 */ {I_VEXTRACTI32X4, 3, {MEMORY|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8389, 246},
+    /* 4809 */ {I_VEXTRACTI32X4, 3, {MEMORY|BITS128,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8398, 247},
+    /* 4810 */ {I_VEXTRACTI32X8, 3, {YMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8407, 249},
+    /* 4811 */ {I_VEXTRACTI32X8, 3, {MEMORY|BITS256,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8416, 249},
+    /* 4812 */ {I_VEXTRACTI64X2, 3, {XMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8425, 248},
+    /* 4813 */ {I_VEXTRACTI64X2, 3, {XMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8434, 249},
+    /* 4814 */ {I_VEXTRACTI64X2, 3, {MEMORY|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8443, 248},
+    /* 4815 */ {I_VEXTRACTI64X2, 3, {MEMORY|BITS128,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8452, 249},
+    /* 4816 */ {I_VEXTRACTI64X4, 3, {YMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8461, 247},
+    /* 4817 */ {I_VEXTRACTI64X4, 3, {MEMORY|BITS256,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8470, 247},
+    /* 4818 */ {I_VEXTRACTPS, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+8479, 247},
+    /* 4819 */ {I_VEXTRACTPS, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+8479, 247},
+    /* 4820 */ {I_VEXTRACTPS, 3, {MEMORY|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+8479, 247},
+    /* 4821 */ {I_VFIXUPIMMPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+8488, 246},
+    /* 4822 */ {I_VFIXUPIMMPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+8497, 246},
+    /* 4823 */ {I_VFIXUPIMMPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+8506, 246},
+    /* 4824 */ {I_VFIXUPIMMPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+8515, 246},
+    /* 4825 */ {I_VFIXUPIMMPD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64|SAE,0,0}, nasm_bytecodes+8524, 247},
+    /* 4826 */ {I_VFIXUPIMMPD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+8533, 247},
+    /* 4827 */ {I_VFIXUPIMMPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+8542, 246},
+    /* 4828 */ {I_VFIXUPIMMPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+8551, 246},
+    /* 4829 */ {I_VFIXUPIMMPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+8560, 246},
+    /* 4830 */ {I_VFIXUPIMMPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+8569, 246},
+    /* 4831 */ {I_VFIXUPIMMPS, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32|SAE,0,0}, nasm_bytecodes+8578, 247},
+    /* 4832 */ {I_VFIXUPIMMPS, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+8587, 247},
+    /* 4833 */ {I_VFIXUPIMMSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+8596, 247},
+    /* 4834 */ {I_VFIXUPIMMSD, 3, {XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+8605, 247},
+    /* 4835 */ {I_VFIXUPIMMSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+8614, 247},
+    /* 4836 */ {I_VFIXUPIMMSS, 3, {XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+8623, 247},
+    /* 4837 */ {I_VFMADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18128, 246},
+    /* 4838 */ {I_VFMADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18136, 246},
+    /* 4839 */ {I_VFMADD132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18144, 247},
+    /* 4840 */ {I_VFMADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18152, 246},
+    /* 4841 */ {I_VFMADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18160, 246},
+    /* 4842 */ {I_VFMADD132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18168, 247},
+    /* 4843 */ {I_VFMADD132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18176, 247},
+    /* 4844 */ {I_VFMADD132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18184, 247},
+    /* 4845 */ {I_VFMADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18192, 246},
+    /* 4846 */ {I_VFMADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18200, 246},
+    /* 4847 */ {I_VFMADD213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18208, 247},
+    /* 4848 */ {I_VFMADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18216, 246},
+    /* 4849 */ {I_VFMADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18224, 246},
+    /* 4850 */ {I_VFMADD213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18232, 247},
+    /* 4851 */ {I_VFMADD213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18240, 247},
+    /* 4852 */ {I_VFMADD213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18248, 247},
+    /* 4853 */ {I_VFMADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18256, 246},
+    /* 4854 */ {I_VFMADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18264, 246},
+    /* 4855 */ {I_VFMADD231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18272, 247},
+    /* 4856 */ {I_VFMADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18280, 246},
+    /* 4857 */ {I_VFMADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18288, 246},
+    /* 4858 */ {I_VFMADD231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18296, 247},
+    /* 4859 */ {I_VFMADD231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18304, 247},
+    /* 4860 */ {I_VFMADD231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18312, 247},
+    /* 4861 */ {I_VFMADDSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18320, 246},
+    /* 4862 */ {I_VFMADDSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18328, 246},
+    /* 4863 */ {I_VFMADDSUB132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18336, 247},
+    /* 4864 */ {I_VFMADDSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18344, 246},
+    /* 4865 */ {I_VFMADDSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18352, 246},
+    /* 4866 */ {I_VFMADDSUB132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18360, 247},
+    /* 4867 */ {I_VFMADDSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18368, 246},
+    /* 4868 */ {I_VFMADDSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18376, 246},
+    /* 4869 */ {I_VFMADDSUB213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18384, 247},
+    /* 4870 */ {I_VFMADDSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18392, 246},
+    /* 4871 */ {I_VFMADDSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18400, 246},
+    /* 4872 */ {I_VFMADDSUB213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18408, 247},
+    /* 4873 */ {I_VFMADDSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18416, 246},
+    /* 4874 */ {I_VFMADDSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18424, 246},
+    /* 4875 */ {I_VFMADDSUB231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18432, 247},
+    /* 4876 */ {I_VFMADDSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18440, 246},
+    /* 4877 */ {I_VFMADDSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18448, 246},
+    /* 4878 */ {I_VFMADDSUB231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18456, 247},
+    /* 4879 */ {I_VFMSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18464, 246},
+    /* 4880 */ {I_VFMSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18472, 246},
+    /* 4881 */ {I_VFMSUB132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18480, 247},
+    /* 4882 */ {I_VFMSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18488, 246},
+    /* 4883 */ {I_VFMSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18496, 246},
+    /* 4884 */ {I_VFMSUB132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18504, 247},
+    /* 4885 */ {I_VFMSUB132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18512, 247},
+    /* 4886 */ {I_VFMSUB132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18520, 247},
+    /* 4887 */ {I_VFMSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18528, 246},
+    /* 4888 */ {I_VFMSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18536, 246},
+    /* 4889 */ {I_VFMSUB213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18544, 247},
+    /* 4890 */ {I_VFMSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18552, 246},
+    /* 4891 */ {I_VFMSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18560, 246},
+    /* 4892 */ {I_VFMSUB213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18568, 247},
+    /* 4893 */ {I_VFMSUB213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18576, 247},
+    /* 4894 */ {I_VFMSUB213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18584, 247},
+    /* 4895 */ {I_VFMSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18592, 246},
+    /* 4896 */ {I_VFMSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18600, 246},
+    /* 4897 */ {I_VFMSUB231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18608, 247},
+    /* 4898 */ {I_VFMSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18616, 246},
+    /* 4899 */ {I_VFMSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18624, 246},
+    /* 4900 */ {I_VFMSUB231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18632, 247},
+    /* 4901 */ {I_VFMSUB231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18640, 247},
+    /* 4902 */ {I_VFMSUB231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18648, 247},
+    /* 4903 */ {I_VFMSUBADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18656, 246},
+    /* 4904 */ {I_VFMSUBADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18664, 246},
+    /* 4905 */ {I_VFMSUBADD132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18672, 247},
+    /* 4906 */ {I_VFMSUBADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18680, 246},
+    /* 4907 */ {I_VFMSUBADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18688, 246},
+    /* 4908 */ {I_VFMSUBADD132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18696, 247},
+    /* 4909 */ {I_VFMSUBADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18704, 246},
+    /* 4910 */ {I_VFMSUBADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18712, 246},
+    /* 4911 */ {I_VFMSUBADD213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18720, 247},
+    /* 4912 */ {I_VFMSUBADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18728, 246},
+    /* 4913 */ {I_VFMSUBADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18736, 246},
+    /* 4914 */ {I_VFMSUBADD213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18744, 247},
+    /* 4915 */ {I_VFMSUBADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18752, 246},
+    /* 4916 */ {I_VFMSUBADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18760, 246},
+    /* 4917 */ {I_VFMSUBADD231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18768, 247},
+    /* 4918 */ {I_VFMSUBADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18776, 246},
+    /* 4919 */ {I_VFMSUBADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18784, 246},
+    /* 4920 */ {I_VFMSUBADD231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18792, 247},
+    /* 4921 */ {I_VFNMADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18800, 246},
+    /* 4922 */ {I_VFNMADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18808, 246},
+    /* 4923 */ {I_VFNMADD132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18816, 247},
+    /* 4924 */ {I_VFNMADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18824, 246},
+    /* 4925 */ {I_VFNMADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18832, 246},
+    /* 4926 */ {I_VFNMADD132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18840, 247},
+    /* 4927 */ {I_VFNMADD132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18848, 247},
+    /* 4928 */ {I_VFNMADD132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18856, 247},
+    /* 4929 */ {I_VFNMADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18864, 246},
+    /* 4930 */ {I_VFNMADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18872, 246},
+    /* 4931 */ {I_VFNMADD213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18880, 247},
+    /* 4932 */ {I_VFNMADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18888, 246},
+    /* 4933 */ {I_VFNMADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18896, 246},
+    /* 4934 */ {I_VFNMADD213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18904, 247},
+    /* 4935 */ {I_VFNMADD213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18912, 247},
+    /* 4936 */ {I_VFNMADD213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18920, 247},
+    /* 4937 */ {I_VFNMADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18928, 246},
+    /* 4938 */ {I_VFNMADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18936, 246},
+    /* 4939 */ {I_VFNMADD231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18944, 247},
+    /* 4940 */ {I_VFNMADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18952, 246},
+    /* 4941 */ {I_VFNMADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18960, 246},
+    /* 4942 */ {I_VFNMADD231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18968, 247},
+    /* 4943 */ {I_VFNMADD231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18976, 247},
+    /* 4944 */ {I_VFNMADD231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18984, 247},
+    /* 4945 */ {I_VFNMSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18992, 246},
+    /* 4946 */ {I_VFNMSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19000, 246},
+    /* 4947 */ {I_VFNMSUB132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+19008, 247},
+    /* 4948 */ {I_VFNMSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19016, 246},
+    /* 4949 */ {I_VFNMSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19024, 246},
+    /* 4950 */ {I_VFNMSUB132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+19032, 247},
+    /* 4951 */ {I_VFNMSUB132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+19040, 247},
+    /* 4952 */ {I_VFNMSUB132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+19048, 247},
+    /* 4953 */ {I_VFNMSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19056, 246},
+    /* 4954 */ {I_VFNMSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19064, 246},
+    /* 4955 */ {I_VFNMSUB213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+19072, 247},
+    /* 4956 */ {I_VFNMSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19080, 246},
+    /* 4957 */ {I_VFNMSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19088, 246},
+    /* 4958 */ {I_VFNMSUB213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+19096, 247},
+    /* 4959 */ {I_VFNMSUB213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+19104, 247},
+    /* 4960 */ {I_VFNMSUB213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+19112, 247},
+    /* 4961 */ {I_VFNMSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19120, 246},
+    /* 4962 */ {I_VFNMSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19128, 246},
+    /* 4963 */ {I_VFNMSUB231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+19136, 247},
+    /* 4964 */ {I_VFNMSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19144, 246},
+    /* 4965 */ {I_VFNMSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19152, 246},
+    /* 4966 */ {I_VFNMSUB231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+19160, 247},
+    /* 4967 */ {I_VFNMSUB231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+19168, 247},
+    /* 4968 */ {I_VFNMSUB231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+19176, 247},
+    /* 4969 */ {I_VFPCLASSPD, 3, {KREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK,B64,0,0,0}, nasm_bytecodes+8632, 248},
+    /* 4970 */ {I_VFPCLASSPD, 3, {KREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK,B64,0,0,0}, nasm_bytecodes+8641, 248},
+    /* 4971 */ {I_VFPCLASSPD, 3, {KREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK,B64,0,0,0}, nasm_bytecodes+8650, 249},
+    /* 4972 */ {I_VFPCLASSPS, 3, {KREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK,B32,0,0,0}, nasm_bytecodes+8659, 248},
+    /* 4973 */ {I_VFPCLASSPS, 3, {KREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK,B32,0,0,0}, nasm_bytecodes+8668, 248},
+    /* 4974 */ {I_VFPCLASSPS, 3, {KREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK,B32,0,0,0}, nasm_bytecodes+8677, 249},
+    /* 4975 */ {I_VFPCLASSSD, 3, {KREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8686, 249},
+    /* 4976 */ {I_VFPCLASSSS, 3, {KREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8695, 249},
+    /* 4977 */ {I_VGATHERDPD, 2, {XMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8704, 246},
+    /* 4978 */ {I_VGATHERDPD, 2, {YMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8713, 246},
+    /* 4979 */ {I_VGATHERDPD, 2, {ZMMREG,YMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8722, 247},
+    /* 4980 */ {I_VGATHERDPS, 2, {XMMREG,XMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8731, 246},
+    /* 4981 */ {I_VGATHERDPS, 2, {YMMREG,YMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8740, 246},
+    /* 4982 */ {I_VGATHERDPS, 2, {ZMMREG,ZMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8749, 247},
+    /* 4983 */ {I_VGATHERPF0DPD, 1, {YMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8758, 253},
+    /* 4984 */ {I_VGATHERPF0DPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8767, 253},
+    /* 4985 */ {I_VGATHERPF0QPD, 1, {ZMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8776, 253},
+    /* 4986 */ {I_VGATHERPF0QPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8785, 253},
+    /* 4987 */ {I_VGATHERPF1DPD, 1, {YMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8794, 253},
+    /* 4988 */ {I_VGATHERPF1DPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8803, 253},
+    /* 4989 */ {I_VGATHERPF1QPD, 1, {ZMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8812, 253},
+    /* 4990 */ {I_VGATHERPF1QPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8821, 253},
+    /* 4991 */ {I_VGATHERQPD, 2, {XMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8830, 246},
+    /* 4992 */ {I_VGATHERQPD, 2, {YMMREG,YMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8839, 246},
+    /* 4993 */ {I_VGATHERQPD, 2, {ZMMREG,ZMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8848, 247},
+    /* 4994 */ {I_VGATHERQPS, 2, {XMMREG,XMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8857, 246},
+    /* 4995 */ {I_VGATHERQPS, 2, {XMMREG,YMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8866, 246},
+    /* 4996 */ {I_VGATHERQPS, 2, {YMMREG,ZMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8875, 247},
+    /* 4997 */ {I_VGETEXPPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19184, 246},
+    /* 4998 */ {I_VGETEXPPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19192, 246},
+    /* 4999 */ {I_VGETEXPPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+19200, 247},
+    /* 5000 */ {I_VGETEXPPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19208, 246},
+    /* 5001 */ {I_VGETEXPPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19216, 246},
+    /* 5002 */ {I_VGETEXPPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+19224, 247},
+    /* 5003 */ {I_VGETEXPSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+19232, 247},
+    /* 5004 */ {I_VGETEXPSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+19240, 247},
+    /* 5005 */ {I_VGETMANTPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+8884, 246},
+    /* 5006 */ {I_VGETMANTPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+8893, 246},
+    /* 5007 */ {I_VGETMANTPD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+8902, 247},
+    /* 5008 */ {I_VGETMANTPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+8911, 246},
+    /* 5009 */ {I_VGETMANTPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+8920, 246},
+    /* 5010 */ {I_VGETMANTPS, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+8929, 247},
+    /* 5011 */ {I_VGETMANTSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+8938, 247},
+    /* 5012 */ {I_VGETMANTSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+8947, 247},
+    /* 5013 */ {I_VINSERTF32X4, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8956, 246},
+    /* 5014 */ {I_VINSERTF32X4, 3, {YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8965, 246},
+    /* 5015 */ {I_VINSERTF32X4, 4, {ZMMREG,ZMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8974, 247},
+    /* 5016 */ {I_VINSERTF32X4, 3, {ZMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8983, 247},
+    /* 5017 */ {I_VINSERTF32X8, 4, {ZMMREG,ZMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8992, 249},
+    /* 5018 */ {I_VINSERTF32X8, 3, {ZMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9001, 249},
+    /* 5019 */ {I_VINSERTF64X2, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9010, 248},
+    /* 5020 */ {I_VINSERTF64X2, 3, {YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9019, 248},
+    /* 5021 */ {I_VINSERTF64X2, 4, {ZMMREG,ZMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9028, 249},
+    /* 5022 */ {I_VINSERTF64X2, 3, {ZMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9037, 249},
+    /* 5023 */ {I_VINSERTF64X4, 4, {ZMMREG,ZMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9046, 247},
+    /* 5024 */ {I_VINSERTF64X4, 3, {ZMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9055, 247},
+    /* 5025 */ {I_VINSERTI32X4, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9064, 246},
+    /* 5026 */ {I_VINSERTI32X4, 3, {YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9073, 246},
+    /* 5027 */ {I_VINSERTI32X4, 4, {ZMMREG,ZMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9082, 247},
+    /* 5028 */ {I_VINSERTI32X4, 3, {ZMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9091, 247},
+    /* 5029 */ {I_VINSERTI32X8, 4, {ZMMREG,ZMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9100, 249},
+    /* 5030 */ {I_VINSERTI32X8, 3, {ZMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9109, 249},
+    /* 5031 */ {I_VINSERTI64X2, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9118, 248},
+    /* 5032 */ {I_VINSERTI64X2, 3, {YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9127, 248},
+    /* 5033 */ {I_VINSERTI64X2, 4, {ZMMREG,ZMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9136, 249},
+    /* 5034 */ {I_VINSERTI64X2, 3, {ZMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9145, 249},
+    /* 5035 */ {I_VINSERTI64X4, 4, {ZMMREG,ZMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9154, 247},
+    /* 5036 */ {I_VINSERTI64X4, 3, {ZMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9163, 247},
+    /* 5037 */ {I_VINSERTPS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+9172, 247},
+    /* 5038 */ {I_VINSERTPS, 3, {XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9181, 247},
+    /* 5039 */ {I_VMAXPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19248, 246},
+    /* 5040 */ {I_VMAXPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19256, 246},
+    /* 5041 */ {I_VMAXPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19264, 246},
+    /* 5042 */ {I_VMAXPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19272, 246},
+    /* 5043 */ {I_VMAXPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|SAE,0,0}, nasm_bytecodes+19280, 247},
+    /* 5044 */ {I_VMAXPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+19288, 247},
+    /* 5045 */ {I_VMAXPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19296, 246},
+    /* 5046 */ {I_VMAXPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19304, 246},
+    /* 5047 */ {I_VMAXPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19312, 246},
+    /* 5048 */ {I_VMAXPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19320, 246},
+    /* 5049 */ {I_VMAXPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|SAE,0,0}, nasm_bytecodes+19328, 247},
+    /* 5050 */ {I_VMAXPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+19336, 247},
+    /* 5051 */ {I_VMAXSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+19344, 247},
+    /* 5052 */ {I_VMAXSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+19352, 247},
+    /* 5053 */ {I_VMAXSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+19360, 247},
+    /* 5054 */ {I_VMAXSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+19368, 247},
+    /* 5055 */ {I_VMINPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19376, 246},
+    /* 5056 */ {I_VMINPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19384, 246},
+    /* 5057 */ {I_VMINPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19392, 246},
+    /* 5058 */ {I_VMINPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19400, 246},
+    /* 5059 */ {I_VMINPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|SAE,0,0}, nasm_bytecodes+19408, 247},
+    /* 5060 */ {I_VMINPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+19416, 247},
+    /* 5061 */ {I_VMINPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19424, 246},
+    /* 5062 */ {I_VMINPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19432, 246},
+    /* 5063 */ {I_VMINPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19440, 246},
+    /* 5064 */ {I_VMINPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19448, 246},
+    /* 5065 */ {I_VMINPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|SAE,0,0}, nasm_bytecodes+19456, 247},
+    /* 5066 */ {I_VMINPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+19464, 247},
+    /* 5067 */ {I_VMINSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+19472, 247},
+    /* 5068 */ {I_VMINSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+19480, 247},
+    /* 5069 */ {I_VMINSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+19488, 247},
+    /* 5070 */ {I_VMINSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+19496, 247},
+    /* 5071 */ {I_VMOVAPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19504, 246},
+    /* 5072 */ {I_VMOVAPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19512, 246},
+    /* 5073 */ {I_VMOVAPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19520, 247},
+    /* 5074 */ {I_VMOVAPD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19528, 246},
+    /* 5075 */ {I_VMOVAPD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19536, 246},
+    /* 5076 */ {I_VMOVAPD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19544, 247},
+    /* 5077 */ {I_VMOVAPD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19552, 246},
+    /* 5078 */ {I_VMOVAPD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19560, 246},
+    /* 5079 */ {I_VMOVAPD, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19568, 247},
+    /* 5080 */ {I_VMOVAPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19576, 246},
+    /* 5081 */ {I_VMOVAPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19584, 246},
+    /* 5082 */ {I_VMOVAPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19592, 247},
+    /* 5083 */ {I_VMOVAPS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19600, 246},
+    /* 5084 */ {I_VMOVAPS, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19608, 246},
+    /* 5085 */ {I_VMOVAPS, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19616, 247},
+    /* 5086 */ {I_VMOVAPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19624, 246},
+    /* 5087 */ {I_VMOVAPS, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19632, 246},
+    /* 5088 */ {I_VMOVAPS, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19640, 247},
+    /* 5089 */ {I_VMOVD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+19648, 247},
+    /* 5090 */ {I_VMOVD, 2, {RM_GPR|BITS32,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+19656, 247},
+    /* 5091 */ {I_VMOVDDUP, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19664, 246},
+    /* 5092 */ {I_VMOVDDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19672, 246},
+    /* 5093 */ {I_VMOVDDUP, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19680, 247},
+    /* 5094 */ {I_VMOVDQA32, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19688, 246},
+    /* 5095 */ {I_VMOVDQA32, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19696, 246},
+    /* 5096 */ {I_VMOVDQA32, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19704, 247},
+    /* 5097 */ {I_VMOVDQA32, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19712, 246},
+    /* 5098 */ {I_VMOVDQA32, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19720, 246},
+    /* 5099 */ {I_VMOVDQA32, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19728, 247},
+    /* 5100 */ {I_VMOVDQA64, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19736, 246},
+    /* 5101 */ {I_VMOVDQA64, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19744, 246},
+    /* 5102 */ {I_VMOVDQA64, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19752, 247},
+    /* 5103 */ {I_VMOVDQA64, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19760, 246},
+    /* 5104 */ {I_VMOVDQA64, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19768, 246},
+    /* 5105 */ {I_VMOVDQA64, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19776, 247},
+    /* 5106 */ {I_VMOVDQU16, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19784, 250},
+    /* 5107 */ {I_VMOVDQU16, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19792, 250},
+    /* 5108 */ {I_VMOVDQU16, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19800, 251},
+    /* 5109 */ {I_VMOVDQU16, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19808, 250},
+    /* 5110 */ {I_VMOVDQU16, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19816, 250},
+    /* 5111 */ {I_VMOVDQU16, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19824, 251},
+    /* 5112 */ {I_VMOVDQU32, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19832, 246},
+    /* 5113 */ {I_VMOVDQU32, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19840, 246},
+    /* 5114 */ {I_VMOVDQU32, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19848, 247},
+    /* 5115 */ {I_VMOVDQU32, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19856, 246},
+    /* 5116 */ {I_VMOVDQU32, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19864, 246},
+    /* 5117 */ {I_VMOVDQU32, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19872, 247},
+    /* 5118 */ {I_VMOVDQU64, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19880, 246},
+    /* 5119 */ {I_VMOVDQU64, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19888, 246},
+    /* 5120 */ {I_VMOVDQU64, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19896, 247},
+    /* 5121 */ {I_VMOVDQU64, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19904, 246},
+    /* 5122 */ {I_VMOVDQU64, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19912, 246},
+    /* 5123 */ {I_VMOVDQU64, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19920, 247},
+    /* 5124 */ {I_VMOVDQU8, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19928, 250},
+    /* 5125 */ {I_VMOVDQU8, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19936, 250},
+    /* 5126 */ {I_VMOVDQU8, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19944, 251},
+    /* 5127 */ {I_VMOVDQU8, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19952, 250},
+    /* 5128 */ {I_VMOVDQU8, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19960, 250},
+    /* 5129 */ {I_VMOVDQU8, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19968, 251},
+    /* 5130 */ {I_VMOVHLPS, 3, {XMMREG,XMMREG,XMMREG,0,0}, NO_DECORATOR, nasm_bytecodes+19976, 247},
+    /* 5131 */ {I_VMOVHLPS, 2, {XMMREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+19984, 247},
+    /* 5132 */ {I_VMOVHPD, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+19992, 247},
+    /* 5133 */ {I_VMOVHPD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+20000, 247},
+    /* 5134 */ {I_VMOVHPD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20008, 247},
+    /* 5135 */ {I_VMOVHPS, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+20016, 247},
+    /* 5136 */ {I_VMOVHPS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+20024, 247},
+    /* 5137 */ {I_VMOVHPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20032, 247},
+    /* 5138 */ {I_VMOVLHPS, 3, {XMMREG,XMMREG,XMMREG,0,0}, NO_DECORATOR, nasm_bytecodes+20040, 247},
+    /* 5139 */ {I_VMOVLHPS, 2, {XMMREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20048, 247},
+    /* 5140 */ {I_VMOVLPD, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+20056, 247},
+    /* 5141 */ {I_VMOVLPD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+20064, 247},
+    /* 5142 */ {I_VMOVLPD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20072, 247},
+    /* 5143 */ {I_VMOVLPS, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+20080, 247},
+    /* 5144 */ {I_VMOVLPS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+20088, 247},
+    /* 5145 */ {I_VMOVLPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20096, 247},
+    /* 5146 */ {I_VMOVNTDQ, 2, {MEMORY|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20104, 246},
+    /* 5147 */ {I_VMOVNTDQ, 2, {MEMORY|BITS256,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20112, 246},
+    /* 5148 */ {I_VMOVNTDQ, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20120, 247},
+    /* 5149 */ {I_VMOVNTDQA, 2, {XMMREG,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+20128, 246},
+    /* 5150 */ {I_VMOVNTDQA, 2, {YMMREG,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+20136, 246},
+    /* 5151 */ {I_VMOVNTDQA, 2, {ZMMREG,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+20144, 247},
+    /* 5152 */ {I_VMOVNTPD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20152, 246},
+    /* 5153 */ {I_VMOVNTPD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20160, 246},
+    /* 5154 */ {I_VMOVNTPD, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20168, 247},
+    /* 5155 */ {I_VMOVNTPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20176, 246},
+    /* 5156 */ {I_VMOVNTPS, 2, {MEMORY|BITS256,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20184, 246},
+    /* 5157 */ {I_VMOVNTPS, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20192, 247},
+    /* 5158 */ {I_VMOVQ, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+20200, 247},
+    /* 5159 */ {I_VMOVQ, 2, {RM_GPR|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20208, 247},
+    /* 5160 */ {I_VMOVQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+20216, 247},
+    /* 5161 */ {I_VMOVQ, 2, {RM_XMM|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20224, 247},
+    /* 5162 */ {I_VMOVSD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20232, 247},
+    /* 5163 */ {I_VMOVSD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20240, 247},
+    /* 5164 */ {I_VMOVSD, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20248, 247},
+    /* 5165 */ {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20256, 247},
+    /* 5166 */ {I_VMOVSD, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20264, 247},
+    /* 5167 */ {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20272, 247},
+    /* 5168 */ {I_VMOVSHDUP, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20280, 246},
+    /* 5169 */ {I_VMOVSHDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20288, 246},
+    /* 5170 */ {I_VMOVSHDUP, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20296, 247},
+    /* 5171 */ {I_VMOVSLDUP, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20304, 246},
+    /* 5172 */ {I_VMOVSLDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20312, 246},
+    /* 5173 */ {I_VMOVSLDUP, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20320, 247},
+    /* 5174 */ {I_VMOVSS, 2, {XMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20328, 247},
+    /* 5175 */ {I_VMOVSS, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20336, 247},
+    /* 5176 */ {I_VMOVSS, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20344, 247},
+    /* 5177 */ {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20352, 247},
+    /* 5178 */ {I_VMOVSS, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20360, 247},
+    /* 5179 */ {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20368, 247},
+    /* 5180 */ {I_VMOVUPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20376, 246},
+    /* 5181 */ {I_VMOVUPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20384, 246},
+    /* 5182 */ {I_VMOVUPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20392, 247},
+    /* 5183 */ {I_VMOVUPD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20400, 246},
+    /* 5184 */ {I_VMOVUPD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20408, 246},
+    /* 5185 */ {I_VMOVUPD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20416, 247},
+    /* 5186 */ {I_VMOVUPD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20424, 246},
+    /* 5187 */ {I_VMOVUPD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20432, 246},
+    /* 5188 */ {I_VMOVUPD, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20440, 247},
+    /* 5189 */ {I_VMOVUPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20448, 246},
+    /* 5190 */ {I_VMOVUPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20456, 246},
+    /* 5191 */ {I_VMOVUPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20464, 247},
+    /* 5192 */ {I_VMOVUPS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20472, 246},
+    /* 5193 */ {I_VMOVUPS, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20480, 246},
+    /* 5194 */ {I_VMOVUPS, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20488, 247},
+    /* 5195 */ {I_VMOVUPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20496, 246},
+    /* 5196 */ {I_VMOVUPS, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20504, 246},
+    /* 5197 */ {I_VMOVUPS, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20512, 247},
+    /* 5198 */ {I_VMULPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+20520, 246},
+    /* 5199 */ {I_VMULPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20528, 246},
+    /* 5200 */ {I_VMULPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+20536, 246},
+    /* 5201 */ {I_VMULPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20544, 246},
+    /* 5202 */ {I_VMULPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+20552, 247},
+    /* 5203 */ {I_VMULPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+20560, 247},
+    /* 5204 */ {I_VMULPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20568, 246},
+    /* 5205 */ {I_VMULPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20576, 246},
+    /* 5206 */ {I_VMULPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20584, 246},
+    /* 5207 */ {I_VMULPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20592, 246},
+    /* 5208 */ {I_VMULPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+20600, 247},
+    /* 5209 */ {I_VMULPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+20608, 247},
+    /* 5210 */ {I_VMULSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+20616, 247},
+    /* 5211 */ {I_VMULSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+20624, 247},
+    /* 5212 */ {I_VMULSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+20632, 247},
+    /* 5213 */ {I_VMULSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+20640, 247},
+    /* 5214 */ {I_VORPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+20648, 248},
+    /* 5215 */ {I_VORPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20656, 248},
+    /* 5216 */ {I_VORPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+20664, 248},
+    /* 5217 */ {I_VORPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20672, 248},
+    /* 5218 */ {I_VORPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+20680, 249},
+    /* 5219 */ {I_VORPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20688, 249},
+    /* 5220 */ {I_VORPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20696, 248},
+    /* 5221 */ {I_VORPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20704, 248},
+    /* 5222 */ {I_VORPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20712, 248},
+    /* 5223 */ {I_VORPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20720, 248},
+    /* 5224 */ {I_VORPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20728, 249},
+    /* 5225 */ {I_VORPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20736, 249},
+    /* 5226 */ {I_VPABSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20744, 250},
+    /* 5227 */ {I_VPABSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20752, 250},
+    /* 5228 */ {I_VPABSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20760, 251},
+    /* 5229 */ {I_VPABSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20768, 246},
+    /* 5230 */ {I_VPABSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20776, 246},
+    /* 5231 */ {I_VPABSD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20784, 247},
+    /* 5232 */ {I_VPABSQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20792, 246},
+    /* 5233 */ {I_VPABSQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20800, 246},
+    /* 5234 */ {I_VPABSQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20808, 247},
+    /* 5235 */ {I_VPABSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20816, 250},
+    /* 5236 */ {I_VPABSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20824, 250},
+    /* 5237 */ {I_VPABSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20832, 251},
+    /* 5238 */ {I_VPACKSSDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20840, 250},
+    /* 5239 */ {I_VPACKSSDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20848, 250},
+    /* 5240 */ {I_VPACKSSDW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20856, 250},
+    /* 5241 */ {I_VPACKSSDW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20864, 250},
+    /* 5242 */ {I_VPACKSSDW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20872, 251},
+    /* 5243 */ {I_VPACKSSDW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20880, 251},
+    /* 5244 */ {I_VPACKSSWB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20888, 250},
+    /* 5245 */ {I_VPACKSSWB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20896, 250},
+    /* 5246 */ {I_VPACKSSWB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20904, 250},
+    /* 5247 */ {I_VPACKSSWB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20912, 250},
+    /* 5248 */ {I_VPACKSSWB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20920, 251},
+    /* 5249 */ {I_VPACKSSWB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20928, 251},
+    /* 5250 */ {I_VPACKUSDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20936, 250},
+    /* 5251 */ {I_VPACKUSDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20944, 250},
+    /* 5252 */ {I_VPACKUSDW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20952, 250},
+    /* 5253 */ {I_VPACKUSDW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20960, 250},
+    /* 5254 */ {I_VPACKUSDW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20968, 251},
+    /* 5255 */ {I_VPACKUSDW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20976, 251},
+    /* 5256 */ {I_VPACKUSWB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20984, 250},
+    /* 5257 */ {I_VPACKUSWB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20992, 250},
+    /* 5258 */ {I_VPACKUSWB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21000, 250},
+    /* 5259 */ {I_VPACKUSWB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21008, 250},
+    /* 5260 */ {I_VPACKUSWB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21016, 251},
+    /* 5261 */ {I_VPACKUSWB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21024, 251},
+    /* 5262 */ {I_VPADDB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21032, 250},
+    /* 5263 */ {I_VPADDB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21040, 250},
+    /* 5264 */ {I_VPADDB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21048, 250},
+    /* 5265 */ {I_VPADDB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21056, 250},
+    /* 5266 */ {I_VPADDB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21064, 251},
+    /* 5267 */ {I_VPADDB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21072, 251},
+    /* 5268 */ {I_VPADDD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21080, 246},
+    /* 5269 */ {I_VPADDD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21088, 246},
+    /* 5270 */ {I_VPADDD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21096, 246},
+    /* 5271 */ {I_VPADDD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21104, 246},
+    /* 5272 */ {I_VPADDD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21112, 247},
+    /* 5273 */ {I_VPADDD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21120, 247},
+    /* 5274 */ {I_VPADDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21128, 246},
+    /* 5275 */ {I_VPADDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21136, 246},
+    /* 5276 */ {I_VPADDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21144, 246},
+    /* 5277 */ {I_VPADDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21152, 246},
+    /* 5278 */ {I_VPADDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21160, 247},
+    /* 5279 */ {I_VPADDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21168, 247},
+    /* 5280 */ {I_VPADDSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21176, 250},
+    /* 5281 */ {I_VPADDSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21184, 250},
+    /* 5282 */ {I_VPADDSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21192, 250},
+    /* 5283 */ {I_VPADDSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21200, 250},
+    /* 5284 */ {I_VPADDSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21208, 251},
+    /* 5285 */ {I_VPADDSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21216, 251},
+    /* 5286 */ {I_VPADDSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21224, 250},
+    /* 5287 */ {I_VPADDSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21232, 250},
+    /* 5288 */ {I_VPADDSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21240, 250},
+    /* 5289 */ {I_VPADDSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21248, 250},
+    /* 5290 */ {I_VPADDSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21256, 251},
+    /* 5291 */ {I_VPADDSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21264, 251},
+    /* 5292 */ {I_VPADDUSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21272, 250},
+    /* 5293 */ {I_VPADDUSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21280, 250},
+    /* 5294 */ {I_VPADDUSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21288, 250},
+    /* 5295 */ {I_VPADDUSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21296, 250},
+    /* 5296 */ {I_VPADDUSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21304, 251},
+    /* 5297 */ {I_VPADDUSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21312, 251},
+    /* 5298 */ {I_VPADDUSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21320, 250},
+    /* 5299 */ {I_VPADDUSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21328, 250},
+    /* 5300 */ {I_VPADDUSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21336, 250},
+    /* 5301 */ {I_VPADDUSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21344, 250},
+    /* 5302 */ {I_VPADDUSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21352, 251},
+    /* 5303 */ {I_VPADDUSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21360, 251},
+    /* 5304 */ {I_VPADDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21368, 250},
+    /* 5305 */ {I_VPADDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21376, 250},
+    /* 5306 */ {I_VPADDW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21384, 250},
+    /* 5307 */ {I_VPADDW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21392, 250},
+    /* 5308 */ {I_VPADDW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21400, 251},
+    /* 5309 */ {I_VPADDW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21408, 251},
+    /* 5310 */ {I_VPALIGNR, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9190, 250},
+    /* 5311 */ {I_VPALIGNR, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9199, 250},
+    /* 5312 */ {I_VPALIGNR, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9208, 250},
+    /* 5313 */ {I_VPALIGNR, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9217, 250},
+    /* 5314 */ {I_VPALIGNR, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9226, 251},
+    /* 5315 */ {I_VPALIGNR, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9235, 251},
+    /* 5316 */ {I_VPANDD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21416, 246},
+    /* 5317 */ {I_VPANDD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21424, 246},
+    /* 5318 */ {I_VPANDD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21432, 246},
+    /* 5319 */ {I_VPANDD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21440, 246},
+    /* 5320 */ {I_VPANDD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21448, 247},
+    /* 5321 */ {I_VPANDD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21456, 247},
+    /* 5322 */ {I_VPANDND, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21464, 246},
+    /* 5323 */ {I_VPANDND, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21472, 246},
+    /* 5324 */ {I_VPANDND, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21480, 246},
+    /* 5325 */ {I_VPANDND, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21488, 246},
+    /* 5326 */ {I_VPANDND, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21496, 247},
+    /* 5327 */ {I_VPANDND, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21504, 247},
+    /* 5328 */ {I_VPANDNQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21512, 246},
+    /* 5329 */ {I_VPANDNQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21520, 246},
+    /* 5330 */ {I_VPANDNQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21528, 246},
+    /* 5331 */ {I_VPANDNQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21536, 246},
+    /* 5332 */ {I_VPANDNQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21544, 247},
+    /* 5333 */ {I_VPANDNQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21552, 247},
+    /* 5334 */ {I_VPANDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21560, 246},
+    /* 5335 */ {I_VPANDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21568, 246},
+    /* 5336 */ {I_VPANDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21576, 246},
+    /* 5337 */ {I_VPANDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21584, 246},
+    /* 5338 */ {I_VPANDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21592, 247},
+    /* 5339 */ {I_VPANDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21600, 247},
+    /* 5340 */ {I_VPAVGB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21608, 250},
+    /* 5341 */ {I_VPAVGB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21616, 250},
+    /* 5342 */ {I_VPAVGB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21624, 250},
+    /* 5343 */ {I_VPAVGB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21632, 250},
+    /* 5344 */ {I_VPAVGB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21640, 251},
+    /* 5345 */ {I_VPAVGB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21648, 251},
+    /* 5346 */ {I_VPAVGW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21656, 250},
+    /* 5347 */ {I_VPAVGW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21664, 250},
+    /* 5348 */ {I_VPAVGW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21672, 250},
+    /* 5349 */ {I_VPAVGW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21680, 250},
+    /* 5350 */ {I_VPAVGW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21688, 251},
+    /* 5351 */ {I_VPAVGW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21696, 251},
+    /* 5352 */ {I_VPBLENDMB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21704, 250},
+    /* 5353 */ {I_VPBLENDMB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21712, 250},
+    /* 5354 */ {I_VPBLENDMB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21720, 251},
+    /* 5355 */ {I_VPBLENDMD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21728, 246},
+    /* 5356 */ {I_VPBLENDMD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21736, 246},
+    /* 5357 */ {I_VPBLENDMD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21744, 247},
+    /* 5358 */ {I_VPBLENDMQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21752, 246},
+    /* 5359 */ {I_VPBLENDMQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21760, 246},
+    /* 5360 */ {I_VPBLENDMQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21768, 247},
+    /* 5361 */ {I_VPBLENDMW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21776, 250},
+    /* 5362 */ {I_VPBLENDMW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21784, 250},
+    /* 5363 */ {I_VPBLENDMW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21792, 251},
+    /* 5364 */ {I_VPBROADCASTB, 2, {XMMREG,RM_XMM|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21800, 250},
+    /* 5365 */ {I_VPBROADCASTB, 2, {YMMREG,RM_XMM|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21808, 250},
+    /* 5366 */ {I_VPBROADCASTB, 2, {ZMMREG,RM_XMM|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21816, 251},
+    /* 5367 */ {I_VPBROADCASTB, 2, {XMMREG,REG_GPR|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21824, 250},
+    /* 5368 */ {I_VPBROADCASTB, 2, {XMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21824, 250},
+    /* 5369 */ {I_VPBROADCASTB, 2, {XMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21824, 250},
+    /* 5370 */ {I_VPBROADCASTB, 2, {XMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21824, 250},
+    /* 5371 */ {I_VPBROADCASTB, 2, {YMMREG,REG_GPR|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21832, 250},
+    /* 5372 */ {I_VPBROADCASTB, 2, {YMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21832, 250},
+    /* 5373 */ {I_VPBROADCASTB, 2, {YMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21832, 250},
+    /* 5374 */ {I_VPBROADCASTB, 2, {YMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21832, 250},
+    /* 5375 */ {I_VPBROADCASTB, 2, {ZMMREG,REG_GPR|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21840, 251},
+    /* 5376 */ {I_VPBROADCASTB, 2, {ZMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21840, 251},
+    /* 5377 */ {I_VPBROADCASTB, 2, {ZMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21840, 251},
+    /* 5378 */ {I_VPBROADCASTB, 2, {ZMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21840, 251},
+    /* 5379 */ {I_VPBROADCASTD, 2, {XMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21848, 246},
+    /* 5380 */ {I_VPBROADCASTD, 2, {YMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21856, 246},
+    /* 5381 */ {I_VPBROADCASTD, 2, {ZMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21864, 247},
+    /* 5382 */ {I_VPBROADCASTD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21872, 246},
+    /* 5383 */ {I_VPBROADCASTD, 2, {YMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21880, 246},
+    /* 5384 */ {I_VPBROADCASTD, 2, {ZMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21888, 247},
+    /* 5385 */ {I_VPBROADCASTD, 2, {XMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21896, 246},
+    /* 5386 */ {I_VPBROADCASTD, 2, {YMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21904, 246},
+    /* 5387 */ {I_VPBROADCASTD, 2, {ZMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21912, 247},
+    /* 5388 */ {I_VPBROADCASTMB2Q, 2, {XMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+21920, 254},
+    /* 5389 */ {I_VPBROADCASTMB2Q, 2, {YMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+21928, 254},
+    /* 5390 */ {I_VPBROADCASTMB2Q, 2, {ZMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+21936, 255},
+    /* 5391 */ {I_VPBROADCASTMW2D, 2, {XMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+21944, 254},
+    /* 5392 */ {I_VPBROADCASTMW2D, 2, {YMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+21952, 254},
+    /* 5393 */ {I_VPBROADCASTMW2D, 2, {ZMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+21960, 255},
+    /* 5394 */ {I_VPBROADCASTQ, 2, {XMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21968, 246},
+    /* 5395 */ {I_VPBROADCASTQ, 2, {YMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21976, 246},
+    /* 5396 */ {I_VPBROADCASTQ, 2, {ZMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21984, 247},
+    /* 5397 */ {I_VPBROADCASTQ, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21992, 246},
+    /* 5398 */ {I_VPBROADCASTQ, 2, {YMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22000, 246},
+    /* 5399 */ {I_VPBROADCASTQ, 2, {ZMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22008, 247},
+    /* 5400 */ {I_VPBROADCASTQ, 2, {XMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22016, 246},
+    /* 5401 */ {I_VPBROADCASTQ, 2, {YMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22024, 246},
+    /* 5402 */ {I_VPBROADCASTQ, 2, {ZMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22032, 247},
+    /* 5403 */ {I_VPBROADCASTW, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22040, 250},
+    /* 5404 */ {I_VPBROADCASTW, 2, {YMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22048, 250},
+    /* 5405 */ {I_VPBROADCASTW, 2, {ZMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22056, 251},
+    /* 5406 */ {I_VPBROADCASTW, 2, {XMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22064, 250},
+    /* 5407 */ {I_VPBROADCASTW, 2, {XMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22064, 250},
+    /* 5408 */ {I_VPBROADCASTW, 2, {XMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22064, 250},
+    /* 5409 */ {I_VPBROADCASTW, 2, {YMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22072, 250},
+    /* 5410 */ {I_VPBROADCASTW, 2, {YMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22072, 250},
+    /* 5411 */ {I_VPBROADCASTW, 2, {YMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22072, 250},
+    /* 5412 */ {I_VPBROADCASTW, 2, {ZMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22080, 251},
+    /* 5413 */ {I_VPBROADCASTW, 2, {ZMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22080, 251},
+    /* 5414 */ {I_VPBROADCASTW, 2, {ZMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22080, 251},
+    /* 5415 */ {I_VPCMPEQB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22088, 250},
+    /* 5416 */ {I_VPCMPEQB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22096, 250},
+    /* 5417 */ {I_VPCMPEQB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22104, 251},
+    /* 5418 */ {I_VPCMPEQD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+22112, 246},
+    /* 5419 */ {I_VPCMPEQD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+22120, 246},
+    /* 5420 */ {I_VPCMPEQD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+22128, 247},
+    /* 5421 */ {I_VPCMPEQQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+22136, 246},
+    /* 5422 */ {I_VPCMPEQQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+22144, 246},
+    /* 5423 */ {I_VPCMPEQQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+22152, 247},
+    /* 5424 */ {I_VPCMPEQW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22160, 250},
+    /* 5425 */ {I_VPCMPEQW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22168, 250},
+    /* 5426 */ {I_VPCMPEQW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22176, 251},
+    /* 5427 */ {I_VPCMPGTB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22184, 250},
+    /* 5428 */ {I_VPCMPGTB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22192, 250},
+    /* 5429 */ {I_VPCMPGTB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22200, 251},
+    /* 5430 */ {I_VPCMPGTD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+22208, 246},
+    /* 5431 */ {I_VPCMPGTD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+22216, 246},
+    /* 5432 */ {I_VPCMPGTD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+22224, 247},
+    /* 5433 */ {I_VPCMPGTQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+22232, 246},
+    /* 5434 */ {I_VPCMPGTQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+22240, 246},
+    /* 5435 */ {I_VPCMPGTQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+22248, 247},
+    /* 5436 */ {I_VPCMPGTW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22256, 250},
+    /* 5437 */ {I_VPCMPGTW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22264, 250},
+    /* 5438 */ {I_VPCMPGTW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22272, 251},
+    /* 5439 */ {I_VPCMPEQB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+2800, 250},
+    /* 5440 */ {I_VPCMPEQB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+2810, 250},
+    /* 5441 */ {I_VPCMPEQB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+2820, 251},
+    /* 5442 */ {I_VPCMPEQD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2830, 246},
+    /* 5443 */ {I_VPCMPEQD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2840, 246},
+    /* 5444 */ {I_VPCMPEQD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2850, 247},
+    /* 5445 */ {I_VPCMPEQQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2860, 246},
+    /* 5446 */ {I_VPCMPEQQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2870, 246},
+    /* 5447 */ {I_VPCMPEQQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2880, 247},
+    /* 5448 */ {I_VPCMPEQUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+2890, 250},
+    /* 5449 */ {I_VPCMPEQUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+2900, 250},
+    /* 5450 */ {I_VPCMPEQUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+2910, 251},
+    /* 5451 */ {I_VPCMPEQUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2920, 246},
+    /* 5452 */ {I_VPCMPEQUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2930, 246},
+    /* 5453 */ {I_VPCMPEQUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2940, 247},
+    /* 5454 */ {I_VPCMPEQUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2950, 246},
+    /* 5455 */ {I_VPCMPEQUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2960, 246},
+    /* 5456 */ {I_VPCMPEQUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2970, 247},
+    /* 5457 */ {I_VPCMPEQUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+2980, 250},
+    /* 5458 */ {I_VPCMPEQUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+2990, 250},
+    /* 5459 */ {I_VPCMPEQUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3000, 251},
+    /* 5460 */ {I_VPCMPEQW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3010, 250},
+    /* 5461 */ {I_VPCMPEQW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3020, 250},
+    /* 5462 */ {I_VPCMPEQW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3030, 251},
+    /* 5463 */ {I_VPCMPGEB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3040, 250},
+    /* 5464 */ {I_VPCMPGEB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3050, 250},
+    /* 5465 */ {I_VPCMPGEB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3060, 251},
+    /* 5466 */ {I_VPCMPGED, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3070, 246},
+    /* 5467 */ {I_VPCMPGED, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3080, 246},
+    /* 5468 */ {I_VPCMPGED, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3090, 247},
+    /* 5469 */ {I_VPCMPGEQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3100, 246},
+    /* 5470 */ {I_VPCMPGEQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3110, 246},
+    /* 5471 */ {I_VPCMPGEQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3120, 247},
+    /* 5472 */ {I_VPCMPGEUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3130, 250},
+    /* 5473 */ {I_VPCMPGEUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3140, 250},
+    /* 5474 */ {I_VPCMPGEUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3150, 251},
+    /* 5475 */ {I_VPCMPGEUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3160, 246},
+    /* 5476 */ {I_VPCMPGEUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3170, 246},
+    /* 5477 */ {I_VPCMPGEUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3180, 247},
+    /* 5478 */ {I_VPCMPGEUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3190, 246},
+    /* 5479 */ {I_VPCMPGEUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3200, 246},
+    /* 5480 */ {I_VPCMPGEUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3210, 247},
+    /* 5481 */ {I_VPCMPGEUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3220, 250},
+    /* 5482 */ {I_VPCMPGEUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3230, 250},
+    /* 5483 */ {I_VPCMPGEUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3240, 251},
+    /* 5484 */ {I_VPCMPGEW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3250, 250},
+    /* 5485 */ {I_VPCMPGEW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3260, 250},
+    /* 5486 */ {I_VPCMPGEW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3270, 251},
+    /* 5487 */ {I_VPCMPGTB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3280, 250},
+    /* 5488 */ {I_VPCMPGTB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3290, 250},
+    /* 5489 */ {I_VPCMPGTB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3300, 251},
+    /* 5490 */ {I_VPCMPGTD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3310, 246},
+    /* 5491 */ {I_VPCMPGTD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3320, 246},
+    /* 5492 */ {I_VPCMPGTD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3330, 247},
+    /* 5493 */ {I_VPCMPGTQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3340, 246},
+    /* 5494 */ {I_VPCMPGTQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3350, 246},
+    /* 5495 */ {I_VPCMPGTQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3360, 247},
+    /* 5496 */ {I_VPCMPGTUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3370, 250},
+    /* 5497 */ {I_VPCMPGTUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3380, 250},
+    /* 5498 */ {I_VPCMPGTUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3390, 251},
+    /* 5499 */ {I_VPCMPGTUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3400, 246},
+    /* 5500 */ {I_VPCMPGTUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3410, 246},
+    /* 5501 */ {I_VPCMPGTUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3420, 247},
+    /* 5502 */ {I_VPCMPGTUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3430, 246},
+    /* 5503 */ {I_VPCMPGTUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3440, 246},
+    /* 5504 */ {I_VPCMPGTUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3450, 247},
+    /* 5505 */ {I_VPCMPGTUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3460, 250},
+    /* 5506 */ {I_VPCMPGTUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3470, 250},
+    /* 5507 */ {I_VPCMPGTUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3480, 251},
+    /* 5508 */ {I_VPCMPGTW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3490, 250},
+    /* 5509 */ {I_VPCMPGTW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3500, 250},
+    /* 5510 */ {I_VPCMPGTW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3510, 251},
+    /* 5511 */ {I_VPCMPLEB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3520, 250},
+    /* 5512 */ {I_VPCMPLEB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3530, 250},
+    /* 5513 */ {I_VPCMPLEB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3540, 251},
+    /* 5514 */ {I_VPCMPLED, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3550, 246},
+    /* 5515 */ {I_VPCMPLED, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3560, 246},
+    /* 5516 */ {I_VPCMPLED, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3570, 247},
+    /* 5517 */ {I_VPCMPLEQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3580, 246},
+    /* 5518 */ {I_VPCMPLEQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3590, 246},
+    /* 5519 */ {I_VPCMPLEQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3600, 247},
+    /* 5520 */ {I_VPCMPLEUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3610, 250},
+    /* 5521 */ {I_VPCMPLEUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3620, 250},
+    /* 5522 */ {I_VPCMPLEUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3630, 251},
+    /* 5523 */ {I_VPCMPLEUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3640, 246},
+    /* 5524 */ {I_VPCMPLEUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3650, 246},
+    /* 5525 */ {I_VPCMPLEUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3660, 247},
+    /* 5526 */ {I_VPCMPLEUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3670, 246},
+    /* 5527 */ {I_VPCMPLEUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3680, 246},
+    /* 5528 */ {I_VPCMPLEUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3690, 247},
+    /* 5529 */ {I_VPCMPLEUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3700, 250},
+    /* 5530 */ {I_VPCMPLEUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3710, 250},
+    /* 5531 */ {I_VPCMPLEUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3720, 251},
+    /* 5532 */ {I_VPCMPLEW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3730, 250},
+    /* 5533 */ {I_VPCMPLEW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3740, 250},
+    /* 5534 */ {I_VPCMPLEW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3750, 251},
+    /* 5535 */ {I_VPCMPLTB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3760, 250},
+    /* 5536 */ {I_VPCMPLTB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3770, 250},
+    /* 5537 */ {I_VPCMPLTB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3780, 251},
+    /* 5538 */ {I_VPCMPLTD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3790, 246},
+    /* 5539 */ {I_VPCMPLTD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3800, 246},
+    /* 5540 */ {I_VPCMPLTD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3810, 247},
+    /* 5541 */ {I_VPCMPLTQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3820, 246},
+    /* 5542 */ {I_VPCMPLTQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3830, 246},
+    /* 5543 */ {I_VPCMPLTQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3840, 247},
+    /* 5544 */ {I_VPCMPLTUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3850, 250},
+    /* 5545 */ {I_VPCMPLTUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3860, 250},
+    /* 5546 */ {I_VPCMPLTUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3870, 251},
+    /* 5547 */ {I_VPCMPLTUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3880, 246},
+    /* 5548 */ {I_VPCMPLTUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3890, 246},
+    /* 5549 */ {I_VPCMPLTUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3900, 247},
+    /* 5550 */ {I_VPCMPLTUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3910, 246},
+    /* 5551 */ {I_VPCMPLTUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3920, 246},
+    /* 5552 */ {I_VPCMPLTUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3930, 247},
+    /* 5553 */ {I_VPCMPLTUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3940, 250},
+    /* 5554 */ {I_VPCMPLTUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3950, 250},
+    /* 5555 */ {I_VPCMPLTUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3960, 251},
+    /* 5556 */ {I_VPCMPLTW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3970, 250},
+    /* 5557 */ {I_VPCMPLTW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3980, 250},
+    /* 5558 */ {I_VPCMPLTW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3990, 251},
+    /* 5559 */ {I_VPCMPNEQB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4000, 250},
+    /* 5560 */ {I_VPCMPNEQB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4010, 250},
+    /* 5561 */ {I_VPCMPNEQB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4020, 251},
+    /* 5562 */ {I_VPCMPNEQD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4030, 246},
+    /* 5563 */ {I_VPCMPNEQD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4040, 246},
+    /* 5564 */ {I_VPCMPNEQD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4050, 247},
+    /* 5565 */ {I_VPCMPNEQQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4060, 246},
+    /* 5566 */ {I_VPCMPNEQQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4070, 246},
+    /* 5567 */ {I_VPCMPNEQQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4080, 247},
+    /* 5568 */ {I_VPCMPNEQUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4090, 250},
+    /* 5569 */ {I_VPCMPNEQUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4100, 250},
+    /* 5570 */ {I_VPCMPNEQUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4110, 251},
+    /* 5571 */ {I_VPCMPNEQUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4120, 246},
+    /* 5572 */ {I_VPCMPNEQUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4130, 246},
+    /* 5573 */ {I_VPCMPNEQUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4140, 247},
+    /* 5574 */ {I_VPCMPNEQUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4150, 246},
+    /* 5575 */ {I_VPCMPNEQUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4160, 246},
+    /* 5576 */ {I_VPCMPNEQUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4170, 247},
+    /* 5577 */ {I_VPCMPNEQUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4180, 250},
+    /* 5578 */ {I_VPCMPNEQUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4190, 250},
+    /* 5579 */ {I_VPCMPNEQUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4200, 251},
+    /* 5580 */ {I_VPCMPNEQW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4210, 250},
+    /* 5581 */ {I_VPCMPNEQW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4220, 250},
+    /* 5582 */ {I_VPCMPNEQW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4230, 251},
+    /* 5583 */ {I_VPCMPNGTB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3520, 250},
+    /* 5584 */ {I_VPCMPNGTB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3530, 250},
+    /* 5585 */ {I_VPCMPNGTB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3540, 251},
+    /* 5586 */ {I_VPCMPNGTD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3550, 246},
+    /* 5587 */ {I_VPCMPNGTD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3560, 246},
+    /* 5588 */ {I_VPCMPNGTD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3570, 247},
+    /* 5589 */ {I_VPCMPNGTQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3580, 246},
+    /* 5590 */ {I_VPCMPNGTQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3590, 246},
+    /* 5591 */ {I_VPCMPNGTQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3600, 247},
+    /* 5592 */ {I_VPCMPNGTUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3610, 250},
+    /* 5593 */ {I_VPCMPNGTUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3620, 250},
+    /* 5594 */ {I_VPCMPNGTUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3630, 251},
+    /* 5595 */ {I_VPCMPNGTUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3640, 246},
+    /* 5596 */ {I_VPCMPNGTUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3650, 246},
+    /* 5597 */ {I_VPCMPNGTUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3660, 247},
+    /* 5598 */ {I_VPCMPNGTUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3670, 246},
+    /* 5599 */ {I_VPCMPNGTUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3680, 246},
+    /* 5600 */ {I_VPCMPNGTUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3690, 247},
+    /* 5601 */ {I_VPCMPNGTUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3700, 250},
+    /* 5602 */ {I_VPCMPNGTUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3710, 250},
+    /* 5603 */ {I_VPCMPNGTUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3720, 251},
+    /* 5604 */ {I_VPCMPNGTW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3730, 250},
+    /* 5605 */ {I_VPCMPNGTW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3740, 250},
+    /* 5606 */ {I_VPCMPNGTW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3750, 251},
+    /* 5607 */ {I_VPCMPNLEB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3280, 250},
+    /* 5608 */ {I_VPCMPNLEB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3290, 250},
+    /* 5609 */ {I_VPCMPNLEB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3300, 251},
+    /* 5610 */ {I_VPCMPNLED, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3310, 246},
+    /* 5611 */ {I_VPCMPNLED, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3320, 246},
+    /* 5612 */ {I_VPCMPNLED, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3330, 247},
+    /* 5613 */ {I_VPCMPNLEQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3340, 246},
+    /* 5614 */ {I_VPCMPNLEQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3350, 246},
+    /* 5615 */ {I_VPCMPNLEQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3360, 247},
+    /* 5616 */ {I_VPCMPNLEUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3370, 250},
+    /* 5617 */ {I_VPCMPNLEUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3380, 250},
+    /* 5618 */ {I_VPCMPNLEUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3390, 251},
+    /* 5619 */ {I_VPCMPNLEUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3400, 246},
+    /* 5620 */ {I_VPCMPNLEUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3410, 246},
+    /* 5621 */ {I_VPCMPNLEUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3420, 247},
+    /* 5622 */ {I_VPCMPNLEUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3430, 246},
+    /* 5623 */ {I_VPCMPNLEUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3440, 246},
+    /* 5624 */ {I_VPCMPNLEUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3450, 247},
+    /* 5625 */ {I_VPCMPNLEUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3460, 250},
+    /* 5626 */ {I_VPCMPNLEUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3470, 250},
+    /* 5627 */ {I_VPCMPNLEUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3480, 251},
+    /* 5628 */ {I_VPCMPNLEW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3490, 250},
+    /* 5629 */ {I_VPCMPNLEW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3500, 250},
+    /* 5630 */ {I_VPCMPNLEW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3510, 251},
+    /* 5631 */ {I_VPCMPNLTB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3040, 250},
+    /* 5632 */ {I_VPCMPNLTB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3050, 250},
+    /* 5633 */ {I_VPCMPNLTB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3060, 251},
+    /* 5634 */ {I_VPCMPNLTD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3070, 246},
+    /* 5635 */ {I_VPCMPNLTD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3080, 246},
+    /* 5636 */ {I_VPCMPNLTD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3090, 247},
+    /* 5637 */ {I_VPCMPNLTQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3100, 246},
+    /* 5638 */ {I_VPCMPNLTQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3110, 246},
+    /* 5639 */ {I_VPCMPNLTQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3120, 247},
+    /* 5640 */ {I_VPCMPNLTUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3130, 250},
+    /* 5641 */ {I_VPCMPNLTUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3140, 250},
+    /* 5642 */ {I_VPCMPNLTUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3150, 251},
+    /* 5643 */ {I_VPCMPNLTUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3160, 246},
+    /* 5644 */ {I_VPCMPNLTUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3170, 246},
+    /* 5645 */ {I_VPCMPNLTUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3180, 247},
+    /* 5646 */ {I_VPCMPNLTUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3190, 246},
+    /* 5647 */ {I_VPCMPNLTUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3200, 246},
+    /* 5648 */ {I_VPCMPNLTUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3210, 247},
+    /* 5649 */ {I_VPCMPNLTUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3220, 250},
+    /* 5650 */ {I_VPCMPNLTUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3230, 250},
+    /* 5651 */ {I_VPCMPNLTUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3240, 251},
+    /* 5652 */ {I_VPCMPNLTW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3250, 250},
+    /* 5653 */ {I_VPCMPNLTW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3260, 250},
+    /* 5654 */ {I_VPCMPNLTW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3270, 251},
+    /* 5655 */ {I_VPCMPB, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9244, 250},
+    /* 5656 */ {I_VPCMPB, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9253, 250},
+    /* 5657 */ {I_VPCMPB, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9262, 251},
+    /* 5658 */ {I_VPCMPD, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+9271, 246},
+    /* 5659 */ {I_VPCMPD, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+9280, 246},
+    /* 5660 */ {I_VPCMPD, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+9289, 247},
+    /* 5661 */ {I_VPCMPQ, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+9298, 246},
+    /* 5662 */ {I_VPCMPQ, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+9307, 246},
+    /* 5663 */ {I_VPCMPQ, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+9316, 247},
+    /* 5664 */ {I_VPCMPUB, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9325, 250},
+    /* 5665 */ {I_VPCMPUB, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9334, 250},
+    /* 5666 */ {I_VPCMPUB, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9343, 251},
+    /* 5667 */ {I_VPCMPUD, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+9352, 246},
+    /* 5668 */ {I_VPCMPUD, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+9361, 246},
+    /* 5669 */ {I_VPCMPUD, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+9370, 247},
+    /* 5670 */ {I_VPCMPUQ, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+9379, 246},
+    /* 5671 */ {I_VPCMPUQ, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+9388, 246},
+    /* 5672 */ {I_VPCMPUQ, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+9397, 247},
+    /* 5673 */ {I_VPCMPUW, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9406, 250},
+    /* 5674 */ {I_VPCMPUW, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9415, 250},
+    /* 5675 */ {I_VPCMPUW, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9424, 251},
+    /* 5676 */ {I_VPCMPW, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9433, 250},
+    /* 5677 */ {I_VPCMPW, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9442, 250},
+    /* 5678 */ {I_VPCMPW, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9451, 251},
+    /* 5679 */ {I_VPCOMPRESSD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22280, 246},
+    /* 5680 */ {I_VPCOMPRESSD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22288, 246},
+    /* 5681 */ {I_VPCOMPRESSD, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22296, 247},
+    /* 5682 */ {I_VPCOMPRESSD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22304, 246},
+    /* 5683 */ {I_VPCOMPRESSD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22312, 246},
+    /* 5684 */ {I_VPCOMPRESSD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22320, 247},
+    /* 5685 */ {I_VPCOMPRESSQ, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22328, 246},
+    /* 5686 */ {I_VPCOMPRESSQ, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22336, 246},
+    /* 5687 */ {I_VPCOMPRESSQ, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22344, 247},
+    /* 5688 */ {I_VPCOMPRESSQ, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22352, 246},
+    /* 5689 */ {I_VPCOMPRESSQ, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22360, 246},
+    /* 5690 */ {I_VPCOMPRESSQ, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22368, 247},
+    /* 5691 */ {I_VPCONFLICTD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22376, 254},
+    /* 5692 */ {I_VPCONFLICTD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22384, 254},
+    /* 5693 */ {I_VPCONFLICTD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22392, 255},
+    /* 5694 */ {I_VPCONFLICTQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22400, 254},
+    /* 5695 */ {I_VPCONFLICTQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22408, 254},
+    /* 5696 */ {I_VPCONFLICTQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22416, 255},
+    /* 5697 */ {I_VPERMB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22424, 256},
+    /* 5698 */ {I_VPERMB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22432, 256},
+    /* 5699 */ {I_VPERMB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22440, 256},
+    /* 5700 */ {I_VPERMB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22448, 256},
+    /* 5701 */ {I_VPERMB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22456, 257},
+    /* 5702 */ {I_VPERMB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22464, 257},
+    /* 5703 */ {I_VPERMD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22472, 246},
+    /* 5704 */ {I_VPERMD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22480, 246},
+    /* 5705 */ {I_VPERMD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22488, 247},
+    /* 5706 */ {I_VPERMD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22496, 247},
+    /* 5707 */ {I_VPERMI2B, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22504, 256},
+    /* 5708 */ {I_VPERMI2B, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22512, 256},
+    /* 5709 */ {I_VPERMI2B, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22520, 257},
+    /* 5710 */ {I_VPERMI2D, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22528, 246},
+    /* 5711 */ {I_VPERMI2D, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22536, 246},
+    /* 5712 */ {I_VPERMI2D, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22544, 247},
+    /* 5713 */ {I_VPERMI2PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22552, 246},
+    /* 5714 */ {I_VPERMI2PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22560, 246},
+    /* 5715 */ {I_VPERMI2PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22568, 247},
+    /* 5716 */ {I_VPERMI2PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22576, 246},
+    /* 5717 */ {I_VPERMI2PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22584, 246},
+    /* 5718 */ {I_VPERMI2PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22592, 247},
+    /* 5719 */ {I_VPERMI2Q, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22600, 246},
+    /* 5720 */ {I_VPERMI2Q, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22608, 246},
+    /* 5721 */ {I_VPERMI2Q, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22616, 247},
+    /* 5722 */ {I_VPERMI2W, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22624, 250},
+    /* 5723 */ {I_VPERMI2W, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22632, 250},
+    /* 5724 */ {I_VPERMI2W, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22640, 251},
+    /* 5725 */ {I_VPERMILPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9460, 246},
+    /* 5726 */ {I_VPERMILPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9469, 246},
+    /* 5727 */ {I_VPERMILPD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9478, 247},
+    /* 5728 */ {I_VPERMILPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22648, 246},
+    /* 5729 */ {I_VPERMILPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22656, 246},
+    /* 5730 */ {I_VPERMILPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22664, 246},
+    /* 5731 */ {I_VPERMILPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22672, 246},
+    /* 5732 */ {I_VPERMILPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22680, 247},
+    /* 5733 */ {I_VPERMILPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22688, 247},
+    /* 5734 */ {I_VPERMILPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9487, 246},
+    /* 5735 */ {I_VPERMILPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9496, 246},
+    /* 5736 */ {I_VPERMILPS, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9505, 247},
+    /* 5737 */ {I_VPERMILPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22696, 246},
+    /* 5738 */ {I_VPERMILPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22704, 246},
+    /* 5739 */ {I_VPERMILPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22712, 246},
+    /* 5740 */ {I_VPERMILPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22720, 246},
+    /* 5741 */ {I_VPERMILPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22728, 247},
+    /* 5742 */ {I_VPERMILPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22736, 247},
+    /* 5743 */ {I_VPERMPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9514, 246},
+    /* 5744 */ {I_VPERMPD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9523, 247},
+    /* 5745 */ {I_VPERMPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22744, 246},
+    /* 5746 */ {I_VPERMPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22752, 246},
+    /* 5747 */ {I_VPERMPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22760, 247},
+    /* 5748 */ {I_VPERMPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22768, 247},
+    /* 5749 */ {I_VPERMPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22776, 246},
+    /* 5750 */ {I_VPERMPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22784, 246},
+    /* 5751 */ {I_VPERMPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22792, 247},
+    /* 5752 */ {I_VPERMPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22800, 247},
+    /* 5753 */ {I_VPERMQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9532, 246},
+    /* 5754 */ {I_VPERMQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9541, 247},
+    /* 5755 */ {I_VPERMQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22808, 246},
+    /* 5756 */ {I_VPERMQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22816, 246},
+    /* 5757 */ {I_VPERMQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22824, 247},
+    /* 5758 */ {I_VPERMQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22832, 247},
+    /* 5759 */ {I_VPERMT2B, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22840, 256},
+    /* 5760 */ {I_VPERMT2B, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22848, 256},
+    /* 5761 */ {I_VPERMT2B, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22856, 257},
+    /* 5762 */ {I_VPERMT2D, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22864, 246},
+    /* 5763 */ {I_VPERMT2D, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22872, 246},
+    /* 5764 */ {I_VPERMT2D, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22880, 247},
+    /* 5765 */ {I_VPERMT2PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22888, 246},
+    /* 5766 */ {I_VPERMT2PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22896, 246},
+    /* 5767 */ {I_VPERMT2PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22904, 247},
+    /* 5768 */ {I_VPERMT2PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22912, 246},
+    /* 5769 */ {I_VPERMT2PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22920, 246},
+    /* 5770 */ {I_VPERMT2PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22928, 247},
+    /* 5771 */ {I_VPERMT2Q, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22936, 246},
+    /* 5772 */ {I_VPERMT2Q, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22944, 246},
+    /* 5773 */ {I_VPERMT2Q, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22952, 247},
+    /* 5774 */ {I_VPERMT2W, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22960, 250},
+    /* 5775 */ {I_VPERMT2W, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22968, 250},
+    /* 5776 */ {I_VPERMT2W, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22976, 251},
+    /* 5777 */ {I_VPERMW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22984, 250},
+    /* 5778 */ {I_VPERMW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22992, 250},
+    /* 5779 */ {I_VPERMW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23000, 250},
+    /* 5780 */ {I_VPERMW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23008, 250},
+    /* 5781 */ {I_VPERMW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23016, 251},
+    /* 5782 */ {I_VPERMW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23024, 251},
+    /* 5783 */ {I_VPEXPANDD, 2, {XMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23032, 246},
+    /* 5784 */ {I_VPEXPANDD, 2, {YMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23040, 246},
+    /* 5785 */ {I_VPEXPANDD, 2, {ZMMREG,MEMORY|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23048, 247},
+    /* 5786 */ {I_VPEXPANDD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23032, 246},
+    /* 5787 */ {I_VPEXPANDD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23040, 246},
+    /* 5788 */ {I_VPEXPANDD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23048, 247},
+    /* 5789 */ {I_VPEXPANDQ, 2, {XMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23056, 246},
+    /* 5790 */ {I_VPEXPANDQ, 2, {YMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23064, 246},
+    /* 5791 */ {I_VPEXPANDQ, 2, {ZMMREG,MEMORY|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23072, 247},
+    /* 5792 */ {I_VPEXPANDQ, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23056, 246},
+    /* 5793 */ {I_VPEXPANDQ, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23064, 246},
+    /* 5794 */ {I_VPEXPANDQ, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23072, 247},
+    /* 5795 */ {I_VPEXTRB, 3, {REG_GPR|BITS8,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9550, 251},
+    /* 5796 */ {I_VPEXTRB, 3, {REG_GPR|BITS16,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9550, 251},
+    /* 5797 */ {I_VPEXTRB, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9550, 251},
+    /* 5798 */ {I_VPEXTRB, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9550, 251},
+    /* 5799 */ {I_VPEXTRB, 3, {MEMORY|BITS8,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9550, 251},
+    /* 5800 */ {I_VPEXTRD, 3, {RM_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9559, 249},
+    /* 5801 */ {I_VPEXTRQ, 3, {RM_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9568, 249},
+    /* 5802 */ {I_VPEXTRW, 3, {REG_GPR|BITS16,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9577, 251},
+    /* 5803 */ {I_VPEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9577, 251},
+    /* 5804 */ {I_VPEXTRW, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9577, 251},
+    /* 5805 */ {I_VPEXTRW, 3, {MEMORY|BITS16,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9577, 251},
+    /* 5806 */ {I_VPEXTRW, 3, {REG_GPR|BITS16,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9586, 251},
+    /* 5807 */ {I_VPEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9586, 251},
+    /* 5808 */ {I_VPEXTRW, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9586, 251},
+    /* 5809 */ {I_VPGATHERDD, 2, {XMMREG,XMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9595, 246},
+    /* 5810 */ {I_VPGATHERDD, 2, {YMMREG,YMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9604, 246},
+    /* 5811 */ {I_VPGATHERDD, 2, {ZMMREG,ZMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9613, 247},
+    /* 5812 */ {I_VPGATHERDQ, 2, {XMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9622, 246},
+    /* 5813 */ {I_VPGATHERDQ, 2, {YMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9631, 246},
+    /* 5814 */ {I_VPGATHERDQ, 2, {ZMMREG,YMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9640, 247},
+    /* 5815 */ {I_VPGATHERQD, 2, {XMMREG,XMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9649, 246},
+    /* 5816 */ {I_VPGATHERQD, 2, {XMMREG,YMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9658, 246},
+    /* 5817 */ {I_VPGATHERQD, 2, {YMMREG,ZMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9667, 247},
+    /* 5818 */ {I_VPGATHERQQ, 2, {XMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9676, 246},
+    /* 5819 */ {I_VPGATHERQQ, 2, {YMMREG,YMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9685, 246},
+    /* 5820 */ {I_VPGATHERQQ, 2, {ZMMREG,ZMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9694, 247},
+    /* 5821 */ {I_VPINSRB, 4, {XMMREG,XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+9703, 251},
+    /* 5822 */ {I_VPINSRB, 3, {XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9712, 251},
+    /* 5823 */ {I_VPINSRB, 4, {XMMREG,XMMREG,MEMORY|BITS8,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+9703, 251},
+    /* 5824 */ {I_VPINSRB, 3, {XMMREG,MEMORY|BITS8,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9712, 251},
+    /* 5825 */ {I_VPINSRD, 4, {XMMREG,XMMREG,RM_GPR|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+9721, 249},
+    /* 5826 */ {I_VPINSRD, 3, {XMMREG,RM_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9730, 249},
+    /* 5827 */ {I_VPINSRQ, 4, {XMMREG,XMMREG,RM_GPR|BITS64,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+9739, 249},
+    /* 5828 */ {I_VPINSRQ, 3, {XMMREG,RM_GPR|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9748, 249},
+    /* 5829 */ {I_VPINSRW, 4, {XMMREG,XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+9757, 251},
+    /* 5830 */ {I_VPINSRW, 3, {XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9766, 251},
+    /* 5831 */ {I_VPINSRW, 4, {XMMREG,XMMREG,MEMORY|BITS16,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+9757, 251},
+    /* 5832 */ {I_VPINSRW, 3, {XMMREG,MEMORY|BITS16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9766, 251},
+    /* 5833 */ {I_VPLZCNTD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23080, 254},
+    /* 5834 */ {I_VPLZCNTD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23088, 254},
+    /* 5835 */ {I_VPLZCNTD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23096, 255},
+    /* 5836 */ {I_VPLZCNTQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23104, 254},
+    /* 5837 */ {I_VPLZCNTQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23112, 254},
+    /* 5838 */ {I_VPLZCNTQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23120, 255},
+    /* 5839 */ {I_VPMADD52HUQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23128, 258},
+    /* 5840 */ {I_VPMADD52HUQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23136, 258},
+    /* 5841 */ {I_VPMADD52HUQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23144, 259},
+    /* 5842 */ {I_VPMADD52LUQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23152, 258},
+    /* 5843 */ {I_VPMADD52LUQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23160, 258},
+    /* 5844 */ {I_VPMADD52LUQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23168, 259},
+    /* 5845 */ {I_VPMADDUBSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23176, 250},
+    /* 5846 */ {I_VPMADDUBSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23184, 250},
+    /* 5847 */ {I_VPMADDUBSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23192, 250},
+    /* 5848 */ {I_VPMADDUBSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23200, 250},
+    /* 5849 */ {I_VPMADDUBSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23208, 251},
+    /* 5850 */ {I_VPMADDUBSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23216, 251},
+    /* 5851 */ {I_VPMADDWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23224, 250},
+    /* 5852 */ {I_VPMADDWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23232, 250},
+    /* 5853 */ {I_VPMADDWD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23240, 250},
+    /* 5854 */ {I_VPMADDWD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23248, 250},
+    /* 5855 */ {I_VPMADDWD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23256, 251},
+    /* 5856 */ {I_VPMADDWD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23264, 251},
+    /* 5857 */ {I_VPMAXSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23272, 250},
+    /* 5858 */ {I_VPMAXSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23280, 250},
+    /* 5859 */ {I_VPMAXSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23288, 250},
+    /* 5860 */ {I_VPMAXSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23296, 250},
+    /* 5861 */ {I_VPMAXSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23304, 251},
+    /* 5862 */ {I_VPMAXSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23312, 251},
+    /* 5863 */ {I_VPMAXSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23320, 246},
+    /* 5864 */ {I_VPMAXSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23328, 246},
+    /* 5865 */ {I_VPMAXSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23336, 246},
+    /* 5866 */ {I_VPMAXSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23344, 246},
+    /* 5867 */ {I_VPMAXSD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23352, 247},
+    /* 5868 */ {I_VPMAXSD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23360, 247},
+    /* 5869 */ {I_VPMAXSQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23368, 246},
+    /* 5870 */ {I_VPMAXSQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23376, 246},
+    /* 5871 */ {I_VPMAXSQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23384, 246},
+    /* 5872 */ {I_VPMAXSQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23392, 246},
+    /* 5873 */ {I_VPMAXSQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23400, 247},
+    /* 5874 */ {I_VPMAXSQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23408, 247},
+    /* 5875 */ {I_VPMAXSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23416, 250},
+    /* 5876 */ {I_VPMAXSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23424, 250},
+    /* 5877 */ {I_VPMAXSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23432, 250},
+    /* 5878 */ {I_VPMAXSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23440, 250},
+    /* 5879 */ {I_VPMAXSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23448, 251},
+    /* 5880 */ {I_VPMAXSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23456, 251},
+    /* 5881 */ {I_VPMAXUB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23464, 250},
+    /* 5882 */ {I_VPMAXUB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23472, 250},
+    /* 5883 */ {I_VPMAXUB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23480, 250},
+    /* 5884 */ {I_VPMAXUB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23488, 250},
+    /* 5885 */ {I_VPMAXUB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23496, 251},
+    /* 5886 */ {I_VPMAXUB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23504, 251},
+    /* 5887 */ {I_VPMAXUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23512, 246},
+    /* 5888 */ {I_VPMAXUD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23520, 246},
+    /* 5889 */ {I_VPMAXUD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23528, 246},
+    /* 5890 */ {I_VPMAXUD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23536, 246},
+    /* 5891 */ {I_VPMAXUD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23544, 247},
+    /* 5892 */ {I_VPMAXUD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23552, 247},
+    /* 5893 */ {I_VPMAXUQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23560, 246},
+    /* 5894 */ {I_VPMAXUQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23568, 246},
+    /* 5895 */ {I_VPMAXUQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23576, 246},
+    /* 5896 */ {I_VPMAXUQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23584, 246},
+    /* 5897 */ {I_VPMAXUQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23592, 247},
+    /* 5898 */ {I_VPMAXUQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23600, 247},
+    /* 5899 */ {I_VPMAXUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23608, 250},
+    /* 5900 */ {I_VPMAXUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23616, 250},
+    /* 5901 */ {I_VPMAXUW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23624, 250},
+    /* 5902 */ {I_VPMAXUW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23632, 250},
+    /* 5903 */ {I_VPMAXUW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23640, 251},
+    /* 5904 */ {I_VPMAXUW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23648, 251},
+    /* 5905 */ {I_VPMINSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23656, 250},
+    /* 5906 */ {I_VPMINSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23664, 250},
+    /* 5907 */ {I_VPMINSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23672, 250},
+    /* 5908 */ {I_VPMINSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23680, 250},
+    /* 5909 */ {I_VPMINSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23688, 251},
+    /* 5910 */ {I_VPMINSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23696, 251},
+    /* 5911 */ {I_VPMINSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23704, 246},
+    /* 5912 */ {I_VPMINSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23712, 246},
+    /* 5913 */ {I_VPMINSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23720, 246},
+    /* 5914 */ {I_VPMINSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23728, 246},
+    /* 5915 */ {I_VPMINSD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23736, 247},
+    /* 5916 */ {I_VPMINSD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23744, 247},
+    /* 5917 */ {I_VPMINSQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23752, 246},
+    /* 5918 */ {I_VPMINSQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23760, 246},
+    /* 5919 */ {I_VPMINSQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23768, 246},
+    /* 5920 */ {I_VPMINSQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23776, 246},
+    /* 5921 */ {I_VPMINSQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23784, 247},
+    /* 5922 */ {I_VPMINSQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23792, 247},
+    /* 5923 */ {I_VPMINSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23800, 250},
+    /* 5924 */ {I_VPMINSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23808, 250},
+    /* 5925 */ {I_VPMINSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23816, 250},
+    /* 5926 */ {I_VPMINSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23824, 250},
+    /* 5927 */ {I_VPMINSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23832, 251},
+    /* 5928 */ {I_VPMINSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23840, 251},
+    /* 5929 */ {I_VPMINUB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23848, 250},
+    /* 5930 */ {I_VPMINUB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23856, 250},
+    /* 5931 */ {I_VPMINUB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23864, 250},
+    /* 5932 */ {I_VPMINUB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23872, 250},
+    /* 5933 */ {I_VPMINUB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23880, 251},
+    /* 5934 */ {I_VPMINUB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23888, 251},
+    /* 5935 */ {I_VPMINUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23896, 246},
+    /* 5936 */ {I_VPMINUD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23904, 246},
+    /* 5937 */ {I_VPMINUD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23912, 246},
+    /* 5938 */ {I_VPMINUD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23920, 246},
+    /* 5939 */ {I_VPMINUD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23928, 247},
+    /* 5940 */ {I_VPMINUD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23936, 247},
+    /* 5941 */ {I_VPMINUQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23944, 246},
+    /* 5942 */ {I_VPMINUQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23952, 246},
+    /* 5943 */ {I_VPMINUQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23960, 246},
+    /* 5944 */ {I_VPMINUQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23968, 246},
+    /* 5945 */ {I_VPMINUQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23976, 247},
+    /* 5946 */ {I_VPMINUQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23984, 247},
+    /* 5947 */ {I_VPMINUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23992, 250},
+    /* 5948 */ {I_VPMINUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24000, 250},
+    /* 5949 */ {I_VPMINUW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24008, 250},
+    /* 5950 */ {I_VPMINUW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24016, 250},
+    /* 5951 */ {I_VPMINUW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24024, 251},
+    /* 5952 */ {I_VPMINUW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24032, 251},
+    /* 5953 */ {I_VPMOVB2M, 2, {KREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24040, 250},
+    /* 5954 */ {I_VPMOVB2M, 2, {KREG,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24048, 250},
+    /* 5955 */ {I_VPMOVB2M, 2, {KREG,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24056, 251},
+    /* 5956 */ {I_VPMOVD2M, 2, {KREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24064, 248},
+    /* 5957 */ {I_VPMOVD2M, 2, {KREG,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24072, 248},
+    /* 5958 */ {I_VPMOVD2M, 2, {KREG,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24080, 249},
+    /* 5959 */ {I_VPMOVDB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24088, 246},
+    /* 5960 */ {I_VPMOVDB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24096, 246},
+    /* 5961 */ {I_VPMOVDB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24104, 247},
+    /* 5962 */ {I_VPMOVDB, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24112, 246},
+    /* 5963 */ {I_VPMOVDB, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24120, 246},
+    /* 5964 */ {I_VPMOVDB, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24128, 247},
+    /* 5965 */ {I_VPMOVDW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24136, 246},
+    /* 5966 */ {I_VPMOVDW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24144, 246},
+    /* 5967 */ {I_VPMOVDW, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24152, 247},
+    /* 5968 */ {I_VPMOVDW, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24160, 246},
+    /* 5969 */ {I_VPMOVDW, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24168, 246},
+    /* 5970 */ {I_VPMOVDW, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24176, 247},
+    /* 5971 */ {I_VPMOVM2B, 2, {XMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24184, 250},
+    /* 5972 */ {I_VPMOVM2B, 2, {YMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24192, 250},
+    /* 5973 */ {I_VPMOVM2B, 2, {ZMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24200, 251},
+    /* 5974 */ {I_VPMOVM2D, 2, {XMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24208, 248},
+    /* 5975 */ {I_VPMOVM2D, 2, {YMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24216, 248},
+    /* 5976 */ {I_VPMOVM2D, 2, {ZMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24224, 249},
+    /* 5977 */ {I_VPMOVM2Q, 2, {XMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24232, 248},
+    /* 5978 */ {I_VPMOVM2Q, 2, {YMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24240, 248},
+    /* 5979 */ {I_VPMOVM2Q, 2, {ZMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24248, 249},
+    /* 5980 */ {I_VPMOVM2W, 2, {XMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24256, 250},
+    /* 5981 */ {I_VPMOVM2W, 2, {YMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24264, 250},
+    /* 5982 */ {I_VPMOVM2W, 2, {ZMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24272, 251},
+    /* 5983 */ {I_VPMOVQ2M, 2, {KREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24280, 248},
+    /* 5984 */ {I_VPMOVQ2M, 2, {KREG,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24288, 248},
+    /* 5985 */ {I_VPMOVQ2M, 2, {KREG,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24296, 249},
+    /* 5986 */ {I_VPMOVQB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24304, 246},
+    /* 5987 */ {I_VPMOVQB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24312, 246},
+    /* 5988 */ {I_VPMOVQB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24320, 247},
+    /* 5989 */ {I_VPMOVQB, 2, {MEMORY|BITS16,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24328, 246},
+    /* 5990 */ {I_VPMOVQB, 2, {MEMORY|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24336, 246},
+    /* 5991 */ {I_VPMOVQB, 2, {MEMORY|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24344, 247},
+    /* 5992 */ {I_VPMOVQD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24352, 246},
+    /* 5993 */ {I_VPMOVQD, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24360, 246},
+    /* 5994 */ {I_VPMOVQD, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24368, 247},
+    /* 5995 */ {I_VPMOVQD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24376, 246},
+    /* 5996 */ {I_VPMOVQD, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24384, 246},
+    /* 5997 */ {I_VPMOVQD, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24392, 247},
+    /* 5998 */ {I_VPMOVQW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24400, 246},
+    /* 5999 */ {I_VPMOVQW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24408, 246},
+    /* 6000 */ {I_VPMOVQW, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24416, 247},
+    /* 6001 */ {I_VPMOVQW, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24424, 246},
+    /* 6002 */ {I_VPMOVQW, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24432, 246},
+    /* 6003 */ {I_VPMOVQW, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24440, 247},
+    /* 6004 */ {I_VPMOVSDB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24448, 246},
+    /* 6005 */ {I_VPMOVSDB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24456, 246},
+    /* 6006 */ {I_VPMOVSDB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24464, 247},
+    /* 6007 */ {I_VPMOVSDB, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24472, 246},
+    /* 6008 */ {I_VPMOVSDB, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24480, 246},
+    /* 6009 */ {I_VPMOVSDB, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24488, 247},
+    /* 6010 */ {I_VPMOVSDW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24496, 246},
+    /* 6011 */ {I_VPMOVSDW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24504, 246},
+    /* 6012 */ {I_VPMOVSDW, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24512, 247},
+    /* 6013 */ {I_VPMOVSDW, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24520, 246},
+    /* 6014 */ {I_VPMOVSDW, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24528, 246},
+    /* 6015 */ {I_VPMOVSDW, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24536, 247},
+    /* 6016 */ {I_VPMOVSQB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24544, 246},
+    /* 6017 */ {I_VPMOVSQB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24552, 246},
+    /* 6018 */ {I_VPMOVSQB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24560, 247},
+    /* 6019 */ {I_VPMOVSQB, 2, {MEMORY|BITS16,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24568, 246},
+    /* 6020 */ {I_VPMOVSQB, 2, {MEMORY|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24576, 246},
+    /* 6021 */ {I_VPMOVSQB, 2, {MEMORY|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24584, 247},
+    /* 6022 */ {I_VPMOVSQD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24592, 246},
+    /* 6023 */ {I_VPMOVSQD, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24600, 246},
+    /* 6024 */ {I_VPMOVSQD, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24608, 247},
+    /* 6025 */ {I_VPMOVSQD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24616, 246},
+    /* 6026 */ {I_VPMOVSQD, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24624, 246},
+    /* 6027 */ {I_VPMOVSQD, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24632, 247},
+    /* 6028 */ {I_VPMOVSQW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24640, 246},
+    /* 6029 */ {I_VPMOVSQW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24648, 246},
+    /* 6030 */ {I_VPMOVSQW, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24656, 247},
+    /* 6031 */ {I_VPMOVSQW, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24664, 246},
+    /* 6032 */ {I_VPMOVSQW, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24672, 246},
+    /* 6033 */ {I_VPMOVSQW, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24680, 247},
+    /* 6034 */ {I_VPMOVSWB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24688, 250},
+    /* 6035 */ {I_VPMOVSWB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24696, 250},
+    /* 6036 */ {I_VPMOVSWB, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24704, 251},
+    /* 6037 */ {I_VPMOVSWB, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24712, 250},
+    /* 6038 */ {I_VPMOVSWB, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24720, 250},
+    /* 6039 */ {I_VPMOVSWB, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24728, 251},
+    /* 6040 */ {I_VPMOVSXBD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24736, 246},
+    /* 6041 */ {I_VPMOVSXBD, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24744, 246},
+    /* 6042 */ {I_VPMOVSXBD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24752, 247},
+    /* 6043 */ {I_VPMOVSXBQ, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24760, 246},
+    /* 6044 */ {I_VPMOVSXBQ, 2, {YMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24768, 246},
+    /* 6045 */ {I_VPMOVSXBQ, 2, {ZMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24776, 247},
+    /* 6046 */ {I_VPMOVSXBW, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24784, 250},
+    /* 6047 */ {I_VPMOVSXBW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24792, 250},
+    /* 6048 */ {I_VPMOVSXBW, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24800, 251},
+    /* 6049 */ {I_VPMOVSXDQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24808, 246},
+    /* 6050 */ {I_VPMOVSXDQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24816, 246},
+    /* 6051 */ {I_VPMOVSXDQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24824, 247},
+    /* 6052 */ {I_VPMOVSXWD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24832, 246},
+    /* 6053 */ {I_VPMOVSXWD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24840, 246},
+    /* 6054 */ {I_VPMOVSXWD, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24848, 247},
+    /* 6055 */ {I_VPMOVSXWQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24856, 246},
+    /* 6056 */ {I_VPMOVSXWQ, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24864, 246},
+    /* 6057 */ {I_VPMOVSXWQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24872, 247},
+    /* 6058 */ {I_VPMOVUSDB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24880, 246},
+    /* 6059 */ {I_VPMOVUSDB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24888, 246},
+    /* 6060 */ {I_VPMOVUSDB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24896, 247},
+    /* 6061 */ {I_VPMOVUSDB, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24904, 246},
+    /* 6062 */ {I_VPMOVUSDB, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24912, 246},
+    /* 6063 */ {I_VPMOVUSDB, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24920, 247},
+    /* 6064 */ {I_VPMOVUSDW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24928, 246},
+    /* 6065 */ {I_VPMOVUSDW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24936, 246},
+    /* 6066 */ {I_VPMOVUSDW, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24944, 247},
+    /* 6067 */ {I_VPMOVUSDW, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24952, 246},
+    /* 6068 */ {I_VPMOVUSDW, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24960, 246},
+    /* 6069 */ {I_VPMOVUSDW, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24968, 247},
+    /* 6070 */ {I_VPMOVUSQB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24976, 246},
+    /* 6071 */ {I_VPMOVUSQB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24984, 246},
+    /* 6072 */ {I_VPMOVUSQB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24992, 247},
+    /* 6073 */ {I_VPMOVUSQB, 2, {MEMORY|BITS16,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25000, 246},
+    /* 6074 */ {I_VPMOVUSQB, 2, {MEMORY|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25008, 246},
+    /* 6075 */ {I_VPMOVUSQB, 2, {MEMORY|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25016, 247},
+    /* 6076 */ {I_VPMOVUSQD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25024, 246},
+    /* 6077 */ {I_VPMOVUSQD, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25032, 246},
+    /* 6078 */ {I_VPMOVUSQD, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25040, 247},
+    /* 6079 */ {I_VPMOVUSQD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25048, 246},
+    /* 6080 */ {I_VPMOVUSQD, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25056, 246},
+    /* 6081 */ {I_VPMOVUSQD, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25064, 247},
+    /* 6082 */ {I_VPMOVUSQW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25072, 246},
+    /* 6083 */ {I_VPMOVUSQW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25080, 246},
+    /* 6084 */ {I_VPMOVUSQW, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25088, 247},
+    /* 6085 */ {I_VPMOVUSQW, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25096, 246},
+    /* 6086 */ {I_VPMOVUSQW, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25104, 246},
+    /* 6087 */ {I_VPMOVUSQW, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25112, 247},
+    /* 6088 */ {I_VPMOVUSWB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25120, 250},
+    /* 6089 */ {I_VPMOVUSWB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25128, 250},
+    /* 6090 */ {I_VPMOVUSWB, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25136, 251},
+    /* 6091 */ {I_VPMOVUSWB, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25144, 250},
+    /* 6092 */ {I_VPMOVUSWB, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25152, 250},
+    /* 6093 */ {I_VPMOVUSWB, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25160, 251},
+    /* 6094 */ {I_VPMOVW2M, 2, {KREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+25168, 250},
+    /* 6095 */ {I_VPMOVW2M, 2, {KREG,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+25176, 250},
+    /* 6096 */ {I_VPMOVW2M, 2, {KREG,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+25184, 251},
+    /* 6097 */ {I_VPMOVWB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25192, 250},
+    /* 6098 */ {I_VPMOVWB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25200, 250},
+    /* 6099 */ {I_VPMOVWB, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25208, 251},
+    /* 6100 */ {I_VPMOVWB, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25216, 250},
+    /* 6101 */ {I_VPMOVWB, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25224, 250},
+    /* 6102 */ {I_VPMOVWB, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25232, 251},
+    /* 6103 */ {I_VPMOVZXBD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25240, 246},
+    /* 6104 */ {I_VPMOVZXBD, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25248, 246},
+    /* 6105 */ {I_VPMOVZXBD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25256, 247},
+    /* 6106 */ {I_VPMOVZXBQ, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25264, 246},
+    /* 6107 */ {I_VPMOVZXBQ, 2, {YMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25272, 246},
+    /* 6108 */ {I_VPMOVZXBQ, 2, {ZMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25280, 247},
+    /* 6109 */ {I_VPMOVZXBW, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25288, 250},
+    /* 6110 */ {I_VPMOVZXBW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25296, 250},
+    /* 6111 */ {I_VPMOVZXBW, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25304, 251},
+    /* 6112 */ {I_VPMOVZXDQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25312, 246},
+    /* 6113 */ {I_VPMOVZXDQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25320, 246},
+    /* 6114 */ {I_VPMOVZXDQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25328, 247},
+    /* 6115 */ {I_VPMOVZXWD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25336, 246},
+    /* 6116 */ {I_VPMOVZXWD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25344, 246},
+    /* 6117 */ {I_VPMOVZXWD, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25352, 247},
+    /* 6118 */ {I_VPMOVZXWQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25360, 246},
+    /* 6119 */ {I_VPMOVZXWQ, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25368, 246},
+    /* 6120 */ {I_VPMOVZXWQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25376, 247},
+    /* 6121 */ {I_VPMULDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25384, 246},
+    /* 6122 */ {I_VPMULDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25392, 246},
+    /* 6123 */ {I_VPMULDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25400, 246},
+    /* 6124 */ {I_VPMULDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25408, 246},
+    /* 6125 */ {I_VPMULDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25416, 247},
+    /* 6126 */ {I_VPMULDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25424, 247},
+    /* 6127 */ {I_VPMULHRSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25432, 250},
+    /* 6128 */ {I_VPMULHRSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25440, 250},
+    /* 6129 */ {I_VPMULHRSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25448, 250},
+    /* 6130 */ {I_VPMULHRSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25456, 250},
+    /* 6131 */ {I_VPMULHRSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25464, 251},
+    /* 6132 */ {I_VPMULHRSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25472, 251},
+    /* 6133 */ {I_VPMULHUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25480, 250},
+    /* 6134 */ {I_VPMULHUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25488, 250},
+    /* 6135 */ {I_VPMULHUW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25496, 250},
+    /* 6136 */ {I_VPMULHUW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25504, 250},
+    /* 6137 */ {I_VPMULHUW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25512, 251},
+    /* 6138 */ {I_VPMULHUW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25520, 251},
+    /* 6139 */ {I_VPMULHW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25528, 250},
+    /* 6140 */ {I_VPMULHW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25536, 250},
+    /* 6141 */ {I_VPMULHW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25544, 250},
+    /* 6142 */ {I_VPMULHW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25552, 250},
+    /* 6143 */ {I_VPMULHW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25560, 251},
+    /* 6144 */ {I_VPMULHW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25568, 251},
+    /* 6145 */ {I_VPMULLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25576, 246},
+    /* 6146 */ {I_VPMULLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25584, 246},
+    /* 6147 */ {I_VPMULLD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25592, 246},
+    /* 6148 */ {I_VPMULLD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25600, 246},
+    /* 6149 */ {I_VPMULLD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25608, 247},
+    /* 6150 */ {I_VPMULLD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25616, 247},
+    /* 6151 */ {I_VPMULLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25624, 248},
+    /* 6152 */ {I_VPMULLQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25632, 248},
+    /* 6153 */ {I_VPMULLQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25640, 248},
+    /* 6154 */ {I_VPMULLQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25648, 248},
+    /* 6155 */ {I_VPMULLQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25656, 249},
+    /* 6156 */ {I_VPMULLQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25664, 249},
+    /* 6157 */ {I_VPMULLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25672, 250},
+    /* 6158 */ {I_VPMULLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25680, 250},
+    /* 6159 */ {I_VPMULLW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25688, 250},
+    /* 6160 */ {I_VPMULLW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25696, 250},
+    /* 6161 */ {I_VPMULLW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25704, 251},
+    /* 6162 */ {I_VPMULLW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25712, 251},
+    /* 6163 */ {I_VPMULTISHIFTQB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25720, 256},
+    /* 6164 */ {I_VPMULTISHIFTQB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25728, 256},
+    /* 6165 */ {I_VPMULTISHIFTQB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25736, 256},
+    /* 6166 */ {I_VPMULTISHIFTQB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25744, 256},
+    /* 6167 */ {I_VPMULTISHIFTQB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25752, 257},
+    /* 6168 */ {I_VPMULTISHIFTQB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25760, 257},
+    /* 6169 */ {I_VPMULUDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25768, 246},
+    /* 6170 */ {I_VPMULUDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25776, 246},
+    /* 6171 */ {I_VPMULUDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25784, 246},
+    /* 6172 */ {I_VPMULUDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25792, 246},
+    /* 6173 */ {I_VPMULUDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25800, 247},
+    /* 6174 */ {I_VPMULUDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25808, 247},
+    /* 6175 */ {I_VPORD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25816, 246},
+    /* 6176 */ {I_VPORD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25824, 246},
+    /* 6177 */ {I_VPORD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25832, 246},
+    /* 6178 */ {I_VPORD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25840, 246},
+    /* 6179 */ {I_VPORD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25848, 247},
+    /* 6180 */ {I_VPORD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25856, 247},
+    /* 6181 */ {I_VPORQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25864, 246},
+    /* 6182 */ {I_VPORQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25872, 246},
+    /* 6183 */ {I_VPORQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25880, 246},
+    /* 6184 */ {I_VPORQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25888, 246},
+    /* 6185 */ {I_VPORQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25896, 247},
+    /* 6186 */ {I_VPORQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25904, 247},
+    /* 6187 */ {I_VPROLD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9775, 246},
+    /* 6188 */ {I_VPROLD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9784, 246},
+    /* 6189 */ {I_VPROLD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9793, 246},
+    /* 6190 */ {I_VPROLD, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9802, 246},
+    /* 6191 */ {I_VPROLD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9811, 247},
+    /* 6192 */ {I_VPROLD, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9820, 247},
+    /* 6193 */ {I_VPROLQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9829, 246},
+    /* 6194 */ {I_VPROLQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9838, 246},
+    /* 6195 */ {I_VPROLQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9847, 246},
+    /* 6196 */ {I_VPROLQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9856, 246},
+    /* 6197 */ {I_VPROLQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9865, 247},
+    /* 6198 */ {I_VPROLQ, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9874, 247},
+    /* 6199 */ {I_VPROLVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25912, 246},
+    /* 6200 */ {I_VPROLVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25920, 246},
+    /* 6201 */ {I_VPROLVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25928, 246},
+    /* 6202 */ {I_VPROLVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25936, 246},
+    /* 6203 */ {I_VPROLVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25944, 247},
+    /* 6204 */ {I_VPROLVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25952, 247},
+    /* 6205 */ {I_VPROLVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25960, 246},
+    /* 6206 */ {I_VPROLVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25968, 246},
+    /* 6207 */ {I_VPROLVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25976, 246},
+    /* 6208 */ {I_VPROLVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25984, 246},
+    /* 6209 */ {I_VPROLVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25992, 247},
+    /* 6210 */ {I_VPROLVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26000, 247},
+    /* 6211 */ {I_VPRORD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9883, 246},
+    /* 6212 */ {I_VPRORD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9892, 246},
+    /* 6213 */ {I_VPRORD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9901, 246},
+    /* 6214 */ {I_VPRORD, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9910, 246},
+    /* 6215 */ {I_VPRORD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9919, 247},
+    /* 6216 */ {I_VPRORD, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9928, 247},
+    /* 6217 */ {I_VPRORQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9937, 246},
+    /* 6218 */ {I_VPRORQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9946, 246},
+    /* 6219 */ {I_VPRORQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9955, 246},
+    /* 6220 */ {I_VPRORQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9964, 246},
+    /* 6221 */ {I_VPRORQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9973, 247},
+    /* 6222 */ {I_VPRORQ, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9982, 247},
+    /* 6223 */ {I_VPRORVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26008, 246},
+    /* 6224 */ {I_VPRORVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26016, 246},
+    /* 6225 */ {I_VPRORVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26024, 246},
+    /* 6226 */ {I_VPRORVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26032, 246},
+    /* 6227 */ {I_VPRORVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26040, 247},
+    /* 6228 */ {I_VPRORVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26048, 247},
+    /* 6229 */ {I_VPRORVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26056, 246},
+    /* 6230 */ {I_VPRORVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26064, 246},
+    /* 6231 */ {I_VPRORVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26072, 246},
+    /* 6232 */ {I_VPRORVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26080, 246},
+    /* 6233 */ {I_VPRORVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26088, 247},
+    /* 6234 */ {I_VPRORVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26096, 247},
+    /* 6235 */ {I_VPSADBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+26104, 250},
+    /* 6236 */ {I_VPSADBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+26112, 250},
+    /* 6237 */ {I_VPSADBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+26120, 250},
+    /* 6238 */ {I_VPSADBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+26128, 250},
+    /* 6239 */ {I_VPSADBW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+26136, 251},
+    /* 6240 */ {I_VPSADBW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+26144, 251},
+    /* 6241 */ {I_VPSCATTERDD, 2, {XMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9991, 246},
+    /* 6242 */ {I_VPSCATTERDD, 2, {YMEM|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10000, 246},
+    /* 6243 */ {I_VPSCATTERDD, 2, {ZMEM|BITS32,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10009, 247},
+    /* 6244 */ {I_VPSCATTERDQ, 2, {XMEM|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10018, 246},
+    /* 6245 */ {I_VPSCATTERDQ, 2, {XMEM|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10027, 246},
+    /* 6246 */ {I_VPSCATTERDQ, 2, {YMEM|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10036, 247},
+    /* 6247 */ {I_VPSCATTERQD, 2, {XMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10045, 246},
+    /* 6248 */ {I_VPSCATTERQD, 2, {YMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10054, 246},
+    /* 6249 */ {I_VPSCATTERQD, 2, {ZMEM|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10063, 247},
+    /* 6250 */ {I_VPSCATTERQQ, 2, {XMEM|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10072, 246},
+    /* 6251 */ {I_VPSCATTERQQ, 2, {YMEM|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10081, 246},
+    /* 6252 */ {I_VPSCATTERQQ, 2, {ZMEM|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10090, 247},
+    /* 6253 */ {I_VPSHUFB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26152, 250},
+    /* 6254 */ {I_VPSHUFB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26160, 250},
+    /* 6255 */ {I_VPSHUFB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26168, 250},
+    /* 6256 */ {I_VPSHUFB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26176, 250},
+    /* 6257 */ {I_VPSHUFB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26184, 251},
+    /* 6258 */ {I_VPSHUFB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26192, 251},
+    /* 6259 */ {I_VPSHUFD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10099, 246},
+    /* 6260 */ {I_VPSHUFD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10108, 246},
+    /* 6261 */ {I_VPSHUFD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10117, 247},
+    /* 6262 */ {I_VPSHUFHW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10126, 250},
+    /* 6263 */ {I_VPSHUFHW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10135, 250},
+    /* 6264 */ {I_VPSHUFHW, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10144, 251},
+    /* 6265 */ {I_VPSHUFLW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10153, 250},
+    /* 6266 */ {I_VPSHUFLW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10162, 250},
+    /* 6267 */ {I_VPSHUFLW, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10171, 251},
+    /* 6268 */ {I_VPSLLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26200, 246},
+    /* 6269 */ {I_VPSLLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26208, 246},
+    /* 6270 */ {I_VPSLLD, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26216, 246},
+    /* 6271 */ {I_VPSLLD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26224, 246},
+    /* 6272 */ {I_VPSLLD, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26232, 247},
+    /* 6273 */ {I_VPSLLD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26240, 247},
+    /* 6274 */ {I_VPSLLD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10180, 246},
+    /* 6275 */ {I_VPSLLD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10189, 246},
+    /* 6276 */ {I_VPSLLD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10198, 246},
+    /* 6277 */ {I_VPSLLD, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10207, 246},
+    /* 6278 */ {I_VPSLLD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10216, 247},
+    /* 6279 */ {I_VPSLLD, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10225, 247},
+    /* 6280 */ {I_VPSLLDQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10234, 250},
+    /* 6281 */ {I_VPSLLDQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10243, 250},
+    /* 6282 */ {I_VPSLLDQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10252, 250},
+    /* 6283 */ {I_VPSLLDQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10261, 250},
+    /* 6284 */ {I_VPSLLDQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10270, 251},
+    /* 6285 */ {I_VPSLLDQ, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10279, 251},
+    /* 6286 */ {I_VPSLLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26248, 246},
+    /* 6287 */ {I_VPSLLQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26256, 246},
+    /* 6288 */ {I_VPSLLQ, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26264, 246},
+    /* 6289 */ {I_VPSLLQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26272, 246},
+    /* 6290 */ {I_VPSLLQ, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26280, 247},
+    /* 6291 */ {I_VPSLLQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26288, 247},
+    /* 6292 */ {I_VPSLLQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10288, 246},
+    /* 6293 */ {I_VPSLLQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10297, 246},
+    /* 6294 */ {I_VPSLLQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10306, 246},
+    /* 6295 */ {I_VPSLLQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10315, 246},
+    /* 6296 */ {I_VPSLLQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10324, 247},
+    /* 6297 */ {I_VPSLLQ, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10333, 247},
+    /* 6298 */ {I_VPSLLVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26296, 246},
+    /* 6299 */ {I_VPSLLVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26304, 246},
+    /* 6300 */ {I_VPSLLVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26312, 246},
+    /* 6301 */ {I_VPSLLVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26320, 246},
+    /* 6302 */ {I_VPSLLVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26328, 247},
+    /* 6303 */ {I_VPSLLVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26336, 247},
+    /* 6304 */ {I_VPSLLVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26344, 246},
+    /* 6305 */ {I_VPSLLVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26352, 246},
+    /* 6306 */ {I_VPSLLVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26360, 246},
+    /* 6307 */ {I_VPSLLVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26368, 246},
+    /* 6308 */ {I_VPSLLVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26376, 247},
+    /* 6309 */ {I_VPSLLVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26384, 247},
+    /* 6310 */ {I_VPSLLVW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26392, 250},
+    /* 6311 */ {I_VPSLLVW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26400, 250},
+    /* 6312 */ {I_VPSLLVW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26408, 250},
+    /* 6313 */ {I_VPSLLVW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26416, 250},
+    /* 6314 */ {I_VPSLLVW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26424, 251},
+    /* 6315 */ {I_VPSLLVW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26432, 251},
+    /* 6316 */ {I_VPSLLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26440, 250},
+    /* 6317 */ {I_VPSLLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26448, 250},
+    /* 6318 */ {I_VPSLLW, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26456, 250},
+    /* 6319 */ {I_VPSLLW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26464, 250},
+    /* 6320 */ {I_VPSLLW, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26472, 251},
+    /* 6321 */ {I_VPSLLW, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26480, 251},
+    /* 6322 */ {I_VPSLLW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10342, 250},
+    /* 6323 */ {I_VPSLLW, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10351, 250},
+    /* 6324 */ {I_VPSLLW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10360, 250},
+    /* 6325 */ {I_VPSLLW, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10369, 250},
+    /* 6326 */ {I_VPSLLW, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10378, 251},
+    /* 6327 */ {I_VPSLLW, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10387, 251},
+    /* 6328 */ {I_VPSRAD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26488, 246},
+    /* 6329 */ {I_VPSRAD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26496, 246},
+    /* 6330 */ {I_VPSRAD, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26504, 246},
+    /* 6331 */ {I_VPSRAD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26512, 246},
+    /* 6332 */ {I_VPSRAD, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26520, 247},
+    /* 6333 */ {I_VPSRAD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26528, 247},
+    /* 6334 */ {I_VPSRAD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10396, 246},
+    /* 6335 */ {I_VPSRAD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10405, 246},
+    /* 6336 */ {I_VPSRAD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10414, 246},
+    /* 6337 */ {I_VPSRAD, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10423, 246},
+    /* 6338 */ {I_VPSRAD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10432, 247},
+    /* 6339 */ {I_VPSRAD, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10441, 247},
+    /* 6340 */ {I_VPSRAQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26536, 246},
+    /* 6341 */ {I_VPSRAQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26544, 246},
+    /* 6342 */ {I_VPSRAQ, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26552, 246},
+    /* 6343 */ {I_VPSRAQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26560, 246},
+    /* 6344 */ {I_VPSRAQ, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26568, 247},
+    /* 6345 */ {I_VPSRAQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26576, 247},
+    /* 6346 */ {I_VPSRAQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10450, 246},
+    /* 6347 */ {I_VPSRAQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10459, 246},
+    /* 6348 */ {I_VPSRAQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10468, 246},
+    /* 6349 */ {I_VPSRAQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10477, 246},
+    /* 6350 */ {I_VPSRAQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10486, 247},
+    /* 6351 */ {I_VPSRAQ, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10495, 247},
+    /* 6352 */ {I_VPSRAVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26584, 246},
+    /* 6353 */ {I_VPSRAVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26592, 246},
+    /* 6354 */ {I_VPSRAVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26600, 246},
+    /* 6355 */ {I_VPSRAVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26608, 246},
+    /* 6356 */ {I_VPSRAVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26616, 247},
+    /* 6357 */ {I_VPSRAVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26624, 247},
+    /* 6358 */ {I_VPSRAVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26632, 246},
+    /* 6359 */ {I_VPSRAVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26640, 246},
+    /* 6360 */ {I_VPSRAVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26648, 246},
+    /* 6361 */ {I_VPSRAVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26656, 246},
+    /* 6362 */ {I_VPSRAVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26664, 247},
+    /* 6363 */ {I_VPSRAVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26672, 247},
+    /* 6364 */ {I_VPSRAVW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26680, 250},
+    /* 6365 */ {I_VPSRAVW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26688, 250},
+    /* 6366 */ {I_VPSRAVW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26696, 250},
+    /* 6367 */ {I_VPSRAVW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26704, 250},
+    /* 6368 */ {I_VPSRAVW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26712, 251},
+    /* 6369 */ {I_VPSRAVW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26720, 251},
+    /* 6370 */ {I_VPSRAW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26728, 250},
+    /* 6371 */ {I_VPSRAW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26736, 250},
+    /* 6372 */ {I_VPSRAW, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26744, 250},
+    /* 6373 */ {I_VPSRAW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26752, 250},
+    /* 6374 */ {I_VPSRAW, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26760, 251},
+    /* 6375 */ {I_VPSRAW, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26768, 251},
+    /* 6376 */ {I_VPSRAW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10504, 250},
+    /* 6377 */ {I_VPSRAW, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10513, 250},
+    /* 6378 */ {I_VPSRAW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10522, 250},
+    /* 6379 */ {I_VPSRAW, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10531, 250},
+    /* 6380 */ {I_VPSRAW, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10540, 251},
+    /* 6381 */ {I_VPSRAW, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10549, 251},
+    /* 6382 */ {I_VPSRLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26776, 246},
+    /* 6383 */ {I_VPSRLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26784, 246},
+    /* 6384 */ {I_VPSRLD, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26792, 246},
+    /* 6385 */ {I_VPSRLD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26800, 246},
+    /* 6386 */ {I_VPSRLD, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26808, 247},
+    /* 6387 */ {I_VPSRLD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26816, 247},
+    /* 6388 */ {I_VPSRLD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10558, 246},
+    /* 6389 */ {I_VPSRLD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10567, 246},
+    /* 6390 */ {I_VPSRLD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10576, 246},
+    /* 6391 */ {I_VPSRLD, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10585, 246},
+    /* 6392 */ {I_VPSRLD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10594, 247},
+    /* 6393 */ {I_VPSRLD, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10603, 247},
+    /* 6394 */ {I_VPSRLDQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10612, 250},
+    /* 6395 */ {I_VPSRLDQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10621, 250},
+    /* 6396 */ {I_VPSRLDQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10630, 250},
+    /* 6397 */ {I_VPSRLDQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10639, 250},
+    /* 6398 */ {I_VPSRLDQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10648, 251},
+    /* 6399 */ {I_VPSRLDQ, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10657, 251},
+    /* 6400 */ {I_VPSRLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26824, 246},
+    /* 6401 */ {I_VPSRLQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26832, 246},
+    /* 6402 */ {I_VPSRLQ, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26840, 246},
+    /* 6403 */ {I_VPSRLQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26848, 246},
+    /* 6404 */ {I_VPSRLQ, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26856, 247},
+    /* 6405 */ {I_VPSRLQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26864, 247},
+    /* 6406 */ {I_VPSRLQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10666, 246},
+    /* 6407 */ {I_VPSRLQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10675, 246},
+    /* 6408 */ {I_VPSRLQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10684, 246},
+    /* 6409 */ {I_VPSRLQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10693, 246},
+    /* 6410 */ {I_VPSRLQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10702, 247},
+    /* 6411 */ {I_VPSRLQ, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10711, 247},
+    /* 6412 */ {I_VPSRLVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26872, 246},
+    /* 6413 */ {I_VPSRLVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26880, 246},
+    /* 6414 */ {I_VPSRLVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26888, 246},
+    /* 6415 */ {I_VPSRLVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26896, 246},
+    /* 6416 */ {I_VPSRLVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26904, 247},
+    /* 6417 */ {I_VPSRLVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26912, 247},
+    /* 6418 */ {I_VPSRLVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26920, 246},
+    /* 6419 */ {I_VPSRLVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26928, 246},
+    /* 6420 */ {I_VPSRLVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26936, 246},
+    /* 6421 */ {I_VPSRLVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26944, 246},
+    /* 6422 */ {I_VPSRLVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26952, 247},
+    /* 6423 */ {I_VPSRLVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26960, 247},
+    /* 6424 */ {I_VPSRLVW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26968, 250},
+    /* 6425 */ {I_VPSRLVW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26976, 250},
+    /* 6426 */ {I_VPSRLVW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26984, 250},
+    /* 6427 */ {I_VPSRLVW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26992, 250},
+    /* 6428 */ {I_VPSRLVW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27000, 251},
+    /* 6429 */ {I_VPSRLVW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27008, 251},
+    /* 6430 */ {I_VPSRLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27016, 250},
+    /* 6431 */ {I_VPSRLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27024, 250},
+    /* 6432 */ {I_VPSRLW, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27032, 250},
+    /* 6433 */ {I_VPSRLW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27040, 250},
+    /* 6434 */ {I_VPSRLW, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27048, 251},
+    /* 6435 */ {I_VPSRLW, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27056, 251},
+    /* 6436 */ {I_VPSRLW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10720, 250},
+    /* 6437 */ {I_VPSRLW, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10729, 250},
+    /* 6438 */ {I_VPSRLW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10738, 250},
+    /* 6439 */ {I_VPSRLW, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10747, 250},
+    /* 6440 */ {I_VPSRLW, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10756, 251},
+    /* 6441 */ {I_VPSRLW, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10765, 251},
+    /* 6442 */ {I_VPSUBB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27064, 250},
+    /* 6443 */ {I_VPSUBB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27072, 250},
+    /* 6444 */ {I_VPSUBB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27080, 250},
+    /* 6445 */ {I_VPSUBB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27088, 250},
+    /* 6446 */ {I_VPSUBB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27096, 251},
+    /* 6447 */ {I_VPSUBB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27104, 251},
+    /* 6448 */ {I_VPSUBD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27112, 246},
+    /* 6449 */ {I_VPSUBD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27120, 246},
+    /* 6450 */ {I_VPSUBD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27128, 246},
+    /* 6451 */ {I_VPSUBD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27136, 246},
+    /* 6452 */ {I_VPSUBD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27144, 247},
+    /* 6453 */ {I_VPSUBD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27152, 247},
+    /* 6454 */ {I_VPSUBQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27160, 246},
+    /* 6455 */ {I_VPSUBQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27168, 246},
+    /* 6456 */ {I_VPSUBQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27176, 246},
+    /* 6457 */ {I_VPSUBQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27184, 246},
+    /* 6458 */ {I_VPSUBQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27192, 247},
+    /* 6459 */ {I_VPSUBQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27200, 247},
+    /* 6460 */ {I_VPSUBSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27208, 250},
+    /* 6461 */ {I_VPSUBSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27216, 250},
+    /* 6462 */ {I_VPSUBSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27224, 250},
+    /* 6463 */ {I_VPSUBSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27232, 250},
+    /* 6464 */ {I_VPSUBSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27240, 251},
+    /* 6465 */ {I_VPSUBSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27248, 251},
+    /* 6466 */ {I_VPSUBSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27256, 250},
+    /* 6467 */ {I_VPSUBSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27264, 250},
+    /* 6468 */ {I_VPSUBSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27272, 250},
+    /* 6469 */ {I_VPSUBSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27280, 250},
+    /* 6470 */ {I_VPSUBSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27288, 251},
+    /* 6471 */ {I_VPSUBSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27296, 251},
+    /* 6472 */ {I_VPSUBUSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27304, 250},
+    /* 6473 */ {I_VPSUBUSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27312, 250},
+    /* 6474 */ {I_VPSUBUSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27320, 250},
+    /* 6475 */ {I_VPSUBUSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27328, 250},
+    /* 6476 */ {I_VPSUBUSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27336, 251},
+    /* 6477 */ {I_VPSUBUSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27344, 251},
+    /* 6478 */ {I_VPSUBUSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27352, 250},
+    /* 6479 */ {I_VPSUBUSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27360, 250},
+    /* 6480 */ {I_VPSUBUSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27368, 250},
+    /* 6481 */ {I_VPSUBUSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27376, 250},
+    /* 6482 */ {I_VPSUBUSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27384, 251},
+    /* 6483 */ {I_VPSUBUSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27392, 251},
+    /* 6484 */ {I_VPSUBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27400, 250},
+    /* 6485 */ {I_VPSUBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27408, 250},
+    /* 6486 */ {I_VPSUBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27416, 250},
+    /* 6487 */ {I_VPSUBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27424, 250},
+    /* 6488 */ {I_VPSUBW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27432, 251},
+    /* 6489 */ {I_VPSUBW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27440, 251},
+    /* 6490 */ {I_VPTERNLOGD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+10774, 246},
+    /* 6491 */ {I_VPTERNLOGD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+10783, 246},
+    /* 6492 */ {I_VPTERNLOGD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+10792, 247},
+    /* 6493 */ {I_VPTERNLOGQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+10801, 246},
+    /* 6494 */ {I_VPTERNLOGQ, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+10810, 246},
+    /* 6495 */ {I_VPTERNLOGQ, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+10819, 247},
+    /* 6496 */ {I_VPTESTMB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27448, 250},
+    /* 6497 */ {I_VPTESTMB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27456, 250},
+    /* 6498 */ {I_VPTESTMB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27464, 251},
+    /* 6499 */ {I_VPTESTMD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+27472, 246},
+    /* 6500 */ {I_VPTESTMD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+27480, 246},
+    /* 6501 */ {I_VPTESTMD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+27488, 247},
+    /* 6502 */ {I_VPTESTMQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+27496, 246},
+    /* 6503 */ {I_VPTESTMQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+27504, 246},
+    /* 6504 */ {I_VPTESTMQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+27512, 247},
+    /* 6505 */ {I_VPTESTMW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27520, 250},
+    /* 6506 */ {I_VPTESTMW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27528, 250},
+    /* 6507 */ {I_VPTESTMW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27536, 251},
+    /* 6508 */ {I_VPTESTNMB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27544, 250},
+    /* 6509 */ {I_VPTESTNMB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27552, 250},
+    /* 6510 */ {I_VPTESTNMB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27560, 251},
+    /* 6511 */ {I_VPTESTNMD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+27568, 246},
+    /* 6512 */ {I_VPTESTNMD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+27576, 246},
+    /* 6513 */ {I_VPTESTNMD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+27584, 247},
+    /* 6514 */ {I_VPTESTNMQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+27592, 246},
+    /* 6515 */ {I_VPTESTNMQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+27600, 246},
+    /* 6516 */ {I_VPTESTNMQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+27608, 247},
+    /* 6517 */ {I_VPTESTNMW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27616, 250},
+    /* 6518 */ {I_VPTESTNMW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27624, 250},
+    /* 6519 */ {I_VPTESTNMW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27632, 251},
+    /* 6520 */ {I_VPUNPCKHBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27640, 250},
+    /* 6521 */ {I_VPUNPCKHBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27648, 250},
+    /* 6522 */ {I_VPUNPCKHBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27656, 250},
+    /* 6523 */ {I_VPUNPCKHBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27664, 250},
+    /* 6524 */ {I_VPUNPCKHBW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27672, 251},
+    /* 6525 */ {I_VPUNPCKHBW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27680, 251},
+    /* 6526 */ {I_VPUNPCKHDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27688, 246},
+    /* 6527 */ {I_VPUNPCKHDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27696, 246},
+    /* 6528 */ {I_VPUNPCKHDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27704, 246},
+    /* 6529 */ {I_VPUNPCKHDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27712, 246},
+    /* 6530 */ {I_VPUNPCKHDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27720, 247},
+    /* 6531 */ {I_VPUNPCKHDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27728, 247},
+    /* 6532 */ {I_VPUNPCKHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27736, 246},
+    /* 6533 */ {I_VPUNPCKHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27744, 246},
+    /* 6534 */ {I_VPUNPCKHQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27752, 246},
+    /* 6535 */ {I_VPUNPCKHQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27760, 246},
+    /* 6536 */ {I_VPUNPCKHQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27768, 247},
+    /* 6537 */ {I_VPUNPCKHQDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27776, 247},
+    /* 6538 */ {I_VPUNPCKHWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27784, 250},
+    /* 6539 */ {I_VPUNPCKHWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27792, 250},
+    /* 6540 */ {I_VPUNPCKHWD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27800, 250},
+    /* 6541 */ {I_VPUNPCKHWD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27808, 250},
+    /* 6542 */ {I_VPUNPCKHWD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27816, 251},
+    /* 6543 */ {I_VPUNPCKHWD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27824, 251},
+    /* 6544 */ {I_VPUNPCKLBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27832, 250},
+    /* 6545 */ {I_VPUNPCKLBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27840, 250},
+    /* 6546 */ {I_VPUNPCKLBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27848, 250},
+    /* 6547 */ {I_VPUNPCKLBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27856, 250},
+    /* 6548 */ {I_VPUNPCKLBW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27864, 251},
+    /* 6549 */ {I_VPUNPCKLBW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27872, 251},
+    /* 6550 */ {I_VPUNPCKLDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27880, 246},
+    /* 6551 */ {I_VPUNPCKLDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27888, 246},
+    /* 6552 */ {I_VPUNPCKLDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27896, 246},
+    /* 6553 */ {I_VPUNPCKLDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27904, 246},
+    /* 6554 */ {I_VPUNPCKLDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27912, 247},
+    /* 6555 */ {I_VPUNPCKLDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27920, 247},
+    /* 6556 */ {I_VPUNPCKLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27928, 246},
+    /* 6557 */ {I_VPUNPCKLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27936, 246},
+    /* 6558 */ {I_VPUNPCKLQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27944, 246},
+    /* 6559 */ {I_VPUNPCKLQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27952, 246},
+    /* 6560 */ {I_VPUNPCKLQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27960, 247},
+    /* 6561 */ {I_VPUNPCKLQDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27968, 247},
+    /* 6562 */ {I_VPUNPCKLWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27976, 250},
+    /* 6563 */ {I_VPUNPCKLWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27984, 250},
+    /* 6564 */ {I_VPUNPCKLWD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27992, 250},
+    /* 6565 */ {I_VPUNPCKLWD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28000, 250},
+    /* 6566 */ {I_VPUNPCKLWD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28008, 251},
+    /* 6567 */ {I_VPUNPCKLWD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28016, 251},
+    /* 6568 */ {I_VPXORD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28024, 246},
+    /* 6569 */ {I_VPXORD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28032, 246},
+    /* 6570 */ {I_VPXORD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28040, 246},
+    /* 6571 */ {I_VPXORD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28048, 246},
+    /* 6572 */ {I_VPXORD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28056, 247},
+    /* 6573 */ {I_VPXORD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28064, 247},
+    /* 6574 */ {I_VPXORQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28072, 246},
+    /* 6575 */ {I_VPXORQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28080, 246},
+    /* 6576 */ {I_VPXORQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28088, 246},
+    /* 6577 */ {I_VPXORQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28096, 246},
+    /* 6578 */ {I_VPXORQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28104, 247},
+    /* 6579 */ {I_VPXORQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28112, 247},
+    /* 6580 */ {I_VRANGEPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+10828, 248},
+    /* 6581 */ {I_VRANGEPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10837, 248},
+    /* 6582 */ {I_VRANGEPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+10846, 248},
+    /* 6583 */ {I_VRANGEPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10855, 248},
+    /* 6584 */ {I_VRANGEPD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64|SAE,0,0}, nasm_bytecodes+10864, 249},
+    /* 6585 */ {I_VRANGEPD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+10873, 249},
+    /* 6586 */ {I_VRANGEPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+10882, 248},
+    /* 6587 */ {I_VRANGEPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10891, 248},
+    /* 6588 */ {I_VRANGEPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+10900, 248},
+    /* 6589 */ {I_VRANGEPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10909, 248},
+    /* 6590 */ {I_VRANGEPS, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32|SAE,0,0}, nasm_bytecodes+10918, 249},
+    /* 6591 */ {I_VRANGEPS, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+10927, 249},
+    /* 6592 */ {I_VRANGESD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+10936, 249},
+    /* 6593 */ {I_VRANGESD, 3, {XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+10945, 249},
+    /* 6594 */ {I_VRANGESS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+10954, 249},
+    /* 6595 */ {I_VRANGESS, 3, {XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+10963, 249},
+    /* 6596 */ {I_VRCP14PD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28120, 246},
+    /* 6597 */ {I_VRCP14PD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28128, 246},
+    /* 6598 */ {I_VRCP14PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28136, 247},
+    /* 6599 */ {I_VRCP14PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28144, 246},
+    /* 6600 */ {I_VRCP14PS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28152, 246},
+    /* 6601 */ {I_VRCP14PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28160, 247},
+    /* 6602 */ {I_VRCP14SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28168, 247},
+    /* 6603 */ {I_VRCP14SD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28176, 247},
+    /* 6604 */ {I_VRCP14SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28184, 247},
+    /* 6605 */ {I_VRCP14SS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28192, 247},
+    /* 6606 */ {I_VRCP28PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+28200, 252},
+    /* 6607 */ {I_VRCP28PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+28208, 252},
+    /* 6608 */ {I_VRCP28SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+28216, 252},
+    /* 6609 */ {I_VRCP28SD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+28224, 252},
+    /* 6610 */ {I_VRCP28SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+28232, 252},
+    /* 6611 */ {I_VRCP28SS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+28240, 252},
+    /* 6612 */ {I_VREDUCEPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10972, 248},
+    /* 6613 */ {I_VREDUCEPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10981, 248},
+    /* 6614 */ {I_VREDUCEPD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+10990, 249},
+    /* 6615 */ {I_VREDUCEPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10999, 248},
+    /* 6616 */ {I_VREDUCEPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11008, 248},
+    /* 6617 */ {I_VREDUCEPS, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+11017, 249},
+    /* 6618 */ {I_VREDUCESD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+11026, 249},
+    /* 6619 */ {I_VREDUCESD, 3, {XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+11035, 249},
+    /* 6620 */ {I_VREDUCESS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+11044, 249},
+    /* 6621 */ {I_VREDUCESS, 3, {XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+11053, 249},
+    /* 6622 */ {I_VRNDSCALEPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11062, 246},
+    /* 6623 */ {I_VRNDSCALEPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11071, 246},
+    /* 6624 */ {I_VRNDSCALEPD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+11080, 247},
+    /* 6625 */ {I_VRNDSCALEPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11089, 246},
+    /* 6626 */ {I_VRNDSCALEPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11098, 246},
+    /* 6627 */ {I_VRNDSCALEPS, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+11107, 247},
+    /* 6628 */ {I_VRNDSCALESD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+11116, 247},
+    /* 6629 */ {I_VRNDSCALESD, 3, {XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+11125, 247},
+    /* 6630 */ {I_VRNDSCALESS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+11134, 247},
+    /* 6631 */ {I_VRNDSCALESS, 3, {XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+11143, 247},
+    /* 6632 */ {I_VRSQRT14PD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28248, 246},
+    /* 6633 */ {I_VRSQRT14PD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28256, 246},
+    /* 6634 */ {I_VRSQRT14PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28264, 247},
+    /* 6635 */ {I_VRSQRT14PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28272, 246},
+    /* 6636 */ {I_VRSQRT14PS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28280, 246},
+    /* 6637 */ {I_VRSQRT14PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28288, 247},
+    /* 6638 */ {I_VRSQRT14SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28296, 247},
+    /* 6639 */ {I_VRSQRT14SD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28304, 247},
+    /* 6640 */ {I_VRSQRT14SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28312, 247},
+    /* 6641 */ {I_VRSQRT14SS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28320, 247},
+    /* 6642 */ {I_VRSQRT28PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+28328, 252},
+    /* 6643 */ {I_VRSQRT28PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+28336, 252},
+    /* 6644 */ {I_VRSQRT28SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+28344, 252},
+    /* 6645 */ {I_VRSQRT28SD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+28352, 252},
+    /* 6646 */ {I_VRSQRT28SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+28360, 252},
+    /* 6647 */ {I_VRSQRT28SS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+28368, 252},
+    /* 6648 */ {I_VSCALEFPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28376, 246},
+    /* 6649 */ {I_VSCALEFPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28384, 246},
+    /* 6650 */ {I_VSCALEFPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28392, 246},
+    /* 6651 */ {I_VSCALEFPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28400, 246},
+    /* 6652 */ {I_VSCALEFPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+28408, 247},
+    /* 6653 */ {I_VSCALEFPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+28416, 247},
+    /* 6654 */ {I_VSCALEFPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28424, 246},
+    /* 6655 */ {I_VSCALEFPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28432, 246},
+    /* 6656 */ {I_VSCALEFPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28440, 246},
+    /* 6657 */ {I_VSCALEFPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28448, 246},
+    /* 6658 */ {I_VSCALEFPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+28456, 247},
+    /* 6659 */ {I_VSCALEFPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+28464, 247},
+    /* 6660 */ {I_VSCALEFSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+28472, 247},
+    /* 6661 */ {I_VSCALEFSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+28480, 247},
+    /* 6662 */ {I_VSCALEFSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+28488, 247},
+    /* 6663 */ {I_VSCALEFSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+28496, 247},
+    /* 6664 */ {I_VSCATTERDPD, 2, {XMEM|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11152, 246},
+    /* 6665 */ {I_VSCATTERDPD, 2, {XMEM|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11161, 246},
+    /* 6666 */ {I_VSCATTERDPD, 2, {YMEM|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11170, 247},
+    /* 6667 */ {I_VSCATTERDPS, 2, {XMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11179, 246},
+    /* 6668 */ {I_VSCATTERDPS, 2, {YMEM|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11188, 246},
+    /* 6669 */ {I_VSCATTERDPS, 2, {ZMEM|BITS32,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11197, 247},
+    /* 6670 */ {I_VSCATTERPF0DPD, 1, {YMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11206, 253},
+    /* 6671 */ {I_VSCATTERPF0DPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11215, 253},
+    /* 6672 */ {I_VSCATTERPF0QPD, 1, {ZMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11224, 253},
+    /* 6673 */ {I_VSCATTERPF0QPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11233, 253},
+    /* 6674 */ {I_VSCATTERPF1DPD, 1, {YMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11242, 253},
+    /* 6675 */ {I_VSCATTERPF1DPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11251, 253},
+    /* 6676 */ {I_VSCATTERPF1QPD, 1, {ZMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11260, 253},
+    /* 6677 */ {I_VSCATTERPF1QPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11269, 253},
+    /* 6678 */ {I_VSCATTERQPD, 2, {XMEM|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11278, 246},
+    /* 6679 */ {I_VSCATTERQPD, 2, {YMEM|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11287, 246},
+    /* 6680 */ {I_VSCATTERQPD, 2, {ZMEM|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11296, 247},
+    /* 6681 */ {I_VSCATTERQPS, 2, {XMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11305, 246},
+    /* 6682 */ {I_VSCATTERQPS, 2, {YMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11314, 246},
+    /* 6683 */ {I_VSCATTERQPS, 2, {ZMEM|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11323, 247},
+    /* 6684 */ {I_VSHUFF32X4, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11332, 246},
+    /* 6685 */ {I_VSHUFF32X4, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11341, 246},
+    /* 6686 */ {I_VSHUFF32X4, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11350, 247},
+    /* 6687 */ {I_VSHUFF32X4, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11359, 247},
+    /* 6688 */ {I_VSHUFF64X2, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11368, 246},
+    /* 6689 */ {I_VSHUFF64X2, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11377, 246},
+    /* 6690 */ {I_VSHUFF64X2, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11386, 247},
+    /* 6691 */ {I_VSHUFF64X2, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11395, 247},
+    /* 6692 */ {I_VSHUFI32X4, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11404, 246},
+    /* 6693 */ {I_VSHUFI32X4, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11413, 246},
+    /* 6694 */ {I_VSHUFI32X4, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11422, 247},
+    /* 6695 */ {I_VSHUFI32X4, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11431, 247},
+    /* 6696 */ {I_VSHUFI64X2, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11440, 246},
+    /* 6697 */ {I_VSHUFI64X2, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11449, 246},
+    /* 6698 */ {I_VSHUFI64X2, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11458, 247},
+    /* 6699 */ {I_VSHUFI64X2, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11467, 247},
+    /* 6700 */ {I_VSHUFPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11476, 246},
+    /* 6701 */ {I_VSHUFPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11485, 246},
+    /* 6702 */ {I_VSHUFPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11494, 246},
+    /* 6703 */ {I_VSHUFPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11503, 246},
+    /* 6704 */ {I_VSHUFPD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11512, 247},
+    /* 6705 */ {I_VSHUFPD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11521, 247},
+    /* 6706 */ {I_VSHUFPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11530, 246},
+    /* 6707 */ {I_VSHUFPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11539, 246},
+    /* 6708 */ {I_VSHUFPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11548, 246},
+    /* 6709 */ {I_VSHUFPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11557, 246},
+    /* 6710 */ {I_VSHUFPS, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11566, 247},
+    /* 6711 */ {I_VSHUFPS, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11575, 247},
+    /* 6712 */ {I_VSQRTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28504, 246},
+    /* 6713 */ {I_VSQRTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28512, 246},
+    /* 6714 */ {I_VSQRTPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+28520, 247},
+    /* 6715 */ {I_VSQRTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28528, 246},
+    /* 6716 */ {I_VSQRTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28536, 246},
+    /* 6717 */ {I_VSQRTPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+28544, 247},
+    /* 6718 */ {I_VSQRTSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+28552, 247},
+    /* 6719 */ {I_VSQRTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+28560, 247},
+    /* 6720 */ {I_VSQRTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+28568, 247},
+    /* 6721 */ {I_VSQRTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+28576, 247},
+    /* 6722 */ {I_VSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28584, 246},
+    /* 6723 */ {I_VSUBPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28592, 246},
+    /* 6724 */ {I_VSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28600, 246},
+    /* 6725 */ {I_VSUBPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28608, 246},
+    /* 6726 */ {I_VSUBPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+28616, 247},
+    /* 6727 */ {I_VSUBPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+28624, 247},
+    /* 6728 */ {I_VSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28632, 246},
+    /* 6729 */ {I_VSUBPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28640, 246},
+    /* 6730 */ {I_VSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28648, 246},
+    /* 6731 */ {I_VSUBPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28656, 246},
+    /* 6732 */ {I_VSUBPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+28664, 247},
+    /* 6733 */ {I_VSUBPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+28672, 247},
+    /* 6734 */ {I_VSUBSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+28680, 247},
+    /* 6735 */ {I_VSUBSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+28688, 247},
+    /* 6736 */ {I_VSUBSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+28696, 247},
+    /* 6737 */ {I_VSUBSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+28704, 247},
+    /* 6738 */ {I_VUCOMISD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+28712, 247},
+    /* 6739 */ {I_VUCOMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+28720, 247},
+    /* 6740 */ {I_VUNPCKHPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28728, 246},
+    /* 6741 */ {I_VUNPCKHPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28736, 246},
+    /* 6742 */ {I_VUNPCKHPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28744, 246},
+    /* 6743 */ {I_VUNPCKHPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28752, 246},
+    /* 6744 */ {I_VUNPCKHPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28760, 247},
+    /* 6745 */ {I_VUNPCKHPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28768, 247},
+    /* 6746 */ {I_VUNPCKHPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28776, 246},
+    /* 6747 */ {I_VUNPCKHPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28784, 246},
+    /* 6748 */ {I_VUNPCKHPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28792, 246},
+    /* 6749 */ {I_VUNPCKHPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28800, 246},
+    /* 6750 */ {I_VUNPCKHPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28808, 247},
+    /* 6751 */ {I_VUNPCKHPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28816, 247},
+    /* 6752 */ {I_VUNPCKLPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28824, 246},
+    /* 6753 */ {I_VUNPCKLPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28832, 246},
+    /* 6754 */ {I_VUNPCKLPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28840, 246},
+    /* 6755 */ {I_VUNPCKLPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28848, 246},
+    /* 6756 */ {I_VUNPCKLPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28856, 247},
+    /* 6757 */ {I_VUNPCKLPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28864, 247},
+    /* 6758 */ {I_VUNPCKLPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28872, 246},
+    /* 6759 */ {I_VUNPCKLPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28880, 246},
+    /* 6760 */ {I_VUNPCKLPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28888, 246},
+    /* 6761 */ {I_VUNPCKLPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28896, 246},
+    /* 6762 */ {I_VUNPCKLPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28904, 247},
+    /* 6763 */ {I_VUNPCKLPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28912, 247},
+    /* 6764 */ {I_VXORPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28920, 248},
+    /* 6765 */ {I_VXORPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28928, 248},
+    /* 6766 */ {I_VXORPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28936, 248},
+    /* 6767 */ {I_VXORPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28944, 248},
+    /* 6768 */ {I_VXORPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28952, 249},
+    /* 6769 */ {I_VXORPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28960, 249},
+    /* 6770 */ {I_VXORPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28968, 248},
+    /* 6771 */ {I_VXORPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28976, 248},
+    /* 6772 */ {I_VXORPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28984, 248},
+    /* 6773 */ {I_VXORPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28992, 248},
+    /* 6774 */ {I_VXORPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29000, 249},
+    /* 6775 */ {I_VXORPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29008, 249},
+    /* 6776 */ {I_RDPKRU, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46176, 139},
+    /* 6777 */ {I_WRPKRU, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46182, 139},
+    /* 6778 */ {I_RDPID, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42393, 260},
+    /* 6779 */ {I_RDPID, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42392, 139},
+    /* 6780 */ {I_RDPID, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42393, 261},
+    /* 6781 */ {I_CLFLUSHOPT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46055, 138},
+    /* 6782 */ {I_CLWB, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46061, 138},
+    /* 6783 */ {I_PCOMMIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46067, 262},
+    /* 6784 */ {I_CLZERO, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46086, 263},
+    /* 6785 */ {I_PTWRITE, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42400, 138},
+    /* 6786 */ {I_PTWRITE, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42399, 139},
+    /* 6787 */ {I_CLDEMOTE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46091, 138},
+    /* 6788 */ {I_MOVDIRI, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42406, 266},
+    /* 6789 */ {I_MOVDIRI, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42413, 267},
+    /* 6790 */ {I_MOVDIR64B, 2, {REG_GPR|BITS16,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+29016, 260},
+    /* 6791 */ {I_MOVDIR64B, 2, {REG_GPR|BITS32,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+29024, 138},
+    /* 6792 */ {I_MOVDIR64B, 2, {REG_GPR|BITS64,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+11584, 139},
+    /* 6793 */ {I_PCONFIG, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46097, 138},
+    /* 6794 */ {I_TPAUSE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46061, 138},
+    /* 6795 */ {I_UMONITOR, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42420, 260},
+    /* 6796 */ {I_UMONITOR, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42427, 138},
+    /* 6797 */ {I_UMONITOR, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+29032, 139},
+    /* 6798 */ {I_UMWAIT, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46103, 138},
+    /* 6799 */ {I_WBNOINVD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49288, 138},
+    /* 6800 */ {I_GF2P8AFFINEINVQB, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29040, 268},
+    /* 6801 */ {I_VGF2P8AFFINEINVQB, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+29048, 269},
+    /* 6802 */ {I_VGF2P8AFFINEINVQB, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29056, 269},
+    /* 6803 */ {I_VGF2P8AFFINEINVQB, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+29064, 269},
+    /* 6804 */ {I_VGF2P8AFFINEINVQB, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29072, 269},
+    /* 6805 */ {I_VGF2P8AFFINEINVQB, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11593, 270},
+    /* 6806 */ {I_VGF2P8AFFINEINVQB, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11602, 270},
+    /* 6807 */ {I_VGF2P8AFFINEINVQB, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11611, 270},
+    /* 6808 */ {I_VGF2P8AFFINEINVQB, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11620, 270},
+    /* 6809 */ {I_VGF2P8AFFINEINVQB, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11629, 271},
+    /* 6810 */ {I_VGF2P8AFFINEINVQB, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11638, 271},
+    /* 6811 */ {I_GF2P8AFFINEQB, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29080, 268},
+    /* 6812 */ {I_VGF2P8AFFINEQB, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+29088, 269},
+    /* 6813 */ {I_VGF2P8AFFINEQB, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29096, 269},
+    /* 6814 */ {I_VGF2P8AFFINEQB, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+29104, 269},
+    /* 6815 */ {I_VGF2P8AFFINEQB, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29112, 269},
+    /* 6816 */ {I_VGF2P8AFFINEQB, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11647, 270},
+    /* 6817 */ {I_VGF2P8AFFINEQB, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11656, 270},
+    /* 6818 */ {I_VGF2P8AFFINEQB, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11665, 270},
+    /* 6819 */ {I_VGF2P8AFFINEQB, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11674, 270},
+    /* 6820 */ {I_VGF2P8AFFINEQB, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11683, 271},
+    /* 6821 */ {I_VGF2P8AFFINEQB, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11692, 271},
+    /* 6822 */ {I_GF2P8MULB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+42434, 268},
+    /* 6823 */ {I_VGF2P8MULB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+42441, 269},
+    /* 6824 */ {I_VGF2P8MULB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+42448, 269},
+    /* 6825 */ {I_VGF2P8MULB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+42455, 269},
+    /* 6826 */ {I_VGF2P8MULB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+42462, 269},
+    /* 6827 */ {I_VGF2P8MULB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29120, 270},
+    /* 6828 */ {I_VGF2P8MULB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29128, 270},
+    /* 6829 */ {I_VGF2P8MULB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29136, 270},
+    /* 6830 */ {I_VGF2P8MULB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29144, 270},
+    /* 6831 */ {I_VGF2P8MULB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29152, 271},
+    /* 6832 */ {I_VGF2P8MULB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29160, 271},
+    /* 6833 */ {I_VPCOMPRESSB, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29168, 272},
+    /* 6834 */ {I_VPCOMPRESSB, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29176, 272},
+    /* 6835 */ {I_VPCOMPRESSB, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29184, 273},
+    /* 6836 */ {I_VPCOMPRESSB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29192, 272},
+    /* 6837 */ {I_VPCOMPRESSB, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29200, 272},
+    /* 6838 */ {I_VPCOMPRESSB, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29208, 273},
+    /* 6839 */ {I_VPCOMPRESSW, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29216, 272},
+    /* 6840 */ {I_VPCOMPRESSW, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29224, 272},
+    /* 6841 */ {I_VPCOMPRESSW, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29232, 273},
+    /* 6842 */ {I_VPCOMPRESSW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29240, 272},
+    /* 6843 */ {I_VPCOMPRESSW, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29248, 272},
+    /* 6844 */ {I_VPCOMPRESSW, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29256, 273},
+    /* 6845 */ {I_VPEXPANDB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29264, 272},
+    /* 6846 */ {I_VPEXPANDB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29272, 272},
+    /* 6847 */ {I_VPEXPANDB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29280, 273},
+    /* 6848 */ {I_VPEXPANDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29288, 272},
+    /* 6849 */ {I_VPEXPANDW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29296, 272},
+    /* 6850 */ {I_VPEXPANDW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29304, 273},
+    /* 6851 */ {I_VPSHLDW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11701, 272},
+    /* 6852 */ {I_VPSHLDW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11710, 272},
+    /* 6853 */ {I_VPSHLDW, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11719, 272},
+    /* 6854 */ {I_VPSHLDW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11728, 272},
+    /* 6855 */ {I_VPSHLDW, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11737, 273},
+    /* 6856 */ {I_VPSHLDW, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11746, 273},
+    /* 6857 */ {I_VPSHLDD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11755, 272},
+    /* 6858 */ {I_VPSHLDD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11764, 272},
+    /* 6859 */ {I_VPSHLDD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11773, 272},
+    /* 6860 */ {I_VPSHLDD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11782, 272},
+    /* 6861 */ {I_VPSHLDD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11791, 273},
+    /* 6862 */ {I_VPSHLDD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11800, 273},
+    /* 6863 */ {I_VPSHLDQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11809, 272},
+    /* 6864 */ {I_VPSHLDQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11818, 272},
+    /* 6865 */ {I_VPSHLDQ, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11827, 272},
+    /* 6866 */ {I_VPSHLDQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11836, 272},
+    /* 6867 */ {I_VPSHLDQ, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11845, 273},
+    /* 6868 */ {I_VPSHLDQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11854, 273},
+    /* 6869 */ {I_VPSHLDVW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29312, 272},
+    /* 6870 */ {I_VPSHLDVW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29320, 272},
+    /* 6871 */ {I_VPSHLDVW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29328, 272},
+    /* 6872 */ {I_VPSHLDVW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29336, 272},
+    /* 6873 */ {I_VPSHLDVW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29344, 273},
+    /* 6874 */ {I_VPSHLDVW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29352, 273},
+    /* 6875 */ {I_VPSHLDVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29360, 272},
+    /* 6876 */ {I_VPSHLDVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29368, 272},
+    /* 6877 */ {I_VPSHLDVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29376, 272},
+    /* 6878 */ {I_VPSHLDVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29384, 272},
+    /* 6879 */ {I_VPSHLDVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29392, 273},
+    /* 6880 */ {I_VPSHLDVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29400, 273},
+    /* 6881 */ {I_VPSHLDVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+29408, 272},
+    /* 6882 */ {I_VPSHLDVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+29416, 272},
+    /* 6883 */ {I_VPSHLDVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+29424, 272},
+    /* 6884 */ {I_VPSHLDVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+29432, 272},
+    /* 6885 */ {I_VPSHLDVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+29440, 273},
+    /* 6886 */ {I_VPSHLDVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+29448, 273},
+    /* 6887 */ {I_VPSHRDW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11863, 272},
+    /* 6888 */ {I_VPSHRDW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11872, 272},
+    /* 6889 */ {I_VPSHRDW, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11881, 272},
+    /* 6890 */ {I_VPSHRDW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11890, 272},
+    /* 6891 */ {I_VPSHRDW, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11899, 273},
+    /* 6892 */ {I_VPSHRDW, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11908, 273},
+    /* 6893 */ {I_VPSHRDD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11917, 272},
+    /* 6894 */ {I_VPSHRDD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11926, 272},
+    /* 6895 */ {I_VPSHRDD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11935, 272},
+    /* 6896 */ {I_VPSHRDD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11944, 272},
+    /* 6897 */ {I_VPSHRDD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11953, 273},
+    /* 6898 */ {I_VPSHRDD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11962, 273},
+    /* 6899 */ {I_VPSHRDQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11971, 272},
+    /* 6900 */ {I_VPSHRDQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11980, 272},
+    /* 6901 */ {I_VPSHRDQ, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11989, 272},
+    /* 6902 */ {I_VPSHRDQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11998, 272},
+    /* 6903 */ {I_VPSHRDQ, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+12007, 273},
+    /* 6904 */ {I_VPSHRDQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+12016, 273},
+    /* 6905 */ {I_VPSHRDVW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29456, 272},
+    /* 6906 */ {I_VPSHRDVW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29464, 272},
+    /* 6907 */ {I_VPSHRDVW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29472, 272},
+    /* 6908 */ {I_VPSHRDVW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29480, 272},
+    /* 6909 */ {I_VPSHRDVW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29488, 273},
+    /* 6910 */ {I_VPSHRDVW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29496, 273},
+    /* 6911 */ {I_VPSHRDVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29504, 272},
+    /* 6912 */ {I_VPSHRDVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29512, 272},
+    /* 6913 */ {I_VPSHRDVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29520, 272},
+    /* 6914 */ {I_VPSHRDVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29528, 272},
+    /* 6915 */ {I_VPSHRDVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29536, 273},
+    /* 6916 */ {I_VPSHRDVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29544, 273},
+    /* 6917 */ {I_VPSHRDVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+29552, 272},
+    /* 6918 */ {I_VPSHRDVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+29560, 272},
+    /* 6919 */ {I_VPSHRDVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+29568, 272},
+    /* 6920 */ {I_VPSHRDVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+29576, 272},
+    /* 6921 */ {I_VPSHRDVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+29584, 273},
+    /* 6922 */ {I_VPSHRDVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+29592, 273},
+    /* 6923 */ {I_VPDPBUSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29600, 274},
+    /* 6924 */ {I_VPDPBUSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29608, 274},
+    /* 6925 */ {I_VPDPBUSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29616, 274},
+    /* 6926 */ {I_VPDPBUSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29624, 274},
+    /* 6927 */ {I_VPDPBUSD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29632, 275},
+    /* 6928 */ {I_VPDPBUSD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29640, 275},
+    /* 6929 */ {I_VPDPBUSDS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29648, 274},
+    /* 6930 */ {I_VPDPBUSDS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29656, 274},
+    /* 6931 */ {I_VPDPBUSDS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29664, 274},
+    /* 6932 */ {I_VPDPBUSDS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29672, 274},
+    /* 6933 */ {I_VPDPBUSDS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29680, 275},
+    /* 6934 */ {I_VPDPBUSDS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29688, 275},
+    /* 6935 */ {I_VPDPWSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29696, 274},
+    /* 6936 */ {I_VPDPWSSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29704, 274},
+    /* 6937 */ {I_VPDPWSSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29712, 274},
+    /* 6938 */ {I_VPDPWSSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29720, 274},
+    /* 6939 */ {I_VPDPWSSD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29728, 275},
+    /* 6940 */ {I_VPDPWSSD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29736, 275},
+    /* 6941 */ {I_VPDPWSSDS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29744, 274},
+    /* 6942 */ {I_VPDPWSSDS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29752, 274},
+    /* 6943 */ {I_VPDPWSSDS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29760, 274},
+    /* 6944 */ {I_VPDPWSSDS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29768, 274},
+    /* 6945 */ {I_VPDPWSSDS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29776, 275},
+    /* 6946 */ {I_VPDPWSSDS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29784, 275},
+    /* 6947 */ {I_VPOPCNTB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29792, 276},
+    /* 6948 */ {I_VPOPCNTB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29800, 276},
+    /* 6949 */ {I_VPOPCNTB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29808, 277},
+    /* 6950 */ {I_VPOPCNTW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29816, 276},
+    /* 6951 */ {I_VPOPCNTW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29824, 276},
+    /* 6952 */ {I_VPOPCNTW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29832, 277},
+    /* 6953 */ {I_VPOPCNTD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29840, 278},
+    /* 6954 */ {I_VPOPCNTD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29848, 278},
+    /* 6955 */ {I_VPOPCNTD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29856, 279},
+    /* 6956 */ {I_VPOPCNTQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29864, 278},
+    /* 6957 */ {I_VPOPCNTQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29872, 278},
+    /* 6958 */ {I_VPOPCNTQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29880, 279},
+    /* 6959 */ {I_VPSHUFBITQMB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29888, 276},
+    /* 6960 */ {I_VPSHUFBITQMB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29896, 276},
+    /* 6961 */ {I_VPSHUFBITQMB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29904, 277},
+    /* 6962 */ {I_V4FMADDPS, 3, {ZMM_L16,ZMM_L16|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29912, 280},
+    /* 6963 */ {I_V4FNMADDPS, 3, {ZMM_L16,ZMM_L16|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29920, 280},
+    /* 6964 */ {I_V4FMADDSS, 3, {ZMM_L16,ZMM_L16|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29928, 280},
+    /* 6965 */ {I_V4FNMADDSS, 3, {ZMM_L16,ZMM_L16|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29936, 280},
+    /* 6966 */ {I_V4DPWSSDS, 3, {ZMM_L16,ZMM_L16|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29944, 281},
+    /* 6967 */ {I_V4DPWSSD, 3, {ZMM_L16,ZMM_L16|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29952, 281},
+    /* 6968 */ {I_ENCLS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46109, 282},
+    /* 6969 */ {I_ENCLU, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46115, 282},
+    /* 6970 */ {I_ENCLV, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46121, 282},
+    /* 6971 */ {I_CLRSSBSY, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42428, 283},
+    /* 6972 */ {I_ENDBR32, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46127, 283},
+    /* 6973 */ {I_ENDBR64, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46133, 283},
+    /* 6974 */ {I_INCSSPD, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42469, 283},
+    /* 6975 */ {I_INCSSPQ, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42476, 284},
+    /* 6976 */ {I_RDSSPD, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42483, 283},
+    /* 6977 */ {I_RDSSPQ, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42490, 284},
+    /* 6978 */ {I_RSTORSSP, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46139, 283},
+    /* 6979 */ {I_SAVEPREVSSP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46145, 283},
+    /* 6980 */ {I_SETSSBSY, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46151, 283},
+    /* 6981 */ {I_WRUSSD, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29960, 283},
+    /* 6982 */ {I_WRUSSQ, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29968, 284},
+    /* 6983 */ {I_WRSSD, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42497, 283},
+    /* 6984 */ {I_WRSSQ, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42504, 284},
+    /* 6985 */ {I_ENQCMD, 2, {REG_GPR|BITS16,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+29976, 285},
+    /* 6986 */ {I_ENQCMD, 2, {REG_GPR|BITS32,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+29984, 286},
+    /* 6987 */ {I_ENQCMD, 2, {REG_GPR|BITS64,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+29992, 287},
+    /* 6988 */ {I_ENQCMDS, 2, {REG_GPR|BITS16,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+30000, 288},
+    /* 6989 */ {I_ENQCMDS, 2, {REG_GPR|BITS32,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+30008, 289},
+    /* 6990 */ {I_ENQCMDS, 2, {REG_GPR|BITS64,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+30016, 290},
+    /* 6991 */ {I_PCONFIG, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46097, 291},
+    /* 6992 */ {I_SERIALIZE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46157, 292},
+    /* 6993 */ {I_WBNOINVD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49288, 293},
+    /* 6994 */ {I_XRESLDTRK, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46163, 294},
+    /* 6995 */ {I_XSUSLDTRK, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46169, 294},
+    /* 6996 */ {I_VCVTNE2PS2BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30024, 295},
+    /* 6997 */ {I_VCVTNE2PS2BF16, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30032, 295},
+    /* 6998 */ {I_VCVTNE2PS2BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30040, 295},
+    /* 6999 */ {I_VCVTNE2PS2BF16, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30048, 295},
+    /* 7000 */ {I_VCVTNE2PS2BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30056, 295},
+    /* 7001 */ {I_VCVTNE2PS2BF16, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30064, 295},
+    /* 7002 */ {I_VCVTNEPS2BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30072, 295},
+    /* 7003 */ {I_VCVTNEPS2BF16, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30080, 295},
+    /* 7004 */ {I_VCVTNEPS2BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30088, 295},
+    /* 7005 */ {I_VCVTNEPS2BF16, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30096, 295},
+    /* 7006 */ {I_VCVTNEPS2BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30104, 295},
+    /* 7007 */ {I_VCVTNEPS2BF16, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30112, 295},
+    /* 7008 */ {I_VDPBF16PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30120, 295},
+    /* 7009 */ {I_VDPBF16PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30128, 295},
+    /* 7010 */ {I_VDPBF16PS, 3, {YMMREG,YMMREG,RM_YMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30136, 295},
+    /* 7011 */ {I_VDPBF16PS, 2, {YMMREG,RM_YMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30144, 295},
+    /* 7012 */ {I_VDPBF16PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30152, 295},
+    /* 7013 */ {I_VDPBF16PS, 2, {ZMMREG,RM_ZMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30160, 295},
+    /* 7014 */ {I_VP2INTERSECTD, 3, {KREG|RS2,XMMREG,RM_XMM|BITS128,0,0}, {0,0,B32,0,0}, nasm_bytecodes+30168, 295},
+    /* 7015 */ {I_VP2INTERSECTD, 3, {KREG|RS2,YMMREG,RM_YMM|BITS128,0,0}, {0,0,B32,0,0}, nasm_bytecodes+30176, 295},
+    /* 7016 */ {I_VP2INTERSECTD, 3, {KREG|RS2,ZMMREG,RM_ZMM|BITS128,0,0}, {0,0,B32,0,0}, nasm_bytecodes+30184, 295},
+    /* 7017 */ {I_LDTILECFG, 1, {MEMORY|BITS512,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42511, 296},
+    /* 7018 */ {I_STTILECFG, 1, {MEMORY|BITS512,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42518, 296},
+    /* 7019 */ {I_TDPBF16PS, 3, {TMMREG,TMMREG,TMMREG,0,0}, NO_DECORATOR, nasm_bytecodes+42525, 297},
+    /* 7020 */ {I_TDPBSSD, 3, {TMMREG,TMMREG,TMMREG,0,0}, NO_DECORATOR, nasm_bytecodes+42532, 298},
+    /* 7021 */ {I_TDPBSUD, 3, {TMMREG,TMMREG,TMMREG,0,0}, NO_DECORATOR, nasm_bytecodes+42539, 298},
+    /* 7022 */ {I_TDPBUSD, 3, {TMMREG,TMMREG,TMMREG,0,0}, NO_DECORATOR, nasm_bytecodes+42546, 298},
+    /* 7023 */ {I_TDPBUUD, 3, {TMMREG,TMMREG,TMMREG,0,0}, NO_DECORATOR, nasm_bytecodes+42553, 298},
+    /* 7024 */ {I_TILELOADD, 2, {TMMREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+42560, 299},
+    /* 7025 */ {I_TILELOADDT1, 2, {TMMREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+42567, 299},
+    /* 7026 */ {I_TILERELEASE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42574, 300},
+    /* 7027 */ {I_TILESTORED, 2, {MEMORY,TMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42581, 299},
+    /* 7028 */ {I_TILEZERO, 1, {TMMREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+30192, 300},
+    /* 7029 */ {I_VADDPH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+30200, 301},
+    /* 7030 */ {I_VADDPH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30208, 301},
+    /* 7031 */ {I_VADDPH, 3, {YMMREG,YMMREG,RM_YMM|BITS16,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+30216, 301},
+    /* 7032 */ {I_VADDPH, 2, {YMMREG,RM_YMM|BITS16,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30224, 301},
+    /* 7033 */ {I_VADDPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS16,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+30232, 302},
+    /* 7034 */ {I_VADDPH, 2, {ZMMREG,RM_ZMM|BITS16,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30240, 302},
+    /* 7035 */ {I_VADDSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+30248, 302},
+    /* 7036 */ {I_VADDSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+30256, 302},
+    /* 7037 */ {I_VCMPPH, 4, {KREG,XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0}, {MASK,0,B16,0,0}, nasm_bytecodes+12025, 301},
+    /* 7038 */ {I_VCMPPH, 3, {KREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+12034, 301},
+    /* 7039 */ {I_VCMPPH, 4, {KREG,YMMREG,RM_YMM|BITS16,IMMEDIATE|BITS8,0}, {MASK,0,B16,0,0}, nasm_bytecodes+12043, 301},
+    /* 7040 */ {I_VCMPPH, 3, {KREG,RM_YMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+12052, 301},
+    /* 7041 */ {I_VCMPPH, 4, {KREG,ZMMREG,RM_ZMM|BITS16,IMMEDIATE|BITS8,0}, {MASK,0,B16|SAE,0,0}, nasm_bytecodes+12061, 302},
+    /* 7042 */ {I_VCMPPH, 3, {KREG,RM_ZMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK,B16|SAE,0,0,0}, nasm_bytecodes+12070, 302},
+    /* 7043 */ {I_VCMPSH, 4, {KREG,XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+12079, 302},
+    /* 7044 */ {I_VCMPSH, 3, {KREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK,SAE,0,0,0}, nasm_bytecodes+12088, 302},
+    /* 7045 */ {I_VCOMISH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+30264, 302},
+    /* 7046 */ {I_VCVTDQ2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30272, 301},
+    /* 7047 */ {I_VCVTDQ2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30280, 301},
+    /* 7048 */ {I_VCVTDQ2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+30288, 302},
+    /* 7049 */ {I_VCVTPD2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+30296, 301},
+    /* 7050 */ {I_VCVTPD2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+30304, 301},
+    /* 7051 */ {I_VCVTPD2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+30312, 302},
+    /* 7052 */ {I_VCVTPH2DQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30320, 301},
+    /* 7053 */ {I_VCVTPH2DQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30328, 301},
+    /* 7054 */ {I_VCVTPH2DQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30336, 302},
+    /* 7055 */ {I_VCVTPH2PD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30344, 301},
+    /* 7056 */ {I_VCVTPH2PD, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30352, 301},
+    /* 7057 */ {I_VCVTPH2PD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+30360, 302},
+    /* 7058 */ {I_VCVTPH2PS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+39116, 303},
+    /* 7059 */ {I_VCVTPH2PS, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39109, 303},
+    /* 7060 */ {I_VCVTPH2PS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17248, 246},
+    /* 7061 */ {I_VCVTPH2PS, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17256, 246},
+    /* 7062 */ {I_VCVTPH2PS, 2, {ZMM_L16,RM_YMM_L16|BITS256,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+17264, 247},
+    /* 7063 */ {I_VCVTPH2PSX, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30368, 301},
+    /* 7064 */ {I_VCVTPH2PSX, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30376, 301},
+    /* 7065 */ {I_VCVTPH2PSX, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+30384, 302},
+    /* 7066 */ {I_VCVTPH2QQ, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30392, 301},
+    /* 7067 */ {I_VCVTPH2QQ, 2, {YMM_L16,RM_XMM_L16|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30400, 301},
+    /* 7068 */ {I_VCVTPH2QQ, 2, {ZMM_L16,RM_XMM_L16|BITS128,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30408, 302},
+    /* 7069 */ {I_VCVTPH2UDQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30416, 301},
+    /* 7070 */ {I_VCVTPH2UDQ, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30424, 301},
+    /* 7071 */ {I_VCVTPH2UDQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30432, 302},
+    /* 7072 */ {I_VCVTPH2UQQ, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30440, 301},
+    /* 7073 */ {I_VCVTPH2UQQ, 2, {YMM_L16,RM_XMM_L16|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30448, 301},
+    /* 7074 */ {I_VCVTPH2UQQ, 2, {ZMM_L16,RM_XMM_L16|BITS128,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30456, 302},
+    /* 7075 */ {I_VCVTPH2UW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30464, 301},
+    /* 7076 */ {I_VCVTPH2UW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30472, 301},
+    /* 7077 */ {I_VCVTPH2UW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30480, 302},
+    /* 7078 */ {I_VCVTPH2W, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30488, 301},
+    /* 7079 */ {I_VCVTPH2W, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30496, 301},
+    /* 7080 */ {I_VCVTPH2W, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30504, 302},
+    /* 7081 */ {I_VCVTPS2PH, 3, {RM_XMM_L16|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14232, 304},
+    /* 7082 */ {I_VCVTPS2PH, 3, {RM_XMM_L16|BITS128,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14224, 304},
+    /* 7083 */ {I_VCVTPS2PH, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8182, 246},
+    /* 7084 */ {I_VCVTPS2PH, 3, {MEMORY|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8182, 246},
+    /* 7085 */ {I_VCVTPS2PH, 3, {XMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8191, 246},
+    /* 7086 */ {I_VCVTPS2PH, 3, {MEMORY|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8191, 246},
+    /* 7087 */ {I_VCVTPS2PH, 3, {YMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+8200, 247},
+    /* 7088 */ {I_VCVTPS2PH, 3, {MEMORY|BITS256,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,SAE,0,0,0}, nasm_bytecodes+8200, 247},
+    /* 7089 */ {I_VCVTPS2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30512, 301},
+    /* 7090 */ {I_VCVTPS2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30520, 301},
+    /* 7091 */ {I_VCVTPS2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+30528, 302},
+    /* 7092 */ {I_VCVTQQ2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+30536, 301},
+    /* 7093 */ {I_VCVTQQ2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+30544, 301},
+    /* 7094 */ {I_VCVTQQ2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+30552, 301},
+    /* 7095 */ {I_VCVTSD2SH, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+30560, 302},
+    /* 7096 */ {I_VCVTSD2SH, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+30568, 302},
+    /* 7097 */ {I_VCVTSH2SD, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {0,0,SAE,0,0}, nasm_bytecodes+30576, 302},
+    /* 7098 */ {I_VCVTSH2SD, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+30584, 302},
+    /* 7099 */ {I_VCVTSH2SI, 2, {REG_GPR|BITS32,RM_XMM_L16|BITS16,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+30592, 302},
+    /* 7100 */ {I_VCVTSH2SI, 2, {REG_GPR|BITS64,RM_XMM_L16|BITS16,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+30600, 302},
+    /* 7101 */ {I_VCVTSH2SS, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+30608, 302},
+    /* 7102 */ {I_VCVTSH2SS, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+30616, 302},
+    /* 7103 */ {I_VCVTSH2USI, 2, {REG_GPR|BITS32,RM_XMM_L16|BITS16,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+30624, 302},
+    /* 7104 */ {I_VCVTSH2USI, 2, {REG_GPR|BITS64,RM_XMM_L16|BITS16,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+30632, 302},
+    /* 7105 */ {I_VCVTSI2SH, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,0,ER,0,0}, nasm_bytecodes+30640, 302},
+    /* 7106 */ {I_VCVTSI2SH, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+30648, 302},
+    /* 7107 */ {I_VCVTSI2SH, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,0,ER,0,0}, nasm_bytecodes+30656, 302},
+    /* 7108 */ {I_VCVTSI2SH, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+30664, 302},
+    /* 7109 */ {I_VCVTSS2SH, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {0,0,ER,0,0}, nasm_bytecodes+30672, 302},
+    /* 7110 */ {I_VCVTSS2SH, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+30680, 302},
+    /* 7111 */ {I_VCVTTPH2DQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30688, 301},
+    /* 7112 */ {I_VCVTTPH2DQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30696, 301},
+    /* 7113 */ {I_VCVTTPH2DQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+30704, 302},
+    /* 7114 */ {I_VCVTTPH2QQ, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30712, 301},
+    /* 7115 */ {I_VCVTTPH2QQ, 2, {YMM_L16,RM_XMM_L16|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30720, 301},
+    /* 7116 */ {I_VCVTTPH2QQ, 2, {ZMM_L16,RM_XMM_L16|BITS128,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+30728, 302},
+    /* 7117 */ {I_VCVTTPH2UDQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30736, 301},
+    /* 7118 */ {I_VCVTTPH2UDQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30744, 301},
+    /* 7119 */ {I_VCVTTPH2UDQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+30752, 302},
+    /* 7120 */ {I_VCVTTPH2UQQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30760, 301},
+    /* 7121 */ {I_VCVTTPH2UQQ, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30768, 301},
+    /* 7122 */ {I_VCVTTPH2UQQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+30776, 302},
+    /* 7123 */ {I_VCVTTPH2UW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30784, 301},
+    /* 7124 */ {I_VCVTTPH2UW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30792, 301},
+    /* 7125 */ {I_VCVTTPH2UW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+30800, 302},
+    /* 7126 */ {I_VCVTTPH2W, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30808, 301},
+    /* 7127 */ {I_VCVTTPH2W, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30816, 301},
+    /* 7128 */ {I_VCVTTPH2W, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+30824, 302},
+    /* 7129 */ {I_VCVTTSH2SI, 2, {REG_GPR|BITS32,RM_XMM_L16|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+30832, 302},
+    /* 7130 */ {I_VCVTTSH2SI, 2, {REG_GPR|BITS64,RM_XMM_L16|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+30840, 302},
+    /* 7131 */ {I_VCVTTSH2USI, 2, {REG_GPR|BITS32,RM_XMM_L16|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+30848, 302},
+    /* 7132 */ {I_VCVTTSH2USI, 2, {REG_GPR|BITS64,RM_XMM_L16|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+30856, 302},
+    /* 7133 */ {I_VCVTUDQ2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30864, 301},
+    /* 7134 */ {I_VCVTUDQ2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30872, 301},
+    /* 7135 */ {I_VCVTUDQ2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30880, 302},
+    /* 7136 */ {I_VCVTUQQ2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30888, 301},
+    /* 7137 */ {I_VCVTUQQ2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30896, 301},
+    /* 7138 */ {I_VCVTUQQ2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30904, 302},
+    /* 7139 */ {I_VCVTUSI2SH, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,ER,ER,0,0}, nasm_bytecodes+30912, 302},
+    /* 7140 */ {I_VCVTUSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,ER,ER,0,0}, nasm_bytecodes+30920, 302},
+    /* 7141 */ {I_VCVTUW2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30928, 301},
+    /* 7142 */ {I_VCVTUW2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30936, 301},
+    /* 7143 */ {I_VCVTUW2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30944, 302},
+    /* 7144 */ {I_VCVTW2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30952, 301},
+    /* 7145 */ {I_VCVTW2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30960, 301},
+    /* 7146 */ {I_VCVTW2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30968, 302},
+    /* 7147 */ {I_VDIVPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+30976, 301},
+    /* 7148 */ {I_VDIVPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30984, 301},
+    /* 7149 */ {I_VDIVPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+30992, 301},
+    /* 7150 */ {I_VDIVPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31000, 301},
+    /* 7151 */ {I_VDIVPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31008, 302},
+    /* 7152 */ {I_VDIVPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31016, 302},
+    /* 7153 */ {I_VDIVSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31024, 302},
+    /* 7154 */ {I_VDIVSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31032, 302},
+    /* 7155 */ {I_VFCMADDCPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+31040, 301},
+    /* 7156 */ {I_VFCMADDCPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31048, 301},
+    /* 7157 */ {I_VFCMADDCPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+31056, 301},
+    /* 7158 */ {I_VFCMADDCPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31064, 301},
+    /* 7159 */ {I_VFCMADDCPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+31072, 301},
+    /* 7160 */ {I_VFCMADDCPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+31080, 301},
+    /* 7161 */ {I_VFMADDCPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+31088, 301},
+    /* 7162 */ {I_VFMADDCPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31096, 301},
+    /* 7163 */ {I_VFMADDCPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+31104, 301},
+    /* 7164 */ {I_VFMADDCPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31112, 301},
+    /* 7165 */ {I_VFMADDCPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+31120, 301},
+    /* 7166 */ {I_VFMADDCPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+31128, 301},
+    /* 7167 */ {I_VFCMADDCSH, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31136, 302},
+    /* 7168 */ {I_VFCMADDCSH, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31144, 302},
+    /* 7169 */ {I_VFMADDCSH, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31152, 302},
+    /* 7170 */ {I_VFMADDCSH, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31160, 302},
+    /* 7171 */ {I_VFCMULCPCH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+31168, 301},
+    /* 7172 */ {I_VFCMULCPCH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31176, 301},
+    /* 7173 */ {I_VFCMULCPCH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+31184, 301},
+    /* 7174 */ {I_VFCMULCPCH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31192, 301},
+    /* 7175 */ {I_VFCMULCPCH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+31200, 301},
+    /* 7176 */ {I_VFCMULCPCH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+31208, 301},
+    /* 7177 */ {I_VFMULCPCH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+31216, 301},
+    /* 7178 */ {I_VFMULCPCH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31224, 301},
+    /* 7179 */ {I_VFMULCPCH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+31232, 301},
+    /* 7180 */ {I_VFMULCPCH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31240, 301},
+    /* 7181 */ {I_VFMULCPCH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+31248, 301},
+    /* 7182 */ {I_VFMULCPCH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+31256, 301},
+    /* 7183 */ {I_VFCMULCSH, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31264, 302},
+    /* 7184 */ {I_VFCMULCSH, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31272, 302},
+    /* 7185 */ {I_VFMULCSH, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31280, 302},
+    /* 7186 */ {I_VFMULCSH, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31288, 302},
+    /* 7187 */ {I_VFMADDSUB132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31296, 301},
+    /* 7188 */ {I_VFMADDSUB132PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31304, 301},
+    /* 7189 */ {I_VFMADDSUB132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31312, 301},
+    /* 7190 */ {I_VFMADDSUB132PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31320, 301},
+    /* 7191 */ {I_VFMADDSUB132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31328, 302},
+    /* 7192 */ {I_VFMADDSUB132PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31336, 302},
+    /* 7193 */ {I_VFMADDSUB213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31344, 301},
+    /* 7194 */ {I_VFMADDSUB213PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31352, 301},
+    /* 7195 */ {I_VFMADDSUB213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31360, 301},
+    /* 7196 */ {I_VFMADDSUB213PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31368, 301},
+    /* 7197 */ {I_VFMADDSUB213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31376, 302},
+    /* 7198 */ {I_VFMADDSUB213PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31384, 302},
+    /* 7199 */ {I_VFMADDSUB231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31392, 301},
+    /* 7200 */ {I_VFMADDSUB231PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31400, 301},
+    /* 7201 */ {I_VFMADDSUB231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31408, 301},
+    /* 7202 */ {I_VFMADDSUB231PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31416, 301},
+    /* 7203 */ {I_VFMADDSUB231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31424, 302},
+    /* 7204 */ {I_VFMADDSUB231PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31432, 302},
+    /* 7205 */ {I_VFMSUBADD132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31440, 301},
+    /* 7206 */ {I_VFMSUBADD132PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31448, 301},
+    /* 7207 */ {I_VFMSUBADD132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31456, 301},
+    /* 7208 */ {I_VFMSUBADD132PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31464, 301},
+    /* 7209 */ {I_VFMSUBADD132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31472, 302},
+    /* 7210 */ {I_VFMSUBADD132PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31480, 302},
+    /* 7211 */ {I_VFMSUBADD213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31488, 301},
+    /* 7212 */ {I_VFMSUBADD213PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31496, 301},
+    /* 7213 */ {I_VFMSUBADD213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31504, 301},
+    /* 7214 */ {I_VFMSUBADD213PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31512, 301},
+    /* 7215 */ {I_VFMSUBADD213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31520, 302},
+    /* 7216 */ {I_VFMSUBADD213PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31528, 302},
+    /* 7217 */ {I_VFMSUBADD231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31536, 301},
+    /* 7218 */ {I_VFMSUBADD231PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31544, 301},
+    /* 7219 */ {I_VFMSUBADD231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31552, 301},
+    /* 7220 */ {I_VFMSUBADD231PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31560, 301},
+    /* 7221 */ {I_VFMSUBADD231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31568, 302},
+    /* 7222 */ {I_VFMSUBADD231PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31576, 302},
+    /* 7223 */ {I_VPMADD132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31584, 301},
+    /* 7224 */ {I_VPMADD132PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31592, 301},
+    /* 7225 */ {I_VPMADD132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31600, 301},
+    /* 7226 */ {I_VPMADD132PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31608, 301},
+    /* 7227 */ {I_VPMADD132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31616, 302},
+    /* 7228 */ {I_VPMADD132PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31624, 302},
+    /* 7229 */ {I_VPMADD213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31632, 301},
+    /* 7230 */ {I_VPMADD213PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31640, 301},
+    /* 7231 */ {I_VPMADD213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31648, 301},
+    /* 7232 */ {I_VPMADD213PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31656, 301},
+    /* 7233 */ {I_VPMADD213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31664, 302},
+    /* 7234 */ {I_VPMADD213PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31672, 302},
+    /* 7235 */ {I_VPMADD231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31680, 301},
+    /* 7236 */ {I_VPMADD231PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31688, 301},
+    /* 7237 */ {I_VPMADD231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31696, 301},
+    /* 7238 */ {I_VPMADD231PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31704, 301},
+    /* 7239 */ {I_VPMADD231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31712, 302},
+    /* 7240 */ {I_VPMADD231PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31720, 302},
+    /* 7241 */ {I_VFMADD132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31728, 301},
+    /* 7242 */ {I_VFMADD132PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31736, 301},
+    /* 7243 */ {I_VFMADD132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31744, 301},
+    /* 7244 */ {I_VFMADD132PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31752, 301},
+    /* 7245 */ {I_VFMADD132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31760, 302},
+    /* 7246 */ {I_VFMADD132PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31768, 302},
+    /* 7247 */ {I_VFMADD213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31776, 301},
+    /* 7248 */ {I_VFMADD213PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31784, 301},
+    /* 7249 */ {I_VFMADD213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31792, 301},
+    /* 7250 */ {I_VFMADD213PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31800, 301},
+    /* 7251 */ {I_VFMADD213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31808, 302},
+    /* 7252 */ {I_VFMADD213PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31816, 302},
+    /* 7253 */ {I_VFMADD231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31824, 301},
+    /* 7254 */ {I_VFMADD231PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31832, 301},
+    /* 7255 */ {I_VFMADD231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31840, 301},
+    /* 7256 */ {I_VFMADD231PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31848, 301},
+    /* 7257 */ {I_VFMADD231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31856, 302},
+    /* 7258 */ {I_VFMADD231PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31864, 302},
+    /* 7259 */ {I_VPMADD132SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31872, 302},
+    /* 7260 */ {I_VPMADD132SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31880, 302},
+    /* 7261 */ {I_VPMADD213SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31888, 302},
+    /* 7262 */ {I_VPMADD213SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31896, 302},
+    /* 7263 */ {I_VPMADD231SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31904, 302},
+    /* 7264 */ {I_VPMADD231SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31912, 302},
+    /* 7265 */ {I_VPNMADD132SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31920, 302},
+    /* 7266 */ {I_VPNMADD132SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31928, 302},
+    /* 7267 */ {I_VPNMADD213SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31936, 302},
+    /* 7268 */ {I_VPNMADD213SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31944, 302},
+    /* 7269 */ {I_VPNMADD231SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31952, 302},
+    /* 7270 */ {I_VPNMADD231SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31960, 302},
+    /* 7271 */ {I_VPMSUB132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31968, 301},
+    /* 7272 */ {I_VPMSUB132PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31976, 301},
+    /* 7273 */ {I_VPMSUB132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31984, 301},
+    /* 7274 */ {I_VPMSUB132PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31992, 301},
+    /* 7275 */ {I_VPMSUB132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+32000, 302},
+    /* 7276 */ {I_VPMSUB132PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32008, 302},
+    /* 7277 */ {I_VPMSUB213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32016, 301},
+    /* 7278 */ {I_VPMSUB213PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32024, 301},
+    /* 7279 */ {I_VPMSUB213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32032, 301},
+    /* 7280 */ {I_VPMSUB213PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32040, 301},
+    /* 7281 */ {I_VPMSUB213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+32048, 302},
+    /* 7282 */ {I_VPMSUB213PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32056, 302},
+    /* 7283 */ {I_VPMSUB231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32064, 301},
+    /* 7284 */ {I_VPMSUB231PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32072, 301},
+    /* 7285 */ {I_VPMSUB231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32080, 301},
+    /* 7286 */ {I_VPMSUB231PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32088, 301},
+    /* 7287 */ {I_VPMSUB231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+32096, 302},
+    /* 7288 */ {I_VPMSUB231PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32104, 302},
+    /* 7289 */ {I_VFMSUB132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32112, 301},
+    /* 7290 */ {I_VFMSUB132PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32120, 301},
+    /* 7291 */ {I_VFMSUB132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32128, 301},
+    /* 7292 */ {I_VFMSUB132PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32136, 301},
+    /* 7293 */ {I_VFMSUB132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+32144, 302},
+    /* 7294 */ {I_VFMSUB132PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32152, 302},
+    /* 7295 */ {I_VFMSUB213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32160, 301},
+    /* 7296 */ {I_VFMSUB213PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32168, 301},
+    /* 7297 */ {I_VFMSUB213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32176, 301},
+    /* 7298 */ {I_VFMSUB213PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32184, 301},
+    /* 7299 */ {I_VFMSUB213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+32192, 302},
+    /* 7300 */ {I_VFMSUB213PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32200, 302},
+    /* 7301 */ {I_VFMSUB231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32208, 301},
+    /* 7302 */ {I_VFMSUB231PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32216, 301},
+    /* 7303 */ {I_VFMSUB231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32224, 301},
+    /* 7304 */ {I_VFMSUB231PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32232, 301},
+    /* 7305 */ {I_VFMSUB231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+32240, 302},
+    /* 7306 */ {I_VFMSUB231PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32248, 302},
+    /* 7307 */ {I_VPMSUB132SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32256, 302},
+    /* 7308 */ {I_VPMSUB132SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32264, 302},
+    /* 7309 */ {I_VPMSUB213SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32272, 302},
+    /* 7310 */ {I_VPMSUB213SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32280, 302},
+    /* 7311 */ {I_VPMSUB231SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32288, 302},
+    /* 7312 */ {I_VPMSUB231SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32296, 302},
+    /* 7313 */ {I_VPNMSUB132SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32304, 302},
+    /* 7314 */ {I_VPNMSUB132SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32312, 302},
+    /* 7315 */ {I_VPNMSUB213SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32320, 302},
+    /* 7316 */ {I_VPNMSUB213SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32328, 302},
+    /* 7317 */ {I_VPNMSUB231SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32336, 302},
+    /* 7318 */ {I_VPNMSUB231SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32344, 302},
+    /* 7319 */ {I_VFPCLASSPH, 3, {KREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+12097, 301},
+    /* 7320 */ {I_VFPCLASSPH, 3, {KREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+12106, 301},
+    /* 7321 */ {I_VFPCLASSPH, 3, {KREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+12115, 302},
+    /* 7322 */ {I_VFPCLASSSH, 3, {KREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+12124, 302},
+    /* 7323 */ {I_VGETEXPPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32352, 301},
+    /* 7324 */ {I_VGETEXPPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32360, 301},
+    /* 7325 */ {I_VGETEXPPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+32368, 302},
+    /* 7326 */ {I_VGETEXPSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+32376, 302},
+    /* 7327 */ {I_VGETMANTPH, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+12133, 301},
+    /* 7328 */ {I_VGETMANTPH, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+12142, 301},
+    /* 7329 */ {I_VGETMANTPH, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+12151, 302},
+    /* 7330 */ {I_VGETMANTSH, 3, {XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+12160, 302},
+    /* 7331 */ {I_VGETMAXPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32384, 301},
+    /* 7332 */ {I_VGETMAXPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32392, 301},
+    /* 7333 */ {I_VGETMAXPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+32400, 302},
+    /* 7334 */ {I_VGETMAXSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+32408, 302},
+    /* 7335 */ {I_VGETMINPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32416, 301},
+    /* 7336 */ {I_VGETMINPH, 2, {YMMREG,RM_XMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32424, 301},
+    /* 7337 */ {I_VGETMINPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+32432, 302},
+    /* 7338 */ {I_VGETMINSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+32440, 302},
+    /* 7339 */ {I_VMOVSH, 2, {XMMREG,MEMORY|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32448, 302},
+    /* 7340 */ {I_VMOVSH, 2, {MEMORY|BITS16,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+32456, 302},
+    /* 7341 */ {I_VMOVSH, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32464, 302},
+    /* 7342 */ {I_VMOVSH, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32472, 302},
+    /* 7343 */ {I_VMOVSH, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32480, 302},
+    /* 7344 */ {I_VMOVSH, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32488, 302},
+    /* 7345 */ {I_VMOVW, 2, {XMMREG,RM_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32496, 302},
+    /* 7346 */ {I_VMOVW, 2, {RM_GPR|BITS16,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+32504, 302},
+    /* 7347 */ {I_VMULPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32512, 301},
+    /* 7348 */ {I_VMULPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32520, 301},
+    /* 7349 */ {I_VMULPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32528, 301},
+    /* 7350 */ {I_VMULPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32536, 301},
+    /* 7351 */ {I_VMULPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32544, 302},
+    /* 7352 */ {I_VMULPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32552, 302},
+    /* 7353 */ {I_VMULSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32560, 302},
+    /* 7354 */ {I_VMULSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32568, 302},
+    /* 7355 */ {I_VRCPPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32576, 301},
+    /* 7356 */ {I_VRCPPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32584, 301},
+    /* 7357 */ {I_VRCPPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32592, 301},
+    /* 7358 */ {I_VRCPPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32600, 301},
+    /* 7359 */ {I_VRCPPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32608, 302},
+    /* 7360 */ {I_VRCPPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32616, 302},
+    /* 7361 */ {I_VRCPSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+32624, 302},
+    /* 7362 */ {I_VRCPSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+32632, 302},
+    /* 7363 */ {I_VREDUCEPH, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+12169, 301},
+    /* 7364 */ {I_VREDUCEPH, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+12178, 301},
+    /* 7365 */ {I_VREDUCEPH, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+12187, 302},
+    /* 7366 */ {I_VREDUCESH, 4, {XMMREG,XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+12196, 302},
+    /* 7367 */ {I_VREDUCESH, 3, {XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+12205, 302},
+    /* 7368 */ {I_VENDSCALEPH, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+12214, 301},
+    /* 7369 */ {I_VENDSCALEPH, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+12223, 301},
+    /* 7370 */ {I_VENDSCALEPH, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+12232, 302},
+    /* 7371 */ {I_VENDSCALESH, 4, {XMMREG,XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+12241, 302},
+    /* 7372 */ {I_VENDSCALESH, 3, {XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+12250, 302},
+    /* 7373 */ {I_VRSQRTPH, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+12259, 301},
+    /* 7374 */ {I_VRSQRTPH, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+12268, 301},
+    /* 7375 */ {I_VRSQRTPH, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+12277, 302},
+    /* 7376 */ {I_VRSQRTSH, 4, {XMMREG,XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+12286, 302},
+    /* 7377 */ {I_VRSQRTSH, 3, {XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+12295, 302},
+    /* 7378 */ {I_VSCALEFPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32640, 301},
+    /* 7379 */ {I_VSCALEFPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32648, 301},
+    /* 7380 */ {I_VSCALEFPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32656, 301},
+    /* 7381 */ {I_VSCALEFPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32664, 301},
+    /* 7382 */ {I_VSCALEFPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+32672, 302},
+    /* 7383 */ {I_VSCALEFPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32680, 302},
+    /* 7384 */ {I_VSCALEFSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32688, 302},
+    /* 7385 */ {I_VSCALEFSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32696, 302},
+    /* 7386 */ {I_VSQRTPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32704, 301},
+    /* 7387 */ {I_VSQRTPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32712, 301},
+    /* 7388 */ {I_VSQRTPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32720, 302},
+    /* 7389 */ {I_VSQRTSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32728, 302},
+    /* 7390 */ {I_VSQRTSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32736, 302},
+    /* 7391 */ {I_VSUBPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32744, 301},
+    /* 7392 */ {I_VSUBPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32752, 301},
+    /* 7393 */ {I_VSUBPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32760, 301},
+    /* 7394 */ {I_VSUBPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32768, 301},
+    /* 7395 */ {I_VSUBPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+32776, 302},
+    /* 7396 */ {I_VSUBPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32784, 302},
+    /* 7397 */ {I_VSUBSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32792, 302},
+    /* 7398 */ {I_VSUBSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32800, 302},
+    /* 7399 */ {I_VUCOMISH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+32808, 302},
+    /* 7400 */ {I_AADD, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+32816, 305},
+    /* 7401 */ {I_AADD, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+32824, 306},
+    /* 7402 */ {I_AAND, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+32832, 305},
+    /* 7403 */ {I_AAND, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+32840, 306},
+    /* 7404 */ {I_AXOR, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+32848, 305},
+    /* 7405 */ {I_AXOR, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+32856, 306},
+    /* 7406 */ {I_CLUI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46175, 307},
+    /* 7407 */ {I_SENDUIPI, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42588, 307},
+    /* 7408 */ {I_STUI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46181, 307},
+    /* 7409 */ {I_TESTUI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46187, 307},
+    /* 7410 */ {I_UIRET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46193, 307},
+    /* 7411 */ {I_CMPAXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42595, 308},
+    /* 7412 */ {I_CMPCXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42609, 308},
+    /* 7413 */ {I_CMPGXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42630, 308},
+    /* 7414 */ {I_CMPLXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42644, 308},
+    /* 7415 */ {I_CMPNAXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42616, 308},
+    /* 7416 */ {I_CMPNCXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42602, 308},
+    /* 7417 */ {I_CMPNGXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42651, 308},
+    /* 7418 */ {I_CMPNLXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42637, 308},
+    /* 7419 */ {I_CMPNOXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42665, 308},
+    /* 7420 */ {I_CMPNSXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42679, 308},
+    /* 7421 */ {I_CMPNZXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42658, 308},
+    /* 7422 */ {I_CMPOXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42686, 308},
+    /* 7423 */ {I_CMPPEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42693, 308},
+    /* 7424 */ {I_CMPPOXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42672, 308},
+    /* 7425 */ {I_CMPSXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42700, 308},
+    /* 7426 */ {I_CMPZXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42623, 308},
+    /* 7427 */ {I_CMPAXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42707, 309},
+    /* 7428 */ {I_CMPCXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42721, 309},
+    /* 7429 */ {I_CMPGXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42742, 309},
+    /* 7430 */ {I_CMPLXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42756, 309},
+    /* 7431 */ {I_CMPNAXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42728, 309},
+    /* 7432 */ {I_CMPNCXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42714, 309},
+    /* 7433 */ {I_CMPNGXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42763, 309},
+    /* 7434 */ {I_CMPNLXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42749, 309},
+    /* 7435 */ {I_CMPNOXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42777, 309},
+    /* 7436 */ {I_CMPNSXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42791, 309},
+    /* 7437 */ {I_CMPNZXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42770, 309},
+    /* 7438 */ {I_CMPOXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42798, 309},
+    /* 7439 */ {I_CMPPEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42805, 309},
+    /* 7440 */ {I_CMPPOXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42784, 309},
+    /* 7441 */ {I_CMPSXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42812, 309},
+    /* 7442 */ {I_CMPZXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42735, 309},
+    /* 7443 */ {I_ERETS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46199, 310},
+    /* 7444 */ {I_ERETU, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46205, 310},
+    /* 7445 */ {I_LKGS, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42827, 311},
+    /* 7446 */ {I_LKGS, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42827, 312},
+    /* 7447 */ {I_LKGS, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42826, 312},
+    /* 7448 */ {I_WRMSRNS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46211, 314},
+    /* 7449 */ {I_RDMSRLIST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46217, 315},
+    /* 7450 */ {I_WRMSRLIST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46223, 315},
+    /* 7451 */ {I_HRESET, 2, {IMMEDIATE,REG_EAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+32864, 316},
+    /* 7452 */ {I_HINT_NOP0, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46229, 317},
+    /* 7453 */ {I_HINT_NOP0, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46235, 317},
+    /* 7454 */ {I_HINT_NOP0, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46241, 318},
+    /* 7455 */ {I_HINT_NOP1, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46247, 317},
+    /* 7456 */ {I_HINT_NOP1, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46253, 317},
+    /* 7457 */ {I_HINT_NOP1, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46259, 318},
+    /* 7458 */ {I_HINT_NOP2, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46265, 317},
+    /* 7459 */ {I_HINT_NOP2, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46271, 317},
+    /* 7460 */ {I_HINT_NOP2, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46277, 318},
+    /* 7461 */ {I_HINT_NOP3, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46283, 317},
+    /* 7462 */ {I_HINT_NOP3, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46289, 317},
+    /* 7463 */ {I_HINT_NOP3, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46295, 318},
+    /* 7464 */ {I_HINT_NOP4, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46301, 317},
+    /* 7465 */ {I_HINT_NOP4, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46307, 317},
+    /* 7466 */ {I_HINT_NOP4, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46313, 318},
+    /* 7467 */ {I_HINT_NOP5, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46319, 317},
+    /* 7468 */ {I_HINT_NOP5, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46325, 317},
+    /* 7469 */ {I_HINT_NOP5, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46331, 318},
+    /* 7470 */ {I_HINT_NOP6, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46337, 317},
+    /* 7471 */ {I_HINT_NOP6, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46343, 317},
+    /* 7472 */ {I_HINT_NOP6, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46349, 318},
+    /* 7473 */ {I_HINT_NOP7, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46355, 317},
+    /* 7474 */ {I_HINT_NOP7, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46361, 317},
+    /* 7475 */ {I_HINT_NOP7, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46367, 318},
+    /* 7476 */ {I_HINT_NOP8, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46373, 317},
+    /* 7477 */ {I_HINT_NOP8, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46379, 317},
+    /* 7478 */ {I_HINT_NOP8, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46385, 318},
+    /* 7479 */ {I_HINT_NOP9, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46391, 317},
+    /* 7480 */ {I_HINT_NOP9, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46397, 317},
+    /* 7481 */ {I_HINT_NOP9, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46403, 318},
+    /* 7482 */ {I_HINT_NOP10, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46409, 317},
+    /* 7483 */ {I_HINT_NOP10, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46415, 317},
+    /* 7484 */ {I_HINT_NOP10, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46421, 318},
+    /* 7485 */ {I_HINT_NOP11, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46427, 317},
+    /* 7486 */ {I_HINT_NOP11, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46433, 317},
+    /* 7487 */ {I_HINT_NOP11, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46439, 318},
+    /* 7488 */ {I_HINT_NOP12, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46445, 317},
+    /* 7489 */ {I_HINT_NOP12, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46451, 317},
+    /* 7490 */ {I_HINT_NOP12, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46457, 318},
+    /* 7491 */ {I_HINT_NOP13, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46463, 317},
+    /* 7492 */ {I_HINT_NOP13, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46469, 317},
+    /* 7493 */ {I_HINT_NOP13, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46475, 318},
+    /* 7494 */ {I_HINT_NOP14, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46481, 317},
+    /* 7495 */ {I_HINT_NOP14, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46487, 317},
+    /* 7496 */ {I_HINT_NOP14, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46493, 318},
+    /* 7497 */ {I_HINT_NOP15, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46499, 317},
+    /* 7498 */ {I_HINT_NOP15, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46505, 317},
+    /* 7499 */ {I_HINT_NOP15, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46511, 318},
+    /* 7500 */ {I_HINT_NOP16, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46517, 317},
+    /* 7501 */ {I_HINT_NOP16, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46523, 317},
+    /* 7502 */ {I_HINT_NOP16, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46529, 318},
+    /* 7503 */ {I_HINT_NOP17, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46535, 317},
+    /* 7504 */ {I_HINT_NOP17, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46541, 317},
+    /* 7505 */ {I_HINT_NOP17, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46547, 318},
+    /* 7506 */ {I_HINT_NOP18, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46553, 317},
+    /* 7507 */ {I_HINT_NOP18, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46559, 317},
+    /* 7508 */ {I_HINT_NOP18, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46565, 318},
+    /* 7509 */ {I_HINT_NOP19, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46571, 317},
+    /* 7510 */ {I_HINT_NOP19, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46577, 317},
+    /* 7511 */ {I_HINT_NOP19, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46583, 318},
+    /* 7512 */ {I_HINT_NOP20, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46589, 317},
+    /* 7513 */ {I_HINT_NOP20, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46595, 317},
+    /* 7514 */ {I_HINT_NOP20, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46601, 318},
+    /* 7515 */ {I_HINT_NOP21, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46607, 317},
+    /* 7516 */ {I_HINT_NOP21, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46613, 317},
+    /* 7517 */ {I_HINT_NOP21, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46619, 318},
+    /* 7518 */ {I_HINT_NOP22, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46625, 317},
+    /* 7519 */ {I_HINT_NOP22, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46631, 317},
+    /* 7520 */ {I_HINT_NOP22, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46637, 318},
+    /* 7521 */ {I_HINT_NOP23, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46643, 317},
+    /* 7522 */ {I_HINT_NOP23, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46649, 317},
+    /* 7523 */ {I_HINT_NOP23, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46655, 318},
+    /* 7524 */ {I_HINT_NOP24, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46661, 317},
+    /* 7525 */ {I_HINT_NOP24, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46667, 317},
+    /* 7526 */ {I_HINT_NOP24, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46673, 318},
+    /* 7527 */ {I_HINT_NOP25, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46679, 317},
+    /* 7528 */ {I_HINT_NOP25, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46685, 317},
+    /* 7529 */ {I_HINT_NOP25, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46691, 318},
+    /* 7530 */ {I_HINT_NOP26, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46697, 317},
+    /* 7531 */ {I_HINT_NOP26, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46703, 317},
+    /* 7532 */ {I_HINT_NOP26, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46709, 318},
+    /* 7533 */ {I_HINT_NOP27, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46715, 317},
+    /* 7534 */ {I_HINT_NOP27, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46721, 317},
+    /* 7535 */ {I_HINT_NOP27, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46727, 318},
+    /* 7536 */ {I_HINT_NOP28, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46733, 317},
+    /* 7537 */ {I_HINT_NOP28, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46739, 317},
+    /* 7538 */ {I_HINT_NOP28, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46745, 318},
+    /* 7539 */ {I_HINT_NOP29, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46751, 317},
+    /* 7540 */ {I_HINT_NOP29, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46757, 317},
+    /* 7541 */ {I_HINT_NOP29, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46763, 318},
+    /* 7542 */ {I_HINT_NOP30, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46769, 317},
+    /* 7543 */ {I_HINT_NOP30, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46775, 317},
+    /* 7544 */ {I_HINT_NOP30, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46781, 318},
+    /* 7545 */ {I_HINT_NOP31, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46787, 317},
+    /* 7546 */ {I_HINT_NOP31, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46793, 317},
+    /* 7547 */ {I_HINT_NOP31, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46799, 318},
+    /* 7548 */ {I_HINT_NOP32, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46805, 317},
+    /* 7549 */ {I_HINT_NOP32, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46811, 317},
+    /* 7550 */ {I_HINT_NOP32, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46817, 318},
+    /* 7551 */ {I_HINT_NOP33, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46823, 317},
+    /* 7552 */ {I_HINT_NOP33, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46829, 317},
+    /* 7553 */ {I_HINT_NOP33, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46835, 318},
+    /* 7554 */ {I_HINT_NOP34, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46841, 317},
+    /* 7555 */ {I_HINT_NOP34, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46847, 317},
+    /* 7556 */ {I_HINT_NOP34, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46853, 318},
+    /* 7557 */ {I_HINT_NOP35, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46859, 317},
+    /* 7558 */ {I_HINT_NOP35, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46865, 317},
+    /* 7559 */ {I_HINT_NOP35, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46871, 318},
+    /* 7560 */ {I_HINT_NOP36, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46877, 317},
+    /* 7561 */ {I_HINT_NOP36, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46883, 317},
+    /* 7562 */ {I_HINT_NOP36, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46889, 318},
+    /* 7563 */ {I_HINT_NOP37, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46895, 317},
+    /* 7564 */ {I_HINT_NOP37, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46901, 317},
+    /* 7565 */ {I_HINT_NOP37, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46907, 318},
+    /* 7566 */ {I_HINT_NOP38, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46913, 317},
+    /* 7567 */ {I_HINT_NOP38, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46919, 317},
+    /* 7568 */ {I_HINT_NOP38, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46925, 318},
+    /* 7569 */ {I_HINT_NOP39, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46931, 317},
+    /* 7570 */ {I_HINT_NOP39, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46937, 317},
+    /* 7571 */ {I_HINT_NOP39, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46943, 318},
+    /* 7572 */ {I_HINT_NOP40, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46949, 317},
+    /* 7573 */ {I_HINT_NOP40, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46955, 317},
+    /* 7574 */ {I_HINT_NOP40, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46961, 318},
+    /* 7575 */ {I_HINT_NOP41, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46967, 317},
+    /* 7576 */ {I_HINT_NOP41, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46973, 317},
+    /* 7577 */ {I_HINT_NOP41, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46979, 318},
+    /* 7578 */ {I_HINT_NOP42, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46985, 317},
+    /* 7579 */ {I_HINT_NOP42, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46991, 317},
+    /* 7580 */ {I_HINT_NOP42, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46997, 318},
+    /* 7581 */ {I_HINT_NOP43, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47003, 317},
+    /* 7582 */ {I_HINT_NOP43, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47009, 317},
+    /* 7583 */ {I_HINT_NOP43, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47015, 318},
+    /* 7584 */ {I_HINT_NOP44, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47021, 317},
+    /* 7585 */ {I_HINT_NOP44, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47027, 317},
+    /* 7586 */ {I_HINT_NOP44, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47033, 318},
+    /* 7587 */ {I_HINT_NOP45, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47039, 317},
+    /* 7588 */ {I_HINT_NOP45, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47045, 317},
+    /* 7589 */ {I_HINT_NOP45, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47051, 318},
+    /* 7590 */ {I_HINT_NOP46, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47057, 317},
+    /* 7591 */ {I_HINT_NOP46, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47063, 317},
+    /* 7592 */ {I_HINT_NOP46, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47069, 318},
+    /* 7593 */ {I_HINT_NOP47, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47075, 317},
+    /* 7594 */ {I_HINT_NOP47, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47081, 317},
+    /* 7595 */ {I_HINT_NOP47, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47087, 318},
+    /* 7596 */ {I_HINT_NOP48, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47093, 317},
+    /* 7597 */ {I_HINT_NOP48, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47099, 317},
+    /* 7598 */ {I_HINT_NOP48, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47105, 318},
+    /* 7599 */ {I_HINT_NOP49, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47111, 317},
+    /* 7600 */ {I_HINT_NOP49, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47117, 317},
+    /* 7601 */ {I_HINT_NOP49, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47123, 318},
+    /* 7602 */ {I_HINT_NOP50, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47129, 317},
+    /* 7603 */ {I_HINT_NOP50, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47135, 317},
+    /* 7604 */ {I_HINT_NOP50, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47141, 318},
+    /* 7605 */ {I_HINT_NOP51, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47147, 317},
+    /* 7606 */ {I_HINT_NOP51, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47153, 317},
+    /* 7607 */ {I_HINT_NOP51, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47159, 318},
+    /* 7608 */ {I_HINT_NOP52, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47165, 317},
+    /* 7609 */ {I_HINT_NOP52, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47171, 317},
+    /* 7610 */ {I_HINT_NOP52, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47177, 318},
+    /* 7611 */ {I_HINT_NOP53, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47183, 317},
+    /* 7612 */ {I_HINT_NOP53, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47189, 317},
+    /* 7613 */ {I_HINT_NOP53, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47195, 318},
+    /* 7614 */ {I_HINT_NOP54, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47201, 317},
+    /* 7615 */ {I_HINT_NOP54, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47207, 317},
+    /* 7616 */ {I_HINT_NOP54, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47213, 318},
+    /* 7617 */ {I_HINT_NOP55, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47219, 317},
+    /* 7618 */ {I_HINT_NOP55, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47225, 317},
+    /* 7619 */ {I_HINT_NOP55, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47231, 318},
+    /* 7620 */ {I_HINT_NOP56, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43529, 317},
+    /* 7621 */ {I_HINT_NOP56, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43535, 317},
+    /* 7622 */ {I_HINT_NOP56, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43541, 318},
+    /* 7623 */ {I_HINT_NOP57, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47237, 317},
+    /* 7624 */ {I_HINT_NOP57, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47243, 317},
+    /* 7625 */ {I_HINT_NOP57, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47249, 318},
+    /* 7626 */ {I_HINT_NOP58, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47255, 317},
+    /* 7627 */ {I_HINT_NOP58, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47261, 317},
+    /* 7628 */ {I_HINT_NOP58, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47267, 318},
+    /* 7629 */ {I_HINT_NOP59, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47273, 317},
+    /* 7630 */ {I_HINT_NOP59, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47279, 317},
+    /* 7631 */ {I_HINT_NOP59, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47285, 318},
+    /* 7632 */ {I_HINT_NOP60, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47291, 317},
+    /* 7633 */ {I_HINT_NOP60, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47297, 317},
+    /* 7634 */ {I_HINT_NOP60, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47303, 318},
+    /* 7635 */ {I_HINT_NOP61, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47309, 317},
+    /* 7636 */ {I_HINT_NOP61, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47315, 317},
+    /* 7637 */ {I_HINT_NOP61, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47321, 318},
+    /* 7638 */ {I_HINT_NOP62, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47327, 317},
+    /* 7639 */ {I_HINT_NOP62, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47333, 317},
+    /* 7640 */ {I_HINT_NOP62, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47339, 318},
+    /* 7641 */ {I_HINT_NOP63, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47345, 317},
+    /* 7642 */ {I_HINT_NOP63, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47351, 317},
+    /* 7643 */ {I_HINT_NOP63, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47357, 318},
+};
+
+static const struct itemplate * const itable_00 = {
+    instrux + 43,
+    instrux + 44,
+};
+
+static const struct itemplate * const itable_01 = {
+    instrux + 45,
+    instrux + 46,
+    instrux + 47,
+    instrux + 48,
+    instrux + 49,
+    instrux + 50,
+};
+
+static const struct itemplate * const itable_02 = {
+    instrux + 51,
+    instrux + 52,
+};
+
+static const struct itemplate * const itable_03 = {
+    instrux + 53,
+    instrux + 54,
+    instrux + 55,
+    instrux + 56,
+    instrux + 57,
+    instrux + 58,
+};
+
+static const struct itemplate * const itable_04 = {
+    instrux + 62,
+};
+
+static const struct itemplate * const itable_05 = {
+    instrux + 63,
+    instrux + 64,
+    instrux + 65,
+};
+
+static const struct itemplate * const itable_06 = {
+    instrux + 845,
+};
+
+static const struct itemplate * const itable_07 = {
+    instrux + 794,
+};
+
+static const struct itemplate * const itable_08 = {
+    instrux + 697,
+    instrux + 698,
+};
+
+static const struct itemplate * const itable_09 = {
+    instrux + 699,
+    instrux + 700,
+    instrux + 701,
+    instrux + 702,
+    instrux + 703,
+    instrux + 704,
+};
+
+static const struct itemplate * const itable_0A = {
+    instrux + 705,
+    instrux + 706,
+};
+
+static const struct itemplate * const itable_0B = {
+    instrux + 707,
+    instrux + 708,
+    instrux + 709,
+    instrux + 710,
+    instrux + 711,
+    instrux + 712,
+};
+
+static const struct itemplate * const itable_0C = {
+    instrux + 716,
+};
+
+static const struct itemplate * const itable_0D = {
+    instrux + 717,
+    instrux + 718,
+    instrux + 719,
+};
+
+static const struct itemplate * const itable_0E = {
+    instrux + 846,
+};
+
+static const struct itemplate * const itable_0F00 = {
+    instrux + 525,
+    instrux + 526,
+    instrux + 555,
+    instrux + 556,
+    instrux + 557,
+    instrux + 598,
+    instrux + 599,
+    instrux + 600,
+    instrux + 1045,
+    instrux + 1046,
+    instrux + 1047,
+    instrux + 1048,
+    instrux + 1049,
+    instrux + 1064,
+    instrux + 1065,
+    instrux + 1066,
+    instrux + 1067,
+    instrux + 1068,
+    instrux + 1137,
+    instrux + 1138,
+    instrux + 1139,
+    instrux + 1140,
+    instrux + 1141,
+    instrux + 1142,
+    instrux + 7445,
+    instrux + 7446,
+    instrux + 7447,
+};
+
+static const struct itemplate * const itable_0F01 = {
+    instrux + 491,
+    instrux + 492,
+    instrux + 493,
+    instrux + 494,
+    instrux + 495,
+    instrux + 550,
+    instrux + 554,
+    instrux + 558,
+    instrux + 559,
+    instrux + 560,
+    instrux + 602,
+    instrux + 603,
+    instrux + 683,
+    instrux + 684,
+    instrux + 893,
+    instrux + 995,
+    instrux + 1044,
+    instrux + 1050,
+    instrux + 1052,
+    instrux + 1053,
+    instrux + 1054,
+    instrux + 1055,
+    instrux + 1056,
+    instrux + 1101,
+    instrux + 1491,
+    instrux + 1492,
+    instrux + 1724,
+    instrux + 1725,
+    instrux + 1726,
+    instrux + 1728,
+    instrux + 1729,
+    instrux + 1730,
+    instrux + 1731,
+    instrux + 1736,
+    instrux + 1737,
+    instrux + 1738,
+    instrux + 1741,
+    instrux + 1747,
+    instrux + 1748,
+    instrux + 1749,
+    instrux + 1750,
+    instrux + 3376,
+    instrux + 3377,
+    instrux + 3985,
+    instrux + 3986,
+    instrux + 6776,
+    instrux + 6777,
+    instrux + 6784,
+    instrux + 6793,
+    instrux + 6968,
+    instrux + 6969,
+    instrux + 6970,
+    instrux + 6978,
+    instrux + 6979,
+    instrux + 6980,
+    instrux + 6991,
+    instrux + 6992,
+    instrux + 6994,
+    instrux + 6995,
+    instrux + 7406,
+    instrux + 7408,
+    instrux + 7409,
+    instrux + 7410,
+    instrux + 7443,
+    instrux + 7444,
+    instrux + 7448,
+    instrux + 7449,
+    instrux + 7450,
+};
+
+static const struct itemplate * const itable_0F02 = {
+    instrux + 528,
+    instrux + 529,
+    instrux + 530,
+    instrux + 531,
+    instrux + 532,
+    instrux + 533,
+    instrux + 534,
+    instrux + 535,
+    instrux + 536,
+    instrux + 537,
+};
+
+static const struct itemplate * const itable_0F03 = {
+    instrux + 585,
+    instrux + 586,
+    instrux + 587,
+    instrux + 588,
+    instrux + 589,
+    instrux + 590,
+    instrux + 591,
+    instrux + 592,
+    instrux + 593,
+    instrux + 594,
+};
+
+static const struct itemplate * const itable_0F05 = {
+    instrux + 1102,
+};
+
+static const struct itemplate * const itable_0F06 = {
+    instrux + 181,
+};
+
+static const struct itemplate * const itable_0F07 = {
+    instrux + 1105,
+};
+
+static const struct itemplate * const itable_0F08 = {
+    instrux + 488,
+};
+
+static const struct itemplate * const itable_0F09 = {
+    instrux + 1144,
+    instrux + 6799,
+    instrux + 6993,
+};
+
+static const struct itemplate * const itable_0F0B = {
+    instrux + 1136,
+};
+
+static const struct itemplate * const itable_0F0D = {
+    instrux + 807,
+    instrux + 808,
+    instrux + 4036,
+};
+
+static const struct itemplate * const itable_0F0E = {
+    instrux + 314,
+};
+
+static const struct itemplate * const itable_0F0F = {
+    instrux + 751,
+    instrux + 759,
+    instrux + 760,
+    instrux + 761,
+    instrux + 762,
+    instrux + 763,
+    instrux + 764,
+    instrux + 765,
+    instrux + 766,
+    instrux + 767,
+    instrux + 768,
+    instrux + 769,
+    instrux + 770,
+    instrux + 771,
+    instrux + 772,
+    instrux + 773,
+    instrux + 774,
+    instrux + 775,
+    instrux + 780,
+    instrux + 1528,
+    instrux + 1529,
+    instrux + 1530,
+    instrux + 1531,
+    instrux + 1532,
+    instrux + 1865,
+    instrux + 1866,
+};
+
+static const struct itemplate * const itable_0F10 = {
+    instrux + 1466,
+    instrux + 1468,
+    instrux + 1698,
+    instrux + 1700,
+};
+
+static const struct itemplate * const itable_0F11 = {
+    instrux + 1467,
+    instrux + 1469,
+    instrux + 1699,
+    instrux + 1701,
+};
+
+static const struct itemplate * const itable_0F12 = {
+    instrux + 1460,
+    instrux + 1462,
+    instrux + 1695,
+    instrux + 1721,
+    instrux + 1723,
+};
+
+static const struct itemplate * const itable_0F13 = {
+    instrux + 1461,
+    instrux + 1694,
+};
+
+static const struct itemplate * const itable_0F14 = {
+    instrux + 1485,
+    instrux + 1712,
+};
+
+static const struct itemplate * const itable_0F15 = {
+    instrux + 1484,
+    instrux + 1711,
+};
+
+static const struct itemplate * const itable_0F16 = {
+    instrux + 1457,
+    instrux + 1459,
+    instrux + 1693,
+    instrux + 1722,
+};
+
+static const struct itemplate * const itable_0F17 = {
+    instrux + 1458,
+    instrux + 1692,
+};
+
+static const struct itemplate * const itable_0F18 = {
+    instrux + 1505,
+    instrux + 1506,
+    instrux + 1507,
+    instrux + 1508,
+    instrux + 1509,
+    instrux + 1510,
+    instrux + 7452,
+    instrux + 7453,
+    instrux + 7454,
+    instrux + 7455,
+    instrux + 7456,
+    instrux + 7457,
+    instrux + 7458,
+    instrux + 7459,
+    instrux + 7460,
+    instrux + 7461,
+    instrux + 7462,
+    instrux + 7463,
+    instrux + 7464,
+    instrux + 7465,
+    instrux + 7466,
+    instrux + 7467,
+    instrux + 7468,
+    instrux + 7469,
+    instrux + 7470,
+    instrux + 7471,
+    instrux + 7472,
+    instrux + 7473,
+    instrux + 7474,
+    instrux + 7475,
+};
+
+static const struct itemplate * const itable_0F19 = {
+    instrux + 7476,
+    instrux + 7477,
+    instrux + 7478,
+    instrux + 7479,
+    instrux + 7480,
+    instrux + 7481,
+    instrux + 7482,
+    instrux + 7483,
+    instrux + 7484,
+    instrux + 7485,
+    instrux + 7486,
+    instrux + 7487,
+    instrux + 7488,
+    instrux + 7489,
+    instrux + 7490,
+    instrux + 7491,
+    instrux + 7492,
+    instrux + 7493,
+    instrux + 7494,
+    instrux + 7495,
+    instrux + 7496,
+    instrux + 7497,
+    instrux + 7498,
+    instrux + 7499,
+};
+
+static const struct itemplate * const itable_0F1A = {
+    instrux + 4038,
+    instrux + 4039,
+    instrux + 4040,
+    instrux + 4041,
+    instrux + 4042,
+    instrux + 4043,
+    instrux + 4047,
+    instrux + 4048,
+    instrux + 4051,
+    instrux + 4052,
+    instrux + 4053,
+    instrux + 7500,
+    instrux + 7501,
+    instrux + 7502,
+    instrux + 7503,
+    instrux + 7504,
+    instrux + 7505,
+    instrux + 7506,
+    instrux + 7507,
+    instrux + 7508,
+    instrux + 7509,
+    instrux + 7510,
+    instrux + 7511,
+    instrux + 7512,
+    instrux + 7513,
+    instrux + 7514,
+    instrux + 7515,
+    instrux + 7516,
+    instrux + 7517,
+    instrux + 7518,
+    instrux + 7519,
+    instrux + 7520,
+    instrux + 7521,
+    instrux + 7522,
+    instrux + 7523,
+};
+
+static const struct itemplate * const itable_0F1B = {
+    instrux + 4037,
+    instrux + 4044,
+    instrux + 4045,
+    instrux + 4046,
+    instrux + 4049,
+    instrux + 4050,
+    instrux + 4054,
+    instrux + 4055,
+    instrux + 4056,
+    instrux + 4057,
+    instrux + 4058,
+    instrux + 7524,
+    instrux + 7525,
+    instrux + 7526,
+    instrux + 7527,
+    instrux + 7528,
+    instrux + 7529,
+    instrux + 7530,
+    instrux + 7531,
+    instrux + 7532,
+    instrux + 7533,
+    instrux + 7534,
+    instrux + 7535,
+    instrux + 7536,
+    instrux + 7537,
+    instrux + 7538,
+    instrux + 7539,
+    instrux + 7540,
+    instrux + 7541,
+    instrux + 7542,
+    instrux + 7543,
+    instrux + 7544,
+    instrux + 7545,
+    instrux + 7546,
+    instrux + 7547,
+};
+
+static const struct itemplate * const itable_0F1C = {
+    instrux + 6787,
+    instrux + 7548,
+    instrux + 7549,
+    instrux + 7550,
+    instrux + 7551,
+    instrux + 7552,
+    instrux + 7553,
+    instrux + 7554,
+    instrux + 7555,
+    instrux + 7556,
+    instrux + 7557,
+    instrux + 7558,
+    instrux + 7559,
+    instrux + 7560,
+    instrux + 7561,
+    instrux + 7562,
+    instrux + 7563,
+    instrux + 7564,
+    instrux + 7565,
+    instrux + 7566,
+    instrux + 7567,
+    instrux + 7568,
+    instrux + 7569,
+    instrux + 7570,
+    instrux + 7571,
+};
+
+static const struct itemplate * const itable_0F1D = {
+    instrux + 7572,
+    instrux + 7573,
+    instrux + 7574,
+    instrux + 7575,
+    instrux + 7576,
+    instrux + 7577,
+    instrux + 7578,
+    instrux + 7579,
+    instrux + 7580,
+    instrux + 7581,
+    instrux + 7582,
+    instrux + 7583,
+    instrux + 7584,
+    instrux + 7585,
+    instrux + 7586,
+    instrux + 7587,
+    instrux + 7588,
+    instrux + 7589,
+    instrux + 7590,
+    instrux + 7591,
+    instrux + 7592,
+    instrux + 7593,
+    instrux + 7594,
+    instrux + 7595,
+};
+
+static const struct itemplate * const itable_0F1E = {
+    instrux + 6972,
+    instrux + 6973,
+    instrux + 6976,
+    instrux + 6977,
+    instrux + 7596,
+    instrux + 7597,
+    instrux + 7598,
+    instrux + 7599,
+    instrux + 7600,
+    instrux + 7601,
+    instrux + 7602,
+    instrux + 7603,
+    instrux + 7604,
+    instrux + 7605,
+    instrux + 7606,
+    instrux + 7607,
+    instrux + 7608,
+    instrux + 7609,
+    instrux + 7610,
+    instrux + 7611,
+    instrux + 7612,
+    instrux + 7613,
+    instrux + 7614,
+    instrux + 7615,
+    instrux + 7616,
+    instrux + 7617,
+    instrux + 7618,
+    instrux + 7619,
+};
+
+static const struct itemplate * const itable_0F1F = {
+    instrux + 690,
+    instrux + 691,
+    instrux + 692,
+    instrux + 7620,
+    instrux + 7621,
+    instrux + 7622,
+    instrux + 7623,
+    instrux + 7624,
+    instrux + 7625,
+    instrux + 7626,
+    instrux + 7627,
+    instrux + 7628,
+    instrux + 7629,
+    instrux + 7630,
+    instrux + 7631,
+    instrux + 7632,
+    instrux + 7633,
+    instrux + 7634,
+    instrux + 7635,
+    instrux + 7636,
+    instrux + 7637,
+    instrux + 7638,
+    instrux + 7639,
+    instrux + 7640,
+    instrux + 7641,
+    instrux + 7642,
+    instrux + 7643,
+};
+
+static const struct itemplate * const itable_0F20 = {
+    instrux + 620,
+    instrux + 621,
+};
+
+static const struct itemplate * const itable_0F21 = {
+    instrux + 624,
+    instrux + 625,
+};
+
+static const struct itemplate * const itable_0F22 = {
+    instrux + 622,
+    instrux + 623,
+};
+
+static const struct itemplate * const itable_0F23 = {
+    instrux + 626,
+    instrux + 627,
+};
+
+static const struct itemplate * const itable_0F28 = {
+    instrux + 1455,
+    instrux + 1690,
+};
+
+static const struct itemplate * const itable_0F29 = {
+    instrux + 1456,
+    instrux + 1691,
+};
+
+static const struct itemplate * const itable_0F2A = {
+    instrux + 1437,
+    instrux + 1439,
+    instrux + 1440,
+    instrux + 1666,
+    instrux + 1674,
+    instrux + 1675,
+};
+
+static const struct itemplate * const itable_0F2B = {
+    instrux + 1465,
+    instrux + 1538,
+    instrux + 1787,
+    instrux + 1788,
+};
+
+static const struct itemplate * const itable_0F2C = {
+    instrux + 1445,
+    instrux + 1446,
+    instrux + 1447,
+    instrux + 1677,
+    instrux + 1680,
+    instrux + 1681,
+    instrux + 1682,
+    instrux + 1683,
+};
+
+static const struct itemplate * const itable_0F2D = {
+    instrux + 1438,
+    instrux + 1441,
+    instrux + 1442,
+    instrux + 1443,
+    instrux + 1444,
+    instrux + 1664,
+    instrux + 1669,
+    instrux + 1670,
+    instrux + 1671,
+    instrux + 1672,
+};
+
+static const struct itemplate * const itable_0F2E = {
+    instrux + 1483,
+    instrux + 1710,
+};
+
+static const struct itemplate * const itable_0F2F = {
+    instrux + 1436,
+    instrux + 1660,
+};
+
+static const struct itemplate * const itable_0F30 = {
+    instrux + 1146,
+};
+
+static const struct itemplate * const itable_0F31 = {
+    instrux + 892,
+};
+
+static const struct itemplate * const itable_0F32 = {
+    instrux + 890,
+};
+
+static const struct itemplate * const itable_0F33 = {
+    instrux + 891,
+};
+
+static const struct itemplate * const itable_0F34 = {
+    instrux + 1103,
+};
+
+static const struct itemplate * const itable_0F35 = {
+    instrux + 1104,
+};
+
+static const struct itemplate * const itable_0F36 = {
+    instrux + 889,
+};
+
+static const struct itemplate * const itable_0F37 = {
+    instrux + 1145,
+    instrux + 1864,
+};
+
+static const struct itemplate * const itable_0F3800 = {
+    instrux + 1775,
+    instrux + 1776,
+};
+
+static const struct itemplate * const itable_0F3801 = {
+    instrux + 1759,
+    instrux + 1760,
+};
+
+static const struct itemplate * const itable_0F3802 = {
+    instrux + 1761,
+    instrux + 1762,
+};
+
+static const struct itemplate * const itable_0F3803 = {
+    instrux + 1763,
+    instrux + 1764,
+};
+
+static const struct itemplate * const itable_0F3804 = {
+    instrux + 1771,
+    instrux + 1772,
+};
+
+static const struct itemplate * const itable_0F3805 = {
+    instrux + 1765,
+    instrux + 1766,
+};
+
+static const struct itemplate * const itable_0F3806 = {
+    instrux + 1767,
+    instrux + 1768,
+};
+
+static const struct itemplate * const itable_0F3807 = {
+    instrux + 1769,
+    instrux + 1770,
+};
+
+static const struct itemplate * const itable_0F3808 = {
+    instrux + 1777,
+    instrux + 1778,
+};
+
+static const struct itemplate * const itable_0F3809 = {
+    instrux + 1779,
+    instrux + 1780,
+};
+
+static const struct itemplate * const itable_0F380A = {
+    instrux + 1781,
+    instrux + 1782,
+};
+
+static const struct itemplate * const itable_0F380B = {
+    instrux + 1773,
+    instrux + 1774,
+};
+
+static const struct itemplate * const itable_0F3810 = {
+    instrux + 1806,
+    instrux + 1807,
+};
+
+static const struct itemplate * const itable_0F3814 = {
+    instrux + 1796,
+    instrux + 1797,
+};
+
+static const struct itemplate * const itable_0F3815 = {
+    instrux + 1794,
+    instrux + 1795,
+};
+
+static const struct itemplate * const itable_0F3817 = {
+    instrux + 1846,
+};
+
+static const struct itemplate * const itable_0F381C = {
+    instrux + 1751,
+    instrux + 1752,
+};
+
+static const struct itemplate * const itable_0F381D = {
+    instrux + 1753,
+    instrux + 1754,
+};
+
+static const struct itemplate * const itable_0F381E = {
+    instrux + 1755,
+    instrux + 1756,
+};
+
+static const struct itemplate * const itable_0F3820 = {
+    instrux + 1832,
+};
+
+static const struct itemplate * const itable_0F3821 = {
+    instrux + 1833,
+};
+
+static const struct itemplate * const itable_0F3822 = {
+    instrux + 1834,
+};
+
+static const struct itemplate * const itable_0F3823 = {
+    instrux + 1835,
+};
+
+static const struct itemplate * const itable_0F3824 = {
+    instrux + 1836,
+};
+
+static const struct itemplate * const itable_0F3825 = {
+    instrux + 1837,
+};
+
+static const struct itemplate * const itable_0F3828 = {
+    instrux + 1844,
+};
+
+static const struct itemplate * const itable_0F3829 = {
+    instrux + 1809,
+};
+
+static const struct itemplate * const itable_0F382A = {
+    instrux + 1803,
+};
+
+static const struct itemplate * const itable_0F382B = {
+    instrux + 1805,
+};
+
+static const struct itemplate * const itable_0F3830 = {
+    instrux + 1838,
+};
+
+static const struct itemplate * const itable_0F3831 = {
+    instrux + 1839,
+};
+
+static const struct itemplate * const itable_0F3832 = {
+    instrux + 1840,
+};
+
+static const struct itemplate * const itable_0F3833 = {
+    instrux + 1841,
+};
+
+static const struct itemplate * const itable_0F3834 = {
+    instrux + 1842,
+};
+
+static const struct itemplate * const itable_0F3835 = {
+    instrux + 1843,
+};
+
+static const struct itemplate * const itable_0F3837 = {
+    instrux + 1860,
+};
+
+static const struct itemplate * const itable_0F3838 = {
+    instrux + 1828,
+};
+
+static const struct itemplate * const itable_0F3839 = {
+    instrux + 1829,
+};
+
+static const struct itemplate * const itable_0F383A = {
+    instrux + 1831,
+};
+
+static const struct itemplate * const itable_0F383B = {
+    instrux + 1830,
+};
+
+static const struct itemplate * const itable_0F383C = {
+    instrux + 1824,
+};
+
+static const struct itemplate * const itable_0F383D = {
+    instrux + 1825,
+};
+
+static const struct itemplate * const itable_0F383E = {
+    instrux + 1827,
+};
+
+static const struct itemplate * const itable_0F383F = {
+    instrux + 1826,
+};
+
+static const struct itemplate * const itable_0F3840 = {
+    instrux + 1845,
+};
+
+static const struct itemplate * const itable_0F3841 = {
+    instrux + 1818,
+};
+
+static const struct itemplate * const itable_0F3880 = {
+    instrux + 1743,
+    instrux + 1744,
+};
+
+static const struct itemplate * const itable_0F3881 = {
+    instrux + 1745,
+    instrux + 1746,
+};
+
+static const struct itemplate * const itable_0F3882 = {
+    instrux + 489,
+    instrux + 490,
+};
+
+static const struct itemplate * const itable_0F38C8 = {
+    instrux + 4061,
+};
+
+static const struct itemplate * const itable_0F38C9 = {
+    instrux + 4059,
+};
+
+static const struct itemplate * const itable_0F38CA = {
+    instrux + 4060,
+};
+
+static const struct itemplate * const itable_0F38CB = {
+    instrux + 4065,
+    instrux + 4066,
+};
+
+static const struct itemplate * const itable_0F38CC = {
+    instrux + 4063,
+};
+
+static const struct itemplate * const itable_0F38CD = {
+    instrux + 4064,
+};
+
+static const struct itemplate * const itable_0F38CF = {
+    instrux + 6822,
+};
+
+static const struct itemplate * const itable_0F38DB = {
+    instrux + 1877,
+};
+
+static const struct itemplate * const itable_0F38DC = {
+    instrux + 1873,
+};
+
+static const struct itemplate * const itable_0F38DD = {
+    instrux + 1874,
+};
+
+static const struct itemplate * const itable_0F38DE = {
+    instrux + 1875,
+};
+
+static const struct itemplate * const itable_0F38DF = {
+    instrux + 1876,
+};
+
+static const struct itemplate * const itable_0F38F0 = {
+    instrux + 1851,
+    instrux + 1854,
+    instrux + 1867,
+    instrux + 1868,
+    instrux + 1869,
+};
+
+static const struct itemplate * const itable_0F38F1 = {
+    instrux + 1852,
+    instrux + 1853,
+    instrux + 1855,
+    instrux + 1870,
+    instrux + 1871,
+    instrux + 1872,
+};
+
+static const struct itemplate * const itable_0F38F5 = {
+    instrux + 6981,
+    instrux + 6982,
+};
+
+static const struct itemplate * const itable_0F38F6 = {
+    instrux + 3369,
+    instrux + 3370,
+    instrux + 3371,
+    instrux + 3372,
+    instrux + 6983,
+    instrux + 6984,
+};
+
+static const struct itemplate * const itable_0F38F8 = {
+    instrux + 6790,
+    instrux + 6791,
+    instrux + 6792,
+    instrux + 6985,
+    instrux + 6986,
+    instrux + 6987,
+    instrux + 6988,
+    instrux + 6989,
+    instrux + 6990,
+};
+
+static const struct itemplate * const itable_0F38F9 = {
+    instrux + 6788,
+    instrux + 6789,
+};
+
+static const struct itemplate * const itable_0F38FC = {
+    instrux + 7400,
+    instrux + 7401,
+    instrux + 7402,
+    instrux + 7403,
+    instrux + 7404,
+    instrux + 7405,
+};
+
+static const struct itemplate * const itable_0F39 = {
+    instrux + 245,
+};
+
+static const struct itemplate * const itable_0F3A08 = {
+    instrux + 1848,
+};
+
+static const struct itemplate * const itable_0F3A09 = {
+    instrux + 1847,
+};
+
+static const struct itemplate * const itable_0F3A0A = {
+    instrux + 1850,
+};
+
+static const struct itemplate * const itable_0F3A0B = {
+    instrux + 1849,
+};
+
+static const struct itemplate * const itable_0F3A0C = {
+    instrux + 1793,
+};
+
+static const struct itemplate * const itable_0F3A0D = {
+    instrux + 1792,
+};
+
+static const struct itemplate * const itable_0F3A0E = {
+    instrux + 1808,
+};
+
+static const struct itemplate * const itable_0F3A0F = {
+    instrux + 1757,
+    instrux + 1758,
+};
+
+static const struct itemplate * const itable_0F3A14 = {
+    instrux + 1810,
+    instrux + 1811,
+    instrux + 1812,
+};
+
+static const struct itemplate * const itable_0F3A15 = {
+    instrux + 1815,
+    instrux + 1816,
+    instrux + 1817,
+};
+
+static const struct itemplate * const itable_0F3A16 = {
+    instrux + 1813,
+    instrux + 1814,
+};
+
+static const struct itemplate * const itable_0F3A17 = {
+    instrux + 1800,
+    instrux + 1801,
+};
+
+static const struct itemplate * const itable_0F3A20 = {
+    instrux + 1819,
+    instrux + 1820,
+    instrux + 1821,
+};
+
+static const struct itemplate * const itable_0F3A21 = {
+    instrux + 1802,
+};
+
+static const struct itemplate * const itable_0F3A22 = {
+    instrux + 1822,
+    instrux + 1823,
+};
+
+static const struct itemplate * const itable_0F3A40 = {
+    instrux + 1799,
+};
+
+static const struct itemplate * const itable_0F3A41 = {
+    instrux + 1798,
+};
+
+static const struct itemplate * const itable_0F3A42 = {
+    instrux + 1804,
+};
+
+static const struct itemplate * const itable_0F3A44 = {
+    instrux + 3107,
+    instrux + 3108,
+    instrux + 3109,
+    instrux + 3110,
+    instrux + 3111,
+};
+
+static const struct itemplate * const itable_0F3A60 = {
+    instrux + 1857,
+};
+
+static const struct itemplate * const itable_0F3A61 = {
+    instrux + 1856,
+};
+
+static const struct itemplate * const itable_0F3A62 = {
+    instrux + 1859,
+};
+
+static const struct itemplate * const itable_0F3A63 = {
+    instrux + 1858,
+};
+
+static const struct itemplate * const itable_0F3ACC = {
+    instrux + 4062,
+};
+
+static const struct itemplate * const itable_0F3ACE = {
+    instrux + 6811,
+};
+
+static const struct itemplate * const itable_0F3ACF = {
+    instrux + 6800,
+};
+
+static const struct itemplate * const itable_0F3ADF = {
+    instrux + 1878,
+};
+
+static const struct itemplate * const itable_0F3AF0 = {
+    instrux + 7451,
+};
+
+static const struct itemplate * const itable_0F3C = {
+    instrux + 229,
+};
+
+static const struct itemplate * const itable_0F3D = {
+    instrux + 228,
+};
+
+static const struct itemplate * const itable_0F40 = {
+    instrux + 1217,
+    instrux + 1233,
+    instrux + 1249,
+    instrux + 1265,
+    instrux + 1281,
+    instrux + 1297,
+};
+
+static const struct itemplate * const itable_0F41 = {
+    instrux + 1214,
+    instrux + 1230,
+    instrux + 1246,
+    instrux + 1262,
+    instrux + 1278,
+    instrux + 1294,
+};
+
+static const struct itemplate * const itable_0F42 = {
+    instrux + 1207,
+    instrux + 1223,
+    instrux + 1239,
+    instrux + 1255,
+    instrux + 1271,
+    instrux + 1287,
+};
+
+static const struct itemplate * const itable_0F43 = {
+    instrux + 1211,
+    instrux + 1227,
+    instrux + 1243,
+    instrux + 1259,
+    instrux + 1275,
+    instrux + 1291,
+};
+
+static const struct itemplate * const itable_0F44 = {
+    instrux + 1221,
+    instrux + 1237,
+    instrux + 1253,
+    instrux + 1269,
+    instrux + 1285,
+    instrux + 1301,
+};
+
+static const struct itemplate * const itable_0F45 = {
+    instrux + 1216,
+    instrux + 1232,
+    instrux + 1248,
+    instrux + 1264,
+    instrux + 1280,
+    instrux + 1296,
+};
+
+static const struct itemplate * const itable_0F46 = {
+    instrux + 1210,
+    instrux + 1226,
+    instrux + 1242,
+    instrux + 1258,
+    instrux + 1274,
+    instrux + 1290,
+};
+
+static const struct itemplate * const itable_0F47 = {
+    instrux + 1206,
+    instrux + 1222,
+    instrux + 1238,
+    instrux + 1254,
+    instrux + 1270,
+    instrux + 1286,
+};
+
+static const struct itemplate * const itable_0F48 = {
+    instrux + 1220,
+    instrux + 1236,
+    instrux + 1252,
+    instrux + 1268,
+    instrux + 1284,
+    instrux + 1300,
+};
+
+static const struct itemplate * const itable_0F49 = {
+    instrux + 1215,
+    instrux + 1231,
+    instrux + 1247,
+    instrux + 1263,
+    instrux + 1279,
+    instrux + 1295,
+};
+
+static const struct itemplate * const itable_0F4A = {
+    instrux + 1218,
+    instrux + 1234,
+    instrux + 1250,
+    instrux + 1266,
+    instrux + 1282,
+    instrux + 1298,
+};
+
+static const struct itemplate * const itable_0F4B = {
+    instrux + 1219,
+    instrux + 1235,
+    instrux + 1251,
+    instrux + 1267,
+    instrux + 1283,
+    instrux + 1299,
+};
+
+static const struct itemplate * const itable_0F4C = {
+    instrux + 1209,
+    instrux + 1225,
+    instrux + 1241,
+    instrux + 1257,
+    instrux + 1273,
+    instrux + 1289,
+};
+
+static const struct itemplate * const itable_0F4D = {
+    instrux + 1213,
+    instrux + 1229,
+    instrux + 1245,
+    instrux + 1261,
+    instrux + 1277,
+    instrux + 1293,
+};
+
+static const struct itemplate * const itable_0F4E = {
+    instrux + 1212,
+    instrux + 1228,
+    instrux + 1244,
+    instrux + 1260,
+    instrux + 1276,
+    instrux + 1292,
+};
+
+static const struct itemplate * const itable_0F4F = {
+    instrux + 1208,
+    instrux + 1224,
+    instrux + 1240,
+    instrux + 1256,
+    instrux + 1272,
+    instrux + 1288,
+};
+
+static const struct itemplate * const itable_0F50 = {
+    instrux + 750,
+    instrux + 1463,
+    instrux + 1464,
+    instrux + 1696,
+    instrux + 1697,
+};
+
+static const struct itemplate * const itable_0F51 = {
+    instrux + 742,
+    instrux + 1478,
+    instrux + 1479,
+    instrux + 1706,
+    instrux + 1707,
+};
+
+static const struct itemplate * const itable_0F52 = {
+    instrux + 778,
+    instrux + 1475,
+    instrux + 1476,
+};
+
+static const struct itemplate * const itable_0F53 = {
+    instrux + 1473,
+    instrux + 1474,
+};
+
+static const struct itemplate * const itable_0F54 = {
+    instrux + 758,
+    instrux + 1417,
+    instrux + 1641,
+};
+
+static const struct itemplate * const itable_0F55 = {
+    instrux + 828,
+    instrux + 1416,
+    instrux + 1640,
+};
+
+static const struct itemplate * const itable_0F56 = {
+    instrux + 1472,
+    instrux + 1704,
+};
+
+static const struct itemplate * const itable_0F57 = {
+    instrux + 1486,
+    instrux + 1713,
+};
+
+static const struct itemplate * const itable_0F58 = {
+    instrux + 787,
+    instrux + 1414,
+    instrux + 1415,
+    instrux + 1638,
+    instrux + 1639,
+};
+
+static const struct itemplate * const itable_0F59 = {
+    instrux + 781,
+    instrux + 1470,
+    instrux + 1471,
+    instrux + 1702,
+    instrux + 1703,
+};
+
+static const struct itemplate * const itable_0F5A = {
+    instrux + 786,
+    instrux + 1665,
+    instrux + 1668,
+    instrux + 1673,
+    instrux + 1676,
+};
+
+static const struct itemplate * const itable_0F5B = {
+    instrux + 785,
+    instrux + 1662,
+    instrux + 1667,
+    instrux + 1679,
+};
+
+static const struct itemplate * const itable_0F5C = {
+    instrux + 784,
+    instrux + 1481,
+    instrux + 1482,
+    instrux + 1708,
+    instrux + 1709,
+};
+
+static const struct itemplate * const itable_0F5D = {
+    instrux + 779,
+    instrux + 1453,
+    instrux + 1454,
+    instrux + 1688,
+    instrux + 1689,
+};
+
+static const struct itemplate * const itable_0F5E = {
+    instrux + 776,
+    instrux + 1448,
+    instrux + 1449,
+    instrux + 1684,
+    instrux + 1685,
+};
+
+static const struct itemplate * const itable_0F5F = {
+    instrux + 1451,
+    instrux + 1452,
+    instrux + 1686,
+    instrux + 1687,
+};
+
+static const struct itemplate * const itable_0F60 = {
+    instrux + 836,
+    instrux + 1633,
+};
+
+static const struct itemplate * const itable_0F61 = {
+    instrux + 838,
+    instrux + 1634,
+};
+
+static const struct itemplate * const itable_0F62 = {
+    instrux + 837,
+    instrux + 1635,
+};
+
+static const struct itemplate * const itable_0F63 = {
+    instrux + 737,
+    instrux + 1557,
+};
+
+static const struct itemplate * const itable_0F64 = {
+    instrux + 755,
+    instrux + 1576,
+};
+
+static const struct itemplate * const itable_0F65 = {
+    instrux + 757,
+    instrux + 1577,
+};
+
+static const struct itemplate * const itable_0F66 = {
+    instrux + 756,
+    instrux + 1578,
+};
+
+static const struct itemplate * const itable_0F67 = {
+    instrux + 738,
+    instrux + 1559,
+};
+
+static const struct itemplate * const itable_0F68 = {
+    instrux + 833,
+    instrux + 1629,
+};
+
+static const struct itemplate * const itable_0F69 = {
+    instrux + 835,
+    instrux + 1630,
+};
+
+static const struct itemplate * const itable_0F6A = {
+    instrux + 834,
+    instrux + 1631,
+};
+
+static const struct itemplate * const itable_0F6B = {
+    instrux + 736,
+    instrux + 1558,
+};
+
+static const struct itemplate * const itable_0F6C = {
+    instrux + 1636,
+};
+
+static const struct itemplate * const itable_0F6D = {
+    instrux + 1632,
+};
+
+static const struct itemplate * const itable_0F6E = {
+    instrux + 656,
+    instrux + 660,
+    instrux + 1542,
+    instrux + 1543,
+    instrux + 1554,
+};
+
+static const struct itemplate * const itable_0F6F = {
+    instrux + 658,
+    instrux + 1545,
+    instrux + 1547,
+};
+
+static const struct itemplate * const itable_0F70 = {
+    instrux + 1527,
+    instrux + 1596,
+    instrux + 1597,
+    instrux + 1598,
+    instrux + 1599,
+    instrux + 1600,
+    instrux + 1601,
+};
+
+static const struct itemplate * const itable_0F71 = {
+    instrux + 814,
+    instrux + 818,
+    instrux + 824,
+    instrux + 1604,
+    instrux + 1610,
+    instrux + 1615,
+};
+
+static const struct itemplate * const itable_0F72 = {
+    instrux + 810,
+    instrux + 816,
+    instrux + 820,
+    instrux + 1606,
+    instrux + 1612,
+    instrux + 1617,
+};
+
+static const struct itemplate * const itable_0F73 = {
+    instrux + 812,
+    instrux + 822,
+    instrux + 1602,
+    instrux + 1608,
+    instrux + 1613,
+    instrux + 1619,
+};
+
+static const struct itemplate * const itable_0F74 = {
+    instrux + 752,
+    instrux + 1573,
+};
+
+static const struct itemplate * const itable_0F75 = {
+    instrux + 754,
+    instrux + 1574,
+};
+
+static const struct itemplate * const itable_0F76 = {
+    instrux + 753,
+    instrux + 1575,
+};
+
+static const struct itemplate * const itable_0F77 = {
+    instrux + 246,
+};
+
+static const struct itemplate * const itable_0F78 = {
+    instrux + 1099,
+    instrux + 1734,
+    instrux + 1735,
+    instrux + 1783,
+    instrux + 1785,
+};
+
+static const struct itemplate * const itable_0F79 = {
+    instrux + 942,
+    instrux + 1739,
+    instrux + 1740,
+    instrux + 1784,
+    instrux + 1786,
+};
+
+static const struct itemplate * const itable_0F7B = {
+    instrux + 943,
+};
+
+static const struct itemplate * const itable_0F7C = {
+    instrux + 1100,
+    instrux + 1716,
+    instrux + 1717,
+};
+
+static const struct itemplate * const itable_0F7D = {
+    instrux + 945,
+    instrux + 1718,
+    instrux + 1719,
+};
+
+static const struct itemplate * const itable_0F7E = {
+    instrux + 657,
+    instrux + 661,
+    instrux + 1541,
+    instrux + 1544,
+    instrux + 1550,
+    instrux + 1553,
+    instrux + 1555,
+};
+
+static const struct itemplate * const itable_0F7F = {
+    instrux + 659,
+    instrux + 1546,
+    instrux + 1548,
+};
+
+static const struct itemplate * const itable_0F80 = {
+    instrux + 1313,
+    instrux + 1329,
+    instrux + 1345,
+    instrux + 1361,
+};
+
+static const struct itemplate * const itable_0F81 = {
+    instrux + 1310,
+    instrux + 1326,
+    instrux + 1342,
+    instrux + 1358,
+};
+
+static const struct itemplate * const itable_0F82 = {
+    instrux + 1303,
+    instrux + 1319,
+    instrux + 1335,
+    instrux + 1351,
+};
+
+static const struct itemplate * const itable_0F83 = {
+    instrux + 1307,
+    instrux + 1323,
+    instrux + 1339,
+    instrux + 1355,
+};
+
+static const struct itemplate * const itable_0F84 = {
+    instrux + 1317,
+    instrux + 1333,
+    instrux + 1349,
+    instrux + 1365,
+};
+
+static const struct itemplate * const itable_0F85 = {
+    instrux + 1312,
+    instrux + 1328,
+    instrux + 1344,
+    instrux + 1360,
+};
+
+static const struct itemplate * const itable_0F86 = {
+    instrux + 1306,
+    instrux + 1322,
+    instrux + 1338,
+    instrux + 1354,
+};
+
+static const struct itemplate * const itable_0F87 = {
+    instrux + 1302,
+    instrux + 1318,
+    instrux + 1334,
+    instrux + 1350,
+};
+
+static const struct itemplate * const itable_0F88 = {
+    instrux + 1316,
+    instrux + 1332,
+    instrux + 1348,
+    instrux + 1364,
+};
+
+static const struct itemplate * const itable_0F89 = {
+    instrux + 1311,
+    instrux + 1327,
+    instrux + 1343,
+    instrux + 1359,
+};
+
+static const struct itemplate * const itable_0F8A = {
+    instrux + 1314,
+    instrux + 1330,
+    instrux + 1346,
+    instrux + 1362,
+};
+
+static const struct itemplate * const itable_0F8B = {
+    instrux + 1315,
+    instrux + 1331,
+    instrux + 1347,
+    instrux + 1363,
+};
+
+static const struct itemplate * const itable_0F8C = {
+    instrux + 1305,
+    instrux + 1321,
+    instrux + 1337,
+    instrux + 1353,
+};
+
+static const struct itemplate * const itable_0F8D = {
+    instrux + 1309,
+    instrux + 1325,
+    instrux + 1341,
+    instrux + 1357,
+};
+
+static const struct itemplate * const itable_0F8E = {
+    instrux + 1308,
+    instrux + 1324,
+    instrux + 1340,
+    instrux + 1356,
+};
+
+static const struct itemplate * const itable_0F8F = {
+    instrux + 1304,
+    instrux + 1320,
+    instrux + 1336,
+    instrux + 1352,
+};
+
+static const struct itemplate * const itable_0F90 = {
+    instrux + 1393,
+    instrux + 1409,
+};
+
+static const struct itemplate * const itable_0F91 = {
+    instrux + 1390,
+    instrux + 1406,
+};
+
+static const struct itemplate * const itable_0F92 = {
+    instrux + 1383,
+    instrux + 1399,
+};
+
+static const struct itemplate * const itable_0F93 = {
+    instrux + 1387,
+    instrux + 1403,
+};
+
+static const struct itemplate * const itable_0F94 = {
+    instrux + 1397,
+    instrux + 1413,
+};
+
+static const struct itemplate * const itable_0F95 = {
+    instrux + 1392,
+    instrux + 1408,
+};
+
+static const struct itemplate * const itable_0F96 = {
+    instrux + 1386,
+    instrux + 1402,
+};
+
+static const struct itemplate * const itable_0F97 = {
+    instrux + 1382,
+    instrux + 1398,
+};
+
+static const struct itemplate * const itable_0F98 = {
+    instrux + 1396,
+    instrux + 1412,
+};
+
+static const struct itemplate * const itable_0F99 = {
+    instrux + 1391,
+    instrux + 1407,
+};
+
+static const struct itemplate * const itable_0F9A = {
+    instrux + 1394,
+    instrux + 1410,
+};
+
+static const struct itemplate * const itable_0F9B = {
+    instrux + 1395,
+    instrux + 1411,
+};
+
+static const struct itemplate * const itable_0F9C = {
+    instrux + 1385,
+    instrux + 1401,
+};
+
+static const struct itemplate * const itable_0F9D = {
+    instrux + 1389,
+    instrux + 1405,
+};
+
+static const struct itemplate * const itable_0F9E = {
+    instrux + 1388,
+    instrux + 1404,
+};
+
+static const struct itemplate * const itable_0F9F = {
+    instrux + 1384,
+    instrux + 1400,
+};
+
+static const struct itemplate * const itable_0FA0 = {
+    instrux + 849,
+};
+
+static const struct itemplate * const itable_0FA1 = {
+    instrux + 797,
+};
+
+static const struct itemplate * const itable_0FA2 = {
+    instrux + 227,
+};
+
+static const struct itemplate * const itable_0FA3 = {
+    instrux + 121,
+    instrux + 122,
+    instrux + 123,
+    instrux + 124,
+    instrux + 125,
+    instrux + 126,
+};
+
+static const struct itemplate * const itable_0FA4 = {
+    instrux + 1008,
+    instrux + 1009,
+    instrux + 1010,
+    instrux + 1011,
+    instrux + 1012,
+    instrux + 1013,
+};
+
+static const struct itemplate * const itable_0FA5 = {
+    instrux + 1014,
+    instrux + 1015,
+    instrux + 1016,
+    instrux + 1017,
+    instrux + 1018,
+    instrux + 1019,
+};
+
+static const struct itemplate * const itable_0FA6C0 = {
+    instrux + 3384,
+};
+
+static const struct itemplate * const itable_0FA6C8 = {
+    instrux + 3385,
+};
+
+static const struct itemplate * const itable_0FA6D0 = {
+    instrux + 3386,
+};
+
+static const struct itemplate * const itable_0FA7C0 = {
+    instrux + 3378,
+};
+
+static const struct itemplate * const itable_0FA7C8 = {
+    instrux + 3379,
+};
+
+static const struct itemplate * const itable_0FA7D0 = {
+    instrux + 3380,
+};
+
+static const struct itemplate * const itable_0FA7D8 = {
+    instrux + 3381,
+};
+
+static const struct itemplate * const itable_0FA7E0 = {
+    instrux + 3382,
+};
+
+static const struct itemplate * const itable_0FA7E8 = {
+    instrux + 3383,
+};
+
+static const struct itemplate * const itable_0FA8 = {
+    instrux + 850,
+};
+
+static const struct itemplate * const itable_0FA9 = {
+    instrux + 798,
+};
+
+static const struct itemplate * const itable_0FAA = {
+    instrux + 944,
+};
+
+static const struct itemplate * const itable_0FAB = {
+    instrux + 148,
+    instrux + 149,
+    instrux + 150,
+    instrux + 151,
+    instrux + 152,
+    instrux + 153,
+};
+
+static const struct itemplate * const itable_0FAC = {
+    instrux + 1032,
+    instrux + 1033,
+    instrux + 1034,
+    instrux + 1035,
+    instrux + 1036,
+    instrux + 1037,
+};
+
+static const struct itemplate * const itable_0FAD = {
+    instrux + 1038,
+    instrux + 1039,
+    instrux + 1040,
+    instrux + 1041,
+    instrux + 1042,
+    instrux + 1043,
+};
+
+static const struct itemplate * const itable_0FAE = {
+    instrux + 546,
+    instrux + 601,
+    instrux + 994,
+    instrux + 1450,
+    instrux + 1480,
+    instrux + 1487,
+    instrux + 1488,
+    instrux + 1489,
+    instrux + 1490,
+    instrux + 1493,
+    instrux + 1494,
+    instrux + 1497,
+    instrux + 1498,
+    instrux + 1501,
+    instrux + 1502,
+    instrux + 1511,
+    instrux + 1534,
+    instrux + 1539,
+    instrux + 1540,
+    instrux + 3354,
+    instrux + 3355,
+    instrux + 3356,
+    instrux + 3357,
+    instrux + 3361,
+    instrux + 3362,
+    instrux + 3363,
+    instrux + 3364,
+    instrux + 6781,
+    instrux + 6782,
+    instrux + 6783,
+    instrux + 6785,
+    instrux + 6786,
+    instrux + 6794,
+    instrux + 6795,
+    instrux + 6796,
+    instrux + 6797,
+    instrux + 6798,
+    instrux + 6971,
+    instrux + 6974,
+    instrux + 6975,
+};
+
+static const struct itemplate * const itable_0FAF = {
+    instrux + 445,
+    instrux + 446,
+    instrux + 447,
+    instrux + 448,
+    instrux + 449,
+    instrux + 450,
+};
+
+static const struct itemplate * const itable_0FB0 = {
+    instrux + 217,
+    instrux + 218,
+};
+
+static const struct itemplate * const itable_0FB1 = {
+    instrux + 219,
+    instrux + 220,
+    instrux + 221,
+    instrux + 222,
+    instrux + 223,
+    instrux + 224,
+};
+
+static const struct itemplate * const itable_0FB2 = {
+    instrux + 595,
+    instrux + 596,
+    instrux + 597,
+};
+
+static const struct itemplate * const itable_0FB3 = {
+    instrux + 139,
+    instrux + 140,
+    instrux + 141,
+    instrux + 142,
+    instrux + 143,
+    instrux + 144,
+};
+
+static const struct itemplate * const itable_0FB4 = {
+    instrux + 547,
+    instrux + 548,
+    instrux + 549,
+};
+
+static const struct itemplate * const itable_0FB5 = {
+    instrux + 551,
+    instrux + 552,
+    instrux + 553,
+};
+
+static const struct itemplate * const itable_0FB6 = {
+    instrux + 673,
+    instrux + 674,
+    instrux + 675,
+    instrux + 677,
+};
+
+static const struct itemplate * const itable_0FB7 = {
+    instrux + 676,
+    instrux + 678,
+};
+
+static const struct itemplate * const itable_0FB8 = {
+    instrux + 522,
+    instrux + 523,
+    instrux + 524,
+    instrux + 1861,
+    instrux + 1862,
+    instrux + 1863,
+};
+
+static const struct itemplate * const itable_0FB9 = {
+    instrux + 1133,
+    instrux + 1134,
+    instrux + 1135,
+};
+
+static const struct itemplate * const itable_0FBA = {
+    instrux + 127,
+    instrux + 128,
+    instrux + 129,
+    instrux + 136,
+    instrux + 137,
+    instrux + 138,
+    instrux + 145,
+    instrux + 146,
+    instrux + 147,
+    instrux + 154,
+    instrux + 155,
+    instrux + 156,
+};
+
+static const struct itemplate * const itable_0FBB = {
+    instrux + 130,
+    instrux + 131,
+    instrux + 132,
+    instrux + 133,
+    instrux + 134,
+    instrux + 135,
+};
+
+static const struct itemplate * const itable_0FBC = {
+    instrux + 107,
+    instrux + 108,
+    instrux + 109,
+    instrux + 110,
+    instrux + 111,
+    instrux + 112,
+    instrux + 4029,
+    instrux + 4030,
+    instrux + 4031,
+};
+
+static const struct itemplate * const itable_0FBD = {
+    instrux + 113,
+    instrux + 114,
+    instrux + 115,
+    instrux + 116,
+    instrux + 117,
+    instrux + 118,
+    instrux + 1789,
+    instrux + 1790,
+    instrux + 1791,
+};
+
+static const struct itemplate * const itable_0FBE = {
+    instrux + 666,
+    instrux + 667,
+    instrux + 668,
+    instrux + 670,
+};
+
+static const struct itemplate * const itable_0FBF = {
+    instrux + 669,
+    instrux + 671,
+};
+
+static const struct itemplate * const itable_0FC0 = {
+    instrux + 1147,
+    instrux + 1148,
+};
+
+static const struct itemplate * const itable_0FC1 = {
+    instrux + 1149,
+    instrux + 1150,
+    instrux + 1151,
+    instrux + 1152,
+    instrux + 1153,
+    instrux + 1154,
+};
+
+static const struct itemplate * const itable_0FC2 = {
+    instrux + 1418,
+    instrux + 1419,
+    instrux + 1420,
+    instrux + 1421,
+    instrux + 1422,
+    instrux + 1423,
+    instrux + 1424,
+    instrux + 1425,
+    instrux + 1426,
+    instrux + 1427,
+    instrux + 1428,
+    instrux + 1429,
+    instrux + 1430,
+    instrux + 1431,
+    instrux + 1432,
+    instrux + 1433,
+    instrux + 1434,
+    instrux + 1435,
+    instrux + 1642,
+    instrux + 1643,
+    instrux + 1644,
+    instrux + 1645,
+    instrux + 1646,
+    instrux + 1647,
+    instrux + 1648,
+    instrux + 1649,
+    instrux + 1650,
+    instrux + 1651,
+    instrux + 1652,
+    instrux + 1653,
+    instrux + 1654,
+    instrux + 1655,
+    instrux + 1656,
+    instrux + 1657,
+    instrux + 1658,
+    instrux + 1659,
+};
+
+static const struct itemplate * const itable_0FC3 = {
+    instrux + 1536,
+    instrux + 1537,
+};
+
+static const struct itemplate * const itable_0FC4 = {
+    instrux + 1517,
+    instrux + 1518,
+    instrux + 1519,
+    instrux + 1580,
+    instrux + 1581,
+    instrux + 1582,
+};
+
+static const struct itemplate * const itable_0FC5 = {
+    instrux + 1516,
+    instrux + 1579,
+};
+
+static const struct itemplate * const itable_0FC6 = {
+    instrux + 1477,
+    instrux + 1705,
+};
+
+static const struct itemplate * const itable_0FC7 = {
+    instrux + 225,
+    instrux + 226,
+    instrux + 1495,
+    instrux + 1496,
+    instrux + 1499,
+    instrux + 1500,
+    instrux + 1503,
+    instrux + 1504,
+    instrux + 1727,
+    instrux + 1732,
+    instrux + 1733,
+    instrux + 1742,
+    instrux + 3358,
+    instrux + 3359,
+    instrux + 3360,
+    instrux + 3373,
+    instrux + 3374,
+    instrux + 3375,
+    instrux + 6778,
+    instrux + 6779,
+    instrux + 6780,
+    instrux + 7407,
+};
+
+static const struct itemplate * const itable_0FC8 = {
+    instrux + 119,
+    instrux + 120,
+};
+
+static const struct itemplate * const itable_0FC9 = {
+    instrux + 119,
+    instrux + 120,
+};
+
+static const struct itemplate * const itable_0FCA = {
+    instrux + 119,
+    instrux + 120,
+};
+
+static const struct itemplate * const itable_0FCB = {
+    instrux + 119,
+    instrux + 120,
+};
+
+static const struct itemplate * const itable_0FCC = {
+    instrux + 119,
+    instrux + 120,
+};
+
+static const struct itemplate * const itable_0FCD = {
+    instrux + 119,
+    instrux + 120,
+};
+
+static const struct itemplate * const itable_0FCE = {
+    instrux + 119,
+    instrux + 120,
+};
+
+static const struct itemplate * const itable_0FCF = {
+    instrux + 119,
+    instrux + 120,
+};
+
+static const struct itemplate * const itable_0FD0 = {
+    instrux + 1714,
+    instrux + 1715,
+};
+
+static const struct itemplate * const itable_0FD1 = {
+    instrux + 823,
+    instrux + 1614,
+};
+
+static const struct itemplate * const itable_0FD2 = {
+    instrux + 819,
+    instrux + 1616,
+};
+
+static const struct itemplate * const itable_0FD3 = {
+    instrux + 821,
+    instrux + 1618,
+};
+
+static const struct itemplate * const itable_0FD4 = {
+    instrux + 1563,
+    instrux + 1564,
+};
+
+static const struct itemplate * const itable_0FD5 = {
+    instrux + 783,
+    instrux + 1591,
+};
+
+static const struct itemplate * const itable_0FD6 = {
+    instrux + 1549,
+    instrux + 1551,
+    instrux + 1552,
+    instrux + 1556,
+};
+
+static const struct itemplate * const itable_0FD7 = {
+    instrux + 1524,
+    instrux + 1588,
+};
+
+static const struct itemplate * const itable_0FD8 = {
+    instrux + 830,
+    instrux + 1627,
+};
+
+static const struct itemplate * const itable_0FD9 = {
+    instrux + 831,
+    instrux + 1628,
+};
+
+static const struct itemplate * const itable_0FDA = {
+    instrux + 1523,
+    instrux + 1587,
+};
+
+static const struct itemplate * const itable_0FDB = {
+    instrux + 747,
+    instrux + 1569,
+};
+
+static const struct itemplate * const itable_0FDC = {
+    instrux + 744,
+    instrux + 1567,
+};
+
+static const struct itemplate * const itable_0FDD = {
+    instrux + 745,
+    instrux + 1568,
+};
+
+static const struct itemplate * const itable_0FDE = {
+    instrux + 1521,
+    instrux + 1585,
+};
+
+static const struct itemplate * const itable_0FDF = {
+    instrux + 748,
+    instrux + 1570,
+};
+
+static const struct itemplate * const itable_0FE0 = {
+    instrux + 1514,
+    instrux + 1571,
+};
+
+static const struct itemplate * const itable_0FE1 = {
+    instrux + 817,
+    instrux + 1609,
+};
+
+static const struct itemplate * const itable_0FE2 = {
+    instrux + 815,
+    instrux + 1611,
+};
+
+static const struct itemplate * const itable_0FE3 = {
+    instrux + 1515,
+    instrux + 1572,
+};
+
+static const struct itemplate * const itable_0FE4 = {
+    instrux + 1525,
+    instrux + 1589,
+};
+
+static const struct itemplate * const itable_0FE5 = {
+    instrux + 782,
+    instrux + 1590,
+};
+
+static const struct itemplate * const itable_0FE6 = {
+    instrux + 1661,
+    instrux + 1663,
+    instrux + 1678,
+};
+
+static const struct itemplate * const itable_0FE7 = {
+    instrux + 1513,
+    instrux + 1535,
+};
+
+static const struct itemplate * const itable_0FE8 = {
+    instrux + 827,
+    instrux + 1625,
+};
+
+static const struct itemplate * const itable_0FE9 = {
+    instrux + 829,
+    instrux + 1626,
+};
+
+static const struct itemplate * const itable_0FEA = {
+    instrux + 1522,
+    instrux + 1586,
+};
+
+static const struct itemplate * const itable_0FEB = {
+    instrux + 806,
+    instrux + 1594,
+};
+
+static const struct itemplate * const itable_0FEC = {
+    instrux + 741,
+    instrux + 1565,
+};
+
+static const struct itemplate * const itable_0FED = {
+    instrux + 743,
+    instrux + 1566,
+};
+
+static const struct itemplate * const itable_0FEE = {
+    instrux + 1520,
+    instrux + 1584,
+};
+
+static const struct itemplate * const itable_0FEF = {
+    instrux + 864,
+    instrux + 1637,
+};
+
+static const struct itemplate * const itable_0FF0 = {
+    instrux + 1720,
+};
+
+static const struct itemplate * const itable_0FF1 = {
+    instrux + 813,
+    instrux + 1603,
+};
+
+static const struct itemplate * const itable_0FF2 = {
+    instrux + 809,
+    instrux + 1605,
+};
+
+static const struct itemplate * const itable_0FF3 = {
+    instrux + 811,
+    instrux + 1607,
+};
+
+static const struct itemplate * const itable_0FF4 = {
+    instrux + 1592,
+    instrux + 1593,
+};
+
+static const struct itemplate * const itable_0FF5 = {
+    instrux + 777,
+    instrux + 1583,
+};
+
+static const struct itemplate * const itable_0FF6 = {
+    instrux + 1526,
+    instrux + 1595,
+};
+
+static const struct itemplate * const itable_0FF7 = {
+    instrux + 1512,
+    instrux + 1533,
+};
+
+static const struct itemplate * const itable_0FF8 = {
+    instrux + 825,
+    instrux + 1620,
+};
+
+static const struct itemplate * const itable_0FF9 = {
+    instrux + 832,
+    instrux + 1621,
+};
+
+static const struct itemplate * const itable_0FFA = {
+    instrux + 826,
+    instrux + 1622,
+};
+
+static const struct itemplate * const itable_0FFB = {
+    instrux + 1623,
+    instrux + 1624,
+};
+
+static const struct itemplate * const itable_0FFC = {
+    instrux + 739,
+    instrux + 1560,
+};
+
+static const struct itemplate * const itable_0FFD = {
+    instrux + 746,
+    instrux + 1561,
+};
+
+static const struct itemplate * const itable_0FFE = {
+    instrux + 740,
+    instrux + 1562,
+};
+
+static const struct itemplate * const itable_0FFF = {
+    instrux + 1129,
+    instrux + 1130,
+    instrux + 1131,
+    instrux + 1132,
+};
+
+static const struct itemplate * const itable_10 = {
+    instrux + 14,
+    instrux + 15,
+};
+
+static const struct itemplate * const itable_11 = {
+    instrux + 16,
+    instrux + 17,
+    instrux + 18,
+    instrux + 19,
+    instrux + 20,
+    instrux + 21,
+};
+
+static const struct itemplate * const itable_12 = {
+    instrux + 22,
+    instrux + 23,
+};
+
+static const struct itemplate * const itable_13 = {
+    instrux + 24,
+    instrux + 25,
+    instrux + 26,
+    instrux + 27,
+    instrux + 28,
+    instrux + 29,
+};
+
+static const struct itemplate * const itable_14 = {
+    instrux + 33,
+};
+
+static const struct itemplate * const itable_15 = {
+    instrux + 34,
+    instrux + 35,
+    instrux + 36,
+};
+
+static const struct itemplate * const itable_16 = {
+    instrux + 847,
+};
+
+static const struct itemplate * const itable_17 = {
+    instrux + 795,
+};
+
+static const struct itemplate * const itable_18 = {
+    instrux + 960,
+    instrux + 961,
+};
+
+static const struct itemplate * const itable_19 = {
+    instrux + 962,
+    instrux + 963,
+    instrux + 964,
+    instrux + 965,
+    instrux + 966,
+    instrux + 967,
+};
+
+static const struct itemplate * const itable_1A = {
+    instrux + 968,
+    instrux + 969,
+};
+
+static const struct itemplate * const itable_1B = {
+    instrux + 970,
+    instrux + 971,
+    instrux + 972,
+    instrux + 973,
+    instrux + 974,
+    instrux + 975,
+};
+
+static const struct itemplate * const itable_1C = {
+    instrux + 979,
+};
+
+static const struct itemplate * const itable_1D = {
+    instrux + 980,
+    instrux + 981,
+    instrux + 982,
+};
+
+static const struct itemplate * const itable_1E = {
+    instrux + 848,
+};
+
+static const struct itemplate * const itable_1F = {
+    instrux + 796,
+};
+
+static const struct itemplate * const itable_20 = {
+    instrux + 73,
+    instrux + 74,
+};
+
+static const struct itemplate * const itable_21 = {
+    instrux + 75,
+    instrux + 76,
+    instrux + 77,
+    instrux + 78,
+    instrux + 79,
+    instrux + 80,
+};
+
+static const struct itemplate * const itable_22 = {
+    instrux + 81,
+    instrux + 82,
+};
+
+static const struct itemplate * const itable_23 = {
+    instrux + 83,
+    instrux + 84,
+    instrux + 85,
+    instrux + 86,
+    instrux + 87,
+    instrux + 88,
+};
+
+static const struct itemplate * const itable_24 = {
+    instrux + 92,
+};
+
+static const struct itemplate * const itable_25 = {
+    instrux + 93,
+    instrux + 94,
+    instrux + 95,
+};
+
+static const struct itemplate * const itable_27 = {
+    instrux + 233,
+};
+
+static const struct itemplate * const itable_28 = {
+    instrux + 1069,
+    instrux + 1070,
+};
+
+static const struct itemplate * const itable_29 = {
+    instrux + 1071,
+    instrux + 1072,
+    instrux + 1073,
+    instrux + 1074,
+    instrux + 1075,
+    instrux + 1076,
+};
+
+static const struct itemplate * const itable_2A = {
+    instrux + 1077,
+    instrux + 1078,
+};
+
+static const struct itemplate * const itable_2B = {
+    instrux + 1079,
+    instrux + 1080,
+    instrux + 1081,
+    instrux + 1082,
+    instrux + 1083,
+    instrux + 1084,
+};
+
+static const struct itemplate * const itable_2C = {
+    instrux + 1088,
+};
+
+static const struct itemplate * const itable_2D = {
+    instrux + 1089,
+    instrux + 1090,
+    instrux + 1091,
+};
+
+static const struct itemplate * const itable_2F = {
+    instrux + 234,
+};
+
+static const struct itemplate * const itable_30 = {
+    instrux + 1176,
+    instrux + 1177,
+};
+
+static const struct itemplate * const itable_31 = {
+    instrux + 1178,
+    instrux + 1179,
+    instrux + 1180,
+    instrux + 1181,
+    instrux + 1182,
+    instrux + 1183,
+};
+
+static const struct itemplate * const itable_32 = {
+    instrux + 1184,
+    instrux + 1185,
+};
+
+static const struct itemplate * const itable_33 = {
+    instrux + 1186,
+    instrux + 1187,
+    instrux + 1188,
+    instrux + 1189,
+    instrux + 1190,
+    instrux + 1191,
+};
+
+static const struct itemplate * const itable_34 = {
+    instrux + 1195,
+};
+
+static const struct itemplate * const itable_35 = {
+    instrux + 1196,
+    instrux + 1197,
+    instrux + 1198,
+};
+
+static const struct itemplate * const itable_37 = {
+    instrux + 8,
+};
+
+static const struct itemplate * const itable_38 = {
+    instrux + 183,
+    instrux + 184,
+};
+
+static const struct itemplate * const itable_39 = {
+    instrux + 185,
+    instrux + 186,
+    instrux + 187,
+    instrux + 188,
+    instrux + 189,
+    instrux + 190,
+};
+
+static const struct itemplate * const itable_3A = {
+    instrux + 191,
+    instrux + 192,
+};
+
+static const struct itemplate * const itable_3B = {
+    instrux + 193,
+    instrux + 194,
+    instrux + 195,
+    instrux + 196,
+    instrux + 197,
+    instrux + 198,
+};
+
+static const struct itemplate * const itable_3C = {
+    instrux + 202,
+};
+
+static const struct itemplate * const itable_3D = {
+    instrux + 203,
+    instrux + 204,
+    instrux + 205,
+};
+
+static const struct itemplate * const itable_3F = {
+    instrux + 13,
+};
+
+static const struct itemplate * const itable_40 = {
+    instrux + 475,
+    instrux + 476,
+};
+
+static const struct itemplate * const itable_41 = {
+    instrux + 475,
+    instrux + 476,
+};
+
+static const struct itemplate * const itable_42 = {
+    instrux + 475,
+    instrux + 476,
+};
+
+static const struct itemplate * const itable_43 = {
+    instrux + 475,
+    instrux + 476,
+};
+
+static const struct itemplate * const itable_44 = {
+    instrux + 475,
+    instrux + 476,
+};
+
+static const struct itemplate * const itable_45 = {
+    instrux + 475,
+    instrux + 476,
+};
+
+static const struct itemplate * const itable_46 = {
+    instrux + 475,
+    instrux + 476,
+};
+
+static const struct itemplate * const itable_47 = {
+    instrux + 475,
+    instrux + 476,
+};
+
+static const struct itemplate * const itable_48 = {
+    instrux + 235,
+    instrux + 236,
+};
+
+static const struct itemplate * const itable_49 = {
+    instrux + 235,
+    instrux + 236,
+};
+
+static const struct itemplate * const itable_4A = {
+    instrux + 235,
+    instrux + 236,
+};
+
+static const struct itemplate * const itable_4B = {
+    instrux + 235,
+    instrux + 236,
+};
+
+static const struct itemplate * const itable_4C = {
+    instrux + 235,
+    instrux + 236,
+};
+
+static const struct itemplate * const itable_4D = {
+    instrux + 235,
+    instrux + 236,
+};
+
+static const struct itemplate * const itable_4E = {
+    instrux + 235,
+    instrux + 236,
+};
+
+static const struct itemplate * const itable_4F = {
+    instrux + 235,
+    instrux + 236,
+};
+
+static const struct itemplate * const itable_50 = {
+    instrux + 839,
+    instrux + 840,
+    instrux + 841,
+};
+
+static const struct itemplate * const itable_51 = {
+    instrux + 839,
+    instrux + 840,
+    instrux + 841,
+};
+
+static const struct itemplate * const itable_52 = {
+    instrux + 839,
+    instrux + 840,
+    instrux + 841,
+};
+
+static const struct itemplate * const itable_53 = {
+    instrux + 839,
+    instrux + 840,
+    instrux + 841,
+};
+
+static const struct itemplate * const itable_54 = {
+    instrux + 839,
+    instrux + 840,
+    instrux + 841,
+};
+
+static const struct itemplate * const itable_55 = {
+    instrux + 839,
+    instrux + 840,
+    instrux + 841,
+};
+
+static const struct itemplate * const itable_56 = {
+    instrux + 839,
+    instrux + 840,
+    instrux + 841,
+};
+
+static const struct itemplate * const itable_57 = {
+    instrux + 839,
+    instrux + 840,
+    instrux + 841,
+};
+
+static const struct itemplate * const itable_58 = {
+    instrux + 788,
+    instrux + 789,
+    instrux + 790,
+};
+
+static const struct itemplate * const itable_59 = {
+    instrux + 788,
+    instrux + 789,
+    instrux + 790,
+};
+
+static const struct itemplate * const itable_5A = {
+    instrux + 788,
+    instrux + 789,
+    instrux + 790,
+};
+
+static const struct itemplate * const itable_5B = {
+    instrux + 788,
+    instrux + 789,
+    instrux + 790,
+};
+
+static const struct itemplate * const itable_5C = {
+    instrux + 788,
+    instrux + 789,
+    instrux + 790,
+};
+
+static const struct itemplate * const itable_5D = {
+    instrux + 788,
+    instrux + 789,
+    instrux + 790,
+};
+
+static const struct itemplate * const itable_5E = {
+    instrux + 788,
+    instrux + 789,
+    instrux + 790,
+};
+
+static const struct itemplate * const itable_5F = {
+    instrux + 788,
+    instrux + 789,
+    instrux + 790,
+};
+
+static const struct itemplate * const itable_60 = {
+    instrux + 857,
+    instrux + 858,
+    instrux + 859,
+};
+
+static const struct itemplate * const itable_61 = {
+    instrux + 799,
+    instrux + 800,
+    instrux + 801,
+};
+
+static const struct itemplate * const itable_62 = {
+    instrux + 105,
+    instrux + 106,
+};
+
+static const struct itemplate * const itable_63 = {
+    instrux + 103,
+    instrux + 104,
+    instrux + 672,
+};
+
+static const struct itemplate * const itable_68 = {
+    instrux + 852,
+    instrux + 853,
+    instrux + 854,
+    instrux + 855,
+    instrux + 856,
+};
+
+static const struct itemplate * const itable_69 = {
+    instrux + 452,
+    instrux + 454,
+    instrux + 456,
+    instrux + 458,
+    instrux + 460,
+    instrux + 462,
+    instrux + 464,
+    instrux + 466,
+    instrux + 468,
+};
+
+static const struct itemplate * const itable_6A = {
+    instrux + 851,
+};
+
+static const struct itemplate * const itable_6B = {
+    instrux + 451,
+    instrux + 453,
+    instrux + 455,
+    instrux + 457,
+    instrux + 459,
+    instrux + 461,
+    instrux + 463,
+    instrux + 465,
+    instrux + 467,
+};
+
+static const struct itemplate * const itable_6C = {
+    instrux + 481,
+};
+
+static const struct itemplate * const itable_6D = {
+    instrux + 482,
+    instrux + 483,
+};
+
+static const struct itemplate * const itable_6E = {
+    instrux + 733,
+};
+
+static const struct itemplate * const itable_6F = {
+    instrux + 734,
+    instrux + 735,
+};
+
+static const struct itemplate * const itable_70 = {
+    instrux + 1377,
+};
+
+static const struct itemplate * const itable_71 = {
+    instrux + 1374,
+};
+
+static const struct itemplate * const itable_72 = {
+    instrux + 1367,
+};
+
+static const struct itemplate * const itable_73 = {
+    instrux + 1371,
+};
+
+static const struct itemplate * const itable_74 = {
+    instrux + 1381,
+};
+
+static const struct itemplate * const itable_75 = {
+    instrux + 1376,
+};
+
+static const struct itemplate * const itable_76 = {
+    instrux + 1370,
+};
+
+static const struct itemplate * const itable_77 = {
+    instrux + 1366,
+};
+
+static const struct itemplate * const itable_78 = {
+    instrux + 1380,
+};
+
+static const struct itemplate * const itable_79 = {
+    instrux + 1375,
+};
+
+static const struct itemplate * const itable_7A = {
+    instrux + 1378,
+};
+
+static const struct itemplate * const itable_7B = {
+    instrux + 1379,
+};
+
+static const struct itemplate * const itable_7C = {
+    instrux + 1369,
+};
+
+static const struct itemplate * const itable_7D = {
+    instrux + 1373,
+};
+
+static const struct itemplate * const itable_7E = {
+    instrux + 1372,
+};
+
+static const struct itemplate * const itable_7F = {
+    instrux + 1368,
+};
+
+static const struct itemplate * const itable_80 = {
+    instrux + 37,
+    instrux + 66,
+    instrux + 70,
+    instrux + 96,
+    instrux + 100,
+    instrux + 206,
+    instrux + 210,
+    instrux + 720,
+    instrux + 724,
+    instrux + 983,
+    instrux + 987,
+    instrux + 1092,
+    instrux + 1096,
+    instrux + 1199,
+    instrux + 1203,
+};
+
+static const struct itemplate * const itable_81 = {
+    instrux + 38,
+    instrux + 39,
+    instrux + 40,
+    instrux + 41,
+    instrux + 42,
+    instrux + 67,
+    instrux + 68,
+    instrux + 69,
+    instrux + 71,
+    instrux + 72,
+    instrux + 97,
+    instrux + 98,
+    instrux + 99,
+    instrux + 101,
+    instrux + 102,
+    instrux + 207,
+    instrux + 208,
+    instrux + 209,
+    instrux + 211,
+    instrux + 212,
+    instrux + 721,
+    instrux + 722,
+    instrux + 723,
+    instrux + 725,
+    instrux + 726,
+    instrux + 984,
+    instrux + 985,
+    instrux + 986,
+    instrux + 988,
+    instrux + 989,
+    instrux + 1093,
+    instrux + 1094,
+    instrux + 1095,
+    instrux + 1097,
+    instrux + 1098,
+    instrux + 1200,
+    instrux + 1201,
+    instrux + 1202,
+    instrux + 1204,
+    instrux + 1205,
+};
+
+static const struct itemplate * const itable_83 = {
+    instrux + 30,
+    instrux + 31,
+    instrux + 32,
+    instrux + 59,
+    instrux + 60,
+    instrux + 61,
+    instrux + 89,
+    instrux + 90,
+    instrux + 91,
+    instrux + 199,
+    instrux + 200,
+    instrux + 201,
+    instrux + 713,
+    instrux + 714,
+    instrux + 715,
+    instrux + 976,
+    instrux + 977,
+    instrux + 978,
+    instrux + 1085,
+    instrux + 1086,
+    instrux + 1087,
+    instrux + 1192,
+    instrux + 1193,
+    instrux + 1194,
+};
+
+static const struct itemplate * const itable_84 = {
+    instrux + 1106,
+    instrux + 1107,
+    instrux + 1114,
+};
+
+static const struct itemplate * const itable_85 = {
+    instrux + 1108,
+    instrux + 1109,
+    instrux + 1110,
+    instrux + 1111,
+    instrux + 1112,
+    instrux + 1113,
+    instrux + 1115,
+    instrux + 1116,
+    instrux + 1117,
+};
+
+static const struct itemplate * const itable_86 = {
+    instrux + 1162,
+    instrux + 1166,
+    instrux + 1170,
+};
+
+static const struct itemplate * const itable_87 = {
+    instrux + 1163,
+    instrux + 1164,
+    instrux + 1165,
+    instrux + 1167,
+    instrux + 1168,
+    instrux + 1169,
+    instrux + 1171,
+    instrux + 1172,
+    instrux + 1173,
+};
+
+static const struct itemplate * const itable_88 = {
+    instrux + 628,
+    instrux + 629,
+};
+
+static const struct itemplate * const itable_89 = {
+    instrux + 630,
+    instrux + 631,
+    instrux + 632,
+    instrux + 633,
+    instrux + 634,
+    instrux + 635,
+};
+
+static const struct itemplate * const itable_8A = {
+    instrux + 636,
+    instrux + 637,
+};
+
+static const struct itemplate * const itable_8B = {
+    instrux + 638,
+    instrux + 639,
+    instrux + 640,
+    instrux + 641,
+    instrux + 642,
+    instrux + 643,
+};
+
+static const struct itemplate * const itable_8C = {
+    instrux + 604,
+    instrux + 605,
+    instrux + 606,
+    instrux + 607,
+};
+
+static const struct itemplate * const itable_8D = {
+    instrux + 540,
+    instrux + 541,
+    instrux + 542,
+};
+
+static const struct itemplate * const itable_8E = {
+    instrux + 608,
+    instrux + 609,
+    instrux + 610,
+    instrux + 611,
+};
+
+static const struct itemplate * const itable_8F = {
+    instrux + 791,
+    instrux + 792,
+    instrux + 793,
+};
+
+static const struct itemplate * const itable_90 = {
+    instrux + 689,
+    instrux + 749,
+    instrux + 1155,
+    instrux + 1156,
+    instrux + 1157,
+    instrux + 1158,
+    instrux + 1159,
+    instrux + 1160,
+    instrux + 1161,
+};
+
+static const struct itemplate * const itable_91 = {
+    instrux + 1155,
+    instrux + 1156,
+    instrux + 1157,
+    instrux + 1158,
+    instrux + 1159,
+    instrux + 1160,
+};
+
+static const struct itemplate * const itable_92 = {
+    instrux + 1155,
+    instrux + 1156,
+    instrux + 1157,
+    instrux + 1158,
+    instrux + 1159,
+    instrux + 1160,
+};
+
+static const struct itemplate * const itable_93 = {
+    instrux + 1155,
+    instrux + 1156,
+    instrux + 1157,
+    instrux + 1158,
+    instrux + 1159,
+    instrux + 1160,
+};
+
+static const struct itemplate * const itable_94 = {
+    instrux + 1155,
+    instrux + 1156,
+    instrux + 1157,
+    instrux + 1158,
+    instrux + 1159,
+    instrux + 1160,
+};
+
+static const struct itemplate * const itable_95 = {
+    instrux + 1155,
+    instrux + 1156,
+    instrux + 1157,
+    instrux + 1158,
+    instrux + 1159,
+    instrux + 1160,
+};
+
+static const struct itemplate * const itable_96 = {
+    instrux + 1155,
+    instrux + 1156,
+    instrux + 1157,
+    instrux + 1158,
+    instrux + 1159,
+    instrux + 1160,
+};
+
+static const struct itemplate * const itable_97 = {
+    instrux + 1155,
+    instrux + 1156,
+    instrux + 1157,
+    instrux + 1158,
+    instrux + 1159,
+    instrux + 1160,
+};
+
+static const struct itemplate * const itable_98 = {
+    instrux + 175,
+    instrux + 177,
+    instrux + 232,
+};
+
+static const struct itemplate * const itable_99 = {
+    instrux + 176,
+    instrux + 230,
+    instrux + 231,
+};
+
+static const struct itemplate * const itable_9A = {
+    instrux + 161,
+    instrux + 162,
+    instrux + 163,
+    instrux + 164,
+    instrux + 165,
+};
+
+static const struct itemplate * const itable_9C = {
+    instrux + 860,
+    instrux + 861,
+    instrux + 862,
+    instrux + 863,
+};
+
+static const struct itemplate * const itable_9D = {
+    instrux + 802,
+    instrux + 803,
+    instrux + 804,
+    instrux + 805,
+};
+
+static const struct itemplate * const itable_9E = {
+    instrux + 946,
+};
+
+static const struct itemplate * const itable_9F = {
+    instrux + 527,
+};
+
+static const struct itemplate * const itable_A0 = {
+    instrux + 612,
+};
+
+static const struct itemplate * const itable_A1 = {
+    instrux + 613,
+    instrux + 614,
+    instrux + 615,
+};
+
+static const struct itemplate * const itable_A2 = {
+    instrux + 616,
+};
+
+static const struct itemplate * const itable_A3 = {
+    instrux + 617,
+    instrux + 618,
+    instrux + 619,
+};
+
+static const struct itemplate * const itable_A4 = {
+    instrux + 662,
+};
+
+static const struct itemplate * const itable_A5 = {
+    instrux + 663,
+    instrux + 664,
+    instrux + 665,
+};
+
+static const struct itemplate * const itable_A6 = {
+    instrux + 213,
+};
+
+static const struct itemplate * const itable_A7 = {
+    instrux + 214,
+    instrux + 215,
+    instrux + 216,
+};
+
+static const struct itemplate * const itable_A8 = {
+    instrux + 1118,
+};
+
+static const struct itemplate * const itable_A9 = {
+    instrux + 1119,
+    instrux + 1120,
+    instrux + 1121,
+};
+
+static const struct itemplate * const itable_AA = {
+    instrux + 1060,
+};
+
+static const struct itemplate * const itable_AB = {
+    instrux + 1061,
+    instrux + 1062,
+    instrux + 1063,
+};
+
+static const struct itemplate * const itable_AC = {
+    instrux + 561,
+};
+
+static const struct itemplate * const itable_AD = {
+    instrux + 562,
+    instrux + 563,
+    instrux + 564,
+};
+
+static const struct itemplate * const itable_AE = {
+    instrux + 990,
+};
+
+static const struct itemplate * const itable_AF = {
+    instrux + 991,
+    instrux + 992,
+    instrux + 993,
+};
+
+static const struct itemplate * const itable_B0 = {
+    instrux + 644,
+};
+
+static const struct itemplate * const itable_B1 = {
+    instrux + 644,
+};
+
+static const struct itemplate * const itable_B2 = {
+    instrux + 644,
+};
+
+static const struct itemplate * const itable_B3 = {
+    instrux + 644,
+};
+
+static const struct itemplate * const itable_B4 = {
+    instrux + 644,
+};
+
+static const struct itemplate * const itable_B5 = {
+    instrux + 644,
+};
+
+static const struct itemplate * const itable_B6 = {
+    instrux + 644,
+};
+
+static const struct itemplate * const itable_B7 = {
+    instrux + 644,
+};
+
+static const struct itemplate * const itable_B8 = {
+    instrux + 645,
+    instrux + 646,
+    instrux + 647,
+};
+
+static const struct itemplate * const itable_B9 = {
+    instrux + 645,
+    instrux + 646,
+    instrux + 647,
+};
+
+static const struct itemplate * const itable_BA = {
+    instrux + 645,
+    instrux + 646,
+    instrux + 647,
+};
+
+static const struct itemplate * const itable_BB = {
+    instrux + 645,
+    instrux + 646,
+    instrux + 647,
+};
+
+static const struct itemplate * const itable_BC = {
+    instrux + 645,
+    instrux + 646,
+    instrux + 647,
+};
+
+static const struct itemplate * const itable_BD = {
+    instrux + 645,
+    instrux + 646,
+    instrux + 647,
+};
+
+static const struct itemplate * const itable_BE = {
+    instrux + 645,
+    instrux + 646,
+    instrux + 647,
+};
+
+static const struct itemplate * const itable_BF = {
+    instrux + 645,
+    instrux + 646,
+    instrux + 647,
+};
+
+static const struct itemplate * const itable_C0 = {
+    instrux + 867,
+    instrux + 879,
+    instrux + 920,
+    instrux + 932,
+    instrux + 950,
+    instrux + 998,
+    instrux + 1022,
+};
+
+static const struct itemplate * const itable_C1 = {
+    instrux + 870,
+    instrux + 873,
+    instrux + 876,
+    instrux + 882,
+    instrux + 885,
+    instrux + 888,
+    instrux + 923,
+    instrux + 926,
+    instrux + 929,
+    instrux + 935,
+    instrux + 938,
+    instrux + 941,
+    instrux + 953,
+    instrux + 956,
+    instrux + 959,
+    instrux + 1001,
+    instrux + 1004,
+    instrux + 1007,
+    instrux + 1025,
+    instrux + 1028,
+    instrux + 1031,
+};
+
+static const struct itemplate * const itable_C2 = {
+    instrux + 895,
+    instrux + 899,
+    instrux + 901,
+    instrux + 905,
+    instrux + 907,
+    instrux + 911,
+    instrux + 913,
+    instrux + 917,
+};
+
+static const struct itemplate * const itable_C3 = {
+    instrux + 894,
+    instrux + 898,
+    instrux + 900,
+    instrux + 904,
+    instrux + 906,
+    instrux + 910,
+    instrux + 912,
+    instrux + 916,
+};
+
+static const struct itemplate * const itable_C4 = {
+    instrux + 544,
+    instrux + 545,
+};
+
+static const struct itemplate * const itable_C5 = {
+    instrux + 538,
+    instrux + 539,
+};
+
+static const struct itemplate * const itable_C6 = {
+    instrux + 648,
+    instrux + 653,
+    instrux + 3979,
+    instrux + 3980,
+};
+
+static const struct itemplate * const itable_C7 = {
+    instrux + 649,
+    instrux + 650,
+    instrux + 651,
+    instrux + 652,
+    instrux + 654,
+    instrux + 655,
+    instrux + 3981,
+    instrux + 3982,
+    instrux + 3983,
+    instrux + 3984,
+};
+
+static const struct itemplate * const itable_C8 = {
+    instrux + 247,
+};
+
+static const struct itemplate * const itable_C9 = {
+    instrux + 543,
+};
+
+static const struct itemplate * const itable_CA = {
+    instrux + 897,
+    instrux + 903,
+    instrux + 909,
+    instrux + 915,
+};
+
+static const struct itemplate * const itable_CB = {
+    instrux + 896,
+    instrux + 902,
+    instrux + 908,
+    instrux + 914,
+};
+
+static const struct itemplate * const itable_CC = {
+    instrux + 486,
+};
+
+static const struct itemplate * const itable_CD = {
+    instrux + 484,
+};
+
+static const struct itemplate * const itable_CE = {
+    instrux + 487,
+};
+
+static const struct itemplate * const itable_CF = {
+    instrux + 496,
+    instrux + 497,
+    instrux + 498,
+    instrux + 499,
+};
+
+static const struct itemplate * const itable_D0 = {
+    instrux + 865,
+    instrux + 877,
+    instrux + 918,
+    instrux + 930,
+    instrux + 948,
+    instrux + 996,
+    instrux + 1020,
+};
+
+static const struct itemplate * const itable_D1 = {
+    instrux + 868,
+    instrux + 871,
+    instrux + 874,
+    instrux + 880,
+    instrux + 883,
+    instrux + 886,
+    instrux + 921,
+    instrux + 924,
+    instrux + 927,
+    instrux + 933,
+    instrux + 936,
+    instrux + 939,
+    instrux + 951,
+    instrux + 954,
+    instrux + 957,
+    instrux + 999,
+    instrux + 1002,
+    instrux + 1005,
+    instrux + 1023,
+    instrux + 1026,
+    instrux + 1029,
+};
+
+static const struct itemplate * const itable_D2 = {
+    instrux + 866,
+    instrux + 878,
+    instrux + 919,
+    instrux + 931,
+    instrux + 949,
+    instrux + 997,
+    instrux + 1021,
+};
+
+static const struct itemplate * const itable_D3 = {
+    instrux + 869,
+    instrux + 872,
+    instrux + 875,
+    instrux + 881,
+    instrux + 884,
+    instrux + 887,
+    instrux + 922,
+    instrux + 925,
+    instrux + 928,
+    instrux + 934,
+    instrux + 937,
+    instrux + 940,
+    instrux + 952,
+    instrux + 955,
+    instrux + 958,
+    instrux + 1000,
+    instrux + 1003,
+    instrux + 1006,
+    instrux + 1024,
+    instrux + 1027,
+    instrux + 1030,
+};
+
+static const struct itemplate * const itable_D4 = {
+    instrux + 11,
+    instrux + 12,
+};
+
+static const struct itemplate * const itable_D5 = {
+    instrux + 9,
+    instrux + 10,
+};
+
+static const struct itemplate * const itable_D6 = {
+    instrux + 947,
+};
+
+static const struct itemplate * const itable_D7 = {
+    instrux + 1174,
+    instrux + 1175,
+};
+
+static const struct itemplate * const itable_D8 = {
+    instrux + 252,
+    instrux + 255,
+    instrux + 257,
+    instrux + 282,
+    instrux + 284,
+    instrux + 285,
+    instrux + 290,
+    instrux + 292,
+    instrux + 293,
+    instrux + 298,
+    instrux + 301,
+    instrux + 303,
+    instrux + 306,
+    instrux + 310,
+    instrux + 311,
+    instrux + 362,
+    instrux + 366,
+    instrux + 367,
+    instrux + 403,
+    instrux + 407,
+    instrux + 408,
+    instrux + 411,
+    instrux + 415,
+    instrux + 416,
+};
+
+static const struct itemplate * const itable_D9 = {
+    instrux + 250,
+    instrux + 251,
+    instrux + 264,
+    instrux + 295,
+    instrux + 296,
+    instrux + 335,
+    instrux + 349,
+    instrux + 352,
+    instrux + 353,
+    instrux + 354,
+    instrux + 355,
+    instrux + 356,
+    instrux + 357,
+    instrux + 358,
+    instrux + 359,
+    instrux + 360,
+    instrux + 361,
+    instrux + 374,
+    instrux + 376,
+    instrux + 377,
+    instrux + 380,
+    instrux + 381,
+    instrux + 382,
+    instrux + 383,
+    instrux + 384,
+    instrux + 387,
+    instrux + 389,
+    instrux + 390,
+    instrux + 391,
+    instrux + 392,
+    instrux + 395,
+    instrux + 396,
+    instrux + 397,
+    instrux + 419,
+    instrux + 429,
+    instrux + 430,
+    instrux + 431,
+    instrux + 432,
+    instrux + 433,
+    instrux + 434,
+    instrux + 435,
+};
+
+static const struct itemplate * const itable_DA = {
+    instrux + 266,
+    instrux + 267,
+    instrux + 268,
+    instrux + 269,
+    instrux + 270,
+    instrux + 271,
+    instrux + 280,
+    instrux + 281,
+    instrux + 320,
+    instrux + 322,
+    instrux + 324,
+    instrux + 326,
+    instrux + 328,
+    instrux + 333,
+    instrux + 345,
+    instrux + 347,
+    instrux + 428,
+};
+
+static const struct itemplate * const itable_DB = {
+    instrux + 265,
+    instrux + 272,
+    instrux + 273,
+    instrux + 274,
+    instrux + 275,
+    instrux + 276,
+    instrux + 277,
+    instrux + 278,
+    instrux + 279,
+    instrux + 286,
+    instrux + 287,
+    instrux + 297,
+    instrux + 315,
+    instrux + 330,
+    instrux + 336,
+    instrux + 337,
+    instrux + 339,
+    instrux + 343,
+    instrux + 351,
+    instrux + 370,
+    instrux + 371,
+    instrux + 372,
+    instrux + 373,
+    instrux + 388,
+    instrux + 399,
+    instrux + 422,
+    instrux + 423,
+};
+
+static const struct itemplate * const itable_DC = {
+    instrux + 253,
+    instrux + 254,
+    instrux + 256,
+    instrux + 283,
+    instrux + 291,
+    instrux + 299,
+    instrux + 300,
+    instrux + 302,
+    instrux + 307,
+    instrux + 308,
+    instrux + 309,
+    instrux + 363,
+    instrux + 364,
+    instrux + 365,
+    instrux + 404,
+    instrux + 405,
+    instrux + 406,
+    instrux + 412,
+    instrux + 413,
+    instrux + 414,
+};
+
+static const struct itemplate * const itable_DD = {
+    instrux + 316,
+    instrux + 317,
+    instrux + 344,
+    instrux + 350,
+    instrux + 375,
+    instrux + 378,
+    instrux + 385,
+    instrux + 386,
+    instrux + 393,
+    instrux + 394,
+    instrux + 398,
+    instrux + 400,
+    instrux + 401,
+    instrux + 420,
+    instrux + 421,
+    instrux + 426,
+    instrux + 427,
+};
+
+static const struct itemplate * const itable_DE = {
+    instrux + 258,
+    instrux + 259,
+    instrux + 294,
+    instrux + 304,
+    instrux + 305,
+    instrux + 312,
+    instrux + 313,
+    instrux + 321,
+    instrux + 323,
+    instrux + 325,
+    instrux + 327,
+    instrux + 329,
+    instrux + 334,
+    instrux + 346,
+    instrux + 348,
+    instrux + 368,
+    instrux + 369,
+    instrux + 409,
+    instrux + 410,
+    instrux + 417,
+    instrux + 418,
+};
+
+static const struct itemplate * const itable_DF = {
+    instrux + 260,
+    instrux + 261,
+    instrux + 262,
+    instrux + 263,
+    instrux + 288,
+    instrux + 289,
+    instrux + 318,
+    instrux + 319,
+    instrux + 331,
+    instrux + 332,
+    instrux + 338,
+    instrux + 340,
+    instrux + 341,
+    instrux + 342,
+    instrux + 379,
+    instrux + 402,
+    instrux + 424,
+    instrux + 425,
+};
+
+static const struct itemplate * const itable_E0 = {
+    instrux + 573,
+    instrux + 574,
+    instrux + 575,
+    instrux + 576,
+    instrux + 577,
+    instrux + 578,
+    instrux + 579,
+    instrux + 580,
+};
+
+static const struct itemplate * const itable_E1 = {
+    instrux + 569,
+    instrux + 570,
+    instrux + 571,
+    instrux + 572,
+    instrux + 581,
+    instrux + 582,
+    instrux + 583,
+    instrux + 584,
+};
+
+static const struct itemplate * const itable_E2 = {
+    instrux + 565,
+    instrux + 566,
+    instrux + 567,
+    instrux + 568,
+};
+
+static const struct itemplate * const itable_E3 = {
+    instrux + 500,
+    instrux + 501,
+    instrux + 502,
+};
+
+static const struct itemplate * const itable_E4 = {
+    instrux + 469,
+};
+
+static const struct itemplate * const itable_E5 = {
+    instrux + 470,
+    instrux + 471,
+};
+
+static const struct itemplate * const itable_E6 = {
+    instrux + 727,
+};
+
+static const struct itemplate * const itable_E7 = {
+    instrux + 728,
+    instrux + 729,
+};
+
+static const struct itemplate * const itable_E8 = {
+    instrux + 157,
+    instrux + 158,
+    instrux + 159,
+    instrux + 160,
+};
+
+static const struct itemplate * const itable_E9 = {
+    instrux + 504,
+    instrux + 505,
+    instrux + 506,
+    instrux + 507,
+};
+
+static const struct itemplate * const itable_EA = {
+    instrux + 508,
+    instrux + 509,
+    instrux + 510,
+    instrux + 511,
+    instrux + 512,
+};
+
+static const struct itemplate * const itable_EB = {
+    instrux + 503,
+};
+
+static const struct itemplate * const itable_EC = {
+    instrux + 472,
+};
+
+static const struct itemplate * const itable_ED = {
+    instrux + 473,
+    instrux + 474,
+};
+
+static const struct itemplate * const itable_EE = {
+    instrux + 730,
+};
+
+static const struct itemplate * const itable_EF = {
+    instrux + 731,
+    instrux + 732,
+};
+
+static const struct itemplate * const itable_F1 = {
+    instrux + 485,
+    instrux + 1051,
+};
+
+static const struct itemplate * const itable_F4 = {
+    instrux + 436,
+};
+
+static const struct itemplate * const itable_F5 = {
+    instrux + 182,
+};
+
+static const struct itemplate * const itable_F6 = {
+    instrux + 241,
+    instrux + 437,
+    instrux + 441,
+    instrux + 679,
+    instrux + 685,
+    instrux + 693,
+    instrux + 1122,
+    instrux + 1126,
+};
+
+static const struct itemplate * const itable_F7 = {
+    instrux + 242,
+    instrux + 243,
+    instrux + 244,
+    instrux + 438,
+    instrux + 439,
+    instrux + 440,
+    instrux + 442,
+    instrux + 443,
+    instrux + 444,
+    instrux + 680,
+    instrux + 681,
+    instrux + 682,
+    instrux + 686,
+    instrux + 687,
+    instrux + 688,
+    instrux + 694,
+    instrux + 695,
+    instrux + 696,
+    instrux + 1123,
+    instrux + 1124,
+    instrux + 1125,
+    instrux + 1127,
+    instrux + 1128,
+};
+
+static const struct itemplate * const itable_F8 = {
+    instrux + 178,
+};
+
+static const struct itemplate * const itable_F9 = {
+    instrux + 1057,
+};
+
+static const struct itemplate * const itable_FA = {
+    instrux + 180,
+};
+
+static const struct itemplate * const itable_FB = {
+    instrux + 1059,
+};
+
+static const struct itemplate * const itable_FC = {
+    instrux + 179,
+};
+
+static const struct itemplate * const itable_FD = {
+    instrux + 1058,
+};
+
+static const struct itemplate * const itable_FE = {
+    instrux + 237,
+    instrux + 477,
+};
+
+static const struct itemplate * const itable_FF = {
+    instrux + 166,
+    instrux + 167,
+    instrux + 168,
+    instrux + 169,
+    instrux + 170,
+    instrux + 171,
+    instrux + 172,
+    instrux + 173,
+    instrux + 174,
+    instrux + 238,
+    instrux + 239,
+    instrux + 240,
+    instrux + 478,
+    instrux + 479,
+    instrux + 480,
+    instrux + 513,
+    instrux + 514,
+    instrux + 515,
+    instrux + 516,
+    instrux + 517,
+    instrux + 518,
+    instrux + 519,
+    instrux + 520,
+    instrux + 521,
+    instrux + 842,
+    instrux + 843,
+    instrux + 844,
+};
+
+static const struct itemplate * const itable_evex01010 = {
+    instrux + 5189,
+    instrux + 5190,
+    instrux + 5191,
+};
+
+static const struct itemplate * const itable_evex01011 = {
+    instrux + 5192,
+    instrux + 5193,
+    instrux + 5194,
+    instrux + 5195,
+    instrux + 5196,
+    instrux + 5197,
+};
+
+static const struct itemplate * const itable_evex01012 = {
+    instrux + 5130,
+    instrux + 5131,
+    instrux + 5143,
+    instrux + 5144,
+};
+
+static const struct itemplate * const itable_evex01013 = {
+    instrux + 5145,
+};
+
+static const struct itemplate * const itable_evex01014 = {
+    instrux + 6758,
+    instrux + 6759,
+    instrux + 6760,
+    instrux + 6761,
+    instrux + 6762,
+    instrux + 6763,
+};
+
+static const struct itemplate * const itable_evex01015 = {
+    instrux + 6746,
+    instrux + 6747,
+    instrux + 6748,
+    instrux + 6749,
+    instrux + 6750,
+    instrux + 6751,
+};
+
+static const struct itemplate * const itable_evex01016 = {
+    instrux + 5135,
+    instrux + 5136,
+    instrux + 5138,
+    instrux + 5139,
+};
+
+static const struct itemplate * const itable_evex01017 = {
+    instrux + 5137,
+};
+
+static const struct itemplate * const itable_evex01028 = {
+    instrux + 5080,
+    instrux + 5081,
+    instrux + 5082,
+};
+
+static const struct itemplate * const itable_evex01029 = {
+    instrux + 5083,
+    instrux + 5084,
+    instrux + 5085,
+    instrux + 5086,
+    instrux + 5087,
+    instrux + 5088,
+};
+
+static const struct itemplate * const itable_evex0102B = {
+    instrux + 5155,
+    instrux + 5156,
+    instrux + 5157,
+};
+
+static const struct itemplate * const itable_evex0102E = {
+    instrux + 6739,
+};
+
+static const struct itemplate * const itable_evex0102F = {
+    instrux + 4632,
+};
+
+static const struct itemplate * const itable_evex01051 = {
+    instrux + 6715,
+    instrux + 6716,
+    instrux + 6717,
+};
+
+static const struct itemplate * const itable_evex01054 = {
+    instrux + 4216,
+    instrux + 4217,
+    instrux + 4218,
+    instrux + 4219,
+    instrux + 4220,
+    instrux + 4221,
+};
+
+static const struct itemplate * const itable_evex01055 = {
+    instrux + 4204,
+    instrux + 4205,
+    instrux + 4206,
+    instrux + 4207,
+    instrux + 4208,
+    instrux + 4209,
+};
+
+static const struct itemplate * const itable_evex01056 = {
+    instrux + 5220,
+    instrux + 5221,
+    instrux + 5222,
+    instrux + 5223,
+    instrux + 5224,
+    instrux + 5225,
+};
+
+static const struct itemplate * const itable_evex01057 = {
+    instrux + 6770,
+    instrux + 6771,
+    instrux + 6772,
+    instrux + 6773,
+    instrux + 6774,
+    instrux + 6775,
+};
+
+static const struct itemplate * const itable_evex01058 = {
+    instrux + 4176,
+    instrux + 4177,
+    instrux + 4178,
+    instrux + 4179,
+    instrux + 4180,
+    instrux + 4181,
+};
+
+static const struct itemplate * const itable_evex01059 = {
+    instrux + 5204,
+    instrux + 5205,
+    instrux + 5206,
+    instrux + 5207,
+    instrux + 5208,
+    instrux + 5209,
+};
+
+static const struct itemplate * const itable_evex0105A = {
+    instrux + 4672,
+    instrux + 4673,
+    instrux + 4674,
+};
+
+static const struct itemplate * const itable_evex0105B = {
+    instrux + 4648,
+    instrux + 4649,
+    instrux + 4650,
+    instrux + 4693,
+    instrux + 4694,
+    instrux + 4695,
+};
+
+static const struct itemplate * const itable_evex0105C = {
+    instrux + 6728,
+    instrux + 6729,
+    instrux + 6730,
+    instrux + 6731,
+    instrux + 6732,
+    instrux + 6733,
+};
+
+static const struct itemplate * const itable_evex0105D = {
+    instrux + 5061,
+    instrux + 5062,
+    instrux + 5063,
+    instrux + 5064,
+    instrux + 5065,
+    instrux + 5066,
+};
+
+static const struct itemplate * const itable_evex0105E = {
+    instrux + 4770,
+    instrux + 4771,
+    instrux + 4772,
+    instrux + 4773,
+    instrux + 4774,
+    instrux + 4775,
+};
+
+static const struct itemplate * const itable_evex0105F = {
+    instrux + 5045,
+    instrux + 5046,
+    instrux + 5047,
+    instrux + 5048,
+    instrux + 5049,
+    instrux + 5050,
+};
+
+static const struct itemplate * const itable_evex01078 = {
+    instrux + 4716,
+    instrux + 4717,
+    instrux + 4718,
+    instrux + 4728,
+    instrux + 4729,
+    instrux + 4730,
+};
+
+static const struct itemplate * const itable_evex01079 = {
+    instrux + 4660,
+    instrux + 4661,
+    instrux + 4662,
+    instrux + 4684,
+    instrux + 4685,
+    instrux + 4686,
+};
+
+static const struct itemplate * const itable_evex010C2 = {
+    instrux + 4258,
+    instrux + 4259,
+    instrux + 4260,
+    instrux + 4266,
+    instrux + 4267,
+    instrux + 4268,
+    instrux + 4274,
+    instrux + 4275,
+    instrux + 4276,
+    instrux + 4282,
+    instrux + 4283,
+    instrux + 4284,
+    instrux + 4290,
+    instrux + 4291,
+    instrux + 4292,
+    instrux + 4298,
+    instrux + 4299,
+    instrux + 4300,
+    instrux + 4306,
+    instrux + 4307,
+    instrux + 4308,
+    instrux + 4314,
+    instrux + 4315,
+    instrux + 4316,
+    instrux + 4322,
+    instrux + 4323,
+    instrux + 4324,
+    instrux + 4330,
+    instrux + 4331,
+    instrux + 4332,
+    instrux + 4338,
+    instrux + 4339,
+    instrux + 4340,
+    instrux + 4346,
+    instrux + 4347,
+    instrux + 4348,
+    instrux + 4354,
+    instrux + 4355,
+    instrux + 4356,
+    instrux + 4362,
+    instrux + 4363,
+    instrux + 4364,
+    instrux + 4370,
+    instrux + 4371,
+    instrux + 4372,
+    instrux + 4378,
+    instrux + 4379,
+    instrux + 4380,
+    instrux + 4386,
+    instrux + 4387,
+    instrux + 4388,
+    instrux + 4394,
+    instrux + 4395,
+    instrux + 4396,
+    instrux + 4402,
+    instrux + 4403,
+    instrux + 4404,
+    instrux + 4410,
+    instrux + 4411,
+    instrux + 4412,
+    instrux + 4418,
+    instrux + 4419,
+    instrux + 4420,
+    instrux + 4426,
+    instrux + 4427,
+    instrux + 4428,
+    instrux + 4434,
+    instrux + 4435,
+    instrux + 4436,
+    instrux + 4442,
+    instrux + 4443,
+    instrux + 4444,
+    instrux + 4450,
+    instrux + 4451,
+    instrux + 4452,
+    instrux + 4458,
+    instrux + 4459,
+    instrux + 4460,
+    instrux + 4466,
+    instrux + 4467,
+    instrux + 4468,
+    instrux + 4474,
+    instrux + 4475,
+    instrux + 4476,
+    instrux + 4482,
+    instrux + 4483,
+    instrux + 4484,
+    instrux + 4490,
+    instrux + 4491,
+    instrux + 4492,
+    instrux + 4498,
+    instrux + 4499,
+    instrux + 4500,
+    instrux + 4506,
+    instrux + 4507,
+    instrux + 4508,
+    instrux + 4514,
+    instrux + 4515,
+    instrux + 4516,
+    instrux + 4522,
+    instrux + 4523,
+    instrux + 4524,
+    instrux + 4530,
+    instrux + 4531,
+    instrux + 4532,
+    instrux + 4538,
+    instrux + 4539,
+    instrux + 4540,
+    instrux + 4546,
+    instrux + 4547,
+    instrux + 4548,
+    instrux + 4554,
+    instrux + 4555,
+    instrux + 4556,
+    instrux + 4562,
+    instrux + 4563,
+    instrux + 4564,
+    instrux + 4570,
+    instrux + 4571,
+    instrux + 4572,
+    instrux + 4578,
+    instrux + 4579,
+    instrux + 4580,
+    instrux + 4586,
+    instrux + 4587,
+    instrux + 4588,
+    instrux + 4594,
+    instrux + 4595,
+    instrux + 4596,
+    instrux + 4602,
+    instrux + 4603,
+    instrux + 4604,
+    instrux + 4610,
+    instrux + 4611,
+    instrux + 4612,
+    instrux + 4618,
+    instrux + 4619,
+    instrux + 4620,
+    instrux + 4626,
+    instrux + 4627,
+    instrux + 4628,
+};
+
+static const struct itemplate * const itable_evex010C6 = {
+    instrux + 6706,
+    instrux + 6707,
+    instrux + 6708,
+    instrux + 6709,
+    instrux + 6710,
+    instrux + 6711,
+};
+
+static const struct itemplate * const itable_evex01110 = {
+    instrux + 5180,
+    instrux + 5181,
+    instrux + 5182,
+};
+
+static const struct itemplate * const itable_evex01111 = {
+    instrux + 5183,
+    instrux + 5184,
+    instrux + 5185,
+    instrux + 5186,
+    instrux + 5187,
+    instrux + 5188,
+};
+
+static const struct itemplate * const itable_evex01112 = {
+    instrux + 5140,
+    instrux + 5141,
+};
+
+static const struct itemplate * const itable_evex01113 = {
+    instrux + 5142,
+};
+
+static const struct itemplate * const itable_evex01114 = {
+    instrux + 6752,
+    instrux + 6753,
+    instrux + 6754,
+    instrux + 6755,
+    instrux + 6756,
+    instrux + 6757,
+};
+
+static const struct itemplate * const itable_evex01115 = {
+    instrux + 6740,
+    instrux + 6741,
+    instrux + 6742,
+    instrux + 6743,
+    instrux + 6744,
+    instrux + 6745,
+};
+
+static const struct itemplate * const itable_evex01116 = {
+    instrux + 5132,
+    instrux + 5133,
+};
+
+static const struct itemplate * const itable_evex01117 = {
+    instrux + 5134,
+};
+
+static const struct itemplate * const itable_evex01128 = {
+    instrux + 5071,
+    instrux + 5072,
+    instrux + 5073,
+};
+
+static const struct itemplate * const itable_evex01129 = {
+    instrux + 5074,
+    instrux + 5075,
+    instrux + 5076,
+    instrux + 5077,
+    instrux + 5078,
+    instrux + 5079,
+};
+
+static const struct itemplate * const itable_evex0112B = {
+    instrux + 5152,
+    instrux + 5153,
+    instrux + 5154,
+};
+
+static const struct itemplate * const itable_evex0112E = {
+    instrux + 6738,
+};
+
+static const struct itemplate * const itable_evex0112F = {
+    instrux + 4631,
+};
+
+static const struct itemplate * const itable_evex01151 = {
+    instrux + 6712,
+    instrux + 6713,
+    instrux + 6714,
+};
+
+static const struct itemplate * const itable_evex01154 = {
+    instrux + 4210,
+    instrux + 4211,
+    instrux + 4212,
+    instrux + 4213,
+    instrux + 4214,
+    instrux + 4215,
+};
+
+static const struct itemplate * const itable_evex01155 = {
+    instrux + 4198,
+    instrux + 4199,
+    instrux + 4200,
+    instrux + 4201,
+    instrux + 4202,
+    instrux + 4203,
+};
+
+static const struct itemplate * const itable_evex01156 = {
+    instrux + 5214,
+    instrux + 5215,
+    instrux + 5216,
+    instrux + 5217,
+    instrux + 5218,
+    instrux + 5219,
+};
+
+static const struct itemplate * const itable_evex01157 = {
+    instrux + 6764,
+    instrux + 6765,
+    instrux + 6766,
+    instrux + 6767,
+    instrux + 6768,
+    instrux + 6769,
+};
+
+static const struct itemplate * const itable_evex01158 = {
+    instrux + 4170,
+    instrux + 4171,
+    instrux + 4172,
+    instrux + 4173,
+    instrux + 4174,
+    instrux + 4175,
+};
+
+static const struct itemplate * const itable_evex01159 = {
+    instrux + 5198,
+    instrux + 5199,
+    instrux + 5200,
+    instrux + 5201,
+    instrux + 5202,
+    instrux + 5203,
+};
+
+static const struct itemplate * const itable_evex0115A = {
+    instrux + 4654,
+    instrux + 4655,
+    instrux + 4656,
+};
+
+static const struct itemplate * const itable_evex0115B = {
+    instrux + 4669,
+    instrux + 4670,
+    instrux + 4671,
+};
+
+static const struct itemplate * const itable_evex0115C = {
+    instrux + 6722,
+    instrux + 6723,
+    instrux + 6724,
+    instrux + 6725,
+    instrux + 6726,
+    instrux + 6727,
+};
+
+static const struct itemplate * const itable_evex0115D = {
+    instrux + 5055,
+    instrux + 5056,
+    instrux + 5057,
+    instrux + 5058,
+    instrux + 5059,
+    instrux + 5060,
+};
+
+static const struct itemplate * const itable_evex0115E = {
+    instrux + 4764,
+    instrux + 4765,
+    instrux + 4766,
+    instrux + 4767,
+    instrux + 4768,
+    instrux + 4769,
+};
+
+static const struct itemplate * const itable_evex0115F = {
+    instrux + 5039,
+    instrux + 5040,
+    instrux + 5041,
+    instrux + 5042,
+    instrux + 5043,
+    instrux + 5044,
+};
+
+static const struct itemplate * const itable_evex01160 = {
+    instrux + 6544,
+    instrux + 6545,
+    instrux + 6546,
+    instrux + 6547,
+    instrux + 6548,
+    instrux + 6549,
+};
+
+static const struct itemplate * const itable_evex01161 = {
+    instrux + 6562,
+    instrux + 6563,
+    instrux + 6564,
+    instrux + 6565,
+    instrux + 6566,
+    instrux + 6567,
+};
+
+static const struct itemplate * const itable_evex01162 = {
+    instrux + 6550,
+    instrux + 6551,
+    instrux + 6552,
+    instrux + 6553,
+    instrux + 6554,
+    instrux + 6555,
+};
+
+static const struct itemplate * const itable_evex01163 = {
+    instrux + 5244,
+    instrux + 5245,
+    instrux + 5246,
+    instrux + 5247,
+    instrux + 5248,
+    instrux + 5249,
+};
+
+static const struct itemplate * const itable_evex01164 = {
+    instrux + 5427,
+    instrux + 5428,
+    instrux + 5429,
+};
+
+static const struct itemplate * const itable_evex01165 = {
+    instrux + 5436,
+    instrux + 5437,
+    instrux + 5438,
+};
+
+static const struct itemplate * const itable_evex01166 = {
+    instrux + 5430,
+    instrux + 5431,
+    instrux + 5432,
+};
+
+static const struct itemplate * const itable_evex01167 = {
+    instrux + 5256,
+    instrux + 5257,
+    instrux + 5258,
+    instrux + 5259,
+    instrux + 5260,
+    instrux + 5261,
+};
+
+static const struct itemplate * const itable_evex01168 = {
+    instrux + 6520,
+    instrux + 6521,
+    instrux + 6522,
+    instrux + 6523,
+    instrux + 6524,
+    instrux + 6525,
+};
+
+static const struct itemplate * const itable_evex01169 = {
+    instrux + 6538,
+    instrux + 6539,
+    instrux + 6540,
+    instrux + 6541,
+    instrux + 6542,
+    instrux + 6543,
+};
+
+static const struct itemplate * const itable_evex0116A = {
+    instrux + 6526,
+    instrux + 6527,
+    instrux + 6528,
+    instrux + 6529,
+    instrux + 6530,
+    instrux + 6531,
+};
+
+static const struct itemplate * const itable_evex0116B = {
+    instrux + 5238,
+    instrux + 5239,
+    instrux + 5240,
+    instrux + 5241,
+    instrux + 5242,
+    instrux + 5243,
+};
+
+static const struct itemplate * const itable_evex0116C = {
+    instrux + 6556,
+    instrux + 6557,
+    instrux + 6558,
+    instrux + 6559,
+    instrux + 6560,
+    instrux + 6561,
+};
+
+static const struct itemplate * const itable_evex0116D = {
+    instrux + 6532,
+    instrux + 6533,
+    instrux + 6534,
+    instrux + 6535,
+    instrux + 6536,
+    instrux + 6537,
+};
+
+static const struct itemplate * const itable_evex0116E = {
+    instrux + 5089,
+    instrux + 5158,
+};
+
+static const struct itemplate * const itable_evex0116F = {
+    instrux + 5094,
+    instrux + 5095,
+    instrux + 5096,
+    instrux + 5100,
+    instrux + 5101,
+    instrux + 5102,
+};
+
+static const struct itemplate * const itable_evex01170 = {
+    instrux + 6259,
+    instrux + 6260,
+    instrux + 6261,
+};
+
+static const struct itemplate * const itable_evex01171 = {
+    instrux + 6322,
+    instrux + 6323,
+    instrux + 6324,
+    instrux + 6325,
+    instrux + 6326,
+    instrux + 6327,
+    instrux + 6376,
+    instrux + 6377,
+    instrux + 6378,
+    instrux + 6379,
+    instrux + 6380,
+    instrux + 6381,
+    instrux + 6436,
+    instrux + 6437,
+    instrux + 6438,
+    instrux + 6439,
+    instrux + 6440,
+    instrux + 6441,
+};
+
+static const struct itemplate * const itable_evex01172 = {
+    instrux + 6187,
+    instrux + 6188,
+    instrux + 6189,
+    instrux + 6190,
+    instrux + 6191,
+    instrux + 6192,
+    instrux + 6193,
+    instrux + 6194,
+    instrux + 6195,
+    instrux + 6196,
+    instrux + 6197,
+    instrux + 6198,
+    instrux + 6211,
+    instrux + 6212,
+    instrux + 6213,
+    instrux + 6214,
+    instrux + 6215,
+    instrux + 6216,
+    instrux + 6217,
+    instrux + 6218,
+    instrux + 6219,
+    instrux + 6220,
+    instrux + 6221,
+    instrux + 6222,
+    instrux + 6274,
+    instrux + 6275,
+    instrux + 6276,
+    instrux + 6277,
+    instrux + 6278,
+    instrux + 6279,
+    instrux + 6334,
+    instrux + 6335,
+    instrux + 6336,
+    instrux + 6337,
+    instrux + 6338,
+    instrux + 6339,
+    instrux + 6346,
+    instrux + 6347,
+    instrux + 6348,
+    instrux + 6349,
+    instrux + 6350,
+    instrux + 6351,
+    instrux + 6388,
+    instrux + 6389,
+    instrux + 6390,
+    instrux + 6391,
+    instrux + 6392,
+    instrux + 6393,
+};
+
+static const struct itemplate * const itable_evex01173 = {
+    instrux + 6280,
+    instrux + 6281,
+    instrux + 6282,
+    instrux + 6283,
+    instrux + 6284,
+    instrux + 6285,
+    instrux + 6292,
+    instrux + 6293,
+    instrux + 6294,
+    instrux + 6295,
+    instrux + 6296,
+    instrux + 6297,
+    instrux + 6394,
+    instrux + 6395,
+    instrux + 6396,
+    instrux + 6397,
+    instrux + 6398,
+    instrux + 6399,
+    instrux + 6406,
+    instrux + 6407,
+    instrux + 6408,
+    instrux + 6409,
+    instrux + 6410,
+    instrux + 6411,
+};
+
+static const struct itemplate * const itable_evex01174 = {
+    instrux + 5415,
+    instrux + 5416,
+    instrux + 5417,
+};
+
+static const struct itemplate * const itable_evex01175 = {
+    instrux + 5424,
+    instrux + 5425,
+    instrux + 5426,
+};
+
+static const struct itemplate * const itable_evex01176 = {
+    instrux + 5418,
+    instrux + 5419,
+    instrux + 5420,
+};
+
+static const struct itemplate * const itable_evex01178 = {
+    instrux + 4719,
+    instrux + 4720,
+    instrux + 4721,
+    instrux + 4731,
+    instrux + 4732,
+    instrux + 4733,
+};
+
+static const struct itemplate * const itable_evex01179 = {
+    instrux + 4663,
+    instrux + 4664,
+    instrux + 4665,
+    instrux + 4687,
+    instrux + 4688,
+    instrux + 4689,
+};
+
+static const struct itemplate * const itable_evex0117A = {
+    instrux + 4713,
+    instrux + 4714,
+    instrux + 4715,
+    instrux + 4725,
+    instrux + 4726,
+    instrux + 4727,
+};
+
+static const struct itemplate * const itable_evex0117B = {
+    instrux + 4657,
+    instrux + 4658,
+    instrux + 4659,
+    instrux + 4681,
+    instrux + 4682,
+    instrux + 4683,
+};
+
+static const struct itemplate * const itable_evex0117E = {
+    instrux + 5090,
+    instrux + 5159,
+};
+
+static const struct itemplate * const itable_evex0117F = {
+    instrux + 5097,
+    instrux + 5098,
+    instrux + 5099,
+    instrux + 5103,
+    instrux + 5104,
+    instrux + 5105,
+};
+
+static const struct itemplate * const itable_evex011C2 = {
+    instrux + 4255,
+    instrux + 4256,
+    instrux + 4257,
+    instrux + 4263,
+    instrux + 4264,
+    instrux + 4265,
+    instrux + 4271,
+    instrux + 4272,
+    instrux + 4273,
+    instrux + 4279,
+    instrux + 4280,
+    instrux + 4281,
+    instrux + 4287,
+    instrux + 4288,
+    instrux + 4289,
+    instrux + 4295,
+    instrux + 4296,
+    instrux + 4297,
+    instrux + 4303,
+    instrux + 4304,
+    instrux + 4305,
+    instrux + 4311,
+    instrux + 4312,
+    instrux + 4313,
+    instrux + 4319,
+    instrux + 4320,
+    instrux + 4321,
+    instrux + 4327,
+    instrux + 4328,
+    instrux + 4329,
+    instrux + 4335,
+    instrux + 4336,
+    instrux + 4337,
+    instrux + 4343,
+    instrux + 4344,
+    instrux + 4345,
+    instrux + 4351,
+    instrux + 4352,
+    instrux + 4353,
+    instrux + 4359,
+    instrux + 4360,
+    instrux + 4361,
+    instrux + 4367,
+    instrux + 4368,
+    instrux + 4369,
+    instrux + 4375,
+    instrux + 4376,
+    instrux + 4377,
+    instrux + 4383,
+    instrux + 4384,
+    instrux + 4385,
+    instrux + 4391,
+    instrux + 4392,
+    instrux + 4393,
+    instrux + 4399,
+    instrux + 4400,
+    instrux + 4401,
+    instrux + 4407,
+    instrux + 4408,
+    instrux + 4409,
+    instrux + 4415,
+    instrux + 4416,
+    instrux + 4417,
+    instrux + 4423,
+    instrux + 4424,
+    instrux + 4425,
+    instrux + 4431,
+    instrux + 4432,
+    instrux + 4433,
+    instrux + 4439,
+    instrux + 4440,
+    instrux + 4441,
+    instrux + 4447,
+    instrux + 4448,
+    instrux + 4449,
+    instrux + 4455,
+    instrux + 4456,
+    instrux + 4457,
+    instrux + 4463,
+    instrux + 4464,
+    instrux + 4465,
+    instrux + 4471,
+    instrux + 4472,
+    instrux + 4473,
+    instrux + 4479,
+    instrux + 4480,
+    instrux + 4481,
+    instrux + 4487,
+    instrux + 4488,
+    instrux + 4489,
+    instrux + 4495,
+    instrux + 4496,
+    instrux + 4497,
+    instrux + 4503,
+    instrux + 4504,
+    instrux + 4505,
+    instrux + 4511,
+    instrux + 4512,
+    instrux + 4513,
+    instrux + 4519,
+    instrux + 4520,
+    instrux + 4521,
+    instrux + 4527,
+    instrux + 4528,
+    instrux + 4529,
+    instrux + 4535,
+    instrux + 4536,
+    instrux + 4537,
+    instrux + 4543,
+    instrux + 4544,
+    instrux + 4545,
+    instrux + 4551,
+    instrux + 4552,
+    instrux + 4553,
+    instrux + 4559,
+    instrux + 4560,
+    instrux + 4561,
+    instrux + 4567,
+    instrux + 4568,
+    instrux + 4569,
+    instrux + 4575,
+    instrux + 4576,
+    instrux + 4577,
+    instrux + 4583,
+    instrux + 4584,
+    instrux + 4585,
+    instrux + 4591,
+    instrux + 4592,
+    instrux + 4593,
+    instrux + 4599,
+    instrux + 4600,
+    instrux + 4601,
+    instrux + 4607,
+    instrux + 4608,
+    instrux + 4609,
+    instrux + 4615,
+    instrux + 4616,
+    instrux + 4617,
+    instrux + 4623,
+    instrux + 4624,
+    instrux + 4625,
+};
+
+static const struct itemplate * const itable_evex011C4 = {
+    instrux + 5829,
+    instrux + 5830,
+    instrux + 5831,
+    instrux + 5832,
+};
+
+static const struct itemplate * const itable_evex011C5 = {
+    instrux + 5806,
+    instrux + 5807,
+    instrux + 5808,
+};
+
+static const struct itemplate * const itable_evex011C6 = {
+    instrux + 6700,
+    instrux + 6701,
+    instrux + 6702,
+    instrux + 6703,
+    instrux + 6704,
+    instrux + 6705,
+};
+
+static const struct itemplate * const itable_evex011D1 = {
+    instrux + 6430,
+    instrux + 6431,
+    instrux + 6432,
+    instrux + 6433,
+    instrux + 6434,
+    instrux + 6435,
+};
+
+static const struct itemplate * const itable_evex011D2 = {
+    instrux + 6382,
+    instrux + 6383,
+    instrux + 6384,
+    instrux + 6385,
+    instrux + 6386,
+    instrux + 6387,
+};
+
+static const struct itemplate * const itable_evex011D3 = {
+    instrux + 6400,
+    instrux + 6401,
+    instrux + 6402,
+    instrux + 6403,
+    instrux + 6404,
+    instrux + 6405,
+};
+
+static const struct itemplate * const itable_evex011D4 = {
+    instrux + 5274,
+    instrux + 5275,
+    instrux + 5276,
+    instrux + 5277,
+    instrux + 5278,
+    instrux + 5279,
+};
+
+static const struct itemplate * const itable_evex011D5 = {
+    instrux + 6157,
+    instrux + 6158,
+    instrux + 6159,
+    instrux + 6160,
+    instrux + 6161,
+    instrux + 6162,
+};
+
+static const struct itemplate * const itable_evex011D6 = {
+    instrux + 5161,
+};
+
+static const struct itemplate * const itable_evex011D8 = {
+    instrux + 6472,
+    instrux + 6473,
+    instrux + 6474,
+    instrux + 6475,
+    instrux + 6476,
+    instrux + 6477,
+};
+
+static const struct itemplate * const itable_evex011D9 = {
+    instrux + 6478,
+    instrux + 6479,
+    instrux + 6480,
+    instrux + 6481,
+    instrux + 6482,
+    instrux + 6483,
+};
+
+static const struct itemplate * const itable_evex011DA = {
+    instrux + 5929,
+    instrux + 5930,
+    instrux + 5931,
+    instrux + 5932,
+    instrux + 5933,
+    instrux + 5934,
+};
+
+static const struct itemplate * const itable_evex011DB = {
+    instrux + 5316,
+    instrux + 5317,
+    instrux + 5318,
+    instrux + 5319,
+    instrux + 5320,
+    instrux + 5321,
+    instrux + 5334,
+    instrux + 5335,
+    instrux + 5336,
+    instrux + 5337,
+    instrux + 5338,
+    instrux + 5339,
+};
+
+static const struct itemplate * const itable_evex011DC = {
+    instrux + 5292,
+    instrux + 5293,
+    instrux + 5294,
+    instrux + 5295,
+    instrux + 5296,
+    instrux + 5297,
+};
+
+static const struct itemplate * const itable_evex011DD = {
+    instrux + 5298,
+    instrux + 5299,
+    instrux + 5300,
+    instrux + 5301,
+    instrux + 5302,
+    instrux + 5303,
+};
+
+static const struct itemplate * const itable_evex011DE = {
+    instrux + 5881,
+    instrux + 5882,
+    instrux + 5883,
+    instrux + 5884,
+    instrux + 5885,
+    instrux + 5886,
+};
+
+static const struct itemplate * const itable_evex011DF = {
+    instrux + 5322,
+    instrux + 5323,
+    instrux + 5324,
+    instrux + 5325,
+    instrux + 5326,
+    instrux + 5327,
+    instrux + 5328,
+    instrux + 5329,
+    instrux + 5330,
+    instrux + 5331,
+    instrux + 5332,
+    instrux + 5333,
+};
+
+static const struct itemplate * const itable_evex011E0 = {
+    instrux + 5340,
+    instrux + 5341,
+    instrux + 5342,
+    instrux + 5343,
+    instrux + 5344,
+    instrux + 5345,
+};
+
+static const struct itemplate * const itable_evex011E1 = {
+    instrux + 6370,
+    instrux + 6371,
+    instrux + 6372,
+    instrux + 6373,
+    instrux + 6374,
+    instrux + 6375,
+};
+
+static const struct itemplate * const itable_evex011E2 = {
+    instrux + 6328,
+    instrux + 6329,
+    instrux + 6330,
+    instrux + 6331,
+    instrux + 6332,
+    instrux + 6333,
+    instrux + 6340,
+    instrux + 6341,
+    instrux + 6342,
+    instrux + 6343,
+    instrux + 6344,
+    instrux + 6345,
+};
+
+static const struct itemplate * const itable_evex011E3 = {
+    instrux + 5346,
+    instrux + 5347,
+    instrux + 5348,
+    instrux + 5349,
+    instrux + 5350,
+    instrux + 5351,
+};
+
+static const struct itemplate * const itable_evex011E4 = {
+    instrux + 6133,
+    instrux + 6134,
+    instrux + 6135,
+    instrux + 6136,
+    instrux + 6137,
+    instrux + 6138,
+};
+
+static const struct itemplate * const itable_evex011E5 = {
+    instrux + 6139,
+    instrux + 6140,
+    instrux + 6141,
+    instrux + 6142,
+    instrux + 6143,
+    instrux + 6144,
+};
+
+static const struct itemplate * const itable_evex011E6 = {
+    instrux + 4710,
+    instrux + 4711,
+    instrux + 4712,
+};
+
+static const struct itemplate * const itable_evex011E7 = {
+    instrux + 5146,
+    instrux + 5147,
+    instrux + 5148,
+};
+
+static const struct itemplate * const itable_evex011E8 = {
+    instrux + 6460,
+    instrux + 6461,
+    instrux + 6462,
+    instrux + 6463,
+    instrux + 6464,
+    instrux + 6465,
+};
+
+static const struct itemplate * const itable_evex011E9 = {
+    instrux + 6466,
+    instrux + 6467,
+    instrux + 6468,
+    instrux + 6469,
+    instrux + 6470,
+    instrux + 6471,
+};
+
+static const struct itemplate * const itable_evex011EA = {
+    instrux + 5923,
+    instrux + 5924,
+    instrux + 5925,
+    instrux + 5926,
+    instrux + 5927,
+    instrux + 5928,
+};
+
+static const struct itemplate * const itable_evex011EB = {
+    instrux + 6175,
+    instrux + 6176,
+    instrux + 6177,
+    instrux + 6178,
+    instrux + 6179,
+    instrux + 6180,
+    instrux + 6181,
+    instrux + 6182,
+    instrux + 6183,
+    instrux + 6184,
+    instrux + 6185,
+    instrux + 6186,
+};
+
+static const struct itemplate * const itable_evex011EC = {
+    instrux + 5280,
+    instrux + 5281,
+    instrux + 5282,
+    instrux + 5283,
+    instrux + 5284,
+    instrux + 5285,
+};
+
+static const struct itemplate * const itable_evex011ED = {
+    instrux + 5286,
+    instrux + 5287,
+    instrux + 5288,
+    instrux + 5289,
+    instrux + 5290,
+    instrux + 5291,
+};
+
+static const struct itemplate * const itable_evex011EE = {
+    instrux + 5875,
+    instrux + 5876,
+    instrux + 5877,
+    instrux + 5878,
+    instrux + 5879,
+    instrux + 5880,
+};
+
+static const struct itemplate * const itable_evex011EF = {
+    instrux + 6568,
+    instrux + 6569,
+    instrux + 6570,
+    instrux + 6571,
+    instrux + 6572,
+    instrux + 6573,
+    instrux + 6574,
+    instrux + 6575,
+    instrux + 6576,
+    instrux + 6577,
+    instrux + 6578,
+    instrux + 6579,
+};
+
+static const struct itemplate * const itable_evex011F1 = {
+    instrux + 6316,
+    instrux + 6317,
+    instrux + 6318,
+    instrux + 6319,
+    instrux + 6320,
+    instrux + 6321,
+};
+
+static const struct itemplate * const itable_evex011F2 = {
+    instrux + 6268,
+    instrux + 6269,
+    instrux + 6270,
+    instrux + 6271,
+    instrux + 6272,
+    instrux + 6273,
+};
+
+static const struct itemplate * const itable_evex011F3 = {
+    instrux + 6286,
+    instrux + 6287,
+    instrux + 6288,
+    instrux + 6289,
+    instrux + 6290,
+    instrux + 6291,
+};
+
+static const struct itemplate * const itable_evex011F4 = {
+    instrux + 6169,
+    instrux + 6170,
+    instrux + 6171,
+    instrux + 6172,
+    instrux + 6173,
+    instrux + 6174,
+};
+
+static const struct itemplate * const itable_evex011F5 = {
+    instrux + 5851,
+    instrux + 5852,
+    instrux + 5853,
+    instrux + 5854,
+    instrux + 5855,
+    instrux + 5856,
+};
+
+static const struct itemplate * const itable_evex011F6 = {
+    instrux + 6235,
+    instrux + 6236,
+    instrux + 6237,
+    instrux + 6238,
+    instrux + 6239,
+    instrux + 6240,
+};
+
+static const struct itemplate * const itable_evex011F8 = {
+    instrux + 6442,
+    instrux + 6443,
+    instrux + 6444,
+    instrux + 6445,
+    instrux + 6446,
+    instrux + 6447,
+};
+
+static const struct itemplate * const itable_evex011F9 = {
+    instrux + 6484,
+    instrux + 6485,
+    instrux + 6486,
+    instrux + 6487,
+    instrux + 6488,
+    instrux + 6489,
+};
+
+static const struct itemplate * const itable_evex011FA = {
+    instrux + 6448,
+    instrux + 6449,
+    instrux + 6450,
+    instrux + 6451,
+    instrux + 6452,
+    instrux + 6453,
+};
+
+static const struct itemplate * const itable_evex011FB = {
+    instrux + 6454,
+    instrux + 6455,
+    instrux + 6456,
+    instrux + 6457,
+    instrux + 6458,
+    instrux + 6459,
+};
+
+static const struct itemplate * const itable_evex011FC = {
+    instrux + 5262,
+    instrux + 5263,
+    instrux + 5264,
+    instrux + 5265,
+    instrux + 5266,
+    instrux + 5267,
+};
+
+static const struct itemplate * const itable_evex011FD = {
+    instrux + 5304,
+    instrux + 5305,
+    instrux + 5306,
+    instrux + 5307,
+    instrux + 5308,
+    instrux + 5309,
+};
+
+static const struct itemplate * const itable_evex011FE = {
+    instrux + 5268,
+    instrux + 5269,
+    instrux + 5270,
+    instrux + 5271,
+    instrux + 5272,
+    instrux + 5273,
+};
+
+static const struct itemplate * const itable_evex01210 = {
+    instrux + 5174,
+    instrux + 5176,
+    instrux + 5177,
+};
+
+static const struct itemplate * const itable_evex01211 = {
+    instrux + 5175,
+    instrux + 5178,
+    instrux + 5179,
+};
+
+static const struct itemplate * const itable_evex01212 = {
+    instrux + 5171,
+    instrux + 5172,
+    instrux + 5173,
+};
+
+static const struct itemplate * const itable_evex01216 = {
+    instrux + 5168,
+    instrux + 5169,
+    instrux + 5170,
+};
+
+static const struct itemplate * const itable_evex0122A = {
+    instrux + 4703,
+    instrux + 4704,
+};
+
+static const struct itemplate * const itable_evex0122C = {
+    instrux + 4738,
+    instrux + 4739,
+};
+
+static const struct itemplate * const itable_evex0122D = {
+    instrux + 4706,
+    instrux + 4707,
+};
+
+static const struct itemplate * const itable_evex01251 = {
+    instrux + 6720,
+    instrux + 6721,
+};
+
+static const struct itemplate * const itable_evex01258 = {
+    instrux + 4184,
+    instrux + 4185,
+};
+
+static const struct itemplate * const itable_evex01259 = {
+    instrux + 5212,
+    instrux + 5213,
+};
+
+static const struct itemplate * const itable_evex0125A = {
+    instrux + 4705,
+};
+
+static const struct itemplate * const itable_evex0125B = {
+    instrux + 4722,
+    instrux + 4723,
+    instrux + 4724,
+};
+
+static const struct itemplate * const itable_evex0125C = {
+    instrux + 6736,
+    instrux + 6737,
+};
+
+static const struct itemplate * const itable_evex0125D = {
+    instrux + 5069,
+    instrux + 5070,
+};
+
+static const struct itemplate * const itable_evex0125E = {
+    instrux + 4778,
+    instrux + 4779,
+};
+
+static const struct itemplate * const itable_evex0125F = {
+    instrux + 5053,
+    instrux + 5054,
+};
+
+static const struct itemplate * const itable_evex0126F = {
+    instrux + 5112,
+    instrux + 5113,
+    instrux + 5114,
+    instrux + 5118,
+    instrux + 5119,
+    instrux + 5120,
+};
+
+static const struct itemplate * const itable_evex01270 = {
+    instrux + 6262,
+    instrux + 6263,
+    instrux + 6264,
+};
+
+static const struct itemplate * const itable_evex01278 = {
+    instrux + 4740,
+    instrux + 4741,
+};
+
+static const struct itemplate * const itable_evex01279 = {
+    instrux + 4708,
+    instrux + 4709,
+};
+
+static const struct itemplate * const itable_evex0127A = {
+    instrux + 4742,
+    instrux + 4743,
+    instrux + 4744,
+    instrux + 4748,
+    instrux + 4749,
+    instrux + 4750,
+};
+
+static const struct itemplate * const itable_evex0127B = {
+    instrux + 4756,
+    instrux + 4757,
+};
+
+static const struct itemplate * const itable_evex0127E = {
+    instrux + 5160,
+};
+
+static const struct itemplate * const itable_evex0127F = {
+    instrux + 5115,
+    instrux + 5116,
+    instrux + 5117,
+    instrux + 5121,
+    instrux + 5122,
+    instrux + 5123,
+};
+
+static const struct itemplate * const itable_evex012C2 = {
+    instrux + 4262,
+    instrux + 4270,
+    instrux + 4278,
+    instrux + 4286,
+    instrux + 4294,
+    instrux + 4302,
+    instrux + 4310,
+    instrux + 4318,
+    instrux + 4326,
+    instrux + 4334,
+    instrux + 4342,
+    instrux + 4350,
+    instrux + 4358,
+    instrux + 4366,
+    instrux + 4374,
+    instrux + 4382,
+    instrux + 4390,
+    instrux + 4398,
+    instrux + 4406,
+    instrux + 4414,
+    instrux + 4422,
+    instrux + 4430,
+    instrux + 4438,
+    instrux + 4446,
+    instrux + 4454,
+    instrux + 4462,
+    instrux + 4470,
+    instrux + 4478,
+    instrux + 4486,
+    instrux + 4494,
+    instrux + 4502,
+    instrux + 4510,
+    instrux + 4518,
+    instrux + 4526,
+    instrux + 4534,
+    instrux + 4542,
+    instrux + 4550,
+    instrux + 4558,
+    instrux + 4566,
+    instrux + 4574,
+    instrux + 4582,
+    instrux + 4590,
+    instrux + 4598,
+    instrux + 4606,
+    instrux + 4614,
+    instrux + 4622,
+    instrux + 4630,
+};
+
+static const struct itemplate * const itable_evex012E6 = {
+    instrux + 4645,
+    instrux + 4646,
+    instrux + 4647,
+    instrux + 4690,
+    instrux + 4691,
+    instrux + 4692,
+};
+
+static const struct itemplate * const itable_evex01310 = {
+    instrux + 5162,
+    instrux + 5164,
+    instrux + 5165,
+};
+
+static const struct itemplate * const itable_evex01311 = {
+    instrux + 5163,
+    instrux + 5166,
+    instrux + 5167,
+};
+
+static const struct itemplate * const itable_evex01312 = {
+    instrux + 5091,
+    instrux + 5092,
+    instrux + 5093,
+};
+
+static const struct itemplate * const itable_evex0132A = {
+    instrux + 4701,
+    instrux + 4702,
+};
+
+static const struct itemplate * const itable_evex0132C = {
+    instrux + 4734,
+    instrux + 4735,
+};
+
+static const struct itemplate * const itable_evex0132D = {
+    instrux + 4696,
+    instrux + 4697,
+};
+
+static const struct itemplate * const itable_evex01351 = {
+    instrux + 6718,
+    instrux + 6719,
+};
+
+static const struct itemplate * const itable_evex01358 = {
+    instrux + 4182,
+    instrux + 4183,
+};
+
+static const struct itemplate * const itable_evex01359 = {
+    instrux + 5210,
+    instrux + 5211,
+};
+
+static const struct itemplate * const itable_evex0135A = {
+    instrux + 4698,
+};
+
+static const struct itemplate * const itable_evex0135C = {
+    instrux + 6734,
+    instrux + 6735,
+};
+
+static const struct itemplate * const itable_evex0135D = {
+    instrux + 5067,
+    instrux + 5068,
+};
+
+static const struct itemplate * const itable_evex0135E = {
+    instrux + 4776,
+    instrux + 4777,
+};
+
+static const struct itemplate * const itable_evex0135F = {
+    instrux + 5051,
+    instrux + 5052,
+};
+
+static const struct itemplate * const itable_evex0136F = {
+    instrux + 5106,
+    instrux + 5107,
+    instrux + 5108,
+    instrux + 5124,
+    instrux + 5125,
+    instrux + 5126,
+};
+
+static const struct itemplate * const itable_evex01370 = {
+    instrux + 6265,
+    instrux + 6266,
+    instrux + 6267,
+};
+
+static const struct itemplate * const itable_evex01378 = {
+    instrux + 4736,
+    instrux + 4737,
+};
+
+static const struct itemplate * const itable_evex01379 = {
+    instrux + 4699,
+    instrux + 4700,
+};
+
+static const struct itemplate * const itable_evex0137A = {
+    instrux + 4745,
+    instrux + 4746,
+    instrux + 4747,
+    instrux + 4751,
+    instrux + 4752,
+    instrux + 4753,
+};
+
+static const struct itemplate * const itable_evex0137B = {
+    instrux + 4754,
+    instrux + 4755,
+};
+
+static const struct itemplate * const itable_evex0137F = {
+    instrux + 5109,
+    instrux + 5110,
+    instrux + 5111,
+    instrux + 5127,
+    instrux + 5128,
+    instrux + 5129,
+};
+
+static const struct itemplate * const itable_evex013C2 = {
+    instrux + 4261,
+    instrux + 4269,
+    instrux + 4277,
+    instrux + 4285,
+    instrux + 4293,
+    instrux + 4301,
+    instrux + 4309,
+    instrux + 4317,
+    instrux + 4325,
+    instrux + 4333,
+    instrux + 4341,
+    instrux + 4349,
+    instrux + 4357,
+    instrux + 4365,
+    instrux + 4373,
+    instrux + 4381,
+    instrux + 4389,
+    instrux + 4397,
+    instrux + 4405,
+    instrux + 4413,
+    instrux + 4421,
+    instrux + 4429,
+    instrux + 4437,
+    instrux + 4445,
+    instrux + 4453,
+    instrux + 4461,
+    instrux + 4469,
+    instrux + 4477,
+    instrux + 4485,
+    instrux + 4493,
+    instrux + 4501,
+    instrux + 4509,
+    instrux + 4517,
+    instrux + 4525,
+    instrux + 4533,
+    instrux + 4541,
+    instrux + 4549,
+    instrux + 4557,
+    instrux + 4565,
+    instrux + 4573,
+    instrux + 4581,
+    instrux + 4589,
+    instrux + 4597,
+    instrux + 4605,
+    instrux + 4613,
+    instrux + 4621,
+    instrux + 4629,
+};
+
+static const struct itemplate * const itable_evex013E6 = {
+    instrux + 4651,
+    instrux + 4652,
+    instrux + 4653,
+};
+
+static const struct itemplate * const itable_evex02100 = {
+    instrux + 6253,
+    instrux + 6254,
+    instrux + 6255,
+    instrux + 6256,
+    instrux + 6257,
+    instrux + 6258,
+};
+
+static const struct itemplate * const itable_evex02104 = {
+    instrux + 5845,
+    instrux + 5846,
+    instrux + 5847,
+    instrux + 5848,
+    instrux + 5849,
+    instrux + 5850,
+};
+
+static const struct itemplate * const itable_evex0210B = {
+    instrux + 6127,
+    instrux + 6128,
+    instrux + 6129,
+    instrux + 6130,
+    instrux + 6131,
+    instrux + 6132,
+};
+
+static const struct itemplate * const itable_evex0210C = {
+    instrux + 5737,
+    instrux + 5738,
+    instrux + 5739,
+    instrux + 5740,
+    instrux + 5741,
+    instrux + 5742,
+};
+
+static const struct itemplate * const itable_evex0210D = {
+    instrux + 5728,
+    instrux + 5729,
+    instrux + 5730,
+    instrux + 5731,
+    instrux + 5732,
+    instrux + 5733,
+};
+
+static const struct itemplate * const itable_evex02110 = {
+    instrux + 6424,
+    instrux + 6425,
+    instrux + 6426,
+    instrux + 6427,
+    instrux + 6428,
+    instrux + 6429,
+};
+
+static const struct itemplate * const itable_evex02111 = {
+    instrux + 6364,
+    instrux + 6365,
+    instrux + 6366,
+    instrux + 6367,
+    instrux + 6368,
+    instrux + 6369,
+};
+
+static const struct itemplate * const itable_evex02112 = {
+    instrux + 6310,
+    instrux + 6311,
+    instrux + 6312,
+    instrux + 6313,
+    instrux + 6314,
+    instrux + 6315,
+};
+
+static const struct itemplate * const itable_evex02113 = {
+    instrux + 4666,
+    instrux + 4667,
+    instrux + 4668,
+    instrux + 7060,
+    instrux + 7061,
+    instrux + 7062,
+};
+
+static const struct itemplate * const itable_evex02114 = {
+    instrux + 6223,
+    instrux + 6224,
+    instrux + 6225,
+    instrux + 6226,
+    instrux + 6227,
+    instrux + 6228,
+    instrux + 6229,
+    instrux + 6230,
+    instrux + 6231,
+    instrux + 6232,
+    instrux + 6233,
+    instrux + 6234,
+};
+
+static const struct itemplate * const itable_evex02115 = {
+    instrux + 6199,
+    instrux + 6200,
+    instrux + 6201,
+    instrux + 6202,
+    instrux + 6203,
+    instrux + 6204,
+    instrux + 6205,
+    instrux + 6206,
+    instrux + 6207,
+    instrux + 6208,
+    instrux + 6209,
+    instrux + 6210,
+};
+
+static const struct itemplate * const itable_evex02116 = {
+    instrux + 5745,
+    instrux + 5746,
+    instrux + 5747,
+    instrux + 5748,
+    instrux + 5749,
+    instrux + 5750,
+    instrux + 5751,
+    instrux + 5752,
+};
+
+static const struct itemplate * const itable_evex02118 = {
+    instrux + 4249,
+    instrux + 4250,
+    instrux + 4251,
+    instrux + 4252,
+    instrux + 4253,
+    instrux + 4254,
+};
+
+static const struct itemplate * const itable_evex02119 = {
+    instrux + 4228,
+    instrux + 4229,
+    instrux + 4245,
+    instrux + 4246,
+    instrux + 4247,
+    instrux + 4248,
+};
+
+static const struct itemplate * const itable_evex0211A = {
+    instrux + 4230,
+    instrux + 4231,
+    instrux + 4233,
+    instrux + 4234,
+};
+
+static const struct itemplate * const itable_evex0211B = {
+    instrux + 4232,
+    instrux + 4235,
+};
+
+static const struct itemplate * const itable_evex0211C = {
+    instrux + 5226,
+    instrux + 5227,
+    instrux + 5228,
+};
+
+static const struct itemplate * const itable_evex0211D = {
+    instrux + 5235,
+    instrux + 5236,
+    instrux + 5237,
+};
+
+static const struct itemplate * const itable_evex0211E = {
+    instrux + 5229,
+    instrux + 5230,
+    instrux + 5231,
+};
+
+static const struct itemplate * const itable_evex0211F = {
+    instrux + 5232,
+    instrux + 5233,
+    instrux + 5234,
+};
+
+static const struct itemplate * const itable_evex02120 = {
+    instrux + 6046,
+    instrux + 6047,
+    instrux + 6048,
+};
+
+static const struct itemplate * const itable_evex02121 = {
+    instrux + 6040,
+    instrux + 6041,
+    instrux + 6042,
+};
+
+static const struct itemplate * const itable_evex02122 = {
+    instrux + 6043,
+    instrux + 6044,
+    instrux + 6045,
+};
+
+static const struct itemplate * const itable_evex02123 = {
+    instrux + 6052,
+    instrux + 6053,
+    instrux + 6054,
+};
+
+static const struct itemplate * const itable_evex02124 = {
+    instrux + 6055,
+    instrux + 6056,
+    instrux + 6057,
+};
+
+static const struct itemplate * const itable_evex02125 = {
+    instrux + 6049,
+    instrux + 6050,
+    instrux + 6051,
+};
+
+static const struct itemplate * const itable_evex02126 = {
+    instrux + 6496,
+    instrux + 6497,
+    instrux + 6498,
+    instrux + 6505,
+    instrux + 6506,
+    instrux + 6507,
+};
+
+static const struct itemplate * const itable_evex02127 = {
+    instrux + 6499,
+    instrux + 6500,
+    instrux + 6501,
+    instrux + 6502,
+    instrux + 6503,
+    instrux + 6504,
+};
+
+static const struct itemplate * const itable_evex02128 = {
+    instrux + 6121,
+    instrux + 6122,
+    instrux + 6123,
+    instrux + 6124,
+    instrux + 6125,
+    instrux + 6126,
+};
+
+static const struct itemplate * const itable_evex02129 = {
+    instrux + 5421,
+    instrux + 5422,
+    instrux + 5423,
+};
+
+static const struct itemplate * const itable_evex0212A = {
+    instrux + 5149,
+    instrux + 5150,
+    instrux + 5151,
+};
+
+static const struct itemplate * const itable_evex0212B = {
+    instrux + 5250,
+    instrux + 5251,
+    instrux + 5252,
+    instrux + 5253,
+    instrux + 5254,
+    instrux + 5255,
+};
+
+static const struct itemplate * const itable_evex0212C = {
+    instrux + 6648,
+    instrux + 6649,
+    instrux + 6650,
+    instrux + 6651,
+    instrux + 6652,
+    instrux + 6653,
+    instrux + 6654,
+    instrux + 6655,
+    instrux + 6656,
+    instrux + 6657,
+    instrux + 6658,
+    instrux + 6659,
+};
+
+static const struct itemplate * const itable_evex0212D = {
+    instrux + 6660,
+    instrux + 6661,
+    instrux + 6662,
+    instrux + 6663,
+};
+
+static const struct itemplate * const itable_evex02130 = {
+    instrux + 6109,
+    instrux + 6110,
+    instrux + 6111,
+};
+
+static const struct itemplate * const itable_evex02131 = {
+    instrux + 6103,
+    instrux + 6104,
+    instrux + 6105,
+};
+
+static const struct itemplate * const itable_evex02132 = {
+    instrux + 6106,
+    instrux + 6107,
+    instrux + 6108,
+};
+
+static const struct itemplate * const itable_evex02133 = {
+    instrux + 6115,
+    instrux + 6116,
+    instrux + 6117,
+};
+
+static const struct itemplate * const itable_evex02134 = {
+    instrux + 6118,
+    instrux + 6119,
+    instrux + 6120,
+};
+
+static const struct itemplate * const itable_evex02135 = {
+    instrux + 6112,
+    instrux + 6113,
+    instrux + 6114,
+};
+
+static const struct itemplate * const itable_evex02136 = {
+    instrux + 5703,
+    instrux + 5704,
+    instrux + 5705,
+    instrux + 5706,
+    instrux + 5755,
+    instrux + 5756,
+    instrux + 5757,
+    instrux + 5758,
+};
+
+static const struct itemplate * const itable_evex02137 = {
+    instrux + 5433,
+    instrux + 5434,
+    instrux + 5435,
+};
+
+static const struct itemplate * const itable_evex02138 = {
+    instrux + 5905,
+    instrux + 5906,
+    instrux + 5907,
+    instrux + 5908,
+    instrux + 5909,
+    instrux + 5910,
+};
+
+static const struct itemplate * const itable_evex02139 = {
+    instrux + 5911,
+    instrux + 5912,
+    instrux + 5913,
+    instrux + 5914,
+    instrux + 5915,
+    instrux + 5916,
+    instrux + 5917,
+    instrux + 5918,
+    instrux + 5919,
+    instrux + 5920,
+    instrux + 5921,
+    instrux + 5922,
+};
+
+static const struct itemplate * const itable_evex0213A = {
+    instrux + 5947,
+    instrux + 5948,
+    instrux + 5949,
+    instrux + 5950,
+    instrux + 5951,
+    instrux + 5952,
+};
+
+static const struct itemplate * const itable_evex0213B = {
+    instrux + 5935,
+    instrux + 5936,
+    instrux + 5937,
+    instrux + 5938,
+    instrux + 5939,
+    instrux + 5940,
+    instrux + 5941,
+    instrux + 5942,
+    instrux + 5943,
+    instrux + 5944,
+    instrux + 5945,
+    instrux + 5946,
+};
+
+static const struct itemplate * const itable_evex0213C = {
+    instrux + 5857,
+    instrux + 5858,
+    instrux + 5859,
+    instrux + 5860,
+    instrux + 5861,
+    instrux + 5862,
+};
+
+static const struct itemplate * const itable_evex0213D = {
+    instrux + 5863,
+    instrux + 5864,
+    instrux + 5865,
+    instrux + 5866,
+    instrux + 5867,
+    instrux + 5868,
+    instrux + 5869,
+    instrux + 5870,
+    instrux + 5871,
+    instrux + 5872,
+    instrux + 5873,
+    instrux + 5874,
+};
+
+static const struct itemplate * const itable_evex0213E = {
+    instrux + 5899,
+    instrux + 5900,
+    instrux + 5901,
+    instrux + 5902,
+    instrux + 5903,
+    instrux + 5904,
+};
+
+static const struct itemplate * const itable_evex0213F = {
+    instrux + 5887,
+    instrux + 5888,
+    instrux + 5889,
+    instrux + 5890,
+    instrux + 5891,
+    instrux + 5892,
+    instrux + 5893,
+    instrux + 5894,
+    instrux + 5895,
+    instrux + 5896,
+    instrux + 5897,
+    instrux + 5898,
+};
+
+static const struct itemplate * const itable_evex02140 = {
+    instrux + 6145,
+    instrux + 6146,
+    instrux + 6147,
+    instrux + 6148,
+    instrux + 6149,
+    instrux + 6150,
+    instrux + 6151,
+    instrux + 6152,
+    instrux + 6153,
+    instrux + 6154,
+    instrux + 6155,
+    instrux + 6156,
+};
+
+static const struct itemplate * const itable_evex02142 = {
+    instrux + 4997,
+    instrux + 4998,
+    instrux + 4999,
+    instrux + 5000,
+    instrux + 5001,
+    instrux + 5002,
+};
+
+static const struct itemplate * const itable_evex02143 = {
+    instrux + 5003,
+    instrux + 5004,
+};
+
+static const struct itemplate * const itable_evex02144 = {
+    instrux + 5833,
+    instrux + 5834,
+    instrux + 5835,
+    instrux + 5836,
+    instrux + 5837,
+    instrux + 5838,
+};
+
+static const struct itemplate * const itable_evex02145 = {
+    instrux + 6412,
+    instrux + 6413,
+    instrux + 6414,
+    instrux + 6415,
+    instrux + 6416,
+    instrux + 6417,
+    instrux + 6418,
+    instrux + 6419,
+    instrux + 6420,
+    instrux + 6421,
+    instrux + 6422,
+    instrux + 6423,
+};
+
+static const struct itemplate * const itable_evex02146 = {
+    instrux + 6352,
+    instrux + 6353,
+    instrux + 6354,
+    instrux + 6355,
+    instrux + 6356,
+    instrux + 6357,
+    instrux + 6358,
+    instrux + 6359,
+    instrux + 6360,
+    instrux + 6361,
+    instrux + 6362,
+    instrux + 6363,
+};
+
+static const struct itemplate * const itable_evex02147 = {
+    instrux + 6298,
+    instrux + 6299,
+    instrux + 6300,
+    instrux + 6301,
+    instrux + 6302,
+    instrux + 6303,
+    instrux + 6304,
+    instrux + 6305,
+    instrux + 6306,
+    instrux + 6307,
+    instrux + 6308,
+    instrux + 6309,
+};
+
+static const struct itemplate * const itable_evex0214C = {
+    instrux + 6596,
+    instrux + 6597,
+    instrux + 6598,
+    instrux + 6599,
+    instrux + 6600,
+    instrux + 6601,
+};
+
+static const struct itemplate * const itable_evex0214D = {
+    instrux + 6602,
+    instrux + 6603,
+    instrux + 6604,
+    instrux + 6605,
+};
+
+static const struct itemplate * const itable_evex0214E = {
+    instrux + 6632,
+    instrux + 6633,
+    instrux + 6634,
+    instrux + 6635,
+    instrux + 6636,
+    instrux + 6637,
+};
+
+static const struct itemplate * const itable_evex0214F = {
+    instrux + 6638,
+    instrux + 6639,
+    instrux + 6640,
+    instrux + 6641,
+};
+
+static const struct itemplate * const itable_evex02150 = {
+    instrux + 6923,
+    instrux + 6924,
+    instrux + 6925,
+    instrux + 6926,
+    instrux + 6927,
+    instrux + 6928,
+};
+
+static const struct itemplate * const itable_evex02151 = {
+    instrux + 6929,
+    instrux + 6930,
+    instrux + 6931,
+    instrux + 6932,
+    instrux + 6933,
+    instrux + 6934,
+};
+
+static const struct itemplate * const itable_evex02152 = {
+    instrux + 6935,
+    instrux + 6936,
+    instrux + 6937,
+    instrux + 6938,
+    instrux + 6939,
+    instrux + 6940,
+};
+
+static const struct itemplate * const itable_evex02153 = {
+    instrux + 6941,
+    instrux + 6942,
+    instrux + 6943,
+    instrux + 6944,
+    instrux + 6945,
+    instrux + 6946,
+};
+
+static const struct itemplate * const itable_evex02154 = {
+    instrux + 6947,
+    instrux + 6948,
+    instrux + 6949,
+    instrux + 6950,
+    instrux + 6951,
+    instrux + 6952,
+};
+
+static const struct itemplate * const itable_evex02155 = {
+    instrux + 6953,
+    instrux + 6954,
+    instrux + 6955,
+    instrux + 6956,
+    instrux + 6957,
+    instrux + 6958,
+};
+
+static const struct itemplate * const itable_evex02158 = {
+    instrux + 5379,
+    instrux + 5380,
+    instrux + 5381,
+    instrux + 5382,
+    instrux + 5383,
+    instrux + 5384,
+};
+
+static const struct itemplate * const itable_evex02159 = {
+    instrux + 4236,
+    instrux + 4237,
+    instrux + 4238,
+    instrux + 5394,
+    instrux + 5395,
+    instrux + 5396,
+    instrux + 5397,
+    instrux + 5398,
+    instrux + 5399,
+};
+
+static const struct itemplate * const itable_evex0215A = {
+    instrux + 4239,
+    instrux + 4240,
+    instrux + 4242,
+    instrux + 4243,
+};
+
+static const struct itemplate * const itable_evex0215B = {
+    instrux + 4241,
+    instrux + 4244,
+};
+
+static const struct itemplate * const itable_evex02162 = {
+    instrux + 6845,
+    instrux + 6846,
+    instrux + 6847,
+    instrux + 6848,
+    instrux + 6849,
+    instrux + 6850,
+};
+
+static const struct itemplate * const itable_evex02163 = {
+    instrux + 6833,
+    instrux + 6834,
+    instrux + 6835,
+    instrux + 6836,
+    instrux + 6837,
+    instrux + 6838,
+    instrux + 6839,
+    instrux + 6840,
+    instrux + 6841,
+    instrux + 6842,
+    instrux + 6843,
+    instrux + 6844,
+};
+
+static const struct itemplate * const itable_evex02164 = {
+    instrux + 5355,
+    instrux + 5356,
+    instrux + 5357,
+    instrux + 5358,
+    instrux + 5359,
+    instrux + 5360,
+};
+
+static const struct itemplate * const itable_evex02165 = {
+    instrux + 4222,
+    instrux + 4223,
+    instrux + 4224,
+    instrux + 4225,
+    instrux + 4226,
+    instrux + 4227,
+};
+
+static const struct itemplate * const itable_evex02166 = {
+    instrux + 5352,
+    instrux + 5353,
+    instrux + 5354,
+    instrux + 5361,
+    instrux + 5362,
+    instrux + 5363,
+};
+
+static const struct itemplate * const itable_evex02170 = {
+    instrux + 6869,
+    instrux + 6870,
+    instrux + 6871,
+    instrux + 6872,
+    instrux + 6873,
+    instrux + 6874,
+};
+
+static const struct itemplate * const itable_evex02171 = {
+    instrux + 6875,
+    instrux + 6876,
+    instrux + 6877,
+    instrux + 6878,
+    instrux + 6879,
+    instrux + 6880,
+    instrux + 6881,
+    instrux + 6882,
+    instrux + 6883,
+    instrux + 6884,
+    instrux + 6885,
+    instrux + 6886,
+};
+
+static const struct itemplate * const itable_evex02172 = {
+    instrux + 6905,
+    instrux + 6906,
+    instrux + 6907,
+    instrux + 6908,
+    instrux + 6909,
+    instrux + 6910,
+};
+
+static const struct itemplate * const itable_evex02173 = {
+    instrux + 6911,
+    instrux + 6912,
+    instrux + 6913,
+    instrux + 6914,
+    instrux + 6915,
+    instrux + 6916,
+    instrux + 6917,
+    instrux + 6918,
+    instrux + 6919,
+    instrux + 6920,
+    instrux + 6921,
+    instrux + 6922,
+};
+
+static const struct itemplate * const itable_evex02175 = {
+    instrux + 5707,
+    instrux + 5708,
+    instrux + 5709,
+    instrux + 5722,
+    instrux + 5723,
+    instrux + 5724,
+};
+
+static const struct itemplate * const itable_evex02176 = {
+    instrux + 5710,
+    instrux + 5711,
+    instrux + 5712,
+    instrux + 5719,
+    instrux + 5720,
+    instrux + 5721,
+};
+
+static const struct itemplate * const itable_evex02177 = {
+    instrux + 5713,
+    instrux + 5714,
+    instrux + 5715,
+    instrux + 5716,
+    instrux + 5717,
+    instrux + 5718,
+};
+
+static const struct itemplate * const itable_evex02178 = {
+    instrux + 5364,
+    instrux + 5365,
+    instrux + 5366,
+};
+
+static const struct itemplate * const itable_evex02179 = {
+    instrux + 5403,
+    instrux + 5404,
+    instrux + 5405,
+};
+
+static const struct itemplate * const itable_evex0217A = {
+    instrux + 5367,
+    instrux + 5368,
+    instrux + 5369,
+    instrux + 5370,
+    instrux + 5371,
+    instrux + 5372,
+    instrux + 5373,
+    instrux + 5374,
+    instrux + 5375,
+    instrux + 5376,
+    instrux + 5377,
+    instrux + 5378,
+};
+
+static const struct itemplate * const itable_evex0217B = {
+    instrux + 5406,
+    instrux + 5407,
+    instrux + 5408,
+    instrux + 5409,
+    instrux + 5410,
+    instrux + 5411,
+    instrux + 5412,
+    instrux + 5413,
+    instrux + 5414,
+};
+
+static const struct itemplate * const itable_evex0217C = {
+    instrux + 5385,
+    instrux + 5386,
+    instrux + 5387,
+    instrux + 5400,
+    instrux + 5401,
+    instrux + 5402,
+};
+
+static const struct itemplate * const itable_evex0217D = {
+    instrux + 5759,
+    instrux + 5760,
+    instrux + 5761,
+    instrux + 5774,
+    instrux + 5775,
+    instrux + 5776,
+};
+
+static const struct itemplate * const itable_evex0217E = {
+    instrux + 5762,
+    instrux + 5763,
+    instrux + 5764,
+    instrux + 5771,
+    instrux + 5772,
+    instrux + 5773,
+};
+
+static const struct itemplate * const itable_evex0217F = {
+    instrux + 5765,
+    instrux + 5766,
+    instrux + 5767,
+    instrux + 5768,
+    instrux + 5769,
+    instrux + 5770,
+};
+
+static const struct itemplate * const itable_evex02183 = {
+    instrux + 6163,
+    instrux + 6164,
+    instrux + 6165,
+    instrux + 6166,
+    instrux + 6167,
+    instrux + 6168,
+};
+
+static const struct itemplate * const itable_evex02188 = {
+    instrux + 4782,
+    instrux + 4783,
+    instrux + 4784,
+    instrux + 4785,
+    instrux + 4786,
+    instrux + 4787,
+    instrux + 4788,
+    instrux + 4789,
+    instrux + 4790,
+    instrux + 4791,
+    instrux + 4792,
+    instrux + 4793,
+};
+
+static const struct itemplate * const itable_evex02189 = {
+    instrux + 5783,
+    instrux + 5784,
+    instrux + 5785,
+    instrux + 5786,
+    instrux + 5787,
+    instrux + 5788,
+    instrux + 5789,
+    instrux + 5790,
+    instrux + 5791,
+    instrux + 5792,
+    instrux + 5793,
+    instrux + 5794,
+};
+
+static const struct itemplate * const itable_evex0218A = {
+    instrux + 4633,
+    instrux + 4634,
+    instrux + 4635,
+    instrux + 4636,
+    instrux + 4637,
+    instrux + 4638,
+    instrux + 4639,
+    instrux + 4640,
+    instrux + 4641,
+    instrux + 4642,
+    instrux + 4643,
+    instrux + 4644,
+};
+
+static const struct itemplate * const itable_evex0218B = {
+    instrux + 5679,
+    instrux + 5680,
+    instrux + 5681,
+    instrux + 5682,
+    instrux + 5683,
+    instrux + 5684,
+    instrux + 5685,
+    instrux + 5686,
+    instrux + 5687,
+    instrux + 5688,
+    instrux + 5689,
+    instrux + 5690,
+};
+
+static const struct itemplate * const itable_evex0218D = {
+    instrux + 5697,
+    instrux + 5698,
+    instrux + 5699,
+    instrux + 5700,
+    instrux + 5701,
+    instrux + 5702,
+    instrux + 5777,
+    instrux + 5778,
+    instrux + 5779,
+    instrux + 5780,
+    instrux + 5781,
+    instrux + 5782,
+};
+
+static const struct itemplate * const itable_evex0218F = {
+    instrux + 6959,
+    instrux + 6960,
+    instrux + 6961,
+};
+
+static const struct itemplate * const itable_evex02190 = {
+    instrux + 5809,
+    instrux + 5810,
+    instrux + 5811,
+    instrux + 5812,
+    instrux + 5813,
+    instrux + 5814,
+};
+
+static const struct itemplate * const itable_evex02191 = {
+    instrux + 5815,
+    instrux + 5816,
+    instrux + 5817,
+    instrux + 5818,
+    instrux + 5819,
+    instrux + 5820,
+};
+
+static const struct itemplate * const itable_evex02192 = {
+    instrux + 4977,
+    instrux + 4978,
+    instrux + 4979,
+    instrux + 4980,
+    instrux + 4981,
+    instrux + 4982,
+};
+
+static const struct itemplate * const itable_evex02193 = {
+    instrux + 4991,
+    instrux + 4992,
+    instrux + 4993,
+    instrux + 4994,
+    instrux + 4995,
+    instrux + 4996,
+};
+
+static const struct itemplate * const itable_evex02196 = {
+    instrux + 4861,
+    instrux + 4862,
+    instrux + 4863,
+    instrux + 4864,
+    instrux + 4865,
+    instrux + 4866,
+};
+
+static const struct itemplate * const itable_evex02197 = {
+    instrux + 4903,
+    instrux + 4904,
+    instrux + 4905,
+    instrux + 4906,
+    instrux + 4907,
+    instrux + 4908,
+};
+
+static const struct itemplate * const itable_evex02198 = {
+    instrux + 4837,
+    instrux + 4838,
+    instrux + 4839,
+    instrux + 4840,
+    instrux + 4841,
+    instrux + 4842,
+};
+
+static const struct itemplate * const itable_evex02199 = {
+    instrux + 4843,
+    instrux + 4844,
+};
+
+static const struct itemplate * const itable_evex0219A = {
+    instrux + 4879,
+    instrux + 4880,
+    instrux + 4881,
+    instrux + 4882,
+    instrux + 4883,
+    instrux + 4884,
+};
+
+static const struct itemplate * const itable_evex0219B = {
+    instrux + 4885,
+    instrux + 4886,
+};
+
+static const struct itemplate * const itable_evex0219C = {
+    instrux + 4921,
+    instrux + 4922,
+    instrux + 4923,
+    instrux + 4924,
+    instrux + 4925,
+    instrux + 4926,
+};
+
+static const struct itemplate * const itable_evex0219D = {
+    instrux + 4927,
+    instrux + 4928,
+};
+
+static const struct itemplate * const itable_evex0219E = {
+    instrux + 4945,
+    instrux + 4946,
+    instrux + 4947,
+    instrux + 4948,
+    instrux + 4949,
+    instrux + 4950,
+};
+
+static const struct itemplate * const itable_evex0219F = {
+    instrux + 4951,
+    instrux + 4952,
+};
+
+static const struct itemplate * const itable_evex021A0 = {
+    instrux + 6241,
+    instrux + 6242,
+    instrux + 6243,
+    instrux + 6244,
+    instrux + 6245,
+    instrux + 6246,
+};
+
+static const struct itemplate * const itable_evex021A1 = {
+    instrux + 6247,
+    instrux + 6248,
+    instrux + 6249,
+    instrux + 6250,
+    instrux + 6251,
+    instrux + 6252,
+};
+
+static const struct itemplate * const itable_evex021A2 = {
+    instrux + 6664,
+    instrux + 6665,
+    instrux + 6666,
+    instrux + 6667,
+    instrux + 6668,
+    instrux + 6669,
+};
+
+static const struct itemplate * const itable_evex021A3 = {
+    instrux + 6678,
+    instrux + 6679,
+    instrux + 6680,
+    instrux + 6681,
+    instrux + 6682,
+    instrux + 6683,
+};
+
+static const struct itemplate * const itable_evex021A6 = {
+    instrux + 4867,
+    instrux + 4868,
+    instrux + 4869,
+    instrux + 4870,
+    instrux + 4871,
+    instrux + 4872,
+};
+
+static const struct itemplate * const itable_evex021A7 = {
+    instrux + 4909,
+    instrux + 4910,
+    instrux + 4911,
+    instrux + 4912,
+    instrux + 4913,
+    instrux + 4914,
+};
+
+static const struct itemplate * const itable_evex021A8 = {
+    instrux + 4845,
+    instrux + 4846,
+    instrux + 4847,
+    instrux + 4848,
+    instrux + 4849,
+    instrux + 4850,
+};
+
+static const struct itemplate * const itable_evex021A9 = {
+    instrux + 4851,
+    instrux + 4852,
+};
+
+static const struct itemplate * const itable_evex021AA = {
+    instrux + 4887,
+    instrux + 4888,
+    instrux + 4889,
+    instrux + 4890,
+    instrux + 4891,
+    instrux + 4892,
+};
+
+static const struct itemplate * const itable_evex021AB = {
+    instrux + 4893,
+    instrux + 4894,
+};
+
+static const struct itemplate * const itable_evex021AC = {
+    instrux + 4929,
+    instrux + 4930,
+    instrux + 4931,
+    instrux + 4932,
+    instrux + 4933,
+    instrux + 4934,
+};
+
+static const struct itemplate * const itable_evex021AD = {
+    instrux + 4935,
+    instrux + 4936,
+};
+
+static const struct itemplate * const itable_evex021AE = {
+    instrux + 4953,
+    instrux + 4954,
+    instrux + 4955,
+    instrux + 4956,
+    instrux + 4957,
+    instrux + 4958,
+};
+
+static const struct itemplate * const itable_evex021AF = {
+    instrux + 4959,
+    instrux + 4960,
+};
+
+static const struct itemplate * const itable_evex021B4 = {
+    instrux + 5842,
+    instrux + 5843,
+    instrux + 5844,
+};
+
+static const struct itemplate * const itable_evex021B5 = {
+    instrux + 5839,
+    instrux + 5840,
+    instrux + 5841,
+};
+
+static const struct itemplate * const itable_evex021B6 = {
+    instrux + 4873,
+    instrux + 4874,
+    instrux + 4875,
+    instrux + 4876,
+    instrux + 4877,
+    instrux + 4878,
+};
+
+static const struct itemplate * const itable_evex021B7 = {
+    instrux + 4915,
+    instrux + 4916,
+    instrux + 4917,
+    instrux + 4918,
+    instrux + 4919,
+    instrux + 4920,
+};
+
+static const struct itemplate * const itable_evex021B8 = {
+    instrux + 4853,
+    instrux + 4854,
+    instrux + 4855,
+    instrux + 4856,
+    instrux + 4857,
+    instrux + 4858,
+};
+
+static const struct itemplate * const itable_evex021B9 = {
+    instrux + 4859,
+    instrux + 4860,
+};
+
+static const struct itemplate * const itable_evex021BA = {
+    instrux + 4895,
+    instrux + 4896,
+    instrux + 4897,
+    instrux + 4898,
+    instrux + 4899,
+    instrux + 4900,
+};
+
+static const struct itemplate * const itable_evex021BB = {
+    instrux + 4901,
+    instrux + 4902,
+};
+
+static const struct itemplate * const itable_evex021BC = {
+    instrux + 4937,
+    instrux + 4938,
+    instrux + 4939,
+    instrux + 4940,
+    instrux + 4941,
+    instrux + 4942,
+};
+
+static const struct itemplate * const itable_evex021BD = {
+    instrux + 4943,
+    instrux + 4944,
+};
+
+static const struct itemplate * const itable_evex021BE = {
+    instrux + 4961,
+    instrux + 4962,
+    instrux + 4963,
+    instrux + 4964,
+    instrux + 4965,
+    instrux + 4966,
+};
+
+static const struct itemplate * const itable_evex021BF = {
+    instrux + 4967,
+    instrux + 4968,
+};
+
+static const struct itemplate * const itable_evex021C4 = {
+    instrux + 5691,
+    instrux + 5692,
+    instrux + 5693,
+    instrux + 5694,
+    instrux + 5695,
+    instrux + 5696,
+};
+
+static const struct itemplate * const itable_evex021C6 = {
+    instrux + 4983,
+    instrux + 4984,
+    instrux + 4987,
+    instrux + 4988,
+    instrux + 6670,
+    instrux + 6671,
+    instrux + 6674,
+    instrux + 6675,
+};
+
+static const struct itemplate * const itable_evex021C7 = {
+    instrux + 4985,
+    instrux + 4986,
+    instrux + 4989,
+    instrux + 4990,
+    instrux + 6672,
+    instrux + 6673,
+    instrux + 6676,
+    instrux + 6677,
+};
+
+static const struct itemplate * const itable_evex021C8 = {
+    instrux + 4780,
+    instrux + 4781,
+};
+
+static const struct itemplate * const itable_evex021CA = {
+    instrux + 6606,
+    instrux + 6607,
+};
+
+static const struct itemplate * const itable_evex021CB = {
+    instrux + 6608,
+    instrux + 6609,
+    instrux + 6610,
+    instrux + 6611,
+};
+
+static const struct itemplate * const itable_evex021CC = {
+    instrux + 6642,
+    instrux + 6643,
+};
+
+static const struct itemplate * const itable_evex021CD = {
+    instrux + 6644,
+    instrux + 6645,
+    instrux + 6646,
+    instrux + 6647,
+};
+
+static const struct itemplate * const itable_evex021CF = {
+    instrux + 6827,
+    instrux + 6828,
+    instrux + 6829,
+    instrux + 6830,
+    instrux + 6831,
+    instrux + 6832,
+};
+
+static const struct itemplate * const itable_evex021DC = {
+    instrux + 1897,
+    instrux + 1898,
+    instrux + 1899,
+    instrux + 1900,
+    instrux + 1913,
+    instrux + 1914,
+};
+
+static const struct itemplate * const itable_evex021DD = {
+    instrux + 1901,
+    instrux + 1902,
+    instrux + 1903,
+    instrux + 1904,
+    instrux + 1915,
+    instrux + 1916,
+};
+
+static const struct itemplate * const itable_evex021DE = {
+    instrux + 1905,
+    instrux + 1906,
+    instrux + 1907,
+    instrux + 1908,
+    instrux + 1917,
+    instrux + 1918,
+};
+
+static const struct itemplate * const itable_evex021DF = {
+    instrux + 1909,
+    instrux + 1910,
+    instrux + 1911,
+    instrux + 1912,
+    instrux + 1919,
+    instrux + 1920,
+};
+
+static const struct itemplate * const itable_evex02210 = {
+    instrux + 6088,
+    instrux + 6089,
+    instrux + 6090,
+    instrux + 6091,
+    instrux + 6092,
+    instrux + 6093,
+};
+
+static const struct itemplate * const itable_evex02211 = {
+    instrux + 6058,
+    instrux + 6059,
+    instrux + 6060,
+    instrux + 6061,
+    instrux + 6062,
+    instrux + 6063,
+};
+
+static const struct itemplate * const itable_evex02212 = {
+    instrux + 6070,
+    instrux + 6071,
+    instrux + 6072,
+    instrux + 6073,
+    instrux + 6074,
+    instrux + 6075,
+};
+
+static const struct itemplate * const itable_evex02213 = {
+    instrux + 6064,
+    instrux + 6065,
+    instrux + 6066,
+    instrux + 6067,
+    instrux + 6068,
+    instrux + 6069,
+};
+
+static const struct itemplate * const itable_evex02214 = {
+    instrux + 6082,
+    instrux + 6083,
+    instrux + 6084,
+    instrux + 6085,
+    instrux + 6086,
+    instrux + 6087,
+};
+
+static const struct itemplate * const itable_evex02215 = {
+    instrux + 6076,
+    instrux + 6077,
+    instrux + 6078,
+    instrux + 6079,
+    instrux + 6080,
+    instrux + 6081,
+};
+
+static const struct itemplate * const itable_evex02220 = {
+    instrux + 6034,
+    instrux + 6035,
+    instrux + 6036,
+    instrux + 6037,
+    instrux + 6038,
+    instrux + 6039,
+};
+
+static const struct itemplate * const itable_evex02221 = {
+    instrux + 6004,
+    instrux + 6005,
+    instrux + 6006,
+    instrux + 6007,
+    instrux + 6008,
+    instrux + 6009,
+};
+
+static const struct itemplate * const itable_evex02222 = {
+    instrux + 6016,
+    instrux + 6017,
+    instrux + 6018,
+    instrux + 6019,
+    instrux + 6020,
+    instrux + 6021,
+};
+
+static const struct itemplate * const itable_evex02223 = {
+    instrux + 6010,
+    instrux + 6011,
+    instrux + 6012,
+    instrux + 6013,
+    instrux + 6014,
+    instrux + 6015,
+};
+
+static const struct itemplate * const itable_evex02224 = {
+    instrux + 6028,
+    instrux + 6029,
+    instrux + 6030,
+    instrux + 6031,
+    instrux + 6032,
+    instrux + 6033,
+};
+
+static const struct itemplate * const itable_evex02225 = {
+    instrux + 6022,
+    instrux + 6023,
+    instrux + 6024,
+    instrux + 6025,
+    instrux + 6026,
+    instrux + 6027,
+};
+
+static const struct itemplate * const itable_evex02226 = {
+    instrux + 6508,
+    instrux + 6509,
+    instrux + 6510,
+    instrux + 6517,
+    instrux + 6518,
+    instrux + 6519,
+};
+
+static const struct itemplate * const itable_evex02227 = {
+    instrux + 6511,
+    instrux + 6512,
+    instrux + 6513,
+    instrux + 6514,
+    instrux + 6515,
+    instrux + 6516,
+};
+
+static const struct itemplate * const itable_evex02228 = {
+    instrux + 5971,
+    instrux + 5972,
+    instrux + 5973,
+    instrux + 5980,
+    instrux + 5981,
+    instrux + 5982,
+};
+
+static const struct itemplate * const itable_evex02229 = {
+    instrux + 5953,
+    instrux + 5954,
+    instrux + 5955,
+    instrux + 6094,
+    instrux + 6095,
+    instrux + 6096,
+};
+
+static const struct itemplate * const itable_evex0222A = {
+    instrux + 5388,
+    instrux + 5389,
+    instrux + 5390,
+};
+
+static const struct itemplate * const itable_evex02230 = {
+    instrux + 6097,
+    instrux + 6098,
+    instrux + 6099,
+    instrux + 6100,
+    instrux + 6101,
+    instrux + 6102,
+};
+
+static const struct itemplate * const itable_evex02231 = {
+    instrux + 5959,
+    instrux + 5960,
+    instrux + 5961,
+    instrux + 5962,
+    instrux + 5963,
+    instrux + 5964,
+};
+
+static const struct itemplate * const itable_evex02232 = {
+    instrux + 5986,
+    instrux + 5987,
+    instrux + 5988,
+    instrux + 5989,
+    instrux + 5990,
+    instrux + 5991,
+};
+
+static const struct itemplate * const itable_evex02233 = {
+    instrux + 5965,
+    instrux + 5966,
+    instrux + 5967,
+    instrux + 5968,
+    instrux + 5969,
+    instrux + 5970,
+};
+
+static const struct itemplate * const itable_evex02234 = {
+    instrux + 5998,
+    instrux + 5999,
+    instrux + 6000,
+    instrux + 6001,
+    instrux + 6002,
+    instrux + 6003,
+};
+
+static const struct itemplate * const itable_evex02235 = {
+    instrux + 5992,
+    instrux + 5993,
+    instrux + 5994,
+    instrux + 5995,
+    instrux + 5996,
+    instrux + 5997,
+};
+
+static const struct itemplate * const itable_evex02238 = {
+    instrux + 5974,
+    instrux + 5975,
+    instrux + 5976,
+    instrux + 5977,
+    instrux + 5978,
+    instrux + 5979,
+};
+
+static const struct itemplate * const itable_evex02239 = {
+    instrux + 5956,
+    instrux + 5957,
+    instrux + 5958,
+    instrux + 5983,
+    instrux + 5984,
+    instrux + 5985,
+};
+
+static const struct itemplate * const itable_evex0223A = {
+    instrux + 5391,
+    instrux + 5392,
+    instrux + 5393,
+};
+
+static const struct itemplate * const itable_evex02252 = {
+    instrux + 7008,
+    instrux + 7009,
+    instrux + 7010,
+    instrux + 7011,
+    instrux + 7012,
+    instrux + 7013,
+};
+
+static const struct itemplate * const itable_evex02272 = {
+    instrux + 7002,
+    instrux + 7003,
+    instrux + 7004,
+    instrux + 7005,
+    instrux + 7006,
+    instrux + 7007,
+};
+
+static const struct itemplate * const itable_evex02352 = {
+    instrux + 6967,
+};
+
+static const struct itemplate * const itable_evex02353 = {
+    instrux + 6966,
+};
+
+static const struct itemplate * const itable_evex02368 = {
+    instrux + 7014,
+    instrux + 7015,
+    instrux + 7016,
+};
+
+static const struct itemplate * const itable_evex02372 = {
+    instrux + 6996,
+    instrux + 6997,
+    instrux + 6998,
+    instrux + 6999,
+    instrux + 7000,
+    instrux + 7001,
+};
+
+static const struct itemplate * const itable_evex0239A = {
+    instrux + 6962,
+};
+
+static const struct itemplate * const itable_evex0239B = {
+    instrux + 6964,
+};
+
+static const struct itemplate * const itable_evex023AA = {
+    instrux + 6963,
+};
+
+static const struct itemplate * const itable_evex023AB = {
+    instrux + 6965,
+};
+
+static const struct itemplate * const itable_evex03008 = {
+    instrux + 7368,
+    instrux + 7369,
+    instrux + 7370,
+};
+
+static const struct itemplate * const itable_evex0300A = {
+    instrux + 7371,
+    instrux + 7372,
+};
+
+static const struct itemplate * const itable_evex03025 = {
+    instrux + 7327,
+    instrux + 7328,
+    instrux + 7329,
+};
+
+static const struct itemplate * const itable_evex03027 = {
+    instrux + 7330,
+};
+
+static const struct itemplate * const itable_evex03056 = {
+    instrux + 7363,
+    instrux + 7364,
+    instrux + 7365,
+};
+
+static const struct itemplate * const itable_evex03057 = {
+    instrux + 7366,
+    instrux + 7367,
+};
+
+static const struct itemplate * const itable_evex03066 = {
+    instrux + 7319,
+    instrux + 7320,
+    instrux + 7321,
+};
+
+static const struct itemplate * const itable_evex03067 = {
+    instrux + 7322,
+};
+
+static const struct itemplate * const itable_evex030C2 = {
+    instrux + 7037,
+    instrux + 7038,
+    instrux + 7039,
+    instrux + 7040,
+    instrux + 7041,
+    instrux + 7042,
+};
+
+static const struct itemplate * const itable_evex03100 = {
+    instrux + 5753,
+    instrux + 5754,
+};
+
+static const struct itemplate * const itable_evex03101 = {
+    instrux + 5743,
+    instrux + 5744,
+};
+
+static const struct itemplate * const itable_evex03103 = {
+    instrux + 4186,
+    instrux + 4187,
+    instrux + 4188,
+    instrux + 4189,
+    instrux + 4190,
+    instrux + 4191,
+    instrux + 4192,
+    instrux + 4193,
+    instrux + 4194,
+    instrux + 4195,
+    instrux + 4196,
+    instrux + 4197,
+};
+
+static const struct itemplate * const itable_evex03104 = {
+    instrux + 5734,
+    instrux + 5735,
+    instrux + 5736,
+};
+
+static const struct itemplate * const itable_evex03105 = {
+    instrux + 5725,
+    instrux + 5726,
+    instrux + 5727,
+};
+
+static const struct itemplate * const itable_evex03108 = {
+    instrux + 6625,
+    instrux + 6626,
+    instrux + 6627,
+};
+
+static const struct itemplate * const itable_evex03109 = {
+    instrux + 6622,
+    instrux + 6623,
+    instrux + 6624,
+};
+
+static const struct itemplate * const itable_evex0310A = {
+    instrux + 6630,
+    instrux + 6631,
+};
+
+static const struct itemplate * const itable_evex0310B = {
+    instrux + 6628,
+    instrux + 6629,
+};
+
+static const struct itemplate * const itable_evex0310F = {
+    instrux + 5310,
+    instrux + 5311,
+    instrux + 5312,
+    instrux + 5313,
+    instrux + 5314,
+    instrux + 5315,
+};
+
+static const struct itemplate * const itable_evex03114 = {
+    instrux + 5795,
+    instrux + 5796,
+    instrux + 5797,
+    instrux + 5798,
+    instrux + 5799,
+};
+
+static const struct itemplate * const itable_evex03115 = {
+    instrux + 5802,
+    instrux + 5803,
+    instrux + 5804,
+    instrux + 5805,
+};
+
+static const struct itemplate * const itable_evex03116 = {
+    instrux + 5800,
+    instrux + 5801,
+};
+
+static const struct itemplate * const itable_evex03117 = {
+    instrux + 4818,
+    instrux + 4819,
+    instrux + 4820,
+};
+
+static const struct itemplate * const itable_evex03118 = {
+    instrux + 5013,
+    instrux + 5014,
+    instrux + 5015,
+    instrux + 5016,
+    instrux + 5019,
+    instrux + 5020,
+    instrux + 5021,
+    instrux + 5022,
+};
+
+static const struct itemplate * const itable_evex03119 = {
+    instrux + 4794,
+    instrux + 4795,
+    instrux + 4796,
+    instrux + 4797,
+    instrux + 4800,
+    instrux + 4801,
+    instrux + 4802,
+    instrux + 4803,
+};
+
+static const struct itemplate * const itable_evex0311A = {
+    instrux + 5017,
+    instrux + 5018,
+    instrux + 5023,
+    instrux + 5024,
+};
+
+static const struct itemplate * const itable_evex0311B = {
+    instrux + 4798,
+    instrux + 4799,
+    instrux + 4804,
+    instrux + 4805,
+};
+
+static const struct itemplate * const itable_evex0311D = {
+    instrux + 4675,
+    instrux + 4676,
+    instrux + 4677,
+    instrux + 4678,
+    instrux + 4679,
+    instrux + 4680,
+    instrux + 7083,
+    instrux + 7084,
+    instrux + 7085,
+    instrux + 7086,
+    instrux + 7087,
+    instrux + 7088,
+};
+
+static const struct itemplate * const itable_evex0311E = {
+    instrux + 5451,
+    instrux + 5452,
+    instrux + 5453,
+    instrux + 5454,
+    instrux + 5455,
+    instrux + 5456,
+    instrux + 5475,
+    instrux + 5476,
+    instrux + 5477,
+    instrux + 5478,
+    instrux + 5479,
+    instrux + 5480,
+    instrux + 5499,
+    instrux + 5500,
+    instrux + 5501,
+    instrux + 5502,
+    instrux + 5503,
+    instrux + 5504,
+    instrux + 5523,
+    instrux + 5524,
+    instrux + 5525,
+    instrux + 5526,
+    instrux + 5527,
+    instrux + 5528,
+    instrux + 5547,
+    instrux + 5548,
+    instrux + 5549,
+    instrux + 5550,
+    instrux + 5551,
+    instrux + 5552,
+    instrux + 5571,
+    instrux + 5572,
+    instrux + 5573,
+    instrux + 5574,
+    instrux + 5575,
+    instrux + 5576,
+    instrux + 5595,
+    instrux + 5596,
+    instrux + 5597,
+    instrux + 5598,
+    instrux + 5599,
+    instrux + 5600,
+    instrux + 5619,
+    instrux + 5620,
+    instrux + 5621,
+    instrux + 5622,
+    instrux + 5623,
+    instrux + 5624,
+    instrux + 5643,
+    instrux + 5644,
+    instrux + 5645,
+    instrux + 5646,
+    instrux + 5647,
+    instrux + 5648,
+    instrux + 5667,
+    instrux + 5668,
+    instrux + 5669,
+    instrux + 5670,
+    instrux + 5671,
+    instrux + 5672,
+};
+
+static const struct itemplate * const itable_evex0311F = {
+    instrux + 5442,
+    instrux + 5443,
+    instrux + 5444,
+    instrux + 5445,
+    instrux + 5446,
+    instrux + 5447,
+    instrux + 5466,
+    instrux + 5467,
+    instrux + 5468,
+    instrux + 5469,
+    instrux + 5470,
+    instrux + 5471,
+    instrux + 5490,
+    instrux + 5491,
+    instrux + 5492,
+    instrux + 5493,
+    instrux + 5494,
+    instrux + 5495,
+    instrux + 5514,
+    instrux + 5515,
+    instrux + 5516,
+    instrux + 5517,
+    instrux + 5518,
+    instrux + 5519,
+    instrux + 5538,
+    instrux + 5539,
+    instrux + 5540,
+    instrux + 5541,
+    instrux + 5542,
+    instrux + 5543,
+    instrux + 5562,
+    instrux + 5563,
+    instrux + 5564,
+    instrux + 5565,
+    instrux + 5566,
+    instrux + 5567,
+    instrux + 5586,
+    instrux + 5587,
+    instrux + 5588,
+    instrux + 5589,
+    instrux + 5590,
+    instrux + 5591,
+    instrux + 5610,
+    instrux + 5611,
+    instrux + 5612,
+    instrux + 5613,
+    instrux + 5614,
+    instrux + 5615,
+    instrux + 5634,
+    instrux + 5635,
+    instrux + 5636,
+    instrux + 5637,
+    instrux + 5638,
+    instrux + 5639,
+    instrux + 5658,
+    instrux + 5659,
+    instrux + 5660,
+    instrux + 5661,
+    instrux + 5662,
+    instrux + 5663,
+};
+
+static const struct itemplate * const itable_evex03120 = {
+    instrux + 5821,
+    instrux + 5822,
+    instrux + 5823,
+    instrux + 5824,
+};
+
+static const struct itemplate * const itable_evex03121 = {
+    instrux + 5037,
+    instrux + 5038,
+};
+
+static const struct itemplate * const itable_evex03122 = {
+    instrux + 5825,
+    instrux + 5826,
+    instrux + 5827,
+    instrux + 5828,
+};
+
+static const struct itemplate * const itable_evex03123 = {
+    instrux + 6684,
+    instrux + 6685,
+    instrux + 6686,
+    instrux + 6687,
+    instrux + 6688,
+    instrux + 6689,
+    instrux + 6690,
+    instrux + 6691,
+};
+
+static const struct itemplate * const itable_evex03125 = {
+    instrux + 6490,
+    instrux + 6491,
+    instrux + 6492,
+    instrux + 6493,
+    instrux + 6494,
+    instrux + 6495,
+};
+
+static const struct itemplate * const itable_evex03126 = {
+    instrux + 5005,
+    instrux + 5006,
+    instrux + 5007,
+    instrux + 5008,
+    instrux + 5009,
+    instrux + 5010,
+};
+
+static const struct itemplate * const itable_evex03127 = {
+    instrux + 5011,
+    instrux + 5012,
+};
+
+static const struct itemplate * const itable_evex03138 = {
+    instrux + 5025,
+    instrux + 5026,
+    instrux + 5027,
+    instrux + 5028,
+    instrux + 5031,
+    instrux + 5032,
+    instrux + 5033,
+    instrux + 5034,
+};
+
+static const struct itemplate * const itable_evex03139 = {
+    instrux + 4806,
+    instrux + 4807,
+    instrux + 4808,
+    instrux + 4809,
+    instrux + 4812,
+    instrux + 4813,
+    instrux + 4814,
+    instrux + 4815,
+};
+
+static const struct itemplate * const itable_evex0313A = {
+    instrux + 5029,
+    instrux + 5030,
+    instrux + 5035,
+    instrux + 5036,
+};
+
+static const struct itemplate * const itable_evex0313B = {
+    instrux + 4810,
+    instrux + 4811,
+    instrux + 4816,
+    instrux + 4817,
+};
+
+static const struct itemplate * const itable_evex0313E = {
+    instrux + 5448,
+    instrux + 5449,
+    instrux + 5450,
+    instrux + 5457,
+    instrux + 5458,
+    instrux + 5459,
+    instrux + 5472,
+    instrux + 5473,
+    instrux + 5474,
+    instrux + 5481,
+    instrux + 5482,
+    instrux + 5483,
+    instrux + 5496,
+    instrux + 5497,
+    instrux + 5498,
+    instrux + 5505,
+    instrux + 5506,
+    instrux + 5507,
+    instrux + 5520,
+    instrux + 5521,
+    instrux + 5522,
+    instrux + 5529,
+    instrux + 5530,
+    instrux + 5531,
+    instrux + 5544,
+    instrux + 5545,
+    instrux + 5546,
+    instrux + 5553,
+    instrux + 5554,
+    instrux + 5555,
+    instrux + 5568,
+    instrux + 5569,
+    instrux + 5570,
+    instrux + 5577,
+    instrux + 5578,
+    instrux + 5579,
+    instrux + 5592,
+    instrux + 5593,
+    instrux + 5594,
+    instrux + 5601,
+    instrux + 5602,
+    instrux + 5603,
+    instrux + 5616,
+    instrux + 5617,
+    instrux + 5618,
+    instrux + 5625,
+    instrux + 5626,
+    instrux + 5627,
+    instrux + 5640,
+    instrux + 5641,
+    instrux + 5642,
+    instrux + 5649,
+    instrux + 5650,
+    instrux + 5651,
+    instrux + 5664,
+    instrux + 5665,
+    instrux + 5666,
+    instrux + 5673,
+    instrux + 5674,
+    instrux + 5675,
+};
+
+static const struct itemplate * const itable_evex0313F = {
+    instrux + 5439,
+    instrux + 5440,
+    instrux + 5441,
+    instrux + 5460,
+    instrux + 5461,
+    instrux + 5462,
+    instrux + 5463,
+    instrux + 5464,
+    instrux + 5465,
+    instrux + 5484,
+    instrux + 5485,
+    instrux + 5486,
+    instrux + 5487,
+    instrux + 5488,
+    instrux + 5489,
+    instrux + 5508,
+    instrux + 5509,
+    instrux + 5510,
+    instrux + 5511,
+    instrux + 5512,
+    instrux + 5513,
+    instrux + 5532,
+    instrux + 5533,
+    instrux + 5534,
+    instrux + 5535,
+    instrux + 5536,
+    instrux + 5537,
+    instrux + 5556,
+    instrux + 5557,
+    instrux + 5558,
+    instrux + 5559,
+    instrux + 5560,
+    instrux + 5561,
+    instrux + 5580,
+    instrux + 5581,
+    instrux + 5582,
+    instrux + 5583,
+    instrux + 5584,
+    instrux + 5585,
+    instrux + 5604,
+    instrux + 5605,
+    instrux + 5606,
+    instrux + 5607,
+    instrux + 5608,
+    instrux + 5609,
+    instrux + 5628,
+    instrux + 5629,
+    instrux + 5630,
+    instrux + 5631,
+    instrux + 5632,
+    instrux + 5633,
+    instrux + 5652,
+    instrux + 5653,
+    instrux + 5654,
+    instrux + 5655,
+    instrux + 5656,
+    instrux + 5657,
+    instrux + 5676,
+    instrux + 5677,
+    instrux + 5678,
+};
+
+static const struct itemplate * const itable_evex03142 = {
+    instrux + 4758,
+    instrux + 4759,
+    instrux + 4760,
+    instrux + 4761,
+    instrux + 4762,
+    instrux + 4763,
+};
+
+static const struct itemplate * const itable_evex03143 = {
+    instrux + 6692,
+    instrux + 6693,
+    instrux + 6694,
+    instrux + 6695,
+    instrux + 6696,
+    instrux + 6697,
+    instrux + 6698,
+    instrux + 6699,
+};
+
+static const struct itemplate * const itable_evex03144 = {
+    instrux + 3132,
+    instrux + 3133,
+    instrux + 3134,
+    instrux + 3135,
+    instrux + 3136,
+    instrux + 3137,
+    instrux + 3138,
+    instrux + 3139,
+    instrux + 3140,
+    instrux + 3141,
+    instrux + 3142,
+    instrux + 3143,
+    instrux + 3144,
+    instrux + 3145,
+    instrux + 3146,
+    instrux + 3147,
+    instrux + 3148,
+    instrux + 3149,
+    instrux + 3150,
+    instrux + 3151,
+    instrux + 3152,
+    instrux + 3153,
+    instrux + 3154,
+    instrux + 3155,
+    instrux + 3156,
+    instrux + 3157,
+    instrux + 3158,
+    instrux + 3159,
+    instrux + 3160,
+    instrux + 3161,
+};
+
+static const struct itemplate * const itable_evex03150 = {
+    instrux + 6580,
+    instrux + 6581,
+    instrux + 6582,
+    instrux + 6583,
+    instrux + 6584,
+    instrux + 6585,
+    instrux + 6586,
+    instrux + 6587,
+    instrux + 6588,
+    instrux + 6589,
+    instrux + 6590,
+    instrux + 6591,
+};
+
+static const struct itemplate * const itable_evex03151 = {
+    instrux + 6592,
+    instrux + 6593,
+    instrux + 6594,
+    instrux + 6595,
+};
+
+static const struct itemplate * const itable_evex03154 = {
+    instrux + 4821,
+    instrux + 4822,
+    instrux + 4823,
+    instrux + 4824,
+    instrux + 4825,
+    instrux + 4826,
+    instrux + 4827,
+    instrux + 4828,
+    instrux + 4829,
+    instrux + 4830,
+    instrux + 4831,
+    instrux + 4832,
+};
+
+static const struct itemplate * const itable_evex03155 = {
+    instrux + 4833,
+    instrux + 4834,
+    instrux + 4835,
+    instrux + 4836,
+};
+
+static const struct itemplate * const itable_evex03156 = {
+    instrux + 6612,
+    instrux + 6613,
+    instrux + 6614,
+    instrux + 6615,
+    instrux + 6616,
+    instrux + 6617,
+};
+
+static const struct itemplate * const itable_evex03157 = {
+    instrux + 6618,
+    instrux + 6619,
+    instrux + 6620,
+    instrux + 6621,
+};
+
+static const struct itemplate * const itable_evex03166 = {
+    instrux + 4969,
+    instrux + 4970,
+    instrux + 4971,
+    instrux + 4972,
+    instrux + 4973,
+    instrux + 4974,
+};
+
+static const struct itemplate * const itable_evex03167 = {
+    instrux + 4975,
+    instrux + 4976,
+};
+
+static const struct itemplate * const itable_evex03170 = {
+    instrux + 6851,
+    instrux + 6852,
+    instrux + 6853,
+    instrux + 6854,
+    instrux + 6855,
+    instrux + 6856,
+};
+
+static const struct itemplate * const itable_evex03171 = {
+    instrux + 6857,
+    instrux + 6858,
+    instrux + 6859,
+    instrux + 6860,
+    instrux + 6861,
+    instrux + 6862,
+    instrux + 6863,
+    instrux + 6864,
+    instrux + 6865,
+    instrux + 6866,
+    instrux + 6867,
+    instrux + 6868,
+};
+
+static const struct itemplate * const itable_evex03172 = {
+    instrux + 6887,
+    instrux + 6888,
+    instrux + 6889,
+    instrux + 6890,
+    instrux + 6891,
+    instrux + 6892,
+};
+
+static const struct itemplate * const itable_evex03173 = {
+    instrux + 6893,
+    instrux + 6894,
+    instrux + 6895,
+    instrux + 6896,
+    instrux + 6897,
+    instrux + 6898,
+    instrux + 6899,
+    instrux + 6900,
+    instrux + 6901,
+    instrux + 6902,
+    instrux + 6903,
+    instrux + 6904,
+};
+
+static const struct itemplate * const itable_evex031CE = {
+    instrux + 6816,
+    instrux + 6817,
+    instrux + 6818,
+    instrux + 6819,
+    instrux + 6820,
+    instrux + 6821,
+};
+
+static const struct itemplate * const itable_evex031CF = {
+    instrux + 6805,
+    instrux + 6806,
+    instrux + 6807,
+    instrux + 6808,
+    instrux + 6809,
+    instrux + 6810,
+};
+
+static const struct itemplate * const itable_evex032C2 = {
+    instrux + 7043,
+    instrux + 7044,
+};
+
+static const struct itemplate * const itable_evex0501D = {
+    instrux + 7109,
+    instrux + 7110,
+};
+
+static const struct itemplate * const itable_evex0502E = {
+    instrux + 7399,
+};
+
+static const struct itemplate * const itable_evex0502F = {
+    instrux + 7045,
+};
+
+static const struct itemplate * const itable_evex05051 = {
+    instrux + 7386,
+    instrux + 7387,
+    instrux + 7388,
+};
+
+static const struct itemplate * const itable_evex05058 = {
+    instrux + 7029,
+    instrux + 7030,
+    instrux + 7031,
+    instrux + 7032,
+    instrux + 7033,
+    instrux + 7034,
+};
+
+static const struct itemplate * const itable_evex05059 = {
+    instrux + 7347,
+    instrux + 7348,
+    instrux + 7349,
+    instrux + 7350,
+    instrux + 7351,
+    instrux + 7352,
+};
+
+static const struct itemplate * const itable_evex0505A = {
+    instrux + 7055,
+    instrux + 7056,
+    instrux + 7057,
+};
+
+static const struct itemplate * const itable_evex0505B = {
+    instrux + 7046,
+    instrux + 7047,
+    instrux + 7048,
+    instrux + 7092,
+    instrux + 7093,
+    instrux + 7094,
+};
+
+static const struct itemplate * const itable_evex0505C = {
+    instrux + 7391,
+    instrux + 7392,
+    instrux + 7393,
+    instrux + 7394,
+    instrux + 7395,
+    instrux + 7396,
+};
+
+static const struct itemplate * const itable_evex0505D = {
+    instrux + 7335,
+    instrux + 7336,
+    instrux + 7337,
+};
+
+static const struct itemplate * const itable_evex0505E = {
+    instrux + 7147,
+    instrux + 7148,
+    instrux + 7149,
+    instrux + 7150,
+    instrux + 7151,
+    instrux + 7152,
+};
+
+static const struct itemplate * const itable_evex0505F = {
+    instrux + 7331,
+    instrux + 7332,
+    instrux + 7333,
+};
+
+static const struct itemplate * const itable_evex05078 = {
+    instrux + 7117,
+    instrux + 7118,
+    instrux + 7119,
+};
+
+static const struct itemplate * const itable_evex05079 = {
+    instrux + 7069,
+    instrux + 7070,
+    instrux + 7071,
+};
+
+static const struct itemplate * const itable_evex0507C = {
+    instrux + 7123,
+    instrux + 7124,
+    instrux + 7125,
+};
+
+static const struct itemplate * const itable_evex0507D = {
+    instrux + 7075,
+    instrux + 7076,
+    instrux + 7077,
+};
+
+static const struct itemplate * const itable_evex0511D = {
+    instrux + 7089,
+    instrux + 7090,
+    instrux + 7091,
+};
+
+static const struct itemplate * const itable_evex0515A = {
+    instrux + 7049,
+    instrux + 7050,
+    instrux + 7051,
+};
+
+static const struct itemplate * const itable_evex0515B = {
+    instrux + 7052,
+    instrux + 7053,
+    instrux + 7054,
+};
+
+static const struct itemplate * const itable_evex0516E = {
+    instrux + 7345,
+};
+
+static const struct itemplate * const itable_evex05178 = {
+    instrux + 7120,
+    instrux + 7121,
+    instrux + 7122,
+};
+
+static const struct itemplate * const itable_evex05179 = {
+    instrux + 7072,
+    instrux + 7073,
+    instrux + 7074,
+};
+
+static const struct itemplate * const itable_evex0517A = {
+    instrux + 7114,
+    instrux + 7115,
+    instrux + 7116,
+};
+
+static const struct itemplate * const itable_evex0517B = {
+    instrux + 7066,
+    instrux + 7067,
+    instrux + 7068,
+};
+
+static const struct itemplate * const itable_evex0517C = {
+    instrux + 7126,
+    instrux + 7127,
+    instrux + 7128,
+};
+
+static const struct itemplate * const itable_evex0517D = {
+    instrux + 7078,
+    instrux + 7079,
+    instrux + 7080,
+};
+
+static const struct itemplate * const itable_evex0517E = {
+    instrux + 7346,
+};
+
+static const struct itemplate * const itable_evex05210 = {
+    instrux + 7339,
+    instrux + 7341,
+    instrux + 7342,
+};
+
+static const struct itemplate * const itable_evex05211 = {
+    instrux + 7340,
+    instrux + 7343,
+    instrux + 7344,
+};
+
+static const struct itemplate * const itable_evex0522A = {
+    instrux + 7105,
+    instrux + 7106,
+    instrux + 7107,
+    instrux + 7108,
+};
+
+static const struct itemplate * const itable_evex0522C = {
+    instrux + 7129,
+    instrux + 7130,
+};
+
+static const struct itemplate * const itable_evex0522D = {
+    instrux + 7099,
+    instrux + 7100,
+};
+
+static const struct itemplate * const itable_evex05251 = {
+    instrux + 7389,
+    instrux + 7390,
+};
+
+static const struct itemplate * const itable_evex05258 = {
+    instrux + 7035,
+    instrux + 7036,
+};
+
+static const struct itemplate * const itable_evex05259 = {
+    instrux + 7353,
+    instrux + 7354,
+};
+
+static const struct itemplate * const itable_evex0525A = {
+    instrux + 7097,
+    instrux + 7098,
+};
+
+static const struct itemplate * const itable_evex0525B = {
+    instrux + 7111,
+    instrux + 7112,
+    instrux + 7113,
+};
+
+static const struct itemplate * const itable_evex0525C = {
+    instrux + 7397,
+    instrux + 7398,
+};
+
+static const struct itemplate * const itable_evex0525D = {
+    instrux + 7338,
+};
+
+static const struct itemplate * const itable_evex0525E = {
+    instrux + 7153,
+    instrux + 7154,
+};
+
+static const struct itemplate * const itable_evex0525F = {
+    instrux + 7334,
+};
+
+static const struct itemplate * const itable_evex05278 = {
+    instrux + 7131,
+    instrux + 7132,
+};
+
+static const struct itemplate * const itable_evex05279 = {
+    instrux + 7103,
+    instrux + 7104,
+};
+
+static const struct itemplate * const itable_evex0527B = {
+    instrux + 7139,
+    instrux + 7140,
+};
+
+static const struct itemplate * const itable_evex0527D = {
+    instrux + 7144,
+    instrux + 7145,
+    instrux + 7146,
+};
+
+static const struct itemplate * const itable_evex0535A = {
+    instrux + 7095,
+    instrux + 7096,
+};
+
+static const struct itemplate * const itable_evex0537A = {
+    instrux + 7133,
+    instrux + 7134,
+    instrux + 7135,
+    instrux + 7136,
+    instrux + 7137,
+    instrux + 7138,
+};
+
+static const struct itemplate * const itable_evex0537D = {
+    instrux + 7141,
+    instrux + 7142,
+    instrux + 7143,
+};
+
+static const struct itemplate * const itable_evex06013 = {
+    instrux + 7101,
+    instrux + 7102,
+};
+
+static const struct itemplate * const itable_evex06113 = {
+    instrux + 7063,
+    instrux + 7064,
+    instrux + 7065,
+};
+
+static const struct itemplate * const itable_evex0612C = {
+    instrux + 7378,
+    instrux + 7379,
+    instrux + 7380,
+    instrux + 7381,
+    instrux + 7382,
+    instrux + 7383,
+};
+
+static const struct itemplate * const itable_evex0612D = {
+    instrux + 7384,
+    instrux + 7385,
+};
+
+static const struct itemplate * const itable_evex06142 = {
+    instrux + 7323,
+    instrux + 7324,
+    instrux + 7325,
+};
+
+static const struct itemplate * const itable_evex06143 = {
+    instrux + 7326,
+};
+
+static const struct itemplate * const itable_evex0614C = {
+    instrux + 7355,
+    instrux + 7356,
+    instrux + 7357,
+    instrux + 7358,
+    instrux + 7359,
+    instrux + 7360,
+};
+
+static const struct itemplate * const itable_evex0614D = {
+    instrux + 7361,
+    instrux + 7362,
+};
+
+static const struct itemplate * const itable_evex0614E = {
+    instrux + 7373,
+    instrux + 7374,
+    instrux + 7375,
+};
+
+static const struct itemplate * const itable_evex0614F = {
+    instrux + 7376,
+    instrux + 7377,
+};
+
+static const struct itemplate * const itable_evex06196 = {
+    instrux + 7187,
+    instrux + 7188,
+    instrux + 7189,
+    instrux + 7190,
+    instrux + 7191,
+    instrux + 7192,
+};
+
+static const struct itemplate * const itable_evex06197 = {
+    instrux + 7205,
+    instrux + 7206,
+    instrux + 7207,
+    instrux + 7208,
+    instrux + 7209,
+    instrux + 7210,
+};
+
+static const struct itemplate * const itable_evex06198 = {
+    instrux + 7223,
+    instrux + 7224,
+    instrux + 7225,
+    instrux + 7226,
+    instrux + 7227,
+    instrux + 7228,
+};
+
+static const struct itemplate * const itable_evex06199 = {
+    instrux + 7259,
+    instrux + 7260,
+};
+
+static const struct itemplate * const itable_evex0619A = {
+    instrux + 7271,
+    instrux + 7272,
+    instrux + 7273,
+    instrux + 7274,
+    instrux + 7275,
+    instrux + 7276,
+};
+
+static const struct itemplate * const itable_evex0619B = {
+    instrux + 7307,
+    instrux + 7308,
+};
+
+static const struct itemplate * const itable_evex0619C = {
+    instrux + 7241,
+    instrux + 7242,
+    instrux + 7243,
+    instrux + 7244,
+    instrux + 7245,
+    instrux + 7246,
+};
+
+static const struct itemplate * const itable_evex0619D = {
+    instrux + 7265,
+    instrux + 7266,
+};
+
+static const struct itemplate * const itable_evex0619E = {
+    instrux + 7289,
+    instrux + 7290,
+    instrux + 7291,
+    instrux + 7292,
+    instrux + 7293,
+    instrux + 7294,
+};
+
+static const struct itemplate * const itable_evex0619F = {
+    instrux + 7313,
+    instrux + 7314,
+};
+
+static const struct itemplate * const itable_evex061A6 = {
+    instrux + 7193,
+    instrux + 7194,
+    instrux + 7195,
+    instrux + 7196,
+    instrux + 7197,
+    instrux + 7198,
+};
+
+static const struct itemplate * const itable_evex061A7 = {
+    instrux + 7211,
+    instrux + 7212,
+    instrux + 7213,
+    instrux + 7214,
+    instrux + 7215,
+    instrux + 7216,
+};
+
+static const struct itemplate * const itable_evex061A8 = {
+    instrux + 7229,
+    instrux + 7230,
+    instrux + 7231,
+    instrux + 7232,
+    instrux + 7233,
+    instrux + 7234,
+};
+
+static const struct itemplate * const itable_evex061A9 = {
+    instrux + 7261,
+    instrux + 7262,
+};
+
+static const struct itemplate * const itable_evex061AA = {
+    instrux + 7277,
+    instrux + 7278,
+    instrux + 7279,
+    instrux + 7280,
+    instrux + 7281,
+    instrux + 7282,
+};
+
+static const struct itemplate * const itable_evex061AB = {
+    instrux + 7309,
+    instrux + 7310,
+};
+
+static const struct itemplate * const itable_evex061AC = {
+    instrux + 7247,
+    instrux + 7248,
+    instrux + 7249,
+    instrux + 7250,
+    instrux + 7251,
+    instrux + 7252,
+};
+
+static const struct itemplate * const itable_evex061AD = {
+    instrux + 7267,
+    instrux + 7268,
+};
+
+static const struct itemplate * const itable_evex061AE = {
+    instrux + 7295,
+    instrux + 7296,
+    instrux + 7297,
+    instrux + 7298,
+    instrux + 7299,
+    instrux + 7300,
+};
+
+static const struct itemplate * const itable_evex061AF = {
+    instrux + 7315,
+    instrux + 7316,
+};
+
+static const struct itemplate * const itable_evex061B6 = {
+    instrux + 7199,
+    instrux + 7200,
+    instrux + 7201,
+    instrux + 7202,
+    instrux + 7203,
+    instrux + 7204,
+};
+
+static const struct itemplate * const itable_evex061B7 = {
+    instrux + 7217,
+    instrux + 7218,
+    instrux + 7219,
+    instrux + 7220,
+    instrux + 7221,
+    instrux + 7222,
+};
+
+static const struct itemplate * const itable_evex061B8 = {
+    instrux + 7235,
+    instrux + 7236,
+    instrux + 7237,
+    instrux + 7238,
+    instrux + 7239,
+    instrux + 7240,
+};
+
+static const struct itemplate * const itable_evex061B9 = {
+    instrux + 7263,
+    instrux + 7264,
+};
+
+static const struct itemplate * const itable_evex061BA = {
+    instrux + 7283,
+    instrux + 7284,
+    instrux + 7285,
+    instrux + 7286,
+    instrux + 7287,
+    instrux + 7288,
+};
+
+static const struct itemplate * const itable_evex061BB = {
+    instrux + 7311,
+    instrux + 7312,
+};
+
+static const struct itemplate * const itable_evex061BC = {
+    instrux + 7253,
+    instrux + 7254,
+    instrux + 7255,
+    instrux + 7256,
+    instrux + 7257,
+    instrux + 7258,
+};
+
+static const struct itemplate * const itable_evex061BD = {
+    instrux + 7269,
+    instrux + 7270,
+};
+
+static const struct itemplate * const itable_evex061BE = {
+    instrux + 7301,
+    instrux + 7302,
+    instrux + 7303,
+    instrux + 7304,
+    instrux + 7305,
+    instrux + 7306,
+};
+
+static const struct itemplate * const itable_evex061BF = {
+    instrux + 7317,
+    instrux + 7318,
+};
+
+static const struct itemplate * const itable_evex06256 = {
+    instrux + 7161,
+    instrux + 7162,
+    instrux + 7163,
+    instrux + 7164,
+    instrux + 7165,
+    instrux + 7166,
+};
+
+static const struct itemplate * const itable_evex06257 = {
+    instrux + 7169,
+    instrux + 7170,
+};
+
+static const struct itemplate * const itable_evex062D6 = {
+    instrux + 7177,
+    instrux + 7178,
+    instrux + 7179,
+    instrux + 7180,
+    instrux + 7181,
+    instrux + 7182,
+};
+
+static const struct itemplate * const itable_evex062D7 = {
+    instrux + 7185,
+    instrux + 7186,
+};
+
+static const struct itemplate * const itable_evex06356 = {
+    instrux + 7155,
+    instrux + 7156,
+    instrux + 7157,
+    instrux + 7158,
+    instrux + 7159,
+    instrux + 7160,
+};
+
+static const struct itemplate * const itable_evex06357 = {
+    instrux + 7167,
+    instrux + 7168,
+};
+
+static const struct itemplate * const itable_evex063D6 = {
+    instrux + 7171,
+    instrux + 7172,
+    instrux + 7173,
+    instrux + 7174,
+    instrux + 7175,
+    instrux + 7176,
+};
+
+static const struct itemplate * const itable_evex063D7 = {
+    instrux + 7183,
+    instrux + 7184,
+};
+
+static const struct itemplate * const itable_vex01010 = {
+    instrux + 2742,
+    instrux + 2744,
+};
+
+static const struct itemplate * const itable_vex01011 = {
+    instrux + 2743,
+    instrux + 2745,
+};
+
+static const struct itemplate * const itable_vex01012 = {
+    instrux + 2690,
+    instrux + 2691,
+    instrux + 2703,
+    instrux + 2704,
+};
+
+static const struct itemplate * const itable_vex01013 = {
+    instrux + 2705,
+};
+
+static const struct itemplate * const itable_vex01014 = {
+    instrux + 3093,
+    instrux + 3094,
+    instrux + 3095,
+    instrux + 3096,
+};
+
+static const struct itemplate * const itable_vex01015 = {
+    instrux + 3085,
+    instrux + 3086,
+    instrux + 3087,
+    instrux + 3088,
+};
+
+static const struct itemplate * const itable_vex01016 = {
+    instrux + 2695,
+    instrux + 2696,
+    instrux + 2698,
+    instrux + 2699,
+};
+
+static const struct itemplate * const itable_vex01017 = {
+    instrux + 2697,
+};
+
+static const struct itemplate * const itable_vex01028 = {
+    instrux + 2666,
+    instrux + 2668,
+};
+
+static const struct itemplate * const itable_vex01029 = {
+    instrux + 2667,
+    instrux + 2669,
+};
+
+static const struct itemplate * const itable_vex0102B = {
+    instrux + 2720,
+    instrux + 2721,
+};
+
+static const struct itemplate * const itable_vex0102E = {
+    instrux + 3080,
+};
+
+static const struct itemplate * const itable_vex0102F = {
+    instrux + 2542,
+};
+
+static const struct itemplate * const itable_vex01041 = {
+    instrux + 4117,
+    instrux + 4118,
+};
+
+static const struct itemplate * const itable_vex01042 = {
+    instrux + 4115,
+    instrux + 4116,
+};
+
+static const struct itemplate * const itable_vex01044 = {
+    instrux + 4137,
+    instrux + 4138,
+};
+
+static const struct itemplate * const itable_vex01045 = {
+    instrux + 4141,
+    instrux + 4142,
+};
+
+static const struct itemplate * const itable_vex01046 = {
+    instrux + 4164,
+    instrux + 4165,
+};
+
+static const struct itemplate * const itable_vex01047 = {
+    instrux + 4168,
+    instrux + 4169,
+};
+
+static const struct itemplate * const itable_vex0104A = {
+    instrux + 4109,
+    instrux + 4110,
+};
+
+static const struct itemplate * const itable_vex0104B = {
+    instrux + 4160,
+    instrux + 4161,
+};
+
+static const struct itemplate * const itable_vex01050 = {
+    instrux + 2710,
+    instrux + 2711,
+    instrux + 2712,
+    instrux + 2713,
+};
+
+static const struct itemplate * const itable_vex01051 = {
+    instrux + 3056,
+    instrux + 3057,
+};
+
+static const struct itemplate * const itable_vex01052 = {
+    instrux + 3034,
+    instrux + 3035,
+};
+
+static const struct itemplate * const itable_vex01053 = {
+    instrux + 3030,
+    instrux + 3031,
+};
+
+static const struct itemplate * const itable_vex01054 = {
+    instrux + 1945,
+    instrux + 1946,
+    instrux + 1947,
+    instrux + 1948,
+};
+
+static const struct itemplate * const itable_vex01055 = {
+    instrux + 1953,
+    instrux + 1954,
+    instrux + 1955,
+    instrux + 1956,
+};
+
+static const struct itemplate * const itable_vex01056 = {
+    instrux + 2764,
+    instrux + 2765,
+    instrux + 2766,
+    instrux + 2767,
+};
+
+static const struct itemplate * const itable_vex01057 = {
+    instrux + 3101,
+    instrux + 3102,
+    instrux + 3103,
+    instrux + 3104,
+};
+
+static const struct itemplate * const itable_vex01058 = {
+    instrux + 1925,
+    instrux + 1926,
+    instrux + 1927,
+    instrux + 1928,
+};
+
+static const struct itemplate * const itable_vex01059 = {
+    instrux + 2752,
+    instrux + 2753,
+    instrux + 2754,
+    instrux + 2755,
+};
+
+static const struct itemplate * const itable_vex0105A = {
+    instrux + 2557,
+    instrux + 2558,
+};
+
+static const struct itemplate * const itable_vex0105B = {
+    instrux + 2545,
+    instrux + 2546,
+};
+
+static const struct itemplate * const itable_vex0105C = {
+    instrux + 3067,
+    instrux + 3068,
+    instrux + 3069,
+    instrux + 3070,
+};
+
+static const struct itemplate * const itable_vex0105D = {
+    instrux + 2654,
+    instrux + 2655,
+    instrux + 2656,
+    instrux + 2657,
+};
+
+static const struct itemplate * const itable_vex0105E = {
+    instrux + 2589,
+    instrux + 2590,
+    instrux + 2591,
+    instrux + 2592,
+};
+
+static const struct itemplate * const itable_vex0105F = {
+    instrux + 2642,
+    instrux + 2643,
+    instrux + 2644,
+    instrux + 2645,
+};
+
+static const struct itemplate * const itable_vex01077 = {
+    instrux + 3105,
+    instrux + 3106,
+};
+
+static const struct itemplate * const itable_vex01090 = {
+    instrux + 4127,
+    instrux + 4131,
+};
+
+static const struct itemplate * const itable_vex01091 = {
+    instrux + 4128,
+    instrux + 4132,
+};
+
+static const struct itemplate * const itable_vex01092 = {
+    instrux + 4133,
+};
+
+static const struct itemplate * const itable_vex01093 = {
+    instrux + 4134,
+};
+
+static const struct itemplate * const itable_vex01098 = {
+    instrux + 4145,
+    instrux + 4146,
+};
+
+static const struct itemplate * const itable_vex01099 = {
+    instrux + 4157,
+    instrux + 4158,
+};
+
+static const struct itemplate * const itable_vex010AE = {
+    instrux + 2628,
+    instrux + 3062,
+};
+
+static const struct itemplate * const itable_vex010C2 = {
+    instrux + 2165,
+    instrux + 2166,
+    instrux + 2167,
+    instrux + 2168,
+    instrux + 2169,
+    instrux + 2170,
+    instrux + 2171,
+    instrux + 2172,
+    instrux + 2173,
+    instrux + 2174,
+    instrux + 2175,
+    instrux + 2176,
+    instrux + 2177,
+    instrux + 2178,
+    instrux + 2179,
+    instrux + 2180,
+    instrux + 2181,
+    instrux + 2182,
+    instrux + 2183,
+    instrux + 2184,
+    instrux + 2185,
+    instrux + 2186,
+    instrux + 2187,
+    instrux + 2188,
+    instrux + 2189,
+    instrux + 2190,
+    instrux + 2191,
+    instrux + 2192,
+    instrux + 2193,
+    instrux + 2194,
+    instrux + 2195,
+    instrux + 2196,
+    instrux + 2197,
+    instrux + 2198,
+    instrux + 2199,
+    instrux + 2200,
+    instrux + 2201,
+    instrux + 2202,
+    instrux + 2203,
+    instrux + 2204,
+    instrux + 2205,
+    instrux + 2206,
+    instrux + 2207,
+    instrux + 2208,
+    instrux + 2209,
+    instrux + 2210,
+    instrux + 2211,
+    instrux + 2212,
+    instrux + 2213,
+    instrux + 2214,
+    instrux + 2215,
+    instrux + 2216,
+    instrux + 2217,
+    instrux + 2218,
+    instrux + 2219,
+    instrux + 2220,
+    instrux + 2221,
+    instrux + 2222,
+    instrux + 2223,
+    instrux + 2224,
+    instrux + 2225,
+    instrux + 2226,
+    instrux + 2227,
+    instrux + 2228,
+    instrux + 2229,
+    instrux + 2230,
+    instrux + 2231,
+    instrux + 2232,
+    instrux + 2233,
+    instrux + 2234,
+    instrux + 2235,
+    instrux + 2236,
+    instrux + 2237,
+    instrux + 2238,
+    instrux + 2239,
+    instrux + 2240,
+    instrux + 2241,
+    instrux + 2242,
+    instrux + 2243,
+    instrux + 2244,
+    instrux + 2245,
+    instrux + 2246,
+    instrux + 2247,
+    instrux + 2248,
+    instrux + 2249,
+    instrux + 2250,
+    instrux + 2251,
+    instrux + 2252,
+    instrux + 2253,
+    instrux + 2254,
+    instrux + 2255,
+    instrux + 2256,
+    instrux + 2257,
+    instrux + 2258,
+    instrux + 2259,
+    instrux + 2260,
+    instrux + 2261,
+    instrux + 2262,
+    instrux + 2263,
+    instrux + 2264,
+    instrux + 2265,
+    instrux + 2266,
+    instrux + 2267,
+    instrux + 2268,
+    instrux + 2269,
+    instrux + 2270,
+    instrux + 2271,
+    instrux + 2272,
+    instrux + 2273,
+    instrux + 2274,
+    instrux + 2275,
+    instrux + 2276,
+    instrux + 2277,
+    instrux + 2278,
+    instrux + 2279,
+    instrux + 2280,
+    instrux + 2281,
+    instrux + 2282,
+    instrux + 2283,
+    instrux + 2284,
+    instrux + 2285,
+    instrux + 2286,
+    instrux + 2287,
+    instrux + 2288,
+    instrux + 2289,
+    instrux + 2290,
+    instrux + 2291,
+    instrux + 2292,
+    instrux + 2293,
+    instrux + 2294,
+    instrux + 2295,
+    instrux + 2296,
+    instrux + 2297,
+    instrux + 2298,
+    instrux + 2299,
+    instrux + 2300,
+    instrux + 2301,
+    instrux + 2302,
+    instrux + 2303,
+    instrux + 2304,
+    instrux + 2305,
+    instrux + 2306,
+    instrux + 2307,
+    instrux + 2308,
+    instrux + 2309,
+    instrux + 2310,
+    instrux + 2311,
+    instrux + 2312,
+    instrux + 2313,
+    instrux + 2314,
+    instrux + 2315,
+    instrux + 2316,
+    instrux + 2317,
+    instrux + 2318,
+    instrux + 2319,
+    instrux + 2320,
+    instrux + 2321,
+    instrux + 2322,
+    instrux + 2323,
+    instrux + 2324,
+    instrux + 2325,
+    instrux + 2326,
+    instrux + 2327,
+    instrux + 2328,
+    instrux + 2329,
+    instrux + 2330,
+    instrux + 2331,
+    instrux + 2332,
+    instrux + 2333,
+    instrux + 2334,
+    instrux + 2335,
+    instrux + 2336,
+    instrux + 2337,
+    instrux + 2338,
+    instrux + 2339,
+    instrux + 2340,
+    instrux + 2341,
+    instrux + 2342,
+    instrux + 2343,
+    instrux + 2344,
+    instrux + 2345,
+    instrux + 2346,
+    instrux + 2347,
+    instrux + 2348,
+    instrux + 2349,
+    instrux + 2350,
+    instrux + 2351,
+    instrux + 2352,
+};
+
+static const struct itemplate * const itable_vex010C6 = {
+    instrux + 3050,
+    instrux + 3051,
+    instrux + 3052,
+    instrux + 3053,
+};
+
+static const struct itemplate * const itable_vex01110 = {
+    instrux + 2738,
+    instrux + 2740,
+};
+
+static const struct itemplate * const itable_vex01111 = {
+    instrux + 2739,
+    instrux + 2741,
+};
+
+static const struct itemplate * const itable_vex01112 = {
+    instrux + 2700,
+    instrux + 2701,
+};
+
+static const struct itemplate * const itable_vex01113 = {
+    instrux + 2702,
+};
+
+static const struct itemplate * const itable_vex01114 = {
+    instrux + 3089,
+    instrux + 3090,
+    instrux + 3091,
+    instrux + 3092,
+};
+
+static const struct itemplate * const itable_vex01115 = {
+    instrux + 3081,
+    instrux + 3082,
+    instrux + 3083,
+    instrux + 3084,
+};
+
+static const struct itemplate * const itable_vex01116 = {
+    instrux + 2692,
+    instrux + 2693,
+};
+
+static const struct itemplate * const itable_vex01117 = {
+    instrux + 2694,
+};
+
+static const struct itemplate * const itable_vex01128 = {
+    instrux + 2662,
+    instrux + 2664,
+};
+
+static const struct itemplate * const itable_vex01129 = {
+    instrux + 2663,
+    instrux + 2665,
+};
+
+static const struct itemplate * const itable_vex0112B = {
+    instrux + 2718,
+    instrux + 2719,
+};
+
+static const struct itemplate * const itable_vex0112E = {
+    instrux + 3079,
+};
+
+static const struct itemplate * const itable_vex0112F = {
+    instrux + 2541,
+};
+
+static const struct itemplate * const itable_vex01141 = {
+    instrux + 4111,
+    instrux + 4112,
+};
+
+static const struct itemplate * const itable_vex01142 = {
+    instrux + 4113,
+    instrux + 4114,
+};
+
+static const struct itemplate * const itable_vex01144 = {
+    instrux + 4135,
+    instrux + 4136,
+};
+
+static const struct itemplate * const itable_vex01145 = {
+    instrux + 4139,
+    instrux + 4140,
+};
+
+static const struct itemplate * const itable_vex01146 = {
+    instrux + 4162,
+    instrux + 4163,
+};
+
+static const struct itemplate * const itable_vex01147 = {
+    instrux + 4166,
+    instrux + 4167,
+};
+
+static const struct itemplate * const itable_vex0114A = {
+    instrux + 4107,
+    instrux + 4108,
+};
+
+static const struct itemplate * const itable_vex0114B = {
+    instrux + 4159,
+};
+
+static const struct itemplate * const itable_vex01150 = {
+    instrux + 2706,
+    instrux + 2707,
+    instrux + 2708,
+    instrux + 2709,
+};
+
+static const struct itemplate * const itable_vex01151 = {
+    instrux + 3054,
+    instrux + 3055,
+};
+
+static const struct itemplate * const itable_vex01154 = {
+    instrux + 1941,
+    instrux + 1942,
+    instrux + 1943,
+    instrux + 1944,
+};
+
+static const struct itemplate * const itable_vex01155 = {
+    instrux + 1949,
+    instrux + 1950,
+    instrux + 1951,
+    instrux + 1952,
+};
+
+static const struct itemplate * const itable_vex01156 = {
+    instrux + 2760,
+    instrux + 2761,
+    instrux + 2762,
+    instrux + 2763,
+};
+
+static const struct itemplate * const itable_vex01157 = {
+    instrux + 3097,
+    instrux + 3098,
+    instrux + 3099,
+    instrux + 3100,
+};
+
+static const struct itemplate * const itable_vex01158 = {
+    instrux + 1921,
+    instrux + 1922,
+    instrux + 1923,
+    instrux + 1924,
+};
+
+static const struct itemplate * const itable_vex01159 = {
+    instrux + 2748,
+    instrux + 2749,
+    instrux + 2750,
+    instrux + 2751,
+};
+
+static const struct itemplate * const itable_vex0115A = {
+    instrux + 2551,
+    instrux + 2552,
+    instrux + 2553,
+    instrux + 2554,
+};
+
+static const struct itemplate * const itable_vex0115B = {
+    instrux + 2555,
+    instrux + 2556,
+};
+
+static const struct itemplate * const itable_vex0115C = {
+    instrux + 3063,
+    instrux + 3064,
+    instrux + 3065,
+    instrux + 3066,
+};
+
+static const struct itemplate * const itable_vex0115D = {
+    instrux + 2650,
+    instrux + 2651,
+    instrux + 2652,
+    instrux + 2653,
+};
+
+static const struct itemplate * const itable_vex0115E = {
+    instrux + 2585,
+    instrux + 2586,
+    instrux + 2587,
+    instrux + 2588,
+};
+
+static const struct itemplate * const itable_vex0115F = {
+    instrux + 2638,
+    instrux + 2639,
+    instrux + 2640,
+    instrux + 2641,
+};
+
+static const struct itemplate * const itable_vex01160 = {
+    instrux + 3020,
+    instrux + 3021,
+    instrux + 3881,
+    instrux + 3882,
+};
+
+static const struct itemplate * const itable_vex01161 = {
+    instrux + 3022,
+    instrux + 3023,
+    instrux + 3883,
+    instrux + 3884,
+};
+
+static const struct itemplate * const itable_vex01162 = {
+    instrux + 3024,
+    instrux + 3025,
+    instrux + 3885,
+    instrux + 3886,
+};
+
+static const struct itemplate * const itable_vex01163 = {
+    instrux + 2771,
+    instrux + 2772,
+    instrux + 3678,
+    instrux + 3679,
+};
+
+static const struct itemplate * const itable_vex01164 = {
+    instrux + 2821,
+    instrux + 2822,
+    instrux + 3724,
+    instrux + 3725,
+};
+
+static const struct itemplate * const itable_vex01165 = {
+    instrux + 2823,
+    instrux + 2824,
+    instrux + 3726,
+    instrux + 3727,
+};
+
+static const struct itemplate * const itable_vex01166 = {
+    instrux + 2825,
+    instrux + 2826,
+    instrux + 3728,
+    instrux + 3729,
+};
+
+static const struct itemplate * const itable_vex01167 = {
+    instrux + 2775,
+    instrux + 2776,
+    instrux + 3684,
+    instrux + 3685,
+};
+
+static const struct itemplate * const itable_vex01168 = {
+    instrux + 3012,
+    instrux + 3013,
+    instrux + 3873,
+    instrux + 3874,
+};
+
+static const struct itemplate * const itable_vex01169 = {
+    instrux + 3014,
+    instrux + 3015,
+    instrux + 3875,
+    instrux + 3876,
+};
+
+static const struct itemplate * const itable_vex0116A = {
+    instrux + 3016,
+    instrux + 3017,
+    instrux + 3877,
+    instrux + 3878,
+};
+
+static const struct itemplate * const itable_vex0116B = {
+    instrux + 2773,
+    instrux + 2774,
+    instrux + 3680,
+    instrux + 3681,
+};
+
+static const struct itemplate * const itable_vex0116C = {
+    instrux + 3026,
+    instrux + 3027,
+    instrux + 3887,
+    instrux + 3888,
+};
+
+static const struct itemplate * const itable_vex0116D = {
+    instrux + 3018,
+    instrux + 3019,
+    instrux + 3879,
+    instrux + 3880,
+};
+
+static const struct itemplate * const itable_vex0116E = {
+    instrux + 2670,
+    instrux + 2674,
+};
+
+static const struct itemplate * const itable_vex0116F = {
+    instrux + 2678,
+    instrux + 2680,
+    instrux + 2682,
+};
+
+static const struct itemplate * const itable_vex01170 = {
+    instrux + 2949,
+    instrux + 3812,
+};
+
+static const struct itemplate * const itable_vex01171 = {
+    instrux + 2964,
+    instrux + 2965,
+    instrux + 2976,
+    instrux + 2977,
+    instrux + 2984,
+    instrux + 2985,
+    instrux + 3825,
+    instrux + 3826,
+    instrux + 3837,
+    instrux + 3838,
+    instrux + 3847,
+    instrux + 3848,
+};
+
+static const struct itemplate * const itable_vex01172 = {
+    instrux + 2968,
+    instrux + 2969,
+    instrux + 2980,
+    instrux + 2981,
+    instrux + 2988,
+    instrux + 2989,
+    instrux + 3829,
+    instrux + 3830,
+    instrux + 3841,
+    instrux + 3842,
+    instrux + 3851,
+    instrux + 3852,
+};
+
+static const struct itemplate * const itable_vex01173 = {
+    instrux + 2958,
+    instrux + 2959,
+    instrux + 2960,
+    instrux + 2961,
+    instrux + 2972,
+    instrux + 2973,
+    instrux + 2992,
+    instrux + 2993,
+    instrux + 3821,
+    instrux + 3822,
+    instrux + 3833,
+    instrux + 3834,
+    instrux + 3843,
+    instrux + 3844,
+    instrux + 3855,
+    instrux + 3856,
+};
+
+static const struct itemplate * const itable_vex01174 = {
+    instrux + 2813,
+    instrux + 2814,
+    instrux + 3716,
+    instrux + 3717,
+};
+
+static const struct itemplate * const itable_vex01175 = {
+    instrux + 2815,
+    instrux + 2816,
+    instrux + 3718,
+    instrux + 3719,
+};
+
+static const struct itemplate * const itable_vex01176 = {
+    instrux + 2817,
+    instrux + 2818,
+    instrux + 3720,
+    instrux + 3721,
+};
+
+static const struct itemplate * const itable_vex0117C = {
+    instrux + 2605,
+    instrux + 2606,
+    instrux + 2607,
+    instrux + 2608,
+};
+
+static const struct itemplate * const itable_vex0117D = {
+    instrux + 2613,
+    instrux + 2614,
+    instrux + 2615,
+    instrux + 2616,
+};
+
+static const struct itemplate * const itable_vex0117E = {
+    instrux + 2671,
+    instrux + 2675,
+};
+
+static const struct itemplate * const itable_vex0117F = {
+    instrux + 2679,
+    instrux + 2681,
+    instrux + 2683,
+};
+
+static const struct itemplate * const itable_vex01190 = {
+    instrux + 4119,
+    instrux + 4123,
+};
+
+static const struct itemplate * const itable_vex01191 = {
+    instrux + 4120,
+    instrux + 4124,
+};
+
+static const struct itemplate * const itable_vex01192 = {
+    instrux + 4121,
+};
+
+static const struct itemplate * const itable_vex01193 = {
+    instrux + 4122,
+};
+
+static const struct itemplate * const itable_vex01198 = {
+    instrux + 4143,
+    instrux + 4144,
+};
+
+static const struct itemplate * const itable_vex01199 = {
+    instrux + 4155,
+    instrux + 4156,
+};
+
+static const struct itemplate * const itable_vex011C2 = {
+    instrux + 1977,
+    instrux + 1978,
+    instrux + 1979,
+    instrux + 1980,
+    instrux + 1981,
+    instrux + 1982,
+    instrux + 1983,
+    instrux + 1984,
+    instrux + 1985,
+    instrux + 1986,
+    instrux + 1987,
+    instrux + 1988,
+    instrux + 1989,
+    instrux + 1990,
+    instrux + 1991,
+    instrux + 1992,
+    instrux + 1993,
+    instrux + 1994,
+    instrux + 1995,
+    instrux + 1996,
+    instrux + 1997,
+    instrux + 1998,
+    instrux + 1999,
+    instrux + 2000,
+    instrux + 2001,
+    instrux + 2002,
+    instrux + 2003,
+    instrux + 2004,
+    instrux + 2005,
+    instrux + 2006,
+    instrux + 2007,
+    instrux + 2008,
+    instrux + 2009,
+    instrux + 2010,
+    instrux + 2011,
+    instrux + 2012,
+    instrux + 2013,
+    instrux + 2014,
+    instrux + 2015,
+    instrux + 2016,
+    instrux + 2017,
+    instrux + 2018,
+    instrux + 2019,
+    instrux + 2020,
+    instrux + 2021,
+    instrux + 2022,
+    instrux + 2023,
+    instrux + 2024,
+    instrux + 2025,
+    instrux + 2026,
+    instrux + 2027,
+    instrux + 2028,
+    instrux + 2029,
+    instrux + 2030,
+    instrux + 2031,
+    instrux + 2032,
+    instrux + 2033,
+    instrux + 2034,
+    instrux + 2035,
+    instrux + 2036,
+    instrux + 2037,
+    instrux + 2038,
+    instrux + 2039,
+    instrux + 2040,
+    instrux + 2041,
+    instrux + 2042,
+    instrux + 2043,
+    instrux + 2044,
+    instrux + 2045,
+    instrux + 2046,
+    instrux + 2047,
+    instrux + 2048,
+    instrux + 2049,
+    instrux + 2050,
+    instrux + 2051,
+    instrux + 2052,
+    instrux + 2053,
+    instrux + 2054,
+    instrux + 2055,
+    instrux + 2056,
+    instrux + 2057,
+    instrux + 2058,
+    instrux + 2059,
+    instrux + 2060,
+    instrux + 2061,
+    instrux + 2062,
+    instrux + 2063,
+    instrux + 2064,
+    instrux + 2065,
+    instrux + 2066,
+    instrux + 2067,
+    instrux + 2068,
+    instrux + 2069,
+    instrux + 2070,
+    instrux + 2071,
+    instrux + 2072,
+    instrux + 2073,
+    instrux + 2074,
+    instrux + 2075,
+    instrux + 2076,
+    instrux + 2077,
+    instrux + 2078,
+    instrux + 2079,
+    instrux + 2080,
+    instrux + 2081,
+    instrux + 2082,
+    instrux + 2083,
+    instrux + 2084,
+    instrux + 2085,
+    instrux + 2086,
+    instrux + 2087,
+    instrux + 2088,
+    instrux + 2089,
+    instrux + 2090,
+    instrux + 2091,
+    instrux + 2092,
+    instrux + 2093,
+    instrux + 2094,
+    instrux + 2095,
+    instrux + 2096,
+    instrux + 2097,
+    instrux + 2098,
+    instrux + 2099,
+    instrux + 2100,
+    instrux + 2101,
+    instrux + 2102,
+    instrux + 2103,
+    instrux + 2104,
+    instrux + 2105,
+    instrux + 2106,
+    instrux + 2107,
+    instrux + 2108,
+    instrux + 2109,
+    instrux + 2110,
+    instrux + 2111,
+    instrux + 2112,
+    instrux + 2113,
+    instrux + 2114,
+    instrux + 2115,
+    instrux + 2116,
+    instrux + 2117,
+    instrux + 2118,
+    instrux + 2119,
+    instrux + 2120,
+    instrux + 2121,
+    instrux + 2122,
+    instrux + 2123,
+    instrux + 2124,
+    instrux + 2125,
+    instrux + 2126,
+    instrux + 2127,
+    instrux + 2128,
+    instrux + 2129,
+    instrux + 2130,
+    instrux + 2131,
+    instrux + 2132,
+    instrux + 2133,
+    instrux + 2134,
+    instrux + 2135,
+    instrux + 2136,
+    instrux + 2137,
+    instrux + 2138,
+    instrux + 2139,
+    instrux + 2140,
+    instrux + 2141,
+    instrux + 2142,
+    instrux + 2143,
+    instrux + 2144,
+    instrux + 2145,
+    instrux + 2146,
+    instrux + 2147,
+    instrux + 2148,
+    instrux + 2149,
+    instrux + 2150,
+    instrux + 2151,
+    instrux + 2152,
+    instrux + 2153,
+    instrux + 2154,
+    instrux + 2155,
+    instrux + 2156,
+    instrux + 2157,
+    instrux + 2158,
+    instrux + 2159,
+    instrux + 2160,
+    instrux + 2161,
+    instrux + 2162,
+    instrux + 2163,
+    instrux + 2164,
+};
+
+static const struct itemplate * const itable_vex011C4 = {
+    instrux + 2873,
+    instrux + 2874,
+    instrux + 2875,
+    instrux + 2876,
+    instrux + 2877,
+    instrux + 2878,
+};
+
+static const struct itemplate * const itable_vex011C5 = {
+    instrux + 2846,
+    instrux + 2847,
+};
+
+static const struct itemplate * const itable_vex011C6 = {
+    instrux + 3046,
+    instrux + 3047,
+    instrux + 3048,
+    instrux + 3049,
+};
+
+static const struct itemplate * const itable_vex011D0 = {
+    instrux + 1933,
+    instrux + 1934,
+    instrux + 1935,
+    instrux + 1936,
+};
+
+static const struct itemplate * const itable_vex011D1 = {
+    instrux + 2982,
+    instrux + 2983,
+    instrux + 3845,
+    instrux + 3846,
+};
+
+static const struct itemplate * const itable_vex011D2 = {
+    instrux + 2986,
+    instrux + 2987,
+    instrux + 3849,
+    instrux + 3850,
+};
+
+static const struct itemplate * const itable_vex011D3 = {
+    instrux + 2990,
+    instrux + 2991,
+    instrux + 3853,
+    instrux + 3854,
+};
+
+static const struct itemplate * const itable_vex011D4 = {
+    instrux + 2785,
+    instrux + 2786,
+    instrux + 3692,
+    instrux + 3693,
+};
+
+static const struct itemplate * const itable_vex011D5 = {
+    instrux + 2935,
+    instrux + 2936,
+    instrux + 3800,
+    instrux + 3801,
+};
+
+static const struct itemplate * const itable_vex011D6 = {
+    instrux + 2673,
+};
+
+static const struct itemplate * const itable_vex011D7 = {
+    instrux + 2915,
+    instrux + 2916,
+    instrux + 3772,
+    instrux + 3773,
+};
+
+static const struct itemplate * const itable_vex011D8 = {
+    instrux + 3008,
+    instrux + 3009,
+    instrux + 3869,
+    instrux + 3870,
+};
+
+static const struct itemplate * const itable_vex011D9 = {
+    instrux + 3010,
+    instrux + 3011,
+    instrux + 3871,
+    instrux + 3872,
+};
+
+static const struct itemplate * const itable_vex011DA = {
+    instrux + 2909,
+    instrux + 2910,
+    instrux + 3766,
+    instrux + 3767,
+};
+
+static const struct itemplate * const itable_vex011DB = {
+    instrux + 2797,
+    instrux + 2798,
+    instrux + 3704,
+    instrux + 3705,
+};
+
+static const struct itemplate * const itable_vex011DC = {
+    instrux + 2791,
+    instrux + 2792,
+    instrux + 3698,
+    instrux + 3699,
+};
+
+static const struct itemplate * const itable_vex011DD = {
+    instrux + 2793,
+    instrux + 2794,
+    instrux + 3700,
+    instrux + 3701,
+};
+
+static const struct itemplate * const itable_vex011DE = {
+    instrux + 2897,
+    instrux + 2898,
+    instrux + 3754,
+    instrux + 3755,
+};
+
+static const struct itemplate * const itable_vex011DF = {
+    instrux + 2799,
+    instrux + 2800,
+    instrux + 3706,
+    instrux + 3707,
+};
+
+static const struct itemplate * const itable_vex011E0 = {
+    instrux + 2801,
+    instrux + 2802,
+    instrux + 3708,
+    instrux + 3709,
+};
+
+static const struct itemplate * const itable_vex011E1 = {
+    instrux + 2974,
+    instrux + 2975,
+    instrux + 3835,
+    instrux + 3836,
+};
+
+static const struct itemplate * const itable_vex011E2 = {
+    instrux + 2978,
+    instrux + 2979,
+    instrux + 3839,
+    instrux + 3840,
+};
+
+static const struct itemplate * const itable_vex011E3 = {
+    instrux + 2803,
+    instrux + 2804,
+    instrux + 3710,
+    instrux + 3711,
+};
+
+static const struct itemplate * const itable_vex011E4 = {
+    instrux + 2929,
+    instrux + 2930,
+    instrux + 3796,
+    instrux + 3797,
+};
+
+static const struct itemplate * const itable_vex011E5 = {
+    instrux + 2933,
+    instrux + 2934,
+    instrux + 3798,
+    instrux + 3799,
+};
+
+static const struct itemplate * const itable_vex011E6 = {
+    instrux + 2575,
+    instrux + 2576,
+    instrux + 2577,
+    instrux + 2578,
+};
+
+static const struct itemplate * const itable_vex011E7 = {
+    instrux + 2714,
+    instrux + 2715,
+    instrux + 2716,
+};
+
+static const struct itemplate * const itable_vex011E8 = {
+    instrux + 3004,
+    instrux + 3005,
+    instrux + 3865,
+    instrux + 3866,
+};
+
+static const struct itemplate * const itable_vex011E9 = {
+    instrux + 3006,
+    instrux + 3007,
+    instrux + 3867,
+    instrux + 3868,
+};
+
+static const struct itemplate * const itable_vex011EA = {
+    instrux + 2905,
+    instrux + 2906,
+    instrux + 3762,
+    instrux + 3763,
+};
+
+static const struct itemplate * const itable_vex011EB = {
+    instrux + 2943,
+    instrux + 2944,
+    instrux + 3806,
+    instrux + 3807,
+};
+
+static const struct itemplate * const itable_vex011EC = {
+    instrux + 2787,
+    instrux + 2788,
+    instrux + 3694,
+    instrux + 3695,
+};
+
+static const struct itemplate * const itable_vex011ED = {
+    instrux + 2789,
+    instrux + 2790,
+    instrux + 3696,
+    instrux + 3697,
+};
+
+static const struct itemplate * const itable_vex011EE = {
+    instrux + 2893,
+    instrux + 2894,
+    instrux + 3750,
+    instrux + 3751,
+};
+
+static const struct itemplate * const itable_vex011EF = {
+    instrux + 3028,
+    instrux + 3029,
+    instrux + 3889,
+    instrux + 3890,
+};
+
+static const struct itemplate * const itable_vex011F1 = {
+    instrux + 2962,
+    instrux + 2963,
+    instrux + 3823,
+    instrux + 3824,
+};
+
+static const struct itemplate * const itable_vex011F2 = {
+    instrux + 2966,
+    instrux + 2967,
+    instrux + 3827,
+    instrux + 3828,
+};
+
+static const struct itemplate * const itable_vex011F3 = {
+    instrux + 2970,
+    instrux + 2971,
+    instrux + 3831,
+    instrux + 3832,
+};
+
+static const struct itemplate * const itable_vex011F4 = {
+    instrux + 2939,
+    instrux + 2940,
+    instrux + 3804,
+    instrux + 3805,
+};
+
+static const struct itemplate * const itable_vex011F5 = {
+    instrux + 2887,
+    instrux + 2888,
+    instrux + 3746,
+    instrux + 3747,
+};
+
+static const struct itemplate * const itable_vex011F6 = {
+    instrux + 2945,
+    instrux + 2946,
+    instrux + 3808,
+    instrux + 3809,
+};
+
+static const struct itemplate * const itable_vex011F7 = {
+    instrux + 2629,
+};
+
+static const struct itemplate * const itable_vex011F8 = {
+    instrux + 2996,
+    instrux + 2997,
+    instrux + 3857,
+    instrux + 3858,
+};
+
+static const struct itemplate * const itable_vex011F9 = {
+    instrux + 2998,
+    instrux + 2999,
+    instrux + 3859,
+    instrux + 3860,
+};
+
+static const struct itemplate * const itable_vex011FA = {
+    instrux + 3000,
+    instrux + 3001,
+    instrux + 3861,
+    instrux + 3862,
+};
+
+static const struct itemplate * const itable_vex011FB = {
+    instrux + 3002,
+    instrux + 3003,
+    instrux + 3863,
+    instrux + 3864,
+};
+
+static const struct itemplate * const itable_vex011FC = {
+    instrux + 2779,
+    instrux + 2780,
+    instrux + 3686,
+    instrux + 3687,
+};
+
+static const struct itemplate * const itable_vex011FD = {
+    instrux + 2781,
+    instrux + 2782,
+    instrux + 3688,
+    instrux + 3689,
+};
+
+static const struct itemplate * const itable_vex011FE = {
+    instrux + 2783,
+    instrux + 2784,
+    instrux + 3690,
+    instrux + 3691,
+};
+
+static const struct itemplate * const itable_vex01210 = {
+    instrux + 2732,
+    instrux + 2733,
+    instrux + 2734,
+};
+
+static const struct itemplate * const itable_vex01211 = {
+    instrux + 2735,
+    instrux + 2736,
+    instrux + 2737,
+};
+
+static const struct itemplate * const itable_vex01212 = {
+    instrux + 2730,
+    instrux + 2731,
+};
+
+static const struct itemplate * const itable_vex01216 = {
+    instrux + 2728,
+    instrux + 2729,
+};
+
+static const struct itemplate * const itable_vex0122A = {
+    instrux + 2567,
+    instrux + 2568,
+    instrux + 2569,
+    instrux + 2570,
+};
+
+static const struct itemplate * const itable_vex0122C = {
+    instrux + 2583,
+    instrux + 2584,
+};
+
+static const struct itemplate * const itable_vex0122D = {
+    instrux + 2573,
+    instrux + 2574,
+};
+
+static const struct itemplate * const itable_vex01251 = {
+    instrux + 3060,
+    instrux + 3061,
+};
+
+static const struct itemplate * const itable_vex01252 = {
+    instrux + 3036,
+    instrux + 3037,
+};
+
+static const struct itemplate * const itable_vex01253 = {
+    instrux + 3032,
+    instrux + 3033,
+};
+
+static const struct itemplate * const itable_vex01258 = {
+    instrux + 1931,
+    instrux + 1932,
+};
+
+static const struct itemplate * const itable_vex01259 = {
+    instrux + 2758,
+    instrux + 2759,
+};
+
+static const struct itemplate * const itable_vex0125A = {
+    instrux + 2571,
+    instrux + 2572,
+};
+
+static const struct itemplate * const itable_vex0125B = {
+    instrux + 2579,
+    instrux + 2580,
+};
+
+static const struct itemplate * const itable_vex0125C = {
+    instrux + 3073,
+    instrux + 3074,
+};
+
+static const struct itemplate * const itable_vex0125D = {
+    instrux + 2660,
+    instrux + 2661,
+};
+
+static const struct itemplate * const itable_vex0125E = {
+    instrux + 2595,
+    instrux + 2596,
+};
+
+static const struct itemplate * const itable_vex0125F = {
+    instrux + 2648,
+    instrux + 2649,
+};
+
+static const struct itemplate * const itable_vex0126F = {
+    instrux + 2684,
+    instrux + 2686,
+    instrux + 2688,
+};
+
+static const struct itemplate * const itable_vex01270 = {
+    instrux + 2950,
+    instrux + 3813,
+};
+
+static const struct itemplate * const itable_vex0127E = {
+    instrux + 2672,
+};
+
+static const struct itemplate * const itable_vex0127F = {
+    instrux + 2685,
+    instrux + 2687,
+    instrux + 2689,
+};
+
+static const struct itemplate * const itable_vex012C2 = {
+    instrux + 2447,
+    instrux + 2448,
+    instrux + 2449,
+    instrux + 2450,
+    instrux + 2451,
+    instrux + 2452,
+    instrux + 2453,
+    instrux + 2454,
+    instrux + 2455,
+    instrux + 2456,
+    instrux + 2457,
+    instrux + 2458,
+    instrux + 2459,
+    instrux + 2460,
+    instrux + 2461,
+    instrux + 2462,
+    instrux + 2463,
+    instrux + 2464,
+    instrux + 2465,
+    instrux + 2466,
+    instrux + 2467,
+    instrux + 2468,
+    instrux + 2469,
+    instrux + 2470,
+    instrux + 2471,
+    instrux + 2472,
+    instrux + 2473,
+    instrux + 2474,
+    instrux + 2475,
+    instrux + 2476,
+    instrux + 2477,
+    instrux + 2478,
+    instrux + 2479,
+    instrux + 2480,
+    instrux + 2481,
+    instrux + 2482,
+    instrux + 2483,
+    instrux + 2484,
+    instrux + 2485,
+    instrux + 2486,
+    instrux + 2487,
+    instrux + 2488,
+    instrux + 2489,
+    instrux + 2490,
+    instrux + 2491,
+    instrux + 2492,
+    instrux + 2493,
+    instrux + 2494,
+    instrux + 2495,
+    instrux + 2496,
+    instrux + 2497,
+    instrux + 2498,
+    instrux + 2499,
+    instrux + 2500,
+    instrux + 2501,
+    instrux + 2502,
+    instrux + 2503,
+    instrux + 2504,
+    instrux + 2505,
+    instrux + 2506,
+    instrux + 2507,
+    instrux + 2508,
+    instrux + 2509,
+    instrux + 2510,
+    instrux + 2511,
+    instrux + 2512,
+    instrux + 2513,
+    instrux + 2514,
+    instrux + 2515,
+    instrux + 2516,
+    instrux + 2517,
+    instrux + 2518,
+    instrux + 2519,
+    instrux + 2520,
+    instrux + 2521,
+    instrux + 2522,
+    instrux + 2523,
+    instrux + 2524,
+    instrux + 2525,
+    instrux + 2526,
+    instrux + 2527,
+    instrux + 2528,
+    instrux + 2529,
+    instrux + 2530,
+    instrux + 2531,
+    instrux + 2532,
+    instrux + 2533,
+    instrux + 2534,
+    instrux + 2535,
+    instrux + 2536,
+    instrux + 2537,
+    instrux + 2538,
+    instrux + 2539,
+    instrux + 2540,
+};
+
+static const struct itemplate * const itable_vex012E6 = {
+    instrux + 2543,
+    instrux + 2544,
+};
+
+static const struct itemplate * const itable_vex01310 = {
+    instrux + 2722,
+    instrux + 2723,
+    instrux + 2724,
+};
+
+static const struct itemplate * const itable_vex01311 = {
+    instrux + 2725,
+    instrux + 2726,
+    instrux + 2727,
+};
+
+static const struct itemplate * const itable_vex01312 = {
+    instrux + 2676,
+    instrux + 2677,
+};
+
+static const struct itemplate * const itable_vex0132A = {
+    instrux + 2563,
+    instrux + 2564,
+    instrux + 2565,
+    instrux + 2566,
+};
+
+static const struct itemplate * const itable_vex0132C = {
+    instrux + 2581,
+    instrux + 2582,
+};
+
+static const struct itemplate * const itable_vex0132D = {
+    instrux + 2559,
+    instrux + 2560,
+};
+
+static const struct itemplate * const itable_vex01351 = {
+    instrux + 3058,
+    instrux + 3059,
+};
+
+static const struct itemplate * const itable_vex01358 = {
+    instrux + 1929,
+    instrux + 1930,
+};
+
+static const struct itemplate * const itable_vex01359 = {
+    instrux + 2756,
+    instrux + 2757,
+};
+
+static const struct itemplate * const itable_vex0135A = {
+    instrux + 2561,
+    instrux + 2562,
+};
+
+static const struct itemplate * const itable_vex0135C = {
+    instrux + 3071,
+    instrux + 3072,
+};
+
+static const struct itemplate * const itable_vex0135D = {
+    instrux + 2658,
+    instrux + 2659,
+};
+
+static const struct itemplate * const itable_vex0135E = {
+    instrux + 2593,
+    instrux + 2594,
+};
+
+static const struct itemplate * const itable_vex0135F = {
+    instrux + 2646,
+    instrux + 2647,
+};
+
+static const struct itemplate * const itable_vex01370 = {
+    instrux + 2951,
+    instrux + 3814,
+};
+
+static const struct itemplate * const itable_vex0137C = {
+    instrux + 2609,
+    instrux + 2610,
+    instrux + 2611,
+    instrux + 2612,
+};
+
+static const struct itemplate * const itable_vex0137D = {
+    instrux + 2617,
+    instrux + 2618,
+    instrux + 2619,
+    instrux + 2620,
+};
+
+static const struct itemplate * const itable_vex01392 = {
+    instrux + 4125,
+    instrux + 4129,
+};
+
+static const struct itemplate * const itable_vex01393 = {
+    instrux + 4126,
+    instrux + 4130,
+};
+
+static const struct itemplate * const itable_vex013C2 = {
+    instrux + 2353,
+    instrux + 2354,
+    instrux + 2355,
+    instrux + 2356,
+    instrux + 2357,
+    instrux + 2358,
+    instrux + 2359,
+    instrux + 2360,
+    instrux + 2361,
+    instrux + 2362,
+    instrux + 2363,
+    instrux + 2364,
+    instrux + 2365,
+    instrux + 2366,
+    instrux + 2367,
+    instrux + 2368,
+    instrux + 2369,
+    instrux + 2370,
+    instrux + 2371,
+    instrux + 2372,
+    instrux + 2373,
+    instrux + 2374,
+    instrux + 2375,
+    instrux + 2376,
+    instrux + 2377,
+    instrux + 2378,
+    instrux + 2379,
+    instrux + 2380,
+    instrux + 2381,
+    instrux + 2382,
+    instrux + 2383,
+    instrux + 2384,
+    instrux + 2385,
+    instrux + 2386,
+    instrux + 2387,
+    instrux + 2388,
+    instrux + 2389,
+    instrux + 2390,
+    instrux + 2391,
+    instrux + 2392,
+    instrux + 2393,
+    instrux + 2394,
+    instrux + 2395,
+    instrux + 2396,
+    instrux + 2397,
+    instrux + 2398,
+    instrux + 2399,
+    instrux + 2400,
+    instrux + 2401,
+    instrux + 2402,
+    instrux + 2403,
+    instrux + 2404,
+    instrux + 2405,
+    instrux + 2406,
+    instrux + 2407,
+    instrux + 2408,
+    instrux + 2409,
+    instrux + 2410,
+    instrux + 2411,
+    instrux + 2412,
+    instrux + 2413,
+    instrux + 2414,
+    instrux + 2415,
+    instrux + 2416,
+    instrux + 2417,
+    instrux + 2418,
+    instrux + 2419,
+    instrux + 2420,
+    instrux + 2421,
+    instrux + 2422,
+    instrux + 2423,
+    instrux + 2424,
+    instrux + 2425,
+    instrux + 2426,
+    instrux + 2427,
+    instrux + 2428,
+    instrux + 2429,
+    instrux + 2430,
+    instrux + 2431,
+    instrux + 2432,
+    instrux + 2433,
+    instrux + 2434,
+    instrux + 2435,
+    instrux + 2436,
+    instrux + 2437,
+    instrux + 2438,
+    instrux + 2439,
+    instrux + 2440,
+    instrux + 2441,
+    instrux + 2442,
+    instrux + 2443,
+    instrux + 2444,
+    instrux + 2445,
+    instrux + 2446,
+};
+
+static const struct itemplate * const itable_vex013D0 = {
+    instrux + 1937,
+    instrux + 1938,
+    instrux + 1939,
+    instrux + 1940,
+};
+
+static const struct itemplate * const itable_vex013E6 = {
+    instrux + 2547,
+    instrux + 2548,
+    instrux + 2549,
+    instrux + 2550,
+};
+
+static const struct itemplate * const itable_vex013F0 = {
+    instrux + 2625,
+    instrux + 2626,
+    instrux + 2627,
+};
+
+static const struct itemplate * const itable_vex02049 = {
+    instrux + 7017,
+    instrux + 7026,
+};
+
+static const struct itemplate * const itable_vex02050 = {
+    instrux + 4099,
+    instrux + 4100,
+};
+
+static const struct itemplate * const itable_vex02051 = {
+    instrux + 4101,
+    instrux + 4102,
+};
+
+static const struct itemplate * const itable_vex0205E = {
+    instrux + 7023,
+};
+
+static const struct itemplate * const itable_vex020B0 = {
+    instrux + 4087,
+    instrux + 4088,
+};
+
+static const struct itemplate * const itable_vex020DA = {
+    instrux + 4070,
+};
+
+static const struct itemplate * const itable_vex020F2 = {
+    instrux + 3987,
+    instrux + 3988,
+};
+
+static const struct itemplate * const itable_vex020F3 = {
+    instrux + 3997,
+    instrux + 3998,
+    instrux + 4007,
+    instrux + 4008,
+    instrux + 4009,
+    instrux + 4010,
+};
+
+static const struct itemplate * const itable_vex020F5 = {
+    instrux + 4013,
+    instrux + 4014,
+};
+
+static const struct itemplate * const itable_vex020F7 = {
+    instrux + 3989,
+    instrux + 3990,
+};
+
+static const struct itemplate * const itable_vex02100 = {
+    instrux + 2947,
+    instrux + 2948,
+    instrux + 3810,
+    instrux + 3811,
+};
+
+static const struct itemplate * const itable_vex02101 = {
+    instrux + 2854,
+    instrux + 2855,
+    instrux + 3732,
+    instrux + 3733,
+};
+
+static const struct itemplate * const itable_vex02102 = {
+    instrux + 2856,
+    instrux + 2857,
+    instrux + 3734,
+    instrux + 3735,
+};
+
+static const struct itemplate * const itable_vex02103 = {
+    instrux + 2858,
+    instrux + 2859,
+    instrux + 3736,
+    instrux + 3737,
+};
+
+static const struct itemplate * const itable_vex02104 = {
+    instrux + 2889,
+    instrux + 2890,
+    instrux + 3744,
+    instrux + 3745,
+};
+
+static const struct itemplate * const itable_vex02105 = {
+    instrux + 2861,
+    instrux + 2862,
+    instrux + 3738,
+    instrux + 3739,
+};
+
+static const struct itemplate * const itable_vex02106 = {
+    instrux + 2863,
+    instrux + 2864,
+    instrux + 3740,
+    instrux + 3741,
+};
+
+static const struct itemplate * const itable_vex02107 = {
+    instrux + 2865,
+    instrux + 2866,
+    instrux + 3742,
+    instrux + 3743,
+};
+
+static const struct itemplate * const itable_vex02108 = {
+    instrux + 2952,
+    instrux + 2953,
+    instrux + 3815,
+    instrux + 3816,
+};
+
+static const struct itemplate * const itable_vex02109 = {
+    instrux + 2954,
+    instrux + 2955,
+    instrux + 3817,
+    instrux + 3818,
+};
+
+static const struct itemplate * const itable_vex0210A = {
+    instrux + 2956,
+    instrux + 2957,
+    instrux + 3819,
+    instrux + 3820,
+};
+
+static const struct itemplate * const itable_vex0210B = {
+    instrux + 2931,
+    instrux + 2932,
+    instrux + 3794,
+    instrux + 3795,
+};
+
+static const struct itemplate * const itable_vex0210C = {
+    instrux + 2835,
+    instrux + 2836,
+    instrux + 2837,
+    instrux + 2838,
+};
+
+static const struct itemplate * const itable_vex0210D = {
+    instrux + 2829,
+    instrux + 2830,
+    instrux + 2831,
+    instrux + 2832,
+};
+
+static const struct itemplate * const itable_vex0210E = {
+    instrux + 3075,
+    instrux + 3076,
+};
+
+static const struct itemplate * const itable_vex0210F = {
+    instrux + 3077,
+    instrux + 3078,
+};
+
+static const struct itemplate * const itable_vex02113 = {
+    instrux + 3365,
+    instrux + 3366,
+    instrux + 7058,
+    instrux + 7059,
+};
+
+static const struct itemplate * const itable_vex02116 = {
+    instrux + 3919,
+    instrux + 3920,
+};
+
+static const struct itemplate * const itable_vex02117 = {
+    instrux + 2994,
+    instrux + 2995,
+};
+
+static const struct itemplate * const itable_vex02118 = {
+    instrux + 1973,
+    instrux + 1974,
+    instrux + 3892,
+    instrux + 3893,
+};
+
+static const struct itemplate * const itable_vex02119 = {
+    instrux + 1975,
+    instrux + 3894,
+};
+
+static const struct itemplate * const itable_vex0211A = {
+    instrux + 1976,
+};
+
+static const struct itemplate * const itable_vex0211C = {
+    instrux + 2768,
+    instrux + 3675,
+};
+
+static const struct itemplate * const itable_vex0211D = {
+    instrux + 2769,
+    instrux + 3676,
+};
+
+static const struct itemplate * const itable_vex0211E = {
+    instrux + 2770,
+    instrux + 3677,
+};
+
+static const struct itemplate * const itable_vex02120 = {
+    instrux + 2917,
+    instrux + 3774,
+};
+
+static const struct itemplate * const itable_vex02121 = {
+    instrux + 2918,
+    instrux + 3775,
+    instrux + 3776,
+};
+
+static const struct itemplate * const itable_vex02122 = {
+    instrux + 2919,
+    instrux + 3777,
+    instrux + 3778,
+};
+
+static const struct itemplate * const itable_vex02123 = {
+    instrux + 2920,
+    instrux + 3779,
+};
+
+static const struct itemplate * const itable_vex02124 = {
+    instrux + 2921,
+    instrux + 3780,
+    instrux + 3781,
+};
+
+static const struct itemplate * const itable_vex02125 = {
+    instrux + 2922,
+    instrux + 3782,
+};
+
+static const struct itemplate * const itable_vex02128 = {
+    instrux + 2941,
+    instrux + 2942,
+    instrux + 3792,
+    instrux + 3793,
+};
+
+static const struct itemplate * const itable_vex02129 = {
+    instrux + 2819,
+    instrux + 2820,
+    instrux + 3722,
+    instrux + 3723,
+};
+
+static const struct itemplate * const itable_vex0212A = {
+    instrux + 2717,
+    instrux + 3891,
+};
+
+static const struct itemplate * const itable_vex0212B = {
+    instrux + 2777,
+    instrux + 2778,
+    instrux + 3682,
+    instrux + 3683,
+};
+
+static const struct itemplate * const itable_vex0212C = {
+    instrux + 2630,
+    instrux + 2631,
+};
+
+static const struct itemplate * const itable_vex0212D = {
+    instrux + 2634,
+    instrux + 2635,
+};
+
+static const struct itemplate * const itable_vex0212E = {
+    instrux + 2632,
+    instrux + 2633,
+};
+
+static const struct itemplate * const itable_vex0212F = {
+    instrux + 2636,
+    instrux + 2637,
+};
+
+static const struct itemplate * const itable_vex02130 = {
+    instrux + 2923,
+    instrux + 3783,
+};
+
+static const struct itemplate * const itable_vex02131 = {
+    instrux + 2924,
+    instrux + 3784,
+    instrux + 3785,
+};
+
+static const struct itemplate * const itable_vex02132 = {
+    instrux + 2925,
+    instrux + 3786,
+    instrux + 3787,
+};
+
+static const struct itemplate * const itable_vex02133 = {
+    instrux + 2926,
+    instrux + 3788,
+};
+
+static const struct itemplate * const itable_vex02134 = {
+    instrux + 2927,
+    instrux + 3789,
+    instrux + 3790,
+};
+
+static const struct itemplate * const itable_vex02135 = {
+    instrux + 2928,
+    instrux + 3791,
+};
+
+static const struct itemplate * const itable_vex02136 = {
+    instrux + 3916,
+    instrux + 3917,
+};
+
+static const struct itemplate * const itable_vex02137 = {
+    instrux + 2827,
+    instrux + 2828,
+    instrux + 3730,
+    instrux + 3731,
+};
+
+static const struct itemplate * const itable_vex02138 = {
+    instrux + 2903,
+    instrux + 2904,
+    instrux + 3760,
+    instrux + 3761,
+};
+
+static const struct itemplate * const itable_vex02139 = {
+    instrux + 2907,
+    instrux + 2908,
+    instrux + 3764,
+    instrux + 3765,
+};
+
+static const struct itemplate * const itable_vex0213A = {
+    instrux + 2911,
+    instrux + 2912,
+    instrux + 3768,
+    instrux + 3769,
+};
+
+static const struct itemplate * const itable_vex0213B = {
+    instrux + 2913,
+    instrux + 2914,
+    instrux + 3770,
+    instrux + 3771,
+};
+
+static const struct itemplate * const itable_vex0213C = {
+    instrux + 2891,
+    instrux + 2892,
+    instrux + 3748,
+    instrux + 3749,
+};
+
+static const struct itemplate * const itable_vex0213D = {
+    instrux + 2895,
+    instrux + 2896,
+    instrux + 3752,
+    instrux + 3753,
+};
+
+static const struct itemplate * const itable_vex0213E = {
+    instrux + 2899,
+    instrux + 2900,
+    instrux + 3756,
+    instrux + 3757,
+};
+
+static const struct itemplate * const itable_vex0213F = {
+    instrux + 2901,
+    instrux + 2902,
+    instrux + 3758,
+    instrux + 3759,
+};
+
+static const struct itemplate * const itable_vex02140 = {
+    instrux + 2937,
+    instrux + 2938,
+    instrux + 3802,
+    instrux + 3803,
+};
+
+static const struct itemplate * const itable_vex02141 = {
+    instrux + 2860,
+};
+
+static const struct itemplate * const itable_vex02145 = {
+    instrux + 3955,
+    instrux + 3956,
+    instrux + 3957,
+    instrux + 3958,
+    instrux + 3959,
+    instrux + 3960,
+    instrux + 3961,
+    instrux + 3962,
+};
+
+static const struct itemplate * const itable_vex02146 = {
+    instrux + 3951,
+    instrux + 3952,
+    instrux + 3953,
+    instrux + 3954,
+};
+
+static const struct itemplate * const itable_vex02147 = {
+    instrux + 3943,
+    instrux + 3944,
+    instrux + 3945,
+    instrux + 3946,
+    instrux + 3947,
+    instrux + 3948,
+    instrux + 3949,
+    instrux + 3950,
+};
+
+static const struct itemplate * const itable_vex02149 = {
+    instrux + 7018,
+};
+
+static const struct itemplate * const itable_vex0214B = {
+    instrux + 7025,
+};
+
+static const struct itemplate * const itable_vex02158 = {
+    instrux + 3908,
+    instrux + 3909,
+    instrux + 3910,
+    instrux + 3911,
+};
+
+static const struct itemplate * const itable_vex02159 = {
+    instrux + 3912,
+    instrux + 3913,
+    instrux + 3914,
+    instrux + 3915,
+};
+
+static const struct itemplate * const itable_vex0215A = {
+    instrux + 3895,
+};
+
+static const struct itemplate * const itable_vex0215E = {
+    instrux + 7022,
+};
+
+static const struct itemplate * const itable_vex02178 = {
+    instrux + 3900,
+    instrux + 3901,
+    instrux + 3902,
+    instrux + 3903,
+};
+
+static const struct itemplate * const itable_vex02179 = {
+    instrux + 3904,
+    instrux + 3905,
+    instrux + 3906,
+    instrux + 3907,
+};
+
+static const struct itemplate * const itable_vex0218C = {
+    instrux + 3927,
+    instrux + 3928,
+    instrux + 3929,
+    instrux + 3930,
+    instrux + 3931,
+    instrux + 3932,
+    instrux + 3933,
+    instrux + 3934,
+};
+
+static const struct itemplate * const itable_vex0218E = {
+    instrux + 3935,
+    instrux + 3936,
+    instrux + 3937,
+    instrux + 3938,
+    instrux + 3939,
+    instrux + 3940,
+    instrux + 3941,
+    instrux + 3942,
+};
+
+static const struct itemplate * const itable_vex02190 = {
+    instrux + 3971,
+    instrux + 3973,
+    instrux + 3975,
+    instrux + 3977,
+};
+
+static const struct itemplate * const itable_vex02191 = {
+    instrux + 3972,
+    instrux + 3974,
+    instrux + 3976,
+    instrux + 3978,
+};
+
+static const struct itemplate * const itable_vex02192 = {
+    instrux + 3963,
+    instrux + 3965,
+    instrux + 3967,
+    instrux + 3969,
+};
+
+static const struct itemplate * const itable_vex02193 = {
+    instrux + 3964,
+    instrux + 3966,
+    instrux + 3968,
+    instrux + 3970,
+};
+
+static const struct itemplate * const itable_vex02196 = {
+    instrux + 3186,
+    instrux + 3187,
+    instrux + 3188,
+    instrux + 3189,
+    instrux + 3190,
+    instrux + 3191,
+    instrux + 3192,
+    instrux + 3193,
+};
+
+static const struct itemplate * const itable_vex02197 = {
+    instrux + 3234,
+    instrux + 3235,
+    instrux + 3236,
+    instrux + 3237,
+    instrux + 3238,
+    instrux + 3239,
+    instrux + 3240,
+    instrux + 3241,
+};
+
+static const struct itemplate * const itable_vex02198 = {
+    instrux + 3162,
+    instrux + 3163,
+    instrux + 3164,
+    instrux + 3165,
+    instrux + 3166,
+    instrux + 3167,
+    instrux + 3168,
+    instrux + 3169,
+};
+
+static const struct itemplate * const itable_vex02199 = {
+    instrux + 3306,
+    instrux + 3307,
+    instrux + 3308,
+    instrux + 3309,
+};
+
+static const struct itemplate * const itable_vex0219A = {
+    instrux + 3210,
+    instrux + 3211,
+    instrux + 3212,
+    instrux + 3213,
+    instrux + 3214,
+    instrux + 3215,
+    instrux + 3216,
+    instrux + 3217,
+};
+
+static const struct itemplate * const itable_vex0219B = {
+    instrux + 3318,
+    instrux + 3319,
+    instrux + 3320,
+    instrux + 3321,
+};
+
+static const struct itemplate * const itable_vex0219C = {
+    instrux + 3258,
+    instrux + 3259,
+    instrux + 3260,
+    instrux + 3261,
+    instrux + 3262,
+    instrux + 3263,
+    instrux + 3264,
+    instrux + 3265,
+};
+
+static const struct itemplate * const itable_vex0219D = {
+    instrux + 3330,
+    instrux + 3331,
+    instrux + 3332,
+    instrux + 3333,
+};
+
+static const struct itemplate * const itable_vex0219E = {
+    instrux + 3282,
+    instrux + 3283,
+    instrux + 3284,
+    instrux + 3285,
+    instrux + 3286,
+    instrux + 3287,
+    instrux + 3288,
+    instrux + 3289,
+};
+
+static const struct itemplate * const itable_vex0219F = {
+    instrux + 3342,
+    instrux + 3343,
+    instrux + 3344,
+    instrux + 3345,
+};
+
+static const struct itemplate * const itable_vex021A6 = {
+    instrux + 3194,
+    instrux + 3195,
+    instrux + 3196,
+    instrux + 3197,
+    instrux + 3198,
+    instrux + 3199,
+    instrux + 3200,
+    instrux + 3201,
+};
+
+static const struct itemplate * const itable_vex021A7 = {
+    instrux + 3242,
+    instrux + 3243,
+    instrux + 3244,
+    instrux + 3245,
+    instrux + 3246,
+    instrux + 3247,
+    instrux + 3248,
+    instrux + 3249,
+};
+
+static const struct itemplate * const itable_vex021A8 = {
+    instrux + 3170,
+    instrux + 3171,
+    instrux + 3172,
+    instrux + 3173,
+    instrux + 3174,
+    instrux + 3175,
+    instrux + 3176,
+    instrux + 3177,
+};
+
+static const struct itemplate * const itable_vex021A9 = {
+    instrux + 3310,
+    instrux + 3311,
+    instrux + 3312,
+    instrux + 3313,
+};
+
+static const struct itemplate * const itable_vex021AA = {
+    instrux + 3218,
+    instrux + 3219,
+    instrux + 3220,
+    instrux + 3221,
+    instrux + 3222,
+    instrux + 3223,
+    instrux + 3224,
+    instrux + 3225,
+};
+
+static const struct itemplate * const itable_vex021AB = {
+    instrux + 3322,
+    instrux + 3323,
+    instrux + 3324,
+    instrux + 3325,
+};
+
+static const struct itemplate * const itable_vex021AC = {
+    instrux + 3266,
+    instrux + 3267,
+    instrux + 3268,
+    instrux + 3269,
+    instrux + 3270,
+    instrux + 3271,
+    instrux + 3272,
+    instrux + 3273,
+};
+
+static const struct itemplate * const itable_vex021AD = {
+    instrux + 3334,
+    instrux + 3335,
+    instrux + 3336,
+    instrux + 3337,
+};
+
+static const struct itemplate * const itable_vex021AE = {
+    instrux + 3290,
+    instrux + 3291,
+    instrux + 3292,
+    instrux + 3293,
+    instrux + 3294,
+    instrux + 3295,
+    instrux + 3296,
+    instrux + 3297,
+};
+
+static const struct itemplate * const itable_vex021AF = {
+    instrux + 3346,
+    instrux + 3347,
+    instrux + 3348,
+    instrux + 3349,
+};
+
+static const struct itemplate * const itable_vex021B0 = {
+    instrux + 4083,
+    instrux + 4084,
+};
+
+static const struct itemplate * const itable_vex021B1 = {
+    instrux + 4079,
+    instrux + 4080,
+};
+
+static const struct itemplate * const itable_vex021B4 = {
+    instrux + 4105,
+    instrux + 4106,
+};
+
+static const struct itemplate * const itable_vex021B5 = {
+    instrux + 4103,
+    instrux + 4104,
+};
+
+static const struct itemplate * const itable_vex021B6 = {
+    instrux + 3202,
+    instrux + 3203,
+    instrux + 3204,
+    instrux + 3205,
+    instrux + 3206,
+    instrux + 3207,
+    instrux + 3208,
+    instrux + 3209,
+};
+
+static const struct itemplate * const itable_vex021B7 = {
+    instrux + 3250,
+    instrux + 3251,
+    instrux + 3252,
+    instrux + 3253,
+    instrux + 3254,
+    instrux + 3255,
+    instrux + 3256,
+    instrux + 3257,
+};
+
+static const struct itemplate * const itable_vex021B8 = {
+    instrux + 3178,
+    instrux + 3179,
+    instrux + 3180,
+    instrux + 3181,
+    instrux + 3182,
+    instrux + 3183,
+    instrux + 3184,
+    instrux + 3185,
+};
+
+static const struct itemplate * const itable_vex021B9 = {
+    instrux + 3314,
+    instrux + 3315,
+    instrux + 3316,
+    instrux + 3317,
+};
+
+static const struct itemplate * const itable_vex021BA = {
+    instrux + 3226,
+    instrux + 3227,
+    instrux + 3228,
+    instrux + 3229,
+    instrux + 3230,
+    instrux + 3231,
+    instrux + 3232,
+    instrux + 3233,
+};
+
+static const struct itemplate * const itable_vex021BB = {
+    instrux + 3326,
+    instrux + 3327,
+    instrux + 3328,
+    instrux + 3329,
+};
+
+static const struct itemplate * const itable_vex021BC = {
+    instrux + 3274,
+    instrux + 3275,
+    instrux + 3276,
+    instrux + 3277,
+    instrux + 3278,
+    instrux + 3279,
+    instrux + 3280,
+    instrux + 3281,
+};
+
+static const struct itemplate * const itable_vex021BD = {
+    instrux + 3338,
+    instrux + 3339,
+    instrux + 3340,
+    instrux + 3341,
+};
+
+static const struct itemplate * const itable_vex021BE = {
+    instrux + 3298,
+    instrux + 3299,
+    instrux + 3300,
+    instrux + 3301,
+    instrux + 3302,
+    instrux + 3303,
+    instrux + 3304,
+    instrux + 3305,
+};
+
+static const struct itemplate * const itable_vex021BF = {
+    instrux + 3350,
+    instrux + 3351,
+    instrux + 3352,
+    instrux + 3353,
+};
+
+static const struct itemplate * const itable_vex021CF = {
+    instrux + 6823,
+    instrux + 6824,
+    instrux + 6825,
+    instrux + 6826,
+};
+
+static const struct itemplate * const itable_vex021DA = {
+    instrux + 4071,
+};
+
+static const struct itemplate * const itable_vex021DB = {
+    instrux + 1887,
+};
+
+static const struct itemplate * const itable_vex021DC = {
+    instrux + 1879,
+    instrux + 1880,
+    instrux + 1889,
+    instrux + 1890,
+};
+
+static const struct itemplate * const itable_vex021DD = {
+    instrux + 1881,
+    instrux + 1882,
+    instrux + 1891,
+    instrux + 1892,
+};
+
+static const struct itemplate * const itable_vex021DE = {
+    instrux + 1883,
+    instrux + 1884,
+    instrux + 1893,
+    instrux + 1894,
+};
+
+static const struct itemplate * const itable_vex021DF = {
+    instrux + 1885,
+    instrux + 1886,
+    instrux + 1895,
+    instrux + 1896,
+};
+
+static const struct itemplate * const itable_vex021E0 = {
+    instrux + 7422,
+    instrux + 7438,
+};
+
+static const struct itemplate * const itable_vex021E1 = {
+    instrux + 7419,
+    instrux + 7435,
+};
+
+static const struct itemplate * const itable_vex021E2 = {
+    instrux + 7412,
+    instrux + 7428,
+};
+
+static const struct itemplate * const itable_vex021E3 = {
+    instrux + 7416,
+    instrux + 7432,
+};
+
+static const struct itemplate * const itable_vex021E4 = {
+    instrux + 7426,
+    instrux + 7442,
+};
+
+static const struct itemplate * const itable_vex021E5 = {
+    instrux + 7421,
+    instrux + 7437,
+};
+
+static const struct itemplate * const itable_vex021E6 = {
+    instrux + 7415,
+    instrux + 7431,
+};
+
+static const struct itemplate * const itable_vex021E7 = {
+    instrux + 7411,
+    instrux + 7427,
+};
+
+static const struct itemplate * const itable_vex021E8 = {
+    instrux + 7425,
+    instrux + 7441,
+};
+
+static const struct itemplate * const itable_vex021E9 = {
+    instrux + 7420,
+    instrux + 7436,
+};
+
+static const struct itemplate * const itable_vex021EA = {
+    instrux + 7423,
+    instrux + 7439,
+};
+
+static const struct itemplate * const itable_vex021EB = {
+    instrux + 7424,
+    instrux + 7440,
+};
+
+static const struct itemplate * const itable_vex021EC = {
+    instrux + 7414,
+    instrux + 7430,
+};
+
+static const struct itemplate * const itable_vex021ED = {
+    instrux + 7418,
+    instrux + 7434,
+};
+
+static const struct itemplate * const itable_vex021EE = {
+    instrux + 7417,
+    instrux + 7433,
+};
+
+static const struct itemplate * const itable_vex021EF = {
+    instrux + 7413,
+    instrux + 7429,
+};
+
+static const struct itemplate * const itable_vex021F7 = {
+    instrux + 4025,
+    instrux + 4026,
+};
+
+static const struct itemplate * const itable_vex0224B = {
+    instrux + 7027,
+};
+
+static const struct itemplate * const itable_vex02250 = {
+    instrux + 4095,
+    instrux + 4096,
+};
+
+static const struct itemplate * const itable_vex02251 = {
+    instrux + 4097,
+    instrux + 4098,
+};
+
+static const struct itemplate * const itable_vex0225C = {
+    instrux + 7019,
+};
+
+static const struct itemplate * const itable_vex0225E = {
+    instrux + 7021,
+};
+
+static const struct itemplate * const itable_vex02272 = {
+    instrux + 4089,
+    instrux + 4090,
+};
+
+static const struct itemplate * const itable_vex022B0 = {
+    instrux + 4081,
+    instrux + 4082,
+};
+
+static const struct itemplate * const itable_vex022B1 = {
+    instrux + 4077,
+    instrux + 4078,
+};
+
+static const struct itemplate * const itable_vex022DA = {
+    instrux + 4073,
+    instrux + 4074,
+};
+
+static const struct itemplate * const itable_vex022F5 = {
+    instrux + 4019,
+    instrux + 4020,
+};
+
+static const struct itemplate * const itable_vex022F7 = {
+    instrux + 4023,
+    instrux + 4024,
+};
+
+static const struct itemplate * const itable_vex02349 = {
+    instrux + 7028,
+};
+
+static const struct itemplate * const itable_vex0234B = {
+    instrux + 7024,
+};
+
+static const struct itemplate * const itable_vex02350 = {
+    instrux + 4091,
+    instrux + 4092,
+};
+
+static const struct itemplate * const itable_vex02351 = {
+    instrux + 4093,
+    instrux + 4094,
+};
+
+static const struct itemplate * const itable_vex0235E = {
+    instrux + 7020,
+};
+
+static const struct itemplate * const itable_vex023B0 = {
+    instrux + 4085,
+    instrux + 4086,
+};
+
+static const struct itemplate * const itable_vex023CB = {
+    instrux + 4069,
+};
+
+static const struct itemplate * const itable_vex023CC = {
+    instrux + 4067,
+};
+
+static const struct itemplate * const itable_vex023CD = {
+    instrux + 4068,
+};
+
+static const struct itemplate * const itable_vex023DA = {
+    instrux + 4075,
+    instrux + 4076,
+};
+
+static const struct itemplate * const itable_vex023F5 = {
+    instrux + 4017,
+    instrux + 4018,
+};
+
+static const struct itemplate * const itable_vex023F6 = {
+    instrux + 4015,
+    instrux + 4016,
+};
+
+static const struct itemplate * const itable_vex023F7 = {
+    instrux + 4027,
+    instrux + 4028,
+};
+
+static const struct itemplate * const itable_vex03100 = {
+    instrux + 3921,
+};
+
+static const struct itemplate * const itable_vex03101 = {
+    instrux + 3918,
+};
+
+static const struct itemplate * const itable_vex03102 = {
+    instrux + 3896,
+    instrux + 3897,
+    instrux + 3898,
+    instrux + 3899,
+};
+
+static const struct itemplate * const itable_vex03104 = {
+    instrux + 2839,
+    instrux + 2840,
+};
+
+static const struct itemplate * const itable_vex03105 = {
+    instrux + 2833,
+    instrux + 2834,
+};
+
+static const struct itemplate * const itable_vex03106 = {
+    instrux + 2841,
+    instrux + 2842,
+};
+
+static const struct itemplate * const itable_vex03108 = {
+    instrux + 3040,
+    instrux + 3041,
+};
+
+static const struct itemplate * const itable_vex03109 = {
+    instrux + 3038,
+    instrux + 3039,
+};
+
+static const struct itemplate * const itable_vex0310A = {
+    instrux + 3044,
+    instrux + 3045,
+};
+
+static const struct itemplate * const itable_vex0310B = {
+    instrux + 3042,
+    instrux + 3043,
+};
+
+static const struct itemplate * const itable_vex0310C = {
+    instrux + 1961,
+    instrux + 1962,
+    instrux + 1963,
+    instrux + 1964,
+};
+
+static const struct itemplate * const itable_vex0310D = {
+    instrux + 1957,
+    instrux + 1958,
+    instrux + 1959,
+    instrux + 1960,
+};
+
+static const struct itemplate * const itable_vex0310E = {
+    instrux + 2807,
+    instrux + 2808,
+    instrux + 3714,
+    instrux + 3715,
+};
+
+static const struct itemplate * const itable_vex0310F = {
+    instrux + 2795,
+    instrux + 2796,
+    instrux + 3702,
+    instrux + 3703,
+};
+
+static const struct itemplate * const itable_vex03114 = {
+    instrux + 2843,
+    instrux + 2844,
+    instrux + 2845,
+};
+
+static const struct itemplate * const itable_vex03115 = {
+    instrux + 2848,
+    instrux + 2849,
+    instrux + 2850,
+};
+
+static const struct itemplate * const itable_vex03116 = {
+    instrux + 2851,
+    instrux + 2852,
+    instrux + 2853,
+};
+
+static const struct itemplate * const itable_vex03117 = {
+    instrux + 2604,
+};
+
+static const struct itemplate * const itable_vex03118 = {
+    instrux + 2621,
+    instrux + 2622,
+};
+
+static const struct itemplate * const itable_vex03119 = {
+    instrux + 2603,
+};
+
+static const struct itemplate * const itable_vex0311D = {
+    instrux + 3367,
+    instrux + 3368,
+    instrux + 7081,
+    instrux + 7082,
+};
+
+static const struct itemplate * const itable_vex03120 = {
+    instrux + 2867,
+    instrux + 2868,
+    instrux + 2869,
+    instrux + 2870,
+    instrux + 2871,
+    instrux + 2872,
+};
+
+static const struct itemplate * const itable_vex03121 = {
+    instrux + 2623,
+    instrux + 2624,
+};
+
+static const struct itemplate * const itable_vex03122 = {
+    instrux + 2879,
+    instrux + 2880,
+    instrux + 2881,
+    instrux + 2882,
+    instrux + 2883,
+    instrux + 2884,
+    instrux + 2885,
+    instrux + 2886,
+};
+
+static const struct itemplate * const itable_vex03130 = {
+    instrux + 4151,
+    instrux + 4154,
+};
+
+static const struct itemplate * const itable_vex03131 = {
+    instrux + 4152,
+    instrux + 4153,
+};
+
+static const struct itemplate * const itable_vex03132 = {
+    instrux + 4147,
+    instrux + 4150,
+};
+
+static const struct itemplate * const itable_vex03133 = {
+    instrux + 4148,
+    instrux + 4149,
+};
+
+static const struct itemplate * const itable_vex03138 = {
+    instrux + 3925,
+    instrux + 3926,
+};
+
+static const struct itemplate * const itable_vex03139 = {
+    instrux + 3924,
+};
+
+static const struct itemplate * const itable_vex03140 = {
+    instrux + 2599,
+    instrux + 2600,
+    instrux + 2601,
+    instrux + 2602,
+};
+
+static const struct itemplate * const itable_vex03141 = {
+    instrux + 2597,
+    instrux + 2598,
+};
+
+static const struct itemplate * const itable_vex03142 = {
+    instrux + 2746,
+    instrux + 2747,
+    instrux + 3673,
+    instrux + 3674,
+};
+
+static const struct itemplate * const itable_vex03144 = {
+    instrux + 3112,
+    instrux + 3113,
+    instrux + 3114,
+    instrux + 3115,
+    instrux + 3116,
+    instrux + 3117,
+    instrux + 3118,
+    instrux + 3119,
+    instrux + 3120,
+    instrux + 3121,
+    instrux + 3122,
+    instrux + 3123,
+    instrux + 3124,
+    instrux + 3125,
+    instrux + 3126,
+    instrux + 3127,
+    instrux + 3128,
+    instrux + 3129,
+    instrux + 3130,
+    instrux + 3131,
+};
+
+static const struct itemplate * const itable_vex03146 = {
+    instrux + 3922,
+    instrux + 3923,
+};
+
+static const struct itemplate * const itable_vex0314A = {
+    instrux + 1969,
+    instrux + 1970,
+    instrux + 1971,
+    instrux + 1972,
+};
+
+static const struct itemplate * const itable_vex0314B = {
+    instrux + 1965,
+    instrux + 1966,
+    instrux + 1967,
+    instrux + 1968,
+};
+
+static const struct itemplate * const itable_vex0314C = {
+    instrux + 2805,
+    instrux + 2806,
+    instrux + 3712,
+    instrux + 3713,
+};
+
+static const struct itemplate * const itable_vex0315C = {
+    instrux + 3427,
+    instrux + 3428,
+    instrux + 3429,
+    instrux + 3430,
+    instrux + 3431,
+    instrux + 3432,
+    instrux + 3433,
+    instrux + 3434,
+};
+
+static const struct itemplate * const itable_vex0315D = {
+    instrux + 3419,
+    instrux + 3420,
+    instrux + 3421,
+    instrux + 3422,
+    instrux + 3423,
+    instrux + 3424,
+    instrux + 3425,
+    instrux + 3426,
+};
+
+static const struct itemplate * const itable_vex0315E = {
+    instrux + 3443,
+    instrux + 3444,
+    instrux + 3445,
+    instrux + 3446,
+    instrux + 3447,
+    instrux + 3448,
+    instrux + 3449,
+    instrux + 3450,
+};
+
+static const struct itemplate * const itable_vex0315F = {
+    instrux + 3435,
+    instrux + 3436,
+    instrux + 3437,
+    instrux + 3438,
+    instrux + 3439,
+    instrux + 3440,
+    instrux + 3441,
+    instrux + 3442,
+};
+
+static const struct itemplate * const itable_vex03160 = {
+    instrux + 2810,
+};
+
+static const struct itemplate * const itable_vex03161 = {
+    instrux + 2809,
+};
+
+static const struct itemplate * const itable_vex03162 = {
+    instrux + 2812,
+};
+
+static const struct itemplate * const itable_vex03163 = {
+    instrux + 2811,
+};
+
+static const struct itemplate * const itable_vex03168 = {
+    instrux + 3403,
+    instrux + 3404,
+    instrux + 3405,
+    instrux + 3406,
+    instrux + 3407,
+    instrux + 3408,
+    instrux + 3409,
+    instrux + 3410,
+};
+
+static const struct itemplate * const itable_vex03169 = {
+    instrux + 3395,
+    instrux + 3396,
+    instrux + 3397,
+    instrux + 3398,
+    instrux + 3399,
+    instrux + 3400,
+    instrux + 3401,
+    instrux + 3402,
+};
+
+static const struct itemplate * const itable_vex0316A = {
+    instrux + 3415,
+    instrux + 3416,
+    instrux + 3417,
+    instrux + 3418,
+};
+
+static const struct itemplate * const itable_vex0316B = {
+    instrux + 3411,
+    instrux + 3412,
+    instrux + 3413,
+    instrux + 3414,
+};
+
+static const struct itemplate * const itable_vex0316C = {
+    instrux + 3459,
+    instrux + 3460,
+    instrux + 3461,
+    instrux + 3462,
+    instrux + 3463,
+    instrux + 3464,
+    instrux + 3465,
+    instrux + 3466,
+};
+
+static const struct itemplate * const itable_vex0316D = {
+    instrux + 3451,
+    instrux + 3452,
+    instrux + 3453,
+    instrux + 3454,
+    instrux + 3455,
+    instrux + 3456,
+    instrux + 3457,
+    instrux + 3458,
+};
+
+static const struct itemplate * const itable_vex0316E = {
+    instrux + 3471,
+    instrux + 3472,
+    instrux + 3473,
+    instrux + 3474,
+};
+
+static const struct itemplate * const itable_vex0316F = {
+    instrux + 3467,
+    instrux + 3468,
+    instrux + 3469,
+    instrux + 3470,
+};
+
+static const struct itemplate * const itable_vex03178 = {
+    instrux + 3483,
+    instrux + 3484,
+    instrux + 3485,
+    instrux + 3486,
+    instrux + 3487,
+    instrux + 3488,
+    instrux + 3489,
+    instrux + 3490,
+};
+
+static const struct itemplate * const itable_vex03179 = {
+    instrux + 3475,
+    instrux + 3476,
+    instrux + 3477,
+    instrux + 3478,
+    instrux + 3479,
+    instrux + 3480,
+    instrux + 3481,
+    instrux + 3482,
+};
+
+static const struct itemplate * const itable_vex0317A = {
+    instrux + 3495,
+    instrux + 3496,
+    instrux + 3497,
+    instrux + 3498,
+};
+
+static const struct itemplate * const itable_vex0317B = {
+    instrux + 3491,
+    instrux + 3492,
+    instrux + 3493,
+    instrux + 3494,
+};
+
+static const struct itemplate * const itable_vex0317C = {
+    instrux + 3507,
+    instrux + 3508,
+    instrux + 3509,
+    instrux + 3510,
+    instrux + 3511,
+    instrux + 3512,
+    instrux + 3513,
+    instrux + 3514,
+};
+
+static const struct itemplate * const itable_vex0317D = {
+    instrux + 3499,
+    instrux + 3500,
+    instrux + 3501,
+    instrux + 3502,
+    instrux + 3503,
+    instrux + 3504,
+    instrux + 3505,
+    instrux + 3506,
+};
+
+static const struct itemplate * const itable_vex0317E = {
+    instrux + 3519,
+    instrux + 3520,
+    instrux + 3521,
+    instrux + 3522,
+};
+
+static const struct itemplate * const itable_vex0317F = {
+    instrux + 3515,
+    instrux + 3516,
+    instrux + 3517,
+    instrux + 3518,
+};
+
+static const struct itemplate * const itable_vex031CE = {
+    instrux + 6812,
+    instrux + 6813,
+    instrux + 6814,
+    instrux + 6815,
+};
+
+static const struct itemplate * const itable_vex031CF = {
+    instrux + 6801,
+    instrux + 6802,
+    instrux + 6803,
+    instrux + 6804,
+};
+
+static const struct itemplate * const itable_vex031DE = {
+    instrux + 4072,
+};
+
+static const struct itemplate * const itable_vex031DF = {
+    instrux + 1888,
+};
+
+static const struct itemplate * const itable_vex033F0 = {
+    instrux + 4021,
+    instrux + 4022,
+};
+
+static const struct itemplate * const itable_xop08085 = {
+    instrux + 3603,
+    instrux + 3604,
+};
+
+static const struct itemplate * const itable_xop08086 = {
+    instrux + 3601,
+    instrux + 3602,
+};
+
+static const struct itemplate * const itable_xop08087 = {
+    instrux + 3599,
+    instrux + 3600,
+};
+
+static const struct itemplate * const itable_xop0808E = {
+    instrux + 3595,
+    instrux + 3596,
+};
+
+static const struct itemplate * const itable_xop0808F = {
+    instrux + 3597,
+    instrux + 3598,
+};
+
+static const struct itemplate * const itable_xop08095 = {
+    instrux + 3607,
+    instrux + 3608,
+};
+
+static const struct itemplate * const itable_xop08096 = {
+    instrux + 3605,
+    instrux + 3606,
+};
+
+static const struct itemplate * const itable_xop08097 = {
+    instrux + 3593,
+    instrux + 3594,
+};
+
+static const struct itemplate * const itable_xop0809E = {
+    instrux + 3589,
+    instrux + 3590,
+};
+
+static const struct itemplate * const itable_xop0809F = {
+    instrux + 3591,
+    instrux + 3592,
+};
+
+static const struct itemplate * const itable_xop080A2 = {
+    instrux + 3535,
+    instrux + 3536,
+    instrux + 3537,
+    instrux + 3538,
+    instrux + 3539,
+    instrux + 3540,
+    instrux + 3541,
+    instrux + 3542,
+};
+
+static const struct itemplate * const itable_xop080A3 = {
+    instrux + 3613,
+    instrux + 3614,
+    instrux + 3615,
+    instrux + 3616,
+};
+
+static const struct itemplate * const itable_xop080A6 = {
+    instrux + 3609,
+    instrux + 3610,
+};
+
+static const struct itemplate * const itable_xop080B6 = {
+    instrux + 3611,
+    instrux + 3612,
+};
+
+static const struct itemplate * const itable_xop080C0 = {
+    instrux + 3621,
+    instrux + 3622,
+};
+
+static const struct itemplate * const itable_xop080C1 = {
+    instrux + 3639,
+    instrux + 3640,
+};
+
+static const struct itemplate * const itable_xop080C2 = {
+    instrux + 3627,
+    instrux + 3628,
+};
+
+static const struct itemplate * const itable_xop080C3 = {
+    instrux + 3633,
+    instrux + 3634,
+};
+
+static const struct itemplate * const itable_xop080CC = {
+    instrux + 3543,
+    instrux + 3544,
+};
+
+static const struct itemplate * const itable_xop080CD = {
+    instrux + 3557,
+    instrux + 3558,
+};
+
+static const struct itemplate * const itable_xop080CE = {
+    instrux + 3545,
+    instrux + 3546,
+};
+
+static const struct itemplate * const itable_xop080CF = {
+    instrux + 3547,
+    instrux + 3548,
+};
+
+static const struct itemplate * const itable_xop080EC = {
+    instrux + 3549,
+    instrux + 3550,
+};
+
+static const struct itemplate * const itable_xop080ED = {
+    instrux + 3555,
+    instrux + 3556,
+};
+
+static const struct itemplate * const itable_xop080EE = {
+    instrux + 3551,
+    instrux + 3552,
+};
+
+static const struct itemplate * const itable_xop080EF = {
+    instrux + 3553,
+    instrux + 3554,
+};
+
+static const struct itemplate * const itable_xop09001 = {
+    instrux + 3995,
+    instrux + 3996,
+    instrux + 3999,
+    instrux + 4000,
+    instrux + 4001,
+    instrux + 4002,
+    instrux + 4003,
+    instrux + 4004,
+    instrux + 4011,
+    instrux + 4012,
+    instrux + 4032,
+    instrux + 4033,
+    instrux + 4034,
+    instrux + 4035,
+};
+
+static const struct itemplate * const itable_xop09002 = {
+    instrux + 3993,
+    instrux + 3994,
+    instrux + 4005,
+    instrux + 4006,
+};
+
+static const struct itemplate * const itable_xop09012 = {
+    instrux + 3387,
+    instrux + 3388,
+    instrux + 3389,
+    instrux + 3390,
+};
+
+static const struct itemplate * const itable_xop09080 = {
+    instrux + 3527,
+    instrux + 3528,
+    instrux + 3529,
+    instrux + 3530,
+};
+
+static const struct itemplate * const itable_xop09081 = {
+    instrux + 3523,
+    instrux + 3524,
+    instrux + 3525,
+    instrux + 3526,
+};
+
+static const struct itemplate * const itable_xop09082 = {
+    instrux + 3533,
+    instrux + 3534,
+};
+
+static const struct itemplate * const itable_xop09083 = {
+    instrux + 3531,
+    instrux + 3532,
+};
+
+static const struct itemplate * const itable_xop09090 = {
+    instrux + 3617,
+    instrux + 3618,
+    instrux + 3619,
+    instrux + 3620,
+};
+
+static const struct itemplate * const itable_xop09091 = {
+    instrux + 3635,
+    instrux + 3636,
+    instrux + 3637,
+    instrux + 3638,
+};
+
+static const struct itemplate * const itable_xop09092 = {
+    instrux + 3623,
+    instrux + 3624,
+    instrux + 3625,
+    instrux + 3626,
+};
+
+static const struct itemplate * const itable_xop09093 = {
+    instrux + 3629,
+    instrux + 3630,
+    instrux + 3631,
+    instrux + 3632,
+};
+
+static const struct itemplate * const itable_xop09094 = {
+    instrux + 3657,
+    instrux + 3658,
+    instrux + 3659,
+    instrux + 3660,
+};
+
+static const struct itemplate * const itable_xop09095 = {
+    instrux + 3669,
+    instrux + 3670,
+    instrux + 3671,
+    instrux + 3672,
+};
+
+static const struct itemplate * const itable_xop09096 = {
+    instrux + 3661,
+    instrux + 3662,
+    instrux + 3663,
+    instrux + 3664,
+};
+
+static const struct itemplate * const itable_xop09097 = {
+    instrux + 3665,
+    instrux + 3666,
+    instrux + 3667,
+    instrux + 3668,
+};
+
+static const struct itemplate * const itable_xop09098 = {
+    instrux + 3641,
+    instrux + 3642,
+    instrux + 3643,
+    instrux + 3644,
+};
+
+static const struct itemplate * const itable_xop09099 = {
+    instrux + 3653,
+    instrux + 3654,
+    instrux + 3655,
+    instrux + 3656,
+};
+
+static const struct itemplate * const itable_xop0909A = {
+    instrux + 3645,
+    instrux + 3646,
+    instrux + 3647,
+    instrux + 3648,
+};
+
+static const struct itemplate * const itable_xop0909B = {
+    instrux + 3649,
+    instrux + 3650,
+    instrux + 3651,
+    instrux + 3652,
+};
+
+static const struct itemplate * const itable_xop090C1 = {
+    instrux + 3563,
+    instrux + 3564,
+};
+
+static const struct itemplate * const itable_xop090C2 = {
+    instrux + 3559,
+    instrux + 3560,
+};
+
+static const struct itemplate * const itable_xop090C3 = {
+    instrux + 3561,
+    instrux + 3562,
+};
+
+static const struct itemplate * const itable_xop090C6 = {
+    instrux + 3579,
+    instrux + 3580,
+};
+
+static const struct itemplate * const itable_xop090C7 = {
+    instrux + 3581,
+    instrux + 3582,
+};
+
+static const struct itemplate * const itable_xop090CB = {
+    instrux + 3565,
+    instrux + 3566,
+};
+
+static const struct itemplate * const itable_xop090D1 = {
+    instrux + 3571,
+    instrux + 3572,
+};
+
+static const struct itemplate * const itable_xop090D2 = {
+    instrux + 3567,
+    instrux + 3568,
+};
+
+static const struct itemplate * const itable_xop090D3 = {
+    instrux + 3569,
+    instrux + 3570,
+};
+
+static const struct itemplate * const itable_xop090D6 = {
+    instrux + 3575,
+    instrux + 3576,
+};
+
+static const struct itemplate * const itable_xop090D7 = {
+    instrux + 3577,
+    instrux + 3578,
+};
+
+static const struct itemplate * const itable_xop090DB = {
+    instrux + 3573,
+    instrux + 3574,
+};
+
+static const struct itemplate * const itable_xop090E1 = {
+    instrux + 3583,
+    instrux + 3584,
+};
+
+static const struct itemplate * const itable_xop090E2 = {
+    instrux + 3587,
+    instrux + 3588,
+};
+
+static const struct itemplate * const itable_xop090E3 = {
+    instrux + 3585,
+    instrux + 3586,
+};
+
+static const struct itemplate * const itable_xop0A010 = {
+    instrux + 3991,
+    instrux + 3992,
+};
+
+static const struct itemplate * const itable_xop0A012 = {
+    instrux + 3391,
+    instrux + 3392,
+    instrux + 3393,
+    instrux + 3394,
+};
+
+static const struct disasm_index itable_vex010256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { itable_vex01010, 2 },
+    /* 0x11 */ { itable_vex01011, 2 },
+    /* 0x12 */ { itable_vex01012, 4 },
+    /* 0x13 */ { itable_vex01013, 1 },
+    /* 0x14 */ { itable_vex01014, 4 },
+    /* 0x15 */ { itable_vex01015, 4 },
+    /* 0x16 */ { itable_vex01016, 4 },
+    /* 0x17 */ { itable_vex01017, 1 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { itable_vex01028, 2 },
+    /* 0x29 */ { itable_vex01029, 2 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { itable_vex0102B, 2 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { itable_vex0102E, 1 },
+    /* 0x2f */ { itable_vex0102F, 1 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { itable_vex01041, 2 },
+    /* 0x42 */ { itable_vex01042, 2 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { itable_vex01044, 2 },
+    /* 0x45 */ { itable_vex01045, 2 },
+    /* 0x46 */ { itable_vex01046, 2 },
+    /* 0x47 */ { itable_vex01047, 2 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { itable_vex0104A, 2 },
+    /* 0x4b */ { itable_vex0104B, 2 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { itable_vex01050, 4 },
+    /* 0x51 */ { itable_vex01051, 2 },
+    /* 0x52 */ { itable_vex01052, 2 },
+    /* 0x53 */ { itable_vex01053, 2 },
+    /* 0x54 */ { itable_vex01054, 4 },
+    /* 0x55 */ { itable_vex01055, 4 },
+    /* 0x56 */ { itable_vex01056, 4 },
+    /* 0x57 */ { itable_vex01057, 4 },
+    /* 0x58 */ { itable_vex01058, 4 },
+    /* 0x59 */ { itable_vex01059, 4 },
+    /* 0x5a */ { itable_vex0105A, 2 },
+    /* 0x5b */ { itable_vex0105B, 2 },
+    /* 0x5c */ { itable_vex0105C, 4 },
+    /* 0x5d */ { itable_vex0105D, 4 },
+    /* 0x5e */ { itable_vex0105E, 4 },
+    /* 0x5f */ { itable_vex0105F, 4 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { itable_vex01077, 2 },
+    /* 0x78 */ { NULL, 0 },
+    /* 0x79 */ { NULL, 0 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { itable_vex01090, 2 },
+    /* 0x91 */ { itable_vex01091, 2 },
+    /* 0x92 */ { itable_vex01092, 1 },
+    /* 0x93 */ { itable_vex01093, 1 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { itable_vex01098, 2 },
+    /* 0x99 */ { itable_vex01099, 2 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { itable_vex010AE, 2 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { itable_vex010C2, 188 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { itable_vex010C6, 4 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_vex011256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { itable_vex01110, 2 },
+    /* 0x11 */ { itable_vex01111, 2 },
+    /* 0x12 */ { itable_vex01112, 2 },
+    /* 0x13 */ { itable_vex01113, 1 },
+    /* 0x14 */ { itable_vex01114, 4 },
+    /* 0x15 */ { itable_vex01115, 4 },
+    /* 0x16 */ { itable_vex01116, 2 },
+    /* 0x17 */ { itable_vex01117, 1 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { itable_vex01128, 2 },
+    /* 0x29 */ { itable_vex01129, 2 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { itable_vex0112B, 2 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { itable_vex0112E, 1 },
+    /* 0x2f */ { itable_vex0112F, 1 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { itable_vex01141, 2 },
+    /* 0x42 */ { itable_vex01142, 2 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { itable_vex01144, 2 },
+    /* 0x45 */ { itable_vex01145, 2 },
+    /* 0x46 */ { itable_vex01146, 2 },
+    /* 0x47 */ { itable_vex01147, 2 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { itable_vex0114A, 2 },
+    /* 0x4b */ { itable_vex0114B, 1 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { itable_vex01150, 4 },
+    /* 0x51 */ { itable_vex01151, 2 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { itable_vex01154, 4 },
+    /* 0x55 */ { itable_vex01155, 4 },
+    /* 0x56 */ { itable_vex01156, 4 },
+    /* 0x57 */ { itable_vex01157, 4 },
+    /* 0x58 */ { itable_vex01158, 4 },
+    /* 0x59 */ { itable_vex01159, 4 },
+    /* 0x5a */ { itable_vex0115A, 4 },
+    /* 0x5b */ { itable_vex0115B, 2 },
+    /* 0x5c */ { itable_vex0115C, 4 },
+    /* 0x5d */ { itable_vex0115D, 4 },
+    /* 0x5e */ { itable_vex0115E, 4 },
+    /* 0x5f */ { itable_vex0115F, 4 },
+    /* 0x60 */ { itable_vex01160, 4 },
+    /* 0x61 */ { itable_vex01161, 4 },
+    /* 0x62 */ { itable_vex01162, 4 },
+    /* 0x63 */ { itable_vex01163, 4 },
+    /* 0x64 */ { itable_vex01164, 4 },
+    /* 0x65 */ { itable_vex01165, 4 },
+    /* 0x66 */ { itable_vex01166, 4 },
+    /* 0x67 */ { itable_vex01167, 4 },
+    /* 0x68 */ { itable_vex01168, 4 },
+    /* 0x69 */ { itable_vex01169, 4 },
+    /* 0x6a */ { itable_vex0116A, 4 },
+    /* 0x6b */ { itable_vex0116B, 4 },
+    /* 0x6c */ { itable_vex0116C, 4 },
+    /* 0x6d */ { itable_vex0116D, 4 },
+    /* 0x6e */ { itable_vex0116E, 2 },
+    /* 0x6f */ { itable_vex0116F, 3 },
+    /* 0x70 */ { itable_vex01170, 2 },
+    /* 0x71 */ { itable_vex01171, 12 },
+    /* 0x72 */ { itable_vex01172, 12 },
+    /* 0x73 */ { itable_vex01173, 16 },
+    /* 0x74 */ { itable_vex01174, 4 },
+    /* 0x75 */ { itable_vex01175, 4 },
+    /* 0x76 */ { itable_vex01176, 4 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { NULL, 0 },
+    /* 0x79 */ { NULL, 0 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { itable_vex0117C, 4 },
+    /* 0x7d */ { itable_vex0117D, 4 },
+    /* 0x7e */ { itable_vex0117E, 2 },
+    /* 0x7f */ { itable_vex0117F, 3 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { itable_vex01190, 2 },
+    /* 0x91 */ { itable_vex01191, 2 },
+    /* 0x92 */ { itable_vex01192, 1 },
+    /* 0x93 */ { itable_vex01193, 1 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { itable_vex01198, 2 },
+    /* 0x99 */ { itable_vex01199, 2 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { itable_vex011C2, 188 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { itable_vex011C4, 6 },
+    /* 0xc5 */ { itable_vex011C5, 2 },
+    /* 0xc6 */ { itable_vex011C6, 4 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { itable_vex011D0, 4 },
+    /* 0xd1 */ { itable_vex011D1, 4 },
+    /* 0xd2 */ { itable_vex011D2, 4 },
+    /* 0xd3 */ { itable_vex011D3, 4 },
+    /* 0xd4 */ { itable_vex011D4, 4 },
+    /* 0xd5 */ { itable_vex011D5, 4 },
+    /* 0xd6 */ { itable_vex011D6, 1 },
+    /* 0xd7 */ { itable_vex011D7, 4 },
+    /* 0xd8 */ { itable_vex011D8, 4 },
+    /* 0xd9 */ { itable_vex011D9, 4 },
+    /* 0xda */ { itable_vex011DA, 4 },
+    /* 0xdb */ { itable_vex011DB, 4 },
+    /* 0xdc */ { itable_vex011DC, 4 },
+    /* 0xdd */ { itable_vex011DD, 4 },
+    /* 0xde */ { itable_vex011DE, 4 },
+    /* 0xdf */ { itable_vex011DF, 4 },
+    /* 0xe0 */ { itable_vex011E0, 4 },
+    /* 0xe1 */ { itable_vex011E1, 4 },
+    /* 0xe2 */ { itable_vex011E2, 4 },
+    /* 0xe3 */ { itable_vex011E3, 4 },
+    /* 0xe4 */ { itable_vex011E4, 4 },
+    /* 0xe5 */ { itable_vex011E5, 4 },
+    /* 0xe6 */ { itable_vex011E6, 4 },
+    /* 0xe7 */ { itable_vex011E7, 3 },
+    /* 0xe8 */ { itable_vex011E8, 4 },
+    /* 0xe9 */ { itable_vex011E9, 4 },
+    /* 0xea */ { itable_vex011EA, 4 },
+    /* 0xeb */ { itable_vex011EB, 4 },
+    /* 0xec */ { itable_vex011EC, 4 },
+    /* 0xed */ { itable_vex011ED, 4 },
+    /* 0xee */ { itable_vex011EE, 4 },
+    /* 0xef */ { itable_vex011EF, 4 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { itable_vex011F1, 4 },
+    /* 0xf2 */ { itable_vex011F2, 4 },
+    /* 0xf3 */ { itable_vex011F3, 4 },
+    /* 0xf4 */ { itable_vex011F4, 4 },
+    /* 0xf5 */ { itable_vex011F5, 4 },
+    /* 0xf6 */ { itable_vex011F6, 4 },
+    /* 0xf7 */ { itable_vex011F7, 1 },
+    /* 0xf8 */ { itable_vex011F8, 4 },
+    /* 0xf9 */ { itable_vex011F9, 4 },
+    /* 0xfa */ { itable_vex011FA, 4 },
+    /* 0xfb */ { itable_vex011FB, 4 },
+    /* 0xfc */ { itable_vex011FC, 4 },
+    /* 0xfd */ { itable_vex011FD, 4 },
+    /* 0xfe */ { itable_vex011FE, 4 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_vex012256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { itable_vex01210, 3 },
+    /* 0x11 */ { itable_vex01211, 3 },
+    /* 0x12 */ { itable_vex01212, 2 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { NULL, 0 },
+    /* 0x15 */ { NULL, 0 },
+    /* 0x16 */ { itable_vex01216, 2 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { itable_vex0122A, 4 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { itable_vex0122C, 2 },
+    /* 0x2d */ { itable_vex0122D, 2 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { itable_vex01251, 2 },
+    /* 0x52 */ { itable_vex01252, 2 },
+    /* 0x53 */ { itable_vex01253, 2 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { itable_vex01258, 2 },
+    /* 0x59 */ { itable_vex01259, 2 },
+    /* 0x5a */ { itable_vex0125A, 2 },
+    /* 0x5b */ { itable_vex0125B, 2 },
+    /* 0x5c */ { itable_vex0125C, 2 },
+    /* 0x5d */ { itable_vex0125D, 2 },
+    /* 0x5e */ { itable_vex0125E, 2 },
+    /* 0x5f */ { itable_vex0125F, 2 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { itable_vex0126F, 3 },
+    /* 0x70 */ { itable_vex01270, 2 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { NULL, 0 },
+    /* 0x79 */ { NULL, 0 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { itable_vex0127E, 1 },
+    /* 0x7f */ { itable_vex0127F, 3 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { itable_vex012C2, 94 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { itable_vex012E6, 2 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_vex013256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { itable_vex01310, 3 },
+    /* 0x11 */ { itable_vex01311, 3 },
+    /* 0x12 */ { itable_vex01312, 2 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { NULL, 0 },
+    /* 0x15 */ { NULL, 0 },
+    /* 0x16 */ { NULL, 0 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { itable_vex0132A, 4 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { itable_vex0132C, 2 },
+    /* 0x2d */ { itable_vex0132D, 2 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { itable_vex01351, 2 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { itable_vex01358, 2 },
+    /* 0x59 */ { itable_vex01359, 2 },
+    /* 0x5a */ { itable_vex0135A, 2 },
+    /* 0x5b */ { NULL, 0 },
+    /* 0x5c */ { itable_vex0135C, 2 },
+    /* 0x5d */ { itable_vex0135D, 2 },
+    /* 0x5e */ { itable_vex0135E, 2 },
+    /* 0x5f */ { itable_vex0135F, 2 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { itable_vex01370, 2 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { NULL, 0 },
+    /* 0x79 */ { NULL, 0 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { itable_vex0137C, 4 },
+    /* 0x7d */ { itable_vex0137D, 4 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { itable_vex01392, 2 },
+    /* 0x93 */ { itable_vex01393, 2 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { itable_vex013C2, 94 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { itable_vex013D0, 4 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { itable_vex013E6, 4 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { itable_vex013F0, 3 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_vex020256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { NULL, 0 },
+    /* 0x11 */ { NULL, 0 },
+    /* 0x12 */ { NULL, 0 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { NULL, 0 },
+    /* 0x15 */ { NULL, 0 },
+    /* 0x16 */ { NULL, 0 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { itable_vex02049, 2 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { itable_vex02050, 2 },
+    /* 0x51 */ { itable_vex02051, 2 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { NULL, 0 },
+    /* 0x59 */ { NULL, 0 },
+    /* 0x5a */ { NULL, 0 },
+    /* 0x5b */ { NULL, 0 },
+    /* 0x5c */ { NULL, 0 },
+    /* 0x5d */ { NULL, 0 },
+    /* 0x5e */ { itable_vex0205E, 1 },
+    /* 0x5f */ { NULL, 0 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { NULL, 0 },
+    /* 0x79 */ { NULL, 0 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { itable_vex020B0, 2 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { NULL, 0 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { itable_vex020DA, 1 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { itable_vex020F2, 2 },
+    /* 0xf3 */ { itable_vex020F3, 6 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { itable_vex020F5, 2 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { itable_vex020F7, 2 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_vex021256 = {
+    /* 0x00 */ { itable_vex02100, 4 },
+    /* 0x01 */ { itable_vex02101, 4 },
+    /* 0x02 */ { itable_vex02102, 4 },
+    /* 0x03 */ { itable_vex02103, 4 },
+    /* 0x04 */ { itable_vex02104, 4 },
+    /* 0x05 */ { itable_vex02105, 4 },
+    /* 0x06 */ { itable_vex02106, 4 },
+    /* 0x07 */ { itable_vex02107, 4 },
+    /* 0x08 */ { itable_vex02108, 4 },
+    /* 0x09 */ { itable_vex02109, 4 },
+    /* 0x0a */ { itable_vex0210A, 4 },
+    /* 0x0b */ { itable_vex0210B, 4 },
+    /* 0x0c */ { itable_vex0210C, 4 },
+    /* 0x0d */ { itable_vex0210D, 4 },
+    /* 0x0e */ { itable_vex0210E, 2 },
+    /* 0x0f */ { itable_vex0210F, 2 },
+    /* 0x10 */ { NULL, 0 },
+    /* 0x11 */ { NULL, 0 },
+    /* 0x12 */ { NULL, 0 },
+    /* 0x13 */ { itable_vex02113, 4 },
+    /* 0x14 */ { NULL, 0 },
+    /* 0x15 */ { NULL, 0 },
+    /* 0x16 */ { itable_vex02116, 2 },
+    /* 0x17 */ { itable_vex02117, 2 },
+    /* 0x18 */ { itable_vex02118, 4 },
+    /* 0x19 */ { itable_vex02119, 2 },
+    /* 0x1a */ { itable_vex0211A, 1 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { itable_vex0211C, 2 },
+    /* 0x1d */ { itable_vex0211D, 2 },
+    /* 0x1e */ { itable_vex0211E, 2 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { itable_vex02120, 2 },
+    /* 0x21 */ { itable_vex02121, 3 },
+    /* 0x22 */ { itable_vex02122, 3 },
+    /* 0x23 */ { itable_vex02123, 2 },
+    /* 0x24 */ { itable_vex02124, 3 },
+    /* 0x25 */ { itable_vex02125, 2 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { itable_vex02128, 4 },
+    /* 0x29 */ { itable_vex02129, 4 },
+    /* 0x2a */ { itable_vex0212A, 2 },
+    /* 0x2b */ { itable_vex0212B, 4 },
+    /* 0x2c */ { itable_vex0212C, 2 },
+    /* 0x2d */ { itable_vex0212D, 2 },
+    /* 0x2e */ { itable_vex0212E, 2 },
+    /* 0x2f */ { itable_vex0212F, 2 },
+    /* 0x30 */ { itable_vex02130, 2 },
+    /* 0x31 */ { itable_vex02131, 3 },
+    /* 0x32 */ { itable_vex02132, 3 },
+    /* 0x33 */ { itable_vex02133, 2 },
+    /* 0x34 */ { itable_vex02134, 3 },
+    /* 0x35 */ { itable_vex02135, 2 },
+    /* 0x36 */ { itable_vex02136, 2 },
+    /* 0x37 */ { itable_vex02137, 4 },
+    /* 0x38 */ { itable_vex02138, 4 },
+    /* 0x39 */ { itable_vex02139, 4 },
+    /* 0x3a */ { itable_vex0213A, 4 },
+    /* 0x3b */ { itable_vex0213B, 4 },
+    /* 0x3c */ { itable_vex0213C, 4 },
+    /* 0x3d */ { itable_vex0213D, 4 },
+    /* 0x3e */ { itable_vex0213E, 4 },
+    /* 0x3f */ { itable_vex0213F, 4 },
+    /* 0x40 */ { itable_vex02140, 4 },
+    /* 0x41 */ { itable_vex02141, 1 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { itable_vex02145, 8 },
+    /* 0x46 */ { itable_vex02146, 4 },
+    /* 0x47 */ { itable_vex02147, 8 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { itable_vex02149, 1 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { itable_vex0214B, 1 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { NULL, 0 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { itable_vex02158, 4 },
+    /* 0x59 */ { itable_vex02159, 4 },
+    /* 0x5a */ { itable_vex0215A, 1 },
+    /* 0x5b */ { NULL, 0 },
+    /* 0x5c */ { NULL, 0 },
+    /* 0x5d */ { NULL, 0 },
+    /* 0x5e */ { itable_vex0215E, 1 },
+    /* 0x5f */ { NULL, 0 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { itable_vex02178, 4 },
+    /* 0x79 */ { itable_vex02179, 4 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { itable_vex0218C, 8 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { itable_vex0218E, 8 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { itable_vex02190, 4 },
+    /* 0x91 */ { itable_vex02191, 4 },
+    /* 0x92 */ { itable_vex02192, 4 },
+    /* 0x93 */ { itable_vex02193, 4 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { itable_vex02196, 8 },
+    /* 0x97 */ { itable_vex02197, 8 },
+    /* 0x98 */ { itable_vex02198, 8 },
+    /* 0x99 */ { itable_vex02199, 4 },
+    /* 0x9a */ { itable_vex0219A, 8 },
+    /* 0x9b */ { itable_vex0219B, 4 },
+    /* 0x9c */ { itable_vex0219C, 8 },
+    /* 0x9d */ { itable_vex0219D, 4 },
+    /* 0x9e */ { itable_vex0219E, 8 },
+    /* 0x9f */ { itable_vex0219F, 4 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { itable_vex021A6, 8 },
+    /* 0xa7 */ { itable_vex021A7, 8 },
+    /* 0xa8 */ { itable_vex021A8, 8 },
+    /* 0xa9 */ { itable_vex021A9, 4 },
+    /* 0xaa */ { itable_vex021AA, 8 },
+    /* 0xab */ { itable_vex021AB, 4 },
+    /* 0xac */ { itable_vex021AC, 8 },
+    /* 0xad */ { itable_vex021AD, 4 },
+    /* 0xae */ { itable_vex021AE, 8 },
+    /* 0xaf */ { itable_vex021AF, 4 },
+    /* 0xb0 */ { itable_vex021B0, 2 },
+    /* 0xb1 */ { itable_vex021B1, 2 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { itable_vex021B4, 2 },
+    /* 0xb5 */ { itable_vex021B5, 2 },
+    /* 0xb6 */ { itable_vex021B6, 8 },
+    /* 0xb7 */ { itable_vex021B7, 8 },
+    /* 0xb8 */ { itable_vex021B8, 8 },
+    /* 0xb9 */ { itable_vex021B9, 4 },
+    /* 0xba */ { itable_vex021BA, 8 },
+    /* 0xbb */ { itable_vex021BB, 4 },
+    /* 0xbc */ { itable_vex021BC, 8 },
+    /* 0xbd */ { itable_vex021BD, 4 },
+    /* 0xbe */ { itable_vex021BE, 8 },
+    /* 0xbf */ { itable_vex021BF, 4 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { NULL, 0 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { itable_vex021CF, 4 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { itable_vex021DA, 1 },
+    /* 0xdb */ { itable_vex021DB, 1 },
+    /* 0xdc */ { itable_vex021DC, 4 },
+    /* 0xdd */ { itable_vex021DD, 4 },
+    /* 0xde */ { itable_vex021DE, 4 },
+    /* 0xdf */ { itable_vex021DF, 4 },
+    /* 0xe0 */ { itable_vex021E0, 2 },
+    /* 0xe1 */ { itable_vex021E1, 2 },
+    /* 0xe2 */ { itable_vex021E2, 2 },
+    /* 0xe3 */ { itable_vex021E3, 2 },
+    /* 0xe4 */ { itable_vex021E4, 2 },
+    /* 0xe5 */ { itable_vex021E5, 2 },
+    /* 0xe6 */ { itable_vex021E6, 2 },
+    /* 0xe7 */ { itable_vex021E7, 2 },
+    /* 0xe8 */ { itable_vex021E8, 2 },
+    /* 0xe9 */ { itable_vex021E9, 2 },
+    /* 0xea */ { itable_vex021EA, 2 },
+    /* 0xeb */ { itable_vex021EB, 2 },
+    /* 0xec */ { itable_vex021EC, 2 },
+    /* 0xed */ { itable_vex021ED, 2 },
+    /* 0xee */ { itable_vex021EE, 2 },
+    /* 0xef */ { itable_vex021EF, 2 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { itable_vex021F7, 2 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_vex022256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { NULL, 0 },
+    /* 0x11 */ { NULL, 0 },
+    /* 0x12 */ { NULL, 0 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { NULL, 0 },
+    /* 0x15 */ { NULL, 0 },
+    /* 0x16 */ { NULL, 0 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { itable_vex0224B, 1 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { itable_vex02250, 2 },
+    /* 0x51 */ { itable_vex02251, 2 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { NULL, 0 },
+    /* 0x59 */ { NULL, 0 },
+    /* 0x5a */ { NULL, 0 },
+    /* 0x5b */ { NULL, 0 },
+    /* 0x5c */ { itable_vex0225C, 1 },
+    /* 0x5d */ { NULL, 0 },
+    /* 0x5e */ { itable_vex0225E, 1 },
+    /* 0x5f */ { NULL, 0 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { itable_vex02272, 2 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { NULL, 0 },
+    /* 0x79 */ { NULL, 0 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { itable_vex022B0, 2 },
+    /* 0xb1 */ { itable_vex022B1, 2 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { NULL, 0 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { itable_vex022DA, 2 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { itable_vex022F5, 2 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { itable_vex022F7, 2 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_vex023256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { NULL, 0 },
+    /* 0x11 */ { NULL, 0 },
+    /* 0x12 */ { NULL, 0 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { NULL, 0 },
+    /* 0x15 */ { NULL, 0 },
+    /* 0x16 */ { NULL, 0 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { itable_vex02349, 1 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { itable_vex0234B, 1 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { itable_vex02350, 2 },
+    /* 0x51 */ { itable_vex02351, 2 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { NULL, 0 },
+    /* 0x59 */ { NULL, 0 },
+    /* 0x5a */ { NULL, 0 },
+    /* 0x5b */ { NULL, 0 },
+    /* 0x5c */ { NULL, 0 },
+    /* 0x5d */ { NULL, 0 },
+    /* 0x5e */ { itable_vex0235E, 1 },
+    /* 0x5f */ { NULL, 0 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { NULL, 0 },
+    /* 0x79 */ { NULL, 0 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { itable_vex023B0, 2 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { NULL, 0 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { itable_vex023CB, 1 },
+    /* 0xcc */ { itable_vex023CC, 1 },
+    /* 0xcd */ { itable_vex023CD, 1 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { itable_vex023DA, 2 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { itable_vex023F5, 2 },
+    /* 0xf6 */ { itable_vex023F6, 2 },
+    /* 0xf7 */ { itable_vex023F7, 2 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_vex031256 = {
+    /* 0x00 */ { itable_vex03100, 1 },
+    /* 0x01 */ { itable_vex03101, 1 },
+    /* 0x02 */ { itable_vex03102, 4 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { itable_vex03104, 2 },
+    /* 0x05 */ { itable_vex03105, 2 },
+    /* 0x06 */ { itable_vex03106, 2 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { itable_vex03108, 2 },
+    /* 0x09 */ { itable_vex03109, 2 },
+    /* 0x0a */ { itable_vex0310A, 2 },
+    /* 0x0b */ { itable_vex0310B, 2 },
+    /* 0x0c */ { itable_vex0310C, 4 },
+    /* 0x0d */ { itable_vex0310D, 4 },
+    /* 0x0e */ { itable_vex0310E, 4 },
+    /* 0x0f */ { itable_vex0310F, 4 },
+    /* 0x10 */ { NULL, 0 },
+    /* 0x11 */ { NULL, 0 },
+    /* 0x12 */ { NULL, 0 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { itable_vex03114, 3 },
+    /* 0x15 */ { itable_vex03115, 3 },
+    /* 0x16 */ { itable_vex03116, 3 },
+    /* 0x17 */ { itable_vex03117, 1 },
+    /* 0x18 */ { itable_vex03118, 2 },
+    /* 0x19 */ { itable_vex03119, 1 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { itable_vex0311D, 4 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { itable_vex03120, 6 },
+    /* 0x21 */ { itable_vex03121, 2 },
+    /* 0x22 */ { itable_vex03122, 8 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { itable_vex03130, 2 },
+    /* 0x31 */ { itable_vex03131, 2 },
+    /* 0x32 */ { itable_vex03132, 2 },
+    /* 0x33 */ { itable_vex03133, 2 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { itable_vex03138, 2 },
+    /* 0x39 */ { itable_vex03139, 1 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { itable_vex03140, 4 },
+    /* 0x41 */ { itable_vex03141, 2 },
+    /* 0x42 */ { itable_vex03142, 4 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { itable_vex03144, 20 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { itable_vex03146, 2 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { itable_vex0314A, 4 },
+    /* 0x4b */ { itable_vex0314B, 4 },
+    /* 0x4c */ { itable_vex0314C, 4 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { NULL, 0 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { NULL, 0 },
+    /* 0x59 */ { NULL, 0 },
+    /* 0x5a */ { NULL, 0 },
+    /* 0x5b */ { NULL, 0 },
+    /* 0x5c */ { itable_vex0315C, 8 },
+    /* 0x5d */ { itable_vex0315D, 8 },
+    /* 0x5e */ { itable_vex0315E, 8 },
+    /* 0x5f */ { itable_vex0315F, 8 },
+    /* 0x60 */ { itable_vex03160, 1 },
+    /* 0x61 */ { itable_vex03161, 1 },
+    /* 0x62 */ { itable_vex03162, 1 },
+    /* 0x63 */ { itable_vex03163, 1 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { itable_vex03168, 8 },
+    /* 0x69 */ { itable_vex03169, 8 },
+    /* 0x6a */ { itable_vex0316A, 4 },
+    /* 0x6b */ { itable_vex0316B, 4 },
+    /* 0x6c */ { itable_vex0316C, 8 },
+    /* 0x6d */ { itable_vex0316D, 8 },
+    /* 0x6e */ { itable_vex0316E, 4 },
+    /* 0x6f */ { itable_vex0316F, 4 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { itable_vex03178, 8 },
+    /* 0x79 */ { itable_vex03179, 8 },
+    /* 0x7a */ { itable_vex0317A, 4 },
+    /* 0x7b */ { itable_vex0317B, 4 },
+    /* 0x7c */ { itable_vex0317C, 8 },
+    /* 0x7d */ { itable_vex0317D, 8 },
+    /* 0x7e */ { itable_vex0317E, 4 },
+    /* 0x7f */ { itable_vex0317F, 4 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { NULL, 0 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { itable_vex031CE, 4 },
+    /* 0xcf */ { itable_vex031CF, 4 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { itable_vex031DE, 1 },
+    /* 0xdf */ { itable_vex031DF, 1 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_vex033256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { NULL, 0 },
+    /* 0x11 */ { NULL, 0 },
+    /* 0x12 */ { NULL, 0 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { NULL, 0 },
+    /* 0x15 */ { NULL, 0 },
+    /* 0x16 */ { NULL, 0 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { NULL, 0 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { NULL, 0 },
+    /* 0x59 */ { NULL, 0 },
+    /* 0x5a */ { NULL, 0 },
+    /* 0x5b */ { NULL, 0 },
+    /* 0x5c */ { NULL, 0 },
+    /* 0x5d */ { NULL, 0 },
+    /* 0x5e */ { NULL, 0 },
+    /* 0x5f */ { NULL, 0 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { NULL, 0 },
+    /* 0x79 */ { NULL, 0 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { NULL, 0 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { itable_vex033F0, 2 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_xop080256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { NULL, 0 },
+    /* 0x11 */ { NULL, 0 },
+    /* 0x12 */ { NULL, 0 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { NULL, 0 },
+    /* 0x15 */ { NULL, 0 },
+    /* 0x16 */ { NULL, 0 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { NULL, 0 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { NULL, 0 },
+    /* 0x59 */ { NULL, 0 },
+    /* 0x5a */ { NULL, 0 },
+    /* 0x5b */ { NULL, 0 },
+    /* 0x5c */ { NULL, 0 },
+    /* 0x5d */ { NULL, 0 },
+    /* 0x5e */ { NULL, 0 },
+    /* 0x5f */ { NULL, 0 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { NULL, 0 },
+    /* 0x79 */ { NULL, 0 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { itable_xop08085, 2 },
+    /* 0x86 */ { itable_xop08086, 2 },
+    /* 0x87 */ { itable_xop08087, 2 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { itable_xop0808E, 2 },
+    /* 0x8f */ { itable_xop0808F, 2 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { itable_xop08095, 2 },
+    /* 0x96 */ { itable_xop08096, 2 },
+    /* 0x97 */ { itable_xop08097, 2 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { itable_xop0809E, 2 },
+    /* 0x9f */ { itable_xop0809F, 2 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { itable_xop080A2, 8 },
+    /* 0xa3 */ { itable_xop080A3, 4 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { itable_xop080A6, 2 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { itable_xop080B6, 2 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { itable_xop080C0, 2 },
+    /* 0xc1 */ { itable_xop080C1, 2 },
+    /* 0xc2 */ { itable_xop080C2, 2 },
+    /* 0xc3 */ { itable_xop080C3, 2 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { itable_xop080CC, 2 },
+    /* 0xcd */ { itable_xop080CD, 2 },
+    /* 0xce */ { itable_xop080CE, 2 },
+    /* 0xcf */ { itable_xop080CF, 2 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { itable_xop080EC, 2 },
+    /* 0xed */ { itable_xop080ED, 2 },
+    /* 0xee */ { itable_xop080EE, 2 },
+    /* 0xef */ { itable_xop080EF, 2 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_xop090256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { itable_xop09001, 14 },
+    /* 0x02 */ { itable_xop09002, 4 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { NULL, 0 },
+    /* 0x11 */ { NULL, 0 },
+    /* 0x12 */ { itable_xop09012, 4 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { NULL, 0 },
+    /* 0x15 */ { NULL, 0 },
+    /* 0x16 */ { NULL, 0 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { NULL, 0 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { NULL, 0 },
+    /* 0x59 */ { NULL, 0 },
+    /* 0x5a */ { NULL, 0 },
+    /* 0x5b */ { NULL, 0 },
+    /* 0x5c */ { NULL, 0 },
+    /* 0x5d */ { NULL, 0 },
+    /* 0x5e */ { NULL, 0 },
+    /* 0x5f */ { NULL, 0 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { NULL, 0 },
+    /* 0x79 */ { NULL, 0 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { itable_xop09080, 4 },
+    /* 0x81 */ { itable_xop09081, 4 },
+    /* 0x82 */ { itable_xop09082, 2 },
+    /* 0x83 */ { itable_xop09083, 2 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { itable_xop09090, 4 },
+    /* 0x91 */ { itable_xop09091, 4 },
+    /* 0x92 */ { itable_xop09092, 4 },
+    /* 0x93 */ { itable_xop09093, 4 },
+    /* 0x94 */ { itable_xop09094, 4 },
+    /* 0x95 */ { itable_xop09095, 4 },
+    /* 0x96 */ { itable_xop09096, 4 },
+    /* 0x97 */ { itable_xop09097, 4 },
+    /* 0x98 */ { itable_xop09098, 4 },
+    /* 0x99 */ { itable_xop09099, 4 },
+    /* 0x9a */ { itable_xop0909A, 4 },
+    /* 0x9b */ { itable_xop0909B, 4 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { itable_xop090C1, 2 },
+    /* 0xc2 */ { itable_xop090C2, 2 },
+    /* 0xc3 */ { itable_xop090C3, 2 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { itable_xop090C6, 2 },
+    /* 0xc7 */ { itable_xop090C7, 2 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { itable_xop090CB, 2 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { itable_xop090D1, 2 },
+    /* 0xd2 */ { itable_xop090D2, 2 },
+    /* 0xd3 */ { itable_xop090D3, 2 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { itable_xop090D6, 2 },
+    /* 0xd7 */ { itable_xop090D7, 2 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { itable_xop090DB, 2 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { itable_xop090E1, 2 },
+    /* 0xe2 */ { itable_xop090E2, 2 },
+    /* 0xe3 */ { itable_xop090E3, 2 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_xop0A0256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { itable_xop0A010, 2 },
+    /* 0x11 */ { NULL, 0 },
+    /* 0x12 */ { itable_xop0A012, 4 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { NULL, 0 },
+    /* 0x15 */ { NULL, 0 },
+    /* 0x16 */ { NULL, 0 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { NULL, 0 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { NULL, 0 },
+    /* 0x59 */ { NULL, 0 },
+    /* 0x5a */ { NULL, 0 },
+    /* 0x5b */ { NULL, 0 },
+    /* 0x5c */ { NULL, 0 },
+    /* 0x5d */ { NULL, 0 },
+    /* 0x5e */ { NULL, 0 },
+    /* 0x5f */ { NULL, 0 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { NULL, 0 },
+    /* 0x79 */ { NULL, 0 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { NULL, 0 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_evex010256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { itable_evex01010, 3 },
+    /* 0x11 */ { itable_evex01011, 6 },
+    /* 0x12 */ { itable_evex01012, 4 },
+    /* 0x13 */ { itable_evex01013, 1 },
+    /* 0x14 */ { itable_evex01014, 6 },
+    /* 0x15 */ { itable_evex01015, 6 },
+    /* 0x16 */ { itable_evex01016, 4 },
+    /* 0x17 */ { itable_evex01017, 1 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { itable_evex01028, 3 },
+    /* 0x29 */ { itable_evex01029, 6 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { itable_evex0102B, 3 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { itable_evex0102E, 1 },
+    /* 0x2f */ { itable_evex0102F, 1 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { itable_evex01051, 3 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { itable_evex01054, 6 },
+    /* 0x55 */ { itable_evex01055, 6 },
+    /* 0x56 */ { itable_evex01056, 6 },
+    /* 0x57 */ { itable_evex01057, 6 },
+    /* 0x58 */ { itable_evex01058, 6 },
+    /* 0x59 */ { itable_evex01059, 6 },
+    /* 0x5a */ { itable_evex0105A, 3 },
+    /* 0x5b */ { itable_evex0105B, 6 },
+    /* 0x5c */ { itable_evex0105C, 6 },
+    /* 0x5d */ { itable_evex0105D, 6 },
+    /* 0x5e */ { itable_evex0105E, 6 },
+    /* 0x5f */ { itable_evex0105F, 6 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { itable_evex01078, 6 },
+    /* 0x79 */ { itable_evex01079, 6 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { itable_evex010C2, 141 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { itable_evex010C6, 6 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_evex011256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { itable_evex01110, 3 },
+    /* 0x11 */ { itable_evex01111, 6 },
+    /* 0x12 */ { itable_evex01112, 2 },
+    /* 0x13 */ { itable_evex01113, 1 },
+    /* 0x14 */ { itable_evex01114, 6 },
+    /* 0x15 */ { itable_evex01115, 6 },
+    /* 0x16 */ { itable_evex01116, 2 },
+    /* 0x17 */ { itable_evex01117, 1 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { itable_evex01128, 3 },
+    /* 0x29 */ { itable_evex01129, 6 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { itable_evex0112B, 3 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { itable_evex0112E, 1 },
+    /* 0x2f */ { itable_evex0112F, 1 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { itable_evex01151, 3 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { itable_evex01154, 6 },
+    /* 0x55 */ { itable_evex01155, 6 },
+    /* 0x56 */ { itable_evex01156, 6 },
+    /* 0x57 */ { itable_evex01157, 6 },
+    /* 0x58 */ { itable_evex01158, 6 },
+    /* 0x59 */ { itable_evex01159, 6 },
+    /* 0x5a */ { itable_evex0115A, 3 },
+    /* 0x5b */ { itable_evex0115B, 3 },
+    /* 0x5c */ { itable_evex0115C, 6 },
+    /* 0x5d */ { itable_evex0115D, 6 },
+    /* 0x5e */ { itable_evex0115E, 6 },
+    /* 0x5f */ { itable_evex0115F, 6 },
+    /* 0x60 */ { itable_evex01160, 6 },
+    /* 0x61 */ { itable_evex01161, 6 },
+    /* 0x62 */ { itable_evex01162, 6 },
+    /* 0x63 */ { itable_evex01163, 6 },
+    /* 0x64 */ { itable_evex01164, 3 },
+    /* 0x65 */ { itable_evex01165, 3 },
+    /* 0x66 */ { itable_evex01166, 3 },
+    /* 0x67 */ { itable_evex01167, 6 },
+    /* 0x68 */ { itable_evex01168, 6 },
+    /* 0x69 */ { itable_evex01169, 6 },
+    /* 0x6a */ { itable_evex0116A, 6 },
+    /* 0x6b */ { itable_evex0116B, 6 },
+    /* 0x6c */ { itable_evex0116C, 6 },
+    /* 0x6d */ { itable_evex0116D, 6 },
+    /* 0x6e */ { itable_evex0116E, 2 },
+    /* 0x6f */ { itable_evex0116F, 6 },
+    /* 0x70 */ { itable_evex01170, 3 },
+    /* 0x71 */ { itable_evex01171, 18 },
+    /* 0x72 */ { itable_evex01172, 48 },
+    /* 0x73 */ { itable_evex01173, 24 },
+    /* 0x74 */ { itable_evex01174, 3 },
+    /* 0x75 */ { itable_evex01175, 3 },
+    /* 0x76 */ { itable_evex01176, 3 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { itable_evex01178, 6 },
+    /* 0x79 */ { itable_evex01179, 6 },
+    /* 0x7a */ { itable_evex0117A, 6 },
+    /* 0x7b */ { itable_evex0117B, 6 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { itable_evex0117E, 2 },
+    /* 0x7f */ { itable_evex0117F, 6 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { itable_evex011C2, 141 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { itable_evex011C4, 4 },
+    /* 0xc5 */ { itable_evex011C5, 3 },
+    /* 0xc6 */ { itable_evex011C6, 6 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { itable_evex011D1, 6 },
+    /* 0xd2 */ { itable_evex011D2, 6 },
+    /* 0xd3 */ { itable_evex011D3, 6 },
+    /* 0xd4 */ { itable_evex011D4, 6 },
+    /* 0xd5 */ { itable_evex011D5, 6 },
+    /* 0xd6 */ { itable_evex011D6, 1 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { itable_evex011D8, 6 },
+    /* 0xd9 */ { itable_evex011D9, 6 },
+    /* 0xda */ { itable_evex011DA, 6 },
+    /* 0xdb */ { itable_evex011DB, 12 },
+    /* 0xdc */ { itable_evex011DC, 6 },
+    /* 0xdd */ { itable_evex011DD, 6 },
+    /* 0xde */ { itable_evex011DE, 6 },
+    /* 0xdf */ { itable_evex011DF, 12 },
+    /* 0xe0 */ { itable_evex011E0, 6 },
+    /* 0xe1 */ { itable_evex011E1, 6 },
+    /* 0xe2 */ { itable_evex011E2, 12 },
+    /* 0xe3 */ { itable_evex011E3, 6 },
+    /* 0xe4 */ { itable_evex011E4, 6 },
+    /* 0xe5 */ { itable_evex011E5, 6 },
+    /* 0xe6 */ { itable_evex011E6, 3 },
+    /* 0xe7 */ { itable_evex011E7, 3 },
+    /* 0xe8 */ { itable_evex011E8, 6 },
+    /* 0xe9 */ { itable_evex011E9, 6 },
+    /* 0xea */ { itable_evex011EA, 6 },
+    /* 0xeb */ { itable_evex011EB, 12 },
+    /* 0xec */ { itable_evex011EC, 6 },
+    /* 0xed */ { itable_evex011ED, 6 },
+    /* 0xee */ { itable_evex011EE, 6 },
+    /* 0xef */ { itable_evex011EF, 12 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { itable_evex011F1, 6 },
+    /* 0xf2 */ { itable_evex011F2, 6 },
+    /* 0xf3 */ { itable_evex011F3, 6 },
+    /* 0xf4 */ { itable_evex011F4, 6 },
+    /* 0xf5 */ { itable_evex011F5, 6 },
+    /* 0xf6 */ { itable_evex011F6, 6 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { itable_evex011F8, 6 },
+    /* 0xf9 */ { itable_evex011F9, 6 },
+    /* 0xfa */ { itable_evex011FA, 6 },
+    /* 0xfb */ { itable_evex011FB, 6 },
+    /* 0xfc */ { itable_evex011FC, 6 },
+    /* 0xfd */ { itable_evex011FD, 6 },
+    /* 0xfe */ { itable_evex011FE, 6 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_evex012256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { itable_evex01210, 3 },
+    /* 0x11 */ { itable_evex01211, 3 },
+    /* 0x12 */ { itable_evex01212, 3 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { NULL, 0 },
+    /* 0x15 */ { NULL, 0 },
+    /* 0x16 */ { itable_evex01216, 3 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { itable_evex0122A, 2 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { itable_evex0122C, 2 },
+    /* 0x2d */ { itable_evex0122D, 2 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { itable_evex01251, 2 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { itable_evex01258, 2 },
+    /* 0x59 */ { itable_evex01259, 2 },
+    /* 0x5a */ { itable_evex0125A, 1 },
+    /* 0x5b */ { itable_evex0125B, 3 },
+    /* 0x5c */ { itable_evex0125C, 2 },
+    /* 0x5d */ { itable_evex0125D, 2 },
+    /* 0x5e */ { itable_evex0125E, 2 },
+    /* 0x5f */ { itable_evex0125F, 2 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { itable_evex0126F, 6 },
+    /* 0x70 */ { itable_evex01270, 3 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { itable_evex01278, 2 },
+    /* 0x79 */ { itable_evex01279, 2 },
+    /* 0x7a */ { itable_evex0127A, 6 },
+    /* 0x7b */ { itable_evex0127B, 2 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { itable_evex0127E, 1 },
+    /* 0x7f */ { itable_evex0127F, 6 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { itable_evex012C2, 47 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { itable_evex012E6, 6 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_evex013256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { itable_evex01310, 3 },
+    /* 0x11 */ { itable_evex01311, 3 },
+    /* 0x12 */ { itable_evex01312, 3 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { NULL, 0 },
+    /* 0x15 */ { NULL, 0 },
+    /* 0x16 */ { NULL, 0 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { itable_evex0132A, 2 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { itable_evex0132C, 2 },
+    /* 0x2d */ { itable_evex0132D, 2 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { itable_evex01351, 2 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { itable_evex01358, 2 },
+    /* 0x59 */ { itable_evex01359, 2 },
+    /* 0x5a */ { itable_evex0135A, 1 },
+    /* 0x5b */ { NULL, 0 },
+    /* 0x5c */ { itable_evex0135C, 2 },
+    /* 0x5d */ { itable_evex0135D, 2 },
+    /* 0x5e */ { itable_evex0135E, 2 },
+    /* 0x5f */ { itable_evex0135F, 2 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { itable_evex0136F, 6 },
+    /* 0x70 */ { itable_evex01370, 3 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { itable_evex01378, 2 },
+    /* 0x79 */ { itable_evex01379, 2 },
+    /* 0x7a */ { itable_evex0137A, 6 },
+    /* 0x7b */ { itable_evex0137B, 2 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { itable_evex0137F, 6 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { itable_evex013C2, 47 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { itable_evex013E6, 3 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_evex021256 = {
+    /* 0x00 */ { itable_evex02100, 6 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { itable_evex02104, 6 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { itable_evex0210B, 6 },
+    /* 0x0c */ { itable_evex0210C, 6 },
+    /* 0x0d */ { itable_evex0210D, 6 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { itable_evex02110, 6 },
+    /* 0x11 */ { itable_evex02111, 6 },
+    /* 0x12 */ { itable_evex02112, 6 },
+    /* 0x13 */ { itable_evex02113, 6 },
+    /* 0x14 */ { itable_evex02114, 12 },
+    /* 0x15 */ { itable_evex02115, 12 },
+    /* 0x16 */ { itable_evex02116, 8 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { itable_evex02118, 6 },
+    /* 0x19 */ { itable_evex02119, 6 },
+    /* 0x1a */ { itable_evex0211A, 4 },
+    /* 0x1b */ { itable_evex0211B, 2 },
+    /* 0x1c */ { itable_evex0211C, 3 },
+    /* 0x1d */ { itable_evex0211D, 3 },
+    /* 0x1e */ { itable_evex0211E, 3 },
+    /* 0x1f */ { itable_evex0211F, 3 },
+    /* 0x20 */ { itable_evex02120, 3 },
+    /* 0x21 */ { itable_evex02121, 3 },
+    /* 0x22 */ { itable_evex02122, 3 },
+    /* 0x23 */ { itable_evex02123, 3 },
+    /* 0x24 */ { itable_evex02124, 3 },
+    /* 0x25 */ { itable_evex02125, 3 },
+    /* 0x26 */ { itable_evex02126, 6 },
+    /* 0x27 */ { itable_evex02127, 6 },
+    /* 0x28 */ { itable_evex02128, 6 },
+    /* 0x29 */ { itable_evex02129, 3 },
+    /* 0x2a */ { itable_evex0212A, 3 },
+    /* 0x2b */ { itable_evex0212B, 6 },
+    /* 0x2c */ { itable_evex0212C, 12 },
+    /* 0x2d */ { itable_evex0212D, 4 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { itable_evex02130, 3 },
+    /* 0x31 */ { itable_evex02131, 3 },
+    /* 0x32 */ { itable_evex02132, 3 },
+    /* 0x33 */ { itable_evex02133, 3 },
+    /* 0x34 */ { itable_evex02134, 3 },
+    /* 0x35 */ { itable_evex02135, 3 },
+    /* 0x36 */ { itable_evex02136, 8 },
+    /* 0x37 */ { itable_evex02137, 3 },
+    /* 0x38 */ { itable_evex02138, 6 },
+    /* 0x39 */ { itable_evex02139, 12 },
+    /* 0x3a */ { itable_evex0213A, 6 },
+    /* 0x3b */ { itable_evex0213B, 12 },
+    /* 0x3c */ { itable_evex0213C, 6 },
+    /* 0x3d */ { itable_evex0213D, 12 },
+    /* 0x3e */ { itable_evex0213E, 6 },
+    /* 0x3f */ { itable_evex0213F, 12 },
+    /* 0x40 */ { itable_evex02140, 12 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { itable_evex02142, 6 },
+    /* 0x43 */ { itable_evex02143, 2 },
+    /* 0x44 */ { itable_evex02144, 6 },
+    /* 0x45 */ { itable_evex02145, 12 },
+    /* 0x46 */ { itable_evex02146, 12 },
+    /* 0x47 */ { itable_evex02147, 12 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { itable_evex0214C, 6 },
+    /* 0x4d */ { itable_evex0214D, 4 },
+    /* 0x4e */ { itable_evex0214E, 6 },
+    /* 0x4f */ { itable_evex0214F, 4 },
+    /* 0x50 */ { itable_evex02150, 6 },
+    /* 0x51 */ { itable_evex02151, 6 },
+    /* 0x52 */ { itable_evex02152, 6 },
+    /* 0x53 */ { itable_evex02153, 6 },
+    /* 0x54 */ { itable_evex02154, 6 },
+    /* 0x55 */ { itable_evex02155, 6 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { itable_evex02158, 6 },
+    /* 0x59 */ { itable_evex02159, 9 },
+    /* 0x5a */ { itable_evex0215A, 4 },
+    /* 0x5b */ { itable_evex0215B, 2 },
+    /* 0x5c */ { NULL, 0 },
+    /* 0x5d */ { NULL, 0 },
+    /* 0x5e */ { NULL, 0 },
+    /* 0x5f */ { NULL, 0 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { itable_evex02162, 6 },
+    /* 0x63 */ { itable_evex02163, 12 },
+    /* 0x64 */ { itable_evex02164, 6 },
+    /* 0x65 */ { itable_evex02165, 6 },
+    /* 0x66 */ { itable_evex02166, 6 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { itable_evex02170, 6 },
+    /* 0x71 */ { itable_evex02171, 12 },
+    /* 0x72 */ { itable_evex02172, 6 },
+    /* 0x73 */ { itable_evex02173, 12 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { itable_evex02175, 6 },
+    /* 0x76 */ { itable_evex02176, 6 },
+    /* 0x77 */ { itable_evex02177, 6 },
+    /* 0x78 */ { itable_evex02178, 3 },
+    /* 0x79 */ { itable_evex02179, 3 },
+    /* 0x7a */ { itable_evex0217A, 12 },
+    /* 0x7b */ { itable_evex0217B, 9 },
+    /* 0x7c */ { itable_evex0217C, 6 },
+    /* 0x7d */ { itable_evex0217D, 6 },
+    /* 0x7e */ { itable_evex0217E, 6 },
+    /* 0x7f */ { itable_evex0217F, 6 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { itable_evex02183, 6 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { itable_evex02188, 12 },
+    /* 0x89 */ { itable_evex02189, 12 },
+    /* 0x8a */ { itable_evex0218A, 12 },
+    /* 0x8b */ { itable_evex0218B, 12 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { itable_evex0218D, 12 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { itable_evex0218F, 3 },
+    /* 0x90 */ { itable_evex02190, 6 },
+    /* 0x91 */ { itable_evex02191, 6 },
+    /* 0x92 */ { itable_evex02192, 6 },
+    /* 0x93 */ { itable_evex02193, 6 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { itable_evex02196, 6 },
+    /* 0x97 */ { itable_evex02197, 6 },
+    /* 0x98 */ { itable_evex02198, 6 },
+    /* 0x99 */ { itable_evex02199, 2 },
+    /* 0x9a */ { itable_evex0219A, 6 },
+    /* 0x9b */ { itable_evex0219B, 2 },
+    /* 0x9c */ { itable_evex0219C, 6 },
+    /* 0x9d */ { itable_evex0219D, 2 },
+    /* 0x9e */ { itable_evex0219E, 6 },
+    /* 0x9f */ { itable_evex0219F, 2 },
+    /* 0xa0 */ { itable_evex021A0, 6 },
+    /* 0xa1 */ { itable_evex021A1, 6 },
+    /* 0xa2 */ { itable_evex021A2, 6 },
+    /* 0xa3 */ { itable_evex021A3, 6 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { itable_evex021A6, 6 },
+    /* 0xa7 */ { itable_evex021A7, 6 },
+    /* 0xa8 */ { itable_evex021A8, 6 },
+    /* 0xa9 */ { itable_evex021A9, 2 },
+    /* 0xaa */ { itable_evex021AA, 6 },
+    /* 0xab */ { itable_evex021AB, 2 },
+    /* 0xac */ { itable_evex021AC, 6 },
+    /* 0xad */ { itable_evex021AD, 2 },
+    /* 0xae */ { itable_evex021AE, 6 },
+    /* 0xaf */ { itable_evex021AF, 2 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { itable_evex021B4, 3 },
+    /* 0xb5 */ { itable_evex021B5, 3 },
+    /* 0xb6 */ { itable_evex021B6, 6 },
+    /* 0xb7 */ { itable_evex021B7, 6 },
+    /* 0xb8 */ { itable_evex021B8, 6 },
+    /* 0xb9 */ { itable_evex021B9, 2 },
+    /* 0xba */ { itable_evex021BA, 6 },
+    /* 0xbb */ { itable_evex021BB, 2 },
+    /* 0xbc */ { itable_evex021BC, 6 },
+    /* 0xbd */ { itable_evex021BD, 2 },
+    /* 0xbe */ { itable_evex021BE, 6 },
+    /* 0xbf */ { itable_evex021BF, 2 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { NULL, 0 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { itable_evex021C4, 6 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { itable_evex021C6, 8 },
+    /* 0xc7 */ { itable_evex021C7, 8 },
+    /* 0xc8 */ { itable_evex021C8, 2 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { itable_evex021CA, 2 },
+    /* 0xcb */ { itable_evex021CB, 4 },
+    /* 0xcc */ { itable_evex021CC, 2 },
+    /* 0xcd */ { itable_evex021CD, 4 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { itable_evex021CF, 6 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { itable_evex021DC, 6 },
+    /* 0xdd */ { itable_evex021DD, 6 },
+    /* 0xde */ { itable_evex021DE, 6 },
+    /* 0xdf */ { itable_evex021DF, 6 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_evex022256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { itable_evex02210, 6 },
+    /* 0x11 */ { itable_evex02211, 6 },
+    /* 0x12 */ { itable_evex02212, 6 },
+    /* 0x13 */ { itable_evex02213, 6 },
+    /* 0x14 */ { itable_evex02214, 6 },
+    /* 0x15 */ { itable_evex02215, 6 },
+    /* 0x16 */ { NULL, 0 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { itable_evex02220, 6 },
+    /* 0x21 */ { itable_evex02221, 6 },
+    /* 0x22 */ { itable_evex02222, 6 },
+    /* 0x23 */ { itable_evex02223, 6 },
+    /* 0x24 */ { itable_evex02224, 6 },
+    /* 0x25 */ { itable_evex02225, 6 },
+    /* 0x26 */ { itable_evex02226, 6 },
+    /* 0x27 */ { itable_evex02227, 6 },
+    /* 0x28 */ { itable_evex02228, 6 },
+    /* 0x29 */ { itable_evex02229, 6 },
+    /* 0x2a */ { itable_evex0222A, 3 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { itable_evex02230, 6 },
+    /* 0x31 */ { itable_evex02231, 6 },
+    /* 0x32 */ { itable_evex02232, 6 },
+    /* 0x33 */ { itable_evex02233, 6 },
+    /* 0x34 */ { itable_evex02234, 6 },
+    /* 0x35 */ { itable_evex02235, 6 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { itable_evex02238, 6 },
+    /* 0x39 */ { itable_evex02239, 6 },
+    /* 0x3a */ { itable_evex0223A, 3 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { NULL, 0 },
+    /* 0x52 */ { itable_evex02252, 6 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { NULL, 0 },
+    /* 0x59 */ { NULL, 0 },
+    /* 0x5a */ { NULL, 0 },
+    /* 0x5b */ { NULL, 0 },
+    /* 0x5c */ { NULL, 0 },
+    /* 0x5d */ { NULL, 0 },
+    /* 0x5e */ { NULL, 0 },
+    /* 0x5f */ { NULL, 0 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { itable_evex02272, 6 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { NULL, 0 },
+    /* 0x79 */ { NULL, 0 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { NULL, 0 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_evex023256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { NULL, 0 },
+    /* 0x11 */ { NULL, 0 },
+    /* 0x12 */ { NULL, 0 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { NULL, 0 },
+    /* 0x15 */ { NULL, 0 },
+    /* 0x16 */ { NULL, 0 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { NULL, 0 },
+    /* 0x52 */ { itable_evex02352, 1 },
+    /* 0x53 */ { itable_evex02353, 1 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { NULL, 0 },
+    /* 0x59 */ { NULL, 0 },
+    /* 0x5a */ { NULL, 0 },
+    /* 0x5b */ { NULL, 0 },
+    /* 0x5c */ { NULL, 0 },
+    /* 0x5d */ { NULL, 0 },
+    /* 0x5e */ { NULL, 0 },
+    /* 0x5f */ { NULL, 0 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { itable_evex02368, 3 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { itable_evex02372, 6 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { NULL, 0 },
+    /* 0x79 */ { NULL, 0 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { itable_evex0239A, 1 },
+    /* 0x9b */ { itable_evex0239B, 1 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { itable_evex023AA, 1 },
+    /* 0xab */ { itable_evex023AB, 1 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { NULL, 0 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_evex030256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { itable_evex03008, 3 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { itable_evex0300A, 2 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { NULL, 0 },
+    /* 0x11 */ { NULL, 0 },
+    /* 0x12 */ { NULL, 0 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { NULL, 0 },
+    /* 0x15 */ { NULL, 0 },
+    /* 0x16 */ { NULL, 0 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { itable_evex03025, 3 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { itable_evex03027, 1 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { NULL, 0 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { itable_evex03056, 3 },
+    /* 0x57 */ { itable_evex03057, 2 },
+    /* 0x58 */ { NULL, 0 },
+    /* 0x59 */ { NULL, 0 },
+    /* 0x5a */ { NULL, 0 },
+    /* 0x5b */ { NULL, 0 },
+    /* 0x5c */ { NULL, 0 },
+    /* 0x5d */ { NULL, 0 },
+    /* 0x5e */ { NULL, 0 },
+    /* 0x5f */ { NULL, 0 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { itable_evex03066, 3 },
+    /* 0x67 */ { itable_evex03067, 1 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { NULL, 0 },
+    /* 0x79 */ { NULL, 0 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { itable_evex030C2, 6 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_evex031256 = {
+    /* 0x00 */ { itable_evex03100, 2 },
+    /* 0x01 */ { itable_evex03101, 2 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { itable_evex03103, 12 },
+    /* 0x04 */ { itable_evex03104, 3 },
+    /* 0x05 */ { itable_evex03105, 3 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { itable_evex03108, 3 },
+    /* 0x09 */ { itable_evex03109, 3 },
+    /* 0x0a */ { itable_evex0310A, 2 },
+    /* 0x0b */ { itable_evex0310B, 2 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { itable_evex0310F, 6 },
+    /* 0x10 */ { NULL, 0 },
+    /* 0x11 */ { NULL, 0 },
+    /* 0x12 */ { NULL, 0 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { itable_evex03114, 5 },
+    /* 0x15 */ { itable_evex03115, 4 },
+    /* 0x16 */ { itable_evex03116, 2 },
+    /* 0x17 */ { itable_evex03117, 3 },
+    /* 0x18 */ { itable_evex03118, 8 },
+    /* 0x19 */ { itable_evex03119, 8 },
+    /* 0x1a */ { itable_evex0311A, 4 },
+    /* 0x1b */ { itable_evex0311B, 4 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { itable_evex0311D, 12 },
+    /* 0x1e */ { itable_evex0311E, 60 },
+    /* 0x1f */ { itable_evex0311F, 60 },
+    /* 0x20 */ { itable_evex03120, 4 },
+    /* 0x21 */ { itable_evex03121, 2 },
+    /* 0x22 */ { itable_evex03122, 4 },
+    /* 0x23 */ { itable_evex03123, 8 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { itable_evex03125, 6 },
+    /* 0x26 */ { itable_evex03126, 6 },
+    /* 0x27 */ { itable_evex03127, 2 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { itable_evex03138, 8 },
+    /* 0x39 */ { itable_evex03139, 8 },
+    /* 0x3a */ { itable_evex0313A, 4 },
+    /* 0x3b */ { itable_evex0313B, 4 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { itable_evex0313E, 60 },
+    /* 0x3f */ { itable_evex0313F, 60 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { itable_evex03142, 6 },
+    /* 0x43 */ { itable_evex03143, 8 },
+    /* 0x44 */ { itable_evex03144, 30 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { itable_evex03150, 12 },
+    /* 0x51 */ { itable_evex03151, 4 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { itable_evex03154, 12 },
+    /* 0x55 */ { itable_evex03155, 4 },
+    /* 0x56 */ { itable_evex03156, 6 },
+    /* 0x57 */ { itable_evex03157, 4 },
+    /* 0x58 */ { NULL, 0 },
+    /* 0x59 */ { NULL, 0 },
+    /* 0x5a */ { NULL, 0 },
+    /* 0x5b */ { NULL, 0 },
+    /* 0x5c */ { NULL, 0 },
+    /* 0x5d */ { NULL, 0 },
+    /* 0x5e */ { NULL, 0 },
+    /* 0x5f */ { NULL, 0 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { itable_evex03166, 6 },
+    /* 0x67 */ { itable_evex03167, 2 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { itable_evex03170, 6 },
+    /* 0x71 */ { itable_evex03171, 12 },
+    /* 0x72 */ { itable_evex03172, 6 },
+    /* 0x73 */ { itable_evex03173, 12 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { NULL, 0 },
+    /* 0x79 */ { NULL, 0 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { NULL, 0 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { itable_evex031CE, 6 },
+    /* 0xcf */ { itable_evex031CF, 6 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_evex032256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { NULL, 0 },
+    /* 0x11 */ { NULL, 0 },
+    /* 0x12 */ { NULL, 0 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { NULL, 0 },
+    /* 0x15 */ { NULL, 0 },
+    /* 0x16 */ { NULL, 0 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { NULL, 0 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { NULL, 0 },
+    /* 0x59 */ { NULL, 0 },
+    /* 0x5a */ { NULL, 0 },
+    /* 0x5b */ { NULL, 0 },
+    /* 0x5c */ { NULL, 0 },
+    /* 0x5d */ { NULL, 0 },
+    /* 0x5e */ { NULL, 0 },
+    /* 0x5f */ { NULL, 0 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { NULL, 0 },
+    /* 0x79 */ { NULL, 0 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { itable_evex032C2, 2 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_evex050256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { NULL, 0 },
+    /* 0x11 */ { NULL, 0 },
+    /* 0x12 */ { NULL, 0 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { NULL, 0 },
+    /* 0x15 */ { NULL, 0 },
+    /* 0x16 */ { NULL, 0 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { itable_evex0501D, 2 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { itable_evex0502E, 1 },
+    /* 0x2f */ { itable_evex0502F, 1 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { itable_evex05051, 3 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { itable_evex05058, 6 },
+    /* 0x59 */ { itable_evex05059, 6 },
+    /* 0x5a */ { itable_evex0505A, 3 },
+    /* 0x5b */ { itable_evex0505B, 6 },
+    /* 0x5c */ { itable_evex0505C, 6 },
+    /* 0x5d */ { itable_evex0505D, 3 },
+    /* 0x5e */ { itable_evex0505E, 6 },
+    /* 0x5f */ { itable_evex0505F, 3 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { itable_evex05078, 3 },
+    /* 0x79 */ { itable_evex05079, 3 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { itable_evex0507C, 3 },
+    /* 0x7d */ { itable_evex0507D, 3 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { NULL, 0 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_evex051256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { NULL, 0 },
+    /* 0x11 */ { NULL, 0 },
+    /* 0x12 */ { NULL, 0 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { NULL, 0 },
+    /* 0x15 */ { NULL, 0 },
+    /* 0x16 */ { NULL, 0 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { itable_evex0511D, 3 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { NULL, 0 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { NULL, 0 },
+    /* 0x59 */ { NULL, 0 },
+    /* 0x5a */ { itable_evex0515A, 3 },
+    /* 0x5b */ { itable_evex0515B, 3 },
+    /* 0x5c */ { NULL, 0 },
+    /* 0x5d */ { NULL, 0 },
+    /* 0x5e */ { NULL, 0 },
+    /* 0x5f */ { NULL, 0 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { itable_evex0516E, 1 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { itable_evex05178, 3 },
+    /* 0x79 */ { itable_evex05179, 3 },
+    /* 0x7a */ { itable_evex0517A, 3 },
+    /* 0x7b */ { itable_evex0517B, 3 },
+    /* 0x7c */ { itable_evex0517C, 3 },
+    /* 0x7d */ { itable_evex0517D, 3 },
+    /* 0x7e */ { itable_evex0517E, 1 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { NULL, 0 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_evex052256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { itable_evex05210, 3 },
+    /* 0x11 */ { itable_evex05211, 3 },
+    /* 0x12 */ { NULL, 0 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { NULL, 0 },
+    /* 0x15 */ { NULL, 0 },
+    /* 0x16 */ { NULL, 0 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { itable_evex0522A, 4 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { itable_evex0522C, 2 },
+    /* 0x2d */ { itable_evex0522D, 2 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { itable_evex05251, 2 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { itable_evex05258, 2 },
+    /* 0x59 */ { itable_evex05259, 2 },
+    /* 0x5a */ { itable_evex0525A, 2 },
+    /* 0x5b */ { itable_evex0525B, 3 },
+    /* 0x5c */ { itable_evex0525C, 2 },
+    /* 0x5d */ { itable_evex0525D, 1 },
+    /* 0x5e */ { itable_evex0525E, 2 },
+    /* 0x5f */ { itable_evex0525F, 1 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { itable_evex05278, 2 },
+    /* 0x79 */ { itable_evex05279, 2 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { itable_evex0527B, 2 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { itable_evex0527D, 3 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { NULL, 0 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_evex053256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { NULL, 0 },
+    /* 0x11 */ { NULL, 0 },
+    /* 0x12 */ { NULL, 0 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { NULL, 0 },
+    /* 0x15 */ { NULL, 0 },
+    /* 0x16 */ { NULL, 0 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { NULL, 0 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { NULL, 0 },
+    /* 0x59 */ { NULL, 0 },
+    /* 0x5a */ { itable_evex0535A, 2 },
+    /* 0x5b */ { NULL, 0 },
+    /* 0x5c */ { NULL, 0 },
+    /* 0x5d */ { NULL, 0 },
+    /* 0x5e */ { NULL, 0 },
+    /* 0x5f */ { NULL, 0 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { NULL, 0 },
+    /* 0x79 */ { NULL, 0 },
+    /* 0x7a */ { itable_evex0537A, 6 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { itable_evex0537D, 3 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { NULL, 0 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_evex060256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { NULL, 0 },
+    /* 0x11 */ { NULL, 0 },
+    /* 0x12 */ { NULL, 0 },
+    /* 0x13 */ { itable_evex06013, 2 },
+    /* 0x14 */ { NULL, 0 },
+    /* 0x15 */ { NULL, 0 },
+    /* 0x16 */ { NULL, 0 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { NULL, 0 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { NULL, 0 },
+    /* 0x59 */ { NULL, 0 },
+    /* 0x5a */ { NULL, 0 },
+    /* 0x5b */ { NULL, 0 },
+    /* 0x5c */ { NULL, 0 },
+    /* 0x5d */ { NULL, 0 },
+    /* 0x5e */ { NULL, 0 },
+    /* 0x5f */ { NULL, 0 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { NULL, 0 },
+    /* 0x79 */ { NULL, 0 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { NULL, 0 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_evex061256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { NULL, 0 },
+    /* 0x11 */ { NULL, 0 },
+    /* 0x12 */ { NULL, 0 },
+    /* 0x13 */ { itable_evex06113, 3 },
+    /* 0x14 */ { NULL, 0 },
+    /* 0x15 */ { NULL, 0 },
+    /* 0x16 */ { NULL, 0 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { itable_evex0612C, 6 },
+    /* 0x2d */ { itable_evex0612D, 2 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { itable_evex06142, 3 },
+    /* 0x43 */ { itable_evex06143, 1 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { itable_evex0614C, 6 },
+    /* 0x4d */ { itable_evex0614D, 2 },
+    /* 0x4e */ { itable_evex0614E, 3 },
+    /* 0x4f */ { itable_evex0614F, 2 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { NULL, 0 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { NULL, 0 },
+    /* 0x59 */ { NULL, 0 },
+    /* 0x5a */ { NULL, 0 },
+    /* 0x5b */ { NULL, 0 },
+    /* 0x5c */ { NULL, 0 },
+    /* 0x5d */ { NULL, 0 },
+    /* 0x5e */ { NULL, 0 },
+    /* 0x5f */ { NULL, 0 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { NULL, 0 },
+    /* 0x79 */ { NULL, 0 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { itable_evex06196, 6 },
+    /* 0x97 */ { itable_evex06197, 6 },
+    /* 0x98 */ { itable_evex06198, 6 },
+    /* 0x99 */ { itable_evex06199, 2 },
+    /* 0x9a */ { itable_evex0619A, 6 },
+    /* 0x9b */ { itable_evex0619B, 2 },
+    /* 0x9c */ { itable_evex0619C, 6 },
+    /* 0x9d */ { itable_evex0619D, 2 },
+    /* 0x9e */ { itable_evex0619E, 6 },
+    /* 0x9f */ { itable_evex0619F, 2 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { itable_evex061A6, 6 },
+    /* 0xa7 */ { itable_evex061A7, 6 },
+    /* 0xa8 */ { itable_evex061A8, 6 },
+    /* 0xa9 */ { itable_evex061A9, 2 },
+    /* 0xaa */ { itable_evex061AA, 6 },
+    /* 0xab */ { itable_evex061AB, 2 },
+    /* 0xac */ { itable_evex061AC, 6 },
+    /* 0xad */ { itable_evex061AD, 2 },
+    /* 0xae */ { itable_evex061AE, 6 },
+    /* 0xaf */ { itable_evex061AF, 2 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { itable_evex061B6, 6 },
+    /* 0xb7 */ { itable_evex061B7, 6 },
+    /* 0xb8 */ { itable_evex061B8, 6 },
+    /* 0xb9 */ { itable_evex061B9, 2 },
+    /* 0xba */ { itable_evex061BA, 6 },
+    /* 0xbb */ { itable_evex061BB, 2 },
+    /* 0xbc */ { itable_evex061BC, 6 },
+    /* 0xbd */ { itable_evex061BD, 2 },
+    /* 0xbe */ { itable_evex061BE, 6 },
+    /* 0xbf */ { itable_evex061BF, 2 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { NULL, 0 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_evex062256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { NULL, 0 },
+    /* 0x11 */ { NULL, 0 },
+    /* 0x12 */ { NULL, 0 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { NULL, 0 },
+    /* 0x15 */ { NULL, 0 },
+    /* 0x16 */ { NULL, 0 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { NULL, 0 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { itable_evex06256, 6 },
+    /* 0x57 */ { itable_evex06257, 2 },
+    /* 0x58 */ { NULL, 0 },
+    /* 0x59 */ { NULL, 0 },
+    /* 0x5a */ { NULL, 0 },
+    /* 0x5b */ { NULL, 0 },
+    /* 0x5c */ { NULL, 0 },
+    /* 0x5d */ { NULL, 0 },
+    /* 0x5e */ { NULL, 0 },
+    /* 0x5f */ { NULL, 0 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { NULL, 0 },
+    /* 0x79 */ { NULL, 0 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { NULL, 0 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { itable_evex062D6, 6 },
+    /* 0xd7 */ { itable_evex062D7, 2 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_evex063256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { NULL, 0 },
+    /* 0x11 */ { NULL, 0 },
+    /* 0x12 */ { NULL, 0 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { NULL, 0 },
+    /* 0x15 */ { NULL, 0 },
+    /* 0x16 */ { NULL, 0 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { NULL, 0 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { itable_evex06356, 6 },
+    /* 0x57 */ { itable_evex06357, 2 },
+    /* 0x58 */ { NULL, 0 },
+    /* 0x59 */ { NULL, 0 },
+    /* 0x5a */ { NULL, 0 },
+    /* 0x5b */ { NULL, 0 },
+    /* 0x5c */ { NULL, 0 },
+    /* 0x5d */ { NULL, 0 },
+    /* 0x5e */ { NULL, 0 },
+    /* 0x5f */ { NULL, 0 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { NULL, 0 },
+    /* 0x79 */ { NULL, 0 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { NULL, 0 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { itable_evex063D6, 6 },
+    /* 0xd7 */ { itable_evex063D7, 2 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_0F38256 = {
+    /* 0x00 */ { itable_0F3800, 2 },
+    /* 0x01 */ { itable_0F3801, 2 },
+    /* 0x02 */ { itable_0F3802, 2 },
+    /* 0x03 */ { itable_0F3803, 2 },
+    /* 0x04 */ { itable_0F3804, 2 },
+    /* 0x05 */ { itable_0F3805, 2 },
+    /* 0x06 */ { itable_0F3806, 2 },
+    /* 0x07 */ { itable_0F3807, 2 },
+    /* 0x08 */ { itable_0F3808, 2 },
+    /* 0x09 */ { itable_0F3809, 2 },
+    /* 0x0a */ { itable_0F380A, 2 },
+    /* 0x0b */ { itable_0F380B, 2 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { itable_0F3810, 2 },
+    /* 0x11 */ { NULL, 0 },
+    /* 0x12 */ { NULL, 0 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { itable_0F3814, 2 },
+    /* 0x15 */ { itable_0F3815, 2 },
+    /* 0x16 */ { NULL, 0 },
+    /* 0x17 */ { itable_0F3817, 1 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { itable_0F381C, 2 },
+    /* 0x1d */ { itable_0F381D, 2 },
+    /* 0x1e */ { itable_0F381E, 2 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { itable_0F3820, 1 },
+    /* 0x21 */ { itable_0F3821, 1 },
+    /* 0x22 */ { itable_0F3822, 1 },
+    /* 0x23 */ { itable_0F3823, 1 },
+    /* 0x24 */ { itable_0F3824, 1 },
+    /* 0x25 */ { itable_0F3825, 1 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { itable_0F3828, 1 },
+    /* 0x29 */ { itable_0F3829, 1 },
+    /* 0x2a */ { itable_0F382A, 1 },
+    /* 0x2b */ { itable_0F382B, 1 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { itable_0F3830, 1 },
+    /* 0x31 */ { itable_0F3831, 1 },
+    /* 0x32 */ { itable_0F3832, 1 },
+    /* 0x33 */ { itable_0F3833, 1 },
+    /* 0x34 */ { itable_0F3834, 1 },
+    /* 0x35 */ { itable_0F3835, 1 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { itable_0F3837, 1 },
+    /* 0x38 */ { itable_0F3838, 1 },
+    /* 0x39 */ { itable_0F3839, 1 },
+    /* 0x3a */ { itable_0F383A, 1 },
+    /* 0x3b */ { itable_0F383B, 1 },
+    /* 0x3c */ { itable_0F383C, 1 },
+    /* 0x3d */ { itable_0F383D, 1 },
+    /* 0x3e */ { itable_0F383E, 1 },
+    /* 0x3f */ { itable_0F383F, 1 },
+    /* 0x40 */ { itable_0F3840, 1 },
+    /* 0x41 */ { itable_0F3841, 1 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { NULL, 0 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { NULL, 0 },
+    /* 0x59 */ { NULL, 0 },
+    /* 0x5a */ { NULL, 0 },
+    /* 0x5b */ { NULL, 0 },
+    /* 0x5c */ { NULL, 0 },
+    /* 0x5d */ { NULL, 0 },
+    /* 0x5e */ { NULL, 0 },
+    /* 0x5f */ { NULL, 0 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { NULL, 0 },
+    /* 0x79 */ { NULL, 0 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { itable_0F3880, 2 },
+    /* 0x81 */ { itable_0F3881, 2 },
+    /* 0x82 */ { itable_0F3882, 2 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { NULL, 0 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { itable_0F38C8, 1 },
+    /* 0xc9 */ { itable_0F38C9, 1 },
+    /* 0xca */ { itable_0F38CA, 1 },
+    /* 0xcb */ { itable_0F38CB, 2 },
+    /* 0xcc */ { itable_0F38CC, 1 },
+    /* 0xcd */ { itable_0F38CD, 1 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { itable_0F38CF, 1 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { itable_0F38DB, 1 },
+    /* 0xdc */ { itable_0F38DC, 1 },
+    /* 0xdd */ { itable_0F38DD, 1 },
+    /* 0xde */ { itable_0F38DE, 1 },
+    /* 0xdf */ { itable_0F38DF, 1 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { itable_0F38F0, 5 },
+    /* 0xf1 */ { itable_0F38F1, 6 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { itable_0F38F5, 2 },
+    /* 0xf6 */ { itable_0F38F6, 6 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { itable_0F38F8, 9 },
+    /* 0xf9 */ { itable_0F38F9, 2 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { itable_0F38FC, 6 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_0F3A256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { itable_0F3A08, 1 },
+    /* 0x09 */ { itable_0F3A09, 1 },
+    /* 0x0a */ { itable_0F3A0A, 1 },
+    /* 0x0b */ { itable_0F3A0B, 1 },
+    /* 0x0c */ { itable_0F3A0C, 1 },
+    /* 0x0d */ { itable_0F3A0D, 1 },
+    /* 0x0e */ { itable_0F3A0E, 1 },
+    /* 0x0f */ { itable_0F3A0F, 2 },
+    /* 0x10 */ { NULL, 0 },
+    /* 0x11 */ { NULL, 0 },
+    /* 0x12 */ { NULL, 0 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { itable_0F3A14, 3 },
+    /* 0x15 */ { itable_0F3A15, 3 },
+    /* 0x16 */ { itable_0F3A16, 2 },
+    /* 0x17 */ { itable_0F3A17, 2 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { itable_0F3A20, 3 },
+    /* 0x21 */ { itable_0F3A21, 1 },
+    /* 0x22 */ { itable_0F3A22, 2 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { itable_0F3A40, 1 },
+    /* 0x41 */ { itable_0F3A41, 1 },
+    /* 0x42 */ { itable_0F3A42, 1 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { itable_0F3A44, 5 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { NULL, 0 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { NULL, 0 },
+    /* 0x59 */ { NULL, 0 },
+    /* 0x5a */ { NULL, 0 },
+    /* 0x5b */ { NULL, 0 },
+    /* 0x5c */ { NULL, 0 },
+    /* 0x5d */ { NULL, 0 },
+    /* 0x5e */ { NULL, 0 },
+    /* 0x5f */ { NULL, 0 },
+    /* 0x60 */ { itable_0F3A60, 1 },
+    /* 0x61 */ { itable_0F3A61, 1 },
+    /* 0x62 */ { itable_0F3A62, 1 },
+    /* 0x63 */ { itable_0F3A63, 1 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { NULL, 0 },
+    /* 0x79 */ { NULL, 0 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { NULL, 0 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { NULL, 0 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { NULL, 0 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { itable_0F3ACC, 1 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { itable_0F3ACE, 1 },
+    /* 0xcf */ { itable_0F3ACF, 1 },
+    /* 0xd0 */ { NULL, 0 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { itable_0F3ADF, 1 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { itable_0F3AF0, 1 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_0FA6256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { NULL, 0 },
+    /* 0x11 */ { NULL, 0 },
+    /* 0x12 */ { NULL, 0 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { NULL, 0 },
+    /* 0x15 */ { NULL, 0 },
+    /* 0x16 */ { NULL, 0 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { NULL, 0 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { NULL, 0 },
+    /* 0x59 */ { NULL, 0 },
+    /* 0x5a */ { NULL, 0 },
+    /* 0x5b */ { NULL, 0 },
+    /* 0x5c */ { NULL, 0 },
+    /* 0x5d */ { NULL, 0 },
+    /* 0x5e */ { NULL, 0 },
+    /* 0x5f */ { NULL, 0 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { NULL, 0 },
+    /* 0x79 */ { NULL, 0 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { itable_0FA6C0, 1 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { NULL, 0 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { itable_0FA6C8, 1 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { itable_0FA6D0, 1 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { NULL, 0 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { NULL, 0 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { NULL, 0 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_0FA7256 = {
+    /* 0x00 */ { NULL, 0 },
+    /* 0x01 */ { NULL, 0 },
+    /* 0x02 */ { NULL, 0 },
+    /* 0x03 */ { NULL, 0 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { NULL, 0 },
+    /* 0x06 */ { NULL, 0 },
+    /* 0x07 */ { NULL, 0 },
+    /* 0x08 */ { NULL, 0 },
+    /* 0x09 */ { NULL, 0 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { NULL, 0 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { NULL, 0 },
+    /* 0x0e */ { NULL, 0 },
+    /* 0x0f */ { NULL, 0 },
+    /* 0x10 */ { NULL, 0 },
+    /* 0x11 */ { NULL, 0 },
+    /* 0x12 */ { NULL, 0 },
+    /* 0x13 */ { NULL, 0 },
+    /* 0x14 */ { NULL, 0 },
+    /* 0x15 */ { NULL, 0 },
+    /* 0x16 */ { NULL, 0 },
+    /* 0x17 */ { NULL, 0 },
+    /* 0x18 */ { NULL, 0 },
+    /* 0x19 */ { NULL, 0 },
+    /* 0x1a */ { NULL, 0 },
+    /* 0x1b */ { NULL, 0 },
+    /* 0x1c */ { NULL, 0 },
+    /* 0x1d */ { NULL, 0 },
+    /* 0x1e */ { NULL, 0 },
+    /* 0x1f */ { NULL, 0 },
+    /* 0x20 */ { NULL, 0 },
+    /* 0x21 */ { NULL, 0 },
+    /* 0x22 */ { NULL, 0 },
+    /* 0x23 */ { NULL, 0 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { NULL, 0 },
+    /* 0x29 */ { NULL, 0 },
+    /* 0x2a */ { NULL, 0 },
+    /* 0x2b */ { NULL, 0 },
+    /* 0x2c */ { NULL, 0 },
+    /* 0x2d */ { NULL, 0 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { NULL, 0 },
+    /* 0x30 */ { NULL, 0 },
+    /* 0x31 */ { NULL, 0 },
+    /* 0x32 */ { NULL, 0 },
+    /* 0x33 */ { NULL, 0 },
+    /* 0x34 */ { NULL, 0 },
+    /* 0x35 */ { NULL, 0 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { NULL, 0 },
+    /* 0x38 */ { NULL, 0 },
+    /* 0x39 */ { NULL, 0 },
+    /* 0x3a */ { NULL, 0 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { NULL, 0 },
+    /* 0x3d */ { NULL, 0 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { NULL, 0 },
+    /* 0x41 */ { NULL, 0 },
+    /* 0x42 */ { NULL, 0 },
+    /* 0x43 */ { NULL, 0 },
+    /* 0x44 */ { NULL, 0 },
+    /* 0x45 */ { NULL, 0 },
+    /* 0x46 */ { NULL, 0 },
+    /* 0x47 */ { NULL, 0 },
+    /* 0x48 */ { NULL, 0 },
+    /* 0x49 */ { NULL, 0 },
+    /* 0x4a */ { NULL, 0 },
+    /* 0x4b */ { NULL, 0 },
+    /* 0x4c */ { NULL, 0 },
+    /* 0x4d */ { NULL, 0 },
+    /* 0x4e */ { NULL, 0 },
+    /* 0x4f */ { NULL, 0 },
+    /* 0x50 */ { NULL, 0 },
+    /* 0x51 */ { NULL, 0 },
+    /* 0x52 */ { NULL, 0 },
+    /* 0x53 */ { NULL, 0 },
+    /* 0x54 */ { NULL, 0 },
+    /* 0x55 */ { NULL, 0 },
+    /* 0x56 */ { NULL, 0 },
+    /* 0x57 */ { NULL, 0 },
+    /* 0x58 */ { NULL, 0 },
+    /* 0x59 */ { NULL, 0 },
+    /* 0x5a */ { NULL, 0 },
+    /* 0x5b */ { NULL, 0 },
+    /* 0x5c */ { NULL, 0 },
+    /* 0x5d */ { NULL, 0 },
+    /* 0x5e */ { NULL, 0 },
+    /* 0x5f */ { NULL, 0 },
+    /* 0x60 */ { NULL, 0 },
+    /* 0x61 */ { NULL, 0 },
+    /* 0x62 */ { NULL, 0 },
+    /* 0x63 */ { NULL, 0 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { NULL, 0 },
+    /* 0x69 */ { NULL, 0 },
+    /* 0x6a */ { NULL, 0 },
+    /* 0x6b */ { NULL, 0 },
+    /* 0x6c */ { NULL, 0 },
+    /* 0x6d */ { NULL, 0 },
+    /* 0x6e */ { NULL, 0 },
+    /* 0x6f */ { NULL, 0 },
+    /* 0x70 */ { NULL, 0 },
+    /* 0x71 */ { NULL, 0 },
+    /* 0x72 */ { NULL, 0 },
+    /* 0x73 */ { NULL, 0 },
+    /* 0x74 */ { NULL, 0 },
+    /* 0x75 */ { NULL, 0 },
+    /* 0x76 */ { NULL, 0 },
+    /* 0x77 */ { NULL, 0 },
+    /* 0x78 */ { NULL, 0 },
+    /* 0x79 */ { NULL, 0 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { NULL, 0 },
+    /* 0x7c */ { NULL, 0 },
+    /* 0x7d */ { NULL, 0 },
+    /* 0x7e */ { NULL, 0 },
+    /* 0x7f */ { NULL, 0 },
+    /* 0x80 */ { NULL, 0 },
+    /* 0x81 */ { NULL, 0 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { NULL, 0 },
+    /* 0x84 */ { NULL, 0 },
+    /* 0x85 */ { NULL, 0 },
+    /* 0x86 */ { NULL, 0 },
+    /* 0x87 */ { NULL, 0 },
+    /* 0x88 */ { NULL, 0 },
+    /* 0x89 */ { NULL, 0 },
+    /* 0x8a */ { NULL, 0 },
+    /* 0x8b */ { NULL, 0 },
+    /* 0x8c */ { NULL, 0 },
+    /* 0x8d */ { NULL, 0 },
+    /* 0x8e */ { NULL, 0 },
+    /* 0x8f */ { NULL, 0 },
+    /* 0x90 */ { NULL, 0 },
+    /* 0x91 */ { NULL, 0 },
+    /* 0x92 */ { NULL, 0 },
+    /* 0x93 */ { NULL, 0 },
+    /* 0x94 */ { NULL, 0 },
+    /* 0x95 */ { NULL, 0 },
+    /* 0x96 */ { NULL, 0 },
+    /* 0x97 */ { NULL, 0 },
+    /* 0x98 */ { NULL, 0 },
+    /* 0x99 */ { NULL, 0 },
+    /* 0x9a */ { NULL, 0 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { NULL, 0 },
+    /* 0x9d */ { NULL, 0 },
+    /* 0x9e */ { NULL, 0 },
+    /* 0x9f */ { NULL, 0 },
+    /* 0xa0 */ { NULL, 0 },
+    /* 0xa1 */ { NULL, 0 },
+    /* 0xa2 */ { NULL, 0 },
+    /* 0xa3 */ { NULL, 0 },
+    /* 0xa4 */ { NULL, 0 },
+    /* 0xa5 */ { NULL, 0 },
+    /* 0xa6 */ { NULL, 0 },
+    /* 0xa7 */ { NULL, 0 },
+    /* 0xa8 */ { NULL, 0 },
+    /* 0xa9 */ { NULL, 0 },
+    /* 0xaa */ { NULL, 0 },
+    /* 0xab */ { NULL, 0 },
+    /* 0xac */ { NULL, 0 },
+    /* 0xad */ { NULL, 0 },
+    /* 0xae */ { NULL, 0 },
+    /* 0xaf */ { NULL, 0 },
+    /* 0xb0 */ { NULL, 0 },
+    /* 0xb1 */ { NULL, 0 },
+    /* 0xb2 */ { NULL, 0 },
+    /* 0xb3 */ { NULL, 0 },
+    /* 0xb4 */ { NULL, 0 },
+    /* 0xb5 */ { NULL, 0 },
+    /* 0xb6 */ { NULL, 0 },
+    /* 0xb7 */ { NULL, 0 },
+    /* 0xb8 */ { NULL, 0 },
+    /* 0xb9 */ { NULL, 0 },
+    /* 0xba */ { NULL, 0 },
+    /* 0xbb */ { NULL, 0 },
+    /* 0xbc */ { NULL, 0 },
+    /* 0xbd */ { NULL, 0 },
+    /* 0xbe */ { NULL, 0 },
+    /* 0xbf */ { NULL, 0 },
+    /* 0xc0 */ { itable_0FA7C0, 1 },
+    /* 0xc1 */ { NULL, 0 },
+    /* 0xc2 */ { NULL, 0 },
+    /* 0xc3 */ { NULL, 0 },
+    /* 0xc4 */ { NULL, 0 },
+    /* 0xc5 */ { NULL, 0 },
+    /* 0xc6 */ { NULL, 0 },
+    /* 0xc7 */ { NULL, 0 },
+    /* 0xc8 */ { itable_0FA7C8, 1 },
+    /* 0xc9 */ { NULL, 0 },
+    /* 0xca */ { NULL, 0 },
+    /* 0xcb */ { NULL, 0 },
+    /* 0xcc */ { NULL, 0 },
+    /* 0xcd */ { NULL, 0 },
+    /* 0xce */ { NULL, 0 },
+    /* 0xcf */ { NULL, 0 },
+    /* 0xd0 */ { itable_0FA7D0, 1 },
+    /* 0xd1 */ { NULL, 0 },
+    /* 0xd2 */ { NULL, 0 },
+    /* 0xd3 */ { NULL, 0 },
+    /* 0xd4 */ { NULL, 0 },
+    /* 0xd5 */ { NULL, 0 },
+    /* 0xd6 */ { NULL, 0 },
+    /* 0xd7 */ { NULL, 0 },
+    /* 0xd8 */ { itable_0FA7D8, 1 },
+    /* 0xd9 */ { NULL, 0 },
+    /* 0xda */ { NULL, 0 },
+    /* 0xdb */ { NULL, 0 },
+    /* 0xdc */ { NULL, 0 },
+    /* 0xdd */ { NULL, 0 },
+    /* 0xde */ { NULL, 0 },
+    /* 0xdf */ { NULL, 0 },
+    /* 0xe0 */ { itable_0FA7E0, 1 },
+    /* 0xe1 */ { NULL, 0 },
+    /* 0xe2 */ { NULL, 0 },
+    /* 0xe3 */ { NULL, 0 },
+    /* 0xe4 */ { NULL, 0 },
+    /* 0xe5 */ { NULL, 0 },
+    /* 0xe6 */ { NULL, 0 },
+    /* 0xe7 */ { NULL, 0 },
+    /* 0xe8 */ { itable_0FA7E8, 1 },
+    /* 0xe9 */ { NULL, 0 },
+    /* 0xea */ { NULL, 0 },
+    /* 0xeb */ { NULL, 0 },
+    /* 0xec */ { NULL, 0 },
+    /* 0xed */ { NULL, 0 },
+    /* 0xee */ { NULL, 0 },
+    /* 0xef */ { NULL, 0 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { NULL, 0 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { NULL, 0 },
+    /* 0xf5 */ { NULL, 0 },
+    /* 0xf6 */ { NULL, 0 },
+    /* 0xf7 */ { NULL, 0 },
+    /* 0xf8 */ { NULL, 0 },
+    /* 0xf9 */ { NULL, 0 },
+    /* 0xfa */ { NULL, 0 },
+    /* 0xfb */ { NULL, 0 },
+    /* 0xfc */ { NULL, 0 },
+    /* 0xfd */ { NULL, 0 },
+    /* 0xfe */ { NULL, 0 },
+    /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_0F256 = {
+    /* 0x00 */ { itable_0F00, 27 },
+    /* 0x01 */ { itable_0F01, 68 },
+    /* 0x02 */ { itable_0F02, 10 },
+    /* 0x03 */ { itable_0F03, 10 },
+    /* 0x04 */ { NULL, 0 },
+    /* 0x05 */ { itable_0F05, 1 },
+    /* 0x06 */ { itable_0F06, 1 },
+    /* 0x07 */ { itable_0F07, 1 },
+    /* 0x08 */ { itable_0F08, 1 },
+    /* 0x09 */ { itable_0F09, 3 },
+    /* 0x0a */ { NULL, 0 },
+    /* 0x0b */ { itable_0F0B, 1 },
+    /* 0x0c */ { NULL, 0 },
+    /* 0x0d */ { itable_0F0D, 3 },
+    /* 0x0e */ { itable_0F0E, 1 },
+    /* 0x0f */ { itable_0F0F, 26 },
+    /* 0x10 */ { itable_0F10, 4 },
+    /* 0x11 */ { itable_0F11, 4 },
+    /* 0x12 */ { itable_0F12, 5 },
+    /* 0x13 */ { itable_0F13, 2 },
+    /* 0x14 */ { itable_0F14, 2 },
+    /* 0x15 */ { itable_0F15, 2 },
+    /* 0x16 */ { itable_0F16, 4 },
+    /* 0x17 */ { itable_0F17, 2 },
+    /* 0x18 */ { itable_0F18, 30 },
+    /* 0x19 */ { itable_0F19, 24 },
+    /* 0x1a */ { itable_0F1A, 35 },
+    /* 0x1b */ { itable_0F1B, 35 },
+    /* 0x1c */ { itable_0F1C, 25 },
+    /* 0x1d */ { itable_0F1D, 24 },
+    /* 0x1e */ { itable_0F1E, 28 },
+    /* 0x1f */ { itable_0F1F, 27 },
+    /* 0x20 */ { itable_0F20, 2 },
+    /* 0x21 */ { itable_0F21, 2 },
+    /* 0x22 */ { itable_0F22, 2 },
+    /* 0x23 */ { itable_0F23, 2 },
+    /* 0x24 */ { NULL, 0 },
+    /* 0x25 */ { NULL, 0 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { NULL, 0 },
+    /* 0x28 */ { itable_0F28, 2 },
+    /* 0x29 */ { itable_0F29, 2 },
+    /* 0x2a */ { itable_0F2A, 6 },
+    /* 0x2b */ { itable_0F2B, 4 },
+    /* 0x2c */ { itable_0F2C, 8 },
+    /* 0x2d */ { itable_0F2D, 10 },
+    /* 0x2e */ { itable_0F2E, 2 },
+    /* 0x2f */ { itable_0F2F, 2 },
+    /* 0x30 */ { itable_0F30, 1 },
+    /* 0x31 */ { itable_0F31, 1 },
+    /* 0x32 */ { itable_0F32, 1 },
+    /* 0x33 */ { itable_0F33, 1 },
+    /* 0x34 */ { itable_0F34, 1 },
+    /* 0x35 */ { itable_0F35, 1 },
+    /* 0x36 */ { itable_0F36, 1 },
+    /* 0x37 */ { itable_0F37, 2 },
+    /* 0x38 */ { itable_0F38, -1 },
+    /* 0x39 */ { itable_0F39, 1 },
+    /* 0x3a */ { itable_0F3A, -1 },
+    /* 0x3b */ { NULL, 0 },
+    /* 0x3c */ { itable_0F3C, 1 },
+    /* 0x3d */ { itable_0F3D, 1 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { NULL, 0 },
+    /* 0x40 */ { itable_0F40, 6 },
+    /* 0x41 */ { itable_0F41, 6 },
+    /* 0x42 */ { itable_0F42, 6 },
+    /* 0x43 */ { itable_0F43, 6 },
+    /* 0x44 */ { itable_0F44, 6 },
+    /* 0x45 */ { itable_0F45, 6 },
+    /* 0x46 */ { itable_0F46, 6 },
+    /* 0x47 */ { itable_0F47, 6 },
+    /* 0x48 */ { itable_0F48, 6 },
+    /* 0x49 */ { itable_0F49, 6 },
+    /* 0x4a */ { itable_0F4A, 6 },
+    /* 0x4b */ { itable_0F4B, 6 },
+    /* 0x4c */ { itable_0F4C, 6 },
+    /* 0x4d */ { itable_0F4D, 6 },
+    /* 0x4e */ { itable_0F4E, 6 },
+    /* 0x4f */ { itable_0F4F, 6 },
+    /* 0x50 */ { itable_0F50, 5 },
+    /* 0x51 */ { itable_0F51, 5 },
+    /* 0x52 */ { itable_0F52, 3 },
+    /* 0x53 */ { itable_0F53, 2 },
+    /* 0x54 */ { itable_0F54, 3 },
+    /* 0x55 */ { itable_0F55, 3 },
+    /* 0x56 */ { itable_0F56, 2 },
+    /* 0x57 */ { itable_0F57, 2 },
+    /* 0x58 */ { itable_0F58, 5 },
+    /* 0x59 */ { itable_0F59, 5 },
+    /* 0x5a */ { itable_0F5A, 5 },
+    /* 0x5b */ { itable_0F5B, 4 },
+    /* 0x5c */ { itable_0F5C, 5 },
+    /* 0x5d */ { itable_0F5D, 5 },
+    /* 0x5e */ { itable_0F5E, 5 },
+    /* 0x5f */ { itable_0F5F, 4 },
+    /* 0x60 */ { itable_0F60, 2 },
+    /* 0x61 */ { itable_0F61, 2 },
+    /* 0x62 */ { itable_0F62, 2 },
+    /* 0x63 */ { itable_0F63, 2 },
+    /* 0x64 */ { itable_0F64, 2 },
+    /* 0x65 */ { itable_0F65, 2 },
+    /* 0x66 */ { itable_0F66, 2 },
+    /* 0x67 */ { itable_0F67, 2 },
+    /* 0x68 */ { itable_0F68, 2 },
+    /* 0x69 */ { itable_0F69, 2 },
+    /* 0x6a */ { itable_0F6A, 2 },
+    /* 0x6b */ { itable_0F6B, 2 },
+    /* 0x6c */ { itable_0F6C, 1 },
+    /* 0x6d */ { itable_0F6D, 1 },
+    /* 0x6e */ { itable_0F6E, 5 },
+    /* 0x6f */ { itable_0F6F, 3 },
+    /* 0x70 */ { itable_0F70, 7 },
+    /* 0x71 */ { itable_0F71, 6 },
+    /* 0x72 */ { itable_0F72, 6 },
+    /* 0x73 */ { itable_0F73, 6 },
+    /* 0x74 */ { itable_0F74, 2 },
+    /* 0x75 */ { itable_0F75, 2 },
+    /* 0x76 */ { itable_0F76, 2 },
+    /* 0x77 */ { itable_0F77, 1 },
+    /* 0x78 */ { itable_0F78, 5 },
+    /* 0x79 */ { itable_0F79, 5 },
+    /* 0x7a */ { NULL, 0 },
+    /* 0x7b */ { itable_0F7B, 1 },
+    /* 0x7c */ { itable_0F7C, 3 },
+    /* 0x7d */ { itable_0F7D, 3 },
+    /* 0x7e */ { itable_0F7E, 7 },
+    /* 0x7f */ { itable_0F7F, 3 },
+    /* 0x80 */ { itable_0F80, 4 },
+    /* 0x81 */ { itable_0F81, 4 },
+    /* 0x82 */ { itable_0F82, 4 },
+    /* 0x83 */ { itable_0F83, 4 },
+    /* 0x84 */ { itable_0F84, 4 },
+    /* 0x85 */ { itable_0F85, 4 },
+    /* 0x86 */ { itable_0F86, 4 },
+    /* 0x87 */ { itable_0F87, 4 },
+    /* 0x88 */ { itable_0F88, 4 },
+    /* 0x89 */ { itable_0F89, 4 },
+    /* 0x8a */ { itable_0F8A, 4 },
+    /* 0x8b */ { itable_0F8B, 4 },
+    /* 0x8c */ { itable_0F8C, 4 },
+    /* 0x8d */ { itable_0F8D, 4 },
+    /* 0x8e */ { itable_0F8E, 4 },
+    /* 0x8f */ { itable_0F8F, 4 },
+    /* 0x90 */ { itable_0F90, 2 },
+    /* 0x91 */ { itable_0F91, 2 },
+    /* 0x92 */ { itable_0F92, 2 },
+    /* 0x93 */ { itable_0F93, 2 },
+    /* 0x94 */ { itable_0F94, 2 },
+    /* 0x95 */ { itable_0F95, 2 },
+    /* 0x96 */ { itable_0F96, 2 },
+    /* 0x97 */ { itable_0F97, 2 },
+    /* 0x98 */ { itable_0F98, 2 },
+    /* 0x99 */ { itable_0F99, 2 },
+    /* 0x9a */ { itable_0F9A, 2 },
+    /* 0x9b */ { itable_0F9B, 2 },
+    /* 0x9c */ { itable_0F9C, 2 },
+    /* 0x9d */ { itable_0F9D, 2 },
+    /* 0x9e */ { itable_0F9E, 2 },
+    /* 0x9f */ { itable_0F9F, 2 },
+    /* 0xa0 */ { itable_0FA0, 1 },
+    /* 0xa1 */ { itable_0FA1, 1 },
+    /* 0xa2 */ { itable_0FA2, 1 },
+    /* 0xa3 */ { itable_0FA3, 6 },
+    /* 0xa4 */ { itable_0FA4, 6 },
+    /* 0xa5 */ { itable_0FA5, 6 },
+    /* 0xa6 */ { itable_0FA6, -1 },
+    /* 0xa7 */ { itable_0FA7, -1 },
+    /* 0xa8 */ { itable_0FA8, 1 },
+    /* 0xa9 */ { itable_0FA9, 1 },
+    /* 0xaa */ { itable_0FAA, 1 },
+    /* 0xab */ { itable_0FAB, 6 },
+    /* 0xac */ { itable_0FAC, 6 },
+    /* 0xad */ { itable_0FAD, 6 },
+    /* 0xae */ { itable_0FAE, 40 },
+    /* 0xaf */ { itable_0FAF, 6 },
+    /* 0xb0 */ { itable_0FB0, 2 },
+    /* 0xb1 */ { itable_0FB1, 6 },
+    /* 0xb2 */ { itable_0FB2, 3 },
+    /* 0xb3 */ { itable_0FB3, 6 },
+    /* 0xb4 */ { itable_0FB4, 3 },
+    /* 0xb5 */ { itable_0FB5, 3 },
+    /* 0xb6 */ { itable_0FB6, 4 },
+    /* 0xb7 */ { itable_0FB7, 2 },
+    /* 0xb8 */ { itable_0FB8, 6 },
+    /* 0xb9 */ { itable_0FB9, 3 },
+    /* 0xba */ { itable_0FBA, 12 },
+    /* 0xbb */ { itable_0FBB, 6 },
+    /* 0xbc */ { itable_0FBC, 9 },
+    /* 0xbd */ { itable_0FBD, 9 },
+    /* 0xbe */ { itable_0FBE, 4 },
+    /* 0xbf */ { itable_0FBF, 2 },
+    /* 0xc0 */ { itable_0FC0, 2 },
+    /* 0xc1 */ { itable_0FC1, 6 },
+    /* 0xc2 */ { itable_0FC2, 36 },
+    /* 0xc3 */ { itable_0FC3, 2 },
+    /* 0xc4 */ { itable_0FC4, 6 },
+    /* 0xc5 */ { itable_0FC5, 2 },
+    /* 0xc6 */ { itable_0FC6, 2 },
+    /* 0xc7 */ { itable_0FC7, 22 },
+    /* 0xc8 */ { itable_0FC8, 2 },
+    /* 0xc9 */ { itable_0FC9, 2 },
+    /* 0xca */ { itable_0FCA, 2 },
+    /* 0xcb */ { itable_0FCB, 2 },
+    /* 0xcc */ { itable_0FCC, 2 },
+    /* 0xcd */ { itable_0FCD, 2 },
+    /* 0xce */ { itable_0FCE, 2 },
+    /* 0xcf */ { itable_0FCF, 2 },
+    /* 0xd0 */ { itable_0FD0, 2 },
+    /* 0xd1 */ { itable_0FD1, 2 },
+    /* 0xd2 */ { itable_0FD2, 2 },
+    /* 0xd3 */ { itable_0FD3, 2 },
+    /* 0xd4 */ { itable_0FD4, 2 },
+    /* 0xd5 */ { itable_0FD5, 2 },
+    /* 0xd6 */ { itable_0FD6, 4 },
+    /* 0xd7 */ { itable_0FD7, 2 },
+    /* 0xd8 */ { itable_0FD8, 2 },
+    /* 0xd9 */ { itable_0FD9, 2 },
+    /* 0xda */ { itable_0FDA, 2 },
+    /* 0xdb */ { itable_0FDB, 2 },
+    /* 0xdc */ { itable_0FDC, 2 },
+    /* 0xdd */ { itable_0FDD, 2 },
+    /* 0xde */ { itable_0FDE, 2 },
+    /* 0xdf */ { itable_0FDF, 2 },
+    /* 0xe0 */ { itable_0FE0, 2 },
+    /* 0xe1 */ { itable_0FE1, 2 },
+    /* 0xe2 */ { itable_0FE2, 2 },
+    /* 0xe3 */ { itable_0FE3, 2 },
+    /* 0xe4 */ { itable_0FE4, 2 },
+    /* 0xe5 */ { itable_0FE5, 2 },
+    /* 0xe6 */ { itable_0FE6, 3 },
+    /* 0xe7 */ { itable_0FE7, 2 },
+    /* 0xe8 */ { itable_0FE8, 2 },
+    /* 0xe9 */ { itable_0FE9, 2 },
+    /* 0xea */ { itable_0FEA, 2 },
+    /* 0xeb */ { itable_0FEB, 2 },
+    /* 0xec */ { itable_0FEC, 2 },
+    /* 0xed */ { itable_0FED, 2 },
+    /* 0xee */ { itable_0FEE, 2 },
+    /* 0xef */ { itable_0FEF, 2 },
+    /* 0xf0 */ { itable_0FF0, 1 },
+    /* 0xf1 */ { itable_0FF1, 2 },
+    /* 0xf2 */ { itable_0FF2, 2 },
+    /* 0xf3 */ { itable_0FF3, 2 },
+    /* 0xf4 */ { itable_0FF4, 2 },
+    /* 0xf5 */ { itable_0FF5, 2 },
+    /* 0xf6 */ { itable_0FF6, 2 },
+    /* 0xf7 */ { itable_0FF7, 2 },
+    /* 0xf8 */ { itable_0FF8, 2 },
+    /* 0xf9 */ { itable_0FF9, 2 },
+    /* 0xfa */ { itable_0FFA, 2 },
+    /* 0xfb */ { itable_0FFB, 2 },
+    /* 0xfc */ { itable_0FFC, 2 },
+    /* 0xfd */ { itable_0FFD, 2 },
+    /* 0xfe */ { itable_0FFE, 2 },
+    /* 0xff */ { itable_0FFF, 4 },
+};
+
+const struct disasm_index itable256 = {
+    /* 0x00 */ { itable_00, 2 },
+    /* 0x01 */ { itable_01, 6 },
+    /* 0x02 */ { itable_02, 2 },
+    /* 0x03 */ { itable_03, 6 },
+    /* 0x04 */ { itable_04, 1 },
+    /* 0x05 */ { itable_05, 3 },
+    /* 0x06 */ { itable_06, 1 },
+    /* 0x07 */ { itable_07, 1 },
+    /* 0x08 */ { itable_08, 2 },
+    /* 0x09 */ { itable_09, 6 },
+    /* 0x0a */ { itable_0A, 2 },
+    /* 0x0b */ { itable_0B, 6 },
+    /* 0x0c */ { itable_0C, 1 },
+    /* 0x0d */ { itable_0D, 3 },
+    /* 0x0e */ { itable_0E, 1 },
+    /* 0x0f */ { itable_0F, -1 },
+    /* 0x10 */ { itable_10, 2 },
+    /* 0x11 */ { itable_11, 6 },
+    /* 0x12 */ { itable_12, 2 },
+    /* 0x13 */ { itable_13, 6 },
+    /* 0x14 */ { itable_14, 1 },
+    /* 0x15 */ { itable_15, 3 },
+    /* 0x16 */ { itable_16, 1 },
+    /* 0x17 */ { itable_17, 1 },
+    /* 0x18 */ { itable_18, 2 },
+    /* 0x19 */ { itable_19, 6 },
+    /* 0x1a */ { itable_1A, 2 },
+    /* 0x1b */ { itable_1B, 6 },
+    /* 0x1c */ { itable_1C, 1 },
+    /* 0x1d */ { itable_1D, 3 },
+    /* 0x1e */ { itable_1E, 1 },
+    /* 0x1f */ { itable_1F, 1 },
+    /* 0x20 */ { itable_20, 2 },
+    /* 0x21 */ { itable_21, 6 },
+    /* 0x22 */ { itable_22, 2 },
+    /* 0x23 */ { itable_23, 6 },
+    /* 0x24 */ { itable_24, 1 },
+    /* 0x25 */ { itable_25, 3 },
+    /* 0x26 */ { NULL, 0 },
+    /* 0x27 */ { itable_27, 1 },
+    /* 0x28 */ { itable_28, 2 },
+    /* 0x29 */ { itable_29, 6 },
+    /* 0x2a */ { itable_2A, 2 },
+    /* 0x2b */ { itable_2B, 6 },
+    /* 0x2c */ { itable_2C, 1 },
+    /* 0x2d */ { itable_2D, 3 },
+    /* 0x2e */ { NULL, 0 },
+    /* 0x2f */ { itable_2F, 1 },
+    /* 0x30 */ { itable_30, 2 },
+    /* 0x31 */ { itable_31, 6 },
+    /* 0x32 */ { itable_32, 2 },
+    /* 0x33 */ { itable_33, 6 },
+    /* 0x34 */ { itable_34, 1 },
+    /* 0x35 */ { itable_35, 3 },
+    /* 0x36 */ { NULL, 0 },
+    /* 0x37 */ { itable_37, 1 },
+    /* 0x38 */ { itable_38, 2 },
+    /* 0x39 */ { itable_39, 6 },
+    /* 0x3a */ { itable_3A, 2 },
+    /* 0x3b */ { itable_3B, 6 },
+    /* 0x3c */ { itable_3C, 1 },
+    /* 0x3d */ { itable_3D, 3 },
+    /* 0x3e */ { NULL, 0 },
+    /* 0x3f */ { itable_3F, 1 },
+    /* 0x40 */ { itable_40, 2 },
+    /* 0x41 */ { itable_41, 2 },
+    /* 0x42 */ { itable_42, 2 },
+    /* 0x43 */ { itable_43, 2 },
+    /* 0x44 */ { itable_44, 2 },
+    /* 0x45 */ { itable_45, 2 },
+    /* 0x46 */ { itable_46, 2 },
+    /* 0x47 */ { itable_47, 2 },
+    /* 0x48 */ { itable_48, 2 },
+    /* 0x49 */ { itable_49, 2 },
+    /* 0x4a */ { itable_4A, 2 },
+    /* 0x4b */ { itable_4B, 2 },
+    /* 0x4c */ { itable_4C, 2 },
+    /* 0x4d */ { itable_4D, 2 },
+    /* 0x4e */ { itable_4E, 2 },
+    /* 0x4f */ { itable_4F, 2 },
+    /* 0x50 */ { itable_50, 3 },
+    /* 0x51 */ { itable_51, 3 },
+    /* 0x52 */ { itable_52, 3 },
+    /* 0x53 */ { itable_53, 3 },
+    /* 0x54 */ { itable_54, 3 },
+    /* 0x55 */ { itable_55, 3 },
+    /* 0x56 */ { itable_56, 3 },
+    /* 0x57 */ { itable_57, 3 },
+    /* 0x58 */ { itable_58, 3 },
+    /* 0x59 */ { itable_59, 3 },
+    /* 0x5a */ { itable_5A, 3 },
+    /* 0x5b */ { itable_5B, 3 },
+    /* 0x5c */ { itable_5C, 3 },
+    /* 0x5d */ { itable_5D, 3 },
+    /* 0x5e */ { itable_5E, 3 },
+    /* 0x5f */ { itable_5F, 3 },
+    /* 0x60 */ { itable_60, 3 },
+    /* 0x61 */ { itable_61, 3 },
+    /* 0x62 */ { itable_62, 2 },
+    /* 0x63 */ { itable_63, 3 },
+    /* 0x64 */ { NULL, 0 },
+    /* 0x65 */ { NULL, 0 },
+    /* 0x66 */ { NULL, 0 },
+    /* 0x67 */ { NULL, 0 },
+    /* 0x68 */ { itable_68, 5 },
+    /* 0x69 */ { itable_69, 9 },
+    /* 0x6a */ { itable_6A, 1 },
+    /* 0x6b */ { itable_6B, 9 },
+    /* 0x6c */ { itable_6C, 1 },
+    /* 0x6d */ { itable_6D, 2 },
+    /* 0x6e */ { itable_6E, 1 },
+    /* 0x6f */ { itable_6F, 2 },
+    /* 0x70 */ { itable_70, 1 },
+    /* 0x71 */ { itable_71, 1 },
+    /* 0x72 */ { itable_72, 1 },
+    /* 0x73 */ { itable_73, 1 },
+    /* 0x74 */ { itable_74, 1 },
+    /* 0x75 */ { itable_75, 1 },
+    /* 0x76 */ { itable_76, 1 },
+    /* 0x77 */ { itable_77, 1 },
+    /* 0x78 */ { itable_78, 1 },
+    /* 0x79 */ { itable_79, 1 },
+    /* 0x7a */ { itable_7A, 1 },
+    /* 0x7b */ { itable_7B, 1 },
+    /* 0x7c */ { itable_7C, 1 },
+    /* 0x7d */ { itable_7D, 1 },
+    /* 0x7e */ { itable_7E, 1 },
+    /* 0x7f */ { itable_7F, 1 },
+    /* 0x80 */ { itable_80, 15 },
+    /* 0x81 */ { itable_81, 40 },
+    /* 0x82 */ { NULL, 0 },
+    /* 0x83 */ { itable_83, 24 },
+    /* 0x84 */ { itable_84, 3 },
+    /* 0x85 */ { itable_85, 9 },
+    /* 0x86 */ { itable_86, 3 },
+    /* 0x87 */ { itable_87, 9 },
+    /* 0x88 */ { itable_88, 2 },
+    /* 0x89 */ { itable_89, 6 },
+    /* 0x8a */ { itable_8A, 2 },
+    /* 0x8b */ { itable_8B, 6 },
+    /* 0x8c */ { itable_8C, 4 },
+    /* 0x8d */ { itable_8D, 3 },
+    /* 0x8e */ { itable_8E, 4 },
+    /* 0x8f */ { itable_8F, 3 },
+    /* 0x90 */ { itable_90, 9 },
+    /* 0x91 */ { itable_91, 6 },
+    /* 0x92 */ { itable_92, 6 },
+    /* 0x93 */ { itable_93, 6 },
+    /* 0x94 */ { itable_94, 6 },
+    /* 0x95 */ { itable_95, 6 },
+    /* 0x96 */ { itable_96, 6 },
+    /* 0x97 */ { itable_97, 6 },
+    /* 0x98 */ { itable_98, 3 },
+    /* 0x99 */ { itable_99, 3 },
+    /* 0x9a */ { itable_9A, 5 },
+    /* 0x9b */ { NULL, 0 },
+    /* 0x9c */ { itable_9C, 4 },
+    /* 0x9d */ { itable_9D, 4 },
+    /* 0x9e */ { itable_9E, 1 },
+    /* 0x9f */ { itable_9F, 1 },
+    /* 0xa0 */ { itable_A0, 1 },
+    /* 0xa1 */ { itable_A1, 3 },
+    /* 0xa2 */ { itable_A2, 1 },
+    /* 0xa3 */ { itable_A3, 3 },
+    /* 0xa4 */ { itable_A4, 1 },
+    /* 0xa5 */ { itable_A5, 3 },
+    /* 0xa6 */ { itable_A6, 1 },
+    /* 0xa7 */ { itable_A7, 3 },
+    /* 0xa8 */ { itable_A8, 1 },
+    /* 0xa9 */ { itable_A9, 3 },
+    /* 0xaa */ { itable_AA, 1 },
+    /* 0xab */ { itable_AB, 3 },
+    /* 0xac */ { itable_AC, 1 },
+    /* 0xad */ { itable_AD, 3 },
+    /* 0xae */ { itable_AE, 1 },
+    /* 0xaf */ { itable_AF, 3 },
+    /* 0xb0 */ { itable_B0, 1 },
+    /* 0xb1 */ { itable_B1, 1 },
+    /* 0xb2 */ { itable_B2, 1 },
+    /* 0xb3 */ { itable_B3, 1 },
+    /* 0xb4 */ { itable_B4, 1 },
+    /* 0xb5 */ { itable_B5, 1 },
+    /* 0xb6 */ { itable_B6, 1 },
+    /* 0xb7 */ { itable_B7, 1 },
+    /* 0xb8 */ { itable_B8, 3 },
+    /* 0xb9 */ { itable_B9, 3 },
+    /* 0xba */ { itable_BA, 3 },
+    /* 0xbb */ { itable_BB, 3 },
+    /* 0xbc */ { itable_BC, 3 },
+    /* 0xbd */ { itable_BD, 3 },
+    /* 0xbe */ { itable_BE, 3 },
+    /* 0xbf */ { itable_BF, 3 },
+    /* 0xc0 */ { itable_C0, 7 },
+    /* 0xc1 */ { itable_C1, 21 },
+    /* 0xc2 */ { itable_C2, 8 },
+    /* 0xc3 */ { itable_C3, 8 },
+    /* 0xc4 */ { itable_C4, 2 },
+    /* 0xc5 */ { itable_C5, 2 },
+    /* 0xc6 */ { itable_C6, 4 },
+    /* 0xc7 */ { itable_C7, 10 },
+    /* 0xc8 */ { itable_C8, 1 },
+    /* 0xc9 */ { itable_C9, 1 },
+    /* 0xca */ { itable_CA, 4 },
+    /* 0xcb */ { itable_CB, 4 },
+    /* 0xcc */ { itable_CC, 1 },
+    /* 0xcd */ { itable_CD, 1 },
+    /* 0xce */ { itable_CE, 1 },
+    /* 0xcf */ { itable_CF, 4 },
+    /* 0xd0 */ { itable_D0, 7 },
+    /* 0xd1 */ { itable_D1, 21 },
+    /* 0xd2 */ { itable_D2, 7 },
+    /* 0xd3 */ { itable_D3, 21 },
+    /* 0xd4 */ { itable_D4, 2 },
+    /* 0xd5 */ { itable_D5, 2 },
+    /* 0xd6 */ { itable_D6, 1 },
+    /* 0xd7 */ { itable_D7, 2 },
+    /* 0xd8 */ { itable_D8, 24 },
+    /* 0xd9 */ { itable_D9, 41 },
+    /* 0xda */ { itable_DA, 17 },
+    /* 0xdb */ { itable_DB, 27 },
+    /* 0xdc */ { itable_DC, 20 },
+    /* 0xdd */ { itable_DD, 17 },
+    /* 0xde */ { itable_DE, 21 },
+    /* 0xdf */ { itable_DF, 18 },
+    /* 0xe0 */ { itable_E0, 8 },
+    /* 0xe1 */ { itable_E1, 8 },
+    /* 0xe2 */ { itable_E2, 4 },
+    /* 0xe3 */ { itable_E3, 3 },
+    /* 0xe4 */ { itable_E4, 1 },
+    /* 0xe5 */ { itable_E5, 2 },
+    /* 0xe6 */ { itable_E6, 1 },
+    /* 0xe7 */ { itable_E7, 2 },
+    /* 0xe8 */ { itable_E8, 4 },
+    /* 0xe9 */ { itable_E9, 4 },
+    /* 0xea */ { itable_EA, 5 },
+    /* 0xeb */ { itable_EB, 1 },
+    /* 0xec */ { itable_EC, 1 },
+    /* 0xed */ { itable_ED, 2 },
+    /* 0xee */ { itable_EE, 1 },
+    /* 0xef */ { itable_EF, 2 },
+    /* 0xf0 */ { NULL, 0 },
+    /* 0xf1 */ { itable_F1, 2 },
+    /* 0xf2 */ { NULL, 0 },
+    /* 0xf3 */ { NULL, 0 },
+    /* 0xf4 */ { itable_F4, 1 },
+    /* 0xf5 */ { itable_F5, 1 },
+    /* 0xf6 */ { itable_F6, 8 },
+    /* 0xf7 */ { itable_F7, 23 },
+    /* 0xf8 */ { itable_F8, 1 },
+    /* 0xf9 */ { itable_F9, 1 },
+    /* 0xfa */ { itable_FA, 1 },
+    /* 0xfb */ { itable_FB, 1 },
+    /* 0xfc */ { itable_FC, 1 },
+    /* 0xfd */ { itable_FD, 1 },
+    /* 0xfe */ { itable_FE, 2 },
+    /* 0xff */ { itable_FF, 27 },
+};
+
+const struct disasm_index * const itable_vexNASM_VEX_CLASSES324 =
+{
+    {
+        { NULL,          NULL,          NULL,          NULL,          },
+        { itable_vex010, itable_vex011, itable_vex012, itable_vex013, },
+        { itable_vex020, itable_vex021, itable_vex022, itable_vex023, },
+        { NULL,          itable_vex031, NULL,          itable_vex033, },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+    },
+    {
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { itable_xop080, NULL,          NULL,          NULL,          },
+        { itable_xop090, NULL,          NULL,          NULL,          },
+        { itable_xop0A0, NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+    },
+    {
+        { NULL,          NULL,          NULL,          NULL,          },
+        { itable_evex010,itable_evex011,itable_evex012,itable_evex013,},
+        { NULL,          itable_evex021,itable_evex022,itable_evex023,},
+        { itable_evex030,itable_evex031,itable_evex032,NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { itable_evex050,itable_evex051,itable_evex052,itable_evex053,},
+        { itable_evex060,itable_evex061,itable_evex062,itable_evex063,},
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+        { NULL,          NULL,          NULL,          NULL,          },
+    },
+};

_service:tar_scm:nasm-2.16.03.tar.xz/x86/insnsi.h Added

@@ -0,0 +1,2276 @@
+/* This file is auto-generated from insns.dat by insns.pl - don't edit it */
+
+/* This file in included by nasm.h */
+
+/* Instruction names */
+
+#ifndef NASM_INSNSI_H
+#define NASM_INSNSI_H 1
+
+enum opcode {
+	I_DB,
+	I_DW,
+	I_DD,
+	I_DQ,
+	I_DT,
+	I_DO,
+	I_DY,
+	I_DZ,
+	I_RESB,
+	I_RESW,
+	I_RESD,
+	I_RESQ,
+	I_REST,
+	I_RESO,
+	I_RESY,
+	I_RESZ,
+	I_INCBIN,
+	I_AAA,
+	I_AAD,
+	I_AAM,
+	I_AAS,
+	I_ADC,
+	I_ADD,
+	I_AND,
+	I_ARPL,
+	I_BB0_RESET,
+	I_BB1_RESET,
+	I_BOUND,
+	I_BSF,
+	I_BSR,
+	I_BSWAP,
+	I_BT,
+	I_BTC,
+	I_BTR,
+	I_BTS,
+	I_CALL,
+	I_CBW,
+	I_CDQ,
+	I_CDQE,
+	I_CLC,
+	I_CLD,
+	I_CLI,
+	I_CLTS,
+	I_CMC,
+	I_CMP,
+	I_CMPSB,
+	I_CMPSD,
+	I_CMPSQ,
+	I_CMPSW,
+	I_CMPXCHG,
+	I_CMPXCHG486,
+	I_CMPXCHG8B,
+	I_CMPXCHG16B,
+	I_CPUID,
+	I_CPU_READ,
+	I_CPU_WRITE,
+	I_CQO,
+	I_CWD,
+	I_CWDE,
+	I_DAA,
+	I_DAS,
+	I_DEC,
+	I_DIV,
+	I_DMINT,
+	I_EMMS,
+	I_ENTER,
+	I_EQU,
+	I_F2XM1,
+	I_FABS,
+	I_FADD,
+	I_FADDP,
+	I_FBLD,
+	I_FBSTP,
+	I_FCHS,
+	I_FCLEX,
+	I_FCMOVB,
+	I_FCMOVBE,
+	I_FCMOVE,
+	I_FCMOVNB,
+	I_FCMOVNBE,
+	I_FCMOVNE,
+	I_FCMOVNU,
+	I_FCMOVU,
+	I_FCOM,
+	I_FCOMI,
+	I_FCOMIP,
+	I_FCOMP,
+	I_FCOMPP,
+	I_FCOS,
+	I_FDECSTP,
+	I_FDISI,
+	I_FDIV,
+	I_FDIVP,
+	I_FDIVR,
+	I_FDIVRP,
+	I_FEMMS,
+	I_FENI,
+	I_FFREE,
+	I_FFREEP,
+	I_FIADD,
+	I_FICOM,
+	I_FICOMP,
+	I_FIDIV,
+	I_FIDIVR,
+	I_FILD,
+	I_FIMUL,
+	I_FINCSTP,
+	I_FINIT,
+	I_FIST,
+	I_FISTP,
+	I_FISTTP,
+	I_FISUB,
+	I_FISUBR,
+	I_FLD,
+	I_FLD1,
+	I_FLDCW,
+	I_FLDENV,
+	I_FLDL2E,
+	I_FLDL2T,
+	I_FLDLG2,
+	I_FLDLN2,
+	I_FLDPI,
+	I_FLDZ,
+	I_FMUL,
+	I_FMULP,
+	I_FNCLEX,
+	I_FNDISI,
+	I_FNENI,
+	I_FNINIT,
+	I_FNOP,
+	I_FNSAVE,
+	I_FNSTCW,
+	I_FNSTENV,
+	I_FNSTSW,
+	I_FPATAN,
+	I_FPREM,
+	I_FPREM1,
+	I_FPTAN,
+	I_FRNDINT,
+	I_FRSTOR,
+	I_FSAVE,
+	I_FSCALE,
+	I_FSETPM,
+	I_FSIN,
+	I_FSINCOS,
+	I_FSQRT,
+	I_FST,
+	I_FSTCW,
+	I_FSTENV,
+	I_FSTP,
+	I_FSTSW,
+	I_FSUB,
+	I_FSUBP,
+	I_FSUBR,
+	I_FSUBRP,
+	I_FTST,
+	I_FUCOM,
+	I_FUCOMI,
+	I_FUCOMIP,
+	I_FUCOMP,
+	I_FUCOMPP,
+	I_FXAM,
+	I_FXCH,
+	I_FXTRACT,
+	I_FYL2X,
+	I_FYL2XP1,
+	I_HLT,
+	I_IBTS,
+	I_ICEBP,
+	I_IDIV,
+	I_IMUL,
+	I_IN,
+	I_INC,
+	I_INSB,
+	I_INSD,
+	I_INSW,
+	I_INT,
+	I_INT01,
+	I_INT1,
+	I_INT03,
+	I_INT3,
+	I_INTO,
+	I_INVD,
+	I_INVPCID,
+	I_INVLPG,
+	I_INVLPGA,
+	I_IRET,
+	I_IRETD,
+	I_IRETQ,
+	I_IRETW,
+	I_JCXZ,
+	I_JECXZ,
+	I_JRCXZ,
+	I_JMP,
+	I_JMPE,
+	I_LAHF,
+	I_LAR,
+	I_LDS,
+	I_LEA,
+	I_LEAVE,
+	I_LES,
+	I_LFENCE,
+	I_LFS,
+	I_LGDT,
+	I_LGS,
+	I_LIDT,
+	I_LLDT,
+	I_LMSW,
+	I_LOADALL,
+	I_LOADALL286,
+	I_LODSB,
+	I_LODSD,
+	I_LODSQ,
+	I_LODSW,
+	I_LOOP,
+	I_LOOPE,
+	I_LOOPNE,
+	I_LOOPNZ,
+	I_LOOPZ,
+	I_LSL,
+	I_LSS,
+	I_LTR,
+	I_MFENCE,
+	I_MONITOR,
+	I_MONITORX,
+	I_MOV,
+	I_MOVD,
+	I_MOVQ,
+	I_MOVSB,
+	I_MOVSD,
+	I_MOVSQ,
+	I_MOVSW,
+	I_MOVSX,
+	I_MOVSXD,
+	I_MOVZX,
+	I_MUL,
+	I_MWAIT,
+	I_MWAITX,
+	I_NEG,
+	I_NOP,
+	I_NOT,
+	I_OR,
+	I_OUT,
+	I_OUTSB,
+	I_OUTSD,
+	I_OUTSW,
+	I_PACKSSDW,
+	I_PACKSSWB,
+	I_PACKUSWB,
+	I_PADDB,
+	I_PADDD,
+	I_PADDSB,
+	I_PADDSIW,
+	I_PADDSW,
+	I_PADDUSB,
+	I_PADDUSW,
+	I_PADDW,
+	I_PAND,
+	I_PANDN,
+	I_PAUSE,
+	I_PAVEB,
+	I_PAVGUSB,
+	I_PCMPEQB,
+	I_PCMPEQD,
+	I_PCMPEQW,
+	I_PCMPGTB,
+	I_PCMPGTD,
+	I_PCMPGTW,
+	I_PDISTIB,
+	I_PF2ID,
+	I_PFACC,
+	I_PFADD,
+	I_PFCMPEQ,
+	I_PFCMPGE,
+	I_PFCMPGT,
+	I_PFMAX,
+	I_PFMIN,
+	I_PFMUL,
+	I_PFRCP,
+	I_PFRCPIT1,
+	I_PFRCPIT2,
+	I_PFRSQIT1,
+	I_PFRSQRT,
+	I_PFSUB,
+	I_PFSUBR,
+	I_PI2FD,
+	I_PMACHRIW,
+	I_PMADDWD,
+	I_PMAGW,
+	I_PMULHRIW,
+	I_PMULHRWA,
+	I_PMULHRWC,
+	I_PMULHW,
+	I_PMULLW,
+	I_PMVGEZB,
+	I_PMVLZB,
+	I_PMVNZB,
+	I_PMVZB,
+	I_POP,
+	I_POPA,
+	I_POPAD,
+	I_POPAW,
+	I_POPF,
+	I_POPFD,
+	I_POPFQ,
+	I_POPFW,
+	I_POR,
+	I_PREFETCH,
+	I_PREFETCHW,
+	I_PSLLD,
+	I_PSLLQ,
+	I_PSLLW,
+	I_PSRAD,
+	I_PSRAW,
+	I_PSRLD,
+	I_PSRLQ,
+	I_PSRLW,
+	I_PSUBB,
+	I_PSUBD,
+	I_PSUBSB,
+	I_PSUBSIW,
+	I_PSUBSW,
+	I_PSUBUSB,
+	I_PSUBUSW,
+	I_PSUBW,
+	I_PUNPCKHBW,
+	I_PUNPCKHDQ,
+	I_PUNPCKHWD,
+	I_PUNPCKLBW,
+	I_PUNPCKLDQ,
+	I_PUNPCKLWD,
+	I_PUSH,
+	I_PUSHA,
+	I_PUSHAD,
+	I_PUSHAW,
+	I_PUSHF,
+	I_PUSHFD,
+	I_PUSHFQ,
+	I_PUSHFW,
+	I_PXOR,
+	I_RCL,
+	I_RCR,
+	I_RDSHR,
+	I_RDMSR,
+	I_RDPMC,
+	I_RDTSC,
+	I_RDTSCP,
+	I_RET,
+	I_RETF,
+	I_RETN,
+	I_RETW,
+	I_RETFW,
+	I_RETNW,
+	I_RETD,
+	I_RETFD,
+	I_RETND,
+	I_RETQ,
+	I_RETFQ,
+	I_RETNQ,
+	I_ROL,
+	I_ROR,
+	I_RDM,
+	I_RSDC,
+	I_RSLDT,
+	I_RSM,
+	I_RSTS,
+	I_SAHF,
+	I_SAL,
+	I_SALC,
+	I_SAR,
+	I_SBB,
+	I_SCASB,
+	I_SCASD,
+	I_SCASQ,
+	I_SCASW,
+	I_SFENCE,
+	I_SGDT,
+	I_SHL,
+	I_SHLD,
+	I_SHR,
+	I_SHRD,
+	I_SIDT,
+	I_SLDT,
+	I_SKINIT,
+	I_SMI,
+	I_SMINT,
+	I_SMINTOLD,
+	I_SMSW,
+	I_STC,
+	I_STD,
+	I_STI,
+	I_STOSB,
+	I_STOSD,
+	I_STOSQ,
+	I_STOSW,
+	I_STR,
+	I_SUB,
+	I_SVDC,
+	I_SVLDT,
+	I_SVTS,
+	I_SWAPGS,
+	I_SYSCALL,
+	I_SYSENTER,
+	I_SYSEXIT,
+	I_SYSRET,
+	I_TEST,
+	I_UD0,
+	I_UD1,
+	I_UD2B,
+	I_UD2,
+	I_UD2A,
+	I_UMOV,
+	I_VERR,
+	I_VERW,
+	I_FWAIT,
+	I_WBINVD,
+	I_WRSHR,
+	I_WRMSR,
+	I_XADD,
+	I_XBTS,
+	I_XCHG,
+	I_XLATB,
+	I_XLAT,
+	I_XOR,
+	I_CMOVA,
+	I_CMOVAE,
+	I_CMOVB,
+	I_CMOVBE,
+	I_CMOVC,
+	I_CMOVE,
+	I_CMOVG,
+	I_CMOVGE,
+	I_CMOVL,
+	I_CMOVLE,
+	I_CMOVNA,
+	I_CMOVNAE,
+	I_CMOVNB,
+	I_CMOVNBE,
+	I_CMOVNC,
+	I_CMOVNE,
+	I_CMOVNG,
+	I_CMOVNGE,
+	I_CMOVNL,
+	I_CMOVNLE,
+	I_CMOVNO,
+	I_CMOVNP,
+	I_CMOVNS,
+	I_CMOVNZ,
+	I_CMOVO,
+	I_CMOVP,
+	I_CMOVPE,
+	I_CMOVPO,
+	I_CMOVS,
+	I_CMOVZ,
+	I_JA,
+	I_JAE,
+	I_JB,
+	I_JBE,
+	I_JC,
+	I_JE,
+	I_JG,
+	I_JGE,
+	I_JL,
+	I_JLE,
+	I_JNA,
+	I_JNAE,
+	I_JNB,
+	I_JNBE,
+	I_JNC,
+	I_JNE,
+	I_JNG,
+	I_JNGE,
+	I_JNL,
+	I_JNLE,
+	I_JNO,
+	I_JNP,
+	I_JNS,
+	I_JNZ,
+	I_JO,
+	I_JP,
+	I_JPE,
+	I_JPO,
+	I_JS,
+	I_JZ,
+	I_SETA,
+	I_SETAE,
+	I_SETB,
+	I_SETBE,
+	I_SETC,
+	I_SETE,
+	I_SETG,
+	I_SETGE,
+	I_SETL,
+	I_SETLE,
+	I_SETNA,
+	I_SETNAE,
+	I_SETNB,
+	I_SETNBE,
+	I_SETNC,
+	I_SETNE,
+	I_SETNG,
+	I_SETNGE,
+	I_SETNL,
+	I_SETNLE,
+	I_SETNO,
+	I_SETNP,
+	I_SETNS,
+	I_SETNZ,
+	I_SETO,
+	I_SETP,
+	I_SETPE,
+	I_SETPO,
+	I_SETS,
+	I_SETZ,
+	I_ADDPS,
+	I_ADDSS,
+	I_ANDNPS,
+	I_ANDPS,
+	I_CMPEQPS,
+	I_CMPEQSS,
+	I_CMPLEPS,
+	I_CMPLESS,
+	I_CMPLTPS,
+	I_CMPLTSS,
+	I_CMPNEQPS,
+	I_CMPNEQSS,
+	I_CMPNLEPS,
+	I_CMPNLESS,
+	I_CMPNLTPS,
+	I_CMPNLTSS,
+	I_CMPORDPS,
+	I_CMPORDSS,
+	I_CMPUNORDPS,
+	I_CMPUNORDSS,
+	I_CMPPS,
+	I_CMPSS,
+	I_COMISS,
+	I_CVTPI2PS,
+	I_CVTPS2PI,
+	I_CVTSI2SS,
+	I_CVTSS2SI,
+	I_CVTTPS2PI,
+	I_CVTTSS2SI,
+	I_DIVPS,
+	I_DIVSS,
+	I_LDMXCSR,
+	I_MAXPS,
+	I_MAXSS,
+	I_MINPS,
+	I_MINSS,
+	I_MOVAPS,
+	I_MOVHPS,
+	I_MOVLHPS,
+	I_MOVLPS,
+	I_MOVHLPS,
+	I_MOVMSKPS,
+	I_MOVNTPS,
+	I_MOVSS,
+	I_MOVUPS,
+	I_MULPS,
+	I_MULSS,
+	I_ORPS,
+	I_RCPPS,
+	I_RCPSS,
+	I_RSQRTPS,
+	I_RSQRTSS,
+	I_SHUFPS,
+	I_SQRTPS,
+	I_SQRTSS,
+	I_STMXCSR,
+	I_SUBPS,
+	I_SUBSS,
+	I_UCOMISS,
+	I_UNPCKHPS,
+	I_UNPCKLPS,
+	I_XORPS,
+	I_FXRSTOR,
+	I_FXRSTOR64,
+	I_FXSAVE,
+	I_FXSAVE64,
+	I_XGETBV,
+	I_XSETBV,
+	I_XSAVE,
+	I_XSAVE64,
+	I_XSAVEC,
+	I_XSAVEC64,
+	I_XSAVEOPT,
+	I_XSAVEOPT64,
+	I_XSAVES,
+	I_XSAVES64,
+	I_XRSTOR,
+	I_XRSTOR64,
+	I_XRSTORS,
+	I_XRSTORS64,
+	I_PREFETCHNTA,
+	I_PREFETCHT0,
+	I_PREFETCHT1,
+	I_PREFETCHT2,
+	I_PREFETCHIT0,
+	I_PREFETCHIT1,
+	I_MASKMOVQ,
+	I_MOVNTQ,
+	I_PAVGB,
+	I_PAVGW,
+	I_PEXTRW,
+	I_PINSRW,
+	I_PMAXSW,
+	I_PMAXUB,
+	I_PMINSW,
+	I_PMINUB,
+	I_PMOVMSKB,
+	I_PMULHUW,
+	I_PSADBW,
+	I_PSHUFW,
+	I_PF2IW,
+	I_PFNACC,
+	I_PFPNACC,
+	I_PI2FW,
+	I_PSWAPD,
+	I_MASKMOVDQU,
+	I_CLFLUSH,
+	I_MOVNTDQ,
+	I_MOVNTI,
+	I_MOVNTPD,
+	I_MOVDQA,
+	I_MOVDQU,
+	I_MOVDQ2Q,
+	I_MOVQ2DQ,
+	I_PADDQ,
+	I_PMULUDQ,
+	I_PSHUFD,
+	I_PSHUFHW,
+	I_PSHUFLW,
+	I_PSLLDQ,
+	I_PSRLDQ,
+	I_PSUBQ,
+	I_PUNPCKHQDQ,
+	I_PUNPCKLQDQ,
+	I_ADDPD,
+	I_ADDSD,
+	I_ANDNPD,
+	I_ANDPD,
+	I_CMPEQPD,
+	I_CMPEQSD,
+	I_CMPLEPD,
+	I_CMPLESD,
+	I_CMPLTPD,
+	I_CMPLTSD,
+	I_CMPNEQPD,
+	I_CMPNEQSD,
+	I_CMPNLEPD,
+	I_CMPNLESD,
+	I_CMPNLTPD,
+	I_CMPNLTSD,
+	I_CMPORDPD,
+	I_CMPORDSD,
+	I_CMPUNORDPD,
+	I_CMPUNORDSD,
+	I_CMPPD,
+	I_COMISD,
+	I_CVTDQ2PD,
+	I_CVTDQ2PS,
+	I_CVTPD2DQ,
+	I_CVTPD2PI,
+	I_CVTPD2PS,
+	I_CVTPI2PD,
+	I_CVTPS2DQ,
+	I_CVTPS2PD,
+	I_CVTSD2SI,
+	I_CVTSD2SS,
+	I_CVTSI2SD,
+	I_CVTSS2SD,
+	I_CVTTPD2PI,
+	I_CVTTPD2DQ,
+	I_CVTTPS2DQ,
+	I_CVTTSD2SI,
+	I_DIVPD,
+	I_DIVSD,
+	I_MAXPD,
+	I_MAXSD,
+	I_MINPD,
+	I_MINSD,
+	I_MOVAPD,
+	I_MOVHPD,
+	I_MOVLPD,
+	I_MOVMSKPD,
+	I_MOVUPD,
+	I_MULPD,
+	I_MULSD,
+	I_ORPD,
+	I_SHUFPD,
+	I_SQRTPD,
+	I_SQRTSD,
+	I_SUBPD,
+	I_SUBSD,
+	I_UCOMISD,
+	I_UNPCKHPD,
+	I_UNPCKLPD,
+	I_XORPD,
+	I_ADDSUBPD,
+	I_ADDSUBPS,
+	I_HADDPD,
+	I_HADDPS,
+	I_HSUBPD,
+	I_HSUBPS,
+	I_LDDQU,
+	I_MOVDDUP,
+	I_MOVSHDUP,
+	I_MOVSLDUP,
+	I_CLGI,
+	I_STGI,
+	I_VMCALL,
+	I_VMCLEAR,
+	I_VMFUNC,
+	I_VMLAUNCH,
+	I_VMLOAD,
+	I_VMMCALL,
+	I_VMPTRLD,
+	I_VMPTRST,
+	I_VMREAD,
+	I_VMRESUME,
+	I_VMRUN,
+	I_VMSAVE,
+	I_VMWRITE,
+	I_VMXOFF,
+	I_VMXON,
+	I_INVEPT,
+	I_INVVPID,
+	I_PVALIDATE,
+	I_RMPADJUST,
+	I_VMGEXIT,
+	I_PABSB,
+	I_PABSW,
+	I_PABSD,
+	I_PALIGNR,
+	I_PHADDW,
+	I_PHADDD,
+	I_PHADDSW,
+	I_PHSUBW,
+	I_PHSUBD,
+	I_PHSUBSW,
+	I_PMADDUBSW,
+	I_PMULHRSW,
+	I_PSHUFB,
+	I_PSIGNB,
+	I_PSIGNW,
+	I_PSIGND,
+	I_EXTRQ,
+	I_INSERTQ,
+	I_MOVNTSD,
+	I_MOVNTSS,
+	I_LZCNT,
+	I_BLENDPD,
+	I_BLENDPS,
+	I_BLENDVPD,
+	I_BLENDVPS,
+	I_DPPD,
+	I_DPPS,
+	I_EXTRACTPS,
+	I_INSERTPS,
+	I_MOVNTDQA,
+	I_MPSADBW,
+	I_PACKUSDW,
+	I_PBLENDVB,
+	I_PBLENDW,
+	I_PCMPEQQ,
+	I_PEXTRB,
+	I_PEXTRD,
+	I_PEXTRQ,
+	I_PHMINPOSUW,
+	I_PINSRB,
+	I_PINSRD,
+	I_PINSRQ,
+	I_PMAXSB,
+	I_PMAXSD,
+	I_PMAXUD,
+	I_PMAXUW,
+	I_PMINSB,
+	I_PMINSD,
+	I_PMINUD,
+	I_PMINUW,
+	I_PMOVSXBW,
+	I_PMOVSXBD,
+	I_PMOVSXBQ,
+	I_PMOVSXWD,
+	I_PMOVSXWQ,
+	I_PMOVSXDQ,
+	I_PMOVZXBW,
+	I_PMOVZXBD,
+	I_PMOVZXBQ,
+	I_PMOVZXWD,
+	I_PMOVZXWQ,
+	I_PMOVZXDQ,
+	I_PMULDQ,
+	I_PMULLD,
+	I_PTEST,
+	I_ROUNDPD,
+	I_ROUNDPS,
+	I_ROUNDSD,
+	I_ROUNDSS,
+	I_CRC32,
+	I_PCMPESTRI,
+	I_PCMPESTRM,
+	I_PCMPISTRI,
+	I_PCMPISTRM,
+	I_PCMPGTQ,
+	I_POPCNT,
+	I_GETSEC,
+	I_PFRCPV,
+	I_PFRSQRTV,
+	I_MOVBE,
+	I_AESENC,
+	I_AESENCLAST,
+	I_AESDEC,
+	I_AESDECLAST,
+	I_AESIMC,
+	I_AESKEYGENASSIST,
+	I_VAESENC,
+	I_VAESENCLAST,
+	I_VAESDEC,
+	I_VAESDECLAST,
+	I_VAESIMC,
+	I_VAESKEYGENASSIST,
+	I_VADDPD,
+	I_VADDPS,
+	I_VADDSD,
+	I_VADDSS,
+	I_VADDSUBPD,
+	I_VADDSUBPS,
+	I_VANDPD,
+	I_VANDPS,
+	I_VANDNPD,
+	I_VANDNPS,
+	I_VBLENDPD,
+	I_VBLENDPS,
+	I_VBLENDVPD,
+	I_VBLENDVPS,
+	I_VBROADCASTSS,
+	I_VBROADCASTSD,
+	I_VBROADCASTF128,
+	I_VCMPEQ_OSPD,
+	I_VCMPEQPD,
+	I_VCMPLT_OSPD,
+	I_VCMPLTPD,
+	I_VCMPLE_OSPD,
+	I_VCMPLEPD,
+	I_VCMPUNORD_QPD,
+	I_VCMPUNORDPD,
+	I_VCMPNEQ_UQPD,
+	I_VCMPNEQPD,
+	I_VCMPNLT_USPD,
+	I_VCMPNLTPD,
+	I_VCMPNLE_USPD,
+	I_VCMPNLEPD,
+	I_VCMPORD_QPD,
+	I_VCMPORDPD,
+	I_VCMPEQ_UQPD,
+	I_VCMPNGE_USPD,
+	I_VCMPNGEPD,
+	I_VCMPNGT_USPD,
+	I_VCMPNGTPD,
+	I_VCMPFALSE_OQPD,
+	I_VCMPFALSEPD,
+	I_VCMPNEQ_OQPD,
+	I_VCMPGE_OSPD,
+	I_VCMPGEPD,
+	I_VCMPGT_OSPD,
+	I_VCMPGTPD,
+	I_VCMPTRUE_UQPD,
+	I_VCMPTRUEPD,
+	I_VCMPLT_OQPD,
+	I_VCMPLE_OQPD,
+	I_VCMPUNORD_SPD,
+	I_VCMPNEQ_USPD,
+	I_VCMPNLT_UQPD,
+	I_VCMPNLE_UQPD,
+	I_VCMPORD_SPD,
+	I_VCMPEQ_USPD,
+	I_VCMPNGE_UQPD,
+	I_VCMPNGT_UQPD,
+	I_VCMPFALSE_OSPD,
+	I_VCMPNEQ_OSPD,
+	I_VCMPGE_OQPD,
+	I_VCMPGT_OQPD,
+	I_VCMPTRUE_USPD,
+	I_VCMPPD,
+	I_VCMPEQ_OSPS,
+	I_VCMPEQPS,
+	I_VCMPLT_OSPS,
+	I_VCMPLTPS,
+	I_VCMPLE_OSPS,
+	I_VCMPLEPS,
+	I_VCMPUNORD_QPS,
+	I_VCMPUNORDPS,
+	I_VCMPNEQ_UQPS,
+	I_VCMPNEQPS,
+	I_VCMPNLT_USPS,
+	I_VCMPNLTPS,
+	I_VCMPNLE_USPS,
+	I_VCMPNLEPS,
+	I_VCMPORD_QPS,
+	I_VCMPORDPS,
+	I_VCMPEQ_UQPS,
+	I_VCMPNGE_USPS,
+	I_VCMPNGEPS,
+	I_VCMPNGT_USPS,
+	I_VCMPNGTPS,
+	I_VCMPFALSE_OQPS,
+	I_VCMPFALSEPS,
+	I_VCMPNEQ_OQPS,
+	I_VCMPGE_OSPS,
+	I_VCMPGEPS,
+	I_VCMPGT_OSPS,
+	I_VCMPGTPS,
+	I_VCMPTRUE_UQPS,
+	I_VCMPTRUEPS,
+	I_VCMPLT_OQPS,
+	I_VCMPLE_OQPS,
+	I_VCMPUNORD_SPS,
+	I_VCMPNEQ_USPS,
+	I_VCMPNLT_UQPS,
+	I_VCMPNLE_UQPS,
+	I_VCMPORD_SPS,
+	I_VCMPEQ_USPS,
+	I_VCMPNGE_UQPS,
+	I_VCMPNGT_UQPS,
+	I_VCMPFALSE_OSPS,
+	I_VCMPNEQ_OSPS,
+	I_VCMPGE_OQPS,
+	I_VCMPGT_OQPS,
+	I_VCMPTRUE_USPS,
+	I_VCMPPS,
+	I_VCMPEQ_OSSD,
+	I_VCMPEQSD,
+	I_VCMPLT_OSSD,
+	I_VCMPLTSD,
+	I_VCMPLE_OSSD,
+	I_VCMPLESD,
+	I_VCMPUNORD_QSD,
+	I_VCMPUNORDSD,
+	I_VCMPNEQ_UQSD,
+	I_VCMPNEQSD,
+	I_VCMPNLT_USSD,
+	I_VCMPNLTSD,
+	I_VCMPNLE_USSD,
+	I_VCMPNLESD,
+	I_VCMPORD_QSD,
+	I_VCMPORDSD,
+	I_VCMPEQ_UQSD,
+	I_VCMPNGE_USSD,
+	I_VCMPNGESD,
+	I_VCMPNGT_USSD,
+	I_VCMPNGTSD,
+	I_VCMPFALSE_OQSD,
+	I_VCMPFALSESD,
+	I_VCMPNEQ_OQSD,
+	I_VCMPGE_OSSD,
+	I_VCMPGESD,
+	I_VCMPGT_OSSD,
+	I_VCMPGTSD,
+	I_VCMPTRUE_UQSD,
+	I_VCMPTRUESD,
+	I_VCMPLT_OQSD,
+	I_VCMPLE_OQSD,
+	I_VCMPUNORD_SSD,
+	I_VCMPNEQ_USSD,
+	I_VCMPNLT_UQSD,
+	I_VCMPNLE_UQSD,
+	I_VCMPORD_SSD,
+	I_VCMPEQ_USSD,
+	I_VCMPNGE_UQSD,
+	I_VCMPNGT_UQSD,
+	I_VCMPFALSE_OSSD,
+	I_VCMPNEQ_OSSD,
+	I_VCMPGE_OQSD,
+	I_VCMPGT_OQSD,
+	I_VCMPTRUE_USSD,
+	I_VCMPSD,
+	I_VCMPEQ_OSSS,
+	I_VCMPEQSS,
+	I_VCMPLT_OSSS,
+	I_VCMPLTSS,
+	I_VCMPLE_OSSS,
+	I_VCMPLESS,
+	I_VCMPUNORD_QSS,
+	I_VCMPUNORDSS,
+	I_VCMPNEQ_UQSS,
+	I_VCMPNEQSS,
+	I_VCMPNLT_USSS,
+	I_VCMPNLTSS,
+	I_VCMPNLE_USSS,
+	I_VCMPNLESS,
+	I_VCMPORD_QSS,
+	I_VCMPORDSS,
+	I_VCMPEQ_UQSS,
+	I_VCMPNGE_USSS,
+	I_VCMPNGESS,
+	I_VCMPNGT_USSS,
+	I_VCMPNGTSS,
+	I_VCMPFALSE_OQSS,
+	I_VCMPFALSESS,
+	I_VCMPNEQ_OQSS,
+	I_VCMPGE_OSSS,
+	I_VCMPGESS,
+	I_VCMPGT_OSSS,
+	I_VCMPGTSS,
+	I_VCMPTRUE_UQSS,
+	I_VCMPTRUESS,
+	I_VCMPLT_OQSS,
+	I_VCMPLE_OQSS,
+	I_VCMPUNORD_SSS,
+	I_VCMPNEQ_USSS,
+	I_VCMPNLT_UQSS,
+	I_VCMPNLE_UQSS,
+	I_VCMPORD_SSS,
+	I_VCMPEQ_USSS,
+	I_VCMPNGE_UQSS,
+	I_VCMPNGT_UQSS,
+	I_VCMPFALSE_OSSS,
+	I_VCMPNEQ_OSSS,
+	I_VCMPGE_OQSS,
+	I_VCMPGT_OQSS,
+	I_VCMPTRUE_USSS,
+	I_VCMPSS,
+	I_VCOMISD,
+	I_VCOMISS,
+	I_VCVTDQ2PD,
+	I_VCVTDQ2PS,
+	I_VCVTPD2DQ,
+	I_VCVTPD2PS,
+	I_VCVTPS2DQ,
+	I_VCVTPS2PD,
+	I_VCVTSD2SI,
+	I_VCVTSD2SS,
+	I_VCVTSI2SD,
+	I_VCVTSI2SS,
+	I_VCVTSS2SD,
+	I_VCVTSS2SI,
+	I_VCVTTPD2DQ,
+	I_VCVTTPS2DQ,
+	I_VCVTTSD2SI,
+	I_VCVTTSS2SI,
+	I_VDIVPD,
+	I_VDIVPS,
+	I_VDIVSD,
+	I_VDIVSS,
+	I_VDPPD,
+	I_VDPPS,
+	I_VEXTRACTF128,
+	I_VEXTRACTPS,
+	I_VHADDPD,
+	I_VHADDPS,
+	I_VHSUBPD,
+	I_VHSUBPS,
+	I_VINSERTF128,
+	I_VINSERTPS,
+	I_VLDDQU,
+	I_VLDQQU,
+	I_VLDMXCSR,
+	I_VMASKMOVDQU,
+	I_VMASKMOVPS,
+	I_VMASKMOVPD,
+	I_VMAXPD,
+	I_VMAXPS,
+	I_VMAXSD,
+	I_VMAXSS,
+	I_VMINPD,
+	I_VMINPS,
+	I_VMINSD,
+	I_VMINSS,
+	I_VMOVAPD,
+	I_VMOVAPS,
+	I_VMOVD,
+	I_VMOVQ,
+	I_VMOVDDUP,
+	I_VMOVDQA,
+	I_VMOVQQA,
+	I_VMOVDQU,
+	I_VMOVQQU,
+	I_VMOVHLPS,
+	I_VMOVHPD,
+	I_VMOVHPS,
+	I_VMOVLHPS,
+	I_VMOVLPD,
+	I_VMOVLPS,
+	I_VMOVMSKPD,
+	I_VMOVMSKPS,
+	I_VMOVNTDQ,
+	I_VMOVNTQQ,
+	I_VMOVNTDQA,
+	I_VMOVNTPD,
+	I_VMOVNTPS,
+	I_VMOVSD,
+	I_VMOVSHDUP,
+	I_VMOVSLDUP,
+	I_VMOVSS,
+	I_VMOVUPD,
+	I_VMOVUPS,
+	I_VMPSADBW,
+	I_VMULPD,
+	I_VMULPS,
+	I_VMULSD,
+	I_VMULSS,
+	I_VORPD,
+	I_VORPS,
+	I_VPABSB,
+	I_VPABSW,
+	I_VPABSD,
+	I_VPACKSSWB,
+	I_VPACKSSDW,
+	I_VPACKUSWB,
+	I_VPACKUSDW,
+	I_VPADDB,
+	I_VPADDW,
+	I_VPADDD,
+	I_VPADDQ,
+	I_VPADDSB,
+	I_VPADDSW,
+	I_VPADDUSB,
+	I_VPADDUSW,
+	I_VPALIGNR,
+	I_VPAND,
+	I_VPANDN,
+	I_VPAVGB,
+	I_VPAVGW,
+	I_VPBLENDVB,
+	I_VPBLENDW,
+	I_VPCMPESTRI,
+	I_VPCMPESTRM,
+	I_VPCMPISTRI,
+	I_VPCMPISTRM,
+	I_VPCMPEQB,
+	I_VPCMPEQW,
+	I_VPCMPEQD,
+	I_VPCMPEQQ,
+	I_VPCMPGTB,
+	I_VPCMPGTW,
+	I_VPCMPGTD,
+	I_VPCMPGTQ,
+	I_VPERMILPD,
+	I_VPERMILPS,
+	I_VPERM2F128,
+	I_VPEXTRB,
+	I_VPEXTRW,
+	I_VPEXTRD,
+	I_VPEXTRQ,
+	I_VPHADDW,
+	I_VPHADDD,
+	I_VPHADDSW,
+	I_VPHMINPOSUW,
+	I_VPHSUBW,
+	I_VPHSUBD,
+	I_VPHSUBSW,
+	I_VPINSRB,
+	I_VPINSRW,
+	I_VPINSRD,
+	I_VPINSRQ,
+	I_VPMADDWD,
+	I_VPMADDUBSW,
+	I_VPMAXSB,
+	I_VPMAXSW,
+	I_VPMAXSD,
+	I_VPMAXUB,
+	I_VPMAXUW,
+	I_VPMAXUD,
+	I_VPMINSB,
+	I_VPMINSW,
+	I_VPMINSD,
+	I_VPMINUB,
+	I_VPMINUW,
+	I_VPMINUD,
+	I_VPMOVMSKB,
+	I_VPMOVSXBW,
+	I_VPMOVSXBD,
+	I_VPMOVSXBQ,
+	I_VPMOVSXWD,
+	I_VPMOVSXWQ,
+	I_VPMOVSXDQ,
+	I_VPMOVZXBW,
+	I_VPMOVZXBD,
+	I_VPMOVZXBQ,
+	I_VPMOVZXWD,
+	I_VPMOVZXWQ,
+	I_VPMOVZXDQ,
+	I_VPMULHUW,
+	I_VPMULHRSW,
+	I_VPMULHW,
+	I_VPMULLW,
+	I_VPMULLD,
+	I_VPMULUDQ,
+	I_VPMULDQ,
+	I_VPOR,
+	I_VPSADBW,
+	I_VPSHUFB,
+	I_VPSHUFD,
+	I_VPSHUFHW,
+	I_VPSHUFLW,
+	I_VPSIGNB,
+	I_VPSIGNW,
+	I_VPSIGND,
+	I_VPSLLDQ,
+	I_VPSRLDQ,
+	I_VPSLLW,
+	I_VPSLLD,
+	I_VPSLLQ,
+	I_VPSRAW,
+	I_VPSRAD,
+	I_VPSRLW,
+	I_VPSRLD,
+	I_VPSRLQ,
+	I_VPTEST,
+	I_VPSUBB,
+	I_VPSUBW,
+	I_VPSUBD,
+	I_VPSUBQ,
+	I_VPSUBSB,
+	I_VPSUBSW,
+	I_VPSUBUSB,
+	I_VPSUBUSW,
+	I_VPUNPCKHBW,
+	I_VPUNPCKHWD,
+	I_VPUNPCKHDQ,
+	I_VPUNPCKHQDQ,
+	I_VPUNPCKLBW,
+	I_VPUNPCKLWD,
+	I_VPUNPCKLDQ,
+	I_VPUNPCKLQDQ,
+	I_VPXOR,
+	I_VRCPPS,
+	I_VRCPSS,
+	I_VRSQRTPS,
+	I_VRSQRTSS,
+	I_VROUNDPD,
+	I_VROUNDPS,
+	I_VROUNDSD,
+	I_VROUNDSS,
+	I_VSHUFPD,
+	I_VSHUFPS,
+	I_VSQRTPD,
+	I_VSQRTPS,
+	I_VSQRTSD,
+	I_VSQRTSS,
+	I_VSTMXCSR,
+	I_VSUBPD,
+	I_VSUBPS,
+	I_VSUBSD,
+	I_VSUBSS,
+	I_VTESTPS,
+	I_VTESTPD,
+	I_VUCOMISD,
+	I_VUCOMISS,
+	I_VUNPCKHPD,
+	I_VUNPCKHPS,
+	I_VUNPCKLPD,
+	I_VUNPCKLPS,
+	I_VXORPD,
+	I_VXORPS,
+	I_VZEROALL,
+	I_VZEROUPPER,
+	I_PCLMULLQLQDQ,
+	I_PCLMULHQLQDQ,
+	I_PCLMULLQHQDQ,
+	I_PCLMULHQHQDQ,
+	I_PCLMULQDQ,
+	I_VPCLMULLQLQDQ,
+	I_VPCLMULHQLQDQ,
+	I_VPCLMULLQHQDQ,
+	I_VPCLMULHQHQDQ,
+	I_VPCLMULQDQ,
+	I_VFMADD132PS,
+	I_VFMADD132PD,
+	I_VFMADD312PS,
+	I_VFMADD312PD,
+	I_VFMADD213PS,
+	I_VFMADD213PD,
+	I_VFMADD123PS,
+	I_VFMADD123PD,
+	I_VFMADD231PS,
+	I_VFMADD231PD,
+	I_VFMADD321PS,
+	I_VFMADD321PD,
+	I_VFMADDSUB132PS,
+	I_VFMADDSUB132PD,
+	I_VFMADDSUB312PS,
+	I_VFMADDSUB312PD,
+	I_VFMADDSUB213PS,
+	I_VFMADDSUB213PD,
+	I_VFMADDSUB123PS,
+	I_VFMADDSUB123PD,
+	I_VFMADDSUB231PS,
+	I_VFMADDSUB231PD,
+	I_VFMADDSUB321PS,
+	I_VFMADDSUB321PD,
+	I_VFMSUB132PS,
+	I_VFMSUB132PD,
+	I_VFMSUB312PS,
+	I_VFMSUB312PD,
+	I_VFMSUB213PS,
+	I_VFMSUB213PD,
+	I_VFMSUB123PS,
+	I_VFMSUB123PD,
+	I_VFMSUB231PS,
+	I_VFMSUB231PD,
+	I_VFMSUB321PS,
+	I_VFMSUB321PD,
+	I_VFMSUBADD132PS,
+	I_VFMSUBADD132PD,
+	I_VFMSUBADD312PS,
+	I_VFMSUBADD312PD,
+	I_VFMSUBADD213PS,
+	I_VFMSUBADD213PD,
+	I_VFMSUBADD123PS,
+	I_VFMSUBADD123PD,
+	I_VFMSUBADD231PS,
+	I_VFMSUBADD231PD,
+	I_VFMSUBADD321PS,
+	I_VFMSUBADD321PD,
+	I_VFNMADD132PS,
+	I_VFNMADD132PD,
+	I_VFNMADD312PS,
+	I_VFNMADD312PD,
+	I_VFNMADD213PS,
+	I_VFNMADD213PD,
+	I_VFNMADD123PS,
+	I_VFNMADD123PD,
+	I_VFNMADD231PS,
+	I_VFNMADD231PD,
+	I_VFNMADD321PS,
+	I_VFNMADD321PD,
+	I_VFNMSUB132PS,
+	I_VFNMSUB132PD,
+	I_VFNMSUB312PS,
+	I_VFNMSUB312PD,
+	I_VFNMSUB213PS,
+	I_VFNMSUB213PD,
+	I_VFNMSUB123PS,
+	I_VFNMSUB123PD,
+	I_VFNMSUB231PS,
+	I_VFNMSUB231PD,
+	I_VFNMSUB321PS,
+	I_VFNMSUB321PD,
+	I_VFMADD132SS,
+	I_VFMADD132SD,
+	I_VFMADD312SS,
+	I_VFMADD312SD,
+	I_VFMADD213SS,
+	I_VFMADD213SD,
+	I_VFMADD123SS,
+	I_VFMADD123SD,
+	I_VFMADD231SS,
+	I_VFMADD231SD,
+	I_VFMADD321SS,
+	I_VFMADD321SD,
+	I_VFMSUB132SS,
+	I_VFMSUB132SD,
+	I_VFMSUB312SS,
+	I_VFMSUB312SD,
+	I_VFMSUB213SS,
+	I_VFMSUB213SD,
+	I_VFMSUB123SS,
+	I_VFMSUB123SD,
+	I_VFMSUB231SS,
+	I_VFMSUB231SD,
+	I_VFMSUB321SS,
+	I_VFMSUB321SD,
+	I_VFNMADD132SS,
+	I_VFNMADD132SD,
+	I_VFNMADD312SS,
+	I_VFNMADD312SD,
+	I_VFNMADD213SS,
+	I_VFNMADD213SD,
+	I_VFNMADD123SS,
+	I_VFNMADD123SD,
+	I_VFNMADD231SS,
+	I_VFNMADD231SD,
+	I_VFNMADD321SS,
+	I_VFNMADD321SD,
+	I_VFNMSUB132SS,
+	I_VFNMSUB132SD,
+	I_VFNMSUB312SS,
+	I_VFNMSUB312SD,
+	I_VFNMSUB213SS,
+	I_VFNMSUB213SD,
+	I_VFNMSUB123SS,
+	I_VFNMSUB123SD,
+	I_VFNMSUB231SS,
+	I_VFNMSUB231SD,
+	I_VFNMSUB321SS,
+	I_VFNMSUB321SD,
+	I_RDFSBASE,
+	I_RDGSBASE,
+	I_RDRAND,
+	I_WRFSBASE,
+	I_WRGSBASE,
+	I_VCVTPH2PS,
+	I_VCVTPS2PH,
+	I_ADCX,
+	I_ADOX,
+	I_RDSEED,
+	I_CLAC,
+	I_STAC,
+	I_XSTORE,
+	I_XCRYPTECB,
+	I_XCRYPTCBC,
+	I_XCRYPTCTR,
+	I_XCRYPTCFB,
+	I_XCRYPTOFB,
+	I_MONTMUL,
+	I_XSHA1,
+	I_XSHA256,
+	I_LLWPCB,
+	I_SLWPCB,
+	I_LWPVAL,
+	I_LWPINS,
+	I_VFMADDPD,
+	I_VFMADDPS,
+	I_VFMADDSD,
+	I_VFMADDSS,
+	I_VFMADDSUBPD,
+	I_VFMADDSUBPS,
+	I_VFMSUBADDPD,
+	I_VFMSUBADDPS,
+	I_VFMSUBPD,
+	I_VFMSUBPS,
+	I_VFMSUBSD,
+	I_VFMSUBSS,
+	I_VFNMADDPD,
+	I_VFNMADDPS,
+	I_VFNMADDSD,
+	I_VFNMADDSS,
+	I_VFNMSUBPD,
+	I_VFNMSUBPS,
+	I_VFNMSUBSD,
+	I_VFNMSUBSS,
+	I_VFRCZPD,
+	I_VFRCZPS,
+	I_VFRCZSD,
+	I_VFRCZSS,
+	I_VPCMOV,
+	I_VPCOMB,
+	I_VPCOMD,
+	I_VPCOMQ,
+	I_VPCOMUB,
+	I_VPCOMUD,
+	I_VPCOMUQ,
+	I_VPCOMUW,
+	I_VPCOMW,
+	I_VPHADDBD,
+	I_VPHADDBQ,
+	I_VPHADDBW,
+	I_VPHADDDQ,
+	I_VPHADDUBD,
+	I_VPHADDUBQ,
+	I_VPHADDUBW,
+	I_VPHADDUDQ,
+	I_VPHADDUWD,
+	I_VPHADDUWQ,
+	I_VPHADDWD,
+	I_VPHADDWQ,
+	I_VPHSUBBW,
+	I_VPHSUBDQ,
+	I_VPHSUBWD,
+	I_VPMACSDD,
+	I_VPMACSDQH,
+	I_VPMACSDQL,
+	I_VPMACSSDD,
+	I_VPMACSSDQH,
+	I_VPMACSSDQL,
+	I_VPMACSSWD,
+	I_VPMACSSWW,
+	I_VPMACSWD,
+	I_VPMACSWW,
+	I_VPMADCSSWD,
+	I_VPMADCSWD,
+	I_VPPERM,
+	I_VPROTB,
+	I_VPROTD,
+	I_VPROTQ,
+	I_VPROTW,
+	I_VPSHAB,
+	I_VPSHAD,
+	I_VPSHAQ,
+	I_VPSHAW,
+	I_VPSHLB,
+	I_VPSHLD,
+	I_VPSHLQ,
+	I_VPSHLW,
+	I_VBROADCASTI128,
+	I_VPBLENDD,
+	I_VPBROADCASTB,
+	I_VPBROADCASTW,
+	I_VPBROADCASTD,
+	I_VPBROADCASTQ,
+	I_VPERMD,
+	I_VPERMPD,
+	I_VPERMPS,
+	I_VPERMQ,
+	I_VPERM2I128,
+	I_VEXTRACTI128,
+	I_VINSERTI128,
+	I_VPMASKMOVD,
+	I_VPMASKMOVQ,
+	I_VPSLLVD,
+	I_VPSLLVQ,
+	I_VPSRAVD,
+	I_VPSRLVD,
+	I_VPSRLVQ,
+	I_VGATHERDPD,
+	I_VGATHERQPD,
+	I_VGATHERDPS,
+	I_VGATHERQPS,
+	I_VPGATHERDD,
+	I_VPGATHERQD,
+	I_VPGATHERDQ,
+	I_VPGATHERQQ,
+	I_XABORT,
+	I_XBEGIN,
+	I_XEND,
+	I_XTEST,
+	I_ANDN,
+	I_BEXTR,
+	I_BLCI,
+	I_BLCIC,
+	I_BLSI,
+	I_BLSIC,
+	I_BLCFILL,
+	I_BLSFILL,
+	I_BLCMSK,
+	I_BLSMSK,
+	I_BLSR,
+	I_BLCS,
+	I_BZHI,
+	I_MULX,
+	I_PDEP,
+	I_PEXT,
+	I_RORX,
+	I_SARX,
+	I_SHLX,
+	I_SHRX,
+	I_TZCNT,
+	I_TZMSK,
+	I_T1MSKC,
+	I_PREFETCHWT1,
+	I_BNDMK,
+	I_BNDCL,
+	I_BNDCU,
+	I_BNDCN,
+	I_BNDMOV,
+	I_BNDLDX,
+	I_BNDSTX,
+	I_SHA1MSG1,
+	I_SHA1MSG2,
+	I_SHA1NEXTE,
+	I_SHA1RNDS4,
+	I_SHA256MSG1,
+	I_SHA256MSG2,
+	I_SHA256RNDS2,
+	I_VSHA512MSG1,
+	I_VSHA512MSG2,
+	I_VSHA512RNDS2,
+	I_VSM3MSG1,
+	I_VSM3MSG2,
+	I_VSM3RNDS2,
+	I_VSM4KEY4,
+	I_VSM4RNDS4,
+	I_VBCSTNEBF16PS,
+	I_VBCSTNESH2PS,
+	I_VCVTNEEBF162PS,
+	I_VCVTNEEPH2PS,
+	I_VCVTNEOBF162PS,
+	I_VCVTNEOPH2PS,
+	I_VCVTNEPS2BF16,
+	I_VPDPBSSD,
+	I_VPDPBSSDS,
+	I_VPDPBSUD,
+	I_VPDPBSUDS,
+	I_VPDPBUUD,
+	I_VPDPBUUDS,
+	I_VPMADD52HUQ,
+	I_VPMADD52LUQ,
+	I_KADDB,
+	I_KADDD,
+	I_KADDQ,
+	I_KADDW,
+	I_KANDB,
+	I_KANDD,
+	I_KANDNB,
+	I_KANDND,
+	I_KANDNQ,
+	I_KANDNW,
+	I_KANDQ,
+	I_KANDW,
+	I_KMOVB,
+	I_KMOVD,
+	I_KMOVQ,
+	I_KMOVW,
+	I_KNOTB,
+	I_KNOTD,
+	I_KNOTQ,
+	I_KNOTW,
+	I_KORB,
+	I_KORD,
+	I_KORQ,
+	I_KORW,
+	I_KORTESTB,
+	I_KORTESTD,
+	I_KORTESTQ,
+	I_KORTESTW,
+	I_KSHIFTLB,
+	I_KSHIFTLD,
+	I_KSHIFTLQ,
+	I_KSHIFTLW,
+	I_KSHIFTRB,
+	I_KSHIFTRD,
+	I_KSHIFTRQ,
+	I_KSHIFTRW,
+	I_KTESTB,
+	I_KTESTD,
+	I_KTESTQ,
+	I_KTESTW,
+	I_KUNPCKBW,
+	I_KUNPCKDQ,
+	I_KUNPCKWD,
+	I_KXNORB,
+	I_KXNORD,
+	I_KXNORQ,
+	I_KXNORW,
+	I_KXORB,
+	I_KXORD,
+	I_KXORQ,
+	I_KXORW,
+	I_KADD,
+	I_KAND,
+	I_KANDN,
+	I_KMOV,
+	I_KNOT,
+	I_KOR,
+	I_KORTEST,
+	I_KSHIFTL,
+	I_KSHIFTR,
+	I_KTEST,
+	I_KUNPCK,
+	I_KXNOR,
+	I_KXOR,
+	I_VALIGND,
+	I_VALIGNQ,
+	I_VBLENDMPD,
+	I_VBLENDMPS,
+	I_VBROADCASTF32X2,
+	I_VBROADCASTF32X4,
+	I_VBROADCASTF32X8,
+	I_VBROADCASTF64X2,
+	I_VBROADCASTF64X4,
+	I_VBROADCASTI32X2,
+	I_VBROADCASTI32X4,
+	I_VBROADCASTI32X8,
+	I_VBROADCASTI64X2,
+	I_VBROADCASTI64X4,
+	I_VCMPEQ_OQPD,
+	I_VCMPEQ_OQPS,
+	I_VCMPEQ_OQSD,
+	I_VCMPEQ_OQSS,
+	I_VCOMPRESSPD,
+	I_VCOMPRESSPS,
+	I_VCVTPD2QQ,
+	I_VCVTPD2UDQ,
+	I_VCVTPD2UQQ,
+	I_VCVTPS2QQ,
+	I_VCVTPS2UDQ,
+	I_VCVTPS2UQQ,
+	I_VCVTQQ2PD,
+	I_VCVTQQ2PS,
+	I_VCVTSD2USI,
+	I_VCVTSS2USI,
+	I_VCVTTPD2QQ,
+	I_VCVTTPD2UDQ,
+	I_VCVTTPD2UQQ,
+	I_VCVTTPS2QQ,
+	I_VCVTTPS2UDQ,
+	I_VCVTTPS2UQQ,
+	I_VCVTTSD2USI,
+	I_VCVTTSS2USI,
+	I_VCVTUDQ2PD,
+	I_VCVTUDQ2PS,
+	I_VCVTUQQ2PD,
+	I_VCVTUQQ2PS,
+	I_VCVTUSI2SD,
+	I_VCVTUSI2SS,
+	I_VDBPSADBW,
+	I_VEXP2PD,
+	I_VEXP2PS,
+	I_VEXPANDPD,
+	I_VEXPANDPS,
+	I_VEXTRACTF32X4,
+	I_VEXTRACTF32X8,
+	I_VEXTRACTF64X2,
+	I_VEXTRACTF64X4,
+	I_VEXTRACTI32X4,
+	I_VEXTRACTI32X8,
+	I_VEXTRACTI64X2,
+	I_VEXTRACTI64X4,
+	I_VFIXUPIMMPD,
+	I_VFIXUPIMMPS,
+	I_VFIXUPIMMSD,
+	I_VFIXUPIMMSS,
+	I_VFPCLASSPD,
+	I_VFPCLASSPS,
+	I_VFPCLASSSD,
+	I_VFPCLASSSS,
+	I_VGATHERPF0DPD,
+	I_VGATHERPF0DPS,
+	I_VGATHERPF0QPD,
+	I_VGATHERPF0QPS,
+	I_VGATHERPF1DPD,
+	I_VGATHERPF1DPS,
+	I_VGATHERPF1QPD,
+	I_VGATHERPF1QPS,
+	I_VGETEXPPD,
+	I_VGETEXPPS,
+	I_VGETEXPSD,
+	I_VGETEXPSS,
+	I_VGETMANTPD,
+	I_VGETMANTPS,
+	I_VGETMANTSD,
+	I_VGETMANTSS,
+	I_VINSERTF32X4,
+	I_VINSERTF32X8,
+	I_VINSERTF64X2,
+	I_VINSERTF64X4,
+	I_VINSERTI32X4,
+	I_VINSERTI32X8,
+	I_VINSERTI64X2,
+	I_VINSERTI64X4,
+	I_VMOVDQA32,
+	I_VMOVDQA64,
+	I_VMOVDQU16,
+	I_VMOVDQU32,
+	I_VMOVDQU64,
+	I_VMOVDQU8,
+	I_VPABSQ,
+	I_VPANDD,
+	I_VPANDND,
+	I_VPANDNQ,
+	I_VPANDQ,
+	I_VPBLENDMB,
+	I_VPBLENDMD,
+	I_VPBLENDMQ,
+	I_VPBLENDMW,
+	I_VPBROADCASTMB2Q,
+	I_VPBROADCASTMW2D,
+	I_VPCMPEQUB,
+	I_VPCMPEQUD,
+	I_VPCMPEQUQ,
+	I_VPCMPEQUW,
+	I_VPCMPGEB,
+	I_VPCMPGED,
+	I_VPCMPGEQ,
+	I_VPCMPGEUB,
+	I_VPCMPGEUD,
+	I_VPCMPGEUQ,
+	I_VPCMPGEUW,
+	I_VPCMPGEW,
+	I_VPCMPGTUB,
+	I_VPCMPGTUD,
+	I_VPCMPGTUQ,
+	I_VPCMPGTUW,
+	I_VPCMPLEB,
+	I_VPCMPLED,
+	I_VPCMPLEQ,
+	I_VPCMPLEUB,
+	I_VPCMPLEUD,
+	I_VPCMPLEUQ,
+	I_VPCMPLEUW,
+	I_VPCMPLEW,
+	I_VPCMPLTB,
+	I_VPCMPLTD,
+	I_VPCMPLTQ,
+	I_VPCMPLTUB,
+	I_VPCMPLTUD,
+	I_VPCMPLTUQ,
+	I_VPCMPLTUW,
+	I_VPCMPLTW,
+	I_VPCMPNEQB,
+	I_VPCMPNEQD,
+	I_VPCMPNEQQ,
+	I_VPCMPNEQUB,
+	I_VPCMPNEQUD,
+	I_VPCMPNEQUQ,
+	I_VPCMPNEQUW,
+	I_VPCMPNEQW,
+	I_VPCMPNGTB,
+	I_VPCMPNGTD,
+	I_VPCMPNGTQ,
+	I_VPCMPNGTUB,
+	I_VPCMPNGTUD,
+	I_VPCMPNGTUQ,
+	I_VPCMPNGTUW,
+	I_VPCMPNGTW,
+	I_VPCMPNLEB,
+	I_VPCMPNLED,
+	I_VPCMPNLEQ,
+	I_VPCMPNLEUB,
+	I_VPCMPNLEUD,
+	I_VPCMPNLEUQ,
+	I_VPCMPNLEUW,
+	I_VPCMPNLEW,
+	I_VPCMPNLTB,
+	I_VPCMPNLTD,
+	I_VPCMPNLTQ,
+	I_VPCMPNLTUB,
+	I_VPCMPNLTUD,
+	I_VPCMPNLTUQ,
+	I_VPCMPNLTUW,
+	I_VPCMPNLTW,
+	I_VPCMPB,
+	I_VPCMPD,
+	I_VPCMPQ,
+	I_VPCMPUB,
+	I_VPCMPUD,
+	I_VPCMPUQ,
+	I_VPCMPUW,
+	I_VPCMPW,
+	I_VPCOMPRESSD,
+	I_VPCOMPRESSQ,
+	I_VPCONFLICTD,
+	I_VPCONFLICTQ,
+	I_VPERMB,
+	I_VPERMI2B,
+	I_VPERMI2D,
+	I_VPERMI2PD,
+	I_VPERMI2PS,
+	I_VPERMI2Q,
+	I_VPERMI2W,
+	I_VPERMT2B,
+	I_VPERMT2D,
+	I_VPERMT2PD,
+	I_VPERMT2PS,
+	I_VPERMT2Q,
+	I_VPERMT2W,
+	I_VPERMW,
+	I_VPEXPANDD,
+	I_VPEXPANDQ,
+	I_VPLZCNTD,
+	I_VPLZCNTQ,
+	I_VPMAXSQ,
+	I_VPMAXUQ,
+	I_VPMINSQ,
+	I_VPMINUQ,
+	I_VPMOVB2M,
+	I_VPMOVD2M,
+	I_VPMOVDB,
+	I_VPMOVDW,
+	I_VPMOVM2B,
+	I_VPMOVM2D,
+	I_VPMOVM2Q,
+	I_VPMOVM2W,
+	I_VPMOVQ2M,
+	I_VPMOVQB,
+	I_VPMOVQD,
+	I_VPMOVQW,
+	I_VPMOVSDB,
+	I_VPMOVSDW,
+	I_VPMOVSQB,
+	I_VPMOVSQD,
+	I_VPMOVSQW,
+	I_VPMOVSWB,
+	I_VPMOVUSDB,
+	I_VPMOVUSDW,
+	I_VPMOVUSQB,
+	I_VPMOVUSQD,
+	I_VPMOVUSQW,
+	I_VPMOVUSWB,
+	I_VPMOVW2M,
+	I_VPMOVWB,
+	I_VPMULLQ,
+	I_VPMULTISHIFTQB,
+	I_VPORD,
+	I_VPORQ,
+	I_VPROLD,
+	I_VPROLQ,
+	I_VPROLVD,
+	I_VPROLVQ,
+	I_VPRORD,
+	I_VPRORQ,
+	I_VPRORVD,
+	I_VPRORVQ,
+	I_VPSCATTERDD,
+	I_VPSCATTERDQ,
+	I_VPSCATTERQD,
+	I_VPSCATTERQQ,
+	I_VPSLLVW,
+	I_VPSRAQ,
+	I_VPSRAVQ,
+	I_VPSRAVW,
+	I_VPSRLVW,
+	I_VPTERNLOGD,
+	I_VPTERNLOGQ,
+	I_VPTESTMB,
+	I_VPTESTMD,
+	I_VPTESTMQ,
+	I_VPTESTMW,
+	I_VPTESTNMB,
+	I_VPTESTNMD,
+	I_VPTESTNMQ,
+	I_VPTESTNMW,
+	I_VPXORD,
+	I_VPXORQ,
+	I_VRANGEPD,
+	I_VRANGEPS,
+	I_VRANGESD,
+	I_VRANGESS,
+	I_VRCP14PD,
+	I_VRCP14PS,
+	I_VRCP14SD,
+	I_VRCP14SS,
+	I_VRCP28PD,
+	I_VRCP28PS,
+	I_VRCP28SD,
+	I_VRCP28SS,
+	I_VREDUCEPD,
+	I_VREDUCEPS,
+	I_VREDUCESD,
+	I_VREDUCESS,
+	I_VRNDSCALEPD,
+	I_VRNDSCALEPS,
+	I_VRNDSCALESD,
+	I_VRNDSCALESS,
+	I_VRSQRT14PD,
+	I_VRSQRT14PS,
+	I_VRSQRT14SD,
+	I_VRSQRT14SS,
+	I_VRSQRT28PD,
+	I_VRSQRT28PS,
+	I_VRSQRT28SD,
+	I_VRSQRT28SS,
+	I_VSCALEFPD,
+	I_VSCALEFPS,
+	I_VSCALEFSD,
+	I_VSCALEFSS,
+	I_VSCATTERDPD,
+	I_VSCATTERDPS,
+	I_VSCATTERPF0DPD,
+	I_VSCATTERPF0DPS,
+	I_VSCATTERPF0QPD,
+	I_VSCATTERPF0QPS,
+	I_VSCATTERPF1DPD,
+	I_VSCATTERPF1DPS,
+	I_VSCATTERPF1QPD,
+	I_VSCATTERPF1QPS,
+	I_VSCATTERQPD,
+	I_VSCATTERQPS,
+	I_VSHUFF32X4,
+	I_VSHUFF64X2,
+	I_VSHUFI32X4,
+	I_VSHUFI64X2,
+	I_RDPKRU,
+	I_WRPKRU,
+	I_RDPID,
+	I_CLFLUSHOPT,
+	I_CLWB,
+	I_PCOMMIT,
+	I_CLZERO,
+	I_PTWRITE,
+	I_CLDEMOTE,
+	I_MOVDIRI,
+	I_MOVDIR64B,
+	I_PCONFIG,
+	I_TPAUSE,
+	I_UMONITOR,
+	I_UMWAIT,
+	I_WBNOINVD,
+	I_GF2P8AFFINEINVQB,
+	I_VGF2P8AFFINEINVQB,
+	I_GF2P8AFFINEQB,
+	I_VGF2P8AFFINEQB,
+	I_GF2P8MULB,
+	I_VGF2P8MULB,
+	I_VPCOMPRESSB,
+	I_VPCOMPRESSW,
+	I_VPEXPANDB,
+	I_VPEXPANDW,
+	I_VPSHLDW,
+	I_VPSHLDD,
+	I_VPSHLDQ,
+	I_VPSHLDVW,
+	I_VPSHLDVD,
+	I_VPSHLDVQ,
+	I_VPSHRDW,
+	I_VPSHRDD,
+	I_VPSHRDQ,
+	I_VPSHRDVW,
+	I_VPSHRDVD,
+	I_VPSHRDVQ,
+	I_VPDPBUSD,
+	I_VPDPBUSDS,
+	I_VPDPWSSD,
+	I_VPDPWSSDS,
+	I_VPOPCNTB,
+	I_VPOPCNTW,
+	I_VPOPCNTD,
+	I_VPOPCNTQ,
+	I_VPSHUFBITQMB,
+	I_V4FMADDPS,
+	I_V4FNMADDPS,
+	I_V4FMADDSS,
+	I_V4FNMADDSS,
+	I_V4DPWSSDS,
+	I_V4DPWSSD,
+	I_ENCLS,
+	I_ENCLU,
+	I_ENCLV,
+	I_CLRSSBSY,
+	I_ENDBR32,
+	I_ENDBR64,
+	I_INCSSPD,
+	I_INCSSPQ,
+	I_RDSSPD,
+	I_RDSSPQ,
+	I_RSTORSSP,
+	I_SAVEPREVSSP,
+	I_SETSSBSY,
+	I_WRUSSD,
+	I_WRUSSQ,
+	I_WRSSD,
+	I_WRSSQ,
+	I_ENQCMD,
+	I_ENQCMDS,
+	I_SERIALIZE,
+	I_XRESLDTRK,
+	I_XSUSLDTRK,
+	I_VCVTNE2PS2BF16,
+	I_VDPBF16PS,
+	I_VP2INTERSECTD,
+	I_LDTILECFG,
+	I_STTILECFG,
+	I_TDPBF16PS,
+	I_TDPBSSD,
+	I_TDPBSUD,
+	I_TDPBUSD,
+	I_TDPBUUD,
+	I_TILELOADD,
+	I_TILELOADDT1,
+	I_TILERELEASE,
+	I_TILESTORED,
+	I_TILEZERO,
+	I_VADDPH,
+	I_VADDSH,
+	I_VCMPPH,
+	I_VCMPSH,
+	I_VCOMISH,
+	I_VCVTDQ2PH,
+	I_VCVTPD2PH,
+	I_VCVTPH2DQ,
+	I_VCVTPH2PD,
+	I_VCVTPH2PSX,
+	I_VCVTPH2QQ,
+	I_VCVTPH2UDQ,
+	I_VCVTPH2UQQ,
+	I_VCVTPH2UW,
+	I_VCVTPH2W,
+	I_VCVTQQ2PH,
+	I_VCVTSD2SH,
+	I_VCVTSH2SD,
+	I_VCVTSH2SI,
+	I_VCVTSH2SS,
+	I_VCVTSH2USI,
+	I_VCVTSI2SH,
+	I_VCVTSS2SH,
+	I_VCVTTPH2DQ,
+	I_VCVTTPH2QQ,
+	I_VCVTTPH2UDQ,
+	I_VCVTTPH2UQQ,
+	I_VCVTTPH2UW,
+	I_VCVTTPH2W,
+	I_VCVTTSH2SI,
+	I_VCVTTSH2USI,
+	I_VCVTUDQ2PH,
+	I_VCVTUQQ2PH,
+	I_VCVTUSI2SH,
+	I_VCVTUW2PH,
+	I_VCVTW2PH,
+	I_VDIVPH,
+	I_VDIVSH,
+	I_VFCMADDCPH,
+	I_VFMADDCPH,
+	I_VFCMADDCSH,
+	I_VFMADDCSH,
+	I_VFCMULCPCH,
+	I_VFMULCPCH,
+	I_VFCMULCSH,
+	I_VFMULCSH,
+	I_VFMADDSUB132PH,
+	I_VFMADDSUB213PH,
+	I_VFMADDSUB231PH,
+	I_VFMSUBADD132PH,
+	I_VFMSUBADD213PH,
+	I_VFMSUBADD231PH,
+	I_VPMADD132PH,
+	I_VPMADD213PH,
+	I_VPMADD231PH,
+	I_VFMADD132PH,
+	I_VFMADD213PH,
+	I_VFMADD231PH,
+	I_VPMADD132SH,
+	I_VPMADD213SH,
+	I_VPMADD231SH,
+	I_VPNMADD132SH,
+	I_VPNMADD213SH,
+	I_VPNMADD231SH,
+	I_VPMSUB132PH,
+	I_VPMSUB213PH,
+	I_VPMSUB231PH,
+	I_VFMSUB132PH,
+	I_VFMSUB213PH,
+	I_VFMSUB231PH,
+	I_VPMSUB132SH,
+	I_VPMSUB213SH,
+	I_VPMSUB231SH,
+	I_VPNMSUB132SH,
+	I_VPNMSUB213SH,
+	I_VPNMSUB231SH,
+	I_VFPCLASSPH,
+	I_VFPCLASSSH,
+	I_VGETEXPPH,
+	I_VGETEXPSH,
+	I_VGETMANTPH,
+	I_VGETMANTSH,
+	I_VGETMAXPH,
+	I_VGETMAXSH,
+	I_VGETMINPH,
+	I_VGETMINSH,
+	I_VMOVSH,
+	I_VMOVW,
+	I_VMULPH,
+	I_VMULSH,
+	I_VRCPPH,
+	I_VRCPSH,
+	I_VREDUCEPH,
+	I_VREDUCESH,
+	I_VENDSCALEPH,
+	I_VENDSCALESH,
+	I_VRSQRTPH,
+	I_VRSQRTSH,
+	I_VSCALEFPH,
+	I_VSCALEFSH,
+	I_VSQRTPH,
+	I_VSQRTSH,
+	I_VSUBPH,
+	I_VSUBSH,
+	I_VUCOMISH,
+	I_AADD,
+	I_AAND,
+	I_AXOR,
+	I_CLUI,
+	I_SENDUIPI,
+	I_STUI,
+	I_TESTUI,
+	I_UIRET,
+	I_CMPAXADD,
+	I_CMPAEXADD,
+	I_CMPBXADD,
+	I_CMPBEXADD,
+	I_CMPCXADD,
+	I_CMPEXADD,
+	I_CMPGXADD,
+	I_CMPGEXADD,
+	I_CMPLXADD,
+	I_CMPLEXADD,
+	I_CMPNAXADD,
+	I_CMPNAEXADD,
+	I_CMPNBXADD,
+	I_CMPNBEXADD,
+	I_CMPNCXADD,
+	I_CMPNEXADD,
+	I_CMPNGXADD,
+	I_CMPNGEXADD,
+	I_CMPNLXADD,
+	I_CMPNLEXADD,
+	I_CMPNOXADD,
+	I_CMPNPXADD,
+	I_CMPNSXADD,
+	I_CMPNZXADD,
+	I_CMPOXADD,
+	I_CMPPXADD,
+	I_CMPPEXADD,
+	I_CMPPOXADD,
+	I_CMPSXADD,
+	I_CMPZXADD,
+	I_ERETS,
+	I_ERETU,
+	I_LKGS,
+	I_WRMSRNS,
+	I_RDMSRLIST,
+	I_WRMSRLIST,
+	I_HRESET,
+	I_HINT_NOP0,
+	I_HINT_NOP1,
+	I_HINT_NOP2,
+	I_HINT_NOP3,
+	I_HINT_NOP4,
+	I_HINT_NOP5,
+	I_HINT_NOP6,
+	I_HINT_NOP7,
+	I_HINT_NOP8,
+	I_HINT_NOP9,
+	I_HINT_NOP10,
+	I_HINT_NOP11,
+	I_HINT_NOP12,
+	I_HINT_NOP13,
+	I_HINT_NOP14,
+	I_HINT_NOP15,
+	I_HINT_NOP16,
+	I_HINT_NOP17,
+	I_HINT_NOP18,
+	I_HINT_NOP19,
+	I_HINT_NOP20,
+	I_HINT_NOP21,
+	I_HINT_NOP22,
+	I_HINT_NOP23,
+	I_HINT_NOP24,
+	I_HINT_NOP25,
+	I_HINT_NOP26,
+	I_HINT_NOP27,
+	I_HINT_NOP28,
+	I_HINT_NOP29,
+	I_HINT_NOP30,
+	I_HINT_NOP31,
+	I_HINT_NOP32,
+	I_HINT_NOP33,
+	I_HINT_NOP34,
+	I_HINT_NOP35,
+	I_HINT_NOP36,
+	I_HINT_NOP37,
+	I_HINT_NOP38,
+	I_HINT_NOP39,
+	I_HINT_NOP40,
+	I_HINT_NOP41,
+	I_HINT_NOP42,
+	I_HINT_NOP43,
+	I_HINT_NOP44,
+	I_HINT_NOP45,
+	I_HINT_NOP46,
+	I_HINT_NOP47,
+	I_HINT_NOP48,
+	I_HINT_NOP49,
+	I_HINT_NOP50,
+	I_HINT_NOP51,
+	I_HINT_NOP52,
+	I_HINT_NOP53,
+	I_HINT_NOP54,
+	I_HINT_NOP55,
+	I_HINT_NOP56,
+	I_HINT_NOP57,
+	I_HINT_NOP58,
+	I_HINT_NOP59,
+	I_HINT_NOP60,
+	I_HINT_NOP61,
+	I_HINT_NOP62,
+	I_HINT_NOP63,
+	I_none = -1
+};
+
+#define MAX_INSLEN 17
+#define NASM_VEX_CLASSES 3
+#define NO_DECORATOR	{0,0,0,0,0}
+#endif /* NASM_INSNSI_H */

_service:tar_scm:nasm-2.16.03.tar.xz/x86/insnsn.c Added

@@ -0,0 +1,2265 @@
+/* This file is auto-generated from insns.dat by insns.pl - don't edit it */
+
+#include "tables.h"
+
+const char * const nasm_insn_names = {
+	"db",
+	"dw",
+	"dd",
+	"dq",
+	"dt",
+	"do",
+	"dy",
+	"dz",
+	"resb",
+	"resw",
+	"resd",
+	"resq",
+	"rest",
+	"reso",
+	"resy",
+	"resz",
+	"incbin",
+	"aaa",
+	"aad",
+	"aam",
+	"aas",
+	"adc",
+	"add",
+	"and",
+	"arpl",
+	"bb0_reset",
+	"bb1_reset",
+	"bound",
+	"bsf",
+	"bsr",
+	"bswap",
+	"bt",
+	"btc",
+	"btr",
+	"bts",
+	"call",
+	"cbw",
+	"cdq",
+	"cdqe",
+	"clc",
+	"cld",
+	"cli",
+	"clts",
+	"cmc",
+	"cmp",
+	"cmpsb",
+	"cmpsd",
+	"cmpsq",
+	"cmpsw",
+	"cmpxchg",
+	"cmpxchg486",
+	"cmpxchg8b",
+	"cmpxchg16b",
+	"cpuid",
+	"cpu_read",
+	"cpu_write",
+	"cqo",
+	"cwd",
+	"cwde",
+	"daa",
+	"das",
+	"dec",
+	"div",
+	"dmint",
+	"emms",
+	"enter",
+	"equ",
+	"f2xm1",
+	"fabs",
+	"fadd",
+	"faddp",
+	"fbld",
+	"fbstp",
+	"fchs",
+	"fclex",
+	"fcmovb",
+	"fcmovbe",
+	"fcmove",
+	"fcmovnb",
+	"fcmovnbe",
+	"fcmovne",
+	"fcmovnu",
+	"fcmovu",
+	"fcom",
+	"fcomi",
+	"fcomip",
+	"fcomp",
+	"fcompp",
+	"fcos",
+	"fdecstp",
+	"fdisi",
+	"fdiv",
+	"fdivp",
+	"fdivr",
+	"fdivrp",
+	"femms",
+	"feni",
+	"ffree",
+	"ffreep",
+	"fiadd",
+	"ficom",
+	"ficomp",
+	"fidiv",
+	"fidivr",
+	"fild",
+	"fimul",
+	"fincstp",
+	"finit",
+	"fist",
+	"fistp",
+	"fisttp",
+	"fisub",
+	"fisubr",
+	"fld",
+	"fld1",
+	"fldcw",
+	"fldenv",
+	"fldl2e",
+	"fldl2t",
+	"fldlg2",
+	"fldln2",
+	"fldpi",
+	"fldz",
+	"fmul",
+	"fmulp",
+	"fnclex",
+	"fndisi",
+	"fneni",
+	"fninit",
+	"fnop",
+	"fnsave",
+	"fnstcw",
+	"fnstenv",
+	"fnstsw",
+	"fpatan",
+	"fprem",
+	"fprem1",
+	"fptan",
+	"frndint",
+	"frstor",
+	"fsave",
+	"fscale",
+	"fsetpm",
+	"fsin",
+	"fsincos",
+	"fsqrt",
+	"fst",
+	"fstcw",
+	"fstenv",
+	"fstp",
+	"fstsw",
+	"fsub",
+	"fsubp",
+	"fsubr",
+	"fsubrp",
+	"ftst",
+	"fucom",
+	"fucomi",
+	"fucomip",
+	"fucomp",
+	"fucompp",
+	"fxam",
+	"fxch",
+	"fxtract",
+	"fyl2x",
+	"fyl2xp1",
+	"hlt",
+	"ibts",
+	"icebp",
+	"idiv",
+	"imul",
+	"in",
+	"inc",
+	"insb",
+	"insd",
+	"insw",
+	"int",
+	"int01",
+	"int1",
+	"int03",
+	"int3",
+	"into",
+	"invd",
+	"invpcid",
+	"invlpg",
+	"invlpga",
+	"iret",
+	"iretd",
+	"iretq",
+	"iretw",
+	"jcxz",
+	"jecxz",
+	"jrcxz",
+	"jmp",
+	"jmpe",
+	"lahf",
+	"lar",
+	"lds",
+	"lea",
+	"leave",
+	"les",
+	"lfence",
+	"lfs",
+	"lgdt",
+	"lgs",
+	"lidt",
+	"lldt",
+	"lmsw",
+	"loadall",
+	"loadall286",
+	"lodsb",
+	"lodsd",
+	"lodsq",
+	"lodsw",
+	"loop",
+	"loope",
+	"loopne",
+	"loopnz",
+	"loopz",
+	"lsl",
+	"lss",
+	"ltr",
+	"mfence",
+	"monitor",
+	"monitorx",
+	"mov",
+	"movd",
+	"movq",
+	"movsb",
+	"movsd",
+	"movsq",
+	"movsw",
+	"movsx",
+	"movsxd",
+	"movzx",
+	"mul",
+	"mwait",
+	"mwaitx",
+	"neg",
+	"nop",
+	"not",
+	"or",
+	"out",
+	"outsb",
+	"outsd",
+	"outsw",
+	"packssdw",
+	"packsswb",
+	"packuswb",
+	"paddb",
+	"paddd",
+	"paddsb",
+	"paddsiw",
+	"paddsw",
+	"paddusb",
+	"paddusw",
+	"paddw",
+	"pand",
+	"pandn",
+	"pause",
+	"paveb",
+	"pavgusb",
+	"pcmpeqb",
+	"pcmpeqd",
+	"pcmpeqw",
+	"pcmpgtb",
+	"pcmpgtd",
+	"pcmpgtw",
+	"pdistib",
+	"pf2id",
+	"pfacc",
+	"pfadd",
+	"pfcmpeq",
+	"pfcmpge",
+	"pfcmpgt",
+	"pfmax",
+	"pfmin",
+	"pfmul",
+	"pfrcp",
+	"pfrcpit1",
+	"pfrcpit2",
+	"pfrsqit1",
+	"pfrsqrt",
+	"pfsub",
+	"pfsubr",
+	"pi2fd",
+	"pmachriw",
+	"pmaddwd",
+	"pmagw",
+	"pmulhriw",
+	"pmulhrwa",
+	"pmulhrwc",
+	"pmulhw",
+	"pmullw",
+	"pmvgezb",
+	"pmvlzb",
+	"pmvnzb",
+	"pmvzb",
+	"pop",
+	"popa",
+	"popad",
+	"popaw",
+	"popf",
+	"popfd",
+	"popfq",
+	"popfw",
+	"por",
+	"prefetch",
+	"prefetchw",
+	"pslld",
+	"psllq",
+	"psllw",
+	"psrad",
+	"psraw",
+	"psrld",
+	"psrlq",
+	"psrlw",
+	"psubb",
+	"psubd",
+	"psubsb",
+	"psubsiw",
+	"psubsw",
+	"psubusb",
+	"psubusw",
+	"psubw",
+	"punpckhbw",
+	"punpckhdq",
+	"punpckhwd",
+	"punpcklbw",
+	"punpckldq",
+	"punpcklwd",
+	"push",
+	"pusha",
+	"pushad",
+	"pushaw",
+	"pushf",
+	"pushfd",
+	"pushfq",
+	"pushfw",
+	"pxor",
+	"rcl",
+	"rcr",
+	"rdshr",
+	"rdmsr",
+	"rdpmc",
+	"rdtsc",
+	"rdtscp",
+	"ret",
+	"retf",
+	"retn",
+	"retw",
+	"retfw",
+	"retnw",
+	"retd",
+	"retfd",
+	"retnd",
+	"retq",
+	"retfq",
+	"retnq",
+	"rol",
+	"ror",
+	"rdm",
+	"rsdc",
+	"rsldt",
+	"rsm",
+	"rsts",
+	"sahf",
+	"sal",
+	"salc",
+	"sar",
+	"sbb",
+	"scasb",
+	"scasd",
+	"scasq",
+	"scasw",
+	"sfence",
+	"sgdt",
+	"shl",
+	"shld",
+	"shr",
+	"shrd",
+	"sidt",
+	"sldt",
+	"skinit",
+	"smi",
+	"smint",
+	"smintold",
+	"smsw",
+	"stc",
+	"std",
+	"sti",
+	"stosb",
+	"stosd",
+	"stosq",
+	"stosw",
+	"str",
+	"sub",
+	"svdc",
+	"svldt",
+	"svts",
+	"swapgs",
+	"syscall",
+	"sysenter",
+	"sysexit",
+	"sysret",
+	"test",
+	"ud0",
+	"ud1",
+	"ud2b",
+	"ud2",
+	"ud2a",
+	"umov",
+	"verr",
+	"verw",
+	"fwait",
+	"wbinvd",
+	"wrshr",
+	"wrmsr",
+	"xadd",
+	"xbts",
+	"xchg",
+	"xlatb",
+	"xlat",
+	"xor",
+	"cmova",
+	"cmovae",
+	"cmovb",
+	"cmovbe",
+	"cmovc",
+	"cmove",
+	"cmovg",
+	"cmovge",
+	"cmovl",
+	"cmovle",
+	"cmovna",
+	"cmovnae",
+	"cmovnb",
+	"cmovnbe",
+	"cmovnc",
+	"cmovne",
+	"cmovng",
+	"cmovnge",
+	"cmovnl",
+	"cmovnle",
+	"cmovno",
+	"cmovnp",
+	"cmovns",
+	"cmovnz",
+	"cmovo",
+	"cmovp",
+	"cmovpe",
+	"cmovpo",
+	"cmovs",
+	"cmovz",
+	"ja",
+	"jae",
+	"jb",
+	"jbe",
+	"jc",
+	"je",
+	"jg",
+	"jge",
+	"jl",
+	"jle",
+	"jna",
+	"jnae",
+	"jnb",
+	"jnbe",
+	"jnc",
+	"jne",
+	"jng",
+	"jnge",
+	"jnl",
+	"jnle",
+	"jno",
+	"jnp",
+	"jns",
+	"jnz",
+	"jo",
+	"jp",
+	"jpe",
+	"jpo",
+	"js",
+	"jz",
+	"seta",
+	"setae",
+	"setb",
+	"setbe",
+	"setc",
+	"sete",
+	"setg",
+	"setge",
+	"setl",
+	"setle",
+	"setna",
+	"setnae",
+	"setnb",
+	"setnbe",
+	"setnc",
+	"setne",
+	"setng",
+	"setnge",
+	"setnl",
+	"setnle",
+	"setno",
+	"setnp",
+	"setns",
+	"setnz",
+	"seto",
+	"setp",
+	"setpe",
+	"setpo",
+	"sets",
+	"setz",
+	"addps",
+	"addss",
+	"andnps",
+	"andps",
+	"cmpeqps",
+	"cmpeqss",
+	"cmpleps",
+	"cmpless",
+	"cmpltps",
+	"cmpltss",
+	"cmpneqps",
+	"cmpneqss",
+	"cmpnleps",
+	"cmpnless",
+	"cmpnltps",
+	"cmpnltss",
+	"cmpordps",
+	"cmpordss",
+	"cmpunordps",
+	"cmpunordss",
+	"cmpps",
+	"cmpss",
+	"comiss",
+	"cvtpi2ps",
+	"cvtps2pi",
+	"cvtsi2ss",
+	"cvtss2si",
+	"cvttps2pi",
+	"cvttss2si",
+	"divps",
+	"divss",
+	"ldmxcsr",
+	"maxps",
+	"maxss",
+	"minps",
+	"minss",
+	"movaps",
+	"movhps",
+	"movlhps",
+	"movlps",
+	"movhlps",
+	"movmskps",
+	"movntps",
+	"movss",
+	"movups",
+	"mulps",
+	"mulss",
+	"orps",
+	"rcpps",
+	"rcpss",
+	"rsqrtps",
+	"rsqrtss",
+	"shufps",
+	"sqrtps",
+	"sqrtss",
+	"stmxcsr",
+	"subps",
+	"subss",
+	"ucomiss",
+	"unpckhps",
+	"unpcklps",
+	"xorps",
+	"fxrstor",
+	"fxrstor64",
+	"fxsave",
+	"fxsave64",
+	"xgetbv",
+	"xsetbv",
+	"xsave",
+	"xsave64",
+	"xsavec",
+	"xsavec64",
+	"xsaveopt",
+	"xsaveopt64",
+	"xsaves",
+	"xsaves64",
+	"xrstor",
+	"xrstor64",
+	"xrstors",
+	"xrstors64",
+	"prefetchnta",
+	"prefetcht0",
+	"prefetcht1",
+	"prefetcht2",
+	"prefetchit0",
+	"prefetchit1",
+	"maskmovq",
+	"movntq",
+	"pavgb",
+	"pavgw",
+	"pextrw",
+	"pinsrw",
+	"pmaxsw",
+	"pmaxub",
+	"pminsw",
+	"pminub",
+	"pmovmskb",
+	"pmulhuw",
+	"psadbw",
+	"pshufw",
+	"pf2iw",
+	"pfnacc",
+	"pfpnacc",
+	"pi2fw",
+	"pswapd",
+	"maskmovdqu",
+	"clflush",
+	"movntdq",
+	"movnti",
+	"movntpd",
+	"movdqa",
+	"movdqu",
+	"movdq2q",
+	"movq2dq",
+	"paddq",
+	"pmuludq",
+	"pshufd",
+	"pshufhw",
+	"pshuflw",
+	"pslldq",
+	"psrldq",
+	"psubq",
+	"punpckhqdq",
+	"punpcklqdq",
+	"addpd",
+	"addsd",
+	"andnpd",
+	"andpd",
+	"cmpeqpd",
+	"cmpeqsd",
+	"cmplepd",
+	"cmplesd",
+	"cmpltpd",
+	"cmpltsd",
+	"cmpneqpd",
+	"cmpneqsd",
+	"cmpnlepd",
+	"cmpnlesd",
+	"cmpnltpd",
+	"cmpnltsd",
+	"cmpordpd",
+	"cmpordsd",
+	"cmpunordpd",
+	"cmpunordsd",
+	"cmppd",
+	"comisd",
+	"cvtdq2pd",
+	"cvtdq2ps",
+	"cvtpd2dq",
+	"cvtpd2pi",
+	"cvtpd2ps",
+	"cvtpi2pd",
+	"cvtps2dq",
+	"cvtps2pd",
+	"cvtsd2si",
+	"cvtsd2ss",
+	"cvtsi2sd",
+	"cvtss2sd",
+	"cvttpd2pi",
+	"cvttpd2dq",
+	"cvttps2dq",
+	"cvttsd2si",
+	"divpd",
+	"divsd",
+	"maxpd",
+	"maxsd",
+	"minpd",
+	"minsd",
+	"movapd",
+	"movhpd",
+	"movlpd",
+	"movmskpd",
+	"movupd",
+	"mulpd",
+	"mulsd",
+	"orpd",
+	"shufpd",
+	"sqrtpd",
+	"sqrtsd",
+	"subpd",
+	"subsd",
+	"ucomisd",
+	"unpckhpd",
+	"unpcklpd",
+	"xorpd",
+	"addsubpd",
+	"addsubps",
+	"haddpd",
+	"haddps",
+	"hsubpd",
+	"hsubps",
+	"lddqu",
+	"movddup",
+	"movshdup",
+	"movsldup",
+	"clgi",
+	"stgi",
+	"vmcall",
+	"vmclear",
+	"vmfunc",
+	"vmlaunch",
+	"vmload",
+	"vmmcall",
+	"vmptrld",
+	"vmptrst",
+	"vmread",
+	"vmresume",
+	"vmrun",
+	"vmsave",
+	"vmwrite",
+	"vmxoff",
+	"vmxon",
+	"invept",
+	"invvpid",
+	"pvalidate",
+	"rmpadjust",
+	"vmgexit",
+	"pabsb",
+	"pabsw",
+	"pabsd",
+	"palignr",
+	"phaddw",
+	"phaddd",
+	"phaddsw",
+	"phsubw",
+	"phsubd",
+	"phsubsw",
+	"pmaddubsw",
+	"pmulhrsw",
+	"pshufb",
+	"psignb",
+	"psignw",
+	"psignd",
+	"extrq",
+	"insertq",
+	"movntsd",
+	"movntss",
+	"lzcnt",
+	"blendpd",
+	"blendps",
+	"blendvpd",
+	"blendvps",
+	"dppd",
+	"dpps",
+	"extractps",
+	"insertps",
+	"movntdqa",
+	"mpsadbw",
+	"packusdw",
+	"pblendvb",
+	"pblendw",
+	"pcmpeqq",
+	"pextrb",
+	"pextrd",
+	"pextrq",
+	"phminposuw",
+	"pinsrb",
+	"pinsrd",
+	"pinsrq",
+	"pmaxsb",
+	"pmaxsd",
+	"pmaxud",
+	"pmaxuw",
+	"pminsb",
+	"pminsd",
+	"pminud",
+	"pminuw",
+	"pmovsxbw",
+	"pmovsxbd",
+	"pmovsxbq",
+	"pmovsxwd",
+	"pmovsxwq",
+	"pmovsxdq",
+	"pmovzxbw",
+	"pmovzxbd",
+	"pmovzxbq",
+	"pmovzxwd",
+	"pmovzxwq",
+	"pmovzxdq",
+	"pmuldq",
+	"pmulld",
+	"ptest",
+	"roundpd",
+	"roundps",
+	"roundsd",
+	"roundss",
+	"crc32",
+	"pcmpestri",
+	"pcmpestrm",
+	"pcmpistri",
+	"pcmpistrm",
+	"pcmpgtq",
+	"popcnt",
+	"getsec",
+	"pfrcpv",
+	"pfrsqrtv",
+	"movbe",
+	"aesenc",
+	"aesenclast",
+	"aesdec",
+	"aesdeclast",
+	"aesimc",
+	"aeskeygenassist",
+	"vaesenc",
+	"vaesenclast",
+	"vaesdec",
+	"vaesdeclast",
+	"vaesimc",
+	"vaeskeygenassist",
+	"vaddpd",
+	"vaddps",
+	"vaddsd",
+	"vaddss",
+	"vaddsubpd",
+	"vaddsubps",
+	"vandpd",
+	"vandps",
+	"vandnpd",
+	"vandnps",
+	"vblendpd",
+	"vblendps",
+	"vblendvpd",
+	"vblendvps",
+	"vbroadcastss",
+	"vbroadcastsd",
+	"vbroadcastf128",
+	"vcmpeq_ospd",
+	"vcmpeqpd",
+	"vcmplt_ospd",
+	"vcmpltpd",
+	"vcmple_ospd",
+	"vcmplepd",
+	"vcmpunord_qpd",
+	"vcmpunordpd",
+	"vcmpneq_uqpd",
+	"vcmpneqpd",
+	"vcmpnlt_uspd",
+	"vcmpnltpd",
+	"vcmpnle_uspd",
+	"vcmpnlepd",
+	"vcmpord_qpd",
+	"vcmpordpd",
+	"vcmpeq_uqpd",
+	"vcmpnge_uspd",
+	"vcmpngepd",
+	"vcmpngt_uspd",
+	"vcmpngtpd",
+	"vcmpfalse_oqpd",
+	"vcmpfalsepd",
+	"vcmpneq_oqpd",
+	"vcmpge_ospd",
+	"vcmpgepd",
+	"vcmpgt_ospd",
+	"vcmpgtpd",
+	"vcmptrue_uqpd",
+	"vcmptruepd",
+	"vcmplt_oqpd",
+	"vcmple_oqpd",
+	"vcmpunord_spd",
+	"vcmpneq_uspd",
+	"vcmpnlt_uqpd",
+	"vcmpnle_uqpd",
+	"vcmpord_spd",
+	"vcmpeq_uspd",
+	"vcmpnge_uqpd",
+	"vcmpngt_uqpd",
+	"vcmpfalse_ospd",
+	"vcmpneq_ospd",
+	"vcmpge_oqpd",
+	"vcmpgt_oqpd",
+	"vcmptrue_uspd",
+	"vcmppd",
+	"vcmpeq_osps",
+	"vcmpeqps",
+	"vcmplt_osps",
+	"vcmpltps",
+	"vcmple_osps",
+	"vcmpleps",
+	"vcmpunord_qps",
+	"vcmpunordps",
+	"vcmpneq_uqps",
+	"vcmpneqps",
+	"vcmpnlt_usps",
+	"vcmpnltps",
+	"vcmpnle_usps",
+	"vcmpnleps",
+	"vcmpord_qps",
+	"vcmpordps",
+	"vcmpeq_uqps",
+	"vcmpnge_usps",
+	"vcmpngeps",
+	"vcmpngt_usps",
+	"vcmpngtps",
+	"vcmpfalse_oqps",
+	"vcmpfalseps",
+	"vcmpneq_oqps",
+	"vcmpge_osps",
+	"vcmpgeps",
+	"vcmpgt_osps",
+	"vcmpgtps",
+	"vcmptrue_uqps",
+	"vcmptrueps",
+	"vcmplt_oqps",
+	"vcmple_oqps",
+	"vcmpunord_sps",
+	"vcmpneq_usps",
+	"vcmpnlt_uqps",
+	"vcmpnle_uqps",
+	"vcmpord_sps",
+	"vcmpeq_usps",
+	"vcmpnge_uqps",
+	"vcmpngt_uqps",
+	"vcmpfalse_osps",
+	"vcmpneq_osps",
+	"vcmpge_oqps",
+	"vcmpgt_oqps",
+	"vcmptrue_usps",
+	"vcmpps",
+	"vcmpeq_ossd",
+	"vcmpeqsd",
+	"vcmplt_ossd",
+	"vcmpltsd",
+	"vcmple_ossd",
+	"vcmplesd",
+	"vcmpunord_qsd",
+	"vcmpunordsd",
+	"vcmpneq_uqsd",
+	"vcmpneqsd",
+	"vcmpnlt_ussd",
+	"vcmpnltsd",
+	"vcmpnle_ussd",
+	"vcmpnlesd",
+	"vcmpord_qsd",
+	"vcmpordsd",
+	"vcmpeq_uqsd",
+	"vcmpnge_ussd",
+	"vcmpngesd",
+	"vcmpngt_ussd",
+	"vcmpngtsd",
+	"vcmpfalse_oqsd",
+	"vcmpfalsesd",
+	"vcmpneq_oqsd",
+	"vcmpge_ossd",
+	"vcmpgesd",
+	"vcmpgt_ossd",
+	"vcmpgtsd",
+	"vcmptrue_uqsd",
+	"vcmptruesd",
+	"vcmplt_oqsd",
+	"vcmple_oqsd",
+	"vcmpunord_ssd",
+	"vcmpneq_ussd",
+	"vcmpnlt_uqsd",
+	"vcmpnle_uqsd",
+	"vcmpord_ssd",
+	"vcmpeq_ussd",
+	"vcmpnge_uqsd",
+	"vcmpngt_uqsd",
+	"vcmpfalse_ossd",
+	"vcmpneq_ossd",
+	"vcmpge_oqsd",
+	"vcmpgt_oqsd",
+	"vcmptrue_ussd",
+	"vcmpsd",
+	"vcmpeq_osss",
+	"vcmpeqss",
+	"vcmplt_osss",
+	"vcmpltss",
+	"vcmple_osss",
+	"vcmpless",
+	"vcmpunord_qss",
+	"vcmpunordss",
+	"vcmpneq_uqss",
+	"vcmpneqss",
+	"vcmpnlt_usss",
+	"vcmpnltss",
+	"vcmpnle_usss",
+	"vcmpnless",
+	"vcmpord_qss",
+	"vcmpordss",
+	"vcmpeq_uqss",
+	"vcmpnge_usss",
+	"vcmpngess",
+	"vcmpngt_usss",
+	"vcmpngtss",
+	"vcmpfalse_oqss",
+	"vcmpfalsess",
+	"vcmpneq_oqss",
+	"vcmpge_osss",
+	"vcmpgess",
+	"vcmpgt_osss",
+	"vcmpgtss",
+	"vcmptrue_uqss",
+	"vcmptruess",
+	"vcmplt_oqss",
+	"vcmple_oqss",
+	"vcmpunord_sss",
+	"vcmpneq_usss",
+	"vcmpnlt_uqss",
+	"vcmpnle_uqss",
+	"vcmpord_sss",
+	"vcmpeq_usss",
+	"vcmpnge_uqss",
+	"vcmpngt_uqss",
+	"vcmpfalse_osss",
+	"vcmpneq_osss",
+	"vcmpge_oqss",
+	"vcmpgt_oqss",
+	"vcmptrue_usss",
+	"vcmpss",
+	"vcomisd",
+	"vcomiss",
+	"vcvtdq2pd",
+	"vcvtdq2ps",
+	"vcvtpd2dq",
+	"vcvtpd2ps",
+	"vcvtps2dq",
+	"vcvtps2pd",
+	"vcvtsd2si",
+	"vcvtsd2ss",
+	"vcvtsi2sd",
+	"vcvtsi2ss",
+	"vcvtss2sd",
+	"vcvtss2si",
+	"vcvttpd2dq",
+	"vcvttps2dq",
+	"vcvttsd2si",
+	"vcvttss2si",
+	"vdivpd",
+	"vdivps",
+	"vdivsd",
+	"vdivss",
+	"vdppd",
+	"vdpps",
+	"vextractf128",
+	"vextractps",
+	"vhaddpd",
+	"vhaddps",
+	"vhsubpd",
+	"vhsubps",
+	"vinsertf128",
+	"vinsertps",
+	"vlddqu",
+	"vldqqu",
+	"vldmxcsr",
+	"vmaskmovdqu",
+	"vmaskmovps",
+	"vmaskmovpd",
+	"vmaxpd",
+	"vmaxps",
+	"vmaxsd",
+	"vmaxss",
+	"vminpd",
+	"vminps",
+	"vminsd",
+	"vminss",
+	"vmovapd",
+	"vmovaps",
+	"vmovd",
+	"vmovq",
+	"vmovddup",
+	"vmovdqa",
+	"vmovqqa",
+	"vmovdqu",
+	"vmovqqu",
+	"vmovhlps",
+	"vmovhpd",
+	"vmovhps",
+	"vmovlhps",
+	"vmovlpd",
+	"vmovlps",
+	"vmovmskpd",
+	"vmovmskps",
+	"vmovntdq",
+	"vmovntqq",
+	"vmovntdqa",
+	"vmovntpd",
+	"vmovntps",
+	"vmovsd",
+	"vmovshdup",
+	"vmovsldup",
+	"vmovss",
+	"vmovupd",
+	"vmovups",
+	"vmpsadbw",
+	"vmulpd",
+	"vmulps",
+	"vmulsd",
+	"vmulss",
+	"vorpd",
+	"vorps",
+	"vpabsb",
+	"vpabsw",
+	"vpabsd",
+	"vpacksswb",
+	"vpackssdw",
+	"vpackuswb",
+	"vpackusdw",
+	"vpaddb",
+	"vpaddw",
+	"vpaddd",
+	"vpaddq",
+	"vpaddsb",
+	"vpaddsw",
+	"vpaddusb",
+	"vpaddusw",
+	"vpalignr",
+	"vpand",
+	"vpandn",
+	"vpavgb",
+	"vpavgw",
+	"vpblendvb",
+	"vpblendw",
+	"vpcmpestri",
+	"vpcmpestrm",
+	"vpcmpistri",
+	"vpcmpistrm",
+	"vpcmpeqb",
+	"vpcmpeqw",
+	"vpcmpeqd",
+	"vpcmpeqq",
+	"vpcmpgtb",
+	"vpcmpgtw",
+	"vpcmpgtd",
+	"vpcmpgtq",
+	"vpermilpd",
+	"vpermilps",
+	"vperm2f128",
+	"vpextrb",
+	"vpextrw",
+	"vpextrd",
+	"vpextrq",
+	"vphaddw",
+	"vphaddd",
+	"vphaddsw",
+	"vphminposuw",
+	"vphsubw",
+	"vphsubd",
+	"vphsubsw",
+	"vpinsrb",
+	"vpinsrw",
+	"vpinsrd",
+	"vpinsrq",
+	"vpmaddwd",
+	"vpmaddubsw",
+	"vpmaxsb",
+	"vpmaxsw",
+	"vpmaxsd",
+	"vpmaxub",
+	"vpmaxuw",
+	"vpmaxud",
+	"vpminsb",
+	"vpminsw",
+	"vpminsd",
+	"vpminub",
+	"vpminuw",
+	"vpminud",
+	"vpmovmskb",
+	"vpmovsxbw",
+	"vpmovsxbd",
+	"vpmovsxbq",
+	"vpmovsxwd",
+	"vpmovsxwq",
+	"vpmovsxdq",
+	"vpmovzxbw",
+	"vpmovzxbd",
+	"vpmovzxbq",
+	"vpmovzxwd",
+	"vpmovzxwq",
+	"vpmovzxdq",
+	"vpmulhuw",
+	"vpmulhrsw",
+	"vpmulhw",
+	"vpmullw",
+	"vpmulld",
+	"vpmuludq",
+	"vpmuldq",
+	"vpor",
+	"vpsadbw",
+	"vpshufb",
+	"vpshufd",
+	"vpshufhw",
+	"vpshuflw",
+	"vpsignb",
+	"vpsignw",
+	"vpsignd",
+	"vpslldq",
+	"vpsrldq",
+	"vpsllw",
+	"vpslld",
+	"vpsllq",
+	"vpsraw",
+	"vpsrad",
+	"vpsrlw",
+	"vpsrld",
+	"vpsrlq",
+	"vptest",
+	"vpsubb",
+	"vpsubw",
+	"vpsubd",
+	"vpsubq",
+	"vpsubsb",
+	"vpsubsw",
+	"vpsubusb",
+	"vpsubusw",
+	"vpunpckhbw",
+	"vpunpckhwd",
+	"vpunpckhdq",
+	"vpunpckhqdq",
+	"vpunpcklbw",
+	"vpunpcklwd",
+	"vpunpckldq",
+	"vpunpcklqdq",
+	"vpxor",
+	"vrcpps",
+	"vrcpss",
+	"vrsqrtps",
+	"vrsqrtss",
+	"vroundpd",
+	"vroundps",
+	"vroundsd",
+	"vroundss",
+	"vshufpd",
+	"vshufps",
+	"vsqrtpd",
+	"vsqrtps",
+	"vsqrtsd",
+	"vsqrtss",
+	"vstmxcsr",
+	"vsubpd",
+	"vsubps",
+	"vsubsd",
+	"vsubss",
+	"vtestps",
+	"vtestpd",
+	"vucomisd",
+	"vucomiss",
+	"vunpckhpd",
+	"vunpckhps",
+	"vunpcklpd",
+	"vunpcklps",
+	"vxorpd",
+	"vxorps",
+	"vzeroall",
+	"vzeroupper",
+	"pclmullqlqdq",
+	"pclmulhqlqdq",
+	"pclmullqhqdq",
+	"pclmulhqhqdq",
+	"pclmulqdq",
+	"vpclmullqlqdq",
+	"vpclmulhqlqdq",
+	"vpclmullqhqdq",
+	"vpclmulhqhqdq",
+	"vpclmulqdq",
+	"vfmadd132ps",
+	"vfmadd132pd",
+	"vfmadd312ps",
+	"vfmadd312pd",
+	"vfmadd213ps",
+	"vfmadd213pd",
+	"vfmadd123ps",
+	"vfmadd123pd",
+	"vfmadd231ps",
+	"vfmadd231pd",
+	"vfmadd321ps",
+	"vfmadd321pd",
+	"vfmaddsub132ps",
+	"vfmaddsub132pd",
+	"vfmaddsub312ps",
+	"vfmaddsub312pd",
+	"vfmaddsub213ps",
+	"vfmaddsub213pd",
+	"vfmaddsub123ps",
+	"vfmaddsub123pd",
+	"vfmaddsub231ps",
+	"vfmaddsub231pd",
+	"vfmaddsub321ps",
+	"vfmaddsub321pd",
+	"vfmsub132ps",
+	"vfmsub132pd",
+	"vfmsub312ps",
+	"vfmsub312pd",
+	"vfmsub213ps",
+	"vfmsub213pd",
+	"vfmsub123ps",
+	"vfmsub123pd",
+	"vfmsub231ps",
+	"vfmsub231pd",
+	"vfmsub321ps",
+	"vfmsub321pd",
+	"vfmsubadd132ps",
+	"vfmsubadd132pd",
+	"vfmsubadd312ps",
+	"vfmsubadd312pd",
+	"vfmsubadd213ps",
+	"vfmsubadd213pd",
+	"vfmsubadd123ps",
+	"vfmsubadd123pd",
+	"vfmsubadd231ps",
+	"vfmsubadd231pd",
+	"vfmsubadd321ps",
+	"vfmsubadd321pd",
+	"vfnmadd132ps",
+	"vfnmadd132pd",
+	"vfnmadd312ps",
+	"vfnmadd312pd",
+	"vfnmadd213ps",
+	"vfnmadd213pd",
+	"vfnmadd123ps",
+	"vfnmadd123pd",
+	"vfnmadd231ps",
+	"vfnmadd231pd",
+	"vfnmadd321ps",
+	"vfnmadd321pd",
+	"vfnmsub132ps",
+	"vfnmsub132pd",
+	"vfnmsub312ps",
+	"vfnmsub312pd",
+	"vfnmsub213ps",
+	"vfnmsub213pd",
+	"vfnmsub123ps",
+	"vfnmsub123pd",
+	"vfnmsub231ps",
+	"vfnmsub231pd",
+	"vfnmsub321ps",
+	"vfnmsub321pd",
+	"vfmadd132ss",
+	"vfmadd132sd",
+	"vfmadd312ss",
+	"vfmadd312sd",
+	"vfmadd213ss",
+	"vfmadd213sd",
+	"vfmadd123ss",
+	"vfmadd123sd",
+	"vfmadd231ss",
+	"vfmadd231sd",
+	"vfmadd321ss",
+	"vfmadd321sd",
+	"vfmsub132ss",
+	"vfmsub132sd",
+	"vfmsub312ss",
+	"vfmsub312sd",
+	"vfmsub213ss",
+	"vfmsub213sd",
+	"vfmsub123ss",
+	"vfmsub123sd",
+	"vfmsub231ss",
+	"vfmsub231sd",
+	"vfmsub321ss",
+	"vfmsub321sd",
+	"vfnmadd132ss",
+	"vfnmadd132sd",
+	"vfnmadd312ss",
+	"vfnmadd312sd",
+	"vfnmadd213ss",
+	"vfnmadd213sd",
+	"vfnmadd123ss",
+	"vfnmadd123sd",
+	"vfnmadd231ss",
+	"vfnmadd231sd",
+	"vfnmadd321ss",
+	"vfnmadd321sd",
+	"vfnmsub132ss",
+	"vfnmsub132sd",
+	"vfnmsub312ss",
+	"vfnmsub312sd",
+	"vfnmsub213ss",
+	"vfnmsub213sd",
+	"vfnmsub123ss",
+	"vfnmsub123sd",
+	"vfnmsub231ss",
+	"vfnmsub231sd",
+	"vfnmsub321ss",
+	"vfnmsub321sd",
+	"rdfsbase",
+	"rdgsbase",
+	"rdrand",
+	"wrfsbase",
+	"wrgsbase",
+	"vcvtph2ps",
+	"vcvtps2ph",
+	"adcx",
+	"adox",
+	"rdseed",
+	"clac",
+	"stac",
+	"xstore",
+	"xcryptecb",
+	"xcryptcbc",
+	"xcryptctr",
+	"xcryptcfb",
+	"xcryptofb",
+	"montmul",
+	"xsha1",
+	"xsha256",
+	"llwpcb",
+	"slwpcb",
+	"lwpval",
+	"lwpins",
+	"vfmaddpd",
+	"vfmaddps",
+	"vfmaddsd",
+	"vfmaddss",
+	"vfmaddsubpd",
+	"vfmaddsubps",
+	"vfmsubaddpd",
+	"vfmsubaddps",
+	"vfmsubpd",
+	"vfmsubps",
+	"vfmsubsd",
+	"vfmsubss",
+	"vfnmaddpd",
+	"vfnmaddps",
+	"vfnmaddsd",
+	"vfnmaddss",
+	"vfnmsubpd",
+	"vfnmsubps",
+	"vfnmsubsd",
+	"vfnmsubss",
+	"vfrczpd",
+	"vfrczps",
+	"vfrczsd",
+	"vfrczss",
+	"vpcmov",
+	"vpcomb",
+	"vpcomd",
+	"vpcomq",
+	"vpcomub",
+	"vpcomud",
+	"vpcomuq",
+	"vpcomuw",
+	"vpcomw",
+	"vphaddbd",
+	"vphaddbq",
+	"vphaddbw",
+	"vphadddq",
+	"vphaddubd",
+	"vphaddubq",
+	"vphaddubw",
+	"vphaddudq",
+	"vphadduwd",
+	"vphadduwq",
+	"vphaddwd",
+	"vphaddwq",
+	"vphsubbw",
+	"vphsubdq",
+	"vphsubwd",
+	"vpmacsdd",
+	"vpmacsdqh",
+	"vpmacsdql",
+	"vpmacssdd",
+	"vpmacssdqh",
+	"vpmacssdql",
+	"vpmacsswd",
+	"vpmacssww",
+	"vpmacswd",
+	"vpmacsww",
+	"vpmadcsswd",
+	"vpmadcswd",
+	"vpperm",
+	"vprotb",
+	"vprotd",
+	"vprotq",
+	"vprotw",
+	"vpshab",
+	"vpshad",
+	"vpshaq",
+	"vpshaw",
+	"vpshlb",
+	"vpshld",
+	"vpshlq",
+	"vpshlw",
+	"vbroadcasti128",
+	"vpblendd",
+	"vpbroadcastb",
+	"vpbroadcastw",
+	"vpbroadcastd",
+	"vpbroadcastq",
+	"vpermd",
+	"vpermpd",
+	"vpermps",
+	"vpermq",
+	"vperm2i128",
+	"vextracti128",
+	"vinserti128",
+	"vpmaskmovd",
+	"vpmaskmovq",
+	"vpsllvd",
+	"vpsllvq",
+	"vpsravd",
+	"vpsrlvd",
+	"vpsrlvq",
+	"vgatherdpd",
+	"vgatherqpd",
+	"vgatherdps",
+	"vgatherqps",
+	"vpgatherdd",
+	"vpgatherqd",
+	"vpgatherdq",
+	"vpgatherqq",
+	"xabort",
+	"xbegin",
+	"xend",
+	"xtest",
+	"andn",
+	"bextr",
+	"blci",
+	"blcic",
+	"blsi",
+	"blsic",
+	"blcfill",
+	"blsfill",
+	"blcmsk",
+	"blsmsk",
+	"blsr",
+	"blcs",
+	"bzhi",
+	"mulx",
+	"pdep",
+	"pext",
+	"rorx",
+	"sarx",
+	"shlx",
+	"shrx",
+	"tzcnt",
+	"tzmsk",
+	"t1mskc",
+	"prefetchwt1",
+	"bndmk",
+	"bndcl",
+	"bndcu",
+	"bndcn",
+	"bndmov",
+	"bndldx",
+	"bndstx",
+	"sha1msg1",
+	"sha1msg2",
+	"sha1nexte",
+	"sha1rnds4",
+	"sha256msg1",
+	"sha256msg2",
+	"sha256rnds2",
+	"vsha512msg1",
+	"vsha512msg2",
+	"vsha512rnds2",
+	"vsm3msg1",
+	"vsm3msg2",
+	"vsm3rnds2",
+	"vsm4key4",
+	"vsm4rnds4",
+	"vbcstnebf16ps",
+	"vbcstnesh2ps",
+	"vcvtneebf162ps",
+	"vcvtneeph2ps",
+	"vcvtneobf162ps",
+	"vcvtneoph2ps",
+	"vcvtneps2bf16",
+	"vpdpbssd",
+	"vpdpbssds",
+	"vpdpbsud",
+	"vpdpbsuds",
+	"vpdpbuud",
+	"vpdpbuuds",
+	"vpmadd52huq",
+	"vpmadd52luq",
+	"kaddb",
+	"kaddd",
+	"kaddq",
+	"kaddw",
+	"kandb",
+	"kandd",
+	"kandnb",
+	"kandnd",
+	"kandnq",
+	"kandnw",
+	"kandq",
+	"kandw",
+	"kmovb",
+	"kmovd",
+	"kmovq",
+	"kmovw",
+	"knotb",
+	"knotd",
+	"knotq",
+	"knotw",
+	"korb",
+	"kord",
+	"korq",
+	"korw",
+	"kortestb",
+	"kortestd",
+	"kortestq",
+	"kortestw",
+	"kshiftlb",
+	"kshiftld",
+	"kshiftlq",
+	"kshiftlw",
+	"kshiftrb",
+	"kshiftrd",
+	"kshiftrq",
+	"kshiftrw",
+	"ktestb",
+	"ktestd",
+	"ktestq",
+	"ktestw",
+	"kunpckbw",
+	"kunpckdq",
+	"kunpckwd",
+	"kxnorb",
+	"kxnord",
+	"kxnorq",
+	"kxnorw",
+	"kxorb",
+	"kxord",
+	"kxorq",
+	"kxorw",
+	"kadd",
+	"kand",
+	"kandn",
+	"kmov",
+	"knot",
+	"kor",
+	"kortest",
+	"kshiftl",
+	"kshiftr",
+	"ktest",
+	"kunpck",
+	"kxnor",
+	"kxor",
+	"valignd",
+	"valignq",
+	"vblendmpd",
+	"vblendmps",
+	"vbroadcastf32x2",
+	"vbroadcastf32x4",
+	"vbroadcastf32x8",
+	"vbroadcastf64x2",
+	"vbroadcastf64x4",
+	"vbroadcasti32x2",
+	"vbroadcasti32x4",
+	"vbroadcasti32x8",
+	"vbroadcasti64x2",
+	"vbroadcasti64x4",
+	"vcmpeq_oqpd",
+	"vcmpeq_oqps",
+	"vcmpeq_oqsd",
+	"vcmpeq_oqss",
+	"vcompresspd",
+	"vcompressps",
+	"vcvtpd2qq",
+	"vcvtpd2udq",
+	"vcvtpd2uqq",
+	"vcvtps2qq",
+	"vcvtps2udq",
+	"vcvtps2uqq",
+	"vcvtqq2pd",
+	"vcvtqq2ps",
+	"vcvtsd2usi",
+	"vcvtss2usi",
+	"vcvttpd2qq",
+	"vcvttpd2udq",
+	"vcvttpd2uqq",
+	"vcvttps2qq",
+	"vcvttps2udq",
+	"vcvttps2uqq",
+	"vcvttsd2usi",
+	"vcvttss2usi",
+	"vcvtudq2pd",
+	"vcvtudq2ps",
+	"vcvtuqq2pd",
+	"vcvtuqq2ps",
+	"vcvtusi2sd",
+	"vcvtusi2ss",
+	"vdbpsadbw",
+	"vexp2pd",
+	"vexp2ps",
+	"vexpandpd",
+	"vexpandps",
+	"vextractf32x4",
+	"vextractf32x8",
+	"vextractf64x2",
+	"vextractf64x4",
+	"vextracti32x4",
+	"vextracti32x8",
+	"vextracti64x2",
+	"vextracti64x4",
+	"vfixupimmpd",
+	"vfixupimmps",
+	"vfixupimmsd",
+	"vfixupimmss",
+	"vfpclasspd",
+	"vfpclassps",
+	"vfpclasssd",
+	"vfpclassss",
+	"vgatherpf0dpd",
+	"vgatherpf0dps",
+	"vgatherpf0qpd",
+	"vgatherpf0qps",
+	"vgatherpf1dpd",
+	"vgatherpf1dps",
+	"vgatherpf1qpd",
+	"vgatherpf1qps",
+	"vgetexppd",
+	"vgetexpps",
+	"vgetexpsd",
+	"vgetexpss",
+	"vgetmantpd",
+	"vgetmantps",
+	"vgetmantsd",
+	"vgetmantss",
+	"vinsertf32x4",
+	"vinsertf32x8",
+	"vinsertf64x2",
+	"vinsertf64x4",
+	"vinserti32x4",
+	"vinserti32x8",
+	"vinserti64x2",
+	"vinserti64x4",
+	"vmovdqa32",
+	"vmovdqa64",
+	"vmovdqu16",
+	"vmovdqu32",
+	"vmovdqu64",
+	"vmovdqu8",
+	"vpabsq",
+	"vpandd",
+	"vpandnd",
+	"vpandnq",
+	"vpandq",
+	"vpblendmb",
+	"vpblendmd",
+	"vpblendmq",
+	"vpblendmw",
+	"vpbroadcastmb2q",
+	"vpbroadcastmw2d",
+	"vpcmpequb",
+	"vpcmpequd",
+	"vpcmpequq",
+	"vpcmpequw",
+	"vpcmpgeb",
+	"vpcmpged",
+	"vpcmpgeq",
+	"vpcmpgeub",
+	"vpcmpgeud",
+	"vpcmpgeuq",
+	"vpcmpgeuw",
+	"vpcmpgew",
+	"vpcmpgtub",
+	"vpcmpgtud",
+	"vpcmpgtuq",
+	"vpcmpgtuw",
+	"vpcmpleb",
+	"vpcmpled",
+	"vpcmpleq",
+	"vpcmpleub",
+	"vpcmpleud",
+	"vpcmpleuq",
+	"vpcmpleuw",
+	"vpcmplew",
+	"vpcmpltb",
+	"vpcmpltd",
+	"vpcmpltq",
+	"vpcmpltub",
+	"vpcmpltud",
+	"vpcmpltuq",
+	"vpcmpltuw",
+	"vpcmpltw",
+	"vpcmpneqb",
+	"vpcmpneqd",
+	"vpcmpneqq",
+	"vpcmpnequb",
+	"vpcmpnequd",
+	"vpcmpnequq",
+	"vpcmpnequw",
+	"vpcmpneqw",
+	"vpcmpngtb",
+	"vpcmpngtd",
+	"vpcmpngtq",
+	"vpcmpngtub",
+	"vpcmpngtud",
+	"vpcmpngtuq",
+	"vpcmpngtuw",
+	"vpcmpngtw",
+	"vpcmpnleb",
+	"vpcmpnled",
+	"vpcmpnleq",
+	"vpcmpnleub",
+	"vpcmpnleud",
+	"vpcmpnleuq",
+	"vpcmpnleuw",
+	"vpcmpnlew",
+	"vpcmpnltb",
+	"vpcmpnltd",
+	"vpcmpnltq",
+	"vpcmpnltub",
+	"vpcmpnltud",
+	"vpcmpnltuq",
+	"vpcmpnltuw",
+	"vpcmpnltw",
+	"vpcmpb",
+	"vpcmpd",
+	"vpcmpq",
+	"vpcmpub",
+	"vpcmpud",
+	"vpcmpuq",
+	"vpcmpuw",
+	"vpcmpw",
+	"vpcompressd",
+	"vpcompressq",
+	"vpconflictd",
+	"vpconflictq",
+	"vpermb",
+	"vpermi2b",
+	"vpermi2d",
+	"vpermi2pd",
+	"vpermi2ps",
+	"vpermi2q",
+	"vpermi2w",
+	"vpermt2b",
+	"vpermt2d",
+	"vpermt2pd",
+	"vpermt2ps",
+	"vpermt2q",
+	"vpermt2w",
+	"vpermw",
+	"vpexpandd",
+	"vpexpandq",
+	"vplzcntd",
+	"vplzcntq",
+	"vpmaxsq",
+	"vpmaxuq",
+	"vpminsq",
+	"vpminuq",
+	"vpmovb2m",
+	"vpmovd2m",
+	"vpmovdb",
+	"vpmovdw",
+	"vpmovm2b",
+	"vpmovm2d",
+	"vpmovm2q",
+	"vpmovm2w",
+	"vpmovq2m",
+	"vpmovqb",
+	"vpmovqd",
+	"vpmovqw",
+	"vpmovsdb",
+	"vpmovsdw",
+	"vpmovsqb",
+	"vpmovsqd",
+	"vpmovsqw",
+	"vpmovswb",
+	"vpmovusdb",
+	"vpmovusdw",
+	"vpmovusqb",
+	"vpmovusqd",
+	"vpmovusqw",
+	"vpmovuswb",
+	"vpmovw2m",
+	"vpmovwb",
+	"vpmullq",
+	"vpmultishiftqb",
+	"vpord",
+	"vporq",
+	"vprold",
+	"vprolq",
+	"vprolvd",
+	"vprolvq",
+	"vprord",
+	"vprorq",
+	"vprorvd",
+	"vprorvq",
+	"vpscatterdd",
+	"vpscatterdq",
+	"vpscatterqd",
+	"vpscatterqq",
+	"vpsllvw",
+	"vpsraq",
+	"vpsravq",
+	"vpsravw",
+	"vpsrlvw",
+	"vpternlogd",
+	"vpternlogq",
+	"vptestmb",
+	"vptestmd",
+	"vptestmq",
+	"vptestmw",
+	"vptestnmb",
+	"vptestnmd",
+	"vptestnmq",
+	"vptestnmw",
+	"vpxord",
+	"vpxorq",
+	"vrangepd",
+	"vrangeps",
+	"vrangesd",
+	"vrangess",
+	"vrcp14pd",
+	"vrcp14ps",
+	"vrcp14sd",
+	"vrcp14ss",
+	"vrcp28pd",
+	"vrcp28ps",
+	"vrcp28sd",
+	"vrcp28ss",
+	"vreducepd",
+	"vreduceps",
+	"vreducesd",
+	"vreducess",
+	"vrndscalepd",
+	"vrndscaleps",
+	"vrndscalesd",
+	"vrndscaless",
+	"vrsqrt14pd",
+	"vrsqrt14ps",
+	"vrsqrt14sd",
+	"vrsqrt14ss",
+	"vrsqrt28pd",
+	"vrsqrt28ps",
+	"vrsqrt28sd",
+	"vrsqrt28ss",
+	"vscalefpd",
+	"vscalefps",
+	"vscalefsd",
+	"vscalefss",
+	"vscatterdpd",
+	"vscatterdps",
+	"vscatterpf0dpd",
+	"vscatterpf0dps",
+	"vscatterpf0qpd",
+	"vscatterpf0qps",
+	"vscatterpf1dpd",
+	"vscatterpf1dps",
+	"vscatterpf1qpd",
+	"vscatterpf1qps",
+	"vscatterqpd",
+	"vscatterqps",
+	"vshuff32x4",
+	"vshuff64x2",
+	"vshufi32x4",
+	"vshufi64x2",
+	"rdpkru",
+	"wrpkru",
+	"rdpid",
+	"clflushopt",
+	"clwb",
+	"pcommit",
+	"clzero",
+	"ptwrite",
+	"cldemote",
+	"movdiri",
+	"movdir64b",
+	"pconfig",
+	"tpause",
+	"umonitor",
+	"umwait",
+	"wbnoinvd",
+	"gf2p8affineinvqb",
+	"vgf2p8affineinvqb",
+	"gf2p8affineqb",
+	"vgf2p8affineqb",
+	"gf2p8mulb",
+	"vgf2p8mulb",
+	"vpcompressb",
+	"vpcompressw",
+	"vpexpandb",
+	"vpexpandw",
+	"vpshldw",
+	"vpshldd",
+	"vpshldq",
+	"vpshldvw",
+	"vpshldvd",
+	"vpshldvq",
+	"vpshrdw",
+	"vpshrdd",
+	"vpshrdq",
+	"vpshrdvw",
+	"vpshrdvd",
+	"vpshrdvq",
+	"vpdpbusd",
+	"vpdpbusds",
+	"vpdpwssd",
+	"vpdpwssds",
+	"vpopcntb",
+	"vpopcntw",
+	"vpopcntd",
+	"vpopcntq",
+	"vpshufbitqmb",
+	"v4fmaddps",
+	"v4fnmaddps",
+	"v4fmaddss",
+	"v4fnmaddss",
+	"v4dpwssds",
+	"v4dpwssd",
+	"encls",
+	"enclu",
+	"enclv",
+	"clrssbsy",
+	"endbr32",
+	"endbr64",
+	"incsspd",
+	"incsspq",
+	"rdsspd",
+	"rdsspq",
+	"rstorssp",
+	"saveprevssp",
+	"setssbsy",
+	"wrussd",
+	"wrussq",
+	"wrssd",
+	"wrssq",
+	"enqcmd",
+	"enqcmds",
+	"serialize",
+	"xresldtrk",
+	"xsusldtrk",
+	"vcvtne2ps2bf16",
+	"vdpbf16ps",
+	"vp2intersectd",
+	"ldtilecfg",
+	"sttilecfg",
+	"tdpbf16ps",
+	"tdpbssd",
+	"tdpbsud",
+	"tdpbusd",
+	"tdpbuud",
+	"tileloadd",
+	"tileloaddt1",
+	"tilerelease",
+	"tilestored",
+	"tilezero",
+	"vaddph",
+	"vaddsh",
+	"vcmpph",
+	"vcmpsh",
+	"vcomish",
+	"vcvtdq2ph",
+	"vcvtpd2ph",
+	"vcvtph2dq",
+	"vcvtph2pd",
+	"vcvtph2psx",
+	"vcvtph2qq",
+	"vcvtph2udq",
+	"vcvtph2uqq",
+	"vcvtph2uw",
+	"vcvtph2w",
+	"vcvtqq2ph",
+	"vcvtsd2sh",
+	"vcvtsh2sd",
+	"vcvtsh2si",
+	"vcvtsh2ss",
+	"vcvtsh2usi",
+	"vcvtsi2sh",
+	"vcvtss2sh",
+	"vcvttph2dq",
+	"vcvttph2qq",
+	"vcvttph2udq",
+	"vcvttph2uqq",
+	"vcvttph2uw",
+	"vcvttph2w",
+	"vcvttsh2si",
+	"vcvttsh2usi",
+	"vcvtudq2ph",
+	"vcvtuqq2ph",
+	"vcvtusi2sh",
+	"vcvtuw2ph",
+	"vcvtw2ph",
+	"vdivph",
+	"vdivsh",
+	"vfcmaddcph",
+	"vfmaddcph",
+	"vfcmaddcsh",
+	"vfmaddcsh",
+	"vfcmulcpch",
+	"vfmulcpch",
+	"vfcmulcsh",
+	"vfmulcsh",
+	"vfmaddsub132ph",
+	"vfmaddsub213ph",
+	"vfmaddsub231ph",
+	"vfmsubadd132ph",
+	"vfmsubadd213ph",
+	"vfmsubadd231ph",
+	"vpmadd132ph",
+	"vpmadd213ph",
+	"vpmadd231ph",
+	"vfmadd132ph",
+	"vfmadd213ph",
+	"vfmadd231ph",
+	"vpmadd132sh",
+	"vpmadd213sh",
+	"vpmadd231sh",
+	"vpnmadd132sh",
+	"vpnmadd213sh",
+	"vpnmadd231sh",
+	"vpmsub132ph",
+	"vpmsub213ph",
+	"vpmsub231ph",
+	"vfmsub132ph",
+	"vfmsub213ph",
+	"vfmsub231ph",
+	"vpmsub132sh",
+	"vpmsub213sh",
+	"vpmsub231sh",
+	"vpnmsub132sh",
+	"vpnmsub213sh",
+	"vpnmsub231sh",
+	"vfpclassph",
+	"vfpclasssh",
+	"vgetexpph",
+	"vgetexpsh",
+	"vgetmantph",
+	"vgetmantsh",
+	"vgetmaxph",
+	"vgetmaxsh",
+	"vgetminph",
+	"vgetminsh",
+	"vmovsh",
+	"vmovw",
+	"vmulph",
+	"vmulsh",
+	"vrcpph",
+	"vrcpsh",
+	"vreduceph",
+	"vreducesh",
+	"vendscaleph",
+	"vendscalesh",
+	"vrsqrtph",
+	"vrsqrtsh",
+	"vscalefph",
+	"vscalefsh",
+	"vsqrtph",
+	"vsqrtsh",
+	"vsubph",
+	"vsubsh",
+	"vucomish",
+	"aadd",
+	"aand",
+	"axor",
+	"clui",
+	"senduipi",
+	"stui",
+	"testui",
+	"uiret",
+	"cmpaxadd",
+	"cmpaexadd",
+	"cmpbxadd",
+	"cmpbexadd",
+	"cmpcxadd",
+	"cmpexadd",
+	"cmpgxadd",
+	"cmpgexadd",
+	"cmplxadd",
+	"cmplexadd",
+	"cmpnaxadd",
+	"cmpnaexadd",
+	"cmpnbxadd",
+	"cmpnbexadd",
+	"cmpncxadd",
+	"cmpnexadd",
+	"cmpngxadd",
+	"cmpngexadd",
+	"cmpnlxadd",
+	"cmpnlexadd",
+	"cmpnoxadd",
+	"cmpnpxadd",
+	"cmpnsxadd",
+	"cmpnzxadd",
+	"cmpoxadd",
+	"cmppxadd",
+	"cmppexadd",
+	"cmppoxadd",
+	"cmpsxadd",
+	"cmpzxadd",
+	"erets",
+	"eretu",
+	"lkgs",
+	"wrmsrns",
+	"rdmsrlist",
+	"wrmsrlist",
+	"hreset",
+	"hint_nop0",
+	"hint_nop1",
+	"hint_nop2",
+	"hint_nop3",
+	"hint_nop4",
+	"hint_nop5",
+	"hint_nop6",
+	"hint_nop7",
+	"hint_nop8",
+	"hint_nop9",
+	"hint_nop10",
+	"hint_nop11",
+	"hint_nop12",
+	"hint_nop13",
+	"hint_nop14",
+	"hint_nop15",
+	"hint_nop16",
+	"hint_nop17",
+	"hint_nop18",
+	"hint_nop19",
+	"hint_nop20",
+	"hint_nop21",
+	"hint_nop22",
+	"hint_nop23",
+	"hint_nop24",
+	"hint_nop25",
+	"hint_nop26",
+	"hint_nop27",
+	"hint_nop28",
+	"hint_nop29",
+	"hint_nop30",
+	"hint_nop31",
+	"hint_nop32",
+	"hint_nop33",
+	"hint_nop34",
+	"hint_nop35",
+	"hint_nop36",
+	"hint_nop37",
+	"hint_nop38",
+	"hint_nop39",
+	"hint_nop40",
+	"hint_nop41",
+	"hint_nop42",
+	"hint_nop43",
+	"hint_nop44",
+	"hint_nop45",
+	"hint_nop46",
+	"hint_nop47",
+	"hint_nop48",
+	"hint_nop49",
+	"hint_nop50",
+	"hint_nop51",
+	"hint_nop52",
+	"hint_nop53",
+	"hint_nop54",
+	"hint_nop55",
+	"hint_nop56",
+	"hint_nop57",
+	"hint_nop58",
+	"hint_nop59",
+	"hint_nop60",
+	"hint_nop61",
+	"hint_nop62",
+	"hint_nop63",
+};

_service:tar_scm:nasm-2.16.03.tar.xz/x86/regdis.c Added

@@ -0,0 +1,21 @@
+/* automatically generated from ./x86/regs.dat - do not edit */
+
+#include "regdis.h"
+
+const enum reg_enum nasm_rd_bndreg   4 = {R_BND0,R_BND1,R_BND2,R_BND3};
+const enum reg_enum nasm_rd_creg    16 = {R_CR0,R_CR1,R_CR2,R_CR3,R_CR4,R_CR5,R_CR6,R_CR7,R_CR8,R_CR9,R_CR10,R_CR11,R_CR12,R_CR13,R_CR14,R_CR15};
+const enum reg_enum nasm_rd_dreg    16 = {R_DR0,R_DR1,R_DR2,R_DR3,R_DR4,R_DR5,R_DR6,R_DR7,R_DR8,R_DR9,R_DR10,R_DR11,R_DR12,R_DR13,R_DR14,R_DR15};
+const enum reg_enum nasm_rd_fpureg   8 = {R_ST0,R_ST1,R_ST2,R_ST3,R_ST4,R_ST5,R_ST6,R_ST7};
+const enum reg_enum nasm_rd_mmxreg   8 = {R_MM0,R_MM1,R_MM2,R_MM3,R_MM4,R_MM5,R_MM6,R_MM7};
+const enum reg_enum nasm_rd_opmaskreg 8 = {R_K0,R_K1,R_K2,R_K3,R_K4,R_K5,R_K6,R_K7};
+const enum reg_enum nasm_rd_reg16   16 = {R_AX,R_CX,R_DX,R_BX,R_SP,R_BP,R_SI,R_DI,R_R8W,R_R9W,R_R10W,R_R11W,R_R12W,R_R13W,R_R14W,R_R15W};
+const enum reg_enum nasm_rd_reg32   16 = {R_EAX,R_ECX,R_EDX,R_EBX,R_ESP,R_EBP,R_ESI,R_EDI,R_R8D,R_R9D,R_R10D,R_R11D,R_R12D,R_R13D,R_R14D,R_R15D};
+const enum reg_enum nasm_rd_reg64   16 = {R_RAX,R_RCX,R_RDX,R_RBX,R_RSP,R_RBP,R_RSI,R_RDI,R_R8,R_R9,R_R10,R_R11,R_R12,R_R13,R_R14,R_R15};
+const enum reg_enum nasm_rd_reg8     8 = {R_AL,R_CL,R_DL,R_BL,R_AH,R_CH,R_DH,R_BH};
+const enum reg_enum nasm_rd_reg8_rex16 = {R_AL,R_CL,R_DL,R_BL,R_SPL,R_BPL,R_SIL,R_DIL,R_R8B,R_R9B,R_R10B,R_R11B,R_R12B,R_R13B,R_R14B,R_R15B};
+const enum reg_enum nasm_rd_sreg     8 = {R_ES,R_CS,R_SS,R_DS,R_FS,R_GS,R_SEGR6,R_SEGR7};
+const enum reg_enum nasm_rd_tmmreg   8 = {R_TMM0,R_TMM1,R_TMM2,R_TMM3,R_TMM4,R_TMM5,R_TMM6,R_TMM7};
+const enum reg_enum nasm_rd_treg     8 = {R_TR0,R_TR1,R_TR2,R_TR3,R_TR4,R_TR5,R_TR6,R_TR7};
+const enum reg_enum nasm_rd_xmmreg  32 = {R_XMM0,R_XMM1,R_XMM2,R_XMM3,R_XMM4,R_XMM5,R_XMM6,R_XMM7,R_XMM8,R_XMM9,R_XMM10,R_XMM11,R_XMM12,R_XMM13,R_XMM14,R_XMM15,R_XMM16,R_XMM17,R_XMM18,R_XMM19,R_XMM20,R_XMM21,R_XMM22,R_XMM23,R_XMM24,R_XMM25,R_XMM26,R_XMM27,R_XMM28,R_XMM29,R_XMM30,R_XMM31};
+const enum reg_enum nasm_rd_ymmreg  32 = {R_YMM0,R_YMM1,R_YMM2,R_YMM3,R_YMM4,R_YMM5,R_YMM6,R_YMM7,R_YMM8,R_YMM9,R_YMM10,R_YMM11,R_YMM12,R_YMM13,R_YMM14,R_YMM15,R_YMM16,R_YMM17,R_YMM18,R_YMM19,R_YMM20,R_YMM21,R_YMM22,R_YMM23,R_YMM24,R_YMM25,R_YMM26,R_YMM27,R_YMM28,R_YMM29,R_YMM30,R_YMM31};
+const enum reg_enum nasm_rd_zmmreg  32 = {R_ZMM0,R_ZMM1,R_ZMM2,R_ZMM3,R_ZMM4,R_ZMM5,R_ZMM6,R_ZMM7,R_ZMM8,R_ZMM9,R_ZMM10,R_ZMM11,R_ZMM12,R_ZMM13,R_ZMM14,R_ZMM15,R_ZMM16,R_ZMM17,R_ZMM18,R_ZMM19,R_ZMM20,R_ZMM21,R_ZMM22,R_ZMM23,R_ZMM24,R_ZMM25,R_ZMM26,R_ZMM27,R_ZMM28,R_ZMM29,R_ZMM30,R_ZMM31};

_service:tar_scm:nasm-2.16.03.tar.xz/x86/regdis.h Added

_service:tar_scm:nasm-2.16.03.tar.xz/x86/regflags.c Added

@@ -0,0 +1,256 @@
+/* automatically generated from ./x86/regs.dat - do not edit */
+
+#include "tables.h"
+#include "nasm.h"
+
+const opflags_t nasm_reg_flags = {
+    0,
+    REG_HIGH,       /* ah    */
+    REG_AL,         /* al    */
+    REG_AX,         /* ax    */
+    REG_HIGH,       /* bh    */
+    REG8NA,         /* bl    */
+    BNDREG,         /* bnd0  */
+    BNDREG,         /* bnd1  */
+    BNDREG,         /* bnd2  */
+    BNDREG,         /* bnd3  */
+    REG16NA,        /* bp    */
+    REG8NA,         /* bpl   */
+    REG16NA,        /* bx    */
+    REG_HIGH,       /* ch    */
+    REG_CL,         /* cl    */
+    REG_CREG,       /* cr0   */
+    REG_CREG,       /* cr1   */
+    REG_CREG,       /* cr10  */
+    REG_CREG,       /* cr11  */
+    REG_CREG,       /* cr12  */
+    REG_CREG,       /* cr13  */
+    REG_CREG,       /* cr14  */
+    REG_CREG,       /* cr15  */
+    REG_CREG,       /* cr2   */
+    REG_CREG,       /* cr3   */
+    REG_CREG,       /* cr4   */
+    REG_CREG,       /* cr5   */
+    REG_CREG,       /* cr6   */
+    REG_CREG,       /* cr7   */
+    REG_CREG,       /* cr8   */
+    REG_CREG,       /* cr9   */
+    REG_CS,         /* cs    */
+    REG_CX,         /* cx    */
+    REG_HIGH,       /* dh    */
+    REG16NA,        /* di    */
+    REG8NA,         /* dil   */
+    REG_DL,         /* dl    */
+    REG_DREG,       /* dr0   */
+    REG_DREG,       /* dr1   */
+    REG_DREG,       /* dr10  */
+    REG_DREG,       /* dr11  */
+    REG_DREG,       /* dr12  */
+    REG_DREG,       /* dr13  */
+    REG_DREG,       /* dr14  */
+    REG_DREG,       /* dr15  */
+    REG_DREG,       /* dr2   */
+    REG_DREG,       /* dr3   */
+    REG_DREG,       /* dr4   */
+    REG_DREG,       /* dr5   */
+    REG_DREG,       /* dr6   */
+    REG_DREG,       /* dr7   */
+    REG_DREG,       /* dr8   */
+    REG_DREG,       /* dr9   */
+    REG_DS,         /* ds    */
+    REG_DX,         /* dx    */
+    REG_EAX,        /* eax   */
+    REG32NA,        /* ebp   */
+    REG32NA,        /* ebx   */
+    REG_ECX,        /* ecx   */
+    REG32NA,        /* edi   */
+    REG_EDX,        /* edx   */
+    REG_ES,         /* es    */
+    REG32NA,        /* esi   */
+    REG32NA,        /* esp   */
+    REG_FS,         /* fs    */
+    REG_GS,         /* gs    */
+    OPMASK0,        /* k0    */
+    OPMASKREG,      /* k1    */
+    OPMASKREG,      /* k2    */
+    OPMASKREG,      /* k3    */
+    OPMASKREG,      /* k4    */
+    OPMASKREG,      /* k5    */
+    OPMASKREG,      /* k6    */
+    OPMASKREG,      /* k7    */
+    MMXREG,         /* mm0   */
+    MMXREG,         /* mm1   */
+    MMXREG,         /* mm2   */
+    MMXREG,         /* mm3   */
+    MMXREG,         /* mm4   */
+    MMXREG,         /* mm5   */
+    MMXREG,         /* mm6   */
+    MMXREG,         /* mm7   */
+    REG64NA,        /* r10   */
+    REG8NA,         /* r10b  */
+    REG32NA,        /* r10d  */
+    REG16NA,        /* r10w  */
+    REG64NA,        /* r11   */
+    REG8NA,         /* r11b  */
+    REG32NA,        /* r11d  */
+    REG16NA,        /* r11w  */
+    REG64NA,        /* r12   */
+    REG8NA,         /* r12b  */
+    REG32NA,        /* r12d  */
+    REG16NA,        /* r12w  */
+    REG64NA,        /* r13   */
+    REG8NA,         /* r13b  */
+    REG32NA,        /* r13d  */
+    REG16NA,        /* r13w  */
+    REG64NA,        /* r14   */
+    REG8NA,         /* r14b  */
+    REG32NA,        /* r14d  */
+    REG16NA,        /* r14w  */
+    REG64NA,        /* r15   */
+    REG8NA,         /* r15b  */
+    REG32NA,        /* r15d  */
+    REG16NA,        /* r15w  */
+    REG64NA,        /* r8    */
+    REG8NA,         /* r8b   */
+    REG32NA,        /* r8d   */
+    REG16NA,        /* r8w   */
+    REG64NA,        /* r9    */
+    REG8NA,         /* r9b   */
+    REG32NA,        /* r9d   */
+    REG16NA,        /* r9w   */
+    REG_RAX,        /* rax   */
+    REG64NA,        /* rbp   */
+    REG64NA,        /* rbx   */
+    REG_RCX,        /* rcx   */
+    REG64NA,        /* rdi   */
+    REG_RDX,        /* rdx   */
+    REG64NA,        /* rsi   */
+    REG64NA,        /* rsp   */
+    REG_SEG67,      /* segr6 */
+    REG_SEG67,      /* segr7 */
+    REG16NA,        /* si    */
+    REG8NA,         /* sil   */
+    REG16NA,        /* sp    */
+    REG8NA,         /* spl   */
+    REG_SS,         /* ss    */
+    FPU0,           /* st0   */
+    FPUREG,         /* st1   */
+    FPUREG,         /* st2   */
+    FPUREG,         /* st3   */
+    FPUREG,         /* st4   */
+    FPUREG,         /* st5   */
+    FPUREG,         /* st6   */
+    FPUREG,         /* st7   */
+    TMMREG,         /* tmm0  */
+    TMMREG,         /* tmm1  */
+    TMMREG,         /* tmm2  */
+    TMMREG,         /* tmm3  */
+    TMMREG,         /* tmm4  */
+    TMMREG,         /* tmm5  */
+    TMMREG,         /* tmm6  */
+    TMMREG,         /* tmm7  */
+    REG_TREG,       /* tr0   */
+    REG_TREG,       /* tr1   */
+    REG_TREG,       /* tr2   */
+    REG_TREG,       /* tr3   */
+    REG_TREG,       /* tr4   */
+    REG_TREG,       /* tr5   */
+    REG_TREG,       /* tr6   */
+    REG_TREG,       /* tr7   */
+    XMM0,           /* xmm0  */
+    XMM_L16,        /* xmm1  */
+    XMM_L16,        /* xmm10 */
+    XMM_L16,        /* xmm11 */
+    XMM_L16,        /* xmm12 */
+    XMM_L16,        /* xmm13 */
+    XMM_L16,        /* xmm14 */
+    XMM_L16,        /* xmm15 */
+    XMMREG,         /* xmm16 */
+    XMMREG,         /* xmm17 */
+    XMMREG,         /* xmm18 */
+    XMMREG,         /* xmm19 */
+    XMM_L16,        /* xmm2  */
+    XMMREG,         /* xmm20 */
+    XMMREG,         /* xmm21 */
+    XMMREG,         /* xmm22 */
+    XMMREG,         /* xmm23 */
+    XMMREG,         /* xmm24 */
+    XMMREG,         /* xmm25 */
+    XMMREG,         /* xmm26 */
+    XMMREG,         /* xmm27 */
+    XMMREG,         /* xmm28 */
+    XMMREG,         /* xmm29 */
+    XMM_L16,        /* xmm3  */
+    XMMREG,         /* xmm30 */
+    XMMREG,         /* xmm31 */
+    XMM_L16,        /* xmm4  */
+    XMM_L16,        /* xmm5  */
+    XMM_L16,        /* xmm6  */
+    XMM_L16,        /* xmm7  */
+    XMM_L16,        /* xmm8  */
+    XMM_L16,        /* xmm9  */
+    YMM0,           /* ymm0  */
+    YMM_L16,        /* ymm1  */
+    YMM_L16,        /* ymm10 */
+    YMM_L16,        /* ymm11 */
+    YMM_L16,        /* ymm12 */
+    YMM_L16,        /* ymm13 */
+    YMM_L16,        /* ymm14 */
+    YMM_L16,        /* ymm15 */
+    YMMREG,         /* ymm16 */
+    YMMREG,         /* ymm17 */
+    YMMREG,         /* ymm18 */
+    YMMREG,         /* ymm19 */
+    YMM_L16,        /* ymm2  */
+    YMMREG,         /* ymm20 */
+    YMMREG,         /* ymm21 */
+    YMMREG,         /* ymm22 */
+    YMMREG,         /* ymm23 */
+    YMMREG,         /* ymm24 */
+    YMMREG,         /* ymm25 */
+    YMMREG,         /* ymm26 */
+    YMMREG,         /* ymm27 */
+    YMMREG,         /* ymm28 */
+    YMMREG,         /* ymm29 */
+    YMM_L16,        /* ymm3  */
+    YMMREG,         /* ymm30 */
+    YMMREG,         /* ymm31 */
+    YMM_L16,        /* ymm4  */
+    YMM_L16,        /* ymm5  */
+    YMM_L16,        /* ymm6  */
+    YMM_L16,        /* ymm7  */
+    YMM_L16,        /* ymm8  */
+    YMM_L16,        /* ymm9  */
+    ZMM0,           /* zmm0  */
+    ZMM_L16,        /* zmm1  */
+    ZMM_L16,        /* zmm10 */
+    ZMM_L16,        /* zmm11 */
+    ZMM_L16,        /* zmm12 */
+    ZMM_L16,        /* zmm13 */
+    ZMM_L16,        /* zmm14 */
+    ZMM_L16,        /* zmm15 */
+    ZMMREG,         /* zmm16 */
+    ZMMREG,         /* zmm17 */
+    ZMMREG,         /* zmm18 */
+    ZMMREG,         /* zmm19 */
+    ZMM_L16,        /* zmm2  */
+    ZMMREG,         /* zmm20 */
+    ZMMREG,         /* zmm21 */
+    ZMMREG,         /* zmm22 */
+    ZMMREG,         /* zmm23 */
+    ZMMREG,         /* zmm24 */
+    ZMMREG,         /* zmm25 */
+    ZMMREG,         /* zmm26 */
+    ZMMREG,         /* zmm27 */
+    ZMMREG,         /* zmm28 */
+    ZMMREG,         /* zmm29 */
+    ZMM_L16,        /* zmm3  */
+    ZMMREG,         /* zmm30 */
+    ZMMREG,         /* zmm31 */
+    ZMM_L16,        /* zmm4  */
+    ZMM_L16,        /* zmm5  */
+    ZMM_L16,        /* zmm6  */
+    ZMM_L16,        /* zmm7  */
+    ZMM_L16,        /* zmm8  */
+    ZMM_L16,        /* zmm9  */
+};

_service:tar_scm:nasm-2.16.03.tar.xz/x86/regs.c Added

@@ -0,0 +1,254 @@
+/* automatically generated from ./x86/regs.dat - do not edit */
+
+#include "tables.h"
+
+const char * const nasm_reg_names = {
+    "ah",
+    "al",
+    "ax",
+    "bh",
+    "bl",
+    "bnd0",
+    "bnd1",
+    "bnd2",
+    "bnd3",
+    "bp",
+    "bpl",
+    "bx",
+    "ch",
+    "cl",
+    "cr0",
+    "cr1",
+    "cr10",
+    "cr11",
+    "cr12",
+    "cr13",
+    "cr14",
+    "cr15",
+    "cr2",
+    "cr3",
+    "cr4",
+    "cr5",
+    "cr6",
+    "cr7",
+    "cr8",
+    "cr9",
+    "cs",
+    "cx",
+    "dh",
+    "di",
+    "dil",
+    "dl",
+    "dr0",
+    "dr1",
+    "dr10",
+    "dr11",
+    "dr12",
+    "dr13",
+    "dr14",
+    "dr15",
+    "dr2",
+    "dr3",
+    "dr4",
+    "dr5",
+    "dr6",
+    "dr7",
+    "dr8",
+    "dr9",
+    "ds",
+    "dx",
+    "eax",
+    "ebp",
+    "ebx",
+    "ecx",
+    "edi",
+    "edx",
+    "es",
+    "esi",
+    "esp",
+    "fs",
+    "gs",
+    "k0",
+    "k1",
+    "k2",
+    "k3",
+    "k4",
+    "k5",
+    "k6",
+    "k7",
+    "mm0",
+    "mm1",
+    "mm2",
+    "mm3",
+    "mm4",
+    "mm5",
+    "mm6",
+    "mm7",
+    "r10",
+    "r10b",
+    "r10d",
+    "r10w",
+    "r11",
+    "r11b",
+    "r11d",
+    "r11w",
+    "r12",
+    "r12b",
+    "r12d",
+    "r12w",
+    "r13",
+    "r13b",
+    "r13d",
+    "r13w",
+    "r14",
+    "r14b",
+    "r14d",
+    "r14w",
+    "r15",
+    "r15b",
+    "r15d",
+    "r15w",
+    "r8",
+    "r8b",
+    "r8d",
+    "r8w",
+    "r9",
+    "r9b",
+    "r9d",
+    "r9w",
+    "rax",
+    "rbp",
+    "rbx",
+    "rcx",
+    "rdi",
+    "rdx",
+    "rsi",
+    "rsp",
+    "segr6",
+    "segr7",
+    "si",
+    "sil",
+    "sp",
+    "spl",
+    "ss",
+    "st0",
+    "st1",
+    "st2",
+    "st3",
+    "st4",
+    "st5",
+    "st6",
+    "st7",
+    "tmm0",
+    "tmm1",
+    "tmm2",
+    "tmm3",
+    "tmm4",
+    "tmm5",
+    "tmm6",
+    "tmm7",
+    "tr0",
+    "tr1",
+    "tr2",
+    "tr3",
+    "tr4",
+    "tr5",
+    "tr6",
+    "tr7",
+    "xmm0",
+    "xmm1",
+    "xmm10",
+    "xmm11",
+    "xmm12",
+    "xmm13",
+    "xmm14",
+    "xmm15",
+    "xmm16",
+    "xmm17",
+    "xmm18",
+    "xmm19",
+    "xmm2",
+    "xmm20",
+    "xmm21",
+    "xmm22",
+    "xmm23",
+    "xmm24",
+    "xmm25",
+    "xmm26",
+    "xmm27",
+    "xmm28",
+    "xmm29",
+    "xmm3",
+    "xmm30",
+    "xmm31",
+    "xmm4",
+    "xmm5",
+    "xmm6",
+    "xmm7",
+    "xmm8",
+    "xmm9",
+    "ymm0",
+    "ymm1",
+    "ymm10",
+    "ymm11",
+    "ymm12",
+    "ymm13",
+    "ymm14",
+    "ymm15",
+    "ymm16",
+    "ymm17",
+    "ymm18",
+    "ymm19",
+    "ymm2",
+    "ymm20",
+    "ymm21",
+    "ymm22",
+    "ymm23",
+    "ymm24",
+    "ymm25",
+    "ymm26",
+    "ymm27",
+    "ymm28",
+    "ymm29",
+    "ymm3",
+    "ymm30",
+    "ymm31",
+    "ymm4",
+    "ymm5",
+    "ymm6",
+    "ymm7",
+    "ymm8",
+    "ymm9",
+    "zmm0",
+    "zmm1",
+    "zmm10",
+    "zmm11",
+    "zmm12",
+    "zmm13",
+    "zmm14",
+    "zmm15",
+    "zmm16",
+    "zmm17",
+    "zmm18",
+    "zmm19",
+    "zmm2",
+    "zmm20",
+    "zmm21",
+    "zmm22",
+    "zmm23",
+    "zmm24",
+    "zmm25",
+    "zmm26",
+    "zmm27",
+    "zmm28",
+    "zmm29",
+    "zmm3",
+    "zmm30",
+    "zmm31",
+    "zmm4",
+    "zmm5",
+    "zmm6",
+    "zmm7",
+    "zmm8",
+    "zmm9"
+};

_service:tar_scm:nasm-2.16.03.tar.xz/x86/regs.dat Added

@@ -0,0 +1,141 @@
+## --------------------------------------------------------------------------
+##   
+##   Copyright 1996-2009 The NASM Authors - All Rights Reserved
+##   See the file AUTHORS included with the NASM distribution for
+##   the specific copyright holders.
+##
+##   Redistribution and use in source and binary forms, with or without
+##   modification, are permitted provided that the following
+##   conditions are met:
+##
+##   * Redistributions of source code must retain the above copyright
+##     notice, this list of conditions and the following disclaimer.
+##   * Redistributions in binary form must reproduce the above
+##     copyright notice, this list of conditions and the following
+##     disclaimer in the documentation and/or other materials provided
+##     with the distribution.
+##     
+##     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+##     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+##     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+##     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+##     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+##     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+##     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+##     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+##     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+##     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+##     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+##     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+##     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+##
+## --------------------------------------------------------------------------
+
+#
+# List of registers and their classes; classes are defined in nasm.h
+#
+# The columns are:
+#
+# register name, assembler class, disassembler class(es), x86 register number, token flag
+#
+# If the register name ends in two numbers separated by a dash, then it is
+# repeated as many times as indicated, and the register number is
+# updated with it.
+#
+# If 'token flag' is present, this value will be assigned to tokflag field in
+# 'struct tokendata tokendata' table. Token flag can be used for specifying
+# special usage of corresponding register. E.g. opmask registers can be either
+# enclosed by curly braces or standalone operand depending on the usage.
+#
+
+# General-purpose registers
+al	REG_AL		reg8,reg8_rex	0
+ah	REG_HIGH	reg8		4
+ax	REG_AX		reg16		0
+eax	REG_EAX		reg32		0
+rax	REG_RAX		reg64		0
+bl	REG8NA		reg8,reg8_rex	3
+bh	REG_HIGH	reg8		7
+bx	REG16NA		reg16		3
+ebx	REG32NA		reg32		3
+rbx	REG64NA		reg64		3
+cl	REG_CL		reg8,reg8_rex	1
+ch	REG_HIGH	reg8		5
+cx	REG_CX		reg16		1
+ecx	REG_ECX		reg32		1
+rcx	REG_RCX		reg64		1
+dl	REG_DL		reg8,reg8_rex	2
+dh	REG_HIGH	reg8		6
+dx	REG_DX		reg16		2
+edx	REG_EDX		reg32		2
+rdx	REG_RDX		reg64		2
+spl	REG8NA		reg8_rex	4
+sp	REG16NA		reg16		4
+esp	REG32NA		reg32		4
+rsp	REG64NA		reg64		4
+bpl	REG8NA		reg8_rex	5
+bp	REG16NA		reg16		5
+ebp	REG32NA		reg32		5
+rbp	REG64NA		reg64		5
+sil	REG8NA		reg8_rex	6
+si	REG16NA		reg16		6
+esi	REG32NA		reg32		6
+rsi	REG64NA		reg64		6
+dil	REG8NA		reg8_rex	7
+di	REG16NA		reg16		7
+edi	REG32NA		reg32		7
+rdi	REG64NA		reg64		7
+r8-15b	REG8NA		reg8_rex	8
+r8-15w	REG16NA		reg16		8
+r8-15d	REG32NA		reg32		8
+r8-15	REG64NA		reg64		8
+
+# Segment registers
+es	REG_ES		sreg		0
+cs	REG_CS		sreg		1
+ss	REG_SS		sreg		2
+ds	REG_DS		sreg		3
+fs	REG_FS		sreg		4
+gs	REG_GS		sreg		5
+segr6-7	REG_SEG67	sreg		6
+
+# Control registers
+cr0-15	REG_CREG	creg		0
+
+# Debug registers
+dr0-15	REG_DREG	dreg		0
+
+# Test registers
+tr0-7	REG_TREG	treg		0
+
+# Floating-point registers
+st0	FPU0		fpureg		0
+st1-7	FPUREG		fpureg		1
+
+# MMX registers
+mm0-7	MMXREG		mmxreg		0
+
+# SSE registers
+xmm0	XMM0		xmmreg		0
+xmm1-15	XMM_L16		xmmreg		1
+xmm16-31	XMMREG		xmmreg		16
+
+# AVX registers
+ymm0	YMM0		ymmreg		0
+ymm1-15	YMM_L16		ymmreg		1
+ymm16-31	YMMREG		ymmreg		16
+
+# AVX512 registers
+zmm0	ZMM0		zmmreg		0
+zmm1-15	ZMM_L16		zmmreg		1
+zmm16-31	ZMMREG		zmmreg		16
+
+# AMX tile registers
+tmm0-7	TMMREG		tmmreg		0
+
+# Opmask registers
+k0	OPMASK0		opmaskreg	0
+k1-7	OPMASKREG	opmaskreg	1   TFLAG_BRC_OPT
+
+# Bounds registers
+bnd0-3	BNDREG		bndreg		0

_service:tar_scm:nasm-2.16.03.tar.xz/x86/regs.h Added

@@ -0,0 +1,514 @@
+/* automatically generated from ./x86/regs.dat - do not edit */
+
+#ifndef NASM_REGS_H
+#define NASM_REGS_H
+
+#define EXPR_REG_START 1
+
+enum reg_enum {
+    R_zero = 0,
+    R_none = -1,
+    R_AH = EXPR_REG_START,
+    R_AL,
+    R_AX,
+    R_BH,
+    R_BL,
+    R_BND0,
+    R_BND1,
+    R_BND2,
+    R_BND3,
+    R_BP,
+    R_BPL,
+    R_BX,
+    R_CH,
+    R_CL,
+    R_CR0,
+    R_CR1,
+    R_CR10,
+    R_CR11,
+    R_CR12,
+    R_CR13,
+    R_CR14,
+    R_CR15,
+    R_CR2,
+    R_CR3,
+    R_CR4,
+    R_CR5,
+    R_CR6,
+    R_CR7,
+    R_CR8,
+    R_CR9,
+    R_CS,
+    R_CX,
+    R_DH,
+    R_DI,
+    R_DIL,
+    R_DL,
+    R_DR0,
+    R_DR1,
+    R_DR10,
+    R_DR11,
+    R_DR12,
+    R_DR13,
+    R_DR14,
+    R_DR15,
+    R_DR2,
+    R_DR3,
+    R_DR4,
+    R_DR5,
+    R_DR6,
+    R_DR7,
+    R_DR8,
+    R_DR9,
+    R_DS,
+    R_DX,
+    R_EAX,
+    R_EBP,
+    R_EBX,
+    R_ECX,
+    R_EDI,
+    R_EDX,
+    R_ES,
+    R_ESI,
+    R_ESP,
+    R_FS,
+    R_GS,
+    R_K0,
+    R_K1,
+    R_K2,
+    R_K3,
+    R_K4,
+    R_K5,
+    R_K6,
+    R_K7,
+    R_MM0,
+    R_MM1,
+    R_MM2,
+    R_MM3,
+    R_MM4,
+    R_MM5,
+    R_MM6,
+    R_MM7,
+    R_R10,
+    R_R10B,
+    R_R10D,
+    R_R10W,
+    R_R11,
+    R_R11B,
+    R_R11D,
+    R_R11W,
+    R_R12,
+    R_R12B,
+    R_R12D,
+    R_R12W,
+    R_R13,
+    R_R13B,
+    R_R13D,
+    R_R13W,
+    R_R14,
+    R_R14B,
+    R_R14D,
+    R_R14W,
+    R_R15,
+    R_R15B,
+    R_R15D,
+    R_R15W,
+    R_R8,
+    R_R8B,
+    R_R8D,
+    R_R8W,
+    R_R9,
+    R_R9B,
+    R_R9D,
+    R_R9W,
+    R_RAX,
+    R_RBP,
+    R_RBX,
+    R_RCX,
+    R_RDI,
+    R_RDX,
+    R_RSI,
+    R_RSP,
+    R_SEGR6,
+    R_SEGR7,
+    R_SI,
+    R_SIL,
+    R_SP,
+    R_SPL,
+    R_SS,
+    R_ST0,
+    R_ST1,
+    R_ST2,
+    R_ST3,
+    R_ST4,
+    R_ST5,
+    R_ST6,
+    R_ST7,
+    R_TMM0,
+    R_TMM1,
+    R_TMM2,
+    R_TMM3,
+    R_TMM4,
+    R_TMM5,
+    R_TMM6,
+    R_TMM7,
+    R_TR0,
+    R_TR1,
+    R_TR2,
+    R_TR3,
+    R_TR4,
+    R_TR5,
+    R_TR6,
+    R_TR7,
+    R_XMM0,
+    R_XMM1,
+    R_XMM10,
+    R_XMM11,
+    R_XMM12,
+    R_XMM13,
+    R_XMM14,
+    R_XMM15,
+    R_XMM16,
+    R_XMM17,
+    R_XMM18,
+    R_XMM19,
+    R_XMM2,
+    R_XMM20,
+    R_XMM21,
+    R_XMM22,
+    R_XMM23,
+    R_XMM24,
+    R_XMM25,
+    R_XMM26,
+    R_XMM27,
+    R_XMM28,
+    R_XMM29,
+    R_XMM3,
+    R_XMM30,
+    R_XMM31,
+    R_XMM4,
+    R_XMM5,
+    R_XMM6,
+    R_XMM7,
+    R_XMM8,
+    R_XMM9,
+    R_YMM0,
+    R_YMM1,
+    R_YMM10,
+    R_YMM11,
+    R_YMM12,
+    R_YMM13,
+    R_YMM14,
+    R_YMM15,
+    R_YMM16,
+    R_YMM17,
+    R_YMM18,
+    R_YMM19,
+    R_YMM2,
+    R_YMM20,
+    R_YMM21,
+    R_YMM22,
+    R_YMM23,
+    R_YMM24,
+    R_YMM25,
+    R_YMM26,
+    R_YMM27,
+    R_YMM28,
+    R_YMM29,
+    R_YMM3,
+    R_YMM30,
+    R_YMM31,
+    R_YMM4,
+    R_YMM5,
+    R_YMM6,
+    R_YMM7,
+    R_YMM8,
+    R_YMM9,
+    R_ZMM0,
+    R_ZMM1,
+    R_ZMM10,
+    R_ZMM11,
+    R_ZMM12,
+    R_ZMM13,
+    R_ZMM14,
+    R_ZMM15,
+    R_ZMM16,
+    R_ZMM17,
+    R_ZMM18,
+    R_ZMM19,
+    R_ZMM2,
+    R_ZMM20,
+    R_ZMM21,
+    R_ZMM22,
+    R_ZMM23,
+    R_ZMM24,
+    R_ZMM25,
+    R_ZMM26,
+    R_ZMM27,
+    R_ZMM28,
+    R_ZMM29,
+    R_ZMM3,
+    R_ZMM30,
+    R_ZMM31,
+    R_ZMM4,
+    R_ZMM5,
+    R_ZMM6,
+    R_ZMM7,
+    R_ZMM8,
+    R_ZMM9,
+    REG_ENUM_LIMIT
+};
+
+#define EXPR_REG_END 248
+
+#define REG_NUM_AH       4
+#define REG_NUM_AL       0
+#define REG_NUM_AX       0
+#define REG_NUM_BH       7
+#define REG_NUM_BL       3
+#define REG_NUM_BND0     0
+#define REG_NUM_BND1     1
+#define REG_NUM_BND2     2
+#define REG_NUM_BND3     3
+#define REG_NUM_BP       5
+#define REG_NUM_BPL      5
+#define REG_NUM_BX       3
+#define REG_NUM_CH       5
+#define REG_NUM_CL       1
+#define REG_NUM_CR0      0
+#define REG_NUM_CR1      1
+#define REG_NUM_CR10    10
+#define REG_NUM_CR11    11
+#define REG_NUM_CR12    12
+#define REG_NUM_CR13    13
+#define REG_NUM_CR14    14
+#define REG_NUM_CR15    15
+#define REG_NUM_CR2      2
+#define REG_NUM_CR3      3
+#define REG_NUM_CR4      4
+#define REG_NUM_CR5      5
+#define REG_NUM_CR6      6
+#define REG_NUM_CR7      7
+#define REG_NUM_CR8      8
+#define REG_NUM_CR9      9
+#define REG_NUM_CS       1
+#define REG_NUM_CX       1
+#define REG_NUM_DH       6
+#define REG_NUM_DI       7
+#define REG_NUM_DIL      7
+#define REG_NUM_DL       2
+#define REG_NUM_DR0      0
+#define REG_NUM_DR1      1
+#define REG_NUM_DR10    10
+#define REG_NUM_DR11    11
+#define REG_NUM_DR12    12
+#define REG_NUM_DR13    13
+#define REG_NUM_DR14    14
+#define REG_NUM_DR15    15
+#define REG_NUM_DR2      2
+#define REG_NUM_DR3      3
+#define REG_NUM_DR4      4
+#define REG_NUM_DR5      5
+#define REG_NUM_DR6      6
+#define REG_NUM_DR7      7
+#define REG_NUM_DR8      8
+#define REG_NUM_DR9      9
+#define REG_NUM_DS       3
+#define REG_NUM_DX       2
+#define REG_NUM_EAX      0
+#define REG_NUM_EBP      5
+#define REG_NUM_EBX      3
+#define REG_NUM_ECX      1
+#define REG_NUM_EDI      7
+#define REG_NUM_EDX      2
+#define REG_NUM_ES       0
+#define REG_NUM_ESI      6
+#define REG_NUM_ESP      4
+#define REG_NUM_FS       4
+#define REG_NUM_GS       5
+#define REG_NUM_K0       0
+#define REG_NUM_K1       1
+#define REG_NUM_K2       2
+#define REG_NUM_K3       3
+#define REG_NUM_K4       4
+#define REG_NUM_K5       5
+#define REG_NUM_K6       6
+#define REG_NUM_K7       7
+#define REG_NUM_MM0      0
+#define REG_NUM_MM1      1
+#define REG_NUM_MM2      2
+#define REG_NUM_MM3      3
+#define REG_NUM_MM4      4
+#define REG_NUM_MM5      5
+#define REG_NUM_MM6      6
+#define REG_NUM_MM7      7
+#define REG_NUM_R10     10
+#define REG_NUM_R10B    10
+#define REG_NUM_R10D    10
+#define REG_NUM_R10W    10
+#define REG_NUM_R11     11
+#define REG_NUM_R11B    11
+#define REG_NUM_R11D    11
+#define REG_NUM_R11W    11
+#define REG_NUM_R12     12
+#define REG_NUM_R12B    12
+#define REG_NUM_R12D    12
+#define REG_NUM_R12W    12
+#define REG_NUM_R13     13
+#define REG_NUM_R13B    13
+#define REG_NUM_R13D    13
+#define REG_NUM_R13W    13
+#define REG_NUM_R14     14
+#define REG_NUM_R14B    14
+#define REG_NUM_R14D    14
+#define REG_NUM_R14W    14
+#define REG_NUM_R15     15
+#define REG_NUM_R15B    15
+#define REG_NUM_R15D    15
+#define REG_NUM_R15W    15
+#define REG_NUM_R8       8
+#define REG_NUM_R8B      8
+#define REG_NUM_R8D      8
+#define REG_NUM_R8W      8
+#define REG_NUM_R9       9
+#define REG_NUM_R9B      9
+#define REG_NUM_R9D      9
+#define REG_NUM_R9W      9
+#define REG_NUM_RAX      0
+#define REG_NUM_RBP      5
+#define REG_NUM_RBX      3
+#define REG_NUM_RCX      1
+#define REG_NUM_RDI      7
+#define REG_NUM_RDX      2
+#define REG_NUM_RSI      6
+#define REG_NUM_RSP      4
+#define REG_NUM_SEGR6    6
+#define REG_NUM_SEGR7    7
+#define REG_NUM_SI       6
+#define REG_NUM_SIL      6
+#define REG_NUM_SP       4
+#define REG_NUM_SPL      4
+#define REG_NUM_SS       2
+#define REG_NUM_ST0      0
+#define REG_NUM_ST1      1
+#define REG_NUM_ST2      2
+#define REG_NUM_ST3      3
+#define REG_NUM_ST4      4
+#define REG_NUM_ST5      5
+#define REG_NUM_ST6      6
+#define REG_NUM_ST7      7
+#define REG_NUM_TMM0     0
+#define REG_NUM_TMM1     1
+#define REG_NUM_TMM2     2
+#define REG_NUM_TMM3     3
+#define REG_NUM_TMM4     4
+#define REG_NUM_TMM5     5
+#define REG_NUM_TMM6     6
+#define REG_NUM_TMM7     7
+#define REG_NUM_TR0      0
+#define REG_NUM_TR1      1
+#define REG_NUM_TR2      2
+#define REG_NUM_TR3      3
+#define REG_NUM_TR4      4
+#define REG_NUM_TR5      5
+#define REG_NUM_TR6      6
+#define REG_NUM_TR7      7
+#define REG_NUM_XMM0     0
+#define REG_NUM_XMM1     1
+#define REG_NUM_XMM10   10
+#define REG_NUM_XMM11   11
+#define REG_NUM_XMM12   12
+#define REG_NUM_XMM13   13
+#define REG_NUM_XMM14   14
+#define REG_NUM_XMM15   15
+#define REG_NUM_XMM16   16
+#define REG_NUM_XMM17   17
+#define REG_NUM_XMM18   18
+#define REG_NUM_XMM19   19
+#define REG_NUM_XMM2     2
+#define REG_NUM_XMM20   20
+#define REG_NUM_XMM21   21
+#define REG_NUM_XMM22   22
+#define REG_NUM_XMM23   23
+#define REG_NUM_XMM24   24
+#define REG_NUM_XMM25   25
+#define REG_NUM_XMM26   26
+#define REG_NUM_XMM27   27
+#define REG_NUM_XMM28   28
+#define REG_NUM_XMM29   29
+#define REG_NUM_XMM3     3
+#define REG_NUM_XMM30   30
+#define REG_NUM_XMM31   31
+#define REG_NUM_XMM4     4
+#define REG_NUM_XMM5     5
+#define REG_NUM_XMM6     6
+#define REG_NUM_XMM7     7
+#define REG_NUM_XMM8     8
+#define REG_NUM_XMM9     9
+#define REG_NUM_YMM0     0
+#define REG_NUM_YMM1     1
+#define REG_NUM_YMM10   10
+#define REG_NUM_YMM11   11
+#define REG_NUM_YMM12   12
+#define REG_NUM_YMM13   13
+#define REG_NUM_YMM14   14
+#define REG_NUM_YMM15   15
+#define REG_NUM_YMM16   16
+#define REG_NUM_YMM17   17
+#define REG_NUM_YMM18   18
+#define REG_NUM_YMM19   19
+#define REG_NUM_YMM2     2
+#define REG_NUM_YMM20   20
+#define REG_NUM_YMM21   21
+#define REG_NUM_YMM22   22
+#define REG_NUM_YMM23   23
+#define REG_NUM_YMM24   24
+#define REG_NUM_YMM25   25
+#define REG_NUM_YMM26   26
+#define REG_NUM_YMM27   27
+#define REG_NUM_YMM28   28
+#define REG_NUM_YMM29   29
+#define REG_NUM_YMM3     3
+#define REG_NUM_YMM30   30
+#define REG_NUM_YMM31   31
+#define REG_NUM_YMM4     4
+#define REG_NUM_YMM5     5
+#define REG_NUM_YMM6     6
+#define REG_NUM_YMM7     7
+#define REG_NUM_YMM8     8
+#define REG_NUM_YMM9     9
+#define REG_NUM_ZMM0     0
+#define REG_NUM_ZMM1     1
+#define REG_NUM_ZMM10   10
+#define REG_NUM_ZMM11   11
+#define REG_NUM_ZMM12   12
+#define REG_NUM_ZMM13   13
+#define REG_NUM_ZMM14   14
+#define REG_NUM_ZMM15   15
+#define REG_NUM_ZMM16   16
+#define REG_NUM_ZMM17   17
+#define REG_NUM_ZMM18   18
+#define REG_NUM_ZMM19   19
+#define REG_NUM_ZMM2     2
+#define REG_NUM_ZMM20   20
+#define REG_NUM_ZMM21   21
+#define REG_NUM_ZMM22   22
+#define REG_NUM_ZMM23   23
+#define REG_NUM_ZMM24   24
+#define REG_NUM_ZMM25   25
+#define REG_NUM_ZMM26   26
+#define REG_NUM_ZMM27   27
+#define REG_NUM_ZMM28   28
+#define REG_NUM_ZMM29   29
+#define REG_NUM_ZMM3     3
+#define REG_NUM_ZMM30   30
+#define REG_NUM_ZMM31   31
+#define REG_NUM_ZMM4     4
+#define REG_NUM_ZMM5     5
+#define REG_NUM_ZMM6     6
+#define REG_NUM_ZMM7     7
+#define REG_NUM_ZMM8     8
+#define REG_NUM_ZMM9     9
+
+
+#endif /* NASM_REGS_H */

_service:tar_scm:nasm-2.16.03.tar.xz/x86/regs.pl Added

@@ -0,0 +1,205 @@
+#!/usr/bin/perl
+## --------------------------------------------------------------------------
+##   
+##   Copyright 1996-2009 The NASM Authors - All Rights Reserved
+##   See the file AUTHORS included with the NASM distribution for
+##   the specific copyright holders.
+##
+##   Redistribution and use in source and binary forms, with or without
+##   modification, are permitted provided that the following
+##   conditions are met:
+##
+##   * Redistributions of source code must retain the above copyright
+##     notice, this list of conditions and the following disclaimer.
+##   * Redistributions in binary form must reproduce the above
+##     copyright notice, this list of conditions and the following
+##     disclaimer in the documentation and/or other materials provided
+##     with the distribution.
+##     
+##     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+##     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+##     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+##     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+##     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+##     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+##     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+##     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+##     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+##     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+##     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+##     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+##     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+##
+## --------------------------------------------------------------------------
+
+#
+# Read regs.dat and output regs.h and regs.c (included in names.c)
+#
+
+$nline = 0;
+
+sub toint($) {
+    my($v) = @_;
+
+    return ($v =~ /^0/) ? oct $v : $v+0;
+}
+
+sub process_line($) {
+    my($line) = @_;
+    my @v;
+
+    if ( $line !~ /^\s*(\S+)\s*(\S+)\s*(\S+)\s*(0-9+)\s*(\S*)/i ) {
+	die "regs.dat:$nline: invalid input\n";
+    }
+    $reg      = $1;
+    $aclass   = $2;
+    $dclasses = $3;
+    $x86regno = toint($4);
+
+    if ($reg =~ /^(.*^0-9)(0-9+)\-(0-9+)(|^0-9.*)$/) {
+	$nregs = $3-$2+1;
+	$reg = $1.$2.$4;
+	$reg_nr = $2;
+	$reg_prefix = $1;
+	$reg_suffix = $4;
+    } else {
+	$nregs = 1;
+	undef $reg_prefix;
+	undef $reg_suffix;
+    }
+
+    while ($nregs--) {
+	$regs{$reg} = $aclass;
+	$regvals{$reg} = $x86regno;
+
+	foreach $dclass (split(/,/, $dclasses)) {
+	    if ( !defined($disclass{$dclass}) ) {
+		$disclass{$dclass} = ;
+	    }
+
+	    $disclass{$dclass}->$x86regno = $reg;
+	}
+
+	# Compute the next register, if any
+	if (defined($reg_prefix)) {
+	    $x86regno++;
+	    $reg_nr++;
+	    $reg = sprintf("%s%u%s", $reg_prefix, $reg_nr, $reg_suffix);
+	} else {
+	    # Not a dashed sequence
+	    die if ($nregs);
+	}
+    }
+}
+
+($fmt, $file) = @ARGV;
+
+%regs = ();
+%regvals = ();
+%disclass = ();
+open(REGS, '<', $file) or die "$0: Cannot open $file\n";
+while ( defined($line = <REGS>) ) {
+    $nline++;
+
+    chomp $line;
+    $line =~ s/\s*(\#.*|)$//;
+
+    next if ( $line eq '' );
+
+    process_line($line);
+}
+close(REGS);
+
+if ( $fmt eq 'h' ) {
+    # Output regs.h
+    print "/* automatically generated from $file - do not edit */\n\n";
+    print "#ifndef NASM_REGS_H\n";
+    print "#define NASM_REGS_H\n\n";
+
+    $expr_regs = 1;
+    printf "#define EXPR_REG_START %d\n\n", $expr_regs;
+    print "enum reg_enum {\n";
+    # Unfortunately the code uses both 0 and -1 as "no register" in
+    # different places...
+    print "    R_zero = 0,\n";
+    print "    R_none = -1,\n";
+    $attach = ' = EXPR_REG_START'; # EXPR_REG_START == 1
+    foreach $reg ( sort(keys(%regs)) ) {
+	print "    R_\U${reg}\E${attach},\n";
+	$attach = '';
+	$expr_regs++;
+    }
+    print "    REG_ENUM_LIMIT\n";
+    print "};\n\n";
+    printf "#define EXPR_REG_END %d\n\n", $expr_regs-1;
+    foreach $reg ( sort(keys(%regs)) ) {
+	printf "#define %-15s %2d\n", "REG_NUM_\U${reg}", $regvals{$reg};
+    }
+    print "\n\n#endif /* NASM_REGS_H */\n";
+} elsif ( $fmt eq 'c' ) {
+    # Output regs.c
+    print "/* automatically generated from $file - do not edit */\n\n";
+    print "#include \"tables.h\"\n\n";
+    print "const char * const nasm_reg_names = "; $ch = '{';
+    # This one has no dummy entry for 0
+    foreach $reg ( sort(keys(%regs)) ) {
+	print "$ch\n    \"${reg}\"";
+	$ch = ',';
+    }
+    print "\n};\n";
+} elsif ( $fmt eq 'fc' ) {
+    # Output regflags.c
+    print "/* automatically generated from $file - do not edit */\n\n";
+    print "#include \"tables.h\"\n";
+    print "#include \"nasm.h\"\n\n";
+    print "const opflags_t nasm_reg_flags = {\n";
+    printf "    0,\n";		# Dummy entry for 0
+    foreach $reg ( sort(keys(%regs)) ) {
+	# Print the class of the register
+	printf "    %-15s /* %-5s */\n",
+		$regs{$reg}.',', $reg;
+    }
+    print "};\n";
+} elsif ( $fmt eq 'vc' ) {
+    # Output regvals.c
+    print "/* automatically generated from $file - do not edit */\n\n";
+    print "#include \"tables.h\"\n\n";
+    print "const int nasm_regvals = {\n";
+    print "    -1,\n";		# Dummy entry for 0
+    foreach $reg ( sort(keys(%regs)) ) {
+	# Print the x86 value of the register
+	printf "    %2d,  /* %-5s */\n", $regvals{$reg}, $reg;
+    }
+    print "};\n";
+} elsif ( $fmt eq 'dc' ) {
+    # Output regdis.c
+    print "/* automatically generated from $file - do not edit */\n\n";
+    print "#include \"regdis.h\"\n\n";
+    foreach $class ( sort(keys(%disclass)) ) {
+	printf "const enum reg_enum nasm_rd_%-8s%2d = {",
+		$class, scalar @{$disclass{$class}};
+	@foo = @{$disclass{$class}};
+	@bar = ();
+	for ( $i = 0 ; $i < scalar(@foo) ; $i++ ) {
+            if (defined($foo$i)) {
+		push(@bar, "R_\U$foo$i\E");
+	    } else {
+		die "$0: No register name for class $class, value $i\n";
+            }
+	}
+	print join(',', @bar), "};\n";
+    }
+} elsif ( $fmt eq 'dh' ) {
+    # Output regdis.h
+    print "/* automatically generated from $file - do not edit */\n\n";
+    print "#ifndef NASM_REGDIS_H\n";
+    print "#define NASM_REGDIS_H\n\n";
+    print "#include \"regs.h\"\n\n";
+    foreach $class ( sort(keys(%disclass)) ) {
+	printf "extern const enum reg_enum nasm_rd_%-8s%2d;\n",
+		$class, scalar @{$disclass{$class}};
+    }
+    print "\n#endif /* NASM_REGDIS_H */\n";
+} else {
+    die "$0: Unknown output format\n";
+}

_service:tar_scm:nasm-2.16.03.tar.xz/x86/regvals.c Added

@@ -0,0 +1,255 @@
+/* automatically generated from ./x86/regs.dat - do not edit */
+
+#include "tables.h"
+
+const int nasm_regvals = {
+    -1,
+     4,  /* ah    */
+     0,  /* al    */
+     0,  /* ax    */
+     7,  /* bh    */
+     3,  /* bl    */
+     0,  /* bnd0  */
+     1,  /* bnd1  */
+     2,  /* bnd2  */
+     3,  /* bnd3  */
+     5,  /* bp    */
+     5,  /* bpl   */
+     3,  /* bx    */
+     5,  /* ch    */
+     1,  /* cl    */
+     0,  /* cr0   */
+     1,  /* cr1   */
+    10,  /* cr10  */
+    11,  /* cr11  */
+    12,  /* cr12  */
+    13,  /* cr13  */
+    14,  /* cr14  */
+    15,  /* cr15  */
+     2,  /* cr2   */
+     3,  /* cr3   */
+     4,  /* cr4   */
+     5,  /* cr5   */
+     6,  /* cr6   */
+     7,  /* cr7   */
+     8,  /* cr8   */
+     9,  /* cr9   */
+     1,  /* cs    */
+     1,  /* cx    */
+     6,  /* dh    */
+     7,  /* di    */
+     7,  /* dil   */
+     2,  /* dl    */
+     0,  /* dr0   */
+     1,  /* dr1   */
+    10,  /* dr10  */
+    11,  /* dr11  */
+    12,  /* dr12  */
+    13,  /* dr13  */
+    14,  /* dr14  */
+    15,  /* dr15  */
+     2,  /* dr2   */
+     3,  /* dr3   */
+     4,  /* dr4   */
+     5,  /* dr5   */
+     6,  /* dr6   */
+     7,  /* dr7   */
+     8,  /* dr8   */
+     9,  /* dr9   */
+     3,  /* ds    */
+     2,  /* dx    */
+     0,  /* eax   */
+     5,  /* ebp   */
+     3,  /* ebx   */
+     1,  /* ecx   */
+     7,  /* edi   */
+     2,  /* edx   */
+     0,  /* es    */
+     6,  /* esi   */
+     4,  /* esp   */
+     4,  /* fs    */
+     5,  /* gs    */
+     0,  /* k0    */
+     1,  /* k1    */
+     2,  /* k2    */
+     3,  /* k3    */
+     4,  /* k4    */
+     5,  /* k5    */
+     6,  /* k6    */
+     7,  /* k7    */
+     0,  /* mm0   */
+     1,  /* mm1   */
+     2,  /* mm2   */
+     3,  /* mm3   */
+     4,  /* mm4   */
+     5,  /* mm5   */
+     6,  /* mm6   */
+     7,  /* mm7   */
+    10,  /* r10   */
+    10,  /* r10b  */
+    10,  /* r10d  */
+    10,  /* r10w  */
+    11,  /* r11   */
+    11,  /* r11b  */
+    11,  /* r11d  */
+    11,  /* r11w  */
+    12,  /* r12   */
+    12,  /* r12b  */
+    12,  /* r12d  */
+    12,  /* r12w  */
+    13,  /* r13   */
+    13,  /* r13b  */
+    13,  /* r13d  */
+    13,  /* r13w  */
+    14,  /* r14   */
+    14,  /* r14b  */
+    14,  /* r14d  */
+    14,  /* r14w  */
+    15,  /* r15   */
+    15,  /* r15b  */
+    15,  /* r15d  */
+    15,  /* r15w  */
+     8,  /* r8    */
+     8,  /* r8b   */
+     8,  /* r8d   */
+     8,  /* r8w   */
+     9,  /* r9    */
+     9,  /* r9b   */
+     9,  /* r9d   */
+     9,  /* r9w   */
+     0,  /* rax   */
+     5,  /* rbp   */
+     3,  /* rbx   */
+     1,  /* rcx   */
+     7,  /* rdi   */
+     2,  /* rdx   */
+     6,  /* rsi   */
+     4,  /* rsp   */
+     6,  /* segr6 */
+     7,  /* segr7 */
+     6,  /* si    */
+     6,  /* sil   */
+     4,  /* sp    */
+     4,  /* spl   */
+     2,  /* ss    */
+     0,  /* st0   */
+     1,  /* st1   */
+     2,  /* st2   */
+     3,  /* st3   */
+     4,  /* st4   */
+     5,  /* st5   */
+     6,  /* st6   */
+     7,  /* st7   */
+     0,  /* tmm0  */
+     1,  /* tmm1  */
+     2,  /* tmm2  */
+     3,  /* tmm3  */
+     4,  /* tmm4  */
+     5,  /* tmm5  */
+     6,  /* tmm6  */
+     7,  /* tmm7  */
+     0,  /* tr0   */
+     1,  /* tr1   */
+     2,  /* tr2   */
+     3,  /* tr3   */
+     4,  /* tr4   */
+     5,  /* tr5   */
+     6,  /* tr6   */
+     7,  /* tr7   */
+     0,  /* xmm0  */
+     1,  /* xmm1  */
+    10,  /* xmm10 */
+    11,  /* xmm11 */
+    12,  /* xmm12 */
+    13,  /* xmm13 */
+    14,  /* xmm14 */
+    15,  /* xmm15 */
+    16,  /* xmm16 */
+    17,  /* xmm17 */
+    18,  /* xmm18 */
+    19,  /* xmm19 */
+     2,  /* xmm2  */
+    20,  /* xmm20 */
+    21,  /* xmm21 */
+    22,  /* xmm22 */
+    23,  /* xmm23 */
+    24,  /* xmm24 */
+    25,  /* xmm25 */
+    26,  /* xmm26 */
+    27,  /* xmm27 */
+    28,  /* xmm28 */
+    29,  /* xmm29 */
+     3,  /* xmm3  */
+    30,  /* xmm30 */
+    31,  /* xmm31 */
+     4,  /* xmm4  */
+     5,  /* xmm5  */
+     6,  /* xmm6  */
+     7,  /* xmm7  */
+     8,  /* xmm8  */
+     9,  /* xmm9  */
+     0,  /* ymm0  */
+     1,  /* ymm1  */
+    10,  /* ymm10 */
+    11,  /* ymm11 */
+    12,  /* ymm12 */
+    13,  /* ymm13 */
+    14,  /* ymm14 */
+    15,  /* ymm15 */
+    16,  /* ymm16 */
+    17,  /* ymm17 */
+    18,  /* ymm18 */
+    19,  /* ymm19 */
+     2,  /* ymm2  */
+    20,  /* ymm20 */
+    21,  /* ymm21 */
+    22,  /* ymm22 */
+    23,  /* ymm23 */
+    24,  /* ymm24 */
+    25,  /* ymm25 */
+    26,  /* ymm26 */
+    27,  /* ymm27 */
+    28,  /* ymm28 */
+    29,  /* ymm29 */
+     3,  /* ymm3  */
+    30,  /* ymm30 */
+    31,  /* ymm31 */
+     4,  /* ymm4  */
+     5,  /* ymm5  */
+     6,  /* ymm6  */
+     7,  /* ymm7  */
+     8,  /* ymm8  */
+     9,  /* ymm9  */
+     0,  /* zmm0  */
+     1,  /* zmm1  */
+    10,  /* zmm10 */
+    11,  /* zmm11 */
+    12,  /* zmm12 */
+    13,  /* zmm13 */
+    14,  /* zmm14 */
+    15,  /* zmm15 */
+    16,  /* zmm16 */
+    17,  /* zmm17 */
+    18,  /* zmm18 */
+    19,  /* zmm19 */
+     2,  /* zmm2  */
+    20,  /* zmm20 */
+    21,  /* zmm21 */
+    22,  /* zmm22 */
+    23,  /* zmm23 */
+    24,  /* zmm24 */
+    25,  /* zmm25 */
+    26,  /* zmm26 */
+    27,  /* zmm27 */
+    28,  /* zmm28 */
+    29,  /* zmm29 */
+     3,  /* zmm3  */
+    30,  /* zmm30 */
+    31,  /* zmm31 */
+     4,  /* zmm4  */
+     5,  /* zmm5  */
+     6,  /* zmm6  */
+     7,  /* zmm7  */
+     8,  /* zmm8  */
+     9,  /* zmm9  */
+};

Changes of Revision 3